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arm-bsp/docs: Improve fvp-baser-aemv864 limitation

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Add more details about the cache_state_modelled limitation, which can
be worked around by setting cci400.force_on_from_start=1

Issue-Id: SCM-3871
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Change-Id: Idde23278a87316dae842c6c3793b9836482e8c3a
Signed-off-by: Jon Mason <jon.mason@arm.com>
This commit is contained in:
Peter Hoyes
2022-03-03 09:11:43 +00:00
committed by Jon Mason
parent ce5e683f01
commit 1bc6bf2750
1 changed files with 5 additions and 2 deletions
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meta-arm-bsp/documentation/fvp-baser-aemv8r64.md
+5 -2
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@@ -217,8 +217,11 @@ Known Issues and Limitations
- Only PSCI CPU\_ON and CPU\_OFF functions are supported - Only PSCI CPU\_ON and CPU\_OFF functions are supported
- Linux kernel does not support booting from secure EL2 on Armv8-R AArch64 - Linux kernel does not support booting from secure EL2 on Armv8-R AArch64
- Linux KVM does not support Armv8-R AArch64 - Linux KVM does not support Armv8-R AArch64
- Enabling the FVP parameter `cache_state_modelled` is incompatible with virtio - Device DMA memory cache-coherence issue: the FVP cache_state_modelled
devices parameter will affect the cache coherence behavior of peripherals’ DMA. When
users set cache_state_modelled=1, they also have to set
cci400.force_on_from_start=1 to force the FVP to enable snooping on upstream
ports.
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