From 385450558e839da8b6b6483abd058b660ee7a136 Mon Sep 17 00:00:00 2001 From: Yogesh Wani Date: Wed, 9 Apr 2025 09:57:36 +0100 Subject: [PATCH] arm-bsp/documentation: corstone1000: Fix typos in the documentation The Corstone-1000 read the docs had some small typos in the Design Overview section. Commit addresses these. Copyright information now updated. Signed-off-by: Yogesh Wani Signed-off-by: Jon Mason --- .../documentation/corstone1000/software-architecture.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/meta-arm-bsp/documentation/corstone1000/software-architecture.rst b/meta-arm-bsp/documentation/corstone1000/software-architecture.rst index 95156013..3edd2280 100644 --- a/meta-arm-bsp/documentation/corstone1000/software-architecture.rst +++ b/meta-arm-bsp/documentation/corstone1000/software-architecture.rst @@ -1,5 +1,5 @@ .. - # Copyright (c) 2022-2024, Arm Limited. + # Copyright (c) 2022-2025, Arm Limited. # # SPDX-License-Identifier: MIT @@ -46,7 +46,7 @@ Each subsystem provides different functionality to overall SoC. The Secure Enclave System, provides PSA Root of Trust (RoT) and -cryptographic functions. It is based on an Cortex-M0+ processor, +cryptographic functions. It is based on a Cortex-M0+ processor, CC312 Cryptographic Accelerator and peripherals, such as watchdog and secure flash. Software running on the Secure Enclave is isolated via hardware for enhanced security. Communication with the Secure Encalve @@ -80,7 +80,7 @@ development. Overall, the Corstone-1000 architecture is designed to cover a range of Power, Performance, and Area (PPA) applications, and enable extension for use-case specific applications, for example, sensors, cloud -connectivitiy, and edge computing. +connectivity, and edge computing. ***************** Secure Boot Chain