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a5ds: update trusted-firmware-a to new git hash
Changes that we were holding as a patch are upstreamed to trusted-firmware-a master branch. Following are the links to the changes. https://review.trustedfirmware.org/#/c/TF-A/trusted-firmware-a/+/2916/ https://review.trustedfirmware.org/#/c/TF-A/trusted-firmware-a/+/2915/ https://review.trustedfirmware.org/#/c/TF-A/trusted-firmware-a/+/2823/ https://review.trustedfirmware.org/#/c/TF-A/trusted-firmware-a/+/2822/ https://review.trustedfirmware.org/#/c/TF-A/trusted-firmware-a/+/2821/ This change is to update the git hash and to remove patching of trusted-firmware-a by yocto Change-Id: Id708a5d02950773524aa3b4e13bb5b31ca34c7c2 Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
This commit is contained in:
Vishnu Banavath
committed by
Tushar Khandelwal
Tushar Khandelwal
parent
d26a2b7171
commit
3da5ef2795
@@ -5,7 +5,4 @@
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FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
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FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
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SRC_URI += "\
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SRCREV = "5d3ee0764b03567bf3501edf47d67d72daff0cb3"
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file://0001-plat-arm-a5ds-dts-uart-clock.patch \
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"
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SRCREV = "af1ac83e0fa4e77aad13e1e8e47b6fcafeb17dbc"
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-163
@@ -1,163 +0,0 @@
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From 7849818353f3787473fcede68a7b81640ecacef0 Mon Sep 17 00:00:00 2001
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From: Vishnu Banavath <vishnu.banavath@arm.com>
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Date: Wed, 20 Nov 2019 15:12:09 +0000
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Subject: [PATCH] a5ds: dts: make DTS changes to run on FPGA as well
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* Delete cpu@2 and cpu@3 devicetree nodes(as FPAG supports only 2 cores)
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* Correct the platform frequency to run the stack on FPGA
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* When Using bigger kernel images (>8.4MB compressed zImage) and at
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decompress and final location init stage of kernel start makes it
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override dtb at this address, to avoid this move the dtb a little
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higher in address related.
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Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
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---
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fdts/a5ds.dts | 30 ++++++++-----------
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.../arm/board/a5ds/fdts/a5ds_tb_fw_config.dts | 2 +-
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plat/arm/board/a5ds/include/platform_def.h | 12 ++++----
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3 files changed, 19 insertions(+), 25 deletions(-)
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diff --git a/fdts/a5ds.dts b/fdts/a5ds.dts
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index 91212e8a..c9295fd9 100644
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--- a/fdts/a5ds.dts
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+++ b/fdts/a5ds.dts
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@@ -12,7 +12,6 @@
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interrupt-parent = <&gic>;
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#address-cells = <1>;
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#size-cells = <1>;
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-
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psci {
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compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
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method = "smc";
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@@ -34,18 +33,6 @@
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enable-method = "psci";
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reg = <1>;
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};
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- cpu@2 {
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- device_type = "cpu";
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- compatible = "arm,cortex-a5";
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- enable-method = "psci";
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- reg = <2>;
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- };
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- cpu@3 {
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- device_type = "cpu";
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- compatible = "arm,cortex-a5";
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- enable-method = "psci";
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- reg = <3>;
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- };
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};
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memory@80000000 {
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@@ -53,10 +40,17 @@
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reg = <0x80000000 0x7F000000>;
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};
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- refclk100mhz: refclk100mhz {
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+ refclk7500khz: refclk7500khz {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <7500000>;
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+ clock-output-names = "apb_pclk";
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+ };
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+
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+ refclk24mhz: refclk24mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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- clock-frequency = <100000000>;
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+ clock-frequency = <24000000>;
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clock-output-names = "apb_pclk";
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};
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@@ -71,7 +65,7 @@
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rtc@1a220000 {
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compatible = "arm,pl031", "arm,primecell";
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reg = <0x1a220000 0x1000>;
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- clocks = <&refclk100mhz>;
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+ clocks = <&refclk24mhz>;
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interrupts = <0 6 0xf04>;
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clock-names = "apb_pclk";
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};
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@@ -91,7 +85,7 @@
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reg = <0x1a200000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 8 0xf04>;
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- clocks = <&refclk100mhz>;
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+ clocks = <&refclk7500khz>;
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clock-names = "apb_pclk";
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};
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@@ -100,7 +94,7 @@
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reg = <0x1a210000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 9 0xf04>;
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- clocks = <&refclk100mhz>;
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+ clocks = <&refclk7500khz>;
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clock-names = "apb_pclk";
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};
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diff --git a/plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts b/plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts
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index 9ab2d965..c616ff77 100644
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--- a/plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts
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+++ b/plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts
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@@ -10,7 +10,7 @@
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/* Platform Config */
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plat_arm_bl2 {
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compatible = "arm,tb_fw";
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- hw_config_addr = <0x0 0x82000000>;
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+ hw_config_addr = <0x0 0x83000000>;
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hw_config_max_size = <0x01000000>;
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/* Disable authentication for development */
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disable_auth = <0x0>;
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diff --git a/plat/arm/board/a5ds/include/platform_def.h b/plat/arm/board/a5ds/include/platform_def.h
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index e9e4b9ae..aed86949 100644
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--- a/plat/arm/board/a5ds/include/platform_def.h
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+++ b/plat/arm/board/a5ds/include/platform_def.h
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@@ -47,7 +47,7 @@
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#define A5_PERIPHERALS_BASE 0x1c000000
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#define A5_PERIPHERALS_SIZE 0x10000
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-#define ARM_CACHE_WRITEBACK_SHIFT 6
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+#define ARM_CACHE_WRITEBACK_SHIFT 5
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#define ARM_IRQ_SEC_PHY_TIMER 29
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@@ -101,7 +101,7 @@
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#define A5DS_PRIMARY_CPU 0x0
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-#define FLASH1_BASE UL(0x8000000)
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+#define FLASH1_BASE UL(0x80000000)
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#define FLASH1_SIZE UL(0x2800000)
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#define MAP_FLASH1_RW MAP_REGION_FLAT(FLASH1_BASE,\
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@@ -162,7 +162,7 @@
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ARM_BL_REGIONS)
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/* Memory mapped Generic timer interfaces */
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-#define A5DS_TIMER_BASE_FREQUENCY UL(24000000)
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+#define A5DS_TIMER_BASE_FREQUENCY UL(7500000)
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#define ARM_CONSOLE_BAUDRATE 115200
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@@ -310,15 +310,15 @@
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* PL011 related constants
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*/
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#define PLAT_ARM_BOOT_UART_BASE 0x1A200000
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-#define PLAT_ARM_BOOT_UART_CLK_IN_HZ 24000000
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+#define PLAT_ARM_BOOT_UART_CLK_IN_HZ 7500000
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#define PLAT_ARM_RUN_UART_BASE 0x1A210000
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-#define PLAT_ARM_RUN_UART_CLK_IN_HZ 24000000
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+#define PLAT_ARM_RUN_UART_CLK_IN_HZ 7500000
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#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_RUN_UART_BASE
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#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_RUN_UART_CLK_IN_HZ
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-#define A5DS_TIMER_BASE_FREQUENCY UL(24000000)
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+#define A5DS_TIMER_BASE_FREQUENCY UL(7500000)
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/* System timer related constants */
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#define PLAT_ARM_NSTIMER_FRAME_ID 1
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--
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2.17.1
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