From 84a0813ae12451a8705b2c97058c3e23f8dd4241 Mon Sep 17 00:00:00 2001 From: Jiamei Xie Date: Wed, 22 Jun 2022 14:36:20 +0100 Subject: [PATCH] arm-bsp/fvp-baser-aemv8r64: Use secure hypervisor physical timer in EL2 Arm generic timer provides different timers for different exception levels and different secure states. Because Armv8-R AArch64 has secure state only, the valid timer for hypervisor in EL2 is secure hypervisor physical timer. But for platform fvp-baser-aemv8r64, before FVP 11.18, the secure hypervisor physical timer could not work well in EL2, so we had been using Non-secure physical timer in EL2 for hypervisor as a workaround. Since secure hypervisor physical timer issue has been fixed from FVP 11.18, we can use this correct timer in EL2 for hypervisor now. So we update the device tree timer node to use secure hypervisor physical timer interrupt for hypervisor. About the interrupt assignments of FVP, please refer to https://developer.arm.com/documentation/100964/latest/Base-Platform/Base---interrupt-assignments Issue-Id: SCM-4596 Signed-off-by: Jiamei Xie Change-Id: I9d4b9f4e0ed14c6c1567269c83696ceb9ff84ac8 Signed-off-by: Jon Mason --- .../linux/files/fvp-baser-aemv8r64/fvp-baser-aemv8r64.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-arm-bsp/recipes-kernel/linux/files/fvp-baser-aemv8r64/fvp-baser-aemv8r64.dts b/meta-arm-bsp/recipes-kernel/linux/files/fvp-baser-aemv8r64/fvp-baser-aemv8r64.dts index 1a4e501b..6911a598 100644 --- a/meta-arm-bsp/recipes-kernel/linux/files/fvp-baser-aemv8r64/fvp-baser-aemv8r64.dts +++ b/meta-arm-bsp/recipes-kernel/linux/files/fvp-baser-aemv8r64/fvp-baser-aemv8r64.dts @@ -186,7 +186,7 @@ interrupts = <0x1 13 0xff08>, <0x1 14 0xff08>, <0x1 11 0xff08>, - <0x1 10 0xff08>; + <0x1 4 0xff08>; clock-frequency = <100000000>; };