diff --git a/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts b/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts deleted file mode 100644 index 0e59fdf8..00000000 --- a/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts +++ /dev/null @@ -1,95 +0,0 @@ -/* - * Copyright (c) 2015-2016 ARM Limited - * All rights reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Andreas Sandberg - */ - -/dts-v1/; - -/memreserve/ 0x80000000 0x00010000; - -/include/ "vexpress_gem5_v2.dtsi" - -/ { - model = "V2P-AARCH64"; - compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress"; - - memory@80000000 { - device_type = "memory"; - reg = <0 0x80000000 0x4 0x00000000>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 0 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - }; - - virt-encoder { - compatible = "drm,virtual-encoder"; - port { - dp0_virt_input: endpoint@0 { - remote-endpoint = <&dp0_output>; - }; - }; - - display-timings { - native-mode = <&timing0>; - - timing0: timing_1080p60 { - /* 1920x1080-60 */ - clock-frequency = <148500000>; - hactive = <1920>; - vactive = <1080>; - hfront-porch = <148>; - hback-porch = <88>; - hsync-len = <44>; - vfront-porch = <36>; - vback-porch = <4>; - vsync-len = <5>; - }; - }; - }; -}; - -&dp0 { - status = "ok"; - - port { - dp0_output: endpoint@0 { - remote-endpoint = <&dp0_virt_input>; - }; - }; -}; diff --git a/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts b/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts deleted file mode 100644 index 441d3df2..00000000 --- a/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Copyright (c) 2015-2016 ARM Limited - * All rights reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Andreas Sandberg - */ - -/dts-v1/; - -/memreserve/ 0x80000000 0x00010000; - -/include/ "vexpress_gem5_v2.dtsi" - -/ { - model = "V2P-AARCH64"; - compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress"; - - memory@80000000 { - device_type = "memory"; - reg = <0 0x80000000 0x4 0x00000000>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 0 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 1 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - }; - - virt-encoder { - compatible = "drm,virtual-encoder"; - port { - dp0_virt_input: endpoint@0 { - remote-endpoint = <&dp0_output>; - }; - }; - - display-timings { - native-mode = <&timing0>; - - timing0: timing_1080p60 { - /* 1920x1080-60 */ - clock-frequency = <148500000>; - hactive = <1920>; - vactive = <1080>; - hfront-porch = <148>; - hback-porch = <88>; - hsync-len = <44>; - vfront-porch = <36>; - vback-porch = <4>; - vsync-len = <5>; - }; - }; - }; -}; - -&dp0 { - status = "ok"; - - port { - dp0_output: endpoint@0 { - remote-endpoint = <&dp0_virt_input>; - }; - }; -}; diff --git a/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts b/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts deleted file mode 100644 index 2d0311a5..00000000 --- a/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts +++ /dev/null @@ -1,119 +0,0 @@ -/* - * Copyright (c) 2015-2016 ARM Limited - * All rights reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Andreas Sandberg - */ - -/dts-v1/; - -/memreserve/ 0x80000000 0x00010000; - -/include/ "vexpress_gem5_v2.dtsi" - -/ { - model = "V2P-AARCH64"; - compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress"; - - memory@80000000 { - device_type = "memory"; - reg = <0 0x80000000 0x4 0x00000000>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 0 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 1 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 2 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 3 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - }; - - virt-encoder { - compatible = "drm,virtual-encoder"; - port { - dp0_virt_input: endpoint@0 { - remote-endpoint = <&dp0_output>; - }; - }; - - display-timings { - native-mode = <&timing0>; - - timing0: timing_1080p60 { - /* 1920x1080-60 */ - clock-frequency = <148500000>; - hactive = <1920>; - vactive = <1080>; - hfront-porch = <148>; - hback-porch = <88>; - hsync-len = <44>; - vfront-porch = <36>; - vback-porch = <4>; - vsync-len = <5>; - }; - }; - }; -}; - -&dp0 { - status = "ok"; - - port { - dp0_output: endpoint@0 { - remote-endpoint = <&dp0_virt_input>; - }; - }; -}; diff --git a/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts b/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts deleted file mode 100644 index ba94d074..00000000 --- a/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts +++ /dev/null @@ -1,151 +0,0 @@ -/* - * Copyright (c) 2015-2016 ARM Limited - * All rights reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Andreas Sandberg - */ - -/dts-v1/; - -/memreserve/ 0x80000000 0x00010000; - -/include/ "vexpress_gem5_v2.dtsi" - -/ { - model = "V2P-AARCH64"; - compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress"; - - memory@80000000 { - device_type = "memory"; - reg = <0 0x80000000 0x4 0x00000000>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 0 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 1 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 2 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 3 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - cpu@4 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 4 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - cpu@5 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 5 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - cpu@6 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 6 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - cpu@7 { - device_type = "cpu"; - compatible = "gem5,armv8", "arm,armv8"; - reg = < 7 >; - enable-method = "spin-table"; - cpu-release-addr = <0 0x8000fff8>; - }; - - }; - - virt-encoder { - compatible = "drm,virtual-encoder"; - port { - dp0_virt_input: endpoint@0 { - remote-endpoint = <&dp0_output>; - }; - }; - - display-timings { - native-mode = <&timing0>; - - timing0: timing_1080p60 { - /* 1920x1080-60 */ - clock-frequency = <148500000>; - hactive = <1920>; - vactive = <1080>; - hfront-porch = <148>; - hback-porch = <88>; - hsync-len = <44>; - vfront-porch = <36>; - vback-porch = <4>; - vsync-len = <5>; - }; - }; - }; -}; - -&dp0 { - status = "ok"; - - port { - dp0_output: endpoint@0 { - remote-endpoint = <&dp0_virt_input>; - }; - }; -}; diff --git a/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2.dtsi b/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2.dtsi deleted file mode 100644 index e53e6e84..00000000 --- a/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2.dtsi +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (c) 2015-2018 ARM Limited - * All rights reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Andreas Sandberg - */ - -/include/ "vexpress_gem5_v2_base.dtsi" - -/ { - /* The display processor needs custom configuration to setup its - * output ports. Disable it by default in the platform until the - * DT bindings have stabilize. - */ - dp0: hdlcd@2b000000 { - compatible = "arm,hdlcd"; - reg = <0x0 0x2b000000 0x0 0x1000>; - interrupts = <0 63 4>; - clocks = <&osc_pxl>; - clock-names = "pxlclk"; - status = "disabled"; - }; -}; diff --git a/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi b/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi deleted file mode 100644 index eba0db25..00000000 --- a/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi +++ /dev/null @@ -1,202 +0,0 @@ -/* - * Copyright (c) 2015-2017, 2019 ARM Limited - * All rights reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Andreas Sandberg - */ - -/ { - arm,hbi = <0x0>; - arm,vexpress,site = <0xf>; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - gic: interrupt-controller@2c000000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <0x3>; - #address-cells = <0x2>; - ranges; - interrupt-controller; - redistributor-stride = <0x0 0x40000>; // 256kB stride - reg = <0x0 0x2c000000 0x0 0x10000 - 0x0 0x2c010000 0x0 0x2000000 // room for 128 redistributors using 128K each (256K strided...) - 0x0 0x0 0x0 0x0>; - interrupts = <1 9 0xf04>; - #size-cells = <0x2>; - linux,phandle = <0x1>; - phandle = <0x1>; - - gic-its@2e010000 { - compatible = "arm,gic-v3-its"; - msi-controller; - #msi-cells = <1>; - reg = <0x0 0x2e010000 0 0x20000>; - }; - }; - - timer { - compatible = "arm,cortex-a15-timer", - "arm,armv7-timer"; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; - clocks = <&osc_sys>; - clock-names="apb_pclk"; - }; - - pci { - compatible = "pci-host-ecam-generic"; - device_type = "pci"; - #address-cells = <0x3>; - #size-cells = <0x2>; - #interrupt-cells = <0x1>; - - reg = <0x0 0x30000000 0x0 0x10000000>; - - ranges = <0x01000000 0x0 0x00000000 0x0 0x2f000000 0x0 0x00010000>, - <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>; - - /* - child unit address, #cells = #address-cells - child interrupt specifier, #cells = #interrupt-cells (INTA = 1, INTB = 2, INTC = 3 and INTD = 4) - interrupt-parent, phandle - parent unit address, #cells = #address-cells@gic - parent interrupt specifier, #cells = #interrupt-cells@gic - */ - interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x44 0x1 - 0x800 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x45 0x1 - 0x1000 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x46 0x1 - 0x1800 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x47 0x1>; - - interrupt-map-mask = <0x001800 0x0 0x0 0x0>; - dma-coherent; - }; - - kmi@1c060000 { - compatible = "arm,pl050", "arm,primecell"; - reg = <0x0 0x1c060000 0x0 0x1000>; - interrupts = <0 12 4>; - clocks = <&v2m_clk24mhz>, <&osc_smb>; - clock-names = "KMIREFCLK", "apb_pclk"; - }; - - kmi@1c070000 { - compatible = "arm,pl050", "arm,primecell"; - reg = <0x0 0x1c070000 0x0 0x1000>; - interrupts = <0 13 4>; - clocks = <&v2m_clk24mhz>, <&osc_smb>; - clock-names = "KMIREFCLK", "apb_pclk"; - }; - - uart0: uart@1c090000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0 0x1c090000 0x0 0x1000>; - interrupts = <0 5 4>; - clocks = <&osc_peripheral>, <&osc_smb>; - clock-names = "uartclk", "apb_pclk"; - }; - - rtc@1c170000 { - compatible = "arm,pl031", "arm,primecell"; - reg = <0x0 0x1c170000 0x0 0x1000>; - interrupts = <0 4 4>; - clocks = <&osc_smb>; - clock-names = "apb_pclk"; - }; - - v2m_clk24mhz: clk24mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "v2m:clk24mhz"; - }; - - - v2m_sysreg: sysreg@1c010000 { - compatible = "arm,vexpress-sysreg"; - reg = <0 0x1c010000 0x0 0x1000>; - gpio-controller; - #gpio-cells = <2>; - }; - - vio@1c130000 { - compatible = "virtio,mmio"; - reg = <0 0x1c130000 0x0 0x1000>; - interrupts = <0 42 4>; - }; - - vio@1c140000 { - compatible = "virtio,mmio"; - reg = <0 0x1c140000 0x0 0x1000>; - interrupts = <0 43 4>; - }; - - dcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc_pxl: osc@5 { - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 5>; - freq-range = <23750000 1000000000>; - #clock-cells = <0>; - clock-output-names = "oscclk5"; - }; - - osc_smb: osc@6 { - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 6>; - freq-range = <20000000 50000000>; - #clock-cells = <0>; - clock-output-names = "oscclk6"; - }; - - osc_sys: osc@7 { - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 7>; - freq-range = <20000000 60000000>; - #clock-cells = <0>; - clock-output-names = "oscclk7"; - }; - }; - - - mcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - arm,vexpress,site = <0>; - - osc_peripheral: osc@2 { - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 2>; - freq-range = <24000000 24000000>; - #clock-cells = <0>; - clock-output-names = "v2m:oscclk2"; - }; - }; -}; diff --git a/meta-arm-bsp/recipes-kernel/linux/files/gem5-dts.patch b/meta-arm-bsp/recipes-kernel/linux/files/gem5-dts.patch new file mode 100644 index 00000000..6aa08bcf --- /dev/null +++ b/meta-arm-bsp/recipes-kernel/linux/files/gem5-dts.patch @@ -0,0 +1,757 @@ +Add DTS files which are not yet upstream. + +Upstream-Status: Pending +Signed-off-by: Bertrand Marquis + +diff --git a/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts +new file mode 100644 +index 000000000000..0e59fdf89054 +--- /dev/null ++++ b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts +@@ -0,0 +1,95 @@ ++/* ++ * Copyright (c) 2015-2016 ARM Limited ++ * All rights reserved ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are ++ * met: redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer; ++ * redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution; ++ * neither the name of the copyright holders nor the names of its ++ * contributors may be used to endorse or promote products derived from ++ * this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT ++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, ++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT ++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ * Authors: Andreas Sandberg ++ */ ++ ++/dts-v1/; ++ ++/memreserve/ 0x80000000 0x00010000; ++ ++/include/ "vexpress_gem5_v2.dtsi" ++ ++/ { ++ model = "V2P-AARCH64"; ++ compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress"; ++ ++ memory@80000000 { ++ device_type = "memory"; ++ reg = <0 0x80000000 0x4 0x00000000>; ++ }; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu@0 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 0 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ }; ++ ++ virt-encoder { ++ compatible = "drm,virtual-encoder"; ++ port { ++ dp0_virt_input: endpoint@0 { ++ remote-endpoint = <&dp0_output>; ++ }; ++ }; ++ ++ display-timings { ++ native-mode = <&timing0>; ++ ++ timing0: timing_1080p60 { ++ /* 1920x1080-60 */ ++ clock-frequency = <148500000>; ++ hactive = <1920>; ++ vactive = <1080>; ++ hfront-porch = <148>; ++ hback-porch = <88>; ++ hsync-len = <44>; ++ vfront-porch = <36>; ++ vback-porch = <4>; ++ vsync-len = <5>; ++ }; ++ }; ++ }; ++}; ++ ++&dp0 { ++ status = "ok"; ++ ++ port { ++ dp0_output: endpoint@0 { ++ remote-endpoint = <&dp0_virt_input>; ++ }; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts +new file mode 100644 +index 000000000000..441d3df2a16f +--- /dev/null ++++ b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts +@@ -0,0 +1,103 @@ ++/* ++ * Copyright (c) 2015-2016 ARM Limited ++ * All rights reserved ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are ++ * met: redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer; ++ * redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution; ++ * neither the name of the copyright holders nor the names of its ++ * contributors may be used to endorse or promote products derived from ++ * this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT ++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, ++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT ++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ * Authors: Andreas Sandberg ++ */ ++ ++/dts-v1/; ++ ++/memreserve/ 0x80000000 0x00010000; ++ ++/include/ "vexpress_gem5_v2.dtsi" ++ ++/ { ++ model = "V2P-AARCH64"; ++ compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress"; ++ ++ memory@80000000 { ++ device_type = "memory"; ++ reg = <0 0x80000000 0x4 0x00000000>; ++ }; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu@0 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 0 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ cpu@1 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 1 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ }; ++ ++ virt-encoder { ++ compatible = "drm,virtual-encoder"; ++ port { ++ dp0_virt_input: endpoint@0 { ++ remote-endpoint = <&dp0_output>; ++ }; ++ }; ++ ++ display-timings { ++ native-mode = <&timing0>; ++ ++ timing0: timing_1080p60 { ++ /* 1920x1080-60 */ ++ clock-frequency = <148500000>; ++ hactive = <1920>; ++ vactive = <1080>; ++ hfront-porch = <148>; ++ hback-porch = <88>; ++ hsync-len = <44>; ++ vfront-porch = <36>; ++ vback-porch = <4>; ++ vsync-len = <5>; ++ }; ++ }; ++ }; ++}; ++ ++&dp0 { ++ status = "ok"; ++ ++ port { ++ dp0_output: endpoint@0 { ++ remote-endpoint = <&dp0_virt_input>; ++ }; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts +new file mode 100644 +index 000000000000..2d0311a5f893 +--- /dev/null ++++ b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts +@@ -0,0 +1,119 @@ ++/* ++ * Copyright (c) 2015-2016 ARM Limited ++ * All rights reserved ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are ++ * met: redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer; ++ * redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution; ++ * neither the name of the copyright holders nor the names of its ++ * contributors may be used to endorse or promote products derived from ++ * this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT ++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, ++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT ++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ * Authors: Andreas Sandberg ++ */ ++ ++/dts-v1/; ++ ++/memreserve/ 0x80000000 0x00010000; ++ ++/include/ "vexpress_gem5_v2.dtsi" ++ ++/ { ++ model = "V2P-AARCH64"; ++ compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress"; ++ ++ memory@80000000 { ++ device_type = "memory"; ++ reg = <0 0x80000000 0x4 0x00000000>; ++ }; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu@0 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 0 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ cpu@1 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 1 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ cpu@2 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 2 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ cpu@3 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 3 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ }; ++ ++ virt-encoder { ++ compatible = "drm,virtual-encoder"; ++ port { ++ dp0_virt_input: endpoint@0 { ++ remote-endpoint = <&dp0_output>; ++ }; ++ }; ++ ++ display-timings { ++ native-mode = <&timing0>; ++ ++ timing0: timing_1080p60 { ++ /* 1920x1080-60 */ ++ clock-frequency = <148500000>; ++ hactive = <1920>; ++ vactive = <1080>; ++ hfront-porch = <148>; ++ hback-porch = <88>; ++ hsync-len = <44>; ++ vfront-porch = <36>; ++ vback-porch = <4>; ++ vsync-len = <5>; ++ }; ++ }; ++ }; ++}; ++ ++&dp0 { ++ status = "ok"; ++ ++ port { ++ dp0_output: endpoint@0 { ++ remote-endpoint = <&dp0_virt_input>; ++ }; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts +new file mode 100644 +index 000000000000..ba94d0746958 +--- /dev/null ++++ b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts +@@ -0,0 +1,151 @@ ++/* ++ * Copyright (c) 2015-2016 ARM Limited ++ * All rights reserved ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are ++ * met: redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer; ++ * redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution; ++ * neither the name of the copyright holders nor the names of its ++ * contributors may be used to endorse or promote products derived from ++ * this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT ++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, ++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT ++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ * Authors: Andreas Sandberg ++ */ ++ ++/dts-v1/; ++ ++/memreserve/ 0x80000000 0x00010000; ++ ++/include/ "vexpress_gem5_v2.dtsi" ++ ++/ { ++ model = "V2P-AARCH64"; ++ compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress"; ++ ++ memory@80000000 { ++ device_type = "memory"; ++ reg = <0 0x80000000 0x4 0x00000000>; ++ }; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu@0 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 0 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ cpu@1 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 1 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ cpu@2 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 2 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ cpu@3 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 3 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ cpu@4 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 4 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ cpu@5 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 5 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ cpu@6 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 6 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ cpu@7 { ++ device_type = "cpu"; ++ compatible = "gem5,armv8", "arm,armv8"; ++ reg = < 7 >; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0 0x8000fff8>; ++ }; ++ ++ }; ++ ++ virt-encoder { ++ compatible = "drm,virtual-encoder"; ++ port { ++ dp0_virt_input: endpoint@0 { ++ remote-endpoint = <&dp0_output>; ++ }; ++ }; ++ ++ display-timings { ++ native-mode = <&timing0>; ++ ++ timing0: timing_1080p60 { ++ /* 1920x1080-60 */ ++ clock-frequency = <148500000>; ++ hactive = <1920>; ++ vactive = <1080>; ++ hfront-porch = <148>; ++ hback-porch = <88>; ++ hsync-len = <44>; ++ vfront-porch = <36>; ++ vback-porch = <4>; ++ vsync-len = <5>; ++ }; ++ }; ++ }; ++}; ++ ++&dp0 { ++ status = "ok"; ++ ++ port { ++ dp0_output: endpoint@0 { ++ remote-endpoint = <&dp0_virt_input>; ++ }; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/gem5-arm64/vexpress_gem5_v2.dtsi b/arch/arm64/boot/dts/gem5-arm64/vexpress_gem5_v2.dtsi +new file mode 100644 +index 000000000000..e53e6e84b301 +--- /dev/null ++++ b/arch/arm64/boot/dts/gem5-arm64/vexpress_gem5_v2.dtsi +@@ -0,0 +1,46 @@ ++/* ++ * Copyright (c) 2015-2018 ARM Limited ++ * All rights reserved ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are ++ * met: redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer; ++ * redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution; ++ * neither the name of the copyright holders nor the names of its ++ * contributors may be used to endorse or promote products derived from ++ * this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT ++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, ++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT ++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ * Authors: Andreas Sandberg ++ */ ++ ++/include/ "vexpress_gem5_v2_base.dtsi" ++ ++/ { ++ /* The display processor needs custom configuration to setup its ++ * output ports. Disable it by default in the platform until the ++ * DT bindings have stabilize. ++ */ ++ dp0: hdlcd@2b000000 { ++ compatible = "arm,hdlcd"; ++ reg = <0x0 0x2b000000 0x0 0x1000>; ++ interrupts = <0 63 4>; ++ clocks = <&osc_pxl>; ++ clock-names = "pxlclk"; ++ status = "disabled"; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi b/arch/arm64/boot/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi +new file mode 100644 +index 000000000000..eba0db2526df +--- /dev/null ++++ b/arch/arm64/boot/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi +@@ -0,0 +1,202 @@ ++/* ++ * Copyright (c) 2015-2017, 2019 ARM Limited ++ * All rights reserved ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are ++ * met: redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer; ++ * redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution; ++ * neither the name of the copyright holders nor the names of its ++ * contributors may be used to endorse or promote products derived from ++ * this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT ++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, ++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT ++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ * Authors: Andreas Sandberg ++ */ ++ ++/ { ++ arm,hbi = <0x0>; ++ arm,vexpress,site = <0xf>; ++ interrupt-parent = <&gic>; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ++ gic: interrupt-controller@2c000000 { ++ compatible = "arm,gic-v3"; ++ #interrupt-cells = <0x3>; ++ #address-cells = <0x2>; ++ ranges; ++ interrupt-controller; ++ redistributor-stride = <0x0 0x40000>; // 256kB stride ++ reg = <0x0 0x2c000000 0x0 0x10000 ++ 0x0 0x2c010000 0x0 0x2000000 // room for 128 redistributors using 128K each (256K strided...) ++ 0x0 0x0 0x0 0x0>; ++ interrupts = <1 9 0xf04>; ++ #size-cells = <0x2>; ++ linux,phandle = <0x1>; ++ phandle = <0x1>; ++ ++ gic-its@2e010000 { ++ compatible = "arm,gic-v3-its"; ++ msi-controller; ++ #msi-cells = <1>; ++ reg = <0x0 0x2e010000 0 0x20000>; ++ }; ++ }; ++ ++ timer { ++ compatible = "arm,cortex-a15-timer", ++ "arm,armv7-timer"; ++ interrupts = <1 13 0xf08>, ++ <1 14 0xf08>, ++ <1 11 0xf08>, ++ <1 10 0xf08>; ++ clocks = <&osc_sys>; ++ clock-names="apb_pclk"; ++ }; ++ ++ pci { ++ compatible = "pci-host-ecam-generic"; ++ device_type = "pci"; ++ #address-cells = <0x3>; ++ #size-cells = <0x2>; ++ #interrupt-cells = <0x1>; ++ ++ reg = <0x0 0x30000000 0x0 0x10000000>; ++ ++ ranges = <0x01000000 0x0 0x00000000 0x0 0x2f000000 0x0 0x00010000>, ++ <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>; ++ ++ /* ++ child unit address, #cells = #address-cells ++ child interrupt specifier, #cells = #interrupt-cells (INTA = 1, INTB = 2, INTC = 3 and INTD = 4) ++ interrupt-parent, phandle ++ parent unit address, #cells = #address-cells@gic ++ parent interrupt specifier, #cells = #interrupt-cells@gic ++ */ ++ interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x44 0x1 ++ 0x800 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x45 0x1 ++ 0x1000 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x46 0x1 ++ 0x1800 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x47 0x1>; ++ ++ interrupt-map-mask = <0x001800 0x0 0x0 0x0>; ++ dma-coherent; ++ }; ++ ++ kmi@1c060000 { ++ compatible = "arm,pl050", "arm,primecell"; ++ reg = <0x0 0x1c060000 0x0 0x1000>; ++ interrupts = <0 12 4>; ++ clocks = <&v2m_clk24mhz>, <&osc_smb>; ++ clock-names = "KMIREFCLK", "apb_pclk"; ++ }; ++ ++ kmi@1c070000 { ++ compatible = "arm,pl050", "arm,primecell"; ++ reg = <0x0 0x1c070000 0x0 0x1000>; ++ interrupts = <0 13 4>; ++ clocks = <&v2m_clk24mhz>, <&osc_smb>; ++ clock-names = "KMIREFCLK", "apb_pclk"; ++ }; ++ ++ uart0: uart@1c090000 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x0 0x1c090000 0x0 0x1000>; ++ interrupts = <0 5 4>; ++ clocks = <&osc_peripheral>, <&osc_smb>; ++ clock-names = "uartclk", "apb_pclk"; ++ }; ++ ++ rtc@1c170000 { ++ compatible = "arm,pl031", "arm,primecell"; ++ reg = <0x0 0x1c170000 0x0 0x1000>; ++ interrupts = <0 4 4>; ++ clocks = <&osc_smb>; ++ clock-names = "apb_pclk"; ++ }; ++ ++ v2m_clk24mhz: clk24mhz { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <24000000>; ++ clock-output-names = "v2m:clk24mhz"; ++ }; ++ ++ ++ v2m_sysreg: sysreg@1c010000 { ++ compatible = "arm,vexpress-sysreg"; ++ reg = <0 0x1c010000 0x0 0x1000>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ }; ++ ++ vio@1c130000 { ++ compatible = "virtio,mmio"; ++ reg = <0 0x1c130000 0x0 0x1000>; ++ interrupts = <0 42 4>; ++ }; ++ ++ vio@1c140000 { ++ compatible = "virtio,mmio"; ++ reg = <0 0x1c140000 0x0 0x1000>; ++ interrupts = <0 43 4>; ++ }; ++ ++ dcc { ++ compatible = "arm,vexpress,config-bus"; ++ arm,vexpress,config-bridge = <&v2m_sysreg>; ++ ++ osc_pxl: osc@5 { ++ compatible = "arm,vexpress-osc"; ++ arm,vexpress-sysreg,func = <1 5>; ++ freq-range = <23750000 1000000000>; ++ #clock-cells = <0>; ++ clock-output-names = "oscclk5"; ++ }; ++ ++ osc_smb: osc@6 { ++ compatible = "arm,vexpress-osc"; ++ arm,vexpress-sysreg,func = <1 6>; ++ freq-range = <20000000 50000000>; ++ #clock-cells = <0>; ++ clock-output-names = "oscclk6"; ++ }; ++ ++ osc_sys: osc@7 { ++ compatible = "arm,vexpress-osc"; ++ arm,vexpress-sysreg,func = <1 7>; ++ freq-range = <20000000 60000000>; ++ #clock-cells = <0>; ++ clock-output-names = "oscclk7"; ++ }; ++ }; ++ ++ ++ mcc { ++ compatible = "arm,vexpress,config-bus"; ++ arm,vexpress,config-bridge = <&v2m_sysreg>; ++ arm,vexpress,site = <0>; ++ ++ osc_peripheral: osc@2 { ++ compatible = "arm,vexpress-osc"; ++ arm,vexpress-sysreg,func = <1 2>; ++ freq-range = <24000000 24000000>; ++ #clock-cells = <0>; ++ clock-output-names = "v2m:oscclk2"; ++ }; ++ }; ++}; diff --git a/meta-arm-bsp/recipes-kernel/linux/linux-arm-platforms.inc b/meta-arm-bsp/recipes-kernel/linux/linux-arm-platforms.inc index 40acc24c..61e611f1 100644 --- a/meta-arm-bsp/recipes-kernel/linux/linux-arm-platforms.inc +++ b/meta-arm-bsp/recipes-kernel/linux/linux-arm-platforms.inc @@ -40,9 +40,4 @@ KMACHINE_juno = "juno" # COMPATIBLE_MACHINE_gem5-arm64 = "gem5-arm64" KMACHINE_gem5-arm64 = "gem5-arm64" -SRC_URI_append_gem5-arm64 = " file://dts/gem5-arm64;subdir=add-files" - -do_patch_append_gem5-arm64() { - tar -C ${WORKDIR}/add-files/dts -cf - gem5-arm64 | \ - tar -C arch/arm64/boot/dts -xf - -} +SRC_URI_append_gem5-arm64 = " file://gem5-dts.patch"