diff --git a/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0001-FF-A-Register-secondary-core-entry-point-at-SPMC-ini.patch b/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0001-FF-A-Register-secondary-core-entry-point-at-SPMC-ini.patch index 58287505..f2219d0a 100644 --- a/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0001-FF-A-Register-secondary-core-entry-point-at-SPMC-ini.patch +++ b/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0001-FF-A-Register-secondary-core-entry-point-at-SPMC-ini.patch @@ -1,32 +1,37 @@ -Upstream-Status: Pending [Not submitted to upstream yet] +Upstream-Status: Pending [https://review.trustedfirmware.org/c/hafnium/hafnium/+/6009/27] Signed-off-by: Arunachalam Ganapathy -From cb329ce33874abd8b69988c3dc63fd323a3413be Mon Sep 17 00:00:00 2001 +From 06e7602ddb383e0f88c19feaa216c24cf032a136 Mon Sep 17 00:00:00 2001 From: Max Shvetsov Date: Thu, 27 Aug 2020 12:37:57 +0100 -Subject: [PATCH 1/4] FF-A: Register secondary core entry point at SPMC init. +Subject: [PATCH 2/5] FF-A: Register secondary core entry point at SPMC init. -When the primary physical core boots the SPMC registers its secondary physical -core entry points to the SPMD. All Secure Partition are then initialized on -their primary Execution Contexts. A Secure Partition calls PSCI_CPU_ON from its -first EC (trapped to the SPMC) passing entry point addresses of secondary ECs. -ECs are turned "on" in their SPMC internal states, although they do not run yet -(the service call does not reach the EL3 PSCI layer). Later, when the NWd -(Hypervisor or OS Kernel) boots, it calls PSCI_CPU_ON for waking up physical -cores down to EL3. The PSCI layer calls into SPMD PM hooks, then the SPMD calls -into the SPMC by an exception return to the registered secondary entry point. -The target secondary core then reaches Hafnium vcpu_main. +When the primary physical core boots the SPMC registers its secondary +physical core entry points to the SPMD. All Secure Partition are then +initialized on their primary Execution Contexts. A Secure Partition +calls PSCI_CPU_ON from its first EC (trapped to the SPMC) passing +entry point addresses of secondary ECs. ECs are turned "on" in their +SPMC internal states, although they do not run yet (the service call +does not reach the EL3 PSCI layer). Later, when the NWd (Hypervisor +or OS Kernel) boots, it calls PSCI_CPU_ON for waking up physical cores +down to EL3. The PSCI layer calls into SPMD PM hooks, then the SPMD +calls into the SPMC by an exception return to the registered secondary +entry point. The target secondary core then reaches Hafnium vcpu_main. Change-Id: I2bd42ea54e1a7feebff20e878345ec196ff352e9 Signed-off-by: Max Shvetsov Signed-off-by: Olivier Deprez --- - inc/hf/arch/init.h | 7 ++ - src/arch/aarch64/hypervisor/psci_handler.c | 131 +++++++++++++++++--- - src/arch/aarch64/inc/hf/arch/spmd_helpers.h | 15 +++ - src/cpu.c | 7 ++ - src/init.c | 2 + - 5 files changed, 143 insertions(+), 19 deletions(-) + inc/hf/arch/init.h | 7 ++++ + inc/hf/arch/other_world.h | 2 ++ + src/arch/aarch64/hypervisor/other_world.c | 29 +++++++++++++++ + src/arch/aarch64/hypervisor/psci_handler.c | 40 +++++++++++++++++++++ + src/arch/aarch64/inc/hf/arch/spmd_helpers.h | 15 ++++++++ + src/cpu.c | 2 +- + src/init.c | 2 ++ + src/load.c | 3 ++ + src/main.c | 12 ++++--- + 9 files changed, 106 insertions(+), 6 deletions(-) create mode 100644 src/arch/aarch64/inc/hf/arch/spmd_helpers.h diff --git a/inc/hf/arch/init.h b/inc/hf/arch/init.h @@ -51,13 +56,69 @@ index 5205e4e..ef0e48f 100644 + * Sets up secondary cores. + */ +void arch_psci_secondary_core_init(const struct boot_params *params); +diff --git a/inc/hf/arch/other_world.h b/inc/hf/arch/other_world.h +index 68c0b45..860a142 100644 +--- a/inc/hf/arch/other_world.h ++++ b/inc/hf/arch/other_world.h +@@ -20,3 +20,5 @@ bool arch_other_world_is_direct_request_valid(struct vcpu *current, + bool arch_other_world_is_direct_response_valid(struct vcpu *current, + ffa_vm_id_t sender_vm_id, + ffa_vm_id_t receiver_vm_id); ++void arch_other_world_init_ffa_id(void); ++ffa_vm_id_t arch_other_world_get_ffa_id(void); +diff --git a/src/arch/aarch64/hypervisor/other_world.c b/src/arch/aarch64/hypervisor/other_world.c +index 74a2bb1..6b5bb16 100644 +--- a/src/arch/aarch64/hypervisor/other_world.c ++++ b/src/arch/aarch64/hypervisor/other_world.c +@@ -23,6 +23,10 @@ + alignas(PAGE_SIZE) static uint8_t other_world_send_buffer[HF_MAILBOX_SIZE]; + alignas(PAGE_SIZE) static uint8_t other_world_recv_buffer[HF_MAILBOX_SIZE]; + ++#else ++ ++static ffa_vm_id_t physical_ffa_id; ++ + #endif + + void arch_other_world_init(void) +@@ -181,3 +185,28 @@ struct ffa_value arch_other_world_call(struct ffa_value args) + { + return smc_ffa_call(args); + } ++ ++#if SECURE_WORLD == 1 ++ ++ffa_vm_id_t arch_other_world_get_ffa_id(void) ++{ ++ return physical_ffa_id; ++} ++ ++void arch_other_world_init_ffa_id(void) ++{ ++ struct ffa_value res = ++ smc_ffa_call((struct ffa_value){.func = FFA_ID_GET_32}); ++ ++ if (res.func != FFA_SUCCESS_32) { ++ dlog_error("%s Failed to get SPMC's FFA-ID from SPMD.\n", ++ __func__); ++ physical_ffa_id = HF_INVALID_VM_ID; ++ return; ++ } ++ physical_ffa_id = res.arg2 & 0xFFFF; ++ ++ CHECK(physical_ffa_id == HF_TEE_VM_ID); ++} ++ ++#endif diff --git a/src/arch/aarch64/hypervisor/psci_handler.c b/src/arch/aarch64/hypervisor/psci_handler.c -index f89a00b..bdcc1d3 100644 +index f89a00b..b323faa 100644 --- a/src/arch/aarch64/hypervisor/psci_handler.c +++ b/src/arch/aarch64/hypervisor/psci_handler.c -@@ -11,9 +11,11 @@ +@@ -10,10 +10,13 @@ + #include ++#include "hf/arch/other_world.h" #include "hf/arch/plat/psci.h" +#include "hf/arch/spmd_helpers.h" #include "hf/arch/types.h" @@ -67,48 +128,15 @@ index f89a00b..bdcc1d3 100644 #include "hf/cpu.h" #include "hf/dlog.h" #include "hf/ffa.h" -@@ -24,9 +26,32 @@ - #include "smc.h" - - static uint32_t el3_psci_version; -+static ffa_vm_id_t physical_ffa_id; - - void cpu_entry(struct cpu *c); - -+#if SECURE_WORLD == 1 -+ -+static void set_ffa_id(void) -+{ -+ struct ffa_value res = -+ smc_ffa_call((struct ffa_value){.func = FFA_ID_GET_32}); -+ -+ if (res.func != FFA_SUCCESS_32) { -+ dlog_error("%s Failed to get it's own FF-A ID.\n", __func__); -+ physical_ffa_id = HF_INVALID_VM_ID; -+ return; -+ } -+ physical_ffa_id = res.arg2 & 0xFFFF; -+} -+ -+#endif -+ -+ffa_vm_id_t get_ffa_id(void) -+{ -+ return physical_ffa_id; -+} -+ - /* Performs arch specific boot time initialisation. */ - void arch_one_time_init(void) - { -@@ -53,9 +78,79 @@ void arch_one_time_init(void) +@@ -53,6 +56,41 @@ void arch_one_time_init(void) } #else el3_psci_version = PSCI_VERSION_1_1; + -+ set_ffa_id(); - #endif - } - ++ arch_other_world_init_ffa_id(); ++#endif ++} ++ +/** + * Register secondary physical core entry points to the SPMD. + */ @@ -120,11 +148,11 @@ index f89a00b..bdcc1d3 100644 + for (uint32_t count = 0; count < params->cpu_count; count++) { + uint32_t id = params->cpu_ids[count]; + struct cpu *cpu = cpu_find(id); -+ const ffa_vm_id_t ffa_id = get_ffa_id(); ++ const ffa_vm_id_t ffa_id = arch_other_world_get_ffa_id(); + + res = smc_ffa_call((struct ffa_value){ + .func = FFA_MSG_SEND_DIRECT_REQ_32, -+ .arg1 = (ffa_id << 16) | SPMD_ID, ++ .arg1 = ((uint64_t)ffa_id << 16) | SPMD_ID, + .arg3 = SPMD_DIRECT_MSG_SET_ENTRY_POINT, + .arg4 = params->cpu_ids[count], + .arg5 = (uintreg_t)&cpu_entry, @@ -139,127 +167,23 @@ index f89a00b..bdcc1d3 100644 + + dlog_verbose("SPMD EP register returned %#x\n", res.func); + } -+#endif -+} -+ -+/** -+ * Convert a PSCI CPU / affinity ID for a secondary VM to the corresponding vCPU -+ * index. -+ */ -+ffa_vcpu_index_t vcpu_id_to_index(cpu_id_t vcpu_id) -+{ -+ /* For now we use indices as IDs for the purposes of PSCI. */ -+ return vcpu_id; -+} -+ -+#if SECURE_WORLD == 1 -+/** -+ * Use vcpu_on only as a way to initialize entry point without -+ * an intent to power up vcpu. -+ */ -+static uintreg_t ffa_register_entrypoint(cpu_id_t id, struct vm *vm, -+ uintreg_t entrypoint, uintreg_t param) -+{ -+ ffa_vcpu_index_t target_vcpu_index = vcpu_id_to_index(id); -+ -+ if (target_vcpu_index >= vm->vcpu_count) { -+ return PSCI_ERROR_INVALID_PARAMETERS; -+ } -+ -+ struct vcpu *target_vcpu = vm_get_vcpu(vm, target_vcpu_index); -+ struct vcpu_locked locked_target_vcpu = vcpu_lock(target_vcpu); -+ -+ vcpu_on(locked_target_vcpu, ipa_init(entrypoint), param); -+ -+ vcpu_unlock(&locked_target_vcpu); -+ -+ return PSCI_RETURN_SUCCESS; -+} -+#endif -+ - /** - * Handles PSCI requests received via HVC or SMC instructions from the primary - * VM. -@@ -180,7 +275,8 @@ bool psci_primary_vm_handler(struct vcpu *vcpu, uint32_t func, uintreg_t arg0, - panic("CPU off failed"); - break; - -- case PSCI_CPU_ON: -+ case PSCI_CPU_ON: { -+#if SECURE_WORLD == 0 - c = cpu_find(arg0); - if (!c) { - *ret = PSCI_ERROR_INVALID_PARAMETERS; -@@ -208,7 +304,12 @@ bool psci_primary_vm_handler(struct vcpu *vcpu, uint32_t func, uintreg_t arg0, - if (*ret != PSCI_RETURN_SUCCESS) { - cpu_off(c); - } -+#else -+ *ret = ffa_register_entrypoint((cpu_id_t)arg0, vcpu->vm, arg1, -+ arg2); -+#endif - break; -+ } - - case PSCI_MIGRATE: - case PSCI_MIGRATE_INFO_TYPE: -@@ -234,16 +335,6 @@ bool psci_primary_vm_handler(struct vcpu *vcpu, uint32_t func, uintreg_t arg0, - return true; + #endif } --/** -- * Convert a PSCI CPU / affinity ID for a secondary VM to the corresponding vCPU -- * index. -- */ --ffa_vcpu_index_t vcpu_id_to_index(cpu_id_t vcpu_id) --{ -- /* For now we use indices as IDs for the purposes of PSCI. */ -- return vcpu_id; --} -- - /** - * Handles PSCI requests received via HVC or SMC instructions from a secondary - * VM. -@@ -337,22 +428,23 @@ bool psci_secondary_vm_handler(struct vcpu *vcpu, uint32_t func, uintreg_t arg0, - case PSCI_CPU_ON: { - /* Parameter names as per PSCI specification. */ - cpu_id_t target_cpu = arg0; -- ipaddr_t entry_point_address = ipa_init(arg1); - uint64_t context_id = arg2; -- ffa_vcpu_index_t target_vcpu_index = -- vcpu_id_to_index(target_cpu); - struct vm *vm = vcpu->vm; -- struct vcpu *target_vcpu; +@@ -353,11 +391,13 @@ bool psci_secondary_vm_handler(struct vcpu *vcpu, uint32_t func, uintreg_t arg0, -+#if SECURE_WORLD == 1 -+ *ret = ffa_register_entrypoint((cpu_id_t)target_cpu, vm, arg1, -+ context_id); -+#else -+ ffa_vcpu_index_t target_vcpu_index = -+ vcpu_id_to_index(target_cpu); - if (target_vcpu_index >= vm->vcpu_count) { - *ret = PSCI_ERROR_INVALID_PARAMETERS; - break; - } -+ struct vcpu *target_vcpu = vm_get_vcpu(vm, target_vcpu_index); - -- target_vcpu = vm_get_vcpu(vm, target_vcpu_index); -- -- if (vcpu_secondary_reset_and_start( -- target_vcpu, entry_point_address, context_id)) { -+ if (vcpu_secondary_reset_and_start(target_vcpu, ipa_init(arg1), -+ context_id)) { + if (vcpu_secondary_reset_and_start( + target_vcpu, entry_point_address, context_id)) { ++#if SECURE_WORLD == 0 /* * Tell the scheduler that it can start running the new * vCPU now. -@@ -362,6 +454,7 @@ bool psci_secondary_vm_handler(struct vcpu *vcpu, uint32_t func, uintreg_t arg0, + */ + *next = api_wake_up(vcpu, target_vcpu); ++#endif + *ret = PSCI_RETURN_SUCCESS; } else { *ret = PSCI_ERROR_ALREADY_ON; - } -+#endif - - break; - } diff --git a/src/arch/aarch64/inc/hf/arch/spmd_helpers.h b/src/arch/aarch64/inc/hf/arch/spmd_helpers.h new file mode 100644 index 0000000..6e11c36 @@ -282,30 +206,18 @@ index 0000000..6e11c36 + */ +ffa_vm_id_t get_ffa_id(void); diff --git a/src/cpu.c b/src/cpu.c -index 0a3fc6f..42a17fa 100644 +index 0a3fc6f..0e0ee9a 100644 --- a/src/cpu.c +++ b/src/cpu.c -@@ -138,6 +138,8 @@ bool cpu_on(struct cpu *c, ipaddr_t entry, uintreg_t arg) +@@ -138,7 +138,7 @@ bool cpu_on(struct cpu *c, ipaddr_t entry, uintreg_t arg) c->is_on = true; sl_unlock(&c->lock); -+#if SECURE_WORLD == 0 -+ - if (!prev) { +- if (!prev) { ++ if (!prev && vm_id_is_current_world(HF_PRIMARY_VM_ID)) { struct vm *vm = vm_find(HF_PRIMARY_VM_ID); struct vcpu *vcpu = vm_get_vcpu(vm, cpu_index(c)); -@@ -148,6 +150,11 @@ bool cpu_on(struct cpu *c, ipaddr_t entry, uintreg_t arg) - vcpu_unlock(&vcpu_locked); - } - -+#else -+ (void)entry; -+ (void)arg; -+#endif -+ - return prev; - } - + struct vcpu_locked vcpu_locked; diff --git a/src/init.c b/src/init.c index a5b48ab..0121213 100644 --- a/src/init.c @@ -319,6 +231,46 @@ index a5b48ab..0121213 100644 /* Load all VMs. */ update.reserved_ranges_count = 0; if (!load_vms(mm_stage1_locked, &manifest, &cpio, ¶ms, &update, +diff --git a/src/load.c b/src/load.c +index 660d77c..7accc65 100644 +--- a/src/load.c ++++ b/src/load.c +@@ -286,6 +286,9 @@ static bool load_primary(struct mm_stage1_locked stage1_locked, + dlog_info("Loaded primary VM with %u vCPUs, entry at %#x.\n", + vm->vcpu_count, pa_addr(primary_begin)); + ++ /* Mark the primary to be the first booted VM */ ++ vm_update_boot(vm); ++ + vcpu_locked = vcpu_lock(vm_get_vcpu(vm, 0)); + vcpu_on(vcpu_locked, primary_entry, params->kernel_arg); + vcpu_unlock(&vcpu_locked); +diff --git a/src/main.c b/src/main.c +index 5f30aac..3cc932e 100644 +--- a/src/main.c ++++ b/src/main.c +@@ -15,14 +15,16 @@ + */ + struct vcpu *cpu_main(struct cpu *c) + { ++ struct vm *first_boot; + struct vcpu *vcpu; +-#if SECURE_WORLD == 1 +- struct vm *first_boot = vm_get_first_boot(); ++ ++ /* ++ * This returns the PVM in the normal worls and the first ++ * booted Secure Partition in the secure world. ++ */ ++ first_boot = vm_get_first_boot(); + + vcpu = vm_get_vcpu(first_boot, cpu_index(c)); +-#else +- vcpu = vm_get_vcpu(vm_find(HF_PRIMARY_VM_ID), cpu_index(c)); +-#endif + + vcpu->cpu = c; + -- -2.26.2 +2.29.2 diff --git a/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0002-FF-A-Cold-boot-and-wake-up-from-suspend.patch b/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0002-FF-A-Cold-boot-and-wake-up-from-suspend.patch index 0b586374..6cce9ad8 100644 --- a/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0002-FF-A-Cold-boot-and-wake-up-from-suspend.patch +++ b/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0002-FF-A-Cold-boot-and-wake-up-from-suspend.patch @@ -1,10 +1,10 @@ -Upstream-Status: Pending [Not submitted to upstream yet] +Upstream-Status: Pending [https://review.trustedfirmware.org/c/hafnium/hafnium/+/6010/29] Signed-off-by: Arunachalam Ganapathy -From 8422e2a5d6b2094f9f451a2d818a593cba29af84 Mon Sep 17 00:00:00 2001 +From ebd568637627fa895e6e7f479675c650414cc240 Mon Sep 17 00:00:00 2001 From: Max Shvetsov Date: Thu, 27 Aug 2020 12:39:50 +0100 -Subject: [PATCH 2/4] FF-A: Cold boot and wake up from suspend. +Subject: [PATCH 3/5] FF-A: Cold boot and wake up from suspend. WIP: Currently there is zero entry-point passed with no arguments, This will be reworked once a proper way to pass this information will be @@ -12,12 +12,41 @@ defined. Change-Id: Ic6050af16d4081ca31729744995fbb999b170e11 Signed-off-by: Max Shvetsov +Signed-off-by: Olivier Deprez --- - src/main.c | 23 +++++++++++++++++++++++ - 1 file changed, 23 insertions(+) + inc/hf/vcpu.h | 2 ++ + src/arch/aarch64/hypervisor/psci_handler.c | 2 ++ + src/main.c | 20 ++++++++++++++++++++ + 3 files changed, 24 insertions(+) +diff --git a/inc/hf/vcpu.h b/inc/hf/vcpu.h +index 5439719..98f3a50 100644 +--- a/inc/hf/vcpu.h ++++ b/inc/hf/vcpu.h +@@ -86,6 +86,8 @@ struct vcpu { + * a result of a prior FFA_MSG_SEND_DIRECT_REQ invocation. + */ + ffa_vm_id_t direct_request_origin_vm_id; ++ ++ ipaddr_t psci_handler[1]; + }; + + /** Encapsulates a vCPU whose lock is held. */ +diff --git a/src/arch/aarch64/hypervisor/psci_handler.c b/src/arch/aarch64/hypervisor/psci_handler.c +index b323faa..c892385 100644 +--- a/src/arch/aarch64/hypervisor/psci_handler.c ++++ b/src/arch/aarch64/hypervisor/psci_handler.c +@@ -389,6 +389,8 @@ bool psci_secondary_vm_handler(struct vcpu *vcpu, uint32_t func, uintreg_t arg0, + + target_vcpu = vm_get_vcpu(vm, target_vcpu_index); + ++ target_vcpu->psci_handler[0] = entry_point_address; ++ + if (vcpu_secondary_reset_and_start( + target_vcpu, entry_point_address, context_id)) { + #if SECURE_WORLD == 0 diff --git a/src/main.c b/src/main.c -index 5f30aac..7b7264f 100644 +index 3cc932e..2c3d1a5 100644 --- a/src/main.c +++ b/src/main.c @@ -7,6 +7,7 @@ @@ -28,14 +57,11 @@ index 5f30aac..7b7264f 100644 #include "hf/vm.h" /** -@@ -16,9 +17,31 @@ - struct vcpu *cpu_main(struct cpu *c) - { +@@ -18,6 +19,18 @@ struct vcpu *cpu_main(struct cpu *c) + struct vm *first_boot; struct vcpu *vcpu; -+ - #if SECURE_WORLD == 1 - struct vm *first_boot = vm_get_first_boot(); ++#if SECURE_WORLD == 1 + if (c->is_on == false) { + /* + * This is the PSCI warm reset path (svc_cpu_on_finish @@ -45,21 +71,25 @@ index 5f30aac..7b7264f 100644 + (void)cpu_on(c, ipa_init(0UL), 0UL); + dlog_verbose("%s: cpu mpidr 0x%x on\n", __func__, c->id); + } ++#endif + -+ /* -+ * If `vm_get_first_boot` returns a valid vm, the first partition to -+ * execute is in accordance to the boot-order field of the partition's -+ * manifest. -+ * Else, no partition has been configured with the "boot-order" field -+ * in its manifest, and primary vm should be booted. -+ */ -+ if (!first_boot) { -+ first_boot = vm_find(HF_PRIMARY_VM_ID); + /* + * This returns the PVM in the normal worls and the first + * booted Secure Partition in the secure world. +@@ -26,6 +39,13 @@ struct vcpu *cpu_main(struct cpu *c) + + vcpu = vm_get_vcpu(first_boot, cpu_index(c)); + ++ if (vcpu->psci_handler[0].ipa) { ++ struct vcpu_locked vcpu_locked = vcpu_lock(vcpu); ++ ++ vcpu_on(vcpu_locked, vcpu->psci_handler[0], 0); ++ vcpu_unlock(&vcpu_locked); + } + - vcpu = vm_get_vcpu(first_boot, cpu_index(c)); - #else - vcpu = vm_get_vcpu(vm_find(HF_PRIMARY_VM_ID), cpu_index(c)); + vcpu->cpu = c; + + arch_cpu_init(); -- -2.26.2 +2.29.2 diff --git a/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0003-FF-A-Respond-to-PSCI_CPU_OFF-from-SPMD.patch b/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0003-FF-A-Respond-to-PSCI_CPU_OFF-from-SPMD.patch index 83aeca37..87f2a43b 100644 --- a/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0003-FF-A-Respond-to-PSCI_CPU_OFF-from-SPMD.patch +++ b/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0003-FF-A-Respond-to-PSCI_CPU_OFF-from-SPMD.patch @@ -1,10 +1,10 @@ -Upstream-Status: Pending [Not submitted to upstream yet] +Upstream-Status: Pending [https://review.trustedfirmware.org/c/hafnium/hafnium/+/6011/29] Signed-off-by: Arunachalam Ganapathy -From 66d7628fea54dd7a25d25a13eb4f732c0a3428d0 Mon Sep 17 00:00:00 2001 +From 6a836b380265876a12b2edfb7f013523af89e754 Mon Sep 17 00:00:00 2001 From: Max Shvetsov Date: Fri, 18 Sep 2020 13:52:20 +0100 -Subject: [PATCH 3/4] FF-A: Respond to PSCI_CPU_OFF from SPMD. +Subject: [PATCH 4/5] FF-A: Respond to PSCI_CPU_OFF from SPMD. At run-time when a PSCI call is made from NWd, the corresponding SPMD PM hooks gets called and is eventually routed to the SPMC. This change @@ -13,12 +13,13 @@ conveyed from SPMD to SPMC such as core suspend, core off. Change-Id: Id288e26d9fbb8328acc71f5cf68c39e095a0e3da Signed-off-by: Max Shvetsov +Signed-off-by: Olivier Deprez --- - src/arch/aarch64/hypervisor/handler.c | 40 ++++++++++++++++++++++++++- - 1 file changed, 39 insertions(+), 1 deletion(-) + src/arch/aarch64/hypervisor/handler.c | 49 +++++++++++++++++++++++++-- + 1 file changed, 47 insertions(+), 2 deletions(-) diff --git a/src/arch/aarch64/hypervisor/handler.c b/src/arch/aarch64/hypervisor/handler.c -index c10f77e..95d6a18 100644 +index b33298c..43a1404 100644 --- a/src/arch/aarch64/hypervisor/handler.c +++ b/src/arch/aarch64/hypervisor/handler.c @@ -13,6 +13,7 @@ @@ -29,59 +30,86 @@ index c10f77e..95d6a18 100644 #include "hf/api.h" #include "hf/check.h" -@@ -478,6 +479,41 @@ static bool ffa_handler(struct ffa_value *args, struct vcpu *current, +@@ -261,6 +262,7 @@ static void set_virtual_interrupt_current(bool enable) + } #if SECURE_WORLD == 1 - -+/** -+ * Returns true if the message is sent directly from SPMD to SPMC. -+ */ -+static bool is_spmd_message(const uint64_t arg) -+{ -+ return (((arg & 0xFFFF) == get_ffa_id()) && -+ (((arg >> 16) & 0xFFFF) == SPMD_ID)); -+} ++ + static bool sp_boot_next(struct vcpu *current, struct vcpu **next, + struct ffa_value *ffa_ret) + { +@@ -303,6 +305,41 @@ out: + vm_unlock(¤t_vm_locked); + return ret; + } + +/** + * Handle special direct messages from SPMD to SPMC. For now related to power + * management only. + */ -+static bool spmd_handler(struct ffa_value *ret) ++static bool spmd_handler(struct ffa_value *args, struct vcpu *current) +{ -+ if (!is_spmd_message(ret->arg1)) { ++ ffa_vm_id_t spmc_ffa_id = arch_other_world_get_ffa_id(); ++ ffa_vm_id_t sender = ffa_msg_send_sender(*args); ++ ffa_vm_id_t receiver = ffa_msg_send_receiver(*args); ++ ffa_vm_id_t current_vm_id = current->vm->id; ++ ++ if (!((sender == SPMD_ID) && (receiver == spmc_ffa_id) && ++ (current_vm_id == HF_OTHER_WORLD_ID))) { + return false; + } + -+ dlog_verbose("%s Handling direct PSCI calls from SPMD\n", __func__); -+ -+ switch (ret->arg3) { ++ switch (args->arg3) { + case PSCI_CPU_OFF: -+ ret->func = FFA_MSG_SEND_DIRECT_RESP_32; -+ ret->arg1 = (get_ffa_id() << 16) | SPMD_ID; -+ ret->arg2 = 0U; ++ dlog_verbose("%s cpu off notification\n", __func__); ++ args->func = FFA_MSG_SEND_DIRECT_RESP_32; ++ args->arg1 = ((uint64_t)spmc_ffa_id << 16) | SPMD_ID; ++ args->arg2 = 0U; ++ ++ cpu_off(current->cpu); + break; + default: -+ dlog_verbose("Following message not handled %#x\n", ret->arg3); ++ dlog_verbose("%s message not handled %#x\n", __func__, ++ args->arg3); + return false; + } + + return true; +} + + #endif + /** - * Called to switch to the other world and handle FF-A calls from it. Returns - * when it is ready to run a secure partition again. -@@ -510,7 +546,9 @@ static void other_world_switch_loop(struct vcpu *other_world_vcpu, +@@ -461,11 +498,17 @@ static bool ffa_handler(struct ffa_value *args, struct vcpu *current, + (args->arg4 >> 16) & 0xffff, + current); + return true; +- case FFA_MSG_SEND_DIRECT_REQ_32: ++ case FFA_MSG_SEND_DIRECT_REQ_32: { ++#if SECURE_WORLD == 1 ++ if (spmd_handler(args, current)) { ++ return true; ++ } ++#endif + *args = api_ffa_msg_send_direct_req( + ffa_msg_send_sender(*args), + ffa_msg_send_receiver(*args), *args, current, next); + return true; ++ } + case FFA_MSG_SEND_DIRECT_RESP_32: + *args = api_ffa_msg_send_direct_resp( + ffa_msg_send_sender(*args), +@@ -510,7 +553,9 @@ static void other_world_switch_loop(struct vcpu *other_world_vcpu, * the result of the call back to EL3 unless the API handler * sets *next to something different. */ - if (!ffa_handler(&other_world_args, other_world_vcpu, next)) { + -+ if (!spmd_handler(&other_world_args) && ++ if (!spmd_handler(&other_world_args, other_world_vcpu) && + !ffa_handler(&other_world_args, other_world_vcpu, next)) { other_world_args.func = SMCCC_ERROR_UNKNOWN; } } -- -2.26.2 +2.29.2 diff --git a/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0004-tc0-Add-Theodul-DSU-support.patch b/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0004-tc0-Add-Theodul-DSU-support.patch new file mode 100644 index 00000000..4c0b5dd0 --- /dev/null +++ b/meta-arm-bsp/recipes-bsp/hafnium/files/tc0/0004-tc0-Add-Theodul-DSU-support.patch @@ -0,0 +1,30 @@ +From e8042fda56aa470cdda723757a957a81cd95dde8 Mon Sep 17 00:00:00 2001 +From: Arunachalam Ganapathy +Date: Tue, 2 Feb 2021 12:12:32 +0000 +Subject: [PATCH] tc0: Add Theodul DSU support + +Signed-off-by: Arunachalam Ganapathy +Upstream-Status: Pending [Not submitted to upstream yet] +Change-Id: I4a9b7e4350410fdacccd8c12ff03a61b7e64e98b +--- + project/reference/BUILD.gn | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/project/reference/BUILD.gn b/project/reference/BUILD.gn +index 5596009..ffcaab7 100644 +--- a/project/reference/BUILD.gn ++++ b/project/reference/BUILD.gn +@@ -159,8 +159,8 @@ aarch64_toolchains("secure_tc0") { + gic_version = 3 + gicd_base_address = "0x30000000" + gicr_base_address = "0x30140000" +- heap_pages = 60 +- max_cpus = 4 ++ heap_pages = 80 ++ max_cpus = 8 + max_vms = 16 + toolchain_args = { + secure_world = "1" +-- +2.29.2 + diff --git a/meta-arm-bsp/recipes-bsp/hafnium/hafnium-tc0.inc b/meta-arm-bsp/recipes-bsp/hafnium/hafnium-tc0.inc index 51747cea..9f14f738 100644 --- a/meta-arm-bsp/recipes-bsp/hafnium/hafnium-tc0.inc +++ b/meta-arm-bsp/recipes-bsp/hafnium/hafnium-tc0.inc @@ -1,7 +1,7 @@ # TC0 specific configuration -# Intermediate SHA with 2.4 baseline version -SRCREV = "ee68c5494dea5c5a59aa02af46b35ab3d949672e" +# Intermediate SHA with 2.4 baseline version, required for OP-TEE SEL1 support +SRCREV = "fe7f737ec20add15d49c587ebeb55f7ea0118226" PV = "2.4+git${SRCPV}" FILESEXTRAPATHS_prepend_tc0 := "${THISDIR}/files/tc0:" @@ -10,6 +10,7 @@ SRC_URI_append = " \ file://0001-FF-A-Register-secondary-core-entry-point-at-SPMC-ini.patch \ file://0002-FF-A-Cold-boot-and-wake-up-from-suspend.patch \ file://0003-FF-A-Respond-to-PSCI_CPU_OFF-from-SPMD.patch \ + file://0004-tc0-Add-Theodul-DSU-support.patch \ " COMPATIBLE_MACHINE = "tc0" diff --git a/meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-tc0.inc b/meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-tc0.inc index cacdca83..7d71a577 100644 --- a/meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-tc0.inc +++ b/meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-tc0.inc @@ -1,5 +1,9 @@ # TC0 specific SCP configuration +# Intermediate SHA with 2.7 baseline version, required for Theodul DSU +SRCREV = "bc35f4fd2d5e93c77effdeba43c98ddd5038de96" +PV = "2.7+git${SRCPV}" + COMPATIBLE_MACHINE = "tc0" SCP_PLATFORM = "tc0" diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-tc0.inc b/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-tc0.inc index bb12ba41..20b52e9d 100644 --- a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-tc0.inc +++ b/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-tc0.inc @@ -1,7 +1,9 @@ # TC0 specific TFA configuration -# Intermediate SHA with 2.4 baseline version, required for OP-TEE SP -SRCREV_tfa = "b153ce0391012e9228b807815a65fa0dc514cf77" +# Intermediate SHA with 2.4 baseline version, required for Theodul DSU +# --- This SRC_URI will be removed once below SRCREV_tfa gets merged to TF-A master +SRC_URI = "git://git.trustedfirmware.org/TF-A/trusted-firmware-a.git;protocol=https;branch=integration;name=tfa" +SRCREV_tfa = "9bc3007d3bb9363dbd5f6655d2b17d599e22bac4" PV = "2.4+git${SRCPV}" DEPENDS += "scp-firmware" diff --git a/meta-arm-bsp/recipes-security/optee/files/optee-os/tc0/0009-plat-totalcompute-add-Theodul-DSU-support.patch b/meta-arm-bsp/recipes-security/optee/files/optee-os/tc0/0009-plat-totalcompute-add-Theodul-DSU-support.patch new file mode 100644 index 00000000..e52a9d0c --- /dev/null +++ b/meta-arm-bsp/recipes-security/optee/files/optee-os/tc0/0009-plat-totalcompute-add-Theodul-DSU-support.patch @@ -0,0 +1,93 @@ +Upstream-Status: Pending [Not submitted to upstream yet] +Signed-off-by: Arunachalam Ganapathy + +From 3563e39d66404ff2415d29c4018757a85cd0ad97 Mon Sep 17 00:00:00 2001 +From: Arunachalam Ganapathy +Date: Wed, 13 Jan 2021 13:49:54 +0000 +Subject: [PATCH 1/3] plat-totalcompute: add Theodul DSU support + +- Change CPU count from 4 to 8 +- Set heap size to 128K +- In debug print, change EMSG to DMSG + +Change-Id: Ic426f5e08ac4e7ce1be37333486c75a3228e3415 +Signed-off-by: Arunachalam Ganapathy +--- + core/arch/arm/mm/mobj_ffa.c | 2 +- + core/arch/arm/plat-totalcompute/conf.mk | 4 +++- + core/arch/arm/plat-totalcompute/optee_manifest.dts | 2 +- + core/arch/arm/plat-totalcompute/tc0_spmc_pm.c | 10 +++++++++- + 4 files changed, 14 insertions(+), 4 deletions(-) + +diff --git a/core/arch/arm/mm/mobj_ffa.c b/core/arch/arm/mm/mobj_ffa.c +index 8e334f04..500404c3 100644 +--- a/core/arch/arm/mm/mobj_ffa.c ++++ b/core/arch/arm/mm/mobj_ffa.c +@@ -381,7 +381,7 @@ struct mobj *mobj_ffa_get_by_cookie(uint64_t cookie, + if (mf) + DMSG("cookie %#"PRIx64" resurrecting", cookie); + if (!mf) { +- EMSG("Populating mobj from rx buffer\n"); ++ DMSG("Populating mobj from rx: %#"PRIx64"", cookie); + mf = thread_spmc_populate_mobj_from_rx(cookie); + } + #endif +diff --git a/core/arch/arm/plat-totalcompute/conf.mk b/core/arch/arm/plat-totalcompute/conf.mk +index d330eb92..c35437aa 100644 +--- a/core/arch/arm/plat-totalcompute/conf.mk ++++ b/core/arch/arm/plat-totalcompute/conf.mk +@@ -22,7 +22,9 @@ platform-aflags-debug-info = -gdwarf-2 + endif + + ifeq ($(PLATFORM_FLAVOR),tc0) +-CFG_TEE_CORE_NB_CORE = 4 ++CFG_TEE_CORE_NB_CORE = 8 ++ ++CFG_CORE_HEAP_SIZE ?= 131072 + + ifeq ($(CFG_CORE_SEL1_SPMC),y) + CFG_TZDRAM_START ?= 0xfd000000 +diff --git a/core/arch/arm/plat-totalcompute/optee_manifest.dts b/core/arch/arm/plat-totalcompute/optee_manifest.dts +index 4e60cbe1..60cb5957 100644 +--- a/core/arch/arm/plat-totalcompute/optee_manifest.dts ++++ b/core/arch/arm/plat-totalcompute/optee_manifest.dts +@@ -18,7 +18,7 @@ + ffa-version = <0x00010000>; /* 31:16 - Major, 15:0 - Minor */ + uuid = <0x486178e0 0xe7f811e3 0xbc5e0002 0xa5d5c51b>; + id = <1>; +- execution-ctx-count = <4>; ++ execution-ctx-count = <8>; + exception-level = <2>; /* S-EL1 */ + execution-state = <0>; /* AARCH64 */ + load-address = <0xfd280000>; +diff --git a/core/arch/arm/plat-totalcompute/tc0_spmc_pm.c b/core/arch/arm/plat-totalcompute/tc0_spmc_pm.c +index 8e59a8cc..3fb32823 100644 +--- a/core/arch/arm/plat-totalcompute/tc0_spmc_pm.c ++++ b/core/arch/arm/plat-totalcompute/tc0_spmc_pm.c +@@ -17,7 +17,11 @@ static const uint64_t core_clus_aff_array[] = { + 0x0000, /* Cluster 0 Cpu 0 */ + 0x0001, /* Cluster 0 Cpu 1 */ + 0x0002, /* Cluster 0 Cpu 2 */ +- 0x0003 /* Cluster 0 Cpu 3 */ ++ 0x0003, /* Cluster 0 Cpu 3 */ ++ 0x0004, /* Cluster 0 Cpu 4 */ ++ 0x0005, /* Cluster 0 Cpu 5 */ ++ 0x0006, /* Cluster 0 Cpu 6 */ ++ 0x0007 /* Cluster 0 Cpu 7 */ + }; + + void ffa_secondary_cpu_boot_req(vaddr_t secondary_ep, uint64_t cookie) +@@ -38,6 +42,10 @@ void ffa_secondary_cpu_boot_req(vaddr_t secondary_ep, uint64_t cookie) + /* Create an mpidr from core_clus_aff_array */ + a1 |= core_clus_aff_array[cnt] << aff_shift; + ++ /* Ignore current cpu */ ++ if (a1 == mpidr) ++ continue; ++ + /* Invoke the PSCI_CPU_ON_SMC64 function */ + ret = thread_smc(PSCI_CPU_ON_SMC64, a1, secondary_ep, cookie); + +-- +2.29.2 + diff --git a/meta-arm-bsp/recipes-security/optee/files/optee-os/tc0/0010-WIP-OP-TEE-SP-declare-device-regions-in-manifest.patch b/meta-arm-bsp/recipes-security/optee/files/optee-os/tc0/0010-WIP-OP-TEE-SP-declare-device-regions-in-manifest.patch new file mode 100644 index 00000000..fbc51618 --- /dev/null +++ b/meta-arm-bsp/recipes-security/optee/files/optee-os/tc0/0010-WIP-OP-TEE-SP-declare-device-regions-in-manifest.patch @@ -0,0 +1,47 @@ +Upstream-Status: Pending [Not submitted to upstream yet] +Signed-off-by: Arunachalam Ganapathy + +From fd325f731da694057a2738411faa2ccbeea71778 Mon Sep 17 00:00:00 2001 +From: Olivier Deprez +Date: Thu, 3 Dec 2020 22:29:37 +0100 +Subject: [PATCH 2/3] WIP OP-TEE SP declare device regions in manifest + +Secure Partitions must declare peripherals they access such +that the SPMC maps IO regions in SP's Stage-2 translation +regime. OP-TEE currently directly accesses the GIC Distributor +and the UART0 peripheral hence declare those device regions in +OP-TEE's manifest. + +Change-Id: I1fda46e5cf17153dfaf499042dceff325729d041 +Signed-off-by: Olivier Deprez +--- + .../arch/arm/plat-totalcompute/optee_manifest.dts | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +diff --git a/core/arch/arm/plat-totalcompute/optee_manifest.dts b/core/arch/arm/plat-totalcompute/optee_manifest.dts +index 60cb5957..cdc28d98 100644 +--- a/core/arch/arm/plat-totalcompute/optee_manifest.dts ++++ b/core/arch/arm/plat-totalcompute/optee_manifest.dts +@@ -30,4 +30,19 @@ + + /* Boot protocol */ + gp-register-num = <0x0>; ++ ++ device-regions { ++ compatible = "arm,ffa-manifest-device-regions"; ++ uart0 { ++ base-address = <0x00000000 0x7ff70000>; ++ pages-count = <1>; ++ attributes = <0x3>; /* read-write */ ++ }; ++ ++ gicd { ++ base-address = <0x00000000 0x30000000>; ++ pages-count = <16>; ++ attributes = <0x3>; /* read-write */ ++ }; ++ }; + }; +-- +2.29.2 + diff --git a/meta-arm-bsp/recipes-security/optee/files/optee-os/tc0/0011-WIP-OP-TEE-SP-use-CNTVCT-in-place-of-CNTVCT.patch b/meta-arm-bsp/recipes-security/optee/files/optee-os/tc0/0011-WIP-OP-TEE-SP-use-CNTVCT-in-place-of-CNTVCT.patch new file mode 100644 index 00000000..323ace76 --- /dev/null +++ b/meta-arm-bsp/recipes-security/optee/files/optee-os/tc0/0011-WIP-OP-TEE-SP-use-CNTVCT-in-place-of-CNTVCT.patch @@ -0,0 +1,173 @@ +Upstream-Status: Pending [Not submitted to upstream yet] +Signed-off-by: Arunachalam Ganapathy + +From 85110aaf32b6d3b19fdca301f7a07a4683825802 Mon Sep 17 00:00:00 2001 +From: Olivier Deprez +Date: Thu, 3 Dec 2020 17:33:09 +0100 +Subject: [PATCH 3/3] WIP OP-TEE SP use CNTVCT in place of CNTVCT + +The SPMC forbids access to the physical counter and Secure Partitions +shall rather access the virtual counter (for which virtual offset is +set to 0). More information at [1]. + +[1] https://lists.trustedfirmware.org/pipermail/hafnium/2020-December/000092.html + +Change-Id: Ifab083921fa12154cafc31bd80ce91fa8da0db82 +Signed-off-by: Olivier Deprez +--- + core/arch/arm/include/arm64.h | 2 +- + core/arch/arm/include/kernel/delay.h | 4 ++-- + core/arch/arm/kernel/arm32_sysreg.txt | 2 +- + core/arch/arm/kernel/tee_time_arm_cntpct.c | 4 ++-- + core/kernel/tee_ta_manager.c | 4 ++-- + lib/libutee/arch/arm/arm32_user_sysreg.txt | 2 +- + lib/libutee/include/arm64_user_sysreg.h | 2 +- + lib/libutils/ext/ftrace/ftrace.c | 6 +++--- + 8 files changed, 13 insertions(+), 13 deletions(-) + +diff --git a/core/arch/arm/include/arm64.h b/core/arch/arm/include/arm64.h +index 40a6b113..46c5431f 100644 +--- a/core/arch/arm/include/arm64.h ++++ b/core/arch/arm/include/arm64.h +@@ -322,7 +322,7 @@ DEFINE_U32_REG_READ_FUNC(sctlr_el1) + + /* ARM Generic timer functions */ + DEFINE_REG_READ_FUNC_(cntfrq, uint32_t, cntfrq_el0) +-DEFINE_REG_READ_FUNC_(cntpct, uint64_t, cntpct_el0) ++DEFINE_REG_READ_FUNC_(cntvct, uint64_t, cntvct_el0) + DEFINE_REG_READ_FUNC_(cntkctl, uint32_t, cntkctl_el1) + DEFINE_REG_WRITE_FUNC_(cntkctl, uint32_t, cntkctl_el1) + DEFINE_REG_READ_FUNC_(cntps_ctl, uint32_t, cntps_ctl_el1) +diff --git a/core/arch/arm/include/kernel/delay.h b/core/arch/arm/include/kernel/delay.h +index 00510059..34629ba2 100644 +--- a/core/arch/arm/include/kernel/delay.h ++++ b/core/arch/arm/include/kernel/delay.h +@@ -44,12 +44,12 @@ static inline uint64_t arm_cnt_us2cnt(uint32_t us) + + static inline uint64_t timeout_init_us(uint32_t us) + { +- return read_cntpct() + arm_cnt_us2cnt(us); ++ return read_cntvct() + arm_cnt_us2cnt(us); + } + + static inline bool timeout_elapsed(uint64_t expire) + { +- return read_cntpct() > expire; ++ return read_cntvct() > expire; + } + + #endif +diff --git a/core/arch/arm/kernel/arm32_sysreg.txt b/core/arch/arm/kernel/arm32_sysreg.txt +index b69ebcb4..155773f8 100644 +--- a/core/arch/arm/kernel/arm32_sysreg.txt ++++ b/core/arch/arm/kernel/arm32_sysreg.txt +@@ -117,7 +117,7 @@ VBAR c12 0 c0 0 RW Vector Base Address Register + + @ B8.2 Generic Timer registers summary + CNTFRQ c14 0 c0 0 RW Counter Frequency register +-CNTPCT - 0 c14 - RO Physical Count register ++CNTVCT - 1 c14 - RO Physical Count register + CNTKCTL c14 0 c1 0 RW Timer PL1 Control register + CNTP_TVAL c14 0 c2 0 RW PL1 Physical TimerValue register + CNTP_CTL c14 0 c2 1 RW PL1 Physical Timer Control register +diff --git a/core/arch/arm/kernel/tee_time_arm_cntpct.c b/core/arch/arm/kernel/tee_time_arm_cntpct.c +index 3c41e4c2..04e673d9 100644 +--- a/core/arch/arm/kernel/tee_time_arm_cntpct.c ++++ b/core/arch/arm/kernel/tee_time_arm_cntpct.c +@@ -16,7 +16,7 @@ + + static TEE_Result arm_cntpct_get_sys_time(TEE_Time *time) + { +- uint64_t cntpct = read_cntpct(); ++ uint64_t cntpct = read_cntvct(); + uint32_t cntfrq = read_cntfrq(); + + time->seconds = cntpct / cntfrq; +@@ -49,7 +49,7 @@ REGISTER_TIME_SOURCE(arm_cntpct_time_source) + + void plat_prng_add_jitter_entropy(enum crypto_rng_src sid, unsigned int *pnum) + { +- uint64_t tsc = read_cntpct(); ++ uint64_t tsc = read_cntvct(); + int bytes = 0, n; + static uint8_t first, bits; + static uint16_t acc; +diff --git a/core/kernel/tee_ta_manager.c b/core/kernel/tee_ta_manager.c +index 46632ce7..4153fbd8 100644 +--- a/core/kernel/tee_ta_manager.c ++++ b/core/kernel/tee_ta_manager.c +@@ -923,7 +923,7 @@ static void gprof_update_session_utime(bool suspend, struct ts_session *s, + static void tee_ta_update_session_utime(bool suspend) + { + struct ts_session *s = ts_get_current_session(); +- uint64_t now = read_cntpct(); ++ uint64_t now = read_cntvct(); + + gprof_update_session_utime(suspend, s, now); + } +@@ -947,7 +947,7 @@ static void ftrace_update_times(bool suspend) + uint64_t now = 0; + uint32_t i = 0; + +- now = read_cntpct(); ++ now = read_cntvct(); + + fbuf = s->fbuf; + if (!fbuf) +diff --git a/lib/libutee/arch/arm/arm32_user_sysreg.txt b/lib/libutee/arch/arm/arm32_user_sysreg.txt +index 8baefd10..13e28f20 100644 +--- a/lib/libutee/arch/arm/arm32_user_sysreg.txt ++++ b/lib/libutee/arch/arm/arm32_user_sysreg.txt +@@ -10,4 +10,4 @@ + + @ B8.2 Generic Timer registers summary + CNTFRQ c14 0 c0 0 RW Counter Frequency register +-CNTPCT - 0 c14 - RO Physical Count register ++CNTVCT - 1 c14 - RO Physical Count register +diff --git a/lib/libutee/include/arm64_user_sysreg.h b/lib/libutee/include/arm64_user_sysreg.h +index db4ee188..722a08c9 100644 +--- a/lib/libutee/include/arm64_user_sysreg.h ++++ b/lib/libutee/include/arm64_user_sysreg.h +@@ -31,7 +31,7 @@ static inline __noprof void write_##reg(type val) \ + + /* ARM Generic timer functions */ + DEFINE_REG_READ_FUNC_(cntfrq, uint32_t, cntfrq_el0) +-DEFINE_REG_READ_FUNC_(cntpct, uint64_t, cntpct_el0) ++DEFINE_REG_READ_FUNC_(cntvct, uint64_t, cntvct_el0) + DEFINE_REG_READ_FUNC_(tpidr_el0, uint64_t, tpidr_el0) + DEFINE_REG_WRITE_FUNC_(tpidr_el0, uint64_t, tpidr_el0) + +diff --git a/lib/libutils/ext/ftrace/ftrace.c b/lib/libutils/ext/ftrace/ftrace.c +index 101aa594..637cbd19 100644 +--- a/lib/libutils/ext/ftrace/ftrace.c ++++ b/lib/libutils/ext/ftrace/ftrace.c +@@ -165,7 +165,7 @@ void __noprof ftrace_enter(unsigned long pc, unsigned long *lr) + + if (fbuf->ret_idx < FTRACE_RETFUNC_DEPTH) { + fbuf->ret_stack[fbuf->ret_idx] = *lr; +- fbuf->begin_time[fbuf->ret_idx] = read_cntpct(); ++ fbuf->begin_time[fbuf->ret_idx] = read_cntvct(); + fbuf->ret_idx++; + } else { + /* +@@ -269,7 +269,7 @@ unsigned long __noprof ftrace_return(void) + dur_loc = curr_buf - (fbuf->ret_idx + + (2 * sizeof(unsigned long)) + 11); + ftrace_duration(dur_loc, fbuf->begin_time[fbuf->ret_idx], +- read_cntpct()); ++ read_cntvct()); + } else { + bool full = false; + +@@ -297,7 +297,7 @@ unsigned long __noprof ftrace_return(void) + dur_loc = curr_buf - fbuf->ret_idx - 6; + ftrace_duration(dur_loc, + fbuf->begin_time[fbuf->ret_idx], +- read_cntpct()); ++ read_cntvct()); + } + } + +-- +2.29.2 + diff --git a/meta-arm-bsp/recipes-security/optee/optee-os-tc0.inc b/meta-arm-bsp/recipes-security/optee/optee-os-tc0.inc index fff6381e..1b03a354 100644 --- a/meta-arm-bsp/recipes-security/optee/optee-os-tc0.inc +++ b/meta-arm-bsp/recipes-security/optee/optee-os-tc0.inc @@ -22,6 +22,9 @@ SRC_URI_append = " \ file://0006-plat-totalcompute-Add-support-for-S-EL2-SPMC.patch \ file://0007-plat-totalcompute-add-optee-manifest-file-and-sp-lay.patch \ file://0008-plat-totalcompute-define-tzdram-start-address-for-S-.patch \ + file://0009-plat-totalcompute-add-Theodul-DSU-support.patch \ + file://0010-WIP-OP-TEE-SP-declare-device-regions-in-manifest.patch \ + file://0011-WIP-OP-TEE-SP-use-CNTVCT-in-place-of-CNTVCT.patch \ " COMPATIBLE_MACHINE = "tc0"