diff --git a/meta-arm-bsp/recipes-kernel/linux/files/fvp-base-arm32/fvp-base-arm32-dts.patch b/meta-arm-bsp/recipes-kernel/linux/files/fvp-base-arm32/fvp-base-arm32-dts.patch
index de7b7522..b21b4c0e 100644
--- a/meta-arm-bsp/recipes-kernel/linux/files/fvp-base-arm32/fvp-base-arm32-dts.patch
+++ b/meta-arm-bsp/recipes-kernel/linux/files/fvp-base-arm32/fvp-base-arm32-dts.patch
@@ -112,34 +112,7 @@ index 000000000000..f4601c7f99f8
 +                       next-level-cache = <&L2_0>;
 +               };
 +
-+               CPU1:cpu@1 {
-+                       device_type = "cpu";
-+                       compatible = "arm,armv8";
-+                       reg = <0x0 0x1>;
-+                       enable-method = "psci";
-+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-+                       next-level-cache = <&L2_0>;
-+               };
-+
-+               CPU2:cpu@2 {
-+                       device_type = "cpu";
-+                       compatible = "arm,armv8";
-+                       reg = <0x0 0x2>;
-+                       enable-method = "psci";
-+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-+                       next-level-cache = <&L2_0>;
-+               };
-+
-+               CPU3:cpu@3 {
-+                       device_type = "cpu";
-+                       compatible = "arm,armv8";
-+                       reg = <0x0 0x3>;
-+                       enable-method = "psci";
-+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-+                       next-level-cache = <&L2_0>;
-+               };
-+
-+               CPU4:cpu@100 {
++               CPU1:cpu@100 {
 +                       device_type = "cpu";
 +                       compatible = "arm,armv8";
 +                       reg = <0x0 0x100>;
@@ -148,28 +121,55 @@ index 000000000000..f4601c7f99f8
 +                       next-level-cache = <&L2_0>;
 +               };
 +
-+               CPU5:cpu@101 {
++               CPU2:cpu@200 {
 +                       device_type = "cpu";
 +                       compatible = "arm,armv8";
-+                       reg = <0x0 0x101>;
++                       reg = <0x0 0x200>;
 +                       enable-method = "psci";
 +                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 +                       next-level-cache = <&L2_0>;
 +               };
 +
-+               CPU6:cpu@102 {
++               CPU3:cpu@300 {
 +                       device_type = "cpu";
 +                       compatible = "arm,armv8";
-+                       reg = <0x0 0x102>;
++                       reg = <0x0 0x300>;
 +                       enable-method = "psci";
 +                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 +                       next-level-cache = <&L2_0>;
 +               };
 +
-+               CPU7:cpu@103 {
++               CPU4:cpu@10000 {
 +                       device_type = "cpu";
 +                       compatible = "arm,armv8";
-+                       reg = <0x0 0x103>;
++                       reg = <0x0 0x10000>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               CPU5:cpu@10100 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x10100>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               CPU6:cpu@10200 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x10200>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               CPU7:cpu@10300 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x10300>;
 +                       enable-method = "psci";
 +                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 +                       next-level-cache = <&L2_0>;
diff --git a/meta-arm-bsp/recipes-kernel/linux/files/fvp-base-dts.patch b/meta-arm-bsp/recipes-kernel/linux/files/fvp-base-dts.patch
index 47bc8e1c..fcd8f702 100644
--- a/meta-arm-bsp/recipes-kernel/linux/files/fvp-base-dts.patch
+++ b/meta-arm-bsp/recipes-kernel/linux/files/fvp-base-dts.patch
@@ -110,34 +110,7 @@ index 000000000000..f4601c7f99f8
 +                       next-level-cache = <&L2_0>;
 +               };
 +
-+               CPU1:cpu@1 {
-+                       device_type = "cpu";
-+                       compatible = "arm,armv8";
-+                       reg = <0x0 0x1>;
-+                       enable-method = "psci";
-+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-+                       next-level-cache = <&L2_0>;
-+               };
-+
-+               CPU2:cpu@2 {
-+                       device_type = "cpu";
-+                       compatible = "arm,armv8";
-+                       reg = <0x0 0x2>;
-+                       enable-method = "psci";
-+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-+                       next-level-cache = <&L2_0>;
-+               };
-+
-+               CPU3:cpu@3 {
-+                       device_type = "cpu";
-+                       compatible = "arm,armv8";
-+                       reg = <0x0 0x3>;
-+                       enable-method = "psci";
-+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-+                       next-level-cache = <&L2_0>;
-+               };
-+
-+               CPU4:cpu@100 {
++               CPU1:cpu@100 {
 +                       device_type = "cpu";
 +                       compatible = "arm,armv8";
 +                       reg = <0x0 0x100>;
@@ -146,28 +119,55 @@ index 000000000000..f4601c7f99f8
 +                       next-level-cache = <&L2_0>;
 +               };
 +
-+               CPU5:cpu@101 {
++               CPU2:cpu@200 {
 +                       device_type = "cpu";
 +                       compatible = "arm,armv8";
-+                       reg = <0x0 0x101>;
++                       reg = <0x0 0x200>;
 +                       enable-method = "psci";
 +                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 +                       next-level-cache = <&L2_0>;
 +               };
 +
-+               CPU6:cpu@102 {
++               CPU3:cpu@300 {
 +                       device_type = "cpu";
 +                       compatible = "arm,armv8";
-+                       reg = <0x0 0x102>;
++                       reg = <0x0 0x300>;
 +                       enable-method = "psci";
 +                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 +                       next-level-cache = <&L2_0>;
 +               };
 +
-+               CPU7:cpu@103 {
++               CPU4:cpu@10000 {
 +                       device_type = "cpu";
 +                       compatible = "arm,armv8";
-+                       reg = <0x0 0x103>;
++                       reg = <0x0 0x10000>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               CPU5:cpu@10100 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x10100>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               CPU6:cpu@10200 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x10200>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               CPU7:cpu@10300 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x10300>;
 +                       enable-method = "psci";
 +                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 +                       next-level-cache = <&L2_0>;