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https://git.yoctoproject.org/meta-arm
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0faf5c4d37
Update the OP-TEE OS build logic to detect `MACHINE_FEATURES` and append the appropriate `arm64-platform-cpuarch` value to `EXTRA_OEMAKE`, instead of hard-coding `cortex-a35`. This change ensures that when `MACHINE_FEATURES` includes `cortexa320`, the OP-TEE build receives the matching `core-arch` flag, while maintaining `cortex-a35` as the default. The new Corstone-1000 variant with Cortex-A320 replaces the original GIC-400 (v2) interrupt controller with a GIC-600, which is architecturally compliant with GICv3. Since OP-TEE already provides a generic GICv3 driver, only minimal platform changes are needed to expose the updated register map and initialize the GICv3 interface. Signed-off-by: Hugues KAMBA MPIANA <hugues.kambampiana@arm.com> Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>
26 lines
854 B
PHP
26 lines
854 B
PHP
FILESEXTRAPATHS:prepend := "${THISDIR}/files/optee-os/corstone1000:"
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SRC_URI:append = " \
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file://0001-plat-corstone1000-Add-Cortex-A320-support.patch \
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"
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COMPATIBLE_MACHINE = "corstone1000"
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OPTEEMACHINE = "corstone1000"
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# Enable optee memory layout and boot logs
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EXTRA_OEMAKE += " CFG_TEE_CORE_LOG_LEVEL=4"
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# default disable latency benchmarks (over all OP-TEE layers)
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EXTRA_OEMAKE += " CFG_TEE_BENCHMARK=n"
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EXTRA_OEMAKE += " CFG_CORE_SEL1_SPMC=y CFG_CORE_FFA=y"
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EXTRA_OEMAKE += " CFG_WITH_SP=y"
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EXTRA_OEMAKE:append:corstone1000-fvp = "${@bb.utils.contains('MACHINE_FEATURES', 'corstone1000_fvp_smp', ' CFG_TEE_CORE_NB_CORE=4', '', d)}"
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# Override OP-TEE OS ARM64 core architecture based on MACHINE_FEATURES
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CPUARCH = "cortex-a35"
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CPUARCH:cortexa320 = "cortex-a320"
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EXTRA_OEMAKE:append:corstone1000 = " arm64-platform-cpuarch=${CPUARCH}"
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