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python3-grpcio: Upgrade to 1.56.0

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Signed-off-by: Khem Raj <raj.khem@gmail.com>
This commit is contained in:
Khem Raj
2023-07-04 17:00:24 -07:00
parent 01b51cff3b
commit 1b58a4e64f
5 changed files with 27 additions and 92 deletions
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37
meta-python/recipes-devtools/python/python3-grpcio/abseil-ppc-fixes.patch
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@@ -18,8 +18,6 @@ Upstream-Status: Pending
absl/debugging/internal/stacktrace_config.h | 2 +-
4 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/absl/base/internal/unscaledcycleclock.cc b/absl/base/internal/unscaledcycleclock.cc
index b1c396c..d62bfd6 100644
--- a/absl/base/internal/unscaledcycleclock.cc
+++ b/absl/base/internal/unscaledcycleclock.cc
@@ -20,7 +20,7 @@
@@ -40,22 +38,6 @@ index b1c396c..d62bfd6 100644
int64_t UnscaledCycleClock::Now() {
#ifdef __GLIBC__
diff --git a/absl/base/internal/unscaledcycleclock.h b/absl/base/internal/unscaledcycleclock.h
index 2cbeae3..683a5ef 100644
--- a/absl/base/internal/unscaledcycleclock.h
+++ b/absl/base/internal/unscaledcycleclock.h
@@ -46,7 +46,8 @@
// The following platforms have an implementation of a hardware counter.
#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) || \
- defined(__powerpc__) || defined(__ppc__) || defined(__riscv) || \
+ ((defined(__powerpc__) || defined(__ppc__)) && defined(__GLIBC__)) || \
+ defined(__riscv) || \
defined(_M_IX86) || (defined(_M_X64) && !defined(_M_ARM64EC))
#define ABSL_HAVE_UNSCALED_CYCLECLOCK_IMPLEMENTATION 1
#else
diff --git a/absl/debugging/internal/examine_stack.cc b/absl/debugging/internal/examine_stack.cc
index 5bdd341..a784e0d 100644
--- a/absl/debugging/internal/examine_stack.cc
+++ b/absl/debugging/internal/examine_stack.cc
@@ -33,6 +33,10 @@
@@ -69,7 +51,7 @@ index 5bdd341..a784e0d 100644
#include "absl/base/attributes.h"
#include "absl/base/internal/raw_logging.h"
#include "absl/base/macros.h"
@@ -174,8 +178,10 @@ void* GetProgramCounter(void* const vuc) {
@@ -174,8 +178,10 @@ void* GetProgramCounter(void* const vuc)
return reinterpret_cast<void*>(context->uc_mcontext.pc);
#elif defined(__powerpc64__)
return reinterpret_cast<void*>(context->uc_mcontext.gp_regs[32]);
@@ -81,8 +63,6 @@ index 5bdd341..a784e0d 100644
#elif defined(__riscv)
return reinterpret_cast<void*>(context->uc_mcontext.__gregs[REG_PC]);
#elif defined(__s390__) && !defined(__s390x__)
diff --git a/absl/debugging/internal/stacktrace_config.h b/absl/debugging/internal/stacktrace_config.h
index 3929b1b..23d5e50 100644
--- a/absl/debugging/internal/stacktrace_config.h
+++ b/absl/debugging/internal/stacktrace_config.h
@@ -60,7 +60,7 @@
@@ -94,6 +74,15 @@ index 3929b1b..23d5e50 100644
#define ABSL_STACKTRACE_INL_HEADER \
"absl/debugging/internal/stacktrace_powerpc-inl.inc"
#elif defined(__aarch64__)
--
2.25.1
--- a/absl/base/internal/unscaledcycleclock_config.h
+++ b/absl/base/internal/unscaledcycleclock_config.h
@@ -21,7 +21,8 @@
// The following platforms have an implementation of a hardware counter.
#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) || \
- defined(__powerpc__) || defined(__ppc__) || defined(__riscv) || \
+ ((defined(__powerpc__) || defined(__ppc__)) && defined(__GLIBC__)) || \
+ defined(__riscv) || \
defined(_M_IX86) || (defined(_M_X64) && !defined(_M_ARM64EC))
#define ABSL_HAVE_UNSCALED_CYCLECLOCK_IMPLEMENTATION 1
#else