mirrors/meta-openembedded
1
0
Fork 0
mirror of https://github.com/openembedded/meta-openembedded.git synced 2026-06-11 04:49:58 +00:00
Code Issues Projects Releases Wiki Activity

gcc-4.5: Move SRCREV to latest on gcc-4_5-branch

Browse Source 
This brings in bug fixes for details clone gcc tree and
checkout gcc-4_5-branch and then

git log aab79458fc2025967f9a35aef4e7c0094c63d38e..1b523ca2a20934d1c52cb3a54b634ac4441debdf

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
This commit is contained in:
Khem Raj
2012-03-08 06:20:05 +00:00
committed by Koen Kooi
parent 112c1f86fc
commit 896bbc379a
5 changed files with 384 additions and 470 deletions
Download Patch File Download Diff File Expand all files Collapse all files
meta-oe/recipes-devtools/gcc/gcc-4.5.inc
+2 -3
View File
@@ -14,7 +14,7 @@ LIC_FILES_CHKSUM = "file://COPYING;md5=59530bdf33659b29e73d4adb9f9f6552 \
PV = "4.5" PV = "4.5"
PR = "r46" PR = "r47"
# BINV should be incremented after updating to a revision # BINV should be incremented after updating to a revision
# after a minor gcc release (e.g. 4.5.1 or 4.5.2) has been made # after a minor gcc release (e.g. 4.5.1 or 4.5.2) has been made
@@ -23,7 +23,7 @@ PR = "r46"
# which will be next minor release and so on. # which will be next minor release and so on.
BINV = "${PV}.4" BINV = "${PV}.4"
SRCREV = "181733" SRCREV = "184907"
BRANCH = "gcc-4_5-branch" BRANCH = "gcc-4_5-branch"
PR_append = "+svnr${SRCPV}" PR_append = "+svnr${SRCPV}"
@@ -80,7 +80,6 @@ SRC_URI = "svn://gcc.gnu.org/svn/gcc/branches;module=${BRANCH};proto=http \
file://linaro/gcc-4.5-linaro-r99344.patch \ file://linaro/gcc-4.5-linaro-r99344.patch \
file://linaro/gcc-4.5-linaro-r99345.patch \ file://linaro/gcc-4.5-linaro-r99345.patch \
file://linaro/gcc-4.5-linaro-r99346.patch \ file://linaro/gcc-4.5-linaro-r99346.patch \
file://linaro/gcc-4.5-linaro-r99347.patch \
file://linaro/gcc-4.5-linaro-r99348.patch \ file://linaro/gcc-4.5-linaro-r99348.patch \
file://linaro/gcc-4.5-linaro-r99349.patch \ file://linaro/gcc-4.5-linaro-r99349.patch \
file://linaro/gcc-4.5-linaro-r99351.patch \ file://linaro/gcc-4.5-linaro-r99351.patch \
meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99347.patch
-83
View File
@@ -1,83 +0,0 @@
Merge from Sourcery G++ 4.4:
2010-02-15 Julian Brown <julian@codesourcery.com>
Issue #7486
gcc/
* config/arm/arm.c (arm_libcall_uses_aapcs_base)
(arm_init_cumulative_args): Use correct ABI for double-precision
helper functions in hard-float mode if only single-precision
arithmetic is supported in hardware.
2010-07-26 Julian Brown <julian@codesourcery.com>
Backport from FSF mainline:
Julian Brown <julian@codesourcery.com>
=== modified file 'gcc/config/arm/arm.c'
--- old/gcc/config/arm/arm.c 2010-08-13 10:30:35 +0000
+++ new/gcc/config/arm/arm.c 2010-08-13 10:43:42 +0000
@@ -3453,6 +3453,28 @@
convert_optab_libfunc (sfix_optab, DImode, SFmode));
add_libcall (libcall_htab,
convert_optab_libfunc (ufix_optab, DImode, SFmode));
+
+ /* Values from double-precision helper functions are returned in core
+ registers if the selected core only supports single-precision
+ arithmetic, even if we are using the hard-float ABI. */
+ if (TARGET_VFP)
+ {
+ add_libcall (libcall_htab, optab_libfunc (add_optab, DFmode));
+ add_libcall (libcall_htab, optab_libfunc (sdiv_optab, DFmode));
+ add_libcall (libcall_htab, optab_libfunc (smul_optab, DFmode));
+ add_libcall (libcall_htab, optab_libfunc (neg_optab, DFmode));
+ add_libcall (libcall_htab, optab_libfunc (sub_optab, DFmode));
+ add_libcall (libcall_htab, optab_libfunc (eq_optab, DFmode));
+ add_libcall (libcall_htab, optab_libfunc (lt_optab, DFmode));
+ add_libcall (libcall_htab, optab_libfunc (le_optab, DFmode));
+ add_libcall (libcall_htab, optab_libfunc (ge_optab, DFmode));
+ add_libcall (libcall_htab, optab_libfunc (gt_optab, DFmode));
+ add_libcall (libcall_htab, optab_libfunc (unord_optab, DFmode));
+ add_libcall (libcall_htab,
+ convert_optab_libfunc (sext_optab, DFmode, SFmode));
+ add_libcall (libcall_htab,
+ convert_optab_libfunc (trunc_optab, SFmode, DFmode));
+ }
}
return libcall && htab_find (libcall_htab, libcall) != NULL;
@@ -4406,6 +4428,31 @@
if (arm_libcall_uses_aapcs_base (libname))
pcum->pcs_variant = ARM_PCS_AAPCS;
+ /* We must pass arguments to double-precision helper functions in core
+ registers if we only have hardware support for single-precision
+ arithmetic, even if we are using the hard-float ABI. */
+ if (TARGET_VFP
+ && (rtx_equal_p (libname, optab_libfunc (add_optab, DFmode))
+ || rtx_equal_p (libname, optab_libfunc (sdiv_optab, DFmode))
+ || rtx_equal_p (libname, optab_libfunc (smul_optab, DFmode))
+ || rtx_equal_p (libname, optab_libfunc (neg_optab, DFmode))
+ || rtx_equal_p (libname, optab_libfunc (sub_optab, DFmode))
+ || rtx_equal_p (libname, optab_libfunc (eq_optab, DFmode))
+ || rtx_equal_p (libname, optab_libfunc (lt_optab, DFmode))
+ || rtx_equal_p (libname, optab_libfunc (le_optab, DFmode))
+ || rtx_equal_p (libname, optab_libfunc (ge_optab, DFmode))
+ || rtx_equal_p (libname, optab_libfunc (gt_optab, DFmode))
+ || rtx_equal_p (libname, optab_libfunc (unord_optab, DFmode))
+ || rtx_equal_p (libname, convert_optab_libfunc (sext_optab,
+ DFmode, SFmode))
+ || rtx_equal_p (libname, convert_optab_libfunc (trunc_optab,
+ SFmode, DFmode))
+ || rtx_equal_p (libname, convert_optab_libfunc (sfix_optab,
+ SImode, DFmode))
+ || rtx_equal_p (libname, convert_optab_libfunc (ufix_optab,
+ SImode, DFmode))))
+ pcum->pcs_variant = ARM_PCS_AAPCS;
+
pcum->aapcs_ncrn = pcum->aapcs_next_ncrn = 0;
pcum->aapcs_reg = NULL_RTX;
pcum->aapcs_partial = 0;
meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99380.patch
+252 -264
View File
File diff suppressed because it is too large Load Diff
meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99424.patch
+83 -73
View File
@@ -66,8 +66,10 @@
* gcc.target/i386/volatile-bitfields-2.c: New. * gcc.target/i386/volatile-bitfields-2.c: New.
=== modified file 'gcc/calls.c' === modified file 'gcc/calls.c'
--- old/gcc/calls.c 2010-10-04 00:50:43 +0000 Index: gcc-4_5-branch/gcc/calls.c
+++ new/gcc/calls.c 2010-11-04 12:43:52 +0000 ===================================================================
--- gcc-4_5-branch.orig/gcc/calls.c 2012-03-06 13:05:56.524590011 -0800
+++ gcc-4_5-branch/gcc/calls.c 2012-03-06 13:36:10.276677792 -0800
@@ -878,7 +878,7 @@ @@ -878,7 +878,7 @@
int bitsize = MIN (bytes * BITS_PER_UNIT, BITS_PER_WORD); int bitsize = MIN (bytes * BITS_PER_UNIT, BITS_PER_WORD);
@@ -77,10 +79,10 @@
word_mode, word_mode); word_mode, word_mode);
/* There is no need to restrict this code to loading items /* There is no need to restrict this code to loading items
Index: gcc-4_5-branch/gcc/common.opt
=== modified file 'gcc/common.opt' ===================================================================
--- old/gcc/common.opt 2010-07-29 14:59:35 +0000 --- gcc-4_5-branch.orig/gcc/common.opt 2012-03-06 13:05:48.400589618 -0800
+++ new/gcc/common.opt 2010-11-04 12:43:52 +0000 +++ gcc-4_5-branch/gcc/common.opt 2012-03-06 13:36:35.608679018 -0800
@@ -613,6 +613,10 @@ @@ -613,6 +613,10 @@
Common Report Var(flag_loop_block) Optimization Common Report Var(flag_loop_block) Optimization
Enable Loop Blocking transformation Enable Loop Blocking transformation
@@ -92,10 +94,10 @@
fguess-branch-probability fguess-branch-probability
Common Report Var(flag_guess_branch_prob) Optimization Common Report Var(flag_guess_branch_prob) Optimization
Enable guessing of branch probabilities Enable guessing of branch probabilities
Index: gcc-4_5-branch/gcc/config/h8300/h8300.c
=== modified file 'gcc/config/h8300/h8300.c' ===================================================================
--- old/gcc/config/h8300/h8300.c 2010-04-02 18:54:46 +0000 --- gcc-4_5-branch.orig/gcc/config/h8300/h8300.c 2012-03-06 11:53:30.000000000 -0800
+++ new/gcc/config/h8300/h8300.c 2010-11-04 12:43:52 +0000 +++ gcc-4_5-branch/gcc/config/h8300/h8300.c 2012-03-06 13:36:35.528679014 -0800
@@ -403,6 +403,10 @@ @@ -403,6 +403,10 @@
restore er6 though, so bump up the cost. */ restore er6 though, so bump up the cost. */
h8300_move_ratio = 6; h8300_move_ratio = 6;
@@ -107,10 +109,10 @@
} }
/* Implement REG_CLASS_FROM_LETTER. /* Implement REG_CLASS_FROM_LETTER.
Index: gcc-4_5-branch/gcc/config/m32c/m32c.c
=== modified file 'gcc/config/m32c/m32c.c' ===================================================================
--- old/gcc/config/m32c/m32c.c 2009-10-22 18:46:26 +0000 --- gcc-4_5-branch.orig/gcc/config/m32c/m32c.c 2012-03-06 11:53:16.000000000 -0800
+++ new/gcc/config/m32c/m32c.c 2010-11-04 12:43:52 +0000 +++ gcc-4_5-branch/gcc/config/m32c/m32c.c 2012-03-06 13:36:35.488679012 -0800
@@ -428,6 +428,10 @@ @@ -428,6 +428,10 @@
if (TARGET_A24) if (TARGET_A24)
@@ -122,12 +124,12 @@
} }
/* Defining data structures for per-function information */ /* Defining data structures for per-function information */
Index: gcc-4_5-branch/gcc/config/rx/rx.c
=== modified file 'gcc/config/rx/rx.c' ===================================================================
--- old/gcc/config/rx/rx.c 2010-07-27 14:39:53 +0000 --- gcc-4_5-branch.orig/gcc/config/rx/rx.c 2012-03-06 11:53:17.000000000 -0800
+++ new/gcc/config/rx/rx.c 2010-11-04 12:43:52 +0000 +++ gcc-4_5-branch/gcc/config/rx/rx.c 2012-03-06 13:36:35.508679013 -0800
@@ -2187,6 +2187,14 @@ @@ -2417,6 +2417,14 @@
} return ! TYPE_PACKED (record_type);
} }
+static void +static void
@@ -139,11 +141,11 @@
+} +}
+ +
static bool /* Returns true if X a legitimate constant for an immediate
rx_allocate_stack_slots_for_args (void) operand on the RX. X is already known to satisfy CONSTANT_P. */
@@ -2759,6 +2767,9 @@ @@ -2794,6 +2802,9 @@
#undef TARGET_CC_MODES_COMPATIBLE #undef TARGET_PROMOTE_FUNCTION_MODE
#define TARGET_CC_MODES_COMPATIBLE rx_cc_modes_compatible #define TARGET_PROMOTE_FUNCTION_MODE rx_promote_function_mode
+#undef TARGET_OPTION_OVERRIDE +#undef TARGET_OPTION_OVERRIDE
+#define TARGET_OPTION_OVERRIDE rx_option_override +#define TARGET_OPTION_OVERRIDE rx_option_override
@@ -151,10 +153,10 @@
struct gcc_target targetm = TARGET_INITIALIZER; struct gcc_target targetm = TARGET_INITIALIZER;
/* #include "gt-rx.h" */ /* #include "gt-rx.h" */
Index: gcc-4_5-branch/gcc/config/sh/sh.c
=== modified file 'gcc/config/sh/sh.c' ===================================================================
--- old/gcc/config/sh/sh.c 2010-05-05 21:12:17 +0000 --- gcc-4_5-branch.orig/gcc/config/sh/sh.c 2012-03-06 11:53:20.000000000 -0800
+++ new/gcc/config/sh/sh.c 2010-11-04 12:43:52 +0000 +++ gcc-4_5-branch/gcc/config/sh/sh.c 2012-03-06 13:36:35.516679013 -0800
@@ -950,6 +950,10 @@ @@ -950,6 +950,10 @@
if (sh_fixed_range_str) if (sh_fixed_range_str)
@@ -166,10 +168,10 @@
} }
/* Print the operand address in x to the stream. */ /* Print the operand address in x to the stream. */
Index: gcc-4_5-branch/gcc/doc/invoke.texi
=== modified file 'gcc/doc/invoke.texi' ===================================================================
--- old/gcc/doc/invoke.texi 2010-10-04 00:50:43 +0000 --- gcc-4_5-branch.orig/gcc/doc/invoke.texi 2012-03-06 13:05:56.988590034 -0800
+++ new/gcc/doc/invoke.texi 2010-11-04 12:43:52 +0000 +++ gcc-4_5-branch/gcc/doc/invoke.texi 2012-03-06 13:36:36.048679039 -0800
@@ -922,7 +922,7 @@ @@ -922,7 +922,7 @@
-fargument-noalias-global -fargument-noalias-anything @gol -fargument-noalias-global -fargument-noalias-anything @gol
-fleading-underscore -ftls-model=@var{model} @gol -fleading-underscore -ftls-model=@var{model} @gol
@@ -213,10 +215,10 @@
@end table @end table
@c man end @c man end
Index: gcc-4_5-branch/gcc/expmed.c
=== modified file 'gcc/expmed.c' ===================================================================
--- old/gcc/expmed.c 2010-10-04 00:50:43 +0000 --- gcc-4_5-branch.orig/gcc/expmed.c 2012-03-06 13:05:56.876590028 -0800
+++ new/gcc/expmed.c 2010-11-04 12:43:52 +0000 +++ gcc-4_5-branch/gcc/expmed.c 2012-03-06 13:36:35.104678993 -0800
@@ -47,7 +47,7 @@ @@ -47,7 +47,7 @@
static rtx extract_fixed_bit_field (enum machine_mode, rtx, static rtx extract_fixed_bit_field (enum machine_mode, rtx,
unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
@@ -458,10 +460,10 @@
bitsdone += thissize; bitsdone += thissize;
/* Shift this part into place for the result. */ /* Shift this part into place for the result. */
Index: gcc-4_5-branch/gcc/expr.c
=== modified file 'gcc/expr.c' ===================================================================
--- old/gcc/expr.c 2010-10-04 00:50:43 +0000 --- gcc-4_5-branch.orig/gcc/expr.c 2012-03-06 13:05:57.720590069 -0800
+++ new/gcc/expr.c 2010-11-04 12:43:52 +0000 +++ gcc-4_5-branch/gcc/expr.c 2012-03-06 13:40:14.504689612 -0800
@@ -1749,7 +1749,7 @@ @@ -1749,7 +1749,7 @@
&& (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode)) && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT, tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
@@ -498,7 +500,16 @@
NULL_RTX, copy_mode, copy_mode)); NULL_RTX, copy_mode, copy_mode));
} }
@@ -2970,7 +2970,7 @@ @@ -2291,7 +2291,7 @@
xbitpos for the destination store (right justified). */
store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD, word_mode,
extract_bit_field (src_word, bitsize,
- bitpos % BITS_PER_WORD, 1,
+ bitpos % BITS_PER_WORD, 1, false,
NULL_RTX, word_mode, word_mode));
}
@@ -3075,7 +3075,7 @@
} }
return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
@@ -507,7 +518,7 @@
} }
/* A subroutine of emit_move_insn_1. Yet another lowpart generator. /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
@@ -4233,6 +4233,13 @@ @@ -4338,6 +4338,13 @@
to_rtx = expand_normal (tem); to_rtx = expand_normal (tem);
@@ -521,7 +532,7 @@
if (offset != 0) if (offset != 0)
{ {
enum machine_mode address_mode; enum machine_mode address_mode;
@@ -5993,6 +6000,12 @@ @@ -6106,6 +6113,12 @@
mode = DECL_MODE (field); mode = DECL_MODE (field);
else if (DECL_MODE (field) == BLKmode) else if (DECL_MODE (field) == BLKmode)
blkmode_bitfield = true; blkmode_bitfield = true;
@@ -534,7 +545,7 @@
*punsignedp = DECL_UNSIGNED (field); *punsignedp = DECL_UNSIGNED (field);
} }
@@ -8848,6 +8861,7 @@ @@ -8978,6 +8991,7 @@
HOST_WIDE_INT bitsize, bitpos; HOST_WIDE_INT bitsize, bitpos;
tree offset; tree offset;
int volatilep = 0, must_force_mem; int volatilep = 0, must_force_mem;
@@ -542,7 +553,7 @@
tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset, tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
&mode1, &unsignedp, &volatilep, true); &mode1, &unsignedp, &volatilep, true);
rtx orig_op0, memloc; rtx orig_op0, memloc;
@@ -8857,6 +8871,11 @@ @@ -8987,6 +9001,11 @@
infinitely recurse. */ infinitely recurse. */
gcc_assert (tem != exp); gcc_assert (tem != exp);
@@ -554,7 +565,7 @@
/* If TEM's type is a union of variable size, pass TARGET to the inner /* If TEM's type is a union of variable size, pass TARGET to the inner
computation, since it will need a temporary and TARGET is known computation, since it will need a temporary and TARGET is known
to have to do. This occurs in unchecked conversion in Ada. */ to have to do. This occurs in unchecked conversion in Ada. */
@@ -8873,6 +8892,14 @@ @@ -9003,6 +9022,14 @@
|| modifier == EXPAND_STACK_PARM) || modifier == EXPAND_STACK_PARM)
? modifier : EXPAND_NORMAL); ? modifier : EXPAND_NORMAL);
@@ -569,7 +580,7 @@
mode2 mode2
= CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0); = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
@@ -8998,6 +9025,9 @@ @@ -9128,6 +9155,9 @@
&& GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
&& modifier != EXPAND_CONST_ADDRESS && modifier != EXPAND_CONST_ADDRESS
&& modifier != EXPAND_INITIALIZER) && modifier != EXPAND_INITIALIZER)
@@ -579,7 +590,7 @@
/* If the field isn't aligned enough to fetch as a memref, /* If the field isn't aligned enough to fetch as a memref,
fetch it as a bit field. */ fetch it as a bit field. */
|| (mode1 != BLKmode || (mode1 != BLKmode
@@ -9058,7 +9088,7 @@ @@ -9188,7 +9218,7 @@
if (MEM_P (op0) && REG_P (XEXP (op0, 0))) if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
@@ -588,11 +599,11 @@
(modifier == EXPAND_STACK_PARM (modifier == EXPAND_STACK_PARM
? NULL_RTX : target), ? NULL_RTX : target),
ext_mode, ext_mode); ext_mode, ext_mode);
Index: gcc-4_5-branch/gcc/expr.h
=== modified file 'gcc/expr.h' ===================================================================
--- old/gcc/expr.h 2010-02-19 09:53:51 +0000 --- gcc-4_5-branch.orig/gcc/expr.h 2012-03-06 11:53:32.000000000 -0800
+++ new/gcc/expr.h 2010-11-04 12:43:52 +0000 +++ gcc-4_5-branch/gcc/expr.h 2012-03-06 13:05:59.668590163 -0800
@@ -802,7 +802,7 @@ @@ -804,7 +804,7 @@
extern void store_bit_field (rtx, unsigned HOST_WIDE_INT, extern void store_bit_field (rtx, unsigned HOST_WIDE_INT,
unsigned HOST_WIDE_INT, enum machine_mode, rtx); unsigned HOST_WIDE_INT, enum machine_mode, rtx);
extern rtx extract_bit_field (rtx, unsigned HOST_WIDE_INT, extern rtx extract_bit_field (rtx, unsigned HOST_WIDE_INT,
@@ -601,11 +612,11 @@
enum machine_mode, enum machine_mode); enum machine_mode, enum machine_mode);
extern rtx extract_low_bits (enum machine_mode, enum machine_mode, rtx); extern rtx extract_low_bits (enum machine_mode, enum machine_mode, rtx);
extern rtx expand_mult (enum machine_mode, rtx, rtx, rtx, int); extern rtx expand_mult (enum machine_mode, rtx, rtx, rtx, int);
Index: gcc-4_5-branch/gcc/fold-const.c
=== modified file 'gcc/fold-const.c' ===================================================================
--- old/gcc/fold-const.c 2010-10-04 00:50:43 +0000 --- gcc-4_5-branch.orig/gcc/fold-const.c 2012-03-06 13:05:56.880590028 -0800
+++ new/gcc/fold-const.c 2010-11-04 12:43:52 +0000 +++ gcc-4_5-branch/gcc/fold-const.c 2012-03-06 13:36:03.276677454 -0800
@@ -4208,11 +4208,16 @@ @@ -4215,11 +4215,16 @@
/* See if we can find a mode to refer to this field. We should be able to, /* See if we can find a mode to refer to this field. We should be able to,
but fail if we can't. */ but fail if we can't. */
@@ -627,11 +638,11 @@
if (nmode == VOIDmode) if (nmode == VOIDmode)
return 0; return 0;
Index: gcc-4_5-branch/gcc/stmt.c
=== modified file 'gcc/stmt.c' ===================================================================
--- old/gcc/stmt.c 2010-08-13 11:53:46 +0000 --- gcc-4_5-branch.orig/gcc/stmt.c 2012-03-06 13:05:54.568589917 -0800
+++ new/gcc/stmt.c 2010-11-04 12:43:52 +0000 +++ gcc-4_5-branch/gcc/stmt.c 2012-03-06 13:36:34.948678986 -0800
@@ -1751,7 +1751,7 @@ @@ -1754,7 +1754,7 @@
xbitpos for the destination store (right justified). */ xbitpos for the destination store (right justified). */
store_bit_field (dst, bitsize, xbitpos % BITS_PER_WORD, word_mode, store_bit_field (dst, bitsize, xbitpos % BITS_PER_WORD, word_mode,
extract_bit_field (src, bitsize, extract_bit_field (src, bitsize,
@@ -640,10 +651,10 @@
NULL_RTX, word_mode, word_mode)); NULL_RTX, word_mode, word_mode));
} }
Index: gcc-4_5-branch/gcc/testsuite/gcc.target/i386/volatile-bitfields-1.c
=== added file 'gcc/testsuite/gcc.target/i386/volatile-bitfields-1.c' ===================================================================
--- old/gcc/testsuite/gcc.target/i386/volatile-bitfields-1.c 1970-01-01 00:00:00 +0000 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ new/gcc/testsuite/gcc.target/i386/volatile-bitfields-1.c 2010-11-04 12:43:52 +0000 +++ gcc-4_5-branch/gcc/testsuite/gcc.target/i386/volatile-bitfields-1.c 2012-03-06 13:05:59.672590164 -0800
@@ -0,0 +1,17 @@ @@ -0,0 +1,17 @@
+/* { dg-do compile } */ +/* { dg-do compile } */
+/* { dg-options "-O2 -fstrict-volatile-bitfields" } */ +/* { dg-options "-O2 -fstrict-volatile-bitfields" } */
@@ -662,10 +673,10 @@
+} +}
+ +
+/* { dg-final { scan-assembler "mov(b|zbl).*bits" } } */ +/* { dg-final { scan-assembler "mov(b|zbl).*bits" } } */
Index: gcc-4_5-branch/gcc/testsuite/gcc.target/i386/volatile-bitfields-2.c
=== added file 'gcc/testsuite/gcc.target/i386/volatile-bitfields-2.c' ===================================================================
--- old/gcc/testsuite/gcc.target/i386/volatile-bitfields-2.c 1970-01-01 00:00:00 +0000 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ new/gcc/testsuite/gcc.target/i386/volatile-bitfields-2.c 2010-11-04 12:43:52 +0000 +++ gcc-4_5-branch/gcc/testsuite/gcc.target/i386/volatile-bitfields-2.c 2012-03-06 13:05:59.672590164 -0800
@@ -0,0 +1,17 @@ @@ -0,0 +1,17 @@
+/* { dg-do compile } */ +/* { dg-do compile } */
+/* { dg-options "-O2 -fno-strict-volatile-bitfields" } */ +/* { dg-options "-O2 -fno-strict-volatile-bitfields" } */
@@ -684,4 +695,3 @@
+} +}
+ +
+/* { dg-final { scan-assembler "movl.*bits" } } */ +/* { dg-final { scan-assembler "movl.*bits" } } */
meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99475.patch
+46 -46
View File
@@ -99,7 +99,7 @@
Index: gcc-4_5-branch/gcc/config/arm/arm-ldmstm.ml Index: gcc-4_5-branch/gcc/config/arm/arm-ldmstm.ml
=================================================================== ===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gcc-4_5-branch/gcc/config/arm/arm-ldmstm.ml 2011-06-16 18:46:26.355282255 -0700 +++ gcc-4_5-branch/gcc/config/arm/arm-ldmstm.ml 2012-03-06 12:51:19.980547615 -0800
@@ -0,0 +1,333 @@ @@ -0,0 +1,333 @@
+(* Auto-generate ARM ldm/stm patterns +(* Auto-generate ARM ldm/stm patterns
+ Copyright (C) 2010 Free Software Foundation, Inc. + Copyright (C) 2010 Free Software Foundation, Inc.
@@ -436,8 +436,8 @@ Index: gcc-4_5-branch/gcc/config/arm/arm-ldmstm.ml
+ patterns (); + patterns ();
Index: gcc-4_5-branch/gcc/config/arm/arm-protos.h Index: gcc-4_5-branch/gcc/config/arm/arm-protos.h
=================================================================== ===================================================================
--- gcc-4_5-branch.orig/gcc/config/arm/arm-protos.h 2011-06-16 18:46:18.000000000 -0700 --- gcc-4_5-branch.orig/gcc/config/arm/arm-protos.h 2012-03-06 12:47:54.000000000 -0800
+++ gcc-4_5-branch/gcc/config/arm/arm-protos.h 2011-06-16 18:46:26.355282255 -0700 +++ gcc-4_5-branch/gcc/config/arm/arm-protos.h 2012-03-06 12:51:19.980547615 -0800
@@ -99,14 +99,11 @@ @@ -99,14 +99,11 @@
extern int label_mentioned_p (rtx); extern int label_mentioned_p (rtx);
extern RTX_CODE minmax_code (rtx); extern RTX_CODE minmax_code (rtx);
@@ -460,8 +460,8 @@ Index: gcc-4_5-branch/gcc/config/arm/arm-protos.h
extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx, extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx,
Index: gcc-4_5-branch/gcc/config/arm/arm.c Index: gcc-4_5-branch/gcc/config/arm/arm.c
=================================================================== ===================================================================
--- gcc-4_5-branch.orig/gcc/config/arm/arm.c 2011-06-16 18:46:23.000000000 -0700 --- gcc-4_5-branch.orig/gcc/config/arm/arm.c 2012-03-06 12:47:56.000000000 -0800
+++ gcc-4_5-branch/gcc/config/arm/arm.c 2011-06-16 18:46:26.365282255 -0700 +++ gcc-4_5-branch/gcc/config/arm/arm.c 2012-03-06 12:51:19.988547639 -0800
@@ -753,6 +753,12 @@ @@ -753,6 +753,12 @@
"hi", "ls", "ge", "lt", "gt", "le", "al", "nv" "hi", "ls", "ge", "lt", "gt", "le", "al", "nv"
}; };
@@ -475,7 +475,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
#define ARM_LSL_NAME (TARGET_UNIFIED_ASM ? "lsl" : "asl") #define ARM_LSL_NAME (TARGET_UNIFIED_ASM ? "lsl" : "asl")
#define streq(string1, string2) (strcmp (string1, string2) == 0) #define streq(string1, string2) (strcmp (string1, string2) == 0)
@@ -9668,24 +9674,125 @@ @@ -9647,24 +9653,125 @@
return 0; return 0;
} }
@@ -612,7 +612,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
/* Loop over the operands and check that the memory references are /* Loop over the operands and check that the memory references are
suitable (i.e. immediate offsets from the same base register). At suitable (i.e. immediate offsets from the same base register). At
@@ -9723,32 +9830,30 @@ @@ -9702,32 +9809,30 @@
if (i == 0) if (i == 0)
{ {
base_reg = REGNO (reg); base_reg = REGNO (reg);
@@ -659,7 +659,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
} }
else else
/* Not a suitable memory address. */ /* Not a suitable memory address. */
@@ -9757,167 +9862,90 @@ @@ -9736,167 +9841,90 @@
/* All the useful information has now been extracted from the /* All the useful information has now been extracted from the
operands into unsorted_regs and unsorted_offsets; additionally, operands into unsorted_regs and unsorted_offsets; additionally,
@@ -888,7 +888,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
/* Loop over the operands and check that the memory references are /* Loop over the operands and check that the memory references are
suitable (i.e. immediate offsets from the same base register). At suitable (i.e. immediate offsets from the same base register). At
@@ -9952,32 +9980,32 @@ @@ -9931,32 +9959,32 @@
&& (GET_CODE (offset = XEXP (XEXP (operands[nops + i], 0), 1)) && (GET_CODE (offset = XEXP (XEXP (operands[nops + i], 0), 1))
== CONST_INT))) == CONST_INT)))
{ {
@@ -937,7 +937,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
} }
else else
/* Not a suitable memory address. */ /* Not a suitable memory address. */
@@ -9986,111 +10014,65 @@ @@ -9965,111 +9993,65 @@
/* All the useful information has now been extracted from the /* All the useful information has now been extracted from the
operands into unsorted_regs and unsorted_offsets; additionally, operands into unsorted_regs and unsorted_offsets; additionally,
@@ -1087,7 +1087,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
/* XScale has load-store double instructions, but they have stricter /* XScale has load-store double instructions, but they have stricter
alignment requirements than load-store multiple, so we cannot alignment requirements than load-store multiple, so we cannot
@@ -10127,18 +10109,10 @@ @@ -10106,18 +10088,10 @@
start_sequence (); start_sequence ();
for (i = 0; i < count; i++) for (i = 0; i < count; i++)
@@ -1109,7 +1109,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
seq = get_insns (); seq = get_insns ();
end_sequence (); end_sequence ();
@@ -10147,41 +10121,40 @@ @@ -10126,41 +10100,40 @@
} }
result = gen_rtx_PARALLEL (VOIDmode, result = gen_rtx_PARALLEL (VOIDmode,
@@ -1170,7 +1170,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
the pros/cons of ldm/stm usage for XScale. */ the pros/cons of ldm/stm usage for XScale. */
if (low_irq_latency || (arm_tune_xscale && count <= 2 && ! optimize_size)) if (low_irq_latency || (arm_tune_xscale && count <= 2 && ! optimize_size))
{ {
@@ -10190,18 +10163,10 @@ @@ -10169,18 +10142,10 @@
start_sequence (); start_sequence ();
for (i = 0; i < count; i++) for (i = 0; i < count; i++)
@@ -1192,7 +1192,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
seq = get_insns (); seq = get_insns ();
end_sequence (); end_sequence ();
@@ -10210,29 +10175,319 @@ @@ -10189,29 +10154,319 @@
} }
result = gen_rtx_PARALLEL (VOIDmode, result = gen_rtx_PARALLEL (VOIDmode,
@@ -1522,7 +1522,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
} }
int int
@@ -10268,20 +10523,21 @@ @@ -10247,20 +10502,21 @@
for (i = 0; in_words_to_go >= 2; i+=4) for (i = 0; in_words_to_go >= 2; i+=4)
{ {
if (in_words_to_go > 4) if (in_words_to_go > 4)
@@ -1554,8 +1554,8 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
dstbase, &dstoffset)); dstbase, &dstoffset));
Index: gcc-4_5-branch/gcc/config/arm/arm.h Index: gcc-4_5-branch/gcc/config/arm/arm.h
=================================================================== ===================================================================
--- gcc-4_5-branch.orig/gcc/config/arm/arm.h 2011-06-16 18:46:20.000000000 -0700 --- gcc-4_5-branch.orig/gcc/config/arm/arm.h 2012-03-06 12:47:55.000000000 -0800
+++ gcc-4_5-branch/gcc/config/arm/arm.h 2011-06-16 18:46:26.375282255 -0700 +++ gcc-4_5-branch/gcc/config/arm/arm.h 2012-03-06 12:51:19.988547639 -0800
@@ -1143,6 +1143,9 @@ @@ -1143,6 +1143,9 @@
((MODE) == TImode || (MODE) == EImode || (MODE) == OImode \ ((MODE) == TImode || (MODE) == EImode || (MODE) == OImode \
|| (MODE) == CImode || (MODE) == XImode) || (MODE) == CImode || (MODE) == XImode)
@@ -1577,8 +1577,8 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.h
#endif /* ! GCC_ARM_H */ #endif /* ! GCC_ARM_H */
Index: gcc-4_5-branch/gcc/config/arm/arm.md Index: gcc-4_5-branch/gcc/config/arm/arm.md
=================================================================== ===================================================================
--- gcc-4_5-branch.orig/gcc/config/arm/arm.md 2011-06-16 18:46:23.000000000 -0700 --- gcc-4_5-branch.orig/gcc/config/arm/arm.md 2012-03-06 12:47:56.000000000 -0800
+++ gcc-4_5-branch/gcc/config/arm/arm.md 2011-06-16 18:46:26.375282255 -0700 +++ gcc-4_5-branch/gcc/config/arm/arm.md 2012-03-06 12:51:19.992547622 -0800
@@ -6282,7 +6282,7 @@ @@ -6282,7 +6282,7 @@
;; load- and store-multiple insns ;; load- and store-multiple insns
@@ -1969,7 +1969,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.md
Index: gcc-4_5-branch/gcc/config/arm/ldmstm.md Index: gcc-4_5-branch/gcc/config/arm/ldmstm.md
=================================================================== ===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gcc-4_5-branch/gcc/config/arm/ldmstm.md 2011-06-16 18:46:26.375282255 -0700 +++ gcc-4_5-branch/gcc/config/arm/ldmstm.md 2012-03-06 12:51:19.992547622 -0800
@@ -0,0 +1,1191 @@ @@ -0,0 +1,1191 @@
+/* ARM ldm/stm instruction patterns. This file was automatically generated +/* ARM ldm/stm instruction patterns. This file was automatically generated
+ using arm-ldmstm.ml. Please do not edit manually. + using arm-ldmstm.ml. Please do not edit manually.
@@ -3164,8 +3164,8 @@ Index: gcc-4_5-branch/gcc/config/arm/ldmstm.md
+ +
Index: gcc-4_5-branch/gcc/config/arm/predicates.md Index: gcc-4_5-branch/gcc/config/arm/predicates.md
=================================================================== ===================================================================
--- gcc-4_5-branch.orig/gcc/config/arm/predicates.md 2011-06-16 18:46:18.000000000 -0700 --- gcc-4_5-branch.orig/gcc/config/arm/predicates.md 2012-03-06 12:47:54.000000000 -0800
+++ gcc-4_5-branch/gcc/config/arm/predicates.md 2011-06-16 18:46:26.375282255 -0700 +++ gcc-4_5-branch/gcc/config/arm/predicates.md 2012-03-06 12:51:19.992547622 -0800
@@ -211,6 +211,11 @@ @@ -211,6 +211,11 @@
(and (match_code "ior,xor,and") (and (match_code "ior,xor,and")
(match_test "mode == GET_MODE (op)"))) (match_test "mode == GET_MODE (op)")))
@@ -3314,8 +3314,8 @@ Index: gcc-4_5-branch/gcc/config/arm/predicates.md
return true; return true;
Index: gcc-4_5-branch/gcc/config/i386/i386.md Index: gcc-4_5-branch/gcc/config/i386/i386.md
=================================================================== ===================================================================
--- gcc-4_5-branch.orig/gcc/config/i386/i386.md 2011-06-16 18:46:21.000000000 -0700 --- gcc-4_5-branch.orig/gcc/config/i386/i386.md 2012-03-06 12:47:55.000000000 -0800
+++ gcc-4_5-branch/gcc/config/i386/i386.md 2011-06-16 18:46:26.385282255 -0700 +++ gcc-4_5-branch/gcc/config/i386/i386.md 2012-03-06 12:51:19.996547605 -0800
@@ -4960,6 +4960,7 @@ @@ -4960,6 +4960,7 @@
(set (match_operand:SSEMODEI24 2 "register_operand" "") (set (match_operand:SSEMODEI24 2 "register_operand" "")
(fix:SSEMODEI24 (match_dup 0)))] (fix:SSEMODEI24 (match_dup 0)))]
@@ -3324,7 +3324,7 @@ Index: gcc-4_5-branch/gcc/config/i386/i386.md
&& peep2_reg_dead_p (2, operands[0])" && peep2_reg_dead_p (2, operands[0])"
[(set (match_dup 2) (fix:SSEMODEI24 (match_dup 1)))] [(set (match_dup 2) (fix:SSEMODEI24 (match_dup 1)))]
"") "")
@@ -20057,15 +20058,14 @@ @@ -20089,15 +20090,14 @@
;; leal (%edx,%eax,4), %eax ;; leal (%edx,%eax,4), %eax
(define_peephole2 (define_peephole2
@@ -3345,7 +3345,7 @@ Index: gcc-4_5-branch/gcc/config/i386/i386.md
(clobber (reg:CC FLAGS_REG))])] (clobber (reg:CC FLAGS_REG))])]
"INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 3 "INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 3
/* Validate MODE for lea. */ /* Validate MODE for lea. */
@@ -20074,31 +20074,27 @@ @@ -20106,31 +20106,27 @@
|| GET_MODE (operands[0]) == HImode)) || GET_MODE (operands[0]) == HImode))
|| GET_MODE (operands[0]) == SImode || GET_MODE (operands[0]) == SImode
|| (TARGET_64BIT && GET_MODE (operands[0]) == DImode)) || (TARGET_64BIT && GET_MODE (operands[0]) == DImode))
@@ -3391,8 +3391,8 @@ Index: gcc-4_5-branch/gcc/config/i386/i386.md
Index: gcc-4_5-branch/gcc/genoutput.c Index: gcc-4_5-branch/gcc/genoutput.c
=================================================================== ===================================================================
--- gcc-4_5-branch.orig/gcc/genoutput.c 2011-06-16 17:59:04.000000000 -0700 --- gcc-4_5-branch.orig/gcc/genoutput.c 2012-03-06 11:53:32.000000000 -0800
+++ gcc-4_5-branch/gcc/genoutput.c 2011-06-16 18:46:26.385282255 -0700 +++ gcc-4_5-branch/gcc/genoutput.c 2012-03-06 12:51:20.000547582 -0800
@@ -266,6 +266,8 @@ @@ -266,6 +266,8 @@
printf (" %d,\n", d->strict_low); printf (" %d,\n", d->strict_low);
@@ -3404,8 +3404,8 @@ Index: gcc-4_5-branch/gcc/genoutput.c
printf(" },\n"); printf(" },\n");
Index: gcc-4_5-branch/gcc/genrecog.c Index: gcc-4_5-branch/gcc/genrecog.c
=================================================================== ===================================================================
--- gcc-4_5-branch.orig/gcc/genrecog.c 2011-06-16 17:59:04.000000000 -0700 --- gcc-4_5-branch.orig/gcc/genrecog.c 2012-03-06 11:53:32.000000000 -0800
+++ gcc-4_5-branch/gcc/genrecog.c 2011-06-16 18:46:26.395282255 -0700 +++ gcc-4_5-branch/gcc/genrecog.c 2012-03-06 12:51:20.000547582 -0800
@@ -1782,20 +1782,11 @@ @@ -1782,20 +1782,11 @@
int odepth = strlen (oldpos); int odepth = strlen (oldpos);
int ndepth = strlen (newpos); int ndepth = strlen (newpos);
@@ -3429,8 +3429,8 @@ Index: gcc-4_5-branch/gcc/genrecog.c
{ {
Index: gcc-4_5-branch/gcc/recog.c Index: gcc-4_5-branch/gcc/recog.c
=================================================================== ===================================================================
--- gcc-4_5-branch.orig/gcc/recog.c 2011-06-16 18:46:02.000000000 -0700 --- gcc-4_5-branch.orig/gcc/recog.c 2012-03-06 12:47:48.000000000 -0800
+++ gcc-4_5-branch/gcc/recog.c 2011-06-16 18:46:26.395282255 -0700 +++ gcc-4_5-branch/gcc/recog.c 2012-03-06 13:04:05.780584592 -0800
@@ -2082,6 +2082,7 @@ @@ -2082,6 +2082,7 @@
recog_data.operand_loc, recog_data.operand_loc,
recog_data.constraints, recog_data.constraints,
@@ -3508,7 +3508,7 @@ Index: gcc-4_5-branch/gcc/recog.c
gcc_assert (peep2_insn_data[ofs].insn != NULL_RTX); gcc_assert (peep2_insn_data[ofs].insn != NULL_RTX);
@@ -2996,12 +3006,8 @@ @@ -2997,12 +3007,8 @@
gcc_assert (from < MAX_INSNS_PER_PEEP2 + 1); gcc_assert (from < MAX_INSNS_PER_PEEP2 + 1);
gcc_assert (to < MAX_INSNS_PER_PEEP2 + 1); gcc_assert (to < MAX_INSNS_PER_PEEP2 + 1);
@@ -3523,17 +3523,17 @@ Index: gcc-4_5-branch/gcc/recog.c
gcc_assert (peep2_insn_data[from].insn != NULL_RTX); gcc_assert (peep2_insn_data[from].insn != NULL_RTX);
REG_SET_TO_HARD_REG_SET (live, peep2_insn_data[from].live_before); REG_SET_TO_HARD_REG_SET (live, peep2_insn_data[from].live_before);
@@ -3010,8 +3016,7 @@ @@ -3016,8 +3022,7 @@
{ *def_rec; def_rec++)
HARD_REG_SET this_live; SET_HARD_REG_BIT (live, DF_REF_REGNO (*def_rec));
- if (++from >= MAX_INSNS_PER_PEEP2 + 1) - if (++from >= MAX_INSNS_PER_PEEP2 + 1)
- from = 0; - from = 0;
+ from = peep2_buf_position (from + 1); + from = peep2_buf_position (from + 1);
gcc_assert (peep2_insn_data[from].insn != NULL_RTX); }
REG_SET_TO_HARD_REG_SET (this_live, peep2_insn_data[from].live_before);
IOR_HARD_REG_SET (live, this_live); cl = (class_str[0] == 'r' ? GENERAL_REGS
@@ -3104,19 +3109,234 @@ @@ -3107,19 +3112,234 @@
COPY_REG_SET (peep2_insn_data[MAX_INSNS_PER_PEEP2].live_before, live); COPY_REG_SET (peep2_insn_data[MAX_INSNS_PER_PEEP2].live_before, live);
} }
@@ -3771,7 +3771,7 @@ Index: gcc-4_5-branch/gcc/recog.c
df_analyze (); df_analyze ();
/* Initialize the regsets we're going to use. */ /* Initialize the regsets we're going to use. */
@@ -3126,214 +3346,59 @@ @@ -3129,214 +3349,59 @@
FOR_EACH_BB_REVERSE (bb) FOR_EACH_BB_REVERSE (bb)
{ {
@@ -4028,7 +4028,7 @@ Index: gcc-4_5-branch/gcc/recog.c
} }
} }
@@ -3341,7 +3406,7 @@ @@ -3344,7 +3409,7 @@
for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i) for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i)
BITMAP_FREE (peep2_insn_data[i].live_before); BITMAP_FREE (peep2_insn_data[i].live_before);
BITMAP_FREE (live); BITMAP_FREE (live);
@@ -4039,8 +4039,8 @@ Index: gcc-4_5-branch/gcc/recog.c
#endif /* HAVE_peephole2 */ #endif /* HAVE_peephole2 */
Index: gcc-4_5-branch/gcc/recog.h Index: gcc-4_5-branch/gcc/recog.h
=================================================================== ===================================================================
--- gcc-4_5-branch.orig/gcc/recog.h 2011-06-16 17:59:04.000000000 -0700 --- gcc-4_5-branch.orig/gcc/recog.h 2012-03-06 11:53:32.000000000 -0800
+++ gcc-4_5-branch/gcc/recog.h 2011-06-16 18:46:26.405282255 -0700 +++ gcc-4_5-branch/gcc/recog.h 2012-03-06 12:51:20.000547582 -0800
@@ -194,6 +194,9 @@ @@ -194,6 +194,9 @@
/* Gives the constraint string for operand N. */ /* Gives the constraint string for operand N. */
const char *constraints[MAX_RECOG_OPERANDS]; const char *constraints[MAX_RECOG_OPERANDS];
@@ -4062,8 +4062,8 @@ Index: gcc-4_5-branch/gcc/recog.h
Index: gcc-4_5-branch/gcc/reload.c Index: gcc-4_5-branch/gcc/reload.c
=================================================================== ===================================================================
--- gcc-4_5-branch.orig/gcc/reload.c 2011-06-16 17:59:04.000000000 -0700 --- gcc-4_5-branch.orig/gcc/reload.c 2012-03-06 11:53:32.000000000 -0800
+++ gcc-4_5-branch/gcc/reload.c 2011-06-16 18:46:26.405282255 -0700 +++ gcc-4_5-branch/gcc/reload.c 2012-03-06 12:51:20.004547561 -0800
@@ -3631,7 +3631,7 @@ @@ -3631,7 +3631,7 @@
|| modified[j] != RELOAD_WRITE) || modified[j] != RELOAD_WRITE)
&& j != i && j != i