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python3-grpcio: Update to 1.38.0

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Drop riscv patch as its applied upstream
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Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Trevor Gamblin <trevor.gamblin@windriver.com>
This commit is contained in:
Khem Raj committed 2021-05-31 07:38:06 -07:00
1 parent a603cfc4dd
commit b3375a4adc
3 files changed
+2 -25
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meta-python/recipes-devtools/python/python3-grpcio/mips_bigendian.patch
+1 -1
View File
@@ -12,4 +12,4 @@
+#elif defined(__mips__) && defined(__LP64__)
#define OPENSSL_64_BIT
#define OPENSSL_MIPS64
#elif defined(__riscv)
#elif defined(__riscv) && __SIZEOF_POINTER__ == 8
meta-python/recipes-devtools/python/python3-grpcio/riscv64_support.patch
-21
View File
@@ -1,21 +0,0 @@
Add RISC-V 64bit support
Upstream-Status: Pending
Signed-off-by: Khem Raj <raj.khem@gmail.com>
--- a/third_party/boringssl-with-bazel/src/include/openssl/base.h
+++ b/third_party/boringssl-with-bazel/src/include/openssl/base.h
@@ -108,6 +108,14 @@ extern "C" {
#elif defined(__MIPSEL__) && defined(__LP64__)
#define OPENSSL_64_BIT
#define OPENSSL_MIPS64
+#elif defined(__riscv)
+# if (__riscv_xlen == 64)
+# define OPENSSL_64_BIT
+# define OPENSSL_RISCV64
+# elif(__riscv_xlen == 32)
+# define OPENSSL_32_BIT
+# define OPENSSL_RISCV32
+# endif
#elif defined(__pnacl__)
#define OPENSSL_32_BIT
#define OPENSSL_PNACL