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Martin Jansa
6970589fe8
* khem: could you check what I'm doing wrong? This is out of my league.. Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
36 lines
1.6 KiB
Diff
36 lines
1.6 KiB
Diff
--- llvm-2.9.orig/lib/Target/ARM/ARMJITInfo.cpp 2013-04-19 14:49:28.063566919 +0200
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+++ llvm-2.9/lib/Target/ARM/ARMJITInfo.cpp 2013-04-19 15:24:31.065435029 +0200
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@@ -59,7 +59,17 @@
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// for the real target function right now. We have to act as if this
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// whole compilation callback doesn't exist as far as the caller is
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// concerned, so we can't just preserve the callee saved regs.
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+ // stmdb introduced in http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp?diff_format=h&r1=57911&r2=57910&pathrev=57911
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+ // but fails on armv4t
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+ // | {standard input}: Assembler messages:
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+ // | {standard input}:22: Error: selected processor does not support Thumb mode `stmdb sp!,{r0,r1,r2,r3,lr}'
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+ // | {standard input}:31: Error: lo register required -- `ldmia sp!,{r0,r1,r2,r3,lr}'
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+ // | {standard input}:32: Error: lo register required -- `ldr pc,[sp],#4'
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+#ifndef __thumb__
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"stmdb sp!, {r0, r1, r2, r3, lr}\n"
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+#else
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+ "push {r0, r1, r2, r3, lr}\n"
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+#endif
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#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
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"fstmfdd sp!, {d0, d1, d2, d3, d4, d5, d6, d7}\n"
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#endif
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@@ -99,8 +109,14 @@
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// The above twiddling of the saved return addresses allows us to
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// deallocate everything, including the LR the stub saved, with two
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// updating load instructions.
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+#ifndef __thumb__
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"ldmia sp!, {r0, r1, r2, r3, lr}\n"
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"ldr pc, [sp], #4\n"
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+#else
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+ // thumb dont allow lr and pc to be poped in the same instruction.
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+ "pop {r0, r1, r2, r3, lr}\n"
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+ "pop {pc}\n"
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+#endif
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);
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#else // Not an ARM host
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void ARMCompilationCallback() {
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