nativesdk: Implement cross canadian support
This addition closes #236 requesting the SDK support. The implementation consists on a yet minimum set of worky functionality; - Includes rustc, rustdoc and cargo. - Includes libstd and accompanying lib archives for host and for target. - Integrates with the standard environment setup script. - Integrates configurations automatically build for target. The supported build host is still AMD64 only. Note that there's no need on introducing crosssdk package as the official snapshot package serves same way as a non SDK build. Possible future directions: - Offline build: - Support pre-cached set of crates that can be vendored. - Support pre-filled cargo registry. - Support further tools like cargo-fmt, cargo-clippy, GDB support and so on. Signed-off-by: Anatol Belski <anbelski@linux.microsoft.com>
This commit is contained in:
Anatol Belski
@@ -20,7 +20,8 @@ export RUST_TARGET_PATH="${WORKDIR}/targets/"
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export FORCE_CRATE_HASH="${BB_TASKHASH}"
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export YOCTO_ALTERNATE_EXE_PATH = "${STAGING_LIBDIR}/llvm-rust/bin/llvm-config"
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RUST_ALTERNATE_EXE_PATH ?= "${STAGING_LIBDIR}/llvm-rust/bin/llvm-config"
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export YOCTO_ALTERNATE_EXE_PATH = "${RUST_ALTERNATE_EXE_PATH}"
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export YOCTO_ALTERNATE_MULTILIB_NAME = "/${BASELIB}"
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# We don't want to use bitbakes vendoring because the rust sources do their
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@@ -41,350 +42,7 @@ setup_cargo_environment () {
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printf "linker = '%s'\n" "${RUST_BUILD_CCLD}" >> ${CARGO_HOME}/config
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}
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# Right now this is focused on arm-specific tune features.
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# We get away with this for now as one can only use x86-64 as the build host
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# (not arm).
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# Note that TUNE_FEATURES is _always_ refering to the target, so we really
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# don't want to use this for the host/build.
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def llvm_features_from_tune(d):
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f = []
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feat = d.getVar('TUNE_FEATURES')
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if not feat:
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return []
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feat = frozenset(feat.split())
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mach_overrides = d.getVar('MACHINEOVERRIDES')
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mach_overrides = frozenset(mach_overrides.split(':'))
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if 'vfpv4' in feat:
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f.append("+vfp4")
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if 'vfpv3' in feat:
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f.append("+vfp3")
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if 'vfpv3d16' in feat:
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f.append("+d16")
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if 'vfpv2' in feat or 'vfp' in feat:
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f.append("+vfp2")
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if 'neon' in feat:
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f.append("+neon")
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if 'mips32' in feat:
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f.append("+mips32")
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if 'mips32r2' in feat:
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f.append("+mips32r2")
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if target_is_armv7(d):
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f.append('+v7')
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if ('armv6' in mach_overrides) or ('armv6' in feat):
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f.append("+v6")
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if 'dsp' in feat:
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f.append("+dsp")
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if 'thumb' in feat:
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if d.getVar('ARM_THUMB_OPT') is "thumb":
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if target_is_armv7(d):
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f.append('+thumb2')
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f.append("+thumb-mode")
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if 'cortexa5' in feat:
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f.append("+a5")
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if 'cortexa7' in feat:
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f.append("+a7")
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if 'cortexa9' in feat:
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f.append("+a9")
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if 'cortexa15' in feat:
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f.append("+a15")
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if 'cortexa17' in feat:
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f.append("+a17")
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if ('riscv64' in feat) or ('riscv32' in feat):
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f.append("+a,+c,+d,+f,+m")
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return f
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# TARGET_CC_ARCH changes from build/cross/target so it'll do the right thing
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# this should go away when https://github.com/rust-lang/rust/pull/31709 is
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# stable (1.9.0?)
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def llvm_features_from_cc_arch(d):
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f = []
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feat = d.getVar('TARGET_CC_ARCH')
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if not feat:
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return []
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feat = frozenset(feat.split())
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if '-mmmx' in feat:
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f.append("+mmx")
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if '-msse' in feat:
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f.append("+sse")
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if '-msse2' in feat:
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f.append("+sse2")
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if '-msse3' in feat:
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f.append("+sse3")
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if '-mssse3' in feat:
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f.append("+ssse3")
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if '-msse4.1' in feat:
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f.append("+sse4.1")
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if '-msse4.2' in feat:
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f.append("+sse4.2")
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if '-msse4a' in feat:
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f.append("+sse4a")
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if '-mavx' in feat:
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f.append("+avx")
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if '-mavx2' in feat:
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f.append("+avx2")
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return f
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def llvm_features_from_target_fpu(d):
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# TARGET_FPU can be hard or soft. +soft-float tell llvm to use soft float
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# ABI. There is no option for hard.
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fpu = d.getVar('TARGET_FPU', True)
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return ["+soft-float"] if fpu == "soft" else []
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def llvm_features(d):
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return ','.join(llvm_features_from_tune(d) +
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llvm_features_from_cc_arch(d) +
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llvm_features_from_target_fpu(d))
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## arm-unknown-linux-gnueabihf
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DATA_LAYOUT[arm] = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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LLVM_TARGET[arm] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[arm] = "little"
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TARGET_POINTER_WIDTH[arm] = "32"
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TARGET_C_INT_WIDTH[arm] = "32"
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MAX_ATOMIC_WIDTH[arm] = "64"
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FEATURES[arm] = "+v6,+vfp2"
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## armv7-unknown-linux-gnueabihf
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DATA_LAYOUT[armv7] = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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LLVM_TARGET[armv7] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[armv7] = "little"
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TARGET_POINTER_WIDTH[armv7] = "32"
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TARGET_C_INT_WIDTH[armv7] = "32"
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MAX_ATOMIC_WIDTH[armv7] = "64"
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FEATURES[armv7] = "+v7,+vfp2,+thumb2"
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## aarch64-unknown-linux-{gnu, musl}
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DATA_LAYOUT[aarch64] = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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LLVM_TARGET[aarch64] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[aarch64] = "little"
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TARGET_POINTER_WIDTH[aarch64] = "64"
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TARGET_C_INT_WIDTH[aarch64] = "32"
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MAX_ATOMIC_WIDTH[aarch64] = "128"
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## x86_64-unknown-linux-{gnu, musl}
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DATA_LAYOUT[x86_64] = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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LLVM_TARGET[x86_64] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[x86_64] = "little"
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TARGET_POINTER_WIDTH[x86_64] = "64"
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TARGET_C_INT_WIDTH[x86_64] = "32"
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MAX_ATOMIC_WIDTH[x86_64] = "64"
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## i686-unknown-linux-{gnu, musl}
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DATA_LAYOUT[i686] = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
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LLVM_TARGET[i686] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[i686] = "little"
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TARGET_POINTER_WIDTH[i686] = "32"
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TARGET_C_INT_WIDTH[i686] = "32"
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MAX_ATOMIC_WIDTH[i686] = "64"
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## XXX: a bit of a hack so qemux86 builds, clone of i686-unknown-linux-{gnu, musl} above
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DATA_LAYOUT[i586] = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
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LLVM_TARGET[i586] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[i586] = "little"
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TARGET_POINTER_WIDTH[i586] = "32"
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TARGET_C_INT_WIDTH[i586] = "32"
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MAX_ATOMIC_WIDTH[i586] = "64"
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## mips-unknown-linux-{gnu, musl}
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DATA_LAYOUT[mips] = "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
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LLVM_TARGET[mips] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[mips] = "big"
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TARGET_POINTER_WIDTH[mips] = "32"
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TARGET_C_INT_WIDTH[mips] = "32"
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MAX_ATOMIC_WIDTH[mips] = "32"
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## mipsel-unknown-linux-{gnu, musl}
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DATA_LAYOUT[mipsel] = "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
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LLVM_TARGET[mipsel] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[mipsel] = "little"
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TARGET_POINTER_WIDTH[mipsel] = "32"
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TARGET_C_INT_WIDTH[mipsel] = "32"
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MAX_ATOMIC_WIDTH[mipsel] = "32"
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## mips64-unknown-linux-{gnu, musl}
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DATA_LAYOUT[mips64] = "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128"
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LLVM_TARGET[mips64] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[mips64] = "big"
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TARGET_POINTER_WIDTH[mips64] = "64"
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TARGET_C_INT_WIDTH[mips64] = "64"
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MAX_ATOMIC_WIDTH[mips64] = "64"
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## mips64el-unknown-linux-{gnu, musl}
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DATA_LAYOUT[mips64el] = "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128"
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LLVM_TARGET[mips64el] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[mips64el] = "little"
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TARGET_POINTER_WIDTH[mips64el] = "64"
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TARGET_C_INT_WIDTH[mips64el] = "64"
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MAX_ATOMIC_WIDTH[mips64el] = "64"
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## powerpc-unknown-linux-{gnu, musl}
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DATA_LAYOUT[powerpc] = "E-m:e-p:32:32-i64:64-n32"
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LLVM_TARGET[powerpc] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[powerpc] = "big"
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TARGET_POINTER_WIDTH[powerpc] = "32"
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TARGET_C_INT_WIDTH[powerpc] = "32"
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MAX_ATOMIC_WIDTH[powerpc] = "32"
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## powerpc64le-unknown-linux-{gnu, musl}
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DATA_LAYOUT[powerpc64le] = "e-m:e-i64:64-n32:64-v256:256:256-v512:512:512"
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LLVM_TARGET[powerpc64le] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[powerpc64le] = "little"
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TARGET_POINTER_WIDTH[powerpc64le] = "64"
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TARGET_C_INT_WIDTH[powerpc64le] = "64"
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MAX_ATOMIC_WIDTH[powerpc64le] = "64"
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## riscv32-unknown-linux-{gnu, musl}
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DATA_LAYOUT[riscv32] = "e-m:e-p:32:32-i64:64-n32-S128"
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LLVM_TARGET[riscv32] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[riscv32] = "little"
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TARGET_POINTER_WIDTH[riscv32] = "32"
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TARGET_C_INT_WIDTH[riscv32] = "32"
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MAX_ATOMIC_WIDTH[riscv32] = "32"
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## riscv64-unknown-linux-{gnu, musl}
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DATA_LAYOUT[riscv64] = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
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LLVM_TARGET[riscv64] = "${RUST_TARGET_SYS}"
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TARGET_ENDIAN[riscv64] = "little"
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TARGET_POINTER_WIDTH[riscv64] = "64"
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TARGET_C_INT_WIDTH[riscv64] = "64"
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MAX_ATOMIC_WIDTH[riscv64] = "64"
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def sys_for(d, thing):
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return d.getVar('{}_SYS'.format(thing))
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def prefix_for(d, thing):
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return d.getVar('{}_PREFIX'.format(thing))
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# Convert a normal arch (HOST_ARCH, TARGET_ARCH, BUILD_ARCH, etc) to something
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# rust's internals won't choke on.
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def arch_to_rust_target_arch(arch):
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if arch == "i586" or arch == "i686":
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return "x86"
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elif arch == "mipsel":
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return "mips"
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elif arch == "mip64sel":
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return "mips64"
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elif arch == "armv7":
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return "arm"
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else:
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return arch
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# generates our target CPU value
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def llvm_cpu(d):
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# First check if TUNE_CCARGS gives us a specific CPU to build for (via -march).
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# Translate that GCC -march flag to a Rust/LLVM CPU.
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trans = {}
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trans['btver2'] = "btver2"
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trans['core2'] = "core2"
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trans['mips32'] = "mips32"
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trans['mips32r2'] = "mips32r2"
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trans['nehalem'] = "nehalem"
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trans['skylake'] = "skylake"
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for arg in (d.getVar('TUNE_CCARGS') or '').split():
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if arg.startswith('-march='):
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march = arg[7:]
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cpu = trans.get(march)
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if cpu:
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return cpu
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# If we don't have -march in TUNE_CCARGS, check TRANSLATED_TARGET_ARCH.
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# This must also be translated into a Rust/LLVM CPU.
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trans = {}
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trans['i586'] = "i586"
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trans['i686'] = "i686"
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trans['mips64'] = "mips64"
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trans['mips64el'] = "mips64"
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trans['powerpc'] = "ppc"
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trans['powerpc64'] = "ppc64"
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trans['riscv32'] = "generic-rv32"
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trans['riscv64'] = "generic-rv64"
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trans['x86-64'] = "x86-64"
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target = d.getVar('TRANSLATED_TARGET_ARCH')
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cpu = trans.get(target)
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if cpu:
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return cpu
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# If we still didn't get a target CPU, choose "generic".
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# Further optimization can still happen via llvm_features.
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return "generic"
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TARGET_LLVM_CPU="${@llvm_cpu(d)}"
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TARGET_LLVM_FEATURES = "${@llvm_features(d)}"
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# class-native implies TARGET=HOST, and TUNE_FEATURES only describes the real
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# (original) target.
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TARGET_LLVM_FEATURES_class-native = "${@','.join(llvm_features_from_cc_arch(d))}"
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def rust_gen_target(d, thing, wd, features, cpu, arch):
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import json
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sys = sys_for(d, thing)
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prefix = prefix_for(d, thing)
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features = features or d.getVarFlag('FEATURES', arch) or ""
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features = features.strip()
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# build tspec
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tspec = {}
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tspec['llvm-target'] = d.getVarFlag('LLVM_TARGET', arch)
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tspec['data-layout'] = d.getVarFlag('DATA_LAYOUT', arch)
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tspec['max-atomic-width'] = int(d.getVarFlag('MAX_ATOMIC_WIDTH', arch))
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tspec['target-pointer-width'] = d.getVarFlag('TARGET_POINTER_WIDTH', arch)
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tspec['target-c-int-width'] = d.getVarFlag('TARGET_C_INT_WIDTH', arch)
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tspec['target-endian'] = d.getVarFlag('TARGET_ENDIAN', arch)
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tspec['arch'] = arch_to_rust_target_arch(arch)
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tspec['os'] = "linux"
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if "musl" in tspec['llvm-target']:
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tspec['env'] = "musl"
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else:
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tspec['env'] = "gnu"
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if "riscv64" in tspec['llvm-target']:
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tspec['llvm-abiname'] = "lp64d"
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if "riscv32" in tspec['llvm-target']:
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tspec['llvm-abiname'] = "ilp32d"
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tspec['vendor'] = "unknown"
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tspec['target-family'] = "unix"
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tspec['linker'] = "{}{}gcc".format(d.getVar('CCACHE'), prefix)
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tspec['ar'] = "{}ar".format(prefix)
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tspec['cpu'] = cpu
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if features is not "":
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tspec['features'] = features
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tspec['dynamic-linking'] = True
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tspec['executables'] = True
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tspec['linker-is-gnu'] = True
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tspec['linker-flavor'] = "gcc"
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tspec['has-rpath'] = True
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tspec['has-elf-tls'] = True
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tspec['position-independent-executables'] = True
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tspec['panic-strategy'] = d.getVar("RUST_PANIC_STRATEGY")
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# write out the target spec json file
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with open(wd + sys + '.json', 'w') as f:
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json.dump(tspec, f, indent=4)
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python do_rust_gen_targets () {
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wd = d.getVar('WORKDIR') + '/targets/'
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build_arch = d.getVar('BUILD_ARCH')
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rust_gen_target(d, 'BUILD', wd, "", "generic", build_arch)
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}
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addtask rust_gen_targets after do_patch before do_compile
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do_rust_gen_targets[dirs] += "${WORKDIR}/targets"
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include rust-common.inc
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do_rust_setup_snapshot () {
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for installer in "${WORKDIR}/rust-snapshot-components/"*"/install.sh"; do
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@@ -399,7 +57,6 @@ do_rust_setup_snapshot () {
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addtask rust_setup_snapshot after do_unpack before do_configure
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do_rust_setup_snapshot[dirs] += "${WORKDIR}/rust-snapshot"
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python do_configure() {
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import json
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try:
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Block a user