move kernel recipes in to the proper dir

Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
2026-07-16 22:38:04 +00:00 · 2011-05-21 08:54:21 +02:00
parent 2ee953b627
commit 07e8c30da9
407 changed files with 0 additions and 1 deletions
@@ -0,0 +1,26 @@
+From b0a773f958b03ba77317f8b762d90d3c00269292 Mon Sep 17 00:00:00 2001
+From: Roger Monk <r-monk@ti.com>
+Date: Wed, 25 Aug 2010 16:45:46 +0100
+Subject: [PATCH] ahci-ti:  Fix (currently harmless) typo in SATA PHY configuration
+
+Signed-off-by: Roger Monk <r-monk@ti.com>
+---
+ drivers/ata/ahci-ti.c |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/drivers/ata/ahci-ti.c b/drivers/ata/ahci-ti.c
+index 9e36c9d..674b216 100644
+--- a/drivers/ata/ahci-ti.c
+++ b/drivers/ata/ahci-ti.c
+@@ -80,7 +80,7 @@ void ata_plat_init (void __iomem *base)
+ 	phy_val = PHY_MPY << 0 | PHY_LB << 4 | PHY_LOS << 6 |
+ 			PHY_RXINVPAIR << 7 | PHY_RXTERM << 8 |
+ 			PHY_RXCDR  << 10 | PHY_RXEQ << 13 |
+-			PHY_RXINVPAIR << 17 | PHY_TXCM << 18 |
+			PHY_TXINVPAIR << 17 | PHY_TXCM << 18 |
+ 			PHY_TXSWING << 19 | PHY_TXDE << 22 | 
+ 			PHY_OVERRIDE << 30 | PHY_ENPLL	<< 31;
+ 
+-- 
+1.6.0.4
+
@@ -0,0 +1,29 @@
+From 37a7868b15be9415abd3f57477afc8be956666e6 Mon Sep 17 00:00:00 2001
+From: Roger Monk <r-monk@ti.com>
+Date: Wed, 25 Aug 2010 16:46:28 +0100
+Subject: [PATCH] ahci-ti:  Update SATA PHY configuration - RXCDR --> 4
+
+   * Update SATA PHY configuration for Receiver Clock/Data Recovery
+      * Set to 0x4 = 2nd order, low precision
+
+Signed-off-by: Roger Monk <r-monk@ti.com>
+---
+ drivers/ata/ahci-ti.c |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/drivers/ata/ahci-ti.c b/drivers/ata/ahci-ti.c
+index 674b216..853d251 100644
+--- a/drivers/ata/ahci-ti.c
+++ b/drivers/ata/ahci-ti.c
+@@ -55,7 +55,7 @@ void ata_plat_remove(struct ata_host *host);
+ #define PHY_LOS		1 /* bit6        1 */
+ #define PHY_RXINVPAIR	0 /* bit7        1 */
+ #define PHY_RXTERM	0 /* bits9:8     2 */
+-#define PHY_RXCDR	0 /* bits12:10   3 */
+#define PHY_RXCDR	4 /* bits12:10   3 */
+ #define PHY_RXEQ	1 /* bits16:13   4 */
+ #define PHY_TXINVPAIR	0 /* bit17       1 */
+ #define PHY_TXCM	0 /* bit18       1 */
+-- 
+1.6.0.4
+
@@ -0,0 +1,345 @@
+From a04a493ead5afb10aafe2c0cf57bf9e3bf7aa844 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@openembedded.org>
+Date: Thu, 12 Mar 2009 14:15:42 -0300
+Subject: [PATCH] dm355-leopard: add board file based on board-dm355-evm.c
+
+---
+ arch/arm/mach-davinci/Kconfig               |    8 +
+ arch/arm/mach-davinci/Makefile              |    2 +
+ arch/arm/mach-davinci/board-dm355-leopard.c |  295 +++++++++++++++++++++++++++
+ 3 files changed, 305 insertions(+), 0 deletions(-)
+ create mode 100644 arch/arm/mach-davinci/board-dm355-leopard.c
+
+diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
+index 0010f2d..85424b8 100644
+--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
+@@ -50,6 +50,14 @@ config MACH_SFFSDR
+ 	  Say Y here to select the Lyrtech Small Form Factor
+ 	  Software Defined Radio (SFFSDR) board.
+ 
+config MACH_DM355_LEOPARD
+	bool "TI DM355 Leopard board"
+	default n
+	depends on ARCH_DAVINCI_DM355
+	help
+	  Configure this option to specify the whether the board used
+	  for development is a DM355 Leopard board.
+
+ config DAVINCI_MUX
+ 	bool "DAVINCI multiplexing support"
+ 	depends on ARCH_DAVINCI
+diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
+index 6783681..96ef484 100644
+--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
+@@ -19,3 +19,5 @@ obj-$(CONFIG_MACH_DAVINCI_EVM)  	+= board-dm644x-evm.o
+ obj-$(CONFIG_MACH_DAVINCI_DM646X_EVM)	+= board-dm646x-evm.o
+ obj-$(CONFIG_MACH_DAVINCI_DM355_EVM)	+= board-dm355-evm.o
+ obj-$(CONFIG_MACH_SFFSDR)		+= board-sffsdr.o
+obj-$(CONFIG_MACH_DM355_LEOPARD)	+= board-dm355-leopard.o
+
+diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
+new file mode 100644
+index 0000000..a1e97e8
+--- /dev/null
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
+@@ -0,0 +1,295 @@
+/*
+ * TI DM355 leopard board support
+ *
+ * Based on board-dm355-evm.c
+ *
+ * This file is licensed under the terms of the GNU General Public 
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
+#include <linux/i2c.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/clk.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/eeprom.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/flash.h>
+
+#include <mach/hardware.h>
+#include <mach/dm355.h>
+#include <mach/psc.h>
+#include <mach/common.h>
+#include <mach/emac.h>
+#include <mach/i2c.h>
+#include <mach/serial.h>
+#include <mach/nand.h>
+#include <mach/mmc.h>
+
+#define DAVINCI_ASYNC_EMIF_CONTROL_BASE		0x01e10000
+#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE	0x02000000
+
+/* NOTE:  this is geared for the standard config, with a socketed
+ * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors.  If you
+ * swap chips, maybe with a different block size, partitioning may
+ * need to be changed.
+ */
+#define NAND_BLOCK_SIZE		SZ_128K
+
+static struct mtd_partition davinci_nand_partitions[] = {
+	{
+		/* UBL (a few copies) plus U-Boot */
+		.name		= "bootloader",
+		.offset		= 0,
+		.size		= 15 * NAND_BLOCK_SIZE,
+		.mask_flags	= MTD_WRITEABLE, /* force read-only */
+	}, {
+		/* U-Boot environment */
+		.name		= "params",
+		.offset		= MTDPART_OFS_APPEND,
+		.size		= 1 * NAND_BLOCK_SIZE,
+		.mask_flags	= 0,
+	}, {
+		.name		= "kernel",
+		.offset		= MTDPART_OFS_APPEND,
+		.size		= SZ_4M,
+		.mask_flags	= 0,
+	}, {
+		.name		= "filesystem1",
+		.offset		= MTDPART_OFS_APPEND,
+		.size		= SZ_512M,
+		.mask_flags	= 0,
+	}, {
+		.name		= "filesystem2",
+		.offset		= MTDPART_OFS_APPEND,
+		.size		= MTDPART_SIZ_FULL,
+		.mask_flags	= 0,
+	}
+	/* two blocks with bad block table (and mirror) at the end */
+};
+
+static struct davinci_nand_pdata davinci_nand_data = {
+	.mask_chipsel		= BIT(14),
+	.parts			= davinci_nand_partitions,
+	.nr_parts		= ARRAY_SIZE(davinci_nand_partitions),
+	.ecc_mode		= NAND_ECC_HW_SYNDROME,
+	.options		= NAND_USE_FLASH_BBT,
+};
+
+static struct resource davinci_nand_resources[] = {
+	{
+		.start		= DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
+		.end		= DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
+		.flags		= IORESOURCE_MEM,
+	}, {
+		.start		= DAVINCI_ASYNC_EMIF_CONTROL_BASE,
+		.end		= DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+		.flags		= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device davinci_nand_device = {
+	.name			= "davinci_nand",
+	.id			= 0,
+
+	.num_resources		= ARRAY_SIZE(davinci_nand_resources),
+	.resource		= davinci_nand_resources,
+
+	.dev			= {
+		.platform_data	= &davinci_nand_data,
+	},
+};
+
+static struct davinci_i2c_platform_data i2c_pdata = {
+	.bus_freq	= 400	/* kHz */,
+	.bus_delay	= 0	/* usec */,
+};
+
+static int dm355leopard_mmc_gpios = -EINVAL;
+
+static void dm355leopard_mmcsd_gpios(unsigned gpio)
+{
+	gpio_request(gpio + 0, "mmc0_ro");
+	gpio_request(gpio + 1, "mmc0_cd");
+	gpio_request(gpio + 2, "mmc1_ro");
+	gpio_request(gpio + 3, "mmc1_cd");
+
+	/* we "know" these are input-only so we don't
+	 * need to call gpio_direction_input()
+	 */
+
+	dm355leopard_mmc_gpios = gpio;
+}
+
+static struct i2c_board_info dm355leopard_i2c_info[] = {
+	{ I2C_BOARD_INFO("dm355leopard_msp", 0x25),
+		.platform_data = dm355leopard_mmcsd_gpios,
+		/* plus irq */ },
+	/* { I2C_BOARD_INFO("tlv320aic3x", 0x1b), }, */
+	/* { I2C_BOARD_INFO("tvp5146", 0x5d), }, */
+};
+
+static void __init leopard_init_i2c(void)
+{
+	davinci_init_i2c(&i2c_pdata);
+
+	gpio_request(5, "dm355leopard_msp");
+	gpio_direction_input(5);
+	dm355leopard_i2c_info[0].irq = gpio_to_irq(5);
+
+	i2c_register_board_info(1, dm355leopard_i2c_info,
+			ARRAY_SIZE(dm355leopard_i2c_info));
+}
+
+static struct resource dm355leopard_dm9000_rsrc[] = {
+	{
+		/* addr */
+		.start	= 0x04000000,
+		.end	= 0x04000001,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		/* data */
+		.start	= 0x04000016,
+		.end	= 0x04000017,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.flags	= IORESOURCE_IRQ
+			| IORESOURCE_IRQ_HIGHEDGE /* rising (active high) */,
+	},
+};
+
+static struct platform_device dm355leopard_dm9000 = {
+	.name		= "dm9000",
+	.id		= -1,
+	.resource	= dm355leopard_dm9000_rsrc,
+	.num_resources	= ARRAY_SIZE(dm355leopard_dm9000_rsrc),
+};
+
+static struct platform_device *davinci_leopard_devices[] __initdata = {
+	&dm355leopard_dm9000,
+	&davinci_nand_device,
+};
+
+static struct davinci_uart_config uart_config __initdata = {
+	.enabled_uarts = (1 << 0),
+};
+
+static void __init dm355_leopard_map_io(void)
+{
+	davinci_map_common_io();
+	dm355_init();
+}
+
+static int dm355leopard_mmc_get_cd(int module)
+{
+	if (!gpio_is_valid(dm355leopard_mmc_gpios))
+		return -ENXIO;
+	/* low == card present */
+	return !gpio_get_value_cansleep(dm355leopard_mmc_gpios + 2 * module + 1);
+}
+
+static int dm355leopard_mmc_get_ro(int module)
+{
+	if (!gpio_is_valid(dm355leopard_mmc_gpios))
+		return -ENXIO;
+	/* high == card's write protect switch active */
+	return gpio_get_value_cansleep(dm355leopard_mmc_gpios + 2 * module + 0);
+}
+
+static struct davinci_mmc_config dm355leopard_mmc_config = {
+	.get_cd		= dm355leopard_mmc_get_cd,
+	.get_ro		= dm355leopard_mmc_get_ro,
+	.wires		= 4,
+	.max_freq       = 50000000,
+	.caps           = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
+};
+
+/* Don't connect anything to J10 unless you're only using USB host
+ * mode *and* have to do so with some kind of gender-bender.  If
+ * you have proper Mini-B or Mini-A cables (or Mini-A adapters)
+ * the ID pin won't need any help.
+ */
+#ifdef CONFIG_USB_MUSB_PERIPHERAL
+#define USB_ID_VALUE	0	/* ID pulled high; *should* float */
+#else
+#define USB_ID_VALUE	1	/* ID pulled low */
+#endif
+
+static struct spi_eeprom at25640a = {
+	.byte_len	= SZ_64K / 8,
+	.name		= "at25640a",
+	.page_size	= 32,
+	.flags		= EE_ADDR2,
+};
+
+static struct spi_board_info dm355_leopard_spi_info[] __initconst = {
+	{
+		.modalias	= "at25",
+		.platform_data	= &at25640a,
+		.max_speed_hz	= 10 * 1000 * 1000,	/* at 3v3 */
+		.bus_num	= 0,
+		.chip_select	= 0,
+		.mode		= SPI_MODE_0,
+	},
+};
+
+static __init void dm355_leopard_init(void)
+{
+	struct clk *aemif;
+
+	gpio_request(9, "dm9000");
+	gpio_direction_input(9);
+	dm355leopard_dm9000_rsrc[2].start = gpio_to_irq(9);
+
+	aemif = clk_get(&dm355leopard_dm9000.dev, "aemif");
+	clk_enable(aemif);
+	clk_put(aemif);
+
+	platform_add_devices(davinci_leopard_devices,
+			     ARRAY_SIZE(davinci_leopard_devices));
+	leopard_init_i2c();
+	davinci_serial_init(&uart_config);
+
+	/* NOTE:  NAND flash timings set by the UBL are slower than
+	 * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204
+	 * but could be 0x0400008c for about 25% faster page reads.
+	 */
+
+	gpio_request(2, "usb_id_toggle");
+	gpio_direction_output(2, USB_ID_VALUE);
+	/* irlml6401 switches over 1A in under 8 msec */
+	setup_usb(500, 8);
+
+	davinci_setup_mmc(0, &dm355leopard_mmc_config);
+	davinci_setup_mmc(1, &dm355leopard_mmc_config);
+
+	dm355_init_spi0(BIT(0), dm355_leopard_spi_info,
+			ARRAY_SIZE(dm355_leopard_spi_info));
+}
+
+static __init void dm355_leopard_irq_init(void)
+{
+	davinci_irq_init();
+}
+
+MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
+	.phys_io      = IO_PHYS,
+	.io_pg_offst  = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
+	.boot_params  = (0x80000100),
+	.map_io	      = dm355_leopard_map_io,
+	.init_irq     = dm355_leopard_irq_init,
+	.timer	      = &davinci_timer,
+	.init_machine = dm355_leopard_init,
+MACHINE_END
+-- 
+1.6.1.2
+
@@ -0,0 +1,143 @@
+Subject:
+[PATCH 7/7] DM355 platform related changes for vpfe capture driver
+From:
+m-karicheri2-l0cyMroinI0@public.gmane.org
+Date:
+Fri, 13 Mar 2009 17:24:34 -0400
+To:
+davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org, davinci_opensource_ccb-uAqBSO/uNfhBDgjK7y7TUQ@public.gmane.org, psp_video-uAqBSO/uNfhBDgjK7y7TUQ@public.gmane.org
+Newsgroups:
+gmane.linux.davinci
+
+Add platform related changes for vpfe capture driver on DM355
+
+Signed-off-by: Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>
+---
+ arch/arm/mach-davinci/board-dm355-leopard.c    |   91 +++++++++++++++++++++++++++-
+
+diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
+index e104650..aaa58ba 100644
+--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
+@@ -20,6 +20,8 @@
+ #include <linux/io.h>
+ #include <linux/gpio.h>
+ #include <linux/clk.h>
+#include <media/v4l2-int-device.h>
+#include <media/tvp514x.h>
+ #include <linux/spi/spi.h>
+ #include <linux/spi/eeprom.h>
+ 
+@@ -134,12 +136,58 @@ static void dm355leopard_mmcsd_gpios(unsigned gpio)
+ 	dm355leopard_mmc_gpios = gpio;
+ }
+ 
+#define TVP5146_I2C_ADDR		0x5D
+static struct v4l2_ifparm tvp5146_ifparm = {
+	.if_type = V4L2_IF_TYPE_BT656,
+	.u = {
+	      .bt656 = {
+			.frame_start_on_rising_vs = 1,
+			.bt_sync_correct = 0,
+			.swap = 0,
+			.latch_clk_inv = 0,
+			.nobt_hs_inv = 0,	/* active high */
+			.nobt_vs_inv = 0,	/* active high */
+			.mode = V4L2_IF_TYPE_BT656_MODE_BT_8BIT,
+			.clock_min = TVP514X_XCLK_BT656,
+			.clock_max = TVP514X_XCLK_BT656,
+			},
+	      },
+};
+
+/**
+ * @brief tvp5146_g_ifparm - Returns the TVP5146 decoder interface parameters
+ *
+ * @param p - pointer to v4l2_ifparm structure
+ * @return result of operation - 0 is success
+ */
+static int tvp5146_g_ifparm(struct v4l2_ifparm *p)
+{
+	if (p == NULL)
+		return -EINVAL;
+
+	*p = tvp5146_ifparm;
+	return 0;
+}
+
+#define TVP5146_NUM_INPUTS		ARRAY_SIZE(tvp5146_input_list)
+
+static struct tvp514x_platform_data tvp5146_pdata = {
+	.master = CAPTURE_DRV_NAME,
+	.ifparm = tvp5146_g_ifparm,
+	.hs_polarity = 1,
+	.vs_polarity = 1
+};
+
+ static struct i2c_board_info dm355leopard_i2c_info[] = {
+-	{ I2C_BOARD_INFO("dm355leopard_msp", 0x25),
+	{	I2C_BOARD_INFO("dm355leopard_msp", 0x25),
+ 		.platform_data = dm355leopard_mmcsd_gpios,
+-		/* plus irq */ },
+	},
+	{
+		I2C_BOARD_INFO("tvp5146", TVP5146_I2C_ADDR),
+		.platform_data = &tvp5146_pdata,
+	},
+	/* { plus irq  }, */
+ 	/* { I2C_BOARD_INFO("tlv320aic3x", 0x1b), }, */
+-	/* { I2C_BOARD_INFO("tvp5146", 0x5d), }, */
+ };
+ 
+ static void __init leopard_init_i2c(void)
+@@ -178,6 +226,41 @@ static struct platform_device dm355leopard_dm9000 = {
+ 	.num_resources	= ARRAY_SIZE(dm355leopard_dm9000_rsrc),
+ };
+ 
+#define TVP514X_STD_ALL	(V4L2_STD_NTSC | V4L2_STD_PAL)
+
+static struct vpfe_capture_input vpfe_capture_inputs = {
+	.num_inputs = VPFE_MAX_DEC_INPUTS,
+	.current_input = 0,
+	.inputs[0] = {
+		.dec_name = TVP514X_MODULE_NAME,
+		.input = {
+			.index = 0,
+			.name = "COMPOSITE",
+			.type = V4L2_INPUT_TYPE_CAMERA,
+			.std = TVP514X_STD_ALL,
+		},
+		.route = {
+			.input = INPUT_CVBS_VI2B,
+			.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+		},
+		.routing_supported = 1,
+	},
+	.inputs[1] = {
+		.dec_name = TVP514X_MODULE_NAME,
+		.input = {
+			.index = 1,
+			.name = "SVIDEO",
+			.type = V4L2_INPUT_TYPE_CAMERA,
+			.std = TVP514X_STD_ALL,
+		},
+		.route = {
+			.input = INPUT_SVIDEO_VI2C_VI1C,
+			.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+		},
+		.routing_supported = 1,
+	},
+};
+
+ static struct platform_device *davinci_leopard_devices[] __initdata = {
+ 	&dm355leopard_dm9000,
+ 	&davinci_nand_device,
+@@ -190,6 +273,8 @@ static struct davinci_uart_config uart_config __initdata = {
+ static void __init dm355_leopard_map_io(void)
+ {
+ 	davinci_map_common_io();
+	/* setup input configuration for VPFE input devices */
+	setup_vpfe_input_config(&vpfe_capture_inputs);
+ 	dm355_init();
+ }
+ 
@@ -0,0 +1,27 @@
+From 69600e5a42512204bc4eb83a3a459496b049107f Mon Sep 17 00:00:00 2001
+From: Roger Monk <r-monk@ti.com>
+Date: Wed, 25 Aug 2010 17:47:16 +0100
+Subject: [PATCH] board-da850-hawk:  Disable NAND SUBPAGE
+
+   * This was causing issues with UBI
+   * Solution/Workaround identified by Caglar Akyuz - now applied locally to board file
+---
+ arch/arm/mach-davinci/board-da850-hawk.c |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-davinci/board-da850-hawk.c b/arch/arm/mach-davinci/board-da850-hawk.c
+index 87ed017..bbfe32a 100644
+--- a/arch/arm/mach-davinci/board-da850-hawk.c
+++ b/arch/arm/mach-davinci/board-da850-hawk.c
+@@ -118,7 +118,7 @@ static struct davinci_nand_pdata da850_hawk_nandflash_data = {
+ 	.nr_parts	= ARRAY_SIZE(da850_hawk_nandflash_partition),
+ 	.ecc_mode	= NAND_ECC_HW,
+ 	.ecc_bits	= 4,
+-	.options	= NAND_USE_FLASH_BBT,
+	.options	= NAND_USE_FLASH_BBT | NAND_NO_SUBPAGE_WRITE,
+ 	.timing		= &da850_hawk_nandflash_timing,
+ };
+ 
+-- 
+1.6.0.4
+
@@ -0,0 +1,29 @@
+From 2ee9f2c655710d9e60a5a9b49871edc316e5363d Mon Sep 17 00:00:00 2001
+From: Roger Monk <r-monk@ti.com>
+Date: Wed, 25 Aug 2010 17:29:14 +0100
+Subject: [PATCH] board-da850-evm:  Disable NAND SUBPAGE
+
+   * This was causing issues with UBI
+   * Solution/Workaround identified by Caglar Akyuz - now applied locally to board file
+
+Signed-off-by: Roger Monk <r-monk@ti.com>
+---
+ arch/arm/mach-davinci/board-da850-evm.c |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
+index cfed439..502b914 100755
+--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
+@@ -187,7 +187,7 @@ static struct davinci_nand_pdata da850_evm_nandflash_data = {
+ 	.nr_parts	= ARRAY_SIZE(da850_evm_nandflash_partition),
+ 	.ecc_mode	= NAND_ECC_HW,
+ 	.ecc_bits	= 4,
+-	.options	= NAND_USE_FLASH_BBT,
+	.options	= NAND_USE_FLASH_BBT | NAND_NO_SUBPAGE_WRITE,
+ 	.timing		= &da850_evm_nandflash_timing,
+ };
+ 
+-- 
+1.6.0.4
+
@@ -0,0 +1,334 @@
+From: Melissa Watkins <m-watkins@ti.com>
+Date: Wed, 24 Nov 2010 02:59:34 -0600
+Subject: [PATCH 1/3] uio_pruss1: Core driver addition
+
+This patch adds the uio_pru driver and updates the uio Makefile
+ and Kconfig files to support this driver. The uio_pru driver provides
+a framework for handling the PRU in the user space and is responsible
+for the device setup and the primary interrupt handling.
+
+Signed-off-by: Amit Chatterjee <amit.chatterjee@ti.com>
+Signed-off-by: Melissa Watkins <m-watkins@ti.com>
+---
+ drivers/uio/Kconfig   |   10 ++
+ drivers/uio/Makefile  |    1 +
+ drivers/uio/uio_pru.c |  279 +++++++++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 290 insertions(+), 0 deletions(-)
+ create mode 100644 drivers/uio/uio_pru.c
+
+diff --git a/drivers/uio/Kconfig b/drivers/uio/Kconfig
+index 8aa1955..8ae8280 100644
+--- a/drivers/uio/Kconfig
+++ b/drivers/uio/Kconfig
+@@ -94,4 +94,14 @@ config UIO_PCI_GENERIC
+ 	  primarily, for virtualization scenarios.
+ 	  If you compile this as a module, it will be called uio_pci_generic.
+ 
+config UIO_PRUSS
+	tristate "Texas Instruments PRUSS driver"
+	depends on ARCH_DAVINCI_DA850
+	default n
+	help
+	  PRUSS driver for OMAPL13X/DA8XX/AM17XX/AM18XX devices
+	  PRUSS driver requires user space components
+	  To compile this driver as a module, choose M here: the module
+	  will be called uio_pruss.
+
+ endif
+diff --git a/drivers/uio/Makefile b/drivers/uio/Makefile
+index 73b2e75..e6d8adb 100644
+--- a/drivers/uio/Makefile
+++ b/drivers/uio/Makefile
+@@ -6,3 +6,4 @@ obj-$(CONFIG_UIO_SMX)	+= uio_smx.o
+ obj-$(CONFIG_UIO_AEC)	+= uio_aec.o
+ obj-$(CONFIG_UIO_SERCOS3)	+= uio_sercos3.o
+ obj-$(CONFIG_UIO_PCI_GENERIC)	+= uio_pci_generic.o
+obj-$(CONFIG_UIO_PRUSS)         += uio_pru.o
+diff --git a/drivers/uio/uio_pru.c b/drivers/uio/uio_pru.c
+new file mode 100644
+index 0000000..82dc35e
+--- /dev/null
+++ b/drivers/uio/uio_pru.c
+@@ -0,0 +1,279 @@
+/*
+ * UIO TI Programmable Real-Time Unit (PRU) driver.
+ *
+ * (C) 2010 Amit Chatterjee <amit.chatterjee@ti.com>
+ *
+ * Copyright (C) {YEAR} Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed .as is. WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/uio_driver.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/dma-mapping.h>
+
+#define DRV_NAME "pruss"
+#define DRV_VERSION "0.01"
+
+/*
+0x01C30000 - 0x01C301FF Data RAM 0
+0x01C30200 - 0x01C31FFF Reserved
+0x01C32000 - 0x01C321FF Data RAM 1
+0x01C32200 - 0x01C33FFF Reserved
+0x01C34000 - 0x01C36FFF INTC Registers
+0x01C37000 - 0x01C373FF PRU0 Control Registers
+0x01C37400 - 0x01C377FF PRU0 Debug Registers
+0x01C37800 - 0x01C37BFF PRU1 Control Registers
+0x01C37C00 - 0x01C37FFF PRU1 Debug Registers
+0x01C38000 - 0x01C38FFF PRU0 Instruction RAM
+0x01C39000 - 0x01C3BFFF Reserved
+0x01C3C000 - 0x01C3CFFF PRU1 Instruction RAM
+0x01C3D000 - 0x01C3FFFF Reserved
+*/
+/*
+ * 3 PRU_EVTOUT0 PRUSS Interrupt
+ * 4 PRU_EVTOUT1 PRUSS Interrupt
+ * 5 PRU_EVTOUT2 PRUSS Interrupt
+ * 6 PRU_EVTOUT3 PRUSS Interrupt
+ * 7 PRU_EVTOUT4 PRUSS Interrupt
+ * 8 PRU_EVTOUT5 PRUSS Interrupt
+ * 9 PRU_EVTOUT6 PRUSS Interrupt
+ * 10 PRU_EVTOUT7 PRUSS Interrupt
+*/
+
+#define PRUSS_INSTANCE		(8)
+
+static struct clk *pruss_clk = NULL, *ecap0_clk = NULL;
+static struct uio_info *info[PRUSS_INSTANCE];
+static void *ddr_virt_addr;
+static dma_addr_t ddr_phy_addr;
+
+
+
+static irqreturn_t pruss_handler(int irq, struct uio_info *dev_info)
+{
+	return IRQ_HANDLED;
+}
+
+static int __devinit pruss_probe(struct platform_device *dev)
+{
+	int ret = -ENODEV;
+	int count = 0;
+	struct resource *regs_pruram, *regs_l3ram, *regs_ddr;
+	char *string;
+
+	/* Power on PRU in case its not done as part of boot-loader */
+	pruss_clk = clk_get(&dev->dev, "pruss");
+	if (IS_ERR(pruss_clk)) {
+		dev_err(&dev->dev, "no pruss clock available\n");
+		ret = PTR_ERR(pruss_clk);
+		pruss_clk = NULL;
+		return ret;
+	} else {
+		clk_enable (pruss_clk);
+	}
+
+	ecap0_clk = clk_get(&dev->dev, "ecap0");
+	if (IS_ERR(ecap0_clk)) {
+		dev_err(&dev->dev, "no ecap0 clock available\n");
+		ret = PTR_ERR(ecap0_clk);
+		ecap0_clk = NULL;
+		return ret;
+	} else {
+		clk_enable(ecap0_clk);
+	}
+
+
+
+	for (count = 0; count < PRUSS_INSTANCE; count++) {
+		info[count] = (struct uio_info *)kzalloc(sizeof(struct uio_info), GFP_KERNEL);
+		if (!info[count])
+			return -ENOMEM;
+
+	}
+
+	regs_pruram = platform_get_resource(dev, IORESOURCE_MEM, 0);
+	if (!regs_pruram) {
+		dev_err(&dev->dev, "No memory resource specified\n");
+		goto out_free;
+	}
+
+	regs_l3ram = platform_get_resource(dev, IORESOURCE_MEM, 1);
+	if (!regs_l3ram) {
+		dev_err(&dev->dev, "No memory resource specified\n");
+		goto out_free;
+	}
+
+	regs_ddr = platform_get_resource(dev, IORESOURCE_MEM, 2);
+	if (!regs_ddr) {
+		dev_err(&dev->dev, "No memory resource specified\n");
+		goto out_free;
+	}
+	ddr_virt_addr = dma_alloc_coherent(&dev->dev, regs_ddr->end-regs_ddr->start+1, &ddr_phy_addr, GFP_KERNEL|GFP_DMA);
+
+
+	for (count = 0; count < PRUSS_INSTANCE; count++) {
+		info[count]->mem[0].addr = regs_pruram->start;
+		if (!info[count]->mem[0].addr) {
+			dev_err(&dev->dev, "Invalid memory resource\n");
+			break;
+		}
+
+		info[count]->mem[0].size = regs_pruram->end - regs_pruram->start + 1;
+		info[count]->mem[0].internal_addr = ioremap(regs_pruram->start, info[count]->mem[0].size);
+
+		if (!info[count]->mem[0].internal_addr) {
+			dev_err(&dev->dev, "Can't remap memory address range\n");
+			break;
+		}
+		info[count]->mem[0].memtype = UIO_MEM_PHYS;
+
+
+		info[count]->mem[1].addr = regs_l3ram->start;
+		if (!info[count]->mem[1].addr) {
+			dev_err(&dev->dev, "Invalid memory resource\n");
+			break;
+		}
+
+		info[count]->mem[1].size = regs_l3ram->end - regs_l3ram->start + 1;
+		info[count]->mem[1].internal_addr = ioremap(regs_l3ram->start, info[count]->mem[1].size);
+
+		if (!info[count]->mem[1].internal_addr) {
+			dev_err(&dev->dev, "Can't remap memory address range\n");
+			break;
+		}
+		info[count]->mem[1].memtype = UIO_MEM_PHYS;
+
+
+		info[count]->mem[2].size = regs_ddr->end - regs_ddr->start + 1;
+		if (!(info[count]->mem[2].size-1)) {
+			dev_err(&dev->dev, "Invalid memory resource\n");
+			break;
+		}
+
+
+		info[count]->mem[2].internal_addr = ddr_virt_addr;
+
+		if (!info[count]->mem[2].internal_addr) {
+			dev_err(&dev->dev, "Can't remap memory address range\n");
+			break;
+		}
+		info[count]->mem[2].addr = ddr_phy_addr;
+		info[count]->mem[2].memtype = UIO_MEM_PHYS;
+
+
+		string = kzalloc(20, GFP_KERNEL);
+		sprintf(string, "pruss_evt%d", count);
+		info[count]->name = string;
+		info[count]->version = "0.01";
+
+		/* Register PRUSS IRQ lines */
+		info[count]->irq = IRQ_DA8XX_EVTOUT0+count;
+
+		info[count]->irq_flags = IRQF_SHARED;
+		info[count]->handler = pruss_handler;
+
+		ret = uio_register_device(&dev->dev, info[count]);
+
+		if (ret < 0)
+			break;
+	}
+
+	platform_set_drvdata(dev, info);
+
+	if (ret < 0) {
+		if (ddr_virt_addr)
+			dma_free_coherent(&dev->dev, regs_ddr->end - regs_ddr->start + 1, ddr_virt_addr, ddr_phy_addr);
+		while (count--) {
+			uio_unregister_device(info[count]);
+			if (info[count]->name)
+				kfree(info[count]->name);
+			iounmap(info[count]->mem[0].internal_addr);
+		}
+	} else {
+		return 0;
+	}
+
+out_free:
+	for (count = 0; count < PRUSS_INSTANCE; count++) {
+		if (info[count])
+			kfree(info[count]);
+	}
+
+	if (pruss_clk != NULL)
+		clk_put(pruss_clk);
+	if (ecap0_clk != NULL)
+		clk_put(ecap0_clk);
+
+	return ret;
+}
+
+static int __devexit pruss_remove(struct platform_device *dev)
+{
+	int count = 0;
+	struct uio_info **info;
+
+	info = (struct uio_info **)platform_get_drvdata(dev);
+
+	for (count = 0; count < PRUSS_INSTANCE; count++) {
+		uio_unregister_device(info[count]);
+		if (info[count]->name)
+			kfree(info[count]->name);
+
+	}
+	iounmap(info[0]->mem[0].internal_addr);
+	iounmap(info[0]->mem[1].internal_addr);
+	if (ddr_virt_addr)
+		dma_free_coherent(&dev->dev, info[0]->mem[2].size, info[0]->mem[2].internal_addr, info[0]->mem[2].addr);
+
+	for (count = 0; count < PRUSS_INSTANCE; count++) {
+		if (info[count])
+			kfree(info[count]);
+	}
+
+	platform_set_drvdata(dev, NULL);
+
+	if (pruss_clk != NULL)
+		clk_put(pruss_clk);
+	if (ecap0_clk != NULL)
+		clk_put(ecap0_clk);
+
+
+	return 0;
+}
+
+static struct platform_driver pruss_driver = {
+	.probe		= pruss_probe,
+	.remove		= __devexit_p(pruss_remove),
+	.driver		= {
+		.name	= DRV_NAME,
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init pruss_init_module(void)
+{
+	return platform_driver_register(&pruss_driver);
+}
+module_init(pruss_init_module);
+
+static void __exit pruss_exit_module(void)
+{
+	platform_driver_unregister(&pruss_driver);
+}
+module_exit(pruss_exit_module);
+
+MODULE_LICENSE("GPL v2");
+MODULE_VERSION(DRV_VERSION);
+MODULE_AUTHOR("Amit Chatterjee <amit.chatterjee@ti.com>");
+-- 
+1.7.0.4
+
@@ -0,0 +1,243 @@
+From: Melissa Watkins <m-watkins@ti.com>
+Date: Wed, 24 Nov 2010 04:18:07 -0600
+Subject: [PATCH 2/3] uio_pruss2: Platform changes
+
+Adding resources supporting the uio_pru driver within the
+da850 (omapl138) device.
+
+Signed-off-by: Amit Chatterjee <amit.chatterjee@ti.com>
+Signed-off-by: Melissa Watkins <m-watkins@ti.com>
+---
+ arch/arm/configs/da850_omapl138_defconfig  |    8 +++-
+ arch/arm/mach-davinci/board-da850-evm.c    |    3 +
+ arch/arm/mach-davinci/da850.c              |   38 +++++++++++++-
+ arch/arm/mach-davinci/devices-da8xx.c      |   75 ++++++++++++++++++++++++++++
+ arch/arm/mach-davinci/include/mach/da8xx.h |    3 +
+ 5 files changed, 124 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/configs/da850_omapl138_defconfig b/arch/arm/configs/da850_omapl138_defconfig
+index b312050..baebec8 100644
+--- a/arch/arm/configs/da850_omapl138_defconfig
+++ b/arch/arm/configs/da850_omapl138_defconfig
+@@ -1361,6 +1361,7 @@ CONFIG_USB_MUSB_HDRC=y
+ CONFIG_USB_MUSB_SOC=y
+ CONFIG_USB_MUSB_HOST=y
+ # CONFIG_USB_MUSB_PERIPHERAL is not set
+# CONFIG_USB_MUSB_DUAL_ROLE is not set
+ # CONFIG_USB_MUSB_OTG is not set
+ CONFIG_USB_MUSB_HDRC_HCD=y
+ # CONFIG_MUSB_PIO_ONLY is not set
+@@ -1535,7 +1536,12 @@ CONFIG_RTC_INTF_DEV=y
+ CONFIG_RTC_DRV_OMAP=y
+ # CONFIG_DMADEVICES is not set
+ # CONFIG_AUXDISPLAY is not set
+-# CONFIG_UIO is not set
+CONFIG_UIO=y
+# CONFIG_UIO_PDRV is not set
+# CONFIG_UIO_PDRV_GENIRQ is not set
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_SERCOS3 is not set
+CONFIG_UIO_PRUSS=m
+ 
+ #
+ # TI VLYNQ
+diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
+index 009e9b5..1687c7c 100755
+--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
+@@ -1070,6 +1070,9 @@ static __init void da850_evm_init(void)
+ 
+ 	platform_device_register(&da850_gpio_i2c);
+ 
+	/* Register PRUSS device */
+	da8xx_register_pruss();
+
+ 	ret = da8xx_register_watchdog();
+ 	if (ret)
+ 		pr_warning("da830_evm_init: watchdog registration failed: %d\n",
+diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
+index 513ae85..8bd1919 100755
+--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
+@@ -237,6 +237,13 @@ static struct clk tptc2_clk = {
+ 	.flags		= ALWAYS_ENABLED,
+ };
+ 
+static struct clk pruss_clk = {
+	.name		= "pruss",
+	.parent		= &pll0_sysclk2,
+	.lpsc		= DA8XX_LPSC0_DMAX,
+	.flags		= ALWAYS_ENABLED,
+};
+
+ static struct clk uart0_clk = {
+ 	.name		= "uart0",
+ 	.parent		= &pll0_sysclk2,
+@@ -385,13 +392,37 @@ static struct clk usb20_clk = {
+ 	.gpsc		= 1,
+ };
+ 
+-
+ static struct clk sata_clk = {
+ 	.name		= "ahci",
+ 	.parent		= &pll0_sysclk2,
+ 	.lpsc		= DA850_LPSC1_SATA,
+ 	.gpsc		= 1,
+ };
+
+static struct clk ecap0_clk = {
+	.name		= "ecap0",
+	.parent		= &pll0_sysclk2,
+	.lpsc		= DA8XX_LPSC1_ECAP,
+	.flags		= DA850_CLK_ASYNC3,
+	.gpsc		= 1,
+};
+
+static struct clk ecap1_clk = {
+	.name		= "ecap1",
+	.parent		= &pll0_sysclk2,
+	.lpsc		= DA8XX_LPSC1_ECAP,
+	.flags		= DA850_CLK_ASYNC3,
+	.gpsc		= 1,
+};
+
+static struct clk ecap2_clk = {
+	.name		= "ecap2",
+	.parent		= &pll0_sysclk2,
+	.lpsc		= DA8XX_LPSC1_ECAP,
+	.flags		= DA850_CLK_ASYNC3,
+	.gpsc		= 1,
+};
+
+ static struct clk_lookup da850_clks[] = {
+ 	CLK(NULL,		"ref",		&ref_clk),
+ 	CLK(NULL,		"pll0",		&pll0_clk),
+@@ -419,6 +450,7 @@ static struct clk_lookup da850_clks[] = {
+ 	CLK(NULL,		"tptc1",	&tptc1_clk),
+ 	CLK(NULL,		"tpcc1",	&tpcc1_clk),
+ 	CLK(NULL,		"tptc2",	&tptc2_clk),
+	CLK(NULL,       "pruss",    &pruss_clk),
+ 	CLK(NULL,		"uart0",	&uart0_clk),
+ 	CLK(NULL,		"uart1",	&uart1_clk),
+ 	CLK(NULL,		"uart2",	&uart2_clk),
+@@ -441,7 +473,9 @@ static struct clk_lookup da850_clks[] = {
+ 	CLK(NULL,		"usb11",	&usb11_clk),
+ 	CLK(NULL,		"usb20",	&usb20_clk),
+ 	CLK(NULL,		"ahci",		&sata_clk),
+-
+	CLK(NULL,		"ecap0",	&ecap0_clk),
+	CLK(NULL,		"ecap1",	&ecap1_clk),
+	CLK(NULL,		"ecap2",	&ecap2_clk),
+ 	CLK(NULL,		NULL,		NULL),
+ };
+ 
+diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
+index 0842590..94979b3 100755
+--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
+@@ -972,6 +972,81 @@ int __init da8xx_register_sata(void)
+ 	return platform_device_register(&da850_ahci_device);
+ }
+ 
+static struct resource pruss_resources[] = {
+	[0] = {
+		.start  = DA8XX_PRUSS_BASE,
+		.end    = DA8XX_PRUSS_BASE + SZ_64K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start  = DA8XX_L3RAM_BASE,
+		.end    = DA8XX_L3RAM_BASE + SZ_128K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[2] = {
+		.start  = 0,
+		.end    = SZ_256K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+
+	[3] = {
+		.start  = IRQ_DA8XX_EVTOUT0,
+		.end    = IRQ_DA8XX_EVTOUT0,
+		.flags  = IORESOURCE_IRQ,
+	},
+	[4] = {
+		.start  = IRQ_DA8XX_EVTOUT1,
+		.end    = IRQ_DA8XX_EVTOUT1,
+		.flags  = IORESOURCE_IRQ,
+	},
+	[5] = {
+		.start  = IRQ_DA8XX_EVTOUT2,
+		.end    = IRQ_DA8XX_EVTOUT2,
+		.flags  = IORESOURCE_IRQ,
+	},
+	[6] = {
+		.start  = IRQ_DA8XX_EVTOUT3,
+		.end    = IRQ_DA8XX_EVTOUT3,
+		.flags  = IORESOURCE_IRQ,
+	},
+	[7] = {
+		.start  = IRQ_DA8XX_EVTOUT4,
+		.end    = IRQ_DA8XX_EVTOUT4,
+		.flags  = IORESOURCE_IRQ,
+	},
+	[8] = {
+		.start  = IRQ_DA8XX_EVTOUT5,
+		.end    = IRQ_DA8XX_EVTOUT5,
+		.flags  = IORESOURCE_IRQ,
+	},
+	[9] = {
+		.start  = IRQ_DA8XX_EVTOUT6,
+		.end    = IRQ_DA8XX_EVTOUT6,
+		.flags  = IORESOURCE_IRQ,
+	},
+	[10] = {
+		.start  = IRQ_DA8XX_EVTOUT7,
+		.end    = IRQ_DA8XX_EVTOUT7,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device pruss_device = {
+	.name			= "pruss",
+	.id			= 0,
+	.num_resources		= ARRAY_SIZE(pruss_resources),
+	.resource		= pruss_resources,
+	.dev    =	{
+		.coherent_dma_mask = 0xffffffff,
+	}
+
+};
+
+int __init da8xx_register_pruss()
+{
+	return platform_device_register(&pruss_device);
+}
+
+ #define CFGCHIP2	DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)
+ /*
+  * Configure the USB PHY for DA8xx platforms.
+diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
+index f76433f..632d7e2 100755
+--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
+@@ -75,6 +75,8 @@ extern void __iomem *da8xx_syscfg1_base;
+ #define DA8XX_USB0_BASE		0x01e00000
+ #define DA850_SATA_BASE		0x01E18000
+ #define DA850_SATA_CLK_PWRDN	0x01E2C018
+#define DA8XX_PRUSS_BASE       0x01C30000
+#define DA8XX_L3RAM_BASE       0x80000000
+ 
+ #define PINMUX0			0x00
+ #define PINMUX1			0x04
+@@ -162,6 +164,7 @@ int __init da850_register_vpif_capture(struct vpif_capture_config
+ 
+ int cppi41_init(void);
+ int da8xx_register_sata(void);
+int da8xx_register_pruss(void);
+ 
+ 
+ extern struct platform_device da8xx_serial_device;
+-- 
+1.7.0.4
+
@@ -0,0 +1,45 @@
+From: Melissa Watkins <m-watkins@ti.com>
+Date: Wed, 24 Nov 2010 04:20:24 -0600
+Subject: [PATCH 3/3] uio_pruss3: Workarounds put into core code to support our devices
+
+This patch modifies uio.c to support the uio_pruss driver. The UIO user space module relies on IO memory being mapped to user space. The IO map works fine for all mapped virtual addresses less than 0x80000000. However for the uio_pruss driver, the virtual address is on the higher side, so it fails. The fix added in this patch is mainly to check if the page map returned is correct.
+
+Signed-off-by: Amit Chatterjee <amit.chatterjee@ti.com>
+Signed-off-by: Melissa Watkins <m-watkins@ti.com>
+---
+ drivers/uio/uio.c |    9 +++++++--
+ 1 files changed, 7 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/uio/uio.c b/drivers/uio/uio.c
+index e941367..3241d26 100644
+--- a/drivers/uio/uio.c
+++ b/drivers/uio/uio.c
+@@ -19,7 +19,6 @@
+ #include <linux/device.h>
+ #include <linux/mm.h>
+ #include <linux/idr.h>
+-#include <linux/sched.h>
+ #include <linux/string.h>
+ #include <linux/kobject.h>
+ #include <linux/uio_driver.h>
+@@ -615,7 +615,7 @@ static int uio_find_mem_index(struct vm_area_struct *vma)
+ 	for (mi = 0; mi < MAX_UIO_MAPS; mi++) {
+ 		if (idev->info->mem[mi].size == 0)
+ 			return -1;
+-		if (vma->vm_pgoff == mi)
+		if ((idev->info->mem[mi].addr) >> PAGE_SHIFT == vma->vm_pgoff)
+ 			return mi;
+ 	}
+ 	return -1;
+@@ -659,7 +664,7 @@ static int uio_vma_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
+ 	return 0;
+ }
+ 
+-static const struct vm_operations_struct uio_vm_ops = {
+static struct vm_operations_struct uio_vm_ops = {
+ 	.open = uio_vma_open,
+ 	.close = uio_vma_close,
+ 	.fault = uio_vma_fault,
+-- 
+1.7.0.4
+
@@ -0,0 +1,160 @@
+--- /tmp/mach-types	2009-03-17 16:55:42.000000000 +0100
+++ git/arch/arm/tools/mach-types	2009-03-17 16:56:28.000000000 +0100
+@@ -12,7 +12,7 @@
+ #
+ #   http://www.arm.linux.org.uk/developer/machines/?action=new
+ #
+-# Last update: Sun Nov 30 16:39:36 2008
+# Last update: Tue Mar 17 15:56:28 2009
+ #
+ # machine_is_xxx	CONFIG_xxxx		MACH_TYPE_xxx		number
+ #
+@@ -1811,7 +1811,7 @@
+ jade			MACH_JADE		JADE			1821
+ ks8695_softplc		MACH_KS8695_SOFTPLC	KS8695_SOFTPLC		1822
+ gprisc3			MACH_GPRISC3		GPRISC3			1823
+-stamp9260		MACH_STAMP9260		STAMP9260		1824
+stamp9g20		MACH_STAMP9G20		STAMP9G20		1824
+ smdk6430		MACH_SMDK6430		SMDK6430		1825
+ smdkc100		MACH_SMDKC100		SMDKC100		1826
+ tavorevb		MACH_TAVOREVB		TAVOREVB		1827
+@@ -1993,4 +1993,138 @@
+ benzina			MACH_BENZINA		BENZINA			2003
+ blaze			MACH_BLAZE		BLAZE			2004
+ linkstation_ls_hgl	MACH_LINKSTATION_LS_HGL	LINKSTATION_LS_HGL	2005
+-htcvenus		MACH_HTCVENUS		HTCVENUS		2006
+htckovsky		MACH_HTCVENUS		HTCVENUS		2006
+sony_prs505		MACH_SONY_PRS505	SONY_PRS505		2007
+hanlin_v3		MACH_HANLIN_V3		HANLIN_V3		2008
+sapphira		MACH_SAPPHIRA		SAPPHIRA		2009
+dack_sda_01		MACH_DACK_SDA_01	DACK_SDA_01		2010
+armbox			MACH_ARMBOX		ARMBOX			2011
+harris_rvp		MACH_HARRIS_RVP		HARRIS_RVP		2012
+ribaldo			MACH_RIBALDO		RIBALDO			2013
+agora			MACH_AGORA		AGORA			2014
+omap3_mini		MACH_OMAP3_MINI		OMAP3_MINI		2015
+a9sam6432_b		MACH_A9SAM6432_B	A9SAM6432_B		2016
+usg2410			MACH_USG2410		USG2410			2017
+pc72052_i10_revb	MACH_PC72052_I10_REVB	PC72052_I10_REVB	2018
+mx35_exm32		MACH_MX35_EXM32		MX35_EXM32		2019
+topas910		MACH_TOPAS910		TOPAS910		2020
+hyena			MACH_HYENA		HYENA			2021
+pospax			MACH_POSPAX		POSPAX			2022
+hdl_gx			MACH_HDL_GX		HDL_GX			2023
+ctera_4bay		MACH_CTERA_4BAY		CTERA_4BAY		2024
+ctera_plug_c		MACH_CTERA_PLUG_C	CTERA_PLUG_C		2025
+crwea_plug_i		MACH_CRWEA_PLUG_I	CRWEA_PLUG_I		2026
+egauge2			MACH_EGAUGE2		EGAUGE2			2027
+didj			MACH_DIDJ		DIDJ			2028
+m_s3c2443		MACH_MEISTER		MEISTER			2029
+htcblackstone		MACH_HTCBLACKSTONE	HTCBLACKSTONE		2030
+cpuat9g20		MACH_CPUAT9G20		CPUAT9G20		2031
+smdk6440		MACH_SMDK6440		SMDK6440		2032
+omap_35xx_mvp		MACH_OMAP_35XX_MVP	OMAP_35XX_MVP		2033
+ctera_plug_i		MACH_CTERA_PLUG_I	CTERA_PLUG_I		2034
+pvg610_100		MACH_PVG610		PVG610			2035
+hprw6815		MACH_HPRW6815		HPRW6815		2036
+omap3_oswald		MACH_OMAP3_OSWALD	OMAP3_OSWALD		2037
+nas4220b		MACH_NAS4220B		NAS4220B		2038
+htcraphael_cdma		MACH_HTCRAPHAEL_CDMA	HTCRAPHAEL_CDMA		2039
+htcdiamond_cdma		MACH_HTCDIAMOND_CDMA	HTCDIAMOND_CDMA		2040
+scaler			MACH_SCALER		SCALER			2041
+zylonite2		MACH_ZYLONITE2		ZYLONITE2		2042
+aspenite		MACH_ASPENITE		ASPENITE		2043
+teton			MACH_TETON		TETON			2044
+ttc_dkb			MACH_TTC_DKB		TTC_DKB			2045
+bishop2			MACH_BISHOP2		BISHOP2			2046
+ippv5			MACH_IPPV5		IPPV5			2047
+farm926			MACH_FARM926		FARM926			2048
+mmccpu			MACH_MMCCPU		MMCCPU			2049
+sgmsfl			MACH_SGMSFL		SGMSFL			2050
+tt8000			MACH_TT8000		TT8000			2051
+zrn4300lp		MACH_ZRN4300LP		ZRN4300LP		2052
+mptc			MACH_MPTC		MPTC			2053
+h6051			MACH_H6051		H6051			2054
+pvg610_101		MACH_PVG610_101		PVG610_101		2055
+stamp9261_pc_evb	MACH_STAMP9261_PC_EVB	STAMP9261_PC_EVB	2056
+pelco_odysseus		MACH_PELCO_ODYSSEUS	PELCO_ODYSSEUS		2057
+tny_a9260		MACH_TNY_A9260		TNY_A9260		2058
+tny_a9g20		MACH_TNY_A9G20		TNY_A9G20		2059
+aesop_mp2530f		MACH_AESOP_MP2530F	AESOP_MP2530F		2060
+dx900			MACH_DX900		DX900			2061
+cpodc2			MACH_CPODC2		CPODC2			2062
+tilt_8925		MACH_TILT_8925		TILT_8925		2063
+davinci_dm357_evm	MACH_DAVINCI_DM357_EVM	DAVINCI_DM357_EVM	2064
+swordfish		MACH_SWORDFISH		SWORDFISH		2065
+corvus			MACH_CORVUS		CORVUS			2066
+taurus			MACH_TAURUS		TAURUS			2067
+axm			MACH_AXM		AXM			2068
+axc			MACH_AXC		AXC			2069
+baby			MACH_BABY		BABY			2070
+mp200			MACH_MP200		MP200			2071
+pcm043			MACH_PCM043		PCM043			2072
+hanlin_v3c		MACH_HANLIN_V3C		HANLIN_V3C		2073
+kbk9g20			MACH_KBK9G20		KBK9G20			2074
+adsturbog5		MACH_ADSTURBOG5		ADSTURBOG5		2075
+avenger_lite1		MACH_AVENGER_LITE1	AVENGER_LITE1		2076
+suc82x			MACH_SUC		SUC			2077
+at91sam7s256		MACH_AT91SAM7S256	AT91SAM7S256		2078
+mendoza			MACH_MENDOZA		MENDOZA			2079
+kira			MACH_KIRA		KIRA			2080
+mx1hbm			MACH_MX1HBM		MX1HBM			2081
+quatro43xx		MACH_QUATRO43XX		QUATRO43XX		2082
+quatro4230		MACH_QUATRO4230		QUATRO4230		2083
+nsb400			MACH_NSB400		NSB400			2084
+drp255			MACH_DRP255		DRP255			2085
+thoth			MACH_THOTH		THOTH			2086
+firestone		MACH_FIRESTONE		FIRESTONE		2087
+asusp750		MACH_ASUSP750		ASUSP750		2088
+ctera_dl		MACH_CTERA_DL		CTERA_DL		2089
+socr			MACH_SOCR		SOCR			2090
+htcoxygen		MACH_HTCOXYGEN		HTCOXYGEN		2091
+heroc			MACH_HEROC		HEROC			2092
+zeno6800		MACH_ZENO6800		ZENO6800		2093
+sc2mcs			MACH_SC2MCS		SC2MCS			2094
+gene100			MACH_GENE100		GENE100			2095
+as353x			MACH_AS353X		AS353X			2096
+sheevaplug		MACH_SHEEVAPLUG		SHEEVAPLUG		2097
+at91sam9g20		MACH_AT91SAM9G20	AT91SAM9G20		2098
+mv88f6192gtw_fe		MACH_MV88F6192GTW_FE	MV88F6192GTW_FE		2099
+cc9200			MACH_CC9200		CC9200			2100
+sm9200			MACH_SM9200		SM9200			2101
+tp9200			MACH_TP9200		TP9200			2102
+snapperdv		MACH_SNAPPERDV		SNAPPERDV		2103
+avengers_lite		MACH_AVENGERS_LITE	AVENGERS_LITE		2104
+avengers_lite1		MACH_AVENGERS_LITE1	AVENGERS_LITE1		2105
+omap3axon		MACH_OMAP3AXON		OMAP3AXON		2106
+ma8xx			MACH_MA8XX		MA8XX			2107
+mp201ek			MACH_MP201EK		MP201EK			2108
+davinci_tux		MACH_DAVINCI_TUX	DAVINCI_TUX		2109
+mpa1600			MACH_MPA1600		MPA1600			2110
+pelco_troy		MACH_PELCO_TROY		PELCO_TROY		2111
+nsb667			MACH_NSB667		NSB667			2112
+rovers5_4mpix		MACH_ROVERS5_4MPIX	ROVERS5_4MPIX		2113
+twocom			MACH_TWOCOM		TWOCOM			2114
+ubisys_p9_rcu3r2	MACH_UBISYS_P9_RCU3R2	UBISYS_P9_RCU3R2	2115
+hero_espresso		MACH_HERO_ESPRESSO	HERO_ESPRESSO		2116
+afeusb			MACH_AFEUSB		AFEUSB			2117
+t830			MACH_T830		T830			2118
+spd8020_cc		MACH_SPD8020_CC		SPD8020_CC		2119
+om_3d7k			MACH_OM_3D7K		OM_3D7K			2120
+picocom2		MACH_PICOCOM2		PICOCOM2		2121
+uwg4mx27		MACH_UWG4MX27		UWG4MX27		2122
+uwg4mx31		MACH_UWG4MX31		UWG4MX31		2123
+cherry			MACH_CHERRY		CHERRY			2124
+mx51_babbage		MACH_MX51_BABBAGE	MX51_BABBAGE		2125
+s3c2440turkiye		MACH_S3C2440TURKIYE	S3C2440TURKIYE		2126
+tx37			MACH_TX37		TX37			2127
+sbc2800_9g20		MACH_SBC2800_9G20	SBC2800_9G20		2128
+benzglb			MACH_BENZGLB		BENZGLB			2129
+benztd			MACH_BENZTD		BENZTD			2130
+cartesio_plus		MACH_CARTESIO_PLUS	CARTESIO_PLUS		2131
+solrad_g20		MACH_SOLRAD_G20		SOLRAD_G20		2132
+mx27wallace		MACH_MX27WALLACE	MX27WALLACE		2133
+fmzwebmodul		MACH_FMZWEBMODUL	FMZWEBMODUL		2134
+rd78x00_masa		MACH_RD78X00_MASA	RD78X00_MASA		2135
+smallogger		MACH_SMALLOGGER		SMALLOGGER		2136
+ccw9p9215		MACH_CCW9P9215		CCW9P9215		2137
+dm355_leopard		MACH_DM355_LEOPARD	DM355_LEOPARD		2138
+ts219			MACH_TS219		TS219			2139
+tny_a9263		MACH_TNY_A9263		TNY_A9263		2140
@@ -0,0 +1,200 @@
+Subject:
+[PATCH 2/7] interface for configuring CCDC and common ccdc types
+From:
+m-karicheri2-l0cyMroinI0@public.gmane.org
+Date:
+Fri, 13 Mar 2009 17:22:39 -0400
+To:
+davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org, davinci_opensource_ccb-uAqBSO/uNfhBDgjK7y7TUQ@public.gmane.org, psp_video-uAqBSO/uNfhBDgjK7y7TUQ@public.gmane.org
+Newsgroups:
+gmane.linux.davinci
+
+Adding an interface for configuring ccdc as per data format of decoder
+output. Also adds a header file for common ccdc data types. 
+
+Signed-off-by: Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>
+---
+ include/media/davinci/ccdc_common.h    |   48 +++++++++++++
+ include/media/davinci/ccdc_hw_device.h |  117 ++++++++++++++++++++++++++++++++
+ 2 files changed, 165 insertions(+), 0 deletions(-)
+ create mode 100644 include/media/davinci/ccdc_common.h
+ create mode 100644 include/media/davinci/ccdc_hw_device.h
+
+diff --git a/include/media/davinci/ccdc_common.h b/include/media/davinci/ccdc_common.h
+new file mode 100644
+index 0000000..0992af5
+--- /dev/null
+++ b/include/media/davinci/ccdc_common.h
+@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2008-2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ **************************************************************************/
+#ifndef _CCDC_COMMON_H
+#define _CCDC_COMMON_H
+enum ccdc_pixfmt {
+	CCDC_PIXFMT_RAW = 0,
+	CCDC_PIXFMT_YCBCR_16BIT = 1,
+	CCDC_PIXFMT_YCBCR_8BIT = 2
+};
+
+enum ccdc_frmfmt {
+	CCDC_FRMFMT_PROGRESSIVE = 0,
+	CCDC_FRMFMT_INTERLACED = 1
+};
+
+/* PIXEL ORDER IN MEMORY from LSB to MSB */
+/* only applicable for 8-bit input mode  */
+enum ccdc_pixorder {
+	CCDC_PIXORDER_CBYCRY = 1,
+	CCDC_PIXORDER_YCBYCR = 0
+};
+
+enum ccdc_buftype {
+	CCDC_BUFTYPE_FLD_INTERLEAVED,
+	CCDC_BUFTYPE_FLD_SEPARATED
+};
+
+enum ccdc_pinpol {
+	CCDC_PINPOL_POSITIVE = 0,
+	CCDC_PINPOL_NEGATIVE = 1
+};
+#endif
+diff --git a/include/media/davinci/ccdc_hw_device.h b/include/media/davinci/ccdc_hw_device.h
+new file mode 100644
+index 0000000..4ae9876
+--- /dev/null
+++ b/include/media/davinci/ccdc_hw_device.h
+@@ -0,0 +1,117 @@
+/*
+ * Copyright (C) 2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * ccdc device API
+ */
+#ifndef _CCDC_HW_DEVICE_H
+#define _CCDC_HW_DEVICE_H
+
+#ifdef __KERNEL__
+#include <linux/videodev2.h>
+#include <linux/device.h>
+#include <media/davinci/vpfe_types.h>
+#include <media/davinci/ccdc_common.h>
+/*
+ * Maximum number of capture channels supported by VPFE
+ */
+#define CCDC_CAPTURE_NUM_CHANNELS 1
+/*
+ * vpfe hw interface
+ */
+struct ccdc_hw_device {
+
+	/* vpfe device name */
+	char name[30];
+
+	/* Pointer to initialize function to initialize ccdc device */
+	int (*open) (struct device *dev);
+	/* Set of functions pointers for control related functions.
+	 * Use queryctrl of decoder interface to check if it is a decoder
+	 * control id. If not passed to ccdc to process it
+	 */
+	/* set ccdc base address */
+	void (*set_ccdc_base)(void *base, int size);
+
+	/* set vpss base address */
+	void (*set_vpss_base)(void *base, int size);
+
+	/* get ccdc base */
+	void * (*get_ccdc_base)(void);
+
+	/* get vpss base */
+	void * (*get_vpss_base)(void);
+
+	void (*enable) (int en);
+	/*
+	 * Pointer to function to enable or disable ccdc
+	 */
+	u32 (*reset) (void);
+	/* reset sbl. only for 6446 */
+	void (*enable_out_to_sdram) (int en);
+	/* Pointer to function to set hw frame type */
+	int (*set_hw_if_type) (enum vpfe_hw_if_type iface);
+	/* get interface parameters */
+	int (*get_hw_if_params) (struct vpfe_hw_if_param *param);
+	/* Pointer to function to set parameters. Used
+	 * for implementing VPFE_S_CCDC_PARAMS
+	 */
+	int (*setparams) (void *params);
+	/* Pointer to function to get parameter. Used
+	 * for implementing VPFE_G_CCDC_PARAMS
+	 */
+	int (*getparams) (void *params);
+	/* Pointer to function to configure ccdc */
+	int (*configure) (void);
+
+	/* enumerate hw pix formats */
+	int (*enum_pix)(enum vpfe_hw_pix_format *hw_pix, int i);
+	/* Pointer to function to set buffer type */
+	int (*set_buftype) (enum ccdc_buftype buf_type);
+	/* Pointer to function to get buffer type */
+	int (*get_buftype) (enum ccdc_buftype *buf_type);
+	/* Pointer to function to set frame format */
+	int (*set_frame_format) (enum ccdc_frmfmt frm_fmt);
+	/* Pointer to function to get frame format */
+	int (*get_frame_format) (enum ccdc_frmfmt *frm_fmt);
+	/* Pointer to function to set buffer type */
+	int (*get_pixelformat) (enum vpfe_hw_pix_format *pixfmt);
+	/* Pointer to function to get pixel format. Uses V4L2 type */
+	int (*set_pixelformat) (enum vpfe_hw_pix_format pixfmt);
+	/* Pointer to function to set image window */
+	int (*set_image_window) (struct v4l2_rect *win);
+	/* Pointer to function to set image window */
+	int (*get_image_window) (struct v4l2_rect *win);
+	/* Pointer to function to get line length */
+	int (*get_line_length) (unsigned int *len);
+
+	/* Query SoC control IDs */
+	int (*queryctrl)(struct v4l2_queryctrl *qctrl);
+	/* Set SoC control */
+	int (*setcontrol)(struct v4l2_control *ctrl);
+	/* Get SoC control */
+	int (*getcontrol)(struct v4l2_control *ctrl);
+	/* Pointer to function to set current standard info */
+	/* Pointer to function to set frame buffer address */
+	void (*setfbaddr) (unsigned long addr);
+	/* Pointer to function to get field id */
+	int (*getfid) (void);
+	/* Pointer to deinitialize function */
+	int (*close) (struct device *dev);
+};
+
+#endif
+#endif
+-- 1.6.0.4 
@@ -0,0 +1,132 @@
+Subject:
+[PATCH 5/7] Kconfig and Makefile changes for vpfe capture driver
+From:
+m-karicheri2-l0cyMroinI0@public.gmane.org
+Date:
+Fri, 13 Mar 2009 17:23:32 -0400
+To:
+davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org, davinci_opensource_ccb-uAqBSO/uNfhBDgjK7y7TUQ@public.gmane.org, psp_video-uAqBSO/uNfhBDgjK7y7TUQ@public.gmane.org
+Newsgroups:
+gmane.linux.davinci
+
+Adding updates to video Kconfig and Makefile and adding
+Makefile for building vpfe-capture files
+
+Signed-off-by: Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>
+---
+ drivers/media/video/Kconfig          |   48 ++++++++++++++++++++++++----------
+ drivers/media/video/Makefile         |    6 +---
+ drivers/media/video/davinci/Makefile |    8 +++++
+ 3 files changed, 43 insertions(+), 19 deletions(-)
+ create mode 100644 drivers/media/video/davinci/Makefile
+
+diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
+index 1dd98d8..ea3a526 100644
+--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
+@@ -485,25 +485,45 @@ config VIDEO_VIVI
+ 	  Say Y here if you want to test video apps or debug V4L devices.
+ 	  In doubt, say N.
+ 
+-config VIDEO_TVP5146
+-	tristate "TVP5146 video decoder"
+-	depends on I2C && ARCH_DAVINCI
+config VIDEO_VPFE_CAPTURE
+	tristate "VPFE Video Capture Driver"
+	depends on VIDEO_V4L2 && ARCH_DAVINCI
+	select VIDEOBUF_DMA_CONTIG
+ 	help
+-	  Support for I2C bus based TVP5146 configuration.
+	  Support for DMXXXX VPFE based frame grabber. This is the
+	  common V4L2 module for following DMXXX SoCs from Texas
+	  Instruments:- DM6446 & DM355.
+ 
+ 	  To compile this driver as a module, choose M here: the
+-	  module will be called tvp5146.
+	  module will be called vpfe-capture.
+ 
+-config VIDEO_DAVINCI
+-	tristate "Davinci Video Capture"
+-	depends on VIDEO_DEV && VIDEO_TVP5146 && ARCH_DAVINCI
+-	select VIDEOBUF_GEN
+-	select VIDEOBUF_DMA_SG
+config VIDEO_DAVINCI_CCDC
+	tristate "DM6446 CCDC HW module"
+	depends on ARCH_DAVINCI_DM644x && VIDEO_VPFE_CAPTURE
+	default y
+ 	help
+-	  Support for Davinci based frame grabber through CCDC.
+-
+-	  To compile this driver as a module, choose M here: the
+-	  module will be called vpfe.
+	   Enables DaVinci CCD hw module. DaVinci CCDC hw interfaces
+	   with decoder modules such as TVP5146 over BT656 or
+	   sensor module such as MT9T001 over a raw interface. This
+	   module configures the interface and CCDC/ISIF to do
+	   video frame capture from slave decoders.
+
+	   To compile this driver as a module, choose M here: the
+	   module will be called vpfe.
+
+config VIDEO_DM355_CCDC
+	tristate "DM355 CCDC HW module"
+	depends on ARCH_DAVINCI_DM355 && VIDEO_VPFE_CAPTURE
+	default y
+	help
+	   Enables DM355 CCD hw module. DM355 CCDC hw interfaces
+	   with decoder modules such as TVP5146 over BT656 or
+	   sensor module such as MT9T001 over a raw interface. This
+	   module configures the interface and CCDC/ISIF to do
+	   video frame capture from a slave decoders
+
+	   To compile this driver as a module, choose M here: the
+	   module will be called vpfe.
+ 
+ source "drivers/media/video/bt8xx/Kconfig"
+ 
+diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
+index 863b5c8..f8b6c0c 100644
+--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
+@@ -10,8 +10,6 @@ stkwebcam-objs	:=	stk-webcam.o stk-sensor.o
+ 
+ omap2cam-objs	:=	omap24xxcam.o omap24xxcam-dma.o
+ 
+-davinci-vpfe-objs   :=  ccdc_davinci.o davinci_vpfe.o
+-
+ videodev-objs	:=	v4l2-dev.o v4l2-ioctl.o
+ 
+ videodev-objs	:=	v4l2-dev.o v4l2-ioctl.o v4l2-device.o v4l2-subdev.o
+@@ -29,6 +27,7 @@ endif
+ 
+ obj-$(CONFIG_VIDEO_TUNER) += tuner.o
+ 
+obj-$(CONFIG_ARCH_DAVINCI)        += davinci/
+ obj-$(CONFIG_VIDEO_BT848) += bt8xx/
+ obj-$(CONFIG_VIDEO_IR_I2C)  += ir-kbd-i2c.o
+ obj-$(CONFIG_VIDEO_TVAUDIO) += tvaudio.o
+@@ -135,9 +134,6 @@ obj-$(CONFIG_USB_S2255)		+= s2255drv.o
+ obj-$(CONFIG_VIDEO_IVTV) += ivtv/
+ obj-$(CONFIG_VIDEO_CX18) += cx18/
+ 
+-obj-$(CONFIG_VIDEO_DAVINCI)     += davinci-vpfe.o
+-obj-$(CONFIG_VIDEO_TVP5146)     += tvp5146.o
+-
+ obj-$(CONFIG_VIDEO_VIVI) += vivi.o
+ obj-$(CONFIG_VIDEO_CX23885) += cx23885/
+ 
+diff --git a/drivers/media/video/davinci/Makefile b/drivers/media/video/davinci/Makefile
+new file mode 100644
+index 0000000..77fe038
+--- /dev/null
+++ b/drivers/media/video/davinci/Makefile
+@@ -0,0 +1,8 @@
+#
+# Makefile for the davinci video device drivers.
+#
+
+# Capture: DaVinci and DM355
+obj-$(CONFIG_VIDEO_DAVINCI_CCDC) += ccdc_davinci.o
+obj-$(CONFIG_VIDEO_DM355_CCDC) += ccdc_dm355.o
+obj-$(CONFIG_VIDEO_VPFE_CAPTURE) += vpfe_capture.o
+-- 1.6.0.4 
@@ -0,0 +1,224 @@
+Subject:
+[PATCH 6/7] platform-related-updates for vpfe capture driver on DM6446
+From:
+m-karicheri2-l0cyMroinI0@public.gmane.org
+Date:
+Fri, 13 Mar 2009 17:24:04 -0400
+To:
+davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org, davinci_opensource_ccb-uAqBSO/uNfhBDgjK7y7TUQ@public.gmane.org, psp_video-uAqBSO/uNfhBDgjK7y7TUQ@public.gmane.org
+Newsgroups:
+gmane.linux.davinci
+
+Add platform related changes for vpfe capture driver on DM6446
+
+Signed-off-by: Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>
+---
+ arch/arm/mach-davinci/board-dm644x-evm.c    |   88 ++++++++++++++++++++++++++-
+ arch/arm/mach-davinci/dm644x.c              |   42 +++++++++++++
+ arch/arm/mach-davinci/include/mach/dm644x.h |    2 +
+ 3 files changed, 130 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
+index 20ec961..5f4d9a8 100644
+--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
+@@ -27,7 +27,9 @@
+ #include <linux/io.h>
+ #include <linux/phy.h>
+ #include <linux/clk.h>
+-
+#include <linux/videodev2.h>
+#include <media/v4l2-int-device.h>
+#include <media/tvp514x.h>
+ #include <asm/setup.h>
+ #include <asm/mach-types.h>
+ 
+@@ -161,6 +163,41 @@ static struct platform_device davinci_fb_device = {
+ 	.num_resources = 0,
+ };
+ 
+
+#define TVP514X_STD_ALL	(V4L2_STD_NTSC | V4L2_STD_PAL)
+static struct vpfe_capture_input vpfe_capture_inputs = {
+	.num_inputs = VPFE_MAX_DEC_INPUTS,
+	.current_input = 0,
+	.inputs[0] = {
+		.dec_name = TVP514X_MODULE_NAME,
+		.input = {
+			.index = 0,
+			.name = "COMPOSITE",
+			.type = V4L2_INPUT_TYPE_CAMERA,
+			.std = TVP514X_STD_ALL,
+		},
+		.route = {
+			.input = INPUT_CVBS_VI2B,
+			.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+		},
+		.routing_supported = 1,
+	},
+	.inputs[1] = {
+		.dec_name = TVP514X_MODULE_NAME,
+		.input = {
+			.index = 1,
+			.name = "SVIDEO",
+			.type = V4L2_INPUT_TYPE_CAMERA,
+			.std = TVP514X_STD_ALL,
+		},
+		.route = {
+			.input = INPUT_SVIDEO_VI2C_VI1C,
+			.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+		},
+		.routing_supported = 1,
+	},
+};
+
+ static struct platform_device rtc_dev = {
+ 	.name           = "rtc_davinci_evm",
+ 	.id             = -1,
+@@ -447,6 +484,48 @@ int dm6446evm_eeprom_write(void *buf, off_t off, size_t count)
+ }
+ EXPORT_SYMBOL(dm6446evm_eeprom_write);
+ 
+#define TVP5146_I2C_ADDR		(0x5D)
+static struct v4l2_ifparm tvp5146_ifparm = {
+	.if_type = V4L2_IF_TYPE_BT656,
+	.u = {
+	      .bt656 = {
+			.frame_start_on_rising_vs = 1,
+			.bt_sync_correct = 0,
+			.swap = 0,
+			.latch_clk_inv = 0,
+			.nobt_hs_inv = 0,	/* active high */
+			.nobt_vs_inv = 0,	/* active high */
+			.mode = V4L2_IF_TYPE_BT656_MODE_BT_8BIT,
+			.clock_min = TVP514X_XCLK_BT656,
+			.clock_max = TVP514X_XCLK_BT656,
+			},
+	      },
+};
+
+/**
+ * @brief tvp5146_g_ifparm - Returns the TVP5146 decoder interface parameters
+ *
+ * @param p - pointer to v4l2_ifparm structure
+ * @return result of operation - 0 is success
+ */
+static int tvp5146_g_ifparm(struct v4l2_ifparm *p)
+{
+	if (p == NULL)
+		return -EINVAL;
+
+	*p = tvp5146_ifparm;
+	return 0;
+}
+
+#define TVP5146_NUM_INPUTS		ARRAY_SIZE(tvp5146_input_list)
+
+static struct tvp514x_platform_data tvp5146_pdata = {
+	.master = CAPTURE_DRV_NAME,
+	.ifparm = tvp5146_g_ifparm,
+	.hs_polarity = 1,
+	.vs_polarity = 1
+};
+
+ /*
+  * MSP430 supports RTC, card detection, input from IR remote, and
+  * a bit more.  It triggers interrupts on GPIO(7) from pressing
+@@ -557,9 +636,12 @@ static struct i2c_board_info __initdata i2c_info[] =  {
+ 		I2C_BOARD_INFO("24c256", 0x50),
+ 		.platform_data	= &eeprom_info,
+ 	},
+	{
+		I2C_BOARD_INFO("tvp5146", TVP5146_I2C_ADDR),
+		.platform_data = &tvp5146_pdata,
+	},
+ 	/* ALSO:
+ 	 * - tvl320aic33 audio codec (0x1b)
+-	 * - tvp5146 video decoder (0x5d)
+ 	 */
+ };
+ 
+@@ -591,6 +673,8 @@ static void __init
+ davinci_evm_map_io(void)
+ {
+ 	davinci_map_common_io();
+	/* setup input configuration for VPFE input devices */
+	setup_vpfe_input_config(&vpfe_capture_inputs);
+ 	dm644x_init();
+ }
+ 
+diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
+index 03946fd..f46095e 100644
+--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
+@@ -419,6 +419,46 @@ static struct platform_device dm644x_edma_device = {
+ 	.resource		= edma_resources,
+ };
+ 
+static struct resource vpfe_resources[] = {
+	{
+		.start          = IRQ_VDINT0,
+		.end            = IRQ_VDINT0,
+		.flags          = IORESOURCE_IRQ,
+	},
+	{
+		.start          = IRQ_VDINT1,
+		.end            = IRQ_VDINT1,
+		.flags          = IORESOURCE_IRQ,
+	},
+	{
+		.start          = 0x01c70400,
+		.end            = 0x01c70400 + 0xff,
+		.flags          = IORESOURCE_MEM,
+	},
+	{
+		.start          = 0x01c73400,
+		.end            = 0x01c73400 + 0xff,
+		.flags          = IORESOURCE_MEM,
+	},
+};
+
+static u64 vpfe_capture_dma_mask = DMA_32BIT_MASK;
+static struct platform_device vpfe_capture_dev = {
+	.name		= CAPTURE_DRV_NAME,
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(vpfe_resources),
+	.resource	= vpfe_resources,
+	.dev = {
+		.dma_mask		= &vpfe_capture_dma_mask,
+		.coherent_dma_mask	= DMA_32BIT_MASK,
+	},
+};
+
+void setup_vpfe_input_config(struct vpfe_capture_input *input_config)
+{
+	vpfe_capture_dev.dev.platform_data = input_config;
+}
+
+ /*----------------------------------------------------------------------*/
+ 
+ void __init dm644x_init(void)
+@@ -433,6 +473,8 @@ static int __init dm644x_init_devices(void)
+ 		return 0;
+ 
+ 	platform_device_register(&dm644x_edma_device);
+	/* Register VPFE capture device */
+	platform_device_register(&vpfe_capture_dev);
+ 	return 0;
+ }
+ postcore_initcall(dm644x_init_devices);
+diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h
+index 5b3d512..14f9a8a 100644
+--- a/arch/arm/mach-davinci/include/mach/dm644x.h
+++ b/arch/arm/mach-davinci/include/mach/dm644x.h
+@@ -23,7 +23,9 @@
+ #define __ASM_ARCH_DM644X_H
+ 
+ #include <mach/hardware.h>
+#include <media/davinci/vpfe_capture.h>
+ 
+ void __init dm644x_init(void);
+void setup_vpfe_input_config(struct vpfe_capture_input *input_config);
+ 
+ #endif /* __ASM_ARCH_DM644X_H */
+-- 1.6.0.4 
@@ -0,0 +1,283 @@
+Subject:
+[PATCH 7/7] DM355 platform related changes for vpfe capture driver
+From:
+m-karicheri2-l0cyMroinI0@public.gmane.org
+Date:
+Fri, 13 Mar 2009 17:24:34 -0400
+To:
+davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org, davinci_opensource_ccb-uAqBSO/uNfhBDgjK7y7TUQ@public.gmane.org, psp_video-uAqBSO/uNfhBDgjK7y7TUQ@public.gmane.org
+Newsgroups:
+gmane.linux.davinci
+
+Add platform related changes for vpfe capture driver on DM355
+
+Signed-off-by: Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>
+---
+ arch/arm/mach-davinci/board-dm355-evm.c    |   91 +++++++++++++++++++++++++++-
+ arch/arm/mach-davinci/dm355.c              |   64 +++++++++++++++++++
+ arch/arm/mach-davinci/include/mach/dm355.h |    2 +
+ arch/arm/mach-davinci/include/mach/mux.h   |    9 +++
+ 4 files changed, 163 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
+index e104650..aaa58ba 100644
+--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
+@@ -20,6 +20,8 @@
+ #include <linux/io.h>
+ #include <linux/gpio.h>
+ #include <linux/clk.h>
+#include <media/v4l2-int-device.h>
+#include <media/tvp514x.h>
+ #include <linux/spi/spi.h>
+ #include <linux/spi/eeprom.h>
+ 
+@@ -134,12 +136,58 @@ static void dm355evm_mmcsd_gpios(unsigned gpio)
+ 	dm355evm_mmc_gpios = gpio;
+ }
+ 
+#define TVP5146_I2C_ADDR		0x5D
+static struct v4l2_ifparm tvp5146_ifparm = {
+	.if_type = V4L2_IF_TYPE_BT656,
+	.u = {
+	      .bt656 = {
+			.frame_start_on_rising_vs = 1,
+			.bt_sync_correct = 0,
+			.swap = 0,
+			.latch_clk_inv = 0,
+			.nobt_hs_inv = 0,	/* active high */
+			.nobt_vs_inv = 0,	/* active high */
+			.mode = V4L2_IF_TYPE_BT656_MODE_BT_8BIT,
+			.clock_min = TVP514X_XCLK_BT656,
+			.clock_max = TVP514X_XCLK_BT656,
+			},
+	      },
+};
+
+/**
+ * @brief tvp5146_g_ifparm - Returns the TVP5146 decoder interface parameters
+ *
+ * @param p - pointer to v4l2_ifparm structure
+ * @return result of operation - 0 is success
+ */
+static int tvp5146_g_ifparm(struct v4l2_ifparm *p)
+{
+	if (p == NULL)
+		return -EINVAL;
+
+	*p = tvp5146_ifparm;
+	return 0;
+}
+
+#define TVP5146_NUM_INPUTS		ARRAY_SIZE(tvp5146_input_list)
+
+static struct tvp514x_platform_data tvp5146_pdata = {
+	.master = CAPTURE_DRV_NAME,
+	.ifparm = tvp5146_g_ifparm,
+	.hs_polarity = 1,
+	.vs_polarity = 1
+};
+
+ static struct i2c_board_info dm355evm_i2c_info[] = {
+-	{ I2C_BOARD_INFO("dm355evm_msp", 0x25),
+	{	I2C_BOARD_INFO("dm355evm_msp", 0x25),
+ 		.platform_data = dm355evm_mmcsd_gpios,
+-		/* plus irq */ },
+	},
+	{
+		I2C_BOARD_INFO("tvp5146", TVP5146_I2C_ADDR),
+		.platform_data = &tvp5146_pdata,
+	},
+	/* { plus irq  }, */
+ 	/* { I2C_BOARD_INFO("tlv320aic3x", 0x1b), }, */
+-	/* { I2C_BOARD_INFO("tvp5146", 0x5d), }, */
+ };
+ 
+ static void __init evm_init_i2c(void)
+@@ -178,6 +226,41 @@ static struct platform_device dm355evm_dm9000 = {
+ 	.num_resources	= ARRAY_SIZE(dm355evm_dm9000_rsrc),
+ };
+ 
+#define TVP514X_STD_ALL	(V4L2_STD_NTSC | V4L2_STD_PAL)
+
+static struct vpfe_capture_input vpfe_capture_inputs = {
+	.num_inputs = VPFE_MAX_DEC_INPUTS,
+	.current_input = 0,
+	.inputs[0] = {
+		.dec_name = TVP514X_MODULE_NAME,
+		.input = {
+			.index = 0,
+			.name = "COMPOSITE",
+			.type = V4L2_INPUT_TYPE_CAMERA,
+			.std = TVP514X_STD_ALL,
+		},
+		.route = {
+			.input = INPUT_CVBS_VI2B,
+			.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+		},
+		.routing_supported = 1,
+	},
+	.inputs[1] = {
+		.dec_name = TVP514X_MODULE_NAME,
+		.input = {
+			.index = 1,
+			.name = "SVIDEO",
+			.type = V4L2_INPUT_TYPE_CAMERA,
+			.std = TVP514X_STD_ALL,
+		},
+		.route = {
+			.input = INPUT_SVIDEO_VI2C_VI1C,
+			.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+		},
+		.routing_supported = 1,
+	},
+};
+
+ static struct platform_device *davinci_evm_devices[] __initdata = {
+ 	&dm355evm_dm9000,
+ 	&davinci_nand_device,
+@@ -190,6 +273,8 @@ static struct davinci_uart_config uart_config __initdata = {
+ static void __init dm355_evm_map_io(void)
+ {
+ 	davinci_map_common_io();
+	/* setup input configuration for VPFE input devices */
+	setup_vpfe_input_config(&vpfe_capture_inputs);
+ 	dm355_init();
+ }
+ 
+diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
+index 5f31649..e2612dd 100644
+--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
+@@ -463,6 +463,14 @@ INT_CFG(DM355,  INT_EDMA_TC1_ERR,     4,    1,    1,     false)
+ EVT_CFG(DM355,  EVT8_ASP1_TX,	      0,    1,    0,     false)
+ EVT_CFG(DM355,  EVT9_ASP1_RX,	      1,    1,    0,     false)
+ EVT_CFG(DM355,  EVT26_MMC0_RX,	      2,    1,    0,     false)
+
+MUX_CFG(DM355,	VIN_PCLK,	0,   14,    1,    1,	 false)
+MUX_CFG(DM355,	VIN_CAM_WEN,	0,   13,    1,    1,	 false)
+MUX_CFG(DM355,	VIN_CAM_VD,	0,   12,    1,    1,	 false)
+MUX_CFG(DM355,	VIN_CAM_HD,	0,   11,    1,    1,	 false)
+MUX_CFG(DM355,	VIN_YIN_EN,	0,   10,    1,    1,	 false)
+MUX_CFG(DM355,	VIN_CINL_EN,	0,   0,   0xff, 0x55,	 false)
+MUX_CFG(DM355,	VIN_CINH_EN,	0,   8,     3,    3,	 false)
+ };
+ 
+ /*----------------------------------------------------------------------*/
+@@ -520,6 +528,47 @@ static struct platform_device dm355_edma_device = {
+ 	.resource		= edma_resources,
+ };
+ 
+static struct resource vpfe_resources[] = {
+	{
+		.start          = IRQ_VDINT0,
+		.end            = IRQ_VDINT0,
+		.flags          = IORESOURCE_IRQ,
+	},
+	{
+		.start          = IRQ_VDINT1,
+		.end            = IRQ_VDINT1,
+		.flags          = IORESOURCE_IRQ,
+	},
+	/* CCDC Base address */
+	{
+		.flags          = IORESOURCE_MEM,
+		.start          = 0x01c70600,
+		.end            = 0x01c70600 + 0x1ff,
+	},
+	/* VPSS Base address */
+	{
+		.start          = 0x01c70800,
+		.end            = 0x01c70800 + 0xff,
+		.flags          = IORESOURCE_MEM,
+	},
+};
+
+static u64 vpfe_capture_dma_mask = DMA_32BIT_MASK;
+static struct platform_device vpfe_capture_dev = {
+	.name		= CAPTURE_DRV_NAME,
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(vpfe_resources),
+	.resource	= vpfe_resources,
+	.dev = {
+		.dma_mask		= &vpfe_capture_dma_mask,
+		.coherent_dma_mask	= DMA_32BIT_MASK,
+	},
+};
+
+void setup_vpfe_input_config(struct vpfe_capture_input *input_config)
+{
+	vpfe_capture_dev.dev.platform_data = input_config;
+}
+ /*----------------------------------------------------------------------*/
+ 
+ void __init dm355_init(void)
+@@ -528,13 +577,28 @@ void __init dm355_init(void)
+ 	davinci_mux_register(dm355_pins, ARRAY_SIZE(dm355_pins));;
+ }
+ 
+#define DM355_VPSSCLK_CLKCTRL_REG	0x1c70004
+ static int __init dm355_init_devices(void)
+ {
+	void __iomem *base = IO_ADDRESS(DM355_VPSSCLK_CLKCTRL_REG);
+ 	if (!cpu_is_davinci_dm355())
+ 		return 0;
+ 
+ 	davinci_cfg_reg(DM355_INT_EDMA_CC);
+ 	platform_device_register(&dm355_edma_device);
+	/* setup clock for vpss modules */
+	__raw_writel(0x79, base);
+	/* setup Mux configuration for vpfe input and register
+	 * vpfe capture platform device
+	 */
+	davinci_cfg_reg(DM355_VIN_PCLK);
+	davinci_cfg_reg(DM355_VIN_CAM_WEN);
+	davinci_cfg_reg(DM355_VIN_CAM_VD);
+	davinci_cfg_reg(DM355_VIN_CAM_HD);
+	davinci_cfg_reg(DM355_VIN_YIN_EN);
+	davinci_cfg_reg(DM355_VIN_CINL_EN);
+	davinci_cfg_reg(DM355_VIN_CINH_EN);
+	platform_device_register(&vpfe_capture_dev);
+ 	return 0;
+ }
+ postcore_initcall(dm355_init_devices);
+diff --git a/arch/arm/mach-davinci/include/mach/dm355.h b/arch/arm/mach-davinci/include/mach/dm355.h
+index f7100b6..0b3bd76 100644
+--- a/arch/arm/mach-davinci/include/mach/dm355.h
+++ b/arch/arm/mach-davinci/include/mach/dm355.h
+@@ -12,6 +12,7 @@
+ #define __ASM_ARCH_DM355_H
+ 
+ #include <mach/hardware.h>
+#include <media/davinci/vpfe_capture.h>
+ 
+ void __init dm355_init(void);
+ 
+@@ -19,5 +20,6 @@ struct spi_board_info;
+ 
+ void dm355_init_spi0(unsigned chipselect_mask,
+ 		struct spi_board_info *info, unsigned len);
+void setup_vpfe_input_config(struct vpfe_capture_input *input_config);
+ 
+ #endif /* __ASM_ARCH_DM355_H */
+diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
+index cd95629..4c135b0 100644
+--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
+@@ -149,6 +149,15 @@ enum davinci_dm355_index {
+ 	DM355_EVT8_ASP1_TX,
+ 	DM355_EVT9_ASP1_RX,
+ 	DM355_EVT26_MMC0_RX,
+
+	/* Video In Pin Mux */
+	DM355_VIN_PCLK,
+	DM355_VIN_CAM_WEN,
+	DM355_VIN_CAM_VD,
+	DM355_VIN_CAM_HD,
+	DM355_VIN_YIN_EN,
+	DM355_VIN_CINL_EN,
+	DM355_VIN_CINH_EN,
+ };
+ 
+ #ifdef CONFIG_DAVINCI_MUX
+-- 1.6.0.4 
@@ -0,0 +1,93 @@
+require multi-kernel.inc
+
+DESCRIPTION = "Linux kernel for DaVinci processors"
+KERNEL_IMAGETYPE = "uImage"
+
+COMPATIBLE_MACHINE = "(dm355-evm|dm365-evm|dm6446-evm|dm6467-evm|dm6467t-evm|omapl137|omapl138|dm355-leopard|davinci-sffsdr|hawkboard)"
+
+DEFAULT_PREFERENCE = "1"
+DEFAULT_PREFERENCE_dm365 = "-1"
+
+BRANCH = "master"
+
+S = "${WORKDIR}/git"
+
+# DaVinci DM3xx/DM6xxx
+# dm355-evm/dm365-evm/dm6446-evm/dm6467-evm/dm6467t-evm Davinci PSP 03.01.00/03.02.00 (build r30)
+# The main PR is now using MACHINE_KERNEL_PR, for davinci see conf/machine/include/davinci.inc
+
+ARAGO_DM_REV = "e87a8397d2830db11ce1518bd2abc4e8815763f1"
+ARAGO_DM_PV  = "2.6.31+2.6.32-rc2-${PR}+gitr${SRCREV}"
+ARAGO_DM_BR  = "r32"
+ARAGO_DM_URI = "git://arago-project.org/git/projects/linux-davinci.git;protocol=git;branch=${BRANCH} "
+
+SRCREV_dm355           = ${ARAGO_DM_REV}
+SRCREV_dm365           = ${ARAGO_DM_REV}
+SRCREV_dm6446          = ${ARAGO_DM_REV}
+SRCREV_dm6467          = ${ARAGO_DM_REV}
+
+PV_dm355               = ${ARAGO_DM_PV}
+PV_dm365               = ${ARAGO_DM_PV}
+PV_dm6446              = ${ARAGO_DM_PV}
+PV_dm6467              = ${ARAGO_DM_PV}
+
+BRANCH_dm355           = ${ARAGO_DM_BR}
+BRANCH_dm365           = ${ARAGO_DM_BR}
+BRANCH_dm6446          = ${ARAGO_DM_BR}
+BRANCH_dm6467          = ${ARAGO_DM_BR}
+
+SRC_URI_append_dm355   = ${ARAGO_DM_URI}
+SRC_URI_append_dm365   = ${ARAGO_DM_URI}
+SRC_URI_append_dm6446  = ${ARAGO_DM_URI}
+SRC_URI_append_dm6467  = ${ARAGO_DM_URI}
+
+
+# The main PR is now using MACHINE_KERNEL_PR, for davinci see conf/machine/include/davinci.inc
+
+# OMAPL tracking master branch - PSP 3.20.00.12
+
+ARAGO_L1_REV = "2acf935c01b9adb50164d421c40cdc5862b9e143"
+ARAGO_L1_BR  = "master"
+ARAGO_L1_PV  = "2.6.32+2.6.33-rc4-${PR}+gitr${SRCREV}"
+ARAGO_L1_URI = "git://arago-project.org/git/projects/linux-omapl1.git;protocol=git;branch=${BRANCH} "
+
+SRCREV_omapl137         = ${ARAGO_L1_REV}
+SRCREV_omapl138         = ${ARAGO_L1_REV}
+SRCREV_hawkboard                  = ${ARAGO_L1_REV}
+
+PV_omapl137             = ${ARAGO_L1_PV}
+PV_omapl138             = ${ARAGO_L1_PV}
+
+BRANCH_omapl137         = ${ARAGO_L1_BR}
+BRANCH_omapl138         = ${ARAGO_L1_BR}
+
+SRC_URI_append_omapl137 = ${ARAGO_L1_URI}
+SRC_URI_append_omapl138 = ${ARAGO_L1_URI}
+
+SRC_URI_append_omapl138 = "file://logo_linux_clut224.ppm \
+                                     file://0001-ahci-ti-Fix-currently-harmless-typo-in-SATA-PHY.patch \
+                                     file://0002-ahci-ti-Update-SATA-PHY-configuration-RXCDR.patch \
+                                     file://0001-board-da850-evm-Disable-NAND-SUBPAGE.patch \
+                                     file://0001-uio_pruss1-Core-driver-addition.patch \
+                                     file://0002-uio_pruss2-Platform-changes.patch \
+                                     file://0003-uio_pruss3-Workarounds-put-into-core-code.patch \
+                                     "
+
+SRC_URI_append_hawkboard          = " \
+                                     file://patch-2.6.33rc4-psp-to-hawkboard.patch \
+                                     file://0001-board-da850-hawk-Disable-NAND-SUBPAGE.patch \
+                                    "
+
+do_configure_prepend_dm355-leopard() {
+	sed -i s:2138:1381:g ${S}/arch/arm/tools/mach-types
+}
+
+# Perf in 2.6.33rc has broken perl handling, so disable it
+do_compile_perf() {
+    :
+}
+
+do_install_perf() {
+    :
+}
+
@@ -0,0 +1,28 @@
+From 1c63789190687e20ddbed3084e7ae893176d0dd6 Mon Sep 17 00:00:00 2001
+From: Jason Kridner <jkridner@beagleboard.org>
+Date: Sat, 17 Jul 2010 14:28:22 -0500
+Subject: [PATCH] BeagleBoard: Adjust USER button pin for xM
+
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |    5 +++++
+ 1 files changed, 5 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index 1e8b77b..2677b41 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -854,6 +854,11 @@ static void __init omap3_beagle_init(void)
+ {
+ 	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
+ 	omap3_beagle_i2c_init();
+
+	if (cpu_is_omap3630()) {
+		gpio_buttons[0].gpio = 4;
+	}
+
+ 	platform_add_devices(omap3_beagle_devices,
+ 			ARRAY_SIZE(omap3_beagle_devices));
+ 	omap_serial_init();
+-- 
+1.6.6.1
+
@@ -0,0 +1,51 @@
+From e618eb6ab097d2f655ee6094d5e3c0dc603d7242 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Wed, 19 Jan 2011 16:30:06 +0100
+Subject: [PATCH 1/2] OMAP3: craneboard: print expansionboard name detected from uboot
+
+Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
+---
+ arch/arm/mach-omap2/board-am3517crane.c |   13 +++++++++++++
+ 1 files changed, 13 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
+index 0bf4f60..300a79d 100644
+--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
+@@ -55,6 +55,8 @@
+ 
+ #define NAND_BLOCK_SIZE        SZ_128K
+ 
+char expansionboard_name[16];
+
+ static struct mtd_partition am3517crane_nand_partitions[] = {
+ 	/* All the partition sizes are listed in terms of NAND block size */
+ 	{
+@@ -724,6 +726,15 @@ static struct am3517_hsmmc_info mmc[] = {
+ 	{}      /* Terminator */
+ };
+ 
+static int __init expansionboard_setup(char *str)
+{
+	if (!str)
+		return -EINVAL;
+	strncpy(expansionboard_name, str, 16);
+	printk(KERN_INFO "Crane expansionboard: %s\n", expansionboard_name);
+	return 0;
+}
+
+ static void __init am3517_crane_init(void)
+ {
+ 
+@@ -762,6 +773,8 @@ static void __init am3517_crane_map_io(void)
+ 	omap2_map_common_io();
+ }
+ 
+early_param("buddy", expansionboard_setup);
+
+ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
+ 	.phys_io	= 0x48000000,
+ 	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+-- 
+1.6.6.1
+
@@ -0,0 +1,67 @@
+From 09b6266a567b22e07200973312ffb8f43e7f7d43 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Fri, 30 Apr 2010 11:12:24 +0200
+Subject: [PATCH 01/45] Revert "omap3: beagle: Fix compile-time errors"
+
+This commit clashes with the other beagle patches we apply on top
+
+This reverts commit da5b291cba631d303cb137fa6a620c494d828197.
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |   34 ++----------------------------
+ 1 files changed, 3 insertions(+), 31 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index c5da58e..330fb25 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -56,22 +56,6 @@
+ 
+ #define NAND_BLOCK_SIZE		SZ_128K
+ 
+-#ifdef CONFIG_PM
+-static struct omap_opp * _omap35x_mpu_rate_table	= omap35x_mpu_rate_table;
+-static struct omap_opp * _omap37x_mpu_rate_table	= omap37x_mpu_rate_table;
+-static struct omap_opp * _omap35x_dsp_rate_table	= omap35x_dsp_rate_table;
+-static struct omap_opp * _omap37x_dsp_rate_table	= omap37x_dsp_rate_table;
+-static struct omap_opp * _omap35x_l3_rate_table		= omap35x_l3_rate_table;
+-static struct omap_opp * _omap37x_l3_rate_table		= omap37x_l3_rate_table;
+-#else	/* CONFIG_PM */
+-static struct omap_opp * _omap35x_mpu_rate_table	= NULL;
+-static struct omap_opp * _omap37x_mpu_rate_table	= NULL;
+-static struct omap_opp * _omap35x_dsp_rate_table	= NULL;
+-static struct omap_opp * _omap37x_dsp_rate_table	= NULL;
+-static struct omap_opp * _omap35x_l3_rate_table		= NULL;
+-static struct omap_opp * _omap37x_l3_rate_table		= NULL;
+-#endif	/* CONFIG_PM */
+-
+ static struct mtd_partition omap3beagle_nand_partitions[] = {
+ 	/* All the partition sizes are listed in terms of NAND block size */
+ 	{
+@@ -377,21 +361,9 @@ static void __init omap3_beagle_init_irq(void)
+ {
+ 	omap_board_config = omap3_beagle_config;
+ 	omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
+-
+-	if (cpu_is_omap3630()) {
+-		omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+-						mt46h32m32lf6_sdrc_params,
+-						_omap37x_mpu_rate_table,
+-						_omap37x_dsp_rate_table,
+-						_omap37x_l3_rate_table);
+-	} else {
+-		omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+-						mt46h32m32lf6_sdrc_params,
+-						_omap35x_mpu_rate_table,
+-						_omap35x_dsp_rate_table,
+-						_omap35x_l3_rate_table);
+-	}
+-
+	omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+			     mt46h32m32lf6_sdrc_params, omap3_mpu_rate_table,
+			     omap3_dsp_rate_table, omap3_l3_rate_table);
+ 	omap_init_irq();
+ #ifdef CONFIG_OMAP_32K_TIMER
+ 	omap2_gp_clockevent_set_gptimer(12);
+-- 
+1.6.6.1
+
@@ -0,0 +1,58 @@
+From 787c524fc478068d18eef72f43074b47722e50b0 Mon Sep 17 00:00:00 2001
+From: Greg KH <gregkh@suse.de>
+Date: Thu, 5 Aug 2010 13:53:35 -0700
+Subject: [PATCH] cgroupfs: create /sys/fs/cgroup to mount cgroupfs on
+
+We really shouldn't be asking userspace to create new root filesystems.
+So follow along with all of the other in-kernel filesystems, and provide
+a mount point in sysfs.
+
+For cgroupfs, this should be in /sys/fs/cgroup/  This change provides
+that mount point when the cgroup filesystem is registered in the kernel.
+
+Acked-by: Paul Menage <menage@google.com>
+Acked-by: Dhaval Giani <dhaval.giani@gmail.com>
+Cc: Li Zefan <lizf@cn.fujitsu.com>
+Cc: Lennart Poettering <lennart@poettering.net>
+Cc: Kay Sievers <kay.sievers@vrfy.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+---
+ kernel/cgroup.c |   13 ++++++++++++-
+ 1 files changed, 12 insertions(+), 1 deletions(-)
+
+diff --git a/kernel/cgroup.c b/kernel/cgroup.c
+index 0249f4b..db21dd8 100644
+--- a/kernel/cgroup.c
+++ b/kernel/cgroup.c
+@@ -1472,6 +1472,8 @@ static struct file_system_type cgroup_fs_type = {
+ 	.kill_sb = cgroup_kill_sb,
+ };
+ 
+static struct kobject *cgroup_kobj;
+
+ static inline struct cgroup *__d_cgrp(struct dentry *dentry)
+ {
+ 	return dentry->d_fsdata;
+@@ -3283,9 +3285,18 @@ int __init cgroup_init(void)
+ 	hhead = css_set_hash(init_css_set.subsys);
+ 	hlist_add_head(&init_css_set.hlist, hhead);
+ 	BUG_ON(!init_root_id(&rootnode));
+
+	cgroup_kobj = kobject_create_and_add("cgroup", fs_kobj);
+	if (!cgroup_kobj) {
+		err = -ENOMEM;
+		goto out;
+	}
+
+ 	err = register_filesystem(&cgroup_fs_type);
+-	if (err < 0)
+	if (err < 0) {
+		kobject_put(cgroup_kobj);
+ 		goto out;
+	}
+ 
+ 	proc_create("cgroups", 0, NULL, &proc_cgroupstats_operations);
+ 
+-- 
+1.6.6.1
+
@@ -0,0 +1,55 @@
+From ba5fd3ed4031a826309ab26045d27dbef88de418 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Wed, 19 Jan 2011 16:36:09 +0100
+Subject: [PATCH 2/2] OMAP3: craneboard: add support for TinCanTools Trainer expansion board
+
+Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
+---
+ arch/arm/mach-omap2/board-am3517crane.c |   31 +++++++++++++++++++++++++++++++
+ 1 files changed, 31 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
+index 300a79d..cbe2174 100644
+--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
+@@ -747,6 +747,37 @@ static void __init am3517_crane_init(void)
+ 	am3517crane_flash_init();
+ 	usb_musb_init();
+ 
+	if(!strcmp(expansionboard_name, "trainer"))
+	{
+		printk(KERN_INFO "Beagle expansionboard: exporting GPIOs 130-141,162 to userspace\n");
+		gpio_request(130, "sysfs");
+		gpio_export(130, 1);
+		gpio_request(131, "sysfs");
+		gpio_export(131, 1);
+		gpio_request(132, "sysfs");
+		gpio_export(132, 1);
+		gpio_request(133, "sysfs");
+		gpio_export(133, 1);
+		gpio_request(134, "sysfs");
+		gpio_export(134, 1);
+		gpio_request(135, "sysfs");
+		gpio_export(135, 1);
+		gpio_request(136, "sysfs");
+		gpio_export(136, 1);
+		gpio_request(137, "sysfs");
+		gpio_export(137, 1);
+		gpio_request(138, "sysfs");
+		gpio_export(138, 1);
+		gpio_request(139, "sysfs");
+		gpio_export(139, 1);
+		gpio_request(140, "sysfs");
+		gpio_export(140, 1);
+		gpio_request(141, "sysfs");
+		gpio_export(141, 1);
+		gpio_request(162, "sysfs");
+		gpio_export(162, 1);
+	}	
+
+ 	/* Configure GPIO for EHCI port */
+ 	omap_mux_init_gpio(35, OMAP_PIN_OUTPUT);
+ 	gpio_request(35, "usb_ehci_enable");
+-- 
+1.6.6.1
+
@@ -0,0 +1,61 @@
+From 5e84443afe149d9f503b63b1c87f23b807fe9e46 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <k-kooi@ti.com>
+Date: Sat, 30 Jan 2010 15:49:15 +0100
+Subject: [PATCH 02/45] board-omap3touchbook: make it build against TI linux-omap 2.6.32-PSP
+
+---
+ arch/arm/mach-omap2/board-omap3touchbook.c |   11 +++++++++--
+ 1 files changed, 9 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
+index fe3d22c..fc3e03c 100644
+--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
+@@ -21,6 +21,7 @@
+ #include <linux/io.h>
+ #include <linux/leds.h>
+ #include <linux/gpio.h>
+#include <linux/irq.h>
+ #include <linux/input.h>
+ #include <linux/gpio_keys.h>
+ 
+@@ -48,12 +49,18 @@
+ #include <plat/nand.h>
+ #include <plat/usb.h>
+ #include <plat/timer-gp.h>
+#include <plat/clock.h>
+#include <plat/omap-pm.h>
+ 
+ #include "mux.h"
+ #include "mmc-twl4030.h"
+ 
+#include "pm.h"
+#include "omap3-opp.h"
+
+ #include <asm/setup.h>
+ 
+
+ #define GPMC_CS0_BASE  0x60
+ #define GPMC_CS_SIZE   0x30
+ 
+@@ -78,7 +85,6 @@ static struct mtd_partition omap3touchbook_nand_partitions[] = {
+ 		.name		= "U-Boot",
+ 		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x80000 */
+ 		.size		= 15 * NAND_BLOCK_SIZE,
+-		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
+ 	},
+ 	{
+ 		.name		= "U-Boot Env",
+@@ -440,7 +446,8 @@ static void __init omap3_touchbook_init_irq(void)
+ 	omap_board_config = omap3_touchbook_config;
+ 	omap_board_config_size = ARRAY_SIZE(omap3_touchbook_config);
+ 	omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+-			     mt46h32m32lf6_sdrc_params);
+			     mt46h32m32lf6_sdrc_params, omap35x_mpu_rate_table,
+			     omap35x_dsp_rate_table, omap35x_l3_rate_table);
+ 	omap_init_irq();
+ #ifdef CONFIG_OMAP_32K_TIMER
+ 	omap2_gp_clockevent_set_gptimer(12);
+-- 
+1.6.6.1
+
@@ -0,0 +1,135 @@
+From aeef52fa662c9a6d85b11474359fb9504fc1cf49 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <sakoman@gmail.com>
+Date: Tue, 15 Dec 2009 15:34:29 -0800
+Subject: [PATCH 03/45] ARM: OMAP: add support for TCT Zippy to Beagle board file
+
+Signed-off-by: Steve Sakoman <sakoman@gmail.com>
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |   74 +++++++++++++++++++++++++++++-
+ 1 files changed, 71 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index 330fb25..ddfb9c0 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -21,6 +21,7 @@
+ #include <linux/io.h>
+ #include <linux/leds.h>
+ #include <linux/gpio.h>
+#include <linux/irq.h>
+ #include <linux/input.h>
+ #include <linux/gpio_keys.h>
+ 
+@@ -56,6 +57,49 @@
+ 
+ #define NAND_BLOCK_SIZE		SZ_128K
+ 
+#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
+
+#include <plat/mcspi.h>
+#include <linux/spi/spi.h>
+
+#define OMAP3BEAGLE_GPIO_ENC28J60_IRQ 157
+
+static struct omap2_mcspi_device_config enc28j60_spi_chip_info = {
+	.turbo_mode	= 0,
+	.single_channel	= 1,	/* 0: slave, 1: master */
+};
+
+static struct spi_board_info omap3beagle_spi_board_info[] __initdata = {
+	{
+		.modalias		= "enc28j60",
+		.bus_num		= 4,
+		.chip_select		= 0,
+		.max_speed_hz		= 20000000,
+		.controller_data	= &enc28j60_spi_chip_info,
+	},
+};
+
+static void __init omap3beagle_enc28j60_init(void)
+{
+	if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, "ENC28J60_IRQ") == 0) &&
+	    (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) {
+		gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0);
+		omap3beagle_spi_board_info[0].irq	= OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ);
+		set_irq_type(omap3beagle_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING);
+	} else {
+		printk(KERN_ERR "could not obtain gpio for ENC28J60_IRQ\n");
+		return;
+	}
+
+	spi_register_board_info(omap3beagle_spi_board_info,
+			ARRAY_SIZE(omap3beagle_spi_board_info));
+}
+
+#else
+static inline void __init omap3beagle_enc28j60_init(void) { return; }
+#endif
+
+
+ static struct mtd_partition omap3beagle_nand_partitions[] = {
+ 	/* All the partition sizes are listed in terms of NAND block size */
+ 	{
+@@ -118,6 +162,14 @@ static struct twl4030_hsmmc_info mmc[] = {
+ 		.wires		= 8,
+ 		.gpio_wp	= 29,
+ 	},
+	{
+		.mmc		= 2,
+		.wires		= 4,
+		.gpio_wp	= 141,
+		.gpio_cd	= 162,
+		.transceiver	= true,
+		.ocr_mask	= 0x00100000,	/* 3.3V */
+	},
+ 	{}	/* Terminator */
+ };
+ 
+@@ -281,7 +333,7 @@ static struct twl4030_platform_data beagle_twldata = {
+ 	.vpll2		= &beagle_vpll2,
+ };
+ 
+-static struct i2c_board_info __initdata beagle_i2c_boardinfo[] = {
+static struct i2c_board_info __initdata beagle_i2c1_boardinfo[] = {
+ 	{
+ 		I2C_BOARD_INFO("twl4030", 0x48),
+ 		.flags = I2C_CLIENT_WAKE,
+@@ -290,10 +342,24 @@ static struct i2c_board_info __initdata beagle_i2c_boardinfo[] = {
+ 	},
+ };
+ 
+#if defined(CONFIG_RTC_DRV_DS1307) || \
+	defined(CONFIG_RTC_DRV_DS1307_MODULE)
+
+static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = {
+	{
+		I2C_BOARD_INFO("ds1307", 0x68),
+	},
+};
+#else
+static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = {};
+#endif
+
+ static int __init omap3_beagle_i2c_init(void)
+ {
+-	omap_register_i2c_bus(1, 2600, beagle_i2c_boardinfo,
+-			ARRAY_SIZE(beagle_i2c_boardinfo));
+	omap_register_i2c_bus(1, 2600, beagle_i2c1_boardinfo,
+			ARRAY_SIZE(beagle_i2c1_boardinfo));
+	omap_register_i2c_bus(2, 400,  beagle_i2c2_boardinfo,
+			ARRAY_SIZE(beagle_i2c2_boardinfo));
+ 	/* Bus 3 is attached to the DVI port where devices like the pico DLP
+ 	 * projector don't work reliably with 400kHz */
+ 	omap_register_i2c_bus(3, 100, NULL, 0);
+@@ -448,6 +514,8 @@ static void __init omap3_beagle_init(void)
+ 	/* REVISIT leave DVI powered down until it's needed ... */
+ 	gpio_direction_output(170, true);
+ 
+	omap3beagle_enc28j60_init();
+
+ 	usb_musb_init();
+ 	usb_ehci_init(&ehci_pdata);
+ 	omap3beagle_flash_init();
+-- 
+1.6.6.1
+
@@ -0,0 +1,24 @@
+From 701bababc8f9e458e01bdb512199ce175110fe19 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Thu, 17 Dec 2009 12:40:24 -0800
+Subject: [PATCH 04/45] ARM: OMAP: Make beagle u-boot partition writable
+
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |    1 -
+ 1 files changed, 0 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index ddfb9c0..9f72c7a 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -112,7 +112,6 @@ static struct mtd_partition omap3beagle_nand_partitions[] = {
+ 		.name		= "U-Boot",
+ 		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x80000 */
+ 		.size		= 15 * NAND_BLOCK_SIZE,
+-		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
+ 	},
+ 	{
+ 		.name		= "U-Boot Env",
+-- 
+1.6.6.1
+
@@ -0,0 +1,200 @@
+From 818b8bbfb472de23b10aec58acd55eb31fafe0b9 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Wed, 10 Feb 2010 15:07:36 +0100
+Subject: [PATCH 05/45] board-omap3-beagle: add DSS2 support
+
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |  130 ++++++++++++++++++++++++-------
+ 1 files changed, 103 insertions(+), 27 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index 9f72c7a..3b7f6ec 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -40,6 +40,7 @@
+ 
+ #include <plat/board.h>
+ #include <plat/common.h>
+#include <plat/display.h>
+ #include <plat/gpmc.h>
+ #include <plat/nand.h>
+ #include <plat/usb.h>
+@@ -153,6 +154,105 @@ static struct platform_device omap3beagle_nand_device = {
+ 	.resource	= &omap3beagle_nand_resource,
+ };
+ 
+/* DSS */
+
+static int beagle_enable_dvi(struct omap_dss_device *dssdev)
+{
+	if (dssdev->reset_gpio != -1)
+		gpio_set_value(dssdev->reset_gpio, 1);
+
+	return 0;
+}
+
+static void beagle_disable_dvi(struct omap_dss_device *dssdev)
+{
+	if (dssdev->reset_gpio != -1)
+		gpio_set_value(dssdev->reset_gpio, 0);
+}
+
+static struct omap_dss_device beagle_dvi_device = {
+	.type = OMAP_DISPLAY_TYPE_DPI,
+	.name = "dvi",
+	.driver_name = "generic_panel",
+	.phy.dpi.data_lines = 24,
+	.reset_gpio = 170,
+	.platform_enable = beagle_enable_dvi,
+	.platform_disable = beagle_disable_dvi,
+};
+
+static int beagle_panel_enable_tv(struct omap_dss_device *dssdev)
+{
+#define ENABLE_VDAC_DEDICATED           0x03
+#define ENABLE_VDAC_DEV_GRP             0x20
+
+	twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+			ENABLE_VDAC_DEDICATED,
+			TWL4030_VDAC_DEDICATED);
+	twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+			ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP);
+
+	return 0;
+}
+
+static void beagle_panel_disable_tv(struct omap_dss_device *dssdev)
+{
+	twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
+			TWL4030_VDAC_DEDICATED);
+	twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
+			TWL4030_VDAC_DEV_GRP);
+}
+
+static struct omap_dss_device beagle_tv_device = {
+	.name = "tv",
+	.driver_name = "venc",
+	.type = OMAP_DISPLAY_TYPE_VENC,
+	.phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
+	.platform_enable = beagle_panel_enable_tv,
+	.platform_disable = beagle_panel_disable_tv,
+};
+
+static struct omap_dss_device *beagle_dss_devices[] = {
+	&beagle_dvi_device,
+	&beagle_tv_device,
+};
+
+static struct omap_dss_board_info beagle_dss_data = {
+	.num_devices = ARRAY_SIZE(beagle_dss_devices),
+	.devices = beagle_dss_devices,
+	.default_device = &beagle_dvi_device,
+};
+
+static struct platform_device beagle_dss_device = {
+	.name          = "omapdss",
+	.id            = -1,
+	.dev            = {
+		.platform_data = &beagle_dss_data,
+	},
+};
+
+static struct regulator_consumer_supply beagle_vdac_supply = {
+	.supply		= "vdda_dac",
+	.dev		= &beagle_dss_device.dev,
+};
+
+static struct regulator_consumer_supply beagle_vdvi_supply = {
+	.supply		= "vdds_dsi",
+	.dev		= &beagle_dss_device.dev,
+};
+
+static void __init beagle_display_init(void)
+{
+	int r;
+
+	r = gpio_request(beagle_dvi_device.reset_gpio, "DVI reset");
+	if (r < 0) {
+		printk(KERN_ERR "Unable to get DVI reset GPIO\n");
+		return;
+	}
+
+	gpio_direction_output(beagle_dvi_device.reset_gpio, 0);
+}
+
+ #include "sdram-micron-mt46h32m32lf-6.h"
+ 
+ static struct twl4030_hsmmc_info mmc[] = {
+@@ -172,15 +272,6 @@ static struct twl4030_hsmmc_info mmc[] = {
+ 	{}	/* Terminator */
+ };
+ 
+-static struct platform_device omap3_beagle_lcd_device = {
+-	.name		= "omap3beagle_lcd",
+-	.id		= -1,
+-};
+-
+-static struct omap_lcd_config omap3_beagle_lcd_config __initdata = {
+-	.ctrl_name	= "internal",
+-};
+-
+ static struct regulator_consumer_supply beagle_vmmc1_supply = {
+ 	.supply			= "vmmc",
+ };
+@@ -236,16 +327,6 @@ static struct twl4030_gpio_platform_data beagle_gpio_data = {
+ 	.setup		= beagle_twl_gpio_setup,
+ };
+ 
+-static struct regulator_consumer_supply beagle_vdac_supply = {
+-	.supply		= "vdac",
+-	.dev		= &omap3_beagle_lcd_device.dev,
+-};
+-
+-static struct regulator_consumer_supply beagle_vdvi_supply = {
+-	.supply		= "vdvi",
+-	.dev		= &omap3_beagle_lcd_device.dev,
+-};
+-
+ /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
+ static struct regulator_init_data beagle_vmmc1 = {
+ 	.constraints = {
+@@ -418,14 +499,8 @@ static struct platform_device keys_gpio = {
+ 	},
+ };
+ 
+-static struct omap_board_config_kernel omap3_beagle_config[] __initdata = {
+-	{ OMAP_TAG_LCD,		&omap3_beagle_lcd_config },
+-};
+-
+ static void __init omap3_beagle_init_irq(void)
+ {
+-	omap_board_config = omap3_beagle_config;
+-	omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
+ 	omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+ 			     mt46h32m32lf6_sdrc_params, omap3_mpu_rate_table,
+ 			     omap3_dsp_rate_table, omap3_l3_rate_table);
+@@ -437,9 +512,9 @@ static void __init omap3_beagle_init_irq(void)
+ }
+ 
+ static struct platform_device *omap3_beagle_devices[] __initdata = {
+-	&omap3_beagle_lcd_device,
+ 	&leds_gpio,
+ 	&keys_gpio,
+	&beagle_dss_device,
+ };
+ 
+ static void __init omap3beagle_flash_init(void)
+@@ -522,8 +597,9 @@ static void __init omap3_beagle_init(void)
+ 	/* Ensure SDRC pins are mux'd for self-refresh */
+ 	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
+ 	omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
+-}
+ 
+	beagle_display_init();
+}
+ static void __init omap3_beagle_map_io(void)
+ {
+ 	omap2_set_globals_343x();
+-- 
+1.6.6.1
+
@@ -0,0 +1,103 @@
+From e36c63f1fe13a60bdf6e9b3dd46ad969d6fe418d Mon Sep 17 00:00:00 2001
+From: Koen Kooi <k-kooi@ti.com>
+Date: Wed, 27 Jan 2010 21:57:13 +0100
+Subject: [PATCH 06/45] board-omap3beagle: prepare for DM3730 based BeagleboardXM
+
+* OPP changes copy/pasted from board-omap3evm.c
+	* EHCI changes copy/pasted from Steve Kipisz' 2.6.33rcX work
+	* turn on power to camera on boot and add some comments
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |   62 +++++++++++++++++++++++++++----
+ 1 files changed, 54 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index 3b7f6ec..429dacb 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -53,6 +53,23 @@
+ #include "pm.h"
+ #include "omap3-opp.h"
+ 
+#ifdef CONFIG_PM
+static struct omap_opp * _omap35x_mpu_rate_table        = omap35x_mpu_rate_table;
+static struct omap_opp * _omap37x_mpu_rate_table        = omap37x_mpu_rate_table;
+static struct omap_opp * _omap35x_dsp_rate_table        = omap35x_dsp_rate_table;
+static struct omap_opp * _omap37x_dsp_rate_table        = omap37x_dsp_rate_table;
+static struct omap_opp * _omap35x_l3_rate_table         = omap35x_l3_rate_table;
+static struct omap_opp * _omap37x_l3_rate_table         = omap37x_l3_rate_table;
+#else   /* CONFIG_PM */
+static struct omap_opp * _omap35x_mpu_rate_table        = NULL;
+static struct omap_opp * _omap37x_mpu_rate_table        = NULL;
+static struct omap_opp * _omap35x_dsp_rate_table        = NULL;
+static struct omap_opp * _omap37x_dsp_rate_table        = NULL;
+static struct omap_opp * _omap35x_l3_rate_table         = NULL;
+static struct omap_opp * _omap37x_l3_rate_table         = NULL;
+#endif  /* CONFIG_PM */
+
+
+ #define GPMC_CS0_BASE  0x60
+ #define GPMC_CS_SIZE   0x30
+ 
+@@ -303,12 +320,28 @@ static int beagle_twl_gpio_setup(struct device *dev,
+ 	 * power switch and overcurrent detect
+ 	 */
+ 
+-	gpio_request(gpio + 1, "EHCI_nOC");
+-	gpio_direction_input(gpio + 1);
+	if (cpu_is_omap3630()) {
+		/* Power on DVI, Serial and PWR led */ 
+ 		gpio_request(gpio + 1, "nDVI_PWR_EN");
+		gpio_direction_output(gpio + 1, 0);	
+
+		/* Power on camera interface */
+		gpio_request(gpio + 2, "CAM_EN");
+		gpio_direction_output(gpio + 2, 1);
+
+		/* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */
+		gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR");
+		gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1);
+	}
+	else {
+		gpio_request(gpio + 1, "EHCI_nOC");
+		gpio_direction_input(gpio + 1);
+
+		/* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */
+		gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR");
+		gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0);
+	}
+ 
+-	/* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */
+-	gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR");
+-	gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0);
+ 
+ 	/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
+ 	gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
+@@ -501,9 +534,22 @@ static struct platform_device keys_gpio = {
+ 
+ static void __init omap3_beagle_init_irq(void)
+ {
+-	omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+-			     mt46h32m32lf6_sdrc_params, omap3_mpu_rate_table,
+-			     omap3_dsp_rate_table, omap3_l3_rate_table);
+        if (cpu_is_omap3630())
+        {
+                omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+                                        NULL,
+                                        _omap37x_mpu_rate_table,
+                                        _omap37x_dsp_rate_table,
+                                        _omap37x_l3_rate_table);
+        }
+        else
+        {
+                omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+                                        NULL,
+                                        _omap35x_mpu_rate_table,
+                                        _omap35x_dsp_rate_table,
+                                        _omap35x_l3_rate_table);
+        }
+ 	omap_init_irq();
+ #ifdef CONFIG_OMAP_32K_TIMER
+ 	omap2_gp_clockevent_set_gptimer(12);
+-- 
+1.6.6.1
+
@@ -0,0 +1,172 @@
+From 25ae9895ed107a6fe9d9c4345f21bbdaee4ccde6 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Mon, 3 May 2010 14:41:29 +0200
+Subject: [PATCH 07/45] ARM: OMAP: beagleboard: Add infrastructure to do fixups based on expansionboard name passed by u-boot
+
+And add support for zippy2
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |   88 +++++++++++++++++++++++++++----
+ 1 files changed, 78 insertions(+), 10 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index 429dacb..ac96551 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -75,6 +75,8 @@ static struct omap_opp * _omap37x_l3_rate_table         = NULL;
+ 
+ #define NAND_BLOCK_SIZE		SZ_128K
+ 
+char expansionboard_name[16];
+
+ #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
+ 
+ #include <plat/mcspi.h>
+@@ -87,7 +89,7 @@ static struct omap2_mcspi_device_config enc28j60_spi_chip_info = {
+ 	.single_channel	= 1,	/* 0: slave, 1: master */
+ };
+ 
+-static struct spi_board_info omap3beagle_spi_board_info[] __initdata = {
+static struct spi_board_info omap3beagle_zippy_spi_board_info[] __initdata = {
+ 	{
+ 		.modalias		= "enc28j60",
+ 		.bus_num		= 4,
+@@ -102,21 +104,62 @@ static void __init omap3beagle_enc28j60_init(void)
+ 	if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, "ENC28J60_IRQ") == 0) &&
+ 	    (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) {
+ 		gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0);
+-		omap3beagle_spi_board_info[0].irq	= OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ);
+-		set_irq_type(omap3beagle_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING);
+		omap3beagle_zippy_spi_board_info[0].irq	= OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ);
+		set_irq_type(omap3beagle_zippy_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING);
+ 	} else {
+ 		printk(KERN_ERR "could not obtain gpio for ENC28J60_IRQ\n");
+ 		return;
+ 	}
+ 
+-	spi_register_board_info(omap3beagle_spi_board_info,
+-			ARRAY_SIZE(omap3beagle_spi_board_info));
+	spi_register_board_info(omap3beagle_zippy_spi_board_info,
+			ARRAY_SIZE(omap3beagle_zippy_spi_board_info));
+ }
+ 
+ #else
+ static inline void __init omap3beagle_enc28j60_init(void) { return; }
+ #endif
+ 
+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE)
+
+#include <plat/mcspi.h>
+#include <linux/spi/spi.h>
+
+#define OMAP3BEAGLE_GPIO_KS8851_IRQ 157
+
+static struct omap2_mcspi_device_config ks8851_spi_chip_info = {
+	.turbo_mode	= 0,
+	.single_channel	= 1,	/* 0: slave, 1: master */
+};
+
+static struct spi_board_info omap3beagle_zippy2_spi_board_info[] __initdata = {
+	{
+		.modalias		= "ks8851",
+		.bus_num		= 4,
+		.chip_select		= 0,
+		.max_speed_hz		= 36000000,
+		.controller_data	= &ks8851_spi_chip_info,
+	},
+};
+
+static void __init omap3beagle_ks8851_init(void)
+{
+	if ((gpio_request(OMAP3BEAGLE_GPIO_KS8851_IRQ, "KS8851_IRQ") == 0) &&
+	    (gpio_direction_input(OMAP3BEAGLE_GPIO_KS8851_IRQ) == 0)) {
+		gpio_export(OMAP3BEAGLE_GPIO_KS8851_IRQ, 0);
+		omap3beagle_zippy2_spi_board_info[0].irq	= OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_KS8851_IRQ);
+		set_irq_type(omap3beagle_zippy2_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING);
+	} else {
+		printk(KERN_ERR "could not obtain gpio for KS8851_IRQ\n");
+		return;
+	}
+	
+	spi_register_board_info(omap3beagle_zippy2_spi_board_info,
+							ARRAY_SIZE(omap3beagle_zippy2_spi_board_info));
+}
+
+#else
+static inline void __init omap3beagle_ks8851_init(void) { return; }
+#endif
+ 
+ static struct mtd_partition omap3beagle_nand_partitions[] = {
+ 	/* All the partition sizes are listed in terms of NAND block size */
+@@ -281,8 +324,6 @@ static struct twl4030_hsmmc_info mmc[] = {
+ 	{
+ 		.mmc		= 2,
+ 		.wires		= 4,
+-		.gpio_wp	= 141,
+-		.gpio_cd	= 162,
+ 		.transceiver	= true,
+ 		.ocr_mask	= 0x00100000,	/* 3.3V */
+ 	},
+@@ -601,7 +642,7 @@ static void __init omap3beagle_flash_init(void)
+ 	}
+ }
+ 
+-static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
+ 
+ 	.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
+ 	.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
+@@ -621,6 +662,15 @@ static struct omap_board_mux board_mux[] __initdata = {
+ #define board_mux	NULL
+ #endif
+ 
+static int __init expansionboard_setup(char *str)
+{
+	if (!str)
+		return -EINVAL;
+	strncpy(expansionboard_name, str, 16);
+	printk(KERN_INFO "Beagle expansionboard: %s\n", expansionboard_name);
+	return 0;
+}
+
+ static void __init omap3_beagle_init(void)
+ {
+ 	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
+@@ -634,8 +684,24 @@ static void __init omap3_beagle_init(void)
+ 	/* REVISIT leave DVI powered down until it's needed ... */
+ 	gpio_direction_output(170, true);
+ 
+-	omap3beagle_enc28j60_init();
+-
+	if(!strcmp(expansionboard_name, "zippy")) 
+	{
+		printk(KERN_INFO "Beagle expansionboard: initializing enc28j60\n");
+		omap3beagle_enc28j60_init();
+		printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n");
+		mmc[1].gpio_wp = 141;
+		mmc[1].gpio_cd = 162;
+	}
+	
+	if(!strcmp(expansionboard_name, "zippy2")) 
+	{
+		printk(KERN_INFO "Beagle expansionboard: initializing ks_8851\n");
+		omap3beagle_ks8851_init();
+		printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n");
+		mmc[1].gpio_wp = 141;
+		mmc[1].gpio_cd = 162;
+	}
+	
+ 	usb_musb_init();
+ 	usb_ehci_init(&ehci_pdata);
+ 	omap3beagle_flash_init();
+@@ -652,6 +718,8 @@ static void __init omap3_beagle_map_io(void)
+ 	omap2_map_common_io();
+ }
+ 
+early_param("buddy", expansionboard_setup);
+
+ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
+ 	/* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */
+ 	.phys_io	= 0x48000000,
+-- 
+1.6.6.1
+
@@ -0,0 +1,57 @@
+From bf88487c59994b71cc57687915de0dc207a74b6b Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Mon, 3 May 2010 21:38:34 +0200
+Subject: [PATCH 08/45] ARM: OMAP: beagleboard: pre-export GPIOs to userspace when using a Tincantools trainerboard
+
+This really needs a for loop, patches welcome
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |   33 ++++++++++++++++++++++++++++++-
+ 1 files changed, 32 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index ac96551..c9af202 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -701,7 +701,38 @@ static void __init omap3_beagle_init(void)
+ 		mmc[1].gpio_wp = 141;
+ 		mmc[1].gpio_cd = 162;
+ 	}
+-	
+
+	if(!strcmp(expansionboard_name, "trainer"))
+	{
+		printk(KERN_INFO "Beagle expansionboard: exporting GPIOs 130-141,162 to userspace\n");
+		gpio_request(130, "sysfs");
+		gpio_export(130, 1);
+		gpio_request(131, "sysfs");
+		gpio_export(131, 1);
+		gpio_request(132, "sysfs");
+		gpio_export(132, 1);
+		gpio_request(133, "sysfs");
+		gpio_export(133, 1);
+		gpio_request(134, "sysfs");
+		gpio_export(134, 1);
+		gpio_request(135, "sysfs");
+		gpio_export(135, 1);
+		gpio_request(136, "sysfs");
+		gpio_export(136, 1);
+		gpio_request(137, "sysfs");
+		gpio_export(137, 1);
+		gpio_request(138, "sysfs");
+		gpio_export(138, 1);
+		gpio_request(139, "sysfs");
+		gpio_export(139, 1);
+		gpio_request(140, "sysfs");
+		gpio_export(140, 1);
+		gpio_request(141, "sysfs");
+		gpio_export(141, 1);
+		gpio_request(162, "sysfs");
+		gpio_export(162, 1);
+	}
+
+ 	usb_musb_init();
+ 	usb_ehci_init(&ehci_pdata);
+ 	omap3beagle_flash_init();
+-- 
+1.6.6.1
+
@@ -0,0 +1,76 @@
+From f957bb53ba0c0056efd2c10d446ed9cfd6bd62ca Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Mon, 3 May 2010 22:31:34 +0200
+Subject: [PATCH 09/45] ARM: OMAP: beagleboard: initialize ds1307 and eeprom only for zippy and zippy2
+
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |   39 +++++++++++++++++++++++++++---
+ 1 files changed, 35 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index c9af202..b3c8cb7 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -496,24 +496,55 @@ static struct i2c_board_info __initdata beagle_i2c1_boardinfo[] = {
+ 	},
+ };
+ 
+	
+#if defined(CONFIG_EEPROM_AT24) || defined(CONFIG_EEPROM_AT24_MODULE)
+#include <linux/i2c/at24.h>
+
+static struct at24_platform_data m24c01 = {
+	        .byte_len       = SZ_1K / 8,
+	        .page_size      = 16,
+};
+
+ #if defined(CONFIG_RTC_DRV_DS1307) || \
+ 	defined(CONFIG_RTC_DRV_DS1307_MODULE)
+ 
+-static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = {
+static struct i2c_board_info __initdata beagle_zippy_i2c2_boardinfo[] = {
+ 	{
+ 		I2C_BOARD_INFO("ds1307", 0x68),
+ 	},
+	{
+		I2C_BOARD_INFO("24c01", 0x50),
+		.platform_data	= &m24c01,
+	},
+ };
+ #else
+-static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = {};
+static struct i2c_board_info __initdata beagle_zippy_i2c2_boardinfo[] = {
+	{
+		I2C_BOARD_INFO("24c01", 0x50),
+		.platform_data  = &m24c01,
+	},
+};
+#endif
+#else
+static struct i2c_board_info __initdata beagle_zippy_i2c2_boardinfo[] = {};
+ #endif
+ 
+static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = {};
+
+ static int __init omap3_beagle_i2c_init(void)
+ {
+ 	omap_register_i2c_bus(1, 2600, beagle_i2c1_boardinfo,
+ 			ARRAY_SIZE(beagle_i2c1_boardinfo));
+-	omap_register_i2c_bus(2, 400,  beagle_i2c2_boardinfo,
+-			ARRAY_SIZE(beagle_i2c2_boardinfo));
+	if(!strcmp(expansionboard_name, "zippy") || !strcmp(expansionboard_name, "zippy2")) 
+	{
+		printk(KERN_INFO "Beagle expansionboard: registering i2c2 bus for zippy/zippy2\n");
+		omap_register_i2c_bus(2, 400,  beagle_zippy_i2c2_boardinfo,
+				ARRAY_SIZE(beagle_zippy_i2c2_boardinfo));
+	} else
+	{
+		omap_register_i2c_bus(2, 400,  beagle_i2c2_boardinfo,
+				ARRAY_SIZE(beagle_i2c2_boardinfo));
+	}
+ 	/* Bus 3 is attached to the DVI port where devices like the pico DLP
+ 	 * projector don't work reliably with 400kHz */
+ 	omap_register_i2c_bus(3, 100, NULL, 0);
+-- 
+1.6.6.1
+
@@ -0,0 +1,27 @@
+From 3cd85787199204da2faec4b4150302bf2228de48 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Thu, 17 Dec 2009 12:45:20 -0800
+Subject: [PATCH 11/45] ASoC: enable audio capture by default for twl4030
+
+---
+ sound/soc/codecs/twl4030.c |    4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c
+index 74f0d65..53da465 100644
+--- a/sound/soc/codecs/twl4030.c
+++ b/sound/soc/codecs/twl4030.c
+@@ -46,8 +46,8 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
+ 	0xc3, /* REG_OPTION		(0x2)	*/
+ 	0x00, /* REG_UNKNOWN		(0x3)	*/
+ 	0x00, /* REG_MICBIAS_CTL	(0x4)	*/
+-	0x20, /* REG_ANAMICL		(0x5)	*/
+-	0x00, /* REG_ANAMICR		(0x6)	*/
+	0x34, /* REG_ANAMICL		(0x5)	*/
+	0x14, /* REG_ANAMICR		(0x6)	*/
+ 	0x00, /* REG_AVADC_CTL		(0x7)	*/
+ 	0x00, /* REG_ADCMICSEL		(0x8)	*/
+ 	0x00, /* REG_DIGMIXING		(0x9)	*/
+-- 
+1.6.6.1
+
@@ -0,0 +1,35 @@
+From 7d8868d73fdd95eb928f54f881978590643e50cc Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Thu, 31 Dec 2009 07:05:02 -0800
+Subject: [PATCH 12/45] MTD: NAND: omap2: proper fix for subpage read ECC errors
+
+---
+ drivers/mtd/nand/omap2.c |   11 +++++++----
+ 1 files changed, 7 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
+index 08c193c..9b185b0 100644
+--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
+@@ -295,11 +295,14 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len)
+ 	u32 *p = (u32 *)buf;
+ 
+ 	/* take care of subpage reads */
+-	for (; len % 4 != 0; ) {
+-		*buf++ = __raw_readb(info->nand.IO_ADDR_R);
+-		len--;
+	if (len % 4) {
+		if (info->nand.options & NAND_BUSWIDTH_16)
+			omap_read_buf16(mtd, buf, len % 4);
+		else
+			omap_read_buf8(mtd, buf, len % 4);
+		p = (u32 *) (buf + len % 4);
+		len -= len % 4;
+ 	}
+-	p = (u32 *) buf;
+ 
+ 	/* configure and start prefetch transfer */
+ 	ret = gpmc_prefetch_enable(info->gpmc_cs, 0x0, len, 0x0);
+-- 
+1.6.6.1
+
@@ -0,0 +1,44 @@
+From af96930d2412b4af27407a48e262ce1bb2e32427 Mon Sep 17 00:00:00 2001
+From: Sudeep Basavaraj <sudeep.basavaraj@ti.com>
+Date: Tue, 5 Jan 2010 18:58:18 +0530
+Subject: [PATCH 13/45] OMAP3630:DSS2:Enable Pre-Multiplied Alpha Support
+
+Enables dss to process color formats with pre-mulitplied alpha values.
+With this we can have alpha values defined for each pixel
+and hence can have different blending values for each pixel.
+
+Signed-off-by: Sudeep Basavaraj <sudeep.basavaraj@ti.com>
+Signed-off-by: Kishore Y <kishore.y@ti.com>
+---
+ drivers/video/omap2/dss/dispc.c |    8 ++++++++
+ 1 files changed, 8 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
+index f7acf87..c6d5fc5 100644
+--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
+@@ -913,6 +913,11 @@ static void _dispc_set_vid_color_conv(enum omap_plane plane, bool enable)
+ 	dispc_write_reg(dispc_reg_att[plane], val);
+ }
+ 
+static void _dispc_set_alpha_blend_attrs(enum omap_plane plane, bool enable)
+{
+	REG_FLD_MOD(dispc_reg_att[plane], enable ? 1 : 0, 28, 28);
+}
+
+ void dispc_enable_replication(enum omap_plane plane, bool enable)
+ {
+ 	int bit;
+@@ -1689,6 +1694,9 @@ static int _dispc_setup_plane(enum omap_plane plane,
+ 
+ 	_dispc_set_rotation_attrs(plane, rotation, mirror, color_mode);
+ 
+	if (cpu_is_omap3630() && (plane != OMAP_DSS_VIDEO1))
+		_dispc_set_alpha_blend_attrs(plane, 1);
+
+ 	if (plane != OMAP_DSS_VIDEO1)
+ 		_dispc_setup_global_alpha(plane, global_alpha);
+ 
+-- 
+1.6.6.1
+
@@ -0,0 +1,75 @@
+From ba26db491acb2d0ee6ef6e51756e843dfd56a125 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Tue, 19 Jan 2010 21:19:15 -0800
+Subject: [PATCH 14/45] DSS2: add bootarg for selecting svideo or composite for tv output
+
+also add pal-16 and ntsc-16 omapfb.mode settings for 16bpp
+---
+ drivers/video/omap2/dss/venc.c           |   22 ++++++++++++++++++++++
+ drivers/video/omap2/omapfb/omapfb-main.c |   10 +++++++++-
+ 2 files changed, 31 insertions(+), 1 deletions(-)
+
+diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c
+index 8be116f..fbfc24b 100644
+--- a/drivers/video/omap2/dss/venc.c
+++ b/drivers/video/omap2/dss/venc.c
+@@ -87,6 +87,11 @@
+ #define VENC_OUTPUT_TEST			0xC8
+ #define VENC_DAC_B__DAC_C			0xC8
+ 
+static char *tv_connection;
+
+module_param_named(tvcable, tv_connection, charp, 0);
+MODULE_PARM_DESC(tvcable, "TV connection type (svideo, composite)");
+
+ struct venc_config {
+ 	u32 f_control;
+ 	u32 vidout_ctrl;
+@@ -432,6 +437,23 @@ static int venc_panel_probe(struct omap_dss_device *dssdev)
+ {
+ 	dssdev->panel.timings = omap_dss_pal_timings;
+ 
+	/* Allow the TV output to be overriden */
+	if (tv_connection) {
+		if (strcmp(tv_connection, "svideo") == 0) {
+			printk(KERN_INFO
+				"omapdss: tv output is svideo.\n");
+			dssdev->phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO;
+		} else if (strcmp(tv_connection, "composite") == 0) {
+			printk(KERN_INFO
+				"omapdss: tv output is composite.\n");
+			dssdev->phy.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE;
+		} else {
+			printk(KERN_INFO
+				"omapdss: unsupported output type'%s'.\n",
+				tv_connection);
+		}
+	}
+
+ 	return 0;
+ }
+ 
+diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c
+index 7f47a34..0fe87e0 100644
+--- a/drivers/video/omap2/omapfb/omapfb-main.c
+++ b/drivers/video/omap2/omapfb/omapfb-main.c
+@@ -1988,7 +1988,15 @@ static int omapfb_mode_to_timings(const char *mode_str,
+ 	int r;
+ 
+ #ifdef CONFIG_OMAP2_DSS_VENC
+-	if (strcmp(mode_str, "pal") == 0) {
+	if (strcmp(mode_str, "pal-16") == 0) {
+		*timings = omap_dss_pal_timings;
+		*bpp = 16;
+		return 0;
+	} else if (strcmp(mode_str, "ntsc-16") == 0) {
+		*timings = omap_dss_ntsc_timings;
+		*bpp = 16;
+		return 0;
+	} else if (strcmp(mode_str, "pal") == 0) {
+ 		*timings = omap_dss_pal_timings;
+ 		*bpp = 0;
+ 		return 0;
+-- 
+1.6.6.1
+
@@ -0,0 +1,133 @@
+From 739ec82561686ad0c5cc8befef3bcd74339d205e Mon Sep 17 00:00:00 2001
+From: Koen Kooi <k-kooi@ti.com>
+Date: Thu, 11 Feb 2010 21:34:00 +0100
+Subject: [PATCH 15/45] ISP: add some more from Leopard imaging patch
+
+---
+ drivers/media/video/isp/isppreview.c |   16 ++++++++-
+ include/media/v4l2-int-device.h      |   58 ++++++++++++++++++++++++++++++++++
+ 2 files changed, 72 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/media/video/isp/isppreview.c b/drivers/media/video/isp/isppreview.c
+index 5494efc..85ee25d 100644
+--- a/drivers/media/video/isp/isppreview.c
+++ b/drivers/media/video/isp/isppreview.c
+@@ -79,13 +79,26 @@ static struct ispprev_rgbtorgb flr_rgb2rgb = {
+ 	{0x0000, 0x0000, 0x0000}
+ };
+ 
+static struct ispprev_rgbtorgb unity_rgb2rgb = {
+	{	/* RGB-RGB Matrix */
+		{0x0100, 0x0000, 0x0000},
+		{0x0000, 0x0100, 0x0000},
+		{0x0000, 0x0000, 0x0100}
+	},	/* RGB Offset */
+	{0x0000, 0x0000, 0x0000}
+};
+
+ /* Default values in Office Flourescent Light for RGB to YUV Conversion*/
+ static struct ispprev_csc flr_prev_csc[] = {
+ 	{
+ 		{	/* CSC Coef Matrix */
+-			{66, 129, 25},
+/*			{66, 129, 25},
+ 			{-38, -75, 112},
+ 			{112, -94 , -18}
+*/
+			{0x04C, 0x098, 0x01C},	
+			{0x3D4, 0x3AC, 0x080},
+			{0x080, 0x39E, 0x3EC}
+ 		},	/* CSC Offset */
+ 		{0x0, 0x0, 0x0}
+ 	},
+@@ -107,7 +120,6 @@ static struct ispprev_csc flr_prev_csc[] = {
+ 	}
+ };
+ 
+-
+ /* Default values in Office Flourescent Light for CFA Gradient*/
+ #define FLR_CFA_GRADTHRS_HORZ	0x28
+ #define FLR_CFA_GRADTHRS_VERT	0x28
+diff --git a/include/media/v4l2-int-device.h b/include/media/v4l2-int-device.h
+index ed32d3f..ce415ec 100644
+--- a/include/media/v4l2-int-device.h
+++ b/include/media/v4l2-int-device.h
+@@ -113,6 +113,8 @@ enum v4l2_if_type {
+ 	 * on certain image sensors.
+ 	 */
+ 	V4L2_IF_TYPE_BT656,
+	V4L2_IF_TYPE_YCbCr,
+	V4L2_IF_TYPE_RAW,
+ };
+ 
+ enum v4l2_if_type_bt656_mode {
+@@ -159,10 +161,66 @@ struct v4l2_if_type_bt656 {
+ 	u32 clock_curr;
+ };
+ 
+struct v4l2_if_type_ycbcr {
+	/*
+	 * 0: Frame begins when vsync is high.
+	 * 1: Frame begins when vsync changes from low to high.
+	 */
+	unsigned frame_start_on_rising_vs:1;
+	/* Use Bt synchronisation codes for sync correction. */
+	unsigned bt_sync_correct:1;
+	/* Swap every two adjacent image data elements. */
+	unsigned swap:1;
+	/* Inverted latch clock polarity from slave. */
+	unsigned latch_clk_inv:1;
+	/* Hs polarity. 0 is active high, 1 active low. */
+	unsigned nobt_hs_inv:1;
+	/* Vs polarity. 0 is active high, 1 active low. */
+	unsigned nobt_vs_inv:1;
+	/* Minimum accepted bus clock for slave (in Hz). */
+	u32 clock_min;
+	/* Maximum accepted bus clock for slave. */
+	u32 clock_max;
+	/*
+	 * Current wish of the slave. May only change in response to
+	 * ioctls that affect image capture.
+	 */
+	u32 clock_curr;
+};
+
+struct v4l2_if_type_raw {
+	/*
+	 * 0: Frame begins when vsync is high.
+	 * 1: Frame begins when vsync changes from low to high.
+	 */
+	unsigned frame_start_on_rising_vs:1;
+	/* Use Bt synchronisation codes for sync correction. */
+	unsigned bt_sync_correct:1;
+	/* Swap every two adjacent image data elements. */
+	unsigned swap:1;
+	/* Inverted latch clock polarity from slave. */
+	unsigned latch_clk_inv:1;
+	/* Hs polarity. 0 is active high, 1 active low. */
+	unsigned nobt_hs_inv:1;
+	/* Vs polarity. 0 is active high, 1 active low. */
+	unsigned nobt_vs_inv:1;
+	/* Minimum accepted bus clock for slave (in Hz). */
+	u32 clock_min;
+	/* Maximum accepted bus clock for slave. */
+	u32 clock_max;
+	/*
+	 * Current wish of the slave. May only change in response to
+	 * ioctls that affect image capture.
+	 */
+	u32 clock_curr;
+};
+
+ struct v4l2_ifparm {
+ 	enum v4l2_if_type if_type;
+ 	union {
+ 		struct v4l2_if_type_bt656 bt656;
+		struct v4l2_if_type_ycbcr ycbcr;
+		struct v4l2_if_type_raw raw;
+ 	} u;
+ };
+ 
+-- 
+1.6.6.1
+
@@ -0,0 +1,110 @@
+From 1fc84dc95abaf51294efa10fe111d65bc0b08483 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <sakoman@gmail.com>
+Date: Tue, 15 Dec 2009 14:59:42 -0800
+Subject: [PATCH 16/45] ARM: OMAP: Overo: Add support for second ethernet port
+
+Signed-off-by: Steve Sakoman <sakoman@gmail.com>
+---
+ arch/arm/mach-omap2/board-overo.c |   56 +++++++++++++++++++++++++++++++++++--
+ 1 files changed, 53 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
+index e0aebc3..6204b8c 100644
+--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
+@@ -63,6 +63,8 @@
+ 
+ #define OVERO_SMSC911X_CS      5
+ #define OVERO_SMSC911X_GPIO    176
+#define OVERO_SMSC911X2_CS     4
+#define OVERO_SMSC911X2_GPIO   65
+ 
+ #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
+ 	defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
+@@ -137,6 +139,16 @@ static struct resource overo_smsc911x_resources[] = {
+ 	},
+ };
+ 
+static struct resource overo_smsc911x2_resources[] = {
+	{
+		.name	= "smsc911x2-memory",
+		.flags	= IORESOURCE_MEM,
+	},
+	{
+		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
+	},
+};
+
+ static struct smsc911x_platform_config overo_smsc911x_config = {
+ 	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+ 	.irq_type	= SMSC911X_IRQ_TYPE_OPEN_DRAIN,
+@@ -146,7 +158,7 @@ static struct smsc911x_platform_config overo_smsc911x_config = {
+ 
+ static struct platform_device overo_smsc911x_device = {
+ 	.name		= "smsc911x",
+-	.id		= -1,
+	.id		= 0,
+ 	.num_resources	= ARRAY_SIZE(overo_smsc911x_resources),
+ 	.resource	= overo_smsc911x_resources,
+ 	.dev		= {
+@@ -154,9 +166,26 @@ static struct platform_device overo_smsc911x_device = {
+ 	},
+ };
+ 
+static struct platform_device overo_smsc911x2_device = {
+	.name		= "smsc911x",
+	.id		= 1,
+	.num_resources	= ARRAY_SIZE(overo_smsc911x2_resources),
+	.resource	= overo_smsc911x2_resources,
+	.dev		= {
+		.platform_data = &overo_smsc911x_config,
+	},
+};
+
+static struct platform_device *smsc911x_devices[] = {
+	&overo_smsc911x_device,
+	&overo_smsc911x2_device,
+};
+
+ static inline void __init overo_init_smsc911x(void)
+ {
+-	unsigned long cs_mem_base;
+	unsigned long cs_mem_base, cs_mem_base2;
+
+	/* set up first smsc911x chip */
+ 
+ 	if (gpmc_cs_request(OVERO_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) {
+ 		printk(KERN_ERR "Failed request for GPMC mem for smsc911x\n");
+@@ -177,7 +206,28 @@ static inline void __init overo_init_smsc911x(void)
+ 	overo_smsc911x_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X_GPIO);
+ 	overo_smsc911x_resources[1].end	  = 0;
+ 
+-	platform_device_register(&overo_smsc911x_device);
+	/* set up second smsc911x chip */
+
+	if (gpmc_cs_request(OVERO_SMSC911X2_CS, SZ_16M, &cs_mem_base2) < 0) {
+		printk(KERN_ERR "Failed request for GPMC mem for smsc911x2\n");
+		return;
+	}
+
+	overo_smsc911x2_resources[0].start = cs_mem_base2 + 0x0;
+	overo_smsc911x2_resources[0].end   = cs_mem_base2 + 0xff;
+
+	if ((gpio_request(OVERO_SMSC911X2_GPIO, "SMSC911X2 IRQ") == 0) &&
+	    (gpio_direction_input(OVERO_SMSC911X2_GPIO) == 0)) {
+		gpio_export(OVERO_SMSC911X2_GPIO, 0);
+	} else {
+		printk(KERN_ERR "could not obtain gpio for SMSC911X2 IRQ\n");
+		return;
+	}
+
+	overo_smsc911x2_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X2_GPIO);
+	overo_smsc911x2_resources[1].end   = 0;
+
+	platform_add_devices(smsc911x_devices, ARRAY_SIZE(smsc911x_devices));
+ }
+ 
+ #else
+-- 
+1.6.6.1
+
@@ -0,0 +1,29 @@
+From f6084470f7861f9cc05faec2a8f8825ec55f7022 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <sakoman@gmail.com>
+Date: Tue, 15 Dec 2009 15:17:44 -0800
+Subject: [PATCH 17/45] drivers: net: smsc911x: return ENODEV if device is not found
+
+Signed-off-by: Steve Sakoman <sakoman@gmail.com>
+---
+ drivers/net/smsc911x.c |    4 +++-
+ 1 files changed, 3 insertions(+), 1 deletions(-)
+
+diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c
+index 494cd91..2472cb0 100644
+--- a/drivers/net/smsc911x.c
+++ b/drivers/net/smsc911x.c
+@@ -2021,8 +2021,10 @@ static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
+ 	}
+ 
+ 	retval = smsc911x_init(dev);
+-	if (retval < 0)
+	if (retval < 0) {
+		retval = -ENODEV;
+ 		goto out_unmap_io_3;
+	}
+ 
+ 	/* configure irq polarity and type before connecting isr */
+ 	if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
+-- 
+1.6.6.1
+
@@ -0,0 +1,53 @@
+From 56f59d080226a7a6a033e7f20e8a41d1c327e5a1 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <sakoman@gmail.com>
+Date: Tue, 15 Dec 2009 15:24:10 -0800
+Subject: [PATCH 18/45] drivers: input: touchscreen: ads7846: return ENODEV if device is not found
+
+Signed-off-by: Steve Sakoman <sakoman@gmail.com>
+---
+ drivers/input/touchscreen/ads7846.c |   13 ++++++++++---
+ 1 files changed, 10 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c
+index e53ac1f..45287ab 100644
+--- a/drivers/input/touchscreen/ads7846.c
+++ b/drivers/input/touchscreen/ads7846.c
+@@ -1165,9 +1165,16 @@ static int __devinit ads7846_probe(struct spi_device *spi)
+ 	/* take a first sample, leaving nPENIRQ active and vREF off; avoid
+ 	 * the touchscreen, in case it's not connected.
+ 	 */
+-	(void) ads7846_read12_ser(&spi->dev,
+	err = ads7846_read12_ser(&spi->dev,
+ 			  READ_12BIT_SER(vaux) | ADS_PD10_ALL_ON);
+ 
+	/* if sample is all 0's or all 1's then there is no device on spi */	
+	if ( (err == 0x000) || (err == 0xfff)) {
+		dev_info(&spi->dev, "no device detected, test read result was 0x%08X\n", err);
+		err = -ENODEV;
+		goto err_free_irq;
+	}
+
+ 	err = sysfs_create_group(&spi->dev.kobj, &ads784x_attr_group);
+ 	if (err)
+ 		goto err_remove_hwmon;
+@@ -1188,7 +1195,7 @@ static int __devinit ads7846_probe(struct spi_device *spi)
+  err_free_irq:
+ 	free_irq(spi->irq, ts);
+  err_free_gpio:
+-	if (ts->gpio_pendown != -1)
+	if (!ts->get_pendown_state && ts->gpio_pendown != -1)
+ 		gpio_free(ts->gpio_pendown);
+  err_cleanup_filter:
+ 	if (ts->filter_cleanup)
+@@ -1216,7 +1223,7 @@ static int __devexit ads7846_remove(struct spi_device *spi)
+ 	/* suspend left the IRQ disabled */
+ 	enable_irq(ts->spi->irq);
+ 
+-	if (ts->gpio_pendown != -1)
+	if (!ts->get_pendown_state && ts->gpio_pendown != -1)
+ 		gpio_free(ts->gpio_pendown);
+ 
+ 	if (ts->filter_cleanup)
+-- 
+1.6.6.1
+
@@ -0,0 +1,601 @@
+From b9270dc07b1b66cce33580bca6276c20f1bf68d2 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Wed, 19 Jan 2011 16:06:42 +0100
+Subject: [PATCH 19/45] drivers: mfd: add twl4030 madc driver
+
+---
+ drivers/mfd/Kconfig        |   21 ++
+ drivers/mfd/Makefile       |    1 +
+ drivers/mfd/twl4030-madc.c |  536 ++++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 558 insertions(+), 0 deletions(-)
+ create mode 100644 drivers/mfd/twl4030-madc.c
+
+diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
+index 306b346..6221146 100644
+--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
+@@ -148,6 +148,27 @@ config TWL4030_CODEC
+ 	default n
+ 
+ 
+config TWL4030_MADC
+	tristate "TWL4030 MADC Driver"
+	depends on TWL4030_CORE
+	help
+	  The TWL4030 Monitoring ADC driver enables the host
+	  processor to monitor analog signals using analog-to-digital
+	  conversions on the input source. TWL4030 MADC provides the
+	  following features:
+	   - Single 10-bit ADC with successive approximation register (SAR) conversion;
+	   - Analog multiplexer for 16 inputs;
+	   - Seven (of the 16) inputs are freely available;
+	   - Battery voltage monitoring;
+	   - Concurrent conversion request management;
+	   - Interrupt signal to Primary Interrupt Handler;
+	   - Averaging feature;
+	   - Selective enable/disable of the averaging feature.
+
+	  Say 'y' here to statically link this module into the kernel or 'm'
+	  to build it as a dinamically loadable module. The module will be
+	  called twl4030-madc.ko
+
+ config MFD_TMIO
+ 	bool
+ 	default n
+diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
+index 85dc3a7..44350e7 100644
+--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
+@@ -29,6 +29,7 @@ obj-$(CONFIG_MENELAUS)		+= menelaus.o
+ obj-$(CONFIG_TWL4030_CORE)	+= twl-core.o twl4030-irq.o twl6030-irq.o
+ obj-$(CONFIG_TWL4030_POWER)    += twl4030-power.o
+ obj-$(CONFIG_TWL4030_CODEC)	+= twl4030-codec.o
+obj-$(CONFIG_TWL4030_MADC)	+= twl4030-madc.o
+ 
+ obj-$(CONFIG_TPS65910_CORE)     += tps65910-core.o
+ 
+diff --git a/drivers/mfd/twl4030-madc.c b/drivers/mfd/twl4030-madc.c
+new file mode 100644
+index 0000000..7d83ab8
+--- /dev/null
+++ b/drivers/mfd/twl4030-madc.c
+@@ -0,0 +1,536 @@
+/*
+ * TWL4030 MADC module driver
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ * Mikko Ylinen <mikko.k.ylinen@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/platform_device.h>
+#include <linux/miscdevice.h>
+#include <linux/i2c/twl4030.h>
+#include <linux/i2c/twl4030-madc.h>
+
+#include <asm/uaccess.h>
+
+#define TWL4030_MADC_PFX	"twl4030-madc: "
+
+struct twl4030_madc_data {
+	struct device		*dev;
+	struct mutex		lock;
+	struct work_struct	ws;
+	struct twl4030_madc_request	requests[TWL4030_MADC_NUM_METHODS];
+	int imr;
+	int isr;
+};
+
+static struct twl4030_madc_data *the_madc;
+
+static
+const struct twl4030_madc_conversion_method twl4030_conversion_methods[] = {
+	[TWL4030_MADC_RT] = {
+		.sel	= TWL4030_MADC_RTSELECT_LSB,
+		.avg	= TWL4030_MADC_RTAVERAGE_LSB,
+		.rbase	= TWL4030_MADC_RTCH0_LSB,
+	},
+	[TWL4030_MADC_SW1] = {
+		.sel	= TWL4030_MADC_SW1SELECT_LSB,
+		.avg	= TWL4030_MADC_SW1AVERAGE_LSB,
+		.rbase	= TWL4030_MADC_GPCH0_LSB,
+		.ctrl	= TWL4030_MADC_CTRL_SW1,
+	},
+	[TWL4030_MADC_SW2] = {
+		.sel	= TWL4030_MADC_SW2SELECT_LSB,
+		.avg	= TWL4030_MADC_SW2AVERAGE_LSB,
+		.rbase	= TWL4030_MADC_GPCH0_LSB,
+		.ctrl	= TWL4030_MADC_CTRL_SW2,
+	},
+};
+
+static int twl4030_madc_read(struct twl4030_madc_data *madc, u8 reg)
+{
+	int ret;
+	u8 val;
+
+	ret = twl4030_i2c_read_u8(TWL4030_MODULE_MADC, &val, reg);
+	if (ret) {
+		dev_dbg(madc->dev, "unable to read register 0x%X\n", reg);
+		return ret;
+	}
+
+	return val;
+}
+
+static void twl4030_madc_write(struct twl4030_madc_data *madc, u8 reg, u8 val)
+{
+	int ret;
+
+	ret = twl4030_i2c_write_u8(TWL4030_MODULE_MADC, val, reg);
+	if (ret)
+		dev_err(madc->dev, "unable to write register 0x%X\n", reg);
+}
+
+static int twl4030_madc_channel_raw_read(struct twl4030_madc_data *madc, u8 reg)
+{
+	u8 msb, lsb;
+
+	/* For each ADC channel, we have MSB and LSB register pair. MSB address
+	 * is always LSB address+1. reg parameter is the addr of LSB register */
+	msb = twl4030_madc_read(madc, reg + 1);
+	lsb = twl4030_madc_read(madc, reg);
+
+	return (int)(((msb << 8) | lsb) >> 6);
+}
+
+static int twl4030_madc_read_channels(struct twl4030_madc_data *madc,
+		u8 reg_base, u16 channels, int *buf)
+{
+	int count = 0;
+	u8 reg, i;
+
+	if (unlikely(!buf))
+		return 0;
+
+	for (i = 0; i < TWL4030_MADC_MAX_CHANNELS; i++) {
+		if (channels & (1<<i)) {
+			reg = reg_base + 2*i;
+			buf[i] = twl4030_madc_channel_raw_read(madc, reg);
+			count++;
+		}
+	}
+	return count;
+}
+
+static void twl4030_madc_enable_irq(struct twl4030_madc_data *madc, int id)
+{
+	u8 val;
+
+	val = twl4030_madc_read(madc, madc->imr);
+	val &= ~(1 << id);
+	twl4030_madc_write(madc, madc->imr, val);
+}
+
+static void twl4030_madc_disable_irq(struct twl4030_madc_data *madc, int id)
+{
+	u8 val;
+
+	val = twl4030_madc_read(madc, madc->imr);
+	val |= (1 << id);
+	twl4030_madc_write(madc, madc->imr, val);
+}
+
+static irqreturn_t twl4030_madc_irq_handler(int irq, void *_madc)
+{
+	struct twl4030_madc_data *madc = _madc;
+	u8 isr_val, imr_val;
+	int i;
+
+#ifdef CONFIG_LOCKDEP
+	/* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
+	 * we don't want and can't tolerate.  Although it might be
+	 * friendlier not to borrow this thread context...
+	 */
+	local_irq_enable();
+#endif
+
+	/* Use COR to ack interrupts since we have no shared IRQs in ISRx */
+	isr_val = twl4030_madc_read(madc, madc->isr);
+	imr_val = twl4030_madc_read(madc, madc->imr);
+
+	isr_val &= ~imr_val;
+
+	for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
+
+		if (!(isr_val & (1<<i)))
+			continue;
+
+		twl4030_madc_disable_irq(madc, i);
+		madc->requests[i].result_pending = 1;
+	}
+
+	schedule_work(&madc->ws);
+
+	return IRQ_HANDLED;
+}
+
+static void twl4030_madc_work(struct work_struct *ws)
+{
+	const struct twl4030_madc_conversion_method *method;
+	struct twl4030_madc_data *madc;
+	struct twl4030_madc_request *r;
+	int len, i;
+
+	madc = container_of(ws, struct twl4030_madc_data, ws);
+	mutex_lock(&madc->lock);
+
+	for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
+
+		r = &madc->requests[i];
+
+		/* No pending results for this method, move to next one */
+		if (!r->result_pending)
+			continue;
+
+		method = &twl4030_conversion_methods[r->method];
+
+		/* Read results */
+		len = twl4030_madc_read_channels(madc, method->rbase,
+						 r->channels, r->rbuf);
+
+		/* Return results to caller */
+		if (r->func_cb != NULL) {
+			r->func_cb(len, r->channels, r->rbuf);
+			r->func_cb = NULL;
+		}
+
+		/* Free request */
+		r->result_pending = 0;
+		r->active	  = 0;
+	}
+
+	mutex_unlock(&madc->lock);
+}
+
+static int twl4030_madc_set_irq(struct twl4030_madc_data *madc,
+		struct twl4030_madc_request *req)
+{
+	struct twl4030_madc_request *p;
+
+	p = &madc->requests[req->method];
+
+	memcpy(p, req, sizeof *req);
+
+	twl4030_madc_enable_irq(madc, req->method);
+
+	return 0;
+}
+
+static inline void twl4030_madc_start_conversion(struct twl4030_madc_data *madc,
+		int conv_method)
+{
+	const struct twl4030_madc_conversion_method *method;
+
+	method = &twl4030_conversion_methods[conv_method];
+
+	switch (conv_method) {
+	case TWL4030_MADC_SW1:
+	case TWL4030_MADC_SW2:
+		twl4030_madc_write(madc, method->ctrl, TWL4030_MADC_SW_START);
+		break;
+	case TWL4030_MADC_RT:
+	default:
+		break;
+	}
+}
+
+static int twl4030_madc_wait_conversion_ready(
+		struct twl4030_madc_data *madc,
+		unsigned int timeout_ms, u8 status_reg)
+{
+	unsigned long timeout;
+
+	timeout = jiffies + msecs_to_jiffies(timeout_ms);
+	do {
+		u8 reg;
+
+		reg = twl4030_madc_read(madc, status_reg);
+		if (!(reg & TWL4030_MADC_BUSY) && (reg & TWL4030_MADC_EOC_SW))
+			return 0;
+	} while (!time_after(jiffies, timeout));
+
+	return -EAGAIN;
+}
+
+int twl4030_madc_conversion(struct twl4030_madc_request *req)
+{
+	const struct twl4030_madc_conversion_method *method;
+	u8 ch_msb, ch_lsb;
+	int ret;
+
+	if (unlikely(!req))
+		return -EINVAL;
+
+	mutex_lock(&the_madc->lock);
+
+	/* Do we have a conversion request ongoing */
+	if (the_madc->requests[req->method].active) {
+		ret = -EBUSY;
+		goto out;
+	}
+
+	ch_msb = (req->channels >> 8) & 0xff;
+	ch_lsb = req->channels & 0xff;
+
+	method = &twl4030_conversion_methods[req->method];
+
+	/* Select channels to be converted */
+	twl4030_madc_write(the_madc, method->sel + 1, ch_msb);
+	twl4030_madc_write(the_madc, method->sel, ch_lsb);
+
+	/* Select averaging for all channels if do_avg is set */
+	if (req->do_avg) {
+		twl4030_madc_write(the_madc, method->avg + 1, ch_msb);
+		twl4030_madc_write(the_madc, method->avg, ch_lsb);
+	}
+
+	if ((req->type == TWL4030_MADC_IRQ_ONESHOT) && (req->func_cb != NULL)) {
+		twl4030_madc_set_irq(the_madc, req);
+		twl4030_madc_start_conversion(the_madc, req->method);
+		the_madc->requests[req->method].active = 1;
+		ret = 0;
+		goto out;
+	}
+
+	/* With RT method we should not be here anymore */
+	if (req->method == TWL4030_MADC_RT) {
+		ret = -EINVAL;
+		goto out;
+	}
+
+	twl4030_madc_start_conversion(the_madc, req->method);
+	the_madc->requests[req->method].active = 1;
+
+	/* Wait until conversion is ready (ctrl register returns EOC) */
+	ret = twl4030_madc_wait_conversion_ready(the_madc, 5, method->ctrl);
+	if (ret) {
+		dev_dbg(the_madc->dev, "conversion timeout!\n");
+		the_madc->requests[req->method].active = 0;
+		goto out;
+	}
+
+	ret = twl4030_madc_read_channels(the_madc, method->rbase, req->channels,
+					 req->rbuf);
+
+	the_madc->requests[req->method].active = 0;
+
+out:
+	mutex_unlock(&the_madc->lock);
+
+	return ret;
+}
+EXPORT_SYMBOL(twl4030_madc_conversion);
+
+static int twl4030_madc_set_current_generator(struct twl4030_madc_data *madc,
+		int chan, int on)
+{
+	int ret;
+	u8 regval;
+
+	/* Current generator is only available for ADCIN0 and ADCIN1. NB:
+	 * ADCIN1 current generator only works when AC or VBUS is present */
+	if (chan > 1)
+		return EINVAL;
+
+	ret = twl4030_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE,
+				  &regval, TWL4030_BCI_BCICTL1);
+	if (on)
+		regval |= (chan) ? TWL4030_BCI_ITHEN : TWL4030_BCI_TYPEN;
+	else
+		regval &= (chan) ? ~TWL4030_BCI_ITHEN : ~TWL4030_BCI_TYPEN;
+	ret = twl4030_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE,
+				   regval, TWL4030_BCI_BCICTL1);
+
+	return ret;
+}
+
+static int twl4030_madc_set_power(struct twl4030_madc_data *madc, int on)
+{
+	u8 regval;
+
+	regval = twl4030_madc_read(madc, TWL4030_MADC_CTRL1);
+	if (on)
+		regval |= TWL4030_MADC_MADCON;
+	else
+		regval &= ~TWL4030_MADC_MADCON;
+	twl4030_madc_write(madc, TWL4030_MADC_CTRL1, regval);
+
+	return 0;
+}
+
+static long twl4030_madc_ioctl(struct file *filp, unsigned int cmd,
+			       unsigned long arg)
+{
+	struct twl4030_madc_user_parms par;
+	int val, ret;
+
+	ret = copy_from_user(&par, (void __user *) arg, sizeof(par));
+	if (ret) {
+		dev_dbg(the_madc->dev, "copy_from_user: %d\n", ret);
+		return -EACCES;
+	}
+
+	switch (cmd) {
+	case TWL4030_MADC_IOCX_ADC_RAW_READ: {
+		struct twl4030_madc_request req;
+		if (par.channel >= TWL4030_MADC_MAX_CHANNELS)
+			return -EINVAL;
+
+		req.channels = (1 << par.channel);
+		req.do_avg	= par.average;
+		req.method	= TWL4030_MADC_SW1;
+		req.func_cb	= NULL;
+
+		val = twl4030_madc_conversion(&req);
+		if (val <= 0) {
+			par.status = -1;
+		} else {
+			par.status = 0;
+			par.result = (u16)req.rbuf[par.channel];
+		}
+		break;
+					     }
+	default:
+		return -EINVAL;
+	}
+
+	ret = copy_to_user((void __user *) arg, &par, sizeof(par));
+	if (ret) {
+		dev_dbg(the_madc->dev, "copy_to_user: %d\n", ret);
+		return -EACCES;
+	}
+
+	return 0;
+}
+
+static struct file_operations twl4030_madc_fileops = {
+	.owner = THIS_MODULE,
+	.unlocked_ioctl = twl4030_madc_ioctl
+};
+
+static struct miscdevice twl4030_madc_device = {
+	.minor = MISC_DYNAMIC_MINOR,
+	.name = "twl4030-madc",
+	.fops = &twl4030_madc_fileops
+};
+
+static int __init twl4030_madc_probe(struct platform_device *pdev)
+{
+	struct twl4030_madc_data *madc;
+	struct twl4030_madc_platform_data *pdata = pdev->dev.platform_data;
+	int ret;
+	u8 regval;
+
+	madc = kzalloc(sizeof *madc, GFP_KERNEL);
+	if (!madc)
+		return -ENOMEM;
+
+	if (!pdata) {
+		dev_dbg(&pdev->dev, "platform_data not available\n");
+		ret = -EINVAL;
+		goto err_pdata;
+	}
+
+	madc->imr = (pdata->irq_line == 1) ? TWL4030_MADC_IMR1 : TWL4030_MADC_IMR2;
+	madc->isr = (pdata->irq_line == 1) ? TWL4030_MADC_ISR1 : TWL4030_MADC_ISR2;
+
+	ret = misc_register(&twl4030_madc_device);
+	if (ret) {
+		dev_dbg(&pdev->dev, "could not register misc_device\n");
+		goto err_misc;
+	}
+	twl4030_madc_set_power(madc, 1);
+	twl4030_madc_set_current_generator(madc, 0, 1);
+
+	/* Enable ADCIN3 through 6 */
+	ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB,
+				  &regval, TWL4030_USB_CARKIT_ANA_CTRL);
+
+	regval |= TWL4030_USB_SEL_MADC_MCPC;
+
+	ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB,
+				regval, TWL4030_USB_CARKIT_ANA_CTRL);
+
+
+	ret = twl4030_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE,
+				  &regval, TWL4030_BCI_BCICTL1);
+
+	regval |= TWL4030_BCI_MESBAT;
+
+	ret = twl4030_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE,
+				   regval, TWL4030_BCI_BCICTL1);
+
+	ret = request_irq(platform_get_irq(pdev, 0), twl4030_madc_irq_handler,
+			  0, "twl4030_madc", madc);
+	if (ret) {
+		dev_dbg(&pdev->dev, "could not request irq\n");
+		goto err_irq;
+	}
+
+	platform_set_drvdata(pdev, madc);
+	mutex_init(&madc->lock);
+	INIT_WORK(&madc->ws, twl4030_madc_work);
+
+	the_madc = madc;
+
+	return 0;
+
+err_irq:
+	misc_deregister(&twl4030_madc_device);
+
+err_misc:
+err_pdata:
+	kfree(madc);
+
+	return ret;
+}
+
+static int __exit twl4030_madc_remove(struct platform_device *pdev)
+{
+	struct twl4030_madc_data *madc = platform_get_drvdata(pdev);
+
+	twl4030_madc_set_power(madc, 0);
+	twl4030_madc_set_current_generator(madc, 0, 0);
+	free_irq(platform_get_irq(pdev, 0), madc);
+	cancel_work_sync(&madc->ws);
+	misc_deregister(&twl4030_madc_device);
+
+	return 0;
+}
+
+static struct platform_driver twl4030_madc_driver = {
+	.probe		= twl4030_madc_probe,
+	.remove		= __exit_p(twl4030_madc_remove),
+	.driver		= {
+		.name	= "twl4030_madc",
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init twl4030_madc_init(void)
+{
+	return platform_driver_register(&twl4030_madc_driver);
+}
+module_init(twl4030_madc_init);
+
+static void __exit twl4030_madc_exit(void)
+{
+	platform_driver_unregister(&twl4030_madc_driver);
+}
+module_exit(twl4030_madc_exit);
+
+MODULE_ALIAS("platform:twl4030-madc");
+MODULE_AUTHOR("Nokia Corporation");
+MODULE_DESCRIPTION("twl4030 ADC driver");
+MODULE_LICENSE("GPL");
+
+-- 
+1.6.6.1
+
@@ -0,0 +1,149 @@
+From b13ea241d699a10e3f5347a90bc3d31329f3601d Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Thu, 17 Dec 2009 15:54:58 -0800
+Subject: [PATCH 20/45] ARM: OMAP: Add missing twl4030 madc header file
+
+---
+ include/linux/i2c/twl4030-madc.h |  130 ++++++++++++++++++++++++++++++++++++++
+ 1 files changed, 130 insertions(+), 0 deletions(-)
+ create mode 100644 include/linux/i2c/twl4030-madc.h
+
+diff --git a/include/linux/i2c/twl4030-madc.h b/include/linux/i2c/twl4030-madc.h
+new file mode 100644
+index 0000000..341a665
+--- /dev/null
+++ b/include/linux/i2c/twl4030-madc.h
+@@ -0,0 +1,130 @@
+/*
+ * include/linux/i2c/twl4030-madc.h
+ *
+ * TWL4030 MADC module driver header
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ * Mikko Ylinen <mikko.k.ylinen@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#ifndef _TWL4030_MADC_H
+#define _TWL4030_MADC_H
+
+struct twl4030_madc_conversion_method {
+	u8 sel;
+	u8 avg;
+	u8 rbase;
+	u8 ctrl;
+};
+
+#define TWL4030_MADC_MAX_CHANNELS 16
+
+struct twl4030_madc_request {
+	u16 channels;
+	u16 do_avg;
+	u16 method;
+	u16 type;
+	int active;
+	int result_pending;
+	int rbuf[TWL4030_MADC_MAX_CHANNELS];
+	void (*func_cb)(int len, int channels, int *buf);
+};
+
+enum conversion_methods {
+	TWL4030_MADC_RT,
+	TWL4030_MADC_SW1,
+	TWL4030_MADC_SW2,
+	TWL4030_MADC_NUM_METHODS
+};
+
+enum sample_type {
+	TWL4030_MADC_WAIT,
+	TWL4030_MADC_IRQ_ONESHOT,
+	TWL4030_MADC_IRQ_REARM
+};
+
+#define TWL4030_MADC_CTRL1		0x00
+#define TWL4030_MADC_CTRL2		0x01
+
+#define TWL4030_MADC_RTSELECT_LSB	0x02
+#define TWL4030_MADC_SW1SELECT_LSB	0x06
+#define TWL4030_MADC_SW2SELECT_LSB	0x0A
+
+#define TWL4030_MADC_RTAVERAGE_LSB	0x04
+#define TWL4030_MADC_SW1AVERAGE_LSB	0x08
+#define TWL4030_MADC_SW2AVERAGE_LSB	0x0C
+
+#define TWL4030_MADC_CTRL_SW1		0x12
+#define TWL4030_MADC_CTRL_SW2		0x13
+
+#define TWL4030_MADC_RTCH0_LSB		0x17
+#define TWL4030_MADC_GPCH0_LSB		0x37
+
+#define TWL4030_MADC_MADCON		(1<<0)	/* MADC power on */
+#define TWL4030_MADC_BUSY		(1<<0)	/* MADC busy */
+#define TWL4030_MADC_EOC_SW		(1<<1)	/* MADC conversion completion */
+#define TWL4030_MADC_SW_START		(1<<5)  /* MADC SWx start conversion */
+
+#define	TWL4030_MADC_ADCIN0		(1<<0)
+#define	TWL4030_MADC_ADCIN1		(1<<1)
+#define	TWL4030_MADC_ADCIN2		(1<<2)
+#define	TWL4030_MADC_ADCIN3		(1<<3)
+#define	TWL4030_MADC_ADCIN4		(1<<4)
+#define	TWL4030_MADC_ADCIN5		(1<<5)
+#define	TWL4030_MADC_ADCIN6		(1<<6)
+#define	TWL4030_MADC_ADCIN7		(1<<7)
+#define	TWL4030_MADC_ADCIN8		(1<<8)
+#define	TWL4030_MADC_ADCIN9		(1<<9)
+#define	TWL4030_MADC_ADCIN10		(1<<10)
+#define	TWL4030_MADC_ADCIN11		(1<<11)
+#define	TWL4030_MADC_ADCIN12		(1<<12)
+#define	TWL4030_MADC_ADCIN13		(1<<13)
+#define	TWL4030_MADC_ADCIN14		(1<<14)
+#define	TWL4030_MADC_ADCIN15		(1<<15)
+
+/* Fixed channels */
+#define TWL4030_MADC_BTEMP		TWL4030_MADC_ADCIN1
+#define TWL4030_MADC_VBUS		TWL4030_MADC_ADCIN8
+#define TWL4030_MADC_VBKB		TWL4030_MADC_ADCIN9
+#define	TWL4030_MADC_ICHG		TWL4030_MADC_ADCIN10
+#define TWL4030_MADC_VCHG		TWL4030_MADC_ADCIN11
+#define	TWL4030_MADC_VBAT		TWL4030_MADC_ADCIN12
+
+/* BCI related - XXX To be moved elsewhere */
+#define TWL4030_BCI_BCICTL1		0x23
+#define	TWL4030_BCI_MESBAT		(1<<1)
+#define	TWL4030_BCI_TYPEN		(1<<4)
+#define	TWL4030_BCI_ITHEN		(1<<3)
+
+/* USB related - XXX To be moved elsewhere */
+#define TWL4030_USB_CARKIT_ANA_CTRL		0xBB
+#define TWL4030_USB_SEL_MADC_MCPC		(1<<3)
+
+#define TWL4030_MADC_IOC_MAGIC '`'
+#define TWL4030_MADC_IOCX_ADC_RAW_READ		_IO(TWL4030_MADC_IOC_MAGIC, 0)
+
+struct twl4030_madc_user_parms {
+	int channel;
+	int average;
+	int status;
+	u16 result;
+};
+
+int twl4030_madc_conversion(struct twl4030_madc_request *conv);
+
+#endif
+-- 
+1.6.6.1
+
@@ -0,0 +1,32 @@
+From 6b34060f2a665d94e953a7a9b3d66a79e1736cd6 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Thu, 17 Dec 2009 14:27:15 -0800
+Subject: [PATCH 21/45] ARM: OMAP: Add twl4030 madc support to Overo
+
+---
+ arch/arm/mach-omap2/board-overo.c |    5 +++++
+ 1 files changed, 5 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
+index 6204b8c..9c76588 100644
+--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
+@@ -390,10 +390,15 @@ static struct twl4030_codec_data overo_codec_data = {
+ 
+ /* mmc2 (WLAN) and Bluetooth don't use twl4030 regulators */
+ 
+static struct twl4030_madc_platform_data overo_madc_data = {
+	.irq_line	= 1,
+};
+
+ static struct twl4030_platform_data overo_twldata = {
+ 	.irq_base	= TWL4030_IRQ_BASE,
+ 	.irq_end	= TWL4030_IRQ_END,
+ 	.gpio		= &overo_gpio_data,
+	.madc		= &overo_madc_data,
+ 	.usb		= &overo_usb_data,
+ 	.codec		= &overo_codec_data,
+ 	.vmmc1		= &overo_vmmc1,
+-- 
+1.6.6.1
+
@@ -0,0 +1,35 @@
+From 04101f4527b88fbd540fc89f2a8af06d26030fd1 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Thu, 17 Dec 2009 14:32:36 -0800
+Subject: [PATCH 22/45] ARM: OMAP: Add twl4030 madc support to Beagle
+
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |    5 +++++
+ 1 files changed, 5 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index b3c8cb7..dd830b1 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -473,6 +473,10 @@ static struct twl4030_codec_data beagle_codec_data = {
+ 	.audio = &beagle_audio_data,
+ };
+ 
+static struct twl4030_madc_platform_data beagle_madc_data = {
+	.irq_line	= 1,
+};
+
+ static struct twl4030_platform_data beagle_twldata = {
+ 	.irq_base	= TWL4030_IRQ_BASE,
+ 	.irq_end	= TWL4030_IRQ_END,
+@@ -481,6 +485,7 @@ static struct twl4030_platform_data beagle_twldata = {
+ 	.usb		= &beagle_usb_data,
+ 	.gpio		= &beagle_gpio_data,
+ 	.codec		= &beagle_codec_data,
+	.madc		= &beagle_madc_data,
+ 	.vmmc1		= &beagle_vmmc1,
+ 	.vsim		= &beagle_vsim,
+ 	.vdac		= &beagle_vdac,
+-- 
+1.6.6.1
+
@@ -0,0 +1,25 @@
+From 6c58da582504f23256ec656a03706a1df438f291 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Tue, 19 Jan 2010 20:00:46 -0800
+Subject: [PATCH 23/45] netdev: rt73usb - add vendor/device ID for Ceiva Wireless PartNo 81726-00702
+
+---
+ drivers/net/wireless/rt2x00/rt73usb.c |    2 ++
+ 1 files changed, 2 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
+index ced3b6a..719ac0a 100644
+--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
+@@ -2357,6 +2357,8 @@ static struct usb_device_id rt73usb_device_table[] = {
+ 	{ USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
+ 	{ USB_DEVICE(0x0411, 0x0116), USB_DEVICE_DATA(&rt73usb_ops) },
+ 	{ USB_DEVICE(0x0411, 0x0119), USB_DEVICE_DATA(&rt73usb_ops) },
+	/* Ceiva Wireless PartNo 81726-00702 */
+	{ USB_DEVICE(0x178d, 0x02be), USB_DEVICE_DATA(&rt73usb_ops) },
+ 	/* CNet */
+ 	{ USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
+ 	{ USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
+-- 
+1.6.6.1
+
@@ -0,0 +1,28 @@
+From b17b11c0f8d56f868da267641486b62e1a44790b Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Mon, 4 Jan 2010 19:20:25 -0800
+Subject: [PATCH 24/45] mmc: don't display single block read console messages
+
+mmc: don't display single block read console messages
+---
+ drivers/mmc/card/block.c |    4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
+index 85f0e8c..05492e9 100644
+--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
+@@ -338,8 +338,8 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
+ 		if (brq.cmd.error || brq.data.error || brq.stop.error) {
+ 			if (brq.data.blocks > 1 && rq_data_dir(req) == READ) {
+ 				/* Redo read one sector at a time */
+-				printk(KERN_WARNING "%s: retrying using single "
+-				       "block read\n", req->rq_disk->disk_name);
+				/* printk(KERN_WARNING "%s: retrying using single "
+				       "block read\n", req->rq_disk->disk_name); */
+ 				disable_multi = 1;
+ 				continue;
+ 			}
+-- 
+1.6.6.1
+
@@ -0,0 +1,47 @@
+From 297f577635fe0182e596112c33b213fd22b4efa7 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Sun, 24 Jan 2010 09:33:56 -0800
+Subject: [PATCH 25/45] ARM: OMAP2: mmc-twl4030: move clock input selection prior to vcc test
+
+otherwise it is not executed on systems that use non-twl regulators
+---
+ arch/arm/mach-omap2/mmc-twl4030.c |   16 ++++++++--------
+ 1 files changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/mmc-twl4030.c b/arch/arm/mach-omap2/mmc-twl4030.c
+index 0c3c72d..dbdafb9 100644
+--- a/arch/arm/mach-omap2/mmc-twl4030.c
+++ b/arch/arm/mach-omap2/mmc-twl4030.c
+@@ -302,6 +302,14 @@ static int twl_mmc23_set_power(struct device *dev, int slot, int power_on, int v
+ 	if (c == NULL)
+ 		return -ENODEV;
+ 
+	if (mmc->slots[0].internal_clock) {
+		u32 reg;
+
+		reg = omap_ctrl_readl(control_devconf1_offset);
+		reg |= OMAP2_MMCSDIO2ADPCLKISEL;
+		omap_ctrl_writel(reg, control_devconf1_offset);
+	}
+
+ 	/* If we don't see a Vcc regulator, assume it's a fixed
+ 	 * voltage always-on regulator.
+ 	 */
+@@ -322,14 +330,6 @@ static int twl_mmc23_set_power(struct device *dev, int slot, int power_on, int v
+ 	 * chips/cards need an interface voltage rail too.
+ 	 */
+ 	if (power_on) {
+-		/* only MMC2 supports a CLKIN */
+-		if (mmc->slots[0].internal_clock) {
+-			u32 reg;
+-
+-			reg = omap_ctrl_readl(control_devconf1_offset);
+-			reg |= OMAP2_MMCSDIO2ADPCLKISEL;
+-			omap_ctrl_writel(reg, control_devconf1_offset);
+-		}
+ 		ret = mmc_regulator_set_ocr(c->vcc, vdd);
+ 		/* enable interface voltage rail, if needed */
+ 		if (ret == 0 && c->vcc_aux) {
+-- 
+1.6.6.1
+
@@ -0,0 +1,373 @@
+From 1f91f7f6dea0268e23d5e3e78b6c8dc5ed245313 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Sun, 14 Feb 2010 12:52:02 +0100
+Subject: [PATCH 26/45] board-overo: add PM code and sync with http://www.sakoman.com/cgi-bin/gitweb.cgi?p=linux-omap-2.6.git;a=shortlog;h=refs/heads/omap3-2.6.32
+
+---
+ arch/arm/mach-omap2/board-overo.c |  274 ++++++++++++++++++++++++++++++++-----
+ 1 files changed, 242 insertions(+), 32 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
+index 9c76588..2595f81 100644
+--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
+@@ -28,6 +28,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/i2c/twl.h>
+ #include <linux/regulator/machine.h>
+#include <linux/spi/spi.h>
+ 
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/nand.h>
+@@ -40,16 +41,24 @@
+ 
+ #include <plat/board.h>
+ #include <plat/common.h>
+#include <plat/display.h>
+ #include <mach/gpio.h>
+ #include <plat/gpmc.h>
+ #include <mach/hardware.h>
+ #include <plat/nand.h>
+#include <plat/mcspi.h>
+ #include <plat/usb.h>
+-
+-#include "mux.h"
+#include <plat/clock.h>
+#include <plat/omap-pm.h>
+ 
+ #include "sdram-micron-mt46h32m32lf-6.h"
+ #include "mmc-twl4030.h"
+ 
+#include "mux.h"
+
+#include "pm.h"
+#include "omap3-opp.h"
+
+ #define OVERO_GPIO_BT_XGATE	15
+ #define OVERO_GPIO_W2W_NRESET	16
+ #define OVERO_GPIO_PENDOWN	114
+@@ -95,18 +104,6 @@ static struct ads7846_platform_data ads7846_config = {
+ 	.keep_vref_on		= 1,
+ };
+ 
+-static struct spi_board_info overo_spi_board_info[] __initdata = {
+-	{
+-		.modalias		= "ads7846",
+-		.bus_num		= 1,
+-		.chip_select		= 0,
+-		.max_speed_hz		= 1500000,
+-		.controller_data	= &ads7846_mcspi_config,
+-		.irq			= OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN),
+-		.platform_data		= &ads7846_config,
+-	}
+-};
+-
+ static void __init overo_ads7846_init(void)
+ {
+ 	if ((gpio_request(OVERO_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
+@@ -116,9 +113,6 @@ static void __init overo_ads7846_init(void)
+ 		printk(KERN_ERR "could not obtain gpio for ADS7846_PENDOWN\n");
+ 		return;
+ 	}
+-
+-	spi_register_board_info(overo_spi_board_info,
+-			ARRAY_SIZE(overo_spi_board_info));
+ }
+ 
+ #else
+@@ -234,6 +228,169 @@ static inline void __init overo_init_smsc911x(void)
+ static inline void __init overo_init_smsc911x(void) { return; }
+ #endif
+ 
+/* DSS */
+static int lcd_enabled;
+static int dvi_enabled;
+
+#define OVERO_GPIO_LCD_EN 144
+#define OVERO_GPIO_LCD_BL 145
+
+static void __init overo_display_init(void)
+{
+	if ((gpio_request(OVERO_GPIO_LCD_EN, "OVERO_GPIO_LCD_EN") == 0) &&
+	    (gpio_direction_output(OVERO_GPIO_LCD_EN, 1) == 0))
+		gpio_export(OVERO_GPIO_LCD_EN, 0);
+	else
+		printk(KERN_ERR "could not obtain gpio for "
+					"OVERO_GPIO_LCD_EN\n");
+
+	if ((gpio_request(OVERO_GPIO_LCD_BL, "OVERO_GPIO_LCD_BL") == 0) &&
+	    (gpio_direction_output(OVERO_GPIO_LCD_BL, 1) == 0))
+		gpio_export(OVERO_GPIO_LCD_BL, 0);
+	else
+		printk(KERN_ERR "could not obtain gpio for "
+					"OVERO_GPIO_LCD_BL\n");
+}
+
+static int overo_panel_enable_dvi(struct omap_dss_device *dssdev)
+{
+	if (lcd_enabled) {
+		printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
+		return -EINVAL;
+	}
+	dvi_enabled = 1;
+
+	return 0;
+}
+
+static void overo_panel_disable_dvi(struct omap_dss_device *dssdev)
+{
+	dvi_enabled = 0;
+}
+
+static struct omap_dss_device overo_dvi_device = {
+	.type			= OMAP_DISPLAY_TYPE_DPI,
+	.name			= "dvi",
+	.driver_name		= "generic_panel",
+	.phy.dpi.data_lines	= 24,
+	.platform_enable	= overo_panel_enable_dvi,
+	.platform_disable	= overo_panel_disable_dvi,
+};
+
+static int overo_panel_enable_tv(struct omap_dss_device *dssdev)
+{
+#define ENABLE_VDAC_DEDICATED           0x03
+#define ENABLE_VDAC_DEV_GRP             0x20
+
+	twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+			ENABLE_VDAC_DEDICATED,
+			TWL4030_VDAC_DEDICATED);
+	twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+			ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP);
+
+	return 0;
+}
+
+static void overo_panel_disable_tv(struct omap_dss_device *dssdev)
+{
+	twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
+			TWL4030_VDAC_DEDICATED);
+	twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
+			TWL4030_VDAC_DEV_GRP);
+}
+
+static struct omap_dss_device overo_tv_device = {
+	.name = "tv",
+	.driver_name = "venc",
+	.type = OMAP_DISPLAY_TYPE_VENC,
+	.phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
+	.platform_enable = overo_panel_enable_tv,
+	.platform_disable = overo_panel_disable_tv,
+};
+
+static int overo_panel_enable_lcd(struct omap_dss_device *dssdev)
+{
+	if (dvi_enabled) {
+		printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
+		return -EINVAL;
+	}
+
+	gpio_set_value(OVERO_GPIO_LCD_EN, 1);
+	gpio_set_value(OVERO_GPIO_LCD_BL, 1);
+	lcd_enabled = 1;
+	return 0;
+}
+
+static void overo_panel_disable_lcd(struct omap_dss_device *dssdev)
+{
+	gpio_set_value(OVERO_GPIO_LCD_EN, 0);
+	gpio_set_value(OVERO_GPIO_LCD_BL, 0);
+	lcd_enabled = 0;
+}
+
+#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
+	defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
+static struct omap_dss_device overo_lcd35_device = {
+	.type			= OMAP_DISPLAY_TYPE_DPI,
+	.name			= "lcd35",
+	.driver_name		= "lgphilips_lb035q02_panel",
+	.phy.dpi.data_lines	= 24,
+	.panel.recommended_bpp	= 16,
+	.platform_enable	= overo_panel_enable_lcd,
+	.platform_disable	= overo_panel_disable_lcd,
+};
+#endif
+
+#if defined(CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C) || \
+	defined(CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C_MODULE)
+static struct omap_dss_device overo_lcd43_device = {
+	.type			= OMAP_DISPLAY_TYPE_DPI,
+	.name			= "lcd43",
+	.driver_name		= "samsung_lte_panel",
+	.phy.dpi.data_lines	= 24,
+	.panel.recommended_bpp	= 16,
+	.platform_enable	= overo_panel_enable_lcd,
+	.platform_disable	= overo_panel_disable_lcd,
+};
+#endif
+
+static struct omap_dss_device *overo_dss_devices[] = {
+	&overo_dvi_device,
+	&overo_tv_device,
+#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
+	defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
+	&overo_lcd35_device,
+#endif
+#if defined(CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C) || \
+	defined(CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C_MODULE)
+	&overo_lcd43_device,
+#endif
+};
+
+static struct omap_dss_board_info overo_dss_data = {
+	.num_devices	= ARRAY_SIZE(overo_dss_devices),
+	.devices	= overo_dss_devices,
+	.default_device	= &overo_dvi_device,
+};
+
+static struct platform_device overo_dss_device = {
+	.name          = "omapdss",
+	.id            = -1,
+	.dev            = {
+		.platform_data = &overo_dss_data,
+	},
+};
+
+static struct regulator_consumer_supply overo_vdda_dac_supply = {
+	.supply		= "vdda_dac",
+	.dev		= &overo_dss_device.dev,
+};
+
+static struct regulator_consumer_supply overo_vdds_dsi_supply = {
+	.supply		= "vdds_dsi",
+	.dev		= &overo_dss_device.dev,
+};
+
+ static struct mtd_partition overo_nand_partitions[] = {
+ 	{
+ 		.name           = "xloader",
+@@ -379,6 +536,37 @@ static struct regulator_init_data overo_vmmc1 = {
+ 	.consumer_supplies	= &overo_vmmc1_supply,
+ };
+ 
+/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
+static struct regulator_init_data overo_vdac = {
+	.constraints = {
+		.min_uV			= 1800000,
+		.max_uV			= 1800000,
+		.valid_modes_mask	= REGULATOR_MODE_NORMAL
+					| REGULATOR_MODE_STANDBY,
+		.valid_ops_mask		= REGULATOR_CHANGE_MODE
+					| REGULATOR_CHANGE_STATUS,
+	},
+	.num_consumer_supplies	= 1,
+	.consumer_supplies	= &overo_vdda_dac_supply,
+};
+
+/* VPLL2 for digital video outputs */
+static struct regulator_init_data overo_vpll2 = {
+	.constraints = {
+		.name			= "VDVI",
+		.min_uV			= 1800000,
+		.max_uV			= 1800000,
+		.valid_modes_mask	= REGULATOR_MODE_NORMAL
+					| REGULATOR_MODE_STANDBY,
+		.valid_ops_mask		= REGULATOR_CHANGE_MODE
+					| REGULATOR_CHANGE_STATUS,
+	},
+	.num_consumer_supplies	= 1,
+	.consumer_supplies	= &overo_vdds_dsi_supply,
+};
+
+/* mmc2 (WLAN) and Bluetooth don't use twl4030 regulators */
+
+ static struct twl4030_codec_audio_data overo_audio_data = {
+ 	.audio_mclk = 26000000,
+ };
+@@ -402,6 +590,8 @@ static struct twl4030_platform_data overo_twldata = {
+ 	.usb		= &overo_usb_data,
+ 	.codec		= &overo_codec_data,
+ 	.vmmc1		= &overo_vmmc1,
+	.vdac		= &overo_vdac,
+	.vpll2		= &overo_vpll2,
+ };
+ 
+ static struct i2c_board_info __initdata overo_i2c_boardinfo[] = {
+@@ -422,31 +612,50 @@ static int __init overo_i2c_init(void)
+ 	return 0;
+ }
+ 
+-static struct platform_device overo_lcd_device = {
+-	.name		= "overo_lcd",
+-	.id		= -1,
+-};
+-
+-static struct omap_lcd_config overo_lcd_config __initdata = {
+-	.ctrl_name	= "internal",
+static struct spi_board_info overo_spi_board_info[] __initdata = {
+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
+	defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
+	{
+		.modalias		= "ads7846",
+		.bus_num		= 1,
+		.chip_select		= 0,
+		.max_speed_hz		= 1500000,
+		.controller_data	= &ads7846_mcspi_config,
+		.irq			= OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN),
+		.platform_data		= &ads7846_config,
+	},
+#endif
+#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
+	defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
+	{
+		.modalias		= "lgphilips_lb035q02_panel-spi",
+		.bus_num		= 1,
+		.chip_select		= 1,
+		.max_speed_hz		= 500000,
+		.mode			= SPI_MODE_3,
+	},
+#endif
+ };
+ 
+-static struct omap_board_config_kernel overo_config[] __initdata = {
+-	{ OMAP_TAG_LCD,		&overo_lcd_config },
+-};
+static int __init overo_spi_init(void)
+{
+	overo_ads7846_init();
+	spi_register_board_info(overo_spi_board_info,
+			ARRAY_SIZE(overo_spi_board_info));
+	return 0;
+}
+ 
+ static void __init overo_init_irq(void)
+ {
+-	omap_board_config = overo_config;
+-	omap_board_config_size = ARRAY_SIZE(overo_config);
+ 	omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+-			     mt46h32m32lf6_sdrc_params, NULL, NULL, NULL);
+			     NULL, omap35x_mpu_rate_table,
+			     omap35x_dsp_rate_table, omap35x_l3_rate_table);
+ 	omap_init_irq();
+ 	omap_gpio_init();
+ }
+ 
+ static struct platform_device *overo_devices[] __initdata = {
+-	&overo_lcd_device,
+	&overo_dss_device,
+ };
+ 
+ static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+@@ -477,8 +686,9 @@ static void __init overo_init(void)
+ 	overo_flash_init();
+ 	usb_musb_init();
+ 	usb_ehci_init(&ehci_pdata);
+-	overo_ads7846_init();
+	overo_spi_init();
+ 	overo_init_smsc911x();
+	overo_display_init();
+ 
+ 	/* Ensure SDRC pins are mux'd for self-refresh */
+ 	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
+-- 
+1.6.6.1
+
@@ -0,0 +1,85 @@
+From e102ffa8fcc1586ed7d4c1390b7b2c7d7d359c40 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Mon, 15 Feb 2010 14:20:51 +0100
+Subject: [PATCH 27/45] twl4030-madc: adjust for twl4030 -> twl api changes
+
+---
+ drivers/mfd/twl4030-madc.c |   18 +++++++++---------
+ 1 files changed, 9 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/mfd/twl4030-madc.c b/drivers/mfd/twl4030-madc.c
+index 7d83ab8..de6bdcd 100644
+--- a/drivers/mfd/twl4030-madc.c
+++ b/drivers/mfd/twl4030-madc.c
+@@ -29,7 +29,7 @@
+ #include <linux/fs.h>
+ #include <linux/platform_device.h>
+ #include <linux/miscdevice.h>
+-#include <linux/i2c/twl4030.h>
+#include <linux/i2c/twl.h>
+ #include <linux/i2c/twl4030-madc.h>
+ 
+ #include <asm/uaccess.h>
+@@ -73,7 +73,7 @@ static int twl4030_madc_read(struct twl4030_madc_data *madc, u8 reg)
+ 	int ret;
+ 	u8 val;
+ 
+-	ret = twl4030_i2c_read_u8(TWL4030_MODULE_MADC, &val, reg);
+	ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &val, reg);
+ 	if (ret) {
+ 		dev_dbg(madc->dev, "unable to read register 0x%X\n", reg);
+ 		return ret;
+@@ -86,7 +86,7 @@ static void twl4030_madc_write(struct twl4030_madc_data *madc, u8 reg, u8 val)
+ {
+ 	int ret;
+ 
+-	ret = twl4030_i2c_write_u8(TWL4030_MODULE_MADC, val, reg);
+	ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, val, reg);
+ 	if (ret)
+ 		dev_err(madc->dev, "unable to write register 0x%X\n", reg);
+ }
+@@ -342,13 +342,13 @@ static int twl4030_madc_set_current_generator(struct twl4030_madc_data *madc,
+ 	if (chan > 1)
+ 		return EINVAL;
+ 
+-	ret = twl4030_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE,
+	ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE,
+ 				  &regval, TWL4030_BCI_BCICTL1);
+ 	if (on)
+ 		regval |= (chan) ? TWL4030_BCI_ITHEN : TWL4030_BCI_TYPEN;
+ 	else
+ 		regval &= (chan) ? ~TWL4030_BCI_ITHEN : ~TWL4030_BCI_TYPEN;
+-	ret = twl4030_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE,
+	ret = twl_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE,
+ 				   regval, TWL4030_BCI_BCICTL1);
+ 
+ 	return ret;
+@@ -453,21 +453,21 @@ static int __init twl4030_madc_probe(struct platform_device *pdev)
+ 	twl4030_madc_set_current_generator(madc, 0, 1);
+ 
+ 	/* Enable ADCIN3 through 6 */
+-	ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB,
+	ret = twl_i2c_read_u8(TWL4030_MODULE_USB,
+ 				  &regval, TWL4030_USB_CARKIT_ANA_CTRL);
+ 
+ 	regval |= TWL4030_USB_SEL_MADC_MCPC;
+ 
+-	ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB,
+	ret = twl_i2c_write_u8(TWL4030_MODULE_USB,
+ 				regval, TWL4030_USB_CARKIT_ANA_CTRL);
+ 
+ 
+-	ret = twl4030_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE,
+	ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE,
+ 				  &regval, TWL4030_BCI_BCICTL1);
+ 
+ 	regval |= TWL4030_BCI_MESBAT;
+ 
+-	ret = twl4030_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE,
+	ret = twl_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE,
+ 				   regval, TWL4030_BCI_BCICTL1);
+ 
+ 	ret = request_irq(platform_get_irq(pdev, 0), twl4030_madc_irq_handler,
+-- 
+1.6.6.1
+
@@ -0,0 +1,161 @@
+From 5e227dbb55a40c616cca8a2345a159310c729897 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Mon, 15 Feb 2010 14:38:00 +0100
+Subject: [PATCH 28/45] OMAP: DSS2: (Re)add support for Samsung lte430wq-f0c panel
+
+---
+ drivers/video/omap2/displays/Kconfig               |    6 +
+ drivers/video/omap2/displays/Makefile              |    1 +
+ .../omap2/displays/panel-samsung-lte430wq-f0c.c    |  113 ++++++++++++++++++++
+ 3 files changed, 120 insertions(+), 0 deletions(-)
+ create mode 100644 drivers/video/omap2/displays/panel-samsung-lte430wq-f0c.c
+
+diff --git a/drivers/video/omap2/displays/Kconfig b/drivers/video/omap2/displays/Kconfig
+index 4ce47dd..4229a28 100644
+--- a/drivers/video/omap2/displays/Kconfig
+++ b/drivers/video/omap2/displays/Kconfig
+@@ -7,6 +7,12 @@ config PANEL_GENERIC
+ 	  Generic panel driver.
+ 	  Used for DVI output for Beagle and OMAP3 SDP.
+ 
+config PANEL_SAMSUNG_LTE430WQ_F0C
+        tristate "Samsung LTE430WQ-F0C LCD Panel"
+        depends on OMAP2_DSS
+        help
+          LCD Panel used on Overo Palo43
+
+ config PANEL_SHARP_LS037V7DW01
+         tristate "Sharp LS037V7DW01 LCD Panel"
+         depends on OMAP2_DSS
+diff --git a/drivers/video/omap2/displays/Makefile b/drivers/video/omap2/displays/Makefile
+index 8f3d0ad..9317445 100644
+--- a/drivers/video/omap2/displays/Makefile
+++ b/drivers/video/omap2/displays/Makefile
+@@ -1,4 +1,5 @@
+ obj-$(CONFIG_PANEL_GENERIC) += panel-generic.o
+obj-$(CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C) += panel-samsung-lte430wq-f0c.o
+ obj-$(CONFIG_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o
+ obj-$(CONFIG_PANEL_SHARP_LQ043T1DG01) += panel-sharp-lq043t1dg01.o
+ 
+diff --git a/drivers/video/omap2/displays/panel-samsung-lte430wq-f0c.c b/drivers/video/omap2/displays/panel-samsung-lte430wq-f0c.c
+new file mode 100644
+index 0000000..3f0477e
+--- /dev/null
+++ b/drivers/video/omap2/displays/panel-samsung-lte430wq-f0c.c
+@@ -0,0 +1,113 @@
+/*
+ * LCD panel driver for Samsung LTE430WQ-F0C
+ *
+ * Author: Steve Sakoman <steve@sakoman.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/module.h>
+#include <linux/delay.h>
+
+#include <plat/display.h>
+
+static struct omap_video_timings samsung_lte_timings = {
+	.x_res = 480,
+	.y_res = 272,
+
+	.pixel_clock	= 9200,
+
+	.hsw		= 41,
+	.hfp		= 8,
+	.hbp		= 45-41,
+
+	.vsw		= 10,
+	.vfp		= 4,
+	.vbp		= 12-10,
+};
+
+static int samsung_lte_panel_probe(struct omap_dss_device *dssdev)
+{
+	dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
+		OMAP_DSS_LCD_IHS;
+	dssdev->panel.timings = samsung_lte_timings;
+
+	return 0;
+}
+
+static void samsung_lte_panel_remove(struct omap_dss_device *dssdev)
+{
+}
+
+static int samsung_lte_panel_enable(struct omap_dss_device *dssdev)
+{
+	int r = 0;
+
+	/* wait couple of vsyncs until enabling the LCD */
+	msleep(50);
+
+	if (dssdev->platform_enable)
+		r = dssdev->platform_enable(dssdev);
+
+	return r;
+}
+
+static void samsung_lte_panel_disable(struct omap_dss_device *dssdev)
+{
+	if (dssdev->platform_disable)
+		dssdev->platform_disable(dssdev);
+
+	/* wait at least 5 vsyncs after disabling the LCD */
+
+	msleep(100);
+}
+
+static int samsung_lte_panel_suspend(struct omap_dss_device *dssdev)
+{
+	samsung_lte_panel_disable(dssdev);
+	return 0;
+}
+
+static int samsung_lte_panel_resume(struct omap_dss_device *dssdev)
+{
+	return samsung_lte_panel_enable(dssdev);
+}
+
+static struct omap_dss_driver samsung_lte_driver = {
+	.probe		= samsung_lte_panel_probe,
+	.remove		= samsung_lte_panel_remove,
+
+	.enable		= samsung_lte_panel_enable,
+	.disable	= samsung_lte_panel_disable,
+	.suspend	= samsung_lte_panel_suspend,
+	.resume		= samsung_lte_panel_resume,
+
+	.driver         = {
+		.name   = "samsung_lte_panel",
+		.owner  = THIS_MODULE,
+	},
+};
+
+static int __init samsung_lte_panel_drv_init(void)
+{
+	return omap_dss_register_driver(&samsung_lte_driver);
+}
+
+static void __exit samsung_lte_panel_drv_exit(void)
+{
+	omap_dss_unregister_driver(&samsung_lte_driver);
+}
+
+module_init(samsung_lte_panel_drv_init);
+module_exit(samsung_lte_panel_drv_exit);
+MODULE_LICENSE("GPL");
+-- 
+1.6.6.1
+
@@ -0,0 +1,254 @@
+From e960b2c16c24198a669a7c49e6282333faa74a3e Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Thu, 17 Dec 2009 15:05:30 -0800
+Subject: [PATCH 29/45] OMAP: DSS2: Add support for LG Philips LB035Q02 panel
+
+---
+ drivers/video/omap2/displays/Kconfig               |    6 +
+ drivers/video/omap2/displays/Makefile              |    1 +
+ .../omap2/displays/panel-lgphilips-lb035q02.c      |  206 ++++++++++++++++++++
+ 3 files changed, 213 insertions(+), 0 deletions(-)
+ create mode 100644 drivers/video/omap2/displays/panel-lgphilips-lb035q02.c
+
+diff --git a/drivers/video/omap2/displays/Kconfig b/drivers/video/omap2/displays/Kconfig
+index 4229a28..875250a 100644
+--- a/drivers/video/omap2/displays/Kconfig
+++ b/drivers/video/omap2/displays/Kconfig
+@@ -7,6 +7,12 @@ config PANEL_GENERIC
+ 	  Generic panel driver.
+ 	  Used for DVI output for Beagle and OMAP3 SDP.
+ 
+config PANEL_LGPHILIPS_LB035Q02
+	tristate "LG.Philips LB035Q02 LCD Panel"
+	depends on OMAP2_DSS
+	help
+	  LCD Panel used on Overo Palo35
+
+ config PANEL_SAMSUNG_LTE430WQ_F0C
+         tristate "Samsung LTE430WQ-F0C LCD Panel"
+         depends on OMAP2_DSS
+diff --git a/drivers/video/omap2/displays/Makefile b/drivers/video/omap2/displays/Makefile
+index 9317445..f8e6c52 100644
+--- a/drivers/video/omap2/displays/Makefile
+++ b/drivers/video/omap2/displays/Makefile
+@@ -1,4 +1,5 @@
+ obj-$(CONFIG_PANEL_GENERIC) += panel-generic.o
+obj-$(CONFIG_PANEL_LGPHILIPS_LB035Q02) += panel-lgphilips-lb035q02.o
+ obj-$(CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C) += panel-samsung-lte430wq-f0c.o
+ obj-$(CONFIG_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o
+ obj-$(CONFIG_PANEL_SHARP_LQ043T1DG01) += panel-sharp-lq043t1dg01.o
+diff --git a/drivers/video/omap2/displays/panel-lgphilips-lb035q02.c b/drivers/video/omap2/displays/panel-lgphilips-lb035q02.c
+new file mode 100644
+index 0000000..22dc865
+--- /dev/null
+++ b/drivers/video/omap2/displays/panel-lgphilips-lb035q02.c
+@@ -0,0 +1,206 @@
+/*
+ * LCD panel driver for LG.Philips LB035Q02
+ *
+ * Author: Steve Sakoman <steve@sakoman.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/spi/spi.h>
+
+#include <plat/display.h>
+
+static struct spi_device	*spidev;
+
+static struct omap_video_timings lb035q02_timings = {
+	.x_res = 320,
+	.y_res = 240,
+
+	.pixel_clock	= 6500,
+
+	.hsw		= 2,
+	.hfp		= 20,
+	.hbp		= 68,
+
+	.vsw		= 2,
+	.vfp		= 4,
+	.vbp		= 18,
+};
+
+static int lb035q02_panel_probe(struct omap_dss_device *dssdev)
+{
+	dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
+		OMAP_DSS_LCD_IHS;
+	dssdev->panel.timings = lb035q02_timings;
+
+	return 0;
+}
+
+static void lb035q02_panel_remove(struct omap_dss_device *dssdev)
+{
+}
+
+static int lb035q02_write_reg(u8 reg, u16 val)
+{
+	struct spi_message msg;
+	struct spi_transfer index_xfer = {
+		.len		= 3,
+		.cs_change	= 1,
+	};
+	struct spi_transfer value_xfer = {
+		.len		= 3,
+	};
+	u8	buffer[16];
+
+	spi_message_init(&msg);
+
+	/* register index */
+	buffer[0] = 0x70;
+	buffer[1] = 0x00;
+	buffer[2] = reg & 0x7f;
+	index_xfer.tx_buf = buffer;
+	spi_message_add_tail(&index_xfer, &msg);
+
+	/* register value */
+	buffer[4] = 0x72;
+	buffer[5] = val >> 8;
+	buffer[6] = val;
+	value_xfer.tx_buf = buffer + 4;
+	spi_message_add_tail(&value_xfer, &msg);
+
+	return spi_sync(spidev, &msg);
+}
+
+static int lb035q02_panel_enable(struct omap_dss_device *dssdev)
+{
+	int r = 0;
+
+	pr_info("lgphilips_lb035q02: panel_enable: 0x%08x\n", spidev);
+	/* wait couple of vsyncs until enabling the LCD */
+	msleep(50);
+
+	if (dssdev->platform_enable)
+		r = dssdev->platform_enable(dssdev);
+
+	/* Panel init sequence from page 28 of the spec */
+	lb035q02_write_reg(0x01, 0x6300);
+	lb035q02_write_reg(0x02, 0x0200);
+	lb035q02_write_reg(0x03, 0x0177);
+	lb035q02_write_reg(0x04, 0x04c7);
+	lb035q02_write_reg(0x05, 0xffc0);
+	lb035q02_write_reg(0x06, 0xe806);
+	lb035q02_write_reg(0x0a, 0x4008);
+	lb035q02_write_reg(0x0b, 0x0000);
+	lb035q02_write_reg(0x0d, 0x0030);
+	lb035q02_write_reg(0x0e, 0x2800);
+	lb035q02_write_reg(0x0f, 0x0000);
+	lb035q02_write_reg(0x16, 0x9f80);
+	lb035q02_write_reg(0x17, 0x0a0f);
+	lb035q02_write_reg(0x1e, 0x00c1);
+	lb035q02_write_reg(0x30, 0x0300);
+	lb035q02_write_reg(0x31, 0x0007);
+	lb035q02_write_reg(0x32, 0x0000);
+	lb035q02_write_reg(0x33, 0x0000);
+	lb035q02_write_reg(0x34, 0x0707);
+	lb035q02_write_reg(0x35, 0x0004);
+	lb035q02_write_reg(0x36, 0x0302);
+	lb035q02_write_reg(0x37, 0x0202);
+	lb035q02_write_reg(0x3a, 0x0a0d);
+	lb035q02_write_reg(0x3b, 0x0806);
+
+	return r;
+}
+
+static void lb035q02_panel_disable(struct omap_dss_device *dssdev)
+{
+	if (dssdev->platform_disable)
+		dssdev->platform_disable(dssdev);
+
+	/* wait at least 5 vsyncs after disabling the LCD */
+
+	msleep(100);
+}
+
+static int lb035q02_panel_suspend(struct omap_dss_device *dssdev)
+{
+	pr_info("lgphilips_lb035q02: panel_suspend\n");
+	lb035q02_panel_disable(dssdev);
+	return 0;
+}
+
+static int lb035q02_panel_resume(struct omap_dss_device *dssdev)
+{
+	pr_info("lgphilips_lb035q02: panel_resume\n");
+	return lb035q02_panel_enable(dssdev);
+}
+
+static struct omap_dss_driver lb035q02_driver = {
+	.probe		= lb035q02_panel_probe,
+	.remove		= lb035q02_panel_remove,
+
+	.enable		= lb035q02_panel_enable,
+	.disable	= lb035q02_panel_disable,
+	.suspend	= lb035q02_panel_suspend,
+	.resume		= lb035q02_panel_resume,
+
+	.driver         = {
+		.name   = "lgphilips_lb035q02_panel",
+		.owner  = THIS_MODULE,
+	},
+};
+
+static int __devinit lb035q02_panel_spi_probe(struct spi_device *spi)
+{
+	spidev = spi;
+	return 0;
+}
+
+static int __devexit lb035q02_panel_spi_remove(struct spi_device *spi)
+{
+	return 0;
+}
+
+static struct spi_driver lb035q02_spi_driver = {
+	.driver		= {
+		.name	= "lgphilips_lb035q02_panel-spi",
+		.owner	= THIS_MODULE,
+	},
+	.probe		= lb035q02_panel_spi_probe,
+	.remove		= __devexit_p (lb035q02_panel_spi_remove),
+};
+
+static int __init lb035q02_panel_drv_init(void)
+{
+	int ret;
+	ret = spi_register_driver(&lb035q02_spi_driver);
+	if (ret != 0)
+		pr_err("lgphilips_lb035q02: Unable to register SPI driver: %d\n", ret);
+
+	ret = omap_dss_register_driver(&lb035q02_driver);
+	if (ret != 0)
+		pr_err("lgphilips_lb035q02: Unable to register panel driver: %d\n", ret);
+
+	return ret;
+}
+
+static void __exit lb035q02_panel_drv_exit(void)
+{
+	spi_unregister_driver(&lb035q02_spi_driver);
+	omap_dss_unregister_driver(&lb035q02_driver);
+}
+
+module_init(lb035q02_panel_drv_init);
+module_exit(lb035q02_panel_drv_exit);
+MODULE_LICENSE("GPL");
+-- 
+1.6.6.1
+
@@ -0,0 +1,32 @@
+From ed355dc59a30638b914152d52752d5e0ca06ecbd Mon Sep 17 00:00:00 2001
+From: Kishore Kadiyala <kishore.kadiyala@ti.com>
+Date: Wed, 17 Feb 2010 19:34:47 +0530
+Subject: [PATCH 30/45] Fix for bus width which improves SD card's peformance.
+
+This patch fixes bus width which improves peformance for SD cards.
+OMAP-MMC controller's can support maximum bus width of '8'.
+when bus width is mentioned as "8" in controller data,the SD
+stack will check whether bus width is "4" and if not it will
+set bus width to "1" and there by degrading peformance.
+
+Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
+---
+ drivers/mmc/host/omap_hsmmc.c |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
+index fa94580..9646a75 100644
+--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
+@@ -1776,7 +1776,7 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev)
+ 		     MMC_CAP_WAIT_WHILE_BUSY;
+ 
+ 	if (mmc_slot(host).wires >= 8)
+-		mmc->caps |= MMC_CAP_8_BIT_DATA;
+		mmc->caps |= (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA);
+ 	else if (mmc_slot(host).wires >= 4)
+ 		mmc->caps |= MMC_CAP_4_BIT_DATA;
+ 
+-- 
+1.6.6.1
+
@@ -0,0 +1,109 @@
+From b366c2810c736d8d544cf261f3354eebaf5e5655 Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@nokia.com>
+Date: Thu, 4 Feb 2010 21:38:02 +0200
+Subject: [PATCH 31/45] ARM: VFP: add support to sync the VFP state of the current thread
+
+ARM: VFP: add support to sync the VFP state of the current thread
+
+So far vfp_sync_state worked only for threads other than the current
+one. This worked for tracing other threads, but not for PTRACE_TRACEME.
+Syncing for the current thread will also be needed by an upcoming patch
+adding support for VFP context save / restore around signal handlers.
+
+For SMP we need get_cpu now, since we have to protect the FPEXC
+register, other than this things remained the same for threads other
+than the current.
+
+Signed-off-by: Imre Deak <imre.deak@nokia.com>
+Signed-off-by: Bryan Wu <bryan.wu@canonical.com>
+---
+ arch/arm/vfp/vfpmodule.c |   46 +++++++++++++++++++++++++++++++---------------
+ 1 files changed, 31 insertions(+), 15 deletions(-)
+
+diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
+index aed05bc..f28f45b 100644
+--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
+@@ -423,12 +423,19 @@ static inline void vfp_pm_init(void) { }
+ #endif /* CONFIG_PM */
+ 
+ /*
+- * Synchronise the hardware VFP state of a thread other than current with the
+- * saved one. This function is used by the ptrace mechanism.
+ * Synchronise the hardware VFP state of a thread with the saved one.
+ * This function is used by the ptrace mechanism and the signal handler path.
+  */
+-#ifdef CONFIG_SMP
+ void vfp_sync_state(struct thread_info *thread)
+ {
+	unsigned int cpu = get_cpu();
+	u32 fpexc = fmrx(FPEXC);
+	int vfp_enabled;
+	int self;
+
+	vfp_enabled = fpexc & FPEXC_EN;
+	self = thread == current_thread_info();
+#ifdef CONFIG_SMP
+ 	/*
+ 	 * On SMP systems, the VFP state is automatically saved at every
+ 	 * context switch. We mark the thread VFP state as belonging to a
+@@ -436,18 +443,22 @@ void vfp_sync_state(struct thread_info *thread)
+ 	 * needed.
+ 	 */
+ 	thread->vfpstate.hard.cpu = NR_CPUS;
+-}
+-#else
+-void vfp_sync_state(struct thread_info *thread)
+-{
+-	unsigned int cpu = get_cpu();
+-	u32 fpexc = fmrx(FPEXC);
+-
+ 	/*
+-	 * If VFP is enabled, the previous state was already saved and
+-	 * last_VFP_context updated.
+	 * Only the current thread's saved VFP context can be out-of-date.
+	 * For others there is nothing else to do, since we already ensured
+	 * force loading above.
+ 	 */
+-	if (fpexc & FPEXC_EN)
+	if (!self)
+		goto out;
+#endif
+	/*
+	 * If the VFP is enabled only the current thread's saved VFP
+	 * context can get out-of-date. For other threads the context
+	 * was updated when the current thread started to use the VFP.
+	 * This also means that the context will be reloaded next time
+	 * the thread uses the VFP, so no need to enforce it.
+	 */
+	if (vfp_enabled && !self)
+ 		goto out;
+ 
+ 	if (!last_VFP_context[cpu])
+@@ -456,8 +467,14 @@ void vfp_sync_state(struct thread_info *thread)
+ 	/*
+ 	 * Save the last VFP state on this CPU.
+ 	 */
+-	fmxr(FPEXC, fpexc | FPEXC_EN);
+	if (!vfp_enabled)
+		fmxr(FPEXC, fpexc | FPEXC_EN);
+ 	vfp_save_state(last_VFP_context[cpu], fpexc);
+	/*
+	 * Disable VFP in case it was enabled so that the force reload
+	 * can happen.
+	 */
+	fpexc &= ~FPEXC_EN;
+ 	fmxr(FPEXC, fpexc);
+ 
+ 	/*
+@@ -469,7 +486,6 @@ void vfp_sync_state(struct thread_info *thread)
+ out:
+ 	put_cpu();
+ }
+-#endif
+ 
+ #include <linux/smp.h>
+ 
+-- 
+1.6.6.1
+
@@ -0,0 +1,211 @@
+From 1be18045f852e78bf78d2042a5210c53d830f81b Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@nokia.com>
+Date: Thu, 4 Feb 2010 21:38:30 +0200
+Subject: [PATCH 32/45] ARM: VFP: preserve the HW context when calling signal handlers
+
+ARM: VFP: preserve the HW context when calling signal handlers
+
+Signal handlers can use floating point, so prevent them to corrupt
+the main thread's VFP context. So far there were two signal stack
+frame formats defined based on the VFP implementation, but the user
+struct used for ptrace covers all posibilities, so use it for the
+signal stack too. This patch extends the user struct and leaves
+its magic number the same, in the hope that user space code does
+not depend on its size and can parse the original regs w/o
+problems.
+
+Support to save / restore the exception registers was added by
+Will Deacon.
+
+Signed-off-by: Imre Deak <imre.deak@nokia.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Bryan Wu <bryan.wu@canonical.com>
+---
+ arch/arm/include/asm/ucontext.h |   19 +++-----
+ arch/arm/include/asm/user.h     |    3 +
+ arch/arm/kernel/signal.c        |   91 +++++++++++++++++++++++++++++++++++++--
+ 3 files changed, 97 insertions(+), 16 deletions(-)
+
+diff --git a/arch/arm/include/asm/ucontext.h b/arch/arm/include/asm/ucontext.h
+index bf65e9f..1c3236b 100644
+--- a/arch/arm/include/asm/ucontext.h
+++ b/arch/arm/include/asm/ucontext.h
+@@ -59,23 +59,18 @@ struct iwmmxt_sigframe {
+ #endif /* CONFIG_IWMMXT */
+ 
+ #ifdef CONFIG_VFP
+-#if __LINUX_ARM_ARCH__ < 6
+-/* For ARM pre-v6, we use fstmiax and fldmiax.  This adds one extra
+- * word after the registers, and a word of padding at the end for
+- * alignment.  */
+ #define VFP_MAGIC		0x56465001
+-#define VFP_STORAGE_SIZE	152
+-#else
+-#define VFP_MAGIC		0x56465002
+-#define VFP_STORAGE_SIZE	144
+-#endif
+ 
+ struct vfp_sigframe
+ {
+ 	unsigned long		magic;
+ 	unsigned long		size;
+-	union vfp_state		storage;
+-};
+	struct user_vfp		ufp;
+} __attribute__((__aligned__(8)));
+
+/* 8 byte for magic and size, 272 byte for ufp */
+#define VFP_STORAGE_SIZE	sizeof(struct vfp_sigframe)
+
+ #endif /* CONFIG_VFP */
+ 
+ /*
+@@ -91,7 +86,7 @@ struct aux_sigframe {
+ #ifdef CONFIG_IWMMXT
+ 	struct iwmmxt_sigframe	iwmmxt;
+ #endif
+-#if 0 && defined CONFIG_VFP /* Not yet saved.  */
+#ifdef CONFIG_VFP
+ 	struct vfp_sigframe	vfp;
+ #endif
+ 	/* Something that isn't a valid magic number for any coprocessor.  */
+diff --git a/arch/arm/include/asm/user.h b/arch/arm/include/asm/user.h
+index df95e05..ea7e44d 100644
+--- a/arch/arm/include/asm/user.h
+++ b/arch/arm/include/asm/user.h
+@@ -88,6 +88,9 @@ struct user{
+ struct user_vfp {
+ 	unsigned long long fpregs[32];
+ 	unsigned long fpscr;
+	unsigned long fpexc;
+	unsigned long fpinst;
+	unsigned long fpinst2;
+ };
+ 
+ #endif /* _ARM_USER_H */
+diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
+index e7714f3..6a36851 100644
+--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
+@@ -18,6 +18,7 @@
+ #include <asm/cacheflush.h>
+ #include <asm/ucontext.h>
+ #include <asm/unistd.h>
+#include <asm/vfp.h>
+ 
+ #include "ptrace.h"
+ #include "signal.h"
+@@ -175,6 +176,88 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame)
+ 
+ #endif
+ 
+#ifdef CONFIG_VFP
+
+static int preserve_vfp_context(struct vfp_sigframe __user *frame)
+{
+	struct thread_info *thread = current_thread_info();
+	struct vfp_hard_struct *h = &thread->vfpstate.hard;
+	const unsigned long magic = VFP_MAGIC;
+	const unsigned long size = VFP_STORAGE_SIZE;
+	int err = 0;
+
+	vfp_sync_state(thread);
+	__put_user_error(magic, &frame->magic, err);
+	__put_user_error(size, &frame->size, err);
+
+	/*
+	 * Copy the floating point registers. There can be unused
+	 * registers see asm/hwcap.h for details.
+	 */
+	err |= __copy_to_user(&frame->ufp.fpregs, &h->fpregs,
+			      sizeof(h->fpregs));
+	/*
+	 * Copy the status and control register.
+	 */
+	__put_user_error(h->fpscr, &frame->ufp.fpscr, err);
+
+	/*
+	 * Copy the exception registers.
+	 */
+	__put_user_error(h->fpexc, &frame->ufp.fpexc, err);
+	__put_user_error(h->fpinst, &frame->ufp.fpinst, err);
+	__put_user_error(h->fpinst2, &frame->ufp.fpinst2, err);
+
+	return err ? -EFAULT : 0;
+}
+
+static int restore_vfp_context(struct vfp_sigframe __user *frame)
+{
+	struct thread_info *thread = current_thread_info();
+	struct vfp_hard_struct *h = &thread->vfpstate.hard;
+	unsigned long magic;
+	unsigned long size;
+	unsigned long fpexc;
+	int err = 0;
+
+	vfp_sync_state(thread);
+	__get_user_error(magic, &frame->magic, err);
+	__get_user_error(size, &frame->size, err);
+
+	if (err)
+		return -EFAULT;
+	if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
+		return -EINVAL;
+
+	/*
+	 * Copy the floating point registers. There can be unused
+	 * registers see asm/hwcap.h for details.
+	 */
+	err |= __copy_from_user(&h->fpregs, &frame->ufp.fpregs,
+				sizeof(h->fpregs));
+	/*
+	 * Copy the status and control register.
+	 */
+	__get_user_error(h->fpscr, &frame->ufp.fpscr, err);
+
+	/*
+	 * Sanitise and restore the exception registers.
+	 */
+	__get_user_error(fpexc, &frame->ufp.fpexc, err);
+	/* Ensure the VFP is enabled. */
+	fpexc |= FPEXC_EN;
+	/* Ensure FPINST2 is invalid and the exception flag is cleared. */
+	fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
+	h->fpexc = fpexc;
+
+	__get_user_error(h->fpinst, &frame->ufp.fpinst, err);
+	__get_user_error(h->fpinst2, &frame->ufp.fpinst2, err);
+
+	return err ? -EFAULT : 0;
+}
+
+#endif
+
+ /*
+  * Do a signal return; undo the signal stack.  These are aligned to 64-bit.
+  */
+@@ -233,8 +316,8 @@ static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf)
+ 		err |= restore_iwmmxt_context(&aux->iwmmxt);
+ #endif
+ #ifdef CONFIG_VFP
+-//	if (err == 0)
+-//		err |= vfp_restore_state(&sf->aux.vfp);
+	if (err == 0)
+		err |= restore_vfp_context(&aux->vfp);
+ #endif
+ 
+ 	return err;
+@@ -348,8 +431,8 @@ setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, sigset_t *set)
+ 		err |= preserve_iwmmxt_context(&aux->iwmmxt);
+ #endif
+ #ifdef CONFIG_VFP
+-//	if (err == 0)
+-//		err |= vfp_save_state(&sf->aux.vfp);
+	if (err == 0)
+		err |= preserve_vfp_context(&aux->vfp);
+ #endif
+ 	__put_user_error(0, &aux->end_magic, err);
+ 
+-- 
+1.6.6.1
+
@@ -0,0 +1,27 @@
+From 754249937d4ea60207bd85d172240840caa8fa2c Mon Sep 17 00:00:00 2001
+From: Prabindh Sundareson <prabu@ti.com>
+Date: Wed, 3 Mar 2010 15:45:35 +0100
+Subject: [PATCH 33/45] Switch SGX clocks to 200MHz on DM37xx/OMAP36xx
+
+---
+ arch/arm/mach-omap2/clock34xx_data.c |    4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c
+index e3c752f..89e2f61 100644
+--- a/arch/arm/mach-omap2/clock34xx_data.c
+++ b/arch/arm/mach-omap2/clock34xx_data.c
+@@ -3325,8 +3325,8 @@ static struct omap_clk omap3xxx_clks[] = {
+ 	CLK(NULL,	"gfx_l3_ick",	&gfx_l3_ick,	CK_3430ES1),
+ 	CLK(NULL,	"gfx_cg1_ck",	&gfx_cg1_ck,	CK_3430ES1),
+ 	CLK(NULL,	"gfx_cg2_ck",	&gfx_cg2_ck,	CK_3430ES1),
+-	CLK(NULL,	"sgx_fck",	&sgx_fck,	CK_3430ES2 | CK_3517),
+-	CLK(NULL,	"sgx_ick",	&sgx_ick,	CK_3430ES2 | CK_3517),
+	CLK(NULL,	"sgx_fck",	&sgx_fck,	CK_3430ES2 | CK_3517 | CK_36XX),
+	CLK(NULL,	"sgx_ick",	&sgx_ick,	CK_3430ES2 | CK_3517 | CK_36XX),
+ 	CLK(NULL,	"d2d_26m_fck",	&d2d_26m_fck,	CK_3430ES1),
+ 	CLK(NULL,	"modem_fck",	&modem_fck,	CK_343X),
+ 	CLK(NULL,	"sad2d_ick",	&sad2d_ick,	CK_343X),
+-- 
+1.6.6.1
+
@@ -0,0 +1,27 @@
+From 48fe0d059d9bd5a8486309db26c7780fe3044626 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Mon, 8 Mar 2010 14:38:31 +0100
+Subject: [PATCH 34/45] modedb.c: add proper 720p60 mode
+
+---
+ drivers/video/modedb.c |    4 ++++
+ 1 files changed, 4 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c
+index b32fa2a..f017d57 100644
+--- a/drivers/video/modedb.c
+++ b/drivers/video/modedb.c
+@@ -44,6 +44,10 @@ static const struct fb_videomode modedb[] = {
+ 	NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
+ 	0, FB_VMODE_NONINTERLACED
+     }, {
+	/* 1280x720 @ 60 Hz, 45 kHz hsync, CEA 681-E Format 4 */
+	"hd720", 60, 1280, 720, 13468, 220, 110, 20, 5, 40, 5,
+	0, FB_VMODE_NONINTERLACED
+    }, {
+ 	/* 800x600 @ 56 Hz, 35.15 kHz hsync */
+ 	NULL, 56, 800, 600, 27777, 128, 24, 22, 1, 72, 2,
+ 	0, FB_VMODE_NONINTERLACED
+-- 
+1.6.6.1
+
@@ -0,0 +1,55 @@
+From eade32775fc8fc3c25c9bdace1828fe649a31e0a Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Thu, 4 Feb 2010 12:26:22 -0800
+Subject: [PATCH 35/45] RTC: add support for backup battery recharge
+
+---
+ drivers/rtc/rtc-twl.c |   25 +++++++++++++++++++++++++
+ 1 files changed, 25 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c
+index c6a83a2..2329b5b 100644
+--- a/drivers/rtc/rtc-twl.c
+++ b/drivers/rtc/rtc-twl.c
+@@ -30,6 +30,23 @@
+ 
+ #include <linux/i2c/twl.h>
+ 
+/*
+ * PM_RECEIVER block register offsets (use TWL4030_MODULE_PM_RECEIVER)
+ */
+#define REG_BB_CFG	0x12
+
+/* PM_RECEIVER  BB_CFG bitfields */
+#define BIT_PM_RECEIVER_BB_CFG_BBCHEN           0x10
+#define BIT_PM_RECEIVER_BB_CFG_BBSEL            0x0C
+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_2V5        0x00
+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V0        0x04
+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1        0x08
+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3v2        0x0c
+#define BIT_PM_RECEIVER_BB_CFG_BBISEL           0x03
+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA      0x00
+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_150UA     0x01
+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_500UA     0x02
+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_1MA       0x03
+ 
+ /*
+  * RTC block register offsets (use TWL_MODULE_RTC)
+@@ -508,6 +525,14 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev)
+ 	if (ret < 0)
+ 		goto out2;
+ 
+	/* enable backup battery charging */
+	/* use a conservative 25uA @ 3.1V */
+	ret = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+		BIT_PM_RECEIVER_BB_CFG_BBCHEN |
+		BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1 |
+		BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA,
+		REG_BB_CFG);
+
+ 	return ret;
+ 
+ out2:
+-- 
+1.6.6.1
+
@@ -0,0 +1,29 @@
+From f4902a8ee1bbc739a60dcd970705c5665e98691f Mon Sep 17 00:00:00 2001
+From: Mans Rullgard <mans@mansr.com>
+Date: Mon, 13 Oct 2008 20:32:16 +0100
+Subject: [PATCH 36/45] ARM: Add prompt for CONFIG_ALIGNMENT_TRAP
+
+This adds a prompt text for CONFIG_ALIGNMENT_TRAP, thus making it
+visible in make *config.
+
+Signed-off-by: Mans Rullgard <mans@mansr.com>
+---
+ arch/arm/Kconfig |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index 88f628b..f5ded3c 100644
+--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
+@@ -1224,7 +1224,7 @@ config LEDS_CPU
+ 	  will overrule the CPU usage LED.
+ 
+ config ALIGNMENT_TRAP
+-	bool
+	bool "Enable alignment trap"
+ 	depends on CPU_CP15_MMU
+ 	default y if !ARCH_EBSA110
+ 	help
+-- 
+1.6.6.1
+
@@ -0,0 +1,31 @@
+From 310ec494b3c860e657290648821dbc98da9fff90 Mon Sep 17 00:00:00 2001
+From: Mans Rullgard <mans@mansr.com>
+Date: Sat, 28 Mar 2009 13:21:55 +0000
+Subject: [PATCH 37/45] ARM: Print warning on alignment trap in kernel mode
+
+Signed-off-by: Mans Rullgard <mans@mansr.com>
+---
+ arch/arm/mm/alignment.c |    7 +++++++
+ 1 files changed, 7 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
+index b270d62..5e9014b 100644
+--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
+@@ -756,6 +756,13 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
+ 
+ 	ai_sys += 1;
+ 
+	printk("Alignment trap in kernel: %s (%d) PC=0x%08lx Instr=0x%0*lx "
+	       "Address=0x%08lx FSR 0x%03x\n", current->comm,
+	       task_pid_nr(current), instrptr,
+	       thumb_mode(regs) ? 4 : 8,
+	       thumb_mode(regs) ? tinstr : instr,
+	       addr, fsr);
+
+  fixup:
+ 
+ 	regs->ARM_pc += isize;
+-- 
+1.6.6.1
+
@@ -0,0 +1,202 @@
+From 9eeb533964f73b661d23f7b145b96aa5d247e950 Mon Sep 17 00:00:00 2001
+From: Mans Rullgard <mans@mansr.com>
+Date: Tue, 10 Nov 2009 00:39:21 +0000
+Subject: [PATCH 38/45] ARM: Expose some CPU control registers via sysfs
+
+This creates sysfs files under /sys/devices/system/cpu/cpuN
+exposing the values of the control register, auxiliary control
+register, and L2 cache auxiliary control register.  Writing to
+the files allows setting the value of bits which are safe to
+change at any time.
+
+Signed-off-by: Mans Rullgard <mans@mansr.com>
+---
+ arch/arm/Kconfig           |    5 ++
+ arch/arm/kernel/Makefile   |    1 +
+ arch/arm/kernel/sysfs_v7.c |  146 ++++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 152 insertions(+), 0 deletions(-)
+ create mode 100644 arch/arm/kernel/sysfs_v7.c
+
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index f5ded3c..2d370da 100644
+--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
+@@ -1252,6 +1252,11 @@ config UACCESS_WITH_MEMCPY
+ 	  However, if the CPU data cache is using a write-allocate mode,
+ 	  this option is unlikely to provide any performance gain.
+ 
+config CPU_V7_SYSFS
+	bool
+	depends on CPU_V7 && SYSFS
+	default y
+
+ endmenu
+ 
+ menu "Boot options"
+diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
+index dd00f74..ee20134 100644
+--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
+@@ -38,6 +38,7 @@ obj-$(CONFIG_ARM_THUMBEE)	+= thumbee.o
+ obj-$(CONFIG_KGDB)		+= kgdb.o
+ obj-$(CONFIG_ARM_UNWIND)	+= unwind.o
+ obj-$(CONFIG_HAVE_TCM)		+= tcm.o
+obj-$(CONFIG_CPU_V7_SYSFS)	+= sysfs_v7.o
+ 
+ obj-$(CONFIG_CRUNCH)		+= crunch.o crunch-bits.o
+ AFLAGS_crunch-bits.o		:= -Wa,-mcpu=ep9312
+diff --git a/arch/arm/kernel/sysfs_v7.c b/arch/arm/kernel/sysfs_v7.c
+new file mode 100644
+index 0000000..c05bf5f
+--- /dev/null
+++ b/arch/arm/kernel/sysfs_v7.c
+@@ -0,0 +1,146 @@
+/*
+ *  linux/arch/arm/kernel/sysfs.c
+ *
+ *  Copyright (C) 2008 Mans Rullgard
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/cpu.h>
+#include <linux/sysdev.h>
+#include <linux/fs.h>
+
+#define SETBITS(val, bits, new)			\
+	do {					\
+		val &= ~bits;			\
+		val |= new & bits;		\
+	} while (0)
+
+#define SHOW_REG(name, opc1, crn, crm, opc2)				\
+static ssize_t name##_show(struct sys_device *dev,			\
+			   struct sysdev_attribute *attr,		\
+			   char *buf)					\
+{									\
+	unsigned val;							\
+	asm ("mrc p15,"#opc1", %0,"#crn","#crm","#opc2 : "=r"(val));	\
+	return snprintf(buf, PAGE_SIZE, "%08x\n", val);			\
+}
+
+#define STORE_REG(name, opc1, crn, crm, opc2, bits)			\
+static ssize_t name##_store(struct sys_device *dev,			\
+			    struct sysdev_attribute *attr,		\
+			    const char *buf, size_t size)		\
+{									\
+	char *end;							\
+	unsigned new = simple_strtoul(buf, &end, 0);			\
+	unsigned val;							\
+									\
+	if (end == buf)							\
+		return -EINVAL;						\
+									\
+	asm ("mrc p15,"#opc1", %0,"#crn","#crm","#opc2 : "=r"(val));	\
+	SETBITS(val, bits, new);					\
+	asm ("mcr p15,"#opc1", %0,"#crn","#crm","#opc2 :: "r"(val));	\
+									\
+	return end - buf;						\
+}
+
+#define RD_REG(name, opc1, crn, crm, opc2)				\
+	SHOW_REG(name, opc1, crn, crm, opc2)				\
+	static SYSDEV_ATTR(name, S_IRUGO|S_IWUSR, name##_show, NULL)
+
+#define RDWR_REG(name, opc1, crn, crm, opc2, bits)			\
+	SHOW_REG(name, opc1, crn, crm, opc2)				\
+	STORE_REG(name, opc1, crn, crm, opc2, bits)			\
+	static SYSDEV_ATTR(name, S_IRUGO|S_IWUSR, name##_show, name##_store)
+
+RDWR_REG(control, 0, c1, c0, 0, 0x802);
+
+SHOW_REG(aux_ctl, 0, c1, c0, 1)
+
+#ifdef CONFIG_ARCH_OMAP34XX
+static ssize_t aux_ctl_store(struct sys_device *dev,
+			     struct sysdev_attribute *attr,
+			     const char *buf, size_t size)
+{
+	char *end;
+	unsigned new = simple_strtoul(buf, &end, 0);
+	unsigned val;
+
+	if (end == buf)
+		return -EINVAL;
+
+	asm ("mrc p15, 0, %0, c1, c0, 1" : "=r"(val));
+	SETBITS(val, 0xff8, new);
+	val &= ~2;
+	asm ("mov r0,  %0	\n\t"
+	     "mov r12, #3	\n\t"
+	     "smc #0		\n\t"
+	     :: "r"(val) : "r0", "r12");
+
+	return end - buf;
+}
+#define AUX_WR S_IWUSR
+#else
+#define aux_ctl_store NULL
+#define AUX_WR 0
+#endif
+
+static SYSDEV_ATTR(aux_control, S_IRUGO|AUX_WR, aux_ctl_show, aux_ctl_store);
+
+SHOW_REG(l2_aux_ctl, 1, c9, c0, 2)
+
+#ifdef CONFIG_ARCH_OMAP34XX
+static ssize_t l2_aux_ctl_store(struct sys_device *dev,
+				struct sysdev_attribute *attr,
+				const char *buf, size_t size)
+{
+	char *end;
+	unsigned new = simple_strtoul(buf, &end, 0);
+	unsigned val;
+
+	if (end == buf)
+		return -EINVAL;
+
+	asm ("mrc p15, 1, %0, c9, c0, 2" : "=r"(val));
+	SETBITS(val, 0xbc00000, new);
+	asm ("mov r0,  %0	\n\t"
+	     "mov r12, #2	\n\t"
+	     "smc #0		\n\t"
+	     :: "r"(val) : "r0", "r12");
+
+	return end - buf;
+}
+#define L2AUX_WR S_IWUSR
+#else
+#define l2_aux_ctl_store NULL
+#define L2AUX_WR 0
+#endif
+
+static SYSDEV_ATTR(l2_aux_control, S_IRUGO|L2AUX_WR,
+		   l2_aux_ctl_show, l2_aux_ctl_store);
+
+#define REG_ATTR(sysdev, name)						\
+	do {								\
+		int err = sysfs_create_file(&sysdev->kobj, &name.attr); \
+		WARN_ON(err != 0);					\
+	} while (0)
+
+static int __init cpu_sysfs_init(void)
+{
+	struct sys_device *sysdev;
+	int cpu;
+
+	for_each_possible_cpu(cpu) {
+		sysdev = get_cpu_sysdev(cpu);
+		REG_ATTR(sysdev, attr_control);
+		REG_ATTR(sysdev, attr_aux_control);
+		REG_ATTR(sysdev, attr_l2_aux_control);
+	}
+
+	return 0;
+}
+device_initcall(cpu_sysfs_init);
+-- 
+1.6.6.1
+
@@ -0,0 +1,48 @@
+From 2f716593e3f11859bf98c997183c47587c2dba76 Mon Sep 17 00:00:00 2001
+From: Mans Rullgard <mans@mansr.com>
+Date: Tue, 10 Nov 2009 00:41:54 +0000
+Subject: [PATCH 39/45] ARM: Add option to allow userspace PLE access
+
+This adds a Kconfig option to allow userspace to access the L2 preload
+engine (PLE) found in Cortex-A8.
+
+Signed-off-by: Mans Rullgard <mans@mansr.com>
+---
+ arch/arm/kernel/head.S |    4 ++++
+ arch/arm/mm/Kconfig    |    8 ++++++++
+ 2 files changed, 12 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
+index eb62bf9..659ec9e 100644
+--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
+@@ -172,6 +172,10 @@ __enable_mmu:
+ #ifdef CONFIG_CPU_ICACHE_DISABLE
+ 	bic	r0, r0, #CR_I
+ #endif
+#ifdef CONFIG_USER_L2_PLE
+	mov	r5, #3
+	mcr	p15, 0, r5, c11, c1, 0
+#endif
+ 	mov	r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
+ 		      domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
+ 		      domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
+diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
+index dd4698c..564ff7d 100644
+--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
+@@ -785,3 +785,11 @@ config ARM_L1_CACHE_SHIFT
+ 	int
+ 	default 6 if ARCH_OMAP3 || ARCH_S5PC1XX
+ 	default 5
+
+config USER_L2_PLE
+	bool "Enable userspace access to the L2 PLE"
+	depends on CPU_V7
+	default n
+	help
+	  Enable userspace access to the L2 preload engine (PLE) available
+	  in Cortex-A series ARM processors.
+-- 
+1.6.6.1
+
@@ -0,0 +1,49 @@
+From dd1e35157bfd32303aaf87b1ec3f85d8dd1c0014 Mon Sep 17 00:00:00 2001
+From: Mans Rullgard <mans@mansr.com>
+Date: Tue, 10 Nov 2009 00:52:56 +0000
+Subject: [PATCH 40/45] ARM: Add option to allow userspace access to performance counters
+
+This adds an option to allow userspace access to the performance monitor
+registers of the Cortex-A8.
+
+Signed-off-by: Mans Rullgard <mans@mansr.com>
+---
+ arch/arm/mm/Kconfig   |    7 +++++++
+ arch/arm/mm/proc-v7.S |    6 ++++++
+ 2 files changed, 13 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
+index 564ff7d..fda2e68 100644
+--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
+@@ -793,3 +793,10 @@ config USER_L2_PLE
+ 	help
+ 	  Enable userspace access to the L2 preload engine (PLE) available
+ 	  in Cortex-A series ARM processors.
+
+config USER_PMON
+	bool "Enable userspace access to performance counters"
+	depends on CPU_V7
+	default n
+	help
+	  Enable userpsace access to the performance monitor registers.
+diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
+index 3a28521..fec926a 100644
+--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
+@@ -270,6 +270,12 @@ __v7_setup:
+ 	mcr	p15, 0, r5, c10, c2, 0		@ write PRRR
+ 	mcr	p15, 0, r6, c10, c2, 1		@ write NMRR
+ #endif
+
+#ifdef CONFIG_USER_PMON
+	mov	r0, #1
+	mcr	p15, 0, r0, c9, c14, 0
+#endif
+
+ 	adr	r5, v7_crval
+ 	ldmia	r5, {r5, r6}
+ #ifdef CONFIG_CPU_ENDIAN_BE8
+-- 
+1.6.6.1
+
@@ -0,0 +1,41 @@
+From 13fdb12b3744ca0eaf00d5339919b17ce933c6d5 Mon Sep 17 00:00:00 2001
+From: Mans Rullgard <mans@mansr.com>
+Date: Sat, 28 Mar 2009 13:05:02 +0000
+Subject: [PATCH 41/45] ARM: Expose some PMON registers through sysfs
+
+---
+ arch/arm/kernel/sysfs_v7.c |   11 +++++++++++
+ 1 files changed, 11 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/kernel/sysfs_v7.c b/arch/arm/kernel/sysfs_v7.c
+index c05bf5f..5ed32fb 100644
+--- a/arch/arm/kernel/sysfs_v7.c
+++ b/arch/arm/kernel/sysfs_v7.c
+@@ -123,6 +123,12 @@ static ssize_t l2_aux_ctl_store(struct sys_device *dev,
+ static SYSDEV_ATTR(l2_aux_control, S_IRUGO|L2AUX_WR,
+ 		   l2_aux_ctl_show, l2_aux_ctl_store);
+ 
+RDWR_REG(pmon_pmnc,   0, c9, c12, 0, 0x3f)
+RDWR_REG(pmon_cntens, 0, c9, c12, 1, 0x8000000f)
+RDWR_REG(pmon_cntenc, 0, c9, c12, 2, 0x8000000f)
+RDWR_REG(pmon_ccnt,   0, c9, c13, 0, 0xffffffff)
+RDWR_REG(pmon_useren, 0, c9, c14, 0, 1)
+
+ #define REG_ATTR(sysdev, name)						\
+ 	do {								\
+ 		int err = sysfs_create_file(&sysdev->kobj, &name.attr); \
+@@ -139,6 +145,11 @@ static int __init cpu_sysfs_init(void)
+ 		REG_ATTR(sysdev, attr_control);
+ 		REG_ATTR(sysdev, attr_aux_control);
+ 		REG_ATTR(sysdev, attr_l2_aux_control);
+		REG_ATTR(sysdev, attr_pmon_pmnc);
+		REG_ATTR(sysdev, attr_pmon_cntens);
+		REG_ATTR(sysdev, attr_pmon_cntenc);
+		REG_ATTR(sysdev, attr_pmon_ccnt);
+		REG_ATTR(sysdev, attr_pmon_useren);
+ 	}
+ 
+ 	return 0;
+-- 
+1.6.6.1
+
@@ -0,0 +1,90 @@
+From 97283f52ea7fbb9b611a65d031c997e4ae44d465 Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Wed, 14 Apr 2010 16:08:37 +0530
+Subject: [PATCH 42/45] musb: allow host io without gadget module
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+---
+ drivers/usb/musb/musb_core.c   |   14 +++++++++-----
+ drivers/usb/musb/musb_gadget.c |   26 --------------------------
+ 2 files changed, 9 insertions(+), 31 deletions(-)
+
+diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
+index 71ec7e8..9988553 100644
+--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
+@@ -2101,10 +2101,12 @@ bad_config:
+ 	 * (We expect the ID pin to be forcibly grounded!!)
+ 	 * Otherwise, wait till the gadget driver hooks up.
+ 	 */
+-	if (!is_otg_enabled(musb) && is_host_enabled(musb)) {
+-		MUSB_HST_MODE(musb);
+-		musb->xceiv->default_a = 1;
+-		musb->xceiv->state = OTG_STATE_A_IDLE;
+	if (is_host_enabled(musb)) {
+		if (!is_otg_enabled(musb)) {
+			MUSB_HST_MODE(musb);
+			musb->xceiv->default_a = 1;
+			musb->xceiv->state = OTG_STATE_A_IDLE;
+		}
+ 
+ 		status = usb_add_hcd(musb_to_hcd(musb), -1, 0);
+ 
+@@ -2115,7 +2117,9 @@ bad_config:
+ 					& MUSB_DEVCTL_BDEVICE
+ 				? 'B' : 'A'));
+ 
+-	} else /* peripheral is enabled */ {
+	}
+	/* peripheral is enabled */
+	if (is_peripheral_enabled(musb)) {
+ 		MUSB_DEV_MODE(musb);
+ 		musb->xceiv->default_a = 0;
+ 		musb->xceiv->state = OTG_STATE_B_IDLE;
+diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
+index 454f6db..d0d1cee 100644
+--- a/drivers/usb/musb/musb_gadget.c
+++ b/drivers/usb/musb/musb_gadget.c
+@@ -1768,24 +1768,6 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
+ 		otg_set_peripheral(musb->xceiv, &musb->g);
+ 
+ 		spin_unlock_irqrestore(&musb->lock, flags);
+-
+-		if (is_otg_enabled(musb)) {
+-			DBG(3, "OTG startup...\n");
+-
+-			/* REVISIT:  funcall to other code, which also
+-			 * handles power budgeting ... this way also
+-			 * ensures HdrcStart is indirectly called.
+-			 */
+-			retval = usb_add_hcd(musb_to_hcd(musb), -1, 0);
+-			if (retval < 0) {
+-				DBG(1, "add_hcd failed, %d\n", retval);
+-				spin_lock_irqsave(&musb->lock, flags);
+-				otg_set_peripheral(musb->xceiv, NULL);
+-				musb->gadget_driver = NULL;
+-				musb->g.dev.driver = NULL;
+-				spin_unlock_irqrestore(&musb->lock, flags);
+-			}
+-		}
+ 	}
+ 
+ 	return retval;
+@@ -1881,14 +1863,6 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+ 		retval = -EINVAL;
+ 	spin_unlock_irqrestore(&musb->lock, flags);
+ 
+-	if (is_otg_enabled(musb) && retval == 0) {
+-		usb_remove_hcd(musb_to_hcd(musb));
+-		/* FIXME we need to be able to register another
+-		 * gadget driver here and have everything work;
+-		 * that currently misbehaves.
+-		 */
+-	}
+-
+ 	return retval;
+ }
+ EXPORT_SYMBOL(usb_gadget_unregister_driver);
+-- 
+1.6.6.1
+
@@ -0,0 +1,59 @@
+From 2379628bcd6c08e472020c78019ce8ea3fce3027 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Mon, 26 Apr 2010 11:17:26 -0700
+Subject: [PATCH 43/45] MTD: silence ecc errors on mtdblock0
+
+mtdblock0 is the x-load partition, which uses hw ecc
+this confuses linux, which uses sw ecc
+this patch silences ecc error messages when linux peeks into mtdblock0
+* not for upstream submission *
+---
+ block/blk-core.c            |    3 ++-
+ drivers/mtd/nand/nand_ecc.c |    2 +-
+ fs/buffer.c                 |    3 ++-
+ 3 files changed, 5 insertions(+), 3 deletions(-)
+
+diff --git a/block/blk-core.c b/block/blk-core.c
+index 718897e..c526fde 100644
+--- a/block/blk-core.c
+++ b/block/blk-core.c
+@@ -1970,7 +1970,8 @@ bool blk_update_request(struct request *req, int error, unsigned int nr_bytes)
+ 		req->errors = 0;
+ 
+ 	if (error && (blk_fs_request(req) && !(req->cmd_flags & REQ_QUIET))) {
+-		printk(KERN_ERR "end_request: I/O error, dev %s, sector %llu\n",
+		if (req->rq_disk && (strcmp(req->rq_disk->disk_name, "mtdblock0") != 0))
+			printk(KERN_ERR "end_request: I/O error, dev %s, sector %llu\n",
+ 				req->rq_disk ? req->rq_disk->disk_name : "?",
+ 				(unsigned long long)blk_rq_pos(req));
+ 	}
+diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c
+index 92320a6..2b86b6d 100644
+--- a/drivers/mtd/nand/nand_ecc.c
+++ b/drivers/mtd/nand/nand_ecc.c
+@@ -492,7 +492,7 @@ int __nand_correct_data(unsigned char *buf,
+ 	if ((bitsperbyte[b0] + bitsperbyte[b1] + bitsperbyte[b2]) == 1)
+ 		return 1;	/* error in ecc data; no action needed */
+ 
+-	printk(KERN_ERR "uncorrectable error : ");
+//	printk(KERN_ERR "uncorrectable error : ");
+ 	return -1;
+ }
+ EXPORT_SYMBOL(__nand_correct_data);
+diff --git a/fs/buffer.c b/fs/buffer.c
+index 6fa5302..27b3103 100644
+--- a/fs/buffer.c
+++ b/fs/buffer.c
+@@ -114,7 +114,8 @@ static int quiet_error(struct buffer_head *bh)
+ static void buffer_io_error(struct buffer_head *bh)
+ {
+ 	char b[BDEVNAME_SIZE];
+-	printk(KERN_ERR "Buffer I/O error on device %s, logical block %Lu\n",
+	if (strcmp(bdevname(bh->b_bdev, b), "mtdblock0") != 0)
+		printk(KERN_ERR "Buffer I/O error on device %s, logical block %Lu\n",
+ 			bdevname(bh->b_bdev, b),
+ 			(unsigned long long)bh->b_blocknr);
+ }
+-- 
+1.6.6.1
+
@@ -0,0 +1,34 @@
+From 71886bfebaf13c74a55f11264096286a554e5a3d Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Thu, 13 May 2010 21:43:08 +0200
+Subject: [PATCH 44/45] ARM: OMAP: beagle: every known beagle (except revB) uses 2 chipselects so don't use NULL for the second chipselect timings
+
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |    4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index dd830b1..078e026 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -614,7 +614,7 @@ static void __init omap3_beagle_init_irq(void)
+         if (cpu_is_omap3630())
+         {
+                 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+-                                        NULL,
+                                        mt46h32m32lf6_sdrc_params,
+                                         _omap37x_mpu_rate_table,
+                                         _omap37x_dsp_rate_table,
+                                         _omap37x_l3_rate_table);
+@@ -622,7 +622,7 @@ static void __init omap3_beagle_init_irq(void)
+         else
+         {
+                 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+-                                        NULL,
+                                        mt46h32m32lf6_sdrc_params,
+                                         _omap35x_mpu_rate_table,
+                                         _omap35x_dsp_rate_table,
+                                         _omap35x_l3_rate_table);
+-- 
+1.6.6.1
+
@@ -0,0 +1,70 @@
+From 1ebb6f864a831fc8efebe4a7a9f65d07fa31466a Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Sat, 15 May 2010 21:47:32 +0200
+Subject: [PATCH 45/45] ARM: OMAP: beagle: add support for beagleFPGA expansionboard: http://members.cox.net/ebrombaugh1/embedded/beagle/beagle_fpga.html
+
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |   26 ++++++++++++++++++++++++++
+ 1 files changed, 26 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index 078e026..b313350 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -24,6 +24,7 @@
+ #include <linux/irq.h>
+ #include <linux/input.h>
+ #include <linux/gpio_keys.h>
+#include <linux/spi/spi.h>
+ 
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
+@@ -47,6 +48,7 @@
+ #include <plat/timer-gp.h>
+ #include <plat/clock.h>
+ #include <plat/omap-pm.h>
+#include <plat/mcspi.h>
+ 
+ #include "mux.h"
+ #include "mmc-twl4030.h"
+@@ -609,6 +611,24 @@ static struct platform_device keys_gpio = {
+ 	},
+ };
+ 
+static struct spi_board_info beaglefpga_mcspi_board_info[] = {
+	// spi 4.0
+	{
+		.modalias	= "spidev",
+		.max_speed_hz	= 48000000, //48 Mbps
+		.bus_num	= 4,
+		.chip_select	= 0,	
+		.mode = SPI_MODE_1,
+	},
+};
+
+static void __init beaglefpga_init_spi(void)
+{
+	/* hook the spi ports to the spidev driver */
+	spi_register_board_info(beaglefpga_mcspi_board_info,
+		ARRAY_SIZE(beaglefpga_mcspi_board_info));
+}
+
+ static void __init omap3_beagle_init_irq(void)
+ {
+         if (cpu_is_omap3630())
+@@ -769,6 +789,12 @@ static void __init omap3_beagle_init(void)
+ 		gpio_export(162, 1);
+ 	}
+ 
+	if(!strcmp(expansionboard_name, "beaglefpga"))
+	{  
+		printk(KERN_INFO "Beagle expansionboard: Using McSPI for SPI\n");
+		beaglefpga_init_spi();
+	}
+
+ 	usb_musb_init();
+ 	usb_ehci_init(&ehci_pdata);
+ 	omap3beagle_flash_init();
+-- 
+1.6.6.1
+
@@ -0,0 +1,57 @@
+From b0c673e40d40428a9bd05101d15d773cd4f4720c Mon Sep 17 00:00:00 2001
+From: Ranjith Lohithakshan <unknown@ti.com>
+Date: Sat, 22 May 2010 18:32:24 +0200
+Subject: [PATCH 46/48] attemp to fix serial console corruption during cpuidle
+
+---
+ arch/arm/mach-omap2/cpuidle34xx.c |    6 +++++-
+ 1 files changed, 5 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
+index f8aea56..35d1c3e 100644
+--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
+@@ -60,7 +60,7 @@ struct omap3_processor_cx {
+ 
+ struct omap3_processor_cx omap3_power_states[OMAP3_MAX_STATES];
+ struct omap3_processor_cx current_cx_state;
+-struct powerdomain *mpu_pd, *core_pd;
+struct powerdomain *mpu_pd, *per_pd, *core_pd;
+ 
+ /*
+  * The latencies/thresholds for various C states have
+@@ -131,6 +131,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
+ 	local_fiq_disable();
+ 
+ 	pwrdm_set_next_pwrst(mpu_pd, mpu_state);
+	pwrdm_set_next_pwrst(per_pd, mpu_state);
+ 	pwrdm_set_next_pwrst(core_pd, core_state);
+ 
+ 	if (omap_irq_pending() || need_resched())
+@@ -138,6 +139,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
+ 
+ 	if (cx->type == OMAP3_STATE_C1) {
+ 		pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle);
+		pwrdm_for_each_clkdm(per_pd, _cpuidle_deny_idle);
+ 		pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle);
+ 	}
+ 
+@@ -146,6 +148,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
+ 
+ 	if (cx->type == OMAP3_STATE_C1) {
+ 		pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle);
+		pwrdm_for_each_clkdm(per_pd, _cpuidle_allow_idle);
+ 		pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle);
+ 	}
+ 
+@@ -425,6 +428,7 @@ int __init omap3_idle_init(void)
+ 	struct cpuidle_device *dev;
+ 
+ 	mpu_pd = pwrdm_lookup("mpu_pwrdm");
+	per_pd = pwrdm_lookup("per_pwrdm");
+ 	core_pd = pwrdm_lookup("core_pwrdm");
+ 
+ 	omap_init_power_states();
+-- 
+1.6.6.1
+
@@ -0,0 +1,37 @@
+From 4d5f88fca430ca38a35e60683dc301e80046b05d Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Sun, 23 May 2010 14:47:32 +0200
+Subject: [PATCH 47/48] clock34xx: only try to idle IVA subsys when CONFIG_PM is set
+
+---
+ arch/arm/mach-omap2/clock34xx.c |    5 ++++-
+ 1 files changed, 4 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
+index 2bb7182..a323f9f 100644
+--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
+@@ -407,7 +407,9 @@ void omap3_clk_lock_dpll5(void)
+ 	return;
+ }
+ 
+#ifdef CONFIG_PM
+ extern void __init omap3_iva_idle(void);
+#endif
+ 
+ /*
+  * Initialize IVA to a idle state. This is typically done by the
+@@ -425,8 +427,9 @@ static void __init omap2_clk_iva_init_to_idle(void)
+ 	prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3);
+ 	prm_write_mod_reg(0, OMAP3430_PER_MOD, OMAP3430_PM_IVAGRPSEL);
+ 
+#ifdef CONFIG_PM	
+ 	omap3_iva_idle();
+-
+#endif
+ }
+ 
+ /* REVISIT: Move this init stuff out into clock.c */
+-- 
+1.6.6.1
+
@@ -0,0 +1,60 @@
+From 258a962bea2da43df6f70fd264a0e23b65669176 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Tue, 4 May 2010 17:04:27 +0200
+Subject: [PATCH 48/48] HACK: try to poweron stuff on xM rev A
+
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |   14 +++++++-------
+ 1 files changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index b313350..7f0e241 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -237,7 +237,6 @@ static struct omap_dss_device beagle_dvi_device = {
+ 	.name = "dvi",
+ 	.driver_name = "generic_panel",
+ 	.phy.dpi.data_lines = 24,
+-	.reset_gpio = 170,
+ 	.platform_enable = beagle_enable_dvi,
+ 	.platform_disable = beagle_disable_dvi,
+ };
+@@ -364,6 +363,9 @@ static int beagle_twl_gpio_setup(struct device *dev,
+ 	 */
+ 
+ 	if (cpu_is_omap3630()) {
+		/* DVI reset GPIO is different between revisions */	
+		beagle_dvi_device.reset_gpio = 129;
+
+ 		/* Power on DVI, Serial and PWR led */ 
+  		gpio_request(gpio + 1, "nDVI_PWR_EN");
+ 		gpio_direction_output(gpio + 1, 0);	
+@@ -374,9 +376,12 @@ static int beagle_twl_gpio_setup(struct device *dev,
+ 
+ 		/* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */
+ 		gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR");
+-		gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1);
+		gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0);
+ 	}
+ 	else {
+		/* DVI reset GPIO is different between revisions */ 
+		beagle_dvi_device.reset_gpio = 170;
+				
+ 		gpio_request(gpio + 1, "EHCI_nOC");
+ 		gpio_direction_input(gpio + 1);
+ 
+@@ -735,11 +740,6 @@ static void __init omap3_beagle_init(void)
+ 			ARRAY_SIZE(omap3_beagle_devices));
+ 	omap_serial_init();
+ 
+-	omap_mux_init_gpio(170, OMAP_PIN_INPUT);
+-	gpio_request(170, "DVI_nPD");
+-	/* REVISIT leave DVI powered down until it's needed ... */
+-	gpio_direction_output(170, true);
+-
+ 	if(!strcmp(expansionboard_name, "zippy")) 
+ 	{
+ 		printk(KERN_INFO "Beagle expansionboard: initializing enc28j60\n");
+-- 
+1.6.6.1
+
@@ -0,0 +1,135 @@
+From 325afc09116e11e28265b648ef33d8c0306c61f1 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Thu, 23 Sep 2010 18:22:47 -0700
+Subject: [PATCH 01/10] omap: Beagle: revision detection
+
+Due to the omap3530 ES3.0 Silicon being used on both the
+B5/B6 and C1/2/3 Beagle we can't use the cpu_is_omap34xx()
+routines to differentiate the Beagle Boards.
+
+However gpio pins 171,172,173 where setup for this prupose, so
+lets use them.
+
+Changes:
+for older U-Boot's, use omap_mux_init_gpio()
+keep Beagle Rev in board-omap3beagle.c
+gpio_free on gpio request failure
+
+Tested on Beagle Revisions: B5, C2, C4, and xMA
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+Acked-by: Jarkko Nikula <jhnikula@gmail.com>
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |   88 +++++++++++++++++++++++++++++++
+ 1 files changed, 88 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index 2677b41..7ca2b3b 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -175,6 +175,93 @@ static void __init omap3beagle_ks8851_init(void)
+ static inline void __init omap3beagle_ks8851_init(void) { return; }
+ #endif
+ 
+/*
+ * OMAP3 Beagle revision
+ * Run time detection of Beagle revision is done by reading GPIO.
+ * GPIO ID -
+ *	AXBX	= GPIO173, GPIO172, GPIO171: 1 1 1
+ *	C1_3	= GPIO173, GPIO172, GPIO171: 1 1 0
+ *	C4	= GPIO173, GPIO172, GPIO171: 1 0 1
+ *	XM	= GPIO173, GPIO172, GPIO171: 0 0 0
+ */
+enum {
+	OMAP3BEAGLE_BOARD_UNKN = 0,
+	OMAP3BEAGLE_BOARD_AXBX,
+	OMAP3BEAGLE_BOARD_C1_3,
+	OMAP3BEAGLE_BOARD_C4,
+	OMAP3BEAGLE_BOARD_XM,
+};
+
+static u8 omap3_beagle_version;
+
+static u8 omap3_beagle_get_rev(void)
+{
+	return omap3_beagle_version;
+}
+
+static void __init omap3_beagle_init_rev(void)
+{
+	int ret;
+	u16 beagle_rev = 0;
+
+	omap_mux_init_gpio(171, OMAP_PIN_INPUT_PULLUP);
+	omap_mux_init_gpio(172, OMAP_PIN_INPUT_PULLUP);
+	omap_mux_init_gpio(173, OMAP_PIN_INPUT_PULLUP);
+
+	ret = gpio_request(171, "rev_id_0");
+	if (ret < 0)
+		goto fail0;
+
+	ret = gpio_request(172, "rev_id_1");
+	if (ret < 0)
+		goto fail1;
+
+	ret = gpio_request(173, "rev_id_2");
+	if (ret < 0)
+		goto fail2;
+
+	gpio_direction_input(171);
+	gpio_direction_input(172);
+	gpio_direction_input(173);
+
+	beagle_rev = gpio_get_value(171) | (gpio_get_value(172) << 1)
+			| (gpio_get_value(173) << 2);
+
+	switch (beagle_rev) {
+	case 7:
+		printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n");
+		omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX;
+		break;
+	case 6:
+		printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n");
+		omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3;
+		break;
+	case 5:
+		printk(KERN_INFO "OMAP3 Beagle Rev: C4\n");
+		omap3_beagle_version = OMAP3BEAGLE_BOARD_C4;
+		break;
+	case 0:
+		printk(KERN_INFO "OMAP3 Beagle Rev: xM\n");
+		omap3_beagle_version = OMAP3BEAGLE_BOARD_XM;
+		break;
+	default:
+		printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev);
+		omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN;
+	}
+
+	return;
+
+fail2:
+	gpio_free(172);
+fail1:
+	gpio_free(171);
+fail0:
+	printk(KERN_ERR "Unable to get revision detection GPIO pins\n");
+	omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN;
+
+	return;
+}
+
+ static struct mtd_partition omap3beagle_nand_partitions[] = {
+ 	/* All the partition sizes are listed in terms of NAND block size */
+ 	{
+@@ -853,6 +940,7 @@ static int __init cameraboard_setup(char *str)
+ static void __init omap3_beagle_init(void)
+ {
+ 	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
+	omap3_beagle_init_rev();
+ 	omap3_beagle_i2c_init();
+ 
+ 	if (cpu_is_omap3630()) {
+-- 
+1.6.6.1
+
@@ -0,0 +1,35 @@
+From 34d88746a9aa4aedb67e32579e559cbeb91de20f Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Thu, 23 Sep 2010 18:22:48 -0700
+Subject: [PATCH 02/10] omap: Beagle: only Cx boards use pin 23 for write protect
+
+system_rev comes from u-boot and is a constant 0x20, so
+Bx boards also fall in this 'if' and will get setup with the
+wrong gpio_wp pin. Switch to using the Beagle revision routine
+to correcly set pin 23 only for C1/2/3 and C4 Boards. Bx boards
+will then use the correct default pin setting.
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+Acked-by: Jarkko Nikula <jhnikula@gmail.com>
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |    3 ++-
+ 1 files changed, 2 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index 7ca2b3b..beb877c 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -444,7 +444,8 @@ static struct gpio_led gpio_leds[];
+ static int beagle_twl_gpio_setup(struct device *dev,
+ 		unsigned gpio, unsigned ngpio)
+ {
+-	if (system_rev >= 0x20 && system_rev <= 0x34301000) {
+	if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) ||
+		(omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C4)) {
+ 		omap_mux_init_gpio(23, OMAP_PIN_INPUT);
+ 		mmc[0].gpio_wp = 23;
+ 	} else {
+-- 
+1.6.6.1
+
@@ -0,0 +1,33 @@
+From 037ef3add42d61dcd86438dc4b9378f154caa426 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Thu, 23 Sep 2010 18:22:48 -0700
+Subject: [PATCH 03/10] omap: Beagle: no gpio_wp pin connection on xM
+
+The omap3630 based BeagleBoard xM uses a MicroSD card slot with
+no write protection.
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+Acked-by: Jarkko Nikula <jhnikula@gmail.com>
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |    4 +++-
+ 1 files changed, 3 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index beb877c..247a426 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -444,7 +444,9 @@ static struct gpio_led gpio_leds[];
+ static int beagle_twl_gpio_setup(struct device *dev,
+ 		unsigned gpio, unsigned ngpio)
+ {
+-	if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) ||
+	if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) {
+		mmc[0].gpio_wp = -EINVAL;
+	} else if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) ||
+ 		(omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C4)) {
+ 		omap_mux_init_gpio(23, OMAP_PIN_INPUT);
+ 		mmc[0].gpio_wp = 23;
+-- 
+1.6.6.1
+
@@ -0,0 +1,42 @@
+From 62db06de896c221cfa2231a53a933d6b3e81d66d Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@beagleboard.org>
+Date: Tue, 11 Jan 2011 17:13:35 +0000
+Subject: [PATCH 04/10] omap3: beaglexm: fix EHCI power up GPIO dir
+
+EHCI enable power pin is inverted (active high) in comparison
+to vanilla beagle which is active low. Handle this case conditionally.
+
+Without this fix, Beagle XM 4 port EHCI will not function and no
+networking will be available
+
+[nm@ti.com: split up, added descriptive changelogs]
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Koen Kooi <koen@beagleboard.org>
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |    9 +++++++++
+ 1 files changed, 9 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index 247a426..7cfa2c8 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -487,6 +487,15 @@ static int beagle_twl_gpio_setup(struct device *dev,
+ 		gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0);
+ 	}
+ 
+	/*
+	 * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active
+	 * high / others active low)
+	 */
+	gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR");
+	if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM)
+		gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1);
+	else
+		gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0);
+ 
+ 	/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
+ 	gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
+-- 
+1.6.6.1
+
@@ -0,0 +1,48 @@
+From 3d93d0b8974c867db70cb4a8681615113ac6113d Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@beagleboard.org>
+Date: Tue, 11 Jan 2011 17:13:36 +0000
+Subject: [PATCH 05/10] omap3: beaglexm: fix DVI reset GPIO
+
+GPIO reset line for Beagle XM is different from vanilla beagle
+so we populate it as part of gpio update routine.
+
+This in part fixes the issue of display not functioning on beagle XM
+platform.
+
+[nm@ti.com: split up, added descriptive changelogs]
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Koen Kooi <koen@beagleboard.org>
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |    8 +++++++-
+ 1 files changed, 7 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index 7cfa2c8..939de5a 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -336,7 +336,7 @@ static struct omap_dss_device beagle_dvi_device = {
+ 	.name = "dvi",
+ 	.driver_name = "generic_panel",
+ 	.phy.dpi.data_lines = 24,
+-	.reset_gpio = 170,
+	.reset_gpio = -EINVAL,
+ 	.platform_enable = beagle_enable_dvi,
+ 	.platform_disable = beagle_disable_dvi,
+ };
+@@ -497,6 +497,12 @@ static int beagle_twl_gpio_setup(struct device *dev,
+ 	else
+ 		gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0);
+ 
+	/* DVI reset GPIO is different between beagle revisions */
+	if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM)
+		beagle_dvi_device.reset_gpio = 129;
+	else
+		beagle_dvi_device.reset_gpio = 170;
+
+ 	/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
+ 	gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
+ 
+-- 
+1.6.6.1
+
@@ -0,0 +1,92 @@
+From 7ad849e3d54d897614a74ad225392bd243e07d2e Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@beagleboard.org>
+Date: Wed, 12 Jan 2011 00:23:29 +0000
+Subject: [PATCH 06/10] omap3: beaglexm: fix power on of DVI
+
+TFP410 DVI chip is used to provide display out.
+This chip is controlled by 2 lines:
+LDO which supplies the power is controlled over gpio + 2
+and the enable of the chip itself is done over gpio + 1
+NOTE: the LDO is necessary for LED, serial blocks as well.
+
+gpio + 1 was used to sense USB overcurrent in vanilla beagle.
+
+Without this fix, the display would not function as the LDO
+remains shut down.
+
+[nm@ti.com: split up, added descriptive changelogs]
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Koen Kooi <koen@beagleboard.org>
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+---
+ arch/arm/mach-omap2/board-omap3beagle.c |   40 +++++++++++++++++++++++++++++++
+ 1 files changed, 40 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index 939de5a..9880c5c 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -444,6 +444,8 @@ static struct gpio_led gpio_leds[];
+ static int beagle_twl_gpio_setup(struct device *dev,
+ 		unsigned gpio, unsigned ngpio)
+ {
+	int r;
+
+ 	if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) {
+ 		mmc[0].gpio_wp = -EINVAL;
+ 	} else if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) ||
+@@ -465,6 +467,17 @@ static int beagle_twl_gpio_setup(struct device *dev,
+ 	 * power switch and overcurrent detect
+ 	 */
+ 
+	if (omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XM) {
+		r = gpio_request(gpio + 1, "EHCI_nOC");
+		if (!r) {
+			r = gpio_direction_input(gpio + 1);
+			if (r)
+				gpio_free(gpio + 1);
+		}
+		if (r)
+			pr_err("%s: unable to configure EHCI_nOC\n", __func__);
+	}
+
+ 	if (cpu_is_omap3630()) {
+ 		/* Power on DVI, Serial and PWR led */
+  		gpio_request(gpio + 1, "nDVI_PWR_EN");
+@@ -506,6 +519,33 @@ static int beagle_twl_gpio_setup(struct device *dev,
+ 	/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
+ 	gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
+ 
+	/*
+	 * gpio + 1 on Xm controls the TFP410's enable line (active low)
+	 * gpio + 2 control varies depending on the board rev as follows:
+	 * P7/P8 revisions(prototype): Camera EN
+	 * A2+ revisions (production): LDO (supplies DVI, serial, led blocks)
+	 */
+	if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) {
+		r = gpio_request(gpio + 1, "nDVI_PWR_EN");
+		if (!r) {
+			r = gpio_direction_output(gpio + 1, 0);
+			if (r)
+				gpio_free(gpio + 1);
+		}
+		if (r)
+			pr_err("%s: unable to configure nDVI_PWR_EN\n",
+				__func__);
+		r = gpio_request(gpio + 2, "DVI_LDO_EN");
+		if (!r) {
+			r = gpio_direction_output(gpio + 2, 1);
+			if (r)
+				gpio_free(gpio + 2);
+		}
+		if (r)
+			pr_err("%s: unable to configure DVI_LDO_EN\n",
+				__func__);
+	}
+
+ 	return 0;
+ }
+ 
+-- 
+1.6.6.1
+
--- a/Show More
+++ b/Show More