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move kernel recipes in to the proper dir
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
This commit is contained in:
+80
@@ -0,0 +1,80 @@
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From cba7c162c77d225afbf53148273019946a73b2c2 Mon Sep 17 00:00:00 2001
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From: Philip Balister <balister@nomad.(none)>
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Date: Wed, 17 Feb 2010 14:51:39 -0800
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Subject: [PATCH 1/3] Add defines to set config options in GPMC per CS control registers.
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---
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arch/arm/plat-omap/include/plat/gpmc.h | 36 ++++++++++++++++++++++++++++++++
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1 files changed, 36 insertions(+), 0 deletions(-)
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diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
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index 85ded59..1a6c748 100644
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--- a/arch/arm/plat-omap/include/plat/gpmc.h
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+++ b/arch/arm/plat-omap/include/plat/gpmc.h
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@@ -46,6 +46,11 @@
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#define GPMC_ECC_WRITE 1 /* Reset Hardware ECC for write */
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#define GPMC_ECC_READSYN 2 /* Reset before syndrom is read back */
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+#define GPMC_CONFIG 0x50
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+#define GPMC_STATUS 0x54
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+#define GPMC_CS0_BASE 0x60
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+#define GPMC_CS_SIZE 0x30
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+
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#define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31)
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#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30)
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#define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29)
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@@ -63,6 +68,7 @@
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#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1)
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#define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10)
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#define GPMC_CONFIG1_DEVICETYPE_NOR GPMC_CONFIG1_DEVICETYPE(0)
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+#define GPMC_CONFIG1_DEVICETYPE_NAND GPMC_CONFIG1_DEVICETYPE(2)
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#define GPMC_CONFIG1_MUXADDDATA (1 << 9)
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#define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4)
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#define GPMC_CONFIG1_FCLK_DIV(val) (val & 3)
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@@ -79,6 +85,35 @@
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#define GPMC_PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F)
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#define GPMC_PREFETCH_STATUS_COUNT(val) (val & 0x00003fff)
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+#define GPMC_CONFIG2_CSWROFFTIME(val) ((val & 31) << 16)
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+#define GPMC_CONFIG2_CSRDOFFTIME(val) ((val & 31) << 8)
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+#define GPMC_CONFIG2_CSEXTRADELAY (1 << 7)
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+#define GPMC_CONFIG2_CSONTIME(val) (val & 15)
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+
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+#define GPMC_CONFIG3_ADVWROFFTIME(val) ((val & 31) << 16)
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+#define GPMC_CONFIG3_ADVRDOFFTIME(val) ((val & 31) << 8)
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+#define GPMC_CONFIG3_ADVEXTRADELAY (1 << 7)
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+#define GPMC_CONFIG3_ADVONTIME(val) (val & 15)
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+
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+#define GPMC_CONFIG4_WEOFFTIME(val) ((val & 31) << 24)
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+#define GPMC_CONFIG4_WEEXTRADELAY (1 << 23)
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+#define GPMC_CONFIG4_WEONTIME(val) ((val & 15) << 16)
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+#define GPMC_CONFIG4_OEOFFTIME(val) ((val & 31) << 8)
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+#define GPMC_CONFIG4_OEEXTRADELAY (1 << 7)
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+#define GPMC_CONFIG4_OEONTIME(val) (val & 15)
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+
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+#define GPMC_CONFIG5_PAGEBURSTACCESSTIME(val) ((val & 15) << 24)
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+#define GPMC_CONFIG5_RDACCESSTIME(val) ((val & 31) << 16)
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+#define GPMC_CONFIG5_WRCYCLETIME(val) ((val & 31) << 8)
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+#define GPMC_CONFIG5_RDCYCLETIME(val) (val & 31)
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+
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+#define GPMC_CONFIG6_WRACCESSTIME(val) ((val & 31) << 24)
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+#define GPMC_CONFIG6_WRDATAONADMUXBUS(val) ((val & 15) << 16)
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+#define GPMC_CONFIG6_CYCLE2CYCLEDELAY(val) ((val & 15) << 8)
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+#define GPMC_CONFIG6_CYCLE2CYCLESAMECSEN (1 << 7)
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+#define GPMC_CONFIG6_CYCLE2CYCLEDIFFCSEN (1 << 6)
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+#define GPMC_CONFIG6_BUSTURNAROUND(val) (val & 15)
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+
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/*
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* Note that all values in this struct are in nanoseconds except sync_clk
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* (which is in picoseconds), while the register values are in gpmc_fck cycles.
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@@ -133,6 +168,7 @@ extern int gpmc_cs_reserved(int cs);
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extern int gpmc_prefetch_enable(int cs, int dma_mode,
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unsigned int u32_count, int is_write);
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extern int gpmc_prefetch_reset(int cs);
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+extern int gpmc_prefetch_status(void);
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extern void omap3_gpmc_save_context(void);
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extern void omap3_gpmc_restore_context(void);
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extern void gpmc_init(void);
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--
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1.6.6.1
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+83
@@ -0,0 +1,83 @@
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From fa589f1ad83e8795ba0509e7899dd1a6926c5fbd Mon Sep 17 00:00:00 2001
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From: Philip Balister <philip@opensdr.com>
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Date: Thu, 22 Apr 2010 19:41:58 -0700
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Subject: [PATCH 2/3] Add functions to dma.c to set address and length for src and dest.
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---
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arch/arm/plat-omap/dma.c | 30 ++++++++++++++++++++++++++++++
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arch/arm/plat-omap/include/plat/dma.h | 4 ++++
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2 files changed, 34 insertions(+), 0 deletions(-)
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diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
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index c4b2b47..f28f756 100644
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--- a/arch/arm/plat-omap/dma.c
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+++ b/arch/arm/plat-omap/dma.c
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@@ -471,6 +471,21 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
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}
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EXPORT_SYMBOL(omap_set_dma_src_burst_mode);
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+void omap_set_dma_src_addr_size(int lch, unsigned int addr, int elem_count)
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+{
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+
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+ if (cpu_class_is_omap1()) {
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+ p->dma_write(addr >> 16, CSSA, lch);
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+ //p->dma_write((u16)addr, CSSA_L, lch);
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+ }
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+
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+ if (cpu_class_is_omap2())
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+ p->dma_write(addr, CSSA, lch);
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+
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+ p->dma_write(elem_count, CEN, lch);
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+}
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+EXPORT_SYMBOL_GPL(omap_set_dma_src_addr_size);
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+
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/* Note that dest_port is only for OMAP1 */
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void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
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unsigned long dest_start,
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@@ -561,6 +576,21 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
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}
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EXPORT_SYMBOL(omap_set_dma_dest_burst_mode);
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+void omap_set_dma_dest_addr_size(int lch, unsigned int addr, int elem_count)
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+{
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+
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+ if (cpu_class_is_omap1()) {
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+ p->dma_write(addr >> 16, CDSA, lch);
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+ //p->dma_write((u16)addr, CDSA_L, lch);
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+ }
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+
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+ if (cpu_class_is_omap2())
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+ p->dma_write(addr, CDSA, lch);
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+
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+ p->dma_write(elem_count, CEN, lch);
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+}
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+EXPORT_SYMBOL_GPL(omap_set_dma_dest_addr_size);
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+
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static inline void omap_enable_channel_irq(int lch)
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{
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u32 status;
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diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
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index d1c916f..1e7243e 100644
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--- a/arch/arm/plat-omap/include/plat/dma.h
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+++ b/arch/arm/plat-omap/include/plat/dma.h
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@@ -462,6 +462,8 @@ extern void omap_set_dma_src_index(int lch, int eidx, int fidx);
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extern void omap_set_dma_src_data_pack(int lch, int enable);
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extern void omap_set_dma_src_burst_mode(int lch,
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enum omap_dma_burst_mode burst_mode);
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+extern void omap_set_dma_src_addr_size(int lch, unsigned int addr,
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+ int elem_count);
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extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
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unsigned long dest_start,
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@@ -470,6 +472,8 @@ extern void omap_set_dma_dest_index(int lch, int eidx, int fidx);
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extern void omap_set_dma_dest_data_pack(int lch, int enable);
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extern void omap_set_dma_dest_burst_mode(int lch,
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enum omap_dma_burst_mode burst_mode);
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+extern void omap_set_dma_dest_addr_size(int lch, unsigned int addr,
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+ int elem_count);
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extern void omap_set_dma_params(int lch,
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struct omap_dma_channel_params *params);
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--
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1.6.6.1
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+1889
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