From a6afbc2e89febdcd66a3fd9eda8bc3e5987f740d Mon Sep 17 00:00:00 2001
From: Jacob Stiffler <j-stiffler@ti.com>
Date: Wed, 20 May 2015 00:55:27 +0000
Subject: [PATCH] linux/cmem.inc: Support reserving memory for CMEM.

To reserve contiguous memory for CMEM:
* include the "recipes-kernel/linux/cmem.inc"
* Set CMEM_BASE and CMEM_SIZE to the physical memory address and size,
  respectively, to reserve for CMEM.

Currently limited to reserving a single memory region used to create
a single buffer pool of a single buffer.

Signed-off-by: Jacob Stiffler <j-stiffler@ti.com>
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
---
 recipes-kernel/linux/cmem.inc        | 23 +++++++++++++++++++++++
 recipes-kernel/linux/files/cmem.dtsi | 24 ++++++++++++++++++++++++
 2 files changed, 47 insertions(+)
 create mode 100644 recipes-kernel/linux/cmem.inc
 create mode 100644 recipes-kernel/linux/files/cmem.dtsi

diff --git a/recipes-kernel/linux/cmem.inc b/recipes-kernel/linux/cmem.inc
new file mode 100644
index 00000000..742f3c80
--- /dev/null
+++ b/recipes-kernel/linux/cmem.inc
@@ -0,0 +1,23 @@
+SRC_URI += "file://cmem.dtsi"
+
+CMEM_BASE ?= ""
+CMEM_SIZE ?= ""
+
+do_setup_cmem() {
+    if [ ! -z "${CMEM_BASE}" ]
+    then
+        cp ${WORKDIR}/cmem.dtsi ${S}/arch/arm/boot/dts/${MACHINE}-cmem.dtsi
+
+        sed -i -e "s|__CMEM_BASE__|${CMEM_BASE}|g" \
+               -e "s|__CMEM_SIZE__|${CMEM_SIZE}|g" \
+               ${S}/arch/arm/boot/dts/${MACHINE}-cmem.dtsi
+
+        for dtb in ${KERNEL_DEVICETREE}
+        do
+            dts=`echo $dtb | sed -e 's|dtb$|dts|'`
+            echo "#include \"${MACHINE}-cmem.dtsi\"" >> ${S}/arch/arm/boot/dts/$dts
+        done
+    fi
+}
+
+do_patch[postfuncs] += "do_setup_cmem"
diff --git a/recipes-kernel/linux/files/cmem.dtsi b/recipes-kernel/linux/files/cmem.dtsi
new file mode 100644
index 00000000..6b1da990
--- /dev/null
+++ b/recipes-kernel/linux/files/cmem.dtsi
@@ -0,0 +1,24 @@
+/ {
+        reserved-memory {
+                cmem_block_mem_0: cmem_block_mem@__CMEM_BASE__ {
+                        reg = <0x__CMEM_BASE__ 0x__CMEM_SIZE__>;
+                        no-map;
+                        status = "okay";
+                };
+        };
+
+        cmem {
+                compatible = "ti,cmem";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                status = "okay";
+
+                cmem_block_0: cmem_block@0 {
+                        reg = <0>;
+                        memory-region = <&cmem_block_mem_0>;
+                        cmem-buf-pools = <1 0x__CMEM_SIZE__>;
+                };
+        };
+
+};