diff --git a/recipes-kernel/linux/linux-3.0/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch b/recipes-kernel/linux/linux-3.0/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch
new file mode 100644
index 00000000..e6ce25bd
--- /dev/null
+++ b/recipes-kernel/linux/linux-3.0/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch
@@ -0,0 +1,67 @@
+From b230bde61ea3cf8e1a55b031d08d173417337a64 Mon Sep 17 00:00:00 2001
+From: Vikram Pandita <vikram.pandita@ti.com>
+Date: Tue, 31 May 2011 09:24:58 +0100
+Subject: [PATCH] ARM: L2: Add and export outer_clean_all
+
+The Errata 588369 and 539766 demands that clean all operation be done
+as clean each way at a time
+
+This patch also raps the implementation under the CONFIG errata
+macro so that for non-errata version silicon it can be disabled
+
+Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
+Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
+Cc: Woodruff, Richard <r-woodruff2@ti.com>
+---
+ arch/arm/include/asm/outercache.h |    8 ++++++++
+ arch/arm/mm/cache-l2x0.c          |    1 +
+ 2 files changed, 9 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h
+index d838743..fa8cbd8 100644
+--- a/arch/arm/include/asm/outercache.h
++++ b/arch/arm/include/asm/outercache.h
+@@ -28,6 +28,7 @@ struct outer_cache_fns {
+ 	void (*clean_range)(unsigned long, unsigned long);
+ 	void (*flush_range)(unsigned long, unsigned long);
+ 	void (*flush_all)(void);
++	void (*clean_all)(void);
+ 	void (*inv_all)(void);
+ 	void (*disable)(void);
+ #ifdef CONFIG_OUTER_CACHE_SYNC
+@@ -61,6 +62,11 @@ static inline void outer_flush_all(void)
+ 	if (outer_cache.flush_all)
+ 		outer_cache.flush_all();
+ }
++static inline void outer_clean_all(void)
++{
++	if (outer_cache.clean_all)
++		outer_cache.clean_all();
++}
+ 
+ static inline void outer_inv_all(void)
+ {
+@@ -97,6 +103,8 @@ static inline void outer_sync(void)
+ #else
+ static inline void outer_sync(void)
+ { }
++static inline void outer_clean_all(void)
++{ }
+ #endif
+ 
+ #endif	/* __ASM_OUTERCACHE_H */
+diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
+index 44c0867..10b79d6 100644
+--- a/arch/arm/mm/cache-l2x0.c
++++ b/arch/arm/mm/cache-l2x0.c
+@@ -346,6 +346,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
+ 	outer_cache.inv_all = l2x0_inv_all;
+ 	outer_cache.disable = l2x0_disable;
+ 	outer_cache.set_debug = l2x0_set_debug;
++	outer_cache.clean_all = l2x0_clean_all;
+ 
+ 	printk(KERN_INFO "%s cache controller enabled\n", type);
+ 	printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n",
+-- 
+1.6.6.1
+
diff --git a/recipes-kernel/linux/linux_3.0.bb b/recipes-kernel/linux/linux_3.0.bb
index 9244d5b2..ebca1267 100644
--- a/recipes-kernel/linux/linux_3.0.bb
+++ b/recipes-kernel/linux/linux_3.0.bb
@@ -9,7 +9,7 @@ COMPATIBLE_MACHINE = "(beagleboard)"
 SRCREV_pn-${PN} = "02f8c6aee8df3cdc935e9bdd4f2d020306035dbe"
 
 # The main PR is now using MACHINE_KERNEL_PR, for omap3 see conf/machine/include/omap3.inc
-MACHINE_KERNEL_PR_append = "g"
+MACHINE_KERNEL_PR_append = "h"
 
 FILESPATHPKG_prepend = "linux-3.0:"
 
@@ -199,6 +199,8 @@ SRC_URI += "git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git;pro
             file://madc/0002-mfd-twl-core-enable-madc-clock.patch \
             \
             file://sakoman/0001-mmc-don-t-display-single-block-read-console-messages.patch \
+            \
+            file://sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch \
             file://defconfig"
 
 SRC_URI_append_beagleboard = " file://logo_linux_clut224.ppm \