1
0
mirror of https://git.yoctoproject.org/meta-ti synced 2026-06-09 04:13:52 +00:00
Commit Graph

5 Commits

Author SHA1 Message Date
Andrew Davis 0dcd351432 conf: machine: am64xx-evm: Switch to SR2.0 HS-FS build by default
AM64x devices will only be available as SR2.0 HS-FS. Set this as the
default type provided by the SDK. To allow SR2.0 HS-SE to continue to
boot, like we did with GP, we add an extra machine to build SR2.0 HS-SE
SYSFW. To use on SR2.0 HS-SE boards simply switch out the SYSFW image:

$ cd /mnt/sd-card/boot
$ mv tiboot3-am64x_sr2-hs-evm.bin tiboot3.bin

Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2022-09-08 07:35:17 -05:00
Andrew Davis dbc88f2d65 conf: machine: am64xx-evm: Make HS-SE the default
The HS-SE AM64xx machine can now be run on GP devices and built without
needing the TI_SECURE_DEV_PKG for the same. AM64xx will only be available
in the HS-FS type going forward. Make the HS-SE the default and remove
the original GP machine.

Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2022-08-26 14:33:15 -05:00
Andrew Davis d4bfd5ec91 conf: machine: am64xx-hs-evm: Add extra machine to build GP SYSFW
Use multiconfig to generate a GP SYSFW image. This allows the HS SDK
to be used on GP boards by simply switching out the SYSFW image:

$ cd /mnt/sd-card/boot
$ mv tiboot3-am64x-gp-evm.bin tiboot3.bin

Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2022-08-06 19:07:44 -05:00
Yogesh Siraswar f438a091c3 j721e-sr1_1: Add j721e sr1.1 HS support
This patch adds support for J721e HS SR1.1
HS SR1.1 requires updated sysfw binary. Both SR1.0 and SR1.1 sysfw
binary will be generated. sysfw.itb will point to SR1.1

This patch requires J7 SR 1.1 support in K3 Image gen.

Signed-off-by: Yogesh Siraswar <yogeshs@ti.com>
Reviewed-by: Denys Dmytriyenko <denys@konsulko.com>
2021-11-19 00:07:45 +00:00
Denys Dmytriyenko f814840465 conf, recipes-bsp: support building for K3 R5F cores via multiconfig
K3 Multicore SoC architecture defines different functional domains, each
containing specific processing cores and peripherals. Early boot is normally
handled by running bootloader and loading SYSFW on MCU Cortex-R5F core:
https://git.ti.com/cgit/ti-u-boot/ti-u-boot/tree/board/ti/am65x/README
https://git.ti.com/cgit/ti-u-boot/ti-u-boot/tree/board/ti/j721e/README

This change adds support for building bootloader and SYSFW ITB image for
K3 Cortex-R5F cores via multiconfig.

Signed-off-by: Denys Dmytriyenko <denys@ti.com>
2020-05-05 05:22:25 +00:00