mirror of
https://git.yoctoproject.org/meta-ti
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Koen Kooi
61 lines
1.9 KiB
Diff
61 lines
1.9 KiB
Diff
From 8548db6d3cf115b29142f803d701122dc4cbb775 Mon Sep 17 00:00:00 2001
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From: Thara Gopinath <thara@ti.com>
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Date: Fri, 31 Dec 2010 13:35:02 +0530
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Subject: [PATCH 01/20] OMAP3: PM: Adding T2 enabling of smartreflex
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The smartreflex bit on twl4030 needs to be enabled by default irrespective
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of whether smartreflex module is enabled on the OMAP side or not.
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This is because without this bit enabled the voltage scaling through
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vp forceupdate does not function properly on OMAP3.
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Signed-off-by: Thara Gopinath <thara@ti.com>
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---
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arch/arm/mach-omap2/omap_twl.c | 16 ++++++++++++++++
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1 files changed, 16 insertions(+), 0 deletions(-)
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diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
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index 15f8c6c..a59f36b 100644
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--- a/arch/arm/mach-omap2/omap_twl.c
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+++ b/arch/arm/mach-omap2/omap_twl.c
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@@ -58,7 +58,9 @@
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static bool is_offset_valid;
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static u8 smps_offset;
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+#define TWL4030_DCDC_GLOBAL_CFG 0x06
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#define REG_SMPS_OFFSET 0xE0
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+#define SMARTREFLEX_ENABLE BIT(3)
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unsigned long twl4030_vsel_to_uv(const u8 vsel)
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{
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@@ -256,6 +258,7 @@ int __init omap4_twl_init(void)
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int __init omap3_twl_init(void)
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{
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struct voltagedomain *voltdm;
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+ u8 temp;
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if (!cpu_is_omap34xx())
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return -ENODEV;
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@@ -267,6 +270,19 @@ int __init omap3_twl_init(void)
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omap3_core_volt_info.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX;
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}
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+ /*
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+ * The smartreflex bit on twl4030 needs to be enabled by
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+ * default irrespective of whether smartreflex module is
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+ * enabled on the OMAP side or not. This is because without
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+ * this bit enabled the voltage scaling through
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+ * vp forceupdate does not function properly on OMAP3.
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+ */
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+ twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &temp,
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+ TWL4030_DCDC_GLOBAL_CFG);
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+ temp |= SMARTREFLEX_ENABLE;
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+ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, temp,
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+ TWL4030_DCDC_GLOBAL_CFG);
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+
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voltdm = omap_voltage_domain_lookup("mpu");
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omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info);
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--
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1.6.6.1
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