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4e18d70247
This patchset is managed in https://github.com/beagleboard/kernel/tree/beagleboard-3.2 by Robert Nelson and myself. Tested on beagleboard-xM/Angstrom Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> Signed-off-by: Denys Dmytriyenko <denys@ti.com>
192 lines
5.6 KiB
Diff
192 lines
5.6 KiB
Diff
From 87d979c9823e18b22acda61e1ad885d27b123c36 Mon Sep 17 00:00:00 2001
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From: Russell King <rmk+kernel@arm.linux.org.uk>
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Date: Wed, 21 Sep 2011 16:53:00 -0700
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Subject: [PATCH 02/11] cpufreq: OMAP: Add SMP support for OMAP4+
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On OMAP SMP configuartion, both processors share the voltage
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and clock. So both CPUs needs to be scaled together and hence
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needs software co-ordination.
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Also, update lpj with reference value to avoid progressive error.
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Adjust _both_ the per-cpu loops_per_jiffy and global lpj. Calibrate
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them with with reference to the initial values to avoid a
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progressively bigger and bigger error in the value over time.
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While at this, re-use the notifiers for UP/SMP since on UP machine or
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UP_ON_SMP policy->cpus mask would contain only the boot CPU.
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Based on initial SMP support by Santosh Shilimkar.
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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[khilman@ti.com: due to overlap/rework, combined original Santosh patch
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and Russell's rework]
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Signed-off-by: Kevin Hilman <khilman@ti.com>
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---
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drivers/cpufreq/omap-cpufreq.c | 81 +++++++++++++++++++++++++++++++++++-----
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1 files changed, 71 insertions(+), 10 deletions(-)
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diff --git a/drivers/cpufreq/omap-cpufreq.c b/drivers/cpufreq/omap-cpufreq.c
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index a6b2be7..1953f9d 100644
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--- a/drivers/cpufreq/omap-cpufreq.c
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+++ b/drivers/cpufreq/omap-cpufreq.c
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@@ -23,9 +23,11 @@
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/opp.h>
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+#include <linux/cpu.h>
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#include <asm/system.h>
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#include <asm/smp_plat.h>
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+#include <asm/cpu.h>
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#include <plat/clock.h>
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#include <plat/omap-pm.h>
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@@ -35,6 +37,16 @@
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#define VERY_HI_RATE 900000000
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+#ifdef CONFIG_SMP
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+struct lpj_info {
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+ unsigned long ref;
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+ unsigned int freq;
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+};
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+
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+static DEFINE_PER_CPU(struct lpj_info, lpj_ref);
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+static struct lpj_info global_lpj_ref;
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+#endif
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+
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static struct cpufreq_frequency_table *freq_table;
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static struct clk *mpu_clk;
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@@ -60,7 +72,7 @@ static unsigned int omap_getspeed(unsigned int cpu)
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{
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unsigned long rate;
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- if (cpu)
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+ if (cpu >= NR_CPUS)
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return 0;
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rate = clk_get_rate(mpu_clk) / 1000;
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@@ -71,7 +83,7 @@ static int omap_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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- int ret = 0;
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+ int i, ret = 0;
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struct cpufreq_freqs freqs;
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/* Ensure desired rate is within allowed range. Some govenors
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@@ -81,22 +93,57 @@ static int omap_target(struct cpufreq_policy *policy,
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if (target_freq > policy->max)
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target_freq = policy->max;
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- freqs.old = omap_getspeed(0);
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+ freqs.old = omap_getspeed(policy->cpu);
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freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000;
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- freqs.cpu = 0;
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+ freqs.cpu = policy->cpu;
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if (freqs.old == freqs.new)
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return ret;
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- cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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+ /* notifiers */
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+ for_each_cpu(i, policy->cpus) {
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+ freqs.cpu = i;
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+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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+ }
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#ifdef CONFIG_CPU_FREQ_DEBUG
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pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new);
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#endif
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ret = clk_set_rate(mpu_clk, freqs.new * 1000);
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+ freqs.new = omap_getspeed(policy->cpu);
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+
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+#ifdef CONFIG_SMP
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+ /*
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+ * Note that loops_per_jiffy is not updated on SMP systems in
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+ * cpufreq driver. So, update the per-CPU loops_per_jiffy value
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+ * on frequency transition. We need to update all dependent CPUs.
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+ */
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+ for_each_cpu(i, policy->cpus) {
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+ struct lpj_info *lpj = &per_cpu(lpj_ref, i);
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+ if (!lpj->freq) {
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+ lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy;
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+ lpj->freq = freqs.old;
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+ }
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+
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+ per_cpu(cpu_data, i).loops_per_jiffy =
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+ cpufreq_scale(lpj->ref, lpj->freq, freqs.new);
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+ }
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- cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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+ /* And don't forget to adjust the global one */
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+ if (!global_lpj_ref.freq) {
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+ global_lpj_ref.ref = loops_per_jiffy;
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+ global_lpj_ref.freq = freqs.old;
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+ }
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+ loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq,
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+ freqs.new);
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+#endif
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+
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+ /* notifiers */
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+ for_each_cpu(i, policy->cpus) {
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+ freqs.cpu = i;
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+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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+ }
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return ret;
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}
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@@ -105,6 +152,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
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{
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int result = 0;
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struct device *mpu_dev;
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+ static cpumask_var_t cpumask;
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if (cpu_is_omap24xx())
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mpu_clk = clk_get(NULL, "virt_prcm_set");
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@@ -116,12 +164,12 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
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if (IS_ERR(mpu_clk))
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return PTR_ERR(mpu_clk);
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- if (policy->cpu != 0)
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+ if (policy->cpu >= NR_CPUS)
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return -EINVAL;
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- policy->cur = policy->min = policy->max = omap_getspeed(0);
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-
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+ policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu);
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mpu_dev = omap2_get_mpuss_device();
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+
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if (!mpu_dev) {
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pr_warning("%s: unable to get the mpu device\n", __func__);
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return -EINVAL;
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@@ -141,7 +189,20 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
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policy->min = policy->cpuinfo.min_freq;
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policy->max = policy->cpuinfo.max_freq;
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- policy->cur = omap_getspeed(0);
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+ policy->cur = omap_getspeed(policy->cpu);
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+
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+ /*
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+ * On OMAP SMP configuartion, both processors share the voltage
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+ * and clock. So both CPUs needs to be scaled together and hence
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+ * needs software co-ordination. Use cpufreq affected_cpus
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+ * interface to handle this scenario. Additional is_smp() check
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+ * is to keep SMP_ON_UP build working.
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+ */
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+ if (is_smp()) {
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+ policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
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+ cpumask_or(cpumask, cpumask_of(policy->cpu), cpumask);
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+ cpumask_copy(policy->cpus, cpumask);
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+ }
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/* FIXME: what's the actual transition time? */
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policy->cpuinfo.transition_latency = 300 * 1000;
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--
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1.7.7.4
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