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Koen Kooi
ebbeb55561
Also add script used to generate patches and SRC_URI Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> Signed-off-by: Denys Dmytriyenko <denys@ti.com>
45 lines
1.7 KiB
Diff
45 lines
1.7 KiB
Diff
From 2ba0d2ea76b770e0b2a69db02bd3ddc60bbfdcee Mon Sep 17 00:00:00 2001
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From: Roland Stigge <stigge@antcom.de>
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Date: Mon, 27 Feb 2012 17:28:02 +0100
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Subject: [PATCH 08/95] ARM: LPC32xx: Fix interrupt controller init
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commit 35dd0a75d4a382e7f769dd0277732e7aa5235718 upstream.
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This patch fixes the initialization of the interrupt controller of the LPC32xx
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by correctly setting up SIC1 and SIC2 instead of (wrongly) using the same value
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as for the Main Interrupt Controller (MIC).
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Signed-off-by: Roland Stigge <stigge@antcom.de>
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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arch/arm/mach-lpc32xx/irq.c | 10 ++++++----
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1 file changed, 6 insertions(+), 4 deletions(-)
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diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
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index 965b1d6..198de47 100644
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--- a/arch/arm/mach-lpc32xx/irq.c
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+++ b/arch/arm/mach-lpc32xx/irq.c
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@@ -389,13 +389,15 @@ void __init lpc32xx_init_irq(void)
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/* Setup SIC1 */
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__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
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- __raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
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- __raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
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+ __raw_writel(SIC1_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
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+ __raw_writel(SIC1_ATR_DEFAULT,
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+ LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
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/* Setup SIC2 */
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__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
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- __raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
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- __raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
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+ __raw_writel(SIC2_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
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+ __raw_writel(SIC2_ATR_DEFAULT,
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+ LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
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/* Configure supported IRQ's */
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for (i = 0; i < NR_IRQS; i++) {
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--
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1.7.9.4
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