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1af87d9126
3.2.16 is the final release in the 3.2-stable series by Greg KH. Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> Signed-off-by: Denys Dmytriyenko <denys@ti.com>
63 lines
2.3 KiB
Diff
63 lines
2.3 KiB
Diff
From 2bb2e47c60f77b768affa48bf847526054143d81 Mon Sep 17 00:00:00 2001
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From: Chris Wilson <chris@chris-wilson.co.uk>
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Date: Thu, 22 Mar 2012 15:00:50 +0000
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Subject: [PATCH 28/60] drm/i915: Sanitize BIOS debugging bits from PIPECONF
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commit f47166d2b0001fcb752b40c5a2d4db986dfbea68 upstream.
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Quoting the BSpec from time immemorial:
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PIPEACONF, bits 28:27: Frame Start Delay (Debug)
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Used to delay the frame start signal that is sent to the display planes.
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Care must be taken to insure that there are enough lines during VBLANK
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to support this setting.
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An instance of the BIOS leaving these bits set was found in the wild,
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where it caused our modesetting to go all squiffy and skewiff.
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47271
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Reported-and-tested-by: Eva Wang <evawang@linpus.com>
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Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43012
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Reported-and-tested-by: Carl Richell <carl@system76.com>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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drivers/gpu/drm/i915/i915_reg.h | 1 +
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drivers/gpu/drm/i915/intel_display.c | 6 ++++++
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2 files changed, 7 insertions(+)
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diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
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index 1608d2a..2f99fd4 100644
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--- a/drivers/gpu/drm/i915/i915_reg.h
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+++ b/drivers/gpu/drm/i915/i915_reg.h
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@@ -2312,6 +2312,7 @@
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#define PIPECONF_DISABLE 0
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#define PIPECONF_DOUBLE_WIDE (1<<30)
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#define I965_PIPECONF_ACTIVE (1<<30)
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+#define PIPECONF_FRAME_START_DELAY_MASK (3<<27)
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#define PIPECONF_SINGLE_WIDE 0
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#define PIPECONF_PIPE_UNLOCKED 0
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#define PIPECONF_PIPE_LOCKED (1<<25)
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diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
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index 9ec9755..9011f48 100644
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--- a/drivers/gpu/drm/i915/intel_display.c
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+++ b/drivers/gpu/drm/i915/intel_display.c
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@@ -7278,6 +7278,12 @@ static void intel_sanitize_modesetting(struct drm_device *dev,
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 reg, val;
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+ /* Clear any frame start delays used for debugging left by the BIOS */
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+ for_each_pipe(pipe) {
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+ reg = PIPECONF(pipe);
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+ I915_WRITE(reg, I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK);
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+ }
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+
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if (HAS_PCH_SPLIT(dev))
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return;
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--
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1.7.9.5
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