mirror of
https://git.yoctoproject.org/meta-ti
synced 2026-07-16 22:38:04 +00:00
Koen Kooi
9bc77dff5f
Regenerate all beaglebone patches and add one vfs tracer patch for powertop Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> Signed-off-by: Denys Dmytriyenko <denys@ti.com>
364 lines
11 KiB
Diff
364 lines
11 KiB
Diff
From 2ab55bf6a97122999e0cd6cbe18869fb89b59c0a Mon Sep 17 00:00:00 2001
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From: Bas Laarhoven <sjml@xs4all.nl>
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Date: Sun, 13 May 2012 18:14:22 +0200
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Subject: [PATCH 52/79] Implemented Bone Cape configuration from EEPROM. Only
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used for BEBOPR cape for now.
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Signed-off-by: Bas Laarhoven <sjml@xs4all.nl>
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Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
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---
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arch/arm/mach-omap2/board-am335xevm.c | 304 +++++++++++++++++++++++++++++++++
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arch/arm/mach-omap2/mux33xx.c | 14 ++
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2 files changed, 318 insertions(+)
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diff --git a/arch/arm/mach-omap2/board-am335xevm.c b/arch/arm/mach-omap2/board-am335xevm.c
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index c6ec997..7fb8295 100644
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--- a/arch/arm/mach-omap2/board-am335xevm.c
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+++ b/arch/arm/mach-omap2/board-am335xevm.c
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@@ -2231,6 +2231,304 @@ static void tt3201_init(int evm_id, int profile)
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am33xx_d_can_init(1);
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}
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+
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+static const char* cape_pins[] = {
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+/*
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+ From SRM RevA5.0.1:
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+*/
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+ /* offset 88 - P9-22 */ "uart2_rxd",
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+ /* offset 90 - P9-21 */ "uart2_txd",
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+ /* offset 92 - P9-18 */ "spi0_d1",
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+ /* offset 94 - P9-17 */ "spi0_cs0",
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+ /* offset 96 - P9-42 */ "ecap0_in_pwm0_out",
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+ /* offset 98 - P8-35 */ "lcd_data12",
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+ /* offset 100 - P8-33 */ "lcd_data13",
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+ /* offset 102 - P8-31 */ "lcd_data14",
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+ /* offset 104 - P8-32 */ "lcd_data15",
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+ /* offset 106 - P9-19 */ "uart1_rtsn",
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+ /* offset 108 - P9-20 */ "uart1_ctsn",
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+ /* offset 110 - P9-26 */ "uart1_rxd",
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+ /* offset 112 - P9-24 */ "uart1_txd",
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+ /* offset 114 - P9-41 */ "xdma_event_intr1",
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+ /* offset 116 - P8-19 */ "gpmc_ad8",
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+ /* offset 118 - P8-13 */ "gpmc_ad9",
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+ /* offset 120 - P8-14 */ "gpmc_ad10",
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+ /* offset 122 - P8-17 */ "gpmc_ad12",
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+ /* offset 124 - P9-11 */ "gpmc_wait0",
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+ /* offset 126 - P9-13 */ "gpmc_wpn",
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+ /* offset 128 - P8-25 */ "gpmc_ad0",
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+ /* offset 130 - P8-24 */ "gpmc_ad1",
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+ /* offset 132 - P8- 5 */ "gpmc_ad2",
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+ /* offset 134 - P8- 6 */ "gpmc_ad3",
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+ /* offset 136 - P8-23 */ "gpmc_ad4",
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+ /* offset 138 - P8-22 */ "gpmc_ad5",
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+ /* offset 140 - P8- 3 */ "gpmc_ad6",
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+ /* offset 142 - P8- 4 */ "gpmc_ad7",
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+ /* offset 144 - P8-12 */ "gpmc_ad12",
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+ /* offset 146 - P8-11 */ "gpmc_ad13",
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+ /* offset 148 - P8-16 */ "gpmc_ad14",
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+ /* offset 150 - P8-15 */ "gpmc_ad15",
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+ /* offset 152 - P9-15 */ "gpmc_a0",
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+ /* offset 154 - P9-23 */ "gpmc_a1",
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+ /* offset 156 - P9-14 */ "gpmc_a2",
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+ /* offset 158 - P9-16 */ "gpmc_a3",
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+ /* offset 160 - P9-12 */ "gpmc_be1n",
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+ /* offset 162 - P8-26 */ "gpmc_csn0",
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+ /* offset 164 - P8-21 */ "gpmc_csn1",
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+ /* offset 166 - P8-20 */ "gpmc_csn2",
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+ /* offset 168 - P8-18 */ "gpmc_clk",
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+ /* offset 170 - P8-7 */ "gpmc_advn_ale",
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+ /* offset 172 - P8-9 */ "gpmc_ben0_cle",
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+ /* offset 174 - P8-10 */ "gpmc_wen",
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+ /* offset 176 - P8-8 */ "gpmc_csn3",
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+ /* offset 178 - P8-45 */ "lcd_data0",
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+ /* offset 180 - P8-46 */ "lcd_data1",
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+ /* offset 182 - P8-43 */ "lcd_data2",
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+ /* offset 184 - P8-44 */ "lcd_data3",
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+ /* offset 186 - P8-41 */ "lcd_data4",
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+ /* offset 188 - P8-42 */ "lcd_data5",
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+ /* offset 190 - P8-39 */ "lcd_data6",
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+ /* offset 192 - P8-40 */ "lcd_data7",
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+ /* offset 194 - P8-37 */ "lcd_data8",
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+ /* offset 196 - P8-38 */ "lcd_data9",
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+ /* offset 198 - P8-36 */ "lcd_data10",
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+ /* offset 200 - P8-34 */ "lcd_data11",
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+ /* offset 202 - P8-27 */ "lcd_vsync",
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+ /* offset 204 - P8-29 */ "lcd_hsync",
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+ /* offset 206 - P8-28 */ "lcd_pclk",
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+ /* offset 208 - P8-30 */ "lcd_ac_bias_en",
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+ /* offset 210 - P9-29 */ "mcasp0_fsx",
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+ /* offset 212 - P9-30 */ "mcasp0_axr0",
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+ /* offset 214 - P9-28 */ "mcasp0_ahclkr",
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+ /* offset 216 - P9-27 */ "mcasp0_fsr",
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+ /* offset 218 - P9-31 */ "mcasp0_aclkx",
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+ /* offset 220 - P9-25 */ "mcasp0_ahclkx",
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+ /* offset 222 - P9-39 */ "ain0",
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+ /* offset 224 - P9-40 */ "ain1",
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+ /* offset 226 - P9-37 */ "ain2",
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+ /* offset 228 - P9-38 */ "ain3",
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+ /* offset 230 - P9-33 */ "ain4",
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+ /* offset 232 - P9-36 */ "ain5",
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+ /* offset 234 - P9-35 */ "ain6",
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+};
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+
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+#define BIG_ENDIAN_16( i) ( ((i & 255) << 8) | ((i >> 8) & 255) )
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+#define NR_ITEMS( x) (sizeof( (x)) / sizeof( *(x)))
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+
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+extern int am33xx_mux_get_entry( int index, struct omap_mux** mux);
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+
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+typedef union {
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+/*
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+ From SRM RevA5.0.1:
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+ Bit 15 Pin is used or not: 0=Unused by Cape 1=Used by Cape
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+ Bit 14-13 Pin Direction: 10=Output 01=Input 11=BDIR
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+ Bit 12-7 Reserved
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+ Bit 6 Slew Rate: 0=Fast 1=Slow
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+ Bit 5 Rx Enable: 0=Disabled 1=Enabled
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+ Bit 4 Pull Up/Dn Select: 0=Pulldown 1=PullUp
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+ Bit 3 Pull Up/DN enabled: 0=Enabled 1=Disabled
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+ Bit 2-0 Mux Mode Selection: Mode 0-7
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+*/
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+ struct {
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+ uint16_t mux : 3;
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+ uint16_t pull_enable : 1;
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+ uint16_t pull_up : 1;
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+ uint16_t rx_enable : 1;
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+ uint16_t slew_rate : 1;
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+ uint16_t reserved : 6;
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+ uint16_t direction : 2;
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+ uint16_t used : 1;
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+ };
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+ uint16_t value;
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+} pin_def;
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+
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+#define DEBUG_EEPROM_CONFIG 0
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+
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+static int bone_io_get_mux_setting( pin_def setting)
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+{
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+ int pin_setting;
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+
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+ switch (setting.direction) {
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+ case 1:
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+ /* input */
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+ if (setting.pull_enable) {
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+ if (setting.pull_up) {
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+ pin_setting = AM33XX_PIN_INPUT_PULLUP;
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+ } else {
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+ pin_setting = AM33XX_PIN_INPUT_PULLDOWN;
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+ }
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+ } else {
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+ pin_setting = AM33XX_PIN_INPUT;
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+ }
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+ if (!setting.rx_enable) {
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+#if DEBUG_EEPROM_CONFIG
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+ pr_warning( " pin is set as input but the receiver is not enabled!\n");
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+#endif
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+ }
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+ break;
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+ case 2:
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+ /* output */
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+ pin_setting = AM33XX_PIN_OUTPUT;
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+ break;
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+ case 3:
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+ /* bi-dir */
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+ default:
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+ /* reserved */
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+#if DEBUG_EEPROM_CONFIG
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+ pr_warning( " pin ignored because it uses an unsupported mode: 0x%04x\n",
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+ setting.direction);
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+#endif
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+ return -1;
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+ }
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+#if DEBUG_EEPROM_CONFIG
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+ pr_info(" pin is configured as %s\n",
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+ (pin_setting & AM33XX_PIN_INPUT) ? "input" : "output");
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+#endif
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+ switch (setting.mux) {
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+ case 0: pin_setting |= OMAP_MUX_MODE0; break;
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+ case 1: pin_setting |= OMAP_MUX_MODE1; break;
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+ case 2: pin_setting |= OMAP_MUX_MODE2; break;
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+ case 3: pin_setting |= OMAP_MUX_MODE3; break;
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+ case 4: pin_setting |= OMAP_MUX_MODE4; break;
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+ case 5: pin_setting |= OMAP_MUX_MODE5; break;
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+ case 6: pin_setting |= OMAP_MUX_MODE6; break;
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+ case 7: pin_setting |= OMAP_MUX_MODE7; break;
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+ }
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+ return pin_setting;
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+}
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+
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+static struct omap_mux* bone_io_pin_lookup( const char* pin_name)
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+{
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+ int index = 0;
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+ struct omap_mux* mux;
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+
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+ for (;;) {
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+ if (am33xx_mux_get_entry( index, &mux) < 0) {
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+ /* no more entries */
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+#if DEBUG_EEPROM_CONFIG
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+ pr_warning( " configuration error, pin '%s' not found in mux database\n",
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+ pin_name);
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+#endif
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+ return NULL;
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+ }
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+ if (mux != NULL &&
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+ mux->muxnames[ 0] != NULL &&
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+ strcmp( mux->muxnames[ 0], pin_name) == 0)
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+ {
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+ /* entry found */
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+#if DEBUG_EEPROM_CONFIG
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+ pr_info( " found pin '%s' at index %d in mux database'\n",
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+ pin_name, index);
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+#endif
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+ return mux;
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+ }
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+ ++index;
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+ }
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+}
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+
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+static int bone_io_config_pin( const char* pin_name, pin_def eeprom_setting)
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+{
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+ struct omap_mux* mux;
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+ char* signal_name;
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+ int pin_setting = bone_io_get_mux_setting( eeprom_setting);
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+ int l1, l2;
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+ char full_name[ 50];
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+
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+ if (pin_setting < 0) {
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+ return -1;
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+ }
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+
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+ mux = bone_io_pin_lookup( pin_name);
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+
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+ if (mux == NULL) {
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+ return -1;
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+ }
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+
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+ signal_name = mux->muxnames[ eeprom_setting.mux];
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+
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+ if (signal_name == NULL) {
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+#if DEBUG_EEPROM_CONFIG
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+ pr_warning( " Configuration error, no signal found for pin '%s' in mode %d\n",
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+ pin_name, eeprom_setting.mux);
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+#endif
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+ return -1;
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+ }
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+
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+#if DEBUG_EEPROM_CONFIG
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+ pr_info( " setting pin '%s' to signal '%s'\n",
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+ pin_name, signal_name);
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+#endif
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+ l1 = strlen( pin_name);
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+ l2 = strlen( signal_name);
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+
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+ if (l1 + 1 + l2 + 1 > sizeof( full_name)) {
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+#if DEBUG_EEPROM_CONFIG
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+ pr_warning( " Internal error, combined signal name too long\n");
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+#endif
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+ return -1;
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+ } else {
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+ memcpy( full_name, pin_name, l1);
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+ full_name[ l1] = '.';
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+ memcpy( full_name + l1 + 1, signal_name, l2);
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+ full_name[ l1 + 1 + l2] = '\0';
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+ if (omap_mux_init_signal( full_name, pin_setting) < 0) {
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+ return -1;
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+ }
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+#if DEBUG_EEPROM_CONFIG
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+ pr_info( " mux '%s' was set to mode 0x%04x\n",
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+ full_name, pin_setting);
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+#endif
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+ }
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+ // return 0 for input, 1 for output
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+ return (pin_setting & AM33XX_PIN_INPUT) ? 0 : 1;
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+}
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+
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+#define RULER( x) \
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+ do { \
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+ char* p = status; \
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+ int i = 0; \
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+ int cnt = x; \
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+ status[ cnt] = '\0'; \
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+ while (cnt--) { \
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+ if (++i == 10) { \
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+ *p++ = '+'; \
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+ i = 0; \
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+ } else { \
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+ *p++ = '-'; \
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+ } \
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+ } \
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+ pr_info( "+%s+\n", status); \
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+ } while (0)
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+
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+static void bone_io_config_from_cape_eeprom( void)
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+{
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+ int i;
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+ int cnt = BIG_ENDIAN_16( cape_config.numpins);
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+ u16* pmuxdata;
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+ char status[ NR_ITEMS( cape_config.muxdata) + 1];
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+
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+ pr_info( "BeagleBone cape: configuring %2d out of %2d signals:\n",
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+ cnt, NR_ITEMS( cape_config.muxdata));
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+ RULER( NR_ITEMS( cape_config.muxdata));
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+ for (i = 0, pmuxdata = cape_config.muxdata ; i < NR_ITEMS( cape_config.muxdata) ; ++i, ++pmuxdata) {
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+ const char* pin_name = cape_pins[ i];
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+ pin_def pin_setting = { .value = BIG_ENDIAN_16( *pmuxdata) };
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+
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+ if (pin_setting.used) {
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+ switch (bone_io_config_pin( pin_name, pin_setting)) {
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+ case 0: status[ i] = 'i'; break;
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+ case 1: status[ i] = 'o'; break;
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+ default: status[ i] = '#'; break;
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+ }
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+ } else {
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+ status[ i] = ' ';
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+ }
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+ }
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+ status[ NR_ITEMS( cape_config.muxdata)] = '\0';
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+ pr_info( "|%s|\n", status);
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+ RULER( NR_ITEMS( cape_config.muxdata));
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+}
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+
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static void beaglebone_cape_setup(struct memory_accessor *mem_acc, void *context)
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{
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int ret;
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@@ -2280,6 +2578,12 @@ static void beaglebone_cape_setup(struct memory_accessor *mem_acc, void *context
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snprintf(tmp, sizeof(cape_config.partnumber) + 1, "%s", cape_config.partnumber);
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pr_info("BeagleBone cape partnumber: %s\n", tmp);
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+ if (!strncmp( "BEBOPR", cape_config.name, 6)) {
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+ pr_info( "BeagleBone cape: initializing BEBOPR cape\n");
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+ bone_io_config_from_cape_eeprom();
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+ return; // if configured from eeprom, skip all other initialization
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+ }
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+
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if (!strncmp("BB-BONE-DVID-01", cape_config.partnumber, 15)) {
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pr_info("BeagleBone cape: initializing DVI cape\n");
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diff --git a/arch/arm/mach-omap2/mux33xx.c b/arch/arm/mach-omap2/mux33xx.c
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index 72ac899..43c8989 100644
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--- a/arch/arm/mach-omap2/mux33xx.c
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+++ b/arch/arm/mach-omap2/mux33xx.c
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@@ -616,6 +616,20 @@ int __init am33xx_mux_init(struct omap_board_mux *board_subset)
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AM33XX_CONTROL_PADCONF_MUX_SIZE, am33xx_muxmodes,
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NULL, board_subset, NULL);
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}
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+
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+#define NR_ITEMS( x) (sizeof( (x)) / sizeof( *(x)))
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+
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+int am33xx_mux_get_entry( int index, struct omap_mux** mux)
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+{
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+ if (index >= 0 && index < NR_ITEMS( am33xx_muxmodes)) {
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+ *mux = &am33xx_muxmodes[ index];
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+ return 0;
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+ } else {
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+ *mux = NULL;
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+ return -1;
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+ }
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+}
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+
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#else
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int __init am33xx_mux_init(struct omap_board_mux *board_subset)
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{
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--
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1.7.10
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