From 5390230ed12585a79683733209db34e9130b8e3b Mon Sep 17 00:00:00 2001
From: =?utf-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@nokia.com>
Date: Thu, 9 Apr 2009 15:04:43 +0200
Subject: [PATCH] DSS2: Prefer 3-tap filter
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The 5-tap filter seems rather unstable. With some scaling settings it
works and with some it doesn't even though the functional clock remains
within the TRM limits. So prefer the 3-tap filter unless the functional
clock required for it is too high.

Signed-off-by: Ville Syrjälä <ville.syrjala@nokia.com>
---
 drivers/video/omap2/dss/dispc.c |   27 ++++++++++++---------------
 1 files changed, 12 insertions(+), 15 deletions(-)

diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index b8a3329..b631dd8 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -1405,15 +1405,10 @@ static unsigned long calc_fclk_five_taps(u16 width, u16 height,
 }
 
 static unsigned long calc_fclk(u16 width, u16 height,
-		u16 out_width, u16 out_height,
-		enum omap_color_mode color_mode, bool five_taps)
+		u16 out_width, u16 out_height)
 {
 	unsigned int hf, vf;
 
-	if (five_taps)
-		return calc_fclk_five_taps(width, height,
-				out_width, out_height, color_mode);
-
 	/*
 	 * FIXME how to determine the 'A' factor
 	 * for the no downscaling case ?
@@ -1494,7 +1489,7 @@ static int _dispc_setup_plane(enum omap_plane plane,
 	} else {
 		/* video plane */
 
-		unsigned long fclk;
+		unsigned long fclk = 0;
 
 		if (out_width < width / maxdownscale ||
 		   out_width > width * 8)
@@ -1530,20 +1525,22 @@ static int _dispc_setup_plane(enum omap_plane plane,
 		/* Must use 5-tap filter? */
 		five_taps = height > out_height * 2;
 
-		/* Try to use 5-tap filter whenever possible. */
-		if (cpu_is_omap34xx() && !five_taps &&
-		    height > out_height && width <= 1024) {
-			fclk = calc_fclk_five_taps(width, height,
-					out_width, out_height, color_mode);
-			if (fclk <= dispc_fclk_rate())
+		if (!five_taps) {
+			fclk = calc_fclk(width, height,
+					out_width, out_height);
+
+			/* Try 5-tap filter if 3-tap fclk is too high */
+			if (cpu_is_omap34xx() && height > out_height &&
+					fclk > dispc_fclk_rate())
 				five_taps = true;
 		}
 
 		if (width > (2048 >> five_taps))
 			return -EINVAL;
 
-		fclk = calc_fclk(width, height, out_width, out_height,
-				color_mode, five_taps);
+		if (five_taps)
+			fclk = calc_fclk_five_taps(width, height,
+					out_width, out_height, color_mode);
 
 		DSSDBG("required fclk rate = %lu Hz\n", fclk);
 		DSSDBG("current fclk rate = %lu Hz\n", dispc_fclk_rate());
-- 
1.5.6.5

