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insane: Add entries for riscv 32bit/64bit

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(From OE-Core rev: 0e0d0adac1d9303340d7e992cdb02ed7a8127350)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
Khem Raj
2017-10-05 17:50:41 -07:00
committed by Richard Purdie
parent c5763360b0
commit 3cbc720c97
1 changed files with 4 additions and 0 deletions
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meta/classes/insane.bbclass
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@@ -94,6 +94,8 @@ def package_qa_get_machine_dict(d):
"mipsisa64r6": ( 8, 0, 0, False, 64), "mipsisa64r6": ( 8, 0, 0, False, 64),
"mipsisa64r6el": ( 8, 0, 0, True, 64), "mipsisa64r6el": ( 8, 0, 0, True, 64),
"nios2": (113, 0, 0, True, 32), "nios2": (113, 0, 0, True, 32),
"riscv": (243, 0, 0, True, 32),
"riscv64": (243, 0, 0, True, 64),
"s390": (22, 0, 0, False, 32), "s390": (22, 0, 0, False, 32),
"sh4": (42, 0, 0, True, 32), "sh4": (42, 0, 0, True, 32),
"sparc": ( 2, 0, 0, False, 32), "sparc": ( 2, 0, 0, False, 32),
@@ -119,6 +121,8 @@ def package_qa_get_machine_dict(d):
"microblaze": (189, 0, 0, False, 32), "microblaze": (189, 0, 0, False, 32),
"microblazeeb":(189, 0, 0, False, 32), "microblazeeb":(189, 0, 0, False, 32),
"microblazeel":(189, 0, 0, True, 32), "microblazeel":(189, 0, 0, True, 32),
"riscv": (243, 0, 0, True, 32),
"riscv64": (243, 0, 0, True, 64),
"sh4": ( 42, 0, 0, True, 32), "sh4": ( 42, 0, 0, True, 32),
}, },
"uclinux-uclibc" : { "uclinux-uclibc" : {