diff --git a/meta/recipes-connectivity/openssl/openssl/0001-Implement-riscv_vlen_asm-for-riscv32.patch b/meta/recipes-connectivity/openssl/openssl/0001-Implement-riscv_vlen_asm-for-riscv32.patch deleted file mode 100644 index e398d1074a..0000000000 --- a/meta/recipes-connectivity/openssl/openssl/0001-Implement-riscv_vlen_asm-for-riscv32.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 725b1530456545e8511adc9cbdd265309dffad53 Mon Sep 17 00:00:00 2001 -From: Hongren Zheng -Date: Fri, 26 Apr 2024 06:03:43 +0000 -Subject: [PATCH] Implement riscv_vlen_asm for riscv32 - -riscvcap.c: undefined reference to 'riscv_vlen_asm' - -Upstream-Status: Backport [https://github.com/openssl/openssl/pull/24270] -Signed-off-by: Khem Raj ---- - crypto/riscv32cpuid.pl | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) - -diff --git a/crypto/riscv32cpuid.pl b/crypto/riscv32cpuid.pl -index 20694e7..ac1c043 100644 ---- a/crypto/riscv32cpuid.pl -+++ b/crypto/riscv32cpuid.pl -@@ -84,5 +84,22 @@ OPENSSL_cleanse: - ___ - } - -+{ -+my ($ret) = ('a0'); -+$code .= <<___; -+################################################################################ -+# size_t riscv_vlen_asm(void) -+# Return VLEN (i.e. the length of a vector register in bits). -+.p2align 3 -+.globl riscv_vlen_asm -+.type riscv_vlen_asm,\@function -+riscv_vlen_asm: -+ csrr $ret, vlenb -+ slli $ret, $ret, 3 -+ ret -+.size riscv_vlen_asm,.-riscv_vlen_asm -+___ -+} -+ - print $code; - close STDOUT or die "error closing STDOUT: $!"; --- -2.45.0 - diff --git a/meta/recipes-connectivity/openssl/openssl_3.3.1.bb b/meta/recipes-connectivity/openssl/openssl_3.3.1.bb index a8746842b2..0ad84951e6 100644 --- a/meta/recipes-connectivity/openssl/openssl_3.3.1.bb +++ b/meta/recipes-connectivity/openssl/openssl_3.3.1.bb @@ -12,7 +12,6 @@ SRC_URI = "http://www.openssl.org/source/openssl-${PV}.tar.gz \ file://0001-buildinfo-strip-sysroot-and-debug-prefix-map-from-co.patch \ file://0001-Configure-do-not-tweak-mips-cflags.patch \ file://0001-Added-handshake-history-reporting-when-test-fails.patch \ - file://0001-Implement-riscv_vlen_asm-for-riscv32.patch \ " SRC_URI:append:class-nativesdk = " \