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gcc: Fix wrong code generation in atomic intrinsics for arm
This is seen with QT code Error: ARM register expected -- `ldrex r1,[s16]' (From OE-Core rev: 07f6ebadf0bc4a90bdba9106df7fb55be8d76ffd) Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com> Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
committed by
Richard Purdie
parent
474a7b65e3
commit
b4c6bbce0e
@@ -71,6 +71,7 @@ SRC_URI = "${BASEURI} \
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file://0023-Fix-install-path-of-linux64.h.patch \
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file://0023-Fix-install-path-of-linux64.h.patch \
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file://0024-Avoid-hardcoded-build-paths-into-ppc-libgcc.patch \
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file://0024-Avoid-hardcoded-build-paths-into-ppc-libgcc.patch \
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file://0025-gcc-testsuite-tweaks-for-mips-OE.patch \
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file://0025-gcc-testsuite-tweaks-for-mips-OE.patch \
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file://0026-arm-fully-validate-mem_noofs_operand-PR120351.patch \
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"
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"
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S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/${SOURCEDIR}"
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S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/${SOURCEDIR}"
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+95
@@ -0,0 +1,95 @@
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From bb7adc5dab8bcee2ef1c0d2af370ea77c49bb5c5 Mon Sep 17 00:00:00 2001
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From: Richard Earnshaw <rearnsha@arm.com>
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Date: Mon, 19 May 2025 16:19:39 +0100
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Subject: [PATCH] arm: fully validate mem_noofs_operand [PR120351]
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It's not enough to just check that a memory operand is of the form
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mem(reg); after RA we also need to validate the register being used.
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The safest way to do this is to call memory_operand.
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PR target/120351
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gcc/ChangeLog:
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* config/arm/predicates.md (mem_noofs_operand): Also check the op
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is a valid memory_operand.
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gcc/testsuite/ChangeLog:
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* gcc.target/arm/pr120351.c: New test.
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Upstream-Status: Backport [https://gcc.gnu.org/cgit/gcc/commit/?id=e5bb7a328eb71daa02d15b48d3a6c6b8cd24abc5]
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Signed-off-by: Khem Raj <raj.khem@gmail.com>
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---
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gcc/config/arm/predicates.md | 3 +-
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gcc/testsuite/gcc.target/arm/pr120351.c | 47 +++++++++++++++++++++++++
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2 files changed, 49 insertions(+), 1 deletion(-)
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create mode 100644 gcc/testsuite/gcc.target/arm/pr120351.c
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diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md
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index 75c06d9be25..655f60312de 100644
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--- a/gcc/config/arm/predicates.md
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+++ b/gcc/config/arm/predicates.md
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@@ -907,7 +907,8 @@
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(define_predicate "mem_noofs_operand"
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(and (match_code "mem")
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- (match_code "reg" "0")))
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+ (match_code "reg" "0")
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+ (match_operand 0 "memory_operand")))
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(define_predicate "call_insn_operand"
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(ior (and (match_code "symbol_ref")
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diff --git a/gcc/testsuite/gcc.target/arm/pr120351.c b/gcc/testsuite/gcc.target/arm/pr120351.c
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new file mode 100644
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index 00000000000..d8e9d73275c
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/arm/pr120351.c
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@@ -0,0 +1,47 @@
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+/* { dg-do assemble } */
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+/* { dg-require-effective-target arm_neon_ok } */
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+/* { dg-add-options arm_neon } */
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+/* { dg-additional-options "-O2" } */
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+
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+
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+typedef struct A
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+{
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+ int f1;
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+} A;
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+
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+__inline void ref (A* x)
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+{
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+ __atomic_fetch_add(&x->f1, 1, 0);
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+}
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+
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+typedef struct B
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+{
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+ A *d;
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+ int *ptr;
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+} B;
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+
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+void insertOne (B*, B*);
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+
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+void init (B *);
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+__inline void copy (B *p, B *q)
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+{
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+ p->d = q->d;
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+ p->ptr = q->ptr;
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+ ref (p->d);
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+}
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+
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+__inline void emplace(B* x)
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+{
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+ B dummy;
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+ B _tmp;
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+ init (&dummy);
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+ copy (&_tmp, &dummy);
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+ insertOne(x, &_tmp);
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+}
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+
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+void testing ()
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+{
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+ B test;
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+ init (&test);
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+ emplace(&test);
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+}
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