diff --git a/BUILD_FOR_NETHUNTER.md b/BUILD_FOR_NETHUNTER.md deleted file mode 100644 index 2a622ff..0000000 --- a/BUILD_FOR_NETHUNTER.md +++ /dev/null @@ -1,46 +0,0 @@ -## Build Kernel Headers - -``` -cd [your kernel source directory] -make module_prepare -make modules_install INSTALL_MOD_PATH=../ -``` - -## Build RTL8188EUS driver/modules - -``` -cd ../ -git clone https://github.com/aircrack-ng/rtl8188eus -b v5.3.9 -cd rtl8188eus -``` - -That command places this driver behind your kernel source directory (RECOMMENDED). -If you put it anywhere you might need to set the Makefile in this driver, but i won't explain it. -Now, do: - -``` -export ARCH=arm64 -export SUBARCH=arm64 -export CROSS_COMPILE=../toolchain/toolchain64/bin/aarch64-linux-android- -export KBUILD_KVER=3.10.73-NetHunter-something -``` - -arm64 is the device architecture. -CROSS_COMPILE is your toolchain directory. -KBUILD_KVER is your kernel build version, you can search for it in ../lib/modules (the place of your modules_install when you build kernel headers). - -Now, do: -``` -make -``` - -If there is no error or success you will see a file named 8188eu.ko in this driver directory. - - -## Load the driver (8188eu.ko) -``` -su -cd /system/lib/modules -insmod 8188eu.ko -``` - diff --git a/Makefile b/Makefile index b24502f..4fd4e75 100755 --- a/Makefile +++ b/Makefile @@ -31,9 +31,13 @@ CONFIG_RTL8723B = n CONFIG_RTL8814A = n CONFIG_RTL8723C = n CONFIG_RTL8188F = n +CONFIG_RTL8188GTV = n CONFIG_RTL8822B = n CONFIG_RTL8723D = n CONFIG_RTL8821C = n +CONFIG_RTL8710B = n +CONFIG_RTL8192F = n +CONFIG_RTL8822C = n ######################### Interface ########################### CONFIG_USB_HCI = y CONFIG_PCI_HCI = n @@ -43,23 +47,25 @@ CONFIG_GSPI_HCI = n CONFIG_NET_NS = y CONFIG_MP_INCLUDED = y CONFIG_POWER_SAVING = n +CONFIG_IPS_MODE = default +CONFIG_LPS_MODE = default CONFIG_USB_AUTOSUSPEND = n CONFIG_HW_PWRP_DETECTION = n -CONFIG_WIFI_TEST = n CONFIG_BT_COEXIST = n -CONFIG_INTEL_WIDI = n CONFIG_WAPI_SUPPORT = n CONFIG_EFUSE_CONFIG_FILE = y CONFIG_EXT_CLK = n CONFIG_TRAFFIC_PROTECT = n CONFIG_LOAD_PHY_PARA_FROM_FILE = y +CONFIG_TXPWR_BY_RATE = y CONFIG_TXPWR_BY_RATE_EN = n +CONFIG_TXPWR_LIMIT = y CONFIG_TXPWR_LIMIT_EN = n CONFIG_RTW_CHPLAN = 0xFF CONFIG_RTW_ADAPTIVITY_EN = disable CONFIG_RTW_ADAPTIVITY_MODE = normal CONFIG_SIGNAL_SCALE_MAPPING = n -CONFIG_80211W = n +CONFIG_80211W = y CONFIG_REDUCE_TX_CPU_LOADING = n CONFIG_BR_EXT = y CONFIG_TDLS = n @@ -71,18 +77,28 @@ CONFIG_RTW_GRO = y CONFIG_RTW_NETIF_SG = y CONFIG_RTW_IPCAM_APPLICATION = n CONFIG_RTW_REPEATER_SON = n -CONFIG_RTW_WIFI_HAL = y +CONFIG_RTW_WIFI_HAL = n +CONFIG_ICMP_VOQ = n +CONFIG_IP_R_MONITOR = n #arp VOQ and high rate ########################## Debug ########################### -CONFIG_RTW_DEBUG = n +CONFIG_RTW_DEBUG = y # default log level is _DRV_INFO_ = 4, # please refer to "How_to_set_driver_debug_log_level.doc" to set the available level. -CONFIG_RTW_LOG_LEVEL = 0 +CONFIG_RTW_LOG_LEVEL = 4 ######################## Wake On Lan ########################## CONFIG_WOWLAN = n -CONFIG_WAKEUP_TYPE = 0x7 #bit2: deauth, bit1: unicast, bit0: magic pkt. +#bit2: deauth, bit1: unicast, bit0: magic pkt. +CONFIG_WAKEUP_TYPE = 0x7 +CONFIG_WOW_LPS_MODE = default +#bit0: disBBRF off, #bit1: Wireless remote controller (WRC) +CONFIG_SUSPEND_TYPE = 0 +CONFIG_WOW_STA_MIX = n CONFIG_GPIO_WAKEUP = n CONFIG_WAKEUP_GPIO_IDX = default -CONFIG_HIGH_ACTIVE = n +CONFIG_HIGH_ACTIVE_DEV2HST = n +######### only for USB ######### +CONFIG_ONE_PIN_GPIO = n +CONFIG_HIGH_ACTIVE_HST2DEV = n CONFIG_PNO_SUPPORT = n CONFIG_PNO_SET_DEBUG = n CONFIG_AP_WOWLAN = n @@ -136,12 +152,14 @@ CONFIG_PLATFORM_ACTIONS_ATV5201 = n CONFIG_PLATFORM_ACTIONS_ATM705X = n CONFIG_PLATFORM_ARM_SUN50IW1P1 = n CONFIG_PLATFORM_ARM_RTD299X = n +CONFIG_PLATFORM_ARM_LGE = n CONFIG_PLATFORM_ARM_SPREADTRUM_6820 = n CONFIG_PLATFORM_ARM_SPREADTRUM_8810 = n CONFIG_PLATFORM_ARM_WMT = n CONFIG_PLATFORM_TI_DM365 = n CONFIG_PLATFORM_MOZART = n CONFIG_PLATFORM_RTK119X = n +CONFIG_PLATFORM_RTK119X_AM = n CONFIG_PLATFORM_RTK129X = n CONFIG_PLATFORM_RTK390X = n CONFIG_PLATFORM_NOVATEK_NT72668 = n @@ -152,9 +170,8 @@ CONFIG_PLATFORM_NV_TK1_UBUNTU = n CONFIG_PLATFORM_RTL8197D = n CONFIG_PLATFORM_AML_S905 = n CONFIG_PLATFORM_ZTE_ZX296716 = n -CONFIG_PLATFORM_ARM_ODROIDC2 = n -CONFIG_PLATFORM_PPC = n -############################################################### +########### CUSTOMER ################################ +CONFIG_CUSTOMER_HUAWEI_GENERAL = n CONFIG_DRVEXT_MODULE = n @@ -177,7 +194,6 @@ ifeq ($(CONFIG_PCI_HCI), y) HCI_NAME = pci endif - _OS_INTFS_FILES := os_dep/osdep_service.o \ os_dep/linux/os_intfs.o \ os_dep/linux/$(HCI_NAME)_intf.o \ @@ -207,7 +223,6 @@ _OS_INTFS_FILES += os_dep/linux/custom_gpio_linux.o _OS_INTFS_FILES += os_dep/linux/$(HCI_NAME)_ops_linux.o endif - _HAL_INTFS_FILES := hal/hal_intf.o \ hal/hal_com.o \ hal/hal_com_phycfg.o \ @@ -222,7 +237,6 @@ _HAL_INTFS_FILES := hal/hal_intf.o \ hal/led/hal_led.o \ hal/led/hal_$(HCI_NAME)_led.o - EXTRA_CFLAGS += -I$(src)/platform _PLATFORM_FILES := platform/platform_ops.o @@ -286,7 +300,6 @@ endif ifeq ($(CONFIG_SDIO_HCI), y) _HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188E_SDIO.o endif - endif ########### HAL_RTL8192E ################################# @@ -346,7 +359,6 @@ ifeq ($(CONFIG_BT_COEXIST), y) _BTC_FILES += hal/btc/halbtc8192e1ant.o \ hal/btc/halbtc8192e2ant.o endif - endif ########### HAL_RTL8812A_RTL8821A ################################# @@ -434,13 +446,12 @@ endif ifeq ($(CONFIG_SDIO_HCI), y) MODULE_NAME := 8821as endif - endif EXTRA_CFLAGS += -DCONFIG_RTL8821A _HAL_INTFS_FILES += hal/rtl8812a/hal8821a_fw.o - + endif ifeq ($(CONFIG_BT_COEXIST), y) @@ -453,7 +464,6 @@ _BTC_FILES += hal/btc/halbtc8821a1ant.o \ hal/btc/halbtc8821a2ant.o endif endif - endif ########### HAL_RTL8723B ################################# @@ -511,7 +521,6 @@ ifeq ($(CONFIG_BT_COEXIST), y) _BTC_FILES += hal/btc/halbtc8723b1ant.o \ hal/btc/halbtc8723b2ant.o endif - endif ########### HAL_RTL8814A ################################# @@ -570,6 +579,9 @@ ifeq ($(CONFIG_PCI_HCI), y) _HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8814A_PCIE.o endif +ifeq ($(CONFIG_BT_COEXIST), y) +_BTC_FILES += hal/btc/halbtc8814a2ant.o +endif endif ########### HAL_RTL8723C ################################# @@ -625,7 +637,6 @@ endif ifeq ($(CONFIG_BT_COEXIST), y) _BTC_FILES += hal/btc/halbtc8703b1ant.o endif - endif ########### HAL_RTL8723D ################################# @@ -660,7 +671,6 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ hal/$(RTL871X)/hal8723d_fw.o \ hal/$(RTL871X)/$(RTL871X)_lps_poff.o - _HAL_INTFS_FILES += \ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \ @@ -684,7 +694,6 @@ ifeq ($(CONFIG_BT_COEXIST), y) _BTC_FILES += hal/btc/halbtc8723d1ant.o \ hal/btc/halbtc8723d2ant.o endif - endif ########### HAL_RTL8188F ################################# @@ -734,7 +743,52 @@ endif ifeq ($(CONFIG_SDIO_HCI), y) _HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188F_SDIO.o endif +endif +########### HAL_RTL8188GTV ################################# +ifeq ($(CONFIG_RTL8188GTV), y) + +RTL871X = rtl8188gtv +ifeq ($(CONFIG_USB_HCI), y) +MODULE_NAME = 8188gtvu +endif +ifeq ($(CONFIG_SDIO_HCI), y) +MODULE_NAME = 8189gtvs +endif + +EXTRA_CFLAGS += -DCONFIG_RTL8188GTV + +_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ + hal/$(RTL871X)/Hal8188GTVPwrSeq.o\ + hal/$(RTL871X)/$(RTL871X)_sreset.o + +_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ + hal/$(RTL871X)/$(RTL871X)_phycfg.o \ + hal/$(RTL871X)/$(RTL871X)_rf6052.o \ + hal/$(RTL871X)/$(RTL871X)_dm.o \ + hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ + hal/$(RTL871X)/$(RTL871X)_cmd.o \ + hal/$(RTL871X)/hal8188gtv_fw.o + +_HAL_INTFS_FILES += \ + hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o + +ifeq ($(CONFIG_PCI_HCI), y) +_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o +else +_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o +endif + +ifeq ($(CONFIG_USB_HCI), y) +_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188GTV_USB.o +endif + +ifeq ($(CONFIG_SDIO_HCI), y) +_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188GTV_SDIO.o +endif endif ########### HAL_RTL8822B ################################# @@ -753,8 +807,8 @@ endif ifeq ($(CONFIG_SDIO_HCI), y) MODULE_NAME = 88x2bs endif - endif + ########### HAL_RTL8821C ################################# ifeq ($(CONFIG_RTL8821C), y) RTL871X := rtl8821c @@ -767,8 +821,123 @@ endif ifeq ($(CONFIG_SDIO_HCI), y) MODULE_NAME = 8821cs endif +endif + +########### HAL_RTL8710B ################################# +ifeq ($(CONFIG_RTL8710B), y) + +RTL871X = rtl8710b +ifeq ($(CONFIG_USB_HCI), y) +MODULE_NAME = 8710bu +MODULE_SUB_NAME = 8710bu +endif + +EXTRA_CFLAGS += -DCONFIG_RTL8710B + +_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ + hal/$(RTL871X)/Hal8710BPwrSeq.o\ + hal/$(RTL871X)/$(RTL871X)_sreset.o + +_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ + hal/$(RTL871X)/$(RTL871X)_phycfg.o \ + hal/$(RTL871X)/$(RTL871X)_rf6052.o \ + hal/$(RTL871X)/$(RTL871X)_dm.o \ + hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ + hal/$(RTL871X)/$(RTL871X)_cmd.o \ + hal/$(RTL871X)/hal8710b_fw.o \ + hal/$(RTL871X)/$(RTL871X)_lps_poff.o + +_HAL_INTFS_FILES += \ + hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o + +_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o + +ifeq ($(CONFIG_USB_HCI), y) +_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8710B_USB.o +endif +endif + +########### HAL_RTL8192F ################################# +ifeq ($(CONFIG_RTL8192F), y) + +RTL871X = rtl8192f +ifeq ($(CONFIG_USB_HCI), y) +MODULE_NAME = 8192fu +MODULE_SUB_NAME = 8192fu +endif +ifeq ($(CONFIG_PCI_HCI), y) +MODULE_NAME = 8192fe +MODULE_SUB_NAME = 8192fe +endif +ifeq ($(CONFIG_SDIO_HCI), y) +MODULE_NAME = 8192fs +MODULE_SUB_NAME = 8192fs +endif + +EXTRA_CFLAGS += -DCONFIG_RTL8192F + +_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ + hal/$(RTL871X)/Hal8192FPwrSeq.o\ + hal/$(RTL871X)/$(RTL871X)_sreset.o + +_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ + hal/$(RTL871X)/$(RTL871X)_phycfg.o \ + hal/$(RTL871X)/$(RTL871X)_rf6052.o \ + hal/$(RTL871X)/$(RTL871X)_dm.o \ + hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ + hal/$(RTL871X)/$(RTL871X)_cmd.o \ + hal/$(RTL871X)/hal8192f_fw.o \ + hal/$(RTL871X)/$(RTL871X)_lps_poff.o + + +_HAL_INTFS_FILES += \ + hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o + +ifeq ($(CONFIG_PCI_HCI), y) +_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o +else +_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o +endif + +ifeq ($(CONFIG_SDIO_HCI), y) +_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_SDIO.o +endif + +ifeq ($(CONFIG_USB_HCI), y) +_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_USB.o +endif + +ifeq ($(CONFIG_PCI_HCI), y) +_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_PCIE.o +endif endif + +########### HAL_RTL8822C ################################# +ifeq ($(CONFIG_RTL8822C), y) +RTL871X := rtl8822c +ifeq ($(CONFIG_USB_HCI), y) +ifeq ($(CONFIG_BT_COEXIST), n) +MODULE_NAME = 8812cu +else +MODULE_NAME = 88x2cu +endif +endif +ifeq ($(CONFIG_PCI_HCI), y) +MODULE_NAME = 88x2ce +endif +ifeq ($(CONFIG_SDIO_HCI), y) +MODULE_NAME = 88x2cs +endif + +endif + ########### AUTO_CFG ################################# ifeq ($(CONFIG_AUTOCFG_CP), y) @@ -786,7 +955,6 @@ else $(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) endif endif - endif ########### END OF PATH ################################# @@ -803,6 +971,15 @@ EXTRA_CFLAGS += -DCONFIG_MP_INCLUDED endif ifeq ($(CONFIG_POWER_SAVING), y) +ifneq ($(CONFIG_IPS_MODE), default) +EXTRA_CFLAGS += -DRTW_IPS_MODE=$(CONFIG_IPS_MODE) +endif +ifneq ($(CONFIG_LPS_MODE), default) +EXTRA_CFLAGS += -DRTW_LPS_MODE=$(CONFIG_LPS_MODE) +endif +ifneq ($(CONFIG_WOW_LPS_MODE), default) +EXTRA_CFLAGS += -DRTW_WOW_LPS_MODE=$(CONFIG_WOW_LPS_MODE) +endif EXTRA_CFLAGS += -DCONFIG_POWER_SAVING endif @@ -810,23 +987,14 @@ ifeq ($(CONFIG_HW_PWRP_DETECTION), y) EXTRA_CFLAGS += -DCONFIG_HW_PWRP_DETECTION endif -ifeq ($(CONFIG_WIFI_TEST), y) -EXTRA_CFLAGS += -DCONFIG_WIFI_TEST -endif - ifeq ($(CONFIG_BT_COEXIST), y) EXTRA_CFLAGS += -DCONFIG_BT_COEXIST endif -ifeq ($(CONFIG_INTEL_WIDI), y) -EXTRA_CFLAGS += -DCONFIG_INTEL_WIDI -endif - ifeq ($(CONFIG_WAPI_SUPPORT), y) EXTRA_CFLAGS += -DCONFIG_WAPI_SUPPORT endif - ifeq ($(CONFIG_EFUSE_CONFIG_FILE), y) EXTRA_CFLAGS += -DCONFIG_EFUSE_CONFIG_FILE @@ -866,6 +1034,11 @@ EXTRA_CFLAGS += -DCONFIG_LOAD_PHY_PARA_FROM_FILE EXTRA_CFLAGS += -DREALTEK_CONFIG_PATH=\"/lib/firmware/\" endif +ifeq ($(CONFIG_TXPWR_BY_RATE), n) +EXTRA_CFLAGS += -DCONFIG_TXPWR_BY_RATE=0 +else ifeq ($(CONFIG_TXPWR_BY_RATE), y) +EXTRA_CFLAGS += -DCONFIG_TXPWR_BY_RATE=1 +endif ifeq ($(CONFIG_TXPWR_BY_RATE_EN), n) EXTRA_CFLAGS += -DCONFIG_TXPWR_BY_RATE_EN=0 else ifeq ($(CONFIG_TXPWR_BY_RATE_EN), y) @@ -874,6 +1047,11 @@ else ifeq ($(CONFIG_TXPWR_BY_RATE_EN), auto) EXTRA_CFLAGS += -DCONFIG_TXPWR_BY_RATE_EN=2 endif +ifeq ($(CONFIG_TXPWR_LIMIT), n) +EXTRA_CFLAGS += -DCONFIG_TXPWR_LIMIT=0 +else ifeq ($(CONFIG_TXPWR_LIMIT), y) +EXTRA_CFLAGS += -DCONFIG_TXPWR_LIMIT=1 +endif ifeq ($(CONFIG_TXPWR_LIMIT_EN), n) EXTRA_CFLAGS += -DCONFIG_TXPWR_LIMIT_EN=0 else ifeq ($(CONFIG_TXPWR_LIMIT_EN), y) @@ -916,6 +1094,10 @@ endif ifeq ($(CONFIG_WOWLAN), y) EXTRA_CFLAGS += -DCONFIG_WOWLAN -DRTW_WAKEUP_EVENT=$(CONFIG_WAKEUP_TYPE) +EXTRA_CFLAGS += -DRTW_SUSPEND_TYPE=$(CONFIG_SUSPEND_TYPE) +ifeq ($(CONFIG_WOW_STA_MIX), y) +EXTRA_CFLAGS += -DRTW_WOW_STA_MIX +endif ifeq ($(CONFIG_SDIO_HCI), y) EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER endif @@ -937,11 +1119,20 @@ endif ifeq ($(CONFIG_GPIO_WAKEUP), y) EXTRA_CFLAGS += -DCONFIG_GPIO_WAKEUP -ifeq ($(CONFIG_HIGH_ACTIVE), y) -EXTRA_CFLAGS += -DHIGH_ACTIVE=1 -else -EXTRA_CFLAGS += -DHIGH_ACTIVE=0 +ifeq ($(CONFIG_ONE_PIN_GPIO), y) +EXTRA_CFLAGS += -DCONFIG_RTW_ONE_PIN_GPIO endif +ifeq ($(CONFIG_HIGH_ACTIVE_DEV2HST), y) +EXTRA_CFLAGS += -DHIGH_ACTIVE_DEV2HST=1 +else +EXTRA_CFLAGS += -DHIGH_ACTIVE_DEV2HST=0 +endif +endif + +ifeq ($(CONFIG_HIGH_ACTIVE_HST2DEV), y) +EXTRA_CFLAGS += -DHIGH_ACTIVE_HST2DEV=1 +else +EXTRA_CFLAGS += -DHIGH_ACTIVE_HST2DEV=0 endif ifneq ($(CONFIG_WAKEUP_GPIO_IDX), default) @@ -964,7 +1155,6 @@ EXTRA_CFLAGS += -DCONFIG_BR_EXT EXTRA_CFLAGS += '-DCONFIG_BR_EXT_BRNAME="'$(BR_NAME)'"' endif - ifeq ($(CONFIG_TDLS), y) EXTRA_CFLAGS += -DCONFIG_TDLS endif @@ -1000,10 +1190,21 @@ ifeq ($(CONFIG_RTW_NETIF_SG), y) EXTRA_CFLAGS += -DCONFIG_RTW_NETIF_SG endif +ifeq ($(CONFIG_ICMP_VOQ), y) +EXTRA_CFLAGS += -DCONFIG_ICMP_VOQ +endif + +ifeq ($(CONFIG_IP_R_MONITOR), y) +EXTRA_CFLAGS += -DCONFIG_IP_R_MONITOR +endif + ifeq ($(CONFIG_RTW_WIFI_HAL), y) #EXTRA_CFLAGS += -DCONFIG_RTW_WIFI_HAL_DEBUG EXTRA_CFLAGS += -DCONFIG_RTW_WIFI_HAL EXTRA_CFLAGS += -DCONFIG_RTW_CFGVEDNOR_LLSTATS +EXTRA_CFLAGS += -DCONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI +EXTRA_CFLAGS += -DCONFIG_RTW_CFGVEDNOR_RSSIMONITOR +EXTRA_CFLAGS += -DCONFIG_RTW_CFGVENDOR_WIFI_LOGGER endif ifeq ($(CONFIG_MP_VHT_HW_TX_MODE), y) @@ -1031,7 +1232,7 @@ EXTRA_CFLAGS += -DDM_ODM_SUPPORT_TYPE=0x04 ifeq ($(CONFIG_PLATFORM_I386_PC), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -SUBARCH := $(shell uname -m | sed -e "s/i.86/i386/; s/ppc/powerpc/; s/armv.l/arm/; s/aarch64/arm64/;") +SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) ARCH ?= $(SUBARCH) CROSS_COMPILE ?= KVER := $(shell uname -r) @@ -1129,7 +1330,6 @@ KSRC := $(KERNEL_BUILD_PATH) MODULE_NAME :=wlan endif - ifeq ($(CONFIG_PLATFORM_ACTIONS_ATM705X), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC @@ -1346,8 +1546,6 @@ CROSS_COMPILE := /home/share/CusEnv/FreeScale/arm-eabi-4.4.3/bin/arm-eabi- KSRC ?= /home/share/CusEnv/FreeScale/FS_kernel_env endif - - ifeq ($(CONFIG_PLATFORM_ACTIONS_ATJ227X), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATJ227X ARCH := mips @@ -1665,6 +1863,32 @@ endif INSTALL_PREFIX := endif +ifeq ($(CONFIG_PLATFORM_ARM_RTD299X_LG), y) +EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN +EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE +EXTRA_CFLAGS += -DRTW_P2P_GROUP_INTERFACE=1 +EXTRA_CFLAGS += -DCONFIG_IFACE_NUMBER=3 +#EXTRA_CFLAGS += -DCONFIG_FIX_HWPORT +EXTRA_CFLAGS += -DLGE_PRIVATE +EXTRA_CFLAGS += -DPURE_SUPPLICANT +EXTRA_CFLAGS += -DCONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP -DCONFIG_RTW_IOCTL_SET_COUNTRY +EXTRA_CFLAGS += -DDBG_RX_DFRAME_RAW_DATA +EXTRA_CFLAGS += -DRTW_REDUCE_SCAN_SWITCH_CH_TIME +ARCH ?= arm +KVER ?= + +ifneq ($(PLATFORM), WEBOS) +$(info PLATFORM is empty) +CROSS_COMPILE ?= /mnt/newdisk/LGE/arm-lg115x-linux-gnueabi-4.8-2016.03-x86_64/bin/arm-lg115x-linux-gnueabi- +KSRC ?= /mnt/newdisk/LGE/linux-rockhopper_k3lp_drd4tv_423 +endif + +CROSS_COMPILE ?= +KSRC ?= $(LINUX_SRC) +INSTALL_PREFIX ?= +endif + ifeq ($(CONFIG_PLATFORM_HISILICON), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_HISILICON ifeq ($(SUPPORT_CONCURRENT),y) @@ -1684,6 +1908,7 @@ endif ifeq ($(CONFIG_PLATFORM_HISILICON_HI3798), y) EXTRA_CFLAGS += -DCONFIG_PLATFORM_HISILICON EXTRA_CFLAGS += -DCONFIG_PLATFORM_HISILICON_HI3798 +#EXTRA_CFLAGS += -DCONFIG_PLATFORM_HISILICON_HI3798_MV200_HDMI_DONGLE EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN # default setting for Android EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE @@ -1692,11 +1917,13 @@ EXTRA_CFLAGS += -DRTW_USE_CFG80211_STA_EVENT # default setting for Android 5.x and later #EXTRA_CFLAGS += -DCONFIG_RADIO_WORK -ifeq ($(CONFIG_SDIO_HCI), y) -EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -_PLATFORM_FILES += platform/platform_hisilicon_hi3798_sdio.o -EXTRA_CFLAGS += -DCONFIG_HISI_SDIO_ID=1 -endif +# If system could power on and recognize Wi-Fi SDIO automatically, +# platfrom operations are not necessary. +#ifeq ($(CONFIG_SDIO_HCI), y) +#EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS +#_PLATFORM_FILES += platform/platform_hisilicon_hi3798_sdio.o +#EXTRA_CFLAGS += -DCONFIG_HISI_SDIO_ID=1 +#endif ARCH ?= arm CROSS_COMPILE ?= /HiSTBAndroidV600R003C00SPC021_git_0512/device/hisilicon/bigfish/sdk/tools/linux/toolchains/arm-histbv310-linux/bin/arm-histbv310-linux- @@ -1711,7 +1938,6 @@ CONFIG_RTL8822BS ?= m USER_MODULE_NAME := rtl8822bs endif endif - endif # Platform setting @@ -1767,7 +1993,6 @@ EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT # default setting for Android 4.1, 4.2 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -EXTRA_CFLAGS += -DCONFIG_IFACE_NUMBER=3 EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT #EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION @@ -1793,6 +2018,26 @@ MODULE_NAME := 8192eu endif +ifeq ($(CONFIG_PLATFORM_RTK119X_AM), y) +EXTRA_CFLAGS += -DCONFIG_PLATFORM_RTK119X_AM +EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN +EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT +EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -DCONFIG_FULL_CH_IN_P2P_HANDSHAKE +EXTRA_CFLAGS += -DCONFIG_IFACE_NUMBER=3 +EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT + +ifeq ($(CONFIG_USB_HCI), y) +EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX +endif + +ARCH := arm + +#CROSS_COMPILE := arm-linux-gnueabihf- +KVER := 3.10.24 +#KSRC := +CROSS_COMPILE := +endif + ifeq ($(CONFIG_PLATFORM_RTK129X), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN EXTRA_CFLAGS += -DRTK_129X_PLATFORM @@ -1868,7 +2113,7 @@ ARCH := arm CROSS_COMPILE := /home/android_sdk/Telechips/v13.05_r1-tcc-android-4.2.2_tcc893x-evm_build/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- KSRC := /home/android_sdk/Telechips/v13.05_r1-tcc-android-4.2.2_tcc893x-evm_build/kernel MODULE_NAME := wlan -endif +endif ifeq ($(CONFIG_PLATFORM_RTL8197D), y) EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN -DCONFIG_PLATFORM_RTL8197D @@ -1907,7 +2152,6 @@ CONFIG_RTL8822BS ?= m USER_MODULE_NAME := 8822bs endif endif - endif ifeq ($(CONFIG_PLATFORM_ZTE_ZX296716), y) @@ -1937,7 +2181,15 @@ CONFIG_RTL8822BS ?= m USER_MODULE_NAME := 8822bs endif endif +endif +########### CUSTOMER ################################ +ifeq ($(CONFIG_CUSTOMER_HUAWEI_GENERAL), y) +CONFIG_CUSTOMER_HUAWEI = y +endif + +ifeq ($(CONFIG_CUSTOMER_HUAWEI), y) +EXTRA_CFLAGS += -DCONFIG_HUAWEI_PROC endif ifeq ($(CONFIG_MULTIDRV), y) @@ -1953,8 +2205,6 @@ endif ifeq ($(CONFIG_PCI_HCI), y) MODULE_NAME := rtw_pci endif - - endif USER_MODULE_NAME ?= @@ -1977,6 +2227,11 @@ ifeq ($(CONFIG_RTL8821C), y) include $(src)/rtl8821c.mk endif +########### HAL_RTL8822C ################################# +ifeq ($(CONFIG_RTL8822C), y) +include $(src)/rtl8822c.mk +endif + rtk_core := core/rtw_cmd.o \ core/rtw_security.o \ core/rtw_debug.o \ @@ -1991,6 +2246,7 @@ rtk_core := core/rtw_cmd.o \ core/rtw_vht.o \ core/rtw_pwrctrl.o \ core/rtw_rf.o \ + core/rtw_chplan.o \ core/rtw_recv.o \ core/rtw_sta_mgt.o \ core/rtw_ap.o \ @@ -2010,7 +2266,7 @@ rtk_core := core/rtw_cmd.o \ core/rtw_odm.o \ core/rtw_rm.o \ core/rtw_rm_fsm.o \ - core/efuse/rtw_efuse.o + core/efuse/rtw_efuse.o ifeq ($(CONFIG_SDIO_HCI), y) rtk_core += core/rtw_sdio.o @@ -2018,8 +2274,6 @@ endif $(MODULE_NAME)-y += $(rtk_core) -$(MODULE_NAME)-$(CONFIG_INTEL_WIDI) += core/rtw_intel_widi.o - $(MODULE_NAME)-$(CONFIG_WAPI_SUPPORT) += core/rtw_wapi.o \ core/rtw_wapi_sms4.o @@ -2095,7 +2349,6 @@ config_r: @echo "make config" /bin/bash script/Configure script/config.in - .PHONY: modules clean clean: diff --git a/README.md b/README.md index 8ac641c..b467302 100644 --- a/README.md +++ b/README.md @@ -1,14 +1,14 @@ -## rtl8188eus v5.3.9 +## rtl8188eus v5.7.6.1 -# Realtek rtl8188eus & rtl8188eu & rtl8188etv WiFi drivers +# Realtek rtl8188eus & rtl8188eu & rtl8188etv WiFi driver [![Monitor mode](https://img.shields.io/badge/monitor%20mode-supported-brightgreen.svg)](#) [![Frame Injection](https://img.shields.io/badge/frame%20injection-supported-brightgreen.svg)](#) [![MESH Mode](https://img.shields.io/badge/mesh%20mode-supported-brightgreen.svg)](#) -[![GitHub issues](https://img.shields.io/github/issues/kimocoder/rtl8188eus.svg)](https://github.com/kimocoder/rtl8188eus/issues) -[![GitHub forks](https://img.shields.io/github/forks/kimocoder/rtl8188eus.svg)](https://github.com/kimocoder/rtl8188eus/network) -[![GitHub stars](https://img.shields.io/github/stars/kimocoder/rtl8188eus.svg)](https://github.com/kimocoder/rtl8188eus/stargazers) -[![GitHub license](https://img.shields.io/github/license/kimocoder/rtl8812au.svg)](https://github.com/kimocoder/rtl8188eus/blob/master/LICENSE)
+[![GitHub issues](https://img.shields.io/github/issues/aircrack-ng/rtl8188eus.svg)](https://github.com/aircrack-ng/rtl8188eus/issues) +[![GitHub forks](https://img.shields.io/github/forks/aircrack-ng/rtl8188eus.svg)](https://github.com/aircrack-ng/rtl8188eus/network) +[![GitHub stars](https://img.shields.io/github/stars/aircrack-ng/rtl8188eus.svg)](https://github.com/aircrack-ng/rtl8188eus/stargazers) +[![GitHub license](https://img.shields.io/github/license/aircrack-ng/rtl8812au.svg)](https://github.com/aircrack-ng/rtl8188eus/blob/master/LICENSE)
[![Android](https://img.shields.io/badge/android%20(8)-supported-brightgreen.svg)](#) [![aircrack-ng](https://img.shields.io/badge/aircrack--ng-supported-blue.svg)](#) @@ -17,18 +17,20 @@ we've seen, this must be the newest, most stable and effective one. The performance and code quality has been improved. # Supports -* Android 7 +* Android 9 +* WPA3-SAE * MESH Support * Monitor mode * Frame injection -* Up to kernel v5.3+ +* Supported up to kernel v5.4+ ... And a bunch of various wifi chipsets # Howto build/install -1. You will need to blacklist another driver in order to use this one. -2. "echo "blacklist r8188eu.ko" > "/etc/modprobe.d/realtek.conf" -3. "make && make install"
-4. Reboot in order to blacklist and load the new driver/module. +1. You will need to blacklist another driver in order to use this one instead of the one provided with kernel. + Simply follow instructions below:
+2. "echo "blacklist r8188eu" > /etc/modprobe.d/realtek-wifi.conf"
+3. Then run "make && make install"
+4. And reboot in order to blacklist the module and load this module instead. # MONITOR MODE howto Use these steps to enter monitor mode. @@ -38,7 +40,6 @@ $ sudo ip link set down $ sudo iw dev set type monitor ``` Frame injection test may be performed with -(after kernel v5.2 scanning is slow, run a scan or simply an airodump-ng first!) ``` $ aireplay -9 ``` @@ -64,10 +65,9 @@ unmanaged-devices=mac:A7:A7:A7:A7:A7 ``` # TODO -* Update the MESH mode -* Update Android code -* Fix more missing/wrong statements -* Lower debug level -* Cleanup the code +* Turn down log level / DEBUG + (we want it now for some months just to see) +* Implement txpower control +* Remove Windows (NDIS) code diff --git a/ReleaseNotes.pdf b/ReleaseNotes.pdf index 391715f..d961010 100644 Binary files a/ReleaseNotes.pdf and b/ReleaseNotes.pdf differ diff --git a/core/efuse/rtw_efuse.c b/core/efuse/rtw_efuse.c index ede443b..6153aaf 100644 --- a/core/efuse/rtw_efuse.c +++ b/core/efuse/rtw_efuse.c @@ -62,7 +62,7 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset) if (pAdapter->registrypriv.boffefusemask) return FALSE; -#if DEV_BUS_TYPE == RT_USB_INTERFACE +#ifdef CONFIG_USB_HCI #if defined(CONFIG_RTL8188E) if (IS_HARDWARE_TYPE_8188E(pAdapter)) return (IS_MASKED(8188E, _MUSB, Offset)) ? TRUE : FALSE; @@ -99,6 +99,10 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset) if (IS_HARDWARE_TYPE_8188F(pAdapter)) return (IS_MASKED(8188F, _MUSB, Offset)) ? TRUE : FALSE; #endif +#if defined(CONFIG_RTL8188GTV) + if (IS_HARDWARE_TYPE_8188GTV(pAdapter)) + return (IS_MASKED(8188GTV, _MUSB, Offset)) ? TRUE : FALSE; +#endif #if defined(CONFIG_RTL8822B) if (IS_HARDWARE_TYPE_8822B(pAdapter)) return (IS_MASKED(8822B, _MUSB, Offset)) ? TRUE : FALSE; @@ -107,13 +111,26 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset) if (IS_HARDWARE_TYPE_8723D(pAdapter)) return (IS_MASKED(8723D, _MUSB, Offset)) ? TRUE : FALSE; #endif - +#if defined(CONFIG_RTL8710B) + if (IS_HARDWARE_TYPE_8710B(pAdapter)) + return (IS_MASKED(8710B, _MUSB, Offset)) ? TRUE : FALSE; +#endif #if defined(CONFIG_RTL8821C) if (IS_HARDWARE_TYPE_8821CU(pAdapter)) return (IS_MASKED(8821C, _MUSB, Offset)) ? TRUE : FALSE; #endif -#elif DEV_BUS_TYPE == RT_PCI_INTERFACE +#if defined(CONFIG_RTL8192F) + if (IS_HARDWARE_TYPE_8192FU(pAdapter)) + return (IS_MASKED(8192F, _MUSB, Offset)) ? TRUE : FALSE; +#endif +#if defined(CONFIG_RTL8822C) + if (IS_HARDWARE_TYPE_8822C(pAdapter)) + return (IS_MASKED(8822C, _MUSB, Offset)) ? TRUE : FALSE; +#endif +#endif /*CONFIG_USB_HCI*/ + +#ifdef CONFIG_PCI_HCI #if defined(CONFIG_RTL8188E) if (IS_HARDWARE_TYPE_8188E(pAdapter)) return (IS_MASKED(8188E, _MPCIE, Offset)) ? TRUE : FALSE; @@ -147,7 +164,17 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset) return (IS_MASKED(8821C, _MPCIE, Offset)) ? TRUE : FALSE; #endif -#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE +#if defined(CONFIG_RTL8192F) + if (IS_HARDWARE_TYPE_8192FE(pAdapter)) + return (IS_MASKED(8192F, _MPCIE, Offset)) ? TRUE : FALSE; +#endif +#if defined(CONFIG_RTL8822C) + if (IS_HARDWARE_TYPE_8822C(pAdapter)) + return (IS_MASKED(8822C, _MPCIE, Offset)) ? TRUE : FALSE; +#endif +#endif /*CONFIG_PCI_HCI*/ + +#ifdef CONFIG_SDIO_HCI #ifdef CONFIG_RTL8188E_SDIO if (IS_HARDWARE_TYPE_8188E(pAdapter)) return (IS_MASKED(8188E, _MSDIO, Offset)) ? TRUE : FALSE; @@ -156,10 +183,14 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset) if (IS_HARDWARE_TYPE_8723BS(pAdapter)) return (IS_MASKED(8723B, _MSDIO, Offset)) ? TRUE : FALSE; #endif -#ifdef CONFIG_RTL8188F_SDIO +#ifdef CONFIG_RTL8188F if (IS_HARDWARE_TYPE_8188F(pAdapter)) return (IS_MASKED(8188F, _MSDIO, Offset)) ? TRUE : FALSE; #endif +#ifdef CONFIG_RTL8188GTV + if (IS_HARDWARE_TYPE_8188GTV(pAdapter)) + return (IS_MASKED(8188GTV, _MSDIO, Offset)) ? TRUE : FALSE; +#endif #ifdef CONFIG_RTL8192E if (IS_HARDWARE_TYPE_8192ES(pAdapter)) return (IS_MASKED(8192E, _MSDIO, Offset)) ? TRUE : FALSE; @@ -176,7 +207,15 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset) if (IS_HARDWARE_TYPE_8822B(pAdapter)) return (IS_MASKED(8822B, _MSDIO, Offset)) ? TRUE : FALSE; #endif +#if defined(CONFIG_RTL8192F) + if (IS_HARDWARE_TYPE_8192FS(pAdapter)) + return (IS_MASKED(8192F, _MSDIO, Offset)) ? TRUE : FALSE; #endif +#if defined(CONFIG_RTL8822C) + if (IS_HARDWARE_TYPE_8822C(pAdapter)) + return (IS_MASKED(8822C, _MSDIO, Offset)) ? TRUE : FALSE; +#endif +#endif /*CONFIG_SDIO_HCI*/ return FALSE; } @@ -185,7 +224,7 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -#if DEV_BUS_TYPE == RT_USB_INTERFACE +#ifdef CONFIG_USB_HCI #if defined(CONFIG_RTL8188E) if (IS_HARDWARE_TYPE_8188E(pAdapter)) GET_MASK_ARRAY(8188E, _MUSB, pArray); @@ -214,6 +253,10 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray) if (IS_HARDWARE_TYPE_8188F(pAdapter)) GET_MASK_ARRAY(8188F, _MUSB, pArray); #endif +#if defined(CONFIG_RTL8188GTV) + if (IS_HARDWARE_TYPE_8188GTV(pAdapter)) + GET_MASK_ARRAY(8188GTV, _MUSB, pArray); +#endif #if defined(CONFIG_RTL8814A) if (IS_HARDWARE_TYPE_8814A(pAdapter)) GET_MASK_ARRAY(8814A, _MUSB, pArray); @@ -226,9 +269,17 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray) if (IS_HARDWARE_TYPE_8821CU(pAdapter)) GET_MASK_ARRAY(8821C, _MUSB, pArray); #endif +#if defined(CONFIG_RTL8192F) + if (IS_HARDWARE_TYPE_8192FU(pAdapter)) + GET_MASK_ARRAY(8192F, _MUSB, pArray); +#endif +#if defined(CONFIG_RTL8822C) + if (IS_HARDWARE_TYPE_8822C(pAdapter)) + GET_MASK_ARRAY(8822C, _MUSB, pArray); +#endif +#endif /*CONFIG_USB_HCI*/ - -#elif DEV_BUS_TYPE == RT_PCI_INTERFACE +#ifdef CONFIG_PCI_HCI #if defined(CONFIG_RTL8188E) if (IS_HARDWARE_TYPE_8188E(pAdapter)) GET_MASK_ARRAY(8188E, _MPCIE, pArray); @@ -261,9 +312,17 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray) if (IS_HARDWARE_TYPE_8821CE(pAdapter)) GET_MASK_ARRAY(8821C, _MPCIE, pArray); #endif +#if defined(CONFIG_RTL8192F) + if (IS_HARDWARE_TYPE_8192FE(pAdapter)) + GET_MASK_ARRAY(8192F, _MPCIE, pArray); +#endif +#if defined(CONFIG_RTL8822C) + if (IS_HARDWARE_TYPE_8822C(pAdapter)) + GET_MASK_ARRAY(8822C, _MPCIE, pArray); +#endif +#endif /*CONFIG_PCI_HCI*/ - -#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE +#ifdef CONFIG_SDIO_HCI #if defined(CONFIG_RTL8188E) if (IS_HARDWARE_TYPE_8188E(pAdapter)) GET_MASK_ARRAY(8188E, _MSDIO, pArray); @@ -276,6 +335,10 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray) if (IS_HARDWARE_TYPE_8188F(pAdapter)) GET_MASK_ARRAY(8188F, _MSDIO, pArray); #endif +#if defined(CONFIG_RTL8188GTV) + if (IS_HARDWARE_TYPE_8188GTV(pAdapter)) + GET_MASK_ARRAY(8188GTV, _MSDIO, pArray); +#endif #if defined(CONFIG_RTL8192E) if (IS_HARDWARE_TYPE_8192ES(pAdapter)) GET_MASK_ARRAY(8192E, _MSDIO, pArray); @@ -292,14 +355,22 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray) if (IS_HARDWARE_TYPE_8822B(pAdapter)) GET_MASK_ARRAY(8822B , _MSDIO, pArray); #endif -#endif /*#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE*/ +#if defined(CONFIG_RTL8192F) + if (IS_HARDWARE_TYPE_8192FS(pAdapter)) + GET_MASK_ARRAY(8192F, _MSDIO, pArray); +#endif +#if defined(CONFIG_RTL8822C) + if (IS_HARDWARE_TYPE_8822C(pAdapter)) + GET_MASK_ARRAY(8822C , _MSDIO, pArray); +#endif +#endif /*CONFIG_SDIO_HCI*/ } u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -#if DEV_BUS_TYPE == RT_USB_INTERFACE +#ifdef CONFIG_USB_HCI #if defined(CONFIG_RTL8188E) if (IS_HARDWARE_TYPE_8188E(pAdapter)) return GET_MASK_ARRAY_LEN(8188E, _MUSB); @@ -328,6 +399,10 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter) if (IS_HARDWARE_TYPE_8188F(pAdapter)) return GET_MASK_ARRAY_LEN(8188F, _MUSB); #endif +#if defined(CONFIG_RTL8188GTV) + if (IS_HARDWARE_TYPE_8188GTV(pAdapter)) + return GET_MASK_ARRAY_LEN(8188GTV, _MUSB); +#endif #if defined(CONFIG_RTL8814A) if (IS_HARDWARE_TYPE_8814A(pAdapter)) return GET_MASK_ARRAY_LEN(8814A, _MUSB); @@ -340,9 +415,17 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter) if (IS_HARDWARE_TYPE_8821CU(pAdapter)) return GET_MASK_ARRAY_LEN(8821C, _MUSB); #endif +#if defined(CONFIG_RTL8192F) + if (IS_HARDWARE_TYPE_8192FU(pAdapter)) + return GET_MASK_ARRAY_LEN(8192F, _MUSB); +#endif +#if defined(CONFIG_RTL8822C) + if (IS_HARDWARE_TYPE_8822C(pAdapter)) + return GET_MASK_ARRAY_LEN(8822C, _MUSB); +#endif +#endif /*CONFIG_USB_HCI*/ - -#elif DEV_BUS_TYPE == RT_PCI_INTERFACE +#ifdef CONFIG_PCI_HCI #if defined(CONFIG_RTL8188E) if (IS_HARDWARE_TYPE_8188E(pAdapter)) return GET_MASK_ARRAY_LEN(8188E, _MPCIE); @@ -375,9 +458,17 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter) if (IS_HARDWARE_TYPE_8821CE(pAdapter)) return GET_MASK_ARRAY_LEN(8821C, _MPCIE); #endif +#if defined(CONFIG_RTL8192F) + if (IS_HARDWARE_TYPE_8192FE(pAdapter)) + return GET_MASK_ARRAY_LEN(8192F, _MPCIE); +#endif +#if defined(CONFIG_RTL8822C) + if (IS_HARDWARE_TYPE_8822C(pAdapter)) + return GET_MASK_ARRAY_LEN(8822C, _MPCIE); +#endif +#endif /*CONFIG_PCI_HCI*/ - -#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE +#ifdef CONFIG_SDIO_HCI #if defined(CONFIG_RTL8188E) if (IS_HARDWARE_TYPE_8188E(pAdapter)) return GET_MASK_ARRAY_LEN(8188E, _MSDIO); @@ -390,6 +481,10 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter) if (IS_HARDWARE_TYPE_8188F(pAdapter)) return GET_MASK_ARRAY_LEN(8188F, _MSDIO); #endif +#if defined(CONFIG_RTL8188GTV) + if (IS_HARDWARE_TYPE_8188GTV(pAdapter)) + return GET_MASK_ARRAY_LEN(8188GTV, _MSDIO); +#endif #if defined(CONFIG_RTL8192E) if (IS_HARDWARE_TYPE_8192ES(pAdapter)) return GET_MASK_ARRAY_LEN(8192E, _MSDIO); @@ -406,7 +501,15 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter) if (IS_HARDWARE_TYPE_8822B(pAdapter)) return GET_MASK_ARRAY_LEN(8822B, _MSDIO); #endif +#if defined(CONFIG_RTL8192F) + if (IS_HARDWARE_TYPE_8192FS(pAdapter)) + return GET_MASK_ARRAY_LEN(8192F, _MSDIO); #endif +#if defined(CONFIG_RTL8822C) + if (IS_HARDWARE_TYPE_8822C(pAdapter)) + return GET_MASK_ARRAY_LEN(8822C, _MSDIO); +#endif +#endif/*CONFIG_SDIO_HCI*/ return 0; } @@ -437,7 +540,7 @@ u8 rtw_efuse_mask_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) u8 ret = _SUCCESS; u16 mapLen = 0; - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, _FALSE); ret = rtw_efuse_map_read(padapter, addr, cnts , data); @@ -562,11 +665,11 @@ void rtw_efuse_analyze(PADAPTER padapter, u8 Type, u8 Fake) RTW_INFO("\n\r 2Byte header, header[7:5]=offset[2:0], header[4:0]=0x0F\n"); RTW_INFO("\n\r 2Byte header, extHeader[7:4]=offset[6:3], extHeader[3:0]=word enable\n"); - EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, bPseudoTest); - EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_MAX_SECTION, (PVOID)&max_section, bPseudoTest); - EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_PROTECT_BYTES_BANK, (PVOID)&protectBytesBank, bPseudoTest); - EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_CONTENT_LEN_BANK, (PVOID)&efuse_max, bPseudoTest); - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&maprawlen, _FALSE); + EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, bPseudoTest); + EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest); + EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_PROTECT_BYTES_BANK, (void *)&protectBytesBank, bPseudoTest); + EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_CONTENT_LEN_BANK, (void *)&efuse_max, bPseudoTest); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&maprawlen, _FALSE); _rtw_memset(eFuseWord, 0xff, EFUSE_MAX_SECTION_NUM * (EFUSE_MAX_WORD_UNIT * 2)); _rtw_memset(pEfuseHal->fakeEfuseInitMap, 0xff, EFUSE_MAX_MAP_LEN); @@ -577,7 +680,7 @@ void rtw_efuse_analyze(PADAPTER padapter, u8 Type, u8 Fake) for (bank = startBank; bank <= endBank; bank++) { if (!hal_EfuseSwitchToBank(padapter, bank, bPseudoTest)) { RTW_INFO("EFUSE_SwitchToBank() Fail!!\n"); - return; + goto out_free_buffer; } eFuse_Addr = bank * EFUSE_MAX_BANK_SIZE; @@ -586,7 +689,7 @@ void rtw_efuse_analyze(PADAPTER padapter, u8 Type, u8 Fake) if (efuseHeader == 0xFF && bank == startBank && Fake != TRUE) { RTW_INFO("Non-PGed Efuse\n"); - return; + goto out_free_buffer; } RTW_INFO("EFUSE_REAL_CONTENT_LEN = %d\n", maprawlen); @@ -719,13 +822,15 @@ void rtw_efuse_analyze(PADAPTER padapter, u8 Type, u8 Fake) ); } _RTW_PRINT_SEL(RTW_DBGDUMP, "\n"); + +out_free_buffer: if (eFuseWord) rtw_mfree((u8 *)eFuseWord, EFUSE_MAX_SECTION_NUM * (EFUSE_MAX_WORD_UNIT * 2)); } -VOID efuse_PreUpdateAction( +void efuse_PreUpdateAction( PADAPTER pAdapter, - pu4Byte BackupRegs) + u32 *BackupRegs) { if (IS_HARDWARE_TYPE_8812AU(pAdapter) || IS_HARDWARE_TYPE_8822BU(pAdapter)) { /* <20131115, Kordan> Turn off Rx to prevent from being busy when writing the EFUSE. (Asked by Chunchu.)*/ @@ -752,9 +857,9 @@ VOID efuse_PreUpdateAction( } -VOID efuse_PostUpdateAction( +void efuse_PostUpdateAction( PADAPTER pAdapter, - pu4Byte BackupRegs) + u32 *BackupRegs) { if (IS_HARDWARE_TYPE_8812AU(pAdapter) || IS_HARDWARE_TYPE_8822BU(pAdapter)) { /* <20131115, Kordan> Turn on Rx and restore the registers. (Asked by Chunchu.)*/ @@ -768,6 +873,988 @@ VOID efuse_PostUpdateAction( } } + +#ifdef RTW_HALMAC +#include "../../hal/hal_halmac.h" + +void Efuse_PowerSwitch(PADAPTER adapter, u8 write, u8 pwrstate) +{ +} + +void BTEfuse_PowerSwitch(PADAPTER adapter, u8 write, u8 pwrstate) +{ +} + +u8 efuse_GetCurrentSize(PADAPTER adapter, u16 *size) +{ + *size = 0; + + return _FAIL; +} + +u16 efuse_GetMaxSize(PADAPTER adapter) +{ + struct dvobj_priv *d; + u32 size = 0; + int err; + + d = adapter_to_dvobj(adapter); + err = rtw_halmac_get_physical_efuse_size(d, &size); + if (err) + return 0; + + return size; +} + +u16 efuse_GetavailableSize(PADAPTER adapter) +{ + struct dvobj_priv *d; + u32 size = 0; + int err; + + d = adapter_to_dvobj(adapter); + err = rtw_halmac_get_available_efuse_size(d, &size); + if (err) + return 0; + + return size; +} + + +u8 efuse_bt_GetCurrentSize(PADAPTER adapter, u16 *usesize) +{ + u8 *efuse_map; + + *usesize = 0; + efuse_map = rtw_malloc(EFUSE_BT_MAP_LEN); + if (efuse_map == NULL) { + RTW_DBG("%s: malloc FAIL\n", __FUNCTION__); + return _FAIL; + } + + /* for get bt phy efuse last use byte */ + hal_ReadEFuse_BT_logic_map(adapter, 0x00, EFUSE_BT_MAP_LEN, efuse_map); + *usesize = fakeBTEfuseUsedBytes; + + if (efuse_map) + rtw_mfree(efuse_map, EFUSE_BT_MAP_LEN); + + return _SUCCESS; +} + +u16 efuse_bt_GetMaxSize(PADAPTER adapter) +{ + return EFUSE_BT_REAL_CONTENT_LEN; +} + +void EFUSE_GetEfuseDefinition(PADAPTER adapter, u8 efusetype, u8 type, void *out, BOOLEAN test) +{ + struct dvobj_priv *d; + u32 v32 = 0; + + + d = adapter_to_dvobj(adapter); + + if (adapter->hal_func.EFUSEGetEfuseDefinition) { + adapter->hal_func.EFUSEGetEfuseDefinition(adapter, efusetype, type, out, test); + return; + } + + if (EFUSE_WIFI == efusetype) { + switch (type) { + case TYPE_EFUSE_MAP_LEN: + rtw_halmac_get_logical_efuse_size(d, &v32); + *(u16 *)out = (u16)v32; + return; + + case TYPE_EFUSE_REAL_CONTENT_LEN: + rtw_halmac_get_physical_efuse_size(d, &v32); + *(u16 *)out = (u16)v32; + return; + } + } else if (EFUSE_BT == efusetype) { + switch (type) { + case TYPE_EFUSE_MAP_LEN: + *(u16 *)out = EFUSE_BT_MAP_LEN; + return; + + case TYPE_EFUSE_REAL_CONTENT_LEN: + *(u16 *)out = EFUSE_BT_REAL_CONTENT_LEN; + return; + } + } +} + +/* + * read/write raw efuse data + */ +u8 rtw_efuse_access(PADAPTER adapter, u8 write, u16 addr, u16 cnts, u8 *data) +{ + struct dvobj_priv *d; + u8 *efuse = NULL; + u32 size, i; + int err; + + + d = adapter_to_dvobj(adapter); + err = rtw_halmac_get_physical_efuse_size(d, &size); + if (err){ + size = EFUSE_MAX_SIZE; + RTW_INFO(" physical_efuse_size err size %d\n", size); + } + + if ((addr + cnts) > size) + return _FAIL; + + if (_TRUE == write) { + err = rtw_halmac_write_physical_efuse(d, addr, cnts, data); + if (err) + return _FAIL; + } else { + if (cnts > 16) + efuse = rtw_zmalloc(size); + + if (efuse) { + err = rtw_halmac_read_physical_efuse_map(d, efuse, size); + if (err) { + rtw_mfree(efuse, size); + return _FAIL; + } + + _rtw_memcpy(data, efuse + addr, cnts); + rtw_mfree(efuse, size); + } else { + err = rtw_halmac_read_physical_efuse(d, addr, cnts, data); + if (err) + return _FAIL; + } + } + + return _SUCCESS; +} + +static inline void dump_buf(u8 *buf, u32 len) +{ + u32 i; + + RTW_INFO("-----------------Len %d----------------\n", len); + for (i = 0; i < len; i++) + printk("%2.2x-", *(buf + i)); + printk("\n"); +} + +/* + * read/write raw efuse data + */ +u8 rtw_efuse_bt_access(PADAPTER adapter, u8 write, u16 addr, u16 cnts, u8 *data) +{ + struct dvobj_priv *d; + u8 *efuse = NULL; + u32 size, i; + int err = _FAIL; + + + d = adapter_to_dvobj(adapter); + + size = EFUSE_BT_REAL_CONTENT_LEN; + + if ((addr + cnts) > size) + return _FAIL; + + if (_TRUE == write) { + err = rtw_halmac_write_bt_physical_efuse(d, addr, cnts, data); + if (err == -1) { + RTW_ERR("%s: rtw_halmac_write_bt_physical_efuse fail!\n", __FUNCTION__); + return _FAIL; + } + RTW_INFO("%s: rtw_halmac_write_bt_physical_efuse OK! data 0x%x\n", __FUNCTION__, *data); + } else { + efuse = rtw_zmalloc(size); + + if (efuse) { + err = rtw_halmac_read_bt_physical_efuse_map(d, efuse, size); + + if (err == -1) { + RTW_ERR("%s: rtw_halmac_read_bt_physical_efuse_map fail!\n", __FUNCTION__); + rtw_mfree(efuse, size); + return _FAIL; + } + dump_buf(efuse + addr, cnts); + + _rtw_memcpy(data, efuse + addr, cnts); + + RTW_INFO("%s: rtw_halmac_read_bt_physical_efuse_map ok! data 0x%x\n", __FUNCTION__, *data); + rtw_mfree(efuse, size); + } + } + + return _SUCCESS; +} + +u8 rtw_efuse_map_read(PADAPTER adapter, u16 addr, u16 cnts, u8 *data) +{ + struct dvobj_priv *d; + u8 *efuse = NULL; + u32 size, i; + int err; + u32 backupRegs[4] = {0}; + u8 status = _SUCCESS; + + efuse_PreUpdateAction(adapter, backupRegs); + + d = adapter_to_dvobj(adapter); + err = rtw_halmac_get_logical_efuse_size(d, &size); + if (err) { + status = _FAIL; + goto exit; + } + /* size error handle */ + if ((addr + cnts) > size) { + if (addr < size) + cnts = size - addr; + else { + status = _FAIL; + goto exit; + } + } + + if (cnts > 16) + efuse = rtw_zmalloc(size); + + if (efuse) { + err = rtw_halmac_read_logical_efuse_map(d, efuse, size, NULL, 0); + if (err) { + rtw_mfree(efuse, size); + status = _FAIL; + goto exit; + } + + _rtw_memcpy(data, efuse + addr, cnts); + rtw_mfree(efuse, size); + } else { + err = rtw_halmac_read_logical_efuse(d, addr, cnts, data); + if (err) { + status = _FAIL; + goto exit; + } + } + status = _SUCCESS; +exit: + efuse_PostUpdateAction(adapter, backupRegs); + + return status; +} + +u8 rtw_efuse_map_write(PADAPTER adapter, u16 addr, u16 cnts, u8 *data) +{ + struct dvobj_priv *d; + u8 *efuse = NULL; + u32 size, i; + int err; + u8 mask_buf[64] = ""; + u16 mask_len = sizeof(u8) * rtw_get_efuse_mask_arraylen(adapter); + u32 backupRegs[4] = {0}; + u8 status = _SUCCESS;; + + efuse_PreUpdateAction(adapter, backupRegs); + + d = adapter_to_dvobj(adapter); + err = rtw_halmac_get_logical_efuse_size(d, &size); + if (err) { + status = _FAIL; + goto exit; + } + + if ((addr + cnts) > size) { + status = _FAIL; + goto exit; + } + + efuse = rtw_zmalloc(size); + if (!efuse) { + status = _FAIL; + goto exit; + } + + err = rtw_halmac_read_logical_efuse_map(d, efuse, size, NULL, 0); + if (err) { + rtw_mfree(efuse, size); + status = _FAIL; + goto exit; + } + + _rtw_memcpy(efuse + addr, data, cnts); + + if (adapter->registrypriv.boffefusemask == 0) { + RTW_INFO("Use mask Array Len: %d\n", mask_len); + + if (mask_len != 0) { + if (adapter->registrypriv.bFileMaskEfuse == _TRUE) + _rtw_memcpy(mask_buf, maskfileBuffer, mask_len); + else + rtw_efuse_mask_array(adapter, mask_buf); + + err = rtw_halmac_write_logical_efuse_map(d, efuse, size, mask_buf, mask_len); + } else + err = rtw_halmac_write_logical_efuse_map(d, efuse, size, NULL, 0); + } else { + _rtw_memset(mask_buf, 0xFF, sizeof(mask_buf)); + RTW_INFO("Efuse mask off\n"); + err = rtw_halmac_write_logical_efuse_map(d, efuse, size, mask_buf, size/16); + } + + if (err) { + rtw_mfree(efuse, size); + status = _FAIL; + goto exit; + } + + rtw_mfree(efuse, size); + status = _SUCCESS; +exit : + efuse_PostUpdateAction(adapter, backupRegs); + + return status; +} + +int Efuse_PgPacketRead(PADAPTER adapter, u8 offset, u8 *data, BOOLEAN test) +{ + return _FALSE; +} + +int Efuse_PgPacketWrite(PADAPTER adapter, u8 offset, u8 word_en, u8 *data, BOOLEAN test) +{ + return _FALSE; +} + +u8 rtw_BT_efuse_map_read(PADAPTER adapter, u16 addr, u16 cnts, u8 *data) +{ + hal_ReadEFuse_BT_logic_map(adapter,addr, cnts, data); + + return _SUCCESS; +} + +u8 rtw_BT_efuse_map_write(PADAPTER adapter, u16 addr, u16 cnts, u8 *data) +{ +#define RT_ASSERT_RET(expr) \ + if (!(expr)) { \ + printk("Assertion failed! %s at ......\n", #expr); \ + printk(" ......%s,%s, line=%d\n",__FILE__, __FUNCTION__, __LINE__); \ + return _FAIL; \ + } + + u8 offset, word_en; + u8 *map; + u8 newdata[PGPKT_DATA_SIZE]; + s32 i = 0, j = 0, idx; + u8 ret = _SUCCESS; + u16 mapLen = 1024; + + if ((addr + cnts) > mapLen) + return _FAIL; + + RT_ASSERT_RET(PGPKT_DATA_SIZE == 8); /* have to be 8 byte alignment */ + RT_ASSERT_RET((mapLen & 0x7) == 0); /* have to be PGPKT_DATA_SIZE alignment for memcpy */ + + map = rtw_zmalloc(mapLen); + if (map == NULL) + return _FAIL; + + ret = rtw_BT_efuse_map_read(adapter, 0, mapLen, map); + if (ret == _FAIL) + goto exit; + RTW_INFO("OFFSET\tVALUE(hex)\n"); + for (i = 0; i < mapLen; i += 16) { /* set 512 because the iwpriv's extra size have limit 0x7FF */ + RTW_INFO("0x%03x\t", i); + for (j = 0; j < 8; j++) + RTW_INFO("%02X ", map[i + j]); + RTW_INFO("\t"); + for (; j < 16; j++) + RTW_INFO("%02X ", map[i + j]); + RTW_INFO("\n"); + } + RTW_INFO("\n"); + + idx = 0; + offset = (addr >> 3); + while (idx < cnts) { + word_en = 0xF; + j = (addr + idx) & 0x7; + _rtw_memcpy(newdata, &map[offset << 3], PGPKT_DATA_SIZE); + for (i = j; i < PGPKT_DATA_SIZE && idx < cnts; i++, idx++) { + if (data[idx] != map[addr + idx]) { + word_en &= ~BIT(i >> 1); + newdata[i] = data[idx]; + } + } + + if (word_en != 0xF) { + ret = EfusePgPacketWrite_BT(adapter, offset, word_en, newdata, _FALSE); + RTW_INFO("offset=%x\n", offset); + RTW_INFO("word_en=%x\n", word_en); + RTW_INFO("%s: data=", __FUNCTION__); + for (i = 0; i < PGPKT_DATA_SIZE; i++) + RTW_INFO("0x%02X ", newdata[i]); + RTW_INFO("\n"); + if (ret == _FAIL) + break; + } + offset++; + } +exit: + rtw_mfree(map, mapLen); + return _SUCCESS; +} + +void hal_ReadEFuse_BT_logic_map( + PADAPTER padapter, + u16 _offset, + u16 _size_byte, + u8 *pbuf +) +{ + + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; + + u8 *efuseTbl, *phyefuse; + u8 bank; + u16 eFuse_Addr = 0; + u8 efuseHeader, efuseExtHdr, efuseData; + u8 offset, wden; + u16 i, total, used; + u8 efuse_usage; + + + /* */ + /* Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */ + /* */ + if ((_offset + _size_byte) > EFUSE_BT_MAP_LEN) { + RTW_INFO("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __FUNCTION__, _offset, _size_byte); + return; + } + + efuseTbl = rtw_malloc(EFUSE_BT_MAP_LEN); + phyefuse = rtw_malloc(EFUSE_BT_REAL_CONTENT_LEN); + if (efuseTbl == NULL || phyefuse == NULL) { + RTW_INFO("%s: efuseTbl or phyefuse malloc fail!\n", __FUNCTION__); + goto exit; + } + + /* 0xff will be efuse default value instead of 0x00. */ + _rtw_memset(efuseTbl, 0xFF, EFUSE_BT_MAP_LEN); + _rtw_memset(phyefuse, 0xFF, EFUSE_BT_REAL_CONTENT_LEN); + + if (rtw_efuse_bt_access(padapter, _FALSE, 0, EFUSE_BT_REAL_CONTENT_LEN, phyefuse)) + dump_buf(phyefuse, EFUSE_BT_REAL_BANK_CONTENT_LEN); + + total = BANK_NUM; + for (bank = 1; bank <= total; bank++) { /* 8723d Max bake 0~2 */ + eFuse_Addr = 0; + + while (AVAILABLE_EFUSE_ADDR(eFuse_Addr)) { + /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest); */ + efuseHeader = phyefuse[eFuse_Addr++]; + + if (efuseHeader == 0xFF) + break; + RTW_INFO("%s: efuse[%#X]=0x%02x (header)\n", __FUNCTION__, (((bank - 1) * EFUSE_BT_REAL_CONTENT_LEN) + eFuse_Addr - 1), efuseHeader); + + /* Check PG header for section num. */ + if (EXT_HEADER(efuseHeader)) { /* extended header */ + offset = GET_HDR_OFFSET_2_0(efuseHeader); + RTW_INFO("%s: extended header offset_2_0=0x%X\n", __FUNCTION__, offset); + + /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); */ + efuseExtHdr = phyefuse[eFuse_Addr++]; + + RTW_INFO("%s: efuse[%#X]=0x%02x (ext header)\n", __FUNCTION__, (((bank - 1) * EFUSE_BT_REAL_CONTENT_LEN) + eFuse_Addr - 1), efuseExtHdr); + if (ALL_WORDS_DISABLED(efuseExtHdr)) + continue; + + offset |= ((efuseExtHdr & 0xF0) >> 1); + wden = (efuseExtHdr & 0x0F); + } else { + offset = ((efuseHeader >> 4) & 0x0f); + wden = (efuseHeader & 0x0f); + } + + if (offset < EFUSE_BT_MAX_SECTION) { + u16 addr; + + /* Get word enable value from PG header */ + RTW_INFO("%s: Offset=%d Worden=%#X\n", __FUNCTION__, offset, wden); + + addr = offset * PGPKT_DATA_SIZE; + for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { + /* Check word enable condition in the section */ + if (!(wden & (0x01 << i))) { + efuseData = 0; + /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); */ + efuseData = phyefuse[eFuse_Addr++]; + + RTW_INFO("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr - 1, efuseData); + efuseTbl[addr] = efuseData; + + efuseData = 0; + /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); */ + efuseData = phyefuse[eFuse_Addr++]; + + RTW_INFO("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr - 1, efuseData); + efuseTbl[addr + 1] = efuseData; + } + addr += 2; + } + } else { + RTW_INFO("%s: offset(%d) is illegal!!\n", __FUNCTION__, offset); + eFuse_Addr += Efuse_CalculateWordCnts(wden) * 2; + } + } + + if ((eFuse_Addr - 1) < total) { + RTW_INFO("%s: bank(%d) data end at %#x\n", __FUNCTION__, bank, eFuse_Addr - 1); + break; + } + } + + /* switch bank back to bank 0 for later BT and wifi use. */ + //hal_EfuseSwitchToBank(padapter, 0, bPseudoTest); + + /* Copy from Efuse map to output pointer memory!!! */ + for (i = 0; i < _size_byte; i++) + pbuf[i] = efuseTbl[_offset + i]; + /* Calculate Efuse utilization */ + total = EFUSE_BT_REAL_BANK_CONTENT_LEN; + + used = eFuse_Addr - 1; + + if (total) + efuse_usage = (u8)((used * 100) / total); + else + efuse_usage = 100; + + fakeBTEfuseUsedBytes = used; + RTW_INFO("%s: BTEfuseUsed last Bytes = %#x\n", __FUNCTION__, fakeBTEfuseUsedBytes); + +exit: + if (efuseTbl) + rtw_mfree(efuseTbl, EFUSE_BT_MAP_LEN); + if (phyefuse) + rtw_mfree(phyefuse, EFUSE_BT_REAL_BANK_CONTENT_LEN); +} + + +static u8 hal_EfusePartialWriteCheck( + PADAPTER padapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + u8 bPseudoTest) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; + u8 bRet = _FALSE; + u16 startAddr = 0, efuse_max_available_len = EFUSE_BT_REAL_BANK_CONTENT_LEN, efuse_max = EFUSE_BT_REAL_BANK_CONTENT_LEN; + u8 efuse_data = 0; + + startAddr = (u16)fakeBTEfuseUsedBytes; + + startAddr %= efuse_max; + RTW_INFO("%s: startAddr=%#X\n", __FUNCTION__, startAddr); + + while (1) { + if (startAddr >= efuse_max_available_len) { + bRet = _FALSE; + RTW_INFO("%s: startAddr(%d) >= efuse_max_available_len(%d)\n", + __FUNCTION__, startAddr, efuse_max_available_len); + break; + } + if (rtw_efuse_bt_access(padapter, _FALSE, startAddr, 1, &efuse_data)&& (efuse_data != 0xFF)) { + bRet = _FALSE; + RTW_INFO("%s: Something Wrong! last bytes(%#X=0x%02X) is not 0xFF\n", + __FUNCTION__, startAddr, efuse_data); + break; + } else { + /* not used header, 0xff */ + *pAddr = startAddr; + /* RTW_INFO("%s: Started from unused header offset=%d\n", __FUNCTION__, startAddr)); */ + bRet = _TRUE; + break; + } + } + + return bRet; +} + + +static u8 hal_EfusePgPacketWrite2ByteHeader( + PADAPTER padapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + u8 bPseudoTest) +{ + u16 efuse_addr, efuse_max_available_len = EFUSE_BT_REAL_BANK_CONTENT_LEN; + u8 pg_header = 0, tmp_header = 0; + u8 repeatcnt = 0; + + /* RTW_INFO("%s\n", __FUNCTION__); */ + + efuse_addr = *pAddr; + if (efuse_addr >= efuse_max_available_len) { + RTW_INFO("%s: addr(%d) over avaliable(%d)!!\n", __FUNCTION__, efuse_addr, efuse_max_available_len); + return _FALSE; + } + + pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; + /* RTW_INFO("%s: pg_header=0x%x\n", __FUNCTION__, pg_header); */ + + do { + + rtw_efuse_bt_access(padapter, _TRUE, efuse_addr, 1, &pg_header); + rtw_efuse_bt_access(padapter, _FALSE, efuse_addr, 1, &tmp_header); + + if (tmp_header != 0xFF) + break; + if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { + RTW_INFO("%s: Repeat over limit for pg_header!!\n", __FUNCTION__); + return _FALSE; + } + } while (1); + + if (tmp_header != pg_header) { + RTW_ERR("%s: PG Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header); + return _FALSE; + } + + /* to write ext_header */ + efuse_addr++; + pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en; + + do { + rtw_efuse_bt_access(padapter, _TRUE, efuse_addr, 1, &pg_header); + rtw_efuse_bt_access(padapter, _FALSE, efuse_addr, 1, &tmp_header); + + if (tmp_header != 0xFF) + break; + if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { + RTW_INFO("%s: Repeat over limit for ext_header!!\n", __FUNCTION__); + return _FALSE; + } + } while (1); + + if (tmp_header != pg_header) { /* offset PG fail */ + RTW_ERR("%s: PG EXT Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header); + return _FALSE; + } + + *pAddr = efuse_addr; + + return _TRUE; +} + + +static u8 hal_EfusePgPacketWrite1ByteHeader( + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + u8 bPseudoTest) +{ + u8 bRet = _FALSE; + u8 pg_header = 0, tmp_header = 0; + u16 efuse_addr = *pAddr; + u8 repeatcnt = 0; + + + /* RTW_INFO("%s\n", __FUNCTION__); */ + pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en; + + do { + rtw_efuse_bt_access(pAdapter, _TRUE, efuse_addr, 1, &pg_header); + rtw_efuse_bt_access(pAdapter, _FALSE, efuse_addr, 1, &tmp_header); + + if (tmp_header != 0xFF) + break; + if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { + RTW_INFO("%s: Repeat over limit for pg_header!!\n", __FUNCTION__); + return _FALSE; + } + } while (1); + + if (tmp_header != pg_header) { + RTW_ERR("%s: PG Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header); + return _FALSE; + } + + *pAddr = efuse_addr; + + return _TRUE; +} + +static u8 hal_EfusePgPacketWriteHeader( + PADAPTER padapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + u8 bPseudoTest) +{ + u8 bRet = _FALSE; + + if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) + bRet = hal_EfusePgPacketWrite2ByteHeader(padapter, efuseType, pAddr, pTargetPkt, bPseudoTest); + else + bRet = hal_EfusePgPacketWrite1ByteHeader(padapter, efuseType, pAddr, pTargetPkt, bPseudoTest); + + return bRet; +} + + +static u8 +Hal_EfuseWordEnableDataWrite( + PADAPTER padapter, + u16 efuse_addr, + u8 word_en, + u8 *data, + u8 bPseudoTest) +{ + u16 tmpaddr = 0; + u16 start_addr = efuse_addr; + u8 badworden = 0x0F; + u8 tmpdata[PGPKT_DATA_SIZE]; + + + /* RTW_INFO("%s: efuse_addr=%#x word_en=%#x\n", __FUNCTION__, efuse_addr, word_en); */ + _rtw_memset(tmpdata, 0xFF, PGPKT_DATA_SIZE); + + if (!(word_en & BIT(0))) { + tmpaddr = start_addr; + rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[0]); + rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[1]); + rtw_efuse_bt_access(padapter, _FALSE, tmpaddr, 1, &tmpdata[0]); + rtw_efuse_bt_access(padapter, _FALSE, tmpaddr + 1, 1, &tmpdata[1]); + if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1])) + badworden &= (~BIT(0)); + } + if (!(word_en & BIT(1))) { + tmpaddr = start_addr; + rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[2]); + rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[3]); + rtw_efuse_bt_access(padapter, _FALSE, tmpaddr, 1, &tmpdata[2]); + rtw_efuse_bt_access(padapter, _FALSE, tmpaddr + 1, 1, &tmpdata[3]); + if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3])) + badworden &= (~BIT(1)); + } + if (!(word_en & BIT(2))) { + tmpaddr = start_addr; + rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[4]); + rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[5]); + rtw_efuse_bt_access(padapter, _FALSE, tmpaddr, 1, &tmpdata[4]); + rtw_efuse_bt_access(padapter, _FALSE, tmpaddr + 1, 1, &tmpdata[5]); + if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5])) + badworden &= (~BIT(2)); + } + if (!(word_en & BIT(3))) { + tmpaddr = start_addr; + rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[6]); + rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[7]); + rtw_efuse_bt_access(padapter, _FALSE, tmpaddr, 1, &tmpdata[6]); + rtw_efuse_bt_access(padapter, _FALSE, tmpaddr + 1, 1, &tmpdata[7]); + + if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7])) + badworden &= (~BIT(3)); + } + + return badworden; +} + +static void +hal_EfuseConstructPGPkt( + u8 offset, + u8 word_en, + u8 *pData, + PPGPKT_STRUCT pTargetPkt) +{ + _rtw_memset(pTargetPkt->data, 0xFF, PGPKT_DATA_SIZE); + pTargetPkt->offset = offset; + pTargetPkt->word_en = word_en; + efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data); + pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); +} + +static u8 +hal_EfusePgPacketWriteData( + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + u8 bPseudoTest) +{ + u16 efuse_addr; + u8 badworden; + + efuse_addr = *pAddr; + badworden = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr + 1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); + if (badworden != 0x0F) { + RTW_INFO("%s: Fail!!\n", __FUNCTION__); + return _FALSE; + } else + RTW_INFO("%s: OK!!\n", __FUNCTION__); + + return _TRUE; +} + +u8 efuse_OneByteRead(struct _ADAPTER *a, u16 addr, u8 *data, u8 bPseudoTest) +{ + struct dvobj_priv *d; + int err; + u8 ret = _TRUE; + + d = adapter_to_dvobj(a); + err = rtw_halmac_read_physical_efuse(d, addr, 1, data); + if (err) { + RTW_ERR("%s: addr=0x%x FAIL!!!\n", __FUNCTION__, addr); + ret = _FALSE; + } + + return ret; + +} + +static u16 +hal_EfuseGetCurrentSize_BT( + PADAPTER padapter, + u8 bPseudoTest) +{ +#ifdef HAL_EFUSE_MEMORY + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; +#endif + u16 btusedbytes; + u16 efuse_addr; + u8 bank, startBank; + u8 hoffset = 0, hworden = 0; + u8 efuse_data, word_cnts = 0; + u16 retU2 = 0; + u8 bContinual = _TRUE; + + + btusedbytes = fakeBTEfuseUsedBytes; + + efuse_addr = (u16)((btusedbytes % EFUSE_BT_REAL_BANK_CONTENT_LEN)); + startBank = (u8)(1 + (btusedbytes / EFUSE_BT_REAL_BANK_CONTENT_LEN)); + + RTW_INFO("%s: start from bank=%d addr=0x%X\n", __FUNCTION__, startBank, efuse_addr); + retU2 = EFUSE_BT_REAL_CONTENT_LEN - EFUSE_PROTECT_BYTES_BANK; + + for (bank = startBank; bank < 3; bank++) { + if (hal_EfuseSwitchToBank(padapter, bank, bPseudoTest) == _FALSE) { + RTW_ERR("%s: switch bank(%d) Fail!!\n", __FUNCTION__, bank); + /* bank = EFUSE_MAX_BANK; */ + break; + } + + /* only when bank is switched we have to reset the efuse_addr. */ + if (bank != startBank) + efuse_addr = 0; + + + while (AVAILABLE_EFUSE_ADDR(efuse_addr)) { + if (rtw_efuse_bt_access(padapter, _FALSE, efuse_addr, 1, &efuse_data) == _FALSE) { + RTW_ERR("%s: efuse_OneByteRead Fail! addr=0x%X !!\n", __FUNCTION__, efuse_addr); + /* bank = EFUSE_MAX_BANK; */ + break; + } + RTW_INFO("%s: efuse_OneByteRead ! addr=0x%X !efuse_data=0x%X! bank =%d\n", __FUNCTION__, efuse_addr, efuse_data, bank); + + if (efuse_data == 0xFF) + break; + + if (EXT_HEADER(efuse_data)) { + hoffset = GET_HDR_OFFSET_2_0(efuse_data); + efuse_addr++; + rtw_efuse_bt_access(padapter, _FALSE, efuse_addr, 1, &efuse_data); + RTW_INFO("%s: efuse_OneByteRead EXT_HEADER ! addr=0x%X !efuse_data=0x%X! bank =%d\n", __FUNCTION__, efuse_addr, efuse_data, bank); + + if (ALL_WORDS_DISABLED(efuse_data)) { + efuse_addr++; + continue; + } + + /* hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); */ + hoffset |= ((efuse_data & 0xF0) >> 1); + hworden = efuse_data & 0x0F; + } else { + hoffset = (efuse_data >> 4) & 0x0F; + hworden = efuse_data & 0x0F; + } + + RTW_INFO(FUNC_ADPT_FMT": Offset=%d Worden=%#X\n", + FUNC_ADPT_ARG(padapter), hoffset, hworden); + + word_cnts = Efuse_CalculateWordCnts(hworden); + /* read next header */ + efuse_addr += (word_cnts * 2) + 1; + } + /* Check if we need to check next bank efuse */ + if (efuse_addr < retU2) + break;/* don't need to check next bank. */ + } + retU2 = ((bank - 1) * EFUSE_BT_REAL_BANK_CONTENT_LEN) + efuse_addr; + + fakeBTEfuseUsedBytes = retU2; + RTW_INFO("%s: CurrentSize=%d\n", __FUNCTION__, retU2); + return retU2; +} + + +static u8 +hal_BT_EfusePgCheckAvailableAddr( + PADAPTER pAdapter, + u8 bPseudoTest) +{ + u16 max_available = EFUSE_BT_REAL_CONTENT_LEN - EFUSE_PROTECT_BYTES_BANK; + u16 current_size = 0; + + RTW_INFO("%s: max_available=%d\n", __FUNCTION__, max_available); + current_size = hal_EfuseGetCurrentSize_BT(pAdapter, bPseudoTest); + if (current_size >= max_available) { + RTW_INFO("%s: Error!! current_size(%d)>max_available(%d)\n", __FUNCTION__, current_size, max_available); + return _FALSE; + } + return _TRUE; +} + +u8 EfusePgPacketWrite_BT( + PADAPTER pAdapter, + u8 offset, + u8 word_en, + u8 *pData, + u8 bPseudoTest) +{ + PGPKT_STRUCT targetPkt; + u16 startAddr = 0; + u8 efuseType = EFUSE_BT; + + if (!hal_BT_EfusePgCheckAvailableAddr(pAdapter, bPseudoTest)) + return _FALSE; + + hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); + + if (!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + if (!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + if (!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + return _TRUE; +} + + +#else /* !RTW_HALMAC */ /* ------------------------------------------------------------------------------ */ #define REG_EFUSE_CTRL 0x0030 #define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */ @@ -776,14 +1863,14 @@ VOID efuse_PostUpdateAction( BOOLEAN Efuse_Read1ByteFromFakeContent( - IN PADAPTER pAdapter, - IN u16 Offset, - IN OUT u8 *Value); + PADAPTER pAdapter, + u16 Offset, + u8 *Value); BOOLEAN Efuse_Read1ByteFromFakeContent( - IN PADAPTER pAdapter, - IN u16 Offset, - IN OUT u8 *Value) + PADAPTER pAdapter, + u16 Offset, + u8 *Value) { if (Offset >= EFUSE_MAX_HW_SIZE) return _FALSE; @@ -797,14 +1884,14 @@ Efuse_Read1ByteFromFakeContent( BOOLEAN Efuse_Write1ByteToFakeContent( - IN PADAPTER pAdapter, - IN u16 Offset, - IN u8 Value); + PADAPTER pAdapter, + u16 Offset, + u8 Value); BOOLEAN Efuse_Write1ByteToFakeContent( - IN PADAPTER pAdapter, - IN u16 Offset, - IN u8 Value) + PADAPTER pAdapter, + u16 Offset, + u8 Value) { if (Offset >= EFUSE_MAX_HW_SIZE) return _FALSE; @@ -833,20 +1920,20 @@ Efuse_Write1ByteToFakeContent( * 11/17/2008 MHC Create Version 0. * *---------------------------------------------------------------------------*/ -VOID +void Efuse_PowerSwitch( - IN PADAPTER pAdapter, - IN u8 bWrite, - IN u8 PwrState) + PADAPTER pAdapter, + u8 bWrite, + u8 PwrState) { pAdapter->hal_func.EfusePowerSwitch(pAdapter, bWrite, PwrState); } -VOID +void BTEfuse_PowerSwitch( - IN PADAPTER pAdapter, - IN u8 bWrite, - IN u8 PwrState) + PADAPTER pAdapter, + u8 bWrite, + u8 PwrState) { if (pAdapter->hal_func.BTEfusePowerSwitch) pAdapter->hal_func.BTEfusePowerSwitch(pAdapter, bWrite, PwrState); @@ -870,9 +1957,9 @@ BTEfuse_PowerSwitch( *---------------------------------------------------------------------------*/ u16 Efuse_GetCurrentSize( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN BOOLEAN bPseudoTest) + PADAPTER pAdapter, + u8 efuseType, + BOOLEAN bPseudoTest) { u16 ret = 0; @@ -892,12 +1979,12 @@ Efuse_GetCurrentSize( * * Created by Roger, 2008.10.21. * */ -VOID +void ReadEFuseByte( PADAPTER Adapter, u16 _offset, u8 *pbuf, - IN BOOLEAN bPseudoTest) + BOOLEAN bPseudoTest) { u32 value32; u8 readbyte; @@ -961,35 +2048,35 @@ ReadEFuseByte( * write addr must be after sec5. * */ -VOID +void efuse_ReadEFuse( PADAPTER Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, - IN BOOLEAN bPseudoTest + BOOLEAN bPseudoTest ); -VOID +void efuse_ReadEFuse( PADAPTER Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, - IN BOOLEAN bPseudoTest + BOOLEAN bPseudoTest ) { Adapter->hal_func.ReadEFuse(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); } -VOID +void EFUSE_GetEfuseDefinition( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u8 type, - OUT void *pOut, - IN BOOLEAN bPseudoTest + PADAPTER pAdapter, + u8 efuseType, + u8 type, + void *pOut, + BOOLEAN bPseudoTest ) { pAdapter->hal_func.EFUSEGetEfuseDefinition(pAdapter, efuseType, type, pOut, bPseudoTest); @@ -999,10 +2086,10 @@ EFUSE_GetEfuseDefinition( /* 11/16/2008 MH Read one byte from real Efuse. */ u8 efuse_OneByteRead( - IN PADAPTER pAdapter, - IN u16 addr, - IN u8 *data, - IN BOOLEAN bPseudoTest) + PADAPTER pAdapter, + u16 addr, + u8 *data, + BOOLEAN bPseudoTest) { u32 tmpidx = 0; u8 bResult; @@ -1017,6 +2104,14 @@ efuse_OneByteRead( return bResult; } +#ifdef CONFIG_RTL8710B + /* <20171208, Peter>, Dont do the following write16(0x34) */ + if (IS_HARDWARE_TYPE_8710B(pAdapter)) { + bResult = pAdapter->hal_func.efuse_indirect_read4(pAdapter, addr, data); + return bResult; + } +#endif + if (IS_HARDWARE_TYPE_8723B(pAdapter) || (IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->version_id))) || (IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->version_id)) @@ -1058,10 +2153,10 @@ efuse_OneByteRead( /* 11/16/2008 MH Write one byte to reald Efuse. */ u8 efuse_OneByteWrite( - IN PADAPTER pAdapter, - IN u16 addr, - IN u8 data, - IN BOOLEAN bPseudoTest) + PADAPTER pAdapter, + u16 addr, + u8 data, + BOOLEAN bPseudoTest) { u8 tmpidx = 0; u8 bResult = _FALSE; @@ -1129,10 +2224,10 @@ efuse_OneByteWrite( } int -Efuse_PgPacketRead(IN PADAPTER pAdapter, - IN u8 offset, - IN u8 *data, - IN BOOLEAN bPseudoTest) +Efuse_PgPacketRead(PADAPTER pAdapter, + u8 offset, + u8 *data, + BOOLEAN bPseudoTest) { int ret = 0; @@ -1142,11 +2237,11 @@ Efuse_PgPacketRead(IN PADAPTER pAdapter, } int -Efuse_PgPacketWrite(IN PADAPTER pAdapter, - IN u8 offset, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) +Efuse_PgPacketWrite(PADAPTER pAdapter, + u8 offset, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) { int ret; @@ -1157,11 +2252,11 @@ Efuse_PgPacketWrite(IN PADAPTER pAdapter, int -Efuse_PgPacketWrite_BT(IN PADAPTER pAdapter, - IN u8 offset, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) +Efuse_PgPacketWrite_BT(PADAPTER pAdapter, + u8 offset, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) { int ret; @@ -1172,11 +2267,11 @@ Efuse_PgPacketWrite_BT(IN PADAPTER pAdapter, u8 -Efuse_WordEnableDataWrite(IN PADAPTER pAdapter, - IN u16 efuse_addr, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) +Efuse_WordEnableDataWrite(PADAPTER pAdapter, + u16 efuse_addr, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) { u8 ret = 0; @@ -1207,8 +2302,8 @@ u8 rtw_efuse_access(PADAPTER padapter, u8 bWrite, u16 start_addr, u16 cnts, u8 * u32 backupRegs[4] = {0}; - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&real_content_len, _FALSE); - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&real_content_len, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, _FALSE); if (start_addr > real_content_len) return _FAIL; @@ -1248,7 +2343,7 @@ u16 efuse_GetMaxSize(PADAPTER padapter) u16 max_size; max_size = 0; - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_size, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_size, _FALSE); return max_size; } /* ------------------------------------------------------------------------------ */ @@ -1266,7 +2361,7 @@ u16 efuse_bt_GetMaxSize(PADAPTER padapter) u16 max_size; max_size = 0; - EFUSE_GetEfuseDefinition(padapter, EFUSE_BT , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_size, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_BT , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_size, _FALSE); return max_size; } @@ -1283,7 +2378,7 @@ u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) { u16 mapLen = 0; - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, _FALSE); if ((addr + cnts) > mapLen) return _FAIL; @@ -1301,7 +2396,7 @@ u8 rtw_BT_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) { u16 mapLen = 0; - EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, _FALSE); if ((addr + cnts) > mapLen) return _FAIL; @@ -1337,7 +2432,7 @@ u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, _FALSE); EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &efuse_max_available_len, _FALSE); if ((addr + cnts) > mapLen) @@ -1359,6 +2454,7 @@ u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) _rtw_memset(map, 0xFF, mapLen); ret = rtw_efuse_map_read(padapter, 0, mapLen, map); + if (ret == _FAIL) goto exit; @@ -1374,7 +2470,7 @@ u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) if (efuse_IsMasked(padapter, addr + i)) efuse[addr + i] = map[addr + i]; } - RTW_INFO("%s , data[%d] = %x, map[addr+i]= %x\n", __func__, addr + i, efuse[ addr + i], map[addr + i]); + RTW_INFO("%s ,Write data[%d] = %x, map[%d]= %x\n", __func__, addr + i, efuse[ addr + i], addr + i, map[addr + i]); } } /*Efuse_PowerSwitch(padapter, _TRUE, _TRUE);*/ @@ -1487,7 +2583,7 @@ u8 rtw_BT_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) u8 ret = _SUCCESS; u16 mapLen = 0; - EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, _FALSE); if ((addr + cnts) > mapLen) return _FAIL; @@ -1568,24 +2664,24 @@ exit: * 11/11/2008 MHC Create Version 0. * *---------------------------------------------------------------------------*/ -VOID +void Efuse_ReadAllMap( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN OUT u8 *Efuse, - IN BOOLEAN bPseudoTest); -VOID + PADAPTER pAdapter, + u8 efuseType, + u8 *Efuse, + BOOLEAN bPseudoTest); +void Efuse_ReadAllMap( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN OUT u8 *Efuse, - IN BOOLEAN bPseudoTest) + PADAPTER pAdapter, + u8 efuseType, + u8 *Efuse, + BOOLEAN bPseudoTest) { u16 mapLen = 0; Efuse_PowerSwitch(pAdapter, _FALSE, _TRUE); - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, bPseudoTest); + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, bPseudoTest); efuse_ReadEFuse(pAdapter, efuseType, 0, mapLen, Efuse, bPseudoTest); @@ -1611,17 +2707,17 @@ Efuse_ReadAllMap( * *---------------------------------------------------------------------------*/ #ifdef PLATFORM -static VOID +static void efuse_ShadowWrite1Byte( - IN PADAPTER pAdapter, - IN u16 Offset, - IN u8 Value); + PADAPTER pAdapter, + u16 Offset, + u8 Value); #endif /* PLATFORM */ -static VOID +static void efuse_ShadowWrite1Byte( - IN PADAPTER pAdapter, - IN u16 Offset, - IN u8 Value) + PADAPTER pAdapter, + u16 Offset, + u8 Value) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); @@ -1630,11 +2726,11 @@ efuse_ShadowWrite1Byte( } /* efuse_ShadowWrite1Byte */ /* ---------------Write Two Bytes */ -static VOID +static void efuse_ShadowWrite2Byte( - IN PADAPTER pAdapter, - IN u16 Offset, - IN u16 Value) + PADAPTER pAdapter, + u16 Offset, + u16 Value) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); @@ -1646,11 +2742,11 @@ efuse_ShadowWrite2Byte( } /* efuse_ShadowWrite1Byte */ /* ---------------Write Four Bytes */ -static VOID +static void efuse_ShadowWrite4Byte( - IN PADAPTER pAdapter, - IN u16 Offset, - IN u32 Value) + PADAPTER pAdapter, + u16 Offset, + u32 Value) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); @@ -1678,18 +2774,18 @@ efuse_ShadowWrite4Byte( * 11/12/2008 MHC Create Version 0. * *---------------------------------------------------------------------------*/ -VOID +void EFUSE_ShadowWrite( - IN PADAPTER pAdapter, - IN u8 Type, - IN u16 Offset, - IN OUT u32 Value); -VOID + PADAPTER pAdapter, + u8 Type, + u16 Offset, + u32 Value); +void EFUSE_ShadowWrite( - IN PADAPTER pAdapter, - IN u8 Type, - IN u16 Offset, - IN OUT u32 Value) + PADAPTER pAdapter, + u8 Type, + u16 Offset, + u32 Value) { #if (MP_DRIVER == 0) return; @@ -1707,32 +2803,7 @@ EFUSE_ShadowWrite( } /* EFUSE_ShadowWrite */ -VOID -Efuse_InitSomeVar( - IN PADAPTER pAdapter -); -VOID -Efuse_InitSomeVar( - IN PADAPTER pAdapter -) -{ - u8 i; - - _rtw_memset((PVOID)&fakeEfuseContent[0], 0xff, EFUSE_MAX_HW_SIZE); - _rtw_memset((PVOID)&fakeEfuseInitMap[0], 0xff, EFUSE_MAX_MAP_LEN); - _rtw_memset((PVOID)&fakeEfuseModifiedMap[0], 0xff, EFUSE_MAX_MAP_LEN); - - for (i = 0; i < EFUSE_MAX_BT_BANK; i++) - _rtw_memset((PVOID)&BTEfuseContent[i][0], 0xff, EFUSE_MAX_HW_SIZE); - _rtw_memset((PVOID)&BTEfuseInitMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN); - _rtw_memset((PVOID)&BTEfuseModifiedMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN); - - for (i = 0; i < EFUSE_MAX_BT_BANK; i++) - _rtw_memset((PVOID)&fakeBTEfuseContent[i][0], 0xff, EFUSE_MAX_HW_SIZE); - _rtw_memset((PVOID)&fakeBTEfuseInitMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN); - _rtw_memset((PVOID)&fakeBTEfuseModifiedMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN); -} - +#endif /* !RTW_HALMAC */ /*----------------------------------------------------------------------------- * Function: efuse_ShadowRead1Byte * efuse_ShadowRead2Byte @@ -1751,11 +2822,11 @@ Efuse_InitSomeVar( * 11/12/2008 MHC Create Version 0. * *---------------------------------------------------------------------------*/ -static VOID +static void efuse_ShadowRead1Byte( - IN PADAPTER pAdapter, - IN u16 Offset, - IN OUT u8 *Value) + PADAPTER pAdapter, + u16 Offset, + u8 *Value) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); @@ -1764,11 +2835,11 @@ efuse_ShadowRead1Byte( } /* EFUSE_ShadowRead1Byte */ /* ---------------Read Two Bytes */ -static VOID +static void efuse_ShadowRead2Byte( - IN PADAPTER pAdapter, - IN u16 Offset, - IN OUT u16 *Value) + PADAPTER pAdapter, + u16 Offset, + u16 *Value) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); @@ -1778,11 +2849,11 @@ efuse_ShadowRead2Byte( } /* EFUSE_ShadowRead2Byte */ /* ---------------Read Four Bytes */ -static VOID +static void efuse_ShadowRead4Byte( - IN PADAPTER pAdapter, - IN u16 Offset, - IN OUT u32 *Value) + PADAPTER pAdapter, + u16 Offset, + u32 *Value) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); @@ -1800,10 +2871,10 @@ efuse_ShadowRead4Byte( *---------------------------------------------------------------------------*/ void EFUSE_ShadowRead( - IN PADAPTER pAdapter, - IN u8 Type, - IN u16 Offset, - IN OUT u32 *Value) + PADAPTER pAdapter, + u8 Type, + u16 Offset, + u32 *Value) { if (Type == 1) efuse_ShadowRead1Byte(pAdapter, Offset, (u8 *)Value); @@ -1816,7 +2887,7 @@ EFUSE_ShadowRead( /* 11/16/2008 MH Add description. Get current efuse area enabled word!!. */ u8 -Efuse_CalculateWordCnts(IN u8 word_en) +Efuse_CalculateWordCnts(u8 word_en) { u8 word_cnts = 0; if (!(word_en & BIT(0))) @@ -1848,9 +2919,9 @@ Efuse_CalculateWordCnts(IN u8 word_en) * *---------------------------------------------------------------------------*/ void -efuse_WordEnableDataRead(IN u8 word_en, - IN u8 *sourdata, - IN u8 *targetdata) +efuse_WordEnableDataRead(u8 word_en, + u8 *sourdata, + u8 *targetdata) { if (!(word_en & BIT(0))) { targetdata[0] = sourdata[0]; @@ -1887,13 +2958,40 @@ efuse_WordEnableDataRead(IN u8 word_en, * *---------------------------------------------------------------------------*/ void EFUSE_ShadowMapUpdate( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN BOOLEAN bPseudoTest) + PADAPTER pAdapter, + u8 efuseType, + BOOLEAN bPseudoTest) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); u16 mapLen = 0; - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, bPseudoTest); +#ifdef RTW_HALMAC + u8 *efuse_map = NULL; + int err; + + + mapLen = EEPROM_MAX_SIZE; + efuse_map = pHalData->efuse_eeprom_data; + /* efuse default content is 0xFF */ + _rtw_memset(efuse_map, 0xFF, EEPROM_MAX_SIZE); + + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, bPseudoTest); + if (!mapLen) { + RTW_WARN("%s: fail to get efuse size!\n", __FUNCTION__); + mapLen = EEPROM_MAX_SIZE; + } + if (mapLen > EEPROM_MAX_SIZE) { + RTW_WARN("%s: size of efuse data(%d) is large than expected(%d)!\n", + __FUNCTION__, mapLen, EEPROM_MAX_SIZE); + mapLen = EEPROM_MAX_SIZE; + } + + if (pHalData->bautoload_fail_flag == _FALSE) { + err = rtw_halmac_read_logical_efuse_map(adapter_to_dvobj(pAdapter), efuse_map, mapLen, NULL, 0); + if (err) + RTW_ERR("%s: fail to get efuse map!\n", __FUNCTION__); + } +#else /* !RTW_HALMAC */ + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, bPseudoTest); if (pHalData->bautoload_fail_flag == _TRUE) _rtw_memset(pHalData->efuse_eeprom_data, 0xFF, mapLen); @@ -1910,6 +3008,10 @@ void EFUSE_ShadowMapUpdate( #endif } + /* PlatformMoveMemory((void *)&pHalData->EfuseMap[EFUSE_MODIFY_MAP][0], */ + /* (void *)&pHalData->EfuseMap[EFUSE_INIT_MAP][0], mapLen); */ +#endif /* !RTW_HALMAC */ + rtw_mask_map_read(pAdapter, 0x00, mapLen, pHalData->efuse_eeprom_data); rtw_dump_cur_efuse(pAdapter); @@ -2080,9 +3182,9 @@ u32 rtw_read_efuse_from_file(const char *path, u8 *buf, int map_size) goto exit; } - file_data = vmalloc(file_size); + file_data = rtw_vmalloc(file_size); if (!file_data) { - RTW_ERR("%s vmalloc(%d) fail\n", __func__, file_size); + RTW_ERR("%s rtw_vmalloc(%d) fail\n", __func__, file_size); goto exit; } @@ -2092,9 +3194,9 @@ u32 rtw_read_efuse_from_file(const char *path, u8 *buf, int map_size) goto exit; } - map = vmalloc(map_size); + map = rtw_vmalloc(map_size); if (!map) { - RTW_ERR("%s vmalloc(%d) fail\n", __func__, map_size); + RTW_ERR("%s rtw_vmalloc(%d) fail\n", __func__, map_size); goto exit; } _rtw_memset(map, 0xff, map_size); diff --git a/core/mesh/rtw_mesh.c b/core/mesh/rtw_mesh.c index c85207c..3997ce5 100644 --- a/core/mesh/rtw_mesh.c +++ b/core/mesh/rtw_mesh.c @@ -234,6 +234,258 @@ exit: return ret; } +void rtw_mesh_bss_peering_status(WLAN_BSSID_EX *bss, u8 *nop, u8 *accept) +{ + u8 *ie; + int ie_len; + + if (nop) + *nop = 0; + if (accept) + *accept = 0; + + ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len, + BSS_EX_TLV_IES_LEN(bss)); + if (!ie || ie_len != 7) + goto exit; + + if (nop) + *nop = GET_MESH_CONF_ELE_NUM_OF_PEERINGS(ie + 2); + if (accept) + *accept = GET_MESH_CONF_ELE_ACCEPT_PEERINGS(ie + 2); + +exit: + return; +} + +#if CONFIG_RTW_MESH_ACNODE_PREVENT +void rtw_mesh_update_scanned_acnode_status(_adapter *adapter, struct wlan_network *scanned) +{ + bool acnode; + u8 nop, accept; + + rtw_mesh_bss_peering_status(&scanned->network, &nop, &accept); + + acnode = !nop && accept; + + if (acnode && scanned->acnode_stime == 0) { + scanned->acnode_stime = rtw_get_current_time(); + if (scanned->acnode_stime == 0) + scanned->acnode_stime++; + } else if (!acnode) { + scanned->acnode_stime = 0; + scanned->acnode_notify_etime = 0; + } +} + +bool rtw_mesh_scanned_is_acnode_confirmed(_adapter *adapter, struct wlan_network *scanned) +{ + return scanned->acnode_stime + && rtw_get_passing_time_ms(scanned->acnode_stime) + > adapter->mesh_cfg.peer_sel_policy.acnode_conf_timeout_ms; +} + +static bool rtw_mesh_scanned_is_acnode_allow_notify(_adapter *adapter, struct wlan_network *scanned) +{ + return scanned->acnode_notify_etime + && rtw_time_after(scanned->acnode_notify_etime, rtw_get_current_time()); +} + +bool rtw_mesh_acnode_prevent_allow_sacrifice(_adapter *adapter) +{ + struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; + struct sta_priv *stapriv = &adapter->stapriv; + bool allow = 0; + + if (!mcfg->peer_sel_policy.acnode_prevent + || mcfg->max_peer_links <= 1 + || stapriv->asoc_list_cnt < mcfg->max_peer_links) + goto exit; + +#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST + if (rtw_mesh_cto_mgate_required(adapter)) + goto exit; +#endif + + allow = 1; + +exit: + return allow; +} + +static bool rtw_mesh_acnode_candidate_exist(_adapter *adapter) +{ + struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; + struct sta_priv *stapriv = &adapter->stapriv; + struct mlme_priv *mlme = &adapter->mlmepriv; + _queue *queue = &(mlme->scanned_queue); + _list *head, *list; + _irqL irqL; + struct wlan_network *scanned = NULL; + struct sta_info *sta = NULL; + bool need = 0; + + _enter_critical_bh(&(mlme->scanned_queue.lock), &irqL); + + head = get_list_head(queue); + list = get_next(head); + while (!rtw_end_of_queue_search(head, list)) { + scanned = LIST_CONTAINOR(list, struct wlan_network, list); + list = get_next(list); + + if (rtw_get_passing_time_ms(scanned->last_scanned) < mcfg->peer_sel_policy.scanr_exp_ms + && rtw_mesh_scanned_is_acnode_confirmed(adapter, scanned) + && (!mcfg->rssi_threshold || mcfg->rssi_threshold <= scanned->network.Rssi) + #if CONFIG_RTW_MACADDR_ACL + && rtw_access_ctrl(adapter, scanned->network.MacAddress) == _TRUE + #endif + && rtw_bss_is_candidate_mesh_peer(&mlme->cur_network.network, &scanned->network, 1, 1) + #if CONFIG_RTW_MESH_PEER_BLACKLIST + && !rtw_mesh_peer_blacklist_search(adapter, scanned->network.MacAddress) + #endif + #if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST + && rtw_mesh_cto_mgate_network_filter(adapter, scanned) + #endif + ) { + need = 1; + break; + } + } + + _exit_critical_bh(&(mlme->scanned_queue.lock), &irqL); + + return need; +} + +static int rtw_mesh_acnode_prevent_sacrifice_chk(_adapter *adapter, struct sta_info **sac, struct sta_info *com) +{ + struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; + int updated = 0; + + /* + * TODO: compare next_hop reference cnt of forwarding info + * don't sacrifice working next_hop or choose sta with least cnt + */ + + if (*sac == NULL) { + updated = 1; + goto exit; + } + +#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST + if (mcfg->peer_sel_policy.cto_mgate_require + && !mcfg->dot11MeshGateAnnouncementProtocol + ) { + if (IS_CTO_MGATE_CONF_TIMEOUT(com->plink)) { + if (!IS_CTO_MGATE_CONF_TIMEOUT((*sac)->plink)) { + /* blacklist > not blacklist */ + updated = 1; + goto exit; + } + } else if (!IS_CTO_MGATE_CONF_DISABLED(com->plink)) { + if (IS_CTO_MGATE_CONF_DISABLED((*sac)->plink)) { + /* confirming > disabled */ + updated = 1; + goto exit; + } + } + } +#endif + +exit: + if (updated) + *sac = com; + + return updated; +} + +struct sta_info *_rtw_mesh_acnode_prevent_pick_sacrifice(_adapter *adapter) +{ + struct sta_priv *stapriv = &adapter->stapriv; + _list *head, *list; + struct sta_info *sta, *sacrifice = NULL; + u8 nop; + + head = &stapriv->asoc_list; + list = get_next(head); + while (rtw_end_of_queue_search(head, list) == _FALSE) { + sta = LIST_CONTAINOR(list, struct sta_info, asoc_list); + list = get_next(list); + + if (!sta->plink || !sta->plink->scanned) { + rtw_warn_on(1); + continue; + } + + rtw_mesh_bss_peering_status(&sta->plink->scanned->network, &nop, NULL); + if (nop < 2) + continue; + + rtw_mesh_acnode_prevent_sacrifice_chk(adapter, &sacrifice, sta); + } + + return sacrifice; +} + +struct sta_info *rtw_mesh_acnode_prevent_pick_sacrifice(_adapter *adapter) +{ + struct sta_priv *stapriv = &adapter->stapriv; + struct sta_info *sacrifice = NULL; + + enter_critical_bh(&stapriv->asoc_list_lock); + + sacrifice = _rtw_mesh_acnode_prevent_pick_sacrifice(adapter); + + exit_critical_bh(&stapriv->asoc_list_lock); + + return sacrifice; +} + +static void rtw_mesh_acnode_rsvd_chk(_adapter *adapter) +{ + struct rtw_mesh_info *minfo = &adapter->mesh_info; + struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; + u8 acnode_rsvd = 0; + + if (rtw_mesh_acnode_prevent_allow_sacrifice(adapter) + && rtw_mesh_acnode_prevent_pick_sacrifice(adapter) + && rtw_mesh_acnode_candidate_exist(adapter)) + acnode_rsvd = 1; + + if (plink_ctl->acnode_rsvd != acnode_rsvd) { + plink_ctl->acnode_rsvd = acnode_rsvd; + RTW_INFO(FUNC_ADPT_FMT" acnode_rsvd = %d\n", FUNC_ADPT_ARG(adapter), plink_ctl->acnode_rsvd); + update_beacon(adapter, WLAN_EID_MESH_CONFIG, NULL, 1); + } +} + +static void rtw_mesh_acnode_set_notify_etime(_adapter *adapter, u8 *rframe_whdr) +{ + if (adapter->mesh_info.plink_ctl.acnode_rsvd) { + struct wlan_network *scanned = rtw_find_network(&adapter->mlmepriv.scanned_queue, get_addr2_ptr(rframe_whdr)); + + if (rtw_mesh_scanned_is_acnode_confirmed(adapter, scanned)) { + scanned->acnode_notify_etime = rtw_get_current_time() + + rtw_ms_to_systime(adapter->mesh_cfg.peer_sel_policy.acnode_notify_timeout_ms); + if (scanned->acnode_notify_etime == 0) + scanned->acnode_notify_etime++; + } + } +} + +void dump_mesh_acnode_prevent_settings(void *sel, _adapter *adapter) +{ + struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; + + RTW_PRINT_SEL(sel, "%-6s %-12s %-14s\n" + , "enable", "conf_timeout", "nofity_timeout"); + RTW_PRINT_SEL(sel, "%6u %12u %14u\n" + , peer_sel_policy->acnode_prevent + , peer_sel_policy->acnode_conf_timeout_ms + , peer_sel_policy->acnode_notify_timeout_ms); +} +#endif /* CONFIG_RTW_MESH_ACNODE_PREVENT */ + #if CONFIG_RTW_MESH_PEER_BLACKLIST int rtw_mesh_peer_blacklist_add(_adapter *adapter, const u8 *addr) { @@ -405,6 +657,7 @@ void rtw_chk_candidate_peer_notify(_adapter *adapter, struct wlan_network *scann struct rtw_mesh_info *minfo = &adapter->mesh_info; struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; + bool acnode = 0; if (IS_CH_WAITING(rfctl) && !IS_UNDER_CAC(rfctl)) goto exit; @@ -412,8 +665,16 @@ void rtw_chk_candidate_peer_notify(_adapter *adapter, struct wlan_network *scann if (plink_ctl->num >= RTW_MESH_MAX_PEER_CANDIDATES) goto exit; +#if CONFIG_RTW_MESH_ACNODE_PREVENT + if (plink_ctl->acnode_rsvd) { + acnode = rtw_mesh_scanned_is_acnode_confirmed(adapter, scanned); + if (acnode && !rtw_mesh_scanned_is_acnode_allow_notify(adapter, scanned)) + goto exit; + } +#endif + /* wpa_supplicant's auto peer will initiate peering when candidate peer is reported without max_peer_links consideration */ - if (plink_ctl->num >= mcfg->max_peer_links) + if (plink_ctl->num >= mcfg->max_peer_links + acnode ? 1 : 0) goto exit; if (rtw_get_passing_time_ms(scanned->last_scanned) >= mcfg->peer_sel_policy.scanr_exp_ms @@ -432,11 +693,20 @@ void rtw_chk_candidate_peer_notify(_adapter *adapter, struct wlan_network *scann ) goto exit; +#if CONFIG_RTW_MESH_ACNODE_PREVENT + if (acnode) { + scanned->acnode_notify_etime = 0; + RTW_INFO(FUNC_ADPT_FMT" acnode "MAC_FMT"\n" + , FUNC_ADPT_ARG(adapter), MAC_ARG(scanned->network.MacAddress)); + } +#endif + #ifdef CONFIG_IOCTL_CFG80211 rtw_cfg80211_notify_new_peer_candidate(adapter->rtw_wdev , scanned->network.MacAddress , BSS_EX_TLV_IES(&scanned->network) , BSS_EX_TLV_IES_LEN(&scanned->network) + , scanned->network.Rssi , GFP_ATOMIC ); #endif @@ -460,7 +730,7 @@ void rtw_mesh_peer_status_chk(_adapter *adapter) u8 cto_mgate, forwarding, mgate; #endif u8 flush; - char flush_list[NUM_STA]; + s8 flush_list[NUM_STA]; u8 flush_num = 0; int i; @@ -578,14 +848,19 @@ flush_add: exit_critical_bh(&(plink_ctl->lock)); - for (i = 0; i < flush_num; i++) { + if (flush_num) { u8 sta_addr[ETH_ALEN]; + u8 updated = _FALSE; - sta = rtw_get_stainfo_by_offset(stapriv, flush_list[i]); - _rtw_memcpy(sta_addr, sta->cmn.mac_addr, ETH_ALEN); + for (i = 0; i < flush_num; i++) { + sta = rtw_get_stainfo_by_offset(stapriv, flush_list[i]); + _rtw_memcpy(sta_addr, sta->cmn.mac_addr, ETH_ALEN); - ap_free_sta(adapter, sta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, _FALSE); - rtw_mesh_expire_peer(adapter, sta_addr); + updated |= ap_free_sta(adapter, sta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, _FALSE); + rtw_mesh_expire_peer(adapter, sta_addr); + } + + associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL); } #if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST @@ -593,6 +868,10 @@ flush_add: rtw_mesh_cto_mgate_blacklist_chk(adapter); #endif +#if CONFIG_RTW_MESH_ACNODE_PREVENT + rtw_mesh_acnode_rsvd_chk(adapter); +#endif + return; } @@ -650,10 +929,12 @@ u8 rtw_mesh_offch_candidate_accepted(_adapter *adapter) { struct rtw_mesh_info *minfo = &adapter->mesh_info; struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; - u8 ret; + u8 ret = 0; - ret = MLME_IS_MESH(adapter) - && check_fwstate(&adapter->mlmepriv, WIFI_ASOC_STATE) == _TRUE + if (!adapter->mesh_cfg.peer_sel_policy.offch_cand) + goto exit; + + ret = MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter) && (!plink_ctl->num || rtw_mesh_offch_cto_mgate_required(adapter)) ; @@ -662,12 +943,12 @@ u8 rtw_mesh_offch_candidate_accepted(_adapter *adapter) struct mi_state mstate_no_self; rtw_mi_status_no_self(adapter, &mstate_no_self); - if (MSTATE_STA_LD_NUM(&mstate_no_self) || MSTATE_AP_LD_NUM(&mstate_no_self) - || MSTATE_ADHOC_LD_NUM(&mstate_no_self) || MSTATE_MESH_LD_NUM(&mstate_no_self)) + if (MSTATE_STA_LD_NUM(&mstate_no_self)) ret = 0; } #endif +exit: return ret; } @@ -685,12 +966,15 @@ u8 rtw_mesh_select_operating_ch(_adapter *adapter) _irqL irqL; struct wlan_network *scanned = NULL; int i; + /* statistics for candidate accept peering */ + u8 cand_ap_cnt[MAX_CHANNEL_NUM] = {0}; + u8 max_cand_ap_ch = 0; + u8 max_cand_ap_cnt = 0; + /* statistics for candidate including not accept peering */ + u8 cand_cnt[MAX_CHANNEL_NUM] = {0}; u8 max_cand_ch = 0; u8 max_cand_cnt = 0; - for (i = 0; i < rfctl->max_chan_nums; i++) - rfctl->channel_set[i].mesh_candidate_cnt = 0; - _enter_critical_bh(&(mlme->scanned_queue.lock), &irqL); head = get_list_head(queue); @@ -704,7 +988,7 @@ u8 rtw_mesh_select_operating_ch(_adapter *adapter) #if CONFIG_RTW_MACADDR_ACL && rtw_access_ctrl(adapter, scanned->network.MacAddress) == _TRUE #endif - && rtw_bss_is_candidate_mesh_peer(&mlme->cur_network.network, &scanned->network, 0, 1) + && rtw_bss_is_candidate_mesh_peer(&mlme->cur_network.network, &scanned->network, 0, 0) #if CONFIG_RTW_MESH_PEER_BLACKLIST && !rtw_mesh_peer_blacklist_search(adapter, scanned->network.MacAddress) #endif @@ -717,18 +1001,38 @@ u8 rtw_mesh_select_operating_ch(_adapter *adapter) if (ch_set_idx >= 0 && !CH_IS_NON_OCP(&rfctl->channel_set[ch_set_idx]) ) { - rfctl->channel_set[ch_set_idx].mesh_candidate_cnt++; - if (max_cand_cnt < rfctl->channel_set[ch_set_idx].mesh_candidate_cnt) { - max_cand_cnt = rfctl->channel_set[ch_set_idx].mesh_candidate_cnt; + u8 nop, accept; + + rtw_mesh_bss_peering_status(&scanned->network, &nop, &accept); + cand_cnt[ch_set_idx]++; + if (max_cand_cnt < cand_cnt[ch_set_idx]) { + max_cand_cnt = cand_cnt[ch_set_idx]; max_cand_ch = rfctl->channel_set[ch_set_idx].ChannelNum; } + if (accept) { + cand_ap_cnt[ch_set_idx]++; + if (max_cand_ap_cnt < cand_ap_cnt[ch_set_idx]) { + max_cand_ap_cnt = cand_ap_cnt[ch_set_idx]; + max_cand_ap_ch = rfctl->channel_set[ch_set_idx].ChannelNum; + } + } } } } _exit_critical_bh(&(mlme->scanned_queue.lock), &irqL); - return max_cand_ch; + return max_cand_ap_ch ? max_cand_ap_ch : max_cand_ch; +} + +void dump_mesh_offch_cand_settings(void *sel, _adapter *adapter) +{ + struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; + + RTW_PRINT_SEL(sel, "%-6s %-11s\n" + , "enable", "find_int_ms"); + RTW_PRINT_SEL(sel, "%6u %11u\n" + , peer_sel_policy->offch_cand, peer_sel_policy->offch_find_int_ms); } #endif /* CONFIG_RTW_MESH_OFFCH_CAND */ @@ -736,36 +1040,24 @@ void dump_mesh_peer_sel_policy(void *sel, _adapter *adapter) { struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; -#if CONFIG_RTW_MESH_OFFCH_CAND -#define OFFCH_CAND_TITLE_FMT " %-17s" -#define OFFCH_CAND_VALUE_FMT " %17u" -#define OFFCH_CAND_TITLE_ARG , "offch_find_int_ms" -#define OFFCH_CAND_VALUE_ARG , peer_sel_policy->offch_find_int_ms -#else -#define OFFCH_CAND_TITLE_FMT "" -#define OFFCH_CAND_VALUE_FMT "" -#define OFFCH_CAND_TITLE_ARG -#define OFFCH_CAND_VALUE_ARG -#endif - - RTW_PRINT_SEL(sel, - "%-12s" - OFFCH_CAND_TITLE_FMT - "\n" - , "scanr_exp_ms" - OFFCH_CAND_TITLE_ARG - ); - RTW_PRINT_SEL(sel, - "%12u" - OFFCH_CAND_VALUE_FMT - "\n" - , peer_sel_policy->scanr_exp_ms - OFFCH_CAND_VALUE_ARG - ); + RTW_PRINT_SEL(sel, "%-12s\n", "scanr_exp_ms"); + RTW_PRINT_SEL(sel, "%12u\n", peer_sel_policy->scanr_exp_ms); } void dump_mesh_networks(void *sel, _adapter *adapter) { +#if CONFIG_RTW_MESH_ACNODE_PREVENT +#define NSTATE_TITLE_FMT_ACN " %-5s" +#define NSTATE_VALUE_FMT_ACN " %5d" +#define NSTATE_TITLE_ARG_ACN , "acn" +#define NSTATE_VALUE_ARG_ACN , (acn_ms < 99999 ? acn_ms : 99999) +#else +#define NSTATE_TITLE_FMT_ACN "" +#define NSTATE_VALUE_FMT_ACN "" +#define NSTATE_TITLE_ARG_ACN +#define NSTATE_VALUE_ARG_ACN +#endif + struct mlme_priv *mlme = &(adapter->mlmepriv); _queue *queue = &(mlme->scanned_queue); struct wlan_network *network; @@ -776,6 +1068,9 @@ void dump_mesh_networks(void *sel, _adapter *adapter) u8 blocked; u8 established; s32 age_ms; +#if CONFIG_RTW_MESH_ACNODE_PREVENT + s32 acn_ms; +#endif u8 *mesh_conf_ie; sint mesh_conf_ie_len; struct wlan_network **mesh_networks; @@ -807,9 +1102,12 @@ void dump_mesh_networks(void *sel, _adapter *adapter) exit_critical_bh(&queue->lock); - RTW_PRINT_SEL(sel, " %-17s %-3s %-4s %-5s %-32s %-3s %-3s %-3s\n" - , "bssid", "ch", "rssi", "age", "mesh_id", "nop", "fwd", "cto"); - + RTW_PRINT_SEL(sel, " %-17s %-3s %-4s %-5s %-32s %-3s %-3s %-3s" + NSTATE_TITLE_FMT_ACN + "\n" + , "bssid", "ch", "rssi", "age", "mesh_id", "nop", "fwd", "cto" + NSTATE_TITLE_ARG_ACN + ); for (i = 0; i < mesh_network_cnt; i++) { network = mesh_networks[i]; @@ -823,6 +1121,12 @@ void dump_mesh_networks(void *sel, _adapter *adapter) continue; age_ms = rtw_get_passing_time_ms(network->last_scanned); + #if CONFIG_RTW_MESH_ACNODE_PREVENT + if (network->acnode_stime == 0) + acn_ms = 0; + else + acn_ms = rtw_get_passing_time_ms(network->acnode_stime); + #endif same_mbss = 0; candidate = 0; plink = NULL; @@ -843,7 +1147,9 @@ void dump_mesh_networks(void *sel, _adapter *adapter) same_mbss = 1; } - RTW_PRINT_SEL(sel, "%c "MAC_FMT" %3d %4ld %5d %-32s %c%2u %3u %c%c \n" + RTW_PRINT_SEL(sel, "%c "MAC_FMT" %3d %4ld %5d %-32s %c%2u %3u %c%c " + NSTATE_VALUE_FMT_ACN + "\n" , established ? 'E' : (blocked ? 'B' : (plink ? 'N' : (candidate ? 'C' : (same_mbss ? 'S' : ' ')))) , MAC_ARG(network->network.MacAddress) , network->network.Configuration.DSConfig @@ -855,39 +1161,30 @@ void dump_mesh_networks(void *sel, _adapter *adapter) , GET_MESH_CONF_ELE_FORWARDING(mesh_conf_ie + 2) , GET_MESH_CONF_ELE_CTO_MGATE(mesh_conf_ie + 2) ? 'G' : ' ' , GET_MESH_CONF_ELE_CTO_AS(mesh_conf_ie + 2) ? 'A' : ' ' + NSTATE_VALUE_ARG_ACN ); } rtw_vmfree(mesh_networks, mlme->max_bss_cnt * sizeof(struct wlan_network *)); } -int rtw_sae_check_frames(_adapter *adapter, const u8 *buf, u32 len, u8 tx) +void rtw_mesh_adjust_chbw(u8 req_ch, u8 *req_bw, u8 *req_offset) { - const u8 *frame_body = buf + sizeof(struct rtw_ieee80211_hdr_3addr); - u16 alg; - u16 seq; - u16 status; - int ret = 0; - - alg = RTW_GET_LE16(frame_body); - if (alg != 3) - goto exit; - - seq = RTW_GET_LE16(frame_body + 2); - status = RTW_GET_LE16(frame_body + 4); - - RTW_INFO("RTW_%s:AUTH alg:0x%04x, seq:0x%04x, status:0x%04x\n" - , (tx == _TRUE) ? "Tx" : "Rx", alg, seq, status); - - ret = 1; + if (req_ch >= 5 && req_ch <= 9) { + /* prevent secondary channel offset mismatch */ + if (*req_bw > CHANNEL_WIDTH_20) { + *req_bw = CHANNEL_WIDTH_20; + *req_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + } + } +} +void rtw_mesh_sae_check_frames(_adapter *adapter, const u8 *buf, u32 len, u8 tx, u16 alg, u16 seq, u16 status) +{ #if CONFIG_RTW_MESH_PEER_BLACKLIST if (tx && seq == 1) rtw_mesh_plink_set_peer_conf_timeout(adapter, GetAddr1Ptr(buf)); #endif - -exit: - return ret; } #if CONFIG_RTW_MPM_TX_IES_SYNC_BSS @@ -1132,37 +1429,37 @@ struct mpm_frame_info { }; /* -* pid:0x0000 llid:0x0000 chosen_pmk:0x00000000000000000000000000000000 -* aid:0x0000 pid:0x0000 llid:0x0000 plid:0x0000 chosen_pmk:0x00000000000000000000000000000000 -* pid:0x0000 llid:0x0000 plid:0x0000 reason:0x0000 chosen_pmk:0x00000000000000000000000000000000 +* pid:00000 llid:00000 chosen_pmk:0x00000000000000000000000000000000 +* aid:00000 pid:00000 llid:00000 plid:00000 chosen_pmk:0x00000000000000000000000000000000 +* pid:00000 llid:00000 plid:00000 reason:00000 chosen_pmk:0x00000000000000000000000000000000 */ -#define MPM_LOG_BUF_LEN 96 /* this length is limited for legal combination */ +#define MPM_LOG_BUF_LEN 92 /* this length is limited for legal combination */ static void rtw_mpm_info_msg(struct mpm_frame_info *mpm_info, u8 *mpm_log_buf) { int cnt = 0; if (mpm_info->aid) { - cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "aid:0x%04x ", mpm_info->aid_v); + cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "aid:%u ", mpm_info->aid_v); if (cnt >= MPM_LOG_BUF_LEN - 1) goto exit; } if (mpm_info->pid) { - cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "pid:0x%04x ", mpm_info->pid_v); + cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "pid:%u ", mpm_info->pid_v); if (cnt >= MPM_LOG_BUF_LEN - 1) goto exit; } if (mpm_info->llid) { - cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "llid:0x%04x ", mpm_info->llid_v); + cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "llid:%u ", mpm_info->llid_v); if (cnt >= MPM_LOG_BUF_LEN - 1) goto exit; } if (mpm_info->plid) { - cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "plid:0x%04x ", mpm_info->plid_v); + cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "plid:%u ", mpm_info->plid_v); if (cnt >= MPM_LOG_BUF_LEN - 1) goto exit; } if (mpm_info->reason) { - cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "reason:0x%04x ", mpm_info->reason_v); + cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "reason:%u ", mpm_info->reason_v); if (cnt >= MPM_LOG_BUF_LEN - 1) goto exit; } @@ -1344,6 +1641,40 @@ bypass_sync_bss: rtw_mesh_plink_set_peer_conf_timeout(adapter, peer_addr); } else +#endif +#if CONFIG_RTW_MESH_ACNODE_PREVENT + if (action == RTW_ACT_SELF_PROTECTED_MESH_CLOSE) { + if (tx && mpm_info.reason && mpm_info.reason_v == WLAN_REASON_MESH_MAX_PEERS) { + if (rtw_mesh_scanned_is_acnode_confirmed(adapter, plink->scanned) + && rtw_mesh_acnode_prevent_allow_sacrifice(adapter) + ) { + struct sta_info *sac = rtw_mesh_acnode_prevent_pick_sacrifice(adapter); + + if (sac) { + struct sta_priv *stapriv = &adapter->stapriv; + _irqL irqL; + u8 sta_addr[ETH_ALEN]; + u8 updated = _FALSE; + + _enter_critical_bh(&stapriv->asoc_list_lock, &irqL); + if (!rtw_is_list_empty(&sac->asoc_list)) { + rtw_list_delete(&sac->asoc_list); + stapriv->asoc_list_cnt--; + STA_SET_MESH_PLINK(sac, NULL); + } + _exit_critical_bh(&stapriv->asoc_list_lock, &irqL); + RTW_INFO(FUNC_ADPT_FMT" sacrifice "MAC_FMT" for acnode\n" + , FUNC_ADPT_ARG(adapter), MAC_ARG(sac->cmn.mac_addr)); + + _rtw_memcpy(sta_addr, sac->cmn.mac_addr, ETH_ALEN); + updated = ap_free_sta(adapter, sac, 0, 0, 1); + rtw_mesh_expire_peer(stapriv->padapter, sta_addr); + + associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL); + } + } + } + } else #endif if (action == RTW_ACT_SELF_PROTECTED_MESH_CONF) { _irqL irqL; @@ -1460,7 +1791,6 @@ static int rtw_mesh_check_frames(_adapter *adapter, const u8 **buf, size_t *len, }; } -exit: return is_mesh_frame; } @@ -1474,6 +1804,31 @@ int rtw_mesh_check_frames_rx(_adapter *adapter, const u8 *buf, size_t len) return rtw_mesh_check_frames(adapter, &buf, &len, _FALSE); } +int rtw_mesh_on_auth(_adapter *adapter, union recv_frame *rframe) +{ + u8 *whdr = rframe->u.hdr.rx_data; + +#if CONFIG_RTW_MACADDR_ACL + if (rtw_access_ctrl(adapter, get_addr2_ptr(whdr)) == _FALSE) + return _SUCCESS; +#endif + + if (!rtw_mesh_plink_get(adapter, get_addr2_ptr(whdr))) { + #if CONFIG_RTW_MESH_ACNODE_PREVENT + rtw_mesh_acnode_set_notify_etime(adapter, whdr); + #endif + + if (adapter_to_rfctl(adapter)->offch_state == OFFCHS_NONE) + issue_probereq(adapter, &adapter->mlmepriv.cur_network.network.mesh_id, get_addr2_ptr(whdr)); + + /* only peer being added (checked by notify conditions) is allowed */ + return _SUCCESS; + } + + rtw_cfg80211_rx_mframe(adapter, rframe, NULL); + return _SUCCESS; +} + unsigned int on_action_self_protected(_adapter *adapter, union recv_frame *rframe) { unsigned int ret = _FAIL; @@ -1577,6 +1932,10 @@ bool rtw_mesh_update_bss_peering_status(_adapter *adapter, WLAN_BSSID_EX *bss) int ie_len; bool updated = 0; +#if CONFIG_RTW_MESH_ACNODE_PREVENT + accept_peerings |= plink_ctl->acnode_rsvd; +#endif + ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len, BSS_EX_TLV_IES_LEN(bss)); if (!ie || ie_len != 7) { rtw_warn_on(1); @@ -1668,7 +2027,6 @@ struct mesh_plink_ent *_rtw_mesh_plink_get(_adapter *adapter, const u8 *hwaddr) } } -exit: return ent; } @@ -1683,7 +2041,6 @@ struct mesh_plink_ent *rtw_mesh_plink_get(_adapter *adapter, const u8 *hwaddr) ent = _rtw_mesh_plink_get(adapter, hwaddr); _exit_critical_bh(&(plink_ctl->lock), &irqL); -exit: return ent; } @@ -1757,7 +2114,6 @@ int _rtw_mesh_plink_add(_adapter *adapter, const u8 *hwaddr) plink_ctl->num++; } -exit: return exist == _TRUE ? RTW_ALREADY : (ent ? _SUCCESS : _FAIL); } @@ -1788,7 +2144,6 @@ int rtw_mesh_plink_set_state(_adapter *adapter, const u8 *hwaddr, u8 state) ent->plink_state = state; _exit_critical_bh(&(plink_ctl->lock), &irqL); -exit: return ent ? _SUCCESS : _FAIL; } @@ -1808,7 +2163,6 @@ int rtw_mesh_plink_set_aek(_adapter *adapter, const u8 *hwaddr, const u8 *aek) } _exit_critical_bh(&(plink_ctl->lock), &irqL); -exit: return ent ? _SUCCESS : _FAIL; } #endif @@ -1830,7 +2184,6 @@ int rtw_mesh_plink_set_peer_conf_timeout(_adapter *adapter, const u8 *hwaddr) } _exit_critical_bh(&(plink_ctl->lock), &irqL); -exit: return ent ? _SUCCESS : _FAIL; } #endif @@ -1881,7 +2234,6 @@ int rtw_mesh_plink_del(_adapter *adapter, const u8 *hwaddr) _exit_critical_bh(&(plink_ctl->lock), &irqL); -exit: return exist == _TRUE ? _SUCCESS : RTW_ALREADY; } @@ -1944,6 +2296,9 @@ void dump_mesh_plink_ctl(void *sel, _adapter *adapter) int i; RTW_PRINT_SEL(sel, "num:%u\n", plink_ctl->num); + #if CONFIG_RTW_MESH_ACNODE_PREVENT + RTW_PRINT_SEL(sel, "acnode_rsvd:%u\n", plink_ctl->acnode_rsvd); + #endif for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) { ent = &plink_ctl->ent[i]; @@ -2075,6 +2430,10 @@ int rtw_mesh_peer_establish(_adapter *adapter, struct mesh_plink_ent *plink, str goto exit; rtw_ap_parse_sta_wmm_ie(adapter, sta, tlv_ies, tlv_ieslen); +#ifdef CONFIG_RTS_FULL_BW + /*check vendor IE*/ + rtw_parse_sta_vendor_ie_8812(adapter, sta, tlv_ies, tlv_ieslen); +#endif/*CONFIG_RTS_FULL_BW*/ rtw_ap_parse_sta_ht_ie(adapter, sta, &elems); rtw_ap_parse_sta_vht_ie(adapter, sta, &elems); @@ -2098,6 +2457,7 @@ int rtw_mesh_peer_establish(_adapter *adapter, struct mesh_plink_ent *plink, str rtw_ewma_err_rate_add(&sta->metrics.err_rate, 1); /* init data_rate to 1M */ sta->metrics.data_rate = 10; + sta->alive = _TRUE; _enter_critical_bh(&stapriv->asoc_list_lock, &irqL); if (rtw_is_list_empty(&sta->asoc_list)) { @@ -2128,11 +2488,11 @@ void rtw_mesh_expire_peer_notify(_adapter *adapter, const u8 *peer_addr) , peer_addr , null_ssid , 2 + , 0 , GFP_ATOMIC ); #endif -exit: return; } @@ -2587,13 +2947,58 @@ static int rtw_mesh_decache(_adapter *adapter, const u8 *msa, u32 seq) return rtw_mrc_check(adapter, msa, seq); } +#ifndef RTW_MESH_SCAN_RESULT_EXP_MS +#define RTW_MESH_SCAN_RESULT_EXP_MS (10 * 1000) +#endif + +#ifndef RTW_MESH_ACNODE_PREVENT +#define RTW_MESH_ACNODE_PREVENT 0 +#endif +#ifndef RTW_MESH_ACNODE_CONF_TIMEOUT_MS +#define RTW_MESH_ACNODE_CONF_TIMEOUT_MS (20 * 1000) +#endif +#ifndef RTW_MESH_ACNODE_NOTIFY_TIMEOUT_MS +#define RTW_MESH_ACNODE_NOTIFY_TIMEOUT_MS (2 * 1000) +#endif + +#ifndef RTW_MESH_OFFCH_CAND +#define RTW_MESH_OFFCH_CAND 1 +#endif +#ifndef RTW_MESH_OFFCH_CAND_FIND_INT_MS +#define RTW_MESH_OFFCH_CAND_FIND_INT_MS (10 * 1000) +#endif + +#ifndef RTW_MESH_PEER_CONF_TIMEOUT_MS +#define RTW_MESH_PEER_CONF_TIMEOUT_MS (20 * 1000) +#endif +#ifndef RTW_MESH_PEER_BLACKLIST_TIMEOUT_MS +#define RTW_MESH_PEER_BLACKLIST_TIMEOUT_MS (20 * 1000) +#endif + +#ifndef RTW_MESH_CTO_MGATE_REQUIRE +#define RTW_MESH_CTO_MGATE_REQUIRE 0 +#endif +#ifndef RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS +#define RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS (20 * 1000) +#endif +#ifndef RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS +#define RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS (20 * 1000) +#endif + void rtw_mesh_cfg_init_peer_sel_policy(struct rtw_mesh_cfg *mcfg) { struct mesh_peer_sel_policy *sel_policy = &mcfg->peer_sel_policy; sel_policy->scanr_exp_ms = RTW_MESH_SCAN_RESULT_EXP_MS; +#if CONFIG_RTW_MESH_ACNODE_PREVENT + sel_policy->acnode_prevent = RTW_MESH_ACNODE_PREVENT; + sel_policy->acnode_conf_timeout_ms = RTW_MESH_ACNODE_CONF_TIMEOUT_MS; + sel_policy->acnode_notify_timeout_ms = RTW_MESH_ACNODE_NOTIFY_TIMEOUT_MS; +#endif + #if CONFIG_RTW_MESH_OFFCH_CAND + sel_policy->offch_cand = RTW_MESH_OFFCH_CAND; sel_policy->offch_find_int_ms = RTW_MESH_OFFCH_CAND_FIND_INT_MS; #endif @@ -2603,7 +3008,7 @@ void rtw_mesh_cfg_init_peer_sel_policy(struct rtw_mesh_cfg *mcfg) #endif #if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST - sel_policy->cto_mgate_require = 0; + sel_policy->cto_mgate_require = RTW_MESH_CTO_MGATE_REQUIRE; sel_policy->cto_mgate_conf_timeout_ms = RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS; sel_policy->cto_mgate_blacklist_timeout_ms = RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS; #endif @@ -2796,6 +3201,9 @@ int rtw_mesh_nexthop_lookup(_adapter *adapter, struct sta_info *next_hop; const u8 *target_addr = mda; int err = -ENOENT; + struct registry_priv *registry_par = &adapter->registrypriv; + u8 peer_alive_based_preq = registry_par->peer_alive_based_preq; + BOOLEAN nexthop_alive = _TRUE; rtw_rcu_read_lock(); mpath = rtw_mesh_path_lookup(adapter, target_addr); @@ -2803,21 +3211,41 @@ int rtw_mesh_nexthop_lookup(_adapter *adapter, if (!mpath || !(mpath->flags & RTW_MESH_PATH_ACTIVE)) goto endlookup; - if (rtw_time_after(rtw_get_current_time(), - mpath->exp_time - - rtw_ms_to_systime(adapter->mesh_cfg.path_refresh_time)) && - _rtw_memcmp(adapter_mac_addr(adapter), msa, ETH_ALEN) == _TRUE && - !(mpath->flags & RTW_MESH_PATH_RESOLVING) && - !(mpath->flags & RTW_MESH_PATH_FIXED)) { - rtw_mesh_queue_preq(mpath, RTW_PREQ_Q_F_START | RTW_PREQ_Q_F_REFRESH); - } - next_hop = rtw_rcu_dereference(mpath->next_hop); if (next_hop) { _rtw_memcpy(ra, next_hop->cmn.mac_addr, ETH_ALEN); err = 0; } + if (peer_alive_based_preq && next_hop) + nexthop_alive = next_hop->alive; + + if (_rtw_memcmp(adapter_mac_addr(adapter), msa, ETH_ALEN) == _TRUE && + !(mpath->flags & RTW_MESH_PATH_RESOLVING) && + !(mpath->flags & RTW_MESH_PATH_FIXED)) { + u8 flags = RTW_PREQ_Q_F_START | RTW_PREQ_Q_F_REFRESH; + + if (peer_alive_based_preq && nexthop_alive == _FALSE) { + flags |= RTW_PREQ_Q_F_BCAST_PREQ; + rtw_mesh_queue_preq(mpath, flags); + } else if (rtw_time_after(rtw_get_current_time(), + mpath->exp_time - + rtw_ms_to_systime(adapter->mesh_cfg.path_refresh_time))) { + rtw_mesh_queue_preq(mpath, flags); + } + /* Avoid keeping trying unicast PREQ toward root, + when next_hop leaves */ + } else if (peer_alive_based_preq && + _rtw_memcmp(adapter_mac_addr(adapter), msa, ETH_ALEN) == _TRUE && + (mpath->flags & RTW_MESH_PATH_RESOLVING) && + !(mpath->flags & RTW_MESH_PATH_FIXED) && + !(mpath->flags & RTW_MESH_PATH_BCAST_PREQ) && + mpath->is_root && nexthop_alive == _FALSE) { + enter_critical_bh(&mpath->state_lock); + mpath->flags |= RTW_MESH_PATH_BCAST_PREQ; + exit_critical_bh(&mpath->state_lock); + } + endlookup: rtw_rcu_read_unlock(); return err; diff --git a/core/mesh/rtw_mesh.h b/core/mesh/rtw_mesh.h index 5164ddb..1b060e7 100644 --- a/core/mesh/rtw_mesh.h +++ b/core/mesh/rtw_mesh.h @@ -19,12 +19,6 @@ #error "CONFIG_RTW_MESH can't be enabled when CONFIG_AP_MODE is not defined\n" #endif -#ifndef RTW_MESH_SCAN_RESULT_EXP_MS -#define RTW_MESH_SCAN_RESULT_EXP_MS (10 * 1000) -#endif -#ifndef RTW_MESH_OFFCH_CAND_FIND_INT_MS -#define RTW_MESH_OFFCH_CAND_FIND_INT_MS (10 * 1000) -#endif #define RTW_MESH_TTL 31 #define RTW_MESH_PERR_MIN_INT 100 #define RTW_MESH_DEFAULT_ELEMENT_TTL 31 @@ -112,6 +106,7 @@ extern const char *_rtw_mesh_ps_str[]; #define RTW_PREQ_Q_F_REFRESH 0x2 #define RTW_PREQ_Q_F_CHK 0x4 #define RTW_PREQ_Q_F_PEER_AKA 0x8 +#define RTW_PREQ_Q_F_BCAST_PREQ 0x10 /* force path_dicover using broadcast */ struct rtw_mesh_preq_queue { _list list; u8 dst[ETH_ALEN]; @@ -247,6 +242,10 @@ struct mesh_plink_pool { u8 num; /* current ent being used */ struct mesh_plink_ent ent[RTW_MESH_MAX_PEER_CANDIDATES]; +#if CONFIG_RTW_MESH_ACNODE_PREVENT + u8 acnode_rsvd; +#endif + #if CONFIG_RTW_MESH_PEER_BLACKLIST _queue peer_blacklist; #endif @@ -255,16 +254,18 @@ struct mesh_plink_pool { #endif }; -#define RTW_MESH_PEER_CONF_TIMEOUT_MS (20 * 1000) -#define RTW_MESH_PEER_BLACKLIST_TIMEOUT_MS (20 * 1000) -#define RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS (20 * 1000) -#define RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS (20 * 1000) - struct mesh_peer_sel_policy { u32 scanr_exp_ms; +#if CONFIG_RTW_MESH_ACNODE_PREVENT + u8 acnode_prevent; + u32 acnode_conf_timeout_ms; + u32 acnode_notify_timeout_ms; +#endif + #if CONFIG_RTW_MESH_OFFCH_CAND - u32 offch_find_int_ms; /* 0 means no offch find by driver */ + u8 offch_cand; + u32 offch_find_int_ms; /* 0 means no offch find triggerred by driver self*/ #endif #if CONFIG_RTW_MESH_PEER_BLACKLIST @@ -384,12 +385,14 @@ struct rtw_mesh_info { int mpp_paths_generation; int num_gates; + struct rtw_mesh_path *max_addr_gate; + bool max_addr_gate_is_larger_than_self; struct rtw_mesh_stats mshstats; _queue mpath_tx_queue; u32 mpath_tx_queue_len; - struct tasklet_struct mpath_tx_tasklet; + _tasklet mpath_tx_tasklet; struct rtw_mrc *mrc; @@ -415,9 +418,18 @@ void rtw_chk_candidate_peer_notify(_adapter *adapter, struct wlan_network *scann void rtw_mesh_peer_status_chk(_adapter *adapter); +#if CONFIG_RTW_MESH_ACNODE_PREVENT +void rtw_mesh_update_scanned_acnode_status(_adapter *adapter, struct wlan_network *scanned); +bool rtw_mesh_scanned_is_acnode_confirmed(_adapter *adapter, struct wlan_network *scanned); +bool rtw_mesh_acnode_prevent_allow_sacrifice(_adapter *adapter); +struct sta_info *rtw_mesh_acnode_prevent_pick_sacrifice(_adapter *adapter); +void dump_mesh_acnode_prevent_settings(void *sel, _adapter *adapter); +#endif + #if CONFIG_RTW_MESH_OFFCH_CAND u8 rtw_mesh_offch_candidate_accepted(_adapter *adapter); u8 rtw_mesh_select_operating_ch(_adapter *adapter); +void dump_mesh_offch_cand_settings(void *sel, _adapter *adapter); #endif #if CONFIG_RTW_MESH_PEER_BLACKLIST @@ -441,10 +453,13 @@ void dump_mesh_cto_mgate_blacklist_settings(void *sel, _adapter *adapter); void dump_mesh_peer_sel_policy(void *sel, _adapter *adapter); void dump_mesh_networks(void *sel, _adapter *adapter); -int rtw_sae_check_frames(_adapter *adapter, const u8 *buf, u32 len, u8 tx); +void rtw_mesh_adjust_chbw(u8 req_ch, u8 *req_bw, u8 *req_offset); + +void rtw_mesh_sae_check_frames(_adapter *adapter, const u8 *buf, u32 len, u8 tx, u16 alg, u16 seq, u16 status); int rtw_mesh_check_frames_tx(_adapter *adapter, const u8 **buf, size_t *len); int rtw_mesh_check_frames_rx(_adapter *adapter, const u8 *buf, size_t len); +int rtw_mesh_on_auth(_adapter *adapter, union recv_frame *rframe); unsigned int on_action_self_protected(_adapter *adapter, union recv_frame *rframe); bool rtw_mesh_update_bss_peering_status(_adapter *adapter, WLAN_BSSID_EX *bss); diff --git a/core/mesh/rtw_mesh_hwmp.c b/core/mesh/rtw_mesh_hwmp.c index cca1a9f..449e838 100644 --- a/core/mesh/rtw_mesh_hwmp.c +++ b/core/mesh/rtw_mesh_hwmp.c @@ -1319,6 +1319,8 @@ void rtw_mesh_queue_preq(struct rtw_mesh_path *path, u8 flags) #endif if (flags & RTW_PREQ_Q_F_PEER_AKA) path->flags |= RTW_MESH_PATH_PEER_AKA; + if (flags & RTW_PREQ_Q_F_BCAST_PREQ) + path->flags |= RTW_MESH_PATH_BCAST_PREQ; _rtw_spinunlock(&path->state_lock); rtw_list_insert_tail(&preq_node->list, &minfo->preq_queue.list); @@ -1334,16 +1336,19 @@ void rtw_mesh_queue_preq(struct rtw_mesh_path *path, u8 flags) rtw_mesh_work(&adapter->mesh_work); } else rtw_mod_timer(&adapter->mesh_path_timer, minfo->last_preq + - rtw_min_preq_int_jiff(adapter)); + rtw_min_preq_int_jiff(adapter) + 1); } static const u8 *rtw_hwmp_preq_da(struct rtw_mesh_path *path, - BOOLEAN is_root_add_chk, BOOLEAN da_is_peer) + BOOLEAN is_root_add_chk, BOOLEAN da_is_peer, + BOOLEAN force_preq_bcast) { const u8 *da; if (da_is_peer) da = path->dst; + else if (force_preq_bcast) + da = bcast_addr; else if (path->is_root) #ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK da = is_root_add_chk ? path->add_chk_rann_snd_addr: @@ -1368,7 +1373,7 @@ void rtw_mesh_path_start_discovery(_adapter *adapter) u32 lifetime; u8 flags = 0; BOOLEAN is_root_add_chk = _FALSE; - BOOLEAN da_is_peer; + BOOLEAN da_is_peer, force_preq_bcast; enter_critical_bh(&minfo->mesh_preq_queue_lock); if (!minfo->preq_queue_len || @@ -1437,9 +1442,11 @@ void rtw_mesh_path_start_discovery(_adapter *adapter) is_root_add_chk = !!(path->flags & RTW_MESH_PATH_ROOT_ADD_CHK); #endif da_is_peer = !!(path->flags & RTW_MESH_PATH_PEER_AKA); + force_preq_bcast = !!(path->flags & RTW_MESH_PATH_BCAST_PREQ); exit_critical_bh(&path->state_lock); - da = rtw_hwmp_preq_da(path, is_root_add_chk, da_is_peer); + da = rtw_hwmp_preq_da(path, is_root_add_chk, + da_is_peer, force_preq_bcast); #ifdef CONFIG_RTW_MESH_ON_DMD_GANN flags = (mshcfg->dot11MeshGateAnnouncementProtocol) @@ -1475,7 +1482,8 @@ void rtw_mesh_path_timer(void *ctx) path->flags &= ~(RTW_MESH_PATH_RESOLVING | RTW_MESH_PATH_RESOLVED | RTW_MESH_PATH_ROOT_ADD_CHK | - RTW_MESH_PATH_PEER_AKA); + RTW_MESH_PATH_PEER_AKA | + RTW_MESH_PATH_BCAST_PREQ); exit_critical_bh(&path->state_lock); } else if (path->discovery_retries < rtw_max_preq_retries(adapter)) { ++path->discovery_retries; @@ -1495,7 +1503,8 @@ void rtw_mesh_path_timer(void *ctx) RTW_MESH_PATH_RESOLVED | RTW_MESH_PATH_REQ_QUEUED | RTW_MESH_PATH_ROOT_ADD_CHK | - RTW_MESH_PATH_PEER_AKA); + RTW_MESH_PATH_PEER_AKA | + RTW_MESH_PATH_BCAST_PREQ); path->exp_time = rtw_get_current_time(); exit_critical_bh(&path->state_lock); if (!path->is_gate && rtw_mesh_gate_num(adapter) > 0) { @@ -1601,10 +1610,19 @@ void rtw_mesh_work_hdl(_workitem *work) { _adapter *adapter = container_of(work, _adapter, mesh_work); - if (adapter->mesh_info.preq_queue_len && - rtw_time_after(rtw_get_current_time(), - adapter->mesh_info.last_preq + rtw_ms_to_systime(adapter->mesh_cfg.dot11MeshHWMPpreqMinInterval))) - rtw_mesh_path_start_discovery(adapter); + while(adapter->mesh_info.preq_queue_len) { + if (rtw_time_after(rtw_get_current_time(), + adapter->mesh_info.last_preq + rtw_min_preq_int_jiff(adapter))) + /* It will consume preq_queue_len */ + rtw_mesh_path_start_discovery(adapter); + else { + struct rtw_mesh_info *minfo = &adapter->mesh_info; + + rtw_mod_timer(&adapter->mesh_path_timer, + minfo->last_preq + rtw_min_preq_int_jiff(adapter) + 1); + break; + } + } if (rtw_test_and_clear_bit(RTW_MESH_WORK_ROOT, &adapter->wrkq_flags)) rtw_ieee80211_mesh_rootpath(adapter); diff --git a/core/mesh/rtw_mesh_pathtbl.c b/core/mesh/rtw_mesh_pathtbl.c index d1baaa8..dd7979f 100644 --- a/core/mesh/rtw_mesh_pathtbl.c +++ b/core/mesh/rtw_mesh_pathtbl.c @@ -324,6 +324,63 @@ rtw_mesh_path_lookup_by_idx(_adapter *adapter, int idx) return __rtw_mesh_path_lookup_by_idx(adapter->mesh_info.mesh_paths, idx); } +void dump_mpath(void *sel, _adapter *adapter) +{ + struct rtw_mesh_path *mpath; + int idx = 0; + char dst[ETH_ALEN]; + char next_hop[ETH_ALEN]; + u32 sn, metric, qlen; + u32 exp_ms = 0, dto_ms; + u8 drty; + enum rtw_mesh_path_flags flags; + + RTW_PRINT_SEL(sel, "%-17s %-17s %-10s %-10s %-4s %-6s %-6s %-4s flags\n" + , "dst", "next_hop", "sn", "metric", "qlen", "exp_ms", "dto_ms", "drty" + ); + + do { + rtw_rcu_read_lock(); + + mpath = rtw_mesh_path_lookup_by_idx(adapter, idx); + if (mpath) { + _rtw_memcpy(dst, mpath->dst, ETH_ALEN); + _rtw_memcpy(next_hop, mpath->next_hop->cmn.mac_addr, ETH_ALEN); + sn = mpath->sn; + metric = mpath->metric; + qlen = mpath->frame_queue_len; + if (rtw_time_after(mpath->exp_time, rtw_get_current_time())) + exp_ms = rtw_get_remaining_time_ms(mpath->exp_time); + dto_ms = rtw_systime_to_ms(mpath->discovery_timeout); + drty = mpath->discovery_retries; + flags = mpath->flags; + } + + rtw_rcu_read_unlock(); + + if (mpath) { + RTW_PRINT_SEL(sel, MAC_FMT" "MAC_FMT" %10u %10u %4u %6u %6u %4u%s%s%s%s%s%s%s%s%s%s\n" + , MAC_ARG(dst), MAC_ARG(next_hop), sn, metric, qlen + , exp_ms < 999999 ? exp_ms : 999999 + , dto_ms < 999999 ? dto_ms : 999999 + , drty + , (flags & RTW_MESH_PATH_ACTIVE) ? " ACT" : "" + , (flags & RTW_MESH_PATH_RESOLVING) ? " RSVING" : "" + , (flags & RTW_MESH_PATH_SN_VALID) ? " SN_VALID" : "" + , (flags & RTW_MESH_PATH_FIXED) ? " FIXED" : "" + , (flags & RTW_MESH_PATH_RESOLVED) ? " RSVED" : "" + , (flags & RTW_MESH_PATH_REQ_QUEUED) ? " REQ_IN_Q" : "" + , (flags & RTW_MESH_PATH_DELETED) ? " DELETED" : "" + , (flags & RTW_MESH_PATH_ROOT_ADD_CHK) ? " R_ADD_CHK" : "" + , (flags & RTW_MESH_PATH_PEER_AKA) ? " PEER_AKA" : "" + , (flags & RTW_MESH_PATH_BCAST_PREQ) ? " BC_PREQ" : "" + ); + } + + idx++; + } while (mpath); +} + /** * rtw_mpp_path_lookup_by_idx - look up a path in the proxy path table by its index * @idx: index @@ -374,12 +431,26 @@ int rtw_mesh_path_add_gate(struct rtw_mesh_path *mpath) ori_num_gates = minfo->num_gates; minfo->num_gates++; rtw_hlist_add_head_rcu(&mpath->gate_list, &tbl->known_gates); + + if (ori_num_gates == 0 + || rtw_macaddr_is_larger(mpath->dst, minfo->max_addr_gate->dst) + ) { + minfo->max_addr_gate = mpath; + minfo->max_addr_gate_is_larger_than_self = + rtw_macaddr_is_larger(mpath->dst, adapter_mac_addr(mpath->adapter)); + } + _rtw_spinunlock(&tbl->gates_lock); exit_critical_bh(&mpath->state_lock); - if (ori_num_gates == 0) + if (ori_num_gates == 0) { update_beacon(mpath->adapter, WLAN_EID_MESH_CONFIG, NULL, _TRUE); + #if CONFIG_RTW_MESH_CTO_MGATE_CARRIER + if (!rtw_mesh_cto_mgate_required(mpath->adapter)) + rtw_netif_carrier_on(mpath->adapter->pnetdev); + #endif + } RTW_MPATH_DBG( FUNC_ADPT_FMT" Mesh path: Recorded new gate: %pM. %d known gates\n", @@ -414,10 +485,32 @@ void rtw_mesh_gate_del(struct rtw_mesh_table *tbl, struct rtw_mesh_path *mpath) rtw_hlist_del_rcu(&mpath->gate_list); ori_num_gates = minfo->num_gates; minfo->num_gates--; + + if (ori_num_gates == 1) { + minfo->max_addr_gate = NULL; + minfo->max_addr_gate_is_larger_than_self = 0; + } else if (minfo->max_addr_gate == mpath) { + struct rtw_mesh_path *gate, *max_addr_gate = NULL; + rtw_hlist_node *node; + + rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) { + if (!max_addr_gate || rtw_macaddr_is_larger(gate->dst, max_addr_gate->dst)) + max_addr_gate = gate; + } + minfo->max_addr_gate = max_addr_gate; + minfo->max_addr_gate_is_larger_than_self = + rtw_macaddr_is_larger(max_addr_gate->dst, adapter_mac_addr(mpath->adapter)); + } + exit_critical_bh(&tbl->gates_lock); - if (ori_num_gates == 1) + if (ori_num_gates == 1) { update_beacon(mpath->adapter, WLAN_EID_MESH_CONFIG, NULL, _TRUE); + #if CONFIG_RTW_MESH_CTO_MGATE_CARRIER + if (rtw_mesh_cto_mgate_required(mpath->adapter)) + rtw_netif_carrier_off(mpath->adapter->pnetdev); + #endif + } RTW_MPATH_DBG( FUNC_ADPT_FMT" Mesh path: Deleted gate: %pM. %d known gates\n", @@ -458,6 +551,45 @@ int rtw_mesh_gate_num(_adapter *adapter) return adapter->mesh_info.num_gates; } +bool rtw_mesh_is_primary_gate(_adapter *adapter) +{ + struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; + struct rtw_mesh_info *minfo = &adapter->mesh_info; + + return mcfg->dot11MeshGateAnnouncementProtocol + && !minfo->max_addr_gate_is_larger_than_self; +} + +void dump_known_gates(void *sel, _adapter *adapter) +{ + struct rtw_mesh_info *minfo = &adapter->mesh_info; + struct rtw_mesh_table *tbl; + struct rtw_mesh_path *gate; + rtw_hlist_node *node; + + if (!rtw_mesh_gate_num(adapter)) + goto exit; + + rtw_rcu_read_lock(); + + tbl = minfo->mesh_paths; + if (!tbl) + goto unlock; + + RTW_PRINT_SEL(sel, "num:%d\n", rtw_mesh_gate_num(adapter)); + + rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) { + RTW_PRINT_SEL(sel, "%c"MAC_FMT"\n" + , gate == minfo->max_addr_gate ? '*' : ' ' + , MAC_ARG(gate->dst)); + } + +unlock: + rtw_rcu_read_unlock(); +exit: + return; +} + static struct rtw_mesh_path *rtw_mesh_path_new(_adapter *adapter, const u8 *dst) @@ -574,6 +706,34 @@ int rtw_mpp_path_add(_adapter *adapter, return ret; } +void dump_mpp(void *sel, _adapter *adapter) +{ + struct rtw_mesh_path *mpath; + int idx = 0; + char dst[ETH_ALEN]; + char mpp[ETH_ALEN]; + + RTW_PRINT_SEL(sel, "%-17s %-17s\n", "dst", "mpp"); + + do { + rtw_rcu_read_lock(); + + mpath = rtw_mpp_path_lookup_by_idx(adapter, idx); + if (mpath) { + _rtw_memcpy(dst, mpath->dst, ETH_ALEN); + _rtw_memcpy(mpp, mpath->mpp, ETH_ALEN); + } + + rtw_rcu_read_unlock(); + + if (mpath) { + RTW_PRINT_SEL(sel, MAC_FMT" "MAC_FMT"\n" + , MAC_ARG(dst), MAC_ARG(mpp)); + } + + idx++; + } while (mpath); +} /** * rtw_mesh_plink_broken - deactivates paths and sends perr when a link breaks diff --git a/core/mesh/rtw_mesh_pathtbl.h b/core/mesh/rtw_mesh_pathtbl.h index ebf1144..be0c409 100644 --- a/core/mesh/rtw_mesh_pathtbl.h +++ b/core/mesh/rtw_mesh_pathtbl.h @@ -42,20 +42,23 @@ * With this flag, It will try the last used rann_snd_addr * @RTW_MESH_PATH_PEER_AKA: only used toward a peer, only used in active keep * alive mechanism. PREQ's da = path dst + * @RTW_MESH_PATH_BCAST_PREQ: for re-checking next hop resolve toward root. + * Use it to force path_discover sending broadcast PREQ for root. * * RTW_MESH_PATH_RESOLVED is used by the mesh path timer to * decide when to stop or cancel the mesh path discovery. */ enum rtw_mesh_path_flags { - RTW_MESH_PATH_ACTIVE = BIT(0), + RTW_MESH_PATH_ACTIVE = BIT(0), RTW_MESH_PATH_RESOLVING = BIT(1), RTW_MESH_PATH_SN_VALID = BIT(2), RTW_MESH_PATH_FIXED = BIT(3), RTW_MESH_PATH_RESOLVED = BIT(4), RTW_MESH_PATH_REQ_QUEUED = BIT(5), - RTW_MESH_PATH_DELETED = BIT(6), + RTW_MESH_PATH_DELETED = BIT(6), RTW_MESH_PATH_ROOT_ADD_CHK = BIT(7), RTW_MESH_PATH_PEER_AKA = BIT(8), + RTW_MESH_PATH_BCAST_PREQ = BIT(9), }; /** @@ -162,8 +165,12 @@ struct rtw_mesh_path *rtw_mpp_path_lookup(_adapter *adapter, const u8 *dst); int rtw_mpp_path_add(_adapter *adapter, const u8 *dst, const u8 *mpp); +void dump_mpp(void *sel, _adapter *adapter); + struct rtw_mesh_path * rtw_mesh_path_lookup_by_idx(_adapter *adapter, int idx); +void dump_mpath(void *sel, _adapter *adapter); + struct rtw_mesh_path * rtw_mpp_path_lookup_by_idx(_adapter *adapter, int idx); void rtw_mesh_path_fix_nexthop(struct rtw_mesh_path *mpath, struct sta_info *next_hop); @@ -177,6 +184,8 @@ void rtw_mesh_gate_del(struct rtw_mesh_table *tbl, struct rtw_mesh_path *mpath); bool rtw_mesh_gate_search(struct rtw_mesh_table *tbl, const u8 *addr); int rtw_mesh_path_send_to_gates(struct rtw_mesh_path *mpath); int rtw_mesh_gate_num(_adapter *adapter); +bool rtw_mesh_is_primary_gate(_adapter *adapter); +void dump_known_gates(void *sel, _adapter *adapter); void rtw_mesh_plink_broken(struct sta_info *sta); diff --git a/core/rtw_ap.c b/core/rtw_ap.c index c0ca2d0..3d4d61b 100644 --- a/core/rtw_ap.c +++ b/core/rtw_ap.c @@ -27,13 +27,10 @@ extern unsigned char WFD_OUI[]; void init_mlme_ap_info(_adapter *padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); _rtw_spinlock_init(&pmlmepriv->bcn_update_lock); - /* pmlmeext->bstart_bss = _FALSE; */ - } void free_mlme_ap_info(_adapter *padapter) @@ -41,6 +38,7 @@ void free_mlme_ap_info(_adapter *padapter) struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); stop_ap_mode(padapter); + _rtw_spinlock_free(&pmlmepriv->bcn_update_lock); } @@ -61,7 +59,7 @@ u8 rtw_set_tim_ie(u8 dtim_cnt, u8 dtim_period if (tim_bmp[i]) break; n1 = i & 0xFE; - + /* find the last nonzero octet in tim_bitmap, except octet 0 */ for (i = tim_bmp_len - 1; i > 0; i--) if (tim_bmp[i]) @@ -293,16 +291,27 @@ u8 chk_sta_is_alive(struct sta_info *psta) #if 0 if (psta->state & WIFI_SLEEP_STATE) ret = _TRUE; -#endif -#ifdef CONFIG_RTW_MESH - if (MLME_IS_MESH(psta->padapter) && - (psta->sta_stats.last_rx_hwmp_pkts != - psta->sta_stats.rx_hwmp_pkts)) - ret = _TRUE; #endif } else ret = _TRUE; +#ifdef CONFIG_RTW_MESH + if (MLME_IS_MESH(psta->padapter)) { + u8 bcn_alive, hwmp_alive; + + hwmp_alive = (psta->sta_stats.rx_hwmp_pkts != + psta->sta_stats.last_rx_hwmp_pkts); + bcn_alive = (psta->sta_stats.rx_beacon_pkts != + psta->sta_stats.last_rx_beacon_pkts); + /* The reference for nexthop_lookup */ + psta->alive = ret || hwmp_alive || bcn_alive; + /* The reference for expire_timeout_chk */ + /* Exclude bcn_alive to avoid a misjudge condition + that a peer unexpectedly leave and restart quickly*/ + ret = ret || hwmp_alive; + } +#endif + sta_update_last_rx_pkts(psta); return ret; @@ -312,6 +321,7 @@ u8 chk_sta_is_alive(struct sta_info *psta) * issue_aka_chk_frame - issue active keep alive check frame * aka = active keep alive */ +#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK static int issue_aka_chk_frame(_adapter *adapter, struct sta_info *psta) { int ret = _FAIL; @@ -335,8 +345,8 @@ static int issue_aka_chk_frame(_adapter *adapter, struct sta_info *psta) mpath = rtw_mesh_path_add(adapter, target_addr); if (IS_ERR(mpath)) { rtw_rcu_read_unlock(); - RTW_ERR("[%s] rtw_mesh_path_add fail.\n", - __FUNCTION__); + RTW_ERR(FUNC_ADPT_FMT" rtw_mesh_path_add for "MAC_FMT" fail.\n", + FUNC_ADPT_ARG(adapter), MAC_ARG(target_addr)); return _FAIL; } } @@ -353,6 +363,38 @@ static int issue_aka_chk_frame(_adapter *adapter, struct sta_info *psta) #endif return ret; } +#endif + +#ifdef RTW_CONFIG_RFREG18_WA +static void rtw_check_restore_rf18(_adapter *padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + u32 reg; + u8 union_ch = 0, union_bw = 0, union_offset = 0, setchbw = _FALSE; + + reg = rtw_hal_read_rfreg(padapter, 0, 0x18, 0x3FF); + if ((reg & 0xFF) == 0) + setchbw = _TRUE; + reg = rtw_hal_read_rfreg(padapter, 1, 0x18, 0x3FF); + if ((reg & 0xFF) == 0) + setchbw = _TRUE; + + if (setchbw) { + if (!rtw_mi_get_ch_setting_union(padapter, &union_ch, &union_bw, &union_offset)) { + RTW_INFO("Hit RF(0x18)=0!! restore original channel setting.\n"); + union_ch = pmlmeext->cur_channel; + union_offset = pmlmeext->cur_ch_offset ; + union_bw = pmlmeext->cur_bwmode; + } else { + RTW_INFO("Hit RF(0x18)=0!! set ch(%x) offset(%x) bwmode(%x)\n", union_ch, union_offset, union_bw); + } + /* Initial the channel_bw setting procedure. */ + pHalData->current_channel = 0; + set_channel_bwmode(padapter, union_ch, union_offset, union_bw); + } +} +#endif void expire_timeout_chk(_adapter *padapter) { @@ -398,8 +440,8 @@ void expire_timeout_chk(_adapter *padapter) /* check auth_queue */ #ifdef DBG_EXPIRATION_CHK if (rtw_end_of_queue_search(phead, plist) == _FALSE) { - RTW_INFO(FUNC_NDEV_FMT" auth_list, cnt:%u\n" - , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->auth_list_cnt); + RTW_INFO(FUNC_ADPT_FMT" auth_list, cnt:%u\n" + , FUNC_ADPT_ARG(padapter), pstapriv->auth_list_cnt); } #endif while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { @@ -420,9 +462,8 @@ void expire_timeout_chk(_adapter *padapter) rtw_list_delete(&psta->auth_list); pstapriv->auth_list_cnt--; - RTW_INFO("auth expire %02X%02X%02X%02X%02X%02X\n", - psta->cmn.mac_addr[0], psta->cmn.mac_addr[1], psta->cmn.mac_addr[2], - psta->cmn.mac_addr[3], psta->cmn.mac_addr[4], psta->cmn.mac_addr[5]); + RTW_INFO(FUNC_ADPT_FMT" auth expire "MAC_FMT"\n" + , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)); _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); @@ -448,8 +489,8 @@ void expire_timeout_chk(_adapter *padapter) /* check asoc_queue */ #ifdef DBG_EXPIRATION_CHK if (rtw_end_of_queue_search(phead, plist) == _FALSE) { - RTW_INFO(FUNC_NDEV_FMT" asoc_list, cnt:%u\n" - , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->asoc_list_cnt); + RTW_INFO(FUNC_ADPT_FMT" asoc_list, cnt:%u\n" + , FUNC_ADPT_ARG(padapter), pstapriv->asoc_list_cnt); } #endif while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { @@ -593,8 +634,8 @@ void expire_timeout_chk(_adapter *padapter) if (psta->sleepq_len > (NR_XMITFRAME / pstapriv->asoc_list_cnt) && padapter->xmitpriv.free_xmitframe_cnt < ((NR_XMITFRAME / pstapriv->asoc_list_cnt) / 2) ) { - RTW_INFO("%s sta:"MAC_FMT", sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n", __func__ - , MAC_ARG(psta->cmn.mac_addr) + RTW_INFO(FUNC_ADPT_FMT" sta:"MAC_FMT", sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n" + , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) , psta->sleepq_len, padapter->xmitpriv.free_xmitframe_cnt, pstapriv->asoc_list_cnt); wakeup_sta_to_xmit(padapter, psta); } @@ -604,10 +645,12 @@ void expire_timeout_chk(_adapter *padapter) _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); if (chk_alive_num) { +#if defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) u8 backup_ch = 0, backup_bw = 0, backup_offset = 0; u8 union_ch = 0, union_bw = 0, union_offset = 0; u8 switch_channel_by_drv = _TRUE; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +#endif char del_asoc_list[NUM_STA]; _rtw_memset(del_asoc_list, NUM_STA, NUM_STA); @@ -638,7 +681,9 @@ void expire_timeout_chk(_adapter *padapter) /* check loop */ for (i = 0; i < chk_alive_num; i++) { + #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK int ret = _FAIL; + #endif psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); @@ -659,12 +704,14 @@ void expire_timeout_chk(_adapter *padapter) psta->keep_alive_trycnt++; if (ret == _SUCCESS) { - RTW_INFO("asoc check, sta(" MAC_FMT ") is alive\n", MAC_ARG(psta->cmn.mac_addr)); + RTW_INFO(FUNC_ADPT_FMT" asoc check, "MAC_FMT" is alive\n" + , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)); psta->expire_to = pstapriv->expire_to; psta->keep_alive_trycnt = 0; continue; } else if (psta->keep_alive_trycnt <= 3) { - RTW_INFO("ack check for asoc expire, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); + RTW_INFO(FUNC_ADPT_FMT" asoc check, "MAC_FMT" keep_alive_trycnt=%d\n" + , FUNC_ADPT_ARG(padapter) , MAC_ARG(psta->cmn.mac_addr), psta->keep_alive_trycnt); psta->expire_to = 1; continue; } @@ -692,8 +739,9 @@ void expire_timeout_chk(_adapter *padapter) psta = rtw_get_stainfo_by_offset(pstapriv, del_asoc_list[i]); _rtw_memcpy(sta_addr, psta->cmn.mac_addr, ETH_ALEN); - RTW_INFO("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->cmn.mac_addr), psta->state); - updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING, _FALSE); + RTW_INFO(FUNC_ADPT_FMT" asoc expire "MAC_FMT", state=0x%x\n" + , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr), psta->state); + updated |= ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING, _FALSE); #ifdef CONFIG_RTW_MESH if (MLME_IS_MESH(padapter)) rtw_mesh_expire_peer(padapter, sta_addr); @@ -709,13 +757,14 @@ void expire_timeout_chk(_adapter *padapter) #endif } +#ifdef RTW_CONFIG_RFREG18_WA + rtw_check_restore_rf18(padapter); +#endif associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); } void rtw_ap_update_sta_ra_info(_adapter *padapter, struct sta_info *psta) { - int i; - u8 rf_type; unsigned char sta_band = 0; u64 tx_ra_bitmap = 0; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); @@ -902,8 +951,9 @@ _exit: void rtw_init_bmc_sta_tx_rate(_adapter *padapter, struct sta_info *psta) { - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +#ifdef CONFIG_BMC_TX_LOW_RATE struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +#endif u8 rate_idx = 0; u8 brate_table[] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M, MGN_9M, MGN_12M, MGN_18M, MGN_24M, MGN_36M, MGN_48M, MGN_54M}; @@ -954,7 +1004,7 @@ void update_bmc_sta(_adapter *padapter) psta->ieee8021x_blocked = 0; - memset((void *)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); + _rtw_memset((void *)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); /* psta->dot118021XPrivacy = _NO_PRIVACY_; */ /* !!! remove it, because it has been set before this. */ @@ -1134,7 +1184,7 @@ void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta) /* todo: init other variables */ - memset((void *)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); + _rtw_memset((void *)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); /* add ratid */ @@ -1144,17 +1194,20 @@ void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta) rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE); _enter_critical_bh(&psta->lock, &irqL); + + /* Check encryption */ + if (!MLME_IS_MESH(padapter) && psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) + psta->state |= WIFI_UNDER_KEY_HANDSHAKE; + psta->state |= _FW_LINKED; + _exit_critical_bh(&psta->lock, &irqL); - - } static void update_ap_info(_adapter *padapter, struct sta_info *psta) { struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; - struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); #ifdef CONFIG_80211N_HT struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; @@ -1205,7 +1258,7 @@ static void update_ap_info(_adapter *padapter, struct sta_info *psta) static void rtw_set_hw_wmm_param(_adapter *padapter) { - u8 ACI, ACM, AIFS, ECWMin, ECWMax, aSifsTime; + u8 AIFS, ECWMin, ECWMax, aSifsTime; u8 acm_mask; u16 TXOP; u32 acParm, i; @@ -1216,11 +1269,13 @@ static void rtw_set_hw_wmm_param(_adapter *padapter) struct registry_priv *pregpriv = &padapter->registrypriv; acm_mask = 0; - - if (is_supported_5g(pmlmeext->cur_wireless_mode) || - (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) +#ifdef CONFIG_80211N_HT + if (pregpriv->ht_enable && + (is_supported_5g(pmlmeext->cur_wireless_mode) || + (pmlmeext->cur_wireless_mode & WIRELESS_11_24N))) aSifsTime = 16; else +#endif /* CONFIG_80211N_HT */ aSifsTime = 10; if (pmlmeinfo->WMM_enable == 0) { @@ -1350,12 +1405,11 @@ static void rtw_set_hw_wmm_param(_adapter *padapter) } } - +#ifdef CONFIG_80211N_HT static void update_hw_ht_param(_adapter *padapter) { unsigned char max_AMPDU_len; unsigned char min_MPDU_spacing; - struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); @@ -1395,7 +1449,7 @@ static void update_hw_ht_param(_adapter *padapter) /* pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; */ } - +#endif /* CONFIG_80211N_HT */ static void rtw_ap_check_scan(_adapter *padapter) { _irqL irqL; @@ -1486,9 +1540,9 @@ static void rtw_ap_check_scan(_adapter *padapter) } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); - +#ifdef CONFIG_80211N_HT pmlmepriv->num_sta_no_ht = 0; /* reset to 0 after ap do scanning*/ - +#endif } void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter) @@ -1520,10 +1574,58 @@ void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter) update_ap_info(adapter, sta); } +#ifdef CONFIG_FW_HANDLE_TXBCN +bool rtw_ap_nums_check(_adapter *adapter) +{ + if (rtw_ap_get_nums(adapter) < CONFIG_LIMITED_AP_NUM) + return _TRUE; + return _FALSE; +} +u8 rtw_ap_allocate_vapid(struct dvobj_priv *dvobj) +{ + u8 vap_id; + + for (vap_id = 0; vap_id < CONFIG_LIMITED_AP_NUM; vap_id++) { + if (!(dvobj->vap_map & BIT(vap_id))) + break; + } + + if (vap_id < CONFIG_LIMITED_AP_NUM) + dvobj->vap_map |= BIT(vap_id); + + return vap_id; +} +u8 rtw_ap_release_vapid(struct dvobj_priv *dvobj, u8 vap_id) +{ + if (vap_id >= CONFIG_LIMITED_AP_NUM) { + RTW_ERR("%s - vapid(%d) failed\n", __func__, vap_id); + rtw_warn_on(1); + return _FAIL; + } + dvobj->vap_map &= ~ BIT(vap_id); + return _SUCCESS; +} +#endif +static void _rtw_iface_undersurvey_chk(const char *func, _adapter *adapter) +{ + int i; + _adapter *iface; + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct mlme_priv *pmlmepriv; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if ((iface) && rtw_is_adapter_up(iface)) { + pmlmepriv = &iface->mlmepriv; + if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) + RTW_ERR("%s ("ADPT_FMT") under survey\n", func, ADPT_ARG(iface)); + } + } +} void start_bss_network(_adapter *padapter, struct createbss_parm *parm) { #define DUMP_ADAPTERS_STATUS 0 - u8 self_action = MLME_ACTION_UNKNOWN; + u8 mlme_act = MLME_ACTION_UNKNOWN; u8 val8; u16 bcn_interval; u32 acparm; @@ -1536,27 +1638,28 @@ void start_bss_network(_adapter *padapter, struct createbss_parm *parm) WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); struct dvobj_priv *pdvobj = padapter->dvobj; s16 req_ch = REQ_CH_NONE, req_bw = REQ_BW_NONE, req_offset = REQ_OFFSET_NONE; - bool ch_setting_changed = _FALSE; u8 ch_to_set = 0, bw_to_set, offset_to_set; u8 doiqk = _FALSE; /* use for check ch bw offset can be allowed or not */ u8 chbw_allow = _TRUE; - - if (MLME_IS_AP(padapter)) - self_action = MLME_AP_STARTED; - else if (MLME_IS_MESH(padapter)) - self_action = MLME_MESH_STARTED; - else - rtw_warn_on(1); + int i; + u8 ifbmp_ch_changed = 0; if (parm->req_ch != 0) { /* bypass other setting, go checking ch, bw, offset */ + mlme_act = MLME_OPCH_SWITCH; req_ch = parm->req_ch; req_bw = parm->req_bw; req_offset = parm->req_offset; goto chbw_decision; } else { - /* inform this request comes from upper layer */ + /* request comes from upper layer */ + if (MLME_IS_AP(padapter)) + mlme_act = MLME_AP_STARTED; + else if (MLME_IS_MESH(padapter)) + mlme_act = MLME_MESH_STARTED; + else + rtw_warn_on(1); req_ch = 0; _rtw_memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length); } @@ -1606,21 +1709,6 @@ void start_bss_network(_adapter *padapter, struct createbss_parm *parm) /* Set BSSID REG */ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pnetwork->MacAddress); - /* Set EDCA param reg */ -#ifdef CONFIG_CONCURRENT_MODE - acparm = 0x005ea42b; -#else - acparm = 0x002F3217; /* VO */ -#endif - rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); - acparm = 0x005E4317; /* VI */ - rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); - /* acparm = 0x00105320; */ /* BE */ - acparm = 0x005ea42b; - rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); - acparm = 0x0000A444; /* BK */ - rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); - /* Set Security */ val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) ? 0xcc : 0xcf; rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); @@ -1628,19 +1716,32 @@ void start_bss_network(_adapter *padapter, struct createbss_parm *parm) /* Beacon Control related register */ rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&bcn_interval)); + rtw_hal_rcr_set_chk_bssid(padapter, mlme_act); + chbw_decision: - ch_setting_changed = rtw_ap_chbw_decision(padapter, req_ch, req_bw, req_offset - , &ch_to_set, &bw_to_set, &offset_to_set, &chbw_allow); + ifbmp_ch_changed = rtw_ap_chbw_decision(padapter, parm->ifbmp, parm->excl_ifbmp + , req_ch, req_bw, req_offset + , &ch_to_set, &bw_to_set, &offset_to_set, &chbw_allow); - /* let pnetwork_mlme == pnetwork_mlmeext */ - _rtw_memcpy(pnetwork, pnetwork_mlmeext, pnetwork_mlmeext->Length); + for (i = 0; i < pdvobj->iface_nums; i++) { + if (!(parm->ifbmp & BIT(i)) || !pdvobj->padapters[i]) + continue; - rtw_start_bss_hdl_after_chbw_decided(padapter); + /* let pnetwork_mlme == pnetwork_mlmeext */ + _rtw_memcpy(&(pdvobj->padapters[i]->mlmepriv.cur_network.network) + , &(pdvobj->padapters[i]->mlmeextpriv.mlmext_info.network) + , pdvobj->padapters[i]->mlmeextpriv.mlmext_info.network.Length); + + rtw_start_bss_hdl_after_chbw_decided(pdvobj->padapters[i]); + + /* Set EDCA param reg after update cur_wireless_mode & update_capinfo */ + if (pregpriv->wifi_spec == 1) + rtw_set_hw_wmm_param(pdvobj->padapters[i]); + } #if defined(CONFIG_DFS_MASTER) - rtw_dfs_master_status_apply(padapter, self_action); + rtw_dfs_rd_en_decision(padapter, mlme_act, parm->excl_ifbmp); #endif - rtw_hal_rcr_set_chk_bssid(padapter, self_action); #ifdef CONFIG_MCC_MODE if (MCC_EN(padapter)) { @@ -1680,80 +1781,124 @@ chbw_decision: rtw_hal_set_mcc_setting_start_bss_network(padapter, chbw_allow); #endif - if (ch_setting_changed == _TRUE - && (MLME_IS_GO(padapter) || MLME_IS_MESH(padapter)) /* pure AP is not needed*/ - ) { - #if defined(CONFIG_IOCTL_CFG80211) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) - rtw_cfg80211_ch_switch_notify(padapter - , pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset - , pmlmepriv->htpriv.ht_option); - #endif +#if defined(CONFIG_IOCTL_CFG80211) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) + for (i = 0; i < pdvobj->iface_nums; i++) { + if (!(ifbmp_ch_changed & BIT(i)) || !pdvobj->padapters[i]) + continue; + + /* pure AP is not needed*/ + if (MLME_IS_GO(pdvobj->padapters[i]) + || MLME_IS_MESH(pdvobj->padapters[i]) + ) { + u8 ht_option = 0; + + #ifdef CONFIG_80211N_HT + ht_option = pdvobj->padapters[i]->mlmepriv.htpriv.ht_option; + #endif + + rtw_cfg80211_ch_switch_notify(pdvobj->padapters[i] + , pdvobj->padapters[i]->mlmeextpriv.cur_channel + , pdvobj->padapters[i]->mlmeextpriv.cur_bwmode + , pdvobj->padapters[i]->mlmeextpriv.cur_ch_offset + , ht_option); + } } +#endif /* defined(CONFIG_IOCTL_CFG80211) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) */ if (DUMP_ADAPTERS_STATUS) { RTW_INFO(FUNC_ADPT_FMT" done\n", FUNC_ADPT_ARG(padapter)); dump_adapters_status(RTW_DBGDUMP , adapter_to_dvobj(padapter)); } +#ifdef CONFIG_MCC_MODE update_beacon: - /* update beacon content only if bstart_bss is _TRUE */ - if (_TRUE == pmlmeext->bstart_bss) { +#endif + for (i = 0; i < pdvobj->iface_nums; i++) { + struct mlme_priv *mlme; + + if (!(parm->ifbmp & BIT(i)) || !pdvobj->padapters[i]) + continue; + + /* update beacon content only if bstart_bss is _TRUE */ + if (pdvobj->padapters[i]->mlmeextpriv.bstart_bss != _TRUE) + continue; + + mlme = &(pdvobj->padapters[i]->mlmepriv); + + #ifdef CONFIG_80211N_HT + if ((ATOMIC_READ(&mlme->olbc) == _TRUE) || (ATOMIC_READ(&mlme->olbc_ht) == _TRUE)) { + /* AP is not starting a 40 MHz BSS in presence of an 802.11g BSS. */ + mlme->ht_op_mode &= (~HT_INFO_OPERATION_MODE_OP_MODE_MASK); + mlme->ht_op_mode |= OP_MODE_MAY_BE_LEGACY_STAS; + update_beacon(pdvobj->padapters[i], _HT_ADD_INFO_IE_, NULL, _FALSE); + } + #endif + + update_beacon(pdvobj->padapters[i], _TIM_IE_, NULL, _FALSE); + } + + if (mlme_act != MLME_OPCH_SWITCH + && pmlmeext->bstart_bss == _TRUE + ) { +#ifdef CONFIG_SUPPORT_MULTI_BCN _irqL irqL; - if ((ATOMIC_READ(&pmlmepriv->olbc) == _TRUE) || (ATOMIC_READ(&pmlmepriv->olbc_ht) == _TRUE)) { - /* AP is not starting a 40 MHz BSS in presence of an 802.11g BSS. */ - - pmlmepriv->ht_op_mode &= (~HT_INFO_OPERATION_MODE_OP_MODE_MASK); - pmlmepriv->ht_op_mode |= OP_MODE_MAY_BE_LEGACY_STAS; - update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE); - } - - update_beacon(padapter, _TIM_IE_, NULL, _FALSE); - -#ifdef CONFIG_SWTIMER_BASED_TXBCN _enter_critical_bh(&pdvobj->ap_if_q.lock, &irqL); if (rtw_is_list_empty(&padapter->list)) { + #ifdef CONFIG_FW_HANDLE_TXBCN + padapter->vap_id = rtw_ap_allocate_vapid(pdvobj); + #endif rtw_list_insert_tail(&padapter->list, get_list_head(&pdvobj->ap_if_q)); pdvobj->nr_ap_if++; pdvobj->inter_bcn_space = DEFAULT_BCN_INTERVAL / pdvobj->nr_ap_if; } _exit_critical_bh(&pdvobj->ap_if_q.lock, &irqL); + #ifdef CONFIG_SWTIMER_BASED_TXBCN + rtw_ap_set_mbid_num(padapter, pdvobj->nr_ap_if); rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&pdvobj->inter_bcn_space)); + #endif /*CONFIG_SWTIMER_BASED_TXBCN*/ -#endif /*CONFIG_SWTIMER_BASED_TXBCN*/ +#endif /*CONFIG_SUPPORT_MULTI_BCN*/ + #ifdef CONFIG_HW_P0_TSF_SYNC + correct_TSF(padapter, mlme_act); + #endif } rtw_scan_wait_completed(padapter); + _rtw_iface_undersurvey_chk(__func__, padapter); /* send beacon */ - if (!rtw_mi_check_fwstate(padapter, _FW_UNDER_SURVEY)) { - - /*update_beacon(padapter, _TIM_IE_, NULL, _TRUE);*/ - + ResumeTxBeacon(padapter); + { #if !defined(CONFIG_INTERRUPT_BASED_TXBCN) -#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_PCI_BCN_POLLING) #ifdef CONFIG_SWTIMER_BASED_TXBCN - if (pdvobj->nr_ap_if == 1) { + if (pdvobj->nr_ap_if == 1 + && mlme_act != MLME_OPCH_SWITCH + ) { RTW_INFO("start SW BCN TIMER!\n"); _set_timer(&pdvobj->txbcn_timer, bcn_interval); } #else - /* other case will tx beacon when bcn interrupt coming in. */ - if (send_beacon(padapter) == _FAIL) - RTW_INFO("issue_beacon, fail!\n"); + for (i = 0; i < pdvobj->iface_nums; i++) { + if (!(parm->ifbmp & BIT(i)) || !pdvobj->padapters[i]) + continue; + + if (send_beacon(pdvobj->padapters[i]) == _FAIL) + RTW_INFO(ADPT_FMT" issue_beacon, fail!\n", ADPT_ARG(pdvobj->padapters[i])); + } #endif #endif #endif /* !defined(CONFIG_INTERRUPT_BASED_TXBCN) */ + +#ifdef CONFIG_FW_HANDLE_TXBCN + if (mlme_act != MLME_OPCH_SWITCH) + rtw_ap_mbid_bcn_en(padapter, padapter->vap_id); +#endif } - - /*Set EDCA param reg after update cur_wireless_mode & update_capinfo*/ - if (pregpriv->wifi_spec == 1) - rtw_set_hw_wmm_param(padapter); - - /*pmlmeext->bstart_bss = _TRUE;*/ } int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) @@ -1765,25 +1910,23 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) u16 cap, ht_cap = _FALSE; uint ie_len = 0; int group_cipher, pairwise_cipher; + u32 akm; u8 mfp_opt = MFP_NO; - u8 channel, network_type, supportRate[NDIS_802_11_LENGTH_RATES_EX]; - int supportRateNum = 0; + u8 channel, network_type; u8 OUI1[] = {0x00, 0x50, 0xf2, 0x01}; - u8 wps_oui[4] = {0x0, 0x50, 0xf2, 0x04}; u8 WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; HT_CAP_AMPDU_DENSITY best_ampdu_density; struct registry_priv *pregistrypriv = &padapter->registrypriv; struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); WLAN_BSSID_EX *pbss_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; - struct sta_priv *pstapriv = &padapter->stapriv; u8 *ie = pbss_network->IEs; u8 vht_cap = _FALSE; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); u8 rf_num = 0; - + int ret_rm; /* SSID */ /* Supported rates */ /* DS Params */ @@ -1806,7 +1949,7 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) pbss_network->IELength = len; - memset(ie, 0, MAX_IE_SZ); + _rtw_memset(ie, 0, MAX_IE_SZ); _rtw_memcpy(ie, pbuf, pbss_network->IELength); @@ -1839,7 +1982,7 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) /* SSID */ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); if (p && ie_len > 0) { - memset(&pbss_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); + _rtw_memset(&pbss_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); _rtw_memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len); pbss_network->Ssid.SsidLength = ie_len; #ifdef CONFIG_P2P @@ -1869,32 +2012,21 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) pbss_network->Configuration.DSConfig = channel; - - memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX); - /* get supported rates */ - p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); - if (p != NULL) { - _rtw_memcpy(supportRate, p + 2, ie_len); - supportRateNum = ie_len; - } - - /* get ext_supported rates */ - p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_); - if (p != NULL) { - _rtw_memcpy(supportRate + supportRateNum, p + 2, ie_len); - supportRateNum += ie_len; - - } - - network_type = rtw_check_network_type(supportRate, supportRateNum, channel); - - rtw_set_supported_rate(pbss_network->SupportedRates, network_type); - + /* support rate ie & ext support ie & IElen & SupportedRates */ + network_type = rtw_update_rate_bymode(pbss_network, pregistrypriv->wireless_mode); /* parsing ERP_IE */ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); - if (p && ie_len > 0) - ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); + if (p && ie_len > 0) { + if(padapter->registrypriv.wireless_mode == WIRELESS_11B ) { + + pbss_network->IELength = pbss_network->IELength - *(p+1) - 2; + ret_rm = rtw_ies_remove_ie(ie , &len, _BEACON_IE_OFFSET_, _ERPINFO_IE_,NULL,0); + RTW_DBG("%s, remove_ie of ERP_IE=%d\n", __FUNCTION__, ret_rm); + } else + ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); + + } /* update privacy/security */ if (cap & BIT(4)) @@ -1905,20 +2037,30 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) psecuritypriv->wpa_psk = 0; /* wpa2 */ + akm = 0; group_cipher = 0; pairwise_cipher = 0; psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); if (p && ie_len > 0) { - if (rtw_parse_wpa2_ie(p, ie_len + 2, &group_cipher, &pairwise_cipher, NULL, &mfp_opt) == _SUCCESS) { + if (rtw_parse_wpa2_ie(p, ie_len + 2, &group_cipher, &pairwise_cipher, &akm, &mfp_opt) == _SUCCESS) { psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; - + psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; psecuritypriv->dot8021xalg = 1;/* psk, todo:802.1x */ psecuritypriv->wpa_psk |= BIT(1); psecuritypriv->wpa2_group_cipher = group_cipher; psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher; + + /* + Kernel < v5.1, the auth_type set as NL80211_AUTHTYPE_AUTOMATIC + in cfg80211_rtw_start_ap(). + if the AKM SAE in the RSN IE, we have to update the auth_type for SAE + in rtw_check_beacon_data(). + */ + if (CHECK_BIT(WLAN_AKM_TYPE_SAE, akm)) + psecuritypriv->auth_type = NL80211_AUTHTYPE_SAE; #if 0 switch (group_cipher) { case WPA_CIPHER_NONE: @@ -1971,7 +2113,7 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) if ((p) && (_rtw_memcmp(p + 2, OUI1, 4))) { if (rtw_parse_wpa_ie(p, ie_len + 2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; - + psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK; psecuritypriv->dot8021xalg = 1;/* psk, todo:802.1x */ psecuritypriv->wpa_psk |= BIT(0); @@ -2061,6 +2203,8 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) *(p + 18) &= ~BIT(4); /* VI */ *(p + 22) &= ~BIT(4); /* VO */ + WMM_param_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); + break; } @@ -2069,153 +2213,137 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) } } #ifdef CONFIG_80211N_HT - /* parsing HT_CAP_IE */ - p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); - if (p && ie_len > 0) { - u8 rf_type = 0; - HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor = MAX_AMPDU_FACTOR_64K; - struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p + 2); + if(padapter->registrypriv.ht_enable && + is_supported_ht(padapter->registrypriv.wireless_mode)) { + /* parsing HT_CAP_IE */ + p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); + if (p && ie_len > 0) { + u8 rf_type = 0; + HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor = MAX_AMPDU_FACTOR_64K; + struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p + 2); - if (0) { - RTW_INFO(FUNC_ADPT_FMT" HT_CAP_IE from upper layer:\n", FUNC_ADPT_ARG(padapter)); - dump_ht_cap_ie_content(RTW_DBGDUMP, p + 2, ie_len); - } - - pHT_caps_ie = p; - - ht_cap = _TRUE; - network_type |= WIRELESS_11_24N; - - rtw_ht_use_default_setting(padapter); - - /* Update HT Capabilities Info field */ - if (pmlmepriv->htpriv.sgi_20m == _FALSE) - pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_20); - - if (pmlmepriv->htpriv.sgi_40m == _FALSE) - pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_40); - - if (!TEST_FLAG(pmlmepriv->htpriv.ldpc_cap, LDPC_HT_ENABLE_RX)) - pht_cap->cap_info &= ~(IEEE80211_HT_CAP_LDPC_CODING); - - if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_TX)) - pht_cap->cap_info &= ~(IEEE80211_HT_CAP_TX_STBC); - - if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_RX)) - pht_cap->cap_info &= ~(IEEE80211_HT_CAP_RX_STBC_3R); - - /* Update A-MPDU Parameters field */ - pht_cap->ampdu_params_info &= ~(IEEE80211_HT_CAP_AMPDU_FACTOR | IEEE80211_HT_CAP_AMPDU_DENSITY); - - if ((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) || - (psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP)) { - rtw_hal_get_def_var(padapter, HW_VAR_BEST_AMPDU_DENSITY, &best_ampdu_density); - pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY & (best_ampdu_density << 2)); - } else - pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY & 0x00); - - rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); - pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & max_rx_ampdu_factor); /* set Max Rx AMPDU size to 64K */ - - _rtw_memcpy(&(pmlmeinfo->HT_caps), pht_cap, sizeof(struct HT_caps_element)); - - /* Update Supported MCS Set field */ - { - struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); - u8 rx_nss = 0; - int i; - - rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); - rx_nss = rtw_min(rf_type_to_rf_rx_cnt(rf_type), hal_spec->rx_nss_num); - - /* RX MCS Bitmask */ - switch (rx_nss) { - case 1: - set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_1R); - break; - case 2: - set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_2R); - break; - case 3: - set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_3R); - break; - case 4: - set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_4R); - break; - default: - RTW_WARN("rf_type:%d or rx_nss:%u is not expected\n", rf_type, hal_spec->rx_nss_num); + if (0) { + RTW_INFO(FUNC_ADPT_FMT" HT_CAP_IE from upper layer:\n", FUNC_ADPT_ARG(padapter)); + dump_ht_cap_ie_content(RTW_DBGDUMP, p + 2, ie_len); + } + + pHT_caps_ie = p; + + ht_cap = _TRUE; + network_type |= WIRELESS_11_24N; + + rtw_ht_use_default_setting(padapter); + + /* Update HT Capabilities Info field */ + if (pmlmepriv->htpriv.sgi_20m == _FALSE) + pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_20); + + if (pmlmepriv->htpriv.sgi_40m == _FALSE) + pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_40); + + if (!TEST_FLAG(pmlmepriv->htpriv.ldpc_cap, LDPC_HT_ENABLE_RX)) + pht_cap->cap_info &= ~(IEEE80211_HT_CAP_LDPC_CODING); + + if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_TX)) + pht_cap->cap_info &= ~(IEEE80211_HT_CAP_TX_STBC); + + if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_RX)) + pht_cap->cap_info &= ~(IEEE80211_HT_CAP_RX_STBC_3R); + + /* Update A-MPDU Parameters field */ + pht_cap->ampdu_params_info &= ~(IEEE80211_HT_CAP_AMPDU_FACTOR | IEEE80211_HT_CAP_AMPDU_DENSITY); + + if ((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) || + (psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP)) { + rtw_hal_get_def_var(padapter, HW_VAR_BEST_AMPDU_DENSITY, &best_ampdu_density); + pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY & (best_ampdu_density << 2)); + } else + pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY & 0x00); + + rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); + pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & max_rx_ampdu_factor); /* set Max Rx AMPDU size to 64K */ + + _rtw_memcpy(&(pmlmeinfo->HT_caps), pht_cap, sizeof(struct HT_caps_element)); + + /* Update Supported MCS Set field */ + { + struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); + u8 rx_nss = 0; + int i; + + rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); + rx_nss = rtw_min(rf_type_to_rf_rx_cnt(rf_type), hal_spec->rx_nss_num); + + /* RX MCS Bitmask */ + switch (rx_nss) { + case 1: + set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_1R); + break; + case 2: + set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_2R); + break; + case 3: + set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_3R); + break; + case 4: + set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_4R); + break; + default: + RTW_WARN("rf_type:%d or rx_nss:%u is not expected\n", rf_type, hal_spec->rx_nss_num); + } + for (i = 0; i < 10; i++) + *(HT_CAP_ELE_RX_MCS_MAP(pht_cap) + i) &= padapter->mlmeextpriv.default_supported_mcs_set[i]; } - for (i = 0; i < 10; i++) - *(HT_CAP_ELE_RX_MCS_MAP(pht_cap) + i) &= padapter->mlmeextpriv.default_supported_mcs_set[i]; - } #ifdef CONFIG_BEAMFORMING - /* Use registry value to enable HT Beamforming. */ - /* ToDo: use configure file to set these capability. */ - pht_cap->tx_BF_cap_info = 0; + /* Use registry value to enable HT Beamforming. */ + /* ToDo: use configure file to set these capability. */ + pht_cap->tx_BF_cap_info = 0; - /* HT Beamformer */ - if (TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { - /* Transmit NDP Capable */ - SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(pht_cap, 1); - /* Explicit Compressed Steering Capable */ - SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pht_cap, 1); - /* Compressed Steering Number Antennas */ - SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, 1); - rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num); - SET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(pht_cap, rf_num); - } + /* HT Beamformer */ + if (TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { + /* Transmit NDP Capable */ + SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(pht_cap, 1); + /* Explicit Compressed Steering Capable */ + SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pht_cap, 1); + /* Compressed Steering Number Antennas */ + SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, 1); + rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num); + SET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(pht_cap, rf_num); + } - /* HT Beamformee */ - if (TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) { - /* Receive NDP Capable */ - SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(pht_cap, 1); - /* Explicit Compressed Beamforming Feedback Capable */ - SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pht_cap, 2); - rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num); - SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, rf_num); - } + /* HT Beamformee */ + if (TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) { + /* Receive NDP Capable */ + SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(pht_cap, 1); + /* Explicit Compressed Beamforming Feedback Capable */ + SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pht_cap, 2); + rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num); + SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, rf_num); + } #endif /* CONFIG_BEAMFORMING */ - _rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p + 2, ie_len); + _rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p + 2, ie_len); - if (0) { - RTW_INFO(FUNC_ADPT_FMT" HT_CAP_IE driver masked:\n", FUNC_ADPT_ARG(padapter)); - dump_ht_cap_ie_content(RTW_DBGDUMP, p + 2, ie_len); + if (0) { + RTW_INFO(FUNC_ADPT_FMT" HT_CAP_IE driver masked:\n", FUNC_ADPT_ARG(padapter)); + dump_ht_cap_ie_content(RTW_DBGDUMP, p + 2, ie_len); + } } - } - /* parsing HT_INFO_IE */ - p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); - if (p && ie_len > 0) { - pHT_info_ie = p; - if (channel == 0) - pbss_network->Configuration.DSConfig = GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2); - else if (channel != GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2)) { - RTW_INFO(FUNC_ADPT_FMT" ch inconsistent, DSSS:%u, HT primary:%u\n" - , FUNC_ADPT_ARG(padapter), channel, GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2)); + /* parsing HT_INFO_IE */ + p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); + if (p && ie_len > 0) { + pHT_info_ie = p; + if (channel == 0) + pbss_network->Configuration.DSConfig = GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2); + else if (channel != GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2)) { + RTW_INFO(FUNC_ADPT_FMT" ch inconsistent, DSSS:%u, HT primary:%u\n" + , FUNC_ADPT_ARG(padapter), channel, GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2)); + } } } #endif /* CONFIG_80211N_HT */ - - switch (network_type) { - case WIRELESS_11B: - pbss_network->NetworkTypeInUse = Ndis802_11DS; - break; - case WIRELESS_11G: - case WIRELESS_11BG: - case WIRELESS_11G_24N: - case WIRELESS_11BG_24N: - pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; - break; - case WIRELESS_11A: - pbss_network->NetworkTypeInUse = Ndis802_11OFDM5; - break; - default: - pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; - break; - } - pmlmepriv->cur_network.network_type = network_type; #ifdef CONFIG_80211N_HT @@ -2228,7 +2356,9 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) } /* ht_cap */ - if (pregistrypriv->ht_enable && ht_cap == _TRUE) { + if (padapter->registrypriv.ht_enable && + is_supported_ht(padapter->registrypriv.wireless_mode) && ht_cap == _TRUE) { + pmlmepriv->htpriv.ht_option = _TRUE; pmlmepriv->qospriv.qos_option = 1; @@ -2241,23 +2371,22 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) #endif #ifdef CONFIG_80211AC_VHT - - /* Parsing VHT CAP IE */ - p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); - if (p && ie_len > 0) - vht_cap = _TRUE; - - /* Parsing VHT OPERATION IE */ - pmlmepriv->ori_vht_en = 0; pmlmepriv->vhtpriv.vht_option = _FALSE; - /* if channel in 5G band, then add vht ie . */ - if ((pbss_network->Configuration.DSConfig > 14) - && (pmlmepriv->htpriv.ht_option == _TRUE) + + if (pmlmepriv->htpriv.ht_option == _TRUE + && pbss_network->Configuration.DSConfig > 14 && REGSTY_IS_11AC_ENABLE(pregistrypriv) - && hal_chk_proto_cap(padapter, PROTO_CAP_11AC) + && is_supported_vht(pregistrypriv->wireless_mode) && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) ) { + /* Parsing VHT CAP IE */ + p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); + if (p && ie_len > 0) + vht_cap = _TRUE; + + /* Parsing VHT OPERATION IE */ + if (vht_cap == _TRUE && MLME_IS_MESH(padapter) /* allow only mesh temporarily before VHT IE checking is ready */ ) { @@ -2274,7 +2403,11 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) rtw_vht_ies_detach(padapter, pbss_network); #endif /* CONFIG_80211AC_VHT */ - if(pbss_network->Configuration.DSConfig <= 14 && padapter->registrypriv.wifi_spec == 1) { +#ifdef CONFIG_80211N_HT + if(padapter->registrypriv.ht_enable && + is_supported_ht(padapter->registrypriv.wireless_mode) && + pbss_network->Configuration.DSConfig <= 14 && padapter->registrypriv.wifi_spec == 1 && + pbss_network->IELength + 10 <= MAX_IE_SZ) { uint len = 0; SET_EXT_CAPABILITY_ELE_BSS_COEXIST(pmlmepriv->ext_capab_ie_data, 1); @@ -2282,6 +2415,7 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) rtw_set_ie(pbss_network->IEs + pbss_network->IELength, EID_EXTCapability, 8, pmlmepriv->ext_capab_ie_data, &len); pbss_network->IELength += pmlmepriv->ext_capab_ie_len; } +#endif /* CONFIG_80211N_HT */ pbss_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pbss_network); @@ -2383,6 +2517,9 @@ static void _rtw_macaddr_acl_deinit(_adapter *adapter, u8 period, bool clear_onl } _exit_critical_bh(&(acl_node_q->lock), &irqL); + if (!clear_only) + _rtw_spinlock_free(&(acl_node_q->lock)); + rtw_warn_on(acl->num); acl->mode = RTW_ACL_MODE_DISABLED; } @@ -2606,7 +2743,7 @@ static int rtw_ap_set_key(_adapter *padapter, u8 *key, u8 alg, int keyid, u8 set goto exit; } - memset(psetkeyparm, 0, sizeof(struct setkey_parm)); + _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); psetkeyparm->keyid = (u8)keyid; if (is_wep_enc(alg)) @@ -2781,7 +2918,7 @@ static void associated_stainfo_update(_adapter *padapter, struct sta_info *psta, struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); RTW_INFO("%s: "MAC_FMT", updated_type=0x%x\n", __func__, MAC_ARG(psta->cmn.mac_addr), sta_info_type); - +#ifdef CONFIG_80211N_HT if (sta_info_type & STA_INFO_UPDATE_BW) { if ((psta->flags & WLAN_STA_HT) && !psta->ht_20mhz_set) { @@ -2794,7 +2931,7 @@ static void associated_stainfo_update(_adapter *padapter, struct sta_info *psta, } } } - +#endif /* CONFIG_80211N_HT */ /* if (sta_info_type & STA_INFO_UPDATE_RATE) { @@ -2883,6 +3020,7 @@ static void update_bcn_htcap_ie(_adapter *padapter) static void update_bcn_htinfo_ie(_adapter *padapter) { +#ifdef CONFIG_80211N_HT /* u8 beacon_updated = _FALSE; u32 sta_info_update_type = STA_INFO_UPDATE_NONE; @@ -2961,7 +3099,7 @@ static void update_bcn_htinfo_ie(_adapter *padapter) } /*associated_clients_update(padapter, beacon_updated, sta_info_update_type);*/ - +#endif /* CONFIG_80211N_HT */ } static void update_bcn_rsn_ie(_adapter *padapter) @@ -3138,7 +3276,7 @@ void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *ta _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); #ifndef CONFIG_INTERRUPT_BASED_TXBCN -#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_PCI_BCN_POLLING) if (tx && updated) { /* send_beacon(padapter); */ /* send_beacon must execute on TSR level */ if (0) @@ -3225,25 +3363,23 @@ void rtw_process_ht_action_smps(_adapter *padapter, u8 *ta, u8 ctrl_field) if (psta == NULL) return; - e_field = (ctrl_field & BIT(0)) ? 1 : 0; - m_field = (ctrl_field & BIT(1)) ? 1 : 0; + e_field = (ctrl_field & BIT(0)) ? 1 : 0; /*SM Power Save Enabled*/ + m_field = (ctrl_field & BIT(1)) ? 1 : 0; /*SM Mode, 0:static SMPS, 1:dynamic SMPS*/ if (e_field) { - - /* enable */ - /* 0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/ - - if (m_field) /*mode*/ - psta->htpriv.smps_cap = 1; + if (m_field) { /*mode*/ + psta->htpriv.smps_cap = WLAN_HT_CAP_SM_PS_DYNAMIC; + RTW_ERR("Don't support dynamic SMPS\n"); + } else - psta->htpriv.smps_cap = 0; + psta->htpriv.smps_cap = WLAN_HT_CAP_SM_PS_STATIC; } else { /*disable*/ - psta->htpriv.smps_cap = 3; + psta->htpriv.smps_cap = WLAN_HT_CAP_SM_PS_DISABLED; } - rtw_dm_ra_mask_wk_cmd(padapter, (u8 *)psta); - + if (psta->htpriv.smps_cap != WLAN_HT_CAP_SM_PS_DYNAMIC) + rtw_ssmps_wk_cmd(padapter, psta, e_field, 1); } /* @@ -3472,64 +3608,67 @@ void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta) } #ifdef CONFIG_80211N_HT - if (psta->flags & WLAN_STA_HT) { - u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info); + if(padapter->registrypriv.ht_enable && + is_supported_ht(padapter->registrypriv.wireless_mode)) { + if (psta->flags & WLAN_STA_HT) { + u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info); - RTW_INFO("HT: STA " MAC_FMT " HT Capabilities Info: 0x%04x\n", - MAC_ARG(psta->cmn.mac_addr), ht_capab); + RTW_INFO("HT: STA " MAC_FMT " HT Capabilities Info: 0x%04x\n", + MAC_ARG(psta->cmn.mac_addr), ht_capab); - if (psta->no_ht_set) { - psta->no_ht_set = 0; - pmlmepriv->num_sta_no_ht--; - } - - if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) { - if (!psta->no_ht_gf_set) { - psta->no_ht_gf_set = 1; - pmlmepriv->num_sta_ht_no_gf++; + if (psta->no_ht_set) { + psta->no_ht_set = 0; + pmlmepriv->num_sta_no_ht--; } - RTW_INFO("%s STA " MAC_FMT " - no " - "greenfield, num of non-gf stations %d\n", - __FUNCTION__, MAC_ARG(psta->cmn.mac_addr), - pmlmepriv->num_sta_ht_no_gf); - } - if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) { - if (!psta->ht_20mhz_set) { - psta->ht_20mhz_set = 1; - pmlmepriv->num_sta_ht_20mhz++; + if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) { + if (!psta->no_ht_gf_set) { + psta->no_ht_gf_set = 1; + pmlmepriv->num_sta_ht_no_gf++; + } + RTW_INFO("%s STA " MAC_FMT " - no " + "greenfield, num of non-gf stations %d\n", + __FUNCTION__, MAC_ARG(psta->cmn.mac_addr), + pmlmepriv->num_sta_ht_no_gf); + } + + if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) { + if (!psta->ht_20mhz_set) { + psta->ht_20mhz_set = 1; + pmlmepriv->num_sta_ht_20mhz++; + } + RTW_INFO("%s STA " MAC_FMT " - 20 MHz HT, " + "num of 20MHz HT STAs %d\n", + __FUNCTION__, MAC_ARG(psta->cmn.mac_addr), + pmlmepriv->num_sta_ht_20mhz); + } + + if (((ht_capab & RTW_IEEE80211_HT_CAP_40MHZ_INTOLERANT) != 0) && + (psta->ht_40mhz_intolerant == 0)) { + psta->ht_40mhz_intolerant = 1; + pmlmepriv->num_sta_40mhz_intolerant++; + RTW_INFO("%s STA " MAC_FMT " - 40MHZ_INTOLERANT, ", + __FUNCTION__, MAC_ARG(psta->cmn.mac_addr)); + } + + } else { + if (!psta->no_ht_set) { + psta->no_ht_set = 1; + pmlmepriv->num_sta_no_ht++; + } + if (pmlmepriv->htpriv.ht_option == _TRUE) { + RTW_INFO("%s STA " MAC_FMT + " - no HT, num of non-HT stations %d\n", + __FUNCTION__, MAC_ARG(psta->cmn.mac_addr), + pmlmepriv->num_sta_no_ht); } - RTW_INFO("%s STA " MAC_FMT " - 20 MHz HT, " - "num of 20MHz HT STAs %d\n", - __FUNCTION__, MAC_ARG(psta->cmn.mac_addr), - pmlmepriv->num_sta_ht_20mhz); } - if (((ht_capab & RTW_IEEE80211_HT_CAP_40MHZ_INTOLERANT) != 0) && - (psta->ht_40mhz_intolerant == 0)) { - psta->ht_40mhz_intolerant = 1; - pmlmepriv->num_sta_40mhz_intolerant++; - RTW_INFO("%s STA " MAC_FMT " - 40MHZ_INTOLERANT, ", - __FUNCTION__, MAC_ARG(psta->cmn.mac_addr)); + if (rtw_ht_operation_update(padapter) > 0) { + update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); + update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE); + beacon_updated = _TRUE; } - - } else { - if (!psta->no_ht_set) { - psta->no_ht_set = 1; - pmlmepriv->num_sta_no_ht++; - } - if (pmlmepriv->htpriv.ht_option == _TRUE) { - RTW_INFO("%s STA " MAC_FMT - " - no HT, num of non-HT stations %d\n", - __FUNCTION__, MAC_ARG(psta->cmn.mac_addr), - pmlmepriv->num_sta_no_ht); - } - } - - if (rtw_ht_operation_update(padapter) > 0) { - update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); - update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE); - beacon_updated = _TRUE; } #endif /* CONFIG_80211N_HT */ @@ -3652,9 +3791,6 @@ u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reaso { _irqL irqL; u8 beacon_updated = _FALSE; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct sta_priv *pstapriv = &padapter->stapriv; if (!psta) return beacon_updated; @@ -3682,15 +3818,23 @@ u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reaso beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_LEAVE, psta->cmn.mac_addr, ETH_ALEN, 1); #endif +#ifdef CONFIG_80211N_HT psta->htpriv.agg_enable_bitmap = 0x0;/* reset */ psta->htpriv.candidate_tid_bitmap = 0x0;/* reset */ +#endif /* clear cam entry / key */ rtw_clearstakey_cmd(padapter, psta, enqueue); _enter_critical_bh(&psta->lock, &irqL); - psta->state &= ~_FW_LINKED; + psta->state &= ~(_FW_LINKED | WIFI_UNDER_KEY_HANDSHAKE); + + if ((psta->auth_len != 0) && (psta->pauth_frame != NULL)) { + rtw_mfree(psta->pauth_frame, psta->auth_len); + psta->pauth_frame = NULL; + psta->auth_len = 0; + } _exit_critical_bh(&psta->lock, &irqL); if (!MLME_IS_MESH(padapter)) { @@ -3706,6 +3850,7 @@ u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reaso rtw_indicate_sta_disassoc_event(padapter, psta); #endif } + beacon_updated = bss_cap_update_on_sta_leave(padapter, psta); report_del_sta_event(padapter, psta->cmn.mac_addr, reason, enqueue, _FALSE); @@ -3757,8 +3902,6 @@ int rtw_sta_flush(_adapter *padapter, bool enqueue) int ret = 0; struct sta_info *psta = NULL; struct sta_priv *pstapriv = &padapter->stapriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; u8 flush_num = 0; char flush_list[NUM_STA]; @@ -3867,9 +4010,7 @@ void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta) /* restore hw setting from sw data structures */ void rtw_ap_restore_network(_adapter *padapter) { - struct mlme_priv *mlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *psta; struct security_priv *psecuritypriv = &(padapter->securitypriv); @@ -3938,7 +4079,9 @@ void start_ap_mode(_adapter *padapter) struct sta_priv *pstapriv = &padapter->stapriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +#ifdef CONFIG_CONCURRENT_MODE struct security_priv *psecuritypriv = &padapter->securitypriv; +#endif pmlmepriv->update_bcn = _FALSE; @@ -3972,7 +4115,7 @@ void start_ap_mode(_adapter *padapter) pmlmepriv->sw_to_20mhz = 0; #endif - memset(pmlmepriv->ext_capab_ie_data, 0, sizeof(pmlmepriv->ext_capab_ie_data)); + _rtw_memset(pmlmepriv->ext_capab_ie_data, 0, sizeof(pmlmepriv->ext_capab_ie_data)); pmlmepriv->ext_capab_ie_len = 0; #ifdef CONFIG_CONCURRENT_MODE @@ -4017,11 +4160,13 @@ void rtw_ap_bcmc_sta_flush(_adapter *padapter) void stop_ap_mode(_adapter *padapter) { u8 self_action = MLME_ACTION_UNKNOWN; - _irqL irqL; struct sta_info *psta = NULL; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +#ifdef CONFIG_SUPPORT_MULTI_BCN struct dvobj_priv *pdvobj = padapter->dvobj; + _irqL irqL; +#endif RTW_INFO("%s -"ADPT_FMT"\n", __func__, ADPT_ARG(padapter)); @@ -4033,15 +4178,17 @@ void stop_ap_mode(_adapter *padapter) rtw_warn_on(1); pmlmepriv->update_bcn = _FALSE; + /*pmlmeext->bstart_bss = _FALSE;*/ padapter->netif_up = _FALSE; + /* _rtw_spinlock_free(&pmlmepriv->bcn_update_lock); */ /* reset and init security priv , this can refine with rtw_reset_securitypriv */ - memset((unsigned char *)&padapter->securitypriv, 0, sizeof(struct security_priv)); + _rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof(struct security_priv)); padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; padapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; #ifdef CONFIG_DFS_MASTER - rtw_dfs_master_status_apply(padapter, self_action); + rtw_dfs_rd_en_decision(padapter, self_action, 0); #endif /* free scan queue */ @@ -4067,22 +4214,35 @@ void stop_ap_mode(_adapter *padapter) rtw_free_mlme_priv_ie_data(pmlmepriv); -#ifdef CONFIG_SWTIMER_BASED_TXBCN +#ifdef CONFIG_SUPPORT_MULTI_BCN if (pmlmeext->bstart_bss == _TRUE) { + #ifdef CONFIG_FW_HANDLE_TXBCN + u8 free_apid = CONFIG_LIMITED_AP_NUM; + #endif + _enter_critical_bh(&pdvobj->ap_if_q.lock, &irqL); pdvobj->nr_ap_if--; if (pdvobj->nr_ap_if > 0) pdvobj->inter_bcn_space = DEFAULT_BCN_INTERVAL / pdvobj->nr_ap_if; else pdvobj->inter_bcn_space = DEFAULT_BCN_INTERVAL; - + #ifdef CONFIG_FW_HANDLE_TXBCN + rtw_ap_release_vapid(pdvobj, padapter->vap_id); + free_apid = padapter->vap_id; + padapter->vap_id = CONFIG_LIMITED_AP_NUM; + #endif rtw_list_delete(&padapter->list); _exit_critical_bh(&pdvobj->ap_if_q.lock, &irqL); + #ifdef CONFIG_FW_HANDLE_TXBCN + rtw_ap_mbid_bcn_dis(padapter, free_apid); + #endif + #ifdef CONFIG_SWTIMER_BASED_TXBCN rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&pdvobj->inter_bcn_space)); if (pdvobj->nr_ap_if == 0) _cancel_timer_ex(&pdvobj->txbcn_timer); + #endif } #endif @@ -4090,6 +4250,10 @@ void stop_ap_mode(_adapter *padapter) rtw_hal_rcr_set_chk_bssid(padapter, self_action); +#ifdef CONFIG_HW_P0_TSF_SYNC + correct_TSF(padapter, self_action); +#endif + #ifdef CONFIG_BT_COEXIST rtw_btcoex_MediaStatusNotify(padapter, 0); /* disconnect */ #endif @@ -4222,46 +4386,282 @@ void rtw_ap_update_bss_chbw(_adapter *adapter, WLAN_BSSID_EX *bss, u8 ch, u8 bw, #endif /* CONFIG_80211N_HT */ } -/* -* return _TRUE if ch setting differs from mlmeext.network -*/ -bool rtw_ap_chbw_decision(_adapter *adapter, s16 req_ch, s8 req_bw, s8 req_offset - , u8 *ch, u8 *bw, u8 *offset, u8 *chbw_allow) +static u8 rtw_ap_update_chbw_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp + , u8 cur_ie_ch[], u8 cur_ie_bw[], u8 cur_ie_offset[] + , u8 dec_ch[], u8 dec_bw[], u8 dec_offset[] + , const char *caller) { + _adapter *iface; + struct mlme_ext_priv *mlmeext; + WLAN_BSSID_EX *network; + u8 ifbmp_ch_changed = 0; + int i; + + for (i = 0; i < dvobj->iface_nums; i++) { + if (!(ifbmp & BIT(i)) || !dvobj->padapters) + continue; + + iface = dvobj->padapters[i]; + mlmeext = &(iface->mlmeextpriv); + + if (MLME_IS_ASOC(iface)) { + RTW_INFO(FUNC_ADPT_FMT" %u,%u,%u => %u,%u,%u%s\n", caller, ADPT_ARG(iface) + , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset + , dec_ch[i], dec_bw[i], dec_offset[i] + , MLME_IS_OPCH_SW(iface) ? " OPCH_SW" : ""); + } else { + RTW_INFO(FUNC_ADPT_FMT" %u,%u,%u => %u,%u,%u%s\n", caller, ADPT_ARG(iface) + , cur_ie_ch[i], cur_ie_bw[i], cur_ie_offset[i] + , dec_ch[i], dec_bw[i], dec_offset[i] + , MLME_IS_OPCH_SW(iface) ? " OPCH_SW" : ""); + } + } + + for (i = 0; i < dvobj->iface_nums; i++) { + if (!(ifbmp & BIT(i)) || !dvobj->padapters) + continue; + + iface = dvobj->padapters[i]; + mlmeext = &(iface->mlmeextpriv); + network = &(mlmeext->mlmext_info.network); + + /* ch setting differs from mlmeext.network IE */ + if (cur_ie_ch[i] != dec_ch[i] + || cur_ie_bw[i] != dec_bw[i] + || cur_ie_offset[i] != dec_offset[i]) + ifbmp_ch_changed |= BIT(i); + + /* ch setting differs from existing one */ + if (MLME_IS_ASOC(iface) + && (mlmeext->cur_channel != dec_ch[i] + || mlmeext->cur_bwmode != dec_bw[i] + || mlmeext->cur_ch_offset != dec_offset[i]) + ) { + if (rtw_linked_check(iface) == _TRUE) { + #ifdef CONFIG_SPCT_CH_SWITCH + if (1) + rtw_ap_inform_ch_switch(iface, dec_ch[i], dec_offset[i]); + else + #endif + rtw_sta_flush(iface, _FALSE); + } + } + + mlmeext->cur_channel = dec_ch[i]; + mlmeext->cur_bwmode = dec_bw[i]; + mlmeext->cur_ch_offset = dec_offset[i]; + + rtw_ap_update_bss_chbw(iface, network, dec_ch[i], dec_bw[i], dec_offset[i]); + } + + return ifbmp_ch_changed; +} + +static u8 rtw_ap_ch_specific_chk(_adapter *adapter, u8 ch, u8 *bw, u8 *offset, const char *caller) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + RT_CHANNEL_INFO *chset = adapter_to_chset(adapter); + u8 ret = _SUCCESS; + + if (rtw_chset_search_ch(chset, ch) < 0) { + RTW_WARN("%s ch:%u doesn't fit in chplan\n", caller, ch); + ret = _FAIL; + goto exit; + } + + rtw_adjust_chbw(adapter, ch, bw, offset); + + if (!rtw_get_offset_by_chbw(ch, *bw, offset)) { + RTW_WARN("%s %u,%u has no valid offset\n", caller, ch, *bw); + ret = _FAIL; + goto exit; + } + + while (!rtw_chset_is_chbw_valid(chset, ch, *bw, *offset) + || (rtw_odm_dfs_domain_unknown(dvobj) && rtw_is_dfs_chbw(ch, *bw, *offset)) + ) { + if (*bw > CHANNEL_WIDTH_20) + (*bw)--; + if (*bw == CHANNEL_WIDTH_20) { + *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + break; + } + } + + if (rtw_odm_dfs_domain_unknown(dvobj) && rtw_is_dfs_chbw(ch, *bw, *offset)) { + RTW_WARN("%s DFS channel %u can't be used\n", caller, ch); + ret = _FAIL; + goto exit; + } + +exit: + return ret; +} + +static bool rtw_ap_choose_chbw(_adapter *adapter, u8 sel_ch, u8 max_bw, u8 cur_ch + , u8 *ch, u8 *bw, u8 *offset, u8 mesh_only, const char *caller) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); + bool ch_avail = _FALSE; + +#if defined(CONFIG_DFS_MASTER) + if (!rtw_odm_dfs_domain_unknown(dvobj)) { + if (rfctl->radar_detected + && rfctl->dbg_dfs_choose_dfs_ch_first + ) { + ch_avail = rtw_choose_shortest_waiting_ch(rfctl, sel_ch, max_bw + , ch, bw, offset + , RTW_CHF_2G | RTW_CHF_NON_DFS + , cur_ch + , rfctl->ch_sel_same_band_prefer, mesh_only); + if (ch_avail == _TRUE) { + RTW_INFO("%s choose 5G DFS channel for debug\n", caller); + goto exit; + } + } + + if (rfctl->radar_detected + && rfctl->dfs_ch_sel_d_flags + ) { + ch_avail = rtw_choose_shortest_waiting_ch(rfctl, sel_ch, max_bw + , ch, bw, offset + , rfctl->dfs_ch_sel_d_flags + , cur_ch + , rfctl->ch_sel_same_band_prefer, mesh_only); + if (ch_avail == _TRUE) { + RTW_INFO("%s choose with dfs_ch_sel_d_flags:0x%02x for debug\n" + , caller, rfctl->dfs_ch_sel_d_flags); + goto exit; + } + } + + ch_avail = rtw_choose_shortest_waiting_ch(rfctl, sel_ch, max_bw + , ch, bw, offset + , 0 + , cur_ch + , rfctl->ch_sel_same_band_prefer, mesh_only); + } else +#endif /* defined(CONFIG_DFS_MASTER) */ + { + ch_avail = rtw_choose_shortest_waiting_ch(rfctl, sel_ch, max_bw + , ch, bw, offset + , RTW_CHF_DFS + , cur_ch + , rfctl->ch_sel_same_band_prefer, mesh_only); + } +#if defined(CONFIG_DFS_MASTER) +exit: +#endif + if (ch_avail == _FALSE) + RTW_WARN("%s no available channel\n", caller); + + return ch_avail; +} + +u8 rtw_ap_chbw_decision(_adapter *adapter, u8 ifbmp, u8 excl_ifbmp + , s16 req_ch, s8 req_bw, s8 req_offset + , u8 *ch, u8 *bw, u8 *offset, u8 *chbw_allow) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); RT_CHANNEL_INFO *chset = adapter_to_chset(adapter); struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); bool ch_avail = _FALSE; - u8 cur_ie_ch, cur_ie_bw, cur_ie_offset; - u8 dec_ch, dec_bw, dec_offset; - u8 u_ch = 0, u_offset, u_bw; - bool changed = _FALSE; - struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); - WLAN_BSSID_EX *network = &(mlmeext->mlmext_info.network); + u8 cur_ie_ch[CONFIG_IFACE_NUMBER] = {0}; + u8 cur_ie_bw[CONFIG_IFACE_NUMBER] = {0}; + u8 cur_ie_offset[CONFIG_IFACE_NUMBER] = {0}; + u8 dec_ch[CONFIG_IFACE_NUMBER] = {0}; + u8 dec_bw[CONFIG_IFACE_NUMBER] = {0}; + u8 dec_offset[CONFIG_IFACE_NUMBER] = {0}; + u8 u_ch = 0, u_bw = 0, u_offset = 0; + struct mlme_ext_priv *mlmeext; + WLAN_BSSID_EX *network; struct mi_state mstate; - bool set_u_ch = _FALSE, set_dec_ch = _FALSE; + struct mi_state mstate_others; + bool set_u_ch = _FALSE; + u8 ifbmp_others = 0xFF & ~ifbmp & ~excl_ifbmp; + u8 ifbmp_ch_changed = 0; + bool ifbmp_all_mesh = 0; + _adapter *iface; + int i; - rtw_ies_get_chbw(BSS_EX_TLV_IES(network), BSS_EX_TLV_IES_LEN(network) - , &cur_ie_ch, &cur_ie_bw, &cur_ie_offset, 1, 1); +#ifdef CONFIG_RTW_MESH + for (i = 0; i < dvobj->iface_nums; i++) + if ((ifbmp & BIT(i)) && dvobj->padapters) + if (!MLME_IS_MESH(dvobj->padapters[i])) + break; + ifbmp_all_mesh = i >= dvobj->iface_nums ? 1 : 0; +#endif + + RTW_INFO("%s ifbmp:0x%02x excl_ifbmp:0x%02x req:%d,%d,%d\n", __func__ + , ifbmp, excl_ifbmp, req_ch, req_bw, req_offset); + rtw_mi_status_by_ifbmp(dvobj, ifbmp, &mstate); + rtw_mi_status_by_ifbmp(dvobj, ifbmp_others, &mstate_others); + RTW_INFO("%s others ld_sta_num:%u, lg_sta_num:%u, ap_num:%u, mesh_num:%u\n" + , __func__, MSTATE_STA_LD_NUM(&mstate_others), MSTATE_STA_LG_NUM(&mstate_others) + , MSTATE_AP_NUM(&mstate_others), MSTATE_MESH_NUM(&mstate_others)); + + for (i = 0; i < dvobj->iface_nums; i++) { + if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) + continue; + iface = dvobj->padapters[i]; + mlmeext = &(iface->mlmeextpriv); + network = &(mlmeext->mlmext_info.network); + + /* get current IE channel settings */ + rtw_ies_get_chbw(BSS_EX_TLV_IES(network), BSS_EX_TLV_IES_LEN(network) + , &cur_ie_ch[i], &cur_ie_bw[i], &cur_ie_offset[i], 1, 1); + + /* prepare temporary channel setting decision */ + if (req_ch == 0) { + /* request comes from upper layer, use cur_ie values */ + dec_ch[i] = cur_ie_ch[i]; + dec_bw[i] = cur_ie_bw[i]; + dec_offset[i] = cur_ie_offset[i]; + } else { + /* use chbw of cur_ie updated with specifying req as temporary decision */ + dec_ch[i] = (req_ch <= REQ_CH_NONE) ? cur_ie_ch[i] : req_ch; + if (req_bw <= REQ_BW_NONE) { + if (req_bw == REQ_BW_ORI) + dec_bw[i] = iface->mlmepriv.ori_bw; + else + dec_bw[i] = cur_ie_bw[i]; + } else + dec_bw[i] = req_bw; + dec_offset[i] = (req_offset <= REQ_OFFSET_NONE) ? cur_ie_offset[i] : req_offset; + } + } + + if (MSTATE_STA_LD_NUM(&mstate_others) || MSTATE_STA_LG_NUM(&mstate_others) + || MSTATE_AP_NUM(&mstate_others) || MSTATE_MESH_NUM(&mstate_others) + ) { + /* has linked/linking STA or has AP/Mesh mode */ + rtw_warn_on(!rtw_mi_get_ch_setting_union_by_ifbmp(dvobj, ifbmp_others, &u_ch, &u_bw, &u_offset)); + RTW_INFO("%s others union:%u,%u,%u\n", __func__, u_ch, u_bw, u_offset); + } #ifdef CONFIG_MCC_MODE - if (MCC_EN(adapter)) { + if (MCC_EN(adapter) && req_ch == 0) { if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) { + u8 if_id = adapter->iface_id; + + mlmeext = &(adapter->mlmeextpriv); + /* check channel settings are the same */ - if (cur_ie_ch == mlmeext->cur_channel - && cur_ie_bw == mlmeext->cur_bwmode - && cur_ie_offset == mlmeext->cur_ch_offset) { + if (cur_ie_ch[if_id] == mlmeext->cur_channel + && cur_ie_bw[if_id] == mlmeext->cur_bwmode + && cur_ie_offset[if_id] == mlmeext->cur_ch_offset) { + RTW_INFO(FUNC_ADPT_FMT"req ch settings are the same as current ch setting, go to exit\n" + , FUNC_ADPT_ARG(adapter)); - RTW_INFO(FUNC_ADPT_FMT"req ch settings are the same as current ch setting, go to exit\n" - , FUNC_ADPT_ARG(adapter)); - - *chbw_allow = _FALSE; - goto exit; + *chbw_allow = _FALSE; + goto exit; } else { - RTW_INFO(FUNC_ADPT_FMT"request channel settings are not the same as current channel setting(%d,%d,%d,%d,%d,%d), restart MCC\n" - , FUNC_ADPT_ARG(adapter) - , cur_ie_ch, cur_ie_bw, cur_ie_bw - , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); + RTW_INFO(FUNC_ADPT_FMT"request channel settings are not the same as current channel setting(%d,%d,%d,%d,%d,%d), restart MCC\n" + , FUNC_ADPT_ARG(adapter) + , cur_ie_ch[if_id], cur_ie_bw[if_id], cur_ie_offset[if_id] + , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); rtw_hal_set_mcc_setting_disconnect(adapter); } @@ -4269,269 +4669,245 @@ bool rtw_ap_chbw_decision(_adapter *adapter, s16 req_ch, s8 req_bw, s8 req_offse } #endif /* CONFIG_MCC_MODE */ - if (req_ch == 0) { - /* request comes from upper layer, use cur_ie values */ - dec_ch = cur_ie_ch; - dec_bw = cur_ie_bw; - dec_offset = cur_ie_offset; - } else { - /* use chbw of cur_ie updated with specifying req as temporary decision */ - dec_ch = (req_ch <= REQ_CH_NONE) ? cur_ie_ch : req_ch; - dec_bw = (req_bw <= REQ_BW_NONE) ? cur_ie_bw : req_bw; - dec_offset = (req_offset <= REQ_OFFSET_NONE) ? cur_ie_offset : req_offset; - } + if (MSTATE_STA_LG_NUM(&mstate_others) && !MSTATE_STA_LD_NUM(&mstate_others)) { + /* has linking STA but no linked STA */ - rtw_mi_status_no_self(adapter, &mstate); - RTW_INFO(FUNC_ADPT_FMT" ld_sta_num:%u, lg_sta_num%u, ap_num:%u, mesh_num:%u\n" - , FUNC_ADPT_ARG(adapter), MSTATE_STA_LD_NUM(&mstate), MSTATE_STA_LG_NUM(&mstate) - , MSTATE_AP_NUM(&mstate), MSTATE_MESH_NUM(&mstate)); + for (i = 0; i < dvobj->iface_nums; i++) { + if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) + continue; + iface = dvobj->padapters[i]; - if (MSTATE_STA_LD_NUM(&mstate) || MSTATE_AP_NUM(&mstate) || MSTATE_MESH_NUM(&mstate)) { - /* has linked STA or AP/Mesh mode */ + rtw_adjust_chbw(iface, dec_ch[i], &dec_bw[i], &dec_offset[i]); + #ifdef CONFIG_RTW_MESH + if (MLME_IS_MESH(iface)) + rtw_mesh_adjust_chbw(dec_ch[i], &dec_bw[i], &dec_offset[i]); + #endif - rtw_warn_on(!rtw_mi_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset)); + if (rtw_is_chbw_grouped(u_ch, u_bw, u_offset, dec_ch[i], dec_bw[i], dec_offset[i])) { + rtw_chset_sync_chbw(chset + , &dec_ch[i], &dec_bw[i], &dec_offset[i] + , &u_ch, &u_bw, &u_offset); + set_u_ch = _TRUE; - RTW_INFO(FUNC_ADPT_FMT" union no self: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); - RTW_INFO(FUNC_ADPT_FMT" req: %d,%d,%d\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset); - - rtw_adjust_chbw(adapter, u_ch, &dec_bw, &dec_offset); - -#ifdef CONFIG_MCC_MODE - if (MCC_EN(adapter)) { - if (!rtw_is_chbw_grouped(u_ch, u_bw, u_offset, dec_ch, dec_bw, dec_offset)) { - mlmeext->cur_channel = *ch = dec_ch = cur_ie_ch; - mlmeext->cur_bwmode = *bw = dec_bw = cur_ie_bw; - mlmeext->cur_ch_offset = *offset = dec_offset = cur_ie_offset; - /* channel bw offset can not be allowed, need MCC */ - *chbw_allow = _FALSE; - RTW_INFO(FUNC_ADPT_FMT" enable mcc: %u,%u,%u\n", FUNC_ADPT_ARG(adapter) - , *ch, *bw, *offset); - goto exit; - } else /* channel bw offset can be allowed, not need MCC */ *chbw_allow = _TRUE; - } -#endif /* CONFIG_MCC_MODE */ + } else { + #ifdef CONFIG_MCC_MODE + if (MCC_EN(iface)) { + mlmeext = &(iface->mlmeextpriv); + mlmeext->cur_channel = *ch = dec_ch[i]; + mlmeext->cur_bwmode = *bw = dec_bw[i]; + mlmeext->cur_ch_offset = *offset = dec_offset[i]; - /* follow */ - rtw_chset_sync_chbw(chset - , &dec_ch, &dec_bw, &dec_offset - , &u_ch, &u_bw, &u_offset); + /* channel bw offset can not be allowed, need MCC */ + *chbw_allow = _FALSE; + RTW_INFO(FUNC_ADPT_FMT" enable mcc: %u,%u,%u\n", FUNC_ADPT_ARG(iface) + , *ch, *bw, *offset); + goto exit; + } + #endif /* CONFIG_MCC_MODE */ + + /* set this for possible ch change when join down*/ + set_fwstate(&iface->mlmepriv, WIFI_OP_CH_SWITCHING); + } + } + + } else if (MSTATE_STA_LD_NUM(&mstate_others) + || MSTATE_AP_NUM(&mstate_others) || MSTATE_MESH_NUM(&mstate_others) + ) { + /* has linked STA mode or AP/Mesh mode */ + + for (i = 0; i < dvobj->iface_nums; i++) { + if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) + continue; + iface = dvobj->padapters[i]; + + rtw_adjust_chbw(iface, u_ch, &dec_bw[i], &dec_offset[i]); + #ifdef CONFIG_RTW_MESH + if (MLME_IS_MESH(iface)) + rtw_mesh_adjust_chbw(u_ch, &dec_bw[i], &dec_offset[i]); + #endif + + #ifdef CONFIG_MCC_MODE + if (MCC_EN(iface)) { + if (!rtw_is_chbw_grouped(u_ch, u_bw, u_offset, dec_ch[i], dec_bw[i], dec_offset[i])) { + mlmeext = &(iface->mlmeextpriv); + mlmeext->cur_channel = *ch = dec_ch[i] = cur_ie_ch[i]; + mlmeext->cur_bwmode = *bw = dec_bw[i] = cur_ie_bw[i]; + mlmeext->cur_ch_offset = *offset = dec_offset[i] = cur_ie_offset[i]; + /* channel bw offset can not be allowed, need MCC */ + *chbw_allow = _FALSE; + RTW_INFO(FUNC_ADPT_FMT" enable mcc: %u,%u,%u\n", FUNC_ADPT_ARG(iface) + , *ch, *bw, *offset); + goto exit; + } else + /* channel bw offset can be allowed, not need MCC */ + *chbw_allow = _TRUE; + } + #endif /* CONFIG_MCC_MODE */ + + if (req_ch == 0 && dec_bw[i] > u_bw + && rtw_is_dfs_chbw(u_ch, u_bw, u_offset) + ) { + /* request comes from upper layer, prevent from additional channel waiting */ + dec_bw[i] = u_bw; + if (dec_bw[i] == CHANNEL_WIDTH_20) + dec_offset[i] = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + } + + /* follow */ + rtw_chset_sync_chbw(chset + , &dec_ch[i], &dec_bw[i], &dec_offset[i] + , &u_ch, &u_bw, &u_offset); + } set_u_ch = _TRUE; - } else if (MSTATE_STA_LG_NUM(&mstate)) { - /* has linking STA */ - rtw_warn_on(!rtw_mi_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset)); - - RTW_INFO(FUNC_ADPT_FMT" union no self: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); - RTW_INFO(FUNC_ADPT_FMT" req: %d,%d,%d\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset); - - rtw_adjust_chbw(adapter, dec_ch, &dec_bw, &dec_offset); - - if (rtw_is_chbw_grouped(u_ch, u_bw, u_offset, dec_ch, dec_bw, dec_offset)) { - - rtw_chset_sync_chbw(chset - , &dec_ch, &dec_bw, &dec_offset - , &u_ch, &u_bw, &u_offset); - - set_u_ch = _TRUE; - - /* channel bw offset can be allowed, not need MCC */ - *chbw_allow = _TRUE; - } else { -#ifdef CONFIG_MCC_MODE - if (MCC_EN(adapter)) { - mlmeext->cur_channel = *ch = dec_ch; - mlmeext->cur_bwmode = *bw = dec_bw; - mlmeext->cur_ch_offset = *offset = dec_offset; - - /* channel bw offset can not be allowed, need MCC */ - *chbw_allow = _FALSE; - RTW_INFO(FUNC_ADPT_FMT" enable mcc: %u,%u,%u\n", FUNC_ADPT_ARG(adapter) - , *ch, *bw, *offset); - goto exit; - } -#endif /* CONFIG_MCC_MODE */ - - /* set this for possible ch change when join down*/ - set_fwstate(&adapter->mlmepriv, WIFI_OP_CH_SWITCHING); - } } else { - /* single AP/Mesh mode */ + /* autonomous decision */ + u8 ori_ch = 0; + u8 max_bw; - RTW_INFO(FUNC_ADPT_FMT" req: %d,%d,%d\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset); + /* autonomous decision, not need MCC */ + *chbw_allow = _TRUE; if (req_ch <= REQ_CH_NONE) /* channel is not specified */ goto choose_chbw; - if (rtw_chset_search_ch(chset, dec_ch) < 0) { - RTW_WARN(FUNC_ADPT_FMT" ch:%u doesn't fit in chplan\n", FUNC_ADPT_ARG(adapter), dec_ch); + /* get tmp dec union of ifbmp */ + for (i = 0; i < dvobj->iface_nums; i++) { + if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) + continue; + if (u_ch == 0) { + u_ch = dec_ch[i]; + u_bw = dec_bw[i]; + u_offset = dec_offset[i]; + rtw_adjust_chbw(adapter, u_ch, &u_bw, &u_offset); + rtw_get_offset_by_chbw(u_ch, u_bw, &u_offset); + } else { + u8 tmp_ch = dec_ch[i]; + u8 tmp_bw = dec_bw[i]; + u8 tmp_offset = dec_offset[i]; + + rtw_adjust_chbw(adapter, tmp_ch, &tmp_bw, &tmp_offset); + rtw_get_offset_by_chbw(tmp_ch, tmp_bw, &tmp_offset); + + rtw_warn_on(!rtw_is_chbw_grouped(u_ch, u_bw, u_offset, tmp_ch, tmp_bw, tmp_offset)); + rtw_sync_chbw(&tmp_ch, &tmp_bw, &tmp_offset, &u_ch, &u_bw, &u_offset); + } + } + + #ifdef CONFIG_RTW_MESH + /* if ifbmp are all mesh, apply bw restriction */ + if (ifbmp_all_mesh) + rtw_mesh_adjust_chbw(u_ch, &u_bw, &u_offset); + #endif + + RTW_INFO("%s ifbmp:0x%02x tmp union:%u,%u,%u\n", __func__, ifbmp, u_ch, u_bw, u_offset); + + /* check if tmp dec union is usable */ + if (rtw_ap_ch_specific_chk(adapter, u_ch, &u_bw, &u_offset, __func__) == _FAIL) { + /* channel can't be used */ if (req_ch > 0) { /* specific channel and not from IE => don't change channel setting */ - *chbw_allow = _FALSE; goto exit; } goto choose_chbw; - } - - /* check temporary decision first */ - rtw_adjust_chbw(adapter, dec_ch, &dec_bw, &dec_offset); - if (!rtw_get_offset_by_chbw(dec_ch, dec_bw, &dec_offset) - && req_bw > REQ_BW_NONE - ) { - RTW_WARN(FUNC_ADPT_FMT" req: %u,%u has no valid offset\n", FUNC_ADPT_ARG(adapter), dec_ch, dec_bw); - *chbw_allow = _FALSE; - goto exit; - } - - while (!rtw_chset_is_chbw_valid(chset, dec_ch, dec_bw, dec_offset) - || (rtw_odm_dfs_domain_unknown(adapter) && rtw_is_dfs_chbw(dec_ch, dec_bw, dec_offset)) - || rtw_chset_is_ch_non_ocp(chset, dec_ch, dec_bw, dec_offset) - ) { - if (dec_bw > CHANNEL_WIDTH_20) - dec_bw--; - if (dec_bw == CHANNEL_WIDTH_20) { - dec_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; - break; + } else if (rtw_chset_is_chbw_non_ocp(chset, u_ch, u_bw, u_offset)) { + RTW_WARN("%s DFS channel %u,%u under non ocp\n", __func__, u_ch, u_bw); + if (req_ch > 0 && req_bw > REQ_BW_NONE) { + /* change_chbw with specific channel and specific bw, goto update_bss_chbw directly */ + goto update_bss_chbw; } - } - - if (rtw_odm_dfs_domain_unknown(adapter) && rtw_is_dfs_chbw(dec_ch, dec_bw, dec_offset)) { - RTW_WARN(FUNC_ADPT_FMT" DFS channel %u can't be used\n", FUNC_ADPT_ARG(adapter), dec_ch); - if (req_ch > 0) { - /* specific channel and not from IE => don't change channel setting */ - *chbw_allow = _FALSE; - goto exit; - } - goto choose_chbw; - } - - if (rtw_chset_is_ch_non_ocp(chset, dec_ch, dec_bw, dec_offset) == _FALSE) + } else goto update_bss_chbw; - RTW_WARN(FUNC_ADPT_FMT" DFS channel %u under non ocp\n", FUNC_ADPT_ARG(adapter), dec_ch); choose_chbw: - req_ch = req_ch > 0 ? dec_ch : 0; - if (req_bw <= REQ_BW_NONE) - req_bw = cur_ie_bw; + req_ch = req_ch > 0 ? req_ch : 0; + max_bw = req_bw > REQ_BW_NONE ? req_bw : CHANNEL_WIDTH_20; + for (i = 0; i < dvobj->iface_nums; i++) { + if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) + continue; + iface = dvobj->padapters[i]; + mlmeext = &(iface->mlmeextpriv); -#if defined(CONFIG_DFS_MASTER) - if (!rtw_odm_dfs_domain_unknown(adapter)) { - if (rfctl->dbg_dfs_master_choose_dfs_ch_first) { - ch_avail = rtw_choose_shortest_waiting_ch(adapter, req_ch, req_bw - , &dec_ch, &dec_bw, &dec_offset - , RTW_CHF_2G | RTW_CHF_NON_DFS - , MLME_IS_ASOC(adapter) ? mlmeext->cur_channel : cur_ie_ch - , rfctl->ch_sel_same_band_prefer); - if (ch_avail == _TRUE) { - RTW_INFO(FUNC_ADPT_FMT" choose 5G DFS channel for debug\n", FUNC_ADPT_ARG(adapter)); - goto update_bss_chbw; + if (req_bw <= REQ_BW_NONE) { + if (req_bw == REQ_BW_ORI) { + if (max_bw < iface->mlmepriv.ori_bw) + max_bw = iface->mlmepriv.ori_bw; + } else { + if (max_bw < cur_ie_bw[i]) + max_bw = cur_ie_bw[i]; } } - if (rfctl->dfs_ch_sel_d_flags) { - ch_avail = rtw_choose_shortest_waiting_ch(adapter, req_ch, req_bw - , &dec_ch, &dec_bw, &dec_offset - , rfctl->dfs_ch_sel_d_flags - , MLME_IS_ASOC(adapter) ? mlmeext->cur_channel : cur_ie_ch - , rfctl->ch_sel_same_band_prefer); - if (ch_avail == _TRUE) { - RTW_INFO(FUNC_ADPT_FMT" choose with dfs_ch_sel_d_flags:0x%02x for debug\n" - , FUNC_ADPT_ARG(adapter), rfctl->dfs_ch_sel_d_flags); - goto update_bss_chbw; - } - } - - ch_avail = rtw_choose_shortest_waiting_ch(adapter, req_ch, req_bw - , &dec_ch, &dec_bw, &dec_offset - , 0 - , MLME_IS_ASOC(adapter) ? mlmeext->cur_channel : cur_ie_ch - , rfctl->ch_sel_same_band_prefer); - if (ch_avail == _FALSE) { - RTW_WARN(FUNC_ADPT_FMT" no available channel\n", FUNC_ADPT_ARG(adapter)); - *chbw_allow = _FALSE; - goto exit; - } - - } else -#endif /* defined(CONFIG_DFS_MASTER) */ - { - ch_avail = rtw_choose_shortest_waiting_ch(adapter, req_ch, req_bw - , &dec_ch, &dec_bw, &dec_offset - , RTW_CHF_DFS - , MLME_IS_ASOC(adapter) ? mlmeext->cur_channel : cur_ie_ch - , rfctl->ch_sel_same_band_prefer); - if (ch_avail == _FALSE) { - RTW_WARN(FUNC_ADPT_FMT" no available channel\n", FUNC_ADPT_ARG(adapter)); - *chbw_allow = _FALSE; - goto exit; + if (MSTATE_AP_NUM(&mstate) || MSTATE_MESH_NUM(&mstate)) { + if (ori_ch == 0) + ori_ch = mlmeext->cur_channel; + else if (ori_ch != mlmeext->cur_channel) + rtw_warn_on(1); + } else { + if (ori_ch == 0) + ori_ch = cur_ie_ch[i]; + else if (ori_ch != cur_ie_ch[i]) + rtw_warn_on(1); } } + ch_avail = rtw_ap_choose_chbw(adapter, req_ch, max_bw + , ori_ch, &u_ch, &u_bw, &u_offset, ifbmp_all_mesh, __func__); + if (ch_avail == _FALSE) + goto exit; + update_bss_chbw: - /* channel bw offset can be allowed for single AP, not need MCC */ - *chbw_allow = _TRUE; - set_dec_ch = _TRUE; + for (i = 0; i < dvobj->iface_nums; i++) { + if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) + continue; + iface = dvobj->padapters[i]; + + dec_ch[i] = u_ch; + if (dec_bw[i] > u_bw) + dec_bw[i] = u_bw; + if (dec_bw[i] == CHANNEL_WIDTH_20) + dec_offset[i] = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + else + dec_offset[i] = u_offset; + + #ifdef CONFIG_RTW_MESH + if (MLME_IS_MESH(iface)) + rtw_mesh_adjust_chbw(dec_ch[i], &dec_bw[i], &dec_offset[i]); + #endif + } + + set_u_ch = _TRUE; } + ifbmp_ch_changed = rtw_ap_update_chbw_by_ifbmp(dvobj, ifbmp + , cur_ie_ch, cur_ie_bw, cur_ie_offset + , dec_ch, dec_bw, dec_offset + , __func__); + + if (u_ch != 0) + RTW_INFO("%s union:%u,%u,%u\n", __func__, u_ch, u_bw, u_offset); + if (rtw_mi_check_fwstate(adapter, _FW_UNDER_SURVEY)) { /* scanning, leave ch setting to scan state machine */ - set_u_ch = set_dec_ch = _FALSE; + set_u_ch = _FALSE; } - /* ch setting differs from mlmeext.network IE */ - if (cur_ie_ch != dec_ch - || cur_ie_bw != dec_bw - || cur_ie_offset != dec_offset) - changed = _TRUE; - - /* ch setting differs from existing one */ - if (check_fwstate(&adapter->mlmepriv, WIFI_ASOC_STATE) - && (mlmeext->cur_channel != dec_ch - || mlmeext->cur_bwmode != dec_bw - || mlmeext->cur_ch_offset != dec_offset) - ) { - if (rtw_linked_check(adapter) == _TRUE) { - #ifdef CONFIG_SPCT_CH_SWITCH - if (1) - rtw_ap_inform_ch_switch(adapter, dec_ch, dec_offset); - else - #endif - rtw_sta_flush(adapter, _FALSE); - } - } - - mlmeext->cur_channel = dec_ch; - mlmeext->cur_bwmode = dec_bw; - mlmeext->cur_ch_offset = dec_offset; - - rtw_ap_update_bss_chbw(adapter, network, dec_ch, dec_bw, dec_offset); - - if (u_ch != 0) - RTW_INFO(FUNC_ADPT_FMT" union: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); - - RTW_INFO(FUNC_ADPT_FMT" dec: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), dec_ch, dec_bw, dec_offset); - if (set_u_ch == _TRUE) { *ch = u_ch; *bw = u_bw; *offset = u_offset; - } else if (set_dec_ch == _TRUE) { - *ch = dec_ch; - *bw = dec_bw; - *offset = dec_offset; } exit: - return changed; + return ifbmp_ch_changed; } -u8 rtw_ap_sta_linking_state_check(_adapter *adapter) +u8 rtw_ap_sta_states_check(_adapter *adapter) { struct sta_info *psta; - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct sta_priv *pstapriv = &adapter->stapriv; - int i; _list *plist, *phead; _irqL irqL; u8 rst = _FALSE; @@ -4546,9 +4922,16 @@ u8 rtw_ap_sta_linking_state_check(_adapter *adapter) phead = &pstapriv->asoc_list; plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { + psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); - if (!(psta->state &_FW_LINKED)) { + + if (!(psta->state & _FW_LINKED)) { + RTW_INFO(ADPT_FMT"- SoftAP/Mesh - sta under linking, its state = 0x%x\n", ADPT_ARG(adapter), psta->state); + rst = _TRUE; + break; + } else if (psta->state & WIFI_UNDER_KEY_HANDSHAKE) { + RTW_INFO(ADPT_FMT"- SoftAP/Mesh - sta under key handshaking, its state = 0x%x\n", ADPT_ARG(adapter), psta->state); rst = _TRUE; break; } @@ -4727,7 +5110,7 @@ void rtw_ap_parse_sta_capability(_adapter *adapter, struct sta_info *sta, u8 *ca u16 rtw_ap_parse_sta_supported_rates(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len) { - u8 rate_set[16]; + u8 rate_set[12]; u8 rate_num; int i; u16 status = _STATS_SUCCESSFUL_; @@ -4767,6 +5150,7 @@ u16 rtw_ap_parse_sta_security_ie(_adapter *adapter, struct sta_info *sta, struct u8 *wpa_ie; int wpa_ie_len; int group_cipher = 0, pairwise_cipher = 0; + u32 akm = 0; u8 mfp_opt = MFP_NO; u16 status = _STATS_SUCCESSFUL_; @@ -4782,13 +5166,17 @@ u16 rtw_ap_parse_sta_security_ie(_adapter *adapter, struct sta_info *sta, struct wpa_ie = elems->rsn_ie; wpa_ie_len = elems->rsn_ie_len; - if (rtw_parse_wpa2_ie(wpa_ie - 2, wpa_ie_len + 2, &group_cipher, &pairwise_cipher, NULL, &mfp_opt) == _SUCCESS) { + if (rtw_parse_wpa2_ie(wpa_ie - 2, wpa_ie_len + 2, &group_cipher, &pairwise_cipher, &akm, &mfp_opt) == _SUCCESS) { sta->dot8021xalg = 1;/* psk, todo:802.1x */ sta->wpa_psk |= BIT(1); sta->wpa2_group_cipher = group_cipher & sec->wpa2_group_cipher; sta->wpa2_pairwise_cipher = pairwise_cipher & sec->wpa2_pairwise_cipher; + sta->akm_suite_type = akm; + if (MLME_IS_AP(adapter) && (CHECK_BIT(WLAN_AKM_TYPE_SAE, akm)) && (MFP_NO == mfp_opt)) + status = WLAN_STATUS_ROBUST_MGMT_FRAME_POLICY_VIOLATION; + if (!sta->wpa2_group_cipher) status = WLAN_STATUS_GROUP_CIPHER_NOT_VALID; @@ -4834,6 +5222,19 @@ u16 rtw_ap_parse_sta_security_ie(_adapter *adapter, struct sta_info *sta, struct else if (sec->mfp_opt >= MFP_OPTIONAL && mfp_opt >= MFP_OPTIONAL) sta->flags |= WLAN_STA_MFP; + if (MLME_IS_AP(adapter) && + (sec->auth_type == NL80211_AUTHTYPE_SAE) && + (CHECK_BIT(WLAN_AKM_TYPE_SAE, sta->akm_suite_type)) && + (WLAN_AUTH_OPEN == sta->authalg)) { + /* WPA3-SAE, PMK caching */ + if (rtw_cached_pmkid(adapter, sta->cmn.mac_addr) == -1) { + RTW_INFO("SAE: No PMKSA cache entry found\n"); + status = WLAN_STATUS_INVALID_PMKID; + } else { + RTW_INFO("SAE: PMKSA cache entry found\n"); + } + } + if (status != _STATS_SUCCESSFUL_) goto exit; diff --git a/core/rtw_beamforming.c b/core/rtw_beamforming.c index d653aea..205da38 100644 --- a/core/rtw_beamforming.c +++ b/core/rtw_beamforming.c @@ -213,7 +213,7 @@ static u8 _send_ht_ndpa_packet(PADAPTER adapter, u8 *ra, enum channel_width bw) attrib->rate = (u8)txrate; attrib->bf_pkt_type = 0; - memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); + _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; @@ -308,7 +308,7 @@ static u8 _send_vht_ndpa_packet(PADAPTER adapter, u8 *ra, u16 aid, enum channel_ attrib->rate = (u8)txrate; attrib->bf_pkt_type = 0; - memset(pmgntframe->buf_addr, 0, TXDESC_OFFSET + WLANHDR_OFFSET); + _rtw_memset(pmgntframe->buf_addr, 0, TXDESC_OFFSET + WLANHDR_OFFSET); pframe = pmgntframe->buf_addr + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; @@ -425,7 +425,7 @@ static u8 _send_vht_mu_ndpa_packet(PADAPTER adapter, enum channel_width bw) else attrib->bf_pkt_type = 0; - memset(pmgntframe->buf_addr, 0, TXDESC_OFFSET + WLANHDR_OFFSET); + _rtw_memset(pmgntframe->buf_addr, 0, TXDESC_OFFSET + WLANHDR_OFFSET); pframe = pmgntframe->buf_addr + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; @@ -517,7 +517,7 @@ static u8 _send_bf_report_poll(PADAPTER adapter, u8 *ra, u8 bFinalPoll) else attrib->bf_pkt_type = 2; - memset(pmgntframe->buf_addr, 0, TXDESC_OFFSET + WLANHDR_OFFSET); + _rtw_memset(pmgntframe->buf_addr, 0, TXDESC_OFFSET + WLANHDR_OFFSET); pframe = pmgntframe->buf_addr + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; @@ -581,8 +581,8 @@ static void _sounding_update_min_period(PADAPTER adapter, u16 period, u8 leave) static void _sounding_init(struct sounding_info *sounding) { - memset(sounding->su_sounding_list, 0xFF, MAX_NUM_BEAMFORMEE_SU); - memset(sounding->mu_sounding_list, 0xFF, MAX_NUM_BEAMFORMEE_MU); + _rtw_memset(sounding->su_sounding_list, 0xFF, MAX_NUM_BEAMFORMEE_SU); + _rtw_memset(sounding->mu_sounding_list, 0xFF, MAX_NUM_BEAMFORMEE_MU); sounding->state = SOUNDING_STATE_NONE; sounding->su_bfee_curidx = 0xFF; sounding->candidate_mu_bfee_cnt = 0; @@ -600,8 +600,8 @@ static void _sounding_reset_vars(PADAPTER adapter) info = GET_BEAMFORM_INFO(adapter); sounding = &info->sounding_info; - memset(sounding->su_sounding_list, 0xFF, MAX_NUM_BEAMFORMEE_SU); - memset(sounding->mu_sounding_list, 0xFF, MAX_NUM_BEAMFORMEE_MU); + _rtw_memset(sounding->su_sounding_list, 0xFF, MAX_NUM_BEAMFORMEE_SU); + _rtw_memset(sounding->mu_sounding_list, 0xFF, MAX_NUM_BEAMFORMEE_MU); sounding->su_bfee_curidx = 0xFF; sounding->candidate_mu_bfee_cnt = 0; @@ -1054,8 +1054,8 @@ static void _bfer_remove_entry(PADAPTER adapter, struct beamformer_entry *entry) if (TEST_FLAG(entry->cap, BEAMFORMER_CAP_VHT_MU)) { info->beamformer_mu_cnt -= 1; - memset(entry->gid_valid, 0, 8); - memset(entry->user_position, 0, 16); + _rtw_memset(entry->gid_valid, 0, 8); + _rtw_memset(entry->user_position, 0, 16); } else if (TEST_FLAG(entry->cap, BEAMFORMER_CAP_VHT_SU|BEAMFORMER_CAP_HT_EXPLICIT)) { info->beamformer_su_cnt -= 1; } @@ -1071,7 +1071,7 @@ static u8 _bfer_set_entry_gid(PADAPTER adapter, u8 *addr, u8 *gid, u8 *position) struct beamformer_entry bfer; memset(&bfer, 0, sizeof(bfer)); - memcpy(bfer.mac_addr, addr, 6); + memcpy(bfer.mac_addr, addr, ETH_ALEN); /* Parsing Membership Status Array */ memcpy(bfer.gid_valid, gid, 8); @@ -1245,7 +1245,7 @@ static struct beamformee_entry *_bfee_add_entry(PADAPTER adapter, RTW_ERR("%s: UNEXPECTED!! info->TargetSUBFee is NULL!", __FUNCTION__); } info->TargetSUBFee = NULL; - memset(&info->TargetCSIInfo, 0, sizeof(struct _RT_CSI_INFO)); + _rtw_memset(&info->TargetCSIInfo, 0, sizeof(struct _RT_CSI_INFO)); rtw_bf_cmd(adapter, BEAMFORMING_CTRL_SET_CSI_REPORT, (u8*)&info->TargetCSIInfo, sizeof(struct _RT_CSI_INFO), 0); } } @@ -1268,7 +1268,7 @@ static struct beamformee_entry *_bfee_add_entry(PADAPTER adapter, /* Record the first SU BFee index. We only allow the first SU BFee to be sound */ if ((info->beamformee_su_cnt == 1) && (info->beamformee_mu_cnt == 0)) { info->TargetSUBFee = bfee; - memset(&info->TargetCSIInfo, 0, sizeof(struct _RT_CSI_INFO)); + _rtw_memset(&info->TargetCSIInfo, 0, sizeof(struct _RT_CSI_INFO)); bfee->bSuspendSUCap = _FALSE; } else { bfee->bSuspendSUCap = _TRUE; @@ -1308,7 +1308,7 @@ static void _bfee_remove_entry(PADAPTER adapter, struct beamformee_entry *entry) if ((info->beamformee_mu_cnt == 0) && (info->beamformee_su_cnt > 0)) { idx = _bfee_get_first_su_entry_idx(adapter, NULL); info->TargetSUBFee = &info->bfee_entry[idx]; - memset(&info->TargetCSIInfo, 0, sizeof(struct _RT_CSI_INFO)); + _rtw_memset(&info->TargetCSIInfo, 0, sizeof(struct _RT_CSI_INFO)); info->TargetSUBFee->bSuspendSUCap = _FALSE; } } @@ -1320,7 +1320,7 @@ static void _bfee_remove_entry(PADAPTER adapter, struct beamformee_entry *entry) && (entry == info->TargetSUBFee)) { entry->bSuspendSUCap = _TRUE; info->TargetSUBFee = NULL; - memset(&info->TargetCSIInfo, 0, sizeof(struct _RT_CSI_INFO)); + _rtw_memset(&info->TargetCSIInfo, 0, sizeof(struct _RT_CSI_INFO)); rtw_bf_cmd(adapter, BEAMFORMING_CTRL_SET_CSI_REPORT, (u8*)&info->TargetCSIInfo, sizeof(struct _RT_CSI_INFO), 0); } } @@ -1711,7 +1711,7 @@ u8 rtw_bf_send_vht_gid_mgnt_packet(PADAPTER adapter, u8 *ra, u8 *gid, u8 *positi attrib->bwmode = CHANNEL_WIDTH_20; attrib->subtype = WIFI_ACTION; - memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); + _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)pmgntframe->buf_addr + TXDESC_OFFSET; wlanhdr = (struct rtw_ieee80211_hdr *)pframe; @@ -2004,1050 +2004,38 @@ void rtw_bf_update_traffic(PADAPTER adapter) #else /* !RTW_BEAMFORMING_VERSION_2 */ -#if (BEAMFORMING_SUPPORT == 0) /*for diver defined beamforming*/ -struct beamforming_entry *beamforming_get_entry_by_addr(struct mlme_priv *pmlmepriv, u8 *ra, u8 *idx) -{ - u8 i = 0; - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); - - for (i = 0; i < BEAMFORMING_ENTRY_NUM; i++) { - if (pBeamInfo->beamforming_entry[i].bUsed && - (_rtw_memcmp(ra, pBeamInfo->beamforming_entry[i].mac_addr, ETH_ALEN))) { - *idx = i; - return &(pBeamInfo->beamforming_entry[i]); - } - } - - return NULL; -} - -BEAMFORMING_CAP beamforming_get_entry_beam_cap_by_mac_id(PVOID pmlmepriv , u8 mac_id) -{ - u8 i = 0; - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO((struct mlme_priv *)pmlmepriv); - BEAMFORMING_CAP BeamformEntryCap = BEAMFORMING_CAP_NONE; - - for (i = 0; i < BEAMFORMING_ENTRY_NUM; i++) { - if (pBeamInfo->beamforming_entry[i].bUsed && - (mac_id == pBeamInfo->beamforming_entry[i].mac_id)) { - BeamformEntryCap = pBeamInfo->beamforming_entry[i].beamforming_entry_cap; - i = BEAMFORMING_ENTRY_NUM; - } - } - - return BeamformEntryCap; -} - -struct beamforming_entry *beamforming_get_free_entry(struct mlme_priv *pmlmepriv, u8 *idx) -{ - u8 i = 0; - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); - - for (i = 0; i < BEAMFORMING_ENTRY_NUM; i++) { - if (pBeamInfo->beamforming_entry[i].bUsed == _FALSE) { - *idx = i; - return &(pBeamInfo->beamforming_entry[i]); - } - } - return NULL; -} - - -struct beamforming_entry *beamforming_add_entry(PADAPTER adapter, u8 *ra, u16 aid, - u16 mac_id, enum channel_width bw, BEAMFORMING_CAP beamfrom_cap, u8 *idx) -{ - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct beamforming_entry *pEntry = beamforming_get_free_entry(pmlmepriv, idx); - - if (pEntry != NULL) { - pEntry->bUsed = _TRUE; - pEntry->aid = aid; - pEntry->mac_id = mac_id; - pEntry->sound_bw = bw; - if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { - u16 BSSID = ((*(adapter_mac_addr(adapter) + 5) & 0xf0) >> 4) ^ - (*(adapter_mac_addr(adapter) + 5) & 0xf); /* BSSID[44:47] xor BSSID[40:43] */ - pEntry->p_aid = (aid + BSSID * 32) & 0x1ff; /* (dec(A) + dec(B)*32) mod 512 */ - pEntry->g_id = 63; - } else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) { - pEntry->p_aid = 0; - pEntry->g_id = 63; - } else { - pEntry->p_aid = ra[5]; /* BSSID[39:47] */ - pEntry->p_aid = (pEntry->p_aid << 1) | (ra[4] >> 7); - pEntry->g_id = 0; - } - _rtw_memcpy(pEntry->mac_addr, ra, ETH_ALEN); - pEntry->bSound = _FALSE; - - /* 3 TODO SW/FW sound period */ - pEntry->sound_period = 200; - pEntry->beamforming_entry_cap = beamfrom_cap; - pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; - - - pEntry->PreLogSeq = 0; /*Modified by Jeffery @2015-04-13*/ - pEntry->LogSeq = 0; /*Modified by Jeffery @2014-10-29*/ - pEntry->LogRetryCnt = 0; /*Modified by Jeffery @2014-10-29*/ - pEntry->LogSuccess = 0; /*LogSuccess is NOT needed to be accumulated, so LogSuccessCnt->LogSuccess, 2015-04-13, Jeffery*/ - pEntry->ClockResetTimes = 0; /*Modified by Jeffery @2015-04-13*/ - pEntry->LogStatusFailCnt = 0; - - return pEntry; - } else - return NULL; -} - -BOOLEAN beamforming_remove_entry(struct mlme_priv *pmlmepriv, u8 *ra, u8 *idx) -{ - struct beamforming_entry *pEntry = beamforming_get_entry_by_addr(pmlmepriv, ra, idx); - - if (pEntry != NULL) { - pEntry->bUsed = _FALSE; - pEntry->beamforming_entry_cap = BEAMFORMING_CAP_NONE; - pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; - return _TRUE; - } else - return _FALSE; -} - -/* Used for BeamformingStart_V1 */ -void beamforming_dym_ndpa_rate(PADAPTER adapter) -{ - u16 NDPARate = MGN_6M; - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); - s8 min_rssi = 0; - - min_rssi = rtw_phydm_get_min_rssi(adapter); - if (min_rssi > 30) /* link RSSI > 30% */ - NDPARate = MGN_24M; - else - NDPARate = MGN_6M; - - /* BW = CHANNEL_WIDTH_20; */ - NDPARate = NDPARate << 8; - rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_RATE, (u8 *)&NDPARate); -} - -void beamforming_dym_period(PADAPTER Adapter) -{ - u8 Idx; - BOOLEAN bChangePeriod = _FALSE; - u16 SoundPeriod_SW, SoundPeriod_FW; - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); - struct beamforming_entry *pBeamformEntry; - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO((&Adapter->mlmepriv)); - struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); - - /* 3 TODO per-client throughput caculation. */ - - if (pdvobjpriv->traffic_stat.cur_tx_tp + pdvobjpriv->traffic_stat.cur_rx_tp > 2) { - SoundPeriod_SW = 32 * 20; - SoundPeriod_FW = 2; - } else { - SoundPeriod_SW = 32 * 2000; - SoundPeriod_FW = 200; - } - - for (Idx = 0; Idx < BEAMFORMING_ENTRY_NUM; Idx++) { - pBeamformEntry = pBeamInfo->beamforming_entry + Idx; - if (pBeamformEntry->bDefaultCSI) { - SoundPeriod_SW = 32 * 2000; - SoundPeriod_FW = 200; - } - - if (pBeamformEntry->beamforming_entry_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) { - if (pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) { - if (pBeamformEntry->sound_period != SoundPeriod_FW) { - pBeamformEntry->sound_period = SoundPeriod_FW; - bChangePeriod = _TRUE; /* Only FW sounding need to send H2C packet to change sound period. */ - } - } else if (pBeamformEntry->sound_period != SoundPeriod_SW) - pBeamformEntry->sound_period = SoundPeriod_SW; - } - } - - if (bChangePeriod) - rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&Idx); -} - -BOOLEAN issue_ht_sw_ndpa_packet(PADAPTER Adapter, u8 *ra, enum channel_width bw, u8 qidx) -{ - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - struct rtw_ieee80211_hdr *pwlanhdr; - struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u8 ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; - u8 *pframe; - u16 *fctrl; - u16 duration = 0; - u8 aSifsTime = 0; - u8 NDPTxRate = 0; - - RTW_INFO("%s: issue_ht_sw_ndpa_packet!\n", __func__); - - NDPTxRate = MGN_MCS8; - RTW_INFO("%s: NDPTxRate =%d\n", __func__, NDPTxRate); - pmgntframe = alloc_mgtxmitframe(pxmitpriv); - - if (pmgntframe == NULL) - return _FALSE; - - /*update attribute*/ - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(Adapter, pattrib); - pattrib->qsel = QSLT_MGNT; - pattrib->rate = NDPTxRate; - pattrib->bwmode = bw; - pattrib->order = 1; - pattrib->subtype = WIFI_ACTION_NOACK; - - memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); - - pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &pwlanhdr->frame_ctl; - *(fctrl) = 0; - - set_order_bit(pframe); - set_frame_sub_type(pframe, WIFI_ACTION_NOACK); - - _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - - if (pmlmeext->cur_wireless_mode == WIRELESS_11B) - aSifsTime = 10; - else - aSifsTime = 16; - - duration = 2 * aSifsTime + 40; - - if (bw == CHANNEL_WIDTH_40) - duration += 87; - else - duration += 180; - - set_duration(pframe, duration); - - /*HT control field*/ - SET_HT_CTRL_CSI_STEERING(pframe + 24, 3); - SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe + 24, 1); - - _rtw_memcpy(pframe + 28, ActionHdr, 4); - - pattrib->pktlen = 32; - - pattrib->last_txcmdsz = pattrib->pktlen; - - dump_mgntframe(Adapter, pmgntframe); - - return _TRUE; - - -} -BOOLEAN issue_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, enum channel_width bw, u8 qidx) -{ - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - struct rtw_ieee80211_hdr *pwlanhdr; - struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u8 ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; - u8 *pframe; - u16 *fctrl; - u16 duration = 0; - u8 aSifsTime = 0; - - pmgntframe = alloc_mgtxmitframe(pxmitpriv); - - if (pmgntframe == NULL) - return _FALSE; - - /*update attribute*/ - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(Adapter, pattrib); - - if (qidx == BCN_QUEUE_INX) - pattrib->qsel = QSLT_BEACON; - pattrib->rate = MGN_MCS8; - pattrib->bwmode = bw; - pattrib->order = 1; - pattrib->subtype = WIFI_ACTION_NOACK; - - memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); - - pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &pwlanhdr->frame_ctl; - *(fctrl) = 0; - - set_order_bit(pframe); - set_frame_sub_type(pframe, WIFI_ACTION_NOACK); - - _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - - if (pmlmeext->cur_wireless_mode == WIRELESS_11B) - aSifsTime = 10; - else - aSifsTime = 16; - - duration = 2 * aSifsTime + 40; - - if (bw == CHANNEL_WIDTH_40) - duration += 87; - else - duration += 180; - - set_duration(pframe, duration); - - /* HT control field */ - SET_HT_CTRL_CSI_STEERING(pframe + 24, 3); - SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe + 24, 1); - - _rtw_memcpy(pframe + 28, ActionHdr, 4); - - pattrib->pktlen = 32; - - pattrib->last_txcmdsz = pattrib->pktlen; - - dump_mgntframe(Adapter, pmgntframe); - - return _TRUE; -} - -BOOLEAN beamforming_send_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, enum channel_width bw, u8 qidx) -{ - return issue_ht_ndpa_packet(Adapter, ra, bw, qidx); -} -BOOLEAN issue_vht_sw_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, enum channel_width bw, u8 qidx) -{ - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - struct rtw_ieee80211_hdr *pwlanhdr; - struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); - struct rtw_ndpa_sta_info sta_info; - u8 NDPTxRate = 0; - - u8 *pframe; - u16 *fctrl; - u16 duration = 0; - u8 sequence = 0, aSifsTime = 0; - - RTW_INFO("%s: issue_vht_sw_ndpa_packet!\n", __func__); - - - NDPTxRate = MGN_VHT2SS_MCS0; - RTW_INFO("%s: NDPTxRate =%d\n", __func__, NDPTxRate); - pmgntframe = alloc_mgtxmitframe(pxmitpriv); - - if (pmgntframe == NULL) { - RTW_INFO("%s, alloc mgnt frame fail\n", __func__); - return _FALSE; - } - - /*update attribute*/ - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(Adapter, pattrib); - pattrib->qsel = QSLT_MGNT; - pattrib->rate = NDPTxRate; - pattrib->bwmode = bw; - pattrib->subtype = WIFI_NDPA; - - memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); - - pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &pwlanhdr->frame_ctl; - *(fctrl) = 0; - - set_frame_sub_type(pframe, WIFI_NDPA); - - _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); - - if (is_supported_5g(pmlmeext->cur_wireless_mode) || is_supported_ht(pmlmeext->cur_wireless_mode)) - aSifsTime = 16; - else - aSifsTime = 10; - - duration = 2 * aSifsTime + 44; - - if (bw == CHANNEL_WIDTH_80) - duration += 40; - else if (bw == CHANNEL_WIDTH_40) - duration += 87; - else - duration += 180; - - set_duration(pframe, duration); - - sequence = pBeamInfo->sounding_sequence << 2; - if (pBeamInfo->sounding_sequence >= 0x3f) - pBeamInfo->sounding_sequence = 0; - else - pBeamInfo->sounding_sequence++; - - _rtw_memcpy(pframe + 16, &sequence, 1); - if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) - aid = 0; - - sta_info.aid = aid; - sta_info.feedback_type = 0; - sta_info.nc_index = 0; - - _rtw_memcpy(pframe + 17, (u8 *)&sta_info, 2); - - pattrib->pktlen = 19; - - pattrib->last_txcmdsz = pattrib->pktlen; - - dump_mgntframe(Adapter, pmgntframe); - - - return _TRUE; - -} -BOOLEAN issue_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, enum channel_width bw, u8 qidx) -{ - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - struct rtw_ieee80211_hdr *pwlanhdr; - struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); - struct rtw_ndpa_sta_info sta_info; - u8 *pframe; - u16 *fctrl; - u16 duration = 0; - u8 sequence = 0, aSifsTime = 0; - - pmgntframe = alloc_mgtxmitframe(pxmitpriv); - if (pmgntframe == NULL) - return _FALSE; - - /*update attribute*/ - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(Adapter, pattrib); - - if (qidx == BCN_QUEUE_INX) - pattrib->qsel = QSLT_BEACON; - pattrib->rate = MGN_VHT2SS_MCS0; - pattrib->bwmode = bw; - pattrib->subtype = WIFI_NDPA; - - memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); - - pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &pwlanhdr->frame_ctl; - *(fctrl) = 0; - - set_frame_sub_type(pframe, WIFI_NDPA); - - _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); - - if (is_supported_5g(pmlmeext->cur_wireless_mode) || is_supported_ht(pmlmeext->cur_wireless_mode)) - aSifsTime = 16; - else - aSifsTime = 10; - - duration = 2 * aSifsTime + 44; - - if (bw == CHANNEL_WIDTH_80) - duration += 40; - else if (bw == CHANNEL_WIDTH_40) - duration += 87; - else - duration += 180; - - set_duration(pframe, duration); - - sequence = pBeamInfo->sounding_sequence << 2; - if (pBeamInfo->sounding_sequence >= 0x3f) - pBeamInfo->sounding_sequence = 0; - else - pBeamInfo->sounding_sequence++; - - _rtw_memcpy(pframe + 16, &sequence, 1); - - if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) - aid = 0; - - sta_info.aid = aid; - sta_info.feedback_type = 0; - sta_info.nc_index = 0; - - _rtw_memcpy(pframe + 17, (u8 *)&sta_info, 2); - - pattrib->pktlen = 19; - - pattrib->last_txcmdsz = pattrib->pktlen; - - dump_mgntframe(Adapter, pmgntframe); - - return _TRUE; -} - -BOOLEAN beamforming_send_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, enum channel_width bw, u8 qidx) -{ - return issue_vht_ndpa_packet(Adapter, ra, aid, bw, qidx); -} - -BOOLEAN beamfomring_bSounding(struct beamforming_info *pBeamInfo) -{ - BOOLEAN bSounding = _FALSE; - - if ((beamforming_get_beamform_cap(pBeamInfo) & BEAMFORMER_CAP) == 0) - bSounding = _FALSE; - else - bSounding = _TRUE; - - return bSounding; -} - -u8 beamforming_sounding_idx(struct beamforming_info *pBeamInfo) -{ - u8 idx = 0; - u8 i; - - for (i = 0; i < BEAMFORMING_ENTRY_NUM; i++) { - if (pBeamInfo->beamforming_entry[i].bUsed && - (_FALSE == pBeamInfo->beamforming_entry[i].bSound)) { - idx = i; - break; - } - } - - return idx; -} - -SOUNDING_MODE beamforming_sounding_mode(struct beamforming_info *pBeamInfo, u8 idx) -{ - struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; - SOUNDING_MODE mode; - - if (BeamEntry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) - mode = SOUNDING_FW_VHT_TIMER; - else if (BeamEntry.beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) - mode = SOUNDING_FW_HT_TIMER; - else - mode = SOUNDING_STOP_All_TIMER; - - return mode; -} - -u16 beamforming_sounding_time(struct beamforming_info *pBeamInfo, SOUNDING_MODE mode, u8 idx) -{ - u16 sounding_time = 0xffff; - struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; - - sounding_time = BeamEntry.sound_period; - - return sounding_time; -} - -enum channel_width beamforming_sounding_bw(struct beamforming_info *pBeamInfo, SOUNDING_MODE mode, u8 idx) -{ - enum channel_width sounding_bw = CHANNEL_WIDTH_20; - struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; - - sounding_bw = BeamEntry.sound_bw; - - return sounding_bw; -} - -BOOLEAN beamforming_select_beam_entry(struct beamforming_info *pBeamInfo) -{ - struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); - - pSoundInfo->sound_idx = beamforming_sounding_idx(pBeamInfo); - - if (pSoundInfo->sound_idx < BEAMFORMING_ENTRY_NUM) - pSoundInfo->sound_mode = beamforming_sounding_mode(pBeamInfo, pSoundInfo->sound_idx); - else - pSoundInfo->sound_mode = SOUNDING_STOP_All_TIMER; - - if (SOUNDING_STOP_All_TIMER == pSoundInfo->sound_mode) - return _FALSE; - else { - pSoundInfo->sound_bw = beamforming_sounding_bw(pBeamInfo, pSoundInfo->sound_mode, pSoundInfo->sound_idx); - pSoundInfo->sound_period = beamforming_sounding_time(pBeamInfo, pSoundInfo->sound_mode, pSoundInfo->sound_idx); - return _TRUE; - } -} - -BOOLEAN beamforming_start_fw(PADAPTER adapter, u8 idx) -{ - u8 *RA = NULL; - struct beamforming_entry *pEntry; - BOOLEAN ret = _TRUE; - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); - - pEntry = &(pBeamInfo->beamforming_entry[idx]); - if (pEntry->bUsed == _FALSE) { - RTW_INFO("Skip Beamforming, no entry for Idx =%d\n", idx); - return _FALSE; - } - - pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING; - pEntry->bSound = _TRUE; - rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&idx); - - return _TRUE; -} - -void beamforming_end_fw(PADAPTER adapter) -{ - u8 idx = 0; - - rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&idx); - - RTW_INFO("%s\n", __FUNCTION__); -} - -BOOLEAN beamforming_start_period(PADAPTER adapter) -{ - BOOLEAN ret = _TRUE; - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); - struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); - - beamforming_dym_ndpa_rate(adapter); - - beamforming_select_beam_entry(pBeamInfo); - - if (pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) - ret = beamforming_start_fw(adapter, pSoundInfo->sound_idx); - else - ret = _FALSE; - - RTW_INFO("%s Idx %d Mode %d BW %d Period %d\n", __FUNCTION__, - pSoundInfo->sound_idx, pSoundInfo->sound_mode, pSoundInfo->sound_bw, pSoundInfo->sound_period); - - return ret; -} - -void beamforming_end_period(PADAPTER adapter) -{ - u8 idx = 0; - struct beamforming_entry *pBeamformEntry; - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); - struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); - - - if (pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) - beamforming_end_fw(adapter); -} - -void beamforming_notify(PADAPTER adapter) -{ - BOOLEAN bSounding = _FALSE; - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(adapter->mlmepriv)); - - bSounding = beamfomring_bSounding(pBeamInfo); - - if (pBeamInfo->beamforming_state == BEAMFORMING_STATE_IDLE) { - if (bSounding) { - if (beamforming_start_period(adapter) == _TRUE) - pBeamInfo->beamforming_state = BEAMFORMING_STATE_START; - } - } else if (pBeamInfo->beamforming_state == BEAMFORMING_STATE_START) { - if (bSounding) { - if (beamforming_start_period(adapter) == _FALSE) - pBeamInfo->beamforming_state = BEAMFORMING_STATE_END; - } else { - beamforming_end_period(adapter); - pBeamInfo->beamforming_state = BEAMFORMING_STATE_END; - } - } else if (pBeamInfo->beamforming_state == BEAMFORMING_STATE_END) { - if (bSounding) { - if (beamforming_start_period(adapter) == _TRUE) - pBeamInfo->beamforming_state = BEAMFORMING_STATE_START; - } - } else - RTW_INFO("%s BeamformState %d\n", __FUNCTION__, pBeamInfo->beamforming_state); - - RTW_INFO("%s BeamformState %d bSounding %d\n", __FUNCTION__, pBeamInfo->beamforming_state, bSounding); -} - -BOOLEAN beamforming_init_entry(PADAPTER adapter, struct sta_info *psta, u8 *idx) -{ - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct ht_priv *phtpriv = &(pmlmepriv->htpriv); -#ifdef CONFIG_80211AC_VHT - struct vht_priv *pvhtpriv = &(pmlmepriv->vhtpriv); -#endif - struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct beamforming_entry *pBeamformEntry = NULL; - u8 *ra; - u16 aid, mac_id; - u8 wireless_mode; - enum channel_width bw = CHANNEL_WIDTH_20; - BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE; - - /* The current setting does not support Beaforming */ - if (0 == phtpriv->beamform_cap -#ifdef CONFIG_80211AC_VHT - && 0 == pvhtpriv->beamform_cap -#endif - ) { - RTW_INFO("The configuration disabled Beamforming! Skip...\n"); - return _FALSE; - } - - aid = psta->cmn.aid; - ra = psta->cmn.mac_addr; - mac_id = psta->cmn.mac_id; - wireless_mode = psta->wireless_mode; - bw = psta->cmn.bw_mode; - - if (is_supported_ht(wireless_mode) || is_supported_vht(wireless_mode)) { - /* 3 */ /* HT */ - u8 cur_beamform; - - cur_beamform = psta->htpriv.beamform_cap; - - /* We are Beamformee because the STA is Beamformer */ - if (TEST_FLAG(cur_beamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) - beamform_cap = (BEAMFORMING_CAP)(beamform_cap | BEAMFORMEE_CAP_HT_EXPLICIT); - - /* We are Beamformer because the STA is Beamformee */ - if (TEST_FLAG(cur_beamform, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) - beamform_cap = (BEAMFORMING_CAP)(beamform_cap | BEAMFORMER_CAP_HT_EXPLICIT); -#ifdef CONFIG_80211AC_VHT - if (is_supported_vht(wireless_mode)) { - /* 3 */ /* VHT */ - cur_beamform = psta->vhtpriv.beamform_cap; - - /* We are Beamformee because the STA is Beamformer */ - if (TEST_FLAG(cur_beamform, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) - beamform_cap = (BEAMFORMING_CAP)(beamform_cap | BEAMFORMEE_CAP_VHT_SU); - /* We are Beamformer because the STA is Beamformee */ - if (TEST_FLAG(cur_beamform, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) - beamform_cap = (BEAMFORMING_CAP)(beamform_cap | BEAMFORMER_CAP_VHT_SU); - } -#endif /* CONFIG_80211AC_VHT */ - - if (beamform_cap == BEAMFORMING_CAP_NONE) - return _FALSE; - - RTW_INFO("Beamforming Config Capability = 0x%02X\n", beamform_cap); - - pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ra, idx); - if (pBeamformEntry == NULL) { - pBeamformEntry = beamforming_add_entry(adapter, ra, aid, mac_id, bw, beamform_cap, idx); - if (pBeamformEntry == NULL) - return _FALSE; - else - pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; - } else { - /* Entry has been created. If entry is initialing or progressing then errors occur. */ - if (pBeamformEntry->beamforming_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && - pBeamformEntry->beamforming_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) { - RTW_INFO("Error State of Beamforming"); - return _FALSE; - } else - pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; - } - - pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; - psta->cmn.bf_info.p_aid = pBeamformEntry->p_aid; - psta->cmn.bf_info.g_id = pBeamformEntry->g_id; - - RTW_INFO("%s Idx %d\n", __FUNCTION__, *idx); - } else - return _FALSE; - - return _SUCCESS; -} - -void beamforming_deinit_entry(PADAPTER adapter, u8 *ra) -{ - u8 idx = 0; - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - - if (beamforming_remove_entry(pmlmepriv, ra, &idx) == _TRUE) - rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_LEAVE, (u8 *)&idx); - - RTW_INFO("%s Idx %d\n", __FUNCTION__, idx); -} - -void beamforming_reset(PADAPTER adapter) -{ - u8 idx = 0; - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); - - for (idx = 0; idx < BEAMFORMING_ENTRY_NUM; idx++) { - if (pBeamInfo->beamforming_entry[idx].bUsed == _TRUE) { - pBeamInfo->beamforming_entry[idx].bUsed = _FALSE; - pBeamInfo->beamforming_entry[idx].beamforming_entry_cap = BEAMFORMING_CAP_NONE; - pBeamInfo->beamforming_entry[idx].beamforming_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; - rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_LEAVE, (u8 *)&idx); - } - } - - RTW_INFO("%s\n", __FUNCTION__); -} - -void beamforming_sounding_fail(PADAPTER Adapter) -{ - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); - struct beamforming_entry *pEntry = &(pBeamInfo->beamforming_entry[pBeamInfo->beamforming_cur_idx]); - - pEntry->bSound = _FALSE; - rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&pBeamInfo->beamforming_cur_idx); - beamforming_deinit_entry(Adapter, pEntry->mac_addr); -} - -void beamforming_check_sounding_success(PADAPTER Adapter, BOOLEAN status) -{ - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); - struct beamforming_entry *pEntry = &(pBeamInfo->beamforming_entry[pBeamInfo->beamforming_cur_idx]); - - if (status == 1) - pEntry->LogStatusFailCnt = 0; - else { - pEntry->LogStatusFailCnt++; - RTW_INFO("%s LogStatusFailCnt %d\n", __FUNCTION__, pEntry->LogStatusFailCnt); - } - if (pEntry->LogStatusFailCnt > 20) { - RTW_INFO("%s LogStatusFailCnt > 20, Stop SOUNDING\n", __FUNCTION__); - /* pEntry->bSound = _FALSE; */ - /* rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&pBeamInfo->beamforming_cur_idx); */ - /* beamforming_deinit_entry(Adapter, pEntry->mac_addr); */ - beamforming_wk_cmd(Adapter, BEAMFORMING_CTRL_SOUNDING_FAIL, NULL, 0, 1); - } -} - -void beamforming_enter(PADAPTER adapter, PVOID psta) -{ - u8 idx = 0xff; - - if (beamforming_init_entry(adapter, (struct sta_info *)psta, &idx)) - rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_ENTER, (u8 *)&idx); - - /* RTW_INFO("%s Idx %d\n", __FUNCTION__, idx); */ -} - -void beamforming_leave(PADAPTER adapter, u8 *ra) -{ - if (ra == NULL) - beamforming_reset(adapter); - else - beamforming_deinit_entry(adapter, ra); - - beamforming_notify(adapter); -} - -BEAMFORMING_CAP beamforming_get_beamform_cap(struct beamforming_info *pBeamInfo) -{ - u8 i; - BOOLEAN bSelfBeamformer = _FALSE; - BOOLEAN bSelfBeamformee = _FALSE; - struct beamforming_entry beamforming_entry; - BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE; - - for (i = 0; i < BEAMFORMING_ENTRY_NUM; i++) { - beamforming_entry = pBeamInfo->beamforming_entry[i]; - - if (beamforming_entry.bUsed) { - if ((beamforming_entry.beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU) || - (beamforming_entry.beamforming_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT)) - bSelfBeamformee = _TRUE; - if ((beamforming_entry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) || - (beamforming_entry.beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) - bSelfBeamformer = _TRUE; - } - - if (bSelfBeamformer && bSelfBeamformee) - i = BEAMFORMING_ENTRY_NUM; - } - - if (bSelfBeamformer) - beamform_cap |= BEAMFORMER_CAP; - if (bSelfBeamformee) - beamform_cap |= BEAMFORMEE_CAP; - - return beamform_cap; -} - -void beamforming_watchdog(PADAPTER Adapter) -{ - struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO((&(Adapter->mlmepriv))); - - if (pBeamInfo->beamforming_state != BEAMFORMING_STATE_START) - return; - - beamforming_dym_period(Adapter); - beamforming_dym_ndpa_rate(Adapter); -} -#endif/* #if (BEAMFORMING_SUPPORT ==0) - for diver defined beamforming*/ - +/*PHYDM_BF - (BEAMFORMING_SUPPORT == 1)*/ u32 rtw_beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame) { u32 ret = _SUCCESS; -#if (BEAMFORMING_SUPPORT == 1) + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); struct dm_struct *pDM_Odm = &(pHalData->odmpriv); ret = beamforming_get_report_frame(pDM_Odm, precv_frame); - -#else /*(BEAMFORMING_SUPPORT == 0)- for drv beamfoming*/ - struct beamforming_entry *pBeamformEntry = NULL; - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - u8 *pframe = precv_frame->u.hdr.rx_data; - u32 frame_len = precv_frame->u.hdr.len; - u8 *ta; - u8 idx, offset; - - /*RTW_INFO("rtw_beamforming_get_report_frame\n");*/ - - /*Memory comparison to see if CSI report is the same with previous one*/ - ta = get_addr2_ptr(pframe); - pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ta, &idx); - if (pBeamformEntry->beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) - offset = 31; /*24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ - else if (pBeamformEntry->beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) - offset = 34; /*24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ - else - return ret; - - /*RTW_INFO("%s MacId %d offset=%d\n", __FUNCTION__, pBeamformEntry->mac_id, offset);*/ - - if (_rtw_memcmp(pBeamformEntry->PreCsiReport + offset, pframe + offset, frame_len - offset) == _FALSE) - pBeamformEntry->DefaultCsiCnt = 0; - else - pBeamformEntry->DefaultCsiCnt++; - - _rtw_memcpy(&pBeamformEntry->PreCsiReport, pframe, frame_len); - - pBeamformEntry->bDefaultCSI = _FALSE; - - if (pBeamformEntry->DefaultCsiCnt > 20) - pBeamformEntry->bDefaultCSI = _TRUE; - else - pBeamformEntry->bDefaultCSI = _FALSE; -#endif return ret; } void rtw_beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame) { -#if (BEAMFORMING_SUPPORT == 1) PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); struct dm_struct *pDM_Odm = &(pHalData->odmpriv); beamforming_get_ndpa_frame(pDM_Odm, precv_frame); - -#else /*(BEAMFORMING_SUPPORT == 0)- for drv beamfoming*/ - u8 *ta; - u8 idx, Sequence; - u8 *pframe = precv_frame->u.hdr.rx_data; - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - struct beamforming_entry *pBeamformEntry = NULL; - - /*RTW_INFO("rtw_beamforming_get_ndpa_frame\n");*/ - - if (IS_HARDWARE_TYPE_8812(Adapter) == _FALSE) - return; - else if (get_frame_sub_type(pframe) != WIFI_NDPA) - return; - - ta = get_addr2_ptr(pframe); - /*Remove signaling TA. */ - ta[0] = ta[0] & 0xFE; - - pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ta, &idx); - - if (pBeamformEntry == NULL) - return; - else if (!(pBeamformEntry->beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU)) - return; - /*LogSuccess: As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is NO LONGER needed !2015-04-10, Jeffery*/ - /*ClockResetTimes: While BFer entry always doesn't receive our CSI, clock will reset again and again.So ClockResetTimes is limited to 5 times.2015-04-13, Jeffery*/ - else if ((pBeamformEntry->LogSuccess == 1) || (pBeamformEntry->ClockResetTimes == 5)) { - RTW_INFO("[%s] LogSeq=%d, PreLogSeq=%d\n", __func__, pBeamformEntry->LogSeq, pBeamformEntry->PreLogSeq); - return; - } - - Sequence = (pframe[16]) >> 2; - RTW_INFO("[%s] Start, Sequence=%d, LogSeq=%d, PreLogSeq=%d, LogRetryCnt=%d, ClockResetTimes=%d, LogSuccess=%d\n", - __func__, Sequence, pBeamformEntry->LogSeq, pBeamformEntry->PreLogSeq, pBeamformEntry->LogRetryCnt, pBeamformEntry->ClockResetTimes, pBeamformEntry->LogSuccess); - - if ((pBeamformEntry->LogSeq != 0) && (pBeamformEntry->PreLogSeq != 0)) { - /*Success condition*/ - if ((pBeamformEntry->LogSeq != Sequence) && (pBeamformEntry->PreLogSeq != pBeamformEntry->LogSeq)) { - /* break option for clcok reset, 2015-03-30, Jeffery */ - pBeamformEntry->LogRetryCnt = 0; - /*As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is no longer needed.*/ - /*That is, LogSuccess is NOT needed to be reset to zero, 2015-04-13, Jeffery*/ - pBeamformEntry->LogSuccess = 1; - - } else {/*Fail condition*/ - - if (pBeamformEntry->LogRetryCnt == 5) { - pBeamformEntry->ClockResetTimes++; - pBeamformEntry->LogRetryCnt = 0; - - RTW_INFO("[%s] Clock Reset!!! ClockResetTimes=%d\n", __func__, pBeamformEntry->ClockResetTimes); - beamforming_wk_cmd(Adapter, BEAMFORMING_CTRL_SOUNDING_CLK, NULL, 0, 1); - - } else - pBeamformEntry->LogRetryCnt++; - } - } - - /*Update LogSeq & PreLogSeq*/ - pBeamformEntry->PreLogSeq = pBeamformEntry->LogSeq; - pBeamformEntry->LogSeq = Sequence; - -#endif - } - - - void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); struct dm_struct *pDM_Odm = &(pHalData->odmpriv); -#if (BEAMFORMING_SUPPORT == 1) /*(BEAMFORMING_SUPPORT == 1)- for PHYDM beamfoming*/ + /*(BEAMFORMING_SUPPORT == 1)- for PHYDM beamfoming*/ switch (type) { case BEAMFORMING_CTRL_ENTER: { - struct sta_info *psta = (PVOID)pbuf; + struct sta_info *psta = (void *)pbuf; u16 staIdx = psta->cmn.mac_id; - beamforming_enter(pDM_Odm, staIdx); + beamforming_enter(pDM_Odm, staIdx, adapter_mac_addr(psta->padapter)); break; } case BEAMFORMING_CTRL_LEAVE: @@ -3057,28 +2045,6 @@ void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf) break; } -#else /*(BEAMFORMING_SUPPORT == 0)- for drv beamfoming*/ - switch (type) { - case BEAMFORMING_CTRL_ENTER: - beamforming_enter(padapter, (PVOID)pbuf); - break; - - case BEAMFORMING_CTRL_LEAVE: - beamforming_leave(padapter, pbuf); - break; - - case BEAMFORMING_CTRL_SOUNDING_FAIL: - beamforming_sounding_fail(padapter); - break; - - case BEAMFORMING_CTRL_SOUNDING_CLK: - rtw_hal_set_hwreg(padapter, HW_VAR_SOUNDING_CLK, NULL); - break; - - default: - break; - } -#endif } u8 beamforming_wk_cmd(_adapter *padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue) diff --git a/core/rtw_br_ext.c b/core/rtw_br_ext.c index 6509df3..9a0effd 100644 --- a/core/rtw_br_ext.c +++ b/core/rtw_br_ext.c @@ -301,7 +301,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char return 0; } - +#ifdef SUPPORT_RX_UNI2MCAST static void convert_ipv6_mac_to_mc(struct sk_buff *skb) { struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN); @@ -319,6 +319,7 @@ static void convert_ipv6_mac_to_mc(struct sk_buff *skb) #endif } #endif /* CL_IPV6_PASS */ +#endif /* SUPPORT_RX_UNI2MCAST */ static __inline__ int __nat25_network_hash(unsigned char *networkAddr) diff --git a/core/rtw_bt_mp.c b/core/rtw_bt_mp.c index 9b4fc24..ce7aa29 100644 --- a/core/rtw_bt_mp.c +++ b/core/rtw_bt_mp.c @@ -97,13 +97,13 @@ BT_CTRL_STATUS mptbt_SendH2c( PADAPTER Adapter, PBT_H2C pH2c, - u2Byte h2cCmdLen + u16 h2cCmdLen ) { /* KIRQL OldIrql = KeGetCurrentIrql(); */ BT_CTRL_STATUS h2cStatus = BT_STATUS_H2C_SUCCESS; PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); - u1Byte i; + u8 i; RTW_INFO("[MPT], mptbt_SendH2c()=========>\n"); @@ -192,17 +192,17 @@ mptbt_CheckBtRspStatus( BT_CTRL_STATUS mptbt_BtFwOpCodeProcess( PADAPTER Adapter, - u1Byte btFwOpCode, - u1Byte opCodeVer, - pu1Byte pH2cPar, - u1Byte h2cParaLen + u8 btFwOpCode, + u8 opCodeVer, + u8 *pH2cPar, + u8 h2cParaLen ) { - u1Byte H2C_Parameter[6] = {0}; + u8 H2C_Parameter[6] = {0}; PBT_H2C pH2c = (PBT_H2C)&H2C_Parameter[0]; PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); PBT_EXT_C2H pExtC2h = (PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; - u2Byte paraLen = 0, i; + u16 paraLen = 0, i; BT_CTRL_STATUS h2cStatus = BT_STATUS_H2C_SUCCESS, c2hStatus = BT_STATUS_C2H_SUCCESS; BT_CTRL_STATUS retStatus = BT_STATUS_H2C_BT_NO_RSP; @@ -248,25 +248,25 @@ mptbt_BtFwOpCodeProcess( -u2Byte +u16 mptbt_BtReady( PADAPTER Adapter, PBT_REQ_CMD pBtReq, PBT_RSP_CMD pBtRsp ) { - u1Byte h2cParaBuf[6] = {0}; - u1Byte h2cParaLen = 0; - u2Byte paraLen = 0; - u1Byte retStatus = BT_STATUS_BT_OP_SUCCESS; - u1Byte btOpcode; - u1Byte btOpcodeVer = 0; + u8 h2cParaBuf[6] = {0}; + u8 h2cParaLen = 0; + u16 paraLen = 0; + u8 retStatus = BT_STATUS_BT_OP_SUCCESS; + u8 btOpcode; + u8 btOpcodeVer = 0; PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); PBT_EXT_C2H pExtC2h = (PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; - u1Byte i; - u1Byte btFwVer = 0, bdAddr[6] = {0}; - u2Byte btRealFwVer = 0; - pu2Byte pu2Tmp = NULL; + u8 i; + u8 btFwVer = 0, bdAddr[6] = {0}; + u16 btRealFwVer = 0; + u16 *pu2Tmp = NULL; /* */ /* check upper layer parameters */ @@ -296,7 +296,7 @@ mptbt_BtReady( RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); return paraLen; } else { - pu2Tmp = (pu2Byte)&pExtC2h->buf[0]; + pu2Tmp = (u16 *)&pExtC2h->buf[0]; btRealFwVer = *pu2Tmp; btFwVer = pExtC2h->buf[1]; RTW_INFO("[MPT], btRealFwVer=0x%x, btFwVer=0x%x\n", btRealFwVer, btFwVer); @@ -337,7 +337,7 @@ mptbt_BtReady( RTW_INFO(" 0x%x ", bdAddr[i]); pBtRsp->status = BT_STATUS_SUCCESS; pBtRsp->pParamStart[0] = MP_BT_READY; - pu2Tmp = (pu2Byte)&pBtRsp->pParamStart[1]; + pu2Tmp = (u16 *)&pBtRsp->pParamStart[1]; *pu2Tmp = btRealFwVer; pBtRsp->pParamStart[3] = btFwVer; for (i = 0; i < 6; i++) @@ -360,9 +360,9 @@ void mptbt_open_WiFiRF(PADAPTER Adapter) phy_set_rf_reg(Adapter, RF_PATH_A, 0x0, 0xF0000, 0x3); } -u4Byte mptbt_switch_RF(PADAPTER Adapter, u1Byte Enter) +u32 mptbt_switch_RF(PADAPTER Adapter, u8 Enter) { - u2Byte tmp_2byte = 0; + u16 tmp_2byte = 0; /* Enter test mode */ if (Enter) { @@ -390,20 +390,20 @@ u4Byte mptbt_switch_RF(PADAPTER Adapter, u1Byte Enter) return 0; } -u2Byte +u16 mptbt_BtSetMode( PADAPTER Adapter, PBT_REQ_CMD pBtReq, PBT_RSP_CMD pBtRsp ) { - u1Byte h2cParaBuf[6] = {0}; - u1Byte h2cParaLen = 0; - u2Byte paraLen = 0; - u1Byte retStatus = BT_STATUS_BT_OP_SUCCESS; - u1Byte btOpcode; - u1Byte btOpcodeVer = 0; - u1Byte btModeToSet = 0; + u8 h2cParaBuf[6] = {0}; + u8 h2cParaLen = 0; + u16 paraLen = 0; + u8 retStatus = BT_STATUS_BT_OP_SUCCESS; + u8 btOpcode; + u8 btOpcodeVer = 0; + u8 btModeToSet = 0; /* */ /* check upper layer parameters */ @@ -455,11 +455,11 @@ mptbt_BtSetMode( } -VOID +void MPTBT_FwC2hBtMpCtrl( PADAPTER Adapter, - pu1Byte tmpBuf, - u1Byte length + u8 *tmpBuf, + u8 length ) { u32 i; @@ -525,28 +525,28 @@ MPTBT_FwC2hBtMpCtrl( } -u2Byte +u16 mptbt_BtGetGeneral( - IN PADAPTER Adapter, - IN PBT_REQ_CMD pBtReq, - IN PBT_RSP_CMD pBtRsp + PADAPTER Adapter, + PBT_REQ_CMD pBtReq, + PBT_RSP_CMD pBtRsp ) { PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); PBT_EXT_C2H pExtC2h = (PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; - u1Byte h2cParaBuf[6] = {0}; - u1Byte h2cParaLen = 0; - u2Byte paraLen = 0; - u1Byte retStatus = BT_STATUS_BT_OP_SUCCESS; - u1Byte btOpcode, bdAddr[6] = {0}; - u1Byte btOpcodeVer = 0; - u1Byte getType = 0, i; - u2Byte getParaLen = 0, validParaLen = 0; - u1Byte regType = 0, reportType = 0; - u4Byte regAddr = 0, regValue = 0; - pu4Byte pu4Tmp; - pu2Byte pu2Tmp; - pu1Byte pu1Tmp; + u8 h2cParaBuf[6] = {0}; + u8 h2cParaLen = 0; + u16 paraLen = 0; + u8 retStatus = BT_STATUS_BT_OP_SUCCESS; + u8 btOpcode, bdAddr[6] = {0}; + u8 btOpcodeVer = 0; + u8 getType = 0, i; + u16 getParaLen = 0, validParaLen = 0; + u8 regType = 0, reportType = 0; + u32 regAddr = 0, regValue = 0; + u32 *pu4Tmp; + u16 *pu2Tmp; + u8 *pu1Tmp; /* */ /* check upper layer parameters */ @@ -577,7 +577,7 @@ mptbt_BtGetGeneral( if (getParaLen == validParaLen) { btOpcode = BT_LO_OP_READ_REG; regType = pBtReq->pParamStart[1]; - pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2]; + pu4Tmp = (u32 *)&pBtReq->pParamStart[2]; regAddr = *pu4Tmp; RTW_INFO("[MPT], BT_GGET_REG regType=0x%02x, regAddr=0x%08x!!\n", regType, regAddr); @@ -646,12 +646,12 @@ mptbt_BtGetGeneral( return paraLen; } - pu2Tmp = (pu2Byte)&pExtC2h->buf[0]; + pu2Tmp = (u16 *)&pExtC2h->buf[0]; regValue = *pu2Tmp; RTW_INFO("[MPT], read reg regType=0x%02x, regAddr=0x%08x, regValue=0x%04x\n", regType, regAddr, regValue); - pu4Tmp = (pu4Byte)&pBtRsp->pParamStart[0]; + pu4Tmp = (u32 *)&pBtRsp->pParamStart[0]; *pu4Tmp = regValue; paraLen = 4; } else if (BT_GGET_STATUS == getType) { @@ -829,26 +829,26 @@ mptbt_BtGetGeneral( -u2Byte +u16 mptbt_BtSetGeneral( - IN PADAPTER Adapter, - IN PBT_REQ_CMD pBtReq, - IN PBT_RSP_CMD pBtRsp + PADAPTER Adapter, + PBT_REQ_CMD pBtReq, + PBT_RSP_CMD pBtRsp ) { - u1Byte h2cParaBuf[6] = {0}; - u1Byte h2cParaLen = 0; - u2Byte paraLen = 0; - u1Byte retStatus = BT_STATUS_BT_OP_SUCCESS; - u1Byte btOpcode; - u1Byte btOpcodeVer = 0; - u1Byte setType = 0; - u2Byte setParaLen = 0, validParaLen = 0; - u1Byte regType = 0, bdAddr[6] = {0}, calVal = 0; - u4Byte regAddr = 0, regValue = 0; - pu4Byte pu4Tmp; - pu2Byte pu2Tmp; - pu1Byte pu1Tmp; + u8 h2cParaBuf[6] = {0}; + u8 h2cParaLen = 0; + u16 paraLen = 0; + u8 retStatus = BT_STATUS_BT_OP_SUCCESS; + u8 btOpcode; + u8 btOpcodeVer = 0; + u8 setType = 0; + u16 setParaLen = 0, validParaLen = 0; + u8 regType = 0, bdAddr[6] = {0}, calVal = 0; + u32 regAddr = 0, regValue = 0; + u32 *pu4Tmp; + u16 *pu2Tmp; + u8 *pu1Tmp; /* */ /* check upper layer parameters */ @@ -879,9 +879,9 @@ mptbt_BtSetGeneral( if (setParaLen == validParaLen) { btOpcode = BT_LO_OP_WRITE_REG_VALUE; regType = pBtReq->pParamStart[1]; - pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2]; + pu4Tmp = (u32 *)&pBtReq->pParamStart[2]; regAddr = *pu4Tmp; - pu4Tmp = (pu4Byte)&pBtReq->pParamStart[6]; + pu4Tmp = (u32 *)&pBtReq->pParamStart[6]; regValue = *pu4Tmp; RTW_INFO("[MPT], BT_GSET_REG regType=0x%x, regAddr=0x%x, regValue=0x%x!!\n", regType, regAddr, regValue); @@ -1116,23 +1116,23 @@ mptbt_BtSetGeneral( -u2Byte +u16 mptbt_BtSetTxRxPars( - IN PADAPTER Adapter, - IN PBT_REQ_CMD pBtReq, - IN PBT_RSP_CMD pBtRsp + PADAPTER Adapter, + PBT_REQ_CMD pBtReq, + PBT_RSP_CMD pBtRsp ) { - u1Byte h2cParaBuf[6] = {0}; - u1Byte h2cParaLen = 0; - u2Byte paraLen = 0; - u1Byte retStatus = BT_STATUS_BT_OP_SUCCESS; - u1Byte btOpcode; - u1Byte btOpcodeVer = 0; + u8 h2cParaBuf[6] = {0}; + u8 h2cParaLen = 0; + u16 paraLen = 0; + u8 retStatus = BT_STATUS_BT_OP_SUCCESS; + u8 btOpcode; + u8 btOpcodeVer = 0; PBT_TXRX_PARAMETERS pTxRxPars = (PBT_TXRX_PARAMETERS)&pBtReq->pParamStart[0]; - u2Byte lenTxRx = sizeof(BT_TXRX_PARAMETERS); - u1Byte i; - u1Byte bdAddr[6] = {0}; + u16 lenTxRx = sizeof(BT_TXRX_PARAMETERS); + u8 i; + u8 bdAddr[6] = {0}; /* */ /* check upper layer parameters */ @@ -1179,9 +1179,9 @@ mptbt_BtSetTxRxPars( pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } else { - h2cParaBuf[0] = (u1Byte)(pTxRxPars->txrxPktHeader & 0xff); - h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxPktHeader & 0xff00) >> 8); - h2cParaBuf[2] = (u1Byte)((pTxRxPars->txrxPktHeader & 0xff0000) >> 16); + h2cParaBuf[0] = (u8)(pTxRxPars->txrxPktHeader & 0xff); + h2cParaBuf[1] = (u8)((pTxRxPars->txrxPktHeader & 0xff00) >> 8); + h2cParaBuf[2] = (u8)((pTxRxPars->txrxPktHeader & 0xff0000) >> 16); h2cParaLen = 3; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); } @@ -1196,7 +1196,7 @@ mptbt_BtSetTxRxPars( /* fill h2c parameters */ btOpcode = BT_LO_OP_SET_PKT_TYPE_LEN; { - u2Byte payloadLenLimit = 0; + u16 payloadLenLimit = 0; switch (pTxRxPars->txrxPktType) { case MP_BT_PKT_DH1: payloadLenLimit = 27 * 8; @@ -1244,8 +1244,8 @@ mptbt_BtSetTxRxPars( } h2cParaBuf[0] = pTxRxPars->txrxPktType; - h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxPayloadLen & 0xff)); - h2cParaBuf[2] = (u1Byte)((pTxRxPars->txrxPayloadLen & 0xff00) >> 8); + h2cParaBuf[1] = (u8)((pTxRxPars->txrxPayloadLen & 0xff)); + h2cParaBuf[2] = (u8)((pTxRxPars->txrxPayloadLen & 0xff00) >> 8); h2cParaLen = 3; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); } @@ -1264,8 +1264,8 @@ mptbt_BtSetTxRxPars( pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } else { - h2cParaBuf[0] = (u1Byte)((pTxRxPars->txrxTxPktCnt & 0xff)); - h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxTxPktCnt & 0xff00) >> 8); + h2cParaBuf[0] = (u8)((pTxRxPars->txrxTxPktCnt & 0xff)); + h2cParaBuf[1] = (u8)((pTxRxPars->txrxTxPktCnt & 0xff00) >> 8); h2cParaBuf[2] = pTxRxPars->txrxPayloadType; h2cParaLen = 3; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); @@ -1285,8 +1285,8 @@ mptbt_BtSetTxRxPars( pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } else { - h2cParaBuf[0] = (u1Byte)((pTxRxPars->txrxTxPktCnt & 0xff0000) >> 16); - h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxTxPktCnt & 0xff000000) >> 24); + h2cParaBuf[0] = (u8)((pTxRxPars->txrxTxPktCnt & 0xff0000) >> 16); + h2cParaBuf[1] = (u8)((pTxRxPars->txrxTxPktCnt & 0xff000000) >> 24); h2cParaBuf[2] = pTxRxPars->txrxTxPktInterval; h2cParaLen = 3; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); @@ -1395,20 +1395,20 @@ mptbt_BtSetTxRxPars( -u2Byte +u16 mptbt_BtTestCtrl( - IN PADAPTER Adapter, - IN PBT_REQ_CMD pBtReq, - IN PBT_RSP_CMD pBtRsp + PADAPTER Adapter, + PBT_REQ_CMD pBtReq, + PBT_RSP_CMD pBtRsp ) { - u1Byte h2cParaBuf[6] = {0}; - u1Byte h2cParaLen = 0; - u2Byte paraLen = 0; - u1Byte retStatus = BT_STATUS_BT_OP_SUCCESS; - u1Byte btOpcode; - u1Byte btOpcodeVer = 0; - u1Byte testCtrl = 0; + u8 h2cParaBuf[6] = {0}; + u8 h2cParaLen = 0; + u16 paraLen = 0; + u8 retStatus = BT_STATUS_BT_OP_SUCCESS; + u8 btOpcode; + u8 btOpcodeVer = 0; + u8 testCtrl = 0; /* */ /* check upper layer parameters */ @@ -1460,21 +1460,21 @@ mptbt_BtTestCtrl( } -u2Byte +u16 mptbt_TestBT( - IN PADAPTER Adapter, - IN PBT_REQ_CMD pBtReq, - IN PBT_RSP_CMD pBtRsp + PADAPTER Adapter, + PBT_REQ_CMD pBtReq, + PBT_RSP_CMD pBtRsp ) { - u1Byte h2cParaBuf[6] = {0}; - u1Byte h2cParaLen = 0; - u2Byte paraLen = 0; - u1Byte retStatus = BT_STATUS_BT_OP_SUCCESS; - u1Byte btOpcode; - u1Byte btOpcodeVer = 0; - u1Byte testCtrl = 0; + u8 h2cParaBuf[6] = {0}; + u8 h2cParaLen = 0; + u16 paraLen = 0; + u8 retStatus = BT_STATUS_BT_OP_SUCCESS; + u8 btOpcode; + u8 btOpcodeVer = 0; + u8 testCtrl = 0; /* 1. fill h2c parameters */ btOpcode = 0x11; @@ -1499,18 +1499,18 @@ mptbt_TestBT( return paraLen; } -VOID +void mptbt_BtControlProcess( PADAPTER Adapter, - PVOID pInBuf + void *pInBuf ) { - u1Byte H2C_Parameter[6] = {0}; + u8 H2C_Parameter[6] = {0}; PBT_H2C pH2c = (PBT_H2C)&H2C_Parameter[0]; PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); PBT_REQ_CMD pBtReq = (PBT_REQ_CMD)pInBuf; PBT_RSP_CMD pBtRsp; - u1Byte i; + u8 i; RTW_INFO("[MPT], mptbt_BtControlProcess()=========>\n"); diff --git a/core/rtw_btcoex.c b/core/rtw_btcoex.c index d1d8355..02b0e54 100644 --- a/core/rtw_btcoex.c +++ b/core/rtw_btcoex.c @@ -345,6 +345,21 @@ u32 rtw_btcoex_GetRaMask(PADAPTER padapter) return hal_btcoex_GetRaMask(padapter); } +u8 rtw_btcoex_query_reduced_wl_pwr_lvl(PADAPTER padapter) +{ + return hal_btcoex_query_reduced_wl_pwr_lvl(padapter); +} + +void rtw_btcoex_set_reduced_wl_pwr_lvl(PADAPTER padapter, u8 val) +{ + hal_btcoex_set_reduced_wl_pwr_lvl(padapter, val); +} + +void rtw_btcoex_do_reduce_wl_pwr_lvl(PADAPTER padapter) +{ + hal_btcoex_do_reduce_wl_pwr_lvl(padapter); +} + void rtw_btcoex_RecordPwrMode(PADAPTER padapter, u8 *pCmdBuf, u8 cmdLen) { hal_btcoex_RecordPwrMode(padapter, pCmdBuf, cmdLen); @@ -437,7 +452,6 @@ u8 rtw_btcoex_LPS_Leave(PADAPTER padapter) if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) { rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "BTCOEX"); - LPS_RF_ON_check(padapter, 100); pwrpriv->bpower_saving = _FALSE; } @@ -454,6 +468,16 @@ u16 rtw_btcoex_btreg_write(PADAPTER padapter, u8 type, u16 addr, u16 val) return hal_btcoex_btreg_write(padapter, type, addr, val); } +u16 rtw_btcoex_btset_testmode(PADAPTER padapter, u8 type) +{ + return hal_btcoex_btset_testode(padapter, type); +} + +u8 rtw_btcoex_get_reduce_wl_txpwr(PADAPTER padapter) +{ + return rtw_btcoex_query_reduced_wl_pwr_lvl(padapter); +} + u8 rtw_btcoex_get_bt_coexist(PADAPTER padapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); @@ -866,7 +890,7 @@ u8 rtw_btcoex_parse_HCI_link_status_notify_cmd(_adapter *padapter, u8 *pcmd, u16 RTW_INFO("Connection_Handle=0x%x, BTProfile=%d, BTSpec=%d\n", conHandle, btProfile, btCoreSpec); pTriple += 4; } else if (pBtMgnt->ExtConfig.HCIExtensionVer >= 1) { - conHandle = *((pu2Byte)&pTriple[0]); + conHandle = *((u16 *)&pTriple[0]); btProfile = pTriple[2]; btCoreSpec = pTriple[3]; linkRole = pTriple[4]; @@ -1627,7 +1651,7 @@ void rtw_btcoex_SendEventExtBtCoexControl(PADAPTER padapter, u8 bNeedDbgRsp, u8 u8 localBuf[32] = ""; u8 *pRetPar; u8 opCode = 0; - u8 *pInBuf = (pu1Byte)pData; + u8 *pInBuf = (u8 *)pData; u8 *pOpCodeContent; rtw_HCI_event *pEvent; diff --git a/core/rtw_btcoex_wifionly.c b/core/rtw_btcoex_wifionly.c index e26b3a0..d9872b0 100644 --- a/core/rtw_btcoex_wifionly.c +++ b/core/rtw_btcoex_wifionly.c @@ -26,6 +26,11 @@ void rtw_btcoex_wifionly_scan_notify(PADAPTER padapter) hal_btcoex_wifionly_scan_notify(padapter); } +void rtw_btcoex_wifionly_connect_notify(PADAPTER padapter) +{ + hal_btcoex_wifionly_connect_notify(padapter); +} + void rtw_btcoex_wifionly_hw_config(PADAPTER padapter) { hal_btcoex_wifionly_hw_config(padapter); diff --git a/core/rtw_chplan.c b/core/rtw_chplan.c new file mode 100644 index 0000000..8eaa0fd --- /dev/null +++ b/core/rtw_chplan.c @@ -0,0 +1,1204 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2018 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _RTW_CHPLAN_C_ + +#include + +#define RTW_DOMAIN_MAP_VER "40e" +#define RTW_COUNTRY_MAP_VER "23" + +#ifdef LEGACY_CHANNEL_PLAN_REF +/******************************************************** +ChannelPlan definitions +*********************************************************/ +static RT_CHANNEL_PLAN legacy_channel_plan[] = { + /* 0x00, RTW_CHPLAN_FCC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 32}, + /* 0x01, RTW_CHPLAN_IC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 31}, + /* 0x02, RTW_CHPLAN_ETSI */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32}, + /* 0x03, RTW_CHPLAN_SPAIN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, + /* 0x04, RTW_CHPLAN_FRANCE */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, + /* 0x05, RTW_CHPLAN_MKK */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, + /* 0x06, RTW_CHPLAN_MKK1 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, + /* 0x07, RTW_CHPLAN_ISRAEL */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21}, + /* 0x08, RTW_CHPLAN_TELEC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52, 56, 60, 64}, 22}, + /* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14}, + /* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, + /* 0x0B, RTW_CHPLAN_TAIWAN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 26}, + /* 0x0C, RTW_CHPLAN_CHINA */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 149, 153, 157, 161, 165}, 18}, + /* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 24}, + /* 0x0E, RTW_CHPLAN_KOREA */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 31}, + /* 0x0F, RTW_CHPLAN_TURKEY */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64}, 19}, + /* 0x10, RTW_CHPLAN_JAPAN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32}, + /* 0x11, RTW_CHPLAN_FCC_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 149, 153, 157, 161, 165}, 20}, + /* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48}, 17}, + /* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 37}, + /* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 149, 153, 157, 161, 165}, 19}, +}; +#endif + +enum rtw_rd_2g { + RTW_RD_2G_NULL = 0, + RTW_RD_2G_WORLD = 1, /* Worldwird 13 */ + RTW_RD_2G_ETSI1 = 2, /* Europe */ + RTW_RD_2G_FCC1 = 3, /* US */ + RTW_RD_2G_MKK1 = 4, /* Japan */ + RTW_RD_2G_ETSI2 = 5, /* France */ + RTW_RD_2G_GLOBAL = 6, /* Global domain */ + RTW_RD_2G_MKK2 = 7, /* Japan */ + RTW_RD_2G_FCC2 = 8, /* US */ + RTW_RD_2G_IC1 = 9, /* Canada */ + RTW_RD_2G_WORLD1 = 10, /* Worldwide 11 */ + RTW_RD_2G_KCC1 = 11, /* Korea */ + RTW_RD_2G_IC2 = 12, /* Canada */ + + RTW_RD_2G_MAX, +}; + +enum rtw_rd_5g { + RTW_RD_5G_NULL = 0, /* */ + RTW_RD_5G_ETSI1 = 1, /* Europe */ + RTW_RD_5G_ETSI2 = 2, /* Australia, New Zealand */ + RTW_RD_5G_ETSI3 = 3, /* Russia */ + RTW_RD_5G_FCC1 = 4, /* US */ + RTW_RD_5G_FCC2 = 5, /* FCC w/o DFS Channels */ + RTW_RD_5G_FCC3 = 6, /* Bolivia, Chile, El Salvador, Venezuela */ + RTW_RD_5G_FCC4 = 7, /* Venezuela */ + RTW_RD_5G_FCC5 = 8, /* China */ + RTW_RD_5G_FCC6 = 9, /* */ + RTW_RD_5G_FCC7 = 10, /* US(w/o Weather radar) */ + RTW_RD_5G_IC1 = 11, /* Canada(w/o Weather radar) */ + RTW_RD_5G_KCC1 = 12, /* Korea */ + RTW_RD_5G_MKK1 = 13, /* Japan */ + RTW_RD_5G_MKK2 = 14, /* Japan (W52, W53) */ + RTW_RD_5G_MKK3 = 15, /* Japan (W56) */ + RTW_RD_5G_NCC1 = 16, /* Taiwan, (w/o Weather radar) */ + RTW_RD_5G_NCC2 = 17, /* Taiwan, Band2, Band4 */ + RTW_RD_5G_NCC3 = 18, /* Taiwan w/o DFS, Band4 only */ + RTW_RD_5G_ETSI4 = 19, /* Europe w/o DFS, Band1 only */ + RTW_RD_5G_ETSI5 = 20, /* Australia, New Zealand(w/o Weather radar) */ + RTW_RD_5G_FCC8 = 21, /* Latin America */ + RTW_RD_5G_ETSI6 = 22, /* Israel, Bahrain, Egypt, India, China, Malaysia */ + RTW_RD_5G_ETSI7 = 23, /* China */ + RTW_RD_5G_ETSI8 = 24, /* Jordan */ + RTW_RD_5G_ETSI9 = 25, /* Lebanon */ + RTW_RD_5G_ETSI10 = 26, /* Qatar */ + RTW_RD_5G_ETSI11 = 27, /* Russia */ + RTW_RD_5G_NCC4 = 28, /* Taiwan, (w/o Weather radar) */ + RTW_RD_5G_ETSI12 = 29, /* Indonesia */ + RTW_RD_5G_FCC9 = 30, /* (w/o Weather radar) */ + RTW_RD_5G_ETSI13 = 31, /* (w/o Weather radar) */ + RTW_RD_5G_FCC10 = 32, /* Argentina(w/o Weather radar) */ + RTW_RD_5G_MKK4 = 33, /* Japan (W52) */ + RTW_RD_5G_ETSI14 = 34, /* Russia */ + RTW_RD_5G_FCC11 = 35, /* US(include CH144) */ + RTW_RD_5G_ETSI15 = 36, /* Malaysia */ + RTW_RD_5G_MKK5 = 37, /* Japan */ + RTW_RD_5G_ETSI16 = 38, /* Europe */ + RTW_RD_5G_ETSI17 = 39, /* Europe */ + RTW_RD_5G_FCC12 = 40, /* FCC */ + RTW_RD_5G_FCC13 = 41, /* FCC */ + RTW_RD_5G_FCC14 = 42, /* FCC w/o Weather radar(w/o 5600~5650MHz) */ + RTW_RD_5G_FCC15 = 43, /* FCC w/o Band3 */ + RTW_RD_5G_FCC16 = 44, /* FCC w/o Band3 */ + RTW_RD_5G_ETSI18 = 45, /* ETSI w/o DFS Band2&3 */ + RTW_RD_5G_ETSI19 = 46, /* Europe */ + RTW_RD_5G_FCC17 = 47, /* FCC w/o Weather radar(w/o 5600~5650MHz) */ + RTW_RD_5G_ETSI20 = 48, /* Europe */ + RTW_RD_5G_IC2 = 49, /* Canada(w/o Weather radar), include ch144 */ + RTW_RD_5G_ETSI21 = 50, /* Australia, New Zealand(w/o Weather radar) */ + RTW_RD_5G_FCC18 = 51, /* */ + RTW_RD_5G_WORLD = 52, /* Worldwide */ + RTW_RD_5G_CHILE1 = 53, /* Chile */ + RTW_RD_5G_ACMA1 = 54, /* Australia, New Zealand (w/o Weather radar) (w/o Ch120~Ch128) */ + RTW_RD_5G_WORLD1 = 55, /* 5G Worldwide Band1&2 */ + RTW_RD_5G_CHILE2 = 56, /* Chile (Band2,Band3) */ + RTW_RD_5G_KCC2 = 57, /* Korea (New standard) */ + RTW_RD_5G_KCC3 = 58, /* Korea (2018 Dec 05 New standard, include ch144) */ + RTW_RD_5G_MKK6 = 59, /* Japan */ + RTW_RD_5G_MKK7 = 60, /* Japan */ + RTW_RD_5G_MKK8 = 61, /* Japan */ + + /* === Below are driver defined for legacy channel plan compatible, DON'T assign index ==== */ + RTW_RD_5G_OLD_FCC1, + RTW_RD_5G_OLD_NCC1, + RTW_RD_5G_OLD_KCC1, + + RTW_RD_5G_MAX, +}; + +struct ch_list_t { + u8 *len_ch; +}; + +#define CH_LIST_ENT(_len, arg...) \ + {.len_ch = (u8[_len + 1]) {_len, ##arg}, } + +#define CH_LIST_LEN(_ch_list) (_ch_list.len_ch[0]) +#define CH_LIST_CH(_ch_list, _i) (_ch_list.len_ch[_i + 1]) + +struct chplan_ent_t { + u8 rd_2g; +#ifdef CONFIG_IEEE80211_BAND_5GHZ + u8 rd_5g; +#endif + u8 regd; /* value of REGULATION_TXPWR_LMT */ +}; + +#ifdef CONFIG_IEEE80211_BAND_5GHZ +#define CHPLAN_ENT(i2g, i5g, regd) {i2g, i5g, regd} +#else +#define CHPLAN_ENT(i2g, i5g, regd) {i2g, regd} +#endif + +static struct ch_list_t RTW_ChannelPlan2G[] = { + /* 0, RTW_RD_2G_NULL */ CH_LIST_ENT(0), + /* 1, RTW_RD_2G_WORLD */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), + /* 2, RTW_RD_2G_ETSI1 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), + /* 3, RTW_RD_2G_FCC1 */ CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11), + /* 4, RTW_RD_2G_MKK1 */ CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14), + /* 5, RTW_RD_2G_ETSI2 */ CH_LIST_ENT(4, 10, 11, 12, 13), + /* 6, RTW_RD_2G_GLOBAL */ CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14), + /* 7, RTW_RD_2G_MKK2 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), + /* 8, RTW_RD_2G_FCC2 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), + /* 9, RTW_RD_2G_IC1 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), + /* 10, RTW_RD_2G_WORLD1 */ CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11), + /* 11, RTW_RD_2G_KCC1 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), + /* 12, RTW_RD_2G_IC2 */ CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11), +}; + +#ifdef CONFIG_IEEE80211_BAND_5GHZ +static struct ch_list_t RTW_ChannelPlan5G[] = { + /* 0, RTW_RD_5G_NULL */ CH_LIST_ENT(0), + /* 1, RTW_RD_5G_ETSI1 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), + /* 2, RTW_RD_5G_ETSI2 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 3, RTW_RD_5G_ETSI3 */ CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165), + /* 4, RTW_RD_5G_FCC1 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 5, RTW_RD_5G_FCC2 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165), + /* 6, RTW_RD_5G_FCC3 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), + /* 7, RTW_RD_5G_FCC4 */ CH_LIST_ENT(12, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161), + /* 8, RTW_RD_5G_FCC5 */ CH_LIST_ENT(5, 149, 153, 157, 161, 165), + /* 9, RTW_RD_5G_FCC6 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), + /* 10, RTW_RD_5G_FCC7 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 11, RTW_RD_5G_IC1 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 12, RTW_RD_5G_KCC1 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161), + /* 13, RTW_RD_5G_MKK1 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), + /* 14, RTW_RD_5G_MKK2 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), + /* 15, RTW_RD_5G_MKK3 */ CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), + /* 16, RTW_RD_5G_NCC1 */ CH_LIST_ENT(16, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 17, RTW_RD_5G_NCC2 */ CH_LIST_ENT(8, 56, 60, 64, 149, 153, 157, 161, 165), + /* 18, RTW_RD_5G_NCC3 */ CH_LIST_ENT(5, 149, 153, 157, 161, 165), + /* 19, RTW_RD_5G_ETSI4 */ CH_LIST_ENT(4, 36, 40, 44, 48), + /* 20, RTW_RD_5G_ETSI5 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 21, RTW_RD_5G_FCC8 */ CH_LIST_ENT(4, 149, 153, 157, 161), + /* 22, RTW_RD_5G_ETSI6 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), + /* 23, RTW_RD_5G_ETSI7 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), + /* 24, RTW_RD_5G_ETSI8 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165), + /* 25, RTW_RD_5G_ETSI9 */ CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), + /* 26, RTW_RD_5G_ETSI10 */ CH_LIST_ENT(5, 149, 153, 157, 161, 165), + /* 27, RTW_RD_5G_ETSI11 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140, 149, 153, 157, 161, 165), + /* 28, RTW_RD_5G_NCC4 */ CH_LIST_ENT(17, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 29, RTW_RD_5G_ETSI12 */ CH_LIST_ENT(4, 149, 153, 157, 161), + /* 30, RTW_RD_5G_FCC9 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 31, RTW_RD_5G_ETSI13 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140), + /* 32, RTW_RD_5G_FCC10 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161), + /* 33, RTW_RD_5G_MKK4 */ CH_LIST_ENT(4, 36, 40, 44, 48), + /* 34, RTW_RD_5G_ETSI14 */ CH_LIST_ENT(11, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140), + /* 35, RTW_RD_5G_FCC11 */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165), + /* 36, RTW_RD_5G_ETSI15 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 149, 153, 157, 161, 165), + /* 37, RTW_RD_5G_MKK5 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 38, RTW_RD_5G_ETSI16 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 39, RTW_RD_5G_ETSI17 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 40, RTW_RD_5G_FCC12*/ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 41, RTW_RD_5G_FCC13 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 42, RTW_RD_5G_FCC14 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 43, RTW_RD_5G_FCC15 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), + /* 44, RTW_RD_5G_FCC16 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), + /* 45, RTW_RD_5G_ETSI18 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165), + /* 46, RTW_RD_5G_ETSI19 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 47, RTW_RD_5G_FCC17 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140), + /* 48, RTW_RD_5G_ETSI20 */ CH_LIST_ENT(9, 52, 56, 60, 64, 149, 153, 157, 161, 165), + /* 49, RTW_RD_5G_IC2 */ CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 144, 149, 153, 157, 161, 165), + /* 50, RTW_RD_5G_ETSI21 */ CH_LIST_ENT(13, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 51, RTW_RD_5G_FCC18 */ CH_LIST_ENT(8, 100, 104, 108, 112, 116, 132, 136, 140), + /* 52, RTW_RD_5G_WORLD */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165), + /* 53, RTW_RD_5G_CHILE1 */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165), + /* 54, RTW_RD_5G_ACMA1 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 55, RTW_RD_5G_WORLD1 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), + /* 56, RTW_RD_5G_CHILE2 */ CH_LIST_ENT(16, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144), + /* 57, RTW_RD_5G_KCC2 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 58, RTW_RD_5G_KCC3 */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165), + /* 59, RTW_RD_5G_MKK6 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 149, 153, 157, 161, 165), + /* 60, RTW_RD_5G_MKK7 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 61, RTW_RD_5G_MKK8 */ CH_LIST_ENT(23, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 136, 140, 149, 153, 157, 161, 165), + + /* === Below are driver defined for legacy channel plan compatible, NO static index assigned ==== */ + /* RTW_RD_5G_OLD_FCC1 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165), + /* RTW_RD_5G_OLD_NCC1 */ CH_LIST_ENT(15, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165), + /* RTW_RD_5G_OLD_KCC1 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165), +}; +#endif /* CONFIG_IEEE80211_BAND_5GHZ */ + +static struct chplan_ent_t RTW_ChannelPlanMap[RTW_CHPLAN_MAX] = { + /* ===== 0x00 ~ 0x1F, legacy channel plan ===== */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_KCC1, TXPWR_LMT_FCC), /* 0x00, RTW_CHPLAN_FCC */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_OLD_FCC1, TXPWR_LMT_FCC), /* 0x01, RTW_CHPLAN_IC */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI), /* 0x02, RTW_CHPLAN_ETSI */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x03, RTW_CHPLAN_SPAIN */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x04, RTW_CHPLAN_FRANCE */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x05, RTW_CHPLAN_MKK */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x06, RTW_CHPLAN_MKK1 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_FCC6, TXPWR_LMT_ETSI), /* 0x07, RTW_CHPLAN_ISRAEL */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_FCC6, TXPWR_LMT_MKK), /* 0x08, RTW_CHPLAN_TELEC */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_OLD_NCC1, TXPWR_LMT_FCC), /* 0x0B, RTW_CHPLAN_TAIWAN */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_FCC5, TXPWR_LMT_ETSI), /* 0x0C, RTW_CHPLAN_CHINA */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC3, TXPWR_LMT_WW), /* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ /* ETSI:Singapore, India. FCC:Mexico => WW */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_OLD_KCC1, TXPWR_LMT_ETSI), /* 0x0E, RTW_CHPLAN_KOREA */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC6, TXPWR_LMT_ETSI), /* 0x0F, RTW_CHPLAN_TURKEY */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_MKK), /* 0x10, RTW_CHPLAN_JAPAN */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC2, TXPWR_LMT_FCC), /* 0x11, RTW_CHPLAN_FCC_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_FCC7, TXPWR_LMT_MKK), /* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC1, TXPWR_LMT_WW), /* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC2, TXPWR_LMT_FCC), /* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC7, TXPWR_LMT_ETSI), /* 0x15, RTW_CHPLAN_ETSI_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_NCC1, TXPWR_LMT_ETSI), /* 0x16, RTW_CHPLAN_KOREA_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_FCC7, TXPWR_LMT_MKK), /* 0x17, RTW_CHPLAN_JAPAN_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_FCC5, TXPWR_LMT_ETSI), /* 0x18, RTW_CHPLAN_PAKISTAN_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC5, TXPWR_LMT_FCC), /* 0x19, RTW_CHPLAN_TAIWAN2_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1A, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1B, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1C, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1D, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1E, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_FCC1, TXPWR_LMT_WW), /* 0x1F, RTW_CHPLAN_WORLD_WIDE_ONLY_5G */ + + /* ===== 0x20 ~ 0x7F, new channel plan ===== */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x20, RTW_CHPLAN_WORLD_NULL */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x21, RTW_CHPLAN_ETSI1_NULL */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NULL, TXPWR_LMT_FCC), /* 0x22, RTW_CHPLAN_FCC1_NULL */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x23, RTW_CHPLAN_MKK1_NULL */ + CHPLAN_ENT(RTW_RD_2G_ETSI2, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x24, RTW_CHPLAN_ETSI2_NULL */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC1, TXPWR_LMT_FCC), /* 0x25, RTW_CHPLAN_FCC1_FCC1 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI), /* 0x26, RTW_CHPLAN_WORLD_ETSI1 */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_MKK1, TXPWR_LMT_MKK), /* 0x27, RTW_CHPLAN_MKK1_MKK1 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_KCC1, TXPWR_LMT_KCC), /* 0x28, RTW_CHPLAN_WORLD_KCC1 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC2, TXPWR_LMT_FCC), /* 0x29, RTW_CHPLAN_WORLD_FCC2 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_NULL, TXPWR_LMT_FCC), /* 0x2A, RTW_CHPLAN_FCC2_NULL */ + CHPLAN_ENT(RTW_RD_2G_IC1, RTW_RD_5G_IC2, TXPWR_LMT_IC), /* 0x2B, RTW_CHPLAN_IC1_IC2 */ + CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x2C, RTW_CHPLAN_MKK2_NULL */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_CHILE1, TXPWR_LMT_CHILE), /* 0x2D, RTW_CHPLAN_WORLD_CHILE1 */ + CHPLAN_ENT(RTW_RD_2G_WORLD1, RTW_RD_5G_WORLD1, TXPWR_LMT_WW), /* 0x2E, RTW_CHPLAN_WORLD1_WORLD1 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_CHILE2, TXPWR_LMT_CHILE), /* 0x2F, RTW_CHPLAN_WORLD_CHILE2 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC3, TXPWR_LMT_FCC), /* 0x30, RTW_CHPLAN_WORLD_FCC3 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC4, TXPWR_LMT_FCC), /* 0x31, RTW_CHPLAN_WORLD_FCC4 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC5, TXPWR_LMT_FCC), /* 0x32, RTW_CHPLAN_WORLD_FCC5 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC6, TXPWR_LMT_FCC), /* 0x33, RTW_CHPLAN_WORLD_FCC6 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC7, TXPWR_LMT_FCC), /* 0x34, RTW_CHPLAN_FCC1_FCC7 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI2, TXPWR_LMT_ETSI), /* 0x35, RTW_CHPLAN_WORLD_ETSI2 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI3, TXPWR_LMT_ETSI), /* 0x36, RTW_CHPLAN_WORLD_ETSI3 */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_MKK2, TXPWR_LMT_MKK), /* 0x37, RTW_CHPLAN_MKK1_MKK2 */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_MKK3, TXPWR_LMT_MKK), /* 0x38, RTW_CHPLAN_MKK1_MKK3 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC1, TXPWR_LMT_FCC), /* 0x39, RTW_CHPLAN_FCC1_NCC1 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI), /* 0x3A, RTW_CHPLAN_ETSI1_ETSI1 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ACMA1, TXPWR_LMT_ACMA), /* 0x3B, RTW_CHPLAN_ETSI1_ACMA1 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI6, TXPWR_LMT_ETSI), /* 0x3C, RTW_CHPLAN_ETSI1_ETSI6 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI12, TXPWR_LMT_ETSI), /* 0x3D, RTW_CHPLAN_ETSI1_ETSI12 */ + CHPLAN_ENT(RTW_RD_2G_KCC1, RTW_RD_5G_KCC2, TXPWR_LMT_KCC), /* 0x3E, RTW_CHPLAN_KCC1_KCC2 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC11, TXPWR_LMT_FCC), /* 0x3F, RTW_CHPLAN_FCC1_FCC11*/ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC2, TXPWR_LMT_FCC), /* 0x40, RTW_CHPLAN_FCC1_NCC2 */ + CHPLAN_ENT(RTW_RD_2G_GLOBAL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x41, RTW_CHPLAN_GLOBAL_NULL */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI4, TXPWR_LMT_ETSI), /* 0x42, RTW_CHPLAN_ETSI1_ETSI4 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC2, TXPWR_LMT_FCC), /* 0x43, RTW_CHPLAN_FCC1_FCC2 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC3, TXPWR_LMT_FCC), /* 0x44, RTW_CHPLAN_FCC1_NCC3 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ACMA1, TXPWR_LMT_ACMA), /* 0x45, RTW_CHPLAN_WORLD_ACMA1 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC8, TXPWR_LMT_FCC), /* 0x46, RTW_CHPLAN_FCC1_FCC8 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI6, TXPWR_LMT_ETSI), /* 0x47, RTW_CHPLAN_WORLD_ETSI6 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI7, TXPWR_LMT_ETSI), /* 0x48, RTW_CHPLAN_WORLD_ETSI7 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI8, TXPWR_LMT_ETSI), /* 0x49, RTW_CHPLAN_WORLD_ETSI8 */ + CHPLAN_ENT(RTW_RD_2G_IC2, RTW_RD_5G_IC2, TXPWR_LMT_IC), /* 0x4A, RTW_CHPLAN_IC2_IC2 */ + CHPLAN_ENT(RTW_RD_2G_KCC1, RTW_RD_5G_KCC3, TXPWR_LMT_KCC), /* 0x4B, RTW_CHPLAN_KCC1_KCC3 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC15, TXPWR_LMT_FCC), /* 0x4C, RTW_CHPLAN_FCC1_FCC15*/ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4D, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4E, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4F, */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI9, TXPWR_LMT_ETSI), /* 0x50, RTW_CHPLAN_WORLD_ETSI9 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI10, TXPWR_LMT_ETSI), /* 0x51, RTW_CHPLAN_WORLD_ETSI10 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI11, TXPWR_LMT_ETSI), /* 0x52, RTW_CHPLAN_WORLD_ETSI11 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC4, TXPWR_LMT_FCC), /* 0x53, RTW_CHPLAN_FCC1_NCC4 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI12, TXPWR_LMT_ETSI), /* 0x54, RTW_CHPLAN_WORLD_ETSI12 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC9, TXPWR_LMT_FCC), /* 0x55, RTW_CHPLAN_FCC1_FCC9 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI13, TXPWR_LMT_ETSI), /* 0x56, RTW_CHPLAN_WORLD_ETSI13 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC10, TXPWR_LMT_FCC), /* 0x57, RTW_CHPLAN_FCC1_FCC10 */ + CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_MKK4, TXPWR_LMT_MKK), /* 0x58, RTW_CHPLAN_MKK2_MKK4 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI14, TXPWR_LMT_ETSI), /* 0x59, RTW_CHPLAN_WORLD_ETSI14 */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5A, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5B, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5C, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5D, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5E, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5F, */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC5, TXPWR_LMT_FCC), /* 0x60, RTW_CHPLAN_FCC1_FCC5 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC7, TXPWR_LMT_FCC), /* 0x61, RTW_CHPLAN_FCC2_FCC7 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC1, TXPWR_LMT_FCC), /* 0x62, RTW_CHPLAN_FCC2_FCC1 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI15, TXPWR_LMT_ETSI), /* 0x63, RTW_CHPLAN_WORLD_ETSI15 */ + CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_MKK5, TXPWR_LMT_MKK), /* 0x64, RTW_CHPLAN_MKK2_MKK5 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI16, TXPWR_LMT_ETSI), /* 0x65, RTW_CHPLAN_ETSI1_ETSI16 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC14, TXPWR_LMT_FCC), /* 0x66, RTW_CHPLAN_FCC1_FCC14 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC12, TXPWR_LMT_FCC), /* 0x67, RTW_CHPLAN_FCC1_FCC12 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC14, TXPWR_LMT_FCC), /* 0x68, RTW_CHPLAN_FCC2_FCC14 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC12, TXPWR_LMT_FCC), /* 0x69, RTW_CHPLAN_FCC2_FCC12 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI17, TXPWR_LMT_ETSI), /* 0x6A, RTW_CHPLAN_ETSI1_ETSI17 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC16, TXPWR_LMT_FCC), /* 0x6B, RTW_CHPLAN_WORLD_FCC16 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC13, TXPWR_LMT_FCC), /* 0x6C, RTW_CHPLAN_WORLD_FCC13 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC15, TXPWR_LMT_FCC), /* 0x6D, RTW_CHPLAN_FCC2_FCC15 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC12, TXPWR_LMT_FCC), /* 0x6E, RTW_CHPLAN_WORLD_FCC12 */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI8, TXPWR_LMT_ETSI), /* 0x6F, RTW_CHPLAN_NULL_ETSI8 */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI18, TXPWR_LMT_ETSI), /* 0x70, RTW_CHPLAN_NULL_ETSI18 */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI17, TXPWR_LMT_ETSI), /* 0x71, RTW_CHPLAN_NULL_ETSI17 */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI19, TXPWR_LMT_ETSI), /* 0x72, RTW_CHPLAN_NULL_ETSI19 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC7, TXPWR_LMT_FCC), /* 0x73, RTW_CHPLAN_WORLD_FCC7 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC17, TXPWR_LMT_FCC), /* 0x74, RTW_CHPLAN_FCC2_FCC17 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI20, TXPWR_LMT_ETSI), /* 0x75, RTW_CHPLAN_WORLD_ETSI20 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC11, TXPWR_LMT_FCC), /* 0x76, RTW_CHPLAN_FCC2_FCC11 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI21, TXPWR_LMT_ETSI), /* 0x77, RTW_CHPLAN_WORLD_ETSI21 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC18, TXPWR_LMT_FCC), /* 0x78, RTW_CHPLAN_FCC1_FCC18 */ + CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_MKK1, TXPWR_LMT_MKK), /* 0x79, RTW_CHPLAN_MKK2_MKK1 */ +}; + +static struct chplan_ent_t RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE = + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC1, TXPWR_LMT_FCC); /* 0x7F, Realtek Define */ + +u8 rtw_chplan_get_default_regd(u8 id) +{ + u8 regd; + + if (id == RTW_CHPLAN_REALTEK_DEFINE) + regd = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.regd; + else + regd = RTW_ChannelPlanMap[id].regd; + + return regd; +} + +bool rtw_chplan_is_empty(u8 id) +{ + struct chplan_ent_t *chplan_map; + + if (id == RTW_CHPLAN_REALTEK_DEFINE) + chplan_map = &RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE; + else + chplan_map = &RTW_ChannelPlanMap[id]; + + if (chplan_map->rd_2g == RTW_RD_2G_NULL + #ifdef CONFIG_IEEE80211_BAND_5GHZ + && chplan_map->rd_5g == RTW_RD_5G_NULL + #endif + ) + return _TRUE; + + return _FALSE; +} + +bool rtw_regsty_is_excl_chs(struct registry_priv *regsty, u8 ch) +{ + int i; + + for (i = 0; i < MAX_CHANNEL_NUM; i++) { + if (regsty->excl_chs[i] == 0) + break; + if (regsty->excl_chs[i] == ch) + return _TRUE; + } + return _FALSE; +} + +inline static u8 rtw_rd_5g_band1_passive(u8 rtw_rd_5g) +{ + u8 passive = 0; + + switch (rtw_rd_5g) { + case RTW_RD_5G_FCC13: + case RTW_RD_5G_FCC16: + case RTW_RD_5G_ETSI18: + case RTW_RD_5G_ETSI19: + case RTW_RD_5G_WORLD: + case RTW_RD_5G_WORLD1: + case RTW_RD_5G_MKK6: + case RTW_RD_5G_MKK7: + passive = 1; + }; + + return passive; +} + +inline static u8 rtw_rd_5g_band4_passive(u8 rtw_rd_5g) +{ + u8 passive = 0; + + switch (rtw_rd_5g) { + case RTW_RD_5G_MKK5: + case RTW_RD_5G_ETSI16: + case RTW_RD_5G_ETSI18: + case RTW_RD_5G_ETSI19: + case RTW_RD_5G_WORLD: + case RTW_RD_5G_MKK8: + passive = 1; + }; + + return passive; +} + +u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, RT_CHANNEL_INFO *channel_set) +{ + struct registry_priv *regsty = adapter_to_regsty(padapter); + u8 index, chanset_size = 0; + u8 b5GBand = _FALSE, b2_4GBand = _FALSE; + u8 rd_2g = 0, rd_5g = 0; +#ifdef CONFIG_DFS_MASTER + int i; +#endif + + if (!rtw_is_channel_plan_valid(ChannelPlan)) { + RTW_ERR("ChannelPlan ID 0x%02X error !!!!!\n", ChannelPlan); + return chanset_size; + } + + _rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM); + + if (IsSupported24G(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_2G)) + b2_4GBand = _TRUE; + + if (is_supported_5g(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_5G)) + b5GBand = _TRUE; + + if (b2_4GBand == _FALSE && b5GBand == _FALSE) { + RTW_WARN("HW band_cap has no intersection with SW wireless_mode setting\n"); + return chanset_size; + } + + if (b2_4GBand) { + if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE) + rd_2g = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.rd_2g; + else + rd_2g = RTW_ChannelPlanMap[ChannelPlan].rd_2g; + + for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan2G[rd_2g]); index++) { + if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan2G[rd_2g], index)) == _TRUE) + continue; + + if (chanset_size >= MAX_CHANNEL_NUM) { + RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM); + break; + } + + channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan2G[rd_2g], index); + + if (ChannelPlan == RTW_CHPLAN_GLOBAL_DOAMIN + || rd_2g == RTW_RD_2G_GLOBAL + ) { + /* Channel 1~11 is active, and 12~14 is passive */ + if (channel_set[chanset_size].ChannelNum >= 1 && channel_set[chanset_size].ChannelNum <= 11) + channel_set[chanset_size].ScanType = SCAN_ACTIVE; + else if ((channel_set[chanset_size].ChannelNum >= 12 && channel_set[chanset_size].ChannelNum <= 14)) + channel_set[chanset_size].ScanType = SCAN_PASSIVE; + } else if (ChannelPlan == RTW_CHPLAN_WORLD_WIDE_13 + || ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G + || rd_2g == RTW_RD_2G_WORLD + ) { + /* channel 12~13, passive scan */ + if (channel_set[chanset_size].ChannelNum <= 11) + channel_set[chanset_size].ScanType = SCAN_ACTIVE; + else + channel_set[chanset_size].ScanType = SCAN_PASSIVE; + } else + channel_set[chanset_size].ScanType = SCAN_ACTIVE; + + chanset_size++; + } + } + +#ifdef CONFIG_IEEE80211_BAND_5GHZ + if (b5GBand) { + if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE) + rd_5g = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.rd_5g; + else + rd_5g = RTW_ChannelPlanMap[ChannelPlan].rd_5g; + + for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan5G[rd_5g]); index++) { + if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan5G[rd_5g], index)) == _TRUE) + continue; + #ifndef CONFIG_DFS + if (rtw_is_dfs_ch(CH_LIST_CH(RTW_ChannelPlan5G[rd_5g], index))) + continue; + #endif + + if (chanset_size >= MAX_CHANNEL_NUM) { + RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM); + break; + } + + channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan5G[rd_5g], index); + + if ((ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G) /* all channels passive */ + || (rtw_is_5g_band1(channel_set[chanset_size].ChannelNum) + && rtw_rd_5g_band1_passive(rd_5g)) /* band1 passive */ + || (rtw_is_5g_band4(channel_set[chanset_size].ChannelNum) + && rtw_rd_5g_band4_passive(rd_5g)) /* band4 passive */ + || (rtw_is_dfs_ch(channel_set[chanset_size].ChannelNum)) /* DFS channel(band2, 3) passive */ + ) + channel_set[chanset_size].ScanType = SCAN_PASSIVE; + else + channel_set[chanset_size].ScanType = SCAN_ACTIVE; + + chanset_size++; + } + } + + #ifdef CONFIG_DFS_MASTER + for (i = 0; i < chanset_size; i++) + channel_set[i].non_ocp_end_time = rtw_get_current_time(); + #endif +#endif /* CONFIG_IEEE80211_BAND_5GHZ */ + + if (chanset_size) + RTW_INFO(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, ch num:%d\n" + , FUNC_ADPT_ARG(padapter), ChannelPlan, chanset_size); + else + RTW_WARN(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, final chset has no channel\n" + , FUNC_ADPT_ARG(padapter), ChannelPlan); + + return chanset_size; +} + +#ifdef CONFIG_80211AC_VHT +#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) , .en_11ac = (_val) +#else +#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) +#endif + +#if RTW_DEF_MODULE_REGULATORY_CERT +#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) , .def_module_flags = (_val) +#else +#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) +#endif + +/* has def_module_flags specified, used by common map and HAL dfference map */ +#define COUNTRY_CHPLAN_ENT(_alpha2, _chplan, _en_11ac, _def_module_flags) \ + {.alpha2 = (_alpha2), .chplan = (_chplan) \ + COUNTRY_CHPLAN_ASSIGN_EN_11AC(_en_11ac) \ + COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_def_module_flags) \ + } + +#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP + +#include "../platform/custom_country_chplan.h" + +#elif RTW_DEF_MODULE_REGULATORY_CERT + +/* leave def_module_flags empty, def_module_flags check is done on country_chplan_map */ +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AE_HMC_M2) /* 2013 certify */ +static const struct country_chplan RTL8821AE_HMC_M2_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("CL", 0x30, 1, 0), /* Chile */ + COUNTRY_CHPLAN_ENT("CN", 0x51, 1, 0), /* China */ + COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ + COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ + COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ + COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ + COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ + COUNTRY_CHPLAN_ENT("MY", 0x47, 1, 0), /* Malaysia */ + COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ + COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ + COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ + COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ + COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AU) /* 2014 certify */ +static const struct country_chplan RTL8821AU_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AENF_NGFF) /* 2014 certify */ +static const struct country_chplan RTL8812AENF_NGFF_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AEBT_HMC) /* 2013 certify */ +static const struct country_chplan RTL8812AEBT_HMC_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8188EE_HMC_M2) /* 2012 certify */ +static const struct country_chplan RTL8188EE_HMC_M2_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */ + COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0), /* Barbados */ + COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ + COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ + COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ + COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ + COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ + COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0), /* Haiti */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ + COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ + COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ + COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ + COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ + COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ + COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0), /* Seychelles */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ + COUNTRY_CHPLAN_ENT("VC", 0x34, 1, 0), /* Saint Vincent and the Grenadines */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BE_HMC_M2) /* 2013 certify */ +static const struct country_chplan RTL8723BE_HMC_M2_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */ + COUNTRY_CHPLAN_ENT("BS", 0x34, 1, 0), /* Bahamas */ + COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ + COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ + COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ + COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ + COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ + COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ + COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ + COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ + COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ + COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BS_NGFF1216) /* 2014 certify */ +static const struct country_chplan RTL8723BS_NGFF1216_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0), /* Barbados */ + COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ + COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ + COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ + COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ + COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ + COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0), /* Haiti */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ + COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ + COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ + COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ + COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ + COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8192EEBT_HMC_M2) /* 2013 certify */ +static const struct country_chplan RTL8192EEBT_HMC_M2_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */ + COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ + COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ + COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ + COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ + COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ + COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ + COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ + COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ + COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ + COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ + COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0), /* Seychelles */ + COUNTRY_CHPLAN_ENT("ST", 0x34, 1, 0), /* Sao Tome and Principe */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723DE_NGFF1630) /* 2016 certify */ +static const struct country_chplan RTL8723DE_NGFF1630_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("CA", 0x2A, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8822BE) /* 2016 certify */ +static const struct country_chplan RTL8822BE_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821CE) /* 2016 certify */ +static const struct country_chplan RTL8821CE_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ +}; +#endif + +/** + * rtw_def_module_get_chplan_from_country - + * @country_code: string of country code + * @return: + * Return NULL for case referring to common map + */ +static const struct country_chplan *rtw_def_module_get_chplan_from_country(const char *country_code) +{ + const struct country_chplan *ent = NULL; + const struct country_chplan *hal_map = NULL; + u16 hal_map_sz = 0; + int i; + + /* TODO: runtime selection for multi driver */ +#if (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AE_HMC_M2) + hal_map = RTL8821AE_HMC_M2_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8821AE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AU) + hal_map = RTL8821AU_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8821AU_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AENF_NGFF) + hal_map = RTL8812AENF_NGFF_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8812AENF_NGFF_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AEBT_HMC) + hal_map = RTL8812AEBT_HMC_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8812AEBT_HMC_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8188EE_HMC_M2) + hal_map = RTL8188EE_HMC_M2_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8188EE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BE_HMC_M2) + hal_map = RTL8723BE_HMC_M2_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8723BE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BS_NGFF1216) + hal_map = RTL8723BS_NGFF1216_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8723BS_NGFF1216_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8192EEBT_HMC_M2) + hal_map = RTL8192EEBT_HMC_M2_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8192EEBT_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723DE_NGFF1630) + hal_map = RTL8723DE_NGFF1630_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8723DE_NGFF1630_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8822BE) + hal_map = RTL8822BE_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8822BE_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821CE) + hal_map = RTL8821CE_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8821CE_country_chplan_exc_map) / sizeof(struct country_chplan); +#endif + + if (hal_map == NULL || hal_map_sz == 0) + goto exit; + + for (i = 0; i < hal_map_sz; i++) { + if (strncmp(country_code, hal_map[i].alpha2, 2) == 0) { + ent = &hal_map[i]; + break; + } + } + +exit: + return ent; +} +#endif /* CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP or RTW_DEF_MODULE_REGULATORY_CERT */ + +static const struct country_chplan country_chplan_map[] = { + COUNTRY_CHPLAN_ENT("AD", 0x26, 1, 0x000), /* Andorra */ + COUNTRY_CHPLAN_ENT("AE", 0x35, 1, 0x7FB), /* United Arab Emirates */ + COUNTRY_CHPLAN_ENT("AF", 0x42, 1, 0x000), /* Afghanistan */ + COUNTRY_CHPLAN_ENT("AG", 0x76, 1, 0x000), /* Antigua & Barbuda */ + COUNTRY_CHPLAN_ENT("AI", 0x26, 1, 0x000), /* Anguilla(UK) */ + COUNTRY_CHPLAN_ENT("AL", 0x26, 1, 0x7F1), /* Albania */ + COUNTRY_CHPLAN_ENT("AM", 0x26, 1, 0x6B0), /* Armenia */ + COUNTRY_CHPLAN_ENT("AN", 0x76, 1, 0x7F1), /* Netherlands Antilles */ + COUNTRY_CHPLAN_ENT("AO", 0x47, 1, 0x6E0), /* Angola */ + COUNTRY_CHPLAN_ENT("AQ", 0x26, 1, 0x000), /* Antarctica */ + COUNTRY_CHPLAN_ENT("AR", 0x61, 1, 0x7F3), /* Argentina */ + COUNTRY_CHPLAN_ENT("AS", 0x76, 1, 0x000), /* American Samoa */ + COUNTRY_CHPLAN_ENT("AT", 0x26, 1, 0x7FB), /* Austria */ + COUNTRY_CHPLAN_ENT("AU", 0x45, 1, 0x7FB), /* Australia */ + COUNTRY_CHPLAN_ENT("AW", 0x76, 1, 0x0B0), /* Aruba */ + COUNTRY_CHPLAN_ENT("AZ", 0x26, 1, 0x7F1), /* Azerbaijan */ + COUNTRY_CHPLAN_ENT("BA", 0x26, 1, 0x7F1), /* Bosnia & Herzegovina */ + COUNTRY_CHPLAN_ENT("BB", 0x76, 1, 0x650), /* Barbados */ + COUNTRY_CHPLAN_ENT("BD", 0x26, 1, 0x7F1), /* Bangladesh */ + COUNTRY_CHPLAN_ENT("BE", 0x26, 1, 0x7FB), /* Belgium */ + COUNTRY_CHPLAN_ENT("BF", 0x26, 1, 0x6B0), /* Burkina Faso */ + COUNTRY_CHPLAN_ENT("BG", 0x26, 1, 0x7F1), /* Bulgaria */ + COUNTRY_CHPLAN_ENT("BH", 0x48, 1, 0x7F1), /* Bahrain */ + COUNTRY_CHPLAN_ENT("BI", 0x26, 1, 0x6B0), /* Burundi */ + COUNTRY_CHPLAN_ENT("BJ", 0x26, 1, 0x6B0), /* Benin */ + COUNTRY_CHPLAN_ENT("BM", 0x76, 1, 0x600), /* Bermuda (UK) */ + COUNTRY_CHPLAN_ENT("BN", 0x47, 1, 0x610), /* Brunei */ + COUNTRY_CHPLAN_ENT("BO", 0x73, 1, 0x7F1), /* Bolivia */ + COUNTRY_CHPLAN_ENT("BR", 0x62, 1, 0x7F1), /* Brazil */ + COUNTRY_CHPLAN_ENT("BS", 0x76, 1, 0x620), /* Bahamas */ + COUNTRY_CHPLAN_ENT("BT", 0x26, 1, 0x000), /* Bhutan */ + COUNTRY_CHPLAN_ENT("BV", 0x26, 1, 0x000), /* Bouvet Island (Norway) */ + COUNTRY_CHPLAN_ENT("BW", 0x35, 1, 0x6F1), /* Botswana */ + COUNTRY_CHPLAN_ENT("BY", 0x26, 1, 0x7F1), /* Belarus */ + COUNTRY_CHPLAN_ENT("BZ", 0x76, 1, 0x000), /* Belize */ + COUNTRY_CHPLAN_ENT("CA", 0x2B, 1, 0x7FB), /* Canada */ + COUNTRY_CHPLAN_ENT("CC", 0x26, 1, 0x000), /* Cocos (Keeling) Islands (Australia) */ + COUNTRY_CHPLAN_ENT("CD", 0x26, 1, 0x6B0), /* Congo, Republic of the */ + COUNTRY_CHPLAN_ENT("CF", 0x26, 1, 0x6B0), /* Central African Republic */ + COUNTRY_CHPLAN_ENT("CG", 0x26, 1, 0x6B0), /* Congo, Democratic Republic of the. Zaire */ + COUNTRY_CHPLAN_ENT("CH", 0x26, 1, 0x7FB), /* Switzerland */ + COUNTRY_CHPLAN_ENT("CI", 0x42, 1, 0x7F1), /* Cote d'Ivoire */ + COUNTRY_CHPLAN_ENT("CK", 0x26, 1, 0x000), /* Cook Islands */ + COUNTRY_CHPLAN_ENT("CL", 0x2D, 1, 0x7F1), /* Chile */ + COUNTRY_CHPLAN_ENT("CM", 0x26, 1, 0x6B0), /* Cameroon */ + COUNTRY_CHPLAN_ENT("CN", 0x48, 1, 0x7FB), /* China */ + COUNTRY_CHPLAN_ENT("CO", 0x76, 1, 0x7F1), /* Colombia */ + COUNTRY_CHPLAN_ENT("CR", 0x76, 1, 0x7F1), /* Costa Rica */ + COUNTRY_CHPLAN_ENT("CV", 0x26, 1, 0x6B0), /* Cape Verde */ + COUNTRY_CHPLAN_ENT("CX", 0x45, 1, 0x000), /* Christmas Island (Australia) */ + COUNTRY_CHPLAN_ENT("CY", 0x26, 1, 0x7FB), /* Cyprus */ + COUNTRY_CHPLAN_ENT("CZ", 0x26, 1, 0x7FB), /* Czech Republic */ + COUNTRY_CHPLAN_ENT("DE", 0x26, 1, 0x7FB), /* Germany */ + COUNTRY_CHPLAN_ENT("DJ", 0x26, 1, 0x680), /* Djibouti */ + COUNTRY_CHPLAN_ENT("DK", 0x26, 1, 0x7FB), /* Denmark */ + COUNTRY_CHPLAN_ENT("DM", 0x76, 1, 0x000), /* Dominica */ + COUNTRY_CHPLAN_ENT("DO", 0x76, 1, 0x7F1), /* Dominican Republic */ + COUNTRY_CHPLAN_ENT("DZ", 0x26, 1, 0x7F1), /* Algeria */ + COUNTRY_CHPLAN_ENT("EC", 0x76, 1, 0x7F1), /* Ecuador */ + COUNTRY_CHPLAN_ENT("EE", 0x26, 1, 0x7FB), /* Estonia */ + COUNTRY_CHPLAN_ENT("EG", 0x47, 1, 0x7F1), /* Egypt */ + COUNTRY_CHPLAN_ENT("EH", 0x47, 1, 0x680), /* Western Sahara */ + COUNTRY_CHPLAN_ENT("ER", 0x26, 1, 0x000), /* Eritrea */ + COUNTRY_CHPLAN_ENT("ES", 0x26, 1, 0x7FB), /* Spain, Canary Islands, Ceuta, Melilla */ + COUNTRY_CHPLAN_ENT("ET", 0x26, 1, 0x4B0), /* Ethiopia */ + COUNTRY_CHPLAN_ENT("FI", 0x26, 1, 0x7FB), /* Finland */ + COUNTRY_CHPLAN_ENT("FJ", 0x76, 1, 0x600), /* Fiji */ + COUNTRY_CHPLAN_ENT("FK", 0x26, 1, 0x000), /* Falkland Islands (Islas Malvinas) (UK) */ + COUNTRY_CHPLAN_ENT("FM", 0x76, 1, 0x000), /* Micronesia, Federated States of (USA) */ + COUNTRY_CHPLAN_ENT("FO", 0x26, 1, 0x000), /* Faroe Islands (Denmark) */ + COUNTRY_CHPLAN_ENT("FR", 0x26, 1, 0x7FB), /* France */ + COUNTRY_CHPLAN_ENT("GA", 0x26, 1, 0x6B0), /* Gabon */ + COUNTRY_CHPLAN_ENT("GB", 0x26, 1, 0x7FB), /* Great Britain (United Kingdom; England) */ + COUNTRY_CHPLAN_ENT("GD", 0x76, 1, 0x0B0), /* Grenada */ + COUNTRY_CHPLAN_ENT("GE", 0x26, 1, 0x600), /* Georgia */ + COUNTRY_CHPLAN_ENT("GF", 0x26, 1, 0x080), /* French Guiana */ + COUNTRY_CHPLAN_ENT("GG", 0x26, 1, 0x000), /* Guernsey (UK) */ + COUNTRY_CHPLAN_ENT("GH", 0x26, 1, 0x7F1), /* Ghana */ + COUNTRY_CHPLAN_ENT("GI", 0x26, 1, 0x600), /* Gibraltar (UK) */ + COUNTRY_CHPLAN_ENT("GL", 0x26, 1, 0x600), /* Greenland (Denmark) */ + COUNTRY_CHPLAN_ENT("GM", 0x26, 1, 0x6B0), /* Gambia */ + COUNTRY_CHPLAN_ENT("GN", 0x26, 1, 0x610), /* Guinea */ + COUNTRY_CHPLAN_ENT("GP", 0x26, 1, 0x600), /* Guadeloupe (France) */ + COUNTRY_CHPLAN_ENT("GQ", 0x26, 1, 0x6B0), /* Equatorial Guinea */ + COUNTRY_CHPLAN_ENT("GR", 0x26, 1, 0x7FB), /* Greece */ + COUNTRY_CHPLAN_ENT("GS", 0x26, 1, 0x000), /* South Georgia and the Sandwich Islands (UK) */ + COUNTRY_CHPLAN_ENT("GT", 0x61, 1, 0x7F1), /* Guatemala */ + COUNTRY_CHPLAN_ENT("GU", 0x76, 1, 0x600), /* Guam (USA) */ + COUNTRY_CHPLAN_ENT("GW", 0x26, 1, 0x6B0), /* Guinea-Bissau */ + COUNTRY_CHPLAN_ENT("GY", 0x44, 1, 0x000), /* Guyana */ + COUNTRY_CHPLAN_ENT("HK", 0x35, 1, 0x7FB), /* Hong Kong */ + COUNTRY_CHPLAN_ENT("HM", 0x45, 1, 0x000), /* Heard and McDonald Islands (Australia) */ + COUNTRY_CHPLAN_ENT("HN", 0x32, 1, 0x7F1), /* Honduras */ + COUNTRY_CHPLAN_ENT("HR", 0x26, 1, 0x7F9), /* Croatia */ + COUNTRY_CHPLAN_ENT("HT", 0x76, 1, 0x650), /* Haiti */ + COUNTRY_CHPLAN_ENT("HU", 0x26, 1, 0x7FB), /* Hungary */ + COUNTRY_CHPLAN_ENT("ID", 0x3D, 0, 0x7F3), /* Indonesia */ + COUNTRY_CHPLAN_ENT("IE", 0x26, 1, 0x7FB), /* Ireland */ + COUNTRY_CHPLAN_ENT("IL", 0x47, 1, 0x7F1), /* Israel */ + COUNTRY_CHPLAN_ENT("IM", 0x26, 1, 0x000), /* Isle of Man (UK) */ + COUNTRY_CHPLAN_ENT("IN", 0x48, 1, 0x7F1), /* India */ + COUNTRY_CHPLAN_ENT("IO", 0x26, 1, 0x000), /* British Indian Ocean Territory (UK) */ + COUNTRY_CHPLAN_ENT("IQ", 0x26, 1, 0x000), /* Iraq */ + COUNTRY_CHPLAN_ENT("IR", 0x26, 0, 0x000), /* Iran */ + COUNTRY_CHPLAN_ENT("IS", 0x26, 1, 0x7FB), /* Iceland */ + COUNTRY_CHPLAN_ENT("IT", 0x26, 1, 0x7FB), /* Italy */ + COUNTRY_CHPLAN_ENT("JE", 0x26, 1, 0x000), /* Jersey (UK) */ + COUNTRY_CHPLAN_ENT("JM", 0x32, 1, 0x7F1), /* Jamaica */ + COUNTRY_CHPLAN_ENT("JO", 0x49, 1, 0x7FB), /* Jordan */ + COUNTRY_CHPLAN_ENT("JP", 0x27, 1, 0x7FF), /* Japan- Telec */ + COUNTRY_CHPLAN_ENT("KE", 0x47, 1, 0x7F9), /* Kenya */ + COUNTRY_CHPLAN_ENT("KG", 0x26, 1, 0x7F1), /* Kyrgyzstan */ + COUNTRY_CHPLAN_ENT("KH", 0x26, 1, 0x7F1), /* Cambodia */ + COUNTRY_CHPLAN_ENT("KI", 0x26, 1, 0x000), /* Kiribati */ + COUNTRY_CHPLAN_ENT("KM", 0x26, 1, 0x000), /* Comoros */ + COUNTRY_CHPLAN_ENT("KN", 0x76, 1, 0x000), /* Saint Kitts and Nevis */ + COUNTRY_CHPLAN_ENT("KR", 0x4B, 1, 0x7FB), /* South Korea */ + COUNTRY_CHPLAN_ENT("KW", 0x47, 1, 0x7FB), /* Kuwait */ + COUNTRY_CHPLAN_ENT("KY", 0x76, 1, 0x000), /* Cayman Islands (UK) */ + COUNTRY_CHPLAN_ENT("KZ", 0x26, 1, 0x700), /* Kazakhstan */ + COUNTRY_CHPLAN_ENT("LA", 0x26, 1, 0x000), /* Laos */ + COUNTRY_CHPLAN_ENT("LB", 0x26, 1, 0x7F1), /* Lebanon */ + COUNTRY_CHPLAN_ENT("LC", 0x76, 1, 0x000), /* Saint Lucia */ + COUNTRY_CHPLAN_ENT("LI", 0x26, 1, 0x7FB), /* Liechtenstein */ + COUNTRY_CHPLAN_ENT("LK", 0x26, 1, 0x7F1), /* Sri Lanka */ + COUNTRY_CHPLAN_ENT("LR", 0x26, 1, 0x6B0), /* Liberia */ + COUNTRY_CHPLAN_ENT("LS", 0x26, 1, 0x7F1), /* Lesotho */ + COUNTRY_CHPLAN_ENT("LT", 0x26, 1, 0x7FB), /* Lithuania */ + COUNTRY_CHPLAN_ENT("LU", 0x26, 1, 0x7FB), /* Luxembourg */ + COUNTRY_CHPLAN_ENT("LV", 0x26, 1, 0x7FB), /* Latvia */ + COUNTRY_CHPLAN_ENT("LY", 0x26, 1, 0x000), /* Libya */ + COUNTRY_CHPLAN_ENT("MA", 0x47, 1, 0x7F1), /* Morocco */ + COUNTRY_CHPLAN_ENT("MC", 0x26, 1, 0x7FB), /* Monaco */ + COUNTRY_CHPLAN_ENT("MD", 0x26, 1, 0x7F1), /* Moldova */ + COUNTRY_CHPLAN_ENT("ME", 0x26, 1, 0x7F1), /* Montenegro */ + COUNTRY_CHPLAN_ENT("MF", 0x76, 1, 0x000), /* Saint Martin */ + COUNTRY_CHPLAN_ENT("MG", 0x26, 1, 0x620), /* Madagascar */ + COUNTRY_CHPLAN_ENT("MH", 0x76, 1, 0x000), /* Marshall Islands (USA) */ + COUNTRY_CHPLAN_ENT("MK", 0x26, 1, 0x7F1), /* Republic of Macedonia (FYROM) */ + COUNTRY_CHPLAN_ENT("ML", 0x26, 1, 0x6B0), /* Mali */ + COUNTRY_CHPLAN_ENT("MM", 0x26, 1, 0x000), /* Burma (Myanmar) */ + COUNTRY_CHPLAN_ENT("MN", 0x26, 1, 0x000), /* Mongolia */ + COUNTRY_CHPLAN_ENT("MO", 0x35, 1, 0x600), /* Macau */ + COUNTRY_CHPLAN_ENT("MP", 0x76, 1, 0x000), /* Northern Mariana Islands (USA) */ + COUNTRY_CHPLAN_ENT("MQ", 0x26, 1, 0x640), /* Martinique (France) */ + COUNTRY_CHPLAN_ENT("MR", 0x26, 1, 0x6A0), /* Mauritania */ + COUNTRY_CHPLAN_ENT("MS", 0x26, 1, 0x000), /* Montserrat (UK) */ + COUNTRY_CHPLAN_ENT("MT", 0x26, 1, 0x7FB), /* Malta */ + COUNTRY_CHPLAN_ENT("MU", 0x26, 1, 0x6B0), /* Mauritius */ + COUNTRY_CHPLAN_ENT("MV", 0x47, 1, 0x000), /* Maldives */ + COUNTRY_CHPLAN_ENT("MW", 0x26, 1, 0x6B0), /* Malawi */ + COUNTRY_CHPLAN_ENT("MX", 0x61, 1, 0x7F1), /* Mexico */ + COUNTRY_CHPLAN_ENT("MY", 0x63, 1, 0x7F1), /* Malaysia */ + COUNTRY_CHPLAN_ENT("MZ", 0x26, 1, 0x7F1), /* Mozambique */ + COUNTRY_CHPLAN_ENT("NA", 0x26, 1, 0x700), /* Namibia */ + COUNTRY_CHPLAN_ENT("NC", 0x26, 1, 0x000), /* New Caledonia */ + COUNTRY_CHPLAN_ENT("NE", 0x26, 1, 0x6B0), /* Niger */ + COUNTRY_CHPLAN_ENT("NF", 0x45, 1, 0x000), /* Norfolk Island (Australia) */ + COUNTRY_CHPLAN_ENT("NG", 0x75, 1, 0x7F9), /* Nigeria */ + COUNTRY_CHPLAN_ENT("NI", 0x76, 1, 0x7F1), /* Nicaragua */ + COUNTRY_CHPLAN_ENT("NL", 0x26, 1, 0x7FB), /* Netherlands */ + COUNTRY_CHPLAN_ENT("NO", 0x26, 1, 0x7FB), /* Norway */ + COUNTRY_CHPLAN_ENT("NP", 0x48, 1, 0x6F0), /* Nepal */ + COUNTRY_CHPLAN_ENT("NR", 0x26, 1, 0x000), /* Nauru */ + COUNTRY_CHPLAN_ENT("NU", 0x45, 1, 0x000), /* Niue */ + COUNTRY_CHPLAN_ENT("NZ", 0x45, 1, 0x7FB), /* New Zealand */ + COUNTRY_CHPLAN_ENT("OM", 0x26, 1, 0x7F9), /* Oman */ + COUNTRY_CHPLAN_ENT("PA", 0x76, 1, 0x7F1), /* Panama */ + COUNTRY_CHPLAN_ENT("PE", 0x76, 1, 0x7F1), /* Peru */ + COUNTRY_CHPLAN_ENT("PF", 0x26, 1, 0x000), /* French Polynesia (France) */ + COUNTRY_CHPLAN_ENT("PG", 0x35, 1, 0x7F1), /* Papua New Guinea */ + COUNTRY_CHPLAN_ENT("PH", 0x35, 1, 0x7F1), /* Philippines */ + COUNTRY_CHPLAN_ENT("PK", 0x51, 1, 0x7F1), /* Pakistan */ + COUNTRY_CHPLAN_ENT("PL", 0x26, 1, 0x7FB), /* Poland */ + COUNTRY_CHPLAN_ENT("PM", 0x26, 1, 0x000), /* Saint Pierre and Miquelon (France) */ + COUNTRY_CHPLAN_ENT("PR", 0x76, 1, 0x7F1), /* Puerto Rico */ + COUNTRY_CHPLAN_ENT("PT", 0x26, 1, 0x7FB), /* Portugal */ + COUNTRY_CHPLAN_ENT("PW", 0x76, 1, 0x000), /* Palau */ + COUNTRY_CHPLAN_ENT("PY", 0x76, 1, 0x7F1), /* Paraguay */ + COUNTRY_CHPLAN_ENT("QA", 0x35, 1, 0x7F9), /* Qatar */ + COUNTRY_CHPLAN_ENT("RE", 0x26, 1, 0x000), /* Reunion (France) */ + COUNTRY_CHPLAN_ENT("RO", 0x26, 1, 0x7F1), /* Romania */ + COUNTRY_CHPLAN_ENT("RS", 0x26, 1, 0x7F1), /* Serbia, Kosovo */ + COUNTRY_CHPLAN_ENT("RU", 0x59, 1, 0x7FB), /* Russia(fac/gost), Kaliningrad */ + COUNTRY_CHPLAN_ENT("RW", 0x26, 1, 0x0B0), /* Rwanda */ + COUNTRY_CHPLAN_ENT("SA", 0x35, 1, 0x7FB), /* Saudi Arabia */ + COUNTRY_CHPLAN_ENT("SB", 0x26, 1, 0x000), /* Solomon Islands */ + COUNTRY_CHPLAN_ENT("SC", 0x76, 1, 0x690), /* Seychelles */ + COUNTRY_CHPLAN_ENT("SE", 0x26, 1, 0x7FB), /* Sweden */ + COUNTRY_CHPLAN_ENT("SG", 0x35, 1, 0x7FB), /* Singapore */ + COUNTRY_CHPLAN_ENT("SH", 0x26, 1, 0x000), /* Saint Helena (UK) */ + COUNTRY_CHPLAN_ENT("SI", 0x26, 1, 0x7FB), /* Slovenia */ + COUNTRY_CHPLAN_ENT("SJ", 0x26, 1, 0x000), /* Svalbard (Norway) */ + COUNTRY_CHPLAN_ENT("SK", 0x26, 1, 0x7FB), /* Slovakia */ + COUNTRY_CHPLAN_ENT("SL", 0x26, 1, 0x6B0), /* Sierra Leone */ + COUNTRY_CHPLAN_ENT("SM", 0x26, 1, 0x000), /* San Marino */ + COUNTRY_CHPLAN_ENT("SN", 0x26, 1, 0x7F1), /* Senegal */ + COUNTRY_CHPLAN_ENT("SO", 0x26, 1, 0x000), /* Somalia */ + COUNTRY_CHPLAN_ENT("SR", 0x74, 1, 0x000), /* Suriname */ + COUNTRY_CHPLAN_ENT("ST", 0x76, 1, 0x680), /* Sao Tome and Principe */ + COUNTRY_CHPLAN_ENT("SV", 0x30, 1, 0x7F1), /* El Salvador */ + COUNTRY_CHPLAN_ENT("SX", 0x76, 1, 0x000), /* Sint Marteen */ + COUNTRY_CHPLAN_ENT("SZ", 0x26, 1, 0x020), /* Swaziland */ + COUNTRY_CHPLAN_ENT("TC", 0x26, 1, 0x000), /* Turks and Caicos Islands (UK) */ + COUNTRY_CHPLAN_ENT("TD", 0x26, 1, 0x6B0), /* Chad */ + COUNTRY_CHPLAN_ENT("TF", 0x26, 1, 0x680), /* French Southern and Antarctic Lands (FR Southern Territories) */ + COUNTRY_CHPLAN_ENT("TG", 0x26, 1, 0x6B0), /* Togo */ + COUNTRY_CHPLAN_ENT("TH", 0x35, 1, 0x7F1), /* Thailand */ + COUNTRY_CHPLAN_ENT("TJ", 0x26, 1, 0x640), /* Tajikistan */ + COUNTRY_CHPLAN_ENT("TK", 0x45, 1, 0x000), /* Tokelau */ + COUNTRY_CHPLAN_ENT("TM", 0x26, 1, 0x000), /* Turkmenistan */ + COUNTRY_CHPLAN_ENT("TN", 0x47, 1, 0x7F1), /* Tunisia */ + COUNTRY_CHPLAN_ENT("TO", 0x26, 1, 0x000), /* Tonga */ + COUNTRY_CHPLAN_ENT("TR", 0x26, 1, 0x7F1), /* Turkey, Northern Cyprus */ + COUNTRY_CHPLAN_ENT("TT", 0x76, 1, 0x3F1), /* Trinidad & Tobago */ + COUNTRY_CHPLAN_ENT("TV", 0x21, 0, 0x000), /* Tuvalu */ + COUNTRY_CHPLAN_ENT("TW", 0x76, 1, 0x7FF), /* Taiwan */ + COUNTRY_CHPLAN_ENT("TZ", 0x26, 1, 0x6F0), /* Tanzania */ + COUNTRY_CHPLAN_ENT("UA", 0x36, 1, 0x7FB), /* Ukraine */ + COUNTRY_CHPLAN_ENT("UG", 0x26, 1, 0x6F1), /* Uganda */ + COUNTRY_CHPLAN_ENT("US", 0x76, 1, 0x7FF), /* United States of America (USA) */ + COUNTRY_CHPLAN_ENT("UY", 0x30, 1, 0x7F1), /* Uruguay */ + COUNTRY_CHPLAN_ENT("UZ", 0x47, 1, 0x6F0), /* Uzbekistan */ + COUNTRY_CHPLAN_ENT("VA", 0x26, 1, 0x000), /* Holy See (Vatican City) */ + COUNTRY_CHPLAN_ENT("VC", 0x76, 1, 0x010), /* Saint Vincent and the Grenadines */ + COUNTRY_CHPLAN_ENT("VE", 0x30, 1, 0x7F1), /* Venezuela */ + COUNTRY_CHPLAN_ENT("VG", 0x76, 1, 0x000), /* British Virgin Islands (UK) */ + COUNTRY_CHPLAN_ENT("VI", 0x76, 1, 0x000), /* United States Virgin Islands (USA) */ + COUNTRY_CHPLAN_ENT("VN", 0x35, 1, 0x7F1), /* Vietnam */ + COUNTRY_CHPLAN_ENT("VU", 0x26, 1, 0x000), /* Vanuatu */ + COUNTRY_CHPLAN_ENT("WF", 0x26, 1, 0x000), /* Wallis and Futuna (France) */ + COUNTRY_CHPLAN_ENT("WS", 0x76, 1, 0x000), /* Samoa */ + COUNTRY_CHPLAN_ENT("YE", 0x26, 1, 0x040), /* Yemen */ + COUNTRY_CHPLAN_ENT("YT", 0x26, 1, 0x680), /* Mayotte (France) */ + COUNTRY_CHPLAN_ENT("ZA", 0x35, 1, 0x7F1), /* South Africa */ + COUNTRY_CHPLAN_ENT("ZM", 0x26, 1, 0x6B0), /* Zambia */ + COUNTRY_CHPLAN_ENT("ZW", 0x26, 1, 0x7F1), /* Zimbabwe */ +}; + +/* +* rtw_get_chplan_from_country - +* @country_code: string of country code +* +* Return pointer of struct country_chplan entry or NULL when unsupported country_code is given +*/ +const struct country_chplan *rtw_get_chplan_from_country(const char *country_code) +{ +#if RTW_DEF_MODULE_REGULATORY_CERT + const struct country_chplan *exc_ent = NULL; +#endif + const struct country_chplan *ent = NULL; + const struct country_chplan *map = NULL; + u16 map_sz = 0; + char code[2]; + int i; + + code[0] = alpha_to_upper(country_code[0]); + code[1] = alpha_to_upper(country_code[1]); + +#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP + map = CUSTOMIZED_country_chplan_map; + map_sz = sizeof(CUSTOMIZED_country_chplan_map) / sizeof(struct country_chplan); +#else + #if RTW_DEF_MODULE_REGULATORY_CERT + exc_ent = rtw_def_module_get_chplan_from_country(code); + #endif + map = country_chplan_map; + map_sz = sizeof(country_chplan_map) / sizeof(struct country_chplan); +#endif + + for (i = 0; i < map_sz; i++) { + if (strncmp(code, map[i].alpha2, 2) == 0) { + ent = &map[i]; + break; + } + } + + #if RTW_DEF_MODULE_REGULATORY_CERT + if (!ent || !(COUNTRY_CHPLAN_DEF_MODULE_FALGS(ent) & RTW_DEF_MODULE_REGULATORY_CERT)) + exc_ent = ent = NULL; + if (exc_ent) + ent = exc_ent; + #endif + + return ent; +} + +void dump_country_chplan(void *sel, const struct country_chplan *ent) +{ + RTW_PRINT_SEL(sel, "\"%c%c\", 0x%02X%s\n" + , ent->alpha2[0], ent->alpha2[1], ent->chplan + , COUNTRY_CHPLAN_EN_11AC(ent) ? " ac" : "" + ); +} + +void dump_country_chplan_map(void *sel) +{ + const struct country_chplan *ent; + u8 code[2]; + +#if RTW_DEF_MODULE_REGULATORY_CERT + RTW_PRINT_SEL(sel, "RTW_DEF_MODULE_REGULATORY_CERT:0x%x\n", RTW_DEF_MODULE_REGULATORY_CERT); +#endif +#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP + RTW_PRINT_SEL(sel, "CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP\n"); +#endif + + for (code[0] = 'A'; code[0] <= 'Z'; code[0]++) { + for (code[1] = 'A'; code[1] <= 'Z'; code[1]++) { + ent = rtw_get_chplan_from_country(code); + if (!ent) + continue; + + dump_country_chplan(sel, ent); + } + } +} + +void dump_chplan_id_list(void *sel) +{ + u8 first = 1; + int i; + + for (i = 0; i < RTW_CHPLAN_MAX; i++) { + if (!rtw_is_channel_plan_valid(i)) + continue; + + if (first) { + RTW_PRINT_SEL(sel, "0x%02X ", i); + first = 0; + } else + _RTW_PRINT_SEL(sel, "0x%02X ", i); + } + + _RTW_PRINT_SEL(sel, "0x7F\n"); +} + +void dump_chplan_test(void *sel) +{ + int i, j; + + /* check invalid channel */ + for (i = 0; i < RTW_RD_2G_MAX; i++) { + for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan2G[i]); j++) { + if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan2G[i], j)) == 0) + RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan2G[i], j), i, j); + } + } + +#ifdef CONFIG_IEEE80211_BAND_5GHZ + for (i = 0; i < RTW_RD_5G_MAX; i++) { + for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan5G[i]); j++) { + if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan5G[i], j)) == 0) + RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan5G[i], j), i, j); + } + } +#endif +} + +void dump_chplan_ver(void *sel) +{ + RTW_PRINT_SEL(sel, "%s-%s\n", RTW_DOMAIN_MAP_VER, RTW_COUNTRY_MAP_VER); +} diff --git a/core/rtw_chplan.h b/core/rtw_chplan.h new file mode 100644 index 0000000..262ef52 --- /dev/null +++ b/core/rtw_chplan.h @@ -0,0 +1,183 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2018 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTW_CHPLAN_H__ +#define __RTW_CHPLAN_H__ + +enum rtw_chplan_id { + /* ===== 0x00 ~ 0x1F, legacy channel plan ===== */ + RTW_CHPLAN_FCC = 0x00, + RTW_CHPLAN_IC = 0x01, + RTW_CHPLAN_ETSI = 0x02, + RTW_CHPLAN_SPAIN = 0x03, + RTW_CHPLAN_FRANCE = 0x04, + RTW_CHPLAN_MKK = 0x05, + RTW_CHPLAN_MKK1 = 0x06, + RTW_CHPLAN_ISRAEL = 0x07, + RTW_CHPLAN_TELEC = 0x08, + RTW_CHPLAN_GLOBAL_DOAMIN = 0x09, + RTW_CHPLAN_WORLD_WIDE_13 = 0x0A, + RTW_CHPLAN_TAIWAN = 0x0B, + RTW_CHPLAN_CHINA = 0x0C, + RTW_CHPLAN_SINGAPORE_INDIA_MEXICO = 0x0D, + RTW_CHPLAN_KOREA = 0x0E, + RTW_CHPLAN_TURKEY = 0x0F, + RTW_CHPLAN_JAPAN = 0x10, + RTW_CHPLAN_FCC_NO_DFS = 0x11, + RTW_CHPLAN_JAPAN_NO_DFS = 0x12, + RTW_CHPLAN_WORLD_WIDE_5G = 0x13, + RTW_CHPLAN_TAIWAN_NO_DFS = 0x14, + + /* ===== 0x20 ~ 0x7F, new channel plan ===== */ + RTW_CHPLAN_WORLD_NULL = 0x20, + RTW_CHPLAN_ETSI1_NULL = 0x21, + RTW_CHPLAN_FCC1_NULL = 0x22, + RTW_CHPLAN_MKK1_NULL = 0x23, + RTW_CHPLAN_ETSI2_NULL = 0x24, + RTW_CHPLAN_FCC1_FCC1 = 0x25, + RTW_CHPLAN_WORLD_ETSI1 = 0x26, + RTW_CHPLAN_MKK1_MKK1 = 0x27, + RTW_CHPLAN_WORLD_KCC1 = 0x28, + RTW_CHPLAN_WORLD_FCC2 = 0x29, + RTW_CHPLAN_FCC2_NULL = 0x2A, + RTW_CHPLAN_IC1_IC2 = 0x2B, + RTW_CHPLAN_MKK2_NULL = 0x2C, + RTW_CHPLAN_WORLD_CHILE1= 0x2D, + RTW_CHPLAN_WORLD1_WORLD1 = 0x2E, + RTW_CHPLAN_WORLD_CHILE2 = 0x2F, + RTW_CHPLAN_WORLD_FCC3 = 0x30, + RTW_CHPLAN_WORLD_FCC4 = 0x31, + RTW_CHPLAN_WORLD_FCC5 = 0x32, + RTW_CHPLAN_WORLD_FCC6 = 0x33, + RTW_CHPLAN_FCC1_FCC7 = 0x34, + RTW_CHPLAN_WORLD_ETSI2 = 0x35, + RTW_CHPLAN_WORLD_ETSI3 = 0x36, + RTW_CHPLAN_MKK1_MKK2 = 0x37, + RTW_CHPLAN_MKK1_MKK3 = 0x38, + RTW_CHPLAN_FCC1_NCC1 = 0x39, + RTW_CHPLAN_ETSI1_ETSI1 = 0x3A, + RTW_CHPLAN_ETSI1_ACMA1 = 0x3B, + RTW_CHPLAN_ETSI1_ETSI6 = 0x3C, + RTW_CHPLAN_ETSI1_ETSI12 = 0x3D, + RTW_CHPLAN_KCC1_KCC2 = 0x3E, + RTW_CHPLAN_FCC1_FCC11 = 0x3F, + RTW_CHPLAN_FCC1_NCC2 = 0x40, + RTW_CHPLAN_GLOBAL_NULL = 0x41, + RTW_CHPLAN_ETSI1_ETSI4 = 0x42, + RTW_CHPLAN_FCC1_FCC2 = 0x43, + RTW_CHPLAN_FCC1_NCC3 = 0x44, + RTW_CHPLAN_WORLD_ACMA1 = 0x45, + RTW_CHPLAN_FCC1_FCC8 = 0x46, + RTW_CHPLAN_WORLD_ETSI6 = 0x47, + RTW_CHPLAN_WORLD_ETSI7 = 0x48, + RTW_CHPLAN_WORLD_ETSI8 = 0x49, + RTW_CHPLAN_IC2_IC2 = 0x4A, + RTW_CHPLAN_KCC1_KCC3 = 0x4B, + RTW_CHPLAN_FCC1_FCC15 = 0x4C, + RTW_CHPLAN_WORLD_ETSI9 = 0x50, + RTW_CHPLAN_WORLD_ETSI10 = 0x51, + RTW_CHPLAN_WORLD_ETSI11 = 0x52, + RTW_CHPLAN_FCC1_NCC4 = 0x53, + RTW_CHPLAN_WORLD_ETSI12 = 0x54, + RTW_CHPLAN_FCC1_FCC9 = 0x55, + RTW_CHPLAN_WORLD_ETSI13 = 0x56, + RTW_CHPLAN_FCC1_FCC10 = 0x57, + RTW_CHPLAN_MKK2_MKK4 = 0x58, + RTW_CHPLAN_WORLD_ETSI14 = 0x59, + RTW_CHPLAN_FCC1_FCC5 = 0x60, + RTW_CHPLAN_FCC2_FCC7 = 0x61, + RTW_CHPLAN_FCC2_FCC1 = 0x62, + RTW_CHPLAN_WORLD_ETSI15 = 0x63, + RTW_CHPLAN_MKK2_MKK5 = 0x64, + RTW_CHPLAN_ETSI1_ETSI16 = 0x65, + RTW_CHPLAN_FCC1_FCC14 = 0x66, + RTW_CHPLAN_FCC1_FCC12 = 0x67, + RTW_CHPLAN_FCC2_FCC14 = 0x68, + RTW_CHPLAN_FCC2_FCC12 = 0x69, + RTW_CHPLAN_ETSI1_ETSI17 = 0x6A, + RTW_CHPLAN_WORLD_FCC16 = 0x6B, + RTW_CHPLAN_WORLD_FCC13 = 0x6C, + RTW_CHPLAN_FCC2_FCC15 = 0x6D, + RTW_CHPLAN_WORLD_FCC12 = 0x6E, + RTW_CHPLAN_NULL_ETSI8 = 0x6F, + RTW_CHPLAN_NULL_ETSI18 = 0x70, + RTW_CHPLAN_NULL_ETSI17 = 0x71, + RTW_CHPLAN_NULL_ETSI19 = 0x72, + RTW_CHPLAN_WORLD_FCC7 = 0x73, + RTW_CHPLAN_FCC2_FCC17 = 0x74, + RTW_CHPLAN_WORLD_ETSI20 = 0x75, + RTW_CHPLAN_FCC2_FCC11 = 0x76, + RTW_CHPLAN_WORLD_ETSI21 = 0x77, + RTW_CHPLAN_FCC1_FCC18 = 0x78, + RTW_CHPLAN_MKK2_MKK1 = 0x79, + + RTW_CHPLAN_MAX, + RTW_CHPLAN_REALTEK_DEFINE = 0x7F, + RTW_CHPLAN_UNSPECIFIED = 0xFF, +}; + +u8 rtw_chplan_get_default_regd(u8 id); +bool rtw_chplan_is_empty(u8 id); +#define rtw_is_channel_plan_valid(chplan) (((chplan) < RTW_CHPLAN_MAX || (chplan) == RTW_CHPLAN_REALTEK_DEFINE) && !rtw_chplan_is_empty(chplan)) +#define rtw_is_legacy_channel_plan(chplan) ((chplan) < 0x20) + +struct _RT_CHANNEL_INFO; +u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, struct _RT_CHANNEL_INFO *channel_set); + +#define IS_ALPHA2_NO_SPECIFIED(_alpha2) ((*((u16 *)(_alpha2))) == 0xFFFF) + +#define RTW_MODULE_RTL8821AE_HMC_M2 BIT0 /* RTL8821AE(HMC + M.2) */ +#define RTW_MODULE_RTL8821AU BIT1 /* RTL8821AU */ +#define RTW_MODULE_RTL8812AENF_NGFF BIT2 /* RTL8812AENF(8812AE+8761)_NGFF */ +#define RTW_MODULE_RTL8812AEBT_HMC BIT3 /* RTL8812AEBT(8812AE+8761)_HMC */ +#define RTW_MODULE_RTL8188EE_HMC_M2 BIT4 /* RTL8188EE(HMC + M.2) */ +#define RTW_MODULE_RTL8723BE_HMC_M2 BIT5 /* RTL8723BE(HMC + M.2) */ +#define RTW_MODULE_RTL8723BS_NGFF1216 BIT6 /* RTL8723BS(NGFF1216) */ +#define RTW_MODULE_RTL8192EEBT_HMC_M2 BIT7 /* RTL8192EEBT(8192EE+8761AU)_(HMC + M.2) */ +#define RTW_MODULE_RTL8723DE_NGFF1630 BIT8 /* RTL8723DE(NGFF1630) */ +#define RTW_MODULE_RTL8822BE BIT9 /* RTL8822BE */ +#define RTW_MODULE_RTL8821CE BIT10 /* RTL8821CE */ + +struct country_chplan { + char alpha2[2]; + u8 chplan; +#ifdef CONFIG_80211AC_VHT + u8 en_11ac; +#endif +#if RTW_DEF_MODULE_REGULATORY_CERT + u16 def_module_flags; /* RTW_MODULE_RTLXXX */ +#endif +}; + +#ifdef CONFIG_80211AC_VHT +#define COUNTRY_CHPLAN_EN_11AC(_ent) ((_ent)->en_11ac) +#else +#define COUNTRY_CHPLAN_EN_11AC(_ent) 0 +#endif + +#if RTW_DEF_MODULE_REGULATORY_CERT +#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) ((_ent)->def_module_flags) +#else +#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) 0 +#endif + +const struct country_chplan *rtw_get_chplan_from_country(const char *country_code); + +void dump_country_chplan(void *sel, const struct country_chplan *ent); +void dump_country_chplan_map(void *sel); +void dump_chplan_id_list(void *sel); +void dump_chplan_test(void *sel); +void dump_chplan_ver(void *sel); + +#endif /* __RTW_CHPLAN_H__ */ diff --git a/core/rtw_cmd.c b/core/rtw_cmd.c index c696845..2d7089f 100644 --- a/core/rtw_cmd.c +++ b/core/rtw_cmd.c @@ -164,15 +164,6 @@ sint _rtw_init_evt_priv(struct evt_priv *pevtpriv) pevtpriv->c2h_mem = pevtpriv->allocated_c2h_mem + 4\ - ((u32)(pevtpriv->allocated_c2h_mem) & 3); -#ifdef PLATFORM_OS_XP - pevtpriv->pc2h_mdl = IoAllocateMdl((u8 *)pevtpriv->c2h_mem, C2H_MEM_SZ , FALSE, FALSE, NULL); - - if (pevtpriv->pc2h_mdl == NULL) { - res = _FAIL; - goto exit; - } - MmBuildMdlForNonPagedPool(pevtpriv->pc2h_mdl); -#endif #endif /* end of CONFIG_SDIO_HCI */ _rtw_init_queue(&(pevtpriv->evt_queue)); @@ -224,6 +215,7 @@ void _rtw_free_cmd_priv(struct cmd_priv *pcmdpriv) { if (pcmdpriv) { + _rtw_spinlock_free(&(pcmdpriv->cmd_queue.lock)); _rtw_free_sema(&(pcmdpriv->cmd_queue_sema)); /* _rtw_free_sema(&(pcmdpriv->cmd_done_sema)); */ _rtw_free_sema(&(pcmdpriv->start_cmdthread_sema)); @@ -501,8 +493,6 @@ void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv) void rtw_free_cmd_obj(struct cmd_obj *pcmd) { - struct drvextra_cmd_parm *extra_parm = NULL; - if (pcmd->parmbuf != NULL) { /* free parmbuf in cmd_obj */ rtw_mfree((unsigned char *)pcmd->parmbuf, pcmd->cmdsz); @@ -516,7 +506,6 @@ void rtw_free_cmd_obj(struct cmd_obj *pcmd) /* free cmd_obj */ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); - } @@ -620,6 +609,10 @@ _next: if (extra_parm && extra_parm->pbuf && extra_parm->size > 0) rtw_mfree(extra_parm->pbuf, extra_parm->size); } + #ifdef CONFIG_DFS + else if (pcmd->cmdcode == GEN_CMD_CODE(_SetChannelSwitch)) + adapter_to_rfctl(padapter)->csa_ch = 0; + #endif goto post_process; } @@ -716,6 +709,10 @@ post_process: if (extra_parm->pbuf && extra_parm->size > 0) rtw_mfree(extra_parm->pbuf, extra_parm->size); } + #ifdef CONFIG_DFS + else if (pcmd->cmdcode == GEN_CMD_CODE(_SetChannelSwitch)) + adapter_to_rfctl(padapter)->csa_ch = 0; + #endif _enter_critical_mutex(&(pcmd->padapter->cmdpriv.sctx_mutex), NULL); if (pcmd->sctx) { @@ -862,13 +859,10 @@ u8 rtw_sitesurvey_cmd(_adapter *padapter, struct sitesurvey_parm *pparm) struct sitesurvey_parm *psurveyPara; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -#ifdef CONFIG_P2P - struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -#endif /* CONFIG_P2P */ #ifdef CONFIG_LPS if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) - rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SCAN, 1); + rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SCAN, 0); #endif #ifdef CONFIG_P2P_PS @@ -1217,12 +1211,11 @@ void rtw_readtssi_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd) } static u8 rtw_createbss_cmd(_adapter *adapter, int flags, bool adhoc - , s16 req_ch, s8 req_bw, s8 req_offset) + , u8 ifbmp, u8 excl_ifbmp, s16 req_ch, s8 req_bw, s8 req_offset) { struct cmd_obj *cmdobj; struct createbss_parm *parm; struct cmd_priv *pcmdpriv = &adapter->cmdpriv; - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct submit_ctx sctx; u8 res = _SUCCESS; @@ -1245,6 +1238,8 @@ static u8 rtw_createbss_cmd(_adapter *adapter, int flags, bool adhoc parm->adhoc = 1; } else { parm->adhoc = 0; + parm->ifbmp = ifbmp; + parm->excl_ifbmp = excl_ifbmp; parm->req_ch = req_ch; parm->req_bw = req_bw; parm->req_offset = req_offset; @@ -1290,6 +1285,7 @@ inline u8 rtw_create_ibss_cmd(_adapter *adapter, int flags) { return rtw_createbss_cmd(adapter, flags , 1 + , 0, 0 , 0, REQ_BW_NONE, REQ_OFFSET_NONE /* for now, adhoc doesn't support ch,bw,offset request */ ); } @@ -1298,14 +1294,17 @@ inline u8 rtw_startbss_cmd(_adapter *adapter, int flags) { return rtw_createbss_cmd(adapter, flags , 0 + , BIT(adapter->iface_id), 0 , 0, REQ_BW_NONE, REQ_OFFSET_NONE /* excute entire AP setup cmd */ ); } -inline u8 rtw_change_bss_chbw_cmd(_adapter *adapter, int flags, s16 req_ch, s8 req_bw, s8 req_offset) +inline u8 rtw_change_bss_chbw_cmd(_adapter *adapter, int flags + , u8 ifbmp, u8 excl_ifbmp, s16 req_ch, s8 req_bw, s8 req_offset) { return rtw_createbss_cmd(adapter, flags , 0 + , ifbmp, excl_ifbmp , req_ch, req_bw, req_offset ); } @@ -1319,7 +1318,7 @@ static void rtw_ft_validate_akm_type(_adapter *padapter, u32 tmp_len; u8 *ptmp; - /*IEEE802.11-2012 Std. Table 8-101¡XAKM suite selectors*/ + /*IEEE802.11-2012 Std. Table 8-101-AKM suite selectors*/ if (rtw_ft_valid_akm(padapter, psecuritypriv->rsn_akm_suite_type)) { ptmp = rtw_get_ie(&pnetwork->network.IEs[12], _MDIE_, &tmp_len, (pnetwork->network.IELength-12)); @@ -1379,12 +1378,12 @@ u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network *pnetwork) } #if 0 /* for IEs is pointer */ - t_len = sizeof(ULONG) + sizeof(NDIS_802_11_MAC_ADDRESS) + 2 + - sizeof(NDIS_802_11_SSID) + sizeof(ULONG) + + t_len = sizeof(u32) + sizeof(NDIS_802_11_MAC_ADDRESS) + 2 + + sizeof(NDIS_802_11_SSID) + sizeof(u32) + sizeof(NDIS_802_11_RSSI) + sizeof(NDIS_802_11_NETWORK_TYPE) + sizeof(NDIS_802_11_CONFIGURATION) + sizeof(NDIS_802_11_NETWORK_INFRASTRUCTURE) + - sizeof(NDIS_802_11_RATES_EX) + sizeof(WLAN_PHY_INFO) + sizeof(ULONG) + MAX_IE_SZ; + sizeof(NDIS_802_11_RATES_EX) + sizeof(WLAN_PHY_INFO) + sizeof(u32) + MAX_IE_SZ; #endif /* for IEs is fix buf size */ t_len = sizeof(WLAN_BSSID_EX); @@ -1477,39 +1476,40 @@ u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network *pnetwork) #ifdef CONFIG_80211N_HT phtpriv->ht_option = _FALSE; - ptmp = rtw_get_ie(&pnetwork->network.IEs[12], _HT_CAPABILITY_IE_, &tmp_len, pnetwork->network.IELength - 12); - if (pregistrypriv->ht_enable && ptmp && tmp_len > 0) { - /* Added by Albert 2010/06/23 */ - /* For the WEP mode, we will use the bg mode to do the connection to avoid some IOT issue. */ - /* Especially for Realtek 8192u SoftAP. */ - if ((padapter->securitypriv.dot11PrivacyAlgrthm != _WEP40_) && - (padapter->securitypriv.dot11PrivacyAlgrthm != _WEP104_) && - (padapter->securitypriv.dot11PrivacyAlgrthm != _TKIP_)) { - rtw_ht_use_default_setting(padapter); + if (pregistrypriv->ht_enable && is_supported_ht(pregistrypriv->wireless_mode)) { + ptmp = rtw_get_ie(&pnetwork->network.IEs[12], _HT_CAPABILITY_IE_, &tmp_len, pnetwork->network.IELength - 12); + if (ptmp && tmp_len > 0) { + /* Added by Albert 2010/06/23 */ + /* For the WEP mode, we will use the bg mode to do the connection to avoid some IOT issue. */ + /* Especially for Realtek 8192u SoftAP. */ + if ((padapter->securitypriv.dot11PrivacyAlgrthm != _WEP40_) && + (padapter->securitypriv.dot11PrivacyAlgrthm != _WEP104_) && + (padapter->securitypriv.dot11PrivacyAlgrthm != _TKIP_)) { + rtw_ht_use_default_setting(padapter); - /* rtw_restructure_ht_ie */ - rtw_restructure_ht_ie(padapter, &pnetwork->network.IEs[12], &psecnetwork->IEs[0], - pnetwork->network.IELength - 12, &psecnetwork->IELength, - pnetwork->network.Configuration.DSConfig); + /* rtw_restructure_ht_ie */ + rtw_restructure_ht_ie(padapter, &pnetwork->network.IEs[12], &psecnetwork->IEs[0], + pnetwork->network.IELength - 12, &psecnetwork->IELength, + pnetwork->network.Configuration.DSConfig); + } } } #ifdef CONFIG_80211AC_VHT pvhtpriv->vht_option = _FALSE; if (phtpriv->ht_option - && REGSTY_IS_11AC_ENABLE(pregistrypriv) - && hal_chk_proto_cap(padapter, PROTO_CAP_11AC) - && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) - ) { + && REGSTY_IS_11AC_ENABLE(pregistrypriv) + && is_supported_vht(pregistrypriv->wireless_mode) + && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) + ) { rtw_restructure_vht_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], pnetwork->network.IELength, &psecnetwork->IELength); } #endif +#endif /* CONFIG_80211N_HT */ rtw_append_exented_cap(padapter, &psecnetwork->IEs[0], &psecnetwork->IELength); -#endif /* CONFIG_80211N_HT */ - #ifdef CONFIG_RTW_80211R rtw_ft_validate_akm_type(padapter, pnetwork); #endif @@ -1525,25 +1525,6 @@ u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network *pnetwork) pcmd->cmdsz = sizeof(WLAN_BSSID_EX); -#ifdef CONFIG_RTL8712 - /* wlan_network endian conversion */ - psecnetwork->Length = cpu_to_le32(psecnetwork->Length); - psecnetwork->Ssid.SsidLength = cpu_to_le32(psecnetwork->Ssid.SsidLength); - psecnetwork->Privacy = cpu_to_le32(psecnetwork->Privacy); - psecnetwork->Rssi = cpu_to_le32(psecnetwork->Rssi); - psecnetwork->NetworkTypeInUse = cpu_to_le32(psecnetwork->NetworkTypeInUse); - psecnetwork->Configuration.ATIMWindow = cpu_to_le32(psecnetwork->Configuration.ATIMWindow); - psecnetwork->Configuration.BeaconPeriod = cpu_to_le32(psecnetwork->Configuration.BeaconPeriod); - psecnetwork->Configuration.DSConfig = cpu_to_le32(psecnetwork->Configuration.DSConfig); - psecnetwork->Configuration.FHConfig.DwellTime = cpu_to_le32(psecnetwork->Configuration.FHConfig.DwellTime); - psecnetwork->Configuration.FHConfig.HopPattern = cpu_to_le32(psecnetwork->Configuration.FHConfig.HopPattern); - psecnetwork->Configuration.FHConfig.HopSet = cpu_to_le32(psecnetwork->Configuration.FHConfig.HopSet); - psecnetwork->Configuration.FHConfig.Length = cpu_to_le32(psecnetwork->Configuration.FHConfig.Length); - psecnetwork->Configuration.Length = cpu_to_le32(psecnetwork->Configuration.Length); - psecnetwork->InfrastructureMode = cpu_to_le32(psecnetwork->InfrastructureMode); - psecnetwork->IELength = cpu_to_le32(psecnetwork->IELength); -#endif - _rtw_init_listhead(&pcmd->list); pcmd->cmdcode = _JoinBss_CMD_;/* GEN_CMD_CODE(_JoinBss) */ pcmd->parmbuf = (unsigned char *)psecnetwork; @@ -1567,8 +1548,6 @@ u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, int flags) /* for struct submit_ctx sctx; u8 res = _SUCCESS; - - /* prepare cmd parameter */ param = (struct disconnect_parm *)rtw_zmalloc(sizeof(*param)); if (param == NULL) { @@ -1739,8 +1718,6 @@ u8 rtw_clearstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 enqueue) struct set_stakey_parm *psetstakey_para; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; struct set_stakey_rsp *psetstakey_rsp = NULL; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct security_priv *psecuritypriv = &padapter->securitypriv; s16 cam_id = 0; u8 res = _SUCCESS; @@ -2021,41 +1998,58 @@ exit: } -u8 rtw_free_assoc_resources_cmd(_adapter *padapter, u8 lock_scanned_queue) +void free_assoc_resources_hdl(_adapter *padapter, u8 lock_scanned_queue) { - struct cmd_obj *ph2c; + rtw_free_assoc_resources(padapter, lock_scanned_queue); +} + +u8 rtw_free_assoc_resources_cmd(_adapter *padapter, u8 lock_scanned_queue, int flags) +{ + struct cmd_obj *cmd; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; + struct submit_ctx sctx; u8 res = _SUCCESS; - - ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); - if (ph2c == NULL) { - res = _FAIL; - goto exit; + if (flags & RTW_CMDF_DIRECTLY) { + free_assoc_resources_hdl(padapter, lock_scanned_queue); } + else { + cmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); + if (cmd == NULL) { + res = _FAIL; + goto exit; + } - pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); - if (pdrvextra_cmd_parm == NULL) { - rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); - res = _FAIL; - goto exit; + pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); + if (pdrvextra_cmd_parm == NULL) { + rtw_mfree((unsigned char *)cmd, sizeof(struct cmd_obj)); + res = _FAIL; + goto exit; + } + + pdrvextra_cmd_parm->ec_id = FREE_ASSOC_RESOURCES; + pdrvextra_cmd_parm->type = lock_scanned_queue; + pdrvextra_cmd_parm->size = 0; + pdrvextra_cmd_parm->pbuf = NULL; + + init_h2fwcmd_w_parm_no_rsp(cmd, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); + if (flags & RTW_CMDF_WAIT_ACK) { + cmd->sctx = &sctx; + rtw_sctx_init(&sctx, 2000); + } + + res = rtw_enqueue_cmd(pcmdpriv, cmd); + + if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { + rtw_sctx_wait(&sctx, __func__); + _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); + if (sctx.status == RTW_SCTX_SUBMITTED) + cmd->sctx = NULL; + _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); + } } - - pdrvextra_cmd_parm->ec_id = FREE_ASSOC_RESOURCES; - pdrvextra_cmd_parm->type = lock_scanned_queue; - pdrvextra_cmd_parm->size = 0; - pdrvextra_cmd_parm->pbuf = NULL; - - init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); - - - /* rtw_enqueue_cmd(pcmdpriv, ph2c); */ - res = rtw_enqueue_cmd(pcmdpriv, ph2c); - exit: - - return res; } @@ -2172,7 +2166,6 @@ u8 _rtw_set_chplan_cmd(_adapter *adapter, int flags, u8 chplan, const struct cou struct cmd_obj *cmdobj; struct SetChannelPlan_param *parm; struct cmd_priv *pcmdpriv = &adapter->cmdpriv; - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct submit_ctx sctx; u8 res = _SUCCESS; @@ -2285,7 +2278,7 @@ inline u8 rtw_set_country_cmd(_adapter *adapter, int flags, const char *country_ return _rtw_set_chplan_cmd(adapter, flags, RTW_CHPLAN_UNSPECIFIED, ent, swconfig); } -u8 rtw_led_blink_cmd(_adapter *padapter, PVOID pLed) +u8 rtw_led_blink_cmd(_adapter *padapter, void *pLed) { struct cmd_obj *pcmdobj; struct LedBlink_param *ledBlink_param; @@ -2319,54 +2312,34 @@ exit: return res; } -u8 rtw_set_csa_cmd(_adapter *padapter, u8 new_ch_no) +u8 rtw_set_csa_cmd(_adapter *adapter) { - struct cmd_obj *pcmdobj; - struct SetChannelSwitch_param *setChannelSwitch_param; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct cmd_priv *pcmdpriv = &padapter->cmdpriv; - + struct cmd_obj *cmdobj; + struct cmd_priv *cmdpriv = &adapter->cmdpriv; u8 res = _SUCCESS; - - - pcmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); - if (pcmdobj == NULL) { + cmdobj = rtw_zmalloc(sizeof(struct cmd_obj)); + if (cmdobj == NULL) { res = _FAIL; goto exit; } - setChannelSwitch_param = (struct SetChannelSwitch_param *)rtw_zmalloc(sizeof(struct SetChannelSwitch_param)); - if (setChannelSwitch_param == NULL) { - rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); - res = _FAIL; - goto exit; - } - - setChannelSwitch_param->new_ch_no = new_ch_no; - - init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelSwitch_param, GEN_CMD_CODE(_SetChannelSwitch)); - res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); + init_h2fwcmd_w_parm_no_parm_rsp(cmdobj, GEN_CMD_CODE(_SetChannelSwitch)); + res = rtw_enqueue_cmd(cmdpriv, cmdobj); exit: - - return res; } u8 rtw_tdls_cmd(_adapter *padapter, u8 *addr, u8 option) { + u8 res = _SUCCESS; +#ifdef CONFIG_TDLS struct cmd_obj *pcmdobj; struct TDLSoption_param *TDLSoption; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; - u8 res = _SUCCESS; - - -#ifdef CONFIG_TDLS - - pcmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); if (pcmdobj == NULL) { res = _FAIL; @@ -2388,11 +2361,8 @@ u8 rtw_tdls_cmd(_adapter *padapter, u8 *addr, u8 option) init_h2fwcmd_w_parm_no_rsp(pcmdobj, TDLSoption, GEN_CMD_CODE(_TDLS)); res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); -#endif /* CONFIG_TDLS */ - exit: - - +#endif /* CONFIG_TDLS */ return res; } @@ -2431,6 +2401,593 @@ exit: return res; } +u8 rtw_periodic_tsf_update_end_cmd(_adapter *adapter) +{ + struct cmd_obj *cmdobj; + struct drvextra_cmd_parm *parm; + struct cmd_priv *cmdpriv = &adapter->cmdpriv; + u8 res = _SUCCESS; + + cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); + if (cmdobj == NULL) { + res = _FAIL; + goto exit; + } + + parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); + if (parm == NULL) { + rtw_mfree((unsigned char *)cmdobj, sizeof(struct cmd_obj)); + res = _FAIL; + goto exit; + } + + parm->ec_id = PERIOD_TSF_UPDATE_END_WK_CID; + parm->type = 0; + parm->size = 0; + parm->pbuf = NULL; + + init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, GEN_CMD_CODE(_Set_Drv_Extra)); + + res = rtw_enqueue_cmd(cmdpriv, cmdobj); + +exit: + return res; +} +u8 rtw_ssmps_wk_hdl(_adapter *adapter, struct ssmps_cmd_parm *ssmp_param) +{ + u8 res = _SUCCESS; + struct sta_info *sta = ssmp_param->sta; + u8 smps = ssmp_param->smps; + + if (sta == NULL) + return _FALSE; + + if (smps) + rtw_ssmps_enter(adapter, sta); + else + rtw_ssmps_leave(adapter, sta); + return res; +} + +u8 rtw_ssmps_wk_cmd(_adapter *adapter, struct sta_info *sta, u8 smps, u8 enqueue) +{ + struct cmd_obj *cmdobj; + struct drvextra_cmd_parm *cmd_parm; + struct ssmps_cmd_parm *ssmp_param; + struct cmd_priv *pcmdpriv = &adapter->cmdpriv; + u8 res = _SUCCESS; + + if (enqueue) { + cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); + if (cmdobj == NULL) { + res = _FAIL; + goto exit; + } + + cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); + if (cmd_parm == NULL) { + rtw_mfree((unsigned char *)cmdobj, sizeof(struct cmd_obj)); + res = _FAIL; + goto exit; + } + + ssmp_param = (struct ssmps_cmd_parm *)rtw_zmalloc(sizeof(struct ssmps_cmd_parm)); + if (ssmp_param == NULL) { + rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); + rtw_mfree((u8 *)cmd_parm, sizeof(struct drvextra_cmd_parm)); + res = _FAIL; + goto exit; + } + + ssmp_param->smps = smps; + ssmp_param->sta = sta; + + cmd_parm->ec_id = SSMPS_WK_CID; + cmd_parm->type = 0; + cmd_parm->size = sizeof(struct ssmps_cmd_parm); + cmd_parm->pbuf = (u8 *)ssmp_param; + + init_h2fwcmd_w_parm_no_rsp(cmdobj, cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); + + res = rtw_enqueue_cmd(pcmdpriv, cmdobj); + } else { + struct ssmps_cmd_parm tmp_ssmp_param; + + tmp_ssmp_param.smps = smps; + tmp_ssmp_param.sta = sta; + rtw_ssmps_wk_hdl(adapter, &tmp_ssmp_param); + } + +exit: + return res; +} + +#ifdef CONFIG_SUPPORT_STATIC_SMPS +u8 _ssmps_chk_by_tp(_adapter *adapter, u8 from_timer) +{ + u8 enter_smps = _FALSE; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); + struct sta_priv *pstapriv = &adapter->stapriv; + struct sta_info *psta; + u32 tx_tp_mbits, rx_tp_mbits; + + if (!MLME_IS_STA(adapter) || + !hal_is_mimo_support(adapter) || + !pmlmeext->ssmps_en || + (pmlmeext->cur_channel > 14) + ) + return enter_smps; + + psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); + if (psta == NULL) { + RTW_ERR(ADPT_FMT" sta == NULL\n", ADPT_ARG(adapter)); + rtw_warn_on(1); + return enter_smps; + } + + if (psta->cmn.mimo_type == RF_1T1R) + return enter_smps; + + tx_tp_mbits = psta->sta_stats.tx_tp_kbits >> 10; + rx_tp_mbits = psta->sta_stats.rx_tp_kbits >> 10; + + #ifdef DBG_STATIC_SMPS + if (pmlmeext->ssmps_test) { + enter_smps = (pmlmeext->ssmps_test_en == 1) ? _TRUE : _FALSE; + } + else + #endif + { + if ((tx_tp_mbits <= pmlmeext->ssmps_tx_tp_th) && + (rx_tp_mbits <= pmlmeext->ssmps_rx_tp_th)) + enter_smps = _TRUE; + else + enter_smps = _FALSE; + } + + if (1) { + RTW_INFO(FUNC_ADPT_FMT" tx_tp:%d [%d], rx_tp:%d [%d] , SSMPS enter :%s\n", + FUNC_ADPT_ARG(adapter), + tx_tp_mbits, pmlmeext->ssmps_tx_tp_th, + rx_tp_mbits, pmlmeext->ssmps_rx_tp_th, + (enter_smps == _TRUE) ? "True" : "False"); + #ifdef DBG_STATIC_SMPS + RTW_INFO(FUNC_ADPT_FMT" test:%d test_en:%d\n", + FUNC_ADPT_ARG(adapter), + pmlmeext->ssmps_test, + pmlmeext->ssmps_test_en); + #endif + } + + if (enter_smps) { + if (!from_timer && psta->cmn.sm_ps != SM_PS_STATIC) + rtw_ssmps_enter(adapter, psta); + } else { + if (!from_timer && psta->cmn.sm_ps != SM_PS_DISABLE) + rtw_ssmps_leave(adapter, psta); + else { + u8 ps_change = _FALSE; + + if (enter_smps && psta->cmn.sm_ps != SM_PS_STATIC) + ps_change = _TRUE; + else if (!enter_smps && psta->cmn.sm_ps != SM_PS_DISABLE) + ps_change = _TRUE; + + if (ps_change) + rtw_ssmps_wk_cmd(adapter, psta, enter_smps, 1); + } + } + + return enter_smps; +} +#endif /*CONFIG_SUPPORT_STATIC_SMPS*/ + +#ifdef CONFIG_CTRL_TXSS_BY_TP +void rtw_ctrl_txss_update_mimo_type(_adapter *adapter, struct sta_info *sta) +{ + struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); + + pmlmeext->txss_momi_type_bk = sta->cmn.mimo_type; +} + +u8 rtw_ctrl_txss(_adapter *adapter, struct sta_info *sta, bool tx_1ss) +{ + struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); + u8 lps_changed = _FALSE; + u8 rst = _SUCCESS; + + if (pmlmeext->txss_1ss == tx_1ss) + return _FALSE; + + if (pwrpriv->bLeisurePs && pwrpriv->pwr_mode != PS_MODE_ACTIVE) { + lps_changed = _TRUE; + LPS_Leave(adapter, "LPS_CTRL_TXSS"); + } + + RTW_INFO(ADPT_FMT" STA [" MAC_FMT "] set tx to %d ss\n", + ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr), + (tx_1ss) ? 1 : rtw_get_sta_tx_nss(adapter, sta)); + + /*ra re-registed*/ + sta->cmn.mimo_type = (tx_1ss) ? RF_1T1R : pmlmeext->txss_momi_type_bk; + rtw_phydm_ra_registed(adapter, sta); + + /*configure trx mode*/ + rtw_phydm_trx_cfg(adapter, tx_1ss); + pmlmeext->txss_1ss = tx_1ss; + + if (lps_changed) + LPS_Enter(adapter, "LPS_CTRL_TXSS"); + + return rst; +} + +u8 rtw_ctrl_txss_wk_hdl(_adapter *adapter, struct txss_cmd_parm *txss_param) +{ + if (!txss_param->sta) + return _FALSE; + + return rtw_ctrl_txss(adapter, txss_param->sta, txss_param->tx_1ss); +} + +u8 rtw_ctrl_txss_wk_cmd(_adapter *adapter, struct sta_info *sta, bool tx_1ss, u8 flag) +{ + struct cmd_obj *cmdobj; + struct drvextra_cmd_parm *cmd_parm; + struct txss_cmd_parm *txss_param; + struct cmd_priv *pcmdpriv = &adapter->cmdpriv; + struct submit_ctx sctx; + u8 res = _SUCCESS; + + txss_param = (struct txss_cmd_parm *)rtw_zmalloc(sizeof(struct txss_cmd_parm)); + if (txss_param == NULL) { + res = _FAIL; + goto exit; + } + + txss_param->tx_1ss = tx_1ss; + txss_param->sta = sta; + + if (flag & RTW_CMDF_DIRECTLY) { + res = rtw_ctrl_txss_wk_hdl(adapter, txss_param); + rtw_mfree((u8 *)txss_param, sizeof(*txss_param)); + } else { + cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); + if (cmdobj == NULL) { + res = _FAIL; + goto exit; + } + + cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); + if (cmd_parm == NULL) { + rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); + res = _FAIL; + goto exit; + } + + cmd_parm->ec_id = TXSS_WK_CID; + cmd_parm->type = 0; + cmd_parm->size = sizeof(struct txss_cmd_parm); + cmd_parm->pbuf = (u8 *)txss_param; + + init_h2fwcmd_w_parm_no_rsp(cmdobj, cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); + + if (flag & RTW_CMDF_WAIT_ACK) { + cmdobj->sctx = &sctx; + rtw_sctx_init(&sctx, 10 * 1000); + } + + res = rtw_enqueue_cmd(pcmdpriv, cmdobj); + if (res == _SUCCESS && (flag & RTW_CMDF_WAIT_ACK)) { + rtw_sctx_wait(&sctx, __func__); + _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); + if (sctx.status == RTW_SCTX_SUBMITTED) + cmdobj->sctx = NULL; + _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); + if (sctx.status != RTW_SCTX_DONE_SUCCESS) + res = _FAIL; + } + } + +exit: + return res; +} + +void rtw_ctrl_tx_ss_by_tp(_adapter *adapter, u8 from_timer) +{ + bool tx_1ss = _FALSE; /*change tx from 2ss to 1ss*/ + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); + struct sta_priv *pstapriv = &adapter->stapriv; + struct sta_info *psta; + u32 tx_tp_mbits; + + if (!MLME_IS_STA(adapter) || + !hal_is_mimo_support(adapter) || + !pmlmeext->txss_ctrl_en + ) + return; + + psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); + if (psta == NULL) { + RTW_ERR(ADPT_FMT" sta == NULL\n", ADPT_ARG(adapter)); + rtw_warn_on(1); + return; + } + + tx_tp_mbits = psta->sta_stats.tx_tp_kbits >> 10; + if (tx_tp_mbits >= pmlmeext->txss_tp_th) { + tx_1ss = _FALSE; + } else { + if (pmlmeext->txss_tp_chk_cnt && --pmlmeext->txss_tp_chk_cnt) + tx_1ss = _FALSE; + else + tx_1ss = _TRUE; + } + + if (1) { + RTW_INFO(FUNC_ADPT_FMT" tx_tp:%d [%d] tx_1ss(%d):%s\n", + FUNC_ADPT_ARG(adapter), + tx_tp_mbits, pmlmeext->txss_tp_th, + pmlmeext->txss_tp_chk_cnt, + (tx_1ss == _TRUE) ? "True" : "False"); + } + + if (pmlmeext->txss_1ss != tx_1ss) { + if (from_timer) + rtw_ctrl_txss_wk_cmd(adapter, psta, tx_1ss, 0); + else + rtw_ctrl_txss(adapter, psta, tx_1ss); + } +} +#ifdef DBG_CTRL_TXSS +void dbg_ctrl_txss(_adapter *adapter, bool tx_1ss) +{ + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); + struct sta_priv *pstapriv = &adapter->stapriv; + struct sta_info *psta; + + if (!MLME_IS_STA(adapter) || + !hal_is_mimo_support(adapter) + ) + return; + + psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); + if (psta == NULL) { + RTW_ERR(ADPT_FMT" sta == NULL\n", ADPT_ARG(adapter)); + rtw_warn_on(1); + return; + } + + rtw_ctrl_txss(adapter, psta, tx_1ss); +} +#endif +#endif /*CONFIG_CTRL_TXSS_BY_TP*/ + +#ifdef CONFIG_LPS +#ifdef CONFIG_LPS_CHK_BY_TP +#ifdef LPS_BCN_CNT_MONITOR +static u8 _bcn_cnt_expected(struct sta_info *psta) +{ + _adapter *adapter = psta->padapter; + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u8 dtim = rtw_get_bcn_dtim_period(adapter); + u8 bcn_cnt = 0; + + if ((pmlmeinfo->bcn_interval !=0) && (dtim != 0)) + bcn_cnt = 2000 / pmlmeinfo->bcn_interval / dtim * 4 / 5; /*2s*/ + if (0) + RTW_INFO("%s bcn_cnt:%d\n", __func__, bcn_cnt); + + if (bcn_cnt == 0) { + RTW_ERR(FUNC_ADPT_FMT" bcn_cnt == 0\n", FUNC_ADPT_ARG(adapter)); + rtw_warn_on(1); + } + + return bcn_cnt; +} +#endif +u8 _lps_chk_by_tp(_adapter *adapter, u8 from_timer) +{ + u8 enter_ps = _FALSE; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct sta_priv *pstapriv = &adapter->stapriv; + struct sta_info *psta; + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); + u32 tx_tp_mbits, rx_tp_mbits, bi_tp_mbits; + u8 rx_bcn_cnt; + + psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); + if (psta == NULL) { + RTW_ERR(ADPT_FMT" sta == NULL\n", ADPT_ARG(adapter)); + rtw_warn_on(1); + return enter_ps; + } + + rx_bcn_cnt = rtw_get_bcn_cnt(psta->padapter); + psta->sta_stats.acc_tx_bytes = psta->sta_stats.tx_bytes; + psta->sta_stats.acc_rx_bytes = psta->sta_stats.rx_bytes; + +#if 1 + tx_tp_mbits = psta->sta_stats.tx_tp_kbits >> 10; + rx_tp_mbits = psta->sta_stats.rx_tp_kbits >> 10; + bi_tp_mbits = tx_tp_mbits + rx_tp_mbits; +#else + tx_tp_mbits = psta->sta_stats.smooth_tx_tp_kbits >> 10; + rx_tp_mbits = psta->sta_stats.smooth_rx_tp_kbits >> 10; + bi_tp_mbits = tx_tp_mbits + rx_tp_mbits; +#endif + + if ((bi_tp_mbits >= pwrpriv->lps_bi_tp_th) || + (tx_tp_mbits >= pwrpriv->lps_tx_tp_th) || + (rx_tp_mbits >= pwrpriv->lps_rx_tp_th)) { + enter_ps = _FALSE; + pwrpriv->lps_chk_cnt = pwrpriv->lps_chk_cnt_th; + } + else { +#ifdef LPS_BCN_CNT_MONITOR + u8 bcn_cnt = _bcn_cnt_expected(psta); + + if (bcn_cnt && (rx_bcn_cnt < bcn_cnt)) { + pwrpriv->lps_chk_cnt = 2; + RTW_ERR(FUNC_ADPT_FMT" BCN_CNT:%d(%d) invalid\n", + FUNC_ADPT_ARG(adapter), rx_bcn_cnt, bcn_cnt); + } +#endif + + if (pwrpriv->lps_chk_cnt && --pwrpriv->lps_chk_cnt) + enter_ps = _FALSE; + else + enter_ps = _TRUE; + } + + if (1) { + RTW_INFO(FUNC_ADPT_FMT" tx_tp:%d [%d], rx_tp:%d [%d], bi_tp:%d [%d], enter_ps(%d):%s\n", + FUNC_ADPT_ARG(adapter), + tx_tp_mbits, pwrpriv->lps_tx_tp_th, + rx_tp_mbits, pwrpriv->lps_rx_tp_th, + bi_tp_mbits, pwrpriv->lps_bi_tp_th, + pwrpriv->lps_chk_cnt, + (enter_ps == _TRUE) ? "True" : "False"); + RTW_INFO(FUNC_ADPT_FMT" tx_pkt_cnt :%d [%d], rx_pkt_cnt :%d [%d]\n", + FUNC_ADPT_ARG(adapter), + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod, + pwrpriv->lps_tx_pkts, + pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod, + pwrpriv->lps_rx_pkts); + if (!adapter->bsta_tp_dump) + RTW_INFO(FUNC_ADPT_FMT" bcn_cnt:%d (per-%d second)\n", + FUNC_ADPT_ARG(adapter), + rx_bcn_cnt, + 2); + } + + if (enter_ps) { + if (!from_timer) + LPS_Enter(adapter, "TRAFFIC_IDLE"); + } else { + if (!from_timer) + LPS_Leave(adapter, "TRAFFIC_BUSY"); + else { + #ifdef CONFIG_CONCURRENT_MODE + #ifndef CONFIG_FW_MULTI_PORT_SUPPORT + if (adapter->hw_port == HW_PORT0) + #endif + #endif + rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_TRAFFIC_BUSY, 0); + } + } + + return enter_ps; +} +#endif + +static u8 _lps_chk_by_pkt_cnts(_adapter *padapter, u8 from_timer, u8 bBusyTraffic) +{ + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + u8 bEnterPS = _FALSE; + + /* check traffic for powersaving. */ + if (((pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) > 8) || + #ifdef CONFIG_LPS_SLOW_TRANSITION + (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) + #else /* CONFIG_LPS_SLOW_TRANSITION */ + (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 4) + #endif /* CONFIG_LPS_SLOW_TRANSITION */ + ) { + #ifdef DBG_RX_COUNTER_DUMP + if (padapter->dump_rx_cnt_mode & DUMP_DRV_TRX_COUNTER_DATA) + RTW_INFO("(-)Tx = %d, Rx = %d\n", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod, pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); + #endif + + bEnterPS = _FALSE; + #ifdef CONFIG_LPS_SLOW_TRANSITION + if (bBusyTraffic == _TRUE) { + if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount <= 4) + pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 4; + + pmlmepriv->LinkDetectInfo.TrafficTransitionCount++; + + /* RTW_INFO("Set TrafficTransitionCount to %d\n", pmlmepriv->LinkDetectInfo.TrafficTransitionCount); */ + + if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount > 30/*TrafficTransitionLevel*/) + pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 30; + } + #endif /* CONFIG_LPS_SLOW_TRANSITION */ + } else { + #ifdef DBG_RX_COUNTER_DUMP + if (padapter->dump_rx_cnt_mode & DUMP_DRV_TRX_COUNTER_DATA) + RTW_INFO("(+)Tx = %d, Rx = %d\n", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod, pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); + #endif + + #ifdef CONFIG_LPS_SLOW_TRANSITION + if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount >= 2) + pmlmepriv->LinkDetectInfo.TrafficTransitionCount -= 2; + else + pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 0; + + if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount == 0) + bEnterPS = _TRUE; + #else /* CONFIG_LPS_SLOW_TRANSITION */ + bEnterPS = _TRUE; + #endif /* CONFIG_LPS_SLOW_TRANSITION */ + } + + #ifdef CONFIG_DYNAMIC_DTIM + if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount == 8) + bEnterPS = _FALSE; + + RTW_INFO("LowPowerTransitionCount=%d\n", pmlmepriv->LinkDetectInfo.LowPowerTransitionCount); + #endif /* CONFIG_DYNAMIC_DTIM */ + + /* LeisurePS only work in infra mode. */ + if (bEnterPS) { + if (!from_timer) { + #ifdef CONFIG_DYNAMIC_DTIM + if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount < 8) + adapter_to_pwrctl(padapter)->dtim = 1; + else + adapter_to_pwrctl(padapter)->dtim = 3; + #endif /* CONFIG_DYNAMIC_DTIM */ + LPS_Enter(padapter, "TRAFFIC_IDLE"); + } else { + /* do this at caller */ + /* rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_ENTER, 0); */ + /* rtw_hal_dm_watchdog_in_lps(padapter); */ + } + + #ifdef CONFIG_DYNAMIC_DTIM + if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode == _TRUE) + pmlmepriv->LinkDetectInfo.LowPowerTransitionCount++; + #endif /* CONFIG_DYNAMIC_DTIM */ + } else { + #ifdef CONFIG_DYNAMIC_DTIM + if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount != 8) + pmlmepriv->LinkDetectInfo.LowPowerTransitionCount = 0; + else + pmlmepriv->LinkDetectInfo.LowPowerTransitionCount++; + #endif /* CONFIG_DYNAMIC_DTIM */ + + if (!from_timer) + LPS_Leave(padapter, "TRAFFIC_BUSY"); + else { + #ifdef CONFIG_CONCURRENT_MODE + #ifndef CONFIG_FW_MULTI_PORT_SUPPORT + if (padapter->hw_port == HW_PORT0) + #endif + #endif + rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_TRAFFIC_BUSY, 0); + } + } + + return bEnterPS; +} +#endif /* CONFIG_LPS */ + /* from_timer == 1 means driver is in LPS */ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) { @@ -2447,8 +3004,9 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) struct tdls_txmgmt txmgmt; u8 baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; #endif /* CONFIG_TDLS */ - +#ifdef CONFIG_TRAFFIC_PROTECT RT_LINK_DETECT_T *link_detect = &pmlmepriv->LinkDetectInfo; +#endif #ifdef CONFIG_BT_COEXIST if (padapter->registrypriv.wifi_spec != 1) { @@ -2524,110 +3082,27 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) #endif /* CONFIG_TDLS_AUTOSETUP */ #endif /* CONFIG_TDLS */ +#ifdef CONFIG_SUPPORT_STATIC_SMPS + _ssmps_chk_by_tp(padapter, from_timer); +#endif +#ifdef CONFIG_CTRL_TXSS_BY_TP + rtw_ctrl_tx_ss_by_tp(padapter, from_timer); +#endif + #ifdef CONFIG_LPS - /* check traffic for powersaving. */ - if (((pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) > 8) || -#ifdef CONFIG_LPS_SLOW_TRANSITION - (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) -#else /* CONFIG_LPS_SLOW_TRANSITION */ - (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 4) -#endif /* CONFIG_LPS_SLOW_TRANSITION */ - ) { -#ifdef DBG_RX_COUNTER_DUMP - if (padapter->dump_rx_cnt_mode & DUMP_DRV_TRX_COUNTER_DATA) - RTW_INFO("(-)Tx = %d, Rx = %d\n", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod, pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); -#endif - bEnterPS = _FALSE; -#ifdef CONFIG_LPS_SLOW_TRANSITION - if (bBusyTraffic == _TRUE) { - if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount <= 4) - pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 4; - - pmlmepriv->LinkDetectInfo.TrafficTransitionCount++; - - /* RTW_INFO("Set TrafficTransitionCount to %d\n", pmlmepriv->LinkDetectInfo.TrafficTransitionCount); */ - - if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount > 30/*TrafficTransitionLevel*/) - pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 30; - } -#endif /* CONFIG_LPS_SLOW_TRANSITION */ - - } else { -#ifdef DBG_RX_COUNTER_DUMP - if (padapter->dump_rx_cnt_mode & DUMP_DRV_TRX_COUNTER_DATA) - RTW_INFO("(+)Tx = %d, Rx = %d\n", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod, pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); -#endif -#ifdef CONFIG_LPS_SLOW_TRANSITION - if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount >= 2) - pmlmepriv->LinkDetectInfo.TrafficTransitionCount -= 2; + if (adapter_to_pwrctl(padapter)->bLeisurePs && MLME_IS_STA(padapter)) { + #ifdef CONFIG_LPS_CHK_BY_TP + if (adapter_to_pwrctl(padapter)->lps_chk_by_tp) + bEnterPS = _lps_chk_by_tp(padapter, from_timer); else - pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 0; - - if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount == 0) - bEnterPS = _TRUE; -#else /* CONFIG_LPS_SLOW_TRANSITION */ - bEnterPS = _TRUE; -#endif /* CONFIG_LPS_SLOW_TRANSITION */ + #endif /*CONFIG_LPS_CHK_BY_TP*/ + bEnterPS = _lps_chk_by_pkt_cnts(padapter, from_timer, bBusyTraffic); } - -#ifdef CONFIG_DYNAMIC_DTIM - if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount == 8) - bEnterPS = _FALSE; - - RTW_INFO("LowPowerTransitionCount=%d\n", pmlmepriv->LinkDetectInfo.LowPowerTransitionCount); -#endif /* CONFIG_DYNAMIC_DTIM */ - - /* LeisurePS only work in infra mode. */ - if (bEnterPS) { - if (!from_timer) { -#ifdef CONFIG_DYNAMIC_DTIM - if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount < 8) - adapter_to_pwrctl(padapter)->dtim = 1; - else - adapter_to_pwrctl(padapter)->dtim = 3; -#endif /* CONFIG_DYNAMIC_DTIM */ - LPS_Enter(padapter, "TRAFFIC_IDLE"); - } else { - /* do this at caller */ - /* rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_ENTER, 1); */ - /* rtw_hal_dm_watchdog_in_lps(padapter); */ - } -#ifdef CONFIG_DYNAMIC_DTIM - if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode == _TRUE) - pmlmepriv->LinkDetectInfo.LowPowerTransitionCount++; -#endif /* CONFIG_DYNAMIC_DTIM */ - } else { -#ifdef CONFIG_DYNAMIC_DTIM - if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount != 8) - pmlmepriv->LinkDetectInfo.LowPowerTransitionCount = 0; - else - pmlmepriv->LinkDetectInfo.LowPowerTransitionCount++; -#endif /* CONFIG_DYNAMIC_DTIM */ - if (!from_timer) - LPS_Leave(padapter, "TRAFFIC_BUSY"); - else { -#ifdef CONFIG_CONCURRENT_MODE - #ifndef CONFIG_FW_MULTI_PORT_SUPPORT - if (padapter->hw_port == HW_PORT0) - #endif -#endif - rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_TRAFFIC_BUSY, 1); - } - } - #endif /* CONFIG_LPS */ + } else { #ifdef CONFIG_LPS - struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); - int n_assoc_iface = 0; - int i; - - for (i = 0; i < dvobj->iface_nums; i++) { - if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE)) - n_assoc_iface++; - } - - if (!from_timer && n_assoc_iface == 0) + if (!from_timer && rtw_mi_get_assoc_if_num(padapter) == 0) LPS_Leave(padapter, "NON_LINKED"); #endif } @@ -2664,6 +3139,9 @@ static void dynamic_update_bcn_check(_adapter *padapter) if (!padapter->registrypriv.wifi_spec) return; + if (!padapter->registrypriv.ht_enable || !is_supported_ht(padapter->registrypriv.wireless_mode)) + return; + if (!MLME_IS_AP(padapter)) return; @@ -2673,7 +3151,7 @@ static void dynamic_update_bcn_check(_adapter *padapter) if (count % 10 == 0) { count = 1; - +#ifdef CONFIG_80211N_HT if (_FALSE == ATOMIC_READ(&pmlmepriv->olbc) && _FALSE == ATOMIC_READ(&pmlmepriv->olbc_ht)) { @@ -2682,8 +3160,10 @@ static void dynamic_update_bcn_check(_adapter *padapter) update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); } } +#endif /* CONFIG_80211N_HT */ } +#ifdef CONFIG_80211N_HT /* In 2s, there are any legacy AP, update HT info, and then reset count */ if (_FALSE != ATOMIC_READ(&pmlmepriv->olbc) @@ -2698,14 +3178,12 @@ static void dynamic_update_bcn_check(_adapter *padapter) ATOMIC_SET(&pmlmepriv->olbc_ht, _FALSE); count = 0; } - +#endif /* CONFIG_80211N_HT */ count ++; } } void rtw_iface_dynamic_chk_wk_hdl(_adapter *padapter) { - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK #ifdef CONFIG_AP_MODE if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) { @@ -2725,13 +3203,10 @@ void rtw_iface_dynamic_chk_wk_hdl(_adapter *padapter) /* for debug purpose */ _linked_info_dump(padapter); - #ifdef CONFIG_BEAMFORMING - #ifndef RTW_BEAMFORMING_VERSION_2 - #if (BEAMFORMING_SUPPORT == 0) /*for diver defined beamforming*/ - beamforming_watchdog(padapter); - #endif - #endif /* !RTW_BEAMFORMING_VERSION_2 */ - #endif +#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR + rtw_cfgvendor_rssi_monitor_evt(padapter); +#endif + } void rtw_dynamic_chk_wk_hdl(_adapter *padapter) @@ -2768,18 +3243,21 @@ void rtw_dynamic_chk_wk_hdl(_adapter *padapter) rtw_hal_mcc_sw_status_check(padapter); #endif /* CONFIG_MCC_MODE */ + rtw_hal_periodic_tsf_update_chk(padapter); } #ifdef CONFIG_LPS +struct lps_ctrl_wk_parm { + u8 lps_level; +}; -void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type); -void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type) +void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type, u8 *buf) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct lps_ctrl_wk_parm *parm = (struct lps_ctrl_wk_parm *)buf; u8 mstatus; - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) return; @@ -2829,6 +3307,11 @@ void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type) case LPS_CTRL_LEAVE: LPS_Leave(padapter, "LPS_CTRL_LEAVE"); break; + case LPS_CTRL_LEAVE_SET_LEVEL: + LPS_Leave(padapter, "LPS_CTRL_LEAVE_SET_LEVEL"); + if (parm) + pwrpriv->lps_level = parm->lps_level; + break; case LPS_CTRL_LEAVE_CFG80211_PWRMGMT: LPS_Leave(padapter, "CFG80211_PWRMGMT"); break; @@ -2850,48 +3333,85 @@ void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type) } -u8 rtw_lps_ctrl_wk_cmd(_adapter *padapter, u8 lps_ctrl_type, u8 enqueue) +static u8 _rtw_lps_ctrl_wk_cmd(_adapter *adapter, u8 lps_ctrl_type, u8 lps_level, u8 flags) { - struct cmd_obj *ph2c; - struct drvextra_cmd_parm *pdrvextra_cmd_parm; - struct cmd_priv *pcmdpriv = &padapter->cmdpriv; - /* struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); */ + struct cmd_obj *cmdobj; + struct drvextra_cmd_parm *parm; + struct lps_ctrl_wk_parm *wk_parm = NULL; + struct cmd_priv *pcmdpriv = &adapter->cmdpriv; + struct submit_ctx sctx; u8 res = _SUCCESS; + if (lps_ctrl_type == LPS_CTRL_LEAVE_SET_LEVEL) { + wk_parm = rtw_zmalloc(sizeof(*wk_parm)); + if (wk_parm == NULL) { + res = _FAIL; + goto exit; + } + wk_parm->lps_level = lps_level; + } - /* if(!pwrctrlpriv->bLeisurePs) */ - /* return res; */ - - if (enqueue) { - ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); - if (ph2c == NULL) { + if (flags & RTW_CMDF_DIRECTLY) { + /* no need to enqueue, do the cmd hdl directly */ + lps_ctrl_wk_hdl(adapter, lps_ctrl_type, (u8 *)wk_parm); + if (wk_parm) + rtw_mfree(wk_parm, sizeof(*wk_parm)); + } else { + /* need enqueue, prepare cmd_obj and enqueue */ + parm = rtw_zmalloc(sizeof(*parm)); + if (parm == NULL) { + if (wk_parm) + rtw_mfree(wk_parm, sizeof(*wk_parm)); res = _FAIL; goto exit; } - pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); - if (pdrvextra_cmd_parm == NULL) { - rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); + parm->ec_id = LPS_CTRL_WK_CID; + parm->type = lps_ctrl_type; + parm->size = wk_parm ? sizeof(*wk_parm) : 0; + parm->pbuf = (u8 *)wk_parm; + + cmdobj = rtw_zmalloc(sizeof(*cmdobj)); + if (cmdobj == NULL) { + rtw_mfree(parm, sizeof(*parm)); + if (wk_parm) + rtw_mfree(wk_parm, sizeof(*wk_parm)); res = _FAIL; goto exit; } - pdrvextra_cmd_parm->ec_id = LPS_CTRL_WK_CID; - pdrvextra_cmd_parm->type = lps_ctrl_type; - pdrvextra_cmd_parm->size = 0; - pdrvextra_cmd_parm->pbuf = NULL; + init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, GEN_CMD_CODE(_Set_Drv_Extra)); - init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); + if (flags & RTW_CMDF_WAIT_ACK) { + cmdobj->sctx = &sctx; + rtw_sctx_init(&sctx, 2000); + } - res = rtw_enqueue_cmd(pcmdpriv, ph2c); - } else - lps_ctrl_wk_hdl(padapter, lps_ctrl_type); + res = rtw_enqueue_cmd(pcmdpriv, cmdobj); + + if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { + rtw_sctx_wait(&sctx, __func__); + _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); + if (sctx.status == RTW_SCTX_SUBMITTED) + cmdobj->sctx = NULL; + _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); + if (sctx.status != RTW_SCTX_DONE_SUCCESS) + res = _FAIL; + } + } exit: - - return res; +} +u8 rtw_lps_ctrl_wk_cmd(_adapter *adapter, u8 lps_ctrl_type, u8 flags) +{ + return _rtw_lps_ctrl_wk_cmd(adapter, lps_ctrl_type, 0, flags); +} + +u8 rtw_lps_ctrl_leave_set_level_cmd(_adapter *adapter, u8 lps_level, u8 flags) +{ + return _rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_LEAVE_SET_LEVEL, lps_level, flags); } void rtw_dm_in_lps_hdl(_adapter *padapter) @@ -3167,11 +3687,6 @@ void reset_securitypriv_hdl(_adapter *padapter) rtw_reset_securitypriv(padapter); } -void free_assoc_resources_hdl(_adapter *padapter, u8 lock_scanned_queue) -{ - rtw_free_assoc_resources(padapter, lock_scanned_queue); -} - #ifdef CONFIG_P2P u8 p2p_protocol_wk_cmd(_adapter *padapter, int intCmdType) { @@ -3428,6 +3943,96 @@ exit: } +#ifdef CONFIG_DFS +void rtw_dfs_ch_switch_hdl(struct dvobj_priv *dvobj) +{ + struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj); + _adapter *pri_adapter = dvobj_get_primary_adapter(dvobj); + u8 ifbmp_m = rtw_mi_get_ap_mesh_ifbmp(pri_adapter); + u8 ifbmp_s = rtw_mi_get_ld_sta_ifbmp(pri_adapter); + s16 req_ch; + + rtw_hal_macid_sleep_all_used(pri_adapter); + + if (rtw_chset_search_ch(rfctl->channel_set, rfctl->csa_ch) >= 0 + && !rtw_chset_is_ch_non_ocp(rfctl->channel_set, rfctl->csa_ch) + ) { + /* CSA channel available and valid */ + req_ch = rfctl->csa_ch; + RTW_INFO("%s valid CSA ch%u\n", __func__, rfctl->csa_ch); + } else if (ifbmp_m) { + /* no available or valid CSA channel, having AP/MESH ifaces */ + req_ch = REQ_CH_NONE; + RTW_INFO("%s ch sel by AP/MESH ifaces\n", __func__); + } else { + /* no available or valid CSA channel and no AP/MESH ifaces */ + if (!IsSupported24G(dvobj_to_regsty(dvobj)->wireless_mode) + #ifdef CONFIG_DFS_MASTER + || rfctl->radar_detected + #endif + ) + req_ch = 36; + else + req_ch = 1; + RTW_INFO("%s switch to ch%d\n", __func__, req_ch); + } + + /* issue deauth for all asoc STA ifaces */ + if (ifbmp_s) { + _adapter *iface; + int i; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (!iface || !(ifbmp_s & BIT(iface->iface_id))) + continue; + set_fwstate(&iface->mlmepriv, WIFI_OP_CH_SWITCHING); + + /* TODO: true op ch switching */ + issue_deauth(iface, get_bssid(&iface->mlmepriv), WLAN_REASON_DEAUTH_LEAVING); + } + } + +#ifdef CONFIG_AP_MODE + if (ifbmp_m) { + /* trigger channel selection without consideraton of asoc STA ifaces */ + rtw_change_bss_chbw_cmd(dvobj_get_primary_adapter(dvobj), RTW_CMDF_DIRECTLY + , ifbmp_m, ifbmp_s, req_ch, REQ_BW_ORI, REQ_OFFSET_NONE); + } else +#endif + { + /* no AP/MESH iface, switch DFS status and channel directly */ + rtw_warn_on(req_ch <= 0); + #ifdef CONFIG_DFS_MASTER + rtw_dfs_rd_en_decision(pri_adapter, MLME_OPCH_SWITCH, ifbmp_s); + #endif + set_channel_bwmode(pri_adapter, req_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); + } + + /* make asoc STA ifaces disconnect */ + /* TODO: true op ch switching */ + if (ifbmp_s) { + _adapter *iface; + int i; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (!iface || !(ifbmp_s & BIT(iface->iface_id))) + continue; + rtw_disassoc_cmd(iface, 0, RTW_CMDF_DIRECTLY); + rtw_indicate_disconnect(iface, 0, _FALSE); + rtw_free_assoc_resources(iface, _TRUE); + rtw_free_network_queue(iface, _TRUE); + } + } + + rfctl->csa_ch = 0; + + rtw_hal_macid_wakeup_all_used(pri_adapter); + rtw_mi_os_xmit_schedule(pri_adapter); +} +#endif /* CONFIG_DFS */ + #ifdef CONFIG_AP_MODE static void rtw_chk_hi_queue_hdl(_adapter *padapter) @@ -3503,33 +4108,18 @@ exit: } #ifdef CONFIG_DFS_MASTER -u8 rtw_dfs_master_hdl(_adapter *adapter) +u8 rtw_dfs_rd_hdl(_adapter *adapter) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); - struct mlme_priv *mlme = &adapter->mlmepriv; - int i; - if (!rfctl->dfs_master_enabled) + if (!rfctl->radar_detect_enabled) goto exit; - for (i = 0; i < dvobj->iface_nums; i++) { - if (!dvobj->padapters[i]) - continue; - if (check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_AP_STATE | WIFI_MESH_STATE) - && check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_ASOC_STATE)) - break; - } - - if (i >= dvobj->iface_nums) - goto cac_status_chk; - else - adapter = dvobj->padapters[i]; - - if (rtw_get_on_cur_ch_time(adapter) == 0 - || rtw_get_passing_time_ms(rtw_get_on_cur_ch_time(adapter)) < 300 + if (dvobj->oper_channel != rfctl->radar_detect_ch + || rtw_get_passing_time_ms(rtw_get_on_oper_ch_time(adapter)) < 300 ) { - /* offchannel , bypass radar detect */ + /* offchannel, bypass radar detect */ goto cac_status_chk; } @@ -3538,34 +4128,33 @@ u8 rtw_dfs_master_hdl(_adapter *adapter) goto cac_status_chk; } - if (!rfctl->dbg_dfs_master_fake_radar_detect_cnt + if (!rfctl->dbg_dfs_fake_radar_detect_cnt && rtw_odm_radar_detect(adapter) != _TRUE) goto cac_status_chk; - if (!rfctl->dbg_dfs_master_fake_radar_detect_cnt - && rfctl->dbg_dfs_master_radar_detect_trigger_non + if (!rfctl->dbg_dfs_fake_radar_detect_cnt + && rfctl->dbg_dfs_radar_detect_trigger_non ) { /* radar detect debug mode, trigger no mlme flow */ - RTW_INFO(FUNC_ADPT_FMT" radar detected on test mode, trigger no mlme flow\n", FUNC_ADPT_ARG(adapter)); + RTW_INFO("%s radar detected on test mode, trigger no mlme flow\n", __func__); goto cac_status_chk; } - - if (rfctl->dbg_dfs_master_fake_radar_detect_cnt != 0) { - RTW_INFO(FUNC_ADPT_FMT" fake radar detected, cnt:%d\n", FUNC_ADPT_ARG(adapter) - , rfctl->dbg_dfs_master_fake_radar_detect_cnt); - rfctl->dbg_dfs_master_fake_radar_detect_cnt--; + if (rfctl->dbg_dfs_fake_radar_detect_cnt != 0) { + RTW_INFO("%s fake radar detected, cnt:%d\n", __func__ + , rfctl->dbg_dfs_fake_radar_detect_cnt); + rfctl->dbg_dfs_fake_radar_detect_cnt--; } else - RTW_INFO(FUNC_ADPT_FMT" radar detected\n", FUNC_ADPT_ARG(adapter)); + RTW_INFO("%s radar detected\n", __func__); + + rfctl->radar_detected = 1; rtw_chset_update_non_ocp(rfctl->channel_set , rfctl->radar_detect_ch, rfctl->radar_detect_bw, rfctl->radar_detect_offset); - rfctl->radar_detected = 1; - /* trigger channel selection */ - rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_DIRECTLY, -1, adapter->mlmepriv.ori_bw, -1); + rtw_dfs_ch_switch_hdl(dvobj); - if (rfctl->dfs_master_enabled) + if (rfctl->radar_detect_enabled) goto set_timer; goto exit; @@ -3601,40 +4190,40 @@ cac_status_chk: } set_timer: - /* TODO: move timer to rfctl */ - _set_timer(&mlme->dfs_master_timer, DFS_MASTER_TIMER_MS); + _set_timer(&rfctl->radar_detect_timer + , rtw_odm_radar_detect_polling_int_ms(dvobj)); exit: return H2C_SUCCESS; } -u8 rtw_dfs_master_cmd(_adapter *adapter, bool enqueue) +u8 rtw_dfs_rd_cmd(_adapter *adapter, bool enqueue) { struct cmd_obj *cmdobj; - struct drvextra_cmd_parm *pdrvextra_cmd_parm; - struct cmd_priv *pcmdpriv = &adapter->cmdpriv; + struct drvextra_cmd_parm *parm; + struct cmd_priv *cmdpriv = &adapter->cmdpriv; u8 res = _FAIL; if (enqueue) { - cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); + cmdobj = rtw_zmalloc(sizeof(struct cmd_obj)); if (cmdobj == NULL) goto exit; - pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); - if (pdrvextra_cmd_parm == NULL) { - rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); + parm = rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); + if (parm == NULL) { + rtw_mfree(cmdobj, sizeof(struct cmd_obj)); goto exit; } - pdrvextra_cmd_parm->ec_id = DFS_MASTER_WK_CID; - pdrvextra_cmd_parm->type = 0; - pdrvextra_cmd_parm->size = 0; - pdrvextra_cmd_parm->pbuf = NULL; + parm->ec_id = DFS_RADAR_DETECT_WK_CID; + parm->type = 0; + parm->size = 0; + parm->pbuf = NULL; - init_h2fwcmd_w_parm_no_rsp(cmdobj, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); - res = rtw_enqueue_cmd(pcmdpriv, cmdobj); + init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, GEN_CMD_CODE(_Set_Drv_Extra)); + res = rtw_enqueue_cmd(cmdpriv, cmdobj); } else { - rtw_dfs_master_hdl(adapter); + rtw_dfs_rd_hdl(adapter); res = _SUCCESS; } @@ -3642,24 +4231,25 @@ exit: return res; } -void rtw_dfs_master_timer_hdl(void *ctx) +void rtw_dfs_rd_timer_hdl(void *ctx) { - _adapter *adapter = (_adapter *)ctx; + struct rf_ctl_t *rfctl = (struct rf_ctl_t *)ctx; + struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); - rtw_dfs_master_cmd(adapter, _TRUE); + rtw_dfs_rd_cmd(dvobj_get_primary_adapter(dvobj), _TRUE); } -void rtw_dfs_master_enable(_adapter *adapter, u8 ch, u8 bw, u8 offset) +static void rtw_dfs_rd_enable(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, bool bypass_cac) { - struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); + struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); + _adapter *adapter = dvobj_get_primary_adapter(dvobj); - /* TODO: move timer to rfctl */ - adapter = GET_PRIMARY_ADAPTER(adapter); + RTW_INFO("%s on %u,%u,%u\n", __func__, ch, bw, offset); - RTW_INFO(FUNC_ADPT_FMT" on %u,%u,%u\n", FUNC_ADPT_ARG(adapter), ch, bw, offset); - - if (rtw_is_cac_reset_needed(adapter, ch, bw, offset) == _TRUE) - rtw_reset_cac(adapter, ch, bw, offset); + if (bypass_cac) + rfctl->cac_start_time = rfctl->cac_end_time = RTW_CAC_STOPPED; + else if (rtw_is_cac_reset_needed(rfctl, ch, bw, offset) == _TRUE) + rtw_reset_cac(rfctl, ch, bw, offset); rfctl->radar_detect_by_others = _FALSE; rfctl->radar_detect_ch = ch; @@ -3671,10 +4261,14 @@ void rtw_dfs_master_enable(_adapter *adapter, u8 ch, u8 bw, u8 offset) if (IS_CH_WAITING(rfctl)) StopTxBeacon(adapter); - if (!rfctl->dfs_master_enabled) { - RTW_INFO(FUNC_ADPT_FMT" set dfs_master_enabled\n", FUNC_ADPT_ARG(adapter)); - rfctl->dfs_master_enabled = 1; - _set_timer(&adapter->mlmepriv.dfs_master_timer, DFS_MASTER_TIMER_MS); + if (!rfctl->radar_detect_enabled) { + RTW_INFO("%s set radar_detect_enabled\n", __func__); + rfctl->radar_detect_enabled = 1; + #ifdef CONFIG_LPS + LPS_Leave(adapter, "RADAR_DETECT_EN"); + #endif + _set_timer(&rfctl->radar_detect_timer + , rtw_odm_radar_detect_polling_int_ms(dvobj)); if (rtw_rfctl_overlap_radar_detect_ch(rfctl)) { if (IS_CH_WAITING(rfctl)) { @@ -3687,27 +4281,24 @@ void rtw_dfs_master_enable(_adapter *adapter, u8 ch, u8 bw, u8 offset) } } -void rtw_dfs_master_disable(_adapter *adapter, u8 ch, u8 bw, u8 offset, bool by_others) +static void rtw_dfs_rd_disable(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, bool by_others) { - struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); - - /* TODO: move timer to rfctl */ - adapter = GET_PRIMARY_ADAPTER(adapter); + _adapter *adapter = dvobj_get_primary_adapter(rfctl_to_dvobj(rfctl)); rfctl->radar_detect_by_others = by_others; - if (rfctl->dfs_master_enabled) { + if (rfctl->radar_detect_enabled) { bool overlap_radar_detect_ch = rtw_rfctl_overlap_radar_detect_ch(rfctl); - RTW_INFO(FUNC_ADPT_FMT" clear dfs_master_enabled\n", FUNC_ADPT_ARG(adapter)); + RTW_INFO("%s clear radar_detect_enabled\n", __func__); - rfctl->dfs_master_enabled = 0; + rfctl->radar_detect_enabled = 0; rfctl->radar_detected = 0; rfctl->radar_detect_ch = 0; rfctl->radar_detect_bw = 0; rfctl->radar_detect_offset = 0; rfctl->cac_start_time = rfctl->cac_end_time = RTW_CAC_STOPPED; - _cancel_timer_ex(&adapter->mlmepriv.dfs_master_timer); + _cancel_timer_ex(&rfctl->radar_detect_timer); if (rtw_mi_check_fwstate(adapter, WIFI_UNDER_LINKING|WIFI_SITE_MONITOR) == _FALSE) { ResumeTxBeacon(adapter); @@ -3729,71 +4320,75 @@ void rtw_dfs_master_disable(_adapter *adapter, u8 ch, u8 bw, u8 offset, bool by_ } } -void rtw_dfs_master_status_apply(_adapter *adapter, u8 self_action) +void rtw_dfs_rd_en_decision(_adapter *adapter, u8 mlme_act, u8 excl_ifbmp) { + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; struct mi_state mstate; + u8 ifbmp; u8 u_ch, u_bw, u_offset; bool ld_sta_in_dfs = _FALSE; bool sync_ch = _FALSE; /* _FALSE: asign channel directly */ bool needed = _FALSE; - rtw_mi_status_no_self(adapter, &mstate); - rtw_mi_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset); - if (u_ch != 0) - sync_ch = _TRUE; + if (mlme_act == MLME_OPCH_SWITCH + || mlme_act == MLME_ACTION_NONE + ) { + ifbmp = ~excl_ifbmp; + rtw_mi_status_by_ifbmp(dvobj, ifbmp, &mstate); + rtw_mi_get_ch_setting_union_by_ifbmp(dvobj, ifbmp, &u_ch, &u_bw, &u_offset); + } else { + ifbmp = ~excl_ifbmp & ~BIT(adapter->iface_id); + rtw_mi_status_by_ifbmp(dvobj, ifbmp, &mstate); + rtw_mi_get_ch_setting_union_by_ifbmp(dvobj, ifbmp, &u_ch, &u_bw, &u_offset); + if (u_ch != 0) + sync_ch = _TRUE; - switch (self_action) { - case MLME_STA_CONNECTING: - MSTATE_STA_LG_NUM(&mstate)++; - break; - case MLME_STA_CONNECTED: - MSTATE_STA_LD_NUM(&mstate)++; - break; - case MLME_STA_DISCONNECTED: - break; + switch (mlme_act) { + case MLME_STA_CONNECTING: + MSTATE_STA_LG_NUM(&mstate)++; + break; + case MLME_STA_CONNECTED: + MSTATE_STA_LD_NUM(&mstate)++; + break; + case MLME_STA_DISCONNECTED: + break; #ifdef CONFIG_AP_MODE - case MLME_AP_STARTED: - MSTATE_AP_NUM(&mstate)++; - break; - case MLME_AP_STOPPED: - break; + case MLME_AP_STARTED: + MSTATE_AP_NUM(&mstate)++; + break; + case MLME_AP_STOPPED: + break; #endif #ifdef CONFIG_RTW_MESH - case MLME_MESH_STARTED: - MSTATE_MESH_NUM(&mstate)++; - break; - case MLME_MESH_STOPPED: - break; + case MLME_MESH_STARTED: + MSTATE_MESH_NUM(&mstate)++; + break; + case MLME_MESH_STOPPED: + break; #endif - case MLME_ACTION_NONE: - /* caller without effect of decision */ - break; - default: - rtw_warn_on(1); - break; - } - - if (sync_ch == _TRUE) { - if (!rtw_is_chbw_grouped(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset, u_ch, u_bw, u_offset)) { - RTW_INFO(FUNC_ADPT_FMT" can't sync %u,%u,%u with %u,%u,%u\n", FUNC_ADPT_ARG(adapter) - , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset, u_ch, u_bw, u_offset); - goto apply; + default: + rtw_warn_on(1); + break; } - rtw_sync_chbw(&mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset - , &u_ch, &u_bw, &u_offset); - } else { - u_ch = mlmeext->cur_channel; - u_bw = mlmeext->cur_bwmode; - u_offset = mlmeext->cur_ch_offset; - } + if (sync_ch == _TRUE) { + if (!MLME_IS_OPCH_SW(adapter)) { + if (!rtw_is_chbw_grouped(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset, u_ch, u_bw, u_offset)) { + RTW_INFO(FUNC_ADPT_FMT" can't sync %u,%u,%u with %u,%u,%u\n", FUNC_ADPT_ARG(adapter) + , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset, u_ch, u_bw, u_offset); + goto apply; + } - if (MSTATE_STA_LD_NUM(&mstate) > 0) { - /* rely on AP on which STA mode connects */ - if (rtw_is_dfs_chbw(u_ch, u_bw, u_offset)) - ld_sta_in_dfs = _TRUE; - goto apply; + rtw_sync_chbw(&mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset + , &u_ch, &u_bw, &u_offset); + } + } else { + u_ch = mlmeext->cur_channel; + u_bw = mlmeext->cur_bwmode; + u_offset = mlmeext->cur_ch_offset; + } } if (MSTATE_STA_LG_NUM(&mstate) > 0) { @@ -3801,6 +4396,19 @@ void rtw_dfs_master_status_apply(_adapter *adapter, u8 self_action) goto apply; } + if (MSTATE_STA_LD_NUM(&mstate) > 0) { + if (rtw_is_dfs_chbw(u_ch, u_bw, u_offset)) { + /* + * if operate as slave w/o radar detect, + * rely on AP on which STA mode connects + */ + if (IS_DFS_SLAVE_WITH_RD(rfctl) && !rtw_odm_dfs_domain_unknown(dvobj)) + needed = _TRUE; + ld_sta_in_dfs = _TRUE; + } + goto apply; + } + if (!MSTATE_AP_NUM(&mstate) && !MSTATE_MESH_NUM(&mstate)) { /* No working AP/Mesh mode */ goto apply; @@ -3811,17 +4419,46 @@ void rtw_dfs_master_status_apply(_adapter *adapter, u8 self_action) apply: - RTW_INFO(FUNC_ADPT_FMT" needed:%d, self_action:%u\n" - , FUNC_ADPT_ARG(adapter), needed, self_action); + RTW_INFO(FUNC_ADPT_FMT" needed:%d, mlme_act:%u, excl_ifbmp:0x%02x\n" + , FUNC_ADPT_ARG(adapter), needed, mlme_act, excl_ifbmp); RTW_INFO(FUNC_ADPT_FMT" ld_sta_num:%u, lg_sta_num:%u, ap_num:%u, mesh_num:%u, %u,%u,%u\n" , FUNC_ADPT_ARG(adapter), MSTATE_STA_LD_NUM(&mstate), MSTATE_STA_LG_NUM(&mstate) , MSTATE_AP_NUM(&mstate), MSTATE_MESH_NUM(&mstate) , u_ch, u_bw, u_offset); if (needed == _TRUE) - rtw_dfs_master_enable(adapter, u_ch, u_bw, u_offset); + rtw_dfs_rd_enable(rfctl, u_ch, u_bw, u_offset, ld_sta_in_dfs); else - rtw_dfs_master_disable(adapter, u_ch, u_bw, u_offset, ld_sta_in_dfs); + rtw_dfs_rd_disable(rfctl, u_ch, u_bw, u_offset, ld_sta_in_dfs); +} + +u8 rtw_dfs_rd_en_decision_cmd(_adapter *adapter) +{ + struct cmd_obj *cmdobj; + struct drvextra_cmd_parm *parm; + struct cmd_priv *cmdpriv = &adapter->cmdpriv; + u8 res = _FAIL; + + cmdobj = rtw_zmalloc(sizeof(struct cmd_obj)); + if (cmdobj == NULL) + goto exit; + + parm = rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); + if (parm == NULL) { + rtw_mfree(cmdobj, sizeof(struct cmd_obj)); + goto exit; + } + + parm->ec_id = DFS_RADAR_DETECT_EN_DEC_WK_CID; + parm->type = 0; + parm->size = 0; + parm->pbuf = NULL; + + init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, GEN_CMD_CODE(_Set_Drv_Extra)); + res = rtw_enqueue_cmd(cmdpriv, cmdobj); + +exit: + return res; } #endif /* CONFIG_DFS_MASTER */ @@ -3975,6 +4612,48 @@ u8 rtw_btinfo_cmd(_adapter *adapter, u8 *buf, u16 len) res = rtw_enqueue_cmd(pcmdpriv, ph2c); +exit: + return res; +} + +static void rtw_btc_reduce_wl_txpwr_hdl(_adapter *adapter, u32 pwr_lvl) +{ + rtw_btcoex_set_reduced_wl_pwr_lvl(adapter, pwr_lvl); + rtw_btcoex_do_reduce_wl_pwr_lvl(adapter); + + RTW_INFO(FUNC_ADPT_FMT ": BTC reduce WL TxPwr %d dB!\n", + FUNC_ADPT_ARG(adapter), pwr_lvl); +} + +u8 rtw_btc_reduce_wl_txpwr_cmd(_adapter *adapter, u32 val) +{ + struct cmd_obj *pcmdobj; + struct drvextra_cmd_parm *pdrvextra_cmd_parm; + struct cmd_priv *pcmdpriv = &adapter->cmdpriv; + u8 res = _SUCCESS; + + pcmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); + if (pcmdobj == NULL) { + res = _FAIL; + goto exit; + } + + pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); + if (pdrvextra_cmd_parm == NULL) { + rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); + res = _FAIL; + goto exit; + } + + pdrvextra_cmd_parm->ec_id = BTC_REDUCE_WL_TXPWR_CID; + pdrvextra_cmd_parm->type = val; + pdrvextra_cmd_parm->size = 0; + pdrvextra_cmd_parm->pbuf = NULL; + + init_h2fwcmd_w_parm_no_rsp(pcmdobj, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); + + res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); + exit: return res; } @@ -4030,25 +4709,39 @@ static s32 rtw_mp_cmd_hdl(_adapter *padapter, u8 mp_cmd_id) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); int ret = H2C_SUCCESS; uint status = _SUCCESS; - u8 rfreg0; if (mp_cmd_id == MP_START) { if (padapter->registrypriv.mp_mode == 0) { rtw_intf_stop(padapter); rtw_hal_deinit(padapter); padapter->registrypriv.mp_mode = 1; +#if (CONFIG_BTCOEX_SUPPORT_WIFI_ONLY_CFG == 1) + padapter->mppriv.CureFuseBTCoex = pHalData->EEPROMBluetoothCoexist; + pHalData->EEPROMBluetoothCoexist = _FALSE; +#endif #ifdef CONFIG_RF_POWER_TRIM - if (!IS_HARDWARE_TYPE_8814A(padapter) && !IS_HARDWARE_TYPE_8822B(padapter)) { + if (!IS_HARDWARE_TYPE_8814A(padapter) && !IS_HARDWARE_TYPE_8822B(padapter) && !IS_HARDWARE_TYPE_8822C(padapter)) { padapter->registrypriv.RegPwrTrimEnable = 1; rtw_hal_read_chip_info(padapter); } #endif /*CONFIG_RF_POWER_TRIM*/ rtw_reset_drv_sw(padapter); +#ifdef CONFIG_NEW_NETDEV_HDL + if (!rtw_is_hw_init_completed(padapter)) { + status = rtw_hal_init(padapter); + if (status == _FAIL) { + ret = H2C_REJECTED; + goto exit; + } + rtw_hal_iface_init(padapter); + } +#else status = rtw_hal_init(padapter); if (status == _FAIL) { ret = H2C_REJECTED; goto exit; } +#endif /*CONFIG_NEW_NETDEV_HDL*/ #ifndef RTW_HALMAC rtw_intf_start(padapter); #endif /* !RTW_HALMAC */ @@ -4094,12 +4787,26 @@ static s32 rtw_mp_cmd_hdl(_adapter *padapter, u8 mp_cmd_id) rtw_intf_stop(padapter); rtw_hal_deinit(padapter); padapter->registrypriv.mp_mode = 0; +#if (CONFIG_BTCOEX_SUPPORT_WIFI_ONLY_CFG == 1) + pHalData->EEPROMBluetoothCoexist = padapter->mppriv.CureFuseBTCoex; +#endif rtw_reset_drv_sw(padapter); +#ifdef CONFIG_NEW_NETDEV_HDL + if (!rtw_is_hw_init_completed(padapter)) { + status = rtw_hal_init(padapter); + if (status == _FAIL) { + ret = H2C_REJECTED; + goto exit; + } + rtw_hal_iface_init(padapter); + } +#else status = rtw_hal_init(padapter); if (status == _FAIL) { ret = H2C_REJECTED; goto exit; } +#endif /*CONFIG_NEW_NETDEV_HDL*/ #ifndef RTW_HALMAC rtw_intf_start(padapter); #endif /* !RTW_HALMAC */ @@ -4747,7 +5454,7 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) break; #ifdef CONFIG_LPS case LPS_CTRL_WK_CID: - lps_ctrl_wk_hdl(padapter, (u8)pdrvextra_cmd->type); + lps_ctrl_wk_hdl(padapter, (u8)pdrvextra_cmd->type, pdrvextra_cmd->pbuf); break; case DM_IN_LPS_WK_CID: rtw_dm_in_lps_hdl(padapter); @@ -4784,11 +5491,6 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) case CHECK_HIQ_WK_CID: rtw_chk_hi_queue_hdl(padapter); break; -#endif -#ifdef CONFIG_INTEL_WIDI - case INTEl_WIDI_WK_CID: - intel_widi_wk_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf); - break; #endif /* add for CONFIG_IEEE80211W, none 11w can use it */ case RESET_SECURITYPRIV: @@ -4827,10 +5529,16 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) case BTINFO_WK_CID: rtw_btinfo_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->size); break; + case BTC_REDUCE_WL_TXPWR_CID: + rtw_btc_reduce_wl_txpwr_hdl(padapter, pdrvextra_cmd->type); + break; #endif #ifdef CONFIG_DFS_MASTER - case DFS_MASTER_WK_CID: - rtw_dfs_master_hdl(padapter); + case DFS_RADAR_DETECT_WK_CID: + rtw_dfs_rd_hdl(padapter); + break; + case DFS_RADAR_DETECT_EN_DEC_WK_CID: + rtw_dfs_rd_en_decision(padapter, MLME_ACTION_NONE, 0); break; #endif case SESSION_TRACKER_WK_CID: @@ -4839,6 +5547,9 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) case EN_HW_UPDATE_TSF_WK_CID: rtw_hal_set_hwreg(padapter, HW_VAR_EN_HW_UPDATE_TSF, NULL); break; + case PERIOD_TSF_UPDATE_END_WK_CID: + rtw_hal_periodic_tsf_update_chk(padapter); + break; case TEST_H2C_CID: rtw_hal_fill_h2c_cmd(padapter, pdrvextra_cmd->pbuf[0], pdrvextra_cmd->size - 1, &pdrvextra_cmd->pbuf[1]); break; @@ -4865,8 +5576,8 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) break; #endif /* CONFIG_IOCTL_CFG80211 */ #ifdef CONFIG_MCC_MODE - case MCC_SET_DURATION_WK_CID: - ret = rtw_set_mcc_duration_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf); + case MCC_CMD_WK_CID: + ret = rtw_mcc_cmd_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf); break; #endif /* CONFIG_MCC_MODE */ #if defined(CONFIG_RTW_MESH) && defined(RTW_PER_CMD_SUPPORT_FW) @@ -4874,6 +5585,17 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) ret = rtw_req_per_cmd_hdl(padapter); break; #endif +#ifdef CONFIG_SUPPORT_STATIC_SMPS + case SSMPS_WK_CID : + rtw_ssmps_wk_hdl(padapter, (struct ssmps_cmd_parm *)pdrvextra_cmd->pbuf); + break; +#endif +#ifdef CONFIG_CTRL_TXSS_BY_TP + case TXSS_WK_CID : + rtw_ctrl_txss_wk_hdl(padapter, (struct txss_cmd_parm *)pdrvextra_cmd->pbuf); + break; +#endif + default: break; } @@ -4953,7 +5675,6 @@ void rtw_joinbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd) void rtw_create_ibss_post_hdl(_adapter *padapter, int status) { _irqL irqL; - struct sta_info *psta = NULL; struct wlan_network *pwlan = NULL; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; WLAN_BSSID_EX *pdev_network = &padapter->registrypriv.dev_network; @@ -5000,7 +5721,6 @@ void rtw_create_ibss_post_hdl(_adapter *padapter, int status) createbss_cmd_fail: _exit_critical_bh(&pmlmepriv->lock, &irqL); -exit: return; } diff --git a/core/rtw_debug.c b/core/rtw_debug.c index d9752bb..0ccbf72 100644 --- a/core/rtw_debug.c +++ b/core/rtw_debug.c @@ -95,7 +95,9 @@ void dump_drv_cfg(void *sel) #endif RTW_PRINT_SEL(sel, "RTW_DEF_MODULE_REGULATORY_CERT=0x%02x\n", RTW_DEF_MODULE_REGULATORY_CERT); + RTW_PRINT_SEL(sel, "CONFIG_TXPWR_BY_RATE=%d\n", CONFIG_TXPWR_BY_RATE); RTW_PRINT_SEL(sel, "CONFIG_TXPWR_BY_RATE_EN=%d\n", CONFIG_TXPWR_BY_RATE_EN); + RTW_PRINT_SEL(sel, "CONFIG_TXPWR_LIMIT=%d\n", CONFIG_TXPWR_LIMIT); RTW_PRINT_SEL(sel, "CONFIG_TXPWR_LIMIT_EN=%d\n", CONFIG_TXPWR_LIMIT_EN); @@ -136,6 +138,10 @@ void dump_drv_cfg(void *sel) RTW_PRINT_SEL(sel, "CONFIG_RTW_WIFI_HAL\n"); #endif +#ifdef CONFIG_RTW_TPT_MODE + RTW_PRINT_SEL(sel, "CONFIG_RTW_TPT_MODE\n"); +#endif + #ifdef CONFIG_USB_HCI #ifdef CONFIG_SUPPORT_USB_INT RTW_PRINT_SEL(sel, "CONFIG_SUPPORT_USB_INT\n"); @@ -170,11 +176,35 @@ void dump_drv_cfg(void *sel) #ifdef CONFIG_RX_AGGREGATION RTW_PRINT_SEL(sel, "CONFIG_RX_AGGREGATION\n"); #endif +#ifdef RTW_XMIT_THREAD_HIGH_PRIORITY + RTW_PRINT_SEL(sel, "RTW_XMIT_THREAD_HIGH_PRIORITY\n"); +#endif +#ifdef RTW_XMIT_THREAD_HIGH_PRIORITY_AGG + RTW_PRINT_SEL(sel, "RTW_XMIT_THREAD_HIGH_PRIORITY_AGG\n"); +#endif #endif /*CONFIG_SDIO_HCI*/ #ifdef CONFIG_PCI_HCI #endif + RTW_PRINT_SEL(sel, "CONFIG_IFACE_NUMBER = %d\n", CONFIG_IFACE_NUMBER); +#ifdef CONFIG_MI_WITH_MBSSID_CAM + RTW_PRINT_SEL(sel, "CONFIG_MI_WITH_MBSSID_CAM\n"); +#endif +#ifdef CONFIG_SWTIMER_BASED_TXBCN + RTW_PRINT_SEL(sel, "CONFIG_SWTIMER_BASED_TXBCN\n"); +#endif +#ifdef CONFIG_FW_HANDLE_TXBCN + RTW_PRINT_SEL(sel, "CONFIG_FW_HANDLE_TXBCN\n"); + RTW_PRINT_SEL(sel, "CONFIG_LIMITED_AP_NUM = %d\n", CONFIG_LIMITED_AP_NUM); +#endif +#ifdef CONFIG_CLIENT_PORT_CFG + RTW_PRINT_SEL(sel, "CONFIG_CLIENT_PORT_CFG\n"); +#endif +#ifdef CONFIG_PCI_TX_POLLING + RTW_PRINT_SEL(sel, "CONFIG_PCI_TX_POLLING\n"); +#endif + RTW_PRINT_SEL(sel, "\n=== XMIT-INFO ===\n"); RTW_PRINT_SEL(sel, "NR_XMITFRAME = %d\n", NR_XMITFRAME); RTW_PRINT_SEL(sel, "NR_XMITBUFF = %d\n", NR_XMITBUFF); @@ -264,8 +294,7 @@ void mac_reg_dump(void *sel, _adapter *adapter) } #endif /* CONFIG_RTL8814A */ - -#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) +#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) ||defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8822C) for (i = 0x1000; i < 0x1800; i += 4) { if (j % 4 == 1) RTW_PRINT_SEL(sel, "0x%04x", i); @@ -273,7 +302,8 @@ void mac_reg_dump(void *sel, _adapter *adapter) if ((j++) % 4 == 0) _RTW_PRINT_SEL(sel, "\n"); } -#endif /* CONFIG_RTL8822B */ +#endif /* CONFIG_RTL8822B or 8821c or 8192f*/ + } void bb_reg_dump(void *sel, _adapter *adapter) @@ -289,7 +319,7 @@ void bb_reg_dump(void *sel, _adapter *adapter) _RTW_PRINT_SEL(sel, "\n"); } -#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) +#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) for (i = 0x1800; i < 0x2000; i += 4) { if (j % 4 == 1) RTW_PRINT_SEL(sel, "0x%04x", i); @@ -298,11 +328,47 @@ void bb_reg_dump(void *sel, _adapter *adapter) _RTW_PRINT_SEL(sel, "\n"); } #endif /* CONFIG_RTL8822B */ + +#if defined(CONFIG_RTL8822C) + for (i = 0x2c00; i < 0x2c60; i += 4) { + if (j % 4 == 1) + RTW_PRINT_SEL(sel, "0x%04x", i); + _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); + if ((j++) % 4 == 0) + _RTW_PRINT_SEL(sel, "\n"); + } + + for (i = 0x2d00; i < 0x2df0; i += 4) { + if (j % 4 == 1) + RTW_PRINT_SEL(sel, "0x%04x", i); + _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); + if ((j++) % 4 == 0) + _RTW_PRINT_SEL(sel, "\n"); + } + + for (i = 0x4000; i < 0x4060; i += 4) { + if (j % 4 == 1) + RTW_PRINT_SEL(sel, "0x%04x", i); + _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); + if ((j++) % 4 == 0) + _RTW_PRINT_SEL(sel, "\n"); + } + + for (i = 0x4100; i < 0x4200; i += 4) { + if (j % 4 == 1) + RTW_PRINT_SEL(sel, "0x%04x", i); + _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); + if ((j++) % 4 == 0) + _RTW_PRINT_SEL(sel, "\n"); + } + +#endif /* CONFIG_RTL8822C */ + } void bb_reg_dump_ex(void *sel, _adapter *adapter) { - int i, j = 1; + int i; RTW_PRINT_SEL(sel, "======= BB REG =======\n"); for (i = 0x800; i < 0x1000; i += 4) { @@ -311,7 +377,7 @@ void bb_reg_dump_ex(void *sel, _adapter *adapter) _RTW_PRINT_SEL(sel, "\n"); } -#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) +#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) for (i = 0x1800; i < 0x2000; i += 4) { RTW_PRINT_SEL(sel, "0x%04x", i); _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); @@ -322,16 +388,11 @@ void bb_reg_dump_ex(void *sel, _adapter *adapter) void rf_reg_dump(void *sel, _adapter *adapter) { + HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter); int i, j = 1, path; u32 value; u8 rf_type = 0; - u8 path_nums = 0; - - rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); - if ((RF_1T2R == rf_type) || (RF_1T1R == rf_type)) - path_nums = 1; - else - path_nums = 2; + u8 path_nums = hal->NumTotalRFPath; RTW_PRINT_SEL(sel, "======= RF REG =======\n"); @@ -421,11 +482,25 @@ void dump_adapters_status(void *sel, struct dvobj_priv *dvobj) int i; _adapter *iface; u8 u_ch, u_bw, u_offset; - +#if (defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN)) || defined(CONFIG_CLIENT_PORT_CFG) + char str_val[64] = {'\0'}; +#endif dump_mi_status(sel, dvobj); +#if defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN) + RTW_PRINT_SEL(sel, "[AP] LIMITED_AP_NUM:%d\n", CONFIG_LIMITED_AP_NUM); + RTW_PRINT_SEL(sel, "[AP] vap_map:0x%02x\n", dvobj->vap_map); +#endif +#ifdef CONFIG_HW_P0_TSF_SYNC + RTW_PRINT_SEL(sel, "[AP] p0 tsf sync port = %d\n", dvobj->p0_tsf.sync_port); + RTW_PRINT_SEL(sel, "[AP] p0 tsf timer offset = %d\n", dvobj->p0_tsf.offset); +#endif +#ifdef CONFIG_CLIENT_PORT_CFG + RTW_PRINT_SEL(sel, "[CLT] clt_num = %d\n", dvobj->clt_port.num); + RTW_PRINT_SEL(sel, "[CLT] clt_map = 0x%02x\n", dvobj->clt_port.bmp); +#endif #ifdef CONFIG_FW_MULTI_PORT_SUPPORT - RTW_PRINT_SEL(sel, "default port id:%d\n\n", dvobj->default_port_id); + RTW_PRINT_SEL(sel, "[MI] default port id:%d\n\n", dvobj->dft.port_id); #endif /* CONFIG_FW_MULTI_PORT_SUPPORT */ RTW_PRINT_SEL(sel, "dev status:%s%s\n\n" @@ -450,14 +525,40 @@ void dump_adapters_status(void *sel, struct dvobj_priv *dvobj) #define P2P_INFO_VALUE_FMT "" #define P2P_INFO_VALUE_ARG #define P2P_INFO_DASH +#endif + +#ifdef DBG_TSF_UPDATE +#define TSF_PAUSE_TIME_TITLE_FMT " %-5s" +#define TSF_PAUSE_TIME_TITLE_ARG , "tsfup" +#define TSF_PAUSE_TIME_VALUE_FMT " %5d" +#define TSF_PAUSE_TIME_VALUE_ARG , ((iface->mlmeextpriv.tsf_update_required && iface->mlmeextpriv.tsf_update_pause_stime) ? (rtw_get_passing_time_ms(iface->mlmeextpriv.tsf_update_pause_stime) > 99999 ? 99999 : rtw_get_passing_time_ms(iface->mlmeextpriv.tsf_update_pause_stime)) : 0) +#else +#define TSF_PAUSE_TIME_TITLE_FMT "" +#define TSF_PAUSE_TIME_TITLE_ARG +#define TSF_PAUSE_TIME_VALUE_FMT "" +#define TSF_PAUSE_TIME_VALUE_ARG +#endif + +#if (defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN)) || defined(CONFIG_CLIENT_PORT_CFG) +#define INFO_FMT " %-4s" +#define INFO_ARG , "info" +#define INFO_CNT_FMT " %-20s" +#define INFO_CNT_ARG , str_val +#else +#define INFO_FMT "" +#define INFO_ARG +#define INFO_CNT_FMT "" +#define INFO_CNT_ARG #endif RTW_PRINT_SEL(sel, "%-2s %-15s %c %-3s %-3s %-3s %-17s %-4s %-7s" P2P_INFO_TITLE_FMT - " %s\n" + TSF_PAUSE_TIME_TITLE_FMT + " %s"INFO_FMT"\n" , "id", "ifname", ' ', "bup", "nup", "ncd", "macaddr", "port", "ch" P2P_INFO_TITLE_ARG - , "status"); + TSF_PAUSE_TIME_TITLE_ARG + , "status"INFO_ARG); RTW_PRINT_SEL(sel, "---------------------------------------------------------------" P2P_INFO_DASH @@ -466,21 +567,64 @@ void dump_adapters_status(void *sel, struct dvobj_priv *dvobj) for (i = 0; i < dvobj->iface_nums; i++) { iface = dvobj->padapters[i]; if (iface) { + #if (defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN)) || defined(CONFIG_CLIENT_PORT_CFG) + _rtw_memset(&str_val, '\0', sizeof(str_val)); + #endif + #if defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN) + if (MLME_IS_AP(iface) || MLME_IS_MESH(iface)) { + u8 len; + char *p = str_val; + char tmp_str[10] = {'\0'}; + + len = snprintf(tmp_str, sizeof(tmp_str), "%s", "ap_id:"); + strncpy(p, tmp_str, len); + p += len; + _rtw_memset(&tmp_str, '\0', sizeof(tmp_str)); + #ifdef DBG_HW_PORT + len = snprintf(tmp_str, sizeof(tmp_str), "%d (%d,%d)", iface->vap_id, iface->hw_port, iface->client_port); + #else + len = snprintf(tmp_str, sizeof(tmp_str), "%d", iface->vap_id); + #endif + strncpy(p, tmp_str, len); + } + #endif + #ifdef CONFIG_CLIENT_PORT_CFG + if (MLME_IS_STA(iface)) { + u8 len; + char *p = str_val; + char tmp_str[10] = {'\0'}; + + len = snprintf(tmp_str, sizeof(tmp_str), "%s", "c_pid:"); + strncpy(p, tmp_str, len); + p += len; + _rtw_memset(&tmp_str, '\0', sizeof(tmp_str)); + #ifdef DBG_HW_PORT + len = snprintf(tmp_str, sizeof(tmp_str), "%d (%d,%d)", iface->client_port, iface->hw_port, iface->client_port); + #else + len = snprintf(tmp_str, sizeof(tmp_str), "%d", iface->client_port); + #endif + strncpy(p, tmp_str, len); + } + #endif + RTW_PRINT_SEL(sel, "%2d %-15s %c %3u %3u %3u "MAC_FMT" %4hhu %3u,%u,%u" P2P_INFO_VALUE_FMT - " "MLME_STATE_FMT"\n" + TSF_PAUSE_TIME_VALUE_FMT + " "MLME_STATE_FMT" " INFO_CNT_FMT"\n" , i, iface->registered ? ADPT_ARG(iface) : NULL , iface->registered ? 'R' : ' ' , iface->bup , iface->netif_up , iface->net_closed , MAC_ARG(adapter_mac_addr(iface)) - , get_hw_port(iface) + , rtw_hal_get_port(iface) , iface->mlmeextpriv.cur_channel , iface->mlmeextpriv.cur_bwmode , iface->mlmeextpriv.cur_ch_offset P2P_INFO_VALUE_ARG + TSF_PAUSE_TIME_VALUE_ARG , MLME_STATE_ARG(iface) + INFO_CNT_ARG ); } } @@ -517,24 +661,11 @@ void dump_adapters_status(void *sel, struct dvobj_priv *dvobj) else { u32 non_ocp_ms; u32 cac_ms; - u8 dfs_domain = rtw_odm_get_dfs_domain(dvobj_get_primary_adapter(dvobj)); + u8 dfs_domain = rtw_odm_get_dfs_domain(dvobj); _RTW_PRINT_SEL(sel, ", domain:%u", dfs_domain); - for (i = 0; i < dvobj->iface_nums; i++) { - if (!dvobj->padapters[i]) - continue; - if (check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_AP_STATE | WIFI_MESH_STATE) - && check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_ASOC_STATE)) - break; - } - - if (i >= dvobj->iface_nums) { - RTW_PRINT_SEL(sel, "DFS master enable without AP/Mesh mode???"); - goto end_dfs_master; - } - - rtw_get_ch_waiting_ms(dvobj->padapters[i] + rtw_get_ch_waiting_ms(rfctl , rfctl->radar_detect_ch , rfctl->radar_detect_bw , rfctl->radar_detect_offset @@ -548,7 +679,6 @@ void dump_adapters_status(void *sel, struct dvobj_priv *dvobj) _RTW_PRINT_SEL(sel, ", cac:%d", cac_ms); } -end_dfs_master: _RTW_PRINT_SEL(sel, "\n"); } #endif /* CONFIG_DFS_MASTER */ @@ -701,7 +831,6 @@ int proc_get_read_reg(struct seq_file *m, void *v) ssize_t proc_set_read_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { - struct net_device *dev = data; char tmp[16]; u32 addr, len; @@ -757,9 +886,9 @@ int proc_get_rx_stat(struct seq_file *m, void *v) if (pstats == NULL) continue; - if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, 6) != _TRUE) - && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, 6) != _TRUE) - && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(adapter), 6) != _TRUE)) { + if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) != _TRUE) + && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) != _TRUE) + && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(adapter), ETH_ALEN) != _TRUE)) { RTW_PRINT_SEL(m, "MAC :\t\t"MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr)); RTW_PRINT_SEL(m, "data_rx_cnt :\t%llu\n", sta_rx_data_uc_pkts(psta) - pstats->last_rx_data_uc_pkts); pstats->last_rx_data_uc_pkts = sta_rx_data_uc_pkts(psta); @@ -805,9 +934,9 @@ int proc_get_tx_stat(struct seq_file *m, void *v) while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); plist = get_next(plist); - if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, 6) != _TRUE) - && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, 6) != _TRUE) - && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(adapter), 6) != _TRUE)) { + if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) != _TRUE) + && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) != _TRUE) + && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(adapter), ETH_ALEN) != _TRUE)) { _rtw_memcpy(&sta_mac[macid_rec_idx][0], psta->cmn.mac_addr, ETH_ALEN); mac_id[macid_rec_idx] = psta->cmn.mac_id; macid_rec_idx++; @@ -952,11 +1081,11 @@ int proc_get_roam_param(struct seq_file *m, void *v) _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *mlme = &adapter->mlmepriv; - RTW_PRINT_SEL(m, "%12s %12s %11s %14s\n", "rssi_diff_th", "scanr_exp_ms", "scan_int_ms", "rssi_threshold"); - RTW_PRINT_SEL(m, "%-12u %-12u %-11u %-14u\n" + RTW_PRINT_SEL(m, "%12s %15s %26s %16s\n", "rssi_diff_th", "scanr_exp_ms", "scan_interval(unit:2 sec)", "rssi_threshold"); + RTW_PRINT_SEL(m, "%-15u %-13u %-27u %-11u\n" , mlme->roam_rssi_diff_th , mlme->roam_scanr_exp_ms - , mlme->roam_scan_int_ms + , mlme->roam_scan_int , mlme->roam_rssi_threshold ); @@ -972,7 +1101,7 @@ ssize_t proc_set_roam_param(struct file *file, const char __user *buffer, size_t char tmp[32]; u8 rssi_diff_th; u32 scanr_exp_ms; - u32 scan_int_ms; + u32 scan_int; u8 rssi_threshold; if (count < 1) @@ -985,14 +1114,14 @@ ssize_t proc_set_roam_param(struct file *file, const char __user *buffer, size_t if (buffer && !copy_from_user(tmp, buffer, count)) { - int num = sscanf(tmp, "%hhu %u %u %hhu", &rssi_diff_th, &scanr_exp_ms, &scan_int_ms, &rssi_threshold); + int num = sscanf(tmp, "%hhu %u %u %hhu", &rssi_diff_th, &scanr_exp_ms, &scan_int, &rssi_threshold); if (num >= 1) mlme->roam_rssi_diff_th = rssi_diff_th; if (num >= 2) mlme->roam_scanr_exp_ms = scanr_exp_ms; if (num >= 3) - mlme->roam_scan_int_ms = scan_int_ms; + mlme->roam_scan_int = scan_int; if (num >= 4) mlme->roam_rssi_threshold = rssi_threshold; } @@ -1360,7 +1489,7 @@ int proc_get_survey_info(struct seq_file *m, void *v) (ie_wpa2) ? "[WPA2]" : "", (!ie_wpa && !ie_wpa && ie_cap & BIT(4)) ? "[WEP]" : "", (ie_wps) ? "[WPS]" : "", - (pnetwork->network.InfrastructureMode == Ndis802_11IBSS) ? "[IBSS]" : + (pnetwork->network.InfrastructureMode == Ndis802_11IBSS) ? "[IBSS]" : (pnetwork->network.InfrastructureMode == Ndis802_11_mesh) ? "[MESH]" : "", (ie_cap & BIT(0)) ? "[ESS]" : "", (ie_p2p) ? "[P2P]" : ""); @@ -1386,17 +1515,26 @@ _exit: ssize_t proc_set_survey_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { - _irqL irqL; struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - bool need_indicate_scan_done = _FALSE; u8 _status = _FALSE; - NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; - + u8 ssc_chk; if (count < 1) return -EFAULT; +#if 1 + ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE); + if (ssc_chk != SS_ALLOW) + goto exit; + + rtw_ps_deny(padapter, PS_DENY_SCAN); + if (_FAIL == rtw_pwr_wakeup(padapter)) + goto cancel_ps_deny; + if (!rtw_is_adapter_up(padapter)) { + RTW_INFO("scan abort!! adapter cannot use\n"); + goto cancel_ps_deny; + } +#else #ifdef CONFIG_MP_INCLUDED if (rtw_mp_mode_check(padapter)) { RTW_INFO("MP mode block Scan request\n"); @@ -1437,6 +1575,7 @@ ssize_t proc_set_survey_info(struct file *file, const char __user *buffer, size_ RTW_INFO("scan abort!! buddy_fwstate check failed\n"); goto cancel_ps_deny; } +#endif #endif _status = rtw_set_802_11_bssid_list_scan(padapter, NULL); @@ -1445,6 +1584,68 @@ cancel_ps_deny: exit: return count; } +#ifdef ROKU_PRIVATE +int proc_get_infra_ap(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + struct sta_info *psta; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct ht_priv_infra_ap *phtpriv = &pmlmepriv->htpriv_infra_ap; +#ifdef CONFIG_80211AC_VHT + struct vht_priv_infra_ap *pvhtpriv = &pmlmepriv->vhtpriv_infra_ap; +#endif + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct wlan_network *cur_network = &(pmlmepriv->cur_network); + struct sta_priv *pstapriv = &padapter->stapriv; + + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { + psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); + if (psta) { + unsigned int i, j; + unsigned int Rx_ss = 0, Tx_ss = 0; + struct recv_reorder_ctrl *preorder_ctrl; + + RTW_PRINT_SEL(m, "SSID=%s\n", pmlmeinfo->network.Ssid.Ssid); + RTW_PRINT_SEL(m, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr)); + RTW_PRINT_SEL(m, "Supported rate="); + for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { + if (pmlmeinfo->SupportedRates_infra_ap[i] == 0) + break; + RTW_PRINT_SEL(m, " 0x%x", pmlmeinfo->SupportedRates_infra_ap[i]); + } + RTW_PRINT_SEL(m, "\n"); +#ifdef CONFIG_80211N_HT + if (pmlmeinfo->ht_vht_received & BIT(0)) { + RTW_PRINT_SEL(m, "Supported MCS set="); + for (i = 0; i < 16 ; i++) + RTW_PRINT_SEL(m, " 0x%02x", phtpriv->MCS_set_infra_ap[i]); + RTW_PRINT_SEL(m, "\n"); + RTW_PRINT_SEL(m, "highest supported data rate=0x%x\n", phtpriv->rx_highest_data_rate_infra_ap); + RTW_PRINT_SEL(m, "HT_supported_channel_width_set=0x%x\n", phtpriv->channel_width_infra_ap); + RTW_PRINT_SEL(m, "sgi_20m=%d, sgi_40m=%d\n", phtpriv->sgi_20m_infra_ap, phtpriv->sgi_40m_infra_ap); + RTW_PRINT_SEL(m, "ldpc_cap=0x%x, stbc_cap=0x%x\n", phtpriv->ldpc_cap_infra_ap, phtpriv->stbc_cap_infra_ap); + RTW_PRINT_SEL(m, "HT_number_of_stream=%d\n", phtpriv->Rx_ss_infra_ap); + } +#endif + +#ifdef CONFIG_80211AC_VHT + if (pmlmeinfo->ht_vht_received & BIT(1)) { + RTW_PRINT_SEL(m, "VHT_supported_channel_width_set=0x%x\n", pvhtpriv->channel_width_infra_ap); + RTW_PRINT_SEL(m, "vht_ldpc_cap=0x%x, vht_stbc_cap=0x%x, vht_beamform_cap=0x%x\n", pvhtpriv->ldpc_cap_infra_ap, pvhtpriv->stbc_cap_infra_ap, pvhtpriv->beamform_cap_infra_ap); + RTW_PRINT_SEL(m, "Rx_vht_mcs_map=0x%x, Tx_vht_mcs_map=0x%x\n", *(u16 *)pvhtpriv->vht_mcs_map_infra_ap, *(u16 *)pvhtpriv->vht_mcs_map_tx_infra_ap); + RTW_PRINT_SEL(m, "VHT_number_of_stream=%d\n", pvhtpriv->number_of_streams_infra_ap); + } +#endif + } else + RTW_PRINT_SEL(m, "can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress)); + } else + RTW_PRINT_SEL(m, "this only applies to STA mode\n"); + return 0; +} + +#endif /* ROKU_PRIVATE */ int proc_get_ap_info(struct seq_file *m, void *v) { @@ -1454,8 +1655,14 @@ int proc_get_ap_info(struct seq_file *m, void *v) struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct wlan_network *cur_network = &(pmlmepriv->cur_network); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_priv *pstapriv = &padapter->stapriv; + /* ap vendor */ + char vendor[VENDOR_NAME_LEN] = {0}; + get_assoc_AP_Vendor(vendor,pmlmeinfo->assoc_AP_vendor); + RTW_PRINT_SEL(m,"AP Vendor %s\n", vendor); + psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); if (psta) { RTW_PRINT_SEL(m, "SSID=%s\n", cur_network->network.Ssid.Ssid); @@ -1500,7 +1707,7 @@ ssize_t proc_reset_trx_info(struct file *file, const char __user *buffer, size_t if (buffer && !copy_from_user(cmd, buffer, count)) { int num = sscanf(cmd, "%hhx", &cnt); - if (0 == cnt) { + if (num == 1 && cnt == 0) { precvpriv->dbg_rx_ampdu_drop_count = 0; precvpriv->dbg_rx_ampdu_forced_indicate_count = 0; precvpriv->dbg_rx_ampdu_loss_count = 0; @@ -1692,8 +1899,6 @@ int proc_get_bmc_tx_rate(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct sta_info *psta = NULL; if (!MLME_IS_AP(adapter) && !MLME_IS_MESH(adapter)) { RTW_PRINT_SEL(m, "[ERROR] Not in SoftAP/Mesh mode !!\n"); @@ -1708,7 +1913,6 @@ ssize_t proc_set_bmc_tx_rate(struct file *file, const char __user *buffer, size_ { struct net_device *dev = data; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); char tmp[32]; u8 bmc_tx_rate; @@ -1737,7 +1941,6 @@ ssize_t proc_set_bmc_tx_rate(struct file *file, const char __user *buffer, size_ int proc_get_tx_power_offset(struct seq_file *m, void *v) { struct net_device *dev = m->private; - int i; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); RTW_PRINT_SEL(m, "Tx power offset - %u\n", adapter->power_offset); @@ -1854,9 +2057,10 @@ ssize_t proc_set_rx_cnt_dump(struct file *file, const char __user *buffer, size_ int num = sscanf(tmp, "%hhx", &dump_rx_cnt_mode); - rtw_dump_phy_rxcnts_preprocess(adapter, dump_rx_cnt_mode); - adapter->dump_rx_cnt_mode = dump_rx_cnt_mode; - + if (num == 1) { + rtw_dump_phy_rxcnts_preprocess(adapter, dump_rx_cnt_mode); + adapter->dump_rx_cnt_mode = dump_rx_cnt_mode; + } } return count; @@ -1888,10 +2092,7 @@ bool rtw_fwdl_test_trigger_wintint_rdy_fail(void) ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { - struct net_device *dev = data; - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; - int num; if (count < 1) return -EFAULT; @@ -1902,7 +2103,7 @@ ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, si } if (buffer && !copy_from_user(tmp, buffer, count)) - num = sscanf(tmp, "%hhu %hhu", &fwdl_test_chksum_fail, &fwdl_test_wintint_rdy_fail); + sscanf(tmp, "%hhu %hhu", &fwdl_test_chksum_fail, &fwdl_test_wintint_rdy_fail); return count; } @@ -1921,10 +2122,7 @@ bool rtw_del_rx_ampdu_test_trigger_no_tx_fail(void) ssize_t proc_set_del_rx_ampdu_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { - struct net_device *dev = data; - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; - int num; if (count < 1) return -EFAULT; @@ -1935,7 +2133,7 @@ ssize_t proc_set_del_rx_ampdu_test_case(struct file *file, const char __user *bu } if (buffer && !copy_from_user(tmp, buffer, count)) - num = sscanf(tmp, "%hhu", &del_rx_ampdu_test_no_tx_fail); + sscanf(tmp, "%hhu", &del_rx_ampdu_test_no_tx_fail); return count; } @@ -1949,10 +2147,7 @@ u32 rtw_get_wait_hiq_empty_ms(void) ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { - struct net_device *dev = data; - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; - int num; if (count < 1) return -EFAULT; @@ -1963,7 +2158,7 @@ ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, si } if (buffer && !copy_from_user(tmp, buffer, count)) - num = sscanf(tmp, "%u", &g_wait_hiq_empty_ms); + sscanf(tmp, "%u", &g_wait_hiq_empty_ms); return count; } @@ -1989,8 +2184,6 @@ bool rtw_sta_linking_test_force_fail(void) ssize_t proc_set_sta_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { - struct net_device *dev = data; - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; if (count < 1) @@ -2015,6 +2208,47 @@ ssize_t proc_set_sta_linking_test(struct file *file, const char __user *buffer, return count; } +#ifdef CONFIG_AP_MODE +static u16 ap_linking_test_force_auth_fail = 0; +static u16 ap_linking_test_force_asoc_fail = 0; + +u16 rtw_ap_linking_test_force_auth_fail(void) +{ + return ap_linking_test_force_auth_fail; +} + +u16 rtw_ap_linking_test_force_asoc_fail(void) +{ + return ap_linking_test_force_asoc_fail; +} + +ssize_t proc_set_ap_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + char tmp[32]; + + if (count < 1) + return -EFAULT; + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + u16 force_auth_fail = 0; + u16 force_asoc_fail = 0; + int num = sscanf(tmp, "%hu %hu", &force_auth_fail, &force_asoc_fail); + + if (num >= 1) + ap_linking_test_force_auth_fail = force_auth_fail; + if (num >= 2) + ap_linking_test_force_asoc_fail = force_asoc_fail; + } + + return count; +} +#endif /* CONFIG_AP_MODE */ + int proc_get_ps_dbg_info(struct seq_file *m, void *v) { struct net_device *dev = m->private; @@ -2075,7 +2309,7 @@ ssize_t proc_set_ps_dbg_info(struct file *file, const char __user *buffer, size_ int num = sscanf(tmp, "%hhx", &ps_dbg_cmd_id); - if (ps_dbg_cmd_id == 1) /*Clean all*/ + if (num == 1 && ps_dbg_cmd_id == 1) /*Clean all*/ _rtw_memset(pdbgpriv, 0, sizeof(struct debug_priv)); } @@ -2391,7 +2625,7 @@ ssize_t proc_set_hw_status(struct file *file, const char __user *buffer, size_t int num = sscanf(tmp, "%d ", &enable); - if (regsty && enable <= 1) { + if (num == 1 && regsty && enable <= 1) { regsty->check_hw_status = enable; RTW_INFO("check_hw_status=%d\n", regsty->check_hw_status); } @@ -2400,14 +2634,68 @@ ssize_t proc_set_hw_status(struct file *file, const char __user *buffer, size_t return count; } +#ifdef CONFIG_HUAWEI_PROC +int proc_get_huawei_trx_info(struct seq_file *sel, void *v) +{ + struct net_device *dev = sel->private; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct dm_struct *dm = adapter_to_phydm(padapter); + struct sta_info *psta; + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); + struct ra_sta_info *ra_info; + u8 curr_tx_sgi = _FALSE; + u8 curr_tx_rate = 0; + u8 mac_id; +#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA + u8 isCCKrate, rf_path; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; +#endif + + if (!dm->is_linked) { + RTW_PRINT_SEL(sel, "NO link\n\n"); + return 0; + } + + /*============ tx info ============ */ + for (mac_id = 0; mac_id < macid_ctl->num; mac_id++) { + if (rtw_macid_is_used(macid_ctl, mac_id) && !rtw_macid_is_bmc(macid_ctl, mac_id)) { + psta = macid_ctl->sta[mac_id]; + if (!psta) + continue; + + RTW_PRINT_SEL(sel, "STA [" MAC_FMT "]\n", MAC_ARG(psta->cmn.mac_addr)); + + ra_info = &psta->cmn.ra_info; + curr_tx_sgi = rtw_get_current_tx_sgi(padapter, psta); + curr_tx_rate = rtw_get_current_tx_rate(padapter, psta); + RTW_PRINT_SEL(sel, "curr_tx_rate : %s (%s)\n", + HDATA_RATE(curr_tx_rate), (curr_tx_sgi) ? "S" : "L"); + RTW_PRINT_SEL(sel, "curr_tx_bw : %s\n", ch_width_str(ra_info->curr_tx_bw)); + } + } + + /*============ rx info ============ */ + RTW_PRINT_SEL(sel, "rx_rate : %s\n", HDATA_RATE(dm->rx_rate)); +#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA + isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M) ? TRUE : FALSE; + + for (rf_path = 0; rf_path < pHalData->NumTotalRFPath; rf_path++) { + if (!isCCKrate) + _RTW_PRINT_SEL(sel , "RF_PATH_%d : rx_ofdm_pwr:%d(dBm), rx_ofdm_snr:%d(dB)\n", + rf_path, psample_pkt_rssi->ofdm_pwr[rf_path], psample_pkt_rssi->ofdm_snr[rf_path]); + } +#endif + RTW_PRINT_SEL(sel, "\n"); + return 0; +} +#endif /* CONFIG_HUAWEI_PROC */ + int proc_get_trx_info_debug(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - int i; - /*============ tx info ============ */ rtw_hal_get_def_var(padapter, HW_DEF_RA_INFO_DUMP, m); @@ -2415,7 +2703,6 @@ int proc_get_trx_info_debug(struct seq_file *m, void *v) /*============ rx info ============ */ rtw_hal_set_odm_var(padapter, HAL_ODM_RX_INFO_DUMP, m, _FALSE); - return 0; } @@ -2423,14 +2710,11 @@ int proc_get_rx_signal(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); RTW_PRINT_SEL(m, "rssi:%d\n", padapter->recvpriv.rssi); - /* RTW_PRINT_SEL(m, "rxpwdb:%d\n", padapter->recvpriv.rxpwdb); */ - RTW_PRINT_SEL(m, "signal_strength:%u\n", padapter->recvpriv.signal_strength); - RTW_PRINT_SEL(m, "signal_qual:%u\n", padapter->recvpriv.signal_qual); #ifdef CONFIG_MP_INCLUDED if (padapter->registrypriv.mp_mode == 1) { + struct dm_struct *odm = adapter_to_phydm(padapter); if (padapter->mppriv.antenna_rx == ANTENNA_A) RTW_PRINT_SEL(m, "Antenna: A\n"); else if (padapter->mppriv.antenna_rx == ANTENNA_B) @@ -2447,9 +2731,16 @@ int proc_get_rx_signal(struct seq_file *m, void *v) RTW_PRINT_SEL(m, "Antenna: CD\n"); else RTW_PRINT_SEL(m, "Antenna: __\n"); + + RTW_PRINT_SEL(m, "rx_rate = %s\n", HDATA_RATE(odm->rx_rate)); return 0; - } + } else #endif + { + /* RTW_PRINT_SEL(m, "rxpwdb:%d\n", padapter->recvpriv.rxpwdb); */ + RTW_PRINT_SEL(m, "signal_strength:%u\n", padapter->recvpriv.signal_strength); + RTW_PRINT_SEL(m, "signal_qual:%u\n", padapter->recvpriv.signal_qual); + } #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA rtw_odm_get_perpkt_rssi(m, padapter); rtw_get_raw_rssi_info(m, padapter); @@ -2476,9 +2767,12 @@ ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t int num = sscanf(tmp, "%u %u", &is_signal_dbg, &signal_strength); + if (num < 1) + return count; + is_signal_dbg = is_signal_dbg == 0 ? 0 : 1; - if (is_signal_dbg && num != 2) + if (is_signal_dbg && num < 2) return count; signal_strength = signal_strength > 100 ? 100 : signal_strength; @@ -2496,6 +2790,36 @@ ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t return count; } + +int proc_get_mac_rptbuf(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + u16 i; + u16 mac_id; + u32 shcut_addr = 0; + u32 read_addr = 0; +#ifdef CONFIG_RTL8814A + RTW_PRINT_SEL(m, "TX ShortCut:\n"); + for (mac_id = 0; mac_id < 64; mac_id++) { + rtw_write16(padapter, 0x140, 0x662 | ((mac_id & BIT5) >> 5)); + shcut_addr = 0x8000; + shcut_addr = shcut_addr | ((mac_id & 0x1f) << 7); + RTW_PRINT_SEL(m, "mac_id=%d, 0x140=%x =>\n", mac_id, 0x662 | ((mac_id & BIT5) >> 5)); + for (i = 0; i < 30; i++) { + read_addr = 0; + read_addr = shcut_addr | (i << 2); + RTW_PRINT_SEL(m, "i=%02d: MAC_%04x= %08x ", i, read_addr, rtw_read32(padapter, read_addr)); + if (!((i + 1) % 4)) + RTW_PRINT_SEL(m, "\n"); + if (i == 29) + RTW_PRINT_SEL(m, "\n"); + } + } +#endif /* CONFIG_RTL8814A */ + return 0; +} + #ifdef CONFIG_80211N_HT int proc_get_ht_enable(struct seq_file *m, void *v) @@ -2530,7 +2854,7 @@ ssize_t proc_set_ht_enable(struct file *file, const char __user *buffer, size_t int num = sscanf(tmp, "%d ", &mode); - if (pregpriv && mode < 2) { + if ( num == 1 && pregpriv && mode < 2) { pregpriv->ht_enable = mode; RTW_INFO("ht_enable=%d\n", pregpriv->ht_enable); } @@ -2576,11 +2900,9 @@ ssize_t proc_set_bw_mode(struct file *file, const char __user *buffer, size_t co bw_5g = mode >> 4; bw_2g = mode & 0x0f; - if (pregpriv && bw_2g <= 4 && bw_5g <= 4) { - + if (num == 1 && pregpriv && bw_2g <= 4 && bw_5g <= 4) { pregpriv->bw_mode = mode; printk("bw_mode=0x%x\n", mode); - } } @@ -2620,7 +2942,7 @@ ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size int num = sscanf(tmp, "%d ", &mode); - if (pregpriv && mode < 2) { + if (num == 1 && pregpriv && mode < 2) { pregpriv->ampdu_enable = mode; printk("ampdu_enable=%d\n", mode); } @@ -2631,34 +2953,6 @@ ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size } -int proc_get_mac_rptbuf(struct seq_file *m, void *v) -{ - struct net_device *dev = m->private; - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - u16 i; - u16 mac_id; - u32 shcut_addr = 0; - u32 read_addr = 0; -#ifdef CONFIG_RTL8814A - RTW_PRINT_SEL(m, "TX ShortCut:\n"); - for (mac_id = 0; mac_id < 64; mac_id++) { - rtw_write16(padapter, 0x140, 0x662 | ((mac_id & BIT5) >> 5)); - shcut_addr = 0x8000; - shcut_addr = shcut_addr | ((mac_id & 0x1f) << 7); - RTW_PRINT_SEL(m, "mac_id=%d, 0x140=%x =>\n", mac_id, 0x662 | ((mac_id & BIT5) >> 5)); - for (i = 0; i < 30; i++) { - read_addr = 0; - read_addr = shcut_addr | (i << 2); - RTW_PRINT_SEL(m, "i=%02d: MAC_%04x= %08x ", i, read_addr, rtw_read32(padapter, read_addr)); - if (!((i + 1) % 4)) - RTW_PRINT_SEL(m, "\n"); - if (i == 29) - RTW_PRINT_SEL(m, "\n"); - } - } -#endif /* CONFIG_RTL8814A */ - return 0; -} void dump_regsty_rx_ampdu_size_limit(void *sel, _adapter *adapter) { @@ -2707,9 +3001,6 @@ ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t c { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct registry_priv *pregpriv = &padapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); char tmp[32]; u8 accept; u8 size; @@ -2734,9 +3025,9 @@ ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t c rtw_rx_ampdu_apply(padapter); } -exit: return count; } + int proc_get_rx_ampdu_factor(struct seq_file *m, void *v) { struct net_device *dev = m->private; @@ -3017,8 +3308,6 @@ int proc_get_en_fwps(struct seq_file *m, void *v) struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if (pregpriv) RTW_PRINT_SEL(m, "check_fw_ps = %d , 1:enable get FW PS state , 0: disable get FW PS state\n" @@ -3032,8 +3321,6 @@ ssize_t proc_set_en_fwps(struct file *file, const char __user *buffer, size_t co struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); char tmp[32]; u32 mode; @@ -3049,7 +3336,7 @@ ssize_t proc_set_en_fwps(struct file *file, const char __user *buffer, size_t co int num = sscanf(tmp, "%d ", &mode); - if (pregpriv && mode < 2) { + if (num == 1 && pregpriv && mode < 2) { pregpriv->check_fw_ps = mode; RTW_INFO("pregpriv->check_fw_ps=%d\n", pregpriv->check_fw_ps); } @@ -3114,7 +3401,9 @@ void rtw_get_dft_phy_cap(void *sel, _adapter *adapter) #ifdef CONFIG_80211AC_VHT rtw_vht_use_default_setting(adapter); #endif + #ifdef CONFIG_80211N_HT rtw_dump_dft_phy_cap(sel, adapter); + #endif } void rtw_dump_drv_phy_cap(void *sel, _adapter *adapter) @@ -3129,7 +3418,7 @@ void rtw_dump_drv_phy_cap(void *sel, _adapter *adapter) RTW_PRINT_SEL(sel, "[DRV CAP] Tx Path Num Index : %d\n", (phy_spec->trx_cap >> 8) & 0xFF);/*Tx Path Num Index [15:8]*/ RTW_PRINT_SEL(sel, "[DRV CAP] Rx Path Num Index : %d\n", (phy_spec->trx_cap & 0xFF));/*Rx Path Num Index [7:0]*/ #endif - + #ifdef CONFIG_80211N_HT RTW_PRINT_SEL(sel, "[DRV CAP] STBC Capability : 0x%02x\n", pregistry_priv->stbc_cap); RTW_PRINT_SEL(sel, "[DRV CAP] VHT STBC Tx : %s\n", (TEST_FLAG(pregistry_priv->stbc_cap, BIT1)) ? "V" : "X"); /*BIT1: Enable VHT STBC Tx*/ RTW_PRINT_SEL(sel, "[DRV CAP] VHT STBC Rx : %s\n", (TEST_FLAG(pregistry_priv->stbc_cap, BIT0)) ? "V" : "X"); /*BIT0: Enable VHT STBC Rx*/ @@ -3141,6 +3430,7 @@ void rtw_dump_drv_phy_cap(void *sel, _adapter *adapter) RTW_PRINT_SEL(sel, "[DRV CAP] VHT LDPC Rx : %s\n", (TEST_FLAG(pregistry_priv->ldpc_cap, BIT0)) ? "V" : "X"); /*BIT0: Enable VHT LDPC Rx*/ RTW_PRINT_SEL(sel, "[DRV CAP] HT LDPC Tx : %s\n", (TEST_FLAG(pregistry_priv->ldpc_cap, BIT5)) ? "V" : "X"); /*BIT5: Enable HT LDPC Tx*/ RTW_PRINT_SEL(sel, "[DRV CAP] HT LDPC Rx : %s\n\n", (TEST_FLAG(pregistry_priv->ldpc_cap, BIT4)) ? "V" : "X"); /*BIT4: Enable HT LDPC Rx*/ + #endif /* CONFIG_80211N_HT */ #ifdef CONFIG_BEAMFORMING #if 0 RTW_PRINT_SEL(sel, "[DRV CAP] TxBF parameter : 0x%08x\n", phy_spec->txbf_param); @@ -3203,7 +3493,7 @@ ssize_t proc_set_stbc_cap(struct file *file, const char __user *buffer, size_t c int num = sscanf(tmp, "%d ", &mode); - if (pregpriv) { + if (num == 1 && pregpriv) { pregpriv->stbc_cap = mode; RTW_INFO("stbc_cap = 0x%02x\n", mode); } @@ -3243,7 +3533,7 @@ ssize_t proc_set_rx_stbc(struct file *file, const char __user *buffer, size_t co int num = sscanf(tmp, "%d ", &mode); - if (pregpriv && (mode == 0 || mode == 1 || mode == 2 || mode == 3)) { + if (num == 1 && pregpriv && (mode == 0 || mode == 1 || mode == 2 || mode == 3)) { pregpriv->rx_stbc = mode; printk("rx_stbc=%d\n", mode); } @@ -3284,7 +3574,7 @@ ssize_t proc_set_ldpc_cap(struct file *file, const char __user *buffer, size_t c int num = sscanf(tmp, "%d ", &mode); - if (pregpriv) { + if (num == 1 && pregpriv) { pregpriv->ldpc_cap = mode; RTW_INFO("ldpc_cap = 0x%02x\n", mode); } @@ -3325,7 +3615,7 @@ ssize_t proc_set_txbf_cap(struct file *file, const char __user *buffer, size_t c int num = sscanf(tmp, "%d ", &mode); - if (pregpriv) { + if (num == 1 && pregpriv) { pregpriv->beamform_cap = mode; RTW_INFO("beamform_cap = 0x%02x\n", mode); } @@ -3421,6 +3711,10 @@ int proc_get_all_sta_info(struct seq_file *m, void *v) RTW_PRINT_SEL(m, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); RTW_PRINT_SEL(m, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->cmn.aid, psta->cmn.mac_id, psta->cmn.ra_info.rate_id); +#ifdef CONFIG_RTS_FULL_BW + if(psta->vendor_8812) + RTW_PRINT_SEL(m,"Vendor Realtek 8812\n"); +#endif/*CONFIG_RTS_FULL_BW*/ #ifdef CONFIG_80211N_HT RTW_PRINT_SEL(m, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); RTW_PRINT_SEL(m, "bwmode=%d, ch_offset=%d, sgi_20m=%d,sgi_40m=%d\n" @@ -3460,11 +3754,17 @@ int proc_get_all_sta_info(struct seq_file *m, void *v) RTW_PRINT_SEL(m, "rx_uc_bytes=%llu\n", sta_rx_uc_bytes(psta)); RTW_PRINT_SEL(m, "rx_mc_bytes=%llu\n", psta->sta_stats.rx_mc_bytes); RTW_PRINT_SEL(m, "rx_bc_bytes=%llu\n", psta->sta_stats.rx_bc_bytes); - RTW_PRINT_SEL(m, "rx_avg_tp =%d (Bps)\n", psta->cmn.rx_moving_average_tp); + if (psta->sta_stats.rx_tp_kbits >> 10) + RTW_PRINT_SEL(m, "rx_tp =%d (Mbps)\n", psta->sta_stats.rx_tp_kbits >> 10); + else + RTW_PRINT_SEL(m, "rx_tp =%d (Kbps)\n", psta->sta_stats.rx_tp_kbits); RTW_PRINT_SEL(m, "tx_data_pkts=%llu\n", psta->sta_stats.tx_pkts); RTW_PRINT_SEL(m, "tx_bytes=%llu\n", psta->sta_stats.tx_bytes); - RTW_PRINT_SEL(m, "tx_avg_tp =%d (MBps)\n", psta->cmn.tx_moving_average_tp); + if (psta->sta_stats.tx_tp_kbits >> 10) + RTW_PRINT_SEL(m, "tx_tp =%d (Mbps)\n", psta->sta_stats.tx_tp_kbits >> 10); + else + RTW_PRINT_SEL(m, "tx_tp =%d (Kbps)\n", psta->sta_stats.tx_tp_kbits); #ifdef CONFIG_RTW_80211K RTW_PRINT_SEL(m, "rm_en_cap="RM_CAP_FMT"\n", RM_CAP_ARG(psta->rm_en_cap)); #endif @@ -3529,7 +3829,6 @@ int proc_get_best_channel(struct seq_file *m, void *v) struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0; for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++) { @@ -3585,7 +3884,6 @@ ssize_t proc_set_best_channel(struct file *file, const char __user *buffer, size struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; char tmp[32]; if (count < 1) @@ -3762,7 +4060,6 @@ int proc_get_sreset(struct seq_file *m, void *v) struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct sreset_priv *psrtpriv = &pHalData->srestpriv; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); if (psrtpriv->dbg_sreset_ctrl == _TRUE) { RTW_PRINT_SEL(m, "self_dect_tx_cnt:%llu\n", psrtpriv->self_dect_tx_cnt); @@ -3797,6 +4094,9 @@ ssize_t proc_set_sreset(struct file *file, const char __user *buffer, size_t cou int num = sscanf(tmp, "%d", &trigger_point); + if (num < 1) + return count; + if (trigger_point == SRESET_TGP_NULL) rtw_hal_sreset_reset(padapter); else if (trigger_point == SRESET_TGP_INFO) @@ -3812,6 +4112,160 @@ ssize_t proc_set_sreset(struct file *file, const char __user *buffer, size_t cou #ifdef CONFIG_PCI_HCI +ssize_t proc_set_pci_bridge_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct pci_dev *pdev = pdvobjpriv->ppcidev; + struct pci_dev *bridge_pdev = pdev->bus->self; + + char tmp[32] = { 0 }; + int num; + + u32 reg = 0, value = 0; + + if (count < 1) + return -EFAULT; + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + + num = sscanf(tmp, "%x %x", ®, &value); + if (num != 2) { + RTW_INFO("invalid parameter!\n"); + return count; + } + + if (reg >= 0x1000) { + RTW_INFO("invalid register!\n"); + return count; + } + + if (value > 0xFF) { + RTW_INFO("invalid value! Only one byte\n"); + return count; + } + + RTW_INFO(FUNC_ADPT_FMT ": register 0x%x value 0x%x\n", + FUNC_ADPT_ARG(padapter), reg, value); + + pci_write_config_byte(bridge_pdev, reg, value); + } + return count; +} + + +int proc_get_pci_bridge_conf_space(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct pci_dev *pdev = pdvobjpriv->ppcidev; + struct pci_dev *bridge_pdev = pdev->bus->self; + + u32 tmp[4] = { 0 }; + u32 i, j; + + RTW_PRINT_SEL(m, "\n***** PCI Host Device Configuration Space*****\n\n"); + + for (i = 0; i < 0x1000; i += 0x10) { + for (j = 0 ; j < 4 ; j++) + pci_read_config_dword(bridge_pdev, i + j * 4, tmp+j); + + RTW_PRINT_SEL(m, "%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", + i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF, + tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF, + tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF, + tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF); + } + return 0; +} + + +ssize_t proc_set_pci_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct pci_dev *pdev = pdvobjpriv->ppcidev; + + char tmp[32] = { 0 }; + int num; + + u32 reg = 0, value = 0; + + if (count < 1) + return -EFAULT; + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + + num = sscanf(tmp, "%x %x", ®, &value); + + if (num != 2) { + RTW_INFO("invalid parameter!\n"); + return count; + } + + + if (reg >= 0x1000) { + RTW_INFO("invalid register!\n"); + return count; + } + + if (value > 0xFF) { + RTW_INFO("invalid value! Only one byte\n"); + return count; + } + + RTW_INFO(FUNC_ADPT_FMT ": register 0x%x value 0x%x\n", + FUNC_ADPT_ARG(padapter), reg, value); + + pci_write_config_byte(pdev, reg, value); + + + } + return count; +} + + +int proc_get_pci_conf_space(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct pci_dev *pdev = pdvobjpriv->ppcidev; + struct pci_dev *bridge_pdev = pdev->bus->self; + + u32 tmp[4] = { 0 }; + u32 i, j; + + RTW_PRINT_SEL(m, "\n***** PCI Device Configuration Space *****\n\n"); + + for (i = 0; i < 0x1000; i += 0x10) { + for (j = 0 ; j < 4 ; j++) + pci_read_config_dword(pdev, i + j * 4, tmp+j); + + RTW_PRINT_SEL(m, "%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", + i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF, + tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF, + tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF, + tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF); + } + + return 0; +} + + int proc_get_pci_aspm(struct seq_file *m, void *v) { struct net_device *dev = m->private; @@ -4247,7 +4701,7 @@ ssize_t proc_set_wakeup_event(struct file *file, const char __user *buffer, else return -EFAULT; - if (wakeup_event <= 0x07) { + if (num == 1 && wakeup_event <= 0x07) { registry_par->wakeup_event = wakeup_event; if (wakeup_event & BIT(1)) @@ -4316,6 +4770,11 @@ ssize_t proc_set_wowlan_gpio_info(struct file *file, const char __user *buffer, num = sscanf(tmp, "%u", &is_high_active); + if (num != 1) { + RTW_INFO("Invalid format\n"); + return count; + } + is_high_active = is_high_active == 0 ? 0 : 1; pwrpriv->is_high_active = is_high_active; @@ -4376,7 +4835,7 @@ int proc_get_p2p_wowlan_info(struct seq_file *m, void *v) return 0; } #endif /* CONFIG_P2P_WOWLAN */ - +#ifdef CONFIG_BCN_CNT_CONFIRM_HDL int proc_get_new_bcn_max(struct seq_file *m, void *v) { extern int new_bcn_max; @@ -4403,16 +4862,20 @@ ssize_t proc_set_new_bcn_max(struct file *file, const char __user *buffer, size_ return count; } - +#endif #ifdef CONFIG_POWER_SAVING int proc_get_ps_info(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); - u8 ips_mode = pwrpriv->ips_mode; + u8 ips_mode = pwrpriv->ips_mode_req; u8 lps_mode = pwrpriv->power_mgnt; u8 lps_level = pwrpriv->lps_level; +#ifdef CONFIG_WOWLAN + u8 wow_lps_mode = pwrpriv->wowlan_power_mgmt; + u8 wow_lps_level = pwrpriv->wowlan_lps_level; +#endif /* CONFIG_WOWLAN */ char *str = ""; RTW_PRINT_SEL(m, "======Power Saving Info:======\n"); @@ -4463,11 +4926,105 @@ int proc_get_ps_info(struct seq_file *m, void *v) str = "LPS_NORMAL"; RTW_PRINT_SEL(m, " LPS level: %s\n", str); +#ifdef CONFIG_WOWLAN + RTW_PRINT_SEL(m, "------------------------------\n"); + RTW_PRINT_SEL(m, "*WOW LPS:\n"); + + if (wow_lps_mode == PS_MODE_ACTIVE) + str = "NO LPS"; + else if (wow_lps_mode == PS_MODE_MIN) + str = "MIN"; + else if (wow_lps_mode == PS_MODE_MAX) + str = "MAX"; + else if (wow_lps_mode == PS_MODE_DTIM) + str = "DTIM"; + else + sprintf(str, "%d", wow_lps_mode); + + RTW_PRINT_SEL(m, " WOW LPS mode: %s\n", str); + + if (wow_lps_level == LPS_LCLK) + str = "LPS_LCLK"; + else if (wow_lps_level == LPS_PG) + str = "LPS_PG"; + else + str = "LPS_NORMAL"; + RTW_PRINT_SEL(m, " WOW LPS level: %s\n", str); +#endif /* CONFIG_WOWLAN */ + RTW_PRINT_SEL(m, "=============================\n"); return 0; } -#ifdef CONFIG_WMMPS_STA +ssize_t proc_set_ps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + struct _ADAPTER *adapter = (_adapter *)rtw_netdev_priv(dev); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + char tmp[8]; + int num = 0; + int mode = 0; + int en = 0; + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (!buffer || copy_from_user(tmp, buffer, count)) + goto exit; + + num = sscanf(tmp, "%d %d", &mode, &en); + if (num > 2) { + RTW_ERR("%s: invalid parameter!\n", __FUNCTION__); + goto exit; + } + + if (num == 1 && mode == 0) { + /* back to original LPS/IPS Mode */ + RTW_INFO("%s: back to original LPS/IPS Mode\n", __FUNCTION__); + + rtw_pm_set_lps(adapter, adapter->registrypriv.power_mgnt); + + rtw_pm_set_ips(adapter, adapter->registrypriv.ips_mode); + +#ifdef CONFIG_WOWLAN + RTW_INFO("%s: back to original WOW LPS Mode\n", __FUNCTION__); + + rtw_pm_set_wow_lps(adapter, adapter->registrypriv.wow_power_mgnt); +#endif /* CONFIG_WOWLAN */ + + goto exit; + } + + if (mode == 1) { + /* LPS */ + RTW_INFO("%s: LPS: %s, en=%d\n", __FUNCTION__, (en == 0) ? "disable":"enable", en); + if (rtw_pm_set_lps(adapter, en) != 0 ) + RTW_ERR("%s: invalid parameter, mode=%d, level=%d\n", __FUNCTION__, mode, en); + + } else if (mode == 2) { + /* IPS */ + RTW_INFO("%s: IPS: %s, en=%d\n", __FUNCTION__, (en == 0) ? "disable":"enable", en); + if (rtw_pm_set_ips(adapter, en) != 0 ) + RTW_ERR("%s: invalid parameter, mode=%d, level=%d\n", __FUNCTION__, mode, en); + } +#ifdef CONFIG_WOWLAN + else if (mode == 3) { + /* WOW LPS */ + RTW_INFO("%s: WOW LPS: %s, en=%d\n", __FUNCTION__, (en == 0) ? "disable":"enable", en); + if (rtw_pm_set_wow_lps(adapter, en) != 0 ) + RTW_ERR("%s: invalid parameter, mode=%d, level=%d\n", __FUNCTION__, mode, en); + } +#endif /* CONFIG_WOWLAN */ + else + RTW_ERR("%s: invalid parameter, mode = %d!\n", __FUNCTION__, mode); + +exit: + return count; +} + +#ifdef CONFIG_WMMPS_STA int proc_get_wmmps_info(struct seq_file *m, void *v) { struct net_device *dev = m->private; @@ -4527,18 +5084,18 @@ ssize_t proc_set_wmmps_info(struct file *file, const char __user *buffer, size_t if (buffer && !copy_from_user(tmp, buffer, count)) { int num = sscanf(tmp, "%hhu %hhx", &uapsd_max_sp_len_setting, &uapsd_ac_setting); - + if (pregpriv) { - if (num >= 1){ + if (num >= 1) { pregpriv->uapsd_max_sp_len = uapsd_max_sp_len_setting; RTW_INFO("uapsd_max_sp_len = %d\n", pregpriv->uapsd_max_sp_len); } - if (num >= 2){ + if (num >= 2) { pregpriv->uapsd_ac_enable = uapsd_ac_setting; RTW_INFO("uapsd_ac_enable = 0x%02x\n", pregpriv->uapsd_ac_enable); } - } + } } return count; @@ -4579,7 +5136,7 @@ ssize_t proc_set_tdls_enable(struct file *file, const char __user *buffer, size_ int num = sscanf(tmp, "%d ", &en_tdls); - if (pregpriv) { + if (num == 1 && pregpriv) { if (en_tdls > 0) rtw_enable_tdls_func(padapter); else @@ -5002,7 +5559,6 @@ int proc_get_monitor(struct seq_file *m, void *v) struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if (WIFI_MONITOR_STATE == get_fwstate(pmlmepriv)) { RTW_PRINT_SEL(m, "Monitor mode : Enable\n"); @@ -5324,6 +5880,7 @@ ssize_t proc_set_tx_deauth(struct file *file, const char __user *buffer, size_t /* TX unicast deauth to AP */ issue_deauth_11w(padapter, get_my_bssid(&(pmlmeinfo->network)), 0, (u8)key_type); } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { + u8 updated = _FALSE; if (key_type == 3) issue_deauth_11w(padapter, bc_addr, 0, IEEE80211W_RIGHT_KEY); @@ -5352,24 +5909,22 @@ ssize_t proc_set_tx_deauth(struct file *file, const char __user *buffer, size_t psta = rtw_get_stainfo(pstapriv, &mac_addr[index][0]); if (psta && key_type != IEEE80211W_WRONG_KEY && key_type != IEEE80211W_NO_KEY) { - u8 updated = _FALSE; - _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); if (rtw_is_list_empty(&psta->asoc_list) == _FALSE) { rtw_list_delete(&psta->asoc_list); pstapriv->asoc_list_cnt--; - updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_PREV_AUTH_NOT_VALID, _TRUE); + updated |= ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_PREV_AUTH_NOT_VALID, _TRUE); } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); - - associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); } RTW_INFO("STA[%u]:"MAC_FMT"\n", index , MAC_ARG(&mac_addr[index][0])); } } } + + associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); } return count; @@ -5444,6 +5999,48 @@ int proc_get_tx_auth(struct seq_file *m, void *v) } #endif /* CONFIG_IEEE80211W */ +#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA +static u32 phase_idx; +int proc_get_pathb_phase(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + + RTW_PRINT_SEL(m, "PathB phase index =%d\n", phase_idx); + return 0; +} + +ssize_t proc_set_pathb_phase(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + char tmp[255]; + int num; + u32 tmp_idx; + + if (NULL == buffer) { + RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); + return -EFAULT; + } + + if (count < 1) { + RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + num = sscanf(tmp, "%u", &tmp_idx); + if ((tmp_idx < 0) || (tmp_idx > 11)) { + RTW_INFO(FUNC_ADPT_FMT "Invalid input value\n", FUNC_ADPT_ARG(padapter)); + return count; + } + phase_idx = tmp_idx; + rtw_hal_set_pathb_phase(padapter, phase_idx); + } + return count; +} +#endif + #ifdef CONFIG_MCC_MODE int proc_get_mcc_info(struct seq_file *m, void *v) { @@ -5516,7 +6113,7 @@ ssize_t proc_set_mcc_duration(struct file *file, const char __user *buffer, size struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[255]; - u32 enable_runtime_duration = 0, mcc_duration = 0; + u32 enable_runtime_duration = 0, mcc_duration = 0, type = 0; if (NULL == buffer) { RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); @@ -5535,14 +6132,19 @@ ssize_t proc_set_mcc_duration(struct file *file, const char __user *buffer, size } if (buffer && !copy_from_user(tmp, buffer, count)) { - int num = sscanf(tmp, "%u %u", &enable_runtime_duration, &mcc_duration); + int num = sscanf(tmp, "%u %u %u", &enable_runtime_duration, &type, &mcc_duration); if (num < 1) { RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter)); return -EINVAL; } - if (num > 2) { + if (num > 3) { + RTW_INFO(FUNC_ADPT_FMT ": input parameters > 2\n", FUNC_ADPT_ARG(padapter)); + return -EINVAL; + } + + if (num == 2) { RTW_INFO(FUNC_ADPT_FMT ": input parameters > 2\n", FUNC_ADPT_ARG(padapter)); return -EINVAL; } @@ -5552,15 +6154,57 @@ ssize_t proc_set_mcc_duration(struct file *file, const char __user *buffer, size RTW_INFO("runtime duration:%s\n", enable_runtime_duration ? "enable":"disable"); } - if (num == 2) { - RTW_INFO("mcc duration:%d\n", mcc_duration); - rtw_set_mcc_duration_cmd(padapter, MCC_DURATION_DIRECET, mcc_duration); + if (num == 3) { + RTW_INFO("type:%d, mcc duration:%d\n", type, mcc_duration); + rtw_set_mcc_duration_cmd(padapter, type, mcc_duration); } } return count; } +#ifdef CONFIG_MCC_PHYDM_OFFLOAD +ssize_t proc_set_mcc_phydm_offload_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + char tmp[255]; + u32 mcc_phydm_enable = 0; + + if (NULL == buffer) { + RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); + return -EFAULT; + } + + if (count < 1) { + RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); + return -EFAULT; + } + + if (count > sizeof(tmp)) { + RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + u8 i = 0; + int num = sscanf(tmp, "%u", &mcc_phydm_enable); + + if (num < 1) { + RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter)); + return -EINVAL; + } + + RTW_INFO("%s: mcc phydm enable = %d\n", __func__, mcc_phydm_enable); + rtw_set_mcc_phydm_offload_enable_cmd(padapter, mcc_phydm_enable, _TRUE); + } + + return count; +} +#endif + ssize_t proc_set_mcc_single_tx_criteria(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; @@ -5862,7 +6506,10 @@ int proc_get_ack_timeout(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - u8 ack_timeout_val, ack_timeout_val_cck; + u8 ack_timeout_val; +#ifdef CONFIG_RTL8821C + u8 ack_timeout_val_cck; +#endif ack_timeout_val = rtw_read8(padapter, REG_ACKTO); @@ -5954,7 +6601,7 @@ ssize_t proc_set_fw_offload(struct file *file, const char __user *buffer, size_t if (hal->RegIQKFWOffload != iqk_offload_enable) { hal->RegIQKFWOffload = iqk_offload_enable; - rtw_hal_update_iqk_fw_offload_cap(pri_adapter); + rtw_run_in_thread_cmd(pri_adapter, ((void *)(rtw_hal_update_iqk_fw_offload_cap)), pri_adapter); } if (hal->ch_switch_offload != ch_switch_offload_enable) @@ -5975,6 +6622,178 @@ int proc_get_fw_offload(struct seq_file *m, void *v) RTW_PRINT_SEL(m, "Channel switch FW offload:%s\n", hal->ch_switch_offload?"enable":"disable"); return 0; } +#ifdef CONFIG_FW_HANDLE_TXBCN +extern void rtw_hal_set_fw_ap_bcn_offload_cmd(_adapter *adapter, bool fw_bcn_en, u8 tbtt_rpt_map); +ssize_t proc_set_fw_tbtt_rpt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + char tmp[32]; + u32 fw_tbtt_rpt, fw_bcn_offload; + + + if (buffer == NULL) { + RTW_INFO("input buffer is NULL!\n"); + return -EFAULT; + } + + if (count < 1) { + RTW_INFO("input length is 0!\n"); + return -EFAULT; + } + + if (count > sizeof(tmp)) { + RTW_INFO("input length is too large\n"); + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + int num = sscanf(tmp, "%d %x",&fw_bcn_offload, &fw_tbtt_rpt); + + if (num < 2) { + RTW_INFO("input parameters < 2\n"); + return -EINVAL; + } + rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, fw_bcn_offload, fw_tbtt_rpt); + } + + return count; +} + +int proc_get_fw_tbtt_rpt(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + + RTW_PRINT_SEL(m, "FW BCN offload:%s\n", dvobj->fw_bcn_offload ? "enable" : "disable"); + RTW_PRINT_SEL(m, "FW TBTT RPT:%x\n", dvobj->vap_tbtt_rpt_map); + return 0; +} + +#endif + +#ifdef CONFIG_CTRL_TXSS_BY_TP +ssize_t proc_set_txss_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); + + char tmp[32]; + u32 enable = 0; + u32 txss_tx_tp = 0; + int txss_chk_cnt = 0; + + if (buffer == NULL) { + RTW_INFO("input buffer is NULL!\n"); + return -EFAULT; + } + + if (count < 1) { + RTW_INFO("input length is 0!\n"); + return -EFAULT; + } + + if (count > sizeof(tmp)) { + RTW_INFO("input length is too large\n"); + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + int num = sscanf(tmp, "%u %u %d", + &enable, &txss_tx_tp, &txss_chk_cnt); + + if (num < 1) { + RTW_INFO("input parameters < 1\n"); + return -EINVAL; + } + pmlmeext->txss_ctrl_en = enable; + + if (txss_tx_tp) + pmlmeext->txss_tp_th = txss_tx_tp; + if (txss_chk_cnt) + pmlmeext->txss_tp_chk_cnt = txss_chk_cnt; + + RTW_INFO("%s txss_ctl_en :%s , txss_tp_th:%d, tp_chk_cnt:%d\n", + __func__, pmlmeext->txss_tp_th ? "Y" : "N", + pmlmeext->txss_tp_th, pmlmeext->txss_tp_chk_cnt); + + } + + return count; +} + +int proc_get_txss_tp(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); + + RTW_PRINT_SEL(m, "TXSS Control - %s\n", pmlmeext->txss_ctrl_en ? "enable" : "disable"); + RTW_PRINT_SEL(m, "TXSS Tx TP TH - %d\n", pmlmeext->txss_tp_th); + RTW_PRINT_SEL(m, "TXSS check cnt - %d\n", pmlmeext->txss_tp_chk_cnt); + + return 0; +} +#ifdef DBG_CTRL_TXSS +ssize_t proc_set_txss_ctrl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); + + char tmp[32]; + u32 tx_1ss = 0; + + if (buffer == NULL) { + RTW_INFO("input buffer is NULL!\n"); + return -EFAULT; + } + + if (count < 1) { + RTW_INFO("input length is 0!\n"); + return -EFAULT; + } + + if (count > sizeof(tmp)) { + RTW_INFO("input length is too large\n"); + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + int num = sscanf(tmp, "%u", &tx_1ss); + + if (num < 1) { + RTW_INFO("input parameters < 1\n"); + return -EINVAL; + } + + pmlmeext->txss_ctrl_en = _FALSE; + + dbg_ctrl_txss(adapter, tx_1ss); + + RTW_INFO("%s set tx to 1ss :%s\n", __func__, tx_1ss ? "Y" : "N"); + } + + return count; +} + +int proc_get_txss_ctrl(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); + + RTW_PRINT_SEL(m, "TXSS 1ss - %s\n", pmlmeext->txss_1ss ? "Y" : "N"); + + return 0; +} +#endif +#endif #ifdef CONFIG_DBG_RF_CAL int proc_get_iqk_info(struct seq_file *m, void *v) @@ -6004,6 +6823,11 @@ ssize_t proc_set_iqk(struct file *file, const char __user *buffer, size_t count, int num = sscanf(tmp, "%d %d %d", &recovery, &clear, &segment); + if (num != 3) { + RTW_INFO("Invalid format\n"); + return count; + } + rtw_hal_iqk_test(padapter, recovery, clear, segment); } @@ -6038,6 +6862,11 @@ ssize_t proc_set_lck(struct file *file, const char __user *buffer, size_t count, int num = sscanf(tmp, "%d", &trigger); + if (num != 1) { + RTW_INFO("Invalid format\n"); + return count; + } + rtw_hal_lck_test(padapter); } @@ -6045,6 +6874,171 @@ ssize_t proc_set_lck(struct file *file, const char __user *buffer, size_t count, } #endif /* CONFIG_DBG_RF_CAL */ +#ifdef CONFIG_LPS_CHK_BY_TP +ssize_t proc_set_lps_chk_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); + char tmp[32]; + u32 enable = 0; + u32 lps_tx_tp = 0, lps_rx_tp = 0, lps_bi_tp = 0; + int lps_chk_cnt_th = 0; + u32 lps_tx_pkts = 0, lps_rx_pkts = 0; + + if (buffer == NULL) { + RTW_INFO("input buffer is NULL!\n"); + return -EFAULT; + } + + if (count < 1) { + RTW_INFO("input length is 0!\n"); + return -EFAULT; + } + + if (count > sizeof(tmp)) { + RTW_INFO("input length is too large\n"); + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + int num = sscanf(tmp, "%u %u %u %u %d %u %u", + &enable, &lps_tx_tp, &lps_rx_tp, &lps_bi_tp, + &lps_chk_cnt_th, &lps_tx_pkts, &lps_rx_pkts); + + if (num < 1) { + RTW_INFO("input parameters < 1\n"); + return -EINVAL; + } + pwrpriv->lps_chk_by_tp = enable; + + if (lps_tx_tp) { + pwrpriv->lps_tx_tp_th = lps_tx_tp; + pwrpriv->lps_rx_tp_th = lps_tx_tp; + pwrpriv->lps_bi_tp_th = lps_tx_tp; + } + if (lps_rx_tp) + pwrpriv->lps_rx_tp_th = lps_rx_tp; + if (lps_bi_tp) + pwrpriv->lps_bi_tp_th = lps_bi_tp; + + if (lps_chk_cnt_th) + pwrpriv->lps_chk_cnt_th = lps_chk_cnt_th; + + if (lps_tx_pkts) + pwrpriv->lps_tx_pkts = lps_tx_pkts; + + if (lps_rx_pkts) + pwrpriv->lps_rx_pkts = lps_rx_pkts; + + RTW_INFO("%s lps_chk_by_tp:%s , lps_tx_tp_th:%d, lps_tx_tp_th:%d, lps_bi_tp:%d\n", + __func__, pwrpriv->lps_chk_by_tp ? "Y" : "N", + pwrpriv->lps_tx_tp_th, pwrpriv->lps_tx_tp_th, pwrpriv->lps_bi_tp_th); + RTW_INFO("%s lps_chk_cnt_th:%d , lps_tx_pkts:%d, lps_rx_pkts:%d\n", + __func__, pwrpriv->lps_chk_cnt_th, pwrpriv->lps_tx_pkts, pwrpriv->lps_rx_pkts); + } + + return count; +} + +int proc_get_lps_chk_tp(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); + + RTW_PRINT_SEL(m, "LPS chk by tp - %s\n", pwrpriv->lps_chk_by_tp ? "enable" : "disable"); + RTW_PRINT_SEL(m, "LPS Tx TP TH - %d(Mbps)\n", pwrpriv->lps_tx_tp_th); + RTW_PRINT_SEL(m, "LPS Rx TP TH - %d(Mbps)\n", pwrpriv->lps_rx_tp_th); + RTW_PRINT_SEL(m, "LPS BI TP TH - %d(Mbps)\n", pwrpriv->lps_bi_tp_th); + + RTW_PRINT_SEL(m, "LPS CHK CNT - %d\n", pwrpriv->lps_chk_cnt_th); + RTW_PRINT_SEL(m, "LPS Tx PKTs - %d\n", pwrpriv->lps_tx_pkts); + RTW_PRINT_SEL(m, "LPS Rx PKTs - %d\n", pwrpriv->lps_rx_pkts); + return 0; +} +#endif /*CONFIG_LPS_CHK_BY_TP*/ +#ifdef CONFIG_SUPPORT_STATIC_SMPS +ssize_t proc_set_smps(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); + char tmp[32]; + u32 enable = 0; + u32 smps_en, smps_tx_tp = 0, smps_rx_tp = 0; + u32 smps_test = 0, smps_test_en = 0; + + if (buffer == NULL) { + RTW_INFO("input buffer is NULL!\n"); + return -EFAULT; + } + + if (count < 1) { + RTW_INFO("input length is 0!\n"); + return -EFAULT; + } + + if (count > sizeof(tmp)) { + RTW_INFO("input length is too large\n"); + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + int num = sscanf(tmp, "%u %u %u %u %u", &smps_en, &smps_tx_tp, &smps_rx_tp, + &smps_test, &smps_test_en); + + if (num < 1) { + RTW_INFO("input parameters < 1\n"); + return -EINVAL; + } + + pmlmeext->ssmps_en = smps_en; + if (smps_tx_tp) { + pmlmeext->ssmps_tx_tp_th= smps_tx_tp; + pmlmeext->ssmps_rx_tp_th= smps_tx_tp; + } + if (smps_rx_tp) + pmlmeext->ssmps_rx_tp_th = smps_rx_tp; + + #ifdef DBG_STATIC_SMPS + if (num > 3) { + pmlmeext->ssmps_test = smps_test; + pmlmeext->ssmps_test_en = smps_test_en; + } + #endif + RTW_INFO("SM PS : %s tx_tp_th:%d, rx_tp_th:%d\n", + (smps_en) ? "Enable" : "Disable", + pmlmeext->ssmps_tx_tp_th, + pmlmeext->ssmps_rx_tp_th); + #ifdef DBG_STATIC_SMPS + RTW_INFO("SM PS : %s ssmps_test_en:%d\n", + (smps_test) ? "Enable" : "Disable", + pmlmeext->ssmps_test_en); + #endif + } + + return count; +} + +int proc_get_smps(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); + + RTW_PRINT_SEL(m, "Static SMPS %s\n", pmlmeext->ssmps_en ? "enable" : "disable"); + RTW_PRINT_SEL(m, "Tx TP TH %d\n", pmlmeext->ssmps_tx_tp_th); + RTW_PRINT_SEL(m, "Rx TP TH %d\n", pmlmeext->ssmps_rx_tp_th); + #ifdef DBG_STATIC_SMPS + RTW_PRINT_SEL(m, "test %d, test_en:%d\n", pmlmeext->ssmps_test, pmlmeext->ssmps_test_en); + #endif + return 0; +} +#endif /*CONFIG_SUPPORT_STATIC_SMPS*/ + #endif /* CONFIG_PROC_DEBUG */ #define RTW_BUFDUMP_BSIZE 16 #if 1 diff --git a/core/rtw_eeprom.c b/core/rtw_eeprom.c index d48996e..62c0be0 100644 --- a/core/rtw_eeprom.c +++ b/core/rtw_eeprom.c @@ -156,20 +156,6 @@ out: void eeprom_write16(_adapter *padapter, u16 reg, u16 data) { u8 x; -#ifdef CONFIG_RTL8712 - u8 tmp8_ori, tmp8_new, tmp8_clk_ori, tmp8_clk_new; - tmp8_ori = rtw_read8(padapter, 0x102502f1); - tmp8_new = tmp8_ori & 0xf7; - if (tmp8_ori != tmp8_new) { - rtw_write8(padapter, 0x102502f1, tmp8_new); - } - tmp8_clk_ori = rtw_read8(padapter, 0x10250003); - tmp8_clk_new = tmp8_clk_ori | 0x20; - if (tmp8_clk_new != tmp8_clk_ori) { - rtw_write8(padapter, 0x10250003, tmp8_clk_new); - } -#endif - x = rtw_read8(padapter, EE_9346CR); x &= ~(_EEDI | _EEDO | _EESK | _EEM0); @@ -221,13 +207,6 @@ void eeprom_write16(_adapter *padapter, u16 reg, u16 data) eeprom_clean(padapter); exit: -#ifdef CONFIG_RTL8712 - if (tmp8_clk_new != tmp8_clk_ori) - rtw_write8(padapter, 0x10250003, tmp8_clk_ori); - if (tmp8_new != tmp8_ori) - rtw_write8(padapter, 0x102502f1, tmp8_ori); - -#endif return; } @@ -236,19 +215,6 @@ u16 eeprom_read16(_adapter *padapter, u16 reg) /* ReadEEprom */ u16 x; u16 data = 0; -#ifdef CONFIG_RTL8712 - u8 tmp8_ori, tmp8_new, tmp8_clk_ori, tmp8_clk_new; - tmp8_ori = rtw_read8(padapter, 0x102502f1); - tmp8_new = tmp8_ori & 0xf7; - if (tmp8_ori != tmp8_new) { - rtw_write8(padapter, 0x102502f1, tmp8_new); - } - tmp8_clk_ori = rtw_read8(padapter, 0x10250003); - tmp8_clk_new = tmp8_clk_ori | 0x20; - if (tmp8_clk_new != tmp8_clk_ori) { - rtw_write8(padapter, 0x10250003, tmp8_clk_new); - } -#endif if (rtw_is_surprise_removed(padapter)) { goto out; @@ -274,13 +240,7 @@ u16 eeprom_read16(_adapter *padapter, u16 reg) /* ReadEEprom */ eeprom_clean(padapter); out: -#ifdef CONFIG_RTL8712 - if (tmp8_clk_new != tmp8_clk_ori) - rtw_write8(padapter, 0x10250003, tmp8_clk_ori); - if (tmp8_new != tmp8_ori) - rtw_write8(padapter, 0x102502f1, tmp8_ori); -#endif return data; @@ -361,7 +321,7 @@ u8 eeprom_read(_adapter *padapter, u32 addr_off, u8 sz, u8 *rbuf) -VOID read_eeprom_content(_adapter *padapter) +void read_eeprom_content(_adapter *padapter) { diff --git a/core/rtw_ieee80211.c b/core/rtw_ieee80211.c index 4609336..4644920 100644 --- a/core/rtw_ieee80211.c +++ b/core/rtw_ieee80211.c @@ -33,26 +33,40 @@ u8 WPA_CIPHER_SUITE_CCMP[] = { 0x00, 0x50, 0xf2, 4 }; u8 WPA_CIPHER_SUITE_WEP104[] = { 0x00, 0x50, 0xf2, 5 }; u16 RSN_VERSION_BSD = 1; -u8 RSN_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x0f, 0xac, 1 }; -u8 RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x0f, 0xac, 2 }; u8 RSN_CIPHER_SUITE_NONE[] = { 0x00, 0x0f, 0xac, 0 }; u8 RSN_CIPHER_SUITE_WEP40[] = { 0x00, 0x0f, 0xac, 1 }; u8 RSN_CIPHER_SUITE_TKIP[] = { 0x00, 0x0f, 0xac, 2 }; u8 RSN_CIPHER_SUITE_WRAP[] = { 0x00, 0x0f, 0xac, 3 }; u8 RSN_CIPHER_SUITE_CCMP[] = { 0x00, 0x0f, 0xac, 4 }; u8 RSN_CIPHER_SUITE_WEP104[] = { 0x00, 0x0f, 0xac, 5 }; + +u8 WLAN_AKM_8021X[] = {0x00, 0x0f, 0xac, 1}; +u8 WLAN_AKM_PSK[] = {0x00, 0x0f, 0xac, 2}; +u8 WLAN_AKM_FT_8021X[] = {0x00, 0x0f, 0xac, 3}; +u8 WLAN_AKM_FT_PSK[] = {0x00, 0x0f, 0xac, 4}; +u8 WLAN_AKM_8021X_SHA256[] = {0x00, 0x0f, 0xac, 5}; +u8 WLAN_AKM_PSK_SHA256[] = {0x00, 0x0f, 0xac, 6}; +u8 WLAN_AKM_TDLS[] = {0x00, 0x0f, 0xac, 7}; +u8 WLAN_AKM_SAE[] = {0x00, 0x0f, 0xac, 8}; +u8 WLAN_AKM_FT_OVER_SAE[] = {0x00, 0x0f, 0xac, 9}; +u8 WLAN_AKM_8021X_SUITE_B[] = {0x00, 0x0f, 0xac, 11}; +u8 WLAN_AKM_8021X_SUITE_B_192[] = {0x00, 0x0f, 0xac, 12}; +u8 WLAN_AKM_FILS_SHA256[] = {0x00, 0x0f, 0xac, 14}; +u8 WLAN_AKM_FILS_SHA384[] = {0x00, 0x0f, 0xac, 15}; +u8 WLAN_AKM_FT_FILS_SHA256[] = {0x00, 0x0f, 0xac, 16}; +u8 WLAN_AKM_FT_FILS_SHA384[] = {0x00, 0x0f, 0xac, 17}; /* ----------------------------------------------------------- * for adhoc-master to generate ie and provide supported-rate to fw * ----------------------------------------------------------- */ -static u8 WIFI_CCKRATES[] = { +u8 WIFI_CCKRATES[] = { (IEEE80211_CCK_RATE_1MB | IEEE80211_BASIC_RATE_MASK), (IEEE80211_CCK_RATE_2MB | IEEE80211_BASIC_RATE_MASK), (IEEE80211_CCK_RATE_5MB | IEEE80211_BASIC_RATE_MASK), (IEEE80211_CCK_RATE_11MB | IEEE80211_BASIC_RATE_MASK) }; -static u8 WIFI_OFDMRATES[] = { +u8 WIFI_OFDMRATES[] = { (IEEE80211_OFDM_RATE_6MB), (IEEE80211_OFDM_RATE_9MB), (IEEE80211_OFDM_RATE_12MB), @@ -127,6 +141,19 @@ int rtw_get_bit_value_from_ieee_value(u8 val) } return 0; } +uint rtw_get_cckrate_size(u8 *rate, u32 rate_length) +{ + int i = 0; + while(i < rate_length){ + RTW_DBG("%s, rate[%d]=%u\n", __FUNCTION__, i, rate[i]); + if (((rate[i] & 0x7f) == 2) || ((rate[i] & 0x7f) == 4) || + ((rate[i] & 0x7f) == 11) || ((rate[i] & 0x7f) == 22)) + i++; + else + break; + } + return i; +} uint rtw_is_cckrates_included(u8 *rate) { @@ -410,6 +437,72 @@ void rtw_set_supported_rate(u8 *SupportedRates, uint mode) } } +void rtw_filter_suppport_rateie(WLAN_BSSID_EX *pbss_network, u8 keep) +{ + u8 i, idx = 0, new_rate[NDIS_802_11_LENGTH_RATES_EX], *p; + int ret = 0; + uint iscck, isofdm, ie_orilen = 0, remain_len; + u8 *remain_ies; + + p = rtw_get_ie(pbss_network->IEs + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_orilen, (pbss_network->IELength - _BEACON_IE_OFFSET_)); + if (!p) + return; + + _rtw_memset(new_rate, 0, NDIS_802_11_LENGTH_RATES_EX); + for (i=0; i < ie_orilen; i++) { + iscck = rtw_is_cck_rate(p[i+2]); + isofdm= rtw_is_ofdm_rate(p[i+2]); + if (((keep == CCK) && iscck) + || ((keep == OFDM) && isofdm)) + new_rate[idx++]= rtw_is_basic_rate_ofdm(p[i+2]) ? p[i+2]|IEEE80211_BASIC_RATE_MASK : p[i+2]; + } + /* update rate ie */ + p[1] = idx; + _rtw_memcpy(p+2, new_rate, idx); + /* update remain ie & IELength*/ + remain_ies = p + 2 + ie_orilen; + remain_len = pbss_network->IELength - (remain_ies - pbss_network->IEs); + _rtw_memmove(p+2+idx, remain_ies, remain_len); + pbss_network->IELength -= (ie_orilen - idx); +} + + +/* + Adjust those items by given wireless_mode + 1. pbss_network->IELength + 2. pbss_network->IE (SUPPORTRATE & EXT_SUPPORTRATE) + 3. pbss_network->SupportedRates +*/ + +u8 rtw_update_rate_bymode(WLAN_BSSID_EX *pbss_network, u32 mode) +{ + u8 network_type, *p, *ie = pbss_network->IEs; + sint ie_len; + uint network_ielen = pbss_network->IELength; + + if (mode == WIRELESS_11B) { + /*only keep CCK in support_rate IE and remove whole ext_support_rate IE*/ + rtw_filter_suppport_rateie(pbss_network, CCK); + p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_); + if (p) { + rtw_ies_remove_ie(ie , &network_ielen, _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, NULL, 0); + pbss_network->IELength -= ie_len; + } + network_type = WIRELESS_11B; + } else if ((mode & WIRELESS_11B) == 0) { + /* Remove CCK in support_rate IE */ + rtw_filter_suppport_rateie(pbss_network, OFDM); + if (pbss_network->Configuration.DSConfig > 14) + network_type = WIRELESS_11A; + else + network_type = WIRELESS_11G; + } else + network_type = WIRELESS_11BG; /* do nothing */ + + rtw_set_supported_rate(pbss_network->SupportedRates, network_type); + return network_type; +} + uint rtw_get_rateset_len(u8 *rateset) { uint i = 0; @@ -496,7 +589,7 @@ int rtw_generate_ie(struct registry_priv *pregistrypriv) #ifdef CONFIG_80211N_HT /* HT Cap. */ - if (((pregistrypriv->wireless_mode & WIRELESS_11_5N) || (pregistrypriv->wireless_mode & WIRELESS_11_24N)) + if (is_supported_ht(pregistrypriv->wireless_mode) && (pregistrypriv->ht_enable == _TRUE)) { /* todo: */ } @@ -602,8 +695,44 @@ int rtw_get_wpa2_cipher_suite(u8 *s) return 0; } +u32 rtw_get_akm_suite_bitmap(u8 *s) +{ + if (_rtw_memcmp(s, WLAN_AKM_8021X, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_8021X; + if (_rtw_memcmp(s, WLAN_AKM_PSK, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_PSK; + if (_rtw_memcmp(s, WLAN_AKM_FT_8021X, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_FT_8021X; + if (_rtw_memcmp(s, WLAN_AKM_FT_PSK, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_FT_PSK; + if (_rtw_memcmp(s, WLAN_AKM_8021X_SHA256, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_8021X_SHA256; + if (_rtw_memcmp(s, WLAN_AKM_PSK_SHA256, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_PSK_SHA256; + if (_rtw_memcmp(s, WLAN_AKM_TDLS, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_TDLS; + if (_rtw_memcmp(s, WLAN_AKM_SAE, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_SAE; + if (_rtw_memcmp(s, WLAN_AKM_FT_OVER_SAE, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_FT_OVER_SAE; + if (_rtw_memcmp(s, WLAN_AKM_8021X_SUITE_B, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_8021X_SUITE_B; + if (_rtw_memcmp(s, WLAN_AKM_8021X_SUITE_B_192, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_8021X_SUITE_B_192; + if (_rtw_memcmp(s, WLAN_AKM_FILS_SHA256, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_FILS_SHA256; + if (_rtw_memcmp(s, WLAN_AKM_FILS_SHA384, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_FILS_SHA384; + if (_rtw_memcmp(s, WLAN_AKM_FT_FILS_SHA256, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_FT_FILS_SHA256; + if (_rtw_memcmp(s, WLAN_AKM_FT_FILS_SHA384, RSN_SELECTOR_LEN) == _TRUE) + return WLAN_AKM_TYPE_FT_FILS_SHA384; -int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x) + return 0; +} + +int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, + int *pairwise_cipher, u32 *akm) { int i, ret = _SUCCESS; int left, count; @@ -662,11 +791,11 @@ int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwis return _FAIL; } - if (is_8021x) { + if (akm) { if (left >= 6) { pos += 2; if (_rtw_memcmp(pos, SUITE_1X, 4) == 1) { - *is_8021x = 1; + *akm = WLAN_AKM_TYPE_8021X; } } } @@ -677,7 +806,6 @@ int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwis int rtw_rsne_info_parse(const u8 *ie, uint ie_len, struct rsne_info *info) { - int i; const u8 *pos = ie; u16 cnt; @@ -775,11 +903,11 @@ err: return _FAIL; } -int rtw_parse_wpa2_ie(u8 *rsn_ie, int rsn_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x, u8 *mfp_opt) +int rtw_parse_wpa2_ie(u8 *rsn_ie, int rsn_ie_len, int *group_cipher, + int *pairwise_cipher, u32 *akm, u8 *mfp_opt) { struct rsne_info info; int i, ret = _SUCCESS; - u8 SUITE_1X[4] = {0x00, 0x0f, 0xac, 0x01}; ret = rtw_rsne_info_parse(rsn_ie, rsn_ie_len, &info); if (ret != _SUCCESS) @@ -798,11 +926,10 @@ int rtw_parse_wpa2_ie(u8 *rsn_ie, int rsn_ie_len, int *group_cipher, int *pairwi *pairwise_cipher |= rtw_get_wpa2_cipher_suite(info.pcs_list + 4 * i); } - if (is_8021x) { - *is_8021x = 0; - /* here only check the first AKM suite */ - if (info.akm_cnt && _rtw_memcmp(SUITE_1X, info.akm_list, 4) == _TRUE) - *is_8021x = 1; + if (akm) { + *akm = 0; + for (i = 0; i < info.akm_cnt; i++) + *akm |= rtw_get_akm_suite_bitmap(info.akm_list + 4 * i); } if (mfp_opt) { @@ -819,7 +946,7 @@ exit: int rtw_get_wapi_ie(u8 *in_ie, uint in_len, u8 *wapi_ie, u16 *wapi_len) { int len = 0; - u8 authmode, i; + u8 authmode; uint cnt; u8 wapi_oui1[4] = {0x0, 0x14, 0x72, 0x01}; u8 wapi_oui2[4] = {0x0, 0x14, 0x72, 0x02}; @@ -862,7 +989,7 @@ int rtw_get_wapi_ie(u8 *in_ie, uint in_len, u8 *wapi_ie, u16 *wapi_len) int rtw_get_sec_ie(u8 *in_ie, uint in_len, u8 *rsn_ie, u16 *rsn_len, u8 *wpa_ie, u16 *wpa_len) { - u8 authmode, sec_idx, i; + u8 authmode, sec_idx; u8 wpa_oui[4] = {0x0, 0x50, 0xf2, 0x01}; uint cnt; @@ -1543,10 +1670,6 @@ void dump_ht_cap_ie_content(void *sel, const u8 *buf, u32 buf_len) void dump_ht_cap_ie(void *sel, const u8 *ie, u32 ie_len) { - const u8 *pos = ie; - u16 id; - u16 len; - const u8 *ht_cap_ie; sint ht_cap_ielen; @@ -1580,10 +1703,6 @@ void dump_ht_op_ie_content(void *sel, const u8 *buf, u32 buf_len) void dump_ht_op_ie(void *sel, const u8 *ie, u32 ie_len) { - const u8 *pos = ie; - u16 id; - u16 len; - const u8 *ht_op_ie; sint ht_op_ielen; @@ -1841,7 +1960,7 @@ u32 rtw_get_p2p_merged_ies_len(u8 *in_ie, u32 in_len) PNDIS_802_11_VARIABLE_IEs pIE; u8 OUI[4] = { 0x50, 0x6f, 0x9a, 0x09 }; int i = 0; - int j = 0, len = 0; + int len = 0; while (i < in_len) { pIE = (PNDIS_802_11_VARIABLE_IEs)(in_ie + i); diff --git a/core/rtw_io.c b/core/rtw_io.c index cb8e6b8..852267e 100644 --- a/core/rtw_io.c +++ b/core/rtw_io.c @@ -47,10 +47,6 @@ jackson@realtek.com.tw #include #include -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) - #error "Shall be Linux or Windows, but not both!\n" -#endif - #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_PLATFORM_RTL8197D) #define rtw_le16_to_cpu(val) val #define rtw_le32_to_cpu(val) val @@ -419,9 +415,13 @@ u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int ret = _rtw_write_port(adapter, addr, cnt, pmem); - if (ret == _SUCCESS) + if (ret == _SUCCESS) { ret = rtw_sctx_wait(&sctx, __func__); + if (ret != _SUCCESS) + pxmitbuf->sctx = NULL; + } + return ret; } @@ -484,39 +484,209 @@ void rtw_reset_continual_io_error(struct dvobj_priv *dvobj) } #ifdef DBG_IO +#define RTW_IO_SNIFF_TYPE_RANGE 0 /* specific address range is accessed */ +#define RTW_IO_SNIFF_TYPE_VALUE 1 /* value match for sniffed range */ -u32 read_sniff_ranges[][2] = { - /* {0x520, 0x523}, */ +struct rtw_io_sniff_ent { + u8 chip; + u8 hci; + u32 addr; + u8 type; + union { + u32 end_addr; + struct { + u32 mask; + u32 val; + bool equal; + } vm; /* value match */ + } u; + bool trace; + char *tag; }; -u32 write_sniff_ranges[][2] = { - /* {0x520, 0x523}, */ - /* {0x4c, 0x4c}, */ +#define RTW_IO_SNIFF_RANGE_ENT(_chip, _hci, _addr, _end_addr, _trace, _tag) \ + {.chip = _chip, .hci = _hci, .addr = _addr, .u.end_addr = _end_addr, .trace = _trace, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_RANGE,} + +#define RTW_IO_SNIFF_VALUE_ENT(_chip, _hci, _addr, _mask, _val, _equal, _trace, _tag) \ + {.chip = _chip, .hci = _hci, .addr = _addr, .u.vm.mask = _mask, .u.vm.val = _val, .u.vm.equal = _equal, .trace = _trace, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_VALUE,} + +/* part or all sniffed range is enabled (not all 0) */ +#define RTW_IO_SNIFF_EN_ENT(_chip, _hci, _addr, _mask, _trace, _tag) \ + {.chip = _chip, .hci = _hci, .addr = _addr, .u.vm.mask = _mask, .u.vm.val = 0, .u.vm.equal = 0, .trace = _trace, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_VALUE,} + +/* part or all sniffed range is disabled (not all 1) */ +#define RTW_IO_SNIFF_DIS_ENT(_chip, _hci, _addr, _mask, _trace, _tag) \ + {.chip = _chip, .hci = _hci, .addr = _addr, .u.vm.mask = _mask, .u.vm.val = 0xFFFFFFFF, .u.vm.equal = 0, .trace = _trace, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_VALUE,} + +const struct rtw_io_sniff_ent read_sniff[] = { +#ifdef DBG_IO_HCI_EN_CHK + RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_SDIO, 0x02, 0x1FC, 1, "SDIO 0x02[8:2] not all 0"), + RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_USB, 0x02, 0x1E0, 1, "USB 0x02[8:5] not all 0"), + RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_PCIE, 0x02, 0x01C, 1, "PCI 0x02[4:2] not all 0"), +#endif +#ifdef DBG_IO_SNIFF_EXAMPLE + RTW_IO_SNIFF_RANGE_ENT(MAX_CHIP_TYPE, 0, 0x522, 0x522, 0, "read TXPAUSE"), + RTW_IO_SNIFF_DIS_ENT(MAX_CHIP_TYPE, 0, 0x02, 0x3, 0, "0x02[1:0] not all 1"), +#endif }; -int read_sniff_num = sizeof(read_sniff_ranges) / sizeof(u32) / 2; -int write_sniff_num = sizeof(write_sniff_ranges) / sizeof(u32) / 2; +const int read_sniff_num = sizeof(read_sniff) / sizeof(struct rtw_io_sniff_ent); -bool match_read_sniff_ranges(u32 addr, u16 len) +const struct rtw_io_sniff_ent write_sniff[] = { +#ifdef DBG_IO_HCI_EN_CHK + RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_SDIO, 0x02, 0x1FC, 1, "SDIO 0x02[8:2] not all 0"), + RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_USB, 0x02, 0x1E0, 1, "USB 0x02[8:5] not all 0"), + RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_PCIE, 0x02, 0x01C, 1, "PCI 0x02[4:2] not all 0"), +#endif +#ifdef DBG_IO_8822C_1TX_PATH_EN + RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x1a04, 0xc0000000, 0x02, 1, 0, "write tx_path_en_cck A enabled"), + RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x1a04, 0xc0000000, 0x01, 1, 0, "write tx_path_en_cck B enabled"), + RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x1a04, 0xc0000000, 0x03, 1, 1, "write tx_path_en_cck AB enabled"), + RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x03, 0x01, 1, 0, "write tx_path_en_ofdm_1sts A enabled"), + RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x03, 0x02, 1, 0, "write tx_path_en_ofdm_1sts B enabled"), + RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x03, 0x03, 1, 1, "write tx_path_en_ofdm_1sts AB enabled"), + RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x30, 0x01, 1, 0, "write tx_path_en_ofdm_2sts A enabled"), + RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x30, 0x02, 1, 0, "write tx_path_en_ofdm_2sts B enabled"), + RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x30, 0x03, 1, 1, "write tx_path_en_ofdm_2sts AB enabled"), +#endif +#ifdef DBG_IO_SNIFF_EXAMPLE + RTW_IO_SNIFF_RANGE_ENT(MAX_CHIP_TYPE, 0, 0x522, 0x522, 0, "write TXPAUSE"), + RTW_IO_SNIFF_DIS_ENT(MAX_CHIP_TYPE, 0, 0x02, 0x3, 0, "0x02[1:0] not all 1"), +#endif +}; + +const int write_sniff_num = sizeof(write_sniff) / sizeof(struct rtw_io_sniff_ent); + +static bool match_io_sniff_ranges(_adapter *adapter + , const struct rtw_io_sniff_ent *sniff, int i, u32 addr, u16 len) { - int i; - for (i = 0; i < read_sniff_num; i++) { - if (addr + len > read_sniff_ranges[i][0] && addr <= read_sniff_ranges[i][1]) - return _TRUE; - } - return _FALSE; + /* check if IO range after sniff end address */ + if (addr > sniff->u.end_addr) + return 0; + + return 1; } -bool match_write_sniff_ranges(u32 addr, u16 len) +static bool match_io_sniff_value(_adapter *adapter + , const struct rtw_io_sniff_ent *sniff, int i, u32 addr, u8 len, u32 val) { - int i; - for (i = 0; i < write_sniff_num; i++) { - if (addr + len > write_sniff_ranges[i][0] && addr <= write_sniff_ranges[i][1]) - return _TRUE; + u8 sniff_len; + s8 mask_shift; + u32 mask; + s8 value_shift; + u32 value; + bool ret = 0; + + /* check if IO range after sniff end address */ + sniff_len = 4; + while (!(sniff->u.vm.mask & (0xFF << ((sniff_len - 1) * 8)))) { + sniff_len--; + if (sniff_len == 0) + goto exit; + } + if (sniff->addr + sniff_len <= addr) + goto exit; + + /* align to IO addr */ + mask_shift = (sniff->addr - addr) * 8; + value_shift = mask_shift + bitshift(sniff->u.vm.mask); + if (mask_shift > 0) + mask = sniff->u.vm.mask << mask_shift; + else if (mask_shift < 0) + mask = sniff->u.vm.mask >> -mask_shift; + else + mask = sniff->u.vm.mask; + + if (value_shift > 0) + value = sniff->u.vm.val << value_shift; + else if (mask_shift < 0) + value = sniff->u.vm.val >> -value_shift; + else + value = sniff->u.vm.val; + + if ((sniff->u.vm.equal && (mask & val) == (mask & value)) + || (!sniff->u.vm.equal && (mask & val) != (mask & value)) + ) { + ret = 1; + if (0) + RTW_INFO(FUNC_ADPT_FMT" addr:0x%x len:%u val:0x%x (i:%d sniff_len:%u m_shift:%d mask:0x%x v_shifd:%d value:0x%x equal:%d)\n" + , FUNC_ADPT_ARG(adapter), addr, len, val, i, sniff_len, mask_shift, mask, value_shift, value, sniff->u.vm.equal); } - return _FALSE; +exit: + return ret; +} + +static bool match_io_sniff(_adapter *adapter + , const struct rtw_io_sniff_ent *sniff, int i, u32 addr, u8 len, u32 val) +{ + bool ret = 0; + + if (sniff->chip != MAX_CHIP_TYPE + && sniff->chip != rtw_get_chip_type(adapter)) + goto exit; + if (sniff->hci + && !(sniff->hci & rtw_get_intf_type(adapter))) + goto exit; + if (sniff->addr >= addr + len) /* IO range below sniff start address */ + goto exit; + + switch (sniff->type) { + case RTW_IO_SNIFF_TYPE_RANGE: + ret = match_io_sniff_ranges(adapter, sniff, i, addr, len); + break; + case RTW_IO_SNIFF_TYPE_VALUE: + if (len == 1 || len == 2 || len == 4) + ret = match_io_sniff_value(adapter, sniff, i, addr, len, val); + break; + default: + rtw_warn_on(1); + break; + } + +exit: + return ret; +} + +u32 match_read_sniff(_adapter *adapter, u32 addr, u16 len, u32 val) +{ + int i; + bool trace = 0; + u32 match = 0; + + for (i = 0; i < read_sniff_num; i++) { + if (match_io_sniff(adapter, &read_sniff[i], i, addr, len, val)) { + match++; + trace |= read_sniff[i].trace; + if (read_sniff[i].tag) + RTW_INFO("DBG_IO TAG %s\n", read_sniff[i].tag); + } + } + + rtw_warn_on(trace); + + return match; +} + +u32 match_write_sniff(_adapter *adapter, u32 addr, u16 len, u32 val) +{ + int i; + bool trace = 0; + u32 match = 0; + + for (i = 0; i < write_sniff_num; i++) { + if (match_io_sniff(adapter, &write_sniff[i], i, addr, len, val)) { + match++; + trace |= write_sniff[i].trace; + if (write_sniff[i].tag) + RTW_INFO("DBG_IO TAG %s\n", write_sniff[i].tag); + } + } + + rtw_warn_on(trace); + + return match; } struct rf_sniff_ent { @@ -538,7 +708,7 @@ struct rf_sniff_ent rf_write_sniff_ranges[] = { int rf_read_sniff_num = sizeof(rf_read_sniff_ranges) / sizeof(struct rf_sniff_ent); int rf_write_sniff_num = sizeof(rf_write_sniff_ranges) / sizeof(struct rf_sniff_ent); -bool match_rf_read_sniff_ranges(u8 path, u32 addr, u32 mask) +bool match_rf_read_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask) { int i; @@ -551,7 +721,7 @@ bool match_rf_read_sniff_ranges(u8 path, u32 addr, u32 mask) return _FALSE; } -bool match_rf_write_sniff_ranges(u8 path, u32 addr, u32 mask) +bool match_rf_write_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask) { int i; @@ -568,8 +738,10 @@ u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line { u8 val = _rtw_read8(adapter, addr); - if (match_read_sniff_ranges(addr, 1)) - RTW_INFO("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x\n", caller, line, addr, val); + if (match_read_sniff(adapter, addr, 1, val)) { + RTW_INFO("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x\n" + , caller, line, addr, val); + } return val; } @@ -578,8 +750,10 @@ u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int li { u16 val = _rtw_read16(adapter, addr); - if (match_read_sniff_ranges(addr, 2)) - RTW_INFO("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x\n", caller, line, addr, val); + if (match_read_sniff(adapter, addr, 2, val)) { + RTW_INFO("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x\n" + , caller, line, addr, val); + } return val; } @@ -588,37 +762,47 @@ u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int li { u32 val = _rtw_read32(adapter, addr); - if (match_read_sniff_ranges(addr, 4)) - RTW_INFO("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x\n", caller, line, addr, val); + if (match_read_sniff(adapter, addr, 4, val)) { + RTW_INFO("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x\n" + , caller, line, addr, val); + } return val; } int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line) { - if (match_write_sniff_ranges(addr, 1)) - RTW_INFO("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n", caller, line, addr, val); + if (match_write_sniff(adapter, addr, 1, val)) { + RTW_INFO("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n" + , caller, line, addr, val); + } return _rtw_write8(adapter, addr, val); } int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line) { - if (match_write_sniff_ranges(addr, 2)) - RTW_INFO("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n", caller, line, addr, val); + if (match_write_sniff(adapter, addr, 2, val)) { + RTW_INFO("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n" + , caller, line, addr, val); + } return _rtw_write16(adapter, addr, val); } int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line) { - if (match_write_sniff_ranges(addr, 4)) - RTW_INFO("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n", caller, line, addr, val); + if (match_write_sniff(adapter, addr, 4, val)) { + RTW_INFO("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n" + , caller, line, addr, val); + } return _rtw_write32(adapter, addr, val); } int dbg_rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *data, const char *caller, const int line) { - if (match_write_sniff_ranges(addr, length)) - RTW_INFO("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n", caller, line, addr, length); + if (match_write_sniff(adapter, addr, length, 0)) { + RTW_INFO("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n" + , caller, line, addr, length); + } return _rtw_writeN(adapter, addr, length, data); } @@ -629,8 +813,10 @@ u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const in u8 val = _rtw_sd_f0_read8(adapter, addr); #if 0 - if (match_read_sniff_ranges(addr, 1)) - RTW_INFO("DBG_IO %s:%d rtw_sd_f0_read8(0x%04x) return 0x%02x\n", caller, line, addr, val); + if (match_read_sniff(adapter, addr, 1, val)) { + RTW_INFO("DBG_IO %s:%d rtw_sd_f0_read8(0x%04x) return 0x%02x\n" + , caller, line, addr, val); + } #endif return val; @@ -641,8 +827,10 @@ u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int { u8 val = rtw_sd_iread8(adapter, addr); - if (match_read_sniff_ranges(addr, 1)) - RTW_INFO("DBG_IO %s:%d rtw_sd_iread8(0x%04x) return 0x%02x\n", caller, line, addr, val); + if (match_read_sniff(adapter, addr, 1, val)) { + RTW_INFO("DBG_IO %s:%d rtw_sd_iread8(0x%04x) return 0x%02x\n" + , caller, line, addr, val); + } return val; } @@ -651,8 +839,10 @@ u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const in { u16 val = _rtw_sd_iread16(adapter, addr); - if (match_read_sniff_ranges(addr, 2)) - RTW_INFO("DBG_IO %s:%d rtw_sd_iread16(0x%04x) return 0x%04x\n", caller, line, addr, val); + if (match_read_sniff(adapter, addr, 2, val)) { + RTW_INFO("DBG_IO %s:%d rtw_sd_iread16(0x%04x) return 0x%04x\n" + , caller, line, addr, val); + } return val; } @@ -661,30 +851,38 @@ u32 dbg_rtw_sd_iread32(_adapter *adapter, u32 addr, const char *caller, const in { u32 val = _rtw_sd_iread32(adapter, addr); - if (match_read_sniff_ranges(addr, 4)) - RTW_INFO("DBG_IO %s:%d rtw_sd_iread32(0x%04x) return 0x%08x\n", caller, line, addr, val); + if (match_read_sniff(adapter, addr, 4, val)) { + RTW_INFO("DBG_IO %s:%d rtw_sd_iread32(0x%04x) return 0x%08x\n" + , caller, line, addr, val); + } return val; } int dbg_rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line) { - if (match_write_sniff_ranges(addr, 1)) - RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite8(0x%04x, 0x%02x)\n", caller, line, addr, val); + if (match_write_sniff(adapter, addr, 1, val)) { + RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite8(0x%04x, 0x%02x)\n" + , caller, line, addr, val); + } return _rtw_sd_iwrite8(adapter, addr, val); } int dbg_rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line) { - if (match_write_sniff_ranges(addr, 2)) - RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite16(0x%04x, 0x%04x)\n", caller, line, addr, val); + if (match_write_sniff(adapter, addr, 2, val)) { + RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite16(0x%04x, 0x%04x)\n" + , caller, line, addr, val); + } return _rtw_sd_iwrite16(adapter, addr, val); } int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line) { - if (match_write_sniff_ranges(addr, 4)) - RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite32(0x%04x, 0x%08x)\n", caller, line, addr, val); + if (match_write_sniff(adapter, addr, 4, val)) { + RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite32(0x%04x, 0x%08x)\n" + , caller, line, addr, val); + } return _rtw_sd_iwrite32(adapter, addr, val); } diff --git a/core/rtw_ioctl_query.c b/core/rtw_ioctl_query.c index 6f7613e..9392138 100644 --- a/core/rtw_ioctl_query.c +++ b/core/rtw_ioctl_query.c @@ -17,150 +17,3 @@ #include -#ifdef PLATFORM_WINDOWS -/* - * Added for WPA2-PSK, by Annie, 2005-09-20. - * */ -u8 -query_802_11_capability( - _adapter *Adapter, - u8 *pucBuf, - u32 *pulOutLen -) -{ - static NDIS_802_11_AUTHENTICATION_ENCRYPTION szAuthEnc[] = { - {Ndis802_11AuthModeOpen, Ndis802_11EncryptionDisabled}, - {Ndis802_11AuthModeOpen, Ndis802_11Encryption1Enabled}, - {Ndis802_11AuthModeShared, Ndis802_11EncryptionDisabled}, - {Ndis802_11AuthModeShared, Ndis802_11Encryption1Enabled}, - {Ndis802_11AuthModeWPA, Ndis802_11Encryption2Enabled}, - {Ndis802_11AuthModeWPA, Ndis802_11Encryption3Enabled}, - {Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption2Enabled}, - {Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption3Enabled}, - {Ndis802_11AuthModeWPANone, Ndis802_11Encryption2Enabled}, - {Ndis802_11AuthModeWPANone, Ndis802_11Encryption3Enabled}, - {Ndis802_11AuthModeWPA2, Ndis802_11Encryption2Enabled}, - {Ndis802_11AuthModeWPA2, Ndis802_11Encryption3Enabled}, - {Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption2Enabled}, - {Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption3Enabled} - }; - static ULONG ulNumOfPairSupported = sizeof(szAuthEnc) / sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION); - NDIS_802_11_CAPABILITY *pCap = (NDIS_802_11_CAPABILITY *)pucBuf; - u8 *pucAuthEncryptionSupported = (u8 *) pCap->AuthenticationEncryptionSupported; - - - pCap->Length = sizeof(NDIS_802_11_CAPABILITY); - if (ulNumOfPairSupported > 1) - pCap->Length += (ulNumOfPairSupported - 1) * sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION); - - pCap->Version = 2; - pCap->NoOfPMKIDs = NUM_PMKID_CACHE; - pCap->NoOfAuthEncryptPairsSupported = ulNumOfPairSupported; - - if (sizeof(szAuthEnc) <= 240) /* 240 = 256 - 4*4 */ { /* SecurityInfo.szCapability: only 256 bytes in size. */ - _rtw_memcpy(pucAuthEncryptionSupported, (u8 *)szAuthEnc, sizeof(szAuthEnc)); - *pulOutLen = pCap->Length; - return _TRUE; - } else { - *pulOutLen = 0; - return _FALSE; - } -} - -u8 query_802_11_association_information(_adapter *padapter, PNDIS_802_11_ASSOCIATION_INFORMATION pAssocInfo) -{ - struct wlan_network *tgt_network; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct security_priv *psecuritypriv = &(padapter->securitypriv); - WLAN_BSSID_EX *psecnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; - u8 *pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); - unsigned char i, *auth_ie, *supp_ie; - - /* NdisZeroMemory(pAssocInfo, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)); */ - _rtw_memset(pAssocInfo, 0, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)); - /* pAssocInfo->Length = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); */ - - /* ------------------------------------------------------ */ - /* Association Request related information */ - /* ------------------------------------------------------ */ - /* Req_1. AvailableRequestFixedIEs */ - if (psecnetwork != NULL) { - - pAssocInfo->AvailableRequestFixedIEs |= NDIS_802_11_AI_REQFI_CAPABILITIES | NDIS_802_11_AI_REQFI_CURRENTAPADDRESS; - pAssocInfo->RequestFixedIEs.Capabilities = (unsigned short) *&psecnetwork->IEs[10]; - _rtw_memcpy(pAssocInfo->RequestFixedIEs.CurrentAPAddress, - &psecnetwork->MacAddress, 6); - - pAssocInfo->OffsetRequestIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); - - if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING | _FW_LINKED) == _TRUE) { - - if (psecuritypriv->ndisauthtype >= Ndis802_11AuthModeWPA2) - pDest[0] = 48; /* RSN Information Element */ - else - pDest[0] = 221; /* WPA(SSN) Information Element */ - - supp_ie = &psecuritypriv->supplicant_ie[0]; - - i = 13; /* 0~11 is fixed information element */ - while ((i < supp_ie[0]) && (i < 256)) { - if ((unsigned char)supp_ie[i] == pDest[0]) { - _rtw_memcpy((u8 *)(pDest), - &supp_ie[i], - supp_ie[1 + i] + 2); - - break; - } - - i = i + supp_ie[i + 1] + 2; - if (supp_ie[1 + i] == 0) - i = i + 1; - - } - - - pAssocInfo->RequestIELength += (2 + supp_ie[1 + i]); /* (2 + psecnetwork->IEs[1+i]+4); */ - - } - - - - } - - - /* ------------------------------------------------------ */ - /* Association Response related information */ - /* ------------------------------------------------------ */ - - if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { - tgt_network = &(pmlmepriv->cur_network); - if (tgt_network != NULL) { - pAssocInfo->AvailableResponseFixedIEs = - NDIS_802_11_AI_RESFI_CAPABILITIES - | NDIS_802_11_AI_RESFI_ASSOCIATIONID - ; - - pAssocInfo->ResponseFixedIEs.Capabilities = (unsigned short) *&tgt_network->network.IEs[10]; - pAssocInfo->ResponseFixedIEs.StatusCode = 0; - pAssocInfo->ResponseFixedIEs.AssociationId = (unsigned short) tgt_network->aid; - - pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION) + pAssocInfo->RequestIELength; - auth_ie = &psecuritypriv->authenticator_ie[0]; - - - i = auth_ie[0] - 12; - if (i > 0) { - _rtw_memcpy((u8 *)&pDest[0], &auth_ie[1], i); - pAssocInfo->ResponseIELength = i; - } - - - pAssocInfo->OffsetResponseIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION) + pAssocInfo->RequestIELength; - - - } - } - - return _TRUE; -} -#endif diff --git a/core/rtw_ioctl_rtl.c b/core/rtw_ioctl_rtl.c deleted file mode 100644 index 5d9e76b..0000000 --- a/core/rtw_ioctl_rtl.c +++ /dev/null @@ -1,901 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#define _RTW_IOCTL_RTL_C_ - -#include - -#ifdef CONFIG_MP_INCLUDED - #include -#endif - -struct oid_obj_priv oid_rtl_seg_01_01[] = { - {1, &oid_null_function}, /* 0x80 */ - {1, &oid_null_function}, /* 0x81 */ - {1, &oid_null_function}, /* 0x82 */ - {1, &oid_null_function}, /* 0x83 */ /* OID_RT_SET_SNIFFER_MODE */ - {1, &oid_rt_get_signal_quality_hdl}, /* 0x84 */ - {1, &oid_rt_get_small_packet_crc_hdl}, /* 0x85 */ - {1, &oid_rt_get_middle_packet_crc_hdl}, /* 0x86 */ - {1, &oid_rt_get_large_packet_crc_hdl}, /* 0x87 */ - {1, &oid_rt_get_tx_retry_hdl}, /* 0x88 */ - {1, &oid_rt_get_rx_retry_hdl}, /* 0x89 */ - {1, &oid_rt_pro_set_fw_dig_state_hdl}, /* 0x8A */ - {1, &oid_rt_pro_set_fw_ra_state_hdl} , /* 0x8B */ - {1, &oid_null_function}, /* 0x8C */ - {1, &oid_null_function}, /* 0x8D */ - {1, &oid_null_function}, /* 0x8E */ - {1, &oid_null_function}, /* 0x8F */ - {1, &oid_rt_get_rx_total_packet_hdl}, /* 0x90 */ - {1, &oid_rt_get_tx_beacon_ok_hdl}, /* 0x91 */ - {1, &oid_rt_get_tx_beacon_err_hdl}, /* 0x92 */ - {1, &oid_rt_get_rx_icv_err_hdl}, /* 0x93 */ - {1, &oid_rt_set_encryption_algorithm_hdl}, /* 0x94 */ - {1, &oid_null_function}, /* 0x95 */ - {1, &oid_rt_get_preamble_mode_hdl}, /* 0x96 */ - {1, &oid_null_function}, /* 0x97 */ - {1, &oid_rt_get_ap_ip_hdl}, /* 0x98 */ - {1, &oid_rt_get_channelplan_hdl}, /* 0x99 */ - {1, &oid_rt_set_preamble_mode_hdl}, /* 0x9A */ - {1, &oid_rt_set_bcn_intvl_hdl}, /* 0x9B */ - {1, &oid_null_function}, /* 0x9C */ - {1, &oid_rt_dedicate_probe_hdl}, /* 0x9D */ - {1, &oid_null_function}, /* 0x9E */ - {1, &oid_null_function}, /* 0x9F */ - {1, &oid_null_function}, /* 0xA0 */ - {1, &oid_null_function}, /* 0xA1 */ - {1, &oid_null_function}, /* 0xA2 */ - {1, &oid_null_function}, /* 0xA3 */ - {1, &oid_null_function}, /* 0xA4 */ - {1, &oid_null_function}, /* 0xA5 */ - {1, &oid_null_function}, /* 0xA6 */ - {1, &oid_rt_get_total_tx_bytes_hdl}, /* 0xA7 */ - {1, &oid_rt_get_total_rx_bytes_hdl}, /* 0xA8 */ - {1, &oid_rt_current_tx_power_level_hdl}, /* 0xA9 */ - {1, &oid_rt_get_enc_key_mismatch_count_hdl}, /* 0xAA */ - {1, &oid_rt_get_enc_key_match_count_hdl}, /* 0xAB */ - {1, &oid_rt_get_channel_hdl}, /* 0xAC */ - {1, &oid_rt_set_channelplan_hdl}, /* 0xAD */ - {1, &oid_rt_get_hardware_radio_off_hdl}, /* 0xAE */ - {1, &oid_null_function}, /* 0xAF */ - {1, &oid_null_function}, /* 0xB0 */ - {1, &oid_null_function}, /* 0xB1 */ - {1, &oid_null_function}, /* 0xB2 */ - {1, &oid_null_function}, /* 0xB3 */ - {1, &oid_rt_get_key_mismatch_hdl}, /* 0xB4 */ - {1, &oid_null_function}, /* 0xB5 */ - {1, &oid_null_function}, /* 0xB6 */ - {1, &oid_null_function}, /* 0xB7 */ - {1, &oid_null_function}, /* 0xB8 */ - {1, &oid_null_function}, /* 0xB9 */ - {1, &oid_null_function}, /* 0xBA */ - {1, &oid_rt_supported_wireless_mode_hdl}, /* 0xBB */ - {1, &oid_rt_get_channel_list_hdl}, /* 0xBC */ - {1, &oid_rt_get_scan_in_progress_hdl}, /* 0xBD */ - {1, &oid_null_function}, /* 0xBE */ - {1, &oid_null_function}, /* 0xBF */ - {1, &oid_null_function}, /* 0xC0 */ - {1, &oid_rt_forced_data_rate_hdl}, /* 0xC1 */ - {1, &oid_rt_wireless_mode_for_scan_list_hdl}, /* 0xC2 */ - {1, &oid_rt_get_bss_wireless_mode_hdl}, /* 0xC3 */ - {1, &oid_rt_scan_with_magic_packet_hdl}, /* 0xC4 */ - {1, &oid_null_function}, /* 0xC5 */ - {1, &oid_null_function}, /* 0xC6 */ - {1, &oid_null_function}, /* 0xC7 */ - {1, &oid_null_function}, /* 0xC8 */ - {1, &oid_null_function}, /* 0xC9 */ - {1, &oid_null_function}, /* 0xCA */ - {1, &oid_null_function}, /* 0xCB */ - {1, &oid_null_function}, /* 0xCC */ - {1, &oid_null_function}, /* 0xCD */ - {1, &oid_null_function}, /* 0xCE */ - {1, &oid_null_function}, /* 0xCF */ - -}; - -struct oid_obj_priv oid_rtl_seg_01_03[] = { - {1, &oid_rt_ap_get_associated_station_list_hdl}, /* 0x00 */ - {1, &oid_null_function}, /* 0x01 */ - {1, &oid_rt_ap_switch_into_ap_mode_hdl}, /* 0x02 */ - {1, &oid_null_function}, /* 0x03 */ - {1, &oid_rt_ap_supported_hdl}, /* 0x04 */ - {1, &oid_rt_ap_set_passphrase_hdl}, /* 0x05 */ - -}; - -struct oid_obj_priv oid_rtl_seg_01_11[] = { - {1, &oid_null_function}, /* 0xC0 OID_RT_PRO_RX_FILTER */ - {1, &oid_null_function}, /* 0xC1 OID_CE_USB_WRITE_REGISTRY */ - {1, &oid_null_function}, /* 0xC2 OID_CE_USB_READ_REGISTRY */ - {1, &oid_null_function}, /* 0xC3 OID_RT_PRO_SET_INITIAL_GAIN */ - {1, &oid_null_function}, /* 0xC4 OID_RT_PRO_SET_BB_RF_STANDBY_MODE */ - {1, &oid_null_function}, /* 0xC5 OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE */ - {1, &oid_null_function}, /* 0xC6 OID_RT_PRO_SET_TX_CHARGE_PUMP */ - {1, &oid_null_function}, /* 0xC7 OID_RT_PRO_SET_RX_CHARGE_PUMP */ - {1, &oid_rt_pro_rf_write_registry_hdl}, /* 0xC8 */ - {1, &oid_rt_pro_rf_read_registry_hdl}, /* 0xC9 */ - {1, &oid_null_function} /* 0xCA OID_RT_PRO_QUERY_RF_TYPE */ - -}; - -struct oid_obj_priv oid_rtl_seg_03_00[] = { - {1, &oid_null_function}, /* 0x00 */ - {1, &oid_rt_get_connect_state_hdl}, /* 0x01 */ - {1, &oid_null_function}, /* 0x02 */ - {1, &oid_null_function}, /* 0x03 */ - {1, &oid_rt_set_default_key_id_hdl}, /* 0x04 */ - - -}; - - -/* ************** oid_rtl_seg_01_01 section start ************** */ - -NDIS_STATUS oid_rt_pro_set_fw_dig_state_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - _irqL oldirql; - - - if (poid_par_priv->type_of_oid != SET_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - _irqlevel_changed_(&oldirql, LOWER); - if (poid_par_priv->information_buf_len >= sizeof(struct setdig_parm)) { - /* DEBUG_ERR(("===> oid_rt_pro_set_fw_dig_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf ))); */ - if (!rtw_setfwdig_cmd(Adapter, *((unsigned char *)poid_par_priv->information_buf))) - status = NDIS_STATUS_NOT_ACCEPTED; - - } else - status = NDIS_STATUS_NOT_ACCEPTED; - _irqlevel_changed_(&oldirql, RAISE); -#endif - return status; -} -/* ----------------------------------------------------------------------------- */ -NDIS_STATUS oid_rt_pro_set_fw_ra_state_hdl(struct oid_par_priv *poid_par_priv) -{ - - NDIS_STATUS status = NDIS_STATUS_SUCCESS; -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - _irqL oldirql; - - if (poid_par_priv->type_of_oid != SET_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - - _irqlevel_changed_(&oldirql, LOWER); - - if (poid_par_priv->information_buf_len >= sizeof(struct setra_parm)) { - /* DEBUG_ERR(("===> oid_rt_pro_set_fw_ra_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf ))); */ - if (!rtw_setfwra_cmd(Adapter, *((unsigned char *)poid_par_priv->information_buf))) - status = NDIS_STATUS_NOT_ACCEPTED; - - } else - status = NDIS_STATUS_NOT_ACCEPTED; - _irqlevel_changed_(&oldirql, RAISE); -#endif - return status; -} -/* ----------------------------------------------------------------------------- */ -NDIS_STATUS oid_rt_get_signal_quality_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - /* DEBUG_ERR(("<**********************oid_rt_get_signal_quality_hdl\n")); */ - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - -#if 0 - if (pMgntInfo->mAssoc || pMgntInfo->mIbss) { - ulInfo = pAdapter->RxStats.SignalQuality; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else { - ulInfo = 0xffffffff; /* It stands for -1 in 4-byte integer. */ - } - break; -#endif - - return status; -} - -/* ------------------------------------------------------------------------------ */ - -NDIS_STATUS oid_rt_get_small_packet_crc_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - if (poid_par_priv->information_buf_len >= sizeof(ULONG)) { - *(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_smallpacket_crcerr; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_INVALID_LENGTH; - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_middle_packet_crc_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - if (poid_par_priv->information_buf_len >= sizeof(ULONG)) { - *(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_middlepacket_crcerr; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_INVALID_LENGTH; - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_large_packet_crc_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - if (poid_par_priv->information_buf_len >= sizeof(ULONG)) { - *(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_largepacket_crcerr; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_INVALID_LENGTH; - - - return status; -} - -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_tx_retry_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} -NDIS_STATUS oid_rt_get_rx_retry_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_rx_total_packet_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - if (poid_par_priv->information_buf_len >= sizeof(ULONG)) { - *(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_pkts + padapter->recvpriv.rx_drop; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_INVALID_LENGTH; - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_tx_beacon_ok_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} -NDIS_STATUS oid_rt_get_tx_beacon_err_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_rx_icv_err_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - if (poid_par_priv->information_buf_len >= sizeof(u32)) { - /* _rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32)); */ - *(uint *)poid_par_priv->information_buf = padapter->recvpriv.rx_icv_err; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_INVALID_LENGTH ; - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_set_encryption_algorithm_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != SET_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_preamble_mode_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - ULONG preamblemode = 0 ; - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - if (poid_par_priv->information_buf_len >= sizeof(ULONG)) { - if (padapter->registrypriv.preamble == PREAMBLE_LONG) - preamblemode = 0; - else if (padapter->registrypriv.preamble == PREAMBLE_AUTO) - preamblemode = 1; - else if (padapter->registrypriv.preamble == PREAMBLE_SHORT) - preamblemode = 2; - - - *(ULONG *)poid_par_priv->information_buf = preamblemode ; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_INVALID_LENGTH ; - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_ap_ip_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} - -NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - *(u16 *)poid_par_priv->information_buf = rfctl->ChannelPlan; - - return status; -} -NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); - - if (poid_par_priv->type_of_oid != SET_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - rfctl->ChannelPlan = *(u16 *)poid_par_priv->information_buf; - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_set_preamble_mode_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - ULONG preamblemode = 0; - if (poid_par_priv->type_of_oid != SET_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - if (poid_par_priv->information_buf_len >= sizeof(ULONG)) { - preamblemode = *(ULONG *)poid_par_priv->information_buf ; - if (preamblemode == 0) - padapter->registrypriv.preamble = PREAMBLE_LONG; - else if (preamblemode == 1) - padapter->registrypriv.preamble = PREAMBLE_AUTO; - else if (preamblemode == 2) - padapter->registrypriv.preamble = PREAMBLE_SHORT; - - *(ULONG *)poid_par_priv->information_buf = preamblemode ; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_INVALID_LENGTH ; - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_set_bcn_intvl_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != SET_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} -NDIS_STATUS oid_rt_dedicate_probe_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_total_tx_bytes_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - if (poid_par_priv->information_buf_len >= sizeof(ULONG)) { - *(u64 *)poid_par_priv->information_buf = padapter->xmitpriv.tx_bytes; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_INVALID_LENGTH ; - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_total_rx_bytes_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - if (poid_par_priv->information_buf_len >= sizeof(ULONG)) { - /* _rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32)); */ - *(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_bytes; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_INVALID_LENGTH ; - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_current_tx_power_level_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - return status; -} -NDIS_STATUS oid_rt_get_enc_key_mismatch_count_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} -NDIS_STATUS oid_rt_get_enc_key_match_count_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} -NDIS_STATUS oid_rt_get_channel_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - NDIS_802_11_CONFIGURATION *pnic_Config; - - ULONG channelnum; - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - if ((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || - (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) - pnic_Config = &pmlmepriv->cur_network.network.Configuration; - else - pnic_Config = &padapter->registrypriv.dev_network.Configuration; - - channelnum = pnic_Config->DSConfig; - *(ULONG *)poid_par_priv->information_buf = channelnum; - - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - - - return status; -} -NDIS_STATUS oid_rt_get_hardware_radio_off_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} -NDIS_STATUS oid_rt_get_key_mismatch_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} -NDIS_STATUS oid_rt_supported_wireless_mode_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - ULONG ulInfo = 0 ; - /* DEBUG_ERR(("<**********************oid_rt_supported_wireless_mode_hdl\n")); */ - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - if (poid_par_priv->information_buf_len >= sizeof(ULONG)) { - ulInfo |= 0x0100; /* WIRELESS_MODE_B */ - ulInfo |= 0x0200; /* WIRELESS_MODE_G */ - ulInfo |= 0x0400; /* WIRELESS_MODE_A */ - - *(ULONG *) poid_par_priv->information_buf = ulInfo; - /* DEBUG_ERR(("<===oid_rt_supported_wireless_mode %x\n",ulInfo)); */ - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_INVALID_LENGTH; - - return status; -} -NDIS_STATUS oid_rt_get_channel_list_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} -NDIS_STATUS oid_rt_get_scan_in_progress_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} - - -NDIS_STATUS oid_rt_forced_data_rate_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - return status; -} -NDIS_STATUS oid_rt_wireless_mode_for_scan_list_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - return status; -} -NDIS_STATUS oid_rt_get_bss_wireless_mode_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} - -NDIS_STATUS oid_rt_scan_with_magic_packet_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - return status; -} -/* ************** oid_rtl_seg_01_01 section end ************** */ - -/* ************** oid_rtl_seg_01_03 section start ************** */ -NDIS_STATUS oid_rt_ap_get_associated_station_list_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} -NDIS_STATUS oid_rt_ap_switch_into_ap_mode_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - return status; -} -NDIS_STATUS oid_rt_ap_supported_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - return status; -} -NDIS_STATUS oid_rt_ap_set_passphrase_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != SET_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} - -/* ************** oid_rtl_seg_01_03 section end ************** */ - -/* **************** oid_rtl_seg_01_11 section start **************** */ -NDIS_STATUS oid_rt_pro_rf_write_registry_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - _irqL oldirql; - /* DEBUG_ERR(("<**********************oid_rt_pro_rf_write_registry_hdl\n")); */ - if (poid_par_priv->type_of_oid != SET_OID) { /* QUERY_OID */ - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - _irqlevel_changed_(&oldirql, LOWER); - if (poid_par_priv->information_buf_len == (sizeof(unsigned long) * 3)) { - /* RegOffsetValue - The offset of RF register to write. */ - /* RegDataWidth - The data width of RF register to write. */ - /* RegDataValue - The value to write. */ - /* RegOffsetValue = *((unsigned long*)InformationBuffer); */ - /* RegDataWidth = *((unsigned long*)InformationBuffer+1); */ - /* RegDataValue = *((unsigned long*)InformationBuffer+2); */ - if (!rtw_setrfreg_cmd(Adapter, - *(unsigned char *)poid_par_priv->information_buf, - (unsigned long)(*((unsigned long *)poid_par_priv->information_buf + 2)))) - status = NDIS_STATUS_NOT_ACCEPTED; - - } else - status = NDIS_STATUS_INVALID_LENGTH; - _irqlevel_changed_(&oldirql, RAISE); - - return status; -} - -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_rf_read_registry_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - _irqL oldirql; - - /* DEBUG_ERR(("<**********************oid_rt_pro_rf_read_registry_hdl\n")); */ - if (poid_par_priv->type_of_oid != SET_OID) { /* QUERY_OID */ - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - _irqlevel_changed_(&oldirql, LOWER); - if (poid_par_priv->information_buf_len == (sizeof(unsigned long) * 3)) { - if (Adapter->mppriv.act_in_progress == _TRUE) - status = NDIS_STATUS_NOT_ACCEPTED; - else { - /* init workparam */ - Adapter->mppriv.act_in_progress = _TRUE; - Adapter->mppriv.workparam.bcompleted = _FALSE; - Adapter->mppriv.workparam.act_type = MPT_READ_RF; - Adapter->mppriv.workparam.io_offset = *(unsigned long *)poid_par_priv->information_buf; - Adapter->mppriv.workparam.io_value = 0xcccccccc; - - /* RegOffsetValue - The offset of RF register to read. */ - /* RegDataWidth - The data width of RF register to read. */ - /* RegDataValue - The value to read. */ - /* RegOffsetValue = *((unsigned long*)InformationBuffer); */ - /* RegDataWidth = *((unsigned long*)InformationBuffer+1); */ - /* RegDataValue = *((unsigned long*)InformationBuffer+2); */ - if (!rtw_getrfreg_cmd(Adapter, - *(unsigned char *)poid_par_priv->information_buf, - (unsigned char *)&Adapter->mppriv.workparam.io_value)) - status = NDIS_STATUS_NOT_ACCEPTED; - } - - - } else - status = NDIS_STATUS_INVALID_LENGTH; - _irqlevel_changed_(&oldirql, RAISE); -#endif - return status; -} - -/* **************** oid_rtl_seg_01_11 section end**************** */ - - -/* ************** oid_rtl_seg_03_00 section start ************** */ -enum _CONNECT_STATE_ { - CHECKINGSTATUS, - ASSOCIATED, - ADHOCMODE, - NOTASSOCIATED -}; - -NDIS_STATUS oid_rt_get_connect_state_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - - ULONG ulInfo; - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - /* nStatus==0 CheckingStatus */ - /* nStatus==1 Associated */ - /* nStatus==2 AdHocMode */ - /* nStatus==3 NotAssociated */ - - if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) - ulInfo = CHECKINGSTATUS; - else if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) - ulInfo = ASSOCIATED; - else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) - ulInfo = ADHOCMODE; - else - ulInfo = NOTASSOCIATED ; - - *(ULONG *)poid_par_priv->information_buf = ulInfo; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - -#if 0 - /* Rearrange the order to let the UI still shows connection when scan is in progress */ - if (pMgntInfo->mAssoc) - ulInfo = 1; - else if (pMgntInfo->mIbss) - ulInfo = 2; - else if (pMgntInfo->bScanInProgress) - ulInfo = 0; - else - ulInfo = 3; - ulInfoLen = sizeof(ULONG); -#endif - - return status; -} - -NDIS_STATUS oid_rt_set_default_key_id_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - if (poid_par_priv->type_of_oid != SET_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - return status; -} -/* ************** oid_rtl_seg_03_00 section end ************** */ diff --git a/core/rtw_ioctl_set.c b/core/rtw_ioctl_set.c index 20b6430..08b4bb9 100644 --- a/core/rtw_ioctl_set.c +++ b/core/rtw_ioctl_set.c @@ -42,7 +42,9 @@ u8 rtw_validate_bssid(u8 *bssid) u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid) { +#ifdef CONFIG_VALIDATE_SSID u8 i; +#endif u8 ret = _TRUE; @@ -106,10 +108,17 @@ u8 rtw_do_join(_adapter *padapter) if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _FALSE || rtw_to_roam(padapter) > 0 ) { - /* submit site_survey_cmd */ - ret = rtw_sitesurvey_cmd(padapter, &parm); - if (_SUCCESS != ret) { + u8 ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE); + + if ((ssc_chk == SS_ALLOW) || (ssc_chk == SS_DENY_BUSY_TRAFFIC) ){ + /* submit site_survey_cmd */ + ret = rtw_sitesurvey_cmd(padapter, &parm); + if (_SUCCESS != ret) + pmlmepriv->to_join = _FALSE; + } else { + /*if (ssc_chk == SS_DENY_BUDDY_UNDER_SURVEY)*/ pmlmepriv->to_join = _FALSE; + ret = _FAIL; } } else { pmlmepriv->to_join = _FALSE; @@ -155,26 +164,22 @@ u8 rtw_do_join(_adapter *padapter) /* can't associate ; reset under-linking */ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); -#if 0 - if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) { - if (_rtw_memcmp(pmlmepriv->cur_network.network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength)) { - /* for funk to do roaming */ - /* funk will reconnect, but funk will not sitesurvey before reconnect */ - if (pmlmepriv->sitesurveyctrl.traffic_busy == _FALSE) - rtw_sitesurvey_cmd(padapter, &parm); - } - - } -#endif - /* when set_ssid/set_bssid for rtw_do_join(), but there are no desired bss in scanning queue */ /* we try to issue sitesurvey firstly */ if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _FALSE || rtw_to_roam(padapter) > 0 ) { - /* RTW_INFO("rtw_do_join() when no desired bss in scanning queue\n"); */ - ret = rtw_sitesurvey_cmd(padapter, &parm); - if (_SUCCESS != ret) { + u8 ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE); + + if ((ssc_chk == SS_ALLOW) || (ssc_chk == SS_DENY_BUSY_TRAFFIC)){ + /* RTW_INFO(("rtw_do_join() when no desired bss in scanning queue\n"); */ + ret = rtw_sitesurvey_cmd(padapter, &parm); + if (_SUCCESS != ret) + pmlmepriv->to_join = _FALSE; + } else { + /*if (ssc_chk == SS_DENY_BUDDY_UNDER_SURVEY) { + } else {*/ + ret = _FAIL; pmlmepriv->to_join = _FALSE; } } else { @@ -192,84 +197,6 @@ exit: return ret; } -#ifdef PLATFORM_WINDOWS -u8 rtw_pnp_set_power_wakeup(_adapter *padapter) -{ - u8 res = _SUCCESS; - - - - res = rtw_setstandby_cmd(padapter, 0); - - - - return res; -} - -u8 rtw_pnp_set_power_sleep(_adapter *padapter) -{ - u8 res = _SUCCESS; - - - /* DbgPrint("+rtw_pnp_set_power_sleep\n"); */ - - res = rtw_setstandby_cmd(padapter, 1); - - - - return res; -} - -u8 rtw_set_802_11_reload_defaults(_adapter *padapter, NDIS_802_11_RELOAD_DEFAULTS reloadDefaults) -{ - - - - /* SecClearAllKeys(Adapter); */ - /* 8711 CAM was not for En/Decrypt only */ - /* so, we can't clear all keys. */ - /* should we disable WPAcfg (ox0088) bit 1-2, instead of clear all CAM */ - - /* TO DO... */ - - - return _TRUE; -} - -u8 set_802_11_test(_adapter *padapter, NDIS_802_11_TEST *test) -{ - u8 ret = _TRUE; - - - switch (test->Type) { - case 1: - NdisMIndicateStatus(padapter->hndis_adapter, NDIS_STATUS_MEDIA_SPECIFIC_INDICATION, (PVOID)&test->AuthenticationEvent, test->Length - 8); - NdisMIndicateStatusComplete(padapter->hndis_adapter); - break; - - case 2: - NdisMIndicateStatus(padapter->hndis_adapter, NDIS_STATUS_MEDIA_SPECIFIC_INDICATION, (PVOID)&test->RssiTrigger, sizeof(NDIS_802_11_RSSI)); - NdisMIndicateStatusComplete(padapter->hndis_adapter); - break; - - default: - ret = _FALSE; - break; - } - - - return ret; -} - -u8 rtw_set_802_11_pmkid(_adapter *padapter, NDIS_802_11_PMKID *pmkid) -{ - u8 ret = _SUCCESS; - - return ret; -} - -#endif - u8 rtw_set_802_11_bssid(_adapter *padapter, u8 *bssid) { _irqL irqL; @@ -307,7 +234,7 @@ u8 rtw_set_802_11_bssid(_adapter *padapter, u8 *bssid) if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) rtw_indicate_disconnect(padapter, 0, _FALSE); - rtw_free_assoc_resources_cmd(padapter, _TRUE); + rtw_free_assoc_resources_cmd(padapter, _TRUE, 0); if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); @@ -344,7 +271,6 @@ u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid) { _irqL irqL; u8 status = _SUCCESS; - u32 cur_time = 0; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *pnetwork = &pmlmepriv->cur_network; @@ -379,7 +305,7 @@ u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid) if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) rtw_indicate_disconnect(padapter, 0, _FALSE); - rtw_free_assoc_resources_cmd(padapter, _TRUE); + rtw_free_assoc_resources_cmd(padapter, _TRUE, 0); if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) { _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); @@ -391,7 +317,7 @@ u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid) } #ifdef CONFIG_LPS else - rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_JOINBSS, 1); + rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_JOINBSS, 0); #endif } else { @@ -400,7 +326,7 @@ u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid) if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) rtw_indicate_disconnect(padapter, 0, _FALSE); - rtw_free_assoc_resources_cmd(padapter, _TRUE); + rtw_free_assoc_resources_cmd(padapter, _TRUE, 0); if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) { _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); @@ -442,7 +368,6 @@ u8 rtw_set_802_11_connect(_adapter *padapter, u8 *bssid, NDIS_802_11_SSID *ssid) { _irqL irqL; u8 status = _SUCCESS; - u32 cur_time = 0; bool bssid_valid = _TRUE; bool ssid_valid = _TRUE; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; @@ -538,7 +463,7 @@ u8 rtw_set_802_11_infrastructure_mode(_adapter *padapter, if ((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) - rtw_free_assoc_resources_cmd(padapter, _TRUE); + rtw_free_assoc_resources_cmd(padapter, _TRUE, 0); if ((*pold_state == Ndis802_11Infrastructure) || (*pold_state == Ndis802_11IBSS)) { if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { @@ -612,7 +537,7 @@ u8 rtw_set_802_11_disassociate(_adapter *padapter) rtw_disassoc_cmd(padapter, 0, 0); rtw_indicate_disconnect(padapter, 0, _FALSE); /* modify for CONFIG_IEEE80211W, none 11w can use it */ - rtw_free_assoc_resources_cmd(padapter, _TRUE); + rtw_free_assoc_resources_cmd(padapter, _TRUE, 0); if (_FAIL == rtw_pwr_wakeup(padapter)) RTW_INFO("%s(): rtw_pwr_wakeup fail !!!\n", __FUNCTION__); } @@ -768,10 +693,13 @@ exit: */ u16 rtw_get_cur_max_rate(_adapter *adapter) { + int j; int i = 0; u16 rate = 0, max_rate = 0; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; + int sta_bssrate_len = 0; + unsigned char sta_bssrate[NumRates]; struct sta_info *psta = NULL; u8 short_GI = 0; #ifdef CONFIG_80211N_HT @@ -811,16 +739,38 @@ u16 rtw_get_cur_max_rate(_adapter *adapter) else #endif /* CONFIG_80211N_HT */ { + /*station mode show :station && ap support rate; softap :show ap support rate*/ + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) + get_rate_set(adapter, sta_bssrate, &sta_bssrate_len);/*get sta rate and length*/ + + while ((pcur_bss->SupportedRates[i] != 0) && (pcur_bss->SupportedRates[i] != 0xFF)) { - rate = pcur_bss->SupportedRates[i] & 0x7F; - if (rate > max_rate) - max_rate = rate; + rate = pcur_bss->SupportedRates[i] & 0x7F;/*AP support rates*/ + /*RTW_INFO("%s rate=%02X \n", __func__, rate);*/ + + /*check STA support rate or not */ + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { + for (j = 0; j < sta_bssrate_len; j++) { + /* Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP */ + if ((rate | IEEE80211_BASIC_RATE_MASK) + == (sta_bssrate[j] | IEEE80211_BASIC_RATE_MASK)) { + if (rate > max_rate) { + max_rate = rate; + } + break; + } + } + } else { + + if (rate > max_rate) + max_rate = rate; + + } i++; } max_rate = max_rate * 10 / 2; } - return max_rate; } @@ -850,9 +800,6 @@ int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode) */ int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan) { - struct registry_priv *pregistrypriv = &adapter->registrypriv; - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; - /* handle by cmd_thread to sync with scan operation */ return rtw_set_chplan_cmd(adapter, RTW_CMDF_WAIT_ACK, channel_plan, 1); } diff --git a/core/rtw_iol.c b/core/rtw_iol.c index aafac3f..6063ea6 100644 --- a/core/rtw_iol.c +++ b/core/rtw_iol.c @@ -301,24 +301,30 @@ int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value) #ifdef DBG_IO int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line) { - if (match_write_sniff_ranges(addr, 1)) - RTW_INFO("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x)\n", caller, line, addr, value); + if (match_write_sniff(xmit_frame->padapter, addr, 1, value)) { + RTW_INFO("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x)\n" + , caller, line, addr, value); + } return _rtw_IOL_append_WB_cmd(xmit_frame, addr, value); } int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line) { - if (match_write_sniff_ranges(addr, 2)) - RTW_INFO("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x)\n", caller, line, addr, value); + if (match_write_sniff(xmit_frame->padapter, addr, 2, value)) { + RTW_INFO("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x)\n" + , caller, line, addr, value); + } return _rtw_IOL_append_WW_cmd(xmit_frame, addr, value); } int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line) { - if (match_write_sniff_ranges(addr, 4)) - RTW_INFO("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x)\n", caller, line, addr, value); + if (match_write_sniff(xmit_frame->padapter, addr, 4, value)) { + RTW_INFO("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x)\n" + , caller, line, addr, value); + } return _rtw_IOL_append_WD_cmd(xmit_frame, addr, value); } diff --git a/core/rtw_mi.c b/core/rtw_mi.c index c1a6eff..d41bdb4 100644 --- a/core/rtw_mi.c +++ b/core/rtw_mi.c @@ -27,6 +27,7 @@ void rtw_mi_update_union_chan_inf(_adapter *adapter, u8 ch, u8 offset , u8 bw) iface_state->union_offset = offset; } +#ifdef DBG_IFACE_STATUS #ifdef CONFIG_P2P static u8 _rtw_mi_p2p_listen_scan_chk(_adapter *adapter) { @@ -46,6 +47,8 @@ static u8 _rtw_mi_p2p_listen_scan_chk(_adapter *adapter) return p2p_listen_scan_state; } #endif +#endif + u8 rtw_mi_stayin_union_ch_chk(_adapter *adapter) { u8 rst = _TRUE; @@ -104,9 +107,8 @@ u8 rtw_mi_stayin_union_band_chk(_adapter *adapter) } /* Find union about ch, bw, ch_offset of all linked/linking interfaces */ -int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset, bool include_self) +int rtw_mi_get_ch_setting_union_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, u8 *ch, u8 *bw, u8 *offset) { - struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); _adapter *iface; struct mlme_ext_priv *mlmeext; int i; @@ -124,6 +126,9 @@ int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset, for (i = 0; i < dvobj->iface_nums; i++) { iface = dvobj->padapters[i]; + if (!iface || !(ifbmp & BIT(iface->iface_id))) + continue; + mlmeext = &iface->mlmeextpriv; if (!check_fwstate(&iface->mlmepriv, _FW_LINKED | _FW_UNDER_LINKING)) @@ -132,9 +137,6 @@ int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset, if (check_fwstate(&iface->mlmepriv, WIFI_OP_CH_SWITCHING)) continue; - if (include_self == _FALSE && adapter == iface) - continue; - if (num == 0) { ch_ret = mlmeext->cur_channel; bw_ret = mlmeext->cur_bwmode; @@ -173,22 +175,17 @@ int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset, inline int rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) { - return _rtw_mi_get_ch_setting_union(adapter, ch, bw, offset, 1); + return rtw_mi_get_ch_setting_union_by_ifbmp(adapter_to_dvobj(adapter), 0xFF, ch, bw, offset); } inline int rtw_mi_get_ch_setting_union_no_self(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) { - return _rtw_mi_get_ch_setting_union(adapter, ch, bw, offset, 0); + return rtw_mi_get_ch_setting_union_by_ifbmp(adapter_to_dvobj(adapter), 0xFF & ~BIT(adapter->iface_id), ch, bw, offset); } -#define MI_STATUS_SELF_ONLY 0 -#define MI_STATUS_OTHERS_ONLY 1 -#define MI_STATUS_ALL 2 - /* For now, not return union_ch/bw/offset */ -void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel) +void rtw_mi_status_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, struct mi_state *mstate) { - struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); _adapter *iface; int i; @@ -196,10 +193,7 @@ void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel) for (i = 0; i < dvobj->iface_nums; i++) { iface = dvobj->padapters[i]; - - if (target_sel == MI_STATUS_SELF_ONLY && iface != adapter) - continue; - if (target_sel == MI_STATUS_OTHERS_ONLY && iface == adapter) + if (!iface || !(ifbmp & BIT(iface->iface_id))) continue; if (check_fwstate(&iface->mlmepriv, WIFI_STATION_STATE) == _TRUE) { @@ -211,6 +205,10 @@ void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel) if (iface->tdlsinfo.link_established == _TRUE) MSTATE_TDLS_LD_NUM(mstate)++; #endif + #ifdef CONFIG_P2P + if (MLME_IS_GC(iface)) + MSTATE_P2P_GC_NUM(mstate)++; + #endif } if (check_fwstate(&iface->mlmepriv, _FW_UNDER_LINKING) == _TRUE) MSTATE_STA_LG_NUM(mstate)++; @@ -221,6 +219,10 @@ void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel) MSTATE_AP_NUM(mstate)++; if (iface->stapriv.asoc_sta_count > 2) MSTATE_AP_LD_NUM(mstate)++; + #ifdef CONFIG_P2P + if (MLME_IS_GO(iface)) + MSTATE_P2P_GO_NUM(mstate)++; + #endif } else MSTATE_AP_STARTING_NUM(mstate)++; #endif @@ -262,23 +264,26 @@ void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel) MSTATE_ROCH_NUM(mstate)++; #endif #endif /* CONFIG_IOCTL_CFG80211 */ - +#ifdef CONFIG_P2P + if (MLME_IS_PD(iface)) + MSTATE_P2P_DV_NUM(mstate)++; +#endif } } inline void rtw_mi_status(_adapter *adapter, struct mi_state *mstate) { - return _rtw_mi_status(adapter, mstate, MI_STATUS_ALL); + return rtw_mi_status_by_ifbmp(adapter_to_dvobj(adapter), 0xFF, mstate); } inline void rtw_mi_status_no_self(_adapter *adapter, struct mi_state *mstate) { - return _rtw_mi_status(adapter, mstate, MI_STATUS_OTHERS_ONLY); + return rtw_mi_status_by_ifbmp(adapter_to_dvobj(adapter), 0xFF & ~BIT(adapter->iface_id), mstate); } inline void rtw_mi_status_no_others(_adapter *adapter, struct mi_state *mstate) { - return _rtw_mi_status(adapter, mstate, MI_STATUS_SELF_ONLY); + return rtw_mi_status_by_ifbmp(adapter_to_dvobj(adapter), BIT(adapter->iface_id), mstate); } /* For now, not handle union_ch/bw/offset */ @@ -332,7 +337,9 @@ void dump_mi_status(void *sel, struct dvobj_priv *dvobj) RTW_PRINT_SEL(sel, "linked_mesh_num:%d\n", DEV_MESH_LD_NUM(dvobj)); #endif #ifdef CONFIG_P2P - RTW_PRINT_SEL(sel, "p2p_device_num:%d\n", rtw_mi_stay_in_p2p_mode(dvobj_get_primary_adapter(dvobj))); + RTW_PRINT_SEL(sel, "p2p_device_num:%d\n", DEV_P2P_DV_NUM(dvobj)); + RTW_PRINT_SEL(sel, "p2p_gc_num:%d\n", DEV_P2P_GC_NUM(dvobj)); + RTW_PRINT_SEL(sel, "p2p_go_num:%d\n", DEV_P2P_GO_NUM(dvobj)); #endif RTW_PRINT_SEL(sel, "scan_num:%d\n", DEV_SCAN_NUM(dvobj)); RTW_PRINT_SEL(sel, "under_wps_num:%d\n", DEV_WPS_NUM(dvobj)); @@ -360,9 +367,7 @@ inline void rtw_mi_update_iface_status(struct mlme_priv *pmlmepriv, sint state) struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct mi_state *iface_state = &dvobj->iface_state; struct mi_state tmp_mstate; - u8 i; u8 u_ch, u_offset, u_bw; - _adapter *iface; if (state == WIFI_MONITOR_STATE || state == 0xFFFFFFFF @@ -748,6 +753,24 @@ void rtw_mi_buddy_intf_stop(_adapter *adapter) _rtw_mi_process(adapter, _TRUE, NULL, _rtw_mi_intf_stop); } +#ifdef CONFIG_NEW_NETDEV_HDL +u8 rtw_mi_hal_iface_init(_adapter *padapter) +{ + int i; + _adapter *iface; + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + + u8 ret = _TRUE; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (iface && iface->netif_up) + rtw_hal_iface_init(padapter); + } + return ret; +} +#endif + static u8 _rtw_mi_suspend_free_assoc_resource(_adapter *padapter, void *data) { return rtw_suspend_free_assoc_resource(padapter); @@ -864,7 +887,6 @@ u8 _rtw_mi_busy_traffic_check(_adapter *padapter, void *data) if (check_sc_interval) { /* Miracast can't do AP scan*/ passtime = rtw_get_passing_time_ms(pmlmepriv->lastscantime); - pmlmepriv->lastscantime = rtw_get_current_time(); if (passtime > BUSY_TRAFFIC_SCAN_DENY_PERIOD) { RTW_INFO(ADPT_FMT" bBusyTraffic == _TRUE\n", ADPT_ARG(padapter)); return _TRUE; @@ -1089,20 +1111,6 @@ u8 rtw_mi_buddy_dynamic_check_timer_handlder(_adapter *padapter) return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_dynamic_check_timer_handlder); } -static u8 _rtw_mi_dev_unload(_adapter *adapter, void *data) -{ - rtw_dev_unload(adapter); - return _TRUE; -} -u8 rtw_mi_dev_unload(_adapter *padapter) -{ - return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_dev_unload); -} -u8 rtw_mi_buddy_dev_unload(_adapter *padapter) -{ - return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_dev_unload); -} - static u8 _rtw_mi_dynamic_chk_wk_hdl(_adapter *adapter, void *data) { rtw_iface_dynamic_chk_wk_hdl(adapter); @@ -1176,7 +1184,7 @@ static u8 _rtw_mi_tx_beacon_hdl(_adapter *adapter, void *data) ) { adapter->mlmepriv.update_bcn = _TRUE; #ifndef CONFIG_INTERRUPT_BASED_TXBCN -#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_PCI_BCN_POLLING) tx_beacon_hdl(adapter, NULL); #endif #endif @@ -1354,9 +1362,10 @@ void rtw_dbg_skb_process(_adapter *padapter, union recv_frame *precvframe, union static s32 _rtw_mi_buddy_clone_bcmc_packet(_adapter *adapter, union recv_frame *precvframe, u8 *pphy_status, union recv_frame *pcloneframe) { s32 ret = _SUCCESS; +#ifdef CONFIG_SKB_ALLOCATED u8 *pbuf = precvframe->u.hdr.rx_data; +#endif struct rx_pkt_attrib *pattrib = NULL; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); if (pcloneframe) { pcloneframe->u.hdr.adapter = adapter; @@ -1451,6 +1460,45 @@ _adapter *rtw_mi_get_ap_adapter(_adapter *padapter) } #endif +u8 rtw_mi_get_ld_sta_ifbmp(_adapter *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + int i; + _adapter *iface = NULL; + u8 ifbmp = 0; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (!iface) + continue; + + if (MLME_IS_STA(iface) && MLME_IS_ASOC(iface)) + ifbmp |= BIT(i); + } + + return ifbmp; +} + +u8 rtw_mi_get_ap_mesh_ifbmp(_adapter *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + int i; + _adapter *iface = NULL; + u8 ifbmp = 0; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (!iface) + continue; + + if (CHK_MLME_STATE(iface, WIFI_AP_STATE | WIFI_MESH_STATE) + && MLME_IS_ASOC(iface)) + ifbmp |= BIT(i); + } + + return ifbmp; +} + void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b) { #ifdef CONFIG_CONCURRENT_MODE @@ -1476,3 +1524,19 @@ void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b) #endif } +u8 rtw_mi_get_assoc_if_num(_adapter *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + u8 n_assoc_iface = 0; +#if 1 + u8 i; + + for (i = 0; i < dvobj->iface_nums; i++) { + if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE)) + n_assoc_iface++; + } +#else + n_assoc_iface = DEV_STA_LD_NUM(dvobj) + DEV_AP_NUM(dvobj) + DEV_ADHOC_NUM(dvobj) + DEV_MESH_NUM(dvobj); +#endif + return n_assoc_iface; +} diff --git a/core/rtw_mlme.c b/core/rtw_mlme.c index ca3ef60..721b323 100644 --- a/core/rtw_mlme.c +++ b/core/rtw_mlme.c @@ -1,6 +1,6 @@ /****************************************************************************** * - * Copyright(c) 2007 - 2017 Realtek Corporation. + * Copyright(c) 2007 - 2019 Realtek Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as @@ -27,10 +27,6 @@ void rtw_init_mlme_timer(_adapter *padapter) rtw_init_timer(&(pmlmepriv->assoc_timer), padapter, rtw_join_timeout_handler, padapter); rtw_init_timer(&(pmlmepriv->scan_to_timer), padapter, rtw_scan_timeout_handler, padapter); -#ifdef CONFIG_DFS_MASTER - rtw_init_timer(&(pmlmepriv->dfs_master_timer), padapter, rtw_dfs_master_timer_hdl, padapter); -#endif - #ifdef CONFIG_SET_SCAN_DENY_TIMER rtw_init_timer(&(pmlmepriv->set_scan_deny_timer), padapter, rtw_set_scan_deny_timer_hdl, padapter); #endif @@ -66,11 +62,7 @@ sint _rtw_init_mlme_priv(_adapter *padapter) pmlmepriv->nic_hdl = (u8 *)padapter; pmlmepriv->pscanned = NULL; - /*pmlmepriv->fw_state = WIFI_STATION_STATE; */ /*Must sync with rtw_wdev_alloc()*/ - /*init_fwstate(pmlmepriv, WIFI_STATION_STATE);*/ - init_fwstate(pmlmepriv, WIFI_NULL_STATE);/*assigned interface role(STA/AP) must after execute set_opmode*/ - - /* wdev->iftype = NL80211_IFTYPE_STATION*/ + init_fwstate(pmlmepriv, WIFI_STATION_STATE); pmlmepriv->cur_network.network.InfrastructureMode = Ndis802_11AutoUnknown; pmlmepriv->scan_mode = SCAN_ACTIVE; /* 1: active, 0: pasive. Maybe someday we should rename this varable to "active_mode" (Jeff) */ @@ -119,7 +111,7 @@ sint _rtw_init_mlme_priv(_adapter *padapter) #ifdef CONFIG_LAYER2_ROAMING #define RTW_ROAM_SCAN_RESULT_EXP_MS (5*1000) #define RTW_ROAM_RSSI_DIFF_TH 10 -#define RTW_ROAM_SCAN_INTERVAL_MS (10*1000) +#define RTW_ROAM_SCAN_INTERVAL (5) /* 5*(2 second)*/ #define RTW_ROAM_RSSI_THRESHOLD 70 pmlmepriv->roam_flags = 0 @@ -134,9 +126,10 @@ sint _rtw_init_mlme_priv(_adapter *padapter) pmlmepriv->roam_scanr_exp_ms = RTW_ROAM_SCAN_RESULT_EXP_MS; pmlmepriv->roam_rssi_diff_th = RTW_ROAM_RSSI_DIFF_TH; - pmlmepriv->roam_scan_int_ms = RTW_ROAM_SCAN_INTERVAL_MS; + pmlmepriv->roam_scan_int = RTW_ROAM_SCAN_INTERVAL; pmlmepriv->roam_rssi_threshold = RTW_ROAM_RSSI_THRESHOLD; pmlmepriv->need_to_roam = _FALSE; + pmlmepriv->last_roaming = rtw_get_current_time(); #endif /* CONFIG_LAYER2_ROAMING */ #ifdef CONFIG_RTW_80211R @@ -146,7 +139,7 @@ sint _rtw_init_mlme_priv(_adapter *padapter) #if defined(CONFIG_RTW_WNM) || defined(CONFIG_RTW_80211K) rtw_roam_nb_info_init(padapter); pmlmepriv->ch_cnt = 0; -#endif +#endif #endif rtw_init_mlme_timer(padapter); @@ -156,8 +149,12 @@ exit: return res; } +void rtw_mfree_mlme_priv_lock(struct mlme_priv *pmlmepriv); void rtw_mfree_mlme_priv_lock(struct mlme_priv *pmlmepriv) { + _rtw_spinlock_free(&pmlmepriv->lock); + _rtw_spinlock_free(&(pmlmepriv->free_bss_pool.lock)); + _rtw_spinlock_free(&(pmlmepriv->scanned_queue.lock)); } static void rtw_free_mlme_ie_data(u8 **ppie, u32 *plen) @@ -388,6 +385,11 @@ struct wlan_network *_rtw_alloc_network(struct mlme_priv *pmlmepriv) /* (_queue pnetwork->network_type = 0; pnetwork->fixed = _FALSE; pnetwork->last_scanned = rtw_get_current_time(); +#if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT + pnetwork->acnode_stime = 0; + pnetwork->acnode_notify_etime = 0; +#endif + pnetwork->aid = 0; pnetwork->join_res = 0; @@ -746,7 +748,7 @@ struct wlan_network *_rtw_find_same_network(_queue *scanned_queue, struct wlan_n if (plist == phead) found = NULL; -exit: + return found; } @@ -798,14 +800,15 @@ struct wlan_network *rtw_get_oldest_wlan_network(_queue *scanned_queue) void update_network(WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src, _adapter *padapter, bool update_ie) { +#if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) && 1 u8 ss_ori = dst->PhyInfo.SignalStrength; u8 sq_ori = dst->PhyInfo.SignalQuality; + u8 ss_smp = src->PhyInfo.SignalStrength; + long rssi_smp = src->Rssi; +#endif long rssi_ori = dst->Rssi; - u8 ss_smp = src->PhyInfo.SignalStrength; u8 sq_smp = src->PhyInfo.SignalQuality; - long rssi_smp = src->Rssi; - u8 ss_final; u8 sq_final; long rssi_final; @@ -936,9 +939,8 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target) { _irqL irqL; _list *plist, *phead; - ULONG bssid_ex_sz; + u32 bssid_ex_sz; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(adapter->wdinfo); #endif /* CONFIG_P2P */ @@ -987,17 +989,22 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target) if (rtw_roam_flags(adapter)) { /* TODO: don't select netowrk in the same ess as choice if it's new enough*/ } + if (pnetwork->fixed) { + plist = get_next(plist); + continue; + } + #ifdef CONFIG_RSSI_PRIORITY if ((choice == NULL) || (pnetwork->network.PhyInfo.SignalStrength < choice->network.PhyInfo.SignalStrength)) #ifdef CONFIG_RTW_MESH - if (!MLME_IS_MESH(adapter) || check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE + if (!MLME_IS_MESH(adapter) || !MLME_IS_ASOC(adapter) || !rtw_bss_is_same_mbss(&pmlmepriv->cur_network.network, &pnetwork->network)) #endif choice = pnetwork; #else if (choice == NULL || rtw_time_after(choice->last_scanned, pnetwork->last_scanned)) #ifdef CONFIG_RTW_MESH - if (!MLME_IS_MESH(adapter) || check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE + if (!MLME_IS_MESH(adapter) || !MLME_IS_ASOC(adapter) || !rtw_bss_is_same_mbss(&pmlmepriv->cur_network.network, &pnetwork->network)) #endif choice = pnetwork; @@ -1034,6 +1041,10 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target) /* variable initialize */ pnetwork->fixed = _FALSE; pnetwork->last_scanned = rtw_get_current_time(); + #if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT + pnetwork->acnode_stime = 0; + pnetwork->acnode_notify_etime = 0; + #endif pnetwork->network_type = 0; pnetwork->aid = 0; @@ -1070,6 +1081,9 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target) * be already expired. In this case we do the same as we found a new * net and call the new_net handler */ + #if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT + systime last_scanned = pnetwork->last_scanned; + #endif pnetwork->last_scanned = rtw_get_current_time(); @@ -1086,9 +1100,24 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target) else update_ie = _FALSE; + #if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT + if (!MLME_IS_MESH(adapter) || !MLME_IS_ASOC(adapter) + || pnetwork->network.Configuration.DSConfig != target->Configuration.DSConfig + || rtw_get_passing_time_ms(last_scanned) > adapter->mesh_cfg.peer_sel_policy.scanr_exp_ms + || !rtw_bss_is_same_mbss(&pnetwork->network, target) + ) { + pnetwork->acnode_stime = 0; + pnetwork->acnode_notify_etime = 0; + } + #endif update_network(&(pnetwork->network), target, adapter, update_ie); } + #if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT + if (MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter)) + rtw_mesh_update_scanned_acnode_status(adapter, pnetwork); + #endif + unlock_scan_queue: _exit_critical_bh(&queue->lock, &irqL); @@ -1106,12 +1135,9 @@ unlock_scan_queue: void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork); void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork) { - _irqL irqL; - struct mlme_priv *pmlmepriv = &(((_adapter *)adapter)->mlmepriv); bool update_ie; /* _queue *queue = &(pmlmepriv->scanned_queue); */ - /* _enter_critical_bh(&queue->lock, &irqL); */ #if defined(CONFIG_P2P) && defined(CONFIG_P2P_REMOVE_GROUP_INFO) @@ -1209,26 +1235,6 @@ void rtw_survey_event_callback(_adapter *adapter, u8 *pbuf) pnetwork = (WLAN_BSSID_EX *)pbuf; - -#ifdef CONFIG_RTL8712 - /* endian_convert */ - pnetwork->Length = le32_to_cpu(pnetwork->Length); - pnetwork->Ssid.SsidLength = le32_to_cpu(pnetwork->Ssid.SsidLength); - pnetwork->Privacy = le32_to_cpu(pnetwork->Privacy); - pnetwork->Rssi = le32_to_cpu(pnetwork->Rssi); - pnetwork->NetworkTypeInUse = le32_to_cpu(pnetwork->NetworkTypeInUse); - pnetwork->Configuration.ATIMWindow = le32_to_cpu(pnetwork->Configuration.ATIMWindow); - pnetwork->Configuration.BeaconPeriod = le32_to_cpu(pnetwork->Configuration.BeaconPeriod); - pnetwork->Configuration.DSConfig = le32_to_cpu(pnetwork->Configuration.DSConfig); - pnetwork->Configuration.FHConfig.DwellTime = le32_to_cpu(pnetwork->Configuration.FHConfig.DwellTime); - pnetwork->Configuration.FHConfig.HopPattern = le32_to_cpu(pnetwork->Configuration.FHConfig.HopPattern); - pnetwork->Configuration.FHConfig.HopSet = le32_to_cpu(pnetwork->Configuration.FHConfig.HopSet); - pnetwork->Configuration.FHConfig.Length = le32_to_cpu(pnetwork->Configuration.FHConfig.Length); - pnetwork->Configuration.Length = le32_to_cpu(pnetwork->Configuration.Length); - pnetwork->InfrastructureMode = le32_to_cpu(pnetwork->InfrastructureMode); - pnetwork->IELength = le32_to_cpu(pnetwork->IELength); -#endif - len = get_WLAN_BSSID_EX_sz(pnetwork); if (len > (sizeof(WLAN_BSSID_EX))) { return; @@ -1353,22 +1359,17 @@ void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf) RTW_INFO("try_to_join, but select scanning queue fail, to_roam:%d\n", rtw_to_roam(adapter)); if (rtw_to_roam(adapter) != 0) { + u8 ssc_chk = rtw_sitesurvey_condition_check(adapter, _FALSE); rtw_init_sitesurvey_parm(adapter, &parm); _rtw_memcpy(&parm.ssid[0], &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); parm.ssid_num = 1; if (rtw_dec_to_roam(adapter) == 0 - || _SUCCESS != rtw_sitesurvey_cmd(adapter, &parm) + || (ssc_chk != SS_ALLOW && ssc_chk != SS_DENY_BUSY_TRAFFIC) + || _SUCCESS != rtw_sitesurvey_cmd(adapter, &parm) ) { rtw_set_to_roam(adapter, 0); -#ifdef CONFIG_INTEL_WIDI - if (adapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) { - _rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN); - intel_widi_wk_cmd(adapter, INTEL_WIDI_LISTEN_WK, NULL, 0); - RTW_INFO("change to widi listen\n"); - } -#endif /* CONFIG_INTEL_WIDI */ rtw_free_assoc_resources(adapter, _TRUE); rtw_indicate_disconnect(adapter, 0, _FALSE); } else @@ -1436,15 +1437,138 @@ void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf) ch = rtw_mesh_select_operating_ch(adapter); if (ch && pmlmepriv->cur_network.network.Configuration.DSConfig != ch) { - /* trigger channel switch with bw specified by upper layer */ - rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_DIRECTLY, ch, adapter->mlmepriv.ori_bw, -1); - issue_probereq_ex(adapter, &pmlmepriv->cur_network.network.mesh_id, NULL, 0, 0, 0, 0); + u8 ifbmp = rtw_mi_get_ap_mesh_ifbmp(adapter); + + if (ifbmp) { + /* switch to selected channel */ + rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_DIRECTLY, ifbmp, 0, ch, REQ_BW_ORI, REQ_OFFSET_NONE); + issue_probereq_ex(adapter, &pmlmepriv->cur_network.network.mesh_id, NULL, 0, 0, 0, 0); + } else + rtw_warn_on(1); } } #endif #endif /* CONFIG_RTW_MESH */ } +u8 _rtw_sitesurvey_condition_check(const char *caller, _adapter *adapter, bool check_sc_interval) +{ + u8 ss_condition = SS_ALLOW; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; +#ifdef DBG_LA_MODE + struct registry_priv *registry_par = &adapter->registrypriv; +#endif + +#ifdef CONFIG_MP_INCLUDED + if (rtw_mp_mode_check(adapter)) { + RTW_INFO("%s ("ADPT_FMT") MP mode block Scan request\n", caller, ADPT_ARG(adapter)); + ss_condition = SS_DENY_MP_MODE; + goto _exit; + } +#endif + +#ifdef DBG_LA_MODE + if(registry_par->la_mode_en == 1 && MLME_IS_ASOC(adapter)) { + RTW_INFO("%s ("ADPT_FMT") LA debug mode block Scan request\n", caller, ADPT_ARG(adapter)); + ss_condition = SS_DENY_LA_MODE; + goto _exit; + } +#endif + +#ifdef CONFIG_RTW_REPEATER_SON + if (adapter->rtw_rson_scanstage == RSON_SCAN_PROCESS) { + RTW_INFO("%s ("ADPT_FMT") blocking scan for under rson scanning process\n", caller, ADPT_ARG(adapter)); + ss_condition = SS_DENY_RSON_SCANING; + goto _exit; + } +#endif +#ifdef CONFIG_IOCTL_CFG80211 + if (adapter_wdev_data(adapter)->block_scan == _TRUE) { + RTW_INFO("%s ("ADPT_FMT") wdev_priv.block_scan is set\n", caller, ADPT_ARG(adapter)); + ss_condition = SS_DENY_BLOCK_SCAN; + goto _exit; + } +#endif + + if (adapter_to_dvobj(adapter)->scan_deny == _TRUE) { + RTW_INFO("%s ("ADPT_FMT") tpt mode, scan deny!\n", caller, ADPT_ARG(adapter)); + ss_condition = SS_DENY_BLOCK_SCAN; + goto _exit; + } + + if (rtw_is_scan_deny(adapter)) { + RTW_INFO("%s ("ADPT_FMT") : scan deny\n", caller, ADPT_ARG(adapter)); + ss_condition = SS_DENY_BY_DRV; + goto _exit; + } + + if (check_fwstate(pmlmepriv, WIFI_AP_STATE)){ + if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) { + RTW_INFO("%s ("ADPT_FMT") : scan abort!! AP mode process WPS\n", caller, ADPT_ARG(adapter)); + ss_condition = SS_DENY_SELF_AP_UNDER_WPS; + goto _exit; + } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { + RTW_INFO("%s ("ADPT_FMT") : scan abort!!AP mode under linking (fwstate=0x%x)\n", + caller, ADPT_ARG(adapter), pmlmepriv->fw_state); + ss_condition = SS_DENY_SELF_AP_UNDER_LINKING; + goto _exit; + } else if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { + RTW_INFO("%s ("ADPT_FMT") : scan abort!!AP mode under survey (fwstate=0x%x)\n", + caller, ADPT_ARG(adapter), pmlmepriv->fw_state); + ss_condition = SS_DENY_SELF_AP_UNDER_SURVEY; + goto _exit; + } + } else { + if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { + RTW_INFO("%s ("ADPT_FMT") : scan abort!!STA mode under linking (fwstate=0x%x)\n", + caller, ADPT_ARG(adapter), pmlmepriv->fw_state); + ss_condition = SS_DENY_SELF_STA_UNDER_LINKING; + goto _exit; + } else if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { + RTW_INFO("%s ("ADPT_FMT") : scan abort!!STA mode under survey (fwstate=0x%x)\n", + caller, ADPT_ARG(adapter), pmlmepriv->fw_state); + ss_condition = SS_DENY_SELF_STA_UNDER_SURVEY; + goto _exit; + } + } + +#ifdef CONFIG_CONCURRENT_MODE + if (rtw_mi_buddy_check_fwstate(adapter, _FW_UNDER_LINKING | WIFI_UNDER_WPS)) { + RTW_INFO("%s ("ADPT_FMT") : scan abort!! buddy_intf under linking or wps\n", caller, ADPT_ARG(adapter)); + ss_condition = SS_DENY_BUDDY_UNDER_LINK_WPS; + goto _exit; + + } else if (rtw_mi_buddy_check_fwstate(adapter, _FW_UNDER_SURVEY)) { + RTW_INFO("%s ("ADPT_FMT") : scan abort!! buddy_intf under survey\n", caller, ADPT_ARG(adapter)); + ss_condition = SS_DENY_BUDDY_UNDER_SURVEY; + goto _exit; + } +#endif /* CONFIG_CONCURRENT_MODE */ + + if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) { + RTW_INFO("%s ("ADPT_FMT") : scan abort!! BusyTraffic\n", + caller, ADPT_ARG(adapter)); + ss_condition = SS_DENY_BUSY_TRAFFIC; + goto _exit; + } + /* + * Rule for Android. + * If scan interval > BUSY_TRAFFIC_SCAN_DENY_PERIOD, + * it is a periodical background scan. + * Skip background scan when other interface is busy. + */ + if ((rtw_get_passing_time_ms(pmlmepriv->lastscantime) > BUSY_TRAFFIC_SCAN_DENY_PERIOD) + && rtw_mi_buddy_busy_traffic_check(adapter, _FALSE)) { + RTW_INFO("%s ("ADPT_FMT") : scan abort!! others BusyTraffic\n", + caller, ADPT_ARG(adapter)); + ss_condition = SS_DENY_BUSY_TRAFFIC; + goto _exit; + } + +_exit : + return ss_condition; +} + void rtw_dummy_event_callback(_adapter *adapter , u8 *pbuf) { @@ -1503,7 +1627,6 @@ void rtw_free_assoc_resources(_adapter *adapter, u8 lock_scanned_queue) _irqL irqL; struct wlan_network *pwlan = NULL; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; - struct sta_priv *pstapriv = &adapter->stapriv; struct wlan_network *tgt_network = &pmlmepriv->cur_network; @@ -1550,25 +1673,26 @@ void rtw_free_assoc_resources(_adapter *adapter, u8 lock_scanned_queue) if (lock_scanned_queue) _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); - pwlan = _rtw_find_same_network(&pmlmepriv->scanned_queue, tgt_network); - if ((pwlan) && (!check_fwstate(pmlmepriv, WIFI_UNDER_WPS))) { - pwlan->fixed = _FALSE; - - RTW_INFO("free disconnecting network of scanned_queue\n"); - rtw_free_network_nolock(adapter, pwlan); -#ifdef CONFIG_P2P - if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) { - rtw_mi_set_scan_deny(adapter, 2000); - /* rtw_clear_scan_deny(adapter); */ - } -#endif /* CONFIG_P2P */ + if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS) || (pmlmepriv->wpa_phase == _TRUE)){ + RTW_INFO("Dont free disconnecting network of scanned_queue due to uner %s %s phase\n\n", + check_fwstate(pmlmepriv, WIFI_UNDER_WPS) ? "WPS" : "", + (pmlmepriv->wpa_phase == _TRUE) ? "WPA" : ""); } else { - if (pwlan == NULL) - RTW_INFO("free disconnecting network of scanned_queue failed due to pwlan== NULL\n\n"); - if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) - RTW_INFO("donot free disconnecting network of scanned_queue when WIFI_UNDER_WPS\n\n"); - } + pwlan = _rtw_find_same_network(&pmlmepriv->scanned_queue, tgt_network); + if (pwlan) { + pwlan->fixed = _FALSE; + RTW_INFO("Free disconnecting network of scanned_queue\n"); + rtw_free_network_nolock(adapter, pwlan); +#ifdef CONFIG_P2P + if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) { + rtw_set_scan_deny(adapter, 2000); + /* rtw_clear_scan_deny(adapter); */ + } +#endif /* CONFIG_P2P */ + } else + RTW_ERR("Free disconnecting network of scanned_queue failed due to pwlan == NULL\n\n"); + } if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) && (adapter->stapriv.asoc_sta_count == 1)) /*||check_fwstate(pmlmepriv, WIFI_STATION_STATE)*/) { @@ -1592,9 +1716,6 @@ void rtw_free_assoc_resources(_adapter *adapter, u8 lock_scanned_queue) void rtw_indicate_connect(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - - pmlmepriv->to_join = _FALSE; @@ -1608,13 +1729,6 @@ void rtw_indicate_connect(_adapter *padapter) } rtw_set_to_roam(padapter, 0); -#ifdef CONFIG_INTEL_WIDI - if (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) { - _rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN); - intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_WK, NULL, 0); - RTW_INFO("change to widi listen\n"); - } -#endif /* CONFIG_INTEL_WIDI */ if (!MLME_IS_AP(padapter) && !MLME_IS_MESH(padapter)) rtw_mi_set_scan_deny(padapter, 3000); @@ -1627,18 +1741,21 @@ void rtw_indicate_connect(_adapter *padapter) */ void rtw_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally_generated) { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); +#ifdef CONFIG_WAPI_SUPPORT struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; +#endif u8 *wps_ie = NULL; uint wpsie_len = 0; + if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) + pmlmepriv->wpa_phase = _TRUE; - - _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS); + _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS | WIFI_OP_CH_SWITCHING | WIFI_UNDER_KEY_HANDSHAKE); /* force to clear cur_network_scanned's SELECTED REGISTRAR */ if (pmlmepriv->cur_network_scanned) { @@ -1691,7 +1808,7 @@ void rtw_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally_generate #endif /* CONFIG_P2P_PS */ #ifdef CONFIG_LPS - rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 1); + rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 0); #endif #ifdef CONFIG_BEAMFORMING @@ -1767,7 +1884,6 @@ static u32 _rtw_wait_scan_done(_adapter *adapter, u8 abort, u32 timeout_ms) void rtw_scan_wait_completed(_adapter *adapter) { struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct ss_res *ss = &pmlmeext->sitesurvey_res; _rtw_wait_scan_done(adapter, _FALSE, ss->scan_timeout_ms); @@ -1848,6 +1964,10 @@ static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wl struct recv_reorder_ctrl *preorder_ctrl; struct sta_priv *pstapriv = &padapter->stapriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +#ifdef CONFIG_RTS_FULL_BW + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct wlan_network *cur_network = &(pmlmepriv->cur_network); +#endif/*CONFIG_RTS_FULL_BW*/ psta = rtw_get_stainfo(pstapriv, pnetwork->network.MacAddress); if (psta == NULL) @@ -1933,7 +2053,9 @@ static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wl #ifdef CONFIG_RTW_80211K _rtw_memcpy(&psta->rm_en_cap, pnetwork->network.PhyInfo.rm_en_cap, 5); #endif - +#ifdef CONFIG_RTS_FULL_BW + rtw_parse_sta_vendor_ie_8812(padapter, psta, BSS_EX_TLV_IES(&cur_network->network), BSS_EX_TLV_IES_LEN(&cur_network->network)); +#endif return psta; } @@ -1943,12 +2065,12 @@ static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wl static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network *ptarget_wlan, struct wlan_network *pnetwork) { struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct security_priv *psecuritypriv = &padapter->securitypriv; struct wlan_network *cur_network = &(pmlmepriv->cur_network); + sint tmp_fw_state = 0x0; RTW_INFO("%s\n", __FUNCTION__); - - /* why not use ptarget_wlan?? */ _rtw_memcpy(&cur_network->network, &pnetwork->network, pnetwork->network.Length); /* some IEs in pnetwork is wrong, so we should use ptarget_wlan IEs */ @@ -1982,13 +2104,15 @@ static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network * switch (pnetwork->network.InfrastructureMode) { case Ndis802_11Infrastructure: + /* Check encryption */ + if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) + tmp_fw_state = tmp_fw_state | WIFI_UNDER_KEY_HANDSHAKE; + + if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) + tmp_fw_state = tmp_fw_state | WIFI_UNDER_WPS; + + init_fwstate(pmlmepriv, WIFI_STATION_STATE | tmp_fw_state); - if (pmlmepriv->fw_state & WIFI_UNDER_WPS) - /*pmlmepriv->fw_state = WIFI_STATION_STATE|WIFI_UNDER_WPS;*/ - init_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_UNDER_WPS); - else - /*pmlmepriv->fw_state = WIFI_STATION_STATE;*/ - init_fwstate(pmlmepriv, WIFI_STATION_STATE); break; case Ndis802_11IBSS: /*pmlmepriv->fw_state = WIFI_ADHOC_STATE;*/ @@ -2018,7 +2142,7 @@ static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network * /* #define REJOIN */ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf, u16 status) { - _irqL irqL, irqL2; + _irqL irqL; static u8 retry = 0; struct sta_info *ptarget_sta = NULL, *pcur_sta = NULL; struct sta_priv *pstapriv = &adapter->stapriv; @@ -2028,39 +2152,13 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf, u16 status) struct wlan_network *pcur_wlan = NULL, *ptarget_wlan = NULL; unsigned int the_same_macaddr = _FALSE; - -#ifdef CONFIG_RTL8712 - /* endian_convert */ - pnetwork->join_res = le32_to_cpu(pnetwork->join_res); - pnetwork->network_type = le32_to_cpu(pnetwork->network_type); - pnetwork->network.Length = le32_to_cpu(pnetwork->network.Length); - pnetwork->network.Ssid.SsidLength = le32_to_cpu(pnetwork->network.Ssid.SsidLength); - pnetwork->network.Privacy = le32_to_cpu(pnetwork->network.Privacy); - pnetwork->network.Rssi = le32_to_cpu(pnetwork->network.Rssi); - pnetwork->network.NetworkTypeInUse = le32_to_cpu(pnetwork->network.NetworkTypeInUse) ; - pnetwork->network.Configuration.ATIMWindow = le32_to_cpu(pnetwork->network.Configuration.ATIMWindow); - pnetwork->network.Configuration.BeaconPeriod = le32_to_cpu(pnetwork->network.Configuration.BeaconPeriod); - pnetwork->network.Configuration.DSConfig = le32_to_cpu(pnetwork->network.Configuration.DSConfig); - pnetwork->network.Configuration.FHConfig.DwellTime = le32_to_cpu(pnetwork->network.Configuration.FHConfig.DwellTime); - pnetwork->network.Configuration.FHConfig.HopPattern = le32_to_cpu(pnetwork->network.Configuration.FHConfig.HopPattern); - pnetwork->network.Configuration.FHConfig.HopSet = le32_to_cpu(pnetwork->network.Configuration.FHConfig.HopSet); - pnetwork->network.Configuration.FHConfig.Length = le32_to_cpu(pnetwork->network.Configuration.FHConfig.Length); - pnetwork->network.Configuration.Length = le32_to_cpu(pnetwork->network.Configuration.Length); - pnetwork->network.InfrastructureMode = le32_to_cpu(pnetwork->network.InfrastructureMode); - pnetwork->network.IELength = le32_to_cpu(pnetwork->network.IELength); -#endif - - rtw_get_encrypt_decrypt_from_registrypriv(adapter); - - the_same_macaddr = _rtw_memcmp(pnetwork->network.MacAddress, cur_network->network.MacAddress, ETH_ALEN); pnetwork->network.Length = get_WLAN_BSSID_EX_sz(&pnetwork->network); - if (pnetwork->network.Length > sizeof(WLAN_BSSID_EX)) { - goto ignore_joinbss_callback; - } + if (pnetwork->network.Length > sizeof(WLAN_BSSID_EX)) + goto exit; _enter_critical_bh(&pmlmepriv->lock, &irqL); @@ -2121,6 +2219,10 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf, u16 status) _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); goto ignore_joinbss_callback; } + + /* Queue TX packets before FW/HW ready */ + /* clear in mlmeext_joinbss_event_callback() */ + rtw_xmit_queue_set(ptarget_sta); } /* s4. indicate connect */ @@ -2181,6 +2283,9 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf, u16 status) ignore_joinbss_callback: _exit_critical_bh(&pmlmepriv->lock, &irqL); + +exit: + return; } void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf) @@ -2430,6 +2535,9 @@ void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf) #endif exit: +#ifdef CONFIG_RTS_FULL_BW + rtw_set_rts_bw(adapter); +#endif/*CONFIG_RTS_FULL_BW*/ return; } @@ -2695,11 +2803,7 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf) u8 *pibss = NULL; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct stadel_event *pstadel = (struct stadel_event *)pbuf; - struct sta_priv *pstapriv = &adapter->stapriv; struct wlan_network *tgt_network = &(pmlmepriv->cur_network); - struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - RTW_INFO("%s(mac_id=%d)=" MAC_FMT "\n", __func__, pstadel->mac_id, MAC_ARG(pstadel->macaddr)); rtw_sta_mstatus_disc_rpt(adapter, pstadel->mac_id); @@ -2720,7 +2824,7 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf) if (MLME_IS_MESH(adapter)) { rtw_free_stainfo(adapter, psta); - return; + goto exit; } if (MLME_IS_AP(adapter)) { @@ -2731,8 +2835,10 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf) rtw_cfg80211_indicate_sta_disassoc(adapter, pstadel->macaddr, *(u16 *)pstadel->rsvd); #endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) */ #endif /* CONFIG_IOCTL_CFG80211 */ + rtw_free_stainfo(adapter, psta); - return; + + goto exit; } mlmeext_sta_del_event_callback(adapter); @@ -2759,11 +2865,6 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf) roam = _TRUE; roam_target = pmlmepriv->roam_network; } -#ifdef CONFIG_INTEL_WIDI - else if (adapter->mlmepriv.widi_state == INTEL_WIDI_STATE_CONNECTED) - roam = _TRUE; -#endif /* CONFIG_INTEL_WIDI */ - if (roam == _TRUE) { if (rtw_to_roam(adapter) > 0) rtw_dec_to_roam(adapter); /* this stadel_event is caused by roaming, decrease to_roam */ @@ -2778,20 +2879,7 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf) rtw_free_assoc_resources(adapter, _TRUE); rtw_free_mlme_priv_ie_data(pmlmepriv); - _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); - /* remove the network entry in scanned_queue */ - pwlan = _rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); - if ((pwlan) && (!check_fwstate(pmlmepriv, WIFI_UNDER_WPS))) { - pwlan->fixed = _FALSE; - rtw_free_network_nolock(adapter, pwlan); - } - _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); - rtw_indicate_disconnect(adapter, *(u16 *)pstadel->rsvd, pstadel->locally_generated); -#ifdef CONFIG_INTEL_WIDI - if (!rtw_to_roam(adapter)) - process_intel_widi_disconnect(adapter, 1); -#endif /* CONFIG_INTEL_WIDI */ _rtw_roaming(adapter, roam_target); } @@ -2840,8 +2928,11 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf) } _exit_critical_bh(&pmlmepriv->lock, &irqL2); - - +exit: + #ifdef CONFIG_RTS_FULL_BW + rtw_set_rts_bw(adapter); + #endif/*CONFIG_RTS_FULL_BW*/ + return; } @@ -2910,13 +3001,6 @@ void rtw_join_timeout_handler(void *ctx) } break; } else { -#ifdef CONFIG_INTEL_WIDI - if (adapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) { - _rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN); - intel_widi_wk_cmd(adapter, INTEL_WIDI_LISTEN_WK, NULL, 0); - RTW_INFO("change to widi listen\n"); - } -#endif /* CONFIG_INTEL_WIDI */ RTW_INFO("%s We've try roaming but fail\n", __FUNCTION__); #ifdef CONFIG_RTW_80211R rtw_ft_clr_flags(adapter, RTW_FT_PEER_EN|RTW_FT_PEER_OTD_EN); @@ -2983,10 +3067,11 @@ void rtw_scan_timeout_handler(void *ctx) void rtw_mlme_reset_auto_scan_int(_adapter *adapter, u8 *reason) { +#if defined(CONFIG_RTW_MESH) && defined(CONFIG_DFS_MASTER) +#if CONFIG_RTW_MESH_OFFCH_CAND struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); - struct mlme_priv *mlme = &adapter->mlmepriv; - struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +#endif +#endif u8 u_ch; u32 interval_ms = 0xffffffff; /* 0xffffffff: special value to make min() works well, also means no auto scan */ @@ -3017,7 +3102,6 @@ void rtw_mlme_reset_auto_scan_int(_adapter *adapter, u8 *reason) #endif #endif /* CONFIG_RTW_MESH */ -exit: if (interval_ms == 0xffffffff) interval_ms = 0; @@ -3030,8 +3114,25 @@ void rtw_drv_scan_by_self(_adapter *padapter, u8 reason) struct sitesurvey_parm parm; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; int i; +#if 1 + u8 ssc_chk; + ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE); + if( ssc_chk == SS_DENY_BUSY_TRAFFIC) { + #ifdef CONFIG_LAYER2_ROAMING + if (rtw_chk_roam_flags(padapter, RTW_ROAM_ACTIVE) && pmlmepriv->need_to_roam == _TRUE) + RTW_INFO(FUNC_ADPT_FMT" need to roam, don't care BusyTraffic\n", FUNC_ADPT_ARG(padapter)); + else + #endif + RTW_INFO(FUNC_ADPT_FMT" exit BusyTraffic\n", FUNC_ADPT_ARG(padapter)); + goto exit; + } + else if (ssc_chk != SS_ALLOW) + goto exit; + if (!rtw_is_adapter_up(padapter)) + goto exit; +#else if (rtw_is_scan_deny(padapter)) goto exit; @@ -3063,6 +3164,7 @@ void rtw_drv_scan_by_self(_adapter *padapter, u8 reason) RTW_INFO(FUNC_ADPT_FMT", but buddy_intf is under scanning or linking or wps_phase\n", FUNC_ADPT_ARG(padapter)); goto exit; } +#endif #endif RTW_INFO(FUNC_ADPT_FMT" reason:0x%02x\n", FUNC_ADPT_ARG(padapter), reason); @@ -3146,10 +3248,10 @@ void rtw_iface_dynamic_check_timer_handlder(_adapter *adapter) bEnterPS = traffic_status_watchdog(adapter, 1); if (bEnterPS) { - /* rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_ENTER, 1); */ + /* rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_ENTER, 0); */ rtw_hal_dm_watchdog_in_lps(adapter); } else { - /* call rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1) in traffic_status_watchdog() */ + /* call rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 0) in traffic_status_watchdog() */ } } #endif /* CONFIG_LPS_LCLK_WD_TIMER */ @@ -3206,7 +3308,8 @@ static void collect_sta_traffic_statistics(_adapter *adapter) { struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl; struct sta_info *sta; - u16 curr_tx_mbytes = 0, curr_rx_mbytes = 0; + u64 curr_tx_bytes = 0, curr_rx_bytes = 0; + u32 curr_tx_mbytes = 0, curr_rx_mbytes = 0; int i; for (i = 0; i < MACID_NUM_SW_LIMIT; i++) { @@ -3221,16 +3324,24 @@ static void collect_sta_traffic_statistics(_adapter *adapter) if (sta->sta_stats.last_rx_mc_bytes > sta->sta_stats.rx_mc_bytes) sta->sta_stats.last_rx_mc_bytes = sta->sta_stats.rx_mc_bytes; - curr_tx_mbytes = ((sta->sta_stats.tx_bytes - sta->sta_stats.last_tx_bytes) >> 20) / 2; /*MBps*/ - curr_rx_mbytes = ((sta->sta_stats.rx_bytes - sta->sta_stats.last_rx_bytes) >> 20) / 2; /*MBps*/ - sta->sta_stats.tx_tp_mbytes = curr_tx_mbytes; - sta->sta_stats.rx_tp_mbytes = curr_rx_mbytes; + curr_tx_bytes = sta->sta_stats.tx_bytes - sta->sta_stats.last_tx_bytes; + curr_rx_bytes = sta->sta_stats.rx_bytes - sta->sta_stats.last_rx_bytes; + sta->sta_stats.tx_tp_kbits = (curr_tx_bytes * 8 / 2) >> 10;/*Kbps*/ + sta->sta_stats.rx_tp_kbits = (curr_rx_bytes * 8 / 2) >> 10;/*Kbps*/ + + sta->sta_stats.smooth_tx_tp_kbits = (sta->sta_stats.smooth_tx_tp_kbits * 6 / 10) + (sta->sta_stats.tx_tp_kbits * 4 / 10);/*Kbps*/ + sta->sta_stats.smooth_rx_tp_kbits = (sta->sta_stats.smooth_rx_tp_kbits * 6 / 10) + (sta->sta_stats.rx_tp_kbits * 4 / 10);/*Kbps*/ + + curr_tx_mbytes = (curr_tx_bytes / 2) >> 20;/*MBps*/ + curr_rx_mbytes = (curr_rx_bytes / 2) >> 20;/*MBps*/ sta->cmn.tx_moving_average_tp = - (sta->cmn.tx_moving_average_tp / 10) + (curr_tx_mbytes * 9 / 10); + (sta->cmn.tx_moving_average_tp / 10) + (curr_tx_mbytes * 9 / 10); /*MBps*/ sta->cmn.rx_moving_average_tp = - (sta->cmn.rx_moving_average_tp / 10) + (curr_rx_mbytes * 9 /10); + (sta->cmn.rx_moving_average_tp / 10) + (curr_rx_mbytes * 9 /10); /*MBps*/ + + rtw_collect_bcn_info(sta->padapter); if (adapter->bsta_tp_dump) dump_sta_traffic(RTW_DBGDUMP, adapter, sta); @@ -3281,8 +3392,8 @@ static void collect_traffic_statistics(_adapter *padapter) pdvobjpriv->traffic_stat.last_tx_bytes = pdvobjpriv->traffic_stat.tx_bytes; pdvobjpriv->traffic_stat.last_rx_bytes = pdvobjpriv->traffic_stat.rx_bytes; - pdvobjpriv->traffic_stat.cur_tx_tp = (u32)(pdvobjpriv->traffic_stat.cur_tx_bytes * 8 / 2 / 1024 / 1024); - pdvobjpriv->traffic_stat.cur_rx_tp = (u32)(pdvobjpriv->traffic_stat.cur_rx_bytes * 8 / 2 / 1024 / 1024); + pdvobjpriv->traffic_stat.cur_tx_tp = (u32)(pdvobjpriv->traffic_stat.cur_tx_bytes * 8 / 2 / 1024 / 1024);/*Mbps*/ + pdvobjpriv->traffic_stat.cur_rx_tp = (u32)(pdvobjpriv->traffic_stat.cur_rx_bytes * 8 / 2 / 1024 / 1024);/*Mbps*/ #ifdef DBG_TRAFFIC_STATISTIC RTW_INFO("\n========================\n"); @@ -3292,8 +3403,8 @@ static void collect_traffic_statistics(_adapter *padapter) RTW_INFO("last_tx_bytes:%lld\n", pdvobjpriv->traffic_stat.last_tx_bytes); RTW_INFO("last_rx_bytes:%lld\n", pdvobjpriv->traffic_stat.last_rx_bytes); - RTW_INFO("cur_tx_tp:%d\n", pdvobjpriv->traffic_stat.cur_tx_tp); - RTW_INFO("cur_rx_tp:%d\n", pdvobjpriv->traffic_stat.cur_rx_tp); + RTW_INFO("cur_tx_tp:%d (Mbps)\n", pdvobjpriv->traffic_stat.cur_tx_tp); + RTW_INFO("cur_rx_tp:%d (Mbps)\n", pdvobjpriv->traffic_stat.cur_rx_tp); #endif #ifdef CONFIG_RTW_NAPI @@ -3379,8 +3490,15 @@ static int rtw_check_roaming_candidate(struct mlme_priv *mlme { int updated = _FALSE; _adapter *adapter = container_of(mlme, _adapter, mlmepriv); + struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); + RT_CHANNEL_INFO *chset = rfctl->channel_set; + u8 ch = competitor->network.Configuration.DSConfig; - if (rtw_chset_search_ch(adapter_to_chset(adapter), competitor->network.Configuration.DSConfig) < 0) + if (rtw_chset_search_ch(chset, ch) < 0) + goto exit; + if (IS_DFS_SLAVE_WITH_RD(rfctl) + && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl)) + && rtw_chset_is_ch_non_ocp(chset, ch)) goto exit; #if defined(CONFIG_RTW_REPEATER_SON) && (!defined(CONFIG_RTW_REPEATER_SON_ROOT)) @@ -3460,8 +3578,6 @@ int rtw_select_roaming_candidate(struct mlme_priv *mlme) _queue *queue = &(mlme->scanned_queue); struct wlan_network *pnetwork = NULL; struct wlan_network *candidate = NULL; - u8 bSupportAntDiv = _FALSE; - if (mlme->cur_network_scanned == NULL) { rtw_warn_on(1); @@ -3551,8 +3667,15 @@ static int rtw_check_join_candidate(struct mlme_priv *mlme { int updated = _FALSE; _adapter *adapter = container_of(mlme, _adapter, mlmepriv); + struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); + RT_CHANNEL_INFO *chset = rfctl->channel_set; + u8 ch = competitor->network.Configuration.DSConfig; - if (rtw_chset_search_ch(adapter_to_chset(adapter), competitor->network.Configuration.DSConfig) < 0) + if (rtw_chset_search_ch(chset, ch) < 0) + goto exit; + if (IS_DFS_SLAVE_WITH_RD(rfctl) + && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl)) + && rtw_chset_is_ch_non_ocp(chset, ch)) goto exit; #if defined(CONFIG_RTW_REPEATER_SON) && (!defined(CONFIG_RTW_REPEATER_SON_ROOT)) @@ -3642,8 +3765,9 @@ int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv) _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; struct wlan_network *candidate = NULL; +#ifdef CONFIG_ANTENNA_DIVERSITY u8 bSupportAntDiv = _FALSE; - +#endif adapter = (_adapter *)pmlmepriv->nic_hdl; @@ -3714,7 +3838,7 @@ candidate_exist: { rtw_disassoc_cmd(adapter, 0, 0); rtw_indicate_disconnect(adapter, 0, _FALSE); - rtw_free_assoc_resources_cmd(adapter, _TRUE); + rtw_free_assoc_resources_cmd(adapter, _TRUE, 0); } } @@ -3789,7 +3913,6 @@ sint rtw_set_key(_adapter *adapter, struct security_priv *psecuritypriv, sint ke struct cmd_obj *pcmd; struct setkey_parm *psetkeyparm; struct cmd_priv *pcmdpriv = &(adapter->cmdpriv); - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); sint res = _SUCCESS; @@ -4078,7 +4201,12 @@ static int SecIsInPMKIDList(_adapter *Adapter, u8 *bssid) } -static int rtw_rsn_sync_pmkid(_adapter *adapter, u8 *ie, uint ie_len, int i_ent) +int rtw_cached_pmkid(_adapter *Adapter, u8 *bssid) +{ + return SecIsInPMKIDList(Adapter, bssid); +} + +int rtw_rsn_sync_pmkid(_adapter *adapter, u8 *ie, uint ie_len, int i_ent) { struct security_priv *sec = &adapter->securitypriv; struct rsne_info info; @@ -4142,16 +4270,13 @@ exit: sint rtw_restruct_sec_ie(_adapter *adapter, u8 *out_ie) { - u8 authmode = 0x0, securitytype, match; - u8 sec_ie[255], uncst_oui[4], bkup_ie[255]; - u8 wpa_oui[4] = {0x0, 0x50, 0xf2, 0x01}; - uint ielength = 0, cnt, remove_cnt; + u8 authmode = 0x0; + uint ielength = 0; int iEntry; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct security_priv *psecuritypriv = &adapter->securitypriv; uint ndisauthmode = psecuritypriv->ndisauthtype; - uint ndissecuritytype = psecuritypriv->ndisencryptstatus; if ((ndisauthmode == Ndis802_11AuthModeWPA) || (ndisauthmode == Ndis802_11AuthModeWPAPSK)) authmode = _WPA_IE_ID_; @@ -4198,13 +4323,6 @@ void rtw_init_registrypriv_dev_network(_adapter *adapter) pdev_network->Configuration.Length = sizeof(NDIS_802_11_CONFIGURATION); pdev_network->Configuration.BeaconPeriod = 100; - pdev_network->Configuration.FHConfig.Length = 0; - pdev_network->Configuration.FHConfig.HopPattern = 0; - pdev_network->Configuration.FHConfig.HopSet = 0; - pdev_network->Configuration.FHConfig.DwellTime = 0; - - - } void rtw_update_registrypriv_dev_network(_adapter *adapter) @@ -4232,32 +4350,6 @@ void rtw_update_registrypriv_dev_network(_adapter *adapter) pdev_network->Rssi = 0; - switch (pregistrypriv->wireless_mode) { - case WIRELESS_11B: - pdev_network->NetworkTypeInUse = (Ndis802_11DS); - break; - case WIRELESS_11G: - case WIRELESS_11BG: - case WIRELESS_11_24N: - case WIRELESS_11G_24N: - case WIRELESS_11BG_24N: - pdev_network->NetworkTypeInUse = (Ndis802_11OFDM24); - break; - case WIRELESS_11A: - case WIRELESS_11A_5N: - pdev_network->NetworkTypeInUse = (Ndis802_11OFDM5); - break; - case WIRELESS_11ABGN: - if (pregistrypriv->channel > 14) - pdev_network->NetworkTypeInUse = (Ndis802_11OFDM5); - else - pdev_network->NetworkTypeInUse = (Ndis802_11OFDM24); - break; - default: - /* TODO */ - break; - } - pdev_network->Configuration.DSConfig = (pregistrypriv->channel); if (cur_network->network.InfrastructureMode == Ndis802_11IBSS) { @@ -4416,7 +4508,7 @@ void rtw_build_wmm_ie_ht(_adapter *padapter, u8 *out_ie, uint *pout_len) padapter->mlmepriv.qospriv.qos_option = 1; } } - +#if defined(CONFIG_80211N_HT) /* the fucntion is >= passive_level */ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len, u8 channel) { @@ -4460,6 +4552,8 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui } if (cbw40_enable) { + struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); + RT_CHANNEL_INFO *chset = rfctl->channel_set; u8 oper_bw = CHANNEL_WIDTH_20, oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; if (in_ie == NULL) { @@ -4492,11 +4586,17 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui /* adjust bw to fit in channel plan setting */ if (oper_bw == CHANNEL_WIDTH_40 && oper_offset != HAL_PRIME_CHNL_OFFSET_DONT_CARE /* check this because TDLS has no info to set offset */ - && !rtw_chset_is_chbw_valid(adapter_to_chset(padapter), channel, oper_bw, oper_offset) + && (!rtw_chset_is_chbw_valid(chset, channel, oper_bw, oper_offset) + || (IS_DFS_SLAVE_WITH_RD(rfctl) + && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl)) + && rtw_chset_is_chbw_non_ocp(chset, channel, oper_bw, oper_offset)) + ) ) { oper_bw = CHANNEL_WIDTH_20; oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; - rtw_warn_on(!rtw_chset_is_chbw_valid(adapter_to_chset(padapter), channel, oper_bw, oper_offset)); + rtw_warn_on(!rtw_chset_is_chbw_valid(chset, channel, oper_bw, oper_offset)); + if (IS_DFS_SLAVE_WITH_RD(rfctl) && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))) + rtw_warn_on(rtw_chset_is_chbw_non_ocp(chset, channel, oper_bw, oper_offset)); } if (oper_bw == CHANNEL_WIDTH_40) { @@ -4803,6 +4903,7 @@ void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel) /* */ pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; } +#endif #ifdef CONFIG_TDLS void rtw_issue_addbareq_cmd_tdls(_adapter *padapter, struct xmit_frame *pxmitframe) @@ -4835,6 +4936,7 @@ void rtw_issue_addbareq_cmd_tdls(_adapter *padapter, struct xmit_frame *pxmitfra } #endif /* CONFIG_TDLS */ +#ifdef CONFIG_80211N_HT void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe) { u8 issued; @@ -4885,7 +4987,7 @@ void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe) } } - +#endif /* CONFIG_80211N_HT */ void rtw_append_exented_cap(_adapter *padapter, u8 *out_ie, uint *pout_len) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; @@ -4994,14 +5096,11 @@ bool rtw_adjust_chbw(_adapter *adapter, u8 req_ch, u8 *req_bw, u8 *req_offset) struct registry_priv *regsty = adapter_to_regsty(adapter); u8 allowed_bw; - if (req_ch <= 14) { + if (req_ch < 14) allowed_bw = REGSTY_BW_2G(regsty); - if (MLME_IS_MESH(adapter)) { - /* prevent secondary channel offset mismatch */ - if (req_ch >= 5 && req_ch <= 9) - allowed_bw = CHANNEL_WIDTH_20; - } - } else + else if (req_ch == 14) + allowed_bw = CHANNEL_WIDTH_20; + else allowed_bw = REGSTY_BW_5G(regsty); allowed_bw = hal_largest_bw(adapter, allowed_bw); @@ -5132,3 +5231,17 @@ inline void rtw_wfd_st_switch(struct sta_info *sta, bool on) rtw_st_ctl_unregister(&sta->st_ctl, SESSION_TRACKER_REG_ID_WFD); #endif } + +void dump_arp_pkt(void *sel, u8 *da, u8 *sa, u8 *arp, bool tx) +{ + RTW_PRINT_SEL(sel, "%s ARP da="MAC_FMT", sa="MAC_FMT"\n" + , tx ? "send" : "recv", MAC_ARG(da), MAC_ARG(sa)); + RTW_PRINT_SEL(sel, "htype=%u, ptype=0x%04x, hlen=%u, plen=%u, oper=%u\n" + , GET_ARP_HTYPE(arp), GET_ARP_PTYPE(arp), GET_ARP_HLEN(arp) + , GET_ARP_PLEN(arp), GET_ARP_OPER(arp)); + RTW_PRINT_SEL(sel, "sha="MAC_FMT", spa="IP_FMT"\n" + , MAC_ARG(ARP_SENDER_MAC_ADDR(arp)), IP_ARG(ARP_SENDER_IP_ADDR(arp))); + RTW_PRINT_SEL(sel, "tha="MAC_FMT", tpa="IP_FMT"\n" + , MAC_ARG(ARP_TARGET_MAC_ADDR(arp)), IP_ARG(ARP_TARGET_IP_ADDR(arp))); +} + diff --git a/core/rtw_mlme_ext.c b/core/rtw_mlme_ext.c index da471c1..7c8e855 100644 --- a/core/rtw_mlme_ext.c +++ b/core/rtw_mlme_ext.c @@ -1,6 +1,6 @@ /****************************************************************************** * - * Copyright(c) 2007 - 2017 Realtek Corporation. + * Copyright(c) 2007 - 2019 Realtek Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as @@ -114,395 +114,6 @@ unsigned char RSN_TKIP_CIPHER[4] = {0x00, 0x0f, 0xac, 0x02}; extern unsigned char REALTEK_96B_IE[]; -#ifdef LEGACY_CHANNEL_PLAN_REF -/******************************************************** -ChannelPlan definitions -*********************************************************/ -static RT_CHANNEL_PLAN legacy_channel_plan[] = { - /* 0x00, RTW_CHPLAN_FCC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 32}, - /* 0x01, RTW_CHPLAN_IC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 31}, - /* 0x02, RTW_CHPLAN_ETSI */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32}, - /* 0x03, RTW_CHPLAN_SPAIN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, - /* 0x04, RTW_CHPLAN_FRANCE */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, - /* 0x05, RTW_CHPLAN_MKK */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, - /* 0x06, RTW_CHPLAN_MKK1 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, - /* 0x07, RTW_CHPLAN_ISRAEL */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21}, - /* 0x08, RTW_CHPLAN_TELEC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52, 56, 60, 64}, 22}, - /* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14}, - /* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, - /* 0x0B, RTW_CHPLAN_TAIWAN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 26}, - /* 0x0C, RTW_CHPLAN_CHINA */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 149, 153, 157, 161, 165}, 18}, - /* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 24}, - /* 0x0E, RTW_CHPLAN_KOREA */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 31}, - /* 0x0F, RTW_CHPLAN_TURKEY */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64}, 19}, - /* 0x10, RTW_CHPLAN_JAPAN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32}, - /* 0x11, RTW_CHPLAN_FCC_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 149, 153, 157, 161, 165}, 20}, - /* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48}, 17}, - /* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 37}, - /* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 149, 153, 157, 161, 165}, 19}, -}; -#endif - -enum rtw_rd_2g { - RTW_RD_2G_NULL = 0, - RTW_RD_2G_WORLD = 1, /* Worldwird 13 */ - RTW_RD_2G_ETSI1 = 2, /* Europe */ - RTW_RD_2G_FCC1 = 3, /* US */ - RTW_RD_2G_MKK1 = 4, /* Japan */ - RTW_RD_2G_ETSI2 = 5, /* France */ - RTW_RD_2G_GLOBAL = 6, /* Global domain */ - RTW_RD_2G_MKK2 = 7, /* Japan */ - RTW_RD_2G_FCC2 = 8, /* US */ - RTW_RD_2G_IC1 = 9, /* Canada */ - RTW_RD_2G_WORLD1 = 10, /* Worldwide 11 */ - - RTW_RD_2G_MAX, -}; - -enum rtw_rd_5g { - RTW_RD_5G_NULL = 0, /* */ - RTW_RD_5G_ETSI1 = 1, /* Europe */ - RTW_RD_5G_ETSI2 = 2, /* Australia, New Zealand */ - RTW_RD_5G_ETSI3 = 3, /* Russia */ - RTW_RD_5G_FCC1 = 4, /* US */ - RTW_RD_5G_FCC2 = 5, /* FCC w/o DFS Channels */ - RTW_RD_5G_FCC3 = 6, /* Bolivia, Chile, El Salvador, Venezuela */ - RTW_RD_5G_FCC4 = 7, /* Venezuela */ - RTW_RD_5G_FCC5 = 8, /* China */ - RTW_RD_5G_FCC6 = 9, /* */ - RTW_RD_5G_FCC7 = 10, /* US(w/o Weather radar) */ - RTW_RD_5G_IC1 = 11, /* Canada(w/o Weather radar) */ - RTW_RD_5G_KCC1 = 12, /* Korea */ - RTW_RD_5G_MKK1 = 13, /* Japan */ - RTW_RD_5G_MKK2 = 14, /* Japan (W52, W53) */ - RTW_RD_5G_MKK3 = 15, /* Japan (W56) */ - RTW_RD_5G_NCC1 = 16, /* Taiwan, (w/o Weather radar) */ - RTW_RD_5G_NCC2 = 17, /* Taiwan, Band2, Band4 */ - RTW_RD_5G_NCC3 = 18, /* Taiwan w/o DFS, Band4 only */ - RTW_RD_5G_ETSI4 = 19, /* Europe w/o DFS, Band1 only */ - RTW_RD_5G_ETSI5 = 20, /* Australia, New Zealand(w/o Weather radar) */ - RTW_RD_5G_FCC8 = 21, /* Latin America */ - RTW_RD_5G_ETSI6 = 22, /* Israel, Bahrain, Egypt, India, China, Malaysia */ - RTW_RD_5G_ETSI7 = 23, /* China */ - RTW_RD_5G_ETSI8 = 24, /* Jordan */ - RTW_RD_5G_ETSI9 = 25, /* Lebanon */ - RTW_RD_5G_ETSI10 = 26, /* Qatar */ - RTW_RD_5G_ETSI11 = 27, /* Russia */ - RTW_RD_5G_NCC4 = 28, /* Taiwan, (w/o Weather radar) */ - RTW_RD_5G_ETSI12 = 29, /* Indonesia */ - RTW_RD_5G_FCC9 = 30, /* (w/o Weather radar) */ - RTW_RD_5G_ETSI13 = 31, /* (w/o Weather radar) */ - RTW_RD_5G_FCC10 = 32, /* Argentina(w/o Weather radar) */ - RTW_RD_5G_MKK4 = 33, /* Japan (W52) */ - RTW_RD_5G_ETSI14 = 34, /* Russia */ - RTW_RD_5G_FCC11 = 35, /* US(include CH144) */ - RTW_RD_5G_ETSI15 = 36, /* Malaysia */ - RTW_RD_5G_MKK5 = 37, /* Japan */ - RTW_RD_5G_ETSI16 = 38, /* Europe */ - RTW_RD_5G_ETSI17 = 39, /* Europe */ - RTW_RD_5G_FCC12 = 40, /* FCC */ - RTW_RD_5G_FCC13 = 41, /* FCC */ - RTW_RD_5G_FCC14 = 42, /* FCC w/o Weather radar(w/o 5600~5650MHz) */ - RTW_RD_5G_FCC15 = 43, /* FCC w/o Band3 */ - RTW_RD_5G_FCC16 = 44, /* FCC w/o Band3 */ - RTW_RD_5G_ETSI18 = 45, /* ETSI w/o DFS Band2&3 */ - RTW_RD_5G_ETSI19 = 46, /* Europe */ - RTW_RD_5G_FCC17 = 47, /* FCC w/o Weather radar(w/o 5600~5650MHz) */ - RTW_RD_5G_ETSI20 = 48, /* Europe */ - RTW_RD_5G_IC2 = 49, /* Canada(w/o Weather radar), include ch144 */ - RTW_RD_5G_ETSI21 = 50, /* Australia, New Zealand(w/o Weather radar) */ - RTW_RD_5G_FCC18 = 51, /* */ - RTW_RD_5G_WORLD = 52, /* Worldwide */ - RTW_RD_5G_CHILE1 = 53, /* Chile */ - RTW_RD_5G_ACMA1 = 54, /* Australia, New Zealand (w/o Weather radar) (w/o Ch120~Ch128) */ - RTW_RD_5G_WORLD1 = 55, /* 5G Worldwide Band1&2 */ - RTW_RD_5G_CHILE2 = 56, /* Chile (Band2,Band3) */ - - /* === Below are driver defined for legacy channel plan compatible, DON'T assign index ==== */ - RTW_RD_5G_OLD_FCC1, - RTW_RD_5G_OLD_NCC1, - RTW_RD_5G_OLD_KCC1, - - RTW_RD_5G_MAX, -}; - -static struct ch_list_t RTW_ChannelPlan2G[] = { - /* 0, RTW_RD_2G_NULL */ CH_LIST_ENT(0), - /* 1, RTW_RD_2G_WORLD */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), - /* 2, RTW_RD_2G_ETSI1 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), - /* 3, RTW_RD_2G_FCC1 */ CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11), - /* 4, RTW_RD_2G_MKK1 */ CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14), - /* 5, RTW_RD_2G_ETSI2 */ CH_LIST_ENT(4, 10, 11, 12, 13), - /* 6, RTW_RD_2G_GLOBAL */ CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14), - /* 7, RTW_RD_2G_MKK2 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), - /* 8, RTW_RD_2G_FCC2 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), - /* 9, RTW_RD_2G_IC1 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), - /* 10, RTW_RD_2G_WORLD1 */ CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11), -}; - -#ifdef CONFIG_IEEE80211_BAND_5GHZ -static struct ch_list_t RTW_ChannelPlan5G[] = { - /* 0, RTW_RD_5G_NULL */ CH_LIST_ENT(0), - /* 1, RTW_RD_5G_ETSI1 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), - /* 2, RTW_RD_5G_ETSI2 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 3, RTW_RD_5G_ETSI3 */ CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165), - /* 4, RTW_RD_5G_FCC1 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 5, RTW_RD_5G_FCC2 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165), - /* 6, RTW_RD_5G_FCC3 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), - /* 7, RTW_RD_5G_FCC4 */ CH_LIST_ENT(12, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161), - /* 8, RTW_RD_5G_FCC5 */ CH_LIST_ENT(5, 149, 153, 157, 161, 165), - /* 9, RTW_RD_5G_FCC6 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), - /* 10, RTW_RD_5G_FCC7 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 11, RTW_RD_5G_IC1 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 12, RTW_RD_5G_KCC1 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161), - /* 13, RTW_RD_5G_MKK1 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), - /* 14, RTW_RD_5G_MKK2 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), - /* 15, RTW_RD_5G_MKK3 */ CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), - /* 16, RTW_RD_5G_NCC1 */ CH_LIST_ENT(16, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 17, RTW_RD_5G_NCC2 */ CH_LIST_ENT(8, 56, 60, 64, 149, 153, 157, 161, 165), - /* 18, RTW_RD_5G_NCC3 */ CH_LIST_ENT(5, 149, 153, 157, 161, 165), - /* 19, RTW_RD_5G_ETSI4 */ CH_LIST_ENT(4, 36, 40, 44, 48), - /* 20, RTW_RD_5G_ETSI5 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 21, RTW_RD_5G_FCC8 */ CH_LIST_ENT(4, 149, 153, 157, 161), - /* 22, RTW_RD_5G_ETSI6 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), - /* 23, RTW_RD_5G_ETSI7 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), - /* 24, RTW_RD_5G_ETSI8 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165), - /* 25, RTW_RD_5G_ETSI9 */ CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), - /* 26, RTW_RD_5G_ETSI10 */ CH_LIST_ENT(5, 149, 153, 157, 161, 165), - /* 27, RTW_RD_5G_ETSI11 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140, 149, 153, 157, 161, 165), - /* 28, RTW_RD_5G_NCC4 */ CH_LIST_ENT(17, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 29, RTW_RD_5G_ETSI12 */ CH_LIST_ENT(4, 149, 153, 157, 161), - /* 30, RTW_RD_5G_FCC9 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 31, RTW_RD_5G_ETSI13 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140), - /* 32, RTW_RD_5G_FCC10 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161), - /* 33, RTW_RD_5G_MKK4 */ CH_LIST_ENT(4, 36, 40, 44, 48), - /* 34, RTW_RD_5G_ETSI14 */ CH_LIST_ENT(11, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140), - /* 35, RTW_RD_5G_FCC11 */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165), - /* 36, RTW_RD_5G_ETSI15 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 149, 153, 157, 161, 165), - /* 37, RTW_RD_5G_MKK5 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 38, RTW_RD_5G_ETSI16 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 39, RTW_RD_5G_ETSI17 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 40, RTW_RD_5G_FCC12*/ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 41, RTW_RD_5G_FCC13 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 42, RTW_RD_5G_FCC14 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 43, RTW_RD_5G_FCC15 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), - /* 44, RTW_RD_5G_FCC16 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), - /* 45, RTW_RD_5G_ETSI18 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165), - /* 46, RTW_RD_5G_ETSI19 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 47, RTW_RD_5G_FCC17 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140), - /* 48, RTW_RD_5G_ETSI20 */ CH_LIST_ENT(9, 52, 56, 60, 64, 149, 153, 157, 161, 165), - /* 49, RTW_RD_5G_IC2 */ CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 144, 149, 153, 157, 161, 165), - /* 50, RTW_RD_5G_ETSI21 */ CH_LIST_ENT(13, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 51, RTW_RD_5G_FCC18 */ CH_LIST_ENT(8, 100, 104, 108, 112, 116, 132, 136, 140), - /* 52, RTW_RD_5G_WORLD */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165), - /* 53, RTW_RD_5G_CHILE1 */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165), - /* 54, RTW_RD_5G_ACMA1 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 55, RTW_RD_5G_WORLD1 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), - /* 56, RTW_RD_5G_CHILE2 */ CH_LIST_ENT(16, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144), - - /* === Below are driver defined for legacy channel plan compatible, NO static index assigned ==== */ - /* RTW_RD_5G_OLD_FCC1 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165), - /* RTW_RD_5G_OLD_NCC1 */ CH_LIST_ENT(15, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165), - /* RTW_RD_5G_OLD_KCC1 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165), -}; -#endif /* CONFIG_IEEE80211_BAND_5GHZ */ - -static RT_CHANNEL_PLAN_MAP RTW_ChannelPlanMap[RTW_CHPLAN_MAX] = { - /* ===== 0x00 ~ 0x1F, legacy channel plan ===== */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_KCC1, TXPWR_LMT_FCC), /* 0x00, RTW_CHPLAN_FCC */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_OLD_FCC1, TXPWR_LMT_FCC), /* 0x01, RTW_CHPLAN_IC */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI), /* 0x02, RTW_CHPLAN_ETSI */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x03, RTW_CHPLAN_SPAIN */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x04, RTW_CHPLAN_FRANCE */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x05, RTW_CHPLAN_MKK */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x06, RTW_CHPLAN_MKK1 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_FCC6, TXPWR_LMT_ETSI), /* 0x07, RTW_CHPLAN_ISRAEL */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_FCC6, TXPWR_LMT_MKK), /* 0x08, RTW_CHPLAN_TELEC */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_OLD_NCC1, TXPWR_LMT_FCC), /* 0x0B, RTW_CHPLAN_TAIWAN */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_FCC5, TXPWR_LMT_ETSI), /* 0x0C, RTW_CHPLAN_CHINA */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC3, TXPWR_LMT_WW), /* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ /* ETSI:Singapore, India. FCC:Mexico => WW */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_OLD_KCC1, TXPWR_LMT_ETSI), /* 0x0E, RTW_CHPLAN_KOREA */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC6, TXPWR_LMT_ETSI), /* 0x0F, RTW_CHPLAN_TURKEY */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_MKK), /* 0x10, RTW_CHPLAN_JAPAN */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC2, TXPWR_LMT_FCC), /* 0x11, RTW_CHPLAN_FCC_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_FCC7, TXPWR_LMT_MKK), /* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC1, TXPWR_LMT_WW), /* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC2, TXPWR_LMT_FCC), /* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC7, TXPWR_LMT_ETSI), /* 0x15, RTW_CHPLAN_ETSI_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_NCC1, TXPWR_LMT_ETSI), /* 0x16, RTW_CHPLAN_KOREA_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_FCC7, TXPWR_LMT_MKK), /* 0x17, RTW_CHPLAN_JAPAN_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_FCC5, TXPWR_LMT_ETSI), /* 0x18, RTW_CHPLAN_PAKISTAN_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC5, TXPWR_LMT_FCC), /* 0x19, RTW_CHPLAN_TAIWAN2_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1A, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1B, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1C, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1D, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1E, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_FCC1, TXPWR_LMT_WW), /* 0x1F, RTW_CHPLAN_WORLD_WIDE_ONLY_5G */ - - /* ===== 0x20 ~ 0x7F, new channel plan ===== */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x20, RTW_CHPLAN_WORLD_NULL */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x21, RTW_CHPLAN_ETSI1_NULL */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NULL, TXPWR_LMT_FCC), /* 0x22, RTW_CHPLAN_FCC1_NULL */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x23, RTW_CHPLAN_MKK1_NULL */ - CHPLAN_ENT(RTW_RD_2G_ETSI2, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x24, RTW_CHPLAN_ETSI2_NULL */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC1, TXPWR_LMT_FCC), /* 0x25, RTW_CHPLAN_FCC1_FCC1 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI), /* 0x26, RTW_CHPLAN_WORLD_ETSI1 */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_MKK1, TXPWR_LMT_MKK), /* 0x27, RTW_CHPLAN_MKK1_MKK1 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_KCC1, TXPWR_LMT_KCC), /* 0x28, RTW_CHPLAN_WORLD_KCC1 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC2, TXPWR_LMT_FCC), /* 0x29, RTW_CHPLAN_WORLD_FCC2 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_NULL, TXPWR_LMT_FCC), /* 0x2A, RTW_CHPLAN_FCC2_NULL */ - CHPLAN_ENT(RTW_RD_2G_IC1, RTW_RD_5G_IC2, TXPWR_LMT_IC), /* 0x2B, RTW_CHPLAN_IC1_IC2 */ - CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x2C, RTW_CHPLAN_MKK2_NULL */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_CHILE1, TXPWR_LMT_CHILE), /* 0x2D, RTW_CHPLAN_WORLD_CHILE1 */ - CHPLAN_ENT(RTW_RD_2G_WORLD1, RTW_RD_5G_WORLD1, TXPWR_LMT_WW), /* 0x2E, RTW_CHPLAN_WORLD1_WORLD1 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_CHILE2, TXPWR_LMT_CHILE), /* 0x2F, RTW_CHPLAN_WORLD_CHILE2 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC3, TXPWR_LMT_FCC), /* 0x30, RTW_CHPLAN_WORLD_FCC3 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC4, TXPWR_LMT_FCC), /* 0x31, RTW_CHPLAN_WORLD_FCC4 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC5, TXPWR_LMT_FCC), /* 0x32, RTW_CHPLAN_WORLD_FCC5 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC6, TXPWR_LMT_FCC), /* 0x33, RTW_CHPLAN_WORLD_FCC6 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC7, TXPWR_LMT_FCC), /* 0x34, RTW_CHPLAN_FCC1_FCC7 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI2, TXPWR_LMT_ETSI), /* 0x35, RTW_CHPLAN_WORLD_ETSI2 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI3, TXPWR_LMT_ETSI), /* 0x36, RTW_CHPLAN_WORLD_ETSI3 */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_MKK2, TXPWR_LMT_MKK), /* 0x37, RTW_CHPLAN_MKK1_MKK2 */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_MKK3, TXPWR_LMT_MKK), /* 0x38, RTW_CHPLAN_MKK1_MKK3 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC1, TXPWR_LMT_FCC), /* 0x39, RTW_CHPLAN_FCC1_NCC1 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI), /* 0x3A, RTW_CHPLAN_ETSI1_ETSI1 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ACMA1, TXPWR_LMT_ACMA), /* 0x3B, RTW_CHPLAN_ETSI1_ACMA1 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI6, TXPWR_LMT_ETSI), /* 0x3C, RTW_CHPLAN_ETSI1_ETSI6 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI12, TXPWR_LMT_ETSI), /* 0x3D, RTW_CHPLAN_ETSI1_ETSI12 */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x3E, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x3F, */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC2, TXPWR_LMT_FCC), /* 0x40, RTW_CHPLAN_FCC1_NCC2 */ - CHPLAN_ENT(RTW_RD_2G_GLOBAL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x41, RTW_CHPLAN_GLOBAL_NULL */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI4, TXPWR_LMT_ETSI), /* 0x42, RTW_CHPLAN_ETSI1_ETSI4 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC2, TXPWR_LMT_FCC), /* 0x43, RTW_CHPLAN_FCC1_FCC2 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC3, TXPWR_LMT_FCC), /* 0x44, RTW_CHPLAN_FCC1_NCC3 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ACMA1, TXPWR_LMT_ACMA), /* 0x45, RTW_CHPLAN_WORLD_ACMA1 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC8, TXPWR_LMT_FCC), /* 0x46, RTW_CHPLAN_FCC1_FCC8 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI6, TXPWR_LMT_ETSI), /* 0x47, RTW_CHPLAN_WORLD_ETSI6 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI7, TXPWR_LMT_ETSI), /* 0x48, RTW_CHPLAN_WORLD_ETSI7 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI8, TXPWR_LMT_ETSI), /* 0x49, RTW_CHPLAN_WORLD_ETSI8 */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4A, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4B, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4C, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4D, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4E, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4F, */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI9, TXPWR_LMT_ETSI), /* 0x50, RTW_CHPLAN_WORLD_ETSI9 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI10, TXPWR_LMT_ETSI), /* 0x51, RTW_CHPLAN_WORLD_ETSI10 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI11, TXPWR_LMT_ETSI), /* 0x52, RTW_CHPLAN_WORLD_ETSI11 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC4, TXPWR_LMT_FCC), /* 0x53, RTW_CHPLAN_FCC1_NCC4 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI12, TXPWR_LMT_ETSI), /* 0x54, RTW_CHPLAN_WORLD_ETSI12 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC9, TXPWR_LMT_FCC), /* 0x55, RTW_CHPLAN_FCC1_FCC9 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI13, TXPWR_LMT_ETSI), /* 0x56, RTW_CHPLAN_WORLD_ETSI13 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC10, TXPWR_LMT_FCC), /* 0x57, RTW_CHPLAN_FCC1_FCC10 */ - CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_MKK4, TXPWR_LMT_MKK), /* 0x58, RTW_CHPLAN_MKK2_MKK4 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI14, TXPWR_LMT_ETSI), /* 0x59, RTW_CHPLAN_WORLD_ETSI14 */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5A, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5B, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5C, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5D, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5E, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5F, */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC5, TXPWR_LMT_FCC), /* 0x60, RTW_CHPLAN_FCC1_FCC5 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC7, TXPWR_LMT_FCC), /* 0x61, RTW_CHPLAN_FCC2_FCC7 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC1, TXPWR_LMT_FCC), /* 0x62, RTW_CHPLAN_FCC2_FCC1 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI15, TXPWR_LMT_ETSI), /* 0x63, RTW_CHPLAN_WORLD_ETSI15 */ - CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_MKK5, TXPWR_LMT_MKK), /* 0x64, RTW_CHPLAN_MKK2_MKK5 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI16, TXPWR_LMT_ETSI), /* 0x65, RTW_CHPLAN_ETSI1_ETSI16 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC14, TXPWR_LMT_FCC), /* 0x66, RTW_CHPLAN_FCC1_FCC14 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC12, TXPWR_LMT_FCC), /* 0x67, RTW_CHPLAN_FCC1_FCC12 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC14, TXPWR_LMT_FCC), /* 0x68, RTW_CHPLAN_FCC2_FCC14 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC12, TXPWR_LMT_FCC), /* 0x69, RTW_CHPLAN_FCC2_FCC12 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI17, TXPWR_LMT_ETSI), /* 0x6A, RTW_CHPLAN_ETSI1_ETSI17 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC16, TXPWR_LMT_FCC), /* 0x6B, RTW_CHPLAN_WORLD_FCC16 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC13, TXPWR_LMT_FCC), /* 0x6C, RTW_CHPLAN_WORLD_FCC13 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC15, TXPWR_LMT_FCC), /* 0x6D, RTW_CHPLAN_FCC2_FCC15 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC12, TXPWR_LMT_FCC), /* 0x6E, RTW_CHPLAN_WORLD_FCC12 */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI8, TXPWR_LMT_ETSI), /* 0x6F, RTW_CHPLAN_NULL_ETSI8 */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI18, TXPWR_LMT_ETSI), /* 0x70, RTW_CHPLAN_NULL_ETSI18 */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI17, TXPWR_LMT_ETSI), /* 0x71, RTW_CHPLAN_NULL_ETSI17 */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI19, TXPWR_LMT_ETSI), /* 0x72, RTW_CHPLAN_NULL_ETSI19 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC7, TXPWR_LMT_FCC), /* 0x73, RTW_CHPLAN_WORLD_FCC7 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC17, TXPWR_LMT_FCC), /* 0x74, RTW_CHPLAN_FCC2_FCC17 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI20, TXPWR_LMT_ETSI), /* 0x75, RTW_CHPLAN_WORLD_ETSI20 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC11, TXPWR_LMT_FCC), /* 0x76, RTW_CHPLAN_FCC2_FCC11 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI21, TXPWR_LMT_ETSI), /* 0x77, RTW_CHPLAN_WORLD_ETSI21 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC18, TXPWR_LMT_FCC), /* 0x78, RTW_CHPLAN_FCC1_FCC18 */ - CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_MKK1, TXPWR_LMT_MKK), /* 0x79, RTW_CHPLAN_MKK2_MKK1 */ -}; - -static RT_CHANNEL_PLAN_MAP RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE = - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC1, TXPWR_LMT_FCC); /* 0x7F, Realtek Define */ - -bool rtw_chplan_is_empty(u8 id) -{ - RT_CHANNEL_PLAN_MAP *chplan_map; - - if (id == RTW_CHPLAN_REALTEK_DEFINE) - chplan_map = &RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE; - else - chplan_map = &RTW_ChannelPlanMap[id]; - - if (chplan_map->Index2G == RTW_RD_2G_NULL - #ifdef CONFIG_IEEE80211_BAND_5GHZ - && chplan_map->Index5G == RTW_RD_5G_NULL - #endif - ) - return _TRUE; - - return _FALSE; -} - -bool rtw_regsty_is_excl_chs(struct registry_priv *regsty, u8 ch) -{ - int i; - - for (i = 0; i < MAX_CHANNEL_NUM; i++) { - if (regsty->excl_chs[i] == 0) - break; - if (regsty->excl_chs[i] == ch) - return _TRUE; - } - return _FALSE; -} - -inline u8 rtw_rd_5g_band1_passive(u8 rtw_rd_5g) -{ - u8 passive = 0; - - switch (rtw_rd_5g) { - case RTW_RD_5G_FCC13: - case RTW_RD_5G_FCC16: - case RTW_RD_5G_ETSI18: - case RTW_RD_5G_ETSI19: - case RTW_RD_5G_WORLD: - case RTW_RD_5G_WORLD1: - passive = 1; - }; - - return passive; -} - -inline u8 rtw_rd_5g_band4_passive(u8 rtw_rd_5g) -{ - u8 passive = 0; - - switch (rtw_rd_5g) { - case RTW_RD_5G_MKK5: - case RTW_RD_5G_ETSI16: - case RTW_RD_5G_ETSI18: - case RTW_RD_5G_ETSI19: - case RTW_RD_5G_WORLD: - passive = 1; - }; - - return passive; -} - static void init_channel_list(_adapter *padapter, RT_CHANNEL_INFO *channel_set , struct p2p_channels *channel_list) { @@ -537,14 +148,14 @@ static void init_channel_list(_adapter *padapter, RT_CHANNEL_INFO *channel_set for (ch = o->min_chan; ch <= o->max_chan; ch += o->inc) { if (rtw_chset_search_ch(channel_set, ch) == -1) continue; - +#if defined(CONFIG_80211N_HT) || defined(CONFIG_80211AC_VHT) if ((padapter->registrypriv.ht_enable == 0) && (o->inc == 8)) continue; if ((REGSTY_IS_BW_5G_SUPPORT(regsty, CHANNEL_WIDTH_40)) && ((o->bw == BW40MINUS) || (o->bw == BW40PLUS))) continue; - +#endif if (reg == NULL) { reg = &channel_list->reg_class[cla]; cla++; @@ -559,132 +170,10 @@ static void init_channel_list(_adapter *padapter, RT_CHANNEL_INFO *channel_set } -static u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, RT_CHANNEL_INFO *channel_set) -{ - struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); - struct registry_priv *regsty = adapter_to_regsty(padapter); - u8 index, chanset_size = 0; - u8 b5GBand = _FALSE, b2_4GBand = _FALSE; - u8 Index2G = 0, Index5G = 0; - int i; - - if (!rtw_is_channel_plan_valid(ChannelPlan)) { - RTW_ERR("ChannelPlan ID 0x%02X error !!!!!\n", ChannelPlan); - return chanset_size; - } - - _rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM); - - if (IsSupported24G(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_2G)) - b2_4GBand = _TRUE; - - if (is_supported_5g(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_5G)) - b5GBand = _TRUE; - - if (b2_4GBand == _FALSE && b5GBand == _FALSE) { - RTW_WARN("HW band_cap has no intersection with SW wireless_mode setting\n"); - return chanset_size; - } - - if (b2_4GBand) { - if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE) - Index2G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index2G; - else - Index2G = RTW_ChannelPlanMap[ChannelPlan].Index2G; - - for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan2G[Index2G]); index++) { - if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan2G[Index2G], index)) == _TRUE) - continue; - - if (chanset_size >= MAX_CHANNEL_NUM) { - RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM); - break; - } - - channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan2G[Index2G], index); - - if (ChannelPlan == RTW_CHPLAN_GLOBAL_DOAMIN - || Index2G == RTW_RD_2G_GLOBAL - ) { - /* Channel 1~11 is active, and 12~14 is passive */ - if (channel_set[chanset_size].ChannelNum >= 1 && channel_set[chanset_size].ChannelNum <= 11) - channel_set[chanset_size].ScanType = SCAN_ACTIVE; - else if ((channel_set[chanset_size].ChannelNum >= 12 && channel_set[chanset_size].ChannelNum <= 14)) - channel_set[chanset_size].ScanType = SCAN_PASSIVE; - } else if (ChannelPlan == RTW_CHPLAN_WORLD_WIDE_13 - || ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G - || Index2G == RTW_RD_2G_WORLD - ) { - /* channel 12~13, passive scan */ - if (channel_set[chanset_size].ChannelNum <= 11) - channel_set[chanset_size].ScanType = SCAN_ACTIVE; - else - channel_set[chanset_size].ScanType = SCAN_PASSIVE; - } else - channel_set[chanset_size].ScanType = SCAN_ACTIVE; - - chanset_size++; - } - } - -#ifdef CONFIG_IEEE80211_BAND_5GHZ - if (b5GBand) { - if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE) - Index5G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index5G; - else - Index5G = RTW_ChannelPlanMap[ChannelPlan].Index5G; - - for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan5G[Index5G]); index++) { - if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan5G[Index5G], index)) == _TRUE) - continue; - #ifndef CONFIG_DFS - if (rtw_is_dfs_ch(CH_LIST_CH(RTW_ChannelPlan5G[Index5G], index))) - continue; - #endif - - if (chanset_size >= MAX_CHANNEL_NUM) { - RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM); - break; - } - - channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan5G[Index5G], index); - - if ((ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G) /* all channels passive */ - || (rtw_is_5g_band1(channel_set[chanset_size].ChannelNum) - && rtw_rd_5g_band1_passive(Index5G)) /* band1 passive */ - || (rtw_is_5g_band4(channel_set[chanset_size].ChannelNum) - && rtw_rd_5g_band4_passive(Index5G)) /* band4 passive */ - || (rtw_is_dfs_ch(channel_set[chanset_size].ChannelNum)) /* DFS channel(band2, 3) passive */ - ) - channel_set[chanset_size].ScanType = SCAN_PASSIVE; - else - channel_set[chanset_size].ScanType = SCAN_ACTIVE; - - chanset_size++; - } - } - - #ifdef CONFIG_DFS_MASTER - for (i = 0; i < chanset_size; i++) - channel_set[i].non_ocp_end_time = rtw_get_current_time(); - #endif -#endif /* CONFIG_IEEE80211_BAND_5GHZ */ - - if (chanset_size) - RTW_INFO(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, ch num:%d\n" - , FUNC_ADPT_ARG(padapter), ChannelPlan, chanset_size); - else - RTW_WARN(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, final chset has no channel\n" - , FUNC_ADPT_ARG(padapter), ChannelPlan); - - return chanset_size; -} - -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT void rtw_txpwr_init_regd(struct rf_ctl_t *rfctl) { u8 regd; - u8 regd_name; struct regd_exc_ent *exc; struct txpwr_lmt_ent *ent; _irqL irqL; @@ -727,11 +216,7 @@ void rtw_txpwr_init_regd(struct rf_ctl_t *rfctl) } /* follow default channel plan mapping */ - if (rfctl->ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE) - regd = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.regd; - else - regd = RTW_ChannelPlanMap[rfctl->ChannelPlan].regd; - + regd = rtw_chplan_get_default_regd(rfctl->ChannelPlan); if (regd == TXPWR_LMT_NONE) rfctl->regd_name = regd_str(TXPWR_LMT_NONE); else if (regd == TXPWR_LMT_WW) @@ -773,6 +258,7 @@ void rtw_txpwr_init_regd(struct rf_ctl_t *rfctl) ); if (rfctl->regd_name) break; + __attribute__ ((__fallthrough__)); default: rfctl->regd_name = regd_str(TXPWR_LMT_WW); RTW_PRINT("assign %s for default case\n", regd_str(TXPWR_LMT_WW)); @@ -793,7 +279,7 @@ void rtw_rfctl_init(_adapter *adapter) _rtw_mutex_init(&rfctl->offch_mutex); -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT _rtw_mutex_init(&rfctl->txpwr_lmt_mutex); _rtw_init_listhead(&rfctl->reg_exc_list); _rtw_init_listhead(&rfctl->txpwr_lmt_list); @@ -803,8 +289,10 @@ void rtw_rfctl_init(_adapter *adapter) #ifdef CONFIG_DFS_MASTER rfctl->cac_start_time = rfctl->cac_end_time = RTW_CAC_STOPPED; - - /* TODO: dfs_master_timer */ + rtw_init_timer(&(rfctl->radar_detect_timer), adapter, rtw_dfs_rd_timer_hdl, rfctl); +#endif +#ifdef CONFIG_DFS_SLAVE_WITH_RADAR_DETECT + rfctl->dfs_slave_with_rd = 1; #endif } @@ -814,26 +302,21 @@ void rtw_rfctl_deinit(_adapter *adapter) _rtw_mutex_free(&rfctl->offch_mutex); -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT rtw_regd_exc_list_free(rfctl); rtw_txpwr_lmt_list_free(rfctl); _rtw_mutex_free(&rfctl->txpwr_lmt_mutex); #endif - -#ifdef CONFIG_DFS_MASTER - /* TODO: dfs_master_timer */ -#endif } #ifdef CONFIG_DFS_MASTER /* -* called in rtw_dfs_master_enable() +* called in rtw_dfs_rd_enable() * assume the request channel coverage is DFS range * base on the current status and the request channel coverage to check if need to reset complete CAC time */ -bool rtw_is_cac_reset_needed(_adapter *adapter, u8 ch, u8 bw, u8 offset) +bool rtw_is_cac_reset_needed(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset) { - struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); bool needed = _FALSE; u32 cur_hi, cur_lo, hi, lo; @@ -930,7 +413,7 @@ bool rtw_rfctl_is_tx_blocked_by_ch_waiting(struct rf_ctl_t *rfctl) return rtw_rfctl_overlap_radar_detect_ch(rfctl) && IS_CH_WAITING(rfctl); } -bool rtw_chset_is_ch_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset) +bool rtw_chset_is_chbw_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset) { bool ret = _FALSE; u32 hi = 0, lo = 0; @@ -960,6 +443,11 @@ exit: return ret; } +bool rtw_chset_is_ch_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch) +{ + return rtw_chset_is_chbw_non_ocp(ch_set, ch, CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE); +} + u32 rtw_chset_get_ch_non_ocp_ms(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset) { int ms = 0; @@ -1039,19 +527,19 @@ inline void rtw_chset_update_non_ocp_ms(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u _rtw_chset_update_non_ocp(ch_set, ch, bw, offset, ms); } -u32 rtw_get_ch_waiting_ms(_adapter *adapter, u8 ch, u8 bw, u8 offset, u32 *r_non_ocp_ms, u32 *r_cac_ms) +u32 rtw_get_ch_waiting_ms(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, u32 *r_non_ocp_ms, u32 *r_cac_ms) { - struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); + struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); u32 non_ocp_ms; u32 cac_ms; u8 in_rd_range = 0; /* if in current radar detection range*/ - if (rtw_chset_is_ch_non_ocp(rfctl->channel_set, ch, bw, offset)) + if (rtw_chset_is_chbw_non_ocp(rfctl->channel_set, ch, bw, offset)) non_ocp_ms = rtw_chset_get_ch_non_ocp_ms(rfctl->channel_set, ch, bw, offset); else non_ocp_ms = 0; - if (rfctl->dfs_master_enabled) { + if (rfctl->radar_detect_enabled) { u32 cur_hi, cur_lo, hi, lo; if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) { @@ -1075,7 +563,7 @@ u32 rtw_get_ch_waiting_ms(_adapter *adapter, u8 ch, u8 bw, u8 offset, u32 *r_non cac_ms = rtw_systime_to_ms(rfctl->cac_end_time - rtw_get_current_time()); else cac_ms = 0; - } else if (rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(adapter))) + } else if (rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(dvobj))) cac_ms = CAC_TIME_CE_MS; else cac_ms = CAC_TIME_MS; @@ -1088,13 +576,12 @@ u32 rtw_get_ch_waiting_ms(_adapter *adapter, u8 ch, u8 bw, u8 offset, u32 *r_non return non_ocp_ms + cac_ms; } -void rtw_reset_cac(_adapter *adapter, u8 ch, u8 bw, u8 offset) +void rtw_reset_cac(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset) { - struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); u32 non_ocp_ms; u32 cac_ms; - rtw_get_ch_waiting_ms(adapter + rtw_get_ch_waiting_ms(rfctl , ch , bw , offset @@ -1114,9 +601,9 @@ void rtw_reset_cac(_adapter *adapter, u8 ch, u8 bw, u8 offset) rfctl->cac_end_time++; } -u32 rtw_force_stop_cac(_adapter *adapter, u32 timeout_ms) +u32 rtw_force_stop_cac(struct rf_ctl_t *rfctl, u32 timeout_ms) { - struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); + struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); systime start; u32 pass_ms; @@ -1127,14 +614,14 @@ u32 rtw_force_stop_cac(_adapter *adapter, u32 timeout_ms) while (rtw_get_passing_time_ms(start) <= timeout_ms && IS_UNDER_CAC(rfctl) ) { - if (RTW_CANNOT_RUN(adapter)) + if (dev_is_surprise_removed(dvobj) || dev_is_drv_stopped(dvobj)) break; rtw_msleep_os(20); } if (IS_UNDER_CAC(rfctl)) { - if (!RTW_CANNOT_RUN(adapter)) - RTW_INFO(FUNC_ADPT_FMT" waiting for cac stop timeout!\n", FUNC_ADPT_ARG(adapter)); + if (!dev_is_surprise_removed(dvobj) && !dev_is_drv_stopped(dvobj)) + RTW_INFO("%s waiting for cac stop timeout!\n", __func__); } rfctl->cac_force_stop = 0; @@ -1146,16 +633,15 @@ u32 rtw_force_stop_cac(_adapter *adapter, u32 timeout_ms) #endif /* CONFIG_DFS_MASTER */ /* choose channel with shortest waiting (non ocp + cac) time */ -bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 sel_ch, u8 max_bw +bool rtw_choose_shortest_waiting_ch(struct rf_ctl_t *rfctl, u8 sel_ch, u8 max_bw , u8 *dec_ch, u8 *dec_bw, u8 *dec_offset - , u8 d_flags, u8 cur_ch, u8 same_band_prefer) + , u8 d_flags, u8 cur_ch, u8 same_band_prefer, u8 mesh_only) { #ifndef DBG_CHOOSE_SHORTEST_WAITING_CH #define DBG_CHOOSE_SHORTEST_WAITING_CH 0 #endif - - struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); - struct registry_priv *regsty = adapter_to_regsty(adapter); + struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); + struct registry_priv *regsty = dvobj_to_regsty(dvobj); u8 ch, bw, offset; u8 ch_c = 0, bw_c = 0, offset_c = 0; int i; @@ -1168,7 +654,7 @@ bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 sel_ch, u8 max_bw /* full search and narrow bw judegement first to avoid potetial judegement timing issue */ for (bw = CHANNEL_WIDTH_20; bw <= max_bw; bw++) { - if (!hal_is_bw_support(adapter, bw)) + if (!hal_is_bw_support(dvobj_get_primary_adapter(dvobj), bw)) continue; for (i = 0; i < rfctl->max_chan_nums; i++) { @@ -1194,34 +680,37 @@ bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 sel_ch, u8 max_bw continue; } + if (mesh_only && ch >= 5 && ch <= 9 && bw > CHANNEL_WIDTH_20) + continue; + if (!rtw_get_offset_by_chbw(ch, bw, &offset)) continue; if (!rtw_chset_is_chbw_valid(rfctl->channel_set, ch, bw, offset)) continue; - if ((d_flags & RTW_CHF_NON_OCP) && rtw_chset_is_ch_non_ocp(rfctl->channel_set, ch, bw, offset)) + if ((d_flags & RTW_CHF_NON_OCP) && rtw_chset_is_chbw_non_ocp(rfctl->channel_set, ch, bw, offset)) continue; if ((d_flags & RTW_CHF_DFS) && rtw_is_dfs_chbw(ch, bw, offset)) continue; - if ((d_flags & RTW_CHF_LONG_CAC) && rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(adapter))) + if ((d_flags & RTW_CHF_LONG_CAC) && rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(dvobj))) continue; if ((d_flags & RTW_CHF_NON_DFS) && !rtw_is_dfs_chbw(ch, bw, offset)) continue; - if ((d_flags & RTW_CHF_NON_LONG_CAC) && !rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(adapter))) + if ((d_flags & RTW_CHF_NON_LONG_CAC) && !rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(dvobj))) continue; #ifdef CONFIG_DFS_MASTER - waiting_ms = rtw_get_ch_waiting_ms(adapter, ch, bw, offset, &non_ocp_ms, &cac_ms); + waiting_ms = rtw_get_ch_waiting_ms(rfctl, ch, bw, offset, &non_ocp_ms, &cac_ms); #endif if (DBG_CHOOSE_SHORTEST_WAITING_CH) - RTW_INFO(FUNC_ADPT_FMT":%u,%u,%u %u(non_ocp:%u, cac:%u)\n" - , FUNC_ADPT_ARG(adapter), ch, bw, offset, waiting_ms, non_ocp_ms, cac_ms); + RTW_INFO("%s:%u,%u,%u %u(non_ocp:%u, cac:%u)\n" + , __func__, ch, bw, offset, waiting_ms, non_ocp_ms, cac_ms); if (ch_c == 0 /* first: smaller wating time */ @@ -1241,8 +730,9 @@ bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 sel_ch, u8 max_bw } if (ch_c != 0) { - RTW_INFO(FUNC_ADPT_FMT": d_flags:0x%02x cur_ch:%u sb_prefer:%u %u,%u,%u waiting_ms:%u\n" - , FUNC_ADPT_ARG(adapter), d_flags, cur_ch, same_band_prefer + RTW_INFO("%s: d_flags:0x%02x cur_ch:%u sb_prefer:%u%s %u,%u,%u waiting_ms:%u\n" + , __func__, d_flags, cur_ch, same_band_prefer + , mesh_only ? " mesh_only" : "" , ch_c, bw_c, offset_c, min_waiting_ms); *dec_ch = ch_c; @@ -1251,84 +741,16 @@ bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 sel_ch, u8 max_bw return _TRUE; } - if (d_flags == 0) + if (d_flags == 0) { + RTW_INFO("%s: sel_ch:%u max_bw:%u d_flags:0x%02x cur_ch:%u sb_prefer:%u%s\n" + , __func__, sel_ch, max_bw, d_flags, cur_ch, same_band_prefer + , mesh_only ? " mesh_only" : ""); rtw_warn_on(1); + } return _FALSE; } -void dump_country_chplan(void *sel, const struct country_chplan *ent) -{ - RTW_PRINT_SEL(sel, "\"%c%c\", 0x%02X%s\n" - , ent->alpha2[0], ent->alpha2[1], ent->chplan - , COUNTRY_CHPLAN_EN_11AC(ent) ? " ac" : "" - ); -} - -void dump_country_chplan_map(void *sel) -{ - const struct country_chplan *ent; - u8 code[2]; - -#if RTW_DEF_MODULE_REGULATORY_CERT - RTW_PRINT_SEL(sel, "RTW_DEF_MODULE_REGULATORY_CERT:0x%x\n", RTW_DEF_MODULE_REGULATORY_CERT); -#endif -#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP - RTW_PRINT_SEL(sel, "CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP\n"); -#endif - - for (code[0] = 'A'; code[0] <= 'Z'; code[0]++) { - for (code[1] = 'A'; code[1] <= 'Z'; code[1]++) { - ent = rtw_get_chplan_from_country(code); - if (!ent) - continue; - - dump_country_chplan(sel, ent); - } - } -} - -void dump_chplan_id_list(void *sel) -{ - u8 first = 1; - int i; - - for (i = 0; i < RTW_CHPLAN_MAX; i++) { - if (!rtw_is_channel_plan_valid(i)) - continue; - - if (first) { - RTW_PRINT_SEL(sel, "0x%02X ", i); - first = 0; - } else - _RTW_PRINT_SEL(sel, "0x%02X ", i); - } - - _RTW_PRINT_SEL(sel, "0x7F\n"); -} - -void dump_chplan_test(void *sel) -{ - int i, j; - - /* check invalid channel */ - for (i = 0; i < RTW_RD_2G_MAX; i++) { - for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan2G[i]); j++) { - if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan2G[i], j)) == 0) - RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan2G[i], j), i, j); - } - } - -#ifdef CONFIG_IEEE80211_BAND_5GHZ - for (i = 0; i < RTW_RD_5G_MAX; i++) { - for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan5G[i]); j++) { - if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan5G[i], j)) == 0) - RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan5G[i], j), i, j); - } - } -#endif -} - void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set) { u8 i; @@ -1357,11 +779,10 @@ void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set) RTW_PRINT_SEL(sel, "total ch number:%d\n", i); } -void dump_cur_chset(void *sel, _adapter *adapter) +void dump_cur_chset(void *sel, struct rf_ctl_t *rfctl) { - struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); - struct registry_priv *regsty = adapter_to_regsty(adapter); - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); + struct registry_priv *regsty = dvobj_to_regsty(dvobj); int i; if (rfctl->country_ent) @@ -1369,12 +790,12 @@ void dump_cur_chset(void *sel, _adapter *adapter) else RTW_PRINT_SEL(sel, "chplan:0x%02X\n", rfctl->ChannelPlan); -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT RTW_PRINT_SEL(sel, "PLS regd:%s\n", rfctl->regd_name); #endif #ifdef CONFIG_DFS_MASTER - RTW_PRINT_SEL(sel, "dfs_domain:%u\n", rtw_odm_get_dfs_domain(adapter)); + RTW_PRINT_SEL(sel, "dfs_domain:%u\n", rtw_odm_get_dfs_domain(dvobj)); #endif for (i = 0; i < MAX_CHANNEL_NUM; i++) @@ -1554,8 +975,22 @@ Following are the initialization functions for WiFi MLME int init_hw_mlme_ext(_adapter *padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); u8 rx_bar_enble = _TRUE; + /* + * Sync driver status and hardware setting + */ + + /* Modify to make sure first time change channel(band) would be done properly */ + pHalData->current_channel = 0; + pHalData->current_channel_bw = CHANNEL_WIDTH_MAX; + #ifdef CONFIG_IEEE80211_BAND_5GHZ + pHalData->current_band_type = BAND_MAX; + #else + pHalData->current_band_type = BAND_ON_2_4G; + #endif + /* set_opmode_cmd(padapter, infra_client_with_mlme); */ /* removed */ rtw_hal_set_hwreg(padapter, HW_VAR_ENABLE_RX_BAR, &rx_bar_enble); set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); @@ -1565,16 +1000,40 @@ int init_hw_mlme_ext(_adapter *padapter) void init_mlme_default_rate_set(_adapter *padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - - unsigned char mixed_datarate[NumRates] = {_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_, _9M_RATE_, _12M_RATE_, _18M_RATE_, _24M_RATE_, _36M_RATE_, _48M_RATE_, _54M_RATE_, 0xff}; - unsigned char mixed_basicrate[NumRates] = {_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_, _12M_RATE_, _24M_RATE_, 0xff,}; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + unsigned char end_set[1] = {0xff}; + u8 offset_datarate = 0; + u8 offset_basicrate = 0; +#ifdef CONFIG_80211N_HT unsigned char supported_mcs_set[16] = {0xff, 0xff, 0xff, 0x00, 0x00, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; +#endif - _rtw_memcpy(pmlmeext->datarate, mixed_datarate, NumRates); - _rtw_memcpy(pmlmeext->basicrate, mixed_basicrate, NumRates); + if (IsSupportedTxCCK(padapter->registrypriv.wireless_mode)) { - _rtw_memcpy(pmlmeext->default_supported_mcs_set, supported_mcs_set, sizeof(pmlmeext->default_supported_mcs_set)); + unsigned char datarate_b[B_MODE_RATE_NUM] ={_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_}; + _rtw_memcpy(pmlmeext->datarate, datarate_b, B_MODE_RATE_NUM); + _rtw_memcpy(pmlmeext->basicrate, datarate_b, B_MODE_RATE_NUM); + offset_datarate += B_MODE_RATE_NUM; + offset_basicrate += B_MODE_RATE_NUM; + RTW_INFO("%s: support CCK\n", __func__); + } + if(IsSupportedTxOFDM(padapter->registrypriv.wireless_mode)) { + unsigned char datarate_g[G_MODE_RATE_NUM] ={_6M_RATE_, _9M_RATE_, _12M_RATE_, _18M_RATE_,_24M_RATE_, _36M_RATE_, _48M_RATE_, _54M_RATE_}; + unsigned char basicrate_g[G_MODE_BASIC_RATE_NUM] = {_6M_RATE_, _12M_RATE_, _24M_RATE_}; + _rtw_memcpy(pmlmeext->datarate + offset_datarate, datarate_g, G_MODE_RATE_NUM); + _rtw_memcpy(pmlmeext->basicrate + offset_basicrate,basicrate_g, G_MODE_BASIC_RATE_NUM); + offset_datarate += G_MODE_RATE_NUM; + offset_basicrate += G_MODE_BASIC_RATE_NUM; + RTW_INFO("%s: support OFDM\n", __func__); + + } + _rtw_memcpy(pmlmeext->datarate + offset_datarate, end_set, 1); + _rtw_memcpy(pmlmeext->basicrate + offset_basicrate, end_set, 1); + +#ifdef CONFIG_80211N_HT + if( padapter->registrypriv.ht_enable && is_supported_ht(padapter->registrypriv.wireless_mode)) + _rtw_memcpy(pmlmeext->default_supported_mcs_set, supported_mcs_set, sizeof(pmlmeext->default_supported_mcs_set)); +#endif } static void init_mlme_ext_priv_value(_adapter *padapter) @@ -1594,10 +1053,9 @@ static void init_mlme_ext_priv_value(_adapter *padapter) pmlmeext->retry = 0; pmlmeext->cur_wireless_mode = padapter->registrypriv.wireless_mode; - init_mlme_default_rate_set(padapter); - if (pmlmeext->cur_channel > 14) + if ((pmlmeext->cur_channel > 14) || ((padapter->registrypriv.wireless_mode & WIRELESS_11B) == 0)) pmlmeext->tx_rate = IEEE80211_OFDM_RATE_6MB; else pmlmeext->tx_rate = IEEE80211_CCK_RATE_1MB; @@ -1646,6 +1104,11 @@ static void init_mlme_ext_priv_value(_adapter *padapter) pmlmeext->action_public_rxseq = 0xffff; pmlmeext->action_public_dialog_token = 0xff; +#ifdef ROKU_PRIVATE +/*infra mode, used to store AP's info*/ + _rtw_memset(pmlmeinfo->SupportedRates_infra_ap, 0, NDIS_802_11_LENGTH_RATES_EX); + pmlmeinfo->ht_vht_received = 0; +#endif /* ROKU_PRIVATE */ } void init_mlme_ext_timer(_adapter *padapter) @@ -1669,7 +1132,6 @@ int init_mlme_ext_priv(_adapter *padapter) int res = _SUCCESS; struct registry_priv *pregistrypriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); /* We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). */ @@ -1702,6 +1164,24 @@ int init_mlme_ext_priv(_adapter *padapter) pmlmeext->fixed_chan = 0xFF; #endif + pmlmeext->tsf_update_pause_factor = pregistrypriv->tsf_update_pause_factor; + pmlmeext->tsf_update_restore_factor = pregistrypriv->tsf_update_restore_factor; + +#ifdef CONFIG_SUPPORT_STATIC_SMPS + pmlmeext->ssmps_en = _FALSE; + pmlmeext->ssmps_tx_tp_th = SSMPS_TX_TP_TH;/*Mbps*/ + pmlmeext->ssmps_rx_tp_th = SSMPS_RX_TP_TH;/*Mbps*/ + #ifdef DBG_STATIC_SMPS + pmlmeext->ssmps_test = _FALSE; + #endif +#endif + +#ifdef CONFIG_CTRL_TXSS_BY_TP + pmlmeext->txss_ctrl_en = _TRUE; + pmlmeext->txss_tp_th = TXSS_TP_TH; + pmlmeext->txss_tp_chk_cnt = TXSS_TP_CHK_CNT; +#endif + return res; } @@ -1719,12 +1199,14 @@ void free_mlme_ext_priv(struct mlme_ext_priv *pmlmeext) } } +#ifdef CONFIG_PATCH_JOIN_WRONG_CHANNEL static u8 cmp_pkt_chnl_diff(_adapter *padapter, u8 *pframe, uint packet_len) { /* if the channel is same, return 0. else return channel differential */ uint len; u8 channel; u8 *p; + p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_, _DSSET_IE_, &len, packet_len - _BEACON_IE_OFFSET_); if (p) { channel = *(p + 2); @@ -1735,6 +1217,7 @@ static u8 cmp_pkt_chnl_diff(_adapter *padapter, u8 *pframe, uint packet_len) } else return 0; } +#endif /* CONFIG_PATCH_JOIN_WRONG_CHANNEL */ static void _mgt_dispatcher(_adapter *padapter, struct mlme_handler *ptable, union recv_frame *precv_frame) { @@ -1745,7 +1228,25 @@ static void _mgt_dispatcher(_adapter *padapter, struct mlme_handler *ptable, uni /* receive the frames that ra(a1) is my address or ra(a1) is bc address. */ if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_mac_addr(padapter), ETH_ALEN) && !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + { + struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); + + if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) != _TRUE) + return; + + if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) == _TRUE) + return; + + if ( pwdev_priv->pno_mac_addr[0] == 0xFF) + return; + + if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_pno_mac_addr(padapter), ETH_ALEN)) + return; + } +#else return; +#endif ptable->func(padapter, precv_frame); } @@ -1756,9 +1257,6 @@ void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame) { int index; struct mlme_handler *ptable; -#ifdef CONFIG_AP_MODE - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -#endif /* CONFIG_AP_MODE */ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; u8 *pframe = precv_frame->u.hdr.rx_data; struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, get_addr2_ptr(pframe)); @@ -1784,7 +1282,25 @@ void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame) /* receive the frames that ra(a1) is my address or ra(a1) is bc address. */ if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_mac_addr(padapter), ETH_ALEN) && !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + { + struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); + + if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) != _TRUE) + return; + + if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) == _TRUE) + return; + + if ( pwdev_priv->pno_mac_addr[0] == 0xFF) + return; + + if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_pno_mac_addr(padapter), ETH_ALEN)) + return; + } +#else return; +#endif ptable = mlme_sta_tbl; @@ -1974,7 +1490,7 @@ unsigned int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame) /* Commented by Kurt 2012/10/16 */ /* IOT issue: Google Nexus7 use 1M rate to send p2p_probe_req after GO nego completed and Nexus7 is client */ if (padapter->registrypriv.wifi_spec == 1) { - if (pattrib->data_rate <= 3) + if (pattrib->data_rate <= DESC_RATE11M) wifi_test_chk_rate = 0; } @@ -2099,13 +1615,16 @@ _continue: psta->cmn.bw_mode = CHANNEL_WIDTH_20; psta->ieee8021x_blocked = _FALSE; #ifdef CONFIG_80211N_HT - psta->htpriv.ht_option = _TRUE; - psta->htpriv.ampdu_enable = _FALSE; - psta->htpriv.sgi_20m = _FALSE; - psta->htpriv.sgi_40m = _FALSE; - psta->htpriv.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; - psta->htpriv.agg_enable_bitmap = 0x0;/* reset */ - psta->htpriv.candidate_tid_bitmap = 0x0;/* reset */ + if(padapter->registrypriv.ht_enable && + is_supported_ht(padapter->registrypriv.wireless_mode)) { + psta->htpriv.ht_option = _TRUE; + psta->htpriv.ampdu_enable = _FALSE; + psta->htpriv.sgi_20m = _FALSE; + psta->htpriv.sgi_40m = _FALSE; + psta->htpriv.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + psta->htpriv.agg_enable_bitmap = 0x0;/* reset */ + psta->htpriv.candidate_tid_bitmap = 0x0;/* reset */ + } #endif rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE); @@ -2182,10 +1701,7 @@ exit: unsigned int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame) { - struct sta_info *psta; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct sta_priv *pstapriv = &padapter->stapriv; u8 *pframe = precv_frame->u.hdr.rx_data; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &padapter->wdinfo; @@ -2272,12 +1788,11 @@ static void rtw_check_legacy_ap(_adapter *padapter, u8 *pframe, u32 len) if (pmlmeext->bstart_bss == _TRUE) { int left; - u16 capability; unsigned char *pos; struct rtw_ieee802_11_elems elems; - struct HT_info_element *pht_info = NULL; +#ifdef CONFIG_80211N_HT u16 cur_op_mode; - +#endif /* checking IEs */ left = len - sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_; pos = pframe + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_; @@ -2285,9 +1800,9 @@ static void rtw_check_legacy_ap(_adapter *padapter, u8 *pframe, u32 len) RTW_INFO("%s: parse fail for "MAC_FMT"\n", __func__, MAC_ARG(GetAddr3Ptr(pframe))); return; } - +#ifdef CONFIG_80211N_HT cur_op_mode = pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_OP_MODE_MASK; - +#endif /* for legacy ap */ if (elems.ht_capabilities == NULL && elems.ht_capabilities_len == 0) { @@ -2312,8 +1827,6 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) uint len = precv_frame->u.hdr.len; WLAN_BSSID_EX *pbss; int ret = _SUCCESS; - u8 *p = NULL; - u32 ielen = 0; #ifdef CONFIG_TDLS struct sta_info *ptdls_sta; struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; @@ -2324,17 +1837,6 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) if (validate_beacon_len(pframe, len) == _FALSE) return _SUCCESS; -#ifdef CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR - p = rtw_get_ie(pframe + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ielen, - precv_frame->u.hdr.len - sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_); - if ((p != NULL) && (ielen > 0)) { - if ((*(p + 1 + ielen) == 0x2D) && (*(p + 2 + ielen) != 0x2D)) { - /* Invalid value 0x2D is detected in Extended Supported Rates (ESR) IE. Try to fix the IE length to avoid failed Beacon parsing. */ - RTW_INFO("[WIFIDBG] Error in ESR IE is detected in Beacon of BSSID:"MAC_FMT". Fix the length of ESR IE to avoid failed Beacon parsing.\n", MAC_ARG(GetAddr3Ptr(pframe))); - *(p + 1) = ielen - 1; - } - } -#endif if (mlmeext_chk_scan_state(pmlmeext, SCAN_PROCESS) || (MLME_IS_MESH(padapter) && check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) @@ -2372,12 +1874,13 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) RTW_INFO("%s: beacon keys ready\n", __func__); _rtw_memcpy(&pmlmepriv->cur_beacon_keys, &recv_beacon, sizeof(recv_beacon)); - pmlmepriv->new_beacon_cnts = 0; } else { RTW_ERR("%s: get beacon keys failed\n", __func__); _rtw_memset(&pmlmepriv->cur_beacon_keys, 0, sizeof(recv_beacon)); - pmlmepriv->new_beacon_cnts = 0; } + #ifdef CONFIG_BCN_CNT_CONFIRM_HDL + pmlmepriv->new_beacon_cnts = 0; + #endif } rtw_mfree((u8 *)pbss, sizeof(WLAN_BSSID_EX)); } @@ -2387,14 +1890,8 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) /* update TSF Value */ update_TSF(pmlmeext, pframe, len); - - /* reset for adaptive_early_32k */ - pmlmeext->adaptive_tsf_done = _FALSE; - pmlmeext->DrvBcnEarly = 0xff; - pmlmeext->DrvBcnTimeOut = 0xff; pmlmeext->bcn_cnt = 0; - _rtw_memset(pmlmeext->bcn_delay_cnt, 0, sizeof(pmlmeext->bcn_delay_cnt)); - _rtw_memset(pmlmeext->bcn_delay_ratio, 0, sizeof(pmlmeext->bcn_delay_ratio)); + pmlmeext->last_bcn_cnt = 0; #ifdef CONFIG_P2P_PS /* Comment by YiWei , in wifi p2p spec the "3.3 P2P Power Management" , "These mechanisms are available in a P2P Group in which only P2P Devices are associated." */ @@ -2449,9 +1946,10 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) } pmlmepriv->cur_network_scanned->network.Rssi = precv_frame->u.hdr.attrib.phy_info.recv_signal_power; - - adaptive_early_32k(pmlmeext, pframe, len); - + pmlmeext->bcn_cnt++; +#ifdef CONFIG_BCN_RECV_TIME + rtw_rx_bcn_time_update(padapter, len, precv_frame->u.hdr.attrib.data_rate); +#endif #ifdef CONFIG_TDLS #ifdef CONFIG_TDLS_CH_SW if (rtw_tdls_is_chsw_allowed(padapter) == _TRUE) { @@ -2478,7 +1976,7 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN)); #endif /* CONFIG_P2P_PS */ - if (pmlmeext->en_hw_update_tsf) + if (pmlmeext->tsf_update_required && pmlmeext->en_hw_update_tsf) rtw_enable_hw_update_tsf_cmd(padapter); #if 0 /* move to validate_recv_mgnt_frame */ @@ -2487,7 +1985,6 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) } } else if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) { - _irqL irqL; u8 rate_set[16]; u8 rate_num = 0; @@ -2500,7 +1997,7 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) if ((sta_rx_pkts(psta) & 0xf) == 0) update_beacon_info(padapter, pframe, len, psta); - if (pmlmeext->en_hw_update_tsf) + if (pmlmeext->tsf_update_required && pmlmeext->en_hw_update_tsf) rtw_enable_hw_update_tsf_cmd(padapter); } else { rtw_ies_get_supported_rate(pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_, len - WLAN_HDR_A3_LEN - _BEACON_IE_OFFSET_, rate_set, &rate_num); @@ -2565,27 +2062,12 @@ unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame) if ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE) return _FAIL; -#if defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_RTW_MESH) - if (MLME_IS_MESH(padapter)) { - if (!MLME_IS_ASOC(padapter)) - return _SUCCESS; - - #if CONFIG_RTW_MACADDR_ACL - if (rtw_access_ctrl(padapter, get_addr2_ptr(pframe)) == _FALSE) - return _SUCCESS; - #endif - - if (!rtw_mesh_plink_get(padapter, get_addr2_ptr(pframe))) { - if (adapter_to_rfctl(padapter)->offch_state == OFFCHS_NONE) - issue_probereq(padapter, &padapter->mlmepriv.cur_network.network.mesh_id, get_addr2_ptr(pframe)); - - /* only peer being added (checked by notify conditions) is allowed */ - return _SUCCESS; - } - - rtw_cfg80211_rx_mframe(padapter, precv_frame, NULL); + if (!MLME_IS_ASOC(padapter)) return _SUCCESS; - } + +#if defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_RTW_MESH) + if (MLME_IS_MESH(padapter)) + return rtw_mesh_on_auth(padapter, precv_frame); #endif RTW_INFO("+OnAuth\n"); @@ -2617,9 +2099,16 @@ unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame) RTW_INFO("auth alg=%x, seq=%X\n", algorithm, seq); - if (auth_mode == 2 && - psecuritypriv->dot11PrivacyAlgrthm != _WEP40_ && - psecuritypriv->dot11PrivacyAlgrthm != _WEP104_) + if (rtw_ap_linking_test_force_auth_fail()) { + status = rtw_ap_linking_test_force_auth_fail(); + RTW_INFO(FUNC_ADPT_FMT" force auth fail with status:%u\n" + , FUNC_ADPT_ARG(padapter), status); + goto auth_fail; + } + + if ((auth_mode == 2) && (algorithm != WLAN_AUTH_SAE) && + (psecuritypriv->dot11PrivacyAlgrthm != _WEP40_) && + (psecuritypriv->dot11PrivacyAlgrthm != _WEP104_)) auth_mode = 0; if ((algorithm > 0 && auth_mode == 0) || /* rx a shared-key auth but shared not enabled */ @@ -2693,6 +2182,17 @@ unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame) if (pstat->auth_seq == 0) pstat->expire_to = pstapriv->auth_to; +#ifdef CONFIG_IOCTL_CFG80211 + if (GET_CFG80211_REPORT_MGMT(adapter_wdev_data(padapter), IEEE80211_STYPE_AUTH) == _TRUE) { + if ((algorithm == WLAN_AUTH_SAE) && + (auth_mode == dot11AuthAlgrthm_8021X)) { + pstat->authalg = algorithm; + + rtw_cfg80211_rx_mframe(padapter, precv_frame, NULL); + return _SUCCESS; + } + } +#endif /* CONFIG_IOCTL_CFG80211 */ if ((pstat->auth_seq + 1) != seq) { RTW_INFO("(1)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", @@ -2791,7 +2291,7 @@ auth_fail: pstat = &stat; _rtw_memset((char *)pstat, '\0', sizeof(stat)); pstat->auth_seq = 2; - _rtw_memcpy(pstat->cmn.mac_addr, sa, 6); + _rtw_memcpy(pstat->cmn.mac_addr, sa, ETH_ALEN); #ifdef CONFIG_NATIVEAP_MLME issue_auth(padapter, pstat, (unsigned short)status); @@ -2814,6 +2314,21 @@ unsigned int OnAuthClient(_adapter *padapter, union recv_frame *precv_frame) RTW_INFO("%s\n", __FUNCTION__); +#ifdef CONFIG_IOCTL_CFG80211 + if (GET_CFG80211_REPORT_MGMT(adapter_wdev_data(padapter), IEEE80211_STYPE_AUTH) == _TRUE) { + if (rtw_sec_chk_auth_type(padapter, NL80211_AUTHTYPE_SAE)) { + if (rtw_cached_pmkid(padapter, get_my_bssid(&pmlmeinfo->network)) != -1) { + RTW_INFO("SAE: PMKSA cache entry found\n"); + goto normal; + } + rtw_cfg80211_rx_mframe(padapter, precv_frame, NULL); + return _SUCCESS; + } + } + +normal: +#endif /* CONFIG_IOCTL_CFG80211 */ + /* check A1 matches or not */ if (!_rtw_memcmp(adapter_mac_addr(padapter), get_da(pframe), ETH_ALEN)) return _SUCCESS; @@ -2896,14 +2411,13 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) { #ifdef CONFIG_AP_MODE _irqL irqL; - u16 capab_info, listen_interval; + u16 listen_interval; struct rtw_ieee802_11_elems elems; struct sta_info *pstat; - unsigned char reassoc, *p, *pos; - int i, ie_len, left; + unsigned char reassoc, *pos; + int left; unsigned short status = _STATS_SUCCESSFUL_; unsigned short frame_type, ie_offset = 0; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur = &(pmlmeinfo->network); @@ -2952,6 +2466,17 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) RTW_INFO("%s\n", __FUNCTION__); + if (pstat->authalg == WLAN_AUTH_SAE) { + /* WPA3-SAE */ + if (((pstat->state) & WIFI_FW_AUTH_NULL)) { + /* TODO: + Queue AssocReq and Proccess + by external auth trigger. */ + RTW_INFO("%s: wait external auth trigger\n", __func__); + return _SUCCESS; + } + } + /* check if this stat has been successfully authenticated/assocated */ if (!((pstat->state) & WIFI_FW_AUTH_SUCCESS)) { if (!((pstat->state) & WIFI_FW_ASSOC_SUCCESS)) { @@ -2973,6 +2498,13 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) } #endif + if (rtw_ap_linking_test_force_asoc_fail()) { + status = rtw_ap_linking_test_force_asoc_fail(); + RTW_INFO(FUNC_ADPT_FMT" force asoc fail with status:%u\n" + , FUNC_ADPT_ARG(padapter), status); + goto OnAssocReqFail; + } + /* now parse all ieee802_11 ie to point to elems */ left = pkt_len - (IEEE80211_3ADDR_LEN + ie_offset); pos = pframe + (IEEE80211_3ADDR_LEN + ie_offset); @@ -3026,6 +2558,12 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) rtw_ap_parse_sta_wmm_ie(padapter, pstat , pframe + WLAN_HDR_A3_LEN + ie_offset, pkt_len - WLAN_HDR_A3_LEN - ie_offset); +#ifdef CONFIG_RTS_FULL_BW + /*check vendor IE*/ + rtw_parse_sta_vendor_ie_8812(padapter, pstat + , pframe + WLAN_HDR_A3_LEN + ie_offset, pkt_len - WLAN_HDR_A3_LEN - ie_offset); +#endif/*CONFIG_RTS_FULL_BW*/ + rtw_ap_parse_sta_ht_ie(padapter, pstat, &elems); rtw_ap_parse_sta_vht_ie(padapter, pstat, &elems); @@ -3236,7 +2774,9 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame) /* WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); */ u8 *pframe = precv_frame->u.hdr.rx_data; uint pkt_len = precv_frame->u.hdr.len; +#ifdef CONFIG_WAPI_SUPPORT PNDIS_802_11_VARIABLE_IEs pWapiIE = NULL; +#endif RTW_INFO("%s\n", __FUNCTION__); @@ -3269,6 +2809,14 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame) /* AID */ res = pmlmeinfo->aid = (int)(le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 4)) & 0x3fff); + + /* check aid value */ + if (res < 1 || res > 2007) { + RTW_INFO("assoc reject, aid: %d\n", res); + pmlmeinfo->state = WIFI_FW_NULL_STATE; + res = -4; + goto report_assoc_result; + } /* following are moved to join event callback function */ /* to handle HT, WMM, rate adaptive, update MAC reg */ @@ -3294,6 +2842,9 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame) case _HT_CAPABILITY_IE_: /* HT caps */ HT_caps_handler(padapter, pIE); +#ifdef ROKU_PRIVATE + HT_caps_handler_infra_ap(padapter, pIE); +#endif /* ROKU_PRIVATE */ break; case _HT_EXTRA_INFO_IE_: /* HT info */ @@ -3303,6 +2854,9 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame) #ifdef CONFIG_80211AC_VHT case EID_VHTCapability: VHT_caps_handler(padapter, pIE); +#ifdef ROKU_PRIVATE + VHT_caps_handler_infra_ap(padapter, pIE); +#endif /* ROKU_PRIVATE */ break; case EID_VHTOperation: @@ -3327,6 +2881,17 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame) RM_IE_handler(padapter, pIE); break; #endif + +#ifdef ROKU_PRIVATE + /* Infra mode, used to store AP's info , Parse the supported rates from AssocRsp */ + case _SUPPORTEDRATES_IE_: + Supported_rate_infra_ap(padapter, pIE); + break; + + case _EXT_SUPPORTEDRATES_IE_: + Extended_Supported_rate_infra_ap(padapter, pIE); + break; +#endif /* ROKU_PRIVATE */ default: break; } @@ -3956,7 +3521,6 @@ u8 rx_ampdu_apply_sta(_adapter *adapter, struct sta_info *sta, u8 accept, u8 siz u16 rtw_rx_ampdu_apply(_adapter *adapter) { u16 adj_cnt = 0; - struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; struct sta_info *sta; u8 accept = rtw_rx_ampdu_is_accept(adapter); u8 size; @@ -4142,6 +3706,25 @@ unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame) return _SUCCESS; } +#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE +u32 rtw_build_vendor_ie(_adapter *padapter , unsigned char **pframe , u8 mgmt_frame_tyte) +{ + int vendor_ie_num = 0; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + u32 len = 0; + + for (vendor_ie_num = 0 ; vendor_ie_num < WLAN_MAX_VENDOR_IE_NUM ; vendor_ie_num++) { + if (pmlmepriv->vendor_ielen[vendor_ie_num] > 0 && pmlmepriv->vendor_ie_mask[vendor_ie_num] & mgmt_frame_tyte) { + _rtw_memcpy(*pframe , pmlmepriv->vendor_ie[vendor_ie_num] , pmlmepriv->vendor_ielen[vendor_ie_num]); + *pframe += pmlmepriv->vendor_ielen[vendor_ie_num]; + len += pmlmepriv->vendor_ielen[vendor_ie_num]; + } + } + + return len; +} +#endif + #ifdef CONFIG_P2P int get_reg_classes_full_count(struct p2p_channels *channel_list) { @@ -4162,8 +3745,7 @@ void issue_p2p_GO_request(_adapter *padapter, u8 *raddr) u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_GO_NEGO_REQ; u8 wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 }; - u8 wpsielen = 0, p2pielen = 0, i; - u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0; + u8 wpsielen = 0, p2pielen = 0; u16 len_channellist_attr = 0; #ifdef CONFIG_WFD u32 wfdielen = 0; @@ -4176,7 +3758,6 @@ void issue_p2p_GO_request(_adapter *padapter, u8 *raddr) unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &(padapter->wdinfo); @@ -4560,11 +4141,10 @@ void issue_p2p_GO_response(_adapter *padapter, u8 *raddr, u8 *frame_body, uint l u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_GO_NEGO_RESP; u8 wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 }; - u8 p2pielen = 0, i; + u8 p2pielen = 0; uint wpsielen = 0; u16 wps_devicepassword_id = 0x0000; uint wps_devicepassword_id_len = 0; - u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh; u16 len_channellist_attr = 0; struct xmit_frame *pmgntframe; @@ -4574,7 +4154,6 @@ void issue_p2p_GO_response(_adapter *padapter, u8 *raddr, u8 *frame_body, uint l unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &(padapter->wdinfo); #ifdef CONFIG_WFD @@ -4978,8 +4557,8 @@ void issue_p2p_GO_confirm(_adapter *padapter, u8 *raddr, u8 result) u8 action = P2P_PUB_ACTION_ACTION; u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_GO_NEGO_CONF; - u8 wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 }; - u8 wpsielen = 0, p2pielen = 0; + u8 p2pie[255] = { 0x00 }; + u8 p2pielen = 0; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; @@ -4988,7 +4567,6 @@ void issue_p2p_GO_confirm(_adapter *padapter, u8 *raddr, u8 result) unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &(padapter->wdinfo); #ifdef CONFIG_WFD u32 wfdielen = 0; @@ -5214,9 +4792,8 @@ void issue_p2p_invitation_request(_adapter *padapter, u8 *raddr) u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_INVIT_REQ; u8 p2pie[255] = { 0x00 }; - u8 p2pielen = 0, i; + u8 p2pielen = 0; u8 dialogToken = 3; - u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0; u16 len_channellist_attr = 0; #ifdef CONFIG_WFD u32 wfdielen = 0; @@ -5229,7 +4806,6 @@ void issue_p2p_invitation_request(_adapter *padapter, u8 *raddr) unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &(padapter->wdinfo); @@ -5514,8 +5090,7 @@ void issue_p2p_invitation_response(_adapter *padapter, u8 *raddr, u8 dialogToken u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_INVIT_RESP; u8 p2pie[255] = { 0x00 }; - u8 p2pielen = 0, i; - u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0; + u8 p2pielen = 0; u16 len_channellist_attr = 0; #ifdef CONFIG_WFD u32 wfdielen = 0; @@ -5528,7 +5103,6 @@ void issue_p2p_invitation_response(_adapter *padapter, u8 *raddr, u8 dialogToken unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &(padapter->wdinfo); @@ -5764,7 +5338,6 @@ void issue_p2p_provision_request(_adapter *padapter, u8 *pssid, u8 ussidlen, u8 unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &(padapter->wdinfo); @@ -5885,7 +5458,6 @@ void issue_probersp_p2p(_adapter *padapter, unsigned char *da) unsigned char *mac; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); /* WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); */ u16 beacon_interval = 100; @@ -5896,9 +5468,6 @@ void issue_probersp_p2p(_adapter *padapter, unsigned char *da) #ifdef CONFIG_WFD u32 wfdielen = 0; #endif -#ifdef CONFIG_INTEL_WIDI - u8 zero_array_check[L2SDTA_SERVICE_VE_LEN] = { 0x00 }; -#endif /* CONFIG_INTEL_WIDI */ /* RTW_INFO("%s\n", __FUNCTION__); */ @@ -6006,39 +5575,6 @@ void issue_probersp_p2p(_adapter *padapter, unsigned char *da) /* Value: */ wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */ -#ifdef CONFIG_INTEL_WIDI - /* Commented by Kurt */ - /* Appended WiDi info. only if we did issued_probereq_widi(), and then we saved ven. ext. in pmlmepriv->sa_ext. */ - if (_rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE - || pmlmepriv->num_p2p_sdt != 0) { - /* Sec dev type */ - *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_SEC_DEV_TYPE_LIST); - wpsielen += 2; - - /* Length: */ - *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0008); - wpsielen += 2; - - /* Value: */ - /* Category ID */ - *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_PDT_CID_DISPLAYS); - wpsielen += 2; - - /* OUI */ - *(u32 *)(wpsie + wpsielen) = cpu_to_be32(INTEL_DEV_TYPE_OUI); - wpsielen += 4; - - *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_PDT_SCID_WIDI_CONSUMER_SINK); - wpsielen += 2; - - if (_rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE) { - /* Vendor Extension */ - _rtw_memcpy(wpsie + wpsielen, pmlmepriv->sa_ext, L2SDTA_SERVICE_VE_LEN); - wpsielen += L2SDTA_SERVICE_VE_LEN; - } - } -#endif /* CONFIG_INTEL_WIDI */ - /* WiFi Simple Config State */ /* Type: */ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_SIMPLE_CONF_STATE); @@ -6194,6 +5730,11 @@ void issue_probersp_p2p(_adapter *padapter, unsigned char *da) pattrib->pktlen += wfdielen; #endif +/* Vendor Specific IE */ +#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE + pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_P2P_PROBERESP_VENDOR_IE_BIT); +#endif + pattrib->last_txcmdsz = pattrib->pktlen; @@ -6212,11 +5753,8 @@ int _issue_probereq_p2p(_adapter *padapter, u8 *da, int wait_ack) struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; unsigned char *mac; - unsigned char bssrate[NumRates]; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - int bssrate_len = 0; u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); u8 wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 }; @@ -6512,6 +6050,11 @@ int _issue_probereq_p2p(_adapter *padapter, u8 *da, int wait_ack) pattrib->pktlen += wfdielen; #endif +/* Vendor Specific IE */ +#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE + pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_P2P_PROBEREQ_VENDOR_IE_BIT); +#endif + pattrib->last_txcmdsz = pattrib->pktlen; @@ -6611,7 +6154,7 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) u8 *frame_body; #ifdef CONFIG_P2P u8 *p2p_ie; - u32 p2p_ielen, wps_ielen; + u32 p2p_ielen; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); u8 result = P2P_STATUS_SUCCESS; u8 empty_addr[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; @@ -6668,13 +6211,6 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) result = process_p2p_group_negotation_req(pwdinfo, frame_body, len); issue_p2p_GO_response(padapter, get_addr2_ptr(pframe), frame_body, len, result); -#ifdef CONFIG_INTEL_WIDI - if (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) { - padapter->mlmepriv.widi_state = INTEL_WIDI_STATE_WFD_CONNECTION; - _cancel_timer_ex(&(padapter->mlmepriv.listen_timer)); - intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_STOP_WK, NULL, 0); - } -#endif /* CONFIG_INTEL_WIDI */ /* Commented by Albert 20110718 */ /* No matter negotiating or negotiation failure, the driver should set up the restore P2P state timer. */ @@ -6749,7 +6285,6 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) u8 status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; struct group_id_info group_id; u8 invitation_flag = 0; - int j = 0; merged_p2p_ielen = rtw_get_p2p_merged_ies_len(frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_); @@ -6826,11 +6361,6 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) } } else { rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_DISMATCH); -#ifdef CONFIG_INTEL_WIDI - _rtw_memcpy(pwdinfo->p2p_peer_device_addr, group_id.go_device_addr , ETH_ALEN); - rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -#endif /* CONFIG_INTEL_WIDI */ - status_code = P2P_STATUS_FAIL_UNKNOWN_P2PGROUP; } } @@ -6876,13 +6406,6 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) issue_p2p_invitation_response(padapter, get_addr2_ptr(pframe), pwdinfo->inviteresp_info.token, status_code); _set_timer(&pwdinfo->restore_p2p_state_timer, 3000); } -#ifdef CONFIG_INTEL_WIDI - if (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) { - padapter->mlmepriv.widi_state = INTEL_WIDI_STATE_WFD_CONNECTION; - _cancel_timer_ex(&(padapter->mlmepriv.listen_timer)); - intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_STOP_WK, NULL, 0); - } -#endif /* CONFIG_INTEL_WIDI */ break; } case P2P_INVIT_RESP: { @@ -6947,13 +6470,6 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ); _set_timer(&pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT); -#ifdef CONFIG_INTEL_WIDI - if (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) { - padapter->mlmepriv.widi_state = INTEL_WIDI_STATE_WFD_CONNECTION; - _cancel_timer_ex(&(padapter->mlmepriv.listen_timer)); - intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_STOP_WK, NULL, 0); - } -#endif /* CONFIG_INTEL_WIDI */ break; case P2P_PROVISION_DISC_RESP: @@ -6984,7 +6500,6 @@ unsigned int on_action_public_vendor(union recv_frame *precv_frame) { unsigned int ret = _FAIL; u8 *pframe = precv_frame->u.hdr.rx_data; - uint frame_len = precv_frame->u.hdr.len; u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); if (_rtw_memcmp(frame_body + 2, P2P_OUI, 4) == _TRUE) { @@ -7005,7 +6520,6 @@ unsigned int on_action_public_default(union recv_frame *precv_frame, u8 action) { unsigned int ret = _FAIL; u8 *pframe = precv_frame->u.hdr.rx_data; - uint frame_len = precv_frame->u.hdr.len; u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); u8 token; _adapter *adapter = precv_frame->u.hdr.adapter; @@ -7142,8 +6656,8 @@ static u8 rtw_wnm_nb_elem_parsing( } /* selection sorting based on preference value - * IN : nb_rpt_entries - candidate num - * IN/OUT : pcandidates - candidate list + * : nb_rpt_entries - candidate num + * / : pcandidates - candidate list * return : TRUE - means pcandidates is updated. */ static u8 rtw_wnm_candidates_sorting( @@ -7630,7 +7144,6 @@ exit: unsigned int OnAction_ht(_adapter *padapter, union recv_frame *precv_frame) { u8 *pframe = precv_frame->u.hdr.rx_data; - uint frame_len = precv_frame->u.hdr.len; u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); u8 category, action; @@ -7729,9 +7242,7 @@ unsigned int OnAction_wmm(_adapter *padapter, union recv_frame *precv_frame) unsigned int OnAction_vht(_adapter *padapter, union recv_frame *precv_frame) { #ifdef CONFIG_80211AC_VHT - struct rx_pkt_attrib *prxattrib = &precv_frame->u.hdr.attrib; u8 *pframe = precv_frame->u.hdr.rx_data; - uint frame_len = precv_frame->u.hdr.len; struct rtw_ieee80211_hdr_3addr *whdr = (struct rtw_ieee80211_hdr_3addr *)pframe; u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); u8 category, action; @@ -7998,6 +7509,11 @@ void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib) u8 wireless_mode; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + +#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP + struct wifidirect_info *pwdinfo = &(padapter->wdinfo); +#endif /* CONFIG_P2P_PS_NOA_USE_MACID_SLEEP */ + /* _rtw_memset((u8 *)(pattrib), 0, sizeof(struct pkt_attrib)); */ pattrib->hdrlen = 24; @@ -8010,6 +7526,33 @@ void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib) update_mcc_mgntframe_attrib(padapter, pattrib); #endif + +#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP +#ifdef CONFIG_CONCURRENT_MODE + if (rtw_mi_buddy_check_fwstate(padapter, WIFI_ASOC_STATE)) +#endif /* CONFIG_CONCURRENT_MODE */ + if (MLME_IS_GC(padapter)) { + if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) { + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); + struct sta_priv *pstapriv = &padapter->stapriv; + struct sta_info *psta; + + psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); + if (psta) { + /* use macid sleep during NoA, mgmt frame use ac queue & ap macid */ + pattrib->mac_id = psta->cmn.mac_id; + pattrib->qsel = QSLT_VO; + } else { + if (pwdinfo->p2p_ps_state != P2P_PS_DISABLE) + RTW_ERR("%s , psta was NULL\n", __func__); + } + } + } +#endif /* CONFIG_P2P_PS_NOA_USE_MACID_SLEEP */ + + pattrib->pktlen = 0; if (IS_CCK_RATE(pmlmeext->tx_rate)) @@ -8176,25 +7719,6 @@ int update_hidden_ssid(u8 *ies, u32 ies_len, u8 hidden_ssid_mode) return len_diff; } -#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -u32 rtw_build_vendor_ie(_adapter *padapter , unsigned char *pframe , u8 mgmt_frame_tyte) -{ - int vendor_ie_num = 0; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - u32 len = 0; - - for (vendor_ie_num = 0 ; vendor_ie_num < WLAN_MAX_VENDOR_IE_NUM ; vendor_ie_num++) { - if (pmlmepriv->vendor_ielen[vendor_ie_num] > 0 && pmlmepriv->vendor_ie_mask[vendor_ie_num] & mgmt_frame_tyte) { - _rtw_memcpy(pframe , pmlmepriv->vendor_ie[vendor_ie_num] , pmlmepriv->vendor_ielen[vendor_ie_num]); - pframe += pmlmepriv->vendor_ielen[vendor_ie_num]; - len += pmlmepriv->vendor_ielen[vendor_ie_num]; - } - } - - return len; -} -#endif - void issue_beacon(_adapter *padapter, int timeout_ms) { struct xmit_frame *pmgntframe; @@ -8243,6 +7767,10 @@ void issue_beacon(_adapter *padapter, int timeout_ms) if (padapter->hw_port == HW_PORT1) pattrib->mbssid = 1; #endif +#ifdef CONFIG_FW_HANDLE_TXBCN + if (padapter->vap_id != CONFIG_LIMITED_AP_NUM) + pattrib->mbssid = padapter->vap_id; +#endif _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); @@ -8426,8 +7954,13 @@ void issue_beacon(_adapter *padapter, int timeout_ms) rtw_rson_append_ie(padapter, pframe, &pattrib->pktlen); #endif #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE - pattrib->pktlen += rtw_build_vendor_ie(padapter , pframe , WIFI_BEACON_VENDOR_IE_BIT); + pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_BEACON_VENDOR_IE_BIT); #endif + +#ifdef CONFIG_RTL8812A + pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen ); +#endif/*CONFIG_RTL8812A*/ + goto _issue_bcn; } @@ -8491,8 +8024,10 @@ _issue_bcn: _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); #endif /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */ - if ((pattrib->pktlen + TXDESC_SIZE) > 512) { - RTW_INFO("beacon frame too large\n"); + if ((pattrib->pktlen + TXDESC_SIZE) > MAX_BEACON_LEN) { + RTW_ERR("beacon frame too large ,len(%d,%d)\n", + (pattrib->pktlen + TXDESC_SIZE), MAX_BEACON_LEN); + rtw_warn_on(1); return; } @@ -8526,9 +8061,6 @@ void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probe unsigned int rate_len; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -#ifdef CONFIG_WFD - u32 wfdielen = 0; -#endif #endif /* CONFIG_P2P */ /* RTW_INFO("%s\n", __FUNCTION__); */ @@ -8650,7 +8182,7 @@ void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probe rtw_rson_append_ie(padapter, pframe, &pattrib->pktlen); #endif #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE - pattrib->pktlen += rtw_build_vendor_ie(padapter , pframe , WIFI_PROBERESP_VENDOR_IE_BIT); + pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_PROBERESP_VENDOR_IE_BIT); #endif } else #endif @@ -8776,6 +8308,9 @@ void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probe } #endif /* CONFIG_AUTO_AP_MODE */ +#ifdef CONFIG_RTL8812A + pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen); +#endif/*CONFIG_RTL8812A*/ pattrib->last_txcmdsz = pattrib->pktlen; @@ -8799,9 +8334,11 @@ int _issue_probereq(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); int bssrate_len = 0; u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); +#endif if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) goto exit; @@ -8820,6 +8357,13 @@ int _issue_probereq(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + if ((pwdev_priv->pno_mac_addr[0] != 0xFF) + && (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) + && (check_fwstate(&padapter->mlmepriv, _FW_LINKED) == _FALSE)) + mac = pwdev_priv->pno_mac_addr; + else +#endif mac = adapter_mac_addr(padapter); fctrl = &(pwlanhdr->frame_ctl); @@ -8837,8 +8381,24 @@ int _issue_probereq(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); - SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); - pmlmeext->mgnt_seq++; +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + if ((pwdev_priv->pno_mac_addr[0] != 0xFF) + && (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) + && (check_fwstate(&padapter->mlmepriv, _FW_LINKED) == _FALSE)) { +#ifdef CONFIG_RTW_DEBUG + RTW_DBG("%s pno_scan_seq_num: %d\n", __func__, + pwdev_priv->pno_scan_seq_num); +#endif + SetSeqNum(pwlanhdr, pwdev_priv->pno_scan_seq_num); + pattrib->seqnum = pwdev_priv->pno_scan_seq_num; + pattrib->qos_en = 1; + pwdev_priv->pno_scan_seq_num++; + } else +#endif + { + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); + pmlmeext->mgnt_seq++; + } set_frame_sub_type(pframe, WIFI_PROBEREQ); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); @@ -8879,9 +8439,14 @@ int _issue_probereq(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 } } #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE - pattrib->pktlen += rtw_build_vendor_ie(padapter , pframe , WIFI_PROBEREQ_VENDOR_IE_BIT); + pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_PROBEREQ_VENDOR_IE_BIT); #endif +#ifdef CONFIG_RTL8812A + pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen ); +#endif/*CONFIG_RTL8812A*/ + + pattrib->last_txcmdsz = pattrib->pktlen; @@ -9003,11 +8568,12 @@ void issue_auth(_adapter *padapter, struct sta_info *psta, unsigned short status /* setting auth algo number */ val16 = (u16)psta->authalg; + if (status != _STATS_SUCCESSFUL_) + val16 = 0; + if (val16) { val16 = cpu_to_le16(val16); use_shared_key = 1; - } else { - val16 = 0; } pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); @@ -9314,8 +8880,14 @@ void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *p #endif /* CONFIG_P2P */ #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE - pattrib->pktlen += rtw_build_vendor_ie(padapter , pframe , WIFI_ASSOCRESP_VENDOR_IE_BIT); + pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_ASSOCRESP_VENDOR_IE_BIT); #endif + +#ifdef CONFIG_RTL8812A + pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen ); +#endif/*CONFIG_RTL8812A*/ + + pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); @@ -9328,14 +8900,13 @@ void _issue_assocreq(_adapter *padapter, u8 is_reassoc) int ret = _FAIL; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; - unsigned char *pframe, *p; + unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; unsigned short val16; - unsigned int i, j, ie_len, index = 0; - unsigned char rf_type, bssrate[NumRates], sta_bssrate[NumRates]; + unsigned int i, j, index = 0; + unsigned char bssrate[NumRates], sta_bssrate[NumRates]; PNDIS_802_11_VARIABLE_IEs pIE; - struct registry_priv *pregpriv = &padapter->registrypriv; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); @@ -9565,7 +9136,18 @@ void _issue_assocreq(_adapter *padapter, u8 is_reassoc) rtw_ft_update_rsnie(padapter, _TRUE, pattrib, &pframe); } else #endif + { +#ifdef CONFIG_IOCTL_CFG80211 + if (rtw_sec_chk_auth_alg(padapter, WLAN_AUTH_OPEN) && + rtw_sec_chk_auth_type(padapter, NL80211_AUTHTYPE_SAE)) { + s32 entry = rtw_cached_pmkid(padapter, pmlmepriv->assoc_bssid); + + rtw_rsn_sync_pmkid(padapter, (u8 *)pIE, (pIE->Length + 2), entry); + } +#endif /* CONFIG_IOCTL_CFG80211 */ + pframe = rtw_set_ie(pframe, EID_WPA2, pIE->Length, pIE->data, &(pattrib->pktlen)); + } break; #ifdef CONFIG_80211N_HT case EID_HTCapability: @@ -9752,19 +9334,24 @@ void _issue_assocreq(_adapter *padapter, u8 is_reassoc) } } -#endif /* CONFIG_P2P */ - #ifdef CONFIG_WFD wfdielen = rtw_append_assoc_req_wfd_ie(padapter, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; #endif +#endif /* CONFIG_P2P */ + #ifdef CONFIG_RTW_REPEATER_SON rtw_rson_append_ie(padapter, pframe, &pattrib->pktlen); #endif #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE - pattrib->pktlen += rtw_build_vendor_ie(padapter , pframe , WIFI_ASSOCREQ_VENDOR_IE_BIT); + pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_ASSOCREQ_VENDOR_IE_BIT); #endif + +#ifdef CONFIG_RTL8812A + pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen ); +#endif/*CONFIG_RTL8812A*/ + #ifdef CONFIG_RTW_80211R rtw_ft_build_assoc_req_ies(padapter, is_reassoc, pattrib, &pframe); #endif @@ -10229,17 +9816,13 @@ exit: void issue_action_spct_ch_switch(_adapter *padapter, u8 *ra, u8 new_ch, u8 ch_offset) { - _irqL irqL; - _list *plist, *phead; - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) return; @@ -10745,7 +10328,7 @@ void issue_action_BSSCoexistPacket(_adapter *padapter) u8 InfoContent[16] = {0}; u8 ICS[8][15]; #ifdef CONFIG_80211N_HT - if ((pmlmepriv->num_FortyMHzIntolerant == 0) || (pmlmepriv->num_sta_no_ht == 0)) + if ((pmlmepriv->num_FortyMHzIntolerant == 0) && (pmlmepriv->num_sta_no_ht == 0)) return; if (_TRUE == pmlmeinfo->bwmode_updated) @@ -10790,18 +10373,15 @@ void issue_action_BSSCoexistPacket(_adapter *padapter) pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); - - /* */ - if (pmlmepriv->num_FortyMHzIntolerant > 0) { + /* TODO calculate 40Mhz intolerant via ch and ch offset */ + /* if (pmlmepriv->num_FortyMHzIntolerant > 0) */ + { u8 iedata = 0; iedata |= BIT(2);/* 20 MHz BSS Width Request */ - pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); - } - /* */ _rtw_memset(ICS, 0, sizeof(ICS)); if (pmlmepriv->num_sta_no_ht > 0) { @@ -11112,14 +10692,15 @@ unsigned int send_delba(_adapter *padapter, u8 initiator, u8 *addr) unsigned int send_beacon(_adapter *padapter) { - u8 bxmitok = _FALSE; - int issue = 0; - int poll = 0; -#if defined(CONFIG_PCI_HCI) && defined(RTL8814AE_SW_BCN) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -#endif +#if defined(CONFIG_PCI_HCI) && !defined(CONFIG_PCI_BCN_POLLING) + #ifdef CONFIG_FW_HANDLE_TXBCN + u8 vap_id = padapter->vap_id; + + /* bypass TX BCN because vap_id is invalid*/ + if (vap_id == CONFIG_LIMITED_AP_NUM) + return _SUCCESS; + #endif -#ifdef CONFIG_PCI_HCI /* bypass TX BCN queue because op ch is switching/waiting */ if (check_fwstate(&padapter->mlmepriv, WIFI_OP_CH_SWITCHING) || IS_CH_WAITING(adapter_to_rfctl(padapter)) @@ -11132,20 +10713,39 @@ unsigned int send_beacon(_adapter *padapter) /* 8192EE Port select for Beacon DL */ rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL); + #ifdef CONFIG_FW_HANDLE_TXBCN + rtw_hal_set_hwreg(padapter, HW_VAR_BCN_HEAD_SEL, &vap_id); + #endif issue_beacon(padapter, 0); -#ifdef RTL8814AE_SW_BCN - if (pHalData->bCorrectBCN != 0) + #ifdef CONFIG_FW_HANDLE_TXBCN + vap_id = 0xFF; + rtw_hal_set_hwreg(padapter, HW_VAR_BCN_HEAD_SEL, &vap_id); + #endif + + #ifdef RTL8814AE_SW_BCN + if (GET_HAL_DATA(padapter)->bCorrectBCN != 0) RTW_INFO("%s, line%d, Warnning, pHalData->bCorrectBCN != 0\n", __func__, __LINE__); - pHalData->bCorrectBCN = 1; -#endif + GET_HAL_DATA(padapter)->bCorrectBCN = 1; + #endif return _SUCCESS; #endif -#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +/* CONFIG_PCI_BCN_POLLING is for pci interface beacon polling mode */ +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)|| defined(CONFIG_PCI_BCN_POLLING) + u8 bxmitok = _FALSE; + int issue = 0; + int poll = 0; systime start = rtw_get_current_time(); + #ifdef CONFIG_FW_HANDLE_TXBCN + u8 vap_id = padapter->vap_id; + + /* bypass TX BCN because vap_id is invalid*/ + if (vap_id == CONFIG_LIMITED_AP_NUM) + return _SUCCESS; + #endif /* bypass TX BCN queue because op ch is switching/waiting */ if (check_fwstate(&padapter->mlmepriv, WIFI_OP_CH_SWITCHING) @@ -11153,27 +10753,44 @@ unsigned int send_beacon(_adapter *padapter) ) return _SUCCESS; -#if defined(CONFIG_USB_HCI) -#if defined(CONFIG_RTL8812A) + #if defined(CONFIG_USB_HCI) + #if defined(CONFIG_RTL8812A) if (IS_FULL_SPEED_USB(padapter)) { issue_beacon(padapter, 300); bxmitok = _TRUE; } else -#endif -#endif + #endif + #endif { rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL); + #ifdef CONFIG_FW_HANDLE_TXBCN + rtw_hal_set_hwreg(padapter, HW_VAR_BCN_HEAD_SEL, &vap_id); + #endif do { + #if defined(CONFIG_PCI_BCN_POLLING) + issue_beacon(padapter, 0); + #else issue_beacon(padapter, 100); + #endif issue++; do { + #if defined(CONFIG_PCI_BCN_POLLING) + rtw_msleep_os(1); + #else rtw_yield_os(); + #endif rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8 *)(&bxmitok)); poll++; } while ((poll % 10) != 0 && _FALSE == bxmitok && !RTW_CANNOT_RUN(padapter)); - + #if defined(CONFIG_PCI_BCN_POLLING) + rtw_hal_unmap_beacon_icf(padapter); + #endif } while (bxmitok == _FALSE && (issue < 100) && !RTW_CANNOT_RUN(padapter)); + #ifdef CONFIG_FW_HANDLE_TXBCN + vap_id = 0xFF; + rtw_hal_set_hwreg(padapter, HW_VAR_BCN_HEAD_SEL, &vap_id); + #endif } if (RTW_CANNOT_RUN(padapter)) return _FAIL; @@ -11193,12 +10810,13 @@ unsigned int send_beacon(_adapter *padapter) else if (0) RTW_INFO("%s success, issue:%d, poll:%d, %u ms\n", __FUNCTION__, issue, poll, rtw_get_passing_time_ms(start)); + #ifdef CONFIG_FW_CORRECT_BCN rtw_hal_fw_correct_bcn(padapter); - + #endif return _SUCCESS; } -#endif +#endif /*defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)*/ } @@ -11209,8 +10827,8 @@ Following are some utitity fuctions for WiFi MLME *****************************************************************************/ BOOLEAN IsLegal5GChannel( - IN PADAPTER Adapter, - IN u8 channel) + PADAPTER Adapter, + u8 channel) { int i = 0; @@ -11238,7 +10856,6 @@ u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSI u8 ie_offset; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct registry_priv *pregistrypriv = &padapter->registrypriv; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); @@ -11323,6 +10940,11 @@ u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSI RTW_INFO("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len); return _FAIL; } + if (rtw_validate_value(_SUPPORTEDRATES_IE_, p+2, len) == _FALSE) { + rtw_absorb_ssid_ifneed(padapter, bssid, pframe); + RTW_DBG_DUMP("Invalidated Support Rate IE --", p, len+2); + return _FAIL; + } _rtw_memcpy(bssid->SupportedRates, (p + 2), len); i = len; } @@ -11333,19 +10955,14 @@ u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSI RTW_INFO("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len); return _FAIL; } + if (rtw_validate_value(_EXT_SUPPORTEDRATES_IE_, p+2, len) == _FALSE) { + rtw_absorb_ssid_ifneed(padapter, bssid, pframe); + RTW_DBG_DUMP("Invalidated EXT Support Rate IE --", p, len+2); + return _FAIL; + } _rtw_memcpy(bssid->SupportedRates + i, (p + 2), len); } - /* todo: */ -#if 0 - if (judge_network_type(bssid->SupportedRates, (len + i)) == WIRELESS_11B) - bssid->NetworkTypeInUse = Ndis802_11DS; - else -#endif - { - bssid->NetworkTypeInUse = Ndis802_11OFDM24; - } - #ifdef CONFIG_P2P if (subtype == WIFI_PROBEREQ) { u8 *p2p_ie; @@ -11470,12 +11087,6 @@ u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSI } -#ifdef CONFIG_INTEL_WIDI - /* process_intel_widi_query_or_tigger(padapter, bssid); */ - if (process_intel_widi_query_or_tigger(padapter, bssid)) - return _FAIL; -#endif /* CONFIG_INTEL_WIDI */ - #if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) & 1 if (strcmp(bssid->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) { RTW_INFO("Receiving %s("MAC_FMT", DSConfig:%u) from ch%u with ss:%3u, sq:%3u, RawRSSI:%3ld\n" @@ -11547,9 +11158,9 @@ void start_create_ibss(_adapter *padapter) pmlmeinfo->state = WIFI_FW_NULL_STATE; } else { rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, padapter->registrypriv.dev_network.MacAddress); + rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED); join_type = 0; rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); - rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED); report_join_res(padapter, 1, WLAN_STATUS_SUCCESS); pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; @@ -11660,7 +11271,6 @@ void start_clnt_join(_adapter *padapter) } } else if (caps & cap_IBSS) { /* adhoc client */ Set_MSR(padapter, WIFI_FW_ADHOC_STATE); - rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED); val8 = 0xcf; rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); @@ -11681,6 +11291,7 @@ void start_clnt_auth(_adapter *padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct wifidirect_info *pwdinfo = &(padapter->wdinfo); _cancel_timer_ex(&pmlmeext->link_timer); @@ -11700,6 +11311,22 @@ void start_clnt_auth(_adapter *padapter) } else #endif RTW_PRINT("start auth\n"); + +#ifdef CONFIG_IOCTL_CFG80211 + if (rtw_sec_chk_auth_type(padapter, NL80211_AUTHTYPE_SAE)) { + if (rtw_cached_pmkid(padapter, get_my_bssid(&pmlmeinfo->network)) != -1) { + RTW_INFO("SAE: PMKSA cache entry found\n"); + padapter->securitypriv.auth_alg = WLAN_AUTH_OPEN; + goto no_external_auth; + } + + RTW_PRINT("SAE: start external auth\n"); + rtw_cfg80211_external_auth_request(padapter, NULL); + return; + } +no_external_auth: +#endif /* CONFIG_IOCTL_CFG80211 */ + issue_auth(padapter, NULL, 0); set_link_timer(pmlmeext, REAUTH_TO); @@ -12086,8 +11713,7 @@ void report_survey_event(_adapter *padapter, union recv_frame *precv_frame) chset[ch_set_idx].ScanType = SCAN_ACTIVE; } #ifdef CONFIG_DFS - if (psurvey_evt->bss.Ssid.SsidLength == 0 - || is_all_null(psurvey_evt->bss.Ssid.Ssid, psurvey_evt->bss.Ssid.SsidLength) == _TRUE) + if (hidden_ssid_ap(&psurvey_evt->bss)) chset[ch_set_idx].hidden_bss_cnt++; #endif } @@ -12208,7 +11834,6 @@ void report_wmm_edca_update(_adapter *padapter) struct wmm_event *pwmm_event; struct C2HEvent_Header *pc2h_evt_hdr; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct cmd_priv *pcmdpriv = &padapter->cmdpriv; pcmd_obj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); @@ -12545,7 +12170,6 @@ static void rtw_mlmeext_disconnect(_adapter *padapter) struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); u8 self_action = MLME_ACTION_UNKNOWN; u8 state_backup = (pmlmeinfo->state & 0x03); u8 ASIX_ID[] = {0x00, 0x0E, 0xC6}; @@ -12558,17 +12182,20 @@ static void rtw_mlmeext_disconnect(_adapter *padapter) self_action = MLME_STA_DISCONNECTED; else if (MLME_IS_ADHOC(padapter) || MLME_IS_ADHOC_MASTER(padapter)) self_action = MLME_ADHOC_STOPPED; - else if (MLME_IS_NULL(padapter)) - self_action = MLME_ACTION_NONE; else { RTW_INFO("state:0x%x\n", MLME_STATE(padapter)); rtw_warn_on(1); } /* set_opmode_cmd(padapter, infra_client_with_mlme); */ - +#ifdef CONFIG_HW_P0_TSF_SYNC + if (self_action == MLME_STA_DISCONNECTED) + correct_TSF(padapter, self_action); +#endif rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, 0); rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, null_addr); + if (self_action == MLME_STA_DISCONNECTED) + rtw_hal_rcr_set_chk_bssid(padapter, self_action); /* set MSR to no link state->infra. mode */ Set_MSR(padapter, _HW_STATE_STATION_); @@ -12592,7 +12219,7 @@ static void rtw_mlmeext_disconnect(_adapter *padapter) { _adapter *port0_iface = dvobj_get_port0_adapter(adapter_to_dvobj(padapter)); if (port0_iface) - rtw_lps_ctrl_wk_cmd(port0_iface, LPS_CTRL_CONNECT, 0); + rtw_lps_ctrl_wk_cmd(port0_iface, LPS_CTRL_CONNECT, RTW_CMDF_DIRECTLY); } #endif } @@ -12601,19 +12228,23 @@ static void rtw_mlmeext_disconnect(_adapter *padapter) /* switch to the 20M Hz mode after disconnect */ pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +#ifdef CONFIG_CTRL_TXSS_BY_TP + pmlmeext->txss_1ss = _FALSE; +#endif #ifdef CONFIG_FCS_MODE if (EN_FCS(padapter)) rtw_hal_set_hwreg(padapter, HW_VAR_STOP_FCS_MODE, NULL); #endif -#ifdef CONFIG_DFS_MASTER - rtw_dfs_master_status_apply(padapter, self_action); -#endif - - { + if (!(MLME_IS_STA(padapter) && MLME_IS_OPCH_SW(padapter))) { + /* DFS and channel status no need to check here for STA under OPCH_SW */ u8 ch, bw, offset; + #ifdef CONFIG_DFS_MASTER + rtw_dfs_rd_en_decision(padapter, self_action, 0); + #endif + if (rtw_mi_get_ch_setting_union_no_self(padapter, &ch, &bw, &offset) != 0) { set_channel_bwmode(padapter, ch, offset, bw); rtw_mi_update_union_chan_inf(padapter, ch, offset, bw); @@ -12646,29 +12277,39 @@ static void rtw_mlmeext_disconnect(_adapter *padapter) pmlmepriv->qospriv.uapsd_ap_supported = 0; } #endif /* CONFIG_WMMPS_STA */ +#ifdef CONFIG_RTS_FULL_BW + rtw_set_rts_bw(padapter); +#endif/*CONFIG_RTS_FULL_BW*/ } void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) { - struct sta_info *psta, *psta_bmc; + struct sta_info *psta; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); struct sta_priv *pstapriv = &padapter->stapriv; u8 join_type; -#ifdef CONFIG_ARP_KEEP_ALIVE struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -#endif + +#ifndef CONFIG_IOCTL_CFG80211 struct security_priv *psecuritypriv = &padapter->securitypriv; +#endif + + if (pmlmepriv->wpa_phase == _TRUE) + pmlmepriv->wpa_phase = _FALSE; if (join_res < 0) { join_type = 1; rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, null_addr); + if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) + rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_DISCONNECTED); goto exit_mlmeext_joinbss_event_callback; } + #ifdef CONFIG_ARP_KEEP_ALIVE pmlmepriv->bGetGateway = 1; pmlmepriv->GetGatewayTryCnt = 0; @@ -12686,6 +12327,10 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) /* update IOT-releated issue */ update_IOT_info(padapter); + #ifdef CONFIG_RTS_FULL_BW + rtw_set_rts_bw(padapter); + #endif/*CONFIG_RTS_FULL_BW*/ + rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, cur_network->SupportedRates); /* BCN interval */ @@ -12696,10 +12341,10 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) /* WMM, Update EDCA param */ WMMOnAssocRsp(padapter); - +#ifdef CONFIG_80211N_HT /* HT */ HTOnAssocRsp(padapter); - +#endif /* CONFIG_80211N_HT */ #ifdef CONFIG_80211AC_VHT /* VHT */ VHTOnAssocRsp(padapter); @@ -12709,10 +12354,6 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) if (psta) { /* only for infra. mode */ psta->wireless_mode = pmlmeext->cur_wireless_mode; -#ifdef CONFIG_FW_MULTI_PORT_SUPPORT - rtw_hal_set_default_port_id_cmd(padapter, psta->cmn.mac_id); -#endif - /* set per sta rate after updating HT cap. */ set_sta_rate(padapter, psta); @@ -12721,6 +12362,8 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) /* wakeup macid after join bss successfully to ensure the subsequent data frames can be sent out normally */ rtw_hal_macid_wakeup(padapter, psta->cmn.mac_id); + + rtw_xmit_queue_clear(psta); } #ifndef CONFIG_IOCTL_CFG80211 @@ -12735,8 +12378,10 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) { + rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_CONNECTED); + /* correcting TSF */ - correct_TSF(padapter, pmlmeext); + correct_TSF(padapter, MLME_STA_CONNECTED); /* set_link_timer(pmlmeext, DISCONNECT_TO); */ } @@ -12745,7 +12390,7 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) #ifndef CONFIG_FW_MULTI_PORT_SUPPORT if (get_hw_port(padapter) == HW_PORT0) #endif - rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_CONNECT, 0); + rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_CONNECT, RTW_CMDF_DIRECTLY); #endif #ifdef CONFIG_BEAMFORMING @@ -12779,7 +12424,7 @@ void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta) /* update_TSF(pmlmeext, pframe, len); */ /* correcting TSF */ - correct_TSF(padapter, pmlmeext); + correct_TSF(padapter, MLME_ADHOC_STARTED); /* start beacon */ if (send_beacon(padapter) == _FAIL) @@ -12807,12 +12452,8 @@ void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta) void mlmeext_sta_del_event_callback(_adapter *padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - if (is_client_associated_to_ap(padapter) || is_IBSS_empty(padapter)) rtw_mlmeext_disconnect(padapter); - } /**************************************************************************** @@ -12874,10 +12515,10 @@ void rtw_delba_check(_adapter *padapter, struct sta_info *psta, u8 from_timer) u8 chk_ap_is_alive(_adapter *padapter, struct sta_info *psta) { u8 ret = _FALSE; +#ifdef DBG_EXPIRATION_CHK struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -#ifdef DBG_EXPIRATION_CHK RTW_INFO(FUNC_ADPT_FMT" rx:"STA_PKTS_FMT", beacon:%llu, probersp_to_self:%llu" /*", probersp_bm:%llu, probersp_uo:%llu, probereq:%llu, BI:%u"*/ ", retry:%u\n" @@ -13039,12 +12680,21 @@ void linked_status_chk_tdls(_adapter *padapter) } #endif /* CONFIG_TDLS */ +inline int rtw_get_rx_chk_limit(_adapter *adapter) +{ + return adapter->stapriv.rx_chk_limit; +} + +inline void rtw_set_rx_chk_limit(_adapter *adapter, int limit) +{ + adapter->stapriv.rx_chk_limit = limit; +} + /* from_timer == 1 means driver is in LPS */ void linked_status_chk(_adapter *padapter, u8 from_timer) { u32 i; struct sta_info *psta; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_priv *pstapriv = &padapter->stapriv; @@ -13070,12 +12720,14 @@ void linked_status_chk(_adapter *padapter, u8 from_timer) #elif defined(CONFIG_LAYER2_ROAMING) if (rtw_chk_roam_flags(padapter, RTW_ROAM_ACTIVE)) { RTW_INFO("signal_strength_data.avg_val = %d\n", precvpriv->signal_strength_data.avg_val); - if (precvpriv->signal_strength_data.avg_val < pmlmepriv->roam_rssi_threshold) { + if ((precvpriv->signal_strength_data.avg_val < pmlmepriv->roam_rssi_threshold) + && (rtw_get_passing_time_ms(pmlmepriv->last_roaming) >= pmlmepriv->roam_scan_int*2000)) { #ifdef CONFIG_RTW_80211K rtw_roam_nb_discover(padapter, _FALSE); #endif pmlmepriv->need_to_roam = _TRUE; rtw_drv_scan_by_self(padapter, RTW_AUTO_SCAN_REASON_ROAM); + pmlmepriv->last_roaming = rtw_get_current_time(); } else pmlmepriv->need_to_roam = _FALSE; } @@ -13090,13 +12742,8 @@ void linked_status_chk(_adapter *padapter, u8 from_timer) return; #endif -#if defined(DBG_ROAMING_TEST) || defined(CONFIG_RTW_REPEATER_SON) - rx_chk_limit = 1; -#elif defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && !defined(CONFIG_LPS_LCLK_WD_TIMER) - rx_chk_limit = 4; -#else - rx_chk_limit = 8; -#endif + rx_chk_limit = rtw_get_rx_chk_limit(padapter); + #ifdef CONFIG_ARP_KEEP_ALIVE if (!from_timer && pmlmepriv->bGetGateway == 1 && pmlmepriv->GetGatewayTryCnt < 3) { RTW_INFO("do rtw_gw_addr_query() : %d\n", pmlmepriv->GetGatewayTryCnt); @@ -13105,7 +12752,7 @@ void linked_status_chk(_adapter *padapter, u8 from_timer) pmlmepriv->bGetGateway = 0; else { _rtw_memset(pmlmepriv->gw_ip, 0, 4); - _rtw_memset(pmlmepriv->gw_mac_addr, 0, 6); + _rtw_memset(pmlmepriv->gw_mac_addr, 0, ETH_ALEN); } } #endif @@ -13152,8 +12799,8 @@ void linked_status_chk(_adapter *padapter, u8 from_timer) if (sta_last_tx_pkts(psta) == sta_tx_pkts(psta)) tx_chk = _FAIL; -#if defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && !defined(CONFIG_LPS_LCLK_WD_TIMER) - if (pmlmeext->active_keep_alive_check && (rx_chk == _FAIL || tx_chk == _FAIL) +#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK + if (!from_timer && pmlmeext->active_keep_alive_check && (rx_chk == _FAIL || tx_chk == _FAIL) ) { u8 backup_ch = 0, backup_bw = 0, backup_offset = 0; u8 union_ch = 0, union_bw = 0, union_offset = 0; @@ -13185,7 +12832,10 @@ void linked_status_chk(_adapter *padapter, u8 from_timer) issue_probereq_ex(padapter, &pmlmeinfo->network.Ssid, psta->cmn.mac_addr, 0, 0, 3, 1); if ((tx_chk != _SUCCESS && pmlmeinfo->link_count++ == link_count_limit) || rx_chk != _SUCCESS) { - tx_chk = issue_nulldata(padapter, psta->cmn.mac_addr, 0, 3, 1); + if (rtw_mi_check_fwstate(padapter, _FW_UNDER_SURVEY)) + tx_chk = issue_nulldata(padapter, psta->cmn.mac_addr, 1, 3, 1); + else + tx_chk = issue_nulldata(padapter, psta->cmn.mac_addr, 0, 3, 1); /* if tx acked and p2p disabled, set rx_chk _SUCCESS to reset retry count */ if (tx_chk == _SUCCESS && !is_p2p_enable) rx_chk = _SUCCESS; @@ -13220,7 +12870,7 @@ bypass_active_keep_alive: #ifdef DBG_EXPIRATION_CHK RTW_INFO("%s issue_nulldata(%d)\n", __FUNCTION__, from_timer ? 1 : 0); #endif - if (from_timer) + if (from_timer || rtw_mi_check_fwstate(padapter, _FW_UNDER_SURVEY)) tx_chk = issue_nulldata(padapter, NULL, 1, 0, 0); else tx_chk = issue_nulldata(padapter, NULL, 0, 1, 1); @@ -13301,9 +12951,6 @@ void survey_timer_hdl(void *ctx) struct sitesurvey_parm *psurveyPara; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -#ifdef CONFIG_P2P - struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -#endif if (mlmeext_scan_state(pmlmeext) > SCAN_DISABLE) { cmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); @@ -13368,6 +13015,12 @@ void link_timer_hdl(void *ctx) pmlmeinfo->state = WIFI_FW_NULL_STATE; report_join_res(padapter, -3, WLAN_STATUS_UNSPECIFIED_FAILURE); } else if (pmlmeinfo->state & WIFI_FW_AUTH_STATE) { + +#ifdef CONFIG_IOCTL_CFG80211 + if (rtw_sec_chk_auth_type(padapter, NL80211_AUTHTYPE_SAE)) + return; +#endif /* CONFIG_IOCTL_CFG80211 */ + /* re-auth timer */ if (++pmlmeinfo->reauth_count > REAUTH_LIMIT) { /* if (pmlmeinfo->auth_algo != dot11AuthAlgrthm_Auto) */ @@ -13553,12 +13206,13 @@ void rtw_ft_update_bcn(_adapter *padapter, union recv_frame *precv_frame) RTW_INFO("%s: beacon keys ready\n", __func__); _rtw_memcpy(&pmlmepriv->cur_beacon_keys, &recv_beacon, sizeof(recv_beacon)); - pmlmepriv->new_beacon_cnts = 0; } else { RTW_ERR("%s: get beacon keys failed\n", __func__); _rtw_memset(&pmlmepriv->cur_beacon_keys, 0, sizeof(recv_beacon)); - pmlmepriv->new_beacon_cnts = 0; } + #ifdef CONFIG_BCN_CNT_CONFIRM_HDL + pmlmepriv->new_beacon_cnts = 0; + #endif } rtw_mfree((u8*)pbss, sizeof(WLAN_BSSID_EX)); } @@ -13570,15 +13224,8 @@ void rtw_ft_update_bcn(_adapter *padapter, union recv_frame *precv_frame) /* update TSF Value */ update_TSF(pmlmeext, pframe, len); - - /* reset for adaptive_early_32k */ - pmlmeext->adaptive_tsf_done = _FALSE; - pmlmeext->DrvBcnEarly = 0xff; - pmlmeext->DrvBcnTimeOut = 0xff; pmlmeext->bcn_cnt = 0; - _rtw_memset(pmlmeext->bcn_delay_cnt, 0, sizeof(pmlmeext->bcn_delay_cnt)); - _rtw_memset(pmlmeext->bcn_delay_ratio, 0, sizeof(pmlmeext->bcn_delay_ratio)); - + pmlmeext->last_bcn_cnt = 0; pmlmepriv->ft_roam.ft_updated_bcn = _TRUE; } } @@ -14001,7 +13648,6 @@ static int rtw_auto_ap_start_beacon(_adapter *adapter) u32 ssid_len = sizeof(ssid); struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) return -EINVAL; @@ -14036,8 +13682,8 @@ static int rtw_auto_ap_start_beacon(_adapter *adapter) ie = rtw_set_ie(ie, _SSID_IE_, ssid_len, ssid, &sz); /* supported rates */ - wireless_mode = WIRELESS_11BG_24N; - rtw_set_supported_rate(supportRate, wireless_mode) ; + wireless_mode = (WIRELESS_11BG_24N & padapter->registrypriv.wireless_mode); + rtw_set_supported_rate(supportRate, wireless_mode); rateLen = rtw_get_rateset_len(supportRate); if (rateLen > 8) ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, 8, supportRate, &sz); @@ -14116,7 +13762,7 @@ u8 setopmode_hdl(_adapter *padapter, u8 *pbuf) #ifdef CONFIG_LPS _adapter *port0_iface = dvobj_get_port0_adapter(adapter_to_dvobj(padapter)); if (port0_iface) - rtw_lps_ctrl_wk_cmd(port0_iface, LPS_CTRL_CONNECT, 0); + rtw_lps_ctrl_wk_cmd(port0_iface, LPS_CTRL_CONNECT, RTW_CMDF_DIRECTLY); #endif } } @@ -14147,7 +13793,9 @@ u8 createbss_hdl(_adapter *padapter, u8 *pbuf) /* u8 initialgain; */ #ifdef CONFIG_AP_MODE - if (pmlmeinfo->state == WIFI_FW_AP_STATE) { + if ((parm->req_ch == 0 && pmlmeinfo->state == WIFI_FW_AP_STATE) + || parm->req_ch != 0 + ) { start_bss_network(padapter, parm); goto exit; } @@ -14201,7 +13849,6 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) { u8 join_type; PNDIS_802_11_VARIABLE_IEs pIE; - struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); @@ -14231,6 +13878,8 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, 0); + if (pmlmeinfo->state & WIFI_FW_STATION_STATE) + rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_DISCONNECTED); } #ifdef CONFIG_ANTENNA_DIVERSITY @@ -14253,7 +13902,10 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) pmlmeinfo->bwmode_updated = _FALSE; /* pmlmeinfo->assoc_AP_vendor = HT_IOT_PEER_MAX; */ pmlmeinfo->VHT_enable = 0; - +#ifdef ROKU_PRIVATE + pmlmeinfo->ht_vht_received = 0; + _rtw_memset(pmlmeinfo->SupportedRates_infra_ap, 0, NDIS_802_11_LENGTH_RATES_EX); +#endif /* ROKU_PRIVATE */ _rtw_memcpy(pnetwork, pbuf, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); pnetwork->IELength = ((WLAN_BSSID_EX *)pbuf)->IELength; @@ -14354,10 +14006,14 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) /*rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE);*/ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); - join_type = 0; - rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); if (MLME_IS_STA(padapter)) rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_CONNECTING); + else + rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED); + + join_type = 0; + rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); + doiqk = _TRUE; rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); @@ -14378,34 +14034,35 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) u8 disconnect_hdl(_adapter *padapter, unsigned char *pbuf) { +#ifdef CONFIG_DFS + struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); +#endif struct disconnect_parm *param = (struct disconnect_parm *)pbuf; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); u8 val8; - if (is_client_associated_to_ap(padapter)) { -#ifdef CONFIG_DFS - if (padapter->mlmepriv.handle_dfs == _FALSE) -#endif /* CONFIG_DFS */ -#ifdef CONFIG_PLATFORM_ROCKCHIPS - /* To avoid connecting to AP fail during resume process, change retry count from 5 to 1 */ - issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, 1, 100); -#else - issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, param->deauth_timeout_ms / 100, 100); -#endif /* CONFIG_PLATFORM_ROCKCHIPS */ + if (is_client_associated_to_ap(padapter) + #ifdef CONFIG_DFS + && !IS_RADAR_DETECTED(rfctl) && !rfctl->csa_ch + #endif + ) { + #ifdef CONFIG_PLATFORM_ROCKCHIPS + /* To avoid connecting to AP fail during resume process, change retry count from 5 to 1 */ + issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, 1, 100); + #else + issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, param->deauth_timeout_ms / 100, 100); + #endif /* CONFIG_PLATFORM_ROCKCHIPS */ } -#ifdef CONFIG_DFS - if (padapter->mlmepriv.handle_dfs == _TRUE) - padapter->mlmepriv.handle_dfs = _FALSE; -#endif /* CONFIG_DFS */ - +#ifndef CONFIG_SUPPORT_MULTI_BCN if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) { /* Stop BCN */ val8 = 0; rtw_hal_set_hwreg(padapter, HW_VAR_BCN_FUNC, (u8 *)(&val8)); } +#endif rtw_mlmeext_disconnect(padapter); @@ -14442,7 +14099,6 @@ const char *scan_state_str(u8 state) static bool scan_abort_hdl(_adapter *adapter) { struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct ss_res *ss = &pmlmeext->sitesurvey_res; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &adapter->wdinfo; @@ -14612,7 +14268,6 @@ u32 rtw_scan_timeout_decision(_adapter *padapter) u8 max_chan_num; u16 scan_ms; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct ss_res *ss = &pmlmeext->sitesurvey_res; if (is_supported_5g(padapter->registrypriv.wireless_mode) @@ -14647,7 +14302,6 @@ static int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel u32 out_num, struct rtw_ieee80211_channel *in, u32 in_num) { int i, j; - int scan_ch_num = 0; int set_idx; u8 chan; struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); @@ -14772,7 +14426,6 @@ static u8 sitesurvey_pick_ch_behavior(_adapter *padapter, u8 *ch, RT_SCAN_TYPE * u8 scan_ch = 0; RT_SCAN_TYPE scan_type = SCAN_PASSIVE; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct ss_res *ss = &pmlmeext->sitesurvey_res; struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); int ch_set_idx; @@ -14818,12 +14471,22 @@ static u8 sitesurvey_pick_ch_behavior(_adapter *padapter, u8 *ch, RT_SCAN_TYPE * if (!(backop_flags && ss->scan_cnt >= ss->scan_cnt_max)) #endif { + #ifdef CONFIG_RTW_WIFI_HAL + if (adapter_to_dvobj(padapter)->nodfs) { + while ( ss->channel_idx < ss->ch_num && rtw_is_dfs_ch(ss->ch[ss->channel_idx].hw_value)) + ss->channel_idx++; + } else + #endif if (ss->channel_idx != 0 && ss->dfs_ch_ssid_scan == 0 && pmlmeext->sitesurvey_res.ssid_num && rtw_is_dfs_ch(ss->ch[ss->channel_idx - 1].hw_value) ) { ch_set_idx = rtw_chset_search_ch(rfctl->channel_set, ss->ch[ss->channel_idx - 1].hw_value); - if (ch_set_idx != -1 && rfctl->channel_set[ch_set_idx].hidden_bss_cnt) { + if (ch_set_idx != -1 && rfctl->channel_set[ch_set_idx].hidden_bss_cnt + && (!IS_DFS_SLAVE_WITH_RD(rfctl) + || rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl)) + || !CH_IS_NON_OCP(&rfctl->channel_set[ch_set_idx])) + ) { ss->channel_idx--; ss->dfs_ch_ssid_scan = 1; } @@ -14918,12 +14581,13 @@ static u8 sitesurvey_pick_ch_behavior(_adapter *padapter, u8 *ch, RT_SCAN_TYPE * void site_survey(_adapter *padapter, u8 survey_channel, RT_SCAN_TYPE ScanType) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct ss_res *ss = &pmlmeext->sitesurvey_res; u8 ssid_scan = 0; #ifdef CONFIG_P2P +#ifndef CONFIG_IOCTL_CFG80211 struct wifidirect_info *pwdinfo = &(padapter->wdinfo); +#endif #endif if (survey_channel != 0) { @@ -15041,7 +14705,9 @@ void survey_done_set_ch_bw(_adapter *padapter) FUNC_ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset); } } +#ifdef CONFIG_MCC_MODE exit: +#endif set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); } @@ -15256,11 +14922,15 @@ void sitesurvey_set_offch_state(_adapter *adapter, u8 scan_state) u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf) { struct sitesurvey_parm *pparm = (struct sitesurvey_parm *)pbuf; +#ifdef DBG_CHECK_FW_PS_STATE struct dvobj_priv *dvobj = padapter->dvobj; struct debug_priv *pdbgpriv = &dvobj->drv_dbg; +#endif struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct ss_res *ss = &pmlmeext->sitesurvey_res; +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); +#endif u8 val8; #ifdef CONFIG_P2P @@ -15295,6 +14965,21 @@ operation_by_state: goto operation_by_state; case SCAN_START: +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + if ((pwdev_priv->pno_mac_addr[0] != 0xFF) + && (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) + && (check_fwstate(&padapter->mlmepriv, _FW_LINKED) == _FALSE)) { + u16 seq_num; + + rtw_hal_pno_random_gen_mac_addr(padapter); + rtw_hal_set_hw_mac_addr(padapter, pwdev_priv->pno_mac_addr); + get_random_bytes(&seq_num, 2); + pwdev_priv->pno_scan_seq_num = seq_num & 0xFFF; + RTW_INFO("%s pno_scan_seq_num %d\n", __func__, + pwdev_priv->pno_scan_seq_num); + } +#endif + /* * prepare to leave operating channel */ @@ -15569,6 +15254,9 @@ operation_by_state: #endif /* CONFIG_P2P */ case SCAN_COMPLETE: +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + rtw_hal_set_hw_mac_addr(padapter, adapter_mac_addr(padapter)); +#endif #ifdef CONFIG_P2P if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH) @@ -15705,6 +15393,11 @@ u8 setkey_hdl(_adapter *padapter, u8 *pbuf) } } +#ifdef CONFIG_LPS_PG + if (adapter_to_pwrctl(padapter)->lps_level == LPS_PG) + LPS_Leave(padapter, "SET_KEY"); +#endif + /* cam entry searched is pairwise key */ if (used == _TRUE && rtw_camid_is_gk(padapter, cam_id) == _FALSE) { s16 camid_clr; @@ -15837,6 +15530,11 @@ u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf) if (cam_id < 0) goto exit; +#ifdef CONFIG_LPS_PG + if (adapter_to_pwrctl(padapter)->lps_level == LPS_PG) + LPS_Leave(padapter, "SET_KEY"); +#endif + /* cam entry searched is group key when setting pariwise key */ if (!pparm->gk && used == _TRUE && rtw_camid_is_gk(padapter, cam_id) == _TRUE) { s16 camid_clr; @@ -15916,10 +15614,10 @@ u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf) u8 add_ba_rsp_hdl(_adapter *padapter, unsigned char *pbuf) { struct addBaRsp_parm *pparm = (struct addBaRsp_parm *)pbuf; - u8 ret = _TRUE, i = 0, try_cnt = 3, wait_ms = 50; struct recv_reorder_ctrl *preorder_ctrl; struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *psta; + u8 ret = _TRUE; psta = rtw_get_stainfo(pstapriv, pparm->addr); if (!psta) @@ -16161,7 +15859,7 @@ u8 chk_bmc_sleepq_hdl(_adapter *padapter, unsigned char *pbuf) u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf) { - + /*RTW_INFO(FUNC_ADPT_FMT, FUNC_ADPT_ARG(padapter));*/ #ifdef CONFIG_SWTIMER_BASED_TXBCN tx_beacon_handlder(padapter->dvobj); @@ -16189,8 +15887,6 @@ u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf) void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 ch) { u8 network_type, rate_len, total_rate_len, remainder_rate_len; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); u8 erpinfo = 0x4; @@ -16203,7 +15899,7 @@ void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 ch) /* if channel in 5G band, then add vht ie . */ if ((pmlmepriv->htpriv.ht_option == _TRUE) && REGSTY_IS_11AC_ENABLE(&padapter->registrypriv) - && hal_chk_proto_cap(padapter, PROTO_CAP_11AC) + && is_supported_vht(padapter->registrypriv.wireless_mode) && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) ) { if (REGSTY_IS_11AC_AUTO(&padapter->registrypriv) @@ -16212,8 +15908,16 @@ void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 ch) } #endif } else { - network_type = WIRELESS_11BG; - total_rate_len = IEEE80211_CCK_RATE_LEN + IEEE80211_NUM_OFDM_RATESLEN; + network_type = 0; + total_rate_len = 0; + if (padapter->registrypriv.wireless_mode & WIRELESS_11B) { + network_type |= WIRELESS_11B; + total_rate_len += IEEE80211_CCK_RATE_LEN; + } + if (padapter->registrypriv.wireless_mode & WIRELESS_11G) { + network_type |= WIRELESS_11G; + total_rate_len += IEEE80211_NUM_OFDM_RATESLEN; + } rtw_add_bcn_ie(padapter, pnetwork, _ERPINFO_IE_, &erpinfo, 1); #ifdef CONFIG_80211AC_VHT rtw_vht_ies_detach(padapter, pnetwork); @@ -16284,22 +15988,34 @@ void rtw_join_done_chk_ch(_adapter *adapter, int join_res) if ((MLME_IS_AP(iface) || MLME_IS_MESH(iface)) && check_fwstate(mlme, WIFI_ASOC_STATE) ) { + u8 ori_ch, ori_bw, ori_offset; bool is_grouped = rtw_is_chbw_grouped(u_ch, u_bw, u_offset , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); if (is_grouped == _FALSE) { /* handle AP which need to switch ch setting */ + ori_ch = mlmeext->cur_channel; + ori_bw = mlmeext->cur_bwmode; + ori_offset = mlmeext->cur_ch_offset; + /* restore original bw, adjust bw by registry setting on target ch */ mlmeext->cur_bwmode = mlme->ori_bw; mlmeext->cur_channel = u_ch; - rtw_adjust_chbw(iface - , mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset); + rtw_adjust_chbw(iface, mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset); + #ifdef CONFIG_RTW_MESH + if (MLME_IS_MESH(iface)) + rtw_mesh_adjust_chbw(mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset); + #endif rtw_chset_sync_chbw(adapter_to_chset(adapter) , &mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset , &u_ch, &u_bw, &u_offset); + RTW_INFO(FUNC_ADPT_FMT" %u,%u,%u => %u,%u,%u\n", FUNC_ADPT_ARG(iface) + , ori_ch, ori_bw, ori_offset + , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); + rtw_ap_update_bss_chbw(iface, &(mlmeext->mlmext_info.network) , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); @@ -16309,9 +16025,15 @@ void rtw_join_done_chk_ch(_adapter *adapter, int join_res) if (MLME_IS_GO(iface) || MLME_IS_MESH(iface)) { /* pure AP is not needed*/ #if defined(CONFIG_IOCTL_CFG80211) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) + u8 ht_option = 0; + + #ifdef CONFIG_80211N_HT + ht_option = mlme->htpriv.ht_option; + #endif + rtw_cfg80211_ch_switch_notify(iface , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset - , mlme->htpriv.ht_option); + , ht_option); #endif } } @@ -16322,7 +16044,7 @@ void rtw_join_done_chk_ch(_adapter *adapter, int join_res) } #ifdef CONFIG_DFS_MASTER - rtw_dfs_master_status_apply(adapter, MLME_STA_CONNECTED); + rtw_dfs_rd_en_decision(adapter, MLME_STA_CONNECTED, 0); #endif } else { for (i = 0; i < dvobj->iface_nums; i++) { @@ -16341,11 +16063,12 @@ void rtw_join_done_chk_ch(_adapter *adapter, int join_res) } } #ifdef CONFIG_DFS_MASTER - rtw_dfs_master_status_apply(adapter, MLME_STA_DISCONNECTED); + rtw_dfs_rd_en_decision(adapter, MLME_STA_DISCONNECTED, 0); #endif } if (rtw_mi_get_ch_setting_union(adapter, &u_ch, &u_bw, &u_offset)) { + RTW_INFO(FUNC_ADPT_FMT" union:%u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); set_channel_bwmode(adapter, u_ch, u_offset, u_bw); rtw_mi_update_union_chan_inf(adapter, u_ch, u_offset, u_bw); } @@ -16358,7 +16081,9 @@ void rtw_join_done_chk_ch(_adapter *adapter, int join_res) int rtw_chk_start_clnt_join(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) { +#ifdef CONFIG_CONCURRENT_MODE bool chbw_allow = _TRUE; +#endif bool connect_allow = _TRUE; struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; u8 cur_ch, cur_bw, cur_ch_offset; @@ -16395,7 +16120,7 @@ int rtw_chk_start_clnt_join(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) dvobj = adapter_to_dvobj(adapter); rtw_mi_status_no_self(adapter, &mstate); - RTW_INFO(FUNC_ADPT_FMT" ld_sta_num:%u, ap_num:%u, mesh_num:%u\n" + RTW_INFO(FUNC_ADPT_FMT" others ld_sta_num:%u, ap_num:%u, mesh_num:%u\n" , FUNC_ADPT_ARG(adapter), MSTATE_STA_LD_NUM(&mstate) , MSTATE_AP_NUM(&mstate), MSTATE_MESH_NUM(&mstate)); @@ -16408,7 +16133,7 @@ int rtw_chk_start_clnt_join(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) dump_adapters_status(RTW_DBGDUMP , dvobj); rtw_warn_on(1); } - RTW_INFO(FUNC_ADPT_FMT" union no self: %u,%u,%u\n" + RTW_INFO(FUNC_ADPT_FMT" others union:%u,%u,%u\n" , FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); /* chbw_allow? */ @@ -16451,7 +16176,7 @@ int rtw_chk_start_clnt_join(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) } #endif /* CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT */ - if (MSTATE_STA_LD_NUM(&mstate) + MSTATE_AP_LD_NUM(&mstate) + MSTATE_MESH_LD_NUM(&mstate) >= 2) + if (MSTATE_STA_LD_NUM(&mstate) + MSTATE_AP_LD_NUM(&mstate) + MSTATE_MESH_LD_NUM(&mstate) >= 4) connect_allow = _FALSE; RTW_INFO(FUNC_ADPT_FMT" connect_allow:%d\n" @@ -16463,10 +16188,6 @@ int rtw_chk_start_clnt_join(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) connect_allow_hdl: /* connect_allow == _TRUE */ -#ifdef CONFIG_DFS_MASTER - rtw_dfs_master_status_apply(adapter, MLME_STA_CONNECTING); -#endif - if (chbw_allow == _FALSE) { u_ch = cur_ch; u_bw = cur_bw; @@ -16502,6 +16223,10 @@ connect_allow_hdl: } } } + + #ifdef CONFIG_DFS_MASTER + rtw_dfs_rd_en_decision(adapter, MLME_STA_CONNECTING, 0); + #endif } #endif /* CONFIG_CONCURRENT_MODE */ @@ -16512,16 +16237,52 @@ exit: *ch = u_ch; *bw = u_bw; *offset = u_offset; + +#if defined(CONFIG_IOCTL_CFG80211) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) + { + u8 ht_option = 0; + +#ifdef CONFIG_80211N_HT + ht_option = adapter->mlmepriv.htpriv.ht_option; +#endif /* CONFIG_80211N_HT */ + + /* + when supplicant send the mlme frame, + the bss freq is updated by channel switch event. + */ + rtw_cfg80211_ch_switch_notify(adapter, + cur_ch, cur_bw, cur_ch_offset, ht_option); + } +#endif } return connect_allow == _TRUE ? _SUCCESS : _FAIL; } +void rtw_set_external_auth_status(_adapter *padapter, + const void *data, int len) +{ +#ifdef CONFIG_IOCTL_CFG80211 + struct net_device *dev = padapter->pnetdev; + struct wiphy *wiphy = adapter_to_wiphy(padapter); + struct rtw_external_auth_params params; + + /* convert data to external_auth_params */ + params.action = RTW_GET_BE32((u8 *)data); + _rtw_memcpy(¶ms.bssid, (u8 *)data + 4, ETH_ALEN); + _rtw_memcpy(¶ms.ssid.ssid, (u8 *)data + 10, WLAN_SSID_MAXLEN); + params.ssid.ssid_len = RTW_GET_BE64((u8 *)data + 42); + params.key_mgmt_suite = RTW_GET_BE32((u8 *)data + 58); + params.status = RTW_GET_BE16((u8 *)data + 62); + _rtw_memcpy(¶ms.pmkid, (u8 *)data + 64, PMKID_LEN); + + rtw_cfg80211_external_auth_status(wiphy, dev, ¶ms); +#endif /* CONFIG_IOCTL_CFG80211 */ +} u8 rtw_set_chbw_hdl(_adapter *padapter, u8 *pbuf) { struct set_ch_parm *set_ch_parm; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if (!pbuf) @@ -16546,7 +16307,6 @@ u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf) { struct SetChannelPlan_param *setChannelPlan_param; struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if (!pbuf) return H2C_PARAMETERS_ERROR; @@ -16561,7 +16321,7 @@ u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf) rfctl->max_chan_nums = init_channel_set(padapter, rfctl->ChannelPlan, rfctl->channel_set); init_channel_list(padapter, rfctl->channel_set, &rfctl->channel_list); -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT rtw_txpwr_init_regd(rfctl); #endif @@ -16590,41 +16350,15 @@ u8 led_blink_hdl(_adapter *padapter, unsigned char *pbuf) return H2C_SUCCESS; } -u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf) +u8 set_csa_hdl(_adapter *adapter, unsigned char *pbuf) { #ifdef CONFIG_DFS - struct SetChannelSwitch_param *setChannelSwitch_param; - u8 new_ch_no; - u8 gval8 = 0x00, sval8 = 0xff; - - if (!pbuf) - return H2C_PARAMETERS_ERROR; - - setChannelSwitch_param = (struct SetChannelSwitch_param *)pbuf; - new_ch_no = setChannelSwitch_param->new_ch_no; - - rtw_hal_get_hwreg(padapter, HW_VAR_TXPAUSE, &gval8); - - rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &sval8); - - RTW_INFO("DFS detected! Swiching channel to %d!\n", new_ch_no); - set_channel_bwmode(padapter, new_ch_no, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); - - rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &gval8); - - rtw_disassoc_cmd(padapter, 0, RTW_CMDF_DIRECTLY); - rtw_indicate_disconnect(padapter, 0, _FALSE); - rtw_free_assoc_resources(padapter, _TRUE); - rtw_free_network_queue(padapter, _TRUE); - - if (rtw_is_dfs_ch(new_ch_no)) - RTW_INFO("Switched to DFS band (ch %u) again!!\n", new_ch_no); + struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); + if (rfctl->csa_ch) + rtw_dfs_ch_switch_hdl(adapter_to_dvobj(adapter)); +#endif return H2C_SUCCESS; -#else - return H2C_REJECTED; -#endif /* CONFIG_DFS */ - } u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf) @@ -16927,3 +16661,65 @@ u8 rtw_getmacreg_hdl(_adapter *padapter, u8 *pbuf) return H2C_SUCCESS; } + +int rtw_sae_preprocess(_adapter *adapter, const u8 *buf, u32 len, u8 tx) +{ +#ifdef CONFIG_IOCTL_CFG80211 + const u8 *frame_body = buf + sizeof(struct rtw_ieee80211_hdr_3addr); + u16 alg; + u16 seq; + u16 status; + int ret = _FAIL; + + alg = RTW_GET_LE16(frame_body); + if (alg != WLAN_AUTH_SAE) + goto exit; + + seq = RTW_GET_LE16(frame_body + 2); + status = RTW_GET_LE16(frame_body + 4); + + RTW_INFO("RTW_%s:AUTH alg:0x%04x, seq:0x%04x, status:0x%04x, mesg:%s\n", + (tx == _TRUE) ? "Tx" : "Rx", alg, seq, status, + (seq == 1) ? "Commit" : "Confirm"); + + ret = _SUCCESS; + +#ifdef CONFIG_RTW_MESH + if (MLME_IS_MESH(adapter)) { + rtw_mesh_sae_check_frames(adapter, buf, len, tx, alg, seq, status); + goto exit; + } +#endif + + if (tx && (seq == 2) && (status == 0)) { + /* quere commit frame until external auth statue update */ + struct sta_priv *pstapriv = &adapter->stapriv; + struct sta_info *psta = NULL; + _irqL irqL; + + psta = rtw_get_stainfo(pstapriv, GetAddr1Ptr(buf)); + if (psta) { + _enter_critical_bh(&psta->lock, &irqL); + if (psta->pauth_frame) { + rtw_mfree(psta->pauth_frame, psta->auth_len); + psta->pauth_frame = NULL; + psta->auth_len = 0; + } + + psta->pauth_frame = rtw_zmalloc(len); + if (psta->pauth_frame) { + _rtw_memcpy(psta->pauth_frame, buf, len); + psta->auth_len = len; + } + _exit_critical_bh(&psta->lock, &irqL); + + ret = 2; + } + } +exit: + return ret; +#else + return _SUCCESS; +#endif /* CONFIG_IOCTL_CFG80211 */ +} + diff --git a/core/rtw_mp.c b/core/rtw_mp.c index 130dd98..34929df 100644 --- a/core/rtw_mp.c +++ b/core/rtw_mp.c @@ -120,7 +120,7 @@ static void _init_mp_priv_(struct mp_priv *pmp_priv) pmp_priv->channel = 1; pmp_priv->bandwidth = CHANNEL_WIDTH_20; - pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_LOWER; + pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; pmp_priv->rateidx = RATE_1M; pmp_priv->txpoweridx = 0x2A; @@ -147,6 +147,8 @@ static void _init_mp_priv_(struct mp_priv *pmp_priv) pmp_priv->bloopback = _FALSE; pmp_priv->bloadefusemap = _FALSE; + pmp_priv->brx_filter_beacon = _FALSE; + pmp_priv->mplink_brx = _FALSE; pnetwork = &pmp_priv->mp_network.network; _rtw_memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN); @@ -163,106 +165,6 @@ static void _init_mp_priv_(struct mp_priv *pmp_priv) } -#ifdef PLATFORM_WINDOWS -#if 0 -void mp_wi_callback( - IN NDIS_WORK_ITEM *pwk_item, - IN PVOID cntx -) -{ - _adapter *padapter = (_adapter *)cntx; - struct mp_priv *pmppriv = &padapter->mppriv; - struct mp_wi_cntx *pmp_wi_cntx = &pmppriv->wi_cntx; - - /* Execute specified action. */ - if (pmp_wi_cntx->curractfunc != NULL) { - LARGE_INTEGER cur_time; - ULONGLONG start_time, end_time; - NdisGetCurrentSystemTime(&cur_time); /* driver version */ - start_time = cur_time.QuadPart / 10; /* The return value is in microsecond */ - - pmp_wi_cntx->curractfunc(padapter); - - NdisGetCurrentSystemTime(&cur_time); /* driver version */ - end_time = cur_time.QuadPart / 10; /* The return value is in microsecond */ - - } - - NdisAcquireSpinLock(&(pmp_wi_cntx->mp_wi_lock)); - pmp_wi_cntx->bmp_wi_progress = _FALSE; - NdisReleaseSpinLock(&(pmp_wi_cntx->mp_wi_lock)); - - if (pmp_wi_cntx->bmpdrv_unload) - NdisSetEvent(&(pmp_wi_cntx->mp_wi_evt)); - -} -#endif - -static int init_mp_priv_by_os(struct mp_priv *pmp_priv) -{ - struct mp_wi_cntx *pmp_wi_cntx; - - if (pmp_priv == NULL) - return _FAIL; - - pmp_priv->rx_testcnt = 0; - pmp_priv->rx_testcnt1 = 0; - pmp_priv->rx_testcnt2 = 0; - - pmp_priv->tx_testcnt = 0; - pmp_priv->tx_testcnt1 = 0; - - pmp_wi_cntx = &pmp_priv->wi_cntx - pmp_wi_cntx->bmpdrv_unload = _FALSE; - pmp_wi_cntx->bmp_wi_progress = _FALSE; - pmp_wi_cntx->curractfunc = NULL; - - return _SUCCESS; -} -#endif - -#ifdef PLATFORM_LINUX -static int init_mp_priv_by_os(struct mp_priv *pmp_priv) -{ - int i, res; - struct mp_xmit_frame *pmp_xmitframe; - - if (pmp_priv == NULL) - return _FAIL; - - _rtw_init_queue(&pmp_priv->free_mp_xmitqueue); - - pmp_priv->pallocated_mp_xmitframe_buf = NULL; - pmp_priv->pallocated_mp_xmitframe_buf = rtw_zmalloc(NR_MP_XMITFRAME * sizeof(struct mp_xmit_frame) + 4); - if (pmp_priv->pallocated_mp_xmitframe_buf == NULL) { - res = _FAIL; - goto _exit_init_mp_priv; - } - - pmp_priv->pmp_xmtframe_buf = pmp_priv->pallocated_mp_xmitframe_buf + 4 - ((SIZE_PTR)(pmp_priv->pallocated_mp_xmitframe_buf) & 3); - - pmp_xmitframe = (struct mp_xmit_frame *)pmp_priv->pmp_xmtframe_buf; - - for (i = 0; i < NR_MP_XMITFRAME; i++) { - _rtw_init_listhead(&pmp_xmitframe->list); - rtw_list_insert_tail(&pmp_xmitframe->list, &pmp_priv->free_mp_xmitqueue.queue); - - pmp_xmitframe->pkt = NULL; - pmp_xmitframe->frame_tag = MP_FRAMETAG; - pmp_xmitframe->padapter = pmp_priv->papdater; - - pmp_xmitframe++; - } - - pmp_priv->free_mp_xmitframe_cnt = NR_MP_XMITFRAME; - - res = _SUCCESS; - -_exit_init_mp_priv: - - return res; -} -#endif static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter) { @@ -298,6 +200,11 @@ static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter) pattrib->pktlen = 1500; + if (pHalData->rf_type == RF_2T2R) + pattrib->raid = RATEID_IDX_BGN_40M_2SS; + else + pattrib->raid = RATEID_IDX_BGN_40M_1SS; + #ifdef CONFIG_80211AC_VHT if (pHalData->rf_type == RF_1T1R) pattrib->raid = RATEID_IDX_VHT_1SS; @@ -310,7 +217,7 @@ static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter) #endif } -void init_mp_priv(PADAPTER padapter) +s32 init_mp_priv(PADAPTER padapter) { struct mp_priv *pmppriv = &padapter->mppriv; PHAL_DATA_TYPE pHalData; @@ -319,12 +226,17 @@ void init_mp_priv(PADAPTER padapter) _init_mp_priv_(pmppriv); pmppriv->papdater = padapter; - pmppriv->mp_dm = 0; + if (IS_HARDWARE_TYPE_8822C(padapter)) + pmppriv->mp_dm = 1;/* default enable dpk tracking */ + else + pmppriv->mp_dm = 0; + pmppriv->tx.stop = 1; pmppriv->bSetTxPower = 0; /*for manually set tx power*/ pmppriv->bTxBufCkFail = _FALSE; pmppriv->pktInterval = 0; pmppriv->pktLength = 1000; + pmppriv->bprocess_mp_mode = _FALSE; mp_init_xmit_attrib(&pmppriv->tx, padapter); @@ -351,6 +263,7 @@ void init_mp_priv(PADAPTER padapter) pHalData->AntennaRxPath = pmppriv->antenna_rx; pHalData->antenna_tx_path = pmppriv->antenna_tx; + return _SUCCESS; } void free_mp_priv(struct mp_priv *pmp_priv) @@ -362,30 +275,30 @@ void free_mp_priv(struct mp_priv *pmp_priv) pmp_priv->pmp_xmtframe_buf = NULL; } - -static VOID PHY_IQCalibrate_default( - IN PADAPTER pAdapter, - IN BOOLEAN bReCovery +#if 0 +static void PHY_IQCalibrate_default( + PADAPTER pAdapter, + BOOLEAN bReCovery ) { RTW_INFO("%s\n", __func__); } -static VOID PHY_LCCalibrate_default( - IN PADAPTER pAdapter +static void PHY_LCCalibrate_default( + PADAPTER pAdapter ) { RTW_INFO("%s\n", __func__); } -static VOID PHY_SetRFPathSwitch_default( - IN PADAPTER pAdapter, - IN BOOLEAN bMain +static void PHY_SetRFPathSwitch_default( + PADAPTER pAdapter, + BOOLEAN bMain ) { RTW_INFO("%s\n", __func__); } - +#endif void mpt_InitHWConfig(PADAPTER Adapter) { @@ -452,14 +365,20 @@ void mpt_InitHWConfig(PADAPTER Adapter) else if (IS_HARDWARE_TYPE_8821C(Adapter)) PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8821C, 0x2000); #endif /* CONFIG_RTL8821C */ -#ifdef CONFIG_RTL8188F - else if (IS_HARDWARE_TYPE_8188F(Adapter)) { +#if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) + else if (IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8188GTV(Adapter)) { if (IS_A_CUT(hal->version_id) || IS_B_CUT(hal->version_id)) { RTW_INFO("%s() Active large power detection\n", __func__); phy_active_large_power_detection_8188f(&(GET_HAL_DATA(Adapter)->odmpriv)); } } #endif +#if defined(CONFIG_RTL8822C) + else if( IS_HARDWARE_TYPE_8822C(Adapter)) { + rtw_write16(Adapter, REG_RXFLTMAP1_8822C, 0x2000); + } +#endif + } static void PHY_IQCalibrate(PADAPTER padapter, u8 bReCovery) @@ -503,6 +422,10 @@ static u8 PHY_QueryRFPathSwitch(PADAPTER padapter) } else if (IS_HARDWARE_TYPE_8188F(padapter)) { #ifdef CONFIG_RTL8188F bmain = PHY_QueryRFPathSwitch_8188F(padapter); +#endif + } else if (IS_HARDWARE_TYPE_8188GTV(padapter)) { +#ifdef CONFIG_RTL8188GTV + bmain = PHY_QueryRFPathSwitch_8188GTV(padapter); #endif } else if (IS_HARDWARE_TYPE_8822B(padapter)) { #ifdef CONFIG_RTL8822B @@ -537,7 +460,7 @@ static void PHY_SetRFPathSwitch(PADAPTER padapter , BOOLEAN bMain) { #ifdef CONFIG_RTL8188E phy_set_rf_path_switch_8188e(phydm, bMain); #endif - } else if (IS_HARDWARE_TYPE_8814A(padapter)) { + } else if (IS_HARDWARE_TYPE_8814A(padapter)) { #ifdef CONFIG_RTL8814A phy_set_rf_path_switch_8814a(phydm, bMain); #endif @@ -553,9 +476,13 @@ static void PHY_SetRFPathSwitch(PADAPTER padapter , BOOLEAN bMain) { #ifdef CONFIG_RTL8703B phy_set_rf_path_switch_8703b(phydm, bMain); #endif - } else if (IS_HARDWARE_TYPE_8188F(padapter)) { -#ifdef CONFIG_RTL8188F + } else if (IS_HARDWARE_TYPE_8188F(padapter) || IS_HARDWARE_TYPE_8188GTV(padapter)) { +#if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) phy_set_rf_path_switch_8188f(phydm, bMain); +#endif + } else if (IS_HARDWARE_TYPE_8192F(padapter)) { +#ifdef CONFIG_RTL8192F + phy_set_rf_path_switch_8192f(padapter, bMain); #endif } else if (IS_HARDWARE_TYPE_8822B(padapter)) { #ifdef CONFIG_RTL8822B @@ -568,23 +495,28 @@ static void PHY_SetRFPathSwitch(PADAPTER padapter , BOOLEAN bMain) { } else if (IS_HARDWARE_TYPE_8821C(padapter)) { #ifdef CONFIG_RTL8821C phy_set_rf_path_switch_8821c(phydm, bMain); +#endif + } else if (IS_HARDWARE_TYPE_8822C(padapter)) { +#ifdef CONFIG_RTL8822C + /* remove for MP EVM Fail, need to review by willis 20180809 + phy_set_rf_path_switch_8822c(phydm, bMain); + */ #endif } } static void phy_switch_rf_path_set(PADAPTER padapter , u8 *prf_set_State) { - +#ifdef CONFIG_RTL8821C HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct dm_struct *p_dm = &pHalData->odmpriv; -#ifdef CONFIG_RTL8821C if (IS_HARDWARE_TYPE_8821C(padapter)) { config_phydm_set_ant_path(p_dm, *prf_set_State, p_dm->current_ant_num_8821c); /* Do IQK when switching to BTG/WLG, requested by RF Binson */ if (*prf_set_State == SWITCH_TO_BTG || *prf_set_State == SWITCH_TO_WLG) PHY_IQCalibrate(padapter, FALSE); - } + } #endif } @@ -610,15 +542,14 @@ u8 rtw_mp_set_antdiv(PADAPTER padapter, BOOLEAN bMain) s32 MPT_InitializeAdapter( - IN PADAPTER pAdapter, - IN u8 Channel + PADAPTER pAdapter, + u8 Channel ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); s32 rtStatus = _SUCCESS; PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.mpt_ctx; u32 ledsetting; - struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv; pMptCtx->bMptDrvUnload = _FALSE; pMptCtx->bMassProdTest = _FALSE; @@ -643,9 +574,9 @@ MPT_InitializeAdapter( phy_set_bb_reg(pAdapter, 0xA00, BIT8, 0x0); PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); /*default use Main*/ - if (pHalData->PackageType == PACKAGE_DEFAULT) + if (pHalData->PackageType == PACKAGE_DEFAULT) phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E); - else + else phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6F10E); } @@ -674,21 +605,21 @@ MPT_InitializeAdapter( PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); /* default use Main */ - pMptCtx->backup0xc50 = (u1Byte)phy_query_bb_reg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0); - pMptCtx->backup0xc58 = (u1Byte)phy_query_bb_reg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0); - pMptCtx->backup0xc30 = (u1Byte)phy_query_bb_reg(pAdapter, rOFDM0_RxDetector1, bMaskByte0); - pMptCtx->backup0x52_RF_A = (u1Byte)phy_query_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); - pMptCtx->backup0x52_RF_B = (u1Byte)phy_query_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); + pMptCtx->backup0xc50 = (u8)phy_query_bb_reg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0); + pMptCtx->backup0xc58 = (u8)phy_query_bb_reg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0); + pMptCtx->backup0xc30 = (u8)phy_query_bb_reg(pAdapter, rOFDM0_RxDetector1, bMaskByte0); + pMptCtx->backup0x52_RF_A = (u8)phy_query_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); + pMptCtx->backup0x52_RF_B = (u8)phy_query_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); #ifdef CONFIG_RTL8188E rtw_write32(pAdapter, REG_MACID_NO_LINK_0, 0x0); rtw_write32(pAdapter, REG_MACID_NO_LINK_1, 0x0); #endif #ifdef CONFIG_RTL8814A if (IS_HARDWARE_TYPE_8814A(pAdapter)) { - pHalData->BackUp_IG_REG_4_Chnl_Section[0] = (u1Byte)phy_query_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0); - pHalData->BackUp_IG_REG_4_Chnl_Section[1] = (u1Byte)phy_query_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0); - pHalData->BackUp_IG_REG_4_Chnl_Section[2] = (u1Byte)phy_query_bb_reg(pAdapter, rC_IGI_Jaguar2, bMaskByte0); - pHalData->BackUp_IG_REG_4_Chnl_Section[3] = (u1Byte)phy_query_bb_reg(pAdapter, rD_IGI_Jaguar2, bMaskByte0); + pHalData->BackUp_IG_REG_4_Chnl_Section[0] = (u8)phy_query_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0); + pHalData->BackUp_IG_REG_4_Chnl_Section[1] = (u8)phy_query_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0); + pHalData->BackUp_IG_REG_4_Chnl_Section[2] = (u8)phy_query_bb_reg(pAdapter, rC_IGI_Jaguar2, bMaskByte0); + pHalData->BackUp_IG_REG_4_Chnl_Section[3] = (u8)phy_query_bb_reg(pAdapter, rD_IGI_Jaguar2, bMaskByte0); } #endif return rtStatus; @@ -711,9 +642,9 @@ MPT_InitializeAdapter( * 05/18/2007 MHC Add normal driver MPHalt code. * *---------------------------------------------------------------------------*/ -VOID +void MPT_DeInitAdapter( - IN PADAPTER pAdapter + PADAPTER pAdapter ) { PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.mpt_ctx; @@ -778,6 +709,14 @@ void rtw_mp_trigger_lck(PADAPTER padapter) PHY_LCCalibrate(padapter); } +void rtw_mp_trigger_dpk(PADAPTER padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_struct *pDM_Odm = &pHalData->odmpriv; + + halrf_dpk_trigger(pDM_Odm); +} + static void init_mp_data(PADAPTER padapter) { u8 v8; @@ -803,7 +742,7 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart) rf_ability = ((u32)halrf_cmn_info_get(pDM_Odm, HALRF_CMNINFO_ABILITY)) | HAL_RF_TX_PWR_TRACK; halrf_cmn_info_set(pDM_Odm, HALRF_CMNINFO_ABILITY, rf_ability); - + halrf_set_pwr_track(pDM_Odm, true); pDM_Odm->rf_calibrate_info.txpowertrack_control = _TRUE; padapter->mppriv.mp_dm = 1; @@ -811,11 +750,15 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart) RTW_INFO("in MPT_PwrCtlDM stop\n"); rf_ability = ((u32)halrf_cmn_info_get(pDM_Odm, HALRF_CMNINFO_ABILITY)) & ~HAL_RF_TX_PWR_TRACK; halrf_cmn_info_set(pDM_Odm, HALRF_CMNINFO_ABILITY, rf_ability); + halrf_set_pwr_track(pDM_Odm, false); pDM_Odm->rf_calibrate_info.txpowertrack_control = _FALSE; - padapter->mppriv.mp_dm = 0; + if (IS_HARDWARE_TYPE_8822C(padapter)) + padapter->mppriv.mp_dm = 1; /* default enable dpk tracking */ + else + padapter->mppriv.mp_dm = 0; { struct txpwrtrack_cfg c; - u1Byte chnl = 0 ; + u8 chnl = 0 ; _rtw_memset(&c, 0, sizeof(struct txpwrtrack_cfg)); configure_txpower_track(pDM_Odm, &c); odm_clear_txpowertracking_state(pDM_Odm); @@ -825,6 +768,9 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart) else if (pDM_Odm->support_ic_type == ODM_RTL8723D) { (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_A, chnl); SetTxPower(padapter); + } else if (pDM_Odm->support_ic_type == ODM_RTL8192F) { + (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, MIX_MODE, RF_PATH_A, chnl); + (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, MIX_MODE, RF_PATH_B, chnl); } else { (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_A, chnl); (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_B, chnl); @@ -841,7 +787,6 @@ u32 mp_join(PADAPTER padapter, u8 mode) WLAN_BSSID_EX bssid; struct sta_info *psta; u32 length; - u8 val8, join_type; _irqL irqL; s32 res = _SUCCESS; @@ -852,9 +797,6 @@ u32 mp_join(PADAPTER padapter, u8 mode) struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); -#ifdef CONFIG_IOCTL_CFG80211 - struct wireless_dev *pwdev = padapter->rtw_wdev; -#endif /* #ifdef CONFIG_IOCTL_CFG80211 */ /* 1. initialize a new WLAN_BSSID_EX */ _rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX)); RTW_INFO("%s ,pmppriv->network_macaddr=%x %x %x %x %x %x\n", __func__, @@ -866,7 +808,6 @@ u32 mp_join(PADAPTER padapter, u8 mode) bssid.Ssid.SsidLength = strlen("mp_pseudo_adhoc"); _rtw_memcpy(bssid.Ssid.Ssid, (u8 *)"mp_pseudo_adhoc", bssid.Ssid.SsidLength); bssid.InfrastructureMode = Ndis802_11IBSS; - bssid.NetworkTypeInUse = Ndis802_11DS; bssid.IELength = 0; bssid.Configuration.DSConfig = pmppriv->channel; @@ -874,7 +815,6 @@ u32 mp_join(PADAPTER padapter, u8 mode) bssid.Ssid.SsidLength = strlen("mp_pseudo_STATION"); _rtw_memcpy(bssid.Ssid.Ssid, (u8 *)"mp_pseudo_STATION", bssid.Ssid.SsidLength); bssid.InfrastructureMode = Ndis802_11Infrastructure; - bssid.NetworkTypeInUse = Ndis802_11DS; bssid.IELength = 0; } @@ -893,7 +833,7 @@ u32 mp_join(PADAPTER padapter, u8 mode) if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { rtw_disassoc_cmd(padapter, 500, 0); rtw_indicate_disconnect(padapter, 0, _FALSE); - rtw_free_assoc_resources_cmd(padapter, _TRUE); + rtw_free_assoc_resources_cmd(padapter, _TRUE, 0); } pmppriv->prev_fw_state = get_fwstate(pmlmepriv); /*pmlmepriv->fw_state = WIFI_MP_STATE;*/ @@ -961,6 +901,9 @@ end_of_mp_start_test: s32 mp_start_test(PADAPTER padapter) { struct mp_priv *pmppriv = &padapter->mppriv; +#ifdef CONFIG_PCI_HCI + PHAL_DATA_TYPE hal; +#endif s32 res = _SUCCESS; padapter->registrypriv.mp_mode = 1; @@ -984,6 +927,9 @@ s32 mp_start_test(PADAPTER padapter) #ifdef CONFIG_RTL8188F rtl8188f_InitHalDm(padapter); #endif +#ifdef CONFIG_RTL8188GTV + rtl8188gtv_InitHalDm(padapter); +#endif #ifdef CONFIG_RTL8188E rtl8188e_InitHalDm(padapter); #endif @@ -991,6 +937,13 @@ s32 mp_start_test(PADAPTER padapter) rtl8723d_InitHalDm(padapter); #endif /* CONFIG_RTL8723D */ +#ifdef CONFIG_PCI_HCI + hal = GET_HAL_DATA(padapter); + hal->pci_backdoor_ctrl = 0; + rtw_pci_aspm_config(padapter); +#endif + + /* 3 0. update mp_priv */ if (!RF_TYPE_VALID(padapter->registrypriv.rf_config)) { @@ -1030,6 +983,10 @@ void mp_stop_test(PADAPTER padapter) struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *tgt_network = &pmlmepriv->cur_network; struct sta_info *psta; +#ifdef CONFIG_PCI_HCI + struct registry_priv *registry_par = &padapter->registrypriv; + PHAL_DATA_TYPE hal; +#endif _irqL irqL; @@ -1061,6 +1018,12 @@ end_of_mp_stop_test: _exit_critical_bh(&pmlmepriv->lock, &irqL); +#ifdef CONFIG_PCI_HCI + hal = GET_HAL_DATA(padapter); + hal->pci_backdoor_ctrl = registry_par->pci_aspm_config; + rtw_pci_aspm_config(padapter); +#endif + #ifdef CONFIG_RTL8812A rtl8812_InitHalDm(padapter); #endif @@ -1076,6 +1039,9 @@ end_of_mp_stop_test: #ifdef CONFIG_RTL8188F rtl8188f_InitHalDm(padapter); #endif +#ifdef CONFIG_RTL8188GTV + rtl8188gtv_InitHalDm(padapter); +#endif #ifdef CONFIG_RTL8723D rtl8723d_InitHalDm(padapter); #endif @@ -1084,7 +1050,7 @@ end_of_mp_stop_test: /*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ #if 0 /* #ifdef CONFIG_USB_HCI */ -static VOID mpt_AdjustRFRegByRateByChan92CU(PADAPTER pAdapter, u8 RateIdx, u8 Channel, u8 BandWidthID) +static void mpt_AdjustRFRegByRateByChan92CU(PADAPTER pAdapter, u8 RateIdx, u8 Channel, u8 BandWidthID) { u8 eRFPath; u32 rfReg0x26; @@ -1129,7 +1095,7 @@ static VOID mpt_AdjustRFRegByRateByChan92CU(PADAPTER pAdapter, u8 RateIdx, u8 Ch * * Overview: Change RF Setting when we siwthc channel/rate/BW for MP. * - * Input: IN PADAPTER pAdapter + * Input: PADAPTER pAdapter * * Output: NONE * @@ -1141,6 +1107,7 @@ static VOID mpt_AdjustRFRegByRateByChan92CU(PADAPTER pAdapter, u8 RateIdx, u8 Ch * 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3. * *---------------------------------------------------------------------------*/ +#if 0 static void mpt_SwitchRfSetting(PADAPTER pAdapter) { hal_mpt_SwitchRfSetting(pAdapter); @@ -1152,6 +1119,7 @@ static void MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) { hal_mpt_CCKTxPowerAdjust(Adapter, bInCH14); } +#endif /*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ @@ -1230,6 +1198,7 @@ s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther) return hal_mpt_SetThermalMeter(pAdapter, target_ther); } +#if 0 static void TriggerRFThermalMeter(PADAPTER pAdapter) { hal_mpt_TriggerRFThermalMeter(pAdapter); @@ -1239,10 +1208,11 @@ static u8 ReadRFThermalMeter(PADAPTER pAdapter) { return hal_mpt_ReadRFThermalMeter(pAdapter); } +#endif -void GetThermalMeter(PADAPTER pAdapter, u8 *value) +void GetThermalMeter(PADAPTER pAdapter, u8 rfpath ,u8 *value) { - hal_mpt_GetThermalMeter(pAdapter, value); + hal_mpt_GetThermalMeter(pAdapter, rfpath, value); } void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) @@ -1312,7 +1282,7 @@ static struct xmit_frame *alloc_mp_xmitframe(struct xmit_priv *pxmitpriv) } -#ifdef CONFIG_PCIE_HCI +#ifdef CONFIG_PCI_HCI static u8 check_nic_enough_desc(_adapter *padapter, struct pkt_attrib *pattrib) { u32 prio; @@ -1372,7 +1342,7 @@ static thread_return mp_xmit_packet_thread(thread_context context) RTW_INFO("%s:pkTx Start\n", __func__); while (1) { pxmitframe = alloc_mp_xmitframe(pxmitpriv); -#ifdef CONFIG_PCIE_HCI +#ifdef CONFIG_PCI_HCI if(check_nic_enough_desc(padapter, &pmptx->attrib) == _FALSE) { rtw_usleep_os(1000); continue; @@ -1486,7 +1456,7 @@ void fill_tx_desc_8814a(PADAPTER padapter) u32 pkt_size = pattrib->last_txcmdsz; s32 bmcast = IS_MCAST(pattrib->ra); - u8 data_rate, pwr_status, offset; + u8 offset; /* SET_TX_DESC_FIRST_SEG_8814A(pDesc, 1); */ SET_TX_DESC_LAST_SEG_8814A(pDesc, 1); @@ -1740,6 +1710,37 @@ void fill_tx_desc_8188f(PADAPTER padapter) } #endif +#if defined(CONFIG_RTL8188GTV) +void fill_tx_desc_8188gtv(PADAPTER padapter) +{ + struct mp_priv *pmp_priv = &padapter->mppriv; + struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); + u8 *ptxdesc = pmp_priv->tx.desc; + + SET_TX_DESC_AGG_BREAK_8188GTV(ptxdesc, 1); + SET_TX_DESC_MACID_8188GTV(ptxdesc, pattrib->mac_id); + SET_TX_DESC_QUEUE_SEL_8188GTV(ptxdesc, pattrib->qsel); + + SET_TX_DESC_RATE_ID_8188GTV(ptxdesc, pattrib->raid); + SET_TX_DESC_SEQ_8188GTV(ptxdesc, pattrib->seqnum); + SET_TX_DESC_HWSEQ_EN_8188GTV(ptxdesc, 1); + SET_TX_DESC_USE_RATE_8188GTV(ptxdesc, 1); + SET_TX_DESC_DISABLE_FB_8188GTV(ptxdesc, 1); + + if (pmp_priv->preamble) + if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) + SET_TX_DESC_DATA_SHORT_8188GTV(ptxdesc, 1); + + if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) + SET_TX_DESC_DATA_BW_8188GTV(ptxdesc, 1); + + SET_TX_DESC_TX_RATE_8188GTV(ptxdesc, pmp_priv->rateidx); + + SET_TX_DESC_DATA_RATE_FB_LIMIT_8188GTV(ptxdesc, 0x1F); + SET_TX_DESC_RTS_RATE_FB_LIMIT_8188GTV(ptxdesc, 0xF); +} +#endif + #if defined(CONFIG_RTL8723D) void fill_tx_desc_8723d(PADAPTER padapter) { @@ -1772,6 +1773,70 @@ void fill_tx_desc_8723d(PADAPTER padapter) } #endif +#if defined(CONFIG_RTL8710B) +void fill_tx_desc_8710b(PADAPTER padapter) +{ + struct mp_priv *pmp_priv = &padapter->mppriv; + struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); + u8 *ptxdesc = pmp_priv->tx.desc; + + SET_TX_DESC_BK_8710B(ptxdesc, 1); + SET_TX_DESC_MACID_8710B(ptxdesc, pattrib->mac_id); + SET_TX_DESC_QUEUE_SEL_8710B(ptxdesc, pattrib->qsel); + + SET_TX_DESC_RATE_ID_8710B(ptxdesc, pattrib->raid); + SET_TX_DESC_SEQ_8710B(ptxdesc, pattrib->seqnum); + SET_TX_DESC_HWSEQ_EN_8710B(ptxdesc, 1); + SET_TX_DESC_USE_RATE_8710B(ptxdesc, 1); + SET_TX_DESC_DISABLE_FB_8710B(ptxdesc, 1); + + if (pmp_priv->preamble) { + if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) + SET_TX_DESC_DATA_SHORT_8710B(ptxdesc, 1); + } + + if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) + SET_TX_DESC_DATA_BW_8710B(ptxdesc, 1); + + SET_TX_DESC_TX_RATE_8710B(ptxdesc, pmp_priv->rateidx); + + SET_TX_DESC_DATA_RATE_FB_LIMIT_8710B(ptxdesc, 0x1F); + SET_TX_DESC_RTS_RATE_FB_LIMIT_8710B(ptxdesc, 0xF); +} +#endif + +#if defined(CONFIG_RTL8192F) +void fill_tx_desc_8192f(PADAPTER padapter) +{ + struct mp_priv *pmp_priv = &padapter->mppriv; + struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); + u8 *ptxdesc = pmp_priv->tx.desc; + + SET_TX_DESC_BK_8192F(ptxdesc, 1); + SET_TX_DESC_MACID_8192F(ptxdesc, pattrib->mac_id); + SET_TX_DESC_QUEUE_SEL_8192F(ptxdesc, pattrib->qsel); + + SET_TX_DESC_RATE_ID_8192F(ptxdesc, pattrib->raid); + SET_TX_DESC_SEQ_8192F(ptxdesc, pattrib->seqnum); + SET_TX_DESC_HWSEQ_EN_8192F(ptxdesc, 1); + SET_TX_DESC_USE_RATE_8192F(ptxdesc, 1); + SET_TX_DESC_DISABLE_FB_8192F(ptxdesc, 1); + + if (pmp_priv->preamble) { + if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) + SET_TX_DESC_DATA_SHORT_8192F(ptxdesc, 1); + } + + if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) + SET_TX_DESC_DATA_BW_8192F(ptxdesc, 1); + + SET_TX_DESC_TX_RATE_8192F(ptxdesc, pmp_priv->rateidx); + + SET_TX_DESC_DATA_RATE_FB_LIMIT_8192F(ptxdesc, 0x1F); + SET_TX_DESC_RTS_RATE_FB_LIMIT_8192F(ptxdesc, 0xF); +} + +#endif static void Rtw_MPSetMacTxEDCA(PADAPTER padapter) { @@ -1789,8 +1854,8 @@ static void Rtw_MPSetMacTxEDCA(PADAPTER padapter) void SetPacketTx(PADAPTER padapter) { - u8 *ptr, *pkt_start, *pkt_end, *fctrl; - u32 pkt_size, offset, startPlace, i; + u8 *ptr, *pkt_start, *pkt_end; + u32 pkt_size, i; struct rtw_ieee80211_hdr *hdr; u8 payload; s32 bmcast; @@ -1811,7 +1876,7 @@ void SetPacketTx(PADAPTER padapter) _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); bmcast = IS_MCAST(pattrib->ra); - if (bmcast) + if (bmcast) pattrib->psta = rtw_get_bcmc_stainfo(padapter); else pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); @@ -1856,6 +1921,11 @@ void SetPacketTx(PADAPTER padapter) rtl8822b_prepare_mp_txdesc(padapter, pmp_priv); #endif /* CONFIG_RTL8822B */ +#if defined(CONFIG_RTL8822C) + if (IS_HARDWARE_TYPE_8822C(padapter)) + rtl8822c_prepare_mp_txdesc(padapter, pmp_priv); +#endif /* CONFIG_RTL8822C */ + #if defined(CONFIG_RTL8821C) if (IS_HARDWARE_TYPE_8821C(padapter)) rtl8821c_prepare_mp_txdesc(padapter, pmp_priv); @@ -1884,10 +1954,24 @@ void SetPacketTx(PADAPTER padapter) fill_tx_desc_8188f(padapter); #endif +#if defined(CONFIG_RTL8188GTV) + if (IS_HARDWARE_TYPE_8188GTV(padapter)) + fill_tx_desc_8188gtv(padapter); +#endif + #if defined(CONFIG_RTL8723D) if (IS_HARDWARE_TYPE_8723D(padapter)) fill_tx_desc_8723d(padapter); #endif +#if defined(CONFIG_RTL8192F) + if (IS_HARDWARE_TYPE_8192F(padapter)) + fill_tx_desc_8192f(padapter); +#endif + +#if defined(CONFIG_RTL8710B) + if (IS_HARDWARE_TYPE_8710B(padapter)) + fill_tx_desc_8710b(padapter); +#endif /* 3 4. make wlan header, make_wlanhdr() */ hdr = (struct rtw_ieee80211_hdr *)pkt_start; @@ -1928,7 +2012,10 @@ void SetPacketTx(PADAPTER padapter) pmp_priv->TXradomBuffer[i] = rtw_random32() % 0xFF; /* startPlace = (u32)(rtw_random32() % 3450); */ - _rtw_memcpy(ptr, pmp_priv->TXradomBuffer, pkt_end - ptr); + if (pmp_priv->mplink_btx == _TRUE) + _rtw_memcpy(ptr, pmp_priv->mplink_buf, pkt_end - ptr); + else + _rtw_memcpy(ptr, pmp_priv->TXradomBuffer, pkt_end - ptr); /* _rtw_memset(ptr, payload, pkt_end - ptr); */ rtw_mfree(pmp_priv->TXradomBuffer, 4096); @@ -1979,10 +2066,11 @@ void SetPacketRx(PADAPTER pAdapter, u8 bStartRx, u8 bAB) pHalData->ReceiveConfig |= RCR_CBSSID_DATA | RCR_CBSSID_BCN |RCR_APM | RCR_AM | RCR_AB |RCR_AMF; pHalData->ReceiveConfig |= RCR_APP_PHYST_RXFF; -#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) +#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) write_bbreg(pAdapter, 0x550, BIT3, bEnable); #endif rtw_write16(pAdapter, REG_RXFLTMAP0, 0xFFEF); /* REG_RXFLTMAP0 (RX Filter Map Group 0) */ + pmppriv->brx_filter_beacon = _TRUE; } else { pHalData->ReceiveConfig |= RCR_ADF; @@ -2052,6 +2140,167 @@ u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter) return OFDM_cnt + CCK_cnt + HT_cnt; } +struct psd_init_regs { + /* 3 wire */ + int reg_88c; + int reg_c00; + int reg_e00; + int reg_1800; + int reg_1a00; + /* cck */ + int reg_800; + int reg_808; +}; + +static int rtw_mp_psd_init(PADAPTER padapter, struct psd_init_regs *regs) +{ + HAL_DATA_TYPE *phal_data = GET_HAL_DATA(padapter); + + switch (phal_data->rf_type) { + /* 1R */ + case RF_1T1R: + if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) { + /* 11AC 1R PSD Setting 3wire & cck off */ + regs->reg_c00 = rtw_read32(padapter, 0xC00); + phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00); + regs->reg_808 = rtw_read32(padapter, 0x808); + phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0); + } else { + /* 11N 3-wire off 1 */ + regs->reg_88c = rtw_read32(padapter, 0x88C); + phy_set_bb_reg(padapter, 0x88C, 0x300000, 0x3); + /* 11N CCK off */ + regs->reg_800 = rtw_read32(padapter, 0x800); + phy_set_bb_reg(padapter, 0x800, 0x1000000, 0x0); + } + break; + + /* 2R */ + case RF_1T2R: + case RF_2T2R: + if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) { + /* 11AC 2R PSD Setting 3wire & cck off */ + regs->reg_c00 = rtw_read32(padapter, 0xC00); + regs->reg_e00 = rtw_read32(padapter, 0xE00); + phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00); + phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00); + regs->reg_808 = rtw_read32(padapter, 0x808); + phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0); + } else { + /* 11N 3-wire off 2 */ + regs->reg_88c = rtw_read32(padapter, 0x88C); + phy_set_bb_reg(padapter, 0x88C, 0xF00000, 0xF); + /* 11N CCK off */ + regs->reg_800 = rtw_read32(padapter, 0x800); + phy_set_bb_reg(padapter, 0x800, 0x1000000, 0x0); + } + break; + + /* 3R */ + case RF_2T3R: + case RF_3T3R: + if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) { + /* 11AC 3R PSD Setting 3wire & cck off */ + regs->reg_c00 = rtw_read32(padapter, 0xC00); + regs->reg_e00 = rtw_read32(padapter, 0xE00); + regs->reg_1800 = rtw_read32(padapter, 0x1800); + phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00); + phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00); + phy_set_bb_reg(padapter, 0x1800, 0x3, 0x00); + regs->reg_808 = rtw_read32(padapter, 0x808); + phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0); + } else { + RTW_ERR("%s: 11n don't support 3R\n", __func__); + return -1; + } + break; + + /* 4R */ + case RF_2T4R: + case RF_3T4R: + case RF_4T4R: + if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) { + /* 11AC 4R PSD Setting 3wire & cck off */ + regs->reg_c00 = rtw_read32(padapter, 0xC00); + regs->reg_e00 = rtw_read32(padapter, 0xE00); + regs->reg_1800 = rtw_read32(padapter, 0x1800); + regs->reg_1a00 = rtw_read32(padapter, 0x1A00); + phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00); + phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00); + phy_set_bb_reg(padapter, 0x1800, 0x3, 0x00); + phy_set_bb_reg(padapter, 0x1A00, 0x3, 0x00); + regs->reg_808 = rtw_read32(padapter, 0x808); + phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0); + } else { + RTW_ERR("%s: 11n don't support 4R\n", __func__); + return -1; + } + break; + + default: + RTW_ERR("%s: unknown %d rf type\n", __func__, phal_data->rf_type); + return -1; + } + + /* Set PSD points, 0=128, 1=256, 2=512, 3=1024 */ + if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) + phy_set_bb_reg(padapter, 0x910, 0xC000, 3); + else + phy_set_bb_reg(padapter, 0x808, 0xC000, 3); + + RTW_INFO("%s: set %d rf type done\n", __func__, phal_data->rf_type); + return 0; +} + +static int rtw_mp_psd_close(PADAPTER padapter, struct psd_init_regs *regs) +{ + HAL_DATA_TYPE *phal_data = GET_HAL_DATA(padapter); + + + if (!hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) { + /* 11n 3wire restore */ + rtw_write32(padapter, 0x88C, regs->reg_88c); + /* 11n cck restore */ + rtw_write32(padapter, 0x800, regs->reg_800); + RTW_INFO("%s: restore %d rf type\n", __func__, phal_data->rf_type); + return 0; + } + + /* 11ac 3wire restore */ + switch (phal_data->rf_type) { + case RF_1T1R: + rtw_write32(padapter, 0xC00, regs->reg_c00); + break; + case RF_1T2R: + case RF_2T2R: + rtw_write32(padapter, 0xC00, regs->reg_c00); + rtw_write32(padapter, 0xE00, regs->reg_e00); + break; + case RF_2T3R: + case RF_3T3R: + rtw_write32(padapter, 0xC00, regs->reg_c00); + rtw_write32(padapter, 0xE00, regs->reg_e00); + rtw_write32(padapter, 0x1800, regs->reg_1800); + break; + case RF_2T4R: + case RF_3T4R: + case RF_4T4R: + rtw_write32(padapter, 0xC00, regs->reg_c00); + rtw_write32(padapter, 0xE00, regs->reg_e00); + rtw_write32(padapter, 0x1800, regs->reg_1800); + rtw_write32(padapter, 0x1A00, regs->reg_1a00); + break; + default: + RTW_WARN("%s: unknown %d rf type\n", __func__, phal_data->rf_type); + break; + } + + /* 11ac cck restore */ + rtw_write32(padapter, 0x808, regs->reg_808); + RTW_INFO("%s: restore %d rf type done\n", __func__, phal_data->rf_type); + return 0; +} + /* reg 0x808[9:0]: FFT data x * reg 0x808[22]: 0 --> 1 to get 1 FFT data y * reg 0x8B4[15:0]: FFT data y report */ @@ -2059,7 +2308,7 @@ static u32 rtw_GetPSDData(PADAPTER pAdapter, u32 point) { u32 psd_val = 0; -#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) +#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) u16 psd_reg = 0x910; u16 psd_regL = 0xF44; #else @@ -2099,8 +2348,13 @@ static u32 rtw_GetPSDData(PADAPTER pAdapter, u32 point) */ u32 mp_query_psd(PADAPTER pAdapter, u8 *data) { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_struct *p_dm = adapter_to_phydm(pAdapter); + u32 i, psd_pts = 0, psd_start = 0, psd_stop = 0; u32 psd_data = 0; + struct psd_init_regs regs = {}; + int psd_analysis = 0; #ifdef PLATFORM_LINUX @@ -2117,27 +2371,69 @@ u32 mp_query_psd(PADAPTER pAdapter, u8 *data) psd_pts = 128; psd_start = 64; psd_stop = 128; + } else if (strncmp(data, "analysis,", 9) == 0) { + if (rtw_mp_psd_init(pAdapter, ®s) != 0) + return 0; + psd_analysis = 1; + sscanf(data + 9, "pts=%d,start=%d,stop=%d", &psd_pts, &psd_start, &psd_stop); } else sscanf(data, "pts=%d,start=%d,stop=%d", &psd_pts, &psd_start, &psd_stop); data[0] = '\0'; + if (IS_HARDWARE_TYPE_8822C(pAdapter)) { + u32 *psdbuf = rtw_zmalloc(sizeof(u32)*256); + + if (psdbuf == NULL) { + RTW_INFO("%s: psd buf malloc fail!!\n", __func__); + return 0; + } + + halrf_cmn_info_set(p_dm, HALRF_CMNINFO_MP_PSD_POINT, psd_pts); + halrf_cmn_info_set(p_dm, HALRF_CMNINFO_MP_PSD_START_POINT, psd_start); + halrf_cmn_info_set(p_dm, HALRF_CMNINFO_MP_PSD_STOP_POINT, psd_stop); + halrf_cmn_info_set(p_dm, HALRF_CMNINFO_MP_PSD_AVERAGE, 0x20000); + + halrf_psd_init(p_dm); +#ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(100); +#else + rtw_mdelay_os(100); +#endif + halrf_psd_query(p_dm, psdbuf, 256); + + i = 0; + while (i < 256) { + sprintf(data, "%s%x ", data, (psdbuf[i])); + i++; + } + + if (psdbuf) + rtw_mfree(psdbuf, sizeof(u32)*256); + + } else { i = psd_start; while (i < psd_stop) { if (i >= psd_pts) psd_data = rtw_GetPSDData(pAdapter, i - psd_pts); else psd_data = rtw_GetPSDData(pAdapter, i); + sprintf(data, "%s%x ", data, psd_data); i++; } + } + #ifdef CONFIG_LONG_DELAY_ISSUE rtw_msleep_os(100); #else rtw_mdelay_os(100); #endif + if (psd_analysis) + rtw_mp_psd_close(pAdapter, ®s); + return strlen(data) + 1; } @@ -2229,7 +2525,7 @@ exit: u8 mpt_to_mgnt_rate( - IN ULONG MptRateIdx + u32 MptRateIdx ) { /* Mapped to MGN_XXX defined in MgntGen.h */ @@ -2717,14 +3013,14 @@ u8 rtw_mp_mode_check(PADAPTER pAdapter) { PADAPTER primary_adapter = GET_PRIMARY_ADAPTER(pAdapter); - if (primary_adapter->registrypriv.mp_mode == 1) + if (primary_adapter->registrypriv.mp_mode == 1 || primary_adapter->mppriv.bprocess_mp_mode == _TRUE) return _TRUE; else return _FALSE; } -ULONG mpt_ProQueryCalTxPower( +u32 mpt_ProQueryCalTxPower( PADAPTER pAdapter, u8 RfPath ) @@ -2733,22 +3029,26 @@ ULONG mpt_ProQueryCalTxPower( HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - ULONG TxPower = 1; - u1Byte rate = 0; + u32 TxPower = 1; struct txpwr_idx_comp tic; u8 mgn_rate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); TxPower = rtw_hal_get_tx_power_index(pAdapter, RfPath, mgn_rate, pHalData->current_channel_bw, pHalData->current_channel, &tic); - RTW_INFO("bw=%d, ch=%d, rate=%d, txPower:%u = %u + (%d=%d:%d) + (%d) + (%d)\n", - pHalData->current_channel_bw, pHalData->current_channel, mgn_rate - , TxPower, tic.base, (tic.by_rate > tic.limit ? tic.limit : tic.by_rate), tic.by_rate, tic.limit, tic.tpt, tic.ebias); + RTW_INFO("TXPWR: [%c][%s]ch:%u, %s %uT, pwr_idx:%u(0x%02x) = %u + (%d=%d:%d) + (%d) + (%d) + (%d) + (%d)\n" + , rf_path_char(RfPath), ch_width_str(pHalData->current_channel_bw), pHalData->current_channel, MGN_RATE_STR(mgn_rate), tic.ntx_idx + 1 + , TxPower, TxPower, tic.pg, (tic.by_rate > tic.limit ? tic.limit : tic.by_rate), tic.by_rate, tic.limit, tic.tpt + , tic.ebias, tic.btc, tic.dpd); pAdapter->mppriv.txpoweridx = (u8)TxPower; - pMptCtx->TxPwrLevel[RF_PATH_A] = (u8)TxPower; - pMptCtx->TxPwrLevel[RF_PATH_B] = (u8)TxPower; - pMptCtx->TxPwrLevel[RF_PATH_C] = (u8)TxPower; - pMptCtx->TxPwrLevel[RF_PATH_D] = (u8)TxPower; + if (RfPath == RF_PATH_A) + pMptCtx->TxPwrLevel[RF_PATH_A] = (u8)TxPower; + else if (RfPath == RF_PATH_B) + pMptCtx->TxPwrLevel[RF_PATH_B] = (u8)TxPower; + else if (RfPath == RF_PATH_C) + pMptCtx->TxPwrLevel[RF_PATH_C] = (u8)TxPower; + else if (RfPath == RF_PATH_D) + pMptCtx->TxPwrLevel[RF_PATH_D] = (u8)TxPower; hal_mpt_SetTxPower(pAdapter); return TxPower; @@ -2766,11 +3066,11 @@ static inline void dump_buf(u8 *buf, u32 len) } void ByteToBit( - UCHAR *out, + u8 *out, bool *in, - UCHAR in_size) + u8 in_size) { - UCHAR i = 0, j = 0; + u8 i = 0, j = 0; for (i = 0; i < in_size; i++) { for (j = 0; j < 8; j++) { @@ -2784,10 +3084,10 @@ void ByteToBit( void CRC16_generator( bool *out, bool *in, - UCHAR in_size + u8 in_size ) { - UCHAR i = 0; + u8 i = 0; bool temp = 0, reg[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}; for (i = 0; i < in_size; i++) {/* take one's complement and bit reverse*/ @@ -2832,8 +3132,8 @@ void CCK_generator( bool LengthExtBit; double LengthExact; double LengthPSDU; - UCHAR i; - UINT PacketLength = pPMacTxInfo->PacketLength; + u8 i; + u32 PacketLength = pPMacTxInfo->PacketLength; if (pPMacTxInfo->bSPreamble) pPMacTxInfo->SFD = 0x05CF; @@ -2877,7 +3177,7 @@ void CCK_generator( LengthExtBit = 0; - pPMacTxInfo->LENGTH = (UINT)LengthPSDU; + pPMacTxInfo->LENGTH = (u32)LengthPSDU; /* CRC16_in(1,16:31) = LengthPSDU[0:15]*/ for (i = 0; i < 16; i++) crc16_in[i + 16] = (pPMacTxInfo->LENGTH >> i) & 0x1; @@ -2904,8 +3204,8 @@ void PMAC_Get_Pkt_Param( PRT_PMAC_PKT_INFO pPMacPktInfo) { - UCHAR TX_RATE_HEX = 0, MCS = 0; - UCHAR TX_RATE = pPMacTxInfo->TX_RATE; + u8 TX_RATE_HEX = 0, MCS = 0; + u8 TX_RATE = pPMacTxInfo->TX_RATE; /* TX_RATE & Nss */ if (MPT_IS_2SS_RATE(TX_RATE)) @@ -2971,13 +3271,13 @@ void PMAC_Get_Pkt_Param( } -UINT LDPC_parameter_generator( - UINT N_pld_int, - UINT N_CBPSS, - UINT N_SS, - UINT R, - UINT m_STBC, - UINT N_TCB_int +u32 LDPC_parameter_generator( + u32 N_pld_int, + u32 N_CBPSS, + u32 N_SS, + u32 R, + u32 m_STBC, + u32 N_TCB_int ) { double CR = 0.; @@ -2987,7 +3287,7 @@ UINT LDPC_parameter_generator( double L_LDPC = 0., K_LDPC = 0., L_LDPC_info = 0.; double N_punc = 0., N_ppcw = 0., N_fpunc = 0., N_rep = 0., N_rpcw = 0., N_frep = 0.; double R_eff = 0.; - UINT VHTSIGA2B3 = 0;/* extra symbol from VHT-SIG-A2 Bit 3*/ + u32 VHTSIGA2B3 = 0;/* extra symbol from VHT-SIG-A2 Bit 3*/ if (R == 0) CR = 0.5; @@ -3055,13 +3355,13 @@ void PMAC_Nsym_generator( PRT_PMAC_TX_INFO pPMacTxInfo, PRT_PMAC_PKT_INFO pPMacPktInfo) { - UINT SIGA2B3 = 0; - UCHAR TX_RATE = pPMacTxInfo->TX_RATE; + u32 SIGA2B3 = 0; + u8 TX_RATE = pPMacTxInfo->TX_RATE; - UINT R, R_list[10] = {0, 0, 2, 0, 2, 1, 2, 3, 2, 3}; + u32 R, R_list[10] = {0, 0, 2, 0, 2, 1, 2, 3, 2, 3}; double CR = 0; - UINT N_SD, N_BPSC_list[10] = {1, 2, 2, 4, 4, 6, 6, 6, 8, 8}; - UINT N_BPSC = 0, N_CBPS = 0, N_DBPS = 0, N_ES = 0, N_SYM = 0, N_pld = 0, N_TCB = 0; + u32 N_SD, N_BPSC_list[10] = {1, 2, 2, 4, 4, 6, 6, 6, 8, 8}; + u32 N_BPSC = 0, N_CBPS = 0, N_DBPS = 0, N_ES = 0, N_SYM = 0, N_pld = 0, N_TCB = 0; int D_R = 0; RTW_INFO("TX_RATE = %d\n", TX_RATE); @@ -3074,7 +3374,7 @@ void PMAC_Nsym_generator( N_SD = 234; if (MPT_IS_HT_RATE(TX_RATE)) { - UCHAR MCS_temp; + u8 MCS_temp; if (pPMacPktInfo->MCS > 23) MCS_temp = pPMacPktInfo->MCS - 24; @@ -3104,14 +3404,14 @@ void PMAC_Nsym_generator( N_BPSC = N_BPSC_list[MCS_temp]; N_CBPS = N_BPSC * N_SD * pPMacPktInfo->Nss; - N_DBPS = (UINT)((double)N_CBPS * CR); + N_DBPS = (u32)((double)N_CBPS * CR); if (pPMacTxInfo->bLDPC == FALSE) { - N_ES = (UINT)ceil((double)(N_DBPS * pPMacPktInfo->Nss) / 4. / 300.); + N_ES = (u32)ceil((double)(N_DBPS * pPMacPktInfo->Nss) / 4. / 300.); RTW_INFO("N_ES = %d\n", N_ES); /* N_SYM = m_STBC* (8*length+16+6*N_ES) / (m_STBC*N_DBPS)*/ - N_SYM = pPMacTxInfo->m_STBC * (UINT)ceil((double)(pPMacTxInfo->PacketLength * 8 + 16 + N_ES * 6) / + N_SYM = pPMacTxInfo->m_STBC * (u32)ceil((double)(pPMacTxInfo->PacketLength * 8 + 16 + N_ES * 6) / (double)(N_DBPS * pPMacTxInfo->m_STBC)); } else { @@ -3119,7 +3419,7 @@ void PMAC_Nsym_generator( /* N_pld = length * 8 + 16*/ N_pld = pPMacTxInfo->PacketLength * 8 + 16; RTW_INFO("N_pld = %d\n", N_pld); - N_SYM = pPMacTxInfo->m_STBC * (UINT)ceil((double)(N_pld) / + N_SYM = pPMacTxInfo->m_STBC * (u32)ceil((double)(N_pld) / (double)(N_DBPS * pPMacTxInfo->m_STBC)); RTW_INFO("N_SYM = %d\n", N_SYM); /* N_avbits = N_CBPS *m_STBC *(N_pld/N_CBPS*R*m_STBC)*/ @@ -3149,19 +3449,19 @@ void PMAC_Nsym_generator( } N_BPSC = N_BPSC_list[pPMacPktInfo->MCS]; N_CBPS = N_BPSC * N_SD * pPMacPktInfo->Nss; - N_DBPS = (UINT)((double)N_CBPS * CR); + N_DBPS = (u32)((double)N_CBPS * CR); if (pPMacTxInfo->bLDPC == FALSE) { if (pPMacTxInfo->bSGI) - N_ES = (UINT)ceil((double)(N_DBPS) / 3.6 / 600.); + N_ES = (u32)ceil((double)(N_DBPS) / 3.6 / 600.); else - N_ES = (UINT)ceil((double)(N_DBPS) / 4. / 600.); + N_ES = (u32)ceil((double)(N_DBPS) / 4. / 600.); /* N_SYM = m_STBC* (8*length+16+6*N_ES) / (m_STBC*N_DBPS)*/ - N_SYM = pPMacTxInfo->m_STBC * (UINT)ceil((double)(pPMacTxInfo->PacketLength * 8 + 16 + N_ES * 6) / (double)(N_DBPS * pPMacTxInfo->m_STBC)); + N_SYM = pPMacTxInfo->m_STBC * (u32)ceil((double)(pPMacTxInfo->PacketLength * 8 + 16 + N_ES * 6) / (double)(N_DBPS * pPMacTxInfo->m_STBC)); SIGA2B3 = 0; } else { N_ES = 1; /* N_SYM = m_STBC* (8*length+N_service) / (m_STBC*N_DBPS)*/ - N_SYM = pPMacTxInfo->m_STBC * (UINT)ceil((double)(pPMacTxInfo->PacketLength * 8 + 16) / (double)(N_DBPS * pPMacTxInfo->m_STBC)); + N_SYM = pPMacTxInfo->m_STBC * (u32)ceil((double)(pPMacTxInfo->PacketLength * 8 + 16) / (double)(N_DBPS * pPMacTxInfo->m_STBC)); /* N_avbits = N_sys_init * N_CBPS*/ N_TCB = N_CBPS * N_SYM; /* N_pld = N_sys_init * N_DBPS*/ @@ -3203,21 +3503,21 @@ void PMAC_Nsym_generator( ========================================*/ void L_SIG_generator( - UINT N_SYM, /* Max: 750*/ + u32 N_SYM, /* Max: 750*/ PRT_PMAC_TX_INFO pPMacTxInfo, PRT_PMAC_PKT_INFO pPMacPktInfo) { u8 sig_bi[24] = {0}; /* 24 BIT*/ - UINT mode, LENGTH; + u32 mode, LENGTH; int i; if (MPT_IS_OFDM_RATE(pPMacTxInfo->TX_RATE)) { mode = pPMacPktInfo->MCS; LENGTH = pPMacTxInfo->PacketLength; } else { - UCHAR N_LTF; + u8 N_LTF; double T_data; - UINT OFDM_symbol; + u32 OFDM_symbol; mode = 0; @@ -3234,9 +3534,9 @@ void L_SIG_generator( /*(L-SIG, HT-SIG, HT-STF, HT-LTF....HT-LTF, Data)*/ if (MPT_IS_VHT_RATE(pPMacTxInfo->TX_RATE)) - OFDM_symbol = (UINT)ceil((double)(8 + 4 + N_LTF * 4 + N_SYM * T_data + 4) / 4.); + OFDM_symbol = (u32)ceil((double)(8 + 4 + N_LTF * 4 + N_SYM * T_data + 4) / 4.); else - OFDM_symbol = (UINT)ceil((double)(8 + 4 + N_LTF * 4 + N_SYM * T_data) / 4.); + OFDM_symbol = (u32)ceil((double)(8 + 4 + N_LTF * 4 + N_SYM * T_data) / 4.); RTW_INFO("%s , OFDM_symbol =%d\n", __func__, OFDM_symbol); LENGTH = OFDM_symbol * 3 - 3; @@ -3321,10 +3621,10 @@ void L_SIG_generator( void CRC8_generator( bool *out, bool *in, - UCHAR in_size + u8 in_size ) { - UCHAR i = 0; + u8 i = 0; bool temp = 0, reg[] = {1, 1, 1, 1, 1, 1, 1, 1}; for (i = 0; i < in_size; i++) { /* take one's complement and bit reverse*/ @@ -3353,7 +3653,7 @@ void HT_SIG_generator( PRT_PMAC_PKT_INFO pPMacPktInfo ) { - UINT i; + u32 i; bool sig_bi[48] = {0}, crc8[8] = {0}; /* MCS Field*/ for (i = 0; i < 7; i++) @@ -3420,7 +3720,7 @@ void VHT_SIG_A_generator( PRT_PMAC_TX_INFO pPMacTxInfo, PRT_PMAC_PKT_INFO pPMacPktInfo) { - UINT i; + u32 i; bool sig_bi[48], crc8[8]; _rtw_memset(sig_bi, 0, 48); @@ -3484,8 +3784,8 @@ void VHT_SIG_B_generator( PRT_PMAC_TX_INFO pPMacTxInfo) { bool sig_bi[32], crc8_bi[8]; - UINT i, len, res, tail = 6, total_len, crc8_in_len; - UINT sigb_len; + u32 i, len, res, tail = 6, total_len, crc8_in_len; + u32 sigb_len; _rtw_memset(sig_bi, 0, 32); _rtw_memset(crc8_bi, 0, 8); @@ -3555,8 +3855,8 @@ void VHT_Delimiter_generator( ) { bool sig_bi[32] = {0}, crc8[8] = {0}; - UINT crc8_in_len = 16; - UINT PacketLength = pPMacTxInfo->PacketLength; + u32 crc8_in_len = 16; + u32 PacketLength = pPMacTxInfo->PacketLength; int j; /* Delimiter[0]: EOF*/ diff --git a/core/rtw_mp_ioctl.c b/core/rtw_mp_ioctl.c deleted file mode 100644 index 035d281..0000000 --- a/core/rtw_mp_ioctl.c +++ /dev/null @@ -1,2529 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#define _RTW_MP_IOCTL_C_ - -#include -#include -#include "../hal/phydm/phydm_precomp.h" - -/* **************** oid_rtl_seg_81_85 section start **************** */ -NDIS_STATUS oid_rt_wireless_mode_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - if (poid_par_priv->information_buf_len < sizeof(u8)) - return NDIS_STATUS_INVALID_LENGTH; - - if (poid_par_priv->type_of_oid == SET_OID) - Adapter->registrypriv.wireless_mode = *(u8 *)poid_par_priv->information_buf; - else if (poid_par_priv->type_of_oid == QUERY_OID) { - *(u8 *)poid_par_priv->information_buf = Adapter->registrypriv.wireless_mode; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_NOT_ACCEPTED; - - - return status; -} -/* **************** oid_rtl_seg_81_87_80 section start **************** */ -NDIS_STATUS oid_rt_pro_write_bb_reg_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - struct bb_reg_param *pbbreg; - u16 offset; - u32 value; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(struct bb_reg_param)) - return NDIS_STATUS_INVALID_LENGTH; - - pbbreg = (struct bb_reg_param *)(poid_par_priv->information_buf); - - offset = (u16)(pbbreg->offset) & 0xFFF; /* 0ffset :0x800~0xfff */ - if (offset < BB_REG_BASE_ADDR) - offset |= BB_REG_BASE_ADDR; - - value = pbbreg->value; - - - _irqlevel_changed_(&oldirql, LOWER); - write_bbreg(Adapter, offset, 0xFFFFFFFF, value); - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_read_bb_reg_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - struct bb_reg_param *pbbreg; - u16 offset; - u32 value; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(struct bb_reg_param)) - return NDIS_STATUS_INVALID_LENGTH; - - pbbreg = (struct bb_reg_param *)(poid_par_priv->information_buf); - - offset = (u16)(pbbreg->offset) & 0xFFF; /* 0ffset :0x800~0xfff */ - if (offset < BB_REG_BASE_ADDR) - offset |= BB_REG_BASE_ADDR; - - _irqlevel_changed_(&oldirql, LOWER); - value = read_bbreg(Adapter, offset, 0xFFFFFFFF); - _irqlevel_changed_(&oldirql, RAISE); - - pbbreg->value = value; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_write_rf_reg_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - struct rf_reg_param *pbbreg; - u8 path; - u8 offset; - u32 value; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(struct rf_reg_param)) - return NDIS_STATUS_INVALID_LENGTH; - - pbbreg = (struct rf_reg_param *)(poid_par_priv->information_buf); - - if (pbbreg->path >= MAX_RF_PATH_NUMS) - return NDIS_STATUS_NOT_ACCEPTED; - if (pbbreg->offset > 0xFF) - return NDIS_STATUS_NOT_ACCEPTED; - if (pbbreg->value > 0xFFFFF) - return NDIS_STATUS_NOT_ACCEPTED; - - path = (u8)pbbreg->path; - offset = (u8)pbbreg->offset; - value = pbbreg->value; - - - _irqlevel_changed_(&oldirql, LOWER); - write_rfreg(Adapter, path, offset, value); - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_read_rf_reg_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - struct rf_reg_param *pbbreg; - u8 path; - u8 offset; - u32 value; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(struct rf_reg_param)) - return NDIS_STATUS_INVALID_LENGTH; - - pbbreg = (struct rf_reg_param *)(poid_par_priv->information_buf); - - if (pbbreg->path >= MAX_RF_PATH_NUMS) - return NDIS_STATUS_NOT_ACCEPTED; - if (pbbreg->offset > 0xFF) - return NDIS_STATUS_NOT_ACCEPTED; - - path = (u8)pbbreg->path; - offset = (u8)pbbreg->offset; - - _irqlevel_changed_(&oldirql, LOWER); - value = read_rfreg(Adapter, path, offset); - _irqlevel_changed_(&oldirql, RAISE); - - pbbreg->value = value; - - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - - return status; -} -/* **************** oid_rtl_seg_81_87_00 section end**************** - * ------------------------------------------------------------------------------ */ - -/* **************** oid_rtl_seg_81_80_00 section start **************** - * ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_set_data_rate_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u32 ratevalue;/* 4 */ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len != sizeof(u32)) - return NDIS_STATUS_INVALID_LENGTH; - - ratevalue = *((u32 *)poid_par_priv->information_buf); /* 4 */ - if (ratevalue >= MPT_RATE_LAST) - return NDIS_STATUS_INVALID_DATA; - - Adapter->mppriv.rateidx = ratevalue; - - _irqlevel_changed_(&oldirql, LOWER); - SetDataRate(Adapter); - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_start_test_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u32 mode; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (Adapter->registrypriv.mp_mode == 0) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - _irqlevel_changed_(&oldirql, LOWER); - - /* IQCalibrateBcut(Adapter); */ - - mode = *((u32 *)poid_par_priv->information_buf); - Adapter->mppriv.mode = mode;/* 1 for loopback */ - - if (mp_start_test(Adapter) == _FAIL) { - status = NDIS_STATUS_NOT_ACCEPTED; - goto exit; - } - -exit: - _irqlevel_changed_(&oldirql, RAISE); - - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_stop_test_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - _irqlevel_changed_(&oldirql, LOWER); - mp_stop_test(Adapter); - _irqlevel_changed_(&oldirql, RAISE); - - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_set_channel_direct_call_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u32 Channel; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->information_buf_len != sizeof(u32)) - return NDIS_STATUS_INVALID_LENGTH; - - if (poid_par_priv->type_of_oid == QUERY_OID) { - *((u32 *)poid_par_priv->information_buf) = Adapter->mppriv.channel; - return NDIS_STATUS_SUCCESS; - } - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - Channel = *((u32 *)poid_par_priv->information_buf); - if (Channel > 14) - return NDIS_STATUS_NOT_ACCEPTED; - Adapter->mppriv.channel = Channel; - - _irqlevel_changed_(&oldirql, LOWER); - SetChannel(Adapter); - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_set_bandwidth_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u16 bandwidth; - u16 channel_offset; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(u32)) - return NDIS_STATUS_INVALID_LENGTH; - - bandwidth = *((u32 *)poid_par_priv->information_buf); /* 4 */ - channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; - - if (bandwidth != CHANNEL_WIDTH_40) - bandwidth = CHANNEL_WIDTH_20; - padapter->mppriv.bandwidth = (u8)bandwidth; - padapter->mppriv.prime_channel_offset = (u8)channel_offset; - - _irqlevel_changed_(&oldirql, LOWER); - SetBandwidth(padapter); - _irqlevel_changed_(&oldirql, RAISE); - - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_set_antenna_bb_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u32 antenna; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->information_buf_len != sizeof(u32)) - return NDIS_STATUS_INVALID_LENGTH; - - if (poid_par_priv->type_of_oid == SET_OID) { - antenna = *(u32 *)poid_par_priv->information_buf; - - Adapter->mppriv.antenna_tx = (u16)((antenna & 0xFFFF0000) >> 16); - Adapter->mppriv.antenna_rx = (u16)(antenna & 0x0000FFFF); - - _irqlevel_changed_(&oldirql, LOWER); - SetAntenna(Adapter); - _irqlevel_changed_(&oldirql, RAISE); - } else { - antenna = (Adapter->mppriv.antenna_tx << 16) | Adapter->mppriv.antenna_rx; - *(u32 *)poid_par_priv->information_buf = antenna; - } - - - return status; -} - -NDIS_STATUS oid_rt_pro_set_tx_power_control_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u32 tx_pwr_idx; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len != sizeof(u32)) - return NDIS_STATUS_INVALID_LENGTH; - - tx_pwr_idx = *((u32 *)poid_par_priv->information_buf); - if (tx_pwr_idx > MAX_TX_PWR_INDEX_N_MODE) - return NDIS_STATUS_NOT_ACCEPTED; - - Adapter->mppriv.txpoweridx = (u8)tx_pwr_idx; - - - _irqlevel_changed_(&oldirql, LOWER); - SetTxPower(Adapter); - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} - -/* ------------------------------------------------------------------------------ - * **************** oid_rtl_seg_81_80_20 section start **************** - * ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_query_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - if (poid_par_priv->information_buf_len == sizeof(ULONG)) { - *(ULONG *)poid_par_priv->information_buf = Adapter->mppriv.tx_pktcount; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_INVALID_LENGTH; - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_query_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - if (poid_par_priv->information_buf_len == sizeof(ULONG)) { - *(ULONG *)poid_par_priv->information_buf = Adapter->mppriv.rx_pktcount; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_INVALID_LENGTH; - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_query_rx_packet_crc32_error_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - if (poid_par_priv->information_buf_len == sizeof(ULONG)) { - *(ULONG *)poid_par_priv->information_buf = Adapter->mppriv.rx_crcerrpktcount; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_INVALID_LENGTH; - - - return status; -} -/* ------------------------------------------------------------------------------ */ - -NDIS_STATUS oid_rt_pro_reset_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - if (poid_par_priv->type_of_oid != SET_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - Adapter->mppriv.tx_pktcount = 0; - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_reset_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - if (poid_par_priv->type_of_oid != SET_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - if (poid_par_priv->information_buf_len == sizeof(ULONG)) { - Adapter->mppriv.rx_pktcount = 0; - Adapter->mppriv.rx_crcerrpktcount = 0; - } else - status = NDIS_STATUS_INVALID_LENGTH; - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_reset_phy_rx_packet_count_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - if (poid_par_priv->type_of_oid != SET_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - _irqlevel_changed_(&oldirql, LOWER); - ResetPhyRxPktCount(Adapter); - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_phy_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len != sizeof(ULONG)) - return NDIS_STATUS_INVALID_LENGTH; - - _irqlevel_changed_(&oldirql, LOWER); - *(ULONG *)poid_par_priv->information_buf = GetPhyRxPktReceived(Adapter); - _irqlevel_changed_(&oldirql, RAISE); - - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_phy_rx_packet_crc32_error_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - - if (poid_par_priv->information_buf_len != sizeof(ULONG)) - return NDIS_STATUS_INVALID_LENGTH; - - _irqlevel_changed_(&oldirql, LOWER); - *(ULONG *)poid_par_priv->information_buf = GetPhyRxPktCRC32Error(Adapter); - _irqlevel_changed_(&oldirql, RAISE); - - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - - return status; -} -/* **************** oid_rtl_seg_81_80_20 section end **************** */ -NDIS_STATUS oid_rt_pro_set_continuous_tx_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u32 bStartTest; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - bStartTest = *((u32 *)poid_par_priv->information_buf); - - _irqlevel_changed_(&oldirql, LOWER); - SetContinuousTx(Adapter, (u8)bStartTest); - if (bStartTest) { - struct mp_priv *pmp_priv = &Adapter->mppriv; - if (pmp_priv->tx.stop == 0) { - pmp_priv->tx.stop = 1; - RTW_INFO("%s: pkt tx is running...\n", __func__); - rtw_msleep_os(5); - } - pmp_priv->tx.stop = 0; - pmp_priv->tx.count = 1; - SetPacketTx(Adapter); - } - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} - -NDIS_STATUS oid_rt_pro_set_single_carrier_tx_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u32 bStartTest; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - bStartTest = *((u32 *)poid_par_priv->information_buf); - - _irqlevel_changed_(&oldirql, LOWER); - SetSingleCarrierTx(Adapter, (u8)bStartTest); - if (bStartTest) { - struct mp_priv *pmp_priv = &Adapter->mppriv; - if (pmp_priv->tx.stop == 0) { - pmp_priv->tx.stop = 1; - RTW_INFO("%s: pkt tx is running...\n", __func__); - rtw_msleep_os(5); - } - pmp_priv->tx.stop = 0; - pmp_priv->tx.count = 1; - SetPacketTx(Adapter); - } - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} - -NDIS_STATUS oid_rt_pro_set_carrier_suppression_tx_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u32 bStartTest; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - bStartTest = *((u32 *)poid_par_priv->information_buf); - - _irqlevel_changed_(&oldirql, LOWER); - SetCarrierSuppressionTx(Adapter, (u8)bStartTest); - if (bStartTest) { - struct mp_priv *pmp_priv = &Adapter->mppriv; - if (pmp_priv->tx.stop == 0) { - pmp_priv->tx.stop = 1; - RTW_INFO("%s: pkt tx is running...\n", __func__); - rtw_msleep_os(5); - } - pmp_priv->tx.stop = 0; - pmp_priv->tx.count = 1; - SetPacketTx(Adapter); - } - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} - -NDIS_STATUS oid_rt_pro_set_single_tone_tx_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u32 bStartTest; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - bStartTest = *((u32 *)poid_par_priv->information_buf); - - _irqlevel_changed_(&oldirql, LOWER); - SetSingleToneTx(Adapter, (u8)bStartTest); - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} - -NDIS_STATUS oid_rt_pro_set_modulation_hdl(struct oid_par_priv *poid_par_priv) -{ - return 0; -} - -NDIS_STATUS oid_rt_pro_trigger_gpio_hdl(struct oid_par_priv *poid_par_priv) -{ - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - _irqlevel_changed_(&oldirql, LOWER); - rtw_hal_set_hwreg(Adapter, HW_VAR_TRIGGER_GPIO_0, 0); - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} -/* **************** oid_rtl_seg_81_80_00 section end **************** - * ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro8711_join_bss_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - PNDIS_802_11_SSID pssid; - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - *poid_par_priv->bytes_needed = (u32)sizeof(NDIS_802_11_SSID); - *poid_par_priv->bytes_rw = 0; - if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) - return NDIS_STATUS_INVALID_LENGTH; - - pssid = (PNDIS_802_11_SSID)poid_par_priv->information_buf; - - _irqlevel_changed_(&oldirql, LOWER); - - if (mp_start_joinbss(Adapter, pssid) == _FAIL) - status = NDIS_STATUS_NOT_ACCEPTED; - - _irqlevel_changed_(&oldirql, RAISE); - - *poid_par_priv->bytes_rw = sizeof(NDIS_802_11_SSID); - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_read_register_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - pRW_Reg RegRWStruct; - u32 offset, width; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - RegRWStruct = (pRW_Reg)poid_par_priv->information_buf; - offset = RegRWStruct->offset; - width = RegRWStruct->width; - - if (offset > 0xFFF) - return NDIS_STATUS_NOT_ACCEPTED; - - _irqlevel_changed_(&oldirql, LOWER); - - switch (width) { - case 1: - RegRWStruct->value = rtw_read8(Adapter, offset); - break; - case 2: - RegRWStruct->value = rtw_read16(Adapter, offset); - break; - default: - width = 4; - RegRWStruct->value = rtw_read32(Adapter, offset); - break; - } - - _irqlevel_changed_(&oldirql, RAISE); - - *poid_par_priv->bytes_rw = width; - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_write_register_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - pRW_Reg RegRWStruct; - u32 offset, width, value; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - RegRWStruct = (pRW_Reg)poid_par_priv->information_buf; - offset = RegRWStruct->offset; - width = RegRWStruct->width; - value = RegRWStruct->value; - - if (offset > 0xFFF) - return NDIS_STATUS_NOT_ACCEPTED; - - _irqlevel_changed_(&oldirql, LOWER); - - switch (RegRWStruct->width) { - case 1: - if (value > 0xFF) { - status = NDIS_STATUS_NOT_ACCEPTED; - break; - } - rtw_write8(padapter, offset, (u8)value); - break; - case 2: - if (value > 0xFFFF) { - status = NDIS_STATUS_NOT_ACCEPTED; - break; - } - rtw_write16(padapter, offset, (u16)value); - break; - case 4: - rtw_write32(padapter, offset, value); - break; - default: - status = NDIS_STATUS_NOT_ACCEPTED; - break; - } - - _irqlevel_changed_(&oldirql, RAISE); - - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_burst_read_register_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - pBurst_RW_Reg pBstRwReg; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - pBstRwReg = (pBurst_RW_Reg)poid_par_priv->information_buf; - - _irqlevel_changed_(&oldirql, LOWER); - rtw_read_mem(padapter, pBstRwReg->offset, (u32)pBstRwReg->len, pBstRwReg->Data); - _irqlevel_changed_(&oldirql, RAISE); - - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_burst_write_register_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - pBurst_RW_Reg pBstRwReg; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - pBstRwReg = (pBurst_RW_Reg)poid_par_priv->information_buf; - - _irqlevel_changed_(&oldirql, LOWER); - rtw_write_mem(padapter, pBstRwReg->offset, (u32)pBstRwReg->len, pBstRwReg->Data); - _irqlevel_changed_(&oldirql, RAISE); - - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_write_txcmd_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - - TX_CMD_Desc *TxCmd_Info; - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - - TxCmd_Info = (TX_CMD_Desc *)poid_par_priv->information_buf; - - - _irqlevel_changed_(&oldirql, LOWER); - - rtw_write32(Adapter, TxCmd_Info->offset + 0, (unsigned int)TxCmd_Info->TxCMD.value[0]); - rtw_write32(Adapter, TxCmd_Info->offset + 4, (unsigned int)TxCmd_Info->TxCMD.value[1]); - - _irqlevel_changed_(&oldirql, RAISE); - - - - return status; -#else - return 0; -#endif -} - -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_read16_eeprom_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - pEEPROM_RWParam pEEPROM; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - pEEPROM = (pEEPROM_RWParam)poid_par_priv->information_buf; - - _irqlevel_changed_(&oldirql, LOWER); - pEEPROM->value = eeprom_read16(padapter, (u16)(pEEPROM->offset >> 1)); - _irqlevel_changed_(&oldirql, RAISE); - - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - - return status; -#else - return 0; -#endif -} - -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_write16_eeprom_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - pEEPROM_RWParam pEEPROM; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - pEEPROM = (pEEPROM_RWParam)poid_par_priv->information_buf; - - _irqlevel_changed_(&oldirql, LOWER); - eeprom_write16(padapter, (u16)(pEEPROM->offset >> 1), pEEPROM->value); - _irqlevel_changed_(&oldirql, RAISE); - - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro8711_wi_poll_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - struct mp_wiparam *pwi_param; - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(struct mp_wiparam)) - return NDIS_STATUS_INVALID_LENGTH; - - if (Adapter->mppriv.workparam.bcompleted == _FALSE) - return NDIS_STATUS_NOT_ACCEPTED; - - pwi_param = (struct mp_wiparam *)poid_par_priv->information_buf; - - _rtw_memcpy(pwi_param, &Adapter->mppriv.workparam, sizeof(struct mp_wiparam)); - Adapter->mppriv.act_in_progress = _FALSE; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro8711_pkt_loss_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(uint) * 2) { - return NDIS_STATUS_INVALID_LENGTH; - } - - if (*(uint *)poid_par_priv->information_buf == 1) /* init==1 */ - Adapter->mppriv.rx_pktloss = 0; - - *((uint *)poid_par_priv->information_buf + 1) = Adapter->mppriv.rx_pktloss; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_rd_attrib_mem_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - struct io_queue *pio_queue = (struct io_queue *)Adapter->pio_queue; - struct intf_hdl *pintfhdl = &pio_queue->intf; - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - -#ifdef CONFIG_SDIO_HCI - void (*_attrib_read)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); -#endif - - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - -#ifdef CONFIG_SDIO_HCI - _irqlevel_changed_(&oldirql, LOWER); - { - u32 *plmem = (u32 *)poid_par_priv->information_buf + 2; - _attrib_read = pintfhdl->io_ops._attrib_read; - _attrib_read(pintfhdl, *((u32 *)poid_par_priv->information_buf), - *((u32 *)poid_par_priv->information_buf + 1), (u8 *)plmem); - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } - _irqlevel_changed_(&oldirql, RAISE); -#endif - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_wr_attrib_mem_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - struct io_queue *pio_queue = (struct io_queue *)Adapter->pio_queue; - struct intf_hdl *pintfhdl = &pio_queue->intf; - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - -#ifdef CONFIG_SDIO_HCI - void (*_attrib_write)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); -#endif - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - -#ifdef CONFIG_SDIO_HCI - _irqlevel_changed_(&oldirql, LOWER); - { - u32 *plmem = (u32 *)poid_par_priv->information_buf + 2; - _attrib_write = pintfhdl->io_ops._attrib_write; - _attrib_write(pintfhdl, *(u32 *)poid_par_priv->information_buf, - *((u32 *)poid_par_priv->information_buf + 1), (u8 *)plmem); - } - _irqlevel_changed_(&oldirql, RAISE); -#endif - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_set_rf_intfs_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - _irqlevel_changed_(&oldirql, LOWER); - - if (rtw_setrfintfs_cmd(Adapter, *(unsigned char *)poid_par_priv->information_buf) == _FAIL) - status = NDIS_STATUS_NOT_ACCEPTED; - - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_poll_rx_status_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - _rtw_memcpy(poid_par_priv->information_buf, (unsigned char *)&Adapter->mppriv.rxstat, sizeof(struct recv_stat)); - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_cfg_debug_message_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - PCFG_DBG_MSG_STRUCT pdbg_msg; - - - -#if 0/*#ifdef CONFIG_DEBUG_RTL871X*/ - - pdbg_msg = (PCFG_DBG_MSG_STRUCT)(poid_par_priv->information_buf); - - if (poid_par_priv->type_of_oid == SET_OID) { - - GlobalDebugLevel = pdbg_msg->DebugLevel; - GlobalDebugComponents = (pdbg_msg->DebugComponent_H32 << 32) | pdbg_msg->DebugComponent_L32; - } else { - pdbg_msg->DebugLevel = GlobalDebugLevel; - pdbg_msg->DebugComponent_H32 = (u32)(GlobalDebugComponents >> 32); - pdbg_msg->DebugComponent_L32 = (u32)GlobalDebugComponents; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - } - -#endif - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_set_data_rate_ex_hdl(struct oid_par_priv *poid_par_priv) -{ - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - _irqlevel_changed_(&oldirql, LOWER); - - if (rtw_setdatarate_cmd(Adapter, poid_par_priv->information_buf) != _SUCCESS) - status = NDIS_STATUS_NOT_ACCEPTED; - - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} -/* ----------------------------------------------------------------------------- */ -NDIS_STATUS oid_rt_get_thermal_meter_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - u8 thermal = 0; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(u32)) - return NDIS_STATUS_INVALID_LENGTH; - - _irqlevel_changed_(&oldirql, LOWER); - GetThermalMeter(Adapter, &thermal); - _irqlevel_changed_(&oldirql, RAISE); - - *(u32 *)poid_par_priv->information_buf = (u32)thermal; - *poid_par_priv->bytes_rw = sizeof(u32); - - - return status; -} -/* ----------------------------------------------------------------------------- */ -NDIS_STATUS oid_rt_pro_read_tssi_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (Adapter->mppriv.act_in_progress == _TRUE) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(u8)) - return NDIS_STATUS_INVALID_LENGTH; - - /* init workparam */ - Adapter->mppriv.act_in_progress = _TRUE; - Adapter->mppriv.workparam.bcompleted = _FALSE; - Adapter->mppriv.workparam.act_type = MPT_READ_TSSI; - Adapter->mppriv.workparam.io_offset = 0; - Adapter->mppriv.workparam.io_value = 0xFFFFFFFF; - - _irqlevel_changed_(&oldirql, LOWER); - - if (!rtw_gettssi_cmd(Adapter, 0, (u8 *)&Adapter->mppriv.workparam.io_value)) - status = NDIS_STATUS_NOT_ACCEPTED; - - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_set_power_tracking_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - /* if (poid_par_priv->type_of_oid != SET_OID) - * return NDIS_STATUS_NOT_ACCEPTED; */ - - if (poid_par_priv->information_buf_len < sizeof(u8)) - return NDIS_STATUS_INVALID_LENGTH; - - _irqlevel_changed_(&oldirql, LOWER); - if (poid_par_priv->type_of_oid == SET_OID) { - u8 enable; - - enable = *(u8 *)poid_par_priv->information_buf; - - SetPowerTracking(Adapter, enable); - } else - GetPowerTracking(Adapter, (u8 *)poid_par_priv->information_buf); - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} -/* ----------------------------------------------------------------------------- */ -NDIS_STATUS oid_rt_pro_set_basic_rate_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u32 ratevalue; - u8 datarates[NumRates]; - int i; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; -#if 0 - ratevalue = *((u32 *)poid_par_priv->information_buf); - - for (i = 0; i < NumRates; i++) { - if (ratevalue == mpdatarate[i]) - datarates[i] = mpdatarate[i]; - else - datarates[i] = 0xff; - } - - _irqlevel_changed_(&oldirql, LOWER); - - if (rtw_setbasicrate_cmd(padapter, datarates) != _SUCCESS) - status = NDIS_STATUS_NOT_ACCEPTED; - - _irqlevel_changed_(&oldirql, RAISE); -#endif - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_qry_pwrstate_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < 8) - return NDIS_STATUS_INVALID_LENGTH; - - *poid_par_priv->bytes_rw = 8; - _rtw_memcpy(poid_par_priv->information_buf, &(adapter_to_pwrctl(Adapter)->pwr_mode), 8); - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_set_pwrstate_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - uint pwr_mode, smart_ps; - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - *poid_par_priv->bytes_rw = 0; - *poid_par_priv->bytes_needed = 8; - - if (poid_par_priv->information_buf_len < 8) - return NDIS_STATUS_INVALID_LENGTH; - - pwr_mode = *(uint *)(poid_par_priv->information_buf); - smart_ps = *(uint *)((int)poid_par_priv->information_buf + 4); - - *poid_par_priv->bytes_rw = 8; - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_h2c_set_rate_table_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - struct setratable_parm *prate_table; - u8 res; - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - *poid_par_priv->bytes_needed = sizeof(struct setratable_parm); - if (poid_par_priv->information_buf_len < sizeof(struct setratable_parm)) - return NDIS_STATUS_INVALID_LENGTH; - - prate_table = (struct setratable_parm *)poid_par_priv->information_buf; - - _irqlevel_changed_(&oldirql, LOWER); - res = rtw_setrttbl_cmd(Adapter, prate_table); - _irqlevel_changed_(&oldirql, RAISE); - - if (res == _FAIL) - status = NDIS_STATUS_FAILURE; - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_h2c_get_rate_table_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - -#if 0 - struct mp_wi_cntx *pmp_wi_cntx = &(Adapter->mppriv.wi_cntx); - u8 res = _SUCCESS; - DEBUG_INFO(("===> Set OID_RT_PRO_H2C_GET_RATE_TABLE.\n")); - - if (pmp_wi_cntx->bmp_wi_progress == _TRUE) { - DEBUG_ERR(("\n mp workitem is progressing, not allow to set another workitem right now!!!\n")); - Status = NDIS_STATUS_NOT_ACCEPTED; - break; - } else { - pmp_wi_cntx->bmp_wi_progress = _TRUE; - pmp_wi_cntx->param.bcompleted = _FALSE; - pmp_wi_cntx->param.act_type = MPT_GET_RATE_TABLE; - pmp_wi_cntx->param.io_offset = 0x0; - pmp_wi_cntx->param.bytes_cnt = sizeof(struct getratable_rsp); - pmp_wi_cntx->param.io_value = 0xffffffff; - - res = rtw_getrttbl_cmd(Adapter, (struct getratable_rsp *)pmp_wi_cntx->param.data); - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - if (res != _SUCCESS) - Status = NDIS_STATUS_NOT_ACCEPTED; - } - DEBUG_INFO(("\n <=== Set OID_RT_PRO_H2C_GET_RATE_TABLE.\n")); -#endif - - - return status; -#else - return 0; -#endif -} - -/* **************** oid_rtl_seg_87_12_00 section start **************** */ -NDIS_STATUS oid_rt_pro_encryption_ctrl_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - struct security_priv *psecuritypriv = &Adapter->securitypriv; - - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - ENCRY_CTRL_STATE encry_mode; - - - *poid_par_priv->bytes_needed = sizeof(u8); - if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) - return NDIS_STATUS_INVALID_LENGTH; - - if (poid_par_priv->type_of_oid == SET_OID) { - encry_mode = *((u8 *)poid_par_priv->information_buf); - switch (encry_mode) { - case HW_CONTROL: -#if 0 - Adapter->registrypriv.software_decrypt = _FALSE; - Adapter->registrypriv.software_encrypt = _FALSE; -#else - psecuritypriv->sw_decrypt = _FALSE; - psecuritypriv->sw_encrypt = _FALSE; -#endif - break; - case SW_CONTROL: -#if 0 - Adapter->registrypriv.software_decrypt = _TRUE; - Adapter->registrypriv.software_encrypt = _TRUE; -#else - psecuritypriv->sw_decrypt = _TRUE; - psecuritypriv->sw_encrypt = _TRUE; -#endif - break; - case HW_ENCRY_SW_DECRY: -#if 0 - Adapter->registrypriv.software_decrypt = _TRUE; - Adapter->registrypriv.software_encrypt = _FALSE; -#else - psecuritypriv->sw_decrypt = _TRUE; - psecuritypriv->sw_encrypt = _FALSE; -#endif - break; - case SW_ENCRY_HW_DECRY: -#if 0 - Adapter->registrypriv.software_decrypt = _FALSE; - Adapter->registrypriv.software_encrypt = _TRUE; -#else - psecuritypriv->sw_decrypt = _FALSE; - psecuritypriv->sw_encrypt = _TRUE; -#endif - break; - } - - } else { -#if 0 - if (Adapter->registrypriv.software_encrypt == _FALSE) { - if (Adapter->registrypriv.software_decrypt == _FALSE) - encry_mode = HW_CONTROL; - else - encry_mode = HW_ENCRY_SW_DECRY; - } else { - if (Adapter->registrypriv.software_decrypt == _FALSE) - encry_mode = SW_ENCRY_HW_DECRY; - else - encry_mode = SW_CONTROL; - } -#else - - if ((psecuritypriv->sw_encrypt == _FALSE) && (psecuritypriv->sw_decrypt == _FALSE)) - encry_mode = HW_CONTROL; - else if ((psecuritypriv->sw_encrypt == _FALSE) && (psecuritypriv->sw_decrypt == _TRUE)) - encry_mode = HW_ENCRY_SW_DECRY; - else if ((psecuritypriv->sw_encrypt == _TRUE) && (psecuritypriv->sw_decrypt == _FALSE)) - encry_mode = SW_ENCRY_HW_DECRY; - else if ((psecuritypriv->sw_encrypt == _TRUE) && (psecuritypriv->sw_decrypt == _TRUE)) - encry_mode = SW_CONTROL; - -#endif - - *(u8 *)poid_par_priv->information_buf = encry_mode; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - } - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_add_sta_info_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - struct sta_info *psta = NULL; - UCHAR *macaddr; - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - *poid_par_priv->bytes_needed = ETH_ALEN; - if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) - return NDIS_STATUS_INVALID_LENGTH; - - macaddr = (UCHAR *) poid_par_priv->information_buf ; - - - _irqlevel_changed_(&oldirql, LOWER); - - psta = rtw_get_stainfo(&Adapter->stapriv, macaddr); - - if (psta == NULL) { /* the sta have been in sta_info_queue => do nothing */ - psta = rtw_alloc_stainfo(&Adapter->stapriv, macaddr); - - if (psta == NULL) { - status = NDIS_STATUS_FAILURE; - } - } - - _irqlevel_changed_(&oldirql, RAISE); - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_dele_sta_info_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - struct sta_info *psta = NULL; - UCHAR *macaddr; - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - *poid_par_priv->bytes_needed = ETH_ALEN; - if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) - return NDIS_STATUS_INVALID_LENGTH; - - macaddr = (UCHAR *) poid_par_priv->information_buf ; - - psta = rtw_get_stainfo(&Adapter->stapriv, macaddr); - if (psta != NULL) { - /* _enter_critical(&(Adapter->stapriv.sta_hash_lock), &irqL); */ - rtw_free_stainfo(Adapter, psta); - /* _exit_critical(&(Adapter->stapriv.sta_hash_lock), &irqL); */ - } - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -#if 0 -static u32 mp_query_drv_var(_adapter *padapter, u8 offset, u32 var) -{ -#ifdef CONFIG_SDIO_HCI - - if (offset == 1) { - u16 tmp_blk_num; - tmp_blk_num = rtw_read16(padapter, SDIO_RX0_RDYBLK_NUM); - if (adapter_to_dvobj(padapter)->rxblknum != tmp_blk_num) { - /* sd_recv_rxfifo(padapter); */ - } - } - -#if 0 - if (offset <= 100) { /* For setting data rate and query data rate */ - if (offset == 100) { /* For query data rate */ - var = padapter->registrypriv.tx_rate; - - } else if (offset < 0x1d) { /* For setting data rate */ - padapter->registrypriv.tx_rate = offset; - var = padapter->registrypriv.tx_rate; - padapter->registrypriv.use_rate = _TRUE; - } else { /* not use the data rate */ - padapter->registrypriv.use_rate = _FALSE; - } - } else if (offset <= 110) { /* for setting debug level */ - if (offset == 110) { /* For query data rate */ - padapter->registrypriv.dbg_level = GlobalDebugLevel; - var = padapter->registrypriv.dbg_level; - } else if (offset < 110 && offset > 100) { - padapter->registrypriv.dbg_level = GlobalDebugLevel = offset - 100; - var = padapter->registrypriv.dbg_level; - - } - } else if (offset > 110 && offset < 116) { - if (115 == offset) { - } else { - switch (offset) { - case 111: - adapter_to_dvobj(padapter)->tx_block_mode = 1; - adapter_to_dvobj(padapter)->rx_block_mode = 1; - break; - case 112: - adapter_to_dvobj(padapter)->tx_block_mode = 1; - adapter_to_dvobj(padapter)->rx_block_mode = 0; - break; - case 113: - adapter_to_dvobj(padapter)->tx_block_mode = 0; - adapter_to_dvobj(padapter)->rx_block_mode = 1; - break; - case 114: - adapter_to_dvobj(padapter)->tx_block_mode = 0; - adapter_to_dvobj(padapter)->rx_block_mode = 0; - break; - default: - break; - - } - - } - - } else if (offset >= 127) { - u64 prnt_dbg_comp; - u8 chg_idx; - u64 tmp_dbg_comp; - chg_idx = offset - 0x80; - tmp_dbg_comp = BIT(chg_idx); - prnt_dbg_comp = padapter->registrypriv.dbg_component = GlobalDebugComponents; - if (offset == 127) { - /* prnt_dbg_comp=padapter->registrypriv.dbg_component= GlobalDebugComponents; */ - var = (u32)(padapter->registrypriv.dbg_component); - prnt_dbg_comp = GlobalDebugComponents; - prnt_dbg_comp = GlobalDebugComponents = padapter->registrypriv.dbg_component; - - } else { - prnt_dbg_comp = GlobalDebugComponents; - prnt_dbg_comp = GlobalDebugComponents = padapter->registrypriv.dbg_component; - - if (GlobalDebugComponents & tmp_dbg_comp) { - /* this bit is already set, now clear it */ - GlobalDebugComponents = GlobalDebugComponents & (~tmp_dbg_comp); - } else { - /* this bit is not set, now set it. */ - GlobalDebugComponents = GlobalDebugComponents | tmp_dbg_comp; - } - prnt_dbg_comp = GlobalDebugComponents; - - var = (u32)(GlobalDebugComponents); - /* GlobalDebugComponents=padapter->registrypriv.dbg_component; */ - - } - } -#endif -#endif - - return var; -} -#endif - -NDIS_STATUS oid_rt_pro_query_dr_variable_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - DR_VARIABLE_STRUCT *pdrv_var; - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - *poid_par_priv->bytes_needed = sizeof(DR_VARIABLE_STRUCT); - if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) - return NDIS_STATUS_INVALID_LENGTH; - - - pdrv_var = (struct _DR_VARIABLE_STRUCT_ *)poid_par_priv->information_buf; - - _irqlevel_changed_(&oldirql, LOWER); - pdrv_var->variable = mp_query_drv_var(Adapter, pdrv_var->offset, pdrv_var->variable); - _irqlevel_changed_(&oldirql, RAISE); - - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - return status; -#else - return 0; -#endif -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - - if (poid_par_priv->information_buf_len < sizeof(UCHAR)) { - status = NDIS_STATUS_INVALID_LENGTH; - *poid_par_priv->bytes_needed = sizeof(UCHAR); - return status; - } - - if (poid_par_priv->type_of_oid == SET_OID) { - Adapter->mppriv.rx_with_status = *(UCHAR *) poid_par_priv->information_buf; - - - } else { - *(UCHAR *) poid_par_priv->information_buf = Adapter->mppriv.rx_with_status; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - /* *(u32 *)&Adapter->eeprompriv.mac_addr[0]=rtw_read32(Adapter, 0x10250050); */ - /* *(u16 *)&Adapter->eeprompriv.mac_addr[4]=rtw_read16(Adapter, 0x10250054); */ - } -#endif - - return NDIS_STATUS_SUCCESS; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_read_efuse_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - PEFUSE_ACCESS_STRUCT pefuse; - u8 *data; - u16 addr = 0, cnts = 0, max_available_size = 0; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(EFUSE_ACCESS_STRUCT)) - return NDIS_STATUS_INVALID_LENGTH; - - pefuse = (PEFUSE_ACCESS_STRUCT)poid_par_priv->information_buf; - addr = pefuse->start_addr; - cnts = pefuse->cnts; - data = pefuse->data; - - - EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); - - if ((addr + cnts) > max_available_size) { - return NDIS_STATUS_NOT_ACCEPTED; - } - - _irqlevel_changed_(&oldirql, LOWER); - if (rtw_efuse_access(Adapter, _FALSE, addr, cnts, data) == _FAIL) { - status = NDIS_STATUS_FAILURE; - } else - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_write_efuse_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - PEFUSE_ACCESS_STRUCT pefuse; - u8 *data; - u16 addr = 0, cnts = 0, max_available_size = 0; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - pefuse = (PEFUSE_ACCESS_STRUCT)poid_par_priv->information_buf; - addr = pefuse->start_addr; - cnts = pefuse->cnts; - data = pefuse->data; - - - EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); - - if ((addr + cnts) > max_available_size) { - return NDIS_STATUS_NOT_ACCEPTED; - } - - _irqlevel_changed_(&oldirql, LOWER); - if (rtw_efuse_access(Adapter, _TRUE, addr, cnts, data) == _FAIL) - status = NDIS_STATUS_FAILURE; - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_rw_efuse_pgpkt_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - PPGPKT_STRUCT ppgpkt; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - - *poid_par_priv->bytes_rw = 0; - - if (poid_par_priv->information_buf_len < sizeof(PGPKT_STRUCT)) - return NDIS_STATUS_INVALID_LENGTH; - - ppgpkt = (PPGPKT_STRUCT)poid_par_priv->information_buf; - - _irqlevel_changed_(&oldirql, LOWER); - - if (poid_par_priv->type_of_oid == QUERY_OID) { - - Efuse_PowerSwitch(Adapter, _FALSE, _TRUE); - if (Efuse_PgPacketRead(Adapter, ppgpkt->offset, ppgpkt->data, _FALSE) == _TRUE) - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - else - status = NDIS_STATUS_FAILURE; - Efuse_PowerSwitch(Adapter, _FALSE, _FALSE); - } else { - - Efuse_PowerSwitch(Adapter, _TRUE, _TRUE); - if (Efuse_PgPacketWrite(Adapter, ppgpkt->offset, ppgpkt->word_en, ppgpkt->data, _FALSE) == _TRUE) - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - else - status = NDIS_STATUS_FAILURE; - Efuse_PowerSwitch(Adapter, _TRUE, _FALSE); - } - - _irqlevel_changed_(&oldirql, RAISE); - - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_efuse_current_size_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u16 size; - u8 ret; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(u32)) - return NDIS_STATUS_INVALID_LENGTH; - - _irqlevel_changed_(&oldirql, LOWER); - ret = efuse_GetCurrentSize(Adapter, &size); - _irqlevel_changed_(&oldirql, RAISE); - if (ret == _SUCCESS) { - *(u32 *)poid_par_priv->information_buf = size; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - } else - status = NDIS_STATUS_FAILURE; - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_efuse_max_size_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - - if (poid_par_priv->type_of_oid != QUERY_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(u32)) - return NDIS_STATUS_INVALID_LENGTH; - - *(u32 *)poid_par_priv->information_buf = efuse_GetMaxSize(Adapter); - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_efuse_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status; - - - - if (poid_par_priv->type_of_oid == QUERY_OID) - status = oid_rt_pro_read_efuse_hdl(poid_par_priv); - else - status = oid_rt_pro_write_efuse_hdl(poid_par_priv); - - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_pro_efuse_map_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u8 *data; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - u16 mapLen = 0; - - - - EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); - - *poid_par_priv->bytes_rw = 0; - - if (poid_par_priv->information_buf_len < mapLen) - return NDIS_STATUS_INVALID_LENGTH; - - data = (u8 *)poid_par_priv->information_buf; - - _irqlevel_changed_(&oldirql, LOWER); - - if (poid_par_priv->type_of_oid == QUERY_OID) { - - if (rtw_efuse_map_read(Adapter, 0, mapLen, data) == _SUCCESS) - *poid_par_priv->bytes_rw = mapLen; - else { - status = NDIS_STATUS_FAILURE; - } - } else { - /* SET_OID */ - - if (rtw_efuse_map_write(Adapter, 0, mapLen, data) == _SUCCESS) - *poid_par_priv->bytes_rw = mapLen; - else { - status = NDIS_STATUS_FAILURE; - } - } - - _irqlevel_changed_(&oldirql, RAISE); - - - - return status; -} - -NDIS_STATUS oid_rt_set_crystal_cap_hdl(struct oid_par_priv *poid_par_priv) -{ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - - u32 crystal_cap = 0; - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(u32)) - return NDIS_STATUS_INVALID_LENGTH; - - crystal_cap = *((u32 *)poid_par_priv->information_buf); /* 4 */ - if (crystal_cap > 0xf) - return NDIS_STATUS_NOT_ACCEPTED; - - Adapter->mppriv.curr_crystalcap = crystal_cap; - - _irqlevel_changed_(&oldirql, LOWER); - SetCrystalCap(Adapter); - _irqlevel_changed_(&oldirql, RAISE); - - -#endif - return status; -} - -NDIS_STATUS oid_rt_set_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u8 rx_pkt_type; - /* u32 rcr_val32; */ - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - /* PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); */ - - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(u8)) - return NDIS_STATUS_INVALID_LENGTH; - - rx_pkt_type = *((u8 *)poid_par_priv->information_buf); /* 4 */ - -#if 0 - _irqlevel_changed_(&oldirql, LOWER); -#if 0 - rcr_val8 = rtw_read8(Adapter, 0x10250048);/* RCR */ - rcr_val8 &= ~(RCR_AB | RCR_AM | RCR_APM | RCR_AAP); - - if (rx_pkt_type == RX_PKT_BROADCAST) - rcr_val8 |= (RCR_AB | RCR_ACRC32); - else if (rx_pkt_type == RX_PKT_DEST_ADDR) - rcr_val8 |= (RCR_AAP | RCR_AM | RCR_ACRC32); - else if (rx_pkt_type == RX_PKT_PHY_MATCH) - rcr_val8 |= (RCR_APM | RCR_ACRC32); - else - rcr_val8 &= ~(RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_ACRC32); - rtw_write8(padapter, 0x10250048, rcr_val8); -#else - rcr_val32 = rtw_read32(padapter, RCR);/* RCR = 0x10250048 */ - rcr_val32 &= ~(RCR_CBSSID | RCR_AB | RCR_AM | RCR_APM | RCR_AAP); -#if 0 - if (rx_pkt_type == RX_PKT_BROADCAST) - rcr_val32 |= (RCR_AB | RCR_AM | RCR_APM | RCR_AAP | RCR_ACRC32); - else if (rx_pkt_type == RX_PKT_DEST_ADDR) { - /* rcr_val32 |= (RCR_CBSSID|RCR_AAP|RCR_AM|RCR_ACRC32); */ - rcr_val32 |= (RCR_CBSSID | RCR_APM | RCR_ACRC32); - } else if (rx_pkt_type == RX_PKT_PHY_MATCH) { - rcr_val32 |= (RCR_APM | RCR_ACRC32); - /* rcr_val32 |= (RCR_AAP|RCR_ACRC32); */ - } else - rcr_val32 &= ~(RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_ACRC32); -#else - switch (rx_pkt_type) { - case RX_PKT_BROADCAST: - rcr_val32 |= (RCR_AB | RCR_AM | RCR_APM | RCR_AAP | RCR_ACRC32); - break; - case RX_PKT_DEST_ADDR: - rcr_val32 |= (RCR_AB | RCR_AM | RCR_APM | RCR_AAP | RCR_ACRC32); - break; - case RX_PKT_PHY_MATCH: - rcr_val32 |= (RCR_APM | RCR_ACRC32); - break; - default: - rcr_val32 &= ~(RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_ACRC32); - break; - } - - if (rx_pkt_type == RX_PKT_DEST_ADDR) - padapter->mppriv.check_mp_pkt = 1; - else - padapter->mppriv.check_mp_pkt = 0; -#endif - rtw_write32(padapter, RCR, rcr_val32); - -#endif - _irqlevel_changed_(&oldirql, RAISE); -#endif - - return status; -} - -NDIS_STATUS oid_rt_pro_set_tx_agc_offset_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - u32 txagc; - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(u32)) - return NDIS_STATUS_INVALID_LENGTH; - - txagc = *(u32 *)poid_par_priv->information_buf; - - _irqlevel_changed_(&oldirql, LOWER); - SetTxAGCOffset(Adapter, txagc); - _irqlevel_changed_(&oldirql, RAISE); - - - return status; -#else - return 0; -#endif -} - -NDIS_STATUS oid_rt_pro_set_pkt_test_mode_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - struct mp_priv *pmppriv = &Adapter->mppriv; - u32 type; - - - if (poid_par_priv->type_of_oid != SET_OID) - return NDIS_STATUS_NOT_ACCEPTED; - - if (poid_par_priv->information_buf_len < sizeof(u32)) - return NDIS_STATUS_INVALID_LENGTH; - - type = *(u32 *)poid_par_priv->information_buf; - - if (_LOOPBOOK_MODE_ == type) { - pmppriv->mode = type; - set_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE); /* append txdesc */ - } else if (_2MAC_MODE_ == type) { - pmppriv->mode = type; - _clr_fwstate_(pmlmepriv, WIFI_MP_LPBK_STATE); - } else - status = NDIS_STATUS_NOT_ACCEPTED; - - - return status; -#else - return 0; -#endif -} - -unsigned int mp_ioctl_xmit_packet_hdl(struct oid_par_priv *poid_par_priv) -{ - PMP_XMIT_PARM pparm; - PADAPTER padapter; - struct mp_priv *pmp_priv; - struct pkt_attrib *pattrib; - - - pparm = (PMP_XMIT_PARM)poid_par_priv->information_buf; - padapter = (PADAPTER)poid_par_priv->adapter_context; - pmp_priv = &padapter->mppriv; - - if (poid_par_priv->type_of_oid == QUERY_OID) { - pparm->enable = !pmp_priv->tx.stop; - pparm->count = pmp_priv->tx.sended; - } else { - if (pparm->enable == 0) - pmp_priv->tx.stop = 1; - else if (pmp_priv->tx.stop == 1) { - pmp_priv->tx.stop = 0; - pmp_priv->tx.count = pparm->count; - pmp_priv->tx.payload = pparm->payload_type; - pattrib = &pmp_priv->tx.attrib; - pattrib->pktlen = pparm->length; - _rtw_memcpy(pattrib->dst, pparm->da, ETH_ALEN); - SetPacketTx(padapter); - } else - return NDIS_STATUS_FAILURE; - } - - return NDIS_STATUS_SUCCESS; -} - -#if 0 -unsigned int mp_ioctl_xmit_packet_hdl(struct oid_par_priv *poid_par_priv) -{ - unsigned char *pframe, *pmp_pkt; - struct ethhdr *pethhdr; - struct pkt_attrib *pattrib; - struct rtw_ieee80211_hdr *pwlanhdr; - unsigned short *fctrl; - int llc_sz, payload_len; - struct mp_xmit_frame *pxframe = NULL; - struct mp_xmit_packet *pmp_xmitpkt = (struct mp_xmit_packet *)param; - u8 addr3[] = {0x02, 0xE0, 0x4C, 0x87, 0x66, 0x55}; - - /* RTW_INFO("+mp_ioctl_xmit_packet_hdl\n"); */ - - pxframe = alloc_mp_xmitframe(&padapter->mppriv); - if (pxframe == NULL) { - DEBUG_ERR(("Can't alloc pmpframe %d:%s\n", __LINE__, __FILE__)); - return -1; - } - - /* mp_xmit_pkt */ - payload_len = pmp_xmitpkt->len - 14; - pmp_pkt = (unsigned char *)pmp_xmitpkt->mem; - pethhdr = (struct ethhdr *)pmp_pkt; - - /* RTW_INFO("payload_len=%d, pkt_mem=0x%x\n", pmp_xmitpkt->len, (void*)pmp_xmitpkt->mem); */ - - /* RTW_INFO("pxframe=0x%x\n", (void*)pxframe); */ - /* RTW_INFO("pxframe->mem=0x%x\n", (void*)pxframe->mem); */ - - /* update attribute */ - pattrib = &pxframe->attrib; - memset((u8 *)(pattrib), 0, sizeof(struct pkt_attrib)); - pattrib->pktlen = pmp_xmitpkt->len; - pattrib->ether_type = ntohs(pethhdr->h_proto); - pattrib->hdrlen = 24; - pattrib->nr_frags = 1; - pattrib->priority = 0; -#ifndef CONFIG_MP_LINUX - if (IS_MCAST(pethhdr->h_dest)) - pattrib->mac_id = 4; - else - pattrib->mac_id = 5; -#else - pattrib->mac_id = 5; -#endif - - /* */ - memset(pxframe->mem, 0 , WLANHDR_OFFSET); - pframe = (u8 *)(pxframe->mem) + WLANHDR_OFFSET; - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - set_frame_sub_type(pframe, WIFI_DATA); - - _rtw_memcpy(pwlanhdr->addr1, pethhdr->h_dest, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, pethhdr->h_source, ETH_ALEN); - - _rtw_memcpy(pwlanhdr->addr3, addr3, ETH_ALEN); - - pwlanhdr->seq_ctl = 0; - pframe += pattrib->hdrlen; - - llc_sz = rtw_put_snap(pframe, pattrib->ether_type); - pframe += llc_sz; - - _rtw_memcpy(pframe, (void *)(pmp_pkt + 14), payload_len); - - pattrib->last_txcmdsz = pattrib->hdrlen + llc_sz + payload_len; - - DEBUG_INFO(("issuing mp_xmit_frame, tx_len=%d, ether_type=0x%x\n", pattrib->last_txcmdsz, pattrib->ether_type)); - xmit_mp_frame(padapter, pxframe); - - return _SUCCESS; -} -#endif -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_set_power_down_hdl(struct oid_par_priv *poid_par_priv) -{ -#ifdef PLATFORM_OS_XP - _irqL oldirql; -#endif - u8 bpwrup; - NDIS_STATUS status = NDIS_STATUS_SUCCESS; -#ifdef PLATFORM_LINUX -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); -#endif -#endif - - - if (poid_par_priv->type_of_oid != SET_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - - - _irqlevel_changed_(&oldirql, LOWER); - - bpwrup = *(u8 *)poid_par_priv->information_buf; - /* CALL the power_down function */ -#ifdef PLATFORM_LINUX -#if defined(CONFIG_RTL8712) /* Linux MP insmod unknown symbol */ - dev_power_down(padapter, bpwrup); -#endif -#endif - _irqlevel_changed_(&oldirql, RAISE); - - /* DEBUG_ERR(("\n <=== Query OID_RT_PRO_READ_REGISTER. */ - /* Add:0x%08x Width:%d Value:0x%08x\n",RegRWStruct->offset,RegRWStruct->width,RegRWStruct->value)); */ - - - return status; -} -/* ------------------------------------------------------------------------------ */ -NDIS_STATUS oid_rt_get_power_mode_hdl(struct oid_par_priv *poid_par_priv) -{ -#if 0 - NDIS_STATUS status = NDIS_STATUS_SUCCESS; - PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); - /* #ifdef PLATFORM_OS_XP */ - /* _irqL oldirql; - * #endif */ - - - if (poid_par_priv->type_of_oid != QUERY_OID) { - status = NDIS_STATUS_NOT_ACCEPTED; - return status; - } - if (poid_par_priv->information_buf_len < sizeof(u32)) { - status = NDIS_STATUS_INVALID_LENGTH; - return status; - } - - - /* _irqlevel_changed_(&oldirql, LOWER); */ - *(int *)poid_par_priv->information_buf = Adapter->registrypriv.low_power ? POWER_LOW : POWER_NORMAL; - *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - /* _irqlevel_changed_(&oldirql, RAISE); */ - - - return status; -#else - return 0; -#endif -} diff --git a/core/rtw_odm.c b/core/rtw_odm.c index 83e6cfc..1ca0010 100644 --- a/core/rtw_odm.c +++ b/core/rtw_odm.c @@ -57,7 +57,7 @@ u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability) void rtw_odm_init_ic_type(_adapter *adapter) { struct dm_struct *odm = adapter_to_phydm(adapter); - u4Byte ic_type = chip_type_to_odm_ic_type(rtw_get_chip_type(adapter)); + u32 ic_type = chip_type_to_odm_ic_type(rtw_get_chip_type(adapter)); rtw_warn_on(!ic_type); @@ -103,43 +103,16 @@ void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter) _RTW_PRINT_SEL(sel, "INVALID\n"); } -#define RTW_ADAPTIVITY_DML_DISABLE 0 -#define RTW_ADAPTIVITY_DML_ENABLE 1 - -void rtw_odm_adaptivity_dml_msg(void *sel, _adapter *adapter) -{ - struct registry_priv *regsty = &adapter->registrypriv; - - RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_DML_"); - - if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_DISABLE) - _RTW_PRINT_SEL(sel, "DISABLE\n"); - else if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_ENABLE) - _RTW_PRINT_SEL(sel, "ENABLE\n"); - else - _RTW_PRINT_SEL(sel, "INVALID\n"); -} - -void rtw_odm_adaptivity_dc_backoff_msg(void *sel, _adapter *adapter) -{ - struct registry_priv *regsty = &adapter->registrypriv; - - RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_DC_BACKOFF:%u\n", regsty->adaptivity_dc_backoff); -} - void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter) { rtw_odm_adaptivity_ver_msg(sel, adapter); rtw_odm_adaptivity_en_msg(sel, adapter); rtw_odm_adaptivity_mode_msg(sel, adapter); - rtw_odm_adaptivity_dml_msg(sel, adapter); - rtw_odm_adaptivity_dc_backoff_msg(sel, adapter); } bool rtw_odm_adaptivity_needed(_adapter *adapter) { struct registry_priv *regsty = &adapter->registrypriv; - struct mlme_priv *mlme = &adapter->mlmepriv; bool ret = _FALSE; if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE) @@ -154,32 +127,20 @@ void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter) rtw_odm_adaptivity_config_msg(sel, adapter); - RTW_PRINT_SEL(sel, "%10s %16s %16s %22s %12s\n" - , "th_l2h_ini", "th_edcca_hl_diff", "th_l2h_ini_mode2", "th_edcca_hl_diff_mode2", "edcca_enable"); - RTW_PRINT_SEL(sel, "0x%-8x %-16d 0x%-14x %-22d %-12d\n" + RTW_PRINT_SEL(sel, "%10s %16s\n" + , "th_l2h_ini", "th_edcca_hl_diff"); + RTW_PRINT_SEL(sel, "0x%-8x %-16d\n" , (u8)odm->th_l2h_ini , odm->th_edcca_hl_diff - , (u8)odm->th_l2h_ini_mode2 - , odm->th_edcca_hl_diff_mode2 - , odm->edcca_enable - ); - - RTW_PRINT_SEL(sel, "%15s %9s\n", "AdapEnableState", "Adap_Flag"); - RTW_PRINT_SEL(sel, "%-15x %-9x\n" - , odm->adaptivity_enable - , odm->adaptivity_flag ); } -void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff, s8 th_l2h_ini_mode2, s8 th_edcca_hl_diff_mode2, u8 edcca_enable) +void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff) { struct dm_struct *odm = adapter_to_phydm(adapter); odm->th_l2h_ini = th_l2h_ini; odm->th_edcca_hl_diff = th_edcca_hl_diff; - odm->th_l2h_ini_mode2 = th_l2h_ini_mode2; - odm->th_edcca_hl_diff_mode2 = th_edcca_hl_diff_mode2; - odm->edcca_enable = edcca_enable; } void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter) @@ -217,10 +178,10 @@ void rtw_odm_releasespinlock(_adapter *adapter, enum rt_spinlock_type type) } } -inline u8 rtw_odm_get_dfs_domain(_adapter *adapter) +inline u8 rtw_odm_get_dfs_domain(struct dvobj_priv *dvobj) { #ifdef CONFIG_DFS_MASTER - struct dm_struct *pDM_Odm = adapter_to_phydm(adapter); + struct dm_struct *pDM_Odm = dvobj_to_phydm(dvobj); return pDM_Odm->dfs_region_domain; #else @@ -228,28 +189,28 @@ inline u8 rtw_odm_get_dfs_domain(_adapter *adapter) #endif } -inline u8 rtw_odm_dfs_domain_unknown(_adapter *adapter) +inline u8 rtw_odm_dfs_domain_unknown(struct dvobj_priv *dvobj) { #ifdef CONFIG_DFS_MASTER - return rtw_odm_get_dfs_domain(adapter) == PHYDM_DFS_DOMAIN_UNKNOWN; + return rtw_odm_get_dfs_domain(dvobj) == PHYDM_DFS_DOMAIN_UNKNOWN; #else return 1; #endif } #ifdef CONFIG_DFS_MASTER -inline VOID rtw_odm_radar_detect_reset(_adapter *adapter) +inline void rtw_odm_radar_detect_reset(_adapter *adapter) { phydm_radar_detect_reset(adapter_to_phydm(adapter)); } -inline VOID rtw_odm_radar_detect_disable(_adapter *adapter) +inline void rtw_odm_radar_detect_disable(_adapter *adapter) { phydm_radar_detect_disable(adapter_to_phydm(adapter)); } /* called after ch, bw is set */ -inline VOID rtw_odm_radar_detect_enable(_adapter *adapter) +inline void rtw_odm_radar_detect_enable(_adapter *adapter) { phydm_radar_detect_enable(adapter_to_phydm(adapter)); } @@ -258,6 +219,11 @@ inline BOOLEAN rtw_odm_radar_detect(_adapter *adapter) { return phydm_radar_detect(adapter_to_phydm(adapter)); } + +inline u8 rtw_odm_radar_detect_polling_int_ms(struct dvobj_priv *dvobj) +{ + return phydm_dfs_polling_time(dvobj_to_phydm(dvobj)); +} #endif /* CONFIG_DFS_MASTER */ void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys) @@ -301,7 +267,7 @@ void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys) */ if ((*phys & 0xf) == 0) { - struct phy_status_rpt_jaguar2_type0 *phys_t0 = (struct phy_status_rpt_jaguar2_type0 *)phys; + struct phy_sts_rpt_jgr2_type0 *phys_t0 = (struct phy_sts_rpt_jgr2_type0 *)phys; if (DBG_RX_PHYSTATUS_CHINFO) { RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u)\n" @@ -314,7 +280,7 @@ void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys) } } else if ((*phys & 0xf) == 1) { - struct phy_status_rpt_jaguar2_type1 *phys_t1 = (struct phy_status_rpt_jaguar2_type1 *)phys; + struct phy_sts_rpt_jgr2_type1 *phys_t1 = (struct phy_sts_rpt_jgr2_type1 *)phys; u8 rxsc = (attrib->data_rate > DESC_RATE11M && attrib->data_rate < DESC_RATEMCS0) ? phys_t1->l_rxsc : phys_t1->ht_rxsc; u8 pkt_cch = 0; u8 pkt_bw = CHANNEL_WIDTH_20; @@ -435,7 +401,7 @@ type1_end: attrib->ch = pkt_cch; } else { - struct phy_status_rpt_jaguar2_type2 *phys_t2 = (struct phy_status_rpt_jaguar2_type2 *)phys; + struct phy_sts_rpt_jgr2_type2 *phys_t2 = (struct phy_sts_rpt_jgr2_type2 *)phys; if (DBG_RX_PHYSTATUS_CHINFO) { RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u, ht_rxsc:%u)\n" @@ -452,3 +418,230 @@ type1_end: } +#if defined(CONFIG_RTL8822C) && defined(CONFIG_LPS_PG) +void odm_iqk_get_cfir2fw_8822c(void *dm_void, u8 *buf, u32 *buf_size) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + + if (buf) { + u16 offset = 0; + + odm_move_memory(dm, buf, iqk_info->iqk_channel, sizeof(iqk_info->iqk_channel)); + offset += sizeof(iqk_info->iqk_channel); + odm_move_memory(dm, buf + offset, &iqk_info->iqk_cfir_real[0][0], sizeof(iqk_info->iqk_cfir_real[0][0])); + offset += sizeof(iqk_info->iqk_cfir_real[0][0]); + odm_move_memory(dm, buf + offset, &iqk_info->iqk_cfir_real[0][1], sizeof(iqk_info->iqk_cfir_real[0][1])); + offset += sizeof(iqk_info->iqk_cfir_real[0][1]); + odm_move_memory(dm, buf + offset, &iqk_info->iqk_cfir_real[1][0], sizeof(iqk_info->iqk_cfir_real[1][0])); + offset += sizeof(iqk_info->iqk_cfir_real[1][0]); + odm_move_memory(dm, buf + offset, &iqk_info->iqk_cfir_real[1][1], sizeof(iqk_info->iqk_cfir_real[1][1])); + offset += sizeof(iqk_info->iqk_cfir_real[1][1]); + odm_move_memory(dm, buf + offset, &iqk_info->iqk_cfir_imag[0][0], sizeof(iqk_info->iqk_cfir_imag[0][0])); + offset += sizeof(iqk_info->iqk_cfir_imag[0][0]); + odm_move_memory(dm, buf + offset, &iqk_info->iqk_cfir_imag[0][1], sizeof(iqk_info->iqk_cfir_imag[0][1])); + offset += sizeof(iqk_info->iqk_cfir_imag[0][1]); + odm_move_memory(dm, buf + offset, &iqk_info->iqk_cfir_imag[1][0], sizeof(iqk_info->iqk_cfir_imag[1][0])); + offset += sizeof(iqk_info->iqk_cfir_imag[1][0]); + odm_move_memory(dm, buf + offset, &iqk_info->iqk_cfir_imag[1][1], sizeof(iqk_info->iqk_cfir_imag[1][1])); + offset += sizeof(iqk_info->iqk_cfir_imag[1][1]); + odm_move_memory(dm, buf + offset, &iqk_info->lok_idac[0][0], sizeof(iqk_info->lok_idac[0][0])); + offset += sizeof(iqk_info->lok_idac[0][0]); + odm_move_memory(dm, buf + offset, &iqk_info->lok_idac[0][1], sizeof(iqk_info->lok_idac[0][1])); + offset += sizeof(iqk_info->lok_idac[0][1]); + odm_move_memory(dm, buf + offset, &iqk_info->lok_idac[1][0], sizeof(iqk_info->lok_idac[1][0])); + offset += sizeof(iqk_info->lok_idac[1][0]); + odm_move_memory(dm, buf + offset, &iqk_info->lok_idac[1][1], sizeof(iqk_info->lok_idac[1][1])); + offset += sizeof(iqk_info->lok_idac[1][1]); + } + + if (buf_size) + *buf_size = RSVDPAGE_8822C_LPS_PG_IQK_INFO_LEN; +} + +void +debug_DACK( + struct dm_struct *dm +) +{ + //P_PHYDM_FUNC dm; + //dm = &(SysMib.ODM.Phydm); + //PIQK_OFFLOAD_PARM pIQK_info; + //pIQK_info= &(SysMib.ODM.IQKParm); + u8 i; + u32 temp1, temp2, temp3; + + temp1 = odm_get_bb_reg(dm, 0x1860, bMaskDWord); + temp2 = odm_get_bb_reg(dm, 0x4160, bMaskDWord); + temp3 = odm_get_bb_reg(dm, 0x9b4, bMaskDWord); + + odm_set_bb_reg(dm, 0x9b4, bMaskDWord, 0xdb66db00); + + //pathA + odm_set_bb_reg(dm, 0x1830, BIT(30), 0x0); + odm_set_bb_reg(dm, 0x1860, 0xfc000000, 0x3c); + + RTW_INFO("path A i\n"); + //i + for (i = 0; i < 0xf; i++) { + odm_set_bb_reg(dm, 0x18b0, 0xf0000000, i); + RTW_INFO("[0][0][%d] = 0x%08x\n", i, (u16)odm_get_bb_reg(dm,0x2810,0x7fc0000)); + //pIQK_info->msbk_d[0][0][i] = (u16)odm_get_bb_reg(dm,0x2810,0x7fc0000); + } + RTW_INFO("path A q\n"); + //q + for (i = 0; i < 0xf; i++) { + odm_set_bb_reg(dm, 0x18cc, 0xf0000000, i); + RTW_INFO("[0][1][%d] = 0x%08x\n", i, (u16)odm_get_bb_reg(dm,0x283c,0x7fc0000)); + //pIQK_info->msbk_d[0][1][i] = (u16)odm_get_bb_reg(dm,0x283c,0x7fc0000); + } + //pathB + odm_set_bb_reg(dm, 0x4130, BIT(30), 0x0); + odm_set_bb_reg(dm, 0x4160, 0xfc000000, 0x3c); + + RTW_INFO("\npath B i\n"); + //i + for (i = 0; i < 0xf; i++) { + odm_set_bb_reg(dm, 0x41b0, 0xf0000000, i); + RTW_INFO("[1][0][%d] = 0x%08x\n", i, (u16)odm_get_bb_reg(dm,0x4510,0x7fc0000)); + //pIQK_info->msbk_d[1][0][i] = (u16)odm_get_bb_reg(dm,0x2810,0x7fc0000); + } + RTW_INFO("path B q\n"); + //q + for (i = 0; i < 0xf; i++) { + odm_set_bb_reg(dm, 0x41cc, 0xf0000000, i); + RTW_INFO("[1][1][%d] = 0x%08x\n", i, (u16)odm_get_bb_reg(dm,0x453c,0x7fc0000)); + //pIQK_info->msbk_d[1][1][i] = (u16)odm_get_bb_reg(dm,0x283c,0x7fc0000); + } + + //restore to normal + odm_set_bb_reg(dm, 0x1830, BIT(30), 0x1); + odm_set_bb_reg(dm, 0x4130, BIT(30), 0x1); + odm_set_bb_reg(dm, 0x1860, bMaskDWord, temp1); + odm_set_bb_reg(dm, 0x4160, bMaskDWord, temp2); + odm_set_bb_reg(dm, 0x9b4, bMaskDWord, temp3); + + +} + +void +debug_IQK( + struct dm_struct *dm, + IN u8 idx, + IN u8 path +) +{ + u8 i, ch; + u32 tmp; + u32 bit_mask_20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16); + + RTW_INFO("idx = %d, path = %d\n", idx, path); + + odm_set_bb_reg(dm, 0x1b00, MASKDWORD, 0x8 | path << 1); + + if (idx == TX_IQK) {//TXCFIR + odm_set_bb_reg(dm, R_0x1b20, BIT(31) | BIT(30), 0x3); + } else {//RXCFIR + odm_set_bb_reg(dm, R_0x1b20, BIT(31) | BIT(30), 0x1); + } + odm_set_bb_reg(dm, R_0x1bd4, BIT(21), 0x1); + odm_set_bb_reg(dm, R_0x1bd4, bit_mask_20_16, 0x10); + for (i = 0; i <= 16; i++) { + odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0xe0000001 | i << 2); + tmp = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD); + RTW_INFO("iqk_cfir_real[%d][%d][%d] = 0x%x\n", path, idx, i, ((tmp & 0x0fff0000) >> 16)); + //iqk_info->iqk_cfir_real[ch][path][idx][i] = + // (tmp & 0x0fff0000) >> 16; + RTW_INFO("iqk_cfir_imag[%d][%d][%d] = 0x%x\n", path, idx, i, (tmp & 0x0fff)); + //iqk_info->iqk_cfir_imag[ch][path][idx][i] = tmp & 0x0fff; + } + odm_set_bb_reg(dm, R_0x1b20, BIT(31) | BIT(30), 0x0); + //odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x0); +} + +__odm_func__ void +debug_information_8822c( + struct dm_struct *dm) +{ + struct dm_dpk_info *dpk_info = &dm->dpk_info; + + u32 reg_rf18; + + if (odm_get_bb_reg(dm, R_0x1e7c, BIT(30))) + dpk_info->is_tssi_mode = true; + else + dpk_info->is_tssi_mode = false; + + reg_rf18 = odm_get_rf_reg(dm, RF_PATH_A, RF_0x18, RFREG_MASK); + + dpk_info->dpk_band = (u8)((reg_rf18 & BIT(16)) >> 16); /*0/1:G/A*/ + dpk_info->dpk_ch = (u8)reg_rf18 & 0xff; + dpk_info->dpk_bw = (u8)((reg_rf18 & 0x3000) >> 12); /*3/2/1:20/40/80*/ + + RTW_INFO("[DPK] TSSI/ Band/ CH/ BW = %d / %s / %d / %s\n", + dpk_info->is_tssi_mode, dpk_info->dpk_band == 0 ? "2G" : "5G", + dpk_info->dpk_ch, + dpk_info->dpk_bw == 3 ? "20M" : (dpk_info->dpk_bw == 2 ? "40M" : "80M")); +} + +extern void _dpk_get_coef_8822c(void *dm_void, u8 path); + +__odm_func__ void +debug_reload_data_8822c( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_dpk_info *dpk_info = &dm->dpk_info; + + u8 path; + u32 u32tmp; + + debug_information_8822c(dm); + + for (path = 0; path < DPK_RF_PATH_NUM_8822C; path++) { + + RTW_INFO("[DPK] Reload path: 0x%x\n", path); + + odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, 0x8 | (path << 1)); + + /*txagc bnd*/ + if (dpk_info->dpk_band == 0x0) + u32tmp = odm_get_bb_reg(dm, R_0x1b60, MASKDWORD); + else + u32tmp = odm_get_bb_reg(dm, R_0x1b60, MASKDWORD); + + RTW_INFO("[DPK] txagc bnd = 0x%08x\n", u32tmp); + + u32tmp = odm_get_bb_reg(dm, R_0x1b64, MASKBYTE3); + RTW_INFO("[DPK] dpk_txagc = 0x%08x\n", u32tmp); + + //debug_coef_write_8822c(dm, path, dpk_info->dpk_path_ok & BIT(path) >> path); + _dpk_get_coef_8822c(dm, path); + + //debug_one_shot_8822c(dm, path, DPK_ON); + + odm_set_bb_reg(dm, R_0x1b00, 0x0000000f, 0xc); + + if (path == RF_PATH_A) + u32tmp = odm_get_bb_reg(dm, R_0x1b04, 0x0fffffff); + else + u32tmp = odm_get_bb_reg(dm, R_0x1b5c, 0x0fffffff); + + RTW_INFO("[DPK] dpk_gs = 0x%08x\n", u32tmp); + + } +} + +void odm_lps_pg_debug_8822c(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + debug_DACK(dm); + debug_IQK(dm, TX_IQK, RF_PATH_A); + debug_IQK(dm, RX_IQK, RF_PATH_A); + debug_IQK(dm, TX_IQK, RF_PATH_B); + debug_IQK(dm, RX_IQK, RF_PATH_B); + debug_reload_data_8822c(dm); +} +#endif /* defined(CONFIG_RTL8822C) && defined(CONFIG_LPS_PG) */ + diff --git a/core/rtw_p2p.c b/core/rtw_p2p.c index 964f1c7..26539dd 100644 --- a/core/rtw_p2p.c +++ b/core/rtw_p2p.c @@ -290,7 +290,6 @@ static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8 *raddr, unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); pmgntframe = alloc_mgtxmitframe(pxmitpriv); @@ -1870,16 +1869,6 @@ u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 p2pie[MAX_P2P_IE_LEN] = { 0x00 }; u32 len = 0, p2pielen = 0; -#ifdef CONFIG_INTEL_WIDI - struct mlme_priv *pmlmepriv = &(pwdinfo->padapter->mlmepriv); - u8 zero_array_check[L2SDTA_SERVICE_VE_LEN] = { 0x00 }; - u8 widi_version = 0, i = 0; - - if (_rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE) - widi_version = 35; - else if (pmlmepriv->num_p2p_sdt != 0) - widi_version = 40; -#endif /* CONFIG_INTEL_WIDI */ /* P2P OUI */ p2pielen = 0; @@ -1962,14 +1951,7 @@ u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) /* 21->P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) */ /* + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) */ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); */ -#ifdef CONFIG_INTEL_WIDI - if (widi_version == 35) - RTW_PUT_LE16(p2pie + p2pielen, 21 + 8 + pwdinfo->device_name_len); - else if (widi_version == 40) - RTW_PUT_LE16(p2pie + p2pielen, 21 + 8 * pmlmepriv->num_p2p_sdt + pwdinfo->device_name_len); - else -#endif /* CONFIG_INTEL_WIDI */ - RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); + RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); p2pielen += 2; /* Value: */ @@ -1983,25 +1965,6 @@ u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->supported_wps_cm); p2pielen += 2; -#ifdef CONFIG_INTEL_WIDI - if (widi_version == 40) { - /* Primary Device Type */ - /* Category ID */ - /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); */ - RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_pdt_cid); - p2pielen += 2; - - /* OUI */ - /* *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); */ - RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); - p2pielen += 4; - - /* Sub Category ID */ - /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); */ - RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_pdt_scid); - p2pielen += 2; - } else -#endif /* CONFIG_INTEL_WIDI */ { /* Primary Device Type */ /* Category ID */ @@ -2021,33 +1984,7 @@ u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) } /* Number of Secondary Device Types */ -#ifdef CONFIG_INTEL_WIDI - if (widi_version == 35) { - p2pie[p2pielen++] = 0x01; - - RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_DISPLAYS); - p2pielen += 2; - - RTW_PUT_BE32(p2pie + p2pielen, INTEL_DEV_TYPE_OUI); - p2pielen += 4; - - RTW_PUT_BE16(p2pie + p2pielen, P2P_SCID_WIDI_CONSUMER_SINK); - p2pielen += 2; - } else if (widi_version == 40) { - p2pie[p2pielen++] = pmlmepriv->num_p2p_sdt; - for (; i < pmlmepriv->num_p2p_sdt; i++) { - RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_sdt_cid[i]); - p2pielen += 2; - - RTW_PUT_BE32(p2pie + p2pielen, INTEL_DEV_TYPE_OUI); - p2pielen += 4; - - RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_sdt_scid[i]); - p2pielen += 2; - } - } else -#endif /* CONFIG_INTEL_WIDI */ - p2pie[p2pielen++] = 0x00; /* No Secondary Device Type List */ + p2pie[p2pielen++] = 0x00; /* No Secondary Device Type List */ /* Device Name */ /* Type: */ @@ -2807,8 +2744,6 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe u8 attr_content = 0x00; u32 attr_contentlen = 0; u8 operatingch_info[5] = { 0x00 }; - uint ch_cnt = 0; - u8 ch_content[100] = { 0x00 }; u8 groupid[38]; u16 cap_attr; u8 peer_ch_list[100] = { 0x00 }; @@ -2974,7 +2909,9 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe u8 process_p2p_group_negotation_confirm(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) { +#ifdef CONFIG_CONCURRENT_MODE _adapter *padapter = pwdinfo->padapter; +#endif u8 *ies; u32 ies_len; u8 *p2p_ie; @@ -3097,8 +3034,6 @@ void p2p_concurrent_handler(_adapter *padapter); void restore_p2p_state_handler(_adapter *padapter) { struct wifidirect_info *pwdinfo = &padapter->wdinfo; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL)) rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); @@ -3295,16 +3230,15 @@ u8 roch_stay_in_cur_chan(_adapter *padapter) if (iface) { pmlmepriv = &iface->mlmepriv; - if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS) == _TRUE) { - RTW_ERR(ADPT_FMT"- _FW_UNDER_LINKING |WIFI_UNDER_WPS (mlme state:0x%x)\n", + if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS | WIFI_UNDER_KEY_HANDSHAKE) == _TRUE) { + RTW_INFO(ADPT_FMT"- _FW_UNDER_LINKING |WIFI_UNDER_WPS | WIFI_UNDER_KEY_HANDSHAKE (mlme state:0x%x)\n", ADPT_ARG(iface), get_fwstate(&iface->mlmepriv)); rst = _TRUE; break; } #ifdef CONFIG_AP_MODE if (MLME_IS_AP(iface) || MLME_IS_MESH(iface)) { - if (rtw_ap_sta_linking_state_check(iface) == _TRUE) { - RTW_ERR(ADPT_FMT"- SoftAP/Mesh -have sta under linking\n", ADPT_ARG(iface)); + if (rtw_ap_sta_states_check(iface) == _TRUE) { rst = _TRUE; break; } @@ -3322,8 +3256,12 @@ static int ro_ch_handler(_adapter *adapter, u8 *buf) struct p2p_roch_parm *roch_parm = (struct p2p_roch_parm *)buf; struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &adapter->cfg80211_wdinfo; - struct wifidirect_info *pwdinfo = &adapter->wdinfo; +#ifdef CONFIG_CONCURRENT_MODE struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; +#ifdef RTW_ROCH_BACK_OP + struct wifidirect_info *pwdinfo = &adapter->wdinfo; +#endif +#endif u8 ready_on_channel = _FALSE; u8 remain_ch; unsigned int duration; @@ -3442,6 +3380,7 @@ static int cancel_ro_ch_handler(_adapter *padapter, u8 *buf) #if defined(RTW_ROCH_BACK_OP) && defined(CONFIG_CONCURRENT_MODE) _cancel_timer_ex(&pwdinfo->ap_p2p_switch_timer); + ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); #endif if (rtw_mi_get_ch_setting_union(padapter, &ch, &bw, &offset) != 0) { @@ -3503,6 +3442,7 @@ static void ro_ch_timer_process(void *FunctionContext) p2p_cancel_roch_cmd(adapter, 0, NULL, 0); } +#if 0 static void rtw_change_p2pie_op_ch(_adapter *padapter, const u8 *frame_body, u32 len, u8 ch) { u8 *ies, *p2p_ie; @@ -3533,7 +3473,9 @@ static void rtw_change_p2pie_op_ch(_adapter *padapter, const u8 *frame_body, u32 p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); } } +#endif +#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) static void rtw_change_p2pie_ch_list(_adapter *padapter, const u8 *frame_body, u32 len, u8 ch) { u8 *ies, *p2p_ie; @@ -3577,11 +3519,12 @@ static void rtw_change_p2pie_ch_list(_adapter *padapter, const u8 *frame_body, u p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); } } +#endif +#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) static bool rtw_chk_p2pie_ch_list_with_buddy(_adapter *padapter, const u8 *frame_body, u32 len) { bool fit = _FALSE; -#ifdef CONFIG_CONCURRENT_MODE u8 *ies, *p2p_ie; u32 ies_len, p2p_ielen; u8 union_ch = rtw_mi_get_union_chan(padapter); @@ -3623,14 +3566,14 @@ static bool rtw_chk_p2pie_ch_list_with_buddy(_adapter *padapter, const u8 *frame /* Get the next P2P IE */ p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); } -#endif + return fit; } +#if defined(CONFIG_P2P_INVITE_IOT) static bool rtw_chk_p2pie_op_ch_with_buddy(_adapter *padapter, const u8 *frame_body, u32 len) { bool fit = _FALSE; -#ifdef CONFIG_CONCURRENT_MODE u8 *ies, *p2p_ie; u32 ies_len, p2p_ielen; u8 union_ch = rtw_mi_get_union_chan(padapter); @@ -3659,13 +3602,13 @@ static bool rtw_chk_p2pie_op_ch_with_buddy(_adapter *padapter, const u8 *frame_b /* Get the next P2P IE */ p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); } -#endif + return fit; } +#endif static void rtw_cfg80211_adjust_p2pie_channel(_adapter *padapter, const u8 *frame_body, u32 len) { -#ifdef CONFIG_CONCURRENT_MODE u8 *ies, *p2p_ie; u32 ies_len, p2p_ielen; u8 union_ch = rtw_mi_get_union_chan(padapter); @@ -3728,8 +3671,8 @@ static void rtw_cfg80211_adjust_p2pie_channel(_adapter *padapter, const u8 *fram } -#endif } +#endif #ifdef CONFIG_WFD u32 rtw_xframe_build_wfd_ie(struct xmit_frame *xframe) @@ -3813,8 +3756,6 @@ u32 rtw_xframe_build_wfd_ie(struct xmit_frame *xframe) bool rtw_xframe_del_wfd_ie(struct xmit_frame *xframe) { #define DBG_XFRAME_DEL_WFD_IE 0 - - _adapter *adapter = xframe->padapter; u8 *frame = xframe->buf_addr + TXDESC_OFFSET; u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr); u8 *frame_tail = frame + xframe->attrib.pktlen; @@ -3861,12 +3802,9 @@ bool rtw_xframe_del_wfd_ie(struct xmit_frame *xframe) void rtw_xframe_chk_wfd_ie(struct xmit_frame *xframe) { _adapter *adapter = xframe->padapter; - u8 *frame = xframe->buf_addr + TXDESC_OFFSET; - u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr); - u8 *frame_tail = frame + xframe->attrib.pktlen; - +#ifdef CONFIG_IOCTL_CFG80211 struct wifidirect_info *wdinfo = &adapter->wdinfo; - struct mlme_priv *mlme = &adapter->mlmepriv; +#endif u8 build = 0; u8 del = 0; @@ -3874,7 +3812,7 @@ void rtw_xframe_chk_wfd_ie(struct xmit_frame *xframe) del = 1; #ifdef CONFIG_IOCTL_CFG80211 - if (_TRUE == wdinfo->wfd_info->wfd_enable) + if (wdinfo->wfd_info->wfd_enable == _TRUE) #endif del = build = 1; @@ -3894,7 +3832,6 @@ u8 *dump_p2p_attr_ch_list(u8 *p2p_ie, uint p2p_ielen, u8 *buf, u32 buf_len) int w_sz = 0; u8 ch_cnt = 0; u8 ch_list[40]; - bool continuous = _FALSE; pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, &attr_contentlen); if (pattr != NULL) { @@ -4353,7 +4290,6 @@ void rtw_init_cfg80211_wifidirect_info(_adapter *padapter) s32 p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType, u8 *buf) { int ret = H2C_SUCCESS; - struct wifidirect_info *pwdinfo = &(padapter->wdinfo); switch (intCmdType) { case P2P_FIND_PHASE_WK: @@ -4430,7 +4366,6 @@ int process_p2p_cross_connect_ie(PADAPTER padapter, u8 *IEs, u32 IELength) u8 p2p_attr[MAX_P2P_IE_LEN] = { 0x00 };/* NoA length should be n*(13) + 2 */ u32 attr_contentlen = 0; - struct wifidirect_info *pwdinfo = &(padapter->wdinfo); if (IELength <= _BEACON_IE_OFFSET_) @@ -4462,7 +4397,7 @@ void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength) u32 ies_len; u8 *p2p_ie; u32 p2p_ielen = 0; - u8 noa_attr[MAX_P2P_IE_LEN] = { 0x00 };/* NoA length should be n*(13) + 2 */ + u8 *noa_attr; /* NoA length should be n*(13) + 2 */ u32 attr_contentlen = 0; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); @@ -4489,7 +4424,8 @@ void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength) while (p2p_ie) { find_p2p = _TRUE; /* Get Notice of Absence IE. */ - if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_NOA, noa_attr, &attr_contentlen)) { + noa_attr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_NOA, NULL, &attr_contentlen); + if (noa_attr) { find_p2p_ps = _TRUE; noa_index = noa_attr[0]; @@ -4502,8 +4438,8 @@ void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength) noa_offset = 2; noa_num = 0; /* NoA length should be n*(13) + 2 */ - if (attr_contentlen > 2) { - while (noa_offset < attr_contentlen) { + if (attr_contentlen > 2 && (attr_contentlen - 2) % 13 == 0) { + while (noa_offset < attr_contentlen && noa_num < P2P_MAX_NOA_NUM) { /* _rtw_memcpy(&wifidirect_info->noa_count[noa_num], &noa_attr[noa_offset], 1); */ pwdinfo->noa_count[noa_num] = noa_attr[noa_offset]; noa_offset += 1; @@ -4553,7 +4489,6 @@ void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct wifidirect_info *pwdinfo = &(padapter->wdinfo); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; u32 ps_deny = 0; /* Pre action for p2p state */ @@ -4731,7 +4666,6 @@ static void pre_tx_scan_timer_process(void *FunctionContext) struct wifidirect_info *pwdinfo = &adapter->wdinfo; _irqL irqL; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; - u8 _status = 0; if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) return; @@ -5045,7 +4979,6 @@ void init_wifidirect_info(_adapter *padapter, enum P2P_ROLE role) #ifdef CONFIG_WFD struct wifi_display_info *pwfd_info = &padapter->wfd_info; #endif - u8 union_ch = 0; pwdinfo = &padapter->wdinfo; pwdinfo->padapter = padapter; @@ -5060,6 +4993,8 @@ void init_wifidirect_info(_adapter *padapter, enum P2P_ROLE role) && pwdinfo->driver_interface != DRIVER_CFG80211 ) { #ifdef CONFIG_CONCURRENT_MODE + u8 union_ch = 0; + if (rtw_mi_check_status(padapter, MI_LINKED)) union_ch = rtw_mi_get_union_chan(padapter); @@ -5195,6 +5130,14 @@ void init_wifidirect_info(_adapter *padapter, enum P2P_ROLE role) pwdinfo->p2p_info.scan_op_ch_only = 0; } +void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) +{ + if (wdinfo->role != role) { + wdinfo->role = role; + rtw_mi_update_iface_status(&(wdinfo->padapter->mlmepriv), 0); + } +} + #ifdef CONFIG_DBG_P2P /** @@ -5343,9 +5286,6 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) struct wifidirect_info *pwdinfo = &(padapter->wdinfo); if (role == P2P_ROLE_DEVICE || role == P2P_ROLE_CLIENT || role == P2P_ROLE_GO) { - u8 channel, ch_offset; - u16 bwmode; - #if defined(CONFIG_CONCURRENT_MODE) && (!defined(RTW_P2P_GROUP_INTERFACE) || !RTW_P2P_GROUP_INTERFACE) /* Commented by Albert 2011/12/30 */ /* The driver just supports 1 P2P group operation. */ @@ -5386,10 +5326,6 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) #endif } else if (role == P2P_ROLE_DISABLE) { -#ifdef CONFIG_INTEL_WIDI - if (padapter->mlmepriv.p2p_reject_disable == _TRUE) - return ret; -#endif /* CONFIG_INTEL_WIDI */ #ifdef CONFIG_IOCTL_CFG80211 if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) @@ -5434,10 +5370,6 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) /* Restore to initial setting. */ update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode); -#ifdef CONFIG_INTEL_WIDI - rtw_reset_widi_info(padapter); -#endif /* CONFIG_INTEL_WIDI */ - /* For WiDi purpose. */ #ifdef CONFIG_IOCTL_CFG80211 pwdinfo->driver_interface = DRIVER_CFG80211; diff --git a/core/rtw_pwrctrl.c b/core/rtw_pwrctrl.c index b80748f..901237a 100644 --- a/core/rtw_pwrctrl.c +++ b/core/rtw_pwrctrl.c @@ -18,13 +18,13 @@ #include #include +#ifdef DBG_CHECK_FW_PS_STATE int rtw_fw_ps_state(PADAPTER padapter) { struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; int ret = _FAIL, dont_care = 0; u16 fw_ps_state = 0; - u32 start_time; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct registry_priv *registry_par = &padapter->registrypriv; @@ -40,6 +40,15 @@ int rtw_fw_ps_state(PADAPTER padapter) , rtw_is_drv_stopped(padapter) ? "True" : "False"); goto exit_fw_ps_state; } + #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) + rtw_hal_get_hwreg(padapter, HW_VAR_FW_PS_STATE, (u8 *)&fw_ps_state); + if ((fw_ps_state & BIT_LPS_STATUS) == 0) + ret = _SUCCESS; + else { + pdbgpriv->dbg_poll_fail_cnt++; + RTW_INFO("%s: fw_ps_state=%04x\n", __FUNCTION__, fw_ps_state); + } + #else rtw_hal_set_hwreg(padapter, HW_VAR_SET_REQ_FW_PS, (u8 *)&dont_care); { /* 4. if 0x88[7]=1, driver set cmd to leave LPS/IPS. */ @@ -58,13 +67,13 @@ int rtw_fw_ps_state(PADAPTER padapter) RTW_INFO("%s: fw_ps_state=%04x\n", __FUNCTION__, fw_ps_state); } } - + #endif exit_fw_ps_state: _exit_pwrlock(&pwrpriv->check_32k_lock); return ret; } - +#endif /*DBG_CHECK_FW_PS_STATE*/ #ifdef CONFIG_IPS void _ips_enter(_adapter *padapter) { @@ -144,8 +153,10 @@ int _ips_leave(_adapter *padapter) int ips_leave(_adapter *padapter) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); +#ifdef DBG_CHECK_FW_PS_STATE struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; +#endif int ret; if (!is_primary_adapter(padapter)) @@ -237,11 +248,6 @@ bool rtw_pwr_unassociated_idle(_adapter *adapter) goto exit; #endif -#ifdef CONFIG_INTEL_PROXIM - if (adapter->proximity.proxim_on == _TRUE) - return; -#endif - if (pxmit_priv->free_xmitbuf_cnt != NR_XMITBUFF || pxmit_priv->free_xmit_extbuf_cnt != NR_XMIT_EXTBUFF) { RTW_PRINT("There are some pkts to transmit\n"); @@ -263,9 +269,6 @@ exit: */ void rtw_ps_processor(_adapter *padapter) { -#ifdef CONFIG_P2P - struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -#endif /* CONFIG_P2P */ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct dvobj_priv *psdpriv = padapter->dvobj; @@ -278,7 +281,7 @@ void rtw_ps_processor(_adapter *padapter) _enter_pwrlock(&adapter_to_pwrctl(padapter)->lock); ps_deny = rtw_ps_deny_get(padapter); _exit_pwrlock(&adapter_to_pwrctl(padapter)->lock); - if ((ps_deny & (~(1<sta_stats; + u64 cur_acc_tx_bytes = 0, cur_acc_rx_bytes = 0; + u32 tx_tp_kbyte = 0, rx_tp_kbyte = 0; + u32 tx_tp_th = 0, rx_tp_th = 0; + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + u8 leave_lps = _FALSE; + + if (tx) { /* from tx */ + cur_acc_tx_bytes = pstats->tx_bytes - pstats->acc_tx_bytes; + tx_tp_kbyte = cur_acc_tx_bytes >> 10; + tx_tp_th = pwrpriv->lps_tx_tp_th * 1024 / 8 * 2; /*KBytes @2s*/ + + if (tx_tp_kbyte >= tx_tp_th || + padapter->mlmepriv.LinkDetectInfo.NumTxOkInPeriod >= pwrpriv->lps_tx_pkts){ + if (pwrpriv->bLeisurePs + && (pwrpriv->pwr_mode != PS_MODE_ACTIVE) + #ifdef CONFIG_BT_COEXIST + && (rtw_btcoex_IsBtControlLps(padapter) == _FALSE) + #endif + ) { + leave_lps = _TRUE; + } + } + + } else { /* from rx path */ + cur_acc_rx_bytes = pstats->rx_bytes - pstats->acc_rx_bytes; + rx_tp_kbyte = cur_acc_rx_bytes >> 10; + rx_tp_th = pwrpriv->lps_rx_tp_th * 1024 / 8 * 2; + + if (rx_tp_kbyte>= rx_tp_th || + padapter->mlmepriv.LinkDetectInfo.NumRxUnicastOkInPeriod >= pwrpriv->lps_rx_pkts) { + if (pwrpriv->bLeisurePs + && (pwrpriv->pwr_mode != PS_MODE_ACTIVE) + #ifdef CONFIG_BT_COEXIST + && (rtw_btcoex_IsBtControlLps(padapter) == _FALSE) + #endif + ) { + leave_lps = _TRUE; + } + } + } + + if (leave_lps) { + #ifdef DBG_LPS_CHK_BY_TP + RTW_INFO("leave lps via %s, ", tx ? "Tx" : "Rx"); + if (tx) + RTW_INFO("Tx = %d [%d] (KB)\n", tx_tp_kbyte, tx_tp_th); + else + RTW_INFO("Rx = %d [%d] (KB)\n", rx_tp_kbyte, rx_tp_th); + #endif + pwrpriv->lps_chk_cnt = pwrpriv->lps_chk_cnt_th; + /* rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 0); */ + rtw_lps_ctrl_wk_cmd(padapter, tx ? LPS_CTRL_TX_TRAFFIC_LEAVE : LPS_CTRL_RX_TRAFFIC_LEAVE, 0); + } +} +#endif /*CONFIG_LPS_CHK_BY_TP*/ + void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets) { -#ifdef CONFIG_CHECK_LEAVE_LPS static systime start_time = 0; static u32 xmit_cnt = 0; u8 bLeaveLPS = _FALSE; @@ -447,65 +510,79 @@ void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets) if (bLeaveLPS) { /* RTW_INFO("leave lps via %s, Tx = %d, Rx = %d\n", tx?"Tx":"Rx", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); */ - /* rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); */ - rtw_lps_ctrl_wk_cmd(padapter, tx ? LPS_CTRL_TX_TRAFFIC_LEAVE : LPS_CTRL_RX_TRAFFIC_LEAVE, tx ? 0 : 1); + /* rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 0); */ + rtw_lps_ctrl_wk_cmd(padapter, tx ? LPS_CTRL_TX_TRAFFIC_LEAVE : LPS_CTRL_RX_TRAFFIC_LEAVE, tx ? RTW_CMDF_DIRECTLY : 0); } -#endif /* CONFIG_CHECK_LEAVE_LPS */ } +#endif /* CONFIG_CHECK_LEAVE_LPS */ #ifdef CONFIG_LPS_LCLK -u8 rtw_cpwm_polling(_adapter *adapter, u8 cpwm_orig) +#define LPS_CPWM_TIMEOUT_MS 10 /*ms*/ +#define LPS_RPWM_RETRY_CNT 3 + +u8 rtw_cpwm_polling(_adapter *adapter, u8 rpwm, u8 cpwm_orig) { - u8 result = _FAIL; - u8 cpwm_now; - u8 poll_cnt = 0; + u8 rst = _FAIL; + u8 cpwm_now = 0; systime start_time; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); + #ifdef DBG_CHECK_FW_PS_STATE struct debug_priv *pdbgpriv = &(adapter_to_dvobj(adapter)->drv_dbg); + #endif - /*RTW_INFO("%s.....\n", __func__);*/ + pwrpriv->rpwm_retry = 0; - start_time = rtw_get_current_time(); - - /* polling cpwm */ do { - rtw_msleep_os(1); - poll_cnt++; - cpwm_now = 0; - rtw_hal_get_hwreg(adapter, HW_VAR_CPWM, &cpwm_now); + start_time = rtw_get_current_time(); + do { + rtw_msleep_os(1); + rtw_hal_get_hwreg(adapter, HW_VAR_CPWM, &cpwm_now); - if ((cpwm_orig ^ cpwm_now) & 0x80) { - pwrpriv->cpwm = PS_STATE_S4; - pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE; - #ifdef DBG_CHECK_FW_PS_STATE - RTW_INFO("%s: polling cpwm OK! poll_cnt=%d, cpwm_orig=%02x, cpwm_now=%02x , 0x100=0x%x\n" - , __func__, poll_cnt, cpwm_orig, cpwm_now, rtw_read8(adapter, REG_CR)); - if (rtw_fw_ps_state(adapter) == _FAIL) { - RTW_INFO("leave 32k but fw state in 32k\n"); - pdbgpriv->dbg_rpwm_toogle_cnt++; + if ((cpwm_orig ^ cpwm_now) & 0x80) { + pwrpriv->cpwm = PS_STATE_S4; + pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE; + rst = _SUCCESS; + break; } - #endif /* DBG_CHECK_FW_PS_STATE */ - result = _SUCCESS; - break; - } + } while (rtw_get_passing_time_ms(start_time) < LPS_CPWM_TIMEOUT_MS && !RTW_CANNOT_RUN(adapter)); - if (rtw_get_passing_time_ms(start_time) > LPS_RPWM_WAIT_MS) { - RTW_ERR("%s: polling cpwm timeout! poll_cnt=%d, cpwm_orig=%02x, cpwm_now=%02x\n" - , __func__, poll_cnt, cpwm_orig, cpwm_now); - #ifdef DBG_CHECK_FW_PS_STATE - if (rtw_fw_ps_state(adapter) == _FAIL) { - RTW_INFO("rpwm timeout and fw ps state in 32k\n"); - pdbgpriv->dbg_rpwm_timeout_fail_cnt++; - } - #endif /* DBG_CHECK_FW_PS_STATE */ - - #ifdef CONFIG_LPS_RPWM_TIMER - _set_timer(&pwrpriv->pwr_rpwm_timer, 1); - #endif /* CONFIG_LPS_RPWM_TIMER */ + if (rst == _SUCCESS) break; + else { + /* rpwm retry */ + cpwm_orig = cpwm_now; + rpwm &= ~PS_TOGGLE; + rpwm |= pwrpriv->tog; + rtw_hal_set_hwreg(adapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm)); + pwrpriv->tog += 0x80; } - } while (1); - return result; + } while (pwrpriv->rpwm_retry++ < LPS_RPWM_RETRY_CNT && !RTW_CANNOT_RUN(adapter)); + + if (rst == _SUCCESS) { + #ifdef DBG_CHECK_FW_PS_STATE + RTW_INFO("%s: polling cpwm OK! rpwm_retry=%d, cpwm_orig=%02x, cpwm_now=%02x , 0x100=0x%x\n" + , __func__, pwrpriv->rpwm_retry, cpwm_orig, cpwm_now, rtw_read8(adapter, REG_CR)); + if (rtw_fw_ps_state(adapter) == _FAIL) { + RTW_INFO("leave 32k but fw state in 32k\n"); + pdbgpriv->dbg_rpwm_toogle_cnt++; + } + #endif /* DBG_CHECK_FW_PS_STATE */ + } else { + RTW_ERR("%s: polling cpwm timeout! rpwm_retry=%d, cpwm_orig=%02x, cpwm_now=%02x\n" + , __func__, pwrpriv->rpwm_retry, cpwm_orig, cpwm_now); + #ifdef DBG_CHECK_FW_PS_STATE + if (rtw_fw_ps_state(adapter) == _FAIL) { + RTW_INFO("rpwm timeout and fw ps state in 32k\n"); + pdbgpriv->dbg_rpwm_timeout_fail_cnt++; + } + #endif /* DBG_CHECK_FW_PS_STATE */ + + #ifdef CONFIG_LPS_RPWM_TIMER + _set_timer(&pwrpriv->pwr_rpwm_timer, 1); + #endif /* CONFIG_LPS_RPWM_TIMER */ + } + + return rst; } #endif /* @@ -517,15 +594,13 @@ u8 rtw_cpwm_polling(_adapter *adapter, u8 cpwm_orig) * pslv power state level, only could be PS_STATE_S0 ~ PS_STATE_S4 * */ -void rtw_set_rpwm(PADAPTER padapter, u8 pslv) +u8 rtw_set_rpwm(PADAPTER padapter, u8 pslv) { - u8 rpwm; + u8 rpwm = 0xFF; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); #ifdef CONFIG_LPS_LCLK u8 cpwm_orig; #endif - struct dvobj_priv *psdpriv = padapter->dvobj; - struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; pslv = PS_STATE(pslv); @@ -541,7 +616,7 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv) #endif || (pwrpriv->lps_level == LPS_NORMAL) ) { - return; + return rpwm; } } @@ -550,12 +625,12 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv) pwrpriv->cpwm = PS_STATE_S4; - return; + return rpwm; } if (rtw_is_drv_stopped(padapter)) if (pslv < PS_STATE_S2) - return; + return rpwm; rpwm = pslv | pwrpriv->tog; #ifdef CONFIG_LPS_LCLK @@ -573,9 +648,16 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv) #endif #if defined(CONFIG_LPS_RPWM_TIMER) && !defined(CONFIG_DETECT_CPWM_BY_POLLING) - if (rpwm & PS_ACK) - _set_timer(&pwrpriv->pwr_rpwm_timer, LPS_RPWM_WAIT_MS); + if (rpwm & PS_ACK) { + #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN) + if (pwrpriv->wowlan_mode != _TRUE && + pwrpriv->wowlan_ap_mode != _TRUE && + pwrpriv->wowlan_p2p_mode != _TRUE) + #endif + _set_timer(&pwrpriv->pwr_rpwm_timer, LPS_CPWM_TIMEOUT_MS); + } #endif /* CONFIG_LPS_RPWM_TIMER & !CONFIG_DETECT_CPWM_BY_POLLING */ + rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm)); pwrpriv->tog += 0x80; @@ -583,14 +665,14 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv) #ifdef CONFIG_LPS_LCLK /* No LPS 32K, No Ack */ if (rpwm & PS_ACK) { -#ifdef CONFIG_DETECT_CPWM_BY_POLLING - rtw_cpwm_polling(padapter, cpwm_orig); + #ifdef CONFIG_DETECT_CPWM_BY_POLLING + rtw_cpwm_polling(padapter, rpwm, cpwm_orig); #else #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN) if (pwrpriv->wowlan_mode == _TRUE || pwrpriv->wowlan_ap_mode == _TRUE || pwrpriv->wowlan_p2p_mode == _TRUE) - rtw_cpwm_polling(padapter, cpwm_orig); + rtw_cpwm_polling(padapter, rpwm, cpwm_orig); #endif /*#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN)*/ #endif /*#ifdef CONFIG_DETECT_CPWM_BY_POLLING*/ } else @@ -599,6 +681,7 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv) pwrpriv->cpwm = pslv; } + return rpwm; } u8 PS_RDY_CHECK(_adapter *padapter) @@ -606,12 +689,6 @@ u8 PS_RDY_CHECK(_adapter *padapter) u32 delta_ms; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -#ifdef CONFIG_P2P - struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -#ifdef CONFIG_IOCTL_CFG80211 - struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; -#endif /* CONFIG_IOCTL_CFG80211 */ -#endif /* CONFIG_P2P */ #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) if (_TRUE == pwrpriv->bInSuspend && pwrpriv->wowlan_mode) @@ -642,6 +719,9 @@ u8 PS_RDY_CHECK(_adapter *padapter) /* TDLS link is established. */ || (padapter->tdlsinfo.link_established == _TRUE) #endif /* CONFIG_TDLS */ + #ifdef CONFIG_DFS_MASTER + || adapter_to_rfctl(padapter)->radar_detect_enabled + #endif ) return _FALSE; @@ -777,9 +857,14 @@ void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable) void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN) struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; +#endif +#ifdef CONFIG_WMMPS_STA struct registry_priv *pregistrypriv = &padapter->registrypriv; +#endif #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); #endif /* CONFIG_P2P */ @@ -822,10 +907,12 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode #endif #ifdef CONFIG_LPS_PG - if ((PS_MODE_ACTIVE != ps_mode) && (pwrpriv->blpspg_info_up)) { - /*rtw_hal_set_lps_pg_info(padapter);*/ - lps_pg_hdl_id = LPS_PG_INFO_CFG; - rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id)); + if ((PS_MODE_ACTIVE != ps_mode) && (pwrpriv->lps_level == LPS_PG)) { + if (pwrpriv->wowlan_mode != _TRUE) { + /*rtw_hal_set_lps_pg_info(padapter);*/ + lps_pg_hdl_id = LPS_PG_INFO_CFG; + rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id)); + } } #endif @@ -907,11 +994,18 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id)); } #endif +#ifdef CONFIG_WOWLAN + if (pwrpriv->wowlan_mode == _TRUE) + rtw_hal_set_hwreg(padapter, HW_VAR_H2C_INACTIVE_IPS, (u8 *)(&ps_mode)); +#endif /* CONFIG_WOWLAN */ + rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); + rtw_hal_set_hwreg(padapter, HW_VAR_LPS_STATE_CHK, (u8 *)(&ps_mode)); + #ifdef CONFIG_LPS_PG if (pwrpriv->lps_level == LPS_PG) { - lps_pg_hdl_id = LPS_PG_RESEND_H2C; + lps_pg_hdl_id = LPS_PG_PHYDM_EN; rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id)); } #endif @@ -936,6 +1030,9 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode #ifdef CONFIG_P2P_WOWLAN || (_TRUE == pwrpriv->wowlan_p2p_mode) #endif /* CONFIG_P2P_WOWLAN */ +#ifdef CONFIG_WOWLAN + || WOWLAN_IS_STA_MIX_MODE(padapter) +#endif /* CONFIG_WOWLAN */ ) { u8 pslv; @@ -974,12 +1071,24 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode pwrpriv->pwr_mode = ps_mode; pwrpriv->smart_ps = smart_ps; pwrpriv->bcn_ant_mode = bcn_ant_mode; +#ifdef CONFIG_LPS_PG + if (pwrpriv->lps_level == LPS_PG) { + lps_pg_hdl_id = LPS_PG_PHYDM_DIS; + rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id)); + } +#endif #ifdef CONFIG_WMMPS_STA pwrpriv->wmm_smart_ps = pregistrypriv->wmm_smart_ps; #endif /* CONFIG_WMMPS_STA */ - rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); + + if (check_fwstate(pmlmepriv, _FW_LINKED)) + rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); +#ifdef CONFIG_WOWLAN + if (pwrpriv->wowlan_mode == _TRUE) + rtw_hal_set_hwreg(padapter, HW_VAR_H2C_INACTIVE_IPS, (u8 *)(&ps_mode)); +#endif /* CONFIG_WOWLAN */ #ifdef CONFIG_P2P_PS /* Set CTWindow after LPS */ @@ -1015,42 +1124,6 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode } -/* - * Return: - * 0: Leave OK - * -1: Timeout - * -2: Other error - */ -s32 LPS_RF_ON_check(PADAPTER padapter, u32 delay_ms) -{ - systime start_time; - u8 bAwake = _FALSE; - s32 err = 0; - - - start_time = rtw_get_current_time(); - while (1) { - rtw_hal_get_hwreg(padapter, HW_VAR_FWLPS_RF_ON, &bAwake); - if (_TRUE == bAwake) - break; - - if (rtw_is_surprise_removed(padapter)) { - err = -2; - RTW_INFO("%s: device surprise removed!!\n", __FUNCTION__); - break; - } - - if (rtw_get_passing_time_ms(start_time) > delay_ms) { - err = -1; - RTW_INFO("%s: Wait for FW LPS leave more than %u ms!!!\n", __FUNCTION__, delay_ms); - break; - } - rtw_usleep_os(100); - } - - return err; -} - /* * Description: * Enter the leisure power save mode. @@ -1059,11 +1132,11 @@ void LPS_Enter(PADAPTER padapter, const char *msg) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - int n_assoc_iface = 0; int i; char buf[32] = {0}; - +#ifdef DBG_LA_MODE + struct registry_priv *registry_par = &(padapter->registrypriv); +#endif /* RTW_INFO("+LeisurePSEnter\n"); */ if (GET_HAL_DATA(padapter)->bFWReady == _FALSE) @@ -1074,12 +1147,14 @@ void LPS_Enter(PADAPTER padapter, const char *msg) return; #endif - /* Skip lps enter request if number of assocated adapters is not 1 */ - for (i = 0; i < dvobj->iface_nums; i++) { - if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE)) - n_assoc_iface++; +#ifdef DBG_LA_MODE + if(registry_par->la_mode_en == 1) { + RTW_INFO("%s LA debug mode lps_leave \n", __func__); + return; } - if (n_assoc_iface != 1) +#endif + /* Skip lps enter request if number of assocated adapters is not 1 */ + if (rtw_mi_get_assoc_if_num(padapter) != 1) return; #ifndef CONFIG_FW_MULTI_PORT_SUPPORT @@ -1093,6 +1168,14 @@ void LPS_Enter(PADAPTER padapter, const char *msg) return; } +#ifdef CONFIG_CLIENT_PORT_CFG + if ((rtw_hal_get_port(padapter) == CLT_PORT_INVALID) || + get_clt_num(padapter) > MAX_CLIENT_PORT_NUM){ + RTW_ERR(ADPT_FMT" cannot get client port or clt num(%d) over than 4\n", ADPT_ARG(padapter), get_clt_num(padapter)); + return; + } +#endif + #ifdef CONFIG_P2P_PS if (padapter->wdinfo.p2p_ps_mode == P2P_PS_NOA) { return;/* supporting p2p client ps NOA via H2C_8723B_P2P_PS_OFFLOAD */ @@ -1136,10 +1219,10 @@ void LPS_Leave(PADAPTER padapter, const char *msg) struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); - u32 start_time; - u8 bAwake = _FALSE; char buf[32] = {0}; +#ifdef DBG_CHECK_FW_PS_STATE struct debug_priv *pdbgpriv = &dvobj->drv_dbg; +#endif /* RTW_INFO("+LeisurePSLeave\n"); */ @@ -1163,9 +1246,6 @@ void LPS_Leave(PADAPTER padapter, const char *msg) #ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS pwrpriv->pwr_saving_time += rtw_get_passing_time_ms(pwrpriv->pwr_saving_start_time); #endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */ - - if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) - LPS_RF_ON_check(padapter, LPS_LEAVE_TIMEOUT_MS); } } @@ -1182,31 +1262,29 @@ void LPS_Leave(PADAPTER padapter, const char *msg) void rtw_wow_lps_level_decide(_adapter *adapter, u8 wow_en) { -#if defined(CONFIG_USB_HCI) && defined(CONFIG_LPS_LCLK) struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); if (wow_en) { pwrpriv->lps_level_bk = pwrpriv->lps_level; - pwrpriv->lps_level = LPS_LCLK; +#ifdef CONFIG_WOWLAN + pwrpriv->lps_level = pwrpriv->wowlan_lps_level; +#endif /* CONFIG_WOWLAN */ } else pwrpriv->lps_level = pwrpriv->lps_level_bk; -#endif } #endif void LeaveAllPowerSaveModeDirect(PADAPTER Adapter) { PADAPTER pri_padapter = GET_PRIMARY_ADAPTER(Adapter); - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter); - struct dvobj_priv *psdpriv = Adapter->dvobj; - struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; +#ifdef CONFIG_LPS_LCLK #ifndef CONFIG_DETECT_CPWM_BY_POLLING - u8 cpwm_orig, cpwm_now; - systime start_time; + u8 cpwm_orig; #endif /* CONFIG_DETECT_CPWM_BY_POLLING */ - + u8 rpwm; +#endif RTW_INFO("%s.....\n", __FUNCTION__); @@ -1229,53 +1307,22 @@ void LeaveAllPowerSaveModeDirect(PADAPTER Adapter) cpwm_orig = 0; rtw_hal_get_hwreg(Adapter, HW_VAR_CPWM, &cpwm_orig); #endif /* CONFIG_DETECT_CPWM_BY_POLLING */ - rtw_set_rpwm(Adapter, PS_STATE_S4); + rpwm = rtw_set_rpwm(Adapter, PS_STATE_S4); #ifndef CONFIG_DETECT_CPWM_BY_POLLING - - start_time = rtw_get_current_time(); - - /* polling cpwm */ - do { - rtw_mdelay_os(1); - - rtw_hal_get_hwreg(Adapter, HW_VAR_CPWM, &cpwm_now); - if ((cpwm_orig ^ cpwm_now) & 0x80) { - pwrpriv->cpwm = PS_STATE_S4; - pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE; -#ifdef DBG_CHECK_FW_PS_STATE - RTW_INFO("%s: polling cpwm OK! cpwm_orig=%02x, cpwm_now=%02x, 0x100=0x%x\n" - , __FUNCTION__, cpwm_orig, cpwm_now, rtw_read8(Adapter, REG_CR)); - if (rtw_fw_ps_state(Adapter) == _FAIL) { - RTW_INFO("%s: leave 32k but fw state in 32k\n", __FUNCTION__); - pdbgpriv->dbg_rpwm_toogle_cnt++; - } -#endif /* DBG_CHECK_FW_PS_STATE */ - break; - } - - if (rtw_get_passing_time_ms(start_time) > LPS_RPWM_WAIT_MS) { - RTW_INFO("%s: polling cpwm timeout! cpwm_orig=%02x, cpwm_now=%02x\n", __FUNCTION__, cpwm_orig, cpwm_now); -#ifdef DBG_CHECK_FW_PS_STATE - if (rtw_fw_ps_state(Adapter) == _FAIL) { - RTW_INFO("rpwm timeout and fw ps state in 32k\n"); - pdbgpriv->dbg_rpwm_timeout_fail_cnt++; - } -#endif /* DBG_CHECK_FW_PS_STATE */ - break; - } - } while (1); + if (rpwm != 0xFF && rpwm & PS_ACK) + rtw_cpwm_polling(Adapter, rpwm, cpwm_orig); #endif /* CONFIG_DETECT_CPWM_BY_POLLING */ _exit_pwrlock(&pwrpriv->lock); -#endif +#endif/*CONFIG_LPS_LCLK*/ #ifdef CONFIG_P2P_PS p2p_ps_wk_cmd(pri_padapter, P2P_PS_DISABLE, 0); #endif /* CONFIG_P2P_PS */ #ifdef CONFIG_LPS - rtw_lps_ctrl_wk_cmd(pri_padapter, LPS_CTRL_LEAVE, 0); + rtw_lps_ctrl_wk_cmd(pri_padapter, LPS_CTRL_LEAVE, RTW_CMDF_DIRECTLY); #endif } else { if (pwrpriv->rf_pwrstate == rf_off) { @@ -1305,34 +1352,28 @@ void LeaveAllPowerSaveModeDirect(PADAPTER Adapter) * Description: Leave all power save mode: LPS, FwLPS, IPS if needed. * Move code to function by tynli. 2010.03.26. * */ -void LeaveAllPowerSaveMode(IN PADAPTER Adapter) +void LeaveAllPowerSaveMode(PADAPTER Adapter) { struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter); - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); u8 enqueue = 0; - int n_assoc_iface = 0; int i; - - /* RTW_INFO("%s.....\n",__FUNCTION__); */ - + #ifndef CONFIG_NEW_NETDEV_HDL if (_FALSE == Adapter->bup) { RTW_INFO(FUNC_ADPT_FMT ": bup=%d Skip!\n", FUNC_ADPT_ARG(Adapter), Adapter->bup); return; } + #endif + +/* RTW_INFO(FUNC_ADPT_FMT "\n", FUNC_ADPT_ARG(Adapter));*/ if (rtw_is_surprise_removed(Adapter)) { RTW_INFO(FUNC_ADPT_FMT ": bSurpriseRemoved=_TRUE Skip!\n", FUNC_ADPT_ARG(Adapter)); return; } - for (i = 0; i < dvobj->iface_nums; i++) { - if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE)) - n_assoc_iface++; - } - - if (n_assoc_iface) { + if (rtw_mi_get_assoc_if_num(Adapter)) { /* connect */ #ifdef CONFIG_LPS_LCLK enqueue = 1; @@ -1349,7 +1390,7 @@ void LeaveAllPowerSaveMode(IN PADAPTER Adapter) #endif /* CONFIG_P2P_PS */ #ifdef CONFIG_LPS - rtw_lps_ctrl_wk_cmd(Adapter, LPS_CTRL_LEAVE, enqueue); + rtw_lps_ctrl_wk_cmd(Adapter, LPS_CTRL_LEAVE, enqueue ? 0 : RTW_CMDF_DIRECTLY); #endif #ifdef CONFIG_LPS_LCLK @@ -1413,7 +1454,7 @@ void LPS_Leave_check( break; if (rtw_get_passing_time_ms(start_time) > 100) { - RTW_INFO("Wait for cpwm event than 100 ms!!!\n"); + RTW_ERR("Wait for cpwm event than 100 ms!!!\n"); break; } rtw_msleep_os(1); @@ -1499,7 +1540,7 @@ static void dma_event_callback(struct work_struct *work) #ifdef CONFIG_LPS_RPWM_TIMER #define DBG_CPWM_CHK_FAIL -#if defined(DBG_CPWM_CHK_FAIL) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)) +#if defined(DBG_CPWM_CHK_FAIL) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)) #define CPU_EXCEPTION_CODE 0xFAFAFAFA static void rtw_cpwm_chk_fail_debug(_adapter *padapter) { @@ -1509,6 +1550,9 @@ static void rtw_cpwm_chk_fail_debug(_adapter *padapter) RTW_INFO("[PS-DBG] Reg_10FC =0x%08x\n", cpu_state); RTW_INFO("[PS-DBG] Reg_10F8 =0x%08x\n", rtw_read32(padapter, 0x10F8)); + RTW_INFO("[PS-DBG] Reg_11F8 =0x%08x\n", rtw_read32(padapter, 0x11F8)); + RTW_INFO("[PS-DBG] Reg_4A4 =0x%08x\n", rtw_read32(padapter, 0x4A4)); + RTW_INFO("[PS-DBG] Reg_4A8 =0x%08x\n", rtw_read32(padapter, 0x4A8)); if (cpu_state == CPU_EXCEPTION_CODE) { RTW_INFO("[PS-DBG] Reg_48C =0x%08x\n", rtw_read32(padapter, 0x48C)); @@ -1518,6 +1562,14 @@ static void rtw_cpwm_chk_fail_debug(_adapter *padapter) RTW_INFO("[PS-DBG] Reg_49C =0x%08x\n", rtw_read32(padapter, 0x49C)); RTW_INFO("[PS-DBG] Reg_4A0 =0x%08x\n", rtw_read32(padapter, 0x4A0)); RTW_INFO("[PS-DBG] Reg_1BC =0x%08x\n", rtw_read32(padapter, 0x1BC)); + + RTW_INFO("[PS-DBG] Reg_008 =0x%08x\n", rtw_read32(padapter, 0x08)); + RTW_INFO("[PS-DBG] Reg_2F0 =0x%08x\n", rtw_read32(padapter, 0x2F0)); + RTW_INFO("[PS-DBG] Reg_2F4 =0x%08x\n", rtw_read32(padapter, 0x2F4)); + RTW_INFO("[PS-DBG] Reg_2F8 =0x%08x\n", rtw_read32(padapter, 0x2F8)); + RTW_INFO("[PS-DBG] Reg_2FC =0x%08x\n", rtw_read32(padapter, 0x2FC)); + + rtw_dump_fifo(RTW_DBGDUMP, padapter, 5, 0, 3072); } } #endif @@ -1543,9 +1595,21 @@ static void rpwmtimeout_workitem_callback(struct work_struct *work) RTW_INFO("%s: rpwm=0x%02X cpwm=0x%02X CPWM done!\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); goto exit; } + + if (pwrpriv->rpwm_retry++ < LPS_RPWM_RETRY_CNT) { + u8 rpwm = (pwrpriv->rpwm | pwrpriv->tog | PS_ACK); + + rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm)); + + pwrpriv->tog += 0x80; + _set_timer(&pwrpriv->pwr_rpwm_timer, LPS_CPWM_TIMEOUT_MS); + goto exit; + } + + pwrpriv->rpwm_retry = 0; _exit_pwrlock(&pwrpriv->lock); -#if defined(DBG_CPWM_CHK_FAIL) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)) +#if defined(DBG_CPWM_CHK_FAIL) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)) RTW_INFO("+%s: rpwm=0x%02X cpwm=0x%02X\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); rtw_cpwm_chk_fail_debug(padapter); #endif @@ -2030,20 +2094,18 @@ void rtw_unregister_evt_alive(PADAPTER padapter) void rtw_init_pwrctrl_priv(PADAPTER padapter) { struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); +#ifdef CONFIG_WOWLAN struct registry_priv *registry_par = &padapter->registrypriv; - +#endif +#ifdef CONFIG_GPIO_WAKEUP u8 val8 = 0; +#endif #if defined(CONFIG_CONCURRENT_MODE) if (!is_primary_adapter(padapter)) return; #endif - -#ifdef PLATFORM_WINDOWS - pwrctrlpriv->pnp_current_pwr_state = NdisDeviceStateD0; -#endif - _init_pwrlock(&pwrctrlpriv->lock); _init_pwrlock(&pwrctrlpriv->check_32k_lock); pwrctrlpriv->rf_pwrstate = rf_on; @@ -2052,6 +2114,15 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter) pwrctrlpriv->lps_enter_cnts = 0; pwrctrlpriv->lps_leave_cnts = 0; pwrctrlpriv->bips_processing = _FALSE; +#ifdef CONFIG_LPS_CHK_BY_TP + pwrctrlpriv->lps_chk_by_tp = padapter->registrypriv.lps_chk_by_tp; + pwrctrlpriv->lps_tx_tp_th = LPS_TX_TP_TH; + pwrctrlpriv->lps_rx_tp_th = LPS_RX_TP_TH; + pwrctrlpriv->lps_bi_tp_th = LPS_BI_TP_TH; + pwrctrlpriv->lps_chk_cnt = pwrctrlpriv->lps_chk_cnt_th = LPS_TP_CHK_CNT; + pwrctrlpriv->lps_tx_pkts = LPS_CHK_PKTS_TX; + pwrctrlpriv->lps_rx_pkts = LPS_CHK_PKTS_RX; +#endif pwrctrlpriv->ips_mode = padapter->registrypriv.ips_mode; pwrctrlpriv->ips_mode_req = padapter->registrypriv.ips_mode; @@ -2074,10 +2145,6 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter) pwrctrlpriv->LpsIdleCount = 0; -#ifdef CONFIG_LPS_PG - pwrctrlpriv->lpspg_rsvd_page_locate = 0; -#endif - /* pwrctrlpriv->FWCtrlPSMode =padapter->registrypriv.power_mgnt; */ /* PS_MODE_MIN; */ if (padapter->registrypriv.mp_mode == 1) pwrctrlpriv->power_mgnt = PS_MODE_ACTIVE ; @@ -2096,6 +2163,10 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter) pwrctrlpriv->dtim = 0; pwrctrlpriv->tog = 0x80; + pwrctrlpriv->rpwm_retry = 0; + + RTW_INFO("%s: IPS_mode=%d, LPS_mode=%d, LPS_level=%d\n", + __func__, pwrctrlpriv->ips_mode, pwrctrlpriv->power_mgnt, pwrctrlpriv->lps_level); #ifdef CONFIG_LPS_LCLK rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&pwrctrlpriv->rpwm)); @@ -2111,6 +2182,14 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter) #endif /* CONFIG_LPS_RPWM_TIMER */ #endif /* CONFIG_LPS_LCLK */ +#ifdef CONFIG_LPS_PG + pwrctrlpriv->lpspg_info.name = "LPSPG_INFO"; + #ifdef CONFIG_RTL8822C + pwrctrlpriv->lpspg_dpk_info.name = "LPSPG_DPK_INFO"; + pwrctrlpriv->lpspg_iqk_info.name = "LPSPG_IQK_INFO"; + #endif +#endif + rtw_init_timer(&pwrctrlpriv->pwr_state_check_timer, padapter, pwr_state_check_handler, padapter); pwrctrlpriv->wowlan_mode = _FALSE; @@ -2131,8 +2210,12 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter) #ifdef CONFIG_GPIO_WAKEUP /*default low active*/ - pwrctrlpriv->is_high_active = HIGH_ACTIVE; - + pwrctrlpriv->is_high_active = HIGH_ACTIVE_DEV2HST; + pwrctrlpriv->hst2dev_high_active = HIGH_ACTIVE_HST2DEV; +#ifdef CONFIG_RTW_ONE_PIN_GPIO + rtw_hal_switch_gpio_wl_ctrl(padapter, WAKEUP_GPIO_IDX, _TRUE); + rtw_hal_set_input_gpio(padapter, WAKEUP_GPIO_IDX); +#else #ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE if (pwrctrlpriv->is_high_active == 0) rtw_hal_set_input_gpio(padapter, WAKEUP_GPIO_IDX); @@ -2144,9 +2227,15 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter) RTW_INFO("%s: set GPIO_%d %d as default.\n", __func__, WAKEUP_GPIO_IDX, val8); #endif /*CONFIG_WAKEUP_GPIO_INPUT_MODE*/ +#endif /* CONFIG_RTW_ONE_PIN_GPIO */ #endif /* CONFIG_GPIO_WAKEUP */ #ifdef CONFIG_WOWLAN + pwrctrlpriv->wowlan_power_mgmt = padapter->registrypriv.wow_power_mgnt; + pwrctrlpriv->wowlan_lps_level = padapter->registrypriv.wow_lps_level; + + RTW_INFO("%s: WOW_LPS_mode=%d, WOW_LPS_level=%d\n", + __func__, pwrctrlpriv->wowlan_power_mgmt, pwrctrlpriv->wowlan_lps_level); if (registry_par->wakeup_event & BIT(1)) pwrctrlpriv->default_patterns_en = _TRUE; @@ -2206,6 +2295,14 @@ void rtw_free_pwrctrl_priv(PADAPTER adapter) #endif #endif /* CONFIG_LPS_LCLK */ +#ifdef CONFIG_LPS_PG + rsvd_page_cache_free(&pwrctrlpriv->lpspg_info); + #ifdef CONFIG_RTL8822C + rsvd_page_cache_free(&pwrctrlpriv->lpspg_dpk_info); + rsvd_page_cache_free(&pwrctrlpriv->lpspg_iqk_info); + #endif +#endif + #ifdef CONFIG_WOWLAN #ifdef CONFIG_PNO_SUPPORT if (pwrctrlpriv->pnlo_info != NULL) @@ -2411,9 +2508,9 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller) struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); struct mlme_priv *pmlmepriv; int ret = _SUCCESS; - int i; systime start = rtw_get_current_time(); + /*RTW_INFO(FUNC_ADPT_FMT "===>\n", FUNC_ADPT_ARG(padapter));*/ /* for LPS */ LeaveAllPowerSaveMode(padapter); @@ -2549,6 +2646,7 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller) exit: if (rtw_time_after(rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms), pwrpriv->ips_deny_time)) pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms); + /*RTW_INFO(FUNC_ADPT_FMT "<===\n", FUNC_ADPT_ARG(padapter));*/ return ret; } @@ -2578,13 +2676,46 @@ int rtw_pm_set_lps_level(_adapter *padapter, u8 level) int ret = 0; struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); + if (level < LPS_LEVEL_MAX) { + if (pwrctrlpriv->lps_level != level) { + #ifdef CONFIG_LPS + if (rtw_lps_ctrl_leave_set_level_cmd(padapter, level, RTW_CMDF_WAIT_ACK) != _SUCCESS) + #endif + pwrctrlpriv->lps_level = level; + } + } else + ret = -EINVAL; + + return ret; +} + +#ifdef CONFIG_WOWLAN +int rtw_pm_set_wow_lps(_adapter *padapter, u8 mode) +{ + int ret = 0; + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); + + if (mode < PS_MODE_NUM) { + if (pwrctrlpriv->wowlan_power_mgmt != mode) + pwrctrlpriv->wowlan_power_mgmt = mode; + } else + ret = -EINVAL; + + return ret; +} +int rtw_pm_set_wow_lps_level(_adapter *padapter, u8 level) +{ + int ret = 0; + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); + if (level < LPS_LEVEL_MAX) - pwrctrlpriv->lps_level = level; + pwrctrlpriv->wowlan_lps_level = level; else ret = -EINVAL; return ret; } +#endif /* CONFIG_WOWLAN */ int rtw_pm_set_ips(_adapter *padapter, u8 mode) { @@ -2611,8 +2742,6 @@ int rtw_pm_set_ips(_adapter *padapter, u8 mode) void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason) { struct pwrctrl_priv *pwrpriv; - s32 ret; - /* RTW_INFO("+" FUNC_ADPT_FMT ": Request PS deny for %d (0x%08X)\n", * FUNC_ADPT_ARG(padapter), reason, BIT(reason)); */ @@ -2671,3 +2800,38 @@ u32 rtw_ps_deny_get(PADAPTER padapter) return deny; } + +static void _rtw_ssmps(_adapter *adapter, struct sta_info *sta) +{ + struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + if (MLME_IS_STA(adapter)) { + issue_action_SM_PS_wait_ack(adapter , get_my_bssid(&(pmlmeinfo->network)), + sta->cmn.sm_ps, 3 , 1); + } + else if (MLME_IS_AP(adapter)) { + + } + rtw_phydm_ra_registed(adapter, sta); +} +void rtw_ssmps_enter(_adapter *adapter, struct sta_info *sta) +{ + if (sta->cmn.sm_ps == SM_PS_STATIC) + return; + + RTW_INFO(ADPT_FMT" STA [" MAC_FMT "]\n", ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr)); + + sta->cmn.sm_ps = SM_PS_STATIC; + _rtw_ssmps(adapter, sta); +} +void rtw_ssmps_leave(_adapter *adapter, struct sta_info *sta) +{ + if (sta->cmn.sm_ps == SM_PS_DISABLE) + return; + + RTW_INFO(ADPT_FMT" STA [" MAC_FMT "] \n", ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr)); + sta->cmn.sm_ps = SM_PS_DISABLE; + _rtw_ssmps(adapter, sta); +} + diff --git a/core/rtw_recv.c b/core/rtw_recv.c index 106c6db..4973832 100644 --- a/core/rtw_recv.c +++ b/core/rtw_recv.c @@ -17,13 +17,6 @@ #include #include -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) - - #error "Shall be Linux or Windows, but not both!\n" - -#endif - - #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS static void rtw_signal_stat_timer_hdl(void *ctx); @@ -44,6 +37,17 @@ u8 signal_stat_calc_profile[SIGNAL_STAT_CALC_PROFILE_MAX][2] = { #endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ +u8 rtw_bridge_tunnel_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 }; +u8 rtw_rfc1042_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 }; +static u8 SNAP_ETH_TYPE_IPX[2] = {0x81, 0x37}; +static u8 SNAP_ETH_TYPE_APPLETALK_AARP[2] = {0x80, 0xf3}; +#ifdef CONFIG_TDLS +static u8 SNAP_ETH_TYPE_TDLS[2] = {0x89, 0x0d}; +#endif + +#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL +int recv_frame_monitor(_adapter *padapter, union recv_frame *rframe); +#endif void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv) { @@ -157,9 +161,19 @@ exit: void rtw_mfree_recv_priv_lock(struct recv_priv *precvpriv); void rtw_mfree_recv_priv_lock(struct recv_priv *precvpriv) { + _rtw_spinlock_free(&precvpriv->lock); #ifdef CONFIG_RECV_THREAD_MODE _rtw_free_sema(&precvpriv->recv_sema); #endif + + _rtw_spinlock_free(&precvpriv->free_recv_queue.lock); + _rtw_spinlock_free(&precvpriv->recv_pending_queue.lock); + + _rtw_spinlock_free(&precvpriv->free_recv_buf_queue.lock); + +#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX + _rtw_spinlock_free(&precvpriv->recv_buf_pending_queue.lock); +#endif /* CONFIG_USE_USB_BUFFER_ALLOC_RX */ } void _rtw_free_recv_priv(struct recv_priv *precvpriv) @@ -764,34 +778,6 @@ union recv_frame *portctrl(_adapter *adapter, union recv_frame *precv_frame) } -sint recv_decache(union recv_frame *precv_frame, u16 *tid_rxseq) -{ - struct sta_info *sta = precv_frame->u.hdr.psta; - - sint tid = precv_frame->u.hdr.attrib.priority; - u16 seq_ctrl = ((precv_frame->u.hdr.attrib.seq_num & 0xffff) << 4) | - (precv_frame->u.hdr.attrib.frag_num & 0xf); - - if (tid > 15) - return _FAIL; - - if (seq_ctrl == tid_rxseq[tid]) { - /* for non-AMPDU case */ - sta->sta_stats.duplicate_cnt++; - - if (sta->sta_stats.duplicate_cnt % 100 == 0) - RTW_INFO("%s: tid=%u seq=%d frag=%d\n", __func__ - , tid, precv_frame->u.hdr.attrib.seq_num - , precv_frame->u.hdr.attrib.frag_num); - - return _FAIL; - } - - tid_rxseq[tid] = seq_ctrl; - - return _SUCCESS; -} - /* VALID_PN_CHK * Return true when PN is legal, otherwise false. * Legal PN: @@ -804,12 +790,10 @@ sint recv_decache(union recv_frame *precv_frame, u16 *tid_rxseq) sint recv_ucast_pn_decache(union recv_frame *precv_frame); sint recv_ucast_pn_decache(union recv_frame *precv_frame) { - _adapter *padapter = precv_frame->u.hdr.adapter; struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; struct sta_info *sta = precv_frame->u.hdr.psta; struct stainfo_rxcache *prxcache = &sta->sta_recvpriv.rxcache; u8 *pdata = precv_frame->u.hdr.rx_data; - u32 data_len = precv_frame->u.hdr.len; sint tid = precv_frame->u.hdr.attrib.priority; u64 tmp_iv_hdr = 0; u64 curr_pn = 0, pkt_pn = 0; @@ -844,18 +828,17 @@ sint recv_bcast_pn_decache(union recv_frame *precv_frame) struct security_priv *psecuritypriv = &padapter->securitypriv; struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; u8 *pdata = precv_frame->u.hdr.rx_data; - u32 data_len = precv_frame->u.hdr.len; u64 tmp_iv_hdr = 0; u64 curr_pn = 0, pkt_pn = 0; u8 key_id; if ((pattrib->encrypt == _AES_) && - (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) { + (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) { tmp_iv_hdr = le64_to_cpu(*(u64*)(pdata + pattrib->hdrlen)); key_id = CCMPH_2_KEYID(tmp_iv_hdr); pkt_pn = CCMPH_2_PN(tmp_iv_hdr); - + curr_pn = le64_to_cpu(*(u64*)psecuritypriv->iv_seq[key_id]); curr_pn &= 0x0000ffffffffffff; @@ -868,13 +851,66 @@ sint recv_bcast_pn_decache(union recv_frame *precv_frame) return _SUCCESS; } +sint recv_decache(union recv_frame *precv_frame) +{ + struct sta_info *psta = precv_frame->u.hdr.psta; + struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; + _adapter *adapter = psta->padapter; + sint tid = pattrib->priority; + u16 seq_ctrl = ((precv_frame->u.hdr.attrib.seq_num & 0xffff) << 4) | + (precv_frame->u.hdr.attrib.frag_num & 0xf); + u16 *prxseq; + + if (tid > 15) + return _FAIL; + + if (pattrib->qos) { + if (IS_MCAST(pattrib->ra)) + prxseq = &psta->sta_recvpriv.bmc_tid_rxseq[tid]; + else + prxseq = &psta->sta_recvpriv.rxcache.tid_rxseq[tid]; + } else { + if (IS_MCAST(pattrib->ra)) { + prxseq = &psta->sta_recvpriv.nonqos_bmc_rxseq; + #ifdef DBG_RX_SEQ + RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" nonqos bmc seq_num:%d\n" + , FUNC_ADPT_ARG(adapter), pattrib->seq_num); + #endif + + } else { + prxseq = &psta->sta_recvpriv.nonqos_rxseq; + #ifdef DBG_RX_SEQ + RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" nonqos seq_num:%d\n" + , FUNC_ADPT_ARG(adapter), pattrib->seq_num); + #endif + } + } + + if (seq_ctrl == *prxseq) { + /* for non-AMPDU case */ + psta->sta_stats.duplicate_cnt++; + + if (psta->sta_stats.duplicate_cnt % 100 == 0) + RTW_INFO("%s: tid=%u seq=%d frag=%d\n", __func__ + , tid, precv_frame->u.hdr.attrib.seq_num + , precv_frame->u.hdr.attrib.frag_num); + + #ifdef DBG_RX_DROP_FRAME + RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recv_decache _FAIL for sta="MAC_FMT"\n" + , FUNC_ADPT_ARG(adapter), MAC_ARG(psta->cmn.mac_addr)); + #endif + return _FAIL; + } + *prxseq = seq_ctrl; + + return _SUCCESS; +} + void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *psta) { #ifdef CONFIG_AP_MODE unsigned char pwrbit; u8 *ptr = precv_frame->u.hdr.rx_data; - struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; - struct sta_priv *pstapriv = &padapter->stapriv; pwrbit = GetPwrMgt(ptr); @@ -902,7 +938,6 @@ void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame, struc { #ifdef CONFIG_AP_MODE struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; - struct sta_priv *pstapriv = &padapter->stapriv; #ifdef CONFIG_TDLS if (!(psta->tdls_sta_state & TDLS_LINKED_STATE)) { @@ -1078,8 +1113,6 @@ void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_in struct stainfo_stats *pstats = NULL; struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; struct recv_priv *precvpriv = &padapter->recvpriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); sz = get_recvframe_len(prframe); precvpriv->rx_bytes += sz; @@ -1118,11 +1151,19 @@ void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_in #ifdef CONFIG_DYNAMIC_SOML rtw_dyn_soml_byte_update(padapter, pattrib->data_rate, sz); #endif +#if defined(CONFIG_CHECK_LEAVE_LPS) && defined(CONFIG_LPS_CHK_BY_TP) + if (adapter_to_pwrctl(padapter)->lps_chk_by_tp) + traffic_check_for_leave_lps_by_tp(padapter, _FALSE, psta); +#endif /* CONFIG_LPS */ + } #ifdef CONFIG_CHECK_LEAVE_LPS - traffic_check_for_leave_lps(padapter, _FALSE, 0); -#endif /* CONFIG_LPS */ +#ifdef CONFIG_LPS_CHK_BY_TP + if (!adapter_to_pwrctl(padapter)->lps_chk_by_tp) +#endif + traffic_check_for_leave_lps(padapter, _FALSE, 0); +#endif /* CONFIG_CHECK_LEAVE_LPS */ } @@ -1354,12 +1395,14 @@ sint ap2sta_data_frame( RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" BSSID="MAC_FMT", mybssid="MAC_FMT"\n" , FUNC_ADPT_ARG(adapter), MAC_ARG(pattrib->bssid), MAC_ARG(mybssid)); #endif - - if (!bmcast) { +#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL + if (!bmcast + && !IS_RADAR_DETECTED(adapter_to_rfctl(adapter)) + ) { RTW_INFO(ADPT_FMT" -issue_deauth to the nonassociated ap=" MAC_FMT " for the reason(7)\n", ADPT_ARG(adapter), MAC_ARG(pattrib->bssid)); issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); } - +#endif ret = _FAIL; goto exit; } @@ -1465,21 +1508,13 @@ sint sta2ap_data_frame( *psta = rtw_get_stainfo(pstapriv, pattrib->ta); if (*psta == NULL) { - #ifdef CONFIG_DFS_MASTER - struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); - - /* prevent RX tasklet blocks cmd_thread */ - if (rfctl->radar_detected == 1) - goto bypass_deauth7; - #endif - - RTW_INFO("issue_deauth to sta=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->src)); - - issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); - -#ifdef CONFIG_DFS_MASTER -bypass_deauth7: + if (!IS_RADAR_DETECTED(adapter_to_rfctl(adapter))) { +#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL + RTW_INFO("issue_deauth to sta=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->src)); + issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); #endif + } + ret = RTW_RX_HANDLED; goto exit; } @@ -1521,8 +1556,10 @@ bypass_deauth7: ret = RTW_RX_HANDLED; goto exit; } +#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL RTW_INFO("issue_deauth to sta=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->src)); issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); +#endif ret = RTW_RX_HANDLED; goto exit; } @@ -1760,7 +1797,7 @@ static sint validate_mgmt_protect(_adapter *adapter, union recv_frame *precv_fra if (subtype == WIFI_ACTION) category = *(ptr + sizeof(struct rtw_ieee80211_hdr_3addr)); - + if (is_bmc) { /* broadcast cases */ if (subtype == WIFI_ACTION) { @@ -1958,56 +1995,11 @@ sint validate_recv_mgnt_frame(PADAPTER padapter, union recv_frame *precv_frame) } } -#ifdef CONFIG_INTEL_PROXIM - if (padapter->proximity.proxim_on == _TRUE) { - struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; - struct recv_stat *prxstat = (struct recv_stat *) precv_frame->u.hdr.rx_head ; - u8 *pda, *psa, *pbssid, *ptr; - ptr = precv_frame->u.hdr.rx_data; - pda = get_da(ptr); - psa = get_sa(ptr); - pbssid = get_hdr_bssid(ptr); - - - _rtw_memcpy(pattrib->dst, pda, ETH_ALEN); - _rtw_memcpy(pattrib->src, psa, ETH_ALEN); - - _rtw_memcpy(pattrib->bssid, pbssid, ETH_ALEN); - - switch (pattrib->to_fr_ds) { - case 0: - _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); - _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); - break; - - case 1: - _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); - _rtw_memcpy(pattrib->ta, pbssid, ETH_ALEN); - break; - - case 2: - _rtw_memcpy(pattrib->ra, pbssid, ETH_ALEN); - _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); - break; - - case 3: - _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); - _rtw_memcpy(pattrib->ta, get_addr2_ptr(ptr), ETH_ALEN); - break; - - default: - break; - - } - pattrib->priority = 0; - pattrib->hdrlen = pattrib->to_fr_ds == 3 ? 30 : 24; - - padapter->proximity.proxim_rx(padapter, precv_frame); - } -#endif mgt_dispatcher(padapter, precv_frame); +#if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) exit: +#endif return _SUCCESS; } @@ -2018,7 +2010,6 @@ sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame) struct sta_info *psta = NULL; u8 *ptr = precv_frame->u.hdr.rx_data; struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; - struct sta_priv *pstapriv = &adapter->stapriv; struct security_priv *psecuritypriv = &adapter->securitypriv; sint ret = _SUCCESS; @@ -2073,7 +2064,9 @@ sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame) break; } +#ifdef CONFIG_RTW_MESH pre_validate_status_chk: +#endif if (ret == _FAIL) { #ifdef DBG_RX_DROP_FRAME RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" case:%d, res:%d, ra="MAC_FMT", ta="MAC_FMT"\n" @@ -2094,7 +2087,7 @@ pre_validate_status_chk: } precv_frame->u.hdr.psta = psta; - + precv_frame->u.hdr.preorder_ctrl = NULL; pattrib->ack_policy = 0; /* parsing QC field */ @@ -2111,21 +2104,19 @@ pre_validate_status_chk: pattrib->hdrlen = WLAN_HDR_A3_LEN + a4_shift; } - if (pattrib->order) /* HT-CTRL 11n */ pattrib->hdrlen += 4; /* decache, drop duplicate recv packets */ + ret = recv_decache(precv_frame); + if (ret == _FAIL) + goto exit; + if (!IS_MCAST(pattrib->ra)) { - precv_frame->u.hdr.preorder_ctrl = &psta->recvreorder_ctrl[pattrib->priority]; - if (recv_decache(precv_frame, psta->sta_recvpriv.rxcache.tid_rxseq) == _FAIL) { - #ifdef DBG_RX_DROP_FRAME - RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recv_decache uc return _FAIL for sta="MAC_FMT"\n" - , FUNC_ADPT_ARG(adapter), MAC_ARG(psta->cmn.mac_addr)); - #endif - ret = _FAIL; - goto exit; - } + + if (pattrib->qos) + precv_frame->u.hdr.preorder_ctrl = &psta->recvreorder_ctrl[pattrib->priority]; + if (recv_ucast_pn_decache(precv_frame) == _FAIL) { #ifdef DBG_RX_DROP_FRAME RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recv_ucast_pn_decache return _FAIL for sta="MAC_FMT"\n" @@ -2135,15 +2126,6 @@ pre_validate_status_chk: goto exit; } } else { - precv_frame->u.hdr.preorder_ctrl = NULL; - if (recv_decache(precv_frame, psta->sta_recvpriv.bmc_tid_rxseq) == _FAIL) { - #ifdef DBG_RX_DROP_FRAME - RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recv_decache bmc return _FAIL for sta="MAC_FMT"\n" - , FUNC_ADPT_ARG(adapter), MAC_ARG(psta->cmn.mac_addr)); - #endif - ret = _FAIL; - goto exit; - } if (recv_bcast_pn_decache(precv_frame) == _FAIL) { #ifdef DBG_RX_DROP_FRAME RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recv_bcast_pn_decache return _FAIL for sta="MAC_FMT"\n" @@ -2378,7 +2360,6 @@ exit: /* remove the wlanhdr and add the eth_hdr */ -#if 1 sint wlanhdr_to_ethhdr(union recv_frame *precvframe) { sint rmv_len; @@ -2462,121 +2443,8 @@ exiting: } -#else - -sint wlanhdr_to_ethhdr(union recv_frame *precvframe) -{ - sint rmv_len; - u16 eth_type; - u8 bsnaphdr; - u8 *psnap_type; - struct ieee80211_snap_hdr *psnap; - - sint ret = _SUCCESS; - _adapter *adapter = precvframe->u.hdr.adapter; - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; - - u8 *ptr = get_recvframe_data(precvframe) ; /* point to frame_ctrl field */ - struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; - struct _vlan *pvlan = NULL; - - - psnap = (struct ieee80211_snap_hdr *)(ptr + pattrib->hdrlen + pattrib->iv_len); - psnap_type = ptr + pattrib->hdrlen + pattrib->iv_len + SNAP_SIZE; - if (psnap->dsap == 0xaa && psnap->ssap == 0xaa && psnap->ctrl == 0x03) { - if (_rtw_memcmp(psnap->oui, oui_rfc1042, WLAN_IEEE_OUI_LEN)) - bsnaphdr = _TRUE; /* wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_RFC1042; */ - else if (_rtw_memcmp(psnap->oui, SNAP_HDR_APPLETALK_DDP, WLAN_IEEE_OUI_LEN) && - _rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_DDP, 2)) - bsnaphdr = _TRUE; /* wlan_pkt_format = WLAN_PKT_FORMAT_APPLETALK; */ - else if (_rtw_memcmp(psnap->oui, oui_8021h, WLAN_IEEE_OUI_LEN)) - bsnaphdr = _TRUE; /* wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_TUNNEL; */ - else { - ret = _FAIL; - goto exit; - } - - } else - bsnaphdr = _FALSE; /* wlan_pkt_format = WLAN_PKT_FORMAT_OTHERS; */ - - rmv_len = pattrib->hdrlen + pattrib->iv_len + (bsnaphdr ? SNAP_SIZE : 0); - - if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) { - ptr += rmv_len ; - *ptr = 0x87; - *(ptr + 1) = 0x12; - - /* back to original pointer */ - ptr -= rmv_len; - } - - ptr += rmv_len ; - - _rtw_memcpy(ð_type, ptr, 2); - eth_type = ntohs((unsigned short)eth_type); /* pattrib->ether_type */ - ptr += 2; - - if (pattrib->encrypt) - recvframe_pull_tail(precvframe, pattrib->icv_len); - - if (eth_type == 0x8100) { /* vlan */ - pvlan = (struct _vlan *) ptr; - - /* eth_type = get_vlan_encap_proto(pvlan); */ - /* eth_type = pvlan->h_vlan_encapsulated_proto; */ /* ? */ - rmv_len += 4; - ptr += 4; - } - - if (eth_type == 0x0800) { /* ip */ - /* struct iphdr* piphdr = (struct iphdr*) ptr; */ - /* __u8 tos = (unsigned char)(pattrib->priority & 0xff); */ - - /* piphdr->tos = tos; */ - - } else if (eth_type == 0x8712) { /* append rx status for mp test packets */ - /* ptr -= 16; */ - /* _rtw_memcpy(ptr, get_rxmem(precvframe), 16); */ - } else { -#ifdef PLATFORM_OS_XP - NDIS_PACKET_8021Q_INFO VlanPriInfo; - UINT32 UserPriority = precvframe->u.hdr.attrib.priority; - UINT32 VlanID = (pvlan != NULL ? get_vlan_id(pvlan) : 0); - - VlanPriInfo.Value = /* Get current value. */ - NDIS_PER_PACKET_INFO_FROM_PACKET(precvframe->u.hdr.pkt, Ieee8021QInfo); - - VlanPriInfo.TagHeader.UserPriority = UserPriority; - VlanPriInfo.TagHeader.VlanId = VlanID ; - - VlanPriInfo.TagHeader.CanonicalFormatId = 0; /* Should be zero. */ - VlanPriInfo.TagHeader.Reserved = 0; /* Should be zero. */ - NDIS_PER_PACKET_INFO_FROM_PACKET(precvframe->u.hdr.pkt, Ieee8021QInfo) = VlanPriInfo.Value; -#endif - } - - if (eth_type == 0x8712) { /* append rx status for mp test packets */ - ptr = recvframe_pull(precvframe, (rmv_len - sizeof(struct ethhdr) + 2) - 24); - _rtw_memcpy(ptr, get_rxmem(precvframe), 24); - ptr += 24; - } else - ptr = recvframe_pull(precvframe, (rmv_len - sizeof(struct ethhdr) + 2)); - - _rtw_memcpy(ptr, pattrib->dst, ETH_ALEN); - _rtw_memcpy(ptr + ETH_ALEN, pattrib->src, ETH_ALEN); - - eth_type = htons((unsigned short)eth_type) ; - _rtw_memcpy(ptr + 12, ð_type, 2); - -exit: - - - return ret; -} -#endif - - #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +#ifndef CONFIG_SDIO_RX_COPY #ifdef PLATFORM_LINUX static void recvframe_expand_pkt( PADAPTER padapter, @@ -2630,9 +2498,10 @@ static void recvframe_expand_pkt( pfhdr->rx_tail = skb_tail_pointer(ppkt); pfhdr->rx_end = skb_end_pointer(ppkt); } -#else +#else /*!= PLATFORM_LINUX*/ #warning "recvframe_expand_pkt not implement, defrag may crash system" #endif +#endif /*#ifndef CONFIG_SDIO_RX_COPY*/ #endif /* perform defrag */ @@ -2654,10 +2523,6 @@ union recv_frame *recvframe_defrag(_adapter *adapter, _queue *defrag_q) plist = get_next(phead); prframe = LIST_CONTAINOR(plist, union recv_frame, u); pfhdr = &prframe->u.hdr; - if (!pfhdr) { - pr_err("pfhdr NULL in %s\n", __func__); - return NULL; - } rtw_list_delete(&(prframe->u.list)); if (curfragnum != pfhdr->attrib.frag_num) { @@ -2840,6 +2705,13 @@ static int rtw_recv_indicatepkt_check(union recv_frame *rframe, u8 *ehdr_pos, u3 _adapter *adapter = rframe->u.hdr.adapter; struct recv_priv *recvpriv = &adapter->recvpriv; struct ethhdr *ehdr = (struct ethhdr *)ehdr_pos; +#ifdef DBG_IP_R_MONITOR + int i; + struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct wlan_network *cur_network = &(pmlmepriv->cur_network); +#endif/*DBG_IP_R_MONITOR*/ int ret = _FAIL; #ifdef CONFIG_WAPI_SUPPORT @@ -2856,7 +2728,11 @@ static int rtw_recv_indicatepkt_check(union recv_frame *rframe, u8 *ehdr_pos, u3 rtw_st_ctl_rx(rframe->u.hdr.psta, ehdr_pos); if (ntohs(ehdr->h_proto) == 0x888e) - RTW_PRINT("recv eapol packet\n"); + parsing_eapol_packet(adapter, ehdr_pos + ETH_HLEN, rframe->u.hdr.psta, 0); +#ifdef DBG_ARP_DUMP + else if (ntohs(ehdr->h_proto) == ETH_P_ARP) + dump_arp_pkt(RTW_DBGDUMP, ehdr->h_dest, ehdr->h_source, ehdr_pos + ETH_HLEN, 0); +#endif if (recvpriv->sink_udpport > 0) rtw_sink_rtp_seq_dbg(adapter, ehdr_pos); @@ -2877,6 +2753,23 @@ static int rtw_recv_indicatepkt_check(union recv_frame *rframe, u8 *ehdr_pos, u3 } #endif +#ifdef DBG_IP_R_MONITOR + #define LEN_ARP_OP_HDR 7 /*ARP OERATION */ + if (ntohs(ehdr->h_proto) == ETH_P_ARP) { + + if(check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE){ + if(ehdr_pos[ETHERNET_HEADER_SIZE+LEN_ARP_OP_HDR] == 2) { + + RTW_INFO("%s,[DBG_ARP] Rx ARP RSP Packet;SeqNum = %d !\n", + __FUNCTION__, pattrib->seq_num); + + dump_arp_pkt(RTW_DBGDUMP, ehdr->h_dest, ehdr->h_source, ehdr_pos + ETH_HLEN, 0); + + } + } + } +#endif/*DBG_IP_R_MONITOR*/ + #ifdef CONFIG_AUTO_AP_MODE if (ntohs(ehdr->h_proto) == 0x8899) rtw_auto_ap_rx_msg_dump(adapter, rframe, ehdr_pos); @@ -2884,7 +2777,9 @@ static int rtw_recv_indicatepkt_check(union recv_frame *rframe, u8 *ehdr_pos, u3 ret = _SUCCESS; +#ifdef CONFIG_WAPI_SUPPORT exit: +#endif return ret; } @@ -2913,6 +2808,7 @@ static void recv_free_fwd_resource(_adapter *adapter, struct xmit_frame *fwd_fra #endif /* CONFIG_RTW_MESH */ } +#ifdef CONFIG_RTW_MESH static void recv_fwd_pkt_hdl(_adapter *adapter, _pkt *pkt , u8 act, struct xmit_frame *fwd_frame, _list *b2u_list) { @@ -2930,7 +2826,6 @@ static void recv_fwd_pkt_hdl(_adapter *adapter, _pkt *pkt } } -#ifdef CONFIG_RTW_MESH #if CONFIG_RTW_MESH_DATA_BMC_TO_UC if (!rtw_is_list_empty(b2u_list)) { _list *list = get_next(b2u_list); @@ -2954,7 +2849,6 @@ static void recv_fwd_pkt_hdl(_adapter *adapter, _pkt *pkt } } #endif -#endif /* CONFIG_RTW_MESH */ if (fwd_frame) { fwd_frame->pkt = fwd_pkt; @@ -2969,6 +2863,7 @@ static void recv_fwd_pkt_hdl(_adapter *adapter, _pkt *pkt exit: return; } +#endif /* CONFIG_RTW_MESH */ int amsdu_to_msdu(_adapter *padapter, union recv_frame *prframe) { @@ -3105,7 +3000,6 @@ move_to_next: static int recv_process_mpdu(_adapter *padapter, union recv_frame *prframe) { - struct recv_priv *precvpriv = &padapter->recvpriv; _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; int ret; @@ -3462,7 +3356,6 @@ static int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ct static int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe) { _irqL irql; - int retval = _SUCCESS; struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; struct recv_reorder_ctrl *preorder_ctrl = prframe->u.hdr.preorder_ctrl; _queue *ppending_recvframe_queue = preorder_ctrl ? &preorder_ctrl->pending_recvframe_queue : NULL; @@ -3616,27 +3509,50 @@ int validate_mp_recv_frame(_adapter *adapter, union recv_frame *precv_frame) struct mp_priv *pmppriv = &adapter->mppriv; struct mp_tx *pmptx; unsigned char *sa , *da, *bs; - + struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; + u32 i = 0; + u8 rtk_prefix[]={0x52, 0x65, 0x61, 0x6C, 0x4C, 0x6F, 0x76, 0x65, 0x54, 0x65, 0x6B}; + u8 *prx_data; pmptx = &pmppriv->tx; -#if 0 - if (1) { - u8 bDumpRxPkt; + + if (pmppriv->mplink_brx == _FALSE) { + + u8 bDumpRxPkt = 0; type = GetFrameType(ptr); subtype = get_frame_sub_type(ptr); /* bit(7)~bit(2) */ - rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_RXPKT, &(bDumpRxPkt)); + RTW_INFO("hdr len = %d iv_len=%d \n", pattrib->hdrlen , pattrib->iv_len); + prx_data = ptr + pattrib->hdrlen + pattrib->iv_len; + + for (i = 0; i < precv_frame->u.hdr.len; i++) { + if (precv_frame->u.hdr.len < (11 + i)) + break; + + if (_rtw_memcmp(prx_data + i, (void *)&rtk_prefix, 11) == _FALSE) { + bDumpRxPkt = 0; + RTW_DBG("prx_data = %02X != rtk_prefix[%d] = %02X \n", *(prx_data + i), i , rtk_prefix[i]); + } else { + bDumpRxPkt = 1; + RTW_DBG("prx_data = %02X = rtk_prefix[%d] = %02X \n", *(prx_data + i), i , rtk_prefix[i]); + break; + } + } + if (bDumpRxPkt == 1) { /* dump all rx packets */ int i; RTW_INFO("############ type:0x%02x subtype:0x%02x #################\n", type, subtype); - for (i = 0; i < 64; i = i + 8) + for (i = 0; i < precv_frame->u.hdr.len; i = i + 8) RTW_INFO("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr + i), *(ptr + i + 1), *(ptr + i + 2) , *(ptr + i + 3) , *(ptr + i + 4), *(ptr + i + 5), *(ptr + i + 6), *(ptr + i + 7)); - RTW_INFO("#############################\n"); + RTW_INFO("#############################\n"); + _rtw_memset(pmppriv->mplink_buf, '\0' , sizeof(pmppriv->mplink_buf)); + _rtw_memcpy(pmppriv->mplink_buf, ptr, precv_frame->u.hdr.len); + pmppriv->mplink_rx_len = precv_frame->u.hdr.len; + pmppriv->mplink_brx =_TRUE; } } -#endif if (pmppriv->bloopback) { if (_rtw_memcmp(ptr + 24, pmptx->buf + 24, precv_frame->u.hdr.len - 24) == _FALSE) { RTW_INFO("Compare payload content Fail !!!\n"); @@ -3681,7 +3597,6 @@ static sint MPwlanhdr_to_ethhdr(union recv_frame *precvframe) sint ret = _SUCCESS; _adapter *adapter = precvframe->u.hdr.adapter; - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; u8 *ptr = get_recvframe_data(precvframe) ; /* point to frame_ctrl field */ struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; @@ -3749,7 +3664,6 @@ int mp_recv_frame(_adapter *padapter, union recv_frame *rframe) { int ret = _SUCCESS; struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; - struct recv_priv *precvpriv = &padapter->recvpriv; _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; #ifdef CONFIG_MP_INCLUDED struct mlme_priv *pmlmepriv = &padapter->mlmepriv; @@ -3927,8 +3841,6 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, #endif sint ret = _SUCCESS; - _adapter *adapter = precvframe->u.hdr.adapter; - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); @@ -3999,9 +3911,9 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, rt_len += 1; /* rate */ - if (pattrib->data_rate < 12) { + if (pattrib->data_rate <= DESC_RATE54M) { rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_RATE); - if (pattrib->data_rate < 4) { + if (pattrib->data_rate <= DESC_RATE11M) { /* CCK */ hdr_buf[rt_len] = data_rate[pattrib->data_rate]; } else { @@ -4021,13 +3933,13 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, /* channel flags */ tmp_16bit = 0; - if (pHalData->current_band_type == 0) + if (pHalData->current_band_type == BAND_ON_2_4G) tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_2GHZ); - else + else /*BAND_ON_5G*/ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_5GHZ); - if (pattrib->data_rate < 12) { - if (pattrib->data_rate < 4) { + if (pattrib->data_rate <= DESC_RATE54M) { + if (pattrib->data_rate <= DESC_RATE11M) { /* CCK */ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_CCK); } else { @@ -4070,7 +3982,7 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, rt_len += 2; /* MCS information */ - if (pattrib->data_rate >= 12 && pattrib->data_rate < 44) { + if (pattrib->data_rate >= DESC_RATEMCS0 && pattrib->data_rate <= DESC_RATEMCS31) { rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_MCS); /* known, flag */ hdr_buf[rt_len] |= BIT1; /* MCS index known */ @@ -4095,7 +4007,7 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, } /* VHT */ - if (pattrib->data_rate >= 44 && pattrib->data_rate < 84) { + if (pattrib->data_rate >= DESC_RATEVHTSS1MCS0 && pattrib->data_rate <= DESC_RATEVHTSS4MCS9) { rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_VHT); /* known 16 bit, flag 8 bit */ @@ -4137,16 +4049,16 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, rt_len += 1; /* mcs_nss */ - if (pattrib->data_rate >= 44 && pattrib->data_rate < 54) { + if (pattrib->data_rate >= DESC_RATEVHTSS1MCS0 && pattrib->data_rate <= DESC_RATEVHTSS1MCS9) { hdr_buf[rt_len] |= 1; hdr_buf[rt_len] |= data_rate[pattrib->data_rate] << 4; - } else if (pattrib->data_rate >= 54 && pattrib->data_rate < 64) { + } else if (pattrib->data_rate >= DESC_RATEVHTSS2MCS0 && pattrib->data_rate <= DESC_RATEVHTSS2MCS9) { hdr_buf[rt_len + 1] |= 2; hdr_buf[rt_len + 1] |= data_rate[pattrib->data_rate] << 4; - } else if (pattrib->data_rate >= 64 && pattrib->data_rate < 74) { + } else if (pattrib->data_rate >= DESC_RATEVHTSS3MCS0 && pattrib->data_rate <= DESC_RATEVHTSS3MCS9) { hdr_buf[rt_len + 2] |= 3; hdr_buf[rt_len + 2] |= data_rate[pattrib->data_rate] << 4; - } else if (pattrib->data_rate >= 74 && pattrib->data_rate < 84) { + } else if (pattrib->data_rate >= DESC_RATEVHTSS4MCS0 && pattrib->data_rate <= DESC_RATEVHTSS4MCS9) { hdr_buf[rt_len + 3] |= 4; hdr_buf[rt_len + 3] |= data_rate[pattrib->data_rate] << 4; } @@ -4177,6 +4089,7 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, ptr = skb_push(pskb, rt_len); if (ptr) { rtap_hdr->it_len = cpu_to_le16(rt_len); + rtap_hdr->it_present = cpu_to_le32(rtap_hdr->it_present); memcpy(ptr, rtap_hdr, rt_len); } else ret = _FAIL; @@ -4188,8 +4101,8 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, int recv_frame_monitor(_adapter *padapter, union recv_frame *rframe) { int ret = _SUCCESS; - struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; - struct recv_priv *precvpriv = &padapter->recvpriv; + //struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; + //struct recv_priv *precvpriv = &padapter->recvpriv; _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; _pkt *pskb = NULL; @@ -4199,13 +4112,14 @@ int recv_frame_monitor(_adapter *padapter, union recv_frame *rframe) pskb->data = rframe->u.hdr.rx_data; skb_set_tail_pointer(pskb, rframe->u.hdr.len); +#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL /* fill radiotap header */ if (fill_radiotap_hdr(padapter, rframe, (u8 *)pskb) == _FAIL) { ret = _FAIL; rtw_free_recvframe(rframe, pfree_recv_queue); /* free this recv_frame */ goto exit; } - +#endif /* write skb information to recv frame */ skb_reset_mac_header(pskb); rframe->u.hdr.len = pskb->len; @@ -4235,8 +4149,9 @@ exit: int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe) { int ret = _SUCCESS; +#ifdef DBG_RX_COUNTER_DUMP struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; - struct recv_priv *precvpriv = &padapter->recvpriv; +#endif _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; #ifdef DBG_RX_COUNTER_DUMP @@ -4383,7 +4298,10 @@ int recv_func(_adapter *padapter, union recv_frame *rframe) struct recv_priv *recvpriv = &padapter->recvpriv; struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_priv *mlmepriv = &padapter->mlmepriv; - +#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL + u8 type; + u8 *ptr = rframe->u.hdr.rx_data; +#endif if (check_fwstate(mlmepriv, WIFI_MONITOR_STATE)) { /* monitor mode */ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) @@ -4392,7 +4310,18 @@ int recv_func(_adapter *padapter, union recv_frame *rframe) ret = _SUCCESS; goto exit; } else - + {} +#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL + type = GetFrameType(ptr); + if ((type == WIFI_DATA_TYPE)&& check_fwstate(mlmepriv, WIFI_STATION_STATE)) { + struct wlan_network *cur_network = &(mlmepriv->cur_network); + if ( _rtw_memcmp(get_addr2_ptr(ptr), cur_network->network.MacAddress, ETH_ALEN)==0) { + recv_frame_monitor(padapter, rframe); + ret = _SUCCESS; + goto exit; + } + } +#endif /* check if need to handle uc_swdec_pending_queue*/ if (check_fwstate(mlmepriv, WIFI_STATION_STATE) && psecuritypriv->busetkipkey) { union recv_frame *pending_frame; @@ -4579,10 +4508,11 @@ set_timer: static void rx_process_rssi(_adapter *padapter, union recv_frame *prframe) { - u32 last_rssi, tmp_val; struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS struct signal_stat *signal_stat = &padapter->recvpriv.signal_strength_data; +#else /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ + u32 last_rssi, tmp_val; #endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ /* RTW_INFO("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->recv_signal_power,pattrib->signal_strength); */ @@ -4629,10 +4559,11 @@ static void rx_process_rssi(_adapter *padapter, union recv_frame *prframe) static void rx_process_link_qual(_adapter *padapter, union recv_frame *prframe) { - u32 last_evm = 0, tmpVal; struct rx_pkt_attrib *pattrib; #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS struct signal_stat *signal_stat; +#else /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ + u32 last_evm = 0, tmpVal; #endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ if (prframe == NULL || padapter == NULL) @@ -4786,19 +4717,34 @@ void rx_query_phy_status( { precvframe->u.hdr.psta = NULL; - if ((!MLME_IS_MESH(padapter) && pkt_info.is_packet_match_bssid) - || (MLME_IS_MESH(padapter) && psta) - || padapter->registrypriv.mp_mode == 1 - ) { - if (psta) { - precvframe->u.hdr.psta = psta; + if (padapter->registrypriv.mp_mode != 1) { + if ((!MLME_IS_MESH(padapter) && pkt_info.is_packet_match_bssid) + || (MLME_IS_MESH(padapter) && psta)) { + if (psta) { + precvframe->u.hdr.psta = psta; + rx_process_phy_info(padapter, precvframe); + } + } else if (pkt_info.is_packet_to_self || pkt_info.is_packet_beacon) { + if (psta) + precvframe->u.hdr.psta = psta; rx_process_phy_info(padapter, precvframe); } - } else if (pkt_info.is_packet_to_self || pkt_info.is_packet_beacon) { - - if (psta) - precvframe->u.hdr.psta = psta; - rx_process_phy_info(padapter, precvframe); + } else { +#ifdef CONFIG_MP_INCLUDED + if (padapter->mppriv.brx_filter_beacon == _TRUE) { + if (pkt_info.is_packet_beacon) { + RTW_INFO("in MP Rx is_packet_beacon\n"); + if (psta) + precvframe->u.hdr.psta = psta; + rx_process_phy_info(padapter, precvframe); + } + } else +#endif + { + if (psta) + precvframe->u.hdr.psta = psta; + rx_process_phy_info(padapter, precvframe); + } } } @@ -4849,9 +4795,9 @@ s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status) u8 *pbuf = precvframe->u.hdr.rx_data; u8 *pda = get_ra(pbuf); u8 ra_is_bmc = IS_MCAST(pda); + _adapter *primary_padapter = precvframe->u.hdr.adapter; #ifdef CONFIG_CONCURRENT_MODE _adapter *iface = NULL; - _adapter *primary_padapter = precvframe->u.hdr.adapter; #ifdef CONFIG_MP_INCLUDED if (rtw_mp_mode_check(primary_padapter)) @@ -4861,6 +4807,10 @@ s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status) if (ra_is_bmc == _FALSE) { /*unicast packets*/ iface = rtw_get_iface_by_macddr(primary_padapter , pda); if (NULL == iface) { + #ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + if (_rtw_memcmp(pda, adapter_pno_mac_addr(primary_padapter), + ETH_ALEN) != _TRUE) + #endif RTW_INFO("%s [WARN] Cannot find appropriate adapter - mac_addr : "MAC_FMT"\n", __func__, MAC_ARG(pda)); /*rtw_warn_on(1);*/ } else @@ -4869,13 +4819,14 @@ s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status) rtw_mi_buddy_clone_bcmc_packet(primary_padapter, precvframe, pphy_status); bypass_concurrent_hdl: #endif /* CONFIG_CONCURRENT_MODE */ - - /* skip unnecessary bmc data frame for primary adapter */ - if (ra_is_bmc == _TRUE && GetFrameType(pbuf) == WIFI_DATA_TYPE - && !adapter_allow_bmc_data_rx(precvframe->u.hdr.adapter) - ) { - rtw_free_recvframe(precvframe, &precvframe->u.hdr.adapter->recvpriv.free_recv_queue); - goto exit; + if (primary_padapter->registrypriv.mp_mode != 1) { + /* skip unnecessary bmc data frame for primary adapter */ + if (ra_is_bmc == _TRUE && GetFrameType(pbuf) == WIFI_DATA_TYPE + && !adapter_allow_bmc_data_rx(precvframe->u.hdr.adapter) + ) { + rtw_free_recvframe(precvframe, &precvframe->u.hdr.adapter->recvpriv.free_recv_queue); + goto exit; + } } if (pphy_status) @@ -4892,11 +4843,13 @@ thread_return rtw_recv_thread(thread_context context) _adapter *adapter = (_adapter *)context; struct recv_priv *recvpriv = &adapter->recvpriv; s32 err = _SUCCESS; +#ifdef RTW_RECV_THREAD_HIGH_PRIORITY #ifdef PLATFORM_LINUX struct sched_param param = { .sched_priority = 1 }; sched_setscheduler(current, SCHED_FIFO, ¶m); #endif /* PLATFORM_LINUX */ +#endif /*RTW_RECV_THREAD_HIGH_PRIORITY*/ thread_enter("RTW_RECV_THREAD"); RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(adapter)); diff --git a/core/rtw_rf.c b/core/rtw_rf.c index 728ee75..e78e0ee 100644 --- a/core/rtw_rf.c +++ b/core/rtw_rf.c @@ -204,7 +204,6 @@ struct center_chs_ent_t center_chs_5g_by_bw[] = { */ u8 rtw_get_scch_by_cch_offset(u8 cch, u8 bw, u8 offset) { - int i; u8 t_cch = 0; if (bw == CHANNEL_WIDTH_20) { @@ -470,7 +469,6 @@ bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo) u8 c_ch; u32 freq; u32 hi_ret = 0, lo_ret = 0; - int i; bool valid = _FALSE; if (hi) @@ -567,533 +565,6 @@ const u8 _rf_type_to_rf_rx_cnt[] = { 1, /*RF_TYPE_MAX*/ }; -#ifdef CONFIG_80211AC_VHT -#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) , .en_11ac = (_val) -#else -#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) -#endif - -#if RTW_DEF_MODULE_REGULATORY_CERT -#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) , .def_module_flags = (_val) -#else -#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) -#endif - -/* has def_module_flags specified, used by common map and HAL dfference map */ -#define COUNTRY_CHPLAN_ENT(_alpha2, _chplan, _en_11ac, _def_module_flags) \ - {.alpha2 = (_alpha2), .chplan = (_chplan) \ - COUNTRY_CHPLAN_ASSIGN_EN_11AC(_en_11ac) \ - COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_def_module_flags) \ - } - -#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP - -#include "../platform/custom_country_chplan.h" - -#elif RTW_DEF_MODULE_REGULATORY_CERT - -/* leave def_module_flags empty, def_module_flags check is done on country_chplan_map */ -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AE_HMC_M2) /* 2013 certify */ -static const struct country_chplan RTL8821AE_HMC_M2_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("CL", 0x30, 1, 0), /* Chile */ - COUNTRY_CHPLAN_ENT("CN", 0x51, 1, 0), /* China */ - COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ - COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ - COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ - COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ - COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ - COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ - COUNTRY_CHPLAN_ENT("MY", 0x47, 1, 0), /* Malaysia */ - COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ - COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ - COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ - COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ - COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AU) /* 2014 certify */ -static const struct country_chplan RTL8821AU_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AENF_NGFF) /* 2014 certify */ -static const struct country_chplan RTL8812AENF_NGFF_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AEBT_HMC) /* 2013 certify */ -static const struct country_chplan RTL8812AEBT_HMC_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8188EE_HMC_M2) /* 2012 certify */ -static const struct country_chplan RTL8188EE_HMC_M2_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */ - COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0), /* Barbados */ - COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ - COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ - COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ - COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ - COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ - COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0), /* Haiti */ - COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ - COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ - COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ - COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ - COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ - COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ - COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0), /* Seychelles */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ - COUNTRY_CHPLAN_ENT("VC", 0x34, 1, 0), /* Saint Vincent and the Grenadines */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BE_HMC_M2) /* 2013 certify */ -static const struct country_chplan RTL8723BE_HMC_M2_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */ - COUNTRY_CHPLAN_ENT("BS", 0x34, 1, 0), /* Bahamas */ - COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ - COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ - COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ - COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ - COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ - COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ - COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ - COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ - COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ - COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ - COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BS_NGFF1216) /* 2014 certify */ -static const struct country_chplan RTL8723BS_NGFF1216_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0), /* Barbados */ - COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ - COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ - COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ - COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ - COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ - COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0), /* Haiti */ - COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ - COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ - COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ - COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ - COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ - COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8192EEBT_HMC_M2) /* 2013 certify */ -static const struct country_chplan RTL8192EEBT_HMC_M2_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */ - COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ - COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ - COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ - COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ - COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ - COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ - COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ - COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ - COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ - COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ - COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ - COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0), /* Seychelles */ - COUNTRY_CHPLAN_ENT("ST", 0x34, 1, 0), /* Sao Tome and Principe */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723DE_NGFF1630) /* 2016 certify */ -static const struct country_chplan RTL8723DE_NGFF1630_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("CA", 0x2A, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8822BE) /* 2016 certify */ -static const struct country_chplan RTL8822BE_country_chplan_exc_map[] = { -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821CE) /* 2016 certify */ -static const struct country_chplan RTL8821CE_country_chplan_exc_map[] = { -}; -#endif - -/** - * rtw_def_module_get_chplan_from_country - - * @country_code: string of country code - * @return: - * Return NULL for case referring to common map - */ -static const struct country_chplan *rtw_def_module_get_chplan_from_country(const char *country_code) -{ - const struct country_chplan *ent = NULL; - const struct country_chplan *hal_map = NULL; - u16 hal_map_sz = 0; - int i; - - /* TODO: runtime selection for multi driver */ -#if (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AE_HMC_M2) - hal_map = RTL8821AE_HMC_M2_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8821AE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AU) - hal_map = RTL8821AU_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8821AU_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AENF_NGFF) - hal_map = RTL8812AENF_NGFF_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8812AENF_NGFF_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AEBT_HMC) - hal_map = RTL8812AEBT_HMC_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8812AEBT_HMC_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8188EE_HMC_M2) - hal_map = RTL8188EE_HMC_M2_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8188EE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BE_HMC_M2) - hal_map = RTL8723BE_HMC_M2_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8723BE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BS_NGFF1216) - hal_map = RTL8723BS_NGFF1216_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8723BS_NGFF1216_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8192EEBT_HMC_M2) - hal_map = RTL8192EEBT_HMC_M2_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8192EEBT_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723DE_NGFF1630) - hal_map = RTL8723DE_NGFF1630_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8723DE_NGFF1630_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8822BE) - hal_map = RTL8822BE_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8822BE_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821CE) - hal_map = RTL8821CE_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8821CE_country_chplan_exc_map) / sizeof(struct country_chplan); -#endif - - if (hal_map == NULL || hal_map_sz == 0) - goto exit; - - for (i = 0; i < hal_map_sz; i++) { - if (strncmp(country_code, hal_map[i].alpha2, 2) == 0) { - ent = &hal_map[i]; - break; - } - } - -exit: - return ent; -} -#endif /* CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP or RTW_DEF_MODULE_REGULATORY_CERT */ - -static const struct country_chplan country_chplan_map[] = { - COUNTRY_CHPLAN_ENT("AD", 0x26, 1, 0x000), /* Andorra */ - COUNTRY_CHPLAN_ENT("AE", 0x26, 1, 0x7FB), /* United Arab Emirates */ - COUNTRY_CHPLAN_ENT("AF", 0x42, 1, 0x000), /* Afghanistan */ - COUNTRY_CHPLAN_ENT("AG", 0x26, 1, 0x000), /* Antigua & Barbuda */ - COUNTRY_CHPLAN_ENT("AI", 0x26, 1, 0x000), /* Anguilla(UK) */ - COUNTRY_CHPLAN_ENT("AL", 0x26, 1, 0x7F1), /* Albania */ - COUNTRY_CHPLAN_ENT("AM", 0x26, 1, 0x6B0), /* Armenia */ - COUNTRY_CHPLAN_ENT("AN", 0x26, 1, 0x7F1), /* Netherlands Antilles */ - COUNTRY_CHPLAN_ENT("AO", 0x47, 1, 0x6E0), /* Angola */ - COUNTRY_CHPLAN_ENT("AQ", 0x26, 1, 0x000), /* Antarctica */ - COUNTRY_CHPLAN_ENT("AR", 0x61, 1, 0x7F3), /* Argentina */ - COUNTRY_CHPLAN_ENT("AS", 0x76, 1, 0x000), /* American Samoa */ - COUNTRY_CHPLAN_ENT("AT", 0x26, 1, 0x7FB), /* Austria */ - COUNTRY_CHPLAN_ENT("AU", 0x45, 1, 0x7FB), /* Australia */ - COUNTRY_CHPLAN_ENT("AW", 0x76, 1, 0x0B0), /* Aruba */ - COUNTRY_CHPLAN_ENT("AZ", 0x26, 1, 0x7F1), /* Azerbaijan */ - COUNTRY_CHPLAN_ENT("BA", 0x26, 1, 0x7F1), /* Bosnia & Herzegovina */ - COUNTRY_CHPLAN_ENT("BB", 0x76, 1, 0x650), /* Barbados */ - COUNTRY_CHPLAN_ENT("BD", 0x26, 1, 0x7F1), /* Bangladesh */ - COUNTRY_CHPLAN_ENT("BE", 0x26, 1, 0x7FB), /* Belgium */ - COUNTRY_CHPLAN_ENT("BF", 0x26, 1, 0x6B0), /* Burkina Faso */ - COUNTRY_CHPLAN_ENT("BG", 0x26, 1, 0x7F1), /* Bulgaria */ - COUNTRY_CHPLAN_ENT("BH", 0x47, 1, 0x7F1), /* Bahrain */ - COUNTRY_CHPLAN_ENT("BI", 0x26, 1, 0x6B0), /* Burundi */ - COUNTRY_CHPLAN_ENT("BJ", 0x26, 1, 0x6B0), /* Benin */ - COUNTRY_CHPLAN_ENT("BN", 0x47, 1, 0x610), /* Brunei */ - COUNTRY_CHPLAN_ENT("BO", 0x73, 1, 0x7F1), /* Bolivia */ - COUNTRY_CHPLAN_ENT("BR", 0x62, 1, 0x7F1), /* Brazil */ - COUNTRY_CHPLAN_ENT("BS", 0x76, 1, 0x620), /* Bahamas */ - COUNTRY_CHPLAN_ENT("BW", 0x26, 1, 0x6F1), /* Botswana */ - COUNTRY_CHPLAN_ENT("BY", 0x26, 1, 0x7F1), /* Belarus */ - COUNTRY_CHPLAN_ENT("BZ", 0x76, 1, 0x000), /* Belize */ - COUNTRY_CHPLAN_ENT("CA", 0x2B, 1, 0x7FB), /* Canada */ - COUNTRY_CHPLAN_ENT("CC", 0x26, 1, 0x000), /* Cocos (Keeling) Islands (Australia) */ - COUNTRY_CHPLAN_ENT("CD", 0x26, 1, 0x6B0), /* Congo, Republic of the */ - COUNTRY_CHPLAN_ENT("CF", 0x26, 1, 0x6B0), /* Central African Republic */ - COUNTRY_CHPLAN_ENT("CG", 0x26, 1, 0x6B0), /* Congo, Democratic Republic of the. Zaire */ - COUNTRY_CHPLAN_ENT("CH", 0x26, 1, 0x7FB), /* Switzerland */ - COUNTRY_CHPLAN_ENT("CI", 0x26, 1, 0x7F1), /* Cote d'Ivoire */ - COUNTRY_CHPLAN_ENT("CK", 0x26, 1, 0x000), /* Cook Islands */ - COUNTRY_CHPLAN_ENT("CL", 0x2D, 1, 0x7F1), /* Chile */ - COUNTRY_CHPLAN_ENT("CM", 0x26, 1, 0x6B0), /* Cameroon */ - COUNTRY_CHPLAN_ENT("CN", 0x48, 1, 0x7FB), /* China */ - COUNTRY_CHPLAN_ENT("CO", 0x76, 1, 0x7F1), /* Colombia */ - COUNTRY_CHPLAN_ENT("CR", 0x76, 1, 0x7F1), /* Costa Rica */ - COUNTRY_CHPLAN_ENT("CV", 0x26, 1, 0x6B0), /* Cape Verde */ - COUNTRY_CHPLAN_ENT("CX", 0x45, 1, 0x000), /* Christmas Island (Australia) */ - COUNTRY_CHPLAN_ENT("CY", 0x26, 1, 0x7FB), /* Cyprus */ - COUNTRY_CHPLAN_ENT("CZ", 0x26, 1, 0x7FB), /* Czech Republic */ - COUNTRY_CHPLAN_ENT("DE", 0x26, 1, 0x7FB), /* Germany */ - COUNTRY_CHPLAN_ENT("DJ", 0x26, 1, 0x680), /* Djibouti */ - COUNTRY_CHPLAN_ENT("DK", 0x26, 1, 0x7FB), /* Denmark */ - COUNTRY_CHPLAN_ENT("DM", 0x76, 1, 0x000), /* Dominica */ - COUNTRY_CHPLAN_ENT("DO", 0x76, 1, 0x7F1), /* Dominican Republic */ - COUNTRY_CHPLAN_ENT("DZ", 0x26, 1, 0x7F1), /* Algeria */ - COUNTRY_CHPLAN_ENT("EC", 0x76, 1, 0x7F1), /* Ecuador */ - COUNTRY_CHPLAN_ENT("EE", 0x26, 1, 0x7FB), /* Estonia */ - COUNTRY_CHPLAN_ENT("EG", 0x47, 1, 0x7F1), /* Egypt */ - COUNTRY_CHPLAN_ENT("EH", 0x47, 1, 0x680), /* Western Sahara */ - COUNTRY_CHPLAN_ENT("ER", 0x26, 1, 0x000), /* Eritrea */ - COUNTRY_CHPLAN_ENT("ES", 0x26, 1, 0x7FB), /* Spain, Canary Islands, Ceuta, Melilla */ - COUNTRY_CHPLAN_ENT("ET", 0x26, 1, 0x4B0), /* Ethiopia */ - COUNTRY_CHPLAN_ENT("FI", 0x26, 1, 0x7FB), /* Finland */ - COUNTRY_CHPLAN_ENT("FJ", 0x76, 1, 0x600), /* Fiji */ - COUNTRY_CHPLAN_ENT("FK", 0x26, 1, 0x000), /* Falkland Islands (Islas Malvinas) (UK) */ - COUNTRY_CHPLAN_ENT("FM", 0x76, 1, 0x000), /* Micronesia, Federated States of (USA) */ - COUNTRY_CHPLAN_ENT("FO", 0x26, 1, 0x000), /* Faroe Islands (Denmark) */ - COUNTRY_CHPLAN_ENT("FR", 0x26, 1, 0x7FB), /* France */ - COUNTRY_CHPLAN_ENT("GA", 0x26, 1, 0x6B0), /* Gabon */ - COUNTRY_CHPLAN_ENT("GB", 0x26, 1, 0x7FB), /* Great Britain (United Kingdom; England) */ - COUNTRY_CHPLAN_ENT("GD", 0x34, 1, 0x0B0), /* Grenada */ - COUNTRY_CHPLAN_ENT("GE", 0x26, 1, 0x600), /* Georgia */ - COUNTRY_CHPLAN_ENT("GF", 0x26, 1, 0x080), /* French Guiana */ - COUNTRY_CHPLAN_ENT("GG", 0x26, 1, 0x000), /* Guernsey (UK) */ - COUNTRY_CHPLAN_ENT("GH", 0x26, 1, 0x7F1), /* Ghana */ - COUNTRY_CHPLAN_ENT("GI", 0x26, 1, 0x600), /* Gibraltar (UK) */ - COUNTRY_CHPLAN_ENT("GL", 0x26, 1, 0x600), /* Greenland (Denmark) */ - COUNTRY_CHPLAN_ENT("GM", 0x26, 1, 0x6B0), /* Gambia */ - COUNTRY_CHPLAN_ENT("GN", 0x26, 1, 0x610), /* Guinea */ - COUNTRY_CHPLAN_ENT("GP", 0x26, 1, 0x600), /* Guadeloupe (France) */ - COUNTRY_CHPLAN_ENT("GQ", 0x26, 1, 0x6B0), /* Equatorial Guinea */ - COUNTRY_CHPLAN_ENT("GR", 0x26, 1, 0x7FB), /* Greece */ - COUNTRY_CHPLAN_ENT("GS", 0x26, 1, 0x000), /* South Georgia and the Sandwich Islands (UK) */ - COUNTRY_CHPLAN_ENT("GT", 0x61, 1, 0x7F1), /* Guatemala */ - COUNTRY_CHPLAN_ENT("GU", 0x76, 1, 0x600), /* Guam (USA) */ - COUNTRY_CHPLAN_ENT("GW", 0x26, 1, 0x6B0), /* Guinea-Bissau */ - COUNTRY_CHPLAN_ENT("GY", 0x44, 1, 0x000), /* Guyana */ - COUNTRY_CHPLAN_ENT("HK", 0x26, 1, 0x7FB), /* Hong Kong */ - COUNTRY_CHPLAN_ENT("HM", 0x45, 1, 0x000), /* Heard and McDonald Islands (Australia) */ - COUNTRY_CHPLAN_ENT("HN", 0x32, 1, 0x7F1), /* Honduras */ - COUNTRY_CHPLAN_ENT("HR", 0x26, 1, 0x7F9), /* Croatia */ - COUNTRY_CHPLAN_ENT("HT", 0x76, 1, 0x650), /* Haiti */ - COUNTRY_CHPLAN_ENT("HU", 0x26, 1, 0x7FB), /* Hungary */ - COUNTRY_CHPLAN_ENT("ID", 0x3D, 0, 0x7F3), /* Indonesia */ - COUNTRY_CHPLAN_ENT("IE", 0x26, 1, 0x7FB), /* Ireland */ - COUNTRY_CHPLAN_ENT("IL", 0x47, 1, 0x7F1), /* Israel */ - COUNTRY_CHPLAN_ENT("IM", 0x26, 1, 0x000), /* Isle of Man (UK) */ - COUNTRY_CHPLAN_ENT("IN", 0x48, 1, 0x7F1), /* India */ - COUNTRY_CHPLAN_ENT("IQ", 0x26, 1, 0x000), /* Iraq */ - COUNTRY_CHPLAN_ENT("IR", 0x26, 0, 0x000), /* Iran */ - COUNTRY_CHPLAN_ENT("IS", 0x26, 1, 0x7FB), /* Iceland */ - COUNTRY_CHPLAN_ENT("IT", 0x26, 1, 0x7FB), /* Italy */ - COUNTRY_CHPLAN_ENT("JE", 0x26, 1, 0x000), /* Jersey (UK) */ - COUNTRY_CHPLAN_ENT("JM", 0x51, 1, 0x7F1), /* Jamaica */ - COUNTRY_CHPLAN_ENT("JO", 0x49, 1, 0x7FB), /* Jordan */ - COUNTRY_CHPLAN_ENT("JP", 0x27, 1, 0x7FF), /* Japan- Telec */ - COUNTRY_CHPLAN_ENT("KE", 0x47, 1, 0x7F9), /* Kenya */ - COUNTRY_CHPLAN_ENT("KG", 0x26, 1, 0x7F1), /* Kyrgyzstan */ - COUNTRY_CHPLAN_ENT("KH", 0x26, 1, 0x7F1), /* Cambodia */ - COUNTRY_CHPLAN_ENT("KI", 0x26, 1, 0x000), /* Kiribati */ - COUNTRY_CHPLAN_ENT("KN", 0x76, 1, 0x000), /* Saint Kitts and Nevis */ - COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0x7FB), /* South Korea */ - COUNTRY_CHPLAN_ENT("KW", 0x47, 1, 0x7FB), /* Kuwait */ - COUNTRY_CHPLAN_ENT("KY", 0x76, 1, 0x000), /* Cayman Islands (UK) */ - COUNTRY_CHPLAN_ENT("KZ", 0x26, 1, 0x700), /* Kazakhstan */ - COUNTRY_CHPLAN_ENT("LA", 0x26, 1, 0x000), /* Laos */ - COUNTRY_CHPLAN_ENT("LB", 0x26, 1, 0x7F1), /* Lebanon */ - COUNTRY_CHPLAN_ENT("LC", 0x76, 1, 0x000), /* Saint Lucia */ - COUNTRY_CHPLAN_ENT("LI", 0x26, 1, 0x7FB), /* Liechtenstein */ - COUNTRY_CHPLAN_ENT("LK", 0x26, 1, 0x7F1), /* Sri Lanka */ - COUNTRY_CHPLAN_ENT("LR", 0x26, 1, 0x6B0), /* Liberia */ - COUNTRY_CHPLAN_ENT("LS", 0x26, 1, 0x7F1), /* Lesotho */ - COUNTRY_CHPLAN_ENT("LT", 0x26, 1, 0x7FB), /* Lithuania */ - COUNTRY_CHPLAN_ENT("LU", 0x26, 1, 0x7FB), /* Luxembourg */ - COUNTRY_CHPLAN_ENT("LV", 0x26, 1, 0x7FB), /* Latvia */ - COUNTRY_CHPLAN_ENT("LY", 0x26, 1, 0x000), /* Libya */ - COUNTRY_CHPLAN_ENT("MA", 0x47, 1, 0x7F1), /* Morocco */ - COUNTRY_CHPLAN_ENT("MC", 0x26, 1, 0x7FB), /* Monaco */ - COUNTRY_CHPLAN_ENT("MD", 0x26, 1, 0x7F1), /* Moldova */ - COUNTRY_CHPLAN_ENT("ME", 0x26, 1, 0x7F1), /* Montenegro */ - COUNTRY_CHPLAN_ENT("MF", 0x76, 1, 0x000), /* Saint Martin */ - COUNTRY_CHPLAN_ENT("MG", 0x26, 1, 0x620), /* Madagascar */ - COUNTRY_CHPLAN_ENT("MH", 0x76, 1, 0x000), /* Marshall Islands (USA) */ - COUNTRY_CHPLAN_ENT("MK", 0x26, 1, 0x7F1), /* Republic of Macedonia (FYROM) */ - COUNTRY_CHPLAN_ENT("ML", 0x26, 1, 0x6B0), /* Mali */ - COUNTRY_CHPLAN_ENT("MM", 0x26, 1, 0x000), /* Burma (Myanmar) */ - COUNTRY_CHPLAN_ENT("MN", 0x26, 1, 0x000), /* Mongolia */ - COUNTRY_CHPLAN_ENT("MO", 0x26, 1, 0x600), /* Macau */ - COUNTRY_CHPLAN_ENT("MP", 0x76, 1, 0x000), /* Northern Mariana Islands (USA) */ - COUNTRY_CHPLAN_ENT("MQ", 0x26, 1, 0x640), /* Martinique (France) */ - COUNTRY_CHPLAN_ENT("MR", 0x26, 1, 0x6A0), /* Mauritania */ - COUNTRY_CHPLAN_ENT("MS", 0x26, 1, 0x000), /* Montserrat (UK) */ - COUNTRY_CHPLAN_ENT("MT", 0x26, 1, 0x7FB), /* Malta */ - COUNTRY_CHPLAN_ENT("MU", 0x26, 1, 0x6B0), /* Mauritius */ - COUNTRY_CHPLAN_ENT("MV", 0x47, 1, 0x000), /* Maldives */ - COUNTRY_CHPLAN_ENT("MW", 0x26, 1, 0x6B0), /* Malawi */ - COUNTRY_CHPLAN_ENT("MX", 0x61, 1, 0x7F1), /* Mexico */ - COUNTRY_CHPLAN_ENT("MY", 0x63, 1, 0x7F1), /* Malaysia */ - COUNTRY_CHPLAN_ENT("MZ", 0x26, 1, 0x7F1), /* Mozambique */ - COUNTRY_CHPLAN_ENT("NA", 0x26, 1, 0x700), /* Namibia */ - COUNTRY_CHPLAN_ENT("NC", 0x26, 1, 0x000), /* New Caledonia */ - COUNTRY_CHPLAN_ENT("NE", 0x26, 1, 0x6B0), /* Niger */ - COUNTRY_CHPLAN_ENT("NF", 0x45, 1, 0x000), /* Norfolk Island (Australia) */ - COUNTRY_CHPLAN_ENT("NG", 0x75, 1, 0x7F9), /* Nigeria */ - COUNTRY_CHPLAN_ENT("NI", 0x76, 1, 0x7F1), /* Nicaragua */ - COUNTRY_CHPLAN_ENT("NL", 0x26, 1, 0x7FB), /* Netherlands */ - COUNTRY_CHPLAN_ENT("NO", 0x26, 1, 0x7FB), /* Norway */ - COUNTRY_CHPLAN_ENT("NP", 0x47, 1, 0x6F0), /* Nepal */ - COUNTRY_CHPLAN_ENT("NR", 0x26, 1, 0x000), /* Nauru */ - COUNTRY_CHPLAN_ENT("NU", 0x45, 1, 0x000), /* Niue */ - COUNTRY_CHPLAN_ENT("NZ", 0x45, 1, 0x7FB), /* New Zealand */ - COUNTRY_CHPLAN_ENT("OM", 0x26, 1, 0x7F9), /* Oman */ - COUNTRY_CHPLAN_ENT("PA", 0x76, 1, 0x7F1), /* Panama */ - COUNTRY_CHPLAN_ENT("PE", 0x76, 1, 0x7F1), /* Peru */ - COUNTRY_CHPLAN_ENT("PF", 0x26, 1, 0x000), /* French Polynesia (France) */ - COUNTRY_CHPLAN_ENT("PG", 0x26, 1, 0x7F1), /* Papua New Guinea */ - COUNTRY_CHPLAN_ENT("PH", 0x26, 1, 0x7F1), /* Philippines */ - COUNTRY_CHPLAN_ENT("PK", 0x51, 1, 0x7F1), /* Pakistan */ - COUNTRY_CHPLAN_ENT("PL", 0x26, 1, 0x7FB), /* Poland */ - COUNTRY_CHPLAN_ENT("PM", 0x26, 1, 0x000), /* Saint Pierre and Miquelon (France) */ - COUNTRY_CHPLAN_ENT("PR", 0x76, 1, 0x7F1), /* Puerto Rico */ - COUNTRY_CHPLAN_ENT("PT", 0x26, 1, 0x7FB), /* Portugal */ - COUNTRY_CHPLAN_ENT("PW", 0x76, 1, 0x000), /* Palau */ - COUNTRY_CHPLAN_ENT("PY", 0x76, 1, 0x7F1), /* Paraguay */ - COUNTRY_CHPLAN_ENT("QA", 0x51, 1, 0x7F9), /* Qatar */ - COUNTRY_CHPLAN_ENT("RE", 0x26, 1, 0x000), /* Reunion (France) */ - COUNTRY_CHPLAN_ENT("RO", 0x26, 1, 0x7F1), /* Romania */ - COUNTRY_CHPLAN_ENT("RS", 0x26, 1, 0x7F1), /* Serbia, Kosovo */ - COUNTRY_CHPLAN_ENT("RU", 0x59, 1, 0x7FB), /* Russia(fac/gost), Kaliningrad */ - COUNTRY_CHPLAN_ENT("RW", 0x26, 1, 0x0B0), /* Rwanda */ - COUNTRY_CHPLAN_ENT("SA", 0x26, 1, 0x7FB), /* Saudi Arabia */ - COUNTRY_CHPLAN_ENT("SB", 0x26, 1, 0x000), /* Solomon Islands */ - COUNTRY_CHPLAN_ENT("SC", 0x76, 1, 0x690), /* Seychelles */ - COUNTRY_CHPLAN_ENT("SE", 0x26, 1, 0x7FB), /* Sweden */ - COUNTRY_CHPLAN_ENT("SG", 0x26, 1, 0x7FB), /* Singapore */ - COUNTRY_CHPLAN_ENT("SH", 0x26, 1, 0x000), /* Saint Helena (UK) */ - COUNTRY_CHPLAN_ENT("SI", 0x26, 1, 0x7FB), /* Slovenia */ - COUNTRY_CHPLAN_ENT("SJ", 0x26, 1, 0x000), /* Svalbard (Norway) */ - COUNTRY_CHPLAN_ENT("SK", 0x26, 1, 0x7FB), /* Slovakia */ - COUNTRY_CHPLAN_ENT("SL", 0x26, 1, 0x6B0), /* Sierra Leone */ - COUNTRY_CHPLAN_ENT("SM", 0x26, 1, 0x000), /* San Marino */ - COUNTRY_CHPLAN_ENT("SN", 0x26, 1, 0x7F1), /* Senegal */ - COUNTRY_CHPLAN_ENT("SO", 0x26, 1, 0x000), /* Somalia */ - COUNTRY_CHPLAN_ENT("SR", 0x74, 1, 0x000), /* Suriname */ - COUNTRY_CHPLAN_ENT("ST", 0x76, 1, 0x680), /* Sao Tome and Principe */ - COUNTRY_CHPLAN_ENT("SV", 0x30, 1, 0x7F1), /* El Salvador */ - COUNTRY_CHPLAN_ENT("SX", 0x76, 1, 0x000), /* Sint Marteen */ - COUNTRY_CHPLAN_ENT("SZ", 0x26, 1, 0x020), /* Swaziland */ - COUNTRY_CHPLAN_ENT("TC", 0x26, 1, 0x000), /* Turks and Caicos Islands (UK) */ - COUNTRY_CHPLAN_ENT("TD", 0x26, 1, 0x6B0), /* Chad */ - COUNTRY_CHPLAN_ENT("TF", 0x26, 1, 0x680), /* French Southern and Antarctic Lands (FR Southern Territories) */ - COUNTRY_CHPLAN_ENT("TG", 0x26, 1, 0x6B0), /* Togo */ - COUNTRY_CHPLAN_ENT("TH", 0x26, 1, 0x7F1), /* Thailand */ - COUNTRY_CHPLAN_ENT("TJ", 0x26, 1, 0x640), /* Tajikistan */ - COUNTRY_CHPLAN_ENT("TK", 0x45, 1, 0x000), /* Tokelau */ - COUNTRY_CHPLAN_ENT("TM", 0x26, 1, 0x000), /* Turkmenistan */ - COUNTRY_CHPLAN_ENT("TN", 0x47, 1, 0x7F1), /* Tunisia */ - COUNTRY_CHPLAN_ENT("TO", 0x26, 1, 0x000), /* Tonga */ - COUNTRY_CHPLAN_ENT("TR", 0x26, 1, 0x7F1), /* Turkey, Northern Cyprus */ - COUNTRY_CHPLAN_ENT("TT", 0x42, 1, 0x3F1), /* Trinidad & Tobago */ - COUNTRY_CHPLAN_ENT("TW", 0x76, 1, 0x7FF), /* Taiwan */ - COUNTRY_CHPLAN_ENT("TZ", 0x26, 1, 0x6F0), /* Tanzania */ - COUNTRY_CHPLAN_ENT("UA", 0x36, 1, 0x7FB), /* Ukraine */ - COUNTRY_CHPLAN_ENT("UG", 0x26, 1, 0x6F1), /* Uganda */ - COUNTRY_CHPLAN_ENT("US", 0x76, 1, 0x7FF), /* United States of America (USA) */ - COUNTRY_CHPLAN_ENT("UY", 0x30, 1, 0x7F1), /* Uruguay */ - COUNTRY_CHPLAN_ENT("UZ", 0x47, 1, 0x6F0), /* Uzbekistan */ - COUNTRY_CHPLAN_ENT("VA", 0x26, 1, 0x000), /* Holy See (Vatican City) */ - COUNTRY_CHPLAN_ENT("VC", 0x76, 1, 0x010), /* Saint Vincent and the Grenadines */ - COUNTRY_CHPLAN_ENT("VE", 0x30, 1, 0x7F1), /* Venezuela */ - COUNTRY_CHPLAN_ENT("VI", 0x76, 1, 0x000), /* United States Virgin Islands (USA) */ - COUNTRY_CHPLAN_ENT("VN", 0x26, 1, 0x7F1), /* Vietnam */ - COUNTRY_CHPLAN_ENT("VU", 0x26, 1, 0x000), /* Vanuatu */ - COUNTRY_CHPLAN_ENT("WF", 0x26, 1, 0x000), /* Wallis and Futuna (France) */ - COUNTRY_CHPLAN_ENT("WS", 0x76, 1, 0x000), /* Samoa */ - COUNTRY_CHPLAN_ENT("YE", 0x26, 1, 0x040), /* Yemen */ - COUNTRY_CHPLAN_ENT("YT", 0x26, 1, 0x680), /* Mayotte (France) */ - COUNTRY_CHPLAN_ENT("ZA", 0x26, 1, 0x7F1), /* South Africa */ - COUNTRY_CHPLAN_ENT("ZM", 0x26, 1, 0x6B0), /* Zambia */ - COUNTRY_CHPLAN_ENT("ZW", 0x26, 1, 0x7F1), /* Zimbabwe */ -}; - -/* -* rtw_get_chplan_from_country - -* @country_code: string of country code -* -* Return pointer of struct country_chplan entry or NULL when unsupported country_code is given -*/ -const struct country_chplan *rtw_get_chplan_from_country(const char *country_code) -{ -#if RTW_DEF_MODULE_REGULATORY_CERT - const struct country_chplan *exc_ent = NULL; -#endif - const struct country_chplan *ent = NULL; - const struct country_chplan *map = NULL; - u16 map_sz = 0; - char code[2]; - int i; - - code[0] = alpha_to_upper(country_code[0]); - code[1] = alpha_to_upper(country_code[1]); - -#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP - map = CUSTOMIZED_country_chplan_map; - map_sz = sizeof(CUSTOMIZED_country_chplan_map) / sizeof(struct country_chplan); -#else - #if RTW_DEF_MODULE_REGULATORY_CERT - exc_ent = rtw_def_module_get_chplan_from_country(code); - #endif - map = country_chplan_map; - map_sz = sizeof(country_chplan_map) / sizeof(struct country_chplan); -#endif - - for (i = 0; i < map_sz; i++) { - if (strncmp(code, map[i].alpha2, 2) == 0) { - ent = &map[i]; - break; - } - } - -exit: - #if RTW_DEF_MODULE_REGULATORY_CERT - if (!ent || !(COUNTRY_CHPLAN_DEF_MODULE_FALGS(ent) & RTW_DEF_MODULE_REGULATORY_CERT)) - exc_ent = ent = NULL; - if (exc_ent) - ent = exc_ent; - #endif - - return ent; -} - const char *const _regd_str[] = { "NONE", "FCC", @@ -1106,7 +577,7 @@ const char *const _regd_str[] = { "WW", }; -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT void _dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl) { struct regd_exc_ent *ent; @@ -1223,7 +694,6 @@ struct regd_exc_ent *_rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *co break; } -exit: if (match) return ent; else @@ -1292,9 +762,10 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter) RTW_PRINT_SEL(sel, "txpwr_lmt_2g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_2g_cck_ofdm_state); #ifdef CONFIG_IEEE80211_BAND_5GHZ - if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) + if (IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) { RTW_PRINT_SEL(sel, "txpwr_lmt_5g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_5g_cck_ofdm_state); RTW_PRINT_SEL(sel, "txpwr_lmt_5g_20_40_ref:0x%02x\n", rfctl->txpwr_lmt_5g_20_40_ref); + } #endif RTW_PRINT_SEL(sel, "\n"); @@ -1331,7 +802,7 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter) continue; if (bw > CHANNEL_WIDTH_40 && tlrs == TXPWR_LMT_RS_HT) continue; - if (tlrs == TXPWR_LMT_RS_VHT && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) + if (tlrs == TXPWR_LMT_RS_VHT && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) continue; for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) { @@ -1403,13 +874,13 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter) ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); cur = get_next(cur); - sprintf(fmt, "%%%zus%%s ", strlen(ent->regd_name) < 4 ? 5 - strlen(ent->regd_name) : 1); + sprintf(fmt, "%%%zus%%s ", strlen(ent->regd_name) >= 6 ? 1 : 6 - strlen(ent->regd_name)); snprintf(tmp_str, TMP_STR_LEN, fmt , strcmp(ent->regd_name, rfctl->regd_name) == 0 ? "*" : "" , ent->regd_name); _RTW_PRINT_SEL(sel, "%s", tmp_str); } - sprintf(fmt, "%%%zus%%s ", strlen(regd_str(TXPWR_LMT_WW)) < 4 ? 5 - strlen(regd_str(TXPWR_LMT_WW)) : 1); + sprintf(fmt, "%%%zus%%s ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? 1 : 6 - strlen(regd_str(TXPWR_LMT_WW))); snprintf(tmp_str, TMP_STR_LEN, fmt , strcmp(rfctl->regd_name, regd_str(TXPWR_LMT_WW)) == 0 ? "*" : "" , regd_str(TXPWR_LMT_WW)); @@ -1456,45 +927,41 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter) ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); cur = get_next(cur); lmt = phy_get_txpwr_lmt_abs(adapter, ent->regd_name, band, bw, tlrs, ntx_idx, ch, 0); - if (lmt == MAX_POWER_INDEX) { - sprintf(fmt, "%%%zus ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) + 1 : 5); + if (lmt == hal_spec->txgi_max) { + sprintf(fmt, "%%%zus ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) + 1 : 6); snprintf(tmp_str, TMP_STR_LEN, fmt, "NA"); _RTW_PRINT_SEL(sel, "%s", tmp_str); - } else { - if (lmt == -1) { /* -0.5 */ - sprintf(fmt, "%%%zus ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) + 1 : 5); - snprintf(tmp_str, TMP_STR_LEN, fmt, "-0.5"); - _RTW_PRINT_SEL(sel, "%s", tmp_str); - } else if (lmt % 2) { /* n.5 */ - sprintf(fmt, "%%%zud.5 ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) - 1 : 3); - snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / 2); - _RTW_PRINT_SEL(sel, "%s", tmp_str); - } else { /* n */ - sprintf(fmt, "%%%zud ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) + 1 : 5); - snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / 2); - _RTW_PRINT_SEL(sel, "%s", tmp_str); - } + } else if (lmt > -hal_spec->txgi_pdbm && lmt < 0) { /* -0.xx */ + sprintf(fmt, "%%%zus-0.%%d ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) - 4 : 1); + snprintf(tmp_str, TMP_STR_LEN, fmt, "", (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); + _RTW_PRINT_SEL(sel, "%s", tmp_str); + } else if (lmt % hal_spec->txgi_pdbm) { /* d.xx */ + sprintf(fmt, "%%%zud.%%d ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) - 2 : 3); + snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm, (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); + _RTW_PRINT_SEL(sel, "%s", tmp_str); + } else { /* d */ + sprintf(fmt, "%%%zud ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) + 1 : 6); + snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm); + _RTW_PRINT_SEL(sel, "%s", tmp_str); } } lmt = phy_get_txpwr_lmt_abs(adapter, regd_str(TXPWR_LMT_WW), band, bw, tlrs, ntx_idx, ch, 0); - if (lmt == MAX_POWER_INDEX) { - sprintf(fmt, "%%%zus ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 5); + if (lmt == hal_spec->txgi_max) { + sprintf(fmt, "%%%zus ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 6); snprintf(tmp_str, TMP_STR_LEN, fmt, "NA"); _RTW_PRINT_SEL(sel, "%s", tmp_str); - } else { - if (lmt == -1) { /* -0.5 */ - sprintf(fmt, "%%%zus ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 5); - snprintf(tmp_str, TMP_STR_LEN, fmt, "-0.5"); - _RTW_PRINT_SEL(sel, "%s", tmp_str); - } else if (lmt % 2) { /* n.5 */ - sprintf(fmt, "%%%zud.5 ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) - 1 : 3); - snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / 2); - _RTW_PRINT_SEL(sel, "%s", tmp_str); - } else { /* n */ - sprintf(fmt, "%%%zud ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 5); - snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / 2); - _RTW_PRINT_SEL(sel, "%s", tmp_str); - } + } else if (lmt > -hal_spec->txgi_pdbm && lmt < 0) { /* -0.xx */ + sprintf(fmt, "%%%zus-0.%%d ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) - 4 : 1); + snprintf(tmp_str, TMP_STR_LEN, fmt, "", (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); + _RTW_PRINT_SEL(sel, "%s", tmp_str); + } else if (lmt % hal_spec->txgi_pdbm) { /* d.xx */ + sprintf(fmt, "%%%zud.%%d ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) - 2 : 3); + snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm, (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); + _RTW_PRINT_SEL(sel, "%s", tmp_str); + } else { /* d */ + sprintf(fmt, "%%%zud ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 6); + snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm); + _RTW_PRINT_SEL(sel, "%s", tmp_str); } /* dump limit offset of each path */ @@ -1512,8 +979,8 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter) ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); cur = get_next(cur); lmt_offset = phy_get_txpwr_lmt(adapter, ent->regd_name, band, bw, path, rs, ntx_idx, ch, 0); - if (lmt_offset == MAX_POWER_INDEX) { - *(lmt_idx + i * RF_PATH_MAX + path) = MAX_POWER_INDEX; + if (lmt_offset == hal_spec->txgi_max) { + *(lmt_idx + i * RF_PATH_MAX + path) = hal_spec->txgi_max; _RTW_PRINT_SEL(sel, "%3s ", "NA"); } else { *(lmt_idx + i * RF_PATH_MAX + path) = lmt_offset + base; @@ -1522,7 +989,7 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter) i++; } lmt_offset = phy_get_txpwr_lmt(adapter, regd_str(TXPWR_LMT_WW), band, bw, path, rs, ntx_idx, ch, 0); - if (lmt_offset == MAX_POWER_INDEX) + if (lmt_offset == hal_spec->txgi_max) _RTW_PRINT_SEL(sel, "%3s ", "NA"); else _RTW_PRINT_SEL(sel, "%3d ", lmt_offset); @@ -1564,6 +1031,7 @@ release_lock: void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *regd_name, u32 nlen , u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt) { + struct hal_spec_t *hal_spec = GET_HAL_SPEC(dvobj_get_primary_adapter(rfctl_to_dvobj(rfctl))); struct txpwr_lmt_ent *ent; _irqL irqL; _list *cur, *head; @@ -1602,13 +1070,13 @@ void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *regd_name, for (k = 0; k < TXPWR_LMT_RS_NUM_2G; ++k) for (m = 0; m < CENTER_CH_2G_NUM; ++m) for (l = 0; l < MAX_TX_COUNT; ++l) - ent->lmt_2g[j][k][m][l] = MAX_POWER_INDEX; + ent->lmt_2g[j][k][m][l] = hal_spec->txgi_max; #ifdef CONFIG_IEEE80211_BAND_5GHZ for (j = 0; j < MAX_5G_BANDWIDTH_NUM; ++j) for (k = 0; k < TXPWR_LMT_RS_NUM_5G; ++k) for (m = 0; m < CENTER_CH_5G_ALL_NUM; ++m) for (l = 0; l < MAX_TX_COUNT; ++l) - ent->lmt_5g[j][k][m][l] = MAX_POWER_INDEX; + ent->lmt_5g[j][k][m][l] = hal_spec->txgi_max; #endif } @@ -1625,7 +1093,7 @@ chk_lmt_val: else goto release_lock; - if (pre_lmt != MAX_POWER_INDEX) + if (pre_lmt != hal_spec->txgi_max) RTW_PRINT("duplicate txpwr_lmt for [%s][%s][%s][%s][%uT][%d]\n" , regd_name, band_str(band), ch_width_str(bw), txpwr_lmt_rs_str(tlrs), ntx_idx + 1 , band == BAND_ON_2_4G ? ch_idx + 1 : center_ch_5g_all[ch_idx]); @@ -1746,7 +1214,6 @@ s8 rtw_rf_get_kfree_tx_gain_offset(_adapter *padapter, u8 path, u8 ch) s8 kfree_offset = 0; #ifdef CONFIG_RF_POWER_TRIM - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); struct kfree_data_t *kfree_data = GET_KFREE_DATA(padapter); s8 bb_gain_sel = rtw_ch_to_bb_gain_sel(ch); @@ -1772,7 +1239,9 @@ exit: void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset) { +#if !defined(CONFIG_RTL8814A) && !defined(CONFIG_RTL8822B) && !defined(CONFIG_RTL8821C) && !defined(CONFIG_RTL8822C) u8 write_value; +#endif u8 target_path = 0; u32 val32 = 0; @@ -1811,6 +1280,12 @@ void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset) rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value); break; #endif /* CONFIG_RTL8188F */ +#ifdef CONFIG_RTL8188GTV + case RTL8188GTV: + write_value = RF_TX_GAIN_OFFSET_8188GTV(offset); + rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value); + break; +#endif /* CONFIG_RTL8188GTV */ #ifdef CONFIG_RTL8192E case RTL8192E: write_value = RF_TX_GAIN_OFFSET_8192E(offset); @@ -1824,10 +1299,12 @@ void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset) rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value); break; #endif /* CONFIG_RTL8821A */ -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) +#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8822C) case RTL8814A: case RTL8822B: + case RTL8822C: case RTL8821C: + case RTL8192F: RTW_INFO("\nkfree by PhyDM on the sw CH. path %d\n", path); break; #endif /* CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */ diff --git a/core/rtw_rm.c b/core/rtw_rm.c index 0e76b08..6576597 100644 --- a/core/rtw_rm.c +++ b/core/rtw_rm.c @@ -430,40 +430,17 @@ int issue_null_reply(struct rm_obj *prm) int ready_for_scan(struct rm_obj *prm) { _adapter *padapter = prm->psta->padapter; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - - - if (rtw_is_scan_deny(padapter)) - return _FALSE; + u8 ssc_chk; if (!rtw_is_adapter_up(padapter)) return _FALSE; - if (rtw_mi_busy_traffic_check(padapter, _FALSE)) - return _FALSE; + ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE); - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) - && check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) { - RTW_INFO(FUNC_ADPT_FMT" WIFI_AP_STATE && WIFI_UNDER_WPS\n", - FUNC_ADPT_ARG(padapter)); - return _FALSE; - } - if (check_fwstate(pmlmepriv, - (_FW_UNDER_SURVEY | _FW_UNDER_LINKING)) == _TRUE) { - RTW_INFO(FUNC_ADPT_FMT" _FW_UNDER_SURVEY|_FW_UNDER_LINKING\n", - FUNC_ADPT_ARG(padapter)); - return _FALSE; - } + if (ssc_chk == SS_ALLOW) + return _SUCCESS; -#ifdef CONFIG_CONCURRENT_MODE - if (rtw_mi_buddy_check_fwstate(padapter, - (_FW_UNDER_SURVEY | _FW_UNDER_LINKING | WIFI_UNDER_WPS))) { - RTW_INFO(FUNC_ADPT_FMT", but buddy_intf is under scanning or linking or wps_phase\n", - FUNC_ADPT_ARG(padapter)); - return _FALSE; - } -#endif - return _SUCCESS; + return _FALSE; } int rm_sitesurvey(struct rm_obj *prm) diff --git a/core/rtw_rm_fsm.c b/core/rtw_rm_fsm.c index 1ed3c9d..21fb323 100644 --- a/core/rtw_rm_fsm.c +++ b/core/rtw_rm_fsm.c @@ -656,8 +656,8 @@ static int rm_state_do_meas(struct rm_obj *prm, enum RM_EV_ID evid) case RM_EV_start_meas: if (prm->q.action_code == RM_ACT_RADIO_MEAS_REQ) { /* resotre measurement start time */ - rtw_hal_get_hwreg(padapter, HW_VAR_TSF, (u8 *)&val64); - prm->meas_start_time = val64; + prm->meas_start_time = rtw_hal_get_tsftr_by_port(padapter + , rtw_hal_get_port(padapter)); switch (prm->q.m_type) { case bcn_req: @@ -741,8 +741,8 @@ static int rm_state_do_meas(struct rm_obj *prm, enum RM_EV_ID evid) case RM_EV_state_out: rm_cancel_clock(prm); /* resotre measurement end time */ - rtw_hal_get_hwreg(padapter, HW_VAR_TSF, (u8 *)&val64); - _rtw_memcpy(&prm->meas_end_time, (char *)&val64, sizeof(u64)); + prm->meas_end_time = rtw_hal_get_tsftr_by_port(padapter + , rtw_hal_get_port(padapter)); val8 = 0; /* Disable free run counter */ rtw_hal_set_hwreg(padapter, HW_VAR_FREECNT, &val8); diff --git a/core/rtw_rson.c b/core/rtw_rson.c index 4fbdbb5..39b583a 100644 --- a/core/rtw_rson.c +++ b/core/rtw_rson.c @@ -548,13 +548,6 @@ void rtw_rson_scan_cmd_hdl(_adapter *padapter, int op) if (rtw_to_roam(padapter) != 0) { if (rtw_dec_to_roam(padapter) == 0) { rtw_set_to_roam(padapter, 0); -#ifdef CONFIG_INTEL_WIDI - if (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) { - _rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN); - intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_WK, NULL, 0); - RTW_INFO("change to widi listen\n"); - } -#endif /* CONFIG_INTEL_WIDI */ rtw_free_assoc_resources(padapter, _TRUE); rtw_indicate_disconnect(padapter, 0, _FALSE); } else diff --git a/core/rtw_sreset.c b/core/rtw_sreset.c index 09558ed..871f8db 100644 --- a/core/rtw_sreset.c +++ b/core/rtw_sreset.c @@ -47,10 +47,9 @@ u8 sreset_get_wifi_status(_adapter *padapter) #if defined(DBG_CONFIG_ERROR_DETECT) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct sreset_priv *psrtpriv = &pHalData->srestpriv; - u8 status = WIFI_STATUS_SUCCESS; u32 val32 = 0; - _irqL irqL; + if (psrtpriv->silent_reset_inprogress == _TRUE) return status; val32 = rtw_read32(padapter, REG_TXDMA_STATUS); @@ -104,11 +103,9 @@ bool sreset_inprogress(_adapter *padapter) void sreset_restore_security_station(_adapter *padapter) { - u8 EntryId = 0; struct mlme_priv *mlmepriv = &padapter->mlmepriv; struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *psta; - struct security_priv *psecuritypriv = &(padapter->securitypriv); struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; { @@ -147,25 +144,6 @@ void sreset_restore_network_station(_adapter *padapter) struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 doiqk = _FALSE; -#if 0 - { - /* ======================================================= */ - /* reset related register of Beacon control */ - - /* set MSR to nolink */ - Set_MSR(padapter, _HW_STATE_NOLINK_); - /* reject all data frame */ - rtw_write16(padapter, REG_RXFLTMAP2, 0x00); - /* reset TSF */ - rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1))); - - /* disable update TSF */ - SetBcnCtrlReg(padapter, BIT(4), 0); - - /* ======================================================= */ - } -#endif - rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure, RTW_CMDF_DIRECTLY); { @@ -173,6 +151,7 @@ void sreset_restore_network_station(_adapter *padapter) #ifdef CONFIG_USB_HCI /* TH=1 => means that invalidate usb rx aggregation */ /* TH=0 => means that validate usb rx aggregation, use init value. */ +#ifdef CONFIG_80211N_HT if (mlmepriv->htpriv.ht_option) { if (padapter->registrypriv.wifi_spec == 1) threshold = 1; @@ -183,6 +162,7 @@ void sreset_restore_network_station(_adapter *padapter) threshold = 1; rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); } +#endif /* CONFIG_80211N_HT */ #endif } @@ -200,8 +180,9 @@ void sreset_restore_network_station(_adapter *padapter) { u8 join_type = 0; - rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); + rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_CONNECTING); + rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); } Set_MSR(padapter, (pmlmeinfo->state & 0x3)); @@ -217,8 +198,6 @@ void sreset_restore_network_station(_adapter *padapter) void sreset_restore_network_status(_adapter *padapter) { struct mlme_priv *mlmepriv = &padapter->mlmepriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) { RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); diff --git a/core/rtw_sta_mgt.c b/core/rtw_sta_mgt.c index 3a79e09..1ca9ff9 100644 --- a/core/rtw_sta_mgt.c +++ b/core/rtw_sta_mgt.c @@ -1,6 +1,6 @@ /****************************************************************************** * - * Copyright(c) 2007 - 2017 Realtek Corporation. + * Copyright(c) 2007 - 2019 Realtek Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as @@ -16,13 +16,6 @@ #include -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) - - #error "Shall be Linux or Windows, but not both!\n" - -#endif - - bool test_st_match_rule(_adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) { if (ntohs(*((u16 *)local_port)) == 5001 || ntohs(*((u16 *)remote_port)) == 5001) @@ -237,12 +230,15 @@ u32 _rtw_init_sta_priv(struct sta_priv *pstapriv) pstapriv->padapter = adapter; - pstapriv->pallocated_stainfo_buf = rtw_zvmalloc(sizeof(struct sta_info) * NUM_STA + 4); + pstapriv->pallocated_stainfo_buf = rtw_zvmalloc( + sizeof(struct sta_info) * NUM_STA + MEM_ALIGNMENT_OFFSET); if (!pstapriv->pallocated_stainfo_buf) goto exit; - pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 - - ((SIZE_PTR)(pstapriv->pallocated_stainfo_buf) & 3); + pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf; + if ((SIZE_PTR)pstapriv->pstainfo_buf & MEM_ALIGNMENT_PADDING) + pstapriv->pstainfo_buf += MEM_ALIGNMENT_OFFSET - + ((SIZE_PTR)pstapriv->pstainfo_buf & MEM_ALIGNMENT_PADDING); _rtw_init_queue(&pstapriv->free_sta_queue); @@ -315,12 +311,21 @@ u32 _rtw_init_sta_priv(struct sta_priv *pstapriv) rtw_pre_link_sta_ctl_init(pstapriv); #endif +#if defined(DBG_ROAMING_TEST) || defined(CONFIG_RTW_REPEATER_SON) + rtw_set_rx_chk_limit(adapter,1); +#elif defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && !defined(CONFIG_LPS_LCLK_WD_TIMER) + rtw_set_rx_chk_limit(adapter,4); +#else + rtw_set_rx_chk_limit(adapter,8); +#endif + ret = _SUCCESS; exit: if (ret != _SUCCESS) { if (pstapriv->pallocated_stainfo_buf) - rtw_vmfree(pstapriv->pallocated_stainfo_buf, sizeof(struct sta_info) * NUM_STA + 4); + rtw_vmfree(pstapriv->pallocated_stainfo_buf, + sizeof(struct sta_info) * NUM_STA + MEM_ALIGNMENT_OFFSET); #ifdef CONFIG_AP_MODE if (pstapriv->sta_aid) rtw_mfree(pstapriv->sta_aid, pstapriv->max_aid * sizeof(struct sta_info *)); @@ -350,22 +355,43 @@ inline struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int return (struct sta_info *)(stapriv->pstainfo_buf + offset * sizeof(struct sta_info)); } +void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv); void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv) { + + _rtw_spinlock_free(&psta_xmitpriv->lock); + + _rtw_spinlock_free(&(psta_xmitpriv->be_q.sta_pending.lock)); + _rtw_spinlock_free(&(psta_xmitpriv->bk_q.sta_pending.lock)); + _rtw_spinlock_free(&(psta_xmitpriv->vi_q.sta_pending.lock)); + _rtw_spinlock_free(&(psta_xmitpriv->vo_q.sta_pending.lock)); } static void _rtw_free_sta_recv_priv_lock(struct sta_recv_priv *psta_recvpriv) { + + _rtw_spinlock_free(&psta_recvpriv->lock); + + _rtw_spinlock_free(&(psta_recvpriv->defrag_q.lock)); + + } +void rtw_mfree_stainfo(struct sta_info *psta); void rtw_mfree_stainfo(struct sta_info *psta) { + + if (&psta->lock != NULL) + _rtw_spinlock_free(&psta->lock); + _rtw_free_sta_xmit_priv_lock(&psta->sta_xmitpriv); _rtw_free_sta_recv_priv_lock(&psta->sta_recvpriv); + } /* this function is used to free the memory of lock || sema for all stainfos */ +void rtw_mfree_all_stainfo(struct sta_priv *pstapriv); void rtw_mfree_all_stainfo(struct sta_priv *pstapriv) { _irqL irqL; @@ -394,6 +420,18 @@ void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv); void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv) { rtw_mfree_all_stainfo(pstapriv); /* be done before free sta_hash_lock */ + + _rtw_spinlock_free(&pstapriv->free_sta_queue.lock); + + _rtw_spinlock_free(&pstapriv->sta_hash_lock); + _rtw_spinlock_free(&pstapriv->wakeup_q.lock); + _rtw_spinlock_free(&pstapriv->sleep_q.lock); + +#ifdef CONFIG_AP_MODE + _rtw_spinlock_free(&pstapriv->asoc_list_lock); + _rtw_spinlock_free(&pstapriv->auth_list_lock); +#endif + } u32 _rtw_free_sta_priv(struct sta_priv *pstapriv) @@ -438,7 +476,8 @@ u32 _rtw_free_sta_priv(struct sta_priv *pstapriv) #endif if (pstapriv->pallocated_stainfo_buf) - rtw_vmfree(pstapriv->pallocated_stainfo_buf, sizeof(struct sta_info) * NUM_STA + 4); + rtw_vmfree(pstapriv->pallocated_stainfo_buf, + sizeof(struct sta_info) * NUM_STA + MEM_ALIGNMENT_OFFSET); #ifdef CONFIG_AP_MODE if (pstapriv->sta_aid) rtw_mfree(pstapriv->sta_aid, pstapriv->max_aid * sizeof(struct sta_info *)); @@ -465,7 +504,7 @@ static void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl) /* struct sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr) */ struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr) { - _irqL irqL, irqL2; + _irqL irqL2; s32 index; _list *phash_list; struct sta_info *psta; @@ -562,9 +601,13 @@ struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr) #endif /* init for the sequence number of received management frame */ psta->RxMgmtFrameSeqNum = 0xffff; + _rtw_memset(&psta->sta_stats, 0, sizeof(struct stainfo_stats)); rtw_alloc_macid(pstapriv->padapter, psta); + psta->tx_q_enable = 0; + _rtw_init_queue(&psta->tx_queue); + _init_workitem(&psta->tx_q_work, rtw_xmit_dequeue_callback, NULL); } exit: @@ -630,6 +673,9 @@ u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta) /* rtw_list_delete(&psta->wakeup_list); */ + rtw_free_xmitframe_queue(pxmitpriv, &psta->tx_queue); + _rtw_deinit_queue(&psta->tx_queue); + _enter_critical_bh(&pxmitpriv->lock, &irqL0); rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q); @@ -775,10 +821,6 @@ u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta) pstapriv->sta_aid[psta->cmn.aid - 1] = NULL; psta->cmn.aid = 0; } - if (psta->cmn.aid > 31) { - pr_err("***** psta->aid (%d) out of bounds\n", psta->cmn.aid); - return _FAIL; - } } #endif /* CONFIG_NATIVEAP_MLME */ @@ -792,6 +834,8 @@ u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta) rtw_st_ctl_deinit(&psta->st_ctl); if (is_pre_link_sta == _FALSE) { + _rtw_spinlock_free(&psta->lock); + /* _enter_critical_bh(&(pfree_sta_queue->lock), &irqL0); */ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL0); rtw_list_insert_tail(&psta->list, get_list_head(pfree_sta_queue)); @@ -1278,7 +1322,7 @@ void rtw_pre_link_sta_ctl_deinit(struct sta_priv *stapriv) rtw_pre_link_sta_ctl_reset(stapriv); - } + _rtw_spinlock_free(&pre_link_sta_ctl->lock); } void dump_pre_link_sta_ctl(void *sel, struct sta_priv *stapriv) diff --git a/core/rtw_tdls.c b/core/rtw_tdls.c index c682ece..002ab4b 100644 --- a/core/rtw_tdls.c +++ b/core/rtw_tdls.c @@ -88,7 +88,11 @@ int rtw_init_tdls_info(_adapter *padapter) void rtw_free_tdls_info(struct tdls_info *ptdlsinfo) { + _rtw_spinlock_free(&ptdlsinfo->cmd_lock); + _rtw_spinlock_free(&ptdlsinfo->hdl_lock); + _rtw_memset(ptdlsinfo, 0, sizeof(struct tdls_info)); + } void rtw_free_all_tdls_sta(_adapter *padapter, u8 enqueue_cmd) @@ -435,7 +439,7 @@ void rtw_tdls_process_ht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 } if (ptdls_sta->flags & WLAN_STA_HT) { - if (padapter->registrypriv.ht_enable == _TRUE) { + if (padapter->registrypriv.ht_enable == _TRUE && is_supported_ht(padapter->registrypriv.wireless_mode) ) { ptdls_sta->htpriv.ht_option = _TRUE; ptdls_sta->qos_option = _TRUE; } else { @@ -531,7 +535,8 @@ void rtw_tdls_process_vht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; - u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0, rf_type = RF_1T1R, tx_nss = 0; + u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, rf_type = RF_1T1R, tx_nss = 0; + u16 cur_beamform_cap = 0; u8 *pcap_mcs; _rtw_memset(&ptdls_sta->vhtpriv, 0, sizeof(struct vht_priv)); @@ -555,9 +560,11 @@ void rtw_tdls_process_vht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 if (ptdls_sta->flags & WLAN_STA_VHT) { if (REGSTY_IS_11AC_ENABLE(&padapter->registrypriv) - && hal_chk_proto_cap(padapter, PROTO_CAP_11AC) - && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))) + && is_supported_vht(padapter->registrypriv.wireless_mode) + && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))) { ptdls_sta->vhtpriv.vht_option = _TRUE; + ptdls_sta->cmn.ra_info.is_vht_enable = _TRUE; + } else ptdls_sta->vhtpriv.vht_option = _FALSE; } @@ -592,6 +599,7 @@ void rtw_tdls_process_vht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 GET_VHT_CAPABILITY_ELE_SU_BFER(data)) SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); ptdls_sta->vhtpriv.beamform_cap = cur_beamform_cap; + ptdls_sta->cmn.bf_info.vht_beamform_cap = cur_beamform_cap; if (cur_beamform_cap) RTW_INFO("Current VHT Beamforming Setting = %02X\n", cur_beamform_cap); #endif /*CONFIG_BEAMFORMING*/ @@ -2370,7 +2378,7 @@ int On_TDLS_Dis_Req(_adapter *padapter, union recv_frame *precv_frame) if (psta_ap == NULL) goto exit; dst = pIE->data + 12; - if (MacAddr_isBcst(dst) == _FALSE && (_rtw_memcmp(adapter_mac_addr(padapter), dst, 6) == _FALSE)) + if (MacAddr_isBcst(dst) == _FALSE && (_rtw_memcmp(adapter_mac_addr(padapter), dst, ETH_ALEN) == _FALSE)) goto exit; break; default: @@ -2849,7 +2857,7 @@ void rtw_build_tdls_setup_req_ies(_adapter *padapter, struct xmit_frame *pxmitfr #ifdef CONFIG_80211AC_VHT if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pmlmeext->cur_channel > 14) && REGSTY_IS_11AC_ENABLE(pregistrypriv) - && hal_chk_proto_cap(padapter, PROTO_CAP_11AC) + && is_supported_vht(pregistrypriv->wireless_mode) && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) ) { pframe = rtw_tdls_set_aid(padapter, pframe, pattrib); @@ -2944,7 +2952,7 @@ void rtw_build_tdls_setup_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitfr #ifdef CONFIG_80211AC_VHT if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pmlmeext->cur_channel > 14) && REGSTY_IS_11AC_ENABLE(pregistrypriv) - && hal_chk_proto_cap(padapter, PROTO_CAP_11AC) + && is_supported_vht(pregistrypriv->wireless_mode) && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) ) { pframe = rtw_tdls_set_aid(padapter, pframe, pattrib); @@ -3021,7 +3029,7 @@ void rtw_build_tdls_setup_cfm_ies(_adapter *padapter, struct xmit_frame *pxmitfr if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (ptdls_sta->vhtpriv.vht_option == _TRUE) && (pmlmeext->cur_channel > 14) && REGSTY_IS_11AC_ENABLE(pregistrypriv) - && hal_chk_proto_cap(padapter, PROTO_CAP_11AC) + && is_supported_vht(pregistrypriv->wireless_mode) && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) ) { pframe = rtw_tdls_set_vht_operation(padapter, pframe, pattrib, pmlmeext->cur_channel); diff --git a/core/rtw_vht.c b/core/rtw_vht.c index 8214ae9..8fdbf20 100644 --- a/core/rtw_vht.c +++ b/core/rtw_vht.c @@ -61,10 +61,6 @@ void dump_vht_cap_ie_content(void *sel, const u8 *buf, u32 buf_len) void dump_vht_cap_ie(void *sel, const u8 *ie, u32 ie_len) { - const u8 *pos = ie; - u16 id; - u16 len; - const u8 *vht_cap_ie; sint vht_cap_ielen; @@ -99,10 +95,6 @@ void dump_vht_op_ie_content(void *sel, const u8 *buf, u32 buf_len) void dump_vht_op_ie(void *sel, const u8 *ie, u32 ie_len) { - const u8 *pos = ie; - u16 id; - u16 len; - const u8 *vht_op_ie; sint vht_op_ielen; @@ -398,7 +390,7 @@ void update_sta_vht_info_apmode_bf_cap(_adapter *padapter, struct sta_info *psta } #endif -void update_sta_vht_info_apmode(_adapter *padapter, PVOID sta) +void update_sta_vht_info_apmode(_adapter *padapter, void *sta) { struct sta_info *psta = (struct sta_info *)sta; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); @@ -490,6 +482,83 @@ void update_hw_vht_param(_adapter *padapter) rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&pvhtpriv->ampdu_len)); } +#ifdef ROKU_PRIVATE +u8 VHT_get_ss_from_map(u8 *vht_mcs_map) +{ + u8 i, j; + u8 ss = 0; + + for (i = 0; i < 2; i++) { + if (vht_mcs_map[i] != 0xff) { + for (j = 0; j < 8; j += 2) { + if (((vht_mcs_map[i] >> j) & 0x03) == 0x03) + break; + ss++; + } + } + + } + +return ss; +} + +void VHT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) +{ + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct vht_priv_infra_ap *pvhtpriv = &pmlmepriv->vhtpriv_infra_ap; + u8 cur_stbc_cap_infra_ap = 0; + u16 cur_beamform_cap_infra_ap = 0; + u8 *pcap_mcs; + u8 *pcap_mcs_tx; + u8 Rx_ss = 0, Tx_ss = 0; + + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + if (pIE == NULL) + return; + + pmlmeinfo->ht_vht_received |= BIT(1); + + pvhtpriv->ldpc_cap_infra_ap = GET_VHT_CAPABILITY_ELE_RX_LDPC(pIE->data); + + if (GET_VHT_CAPABILITY_ELE_RX_STBC(pIE->data)) + SET_FLAG(cur_stbc_cap_infra_ap, STBC_VHT_ENABLE_RX); + if (GET_VHT_CAPABILITY_ELE_TX_STBC(pIE->data)) + SET_FLAG(cur_stbc_cap_infra_ap, STBC_VHT_ENABLE_TX); + pvhtpriv->stbc_cap_infra_ap = cur_stbc_cap_infra_ap; + + /*store ap info for channel bandwidth*/ + pvhtpriv->channel_width_infra_ap = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(pIE->data); + + /*check B11: SU Beamformer Capable and B12: SU Beamformee B19: MU Beamformer B20:MU Beamformee*/ + if (GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) + SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); + if (GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) + SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); + if (GET_VHT_CAPABILITY_ELE_MU_BFER(pIE->data)) + SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE); + if (GET_VHT_CAPABILITY_ELE_MU_BFEE(pIE->data)) + SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE); + pvhtpriv->beamform_cap_infra_ap = cur_beamform_cap_infra_ap; + + /*store information about vht_mcs_set*/ + pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pIE->data); + pcap_mcs_tx = GET_VHT_CAPABILITY_ELE_TX_MCS(pIE->data); + _rtw_memcpy(pvhtpriv->vht_mcs_map_infra_ap, pcap_mcs, 2); + _rtw_memcpy(pvhtpriv->vht_mcs_map_tx_infra_ap, pcap_mcs_tx, 2); + + Rx_ss = VHT_get_ss_from_map(pvhtpriv->vht_mcs_map_infra_ap); + Tx_ss = VHT_get_ss_from_map(pvhtpriv->vht_mcs_map_tx_infra_ap); + if (Rx_ss >= Tx_ss) { + pvhtpriv->number_of_streams_infra_ap = Rx_ss; + } else{ + pvhtpriv->number_of_streams_infra_ap = Tx_ss; + } + +} +#endif /* ROKU_PRIVATE */ + void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) { struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); @@ -616,22 +685,26 @@ void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) return; } -void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta) +void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, void *sta) { struct sta_info *psta = (struct sta_info *)sta; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct registry_priv *regsty = adapter_to_regsty(padapter); u8 target_bw; u8 target_rxss, current_rxss; u8 update_ra = _FALSE; + u8 tx_nss = 0, rf_type = RF_1T1R; + struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); if (pvhtpriv->vht_option == _FALSE) return; target_bw = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(pframe); - target_rxss = (GET_VHT_OPERATING_MODE_FIELD_RX_NSS(pframe) + 1); + + rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); + tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num); + target_rxss = rtw_min(tx_nss, (GET_VHT_OPERATING_MODE_FIELD_RX_NSS(pframe) + 1)); if (target_bw != psta->cmn.bw_mode) { if (hal_is_bw_support(padapter, target_bw) @@ -720,7 +793,7 @@ u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw) u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf) { - u8 bw, rf_type, rf_num, rx_stbc_nss = 0; + u8 bw, rf_num, rx_stbc_nss = 0; u16 HighestRate; u8 *pcap, *pcap_mcs; u32 len = 0; @@ -738,19 +811,19 @@ u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf) rtw_hal_get_def_var(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset); rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz); - RTW_DBG("%s, line%d, Available RX buf size = %d bytes\n.", __FUNCTION__, __LINE__, max_recvbuf_sz - rx_packet_offset); + RTW_DBG("%s, line%d, Available RX buf size = %d bytes\n", __FUNCTION__, __LINE__, max_recvbuf_sz - rx_packet_offset); if ((max_recvbuf_sz - rx_packet_offset) >= 11454) { SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 2); - RTW_INFO("%s, line%d, Set MAX MPDU len = 11454 bytes\n.", __FUNCTION__, __LINE__); + RTW_INFO("%s, line%d, Set MAX MPDU len = 11454 bytes\n", __FUNCTION__, __LINE__); } else if ((max_recvbuf_sz - rx_packet_offset) >= 7991) { SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 1); - RTW_INFO("%s, line%d, Set MAX MPDU len = 7991 bytes\n.", __FUNCTION__, __LINE__); + RTW_INFO("%s, line%d, Set MAX MPDU len = 7991 bytes\n", __FUNCTION__, __LINE__); } else if ((max_recvbuf_sz - rx_packet_offset) >= 3895) { SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 0); - RTW_INFO("%s, line%d, Set MAX MPDU len = 3895 bytes\n.", __FUNCTION__, __LINE__); + RTW_INFO("%s, line%d, Set MAX MPDU len = 3895 bytes\n", __FUNCTION__, __LINE__); } else - RTW_ERR("%s, line%d, Error!! Available RX buf size < 3895 bytes\n.", __FUNCTION__, __LINE__); + RTW_ERR("%s, line%d, Error!! Available RX buf size < 3895 bytes\n", __FUNCTION__, __LINE__); /* B2 B3 Supported Channel Width Set */ if (hal_chk_bw_cap(padapter, BW_CAP_160M) && REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_160)) { @@ -860,6 +933,8 @@ u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf) u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len) { + struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); + RT_CHANNEL_INFO *chset = rfctl->channel_set; u32 ielen; u8 max_bw; u8 oper_ch, oper_bw = CHANNEL_WIDTH_20, oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; @@ -921,7 +996,11 @@ u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_le oper_bw = rtw_min(oper_bw, max_bw); /* try downgrage bw to fit in channel plan setting */ - while (!rtw_chset_is_chbw_valid(adapter_to_chset(padapter), oper_ch, oper_bw, oper_offset)) { + while (!rtw_chset_is_chbw_valid(chset, oper_ch, oper_bw, oper_offset) + || (IS_DFS_SLAVE_WITH_RD(rfctl) + && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl)) + && rtw_chset_is_chbw_non_ocp(chset, oper_ch, oper_bw, oper_offset)) + ) { oper_bw--; if (oper_bw == CHANNEL_WIDTH_20) { oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; @@ -931,7 +1010,9 @@ u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_le } } - rtw_warn_on(!rtw_chset_is_chbw_valid(adapter_to_chset(padapter), oper_ch, oper_bw, oper_offset)); + rtw_warn_on(!rtw_chset_is_chbw_valid(chset, oper_ch, oper_bw, oper_offset)); + if (IS_DFS_SLAVE_WITH_RD(rfctl) && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))) + rtw_warn_on(rtw_chset_is_chbw_non_ocp(chset, oper_ch, oper_bw, oper_offset)); /* update VHT_OP_IE */ if (oper_bw < CHANNEL_WIDTH_80) { diff --git a/core/rtw_wapi.c b/core/rtw_wapi.c index e065b3d..94b26e7 100644 --- a/core/rtw_wapi.c +++ b/core/rtw_wapi.c @@ -792,6 +792,14 @@ void rtw_wapi_return_all_sta_info(_adapter *padapter) WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); } +void CAM_empty_entry( + PADAPTER Adapter, + u8 ucIndex +) +{ + rtw_hal_set_hwreg(Adapter, HW_VAR_CAM_EMPTY_ENTRY, (u8 *)(&ucIndex)); +} + void rtw_wapi_clear_cam_entry(_adapter *padapter, u8 *pMacAddr) { u8 UcIndex = 0; @@ -1065,7 +1073,7 @@ void wapi_test_set_key(struct _adapter *padapter, u8 *buf) void wapi_test_init(struct _adapter *padapter) { u8 keybuf[100]; - u8 mac_addr[6] = {0x00, 0xe0, 0x4c, 0x72, 0x04, 0x70}; + u8 mac_addr[ETH_ALEN] = {0x00, 0xe0, 0x4c, 0x72, 0x04, 0x70}; u8 UskDataKey[16] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f}; u8 UskMicKey[16] = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f}; u8 UskId = 0; @@ -1091,7 +1099,7 @@ void wapi_test_init(struct _adapter *padapter) keybuf[2] = 1; /* AE */ keybuf[3] = 0; /* not update */ - memcpy(keybuf + 4, mac_addr, 6); + memcpy(keybuf + 4, mac_addr, ETH_ALEN); memcpy(keybuf + 10, UskDataKey, 16); memcpy(keybuf + 26, UskMicKey, 16); keybuf[42] = UskId; @@ -1103,7 +1111,7 @@ void wapi_test_init(struct _adapter *padapter) keybuf[2] = 0; /* AE */ keybuf[3] = 0; /* not update */ - memcpy(keybuf + 4, mac_addr, 6); + memcpy(keybuf + 4, mac_addr, ETH_ALEN); memcpy(keybuf + 10, UskDataKey, 16); memcpy(keybuf + 26, UskMicKey, 16); keybuf[42] = UskId; @@ -1116,7 +1124,7 @@ void wapi_test_init(struct _adapter *padapter) keybuf[1] = 1; /* Enable TX */ keybuf[2] = 1; /* AE */ keybuf[3] = 0; /* not update */ - memcpy(keybuf + 4, mac_addr, 6); + memcpy(keybuf + 4, mac_addr, ETH_ALEN); memcpy(keybuf + 10, MskDataKey, 16); memcpy(keybuf + 26, MskMicKey, 16); keybuf[42] = MskId; @@ -1127,7 +1135,7 @@ void wapi_test_init(struct _adapter *padapter) keybuf[1] = 1; /* Enable TX */ keybuf[2] = 0; /* AE */ keybuf[3] = 0; /* not update */ - memcpy(keybuf + 4, mac_addr, 6); + memcpy(keybuf + 4, mac_addr, ETH_ALEN); memcpy(keybuf + 10, MskDataKey, 16); memcpy(keybuf + 26, MskMicKey, 16); keybuf[42] = MskId; diff --git a/core/rtw_wlan_util.c b/core/rtw_wlan_util.c index b9a8944..691bcdf 100644 --- a/core/rtw_wlan_util.c +++ b/core/rtw_wlan_util.c @@ -52,9 +52,6 @@ extern unsigned char RSN_TKIP_CIPHER[4]; #define WAIT_FOR_BCN_TO_MIN (6000) #define WAIT_FOR_BCN_TO_MAX (20000) -#define DISCONNECT_BY_CHK_BCN_FAIL_OBSERV_PERIOD_IN_MS 1000 -#define DISCONNECT_BY_CHK_BCN_FAIL_THRESHOLD 3 - static u8 rtw_basic_rate_cck[4] = { IEEE80211_CCK_RATE_1MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_2MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_5MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_11MB | IEEE80211_BASIC_RATE_MASK @@ -72,6 +69,28 @@ static u8 rtw_basic_rate_mix[7] = { IEEE80211_OFDM_RATE_24MB | IEEE80211_BASIC_RATE_MASK }; +extern u8 WIFI_CCKRATES[]; +bool rtw_is_cck_rate(u8 rate) +{ + int i; + + for (i = 0; i < 4; i++) + if ((WIFI_CCKRATES[i] & 0x7F) == (rate & 0x7F)) + return 1; + return 0; +} + +extern u8 WIFI_OFDMRATES[]; +bool rtw_is_ofdm_rate(u8 rate) +{ + int i; + + for (i = 0; i < 8; i++) + if ((WIFI_OFDMRATES[i] & 0x7F) == (rate & 0x7F)) + return 1; + return 0; +} + /* test if rate is defined in rtw_basic_rate_cck */ bool rtw_is_basic_rate_cck(u8 rate) { @@ -104,9 +123,9 @@ bool rtw_is_basic_rate_mix(u8 rate) return 1; return 0; } - +#ifdef CONFIG_BCN_CNT_CONFIRM_HDL int new_bcn_max = 3; - +#endif int cckrates_included(unsigned char *rate, int ratelen) { int i; @@ -358,8 +377,8 @@ void set_mcs_rate_by_mask(u8 *mcs_set, u32 mask) } void UpdateBrateTbl( - IN PADAPTER Adapter, - IN u8 *mBratesOS + PADAPTER Adapter, + u8 *mBratesOS ) { u8 i; @@ -590,7 +609,6 @@ inline systime rtw_get_on_cur_ch_time(_adapter *adapter) void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode) { u8 center_ch, chnl_offset80 = HAL_PRIME_CHNL_OFFSET_DONT_CARE; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; #if (defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)) || defined(CONFIG_MCC_MODE) u8 iqk_info_backup = _FALSE; #endif @@ -742,14 +760,6 @@ unsigned int decide_wait_for_beacon_timeout(unsigned int bcn_interval) return bcn_interval << 2; } -void CAM_empty_entry( - PADAPTER Adapter, - u8 ucIndex -) -{ - rtw_hal_set_hwreg(Adapter, HW_VAR_CAM_EMPTY_ENTRY, (u8 *)(&ucIndex)); -} - void invalidate_cam_all(_adapter *padapter) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); @@ -1409,12 +1419,12 @@ void rtw_clean_hw_dk_cam(_adapter *adapter) void flush_all_cam_entry(_adapter *padapter) { +#ifdef CONFIG_CONCURRENT_MODE struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct security_priv *psecpriv = &padapter->securitypriv; -#ifdef CONFIG_CONCURRENT_MODE if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *psta; @@ -1788,6 +1798,97 @@ static void bwmode_update_check(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pI #endif /* CONFIG_80211N_HT */ } +#ifdef ROKU_PRIVATE +void Supported_rate_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) +{ + unsigned int i; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + if (pIE == NULL) + return; + + for (i = 0 ; i < pIE->Length; i++) + pmlmeinfo->SupportedRates_infra_ap[i] = (pIE->data[i]); + +} + +void Extended_Supported_rate_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) +{ + unsigned int i, j; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + if (pIE == NULL) + return; + + if (pIE->Length > 0) { + for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { + if (pmlmeinfo->SupportedRates_infra_ap[i] == 0) + break; + } + for (j = 0; j < pIE->Length; j++) + pmlmeinfo->SupportedRates_infra_ap[i+j] = (pIE->data[j]); + } + +} + +void HT_get_ss_from_mcs_set(u8 *mcs_set, u8 *Rx_ss) +{ + u8 i, j; + u8 r_ss = 0, t_ss = 0; + + for (i = 0; i < 4; i++) { + if ((mcs_set[3-i] & 0xff) != 0x00) { + r_ss = 4-i; + break; + } + } + + *Rx_ss = r_ss; +} + +void HT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) +{ + unsigned int i; + u8 cur_stbc_cap_infra_ap = 0; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct ht_priv_infra_ap *phtpriv = &pmlmepriv->htpriv_infra_ap; + + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + if (pIE == NULL) + return; + + pmlmeinfo->ht_vht_received |= BIT(0); + + /*copy MCS_SET*/ + for (i = 3; i < 19; i++) + phtpriv->MCS_set_infra_ap[i-3] = (pIE->data[i]); + + /*get number of stream from mcs set*/ + HT_get_ss_from_mcs_set(phtpriv->MCS_set_infra_ap, &phtpriv->Rx_ss_infra_ap); + + phtpriv->rx_highest_data_rate_infra_ap = le16_to_cpu(GET_HT_CAP_ELE_RX_HIGHEST_DATA_RATE(pIE->data)); + + phtpriv->ldpc_cap_infra_ap = GET_HT_CAP_ELE_LDPC_CAP(pIE->data); + + if (GET_HT_CAP_ELE_RX_STBC(pIE->data)) + SET_FLAG(cur_stbc_cap_infra_ap, STBC_HT_ENABLE_RX); + if (GET_HT_CAP_ELE_TX_STBC(pIE->data)) + SET_FLAG(cur_stbc_cap_infra_ap, STBC_HT_ENABLE_TX); + phtpriv->stbc_cap_infra_ap = cur_stbc_cap_infra_ap; + + /*store ap info SGI 20m 40m*/ + phtpriv->sgi_20m_infra_ap = GET_HT_CAP_ELE_SHORT_GI20M(pIE->data); + phtpriv->sgi_40m_infra_ap = GET_HT_CAP_ELE_SHORT_GI40M(pIE->data); + + /*store ap info for supported channel bandwidth*/ + phtpriv->channel_width_infra_ap = GET_HT_CAP_ELE_CHL_WIDTH(pIE->data); +} +#endif /* ROKU_PRIVATE */ + void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) { #ifdef CONFIG_80211N_HT @@ -1799,7 +1900,9 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct ht_priv *phtpriv = &pmlmepriv->htpriv; +#ifdef CONFIG_DISABLE_MCS13TO15 struct registry_priv *pregistrypriv = &padapter->registrypriv; +#endif struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); if (pIE == NULL) @@ -2005,9 +2108,9 @@ void HTOnAssocRsp(_adapter *padapter) min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2; rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); - +#ifdef CONFIG_80211N_HT rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); - +#endif /* CONFIG_80211N_HT */ #if 0 /* move to rtw_update_ht_cap() */ if ((pregpriv->bw_mode > 0) && (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & BIT(1)) && @@ -2070,7 +2173,6 @@ void ERP_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) void VCS_update(_adapter *padapter, struct sta_info *psta) { struct registry_priv *pregpriv = &padapter->registrypriv; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); @@ -2149,7 +2251,6 @@ int check_ielen(u8 *start, uint len) { int left = len; u8 *pos = start; - int unknown = 0; u8 id, elen; while (left >= 2) { @@ -2162,7 +2263,7 @@ int check_ielen(u8 *start, uint len) id, elen, (unsigned long) left); return _FALSE; } - if ((id == WLAN_EID_VENDOR_SPECIFIC) && (elen < 4)) + if ((id == WLAN_EID_VENDOR_SPECIFIC) && (elen < 3)) return _FALSE; left -= elen; @@ -2189,6 +2290,175 @@ int validate_beacon_len(u8 *pframe, u32 len) return _TRUE; } + +u8 support_rate_ranges[] = { + IEEE80211_CCK_RATE_1MB, + IEEE80211_CCK_RATE_2MB, + IEEE80211_CCK_RATE_5MB, + IEEE80211_CCK_RATE_11MB, + IEEE80211_OFDM_RATE_6MB, + IEEE80211_OFDM_RATE_9MB, + IEEE80211_OFDM_RATE_12MB, + IEEE80211_OFDM_RATE_18MB, + IEEE80211_OFDM_RATE_24MB, + IEEE80211_OFDM_RATE_36MB, + IEEE80211_OFDM_RATE_48MB, + IEEE80211_OFDM_RATE_54MB, +}; + +inline bool match_ranges(u16 EID, u32 value) +{ + int i; + int nr_range; + + switch (EID) { + case _EXT_SUPPORTEDRATES_IE_: + case _SUPPORTEDRATES_IE_: + nr_range = sizeof(support_rate_ranges)/sizeof(u8); + for (i = 0; i < nr_range; i++) { + /* clear bit7 before searching. */ + value &= ~BIT(7); + if (value == support_rate_ranges[i]) + return _TRUE; + } + break; + default: + break; + }; + return _FALSE; +} + +/* + * rtw_validate_value: validate the IE contain. + * + * Input : + * EID : Element ID + * p : IE buffer (without EID & length) + * len : IE length + * return: + * _TRUE : All Values are validated. + * _FALSE : At least one value is NOT validated. + */ +bool rtw_validate_value(u16 EID, u8 *p, u16 len) +{ + u8 rate; + u32 i, nr_val; + + switch (EID) { + case _EXT_SUPPORTEDRATES_IE_: + case _SUPPORTEDRATES_IE_: + nr_val = len; + for (i=0; iSsid.SsidLength == 0) || + is_all_null(snetwork->Ssid.Ssid, snetwork->Ssid.SsidLength) == _TRUE); +} + +/* + Get SSID if this ilegal frame(probe resp) comes from a hidden SSID AP. + Update the SSID to the corresponding pnetwork in scan queue. +*/ +void rtw_absorb_ssid_ifneed(_adapter *padapter, WLAN_BSSID_EX *bssid, u8 *pframe) +{ + struct wlan_network *scanned = NULL; + WLAN_BSSID_EX *snetwork; + u8 ie_offset, *p=NULL, *next_ie=NULL, *mac = get_addr2_ptr(pframe); + sint len, ssid_len_ori; + u32 remain_len = 0; + u8 backupIE[MAX_IE_SZ]; + u16 subtype = get_frame_sub_type(pframe); + _irqL irqL; + + if ((!bssid) || (!pframe)) + return; + + if (subtype == WIFI_BEACON) { + bssid->Reserved[0] = BSS_TYPE_BCN; + ie_offset = _BEACON_IE_OFFSET_; + } else { + /* FIXME : more type */ + if (subtype == WIFI_PROBERSP) { + ie_offset = _PROBERSP_IE_OFFSET_; + bssid->Reserved[0] = BSS_TYPE_PROB_RSP; + } else if (subtype == WIFI_PROBEREQ) { + ie_offset = _PROBEREQ_IE_OFFSET_; + bssid->Reserved[0] = BSS_TYPE_PROB_REQ; + } else { + bssid->Reserved[0] = BSS_TYPE_UNDEF; + ie_offset = _FIXED_IE_LENGTH_; + } + } + + _enter_critical_bh(&padapter->mlmepriv.scanned_queue.lock, &irqL); + scanned = _rtw_find_network(&padapter->mlmepriv.scanned_queue, mac); + if (!scanned) { + _exit_critical_bh(&padapter->mlmepriv.scanned_queue.lock, &irqL); + return; + } + + snetwork = &(scanned->network); + /* scan queue records as Hidden SSID && Input frame is NOT Hidden SSID */ + if (hidden_ssid_ap(snetwork) && !hidden_ssid_ap(bssid)) { + p = rtw_get_ie(snetwork->IEs+ie_offset, _SSID_IE_, &ssid_len_ori, snetwork->IELength-ie_offset); + if (!p) { + _exit_critical_bh(&padapter->mlmepriv.scanned_queue.lock, &irqL); + return; + } + next_ie = p + 2 + ssid_len_ori; + remain_len = snetwork->IELength - (next_ie - snetwork->IEs); + scanned->network.Ssid.SsidLength = bssid->Ssid.SsidLength; + _rtw_memcpy(scanned->network.Ssid.Ssid, bssid->Ssid.Ssid, bssid->Ssid.SsidLength); + + //update pnetwork->ssid, pnetwork->ssidlen + _rtw_memcpy(backupIE, next_ie, remain_len); + *(p+1) = bssid->Ssid.SsidLength; + _rtw_memcpy(p+2, bssid->Ssid.Ssid, bssid->Ssid.SsidLength); + _rtw_memcpy(p+2+bssid->Ssid.SsidLength, backupIE, remain_len); + snetwork->IELength += bssid->Ssid.SsidLength; + } + _exit_critical_bh(&padapter->mlmepriv.scanned_queue.lock, &irqL); +} + +#ifdef DBG_RX_BCN +void rtw_debug_rx_bcn(_adapter *adapter, u8 *pframe, u32 packet_len) +{ + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + struct mlme_ext_info *mlmeinfo = &(pmlmeext->mlmext_info); + u16 sn = ((struct rtw_ieee80211_hdr_3addr *)pframe)->seq_ctl >> 4; + u64 tsf, tsf_offset; + u8 dtim_cnt, dtim_period, tim_bmap, tim_pvbit; + + update_TSF(pmlmeext, pframe, packet_len); + tsf = pmlmeext->TSFValue; + tsf_offset = rtw_modular64(pmlmeext->TSFValue, (mlmeinfo->bcn_interval * 1024)); + + /*get TIM IE*/ + /*DTIM Count*/ + dtim_cnt = pmlmeext->tim[0]; + /*DTIM Period*/ + dtim_period = pmlmeext->tim[1]; + /*Bitmap*/ + tim_bmap = pmlmeext->tim[2]; + /*Partial VBitmap AID 0 ~ 7*/ + tim_pvbit = pmlmeext->tim[3]; + + RTW_INFO("[BCN] SN-%d, TSF-%lld(us), offset-%lld, bcn_interval-%d DTIM-%d[%d] bitmap-0x%02x-0x%02x\n", + sn, tsf, tsf_offset, mlmeinfo->bcn_interval, dtim_period, dtim_cnt, tim_bmap, tim_pvbit); +} +#endif + /* * rtw_get_bcn_keys: get beacon keys from recv frame * @@ -2264,61 +2534,47 @@ int rtw_get_bcn_keys(ADAPTER *Adapter, u8 *pframe, u32 packet_len, recv_beacon->encryp_protocol = ENCRYP_PROTOCOL_WPA2; rtw_parse_wpa2_ie(elems.rsn_ie - 2, elems.rsn_ie_len + 2, &recv_beacon->group_cipher, &recv_beacon->pairwise_cipher, - &recv_beacon->is_8021x, NULL); + &recv_beacon->akm, NULL); } /* checking WPA secon */ else if (elems.wpa_ie && elems.wpa_ie_len) { recv_beacon->encryp_protocol = ENCRYP_PROTOCOL_WPA; rtw_parse_wpa_ie(elems.wpa_ie - 2, elems.wpa_ie_len + 2, &recv_beacon->group_cipher, &recv_beacon->pairwise_cipher, - &recv_beacon->is_8021x); + &recv_beacon->akm); } else if (capability & BIT(4)) recv_beacon->encryp_protocol = ENCRYP_PROTOCOL_WEP; + if (elems.tim && elems.tim_len) { + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + + #ifdef DBG_RX_BCN + _rtw_memcpy(pmlmeext->tim, elems.tim, 4); + #endif + pmlmeext->dtim = elems.tim[1]; + } + return _TRUE; } void rtw_dump_bcn_keys(struct beacon_keys *recv_beacon) { - int i; - char *p; u8 ssid[IW_ESSID_MAX_SIZE + 1]; _rtw_memcpy(ssid, recv_beacon->ssid, recv_beacon->ssid_len); ssid[recv_beacon->ssid_len] = '\0'; RTW_INFO("%s: ssid = %s\n", __func__, ssid); - RTW_INFO("%s: channel = %x\n", __func__, recv_beacon->bcn_channel); - RTW_INFO("%s: ht_cap = %x\n", __func__, recv_beacon->ht_cap_info); - RTW_INFO("%s: ht_info_infos_0_sco = %x\n", __func__, recv_beacon->ht_info_infos_0_sco); - RTW_INFO("%s: sec=%d, group = %x, pair = %x, 8021X = %x\n", __func__, + RTW_INFO("%s: channel = %d\n", __func__, recv_beacon->bcn_channel); + RTW_INFO("%s: ht_cap = 0x%04x\n", __func__, recv_beacon->ht_cap_info); + RTW_INFO("%s: ht_info_infos_0_sco = 0x%02x\n", __func__, recv_beacon->ht_info_infos_0_sco); + RTW_INFO("%s: sec=%d, group = %x, pair = %x, akm = %x\n", __func__, recv_beacon->encryp_protocol, recv_beacon->group_cipher, - recv_beacon->pairwise_cipher, recv_beacon->is_8021x); + recv_beacon->pairwise_cipher, recv_beacon->akm); } - +#define DBG_BCN_CNT int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) { -#if 0 - unsigned int len; - unsigned char *p; - unsigned short val16, subtype; - struct wlan_network *cur_network = &(Adapter->mlmepriv.cur_network); - /* u8 wpa_ie[255],rsn_ie[255]; */ - u16 wpa_len = 0, rsn_len = 0; - u8 encryp_protocol = 0; - WLAN_BSSID_EX *bssid; - int group_cipher = 0, pairwise_cipher = 0, is_8021x = 0; - unsigned char *pbuf; - u32 wpa_ielen = 0; - u8 *pbssid = GetAddr3Ptr(pframe); - u32 hidden_ssid = 0; - u8 cur_network_type, network_type = 0; - struct HT_info_element *pht_info = NULL; - struct rtw_ieee80211_ht_cap *pht_cap = NULL; - u32 bcn_channel; - unsigned short ht_cap_info; - unsigned char ht_info_infos_0; -#endif unsigned int len; u8 *pbssid = GetAddr3Ptr(pframe); struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; @@ -2344,13 +2600,17 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) if (rtw_get_bcn_keys(Adapter, pframe, packet_len, &recv_beacon) == _FALSE) return _TRUE; /* parsing failed => broken IE */ +#ifdef DBG_RX_BCN + rtw_debug_bcn(Adapter, pframe, packet_len); +#endif + /* don't care hidden ssid, use current beacon ssid directly */ if (recv_beacon.ssid_len == 0) { _rtw_memcpy(recv_beacon.ssid, pmlmepriv->cur_beacon_keys.ssid, pmlmepriv->cur_beacon_keys.ssid_len); recv_beacon.ssid_len = pmlmepriv->cur_beacon_keys.ssid_len; } - +#ifdef CONFIG_BCN_CNT_CONFIRM_HDL if (_rtw_memcmp(&recv_beacon, &pmlmepriv->cur_beacon_keys, sizeof(recv_beacon)) == _TRUE) pmlmepriv->new_beacon_cnts = 0; else if ((pmlmepriv->new_beacon_cnts == 0) || @@ -2365,7 +2625,7 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) RTW_DBG("%s: new beacon key\n", __func__); RTW_DBG_EXPR(rtw_dump_bcn_keys(&recv_beacon)); - memcpy(&pmlmepriv->new_beacon_keys, &recv_beacon, sizeof(recv_beacon)); + _rtw_memcpy(&pmlmepriv->new_beacon_keys, &recv_beacon, sizeof(recv_beacon)); pmlmepriv->new_beacon_cnts = 1; } else { RTW_DBG("%s: new beacon again (seq=%d)\n", __func__, GetSequence(pframe)); @@ -2373,7 +2633,11 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) } /* if counter >= max, it means beacon is changed really */ - if (pmlmepriv->new_beacon_cnts >= new_bcn_max) { + if (pmlmepriv->new_beacon_cnts >= new_bcn_max) +#else + if (_rtw_memcmp(&recv_beacon, &pmlmepriv->cur_beacon_keys, sizeof(recv_beacon)) == _FALSE) +#endif + { /* check bw mode change only? */ pmlmepriv->cur_beacon_keys.ht_cap_info = recv_beacon.ht_cap_info; pmlmepriv->cur_beacon_keys.ht_info_infos_0_sco = recv_beacon.ht_info_infos_0_sco; @@ -2381,204 +2645,35 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) sizeof(recv_beacon)) == _FALSE) { /* beacon is changed, have to do disconnect/connect */ RTW_WARN("%s: new beacon occur!!\n", __func__); + #ifdef DBG_BCN_CNT + rtw_dump_bcn_keys(&recv_beacon); + #endif return _FAIL; } - + #ifdef DBG_BCN_CNT RTW_INFO("%s bw mode change\n", __func__); RTW_INFO("%s bcn now: ht_cap_info:%x ht_info_infos_0:%x\n", __func__, cur_network->BcnInfo.ht_cap_info, cur_network->BcnInfo.ht_info_infos_0); + #endif cur_network->BcnInfo.ht_cap_info = recv_beacon.ht_cap_info; cur_network->BcnInfo.ht_info_infos_0 = (cur_network->BcnInfo.ht_info_infos_0 & (~0x03)) | recv_beacon.ht_info_infos_0_sco; + #ifdef DBG_BCN_CNT RTW_INFO("%s bcn link: ht_cap_info:%x ht_info_infos_0:%x\n", __func__, cur_network->BcnInfo.ht_cap_info, cur_network->BcnInfo.ht_info_infos_0); - - memcpy(&pmlmepriv->cur_beacon_keys, &recv_beacon, sizeof(recv_beacon)); + #endif + _rtw_memcpy(&pmlmepriv->cur_beacon_keys, &recv_beacon, sizeof(recv_beacon)); + #ifdef CONFIG_BCN_CNT_CONFIRM_HDL pmlmepriv->new_beacon_cnts = 0; + #endif } return _SUCCESS; - -#if 0 - bssid = (WLAN_BSSID_EX *)rtw_zmalloc(sizeof(WLAN_BSSID_EX)); - if (bssid == NULL) { - RTW_INFO("%s rtw_zmalloc fail !!!\n", __func__); - return _TRUE; - } - - if ((pmlmepriv->timeBcnInfoChkStart != 0) && (rtw_get_passing_time_ms(pmlmepriv->timeBcnInfoChkStart) > DISCONNECT_BY_CHK_BCN_FAIL_OBSERV_PERIOD_IN_MS)) { - pmlmepriv->timeBcnInfoChkStart = 0; - pmlmepriv->NumOfBcnInfoChkFail = 0; - } - - subtype = get_frame_sub_type(pframe) >> 4; - - if (subtype == WIFI_BEACON) - bssid->Reserved[0] = 1; - - bssid->Length = sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + len; - - /* below is to copy the information element */ - bssid->IELength = len; - _rtw_memcpy(bssid->IEs, (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)), bssid->IELength); - - /* check bw and channel offset */ - /* parsing HT_CAP_IE */ - p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_CAPABILITY_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); - if (p && len > 0) { - pht_cap = (struct rtw_ieee80211_ht_cap *)(p + 2); - ht_cap_info = pht_cap->cap_info; - } else - ht_cap_info = 0; - /* parsing HT_INFO_IE */ - p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_ADD_INFO_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); - if (p && len > 0) { - pht_info = (struct HT_info_element *)(p + 2); - ht_info_infos_0 = pht_info->infos[0]; - } else - ht_info_infos_0 = 0; - if (ht_cap_info != cur_network->BcnInfo.ht_cap_info || - ((ht_info_infos_0 & 0x03) != (cur_network->BcnInfo.ht_info_infos_0 & 0x03))) { - RTW_INFO("%s bcn now: ht_cap_info:%x ht_info_infos_0:%x\n", __func__, - ht_cap_info, ht_info_infos_0); - RTW_INFO("%s bcn link: ht_cap_info:%x ht_info_infos_0:%x\n", __func__, - cur_network->BcnInfo.ht_cap_info, cur_network->BcnInfo.ht_info_infos_0); - RTW_INFO("%s bw mode change\n", __func__); - { - /* bcn_info_update */ - cur_network->BcnInfo.ht_cap_info = ht_cap_info; - cur_network->BcnInfo.ht_info_infos_0 = ht_info_infos_0; - /* to do : need to check that whether modify related register of BB or not */ - } - /* goto _mismatch; */ - } - - /* Checking for channel */ - p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _DSSET_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); - if (p) - bcn_channel = *(p + 2); - else {/* In 5G, some ap do not have DSSET IE checking HT info for channel */ - rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_ADD_INFO_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); - if (pht_info) - bcn_channel = pht_info->primary_channel; - else { /* we don't find channel IE, so don't check it */ - /* RTW_INFO("Oops: %s we don't find channel IE, so don't check it\n", __func__); */ - bcn_channel = Adapter->mlmeextpriv.cur_channel; - } - } - if (bcn_channel != Adapter->mlmeextpriv.cur_channel) { - RTW_INFO("%s beacon channel:%d cur channel:%d disconnect\n", __func__, - bcn_channel, Adapter->mlmeextpriv.cur_channel); - goto _mismatch; - } - - /* checking SSID */ - p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _SSID_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); - if (p == NULL) { - RTW_INFO("%s marc: cannot find SSID for survey event\n", __func__); - hidden_ssid = _TRUE; - } else - hidden_ssid = _FALSE; - - if ((NULL != p) && (_FALSE == hidden_ssid && (*(p + 1)))) { - _rtw_memcpy(bssid->Ssid.Ssid, (p + 2), *(p + 1)); - bssid->Ssid.SsidLength = *(p + 1); - } else { - bssid->Ssid.SsidLength = 0; - bssid->Ssid.Ssid[0] = '\0'; - } - - - if (_rtw_memcmp(bssid->Ssid.Ssid, cur_network->network.Ssid.Ssid, 32) == _FALSE || - bssid->Ssid.SsidLength != cur_network->network.Ssid.SsidLength) { - if (bssid->Ssid.Ssid[0] != '\0' && bssid->Ssid.SsidLength != 0) { /* not hidden ssid */ - RTW_INFO("%s(), SSID is not match\n", __func__); - goto _mismatch; - } - } - - /* check encryption info */ - val16 = rtw_get_capability((WLAN_BSSID_EX *)bssid); - - if (val16 & BIT(4)) - bssid->Privacy = 1; - else - bssid->Privacy = 0; - - if (cur_network->network.Privacy != bssid->Privacy) { - RTW_INFO("%s(), privacy is not match\n", __func__); - goto _mismatch; - } - - rtw_get_sec_ie(bssid->IEs, bssid->IELength, NULL, &rsn_len, NULL, &wpa_len); - - if (rsn_len > 0) - encryp_protocol = ENCRYP_PROTOCOL_WPA2; - else if (wpa_len > 0) - encryp_protocol = ENCRYP_PROTOCOL_WPA; - else { - if (bssid->Privacy) - encryp_protocol = ENCRYP_PROTOCOL_WEP; - } - - if (cur_network->BcnInfo.encryp_protocol != encryp_protocol) { - RTW_INFO("%s(): enctyp is not match\n", __func__); - goto _mismatch; - } - - if (encryp_protocol == ENCRYP_PROTOCOL_WPA || encryp_protocol == ENCRYP_PROTOCOL_WPA2) { - pbuf = rtw_get_wpa_ie(&bssid->IEs[12], &wpa_ielen, bssid->IELength - 12); - if (pbuf && (wpa_ielen > 0)) { - rtw_parse_wpa_ie(pbuf, wpa_ielen + 2, &group_cipher, &pairwise_cipher, &is_8021x); - } else { - pbuf = rtw_get_wpa2_ie(&bssid->IEs[12], &wpa_ielen, bssid->IELength - 12); - - if (pbuf && (wpa_ielen > 0)) { - rtw_parse_wpa2_ie(pbuf, wpa_ielen + 2, &group_cipher, &pairwise_cipher, &is_8021x, NULL); - } - } - - if (pairwise_cipher != cur_network->BcnInfo.pairwise_cipher || group_cipher != cur_network->BcnInfo.group_cipher) { - RTW_INFO("%s pairwise_cipher(%x:%x) or group_cipher(%x:%x) is not match\n", __func__, - pairwise_cipher, cur_network->BcnInfo.pairwise_cipher, - group_cipher, cur_network->BcnInfo.group_cipher); - goto _mismatch; - } - - if (is_8021x != cur_network->BcnInfo.is_8021x) { - RTW_INFO("%s authentication is not match\n", __func__); - goto _mismatch; - } - } - - rtw_mfree((u8 *)bssid, sizeof(WLAN_BSSID_EX)); - return _SUCCESS; - -_mismatch: - rtw_mfree((u8 *)bssid, sizeof(WLAN_BSSID_EX)); - - if (pmlmepriv->NumOfBcnInfoChkFail == 0) - pmlmepriv->timeBcnInfoChkStart = rtw_get_current_time(); - - pmlmepriv->NumOfBcnInfoChkFail++; - RTW_INFO("%s by "ADPT_FMT" - NumOfChkFail = %d (SeqNum of this Beacon frame = %d).\n", __func__, ADPT_ARG(Adapter), pmlmepriv->NumOfBcnInfoChkFail, GetSequence(pframe)); - - if ((pmlmepriv->timeBcnInfoChkStart != 0) && (rtw_get_passing_time_ms(pmlmepriv->timeBcnInfoChkStart) <= DISCONNECT_BY_CHK_BCN_FAIL_OBSERV_PERIOD_IN_MS) - && (pmlmepriv->NumOfBcnInfoChkFail >= DISCONNECT_BY_CHK_BCN_FAIL_THRESHOLD)) { - RTW_INFO("%s by "ADPT_FMT" - NumOfChkFail = %d >= threshold : %d (in %d ms), return FAIL.\n", __func__, ADPT_ARG(Adapter), pmlmepriv->NumOfBcnInfoChkFail, - DISCONNECT_BY_CHK_BCN_FAIL_THRESHOLD, rtw_get_passing_time_ms(pmlmepriv->timeBcnInfoChkStart)); - pmlmepriv->timeBcnInfoChkStart = 0; - pmlmepriv->NumOfBcnInfoChkFail = 0; - return _FAIL; - } - - return _SUCCESS; -#endif } void update_beacon_info(_adapter *padapter, u8 *pframe, uint pkt_len, struct sta_info *psta) @@ -2638,11 +2733,13 @@ void update_beacon_info(_adapter *padapter, u8 *pframe, uint pkt_len, struct sta #ifdef CONFIG_DFS void process_csa_ie(_adapter *padapter, u8 *ies, uint ies_len) { + struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); unsigned int i; PNDIS_802_11_VARIABLE_IEs pIE; - u8 new_ch_no = 0; + u8 ch = 0; - if (padapter->mlmepriv.handle_dfs == _TRUE) + /* TODO: compare with scheduling CSA */ + if (rfctl->csa_ch) return; for (i = 0; i + 1 < ies_len;) { @@ -2650,9 +2747,7 @@ void process_csa_ie(_adapter *padapter, u8 *ies, uint ies_len) switch (pIE->ElementID) { case _CH_SWTICH_ANNOUNCE_: - padapter->mlmepriv.handle_dfs = _TRUE; - _rtw_memcpy(&new_ch_no, pIE->data + 1, 1); - rtw_set_csa_cmd(padapter, new_ch_no); + ch = *(pIE->data + 1); break; default: break; @@ -2660,9 +2755,65 @@ void process_csa_ie(_adapter *padapter, u8 *ies, uint ies_len) i += (pIE->Length + 2); } + + if (ch != 0) { + rfctl->csa_ch = ch; + if (rtw_set_csa_cmd(padapter) != _SUCCESS) + rfctl->csa_ch = 0; + } } #endif /* CONFIG_DFS */ +void parsing_eapol_packet(_adapter *padapter, u8 *key_payload, struct sta_info *psta, u8 trx_type) +{ + struct security_priv *psecuritypriv = &(padapter->securitypriv); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct sta_priv *pstapriv = &(padapter->stapriv); + struct ieee802_1x_hdr *hdr; + struct wpa_eapol_key *key; + u16 key_info, key_data_length; + char *trx_msg = trx_type ? "send" : "recv"; + + hdr = (struct ieee802_1x_hdr *) key_payload; + + /* WPS - eapol start packet */ + if (hdr->type == 1 && hdr->length == 0) { + RTW_INFO("%s eapol start packet\n", trx_msg); + return; + } + + if (hdr->type == 0) { /* WPS - eapol packet */ + RTW_INFO("%s eapol packet\n", trx_msg); + return; + } + + key = (struct wpa_eapol_key *) (hdr + 1); + key_info = be16_to_cpu(*((u16 *)(key->key_info))); + key_data_length = be16_to_cpu(*((u16 *)(key->key_data_length))); + + if (!(key_info & WPA_KEY_INFO_KEY_TYPE)) { /* WPA group key handshake */ + if (key_info & WPA_KEY_INFO_ACK) { + RTW_PRINT("%s eapol packet - WPA Group Key 1/2\n", trx_msg); + } else { + RTW_PRINT("%s eapol packet - WPA Group Key 2/2\n", trx_msg); + + /* WPA key-handshake has completed */ + if (psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPAPSK) + psta->state &= (~WIFI_UNDER_KEY_HANDSHAKE); + } + } else if (key_info & WPA_KEY_INFO_MIC) { + if (key_data_length == 0) + RTW_PRINT("%s eapol packet 4/4\n", trx_msg); + else if (key_info & WPA_KEY_INFO_ACK) + RTW_PRINT("%s eapol packet 3/4\n", trx_msg); + else + RTW_PRINT("%s eapol packet 2/4\n", trx_msg); + } else { + RTW_PRINT("%s eapol packet 1/4\n", trx_msg); + } + +} + unsigned int is_ap_in_tkip(_adapter *padapter) { u32 i; @@ -2926,10 +3077,6 @@ void update_tx_basic_rate(_adapter *padapter, u8 wirelessmode) if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) return; #endif /* CONFIG_P2P */ -#ifdef CONFIG_INTEL_WIDI - if (padapter->mlmepriv.widi_state != INTEL_WIDI_STATE_NONE) - return; -#endif /* CONFIG_INTEL_WIDI */ _rtw_memset(supported_rates, 0, NDIS_802_11_LENGTH_RATES_EX); @@ -3027,6 +3174,81 @@ unsigned char check_assoc_AP(u8 *pframe, uint len) return HT_IOT_PEER_UNKNOWN; } +void get_assoc_AP_Vendor(char *vendor, u8 assoc_AP_vendor) +{ + switch (assoc_AP_vendor) { + + case HT_IOT_PEER_UNKNOWN: + sprintf(vendor, "%s", "unknown"); + break; + + case HT_IOT_PEER_REALTEK: + case HT_IOT_PEER_REALTEK_92SE: + case HT_IOT_PEER_REALTEK_SOFTAP: + case HT_IOT_PEER_REALTEK_JAGUAR_BCUTAP: + case HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP: + + sprintf(vendor, "%s", "Realtek"); + break; + + case HT_IOT_PEER_BROADCOM: + sprintf(vendor, "%s", "Broadcom"); + break; + + case HT_IOT_PEER_MARVELL: + sprintf(vendor, "%s", "Marvell"); + break; + + case HT_IOT_PEER_RALINK: + sprintf(vendor, "%s", "Ralink"); + break; + + case HT_IOT_PEER_CISCO: + sprintf(vendor, "%s", "Cisco"); + break; + + case HT_IOT_PEER_AIRGO: + sprintf(vendor, "%s", "Airgo"); + break; + + case HT_IOT_PEER_ATHEROS: + sprintf(vendor, "%s", "Atheros"); + break; + + default: + sprintf(vendor, "%s", "unkown"); + break; + } + +} +#ifdef CONFIG_RTS_FULL_BW +void rtw_parse_sta_vendor_ie_8812(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len) +{ + struct mlme_priv *mlme = &adapter->mlmepriv; + unsigned char REALTEK_OUI[] = {0x00,0xe0, 0x4c}; + u8 *p; + int i; + + p = rtw_get_ie_ex(tlv_ies, tlv_ies_len, WLAN_EID_VENDOR_SPECIFIC, REALTEK_OUI, 3, NULL, NULL); + if (!p) + goto exit; + else { + if(*(p+1) > 6 ) { + + if(*(p+6) != 2) + goto exit; + + if(*(p+8) == RT_HT_CAP_USE_JAGUAR_BCUT) + sta->vendor_8812 = TRUE; + else if (*(p+8) == RT_HT_CAP_USE_JAGUAR_CCUT) + sta->vendor_8812 = TRUE; + } + } +exit: + return; +} +#endif/*CONFIG_RTS_FULL_BW*/ + #ifdef CONFIG_80211AC_VHT unsigned char get_vht_mu_bfer_cap(u8 *pframe, uint len) { @@ -3150,6 +3372,9 @@ void update_wireless_mode(_adapter *padapter) pmlmeext->cur_wireless_mode = network_type & padapter->registrypriv.wireless_mode; /* RTW_INFO("network_type=%02x, padapter->registrypriv.wireless_mode=%02x\n", network_type, padapter->registrypriv.wireless_mode); */ + +#ifndef RTW_HALMAC + /* HALMAC IC do not set HW_VAR_RESP_SIFS here */ #if 0 if ((pmlmeext->cur_wireless_mode == WIRELESS_11G) || (pmlmeext->cur_wireless_mode == WIRELESS_11BG)) /* WIRELESS_MODE_G) */ @@ -3162,6 +3387,7 @@ void update_wireless_mode(_adapter *padapter) * change this value if having IOT issues. */ rtw_hal_set_hwreg(padapter, HW_VAR_RESP_SIFS, (u8 *)&SIFS_Timer); +#endif rtw_hal_set_hwreg(padapter, HW_VAR_WIRELESS_MODE, (u8 *)&(pmlmeext->cur_wireless_mode)); @@ -3220,26 +3446,71 @@ void update_sta_basic_rate(struct sta_info *psta, u8 wireless_mode) int rtw_ies_get_supported_rate(u8 *ies, uint ies_len, u8 *rate_set, u8 *rate_num) { - u8 *ie; + u8 *ie, *p; unsigned int ie_len; + int i, j; + struct support_rate_handler support_rate_tbl[] = { + {IEEE80211_CCK_RATE_1MB, _FALSE, _FALSE}, + {IEEE80211_CCK_RATE_2MB, _FALSE, _FALSE}, + {IEEE80211_CCK_RATE_5MB, _FALSE, _FALSE}, + {IEEE80211_CCK_RATE_11MB, _FALSE, _FALSE}, + {IEEE80211_OFDM_RATE_6MB, _FALSE, _FALSE}, + {IEEE80211_OFDM_RATE_9MB, _FALSE, _FALSE}, + {IEEE80211_OFDM_RATE_12MB, _FALSE, _FALSE}, + {IEEE80211_OFDM_RATE_18MB, _FALSE, _FALSE}, + {IEEE80211_OFDM_RATE_24MB, _FALSE, _FALSE}, + {IEEE80211_OFDM_RATE_36MB, _FALSE, _FALSE}, + {IEEE80211_OFDM_RATE_48MB, _FALSE, _FALSE}, + {IEEE80211_OFDM_RATE_54MB, _FALSE, _FALSE}, + }; + if (!rate_set || !rate_num) return _FALSE; *rate_num = 0; - ie = rtw_get_ie(ies, _SUPPORTEDRATES_IE_, &ie_len, ies_len); if (ie == NULL) goto ext_rate; - _rtw_memcpy(rate_set, ie + 2, ie_len); - *rate_num = ie_len; + /* get valid supported rates */ + for (i = 0; i < 12; i++) { + p = ie + 2; + for (j = 0; j < ie_len; j++) { + if ((*p & ~BIT(7)) == support_rate_tbl[i].rate){ + support_rate_tbl[i].existence = _TRUE; + if ((*p) & BIT(7)) + support_rate_tbl[i].basic = _TRUE; + } + p++; + } + } ext_rate: ie = rtw_get_ie(ies, _EXT_SUPPORTEDRATES_IE_, &ie_len, ies_len); if (ie) { - _rtw_memcpy(rate_set + *rate_num, ie + 2, ie_len); - *rate_num += ie_len; + /* get valid extended supported rates */ + for (i = 0; i < 12; i++) { + p = ie + 2; + for (j = 0; j < ie_len; j++) { + if ((*p & ~BIT(7)) == support_rate_tbl[i].rate){ + support_rate_tbl[i].existence = _TRUE; + if ((*p) & BIT(7)) + support_rate_tbl[i].basic = _TRUE; + } + p++; + } + } + } + + for (i = 0; i < 12; i++){ + if (support_rate_tbl[i].existence){ + if (support_rate_tbl[i].basic) + rate_set[*rate_num] = support_rate_tbl[i].rate | IEEE80211_BASIC_RATE_MASK; + else + rate_set[*rate_num] = support_rate_tbl[i].rate; + *rate_num += 1; + } } if (*rate_num == 0) @@ -3261,8 +3532,6 @@ void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr) u16 tid, start_seq, param; struct sta_priv *pstapriv = &padapter->stapriv; struct ADDBA_request *preq = (struct ADDBA_request *)paddba_req; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 size, accept = _FALSE; psta = rtw_get_stainfo(pstapriv, addr); @@ -3294,7 +3563,6 @@ exit: void rtw_process_bar_frame(_adapter *padapter, union recv_frame *precv_frame) { - struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; struct sta_priv *pstapriv = &padapter->stapriv; u8 *pframe = precv_frame->u.hdr.rx_data; struct sta_info *psta = NULL; @@ -3334,101 +3602,39 @@ void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len) pmlmeext->TSFValue |= le32_to_cpu(*pbuf); } -void correct_TSF(_adapter *padapter, struct mlme_ext_priv *pmlmeext) +void correct_TSF(_adapter *padapter, u8 mlme_state) { - rtw_hal_set_hwreg(padapter, HW_VAR_CORRECT_TSF, 0); + u8 m_state = mlme_state; + + rtw_hal_set_hwreg(padapter, HW_VAR_CORRECT_TSF, (u8 *)&m_state); } -void adaptive_early_32k(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len) +#ifdef CONFIG_BCN_RECV_TIME +/* calculate beacon receiving time + 1.RxBCNTime(CCK_1M) = [192us(preamble)] + [length of beacon(byte)*8us] + [10us] + 2.RxBCNTime(OFDM_6M) = [8us(S) + 8us(L) + 4us(L-SIG)] + [(length of beacon(byte)/3 + 1] *4us] + [10us] +*/ +inline u16 _rx_bcn_time_calculate(uint bcn_len, u8 data_rate) { - int i; - u8 *pIE; - u32 *pbuf; - u64 tsf = 0; - u32 delay_ms; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - - pmlmeext->bcn_cnt++; - - pIE = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); - pbuf = (u32 *)pIE; - - tsf = le32_to_cpu(*(pbuf + 1)); - tsf = tsf << 32; - tsf |= le32_to_cpu(*pbuf); - - /* RTW_INFO("%s(): tsf_upper= 0x%08x, tsf_lower=0x%08x\n", __func__, (u32)(tsf>>32), (u32)tsf); */ - - /* delay = (timestamp mod 1024*100)/1000 (unit: ms) */ - /* delay_ms = do_div(tsf, (pmlmeinfo->bcn_interval*1024))/1000; */ - delay_ms = rtw_modular64(tsf, (pmlmeinfo->bcn_interval * 1024)); - delay_ms = delay_ms / 1000; - - if (delay_ms >= 8) { - pmlmeext->bcn_delay_cnt[8]++; - /* pmlmeext->bcn_delay_ratio[8] = (pmlmeext->bcn_delay_cnt[8] * 100) /pmlmeext->bcn_cnt; */ - } else { - pmlmeext->bcn_delay_cnt[delay_ms]++; - /* pmlmeext->bcn_delay_ratio[delay_ms] = (pmlmeext->bcn_delay_cnt[delay_ms] * 100) /pmlmeext->bcn_cnt; */ - } - - /* - RTW_INFO("%s(): (a)bcn_cnt = %d\n", __func__, pmlmeext->bcn_cnt); - - - for(i=0; i<9; i++) - { - RTW_INFO("%s():bcn_delay_cnt[%d]=%d, bcn_delay_ratio[%d]=%d\n", __func__, i, - pmlmeext->bcn_delay_cnt[i] , i, pmlmeext->bcn_delay_ratio[i]); - } - */ - - /* dump for adaptive_early_32k */ - if (pmlmeext->bcn_cnt > 100 && (pmlmeext->adaptive_tsf_done == _TRUE)) { - u8 ratio_20_delay, ratio_80_delay; - u8 DrvBcnEarly, DrvBcnTimeOut; - - ratio_20_delay = 0; - ratio_80_delay = 0; - DrvBcnEarly = 0xff; - DrvBcnTimeOut = 0xff; - - RTW_INFO("%s(): bcn_cnt = %d\n", __func__, pmlmeext->bcn_cnt); - - for (i = 0; i < 9; i++) { - pmlmeext->bcn_delay_ratio[i] = (pmlmeext->bcn_delay_cnt[i] * 100) / pmlmeext->bcn_cnt; - - - /* RTW_INFO("%s():bcn_delay_cnt[%d]=%d, bcn_delay_ratio[%d]=%d\n", __func__, i, */ - /* pmlmeext->bcn_delay_cnt[i] , i, pmlmeext->bcn_delay_ratio[i]); */ - - ratio_20_delay += pmlmeext->bcn_delay_ratio[i]; - ratio_80_delay += pmlmeext->bcn_delay_ratio[i]; - - if (ratio_20_delay > 20 && DrvBcnEarly == 0xff) { - DrvBcnEarly = i; - /* RTW_INFO("%s(): DrvBcnEarly = %d\n", __func__, DrvBcnEarly); */ - } - - if (ratio_80_delay > 80 && DrvBcnTimeOut == 0xff) { - DrvBcnTimeOut = i; - /* RTW_INFO("%s(): DrvBcnTimeOut = %d\n", __func__, DrvBcnTimeOut); */ - } - - /* reset adaptive_early_32k cnt */ - pmlmeext->bcn_delay_cnt[i] = 0; - pmlmeext->bcn_delay_ratio[i] = 0; - } - - pmlmeext->DrvBcnEarly = DrvBcnEarly; - pmlmeext->DrvBcnTimeOut = DrvBcnTimeOut; - - pmlmeext->bcn_cnt = 0; - } + u16 rx_bcn_time = 0;/*us*/ + if (data_rate == DESC_RATE1M) + rx_bcn_time = 192 + bcn_len * 8 + 10; + else if(data_rate == DESC_RATE6M) + rx_bcn_time = 8 + 8 + 4 + (bcn_len /3 + 1) * 4 + 10; +/* + else + RTW_ERR("%s invalid data rate(0x%02x)\n", __func__, data_rate); +*/ + return rx_bcn_time; } +void rtw_rx_bcn_time_update(_adapter *adapter, uint bcn_len, u8 data_rate) +{ + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + pmlmeext->bcn_rx_time = _rx_bcn_time_calculate(bcn_len, data_rate); +} +#endif void beacon_timing_control(_adapter *padapter) { @@ -3793,16 +3999,41 @@ u8 rtw_search_max_mac_id(_adapter *padapter) return max_mac_id; } -inline void rtw_macid_ctl_set_h2c_msr(struct macid_ctl_t *macid_ctl, u8 id, u8 h2c_msr) +inline u8 rtw_macid_ctl_set_h2c_msr(struct macid_ctl_t *macid_ctl, u8 id, u8 h2c_msr) { + u8 op_num_change_bmp = 0; + if (id >= macid_ctl->num) { rtw_warn_on(1); - return; + goto exit; + } + + if (GET_H2CCMD_MSRRPT_PARM_OPMODE(&macid_ctl->h2c_msr[id]) + && !GET_H2CCMD_MSRRPT_PARM_OPMODE(&h2c_msr) + ) { + u8 role = GET_H2CCMD_MSRRPT_PARM_ROLE(&macid_ctl->h2c_msr[id]); + + if (role < H2C_MSR_ROLE_MAX) { + macid_ctl->op_num[role]--; + op_num_change_bmp |= BIT(role); + } + } else if (!GET_H2CCMD_MSRRPT_PARM_OPMODE(&macid_ctl->h2c_msr[id]) + && GET_H2CCMD_MSRRPT_PARM_OPMODE(&h2c_msr) + ) { + u8 role = GET_H2CCMD_MSRRPT_PARM_ROLE(&h2c_msr); + + if (role < H2C_MSR_ROLE_MAX) { + macid_ctl->op_num[role]++; + op_num_change_bmp |= BIT(role); + } } macid_ctl->h2c_msr[id] = h2c_msr; if (0) RTW_INFO("macid:%u, h2c_msr:"H2C_MSR_FMT"\n", id, H2C_MSR_ARG(&macid_ctl->h2c_msr[id])); + +exit: + return op_num_change_bmp; } inline void rtw_macid_ctl_set_bw(struct macid_ctl_t *macid_ctl, u8 id, u8 bw) @@ -3883,6 +4114,7 @@ inline void rtw_macid_ctl_init(struct macid_ctl_t *macid_ctl) inline void rtw_macid_ctl_deinit(struct macid_ctl_t *macid_ctl) { + _rtw_spinlock_free(&macid_ctl->lock); } inline bool rtw_bmp_is_set(const u8 *bmp, u8 bmp_len, u8 id) @@ -4746,3 +4978,16 @@ void rtw_dev_pno_debug(struct net_device *net) } #endif /* CONFIG_PNO_SET_DEBUG */ #endif /* CONFIG_PNO_SUPPORT */ + +inline void rtw_collect_bcn_info(_adapter *adapter) +{ + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + + if (!is_client_associated_to_ap(adapter)) + return; + + pmlmeext->cur_bcn_cnt = pmlmeext->bcn_cnt - pmlmeext->last_bcn_cnt; + pmlmeext->last_bcn_cnt = pmlmeext->bcn_cnt; + /*TODO get offset of bcn's timestamp*/ + /*pmlmeext->bcn_timestamp;*/ +} diff --git a/core/rtw_xmit.c b/core/rtw_xmit.c index 033032e..dd8b357 100644 --- a/core/rtw_xmit.c +++ b/core/rtw_xmit.c @@ -1,6 +1,6 @@ /****************************************************************************** * - * Copyright(c) 2007 - 2017 Realtek Corporation. + * Copyright(c) 2007 - 2019 Realtek Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as @@ -17,11 +17,6 @@ #include #include -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) - #error "Shall be Linux or Windows, but not both!\n" -#endif - - static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 }; static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 }; @@ -65,6 +60,8 @@ void rtw_init_xmit_block(_adapter *padapter) void rtw_free_xmit_block(_adapter *padapter) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + + _rtw_spinlock_free(&dvobj->xmit_block_lock); } s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter) @@ -355,8 +352,24 @@ exit: return res; } +void rtw_mfree_xmit_priv_lock(struct xmit_priv *pxmitpriv); void rtw_mfree_xmit_priv_lock(struct xmit_priv *pxmitpriv) { + _rtw_spinlock_free(&pxmitpriv->lock); + _rtw_free_sema(&pxmitpriv->xmit_sema); + + _rtw_spinlock_free(&pxmitpriv->be_pending.lock); + _rtw_spinlock_free(&pxmitpriv->bk_pending.lock); + _rtw_spinlock_free(&pxmitpriv->vi_pending.lock); + _rtw_spinlock_free(&pxmitpriv->vo_pending.lock); + _rtw_spinlock_free(&pxmitpriv->bm_pending.lock); + + /* _rtw_spinlock_free(&pxmitpriv->legacy_dz_queue.lock); */ + /* _rtw_spinlock_free(&pxmitpriv->apsd_queue.lock); */ + + _rtw_spinlock_free(&pxmitpriv->free_xmit_queue.lock); + _rtw_spinlock_free(&pxmitpriv->free_xmitbuf_queue.lock); + _rtw_spinlock_free(&pxmitpriv->pending_xmitbuf_queue.lock); } @@ -403,6 +416,10 @@ void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv) } if (pxmitpriv->xframe_ext_alloc_addr) rtw_vmfree(pxmitpriv->xframe_ext_alloc_addr, NR_XMIT_EXTBUFF * sizeof(struct xmit_frame) + 4); + _rtw_spinlock_free(&pxmitpriv->free_xframe_ext_queue.lock); + + /* free xmit extension buff */ + _rtw_spinlock_free(&pxmitpriv->free_xmit_extbuf_queue.lock); pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf; for (i = 0; i < NR_XMIT_EXTBUFF; i++) { @@ -449,7 +466,6 @@ void rtw_get_adapter_tx_rate_bmp_by_bw(_adapter *adapter, u8 bw, u16 *r_bmp_cck_ { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); - struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; u8 fix_bw = 0xFF; u16 bmp_cck_ofdm = 0; u32 bmp_ht = 0; @@ -482,7 +498,6 @@ void rtw_get_adapter_tx_rate_bmp_by_bw(_adapter *adapter, u8 bw, u16 *r_bmp_cck_ /* TODO: mlmeext->tx_rate*/ -exit: if (r_bmp_cck_ofdm) *r_bmp_cck_ofdm = bmp_cck_ofdm; if (r_bmp_ht) @@ -903,8 +918,7 @@ static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattri pattrib->triggered = 0; pattrib->ampdu_spacing = 0; - /* qos_en, ht_en, init rate, ,bw, ch_offset, sgi */ - pattrib->qos_en = psta->qos_option; + /* ht_en, init rate, ,bw, ch_offset, sgi */ pattrib->raid = psta->cmn.ra_info.rate_id; @@ -916,23 +930,26 @@ static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattri pattrib->stbc = psta->cmn.stbc_en; #ifdef CONFIG_80211N_HT - pattrib->ht_en = psta->htpriv.ht_option; - pattrib->ch_offset = psta->htpriv.ch_offset; - pattrib->ampdu_en = _FALSE; + if(padapter->registrypriv.ht_enable && + is_supported_ht(padapter->registrypriv.wireless_mode)) { + pattrib->ht_en = psta->htpriv.ht_option; + pattrib->ch_offset = psta->htpriv.ch_offset; + pattrib->ampdu_en = _FALSE; - if (padapter->driver_ampdu_spacing != 0xFF) /* driver control AMPDU Density for peer sta's rx */ - pattrib->ampdu_spacing = padapter->driver_ampdu_spacing; - else - pattrib->ampdu_spacing = psta->htpriv.rx_ampdu_min_spacing; + if (padapter->driver_ampdu_spacing != 0xFF) /* driver control AMPDU Density for peer sta's rx */ + pattrib->ampdu_spacing = padapter->driver_ampdu_spacing; + else + pattrib->ampdu_spacing = psta->htpriv.rx_ampdu_min_spacing; - /* check if enable ampdu */ - if (pattrib->ht_en && psta->htpriv.ampdu_enable) { - if (psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) { - pattrib->ampdu_en = _TRUE; - if (psta->htpriv.tx_amsdu_enable == _TRUE) - pattrib->amsdu_ampdu_en = _TRUE; - else - pattrib->amsdu_ampdu_en = _FALSE; + /* check if enable ampdu */ + if (pattrib->ht_en && psta->htpriv.ampdu_enable) { + if (psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) { + pattrib->ampdu_en = _TRUE; + if (psta->htpriv.tx_amsdu_enable == _TRUE) + pattrib->amsdu_ampdu_en = _TRUE; + else + pattrib->amsdu_ampdu_en = _FALSE; + } } } #endif /* CONFIG_80211N_HT */ @@ -948,21 +965,18 @@ static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattri pattrib->raid = psta->cmn.ra_info.rate_id; #ifdef CONFIG_80211N_HT - pattrib->bwmode = rtw_get_tx_bw_mode(padapter, psta); - pattrib->ht_en = psta->htpriv.ht_option; - pattrib->ch_offset = psta->htpriv.ch_offset; - pattrib->sgi = query_ra_short_GI(psta, pattrib->bwmode); + if(padapter->registrypriv.ht_enable && + is_supported_ht(padapter->registrypriv.wireless_mode)) { + pattrib->bwmode = rtw_get_tx_bw_mode(padapter, psta); + pattrib->ht_en = psta->htpriv.ht_option; + pattrib->ch_offset = psta->htpriv.ch_offset; + pattrib->sgi = query_ra_short_GI(psta, pattrib->bwmode); + } #endif /* CONFIG_80211N_HT */ } #endif /* CONFIG_TDLS */ pattrib->retry_ctrl = _FALSE; - -#ifdef CONFIG_AUTO_AP_MODE - if (psta->isrc && psta->pid > 0) - pattrib->pctrl = _TRUE; -#endif - } static s32 update_attrib_sec_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta) @@ -1140,6 +1154,36 @@ u8 qos_acm(u8 acm_mask, u8 priority) return change_priority; } +#ifdef CONFIG_USER_PRIORITY_COMPLY_RFC4594_DSCP +/* refer to IEEE802.11-2016 Table R-3; Comply with Table R-2 (IETF RFC4594) */ +static u8 dscp_to_up_ac(u8 tos) +{ + u8 up = 0; + u8 dscp; + + dscp = (tos >> 2); + + if ( dscp == 0 ) + up = 0; + else if ( dscp >= 1 && dscp <= 9) + up = 1; + else if ( dscp >= 10 && dscp <= 16) + up = 2; + else if ( dscp >= 17 && dscp <= 23) + up = 3; + else if ( dscp >= 24 && dscp <= 31) + up = 4; + else if ( dscp >= 33 && dscp <= 40) + up = 5; + else if ((dscp >= 41 && dscp <= 47) || (dscp == 32)) + up = 6; + else if ( dscp >= 48 && dscp <= 63) + up = 7; + + return up; +} +#endif + static void set_qos(struct pkt_file *ppktfile, struct pkt_attrib *pattrib) { struct ethhdr etherhdr; @@ -1154,7 +1198,11 @@ static void set_qos(struct pkt_file *ppktfile, struct pkt_attrib *pattrib) if (pattrib->ether_type == 0x0800) { _rtw_pktfile_read(ppktfile, (u8 *)&ip_hdr, sizeof(ip_hdr)); /* UserPriority = (ntohs(ip_hdr.tos) >> 5) & 0x3; */ +#ifdef CONFIG_USER_PRIORITY_COMPLY_RFC4594_DSCP + UserPriority = dscp_to_up_ac(ip_hdr.tos); +#else UserPriority = ip_hdr.tos >> 5; +#endif } /* else if (pattrib->ether_type == 0x888e) { @@ -1163,6 +1211,15 @@ static void set_qos(struct pkt_file *ppktfile, struct pkt_attrib *pattrib) UserPriority = 7; } */ + + #ifdef CONFIG_ICMP_VOQ + if(pattrib->icmp_pkt==1)/*use VO queue to send icmp packet*/ + UserPriority = 7; + #endif + #ifdef CONFIG_IP_R_MONITOR + if (pattrib->ether_type == ETH_P_ARP) + UserPriority = 7; + #endif/*CONFIG_IP_R_MONITOR*/ pattrib->priority = UserPriority; pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN; pattrib->subtype = WIFI_QOS_DATA_TYPE; @@ -1224,6 +1281,8 @@ s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib) /* get ether_hdr_len */ pattrib->pkt_hdrlen = ETH_HLEN; + pattrib->qos_en = psta->qos_option; + /* [TDLS] TODO: setup req/rsp should be AC_BK */ if (pqospriv->qos_option && psta->qos_option) { pattrib->priority = 4; /* tdls management frame should be AC_VI */ @@ -1251,19 +1310,49 @@ exit: #endif /* CONFIG_TDLS */ -/*get non-qos hw_ssn control register,mapping to REG_HW_SEQ0,1,2,3*/ +/*get non-qos hw_ssn control register,mapping to REG_HW_SEQ 0,1,2,3*/ inline u8 rtw_get_hwseq_no(_adapter *padapter) { u8 hwseq_num = 0; + #ifdef CONFIG_CONCURRENT_MODE + #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) + hwseq_num = padapter->iface_id; + if (hwseq_num > 3) + hwseq_num = 3; + #else if (!is_primary_adapter(padapter)) hwseq_num = 1; - /* else */ - /* hwseq_num = 2; */ + #endif #endif /* CONFIG_CONCURRENT_MODE */ return hwseq_num; } +#ifdef CONFIG_LPS +#define LPS_PT_NORMAL 0 +#define LPS_PT_SP 1/* only DHCP packets is as SPECIAL_PACKET*/ +#define LPS_PT_ICMP 2 +/*If EAPOL , ARP , OR DHCP packet, driver must be in active mode.*/ +static u8 _rtw_lps_chk_packet_type(struct pkt_attrib *pattrib) +{ + u8 pkt_type = LPS_PT_NORMAL; /*normal data frame*/ + + #ifdef CONFIG_WAPI_SUPPORT + if ((pattrib->ether_type == 0x88B4) || (pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1)) + pkt_type = LPS_PT_SP; + #else /* !CONFIG_WAPI_SUPPORT */ + + #ifndef CONFIG_LPS_NOT_LEAVE_FOR_ICMP + if (pattrib->icmp_pkt == 1) + pkt_type = LPS_PT_ICMP; + else + #endif + if (pattrib->dhcp_pkt == 1) + pkt_type = LPS_PT_SP; + #endif + return pkt_type; +} +#endif static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattrib) { uint i; @@ -1273,12 +1362,13 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr sint bmcast; struct sta_priv *pstapriv = &padapter->stapriv; - struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct qos_priv *pqospriv = &pmlmepriv->qospriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; sint res = _SUCCESS; - +#ifdef CONFIG_LPS + u8 pkt_type = 0; +#endif DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib); @@ -1419,29 +1509,34 @@ get_sta_info: } } else if (0x888e == pattrib->ether_type) - RTW_PRINT("send eapol packet\n"); + parsing_eapol_packet(padapter, pktfile.cur_addr, psta, 1); +#if defined (DBG_ARP_DUMP) || defined (DBG_IP_R_MONITOR) + else if (pattrib->ether_type == ETH_P_ARP) { + u8 arp[28] = {0}; + + _rtw_pktfile_read(&pktfile, arp, 28); + dump_arp_pkt(RTW_DBGDUMP, etherhdr.h_dest, etherhdr.h_source, arp, 1); + } +#endif if ((pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1)) rtw_mi_set_scan_deny(padapter, 3000); -#ifdef CONFIG_LPS - /* If EAPOL , ARP , OR DHCP packet, driver must be in active mode. */ -#ifdef CONFIG_WAPI_SUPPORT - if ((pattrib->ether_type == 0x88B4) || (pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1)) -#else /* !CONFIG_WAPI_SUPPORT */ -#if 0 - if ((pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1)) -#else /* only ICMP/DHCP packets is as SPECIAL_PACKET, and leave LPS when tx IMCP/DHCP packets. */ - /* if ((pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) ) */ - if (pattrib->icmp_pkt == 1) - rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); - else if (pattrib->dhcp_pkt == 1) -#endif -#endif - { - DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_active); - rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SPECIAL_PACKET, 1); + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && + pattrib->ether_type == ETH_P_ARP && + !IS_MCAST(pattrib->dst)) { + rtw_mi_set_scan_deny(padapter, 1000); + rtw_mi_scan_abort(padapter, _FALSE); /*rtw_scan_abort_no_wait*/ } + +#ifdef CONFIG_LPS + pkt_type = _rtw_lps_chk_packet_type(pattrib); + + if (pkt_type == LPS_PT_SP) {/*packet is as SPECIAL_PACKET*/ + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_active); + rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SPECIAL_PACKET, 0); + } else if (pkt_type == LPS_PT_ICMP) + rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 0); #endif /* CONFIG_LPS */ #ifdef CONFIG_BEAMFORMING @@ -1455,26 +1550,14 @@ get_sta_info: goto exit; } - update_attrib_phy_info(padapter, pattrib, psta); - - /* RTW_INFO("%s ==> mac_id(%d)\n",__FUNCTION__,pattrib->mac_id ); */ - - pattrib->psta = psta; - /* TODO:_unlock */ - - pattrib->pctrl = 0; - - pattrib->ack_policy = 0; /* get ether_hdr_len */ pattrib->pkt_hdrlen = ETH_HLEN;/* (pattrib->ether_type == 0x8100) ? (14 + 4 ): 14; */ /* vlan tag */ pattrib->hdrlen = WLAN_HDR_A3_LEN; pattrib->subtype = WIFI_DATA_TYPE; + pattrib->qos_en = psta->qos_option; pattrib->priority = 0; - if (bmcast) - pattrib->rate = psta->init_rate; - if (check_fwstate(pmlmepriv, WIFI_AP_STATE | WIFI_MESH_STATE | WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE) ) { @@ -1501,6 +1584,26 @@ get_sta_info: } } } + + update_attrib_phy_info(padapter, pattrib, psta); + + /* RTW_INFO("%s ==> mac_id(%d)\n",__FUNCTION__,pattrib->mac_id ); */ + + pattrib->psta = psta; + /* TODO:_unlock */ + +#ifdef CONFIG_AUTO_AP_MODE + if (psta->isrc && psta->pid > 0) + pattrib->pctrl = _TRUE; + else +#endif + pattrib->pctrl = 0; + + pattrib->ack_policy = 0; + + if (bmcast) + pattrib->rate = psta->init_rate; + #ifdef CONFIG_WMMPS_STA update_attrib_trigger_frame_info(padapter, pattrib); @@ -1522,7 +1625,6 @@ static s32 xmitframe_addmic(_adapter *padapter, struct xmit_frame *pxmitframe) u8 *pframe, *payload, mic[8]; struct mic_data micdata; /* struct sta_info *stainfo; */ - struct qos_priv *pqospriv = &(padapter->mlmepriv.qospriv); struct pkt_attrib *pattrib = &pxmitframe->attrib; struct security_priv *psecuritypriv = &padapter->securitypriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; @@ -1606,7 +1708,6 @@ static s32 xmitframe_addmic(_adapter *padapter, struct xmit_frame *pxmitframe) } - /* if(pqospriv->qos_option==1) */ if (pattrib->qos_en) priority[0] = (u8)pxmitframe->attrib.priority; @@ -2494,7 +2595,7 @@ s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitfra xmitframe_swencrypt(padapter, pxmitframe); - pattrib->vcs_mode = NONE_VCS; + update_attrib_vcs_info(padapter, pxmitframe); exit: return res; @@ -3138,11 +3239,15 @@ void rtw_count_tx_stats(PADAPTER padapter, struct xmit_frame *pxmitframe, int sz pstats->tx_pkts += pkt_num; pstats->tx_bytes += sz; + #if defined(CONFIG_CHECK_LEAVE_LPS) && defined(CONFIG_LPS_CHK_BY_TP) + if (adapter_to_pwrctl(padapter)->lps_chk_by_tp) + traffic_check_for_leave_lps_by_tp(padapter, _TRUE, psta); + #endif /* CONFIG_LPS */ } #ifdef CONFIG_CHECK_LEAVE_LPS /* traffic_check_for_leave_lps(padapter, _TRUE); */ -#endif /* CONFIG_LPS */ +#endif /* CONFIG_CHECK_LEAVE_LPS */ } } @@ -3179,9 +3284,6 @@ static struct xmit_buf *__rtw_alloc_cmd_xmitbuf(struct xmit_priv *pxmitpriv, } else RTW_INFO("%s fail, no xmitbuf available !!!\n", __func__); -exit: - - return pxmitbuf; } @@ -3712,10 +3814,6 @@ struct xmit_frame *rtw_get_xframe(struct xmit_priv *pxmitpriv, int *num_frame) struct registry_priv *pregpriv = &padapter->registrypriv; int i, inx[4]; -#ifdef CONFIG_USB_HCI - /* int j, tmp, acirp_cnt[4]; */ -#endif - inx[0] = 0; inx[1] = 1; inx[2] = 2; @@ -3770,10 +3868,6 @@ struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmi _adapter *padapter = pxmitpriv->adapter; struct registry_priv *pregpriv = &padapter->registrypriv; int i, inx[4]; -#ifdef CONFIG_USB_HCI - /* int j, tmp, acirp_cnt[4]; */ -#endif - inx[0] = 0; inx[1] = 1; @@ -3781,7 +3875,7 @@ struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmi inx[3] = 3; if (pregpriv->wifi_spec == 1) { - int j, tmp, acirp_cnt[4]; + int j; #if 0 if (flags < XMIT_QUEUE_ENTRY) { /* priority exchange according to the completed xmitbuf flags. */ @@ -3944,7 +4038,6 @@ s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe) struct sta_info *psta; struct tx_servq *ptxservq; struct pkt_attrib *pattrib = &pxmitframe->attrib; - struct sta_priv *pstapriv = &padapter->stapriv; struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits; sint res = _SUCCESS; @@ -4092,7 +4185,6 @@ void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry) int rtw_br_client_tx(_adapter *padapter, struct sk_buff **pskb) { struct sk_buff *skb = *pskb; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; _irqL irqL; /* if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) */ { @@ -4319,8 +4411,10 @@ static void do_queue_select(_adapter *padapter, struct pkt_attrib *pattrib) if (padapter->mcc_adapterpriv.role == MCC_ROLE_GO || padapter->mcc_adapterpriv.role == MCC_ROLE_AP) { pattrib->qsel = QSLT_VO; /* AP interface VO queue */ + pattrib->priority = QSLT_VO; } else { pattrib->qsel = QSLT_BE; /* STA interface BE queue */ + pattrib->priority = QSLT_BE; } } else /* Not Under MCC */ @@ -4360,6 +4454,9 @@ s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev) if (skb) rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); + rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); + +#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) goto fail; @@ -4381,7 +4478,9 @@ s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev) rtap_len -= consume; len -= consume; } - + _rtw_pktfile_read(&pktfile, dummybuf, rtap_len-sizeof(struct ieee80211_radiotap_header)); + len = len - rtap_len; +#endif pmgntframe = alloc_mgtxmitframe(pxmitpriv); if (pmgntframe == NULL) { rtw_udelay_os(500); @@ -4427,6 +4526,124 @@ fail: } #endif +/* + * + * Return _TRUE when frame has been put to queue, otherwise return _FALSE. + */ +static u8 xmit_enqueue(struct _ADAPTER *a, struct xmit_frame *frame) +{ + struct sta_info *sta = NULL; + struct pkt_attrib *attrib = NULL; + _irqL irqL; + _list *head; + u8 ret = _TRUE; + + + attrib = &frame->attrib; + sta = attrib->psta; + if (!sta) + return _FALSE; + + _enter_critical_bh(&sta->tx_queue.lock, &irqL); + + head = get_list_head(&sta->tx_queue); + + if ((rtw_is_list_empty(head) == _TRUE) && (!sta->tx_q_enable)) { + ret = _FALSE; + goto exit; + } + + rtw_list_insert_tail(&frame->list, head); + RTW_INFO(FUNC_ADPT_FMT ": en-queue tx pkt for macid=%d\n", + FUNC_ADPT_ARG(a), sta->cmn.mac_id); + +exit: + _exit_critical_bh(&sta->tx_queue.lock, &irqL); + + return ret; +} + +static void xmit_dequeue(struct sta_info *sta) +{ + struct _ADAPTER *a; + _irqL irqL; + _list *head, *list; + struct xmit_frame *frame; + + + a = sta->padapter; + + _enter_critical_bh(&sta->tx_queue.lock, &irqL); + + head = get_list_head(&sta->tx_queue); + + do { + if (rtw_is_list_empty(head) == _TRUE) + break; + + list = get_next(head); + rtw_list_delete(list); + frame = LIST_CONTAINOR(list, struct xmit_frame, list); + RTW_INFO(FUNC_ADPT_FMT ": de-queue tx frame of macid=%d\n", + FUNC_ADPT_ARG(a), sta->cmn.mac_id); + + rtw_hal_xmit(a, frame); + } while (1); + + _exit_critical_bh(&sta->tx_queue.lock, &irqL); +} + +void rtw_xmit_dequeue_callback(_workitem *work) +{ + struct sta_info *sta; + + + sta = container_of(work, struct sta_info, tx_q_work); + xmit_dequeue(sta); +} + +void rtw_xmit_queue_set(struct sta_info *sta) +{ + _irqL irqL; + + _enter_critical_bh(&sta->tx_queue.lock, &irqL); + + if (sta->tx_q_enable) { + RTW_WARN(FUNC_ADPT_FMT ": duplicated set!\n", + FUNC_ADPT_ARG(sta->padapter)); + goto exit; + } + sta->tx_q_enable = 1; + RTW_INFO(FUNC_ADPT_FMT ": enable queue TX for macid=%d\n", + FUNC_ADPT_ARG(sta->padapter), sta->cmn.mac_id); + +exit: + _exit_critical_bh(&sta->tx_queue.lock, &irqL); +} + +void rtw_xmit_queue_clear(struct sta_info *sta) +{ + _irqL irqL; + + _enter_critical_bh(&sta->tx_queue.lock, &irqL); + + if (!sta->tx_q_enable) { + RTW_WARN(FUNC_ADPT_FMT ": tx queue for macid=%d " + "not be enabled!\n", + FUNC_ADPT_ARG(sta->padapter), sta->cmn.mac_id); + goto exit; + } + + sta->tx_q_enable = 0; + RTW_INFO(FUNC_ADPT_FMT ": disable queue TX for macid=%d\n", + FUNC_ADPT_ARG(sta->padapter), sta->cmn.mac_id); + + _set_workitem(&sta->tx_q_work); + +exit: + _exit_critical_bh(&sta->tx_queue.lock, &irqL); +} + /* * The main transmit(tx) entry post handle * @@ -4482,6 +4699,9 @@ s32 rtw_xmit_posthandle(_adapter *padapter, struct xmit_frame *pxmitframe, _pkt _exit_critical_bh(&pxmitpriv->lock, &irqL0); #endif + if (xmit_enqueue(padapter, pxmitframe) == _TRUE) + return 1; + /* pre_xmitframe */ if (rtw_hal_xmit(padapter, pxmitframe) == _FALSE) return 1; @@ -5239,7 +5459,9 @@ void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta) } +#ifdef CONFIG_TDLS exit: +#endif /* _exit_critical_bh(&psta->sleep_q.lock, &irqL); */ _exit_critical_bh(&pxmitpriv->lock, &irqL); @@ -5386,7 +5608,13 @@ thread_return rtw_xmit_thread(thread_context context) { s32 err; PADAPTER padapter; +#ifdef RTW_XMIT_THREAD_HIGH_PRIORITY +#ifdef PLATFORM_LINUX + struct sched_param param = { .sched_priority = 1 }; + sched_setscheduler(current, SCHED_FIFO, ¶m); +#endif /* PLATFORM_LINUX */ +#endif /* RTW_XMIT_THREAD_HIGH_PRIORITY */ err = _SUCCESS; padapter = (PADAPTER)context; @@ -5486,8 +5714,14 @@ bool rtw_xmit_ac_blocked(_adapter *adapter) #endif/* #ifdef DBG_CONFIG_ERROR_RESET */ #endif/* #ifdef DBG_CONFIG_ERROR_DETECT */ - if (rfctl->offch_state != OFFCHS_NONE) + if (rfctl->offch_state != OFFCHS_NONE + #ifdef CONFIG_DFS + || IS_RADAR_DETECTED(rfctl) || rfctl->csa_ch + #endif + ) { blocked = _TRUE; + goto exit; + } for (i = 0; i < dvobj->iface_nums; i++) { iface = dvobj->padapters[i]; @@ -5550,7 +5784,7 @@ void rtw_amsdu_be_timeout_handler(void *FunctionContext) adapter->xmitpriv.amsdu_be_timeout = RTW_AMSDU_TIMER_TIMEOUT; if (printk_ratelimit()) - RTW_INFO("%s Timeout!\n",__FUNCTION__); + RTW_DBG("%s Timeout!\n",__FUNCTION__); tasklet_hi_schedule(&adapter->xmitpriv.xmit_tasklet); } @@ -5683,8 +5917,6 @@ static u8 backup_idx[HW_QUEUE_ENTRY]; void rtw_tx_desc_backup(_adapter *padapter, struct xmit_frame *pxmitframe, u8 desc_size, u8 hwq) { - u16 reg_rp; - u16 reg_wp; u32 tmp32; u8 *pxmit_buf; @@ -5726,6 +5958,55 @@ u8 rtw_get_tx_desc_backup(_adapter *padapter, u8 hwq, struct rtw_tx_desc_backup } #endif +#ifdef CONFIG_PCI_TX_POLLING +void rtw_tx_poll_init(_adapter *padapter) +{ + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + + if (!is_primary_adapter(padapter)) + return; + + rtw_init_timer(&(pxmitpriv->tx_poll_timer), padapter, + rtw_tx_poll_timeout_handler, padapter); + rtw_tx_poll_timer_set(padapter, 1); + RTW_INFO("Tx poll timer init!\n"); +} + +void rtw_tx_poll_timeout_handler(void *FunctionContext) +{ + _adapter *adapter = (_adapter *)FunctionContext; + + rtw_tx_poll_timer_set(adapter, 1); + + if (adapter->hal_func.tx_poll_handler) + adapter->hal_func.tx_poll_handler(adapter); + else + RTW_WARN("hal ops: tx_poll_handler is NULL\n"); +} + +void rtw_tx_poll_timer_set(_adapter *padapter, u32 delay) +{ + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + _timer* timer = NULL; + + timer = &pxmitpriv->tx_poll_timer; + _set_timer(timer, delay); +} + +void rtw_tx_poll_timer_cancel(_adapter *padapter) +{ + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + _timer* timer = NULL; + + if (!is_primary_adapter(padapter)) + return; + + timer = &pxmitpriv->tx_poll_timer; + _cancel_timer_ex(timer); + RTW_INFO("Tx poll timer cancel !\n"); +} +#endif /* CONFIG_PCI_TX_POLLING */ + void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms) { sctx->timeout_ms = timeout_ms; diff --git a/dkms-install.sh b/dkms-install.sh index ac34017..e5a6a31 100755 --- a/dkms-install.sh +++ b/dkms-install.sh @@ -9,7 +9,7 @@ fi DRV_DIR=rtl8188eus DRV_NAME=8188eu -DRV_VERSION=5.3.9 +DRV_VERSION=5.7.6.1 cp -r ../${DRV_DIR} /usr/src/${DRV_NAME}-${DRV_VERSION} diff --git a/dkms-remove.sh b/dkms-remove.sh index 9847392..fcda400 100755 --- a/dkms-remove.sh +++ b/dkms-remove.sh @@ -9,7 +9,7 @@ fi DRV_DIR=rtl8188eus DRV_NAME=8188eu -DRV_VERSION=5.3.9 +DRV_VERSION=5.7.6.1 dkms remove ${DRV_NAME}/${DRV_VERSION} --all rm -rf /usr/src/${DRV_NAME}-${DRV_VERSION} diff --git a/dkms.conf b/dkms.conf index a6d88b0..9413b68 100644 --- a/dkms.conf +++ b/dkms.conf @@ -1,5 +1,5 @@ PACKAGE_NAME="realtek-rtl8188eus" -PACKAGE_VERSION="5.3.9~20200124" +PACKAGE_VERSION="5.7.6.1~20200125" CLEAN="'make' clean" BUILT_MODULE_NAME[0]=8188eu PROCS_NUM=`nproc` diff --git a/hal/efuse/efuse_mask.h b/hal/efuse/efuse_mask.h index 8270569..e51df45 100644 --- a/hal/efuse/efuse_mask.h +++ b/hal/efuse/efuse_mask.h @@ -13,7 +13,7 @@ * *****************************************************************************/ -#if DEV_BUS_TYPE == RT_USB_INTERFACE +#ifdef CONFIG_USB_HCI #if defined(CONFIG_RTL8188E) #include "rtl8188e/HalEfuseMask8188E_USB.h" @@ -51,6 +51,10 @@ #include "rtl8188f/HalEfuseMask8188F_USB.h" #endif + #if defined(CONFIG_RTL8188GTV) + #include "rtl8188gtv/HalEfuseMask8188GTV_USB.h" + #endif + #if defined(CONFIG_RTL8822B) #include "rtl8822b/HalEfuseMask8822B_USB.h" #endif @@ -58,8 +62,20 @@ #if defined(CONFIG_RTL8821C) #include "rtl8821c/HalEfuseMask8821C_USB.h" #endif + + #if defined(CONFIG_RTL8710B) + #include "rtl8710b/HalEfuseMask8710B_USB.h" + #endif + + #if defined(CONFIG_RTL8192F) + #include "rtl8192f/HalEfuseMask8192F_USB.h" + #endif + #if defined(CONFIG_RTL8822C) + #include "rtl8822c/HalEfuseMask8822C_USB.h" + #endif +#endif /*CONFIG_USB_HCI*/ -#elif DEV_BUS_TYPE == RT_PCI_INTERFACE +#ifdef CONFIG_PCI_HCI #if defined(CONFIG_RTL8188E) #include "rtl8188e/HalEfuseMask8188E_PCIE.h" @@ -99,7 +115,14 @@ #include "rtl8821c/HalEfuseMask8821C_PCIE.h" #endif -#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE + #if defined(CONFIG_RTL8192F) + #include "rtl8192f/HalEfuseMask8192F_PCIE.h" + #endif + #if defined(CONFIG_RTL8822C) + #include "rtl8822c/HalEfuseMask8822C_PCIE.h" + #endif +#endif /*CONFIG_PCI_HCI*/ +#ifdef CONFIG_SDIO_HCI #if defined(CONFIG_RTL8723B) #include "rtl8723b/HalEfuseMask8723B_SDIO.h" #endif @@ -116,6 +139,10 @@ #include "rtl8188f/HalEfuseMask8188F_SDIO.h" #endif + #if defined(CONFIG_RTL8188GTV) + #include "rtl8188gtv/HalEfuseMask8188GTV_SDIO.h" + #endif + #if defined(CONFIG_RTL8723D) #include "rtl8723d/HalEfuseMask8723D_SDIO.h" #endif @@ -135,4 +162,14 @@ #if defined(CONFIG_RTL8822B) #include "rtl8822b/HalEfuseMask8822B_SDIO.h" #endif -#endif + + #if defined(CONFIG_RTL8192F) + #include "rtl8192f/HalEfuseMask8192F_SDIO.h" + #endif + + + #if defined(CONFIG_RTL8822C) + #include "rtl8822c/HalEfuseMask8822C_SDIO.h" + #endif + +#endif /*CONFIG_SDIO_HCI*/ diff --git a/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.c b/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.c new file mode 100644 index 0000000..c173618 --- /dev/null +++ b/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.c @@ -0,0 +1,96 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/* #include "Mp_Precomp.h" */ +/* #include "../odm_precomp.h" */ + +#include + +#include "HalEfuseMask8188E_PCIE.h" + + + +/****************************************************************************** +* MPCIE.TXT +******************************************************************************/ + +u8 Array_MP_8188E_MPCIE[] = { + 0xFF, + 0xF3, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x0F, + 0xF1, + 0xFF, + 0xFF, + 0x70, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + +}; + +u16 +EFUSE_GetArrayLen_MP_8188E_MPCIE(void) +{ + return sizeof(Array_MP_8188E_MPCIE) / sizeof(u8); +} + +void +EFUSE_GetMaskArray_MP_8188E_MPCIE( + u8 *Array +) +{ + u16 len = EFUSE_GetArrayLen_MP_8188E_MPCIE(), i = 0; + + for (i = 0; i < len; ++i) + Array[i] = Array_MP_8188E_MPCIE[i]; +} +BOOLEAN +EFUSE_IsAddressMasked_MP_8188E_MPCIE( + u16 Offset +) +{ + int r = Offset / 16; + int c = (Offset % 16) / 2; + int result = 0; + + if (c < 4) /* Upper double word */ + result = (Array_MP_8188E_MPCIE[r] & (0x10 << c)); + else + result = (Array_MP_8188E_MPCIE[r] & (0x01 << (c - 4))); + + return (result > 0) ? 0 : 1; +} diff --git a/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.h b/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.h new file mode 100644 index 0000000..72eb440 --- /dev/null +++ b/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.h @@ -0,0 +1,34 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + + + +/****************************************************************************** +* MPCIE.TXT +******************************************************************************/ + + +u16 +EFUSE_GetArrayLen_MP_8188E_MPCIE(void); + +void +EFUSE_GetMaskArray_MP_8188E_MPCIE( + u8 *Array +); + +BOOLEAN +EFUSE_IsAddressMasked_MP_8188E_MPCIE(/* TC: Test Chip, MP: MP Chip */ + u16 Offset +); diff --git a/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.c b/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.c new file mode 100644 index 0000000..468a439 --- /dev/null +++ b/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.c @@ -0,0 +1,96 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/* #include "Mp_Precomp.h" */ +/* #include "../odm_precomp.h" */ + +#include + +#include "HalEfuseMask8188E_SDIO.h" + + + +/****************************************************************************** +* MSDIO.TXT +******************************************************************************/ + +u8 Array_MP_8188E_MSDIO[] = { + 0xFF, + 0xF3, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x0F, + 0xF1, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + +}; + +u16 +EFUSE_GetArrayLen_MP_8188E_MSDIO(void) +{ + return sizeof(Array_MP_8188E_MSDIO) / sizeof(u8); +} + +void +EFUSE_GetMaskArray_MP_8188E_MSDIO( + u8 *Array +) +{ + u16 len = EFUSE_GetArrayLen_MP_8188E_MSDIO(), i = 0; + + for (i = 0; i < len; ++i) + Array[i] = Array_MP_8188E_MSDIO[i]; +} +BOOLEAN +EFUSE_IsAddressMasked_MP_8188E_MSDIO( + u16 Offset +) +{ + int r = Offset / 16; + int c = (Offset % 16) / 2; + int result = 0; + + if (c < 4) /* Upper double word */ + result = (Array_MP_8188E_MSDIO[r] & (0x10 << c)); + else + result = (Array_MP_8188E_MSDIO[r] & (0x01 << (c - 4))); + + return (result > 0) ? 0 : 1; +} diff --git a/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.h b/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.h new file mode 100644 index 0000000..177b214 --- /dev/null +++ b/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.h @@ -0,0 +1,34 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + + + +/****************************************************************************** +* MSDIO.TXT +******************************************************************************/ + + +u16 +EFUSE_GetArrayLen_MP_8188E_MSDIO(void); + +void +EFUSE_GetMaskArray_MP_8188E_MSDIO( + u8 *Array +); + +BOOLEAN +EFUSE_IsAddressMasked_MP_8188E_MSDIO(/* TC: Test Chip, MP: MP Chip */ + u16 Offset +); diff --git a/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.c b/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.c index 607d685..ea00ca9 100644 --- a/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.c +++ b/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.c @@ -25,7 +25,7 @@ * MUSB.TXT ******************************************************************************/ -u1Byte Array_MP_8188E_MUSB[] = { +u8 Array_MP_8188E_MUSB[] = { 0xFF, 0xF3, 0x00, @@ -61,25 +61,25 @@ u1Byte Array_MP_8188E_MUSB[] = { }; -u2Byte -EFUSE_GetArrayLen_MP_8188E_MUSB(VOID) +u16 +EFUSE_GetArrayLen_MP_8188E_MUSB(void) { - return sizeof(Array_MP_8188E_MUSB) / sizeof(u1Byte); + return sizeof(Array_MP_8188E_MUSB) / sizeof(u8); } -VOID +void EFUSE_GetMaskArray_MP_8188E_MUSB( - IN OUT pu1Byte Array + u8 *Array ) { - u2Byte len = EFUSE_GetArrayLen_MP_8188E_MUSB(), i = 0; + u16 len = EFUSE_GetArrayLen_MP_8188E_MUSB(), i = 0; for (i = 0; i < len; ++i) Array[i] = Array_MP_8188E_MUSB[i]; } BOOLEAN EFUSE_IsAddressMasked_MP_8188E_MUSB( - IN u2Byte Offset + u16 Offset ) { int r = Offset / 16; diff --git a/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.h b/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.h index 1e52ef3..5fbe660 100644 --- a/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.h +++ b/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.h @@ -20,15 +20,15 @@ ******************************************************************************/ -u2Byte -EFUSE_GetArrayLen_MP_8188E_MUSB(VOID); +u16 +EFUSE_GetArrayLen_MP_8188E_MUSB(void); -VOID +void EFUSE_GetMaskArray_MP_8188E_MUSB( - IN OUT pu1Byte Array + u8 *Array ); BOOLEAN EFUSE_IsAddressMasked_MP_8188E_MUSB(/* TC: Test Chip, MP: MP Chip */ - IN u2Byte Offset + u16 Offset ); diff --git a/hal/hal_btcoex.c b/hal/hal_btcoex.c index 9e63f2c..285a60c 100644 --- a/hal/hal_btcoex.c +++ b/hal/hal_btcoex.c @@ -71,13 +71,14 @@ const char *const GLBtcWifiBwString[] = { "11bg", "HT20", "HT40", - "HT80", - "HT160" + "VHT80", + "VHT160" }; const char *const GLBtcWifiFreqString[] = { "2.4G", - "5G" + "5G", + "2.4G+5G" }; const char *const GLBtcIotPeerString[] = { @@ -179,6 +180,7 @@ typedef enum _bt_op_code { BT_OP_GET_BT_DEVICE_INFO = 0x30, BT_OP_GET_BT_FORBIDDEN_SLOT_VAL = 0x31, BT_OP_SET_BT_LANCONSTRAIN_LEVEL = 0x32, + BT_OP_SET_BT_TEST_MODE_VAL = 0x33, BT_OP_MAX } BT_OP_CODE; @@ -202,7 +204,7 @@ u8 GLBtcBtMpRptBTOK; */ u32 GLBtcDbgType[COMP_MAX]; u8 GLBtcDbgBuf[BT_TMP_BUF_SIZE]; -u1Byte gl_btc_trace_buf[BT_TMP_BUF_SIZE]; +u8 gl_btc_trace_buf[BT_TMP_BUF_SIZE]; typedef struct _btcoexdbginfo { u8 *info; @@ -267,15 +269,6 @@ static void halbtcoutsrc_DbgInit(void) GLBtcDbgType[i] = 0; } -static u8 halbtcoutsrc_IsCsrBtCoex(PBTC_COEXIST pBtCoexist) -{ - if (pBtCoexist->board_info.bt_chip_type == BTC_CHIP_CSR_BC4 - || pBtCoexist->board_info.bt_chip_type == BTC_CHIP_CSR_BC8 - ) - return _TRUE; - return _FALSE; -} - static void halbtcoutsrc_EnterPwrLock(PBTC_COEXIST pBtCoexist) { struct dvobj_priv *dvobj = adapter_to_dvobj((PADAPTER)pBtCoexist->Adapter); @@ -615,6 +608,112 @@ u32 halbtcoutsrc_GetWifiLinkStatus(PBTC_COEXIST pBtCoexist) return retVal; } +struct btc_wifi_link_info halbtcoutsrc_getwifilinkinfo(PBTC_COEXIST pBtCoexist) +{ + u8 n_assoc_iface = 0, i =0, mcc_en = _FALSE; + PADAPTER adapter = NULL; + PADAPTER iface = NULL; + PADAPTER sta_iface = NULL, p2p_iface = NULL, ap_iface = NULL; + BTC_LINK_MODE btc_link_moe = BTC_LINK_MAX; + struct dvobj_priv *dvobj = NULL; + struct mlme_ext_priv *mlmeext = NULL; + struct btc_wifi_link_info wifi_link_info; + + adapter = (PADAPTER)pBtCoexist->Adapter; + dvobj = adapter_to_dvobj(adapter); + n_assoc_iface = rtw_mi_get_assoc_if_num(adapter); + + /* init value */ + wifi_link_info.link_mode = BTC_LINK_NONE; + wifi_link_info.sta_center_channel = 0; + wifi_link_info.p2p_center_channel = 0; + wifi_link_info.bany_client_join_go = _FALSE; + wifi_link_info.benable_noa = _FALSE; + wifi_link_info.bhotspot = _FALSE; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (!iface) + continue; + + mlmeext = &iface->mlmeextpriv; + if (MLME_IS_GO(iface)) { + wifi_link_info.link_mode = BTC_LINK_ONLY_GO; + wifi_link_info.p2p_center_channel = + rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); + p2p_iface = iface; + if (rtw_linked_check(iface)) + wifi_link_info.bany_client_join_go = _TRUE; + } else if (MLME_IS_GC(iface)) { + wifi_link_info.link_mode = BTC_LINK_ONLY_GC; + wifi_link_info.p2p_center_channel = + rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); + p2p_iface = iface; + } else if (MLME_IS_AP(iface)) { + wifi_link_info.link_mode = BTC_LINK_ONLY_AP; + ap_iface = iface; + wifi_link_info.p2p_center_channel = + rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); + } else if (MLME_IS_STA(iface) && rtw_linked_check(iface)) { + wifi_link_info.link_mode = BTC_LINK_ONLY_STA; + wifi_link_info.sta_center_channel = + rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); + sta_iface = iface; + } + } + +#ifdef CONFIG_MCC_MODE + if (MCC_EN(adapter)) { + if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) + mcc_en = _TRUE; + } +#endif/* CONFIG_MCC_MODE */ + + if (n_assoc_iface == 0) { + wifi_link_info.link_mode = BTC_LINK_NONE; + } else if (n_assoc_iface == 1) { + /* by pass */ + } else if (n_assoc_iface == 2) { + if (sta_iface && p2p_iface) { + u8 band_sta = sta_iface->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G; + u8 band_p2p = p2p_iface->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G; + if (band_sta == band_p2p) { + switch (band_sta) { + case BAND_ON_2_4G: + if (MLME_IS_GO(p2p_iface)) + wifi_link_info.link_mode = + mcc_en == _TRUE ? BTC_LINK_2G_MCC_GO_STA : BTC_LINK_2G_SCC_GO_STA; + else if (MLME_IS_GC(p2p_iface)) + wifi_link_info.link_mode = + mcc_en == _TRUE ? BTC_LINK_2G_MCC_GC_STA : BTC_LINK_2G_SCC_GC_STA; + break; + case BAND_ON_5G: + if (MLME_IS_GO(p2p_iface)) + wifi_link_info.link_mode = + mcc_en == _TRUE ? BTC_LINK_5G_MCC_GO_STA : BTC_LINK_5G_SCC_GO_STA; + else if (MLME_IS_GC(p2p_iface)) + wifi_link_info.link_mode = + mcc_en == _TRUE ? BTC_LINK_5G_MCC_GC_STA : BTC_LINK_5G_SCC_GC_STA; + break; + default: + break; + } + } else { + if (MLME_IS_GO(p2p_iface)) + wifi_link_info.link_mode = BTC_LINK_25G_MCC_GO_STA; + else if (MLME_IS_GC(p2p_iface)) + wifi_link_info.link_mode = BTC_LINK_25G_MCC_GC_STA; + } + } + } else { + if (pBtCoexist->board_info.btdm_ant_num == 1) + RTW_ERR("%s do not support n_assoc_iface > 2 (ant_num == 1)", __func__); + } + + return wifi_link_info; +} + + static void _btmpoper_timer_hdl(void *p) { if (GLBtcBtMpRptWait == _TRUE) { @@ -731,8 +830,8 @@ u32 halbtcoutsrc_GetBtPatchVer(PBTC_COEXIST pBtCoexist) _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); } else { #ifdef CONFIG_BT_COEXIST_SOCKET_TRX - u1Byte dataLen = 2; - u1Byte buf[4] = {0}; + u8 dataLen = 2; + u8 buf[4] = {0}; buf[0] = 0x0; /* OP_Code */ buf[1] = 0x0; /* OP_Code_Length */ @@ -741,13 +840,12 @@ u32 halbtcoutsrc_GetBtPatchVer(PBTC_COEXIST pBtCoexist) } } -exit: return pBtCoexist->bt_info.bt_real_fw_ver; } s32 halbtcoutsrc_GetWifiRssi(PADAPTER padapter) { - return rtw_phydm_get_min_rssi(padapter); + return rtw_dm_get_min_rssi(padapter); } u32 halbtcoutsrc_GetBtCoexSupportedFeature(void *pBtcContext) @@ -900,6 +998,7 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf) PADAPTER padapter; PHAL_DATA_TYPE pHalData; struct mlme_ext_priv *mlmeext; + struct btc_wifi_link_info *wifi_link_info; u8 bSoftApExist, bVwifiExist; u8 *pu8; s32 *pS4Tmp; @@ -923,6 +1022,7 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf) pU4Tmp = (u32 *)pOutBuf; pU1Tmp = (u8 *)pOutBuf; pU2Tmp = (u16*)pOutBuf; + wifi_link_info = (struct btc_wifi_link_info *)pOutBuf; ret = _TRUE; switch (getType) { @@ -1019,6 +1119,11 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf) #endif break; + case BTC_GET_BL_WIFI_LW_PWR_STATE: + /* return false due to coex do not run during 32K */ + *pu8 = FALSE; + break; + case BTC_GET_S4_WIFI_RSSI: *pS4Tmp = halbtcoutsrc_GetWifiRssi(padapter); break; @@ -1073,7 +1178,9 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf) case BTC_GET_U4_WIFI_LINK_STATUS: *pU4Tmp = halbtcoutsrc_GetWifiLinkStatus(pBtCoexist); break; - + case BTC_GET_BL_WIFI_LINK_INFO: + *wifi_link_info = halbtcoutsrc_getwifilinkinfo(pBtCoexist); + break; case BTC_GET_U4_BT_PATCH_VER: *pU4Tmp = halbtcoutsrc_GetBtPatchVer(pBtCoexist); break; @@ -1147,24 +1254,24 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf) case BTC_GET_U1_ANT_TYPE: switch (pHalData->bt_coexist.btAntisolation) { case 0: - *pU1Tmp = (u1Byte)BTC_ANT_TYPE_0; - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_0; + *pU1Tmp = (u8)BTC_ANT_TYPE_0; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_0; break; case 1: - *pU1Tmp = (u1Byte)BTC_ANT_TYPE_1; - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_1; + *pU1Tmp = (u8)BTC_ANT_TYPE_1; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_1; break; case 2: - *pU1Tmp = (u1Byte)BTC_ANT_TYPE_2; - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_2; + *pU1Tmp = (u8)BTC_ANT_TYPE_2; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_2; break; case 3: - *pU1Tmp = (u1Byte)BTC_ANT_TYPE_3; - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_3; + *pU1Tmp = (u8)BTC_ANT_TYPE_3; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_3; break; case 4: - *pU1Tmp = (u1Byte)BTC_ANT_TYPE_4; - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_4; + *pU1Tmp = (u8)BTC_ANT_TYPE_4; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_4; break; } break; @@ -1226,6 +1333,9 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf) pBtCoexist = (PBTC_COEXIST)pBtcContext; + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return _FALSE; + padapter = pBtCoexist->Adapter; pHalData = GET_HAL_DATA(padapter); pu8 = (u8 *)pInBuf; @@ -1233,9 +1343,6 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf) pU4Tmp = (u32 *)pInBuf; ret = _TRUE; - if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) - return _FALSE; - switch (setType) { /* set some u8 type variables. */ case BTC_SET_BL_BT_DISABLE: @@ -1403,8 +1510,8 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf) case BTC_SET_ACT_CTRL_8723B_ANT: #if 0 { - u1Byte dataLen = *pU1Tmp; - u1Byte tmpBuf[BTC_TMP_BUF_SHORT]; + u8 dataLen = *pU1Tmp; + u8 tmpBuf[BTC_TMP_BUF_SHORT]; if (dataLen) PlatformMoveMemory(&tmpBuf[0], pU1Tmp + 1, dataLen); BT_Set8723bAnt(Adapter, dataLen, &tmpBuf[0]); @@ -1468,8 +1575,8 @@ void halbtcoutsrc_DisplayCoexStatistics(PBTC_COEXIST pBtCoexist) PBT_MGNT pBtMgnt = &padapter->MgntInfo.BtInfo.BtMgnt; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); u8 *cliBuf = pBtCoexist->cliBuf; - u1Byte i, j; - u1Byte tmpbuf[BTC_TMP_BUF_SHORT]; + u8 i, j; + u8 tmpbuf[BTC_TMP_BUF_SHORT]; if (gl_coex_offload.cnt_h2c_sent) { @@ -1668,13 +1775,101 @@ void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist) u8 wifiChnl = 0, wifiP2PChnl = 0, nScanAPNum = 0, FwPSState; u32 iqk_cnt_total = 0, iqk_cnt_ok = 0, iqk_cnt_fail = 0; u16 wifiBcnInterval = 0; + PHAL_DATA_TYPE hal = GET_HAL_DATA(padapter); + struct btc_wifi_link_info wifi_link_info; + + wifi_link_info = halbtcoutsrc_getwifilinkinfo(pBtCoexist); + + switch (wifi_link_info.link_mode) { + case BTC_LINK_NONE: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "None", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G; + break; + case BTC_LINK_ONLY_GO: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "ONLY_GO", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G; + break; + case BTC_LINK_ONLY_GC: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "ONLY_GC", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G; + break; + case BTC_LINK_ONLY_STA: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "ONLY_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G; + break; + case BTC_LINK_ONLY_AP: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "ONLY_AP", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G; + break; + case BTC_LINK_2G_MCC_GO_STA: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "24G_MCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = BTC_FREQ_2_4G; + break; + case BTC_LINK_5G_MCC_GO_STA: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "5G_MCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = BTC_FREQ_5G; + break; + case BTC_LINK_25G_MCC_GO_STA: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "2BANDS_MCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = BTC_FREQ_25G; + break; + case BTC_LINK_2G_MCC_GC_STA: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "24G_MCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = BTC_FREQ_2_4G; + break; + case BTC_LINK_5G_MCC_GC_STA: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "5G_MCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = BTC_FREQ_5G; + break; + case BTC_LINK_25G_MCC_GC_STA: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "2BANDS_MCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = BTC_FREQ_25G; + break; + case BTC_LINK_2G_SCC_GO_STA: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "24G_SCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = BTC_FREQ_2_4G; + break; + case BTC_LINK_5G_SCC_GO_STA: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "5G_SCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = BTC_FREQ_5G; + break; + case BTC_LINK_2G_SCC_GC_STA: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "24G_SCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = BTC_FREQ_2_4G; + break; + case BTC_LINK_5G_SCC_GC_STA: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "5G_SCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = BTC_FREQ_5G; + break; + default: + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", + "UNKNOWN", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); + wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G; + break; + } + + CL_PRINTF(cliBuf); wifiLinkStatus = halbtcoutsrc_GetWifiLinkStatus(pBtCoexist); - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d (mcc+2band = %d)", "STA/vWifi/HS/p2pGo/p2pGc", + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "STA/vWifi/HS/p2pGo/p2pGc", ((wifiLinkStatus & WIFI_STA_CONNECTED) ? 1 : 0), ((wifiLinkStatus & WIFI_AP_CONNECTED) ? 1 : 0), ((wifiLinkStatus & WIFI_HS_CONNECTED) ? 1 : 0), ((wifiLinkStatus & WIFI_P2P_GO_CONNECTED) ? 1 : 0), - ((wifiLinkStatus & WIFI_P2P_GC_CONNECTED) ? 1 : 0), - halbtcoutsrc_IsDualBandConnected(padapter) ? 1 : 0); + ((wifiLinkStatus & WIFI_P2P_GC_CONNECTED) ? 1 : 0)); CL_PRINTF(cliBuf); pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); @@ -1698,15 +1893,14 @@ void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist) } pBtCoexist->btc_get(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); - pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiChnl); pBtCoexist->btc_get(pBtCoexist, BTC_GET_U2_BEACON_PERIOD, &wifiBcnInterval); - if ((wifiLinkStatus & WIFI_P2P_GO_CONNECTED) || (wifiLinkStatus & WIFI_P2P_GC_CONNECTED)) - pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_WIFI_P2P_CHNL, &wifiP2PChnl); + wifiChnl = wifi_link_info.sta_center_channel; + wifiP2PChnl = wifi_link_info.p2p_center_channel; + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dBm/ %d/ %d/ %d", "RSSI/ STA_Chnl/ P2P_Chnl/ BI", wifiRssi-100, wifiChnl, wifiP2PChnl, wifiBcnInterval); CL_PRINTF(cliBuf); - pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifiFreq); pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); @@ -1960,7 +2154,7 @@ u8 halbtcoutsrc_SetBtAntDetection(void *pBtcContext, u8 txTime, u8 btChnl) #if 0 PBTC_COEXIST pBtCoexist = (PBTC_COEXIST)pBtcContext; PADAPTER Adapter = pBtCoexist->Adapter; - u1Byte btCanTx = 0; + u8 btCanTx = 0; BOOLEAN bStatus = FALSE; bStatus = NDBG_SetBtAntDetection(Adapter, txTime, btChnl, &btCanTx); @@ -1975,8 +2169,8 @@ u8 halbtcoutsrc_SetBtAntDetection(void *pBtcContext, u8 txTime, u8 btChnl) BOOLEAN halbtcoutsrc_SetBtTRXMASK( - IN PVOID pBtcContext, - IN u1Byte bt_trx_mask + void *pBtcContext, + u8 bt_trx_mask ) { /* Always return _FALSE since we don't implement this yet */ @@ -1984,7 +2178,7 @@ halbtcoutsrc_SetBtTRXMASK( struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext; PADAPTER Adapter = pBtCoexist->Adapter; BOOLEAN bStatus = FALSE; - u1Byte btCanTx = 0; + u8 btCanTx = 0; if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter) || IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter) || IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { @@ -2045,6 +2239,35 @@ u32 halbtcoutsrc_GetBtReg(void *pBtcContext, u8 RegType, u32 RegAddr) return (BT_STATUS_BT_OP_SUCCESS == halbtcoutsrc_GetBtReg_with_status(pBtcContext, RegType, RegAddr, ®Val)) ? regVal : 0xffffffff; } +u16 halbtcoutsrc_setbttestmode(void *pBtcContext, u8 Type) +{ + PBTC_COEXIST pBtCoexist; + u16 ret = BT_STATUS_BT_OP_SUCCESS; + + pBtCoexist = (PBTC_COEXIST)pBtcContext; + + if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { + _irqL irqL; + u8 op_code; + u8 status; + + _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); + + Type = cpu_to_le32(Type); + op_code = BT_OP_SET_BT_TEST_MODE_VAL; + status = _btmpoper_cmd(pBtCoexist, op_code, 0, (u8 *)&Type, 3); + if (status != BT_STATUS_BT_OP_SUCCESS) + ret = SET_BT_MP_OPER_RET(op_code, status); + + _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); + } else + ret = BT_STATUS_NOT_IMPLEMENT; + + return ret; + +} + + void halbtcoutsrc_FillH2cCmd(void *pBtcContext, u8 elementId, u32 cmdLen, u8 *pCmdBuffer) { PBTC_COEXIST pBtCoexist; @@ -2059,7 +2282,7 @@ void halbtcoutsrc_FillH2cCmd(void *pBtcContext, u8 elementId, u32 cmdLen, u8 *pC static void halbtcoutsrc_coex_offload_init(void) { - u1Byte i; + u8 i; gl_coex_offload.h2c_req_num = 0; gl_coex_offload.cnt_h2c_sent = 0; @@ -2083,7 +2306,7 @@ static COL_H2C_STATUS halbtcoutsrc_send_h2c(PADAPTER Adapter, PCOL_H2C pcol_h2c, if (TRUE) { #if 0 /*(USE_HAL_MAC_API == 1) */ - if (RT_STATUS_SUCCESS == HAL_MAC_Send_BT_COEX(&GET_HAL_MAC_INFO(Adapter), (pu1Byte)(pcol_h2c), (u4Byte)h2c_cmd_len, 1)) { + if (RT_STATUS_SUCCESS == HAL_MAC_Send_BT_COEX(&GET_HAL_MAC_INFO(Adapter), (u8 *)(pcol_h2c), (u32)h2c_cmd_len, 1)) { if (!wait_for_completion_timeout(&gl_coex_offload.c2h_event[pcol_h2c->req_num], 20)) { h2c_status = COL_STATUS_H2C_TIMTOUT; } @@ -2153,7 +2376,7 @@ COL_H2C_STATUS halbtcoutsrc_CoexH2cProcess(void *pBtCoexist, gl_coex_offload.h2c_record[opcode].count++; gl_coex_offload.h2c_record[opcode].h2c_len = col_h2c_len; - _rtw_memmove((PVOID)&gl_coex_offload.h2c_record[opcode].h2c_buf[0], (PVOID)pcol_h2c, col_h2c_len); + _rtw_memmove((void *)&gl_coex_offload.h2c_record[opcode].h2c_buf[0], (void *)pcol_h2c, col_h2c_len); h2c_status = halbtcoutsrc_send_h2c(Adapter, pcol_h2c, col_h2c_len); @@ -2179,8 +2402,8 @@ u8 halbtcoutsrc_GetAntDetValFromBt(void *pBtcContext) #if 0 struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext; PADAPTER Adapter = pBtCoexist->Adapter; - u1Byte AntDetVal = 0x0; - u1Byte opcodeVer = 1; + u8 AntDetVal = 0x0; + u8 opcodeVer = 1; BOOLEAN status = false; status = NDBG_GetAntDetValFromBt(Adapter, opcodeVer, &AntDetVal); @@ -2348,6 +2571,38 @@ u32 halbtcoutsrc_GetPhydmVersion(void *pBtcContext) #ifdef CONFIG_RTL8821C return RELEASE_VERSION_8821C; #endif + +#ifdef CONFIG_RTL8192F + return RELEASE_VERSION_8192F; +#endif + +#ifdef CONFIG_RTL8822C + return RELEASE_VERSION_8822C; +#endif + +#ifdef CONFIG_RTL8814A + return RELEASE_VERSION_8814A; +#endif +} + +u8 halbtcoutsrc_SetTimer(void *pBtcContext, u32 type, u32 val) +{ + struct btc_coexist *pBtCoexist=(struct btc_coexist *)pBtcContext; + + if (type >= BTC_TIMER_MAX) + return _FALSE; + + pBtCoexist->coex_sta.cnt_timer[type] = val; + + RTW_DBG("[BTC], Set Timer: type = %d, val = %d\n", type, val); + + return _TRUE; +} + +u32 halbtcoutsrc_SetAtomic (void *btc_ctx, u32 *target, u32 val) +{ + *target = val; + return _SUCCESS; } void halbtcoutsrc_phydm_modify_AntDiv_HwSw(void *pBtcContext, u8 is_hw) @@ -2377,6 +2632,16 @@ u32 halbtcoutsrc_phydm_query_PHY_counter(void *pBtcContext, u8 info_type) #endif } +void halbtcoutsrc_reduce_wl_tx_power(void *pBtcContext, s8 tx_power) +{ + struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA((PADAPTER)pBtCoexist->Adapter); + + /* The reduction of wl tx pwr should be processed inside the set tx pwr lvl function */ + if (IS_HARDWARE_TYPE_8822C(pBtCoexist->Adapter)) + rtw_hal_set_tx_power_level(pBtCoexist->Adapter, pHalData->current_channel); +} + #if 0 static void BT_CoexOffloadRecordErrC2hAck(PADAPTER Adapter) { @@ -2467,25 +2732,25 @@ void BT_CoexOffloadC2hCheck(PADAPTER Adapter, u8 *Buffer, u8 Length) u8 c2hSubCmdId = 0, c2hAckLen = 0, h2cCmdId = 0, h2cSubCmdId = 0, c2hIndLen = 0; BT_PrintData(Adapter, "[COL], c2h packet:", Length - 2, Buffer + 2); - c2hSubCmdId = (u1Byte)C2H_HDR_GET_C2H_SUB_CMD_ID(Buffer); + c2hSubCmdId = (u8)C2H_HDR_GET_C2H_SUB_CMD_ID(Buffer); if (c2hSubCmdId == C2H_SUB_CMD_ID_H2C_ACK_HDR || c2hSubCmdId == C2H_SUB_CMD_ID_BT_COEX_INFO) { if (c2hSubCmdId == C2H_SUB_CMD_ID_H2C_ACK_HDR) { /* coex c2h ack */ - h2cCmdId = (u1Byte)H2C_ACK_HDR_GET_H2C_CMD_ID(Buffer); - h2cSubCmdId = (u1Byte)H2C_ACK_HDR_GET_H2C_SUB_CMD_ID(Buffer); + h2cCmdId = (u8)H2C_ACK_HDR_GET_H2C_CMD_ID(Buffer); + h2cSubCmdId = (u8)H2C_ACK_HDR_GET_H2C_SUB_CMD_ID(Buffer); if (h2cCmdId == 0xff && h2cSubCmdId == 0x60) { - c2hAckLen = (u1Byte)C2H_HDR_GET_LEN(Buffer); + c2hAckLen = (u8)C2H_HDR_GET_LEN(Buffer); if (c2hAckLen >= 8) - BT_CoexOffloadC2hAckCheck(Adapter, &Buffer[12], (u1Byte)(c2hAckLen - 8)); + BT_CoexOffloadC2hAckCheck(Adapter, &Buffer[12], (u8)(c2hAckLen - 8)); else BT_CoexOffloadRecordErrC2hAck(Adapter); } } else if (c2hSubCmdId == C2H_SUB_CMD_ID_BT_COEX_INFO) { /* coex c2h indication */ - c2hIndLen = (u1Byte)C2H_HDR_GET_LEN(Buffer); - BT_CoexOffloadC2hIndCheck(Adapter, &Buffer[4], (u1Byte)c2hIndLen); + c2hIndLen = (u8)C2H_HDR_GET_LEN(Buffer); + BT_CoexOffloadC2hIndCheck(Adapter, &Buffer[4], (u8)c2hIndLen); } } #endif @@ -2508,7 +2773,7 @@ u8 EXhalbtcoutsrc_BindBtCoexWithAdapter(void *padapter) pBtCoexist->statistics.cnt_bind++; pBtCoexist->Adapter = padapter; - pBtCoexist->odm_priv = (PVOID)&(pHalData->odmpriv); + pBtCoexist->odm_priv = (void *)&(pHalData->odmpriv); pBtCoexist->stack_info.profile_notified = _FALSE; @@ -2518,6 +2783,14 @@ u8 EXhalbtcoutsrc_BindBtCoexWithAdapter(void *padapter) pBtCoexist->bt_info.increase_scan_dev_num = _FALSE; pBtCoexist->bt_info.miracast_plus_bt = _FALSE; + /* for btc common architecture, inform chip type to coex. mechanism */ + if(IS_HARDWARE_TYPE_8822C(padapter)) + pBtCoexist->chip_type = BTC_CHIP_RTL8822C; + else if (IS_HARDWARE_TYPE_8822B(padapter)) + pBtCoexist->chip_type = BTC_CHIP_RTL8822B; + else + pBtCoexist->chip_type = BTC_CHIP_UNDEF; + return _TRUE; } @@ -2535,6 +2808,7 @@ void EXhalbtcoutsrc_AntInfoSetting(void *padapter) } pBtCoexist->board_info.customerID = RT_CID_DEFAULT; + pBtCoexist->board_info.customer_id = RT_CID_DEFAULT; /* set default antenna position to main port */ pBtCoexist->board_info.btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT; @@ -2548,6 +2822,7 @@ void EXhalbtcoutsrc_AntInfoSetting(void *padapter) pBtCoexist->board_info.ant_div_cfg = rtw_btcoex_get_ant_div_cfg((PADAPTER)padapter); + pBtCoexist->board_info.ant_distance = 10; } u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter) @@ -2604,9 +2879,12 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter) pBtCoexist->btc_get_ble_scan_para_from_bt = halbtcoutsrc_GetBleScanParaFromBt; pBtCoexist->btc_get_bt_afh_map_from_bt = halbtcoutsrc_GetBtAFHMapFromBt; pBtCoexist->btc_get_bt_phydm_version = halbtcoutsrc_GetPhydmVersion; + pBtCoexist->btc_set_timer = halbtcoutsrc_SetTimer; + pBtCoexist->btc_set_atomic= halbtcoutsrc_SetAtomic; pBtCoexist->btc_phydm_modify_RA_PCR_threshold = halbtcoutsrc_phydm_modify_RA_PCR_threshold; pBtCoexist->btc_phydm_query_PHY_counter = halbtcoutsrc_phydm_query_PHY_counter; - pBtCoexist->btc_phydm_modify_ANTDIV_HwSw = halbtcoutsrc_phydm_modify_AntDiv_HwSw; + pBtCoexist->btc_reduce_wl_tx_power = halbtcoutsrc_reduce_wl_tx_power; + pBtCoexist->btc_phydm_modify_antdiv_hwsw = halbtcoutsrc_phydm_modify_AntDiv_HwSw; pBtCoexist->cli_buf = &GLBtcDbgBuf[0]; @@ -2645,6 +2923,10 @@ void EXhalbtcoutsrc_PowerOnSetting(PBTC_COEXIST pBtCoexist) pHalData = GET_HAL_DATA((PADAPTER)pBtCoexist->Adapter); +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_power_on_setting(pBtCoexist); + +#else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8723B if (pBtCoexist->board_info.btdm_ant_num == 2) @@ -2696,6 +2978,17 @@ void EXhalbtcoutsrc_PowerOnSetting(PBTC_COEXIST pBtCoexist) ex_halbtc8821c1ant_power_on_setting(pBtCoexist); } #endif + +#ifdef CONFIG_RTL8814A + if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_power_on_setting(pBtCoexist); + /* else if (pBtCoexist->board_info.btdm_ant_num == 1) + ex_halbtc8814a1ant_power_on_setting(pBtCoexist); */ + } +#endif + +#endif } void EXhalbtcoutsrc_PreLoadFirmware(PBTC_COEXIST pBtCoexist) @@ -2740,6 +3033,10 @@ void EXhalbtcoutsrc_init_hw_config(PBTC_COEXIST pBtCoexist, u8 bWifiOnly) pBtCoexist->statistics.cnt_init_hw_config++; +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_init_hw_config(pBtCoexist, bWifiOnly); +#else + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8821A if (pBtCoexist->board_info.btdm_ant_num == 2) @@ -2798,10 +3095,6 @@ void EXhalbtcoutsrc_init_hw_config(PBTC_COEXIST pBtCoexist, u8 bWifiOnly) ex_halbtc8822b1ant_init_hw_config(pBtCoexist, bWifiOnly); else if (pBtCoexist->board_info.btdm_ant_num == 2) ex_halbtc8822b2ant_init_hw_config(pBtCoexist, bWifiOnly); - #ifdef CONFIG_FW_MULTI_PORT_SUPPORT - rtw_hal_set_default_port_id_cmd(pBtCoexist->Adapter, 0); - rtw_hal_set_wifi_port_id_cmd(pBtCoexist->Adapter); - #endif } #endif @@ -2811,12 +3104,17 @@ void EXhalbtcoutsrc_init_hw_config(PBTC_COEXIST pBtCoexist, u8 bWifiOnly) ex_halbtc8821c2ant_init_hw_config(pBtCoexist, bWifiOnly); else if (pBtCoexist->board_info.btdm_ant_num == 1) ex_halbtc8821c1ant_init_hw_config(pBtCoexist, bWifiOnly); - #ifdef CONFIG_FW_MULTI_PORT_SUPPORT - rtw_hal_set_default_port_id_cmd(pBtCoexist->Adapter, 0); - rtw_hal_set_wifi_port_id_cmd(pBtCoexist->Adapter); - #endif } #endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_init_hw_config(pBtCoexist, bWifiOnly); + } +#endif + +#endif } void EXhalbtcoutsrc_init_coex_dm(PBTC_COEXIST pBtCoexist) @@ -2826,6 +3124,10 @@ void EXhalbtcoutsrc_init_coex_dm(PBTC_COEXIST pBtCoexist) pBtCoexist->statistics.cnt_init_coex_dm++; +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_init_coex_dm(pBtCoexist); +#else + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8821A if (pBtCoexist->board_info.btdm_ant_num == 2) @@ -2894,6 +3196,15 @@ void EXhalbtcoutsrc_init_coex_dm(PBTC_COEXIST pBtCoexist) else if (pBtCoexist->board_info.btdm_ant_num == 1) ex_halbtc8821c1ant_init_coex_dm(pBtCoexist); } +#endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_init_coex_dm(pBtCoexist); + } +#endif + #endif pBtCoexist->initilized = _TRUE; @@ -2921,6 +3232,10 @@ void EXhalbtcoutsrc_ips_notify(PBTC_COEXIST pBtCoexist, u8 type) /* All notify is called in cmd thread, don't need to leave low power again * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_ips_notify(pBtCoexist, ipsType); +#else + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8821A if (pBtCoexist->board_info.btdm_ant_num == 2) @@ -2989,6 +3304,15 @@ void EXhalbtcoutsrc_ips_notify(PBTC_COEXIST pBtCoexist, u8 type) else if (pBtCoexist->board_info.btdm_ant_num == 1) ex_halbtc8821c1ant_ips_notify(pBtCoexist, ipsType); } +#endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_ips_notify(pBtCoexist, ipsType); + } +#endif + #endif /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ } @@ -3013,6 +3337,10 @@ void EXhalbtcoutsrc_lps_notify(PBTC_COEXIST pBtCoexist, u8 type) GLBtcWiFiInLPS = _TRUE; } +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_lps_notify(pBtCoexist, lpsType); +#else + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8821A if (pBtCoexist->board_info.btdm_ant_num == 2) @@ -3082,6 +3410,15 @@ void EXhalbtcoutsrc_lps_notify(PBTC_COEXIST pBtCoexist, u8 type) ex_halbtc8821c1ant_lps_notify(pBtCoexist, lpsType); } #endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_lps_notify(pBtCoexist, lpsType); + } +#endif + +#endif } void EXhalbtcoutsrc_scan_notify(PBTC_COEXIST pBtCoexist, u8 type) @@ -3105,6 +3442,10 @@ void EXhalbtcoutsrc_scan_notify(PBTC_COEXIST pBtCoexist, u8 type) /* All notify is called in cmd thread, don't need to leave low power again * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_scan_notify(pBtCoexist, scanType); +#else + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8821A if (pBtCoexist->board_info.btdm_ant_num == 2) @@ -3173,6 +3514,15 @@ void EXhalbtcoutsrc_scan_notify(PBTC_COEXIST pBtCoexist, u8 type) else if (pBtCoexist->board_info.btdm_ant_num == 1) ex_halbtc8821c1ant_scan_notify(pBtCoexist, scanType); } +#endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_scan_notify(pBtCoexist, scanType); + } +#endif + #endif /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ @@ -3218,6 +3568,10 @@ void EXhalbtcoutsrc_connect_notify(PBTC_COEXIST pBtCoexist, u8 assoType) /* All notify is called in cmd thread, don't need to leave low power again * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_connect_notify(pBtCoexist, assoType); +#else + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8821A if (pBtCoexist->board_info.btdm_ant_num == 2) @@ -3286,6 +3640,15 @@ void EXhalbtcoutsrc_connect_notify(PBTC_COEXIST pBtCoexist, u8 assoType) else if (pBtCoexist->board_info.btdm_ant_num == 1) ex_halbtc8821c1ant_connect_notify(pBtCoexist, assoType); } +#endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_connect_notify(pBtCoexist, assoType); + } +#endif + #endif /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ @@ -3293,24 +3656,43 @@ void EXhalbtcoutsrc_connect_notify(PBTC_COEXIST pBtCoexist, u8 assoType) void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS mediaStatus) { - u8 mStatus; + u8 mStatus = BTC_MEDIA_MAX; + PADAPTER adapter = NULL; + HAL_DATA_TYPE *hal = NULL; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; - pBtCoexist->statistics.cnt_media_status_notify++; if (pBtCoexist->manual_control) return; - if (RT_MEDIA_CONNECT == mediaStatus) - mStatus = BTC_MEDIA_CONNECT; - else + pBtCoexist->statistics.cnt_media_status_notify++; + adapter = (PADAPTER)pBtCoexist->Adapter; + hal = GET_HAL_DATA(adapter); + + if (RT_MEDIA_CONNECT == mediaStatus) { + if (hal->current_band_type == BAND_ON_2_4G) + mStatus = BTC_MEDIA_CONNECT; + else if (hal->current_band_type == BAND_ON_5G) + mStatus = BTC_MEDIA_CONNECT_5G; + else { + mStatus = BTC_MEDIA_CONNECT; + RTW_ERR("%s unknow band type\n", __func__); + } + } else mStatus = BTC_MEDIA_DISCONNECT; /* All notify is called in cmd thread, don't need to leave low power again * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_media_status_notify(pBtCoexist, mStatus); +#else + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8821A + /* compatible for 8821A */ + if (mStatus == BTC_MEDIA_CONNECT_5G) + mStatus = BTC_MEDIA_CONNECT; if (pBtCoexist->board_info.btdm_ant_num == 2) ex_halbtc8821a2ant_media_status_notify(pBtCoexist, mStatus); else if (pBtCoexist->board_info.btdm_ant_num == 1) @@ -3354,6 +3736,9 @@ void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS #ifdef CONFIG_RTL8812A else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { + /* compatible for 8812A */ + if (mStatus == BTC_MEDIA_CONNECT_5G) + mStatus = BTC_MEDIA_CONNECT; if (pBtCoexist->board_info.btdm_ant_num == 2) ex_halbtc8812a2ant_media_status_notify(pBtCoexist, mStatus); else if (pBtCoexist->board_info.btdm_ant_num == 1) @@ -3377,6 +3762,15 @@ void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS else if (pBtCoexist->board_info.btdm_ant_num == 1) ex_halbtc8821c1ant_media_status_notify(pBtCoexist, mStatus); } +#endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_media_status_notify(pBtCoexist, mStatus); + } +#endif + #endif /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ @@ -3384,14 +3778,20 @@ void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType) { - u8 packetType; + u8 packetType; + PADAPTER adapter = NULL; + HAL_DATA_TYPE *hal = NULL; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; - pBtCoexist->statistics.cnt_specific_packet_notify++; + if (pBtCoexist->manual_control) return; + pBtCoexist->statistics.cnt_specific_packet_notify++; + adapter = (PADAPTER)pBtCoexist->Adapter; + hal = GET_HAL_DATA(adapter); + if (PACKET_DHCP == pktType) packetType = BTC_PACKET_DHCP; else if (PACKET_EAPOL == pktType) @@ -3403,10 +3803,21 @@ void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType) return; } + if (hal->current_band_type == BAND_ON_5G) + packetType |= BTC_5G_BAND; + /* All notify is called in cmd thread, don't need to leave low power again * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_specific_packet_notify(pBtCoexist, packetType); +#else + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8821A + /* compatible for 8821A */ + if (hal->current_band_type == BAND_ON_5G) + packetType &= ~BTC_5G_BAND; + if (pBtCoexist->board_info.btdm_ant_num == 2) ex_halbtc8821a2ant_specific_packet_notify(pBtCoexist, packetType); else if (pBtCoexist->board_info.btdm_ant_num == 1) @@ -3450,6 +3861,10 @@ void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType) #ifdef CONFIG_RTL8812A else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { + /* compatible for 8812A */ + if (hal->current_band_type == BAND_ON_5G) + packetType &= ~BTC_5G_BAND; + if (pBtCoexist->board_info.btdm_ant_num == 2) ex_halbtc8812a2ant_specific_packet_notify(pBtCoexist, packetType); else if (pBtCoexist->board_info.btdm_ant_num == 1) @@ -3473,6 +3888,15 @@ void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType) else if (pBtCoexist->board_info.btdm_ant_num == 1) ex_halbtc8821c1ant_specific_packet_notify(pBtCoexist, packetType); } +#endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_specific_packet_notify(pBtCoexist, packetType); + } +#endif + #endif /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ @@ -3487,6 +3911,10 @@ void EXhalbtcoutsrc_bt_info_notify(PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 lengt /* All notify is called in cmd thread, don't need to leave low power again * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_bt_info_notify(pBtCoexist, tmpBuf, length); +#else + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8821A if (pBtCoexist->board_info.btdm_ant_num == 2) @@ -3555,6 +3983,15 @@ void EXhalbtcoutsrc_bt_info_notify(PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 lengt else if (pBtCoexist->board_info.btdm_ant_num == 1) ex_halbtc8821c1ant_bt_info_notify(pBtCoexist, tmpBuf, length); } +#endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_bt_info_notify(pBtCoexist, tmpBuf, length); + } +#endif + #endif /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ @@ -3565,6 +4002,10 @@ void EXhalbtcoutsrc_WlFwDbgInfoNotify(PBTC_COEXIST pBtCoexist, u8* tmpBuf, u8 le if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_wl_fwdbginfo_notify(pBtCoexist, tmpBuf, length); +#else + if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8703B if (pBtCoexist->board_info.btdm_ant_num == 1) @@ -3589,6 +4030,8 @@ void EXhalbtcoutsrc_WlFwDbgInfoNotify(PBTC_COEXIST pBtCoexist, u8* tmpBuf, u8 le ex_halbtc8821c1ant_wl_fwdbginfo_notify(pBtCoexist, tmpBuf, length); } #endif + +#endif } void EXhalbtcoutsrc_rx_rate_change_notify(PBTC_COEXIST pBtCoexist, u8 is_data_frame, u8 btc_rate_id) @@ -3598,6 +4041,10 @@ void EXhalbtcoutsrc_rx_rate_change_notify(PBTC_COEXIST pBtCoexist, u8 is_data_fr pBtCoexist->statistics.cnt_rate_id_notify++; +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_rx_rate_change_notify(pBtCoexist, is_data_frame, btc_rate_id); +#else + if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8703B if (pBtCoexist->board_info.btdm_ant_num == 1) @@ -3622,18 +4069,24 @@ void EXhalbtcoutsrc_rx_rate_change_notify(PBTC_COEXIST pBtCoexist, u8 is_data_fr ex_halbtc8821c2ant_rx_rate_change_notify(pBtCoexist, is_data_frame, btc_rate_id); } #endif + +#endif } -VOID +void EXhalbtcoutsrc_RfStatusNotify( - IN PBTC_COEXIST pBtCoexist, - IN u1Byte type + PBTC_COEXIST pBtCoexist, + u8 type ) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cnt_rf_status_notify++; +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_rf_status_notify(pBtCoexist, type); +#else + if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8723B if (pBtCoexist->board_info.btdm_ant_num == 1) @@ -3672,6 +4125,15 @@ EXhalbtcoutsrc_RfStatusNotify( ex_halbtc8821c1ant_rf_status_notify(pBtCoexist, type); } #endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_rf_status_notify(pBtCoexist, type); + } +#endif + +#endif } void EXhalbtcoutsrc_StackOperationNotify(PBTC_COEXIST pBtCoexist, u8 type) @@ -3705,6 +4167,12 @@ void EXhalbtcoutsrc_halt_notify(PBTC_COEXIST pBtCoexist) if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; + pBtCoexist->statistics.cnt_halt_notify++; + +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_halt_notify(pBtCoexist); +#else + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8821A if (pBtCoexist->board_info.btdm_ant_num == 2) @@ -3774,6 +4242,15 @@ void EXhalbtcoutsrc_halt_notify(PBTC_COEXIST pBtCoexist) ex_halbtc8821c1ant_halt_notify(pBtCoexist); } #endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_halt_notify(pBtCoexist); + } +#endif + +#endif } void EXhalbtcoutsrc_SwitchBtTRxMask(PBTC_COEXIST pBtCoexist) @@ -3792,10 +4269,16 @@ void EXhalbtcoutsrc_pnp_notify(PBTC_COEXIST pBtCoexist, u8 pnpState) if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; + pBtCoexist->statistics.cnt_pnp_notify++; + /* */ /* currently only 1ant we have to do the notification, */ /* once pnp is notified to sleep state, we have to leave LPS that we can sleep normally. */ /* */ +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_pnp_notify(pBtCoexist, pnpState); +#else + if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8723B if (pBtCoexist->board_info.btdm_ant_num == 1) @@ -3861,6 +4344,15 @@ void EXhalbtcoutsrc_pnp_notify(PBTC_COEXIST pBtCoexist, u8 pnpState) ex_halbtc8821c1ant_pnp_notify(pBtCoexist, pnpState); } #endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_pnp_notify(pBtCoexist, pnpState); + } +#endif + +#endif } void EXhalbtcoutsrc_CoexDmSwitch(PBTC_COEXIST pBtCoexist) @@ -3900,6 +4392,115 @@ void EXhalbtcoutsrc_CoexDmSwitch(PBTC_COEXIST pBtCoexist) halbtcoutsrc_NormalLowPower(pBtCoexist); } +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) +void EXhalbtcoutsrc_TimerNotify(PBTC_COEXIST pBtCoexist, u32 timer_type) +{ + rtw_btc_ex_timerup_notify(pBtCoexist, timer_type); +} + +void EXhalbtcoutsrc_WLStatusChangeNotify(PBTC_COEXIST pBtCoexist, u32 change_type) +{ + rtw_btc_ex_wl_status_change_notify(pBtCoexist, change_type); +} + +u32 EXhalbtcoutsrc_CoexTimerCheck(PBTC_COEXIST pBtCoexist) +{ + u32 i, timer_map = 0; + + for (i = 0; i < BTC_TIMER_MAX; i++) { + if (pBtCoexist->coex_sta.cnt_timer[i] > 0) { + if (pBtCoexist->coex_sta.cnt_timer[i] == 1) { + timer_map |= BIT(i); + RTW_DBG("[BTC], %s(): timer_map = 0x%x\n", __func__, timer_map); + } + + pBtCoexist->coex_sta.cnt_timer[i]--; + } + } + + return timer_map; +} + +u32 EXhalbtcoutsrc_WLStatusCheck(PBTC_COEXIST pBtCoexist) +{ + struct btc_wifi_link_info link_info; + const struct btc_chip_para *chip_para = pBtCoexist->chip_para; + u32 change_map = 0; + static bool wl_busy_pre; + bool wl_busy = _FALSE; + s32 wl_rssi; + u32 traffic_dir; + u8 i, tmp; + static u8 rssi_step_pre = 4; + + /* WL busy to idle or idle to busy */ + pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &wl_busy); + if (wl_busy != wl_busy_pre) { + if (wl_busy) + change_map |= BIT(BTC_WLSTATUS_CHANGE_TOBUSY); + else + change_map |= BIT(BTC_WLSTATUS_CHANGE_TOIDLE); + + wl_busy_pre = wl_busy; + } + + /* WL RSSI */ + pBtCoexist->btc_get(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wl_rssi); + tmp = (u8)(wl_rssi & 0xff); + for (i = 0; i < 4; i++) { + if (tmp >= chip_para->wl_rssi_step[i]) { + if (rssi_step_pre != i) { + rssi_step_pre = i; + change_map |= BIT(BTC_WLSTATUS_CHANGE_RSSI); + } + break; + } else if (i == 3) + rssi_step_pre = 4; + } + + /* WL Link info */ + pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_LINK_INFO, &link_info); + if (link_info.link_mode != pBtCoexist->wifi_link_info.link_mode || + link_info.sta_center_channel != + pBtCoexist->wifi_link_info.sta_center_channel || + link_info.p2p_center_channel != + pBtCoexist->wifi_link_info.p2p_center_channel || + link_info.bany_client_join_go != + pBtCoexist->wifi_link_info.bany_client_join_go) { + change_map |= BIT(BTC_WLSTATUS_CHANGE_LINKINFO); + pBtCoexist->wifi_link_info = link_info; + } + + /* WL Traffic Direction */ + pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, + &traffic_dir); + if (wl_busy && traffic_dir != + pBtCoexist->wifi_link_info_ext.traffic_dir) { + change_map |= BIT(BTC_WLSTATUS_CHANGE_DIRECTION); + pBtCoexist->wifi_link_info_ext.traffic_dir = traffic_dir; + } + + RTW_DBG("[BTC], %s(): change_map = 0x%x\n", __func__, change_map); + + return change_map; +} + +void EXhalbtcoutsrc_status_monitor(PBTC_COEXIST pBtCoexist) +{ + u32 timer_up_type = 0, wl_status_change_type = 0; + + timer_up_type = EXhalbtcoutsrc_CoexTimerCheck(pBtCoexist); + if (timer_up_type != 0) + EXhalbtcoutsrc_TimerNotify(pBtCoexist, timer_up_type); + + wl_status_change_type = EXhalbtcoutsrc_WLStatusCheck(pBtCoexist); + if (wl_status_change_type != 0) + EXhalbtcoutsrc_WLStatusChangeNotify(pBtCoexist, wl_status_change_type); + + rtw_btc_ex_periodical(pBtCoexist); +} +#endif + void EXhalbtcoutsrc_periodical(PBTC_COEXIST pBtCoexist) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) @@ -3909,6 +4510,10 @@ void EXhalbtcoutsrc_periodical(PBTC_COEXIST pBtCoexist) /* Periodical should be called in cmd thread, */ /* don't need to leave low power again * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + EXhalbtcoutsrc_status_monitor(pBtCoexist); +#else + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8821A if (pBtCoexist->board_info.btdm_ant_num == 2) @@ -3979,6 +4584,15 @@ void EXhalbtcoutsrc_periodical(PBTC_COEXIST pBtCoexist) else if (pBtCoexist->board_info.btdm_ant_num == 1) ex_halbtc8821c1ant_periodical(pBtCoexist); } +#endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_periodical(pBtCoexist); + } +#endif + #endif /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ @@ -3994,6 +4608,10 @@ void EXhalbtcoutsrc_dbg_control(PBTC_COEXIST pBtCoexist, u8 opCode, u8 opLen, u8 /* This function doesn't be called yet, */ /* default no need to leave low power to avoid deadlock * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + /* rtw_btc_ex_dbg_control(pBtCoexist, opCode, opLen, pData); */ +#else + if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8192E if (pBtCoexist->board_info.btdm_ant_num == 1) @@ -4014,19 +4632,21 @@ void EXhalbtcoutsrc_dbg_control(PBTC_COEXIST pBtCoexist, u8 opCode, u8 opLen, u8 else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) if(pBtCoexist->board_info.btdm_ant_num == 1) ex_halbtc8822b1ant_dbg_control(pBtCoexist, opCode, opLen, pData); +#endif + #endif /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ } #if 0 -VOID +void EXhalbtcoutsrc_AntennaDetection( - IN PBTC_COEXIST pBtCoexist, - IN u4Byte centFreq, - IN u4Byte offset, - IN u4Byte span, - IN u4Byte seconds + PBTC_COEXIST pBtCoexist, + u32 centFreq, + u32 offset, + u32 span, + u32 seconds ) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) @@ -4051,13 +4671,16 @@ void EXhalbtcoutsrc_StackUpdateProfileInfo(void) { #ifdef CONFIG_BT_COEXIST_SOCKET_TRX PBTC_COEXIST pBtCoexist = &GLBtCoexist; - PADAPTER padapter = (PADAPTER)GLBtCoexist.Adapter; - PBT_MGNT pBtMgnt = &padapter->coex_info.BtMgnt; + PADAPTER padapter = NULL; + PBT_MGNT pBtMgnt = NULL; u8 i; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; + padapter = (PADAPTER)pBtCoexist->Adapter; + pBtMgnt = &padapter->coex_info.BtMgnt; + pBtCoexist->stack_info.profile_notified = _TRUE; pBtCoexist->stack_info.num_of_link = @@ -4195,6 +4818,8 @@ void EXhalbtcoutsrc_SetSingleAntPath(u8 singleAntPath) void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist) { + HAL_DATA_TYPE *pHalData = NULL; + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; @@ -4203,6 +4828,13 @@ void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist) /* To prevent the racing with IPS enter */ halbtcoutsrc_EnterPwrLock(pBtCoexist); +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + pHalData = GET_HAL_DATA((PADAPTER)pBtCoexist->Adapter); + + if (pHalData->EEPROMBluetoothCoexist == _TRUE) + rtw_btc_ex_display_coex_info(pBtCoexist); +#else + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8821A if (pBtCoexist->board_info.btdm_ant_num == 2) @@ -4271,6 +4903,15 @@ void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist) else if (pBtCoexist->board_info.btdm_ant_num == 1) ex_halbtc8821c1ant_display_coex_info(pBtCoexist); } +#endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_display_coex_info(pBtCoexist); + } +#endif + #endif halbtcoutsrc_ExitPwrLock(pBtCoexist); @@ -4292,24 +4933,22 @@ void EXhalbtcoutsrc_DisplayAntDetection(PBTC_COEXIST pBtCoexist) #endif } -#ifdef CONFIG_RTL8821C - else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { - if (pBtCoexist->board_info.btdm_ant_num == 2) - ex_halbtc8821c2ant_display_ant_detection(pBtCoexist); - else if (pBtCoexist->board_info.btdm_ant_num == 1) - ex_halbtc8821c1ant_display_ant_detection(pBtCoexist); - } -#endif - halbtcoutsrc_NormalLowPower(pBtCoexist); } void ex_halbtcoutsrc_pta_off_on_notify(PBTC_COEXIST pBtCoexist, u8 bBTON) { -#ifdef CONFIG_RTL8812A if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { +#ifdef CONFIG_RTL8812A if (pBtCoexist->board_info.btdm_ant_num == 2) ex_halbtc8812a2ant_pta_off_on_notify(pBtCoexist, (bBTON == _TRUE) ? BTC_BT_ON : BTC_BT_OFF); +#endif + } + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_pta_off_on_notify(pBtCoexist, (bBTON == _TRUE) ? BTC_BT_ON : BTC_BT_OFF); } #endif } @@ -4341,6 +4980,9 @@ void EXhalbtcoutsrc_switchband_notify(struct btc_coexist *pBtCoexist, u8 type) /* Driver should guarantee that the HW status isn't in low power mode */ /* halbtcoutsrc_LeaveLowPower(pBtCoexist); */ +#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) + rtw_btc_ex_switchband_notify(pBtCoexist, type); +#else if(IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { #ifdef CONFIG_RTL8822B @@ -4358,6 +5000,15 @@ void EXhalbtcoutsrc_switchband_notify(struct btc_coexist *pBtCoexist, u8 type) else if (pBtCoexist->board_info.btdm_ant_num == 1) ex_halbtc8821c1ant_switchband_notify(pBtCoexist, type); } +#endif + +#ifdef CONFIG_RTL8814A + else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { + if (pBtCoexist->board_info.btdm_ant_num == 2) + ex_halbtc8814a2ant_switchband_notify(pBtCoexist, type); + } +#endif + #endif /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ @@ -4634,53 +5285,6 @@ u8 EXhalbtcoutsrc_rate_id_to_btc_rate_id(u8 rate_id) return btc_rate_id; } -static void halbt_init_hw_config92C(PADAPTER padapter) -{ - PHAL_DATA_TYPE pHalData; - u8 u1Tmp; - - - pHalData = GET_HAL_DATA(padapter); - if ((pHalData->bt_coexist.btChipType == BT_CSR_BC4) || - (pHalData->bt_coexist.btChipType == BT_CSR_BC8)) { - if (pHalData->rf_type == RF_1T1R) { - /* Config to 1T1R */ - u1Tmp = rtw_read8(padapter, rOFDM0_TRxPathEnable); - u1Tmp &= ~BIT(1); - rtw_write8(padapter, rOFDM0_TRxPathEnable, u1Tmp); - RT_DISP(FBT, BT_TRACE, ("[BTCoex], BT write 0xC04 = 0x%x\n", u1Tmp)); - - u1Tmp = rtw_read8(padapter, rOFDM1_TRxPathEnable); - u1Tmp &= ~BIT(1); - rtw_write8(padapter, rOFDM1_TRxPathEnable, u1Tmp); - RT_DISP(FBT, BT_TRACE, ("[BTCoex], BT write 0xD04 = 0x%x\n", u1Tmp)); - } - } -} - -static void halbt_init_hw_config92D(PADAPTER padapter) -{ - PHAL_DATA_TYPE pHalData; - u8 u1Tmp; - - pHalData = GET_HAL_DATA(padapter); - if ((pHalData->bt_coexist.btChipType == BT_CSR_BC4) || - (pHalData->bt_coexist.btChipType == BT_CSR_BC8)) { - if (pHalData->rf_type == RF_1T1R) { - /* Config to 1T1R */ - u1Tmp = rtw_read8(padapter, rOFDM0_TRxPathEnable); - u1Tmp &= ~BIT(1); - rtw_write8(padapter, rOFDM0_TRxPathEnable, u1Tmp); - RT_DISP(FBT, BT_TRACE, ("[BTCoex], BT write 0xC04 = 0x%x\n", u1Tmp)); - - u1Tmp = rtw_read8(padapter, rOFDM1_TRxPathEnable); - u1Tmp &= ~BIT(1); - rtw_write8(padapter, rOFDM1_TRxPathEnable, u1Tmp); - RT_DISP(FBT, BT_TRACE, ("[BTCoex], BT write 0xD04 = 0x%x\n", u1Tmp)); - } - } -} - /* * Description: * Run BT-Coexist mechansim or not @@ -4770,7 +5374,8 @@ void hal_btcoex_PowerOffSetting(PADAPTER padapter) { /* Clear the WiFi on/off bit in scoreboard reg. if necessary */ if (IS_HARDWARE_TYPE_8703B(padapter) || IS_HARDWARE_TYPE_8723D(padapter) - || IS_HARDWARE_TYPE_8821C(padapter) || IS_HARDWARE_TYPE_8822B(padapter)) + || IS_HARDWARE_TYPE_8821C(padapter) || IS_HARDWARE_TYPE_8822B(padapter) + || IS_HARDWARE_TYPE_8822C(padapter)) rtw_write16(padapter, 0xaa, 0x8000); } @@ -4910,7 +5515,7 @@ void hal_btcoex_SuspendNotify(PADAPTER padapter, u8 state) case BTCOEX_SUSPEND_STATE_RESUME: #ifdef CONFIG_FW_MULTI_PORT_SUPPORT /* re-download FW after resume, inform WL FW port number */ - rtw_hal_set_wifi_port_id_cmd(GLBtCoexist.Adapter); + rtw_hal_set_wifi_btc_port_id_cmd(GLBtCoexist.Adapter); #endif EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, BTC_WIFI_PNP_WAKE_UP); break; @@ -5035,6 +5640,21 @@ u32 hal_btcoex_GetRaMask(PADAPTER padapter) return GLBtCoexist.bt_info.ra_mask; } +u8 hal_btcoex_query_reduced_wl_pwr_lvl(PADAPTER padapter) +{ + return GLBtCoexist.coex_dm.cur_wl_pwr_lvl; +} + +void hal_btcoex_set_reduced_wl_pwr_lvl(PADAPTER padapter, u8 val) +{ + GLBtCoexist.coex_dm.cur_wl_pwr_lvl = val; +} + +void hal_btcoex_do_reduce_wl_pwr_lvl(PADAPTER padapter) +{ + halbtcoutsrc_reduce_wl_tx_power(&GLBtCoexist, 0); +} + void hal_btcoex_RecordPwrMode(PADAPTER padapter, u8 *pCmdBuf, u8 cmdLen) { @@ -5256,19 +5876,19 @@ void hal_btcoex_SetAntIsolationType(PADAPTER padapter, u8 anttype) switch (pHalData->bt_coexist.btAntisolation) { case 0: - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_0; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_0; break; case 1: - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_1; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_1; break; case 2: - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_2; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_2; break; case 3: - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_3; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_3; break; case 4: - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_4; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_4; break; } @@ -5326,7 +5946,7 @@ hal_btcoex_ParseAntIsolationConfigFile( RTW_INFO("Fail to parse parameters , format error!\n"); break; } - _rtw_memset((PVOID)param_value_string , 0 , 10); + _rtw_memset((void *)param_value_string , 0 , 10); if (!ParseQualifiedString(szLine , &i , param_value_string , '"' , '"')) { RTW_INFO("Fail to parse parameters\n"); return _FAIL; @@ -5369,8 +5989,8 @@ hal_btcoex_ParseAntIsolationConfigFile( int hal_btcoex_AntIsolationConfig_ParaFile( - IN PADAPTER Adapter, - IN char *pFileName + PADAPTER Adapter, + char *pFileName ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -5466,4 +6086,18 @@ void hal_btcoex_rx_rate_change_notify(PADAPTER padapter, u8 is_data_frame, u8 ra { EXhalbtcoutsrc_rx_rate_change_notify(&GLBtCoexist, is_data_frame, EXhalbtcoutsrc_rate_id_to_btc_rate_id(rate_id)); } + +u16 hal_btcoex_btset_testode(PADAPTER padapter, u8 type) +{ + u16 ret = 0; + + halbtcoutsrc_LeaveLowPower(&GLBtCoexist); + + ret = halbtcoutsrc_setbttestmode(&GLBtCoexist, type); + + halbtcoutsrc_NormalLowPower(&GLBtCoexist); + + return ret; +} + #endif /* CONFIG_BT_COEXIST */ diff --git a/hal/hal_btcoex_wifionly.c b/hal/hal_btcoex_wifionly.c index 8201513..ffb5f77 100644 --- a/hal/hal_btcoex_wifionly.c +++ b/hal/hal_btcoex_wifionly.c @@ -20,7 +20,7 @@ struct wifi_only_cfg GLBtCoexistWifiOnly; -void halwifionly_write1byte(PVOID pwifionlyContext, u32 RegAddr, u8 Data) +void halwifionly_write1byte(void *pwifionlyContext, u32 RegAddr, u8 Data) { struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; PADAPTER Adapter = pwifionlycfg->Adapter; @@ -28,7 +28,7 @@ void halwifionly_write1byte(PVOID pwifionlyContext, u32 RegAddr, u8 Data) rtw_write8(Adapter, RegAddr, Data); } -void halwifionly_write2byte(PVOID pwifionlyContext, u32 RegAddr, u16 Data) +void halwifionly_write2byte(void *pwifionlyContext, u32 RegAddr, u16 Data) { struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; PADAPTER Adapter = pwifionlycfg->Adapter; @@ -36,7 +36,7 @@ void halwifionly_write2byte(PVOID pwifionlyContext, u32 RegAddr, u16 Data) rtw_write16(Adapter, RegAddr, Data); } -void halwifionly_write4byte(PVOID pwifionlyContext, u32 RegAddr, u32 Data) +void halwifionly_write4byte(void *pwifionlyContext, u32 RegAddr, u32 Data) { struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; PADAPTER Adapter = pwifionlycfg->Adapter; @@ -44,7 +44,7 @@ void halwifionly_write4byte(PVOID pwifionlyContext, u32 RegAddr, u32 Data) rtw_write32(Adapter, RegAddr, Data); } -u8 halwifionly_read1byte(PVOID pwifionlyContext, u32 RegAddr) +u8 halwifionly_read1byte(void *pwifionlyContext, u32 RegAddr) { struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; PADAPTER Adapter = pwifionlycfg->Adapter; @@ -52,7 +52,7 @@ u8 halwifionly_read1byte(PVOID pwifionlyContext, u32 RegAddr) return rtw_read8(Adapter, RegAddr); } -u16 halwifionly_read2byte(PVOID pwifionlyContext, u32 RegAddr) +u16 halwifionly_read2byte(void * pwifionlyContext, u32 RegAddr) { struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; PADAPTER Adapter = pwifionlycfg->Adapter; @@ -60,7 +60,7 @@ u16 halwifionly_read2byte(PVOID pwifionlyContext, u32 RegAddr) return rtw_read16(Adapter, RegAddr); } -u32 halwifionly_read4byte(PVOID pwifionlyContext, u32 RegAddr) +u32 halwifionly_read4byte(void *pwifionlyContext, u32 RegAddr) { struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; PADAPTER Adapter = pwifionlycfg->Adapter; @@ -68,7 +68,7 @@ u32 halwifionly_read4byte(PVOID pwifionlyContext, u32 RegAddr) return rtw_read32(Adapter, RegAddr); } -void halwifionly_bitmaskwrite1byte(PVOID pwifionlyContext, u32 regAddr, u8 bitMask, u8 data) +void halwifionly_bitmaskwrite1byte(void *pwifionlyContext, u32 regAddr, u8 bitMask, u8 data) { u8 originalValue, bitShift = 0; u8 i; @@ -88,7 +88,7 @@ void halwifionly_bitmaskwrite1byte(PVOID pwifionlyContext, u32 regAddr, u8 bitMa rtw_write8(Adapter, regAddr, data); } -void halwifionly_phy_set_rf_reg(PVOID pwifionlyContext, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data) +void halwifionly_phy_set_rf_reg(void *pwifionlyContext, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data) { struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; PADAPTER Adapter = pwifionlycfg->Adapter; @@ -96,7 +96,7 @@ void halwifionly_phy_set_rf_reg(PVOID pwifionlyContext, enum rf_path eRFPath, u3 phy_set_rf_reg(Adapter, eRFPath, RegAddr, BitMask, Data); } -void halwifionly_phy_set_bb_reg(PVOID pwifionlyContext, u32 RegAddr, u32 BitMask, u32 Data) +void halwifionly_phy_set_bb_reg(void *pwifionlyContext, u32 RegAddr, u32 BitMask, u32 Data) { struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; PADAPTER Adapter = pwifionlycfg->Adapter; @@ -122,6 +122,12 @@ void hal_btcoex_wifionly_switchband_notify(PADAPTER padapter) else if (IS_HARDWARE_TYPE_8821C(padapter)) ex_hal8821c_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g); #endif + +#ifdef CONFIG_RTL8822C + else if (IS_HARDWARE_TYPE_8822C(padapter)) + ex_hal8822c_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g); +#endif + } void hal_btcoex_wifionly_scan_notify(PADAPTER padapter) @@ -142,6 +148,36 @@ void hal_btcoex_wifionly_scan_notify(PADAPTER padapter) else if (IS_HARDWARE_TYPE_8821C(padapter)) ex_hal8821c_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g); #endif + +#ifdef CONFIG_RTL8822C + else if (IS_HARDWARE_TYPE_8822C(padapter)) + ex_hal8822c_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g); +#endif +} + +void hal_btcoex_wifionly_connect_notify(PADAPTER padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 is_5g = _FALSE; + + if (pHalData->current_band_type == BAND_ON_5G) + is_5g = _TRUE; + + if (IS_HARDWARE_TYPE_8822B(padapter)) { +#ifdef CONFIG_RTL8822B + ex_hal8822b_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g); +#endif + } + +#ifdef CONFIG_RTL8821C + else if (IS_HARDWARE_TYPE_8821C(padapter)) + ex_hal8821c_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g); +#endif + +#ifdef CONFIG_RTL8822C + else if (IS_HARDWARE_TYPE_8822C(padapter)) + ex_hal8822c_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g); +#endif } void hal_btcoex_wifionly_hw_config(PADAPTER padapter) @@ -163,6 +199,11 @@ void hal_btcoex_wifionly_hw_config(PADAPTER padapter) else if (IS_HARDWARE_TYPE_8821C(padapter)) ex_hal8821c_wifi_only_hw_config(pwifionlycfg); #endif + +#ifdef CONFIG_RTL8822C + else if (IS_HARDWARE_TYPE_8822C(padapter)) + ex_hal8822c_wifi_only_hw_config(pwifionlycfg); +#endif } void hal_btcoex_wifionly_initlizevariables(PADAPTER padapter) diff --git a/hal/hal_com.c b/hal/hal_com.c index 452255d..3f3a45d 100644 --- a/hal/hal_com.c +++ b/hal/hal_com.c @@ -37,6 +37,131 @@ void rtw_dump_fw_info(void *sel, _adapter *adapter) RTW_PRINT_SEL(sel, "FW not ready\n"); } +bool rsvd_page_cache_update_all(struct rsvd_page_cache_t *cache, u8 loc + , u8 txdesc_len, u32 page_size, u8 *info, u32 info_len) +{ + u8 page_num = (u8)PageNum(txdesc_len + info_len, page_size); + bool modified = 0; + bool loc_mod = 0, size_mod = 0, page_num_mod = 0; + + if (cache->loc != loc) { + RTW_INFO("%s %s loc change (%u -> %u)\n" + , __func__, cache->name, cache->loc, loc); + loc_mod = 1; + } + if (cache->size != info_len) { + RTW_INFO("%s %s size change (%u -> %u)\n" + , __func__, cache->name, cache->size, info_len); + size_mod = 1; + } + if (cache->page_num != page_num) { + RTW_INFO("%s %s page_num change (%u -> %u)\n" + , __func__, cache->name, cache->page_num, page_num); + page_num_mod = 1; + } + + if (info) { + if (cache->data) { + if (cache->size == info_len) { + if (_rtw_memcmp(cache->data, info, info_len) != _TRUE) { + RTW_INFO("%s %s data change\n", __func__, cache->name); + modified = 1; + } + } else + rsvd_page_cache_free_data(cache); + } + + if (!cache->data) { + cache->data = rtw_malloc(info_len); + if (!cache->data) { + RTW_ERR("%s %s alloc data with size(%u) fail\n" + , __func__, cache->name, info_len); + rtw_warn_on(1); + } else { + RTW_INFO("%s %s alloc data with size(%u)\n" + , __func__, cache->name, info_len); + } + modified = 1; + } + + if (cache->data && modified) + _rtw_memcpy(cache->data, info, info_len); + } else { + if (cache->data && size_mod) + rsvd_page_cache_free_data(cache); + } + + cache->loc = loc; + cache->page_num = page_num; + cache->size = info_len; + + return modified | loc_mod | size_mod | page_num_mod; +} + +bool rsvd_page_cache_update_data(struct rsvd_page_cache_t *cache, u8 *info, u32 info_len) +{ + bool modified = 0; + + if (!info || !info_len) { + RTW_WARN("%s %s invalid input(info:%p, info_len:%u)\n" + , __func__, cache->name, info, info_len); + goto exit; + } + + if (!cache->loc || !cache->page_num || !cache->size) { + RTW_ERR("%s %s layout not ready(loc:%u, page_num:%u, size:%u)\n" + , __func__, cache->name, cache->loc, cache->page_num, cache->size); + rtw_warn_on(1); + goto exit; + } + + if (cache->size != info_len) { + RTW_ERR("%s %s size(%u) differ with info_len(%u)\n" + , __func__, cache->name, cache->size, info_len); + rtw_warn_on(1); + goto exit; + } + + if (!cache->data) { + cache->data = rtw_zmalloc(cache->size); + if (!cache->data) { + RTW_ERR("%s %s alloc data with size(%u) fail\n" + , __func__, cache->name, cache->size); + rtw_warn_on(1); + goto exit; + } else { + RTW_INFO("%s %s alloc data with size(%u)\n" + , __func__, cache->name, info_len); + } + modified = 1; + } + + if (_rtw_memcmp(cache->data, info, cache->size) == _FALSE) { + RTW_INFO("%s %s data change\n", __func__, cache->name); + _rtw_memcpy(cache->data, info, cache->size); + modified = 1; + } + +exit: + return modified; +} + +void rsvd_page_cache_free_data(struct rsvd_page_cache_t *cache) +{ + if (cache->data) { + rtw_mfree(cache->data, cache->size); + cache->data = NULL; + } +} + +void rsvd_page_cache_free(struct rsvd_page_cache_t *cache) +{ + cache->loc = 0; + cache->page_num = 0; + rsvd_page_cache_free_data(cache); + cache->size = 0; +} + /* #define CONFIG_GTK_OL_DBG */ /*#define DBG_SEC_CAM_MOVE*/ @@ -114,6 +239,8 @@ void dump_chip_info(HAL_VERSION ChipVersion) cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188E_"); else if (IS_8188F(ChipVersion)) cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188F_"); + else if (IS_8188GTV(ChipVersion)) + cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188GTV_"); else if (IS_8812_SERIES(ChipVersion)) cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8812_"); else if (IS_8192E(ChipVersion)) @@ -132,6 +259,12 @@ void dump_chip_info(HAL_VERSION ChipVersion) cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8822B_"); else if (IS_8821C_SERIES(ChipVersion)) cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8821C_"); + else if (IS_8710B_SERIES(ChipVersion)) + cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8710B_"); + else if (IS_8192F_SERIES(ChipVersion)) + cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8192F_"); + else if (IS_8822C_SERIES(ChipVersion)) + cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8822C_"); else cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_UNKNOWN_"); @@ -183,6 +316,38 @@ void dump_chip_info(HAL_VERSION ChipVersion) RTW_INFO("%s", buf); } + +u8 rtw_hal_get_port(_adapter *adapter) +{ + u8 hw_port = get_hw_port(adapter); +#ifdef CONFIG_CLIENT_PORT_CFG + u8 clt_port = get_clt_port(adapter); + + if (clt_port) + hw_port = clt_port; + +#ifdef DBG_HW_PORT + if (MLME_IS_STA(adapter) && (adapter->client_id != MAX_CLIENT_PORT_NUM)) { + if(hw_port == CLT_PORT_INVALID) { + RTW_ERR(ADPT_FMT" @@@@@ Client port == 0 @@@@@\n", ADPT_ARG(adapter)); + rtw_warn_on(1); + } + } + else if (MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)) { + if (hw_port != HW_PORT0) { + RTW_ERR(ADPT_FMT" @@@@@ AP / MESH port != 0 @@@@@\n", ADPT_ARG(adapter)); + rtw_warn_on(1); + } + } + if (0) + RTW_INFO(ADPT_FMT" - HP:%d,CP:%d\n", ADPT_ARG(adapter), get_hw_port(adapter), get_clt_port(adapter)); +#endif /*DBG_HW_PORT*/ + +#endif/*CONFIG_CLIENT_PORT_CFG*/ + + return hw_port; +} + void rtw_hal_config_rftype(PADAPTER padapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); @@ -230,13 +395,13 @@ void rtw_hal_config_rftype(PADAPTER padapter) * */ void hal_com_config_channel_plan( - IN PADAPTER padapter, - IN char *hw_alpha2, - IN u8 hw_chplan, - IN char *sw_alpha2, - IN u8 sw_chplan, - IN u8 def_chplan, - IN BOOLEAN AutoLoadFail + PADAPTER padapter, + char *hw_alpha2, + u8 hw_chplan, + char *sw_alpha2, + u8 sw_chplan, + u8 def_chplan, + BOOLEAN AutoLoadFail ) { struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); @@ -320,8 +485,8 @@ done: BOOLEAN HAL_IsLegalChannel( - IN PADAPTER Adapter, - IN u32 Channel + PADAPTER Adapter, + u32 Channel ) { BOOLEAN bLegalChannel = _TRUE; @@ -878,9 +1043,9 @@ u8 hw_rate_to_m_rate(u8 rate) } void HalSetBrateCfg( - IN PADAPTER Adapter, - IN u8 *mBratesOS, - OUT u16 *pBrateCfg) + PADAPTER Adapter, + u8 *mBratesOS, + u16 *pBrateCfg) { u8 i, is_brate, brate; @@ -931,9 +1096,9 @@ void HalSetBrateCfg( } } -static VOID +static void _OneOutPipeMapping( - IN PADAPTER pAdapter + PADAPTER pAdapter ) { struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter); @@ -949,10 +1114,10 @@ _OneOutPipeMapping( pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */ } -static VOID +static void _TwoOutPipeMapping( - IN PADAPTER pAdapter, - IN BOOLEAN bWIFICfg + PADAPTER pAdapter, + BOOLEAN bWIFICfg ) { struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter); @@ -994,9 +1159,9 @@ _TwoOutPipeMapping( } -static VOID _ThreeOutPipeMapping( - IN PADAPTER pAdapter, - IN BOOLEAN bWIFICfg +static void _ThreeOutPipeMapping( + PADAPTER pAdapter, + BOOLEAN bWIFICfg ) { struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter); @@ -1036,9 +1201,10 @@ static VOID _ThreeOutPipeMapping( } } -static VOID _FourOutPipeMapping( - IN PADAPTER pAdapter, - IN BOOLEAN bWIFICfg +#if 0 +static void _FourOutPipeMapping( + PADAPTER pAdapter, + BOOLEAN bWIFICfg ) { struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter); @@ -1078,10 +1244,11 @@ static VOID _FourOutPipeMapping( } } +#endif BOOLEAN Hal_MappingOutPipe( - IN PADAPTER pAdapter, - IN u8 NumOutPipe + PADAPTER pAdapter, + u8 NumOutPipe ) { struct registry_priv *pregistrypriv = &pAdapter->registrypriv; @@ -1096,6 +1263,8 @@ Hal_MappingOutPipe( break; case 3: case 4: + case 5: + case 6: _ThreeOutPipeMapping(pAdapter, bWIFICfg); break; case 1: @@ -1186,10 +1355,10 @@ void rtw_restore_hw_port_cfg(_adapter *adapter) } #endif -void rtw_restore_mac_addr(_adapter *adapter) +void rtw_mi_set_mac_addr(_adapter *adapter) { #ifdef CONFIG_MI_WITH_MBSSID_CAM - rtw_mbid_cam_restore(adapter); + rtw_mi_set_mbid_cam(adapter); #else int i; _adapter *iface; @@ -1214,6 +1383,11 @@ void rtw_init_hal_com_default_value(PADAPTER Adapter) pHalData->antenna_test = _FALSE; pHalData->RegIQKFWOffload = regsty->iqk_fw_offload; pHalData->ch_switch_offload = regsty->ch_switch_offload; + pHalData->multi_ch_switch_mode = 0; +#ifdef RTW_REDUCE_SCAN_SWITCH_CH_TIME + if (pHalData->ch_switch_offload == 0) + pHalData->ch_switch_offload = 1; +#endif } #ifdef CONFIG_FW_C2H_REG @@ -1416,6 +1590,7 @@ int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len) u8 wl_func; u8 hw_stype; u8 bw; + u8 ss_num = 4; u8 ant_num; u8 protocol; u8 nic; @@ -1462,21 +1637,41 @@ int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len) RTW_PRINT("nic:0x%x\n", nic); } - /* - * NOTICE: - * for now, the following is common info/format - * if there is any hal difference need to export - * some IC dependent code will need to be implement - */ +#if defined(CONFIG_RTL8822C) + if (IS_8822C_SERIES(hal_data->version_id)) { + #define GET_C2H_MAC_HIDDEN_RPT_SS_NUM(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 3, 2) + ss_num = GET_C2H_MAC_HIDDEN_RPT_SS_NUM(data); + + if (DBG_C2H_MAC_HIDDEN_RPT_HANDLE) + RTW_PRINT("ss_num:0x%x\n", ss_num); + } +#endif + +#if defined(CONFIG_RTL8822C) + if (IS_8822C_SERIES(hal_data->version_id)) { + if (hw_stype == 0xE) + hal_data->rf_type = RF_1T2R; /* txpath:A, rxpath:AB */ + } +#endif hal_data->PackageType = package_type; + hal_spec->hci_type = hci_type; hal_spec->wl_func &= mac_hidden_wl_func_to_hal_wl_func(wl_func); hal_spec->bw_cap &= mac_hidden_max_bw_to_hal_bw_cap(bw); - hal_spec->tx_nss_num = rtw_min(hal_spec->tx_nss_num, ant_num); - hal_spec->rx_nss_num = rtw_min(hal_spec->rx_nss_num, ant_num); hal_spec->proto_cap &= mac_hidden_proto_to_hal_proto_cap(protocol); - hal_spec->hci_type = hci_type; - /* TODO: tr_switch */ + /* + * RF TX path num >= max_tx_cnt >= tx_nss_num + * ex: RF TX path num(4) >= max_tx_cnt(2) >= tx_nss_num(1) + * Select at most 2 out of 4 TX RF path to do 1SS 2TX + */ + hal_spec->max_tx_cnt = rtw_min(hal_spec->max_tx_cnt, rf_type_to_rf_tx_cnt(hal_data->rf_type)); + hal_spec->max_tx_cnt = rtw_min(hal_spec->max_tx_cnt, ant_num); + hal_spec->tx_nss_num = rtw_min(hal_spec->tx_nss_num, hal_spec->max_tx_cnt); + hal_spec->tx_nss_num = rtw_min(hal_spec->tx_nss_num, ss_num); + + hal_spec->rx_nss_num = rtw_min(hal_spec->rx_nss_num, rf_type_to_rf_rx_cnt(hal_data->rf_type)); + hal_spec->rx_nss_num = rtw_min(hal_spec->rx_nss_num, ant_num); + hal_spec->rx_nss_num = rtw_min(hal_spec->rx_nss_num, ss_num); ret = _SUCCESS; @@ -1502,8 +1697,8 @@ int c2h_mac_hidden_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len) RTW_PRINT("%s: 0x%02X\n", __func__, *(data + i)); } - #ifdef CONFIG_RTL8188F - if (IS_8188F(hal_data->version_id)) { + #if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) + if (IS_8188F(hal_data->version_id) || IS_8188GTV(hal_data->version_id)) { #define GET_C2H_MAC_HIDDEN_RPT_IRV(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 0, 0, 4) u8 irv = GET_C2H_MAC_HIDDEN_RPT_IRV(data); @@ -1578,8 +1773,6 @@ mac_hidden_rpt_hdl: if (ret_fwdl == _SUCCESS && id == C2H_MAC_HIDDEN_RPT) ret = _SUCCESS; -exit: - #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) if ((hci_type == RTW_USB || hci_type == RTW_PCIE) && !rtw_is_hw_init_completed(adapter)) @@ -1996,6 +2189,10 @@ void rtw_hal_update_sta_mimo_type(_adapter *adapter, struct sta_info *psta) else rtw_warn_on(1); +#ifdef CONFIG_CTRL_TXSS_BY_TP + rtw_ctrl_txss_update_mimo_type(adapter, psta); +#endif + RTW_INFO("STA - MAC_ID:%d, Tx - %d SS, Rx - %d SS\n", psta->cmn.mac_id, tx_nss, rx_nss); } @@ -2042,7 +2239,7 @@ void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta) { struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); u8 i, rf_type, tx_nss; - u64 tx_ra_bitmap = 0; + u64 tx_ra_bitmap = 0, tmp64=0; if (psta == NULL) return; @@ -2054,6 +2251,7 @@ void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta) } #ifdef CONFIG_80211N_HT +if (padapter->registrypriv.ht_enable && is_supported_ht(padapter->registrypriv.wireless_mode)) { rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num); #ifdef CONFIG_80211AC_VHT @@ -2074,8 +2272,10 @@ void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta) } } - tx_ra_bitmap |= (rtw_ht_mcs_set_to_bitmap(psta->htpriv.ht_cap.supp_mcs_set, tx_nss) << 12); + tmp64 = rtw_ht_mcs_set_to_bitmap(psta->htpriv.ht_cap.supp_mcs_set, tx_nss); + tx_ra_bitmap |= (tmp64 << 12); } +} #endif /* CONFIG_80211N_HT */ psta->cmn.ra_info.ramask = tx_ra_bitmap; psta->init_rate = get_highest_rate_idx(tx_ra_bitmap) & 0x3f; @@ -2088,6 +2288,130 @@ void rtw_hal_update_sta_ra_info(PADAPTER padapter, struct sta_info *psta) rtw_hal_update_sta_rate_mask(padapter, psta); } +static u32 hw_bcn_ctrl_addr(_adapter *adapter, u8 hw_port) +{ + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); + + if (hw_port >= hal_spec->port_num) { + RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port); + rtw_warn_on(1); + return 0; + } + + switch (hw_port) { + case HW_PORT0: + return REG_BCN_CTRL; + case HW_PORT1: + return REG_BCN_CTRL_1; + } + + return 0; +} + +static void rtw_hal_get_msr(_adapter *adapter, u8 *net_type) +{ +#ifdef RTW_HALMAC + rtw_halmac_get_network_type(adapter_to_dvobj(adapter), + adapter->hw_port, net_type); +#else /* !RTW_HALMAC */ + switch (adapter->hw_port) { + case HW_PORT0: + /*REG_CR - BIT[17:16]-Network Type for port 1*/ + *net_type = rtw_read8(adapter, MSR) & 0x03; + break; + case HW_PORT1: + /*REG_CR - BIT[19:18]-Network Type for port 1*/ + *net_type = (rtw_read8(adapter, MSR) & 0x0C) >> 2; + break; +#if defined(CONFIG_RTL8814A) + case HW_PORT2: + /*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/ + *net_type = rtw_read8(adapter, MSR1) & 0x03; + break; + case HW_PORT3: + /*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/ + *net_type = (rtw_read8(adapter, MSR1) & 0x0C) >> 2; + break; + case HW_PORT4: + /*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/ + *net_type = (rtw_read8(adapter, MSR1) & 0x30) >> 4; + break; +#endif /*#if defined(CONFIG_RTL8814A)*/ + default: + RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n", + ADPT_ARG(adapter), adapter->hw_port); + rtw_warn_on(1); + break; + } +#endif /* !RTW_HALMAC */ +} + +#if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM) /*For 2 hw ports - 88E/92E/8812/8821/8723B*/ +static u8 rtw_hal_net_type_decision(_adapter *adapter, u8 net_type) +{ + if ((adapter->hw_port == HW_PORT0) && (rtw_get_mbid_cam_entry_num(adapter))) { + if (net_type != _HW_STATE_NOLINK_) + return _HW_STATE_AP_; + } + return net_type; +} +#endif +static void rtw_hal_set_msr(_adapter *adapter, u8 net_type) +{ +#ifdef RTW_HALMAC + #if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM) + net_type = rtw_hal_net_type_decision(adapter, net_type); + #endif + rtw_halmac_set_network_type(adapter_to_dvobj(adapter), + adapter->hw_port, net_type); +#else /* !RTW_HALMAC */ + u8 val8 = 0; + + switch (adapter->hw_port) { + case HW_PORT0: + #if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM) + net_type = rtw_hal_net_type_decision(adapter, net_type); + #endif + /*REG_CR - BIT[17:16]-Network Type for port 0*/ + val8 = rtw_read8(adapter, MSR) & 0x0C; + val8 |= net_type; + rtw_write8(adapter, MSR, val8); + break; + case HW_PORT1: + /*REG_CR - BIT[19:18]-Network Type for port 1*/ + val8 = rtw_read8(adapter, MSR) & 0x03; + val8 |= net_type << 2; + rtw_write8(adapter, MSR, val8); + break; +#if defined(CONFIG_RTL8814A) + case HW_PORT2: + /*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/ + val8 = rtw_read8(adapter, MSR1) & 0xFC; + val8 |= net_type; + rtw_write8(adapter, MSR1, val8); + break; + case HW_PORT3: + /*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/ + val8 = rtw_read8(adapter, MSR1) & 0xF3; + val8 |= net_type << 2; + rtw_write8(adapter, MSR1, val8); + break; + case HW_PORT4: + /*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/ + val8 = rtw_read8(adapter, MSR1) & 0xCF; + val8 |= net_type << 4; + rtw_write8(adapter, MSR1, val8); + break; +#endif /* CONFIG_RTL8814A */ + default: + RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n", + ADPT_ARG(adapter), adapter->hw_port); + rtw_warn_on(1); + break; + } +#endif /* !RTW_HALMAC */ +} + #ifndef SEC_CAM_ACCESS_TIMEOUT_MS #define SEC_CAM_ACCESS_TIMEOUT_MS 200 #endif @@ -2231,8 +2555,8 @@ void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key) { unsigned int i; int j; - u8 addr; - u32 wdata; + u8 addr, addr1 = 0; + u32 wdata, wdata1 = 0; /* TODO: consider other key length accordingly */ #if 0 @@ -2267,8 +2591,20 @@ void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key) addr = (id << 3) + j; +#if defined(CONFIG_RTL8192F) + if(j == 1) { + wdata1 = wdata; + addr1 = addr; + continue; + } +#endif + rtw_sec_write_cam(adapter, addr, wdata); } + +#if defined(CONFIG_RTL8192F) + rtw_sec_write_cam(adapter, addr1, wdata1); +#endif } void rtw_sec_clr_cam_ent(_adapter *adapter, u8 id) @@ -2292,6 +2628,9 @@ bool rtw_sec_read_cam_is_gk(_adapter *adapter, u8 id) #ifdef CONFIG_MBSSID_CAM void rtw_mbid_cam_init(struct dvobj_priv *dvobj) { + struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; + + _rtw_spinlock_init(&mbid_cam_ctl->lock); mbid_cam_ctl->bitmap = 0; ATOMIC_SET(&mbid_cam_ctl->mbid_entry_num, 0); _rtw_memset(&dvobj->mbid_cam_cache, 0, sizeof(dvobj->mbid_cam_cache)); @@ -2431,14 +2770,14 @@ u8 rtw_mbid_camid_alloc(_adapter *adapter, u8 *mac_addr) struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; u8 entry_num = ATOMIC_READ(&mbid_cam_ctl->mbid_entry_num); + if (INVALID_CAM_ID != rtw_mbid_cam_search_by_macaddr(adapter, mac_addr)) + goto exit; + if (entry_num >= TOTAL_MBID_CAM_NUM) { RTW_INFO(FUNC_ADPT_FMT" failed !! MBSSID number :%d over TOTAL_CAM_ENTRY(8)\n", FUNC_ADPT_ARG(adapter), entry_num); rtw_warn_on(1); } - if (INVALID_CAM_ID != rtw_mbid_cam_search_by_macaddr(adapter, mac_addr)) - goto exit; - _enter_critical_bh(&mbid_cam_ctl->lock, &irqL); for (i = 0; i < TOTAL_MBID_CAM_NUM; i++) { if (!(mbid_cam_ctl->bitmap & BIT(i))) { @@ -2554,23 +2893,23 @@ int rtw_mbid_cam_cache_dump(void *sel, const char *fun_name, _adapter *adapter) if (mbid_cam_ctl->bitmap & BIT(i)) { iface_id = dvobj->mbid_cam_cache[i].iface_id; - RTW_PRINT_SEL(sel, "IF_ID:%d\t", iface_id); - RTW_PRINT_SEL(sel, "MAC Addr:"MAC_FMT"\t", MAC_ARG(dvobj->mbid_cam_cache[i].mac_addr)); + _RTW_PRINT_SEL(sel, "IF_ID:%d\t", iface_id); + _RTW_PRINT_SEL(sel, "MAC Addr:"MAC_FMT"\t", MAC_ARG(dvobj->mbid_cam_cache[i].mac_addr)); iface = dvobj->padapters[iface_id]; if (iface) { if (MLME_IS_STA(iface)) - RTW_PRINT_SEL(sel, "ROLE:%s\n", "STA"); + _RTW_PRINT_SEL(sel, "ROLE:%s\n", "STA"); else if (MLME_IS_AP(iface)) - RTW_PRINT_SEL(sel, "ROLE:%s\n", "AP"); + _RTW_PRINT_SEL(sel, "ROLE:%s\n", "AP"); else if (MLME_IS_MESH(iface)) - RTW_PRINT_SEL(sel, "ROLE:%s\n", "MESH"); + _RTW_PRINT_SEL(sel, "ROLE:%s\n", "MESH"); else - RTW_PRINT_SEL(sel, "ROLE:%s\n", "NONE"); + _RTW_PRINT_SEL(sel, "ROLE:%s\n", "NONE"); } } else - RTW_PRINT_SEL(sel, "N/A\n"); + _RTW_PRINT_SEL(sel, "N/A\n"); } _exit_critical_bh(&mbid_cam_ctl->lock, &irqL); return 0; @@ -2625,7 +2964,7 @@ int rtw_mbid_cam_dump(void *sel, const char *fun_name, _adapter *adapter) RTW_PRINT_SEL(sel, "CAM_ID = %d\t", i); _rtw_memset(mac_addr, 0, ETH_ALEN); read_mbssid_cam(adapter, i, mac_addr); - RTW_PRINT_SEL(sel, "MAC Addr:"MAC_FMT"\n", MAC_ARG(mac_addr)); + _RTW_PRINT_SEL(sel, "MAC Addr:"MAC_FMT"\n", MAC_ARG(mac_addr)); } /*_exit_critical_bh(&mbid_cam_ctl->lock, &irqL);*/ return 0; @@ -2641,21 +2980,25 @@ static void write_mbssid_cam(_adapter *padapter, u8 cam_addr, u8 *mac) rtw_hal_set_hwreg(padapter, HW_VAR_MBSSID_CAM_WRITE, (u8 *)cam_val); } +/* static void clear_mbssid_cam(_adapter *padapter, u8 cam_addr) { rtw_hal_set_hwreg(padapter, HW_VAR_MBSSID_CAM_CLEAR, &cam_addr); } -static void enable_mbssid_cam(_adapter *adapter) +*/ + +void rtw_ap_set_mbid_num(_adapter *adapter, u8 ap_num) +{ + rtw_write8(adapter, REG_MBID_NUM, + ((rtw_read8(adapter, REG_MBID_NUM) & 0xF8) | ((ap_num -1) & 0x07))); + +} +void rtw_mbid_cam_enable(_adapter *adapter) { - u8 max_cam_id = rtw_get_max_mbid_cam_id(adapter); /*enable MBSSID*/ rtw_hal_rcr_add(adapter, RCR_ENMBID); - if (max_cam_id != INVALID_CAM_ID) { - rtw_write8(adapter, REG_MBID_NUM, - ((rtw_read8(adapter, REG_MBID_NUM) & 0xF8) | ((max_cam_id -1) & 0x07))); - } } -void rtw_mbid_cam_restore(_adapter *adapter) +void rtw_mi_set_mbid_cam(_adapter *adapter) { u8 i; struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); @@ -2671,10 +3014,264 @@ void rtw_mbid_cam_restore(_adapter *adapter) RTW_INFO("%s - cam_id:%d => mac:"MAC_FMT"\n", __func__, i, MAC_ARG(dvobj->mbid_cam_cache[i].mac_addr)); } } - enable_mbssid_cam(adapter); + rtw_mbid_cam_enable(adapter); } #endif /*CONFIG_MBSSID_CAM*/ +#ifdef CONFIG_FW_HANDLE_TXBCN +#define H2C_BCN_OFFLOAD_LEN 1 + +#define SET_H2CCMD_BCN_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) +#define SET_H2CCMD_BCN_ROOT_TBTT_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) +#define SET_H2CCMD_BCN_VAP1_TBTT_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) +#define SET_H2CCMD_BCN_VAP2_TBTT_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) +#define SET_H2CCMD_BCN_VAP3_TBTT_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) +#define SET_H2CCMD_BCN_VAP4_TBTT_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) + +void rtw_hal_set_fw_ap_bcn_offload_cmd(_adapter *adapter, bool fw_bcn_en, u8 tbtt_rpt_map) +{ + u8 fw_bcn_offload[1] = {0}; + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + + if (fw_bcn_en) + SET_H2CCMD_BCN_OFFLOAD_EN(fw_bcn_offload, 1); + + if (tbtt_rpt_map & BIT(0)) + SET_H2CCMD_BCN_ROOT_TBTT_RPT(fw_bcn_offload, 1); + if (tbtt_rpt_map & BIT(1)) + SET_H2CCMD_BCN_VAP1_TBTT_RPT(fw_bcn_offload, 1); + if (tbtt_rpt_map & BIT(2)) + SET_H2CCMD_BCN_VAP2_TBTT_RPT(fw_bcn_offload, 1); + if (tbtt_rpt_map & BIT(3)) + SET_H2CCMD_BCN_VAP3_TBTT_RPT(fw_bcn_offload, 1); + + dvobj->vap_tbtt_rpt_map = tbtt_rpt_map; + dvobj->fw_bcn_offload = fw_bcn_en; + RTW_INFO("[FW BCN] Offload : %s\n", (dvobj->fw_bcn_offload) ? "EN" : "DIS"); + RTW_INFO("[FW BCN] TBTT RPT map : 0x%02x\n", dvobj->vap_tbtt_rpt_map); + + rtw_hal_fill_h2c_cmd(adapter, H2C_FW_BCN_OFFLOAD, + H2C_BCN_OFFLOAD_LEN, fw_bcn_offload); +} + +void rtw_hal_set_bcn_rsvdpage_loc_cmd(_adapter *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + u8 ret, vap_id; + u32 page_size = 0; + u8 bcn_rsvdpage[H2C_BCN_RSVDPAGE_LEN] = {0}; + + rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&page_size); + #if 1 + for (vap_id = 0; vap_id < CONFIG_LIMITED_AP_NUM; vap_id++) { + if (dvobj->vap_map & BIT(vap_id)) + bcn_rsvdpage[vap_id] = vap_id * (MAX_BEACON_LEN / page_size); + } + #else +#define SET_H2CCMD_BCN_RSVDPAGE_LOC_ROOT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 8, __Value) +#define SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 8, __Value) +#define SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 8, __Value) +#define SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP4(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 8, __Value) + + if (dvobj->vap_map & BIT(0)) + SET_H2CCMD_BCN_RSVDPAGE_LOC_ROOT(bcn_rsvdpage, 0); + if (dvobj->vap_map & BIT(1)) + SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP1(bcn_rsvdpage, + 1 * (MAX_BEACON_LEN / page_size)); + if (dvobj->vap_map & BIT(2)) + SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP2(bcn_rsvdpage, + 2 * (MAX_BEACON_LEN / page_size)); + if (dvobj->vap_map & BIT(3)) + SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP3(bcn_rsvdpage, + 3 * (MAX_BEACON_LEN / page_size)); + if (dvobj->vap_map & BIT(4)) + SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP4(bcn_rsvdpage, + 4 * (MAX_BEACON_LEN / page_size)); + #endif + if (1) { + RTW_INFO("[BCN_LOC] vap_map : 0x%02x\n", dvobj->vap_map); + RTW_INFO("[BCN_LOC] page_size :%d, @bcn_page_num :%d\n" + , page_size, (MAX_BEACON_LEN / page_size)); + RTW_INFO("[BCN_LOC] root ap : 0x%02x\n", *bcn_rsvdpage); + RTW_INFO("[BCN_LOC] vap_1 : 0x%02x\n", *(bcn_rsvdpage + 1)); + RTW_INFO("[BCN_LOC] vap_2 : 0x%02x\n", *(bcn_rsvdpage + 2)); + RTW_INFO("[BCN_LOC] vap_3 : 0x%02x\n", *(bcn_rsvdpage + 3)); + RTW_INFO("[BCN_LOC] vap_4 : 0x%02x\n", *(bcn_rsvdpage + 4)); + } + ret = rtw_hal_fill_h2c_cmd(adapter, H2C_BCN_RSVDPAGE, + H2C_BCN_RSVDPAGE_LEN, bcn_rsvdpage); +} + +void rtw_ap_multi_bcn_cfg(_adapter *adapter) +{ + u8 dft_bcn_space = DEFAULT_BCN_INTERVAL; + u8 sub_bcn_space = (DEFAULT_BCN_INTERVAL / CONFIG_LIMITED_AP_NUM); + + /*enable to rx data frame*/ + rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF); + + /*Disable Port0's beacon function*/ + rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL) & ~BIT_EN_BCN_FUNCTION); + /*Reset Port0's TSF*/ + rtw_write8(adapter, REG_DUAL_TSF_RST, BIT_TSFTR_RST); + + rtw_ap_set_mbid_num(adapter, CONFIG_LIMITED_AP_NUM); + + /*BCN space & BCN sub-space 0x554[15:0] = 0x64,0x5BC[23:16] = 0x21*/ + rtw_halmac_set_bcn_interval(adapter_to_dvobj(adapter), HW_PORT0, dft_bcn_space); + rtw_write8(adapter, REG_MBSSID_BCN_SPACE3 + 2, sub_bcn_space); + + #if 0 /*setting in hw_var_set_opmode_mbid - ResumeTxBeacon*/ + /*BCN hold time 0x540[19:8] = 0x80*/ + rtw_write8(adapter, REG_TBTT_PROHIBIT + 1, TBTT_PROHIBIT_HOLD_TIME & 0xFF); + rtw_write8(adapter, REG_TBTT_PROHIBIT + 2, + (rtw_read8(adapter, REG_TBTT_PROHIBIT + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME >> 8)); + #endif + + /*ATIM window -0x55A = 0x32, reg 0x570 = 0x32, reg 0x5A0 = 0x32 */ + rtw_write8(adapter, REG_ATIMWND, 0x32); + rtw_write8(adapter, REG_ATIMWND1_V1, 0x32); + rtw_write8(adapter, REG_ATIMWND2, 0x32); + rtw_write8(adapter, REG_ATIMWND3, 0x32); + /* + rtw_write8(adapter, REG_ATIMWND4, 0x32); + rtw_write8(adapter, REG_ATIMWND5, 0x32); + rtw_write8(adapter, REG_ATIMWND6, 0x32); + rtw_write8(adapter, REG_ATIMWND7, 0x32);*/ + + /*no limit setting - 0x5A7 = 0xFF - Packet in Hi Queue Tx immediately*/ + rtw_write8(adapter, REG_HIQ_NO_LMT_EN, 0xFF); + + /*Mask all beacon*/ + rtw_write8(adapter, REG_MBSSID_CTRL, 0); + + /*BCN invalid bit setting 0x454[6] = 1*/ + /*rtw_write8(adapter, REG_CCK_CHECK, rtw_read8(adapter, REG_CCK_CHECK) | BIT_EN_BCN_PKT_REL);*/ + + /*Enable Port0's beacon function*/ + rtw_write8(adapter, REG_BCN_CTRL, + rtw_read8(adapter, REG_BCN_CTRL) | BIT_DIS_RX_BSSID_FIT | BIT_P0_EN_TXBCN_RPT | BIT_DIS_TSF_UDT | BIT_EN_BCN_FUNCTION); + + /* Enable HW seq for BCN + * 0x4FC[0]: EN_HWSEQ / 0x4FC[1]: EN_HWSEQEXT */ + #ifdef CONFIG_RTL8822B + if (IS_HARDWARE_TYPE_8822B(adapter)) + rtw_write8(adapter, REG_DUMMY_PAGE4_V1_8822B, 0x01); + #endif + + #ifdef CONFIG_RTL8822C + if (IS_HARDWARE_TYPE_8822C(adapter)) + rtw_write8(adapter, REG_DUMMY_PAGE4_V1_8822C, 0x01); + #endif +} +static void _rtw_mbid_bcn_cfg(_adapter *adapter, bool mbcnq_en, u8 mbcnq_id) +{ + if (mbcnq_id >= CONFIG_LIMITED_AP_NUM) { + RTW_ERR(FUNC_ADPT_FMT"- mbid bcnq_id(%d) invalid\n", FUNC_ADPT_ARG(adapter), mbcnq_id); + rtw_warn_on(1); + } + + if (mbcnq_en) { + rtw_write8(adapter, REG_MBSSID_CTRL, + rtw_read8(adapter, REG_MBSSID_CTRL) | BIT(mbcnq_id)); + RTW_INFO(FUNC_ADPT_FMT"- mbid bcnq_id(%d) enabled\n", FUNC_ADPT_ARG(adapter), mbcnq_id); + } else { + rtw_write8(adapter, REG_MBSSID_CTRL, + rtw_read8(adapter, REG_MBSSID_CTRL) & (~BIT(mbcnq_id))); + RTW_INFO(FUNC_ADPT_FMT"- mbid bcnq_id(%d) disabled\n", FUNC_ADPT_ARG(adapter), mbcnq_id); + } +} +/*#define CONFIG_FW_TBTT_RPT*/ +void rtw_ap_mbid_bcn_en(_adapter *adapter, u8 ap_id) +{ + RTW_INFO(FUNC_ADPT_FMT"- ap_id(%d)\n", FUNC_ADPT_ARG(adapter), ap_id); + + #ifdef CONFIG_FW_TBTT_RPT + if (rtw_ap_get_nums(adapter) >= 1) { + u8 tbtt_rpt_map = adapter_to_dvobj(adapter)->vap_tbtt_rpt_map; + + rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, _TRUE, + tbtt_rpt_map | BIT(ap_id));/*H2C-0xBA*/ + } + #else + if (rtw_ap_get_nums(adapter) == 1) + rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, _TRUE, 0);/*H2C-0xBA*/ + #endif + + rtw_hal_set_bcn_rsvdpage_loc_cmd(adapter);/*H2C-0x09*/ + + _rtw_mbid_bcn_cfg(adapter, _TRUE, ap_id); +} +void rtw_ap_mbid_bcn_dis(_adapter *adapter, u8 ap_id) +{ + RTW_INFO(FUNC_ADPT_FMT"- ap_id(%d)\n", FUNC_ADPT_ARG(adapter), ap_id); + _rtw_mbid_bcn_cfg(adapter, _FALSE, ap_id); + + if (rtw_ap_get_nums(adapter) == 0) + rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, _FALSE, 0); + #ifdef CONFIG_FW_TBTT_RPT + else if (rtw_ap_get_nums(adapter) >= 1) { + u8 tbtt_rpt_map = adapter_to_dvobj(adapter)->vap_tbtt_rpt_map; + + rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, _TRUE, + tbtt_rpt_map & ~BIT(ap_id));/*H2C-0xBA*/ + } + #endif +} +#endif +#ifdef CONFIG_SWTIMER_BASED_TXBCN +void rtw_ap_multi_bcn_cfg(_adapter *adapter) +{ + #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) + rtw_write8(adapter, REG_BCN_CTRL, DIS_TSF_UDT); + #else + rtw_write8(adapter, REG_BCN_CTRL, DIS_TSF_UDT | DIS_BCNQ_SUB); + #endif + /*enable to rx data frame*/ + rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF); + + /*Beacon Control related register for first time*/ + rtw_write8(adapter, REG_BCNDMATIM, 0x02); /* 2ms */ + + /*rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);*/ + rtw_write8(adapter, REG_ATIMWND, 0x0c); /* 12ms */ + + #ifndef CONFIG_HW_P0_TSF_SYNC + rtw_write16(adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */ + #endif + + /*reset TSF*/ + rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(0)); + + /*enable BCN0 Function for if1*/ + /*don't enable update TSF0 for if1 (due to TSF update when beacon,probe rsp are received)*/ + #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) + rtw_write8(adapter, REG_BCN_CTRL, BIT_DIS_RX_BSSID_FIT | BIT_P0_EN_TXBCN_RPT | BIT_DIS_TSF_UDT |BIT_EN_BCN_FUNCTION); + #else + rtw_write8(adapter, REG_BCN_CTRL, (DIS_TSF_UDT | EN_BCN_FUNCTION | EN_TXBCN_RPT | DIS_BCNQ_SUB)); + #endif + #ifdef CONFIG_BCN_XMIT_PROTECT + rtw_write8(adapter, REG_CCK_CHECK, rtw_read8(adapter, REG_CCK_CHECK) | BIT_EN_BCN_PKT_REL); + #endif + + if (IS_HARDWARE_TYPE_8821(adapter) || IS_HARDWARE_TYPE_8192E(adapter))/* select BCN on port 0 for DualBeacon*/ + rtw_write8(adapter, REG_CCK_CHECK, rtw_read8(adapter, REG_CCK_CHECK) & (~BIT_BCN_PORT_SEL)); + + /* Enable HW seq for BCN + * 0x4FC[0]: EN_HWSEQ / 0x4FC[1]: EN_HWSEQEXT */ + #ifdef CONFIG_RTL8822B + if (IS_HARDWARE_TYPE_8822B(adapter)) + rtw_write8(adapter, REG_DUMMY_PAGE4_V1_8822B, 0x01); + #endif + + #ifdef CONFIG_RTL8822C + if (IS_HARDWARE_TYPE_8822C(adapter)) + rtw_write8(adapter, REG_DUMMY_PAGE4_V1_8822C, 0x01); + #endif +} +#endif + #ifdef CONFIG_MI_WITH_MBSSID_CAM void rtw_hal_set_macaddr_mbid(_adapter *adapter, u8 *mac_addr) { @@ -2713,7 +3310,8 @@ void rtw_hal_set_macaddr_mbid(_adapter *adapter, u8 *mac_addr) if (entry_id != INVALID_CAM_ID) { write_mbssid_cam(adapter, entry_id, mac_addr); - enable_mbssid_cam(adapter); + RTW_INFO("%s "ADPT_FMT"- mbid(%d) mac_addr ="MAC_FMT"\n", __func__, + ADPT_ARG(adapter), entry_id, MAC_ARG(mac_addr)); } } #endif @@ -2747,23 +3345,24 @@ u16 rtw_hal_bcn_interval_adjust(_adapter *adapter, u16 bcn_interval) } #endif/*CONFIG_SWTIMER_BASED_TXBCN*/ -#endif/*#ifdef CONFIG_MI_WITH_MBSSID_CAM*/ - +#else static void rtw_hal_set_macaddr_port(_adapter *adapter, u8 *val) { u8 idx = 0; u32 reg_macid = 0; + enum _hw_port hwport; if (val == NULL) return; + hwport = get_hw_port(adapter); RTW_INFO("%s "ADPT_FMT"- hw port(%d) mac_addr ="MAC_FMT"\n", __func__, - ADPT_ARG(adapter), adapter->hw_port, MAC_ARG(val)); + ADPT_ARG(adapter), hwport, MAC_ARG(val)); #ifdef RTW_HALMAC - rtw_halmac_set_mac_address(adapter_to_dvobj(adapter), adapter->hw_port, val); + rtw_halmac_set_mac_address(adapter_to_dvobj(adapter), hwport, val); #else /* !RTW_HALMAC */ - switch (adapter->hw_port) { + switch (hwport) { case HW_PORT0: default: reg_macid = REG_MACID; @@ -2784,10 +3383,11 @@ static void rtw_hal_set_macaddr_port(_adapter *adapter, u8 *val) #endif/*defined(CONFIG_RTL8814A)*/ } - for (idx = 0; idx < 6; idx++) + for (idx = 0; idx < ETH_ALEN; idx++) rtw_write8(GET_PRIMARY_ADAPTER(adapter), (reg_macid + idx), val[idx]); #endif /* !RTW_HALMAC */ } +#endif/*#ifdef CONFIG_MI_WITH_MBSSID_CAM*/ static void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr) { @@ -2822,7 +3422,7 @@ static void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr) #endif /*defined(CONFIG_RTL8814A)*/ } - for (idx = 0; idx < 6; idx++) + for (idx = 0; idx < ETH_ALEN; idx++) mac_addr[idx] = rtw_read8(GET_PRIMARY_ADAPTER(adapter), (reg_macid + idx)); #endif /* !RTW_HALMAC */ @@ -2832,13 +3432,15 @@ static void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr) static void rtw_hal_set_bssid(_adapter *adapter, u8 *val) { + u8 hw_port = rtw_hal_get_port(adapter); + #ifdef RTW_HALMAC - rtw_halmac_set_bssid(adapter_to_dvobj(adapter), adapter->hw_port, val); + rtw_halmac_set_bssid(adapter_to_dvobj(adapter), hw_port, val); #else /* !RTW_HALMAC */ u8 idx = 0; u32 reg_bssid = 0; - switch (adapter->hw_port) { + switch (hw_port) { case HW_PORT0: default: reg_bssid = REG_BSSID; @@ -2846,7 +3448,7 @@ static void rtw_hal_set_bssid(_adapter *adapter, u8 *val) case HW_PORT1: reg_bssid = REG_BSSID1; break; -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) +#if defined(CONFIG_RTL8814A) case HW_PORT2: reg_bssid = REG_BSSID2; break; @@ -2856,14 +3458,211 @@ static void rtw_hal_set_bssid(_adapter *adapter, u8 *val) case HW_PORT4: reg_bssid = REG_BSSID4; break; -#endif/*defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)*/ +#endif/*defined(CONFIG_RTL8814A)*/ } - for (idx = 0 ; idx < 6; idx++) + for (idx = 0 ; idx < ETH_ALEN; idx++) rtw_write8(adapter, (reg_bssid + idx), val[idx]); #endif /* !RTW_HALMAC */ - RTW_INFO("%s "ADPT_FMT"- hw port -%d BSSID: "MAC_FMT"\n", __func__, ADPT_ARG(adapter), adapter->hw_port, MAC_ARG(val)); + RTW_INFO("%s "ADPT_FMT"- hw port -%d BSSID: "MAC_FMT"\n", + __func__, ADPT_ARG(adapter), hw_port, MAC_ARG(val)); +} + +static void rtw_hal_set_tsf_update(_adapter *adapter, u8 en) +{ + u32 addr = 0; + u8 val8; + + rtw_hal_get_hwreg(adapter, HW_VAR_BCN_CTRL_ADDR, (u8 *)&addr); + if (addr) { + val8 = rtw_read8(adapter, addr); + if (en && (val8 & DIS_TSF_UDT)) { + rtw_write8(adapter, addr, val8 & ~DIS_TSF_UDT); + #ifdef DBG_TSF_UPDATE + RTW_INFO("port%u("ADPT_FMT") enable TSF update\n", adapter->hw_port, ADPT_ARG(adapter)); + #endif + } + if (!en && !(val8 & DIS_TSF_UDT)) { + rtw_write8(adapter, addr, val8 | DIS_TSF_UDT); + #ifdef DBG_TSF_UPDATE + RTW_INFO("port%u("ADPT_FMT") disable TSF update\n", adapter->hw_port, ADPT_ARG(adapter)); + #endif + } + } else { + RTW_WARN("unknown port%d("ADPT_FMT") %s TSF update\n" + , adapter->hw_port, ADPT_ARG(adapter), en ? "enable" : "disable"); + rtw_warn_on(1); + } +} + +static void rtw_hal_set_hw_update_tsf(PADAPTER padapter) +{ + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + +#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) || defined(CONFIG_MI_WITH_MBSSID_CAM) + RTW_INFO("[Warn] %s "ADPT_FMT" enter func\n", __func__, ADPT_ARG(padapter)); + rtw_warn_on(1); + return; +#endif + + if (!pmlmeext->en_hw_update_tsf) + return; + + /* check RCR */ + if (!rtw_hal_rcr_check(padapter, RCR_CBSSID_BCN)) + return; + + if (pmlmeext->tsf_update_required) { + pmlmeext->tsf_update_pause_stime = 0; + rtw_hal_set_tsf_update(padapter, 1); + } + + pmlmeext->en_hw_update_tsf = 0; +} + +void rtw_iface_enable_tsf_update(_adapter *adapter) +{ + adapter->mlmeextpriv.tsf_update_pause_stime = 0; + adapter->mlmeextpriv.tsf_update_required = 1; +#ifdef CONFIG_MI_WITH_MBSSID_CAM + +#else + rtw_hal_set_tsf_update(adapter, 1); +#endif +} + +void rtw_iface_disable_tsf_update(_adapter *adapter) +{ + adapter->mlmeextpriv.tsf_update_required = 0; + adapter->mlmeextpriv.tsf_update_pause_stime = 0; + adapter->mlmeextpriv.en_hw_update_tsf = 0; +#ifdef CONFIG_MI_WITH_MBSSID_CAM + +#else + rtw_hal_set_tsf_update(adapter, 0); +#endif +} + +static void rtw_hal_tsf_update_pause(_adapter *adapter) +{ +#ifdef CONFIG_MI_WITH_MBSSID_CAM + +#else + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + _adapter *iface; + int i; + u8 val8; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (!iface) + continue; + + rtw_hal_set_tsf_update(iface, 0); + if (iface->mlmeextpriv.tsf_update_required) { + iface->mlmeextpriv.tsf_update_pause_stime = rtw_get_current_time(); + if (!iface->mlmeextpriv.tsf_update_pause_stime) + iface->mlmeextpriv.tsf_update_pause_stime++; + } + iface->mlmeextpriv.en_hw_update_tsf = 0; + } +#endif +} + +static void rtw_hal_tsf_update_restore(_adapter *adapter) +{ +#ifdef CONFIG_MI_WITH_MBSSID_CAM + +#else + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + _adapter *iface; + int i; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (!iface) + continue; + + if (iface->mlmeextpriv.tsf_update_required) { + /* enable HW TSF update when recive beacon*/ + iface->mlmeextpriv.en_hw_update_tsf = 1; + #ifdef DBG_TSF_UPDATE + RTW_INFO("port%d("ADPT_FMT") enabling TSF update...\n" + , iface->hw_port, ADPT_ARG(iface)); + #endif + } + } +#endif +} + +void rtw_hal_periodic_tsf_update_chk(_adapter *adapter) +{ +#ifdef CONFIG_MI_WITH_MBSSID_CAM + +#else + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + _adapter *iface; + struct mlme_ext_priv *mlmeext; + int i; + u32 restore_ms = 0; + + if (dvobj->periodic_tsf_update_etime) { + if (rtw_time_after(rtw_get_current_time(), dvobj->periodic_tsf_update_etime)) { + /* end for restore status */ + dvobj->periodic_tsf_update_etime = 0; + rtw_hal_rcr_set_chk_bssid(adapter, MLME_ACTION_NONE); + } + return; + } + + if (dvobj->rf_ctl.offch_state != OFFCHS_NONE) + return; + + /* + * all required ifaces can switch to restore status together + * loop all pause iface to get largest restore time required + */ + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (!iface) + continue; + + mlmeext = &iface->mlmeextpriv; + + if (mlmeext->tsf_update_required + && mlmeext->tsf_update_pause_stime + && rtw_get_passing_time_ms(mlmeext->tsf_update_pause_stime) + > mlmeext->mlmext_info.bcn_interval * mlmeext->tsf_update_pause_factor + ) { + if (restore_ms < mlmeext->mlmext_info.bcn_interval * mlmeext->tsf_update_restore_factor) + restore_ms = mlmeext->mlmext_info.bcn_interval * mlmeext->tsf_update_restore_factor; + } + } + + if (!restore_ms) + return; + + dvobj->periodic_tsf_update_etime = rtw_get_current_time() + rtw_ms_to_systime(restore_ms); + if (!dvobj->periodic_tsf_update_etime) + dvobj->periodic_tsf_update_etime++; + + rtw_hal_rcr_set_chk_bssid(adapter, MLME_ACTION_NONE); + + /* set timer to end restore status */ + _set_timer(&dvobj->periodic_tsf_update_end_timer, restore_ms); +#endif +} + +void rtw_hal_periodic_tsf_update_end_timer_hdl(void *ctx) +{ + struct dvobj_priv *dvobj = (struct dvobj_priv *)ctx; + + if (dev_is_surprise_removed(dvobj) || dev_is_drv_stopped(dvobj)) + return; + + rtw_periodic_tsf_update_end_cmd(dvobj_get_primary_adapter(dvobj)); } static inline u8 hw_var_rcr_config(_adapter *adapter, u32 rcr) @@ -2937,13 +3736,14 @@ inline u8 rtw_hal_rcr_clear(_adapter *adapter, u32 clear) void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action) { HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); u32 rcr, rcr_new; struct mi_state mstate, mstate_s; rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr); rcr_new = rcr; -#ifdef CONFIG_MI_WITH_MBSSID_CAM +#if defined(CONFIG_MI_WITH_MBSSID_CAM) && !defined(CONFIG_CLIENT_PORT_CFG) rcr_new &= ~(RCR_CBSSID_BCN | RCR_CBSSID_DATA); #else rtw_mi_status_no_self(adapter, &mstate); @@ -2958,6 +3758,18 @@ void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action) case MLME_SCAN_DONE: mstate_s.scan_enter_num = 0; break; + case MLME_STA_CONNECTING: + mstate_s.lg_sta_num = 1; + mstate_s.ld_sta_num = 0; + break; + case MLME_STA_CONNECTED: + mstate_s.lg_sta_num = 0; + mstate_s.ld_sta_num = 1; + break; + case MLME_STA_DISCONNECTED: + mstate_s.lg_sta_num = 0; + mstate_s.ld_sta_num = 0; + break; #ifdef CONFIG_TDLS case MLME_TDLS_LINKED: mstate_s.ld_tdls_num = 1; @@ -2985,7 +3797,6 @@ void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action) break; #endif case MLME_ACTION_NONE: - case MLME_STA_CONNECTING: case MLME_ADHOC_STARTED: /* caller without effect of decision */ break; @@ -3005,18 +3816,38 @@ void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action) else rcr_new |= RCR_CBSSID_DATA; - if ((MSTATE_AP_NUM(&mstate) && adapter->registrypriv.wifi_spec) /* for 11n Logo 4.2.31/4.2.32 */ + if (MSTATE_SCAN_ENTER_NUM(&mstate) || hal_data->in_cta_test) + rcr_new &= ~RCR_CBSSID_BCN; + else if (MSTATE_STA_LG_NUM(&mstate) + || adapter_to_dvobj(adapter)->periodic_tsf_update_etime + ) + rcr_new |= RCR_CBSSID_BCN; + else if ((MSTATE_AP_NUM(&mstate) && adapter->registrypriv.wifi_spec) /* for 11n Logo 4.2.31/4.2.32 */ || MSTATE_MESH_NUM(&mstate) - || MSTATE_SCAN_ENTER_NUM(&mstate) - || hal_data->in_cta_test ) rcr_new &= ~RCR_CBSSID_BCN; else rcr_new |= RCR_CBSSID_BCN; + + #ifdef CONFIG_CLIENT_PORT_CFG + if (get_clt_num(adapter) > MAX_CLIENT_PORT_NUM) + rcr_new &= ~RCR_CBSSID_BCN; + #endif #endif /* CONFIG_MI_WITH_MBSSID_CAM */ - if (rcr != rcr_new) - rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr_new); + if (rcr == rcr_new) + return; + + if (!hal_spec->rx_tsf_filter + && (rcr & RCR_CBSSID_BCN) && !(rcr_new & RCR_CBSSID_BCN)) + rtw_hal_tsf_update_pause(adapter); + + rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr_new); + + if (!hal_spec->rx_tsf_filter + && !(rcr & RCR_CBSSID_BCN) && (rcr_new & RCR_CBSSID_BCN) + && self_action != MLME_STA_CONNECTING) + rtw_hal_tsf_update_restore(adapter); } static void hw_var_set_rcr_am(_adapter *adapter, u8 enable) @@ -3029,120 +3860,250 @@ static void hw_var_set_rcr_am(_adapter *adapter, u8 enable) rtw_hal_rcr_clear(adapter, rcr); } -static void rtw_hal_get_msr(_adapter *adapter, u8 *net_type) +static void hw_var_set_bcn_interval(_adapter *adapter, u16 interval) { -#ifdef RTW_HALMAC - rtw_halmac_get_network_type(adapter_to_dvobj(adapter), - adapter->hw_port, net_type); -#else /* !RTW_HALMAC */ - switch (adapter->hw_port) { - case HW_PORT0: - /*REG_CR - BIT[17:16]-Network Type for port 1*/ - *net_type = rtw_read8(adapter, MSR) & 0x03; - break; - case HW_PORT1: - /*REG_CR - BIT[19:18]-Network Type for port 1*/ - *net_type = (rtw_read8(adapter, MSR) & 0x0C) >> 2; - break; -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) - case HW_PORT2: - /*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/ - *net_type = rtw_read8(adapter, MSR1) & 0x03; - break; - case HW_PORT3: - /*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/ - *net_type = (rtw_read8(adapter, MSR1) & 0x0C) >> 2; - break; - case HW_PORT4: - /*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/ - *net_type = (rtw_read8(adapter, MSR1) & 0x30) >> 4; - break; -#endif /*#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)*/ - default: - RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n", - ADPT_ARG(adapter), adapter->hw_port); - rtw_warn_on(1); - break; - } -#endif /* !RTW_HALMAC */ -} - -#if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM) /*For 2 hw ports - 88E/92E/8812/8821/8723B*/ -static u8 rtw_hal_net_type_decision(_adapter *adapter, u8 net_type) -{ - if ((adapter->hw_port == HW_PORT0) && (rtw_get_mbid_cam_entry_num(adapter))) { - if (net_type != _HW_STATE_NOLINK_) - return _HW_STATE_AP_; - } - return net_type; -} +#ifdef CONFIG_SWTIMER_BASED_TXBCN + interval = rtw_hal_bcn_interval_adjust(adapter, interval); #endif -static void rtw_hal_set_msr(_adapter *adapter, u8 net_type) -{ -#ifdef RTW_HALMAC - #if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM) - net_type = rtw_hal_net_type_decision(adapter, net_type); - #endif - rtw_halmac_set_network_type(adapter_to_dvobj(adapter), - adapter->hw_port, net_type); -#else /* !RTW_HALMAC */ - u8 val8 = 0; - switch (adapter->hw_port) { - case HW_PORT0: - #if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM) - net_type = rtw_hal_net_type_decision(adapter, net_type); - #endif - /*REG_CR - BIT[17:16]-Network Type for port 0*/ - val8 = rtw_read8(adapter, MSR) & 0x0C; - val8 |= net_type; - rtw_write8(adapter, MSR, val8); - break; - case HW_PORT1: - /*REG_CR - BIT[19:18]-Network Type for port 1*/ - val8 = rtw_read8(adapter, MSR) & 0x03; - val8 |= net_type << 2; - rtw_write8(adapter, MSR, val8); - break; -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) - case HW_PORT2: - /*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/ - val8 = rtw_read8(adapter, MSR1) & 0xFC; - val8 |= net_type; - rtw_write8(adapter, MSR1, val8); - break; - case HW_PORT3: - /*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/ - val8 = rtw_read8(adapter, MSR1) & 0xF3; - val8 |= net_type << 2; - rtw_write8(adapter, MSR1, val8); - break; - case HW_PORT4: - /*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/ - val8 = rtw_read8(adapter, MSR1) & 0xCF; - val8 |= net_type << 4; - rtw_write8(adapter, MSR1, val8); - break; -#endif /* CONFIG_RTL8814A | CONFIG_RTL8822B */ - default: - RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n", - ADPT_ARG(adapter), adapter->hw_port); - rtw_warn_on(1); - break; +#ifdef RTW_HALMAC + rtw_halmac_set_bcn_interval(adapter_to_dvobj(adapter), adapter->hw_port, interval); +#else + rtw_write16(adapter, REG_MBSSID_BCN_SPACE, interval); +#endif + +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + { + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { + RTW_INFO("%s==> bcn_interval:%d, eraly_int:%d\n", __func__, interval, interval >> 1); + rtw_write8(adapter, REG_DRVERLYINT, interval >> 1); + } } -#endif /* !RTW_HALMAC */ +#endif } -static void hw_var_set_bcn_interval(struct _ADAPTER *a, u16 interval) +#if CONFIG_TX_AC_LIFETIME +const char *const _tx_aclt_conf_str[] = { + "DEFAULT", + "AP_M2U", + "MESH", + "INVALID", +}; + +void dump_tx_aclt_force_val(void *sel, struct dvobj_priv *dvobj) { -#ifdef RTW_HALMAC - rtw_halmac_set_bcn_interval(adapter_to_dvobj(a), a->hw_port, interval); -#else /* !RTW_HALMAC */ - RTW_ERR(FUNC_ADPT_FMT ": Not implemented yet!!\n", FUNC_ADPT_ARG(a)); - rtw_warn_on(1); -#endif /* !RTW_HALMAC */ +#define TX_ACLT_FORCE_MSG_LEN 64 + struct hal_spec_t *hal_spec = GET_HAL_SPEC(dvobj_get_primary_adapter(dvobj)); + struct tx_aclt_conf_t *conf = &dvobj->tx_aclt_force_val; + char buf[TX_ACLT_FORCE_MSG_LEN]; + int cnt = 0; + + RTW_PRINT_SEL(sel, "unit:%uus, maximum:%uus\n" + , hal_spec->tx_aclt_unit_factor * 32 + , 0xFFFF * hal_spec->tx_aclt_unit_factor * 32); + + RTW_PRINT_SEL(sel, "%-5s %-12s %-12s\n", "en", "vo_vi(us)", "be_bk(us)"); + RTW_PRINT_SEL(sel, " 0x%02x %12u %12u\n" + , conf->en + , conf->vo_vi * hal_spec->tx_aclt_unit_factor * 32 + , conf->be_bk * hal_spec->tx_aclt_unit_factor * 32 + ); + + cnt += snprintf(buf + cnt, TX_ACLT_FORCE_MSG_LEN - cnt - 1, "%5s", conf->en == 0xFF ? "AUTO" : "FORCE"); + if (cnt >= TX_ACLT_FORCE_MSG_LEN - 1) + goto exit; + + if (conf->vo_vi) + cnt += snprintf(buf + cnt, TX_ACLT_FORCE_MSG_LEN - cnt - 1, " FORCE:0x%04x", conf->vo_vi); + else + cnt += snprintf(buf + cnt, TX_ACLT_FORCE_MSG_LEN - cnt - 1, " AUTO"); + if (cnt >= TX_ACLT_FORCE_MSG_LEN - 1) + goto exit; + + + if (conf->be_bk) + cnt += snprintf(buf + cnt, TX_ACLT_FORCE_MSG_LEN - cnt - 1, " FORCE:0x%04x", conf->be_bk); + else + cnt += snprintf(buf + cnt, TX_ACLT_FORCE_MSG_LEN - cnt - 1, " AUTO"); + if (cnt >= TX_ACLT_FORCE_MSG_LEN - 1) + goto exit; + + RTW_PRINT_SEL(sel, "%s\n", buf); + +exit: + return; } +void rtw_hal_set_tx_aclt_force_val(_adapter *adapter, struct tx_aclt_conf_t *input, u8 arg_num) +{ + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct tx_aclt_conf_t *conf = &dvobj->tx_aclt_force_val; + + if (arg_num >= 1) { + if (input->en == 0xFF) + conf->en = input->en; + else + conf->en = input->en & 0xF; + } + if (arg_num >= 2) { + conf->vo_vi = input->vo_vi / (hal_spec->tx_aclt_unit_factor * 32); + if (conf->vo_vi > 0xFFFF) + conf->vo_vi = 0xFFFF; + } + if (arg_num >= 3) { + conf->be_bk = input->be_bk / (hal_spec->tx_aclt_unit_factor * 32); + if (conf->be_bk > 0xFFFF) + conf->be_bk = 0xFFFF; + } +} + +void dump_tx_aclt_confs(void *sel, struct dvobj_priv *dvobj) +{ +#define TX_ACLT_CONF_MSG_LEN 32 + struct hal_spec_t *hal_spec = GET_HAL_SPEC(dvobj_get_primary_adapter(dvobj)); + struct tx_aclt_conf_t *conf; + char buf[TX_ACLT_CONF_MSG_LEN]; + int cnt; + int i; + + RTW_PRINT_SEL(sel, "unit:%uus, maximum:%uus\n" + , hal_spec->tx_aclt_unit_factor * 32 + , 0xFFFF * hal_spec->tx_aclt_unit_factor * 32); + + RTW_PRINT_SEL(sel, "%-7s %-1s %-3s %-9s %-9s %-10s %-10s\n" + , "name", "#", "en", "vo_vi(us)", "be_bk(us)", "vo_vi(reg)", "be_bk(reg)"); + + for (i = 0; i < TX_ACLT_CONF_NUM; i++) { + conf = &dvobj->tx_aclt_confs[i]; + cnt = 0; + + if (conf->vo_vi) + cnt += snprintf(buf + cnt, TX_ACLT_CONF_MSG_LEN - cnt - 1, " 0x%04x", conf->vo_vi); + else + cnt += snprintf(buf + cnt, TX_ACLT_CONF_MSG_LEN - cnt - 1, " N/A"); + if (cnt >= TX_ACLT_CONF_MSG_LEN - 1) + continue; + + if (conf->be_bk) + cnt += snprintf(buf + cnt, TX_ACLT_CONF_MSG_LEN - cnt - 1, " 0x%04x", conf->be_bk); + else + cnt += snprintf(buf + cnt, TX_ACLT_CONF_MSG_LEN - cnt - 1, " N/A"); + if (cnt >= TX_ACLT_CONF_MSG_LEN - 1) + continue; + + RTW_PRINT_SEL(sel, "%7s %1u 0x%x %9u %9u%s\n" + , tx_aclt_conf_str(i), i + , conf->en + , conf->vo_vi * hal_spec->tx_aclt_unit_factor * 32 + , conf->be_bk * hal_spec->tx_aclt_unit_factor * 32 + , buf + ); + } +} + +void rtw_hal_set_tx_aclt_conf(_adapter *adapter, u8 conf_idx, struct tx_aclt_conf_t *input, u8 arg_num) +{ + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct tx_aclt_conf_t *conf; + + if (conf_idx >= TX_ACLT_CONF_NUM) + return; + + conf = &dvobj->tx_aclt_confs[conf_idx]; + + if (arg_num >= 1) { + if (input->en != 0xFF) + conf->en = input->en & 0xF; + } + if (arg_num >= 2) { + conf->vo_vi = input->vo_vi / (hal_spec->tx_aclt_unit_factor * 32); + if (conf->vo_vi > 0xFFFF) + conf->vo_vi = 0xFFFF; + } + if (arg_num >= 3) { + conf->be_bk = input->be_bk / (hal_spec->tx_aclt_unit_factor * 32); + if (conf->be_bk > 0xFFFF) + conf->be_bk = 0xFFFF; + } +} + +void rtw_hal_update_tx_aclt(_adapter *adapter) +{ +#ifdef CONFIG_TX_MCAST2UNI + extern int rtw_mc2u_disable; +#endif + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter); + u8 lt_en = 0, lt_en_ori; + u16 lt_vo_vi = 0xFFFF, lt_be_bk = 0xFFFF; + u32 lt, lt_ori; + struct tx_aclt_conf_t *conf; + int i; + + lt_en_ori = rtw_read8(adapter, REG_LIFETIME_EN); + lt_ori = rtw_read32(adapter, REG_PKT_LIFE_TIME); + + for (i = 0; i < TX_ACLT_CONF_NUM; i++) { + if (!(dvobj->tx_aclt_flags & BIT(i))) + continue; + + conf = &dvobj->tx_aclt_confs[i]; + + if (i == TX_ACLT_CONF_DEFAULT) { + /* first and default status, assign directly */ + lt_en = conf->en; + if (conf->vo_vi) + lt_vo_vi = conf->vo_vi; + if (conf->be_bk) + lt_be_bk = conf->be_bk; + } + #if defined(CONFIG_TX_MCAST2UNI) || defined(CONFIG_RTW_MESH) + else if (0 + #ifdef CONFIG_TX_MCAST2UNI + || (i == TX_ACLT_CONF_AP_M2U + && !rtw_mc2u_disable + && macid_ctl->op_num[H2C_MSR_ROLE_STA] /* having AP mode with STA connected */) + #endif + #ifdef CONFIG_RTW_MESH + || (i == TX_ACLT_CONF_MESH + && macid_ctl->op_num[H2C_MSR_ROLE_MESH] > 1 /* implies only 1 MESH mode supported */) + #endif + ) { + /* long term status, OR en and MIN lifetime */ + lt_en |= conf->en; + if (conf->vo_vi && lt_vo_vi > conf->vo_vi) + lt_vo_vi = conf->vo_vi; + if (conf->be_bk && lt_be_bk > conf->be_bk) + lt_be_bk = conf->be_bk; + } + #endif + } + + if (dvobj->tx_aclt_force_val.en != 0xFF) + lt_en = dvobj->tx_aclt_force_val.en; + if (dvobj->tx_aclt_force_val.vo_vi) + lt_vo_vi = dvobj->tx_aclt_force_val.vo_vi; + if (dvobj->tx_aclt_force_val.be_bk) + lt_be_bk = dvobj->tx_aclt_force_val.be_bk; + + lt_en = (lt_en_ori & 0xF0) | (lt_en & 0x0F); + lt = (lt_be_bk << 16) | lt_vo_vi; + + if (0) + RTW_INFO("lt_en:0x%x(0x%x), lt:0x%08x(0x%08x)\n", lt_en, lt_en_ori, lt, lt_ori); + + if (lt_en != lt_en_ori) + rtw_write8(adapter, REG_LIFETIME_EN, lt_en); + if (lt != lt_ori) + rtw_write32(adapter, REG_PKT_LIFE_TIME, lt); +} +#endif /* CONFIG_TX_AC_LIFETIME */ + void hw_var_port_switch(_adapter *adapter) { #ifdef CONFIG_CONCURRENT_MODE @@ -3173,6 +4134,10 @@ void hw_var_port_switch(_adapter *adapter) u8 bssid[6]; u8 macid_1[6]; u8 bssid_1[6]; +#if defined(CONFIG_RTL8192F) + u16 wlan_act_mask_ctrl = 0; + u16 en_port_mask = EN_PORT_0_FUNCTION | EN_PORT_1_FUNCTION; +#endif u8 hw_port; struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); @@ -3181,6 +4146,9 @@ void hw_var_port_switch(_adapter *adapter) msr = rtw_read8(adapter, MSR); bcn_ctrl = rtw_read8(adapter, REG_BCN_CTRL); bcn_ctrl_1 = rtw_read8(adapter, REG_BCN_CTRL_1); +#if defined(CONFIG_RTL8192F) + wlan_act_mask_ctrl = rtw_read16(adapter, REG_WLAN_ACT_MASK_CTRL_1); +#endif for (i = 0; i < 2; i++) atimwnd[i] = rtw_read8(adapter, REG_ATIMWND + i); @@ -3209,6 +4177,9 @@ void hw_var_port_switch(_adapter *adapter) "msr:0x%02x\n" "bcn_ctrl:0x%02x\n" "bcn_ctrl_1:0x%02x\n" +#if defined(CONFIG_RTL8192F) + "wlan_act_mask_ctrl:0x%02x\n" +#endif "atimwnd:0x%04x\n" "atimwnd_1:0x%04x\n" "tsftr:%llu\n" @@ -3221,6 +4192,9 @@ void hw_var_port_switch(_adapter *adapter) , msr , bcn_ctrl , bcn_ctrl_1 +#if defined(CONFIG_RTL8192F) + , wlan_act_mask_ctrl +#endif , *((u16 *)atimwnd) , *((u16 *)atimwnd_1) , *((u64 *)tsftr) @@ -3236,6 +4210,10 @@ void hw_var_port_switch(_adapter *adapter) rtw_write8(adapter, REG_BCN_CTRL, (bcn_ctrl & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT); rtw_write8(adapter, REG_BCN_CTRL_1, (bcn_ctrl_1 & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT); +#if defined(CONFIG_RTL8192F) + rtw_write16(adapter, REG_WLAN_ACT_MASK_CTRL_1, wlan_act_mask_ctrl & ~en_port_mask); +#endif + /* switch msr */ msr = (msr & 0xf0) | ((msr & 0x03) << 2) | ((msr & 0x0c) >> 2); rtw_write8(adapter, MSR, msr); @@ -3275,6 +4253,14 @@ void hw_var_port_switch(_adapter *adapter) rtw_write8(adapter, REG_BCN_CTRL, bcn_ctrl_1); rtw_write8(adapter, REG_BCN_CTRL_1, bcn_ctrl); +#if defined(CONFIG_RTL8192F) + /* if the setting of port0 and port1 are the same, it does not need to switch port setting*/ + if(((wlan_act_mask_ctrl & en_port_mask) != 0) && ((wlan_act_mask_ctrl & en_port_mask) + != (EN_PORT_0_FUNCTION | EN_PORT_1_FUNCTION))) + wlan_act_mask_ctrl ^= en_port_mask; + rtw_write16(adapter, REG_WLAN_ACT_MASK_CTRL_1, wlan_act_mask_ctrl); +#endif + if (adapter->iface_id == IFACE_ID0) iface = dvobj->padapters[IFACE_ID1]; else if (adapter->iface_id == IFACE_ID1) @@ -3297,6 +4283,9 @@ void hw_var_port_switch(_adapter *adapter) msr = rtw_read8(adapter, MSR); bcn_ctrl = rtw_read8(adapter, REG_BCN_CTRL); bcn_ctrl_1 = rtw_read8(adapter, REG_BCN_CTRL_1); +#if defined(CONFIG_RTL8192F) + wlan_act_mask_ctrl = rtw_read16(adapter, REG_WLAN_ACT_MASK_CTRL_1); +#endif for (i = 0; i < 2; i++) atimwnd[i] = rtw_read8(adapter, REG_ATIMWND + i); @@ -3324,6 +4313,9 @@ void hw_var_port_switch(_adapter *adapter) "msr:0x%02x\n" "bcn_ctrl:0x%02x\n" "bcn_ctrl_1:0x%02x\n" +#if defined(CONFIG_RTL8192F) + "wlan_act_mask_ctrl:0x%02x\n" +#endif "atimwnd:%u\n" "atimwnd_1:%u\n" "tsftr:%llu\n" @@ -3336,6 +4328,9 @@ void hw_var_port_switch(_adapter *adapter) , msr , bcn_ctrl , bcn_ctrl_1 +#if defined(CONFIG_RTL8192F) + , wlan_act_mask_ctrl +#endif , *((u16 *)atimwnd) , *((u16 *)atimwnd_1) , *((u64 *)tsftr) @@ -3369,15 +4364,21 @@ s32 rtw_hal_set_default_port_id_cmd(_adapter *adapter, u8 mac_id) s32 ret = _SUCCESS; u8 parm[H2C_DEFAULT_PORT_ID_LEN] = {0}; struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + u8 port_id = rtw_hal_get_port(adapter); - SET_H2CCMD_DFTPID_PORT_ID(parm, adapter->hw_port); + if ((dvobj->dft.port_id == port_id) && (dvobj->dft.mac_id == mac_id)) + return ret; + + SET_H2CCMD_DFTPID_PORT_ID(parm, port_id); SET_H2CCMD_DFTPID_MAC_ID(parm, mac_id); RTW_DBG_DUMP("DFT port id parm:", parm, H2C_DEFAULT_PORT_ID_LEN); - RTW_INFO("%s port_id :%d, mad_id:%d\n", __func__, adapter->hw_port, mac_id); + RTW_INFO("%s ("ADPT_FMT") port_id :%d, mad_id:%d\n", + __func__, ADPT_ARG(adapter), port_id, mac_id); ret = rtw_hal_fill_h2c_cmd(adapter, H2C_DEFAULT_PORT_ID, H2C_DEFAULT_PORT_ID_LEN, parm); - dvobj->default_port_id = adapter->hw_port; + dvobj->dft.port_id = port_id; + dvobj->dft.mac_id = mac_id; return ret; } @@ -3386,12 +4387,8 @@ s32 rtw_set_default_port_id(_adapter *adapter) s32 ret = _SUCCESS; struct sta_info *psta; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; - struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); - if (adapter->hw_port == dvobj->default_port_id) - return ret; - - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { + if (is_client_associated_to_ap(adapter)) { psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv)); if (psta) ret = rtw_hal_set_default_port_id_cmd(adapter, psta->cmn.mac_id); @@ -3406,9 +4403,9 @@ s32 rtw_set_ps_rsvd_page(_adapter *adapter) { s32 ret = _SUCCESS; u16 media_status_rpt = RT_MEDIA_CONNECT; - struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); - if (adapter->hw_port == dvobj->default_port_id) + if (adapter->iface_id == pwrctl->fw_psmode_iface_id) return ret; rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT, @@ -3417,7 +4414,123 @@ s32 rtw_set_ps_rsvd_page(_adapter *adapter) return ret; } +#if 0 +_adapter * _rtw_search_dp_iface(_adapter *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + _adapter *iface; + _adapter *target_iface = NULL; + int i; + u8 sta_num = 0, tdls_num = 0, ap_num = 0, mesh_num = 0, adhoc_num = 0; + u8 p2p_go_num = 0, p2p_gc_num = 0; + _adapter *sta_ifs[8]; + _adapter *ap_ifs[8]; + _adapter *mesh_ifs[8]; + _adapter *gc_ifs[8]; + _adapter *go_ifs[8]; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + + if (check_fwstate(&iface->mlmepriv, WIFI_STATION_STATE) == _TRUE) { + if (check_fwstate(&iface->mlmepriv, _FW_LINKED) == _TRUE) { + sta_ifs[sta_num++] = iface; + + #ifdef CONFIG_TDLS + if (iface->tdlsinfo.link_established == _TRUE) + tdls_num++; + #endif + #ifdef CONFIG_P2P + if (MLME_IS_GC(iface)) + gc_ifs[p2p_gc_num++] = iface; + #endif + } +#ifdef CONFIG_AP_MODE + } else if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE) == _TRUE ) { + if (check_fwstate(&iface->mlmepriv, _FW_LINKED) == _TRUE) { + ap_ifs[ap_num++] = iface; + #ifdef CONFIG_P2P + if (MLME_IS_GO(iface)) + go_ifs[p2p_go_num++] = iface; + #endif + } #endif + } else if (check_fwstate(&iface->mlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE) == _TRUE + && check_fwstate(&iface->mlmepriv, _FW_LINKED) == _TRUE + ) { + adhoc_num++; + +#ifdef CONFIG_RTW_MESH + } else if (check_fwstate(&iface->mlmepriv, WIFI_MESH_STATE) == _TRUE + && check_fwstate(&iface->mlmepriv, _FW_LINKED) == _TRUE + ) { + mesh_ifs[mesh_num++] = iface; +#endif + } + } + + if (p2p_gc_num) { + target_iface = gc_ifs[0]; + } + else if (sta_num) { + if(sta_num == 1) { + target_iface = sta_ifs[0]; + } else if (sta_num >= 2) { + /*TODO get target_iface by timestamp*/ + target_iface = sta_ifs[0]; + } + } else if (ap_num) { + target_iface = ap_ifs[0]; + } + + RTW_INFO("[IFS_ASSOC_STATUS] - STA :%d", sta_num); + RTW_INFO("[IFS_ASSOC_STATUS] - TDLS :%d", tdls_num); + RTW_INFO("[IFS_ASSOC_STATUS] - AP:%d", ap_num); + RTW_INFO("[IFS_ASSOC_STATUS] - MESH :%d", mesh_num); + RTW_INFO("[IFS_ASSOC_STATUS] - ADHOC :%d", adhoc_num); + RTW_INFO("[IFS_ASSOC_STATUS] - P2P-GC :%d", p2p_gc_num); + RTW_INFO("[IFS_ASSOC_STATUS] - P2P-GO :%d", p2p_go_num); + + if (target_iface) + RTW_INFO("%s => target_iface ("ADPT_FMT")\n", + __func__, ADPT_ARG(target_iface)); + else + RTW_INFO("%s => target_iface NULL\n", __func__); + + return target_iface; +} + +void rtw_search_default_port(_adapter *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + _adapter *adp_iface = NULL; +#ifdef CONFIG_WOWLAN + struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); + + if (pwrpriv->wowlan_mode == _TRUE) { + adp_iface = adapter; + goto exit; + } +#endif + adp_iface = _rtw_search_dp_iface(adapter); + +exit : + if ((adp_iface != NULL) && (MLME_IS_STA(adp_iface))) + rtw_set_default_port_id(adp_iface); + else + rtw_hal_set_default_port_id_cmd(adapter, 0); + + if (1) { + _adapter *tmp_adp; + + tmp_adp = (adp_iface) ? adp_iface : adapter; + + RTW_INFO("%s ("ADPT_FMT")=> hw_port :%d, default_port(%d)\n", + __func__, ADPT_ARG(adapter), get_hw_port(tmp_adp), get_dft_portid(tmp_adp)); + } +} +#endif +#endif /*CONFIG_FW_MULTI_PORT_SUPPORT*/ #ifdef CONFIG_P2P_PS #ifdef RTW_HALMAC @@ -3433,11 +4546,12 @@ void rtw_set_p2p_ps_offload_cmd(_adapter *adapter, u8 p2p_ps_state) HAL_P2P_PS_PARA p2p_ps_para; int status = -1; u8 i; + u8 hw_port = rtw_hal_get_port(adapter); _rtw_memset(&p2p_ps_para, 0, sizeof(HAL_P2P_PS_PARA)); _rtw_memcpy((&p2p_ps_para) , &hal->p2p_ps_offload , sizeof(hal->p2p_ps_offload)); - (&p2p_ps_para)->p2p_port_id = adapter->hw_port; + (&p2p_ps_para)->p2p_port_id = hw_port; (&p2p_ps_para)->p2p_group = 0; psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); if (psta) { @@ -3481,6 +4595,13 @@ void rtw_set_p2p_ps_offload_cmd(_adapter *adapter, u8 p2p_ps_state) /* To control the register setting for which NOA */ (&p2p_ps_para)->noa_sel = i; (&p2p_ps_para)->noa_en = 1; + (&p2p_ps_para)->disable_close_rf = 0; +#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP +#ifdef CONFIG_CONCURRENT_MODE + if (rtw_mi_buddy_check_fwstate(adapter, WIFI_ASOC_STATE)) +#endif /* CONFIG_CONCURRENT_MODE */ + (&p2p_ps_para)->disable_close_rf = 1; +#endif /* CONFIG_P2P_PS_NOA_USE_MACID_SLEEP */ /* config P2P NoA Descriptor Register */ /* config NOA duration */ (&p2p_ps_para)->noa_duration_para = pwdinfo->noa_duration[i]; @@ -3562,6 +4683,10 @@ s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miraca u8 parm[H2C_MEDIA_STATUS_RPT_LEN] = {0}; int i; s32 ret; +#ifdef CONFIG_FW_MULTI_PORT_SUPPORT + u8 hw_port = rtw_hal_get_port(adapter); +#endif + u8 op_num_change_bmp = 0; SET_H2CCMD_MSRRPT_PARM_OPMODE(parm, opmode); SET_H2CCMD_MSRRPT_PARM_MACID_IND(parm, macid_ind); @@ -3571,7 +4696,7 @@ s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miraca SET_H2CCMD_MSRRPT_PARM_MACID(parm, macid); SET_H2CCMD_MSRRPT_PARM_MACID_END(parm, macid_end); #ifdef CONFIG_FW_MULTI_PORT_SUPPORT - SET_H2CCMD_MSRRPT_PARM_PORT_NUM(parm, adapter->hw_port); + SET_H2CCMD_MSRRPT_PARM_PORT_NUM(parm, hw_port); #endif RTW_DBG_DUMP("MediaStatusRpt parm:", parm, H2C_MEDIA_STATUS_RPT_LEN); @@ -3616,7 +4741,7 @@ s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miraca macid_end = macid; for (i = macid; macid <= macid_end; macid++) { - rtw_macid_ctl_set_h2c_msr(macid_ctl, macid, parm[0]); + op_num_change_bmp |= rtw_macid_ctl_set_h2c_msr(macid_ctl, macid, parm[0]); if (!opmode) { rtw_macid_ctl_set_bw(macid_ctl, macid, CHANNEL_WIDTH_20); rtw_macid_ctl_set_vht_en(macid_ctl, macid, 0); @@ -3624,6 +4749,12 @@ s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miraca rtw_macid_ctl_set_rate_bmp1(macid_ctl, macid, 0); } } + +#if CONFIG_TX_AC_LIFETIME + if (op_num_change_bmp) + rtw_hal_update_tx_aclt(adapter); +#endif + if (!opmode) rtw_update_tx_rate_bmp(adapter_to_dvobj(adapter)); @@ -3670,7 +4801,9 @@ void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); - if (IS_8723D_SERIES(pHalData->version_id) || IS_8822B_SERIES(pHalData->version_id) || IS_8821C_SERIES(pHalData->version_id)) + if (IS_8723D_SERIES(pHalData->version_id) || IS_8192F_SERIES(pHalData->version_id) + || IS_8822B_SERIES(pHalData->version_id) || IS_8821C_SERIES(pHalData->version_id) + || IS_8822C_SERIES(pHalData->version_id)) rtw_hal_set_hwreg(padapter, HW_SET_GPIO_WL_CTRL, (u8 *)(&enable)); /* * Switch GPIO_13, GPIO_14 to wlan control, or pull GPIO_13,14 MUST fail. @@ -3690,6 +4823,9 @@ void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable) void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval) { +#if defined(CONFIG_RTL8192F) + rtw_hal_set_hwreg(padapter, HW_VAR_WOW_OUTPUT_GPIO, (u8 *)(&index)); +#else if (index <= 7) { /* config GPIO mode */ rtw_write8(padapter, REG_GPIO_PIN_CTRL + 3, @@ -3739,9 +4875,13 @@ void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval) RTW_INFO("%s: invalid GPIO%d=%d\n", __FUNCTION__, index, outputval); } +#endif } void rtw_hal_set_input_gpio(_adapter *padapter, u8 index) { +#if defined(CONFIG_RTL8192F) + rtw_hal_set_hwreg(padapter, HW_VAR_WOW_INPUT_GPIO, (u8 *)(&index)); +#else if (index <= 7) { /* config GPIO mode */ rtw_write8(padapter, REG_GPIO_PIN_CTRL + 3, @@ -3772,7 +4912,7 @@ void rtw_hal_set_input_gpio(_adapter *padapter, u8 index) rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 2) & ~BIT(index)); } else RTW_INFO("%s: invalid GPIO%d\n", __func__, index); - +#endif } #endif @@ -3870,6 +5010,14 @@ int rtw_hal_get_rsvd_page(_adapter *adapter, u32 page_offset, u8 i = 0; bool rst = _FALSE; +#ifdef DBG_LA_MODE + struct registry_priv *registry_par = &adapter->registrypriv; + + if(registry_par->la_mode_en == 1) { + RTW_INFO("%s LA debug mode can't dump rsvd pg \n", __func__); + return rst; + } +#endif rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, &page_size); addr = page_offset * page_size; @@ -3948,7 +5096,7 @@ void rtw_dump_rsvd_page(void *sel, _adapter *adapter, u8 page_offset, u8 page_nu void rtw_dump_fifo(void *sel, _adapter *adapter, u8 fifo_sel, u32 fifo_addr, u32 fifo_size) { u8 *buffer = NULL; - u8 buff_size = 0; + u32 buff_size = 0; static const char * const fifo_sel_str[] = { "TX", "RX", "RSVD_PAGE", "REPORT", "LLT", "RXBUF_FW" }; @@ -4013,7 +5161,7 @@ static void rtw_hal_release_rx_dma(_adapter *adapter) rtw_write32(adapter, REG_RXPKT_NUM, (val32 & (~RW_RELEASE_EN))); RTW_INFO("%s, [0x%04x]: 0x%08x\n", - __func__, REG_RXPKT_NUM, (val32 & (~RW_RELEASE_EN))); + __func__, REG_RXPKT_NUM, (u32)(val32 & (~RW_RELEASE_EN))); } static u8 rtw_hal_pause_rx_dma(_adapter *adapter) @@ -4062,9 +5210,13 @@ static u8 rtw_hal_pause_rx_dma(_adapter *adapter) tmp = rtw_read16(adapter, REG_RXPKT_NUM + 2); RTW_PRINT("Stop RX DMA failed......\n"); +#ifdef CONFIG_RTL8822C + RTW_PRINT("%s, RXPKT_NUM: 0x%04x\n", + __func__, rtw_read16(adapter, 0x02B0)); +#else RTW_PRINT("%s, RXPKT_NUM: 0x%02x\n", __func__, ((tmp & 0xFF00) >> 8)); - +#endif if (tmp & BIT(3)) RTW_PRINT("%s, RX DMA has req\n", __func__); @@ -4130,7 +5282,7 @@ static u8 rtw_hal_check_wow_ctrl(_adapter *adapter, u8 chk_type) u8 trycnt = 25; u8 res = _FALSE; - if (IS_HARDWARE_TYPE_JAGUAR2(adapter)) { + if (IS_HARDWARE_TYPE_JAGUAR2(adapter) || IS_HARDWARE_TYPE_JAGUAR3(adapter)) { if (chk_type) { reason = rtw_read8(adapter, REG_WOWLAN_WAKE_REASON); RTW_INFO("%s reason:0x%02x\n", __func__, reason); @@ -4283,7 +5435,7 @@ static void rtw_hal_update_gtk_offload_info(_adapter *adapter) struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; _irqL irqL; u8 get_key[16]; - u8 gtk_id = 0, offset = 0, i = 0, sz = 0; + u8 gtk_id = 0, offset = 0, i = 0, sz = 0, aoac_rpt_ver = 0, has_rekey = _FALSE; u64 replay_count = 0, tmp_iv_hdr = 0, pkt_pn = 0; if (!MLME_IS_STA(adapter)) @@ -4295,10 +5447,30 @@ static void rtw_hal_update_gtk_offload_info(_adapter *adapter) /*read gtk key index*/ gtk_id = paoac_rpt->key_index; + aoac_rpt_ver = paoac_rpt->version_info; - if (gtk_id == 5 || gtk_id == 0) { + if (aoac_rpt_ver == 0) { + /* initial verison */ + if (gtk_id == 5) + has_rekey = _FALSE; + else + has_rekey = _TRUE; + } else if (aoac_rpt_ver >= 1) { + /* Add krack patch */ + if (gtk_id == 5) + RTW_WARN("%s FW check iv fail\n", __func__); + + if (aoac_rpt_ver == 1) + RTW_WARN("%s aoac report version should be update to v2\n", __func__); + + /* Fix key id mismatch */ + if (aoac_rpt_ver == 2) + has_rekey = paoac_rpt->rekey_ok == 1 ? _TRUE : _FALSE; + } + + if (has_rekey == _FALSE) { RTW_INFO("%s no rekey event happened.\n", __func__); - } else if (gtk_id > 0 && gtk_id < 4) { + } else if (has_rekey == _TRUE) { RTW_INFO("%s update security key.\n", __func__); /*read key from sec-cam,for DK ,keyindex is equal to cam-id*/ rtw_sec_read_cam_ent(adapter, gtk_id, @@ -4379,6 +5551,7 @@ static void rtw_dump_aoac_rpt(_adapter *adapter) RTW_INFO("[AOAC-RPT] wow_pattern_idx - %d\n", paoac_rpt->wow_pattern_idx); RTW_INFO("[AOAC-RPT] version_info - %d\n", paoac_rpt->version_info); + RTW_INFO("[AOAC-RPT] rekey_ok - %d\n", paoac_rpt->rekey_ok); RTW_INFO_DUMP("[AOAC-RPT] RX PTK IV-", paoac_rpt->rxptk_iv, 8); RTW_INFO_DUMP("[AOAC-RPT] RX GTK[0] IV-", paoac_rpt->rxgtk_iv[0], 8); RTW_INFO_DUMP("[AOAC-RPT] RX GTK[1] IV-", paoac_rpt->rxgtk_iv[1], 8); @@ -4504,14 +5677,15 @@ static u8 rtw_hal_set_keep_alive_cmd(_adapter *adapter, u8 enable, u8 pkt_type) u8 u1H2CKeepAliveParm[H2C_KEEP_ALIVE_CTRL_LEN] = {0}; u8 adopt = 1, check_period = 5; u8 ret = _FAIL; + u8 hw_port = rtw_hal_get_port(adapter); SET_H2CCMD_KEEPALIVE_PARM_ENABLE(u1H2CKeepAliveParm, enable); SET_H2CCMD_KEEPALIVE_PARM_ADOPT(u1H2CKeepAliveParm, adopt); SET_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(u1H2CKeepAliveParm, pkt_type); SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(u1H2CKeepAliveParm, check_period); #ifdef CONFIG_FW_MULTI_PORT_SUPPORT - SET_H2CCMD_KEEPALIVE_PARM_PORT_NUM(u1H2CKeepAliveParm, adapter->hw_port); - RTW_INFO("%s(): enable = %d, port = %d\n", __func__, enable, adapter->hw_port); + SET_H2CCMD_KEEPALIVE_PARM_PORT_NUM(u1H2CKeepAliveParm, hw_port); + RTW_INFO("%s(): enable = %d, port = %d\n", __func__, enable, hw_port); #else RTW_INFO("%s(): enable = %d\n", __func__, enable); #endif @@ -4529,14 +5703,16 @@ static u8 rtw_hal_set_disconnect_decision_cmd(_adapter *adapter, u8 enable) u8 u1H2CDisconDecisionParm[H2C_DISCON_DECISION_LEN] = {0}; u8 adopt = 1, check_period = 30, trypkt_num = 5; u8 ret = _FAIL; + u8 hw_port = rtw_hal_get_port(adapter); SET_H2CCMD_DISCONDECISION_PARM_ENABLE(u1H2CDisconDecisionParm, enable); SET_H2CCMD_DISCONDECISION_PARM_ADOPT(u1H2CDisconDecisionParm, adopt); + /* SET_H2CCMD_DISCONDECISION_PARM_DISCONNECT_EN(u1H2CDisconDecisionParm, adopt); */ SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(u1H2CDisconDecisionParm, check_period); SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(u1H2CDisconDecisionParm, trypkt_num); #ifdef CONFIG_FW_MULTI_PORT_SUPPORT - SET_H2CCMD_DISCONDECISION_PORT_NUM(u1H2CDisconDecisionParm, adapter->hw_port); - RTW_INFO("%s(): enable = %d, port = %d\n", __func__, enable, adapter->hw_port); + SET_H2CCMD_DISCONDECISION_PORT_NUM(u1H2CDisconDecisionParm, hw_port); + RTW_INFO("%s(): enable = %d, port = %d\n", __func__, enable, hw_port); #else RTW_INFO("%s(): enable = %d\n", __func__, enable); #endif @@ -4554,9 +5730,10 @@ static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_un struct security_priv *psecpriv = &adapter->securitypriv; struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter); struct hal_ops *pHalFunc = &adapter->hal_func; + struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); u8 u1H2CWoWlanCtrlParm[H2C_WOWLAN_LEN] = {0}; - u8 discont_wake = 0, gpionum = 0, gpio_dur = 0; + u8 discont_wake = 0, gpionum = 0, gpio_dur = 0, no_wake = 0; u8 hw_unicast = 0, gpio_pulse_cnt = 0, gpio_pulse_en = 0; u8 sdio_wakeup_enable = 1; u8 gpio_high_active = 0; @@ -4572,17 +5749,21 @@ static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_un gpionum = WAKEUP_GPIO_IDX; sdio_wakeup_enable = 0; #endif /* CONFIG_GPIO_WAKEUP */ - + + if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && + !check_fwstate(pmlmepriv, _FW_LINKED)) + no_wake = 1; + if (!ppwrpriv->wowlan_pno_enable && - registry_par->wakeup_event & BIT(0)) + registry_par->wakeup_event & BIT(0) && !no_wake) magic_pkt = enable; if ((registry_par->wakeup_event & BIT(1)) && - (psecpriv->dot11PrivacyAlgrthm == _WEP40_ || - psecpriv->dot11PrivacyAlgrthm == _WEP104_)) + (psecpriv->dot11PrivacyAlgrthm == _WEP40_ || + psecpriv->dot11PrivacyAlgrthm == _WEP104_) && !no_wake) hw_unicast = 1; - if (registry_par->wakeup_event & BIT(2)) + if (registry_par->wakeup_event & BIT(2) && !no_wake) discont_wake = enable; RTW_INFO("%s(): enable=%d change_unit=%d\n", __func__, @@ -4603,7 +5784,8 @@ static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_un #endif SET_H2CCMD_WOWLAN_FUNC_ENABLE(u1H2CWoWlanCtrlParm, enable); - SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(u1H2CWoWlanCtrlParm, enable); + if(!no_wake) + SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(u1H2CWoWlanCtrlParm, enable); SET_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(u1H2CWoWlanCtrlParm, magic_pkt); SET_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(u1H2CWoWlanCtrlParm, hw_unicast); SET_H2CCMD_WOWLAN_ALL_PKT_DROP(u1H2CWoWlanCtrlParm, 0); @@ -4641,10 +5823,18 @@ static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_un dis_uphy_time = 0x4; } - SET_H2CCMD_WOWLAN_DIS_UPHY(u1H2CWoWlanCtrlParm, dis_uphy); - SET_H2CCMD_WOWLAN_HOST_2_DEV(u1H2CWoWlanCtrlParm, 1); - SET_H2CCMD_WOWLAN_DIS_UPHY_UNIT(u1H2CWoWlanCtrlParm, dis_uphy_unit); - SET_H2CCMD_WOWLAN_DIS_UPHY_TIME(u1H2CWoWlanCtrlParm, dis_uphy_time); + SET_H2CCMD_WOWLAN_DISABLE_UPHY(u1H2CWoWlanCtrlParm, dis_uphy); + SET_H2CCMD_WOWLAN_UNIT_FOR_UPHY_DISABLE(u1H2CWoWlanCtrlParm, dis_uphy_unit); + SET_H2CCMD_WOWLAN_TIME_FOR_UPHY_DISABLE(u1H2CWoWlanCtrlParm, dis_uphy_time); + if (ppwrpriv->hst2dev_high_active == 1) + SET_H2CCMD_WOWLAN_RISE_HST2DEV(u1H2CWoWlanCtrlParm, 1); +#ifdef CONFIG_RTW_ONE_PIN_GPIO + SET_H2CCMD_WOWLAN_GPIO_INPUT_EN(u1H2CWoWlanCtrlParm, 1); + SET_H2CCMD_WOWLAN_DEV2HST_EN(u1H2CWoWlanCtrlParm, 1); + SET_H2CCMD_WOWLAN_HST2DEV_EN(u1H2CWoWlanCtrlParm, 0); +#else + SET_H2CCMD_WOWLAN_HST2DEV_EN(u1H2CWoWlanCtrlParm, 1); +#endif /* CONFIG_RTW_ONE_PIN_GPIO */ #endif /* CONFIG_DIS_UPHY */ @@ -4662,89 +5852,105 @@ static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable) struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter); struct registry_priv *pregistrypriv = &adapter->registrypriv; u8 u1H2CRemoteWakeCtrlParm[H2C_REMOTE_WAKE_CTRL_LEN] = {0}; - u8 ret = _FAIL, count = 0; + u8 ret = _FAIL, count = 0, no_wake = 0; + struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); RTW_INFO("%s(): enable=%d\n", __func__, enable); - if (!ppwrpriv->wowlan_pno_enable) { + if(pregistrypriv->suspend_type == FW_IPS_DISABLE_BBRF && + !check_fwstate(pmlmepriv, _FW_LINKED)) + no_wake = 1; + if(no_wake) { SET_H2CCMD_REMOTE_WAKECTRL_ENABLE( u1H2CRemoteWakeCtrlParm, enable); - SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN( - u1H2CRemoteWakeCtrlParm, 1); -#ifdef CONFIG_GTK_OL - if (psecuritypriv->binstallKCK_KEK == _TRUE && - psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) { - SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN( - u1H2CRemoteWakeCtrlParm, 1); - } else { - RTW_INFO("no kck kek\n"); - SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN( - u1H2CRemoteWakeCtrlParm, 0); - } -#endif /* CONFIG_GTK_OL */ - -#ifdef CONFIG_IPV6 - if (ppwrpriv->wowlan_ns_offload_en == _TRUE) { - RTW_INFO("enable NS offload\n"); - SET_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN( + } else { + if (!ppwrpriv->wowlan_pno_enable) { + SET_H2CCMD_REMOTE_WAKECTRL_ENABLE( u1H2CRemoteWakeCtrlParm, enable); - } - - /* - * filter NetBios name service pkt to avoid being waked-up - * by this kind of unicast pkt this exceptional modification - * is used for match competitor's behavior - */ - - SET_H2CCMD_REMOTE_WAKE_CTRL_NBNS_FILTER_EN( - u1H2CRemoteWakeCtrlParm, enable); -#endif /*CONFIG_IPV6*/ - - if ((psecuritypriv->dot11PrivacyAlgrthm == _AES_) || - (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) || - (psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_)) { - SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION( - u1H2CRemoteWakeCtrlParm, 0); - } else { - SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION( + SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN( u1H2CRemoteWakeCtrlParm, 1); - } - - if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_ && - psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) { - SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN( - u1H2CRemoteWakeCtrlParm, enable); - - if (IS_HARDWARE_TYPE_8188E(adapter) || - IS_HARDWARE_TYPE_8812(adapter)) { - SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN( + #ifdef CONFIG_GTK_OL + if (psecuritypriv->binstallKCK_KEK == _TRUE && + psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) { + SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN( + u1H2CRemoteWakeCtrlParm, 1); + } else { + RTW_INFO("no kck kek\n"); + SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN( u1H2CRemoteWakeCtrlParm, 0); + } + #endif /* CONFIG_GTK_OL */ + + #ifdef CONFIG_IPV6 + if (ppwrpriv->wowlan_ns_offload_en == _TRUE) { + RTW_INFO("enable NS offload\n"); + SET_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN( + u1H2CRemoteWakeCtrlParm, enable); + } + + /* + * filter NetBios name service pkt to avoid being waked-up + * by this kind of unicast pkt this exceptional modification + * is used for match competitor's behavior + */ + + SET_H2CCMD_REMOTE_WAKE_CTRL_NBNS_FILTER_EN( + u1H2CRemoteWakeCtrlParm, enable); + #endif /*CONFIG_IPV6*/ + + #ifdef CONFIG_RTL8192F + if (IS_HARDWARE_TYPE_8192F(adapter)){ + SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN( + u1H2CRemoteWakeCtrlParm, enable); + } + #endif /* CONFIG_RTL8192F */ + + if ((psecuritypriv->dot11PrivacyAlgrthm == _AES_) || + (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) || + (psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_)) { + SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION( + u1H2CRemoteWakeCtrlParm, 0); + } else { SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION( u1H2CRemoteWakeCtrlParm, 1); } + + if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_ && + psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) { + SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN( + u1H2CRemoteWakeCtrlParm, enable); + + if (IS_HARDWARE_TYPE_8188E(adapter) || + IS_HARDWARE_TYPE_8812(adapter)) { + SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN( + u1H2CRemoteWakeCtrlParm, 0); + SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION( + u1H2CRemoteWakeCtrlParm, 1); + } + } + + SET_H2CCMD_REMOTE_WAKE_CTRL_FW_PARSING_UNTIL_WAKEUP( + u1H2CRemoteWakeCtrlParm, 1); } - - SET_H2CCMD_REMOTE_WAKE_CTRL_FW_PARSING_UNTIL_WAKEUP( - u1H2CRemoteWakeCtrlParm, 1); + #ifdef CONFIG_PNO_SUPPORT + else { + SET_H2CCMD_REMOTE_WAKECTRL_ENABLE( + u1H2CRemoteWakeCtrlParm, enable); + SET_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN( + u1H2CRemoteWakeCtrlParm, enable); + } + #endif + + #ifdef CONFIG_P2P_WOWLAN + if (_TRUE == ppwrpriv->wowlan_p2p_mode) { + RTW_INFO("P2P OFFLOAD ENABLE\n"); + SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(u1H2CRemoteWakeCtrlParm, 1); + } else { + RTW_INFO("P2P OFFLOAD DISABLE\n"); + SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(u1H2CRemoteWakeCtrlParm, 0); + } + #endif /* CONFIG_P2P_WOWLAN */ } -#ifdef CONFIG_PNO_SUPPORT - else { - SET_H2CCMD_REMOTE_WAKECTRL_ENABLE( - u1H2CRemoteWakeCtrlParm, enable); - SET_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN( - u1H2CRemoteWakeCtrlParm, enable); - } -#endif - -#ifdef CONFIG_P2P_WOWLAN - if (_TRUE == ppwrpriv->wowlan_p2p_mode) { - RTW_INFO("P2P OFFLOAD ENABLE\n"); - SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(u1H2CRemoteWakeCtrlParm, 1); - } else { - RTW_INFO("P2P OFFLOAD DISABLE\n"); - SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(u1H2CRemoteWakeCtrlParm, 0); - } -#endif /* CONFIG_P2P_WOWLAN */ ret = rtw_hal_fill_h2c_cmd(adapter, @@ -4815,20 +6021,25 @@ void rtw_hal_set_fw_wow_related_cmd(_adapter *padapter, u8 enable) struct registry_priv *pregistry = &padapter->registrypriv; struct sta_info *psta = NULL; u16 media_status_rpt; - u8 pkt_type = 0; + u8 pkt_type = 0, no_wake = 0; u8 ret = _SUCCESS; + + if(pregistry->suspend_type == FW_IPS_DISABLE_BBRF && + !check_fwstate(pmlmepriv, _FW_LINKED)) + no_wake = 1; RTW_PRINT("+%s()+: enable=%d\n", __func__, enable); rtw_hal_set_wowlan_ctrl_cmd(padapter, enable, _FALSE); if (enable) { - rtw_hal_set_global_info_cmd(padapter, + if(!no_wake) + rtw_hal_set_global_info_cmd(padapter, psecpriv->dot118021XGrpPrivacy, psecpriv->dot11PrivacyAlgrthm); if (!(ppwrpriv->wowlan_pno_enable)) { - if (pregistry->wakeup_event & BIT(2)) + if (pregistry->wakeup_event & BIT(2) && !no_wake) rtw_hal_set_disconnect_decision_cmd(padapter, enable); #ifdef CONFIG_ARP_KEEP_ALIVE @@ -4840,7 +6051,8 @@ void rtw_hal_set_fw_wow_related_cmd(_adapter *padapter, u8 enable) #else pkt_type = 0; #endif /* CONFIG_ARP_KEEP_ALIVE */ - rtw_hal_set_keep_alive_cmd(padapter, enable, pkt_type); + if(!no_wake) + rtw_hal_set_keep_alive_cmd(padapter, enable, pkt_type); } rtw_hal_set_remote_wake_ctrl_cmd(padapter, enable); #ifdef CONFIG_PNO_SUPPORT @@ -5059,7 +6271,8 @@ static void rtw_hal_ap_wow_enable(_adapter *padapter) #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) /* Invoid SE0 reset signal during suspending*/ rtw_write8(padapter, REG_RSV_CTRL, 0x20); - if (IS_8188F(pHalData->version_id) == FALSE) + if (IS_8188F(pHalData->version_id) == FALSE + && IS_8188GTV(pHalData->version_id) == FALSE) rtw_write8(padapter, REG_RSV_CTRL, 0x60); #endif } @@ -5102,6 +6315,9 @@ static void rtw_hal_ap_wow_disable(_adapter *padapter) rtw_hal_fw_dl(padapter, _FALSE); #ifdef CONFIG_GPIO_WAKEUP +#ifdef CONFIG_RTW_ONE_PIN_GPIO + rtw_hal_set_input_gpio(padapter, WAKEUP_GPIO_IDX); +#else #ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE if (pwrctl->is_high_active == 0) rtw_hal_set_input_gpio(padapter, WAKEUP_GPIO_IDX); @@ -5114,6 +6330,7 @@ static void rtw_hal_ap_wow_disable(_adapter *padapter) rtw_hal_switch_gpio_wl_ctrl(padapter, WAKEUP_GPIO_IDX, _FALSE); #endif/*CONFIG_WAKEUP_GPIO_INPUT_MODE*/ +#endif /* CONFIG_RTW_ONE_PIN_GPIO */ #endif media_status_rpt = RT_MEDIA_CONNECT; @@ -5459,9 +6676,6 @@ static void rtw_hal_construct_P2PProbeRsp(_adapter *padapter, u8 *pframe, u32 *p #ifdef CONFIG_WFD u32 wfdielen = 0; #endif -#ifdef CONFIG_INTEL_WIDI - u8 zero_array_check[L2SDTA_SERVICE_VE_LEN] = { 0x00 }; -#endif /* CONFIG_INTEL_WIDI */ /* for debug */ u8 *dbgbuf = pframe; @@ -5556,39 +6770,6 @@ static void rtw_hal_construct_P2PProbeRsp(_adapter *padapter, u8 *pframe, u32 *p /* Value: */ wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */ -#ifdef CONFIG_INTEL_WIDI - /* Commented by Kurt */ - /* Appended WiDi info. only if we did issued_probereq_widi(), and then we saved ven. ext. in pmlmepriv->sa_ext. */ - if (_rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE - || pmlmepriv->num_p2p_sdt != 0) { - /* Sec dev type */ - *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_SEC_DEV_TYPE_LIST); - wpsielen += 2; - - /* Length: */ - *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0008); - wpsielen += 2; - - /* Value: */ - /* Category ID */ - *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_PDT_CID_DISPLAYS); - wpsielen += 2; - - /* OUI */ - *(u32 *)(wpsie + wpsielen) = cpu_to_be32(INTEL_DEV_TYPE_OUI); - wpsielen += 4; - - *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_PDT_SCID_WIDI_CONSUMER_SINK); - wpsielen += 2; - - if (_rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE) { - /* Vendor Extension */ - _rtw_memcpy(wpsie + wpsielen, pmlmepriv->sa_ext, L2SDTA_SERVICE_VE_LEN); - wpsielen += L2SDTA_SERVICE_VE_LEN; - } - } -#endif /* CONFIG_INTEL_WIDI */ - /* WiFi Simple Config State */ /* Type: */ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_SIMPLE_CONF_STATE); @@ -6630,6 +7811,7 @@ void rtw_hal_construct_beacon(_adapter *padapter, pframe += 2; pktlen += 2; +#if 0 /* capability info: 2 bytes */ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); @@ -6672,13 +7854,15 @@ void rtw_hal_construct_beacon(_adapter *padapter, if (rate_len > 8) pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); - /* todo:HT for adhoc */ _ConstructBeacon: +#endif - if ((pktlen + TXDESC_SIZE) > 512) { - RTW_INFO("beacon frame too large\n"); + if ((pktlen + TXDESC_SIZE) > MAX_BEACON_LEN) { + RTW_ERR("beacon frame too large ,len(%d,%d)\n", + (pktlen + TXDESC_SIZE), MAX_BEACON_LEN); + rtw_warn_on(1); return; } @@ -6761,7 +7945,6 @@ void rtw_hal_construct_NullFunctionData( PADAPTER padapter, u8 *pframe, u32 *pLength, - u8 *StaAddr, u8 bQoS, u8 AC, u8 bEosp, @@ -6774,7 +7957,8 @@ void rtw_hal_construct_NullFunctionData( struct wlan_network *cur_network = &pmlmepriv->cur_network; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u8 bssid[ETH_ALEN]; + u8 *sta_addr = NULL; + u8 bssid[ETH_ALEN] = {0}; /* RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); */ @@ -6785,9 +7969,10 @@ void rtw_hal_construct_NullFunctionData( if (bForcePowerSave) SetPwrMgt(fctrl); - if (NULL == StaAddr) { + sta_addr = get_my_bssid(&pmlmeinfo->network); + if (NULL == sta_addr) { _rtw_memcpy(bssid, adapter_mac_addr(padapter), ETH_ALEN); - StaAddr = bssid; + sta_addr = bssid; } switch (cur_network->network.InfrastructureMode) { @@ -6795,17 +7980,17 @@ void rtw_hal_construct_NullFunctionData( SetToDs(fctrl); _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, sta_addr, ETH_ALEN); break; case Ndis802_11APMode: SetFrDs(fctrl); - _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr1, sta_addr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); break; case Ndis802_11IBSS: default: - _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr1, sta_addr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); break; @@ -6834,11 +8019,11 @@ void rtw_hal_construct_NullFunctionData( } void rtw_hal_construct_ProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, - u8 *StaAddr, BOOLEAN bHideSSID) + BOOLEAN bHideSSID) { struct rtw_ieee80211_hdr *pwlanhdr; u16 *fctrl; - u8 *mac, *bssid; + u8 *mac, *bssid, *sta_addr; u32 pktlen; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); @@ -6850,10 +8035,11 @@ void rtw_hal_construct_ProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, mac = adapter_mac_addr(padapter); bssid = cur_network->MacAddress; + sta_addr = get_my_bssid(&pmlmeinfo->network); fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; - _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr1, sta_addr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); @@ -7016,23 +8202,23 @@ static void rtw_hal_construct_ARPRsp( /* ARP element */ pARPRspPkt += 8; - SET_ARP_PKT_HW(pARPRspPkt, 0x0100); - SET_ARP_PKT_PROTOCOL(pARPRspPkt, 0x0008); /* IP protocol */ - SET_ARP_PKT_HW_ADDR_LEN(pARPRspPkt, 6); - SET_ARP_PKT_PROTOCOL_ADDR_LEN(pARPRspPkt, 4); - SET_ARP_PKT_OPERATION(pARPRspPkt, 0x0200); /* ARP response */ - SET_ARP_PKT_SENDER_MAC_ADDR(pARPRspPkt, adapter_mac_addr(padapter)); - SET_ARP_PKT_SENDER_IP_ADDR(pARPRspPkt, pIPAddress); + SET_ARP_HTYPE(pARPRspPkt, 1); + SET_ARP_PTYPE(pARPRspPkt, ETH_P_IP); /* IP protocol */ + SET_ARP_HLEN(pARPRspPkt, ETH_ALEN); + SET_ARP_PLEN(pARPRspPkt, RTW_IP_ADDR_LEN); + SET_ARP_OPER(pARPRspPkt, 2); /* ARP response */ + SET_ARP_SENDER_MAC_ADDR(pARPRspPkt, adapter_mac_addr(padapter)); + SET_ARP_SENDER_IP_ADDR(pARPRspPkt, pIPAddress); #ifdef CONFIG_ARP_KEEP_ALIVE if (!is_zero_mac_addr(pmlmepriv->gw_mac_addr)) { - SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt, pmlmepriv->gw_mac_addr); - SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt, pmlmepriv->gw_ip); + SET_ARP_TARGET_MAC_ADDR(pARPRspPkt, pmlmepriv->gw_mac_addr); + SET_ARP_TARGET_IP_ADDR(pARPRspPkt, pmlmepriv->gw_ip); } else #endif { - SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt, + SET_ARP_TARGET_MAC_ADDR(pARPRspPkt, get_my_bssid(&(pmlmeinfo->network))); - SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt, + SET_ARP_TARGET_IP_ADDR(pARPRspPkt, pIPAddress); RTW_INFO("%s Target Mac Addr:" MAC_FMT "\n", __FUNCTION__, MAC_ARG(get_my_bssid(&(pmlmeinfo->network)))); @@ -7591,12 +8777,6 @@ static void rtw_hal_construct_remote_control_info(_adapter *adapter, } } -/*#define DBG_RSVD_PAGE_CFG*/ -#ifdef DBG_RSVD_PAGE_CFG -#define RSVD_PAGE_CFG(ops, v1, v2, v3) \ - RTW_INFO("=== [RSVD][%s]-NeedPage:%d, TotalPageNum:%d TotalPacketLen:%d ===\n", \ - ops, v1, v2, v3) -#endif void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, u8 tx_desc, u32 page_size, u8 *page_num, u32 *total_pkt_len, RSVDPAGE_LOC *rsvd_page_loc) @@ -7644,9 +8824,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, *page_num += CurtPktPageNum; index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-ARPRsp", CurtPktPageNum, *page_num, 0); - #endif #ifdef CONFIG_IPV6 /* 2 NS offload and NDP Info*/ @@ -7663,9 +8841,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, page_size); *page_num += CurtPktPageNum; index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-NbrAdv", CurtPktPageNum, *page_num, 0); - #endif rsvd_page_loc->LocNDPInfo = *page_num; RTW_INFO("LocNDPInfo: %d\n", @@ -7678,9 +8854,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, (u8)PageNum(tx_desc + ns_len, page_size); *page_num += CurtPktPageNum; index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-NDPInfo", CurtPktPageNum, *page_num, 0); - #endif } #endif /*CONFIG_IPV6*/ @@ -7693,9 +8867,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, CurtPktPageNum = (u8)PageNum(rc_len, page_size); *page_num += CurtPktPageNum; *total_pkt_len = index + rc_len; - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-RCI", CurtPktPageNum, *page_num, *total_pkt_len); - #endif #ifdef CONFIG_GTK_OL index += (CurtPktPageNum * page_size); @@ -7763,9 +8935,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, *page_num += CurtPktPageNum; index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-GTKInfo", CurtPktPageNum, *page_num, 0); - #endif /* 3 GTK Response */ rsvd_page_loc->LocGTKRsp = *page_num; @@ -7796,9 +8966,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, *page_num += CurtPktPageNum; index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-GTKRsp", CurtPktPageNum, *page_num, 0); - #endif /* below page is empty for GTK extension memory */ /* 3(11) GTK EXT MEM */ @@ -7812,9 +8980,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, *page_num += CurtPktPageNum; /* extension memory for FW */ *total_pkt_len = index + (page_size * CurtPktPageNum); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-GTKEXTMEM", CurtPktPageNum, *page_num, *total_pkt_len); - #endif #endif /* CONFIG_GTK_OL */ index += (CurtPktPageNum * page_size); @@ -7824,9 +8990,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, RTW_INFO("LocAOACReport: %d\n", rsvd_page_loc->LocAOACReport); *page_num += 1; *total_pkt_len = index + (page_size * 1); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-AOAC", 1, *page_num, *total_pkt_len); - #endif } else { #ifdef CONFIG_PNO_SUPPORT if (pwrctl->wowlan_in_resume == _FALSE && @@ -7854,9 +9018,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, *page_num += CurtPktPageNum; index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-ProbeReq", CurtPktPageNum, *page_num, 0); - #endif /* Hidden SSID Probe Request */ ssid_num = pwrctl->pnlo_info->hidden_ssid_num; @@ -7881,9 +9043,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, *page_num += CurtPktPageNum; index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-ProbeReq", CurtPktPageNum, *page_num, 0); - #endif } /* PNO INFO Page */ @@ -7896,9 +9056,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, CurtPktPageNum = (u8)PageNum(PNOLength, page_size); *page_num += CurtPktPageNum; index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-PNOInfo", CurtPktPageNum, *page_num, 0); - #endif /* Scan Info Page */ rsvd_page_loc->LocScanInfo = *page_num; @@ -7911,9 +9069,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, *page_num += CurtPktPageNum; *total_pkt_len = index + ScanInfoLength; index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-ScanInfo", CurtPktPageNum, *page_num, *total_pkt_len); - #endif } #endif /* CONFIG_PNO_SUPPORT */ } @@ -7963,20 +9119,6 @@ static void rtw_hal_gate_bb(_adapter *adapter, bool stop) } } -static void rtw_hal_reset_mac_rx(_adapter *adapter) -{ - u8 val8 = 0; - /* Set REG_CR bit1, bit3, bit7 to 0*/ - val8 = rtw_read8(adapter, REG_CR); - val8 &= 0x75; - rtw_write8(adapter, REG_CR, val8); - val8 = rtw_read8(adapter, REG_CR); - /* Set REG_CR bit1, bit3, bit7 to 1*/ - val8 |= 0x8a; - rtw_write8(adapter, REG_CR, val8); - RTW_INFO("0x%04x: %02x\n", REG_CR, rtw_read8(adapter, REG_CR)); -} - static u8 rtw_hal_wow_pattern_generate(_adapter *adapter, u8 idx, struct rtl_wow_pattern *pwow_pattern) { struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); @@ -8082,6 +9224,19 @@ static u8 rtw_hal_wow_pattern_generate(_adapter *adapter, u8 idx, struct rtl_wow } #ifndef CONFIG_WOW_PATTERN_HW_CAM +static void rtw_hal_reset_mac_rx(_adapter *adapter) +{ + u8 val8 = 0; + /* Set REG_CR bit1, bit3, bit7 to 0*/ + val8 = rtw_read8(adapter, REG_CR); + val8 &= 0x75; + rtw_write8(adapter, REG_CR, val8); + val8 = rtw_read8(adapter, REG_CR); + /* Set REG_CR bit1, bit3, bit7 to 1*/ + val8 |= 0x8a; + rtw_write8(adapter, REG_CR, val8); + RTW_INFO("0x%04x: %02x\n", REG_CR, rtw_read8(adapter, REG_CR)); +} static void rtw_hal_set_wow_rxff_boundary(_adapter *adapter, bool wow_mode) { u8 val8 = 0; @@ -8322,6 +9477,7 @@ void rtw_clean_pattern(_adapter *adapter) rtw_write8(adapter, REG_WKFMCAM_NUM, 0); } +#if 0 static int rtw_hal_set_pattern(_adapter *adapter, u8 *pattern, u8 len, u8 *mask, u8 idx) { @@ -8435,6 +9591,8 @@ static int rtw_hal_set_pattern(_adapter *adapter, u8 *pattern, return res; } +#endif + void rtw_fill_pattern(_adapter *adapter) { int i = 0, total = 0, index; @@ -8733,6 +9891,7 @@ static void rtw_hal_dl_pattern(_adapter *adapter, u8 mode) static void rtw_hal_wow_enable(_adapter *adapter) { + struct registry_priv *registry_par = &adapter->registrypriv; struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); struct security_priv *psecuritypriv = &adapter->securitypriv; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; @@ -8741,9 +9900,19 @@ static void rtw_hal_wow_enable(_adapter *adapter) PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); int res; u16 media_status_rpt; + u8 no_wake = 0; + +#ifdef CONFIG_LPS_PG + u8 lps_pg_hdl_id = 0; +#endif - RTW_PRINT("%s, WOWLAN_ENABLE\n", __func__); + + if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && + !check_fwstate(pmlmepriv, _FW_LINKED)) + no_wake = 1; + + RTW_PRINT(FUNC_ADPT_FMT " WOWLAN_ENABLE\n", FUNC_ADPT_ARG(adapter)); rtw_hal_gate_bb(adapter, _TRUE); #ifdef CONFIG_GTK_OL if (psecuritypriv->binstallKCK_KEK == _TRUE) @@ -8753,7 +9922,10 @@ static void rtw_hal_wow_enable(_adapter *adapter) rtw_hal_backup_rate(adapter); rtw_hal_fw_dl(adapter, _TRUE); - media_status_rpt = RT_MEDIA_CONNECT; + if(no_wake) + media_status_rpt = RT_MEDIA_DISCONNECT; + else + media_status_rpt = RT_MEDIA_CONNECT; rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)&media_status_rpt); @@ -8773,17 +9945,20 @@ static void rtw_hal_wow_enable(_adapter *adapter) #endif /* redownload wow pattern */ - rtw_hal_dl_pattern(adapter, 1); + if(!no_wake) + rtw_hal_dl_pattern(adapter, 1); if (!pwrctl->wowlan_pno_enable) { psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv)); if (psta != NULL) { #ifdef CONFIG_FW_MULTI_PORT_SUPPORT + adapter_to_dvobj(adapter)->dft.port_id = 0xFF; + adapter_to_dvobj(adapter)->dft.mac_id = 0xFF; rtw_hal_set_default_port_id_cmd(adapter, psta->cmn.mac_id); #endif - - rtw_sta_media_status_rpt(adapter, psta, 1); + if(!no_wake) + rtw_sta_media_status_rpt(adapter, psta, 1); } } @@ -8814,6 +9989,14 @@ static void rtw_hal_wow_enable(_adapter *adapter) dump_sec_cam(RTW_DBGDUMP, adapter); dump_sec_cam_cache(RTW_DBGDUMP, adapter); #endif + +#ifdef CONFIG_LPS_PG + if (pwrctl->lps_level == LPS_PG) { + lps_pg_hdl_id = LPS_PG_INFO_CFG; + rtw_hal_set_hwreg(adapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id)); + } +#endif + #ifdef CONFIG_USB_HCI /* free adapter's resource */ rtw_mi_intf_stop(adapter); @@ -8822,7 +10005,8 @@ static void rtw_hal_wow_enable(_adapter *adapter) #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) /* Invoid SE0 reset signal during suspending*/ rtw_write8(adapter, REG_RSV_CTRL, 0x20); - if (IS_8188F(pHalData->version_id) == FALSE) + if (IS_8188F(pHalData->version_id) == FALSE + && IS_8188GTV(pHalData->version_id) == FALSE) rtw_write8(adapter, REG_RSV_CTRL, 0x60); #endif @@ -8887,12 +10071,18 @@ static void rtw_hal_wow_disable(_adapter *adapter) struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct hal_ops *pHalFunc = &adapter->hal_func; struct sta_info *psta = NULL; + struct registry_priv *registry_par = &adapter->registrypriv; int res; u16 media_status_rpt; u8 val8; RTW_PRINT("%s, WOWLAN_DISABLE\n", __func__); - + + if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && !check_fwstate(pmlmepriv, _FW_LINKED)) { + RTW_INFO("FW_IPS_DISABLE_BBRF resume\n"); + return; + } + if (!pwrctl->wowlan_pno_enable) { psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv)); if (psta != NULL) @@ -8945,8 +10135,8 @@ static void rtw_hal_wow_disable(_adapter *adapter) rtw_hal_enable_tx_report(adapter); #endif - if ((pwrctl->wowlan_wake_reason != RX_DISASSOC) || - (pwrctl->wowlan_wake_reason != RX_DEAUTH) || + if ((pwrctl->wowlan_wake_reason != RX_DISASSOC) && + (pwrctl->wowlan_wake_reason != RX_DEAUTH) && (pwrctl->wowlan_wake_reason != FW_DECISION_DISCONNECT)) { rtw_hal_get_aoac_rpt(adapter); rtw_hal_update_sw_security_info(adapter); @@ -8956,6 +10146,9 @@ static void rtw_hal_wow_disable(_adapter *adapter) #ifdef CONFIG_GPIO_WAKEUP +#ifdef CONFIG_RTW_ONE_PIN_GPIO + rtw_hal_set_input_gpio(adapter, WAKEUP_GPIO_IDX); +#else #ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE if (pwrctl->is_high_active == 0) rtw_hal_set_input_gpio(adapter, WAKEUP_GPIO_IDX); @@ -8968,7 +10161,7 @@ static void rtw_hal_wow_disable(_adapter *adapter) rtw_hal_set_output_gpio(adapter, WAKEUP_GPIO_IDX, val8); rtw_hal_switch_gpio_wl_ctrl(adapter, WAKEUP_GPIO_IDX, _FALSE); #endif - +#endif /* CONFIG_RTW_ONE_PIN_GPIO */ #endif if ((pwrctl->wowlan_wake_reason != FW_DECISION_DISCONNECT) && (pwrctl->wowlan_wake_reason != RX_PAIRWISEKEY) && @@ -8981,6 +10174,8 @@ static void rtw_hal_wow_disable(_adapter *adapter) if (psta != NULL) { #ifdef CONFIG_FW_MULTI_PORT_SUPPORT + adapter_to_dvobj(adapter)->dft.port_id = 0xFF; + adapter_to_dvobj(adapter)->dft.mac_id = 0xFF; rtw_hal_set_default_port_id_cmd(adapter, psta->cmn.mac_id); #endif rtw_sta_media_status_rpt(adapter, psta, 1); @@ -9015,9 +10210,7 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, *page_num += CurtPktPageNum; index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-P2P-Beacon", CurtPktPageNum, *page_num, 0); - #endif /* P2P Probe rsp */ rsvd_page_loc->LocP2PProbeRsp = *page_num; @@ -9034,9 +10227,7 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, *page_num += CurtPktPageNum; index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-P2P-ProbeRsp", CurtPktPageNum, *page_num, 0); - #endif /* P2P nego rsp */ rsvd_page_loc->LocNegoRsp = *page_num; @@ -9053,9 +10244,7 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, *page_num += CurtPktPageNum; index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-P2P-NegoRsp", CurtPktPageNum, *page_num, 0); - #endif /* P2P invite rsp */ rsvd_page_loc->LocInviteRsp = *page_num; @@ -9072,9 +10261,7 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, *page_num += CurtPktPageNum; index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-P2P-InviteRsp", CurtPktPageNum, *page_num, 0); - #endif /* P2P provision discovery rsp */ rsvd_page_loc->LocPDRsp = *page_num; @@ -9092,9 +10279,7 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, *page_num += CurtPktPageNum; *total_pkt_len = index + P2PPDRspLength; - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("WOW-P2P-PDR", CurtPktPageNum, *page_num, *total_pkt_len); - #endif index += (CurtPktPageNum * page_size); @@ -9103,104 +10288,318 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, #endif /* CONFIG_P2P_WOWLAN */ #ifdef CONFIG_LPS_PG +#ifndef DBG_LPSPG_INFO_DUMP +#define DBG_LPSPG_INFO_DUMP 1 +#endif + #include "hal_halmac.h" -#define DBG_LPSPG_SEC_DUMP -#define LPS_PG_INFO_RSVD_LEN 16 -#define LPS_PG_INFO_RSVD_PAGE_NUM 1 - -#define DBG_LPSPG_INFO_DUMP -static void rtw_hal_set_lps_pg_info_rsvd_page(_adapter *adapter) +#ifdef CONFIG_RTL8822C +static int rtw_lps_pg_set_dpk_info_rsvd_page(_adapter *adapter) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); - struct sta_info *psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(&adapter->mlmepriv)); struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); - PHAL_DATA_TYPE phal_data = GET_HAL_DATA(adapter); - u8 lps_pg_info[LPS_PG_INFO_RSVD_LEN] = {0}; + struct dm_struct *dm = adapter_to_phydm(adapter); + struct rsvd_page_cache_t *cache = &pwrpriv->lpspg_dpk_info; + u8 *info = NULL; + u32 info_len; + int ret = _FAIL; + + /* get length */ + halrf_dpk_info_rsvd_page(dm, NULL, &info_len); + if (!info_len) { + RTW_ERR("get %s length fail\n", cache->name); + goto exit; + } + + /* allocate buf */ + info = rtw_zmalloc(info_len); + if (!info) { + RTW_ERR("alloc %s buffer fail(len=%d)\n", cache->name, info_len); + goto exit; + } + + /* get content */ + halrf_dpk_info_rsvd_page(dm, info, NULL); + + if (rsvd_page_cache_update_data(cache, info, info_len)) { + + #if (DBG_LPSPG_INFO_DUMP >= 1) + RTW_INFO_DUMP(cache->name, info, info_len); + #endif + + ret = rtw_halmac_download_rsvd_page(dvobj, cache->loc, info, info_len); + ret = !ret ? _SUCCESS : _FAIL; + if (ret != _SUCCESS) { + RTW_ERR("download %s rsvd page to offset:%u fail\n", cache->name, cache->loc); + goto free_mem; + } + + #if (DBG_LPSPG_INFO_DUMP >= 2) + RTW_INFO("get %s from rsvd page offset:%d\n", cache->name, cache->loc); + rtw_dump_rsvd_page(RTW_DBGDUMP, adapter, cache->loc, cache->page_num); + #endif + } + +free_mem: + rtw_mfree(info, info_len); + +exit: + return ret; +} + +static int rtw_lps_pg_set_iqk_info_rsvd_page(_adapter *adapter) +{ + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct dm_struct *dm = adapter_to_phydm(adapter); + struct rsvd_page_cache_t *cache = &pwrpriv->lpspg_iqk_info; + u8 *info = NULL; + u32 info_len = 0; + int ret = _FAIL; + + if (hal_data->RegIQKFWOffload) { + rsvd_page_cache_free_data(cache); + ret = _SUCCESS; + goto exit; + } + + /* get length */ + odm_iqk_get_cfir2fw_8822c(dm, NULL, &info_len); + if (!info_len) { + RTW_ERR("get %s length fail\n", cache->name); + goto exit; + } + + /* allocate buf */ + info = rtw_zmalloc(info_len); + if (!info) { + RTW_ERR("alloc %s buffer fail(len=%d)\n", cache->name, info_len); + goto exit; + } + + /* get content */ + odm_iqk_get_cfir2fw_8822c(dm, info, NULL); + + if (rsvd_page_cache_update_data(cache, info, info_len)) { + + #if (DBG_LPSPG_INFO_DUMP >= 1) + RTW_INFO_DUMP(cache->name, info, info_len); + #endif + + ret = rtw_halmac_download_rsvd_page(dvobj, cache->loc, info, info_len); + ret = !ret ? _SUCCESS : _FAIL; + if (ret != _SUCCESS) { + RTW_ERR("download %s rsvd page to offset:%u fail\n", cache->name, cache->loc); + goto free_mem; + } + + #if (DBG_LPSPG_INFO_DUMP >= 2) + RTW_INFO("get %s from rsvd page offset:%d\n", cache->name, cache->loc); + rtw_dump_rsvd_page(RTW_DBGDUMP, adapter, cache->loc, cache->page_num); + #endif + } + +free_mem: + rtw_mfree(info, info_len); + +exit: + return ret; +} +#endif /* CONFIG_RTL8822C */ + +static void rtw_hal_build_lps_pg_info_rsvd_page(_adapter *adapter, u8 *buf, u32 *buf_size) +{ +#define LPS_PG_INFO_RSVD_LEN 16 + + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); + struct sta_info *psta; #ifdef CONFIG_MBSSID_CAM u8 cam_id = INVALID_CAM_ID; #endif - u8 *psec_cam_id = lps_pg_info + 8; + u8 *psec_cam_id = buf + 8; u8 sec_cam_num = 0; u8 drv_rsvdpage_num = 0; - if (!psta) { - RTW_ERR("%s [ERROR] sta is NULL\n", __func__); - rtw_warn_on(1); - return; - } + if (buf) { + psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(&adapter->mlmepriv)); + if (!psta) { + RTW_ERR("%s [ERROR] sta is NULL\n", __func__); + rtw_warn_on(1); + return; + } - /*Byte 0 - used macid*/ - LPSPG_RSVD_PAGE_SET_MACID(lps_pg_info, psta->cmn.mac_id); - RTW_INFO("[LPSPG-INFO] mac_id:%d\n", psta->cmn.mac_id); + /*Byte 0 - used macid*/ + LPSPG_RSVD_PAGE_SET_MACID(buf, psta->cmn.mac_id); + RTW_INFO("[LPSPG-INFO] mac_id:%d\n", psta->cmn.mac_id); #ifdef CONFIG_MBSSID_CAM - /*Byte 1 - used BSSID CAM entry*/ - cam_id = rtw_mbid_cam_search_by_ifaceid(adapter, adapter->iface_id); - if (cam_id != INVALID_CAM_ID) - LPSPG_RSVD_PAGE_SET_MBSSCAMID(lps_pg_info, cam_id); - RTW_INFO("[LPSPG-INFO] mbss_cam_id:%d\n", cam_id); + /*Byte 1 - used BSSID CAM entry*/ + cam_id = rtw_mbid_cam_search_by_ifaceid(adapter, adapter->iface_id); + if (cam_id != INVALID_CAM_ID) + LPSPG_RSVD_PAGE_SET_MBSSCAMID(buf, cam_id); + RTW_INFO("[LPSPG-INFO] mbss_cam_id:%d\n", cam_id); #endif #ifdef CONFIG_WOWLAN /*&& pattern match cam used*/ - /*Btye 2 - Max used Pattern Match CAM entry*/ - if (pwrpriv->wowlan_mode == _TRUE && - check_fwstate(&adapter->mlmepriv, _FW_LINKED) == _TRUE) { - LPSPG_RSVD_PAGE_SET_PMC_NUM(lps_pg_info, pwrpriv->wowlan_pattern_idx); - RTW_INFO("[LPSPG-INFO] Max Pattern Match CAM entry :%d\n", pwrpriv->wowlan_pattern_idx); - } + /*Btye 2 - Max used Pattern Match CAM entry*/ + if (pwrpriv->wowlan_mode == _TRUE && + check_fwstate(&adapter->mlmepriv, _FW_LINKED) == _TRUE) { + LPSPG_RSVD_PAGE_SET_PMC_NUM(buf, pwrpriv->wowlan_pattern_idx); + RTW_INFO("[LPSPG-INFO] Max Pattern Match CAM entry :%d\n", pwrpriv->wowlan_pattern_idx); + } #endif #ifdef CONFIG_BEAMFORMING /*&& MU BF*/ - /*Btye 3 - Max MU rate table Group ID*/ - LPSPG_RSVD_PAGE_SET_MU_RAID_GID(lps_pg_info, 0); - RTW_INFO("[LPSPG-INFO] Max MU rate table Group ID :%d\n", 0); + /*Btye 3 - Max MU rate table Group ID*/ + LPSPG_RSVD_PAGE_SET_MU_RAID_GID(buf, 0); + RTW_INFO("[LPSPG-INFO] Max MU rate table Group ID :%d\n", 0); #endif - /*Btye 8 ~15 - used Security CAM entry */ - sec_cam_num = rtw_get_sec_camid(adapter, 8, psec_cam_id); + /*Btye 8 ~15 - used Security CAM entry */ + sec_cam_num = rtw_get_sec_camid(adapter, 8, psec_cam_id); - /*Btye 4 - used Security CAM entry number*/ - if (sec_cam_num < 8) - LPSPG_RSVD_PAGE_SET_SEC_CAM_NUM(lps_pg_info, sec_cam_num); - RTW_INFO("[LPSPG-INFO] Security CAM entry number :%d\n", sec_cam_num); + /*Btye 4 - used Security CAM entry number*/ + if (sec_cam_num < 8) + LPSPG_RSVD_PAGE_SET_SEC_CAM_NUM(buf, sec_cam_num); + RTW_INFO("[LPSPG-INFO] Security CAM entry number :%d\n", sec_cam_num); - /*Btye 5 - Txbuf used page number for fw offload*/ - if (pwrpriv->wowlan_mode == _TRUE || pwrpriv->wowlan_ap_mode == _TRUE) - drv_rsvdpage_num = rtw_hal_get_txbuff_rsvd_page_num(adapter, _TRUE); - else - drv_rsvdpage_num = rtw_hal_get_txbuff_rsvd_page_num(adapter, _FALSE); - LPSPG_RSVD_PAGE_SET_DRV_RSVDPAGE_NUM(lps_pg_info, drv_rsvdpage_num); - RTW_INFO("[LPSPG-INFO] DRV's rsvd page numbers :%d\n", drv_rsvdpage_num); + /*Btye 5 - Txbuf used page number for fw offload*/ + if (pwrpriv->wowlan_mode == _TRUE || pwrpriv->wowlan_ap_mode == _TRUE) + drv_rsvdpage_num = rtw_hal_get_txbuff_rsvd_page_num(adapter, _TRUE); + else + drv_rsvdpage_num = rtw_hal_get_txbuff_rsvd_page_num(adapter, _FALSE); + LPSPG_RSVD_PAGE_SET_DRV_RSVDPAGE_NUM(buf, drv_rsvdpage_num); + RTW_INFO("[LPSPG-INFO] DRV's rsvd page numbers :%d\n", drv_rsvdpage_num); + } -#ifdef DBG_LPSPG_SEC_DUMP - { - int i; + if (buf_size) + *buf_size = LPS_PG_INFO_RSVD_LEN; +} - for (i = 0; i < sec_cam_num; i++) - RTW_INFO("%d = sec_cam_id:%d\n", i, psec_cam_id[i]); +static int rtw_hal_set_lps_pg_info_rsvd_page(_adapter *adapter) +{ + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct rsvd_page_cache_t *cache = &pwrpriv->lpspg_info; + u8 *info = NULL; + u32 info_len = 0; + int ret = _FAIL; + + /* get length */ + rtw_hal_build_lps_pg_info_rsvd_page(adapter, NULL, &info_len); + if (!info_len) { + RTW_ERR("get %s length fail\n", cache->name); + goto exit; + } + + /* allocate buf */ + info = rtw_zmalloc(info_len); + if (!info) { + RTW_ERR("alloc %s buffer fail(len=%d)\n", cache->name, info_len); + goto exit; + } + + /* get content */ + rtw_hal_build_lps_pg_info_rsvd_page(adapter, info, NULL); + + if (rsvd_page_cache_update_data(cache, info, info_len)) { + + #if (DBG_LPSPG_INFO_DUMP >= 1) + RTW_INFO_DUMP(cache->name, info, info_len); + #endif + + ret = rtw_halmac_download_rsvd_page(dvobj, cache->loc, info, info_len); + ret = !ret ? _SUCCESS : _FAIL; + if (ret != _SUCCESS) { + RTW_ERR("download %s rsvd page to offset:%u fail\n", cache->name, cache->loc); + goto free_mem; + } + + #if (DBG_LPSPG_INFO_DUMP >= 2) + RTW_INFO("get %s from rsvd page offset:%d\n", cache->name, cache->loc); + rtw_dump_rsvd_page(RTW_DBGDUMP, adapter, cache->loc, cache->page_num); + #endif + } + +free_mem: + rtw_mfree(info, info_len); + +exit: + return ret; +} + +static void rtw_lps_pg_set_rsvd_page(_adapter *adapter, u8 *frame, u16 *index + , u8 txdesc_size, u32 page_size, u8 *total_page_num, bool is_wow_mode, bool only_get_page_num) +{ + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); + struct rsvd_page_cache_t *cache; + u8 *pos; + u32 len; + + /* lps_level will not change when enter wow_mode */ + if (is_wow_mode && pwrctl->lps_level != LPS_PG) + return; + + pos = only_get_page_num ? NULL : frame + *index; + +#ifdef CONFIG_RTL8822C + if (IS_8822C_SERIES(hal_data->version_id)) { + /* LPSPG_DPK_INFO */ + cache = &pwrctl->lpspg_dpk_info; + if (pwrctl->lps_level != LPS_PG) + pos = NULL; + halrf_dpk_info_rsvd_page(adapter_to_phydm(adapter), pos, &len); + if (pos) { + #if (DBG_LPSPG_INFO_DUMP >= 1) + RTW_INFO_DUMP(cache->name, pos, len); + #endif + } + rsvd_page_cache_update_all(cache, *total_page_num, txdesc_size, page_size, pos, len); + *total_page_num += cache->page_num; + *index += page_size * cache->page_num; + pos = only_get_page_num ? NULL : frame + *index; + RSVD_PAGE_CFG(cache->name, cache->page_num, *total_page_num, *index); + + /* LPSPG_IQK_INFO */ + cache = &pwrctl->lpspg_iqk_info; + if (!(is_wow_mode && hal_data->RegIQKFWOffload)) { /* RegIQKFWOffload will not change when enter wow_mode */ + if (pwrctl->lps_level != LPS_PG || hal_data->RegIQKFWOffload) + pos = NULL; + odm_iqk_get_cfir2fw_8822c(adapter_to_phydm(adapter), pos, &len); + if (pos) { + #if (DBG_LPSPG_INFO_DUMP >= 1) + RTW_INFO_DUMP(cache->name, pos, len); + #endif + } + rsvd_page_cache_update_all(cache, *total_page_num, txdesc_size, page_size, pos, len); + *total_page_num += cache->page_num; + *index += page_size * cache->page_num; + pos = only_get_page_num ? NULL : frame + *index; + RSVD_PAGE_CFG(cache->name, cache->page_num, *total_page_num, *index); + } else + rsvd_page_cache_free_data(cache); } #endif -#ifdef DBG_LPSPG_INFO_DUMP - RTW_INFO("==== DBG_LPSPG_INFO_RSVD_PAGE_DUMP====\n"); - RTW_INFO(" %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n", - *(lps_pg_info), *(lps_pg_info + 1), *(lps_pg_info + 2), *(lps_pg_info + 3), - *(lps_pg_info + 4), *(lps_pg_info + 5), *(lps_pg_info + 6), *(lps_pg_info + 7)); - RTW_INFO(" %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n", - *(lps_pg_info + 8), *(lps_pg_info + 9), *(lps_pg_info + 10), *(lps_pg_info + 11), - *(lps_pg_info + 12), *(lps_pg_info + 13), *(lps_pg_info + 14), *(lps_pg_info + 15)); - RTW_INFO("==== DBG_LPSPG_INFO_RSVD_PAGE_DUMP====\n"); -#endif - - rtw_halmac_download_rsvd_page(dvobj, pwrpriv->lpspg_rsvd_page_locate, lps_pg_info, LPS_PG_INFO_RSVD_LEN); - -#ifdef DBG_LPSPG_INFO_DUMP - RTW_INFO("Get LPS-PG INFO from rsvd page_offset:%d\n", pwrpriv->lpspg_rsvd_page_locate); - rtw_dump_rsvd_page(RTW_DBGDUMP, adapter, pwrpriv->lpspg_rsvd_page_locate, 1); -#endif + /* LPSPG_INFO */ + cache = &pwrctl->lpspg_info; + if (pwrctl->lps_level != LPS_PG) + pos = NULL; + rtw_hal_build_lps_pg_info_rsvd_page(adapter, pos, &len); + if (pos) { + #if (DBG_LPSPG_INFO_DUMP >= 1) + RTW_INFO_DUMP(cache->name, pos, len); + #endif + } + rsvd_page_cache_update_all(cache, *total_page_num, txdesc_size, page_size, pos, len); + *total_page_num += cache->page_num; + *index += page_size * cache->page_num; + pos = only_get_page_num ? NULL : frame + *index; + RSVD_PAGE_CFG(cache->name, cache->page_num, *total_page_num, *index); } - static u8 rtw_hal_set_lps_pg_info_cmd(_adapter *adapter) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); @@ -9209,10 +10608,9 @@ static u8 rtw_hal_set_lps_pg_info_cmd(_adapter *adapter) u8 lpspg_info[H2C_LPS_PG_INFO_LEN] = {0}; u8 ret = _FAIL; - RTW_INFO("%s: loc_lpspg_info:%d\n", __func__, pwrpriv->lpspg_rsvd_page_locate); - if (_NO_PRIVACY_ != adapter->securitypriv.dot11PrivacyAlgrthm) SET_H2CCMD_LPSPG_SEC_CAM_EN(lpspg_info, 1); /*SecurityCAM_En*/ + #ifdef CONFIG_MBSSID_CAM SET_H2CCMD_LPSPG_MBID_CAM_EN(lpspg_info, 1); /*BSSIDCAM_En*/ #endif @@ -9237,13 +10635,16 @@ static u8 rtw_hal_set_lps_pg_info_cmd(_adapter *adapter) SET_H2CCMD_LPSPG_MU_RATE_TB_EN(lpspg_info, 1); /*MURateTable_En*/ #endif - SET_H2CCMD_LPSPG_LOC(lpspg_info, pwrpriv->lpspg_rsvd_page_locate); + SET_H2CCMD_LPSPG_LOC(lpspg_info, pwrpriv->lpspg_info.loc); -#ifdef DBG_LPSPG_INFO_DUMP - RTW_INFO("==== DBG_LPSPG_INFO_CMD_DUMP====\n"); - RTW_INFO(" H2C_CMD: 0x%02x, H2C_LEN: %d\n", H2C_LPS_PG_INFO, H2C_LPS_PG_INFO_LEN); - RTW_INFO(" %02X:%02X\n", *(lpspg_info), *(lpspg_info + 1)); - RTW_INFO("==== DBG_LPSPG_INFO_CMD_DUMP====\n"); +#ifdef CONFIG_RTL8822C + SET_H2CCMD_LPSPG_DPK_INFO_LOC(lpspg_info, pwrpriv->lpspg_dpk_info.loc); + if (!GET_HAL_DATA(adapter)->RegIQKFWOffload) + SET_H2CCMD_LPSPG_IQK_INFO_LOC(lpspg_info, pwrpriv->lpspg_iqk_info.loc); +#endif + +#if (DBG_LPSPG_INFO_DUMP >= 1) + RTW_INFO_DUMP("H2C_LPS_PG_INFO: ", lpspg_info, H2C_LPS_PG_INFO_LEN); #endif ret = rtw_hal_fill_h2c_cmd(adapter, @@ -9257,16 +10658,17 @@ u8 rtw_hal_set_lps_pg_info(_adapter *adapter) u8 ret = _FAIL; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); - if (pwrpriv->lpspg_rsvd_page_locate == 0) { - RTW_ERR("%s [ERROR] lpspg_rsvd_page_locate = 0\n", __func__); + if (pwrpriv->lpspg_info.loc == 0) { + RTW_ERR("%s lpspg_info.loc = 0\n", __func__); rtw_warn_on(1); return ret; } + rtw_lps_pg_set_dpk_info_rsvd_page(adapter); + rtw_lps_pg_set_iqk_info_rsvd_page(adapter); rtw_hal_set_lps_pg_info_rsvd_page(adapter); + ret = rtw_hal_set_lps_pg_info_cmd(adapter); - if (_SUCCESS == ret) - pwrpriv->blpspg_info_up = _FALSE; return ret; } @@ -9289,35 +10691,43 @@ void rtw_hal_lps_pg_rssi_lv_decide(_adapter *adapter, struct sta_info *sta) void rtw_hal_lps_pg_handler(_adapter *adapter, enum lps_pg_hdl_id hdl_id) { + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct sta_priv *pstapriv = &adapter->stapriv; + struct sta_info *sta; + + sta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress); + switch (hdl_id) { case LPS_PG_INFO_CFG: rtw_hal_set_lps_pg_info(adapter); break; case LPS_PG_REDLEMEM: - { - /*set xmit_block*/ - rtw_set_xmit_block(adapter, XMIT_BLOCK_REDLMEM); - if (_FAIL == rtw_hal_fw_mem_dl(adapter, FW_EMEM)) - rtw_warn_on(1); - /*clearn xmit_block*/ - rtw_clr_xmit_block(adapter, XMIT_BLOCK_REDLMEM); - } + if (IS_8822C_SERIES(GET_HAL_DATA(adapter)->version_id)) + break; + + /*set xmit_block*/ + rtw_set_xmit_block(adapter, XMIT_BLOCK_REDLMEM); + if (_FAIL == rtw_hal_fw_mem_dl(adapter, FW_EMEM)) + rtw_warn_on(1); + /*clearn xmit_block*/ + rtw_clr_xmit_block(adapter, XMIT_BLOCK_REDLMEM); break; + case LPS_PG_PHYDM_DIS:/*Disable RA and PT by H2C*/ + if (IS_8822C_SERIES(GET_HAL_DATA(adapter)->version_id)) + break; - case LPS_PG_RESEND_H2C: - { - struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl; - struct sta_info *sta; - int i; + if (sta) + rtw_phydm_lps_pg_hdl(adapter, sta, _TRUE); + break; + case LPS_PG_PHYDM_EN:/*Enable RA and PT by H2C*/ + if (IS_8822C_SERIES(GET_HAL_DATA(adapter)->version_id)) + break; - for (i = 0; i < MACID_NUM_SW_LIMIT; i++) { - sta = macid_ctl->sta[i]; - if (sta && !is_broadcast_mac_addr(sta->cmn.mac_addr)) { - rtw_hal_lps_pg_rssi_lv_decide(adapter, sta); - set_sta_rate(adapter, sta); - sta->lps_pg_rssi_lv = 0; - } - } + if (sta) { + rtw_hal_lps_pg_rssi_lv_decide(adapter, sta); + rtw_phydm_lps_pg_hdl(adapter, sta, _FALSE); + sta->lps_pg_rssi_lv = 0; } break; @@ -9328,6 +10738,74 @@ void rtw_hal_lps_pg_handler(_adapter *adapter, enum lps_pg_hdl_id hdl_id) #endif /*CONFIG_LPS_PG*/ +static u8 _rtw_mi_assoc_if_num(_adapter *adapter) +{ + u8 mi_iface_num = 0; + + if (0) { + RTW_INFO("[IFS_ASSOC_STATUS] - STA :%d", DEV_STA_LD_NUM(adapter_to_dvobj(adapter))); + RTW_INFO("[IFS_ASSOC_STATUS] - AP:%d", DEV_AP_NUM(adapter_to_dvobj(adapter))); + RTW_INFO("[IFS_ASSOC_STATUS] - AP starting :%d", DEV_AP_STARTING_NUM(adapter_to_dvobj(adapter))); + RTW_INFO("[IFS_ASSOC_STATUS] - MESH :%d", DEV_MESH_NUM(adapter_to_dvobj(adapter))); + RTW_INFO("[IFS_ASSOC_STATUS] - ADHOC :%d", DEV_ADHOC_NUM(adapter_to_dvobj(adapter))); + /*RTW_INFO("[IFS_ASSOC_STATUS] - P2P-GC :%d", DEV_P2P_GC_NUM(adapter_to_dvobj(adapter)));*/ + /*RTW_INFO("[IFS_ASSOC_STATUS] - P2P-GO :%d", DEV_P2P_GO_NUM(adapter_to_dvobj(adapter)));*/ + } + + mi_iface_num = (DEV_STA_LD_NUM(adapter_to_dvobj(adapter)) + + DEV_AP_NUM(adapter_to_dvobj(adapter)) + + DEV_AP_STARTING_NUM(adapter_to_dvobj(adapter))); + return mi_iface_num; +} +#ifdef CONFIG_CONCURRENT_MODE +static _adapter *_rtw_search_sta_iface(_adapter *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + _adapter *iface = NULL; + _adapter *sta_iface = NULL; + int i; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (check_fwstate(&iface->mlmepriv, WIFI_STATION_STATE) == _TRUE) { + if (check_fwstate(&iface->mlmepriv, _FW_LINKED) == _TRUE) { + sta_iface = iface; + break; + } + } + } + return sta_iface; +} +#if defined(CONFIG_AP_MODE) && defined(CONFIG_BT_COEXIST) +static _adapter *_rtw_search_ap_iface(_adapter *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + _adapter *iface = NULL; + _adapter *ap_iface = NULL; + int i; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE) == _TRUE ) { + ap_iface = iface; + break; + } + } + return ap_iface; +} +#endif/*CONFIG_AP_MODE*/ +#endif/*CONFIG_CONCURRENT_MODE*/ + +#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA +void rtw_hal_set_pathb_phase(_adapter *adapter, u8 phase_idx) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); + struct PHY_DM_STRUCT *pDM_Odm = &pHalData->odmpriv; + + return phydm_pathb_q_matrix_rotate(pDM_Odm, phase_idx); +} +#endif + /* * Description: Fill the reserved packets that FW will use to RSVD page. * Now we just send 4 types packet to rsvd page. @@ -9356,8 +10834,6 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page struct xmit_frame *pcmdframe = NULL; struct pkt_attrib *pattrib; struct xmit_priv *pxmitpriv; - struct mlme_ext_priv *pmlmeext; - struct mlme_ext_info *pmlmeinfo; struct pwrctrl_priv *pwrctl; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct hal_ops *pHalFunc = &adapter->hal_func; @@ -9370,6 +10846,7 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page u16 BufIndex = 0; u32 TotalPacketLen = 0, MaxRsvdPageBufSize = 0, PageSize = 0; RSVDPAGE_LOC RsvdPageLoc; + struct registry_priv *registry_par = &adapter->registrypriv; #ifdef DBG_FW_DEBUG_MSG_PKT u32 fw_dbg_msg_pkt_len = 0; @@ -9382,23 +10859,34 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page #ifdef CONFIG_MCC_MODE u8 dl_mcc_page = _FAIL; #endif /* CONFIG_MCC_MODE */ + u8 nr_assoc_if; + + _adapter *sta_iface = NULL; + _adapter *ap_iface = NULL; + + bool is_wow_mode = _FALSE; pHalData = GET_HAL_DATA(adapter); #ifdef DBG_CONFIG_ERROR_DETECT psrtpriv = &pHalData->srestpriv; #endif pxmitpriv = &adapter->xmitpriv; - pmlmeext = &adapter->mlmeextpriv; - pmlmeinfo = &pmlmeext->mlmext_info; pwrctl = adapter_to_pwrctl(adapter); rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&PageSize); if (PageSize == 0) { - RTW_INFO("[Error]: %s, PageSize is zero!!\n", __func__); + RTW_ERR("[Error]: %s, PageSize is zero!!\n", __func__); return; } + nr_assoc_if = _rtw_mi_assoc_if_num(adapter); + if ((pwrctl->wowlan_mode == _TRUE && pwrctl->wowlan_in_resume == _FALSE) || + pwrctl->wowlan_ap_mode == _TRUE || + pwrctl->wowlan_p2p_mode == _TRUE) + is_wow_mode = _TRUE; + + /*page_num for init time to get rsvd page number*/ /* Prepare ReservedPagePacket */ if (page_num) { ReservedPagePacket = rtw_zmalloc(MAX_CMDBUF_SZ); @@ -9407,13 +10895,17 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page *page_num = 0xFF; return; } + RTW_INFO(FUNC_ADPT_FMT" Get [ %s ] RsvdPageNUm ==>\n", + FUNC_ADPT_ARG(adapter), (is_wow_mode) ? "WOW" : "NOR"); + } else { - if (pwrctl->wowlan_mode == _TRUE || pwrctl->wowlan_ap_mode == _TRUE) + if (is_wow_mode) RsvdPageNum = rtw_hal_get_txbuff_rsvd_page_num(adapter, _TRUE); else RsvdPageNum = rtw_hal_get_txbuff_rsvd_page_num(adapter, _FALSE); - RTW_INFO("%s PageSize: %d, RsvdPageNUm: %d\n", __func__, PageSize, RsvdPageNum); + RTW_INFO(FUNC_ADPT_FMT" PageSize: %d, [ %s ]-RsvdPageNUm: %d\n", + FUNC_ADPT_ARG(adapter), PageSize, (is_wow_mode) ? "WOW" : "NOR", RsvdPageNum); MaxRsvdPageBufSize = RsvdPageNum * PageSize; if (MaxRsvdPageBufSize > MAX_CMDBUF_SZ) { @@ -9434,8 +10926,9 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page _rtw_memset(&RsvdPageLoc, 0, sizeof(RSVDPAGE_LOC)); - /* beacon * 1 pages */ BufIndex = TxDescOffset; + + /*======== beacon content =======*/ rtw_hal_construct_beacon(adapter, &ReservedPagePacket[BufIndex], &BeaconLength); @@ -9443,23 +10936,30 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page * When we count the first page size, we need to reserve description size for the RSVD * packet, it will be filled in front of the packet in TXPKTBUF. */ + BeaconLength = MAX_BEACON_LEN - TxDescLen; CurtPktPageNum = (u8)PageNum((TxDescLen + BeaconLength), PageSize); +#ifdef CONFIG_FW_HANDLE_TXBCN + CurtPktPageNum = CurtPktPageNum * CONFIG_LIMITED_AP_NUM; +#endif TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum * PageSize); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("Beacon", CurtPktPageNum, TotalPageNum, TotalPacketLen); - #endif - if (pwrctl->wowlan_ap_mode == _TRUE) { + /*======== probe response content ========*/ + if (pwrctl->wowlan_ap_mode == _TRUE) {/*WOW mode*/ + #ifdef CONFIG_CONCURRENT_MODE + if (nr_assoc_if >= 2) + RTW_ERR("Not support > 2 net-interface in WOW\n"); + #endif /* (4) probe response*/ RsvdPageLoc.LocProbeRsp = TotalPageNum; rtw_hal_construct_ProbeRsp( adapter, &ReservedPagePacket[BufIndex], &ProbeRspLength, - get_my_bssid(&pmlmeinfo->network), _FALSE); + _FALSE); rtw_hal_fill_fake_txdesc(adapter, &ReservedPagePacket[BufIndex - TxDescLen], ProbeRspLength, _FALSE, _FALSE, _FALSE); @@ -9468,62 +10968,39 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page TotalPageNum += CurtPktPageNum; TotalPacketLen = BufIndex + ProbeRspLength; BufIndex += (CurtPktPageNum * PageSize); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("ProbeRsp", CurtPktPageNum, TotalPageNum, TotalPacketLen); - #endif goto download_page; } - /* ps-poll * 1 page */ - RsvdPageLoc.LocPsPoll = TotalPageNum; - RTW_INFO("LocPsPoll: %d\n", RsvdPageLoc.LocPsPoll); - rtw_hal_construct_PSPoll(adapter, - &ReservedPagePacket[BufIndex], &PSPollLength); - rtw_hal_fill_fake_txdesc(adapter, - &ReservedPagePacket[BufIndex - TxDescLen], - PSPollLength, _TRUE, _FALSE, _FALSE); - - CurtPktPageNum = (u8)PageNum((TxDescLen + PSPollLength), PageSize); - - TotalPageNum += CurtPktPageNum; - - BufIndex += (CurtPktPageNum * PageSize); - #ifdef DBG_RSVD_PAGE_CFG - RSVD_PAGE_CFG("PSPoll", CurtPktPageNum, TotalPageNum, TotalPacketLen); + /*======== ps-poll content * 1 page ========*/ + sta_iface = adapter; + #ifdef CONFIG_CONCURRENT_MODE + if (!MLME_IS_STA(sta_iface) && DEV_STA_LD_NUM(adapter_to_dvobj(sta_iface))) { + sta_iface = _rtw_search_sta_iface(adapter); + RTW_INFO("get ("ADPT_FMT") to create PS-Poll/Null/QosNull\n", ADPT_ARG(sta_iface)); + } #endif -#ifdef CONFIG_BT_COEXIST - if (pwrctl->wowlan_mode == _FALSE || - pwrctl->wowlan_in_resume == _TRUE) { - /* BT Qos null data * 1 page */ - RsvdPageLoc.LocBTQosNull = TotalPageNum; + if (MLME_IS_STA(sta_iface) || (nr_assoc_if == 0)) { + RsvdPageLoc.LocPsPoll = TotalPageNum; + RTW_INFO("LocPsPoll: %d\n", RsvdPageLoc.LocPsPoll); + rtw_hal_construct_PSPoll(sta_iface, + &ReservedPagePacket[BufIndex], &PSPollLength); + rtw_hal_fill_fake_txdesc(sta_iface, + &ReservedPagePacket[BufIndex - TxDescLen], + PSPollLength, _TRUE, _FALSE, _FALSE); - RTW_INFO("LocBTQosNull: %d\n", RsvdPageLoc.LocBTQosNull); - - rtw_hal_construct_NullFunctionData(adapter, - &ReservedPagePacket[BufIndex], - &BTQosNullLength, - get_my_bssid(&pmlmeinfo->network), - _TRUE, 0, 0, _FALSE); - - rtw_hal_fill_fake_txdesc(adapter, - &ReservedPagePacket[BufIndex - TxDescLen], - BTQosNullLength, _FALSE, _TRUE, _FALSE); - - CurtPktPageNum = (u8)PageNum(TxDescLen + BTQosNullLength, - PageSize); + CurtPktPageNum = (u8)PageNum((TxDescLen + PSPollLength), PageSize); TotalPageNum += CurtPktPageNum; - BufIndex += (CurtPktPageNum * PageSize); - #ifdef DBG_RSVD_PAGE_CFG - RSVD_PAGE_CFG("BTQosNull", CurtPktPageNum, TotalPageNum, TotalPacketLen); - #endif + BufIndex += (CurtPktPageNum * PageSize); + RSVD_PAGE_CFG("PSPoll", CurtPktPageNum, TotalPageNum, TotalPacketLen); } -#endif /* CONFIG_BT_COEXIT */ #ifdef CONFIG_MCC_MODE - if (MCC_EN(adapter)) { + /*======== MCC * n page ======== */ + if (MCC_EN(adapter)) {/*Normal mode*/ dl_mcc_page = rtw_hal_dl_mcc_fw_rsvd_page(adapter, ReservedPagePacket, &BufIndex, TxDescLen, PageSize, &TotalPageNum, &RsvdPageLoc, page_num); } else { @@ -9532,58 +11009,94 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page if (dl_mcc_page == _FAIL) #endif /* CONFIG_MCC_MODE */ - { - /* null data * 1 page */ - RsvdPageLoc.LocNullData = TotalPageNum; - RTW_INFO("LocNullData: %d\n", RsvdPageLoc.LocNullData); - rtw_hal_construct_NullFunctionData( - adapter, - &ReservedPagePacket[BufIndex], - &NullDataLength, - get_my_bssid(&pmlmeinfo->network), - _FALSE, 0, 0, _FALSE); - rtw_hal_fill_fake_txdesc(adapter, + { /*======== null data * 1 page ======== */ + if (MLME_IS_STA(sta_iface) || (nr_assoc_if == 0)) { + RsvdPageLoc.LocNullData = TotalPageNum; + RTW_INFO("LocNullData: %d\n", RsvdPageLoc.LocNullData); + rtw_hal_construct_NullFunctionData( + sta_iface, + &ReservedPagePacket[BufIndex], + &NullDataLength, + _FALSE, 0, 0, _FALSE); + rtw_hal_fill_fake_txdesc(sta_iface, &ReservedPagePacket[BufIndex - TxDescLen], NullDataLength, _FALSE, _FALSE, _FALSE); - CurtPktPageNum = (u8)PageNum(TxDescLen + NullDataLength, PageSize); + CurtPktPageNum = (u8)PageNum(TxDescLen + NullDataLength, PageSize); - TotalPageNum += CurtPktPageNum; + TotalPageNum += CurtPktPageNum; - BufIndex += (CurtPktPageNum * PageSize); - #ifdef DBG_RSVD_PAGE_CFG - RSVD_PAGE_CFG("NullData", CurtPktPageNum, TotalPageNum, TotalPacketLen); - #endif + BufIndex += (CurtPktPageNum * PageSize); + RSVD_PAGE_CFG("NullData", CurtPktPageNum, TotalPageNum, TotalPacketLen); + } } + /*======== Qos null data * 1 page ======== */ if (pwrctl->wowlan_mode == _FALSE || - pwrctl->wowlan_in_resume == _TRUE) { - /* Qos null data * 1 page */ - RsvdPageLoc.LocQosNull = TotalPageNum; - RTW_INFO("LocQosNull: %d\n", RsvdPageLoc.LocQosNull); - rtw_hal_construct_NullFunctionData(adapter, - &ReservedPagePacket[BufIndex], - &QosNullLength, - get_my_bssid(&pmlmeinfo->network), - _TRUE, 0, 0, _FALSE); - rtw_hal_fill_fake_txdesc(adapter, - &ReservedPagePacket[BufIndex - TxDescLen], - QosNullLength, _FALSE, _FALSE, _FALSE); + pwrctl->wowlan_in_resume == _TRUE) {/*Normal mode*/ + if (MLME_IS_STA(sta_iface) || (nr_assoc_if == 0)) { + RsvdPageLoc.LocQosNull = TotalPageNum; + RTW_INFO("LocQosNull: %d\n", RsvdPageLoc.LocQosNull); + rtw_hal_construct_NullFunctionData(sta_iface, + &ReservedPagePacket[BufIndex], + &QosNullLength, + _TRUE, 0, 0, _FALSE); + rtw_hal_fill_fake_txdesc(sta_iface, + &ReservedPagePacket[BufIndex - TxDescLen], + QosNullLength, _FALSE, _FALSE, _FALSE); - CurtPktPageNum = (u8)PageNum(TxDescLen + QosNullLength, - PageSize); + CurtPktPageNum = (u8)PageNum(TxDescLen + QosNullLength, + PageSize); - TotalPageNum += CurtPktPageNum; + TotalPageNum += CurtPktPageNum; - BufIndex += (CurtPktPageNum * PageSize); - #ifdef DBG_RSVD_PAGE_CFG - RSVD_PAGE_CFG("QosNull", CurtPktPageNum, TotalPageNum, TotalPacketLen); - #endif + BufIndex += (CurtPktPageNum * PageSize); + RSVD_PAGE_CFG("QosNull", CurtPktPageNum, TotalPageNum, TotalPacketLen); + } } +#ifdef CONFIG_BT_COEXIST + /*======== BT Qos null data * 1 page ======== */ + if (pwrctl->wowlan_mode == _FALSE || + pwrctl->wowlan_in_resume == _TRUE) {/*Normal mode*/ + + ap_iface = adapter; + #ifdef CONFIG_CONCURRENT_MODE + if (!MLME_IS_AP(ap_iface) && DEV_AP_NUM(adapter_to_dvobj(ap_iface))) { /*DEV_AP_STARTING_NUM*/ + ap_iface = _rtw_search_ap_iface(adapter); + RTW_INFO("get ("ADPT_FMT") to create BTQoSNull\n", ADPT_ARG(ap_iface)); + } + #endif + + if (MLME_IS_AP(ap_iface) || (nr_assoc_if == 0)) { + RsvdPageLoc.LocBTQosNull = TotalPageNum; + + RTW_INFO("LocBTQosNull: %d\n", RsvdPageLoc.LocBTQosNull); + + rtw_hal_construct_NullFunctionData(ap_iface, + &ReservedPagePacket[BufIndex], + &BTQosNullLength, + _TRUE, 0, 0, _FALSE); + + rtw_hal_fill_fake_txdesc(ap_iface, + &ReservedPagePacket[BufIndex - TxDescLen], + BTQosNullLength, _FALSE, _TRUE, _FALSE); + + CurtPktPageNum = (u8)PageNum(TxDescLen + BTQosNullLength, + PageSize); + + TotalPageNum += CurtPktPageNum; + BufIndex += (CurtPktPageNum * PageSize); + + RSVD_PAGE_CFG("BTQosNull", CurtPktPageNum, TotalPageNum, TotalPacketLen); + } + } +#endif /* CONFIG_BT_COEXIT */ + TotalPacketLen = BufIndex; #ifdef DBG_FW_DEBUG_MSG_PKT + /*======== FW DEBUG MSG * n page ======== */ RsvdPageLoc.loc_fw_dbg_msg_pkt = TotalPageNum; RTW_INFO("loc_fw_dbg_msg_pkt: %d\n", RsvdPageLoc.loc_fw_dbg_msg_pkt); rtw_hal_construct_fw_dbg_msg_pkt( @@ -9601,13 +11114,19 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page TotalPacketLen = BufIndex + fw_dbg_msg_pkt_len; BufIndex += (CurtPktPageNum * PageSize); - - #endif /*DBG_FW_DEBUG_MSG_PKT*/ +#ifdef CONFIG_LPS_PG + rtw_lps_pg_set_rsvd_page(adapter, ReservedPagePacket, &BufIndex + , TxDescLen, PageSize, &TotalPageNum, is_wow_mode, page_num ? 1 : 0); + TotalPacketLen = BufIndex; +#endif + #ifdef CONFIG_WOWLAN + /*======== WOW * n page ======== */ if (pwrctl->wowlan_mode == _TRUE && - pwrctl->wowlan_in_resume == _FALSE) { + pwrctl->wowlan_in_resume == _FALSE && + !(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && !check_fwstate(pmlmepriv, _FW_LINKED))) {/*WOW mode*/ rtw_hal_set_wow_fw_rsvd_page(adapter, ReservedPagePacket, BufIndex, TxDescLen, PageSize, &TotalPageNum, &TotalPacketLen, &RsvdPageLoc); @@ -9615,28 +11134,14 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page #endif /* CONFIG_WOWLAN */ #ifdef CONFIG_P2P_WOWLAN - if (_TRUE == pwrctl->wowlan_p2p_mode) { + /*======== P2P WOW * n page ======== */ + if (_TRUE == pwrctl->wowlan_p2p_mode) {/*WOW mode*/ rtw_hal_set_p2p_wow_fw_rsvd_page(adapter, ReservedPagePacket, BufIndex, TxDescLen, PageSize, &TotalPageNum, &TotalPacketLen, &RsvdPageLoc); } #endif /* CONFIG_P2P_WOWLAN */ -#ifdef CONFIG_LPS_PG - /* must reserved last 1 x page for LPS PG Info*/ - pwrctl->lpspg_rsvd_page_locate = TotalPageNum; - pwrctl->blpspg_info_up = _TRUE; - if (page_num) - TotalPageNum += LPS_PG_INFO_RSVD_PAGE_NUM; - - #ifdef DBG_RSVD_PAGE_CFG - RSVD_PAGE_CFG("LPS_PG", LPS_PG_INFO_RSVD_PAGE_NUM, - (page_num) ? TotalPageNum : (TotalPageNum + LPS_PG_INFO_RSVD_PAGE_NUM), - TotalPacketLen); - #endif - -#endif - /*Note: BufIndex already add a TxDescOffset offset in first Beacon page * The "TotalPacketLen" is calculate by BufIndex. * We need to decrease TxDescOffset before doing length check. by yiwei @@ -9648,6 +11153,8 @@ download_page: *page_num = TotalPageNum; rtw_mfree(ReservedPagePacket, MAX_CMDBUF_SZ); ReservedPagePacket = NULL; + RTW_INFO(FUNC_ADPT_FMT" Get [ %s ] RsvdPageNUm <==\n", + FUNC_ADPT_ARG(adapter), (is_wow_mode) ? "WOW" : "NOR"); return; } @@ -9655,17 +11162,6 @@ download_page: RTW_INFO("%s PageNum(%d), pktlen(%d)\n", __func__, TotalPageNum, TotalPacketLen); -#ifdef CONFIG_LPS_PG - if ((TotalPageNum + LPS_PG_INFO_RSVD_PAGE_NUM) > RsvdPageNum) { - pwrctl->lpspg_rsvd_page_locate = 0; - pwrctl->blpspg_info_up = _FALSE; - - RTW_ERR("%s [LPS_PG] rsvd page %d is not enough! need %d pages\n", - __func__, RsvdPageNum, (TotalPageNum + LPS_PG_INFO_RSVD_PAGE_NUM)); - rtw_warn_on(1); - } -#endif - if (TotalPacketLen > MaxRsvdPageBufSize) { RTW_ERR("%s : rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n", __FUNCTION__, TotalPacketLen, MaxRsvdPageBufSize); @@ -9692,7 +11188,10 @@ download_page: RTW_INFO_DUMP("\n", ReservedPagePacket, TotalPacketLen); RTW_INFO(" ==================================================\n"); #endif - if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { + + + if (check_fwstate(pmlmepriv, _FW_LINKED) + || MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)){ rtw_hal_set_FwRsvdPage_cmd(adapter, &RsvdPageLoc); #ifdef DBG_FW_DEBUG_MSG_PKT rtw_hal_set_fw_dbg_msg_pkt_rsvd_page_cmd(adapter, &RsvdPageLoc); @@ -9730,7 +11229,10 @@ error: void rtw_hal_set_fw_rsvd_page(struct _ADAPTER *adapter, bool finished) { - _rtw_hal_set_fw_rsvd_page(adapter, finished, NULL); + if (finished) + rtw_mi_tx_beacon_hdl(adapter); + else + _rtw_hal_set_fw_rsvd_page(adapter, finished, NULL); } /** @@ -9753,7 +11255,107 @@ u8 rtw_hal_get_rsvd_page_num(struct _ADAPTER *adapter) return num; } -static void hw_var_set_mlme_sitesurvey(_adapter *adapter, u8 variable, u8 *val) +static void hw_var_set_bcn_func(_adapter *adapter, u8 enable) +{ + u32 bcn_ctrl_reg; + +#ifdef CONFIG_CONCURRENT_MODE + if (adapter->hw_port == HW_PORT1) + bcn_ctrl_reg = REG_BCN_CTRL_1; + else +#endif + bcn_ctrl_reg = REG_BCN_CTRL; + + if (enable) + rtw_write8(adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); + else { + u8 val8; + + val8 = rtw_read8(adapter, bcn_ctrl_reg); + val8 &= ~(EN_BCN_FUNCTION | EN_TXBCN_RPT); + +#ifdef CONFIG_BT_COEXIST + if (GET_HAL_DATA(adapter)->EEPROMBluetoothCoexist == 1) { + /* Always enable port0 beacon function for PSTDMA */ + if (REG_BCN_CTRL == bcn_ctrl_reg) + val8 |= EN_BCN_FUNCTION; + } +#endif + + rtw_write8(adapter, bcn_ctrl_reg, val8); + } + +#ifdef CONFIG_RTL8192F + if (IS_HARDWARE_TYPE_8192F(adapter)) { + u16 val16, val16_ori; + + val16_ori = val16 = rtw_read16(adapter, REG_WLAN_ACT_MASK_CTRL_1); + + #ifdef CONFIG_CONCURRENT_MODE + if (adapter->hw_port == HW_PORT1) { + if (enable) + val16 |= EN_PORT_1_FUNCTION; + else + val16 &= ~EN_PORT_1_FUNCTION; + } else + #endif + { + if (enable) + val16 |= EN_PORT_0_FUNCTION; + else + val16 &= ~EN_PORT_0_FUNCTION; + + #ifdef CONFIG_BT_COEXIST + if (GET_HAL_DATA(adapter)->EEPROMBluetoothCoexist == 1) + val16 |= EN_PORT_0_FUNCTION; + #endif + } + + if (val16 != val16_ori) + rtw_write16(adapter, REG_WLAN_ACT_MASK_CTRL_1, val16); + } +#endif +} + +static void hw_var_set_mlme_disconnect(_adapter *adapter) +{ + u8 val8; + + /* reject all data frames */ +#ifdef CONFIG_CONCURRENT_MODE + if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE) +#endif + rtw_write16(adapter, REG_RXFLTMAP2, 0x0000); + +#ifdef CONFIG_CONCURRENT_MODE + if (adapter->hw_port == HW_PORT1) { + /* reset TSF1 */ + rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(1)); + + /* disable update TSF1 */ + rtw_iface_disable_tsf_update(adapter); + + if (!IS_HARDWARE_TYPE_8723D(adapter) + && !IS_HARDWARE_TYPE_8192F(adapter) + && !IS_HARDWARE_TYPE_8710B(adapter) + ) { + /* disable Port1's beacon function */ + val8 = rtw_read8(adapter, REG_BCN_CTRL_1); + val8 &= ~EN_BCN_FUNCTION; + rtw_write8(adapter, REG_BCN_CTRL_1, val8); + } + } else +#endif + { + /* reset TSF */ + rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(0)); + + /* disable update TSF */ + rtw_iface_disable_tsf_update(adapter); + } +} + +static void hw_var_set_mlme_sitesurvey(_adapter *adapter, u8 enable) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); @@ -9773,7 +11375,7 @@ static void hw_var_set_mlme_sitesurvey(_adapter *adapter, u8 variable, u8 *val) value_rxfltmap2 = 0; #endif - if (*((u8 *)val)) { /* under sitesurvey */ + if (enable) { /* under sitesurvey */ /* * 1. configure REG_RXFLTMAP2 * 2. disable TSF update & buddy TSF update to avoid updating wrong TSF due to clear RCR_CBSSID_BCN @@ -9781,33 +11383,13 @@ static void hw_var_set_mlme_sitesurvey(_adapter *adapter, u8 variable, u8 *val) */ rtw_write16(adapter, REG_RXFLTMAP2, value_rxfltmap2); -#ifdef CONFIG_MI_WITH_MBSSID_CAM - /*do nothing~~*/ -#else - - /* disable update TSF */ - for (i = 0; i < dvobj->iface_nums; i++) { - iface = dvobj->padapters[i]; - if (!iface) - continue; - - if (rtw_linked_check(iface) - && !MLME_IS_AP(iface) && !MLME_IS_MESH(iface) - ) { - if (iface->hw_port == HW_PORT1) - rtw_write8(iface, REG_BCN_CTRL_1, rtw_read8(iface, REG_BCN_CTRL_1) | DIS_TSF_UDT); - else - rtw_write8(iface, REG_BCN_CTRL, rtw_read8(iface, REG_BCN_CTRL) | DIS_TSF_UDT); - - iface->mlmeextpriv.en_hw_update_tsf = _FALSE; - } - } -#endif /* CONFIG_MI_WITH_MBSSID_CAM */ - rtw_hal_rcr_set_chk_bssid(adapter, MLME_SCAN_ENTER); - /* Save orignal RRSR setting. needed? */ - hal_data->RegRRSR = rtw_read16(adapter, REG_RRSR); + /* Save orignal RRSR setting, only 8812 set RRSR after set ch/bw/band */ + #if defined (CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) + hal_data->RegRRSR = rtw_read32(adapter, REG_RRSR); + hal_data->RegRRSR &= 0x000FFFFF; + #endif #if defined(CONFIG_BEAMFORMING) && (defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)) if (IS_8812_SERIES(hal_data->version_id) || IS_8821_SERIES(hal_data->version_id)) { @@ -9833,31 +11415,18 @@ static void hw_var_set_mlme_sitesurvey(_adapter *adapter, u8 variable, u8 *val) rtw_hal_rcr_set_chk_bssid(adapter, MLME_SCAN_DONE); -#ifdef CONFIG_MI_WITH_MBSSID_CAM - /*if ((rtw_mi_get_assoced_sta_num(adapter) == 1) && (!rtw_mi_check_status(adapter, MI_AP_MODE))) - rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)&(~DIS_TSF_UDT));*/ -#else - - for (i = 0; i < dvobj->iface_nums; i++) { - iface = dvobj->padapters[i]; - if (!iface) - continue; - if (rtw_linked_check(iface) - && !MLME_IS_AP(iface) && !MLME_IS_MESH(iface) - ) { - /* enable HW TSF update when recive beacon*/ - /*if (iface->hw_port == HW_PORT1) - rtw_write8(iface, REG_BCN_CTRL_1, rtw_read8(iface, REG_BCN_CTRL_1)&(~(DIS_TSF_UDT))); - else - rtw_write8(iface, REG_BCN_CTRL, rtw_read8(iface, REG_BCN_CTRL)&(~(DIS_TSF_UDT))); - */ - iface->mlmeextpriv.en_hw_update_tsf = _TRUE; - } - } -#endif /* CONFIG_MI_WITH_MBSSID_CAM */ - - /* Restore orignal RRSR setting. needed? */ - rtw_write16(adapter, REG_RRSR, hal_data->RegRRSR); + /* Restore orignal RRSR setting,only 8812 set RRSR after set ch/bw/band */ + #if defined (CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) + #ifdef RTW_DYNAMIC_RRSR + rtw_phydm_set_rrsr(adapter, hal_data->RegRRSR, TRUE); + #else/*RTW_DYNAMIC_RRSR*/ + u32 temp_RRSR; + temp_RRSR = rtw_read32(adapter, REG_RRSR); + temp_RRSR &= 0xFFF00000; + hal_data->RegRRSR |= temp_RRSR; + rtw_write32(adapter, REG_RRSR, hal_data->RegRRSR); + #endif/*RTW_DYNAMIC_RRSR*/ + #endif #if defined(CONFIG_BEAMFORMING) && (defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)) if (IS_8812_SERIES(hal_data->version_id) || IS_8821_SERIES(hal_data->version_id)) { @@ -9873,6 +11442,90 @@ static void hw_var_set_mlme_sitesurvey(_adapter *adapter, u8 variable, u8 *val) } } +static void hw_var_set_mlme_join(_adapter *adapter, u8 type) +{ + u8 val8; + u16 val16; + u32 val32; + u8 RetryLimit = RL_VAL_STA; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + +#ifdef CONFIG_CONCURRENT_MODE + if (type == 0) { + /* prepare to join */ + if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) + StopTxBeacon(adapter); + + /* enable to rx data frame.Accept all data frame */ + rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF); + + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) + RetryLimit = (hal_data->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA; + else /* Ad-hoc Mode */ + RetryLimit = RL_VAL_AP; + + rtw_iface_enable_tsf_update(adapter); + + } else if (type == 1) { + /* joinbss_event call back when join res < 0 */ + if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE) + rtw_write16(adapter, REG_RXFLTMAP2, 0x00); + + rtw_iface_disable_tsf_update(adapter); + + if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) { + ResumeTxBeacon(adapter); + + /* reset TSF 1/2 after ResumeTxBeacon */ + rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(1) | BIT(0)); + } + + } else if (type == 2) { + /* sta add event call back */ + if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) { + /* fixed beacon issue for 8191su........... */ + rtw_write8(adapter, 0x542 , 0x02); + RetryLimit = RL_VAL_AP; + } + + if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) { + ResumeTxBeacon(adapter); + + /* reset TSF 1/2 after ResumeTxBeacon */ + rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(1) | BIT(0)); + } + } + + val16 = BIT_SRL(RetryLimit) | BIT_LRL(RetryLimit); + rtw_write16(adapter, REG_RETRY_LIMIT, val16); +#else /* !CONFIG_CONCURRENT_MODE */ + if (type == 0) { /* prepare to join */ + /* enable to rx data frame.Accept all data frame */ + rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF); + + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) + RetryLimit = (hal_data->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA; + else /* Ad-hoc Mode */ + RetryLimit = RL_VAL_AP; + + rtw_iface_enable_tsf_update(adapter); + + } else if (type == 1) { /* joinbss_event call back when join res < 0 */ + rtw_write16(adapter, REG_RXFLTMAP2, 0x00); + + rtw_iface_disable_tsf_update(adapter); + + } else if (type == 2) { /* sta add event call back */ + if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) + RetryLimit = RL_VAL_AP; + } + + val16 = BIT_SRL(RetryLimit) | BIT_LRL(RetryLimit); + rtw_write16(adapter, REG_RETRY_LIMIT, val16); +#endif /* !CONFIG_CONCURRENT_MODE */ +} + #ifdef CONFIG_TSF_RESET_OFFLOAD static int rtw_hal_h2c_reset_tsf(_adapter *adapter, u8 reset_port) { @@ -9916,43 +11569,291 @@ int rtw_hal_reset_tsf(_adapter *adapter, u8 reset_port) } #endif /* CONFIG_TSF_RESET_OFFLOAD */ -static void rtw_hal_set_hw_update_tsf(PADAPTER padapter) -{ - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - -#if defined(CONFIG_RTL8822B) || defined(CONFIG_MI_WITH_MBSSID_CAM) - RTW_INFO("[Warn] %s "ADPT_FMT" enter func\n", __func__, ADPT_ARG(padapter)); - rtw_warn_on(1); - return; -#endif - - if (!pmlmeext->en_hw_update_tsf) - return; - - /* check RCR */ - if (!rtw_hal_rcr_check(padapter, RCR_CBSSID_BCN)) - return; - - /* enable hw update tsf function for non-AP and non-Mesh */ - if (rtw_linked_check(padapter) - && !MLME_IS_AP(padapter) && !MLME_IS_MESH(padapter) - ) { +#ifdef CONFIG_HW_P0_TSF_SYNC #ifdef CONFIG_CONCURRENT_MODE - if (padapter->hw_port == HW_PORT1) - rtw_write8(padapter, REG_BCN_CTRL_1, rtw_read8(padapter, REG_BCN_CTRL_1) & (~DIS_TSF_UDT)); - else -#endif - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) & (~DIS_TSF_UDT)); +static void hw_port0_tsf_sync_sel(_adapter *adapter, u8 benable, u8 hw_port, u16 tr_offset) +{ + u8 val8; + u8 client_id = 0; + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + +#ifdef CONFIG_MCC_MODE + if (MCC_EN(adapter) && (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC))) { + RTW_INFO("[MCC] do not set HW TSF sync\n"); + return; } - pmlmeext->en_hw_update_tsf = _FALSE; +#endif + /* check if port0 is already synced */ + if (benable && dvobj->p0_tsf.sync_port != MAX_HW_PORT && dvobj->p0_tsf.sync_port == hw_port) { + RTW_WARN(FUNC_ADPT_FMT ": port0 already enable TSF sync(%d)\n", + FUNC_ADPT_ARG(adapter), dvobj->p0_tsf.sync_port); + return; + } + + /* check if port0 already disable sync */ + if (!benable && dvobj->p0_tsf.sync_port == MAX_HW_PORT) { + RTW_WARN(FUNC_ADPT_FMT ": port0 already disable TSF sync\n", FUNC_ADPT_ARG(adapter)); + return; + } + + /* check if port0 sync to port0 */ + if (benable && hw_port == HW_PORT0) { + RTW_ERR(FUNC_ADPT_FMT ": hw_port is port0 under enable\n", FUNC_ADPT_ARG(adapter)); + rtw_warn_on(1); + return; + } + + /*0x5B4 [6:4] :SYNC_CLI_SEL - The selector for the CLINT port of sync tsft source for port 0*/ + /* Bit[5:4] : 0 for clint0, 1 for clint1, 2 for clint2, 3 for clint3. + Bit6 : 1= enable sync to port 0. 0=disable sync to port 0.*/ + + val8 = rtw_read8(adapter, REG_TIMER0_SRC_SEL); + + if (benable) { + /*Disable Port0's beacon function*/ + rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL) & ~BIT_EN_BCN_FUNCTION); + + /*Reg 0x518[15:0]: TSFTR_SYN_OFFSET*/ + if (tr_offset) + rtw_write16(adapter, REG_TSFTR_SYN_OFFSET, tr_offset); + + /*reg 0x577[6]=1*/ /*auto sync by tbtt*/ + rtw_write8(adapter, REG_MISC_CTRL, rtw_read8(adapter, REG_MISC_CTRL) | BIT_AUTO_SYNC_BY_TBTT); + + if (HW_PORT1 == hw_port) + client_id = 0; + else if (HW_PORT2 == hw_port) + client_id = 1; + else if (HW_PORT3 == hw_port) + client_id = 2; + else if (HW_PORT4 == hw_port) + client_id = 3; + + val8 &= 0x8F; + val8 |= (BIT(6) | (client_id << 4)); + + dvobj->p0_tsf.sync_port = hw_port; + dvobj->p0_tsf.offset = tr_offset; + rtw_write8(adapter, REG_TIMER0_SRC_SEL, val8); + + /*Enable Port0's beacon function*/ + rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL) | BIT_EN_BCN_FUNCTION); + RTW_INFO("%s Port_%d TSF sync to P0, timer offset :%d\n", __func__, hw_port, tr_offset); + } else { + val8 &= ~BIT(6); + + dvobj->p0_tsf.sync_port = MAX_HW_PORT; + dvobj->p0_tsf.offset = 0; + rtw_write8(adapter, REG_TIMER0_SRC_SEL, val8); + RTW_INFO("%s P0 TSF sync disable\n", __func__); + } +} +static _adapter * _search_ld_sta(_adapter *adapter, u8 include_self) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + u8 i; + _adapter *iface = NULL; + + if (rtw_mi_get_assoced_sta_num(adapter) == 0) { + RTW_ERR("STA_LD_NUM == 0\n"); + rtw_warn_on(1); + } + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (!iface) + continue; + if (include_self == _FALSE && adapter == iface) + continue; + if (is_client_associated_to_ap(iface)) + break; + } + if (iface) + RTW_INFO("search STA iface -"ADPT_FMT"\n", ADPT_ARG(iface)); + return iface; +} +#endif /*CONFIG_CONCURRENT_MODE*/ +/*Correct port0's TSF*/ +/*#define DBG_P0_TSF_SYNC*/ +void hw_var_set_correct_tsf(PADAPTER adapter, u8 mlme_state) +{ +#ifdef CONFIG_CONCURRENT_MODE + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + u8 p0_tsfsync = _FALSE; + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + _adapter *sta_if = NULL; + u8 hw_port; + + RTW_INFO(FUNC_ADPT_FMT "\n", FUNC_ADPT_ARG(adapter)); + #ifdef DBG_P0_TSF_SYNC + RTW_INFO("[TSF_SYNC] AP_NUM = %d\n", rtw_mi_get_ap_num(adapter)); + RTW_INFO("[TSF_SYNC] MESH_NUM = %d\n", rtw_mi_get_mesh_num(adapter)); + RTW_INFO("[TSF_SYNC] LD_STA_NUM = %d\n", rtw_mi_get_assoced_sta_num(adapter)); + if (dvobj->p0_tsf.sync_port == MAX_HW_PORT) + RTW_INFO("[TSF_SYNC] org p0 sync port = N/A\n"); + else + RTW_INFO("[TSF_SYNC] org p0 sync port = %d\n", dvobj->p0_tsf.sync_port); + RTW_INFO("[TSF_SYNC] timer offset = %d\n", dvobj->p0_tsf.offset); + #endif + switch (mlme_state) { + case MLME_STA_CONNECTED : + { + hw_port = rtw_hal_get_port(adapter); + + if (!MLME_IS_STA(adapter)) { + RTW_ERR("STA CON state,but iface("ADPT_FMT") is not STA\n", ADPT_ARG(adapter)); + rtw_warn_on(1); + } + + if ((dvobj->p0_tsf.sync_port != MAX_HW_PORT) && (hw_port == HW_PORT0)) { + RTW_ERR(ADPT_FMT" is STA with P0 connected => DIS P0_TSF_SYNC\n", ADPT_ARG(adapter)); + rtw_warn_on(1); + hw_port0_tsf_sync_sel(adapter, _FALSE, 0, 0); + } + + if ((dvobj->p0_tsf.sync_port == MAX_HW_PORT) && + (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter))) { + hw_port0_tsf_sync_sel(adapter, _TRUE, hw_port, 50);/*timer offset 50ms*/ + #ifdef DBG_P0_TSF_SYNC + RTW_INFO("[TSF_SYNC] STA_LINKED => EN P0_TSF_SYNC\n"); + #endif + } + } + break; + case MLME_STA_DISCONNECTED : + { + hw_port = rtw_hal_get_port(adapter); + + if (!MLME_IS_STA(adapter)) { + RTW_ERR("STA DIS_CON state,but iface("ADPT_FMT") is not STA\n", ADPT_ARG(adapter)); + rtw_warn_on(1); + } + + if (dvobj->p0_tsf.sync_port == hw_port) { + if (rtw_mi_get_assoced_sta_num(adapter) >= 2) { + /* search next appropriate sta*/ + sta_if = _search_ld_sta(adapter, _FALSE); + if (sta_if) { + hw_port = rtw_hal_get_port(sta_if); + hw_port0_tsf_sync_sel(adapter, _TRUE, hw_port, 50);/*timer offset 50ms*/ + #ifdef DBG_P0_TSF_SYNC + RTW_INFO("[TSF_SYNC] STA_DIS_CON => CHANGE P0_TSF_SYNC\n"); + #endif + } + } else if (rtw_mi_get_assoced_sta_num(adapter) == 1) { + hw_port0_tsf_sync_sel(adapter, _FALSE, 0, 0); + #ifdef DBG_P0_TSF_SYNC + RTW_INFO("[TSF_SYNC] STA_DIS_CON => DIS P0_TSF_SYNC\n"); + #endif + } + } + } + break; + case MLME_AP_STARTED : + case MLME_MESH_STARTED : + { + if (!(MLME_IS_AP(adapter) || MLME_IS_MESH(adapter))) { + RTW_ERR("AP START state,but iface("ADPT_FMT") is not AP\n", ADPT_ARG(adapter)); + rtw_warn_on(1); + } + + if ((dvobj->p0_tsf.sync_port == MAX_HW_PORT) && + rtw_mi_get_assoced_sta_num(adapter)) { + /* get port of sta */ + sta_if = _search_ld_sta(adapter, _FALSE); + if (sta_if) { + hw_port = rtw_hal_get_port(sta_if); + hw_port0_tsf_sync_sel(adapter, _TRUE, hw_port, 50);/*timer offset 50ms*/ + #ifdef DBG_P0_TSF_SYNC + RTW_INFO("[TSF_SYNC] AP_START => EN P0_TSF_SYNC\n"); + #endif + } + } + } + break; + case MLME_AP_STOPPED : + case MLME_MESH_STOPPED : + { + if (!(MLME_IS_AP(adapter) || MLME_IS_MESH(adapter))) { + RTW_ERR("AP START state,but iface("ADPT_FMT") is not AP\n", ADPT_ARG(adapter)); + rtw_warn_on(1); + } + /*stop ap mode*/ + if ((rtw_mi_get_ap_num(adapter) + rtw_mi_get_mesh_num(adapter) == 1) && + (dvobj->p0_tsf.sync_port != MAX_HW_PORT)) { + hw_port0_tsf_sync_sel(adapter, _FALSE, 0, 0); + #ifdef DBG_P0_TSF_SYNC + RTW_INFO("[TSF_SYNC] AP_STOP => DIS P0_TSF_SYNC\n"); + #endif + } + } + break; + default : + RTW_ERR(FUNC_ADPT_FMT" unknow state(0x%02x)\n", FUNC_ADPT_ARG(adapter), mlme_state); + break; + } + + /*#ifdef DBG_P0_TSF_SYNC*/ + #if 1 + if (dvobj->p0_tsf.sync_port == MAX_HW_PORT) + RTW_INFO("[TSF_SYNC] p0 sync port = N/A\n"); + else + RTW_INFO("[TSF_SYNC] p0 sync port = %d\n", dvobj->p0_tsf.sync_port); + RTW_INFO("[TSF_SYNC] timer offset = %d\n", dvobj->p0_tsf.offset); + #endif +#endif /*CONFIG_CONCURRENT_MODE*/ } -static void hw_var_set_correct_tsf(_adapter *adapter) -{ +#else /*! CONFIG_HW_P0_TSF_SYNC*/ + #ifdef CONFIG_MI_WITH_MBSSID_CAM +static void hw_var_set_correct_tsf(_adapter *adapter, u8 mlme_state) +{ /*do nothing*/ -#else +} +#else /* !CONFIG_MI_WITH_MBSSID_CAM*/ +static void rtw_hal_correct_tsf(_adapter *padapter, u8 hw_port, u64 tsf) +{ + if (hw_port == HW_PORT0) { + /*disable related TSF function*/ + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) & (~EN_BCN_FUNCTION)); +#if defined(CONFIG_RTL8192F) + rtw_write16(padapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(padapter, + REG_WLAN_ACT_MASK_CTRL_1) & ~EN_PORT_0_FUNCTION); +#endif + + rtw_write32(padapter, REG_TSFTR, tsf); + rtw_write32(padapter, REG_TSFTR + 4, tsf >> 32); + + /*enable related TSF function*/ + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) | EN_BCN_FUNCTION); +#if defined(CONFIG_RTL8192F) + rtw_write16(padapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(padapter, + REG_WLAN_ACT_MASK_CTRL_1) | EN_PORT_0_FUNCTION); +#endif + } else if (hw_port == HW_PORT1) { + /*disable related TSF function*/ + rtw_write8(padapter, REG_BCN_CTRL_1, rtw_read8(padapter, REG_BCN_CTRL_1) & (~EN_BCN_FUNCTION)); +#if defined(CONFIG_RTL8192F) + rtw_write16(padapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(padapter, + REG_WLAN_ACT_MASK_CTRL_1) & ~EN_PORT_1_FUNCTION); +#endif + + rtw_write32(padapter, REG_TSFTR1, tsf); + rtw_write32(padapter, REG_TSFTR1 + 4, tsf >> 32); + + /*enable related TSF function*/ + rtw_write8(padapter, REG_BCN_CTRL_1, rtw_read8(padapter, REG_BCN_CTRL_1) | EN_BCN_FUNCTION); +#if defined(CONFIG_RTL8192F) + rtw_write16(padapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(padapter, + REG_WLAN_ACT_MASK_CTRL_1) | EN_PORT_1_FUNCTION); +#endif + } else + RTW_INFO("%s-[WARN] "ADPT_FMT" invalid hw_port:%d\n", __func__, ADPT_ARG(padapter), hw_port); +} +static void hw_var_set_correct_tsf(_adapter *adapter, u8 mlme_state) +{ u64 tsf; struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; struct mlme_ext_info *mlmeinfo = &(mlmeext->mlmext_info); @@ -9994,12 +11895,86 @@ static void hw_var_set_correct_tsf(_adapter *adapter) } } #endif /* CONFIG_CONCURRENT_MODE */ - if ((mlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE || (mlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) ResumeTxBeacon(adapter); +} +#endif /*#ifdef CONFIG_MI_WITH_MBSSID_CAM*/ +#endif /*#ifdef CONFIG_HW_P0_TSF_SYNC*/ -#endif /*CONFIG_MI_WITH_MBSSID_CAM*/ +u64 rtw_hal_get_tsftr_by_port(_adapter *adapter, u8 port) +{ + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); + u64 tsftr = 0; + + if (port >= hal_spec->port_num) { + RTW_ERR("%s invalid port(%d) \n", __func__, port); + goto exit; + } + + switch (rtw_get_chip_type(adapter)) { +#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) + case RTL8814A: + case RTL8822B: + case RTL8821C: + case RTL8822C: + { + u8 val8; + + /* 0x554[30:28] - BIT_BCN_TIMER_SEL_FWRD */ + val8 = rtw_read8(adapter, REG_MBSSID_BCN_SPACE + 3); + val8 &= 0x8F; + val8 |= port << 4; + rtw_write8(adapter, REG_MBSSID_BCN_SPACE + 3, val8); + + tsftr = rtw_read32(adapter, REG_TSFTR + 4); + tsftr = tsftr << 32; + tsftr |= rtw_read32(adapter, REG_TSFTR); + + break; + } +#endif +#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) \ + || defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8192F) \ + || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8723D) \ + || defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) \ + || defined(CONFIG_RTL8710B) + case RTL8188E: + case RTL8188F: + case RTL8188GTV: + case RTL8192E: + case RTL8192F: + case RTL8723B: + case RTL8703B: + case RTL8723D: + case RTL8812: + case RTL8821: + case RTL8710B: + { + u32 addr; + + if (port == HW_PORT0) + addr = REG_TSFTR; + else if (port == HW_PORT1) + addr = REG_TSFTR1; + else { + RTW_ERR("%s unknown port(%d) \n", __func__, port); + goto exit; + } + + tsftr = rtw_read32(adapter, addr + 4); + tsftr = tsftr << 32; + tsftr |= rtw_read32(adapter, addr); + + break; + } +#endif + default: + RTW_ERR("%s unknow chip type\n", __func__); + } + +exit: + return tsftr; } #ifdef CONFIG_TDLS @@ -10044,16 +12019,109 @@ void rtw_hal_update_uapsd_tid(_adapter *adapter) #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT) /* For multi-port support, driver needs to inform the port ID to FW for btc operations */ -s32 rtw_hal_set_wifi_port_id_cmd(_adapter *adapter) +s32 rtw_hal_set_wifi_btc_port_id_cmd(_adapter *adapter) { - u8 port_id = 0; u8 h2c_buf[H2C_BTC_WL_PORT_ID_LEN] = {0}; + u8 hw_port = rtw_hal_get_port(adapter); - SET_H2CCMD_BTC_WL_PORT_ID(h2c_buf, adapter->hw_port); + SET_H2CCMD_BTC_WL_PORT_ID(h2c_buf, hw_port); + RTW_INFO("%s ("ADPT_FMT") - hw_port :%d\n", __func__, ADPT_ARG(adapter), hw_port); return rtw_hal_fill_h2c_cmd(adapter, H2C_BTC_WL_PORT_ID, H2C_BTC_WL_PORT_ID_LEN, h2c_buf); } #endif +#define LPS_ACTIVE_TIMEOUT 10 /*number of times*/ +void rtw_lps_state_chk(_adapter *adapter, u8 ps_mode) +{ + if (ps_mode == PS_MODE_ACTIVE) { + u8 ps_ready = _FALSE; + s8 leave_wait_count = LPS_ACTIVE_TIMEOUT; + + do { + if ((rtw_read8(adapter, REG_TCR) & BIT_PWRBIT_OW_EN) == 0) { + ps_ready = _TRUE; + break; + } + rtw_msleep_os(1); + } while (leave_wait_count--); + + if (ps_ready == _FALSE) { + RTW_ERR(FUNC_ADPT_FMT" PS_MODE_ACTIVE check failed\n", FUNC_ADPT_ARG(adapter)); + rtw_warn_on(1); + } + } +} +void rtw_var_set_basic_rate(PADAPTER padapter, u8 *val) { + + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + struct mlme_ext_info *mlmext_info = &padapter->mlmeextpriv.mlmext_info; + u16 input_b = 0, masked = 0, ioted = 0, BrateCfg = 0; + u16 rrsr_2g_force_mask = RRSR_CCK_RATES; + u16 rrsr_2g_allow_mask = (RRSR_24M | RRSR_12M | RRSR_6M | RRSR_CCK_RATES); + #ifdef CONFIG_IEEE80211_BAND_5GHZ + u16 rrsr_5g_force_mask = (RRSR_6M); + u16 rrsr_5g_allow_mask = (RRSR_OFDM_RATES); + #endif + #ifdef RTW_DYNAMIC_RRSR + u32 temp_RRSR; + #endif + + HalSetBrateCfg(padapter, val, &BrateCfg); + input_b = BrateCfg; + + /* apply force and allow mask */ + #ifdef CONFIG_IEEE80211_BAND_5GHZ + if (pHalData->current_band_type != BAND_ON_2_4G) { + BrateCfg |= rrsr_5g_force_mask; + BrateCfg &= rrsr_5g_allow_mask; + } else + #endif + { /* 2.4G */ + BrateCfg |= rrsr_2g_force_mask; + BrateCfg &= rrsr_2g_allow_mask; + } + masked = BrateCfg; + +#ifdef CONFIG_CMCC_TEST + BrateCfg |= (RRSR_11M | RRSR_5_5M | RRSR_1M); /* use 11M to send ACK */ + BrateCfg |= (RRSR_24M | RRSR_18M | RRSR_12M); /*CMCC_OFDM_ACK 12/18/24M */ +#endif + + /* IOT consideration */ + if (mlmext_info->assoc_AP_vendor == HT_IOT_PEER_CISCO) { + /* if peer is cisco and didn't use ofdm rate, we enable 6M ack */ + if ((BrateCfg & (RRSR_24M | RRSR_12M | RRSR_6M)) == 0) + BrateCfg |= RRSR_6M; + } + ioted = BrateCfg; + +#ifdef CONFIG_NARROWBAND_SUPPORTING + if ((padapter->registrypriv.rtw_nb_config == RTW_NB_CONFIG_WIDTH_10) + || (padapter->registrypriv.rtw_nb_config == RTW_NB_CONFIG_WIDTH_5)) { + BrateCfg &= ~RRSR_CCK_RATES; + BrateCfg |= RRSR_6M; + } +#endif + pHalData->BasicRateSet = BrateCfg; + + RTW_INFO("HW_VAR_BASIC_RATE: %#x->%#x->%#x\n", input_b, masked, ioted); + + /* Set RRSR rate table. */ + #ifdef RTW_DYNAMIC_RRSR + temp_RRSR = rtw_read32(padapter, REG_RRSR); + temp_RRSR &=0xFFFF0000; + temp_RRSR |=BrateCfg; + rtw_phydm_set_rrsr(padapter, temp_RRSR, TRUE); + #else + rtw_write16(padapter, REG_RRSR, BrateCfg); + #endif + rtw_write8(padapter, REG_RRSR + 2, rtw_read8(padapter, REG_RRSR + 2) & 0xf0); + + #if defined(CONFIG_RTL8188E) + rtw_hal_set_hwreg(padapter, HW_VAR_INIT_RTS_RATE, (u8 *)&BrateCfg); + #endif +} + u8 SetHwReg(_adapter *adapter, u8 variable, u8 *val) { HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); @@ -10219,22 +12287,56 @@ u8 SetHwReg(_adapter *adapter, u8 variable, u8 *val) break; #endif /*defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)*/ + case HW_VAR_BCN_FUNC: + hw_var_set_bcn_func(adapter, *val); + break; + + case HW_VAR_MLME_DISCONNECT: + hw_var_set_mlme_disconnect(adapter); + break; + case HW_VAR_MLME_SITESURVEY: - hw_var_set_mlme_sitesurvey(adapter, variable, val); + hw_var_set_mlme_sitesurvey(adapter, *val); #ifdef CONFIG_BT_COEXIST if (hal_data->EEPROMBluetoothCoexist == 1) rtw_btcoex_ScanNotify(adapter, *val ? _TRUE : _FALSE); #endif break; + case HW_VAR_MLME_JOIN: + hw_var_set_mlme_join(adapter, *val); + #ifdef CONFIG_BT_COEXIST + if (hal_data->EEPROMBluetoothCoexist == 1) { + switch (*val) { + case 0: + /* Notify coex. mechanism before join */ + rtw_btcoex_ConnectNotify(adapter, _TRUE); + break; + case 1: + case 2: + /* Notify coex. mechanism after join, whether successful or failed */ + rtw_btcoex_ConnectNotify(adapter, _FALSE); + break; + } + } + #endif /* CONFIG_BT_COEXIST */ + break; + case HW_VAR_EN_HW_UPDATE_TSF: rtw_hal_set_hw_update_tsf(adapter); break; - case HW_VAR_CORRECT_TSF: - hw_var_set_correct_tsf(adapter); + hw_var_set_correct_tsf(adapter, *val); break; +#if defined(CONFIG_HW_P0_TSF_SYNC) && defined(CONFIG_CONCURRENT_MODE) + case HW_VAR_TSF_AUTO_SYNC: + if (*val == _TRUE) + hw_port0_tsf_sync_sel(adapter, _TRUE, adapter->hw_port, 50); + else + hw_port0_tsf_sync_sel(adapter, _FALSE, adapter->hw_port, 50); + break; +#endif case HW_VAR_APFM_ON_MAC: hal_data->bMacPwrCtrlOn = *val; RTW_INFO("%s: bMacPwrCtrlOn=%d\n", __func__, hal_data->bMacPwrCtrlOn); @@ -10271,6 +12373,70 @@ u8 SetHwReg(_adapter *adapter, u8 variable, u8 *val) RTW_INFO("[HW_VAR_ENABLE_RX_BAR] 0x%02X=0x%02X\n", REG_RXFLTMAP1, rtw_read16(adapter, REG_RXFLTMAP1)); break; + case HW_VAR_HCI_SUS_STATE: + hal_data->hci_sus_state = *(u8 *)val; + RTW_INFO("%s: hci_sus_state=%u\n", __func__, hal_data->hci_sus_state); + break; +#if defined(CONFIG_AP_MODE) && defined(CONFIG_FW_HANDLE_TXBCN) && defined(CONFIG_SUPPORT_MULTI_BCN) + case HW_VAR_BCN_HEAD_SEL: + { + u8 vap_id = *(u8 *)val; + + if ((vap_id >= CONFIG_LIMITED_AP_NUM) && (vap_id != 0xFF)) { + RTW_ERR(ADPT_FMT " vap_id(%d:%d) is invalid\n", ADPT_ARG(adapter),vap_id, adapter->vap_id); + rtw_warn_on(1); + } + if (MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)) { + u16 drv_pg_bndy = 0, bcn_addr = 0; + u32 page_size = 0; + + /*rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_BOUNDARY, &drv_pg_bndy);*/ + rtw_halmac_get_rsvd_drv_pg_bndy(adapter_to_dvobj(adapter), &drv_pg_bndy); + rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&page_size); + + if (vap_id != 0xFF) + bcn_addr = drv_pg_bndy + (vap_id * (MAX_BEACON_LEN / page_size)); + else + bcn_addr = drv_pg_bndy; + RTW_INFO(ADPT_FMT" vap_id(%d) change BCN HEAD to 0x%04x\n", + ADPT_ARG(adapter), vap_id, bcn_addr); + rtw_write16(adapter, REG_FIFOPAGE_CTRL_2, + (bcn_addr & BIT_MASK_BCN_HEAD_1_V1) | BIT_BCN_VALID_V1); + } + } + break; +#endif + case HW_VAR_LPS_STATE_CHK : + rtw_lps_state_chk(adapter, *(u8 *)val); + break; + +#ifdef CONFIG_RTS_FULL_BW + case HW_VAR_SET_RTS_BW: + { + #ifdef RTW_HALMAC + rtw_halmac_set_rts_full_bw(adapter_to_dvobj(adapter), (*val)); + #else + u8 temp; + if(*val) + temp = (( rtw_read8(adapter, REG_INIRTS_RATE_SEL)) | BIT5 ); + else + temp = (( rtw_read8(adapter, REG_INIRTS_RATE_SEL)) & (~BIT5)); + rtw_write8(adapter, REG_INIRTS_RATE_SEL, temp); + /*RTW_INFO("HW_VAR_SET_RTS_BW val=%u REG480=0x%x\n", *val, rtw_read8(adapter, REG_INIRTS_RATE_SEL));*/ + #endif + } + break; +#endif/*CONFIG_RTS_FULL_BW*/ +#if defined(CONFIG_PCI_HCI) + case HW_VAR_ENSWBCN: + if (*val == _TRUE) { + rtw_write8(adapter, REG_CR + 1, + rtw_read8(adapter, REG_CR + 1) | BIT(0)); + } else + rtw_write8(adapter, REG_CR + 1, + rtw_read8(adapter, REG_CR + 1) & ~BIT(0)); + break; +#endif default: if (0) RTW_PRINT(FUNC_ADPT_FMT" variable(%d) not defined!\n", @@ -10297,6 +12463,9 @@ void GetHwReg(_adapter *adapter, u8 variable, u8 *val) break; case HW_VAR_RF_TYPE: *((u8 *)val) = hal_data->rf_type; +#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA + *((u8 *)val) = RF_1T1R; +#endif break; case HW_VAR_MEDIA_STATUS: rtw_hal_get_msr(adapter, val); @@ -10338,16 +12507,38 @@ void GetHwReg(_adapter *adapter, u8 variable, u8 *val) } break; - case HW_VAR_TSF: - /* read and save HIGH 32bits TSF value */ - val64 = rtw_read32(adapter, REG_TSFTR+4); - val64 = val64 << 32; - - /* read and save LOW 32bits TSF value */ - val64 |= rtw_read32(adapter, REG_TSFTR); - *((u64*)val) = val64; + case HW_VAR_HCI_SUS_STATE: + *((u8 *)val) = hal_data->hci_sus_state; break; + case HW_VAR_BCN_CTRL_ADDR: + *((u32 *)val) = hw_bcn_ctrl_addr(adapter, adapter->hw_port); + break; + +#ifdef CONFIG_WAPI_SUPPORT + case HW_VAR_CAM_EMPTY_ENTRY: { + u8 ucIndex = *((u8 *)val); + u8 i; + u32 ulCommand = 0; + u32 ulContent = 0; + u32 ulEncAlgo = CAM_AES; + + for (i = 0; i < CAM_CONTENT_COUNT; i++) { + /* filled id in CAM config 2 byte */ + if (i == 0) + ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo) << 2); + else + ulContent = 0; + /* polling bit, and No Write enable, and address */ + ulCommand = CAM_CONTENT_COUNT * ucIndex + i; + ulCommand = ulCommand | CAM_POLLINIG | CAM_WRITE; + /* write content 0 is equall to mark invalid */ + rtw_write32(adapter, REG_CAMWRITE, ulContent); /* delay_ms(40); */ + rtw_write32(adapter, REG_CAMCMD, ulCommand); /* delay_ms(40); */ + } + } +#endif + default: if (0) RTW_PRINT(FUNC_ADPT_FMT" variable(%d) not defined!\n", @@ -10456,6 +12647,8 @@ void rtw_hal_beamforming_config_csirate(PADAPTER adapter) struct beamforming_info *bf_info; u8 fix_rate_enable = 0; u8 new_csi_rate_idx; + u8 rrsr_54_en; + u32 temp_rrsr; /* Acting as BFee */ if (IS_BEAMFORMEE(adapter)) { @@ -10471,7 +12664,18 @@ void rtw_hal_beamforming_config_csirate(PADAPTER adapter) rtw_halmac_bf_cfg_csi_rate(adapter_to_dvobj(adapter), p_dm_odm->rssi_min, bf_info->cur_csi_rpt_rate, - fix_rate_enable, &new_csi_rate_idx); + fix_rate_enable, &new_csi_rate_idx, &rrsr_54_en); + + temp_rrsr = rtw_read32(adapter,REG_RRSR); + if(rrsr_54_en == 1) + temp_rrsr |= BIT(HALMAC_OFDM54); + else if(rrsr_54_en == 0) + temp_rrsr &= ~(BIT(HALMAC_OFDM54)); + #ifdef RTW_DYNAMIC_RRSR + rtw_phydm_set_rrsr(adapter, temp_rrsr, FALSE); + #else + rtw_write32(adapter, REG_RRSR, temp_rrsr); + #endif if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate) bf_info->cur_csi_rpt_rate = new_csi_rate_idx; @@ -10558,7 +12762,7 @@ eqNByte( * */ u32 MapCharToHexDigit( - IN char chTmp + char chTmp ) { if (chTmp >= '0' && chTmp <= '9') @@ -10579,9 +12783,9 @@ MapCharToHexDigit( * */ BOOLEAN GetHexValueFromString( - IN char *szStr, - IN OUT u32 *pu4bVal, - IN OUT u32 *pu4bMove + char *szStr, + u32 *pu4bVal, + u32 *pu4bMove ) { char *szScan = szStr; @@ -10628,10 +12832,10 @@ GetHexValueFromString( BOOLEAN GetFractionValueFromString( - IN char *szStr, - IN OUT u8 *pInteger, - IN OUT u8 *pFraction, - IN OUT u32 *pu4bMove + char *szStr, + u8 *pInteger, + u8 *pFraction, + u32 *pu4bMove ) { char *szScan = szStr; @@ -10647,6 +12851,9 @@ GetFractionValueFromString( ++(*pu4bMove); } + if (*szScan < '0' || *szScan > '9') + return _FALSE; + /* Parse each digit. */ do { (*pInteger) *= 10; @@ -10661,12 +12868,17 @@ GetFractionValueFromString( if (*szScan < '0' || *szScan > '9') return _FALSE; - else { - *pFraction = *szScan - '0'; + + *pFraction += (*szScan - '0') * 10; + ++szScan; + ++(*pu4bMove); + + if (*szScan >= '0' && *szScan <= '9') { + *pFraction += *szScan - '0'; ++szScan; ++(*pu4bMove); - return _TRUE; } + return _TRUE; } } while (*szScan >= '0' && *szScan <= '9'); @@ -10679,7 +12891,7 @@ GetFractionValueFromString( * */ BOOLEAN IsCommentString( - IN char *szStr + char *szStr ) { if (*szStr == '/' && *(szStr + 1) == '/') @@ -10690,8 +12902,8 @@ IsCommentString( BOOLEAN GetU1ByteIntegerFromStringInDecimal( - IN char *Str, - IN OUT u8 *pInt + char *Str, + u8 *pInt ) { u16 i = 0; @@ -10714,11 +12926,11 @@ GetU1ByteIntegerFromStringInDecimal( * If RightQualifier does not exist, it will hang on in the while loop */ BOOLEAN ParseQualifiedString( - IN char *In, - IN OUT u32 *Start, - OUT char *Out, - IN char LeftQualifier, - IN char RightQualifier + char *In, + u32 *Start, + char *Out, + char LeftQualifier, + char RightQualifier ) { u32 i = 0, j = 0; @@ -10772,12 +12984,14 @@ void rtw_hal_check_rxfifo_full(_adapter *adapter) /* switch counter to RX fifo */ if (IS_8188E(pHalData->version_id) || IS_8188F(pHalData->version_id) || + IS_8188GTV(pHalData->version_id) || IS_8812_SERIES(pHalData->version_id) || IS_8821_SERIES(pHalData->version_id) || IS_8723B_SERIES(pHalData->version_id) || IS_8192E(pHalData->version_id) || IS_8703B_SERIES(pHalData->version_id) || - IS_8723D_SERIES(pHalData->version_id)) { + IS_8723D_SERIES(pHalData->version_id) || + IS_8192F_SERIES(pHalData->version_id)) { rtw_write8(adapter, REG_RXERR_RPT + 3, rtw_read8(adapter, REG_RXERR_RPT + 3) | 0xa0); save_cnt = _TRUE; } else { @@ -10895,8 +13109,8 @@ void rtw_dump_rx_dframe_info(_adapter *padapter, void *sel) struct sta_recv_dframe_info *psta_dframe_info; int i, j; _list *plist, *phead; - u8 bc_addr[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; - u8 null_addr[6] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; + u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + u8 null_addr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; if (precvpriv->store_law_data_flag) { @@ -10912,9 +13126,9 @@ void rtw_dump_rx_dframe_info(_adapter *padapter, void *sel) plist = get_next(plist); if (psta) { - if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, 6) != _TRUE) - && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, 6) != _TRUE) - && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(padapter), 6) != _TRUE)) { + if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) != _TRUE) + && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) != _TRUE) + && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(padapter), ETH_ALEN) != _TRUE)) { RTW_PRINT_SEL(sel, "==============================\n"); RTW_PRINT_SEL(sel, "macaddr =" MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr)); @@ -11073,6 +13287,14 @@ int hal_efuse_macaddr_offset(_adapter *adapter) addr_offset = EEPROM_MAC_ADDR_8188FS; break; #endif +#ifdef CONFIG_RTL8188GTV + case RTL8188GTV: + if (interface_type == RTW_USB) + addr_offset = EEPROM_MAC_ADDR_8188GTVU; + else if (interface_type == RTW_SDIO) + addr_offset = EEPROM_MAC_ADDR_8188GTVS; + break; +#endif #ifdef CONFIG_RTL8812A case RTL8812: if (interface_type == RTW_USB) @@ -11131,6 +13353,36 @@ int hal_efuse_macaddr_offset(_adapter *adapter) addr_offset = EEPROM_MAC_ADDR_8821CE; break; #endif /* CONFIG_RTL8821C */ + +#ifdef CONFIG_RTL8710B + case RTL8710B: + if (interface_type == RTW_USB) + addr_offset = EEPROM_MAC_ADDR_8710B; + break; +#endif + +#ifdef CONFIG_RTL8192F + case RTL8192F: + if (interface_type == RTW_USB) + addr_offset = EEPROM_MAC_ADDR_8192FU; + else if (interface_type == RTW_SDIO) + addr_offset = EEPROM_MAC_ADDR_8192FS; + else if (interface_type == RTW_PCIE) + addr_offset = EEPROM_MAC_ADDR_8192FE; + break; +#endif /* CONFIG_RTL8192F */ + +#ifdef CONFIG_RTL8822C + case RTL8822C: + if (interface_type == RTW_USB) + addr_offset = EEPROM_MAC_ADDR_8822CU; + else if (interface_type == RTW_SDIO) + addr_offset = EEPROM_MAC_ADDR_8822CS; + else if (interface_type == RTW_PCIE) + addr_offset = EEPROM_MAC_ADDR_8822CE; + break; +#endif /* CONFIG_RTL8822C */ + } if (addr_offset == -1) { @@ -11298,9 +13550,9 @@ void rtw_bb_rf_gain_offset(_adapter *padapter) u8 value = pHalData->EEPROMRFGainOffset; u8 tmp = 0x3e; u32 res, i = 0; - u4Byte ArrayLen = sizeof(Array_kfreemap) / sizeof(u32); - pu4Byte Array = Array_kfreemap; - u4Byte v1 = 0, v2 = 0, GainValue = 0, target = 0; + u32 ArrayLen = sizeof(Array_kfreemap) / sizeof(u32); + u32 *Array = Array_kfreemap; + u32 v1 = 0, v2 = 0, GainValue = 0, target = 0; if (registry_par->RegPwrTrimEnable == 2) { RTW_INFO("Registry kfree default force disable.\n"); @@ -11514,7 +13766,7 @@ void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer) return; #ifdef RTW_HALMAC - if (IS_HARDWARE_TYPE_8822BU(padapter) || IS_HARDWARE_TYPE_8821CU(padapter)) + if (IS_HARDWARE_TYPE_8822BU(padapter) || IS_HARDWARE_TYPE_8821CU(padapter) || IS_HARDWARE_TYPE_8822CU(padapter)) rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, NULL); #else /* !RTW_HALMAC */ if (IS_HARDWARE_TYPE_8821U(padapter)) { /* || IS_HARDWARE_TYPE_8192EU(padapter)) */ @@ -11936,8 +14188,11 @@ void rtw_reset_mac_rx_counters(_adapter *padapter) /* If no packet rx, MaxRx clock be gating ,BIT_DISGCLK bit19 set 1 for fix*/ if (IS_HARDWARE_TYPE_8703B(padapter) || - IS_HARDWARE_TYPE_8723D(padapter) || - IS_HARDWARE_TYPE_8188F(padapter)) + IS_HARDWARE_TYPE_8723D(padapter) || + IS_HARDWARE_TYPE_8188F(padapter) || + IS_HARDWARE_TYPE_8188GTV(padapter) || + IS_HARDWARE_TYPE_8192F(padapter) || + IS_HARDWARE_TYPE_8822C(padapter)) phy_set_mac_reg(padapter, REG_RCR, BIT19, 0x1); /* reset mac counter */ @@ -11963,6 +14218,18 @@ void rtw_dump_phy_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_coun vht_err = phy_query_bb_reg(padapter, 0xF0C, 0x3FFF0000); /* [29:16] */ CCK_FA = phy_query_bb_reg(padapter, 0xA5C, bMaskLWord); OFDM_FA = phy_query_bb_reg(padapter, 0xF48, bMaskLWord); + } else if(IS_HARDWARE_TYPE_JAGUAR3(padapter)){ + cckok = phy_query_bb_reg(padapter, 0x2c04, 0xffff); + ofdmok = phy_query_bb_reg(padapter, 0x2c14, 0xffff); + htok = phy_query_bb_reg(padapter, 0x2c10, 0xffff); + vht_ok = phy_query_bb_reg(padapter, 0x2c0c, 0xffff); + cckcrc = phy_query_bb_reg(padapter, 0x2c04, 0xffff0000); + ofdmcrc = phy_query_bb_reg(padapter, 0x2c14, 0xffff0000); + htcrc = phy_query_bb_reg(padapter, 0x2c10, 0xffff0000); + vht_err = phy_query_bb_reg(padapter, 0x2c0c, 0xffff0000); + CCK_FA = phy_query_bb_reg(padapter, 0x1a5c, bMaskLWord); + OFDM_FA = phy_query_bb_reg(padapter, 0x2d00, bMaskLWord) - phy_query_bb_reg(padapter, 0x2de0, bMaskLWord); + } else { cckok = phy_query_bb_reg(padapter, 0xF88, bMaskDWord); ofdmok = phy_query_bb_reg(padapter, 0xF94, bMaskLWord); @@ -11991,12 +14258,29 @@ void rtw_reset_phy_trx_ok_counters(_adapter *padapter) if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) { phy_set_bb_reg(padapter, 0xB58, BIT0, 0x1); phy_set_bb_reg(padapter, 0xB58, BIT0, 0x0); + } else if(IS_HARDWARE_TYPE_JAGUAR3(padapter)) { + phy_set_bb_reg(padapter, 0x1EB4, BIT25, 0x1); + phy_set_bb_reg(padapter, 0x1EB4, BIT25, 0x0); + } else { + phy_set_bb_reg(padapter, 0xF14, BIT16, 0x1); + phy_set_bb_reg(padapter, 0xF14, BIT16, 0x0); } } + void rtw_reset_phy_rx_counters(_adapter *padapter) { /* reset phy counter */ - if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) { + if (IS_HARDWARE_TYPE_JAGUAR3(padapter)) { + /* reset CCK FA counter */ + phy_set_bb_reg(padapter, 0x1a2c, BIT(15) | BIT(14), 0); + phy_set_bb_reg(padapter, 0x1a2c, BIT(15) | BIT(14), 2); + + /* reset CCK CCA counter */ + phy_set_bb_reg(padapter, 0x1a2c, BIT(13) | BIT(12), 0); + phy_set_bb_reg(padapter, 0x1a2c, BIT(13) | BIT(12), 2); + rtw_reset_phy_trx_ok_counters(padapter); + + } else if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) { rtw_reset_phy_trx_ok_counters(padapter); phy_set_bb_reg(padapter, 0x9A4, BIT17, 0x1);/* reset OFDA FA counter */ @@ -12093,6 +14377,7 @@ void rtw_dump_rx_counters(_adapter *padapter) #endif u8 rtw_get_current_tx_sgi(_adapter *padapter, struct sta_info *psta) { + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); u8 curr_tx_sgi = 0; struct ra_sta_info *ra_info; @@ -12100,16 +14385,24 @@ u8 rtw_get_current_tx_sgi(_adapter *padapter, struct sta_info *psta) return curr_tx_sgi; if (padapter->fix_rate == 0xff) { +#if defined(CONFIG_RTL8188E) +#if (RATE_ADAPTIVE_SUPPORT == 1) + curr_tx_sgi = hal_data->odmpriv.ra_info[psta->cmn.mac_id].rate_sgi; +#endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/ +#else ra_info = &psta->cmn.ra_info; curr_tx_sgi = ((ra_info->curr_tx_rate) & 0x80) >> 7; +#endif } else { curr_tx_sgi = ((padapter->fix_rate) & 0x80) >> 7; } return curr_tx_sgi; } + u8 rtw_get_current_tx_rate(_adapter *padapter, struct sta_info *psta) { + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); u8 rate_id = 0; struct ra_sta_info *ra_info; @@ -12117,8 +14410,14 @@ u8 rtw_get_current_tx_rate(_adapter *padapter, struct sta_info *psta) return rate_id; if (padapter->fix_rate == 0xff) { +#if defined(CONFIG_RTL8188E) +#if (RATE_ADAPTIVE_SUPPORT == 1) + rate_id = hal_data->odmpriv.ra_info[psta->cmn.mac_id].decision_rate; +#endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/ +#else ra_info = &psta->cmn.ra_info; rate_id = ra_info->curr_tx_rate & 0x7f; +#endif } else { rate_id = padapter->fix_rate & 0x7f; } @@ -12152,58 +14451,49 @@ void update_IOT_info(_adapter *padapter) } } +#ifdef CONFIG_RTS_FULL_BW +/* +8188E: not support full RTS BW feature(mac REG no define 480[5]) +*/ +void rtw_set_rts_bw(_adapter *padapter) { + int i; + u8 enable = 1; + bool connect_to_8812 = _FALSE; + u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); + struct sta_info *station = NULL; -/* TODO: merge with phydm, see odm_SetCrystalCap() */ -void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap) -{ - crystal_cap = crystal_cap & 0x3F; + for (i = 0; i < macid_ctl->num; i++) { + if (rtw_macid_is_used(macid_ctl, i)) { - switch (rtw_get_chip_type(adapter)) { -#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) - case RTL8188E: - case RTL8188F: - /* write 0x24[16:11] = 0x24[22:17] = CrystalCap */ - phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x007FF800, (crystal_cap | (crystal_cap << 6))); - break; -#endif -#if defined(CONFIG_RTL8812A) - case RTL8812: - /* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */ - phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x7FF80000, (crystal_cap | (crystal_cap << 6))); - break; -#endif -#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || \ - defined(CONFIG_RTL8723D) || defined(CONFIG_RTL8821A) || \ - defined(CONFIG_RTL8192E) - case RTL8723B: - case RTL8703B: - case RTL8723D: - case RTL8821: - case RTL8192E: - /* write 0x2C[23:18] = 0x2C[17:12] = CrystalCap */ - phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x00FFF000, (crystal_cap | (crystal_cap << 6))); - break; -#endif -#if defined(CONFIG_RTL8814A) - case RTL8814A: - /* write 0x2C[26:21] = 0x2C[20:15] = CrystalCap*/ - phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6))); - break; -#endif -#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) + station = NULL; + station = macid_ctl->sta[i]; + if(station) { + + _adapter *sta_adapter =station->padapter; + struct mlme_ext_priv *pmlmeext = &(sta_adapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + if ( pmlmeinfo->state != WIFI_FW_NULL_STATE) { + if(_rtw_memcmp(macid_ctl->sta[i]->cmn.mac_addr, bc_addr, ETH_ALEN) != _TRUE) { + if ( macid_ctl->sta[i]->vendor_8812) { + connect_to_8812 = _TRUE; + enable = 0; + } + } + } + } + } - case RTL8822B: - case RTL8821C: - /* write 0x28[6:1] = 0x24[30:25] = CrystalCap */ - crystal_cap = crystal_cap & 0x3F; - phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x7E000000, crystal_cap); - phy_set_bb_reg(adapter, REG_AFE_PLL_CTRL, 0x7E, crystal_cap); - break; -#endif - default: - rtw_warn_on(1); + if(connect_to_8812) + break; } + + RTW_INFO("%s connect_to_8812=%d,enable=%u\n", __FUNCTION__,connect_to_8812,enable); + rtw_hal_set_hwreg(padapter, HW_VAR_SET_RTS_BW, &enable); } +#endif/*CONFIG_RTS_FULL_BW*/ int hal_spec_init(_adapter *adapter) { @@ -12238,6 +14528,11 @@ int hal_spec_init(_adapter *adapter) init_hal_spec_8188f(adapter); break; #endif +#ifdef CONFIG_RTL8188GTV + case RTL8188GTV: + init_hal_spec_8188gtv(adapter); + break; +#endif #ifdef CONFIG_RTL8812A case RTL8812: init_hal_spec_8812a(adapter); @@ -12267,6 +14562,21 @@ int hal_spec_init(_adapter *adapter) case RTL8821C: init_hal_spec_rtl8821c(adapter); break; +#endif +#ifdef CONFIG_RTL8710B + case RTL8710B: + init_hal_spec_8710b(adapter); + break; +#endif +#ifdef CONFIG_RTL8192F + case RTL8192F: + init_hal_spec_8192f(adapter); + break; +#endif +#ifdef CONFIG_RTL8822C + case RTL8822C: + rtl8822c_init_hal_spec(adapter); + break; #endif default: RTW_ERR("%s: unknown chip_type:%u\n" @@ -12317,6 +14627,8 @@ void dump_hal_spec(void *sel, _adapter *adapter) RTW_PRINT_SEL(sel, "sec_cam_ent_num:%u\n", hal_spec->sec_cam_ent_num); RTW_PRINT_SEL(sel, "rfpath_num_2g:%u\n", hal_spec->rfpath_num_2g); RTW_PRINT_SEL(sel, "rfpath_num_5g:%u\n", hal_spec->rfpath_num_5g); + RTW_PRINT_SEL(sel, "txgi_max:%u\n", hal_spec->txgi_max); + RTW_PRINT_SEL(sel, "txgi_pdbm:%u\n", hal_spec->txgi_pdbm); RTW_PRINT_SEL(sel, "max_tx_cnt:%u\n", hal_spec->max_tx_cnt); RTW_PRINT_SEL(sel, "tx_nss_num:%u\n", hal_spec->tx_nss_num); RTW_PRINT_SEL(sel, "rx_nss_num:%u\n", hal_spec->rx_nss_num); @@ -12349,7 +14661,15 @@ void dump_hal_spec(void *sel, _adapter *adapter) } _RTW_PRINT_SEL(sel, "\n"); +#if CONFIG_TX_AC_LIFETIME + RTW_PRINT_SEL(sel, "tx_aclt_unit_factor:%u (unit:%uus)\n" + , hal_spec->tx_aclt_unit_factor, hal_spec->tx_aclt_unit_factor * 32); +#endif + + RTW_PRINT_SEL(sel, "rx_tsf_filter:%u\n", hal_spec->rx_tsf_filter); + RTW_PRINT_SEL(sel, "pg_txpwr_saddr:0x%X\n", hal_spec->pg_txpwr_saddr); + RTW_PRINT_SEL(sel, "pg_txgi_diff_factor:%u\n", hal_spec->pg_txgi_diff_factor); } inline bool hal_chk_band_cap(_adapter *adapter, u8 cap) @@ -12412,6 +14732,13 @@ inline bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode) return 0; } +inline bool hal_is_mimo_support(_adapter *adapter) +{ + if ((GET_HAL_SPEC(adapter)->tx_nss_num == 1) && + (GET_HAL_SPEC(adapter)->rx_nss_num == 1)) + return 0; + return 1; +} /* * hal_largest_bw - starting from in_bw, get largest bw supported by HAL @@ -12433,34 +14760,8 @@ u8 hal_largest_bw(_adapter *adapter, u8 in_bw) return in_bw; } -void rtw_hal_correct_tsf(_adapter *padapter, u8 hw_port, u64 tsf) -{ - if (hw_port == HW_PORT0) { - /*disable related TSF function*/ - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) & (~EN_BCN_FUNCTION)); - - rtw_write32(padapter, REG_TSFTR, tsf); - rtw_write32(padapter, REG_TSFTR + 4, tsf >> 32); - - /*enable related TSF function*/ - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) | EN_BCN_FUNCTION); - } else if (hw_port == HW_PORT1) { - /*disable related TSF function*/ - rtw_write8(padapter, REG_BCN_CTRL_1, rtw_read8(padapter, REG_BCN_CTRL_1) & (~EN_BCN_FUNCTION)); - - rtw_write32(padapter, REG_TSFTR1, tsf); - rtw_write32(padapter, REG_TSFTR1 + 4, tsf >> 32); - - /*enable related TSF function*/ - rtw_write8(padapter, REG_BCN_CTRL_1, rtw_read8(padapter, REG_BCN_CTRL_1) | EN_BCN_FUNCTION); - } else - RTW_INFO("%s-[WARN] "ADPT_FMT" invalid hw_port:%d\n", __func__, ADPT_ARG(padapter), hw_port); -} - void ResumeTxBeacon(_adapter *padapter) { -#ifdef CONFIG_MI_WITH_MBSSID_CAM -#else rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2) | BIT(6)); @@ -12474,13 +14775,10 @@ void ResumeTxBeacon(_adapter *padapter) rtw_write8(padapter, REG_TBTT_PROHIBIT + 1, TBTT_PROHIBIT_HOLD_TIME & 0xFF); rtw_write8(padapter, REG_TBTT_PROHIBIT + 2, (rtw_read8(padapter, REG_TBTT_PROHIBIT + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME >> 8)); -#endif } void StopTxBeacon(_adapter *padapter) { -#ifdef CONFIG_MI_WITH_MBSSID_CAM -#else rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2) & (~BIT6)); @@ -12488,63 +14786,142 @@ void StopTxBeacon(_adapter *padapter) rtw_write8(padapter, REG_TBTT_PROHIBIT + 1, TBTT_PROHIBIT_HOLD_TIME_STOP_BCN & 0xFF); rtw_write8(padapter, REG_TBTT_PROHIBIT + 2, (rtw_read8(padapter, REG_TBTT_PROHIBIT + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME_STOP_BCN >> 8)); -#endif } #ifdef CONFIG_MI_WITH_MBSSID_CAM /*HW port0 - MBSS*/ + +#ifdef CONFIG_CLIENT_PORT_CFG +const u8 _clt_port_id[MAX_CLIENT_PORT_NUM] = { + CLT_PORT0, + CLT_PORT1, + CLT_PORT2, + CLT_PORT3 +}; + +void rtw_clt_port_init(struct clt_port_t *cltp) +{ + cltp->bmp = 0; + cltp->num = 0; + _rtw_spinlock_init(&cltp->lock); +} +void rtw_clt_port_deinit(struct clt_port_t *cltp) +{ + _rtw_spinlock_free(&cltp->lock); +} +static void _hw_client_port_alloc(_adapter *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct clt_port_t *cltp = &dvobj->clt_port; + _irqL irql; + int i; + + #if 0 + if (cltp->num > MAX_CLIENT_PORT_NUM) { + RTW_ERR(ADPT_FMT" cann't alloc client (%d)\n", ADPT_ARG(adapter), cltp->num); + rtw_warn_on(1); + return; + } + #endif + + if (adapter->client_id != MAX_CLIENT_PORT_NUM) { + RTW_INFO(ADPT_FMT" client_id %d has allocated port:%d\n", + ADPT_ARG(adapter), adapter->client_id, adapter->client_port); + return; + } + _enter_critical_bh(&cltp->lock, &irql); + for (i = 0; i < MAX_CLIENT_PORT_NUM; i++) { + if (!(cltp->bmp & BIT(i))) + break; + } + + if (i < MAX_CLIENT_PORT_NUM) { + adapter->client_id = i; + cltp->bmp |= BIT(i); + adapter->client_port = _clt_port_id[i]; + } + cltp->num++; + _exit_critical_bh(&cltp->lock, &irql); + RTW_INFO("%s("ADPT_FMT")id:%d, port:%d clt_num:%d\n", + __func__, ADPT_ARG(adapter), adapter->client_id, adapter->client_port, cltp->num); +} +static void _hw_client_port_free(_adapter *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct clt_port_t *cltp = &dvobj->clt_port; + _irqL irql; + + #if 0 + if (adapter->client_id >= MAX_CLIENT_PORT_NUM) { + RTW_ERR(ADPT_FMT" client_id %d is invalid\n", ADPT_ARG(adapter), adapter->client_id); + /*rtw_warn_on(1);*/ + } + #endif + + RTW_INFO("%s ("ADPT_FMT") id:%d, port:%d clt_num:%d\n", + __func__, ADPT_ARG(adapter), adapter->client_id, adapter->client_port, cltp->num); + + _enter_critical_bh(&cltp->lock, &irql); + if (adapter->client_id != MAX_CLIENT_PORT_NUM) { + cltp->bmp &= ~ BIT(adapter->client_id); + adapter->client_id = MAX_CLIENT_PORT_NUM; + adapter->client_port = CLT_PORT_INVALID; + } + cltp->num--; + if (cltp->num < 0) + cltp->num = 0; + _exit_critical_bh(&cltp->lock, &irql); +} +void rtw_hw_client_port_allocate(_adapter *adapter) +{ + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); + + if (hal_spec->port_num != 5) + return; + + _hw_client_port_alloc(adapter); +} +void rtw_hw_client_port_release(_adapter *adapter) +{ + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); + + if (hal_spec->port_num != 5) + return; + + _hw_client_port_free(adapter); +} +#endif /*CONFIG_CLIENT_PORT_CFG*/ + void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode) { RTW_INFO("%s()-"ADPT_FMT" mode = %d\n", __func__, ADPT_ARG(Adapter), mode); rtw_hal_rcr_set_chk_bssid(Adapter, MLME_ACTION_NONE); - /* disable Port0 TSF update*/ - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) | DIS_TSF_UDT); - /* set net_type */ Set_MSR(Adapter, mode); if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) { if (!rtw_mi_get_ap_num(Adapter) && !rtw_mi_get_mesh_num(Adapter)) StopTxBeacon(Adapter); - - rtw_write8(Adapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_ATIM);/*disable atim wnd*/ - } else if (mode == _HW_STATE_ADHOC_) { + } else if (mode == _HW_STATE_ADHOC_) ResumeTxBeacon(Adapter); - rtw_write8(Adapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB); + else if (mode == _HW_STATE_AP_) + /* enable rx ps-poll */ + rtw_write16(Adapter, REG_RXFLTMAP1, rtw_read16(Adapter, REG_RXFLTMAP1) | BIT_CTRLFLT10EN); - } else if (mode == _HW_STATE_AP_) { - ResumeTxBeacon(Adapter); - - rtw_write8(Adapter, REG_BCN_CTRL, DIS_TSF_UDT | DIS_BCNQ_SUB); - - /*enable to rx data frame*/ - rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); - - /*Beacon Control related register for first time*/ - rtw_write8(Adapter, REG_BCNDMATIM, 0x02); /* 2ms */ - - /*rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);*/ - rtw_write8(Adapter, REG_ATIMWND, 0x0c); /* 12ms */ - rtw_write16(Adapter, REG_BCNTCFG, 0x00); - - rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */ - - /*reset TSF*/ - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); - - /*enable BCN0 Function for if1*/ - /*don't enable update TSF0 for if1 (due to TSF update when beacon,probe rsp are received)*/ - rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT | EN_BCN_FUNCTION | EN_TXBCN_RPT | DIS_BCNQ_SUB)); - #ifdef CONFIG_BCN_XMIT_PROTECT - rtw_write8(Adapter, REG_CCK_CHECK, rtw_read8(Adapter, REG_CCK_CHECK) | BIT_EN_BCN_PKT_REL); - #endif - - if (IS_HARDWARE_TYPE_8821(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter))/* select BCN on port 0 for DualBeacon*/ - rtw_write8(Adapter, REG_CCK_CHECK, rtw_read8(Adapter, REG_CCK_CHECK) & (~BIT_BCN_PORT_SEL)); - - } + /* enable rx data frame */ + rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); +#ifdef CONFIG_CLIENT_PORT_CFG + if (mode == _HW_STATE_STATION_) + rtw_hw_client_port_allocate(Adapter); + else + rtw_hw_client_port_release(Adapter); +#endif +#if defined(CONFIG_RTL8192F) + rtw_write16(Adapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(Adapter, + REG_WLAN_ACT_MASK_CTRL_1) | EN_PORT_0_FUNCTION); +#endif } #endif @@ -12800,8 +15177,11 @@ void rtw_hal_get_rf_path(struct dvobj_priv *d, enum rf_type *type, a = dvobj_get_primary_adapter(d); - +#ifndef CONFIG_CUSTOMER01_SMART_ANTENNA rtw_hal_get_hwreg(a, HW_VAR_RF_TYPE, &val8); +#else + val8 = RF_2T2R; +#endif rf = (enum rf_type)val8; if (type) *type = rf; @@ -12829,3 +15209,54 @@ void rtw_hal_switch_chnl_and_set_bw_offload(_adapter *adapter, u8 central_ch, u8 rtw_sctx_wait(chsw_sctx, __func__); } #endif /* RTW_CHANNEL_SWITCH_OFFLOAD */ + +#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8812A) ||\ + defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8192E) ||\ + defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821A) ||\ + defined (CONFIG_RTL8822C) +u8 phy_get_current_tx_num( + PADAPTER pAdapter, + u8 Rate +) +{ + u8 tx_num = RF_1TX; + + if (IS_1T_RATE(Rate)) { + #if defined(CONFIG_RTW_TX_2PATH_EN) + tx_num = RF_2TX; + #else + tx_num = RF_1TX; + #endif + } else if (IS_2T_RATE(Rate)) + tx_num = RF_2TX; + else if (IS_3T_RATE(Rate)) + tx_num = RF_3TX; + else + rtw_warn_on(1); + + return tx_num; +} +#endif +#ifdef CONFIG_RTL8812A +u8 * rtw_hal_set_8812a_vendor_ie(_adapter *padapter , u8 *pframe ,uint *frlen ) { + int vender_len = 7; + unsigned char vendor_info[vender_len]; + unsigned char REALTEK_OUI[] = {0x00, 0xe0, 0x4c}; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if( !IS_HARDWARE_TYPE_8812(padapter) ) + return pframe; + + _rtw_memset(vendor_info,0,vender_len); + _rtw_memcpy(vendor_info, REALTEK_OUI, 3); + vendor_info[4] =2; + if(pHalData->version_id.CUTVersion > B_CUT_VERSION ) + vendor_info[6] = RT_HT_CAP_USE_JAGUAR_CCUT; + else + vendor_info[6] = RT_HT_CAP_USE_JAGUAR_BCUT; + pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_,vender_len,vendor_info , frlen); + + return pframe; +} +#endif /*CONFIG_RTL8812A*/ + diff --git a/hal/hal_com_c2h.h b/hal/hal_com_c2h.h index 1efabc9..2e860c9 100644 --- a/hal/hal_com_c2h.h +++ b/hal/hal_com_c2h.h @@ -99,6 +99,8 @@ int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len); #define MAC_HIDDEN_RPT_2_LEN 5 int c2h_mac_hidden_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len); int hal_read_mac_hidden_rpt(_adapter *adapter); +#else +#define hal_read_mac_hidden_rpt(adapter) _SUCCESS #endif /* CONFIG_RTW_MAC_HIDDEN_RPT */ /* C2H_DEFEATURE_DBG, 0x22 */ diff --git a/hal/hal_com_phycfg.c b/hal/hal_com_phycfg.c index 9b4165e..f915dc5 100644 --- a/hal/hal_com_phycfg.c +++ b/hal/hal_com_phycfg.c @@ -27,15 +27,11 @@ #define PG_TXPWR_LSB_DIFF_S4BIT(_pg_v) ((_pg_v) & 0x0f) #define PG_TXPWR_MSB_DIFF_TO_S8BIT(_pg_v) ((PG_TXPWR_MSB_DIFF_S4BIT(_pg_v) & BIT3) ? (PG_TXPWR_MSB_DIFF_S4BIT(_pg_v) | 0xF0) : PG_TXPWR_MSB_DIFF_S4BIT(_pg_v)) #define PG_TXPWR_LSB_DIFF_TO_S8BIT(_pg_v) ((PG_TXPWR_LSB_DIFF_S4BIT(_pg_v) & BIT3) ? (PG_TXPWR_LSB_DIFF_S4BIT(_pg_v) | 0xF0) : PG_TXPWR_LSB_DIFF_S4BIT(_pg_v)) -#define IS_PG_TXPWR_BASE_INVALID(_base) ((_base) > 63) +#define IS_PG_TXPWR_BASE_INVALID(hal_spec, _base) ((_base) > hal_spec->txgi_max) #define IS_PG_TXPWR_DIFF_INVALID(_diff) ((_diff) > 7 || (_diff) < -8) #define PG_TXPWR_INVALID_BASE 255 #define PG_TXPWR_INVALID_DIFF 8 -#if !IS_PG_TXPWR_BASE_INVALID(PG_TXPWR_INVALID_BASE) -#error "PG_TXPWR_BASE definition has problem" -#endif - #if !IS_PG_TXPWR_DIFF_INVALID(PG_TXPWR_INVALID_DIFF) #error "PG_TXPWR_DIFF definition has problem" #endif @@ -260,6 +256,14 @@ static const struct map_t rtl8188f_pg_txpwr_def_info = ); #endif +#ifdef CONFIG_RTL8188GTV +static const struct map_t rtl8188gtv_pg_txpwr_def_info = + MAP_ENT(0xB8, 1, 0xFF + , MAPSEG_ARRAY_ENT(0x10, 12, + 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x27, 0x27, 0x27, 0x27, 0x27, 0x24) + ); +#endif + #ifdef CONFIG_RTL8723B static const struct map_t rtl8723b_pg_txpwr_def_info = MAP_ENT(0xB8, 2, 0xFF @@ -312,13 +316,21 @@ static const struct map_t rtl8821a_pg_txpwr_def_info = static const struct map_t rtl8821c_pg_txpwr_def_info = MAP_ENT(0xB8, 1, 0xFF , MAPSEG_ARRAY_ENT(0x10, 54, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, + 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEC, 0xFF, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02) ); #endif +#ifdef CONFIG_RTL8710B +static const struct map_t rtl8710b_pg_txpwr_def_info = + MAP_ENT(0xC8, 1, 0xFF + , MAPSEG_ARRAY_ENT(0x20, 12, + 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x20) + ); +#endif + #ifdef CONFIG_RTL8812A static const struct map_t rtl8812a_pg_txpwr_def_info = MAP_ENT(0xB8, 1, 0xFF @@ -345,6 +357,19 @@ static const struct map_t rtl8822b_pg_txpwr_def_info = ); #endif +#ifdef CONFIG_RTL8822C +static const struct map_t rtl8822c_pg_txpwr_def_info = + MAP_ENT(0xB8, 1, 0xFF + , MAPSEG_ARRAY_ENT(0x10, 82, + 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0x00, 0xFF, 0xFF, + 0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, + 0x02, 0x00, 0xFF, 0xFF, 0x00, 0xFF, 0x00, 0x00, 0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, + 0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33, + 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0xFF, 0xFF, 0x00, 0xFF, + 0x00, 0x00) + ); +#endif + #ifdef CONFIG_RTL8814A static const struct map_t rtl8814a_pg_txpwr_def_info = MAP_ENT(0xB8, 1, 0xFF @@ -363,6 +388,16 @@ static const struct map_t rtl8814a_pg_txpwr_def_info = ); #endif +#ifdef CONFIG_RTL8192F/*use 8192F default,no document*/ +static const struct map_t rtl8192f_pg_txpwr_def_info = + MAP_ENT(0xB8, 2, 0xFF + , MAPSEG_ARRAY_ENT(0x10, 14, + 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE) + , MAPSEG_ARRAY_ENT(0x3A, 14, + 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE) + ); +#endif + const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter) { u8 interface_type = 0; @@ -396,6 +431,11 @@ const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter) map = &rtl8188f_pg_txpwr_def_info; break; #endif +#ifdef CONFIG_RTL8188GTV + case RTL8188GTV: + map = &rtl8188gtv_pg_txpwr_def_info; + break; +#endif #ifdef CONFIG_RTL8812A case RTL8812: map = &rtl8812a_pg_txpwr_def_info; @@ -425,6 +465,21 @@ const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter) case RTL8821C: map = &rtl8821c_pg_txpwr_def_info; break; +#endif +#ifdef CONFIG_RTL8710B + case RTL8710B: + map = &rtl8710b_pg_txpwr_def_info; + break; +#endif +#ifdef CONFIG_RTL8192F + case RTL8192F: + map = &rtl8192f_pg_txpwr_def_info; + break; +#endif +#ifdef CONFIG_RTL8822C + case RTL8822C: + map = &rtl8822c_pg_txpwr_def_info; + break; #endif } @@ -449,8 +504,8 @@ static u8 hal_chk_pg_txpwr_info_2g(_adapter *adapter, TxPowerInfo24G *pwr_info) if (!HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) continue; for (group = 0; group < MAX_CHNL_GROUP_24G; group++) { - if (IS_PG_TXPWR_BASE_INVALID(pwr_info->IndexCCK_Base[path][group]) - || IS_PG_TXPWR_BASE_INVALID(pwr_info->IndexBW40_Base[path][group])) + if (IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexCCK_Base[path][group]) + || IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group])) return _FAIL; } for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) { @@ -480,7 +535,7 @@ static u8 hal_chk_pg_txpwr_info_5g(_adapter *adapter, TxPowerInfo5G *pwr_info) if (!HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) continue; for (group = 0; group < MAX_CHNL_GROUP_5G; group++) - if (IS_PG_TXPWR_BASE_INVALID(pwr_info->IndexBW40_Base[path][group])) + if (IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group])) return _FAIL; for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) { if (!HAL_SPEC_CHK_TX_CNT(hal_spec, tx_idx)) @@ -599,8 +654,8 @@ u16 hal_load_pg_txpwr_info_path_2g( for (group = 0; group < MAX_CHNL_GROUP_24G; group++) { if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) { tmp_base = map_read8(txpwr_map, offset); - if (!IS_PG_TXPWR_BASE_INVALID(tmp_base) - && IS_PG_TXPWR_BASE_INVALID(pwr_info->IndexCCK_Base[path][group]) + if (!IS_PG_TXPWR_BASE_INVALID(hal_spec, tmp_base) + && IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexCCK_Base[path][group]) ) { pwr_info->IndexCCK_Base[path][group] = tmp_base; if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) @@ -613,8 +668,8 @@ u16 hal_load_pg_txpwr_info_path_2g( for (group = 0; group < MAX_CHNL_GROUP_24G - 1; group++) { if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) { tmp_base = map_read8(txpwr_map, offset); - if (!IS_PG_TXPWR_BASE_INVALID(tmp_base) - && IS_PG_TXPWR_BASE_INVALID(pwr_info->IndexBW40_Base[path][group]) + if (!IS_PG_TXPWR_BASE_INVALID(hal_spec, tmp_base) + && IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group]) ) { pwr_info->IndexBW40_Base[path][group] = tmp_base; if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) @@ -697,7 +752,7 @@ u16 hal_load_pg_txpwr_info_path_2g( rtw_warn_on(1); } -exit: +exit: return offset; } @@ -723,7 +778,7 @@ u16 hal_load_pg_txpwr_info_path_5g( offset += PG_TXPWR_1PATH_BYTE_NUM_5G; goto exit; } - + #ifdef CONFIG_IEEE80211_BAND_5GHZ if (DBG_PG_TXPWR_READ) RTW_INFO("%s[%c] eaddr:0x%03x\n", __func__, rf_path_char(path), offset); @@ -731,8 +786,8 @@ u16 hal_load_pg_txpwr_info_path_5g( for (group = 0; group < MAX_CHNL_GROUP_5G; group++) { if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) { tmp_base = map_read8(txpwr_map, offset); - if (!IS_PG_TXPWR_BASE_INVALID(tmp_base) - && IS_PG_TXPWR_BASE_INVALID(pwr_info->IndexBW40_Base[path][group]) + if (!IS_PG_TXPWR_BASE_INVALID(hal_spec, tmp_base) + && IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group]) ) { pwr_info->IndexBW40_Base[path][group] = tmp_base; if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) @@ -786,7 +841,7 @@ u16 hal_load_pg_txpwr_info_path_5g( } offset++; } - } + } /* OFDM diff 2T ~ 3T */ if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path) && HAL_SPEC_CHK_TX_CNT(hal_spec, 1)) { @@ -1039,10 +1094,10 @@ void hal_load_txpwr_info( if (tx_idx >= max_tx_cnt) break; - hal_data->CCK_24G_Diff[rfpath][tx_idx] = pwr_info_2g->CCK_Diff[rfpath][tx_idx]; - hal_data->OFDM_24G_Diff[rfpath][tx_idx] = pwr_info_2g->OFDM_Diff[rfpath][tx_idx]; - hal_data->BW20_24G_Diff[rfpath][tx_idx] = pwr_info_2g->BW20_Diff[rfpath][tx_idx]; - hal_data->BW40_24G_Diff[rfpath][tx_idx] = pwr_info_2g->BW40_Diff[rfpath][tx_idx]; + hal_data->CCK_24G_Diff[rfpath][tx_idx] = pwr_info_2g->CCK_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; + hal_data->OFDM_24G_Diff[rfpath][tx_idx] = pwr_info_2g->OFDM_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; + hal_data->BW20_24G_Diff[rfpath][tx_idx] = pwr_info_2g->BW20_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; + hal_data->BW40_24G_Diff[rfpath][tx_idx] = pwr_info_2g->BW40_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; } bypass_2g: ; @@ -1074,10 +1129,10 @@ bypass_2g: if (tx_idx >= max_tx_cnt) break; - hal_data->OFDM_5G_Diff[rfpath][tx_idx] = pwr_info_5g->OFDM_Diff[rfpath][tx_idx]; - hal_data->BW20_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW20_Diff[rfpath][tx_idx]; - hal_data->BW40_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW40_Diff[rfpath][tx_idx]; - hal_data->BW80_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW80_Diff[rfpath][tx_idx]; + hal_data->OFDM_5G_Diff[rfpath][tx_idx] = pwr_info_5g->OFDM_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; + hal_data->BW20_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW20_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; + hal_data->BW40_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW40_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; + hal_data->BW80_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW80_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; } bypass_5g: ; @@ -1094,12 +1149,12 @@ void dump_hal_txpwr_info_2g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_ RTW_PRINT_SEL(sel, "CCK-1T base:\n"); RTW_PRINT_SEL(sel, "%4s ", ""); for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++) - _RTW_PRINT_SEL(sel, "%2d ", center_ch_2g[ch_idx]); + _RTW_PRINT_SEL(sel, "%3d ", center_ch_2g[ch_idx]); _RTW_PRINT_SEL(sel, "\n"); for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++) - _RTW_PRINT_SEL(sel, "%2u ", hal_data->Index24G_CCK_Base[path][ch_idx]); + _RTW_PRINT_SEL(sel, "%3u ", hal_data->Index24G_CCK_Base[path][ch_idx]); _RTW_PRINT_SEL(sel, "\n"); } RTW_PRINT_SEL(sel, "\n"); @@ -1120,12 +1175,12 @@ void dump_hal_txpwr_info_2g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_ RTW_PRINT_SEL(sel, "BW40-1S base:\n"); RTW_PRINT_SEL(sel, "%4s ", ""); for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++) - _RTW_PRINT_SEL(sel, "%2d ", center_ch_2g[ch_idx]); + _RTW_PRINT_SEL(sel, "%3d ", center_ch_2g[ch_idx]); _RTW_PRINT_SEL(sel, "\n"); for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++) - _RTW_PRINT_SEL(sel, "%2u ", hal_data->Index24G_BW40_Base[path][ch_idx]); + _RTW_PRINT_SEL(sel, "%3u ", hal_data->Index24G_BW40_Base[path][ch_idx]); _RTW_PRINT_SEL(sel, "\n"); } RTW_PRINT_SEL(sel, "\n"); @@ -1281,10 +1336,10 @@ void dump_hal_txpwr_info_5g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_ * Return dBm or -1 for undefined */ s8 rtw_regsty_get_target_tx_power( - IN PADAPTER Adapter, - IN u8 Band, - IN u8 RfPath, - IN RATE_SECTION RateSection + PADAPTER Adapter, + u8 Band, + u8 RfPath, + RATE_SECTION RateSection ) { struct registry_priv *regsty = adapter_to_regsty(Adapter); @@ -1347,7 +1402,7 @@ bool rtw_regsty_chk_target_tx_power_valid(_adapter *adapter) if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) continue; - if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) + if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) continue; target = rtw_regsty_get_target_tx_power(adapter, band, path, rs); @@ -1365,14 +1420,14 @@ bool rtw_regsty_chk_target_tx_power_valid(_adapter *adapter) /* * PHY_GetTxPowerByRateBase - * -* Return 2 times of dBm +* Return value in unit of TX Gain Index */ u8 PHY_GetTxPowerByRateBase( - IN PADAPTER Adapter, - IN u8 Band, - IN u8 RfPath, - IN RATE_SECTION RateSection + PADAPTER Adapter, + u8 Band, + u8 RfPath, + RATE_SECTION RateSection ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -1404,13 +1459,13 @@ PHY_GetTxPowerByRateBase( return value; } -VOID +void phy_SetTxPowerByRateBase( - IN PADAPTER Adapter, - IN u8 Band, - IN u8 RfPath, - IN RATE_SECTION RateSection, - IN u8 Value + PADAPTER Adapter, + u8 Band, + u8 RfPath, + RATE_SECTION RateSection, + u8 Value ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -1521,9 +1576,9 @@ static void phy_txpwr_by_rate_chk_for_path_dup(_adapter *adapter) } } -VOID +void phy_StoreTxPowerByRateBase( - IN PADAPTER pAdapter + PADAPTER pAdapter ) { struct hal_spec_t *hal_spec = GET_HAL_SPEC(pAdapter); @@ -1560,11 +1615,11 @@ phy_StoreTxPowerByRateBase( if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) continue; - if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) + if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) continue; if (regsty->target_tx_pwr_valid == _TRUE) - base = 2 * rtw_regsty_get_target_tx_power(pAdapter, band, path, rs); + base = hal_spec->txgi_pdbm * rtw_regsty_get_target_tx_power(pAdapter, band, path, rs); else base = _PHY_GetTxPowerByRate(pAdapter, band, path, rate_sec_base[rs]); phy_SetTxPowerByRateBase(pAdapter, band, path, rs, base); @@ -1573,20 +1628,37 @@ phy_StoreTxPowerByRateBase( } } -VOID +static u8 get_val_from_dhex(u32 dhex, u8 i) +{ + return (((dhex >> (i * 8 + 4)) & 0xF)) * 10 + ((dhex >> (i * 8)) & 0xF); +} + +static u8 get_val_from_hex(u32 hex, u8 i) +{ + return (hex >> (i * 8)) & 0xFF; +} + +void PHY_GetRateValuesOfTxPowerByRate( - IN PADAPTER pAdapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Value, - OUT u8 *Rate, - OUT s8 *PwrByRateVal, - OUT u8 *RateNum + PADAPTER pAdapter, + u32 RegAddr, + u32 BitMask, + u32 Value, + u8 *Rate, + s8 *PwrByRateVal, + u8 *RateNum ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(pAdapter); struct dm_struct *pDM_Odm = &pHalData->odmpriv; u8 index = 0, i = 0; + u8 (*get_val)(u32, u8); + + if (pDM_Odm->phy_reg_pg_version == 1) + get_val = get_val_from_dhex; + else + get_val = get_val_from_hex; switch (RegAddr) { case rTxAGC_A_Rate18_06: @@ -1595,10 +1667,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_9M; Rate[2] = MGN_12M; Rate[3] = MGN_18M; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1608,17 +1678,14 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_36M; Rate[2] = MGN_48M; Rate[3] = MGN_54M; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; case rTxAGC_A_CCK1_Mcs32: Rate[0] = MGN_1M; - PwrByRateVal[0] = (s8)((((Value >> (8 + 4)) & 0xF)) * 10 + - ((Value >> 8) & 0xF)); + PwrByRateVal[0] = (s8)get_val(Value, 1); *RateNum = 1; break; @@ -1627,15 +1694,12 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[0] = MGN_2M; Rate[1] = MGN_5_5M; Rate[2] = MGN_11M; - for (i = 1; i < 4; ++i) { - PwrByRateVal[i - 1] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 1; i < 4; ++i) + PwrByRateVal[i - 1] = (s8)get_val(Value, i); *RateNum = 3; } else if (BitMask == 0x000000ff) { Rate[0] = MGN_11M; - PwrByRateVal[0] = (s8)((((Value >> 4) & 0xF)) * 10 + - (Value & 0xF)); + PwrByRateVal[0] = (s8)get_val(Value, 0); *RateNum = 1; } break; @@ -1646,10 +1710,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_MCS1; Rate[2] = MGN_MCS2; Rate[3] = MGN_MCS3; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1659,10 +1721,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_MCS5; Rate[2] = MGN_MCS6; Rate[3] = MGN_MCS7; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1672,10 +1732,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_MCS9; Rate[2] = MGN_MCS10; Rate[3] = MGN_MCS11; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1685,22 +1743,17 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_MCS13; Rate[2] = MGN_MCS14; Rate[3] = MGN_MCS15; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; - break; case rTxAGC_B_CCK1_55_Mcs32: Rate[0] = MGN_1M; Rate[1] = MGN_2M; Rate[2] = MGN_5_5M; - for (i = 1; i < 4; ++i) { - PwrByRateVal[i - 1] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 1; i < 4; ++i) + PwrByRateVal[i - 1] = (s8)get_val(Value, i); *RateNum = 3; break; @@ -1712,10 +1765,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_2M; Rate[2] = MGN_5_5M; Rate[3] = MGN_11M; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1727,10 +1778,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_9M; Rate[2] = MGN_12M; Rate[3] = MGN_18M; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1742,10 +1791,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_36M; Rate[2] = MGN_48M; Rate[3] = MGN_54M; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1757,10 +1804,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_MCS1; Rate[2] = MGN_MCS2; Rate[3] = MGN_MCS3; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1772,10 +1817,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_MCS5; Rate[2] = MGN_MCS6; Rate[3] = MGN_MCS7; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1787,10 +1830,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_MCS9; Rate[2] = MGN_MCS10; Rate[3] = MGN_MCS11; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1802,10 +1843,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_MCS13; Rate[2] = MGN_MCS14; Rate[3] = MGN_MCS15; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1817,10 +1856,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_VHT1SS_MCS1; Rate[2] = MGN_VHT1SS_MCS2; Rate[3] = MGN_VHT1SS_MCS3; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1832,10 +1869,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_VHT1SS_MCS5; Rate[2] = MGN_VHT1SS_MCS6; Rate[3] = MGN_VHT1SS_MCS7; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1847,10 +1882,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_VHT1SS_MCS9; Rate[2] = MGN_VHT2SS_MCS0; Rate[3] = MGN_VHT2SS_MCS1; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1862,10 +1895,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_VHT2SS_MCS3; Rate[2] = MGN_VHT2SS_MCS4; Rate[3] = MGN_VHT2SS_MCS5; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1877,10 +1908,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_VHT2SS_MCS7; Rate[2] = MGN_VHT2SS_MCS8; Rate[3] = MGN_VHT2SS_MCS9; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1892,10 +1921,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_MCS17; Rate[2] = MGN_MCS18; Rate[3] = MGN_MCS19; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1907,10 +1934,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_MCS21; Rate[2] = MGN_MCS22; Rate[3] = MGN_MCS23; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1922,10 +1947,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_VHT3SS_MCS1; Rate[2] = MGN_VHT3SS_MCS2; Rate[3] = MGN_VHT3SS_MCS3; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1937,10 +1960,8 @@ PHY_GetRateValuesOfTxPowerByRate( Rate[1] = MGN_VHT3SS_MCS5; Rate[2] = MGN_VHT3SS_MCS6; Rate[3] = MGN_VHT3SS_MCS7; - for (i = 0; i < 4; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 4; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 4; break; @@ -1950,10 +1971,8 @@ PHY_GetRateValuesOfTxPowerByRate( case 0x1aE8: Rate[0] = MGN_VHT3SS_MCS8; Rate[1] = MGN_VHT3SS_MCS9; - for (i = 0; i < 2; ++i) { - PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 + - ((Value >> (i * 8)) & 0xF)); - } + for (i = 0; i < 2; ++i) + PwrByRateVal[i] = (s8)get_val(Value, i); *RateNum = 2; break; @@ -1965,12 +1984,12 @@ PHY_GetRateValuesOfTxPowerByRate( void PHY_StoreTxPowerByRateNew( - IN PADAPTER pAdapter, - IN u32 Band, - IN u32 RfPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER pAdapter, + u32 Band, + u32 RfPath, + u32 RegAddr, + u32 BitMask, + u32 Data ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -1996,9 +2015,9 @@ PHY_StoreTxPowerByRateNew( } } -VOID +void PHY_InitTxPowerByRate( - IN PADAPTER pAdapter + PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -2010,15 +2029,15 @@ PHY_InitTxPowerByRate( pHalData->TxPwrByRateOffset[band][rfPath][rate] = 0; } -VOID +void phy_store_tx_power_by_rate( - IN PADAPTER pAdapter, - IN u32 Band, - IN u32 RfPath, - IN u32 TxNum, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER pAdapter, + u32 Band, + u32 RfPath, + u32 TxNum, + u32 RegAddr, + u32 BitMask, + u32 Data ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -2031,9 +2050,9 @@ phy_store_tx_power_by_rate( } -VOID +void phy_ConvertTxPowerByRateInDbmToRelativeValues( - IN PADAPTER pAdapter + PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -2123,9 +2142,9 @@ phy_ConvertTxPowerByRateInDbmToRelativeValues( * This function must be called if the value in the PHY_REG_PG.txt(or header) * is exact dBm values */ -VOID +void PHY_TxPowerByRateConfiguration( - IN PADAPTER pAdapter + PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -2135,12 +2154,12 @@ PHY_TxPowerByRateConfiguration( phy_ConvertTxPowerByRateInDbmToRelativeValues(pAdapter); } -VOID +void phy_set_tx_power_index_by_rate_section( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Channel, - IN u8 RateSection + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Channel, + u8 RateSection ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); @@ -2163,8 +2182,8 @@ exit: BOOLEAN phy_GetChnlIndex( - IN u8 Channel, - OUT u8 *ChannelIdx + u8 Channel, + u8 *ChannelIdx ) { u8 i = 0; @@ -2187,15 +2206,14 @@ phy_GetChnlIndex( return bIn24G; } -u8 -PHY_GetTxPowerIndexBase( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - u8 ntx_idx, - IN enum channel_width BandWidth, - IN u8 Channel, - OUT PBOOLEAN bIn24G +u8 phy_get_pg_txpwr_idx( + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, + u8 ntx_idx, + enum channel_width BandWidth, + u8 Channel, + PBOOLEAN bIn24G ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); @@ -2286,7 +2304,7 @@ PHY_GetTxPowerIndexBase( if (Rate >= MGN_6M) txPower = pHalData->Index5G_BW40_Base[RFPath][chnlIdx]; else { - RTW_INFO("===>PHY_GetTxPowerIndexBase: INVALID Rate(0x%02x).\n", Rate); + RTW_INFO("===>%s: INVALID Rate(0x%02x).\n", __func__, Rate); goto exit; } @@ -2338,7 +2356,10 @@ PHY_GetTxPowerIndexBase( } } if (i >= CENTER_CH_5G_80M_NUM) { - rtw_warn_on(1); + #ifdef CONFIG_MP_INCLUDED + if (rtw_mp_mode_check(pAdapter) == _FALSE) + #endif + rtw_warn_on(1); txPower = 0; goto exit; } @@ -2394,7 +2415,7 @@ PHY_GetTxPowerTrackingOffset( /*The same as MRateToHwRate in hal_com.c*/ u8 PHY_GetRateIndexOfTxPowerByRate( - IN u8 Rate + u8 Rate ) { u8 index = 0; @@ -2661,10 +2682,10 @@ PHY_GetRateIndexOfTxPowerByRate( s8 _PHY_GetTxPowerByRate( - IN PADAPTER pAdapter, - IN u8 Band, - IN enum rf_path RFPath, - IN u8 Rate + PADAPTER pAdapter, + u8 Band, + enum rf_path RFPath, + u8 Rate ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -2693,10 +2714,10 @@ exit: s8 PHY_GetTxPowerByRate( - IN PADAPTER pAdapter, - IN u8 Band, - IN enum rf_path RFPath, - IN u8 Rate + PADAPTER pAdapter, + u8 Band, + enum rf_path RFPath, + u8 Rate ) { if (!phy_is_tx_power_by_rate_needed(pAdapter)) @@ -2705,13 +2726,13 @@ PHY_GetTxPowerByRate( return _PHY_GetTxPowerByRate(pAdapter, Band, RFPath, Rate); } -VOID +void PHY_SetTxPowerByRate( - IN PADAPTER pAdapter, - IN u8 Band, - IN enum rf_path RFPath, - IN u8 Rate, - IN s8 Value + PADAPTER pAdapter, + u8 Band, + enum rf_path RFPath, + u8 Rate, + s8 Value ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -2733,15 +2754,45 @@ PHY_SetTxPowerByRate( pHalData->TxPwrByRateOffset[Band][RFPath][rateIndex] = Value; } -VOID +u8 phy_check_under_survey_ch(_adapter *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + _adapter *iface; + struct mlme_ext_priv *mlmeext; + u8 ret = _FALSE; + int i; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (!iface) + continue; + mlmeext = &iface->mlmeextpriv; + + /* check scan state */ + if (mlmeext_scan_state(mlmeext) != SCAN_DISABLE + && mlmeext_scan_state(mlmeext) != SCAN_COMPLETE + && mlmeext_scan_state(mlmeext) != SCAN_BACKING_OP) { + ret = _TRUE; + } else if (mlmeext_scan_state(mlmeext) == SCAN_BACKING_OP + && !mlmeext_chk_scan_backop_flags(mlmeext, SS_BACKOP_TX_RESUME)) { + ret = _TRUE; + } + } + + return ret; +} + +void phy_set_tx_power_level_by_path( - IN PADAPTER Adapter, - IN u8 channel, - IN u8 path + PADAPTER Adapter, + u8 channel, + u8 path ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); BOOLEAN bIsIn24G = (pHalData->current_band_type == BAND_ON_2_4G); + u8 under_survey_ch = phy_check_under_survey_ch(Adapter); + /* if ( pMgntInfo->RegNByteAccess == 0 ) */ { @@ -2749,20 +2800,23 @@ phy_set_tx_power_level_by_path( phy_set_tx_power_index_by_rate_section(Adapter, path, channel, CCK); phy_set_tx_power_index_by_rate_section(Adapter, path, channel, OFDM); - phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS0_MCS7); - if (IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter)) - phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_1SSMCS0_1SSMCS9); - - if (pHalData->NumTotalRFPath >= 2) { - phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS8_MCS15); + if (!under_survey_ch) { + phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS0_MCS7); if (IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter)) - phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_2SSMCS0_2SSMCS9); + phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_1SSMCS0_1SSMCS9); - if (IS_HARDWARE_TYPE_8814A(Adapter)) { - phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS16_MCS23); - phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_3SSMCS0_3SSMCS9); + if (pHalData->NumTotalRFPath >= 2) { + phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS8_MCS15); + + if (IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter)) + phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_2SSMCS0_2SSMCS9); + + if (IS_HARDWARE_TYPE_8814A(Adapter)) { + phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS16_MCS23); + phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_3SSMCS0_3SSMCS9); + } } } } @@ -2772,14 +2826,14 @@ phy_set_tx_power_level_by_path( #define DBG_TX_POWER_IDX 0 #endif -VOID +void PHY_SetTxPowerIndexByRateArray( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN enum channel_width BandWidth, - IN u8 Channel, - IN u8 *Rates, - IN u8 RateArraySize + PADAPTER pAdapter, + enum rf_path RFPath, + enum channel_width BandWidth, + u8 Channel, + u8 *Rates, + u8 RateArraySize ) { u32 powerIndex = 0; @@ -2790,9 +2844,10 @@ PHY_SetTxPowerIndexByRateArray( struct txpwr_idx_comp tic; powerIndex = rtw_hal_get_tx_power_index(pAdapter, RFPath, Rates[i], BandWidth, Channel, &tic); - RTW_INFO("TXPWR: [%c][%s]ch:%u, %s %uT, pwr_idx:%u = %u + (%d=%d:%d) + (%d) + (%d)\n" + RTW_INFO("TXPWR: [%c][%s]ch:%u, %s %uT, pwr_idx:%u(0x%02x) = %u + (%d=%d:%d) + (%d) + (%d) + (%d) + (%d)\n" , rf_path_char(RFPath), ch_width_str(BandWidth), Channel, MGN_RATE_STR(Rates[i]), tic.ntx_idx + 1 - , powerIndex, tic.base, (tic.by_rate > tic.limit ? tic.limit : tic.by_rate), tic.by_rate, tic.limit, tic.tpt, tic.ebias); + , powerIndex, powerIndex, tic.pg, (tic.by_rate > tic.limit ? tic.limit : tic.by_rate), tic.by_rate, tic.limit, tic.tpt + , tic.ebias, tic.btc, tic.dpd); #else powerIndex = phy_get_tx_power_index(pAdapter, RFPath, Rates[i], BandWidth, Channel); #endif @@ -2800,7 +2855,7 @@ PHY_SetTxPowerIndexByRateArray( } } -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT const char *const _txpwr_lmt_rs_str[] = { "CCK", "OFDM", @@ -2811,8 +2866,8 @@ const char *const _txpwr_lmt_rs_str[] = { static s8 phy_GetChannelIndexOfTxPowerLimit( - IN u8 Band, - IN u8 Channel + u8 Band, + u8 Channel ) { s8 channelIndex = -1; @@ -2834,15 +2889,28 @@ phy_GetChannelIndexOfTxPowerLimit( return channelIndex; } +static s8 phy_txpwr_ww_lmt_value(_adapter *adapter) +{ + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); + + if (hal_spec->txgi_max == 63) + return -63; + else if (hal_spec->txgi_max == 127) + return -128; + + rtw_warn_on(1); + return -128; +} + /* * return txpwr limit absolute value -* MAX_POWER_INDEX is returned when NO limit +* hsl_spec->txgi_max is returned when NO limit */ s8 phy_get_txpwr_lmt_abs( - IN PADAPTER Adapter, - IN const char *regd_name, - IN BAND_TYPE Band, - IN enum channel_width bw, + PADAPTER Adapter, + const char *regd_name, + BAND_TYPE Band, + enum channel_width bw, u8 tlrs, u8 ntx_idx, u8 cch, @@ -2852,12 +2920,14 @@ s8 phy_get_txpwr_lmt_abs( struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter); struct rf_ctl_t *rfctl = adapter_to_rfctl(Adapter); HAL_DATA_TYPE *hal_data = GET_HAL_DATA(Adapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter); struct txpwr_lmt_ent *ent = NULL; _irqL irqL; _list *cur, *head; s8 ch_idx; u8 is_ww_regd = 0; - s8 lmt = MAX_POWER_INDEX; + s8 ww_lmt_val = phy_txpwr_ww_lmt_value(Adapter); + s8 lmt = hal_spec->txgi_max; if ((Adapter->registrypriv.RegEnableTxPowerLimit == 2 && hal_data->EEPROMRegulatory != 1) || Adapter->registrypriv.RegEnableTxPowerLimit == 0) @@ -2900,18 +2970,18 @@ s8 phy_get_txpwr_lmt_abs( if (Band == BAND_ON_2_4G) { if (!is_ww_regd) { lmt = ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx]; - if (lmt != -MAX_POWER_INDEX) + if (lmt != ww_lmt_val) goto release_lock; } /* search for min value for WW regd or WW limit */ - lmt = MAX_POWER_INDEX; + lmt = hal_spec->txgi_max; head = &rfctl->txpwr_lmt_list; cur = get_next(head); while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); cur = get_next(cur); - if (ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx] != -MAX_POWER_INDEX) + if (ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx] != ww_lmt_val) lmt = rtw_min(lmt, ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx]); } } @@ -2919,18 +2989,18 @@ s8 phy_get_txpwr_lmt_abs( else if (Band == BAND_ON_5G) { if (!is_ww_regd) { lmt = ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx]; - if (lmt != -MAX_POWER_INDEX) + if (lmt != ww_lmt_val) goto release_lock; } /* search for min value for WW regd or WW limit */ - lmt = MAX_POWER_INDEX; + lmt = hal_spec->txgi_max; head = &rfctl->txpwr_lmt_list; cur = get_next(head); while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); cur = get_next(cur); - if (ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx] != -MAX_POWER_INDEX) + if (ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx] != ww_lmt_val) lmt = rtw_min(lmt, ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx]); } } @@ -2946,7 +3016,7 @@ exit: /* * return txpwr limit diff value -* MAX_POWER_INDEX is returned when NO limit +* hal_spec->txgi_max is returned when NO limit */ inline s8 phy_get_txpwr_lmt(_adapter *adapter , const char *regd_name @@ -2954,8 +3024,9 @@ inline s8 phy_get_txpwr_lmt(_adapter *adapter , u8 rfpath, u8 rs, u8 ntx_idx, u8 cch, u8 lock ) { + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); u8 tlrs; - s8 lmt = MAX_POWER_INDEX; + s8 lmt = hal_spec->txgi_max; if (IS_CCK_RATE_SECTION(rs)) tlrs = TXPWR_LMT_RS_CCK; @@ -2973,7 +3044,7 @@ inline s8 phy_get_txpwr_lmt(_adapter *adapter lmt = phy_get_txpwr_lmt_abs(adapter, regd_name, band, bw, tlrs, ntx_idx, cch, lock); - if (lmt != MAX_POWER_INDEX) { + if (lmt != hal_spec->txgi_max) { /* return diff value */ lmt = lmt - PHY_GetTxPowerByRateBase(adapter, band, rfpath, rs); } @@ -2995,13 +3066,14 @@ PHY_GetTxPowerLimit(_adapter *adapter struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); BOOLEAN no_sc = _FALSE; s8 tlrs = -1, rs = -1; - s8 lmt = MAX_POWER_INDEX; + s8 lmt = hal_spec->txgi_max; u8 tmp_cch = 0; u8 tmp_bw; u8 bw_bmp = 0; - s8 min_lmt = MAX_POWER_INDEX; + s8 min_lmt = hal_spec->txgi_max; u8 final_bw = bw, final_cch = cch; _irqL irqL; @@ -3086,7 +3158,7 @@ PHY_GetTxPowerLimit(_adapter *adapter _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); - if (min_lmt != MAX_POWER_INDEX) { + if (min_lmt != hal_spec->txgi_max) { /* return diff value */ min_lmt = min_lmt - PHY_GetTxPowerByRateBase(adapter, band, rfpath, rs); } @@ -3107,6 +3179,7 @@ exit: static void phy_txpwr_lmt_cck_ofdm_mt_chk(_adapter *adapter) { struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); struct txpwr_lmt_ent *ent; _list *cur, *head; u8 channel, tlrs, ntx_idx; @@ -3127,7 +3200,7 @@ static void phy_txpwr_lmt_cck_ofdm_mt_chk(_adapter *adapter) for (tlrs = TXPWR_LMT_RS_CCK; tlrs <= TXPWR_LMT_RS_OFDM; tlrs++) { for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) { for (channel = 0; channel < CENTER_CH_2G_NUM; ++channel) { - if (ent->lmt_2g[CHANNEL_WIDTH_20][tlrs][channel][ntx_idx] != MAX_POWER_INDEX) { + if (ent->lmt_2g[CHANNEL_WIDTH_20][tlrs][channel][ntx_idx] != hal_spec->txgi_max) { if (tlrs == TXPWR_LMT_RS_CCK) rfctl->txpwr_lmt_2g_cck_ofdm_state |= TXPWR_LMT_HAS_CCK_1T << ntx_idx; else @@ -3152,7 +3225,7 @@ static void phy_txpwr_lmt_cck_ofdm_mt_chk(_adapter *adapter) /* check 5G OFDM state*/ for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) { for (channel = 0; channel < CENTER_CH_5G_ALL_NUM; ++channel) { - if (ent->lmt_5g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_OFDM - 1][channel][ntx_idx] != MAX_POWER_INDEX) { + if (ent->lmt_5g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_OFDM - 1][channel][ntx_idx] != hal_spec->txgi_max) { rfctl->txpwr_lmt_5g_cck_ofdm_state |= TXPWR_LMT_HAS_OFDM_1T << ntx_idx; break; } @@ -3176,6 +3249,7 @@ static void phy_txpwr_lmt_cck_ofdm_mt_chk(_adapter *adapter) static void phy_txpwr_lmt_cross_ref_ht_vht(_adapter *adapter) { struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); struct txpwr_lmt_ent *ent; _list *cur, *head; u8 bw, channel, tlrs, ref_tlrs, ntx_idx; @@ -3210,7 +3284,7 @@ static void phy_txpwr_lmt_cross_ref_ht_vht(_adapter *adapter) for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) { - if (ent->lmt_5g[bw][ref_tlrs - 1][channel][ntx_idx] == MAX_POWER_INDEX) + if (ent->lmt_5g[bw][ref_tlrs - 1][channel][ntx_idx] == hal_spec->txgi_max) continue; if (tlrs == TXPWR_LMT_RS_HT) @@ -3220,7 +3294,7 @@ static void phy_txpwr_lmt_cross_ref_ht_vht(_adapter *adapter) else continue; - if (ent->lmt_5g[bw][tlrs - 1][channel][ntx_idx] != MAX_POWER_INDEX) + if (ent->lmt_5g[bw][tlrs - 1][channel][ntx_idx] != hal_spec->txgi_max) continue; if (tlrs == TXPWR_LMT_RS_HT && ref_tlrs == TXPWR_LMT_RS_VHT) @@ -3246,7 +3320,7 @@ static void phy_txpwr_lmt_cross_ref_ht_vht(_adapter *adapter) if (0) { RTW_INFO("ht_ref_vht_5g_20_40:%d, ht_has_ref_5g_20_40:%d\n", ht_ref_vht_5g_20_40, ht_has_ref_5g_20_40); - RTW_INFO("vht_ref_hht_5g_20_40:%d, vht_has_ref_5g_20_40:%d\n", vht_ref_ht_5g_20_40, vht_has_ref_5g_20_40); + RTW_INFO("vht_ref_ht_5g_20_40:%d, vht_has_ref_5g_20_40:%d\n", vht_ref_ht_5g_20_40, vht_has_ref_5g_20_40); } /* 5G 20M&40M HT all come from VHT*/ @@ -3303,7 +3377,7 @@ void phy_txpwr_limit_bandwidth_chk(_adapter *adapter) continue; if (bw > CHANNEL_WIDTH_40 && tlrs == TXPWR_LMT_RS_HT) continue; - if (tlrs == TXPWR_LMT_RS_VHT && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) + if (tlrs == TXPWR_LMT_RS_VHT && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) continue; for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) { @@ -3395,10 +3469,14 @@ void phy_txpwr_limit_bandwidth_chk(_adapter *adapter) _RTW_PRINT_SEL(RTW_DBGDUMP, "%03u ", cch_by_bw[bw_pos]); _RTW_PRINT_SEL(RTW_DBGDUMP, "limit:"); for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--) { - if (lmt[bw_pos] == MAX_POWER_INDEX) + if (lmt[bw_pos] == hal_spec->txgi_max) _RTW_PRINT_SEL(RTW_DBGDUMP, "N/A "); + else if (lmt[bw_pos] > -hal_spec->txgi_pdbm && lmt[bw_pos] < 0) /* -1 < value < 0 */ + _RTW_PRINT_SEL(RTW_DBGDUMP, "-0.%d", (rtw_abs(lmt[bw_pos]) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); + else if (lmt[bw_pos] % hal_spec->txgi_pdbm) + _RTW_PRINT_SEL(RTW_DBGDUMP, "%2d.%d ", lmt[bw_pos] / hal_spec->txgi_pdbm, (rtw_abs(lmt[bw_pos]) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); else - _RTW_PRINT_SEL(RTW_DBGDUMP, "%2u%s ", lmt[bw_pos] / 2, lmt[bw_pos] % 2 ? ".5" : ""); + _RTW_PRINT_SEL(RTW_DBGDUMP, "%2d ", lmt[bw_pos] / hal_spec->txgi_pdbm); } _RTW_PRINT_SEL(RTW_DBGDUMP, "\n"); } @@ -3420,10 +3498,14 @@ void phy_txpwr_limit_bandwidth_chk(_adapter *adapter) _RTW_PRINT_SEL(RTW_DBGDUMP, "%03u ", cch_by_bw[bw_pos]); _RTW_PRINT_SEL(RTW_DBGDUMP, "limit:"); for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--) { - if (lmt[bw_pos] == MAX_POWER_INDEX) + if (lmt[bw_pos] == hal_spec->txgi_max) _RTW_PRINT_SEL(RTW_DBGDUMP, "N/A "); + else if (lmt[bw_pos] > -hal_spec->txgi_pdbm && lmt[bw_pos] < 0) /* -1 < value < 0 */ + _RTW_PRINT_SEL(RTW_DBGDUMP, "-0.%d", (rtw_abs(lmt[bw_pos]) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); + else if (lmt[bw_pos] % hal_spec->txgi_pdbm) + _RTW_PRINT_SEL(RTW_DBGDUMP, "%2d.%d ", lmt[bw_pos] / hal_spec->txgi_pdbm, (rtw_abs(lmt[bw_pos]) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); else - _RTW_PRINT_SEL(RTW_DBGDUMP, "%2u%s ", lmt[bw_pos] / 2, lmt[bw_pos] % 2 ? ".5" : ""); + _RTW_PRINT_SEL(RTW_DBGDUMP, "%2d ", lmt[bw_pos] / hal_spec->txgi_pdbm); } _RTW_PRINT_SEL(RTW_DBGDUMP, "\n"); } @@ -3448,7 +3530,7 @@ static void phy_txpwr_lmt_post_hdl(_adapter *adapter) _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); #ifdef CONFIG_IEEE80211_BAND_5GHZ - if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) + if (IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) phy_txpwr_lmt_cross_ref_ht_vht(adapter); #endif phy_txpwr_lmt_cck_ofdm_mt_chk(adapter); @@ -3462,8 +3544,8 @@ static void phy_txpwr_lmt_post_hdl(_adapter *adapter) BOOLEAN GetS1ByteIntegerFromStringInDecimal( - IN char *str, - IN OUT s8 *val + char *str, + s8 *val ) { u8 negative = 0; @@ -3493,24 +3575,26 @@ GetS1ByteIntegerFromStringInDecimal( /* * phy_set_tx_power_limit - Parsing TX power limit from phydm array, called by odm_ConfigBB_TXPWR_LMT_XXX in phydm */ -VOID +void phy_set_tx_power_limit( - IN struct dm_struct *pDM_Odm, - IN u8 *Regulation, - IN u8 *Band, - IN u8 *Bandwidth, - IN u8 *RateSection, - IN u8 *ntx, - IN u8 *Channel, - IN u8 *PowerLimit + struct dm_struct *pDM_Odm, + u8 *Regulation, + u8 *Band, + u8 *Bandwidth, + u8 *RateSection, + u8 *ntx, + u8 *Channel, + u8 *PowerLimit ) { -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT PADAPTER Adapter = pDM_Odm->adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter); u8 band = 0, bandwidth = 0, tlrs = 0, channel; u8 ntx_idx; s8 powerLimit = 0, prevPowerLimit, channelIndex; + s8 ww_lmt_val = phy_txpwr_ww_lmt_value(Adapter); if (0) RTW_INFO("Index of power limit table [regulation %s][band %s][bw %s][rate section %s][ntx %s][chnl %s][val %s]\n" @@ -3523,11 +3607,15 @@ phy_set_tx_power_limit( return; } - if (powerLimit < -MAX_POWER_INDEX || powerLimit > MAX_POWER_INDEX) - RTW_PRINT("Illegal power limit value [ch %s][val %s]\n", Channel, PowerLimit); + if (powerLimit != ww_lmt_val) { + if (powerLimit < -hal_spec->txgi_max || powerLimit > hal_spec->txgi_max) + RTW_PRINT("Illegal power limit value [ch %s][val %s]\n", Channel, PowerLimit); - powerLimit = powerLimit > MAX_POWER_INDEX ? MAX_POWER_INDEX : powerLimit; - powerLimit = powerLimit < -MAX_POWER_INDEX ? -MAX_POWER_INDEX + 1 : powerLimit; + if (powerLimit > hal_spec->txgi_max) + powerLimit = hal_spec->txgi_max; + else if (powerLimit < -hal_spec->txgi_max) + powerLimit = ww_lmt_val + 1; + } if (eqNByte(RateSection, (u8 *)("CCK"), 3)) tlrs = TXPWR_LMT_RS_CCK; @@ -3606,22 +3694,22 @@ phy_set_tx_power_limit( u8 phy_get_tx_power_index( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN enum channel_width BandWidth, - IN u8 Channel + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, + enum channel_width BandWidth, + u8 Channel ) { return rtw_hal_get_tx_power_index(pAdapter, RFPath, Rate, BandWidth, Channel, NULL); } -VOID +void PHY_SetTxPowerIndex( - IN PADAPTER pAdapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate + PADAPTER pAdapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate ) { rtw_hal_set_tx_power_index(pAdapter, PowerIndex, RFPath, Rate); @@ -3639,8 +3727,8 @@ void dump_tx_power_idx_title(void *sel, _adapter *adapter) _RTW_PRINT_SEL(sel, ", cch40:%u", hal_data->cch_40); _RTW_PRINT_SEL(sel, ", cch20:%u\n", hal_data->cch_20); - RTW_PRINT_SEL(sel, "%-4s %-9s %2s %-3s %-4s %-3s %-4s %-4s %-3s %-5s\n" - , "path", "rate", "", "pwr", "base", "", "(byr", "lmt)", "tpt", "ebias"); + RTW_PRINT_SEL(sel, "%-4s %-9s %2s %-3s%6s %-3s %-3s %-4s %-4s %-3s %-5s %-3s %-3s\n" + , "path", "rate", "", "pwr", "", "pg", "", "(byr", "lmt)", "tpt", "ebias", "btc", "dpd"); } void dump_tx_power_idx_by_path_rs(void *sel, _adapter *adapter, u8 rfpath, u8 rs) @@ -3667,15 +3755,16 @@ void dump_tx_power_idx_by_path_rs(void *sel, _adapter *adapter, u8 rfpath, u8 rs if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) return; - if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) + if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) return; for (i = 0; i < rates_by_sections[rs].rate_num; i++) { power_idx = rtw_hal_get_tx_power_index(adapter, rfpath, rates_by_sections[rs].rates[i], bw, cch, &tic); - RTW_PRINT_SEL(sel, "%4c %9s %uT %3u %4u %3d (%3d %3d) %3d %5d\n" + RTW_PRINT_SEL(sel, "%4c %9s %uT %3u(0x%02x) %3u %3d (%3d %3d) %3d %5d %3d %3d\n" , rf_path_char(rfpath), MGN_RATE_STR(rates_by_sections[rs].rates[i]), tic.ntx_idx + 1 - , power_idx, tic.base, (tic.by_rate > tic.limit ? tic.limit : tic.by_rate), tic.by_rate, tic.limit, tic.tpt, tic.ebias); + , power_idx, power_idx, tic.pg, (tic.by_rate > tic.limit ? tic.limit : tic.by_rate) + , tic.by_rate, tic.limit, tic.tpt, tic.ebias, tic.btc, tic.dpd); } } @@ -3694,7 +3783,7 @@ bool phy_is_tx_power_limit_needed(_adapter *adapter) HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter)); -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT if (regsty->RegEnableTxPowerLimit == 1 || (regsty->RegEnableTxPowerLimit == 2 && hal_data->EEPROMRegulatory == 1)) return _TRUE; @@ -3761,7 +3850,7 @@ exit: return ret; } -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT int phy_load_tx_power_limit(_adapter *adapter, u8 chk_file) { HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); @@ -3822,7 +3911,7 @@ void phy_load_tx_power_ext_info(_adapter *adapter, u8 chk_file) ) phy_load_tx_power_by_rate(adapter, chk_file); -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT if (phy_is_tx_power_limit_needed(adapter)) phy_load_tx_power_limit(adapter, chk_file); #endif @@ -3846,7 +3935,7 @@ void dump_tx_power_ext_info(void *sel, _adapter *adapter) if (regsty->target_tx_pwr_valid == _TRUE) RTW_PRINT_SEL(sel, "target_tx_power: from registry\n"); else if (phy_is_tx_power_by_rate_needed(adapter)) - RTW_PRINT_SEL(sel, "target_tx_power: from power by rate\n"); + RTW_PRINT_SEL(sel, "target_tx_power: from power by rate\n"); else RTW_PRINT_SEL(sel, "target_tx_power: unavailable\n"); @@ -3890,20 +3979,22 @@ void dump_target_tx_power(void *sel, _adapter *adapter) if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) continue; - if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) + if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) continue; target = PHY_GetTxPowerByRateBase(adapter, band, path, rs); - if (target % 2) - _RTW_PRINT_SEL(sel, "%7s: %2d.5\n", rate_section_str(rs), target / 2); - else - _RTW_PRINT_SEL(sel, "%7s: %4d\n", rate_section_str(rs), target / 2); + if (target % hal_spec->txgi_pdbm) { + _RTW_PRINT_SEL(sel, "%7s: %2d.%d\n", rate_section_str(rs) + , target / hal_spec->txgi_pdbm, (target % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); + } else { + _RTW_PRINT_SEL(sel, "%7s: %5d\n", rate_section_str(rs) + , target / hal_spec->txgi_pdbm); + } } } } -exit: return; } @@ -3934,10 +4025,10 @@ void dump_tx_power_by_rate(void *sel, _adapter *adapter) if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) continue; - if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) + if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) continue; - if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) + if (IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) max_rate_num = 10; else max_rate_num = 8; @@ -3950,13 +4041,14 @@ void dump_tx_power_by_rate(void *sel, _adapter *adapter) for (n = rate_num - 1; n >= 0; n--) { by_rate_offset = PHY_GetTxPowerByRate(adapter, band, path, rates_by_sections[rs].rates[n]); - if ((base + by_rate_offset) % 2) - _RTW_PRINT_SEL(sel, "%2d.5 ", (base + by_rate_offset) / 2); - else - _RTW_PRINT_SEL(sel, "%4d ", (base + by_rate_offset) / 2); + if ((base + by_rate_offset) % hal_spec->txgi_pdbm) { + _RTW_PRINT_SEL(sel, "%2d.%d ", (base + by_rate_offset) / hal_spec->txgi_pdbm + , ((base + by_rate_offset) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); + } else + _RTW_PRINT_SEL(sel, "%5d ", (base + by_rate_offset) / hal_spec->txgi_pdbm); } for (n = 0; n < max_rate_num - rate_num; n++) - _RTW_PRINT_SEL(sel, "%4s ", ""); + _RTW_PRINT_SEL(sel, "%5s ", ""); _RTW_PRINT_SEL(sel, "|"); @@ -3998,8 +4090,8 @@ int rtw_get_phy_file_path(_adapter *adapter, const char *file_name) #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE int phy_ConfigMACWithParaFile( - IN PADAPTER Adapter, - IN char *pFileName + PADAPTER Adapter, + char *pFileName ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); @@ -4014,7 +4106,8 @@ phy_ConfigMACWithParaFile( if ((pHalData->mac_reg_len == 0) && (pHalData->mac_reg == NULL)) { rtw_get_phy_file_path(Adapter, pFileName); - if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) { + if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, + MAX_PARA_FILE_BUF_LEN) == _TRUE) { rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; @@ -4060,9 +4153,9 @@ phy_ConfigMACWithParaFile( int phy_ConfigBBWithParaFile( - IN PADAPTER Adapter, - IN char *pFileName, - IN u32 ConfigType + PADAPTER Adapter, + char *pFileName, + u32 ConfigType ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -4093,7 +4186,8 @@ phy_ConfigBBWithParaFile( if ((pBufLen != NULL) && (*pBufLen == 0) && (pBuf == NULL)) { rtw_get_phy_file_path(Adapter, pFileName); - if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) { + if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, + MAX_PARA_FILE_BUF_LEN) == _TRUE) { rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; @@ -4169,7 +4263,7 @@ phy_ConfigBBWithParaFile( return rtStatus; } -VOID +void phy_DecryptBBPgParaFile( PADAPTER Adapter, char *buffer @@ -4207,14 +4301,19 @@ phy_DecryptBBPgParaFile( } } +#ifndef DBG_TXPWR_BY_RATE_FILE_PARSE +#define DBG_TXPWR_BY_RATE_FILE_PARSE 0 +#endif + int phy_ParseBBPgParaFile( PADAPTER Adapter, char *buffer ) { - int rtStatus = _SUCCESS; + int rtStatus = _FAIL; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter); char *szLine, *ptmp; u32 u4bRegOffset, u4bRegMask, u4bRegValue; u32 u4bMove; @@ -4222,8 +4321,6 @@ phy_ParseBBPgParaFile( u8 tx_num = 0; u8 band = 0, rf_path = 0; - /* RTW_INFO("=====>phy_ParseBBPgParaFile()\n"); */ - if (Adapter->registrypriv.RegDecryptCustomFile == 1) phy_DecryptBBPgParaFile(Adapter, buffer); @@ -4235,112 +4332,25 @@ phy_ParseBBPgParaFile( if (!IsCommentString(szLine)) { /* Get header info (relative value or exact value) */ if (firstLine) { - if (eqNByte(szLine, (u8 *)("#[v1]"), 5)) { - + if (eqNByte(szLine, (u8 *)("#[v1]"), 5) + || eqNByte(szLine, (u8 *)("#[v2]"), 5)) pHalData->odmpriv.phy_reg_pg_version = szLine[3] - '0'; - /* RTW_INFO("This is a new format PHY_REG_PG.txt\n"); */ - } else if (eqNByte(szLine, (u8 *)("#[v0]"), 5)) { - pHalData->odmpriv.phy_reg_pg_version = szLine[3] - '0'; - /* RTW_INFO("This is a old format PHY_REG_PG.txt ok\n"); */ - } else { - RTW_INFO("The format in PHY_REG_PG are invalid %s\n", szLine); - return _FAIL; + else { + RTW_ERR("The format in PHY_REG_PG are invalid %s\n", szLine); + goto exit; } if (eqNByte(szLine + 5, (u8 *)("[Exact]#"), 8)) { pHalData->odmpriv.phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE; - /* RTW_INFO("The values in PHY_REG_PG are exact values ok\n"); */ - firstLine = _FALSE; - continue; - } else if (eqNByte(szLine + 5, (pu1Byte)("[Relative]#"), 11)) { - pHalData->odmpriv.phy_reg_pg_value_type = PHY_REG_PG_RELATIVE_VALUE; - /* RTW_INFO("The values in PHY_REG_PG are relative values ok\n"); */ firstLine = _FALSE; continue; } else { - RTW_INFO("The values in PHY_REG_PG are invalid %s\n", szLine); - return _FAIL; + RTW_ERR("The values in PHY_REG_PG are invalid %s\n", szLine); + goto exit; } } - if (pHalData->odmpriv.phy_reg_pg_version == 0) { - /* Get 1st hex value as register offset. */ - if (GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) { - szLine += u4bMove; - if (u4bRegOffset == 0xffff) { - /* Ending. */ - break; - } - - /* Get 2nd hex value as register mask. */ - if (GetHexValueFromString(szLine, &u4bRegMask, &u4bMove)) - szLine += u4bMove; - else - return _FAIL; - - if (pHalData->odmpriv.phy_reg_pg_value_type == PHY_REG_PG_RELATIVE_VALUE) { - /* Get 3rd hex value as register value. */ - if (GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) { - phy_store_tx_power_by_rate(Adapter, 0, 0, 1, u4bRegOffset, u4bRegMask, u4bRegValue); - /* RTW_INFO("[ADDR] %03X=%08X Mask=%08x\n", u4bRegOffset, u4bRegValue, u4bRegMask); */ - } else - return _FAIL; - } else if (pHalData->odmpriv.phy_reg_pg_value_type == PHY_REG_PG_EXACT_VALUE) { - u32 combineValue = 0; - u8 integer = 0, fraction = 0; - - if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove)) - szLine += u4bMove; - else - return _FAIL; - - integer *= 2; - if (fraction == 5) - integer += 1; - combineValue |= (((integer / 10) << 4) + (integer % 10)); - /* RTW_INFO(" %d", integer ); */ - - if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove)) - szLine += u4bMove; - else - return _FAIL; - - integer *= 2; - if (fraction == 5) - integer += 1; - combineValue <<= 8; - combineValue |= (((integer / 10) << 4) + (integer % 10)); - /* RTW_INFO(" %d", integer ); */ - - if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove)) - szLine += u4bMove; - else - return _FAIL; - - integer *= 2; - if (fraction == 5) - integer += 1; - combineValue <<= 8; - combineValue |= (((integer / 10) << 4) + (integer % 10)); - /* RTW_INFO(" %d", integer ); */ - - if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove)) - szLine += u4bMove; - else - return _FAIL; - - integer *= 2; - if (fraction == 5) - integer += 1; - combineValue <<= 8; - combineValue |= (((integer / 10) << 4) + (integer % 10)); - /* RTW_INFO(" %d", integer ); */ - phy_store_tx_power_by_rate(Adapter, 0, 0, 1, u4bRegOffset, u4bRegMask, combineValue); - - /* RTW_INFO("[ADDR] 0x%3x = 0x%4x\n", u4bRegOffset, combineValue ); */ - } - } - } else if (pHalData->odmpriv.phy_reg_pg_version > 0) { + if (pHalData->odmpriv.phy_reg_pg_version > 0) { u32 index = 0, cnt = 0; if (eqNByte(szLine, "0xffff", 6)) @@ -4357,12 +4367,13 @@ phy_ParseBBPgParaFile( band = BAND_ON_5G; index += 6; } else { - RTW_INFO("Invalid band %s in PHY_REG_PG.txt\n", szLine); - return _FAIL; + RTW_ERR("Invalid band %s in PHY_REG_PG.txt\n", szLine); + goto exit; } rf_path = szLine[index] - 'A'; - /* RTW_INFO(" Table label Band %d, RfPath %d\n", band, rf_path ); */ + if (DBG_TXPWR_BY_RATE_FILE_PARSE) + RTW_INFO(" Table label Band %d, RfPath %d\n", band, rf_path ); } else { /* load rows of tables */ if (szLine[1] == '1') tx_num = RF_1TX; @@ -4373,8 +4384,8 @@ phy_ParseBBPgParaFile( else if (szLine[1] == '4') tx_num = RF_4TX; else { - RTW_INFO("Invalid row in PHY_REG_PG.txt '%c'(%d)\n", szLine[1], szLine[1]); - return _FAIL; + RTW_ERR("Invalid row in PHY_REG_PG.txt '%c'(%d)\n", szLine[1], szLine[1]); + goto exit; } while (szLine[index] != ']') @@ -4386,88 +4397,91 @@ phy_ParseBBPgParaFile( if (GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) szLine += u4bMove; else - return _FAIL; + goto exit; /* Get 2nd hex value as register mask. */ if (GetHexValueFromString(szLine, &u4bRegMask, &u4bMove)) szLine += u4bMove; else - return _FAIL; + goto exit; - if (pHalData->odmpriv.phy_reg_pg_value_type == PHY_REG_PG_RELATIVE_VALUE) { - /* Get 3rd hex value as register value. */ - if (GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) { - phy_store_tx_power_by_rate(Adapter, band, rf_path, tx_num, u4bRegOffset, u4bRegMask, u4bRegValue); - /* RTW_INFO("[ADDR] %03X (tx_num %d) =%08X Mask=%08x\n", u4bRegOffset, tx_num, u4bRegValue, u4bRegMask); */ - } else - return _FAIL; - } else if (pHalData->odmpriv.phy_reg_pg_value_type == PHY_REG_PG_EXACT_VALUE) { + if (pHalData->odmpriv.phy_reg_pg_value_type == PHY_REG_PG_EXACT_VALUE) { u32 combineValue = 0; u8 integer = 0, fraction = 0; if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove)) szLine += u4bMove; else - return _FAIL; + goto exit; - integer *= 2; - if (fraction == 5) - integer += 1; - combineValue |= (((integer / 10) << 4) + (integer % 10)); - /* RTW_INFO(" %d", integer ); */ + integer *= hal_spec->txgi_pdbm; + integer += ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100; + if (pHalData->odmpriv.phy_reg_pg_version == 1) + combineValue |= (((integer / 10) << 4) + (integer % 10)); + else + combineValue |= integer; if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove)) szLine += u4bMove; else - return _FAIL; + goto exit; - integer *= 2; - if (fraction == 5) - integer += 1; + integer *= hal_spec->txgi_pdbm; + integer += ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100; combineValue <<= 8; - combineValue |= (((integer / 10) << 4) + (integer % 10)); - /* RTW_INFO(" %d", integer ); */ + if (pHalData->odmpriv.phy_reg_pg_version == 1) + combineValue |= (((integer / 10) << 4) + (integer % 10)); + else + combineValue |= integer; if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove)) szLine += u4bMove; else - return _FAIL; + goto exit; - integer *= 2; - if (fraction == 5) - integer += 1; + integer *= hal_spec->txgi_pdbm; + integer += ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100; combineValue <<= 8; - combineValue |= (((integer / 10) << 4) + (integer % 10)); - /* RTW_INFO(" %d", integer ); */ + if (pHalData->odmpriv.phy_reg_pg_version == 1) + combineValue |= (((integer / 10) << 4) + (integer % 10)); + else + combineValue |= integer; if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove)) szLine += u4bMove; else - return _FAIL; + goto exit; - integer *= 2; - if (fraction == 5) - integer += 1; + integer *= hal_spec->txgi_pdbm; + integer += ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100; combineValue <<= 8; - combineValue |= (((integer / 10) << 4) + (integer % 10)); - /* RTW_INFO(" %d", integer ); */ + if (pHalData->odmpriv.phy_reg_pg_version == 1) + combineValue |= (((integer / 10) << 4) + (integer % 10)); + else + combineValue |= integer; + phy_store_tx_power_by_rate(Adapter, band, rf_path, tx_num, u4bRegOffset, u4bRegMask, combineValue); - /* RTW_INFO("[ADDR] 0x%3x (tx_num %d) = 0x%4x\n", u4bRegOffset, tx_num, combineValue ); */ + if (DBG_TXPWR_BY_RATE_FILE_PARSE) + RTW_INFO("addr:0x%3x mask:0x%08x %dTx = 0x%08x\n", u4bRegOffset, u4bRegMask, tx_num + 1, combineValue); } } } } } } - /* RTW_INFO("<=====phy_ParseBBPgParaFile()\n"); */ + + rtStatus = _SUCCESS; + +exit: + RTW_INFO("%s return %d\n", __func__, rtStatus); return rtStatus; } int phy_ConfigBBWithPgParaFile( - IN PADAPTER Adapter, - IN const char *pFileName) + PADAPTER Adapter, + const char *pFileName) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); int rlen = 0, rtStatus = _FAIL; @@ -4479,7 +4493,8 @@ phy_ConfigBBWithPgParaFile( if (pHalData->bb_phy_reg_pg == NULL) { rtw_get_phy_file_path(Adapter, pFileName); - if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) { + if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, + MAX_PARA_FILE_BUF_LEN) == _TRUE) { rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; @@ -4501,7 +4516,7 @@ phy_ConfigBBWithPgParaFile( if (rtStatus == _SUCCESS) { /* RTW_INFO("phy_ConfigBBWithPgParaFile(): read %s ok\n", pFileName); */ - phy_ParseBBPgParaFile(Adapter, pHalData->para_file_buf); + rtStatus = phy_ParseBBPgParaFile(Adapter, pHalData->para_file_buf); } else RTW_INFO("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); @@ -4512,8 +4527,8 @@ phy_ConfigBBWithPgParaFile( int phy_ConfigBBWithMpParaFile( - IN PADAPTER Adapter, - IN char *pFileName + PADAPTER Adapter, + char *pFileName ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -4528,7 +4543,8 @@ phy_ConfigBBWithMpParaFile( if ((pHalData->bb_phy_reg_mp_len == 0) && (pHalData->bb_phy_reg_mp == NULL)) { rtw_get_phy_file_path(Adapter, pFileName); - if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) { + if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, + MAX_PARA_FILE_BUF_LEN) == _TRUE) { rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; @@ -4598,9 +4614,9 @@ phy_ConfigBBWithMpParaFile( int PHY_ConfigRFWithParaFile( - IN PADAPTER Adapter, - IN char *pFileName, - IN enum rf_path eRFPath + PADAPTER Adapter, + char *pFileName, + enum rf_path eRFPath ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -4632,7 +4648,8 @@ PHY_ConfigRFWithParaFile( if ((pBufLen != NULL) && (*pBufLen == 0) && (pBuf == NULL)) { rtw_get_phy_file_path(Adapter, pFileName); - if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) { + if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, + MAX_PARA_FILE_BUF_LEN) == _TRUE) { rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; @@ -4720,7 +4737,7 @@ PHY_ConfigRFWithParaFile( return rtStatus; } -VOID +void initDeltaSwingIndexTables( PADAPTER Adapter, char *Band, @@ -4812,8 +4829,8 @@ initDeltaSwingIndexTables( int PHY_ConfigRFWithTxPwrTrackParaFile( - IN PADAPTER Adapter, - IN char *pFileName + PADAPTER Adapter, + char *pFileName ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -4831,7 +4848,8 @@ PHY_ConfigRFWithTxPwrTrackParaFile( if ((pHalData->rf_tx_pwr_track_len == 0) && (pHalData->rf_tx_pwr_track == NULL)) { rtw_get_phy_file_path(Adapter, pFileName); - if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) { + if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, + MAX_PARA_FILE_BUF_LEN) == _TRUE) { rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; @@ -4908,7 +4926,7 @@ PHY_ConfigRFWithTxPwrTrackParaFile( return rtStatus; } -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT #ifndef DBG_TXPWR_LMT_FILE_PARSE #define DBG_TXPWR_LMT_FILE_PARSE 0 @@ -5036,17 +5054,15 @@ phy_ParsePowerLimitTableFile( int rtStatus = _FAIL; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter); struct dm_struct *pDM_Odm = &(pHalData->odmpriv); u8 loadingStage = LD_STAGE_EXC_MAPPING; u32 i = 0, forCnt = 0; - u8 limitValue = 0, fraction = 0, negative = 0; char *szLine, *ptmp; char band[10], bandwidth[10], rateSection[10], ntx[10], colNumBuf[10]; char **regulation = NULL; u8 colNum = 0; - RTW_INFO("%s enter\n", __func__); - if (Adapter->registrypriv.RegDecryptCustomFile == 1) phy_DecryptBBPgParaFile(Adapter, buffer); @@ -5084,10 +5100,10 @@ phy_ParsePowerLimitTableFile( szLine[--i] = ' '; /* return the space in front of the regulation info */ /* Parse the label of the table */ - _rtw_memset((PVOID) band, 0, 10); - _rtw_memset((PVOID) bandwidth, 0, 10); - _rtw_memset((PVOID) ntx, 0, 10); - _rtw_memset((PVOID) rateSection, 0, 10); + _rtw_memset((void *) band, 0, 10); + _rtw_memset((void *) bandwidth, 0, 10); + _rtw_memset((void *) ntx, 0, 10); + _rtw_memset((void *) rateSection, 0, 10); if (!ParseQualifiedString(szLine, &i, band, ' ', ',')) { RTW_ERR("Fail to parse band!\n"); goto exit; @@ -5132,7 +5148,7 @@ phy_ParsePowerLimitTableFile( while (szLine[i] == ' ' || szLine[i] == '\t') ++i; - _rtw_memset((PVOID) colNumBuf, 0, 10); + _rtw_memset((void *) colNumBuf, 0, 10); if (!ParseQualifiedString(szLine, &i, colNumBuf, '#', '#')) { RTW_ERR("Fail to parse column number!\n"); goto exit; @@ -5237,110 +5253,59 @@ phy_ParsePowerLimitTableFile( ++i; /* load the power limit value */ - cnt = 0; - fraction = 0; - negative = 0; - _rtw_memset((PVOID) powerLimit, 0, 10); + _rtw_memset((void *) powerLimit, 0, 10); - while ((szLine[i] >= '0' && szLine[i] <= '9') || szLine[i] == '.' + if (szLine[i] == 'W' && szLine[i + 1] == 'W') { + /* + * case "WW" assign special ww value + * means to get minimal limit in other regulations at same channel + */ + s8 ww_value = phy_txpwr_ww_lmt_value(Adapter); + + sprintf(powerLimit, "%d", ww_value); + i += 2; + + } else if (szLine[i] == 'N' && szLine[i + 1] == 'A') { + /* + * case "NA" assign max txgi value + * means no limitation + */ + sprintf(powerLimit, "%d", hal_spec->txgi_max); + i += 2; + + } else if ((szLine[i] >= '0' && szLine[i] <= '9') || szLine[i] == '.' || szLine[i] == '+' || szLine[i] == '-' - ) { - /* try to get valid decimal number */ + ){ + /* case of dBm value */ + u8 integer = 0, fraction = 0, negative = 0; + u32 u4bMove; + s8 lmt = 0; + if (szLine[i] == '+' || szLine[i] == '-') { - if (cnt != 0) { - RTW_ERR("Wrong position for sign '%c'\n", szLine[i]); - goto exit; - } - if (szLine[i] == '-') { + if (szLine[i] == '-') negative = 1; - ++i; - continue; - } - - } else if (szLine[i] == '.') { - if ((szLine[i + 1] >= '0' && szLine[i + 1] <= '9')) { - fraction = szLine[i + 1]; - i += 2; - } else { - RTW_ERR("Wrong fraction '%c'(%d)\n", szLine[i + 1], szLine[i + 1]); - goto exit; - } - - break; + i++; } - powerLimit[cnt] = szLine[i]; - ++cnt; - ++i; - } - - if (powerLimit[0] == '\0') { - if (szLine[i] == 'W' && szLine[i + 1] == 'W') { - /* - * case "WW" assign special value -63 - * means to get minimal limit in other regulations at same channel - */ - powerLimit[0] = '-'; - powerLimit[1] = '6'; - powerLimit[2] = '3'; - i += 2; - } else if (szLine[i] == 'N' && szLine[i + 1] == 'A') { - /* - * case "NA" assign special value 63 - * means no limitation - */ - powerLimit[0] = '6'; - powerLimit[1] = '3'; - i += 2; - } else { - RTW_ERR("Wrong limit expression \"%c%c\"(%d, %d)\n" - , szLine[i], szLine[i + 1], szLine[i], szLine[i + 1]); - goto exit; - } - } else { - /* transform dicimal value to power index */ - if (!GetU1ByteIntegerFromStringInDecimal(powerLimit, &limitValue)) { - RTW_ERR("Limit \"%s\" is not valid decimal\n", powerLimit); + if (GetFractionValueFromString(&szLine[i], &integer, &fraction, &u4bMove)) + i += u4bMove; + else { + RTW_ERR("Limit \"%s\" is not valid decimal\n", &szLine[i]); goto exit; } - limitValue *= 2; - cnt = 0; - + /* transform to string of value in unit of txgi */ + lmt = integer * hal_spec->txgi_pdbm + ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100; if (negative) - powerLimit[cnt++] = '-'; + lmt = -lmt; + sprintf(powerLimit, "%d", lmt); - if (fraction == '5') - ++limitValue; - - /* the value is greater or equal to 100 */ - if (limitValue >= 100) { - powerLimit[cnt++] = limitValue / 100 + '0'; - limitValue %= 100; - - if (limitValue >= 10) { - powerLimit[cnt++] = limitValue / 10 + '0'; - limitValue %= 10; - } else - powerLimit[cnt++] = '0'; - - powerLimit[cnt++] = limitValue + '0'; - } - /* the value is greater or equal to 10 */ - else if (limitValue >= 10) { - powerLimit[cnt++] = limitValue / 10 + '0'; - limitValue %= 10; - powerLimit[cnt++] = limitValue + '0'; - } - /* the value is less than 10 */ - else - powerLimit[cnt++] = limitValue + '0'; - - powerLimit[cnt] = '\0'; + } else { + RTW_ERR("Wrong limit expression \"%c%c\"(%d, %d)\n" + , szLine[i], szLine[i + 1], szLine[i], szLine[i + 1]); + goto exit; } - /* RTW_INFO("ch%s => %s\n", channel, powerLimit); */ - /* store the power limit value */ phy_set_tx_power_limit(pDM_Odm, (u8 *)regulation[forCnt], (u8 *)band, (u8 *)bandwidth, (u8 *)rateSection, (u8 *)ntx, (u8 *)channel, (u8 *)powerLimit); @@ -5369,8 +5334,8 @@ exit: int PHY_ConfigRFWithPowerLimitTableParaFile( - IN PADAPTER Adapter, - IN const char *pFileName + PADAPTER Adapter, + const char *pFileName ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -5383,7 +5348,8 @@ PHY_ConfigRFWithPowerLimitTableParaFile( if (pHalData->rf_tx_pwr_lmt == NULL) { rtw_get_phy_file_path(Adapter, pFileName); - if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) { + if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, + MAX_PARA_FILE_BUF_LEN) == _TRUE) { rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; diff --git a/hal/hal_dm.c b/hal/hal_dm.c index 8836589..e645102 100644 --- a/hal/hal_dm.c +++ b/hal/hal_dm.c @@ -77,9 +77,14 @@ void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter) phydm_fwoffload_ability_clear(p_dm_odm, PHYDM_RF_IQK_OFFLOAD); RTW_INFO("IQK FW offload:%s\n", hal->RegIQKFWOffload ? "enable" : "disable"); + + if (rtw_mi_check_status(adapter, MI_LINKED)) { + //LPS_Leave(adapter, "SWITCH_IQK_OFFLOAD"); + halrf_iqk_trigger(p_dm_odm, _FALSE); + } } -#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1)) +#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) void rtw_phydm_iqk_trigger(_adapter *adapter) { struct dm_struct *p_dm_odm = adapter_to_phydm(adapter); @@ -87,10 +92,15 @@ void rtw_phydm_iqk_trigger(_adapter *adapter) u8 segment = _FALSE; u8 rfk_forbidden = _FALSE; - /*segment = _rtw_phydm_iqk_segment_chk(adapter);*/ halrf_cmn_info_set(p_dm_odm, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden); +#if (RTL8822C_SUPPORT == 1) + /* halrf_cmn_info_set(p_dm_odm, HALRF_CMNINFO_IQK_SEGMENT, segment); to do */ + halrf_rf_k_connect_trigger(p_dm_odm, _TRUE, SEGMENT_FREE); +#else + /*segment = _rtw_phydm_iqk_segment_chk(adapter);*/ halrf_cmn_info_set(p_dm_odm, HALRF_CMNINFO_IQK_SEGMENT, segment); halrf_segment_iqk_trigger(p_dm_odm, clear, segment); +#endif } #endif @@ -98,7 +108,7 @@ void rtw_phydm_iqk_trigger_dbg(_adapter *adapter, bool recovery, bool clear, boo { struct dm_struct *p_dm_odm = adapter_to_phydm(adapter); -#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1)) +#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) halrf_segment_iqk_trigger(p_dm_odm, clear, segment); #else halrf_iqk_trigger(p_dm_odm, recovery); @@ -179,30 +189,140 @@ void record_ra_info(void *p_dm_void, u8 macid, struct cmn_sta_info *p_sta, u64 r } } +#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR +void rtw_phydm_fill_desc_dpt(void *dm, u8 *desc, u8 dpt_lv) +{ + struct dm_struct *p_dm = (struct dm_struct *)dm; + _adapter *adapter = p_dm->adapter; + + switch (rtw_get_chip_type(adapter)) { +/* + #ifdef CONFIG_RTL8188F + case RTL8188F: + break; + #endif + + #ifdef CONFIG_RTL8723B + case RTL8723B : + break; + #endif + + #ifdef CONFIG_RTL8703B + case RTL8703B : + break; + #endif + + #ifdef CONFIG_RTL8812A + case RTL8812 : + break; + #endif + + #ifdef CONFIG_RTL8821A + case RTL8821: + break; + #endif + + #ifdef CONFIG_RTL8814A + case RTL8814A : + break; + #endif + + #ifdef CONFIG_RTL8192F + case RTL8192F : + break; + #endif +*/ +/* + #ifdef CONFIG_RTL8192E + case RTL8192E : + SET_TX_DESC_TX_POWER_0_PSET_92E(desc, dpt_lv); + break; + #endif +*/ + + #ifdef CONFIG_RTL8821C + case RTL8821C : + SET_TX_DESC_TXPWR_OFSET_8821C(desc, dpt_lv); + break; + #endif + + default : + RTW_ERR("%s IC not support dynamic tx power\n", __func__); + break; + } +} +void rtw_phydm_set_dyntxpwr(_adapter *adapter, u8 *desc, u8 mac_id) +{ + struct dm_struct *dm = adapter_to_phydm(adapter); + + odm_set_dyntxpwr(dm, desc, mac_id); +} +#endif + +#ifdef CONFIG_RTW_TX_2PATH_EN +void rtw_phydm_tx_2path_en(_adapter *adapter) +{ + struct dm_struct *dm = adapter_to_phydm(adapter); + + phydm_tx_2path(dm); +} +#endif +#ifdef CONFIG_TDMADIG +void rtw_phydm_tdmadig(_adapter *adapter, u8 state) +{ + struct registry_priv *pregistrypriv = &adapter->registrypriv; + struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); + struct dm_struct *dm = adapter_to_phydm(adapter); + u8 tdma_dig_en; + + switch (state) { + case TDMADIG_INIT: + phydm_tdma_dig_para_upd(dm, ENABLE_TDMA, pregistrypriv->tdmadig_en); + phydm_tdma_dig_para_upd(dm, MODE_DECISION, pregistrypriv->tdmadig_mode); + break; + case TDMADIG_NON_INIT: + if(pregistrypriv->tdmadig_dynamic) { + if(pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) + tdma_dig_en = 0; + else + tdma_dig_en = pregistrypriv->tdmadig_en; + phydm_tdma_dig_para_upd(dm, ENABLE_TDMA, tdma_dig_en); + } + break; + default: + break; + + } +} +#endif/*CONFIG_TDMADIG*/ void rtw_phydm_ops_func_init(struct dm_struct *p_phydm) { struct ra_table *p_ra_t = &p_phydm->dm_ra_table; p_ra_t->record_ra_info = record_ra_info; + #ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR + p_phydm->fill_desc_dyntxpwr = rtw_phydm_fill_desc_dpt; + #endif +} +void rtw_phydm_priv_init(_adapter *adapter) +{ + PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter); + struct dm_struct *phydm = &(hal->odmpriv); + + phydm->adapter = adapter; + odm_cmn_info_init(phydm, ODM_CMNINFO_PLATFORM, ODM_CE); } void Init_ODM_ComInfo(_adapter *adapter) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); - struct dm_struct *pDM_Odm = &(pHalData->odmpriv); + struct dm_struct *pDM_Odm = &(pHalData->odmpriv); struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); int i; - _rtw_memset(pDM_Odm, 0, sizeof(*pDM_Odm)); - - pDM_Odm->adapter = adapter; - /*phydm_op_mode could be change for different scenarios: ex: SoftAP - PHYDM_BALANCE_MODE*/ pHalData->phydm_op_mode = PHYDM_PERFORMANCE_MODE;/*Service one device*/ - - odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_PLATFORM, ODM_CE); - rtw_odm_init_ic_type(adapter); if (rtw_get_intf_type(adapter) == RTW_GSPI) @@ -252,7 +372,7 @@ void Init_ODM_ComInfo(_adapter *adapter) #ifdef CONFIG_DFS_MASTER odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_DFS_REGION_DOMAIN, adapter->registrypriv.dfs_region_domain); - odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_DFS_MASTER_ENABLE, &(adapter_to_rfctl(adapter)->dfs_master_enabled)); + odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_DFS_MASTER_ENABLE, &(adapter_to_rfctl(adapter)->radar_detect_enabled)); #endif odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA); @@ -261,6 +381,7 @@ void Init_ODM_ComInfo(_adapter *adapter) odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA); odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->rfe_type); + odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_X_CAP_SETTING, pHalData->crystal_cap); odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0); @@ -276,16 +397,17 @@ void Init_ODM_ComInfo(_adapter *adapter) odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EFUSE0X3D7, pHalData->efuse0x3d7); odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EFUSE0X3D8, pHalData->efuse0x3d8); + /* waiting for PhyDMV034 support*/ + odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_MANUAL_SUPPORTABILITY, &(adapter->registrypriv.phydm_ability)); /*Add by YuChen for adaptivity init*/ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_ADAPTIVITY, &(adapter->registrypriv.adaptivity_en)); phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE, (adapter->registrypriv.adaptivity_mode != 0) ? TRUE : FALSE); - phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_DCBACKOFF, adapter->registrypriv.adaptivity_dc_backoff); - phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY, (adapter->registrypriv.adaptivity_dml != 0) ? TRUE : FALSE); phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_TH_L2H_INI, adapter->registrypriv.adaptivity_th_l2h_ini); phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF, adapter->registrypriv.adaptivity_th_edcca_hl_diff); /*halrf info init*/ halrf_cmn_info_init(pDM_Odm, HALRF_CMNINFO_EEPROM_THERMAL_VALUE, pHalData->eeprom_thermal_meter); + halrf_cmn_info_init(pDM_Odm, HALRF_CMNINFO_PWT_TYPE, 0); if (rtw_odm_adaptivity_needed(adapter) == _TRUE) rtw_odm_adaptivity_config_msg(RTW_DBGDUMP, adapter); @@ -334,7 +456,11 @@ void Init_ODM_ComInfo(_adapter *adapter) odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_ADAPTIVE_SOML, &(adapter->registrypriv.dyn_soml_en)); #endif + odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_FCS_MODE, &(pHalData->multi_ch_switch_mode)); + /*halrf info hook*/ + /* waiting for PhyDMV034 support*/ + halrf_cmn_info_hook(pDM_Odm, HALRF_CMNINFO_MANUAL_RF_SUPPORTABILITY, &(adapter->registrypriv.halrf_ability)); #ifdef CONFIG_MP_INCLUDED halrf_cmn_info_hook(pDM_Odm, HALRF_CMNINFO_CON_TX, &(adapter->mppriv.mpt_ctx.is_start_cont_tx)); halrf_cmn_info_hook(pDM_Odm, HALRF_CMNINFO_SINGLE_TONE, &(adapter->mppriv.mpt_ctx.is_single_tone)); @@ -342,10 +468,10 @@ void Init_ODM_ComInfo(_adapter *adapter) halrf_cmn_info_hook(pDM_Odm, HALRF_CMNINFO_MP_RATE_INDEX, &(adapter->mppriv.mpt_ctx.mpt_rate_index)); #endif/*CONFIG_MP_INCLUDED*/ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - odm_cmn_info_ptr_array_hook(pDM_Odm, ODM_CMNINFO_STA_STATUS, i, NULL); + phydm_cmn_sta_info_hook(pDM_Odm, i, NULL); - phydm_init_debug_setting(pDM_Odm); rtw_phydm_ops_func_init(pDM_Odm); + phydm_dm_early_init(pDM_Odm); /* TODO */ /* odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BT_OPERATION, _FALSE); */ /* odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BT_DISABLE_EDCA, _FALSE); */ @@ -367,6 +493,65 @@ static u32 edca_setting_dl_g_mode[HT_IOT_PEER_MAX] = /*RALINK, ATHEROS, CISCO, MERU, MARVELL, 92U_AP, SELF_AP */ { 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b}; + +struct turbo_edca_setting{ + u32 edca_ul; /* uplink, tx */ + u32 edca_dl; /* downlink, rx */ +}; + +#define TURBO_EDCA_ENT(UL, DL) {UL, DL} + +#if 0 +#define TURBO_EDCA_MODE_NUM 18 +static struct turbo_edca_setting rtw_turbo_edca[TURBO_EDCA_MODE_NUM] = { + TURBO_EDCA_ENT(0xa42b, 0xa42b), /* mode 0 */ + TURBO_EDCA_ENT(0x431c, 0x431c), /* mode 1 */ + TURBO_EDCA_ENT(0x4319, 0x4319), /* mode 2 */ + + TURBO_EDCA_ENT(0x5ea42b, 0x5ea42b), /* mode 3 */ + TURBO_EDCA_ENT(0x5e431c, 0x5e431c), /* mode 4 */ + TURBO_EDCA_ENT(0x5e4319, 0x5e4319), /* mode 5 */ + + TURBO_EDCA_ENT(0x6ea42b, 0x6ea42b), /* mode 6 */ + TURBO_EDCA_ENT(0x6e431c, 0x6e431c), /* mode 7 */ + TURBO_EDCA_ENT(0x6e4319, 0x6e4319), /* mode 8 */ + + TURBO_EDCA_ENT(0x5ea42b, 0xa42b), /* mode 9 */ + TURBO_EDCA_ENT(0x5e431c, 0x431c), /* mode 10 */ + TURBO_EDCA_ENT(0x5e4319, 0x4319), /* mode 11 */ + + TURBO_EDCA_ENT(0x6ea42b, 0xa42b), /* mode 12 */ + TURBO_EDCA_ENT(0x6e431c, 0x431c), /* mode 13 */ + TURBO_EDCA_ENT(0x6e4319, 0x4319), /* mode 14 */ + + TURBO_EDCA_ENT(0x431c, 0x5e431c), /* mode 15 */ + + TURBO_EDCA_ENT(0xa42b, 0x5ea42b), /* mode 16 */ + + TURBO_EDCA_ENT(0x138642b, 0x431c), /* mode 17 */ +}; +#else +#define TURBO_EDCA_MODE_NUM 8 +static struct turbo_edca_setting rtw_turbo_edca[TURBO_EDCA_MODE_NUM] = { + /* { UL, DL } */ + TURBO_EDCA_ENT(0x5e431c, 0x431c), /* mode 0 */ + + TURBO_EDCA_ENT(0x431c, 0x431c), /* mode 1 */ + + TURBO_EDCA_ENT(0x5e431c, 0x5e431c), /* mode 2 */ + + TURBO_EDCA_ENT(0x5ea42b, 0x5ea42b), /* mode 3 */ + + TURBO_EDCA_ENT(0x5ea42b, 0x431c), /* mode 4 */ + + TURBO_EDCA_ENT(0x6ea42b, 0x6ea42b), /* mode 5 */ + + TURBO_EDCA_ENT(0xa42b, 0xa42b), /* mode 6 */ + + TURBO_EDCA_ENT(0x5e431c, 0xa42b), /* mode 7 */ +}; +#endif + void rtw_hal_turbo_edca(_adapter *adapter) { HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); @@ -396,7 +581,7 @@ void rtw_hal_turbo_edca(_adapter *adapter) u8 is_linked = _FALSE; u8 interface_type; - if (hal_data->dis_turboedca) + if (hal_data->dis_turboedca == 1) return; if (rtw_mi_check_status(adapter, MI_ASSOC)) @@ -479,7 +664,7 @@ void rtw_hal_turbo_edca(_adapter *adapter) EDCA_BE_DL = edca_setting_DL[iot_peer]; } - if ((ic_type == RTL8812) || (ic_type == RTL8821) || (ic_type == RTL8192E)) { /* add 8812AU/8812AE */ + if ((ic_type == RTL8812) || (ic_type == RTL8821) || (ic_type == RTL8192E) || (ic_type == RTL8192F)) { /* add 8812AU/8812AE */ EDCA_BE_UL = 0x5ea42b; EDCA_BE_DL = 0x5ea42b; @@ -488,21 +673,107 @@ void rtw_hal_turbo_edca(_adapter *adapter) if (interface_type == RTW_PCIE && ((ic_type == RTL8822B) + || (ic_type == RTL8822C) || (ic_type == RTL8814A))) { EDCA_BE_UL = 0x6ea42b; EDCA_BE_DL = 0x6ea42b; } + if ((ic_type == RTL8822B) + && (interface_type == RTW_SDIO)) + EDCA_BE_DL = 0x00431c; + +#ifdef CONFIG_RTW_TPT_MODE + if ( dvobj->tpt_mode > 0 ) { + EDCA_BE_UL = dvobj->edca_be_ul; + EDCA_BE_DL = dvobj->edca_be_dl; + } +#endif /* CONFIG_RTW_TPT_MODE */ + + /* keep this condition at last check */ + if (hal_data->dis_turboedca == 2) { + + if (hal_data->edca_param_mode < TURBO_EDCA_MODE_NUM) { + + struct turbo_edca_setting param; + + param = rtw_turbo_edca[hal_data->edca_param_mode]; + + EDCA_BE_UL = param.edca_ul; + EDCA_BE_DL = param.edca_dl; + + } else { + + EDCA_BE_UL = hal_data->edca_param_mode; + EDCA_BE_DL = hal_data->edca_param_mode; + } + } + if (traffic_index == DOWN_LINK) edca_param = EDCA_BE_DL; else edca_param = EDCA_BE_UL; + +#ifdef CONFIG_EXTEND_LOWRATE_TXOP +#define TXOP_CCK1M 0x01A6 +#define TXOP_CCK2M 0x00E6 +#define TXOP_CCK5M 0x006B +#define TXOP_OFD6M 0x0066 +#define TXOP_MCS6M 0x0061 +{ + struct sta_info *psta; + struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); + u8 mac_id, role, current_rate_id; + + /* search all used & connect2AP macid */ + for (mac_id = 0; mac_id < macid_ctl->num; mac_id++) { + if (rtw_macid_is_used(macid_ctl, mac_id)) { + role = GET_H2CCMD_MSRRPT_PARM_ROLE(&(macid_ctl->h2c_msr[mac_id])); + if (role != H2C_MSR_ROLE_AP) + continue; + + psta = macid_ctl->sta[mac_id]; + current_rate_id = rtw_get_current_tx_rate(adapter, psta); + /* Check init tx_rate==1M and set 0x508[31:16]==0x019B(unit 32us) if it is */ + switch (current_rate_id) { + case DESC_RATE1M: + edca_param &= 0x0000FFFF; + edca_param |= (TXOP_CCK1M<<16); + break; + case DESC_RATE2M: + edca_param &= 0x0000FFFF; + edca_param |= (TXOP_CCK2M<<16); + break; + case DESC_RATE5_5M: + edca_param &= 0x0000FFFF; + edca_param |= (TXOP_CCK5M<<16); + break; + case DESC_RATE6M: + edca_param &= 0x0000FFFF; + edca_param |= (TXOP_OFD6M<<16); + break; + case DESC_RATEMCS0: + edca_param &= 0x0000FFFF; + edca_param |= (TXOP_MCS6M<<16); + break; + default: + break; + } + } + } +} +#endif /* CONFIG_EXTEND_LOWRATE_TXOP */ + #ifdef CONFIG_RTW_CUSTOMIZE_BEEDCA edca_param = CONFIG_RTW_CUSTOMIZE_BEEDCA; #endif - rtw_hal_set_hwreg(adapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param)); - RTW_DBG("Turbo EDCA =0x%x\n", edca_param); + if ( edca_param != hal_data->ac_param_be) { + + rtw_hal_set_hwreg(adapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param)); + + RTW_INFO("Turbo EDCA =0x%x\n", edca_param); + } hal_data->prv_traffic_idx = traffic_index; } @@ -522,6 +793,26 @@ void rtw_hal_turbo_edca(_adapter *adapter) } +s8 rtw_dm_get_min_rssi(_adapter *adapter) +{ + struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter); + struct sta_info *sta; + s8 min_rssi = 127, rssi; + int i; + + for (i = 0; i < MACID_NUM_SW_LIMIT; i++) { + sta = macid_ctl->sta[i]; + if (!sta || !GET_H2CCMD_MSRRPT_PARM_OPMODE(macid_ctl->h2c_msr + i) + || is_broadcast_mac_addr(sta->cmn.mac_addr)) + continue; + rssi = sta->cmn.rssi_stat.rssi; + if (rssi >= 0 && min_rssi > rssi) + min_rssi = rssi; + } + + return min_rssi == 127 ? 0 : min_rssi; +} + s8 rtw_phydm_get_min_rssi(_adapter *adapter) { struct dm_struct *phydm = adapter_to_phydm(adapter); @@ -594,7 +885,7 @@ u8 rtw_phydm_is_iqk_in_progress(_adapter *adapter) void SetHalODMVar( PADAPTER Adapter, HAL_ODM_VARIABLE eVariable, - PVOID pValue1, + void *pValue1, BOOLEAN bSet) { struct dm_struct *podmpriv = adapter_to_phydm(Adapter); @@ -605,14 +896,12 @@ void SetHalODMVar( if (bSet) { RTW_INFO("### Set STA_(%d) info ###\n", psta->cmn.mac_id); - odm_cmn_info_ptr_array_hook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->cmn.mac_id, psta); psta->cmn.dm_ctrl = STA_DM_CTRL_ACTIVE; phydm_cmn_sta_info_hook(podmpriv, psta->cmn.mac_id, &(psta->cmn)); } else { RTW_INFO("### Clean STA_(%d) info ###\n", psta->cmn.mac_id); /* _enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); */ psta->cmn.dm_ctrl = 0; - odm_cmn_info_ptr_array_hook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->cmn.mac_id, NULL); phydm_cmn_sta_info_hook(podmpriv, psta->cmn.mac_id, NULL); /* _exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); */ @@ -627,8 +916,8 @@ void SetHalODMVar( break; case HAL_ODM_REGULATION: /* used to auto enable/disable adaptivity by SD7 */ - odm_cmn_info_init(podmpriv, ODM_CMNINFO_DOMAIN_CODE_2G, 0); - odm_cmn_info_init(podmpriv, ODM_CMNINFO_DOMAIN_CODE_5G, 0); + phydm_adaptivity_info_update(podmpriv, PHYDM_ADAPINFO_DOMAIN_CODE_2G, 0); + phydm_adaptivity_info_update(podmpriv, PHYDM_ADAPINFO_DOMAIN_CODE_5G, 0); break; case HAL_ODM_INITIAL_GAIN: { u8 rx_gain = *((u8 *)(pValue1)); @@ -653,7 +942,8 @@ void SetHalODMVar( rssi_min = rtw_phydm_get_min_rssi(Adapter); _RTW_PRINT_SEL(sel, "============ Rx Info dump ===================\n"); - _RTW_PRINT_SEL(sel, "is_linked = %d, rssi_min = %d(%%), current_igi = 0x%x\n", podmpriv->is_linked, rssi_min, cur_igi); + _RTW_PRINT_SEL(sel, "is_linked = %d, rssi_min = %d(%%)(%d(%%)), current_igi = 0x%x\n" + , podmpriv->is_linked, rssi_min, rtw_dm_get_min_rssi(Adapter), cur_igi); _RTW_PRINT_SEL(sel, "cnt_cck_fail = %d, cnt_ofdm_fail = %d, Total False Alarm = %d\n", rtw_phydm_get_phy_cnt(Adapter, FA_CCK), rtw_phydm_get_phy_cnt(Adapter, FA_OFDM), @@ -704,8 +994,8 @@ void SetHalODMVar( void GetHalODMVar( PADAPTER Adapter, HAL_ODM_VARIABLE eVariable, - PVOID pValue1, - PVOID pValue2) + void *pValue1, + void *pValue2) { struct dm_struct *podmpriv = adapter_to_phydm(Adapter); @@ -883,21 +1173,14 @@ void rtw_phydm_watchdog_in_lps_lclk(_adapter *adapter) { struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct sta_priv *pstapriv = &adapter->stapriv; - struct sta_info *psta = NULL; u8 cur_igi = 0; s8 min_rssi = 0; if (!rtw_is_hw_init_completed(adapter)) return; - psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); - if (psta == NULL) - return; - cur_igi = rtw_phydm_get_cur_igi(adapter); - min_rssi = rtw_phydm_get_min_rssi(adapter); - if (min_rssi <= 0) - min_rssi = psta->cmn.rssi_stat.rssi; + min_rssi = rtw_dm_get_min_rssi(adapter); /*RTW_INFO("%s "ADPT_FMT" cur_ig_value=%d, min_rssi = %d\n", __func__, ADPT_ARG(adapter), cur_igi, min_rssi);*/ if (min_rssi <= 0) @@ -916,15 +1199,22 @@ void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta) { struct ra_sta_info *ra_info; u8 curr_sgi = _FALSE; + u32 tx_tp_mbips, rx_tp_mbips, bi_tp_mbips; if (!psta) return; - RTW_PRINT_SEL(sel, "====== mac_id : %d ======\n", psta->cmn.mac_id); + RTW_PRINT_SEL(sel, "\n"); + RTW_PRINT_SEL(sel, "====== mac_id : %d [" MAC_FMT "] ======\n", + psta->cmn.mac_id, MAC_ARG(psta->cmn.mac_addr)); + + if (is_client_associated_to_ap(psta->padapter)) + RTW_PRINT_SEL(sel, "BCN counts : %d (per-%d second), DTIM Period:%d\n", + rtw_get_bcn_cnt(psta->padapter) / 2, 1, rtw_get_bcn_dtim_period(psta->padapter)); ra_info = &psta->cmn.ra_info; - curr_sgi = (ra_info->curr_tx_rate & 0x80) ? _TRUE : _FALSE; + curr_sgi = rtw_get_current_tx_sgi(adapter, psta); RTW_PRINT_SEL(sel, "tx_rate : %s(%s) rx_rate : %s, rx_rate_bmc : %s, rssi : %d %%\n" - , HDATA_RATE((ra_info->curr_tx_rate & 0x7F)), (curr_sgi) ? "S" : "L" + , HDATA_RATE(rtw_get_current_tx_rate(adapter, psta)), (curr_sgi) ? "S" : "L" , HDATA_RATE((psta->curr_rx_rate & 0x7F)), HDATA_RATE((psta->curr_rx_rate_bmc & 0x7F)), psta->cmn.rssi_stat.rssi ); @@ -947,14 +1237,51 @@ void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta) ); } - RTW_PRINT_SEL(sel, "TP {Tx,Rx,Total} = { %d , %d , %d } Mbps\n", - (psta->sta_stats.tx_tp_mbytes << 3), (psta->sta_stats.rx_tp_mbytes << 3), - (psta->sta_stats.tx_tp_mbytes + psta->sta_stats.rx_tp_mbytes) << 3); + _RTW_PRINT_SEL(sel, "RTW: [TP] "); + tx_tp_mbips = psta->sta_stats.tx_tp_kbits >> 10; + rx_tp_mbips = psta->sta_stats.rx_tp_kbits >> 10; + bi_tp_mbips = tx_tp_mbips + rx_tp_mbips; + if (tx_tp_mbips) + _RTW_PRINT_SEL(sel, "Tx : %d(Mbps) ", tx_tp_mbips); + else + _RTW_PRINT_SEL(sel, "Tx : %d(Kbps) ", psta->sta_stats.tx_tp_kbits); + + if (rx_tp_mbips) + _RTW_PRINT_SEL(sel, "Rx : %d(Mbps) ", rx_tp_mbips); + else + _RTW_PRINT_SEL(sel, "Rx : %d(Kbps) ", psta->sta_stats.rx_tp_kbits); + + if (bi_tp_mbips) + _RTW_PRINT_SEL(sel, "Total : %d(Mbps)\n", bi_tp_mbips); + else + _RTW_PRINT_SEL(sel, "Total : %d(Kbps)\n", psta->sta_stats.tx_tp_kbits + psta->sta_stats.rx_tp_kbits); + + + _RTW_PRINT_SEL(sel, "RTW: [Smooth TP] "); + tx_tp_mbips = psta->sta_stats.smooth_tx_tp_kbits >> 10; + rx_tp_mbips = psta->sta_stats.smooth_rx_tp_kbits >> 10; + bi_tp_mbips = tx_tp_mbips + rx_tp_mbips; + if (tx_tp_mbips) + _RTW_PRINT_SEL(sel, "Tx : %d(Mbps) ", tx_tp_mbips); + else + _RTW_PRINT_SEL(sel, "Tx : %d(Kbps) ", psta->sta_stats.smooth_tx_tp_kbits); + + if (rx_tp_mbips) + _RTW_PRINT_SEL(sel, "Rx : %d(Mbps) ", rx_tp_mbips); + else + _RTW_PRINT_SEL(sel, "Rx : %d(Kbps) ", psta->sta_stats.smooth_rx_tp_kbits); + + if (bi_tp_mbips) + _RTW_PRINT_SEL(sel, "Total : %d(Mbps)\n", bi_tp_mbips); + else + _RTW_PRINT_SEL(sel, "Total : %d(Kbps)\n", psta->sta_stats.smooth_tx_tp_kbits + psta->sta_stats.rx_tp_kbits); + + #if 0 RTW_PRINT_SEL(sel, "Moving-AVG TP {Tx,Rx,Total} = { %d , %d , %d } Mbps\n\n", (psta->cmn.tx_moving_average_tp << 3), (psta->cmn.rx_moving_average_tp << 3), (psta->cmn.tx_moving_average_tp + psta->cmn.rx_moving_average_tp) << 3); - + #endif } void dump_sta_info(void *sel, struct sta_info *psta) @@ -973,6 +1300,7 @@ void dump_sta_info(void *sel, struct sta_info *psta) RTW_PRINT_SEL(sel, "mac_id : %d\n", psta->cmn.mac_id); RTW_PRINT_SEL(sel, "wireless_mode : 0x%02x\n", psta->wireless_mode); RTW_PRINT_SEL(sel, "mimo_type : %d\n", psta->cmn.mimo_type); + RTW_PRINT_SEL(sel, "static smps : %s\n", (psta->cmn.sm_ps == SM_PS_STATIC) ? "Y" : "N"); RTW_PRINT_SEL(sel, "bw_mode : %s, ra_bw_mode : %s\n", ch_width_str(psta->cmn.bw_mode), ch_width_str(ra_info->ra_bw_mode)); RTW_PRINT_SEL(sel, "rate_id : %d\n", ra_info->rate_id); @@ -984,8 +1312,8 @@ void dump_sta_info(void *sel, struct sta_info *psta) RTW_PRINT_SEL(sel, "is_noisy : %s\n", (ra_info->is_noisy) ? "Y" : "N"); RTW_PRINT_SEL(sel, "txrx_state : %d\n", ra_info->txrx_state);/*0: uplink, 1:downlink, 2:bi-direction*/ - curr_tx_sgi = (ra_info->curr_tx_rate & 0x80) ? _TRUE : _FALSE; - curr_tx_rate = ra_info->curr_tx_rate & 0x7F; + curr_tx_sgi = rtw_get_current_tx_sgi(psta->padapter, psta); + curr_tx_rate = rtw_get_current_tx_rate(psta->padapter, psta); RTW_PRINT_SEL(sel, "curr_tx_rate : %s (%s)\n", HDATA_RATE(curr_tx_rate), (curr_tx_sgi) ? "S" : "L"); RTW_PRINT_SEL(sel, "curr_tx_bw : %s\n", ch_width_str(ra_info->curr_tx_bw)); @@ -1012,15 +1340,9 @@ static void init_phydm_info(_adapter *adapter) PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); struct dm_struct *phydm = &(hal_data->odmpriv); - halrf_cmn_info_init(phydm, HALRF_CMNINFO_FW_VER, - ((hal_data->firmware_version << 16) | hal_data->firmware_sub_version)); - - #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1)) - /*PHYDM API - thermal trim*/ - phydm_get_thermal_trim_offset(phydm); - /*PHYDM API - power trim*/ - phydm_get_power_trim_offset(phydm); - #endif + odm_cmn_info_update(phydm, ODM_CMNINFO_IS_DOWNLOAD_FW, hal_data->bFWReady); + odm_cmn_info_init(phydm, ODM_CMNINFO_FW_VER, hal_data->firmware_version); + odm_cmn_info_init(phydm, ODM_CMNINFO_FW_SUB_VER, hal_data->firmware_sub_version); } void rtw_phydm_init(_adapter *adapter) { @@ -1029,9 +1351,21 @@ void rtw_phydm_init(_adapter *adapter) init_phydm_info(adapter); odm_dm_init(phydm); +#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA + phydm_pathb_q_matrix_rotate_en(phydm); +#endif +} + +bool rtw_phydm_set_crystal_cap(_adapter *adapter, u8 crystal_cap) +{ + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); + struct dm_struct *phydm = &(hal_data->odmpriv); + + return phydm_set_crystal_cap_reg(phydm, crystal_cap); } #ifdef CONFIG_LPS_PG +/* static void _lps_pg_state_update(_adapter *adapter) { u8 is_in_lpspg = _FALSE; @@ -1048,6 +1382,30 @@ static void _lps_pg_state_update(_adapter *adapter) if (psta) psta->cmn.ra_info.disable_ra = (is_in_lpspg) ? _TRUE : _FALSE; } +*/ +void rtw_phydm_lps_pg_hdl(_adapter *adapter, struct sta_info *sta, bool in_lpspg) +{ + struct dm_struct *phydm = adapter_to_phydm(adapter); + /*u8 rate_id;*/ + + if(sta == NULL) { + RTW_ERR("%s sta is null\n", __func__); + rtw_warn_on(1); + return; + } + + if (in_lpspg) { + sta->cmn.ra_info.disable_ra = _TRUE; + sta->cmn.ra_info.disable_pt = _TRUE; + /*TODO : DRV fix tx rate*/ + /*rate_id = phydm_get_rate_from_rssi_lv(phydm, sta->cmn.mac_id);*/ + } else { + sta->cmn.ra_info.disable_ra = _FALSE; + sta->cmn.ra_info.disable_pt = _FALSE; + } + + rtw_phydm_ra_registed(adapter, sta); +} #endif /*#define DBG_PHYDM_STATE_CHK*/ @@ -1064,10 +1422,25 @@ static u8 _rtw_phydm_rfk_condition_check(_adapter *adapter, u8 is_scaning, u8 if return rfk_allowed; #endif + #ifdef CONFIG_MCC_MODE + /*not in MCC State*/ + if (MCC_EN(adapter) && + rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) { + rfk_allowed = _FALSE; + if (0) + RTW_INFO("[RFK-CHK] RF-K not allowed due to doing MCC\n"); + return rfk_allowed; + } + #endif + + #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) + + #endif + if (ifs_linked) { if (is_scaning) { rfk_allowed = _FALSE; - RTW_ERR("[RFK-CHK] RF-K not allowed due to ifaces under site-survey\n"); + RTW_DBG("[RFK-CHK] RF-K not allowed due to ifaces under site-survey\n"); } else { rfk_allowed = rtw_mi_stayin_union_ch_chk(adapter) ? _TRUE : _FALSE; @@ -1076,31 +1449,17 @@ static u8 _rtw_phydm_rfk_condition_check(_adapter *adapter, u8 is_scaning, u8 if } } - #ifdef CONFIG_MCC_MODE - /*not in MCC State*/ - if (MCC_EN(adapter)) { - if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) { - rfk_allowed = _FALSE; - if (0) - RTW_ERR("[RFK-CHK] RF-K not allowed due to doing MCC\n"); - } - } - #endif - - #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) - - #endif - return rfk_allowed; } -#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1)) + +#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) static u8 _rtw_phydm_iqk_segment_chk(_adapter *adapter, u8 ifs_linked) { u8 iqk_sgt = _FALSE; #if 0 struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); - if (is_linked && (dvobj->traffic_stat.cur_tx_tp > 2 || dvobj->traffic_stat.cur_rx_tp > 2)) + if (ifs_linked && (dvobj->traffic_stat.cur_tx_tp > 2 || dvobj->traffic_stat.cur_rx_tp > 2)) rst = _TRUE; #else if (ifs_linked) @@ -1187,18 +1546,56 @@ void rtw_dyn_soml_config(_adapter *adapter) } #endif -void rtw_phydm_watchdog(_adapter *adapter) +#ifdef RTW_DYNAMIC_RRSR +void rtw_phydm_set_rrsr(_adapter *adapter, u32 rrsr_value, bool write_rrsr) +{ + + struct dm_struct *phydm = adapter_to_phydm(adapter); + + odm_cmn_info_update(phydm, ODM_CMNINFO_RRSR_VAL, rrsr_value); + if(write_rrsr) + phydm_rrsr_set_register(phydm, rrsr_value); +} +#endif/*RTW_DYNAMIC_RRSR*/ +void rtw_phydm_read_efuse(_adapter *adapter) +{ + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); + struct dm_struct *phydm = &(hal_data->odmpriv); + + /*PHYDM API - thermal trim*/ + phydm_get_thermal_trim_offset(phydm); + /*PHYDM API - power trim*/ + phydm_get_power_trim_offset(phydm); +} + +#ifdef CONFIG_LPS_PWR_TRACKING +void rtw_phydm_pwr_tracking_directly(_adapter *adapter) +{ + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); + u8 rfk_forbidden = _TRUE; + u8 is_linked = _FALSE; + + if (rtw_mi_check_status(adapter, MI_ASSOC)) + is_linked = _TRUE; + + rfk_forbidden = (_rtw_phydm_rfk_condition_check(adapter, hal_data->bScanInProcess, is_linked) == _TRUE) ? _FALSE : _TRUE; + halrf_cmn_info_set(&hal_data->odmpriv, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden); + + odm_txpowertracking_direct_ce(&hal_data->odmpriv); +} +#endif + +void rtw_phydm_watchdog(_adapter *adapter, bool in_lps) { u8 bLinked = _FALSE; u8 bsta_state = _FALSE; u8 bBtDisabled = _TRUE; u8 rfk_forbidden = _FALSE; - #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1)) + #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) u8 segment_iqk = _FALSE; #endif u8 tx_unlinked_low_rate = 0xFF; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); - struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); if (!rtw_is_hw_init_completed(adapter)) { RTW_DBG("%s skip due to hw_init_completed == FALSE\n", __func__); @@ -1223,14 +1620,11 @@ void rtw_phydm_watchdog(_adapter *adapter) #endif /* CONFIG_BT_COEXIST */ odm_cmn_info_update(&pHalData->odmpriv, ODM_CMNINFO_BT_ENABLED, (bBtDisabled == _TRUE) ? _FALSE : _TRUE); -#ifdef CONFIG_LPS_PG - _lps_pg_state_update(adapter); -#endif rfk_forbidden = (_rtw_phydm_rfk_condition_check(adapter, pHalData->bScanInProcess, bLinked) == _TRUE) ? _FALSE : _TRUE; halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden); - #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1)) + #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) segment_iqk = _rtw_phydm_iqk_segment_chk(adapter, bLinked); halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_IQK_SEGMENT, segment_iqk); #endif @@ -1250,7 +1644,12 @@ void rtw_phydm_watchdog(_adapter *adapter) #endif goto _exit; }*/ - if (pwrctl->bpower_saving) + + #ifdef CONFIG_TDMADIG + rtw_phydm_tdmadig(adapter, TDMADIG_NON_INIT); + #endif/*CONFIG_TDMADIG*/ + + if (in_lps) phydm_watchdog_lps(&pHalData->odmpriv); else phydm_watchdog(&pHalData->odmpriv); @@ -1259,7 +1658,23 @@ void rtw_phydm_watchdog(_adapter *adapter) rtw_acs_update_current_info(adapter); #endif -_exit: return; } +#ifdef CONFIG_CTRL_TXSS_BY_TP +void rtw_phydm_trx_cfg(_adapter *adapter, bool tx_1ss) +{ + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + enum bb_path txpath = BB_PATH_AB; + enum bb_path rxpath = BB_PATH_AB; + /*is_2tx = _FALSE for 8822B, or BB_PATH_AUTO for PATH_DIVERSITY for 8822B*/ + enum bb_path txpath_1ss = BB_PATH_A; + + rtw_hal_get_rf_path(adapter_to_dvobj(adapter), NULL, &txpath, &rxpath); + txpath = (tx_1ss) ? BB_PATH_A : txpath; + + if (phydm_api_trx_mode(adapter_to_phydm(adapter), txpath, rxpath, txpath_1ss) == FALSE) + RTW_ERR("%s failed\n", __func__); +} +#endif + diff --git a/hal/hal_dm.h b/hal/hal_dm.h index 299a060..b9d2e0a 100644 --- a/hal/hal_dm.h +++ b/hal/hal_dm.h @@ -16,7 +16,11 @@ #define __HAL_DM_H__ #define adapter_to_phydm(adapter) (&(GET_HAL_DATA(adapter)->odmpriv)) - +#define dvobj_to_phydm(dvobj) adapter_to_phydm(dvobj_get_primary_adapter(dvobj)) +#ifdef CONFIG_TDMADIG +void rtw_phydm_tdmadig(_adapter *adapter, u8 state); +#endif +void rtw_phydm_priv_init(_adapter *adapter); void Init_ODM_ComInfo(_adapter *adapter); void rtw_phydm_init(_adapter *adapter); @@ -26,12 +30,12 @@ u8 rtw_phydm_is_iqk_in_progress(_adapter *adapter); void GetHalODMVar( PADAPTER Adapter, HAL_ODM_VARIABLE eVariable, - PVOID pValue1, - PVOID pValue2); + void *pValue1, + void *pValue2); void SetHalODMVar( PADAPTER Adapter, HAL_ODM_VARIABLE eVariable, - PVOID pValue1, + void *pValue1, BOOLEAN bSet); void rtw_phydm_ra_registed(_adapter *adapter, struct sta_info *psta); @@ -42,7 +46,10 @@ void rtw_dyn_soml_para_set(_adapter *adapter, u8 train_num, u8 intvl, u8 period, u8 delay); void rtw_dyn_soml_config(_adapter *adapter); #endif -void rtw_phydm_watchdog(_adapter *adapter); +#ifdef RTW_DYNAMIC_RRSR +void rtw_phydm_set_rrsr(_adapter *adapter, u32 rrsr_value, bool write_rrsr); +#endif +void rtw_phydm_watchdog(_adapter *adapter, bool in_lps); void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter); void dump_sta_info(void *sel, struct sta_info *psta); @@ -53,6 +60,7 @@ void rtw_hal_iqk_test(_adapter *adapter, bool recovery, bool clear, bool segment void rtw_hal_lck_test(_adapter *adapter); #endif +s8 rtw_dm_get_min_rssi(_adapter *adapter); s8 rtw_phydm_get_min_rssi(_adapter *adapter); u8 rtw_phydm_get_cur_igi(_adapter *adapter); @@ -63,7 +71,12 @@ extern void phydm_rssi_monitor_check(void *p_dm_void); void rtw_phydm_wd_lps_lclk_hdl(_adapter *adapter); void rtw_phydm_watchdog_in_lps_lclk(_adapter *adapter); #endif - +#ifdef CONFIG_TDMADIG +enum rtw_tdmadig_state{ + TDMADIG_INIT, + TDMADIG_NON_INIT, +}; +#endif enum phy_cnt { FA_OFDM, FA_CCK, @@ -81,8 +94,27 @@ enum phy_cnt { CRC32_ERROR_CCK, }; u32 rtw_phydm_get_phy_cnt(_adapter *adapter, enum phy_cnt cnt); -#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1)) +#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) void rtw_phydm_iqk_trigger(_adapter *adapter); #endif +void rtw_phydm_read_efuse(_adapter *adapter); +bool rtw_phydm_set_crystal_cap(_adapter *adapter, u8 crystal_cap); + +#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR +void rtw_phydm_set_dyntxpwr(_adapter *adapter, u8 *desc, u8 mac_id); +#endif +#ifdef CONFIG_RTW_TX_2PATH_EN +void rtw_phydm_tx_2path_en(_adapter *adapter); +#endif +#ifdef CONFIG_LPS_PG +void rtw_phydm_lps_pg_hdl(_adapter *adapter, struct sta_info *sta, bool in_lpspg); +#endif +#ifdef CONFIG_LPS_PWR_TRACKING +void rtw_phydm_pwr_tracking_directly(_adapter *adapter); +#endif + +#ifdef CONFIG_CTRL_TXSS_BY_TP +void rtw_phydm_trx_cfg(_adapter *adapter, bool tx_1ss); +#endif #endif /* __HAL_DM_H__ */ diff --git a/hal/hal_halmac.c b/hal/hal_halmac.c index 046d15c..aac700b 100644 --- a/hal/hal_halmac.c +++ b/hal/hal_halmac.c @@ -1,6 +1,6 @@ /****************************************************************************** * - * Copyright(c) 2015 - 2017 Realtek Corporation. + * Copyright(c) 2015 - 2019 Realtek Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as @@ -18,6 +18,13 @@ #include /* efuse, PHAL_DATA_TYPE and etc. */ #include "hal_halmac.h" /* dvobj_to_halmac() and ect. */ +/* + * HALMAC take return value 0 for fail and 1 for success to replace + * _FALSE/_TRUE after V1_04_09 + */ +#define RTW_HALMAC_FAIL 0 +#define RTW_HALMAC_SUCCESS 1 + #define DEFAULT_INDICATOR_TIMELMT 1000 /* ms */ #define MSG_PREFIX "[HALMAC]" @@ -183,15 +190,18 @@ static u8 _halmac_sdio_reg_read_n(void *p, u32 offset, u32 size, u8 *data) struct dvobj_priv *d = (struct dvobj_priv *)p; u8 *pbuf; u8 ret; - u8 rst = _FALSE; + u8 rst = RTW_HALMAC_FAIL; u32 sdio_read_size; + if (!data) + return rst; + sdio_read_size = RND4(size); sdio_read_size = rtw_sdio_cmd53_align_size(d, sdio_read_size); pbuf = rtw_zmalloc(sdio_read_size); - if ((!pbuf) || (!data)) + if (!pbuf) return rst; ret = rtw_sdio_read_cmd53(d, offset, pbuf, sdio_read_size); @@ -201,7 +211,7 @@ static u8 _halmac_sdio_reg_read_n(void *p, u32 offset, u32 size, u8 *data) } _rtw_memcpy(data, pbuf, size); - rst = _TRUE; + rst = RTW_HALMAC_SUCCESS; exit: rtw_mfree(pbuf, sdio_read_size); @@ -376,7 +386,7 @@ static void _halmac_reg_write_32(void *p, u32 offset, u32 val) static u8 _halmac_mfree(void *p, void *buffer, u32 size) { rtw_mfree(buffer, size); - return _TRUE; + return RTW_HALMAC_SUCCESS; } static void *_halmac_malloc(void *p, u32 size) @@ -387,13 +397,13 @@ static void *_halmac_malloc(void *p, u32 size) static u8 _halmac_memcpy(void *p, void *dest, void *src, u32 size) { _rtw_memcpy(dest, src, size); - return _TRUE; + return RTW_HALMAC_SUCCESS; } static u8 _halmac_memset(void *p, void *addr, u8 value, u32 size) { _rtw_memset(addr, value, size); - return _TRUE; + return RTW_HALMAC_SUCCESS; } static void _halmac_udelay(void *p, u32 us) @@ -410,13 +420,13 @@ static void _halmac_udelay(void *p, u32 us) static u8 _halmac_mutex_init(void *p, HALMAC_MUTEX *pMutex) { _rtw_mutex_init(pMutex); - return _TRUE; + return RTW_HALMAC_SUCCESS; } static u8 _halmac_mutex_deinit(void *p, HALMAC_MUTEX *pMutex) { _rtw_mutex_free(pMutex); - return _TRUE; + return RTW_HALMAC_SUCCESS; } static u8 _halmac_mutex_lock(void *p, HALMAC_MUTEX *pMutex) @@ -425,26 +435,70 @@ static u8 _halmac_mutex_lock(void *p, HALMAC_MUTEX *pMutex) err = _enter_critical_mutex(pMutex, NULL); if (err) - return _FALSE; + return RTW_HALMAC_FAIL; - return _TRUE; + return RTW_HALMAC_SUCCESS; } static u8 _halmac_mutex_unlock(void *p, HALMAC_MUTEX *pMutex) { _exit_critical_mutex(pMutex, NULL); + return RTW_HALMAC_SUCCESS; +} + +#ifndef CONFIG_SDIO_HCI +#define DBG_MSG_FILTER +#endif + +#ifdef DBG_MSG_FILTER +static u8 is_msg_allowed(uint drv_lv, u8 msg_lv) +{ + switch (drv_lv) { + case _DRV_NONE_: + return _FALSE; + + case _DRV_ALWAYS_: + if (msg_lv > HALMAC_DBG_ALWAYS) + return _FALSE; + break; + case _DRV_ERR_: + if (msg_lv > HALMAC_DBG_ERR) + return _FALSE; + break; + case _DRV_WARNING_: + if (msg_lv > HALMAC_DBG_WARN) + return _FALSE; + break; + case _DRV_INFO_: + if (msg_lv >= HALMAC_DBG_TRACE) + return _FALSE; + break; + } + return _TRUE; } +#endif /* DBG_MSG_FILTER */ static u8 _halmac_msg_print(void *p, u32 msg_type, u8 msg_level, s8 *fmt, ...) { #define MSG_LEN 100 va_list args; u8 str[MSG_LEN] = {0}; +#ifdef DBG_MSG_FILTER + uint drv_level = _DRV_NONE_; +#endif int err; - u8 ret = _TRUE; + u8 ret = RTW_HALMAC_SUCCESS; +#ifdef DBG_MSG_FILTER +#ifdef CONFIG_RTW_DEBUG + drv_level = rtw_drv_log_level; +#endif + if (is_msg_allowed(drv_level, msg_level) == _FALSE) + return ret; +#endif + str[0] = '\n'; va_start(args, fmt); err = vsnprintf(str, MSG_LEN, fmt, args); @@ -452,10 +506,10 @@ static u8 _halmac_msg_print(void *p, u32 msg_type, u8 msg_level, s8 *fmt, ...) /* An output error is encountered */ if (err < 0) - return _FALSE; + return RTW_HALMAC_FAIL; /* Output may be truncated due to size limit */ if ((err == (MSG_LEN - 1)) && (str[MSG_LEN - 2] != '\n')) - ret = _FALSE; + ret = RTW_HALMAC_FAIL; if (msg_level == HALMAC_DBG_ALWAYS) RTW_PRINT(MSG_PREFIX "%s", str); @@ -476,7 +530,7 @@ static u8 _halmac_buff_print(void *p, u32 msg_type, u8 msg_level, s8 *buf, u32 s else RTW_DBG_DUMP(MSG_PREFIX, buf, size); - return _TRUE; + return RTW_HALMAC_SUCCESS; } @@ -515,6 +569,9 @@ static inline u8 is_valid_id_status(enum halmac_feature_id id, enum halmac_cmd_p break; case HALMAC_FEATURE_UPDATE_PACKET: RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); + if (status != HALMAC_CMD_PROCESS_DONE) + RTW_INFO("%s: id(%d) unspecified status(%d)!\n", + __FUNCTION__, id, status); break; case HALMAC_FEATURE_UPDATE_DATAPACK: RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); @@ -524,6 +581,11 @@ static inline u8 is_valid_id_status(enum halmac_feature_id id, enum halmac_cmd_p break; case HALMAC_FEATURE_CHANNEL_SWITCH: RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); + if ((status != HALMAC_CMD_PROCESS_DONE) && (status != HALMAC_CMD_PROCESS_RCVD)) + RTW_INFO("%s: id(%d) unspecified status(%d)!\n", + __FUNCTION__, id, status); + if (status == HALMAC_CMD_PROCESS_DONE) + return _FALSE; break; case HALMAC_FEATURE_IQK: RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); @@ -621,7 +683,7 @@ static int wait_halmac_event(struct dvobj_priv *d, enum halmac_feature_id id) /* * Return: - * Always return _TRUE, HALMAC don't care the return value. + * Always return RTW_HALMAC_SUCCESS, HALMAC don't care the return value. */ static u8 _halmac_event_indication(void *p, enum halmac_feature_id feature_id, enum halmac_cmd_process_status process_status, u8 *buf, u32 size) { @@ -672,7 +734,7 @@ static u8 _halmac_event_indication(void *p, enum halmac_feature_id feature_id, e rtw_sctx_done(&sctx); exit: - return _TRUE; + return RTW_HALMAC_SUCCESS; } struct halmac_platform_api rtw_halmac_platform_api = { @@ -689,14 +751,14 @@ struct halmac_platform_api rtw_halmac_platform_api = { .SDIO_CMD53_WRITE_32 = _halmac_sdio_reg_write_32, .SDIO_CMD52_CIA_READ = _halmac_sdio_read_cia, #endif /* CONFIG_SDIO_HCI */ -#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCIE_HCI) +#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) .REG_READ_8 = _halmac_reg_read_8, .REG_READ_16 = _halmac_reg_read_16, .REG_READ_32 = _halmac_reg_read_32, .REG_WRITE_8 = _halmac_reg_write_8, .REG_WRITE_16 = _halmac_reg_write_16, .REG_WRITE_32 = _halmac_reg_write_32, -#endif /* CONFIG_USB_HCI || CONFIG_PCIE_HCI */ +#endif /* CONFIG_USB_HCI || CONFIG_PCI_HCI */ /* Write data */ #if 0 @@ -983,7 +1045,7 @@ static int init_write_rsvd_page_size(struct dvobj_priv *d) #ifdef CONFIG_USB_HCI /* for USB do not exceed MAX_CMDBUF_SZ */ size = 0x1000; -#elif defined(CONFIG_PCIE_HCI) +#elif defined(CONFIG_PCI_HCI) size = MAX_CMDBUF_SZ - TXDESC_OFFSET; #elif defined(CONFIG_SDIO_HCI) size = 0x7000; /* 28KB */ @@ -1122,7 +1184,7 @@ int rtw_halmac_init_adapter(struct dvobj_priv *d, struct halmac_platform_api *pf intf = HALMAC_INTERFACE_SDIO; #elif defined(CONFIG_USB_HCI) intf = HALMAC_INTERFACE_USB; -#elif defined(CONFIG_PCIE_HCI) +#elif defined(CONFIG_PCI_HCI) intf = HALMAC_INTERFACE_PCIE; #else #warning "INTERFACE(CONFIG_XXX_HCI) not be defined!!" @@ -2323,6 +2385,164 @@ int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop return 0; } +/** + * rtw_halmac_set_rts_full_bw() - Send RTS to all covered channels + * @d: struct dvobj_priv* + * @enable: _TRUE(enable), _FALSE(disable) + * + * Hradware will duplicate RTS packet to all channels which are covered in used + * bandwidth. + * + * Return 0 if process OK, otherwise -1. + */ +int rtw_halmac_set_rts_full_bw(struct dvobj_priv *d, u8 enable) +{ + struct halmac_adapter *mac; + struct halmac_api *api; + enum halmac_ret_status status; + u8 full; + + + mac = dvobj_to_halmac(d); + api = HALMAC_GET_API(mac); + full = (enable == _TRUE) ? 1 : 0; + + status = api->halmac_set_hw_value(mac, HALMAC_HW_RTS_FULL_BW, &full); + if (HALMAC_RET_SUCCESS != status) + return -1; + + return 0; +} + +#ifdef RTW_HALMAC_DBG_POWER_SWITCH +static void _dump_mac_reg(struct dvobj_priv *d, u32 start, u32 end) +{ + struct _ADAPTER *adapter; + int i, j = 1; + + + adapter = dvobj_get_primary_adapter(d); + for (i = start; i < end; i += 4) { + if (j % 4 == 1) + RTW_PRINT("0x%04x", i); + _RTW_PRINT(" 0x%08x ", rtw_read32(adapter, i)); + if ((j++) % 4 == 0) + _RTW_PRINT("\n"); + } +} + +void dump_dbg_val(struct _ADAPTER *a, u32 reg) +{ + u32 v32; + + + rtw_write8(a, 0x3A, reg); + v32 = rtw_read32(a, 0xC0); + RTW_PRINT("0x3A = %02x, 0xC0 = 0x%08x\n",reg, v32); +} + +#ifdef CONFIG_PCI_HCI +static void _dump_pcie_cfg_space(struct dvobj_priv *d) +{ + struct _ADAPTER *padapter = dvobj_get_primary_adapter(d); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct pci_dev *pdev = pdvobjpriv->ppcidev; + struct pci_dev *bridge_pdev = pdev->bus->self; + + u32 tmp[4] = { 0 }; + u32 i, j; + + RTW_PRINT("\n***** PCI Device Configuration Space *****\n\n"); + + for(i = 0; i < 0x100; i += 0x10) + { + for (j = 0 ; j < 4 ; j++) + pci_read_config_dword(pdev, i + j * 4, tmp+j); + + RTW_PRINT("%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", + i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF, + tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF, + tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF, + tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF); + } + + RTW_PRINT("\n***** PCI Host Device Configuration Space*****\n\n"); + + for(i = 0; i < 0x100; i += 0x10) + { + for (j = 0 ; j < 4 ; j++) + pci_read_config_dword(bridge_pdev, i + j * 4, tmp+j); + + RTW_PRINT("%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", + i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF, + tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF, + tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF, + tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF); + } +} +#endif + +static void _dump_mac_reg_for_power_switch(struct dvobj_priv *d, + const char* caller, char* desc) +{ + struct _ADAPTER *a; + u8 v8; + + + RTW_PRINT("%s: %s\n", caller, desc); + RTW_PRINT("======= MAC REG =======\n"); + /* page 0/1 */ + _dump_mac_reg(d, 0x0, 0x200); + _dump_mac_reg(d, 0x300, 0x400); /* also dump page 3 */ + + /* dump debug register */ + a = dvobj_get_primary_adapter(d); + +#ifdef CONFIG_PCI_HCI + _dump_pcie_cfg_space(d); + + v8 = rtw_read8(a, 0xF6) | 0x01; + rtw_write8(a, 0xF6, v8); + RTW_PRINT("0xF6 = %02x\n", v8); + + dump_dbg_val(a, 0x63); + dump_dbg_val(a, 0x64); + dump_dbg_val(a, 0x68); + dump_dbg_val(a, 0x69); + dump_dbg_val(a, 0x6a); + dump_dbg_val(a, 0x6b); + dump_dbg_val(a, 0x71); + dump_dbg_val(a, 0x72); +#endif +} + +static enum halmac_ret_status _power_switch(struct halmac_adapter *halmac, + struct halmac_api *api, + enum halmac_mac_power pwr) +{ + enum halmac_ret_status status; + char desc[80] = {0}; + + + rtw_sprintf(desc, 80, "before calling power %s", + (pwr==HALMAC_MAC_POWER_ON)?"on":"off"); + _dump_mac_reg_for_power_switch((struct dvobj_priv *)halmac->drv_adapter, + __FUNCTION__, desc); + + status = api->halmac_mac_power_switch(halmac, pwr); + RTW_PRINT("%s: status=%d\n", __FUNCTION__, status); + + rtw_sprintf(desc, 80, "after calling power %s", + (pwr==HALMAC_MAC_POWER_ON)?"on":"off"); + _dump_mac_reg_for_power_switch((struct dvobj_priv *)halmac->drv_adapter, + __FUNCTION__, desc); + + return status; +} +#else /* !RTW_HALMAC_DBG_POWER_SWITCH */ +#define _power_switch(mac, api, pwr) (api)->halmac_mac_power_switch(mac, pwr) +#endif /* !RTW_HALMAC_DBG_POWER_SWITCH */ + /* * Description: * Power on device hardware. @@ -2340,7 +2560,13 @@ int rtw_halmac_poweron(struct dvobj_priv *d) struct halmac_api *api; enum halmac_ret_status status; int err = -1; +#if defined(CONFIG_PCI_HCI) && defined(CONFIG_RTL8822B) + struct _ADAPTER *a; + u8 v8; + u32 addr; + a = dvobj_get_primary_adapter(d); +#endif halmac = dvobj_to_halmac(d); if (!halmac) @@ -2358,14 +2584,48 @@ int rtw_halmac_poweron(struct dvobj_priv *d) goto out; #endif /* CONFIG_SDIO_HCI */ - status = api->halmac_mac_power_switch(halmac, HALMAC_MAC_POWER_ON); +#if defined(CONFIG_PCI_HCI) && defined(CONFIG_RTL8822B) + addr = 0x3F3; + v8 = rtw_read8(a, addr); + RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8); + /* are we in pcie debug mode? */ + if (!(v8 & BIT(2))) { + RTW_PRINT("%s: Enable pcie debug mode\n", __FUNCTION__); + v8 |= BIT(2); + v8 = rtw_write8(a, addr, v8); + } +#endif + + status = _power_switch(halmac, api, HALMAC_MAC_POWER_ON); if (HALMAC_RET_PWR_UNCHANGE == status) { + +#if defined(CONFIG_PCI_HCI) && defined(CONFIG_RTL8822B) + addr = 0x3F3; + v8 = rtw_read8(a, addr); + RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8); + + /* are we in pcie debug mode? */ + if (!(v8 & BIT(2))) { + RTW_PRINT("%s: Enable pcie debug mode\n", __FUNCTION__); + v8 |= BIT(2); + v8 = rtw_write8(a, addr, v8); + } else if (v8 & BIT(0)) { + /* DMA stuck */ + addr = 0x1350; + v8 = rtw_read8(a, addr); + RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8); + RTW_PRINT("%s: recover DMA stuck\n", __FUNCTION__); + v8 |= BIT(6); + v8 = rtw_write8(a, addr, v8); + RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8); + } +#endif /* * Work around for warm reboot but device not power off, * but it would also fall into this case when auto power on is enabled. */ - api->halmac_mac_power_switch(halmac, HALMAC_MAC_POWER_OFF); - status = api->halmac_mac_power_switch(halmac, HALMAC_MAC_POWER_ON); + _power_switch(halmac, api, HALMAC_MAC_POWER_OFF); + status = _power_switch(halmac, api, HALMAC_MAC_POWER_ON); RTW_WARN("%s: Power state abnormal, try to recover...%s\n", __FUNCTION__, (HALMAC_RET_SUCCESS == status)?"OK":"FAIL!"); } @@ -2406,7 +2666,7 @@ int rtw_halmac_poweroff(struct dvobj_priv *d) api = HALMAC_GET_API(halmac); - status = api->halmac_mac_power_switch(halmac, HALMAC_MAC_POWER_OFF); + status = _power_switch(halmac, api, HALMAC_MAC_POWER_OFF); if ((HALMAC_RET_SUCCESS != status) && (HALMAC_RET_PWR_UNCHANGE != status)) goto out; @@ -2454,7 +2714,7 @@ void dump_trx_share_mode(void *sel, struct _ADAPTER *adapter) } #endif -static enum halmac_drv_rsvd_pg_num _rsvd_page_num_drv2halmac(u8 num) +static enum halmac_drv_rsvd_pg_num _rsvd_page_num_drv2halmac(u16 num) { if (num <= 8) return HALMAC_RSVD_PG_NUM8; @@ -2466,18 +2726,20 @@ static enum halmac_drv_rsvd_pg_num _rsvd_page_num_drv2halmac(u8 num) return HALMAC_RSVD_PG_NUM32; if (num <= 64) return HALMAC_RSVD_PG_NUM64; + if (num <= 128) + return HALMAC_RSVD_PG_NUM128; - if (num > 128) + if (num > 256) RTW_WARN("%s: Fail to allocate RSVD page(%d)!!" - " The MAX RSVD page number is 128...\n", + " The MAX RSVD page number is 256...\n", __FUNCTION__, num); - return HALMAC_RSVD_PG_NUM128; + return HALMAC_RSVD_PG_NUM256; } -static u8 _rsvd_page_num_halmac2drv(enum halmac_drv_rsvd_pg_num rsvd_page_number) +static u16 _rsvd_page_num_halmac2drv(enum halmac_drv_rsvd_pg_num rsvd_page_number) { - u8 num = 0; + u16 num = 0; switch (rsvd_page_number) { @@ -2504,6 +2766,10 @@ static u8 _rsvd_page_num_halmac2drv(enum halmac_drv_rsvd_pg_num rsvd_page_number case HALMAC_RSVD_PG_NUM128: num = 128; break; + + case HALMAC_RSVD_PG_NUM256: + num = 256; + break; } return num; @@ -2718,7 +2984,7 @@ static int _cfg_drv_rsvd_pg_num(struct dvobj_priv *d) struct halmac_api *api; enum halmac_drv_rsvd_pg_num rsvd_page_number; enum halmac_ret_status status; - u8 drv_rsvd_num; + u16 drv_rsvd_num; a = dvobj_get_primary_adapter(d); @@ -2926,6 +3192,13 @@ exit: return err; } +static void _init_trx_cfg_drv(struct dvobj_priv *d) +{ +#ifdef CONFIG_PCI_HCI + rtw_hal_irp_reset(dvobj_get_primary_adapter(d)); +#endif +} + /* * Description: * Downlaod Firmware Flow @@ -3027,6 +3300,7 @@ resume_tx: status = api->halmac_init_trx_cfg(mac, mode); if (HALMAC_RET_SUCCESS != status) return -1; + _init_trx_cfg_drv(d); /* 9. Config RX Aggregation */ err = rtw_halmac_rx_agg_switch(d, _TRUE); @@ -3070,10 +3344,15 @@ static int init_mac_flow(struct dvobj_priv *d) goto out; #endif -#if 0 /* It is not necessary to call this in normal driver */ - status = api->halmac_cfg_la_mode(halmac, HALMAC_LA_MODE_DISABLE); - if (status != HALMAC_RET_SUCCESS) - goto out; +#ifdef DBG_LA_MODE + if (dvobj_to_regsty(d)->la_mode_en) { + status = api->halmac_cfg_la_mode(halmac, HALMAC_LA_MODE_PARTIAL); + if (status != HALMAC_RET_SUCCESS) { + RTW_ERR("%s: Fail to enable LA mode!\n", __FUNCTION__); + goto out; + } + RTW_PRINT("%s: Enable LA mode OK.\n", __FUNCTION__); + } #endif err = _cfg_drv_rsvd_pg_num(d); @@ -3090,6 +3369,7 @@ static int init_mac_flow(struct dvobj_priv *d) status = api->halmac_init_mac_cfg(halmac, trx_mode); if (status != HALMAC_RET_SUCCESS) goto out; + _init_trx_cfg_drv(d); err = rtw_halmac_rx_agg_switch(d, _TRUE); if (err) @@ -3120,7 +3400,11 @@ static int _drv_enable_trx(struct dvobj_priv *d) adapter = dvobj_get_primary_adapter(d); if (adapter->bup == _FALSE) { +#ifdef CONFIG_NEW_NETDEV_HDL + status = rtw_mi_start_drv_threads(adapter); +#else status = rtw_start_drv_threads(adapter); +#endif if (status == _FAIL) { RTW_ERR("%s: Start threads Failed!\n", __FUNCTION__); return -1; @@ -3395,7 +3679,7 @@ int rtw_halmac_txfifo_wait_empty(struct dvobj_priv *d, u32 timeout) if (empty == _FALSE) { #ifdef CONFIG_RTW_DEBUG u16 dbg_reg[] = {0x210, 0x230, 0x234, 0x238, 0x23C, 0x240, - 0x41A, 0x10FC, 0x10F8, 0x11F4, 0x11F8}; + 0x418, 0x10FC, 0x10F8, 0x11F4, 0x11F8}; u8 i; u32 val; @@ -3612,6 +3896,7 @@ int rtw_halmac_phy_power_switch(struct dvobj_priv *d, u8 enable) struct halmac_adapter *halmac; struct halmac_api *api; enum halmac_ret_status status; + u8 on; adapter = dvobj_get_primary_adapter(d); @@ -3619,8 +3904,9 @@ int rtw_halmac_phy_power_switch(struct dvobj_priv *d, u8 enable) if (!halmac) return -1; api = HALMAC_GET_API(halmac); + on = (enable == _TRUE) ? 1 : 0; - status = api->halmac_set_hw_value(halmac, HALMAC_HW_EN_BB_RF, &enable); + status = api->halmac_set_hw_value(halmac, HALMAC_HW_EN_BB_RF, &on); if (status != HALMAC_RET_SUCCESS) return -1; @@ -4141,7 +4427,7 @@ _exit: /* * rtw_halmac_rx_agg_switch() - Switch RX aggregation function and setting * @d struct dvobj_priv * - * @enable 0/1 for disable/enable RX aggregation function + * @enable _FALSE/_TRUE for disable/enable RX aggregation function * * This function could help to on/off bus RX aggregation function, and is only * useful for SDIO and USB interface. Although only "enable" flag is brough in, @@ -4291,6 +4577,7 @@ int rtw_halmac_p2pps(struct dvobj_priv *dvobj, struct hal_p2p_ps_para *pp2p_ps_p (&halmac_p2p_ps)->noa_sel = pp2p_ps_para->noa_sel; (&halmac_p2p_ps)->all_sta_sleep = pp2p_ps_para->all_sta_sleep; (&halmac_p2p_ps)->discovery = pp2p_ps_para->discovery; + (&halmac_p2p_ps)->disable_close_rf = pp2p_ps_para->disable_close_rf; (&halmac_p2p_ps)->p2p_port_id = _hw_port_drv2halmac(pp2p_ps_para->p2p_port_id); (&halmac_p2p_ps)->p2p_group = pp2p_ps_para->p2p_group; (&halmac_p2p_ps)->p2p_macid = pp2p_ps_para->p2p_macid; @@ -4636,6 +4923,247 @@ void rtw_halmac_led_switch(struct dvobj_priv *d, u8 on) api->halmac_pinmux_wl_led_sw_ctrl(halmac, on); } +/** + * rtw_halmac_bt_wake_cfg() - Configure BT wake host function + * @d: struct dvobj_priv* + * @enable: enable or disable BT wake host function + * 0: disable + * 1: enable + * + * Configure pinmux to allow BT to control BT wake host pin. + * + * Rteurn 0 for OK, otherwise fail. + */ +int rtw_halmac_bt_wake_cfg(struct dvobj_priv *d, u8 enable) +{ + struct halmac_adapter *halmac; + struct halmac_api *api; + enum halmac_ret_status status; + + + halmac = dvobj_to_halmac(d); + api = HALMAC_GET_API(halmac); + + if (enable) { + status = api->halmac_pinmux_set_func(halmac, + HALMAC_GPIO_FUNC_BT_HOST_WAKE1); + if (status != HALMAC_RET_SUCCESS) { + RTW_ERR("%s: pinmux set BT_HOST_WAKE1 fail!(0x%x)\n", + __FUNCTION__, status); + return -1; + } + } else { + status = api->halmac_pinmux_free_func(halmac, + HALMAC_GPIO_FUNC_BT_HOST_WAKE1); + if (status != HALMAC_RET_SUCCESS) { + RTW_ERR("%s: pinmux free BT_HOST_WAKE1 fail!(0x%x)\n", + __FUNCTION__, status); + return -1; + } + } + + return 0; +} + +#ifdef CONFIG_PNO_SUPPORT +/** + * _halmac_scanoffload() - Switch channel by firmware during scanning + * @d: struct dvobj_priv* + * @enable: 1: enable, 0: disable + * @nlo: 1: nlo mode (no c2h event), 0: normal mode + * @ssid: ssid of probe request + * @ssid_len: ssid length + * + * Switch Channel and Send Porbe Request Offloaded by FW + * + * Rteurn 0 for OK, otherwise fail. + */ +static int _halmac_scanoffload(struct dvobj_priv *d, u32 enable, u8 nlo, + u8 *ssid, u8 ssid_len) +{ + struct _ADAPTER *adapter; + struct halmac_adapter *mac; + struct halmac_api *api; + enum halmac_ret_status status; + struct halmac_ch_info ch_info; + struct halmac_ch_switch_option cs_option; + struct mlme_ext_priv *pmlmeext; + enum halmac_feature_id id_update, id_ch_sw; + struct halmac_indicator *indicator, *tbl; + + int err = 0; + u8 probereq[64]; + u32 len = 0; + int i = 0; + struct pno_ssid pnossid; + struct rf_ctl_t *rfctl = NULL; + struct _RT_CHANNEL_INFO *ch_set; + + + tbl = d->hmpriv.indicator; + adapter = dvobj_get_primary_adapter(d); + mac = dvobj_to_halmac(d); + if (!mac) + return -1; + api = HALMAC_GET_API(mac); + id_update = HALMAC_FEATURE_UPDATE_PACKET; + id_ch_sw = HALMAC_FEATURE_CHANNEL_SWITCH; + pmlmeext = &(adapter->mlmeextpriv); + rfctl = adapter_to_rfctl(adapter); + ch_set = rfctl->channel_set; + + RTW_INFO("%s: %s scanoffload, mode: %s\n", + __FUNCTION__, enable?"Enable":"Disable", + nlo?"PNO/NLO":"Normal"); + + if (enable) { + _rtw_memset(probereq, 0, sizeof(probereq)); + + _rtw_memset(&pnossid, 0, sizeof(pnossid)); + if (ssid) { + if (ssid_len > sizeof(pnossid.SSID)) { + RTW_ERR("%s: SSID length(%d) is too long(>%d)!!\n", + __FUNCTION__, ssid_len, sizeof(pnossid.SSID)); + return -1; + } + + pnossid.SSID_len = ssid_len; + _rtw_memcpy(pnossid.SSID, ssid, ssid_len); + } + + rtw_hal_construct_ProbeReq(adapter, probereq, &len, &pnossid); + + if (!nlo) { + err = init_halmac_event(d, id_update, NULL, 0); + if (err) + return -1; + } + + status = api->halmac_update_packet(mac, HALMAC_PACKET_PROBE_REQ, + probereq, len); + if (status != HALMAC_RET_SUCCESS) { + if (!nlo) + free_halmac_event(d, id_update); + RTW_ERR("%s: halmac_update_packet FAIL(%d)!!\n", + __FUNCTION__, status); + return -1; + } + + if (!nlo) { + err = wait_halmac_event(d, id_update); + if (err) + RTW_ERR("%s: wait update packet FAIL(%d)!!\n", + __FUNCTION__, err); + } + + api->halmac_clear_ch_info(mac); + + for (i = 0; i < rfctl->max_chan_nums && ch_set[i].ChannelNum != 0; i++) { + _rtw_memset(&ch_info, 0, sizeof(ch_info)); + ch_info.extra_info = 0; + ch_info.channel = ch_set[i].ChannelNum; + ch_info.bw = HALMAC_BW_20; + ch_info.pri_ch_idx = HALMAC_CH_IDX_1; + ch_info.action_id = HALMAC_CS_ACTIVE_SCAN; + ch_info.timeout = 1; + status = api->halmac_add_ch_info(mac, &ch_info); + if (status != HALMAC_RET_SUCCESS) { + RTW_ERR("%s: add_ch_info FAIL(%d)!!\n", + __FUNCTION__, status); + return -1; + } + } + + /* set channel switch option */ + _rtw_memset(&cs_option, 0, sizeof(cs_option)); + cs_option.dest_bw = HALMAC_BW_20; + cs_option.periodic_option = HALMAC_CS_PERIODIC_2_PHASE; + cs_option.dest_pri_ch_idx = HALMAC_CH_IDX_UNDEFINE; + cs_option.tsf_low = 0; + cs_option.switch_en = 1; + cs_option.dest_ch_en = 1; + cs_option.absolute_time_en = 0; + cs_option.dest_ch = 1; + + cs_option.normal_period = 5; + cs_option.normal_period_sel = 0; + cs_option.normal_cycle = 10; + + cs_option.phase_2_period = 1; + cs_option.phase_2_period_sel = 1; + + /* nlo is for wow fw, 1: no c2h response */ + cs_option.nlo_en = nlo; + + if (!nlo) { + err = init_halmac_event(d, id_ch_sw, NULL, 0); + if (err) + return -1; + } + + status = api->halmac_ctrl_ch_switch(mac, &cs_option); + if (status != HALMAC_RET_SUCCESS) { + if (!nlo) + free_halmac_event(d, id_ch_sw); + RTW_ERR("%s: halmac_ctrl_ch_switch FAIL(%d)!!\n", + __FUNCTION__, status); + return -1; + } + + if (!nlo) { + err = wait_halmac_event(d, id_ch_sw); + if (err) + RTW_ERR("%s: wait ctrl_ch_switch FAIL(%d)!!\n", + __FUNCTION__, err); + } + } else { + api->halmac_clear_ch_info(mac); + + _rtw_memset(&cs_option, 0, sizeof(cs_option)); + cs_option.switch_en = 0; + + if (!nlo) { + err = init_halmac_event(d, id_ch_sw, NULL, 0); + if (err) + return -1; + } + + status = api->halmac_ctrl_ch_switch(mac, &cs_option); + if (status != HALMAC_RET_SUCCESS) { + if (!nlo) + free_halmac_event(d, id_ch_sw); + RTW_ERR("%s: halmac_ctrl_ch_switch FAIL(%d)!!\n", + __FUNCTION__, status); + return -1; + } + + if (!nlo) { + err = wait_halmac_event(d, id_ch_sw); + if (err) + RTW_ERR("%s: wait ctrl_ch_switch FAIL(%d)!!\n", + __FUNCTION__, err); + } + } + + return 0; +} + +/** + * rtw_halmac_pno_scanoffload() - Control firmware scan AP function for PNO + * @d: struct dvobj_priv* + * @enable: 1: enable, 0: disable + * + * Switch firmware scan AP function for PNO(prefer network offload) or + * NLO(network list offload). + * + * Rteurn 0 for OK, otherwise fail. + */ +int rtw_halmac_pno_scanoffload(struct dvobj_priv *d, u32 enable) +{ + return _halmac_scanoffload(d, enable, 1, NULL, 0); +} +#endif /* CONFIG_PNO_SUPPORT */ + #ifdef CONFIG_SDIO_HCI /* @@ -4801,6 +5329,22 @@ u32 rtw_halmac_sdio_get_rx_addr(struct dvobj_priv *d, u8 *seq) (*seq)++; return RTW_SDIO_ADDR_RX_RX0FF_GEN(id); } + +int rtw_halmac_sdio_set_tx_format(struct dvobj_priv *d, enum halmac_sdio_tx_format format) +{ + struct halmac_adapter *mac; + struct halmac_api *api; + enum halmac_ret_status status; + + mac = dvobj_to_halmac(d); + api = HALMAC_GET_API(mac); + + status = api->halmac_set_hw_value(mac, HALMAC_HW_SDIO_TX_FORMAT, &format); + if (HALMAC_RET_SUCCESS != status) + return -1; + + return 0; +} #endif /* CONFIG_SDIO_HCI */ #ifdef CONFIG_USB_HCI @@ -4973,9 +5517,32 @@ int rtw_halmac_bf_del_sounding(struct dvobj_priv *d, return 0; } +/** + * rtw_halmac_bf_cfg_csi_rate() - Config data rate for CSI report by CSSI + * @d: struct dvobj_priv* + * @rssi: RSSI vlaue, unit is percentage (0~100). + * @current_rate: Current CSI frame rate + * Valid value example + * 0 CCK 1M + * 3 CCK 11M + * 4 OFDM 6M + * and so on + * @fixrate_en: Enable to fix CSI frame in VHT rate, otherwise legacy OFDM rate. + * The value "0" for disable, otheriwse enable. + * @new_rate: Return new data rate, and value range is the same as current_rate + * @bmp_ofdm54: Return to suggest enabling OFDM 54M for CSI report frame or not, + * The valid values and meanings are: + * 0x00 disable + * 0x01 enable + * 0xFF Keep current setting + * + * According RSSI to config data rate for CSI report frame of Beamforming. + * + * Rteurn 0 for OK, otherwise fail. + */ int rtw_halmac_bf_cfg_csi_rate(struct dvobj_priv *d, u8 rssi, u8 current_rate, u8 fixrate_en, - u8 *new_rate) + u8 *new_rate, u8 *bmp_ofdm54) { struct halmac_adapter *mac; struct halmac_api *api; @@ -4986,7 +5553,7 @@ int rtw_halmac_bf_cfg_csi_rate(struct dvobj_priv *d, api = HALMAC_GET_API(mac); status = api->halmac_cfg_csi_rate(mac, - rssi, current_rate, fixrate_en, new_rate); + rssi, current_rate, fixrate_en, new_rate, bmp_ofdm54); if (status != HALMAC_RET_SUCCESS) return -1; diff --git a/hal/hal_halmac.h b/hal/hal_halmac.h index 4555b18..12260f0 100644 --- a/hal/hal_halmac.h +++ b/hal/hal_halmac.h @@ -1,6 +1,6 @@ /****************************************************************************** * - * Copyright(c) 2015 - 2017 Realtek Corporation. + * Copyright(c) 2015 - 2019 Realtek Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as @@ -152,6 +152,7 @@ int rtw_halmac_set_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport, struct r int rtw_halmac_set_aid(struct dvobj_priv *d, enum _hw_port hwport, u16 aid); int rtw_halmac_set_bandwidth(struct dvobj_priv *d, u8 channel, u8 pri_ch_idx, u8 bw); int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop); +int rtw_halmac_set_rts_full_bw(struct dvobj_priv *d, u8 enable); /* Functions */ int rtw_halmac_poweron(struct dvobj_priv *); @@ -196,6 +197,10 @@ int rtw_halmac_iqk(struct dvobj_priv *d, u8 clear, u8 segment); int rtw_halmac_cfg_phy_para(struct dvobj_priv *d, struct rtw_phy_parameter *para); int rtw_halmac_led_cfg(struct dvobj_priv *d, u8 enable, u8 mode); void rtw_halmac_led_switch(struct dvobj_priv *d, u8 on); +int rtw_halmac_bt_wake_cfg(struct dvobj_priv *d, u8 enable); +#ifdef CONFIG_PNO_SUPPORT +int rtw_halmac_pno_scanoffload(struct dvobj_priv *d, u32 enable); +#endif #ifdef CONFIG_SDIO_HCI int rtw_halmac_query_tx_page_num(struct dvobj_priv *); @@ -203,6 +208,7 @@ int rtw_halmac_get_tx_queue_page_num(struct dvobj_priv *, u8 queue, u32 *page); u32 rtw_halmac_sdio_get_tx_addr(struct dvobj_priv *, u8 *desc, u32 size); int rtw_halmac_sdio_tx_allowed(struct dvobj_priv *, u8 *buf, u32 size); u32 rtw_halmac_sdio_get_rx_addr(struct dvobj_priv *, u8 *seq); +int rtw_halmac_sdio_set_tx_format(struct dvobj_priv *d, enum halmac_sdio_tx_format format); #endif /* CONFIG_SDIO_HCI */ #ifdef CONFIG_USB_HCI @@ -226,7 +232,7 @@ int rtw_halmac_bf_cfg_sounding(struct dvobj_priv *d, enum halmac_snd_role role, int rtw_halmac_bf_del_sounding(struct dvobj_priv *d, enum halmac_snd_role role); int rtw_halmac_bf_cfg_csi_rate(struct dvobj_priv *d, u8 rssi, u8 current_rate, - u8 fixrate_en, u8 *new_rate); + u8 fixrate_en, u8 *new_rate, u8 *bmp_ofdm54); int rtw_halmac_bf_cfg_mu_mimo(struct dvobj_priv *d, enum halmac_snd_role role, u8 *sounding_sts, u16 grouping_bitmap, u8 mu_tx_en, diff --git a/hal/hal_hci/hal_usb.c b/hal/hal_hci/hal_usb.c index e47135b..20dc07b 100644 --- a/hal/hal_hci/hal_usb.c +++ b/hal/hal_hci/hal_usb.c @@ -333,6 +333,13 @@ u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr) wvalue = (u16)(addr & 0x0000ffff); len = 1; + +/* WLANON PAGE0_REG needs to add an offset 0x8000 */ +#if defined(CONFIG_RTL8710B) + if(wvalue >= 0x0000 && wvalue < 0x0100) + wvalue |= 0x8000; +#endif + usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); @@ -356,6 +363,13 @@ u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr) wvalue = (u16)(addr & 0x0000ffff); len = 2; + +/* WLANON PAGE0_REG needs to add an offset 0x8000 */ +#if defined(CONFIG_RTL8710B) + if(wvalue >= 0x0000 && wvalue < 0x0100) + wvalue |= 0x8000; +#endif + usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); @@ -380,6 +394,13 @@ u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr) wvalue = (u16)(addr & 0x0000ffff); len = 4; + +/* WLANON PAGE0_REG needs to add an offset 0x8000 */ +#if defined(CONFIG_RTL8710B) + if(wvalue >= 0x0000 && wvalue < 0x0100) + wvalue |= 0x8000; +#endif + usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); @@ -404,8 +425,14 @@ int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) wvalue = (u16)(addr & 0x0000ffff); len = 1; - data = val; + +/* WLANON PAGE0_REG needs to add an offset 0x8000 */ +#if defined(CONFIG_RTL8710B) + if(wvalue >= 0x0000 && wvalue < 0x0100) + wvalue |= 0x8000; +#endif + ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); @@ -430,8 +457,14 @@ int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) wvalue = (u16)(addr & 0x0000ffff); len = 2; - data = val; + +/* WLANON PAGE0_REG needs to add an offset 0x8000 */ +#if defined(CONFIG_RTL8710B) + if(wvalue >= 0x0000 && wvalue < 0x0100) + wvalue |= 0x8000; +#endif + ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); @@ -458,6 +491,13 @@ int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) wvalue = (u16)(addr & 0x0000ffff); len = 4; data = val; + +/* WLANON PAGE0_REG needs to add an offset 0x8000 */ +#if defined(CONFIG_RTL8710B) + if(wvalue >= 0x0000 && wvalue < 0x0100) + wvalue |= 0x8000; +#endif + ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); diff --git a/hal/hal_intf.c b/hal/hal_intf.c index 95966c8..dde6a83 100644 --- a/hal/hal_intf.c +++ b/hal/hal_intf.c @@ -28,9 +28,13 @@ const u32 _chip_type_to_odm_ic_type[] = { ODM_RTL8814A, ODM_RTL8703B, ODM_RTL8188F, + ODM_RTL8188F, ODM_RTL8822B, ODM_RTL8723D, ODM_RTL8821C, + ODM_RTL8710B, + ODM_RTL8192F, + ODM_RTL8822C, 0, }; @@ -75,23 +79,58 @@ void rtw_hal_read_chip_version(_adapter *padapter) rtw_odm_init_ic_type(padapter); } +static void rtw_init_wireless_mode(_adapter *padapter) +{ + u8 proto_wireless_mode = 0; + struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); + if(hal_spec->proto_cap & PROTO_CAP_11B) + proto_wireless_mode |= WIRELESS_11B; + + if(hal_spec->proto_cap & PROTO_CAP_11G) + proto_wireless_mode |= WIRELESS_11G; +#ifdef CONFIG_80211AC_VHT + if(hal_spec->band_cap & BAND_CAP_5G) + proto_wireless_mode |= WIRELESS_11A; +#endif + +#ifdef CONFIG_80211N_HT + if(hal_spec->proto_cap & PROTO_CAP_11N) { + + if(hal_spec->band_cap & BAND_CAP_2G) + proto_wireless_mode |= WIRELESS_11_24N; + if(hal_spec->band_cap & BAND_CAP_5G) + proto_wireless_mode |= WIRELESS_11_5N; + } +#endif + +#ifdef CONFIG_80211AC_VHT + if(hal_spec->proto_cap & PROTO_CAP_11AC) + proto_wireless_mode |= WIRELESS_11AC; +#endif + padapter->registrypriv.wireless_mode &= proto_wireless_mode; +} + void rtw_hal_def_value_init(_adapter *padapter) { if (is_primary_adapter(padapter)) { + /*init fw_psmode_iface_id*/ + adapter_to_pwrctl(padapter)->fw_psmode_iface_id = 0xff; + /*wireless_mode*/ + rtw_init_wireless_mode(padapter); padapter->hal_func.init_default_value(padapter); rtw_init_hal_com_default_value(padapter); + + #ifdef CONFIG_FW_MULTI_PORT_SUPPORT + adapter_to_dvobj(padapter)->dft.port_id = 0xFF; + adapter_to_dvobj(padapter)->dft.mac_id = 0xFF; + #endif + #ifdef CONFIG_HW_P0_TSF_SYNC + adapter_to_dvobj(padapter)->p0_tsf.sync_port = MAX_HW_PORT; + adapter_to_dvobj(padapter)->p0_tsf.offset = 0; + #endif - { - struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); - struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); - - /* hal_spec is ready here */ - dvobj->macid_ctl.num = rtw_min(hal_spec->macid_num, MACID_NUM_SW_LIMIT); - - dvobj->cam_ctl.sec_cap = hal_spec->sec_cap; - dvobj->cam_ctl.num = rtw_min(hal_spec->sec_cam_ent_num, SEC_CAM_ENT_NUM_SW_LIMIT); - } + GET_HAL_DATA(padapter)->rx_tsf_addr_filter_config = 0; } } @@ -104,6 +143,7 @@ u8 rtw_hal_data_init(_adapter *padapter) RTW_INFO("cant not alloc memory for HAL DATA\n"); return _FAIL; } + rtw_phydm_priv_init(padapter); } return _SUCCESS; } @@ -145,6 +185,8 @@ void rtw_hal_dm_deinit(_adapter *padapter) PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); padapter->hal_func.dm_deinit(padapter); + + _rtw_spinlock_free(&pHalData->IQKSpinLock); } } @@ -200,6 +242,7 @@ void rtw_hal_power_off(_adapter *padapter) struct macid_ctl_t *macid_ctl = &padapter->dvobj->macid_ctl; _rtw_memset(macid_ctl->h2c_msr, 0, MACID_NUM_SW_LIMIT); + _rtw_memset(macid_ctl->op_num, 0, H2C_MSR_ROLE_MAX); #ifdef CONFIG_BT_COEXIST rtw_btcoex_PowerOffSetting(padapter); @@ -235,6 +278,60 @@ void rtw_hal_init_opmode(_adapter *padapter) rtw_setopmode_cmd(padapter, networkType, RTW_CMDF_DIRECTLY); } +#ifdef CONFIG_NEW_NETDEV_HDL +uint rtw_hal_iface_init(_adapter *adapter) +{ + uint status = _SUCCESS; + + rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(adapter)); + #ifdef RTW_HALMAC + rtw_hal_hw_port_enable(adapter); + #endif + rtw_sec_restore_wep_key(adapter); + rtw_hal_init_opmode(adapter); + rtw_hal_start_thread(adapter); + return status; +} +uint rtw_hal_init(_adapter *padapter) +{ + uint status = _SUCCESS; + + status = padapter->hal_func.hal_init(padapter); + + if (status == _SUCCESS) { + rtw_set_hw_init_completed(padapter, _TRUE); + if (padapter->registrypriv.notch_filter == 1) + rtw_hal_notch_filter(padapter, 1); + rtw_led_control(padapter, LED_CTL_POWER_ON); + init_hw_mlme_ext(padapter); + #ifdef CONFIG_RF_POWER_TRIM + rtw_bb_rf_gain_offset(padapter); + #endif /*CONFIG_RF_POWER_TRIM*/ + GET_PRIMARY_ADAPTER(padapter)->bup = _TRUE; /*temporary*/ + #ifdef CONFIG_MI_WITH_MBSSID_CAM + rtw_mi_set_mbid_cam(padapter); + #endif + #ifdef CONFIG_SUPPORT_MULTI_BCN + rtw_ap_multi_bcn_cfg(padapter); + #endif + #if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1) + #ifdef CONFIG_DYNAMIC_SOML + rtw_dyn_soml_config(padapter); + #endif + #endif + #ifdef CONFIG_TDMADIG + rtw_phydm_tdmadig(padapter, TDMADIG_INIT); + #endif/*CONFIG_TDMADIG*/ +#ifdef CONFIG_RTW_TX_2PATH_EN + rtw_phydm_tx_2path_en(padapter); +#endif + } else { + rtw_set_hw_init_completed(padapter, _FALSE); + RTW_ERR("%s: hal_init fail\n", __func__); + } + return status; +} +#else uint rtw_hal_init(_adapter *padapter) { uint status = _SUCCESS; @@ -245,7 +342,7 @@ uint rtw_hal_init(_adapter *padapter) if (status == _SUCCESS) { rtw_set_hw_init_completed(padapter, _TRUE); - rtw_restore_mac_addr(padapter); + rtw_mi_set_mac_addr(padapter);/*set mac addr of all ifaces*/ #ifdef RTW_HALMAC rtw_restore_hw_port_cfg(padapter); #endif @@ -261,16 +358,26 @@ uint rtw_hal_init(_adapter *padapter) rtw_hal_init_opmode(padapter); -#ifdef CONFIG_RF_POWER_TRIM + #ifdef CONFIG_RF_POWER_TRIM rtw_bb_rf_gain_offset(padapter); -#endif /*CONFIG_RF_POWER_TRIM*/ + #endif /*CONFIG_RF_POWER_TRIM*/ + + #ifdef CONFIG_SUPPORT_MULTI_BCN + rtw_ap_multi_bcn_cfg(padapter); + #endif #if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1) #ifdef CONFIG_DYNAMIC_SOML rtw_dyn_soml_config(padapter); #endif #endif + #ifdef CONFIG_TDMADIG + rtw_phydm_tdmadig(padapter, TDMADIG_INIT); + #endif/*CONFIG_TDMADIG*/ +#ifdef CONFIG_RTW_TX_2PATH_EN + rtw_phydm_tx_2path_en(padapter); +#endif } else { rtw_set_hw_init_completed(padapter, _FALSE); RTW_ERR("%s: fail\n", __func__); @@ -280,6 +387,7 @@ uint rtw_hal_init(_adapter *padapter) return status; } +#endif uint rtw_hal_deinit(_adapter *padapter) { @@ -309,20 +417,20 @@ void rtw_hal_get_hwreg(_adapter *padapter, u8 variable, u8 *val) padapter->hal_func.GetHwRegHandler(padapter, variable, val); } -u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue) +u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue) { return padapter->hal_func.SetHalDefVarHandler(padapter, eVariable, pValue); } -u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue) +u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue) { return padapter->hal_func.get_hal_def_var_handler(padapter, eVariable, pValue); } -void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, BOOLEAN bSet) +void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, BOOLEAN bSet) { padapter->hal_func.SetHalODMVarHandler(padapter, eVariable, pValue1, bSet); } -void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, PVOID pValue2) +void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, void *pValue2) { padapter->hal_func.GetHalODMVarHandler(padapter, eVariable, pValue1, pValue2); } @@ -500,7 +608,6 @@ s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe) rtw_mgmt_xmitframe_coalesce(padapter, pmgntframe->pkt, pmgntframe); #endif -no_mgmt_coalesce: ret = padapter->hal_func.mgnt_xmit(padapter, pmgntframe); return ret; } @@ -604,10 +711,12 @@ u32 rtw_hal_read_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u3 if (padapter->hal_func.read_rfreg) { data = padapter->hal_func.read_rfreg(padapter, eRFPath, RegAddr, BitMask); - if (match_rf_read_sniff_ranges(eRFPath, RegAddr, BitMask)) { + #ifdef DBG_IO + if (match_rf_read_sniff_ranges(padapter, eRFPath, RegAddr, BitMask)) { RTW_INFO("DBG_IO rtw_hal_read_rfreg(%u, 0x%04x, 0x%08x) read:0x%08x(0x%08x)\n" , eRFPath, RegAddr, BitMask, (data << PHY_CalculateBitShift(BitMask)), data); } + #endif } return data; @@ -617,10 +726,12 @@ void rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, { if (padapter->hal_func.write_rfreg) { - if (match_rf_write_sniff_ranges(eRFPath, RegAddr, BitMask)) { + #ifdef DBG_IO + if (match_rf_write_sniff_ranges(padapter, eRFPath, RegAddr, BitMask)) { RTW_INFO("DBG_IO rtw_hal_write_rfreg(%u, 0x%04x, 0x%08x) write:0x%08x(0x%08x)\n" , eRFPath, RegAddr, BitMask, (Data << PHY_CalculateBitShift(BitMask)), Data); } + #endif padapter->hal_func.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data); @@ -631,6 +742,23 @@ void rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, } } +#ifdef CONFIG_SYSON_INDIRECT_ACCESS +u32 rtw_hal_read_syson_reg(PADAPTER padapter, u32 RegAddr, u32 BitMask) +{ + u32 data = 0; + if (padapter->hal_func.read_syson_reg) + data = padapter->hal_func.read_syson_reg(padapter, RegAddr, BitMask); + + return data; +} + +void rtw_hal_write_syson_reg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data) +{ + if (padapter->hal_func.write_syson_reg) + padapter->hal_func.write_syson_reg(padapter, RegAddr, BitMask, Data); +} +#endif + #if defined(CONFIG_PCI_HCI) s32 rtw_hal_interrupt_handler(_adapter *padapter) { @@ -638,6 +766,11 @@ s32 rtw_hal_interrupt_handler(_adapter *padapter) ret = padapter->hal_func.interrupt_handler(padapter); return ret; } + +void rtw_hal_unmap_beacon_icf(_adapter *padapter) +{ + padapter->hal_func.unmap_beacon_icf(padapter); +} #endif #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT) void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf) @@ -684,18 +817,6 @@ void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, enum channel_width Band padapter->hal_func.set_chnl_bw_handler(padapter, channel, Bandwidth, Offset40, Offset80); } -void rtw_hal_set_tx_power_level(_adapter *padapter, u8 channel) -{ - if (padapter->hal_func.set_tx_power_level_handler) - padapter->hal_func.set_tx_power_level_handler(padapter, channel); -} - -void rtw_hal_get_tx_power_level(_adapter *padapter, s32 *powerlevel) -{ - if (padapter->hal_func.get_tx_power_level_handler) - padapter->hal_func.get_tx_power_level_handler(padapter, powerlevel); -} - void rtw_hal_dm_watchdog(_adapter *padapter) { @@ -939,15 +1060,14 @@ s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload) #endif case C2H_EXTEND: sub_id = payload[0]; + /* no handle, goto default */ __attribute__ ((__fallthrough__)); - default: if (phydm_c2H_content_parsing(adapter_to_phydm(adapter), id, plen, payload) != TRUE) ret = _FAIL; break; } -exit: if (ret != _SUCCESS) { if (id == C2H_EXTEND) RTW_WARN("%s: unknown C2H(0x%02x, 0x%02x)\n", __func__, id, sub_id); @@ -1072,33 +1192,37 @@ static s32 _rtw_hal_macid_bmp_sleep(_adapter *adapter, struct macid_bmp *bmp, u8 { struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter); u16 reg_sleep; - u32 *m = &bmp->m0; + u32 m; u8 mid = 0; u32 val32; do { - if (*m == 0) - goto move_next; - - if (mid == 0) + if (mid == 0) { + m = bmp->m0; reg_sleep = macid_ctl->reg_sleep_m0; #if (MACID_NUM_SW_LIMIT > 32) - else if (mid == 1) + } else if (mid == 1) { + m = bmp->m1; reg_sleep = macid_ctl->reg_sleep_m1; #endif #if (MACID_NUM_SW_LIMIT > 64) - else if (mid == 2) + } else if (mid == 2) { + m = bmp->m2; reg_sleep = macid_ctl->reg_sleep_m2; #endif #if (MACID_NUM_SW_LIMIT > 96) - else if (mid == 3) + } else if (mid == 3) { + m = bmp->m3; reg_sleep = macid_ctl->reg_sleep_m3; #endif - else { + } else { rtw_warn_on(1); break; } + if (m == 0) + goto move_next; + if (!reg_sleep) { rtw_warn_on(1); break; @@ -1107,22 +1231,21 @@ static s32 _rtw_hal_macid_bmp_sleep(_adapter *adapter, struct macid_bmp *bmp, u8 val32 = rtw_read32(adapter, reg_sleep); RTW_INFO(ADPT_FMT" %s m%u=0x%08x, ori reg_0x%03x=0x%08x\n" , ADPT_ARG(adapter), sleep ? "sleep" : "wakeup" - , mid, *m, reg_sleep, val32); + , mid, m, reg_sleep, val32); if (sleep) { - if ((val32 & *m) == *m) + if ((val32 & m) == m) goto move_next; - val32 |= *m; + val32 |= m; } else { - if ((val32 & *m) == 0) + if ((val32 & m) == 0) goto move_next; - val32 &= ~(*m); + val32 &= ~m; } rtw_write32(adapter, reg_sleep, val32); move_next: - m++; mid++; } while (mid * 32 < MACID_NUM_SW_LIMIT); @@ -1202,20 +1325,37 @@ void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num) } #endif +#ifdef CONFIG_FW_CORRECT_BCN void rtw_hal_fw_correct_bcn(_adapter *padapter) { if (padapter->hal_func.fw_correct_bcn) padapter->hal_func.fw_correct_bcn(padapter); } +#endif -void rtw_hal_set_tx_power_index(PADAPTER padapter, u32 powerindex, enum rf_path rfpath, u8 rate) +void rtw_hal_set_tx_power_level(_adapter *adapter, u8 channel) { - return padapter->hal_func.set_tx_power_index_handler(padapter, powerindex, rfpath, rate); + adapter->hal_func.set_tx_power_level_handler(adapter, channel); + rtw_hal_set_txpwr_done(adapter); } -u8 rtw_hal_get_tx_power_index(PADAPTER padapter, enum rf_path rfpath, u8 rate, u8 bandwidth, u8 channel, struct txpwr_idx_comp *tic) +void rtw_hal_set_txpwr_done(_adapter *adapter) { - return padapter->hal_func.get_tx_power_index_handler(padapter, rfpath, rate, bandwidth, channel, tic); + if (adapter->hal_func.set_txpwr_done) + adapter->hal_func.set_txpwr_done(adapter); +} + +void rtw_hal_set_tx_power_index(_adapter *adapter, u32 powerindex + , enum rf_path rfpath, u8 rate) +{ + adapter->hal_func.set_tx_power_index_handler(adapter, powerindex, rfpath, rate); +} + +u8 rtw_hal_get_tx_power_index(_adapter *adapter, enum rf_path rfpath, u8 rate + , u8 bandwidth, u8 channel, struct txpwr_idx_comp *tic) +{ + return adapter->hal_func.get_tx_power_index_handler(adapter, rfpath, rate + , bandwidth, channel, tic); } #ifdef RTW_HALMAC @@ -1492,20 +1632,18 @@ u8 rtw_hal_ops_check(_adapter *padapter) ret = _FAIL; } -#if defined(RTW_HALMAC) && defined(CONFIG_LPS_PG) - if (NULL == padapter->hal_func.fw_mem_dl) { - rtw_hal_error_msg("fw_mem_dl"); - ret = _FAIL; - } -#endif - - if ((IS_HARDWARE_TYPE_8814A(padapter) - || IS_HARDWARE_TYPE_8822BU(padapter) || IS_HARDWARE_TYPE_8822BS(padapter)) + #ifdef CONFIG_FW_CORRECT_BCN + if (IS_HARDWARE_TYPE_8814A(padapter) && NULL == padapter->hal_func.fw_correct_bcn) { rtw_hal_error_msg("fw_correct_bcn"); ret = _FAIL; } + #endif + if (!padapter->hal_func.set_tx_power_level_handler) { + rtw_hal_error_msg("set_tx_power_level_handler"); + ret = _FAIL; + } if (!padapter->hal_func.set_tx_power_index_handler) { rtw_hal_error_msg("set_tx_power_index_handler"); ret = _FAIL; diff --git a/hal/hal_mcc.c b/hal/hal_mcc.c index 27138c7..e841407 100644 --- a/hal/hal_mcc.c +++ b/hal/hal_mcc.c @@ -38,7 +38,6 @@ u8 mcc_switch_channel_policy_table[][7]={ }; const int mcc_max_policy_num = sizeof(mcc_switch_channel_policy_table) /sizeof(u8) /7; -struct mi_state mcc_mstate; static void dump_iqk_val_table(PADAPTER padapter) { @@ -210,6 +209,7 @@ void rtw_hal_mcc_restore_iqk_val(PADAPTER padapter) u8 take_care_iqk = _FALSE; struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); _adapter *iface = NULL; + struct mcc_adapter_priv *mccadapriv = NULL; u8 i = 0; rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk); @@ -219,6 +219,10 @@ void rtw_hal_mcc_restore_iqk_val(PADAPTER padapter) if (iface == NULL) continue; + mccadapriv = &iface->mcc_adapterpriv; + if (mccadapriv->role == MCC_ROLE_MAX) + continue; + rtw_hal_ch_sw_iqk_info_restore(iface, CH_SW_USE_CASE_MCC); } } @@ -362,15 +366,229 @@ static void rtw_hal_mcc_assign_tx_threshold(PADAPTER padapter) break; } break; + default: + RTW_INFO(FUNC_ADPT_FMT": unknown role = %d\n" + , FUNC_ADPT_ARG(padapter), pmccadapriv->role); + break; } } +#ifdef CONFIG_MCC_PHYDM_OFFLOAD +static void mcc_cfg_phdym_rf_ch (_adapter *adapter) +{ + struct mcc_adapter_priv *mccadapriv = &adapter->mcc_adapterpriv; + struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; + HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter); + struct dm_struct *dm = &hal->odmpriv; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + u8 order = 0; + + set_channel_bwmode(adapter, mlmeext->cur_channel, mlmeext->cur_ch_offset, mlmeext->cur_bwmode); + order = mccadapriv->order; + mcc_dm->mcc_rf_channel[order] = phy_query_rf_reg(adapter, RF_PATH_A, 0x18, 0xffffffff); +} + +static void mcc_cfg_phdym_update_macid (_adapter *adapter, u8 add, u8 mac_id) +{ + struct mcc_adapter_priv *mccadapriv = &adapter->mcc_adapterpriv; + struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; + HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter); + struct dm_struct *dm = &hal->odmpriv; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + u8 order = 0, i = 0; + + order = mccadapriv->order; + if (add) { + for (i = 0; i < NUM_STA; i++) { + if (mcc_dm->sta_macid[order][i] == 0xff) { + mcc_dm->sta_macid[order][i] = mac_id; + break; + } + } + } else { + for (i = 0; i < NUM_STA; i++) { + if (mcc_dm->sta_macid[order][i] == mac_id) { + mcc_dm->sta_macid[order][i] = 0xff; + break; + } + } + } + + +} + +static void mcc_cfg_phdym_start(_adapter *adapter, u8 start) +{ + struct dvobj_priv *dvobj; + struct mcc_obj_priv *mccobjpriv; + HAL_DATA_TYPE *hal; + struct dm_struct *dm; + struct _phydm_mcc_dm_ *mcc_dm; + u8 rfk_forbidden = _TRUE; + u8 i = 0, j = 0; + + dvobj = adapter_to_dvobj(adapter); + mccobjpriv = adapter_to_mccobjpriv(adapter); + hal = GET_HAL_DATA(adapter); + dm = &hal->odmpriv; + mcc_dm = &dm->mcc_dm; + + if (start) { + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + mcc_dm->mcc_status = mccobjpriv->mcc_phydm_offload; + #endif + + rfk_forbidden = _TRUE; + halrf_cmn_info_set(dm, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden); + } else { + rfk_forbidden = _FALSE; + halrf_cmn_info_set(dm, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden); + + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + for(i = 0; i < MAX_MCC_NUM; i ++) { + for(j = 0; j < NUM_STA; j ++) { + if (mcc_dm->sta_macid[i][j] != 0xff) + /* clear all used value for mcc stop */ + /* do nothing for mcc start due to phydm will init to 0xff */ + mcc_dm->sta_macid[i][j] = 0xff; + } + mcc_dm->mcc_rf_channel[i] = 0xff; + } + mcc_dm->mcc_status = 0; + #endif + } +} + +static void mcc_cfg_phdym_dump(_adapter *adapter, void *sel) +{ + HAL_DATA_TYPE *hal; + struct dm_struct *dm; + struct _phydm_mcc_dm_ *mcc_dm; + u8 rfk_forbidden = _TRUE; + u8 i = 0, j = 0; + + + hal = GET_HAL_DATA(adapter); + dm = &hal->odmpriv; + mcc_dm = &dm->mcc_dm; + + rfk_forbidden = halrf_cmn_info_get(dm, HALRF_CMNINFO_RFK_FORBIDDEN); + RTW_PRINT_SEL(sel, "dump mcc dm info\n"); + RTW_PRINT_SEL(sel, "mcc_status=%d\n", mcc_dm->mcc_status); + RTW_PRINT_SEL(sel, "rfk_forbidden=%d\n", rfk_forbidden); + for(i = 0; i < MAX_MCC_NUM; i ++) { + + if (mcc_dm->mcc_rf_channel[i] != 0xff) + RTW_PRINT_SEL(sel, "mcc_dm->mcc_rf_channel[%d] = 0x%02x\n", i, mcc_dm->mcc_rf_channel[i]); + + for(j = 0; j < NUM_STA; j ++) { + if (mcc_dm->sta_macid[i][j] != 0xff) + RTW_PRINT_SEL(sel, "mcc_dm->sta_macid[%d][%d] = %d\n", i, j, mcc_dm->sta_macid[i][j]); + } + } +} + +static void mcc_cfg_phdym_offload(_adapter *adapter, u8 enable) +{ + struct mcc_obj_priv *mccobjpriv = adapter_to_mccobjpriv(adapter); + _adapter *iface = NULL; + struct mcc_adapter_priv *mccadapriv = NULL; + HAL_DATA_TYPE *hal = NULL; + struct dm_struct *dm = NULL; + struct _phydm_mcc_dm_ *mcc_dm = NULL; + struct sta_priv *stapriv = NULL; + struct sta_info *sta = NULL; + struct wlan_network *cur_network = NULL; + _irqL irqL; + _list *head = NULL, *list = NULL; + u8 i = 0; + + + hal = GET_HAL_DATA(adapter); + dm = &hal->odmpriv; + mcc_dm = &dm->mcc_dm; + + /* due to phydm will rst related date, driver must set related data */ + if (enable) { + for (i = 0; i < MAX_MCC_NUM; i++) { + iface = mccobjpriv->iface[i]; + if (!iface) + continue; + stapriv = &iface->stapriv; + mccadapriv = &iface->mcc_adapterpriv; + switch (mccadapriv->role) { + case MCC_ROLE_STA: + case MCC_ROLE_GC: + cur_network = &iface->mlmepriv.cur_network; + sta = rtw_get_stainfo(stapriv, cur_network->network.MacAddress); + if (sta) + mcc_cfg_phdym_update_macid(iface, _TRUE, sta->cmn.mac_id); + break; + case MCC_ROLE_AP: + case MCC_ROLE_GO: + _enter_critical_bh(&stapriv->asoc_list_lock, &irqL); + + head = &stapriv->asoc_list; + list = get_next(head); + + while ((rtw_end_of_queue_search(head, list)) == _FALSE) { + sta = LIST_CONTAINOR(list, struct sta_info, asoc_list); + list = get_next(list); + mcc_cfg_phdym_update_macid(iface, _TRUE, sta->cmn.mac_id); + } + + _exit_critical_bh(&stapriv->asoc_list_lock, &irqL); + break; + default: + RTW_INFO("Unknown role\n"); + rtw_warn_on(1); + break; + } + + } + } + + mcc_dm->mcc_status = enable; +} + +static void rtw_hal_mcc_cfg_phydm (_adapter *adapter, enum mcc_cfg_phydm_ops ops, void *data) +{ + switch (ops) { + case MCC_CFG_PHYDM_OFFLOAD: + mcc_cfg_phdym_offload(adapter, *(u8 *)data); + break; + case MCC_CFG_PHYDM_RF_CH: + mcc_cfg_phdym_rf_ch(adapter); + break; + case MCC_CFG_PHYDM_ADD_CLIENT: + mcc_cfg_phdym_update_macid(adapter, _TRUE, *(u8 *)data); + break; + case MCC_CFG_PHYDM_REMOVE_CLIENT: + mcc_cfg_phdym_update_macid(adapter, _FALSE, *(u8 *)data); + break; + case MCC_CFG_PHYDM_START: + mcc_cfg_phdym_start(adapter, _TRUE); + break; + case MCC_CFG_PHYDM_STOP: + mcc_cfg_phdym_start(adapter, _FALSE); + break; + case MCC_CFG_PHYDM_DUMP: + mcc_cfg_phdym_dump(adapter, data); + break; + case MCC_CFG_PHYDM_MAX: + default: + RTW_ERR("[MCC] rtw_hal_mcc_cfg_phydm ops error (%d)\n", ops); + break; + + } +} +#endif + static void rtw_hal_config_mcc_role_setting(PADAPTER padapter, u8 order) { struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); struct mcc_obj_priv *pmccobjpriv = &(pdvobjpriv->mcc_objpriv); struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct wlan_network *cur_network = &(pmlmepriv->cur_network); struct sta_priv *pstapriv = &padapter->stapriv; @@ -381,6 +599,8 @@ static void rtw_hal_config_mcc_role_setting(PADAPTER padapter, u8 order) u8 policy_index = 0; u8 mcc_duration = 0; u8 mcc_interval = 0; + u8 starting_ap_num = DEV_AP_STARTING_NUM(pdvobjpriv); + u8 ap_num = DEV_AP_NUM(pdvobjpriv); policy_index = pmccobjpriv->policy_index; mcc_duration = mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_DURATION_IDX] @@ -388,8 +608,7 @@ static void rtw_hal_config_mcc_role_setting(PADAPTER padapter, u8 order) - mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_GUARD_OFFSET1_IDX]; mcc_interval = mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_INTERVAL_IDX]; - if (MSTATE_AP_STARTING_NUM(&mcc_mstate) == 0 - && MSTATE_AP_NUM(&mcc_mstate) == 0) { + if (starting_ap_num == 0 && ap_num == 0) { pmccadapriv->order = order; if (pmccadapriv->order == 0) { @@ -410,6 +629,9 @@ static void rtw_hal_config_mcc_role_setting(PADAPTER padapter, u8 order) if (psta) { /* combine AP/GO macid and mgmt queue macid to bitmap */ pmccadapriv->mcc_macid_bitmap = BIT(psta->cmn.mac_id) | BIT(pmccadapriv->mgmt_queue_macid); + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_ADD_CLIENT, &psta->cmn.mac_id); + #endif } else { RTW_INFO(FUNC_ADPT_FMT":AP/GO station info is NULL\n", FUNC_ADPT_ARG(padapter)); rtw_warn_on(1); @@ -430,6 +652,9 @@ static void rtw_hal_config_mcc_role_setting(PADAPTER padapter, u8 order) if (psta) { /* combine AP/GO macid and mgmt queue macid to bitmap */ pmccadapriv->mcc_macid_bitmap = BIT(psta->cmn.mac_id) | BIT(pmccadapriv->mgmt_queue_macid); + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_ADD_CLIENT, &psta->cmn.mac_id); + #endif } else { RTW_INFO(FUNC_ADPT_FMT":AP/GO station info is NULL\n", FUNC_ADPT_ARG(padapter)); rtw_warn_on(1); @@ -454,6 +679,9 @@ static void rtw_hal_config_mcc_role_setting(PADAPTER padapter, u8 order) psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); pmccadapriv->mcc_macid_bitmap |= BIT(psta->cmn.mac_id); + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_ADD_CLIENT, &psta->cmn.mac_id); + #endif } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); @@ -503,45 +731,49 @@ static void rtw_hal_config_mcc_role_setting(PADAPTER padapter, u8 order) RTW_INFO("**********************************\n"); pmccobjpriv->iface[pmccadapriv->order] = padapter; + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_RF_CH, NULL); + #endif } -static void rtw_hal_clear_mcc_macid(PADAPTER padapter) -{ - u16 media_status_rpt; - struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; - - switch (pmccadapriv->role) { - case MCC_ROLE_STA: - case MCC_ROLE_GC: - break; - case MCC_ROLE_AP: - case MCC_ROLE_GO: - /* nothing to do */ - break; - default: - RTW_INFO("Unknown role\n"); - rtw_warn_on(1); - break; - } -} - -static void rtw_hal_mcc_rqt_tsf(PADAPTER padapter) +static void rtw_hal_mcc_rqt_tsf(PADAPTER padapter, u64 *out_tsf) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); - struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); + struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); + PADAPTER order0_iface = NULL; + PADAPTER order1_iface = NULL; + struct submit_ctx *tsf_req_sctx = NULL; + enum _hw_port tsfx = MAX_HW_PORT; + enum _hw_port tsfy = MAX_HW_PORT; u8 cmd[H2C_MCC_RQT_TSF_LEN] = {0}; - rtw_sctx_init(&pmccobjpriv->mcc_tsf_req_sctx, MCC_EXPIRE_TIME); + _enter_critical_mutex(&mccobjpriv->mcc_tsf_req_mutex, NULL); - SET_H2CCMD_MCC_RQT_TSFX(cmd, pmccobjpriv->iface[0]->hw_port); - SET_H2CCMD_MCC_RQT_TSFY(cmd, pmccobjpriv->iface[1]->hw_port); + order0_iface = mccobjpriv->iface[0]; + order1_iface = mccobjpriv->iface[1]; + + tsf_req_sctx = &mccobjpriv->mcc_tsf_req_sctx; + rtw_sctx_init(tsf_req_sctx, MCC_EXPIRE_TIME); + mccobjpriv->mcc_tsf_req_sctx_order = 0; + tsfx = rtw_hal_get_port(order0_iface); + tsfy = rtw_hal_get_port(order1_iface); + + SET_H2CCMD_MCC_RQT_TSFX(cmd, tsfx); + SET_H2CCMD_MCC_RQT_TSFY(cmd, tsfy); rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_RQT_TSF, H2C_MCC_RQT_TSF_LEN, cmd); - if (!rtw_sctx_wait(&pmccobjpriv->mcc_tsf_req_sctx, __func__)) + if (!rtw_sctx_wait(tsf_req_sctx, __func__)) RTW_INFO(FUNC_ADPT_FMT": wait for mcc tsf req C2H time out\n", FUNC_ADPT_ARG(padapter)); + if (tsf_req_sctx->status == RTW_SCTX_DONE_SUCCESS && out_tsf != NULL) { + out_tsf[0] = order0_iface->mcc_adapterpriv.tsf; + out_tsf[1] = order1_iface->mcc_adapterpriv.tsf; + } + + + _exit_critical_mutex(&mccobjpriv->mcc_tsf_req_mutex, NULL); } static u8 rtw_hal_mcc_check_start_time_is_valid(PADAPTER padapter, u8 case_num, @@ -681,6 +913,8 @@ static void rtw_hal_mcc_decide_duration(PADAPTER padapter) continue; mccadapriv = &iface->mcc_adapterpriv; + if (mccadapriv->role == MCC_ROLE_MAX) + continue; if (is_primary_adapter(iface)) mccadapriv->mcc_duration = duration_time; @@ -694,15 +928,19 @@ static void rtw_hal_mcc_decide_duration(PADAPTER padapter) static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_update) { + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); u8 need_update = _FALSE; + u8 starting_ap_num = DEV_AP_STARTING_NUM(dvobj); + u8 ap_num = DEV_AP_NUM(dvobj); + /* for STA+STA, modify policy table */ - if (MSTATE_AP_STARTING_NUM(&mcc_mstate) == 0 - && MSTATE_AP_NUM(&mcc_mstate) == 0) { + if (starting_ap_num == 0 && ap_num == 0) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); struct mcc_adapter_priv *pmccadapriv = NULL; _adapter *iface = NULL; + u64 tsf[MAX_MCC_NUM] = {0}; u64 tsf0 = 0, tsf1 = 0; u32 beaconperiod_0 = 0, beaconperiod_1 = 0, tsfdiff = 0; s8 upper_bound_0 = 0, lower_bound_0 = 0; @@ -712,14 +950,14 @@ static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_updat u8 i = 0; /* query TSF */ - rtw_hal_mcc_rqt_tsf(padapter); + rtw_hal_mcc_rqt_tsf(padapter, tsf); /* selecet policy table according TSF diff */ - tsf0 = pmccobjpriv->iface[0]->mcc_adapterpriv.tsf; + tsf0 = tsf[0]; beaconperiod_0 = pmccobjpriv->iface[0]->mlmepriv.cur_network.network.Configuration.BeaconPeriod; tsf0 = rtw_modular64(tsf0, (beaconperiod_0 * TU)); - tsf1 = pmccobjpriv->iface[1]->mcc_adapterpriv.tsf; + tsf1 = tsf[1]; beaconperiod_1 = pmccobjpriv->iface[1]->mlmepriv.cur_network.network.Configuration.BeaconPeriod; tsf1 = rtw_modular64(tsf1, (beaconperiod_1 * TU)); @@ -864,6 +1102,9 @@ static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_updat continue; pmccadapriv = &iface->mcc_adapterpriv; + pmccadapriv = &iface->mcc_adapterpriv; + if (pmccadapriv->role == MCC_ROLE_MAX) + continue; #if 0 if (pmccadapriv->order == 0) { pmccadapriv->mcc_duration = mcc_duration; @@ -905,6 +1146,7 @@ static u8 rtw_hal_decide_mcc_role(PADAPTER padapter) continue; pmccadapriv = &iface->mcc_adapterpriv; + pwdinfo = &iface->wdinfo; if (MLME_IS_GO(iface)) pmccadapriv->role = MCC_ROLE_GO; @@ -912,28 +1154,28 @@ static u8 rtw_hal_decide_mcc_role(PADAPTER padapter) pmccadapriv->role = MCC_ROLE_AP; else if (MLME_IS_GC(iface)) pmccadapriv->role = MCC_ROLE_GC; - else if (MLME_IS_STA(iface)) - pmccadapriv->role = MCC_ROLE_STA; - else { - pwdinfo = &iface->wdinfo; - pmlmepriv = &iface->mlmepriv; - - RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(iface)); - RTW_INFO("Unknown:P2P state:%d, mlme state:0x%2x, mlmext info state:0x%02x\n", - pwdinfo->role, pmlmepriv->fw_state, iface->mlmeextpriv.mlmext_info.state); - rtw_warn_on(1); - ret = _FAIL; - goto exit; + else if (MLME_IS_STA(iface)) { + if (MLME_IS_LINKING(iface) || MLME_IS_ASOC(iface)) + pmccadapriv->role = MCC_ROLE_STA; + else { + /* bypass non-linked/non-linking interface */ + RTW_INFO(FUNC_ADPT_FMT" mlme state:0x%2x\n", + FUNC_ADPT_ARG(iface), MLME_STATE(iface)); + continue; + } + } else { + /* bypass non-linked/non-linking interface */ + RTW_INFO(FUNC_ADPT_FMT" P2P Role:%d, mlme state:0x%2x\n", + FUNC_ADPT_ARG(iface), pwdinfo->role, MLME_STATE(iface)); + continue; } - if (ret == _SUCCESS) { - if (padapter == iface) { - /* current adapter is order 0 */ - rtw_hal_config_mcc_role_setting(iface, 0); - } else { - rtw_hal_config_mcc_role_setting(iface, order); - order ++; - } + if (padapter == iface) { + /* current adapter is order 0 */ + rtw_hal_config_mcc_role_setting(iface, 0); + } else { + rtw_hal_config_mcc_role_setting(iface, order); + order ++; } } @@ -1018,12 +1260,6 @@ void rtw_hal_mcc_upadate_chnl_bw(_adapter *padapter, u8 ch, u8 ch_offset, u8 bw, } } -#ifdef DBG_RSVD_PAGE_CFG -#define RSVD_PAGE_CFG(ops, v1, v2, v3) \ - RTW_INFO("=== [RSVD][%s]-NeedPage:%d, TotalPageNum:%d TotalPacketLen:%d ===\n", \ - ops, v1, v2, v3) -#endif - u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index, u8 tx_desc, u32 page_size, u8 *total_page_num, RSVDPAGE_LOC *rsvd_page_loc, u8 *page_num) { @@ -1034,8 +1270,8 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index, struct mlme_ext_info *pmlmeinfo = NULL; struct mlme_ext_priv *pmlmeext = NULL; struct hal_com_data *hal = GET_HAL_DATA(adapter); + struct mcc_adapter_priv *mccadapriv = NULL; u8 ret = _SUCCESS, i = 0, j =0, order = 0, CurtPktPageNum = 0; - u8 bssid[ETH_ALEN] = {0}; u8 *start = NULL; u8 path = RF_PATH_A; @@ -1044,8 +1280,8 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index, if (!hal->RegIQKFWOffload) RTW_WARN("[MCC] must enable FW IQK for New IC\n"); #endif /* CONFIG_MCC_MODE_V2 */ - /* Null data(interface number) + power index(interface number) + 1 */ - *total_page_num += (2 * dvobj->iface_nums + 3); + *total_page_num += (2 * MAX_MCC_NUM+ 1); + RTW_INFO("[MCC] allocate mcc rsvd page num = %d\n", *total_page_num); goto exit; } @@ -1060,37 +1296,35 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index, if (iface == NULL) continue; - order = iface->mcc_adapterpriv.order; - dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order] = *total_page_num; + mccadapriv = &iface->mcc_adapterpriv; + if (mccadapriv->role == MCC_ROLE_MAX) + continue; - switch (iface->mcc_adapterpriv.role) { + order = mccadapriv->order; + pmccobjpriv->mcc_loc_rsvd_paga[order] = *total_page_num; + + switch (mccadapriv->role) { case MCC_ROLE_STA: case MCC_ROLE_GC: /* Build NULL DATA */ RTW_INFO("LocNull(order:%d): %d\n" - , order, dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order]); + , order, pmccobjpriv->mcc_loc_rsvd_paga[order]); len = 0; - pmlmeext = &iface->mlmeextpriv; - pmlmeinfo = &pmlmeext->mlmext_info; - - _rtw_memcpy(bssid, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); rtw_hal_construct_NullFunctionData(iface - , &pframe[*index], &len, bssid, _FALSE, 0, 0, _FALSE); + , &pframe[*index], &len, _FALSE, 0, 0, _FALSE); rtw_hal_fill_fake_txdesc(iface, &pframe[*index-tx_desc], len, _FALSE, _FALSE, _FALSE); CurtPktPageNum = (u8)PageNum(tx_desc + len, page_size); *total_page_num += CurtPktPageNum; *index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("LocNull", CurtPktPageNum, *total_page_num, *index); - #endif break; case MCC_ROLE_AP: /* Bulid CTS */ RTW_INFO("LocCTS(order:%d): %d\n" - , order, dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order]); + , order, pmccobjpriv->mcc_loc_rsvd_paga[order]); len = 0; rtw_hal_construct_CTS(iface, &pframe[*index], &len); @@ -1100,13 +1334,15 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index, CurtPktPageNum = (u8)PageNum(tx_desc + len, page_size); *total_page_num += CurtPktPageNum; *index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("LocCTS", CurtPktPageNum, *total_page_num, *index); - #endif break; case MCC_ROLE_GO: /* To DO */ break; + default: + RTW_INFO(FUNC_ADPT_FMT": unknown role = %d\n" + , FUNC_ADPT_ARG(iface), mccadapriv->role); + break; } } @@ -1133,7 +1369,7 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index, _rtw_memset(start, 0, page_size); pmccobjpriv->mcc_pwr_idx_rsvd_page[i] = *total_page_num; RTW_INFO(ADPT_FMT" order:%d, pwr_idx_rsvd_page location[%d]: %d\n", - ADPT_ARG(iface), iface->mcc_adapterpriv.order, + ADPT_ARG(iface), mccadapriv->order, i, pmccobjpriv->mcc_pwr_idx_rsvd_page[i]); total_rate_offset = start; @@ -1398,9 +1634,7 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index, CurtPktPageNum = 1; *total_page_num += CurtPktPageNum; *index += (CurtPktPageNum * page_size); - #ifdef DBG_RSVD_PAGE_CFG RSVD_PAGE_CFG("mcc_pwr_idx_rsvd_page", CurtPktPageNum, *total_page_num, *index); - #endif } exit: @@ -1426,12 +1660,17 @@ static void rtw_hal_set_fw_mcc_rsvd_page(PADAPTER padapter) rtw_hal_set_hwreg(port0_iface, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); /* Re-Download beacon */ - for (i = 0; i < dvobj->iface_nums; i++) { + for (i = 0; i < MAX_MCC_NUM; i++) { iface = pmccobjpriv->iface[i]; + if (iface == NULL) + continue; + pmccadapriv = &iface->mcc_adapterpriv; + if (pmccadapriv->role == MCC_ROLE_AP - || pmccadapriv->role == MCC_ROLE_GO) + || pmccadapriv->role == MCC_ROLE_GO) { tx_beacon_hdl(iface, NULL); + } } } @@ -1469,14 +1708,14 @@ static void rtw_hal_set_mcc_time_setting_cmd(PADAPTER padapter) struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); - struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); + struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); u8 cmd[H2C_MCC_TIME_SETTING_LEN] = {0}; u8 fw_eable = 1; u8 swchannel_early_time = MCC_SWCH_FW_EARLY_TIME; - + u8 starting_ap_num = DEV_AP_STARTING_NUM(dvobj); + u8 ap_num = DEV_AP_NUM(dvobj); - if (MSTATE_AP_STARTING_NUM(&mcc_mstate) == 0 - && MSTATE_AP_NUM(&mcc_mstate) == 0) + if (starting_ap_num == 0 && ap_num == 0) /* For STA+GC/STA+STA, TSF of GC/STA does not need to sync from TSF of other STA/GC */ fw_eable = 0; else @@ -1484,12 +1723,22 @@ static void rtw_hal_set_mcc_time_setting_cmd(PADAPTER padapter) fw_eable = 1; if (fw_eable == 1) { - u8 policy_idx = pmccobjpriv->policy_index; + PADAPTER order0_iface = NULL; + PADAPTER order1_iface = NULL; + u8 policy_idx = mccobjpriv->policy_index; u8 tsf_sync_offset = mcc_switch_channel_policy_table[policy_idx][MCC_TSF_SYNC_OFFSET_IDX]; u8 start_time_offset = mcc_switch_channel_policy_table[policy_idx][MCC_START_TIME_OFFSET_IDX]; u8 interval = mcc_switch_channel_policy_table[policy_idx][MCC_INTERVAL_IDX]; u8 guard_offset0 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET0_IDX]; u8 guard_offset1 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET1_IDX]; + enum _hw_port tsf_bsae_port = MAX_HW_PORT; + enum _hw_port tsf_sync_port = MAX_HW_PORT; + order0_iface = mccobjpriv->iface[0]; + order1_iface = mccobjpriv->iface[1]; + + tsf_bsae_port = rtw_hal_get_port(order1_iface); + tsf_sync_port = rtw_hal_get_port(order0_iface); + /* FW set enable */ SET_H2CCMD_MCC_TIME_SETTING_FW_EN(cmd, fw_eable); /* TSF Sync offset */ @@ -1501,13 +1750,13 @@ static void rtw_hal_set_mcc_time_setting_cmd(PADAPTER padapter) /* Early time to inform driver by C2H before switch channel */ SET_H2CCMD_MCC_TIME_SETTING_EARLY_SWITCH_RPT(cmd, swchannel_early_time); /* Port0 sync from Port1, not support multi-port */ - SET_H2CCMD_MCC_TIME_SETTING_ORDER_BASE(cmd, HW_PORT1); - SET_H2CCMD_MCC_TIME_SETTING_ORDER_SYNC(cmd, HW_PORT0); + SET_H2CCMD_MCC_TIME_SETTING_ORDER_BASE(cmd, tsf_bsae_port); + SET_H2CCMD_MCC_TIME_SETTING_ORDER_SYNC(cmd, tsf_sync_port); } else { /* start time offset */ - SET_H2CCMD_MCC_TIME_SETTING_START_TIME(cmd, pmccobjpriv->start_time); + SET_H2CCMD_MCC_TIME_SETTING_START_TIME(cmd, mccobjpriv->start_time); /* interval */ - SET_H2CCMD_MCC_TIME_SETTING_INTERVAL(cmd, pmccobjpriv->interval); + SET_H2CCMD_MCC_TIME_SETTING_INTERVAL(cmd, mccobjpriv->interval); /* Early time to inform driver by C2H before switch channel */ SET_H2CCMD_MCC_TIME_SETTING_EARLY_SWITCH_RPT(cmd, swchannel_early_time); } @@ -1540,7 +1789,7 @@ static void rtw_hal_set_mcc_IQK_offload_cmd(PADAPTER padapter) u8 rf_path_idx = 0, last_order = MAX_MCC_NUM - 1, last_rf_path_index = total_rf_path - 1; /* by order, last order & last_rf_path_index must set ready bit = 1 */ - for (i = 0; i < dvobj->iface_nums; i++) { + for (i = 0; i < MAX_MCC_NUM; i++) { iface = pmccobjpriv->iface[i]; if (iface == NULL) continue; @@ -1622,6 +1871,9 @@ static void rtw_hal_set_mcc_macid_cmd(PADAPTER padapter) continue; pmccadapriv = &iface->mcc_adapterpriv; + if (pmccadapriv->role == MCC_ROLE_MAX) + continue; + order = pmccadapriv->order; bitmap = pmccadapriv->mcc_macid_bitmap; @@ -1703,13 +1955,14 @@ static void rtw_hal_set_mcc_ctrl_cmd_v2(PADAPTER padapter, u8 stop) u8 dis_sw_retry = 0, null_early_time=2, tsfx = 0, update_parm = 0; struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); + struct mcc_adapter_priv *mccadapriv = NULL; struct mlme_ext_priv *pmlmeext = NULL; struct mlme_ext_info *pmlmeinfo = NULL; _adapter *iface = NULL; RTW_INFO(FUNC_ADPT_FMT": stop=%d\n", FUNC_ADPT_ARG(padapter), stop); - for (i = 0; i < dvobj->iface_nums; i++) { + for (i = 0; i < MAX_MCC_NUM; i++) { iface = pmccobjpriv->iface[i]; if (iface == NULL) continue; @@ -1719,10 +1972,11 @@ static void rtw_hal_set_mcc_ctrl_cmd_v2(PADAPTER padapter, u8 stop) continue; } + mccadapriv = &iface->mcc_adapterpriv; + order = mccadapriv->order; - order = iface->mcc_adapterpriv.order; if (!stop) - totalnum = dvobj->iface_nums; + totalnum = MAX_MCC_NUM; else totalnum = 0xff; /* 0xff means stop */ @@ -1730,8 +1984,8 @@ static void rtw_hal_set_mcc_ctrl_cmd_v2(PADAPTER padapter, u8 stop) center_ch = rtw_get_center_ch(pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); pri_ch_idx = get_pri_ch_idx_by_adapter(center_ch, pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); bw = pmlmeext->cur_bwmode; - duration = iface->mcc_adapterpriv.mcc_duration; - role = iface->mcc_adapterpriv.role; + duration = mccadapriv->mcc_duration; + role = mccadapriv->role; incurch = _FALSE; dis_sw_retry = _TRUE; @@ -1751,10 +2005,10 @@ static void rtw_hal_set_mcc_ctrl_cmd_v2(PADAPTER padapter, u8 stop) break; } - null_early_time = iface->mcc_adapterpriv.null_early; + null_early_time = mccadapriv->null_early; c2hrpt = MCC_C2H_REPORT_ALL_STATUS; - tsfx = iface->hw_port; + tsfx = rtw_hal_get_port(iface); update_parm = 0; SET_H2CCMD_MCC_CTRL_V2_ORDER(cmd, order); @@ -1797,6 +2051,7 @@ static void rtw_hal_set_mcc_ctrl_cmd_v1(PADAPTER padapter, u8 stop) u8 duration = 0, role = 0, incurch = 0, rfetype = 0, distxnull = 0, c2hrpt = 0, chscan = 0; struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); + struct mcc_adapter_priv *mccadapriv = NULL; struct mlme_ext_priv *pmlmeext = NULL; struct mlme_ext_info *pmlmeinfo = NULL; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); @@ -1804,7 +2059,7 @@ static void rtw_hal_set_mcc_ctrl_cmd_v1(PADAPTER padapter, u8 stop) RTW_INFO(FUNC_ADPT_FMT": stop=%d\n", FUNC_ADPT_ARG(padapter), stop); - for (i = 0; i < dvobj->iface_nums; i++) { + for (i = 0; i < MAX_MCC_NUM; i++) { iface = pmccobjpriv->iface[i]; if (iface == NULL) continue; @@ -1814,10 +2069,11 @@ static void rtw_hal_set_mcc_ctrl_cmd_v1(PADAPTER padapter, u8 stop) continue; } + mccadapriv = &iface->mcc_adapterpriv; + order = mccadapriv->order; - order = iface->mcc_adapterpriv.order; if (!stop) - totalnum = dvobj->iface_nums; + totalnum = MAX_MCC_NUM; else totalnum = 0xff; /* 0xff means stop */ @@ -1839,8 +2095,8 @@ static void rtw_hal_set_mcc_ctrl_cmd_v1(PADAPTER padapter, u8 stop) } else bw80sc = HAL_PRIME_CHNL_OFFSET_DONT_CARE; - duration = iface->mcc_adapterpriv.mcc_duration; - role = iface->mcc_adapterpriv.role; + duration = mccadapriv->mcc_duration; + role = mccadapriv->role; incurch = _FALSE; @@ -1907,6 +2163,56 @@ static void rtw_hal_set_mcc_ctrl_cmd(PADAPTER padapter, u8 stop) #endif } +static u8 check_mcc_support(PADAPTER adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + u8 sta_linked_num = DEV_STA_LD_NUM(dvobj); + u8 starting_ap_num = DEV_AP_STARTING_NUM(dvobj); + u8 ap_num = DEV_AP_NUM(dvobj); + u8 ret = _FAIL; + + RTW_INFO("[MCC] sta_linked_num=%d, starting_ap_num=%d,ap_num=%d\n", + sta_linked_num, starting_ap_num, ap_num); + + /* case for sta + sta case */ + if (sta_linked_num == MAX_MCC_NUM) { + ret = _SUCCESS; + goto exit; + } + + /* case for starting AP + linked sta */ + if ((starting_ap_num + sta_linked_num) == MAX_MCC_NUM) { + ret = _SUCCESS; + goto exit; + } + + /* case for started AP + linked sta */ + if ((ap_num + sta_linked_num) == MAX_MCC_NUM) { + ret = _SUCCESS; + goto exit; + } + +exit: + return ret; +} + +static void rtw_hal_mcc_start_prehdl(PADAPTER padapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + _adapter *iface = NULL; + struct mcc_adapter_priv *mccadapriv = NULL; + u8 i = 1; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (iface == NULL) + continue; + + mccadapriv = &iface->mcc_adapterpriv; + mccadapriv->role = MCC_ROLE_MAX; + } +} + static u8 rtw_hal_set_mcc_start_setting(PADAPTER padapter, u8 status) { u8 ret = _SUCCESS, enable_tsf_auto_sync = _FALSE; @@ -1919,14 +2225,12 @@ static u8 rtw_hal_set_mcc_start_setting(PADAPTER padapter, u8 status) LeaveAllPowerSaveModeDirect(padapter); } - if (dvobj->iface_nums > MAX_MCC_NUM) { - RTW_INFO("%s: current iface num(%d) > MAX_MCC_NUM(%d)\n", __func__, dvobj->iface_nums, MAX_MCC_NUM); + if (check_mcc_support(padapter) == _FAIL) { ret = _FAIL; goto exit; } - /* update mi_state to decide STA+STA or AP+STA */ - rtw_mi_status(padapter, &mcc_mstate); + rtw_hal_mcc_start_prehdl(padapter); /* configure mcc switch channel setting */ rtw_hal_config_mcc_switch_channel_setting(padapter); @@ -1957,8 +2261,13 @@ static u8 rtw_hal_set_mcc_start_setting(PADAPTER padapter, u8 status) /* set mac id to fw */ rtw_hal_set_mcc_macid_cmd(padapter); - /* disable tsf auto sync */ - rtw_hal_set_hwreg(padapter, HW_VAR_TSF_AUTO_SYNC, &enable_tsf_auto_sync); + if (dvobj->p0_tsf.sync_port != MAX_HW_PORT ) { + /* disable tsf auto sync */ + RTW_INFO("[MCC] disable HW TSF sync\n"); + rtw_hal_set_hwreg(padapter, HW_VAR_TSF_AUTO_SYNC, &enable_tsf_auto_sync); + } else { + RTW_INFO("[MCC] already disable HW TSF sync\n"); + } /* set mcc parameter */ rtw_hal_set_mcc_ctrl_cmd(padapter, _FALSE); @@ -1970,7 +2279,9 @@ exit: static void rtw_hal_set_mcc_stop_setting(PADAPTER padapter, u8 status) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + struct mcc_obj_priv *mccobjpriv = &dvobj->mcc_objpriv; _adapter *iface = NULL; + struct mcc_adapter_priv *mccadapriv = NULL; u8 i = 0; /* * when adapter disconnect, stop mcc mod @@ -1980,10 +2291,13 @@ static void rtw_hal_set_mcc_stop_setting(PADAPTER padapter, u8 status) switch (status) { default: /* let fw switch to other interface channel */ - for (i = 0; i < dvobj->iface_nums; i++) { - iface = dvobj->padapters[i]; + for (i = 0; i < MAX_MCC_NUM; i++) { + iface = mccobjpriv->iface[i]; if (iface == NULL) continue; + + mccadapriv = &iface->mcc_adapterpriv; + /* use other interface to set cmd */ if (iface != padapter) { rtw_hal_set_mcc_ctrl_cmd(iface, _TRUE); @@ -2019,81 +2333,87 @@ static void rtw_hal_mcc_stop_posthdl(PADAPTER padapter) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct mcc_obj_priv *mccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); + struct mcc_adapter_priv *mccadapriv = NULL; _adapter *iface = NULL; PHAL_DATA_TYPE hal; - struct dm_struct *p_dm_odm; u8 i = 0; u8 enable_rx_bar = _FALSE; - for (i = 0; i < dvobj->iface_nums; i++) { - iface = dvobj->padapters[i]; + hal = GET_HAL_DATA(padapter); + + for (i = 0; i < MAX_MCC_NUM; i++) { + iface = mccobjpriv->iface[i]; if (iface == NULL) continue; + /* release network queue */ rtw_netif_wake_queue(iface->pnetdev); - iface->mcc_adapterpriv.mcc_tx_bytes_from_kernel = 0; - iface->mcc_adapterpriv.mcc_last_tx_bytes_from_kernel = 0; - iface->mcc_adapterpriv.mcc_tx_bytes_to_port = 0; + mccadapriv = &iface->mcc_adapterpriv; + mccadapriv->mcc_tx_bytes_from_kernel = 0; + mccadapriv->mcc_last_tx_bytes_from_kernel = 0; + mccadapriv->mcc_tx_bytes_to_port = 0; - if (iface->mcc_adapterpriv.role == MCC_ROLE_GO) + if (mccadapriv->role == MCC_ROLE_GO) rtw_hal_mcc_remove_go_p2p_ie(iface); #ifdef CONFIG_TDLS if (MLME_IS_STA(iface)) { - if (iface->mcc_adapterpriv.backup_tdls_en) { + if (mccadapriv->backup_tdls_en) { rtw_enable_tdls_func(iface); RTW_INFO("%s: Disable MCC, Enable TDLS\n", __func__); - iface->mcc_adapterpriv.backup_tdls_en = _FALSE; + mccadapriv->backup_tdls_en = _FALSE; } } #endif /* CONFIG_TDLS */ - } - hal = GET_HAL_DATA(padapter); - p_dm_odm = &hal->odmpriv; - phydm_dm_early_init(p_dm_odm); + mccadapriv->role = MCC_ROLE_MAX; + mccobjpriv->iface[i] = NULL; + } /* force switch channel */ hal->current_channel = 0; hal->current_channel_bw = CHANNEL_WIDTH_MAX; + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_STOP, NULL); + #endif } static void rtw_hal_mcc_start_posthdl(PADAPTER padapter) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct mcc_obj_priv *mccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); + struct mcc_adapter_priv *mccadapriv = NULL; + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); _adapter *iface = NULL; - PHAL_DATA_TYPE hal; - struct dm_struct *p_dm_odm; - struct _hal_rf_ *p_rf; - u32 support_ability = 0; - u8 i = 0; + u8 i = 0, order = 0; u8 enable_rx_bar = _TRUE; - for (i = 0; i < dvobj->iface_nums; i++) { - iface = dvobj->padapters[i]; + for (i = 0; i < MAX_MCC_NUM; i++) { + iface = mccobjpriv->iface[i]; if (iface == NULL) continue; - iface->mcc_adapterpriv.mcc_tx_bytes_from_kernel = 0; - iface->mcc_adapterpriv.mcc_last_tx_bytes_from_kernel = 0; - iface->mcc_adapterpriv.mcc_tx_bytes_to_port = 0; + + mccadapriv = &iface->mcc_adapterpriv; + if (mccadapriv->role == MCC_ROLE_MAX) + continue; + + mccadapriv->mcc_tx_bytes_from_kernel = 0; + mccadapriv->mcc_last_tx_bytes_from_kernel = 0; + mccadapriv->mcc_tx_bytes_to_port = 0; #ifdef CONFIG_TDLS if (MLME_IS_STA(iface)) { if (rtw_is_tdls_enabled(iface)) { - iface->mcc_adapterpriv.backup_tdls_en = _TRUE; + mccadapriv->backup_tdls_en = _TRUE; rtw_disable_tdls_func(iface, _TRUE); RTW_INFO("%s: Enable MCC, Disable TDLS\n", __func__); } } #endif /* CONFIG_TDLS */ } - - hal = GET_HAL_DATA(padapter); - p_dm_odm = &hal->odmpriv; - p_rf = &(p_dm_odm->rf_table); - mccobjpriv->backup_phydm_ability = p_rf->rf_supportability; - p_rf->rf_supportability = p_rf->rf_supportability & (~HAL_RF_TX_PWR_TRACK) & (~HAL_RF_IQK); + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_START, NULL); + #endif } /* @@ -2193,6 +2513,9 @@ static void rtw_hal_mcc_sw_ch_fw_notify_hdl(PADAPTER padapter) for (i = 0; i < iface_num; i++) { iface = pdvobjpriv->padapters[i]; + if (iface == NULL) + continue; + if (cur_op_ch == iface->mlmeextpriv.cur_channel) { cur_iface = iface; cur_mccadapriv = &cur_iface->mcc_adapterpriv; @@ -2288,6 +2611,9 @@ static void rtw_hal_mcc_update_noa_start_time_hdl(PADAPTER padapter, u8 buflen, continue; pmccadapriv = &iface->mcc_adapterpriv; + if (pmccadapriv->role == MCC_ROLE_MAX) + continue; + /* GO & channel match */ if (pmccadapriv->role == MCC_ROLE_GO) { /* convert GO TBTT from FW to noa_start_time(TU convert to mircosecond) */ @@ -2313,29 +2639,143 @@ static void rtw_hal_mcc_update_noa_start_time_hdl(PADAPTER padapter, u8 buflen, } -static void rtw_hal_mcc_rpt_tsf_hdl(PADAPTER padapter, u8 buflen, u8 *tmpBuf) +static u8 mcc_get_reg_hdl(PADAPTER adapter, const u8 *val) { - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); - struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); - struct submit_ctx *mcc_tsf_req_sctx = &pmccobjpriv->mcc_tsf_req_sctx; - struct mcc_adapter_priv *pmccadapriv = NULL; - u8 iface_num = pdvobjpriv->iface_nums; - static u8 order = 0; + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); + struct hal_com_data *hal = GET_HAL_DATA(adapter); + _adapter *cur_iface = NULL; + u8 ret = _SUCCESS; + u8 cur_order = 0; - pmccadapriv = &pmccobjpriv->iface[order]->mcc_adapterpriv; - pmccadapriv->tsf = RTW_GET_LE64(tmpBuf + 2); + u16 dbg_reg[DBG_MCC_REG_NUM] = {0x4d4,0x522,0xc50,0xe50}; + u16 dbg_rf_reg[DBG_MCC_RF_REG_NUM] = {0x18}; + u8 i; + u32 reg_val; + u8 path = 0, path_nums = 0; - - if (0) { - RTW_INFO("TSF(order:%d):%llu\n", pmccadapriv->order, pmccadapriv->tsf); + if (!rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) { + ret = _FAIL; + goto exit; } - if (pmccadapriv->order == (iface_num - 1)) { - rtw_sctx_done(&mcc_tsf_req_sctx); - order = 0; - } else - order ++; + if (!val) + cur_order = 0xff; + else + cur_order = *val; + + if (cur_order >= MAX_MCC_NUM && cur_order != 0xff) { + RTW_ERR("%s: cur_order=%d\n", __func__, cur_order); + ret = _FAIL; + goto exit; + } + + path_nums = hal->NumTotalRFPath; + if (cur_order == 0xff) + cur_iface = adapter; + else + cur_iface = mccobjpriv->iface[cur_order]; + + if (!cur_iface) { + RTW_ERR("%s: cur_iface = NULL, cur_order=%d\n", __func__, cur_order); + ret = _FAIL; + goto exit; + } + + _enter_critical_mutex(&mccobjpriv->mcc_dbg_reg_mutex, NULL); + if (!RTW_CANNOT_IO(adapter)) { + /* RTW_INFO("=================================\n"); + RTW_INFO(ADPT_FMT": cur_order:%d\n", ADPT_ARG(cur_iface), cur_order); */ + for (i = 0; i < ARRAY_SIZE(dbg_reg); i++) { + reg_val = rtw_read32(adapter, dbg_reg[i]); + mccobjpriv->dbg_reg[i] = dbg_reg[i]; + mccobjpriv->dbg_reg_val[i] = reg_val; + /* RTW_PRINT("REG_%X:0x%08x\n", dbg_reg[i], reg_val); */ + } + for (i = 0; i < ARRAY_SIZE(dbg_rf_reg); i++) { + for (path = 0; path < path_nums; path++) { + reg_val = rtw_hal_read_rfreg(adapter, path, dbg_rf_reg[i], 0xffffffff); + /* RTW_PRINT("RF_PATH_%d_REG_%X:0x%08x\n", + path, dbg_rf_reg[i], reg_val); */ + mccobjpriv->dbg_rf_reg[i] = dbg_rf_reg[i]; + mccobjpriv->dbg_rf_reg_val[i][path] = reg_val; + } + } + } + _exit_critical_mutex(&mccobjpriv->mcc_dbg_reg_mutex, NULL); + +exit: + return ret; +} + +static u8 mcc_get_reg_cmd(_adapter *adapter, u8 cur_order) +{ + struct cmd_obj *cmdobj; + struct drvextra_cmd_parm *pdrvextra_cmd_parm; + struct cmd_priv *pcmdpriv = &adapter->cmdpriv; + u8 *mcc_cur_order = NULL; + u8 res = _SUCCESS; + + + cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); + if (cmdobj == NULL) { + res = _FAIL; + goto exit; + } + + pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); + if (pdrvextra_cmd_parm == NULL) { + rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); + res = _FAIL; + goto exit; + } + + mcc_cur_order = rtw_zmalloc(sizeof(u8)); + if (mcc_cur_order == NULL) { + rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); + rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); + res = _FAIL; + goto exit; + } + + pdrvextra_cmd_parm->ec_id = MCC_CMD_WK_CID; + pdrvextra_cmd_parm->type = MCC_GET_DBG_REG_WK_CID; + pdrvextra_cmd_parm->size = 1; + pdrvextra_cmd_parm->pbuf = mcc_cur_order; + + _rtw_memcpy(mcc_cur_order, &cur_order, 1); + + init_h2fwcmd_w_parm_no_rsp(cmdobj, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); + res = rtw_enqueue_cmd(pcmdpriv, cmdobj); + +exit: + return res; +} + +static void rtw_hal_mcc_rpt_tsf_hdl(PADAPTER padapter, u8 buflen, u8 *tmpBuf) +{ + struct dvobj_priv *dvobjpriv = adapter_to_dvobj(padapter); + struct mcc_obj_priv *mccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); + struct submit_ctx *mcc_tsf_req_sctx = &mccobjpriv->mcc_tsf_req_sctx; + struct mcc_adapter_priv *mccadapriv = NULL; + _adapter *iface = NULL; + u8 order = 0; + + order = mccobjpriv->mcc_tsf_req_sctx_order; + iface = mccobjpriv->iface[order]; + mccadapriv = &iface->mcc_adapterpriv; + mccadapriv->tsf = RTW_GET_LE64(tmpBuf + 2); + + + if (0) + RTW_INFO(FUNC_ADPT_FMT" TSF(order:%d):0x%02llx\n", FUNC_ADPT_ARG(iface), mccadapriv->order, mccadapriv->tsf); + + if (mccadapriv->order == (MAX_MCC_NUM - 1)) + rtw_sctx_done(&mcc_tsf_req_sctx); + else + mccobjpriv->mcc_tsf_req_sctx_order ++; + } /** @@ -2358,6 +2798,7 @@ void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf) return; } + _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL); pmccobjpriv->mcc_c2h_status = tmpBuf[0]; pmccobjpriv->current_order = tmpBuf[1]; cur_adapter = pmccobjpriv->iface[pmccobjpriv->current_order]; @@ -2367,6 +2808,7 @@ void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf) rtw_set_oper_ch(cur_adapter, cur_ch); rtw_set_oper_bw(cur_adapter, cur_bw); rtw_set_oper_choffset(cur_adapter, cur_ch_offset); + _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL); if (0) RTW_INFO("%d,order:%d,TSF:0x%llx\n", tmpBuf[0], tmpBuf[1], RTW_GET_LE64(tmpBuf + 2)); @@ -2376,6 +2818,7 @@ void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf) _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL); pmccobjpriv->cur_mcc_success_cnt++; rtw_hal_mcc_upadate_chnl_bw(cur_adapter, cur_ch, cur_ch_offset, cur_bw, _FALSE); + mcc_get_reg_cmd(padapter, pmccobjpriv->current_order); _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL); break; case MCC_RPT_TXNULL_FAIL: @@ -2397,7 +2840,7 @@ void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf) pmccobjpriv->mcc_tolerance_time = MCC_TOLERANCE_TIME; _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL); - RTW_INFO("[MCC] MCC ready (time:%d)\n", pmccobjpriv->mcc_launch_time); + RTW_INFO("[MCC] MCC ready\n"); rtw_sctx_done(&mcc_sctx); break; case MCC_RPT_SWICH_CHANNEL_NOTIFY: @@ -2420,13 +2863,12 @@ void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf) void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); - struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); + struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); u8 cmd[H2C_MCC_TIME_SETTING_LEN] = {0}; u8 swchannel_early_time = MCC_SWCH_FW_EARLY_TIME; + u8 ap_num = DEV_AP_NUM(dvobj); - rtw_mi_status(padapter, &mcc_mstate); - - if (MSTATE_AP_NUM(&mcc_mstate) == 0) { + if (ap_num == 0) { u8 need_update = _FALSE; u8 start_time_offset = 0, interval = 0, duration = 0; @@ -2435,9 +2877,9 @@ void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update) if (need_update == _FALSE) return; - start_time_offset = pmccobjpriv->start_time; - interval = pmccobjpriv->interval; - duration = pmccobjpriv->iface[0]->mcc_adapterpriv.mcc_duration; + start_time_offset = mccobjpriv->start_time; + interval = mccobjpriv->interval; + duration = mccobjpriv->iface[0]->mcc_adapterpriv.mcc_duration; SET_H2CCMD_MCC_TIME_SETTING_START_TIME(cmd, start_time_offset); SET_H2CCMD_MCC_TIME_SETTING_INTERVAL(cmd, interval); @@ -2445,7 +2887,9 @@ void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update) SET_H2CCMD_MCC_TIME_SETTING_UPDATE(cmd, _TRUE); SET_H2CCMD_MCC_TIME_SETTING_ORDER0_DURATION(cmd, duration); } else { - u8 policy_idx = pmccobjpriv->policy_index; + PADAPTER order0_iface = NULL; + PADAPTER order1_iface = NULL; + u8 policy_idx = mccobjpriv->policy_index; u8 duration = mcc_switch_channel_policy_table[policy_idx][MCC_DURATION_IDX]; u8 tsf_sync_offset = mcc_switch_channel_policy_table[policy_idx][MCC_TSF_SYNC_OFFSET_IDX]; u8 start_time_offset = mcc_switch_channel_policy_table[policy_idx][MCC_START_TIME_OFFSET_IDX]; @@ -2454,12 +2898,20 @@ void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update) u8 guard_offset1 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET1_IDX]; u8 order0_duration = 0; u8 i = 0; + enum _hw_port tsf_bsae_port = MAX_HW_PORT; + enum _hw_port tsf_sync_port = MAX_HW_PORT; RTW_INFO("%s: policy_idx=%d\n", __func__, policy_idx); + order0_iface = mccobjpriv->iface[0]; + order1_iface = mccobjpriv->iface[1]; + /* GO/AP is order 0, GC/STA is order 1 */ - order0_duration = pmccobjpriv->iface[0]->mcc_adapterpriv.mcc_duration = interval - duration; - pmccobjpriv->iface[1]->mcc_adapterpriv.mcc_duration = duration; + order0_duration = order0_iface->mcc_adapterpriv.mcc_duration = interval - duration; + order0_iface->mcc_adapterpriv.mcc_duration = duration; + + tsf_bsae_port = rtw_hal_get_port(order1_iface); + tsf_sync_port = rtw_hal_get_port(order0_iface); /* update IE */ for (i = 0; i < dvobj->iface_nums; i++) { @@ -2471,7 +2923,7 @@ void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update) continue; mccadapriv = &iface->mcc_adapterpriv; - if (mccadapriv == NULL) + if (mccadapriv->role == MCC_ROLE_MAX) continue; if (mccadapriv->role == MCC_ROLE_GO) @@ -2490,8 +2942,8 @@ void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update) /* Early time to inform driver by C2H before switch channel */ SET_H2CCMD_MCC_TIME_SETTING_EARLY_SWITCH_RPT(cmd, swchannel_early_time); /* Port0 sync from Port1, not support multi-port */ - SET_H2CCMD_MCC_TIME_SETTING_ORDER_BASE(cmd, HW_PORT1); - SET_H2CCMD_MCC_TIME_SETTING_ORDER_SYNC(cmd, HW_PORT0); + SET_H2CCMD_MCC_TIME_SETTING_ORDER_BASE(cmd, tsf_bsae_port); + SET_H2CCMD_MCC_TIME_SETTING_ORDER_SYNC(cmd, tsf_sync_port); SET_H2CCMD_MCC_TIME_SETTING_UPDATE(cmd, _TRUE); SET_H2CCMD_MCC_TIME_SETTING_ORDER0_DURATION(cmd, order0_duration); } @@ -2508,20 +2960,20 @@ void rtw_hal_mcc_sw_status_check(PADAPTER padapter) struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); + struct mcc_adapter_priv *mccadapriv = NULL; _adapter *iface = NULL; u8 cur_cnt = 0, prev_cnt = 0, diff_cnt = 0, check_ret = _FAIL, threshold = 0; u8 policy_idx = pmccobjpriv->policy_index; u8 noa_enable = _FALSE; u8 i = 0; _irqL irqL; + u8 ap_num = DEV_AP_NUM(dvobj); /* #define MCC_RESTART 1 */ if (!MCC_EN(padapter)) return; - rtw_mi_status(padapter, &mcc_mstate); - _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) { @@ -2529,13 +2981,20 @@ void rtw_hal_mcc_sw_status_check(PADAPTER padapter) /* check noa enable or not */ for (i = 0; i < dvobj->iface_nums; i++) { iface = dvobj->padapters[i]; + if (iface == NULL) + continue; + + mccadapriv = &iface->mcc_adapterpriv; + if (mccadapriv->role == MCC_ROLE_MAX) + continue; + if (iface->wdinfo.p2p_ps_mode == P2P_PS_NOA) { noa_enable = _TRUE; break; } } - if (!noa_enable && MSTATE_AP_NUM(&mcc_mstate) == 0) + if (!noa_enable && ap_num == 0) rtw_hal_mcc_update_parameter(padapter, _FALSE); threshold = pmccobjpriv->mcc_stop_threshold; @@ -2601,10 +3060,11 @@ void rtw_hal_mcc_sw_status_check(PADAPTER padapter) */ u8 rtw_hal_mcc_change_scan_flag(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset) { - u8 need_ch_setting_union = _TRUE, i = 0, flags = 0, role = 0; + u8 need_ch_setting_union = _TRUE, i = 0, flags = 0, back_op = _FALSE; struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); - struct mcc_adapter_priv *pmccadapriv = NULL; - struct mlme_ext_priv *pmlmeext = NULL; + struct mcc_adapter_priv *mccadapriv = NULL; + struct mlme_ext_priv *mlmeext = NULL; + _adapter *iface = NULL; if (!MCC_EN(padapter)) goto exit; @@ -2612,47 +3072,45 @@ u8 rtw_hal_mcc_change_scan_flag(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset) if (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) goto exit; + /* disable PS_ANNC & TX_RESUME for all interface */ + /* ToDo: TX_RESUME by interface in SCAN_BACKING_OP */ + mlmeext = &padapter->mlmeextpriv; + + flags = mlmeext_scan_backop_flags(mlmeext); + if (mlmeext_chk_scan_backop_flags(mlmeext, SS_BACKOP_PS_ANNC)) + flags &= ~SS_BACKOP_PS_ANNC; + + if (mlmeext_chk_scan_backop_flags(mlmeext, SS_BACKOP_TX_RESUME)) + flags &= ~SS_BACKOP_TX_RESUME; + + mlmeext_assign_scan_backop_flags(mlmeext, flags); + for (i = 0; i < dvobj->iface_nums; i++) { - if (!dvobj->padapters[i]) - continue; + iface = dvobj->padapters[i]; + if (!iface) + continue; - pmlmeext = &dvobj->padapters[i]->mlmeextpriv; - pmccadapriv = &dvobj->padapters[i]->mcc_adapterpriv; - role = pmccadapriv->role; + mlmeext = &iface->mlmeextpriv; - switch (role) { - case MCC_ROLE_AP: - case MCC_ROLE_GO: - *ch = pmlmeext->cur_channel; - *bw = pmlmeext->cur_bwmode; - *offset = pmlmeext->cur_ch_offset; - need_ch_setting_union = _FALSE; - break; - case MCC_ROLE_STA: - case MCC_ROLE_GC: - if (dvobj->padapters[i] != padapter) { - *ch = pmlmeext->cur_channel; - *bw = pmlmeext->cur_bwmode; - *offset = pmlmeext->cur_ch_offset; - need_ch_setting_union = _FALSE; - } - break; - default: - RTW_INFO("unknown role\n"); - rtw_warn_on(1); - break; + if (MLME_IS_GO(iface) || MLME_IS_AP(iface)) + back_op = _TRUE; + else if (MLME_IS_GC(iface) && (iface != padapter)) + /* switch to another linked interface(GO) to receive beacon to avoid no beacon disconnect */ + back_op = _TRUE; + else if (MLME_IS_STA(iface) && MLME_IS_ASOC(iface) && (iface != padapter)) + /* switch to another linked interface(STA) to receive beacon to avoid no beacon disconnect */ + back_op = _TRUE; + else { + /* bypass non-linked/non-linking interface/scan interface */ + continue; + } + + if (back_op) { + *ch = mlmeext->cur_channel; + *bw = mlmeext->cur_bwmode; + *offset = mlmeext->cur_ch_offset; + need_ch_setting_union = _FALSE; } - - /* check other scan flag */ - flags = mlmeext_scan_backop_flags(pmlmeext); - if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_PS_ANNC)) - flags &= ~SS_BACKOP_PS_ANNC; - - if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_TX_RESUME)) - flags &= ~SS_BACKOP_TX_RESUME; - - mlmeext_assign_scan_backop_flags(pmlmeext, flags); - } exit: return need_ch_setting_union; @@ -2725,6 +3183,7 @@ inline u8 rtw_hal_mcc_stop_tx_bytes_to_port(PADAPTER padapter) static void rtw_hal_mcc_assign_scan_flag(PADAPTER padapter, u8 scan_done) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + struct mcc_adapter_priv *mccadapriv = NULL; _adapter *iface = NULL; struct mlme_ext_priv *pmlmeext = NULL; u8 i = 0, flags; @@ -2734,6 +3193,13 @@ static void rtw_hal_mcc_assign_scan_flag(PADAPTER padapter, u8 scan_done) for (i = 0; i < dvobj->iface_nums; i++) { iface = dvobj->padapters[i]; + if (iface == NULL) + continue; + + mccadapriv = &iface->mcc_adapterpriv; + if (mccadapriv->role == MCC_ROLE_MAX) + continue; + pmlmeext = &iface->mlmeextpriv; if (is_client_associated_to_ap(iface)) { flags = mlmeext_scan_backop_flags_sta(pmlmeext); @@ -2951,56 +3417,100 @@ static void rtw_hal_mcc_dump_noa_content(void *sel, PADAPTER padapter) RTW_PRINT_SEL(sel, "End to dump NoA Content\n"); } +static void mcc_dump_dbg_reg(void *sel, _adapter *adapter) +{ + struct mcc_obj_priv *mccobjpriv = adapter_to_mccobjpriv(adapter); + HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter); + u8 i,j; + _irqL irqL; + + _enter_critical_bh(&mccobjpriv->mcc_lock, &irqL); + RTW_PRINT_SEL(sel, "current order=%d\n", mccobjpriv->current_order); + _exit_critical_bh(&mccobjpriv->mcc_lock, &irqL); + + _enter_critical_mutex(&mccobjpriv->mcc_dbg_reg_mutex, NULL); + for (i = 0; i < ARRAY_SIZE(mccobjpriv->dbg_reg); i++) + RTW_PRINT_SEL(sel, "REG_0x%X:0x%08x\n", mccobjpriv->dbg_reg[i], mccobjpriv->dbg_reg_val[i]); + + for (i = 0; i < ARRAY_SIZE(mccobjpriv->dbg_rf_reg); i++) { + for (j = 0; j < hal->NumTotalRFPath; j++) + RTW_PRINT_SEL(sel, "RF_PATH_%d_REG_0x%X:0x%08x\n", + j, mccobjpriv->dbg_rf_reg[i], mccobjpriv->dbg_rf_reg_val[i][j]); + } + _exit_critical_mutex(&mccobjpriv->mcc_dbg_reg_mutex, NULL); +} + + void rtw_hal_dump_mcc_info(void *sel, struct dvobj_priv *dvobj) { - struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); - struct mcc_adapter_priv *pmccadapriv = NULL; - _adapter *iface = NULL, *adapter = NULL; + struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); + struct mcc_adapter_priv *mccadapriv = NULL; + _adapter *iface = NULL, *pri_adapter = NULL; struct registry_priv *regpriv = NULL; - u8 i = 0; + HAL_DATA_TYPE *hal = NULL; + u8 i = 0, j = 0; + u64 tsf[MAX_MCC_NUM] = {0}; /* regpriv is common for all adapter */ - adapter = dvobj_get_primary_adapter(dvobj); + pri_adapter = dvobj_get_primary_adapter(dvobj); + hal = GET_HAL_DATA(pri_adapter); RTW_PRINT_SEL(sel, "**********************************************\n"); - RTW_PRINT_SEL(sel, "en_mcc:%d\n", MCC_EN(adapter)); + RTW_PRINT_SEL(sel, "en_mcc:%d\n", MCC_EN(pri_adapter)); RTW_PRINT_SEL(sel, "primary adapter("ADPT_FMT") duration:%d%c\n", - ADPT_ARG(dvobj_get_primary_adapter(dvobj)), pmccobjpriv->duration, 37); - RTW_PRINT_SEL(sel, "runtime duration:%s\n", pmccobjpriv->enable_runtime_duration ? "enable":"disable"); - for (i = 0; i < dvobj->iface_nums; i++) { - iface = dvobj->padapters[i]; - if (!iface) - continue; + ADPT_ARG(dvobj_get_primary_adapter(dvobj)), mccobjpriv->duration, 37); + RTW_PRINT_SEL(sel, "runtime duration:%s\n", mccobjpriv->enable_runtime_duration ? "enable":"disable"); + RTW_PRINT_SEL(sel, "phydm offload:%s\n", mccobjpriv->mcc_phydm_offload ? "enable":"disable"); - regpriv = &iface->registrypriv; - pmccadapriv = &iface->mcc_adapterpriv; - if (pmccadapriv) { - u8 p2p_ps_mode = iface->wdinfo.p2p_ps_mode; + if (rtw_hal_check_mcc_status(pri_adapter, MCC_STATUS_DOING_MCC)) { + rtw_hal_mcc_rqt_tsf(pri_adapter, tsf); - RTW_PRINT_SEL(sel, "adapter mcc info:\n"); - RTW_PRINT_SEL(sel, "ifname:%s\n", ADPT_ARG(iface)); - RTW_PRINT_SEL(sel, "order:%d\n", pmccadapriv->order); - RTW_PRINT_SEL(sel, "duration:%d\n", pmccadapriv->mcc_duration); - RTW_PRINT_SEL(sel, "target tx bytes:%d\n", pmccadapriv->mcc_target_tx_bytes_to_port); - RTW_PRINT_SEL(sel, "current TP:%d\n", pmccadapriv->mcc_tp); - RTW_PRINT_SEL(sel, "mgmt queue macid:%d\n", pmccadapriv->mgmt_queue_macid); - RTW_PRINT_SEL(sel, "macid bitmap:0x%02x\n", pmccadapriv->mcc_macid_bitmap); - RTW_PRINT_SEL(sel, "P2P NoA:%s\n\n", p2p_ps_mode == P2P_PS_NOA ? "enable":"disable"); - RTW_PRINT_SEL(sel, "registry data:\n"); - RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", regpriv->rtw_mcc_ap_bw20_target_tx_tp); - RTW_PRINT_SEL(sel, "ap target tx TP(BW:40M):%d Mbps\n", regpriv->rtw_mcc_ap_bw40_target_tx_tp); - RTW_PRINT_SEL(sel, "ap target tx TP(BW:80M):%d Mbps\n", regpriv->rtw_mcc_ap_bw80_target_tx_tp); - RTW_PRINT_SEL(sel, "sta target tx TP(BW:20M):%d Mbps\n", regpriv->rtw_mcc_sta_bw20_target_tx_tp); - RTW_PRINT_SEL(sel, "sta target tx TP(BW:40M ):%d Mbps\n", regpriv->rtw_mcc_sta_bw40_target_tx_tp); - RTW_PRINT_SEL(sel, "sta target tx TP(BW:80M):%d Mbps\n", regpriv->rtw_mcc_sta_bw80_target_tx_tp); - RTW_PRINT_SEL(sel, "single tx criteria:%d Mbps\n", regpriv->rtw_mcc_single_tx_cri); - if (MLME_IS_GO(iface)) - rtw_hal_mcc_dump_noa_content(sel, iface); - RTW_PRINT_SEL(sel, "**********************************************\n"); + for (i = 0; i < MAX_MCC_NUM; i++) { + iface = mccobjpriv->iface[i]; + if (!iface) + continue; + + regpriv = &iface->registrypriv; + mccadapriv = &iface->mcc_adapterpriv; + + if (mccadapriv) { + u8 p2p_ps_mode = iface->wdinfo.p2p_ps_mode; + + RTW_PRINT_SEL(sel, "adapter mcc info:\n"); + RTW_PRINT_SEL(sel, "ifname:%s\n", ADPT_ARG(iface)); + RTW_PRINT_SEL(sel, "order:%d\n", mccadapriv->order); + RTW_PRINT_SEL(sel, "duration:%d\n", mccadapriv->mcc_duration); + RTW_PRINT_SEL(sel, "target tx bytes:%d\n", mccadapriv->mcc_target_tx_bytes_to_port); + RTW_PRINT_SEL(sel, "current TP:%d\n", mccadapriv->mcc_tp); + RTW_PRINT_SEL(sel, "mgmt queue macid:%d\n", mccadapriv->mgmt_queue_macid); + RTW_PRINT_SEL(sel, "macid bitmap:0x%02x\n", mccadapriv->mcc_macid_bitmap); + RTW_PRINT_SEL(sel, "P2P NoA:%s\n\n", p2p_ps_mode == P2P_PS_NOA ? "enable":"disable"); + RTW_PRINT_SEL(sel, "registry data:\n"); + RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", regpriv->rtw_mcc_ap_bw20_target_tx_tp); + RTW_PRINT_SEL(sel, "ap target tx TP(BW:40M):%d Mbps\n", regpriv->rtw_mcc_ap_bw40_target_tx_tp); + RTW_PRINT_SEL(sel, "ap target tx TP(BW:80M):%d Mbps\n", regpriv->rtw_mcc_ap_bw80_target_tx_tp); + RTW_PRINT_SEL(sel, "sta target tx TP(BW:20M):%d Mbps\n", regpriv->rtw_mcc_sta_bw20_target_tx_tp); + RTW_PRINT_SEL(sel, "sta target tx TP(BW:40M ):%d Mbps\n", regpriv->rtw_mcc_sta_bw40_target_tx_tp); + RTW_PRINT_SEL(sel, "sta target tx TP(BW:80M):%d Mbps\n", regpriv->rtw_mcc_sta_bw80_target_tx_tp); + RTW_PRINT_SEL(sel, "single tx criteria:%d Mbps\n", regpriv->rtw_mcc_single_tx_cri); + RTW_PRINT_SEL(sel, "HW TSF=0x%llx\n", tsf[mccadapriv->order]); + if (MLME_IS_GO(iface)) + rtw_hal_mcc_dump_noa_content(sel, iface); + RTW_PRINT_SEL(sel, "**********************************************\n"); + } } + + mcc_dump_dbg_reg(sel, pri_adapter); } + + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + RTW_PRINT_SEL(sel, "@@@@@@@@@@@@@@@@@@@@\n"); + rtw_hal_mcc_cfg_phydm(pri_adapter, MCC_CFG_PHYDM_DUMP, sel); + RTW_PRINT_SEL(sel, "@@@@@@@@@@@@@@@@@@@@\n"); + #endif + RTW_PRINT_SEL(sel, "------------------------------------------\n"); - RTW_PRINT_SEL(sel, "policy index:%d\n", pmccobjpriv->policy_index); + RTW_PRINT_SEL(sel, "policy index:%d\n", mccobjpriv->policy_index); RTW_PRINT_SEL(sel, "------------------------------------------\n"); RTW_PRINT_SEL(sel, "define data:\n"); RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", MCC_AP_BW20_TARGET_TX_TP); @@ -3153,11 +3663,17 @@ void rtw_hal_mcc_update_macid_bitmap(PADAPTER padapter, int mac_id, u8 add) , ADPT_ARG(padapter), add ? "add" : "clear" , mac_id, pmccadapriv->mcc_macid_bitmap); - if (add) + if (add) { + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_ADD_CLIENT, &mac_id); + #endif pmccadapriv->mcc_macid_bitmap |= BIT(mac_id); - else + } else { + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_REMOVE_CLIENT, &mac_id); + #endif pmccadapriv->mcc_macid_bitmap &= ~(BIT(mac_id)); - + } rtw_hal_set_mcc_macid_cmd(padapter); } @@ -3199,17 +3715,19 @@ void rtw_hal_mcc_parameter_init(PADAPTER padapter) SET_MCC_EN_FLAG(padapter, padapter->registrypriv.en_mcc); SET_MCC_DURATION(padapter, padapter->registrypriv.rtw_mcc_duration); SET_MCC_RUNTIME_DURATION(padapter, padapter->registrypriv.rtw_mcc_enable_runtime_duration); + SET_MCC_PHYDM_OFFLOAD(padapter, padapter->registrypriv.rtw_mcc_phydm_offload); } } -u8 rtw_set_mcc_duration_hdl(PADAPTER adapter, u8 type, const u8 *val) +static u8 set_mcc_duration_hdl(PADAPTER adapter, const u8 *val) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); _adapter *iface = NULL; u8 duration = 50; u8 ret = _SUCCESS, noa_enable = _FALSE, i = 0; + enum mcc_duration_setting type; if (!mccobjpriv->enable_runtime_duration) goto exit; @@ -3225,10 +3743,11 @@ u8 rtw_set_mcc_duration_hdl(PADAPTER adapter, u8 type, const u8 *val) } #endif /* CONFIG_P2P_PS */ - + type = val[0]; + duration = val[1]; if (type == MCC_DURATION_MAPPING) { - switch (*val) { + switch (duration) { /* 0 = fair scheduling */ case 0: mccobjpriv->duration= 40; @@ -3239,18 +3758,18 @@ u8 rtw_set_mcc_duration_hdl(PADAPTER adapter, u8 type, const u8 *val) case 1: mccobjpriv->duration= 70; mccobjpriv->policy_index = 1; - mccobjpriv->mchan_sched_mode = MCC_FAVOE_STA; + mccobjpriv->mchan_sched_mode = MCC_FAVOR_STA; break; /* 2 = favor P2P*/ case 2: default: mccobjpriv->duration= 30; mccobjpriv->policy_index = 0; - mccobjpriv->mchan_sched_mode = MCC_FAVOE_P2P; + mccobjpriv->mchan_sched_mode = MCC_FAVOR_P2P; break; } } else { - mccobjpriv->duration = *val; + mccobjpriv->duration = duration; rtw_hal_mcc_update_policy_table(adapter); } @@ -3270,34 +3789,39 @@ u8 rtw_set_mcc_duration_cmd(_adapter *adapter, u8 type, u8 val) struct cmd_obj *cmdobj; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &adapter->cmdpriv; - u8 *mcc_duration = NULL; - u8 res = _FAIL; + u8 *buf = NULL; + u8 sz = 2; + u8 res = _SUCCESS; cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); - if (cmdobj == NULL) + if (cmdobj == NULL) { + res = _FAIL; goto exit; + } pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if (pdrvextra_cmd_parm == NULL) { rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); + res = _FAIL; goto exit; } - mcc_duration = rtw_zmalloc(sizeof(u8)); - if (mcc_duration == NULL) { + buf = rtw_zmalloc(sizeof(u8) * sz); + if (buf == NULL) { rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); res = _FAIL; goto exit; } - pdrvextra_cmd_parm->ec_id = MCC_SET_DURATION_WK_CID; - pdrvextra_cmd_parm->type = type; - pdrvextra_cmd_parm->size = 1; - pdrvextra_cmd_parm->pbuf = mcc_duration; + pdrvextra_cmd_parm->ec_id = MCC_CMD_WK_CID; + pdrvextra_cmd_parm->type = MCC_SET_DURATION_WK_CID; + pdrvextra_cmd_parm->size = sz; + pdrvextra_cmd_parm->pbuf = buf; - _rtw_memcpy(mcc_duration, &val, 1); + _rtw_memcpy(buf, &type, 1); + _rtw_memcpy(buf + 1, &val, 1); init_h2fwcmd_w_parm_no_rsp(cmdobj, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, cmdobj); @@ -3306,4 +3830,101 @@ exit: return res; } +#ifdef CONFIG_MCC_PHYDM_OFFLOAD +static u8 mcc_phydm_offload_enable_hdl(_adapter *adapter, const u8 *val) +{ + struct mcc_obj_priv *mccobjpriv = adapter_to_mccobjpriv(adapter); + u8 ret = _SUCCESS; + u8 enable = *val; + + /*only modify driver parameter during non-mcc status */ + if (!rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) { + mccobjpriv->mcc_phydm_offload = enable; + } else { + /*modify both driver & phydm parameter during mcc status */ + mccobjpriv->mcc_phydm_offload = enable; + rtw_hal_mcc_cfg_phydm(adapter, MCC_CFG_PHYDM_OFFLOAD, &mccobjpriv->mcc_phydm_offload); + } + + RTW_INFO("[MCC] phydm offload enable hdl(%d)\n", mccobjpriv->mcc_phydm_offload); + + return ret; +} + +u8 rtw_set_mcc_phydm_offload_enable_cmd(_adapter *adapter, u8 enable, u8 enqueue) +{ + u8 res = _SUCCESS; + + if (enqueue) { + struct cmd_obj *cmdobj; + struct drvextra_cmd_parm *pdrvextra_cmd_parm; + struct cmd_priv *pcmdpriv = &adapter->cmdpriv; + u8 *mcc_phydm_offload_enable = NULL; + + + cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); + if (cmdobj == NULL) { + res = _FAIL; + goto exit; + } + + pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); + if (pdrvextra_cmd_parm == NULL) { + rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); + res = _FAIL; + goto exit; + } + + mcc_phydm_offload_enable = rtw_zmalloc(sizeof(u8)); + if (mcc_phydm_offload_enable == NULL) { + rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); + rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); + res = _FAIL; + goto exit; + } + + pdrvextra_cmd_parm->ec_id = MCC_CMD_WK_CID; + pdrvextra_cmd_parm->type = MCC_SET_PHYDM_OFFLOAD_WK_CID; + pdrvextra_cmd_parm->size = 1; + pdrvextra_cmd_parm->pbuf = mcc_phydm_offload_enable; + + _rtw_memcpy(mcc_phydm_offload_enable, &enable, 1); + init_h2fwcmd_w_parm_no_rsp(cmdobj, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); + res = rtw_enqueue_cmd(pcmdpriv, cmdobj); + } else { + mcc_phydm_offload_enable_hdl(adapter, &enable); + } + +exit: + return res; +} +#endif + +u8 rtw_mcc_cmd_hdl(_adapter *adapter, u8 type, const u8 *val) +{ + struct mcc_obj_priv *mccobjpriv = adapter_to_mccobjpriv(adapter); + u8 ret = _SUCCESS; + + switch (type) { + case MCC_SET_DURATION_WK_CID: + set_mcc_duration_hdl(adapter, val); + break; + case MCC_GET_DBG_REG_WK_CID: + mcc_get_reg_hdl(adapter, val); + break; + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + case MCC_SET_PHYDM_OFFLOAD_WK_CID: + mcc_phydm_offload_enable_hdl(adapter, val); + break; + #endif + default: + RTW_ERR("[MCC] rtw_mcc_cmd_hdl fail(%d)\n", type); + break; + } + + + + return ret; +} + #endif /* CONFIG_MCC_MODE */ diff --git a/hal/hal_mp.c b/hal/hal_mp.c index 8616dcb..c6399bb 100644 --- a/hal/hal_mp.c +++ b/hal/hal_mp.c @@ -42,9 +42,18 @@ #ifdef CONFIG_RTL8723D #include #endif + #ifdef CONFIG_RTL8710B + #include + #endif #ifdef CONFIG_RTL8188F #include #endif + #ifdef CONFIG_RTL8188GTV + #include + #endif + #ifdef CONFIG_RTL8192F + #include + #endif #endif /* !RTW_HALMAC */ @@ -72,14 +81,14 @@ void hal_mpt_SwitchRfSetting(PADAPTER pAdapter) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); u8 ChannelToSw = pMptCtx->MptChannelToSw; - ULONG ulRateIdx = pMptCtx->mpt_rate_index; - ULONG ulbandwidth = pMptCtx->MptBandWidth; + u32 ulRateIdx = pMptCtx->mpt_rate_index; + u32 ulbandwidth = pMptCtx->MptBandWidth; /* <20120525, Kordan> Dynamic mechanism for APK, asked by Dennis.*/ if (IS_HARDWARE_TYPE_8188ES(pAdapter) && (1 <= ChannelToSw && ChannelToSw <= 11) && (ulRateIdx == MPT_RATE_MCS0 || ulRateIdx == MPT_RATE_1M || ulRateIdx == MPT_RATE_6M)) { - pMptCtx->backup0x52_RF_A = (u1Byte)phy_query_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); - pMptCtx->backup0x52_RF_B = (u1Byte)phy_query_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); + pMptCtx->backup0x52_RF_A = (u8)phy_query_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); + pMptCtx->backup0x52_RF_B = (u8)phy_query_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); if ((PlatformEFIORead4Byte(pAdapter, 0xF4) & BIT29) == BIT29) { phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xB); @@ -140,12 +149,13 @@ void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) u8 i; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); - u1Byte u1Channel = pHalData->current_channel; - ULONG ulRateIdx = pMptCtx->mpt_rate_index; - u1Byte DataRate = 0xFF; + u8 u1Channel = pHalData->current_channel; + u32 ulRateIdx = pMptCtx->mpt_rate_index; + u8 DataRate = 0xFF; /* Do not modify CCK TX filter parameters for 8822B*/ - if(IS_HARDWARE_TYPE_8822B(Adapter) || IS_HARDWARE_TYPE_8821C(Adapter) || IS_HARDWARE_TYPE_8723D(Adapter)) + if(IS_HARDWARE_TYPE_8822B(Adapter) || IS_HARDWARE_TYPE_8821C(Adapter) || + IS_HARDWARE_TYPE_8723D(Adapter) || IS_HARDWARE_TYPE_8192F(Adapter) || IS_HARDWARE_TYPE_8822C(Adapter)) return; DataRate = mpt_to_mgnt_rate(ulRateIdx); @@ -183,7 +193,7 @@ void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) pHalData->RegForRecover[i].value); } } - } else if (IS_HARDWARE_TYPE_8188F(Adapter)) { + } else if (IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8188GTV(Adapter)) { /* get current cck swing value and check 0xa22 & 0xa23 later to match the table.*/ CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord); CCKSwingIndex = 20; /* default index */ @@ -320,15 +330,15 @@ void hal_mpt_SetChannel(PADAPTER pAdapter) pHalData->bSwChnl = _TRUE; pHalData->bSetChnlBW = _TRUE; - if (bandwidth > 0) { - if ((channel >= 3 && channel <= 11) || (channel >= 42 && channel <= 171)) - rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, pmp->prime_channel_offset); - else - rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0); - } else - rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0); + if (bandwidth == 2) { + rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_LOWER, HAL_PRIME_CHNL_OFFSET_UPPER); + } else if (bandwidth == 1) { + rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_UPPER, 0); + } else + rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, 0); hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14); + rtw_btcoex_wifionly_scan_notify(pAdapter); } @@ -347,23 +357,24 @@ void hal_mpt_SetBandwidth(PADAPTER pAdapter) pHalData->bSwChnl = _TRUE; pHalData->bSetChnlBW = _TRUE; - if (bandwidth > 0) { - if ((channel >= 3 && channel <= 11) || (channel >= 42 && channel <= 171)) - rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, pmp->prime_channel_offset); - else - rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0); - } else - rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0); + if (bandwidth == 2) { + rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_LOWER, HAL_PRIME_CHNL_OFFSET_UPPER); + } else if (bandwidth == 1) { + rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_UPPER, 0); + } else + rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, 0); hal_mpt_SwitchRfSetting(pAdapter); + rtw_btcoex_wifionly_scan_notify(pAdapter); + } void mpt_SetTxPower_Old(PADAPTER pAdapter, MPT_TXPWR_DEF Rate, u8 *pTxPower) { switch (Rate) { case MPT_CCK: { - u4Byte TxAGC = 0, pwr = 0; - u1Byte rf; + u32 TxAGC = 0, pwr = 0; + u8 rf; pwr = pTxPower[RF_PATH_A]; if (pwr < 0x3f) { @@ -381,8 +392,8 @@ void mpt_SetTxPower_Old(PADAPTER pAdapter, MPT_TXPWR_DEF Rate, u8 *pTxPower) break; case MPT_OFDM_AND_HT: { - u4Byte TxAGC = 0; - u1Byte pwr = 0, rf; + u32 TxAGC = 0; + u8 pwr = 0, rf; pwr = pTxPower[0]; if (pwr < 0x3f) { @@ -420,22 +431,23 @@ void mpt_SetTxPower( PADAPTER pAdapter, MPT_TXPWR_DEF Rate, - pu1Byte pTxPower + u8 *pTxPower ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u1Byte path = 0 , i = 0, MaxRate = MGN_6M; - u1Byte StartPath = RF_PATH_A, EndPath = RF_PATH_B; + u8 path = 0 , i = 0, MaxRate = MGN_6M; + u8 StartPath = RF_PATH_A, EndPath = RF_PATH_B; if (IS_HARDWARE_TYPE_8814A(pAdapter)) EndPath = RF_PATH_D; - else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8723D(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter)) + else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter) + || IS_HARDWARE_TYPE_8723D(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter)) EndPath = RF_PATH_A; switch (Rate) { case MPT_CCK: { - u1Byte rate[] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}; + u8 rate[] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}; for (path = StartPath; path <= EndPath; path++) for (i = 0; i < sizeof(rate); ++i) @@ -443,7 +455,7 @@ mpt_SetTxPower( } break; case MPT_OFDM: { - u1Byte rate[] = { + u8 rate[] = { MGN_6M, MGN_9M, MGN_12M, MGN_18M, MGN_24M, MGN_36M, MGN_48M, MGN_54M, }; @@ -454,7 +466,7 @@ mpt_SetTxPower( } break; case MPT_HT: { - u1Byte rate[] = { + u8 rate[] = { MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7, MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, @@ -479,7 +491,7 @@ mpt_SetTxPower( } break; case MPT_VHT: { - u1Byte rate[] = { + u8 rate[] = { MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3, MGN_VHT1SS_MCS4, MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7, MGN_VHT1SS_MCS8, MGN_VHT1SS_MCS9, MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1, MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, @@ -522,7 +534,9 @@ void hal_mpt_SetTxPower(PADAPTER pAdapter) IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8192E(pAdapter) || IS_HARDWARE_TYPE_8703B(pAdapter) || - IS_HARDWARE_TYPE_8188F(pAdapter)) { + IS_HARDWARE_TYPE_8188F(pAdapter) || + IS_HARDWARE_TYPE_8188GTV(pAdapter) + ) { u8 path = (pHalData->antenna_tx_path == ANTENNA_A) ? (RF_PATH_A) : (RF_PATH_B); RTW_INFO("===> MPT_ProSetTxPower: Old\n"); @@ -531,13 +545,17 @@ void hal_mpt_SetTxPower(PADAPTER pAdapter) mpt_SetTxPower_Old(pAdapter, MPT_OFDM_AND_HT, pMptCtx->TxPwrLevel); } else { - RTW_INFO("===> MPT_ProSetTxPower: Jaguar/Jaguar2\n"); + mpt_SetTxPower(pAdapter, MPT_CCK, pMptCtx->TxPwrLevel); mpt_SetTxPower(pAdapter, MPT_OFDM, pMptCtx->TxPwrLevel); mpt_SetTxPower(pAdapter, MPT_HT, pMptCtx->TxPwrLevel); - mpt_SetTxPower(pAdapter, MPT_VHT, pMptCtx->TxPwrLevel); - + if(IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { + RTW_INFO("===> MPT_ProSetTxPower: Jaguar/Jaguar2\n"); + mpt_SetTxPower(pAdapter, MPT_VHT, pMptCtx->TxPwrLevel); + } } + + rtw_hal_set_txpwr_done(pAdapter); } else RTW_INFO("RFChipID < RF_CHIP_MAX, the RF chip is not supported - %d\n", pHalData->rf_chip); @@ -556,7 +574,7 @@ void hal_mpt_SetDataRate(PADAPTER pAdapter) hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14); #ifdef CONFIG_RTL8723B - if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) { + if (IS_HARDWARE_TYPE_8723B(pAdapter)) { if (IS_CCK_RATE(DataRate)) { if (pMptCtx->mpt_rf_path == RF_PATH_A) phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, 0xF, 0x6); @@ -583,12 +601,12 @@ void hal_mpt_SetDataRate(PADAPTER pAdapter) #define RF_PATH_AB 22 #ifdef CONFIG_RTL8814A -VOID mpt_ToggleIG_8814A(PADAPTER pAdapter) +void mpt_ToggleIG_8814A(PADAPTER pAdapter) { - u1Byte Path = 0; - u4Byte IGReg = rA_IGI_Jaguar, IGvalue = 0; + u8 Path; + u32 IGReg = rA_IGI_Jaguar, IGvalue = 0; - for (Path; Path <= RF_PATH_D; Path++) { + for (Path = 0; Path <= RF_PATH_D; Path++) { switch (Path) { case RF_PATH_B: IGReg = rB_IGI_Jaguar; @@ -610,7 +628,7 @@ VOID mpt_ToggleIG_8814A(PADAPTER pAdapter) } } -VOID mpt_SetRFPath_8814A(PADAPTER pAdapter) +void mpt_SetRFPath_8814A(PADAPTER pAdapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -618,7 +636,6 @@ VOID mpt_SetRFPath_8814A(PADAPTER pAdapter) R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ R_ANTENNA_SELECT_CCK *p_cck_txrx; u8 ForcedDataRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); - u8 HtStbcCap = pAdapter->registrypriv.stbc_cap; /*/PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo);*/ /*/PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pMgntInfo);*/ @@ -843,17 +860,17 @@ VOID mpt_SetRFPath_8814A(PADAPTER pAdapter) mpt_ToggleIG_8814A(pAdapter); } #endif /* CONFIG_RTL8814A */ -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) -VOID +#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) +void mpt_SetSingleTone_8814A( - IN PADAPTER pAdapter, - IN BOOLEAN bSingleTone, - IN BOOLEAN bEnPMacTx) + PADAPTER pAdapter, + BOOLEAN bSingleTone, + BOOLEAN bEnPMacTx) { PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - u1Byte StartPath = RF_PATH_A, EndPath = RF_PATH_A; - static u4Byte regIG0 = 0, regIG1 = 0, regIG2 = 0, regIG3 = 0; + u8 StartPath = RF_PATH_A, EndPath = RF_PATH_A, path; + static u32 regIG0 = 0, regIG1 = 0, regIG2 = 0, regIG3 = 0; if (bSingleTone) { regIG0 = phy_query_bb_reg(pAdapter, rA_TxScale_Jaguar, bMaskDWord); /*/ 0xC1C[31:21]*/ @@ -895,11 +912,11 @@ mpt_SetSingleTone_8814A( phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); /*/ Disable CCA*/ - for (StartPath; StartPath <= EndPath; StartPath++) { - phy_set_rf_reg(pAdapter, StartPath, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ - phy_set_rf_reg(pAdapter, StartPath, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ + for (path = StartPath; path <= EndPath; path++) { + phy_set_rf_reg(pAdapter, path, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ + phy_set_rf_reg(pAdapter, path, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ - phy_set_rf_reg(pAdapter, StartPath, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ + phy_set_rf_reg(pAdapter, path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ } phy_set_bb_reg(pAdapter, rA_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xC1C[31:21]*/ @@ -933,8 +950,8 @@ mpt_SetSingleTone_8814A( EndPath = RF_PATH_D; break; } - for (StartPath; StartPath <= EndPath; StartPath++) - phy_set_rf_reg(pAdapter, StartPath, lna_low_gain_3, BIT1, 0x0); /* RF LO disabled */ + for (path = StartPath; path <= EndPath; path++) + phy_set_rf_reg(pAdapter, path, lna_low_gain_3, BIT1, 0x0); /* RF LO disabled */ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); /* Enable CCA*/ @@ -1094,8 +1111,8 @@ void mpt_SetRFPath_8723B(PADAPTER pAdapter) phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ for (i = 0; i < 3; ++i) { - u4Byte offset = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_A][i][0]; - u4Byte data = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_A][i][1]; + u32 offset = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_A][i][0]; + u32 data = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_A][i][1]; if (offset != 0) { phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); @@ -1103,8 +1120,8 @@ void mpt_SetRFPath_8723B(PADAPTER pAdapter) } } for (i = 0; i < 2; ++i) { - u4Byte offset = pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_A][i][0]; - u4Byte data = pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_A][i][1]; + u32 offset = pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_A][i][0]; + u32 data = pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_A][i][1]; if (offset != 0) { phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); @@ -1114,8 +1131,8 @@ void mpt_SetRFPath_8723B(PADAPTER pAdapter) } break; case ANTENNA_B: { /*/ Actually path S0 (BT)*/ - u4Byte offset; - u4Byte data; + u32 offset; + u32 data; pMptCtx->mpt_rf_path = RF_PATH_B; phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x5); @@ -1152,7 +1169,7 @@ void mpt_SetRFPath_8723B(PADAPTER pAdapter) void mpt_SetRFPath_8703B(PADAPTER pAdapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u4Byte ulAntennaTx, ulAntennaRx; + u32 ulAntennaTx, ulAntennaRx; PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); struct dm_struct *pDM_Odm = &pHalData->odmpriv; struct dm_rf_calibration_struct *pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info); @@ -1166,7 +1183,7 @@ void mpt_SetRFPath_8703B(PADAPTER pAdapter) } switch (pAdapter->mppriv.antenna_tx) { - u1Byte p = 0, i = 0; + u8 p = 0, i = 0; case ANTENNA_A: { /* Actually path S1 (Wi-Fi) */ pMptCtx->mpt_rf_path = RF_PATH_A; @@ -1174,8 +1191,8 @@ void mpt_SetRFPath_8703B(PADAPTER pAdapter) phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ for (i = 0; i < 3; ++i) { - u4Byte offset = pRFCalibrateInfo->tx_iqc_8703b[i][0]; - u4Byte data = pRFCalibrateInfo->tx_iqc_8703b[i][1]; + u32 offset = pRFCalibrateInfo->tx_iqc_8703b[i][0]; + u32 data = pRFCalibrateInfo->tx_iqc_8703b[i][1]; if (offset != 0) { phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); @@ -1184,8 +1201,8 @@ void mpt_SetRFPath_8703B(PADAPTER pAdapter) } for (i = 0; i < 2; ++i) { - u4Byte offset = pRFCalibrateInfo->rx_iqc_8703b[i][0]; - u4Byte data = pRFCalibrateInfo->rx_iqc_8703b[i][1]; + u32 offset = pRFCalibrateInfo->rx_iqc_8703b[i][0]; + u32 data = pRFCalibrateInfo->rx_iqc_8703b[i][1]; if (offset != 0) { phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); @@ -1200,8 +1217,8 @@ void mpt_SetRFPath_8703B(PADAPTER pAdapter) phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x1); /* AGC Table Sel */ for (i = 0; i < 3; ++i) { - u4Byte offset = pRFCalibrateInfo->tx_iqc_8703b[i][0]; - u4Byte data = pRFCalibrateInfo->tx_iqc_8703b[i][1]; + u32 offset = pRFCalibrateInfo->tx_iqc_8703b[i][0]; + u32 data = pRFCalibrateInfo->tx_iqc_8703b[i][1]; if (pRFCalibrateInfo->tx_iqc_8703b[i][0] != 0) { phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); @@ -1209,8 +1226,8 @@ void mpt_SetRFPath_8703B(PADAPTER pAdapter) } } for (i = 0; i < 2; ++i) { - u4Byte offset = pRFCalibrateInfo->rx_iqc_8703b[i][0]; - u4Byte data = pRFCalibrateInfo->rx_iqc_8703b[i][1]; + u32 offset = pRFCalibrateInfo->rx_iqc_8703b[i][0]; + u32 data = pRFCalibrateInfo->rx_iqc_8703b[i][1]; if (pRFCalibrateInfo->rx_iqc_8703b[i][0] != 0) { phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); @@ -1231,8 +1248,8 @@ void mpt_SetRFPath_8703B(PADAPTER pAdapter) void mpt_SetRFPath_8723D(PADAPTER pAdapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u1Byte p = 0, i = 0; - u4Byte ulAntennaTx, ulAntennaRx, offset = 0, data = 0, val32 = 0; + u8 p = 0, i = 0; + u32 ulAntennaTx, ulAntennaRx, offset = 0, data = 0, val32 = 0; PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); struct dm_struct *pDM_Odm = &pHalData->odmpriv; struct dm_rf_calibration_struct *pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info); @@ -1266,16 +1283,16 @@ void mpt_SetRFPath_8723D(PADAPTER pAdapter) } #endif -VOID mpt_SetRFPath_819X(PADAPTER pAdapter) +void mpt_SetRFPath_819X(PADAPTER pAdapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - u4Byte ulAntennaTx, ulAntennaRx; + u32 ulAntennaTx, ulAntennaRx; R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ R_ANTENNA_SELECT_CCK *p_cck_txrx; - u1Byte r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; - u1Byte chgTx = 0, chgRx = 0; - u4Byte r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; + u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; + u8 chgTx = 0, chgRx = 0; + u32 r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; ulAntennaTx = pHalData->antenna_tx_path; ulAntennaRx = pHalData->AntennaRxPath; @@ -1425,11 +1442,76 @@ VOID mpt_SetRFPath_819X(PADAPTER pAdapter) } } /* MPT_ProSetRFPath */ +#ifdef CONFIG_RTL8192F + +void mpt_set_rfpath_8192f(PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); + + u16 ForcedDataRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); + u8 NssforRate, odmNssforRate; + u32 ulAntennaTx, ulAntennaRx; + u8 RxAntToPhyDm; + u8 TxAntToPhyDm; + + ulAntennaTx = pHalData->antenna_tx_path; + ulAntennaRx = pHalData->AntennaRxPath; + NssforRate = MgntQuery_NssTxRate(ForcedDataRate); + + if (pHalData->rf_chip >= RF_TYPE_MAX) + RTW_INFO("This RF chip ID is not supported\n"); + + switch (ulAntennaTx) { + case ANTENNA_A: + pMptCtx->mpt_rf_path = RF_PATH_A; + TxAntToPhyDm = BB_PATH_A; + break; + case ANTENNA_B: + pMptCtx->mpt_rf_path = RF_PATH_B; + TxAntToPhyDm = BB_PATH_B; + break; + case ANTENNA_AB: + pMptCtx->mpt_rf_path = RF_PATH_AB; + TxAntToPhyDm = (BB_PATH_A|BB_PATH_B); + break; + default: + pMptCtx->mpt_rf_path = RF_PATH_AB; + TxAntToPhyDm = (BB_PATH_A|BB_PATH_B); + break; + } + + switch (ulAntennaRx) { + case ANTENNA_A: + RxAntToPhyDm = BB_PATH_A; + break; + case ANTENNA_B: + RxAntToPhyDm = BB_PATH_B; + break; + case ANTENNA_AB: + RxAntToPhyDm = (BB_PATH_A|BB_PATH_B); + break; + default: + RxAntToPhyDm = (BB_PATH_A|BB_PATH_B); + break; + } + + config_phydm_trx_mode_8192f(GET_PDM_ODM(pAdapter), TxAntToPhyDm, RxAntToPhyDm, FALSE); + +} + +#endif void hal_mpt_SetAntenna(PADAPTER pAdapter) { RTW_INFO("Do %s\n", __func__); +#ifdef CONFIG_RTL8822C + if (IS_HARDWARE_TYPE_8822C(pAdapter)) { + rtl8822c_mp_config_rfpath(pAdapter); + return; + } +#endif #ifdef CONFIG_RTL8814A if (IS_HARDWARE_TYPE_8814A(pAdapter)) { mpt_SetRFPath_8814A(pAdapter); @@ -1474,6 +1556,14 @@ void hal_mpt_SetAntenna(PADAPTER pAdapter) return; } #endif + +#ifdef CONFIG_RTL8192F + if (IS_HARDWARE_TYPE_8192F(pAdapter)) { + mpt_set_rfpath_8192f(pAdapter); + return; + } +#endif + /* else if (IS_HARDWARE_TYPE_8821B(pAdapter)) mpt_SetRFPath_8821B(pAdapter); Prepare for 8822B @@ -1512,20 +1602,33 @@ s32 hal_mpt_SetThermalMeter(PADAPTER pAdapter, u8 target_ther) void hal_mpt_TriggerRFThermalMeter(PADAPTER pAdapter) { - phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT17 | BIT16, 0x03); + if (IS_HARDWARE_TYPE_JAGUAR3(pAdapter)) { + phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT19, 0x1); + phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT19, 0x0); + phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT19, 0x1); + } else + phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT17 | BIT16, 0x03); } -u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter) +u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter, u8 rf_path) { struct dm_struct *p_dm_odm = adapter_to_phydm(pAdapter); + u32 ThermalValue = 0; s32 thermal_value_temp = 0; s8 thermal_offset = 0; + u32 thermal_reg_mask = 0; + + if (IS_8822C_SERIES(GET_HAL_DATA(pAdapter)->version_id)) + thermal_reg_mask = 0x007e; /*0x42: RF Reg[6:1], 35332(themal K & bias k & power trim) & 35325(tssi )*/ + else + thermal_reg_mask = 0xfc00; /*0x42: RF Reg[15:10]*/ + + ThermalValue = (u8)phy_query_rf_reg(pAdapter, rf_path, 0x42, thermal_reg_mask); - ThermalValue = (u1Byte)phy_query_rf_reg(pAdapter, RF_PATH_A, 0x42, 0xfc00); /*0x42: RF Reg[15:10]*/ thermal_offset = phydm_get_thermal_offset(p_dm_odm); thermal_value_temp = ThermalValue + thermal_offset; @@ -1541,7 +1644,7 @@ u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter) } -void hal_mpt_GetThermalMeter(PADAPTER pAdapter, u8 *value) +void hal_mpt_GetThermalMeter(PADAPTER pAdapter, u8 rfpath, u8 *value) { #if 0 fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER); @@ -1551,7 +1654,7 @@ void hal_mpt_GetThermalMeter(PADAPTER pAdapter, u8 *value) #else hal_mpt_TriggerRFThermalMeter(pAdapter); rtw_msleep_os(1000); - *value = hal_mpt_ReadRFThermalMeter(pAdapter); + *value = hal_mpt_ReadRFThermalMeter(pAdapter, rfpath); #endif } @@ -1577,7 +1680,7 @@ void hal_mpt_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) /*/ 4. Turn On Continue Tx and turn off the other test modes.*/ #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) - if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) + if (IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) phy_set_bb_reg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18 | BIT17 | BIT16, OFDM_SingleCarrier); else #endif /* CONFIG_RTL8812A || CONFIG_RTL8821A || CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */ @@ -1588,7 +1691,7 @@ void hal_mpt_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) /*/ Stop Single Carrier.*/ /*/ Turn off all test modes.*/ #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) - if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) + if (IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) phy_set_bb_reg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); else #endif /* CONFIG_RTL8812A || CONFIG_RTL8821A || CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */ @@ -1607,10 +1710,17 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); struct dm_struct *pDM_Odm = &pHalData->odmpriv; - u4Byte ulAntennaTx = pHalData->antenna_tx_path; - static u4Byte regRF = 0, regBB0 = 0, regBB1 = 0, regBB2 = 0, regBB3 = 0; + u32 ulAntennaTx = pHalData->antenna_tx_path; + static u32 regRF = 0, regBB0 = 0, regBB1 = 0, regBB2 = 0, regBB3 = 0; u8 rfPath; + if (IS_HARDWARE_TYPE_JAGUAR3(pAdapter)) { +#ifdef PHYDM_MP_SUPPORT + phydm_mp_set_single_tone(pDM_Odm, bStart, pMptCtx->mpt_rf_path); +#endif + return; + } + switch (ulAntennaTx) { case ANTENNA_B: rfPath = RF_PATH_B; @@ -1641,6 +1751,18 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) phy_set_mac_reg(pAdapter, 0x88C, 0xF00000, 0xF); phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO disabled*/ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ + } else if (IS_HARDWARE_TYPE_8192F(pAdapter)) { /* USB need to do RF LO disable first, PCIE isn't required to follow this order.*/ + #ifdef CONFIG_RTL8192F + phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT23, 0x1); + phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT26, 0x1); + phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT7, 0x1); + phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT1, 0x1); + phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT0, 0x1); + phy_set_mac_reg(pAdapter, REG_AFE_CTRL_4_8192F, BIT16, 0x1); + phy_set_bb_reg(pAdapter, 0x88C, 0xF00000, 0xF); + phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x57, BIT1, 0x1); /* RF LO disabled*/ + phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); /* Tx mode*/ +#endif } else if (IS_HARDWARE_TYPE_8723B(pAdapter)) { if (pMptCtx->mpt_rf_path == RF_PATH_A) { phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ @@ -1655,7 +1777,7 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /* Tx mode */ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, 0xF000, 0x1); /* RF LO enabled */ } - } else if (IS_HARDWARE_TYPE_8188F(pAdapter)) { + } else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)) { /*Set BB REG 88C: Prevent SingleTone Fail*/ phy_set_bb_reg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xF); phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); @@ -1673,7 +1795,7 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) } } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8822B(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter)) { #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) - u1Byte p = RF_PATH_A; + u8 p = RF_PATH_A; regRF = phy_query_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, bRFRegOffsetMask); regBB0 = phy_query_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord); @@ -1709,11 +1831,11 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) } else if (IS_HARDWARE_TYPE_8821C(pAdapter)) { phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xF0F0, 0x707); /* 0xCB0[[15:12, 7:4] = 0x707*/ - if (pHalData->external_pa_5g) + if (pHalData->external_pa_5g) { phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xA00000, 0x1); /* 0xCB4[23, 21] = 0x1*/ } - else if (pHalData->ExternalPA_2G) + else if (pHalData->ExternalPA_2G) { phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xA00000, 0x1); /* 0xCB4[23, 21] = 0x1*/ } @@ -1752,6 +1874,18 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x0);/*/ RF LO disabled */ /*/ RESTORE MAC REG 88C: Enable RF Functions*/ phy_set_mac_reg(pAdapter, 0x88C, 0xF00000, 0x0); + } else if (IS_HARDWARE_TYPE_8192F(pAdapter)){ +#ifdef CONFIG_RTL8192F + phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT23, 0x0); + phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT26, 0x0); + phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT7, 0x0); + phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT1, 0x0); + phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT0, 0x0); + phy_set_mac_reg(pAdapter, REG_AFE_CTRL_4_8192F, BIT16, 0x0); + phy_set_bb_reg(pAdapter, 0x88C, 0xF00000, 0x0); + phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x57, BIT1, 0x0); /* RF LO disabled*/ + phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3); /* Rx mode*/ +#endif } else if (IS_HARDWARE_TYPE_8723B(pAdapter)) { if (pMptCtx->mpt_rf_path == RF_PATH_A) { phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/ @@ -1766,7 +1900,7 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /* Rx mode */ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, 0xF000, 0x0); /* RF LO disabled */ } - } else if (IS_HARDWARE_TYPE_8188F(pAdapter)) { + } else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)) { phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3); /*Tx mode*/ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x0); /*RF LO disabled*/ /*Set BB REG 88C: Prevent SingleTone Fail*/ @@ -1783,7 +1917,7 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) } } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8822B(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter)) { #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) - u1Byte p = RF_PATH_A; + u8 p = RF_PATH_A; phy_set_bb_reg(pAdapter, rOFDMCCKEN_Jaguar, BIT29 | BIT28, 0x3); /*/ Disable CCK and OFDM*/ @@ -1829,10 +1963,19 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) void hal_mpt_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_struct *pdm_odm = &pHalData->odmpriv; u8 Rate; pAdapter->mppriv.mpt_ctx.is_carrier_suppression = bStart; + if (IS_HARDWARE_TYPE_JAGUAR3(pAdapter)) { +#ifdef PHYDM_MP_SUPPORT + phydm_mp_set_carrier_supp(pdm_odm, bStart, pAdapter->mppriv.rateidx); +#endif + return; + } + Rate = HwRateToMPTRate(pAdapter->mppriv.rateidx); if (bStart) {/* Start Carrier Suppression.*/ if (Rate <= MPT_RATE_11M) { @@ -1841,7 +1984,7 @@ void hal_mpt_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/*set CCK block on*/ /*/Turn Off All Test Mode*/ - if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) + if (IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); /* rSingleTone_ContTx_Jaguar*/ else phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_ALL_OFF); @@ -1878,12 +2021,26 @@ u32 hal_mpt_query_phytxok(PADAPTER pAdapter) { PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); RT_PMAC_TX_INFO PMacTxInfo = pMptCtx->PMacTxInfo; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u16 count = 0; +#ifdef PHYDM_MP_SUPPORT + struct dm_struct *dm = (struct dm_struct *)&pHalData->odmpriv; + struct phydm_mp *mp = &dm->dm_mp_table; + + if (IS_HARDWARE_TYPE_JAGUAR3(pAdapter)) { + phydm_mp_get_tx_ok(&pHalData->odmpriv, pAdapter->mppriv.rateidx); + count = mp->tx_phy_ok_cnt; + + } else +#endif + { + if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) count = phy_query_bb_reg(pAdapter, 0xF50, bMaskLWord); /* [15:0]*/ else count = phy_query_bb_reg(pAdapter, 0xF50, bMaskHWord); /* [31:16]*/ + } if (count > 50000) { rtw_reset_phy_trx_ok_counters(pAdapter); @@ -1895,13 +2052,13 @@ u32 hal_mpt_query_phytxok(PADAPTER pAdapter) } -static VOID mpt_StopCckContTx( +static void mpt_StopCckContTx( PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - u1Byte u1bReg; + u8 u1bReg; pMptCtx->bCckContTx = FALSE; pMptCtx->bOfdmContTx = FALSE; @@ -1909,7 +2066,7 @@ static VOID mpt_StopCckContTx( phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*normal mode*/ phy_set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ - if (!IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) { + if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 2b00*/ phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ @@ -1922,32 +2079,41 @@ static VOID mpt_StopCckContTx( phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); + if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); + } + + if (IS_HARDWARE_TYPE_8188E(pAdapter) || IS_HARDWARE_TYPE_8723B(pAdapter) || + IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter) || + IS_HARDWARE_TYPE_8723D(pAdapter) || IS_HARDWARE_TYPE_8192F(pAdapter) || + IS_HARDWARE_TYPE_8821C(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)) { + phy_set_bb_reg(pAdapter, 0xA70, BIT(14), bDisable);/* patch Count CCK adjust Rate*/ + } } /* mpt_StopCckContTx */ -static VOID mpt_StopOfdmContTx( +static void mpt_StopOfdmContTx( PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - u1Byte u1bReg; - u4Byte data; + u8 u1bReg; + u32 data; pMptCtx->bCckContTx = FALSE; pMptCtx->bOfdmContTx = FALSE; - if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) + if (IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); else phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_ALL_OFF); rtw_mdelay_os(10); - if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) { + if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)){ phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 0*/ phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ } @@ -1956,25 +2122,27 @@ static VOID mpt_StopOfdmContTx( phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); + if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); + } } /* mpt_StopOfdmContTx */ -static VOID mpt_StartCckContTx( +static void mpt_StartCckContTx( PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - u4Byte cckrate; + u32 cckrate; /* 1. if CCK block on */ if (!phy_query_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn)) phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn, 1);/*set CCK block on*/ /*Turn Off All Test Mode*/ - if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) + if (IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); else phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_ALL_OFF); @@ -1986,7 +2154,7 @@ static VOID mpt_StartCckContTx( phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*transmit mode*/ phy_set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ - if (!IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) { + if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 11 force cck rxiq = 0*/ phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1 force ofdm rxiq = ofdm txiq*/ phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 1); @@ -1994,8 +2162,20 @@ static VOID mpt_StartCckContTx( phy_set_bb_reg(pAdapter, 0x0B34, BIT14, 1); } - phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); - phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); + if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { + phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); + phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); + } + + if (IS_HARDWARE_TYPE_8188E(pAdapter) || IS_HARDWARE_TYPE_8723B(pAdapter) || + IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter) || + IS_HARDWARE_TYPE_8723D(pAdapter) || IS_HARDWARE_TYPE_8192F(pAdapter) || + IS_HARDWARE_TYPE_8821C(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)) { + if (pAdapter->mppriv.rateidx == MPT_RATE_1M) /* patch Count CCK adjust Rate*/ + phy_set_bb_reg(pAdapter, 0xA70, BIT(14), bDisable); + else + phy_set_bb_reg(pAdapter, 0xA70, BIT(14), bEnable); + } pMptCtx->bCckContTx = TRUE; pMptCtx->bOfdmContTx = FALSE; @@ -2003,7 +2183,7 @@ static VOID mpt_StartCckContTx( } /* mpt_StartCckContTx */ -static VOID mpt_StartOfdmContTx( +static void mpt_StartOfdmContTx( PADAPTER pAdapter ) { @@ -2020,33 +2200,67 @@ static VOID mpt_StartOfdmContTx( /* 3. turn on scramble setting*/ phy_set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, 1); - if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) { + if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 2b'11*/ phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1*/ } /* 4. Turn On Continue Tx and turn off the other test modes.*/ - if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) + if (IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ContinuousTx); else phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_ContinuousTx); + if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); + } pMptCtx->bCckContTx = FALSE; pMptCtx->bOfdmContTx = TRUE; } /* mpt_StartOfdmContTx */ +#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8821B) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) +#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT +static void mpt_convert_phydm_txinfo_for_jaguar3( + RT_PMAC_TX_INFO pMacTxInfo, struct phydm_pmac_info *phydmtxinfo) +{ + phydmtxinfo->en_pmac_tx = pMacTxInfo.bEnPMacTx; + phydmtxinfo->mode = pMacTxInfo.Mode; + phydmtxinfo->tx_rate = MRateToHwRate(mpt_to_mgnt_rate(pMacTxInfo.TX_RATE)); + phydmtxinfo->tx_sc = pMacTxInfo.TX_SC; + phydmtxinfo->is_short_preamble = pMacTxInfo.bSPreamble; + phydmtxinfo->ndp_sound = pMacTxInfo.NDP_sound; + phydmtxinfo->bw = pMacTxInfo.BandWidth; + phydmtxinfo->m_stbc = pMacTxInfo.m_STBC; + phydmtxinfo->packet_period = pMacTxInfo.PacketPeriod; + phydmtxinfo->packet_count = pMacTxInfo.PacketCount; + phydmtxinfo->packet_pattern = pMacTxInfo.PacketPattern; + phydmtxinfo->sfd = pMacTxInfo.SFD; + phydmtxinfo->signal_field = pMacTxInfo.SignalField; + phydmtxinfo->service_field = pMacTxInfo.ServiceField; + phydmtxinfo->length = pMacTxInfo.LENGTH; + _rtw_memcpy(&phydmtxinfo->crc16,pMacTxInfo.CRC16, 2); + _rtw_memcpy(&phydmtxinfo->lsig , pMacTxInfo.LSIG,3); + _rtw_memcpy(&phydmtxinfo->ht_sig , pMacTxInfo.HT_SIG,6); + _rtw_memcpy(&phydmtxinfo->vht_sig_a , pMacTxInfo.VHT_SIG_A,6); + _rtw_memcpy(&phydmtxinfo->vht_sig_b , pMacTxInfo.VHT_SIG_B,4); + phydmtxinfo->vht_sig_b_crc = pMacTxInfo.VHT_SIG_B_CRC; + _rtw_memcpy(&phydmtxinfo->vht_delimiter,pMacTxInfo.VHT_Delimiter,4); +} +#endif -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8821B) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) /* for HW TX mode */ void mpt_ProSetPMacTx(PADAPTER Adapter) { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); struct mp_priv *pmppriv = &Adapter->mppriv; RT_PMAC_TX_INFO PMacTxInfo = pMptCtx->PMacTxInfo; u32 u4bTmp; + struct dm_struct *p_dm_odm; + + p_dm_odm = &pHalData->odmpriv; #if 0 PRINT_DATA("LSIG ", PMacTxInfo.LSIG, 3); @@ -2056,55 +2270,71 @@ void mpt_ProSetPMacTx(PADAPTER Adapter) dbg_print("VHT_SIG_B_CRC %x\n", PMacTxInfo.VHT_SIG_B_CRC); PRINT_DATA("VHT_Delimiter", PMacTxInfo.VHT_Delimiter, 4); - PRINT_DATA("Src Address", Adapter->mac_addr, 6); - PRINT_DATA("Dest Address", PMacTxInfo.MacAddress, 6); + PRINT_DATA("Src Address", Adapter->mac_addr, ETH_ALEN); + PRINT_DATA("Dest Address", PMacTxInfo.MacAddress, ETH_ALEN); #endif - if (Adapter->mppriv.pktInterval != 0) - PMacTxInfo.PacketPeriod = Adapter->mppriv.pktInterval; + if (pmppriv->pktInterval != 0) + PMacTxInfo.PacketPeriod = pmppriv->pktInterval; + + if (pmppriv->tx.count != 0) + PMacTxInfo.PacketCount = pmppriv->tx.count; RTW_INFO("SGI %d bSPreamble %d bSTBC %d bLDPC %d NDP_sound %d\n", PMacTxInfo.bSGI, PMacTxInfo.bSPreamble, PMacTxInfo.bSTBC, PMacTxInfo.bLDPC, PMacTxInfo.NDP_sound); RTW_INFO("TXSC %d BandWidth %d PacketPeriod %d PacketCount %d PacketLength %d PacketPattern %d\n", PMacTxInfo.TX_SC, PMacTxInfo.BandWidth, PMacTxInfo.PacketPeriod, PMacTxInfo.PacketCount, PMacTxInfo.PacketLength, PMacTxInfo.PacketPattern); + if (IS_HARDWARE_TYPE_JAGUAR3(Adapter)) { +#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT + struct phydm_pmac_info phydm_mactxinfo; + + mpt_convert_phydm_txinfo_for_jaguar3(PMacTxInfo, &phydm_mactxinfo); + phydm_set_pmac_tx(p_dm_odm, &phydm_mactxinfo, pMptCtx->mpt_rf_path); +#endif + return; + } + if (PMacTxInfo.bEnPMacTx == FALSE) { - pmppriv->mode = MP_ON; - if (PMacTxInfo.Mode == CONTINUOUS_TX) { + if (pMptCtx->HWTxmode == CONTINUOUS_TX) { phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ - if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) + if (IS_MPT_CCK_RATE(pMptCtx->mpt_rate_index)) mpt_StopCckContTx(Adapter); else mpt_StopOfdmContTx(Adapter); - } else if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { + } else if (IS_MPT_CCK_RATE(pMptCtx->mpt_rate_index)) { u4bTmp = phy_query_bb_reg(Adapter, 0xf50, bMaskLWord); phy_set_bb_reg(Adapter, 0xb1c, bMaskLWord, u4bTmp + 50); phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /*TX Stop*/ } else phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ - if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) { + if (pMptCtx->HWTxmode == OFDM_Single_Tone_TX) { /* Stop HW TX -> Stop Continuous TX -> Stop RF Setting*/ - if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) + if (IS_MPT_CCK_RATE(pMptCtx->mpt_rate_index)) mpt_StopCckContTx(Adapter); else mpt_StopOfdmContTx(Adapter); mpt_SetSingleTone_8814A(Adapter, FALSE, TRUE); } - + pMptCtx->HWTxmode = TEST_NONE; return; } + pMptCtx->mpt_rate_index = PMacTxInfo.TX_RATE; + if (PMacTxInfo.Mode == CONTINUOUS_TX) { - pmppriv->mode = MP_CONTINUOUS_TX; + pMptCtx->HWTxmode = CONTINUOUS_TX; PMacTxInfo.PacketCount = 1; + hal_mpt_SetTxPower(Adapter); + if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) mpt_StartCckContTx(Adapter); else mpt_StartOfdmContTx(Adapter); } else if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) { - pmppriv->mode = MP_SINGLE_TONE_TX; /* Continuous TX -> HW TX -> RF Setting */ + pMptCtx->HWTxmode = OFDM_Single_Tone_TX; PMacTxInfo.PacketCount = 1; if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) @@ -2112,7 +2342,7 @@ void mpt_ProSetPMacTx(PADAPTER Adapter) else mpt_StartOfdmContTx(Adapter); } else if (PMacTxInfo.Mode == PACKETS_TX) { - pmppriv->mode = MP_PACKET_TX; + pMptCtx->HWTxmode = PACKETS_TX; if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE) && PMacTxInfo.PacketCount == 0) PMacTxInfo.PacketCount = 0xffff; } @@ -2220,7 +2450,7 @@ void mpt_ProSetPMacTx(PADAPTER Adapter) phy_set_bb_reg(Adapter, 0xb4c, 0x1ff, u4bTmp); if (IS_HARDWARE_TYPE_JAGUAR2(Adapter)) { - u4Byte offset = 0xb44; + u32 offset = 0xb44; if (IS_MPT_OFDM_RATE(PMacTxInfo.TX_RATE)) phy_set_bb_reg(Adapter, offset, 0xc0000000, 0); @@ -2228,6 +2458,16 @@ void mpt_ProSetPMacTx(PADAPTER Adapter) phy_set_bb_reg(Adapter, offset, 0xc0000000, 1); else if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) phy_set_bb_reg(Adapter, offset, 0xc0000000, 2); + + } else if(IS_HARDWARE_TYPE_JAGUAR(Adapter)) { + u32 offset = 0xb4c; + + if(IS_MPT_OFDM_RATE(PMacTxInfo.TX_RATE)) + phy_set_bb_reg(Adapter, offset, 0xc0000000, 0); + else if(IS_MPT_HT_RATE(PMacTxInfo.TX_RATE)) + phy_set_bb_reg(Adapter, offset, 0xc0000000, 1); + else if(IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) + phy_set_bb_reg(Adapter, offset, 0xc0000000, 2); } phy_set_bb_reg(Adapter, 0xb00, BIT8, 1); /* Turn on PMAC*/ diff --git a/hal/hal_phy.c b/hal/hal_phy.c index 1504a73..cf5cb3b 100644 --- a/hal/hal_phy.c +++ b/hal/hal_phy.c @@ -22,10 +22,10 @@ * OverView: Get shifted position of the BitMask * * Input: -* u4Byte BitMask, +* u32 BitMask, * * Output: none -* Return: u4Byte Return the shift bit bit position of the mask +* Return: u32 Return the shift bit bit position of the mask */ u32 PHY_CalculateBitShift( @@ -80,21 +80,21 @@ static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; *---------------------------------------------------------------------------*/ u32 PHY_RFShadowRead( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset) + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset) { return RF_Shadow[eRFPath][Offset].Value; } /* PHY_RFShadowRead */ -VOID +void PHY_RFShadowWrite( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset, - IN u32 Data) + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset, + u32 Data) { RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask); RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE; @@ -104,9 +104,9 @@ PHY_RFShadowWrite( BOOLEAN PHY_RFShadowCompare( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset) + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset) { u32 reg; /* Check if we need to check the register */ @@ -123,11 +123,11 @@ PHY_RFShadowCompare( } /* PHY_RFShadowCompare */ -VOID +void PHY_RFShadowRecorver( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset) + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset) { /* Check if the address is error */ if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) { @@ -141,9 +141,9 @@ PHY_RFShadowRecorver( } /* PHY_RFShadowRecorver */ -VOID +void PHY_RFShadowCompareAll( - IN PADAPTER Adapter) + PADAPTER Adapter) { enum rf_path eRFPath = RF_PATH_A; u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter); @@ -156,9 +156,9 @@ PHY_RFShadowCompareAll( } /* PHY_RFShadowCompareAll */ -VOID +void PHY_RFShadowRecorverAll( - IN PADAPTER Adapter) + PADAPTER Adapter) { enum rf_path eRFPath = RF_PATH_A; u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter); @@ -171,12 +171,12 @@ PHY_RFShadowRecorverAll( } /* PHY_RFShadowRecorverAll */ -VOID +void PHY_RFShadowCompareFlagSet( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset, - IN u8 Type) + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset, + u8 Type) { /* Set True or False!!! */ RF_Shadow[eRFPath][Offset].Compare = Type; @@ -184,12 +184,12 @@ PHY_RFShadowCompareFlagSet( } /* PHY_RFShadowCompareFlagSet */ -VOID +void PHY_RFShadowRecorverFlagSet( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset, - IN u8 Type) + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset, + u8 Type) { /* Set True or False!!! */ RF_Shadow[eRFPath][Offset].Recorver = Type; @@ -197,9 +197,9 @@ PHY_RFShadowRecorverFlagSet( } /* PHY_RFShadowRecorverFlagSet */ -VOID +void PHY_RFShadowCompareFlagSetAll( - IN PADAPTER Adapter) + PADAPTER Adapter) { enum rf_path eRFPath = RF_PATH_A; u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter); @@ -217,9 +217,9 @@ PHY_RFShadowCompareFlagSetAll( } /* PHY_RFShadowCompareFlagSetAll */ -VOID +void PHY_RFShadowRecorverFlagSetAll( - IN PADAPTER Adapter) + PADAPTER Adapter) { enum rf_path eRFPath = RF_PATH_A; u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter); @@ -236,9 +236,9 @@ PHY_RFShadowRecorverFlagSetAll( } /* PHY_RFShadowCompareFlagSetAll */ -VOID +void PHY_RFShadowRefresh( - IN PADAPTER Adapter) + PADAPTER Adapter) { enum rf_path eRFPath = RF_PATH_A; u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter); diff --git a/hal/led/hal_usb_led.c b/hal/led/hal_usb_led.c index 19505b1..672d800 100644 --- a/hal/led/hal_usb_led.c +++ b/hal/led/hal_usb_led.c @@ -1479,9 +1479,9 @@ SwLedBlink12( } -VOID +void SwLedBlink13( - IN PLED_USB pLed + PLED_USB pLed ) { PADAPTER Adapter = pLed->padapter; @@ -1540,9 +1540,9 @@ SwLedBlink13( } -VOID +void SwLedBlink14( - IN PLED_USB pLed + PLED_USB pLed ) { PADAPTER Adapter = pLed->padapter; @@ -1597,9 +1597,9 @@ SwLedBlink14( } -VOID +void SwLedBlink15( - IN PLED_USB pLed + PLED_USB pLed ) { PADAPTER Adapter = pLed->padapter; @@ -1843,7 +1843,7 @@ void BlinkTimerCallback(void *data) } #ifdef CONFIG_RTW_LED_HANDLED_BY_CMD_THREAD - rtw_led_blink_cmd(padapter, (PVOID)pLed); + rtw_led_blink_cmd(padapter, (void *)pLed); #else _set_workitem(&(pLed->BlinkWorkItem)); #endif @@ -3086,8 +3086,8 @@ SwLedControlMode8( /* page added for Belkin AC950, 20120813 */ void SwLedControlMode9( - IN PADAPTER Adapter, - IN LED_CTL_MODE LedAction + PADAPTER Adapter, + LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = adapter_to_led(Adapter); @@ -3683,7 +3683,7 @@ SwLedControlMode11( /* page added for NEC */ -VOID +void SwLedControlMode12( PADAPTER Adapter, LED_CTL_MODE LedAction @@ -3764,10 +3764,10 @@ SwLedControlMode12( /* Maddest add for NETGEAR R6100 */ -VOID +void SwLedControlMode13( - IN PADAPTER Adapter, - IN LED_CTL_MODE LedAction + PADAPTER Adapter, + LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = adapter_to_led(Adapter); @@ -3910,10 +3910,10 @@ SwLedControlMode13( /* Maddest add for DNI Buffalo */ -VOID +void SwLedControlMode14( - IN PADAPTER Adapter, - IN LED_CTL_MODE LedAction + PADAPTER Adapter, + LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = adapter_to_led(Adapter); @@ -3969,10 +3969,10 @@ SwLedControlMode14( /* Maddest add for Dlink */ -VOID +void SwLedControlMode15( - IN PADAPTER Adapter, - IN LED_CTL_MODE LedAction + PADAPTER Adapter, + LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = adapter_to_led(Adapter); diff --git a/hal/phydm/ap_makefile.mk b/hal/phydm/ap_makefile.mk index d578c8e..eef7a50 100644 --- a/hal/phydm/ap_makefile.mk +++ b/hal/phydm/ap_makefile.mk @@ -25,9 +25,13 @@ _PHYDM_FILES :=\ phydm/phydm_noisemonitor.o\ phydm/phydm_api.o\ phydm/phydm_pow_train.o\ + phydm/phydm_lna_sat.o\ + phydm/phydm_pmac_tx_setting.o\ + phydm/phydm_mp.o\ phydm/txbf/phydm_hal_txbf_api.o\ EdcaTurboCheck.o\ phydm/halrf/halrf.o\ + phydm/halrf/halrf_debug.o\ phydm/halrf/halphyrf_ap.o\ phydm/halrf/halrf_powertracking_ap.o\ phydm/halrf/halrf_powertracking.o\ @@ -45,13 +49,14 @@ ifeq ($(CONFIG_RTL_88E_SUPPORT),y) phydm/halrf/rtl8188e/halrf_8188e_ap.o endif endif - + ifeq ($(CONFIG_RTL_8812_SUPPORT),y) ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) _PHYDM_FILES += ./phydm/halrf/rtl8812a/halrf_8812a_ap.o endif + _PHYDM_FILES += phydm/rtl8812a/phydm_rtl8812a.o endif - + ifeq ($(CONFIG_WLAN_HAL_8881A),y) _PHYDM_FILES += phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.o endif @@ -71,48 +76,130 @@ ifeq ($(CONFIG_WLAN_HAL_8814AE),y) phydm/rtl8814a/halhwimg8814a_mac.o\ phydm/rtl8814a/halhwimg8814a_rf.o\ phydm/rtl8814a/phydm_regconfig8814a.o\ - phydm/rtl8814a/phydm_rtl8814a.o + phydm/rtl8814a/phydm_rtl8814a.o endif endif - + ifeq ($(CONFIG_WLAN_HAL_8822BE),y) _PHYDM_FILES += phydm/halrf/rtl8822b/halrf_8822b.o _PHYDM_FILES += phydm/halrf/rtl8822b/halrf_iqk_8822b.o + _PHYDM_FILES += phydm/halrf/rtl8822b/halhwimg8822b_rf.o ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) _PHYDM_FILES += \ phydm/rtl8822b/halhwimg8822b_bb.o\ phydm/rtl8822b/halhwimg8822b_mac.o\ - phydm/rtl8822b/halhwimg8822b_rf.o\ phydm/rtl8822b/phydm_regconfig8822b.o\ phydm/rtl8822b/phydm_hal_api8822b.o\ phydm/rtl8822b/phydm_rtl8822b.o endif endif +ifeq ($(CONFIG_WLAN_HAL_8822CE),y) + _PHYDM_FILES += phydm/halrf/rtl8822c/halrf_8822c.o + _PHYDM_FILES += phydm/halrf/rtl8822c/halrf_iqk_8822c.o + _PHYDM_FILES += phydm/halrf/rtl8822c/halrf_dpk_8822c.o + _PHYDM_FILES += phydm/halrf/rtl8822c/halrf_rfk_init_8822c.o + _PHYDM_FILES += phydm/halrf/rtl8822c/halhwimg8822c_rf.o + ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) + _PHYDM_FILES += \ + phydm/rtl8822c/halhwimg8822c_bb.o\ + phydm/rtl8822c/halhwimg8822c_mac.o\ + phydm/rtl8822c/phydm_regconfig8822c.o\ + phydm/rtl8822c/phydm_hal_api8822c.o + endif +endif + +ifeq ($(CONFIG_WLAN_HAL_8812FE),y) + _PHYDM_FILES += phydm/halrf/rtl8812f/halrf_8812f.o + _PHYDM_FILES += phydm/halrf/rtl8812f/halrf_iqk_8812f.o + _PHYDM_FILES += phydm/halrf/rtl8812f/halrf_dpk_8812f.o + _PHYDM_FILES += phydm/halrf/rtl8812f/halrf_tssi_8812f.o + _PHYDM_FILES += phydm/halrf/rtl8812f/halrf_rfk_init_8812f.o + _PHYDM_FILES += phydm/halrf/rtl8812f/halhwimg8812f_rf.o + ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) + _PHYDM_FILES += \ + phydm/rtl8812f/halhwimg8812f_bb.o\ + phydm/rtl8812f/halhwimg8812f_mac.o\ + phydm/rtl8812f/phydm_regconfig8812f.o\ + phydm/rtl8812f/phydm_hal_api8812f.o + endif +endif + ifeq ($(CONFIG_WLAN_HAL_8821CE),y) _PHYDM_FILES += phydm/halrf/rtl8821c/halrf_8821c.o _PHYDM_FILES += phydm/halrf/rtl8821c/halrf_iqk_8821c.o + _PHYDM_FILES += phydm/halrf/rtl8821c/halhwimg8821c_rf.o ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) _PHYDM_FILES += \ phydm/rtl8821c/halhwimg8821c_bb.o\ phydm/rtl8821c/halhwimg8821c_mac.o\ - phydm/rtl8821c/halhwimg8821c_rf.o\ phydm/rtl8821c/phydm_regconfig8821c.o\ phydm/rtl8821c/phydm_hal_api8821c.o endif endif - + ifeq ($(CONFIG_WLAN_HAL_8197F),y) _PHYDM_FILES += phydm/halrf/rtl8197f/halrf_8197f.o _PHYDM_FILES += phydm/halrf/rtl8197f/halrf_iqk_8197f.o + _PHYDM_FILES += phydm/halrf/rtl8197f/halrf_dpk_8197f.o + _PHYDM_FILES += phydm/halrf/rtl8197f/halhwimg8197f_rf.o _PHYDM_FILES += efuse_97f/efuse.o ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) _PHYDM_FILES += \ phydm/rtl8197f/halhwimg8197f_bb.o\ phydm/rtl8197f/halhwimg8197f_mac.o\ - phydm/rtl8197f/halhwimg8197f_rf.o\ phydm/rtl8197f/phydm_hal_api8197f.o\ phydm/rtl8197f/phydm_regconfig8197f.o\ phydm/rtl8197f/phydm_rtl8197f.o endif endif + + +ifeq ($(CONFIG_WLAN_HAL_8192FE),y) + _PHYDM_FILES += phydm/halrf/rtl8192f/halrf_8192f.o + _PHYDM_FILES += phydm/halrf/rtl8192f/halrf_dpk_8192f.o + _PHYDM_FILES += phydm/halrf/rtl8192f/halhwimg8192f_rf.o + ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) + _PHYDM_FILES += \ + phydm/rtl8192f/halhwimg8192f_bb.o\ + phydm/rtl8192f/halhwimg8192f_mac.o\ + phydm/rtl8192f/phydm_hal_api8192f.o\ + phydm/rtl8192f/phydm_regconfig8192f.o\ + phydm/rtl8192f/phydm_rtl8192f.o + endif +endif + +ifeq ($(CONFIG_WLAN_HAL_8198F),y) + _PHYDM_FILES += phydm/halrf/rtl8198f/halrf_8198f.o + _PHYDM_FILES += phydm/halrf/rtl8198f/halrf_iqk_8198f.o + _PHYDM_FILES += phydm/halrf/rtl8198f/halrf_dpk_8198f.o + _PHYDM_FILES += phydm/halrf/rtl8198f/halrf_rfk_init_8198f.o + _PHYDM_FILES += phydm/halrf/rtl8198f/halhwimg8198f_rf.o + ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) + _PHYDM_FILES += \ + phydm/rtl8198f/phydm_hal_api8198f.o\ + phydm/rtl8198f/halhwimg8198f_bb.o\ + phydm/rtl8198f/halhwimg8198f_mac.o\ + phydm/rtl8198f/phydm_regconfig8198f.o \ + phydm/halrf/rtl8198f/halrf_8198f.o + endif +endif + +ifeq ($(CONFIG_WLAN_HAL_8814BE),y) + _PHYDM_FILES += phydm/halrf/rtl8814b/halrf_8814b.o + _PHYDM_FILES += phydm/halrf/rtl8814b/halrf_iqk_8814b.o + _PHYDM_FILES += phydm/halrf/rtl8814b/halrf_dpk_8814b.o + _PHYDM_FILES += phydm/halrf/rtl8814b/halrf_rfk_init_8814b.o + _PHYDM_FILES += phydm/halrf/rtl8814b/halhwimg8814b_rf.o + ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) + _PHYDM_FILES += \ + phydm/rtl8814b/phydm_hal_api8814b.o\ + phydm/rtl8814b/halhwimg8814b_bb.o\ + phydm/rtl8814b/halhwimg8814b_mac.o\ + phydm/rtl8814b/phydm_regconfig8814b.o \ + phydm/halrf/rtl8814b/halrf_8814b.o + endif +endif + + + diff --git a/hal/phydm/halhwimg.h b/hal/phydm/halhwimg.h index e8f5802..6d658b3 100644 --- a/hal/phydm/halhwimg.h +++ b/hal/phydm/halhwimg.h @@ -16,76 +16,76 @@ #ifndef __INC_HW_IMG_H #define __INC_HW_IMG_H -/* +/*@ * 2011/03/15 MH Add for different IC HW image file selection. code size consideration. * */ #if RT_PLATFORM == PLATFORM_LINUX #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) - /* For 92C */ + /* @For 92C */ #define RTL8192CE_HWIMG_SUPPORT 1 #define RTL8192CE_TEST_HWIMG_SUPPORT 0 #define RTL8192CU_HWIMG_SUPPORT 0 #define RTL8192CU_TEST_HWIMG_SUPPORT 0 - /* For 92D */ + /* @For 92D */ #define RTL8192DE_HWIMG_SUPPORT 1 #define RTL8192DE_TEST_HWIMG_SUPPORT 0 #define RTL8192DU_HWIMG_SUPPORT 0 #define RTL8192DU_TEST_HWIMG_SUPPORT 0 - /* For 8723 */ + /* @For 8723 */ #define RTL8723E_HWIMG_SUPPORT 1 #define RTL8723U_HWIMG_SUPPORT 0 #define RTL8723S_HWIMG_SUPPORT 0 - /* For 88E */ + /* @For 88E */ #define RTL8188EE_HWIMG_SUPPORT 0 #define RTL8188EU_HWIMG_SUPPORT 0 #define RTL8188ES_HWIMG_SUPPORT 0 #elif (DEV_BUS_TYPE == RT_USB_INTERFACE) - /* For 92C */ + /* @For 92C */ #define RTL8192CE_HWIMG_SUPPORT 0 #define RTL8192CE_TEST_HWIMG_SUPPORT 0 #define RTL8192CU_HWIMG_SUPPORT 1 #define RTL8192CU_TEST_HWIMG_SUPPORT 0 - /* For 92D */ + /* @For 92D */ #define RTL8192DE_HWIMG_SUPPORT 0 #define RTL8192DE_TEST_HWIMG_SUPPORT 0 #define RTL8192DU_HWIMG_SUPPORT 1 #define RTL8192DU_TEST_HWIMG_SUPPORT 0 - /* For 8723 */ + /* @For 8723 */ #define RTL8723E_HWIMG_SUPPORT 0 #define RTL8723U_HWIMG_SUPPORT 1 #define RTL8723S_HWIMG_SUPPORT 0 - /* For 88E */ + /* @For 88E */ #define RTL8188EE_HWIMG_SUPPORT 0 #define RTL8188EU_HWIMG_SUPPORT 0 #define RTL8188ES_HWIMG_SUPPORT 0 #elif (DEV_BUS_TYPE == RT_SDIO_INTERFACE) - /* For 92C */ + /* @For 92C */ #define RTL8192CE_HWIMG_SUPPORT 0 #define RTL8192CE_TEST_HWIMG_SUPPORT 0 #define RTL8192CU_HWIMG_SUPPORT 1 #define RTL8192CU_TEST_HWIMG_SUPPORT 0 - /* For 92D */ + /* @For 92D */ #define RTL8192DE_HWIMG_SUPPORT 0 #define RTL8192DE_TEST_HWIMG_SUPPORT 0 #define RTL8192DU_HWIMG_SUPPORT 1 #define RTL8192DU_TEST_HWIMG_SUPPORT 0 - /* For 8723 */ + /* @For 8723 */ #define RTL8723E_HWIMG_SUPPORT 0 #define RTL8723U_HWIMG_SUPPORT 0 #define RTL8723S_HWIMG_SUPPORT 1 - /* For 88E */ + /* @For 88E */ #define RTL8188EE_HWIMG_SUPPORT 0 #define RTL8188EU_HWIMG_SUPPORT 0 #define RTL8188ES_HWIMG_SUPPORT 0 @@ -93,40 +93,40 @@ #else /* PLATFORM_WINDOWS & MacOSX */ - /* For 92C */ + /* @For 92C */ #define RTL8192CE_HWIMG_SUPPORT 1 #define RTL8192CE_TEST_HWIMG_SUPPORT 1 #define RTL8192CU_HWIMG_SUPPORT 1 #define RTL8192CU_TEST_HWIMG_SUPPORT 1 - /* For 92D */ + /* @For 92D */ #define RTL8192DE_HWIMG_SUPPORT 1 #define RTL8192DE_TEST_HWIMG_SUPPORT 1 #define RTL8192DU_HWIMG_SUPPORT 1 #define RTL8192DU_TEST_HWIMG_SUPPORT 1 #if defined(UNDER_CE) - /* For 8723 */ + /* @For 8723 */ #define RTL8723E_HWIMG_SUPPORT 0 #define RTL8723U_HWIMG_SUPPORT 0 #define RTL8723S_HWIMG_SUPPORT 1 - /* For 88E */ + /* @For 88E */ #define RTL8188EE_HWIMG_SUPPORT 0 #define RTL8188EU_HWIMG_SUPPORT 0 #define RTL8188ES_HWIMG_SUPPORT 0 #else - /* For 8723 */ + /* @For 8723 */ #define RTL8723E_HWIMG_SUPPORT 1 - /* #define RTL_8723E_TEST_HWIMG_SUPPORT 1 */ + /* @#define RTL_8723E_TEST_HWIMG_SUPPORT 1 */ #define RTL8723U_HWIMG_SUPPORT 1 - /* #define RTL_8723U_TEST_HWIMG_SUPPORT 1 */ + /* @#define RTL_8723U_TEST_HWIMG_SUPPORT 1 */ #define RTL8723S_HWIMG_SUPPORT 1 - /* #define RTL_8723S_TEST_HWIMG_SUPPORT 1 */ + /* @#define RTL_8723S_TEST_HWIMG_SUPPORT 1 */ - /* For 88E */ + /* @For 88E */ #define RTL8188EE_HWIMG_SUPPORT 1 #define RTL8188EU_HWIMG_SUPPORT 1 #define RTL8188ES_HWIMG_SUPPORT 1 @@ -134,4 +134,4 @@ #endif -#endif /* __INC_HW_IMG_H */ +#endif /* @__INC_HW_IMG_H */ diff --git a/hal/phydm/halrf/halphyrf_ap.c b/hal/phydm/halrf/halphyrf_ap.c index e6b07a1..cd3d620 100644 --- a/hal/phydm/halrf/halphyrf_ap.c +++ b/hal/phydm/halrf/halphyrf_ap.c @@ -37,6 +37,28 @@ _offset = _size-1;\ } while (0) +void odm_clear_txpowertracking_state( + void *dm_void +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + struct rtl8192cd_priv *priv = dm->priv; + + u8 i; + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "===>%s\n", __func__); + + for (i = 0; i < MAX_RF_PATH; i++) { + cali_info->absolute_ofdm_swing_idx[i] = 0; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "cali_info->absolute_ofdm_swing_idx[%d]=%d\n", + i, cali_info->absolute_ofdm_swing_idx[i]); + } + + dm->rf_calibrate_info.thermal_value = 0; + dm->rf_calibrate_info.thermal_value_lck = 0; + dm->rf_calibrate_info.thermal_value_iqk = 0; +} void configure_txpower_track( void *dm_void, @@ -74,6 +96,20 @@ void configure_txpower_track( configure_txpower_track_8822b(config); #endif +#if RTL8192F_SUPPORT + if (dm->support_ic_type == ODM_RTL8192F) + configure_txpower_track_8192f(config); +#endif + +#if RTL8198F_SUPPORT + if (dm->support_ic_type == ODM_RTL8198F) + configure_txpower_track_8198f(config); +#endif + +#if RTL8814B_SUPPORT + if (dm->support_ic_type == ODM_RTL8814B) + configure_txpower_track_8814b(config); +#endif } @@ -95,7 +131,7 @@ odm_txpowertracking_callback_thermal_meter_92e( struct rtl8192cd_priv *priv = dm->priv; rf_mimo_mode = dm->rf_type; - /* PHYDM_DBG(dm,ODM_COMP_TX_PWR_TRACK,"%s:%d rf_mimo_mode:%d\n", __FUNCTION__, __LINE__, rf_mimo_mode); */ + /* RF_DBG(dm,DBG_RF_TX_PWR_TRACK,"%s:%d rf_mimo_mode:%d\n", __FUNCTION__, __LINE__, rf_mimo_mode); */ #ifdef MP_TEST if ((OPMODE & WIFI_MP_STATE) || *(dm->mp_mode)) { @@ -109,7 +145,7 @@ odm_txpowertracking_callback_thermal_meter_92e( } thermal_value = (unsigned char)odm_get_rf_reg(dm, RF_PATH_A, ODM_RF_T_METER_92E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther); switch (rf_mimo_mode) { @@ -129,7 +165,7 @@ odm_txpowertracking_callback_thermal_meter_92e( for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) { if (ele_D == (ofdm_swing_table_92e[i] >> 22)) { OFDM_index[0] = (unsigned char)i; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "PathA 0xC80[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[0]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "PathA 0xC80[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[0]); break; } } @@ -140,7 +176,7 @@ odm_txpowertracking_callback_thermal_meter_92e( for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) { if (ele_D == (ofdm_swing_table_92e[i] >> 22)) { OFDM_index[1] = (unsigned char)i; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "PathB 0xC88[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[1]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "PathB 0xC88[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[1]); break; } } @@ -162,7 +198,7 @@ odm_txpowertracking_callback_thermal_meter_92e( if (thermal_value_avg_count) { thermal_value = (unsigned char)(thermal_value_avg / thermal_value_avg_count); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "AVG Thermal Meter = 0x%x\n", thermal_value); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "AVG Thermal Meter = 0x%x\n", thermal_value); } } @@ -174,8 +210,8 @@ odm_txpowertracking_callback_thermal_meter_92e( } if (thermal_value != priv->pshare->thermal_value) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "\n******** START POWER TRACKING ********\n"); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** START POWER TRACKING ********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther); delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther); delta_IQK = RTL_ABS(thermal_value, priv->pshare->thermal_value_iqk); @@ -184,32 +220,32 @@ odm_txpowertracking_callback_thermal_meter_92e( #ifdef _TRACKING_TABLE_FILE if (priv->pshare->rf_ft_var.pwr_track_file) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)); if (is_decrease) { for (i = 0; i < rf; i++) { OFDM_index[i] = priv->pshare->OFDM_index0[i] + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0); OFDM_index[i] = ((OFDM_index[i] > (OFDM_TABLE_SIZE_92E- 1)) ? (OFDM_TABLE_SIZE_92E - 1) : OFDM_index[i]); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, ">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)); CCK_index = priv->pshare->CCK_index0 + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1); CCK_index = ((CCK_index > (CCK_TABLE_SIZE_92E - 1)) ? (CCK_TABLE_SIZE_92E - 1) : CCK_index); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, ">>> Decrese power ---> new CCK_INDEX:%d (%d + %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> Decrese power ---> new CCK_INDEX:%d (%d + %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1)); } } else { for (i = 0; i < rf; i++) { OFDM_index[i] = priv->pshare->OFDM_index0[i] - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0); OFDM_index[i] = ((OFDM_index[i] < OFDM_min_index) ? OFDM_min_index : OFDM_index[i]); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, ">>> Increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> Increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)); CCK_index = priv->pshare->CCK_index0 - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1); CCK_index = ((CCK_index < 0) ? 0 : CCK_index); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, ">>> Increse power ---> new CCK_INDEX:%d (%d - %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> Increse power ---> new CCK_INDEX:%d (%d - %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1)); } } } #endif /* CFG_TRACKING_TABLE_FILE */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "ofdm_swing_table_92e[(unsigned int)OFDM_index[0]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[0]]); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "ofdm_swing_table_92e[(unsigned int)OFDM_index[1]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[1]]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "ofdm_swing_table_92e[(unsigned int)OFDM_index[0]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[0]]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "ofdm_swing_table_92e[(unsigned int)OFDM_index[1]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[1]]); /* Adujst OFDM Ant_A according to IQK result */ ele_D = (ofdm_swing_table_92e[(unsigned int)OFDM_index[0]] & 0xFFC00000) >> 22; @@ -275,8 +311,8 @@ odm_txpowertracking_callback_thermal_meter_92e( } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "0xc80 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD)); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "0xc88 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0xc80 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0xc88 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD)); if ((delta_IQK > 3) && (!iqk_info->rfk_forbidden)) { priv->pshare->thermal_value_iqk = thermal_value; @@ -305,37 +341,271 @@ odm_txpowertracking_callback_thermal_meter_92e( priv->pshare->OFDM_index[i] = OFDM_index[i]; priv->pshare->CCK_index = CCK_index; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "\n******** END:%s() ********\n", __FUNCTION__); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** END:%s() ********\n", __FUNCTION__); } #endif +#if (RTL8814B_SUPPORT == 1) +void +odm_txpowertracking_callback_thermal_meter_jaguar_series4(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + struct dm_iqk_info *iqk_info = &dm->IQK_info; + struct _hal_rf_ *rf = &dm->rf_table; + struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; + struct rtl8192cd_priv *priv = dm->priv; + struct txpwrtrack_cfg c; + + if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) + return; + + u8 thermal_value[MAX_RF_PATH] = {0}, delta[MAX_RF_PATH] = {0}; + u8 delta_swing_table_idx_tup[DELTA_SWINGIDX_SIZE] = {0}; + u8 delta_swing_table_idx_tdown[DELTA_SWINGIDX_SIZE] = {0}; + u8 delta_LCK = 0, delta_IQK = 0, i = 0, j = 0, p; + u8 thermal_value_avg_count[MAX_RF_PATH] = {0}; + u32 thermal_value_avg[MAX_RF_PATH] = {0}; + s8 thermal_value_temp[MAX_RF_PATH] = {0}; + + u8 *pwrtrk_tab_up_a = NULL; + u8 *pwrtrk_tab_down_a = NULL; + u8 *pwrtrk_tab_up_b = NULL; + u8 *pwrtrk_tab_down_b = NULL; + u8 *pwrtrk_tab_up_c = NULL; + u8 *pwrtrk_tab_down_c = NULL; + u8 *pwrtrk_tab_up_d = NULL; + u8 *pwrtrk_tab_down_d = NULL; + + configure_txpower_track(dm, &c); + + (*c.get_delta_swing_table)(dm, + (u8 **)&pwrtrk_tab_up_a, (u8 **)&pwrtrk_tab_down_a, + (u8 **)&pwrtrk_tab_up_b, (u8 **)&pwrtrk_tab_down_b); + + if (GET_CHIP_VER(priv) == VERSION_8814B) { + (*c.get_delta_swing_table8814only)(dm, + (u8 **)&pwrtrk_tab_up_c, (u8 **)&pwrtrk_tab_down_c, + (u8 **)&pwrtrk_tab_up_d, (u8 **)&pwrtrk_tab_down_d); + } + + cali_info->txpowertracking_callback_cnt++; + cali_info->is_txpowertracking_init = true; + + /* Initialize */ + if (!dm->rf_calibrate_info.thermal_value) + dm->rf_calibrate_info.thermal_value = + priv->pmib->dot11RFEntry.thermal[RF_PATH_A]; + + if (!dm->rf_calibrate_info.thermal_value_lck) + dm->rf_calibrate_info.thermal_value_lck = + priv->pmib->dot11RFEntry.thermal[RF_PATH_A]; + + if (!dm->rf_calibrate_info.thermal_value_iqk) + dm->rf_calibrate_info.thermal_value_iqk = + priv->pmib->dot11RFEntry.thermal[RF_PATH_A]; + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n", + cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base_path[RF_PATH_A], cali_info->default_ofdm_index); + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "cali_info->txpowertrack_control=%d\n", cali_info->txpowertrack_control); + + for (i = 0; i < c.rf_path_count; i++) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "PGthermal[%d]=0x%x(%d)\n", i, + priv->pmib->dot11RFEntry.thermal[i], + priv->pmib->dot11RFEntry.thermal[i]); + + if (priv->pmib->dot11RFEntry.thermal[i] == 0xff || + priv->pmib->dot11RFEntry.thermal[i] == 0x0) + return; + } + + for (i = 0; i < c.rf_path_count; i++) { + thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ + + thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm); + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "thermal_value_temp[%d](%d) = thermal_value[%d](%d) + power_time_thermal(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm)); + + if (thermal_value_temp[i] > 63) + thermal_value[i] = 63; + else if (thermal_value_temp[i] < 0) + thermal_value[i] = 0; + else + thermal_value[i] = thermal_value_temp[i]; + } + + for (j = 0; j < c.rf_path_count; j++) { + cali_info->thermal_value_avg_path[j][cali_info->thermal_value_avg_index_path[j]] = thermal_value[j]; + cali_info->thermal_value_avg_index_path[j]++; + if (cali_info->thermal_value_avg_index_path[j] == c.average_thermal_num) /*Average times = c.average_thermal_num*/ + cali_info->thermal_value_avg_index_path[j] = 0; -#if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) + for (i = 0; i < c.average_thermal_num; i++) { + if (cali_info->thermal_value_avg_path[j][i]) { + thermal_value_avg[j] += cali_info->thermal_value_avg_path[j][i]; + thermal_value_avg_count[j]++; + } + } + + if (thermal_value_avg_count[j]) { /* Calculate Average thermal_value after average enough times */ + thermal_value[j] = (u8)(thermal_value_avg[j] / thermal_value_avg_count[j]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "PGthermal[%d] = 0x%x(%d), AVG Thermal Meter = 0x%x(%d)\n", j, + priv->pmib->dot11RFEntry.thermal[j], + priv->pmib->dot11RFEntry.thermal[j], + thermal_value[j], + thermal_value[j]); + } + /* 4 5. Calculate delta, delta_LCK, delta_IQK. */ + + /* "delta" here is used to determine whether thermal value changes or not. */ + delta[j] = RTL_ABS(thermal_value[j], priv->pmib->dot11RFEntry.thermal[j]); + delta_LCK = RTL_ABS(thermal_value[RF_PATH_A], dm->rf_calibrate_info.thermal_value_lck); + delta_IQK = RTL_ABS(thermal_value[RF_PATH_A], dm->rf_calibrate_info.thermal_value_iqk); + } + + /*4 6. If necessary, do LCK.*/ + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", RF_PATH_A, delta[RF_PATH_A], delta_LCK, delta_IQK); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", RF_PATH_B, delta[RF_PATH_B], delta_LCK, delta_IQK); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", RF_PATH_C, delta[RF_PATH_C], delta_LCK, delta_IQK); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", RF_PATH_D, delta[RF_PATH_D], delta_LCK, delta_IQK); + + /* Wait sacn to do LCK by RF Jenyu*/ + if( (*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) { + /* Delta temperature is equal to or larger than 20 centigrade.*/ + if (delta_LCK >= c.threshold_iqk) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); + cali_info->thermal_value_lck = thermal_value[RF_PATH_A]; + + /*Use RTLCK, so close power tracking driver LCK*/ + if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) { + if (c.phy_lc_calibrate) + (*c.phy_lc_calibrate)(dm); + } else + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do not do LCK\n"); + } + } + + /*3 7. If necessary, move the index of swing table to adjust Tx power.*/ +#ifdef _TRACKING_TABLE_FILE + for (i = 0; i < c.rf_path_count; i++) { + if (i == RF_PATH_B) { + odm_move_memory(dm, delta_swing_table_idx_tup, pwrtrk_tab_up_b, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, delta_swing_table_idx_tdown, pwrtrk_tab_down_b, DELTA_SWINGIDX_SIZE); + } else if (i == RF_PATH_C) { + odm_move_memory(dm, delta_swing_table_idx_tup, pwrtrk_tab_up_c, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, delta_swing_table_idx_tdown, pwrtrk_tab_down_c, DELTA_SWINGIDX_SIZE); + } else if (i == RF_PATH_D) { + odm_move_memory(dm, delta_swing_table_idx_tup, pwrtrk_tab_up_d, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, delta_swing_table_idx_tdown, pwrtrk_tab_down_d, DELTA_SWINGIDX_SIZE); + } else { + odm_move_memory(dm, delta_swing_table_idx_tup, pwrtrk_tab_up_a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, delta_swing_table_idx_tdown, pwrtrk_tab_down_a, DELTA_SWINGIDX_SIZE); + } + + cali_info->delta_power_index_last_path[i] = cali_info->delta_power_index_path[i]; /*recording poer index offset*/ + delta[i] = thermal_value[i] > priv->pmib->dot11RFEntry.thermal[i] ? (thermal_value[i] - priv->pmib->dot11RFEntry.thermal[i]) : (priv->pmib->dot11RFEntry.thermal[i] - thermal_value[i]); + + if (delta[i] >= TXPWR_TRACK_TABLE_SIZE) + delta[i] = TXPWR_TRACK_TABLE_SIZE - 1; + + if (thermal_value[i] > priv->pmib->dot11RFEntry.thermal[i]) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tup[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tup[delta[i]], i); + + cali_info->delta_power_index_path[i] = delta_swing_table_idx_tup[delta[i]]; + cali_info->absolute_ofdm_swing_idx[i] = delta_swing_table_idx_tup[delta[i]]; /*Record delta swing for mix mode power tracking*/ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is higher and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i); + } else { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tdown[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tdown[delta[i]], i); + cali_info->delta_power_index_path[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; + cali_info->absolute_ofdm_swing_idx[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; /*Record delta swing for mix mode power tracking*/ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is lower and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i); + } + } + +#endif + + for (p = RF_PATH_A; p < c.rf_path_count; p++) { + if (cali_info->delta_power_index_path[p] == cali_info->delta_power_index_last_path[p]) /*If Thermal value changes but lookup table value still the same*/ + cali_info->power_index_offset_path[p] = 0; + else + cali_info->power_index_offset_path[p] = cali_info->delta_power_index_path[p] - cali_info->delta_power_index_last_path[p]; /*Power index diff between 2 times Power Tracking*/ + } + + if ((cali_info->power_index_offset_path[RF_PATH_A] != 0 || + cali_info->power_index_offset_path[RF_PATH_B] != 0 || + cali_info->power_index_offset_path[RF_PATH_C] != 0 || + cali_info->power_index_offset_path[RF_PATH_D] != 0)) { + + if (dm->support_ic_type == ODM_RTL8814B) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); + } else { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0); + } + } else + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "TXAGC offset is unchanged\n"); + + /* Wait sacn to do IQK by RF Jenyu*/ + if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) { + /*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ + if (delta_IQK >= c.threshold_iqk) { + cali_info->thermal_value_iqk = thermal_value[RF_PATH_A]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); + if (!cali_info->is_iqk_in_progress) + (*c.do_iqk)(dm, delta_IQK, thermal_value[RF_PATH_A], 8); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do IQK\n"); + } + } + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===%s\n", __func__); + + cali_info->tx_powercount = 0; +} +#endif + +#if (RTL8197F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\ + RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1) void odm_txpowertracking_callback_thermal_meter_jaguar_series3( void *dm_void ) { #if 1 - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 thermal_value = 0, delta, delta_LCK, delta_IQK, channel, is_increase; - u8 thermal_value_avg_count = 0, p = 0, i = 0; - u32 thermal_value_avg = 0; - struct rtl8192cd_priv *priv = dm->priv; - struct txpwrtrack_cfg c; - struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); - struct dm_iqk_info *iqk_info = &dm->IQK_info; - /*4 1. The following TWO tables decide the final index of OFDM/CCK swing table.*/ - u8 *delta_swing_table_idx_tup_a = NULL, *delta_swing_table_idx_tdown_a = NULL; - u8 *delta_swing_table_idx_tup_b = NULL, *delta_swing_table_idx_tdown_b = NULL; - u8 *delta_swing_table_idx_tup_cck_a = NULL, *delta_swing_table_idx_tdown_cck_a = NULL; - u8 *delta_swing_table_idx_tup_cck_b = NULL, *delta_swing_table_idx_tdown_cck_b = NULL; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 thermal_value = 0, delta, delta_LCK, delta_IQK, channel, is_increase; + u8 thermal_value_avg_count = 0, p = 0, i = 0; + u32 thermal_value_avg = 0; + struct rtl8192cd_priv *priv = dm->priv; + struct txpwrtrack_cfg c; + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + struct dm_iqk_info *iqk_info = &dm->IQK_info; + struct _hal_rf_ *rf = &dm->rf_table; + /*The following tables decide the final index of OFDM/CCK swing table.*/ + u8 *pwrtrk_tab_up_a = NULL, *pwrtrk_tab_down_a = NULL; + u8 *pwrtrk_tab_up_b = NULL, *pwrtrk_tab_down_b = NULL; + u8 *pwrtrk_tab_up_cck_a = NULL, *pwrtrk_tab_down_cck_a = NULL; + u8 *pwrtrk_tab_up_cck_b = NULL, *pwrtrk_tab_down_cck_b = NULL; /*for 8814 add by Yu Chen*/ - u8 *delta_swing_table_idx_tup_c = NULL, *delta_swing_table_idx_tdown_c = NULL; - u8 *delta_swing_table_idx_tup_d = NULL, *delta_swing_table_idx_tdown_d = NULL; - u8 *delta_swing_table_idx_tup_cck_c = NULL, *delta_swing_table_idx_tdown_cck_c = NULL; - u8 *delta_swing_table_idx_tup_cck_d = NULL, *delta_swing_table_idx_tdown_cck_d = NULL; + u8 *pwrtrk_tab_up_c = NULL, *pwrtrk_tab_down_c = NULL; + u8 *pwrtrk_tab_up_d = NULL, *pwrtrk_tab_down_d = NULL; + u8 *pwrtrk_tab_up_cck_c = NULL, *pwrtrk_tab_down_cck_c = NULL; + u8 *pwrtrk_tab_up_cck_d = NULL, *pwrtrk_tab_down_cck_d = NULL; + s8 thermal_value_temp = 0; #ifdef MP_TEST if ((OPMODE & WIFI_MP_STATE) || *(dm->mp_mode)) { @@ -350,22 +620,47 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series3( configure_txpower_track(dm, &c); - (*c.get_delta_all_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a, - (u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b, - (u8 **)&delta_swing_table_idx_tup_cck_a, (u8 **)&delta_swing_table_idx_tdown_cck_a, - (u8 **)&delta_swing_table_idx_tup_cck_b, (u8 **)&delta_swing_table_idx_tdown_cck_b); + (*c.get_delta_all_swing_table)(dm, + (u8 **)&pwrtrk_tab_up_a, (u8 **)&pwrtrk_tab_down_a, + (u8 **)&pwrtrk_tab_up_b, (u8 **)&pwrtrk_tab_down_b, + (u8 **)&pwrtrk_tab_up_cck_a, (u8 **)&pwrtrk_tab_down_cck_a, + (u8 **)&pwrtrk_tab_up_cck_b, (u8 **)&pwrtrk_tab_down_cck_b); - thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /*0x42: RF Reg[15:10] 88E*/ + if (GET_CHIP_VER(priv) == VERSION_8198F) { + (*c.get_delta_all_swing_table_ex)(dm, + (u8 **)&pwrtrk_tab_up_c, (u8 **)&pwrtrk_tab_down_c, + (u8 **)&pwrtrk_tab_up_d, (u8 **)&pwrtrk_tab_down_d, + (u8 **)&pwrtrk_tab_up_cck_c, (u8 **)&pwrtrk_tab_down_cck_c, + (u8 **)&pwrtrk_tab_up_cck_d, (u8 **)&pwrtrk_tab_down_cck_d); + } + /*0x42: RF Reg[15:10] 88E*/ + thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); #ifdef THER_TRIM if (GET_CHIP_VER(priv) == VERSION_8197F) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"orig thermal_value=%d, ther_trim_val=%d\n", thermal_value, priv->pshare->rf_ft_var.ther_trim_val); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"orig thermal_value=%d, ther_trim_val=%d\n", thermal_value, priv->pshare->rf_ft_var.ther_trim_val); thermal_value += priv->pshare->rf_ft_var.ther_trim_val; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"after thermal trim, thermal_value=%d\n", thermal_value); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"after thermal trim, thermal_value=%d\n", thermal_value); + } + + if (GET_CHIP_VER(priv) == VERSION_8198F) { + thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm); + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "thermal_value_temp(%d) = ther_value(%d) + ther_trim_ther(%d)\n", + thermal_value_temp, thermal_value, phydm_get_thermal_offset(dm)); + + if (thermal_value_temp > 63) + thermal_value = 63; + else if (thermal_value_temp < 0) + thermal_value = 0; + else + thermal_value = thermal_value_temp; } #endif - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"Readback Thermal Meter = 0x%x(%d) EEPROMthermalmeter 0x%x(%d)\n" + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"\n\n\nCurrent Thermal = 0x%x(%d) EEPROMthermalmeter 0x%x(%d)\n" , thermal_value, thermal_value, priv->pmib->dot11RFEntry.ther, priv->pmib->dot11RFEntry.ther); /* Initialize */ @@ -393,12 +688,12 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series3( } if (thermal_value_avg_count) {/*Calculate Average thermal_value after average enough times*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"thermal_value_avg=0x%x(%d) thermal_value_avg_count = %d\n" + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"thermal_value_avg=0x%x(%d) thermal_value_avg_count = %d\n" , thermal_value_avg, thermal_value_avg, thermal_value_avg_count); thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"AVG Thermal Meter = 0x%X(%d), EEPROMthermalmeter = 0x%X(%d)\n", thermal_value, thermal_value, priv->pmib->dot11RFEntry.ther, priv->pmib->dot11RFEntry.ther); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"AVG Thermal Meter = 0x%X(%d), EEPROMthermalmeter = 0x%X(%d)\n", thermal_value, thermal_value, priv->pmib->dot11RFEntry.ther, priv->pmib->dot11RFEntry.ther); } /*4 Calculate delta, delta_LCK, delta_IQK.*/ @@ -408,136 +703,153 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series3( is_increase = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 0 : 1); if (delta > 29) { /* power track table index(thermal diff.) upper bound*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "delta(%d) > 29, set delta to 29\n", delta); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta(%d) > 29, set delta to 29\n", delta); delta = 29; } + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK); /*4 if necessary, do LCK.*/ - if ((delta_LCK > c.threshold_iqk) && (!iqk_info->rfk_forbidden)) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); + if ((delta_LCK >= c.threshold_iqk) && (!iqk_info->rfk_forbidden)) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); dm->rf_calibrate_info.thermal_value_lck = thermal_value; #if (RTL8822B_SUPPORT != 1) if (!(dm->support_ic_type & ODM_RTL8822B)) { - if (c.phy_lc_calibrate) - (*c.phy_lc_calibrate)(dm); - } + if (c.phy_lc_calibrate) + (*c.phy_lc_calibrate)(dm); + } #endif } - if ((delta_IQK > c.threshold_iqk) && (!iqk_info->rfk_forbidden)) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); - dm->rf_calibrate_info.thermal_value_iqk = thermal_value; - if (c.do_iqk) - (*c.do_iqk)(dm, true, 0, 0); - } - - if (!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/ + if (!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/ return; /*4 Do Power Tracking*/ if (thermal_value != dm->rf_calibrate_info.thermal_value) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"\n\n******** START POWER TRACKING ********\n"); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"Readback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", - thermal_value, dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******** START POWER TRACKING ********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"Readback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", + thermal_value, dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther); #ifdef _TRACKING_TABLE_FILE if (priv->pshare->rf_ft_var.pwr_track_file) { - if (is_increase) { /*thermal is higher than base*/ + if (is_increase) { /*thermal is higher than base*/ for (p = RF_PATH_A; p < c.rf_path_count; p++) { switch (p) { case RF_PATH_B: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tup_b[%d] = %d delta_swing_table_idx_tup_cck_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta], delta, delta_swing_table_idx_tup_cck_b[delta]); - cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta]; - cali_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_b[delta]; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_B] = %d pRF->absolute_cck_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_up_b[%d] = %d pwrtrk_tab_up_cck_b[%d] = %d\n", delta, pwrtrk_tab_up_b[delta], delta, pwrtrk_tab_up_cck_b[delta]); + cali_info->absolute_ofdm_swing_idx[p] = pwrtrk_tab_up_b[delta]; + cali_info->absolute_cck_swing_idx[p] = pwrtrk_tab_up_cck_b[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_B] = %d pRF->absolute_cck_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); break; case RF_PATH_C: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tup_c[%d] = %d delta_swing_table_idx_tup_cck_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta], delta, delta_swing_table_idx_tup_cck_c[delta]); - cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta]; - cali_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_c[delta]; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_C] = %d pRF->absolute_cck_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_up_c[%d] = %d pwrtrk_tab_up_cck_c[%d] = %d\n", delta, pwrtrk_tab_up_c[delta], delta, pwrtrk_tab_up_cck_c[delta]); + cali_info->absolute_ofdm_swing_idx[p] = pwrtrk_tab_up_c[delta]; + cali_info->absolute_cck_swing_idx[p] = pwrtrk_tab_up_cck_c[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_C] = %d pRF->absolute_cck_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); break; case RF_PATH_D: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tup_d[%d] = %d delta_swing_table_idx_tup_cck_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta], delta, delta_swing_table_idx_tup_cck_d[delta]); - cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta]; - cali_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_d[delta]; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_D] = %d pRF->absolute_cck_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_up_d[%d] = %d pwrtrk_tab_up_cck_d[%d] = %d\n", delta, pwrtrk_tab_up_d[delta], delta, pwrtrk_tab_up_cck_d[delta]); + cali_info->absolute_ofdm_swing_idx[p] = pwrtrk_tab_up_d[delta]; + cali_info->absolute_cck_swing_idx[p] = pwrtrk_tab_up_cck_d[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_D] = %d pRF->absolute_cck_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); break; default: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tup_a[%d] = %d delta_swing_table_idx_tup_cck_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta], delta, delta_swing_table_idx_tup_cck_a[delta]); - cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta]; - cali_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_a[delta]; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_A] = %d pRF->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_up_a[%d] = %d pwrtrk_tab_up_cck_a[%d] = %d\n", delta, pwrtrk_tab_up_a[delta], delta, pwrtrk_tab_up_cck_a[delta]); + cali_info->absolute_ofdm_swing_idx[p] = pwrtrk_tab_up_a[delta]; + cali_info->absolute_cck_swing_idx[p] = pwrtrk_tab_up_cck_a[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_A] = %d pRF->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); break; } } - } else { /* thermal is lower than base*/ + } else { /* thermal is lower than base*/ for (p = RF_PATH_A; p < c.rf_path_count; p++) { switch (p) { case RF_PATH_B: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tdown_b[%d] = %d delta_swing_table_idx_tdown_cck_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta], delta, delta_swing_table_idx_tdown_cck_b[delta]); - cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta]; - cali_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_b[delta]; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_B] = %d pRF->absolute_cck_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_down_b[%d] = %d pwrtrk_tab_down_cck_b[%d] = %d\n", delta, pwrtrk_tab_down_b[delta], delta, pwrtrk_tab_down_cck_b[delta]); + cali_info->absolute_ofdm_swing_idx[p] = -1 * pwrtrk_tab_down_b[delta]; + cali_info->absolute_cck_swing_idx[p] = -1 * pwrtrk_tab_down_cck_b[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_B] = %d pRF->absolute_cck_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); break; case RF_PATH_C: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tdown_c[%d] = %d delta_swing_table_idx_tdown_cck_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta], delta, delta_swing_table_idx_tdown_cck_c[delta]); - cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta]; - cali_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_c[delta]; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_C] = %d pRF->absolute_cck_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_down_c[%d] = %d pwrtrk_tab_down_cck_c[%d] = %d\n", delta, pwrtrk_tab_down_c[delta], delta, pwrtrk_tab_down_cck_c[delta]); + cali_info->absolute_ofdm_swing_idx[p] = -1 * pwrtrk_tab_down_c[delta]; + cali_info->absolute_cck_swing_idx[p] = -1 * pwrtrk_tab_down_cck_c[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_C] = %d pRF->absolute_cck_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); break; case RF_PATH_D: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tdown_d[%d] = %d delta_swing_table_idx_tdown_cck_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta], delta, delta_swing_table_idx_tdown_cck_d[delta]); - cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta]; - cali_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_d[delta]; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_D] = %d pRF->absolute_cck_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_down_d[%d] = %d pwrtrk_tab_down_cck_d[%d] = %d\n", delta, pwrtrk_tab_down_d[delta], delta, pwrtrk_tab_down_cck_d[delta]); + cali_info->absolute_ofdm_swing_idx[p] = -1 * pwrtrk_tab_down_d[delta]; + cali_info->absolute_cck_swing_idx[p] = -1 * pwrtrk_tab_down_cck_d[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_D] = %d pRF->absolute_cck_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); break; default: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tdown_a[%d] = %d delta_swing_table_idx_tdown_cck_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta], delta, delta_swing_table_idx_tdown_cck_a[delta]); - cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta]; - cali_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_a[delta]; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_A] = %d pRF->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_down_a[%d] = %d pwrtrk_tab_down_cck_a[%d] = %d\n", delta, pwrtrk_tab_down_a[delta], delta, pwrtrk_tab_down_cck_a[delta]); + cali_info->absolute_ofdm_swing_idx[p] = -1 * pwrtrk_tab_down_a[delta]; + cali_info->absolute_cck_swing_idx[p] = -1 * pwrtrk_tab_down_cck_a[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_A] = %d pRF->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); break; } } } if (is_increase) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, ">>> increse power --->\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> increse power --->\n"); if (GET_CHIP_VER(priv) == VERSION_8197F) { for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0); + //} else if (GET_CHIP_VER(priv) == VERSION_8192F) { + // for (p = RF_PATH_A; p < c.rf_path_count; p++) + // (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); } else if (GET_CHIP_VER(priv) == VERSION_8822B) { for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); } else if (GET_CHIP_VER(priv) == VERSION_8821C) { for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); + } else if (GET_CHIP_VER(priv) == VERSION_8198F) { + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); } } else { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, ">>> decrese power --->\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> decrese power --->\n"); if (GET_CHIP_VER(priv) == VERSION_8197F) { for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0); + //} else if (GET_CHIP_VER(priv) == VERSION_8192F) { + // for (p = RF_PATH_A; p < c.rf_path_count; p++) + // (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); } else if (GET_CHIP_VER(priv) == VERSION_8822B) { for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); } else if (GET_CHIP_VER(priv) == VERSION_8821C) { for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); + } else if (GET_CHIP_VER(priv) == VERSION_8198F) { + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); } } } #endif - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "\n******** END:%s() ********\n\n", __func__); + if (GET_CHIP_VER(priv) != VERSION_8198F) { + if ((delta_IQK >= c.threshold_iqk) && (!iqk_info->rfk_forbidden)) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); + dm->rf_calibrate_info.thermal_value_iqk = thermal_value; + if (!(dm->support_ic_type & ODM_RTL8197F)) { + if (c.do_iqk) + (*c.do_iqk)(dm, false, thermal_value, 0); + } + } + } + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** END:%s() ********\n\n", __func__); /*update thermal meter value*/ dm->rf_calibrate_info.thermal_value = thermal_value; @@ -597,7 +909,7 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2( (u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d); thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"\nReadback Thermal Meter = 0x%x, pre thermal meter 0x%x, EEPROMthermalmeter 0x%x\n", thermal_value, dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"\nReadback Thermal Meter = 0x%x, pre thermal meter 0x%x, EEPROMthermalmeter 0x%x\n", thermal_value, dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther); /* Initialize */ if (!dm->rf_calibrate_info.thermal_value) @@ -614,16 +926,16 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2( /* 4 Query OFDM BB swing default setting Bit[31:21] */ for (p = RF_PATH_A ; p < c.rf_path_count ; p++) { ele_D = odm_get_bb_reg(dm, bb_swing_reg[p], 0xffe00000); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[p], odm_get_bb_reg(dm, bb_swing_reg[p], MASKDWORD), ele_D); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[p], odm_get_bb_reg(dm, bb_swing_reg[p], MASKDWORD), ele_D); for (bb_swing_idx = 0; bb_swing_idx < TXSCALE_TABLE_SIZE; bb_swing_idx++) {/* 4 */ if (ele_D == tx_scaling_table_jaguar[bb_swing_idx]) { dm->rf_calibrate_info.OFDM_index[p] = (u8)bb_swing_idx; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"OFDM_index[%d]=%d\n", p, dm->rf_calibrate_info.OFDM_index[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"OFDM_index[%d]=%d\n", p, dm->rf_calibrate_info.OFDM_index[p]); break; } } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "kfree_offset[%d]=%d\n", p, cali_info->kfree_offset[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "kfree_offset[%d]=%d\n", p, cali_info->kfree_offset[p]); } @@ -642,7 +954,7 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2( if (thermal_value_avg_count) { /* Calculate Average thermal_value after average enough times */ thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"AVG Thermal Meter = 0x%X, EEPROMthermalmeter = 0x%X\n", thermal_value, priv->pmib->dot11RFEntry.ther); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"AVG Thermal Meter = 0x%X, EEPROMthermalmeter = 0x%X\n", thermal_value, priv->pmib->dot11RFEntry.ther); } /* 4 Calculate delta, delta_LCK, delta_IQK. */ @@ -654,7 +966,7 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2( /* 4 if necessary, do LCK. */ if (!(dm->support_ic_type & ODM_RTL8821)) { if ((delta_LCK > c.threshold_iqk) && (!iqk_info->rfk_forbidden)) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); dm->rf_calibrate_info.thermal_value_lck = thermal_value; /*Use RTLCK, so close power tracking driver LCK*/ @@ -669,7 +981,7 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2( if ((delta_IQK > c.threshold_iqk) && (!iqk_info->rfk_forbidden)) { panic_printk("%s(%d)\n", __FUNCTION__, __LINE__); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); dm->rf_calibrate_info.thermal_value_iqk = thermal_value; if (c.do_iqk) (*c.do_iqk)(dm, true, 0, 0); @@ -681,12 +993,12 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2( /* 4 Do Power Tracking */ if (is_tssi_enable == true) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter PURE TSSI MODE**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter PURE TSSI MODE**********\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, TSSI_MODE, p, 0); } else if (thermal_value != dm->rf_calibrate_info.thermal_value) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"\n******** START POWER TRACKING ********\n"); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"\n******** START POWER TRACKING ********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther); #ifdef _TRACKING_TABLE_FILE if (priv->pshare->rf_ft_var.pwr_track_file) { @@ -694,27 +1006,27 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2( for (p = RF_PATH_A; p < c.rf_path_count; p++) { switch (p) { case RF_PATH_B: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]); cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta]; /* Record delta swing for mix mode power tracking */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; case RF_PATH_C: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]); cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta]; /* Record delta swing for mix mode power tracking */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; case RF_PATH_D: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]); cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta]; /* Record delta swing for mix mode power tracking */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; default: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]); cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta]; /* Record delta swing for mix mode power tracking */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; } } @@ -722,45 +1034,45 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2( for (p = RF_PATH_A; p < c.rf_path_count; p++) { switch (p) { case RF_PATH_B: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]); cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta]; /* Record delta swing for mix mode power tracking */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; case RF_PATH_C: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]); cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta]; /* Record delta swing for mix mode power tracking */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; case RF_PATH_D: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]); cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta]; /* Record delta swing for mix mode power tracking */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; default: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]); cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta]; /* Record delta swing for mix mode power tracking */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; } } } if (is_increase) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, ">>> increse power --->\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> increse power --->\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); } else { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, ">>> decrese power --->\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> decrese power --->\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); } } #endif - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "\n******** END:%s() ********\n", __FUNCTION__); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** END:%s() ********\n", __FUNCTION__); /* update thermal meter value */ dm->rf_calibrate_info.thermal_value = thermal_value; @@ -811,17 +1123,17 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series( thermal_value = (unsigned char)phy_query_rf_reg(priv, RF_PATH_A, 0x42, 0xfc00, 1); /* 0x42: RF Reg[15:10] 88E */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther); /* 4 Query OFDM BB swing default setting Bit[31:21] */ for (rf_path = 0 ; rf_path < max_rf_path ; rf_path++) { ele_D = phy_query_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], MASKDWORD), ele_D); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], MASKDWORD), ele_D); for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {/* 4 */ if (ele_D == ofdm_swing_table_8812[i]) { OFDM_index[rf_path] = (unsigned char)i; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "OFDM_index[%d]=%d\n", rf_path, OFDM_index[rf_path]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "OFDM_index[%d]=%d\n", rf_path, OFDM_index[rf_path]); break; } } @@ -829,22 +1141,22 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series( #if 0 /* Query OFDM path A default setting Bit[31:21] */ ele_D = phy_query_bb_reg(priv, 0xc1c, 0xffe00000); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "0xc1c:0x%x ([31:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xc1c, MASKDWORD), ele_D); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0xc1c:0x%x ([31:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xc1c, MASKDWORD), ele_D); for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {/* 4 */ if (ele_D == ofdm_swing_table_8812[i]) { OFDM_index[0] = (unsigned char)i; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "OFDM_index[0]=%d\n", OFDM_index[0]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "OFDM_index[0]=%d\n", OFDM_index[0]); break; } } /* Query OFDM path B default setting */ if (rf == 2) { ele_D = phy_query_bb_reg(priv, 0xe1c, 0xffe00000); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "0xe1c:0x%x ([32:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xe1c, MASKDWORD), ele_D); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0xe1c:0x%x ([32:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xe1c, MASKDWORD), ele_D); for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) { if (ele_D == ofdm_swing_table_8812[i]) { OFDM_index[1] = (unsigned char)i; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "OFDM_index[1]=%d\n", OFDM_index[1]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "OFDM_index[1]=%d\n", OFDM_index[1]); break; } } @@ -883,8 +1195,8 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series( return; if (thermal_value != priv->pshare->thermal_value) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "\n******** START POWER TRACKING ********\n"); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** START POWER TRACKING ********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther); delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther); delta_LCK = RTL_ABS(thermal_value, priv->pshare->thermal_value_lck); is_decrease = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 1 : 0); @@ -893,11 +1205,11 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series( #ifdef _TRACKING_TABLE_FILE if (priv->pshare->rf_ft_var.pwr_track_file) { for (rf_path = 0; rf_path < max_rf_path; rf_path++) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)); if (is_decrease) { OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] + get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0); OFDM_index[rf_path] = ((OFDM_index[rf_path] > (OFDM_TABLE_SIZE_8812 - 1)) ? (OFDM_TABLE_SIZE_8812 - 1) : OFDM_index[rf_path]); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, ">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)); #if 0/* RTL8881A_SUPPORT */ if (dm->support_ic_type == ODM_RTL8881A) { if (priv->pshare->rf_ft_var.pwrtrk_tx_agc_enable) { @@ -932,7 +1244,7 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series( #else OFDM_index[rf_path] = ((OFDM_index[rf_path] < OFDM_min_index) ? OFDM_min_index : OFDM_index[rf_path]); #endif - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, ">>> increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)); } } } @@ -940,7 +1252,7 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series( /* 4 Set new BB swing index */ for (rf_path = 0; rf_path < max_rf_path; rf_path++) { phy_set_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000, ofdm_swing_table_8812[(unsigned int)OFDM_index[rf_path]]); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "Readback 0x%x[31:21] = 0x%x, OFDM_index:%d\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000), OFDM_index[rf_path]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Readback 0x%x[31:21] = 0x%x, OFDM_index:%d\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000), OFDM_index[rf_path]); } } @@ -959,7 +1271,7 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series( RTL_W8(0x522, 0x0); priv->pshare->thermal_value_lck = thermal_value; } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "\n******** END:%s() ********\n", __FUNCTION__); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** END:%s() ********\n", __FUNCTION__); /* update thermal meter value */ priv->pshare->thermal_value = thermal_value; @@ -980,9 +1292,15 @@ odm_txpowertracking_callback_thermal_meter( struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); struct dm_iqk_info *iqk_info = &dm->IQK_info; -#if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) - if (dm->support_ic_type == ODM_RTL8197F || dm->support_ic_type == ODM_RTL8822B - || dm->support_ic_type == ODM_RTL8821C) { + +#if (RTL8814B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8814B) { + odm_txpowertracking_callback_thermal_meter_jaguar_series4(dm); + } +#endif +#if (RTL8197F_SUPPORT == 1 ||RTL8192F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8197F || dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8822B + || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8198F) { odm_txpowertracking_callback_thermal_meter_jaguar_series3(dm); return; } @@ -1064,7 +1382,7 @@ odm_txpowertracking_callback_thermal_meter( return; } #endif - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "===>odm_txpowertracking_callback_thermal_meter_8188e, dm->bb_swing_idx_cck_base: %d, dm->bb_swing_idx_ofdm_base: %d\n", cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "===>odm_txpowertracking_callback_thermal_meter_8188e, dm->bb_swing_idx_cck_base: %d, dm->bb_swing_idx_ofdm_base: %d\n", cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base); /* if (!dm->rf_calibrate_info.tm_trigger) { odm_set_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, BIT(17) | BIT(16), 0x3); @@ -1088,7 +1406,7 @@ odm_txpowertracking_callback_thermal_meter( } if (dm->rf_calibrate_info.is_reloadtxpowerindex) - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "reload ofdm index for band switch\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "reload ofdm index for band switch\n"); /* 4 4. Calculate average thermal meter */ @@ -1110,7 +1428,7 @@ odm_txpowertracking_callback_thermal_meter( thermal_value = (u8)(thermal_value_avg / (thermal_value_avg_count + 4)); cali_info->thermal_value_delta = thermal_value - priv->pmib->dot11RFEntry.ther; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "AVG Thermal Meter = 0x%x\n", thermal_value); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "AVG Thermal Meter = 0x%x\n", thermal_value); } /* 4 5. Calculate delta, delta_LCK, delta_IQK. */ @@ -1161,8 +1479,8 @@ odm_txpowertracking_callback_thermal_meter( cali_info->bb_swing_idx_cck = dm->rf_calibrate_info.CCK_index; cali_info->bb_swing_idx_ofdm[RF_PATH_A] = dm->rf_calibrate_info.OFDM_index[RF_PATH_A]; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, dm->rf_calibrate_info.power_index_offset); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "The 'OFDM' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[RF_PATH_A], cali_info->bb_swing_idx_ofdm_base, dm->rf_calibrate_info.power_index_offset); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, dm->rf_calibrate_info.power_index_offset); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "The 'OFDM' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[RF_PATH_A], cali_info->bb_swing_idx_ofdm_base, dm->rf_calibrate_info.power_index_offset); /* 4 7.1 Handle boundary conditions of index. */ @@ -1179,12 +1497,12 @@ odm_txpowertracking_callback_thermal_meter( else if (dm->rf_calibrate_info.CCK_index < 0) dm->rf_calibrate_info.CCK_index = 0; } else { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"The thermal meter is unchanged or TxPowerTracking OFF: thermal_value: %d, dm->rf_calibrate_info.thermal_value: %d)\n", thermal_value, dm->rf_calibrate_info.thermal_value); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"The thermal meter is unchanged or TxPowerTracking OFF: thermal_value: %d, dm->rf_calibrate_info.thermal_value: %d)\n", thermal_value, dm->rf_calibrate_info.thermal_value); dm->rf_calibrate_info.power_index_offset = 0; } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", dm->rf_calibrate_info.CCK_index, cali_info->bb_swing_idx_cck_base); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", dm->rf_calibrate_info.CCK_index, cali_info->bb_swing_idx_cck_base); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,"TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index: %d\n", dm->rf_calibrate_info.OFDM_index[RF_PATH_A], cali_info->bb_swing_idx_ofdm_base); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index: %d\n", dm->rf_calibrate_info.OFDM_index[RF_PATH_A], cali_info->bb_swing_idx_ofdm_base); if (dm->rf_calibrate_info.power_index_offset != 0 && dm->rf_calibrate_info.txpowertrack_control) { /* 4 7.2 Configure the Swing Table to adjust Tx Power. */ @@ -1196,20 +1514,20 @@ odm_txpowertracking_callback_thermal_meter( /* */ /* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */ if (thermal_value > dm->rf_calibrate_info.thermal_value) { - /* PHYDM_DBG(dm,ODM_COMP_TX_PWR_TRACK, */ + /* RF_DBG(dm,DBG_RF_TX_PWR_TRACK, */ /* "Temperature Increasing: delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", */ /* dm->rf_calibrate_info.power_index_offset, delta, thermal_value, hal_data->eeprom_thermal_meter, dm->rf_calibrate_info.thermal_value); */ } else if (thermal_value < dm->rf_calibrate_info.thermal_value) { /* Low temperature */ - /* PHYDM_DBG(dm,ODM_COMP_TX_PWR_TRACK, */ + /* RF_DBG(dm,DBG_RF_TX_PWR_TRACK, */ /* "Temperature Decreasing: delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", */ /* dm->rf_calibrate_info.power_index_offset, delta, thermal_value, hal_data->eeprom_thermal_meter, dm->rf_calibrate_info.thermal_value); */ } if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) { - /* PHYDM_DBG(dm,ODM_COMP_TX_PWR_TRACK,"Temperature(%d) hugher than PG value(%d), increases the power by tx_agc\n", thermal_value, hal_data->eeprom_thermal_meter); */ + /* RF_DBG(dm,DBG_RF_TX_PWR_TRACK,"Temperature(%d) hugher than PG value(%d), increases the power by tx_agc\n", thermal_value, hal_data->eeprom_thermal_meter); */ (*c.odm_tx_pwr_track_set_pwr)(dm, TXAGC, 0, 0); } else { - /* PHYDM_DBG(dm,ODM_COMP_TX_PWR_TRACK,"Temperature(%d) lower than PG value(%d), increases the power by tx_agc\n", thermal_value, hal_data->eeprom_thermal_meter); */ + /* RF_DBG(dm,DBG_RF_TX_PWR_TRACK,"Temperature(%d) lower than PG value(%d), increases the power by tx_agc\n", thermal_value, hal_data->eeprom_thermal_meter); */ (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, RF_PATH_A, indexforchannel); if (is2T) (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, RF_PATH_B, indexforchannel); @@ -1221,7 +1539,7 @@ odm_txpowertracking_callback_thermal_meter( } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n"); dm->rf_calibrate_info.tx_powercount = 0; } @@ -1297,8 +1615,9 @@ void phydm_rf_init(void *dm_void) void phydm_rf_watchdog(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + odm_txpowertracking_check(dm); +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) if (dm->support_ic_type & ODM_IC_11AC_SERIES) odm_iq_calibrate(dm); #endif diff --git a/hal/phydm/halrf/halphyrf_ap.h b/hal/phydm/halrf/halphyrf_ap.h index 6c6d629..0558567 100644 --- a/hal/phydm/halrf/halphyrf_ap.h +++ b/hal/phydm/halrf/halphyrf_ap.h @@ -13,8 +13,8 @@ * *****************************************************************************/ -#ifndef __HAL_PHY_RF_H__ -#define __HAL_PHY_RF_H__ +#ifndef __HALPHYRF_H__ +#define __HALPHYRF_H__ #include "halrf/halrf_powertracking_ap.h" #include "halrf/halrf_kfree.h" @@ -31,11 +31,37 @@ #include "halrf/rtl8821c/halrf_iqk_8821c.h" #endif +#if (RTL8195B_SUPPORT == 1) +// #include "halrf/rtl8195b/halrf.h" + #include "halrf/rtl8195b/halrf_iqk_8195b.h" + #include "halrf/rtl8195b/halrf_txgapk_8195b.h" + #include "halrf/rtl8195b/halrf_dpk_8195b.h" +#endif + +#if (RTL8198F_SUPPORT == 1) + #include "halrf/rtl8198f/halrf_iqk_8198f.h" + #include "halrf/rtl8198f/halrf_dpk_8198f.h" +#endif + +#if (RTL8812F_SUPPORT == 1) + #include "halrf/rtl8812f/halrf_iqk_8812f.h" + #include "halrf/rtl8812f/halrf_dpk_8812f.h" + #include "halrf/rtl8812f/halrf_tssi_8812f.h" +#endif + +#if (RTL8814B_SUPPORT == 1) + #include "halrf/rtl8814b/halrf_iqk_8814b.h" + #include "halrf/rtl8814b/halrf_dpk_8814b.h" +#endif + enum pwrtrack_method { BBSWING, TXAGC, MIX_MODE, - TSSI_MODE + TSSI_MODE, + MIX_2G_TSSI_5G_MODE, + MIX_5G_TSSI_2G_MODE, + CLEAN_MODE }; typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8); @@ -45,7 +71,7 @@ typedef void (*func_lck)(void *); typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **); typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **); typedef void (*func_all_swing)(void *, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **); - +typedef void (*func_all_swing_ex)(void *, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **); struct txpwrtrack_cfg { u8 swing_table_size_cck; @@ -60,9 +86,15 @@ struct txpwrtrack_cfg { func_lck phy_lc_calibrate; func_swing get_delta_swing_table; func_swing8814only get_delta_swing_table8814only; - func_all_swing get_delta_all_swing_table; + func_all_swing get_delta_all_swing_table; + func_all_swing_ex get_delta_all_swing_table_ex; }; +void +odm_clear_txpowertracking_state( + void *dm_void +); + void configure_txpower_track( void *dm_void, @@ -94,12 +126,19 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series( void *dm_void ); -#elif (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1) +#elif (RTL8197F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\ + RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1) void odm_txpowertracking_callback_thermal_meter_jaguar_series3( void *dm_void ); +#elif (RTL8814B_SUPPORT == 1) +void +odm_txpowertracking_callback_thermal_meter_jaguar_series4( + void *dm_void +); + #endif #define IS_CCK_RATE(_rate) (ODM_MGN_1M == _rate || _rate == ODM_MGN_2M || _rate == ODM_MGN_5_5M || _rate == ODM_MGN_11M) @@ -119,4 +158,4 @@ odm_get_right_chnl_place_for_iqk( void phydm_rf_init(void *dm_void); void phydm_rf_watchdog(void *dm_void); -#endif /* #ifndef __HAL_PHY_RF_H__ */ +#endif /*#ifndef __HALPHYRF_H__*/ diff --git a/hal/phydm/halrf/halphyrf_ce.c b/hal/phydm/halrf/halphyrf_ce.c index 847a685..6290c43 100644 --- a/hal/phydm/halrf/halphyrf_ce.c +++ b/hal/phydm/halrf/halphyrf_ce.c @@ -26,25 +26,25 @@ #include "mp_precomp.h" #include "phydm_precomp.h" -#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal) \ - do {\ - for (_offset = 0; _offset < _size; _offset++) { \ - if (_delta_thermal < thermal_threshold[_direction][_offset]) { \ - if (_offset != 0)\ - _offset--;\ - break;\ - } \ - } \ - if (_offset >= _size)\ - _offset = _size-1;\ +#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal)\ + do { \ + u32 __offset = (u32)_offset; \ + u32 __size = (u32)_size; \ + for (__offset = 0; __offset < __size; __offset++) { \ + if (_delta_thermal < \ + thermal_threshold[_direction][__offset]) { \ + if (__offset != 0) \ + __offset--; \ + break; \ + } \ + } \ + if (__offset >= __size) \ + __offset = __size - 1; \ } while (0) -void configure_txpower_track( - void *dm_void, - struct txpwrtrack_cfg *config -) +void configure_txpower_track(void *dm_void, struct txpwrtrack_cfg *config) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if RTL8192E_SUPPORT if (dm->support_ic_type == ODM_RTL8192E) @@ -86,12 +86,11 @@ void configure_txpower_track( if (dm->support_ic_type == ODM_RTL8723D) configure_txpower_track_8723d(config); #endif -/* JJ ADD 20161014 */ +/*@ JJ ADD 20161014 */ #if RTL8710B_SUPPORT if (dm->support_ic_type == ODM_RTL8710B) configure_txpower_track_8710b(config); #endif - #if RTL8822B_SUPPORT if (dm->support_ic_type == ODM_RTL8822B) configure_txpower_track_8822b(config); @@ -101,37 +100,41 @@ void configure_txpower_track( configure_txpower_track_8821c(config); #endif +#if RTL8192F_SUPPORT + if (dm->support_ic_type == ODM_RTL8192F) + configure_txpower_track_8192f(config); +#endif + +#if RTL8822C_SUPPORT + if (dm->support_ic_type == ODM_RTL8822C) + configure_txpower_track_8822c(config); +#endif + } -/* ********************************************************************** +/*@ ********************************************************************** * <20121113, Kordan> This function should be called when tx_agc changed. * Otherwise the previous compensation is gone, because we record the * delta of temperature between two TxPowerTracking watch dogs. * * NOTE: If Tx BB swing or Tx scaling is varified during run-time, still * need to call this function. - * ********************************************************************** */ -void -odm_clear_txpowertracking_state( - void *dm_void -) + * ********************************************************************** + */ +void odm_clear_txpowertracking_state(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; - struct rtl_efuse *rtlefu = rtl_efuse(rtlpriv); -#else - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(dm->adapter); -#endif - u8 p = 0; - struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + u8 p = 0; + struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index; cali_info->bb_swing_idx_cck = cali_info->default_cck_index; dm->rf_calibrate_info.CCK_index = 0; for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) { - cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index; + cali_info->bb_swing_idx_ofdm_base[p] + = cali_info->default_ofdm_index; cali_info->bb_swing_idx_ofdm[p] = cali_info->default_ofdm_index; cali_info->OFDM_index[p] = cali_info->default_ofdm_index; @@ -139,135 +142,314 @@ odm_clear_txpowertracking_state( cali_info->delta_power_index[p] = 0; cali_info->delta_power_index_last[p] = 0; - cali_info->absolute_ofdm_swing_idx[p] = 0; /* Initial Mix mode power tracking*/ + /* Initial Mix mode power tracking*/ + cali_info->absolute_ofdm_swing_idx[p] = 0; cali_info->remnant_ofdm_swing_idx[p] = 0; cali_info->kfree_offset[p] = 0; } - - cali_info->modify_tx_agc_flag_path_a = false; /*Initial at Modify Tx Scaling mode*/ - cali_info->modify_tx_agc_flag_path_b = false; /*Initial at Modify Tx Scaling mode*/ - cali_info->modify_tx_agc_flag_path_c = false; /*Initial at Modify Tx Scaling mode*/ - cali_info->modify_tx_agc_flag_path_d = false; /*Initial at Modify Tx Scaling mode*/ + /* Initial Mix mode power tracking*/ + cali_info->modify_tx_agc_flag_path_a = false; + cali_info->modify_tx_agc_flag_path_b = false; + cali_info->modify_tx_agc_flag_path_c = false; + cali_info->modify_tx_agc_flag_path_d = false; cali_info->remnant_cck_swing_idx = 0; -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - cali_info->thermal_value = rtlefu->eeprom_thermalmeter; -#else - cali_info->thermal_value = hal_data->eeprom_thermal_meter; -#endif - - cali_info->modify_tx_agc_value_cck = 0; /* modify by Mingzhi.Guo */ - cali_info->modify_tx_agc_value_ofdm = 0; /* modify by Mingzhi.Guo */ - + cali_info->thermal_value = rf->eeprom_thermal; + cali_info->modify_tx_agc_value_cck = 0; + cali_info->modify_tx_agc_value_ofdm = 0; } -void -odm_txpowertracking_callback_thermal_meter( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - struct dm_struct *dm -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - void *dm_void -#else - void *adapter -#endif -) +void odm_get_tracking_table(void *dm_void, u8 thermal_value, u8 delta) { -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; - struct rtl_efuse *rtlefu = rtl_efuse(rtlpriv); - void *adapter = dm->adapter; -#elif !(DM_ODM_SUPPORT_TYPE & ODM_AP) -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - struct dm_struct *dm = (struct dm_struct *)dm_void; - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -#endif -#endif + struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + struct _hal_rf_ *rf = &dm->rf_table; + struct txpwrtrack_cfg c = {0}; - struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); - struct dm_iqk_info *iqk_info = &dm->IQK_info; - - u8 thermal_value = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0; - s8 diff_DPK[4] = {0}; - u8 thermal_value_avg_count = 0; - u32 thermal_value_avg = 0, regc80, regcd0, regcd4, regab4; - - u8 OFDM_min_index = 0; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */ - u8 indexforchannel = 0; /* get_right_chnl_place_for_iqk(hal_data->current_channel) */ -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - u8 power_tracking_type = 0; /* no specify type */ -#else - u8 power_tracking_type = hal_data->rf_power_tracking_type; -#endif - u8 xtal_offset_eanble = 0; - s8 thermal_value_temp = 0; - - struct txpwrtrack_cfg c = {0}; - - /* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */ - u8 *delta_swing_table_idx_tup_a = NULL; - u8 *delta_swing_table_idx_tdown_a = NULL; - u8 *delta_swing_table_idx_tup_b = NULL; - u8 *delta_swing_table_idx_tdown_b = NULL; + u8 p; + /* 4 1. TWO tables decide the final index of OFDM/CCK swing table. */ + u8 *pwrtrk_tab_up_a = NULL; + u8 *pwrtrk_tab_down_a = NULL; + u8 *pwrtrk_tab_up_b = NULL; + u8 *pwrtrk_tab_down_b = NULL; /*for 8814 add by Yu Chen*/ - u8 *delta_swing_table_idx_tup_c = NULL; - u8 *delta_swing_table_idx_tdown_c = NULL; - u8 *delta_swing_table_idx_tup_d = NULL; - u8 *delta_swing_table_idx_tdown_d = NULL; + u8 *pwrtrk_tab_up_c = NULL; + u8 *pwrtrk_tab_down_c = NULL; + u8 *pwrtrk_tab_up_d = NULL; + u8 *pwrtrk_tab_down_d = NULL; /*for Xtal Offset by James.Tung*/ - s8 *delta_swing_table_xtal_up = NULL; - s8 *delta_swing_table_xtal_down = NULL; - - /* 4 2. Initilization ( 7 steps in total ) */ + s8 *xtal_tab_up = NULL; + s8 *xtal_tab_down = NULL; configure_txpower_track(dm, &c); - (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a, - (u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b); + (*c.get_delta_swing_table)(dm, + (u8 **)&pwrtrk_tab_up_a, + (u8 **)&pwrtrk_tab_down_a, + (u8 **)&pwrtrk_tab_up_b, + (u8 **)&pwrtrk_tab_down_b); - if (dm->support_ic_type & ODM_RTL8814A) /*for 8814 path C & D*/ - (*c.get_delta_swing_table8814only)(dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c, - (u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d); - /* JJ ADD 20161014 */ - if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) /*for Xtal Offset*/ - (*c.get_delta_swing_xtal_table)(dm, (s8 **)&delta_swing_table_xtal_up, (s8 **)&delta_swing_table_xtal_down); + if (dm->support_ic_type & ODM_RTL8814A) /*for 8814 path C & D*/ + (*c.get_delta_swing_table8814only)(dm, + (u8 **)&pwrtrk_tab_up_c, + (u8 **)&pwrtrk_tab_down_c, + (u8 **)&pwrtrk_tab_up_d, + (u8 **)&pwrtrk_tab_down_d); + /*for Xtal Offset*/ + if (dm->support_ic_type & + (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | ODM_RTL8192F)) + (*c.get_delta_swing_xtal_table)(dm, + (s8 **)&xtal_tab_up, + (s8 **)&xtal_tab_down); - cali_info->txpowertracking_callback_cnt++; /*cosa add for debug*/ + if (thermal_value > rf->eeprom_thermal) { + for (p = RF_PATH_A; p < c.rf_path_count; p++) { + /*recording power index offset*/ + cali_info->delta_power_index_last[p] = + cali_info->delta_power_index[p]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is higher******\n"); + switch (p) { + case RF_PATH_B: + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "pwrtrk_tab_up_b[%d] = %d\n", delta, + pwrtrk_tab_up_b[delta]); + + cali_info->delta_power_index[p] = + pwrtrk_tab_up_b[delta]; + cali_info->absolute_ofdm_swing_idx[p] = + pwrtrk_tab_up_b[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "absolute_ofdm_swing_idx[PATH_B] = %d\n", + cali_info->absolute_ofdm_swing_idx[p]); + break; + + case RF_PATH_C: + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "pwrtrk_tab_up_c[%d] = %d\n", delta, + pwrtrk_tab_up_c[delta]); + + cali_info->delta_power_index[p] = + pwrtrk_tab_up_c[delta]; + cali_info->absolute_ofdm_swing_idx[p] = + pwrtrk_tab_up_c[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "absolute_ofdm_swing_idx[PATH_C] = %d\n", + cali_info->absolute_ofdm_swing_idx[p]); + break; + + case RF_PATH_D: + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "pwrtrk_tab_up_d[%d] = %d\n", delta, + pwrtrk_tab_up_d[delta]); + + cali_info->delta_power_index[p] = + pwrtrk_tab_up_d[delta]; + cali_info->absolute_ofdm_swing_idx[p] = + pwrtrk_tab_up_d[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "absolute_ofdm_swing_idx[PATH_D] = %d\n", + cali_info->absolute_ofdm_swing_idx[p]); + break; + + default: + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "pwrtrk_tab_up_a[%d] = %d\n", delta, + pwrtrk_tab_up_a[delta]); + + cali_info->delta_power_index[p] = + pwrtrk_tab_up_a[delta]; + cali_info->absolute_ofdm_swing_idx[p] = + pwrtrk_tab_up_a[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "absolute_ofdm_swing_idx[PATH_A] = %d\n", + cali_info->absolute_ofdm_swing_idx[p]); + break; + } + } + /* @JJ ADD 20161014 */ + /*Save xtal_offset from Xtal table*/ + if (dm->support_ic_type & + (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | + ODM_RTL8192F)) { + /*recording last Xtal offset*/ + cali_info->xtal_offset_last = cali_info->xtal_offset; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "[Xtal] xtal_tab_up[%d] = %d\n", + delta, xtal_tab_up[delta]); + cali_info->xtal_offset = xtal_tab_up[delta]; + if (cali_info->xtal_offset_last != xtal_tab_up[delta]) + cali_info->xtal_offset_eanble = 1; + } + } else { + for (p = RF_PATH_A; p < c.rf_path_count; p++) { + /*recording power index offset*/ + cali_info->delta_power_index_last[p] = + cali_info->delta_power_index[p]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is lower******\n"); + switch (p) { + case RF_PATH_B: + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "pwrtrk_tab_down_b[%d] = %d\n", delta, + pwrtrk_tab_down_b[delta]); + cali_info->delta_power_index[p] = + -1 * pwrtrk_tab_down_b[delta]; + cali_info->absolute_ofdm_swing_idx[p] = + -1 * pwrtrk_tab_down_b[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "absolute_ofdm_swing_idx[PATH_B] = %d\n", + cali_info->absolute_ofdm_swing_idx[p]); + break; + + case RF_PATH_C: + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "pwrtrk_tab_down_c[%d] = %d\n", delta, + pwrtrk_tab_down_c[delta]); + cali_info->delta_power_index[p] = + -1 * pwrtrk_tab_down_c[delta]; + cali_info->absolute_ofdm_swing_idx[p] = + -1 * pwrtrk_tab_down_c[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "absolute_ofdm_swing_idx[PATH_C] = %d\n", + cali_info->absolute_ofdm_swing_idx[p]); + break; + + case RF_PATH_D: + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "pwrtrk_tab_down_d[%d] = %d\n", delta, + pwrtrk_tab_down_d[delta]); + cali_info->delta_power_index[p] = + -1 * pwrtrk_tab_down_d[delta]; + cali_info->absolute_ofdm_swing_idx[p] = + -1 * pwrtrk_tab_down_d[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "absolute_ofdm_swing_idx[PATH_D] = %d\n", + cali_info->absolute_ofdm_swing_idx[p]); + break; + + default: + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "pwrtrk_tab_down_a[%d] = %d\n", delta, + pwrtrk_tab_down_a[delta]); + cali_info->delta_power_index[p] = + -1 * pwrtrk_tab_down_a[delta]; + cali_info->absolute_ofdm_swing_idx[p] = + -1 * pwrtrk_tab_down_a[delta]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "absolute_ofdm_swing_idx[PATH_A] = %d\n", + cali_info->absolute_ofdm_swing_idx[p]); + break; + } + } + /* @JJ ADD 20161014 */ + if (dm->support_ic_type & + (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | + ODM_RTL8192F)) { + /*recording last Xtal offset*/ + cali_info->xtal_offset_last = cali_info->xtal_offset; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "[Xtal] xtal_tab_down[%d] = %d\n", delta, + xtal_tab_down[delta]); + /*Save xtal_offset from Xtal table*/ + cali_info->xtal_offset = xtal_tab_down[delta]; + if (cali_info->xtal_offset_last != xtal_tab_down[delta]) + cali_info->xtal_offset_eanble = 1; + } + } +} + +void odm_pwrtrk_method(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 p, idxforchnl = 0; + + struct txpwrtrack_cfg c = {0}; + + configure_txpower_track(dm, &c); + + if (dm->support_ic_type & + (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8821 | ODM_RTL8812 | + ODM_RTL8723B | ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8188F | + ODM_RTL8822B | ODM_RTL8723D | ODM_RTL8821C | ODM_RTL8710B | + ODM_RTL8192F)) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "***Enter PwrTrk MIX_MODE***\n"); + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); + } else { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "***Enter PwrTrk BBSWING_MODE***\n"); + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr) + (dm, BBSWING, p, idxforchnl); + } +} + +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) +void odm_txpowertracking_callback_thermal_meter(struct dm_struct *dm) +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) +void odm_txpowertracking_callback_thermal_meter(void *dm_void) +#else +void odm_txpowertracking_callback_thermal_meter(void *adapter) +#endif +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + struct dm_struct *dm = (struct dm_struct *)dm_void; +#endif + + struct _hal_rf_ *rf = &dm->rf_table; + struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + + u8 thermal_value = 0, delta, delta_lck, delta_iqk, p = 0, i = 0; + u8 thermal_value_avg_count = 0; + u32 thermal_value_avg = 0, regc80, regcd0, regcd4, regab4; + + /* OFDM BB Swing should be less than +3.0dB, required by Arthur */ +#if 0 + u8 OFDM_min_index = 0; +#endif +#if 0 + /* get_right_chnl_place_for_iqk(hal_data->current_channel) */ +#endif + u8 power_tracking_type = rf->pwt_type; + s8 thermal_value_temp = 0; + + struct txpwrtrack_cfg c = {0}; + + /* @4 2. Initialization ( 7 steps in total ) */ + + configure_txpower_track(dm, &c); + + cali_info->txpowertracking_callback_cnt++; cali_info->is_txpowertracking_init = true; - /*cali_info->txpowertrack_control = hal_data->txpowertrack_control; - We should keep updating the control variable according to HalData. - rf_calibrate_info.rega24 will be initialized when ODM HW configuring, but MP configures with para files. */ -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -#if (MP_DRIVER == 1) - cali_info->rega24 = 0x090e1317; -#endif -#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) - if (*(dm->mp_mode) == true) - cali_info->rega24 = 0x090e1317; -#endif + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "\n\n\n===>%s bbsw_idx_cck_base=%d\n", + __func__, cali_info->bb_swing_idx_cck_base); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n", - cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], cali_info->default_ofdm_index); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "bbsw_idx_ofdm_base[A]=%d default_ofdm_idx=%d\n", + cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], + cali_info->default_ofdm_index); -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "cali_info->txpowertrack_control=%d, rtlefu->eeprom_thermalmeter %d\n", cali_info->txpowertrack_control, rtlefu->eeprom_thermalmeter); -#else - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "cali_info->txpowertrack_control=%d, hal_data->eeprom_thermal_meter %d\n", cali_info->txpowertrack_control, hal_data->eeprom_thermal_meter); -#endif + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "cali_info->txpowertrack_control=%d, rf->eeprom_thermal %d\n", + cali_info->txpowertrack_control, rf->eeprom_thermal); - thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ + /* 0x42: RF Reg[15:10] 88E */ + thermal_value = + (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "thermal_value_temp(%d) = thermal_value(%d) + power_trim_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(dm)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "thermal_value_temp(%d) = ther_value(%d) + pwr_trim_ther(%d)\n", + thermal_value_temp, thermal_value, + phydm_get_thermal_offset(dm)); if (thermal_value_temp > 63) thermal_value = 63; @@ -276,48 +458,42 @@ odm_txpowertracking_callback_thermal_meter( else thermal_value = thermal_value_temp; - /*add log by zhao he, check c80/c94/c14/ca0 value*/ - if (dm->support_ic_type == ODM_RTL8723D) { - regc80 = odm_get_bb_reg(dm, 0xc80, MASKDWORD); - regcd0 = odm_get_bb_reg(dm, 0xcd0, MASKDWORD); - regcd4 = odm_get_bb_reg(dm, 0xcd4, MASKDWORD); - regab4 = odm_get_bb_reg(dm, 0xab4, 0x000007FF); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4); - } - /* JJ ADD 20161014 */ - if (dm->support_ic_type == ODM_RTL8710B) { - regc80 = odm_get_bb_reg(dm, 0xc80, MASKDWORD); - regcd0 = odm_get_bb_reg(dm, 0xcd0, MASKDWORD); - regcd4 = odm_get_bb_reg(dm, 0xcd4, MASKDWORD); - regab4 = odm_get_bb_reg(dm, 0xab4, 0x000007FF); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4); + /*@add log by zhao he, check c80/c94/c14/ca0 value*/ + if (dm->support_ic_type & + (ODM_RTL8723D | ODM_RTL8710B)) { + regc80 = odm_get_bb_reg(dm, R_0xc80, MASKDWORD); + regcd0 = odm_get_bb_reg(dm, R_0xcd0, MASKDWORD); + regcd4 = odm_get_bb_reg(dm, R_0xcd4, MASKDWORD); + regab4 = odm_get_bb_reg(dm, R_0xab4, 0x000007FF); + RF_DBG(dm, DBG_RF_IQK, + "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", + regc80, regcd0, regcd4, regab4); } if (!cali_info->txpowertrack_control) return; -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - if (rtlefu->eeprom_thermalmeter == 0xff) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", rtlefu->eeprom_thermalmeter); + if (rf->eeprom_thermal == 0xff) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", + rf->eeprom_thermal); return; } -#else - if (hal_data->eeprom_thermal_meter == 0xff) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", hal_data->eeprom_thermal_meter); - return; - } -#endif - /*4 3. Initialize ThermalValues of rf_calibrate_info*/ + /*@4 3. Initialize ThermalValues of rf_calibrate_info*/ if (cali_info->is_reloadtxpowerindex) - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "reload ofdm index for band switch\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "reload ofdm index for band switch\n"); - /*4 4. Calculate average thermal meter*/ + /*@4 4. Calculate average thermal meter*/ + + cali_info->thermal_value_avg[cali_info->thermal_value_avg_index] + = thermal_value; - cali_info->thermal_value_avg[cali_info->thermal_value_avg_index] = thermal_value; cali_info->thermal_value_avg_index++; - if (cali_info->thermal_value_avg_index == c.average_thermal_num) /*Average times = c.average_thermal_num*/ + /*Average times = c.average_thermal_num*/ + if (cali_info->thermal_value_avg_index == c.average_thermal_num) cali_info->thermal_value_avg_index = 0; for (i = 0; i < c.average_thermal_num; i++) { @@ -327,212 +503,92 @@ odm_txpowertracking_callback_thermal_meter( } } - if (thermal_value_avg_count) { /* Calculate Average thermal_value after average enough times */ - thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count); -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - cali_info->thermal_value_delta = thermal_value - rtlefu->eeprom_thermalmeter; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, rtlefu->eeprom_thermalmeter); -#else - cali_info->thermal_value_delta = thermal_value - hal_data->eeprom_thermal_meter; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, hal_data->eeprom_thermal_meter); -#endif + /* Calculate Average thermal_value after average enough times */ + if (thermal_value_avg_count) { + thermal_value = + (u8)(thermal_value_avg / thermal_value_avg_count); + cali_info->thermal_value_delta + = thermal_value - rf->eeprom_thermal; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", + thermal_value, rf->eeprom_thermal); } - /* 4 5. Calculate delta, delta_LCK, delta_IQK. */ + /* @4 5. Calculate delta, delta_lck, delta_iqk. */ + /* "delta" here is used to determine thermal value changes or not. */ + if (thermal_value > cali_info->thermal_value) + delta = thermal_value - cali_info->thermal_value; + else + delta = cali_info->thermal_value - thermal_value; - /* "delta" here is used to determine whether thermal value changes or not. */ - delta = (thermal_value > cali_info->thermal_value) ? (thermal_value - cali_info->thermal_value) : (cali_info->thermal_value - thermal_value); - delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value); - delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value); + if (thermal_value > cali_info->thermal_value_lck) + delta_lck = thermal_value - cali_info->thermal_value_lck; + else + delta_lck = cali_info->thermal_value_lck - thermal_value; - if (cali_info->thermal_value_iqk == 0xff) { /*no PG, use thermal value for IQK*/ - cali_info->thermal_value_iqk = thermal_value; - delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no PG, use thermal_value for IQK\n"); - } + if (thermal_value > cali_info->thermal_value_iqk) + delta_iqk = thermal_value - cali_info->thermal_value_iqk; + else + delta_iqk = cali_info->thermal_value_iqk - thermal_value; - for (p = RF_PATH_A; p < c.rf_path_count; p++) - diff_DPK[p] = (s8)thermal_value - (s8)cali_info->dpk_thermal[p]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "(delta, delta_lck, delta_iqk) = (%d, %d, %d)\n", delta, + delta_lck, delta_iqk); - /*4 6. If necessary, do LCK.*/ - - if (!(dm->support_ic_type & ODM_RTL8821)) { /*no PG, do LCK at initial status*/ - if (cali_info->thermal_value_lck == 0xff) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no PG, do LCK\n"); + /*@4 6. If necessary, do LCK.*/ + /* Wait sacn to do LCK by RF Jenyu*/ + if (!(*dm->is_scan_in_process) && !iqk_info->rfk_forbidden) { + /* Delta temperature is equal to or larger than 20 centigrade.*/ + if (delta_lck >= c.threshold_iqk) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_lck(%d) >= threshold_iqk(%d)\n", + delta_lck, c.threshold_iqk); cali_info->thermal_value_lck = thermal_value; - /*Use RTLCK, so close power tracking driver LCK*/ - if (!(dm->support_ic_type & ODM_RTL8814A) && !(dm->support_ic_type & ODM_RTL8822B) && c.phy_lc_calibrate) + /*Use RTLCK, close power tracking driver LCK*/ + /*8821 don't do LCK*/ + if (!(dm->support_ic_type & + (ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B)) && + c.phy_lc_calibrate) { (*c.phy_lc_calibrate)(dm); - - delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value); - } - - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK); - - /* Wait sacn to do LCK by RF Jenyu*/ - if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) { - /* Delta temperature is equal to or larger than 20 centigrade.*/ - if (delta_LCK >= c.threshold_iqk) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); - cali_info->thermal_value_lck = thermal_value; - - /*Use RTLCK, so close power tracking driver LCK*/ - if (!(dm->support_ic_type & ODM_RTL8814A) && !(dm->support_ic_type & ODM_RTL8822B) && c.phy_lc_calibrate) - (*c.phy_lc_calibrate)(dm); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "do pwrtrk lck\n"); } } } - /*3 7. If necessary, move the index of swing table to adjust Tx power.*/ - + /*@3 7. If necessary, move the index of swing table to adjust Tx power.*/ + /* "delta" here is used to record the absolute value of difference. */ if (delta > 0 && cali_info->txpowertrack_control) { - /* "delta" here is used to record the absolute value of differrence. */ -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - delta = thermal_value > rtlefu->eeprom_thermalmeter ? (thermal_value - rtlefu->eeprom_thermalmeter) : (rtlefu->eeprom_thermalmeter - thermal_value); -#else - delta = thermal_value > hal_data->eeprom_thermal_meter ? (thermal_value - hal_data->eeprom_thermal_meter) : (hal_data->eeprom_thermal_meter - thermal_value); -#endif -#else - delta = (thermal_value > dm->priv->pmib->dot11RFEntry.ther) ? (thermal_value - dm->priv->pmib->dot11RFEntry.ther) : (dm->priv->pmib->dot11RFEntry.ther - thermal_value); -#endif + if (thermal_value > rf->eeprom_thermal) + delta = thermal_value - rf->eeprom_thermal; + else + delta = rf->eeprom_thermal - thermal_value; + if (delta >= TXPWR_TRACK_TABLE_SIZE) delta = TXPWR_TRACK_TABLE_SIZE - 1; - /*4 7.1 The Final Power index = BaseIndex + power_index_offset*/ - -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - if (thermal_value > rtlefu->eeprom_thermalmeter) { -#else - if (thermal_value > hal_data->eeprom_thermal_meter) { -#endif -#else - if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) { -#endif - - for (p = RF_PATH_A; p < c.rf_path_count; p++) { - cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/ - switch (p) { - case RF_PATH_B: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]); - - cali_info->delta_power_index[p] = delta_swing_table_idx_tup_b[delta]; - cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); - break; - - case RF_PATH_C: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]); - - cali_info->delta_power_index[p] = delta_swing_table_idx_tup_c[delta]; - cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); - break; - - case RF_PATH_D: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]); - - cali_info->delta_power_index[p] = delta_swing_table_idx_tup_d[delta]; - cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); - break; - - default: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]); - - cali_info->delta_power_index[p] = delta_swing_table_idx_tup_a[delta]; - cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); - break; - } - } - /* JJ ADD 20161014 */ - if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) { - /*Save xtal_offset from Xtal table*/ - cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "[Xtal] delta_swing_table_xtal_up[%d] = %d\n", delta, delta_swing_table_xtal_up[delta]); - cali_info->xtal_offset = delta_swing_table_xtal_up[delta]; - xtal_offset_eanble = (cali_info->xtal_offset_last != cali_info->xtal_offset); - } - - } else { - for (p = RF_PATH_A; p < c.rf_path_count; p++) { - cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/ - - switch (p) { - case RF_PATH_B: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]); - cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_b[delta]; - cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); - break; - - case RF_PATH_C: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]); - cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_c[delta]; - cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); - break; - - case RF_PATH_D: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]); - cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_d[delta]; - cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); - break; - - default: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]); - cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_a[delta]; - cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); - break; - } - } - /* JJ ADD 20161014 */ - if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) { - /*Save xtal_offset from Xtal table*/ - cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "[Xtal] delta_swing_table_xtal_down[%d] = %d\n", delta, delta_swing_table_xtal_down[delta]); - cali_info->xtal_offset = delta_swing_table_xtal_down[delta]; - xtal_offset_eanble = (cali_info->xtal_offset_last != cali_info->xtal_offset); - } - - } + odm_get_tracking_table(dm, thermal_value, delta); for (p = RF_PATH_A; p < c.rf_path_count; p++) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "\n\n=========================== [path-%d] Calculating power_index_offset===========================\n", p); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "\n[path-%d] Calculate pwr_idx_offset\n", p); - if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/ + /*If Thermal value changes but table value is the same*/ + if (cali_info->delta_power_index[p] == + cali_info->delta_power_index_last[p]) cali_info->power_index_offset[p] = 0; else - cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/ + cali_info->power_index_offset[p] = + cali_info->delta_power_index[p] - + cali_info->delta_power_index_last[p]; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "[path-%d] power_index_offset(%d) = delta_power_index(%d) - delta_power_index_last(%d)\n", p, cali_info->power_index_offset[p], cali_info->delta_power_index[p], cali_info->delta_power_index_last[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "path-%d pwridx_diff%d=pwr_idx%d - last_idx%d\n", + p, cali_info->power_index_offset[p], + cali_info->delta_power_index[p], + cali_info->delta_power_index_last[p]); +#if 0 cali_info->OFDM_index[p] = cali_info->bb_swing_idx_ofdm_base[p] + cali_info->power_index_offset[p]; cali_info->CCK_index = cali_info->bb_swing_idx_cck_base + cali_info->power_index_offset[p]; @@ -542,10 +598,16 @@ odm_txpowertracking_callback_thermal_meter( /*************Print BB Swing base and index Offset*************/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, cali_info->power_index_offset[p]); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[p], p, cali_info->bb_swing_idx_ofdm_base[p], cali_info->power_index_offset[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", + cali_info->bb_swing_idx_cck, + cali_info->bb_swing_idx_cck_base, + cali_info->power_index_offset[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", + cali_info->bb_swing_idx_ofdm[p], p, + cali_info->bb_swing_idx_ofdm_base[p], + cali_info->power_index_offset[p]); /*4 7.1 Handle boundary conditions of index.*/ @@ -553,286 +615,442 @@ odm_txpowertracking_callback_thermal_meter( cali_info->OFDM_index[p] = c.swing_table_size_ofdm - 1; else if (cali_info->OFDM_index[p] <= OFDM_min_index) cali_info->OFDM_index[p] = OFDM_min_index; +#endif } - - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "\n\n========================================================================================================\n"); +#if 0 + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "\n\n========================================================================================================\n"); if (cali_info->CCK_index > c.swing_table_size_cck - 1) cali_info->CCK_index = c.swing_table_size_cck - 1; else if (cali_info->CCK_index <= 0) cali_info->CCK_index = 0; +#endif } else { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "The thermal meter is unchanged or TxPowerTracking OFF(%d): thermal_value: %d, cali_info->thermal_value: %d\n", - cali_info->txpowertrack_control, thermal_value, cali_info->thermal_value); - + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "Thermal is unchanged thermal=%d last_thermal=%d\n", + thermal_value, + cali_info->thermal_value); for (p = RF_PATH_A; p < c.rf_path_count; p++) cali_info->power_index_offset[p] = 0; } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", - cali_info->CCK_index, cali_info->bb_swing_idx_cck_base); /*Print Swing base & current*/ +#if 0 + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", + cali_info->CCK_index, + cali_info->bb_swing_idx_cck_base); /*Print Swing base & current*/ for (p = RF_PATH_A; p < c.rf_path_count; p++) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n", - cali_info->OFDM_index[p], p, cali_info->bb_swing_idx_ofdm_base[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n", + cali_info->OFDM_index[p], p, + cali_info->bb_swing_idx_ofdm_base[p]); } +#endif if ((dm->support_ic_type & ODM_RTL8814A)) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "power_tracking_type=%d\n", power_tracking_type); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "power_tracking_type=%d\n", + power_tracking_type); if (power_tracking_type == 0) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "***Enter PwrTrk MIX_MODE***\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) - (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); + (*c.odm_tx_pwr_track_set_pwr) + (dm, MIX_MODE, p, 0); } else if (power_tracking_type == 1) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(2G) TSSI(5G) MODE**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "***Enter PwrTrk MIX(2G) TSSI(5G) MODE***\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) - (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_2G_TSSI_5G_MODE, p, 0); + (*c.odm_tx_pwr_track_set_pwr) + (dm, MIX_2G_TSSI_5G_MODE, p, 0); } else if (power_tracking_type == 2) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(5G) TSSI(2G)MODE**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "***Enter PwrTrk MIX(5G) TSSI(2G)MODE***\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) - (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_5G_TSSI_2G_MODE, p, 0); + (*c.odm_tx_pwr_track_set_pwr) + (dm, MIX_5G_TSSI_2G_MODE, p, 0); } else if (power_tracking_type == 3) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI MODE**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "***Enter PwrTrk TSSI MODE***\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) - (*c.odm_tx_pwr_track_set_pwr)(dm, TSSI_MODE, p, 0); + (*c.odm_tx_pwr_track_set_pwr) + (dm, TSSI_MODE, p, 0); } - cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/ - } else if ((cali_info->power_index_offset[RF_PATH_A] != 0 || - cali_info->power_index_offset[RF_PATH_B] != 0 || - cali_info->power_index_offset[RF_PATH_C] != 0 || - cali_info->power_index_offset[RF_PATH_D] != 0) && -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - cali_info->txpowertrack_control && (rtlefu->eeprom_thermalmeter != 0xff)) { -#else - cali_info->txpowertrack_control && (hal_data->eeprom_thermal_meter != 0xff)) { -#endif + cali_info->power_index_offset[RF_PATH_B] != 0 || + cali_info->power_index_offset[RF_PATH_C] != 0 || + cali_info->power_index_offset[RF_PATH_D] != 0)) { +#if 0 /* 4 7.2 Configure the Swing Table to adjust Tx Power. */ + /*Always true after Tx Power is adjusted by power tracking.*/ - cali_info->is_tx_power_changed = true; /*Always true after Tx Power is adjusted by power tracking.*/ - /* */ - /* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital */ - /* to increase TX power. Otherwise, EVM will be bad. */ - /* */ - /* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */ + cali_info->is_tx_power_changed = true; + /* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital + * to increase TX power. Otherwise, EVM will be bad. + * + * 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. + */ if (thermal_value > cali_info->thermal_value) { for (p = RF_PATH_A; p < c.rf_path_count; p++) { -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", - p, cali_info->power_index_offset[p], delta, thermal_value, rtlefu->eeprom_thermalmeter, cali_info->thermal_value); -#else - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", - p, cali_info->power_index_offset[p], delta, thermal_value, hal_data->eeprom_thermal_meter, cali_info->thermal_value); -#endif + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", + p, cali_info->power_index_offset[p], + delta, thermal_value, rf->eeprom_thermal, + cali_info->thermal_value); } - } else if (thermal_value < cali_info->thermal_value) { /*Low temperature*/ + } else if (thermal_value < cali_info->thermal_value) { /*Low temperature*/ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", - p, cali_info->power_index_offset[p], delta, thermal_value, rtlefu->eeprom_thermalmeter, cali_info->thermal_value); -#else - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", - p, cali_info->power_index_offset[p], delta, thermal_value, hal_data->eeprom_thermal_meter, cali_info->thermal_value); -#endif + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", + p, cali_info->power_index_offset[p], + delta, thermal_value, rf->eeprom_thermal, + cali_info->thermal_value); } } +#endif #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - if (thermal_value > rtlefu->eeprom_thermalmeter) + if (thermal_value > rf->eeprom_thermal) { #else - if (thermal_value > hal_data->eeprom_thermal_meter) -#endif -#else - if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) -#endif - { -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "Temperature(%d) higher than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter); -#else - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "Temperature(%d) higher than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter); + if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) { #endif + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "Temperature(%d) higher than PG value(%d)\n", + thermal_value, rf->eeprom_thermal); - if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8821 || - dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8723B || dm->support_ic_type == ODM_RTL8814A || - dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8822B || - dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */ - - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); - for (p = RF_PATH_A; p < c.rf_path_count; p++) - (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); - } else { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); - for (p = RF_PATH_A; p < c.rf_path_count; p++) - (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel); - } + odm_pwrtrk_method(dm); } else { -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "Temperature(%d) lower than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter); -#else - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "Temperature(%d) lower than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter); -#endif - - if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8821 || - dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8723B || dm->support_ic_type == ODM_RTL8814A || - dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8822B || - dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */ - - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); - for (p = RF_PATH_A; p < c.rf_path_count; p++) - (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, indexforchannel); - } else { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); - for (p = RF_PATH_A; p < c.rf_path_count; p++) - (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel); - } + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "Temperature(%d) lower than PG value(%d)\n", + thermal_value, rf->eeprom_thermal); + odm_pwrtrk_method(dm); } - cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck; /*Record last time Power Tracking result as base.*/ +#if 0 + /*Record last time Power Tracking result as base.*/ + cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck; for (p = RF_PATH_A; p < c.rf_path_count; p++) cali_info->bb_swing_idx_ofdm_base[p] = cali_info->bb_swing_idx_ofdm[p]; - - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "cali_info->thermal_value = %d thermal_value= %d\n", cali_info->thermal_value, thermal_value); - - cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/ - - } - - - if (dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */ - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (rtlefu->eeprom_thermalmeter != 0xff)) { -#else - if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (hal_data->eeprom_thermal_meter != 0xff)) { #endif + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "cali_info->thermal_value = %d thermal_value= %d\n", + cali_info->thermal_value, thermal_value); + } + /*Record last Power Tracking Thermal value*/ + cali_info->thermal_value = thermal_value; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter Xtal Tracking**********\n"); + if (dm->support_ic_type & + (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8192F | ODM_RTL8710B)) { + if (cali_info->xtal_offset_eanble != 0 && + cali_info->txpowertrack_control && + rf->eeprom_thermal != 0xff) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "**********Enter Xtal Tracking**********\n"); #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - if (thermal_value > rtlefu->eeprom_thermalmeter) { -#else - if (thermal_value > hal_data->eeprom_thermal_meter) { -#endif + if (thermal_value > rf->eeprom_thermal) { #else if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) { #endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "Temperature(%d) higher than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter); -#else - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "Temperature(%d) higher than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter); -#endif + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "Temperature(%d) higher than PG (%d)\n", + thermal_value, rf->eeprom_thermal); (*c.odm_txxtaltrack_set_xtal)(dm); } else { -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "Temperature(%d) lower than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter); -#else - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, - "Temperature(%d) lower than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter); -#endif + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "Temperature(%d) lower than PG (%d)\n", + thermal_value, rf->eeprom_thermal); (*c.odm_txxtaltrack_set_xtal)(dm); } } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********End Xtal Tracking**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "**********End Xtal Tracking**********\n"); } #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) /* Wait sacn to do IQK by RF Jenyu*/ - if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) { - if (!IS_HARDWARE_TYPE_8723B(adapter)) { - /*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ - if (delta_IQK >= c.threshold_iqk) { + if (!(*dm->is_scan_in_process) && !iqk_info->rfk_forbidden && + !cali_info->is_iqk_in_progress) { + if (!(dm->support_ic_type & ODM_RTL8723B)) { + /*Delta temperature is equal or larger than 20 Celsius*/ + /*When threshold is 8*/ + if (delta_iqk >= c.threshold_iqk) { cali_info->thermal_value_iqk = thermal_value; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); - if (!cali_info->is_iqk_in_progress) - (*c.do_iqk)(dm, delta_IQK, thermal_value, 8); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_iqk(%d) >= threshold_iqk(%d)\n", + delta_iqk, c.threshold_iqk); + (*c.do_iqk)(dm, delta_iqk, thermal_value, 8); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "do pwrtrk iqk\n"); } } } + +#if 0 if (cali_info->dpk_thermal[RF_PATH_A] != 0) { if (diff_DPK[RF_PATH_A] >= c.threshold_dpk) { - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); - odm_set_bb_reg(dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_A] / c.threshold_dpk)); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); + odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_A] / c.threshold_dpk)); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); } else if ((diff_DPK[RF_PATH_A] <= -1 * c.threshold_dpk)) { s32 value = 0x20 + (diff_DPK[RF_PATH_A] / c.threshold_dpk); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); - odm_set_bb_reg(dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); + odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); } else { - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); - odm_set_bb_reg(dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); + odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); } } if (cali_info->dpk_thermal[RF_PATH_B] != 0) { if (diff_DPK[RF_PATH_B] >= c.threshold_dpk) { - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); - odm_set_bb_reg(dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_B] / c.threshold_dpk)); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); + odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_B] / c.threshold_dpk)); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); } else if ((diff_DPK[RF_PATH_B] <= -1 * c.threshold_dpk)) { s32 value = 0x20 + (diff_DPK[RF_PATH_B] / c.threshold_dpk); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); - odm_set_bb_reg(dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); + odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); } else { - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); - odm_set_bb_reg(dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); + odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); } } +#endif #endif - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "<===odm_txpowertracking_callback_thermal_meter\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===%s\n", __func__); cali_info->tx_powercount = 0; } - - -/* 3============================================================ - * 3 IQ Calibration - * 3============================================================ */ - +#if (RTL8822C_SUPPORT == 1) void -odm_reset_iqk_result( - void *dm_void -) +odm_txpowertracking_new_callback_thermal_meter(void *dm_void) { - return; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + struct dm_iqk_info *iqk_info = &dm->IQK_info; + struct _hal_rf_ *rf = &dm->rf_table; + struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; + u8 thermal_value[MAX_RF_PATH] = {0}, delta[MAX_RF_PATH] = {0}; + u8 delta_swing_table_idx_tup[DELTA_SWINGIDX_SIZE] = {0}; + u8 delta_swing_table_idx_tdown[DELTA_SWINGIDX_SIZE] = {0}; + u8 delta_LCK = 0, delta_IQK = 0, i = 0, j = 0, p; + u8 thermal_value_avg_count[MAX_RF_PATH] = {0}; + u32 thermal_value_avg[MAX_RF_PATH] = {0}; + s8 thermal_value_temp[MAX_RF_PATH] = {0}; + + struct txpwrtrack_cfg c; + + u8 *delta_swing_table_idx_tup_a = NULL; + u8 *delta_swing_table_idx_tdown_a = NULL; + u8 *delta_swing_table_idx_tup_b = NULL; + u8 *delta_swing_table_idx_tdown_b = NULL; + u8 *delta_swing_table_idx_tup_c = NULL; + u8 *delta_swing_table_idx_tdown_c = NULL; + u8 *delta_swing_table_idx_tup_d = NULL; + u8 *delta_swing_table_idx_tdown_d = NULL; + + configure_txpower_track(dm, &c); + + (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a, + (u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b); + + cali_info->txpowertracking_callback_cnt++; + cali_info->is_txpowertracking_init = true; + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n", + cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], cali_info->default_ofdm_index); + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "cali_info->txpowertrack_control=%d, tssi->thermal[RF_PATH_A]=%d tssi->thermal[RF_PATH_B]=%d\n", + cali_info->txpowertrack_control, tssi->thermal[RF_PATH_A], tssi->thermal[RF_PATH_B]); + + thermal_value[RF_PATH_A] = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ + thermal_value[RF_PATH_B] = (u8)odm_get_rf_reg(dm, RF_PATH_B, c.thermal_reg_addr, 0xfc00); + + for (i = 0; i < c.rf_path_count; i++) { + thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm); + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "thermal_value_temp[%d](%d) = thermal_value[%d](%d) + power_time_thermal(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm)); + + if (thermal_value_temp[i] > 63) + thermal_value[i] = 63; + else if (thermal_value_temp[i] < 0) + thermal_value[i] = 0; + else + thermal_value[i] = thermal_value_temp[i]; + } + + if (tssi->thermal[RF_PATH_A] == 0xff || tssi->thermal[RF_PATH_B] == 0xff) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no pg, tssi->thermal[A] = 0x%x tssi->thermal[B] = 0x%x\n", + tssi->thermal[RF_PATH_A], tssi->thermal[RF_PATH_B]); + return; + } + + for (j = 0; j < c.rf_path_count; j++) { + cali_info->thermal_value_avg_path[j][cali_info->thermal_value_avg_index_path[j]] = thermal_value[j]; + cali_info->thermal_value_avg_index_path[j]++; + if (cali_info->thermal_value_avg_index_path[j] == c.average_thermal_num) /*Average times = c.average_thermal_num*/ + cali_info->thermal_value_avg_index_path[j] = 0; + + + for (i = 0; i < c.average_thermal_num; i++) { + if (cali_info->thermal_value_avg_path[j][i]) { + thermal_value_avg[j] += cali_info->thermal_value_avg_path[j][i]; + thermal_value_avg_count[j]++; + } + } + + if (thermal_value_avg_count[j]) { /* Calculate Average thermal_value after average enough times */ + thermal_value[j] = (u8)(thermal_value_avg[j] / thermal_value_avg_count[j]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "AVG Thermal Meter = 0x%X, tssi->thermal[A] = 0x%x tssi->thermal[B] = 0x%x\n", + thermal_value[j], tssi->thermal[RF_PATH_A], tssi->thermal[RF_PATH_B]); + } + /* 4 5. Calculate delta, delta_LCK, delta_IQK. */ + + /* "delta" here is used to determine whether thermal value changes or not. */ + delta[j] = (thermal_value[j] > cali_info->thermal_value_path[j]) ? (thermal_value[j] - cali_info->thermal_value_path[j]) : (cali_info->thermal_value_path[j] - thermal_value[j]); + delta_LCK = (thermal_value[0] > cali_info->thermal_value_lck) ? (thermal_value[0] - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value[0]); + delta_IQK = (thermal_value[0] > cali_info->thermal_value_iqk) ? (thermal_value[0] - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value[0]); + } + + /*4 6. If necessary, do LCK.*/ + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", RF_PATH_A, delta[RF_PATH_A], delta_LCK, delta_IQK); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", RF_PATH_B, delta[RF_PATH_B], delta_LCK, delta_IQK); + + /* Wait sacn to do LCK by RF Jenyu*/ + if( (*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) { + /* Delta temperature is equal to or larger than 20 centigrade.*/ + if (delta_LCK >= c.threshold_iqk) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); + cali_info->thermal_value_lck = thermal_value[RF_PATH_A]; + + /*Use RTLCK, so close power tracking driver LCK*/ + if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) { + if (c.phy_lc_calibrate) + (*c.phy_lc_calibrate)(dm); + } else + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do not do LCK\n"); + } + } + + /*3 7. If necessary, move the index of swing table to adjust Tx power.*/ + for (i = 0; i < c.rf_path_count; i++) { + if (i == RF_PATH_B) { + odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_b, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_b, DELTA_SWINGIDX_SIZE); + } else if (i == RF_PATH_C) { + odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_c, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_c, DELTA_SWINGIDX_SIZE); + } else if (i == RF_PATH_D) { + odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_d, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_d, DELTA_SWINGIDX_SIZE); + } else { + odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_a, DELTA_SWINGIDX_SIZE); + } + + cali_info->delta_power_index_last[i] = cali_info->delta_power_index[i]; /*recording poer index offset*/ + delta[i] = thermal_value[i] > tssi->thermal[i] ? (thermal_value[i] - tssi->thermal[i]) : (tssi->thermal[i] - thermal_value[i]); + + if (delta[i] >= TXPWR_TRACK_TABLE_SIZE) + delta[i] = TXPWR_TRACK_TABLE_SIZE - 1; + + if (thermal_value[i] > tssi->thermal[i]) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tup[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tup[delta[i]], i); + + cali_info->delta_power_index[i] = delta_swing_table_idx_tup[delta[i]]; + cali_info->absolute_ofdm_swing_idx[i] = delta_swing_table_idx_tup[delta[i]]; /*Record delta swing for mix mode power tracking*/ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is higher and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i); + } else { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tdown[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tdown[delta[i]], i); + cali_info->delta_power_index[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; + cali_info->absolute_ofdm_swing_idx[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; /*Record delta swing for mix mode power tracking*/ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is lower and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i); + } + } + + for (p = RF_PATH_A; p < c.rf_path_count; p++) { + if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/ + cali_info->power_index_offset[p] = 0; + else + cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/ + } + + if ((cali_info->power_index_offset[RF_PATH_A] != 0 || + cali_info->power_index_offset[RF_PATH_B] != 0 || + cali_info->power_index_offset[RF_PATH_C] != 0 || + cali_info->power_index_offset[RF_PATH_D] != 0)) { + + if (dm->support_ic_type == ODM_RTL8822C) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); + } else { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0); + } + } else + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "TXAGC offset is unchanged\n"); + + /* Wait sacn to do IQK by RF Jenyu*/ + if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) { + /*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ + if (delta_IQK >= c.threshold_iqk) { + cali_info->thermal_value_iqk = thermal_value[RF_PATH_A]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); + if (!cali_info->is_iqk_in_progress) + (*c.do_iqk)(dm, delta_IQK, thermal_value[RF_PATH_A], 8); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do IQK\n"); + } + } + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===%s\n", __func__); + + cali_info->tx_powercount = 0; } +#endif + +/*@3============================================================ + * 3 IQ Calibration + * 3============================================================ + */ + +void odm_reset_iqk_result(void *dm_void) +{ +} + #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) u8 odm_get_right_chnl_place_for_iqk(u8 chnl) { - u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = { - 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165 - }; - u8 place = chnl; - + u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = { + 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, + 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, + 124, 126, 128, 130, 132, 134, 136, 138, 140, + 149, 151, 153, 155, 157, 159, 161, 163, 165}; + u8 place = chnl; if (chnl > 14) { for (place = 14; place < sizeof(channel_all); place++) { @@ -841,17 +1059,13 @@ u8 odm_get_right_chnl_place_for_iqk(u8 chnl) } } return 0; - } #endif -void -odm_iq_calibrate( - struct dm_struct *dm -) +void odm_iq_calibrate(struct dm_struct *dm) { - void *adapter = dm->adapter; - struct dm_iqk_info *iqk_info = &dm->IQK_info; + void *adapter = dm->adapter; + struct dm_iqk_info *iqk_info = &dm->IQK_info; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) if (*dm->is_fcs_mode_enable) @@ -863,8 +1077,9 @@ odm_iq_calibrate( return; #endif - if ((dm->is_linked) && (!iqk_info->rfk_forbidden)) { - if ((*dm->channel != dm->pre_channel) && (!*dm->is_scan_in_process)) { + if (dm->is_linked && !iqk_info->rfk_forbidden) { + if ((*dm->channel != dm->pre_channel) && + (!*dm->is_scan_in_process)) { dm->pre_channel = *dm->channel; dm->linked_interval = 0; } @@ -874,34 +1089,37 @@ odm_iq_calibrate( if (dm->linked_interval == 2) halrf_iqk_trigger(dm, false); - } else + } else { dm->linked_interval = 0; + } } -void phydm_rf_init(void *dm_void) +void phydm_rf_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + odm_txpowertracking_init(dm); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) odm_clear_txpowertracking_state(dm); #endif - #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) #if (RTL8814A_SUPPORT == 1) if (dm->support_ic_type & ODM_RTL8814A) phy_iq_calibrate_8814a_init(dm); #endif #endif - } -void phydm_rf_watchdog(void *dm_void) +void phydm_rf_watchdog(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) odm_txpowertracking_check(dm); - /*if (dm->support_ic_type & ODM_IC_11AC_SERIES)*/ - /*odm_iq_calibrate(dm);*/ +#if 0 +/*if (dm->support_ic_type & ODM_IC_11AC_SERIES)*/ +/*odm_iq_calibrate(dm);*/ +#endif #endif } diff --git a/hal/phydm/halrf/halphyrf_ce.h b/hal/phydm/halrf/halphyrf_ce.h index a4a8938..aff18ed 100644 --- a/hal/phydm/halrf/halphyrf_ce.h +++ b/hal/phydm/halrf/halphyrf_ce.h @@ -23,25 +23,36 @@ * *****************************************************************************/ -#ifndef __HAL_PHY_RF_H__ -#define __HAL_PHY_RF_H__ +#ifndef __HALPHYRF_H__ +#define __HALPHYRF_H__ #include "halrf/halrf_kfree.h" #if (RTL8814A_SUPPORT == 1) - #include "halrf/rtl8814a/halrf_iqk_8814a.h" +#include "halrf/rtl8814a/halrf_iqk_8814a.h" #endif #if (RTL8822B_SUPPORT == 1) - #include "halrf/rtl8822b/halrf_iqk_8822b.h" +#include "halrf/rtl8822b/halrf_iqk_8822b.h" #endif #if (RTL8821C_SUPPORT == 1) - #include "halrf/rtl8821c/halrf_iqk_8821c.h" +#include "halrf/rtl8821c/halrf_iqk_8821c.h" +#endif + +#if (RTL8195B_SUPPORT == 1) +/* #include "halrf/rtl8195b/halrf.h" */ +#include "halrf/rtl8195b/halrf_iqk_8195b.h" +#include "halrf/rtl8195b/halrf_txgapk_8195b.h" +#include "halrf/rtl8195b/halrf_dpk_8195b.h" +#endif + +#if (RTL8814B_SUPPORT == 1) + #include "halrf/rtl8814b/halrf_iqk_8814b.h" + #include "halrf/rtl8814b/halrf_dpk_8814b.h" #endif #include "halrf/halrf_powertracking_ce.h" - enum spur_cal_method { PLL_RESET, AFE_PHASE_SEL @@ -53,72 +64,57 @@ enum pwrtrack_method { MIX_MODE, TSSI_MODE, MIX_2G_TSSI_5G_MODE, - MIX_5G_TSSI_2G_MODE + MIX_5G_TSSI_2G_MODE, + CLEAN_MODE }; -typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8); -typedef void(*func_iqk)(void *, u8, u8, u8); -typedef void (*func_lck)(void *); -typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **); -typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **); -typedef void(*func_swing_xtal)(void *, s8 **, s8 **); -typedef void(*func_set_xtal)(void *); +typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8); +typedef void (*func_iqk)(void *, u8, u8, u8); +typedef void (*func_lck)(void *); +typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **); +typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **); +typedef void (*func_swing_xtal)(void *, s8 **, s8 **); +typedef void (*func_set_xtal)(void *); struct txpwrtrack_cfg { - u8 swing_table_size_cck; - u8 swing_table_size_ofdm; - u8 threshold_iqk; - u8 threshold_dpk; - u8 average_thermal_num; - u8 rf_path_count; - u32 thermal_reg_addr; - func_set_pwr odm_tx_pwr_track_set_pwr; - func_iqk do_iqk; - func_lck phy_lc_calibrate; - func_swing get_delta_swing_table; - func_swing8814only get_delta_swing_table8814only; - func_swing_xtal get_delta_swing_xtal_table; - func_set_xtal odm_txxtaltrack_set_xtal; + u8 swing_table_size_cck; + u8 swing_table_size_ofdm; + u8 threshold_iqk; + u8 threshold_dpk; + u8 average_thermal_num; + u8 rf_path_count; + u32 thermal_reg_addr; + func_set_pwr odm_tx_pwr_track_set_pwr; + func_iqk do_iqk; + func_lck phy_lc_calibrate; + func_swing get_delta_swing_table; + func_swing8814only get_delta_swing_table8814only; + func_swing_xtal get_delta_swing_xtal_table; + func_set_xtal odm_txxtaltrack_set_xtal; }; -void -configure_txpower_track( - void *dm_void, - struct txpwrtrack_cfg *config -); +void configure_txpower_track(void *dm_void, struct txpwrtrack_cfg *config); +void odm_clear_txpowertracking_state(void *dm_void); -void -odm_clear_txpowertracking_state( - void *dm_void -); - -void -odm_txpowertracking_callback_thermal_meter( #if (DM_ODM_SUPPORT_TYPE & ODM_AP) - void *dm_void +void odm_txpowertracking_callback_thermal_meter(void *dm_void); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) - void *dm +void odm_txpowertracking_callback_thermal_meter(void *dm); #else - void *adapter +void odm_txpowertracking_callback_thermal_meter(void *adapter); #endif -); +#if (RTL8822C_SUPPORT == 1) +void odm_txpowertracking_new_callback_thermal_meter(void *dm_void); +#endif +#define ODM_TARGET_CHNL_NUM_2G_5G 59 -#define ODM_TARGET_CHNL_NUM_2G_5G 59 +void odm_reset_iqk_result(void *dm_void); +u8 odm_get_right_chnl_place_for_iqk(u8 chnl); +void phydm_rf_init(void *dm_void); +void phydm_rf_watchdog(void *dm_void); -void -odm_reset_iqk_result( - void *dm_void -); -u8 -odm_get_right_chnl_place_for_iqk( - u8 chnl -); - -void phydm_rf_init(void *dm_void); -void phydm_rf_watchdog(void *dm_void); - -#endif /* #ifndef __HAL_PHY_RF_H__ */ +#endif /*__HALPHYRF_H__*/ diff --git a/hal/phydm/halrf/halphyrf_iot.c b/hal/phydm/halrf/halphyrf_iot.c new file mode 100644 index 0000000..a357b4d --- /dev/null +++ b/hal/phydm/halrf/halphyrf_iot.c @@ -0,0 +1,617 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +#include "mp_precomp.h" +#include "phydm_precomp.h" + +#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal) \ + do {\ + for (_offset = 0; _offset < _size; _offset++) { \ + if (_delta_thermal < thermal_threshold[_direction][_offset]) { \ + if (_offset != 0)\ + _offset--;\ + break;\ + } \ + } \ + if (_offset >= _size)\ + _offset = _size-1;\ + } while (0) + +void configure_txpower_track( + void *dm_void, + struct txpwrtrack_cfg *config +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; +#if RTL8195B_SUPPORT + if (dm->support_ic_type == ODM_RTL8195B) + configure_txpower_track_8195b(config); +#endif +#if RTL8710C_SUPPORT + if (dm->support_ic_type == ODM_RTL8710C) + configure_txpower_track_8710c(config); +#endif +#if RTL8721D_SUPPORT + if (dm->support_ic_type == ODM_RTL8721D) + configure_txpower_track_8721d(config); +#endif + +} + +/* ********************************************************************** + * <20121113, Kordan> This function should be called when tx_agc changed. + * Otherwise the previous compensation is gone, because we record the + * delta of temperature between two TxPowerTracking watch dogs. + * + * NOTE: If Tx BB swing or Tx scaling is varified during run-time, still + * need to call this function. + * ********************************************************************** */ +void +odm_clear_txpowertracking_state( + void *dm_void +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + u8 p = 0; + struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + + cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index; + cali_info->bb_swing_idx_cck = cali_info->default_cck_index; + dm->rf_calibrate_info.CCK_index = 0; + + for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) { + cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index; + cali_info->bb_swing_idx_ofdm[p] = cali_info->default_ofdm_index; + cali_info->OFDM_index[p] = cali_info->default_ofdm_index; + + cali_info->power_index_offset[p] = 0; + cali_info->delta_power_index[p] = 0; + cali_info->delta_power_index_last[p] = 0; + + cali_info->absolute_ofdm_swing_idx[p] = 0; + cali_info->remnant_ofdm_swing_idx[p] = 0; + cali_info->kfree_offset[p] = 0; + } + + cali_info->modify_tx_agc_flag_path_a = false; + cali_info->modify_tx_agc_flag_path_b = false; + cali_info->modify_tx_agc_flag_path_c = false; + cali_info->modify_tx_agc_flag_path_d = false; + cali_info->remnant_cck_swing_idx = 0; + cali_info->thermal_value = rf->eeprom_thermal; + cali_info->modify_tx_agc_value_cck = 0; + cali_info->modify_tx_agc_value_ofdm = 0; +} + +void +odm_txpowertracking_callback_thermal_meter( + void *dm_void +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + + u8 thermal_value = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0; + u8 thermal_value_avg_count = 0; + u32 thermal_value_avg = 0, regc80, regcd0, regcd4, regab4; + + u8 OFDM_min_index = 0; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */ + u8 indexforchannel = 0; /* get_right_chnl_place_for_iqk(hal_data->current_channel) */ + u8 power_tracking_type = rf->pwt_type; + u8 xtal_offset_eanble = 0; + s8 thermal_value_temp = 0; + + struct txpwrtrack_cfg c = {0}; + + /* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */ + u8 *delta_swing_table_idx_tup_a = NULL; + u8 *delta_swing_table_idx_tdown_a = NULL; + u8 *delta_swing_table_idx_tup_b = NULL; + u8 *delta_swing_table_idx_tdown_b = NULL; +#if (RTL8721D_SUPPORT == 1) + u8 *delta_swing_table_idx_tup_a_cck = NULL; + u8 *delta_swing_table_idx_tdown_a_cck = NULL; + u8 *delta_swing_table_idx_tup_b_cck = NULL; + u8 *delta_swing_table_idx_tdown_b_cck = NULL; +#endif + /*for Xtal Offset by James.Tung*/ + s8 *delta_swing_table_xtal_up = NULL; + s8 *delta_swing_table_xtal_down = NULL; + + /* 4 2. Initialization ( 7 steps in total ) */ + + configure_txpower_track(dm, &c); +#if (RTL8721D_SUPPORT == 1) + (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a, + (u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b, + (u8 **)&delta_swing_table_idx_tup_a_cck, (u8 **)&delta_swing_table_idx_tdown_a_cck, + (u8 **)&delta_swing_table_idx_tup_b_cck, (u8 **)&delta_swing_table_idx_tdown_b_cck); +#else + (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a, + (u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b); +#endif + + /*for Xtal Offset*/ + if (dm->support_ic_type == ODM_RTL8195B || + dm->support_ic_type == ODM_RTL8721D) + (*c.get_delta_swing_xtal_table)(dm, + (s8 **)&delta_swing_table_xtal_up, + (s8 **)&delta_swing_table_xtal_down); + + cali_info->txpowertracking_callback_cnt++; /*cosa add for debug*/ + cali_info->is_txpowertracking_init = true; + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n", + cali_info->bb_swing_idx_cck_base, + cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], + cali_info->default_ofdm_index); + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "cali_info->txpowertrack_control = %d, hal_data->eeprom_thermal_meter %d\n", + cali_info->txpowertrack_control, rf->eeprom_thermal); + + if (dm->support_ic_type == ODM_RTL8721D) + thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, + c.thermal_reg_addr, 0x7e0); + /* 0x42: RF Reg[10:5] 8721D */ + else + thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, + c.thermal_reg_addr, 0xfc00); + /* 0x42: RF Reg[15:10] 88E */ + + thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm); + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "thermal_value_temp(%d) = thermal_value(%d) + power_trim_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(dm)); + + if (thermal_value_temp > 63) + thermal_value = 63; + else if (thermal_value_temp < 0) + thermal_value = 0; + else + thermal_value = thermal_value_temp; + + if (!cali_info->txpowertrack_control) + return; + + if (rf->eeprom_thermal == 0xff) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", rf->eeprom_thermal); + return; + } +#if 0 + /*4 3. Initialize ThermalValues of rf_calibrate_info*/ + //if (cali_info->is_reloadtxpowerindex) + // RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "reload ofdm index for band switch\n"); +#endif + /*4 4. Calculate average thermal meter*/ + + cali_info->thermal_value_avg[cali_info->thermal_value_avg_index] = thermal_value; + cali_info->thermal_value_avg_index++; + if (cali_info->thermal_value_avg_index == c.average_thermal_num) /*Average times = c.average_thermal_num*/ + cali_info->thermal_value_avg_index = 0; + + for (i = 0; i < c.average_thermal_num; i++) { + if (cali_info->thermal_value_avg[i]) { + thermal_value_avg += cali_info->thermal_value_avg[i]; + thermal_value_avg_count++; + } + } + + if (thermal_value_avg_count) { /* Calculate Average thermal_value after average enough times */ + thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count); + cali_info->thermal_value_delta = thermal_value - rf->eeprom_thermal; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, rf->eeprom_thermal); + } + + /* 4 5. Calculate delta, delta_LCK, delta_IQK. */ + /* "delta" here is used to determine whether thermal value changes or not. */ + delta = (thermal_value > cali_info->thermal_value) ? (thermal_value - cali_info->thermal_value) : (cali_info->thermal_value - thermal_value); + delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value); + delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value); + + /*4 6. If necessary, do LCK.*/ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK); + + /* Wait sacn to do LCK by RF Jenyu*/ + if ((!*dm->is_scan_in_process) && !iqk_info->rfk_forbidden && + (!*dm->is_tdma)) { + /* Delta temperature is equal to or larger than 20 centigrade.*/ + if (delta_LCK >= c.threshold_iqk) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); + cali_info->thermal_value_lck = thermal_value; + + /*Use RTLCK, so close power tracking driver LCK*/ + (*c.phy_lc_calibrate)(dm); + } + } + + /*3 7. If necessary, move the index of swing table to adjust Tx power.*/ + if (delta > 0 && cali_info->txpowertrack_control) { + /* "delta" here is used to record the absolute value of difference. */ + delta = thermal_value > rf->eeprom_thermal ? (thermal_value - rf->eeprom_thermal) : (rf->eeprom_thermal - thermal_value); + + if (delta >= TXPWR_TRACK_TABLE_SIZE) + delta = TXPWR_TRACK_TABLE_SIZE - 1; + + /*4 7.1 The Final Power index = BaseIndex + power_index_offset*/ + if (thermal_value > rf->eeprom_thermal) { + for (p = RF_PATH_A; p < c.rf_path_count; p++) { + cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/ + switch (p) { + case RF_PATH_B: + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]); +#if (RTL8721D_SUPPORT == 1) + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tup_b_cck[%d] = %d\n", delta, delta_swing_table_idx_tup_b_cck[delta]); + + cali_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_b_cck[delta]; + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is higher and cali_info->absolute_cck_swing_idx[RF_PATH_B] = %d\n", + cali_info->absolute_cck_swing_idx[p]); +#endif + cali_info->delta_power_index[p] = + delta_swing_table_idx_tup_b + [delta]; + cali_info->absolute_ofdm_swing_idx[p] = + delta_swing_table_idx_tup_b + [delta]; + /*Record delta swing for mix mode*/ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); + break; + + default: + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]); +#if (RTL8721D_SUPPORT == 1) + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tup_a_cck[%d] = %d\n", delta, delta_swing_table_idx_tup_a_cck[delta]); + + cali_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_a_cck[delta]; + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is higher and cali_info->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_cck_swing_idx[p]); +#endif + cali_info->delta_power_index[p] = delta_swing_table_idx_tup_a[delta]; + cali_info->absolute_ofdm_swing_idx[p] = + delta_swing_table_idx_tup_a[delta]; + /*Record delta swing*/ + /*for mix mode power tracking*/ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); + break; + } + } + /* JJ ADD 20161014 */ + if (dm->support_ic_type == ODM_RTL8195B || + dm->support_ic_type == ODM_RTL8721D) { + /*Save xtal_offset from Xtal table*/ + cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "[Xtal] delta_swing_table_xtal_up[%d] = %d\n", delta, delta_swing_table_xtal_up[delta]); + cali_info->xtal_offset = delta_swing_table_xtal_up[delta]; + xtal_offset_eanble = (cali_info->xtal_offset_last != cali_info->xtal_offset); + } + + } else { + for (p = RF_PATH_A; p < c.rf_path_count; p++) { + cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/ + + switch (p) { + case RF_PATH_B: + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]); +#if (RTL8721D_SUPPORT == 1) + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tdown_b_cck[%d] = %d\n", delta, delta_swing_table_idx_tdown_b_cck[delta]); + + cali_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b_cck[delta]; + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is lower and cali_info->absolute_cck_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_cck_swing_idx[p]); +#endif + cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_b[delta]; + cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta]; /*Record delta swing for mix mode power tracking*/ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); + break; + + default: + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]); +#if (RTL8721D_SUPPORT == 1) + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tdown_a_cck[%d] = %d\n", delta, delta_swing_table_idx_tdown_a_cck[delta]); + + cali_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a_cck[delta]; + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is lower and cali_info->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_cck_swing_idx[p]); +#endif + cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_a[delta]; + cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta]; /*Record delta swing for mix mode power tracking*/ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); + break; + } + } + /* JJ ADD 20161014 */ + + if (dm->support_ic_type == ODM_RTL8195B || + dm->support_ic_type == ODM_RTL8721D) { + /*Save xtal_offset from Xtal table*/ + cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "[Xtal] delta_swing_table_xtal_down[%d] = %d\n", delta, delta_swing_table_xtal_down[delta]); + cali_info->xtal_offset = delta_swing_table_xtal_down[delta]; + xtal_offset_eanble = (cali_info->xtal_offset_last != cali_info->xtal_offset); + } + } +#if 0 + for (p = RF_PATH_A; p < c.rf_path_count; p++) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "\n\n=========================== [path-%d] Calculating power_index_offset===========================\n", p); + + if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/ + cali_info->power_index_offset[p] = 0; + else + cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/ + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "[path-%d] power_index_offset(%d) = delta_power_index(%d) - delta_power_index_last(%d)\n", p, cali_info->power_index_offset[p], cali_info->delta_power_index[p], cali_info->delta_power_index_last[p]); + + cali_info->OFDM_index[p] = cali_info->bb_swing_idx_ofdm_base[p] + cali_info->power_index_offset[p]; + cali_info->CCK_index = cali_info->bb_swing_idx_cck_base + cali_info->power_index_offset[p]; + + cali_info->bb_swing_idx_cck = cali_info->CCK_index; + cali_info->bb_swing_idx_ofdm[p] = cali_info->OFDM_index[p]; + + /*************Print BB Swing base and index Offset*************/ + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, cali_info->power_index_offset[p]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[p], p, cali_info->bb_swing_idx_ofdm_base[p], cali_info->power_index_offset[p]); + + /*4 7.1 Handle boundary conditions of index.*/ + + if (cali_info->OFDM_index[p] > c.swing_table_size_ofdm - 1) + cali_info->OFDM_index[p] = c.swing_table_size_ofdm - 1; + else if (cali_info->OFDM_index[p] <= OFDM_min_index) + cali_info->OFDM_index[p] = OFDM_min_index; + } + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "\n\n========================================================================================================\n"); + + if (cali_info->CCK_index > c.swing_table_size_cck - 1) + cali_info->CCK_index = c.swing_table_size_cck - 1; + else if (cali_info->CCK_index <= 0) + cali_info->CCK_index = 0; +#endif + } else { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "The thermal meter is unchanged or TxPowerTracking OFF(%d): thermal_value: %d, cali_info->thermal_value: %d\n", + cali_info->txpowertrack_control, thermal_value, cali_info->thermal_value); + + for (p = RF_PATH_A; p < c.rf_path_count; p++) + cali_info->power_index_offset[p] = 0; + } +#if 0 + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", + cali_info->CCK_index, cali_info->bb_swing_idx_cck_base); /*Print Swing base & current*/ + + for (p = RF_PATH_A; p < c.rf_path_count; p++) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n", + cali_info->OFDM_index[p], p, cali_info->bb_swing_idx_ofdm_base[p]); + } +#endif + if (thermal_value > rf->eeprom_thermal) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "Temperature(%d) higher than PG value(%d)\n", thermal_value, rf->eeprom_thermal); + + if (dm->support_ic_type == ODM_RTL8188E || + dm->support_ic_type == ODM_RTL8192E || + dm->support_ic_type == ODM_RTL8821 || + dm->support_ic_type == ODM_RTL8812 || + dm->support_ic_type == ODM_RTL8723B || + dm->support_ic_type == ODM_RTL8814A || + dm->support_ic_type == ODM_RTL8703B || + dm->support_ic_type == ODM_RTL8188F || + dm->support_ic_type == ODM_RTL8822B || + dm->support_ic_type == ODM_RTL8723D || + dm->support_ic_type == ODM_RTL8821C || + dm->support_ic_type == ODM_RTL8710B || + dm->support_ic_type == ODM_RTL8192F || + dm->support_ic_type == ODM_RTL8195B || + dm->support_ic_type == ODM_RTL8721D){ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); + } else { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel); + } + } else { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "Temperature(%d) lower than PG value(%d)\n", thermal_value, rf->eeprom_thermal); + + if (dm->support_ic_type == ODM_RTL8188E || + dm->support_ic_type == ODM_RTL8192E || + dm->support_ic_type == ODM_RTL8821 || + dm->support_ic_type == ODM_RTL8812 || + dm->support_ic_type == ODM_RTL8723B || + dm->support_ic_type == ODM_RTL8814A || + dm->support_ic_type == ODM_RTL8703B || + dm->support_ic_type == ODM_RTL8188F || + dm->support_ic_type == ODM_RTL8822B || + dm->support_ic_type == ODM_RTL8723D || + dm->support_ic_type == ODM_RTL8821C || + dm->support_ic_type == ODM_RTL8710B || + dm->support_ic_type == ODM_RTL8192F || + dm->support_ic_type == ODM_RTL8195B || + dm->support_ic_type == ODM_RTL8721D) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, indexforchannel); + } else { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel); + } + + cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck; /*Record last time Power Tracking result as base.*/ + for (p = RF_PATH_A; p < c.rf_path_count; p++) + cali_info->bb_swing_idx_ofdm_base[p] = cali_info->bb_swing_idx_ofdm[p]; + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "cali_info->thermal_value = %d thermal_value= %d\n", cali_info->thermal_value, thermal_value); + + cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/ + } + + /* JJ ADD 20161014 */ + if (dm->support_ic_type == ODM_RTL8195B || + dm->support_ic_type == ODM_RTL8721D) { + if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (rf->eeprom_thermal != 0xff)) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter Xtal Tracking**********\n"); + + if (thermal_value > rf->eeprom_thermal) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "Temperature(%d) higher than PG value(%d)\n", thermal_value, rf->eeprom_thermal); + (*c.odm_txxtaltrack_set_xtal)(dm); + } else { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "Temperature(%d) lower than PG value(%d)\n", thermal_value, rf->eeprom_thermal); + (*c.odm_txxtaltrack_set_xtal)(dm); + } + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********End Xtal Tracking**********\n"); + } + } +#if (!RTL8721D_SUPPORT) + /* Wait sacn to do IQK by RF Jenyu*/ + if ((!*dm->is_scan_in_process) && (!iqk_info->rfk_forbidden)) { + /*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ + if (delta_IQK >= c.threshold_iqk) { + cali_info->thermal_value_iqk = thermal_value; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); + if (!cali_info->is_iqk_in_progress) + (*c.do_iqk)(dm, delta_IQK, thermal_value, 8); + } + } +#endif + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===odm_txpowertracking_callback_thermal_meter\n"); + + cali_info->tx_powercount = 0; +} + +/* 3============================================================ + * 3 IQ Calibration + * 3============================================================ + */ + +void +odm_reset_iqk_result( + void *dm_void +) +{ + return; +} + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) +u8 odm_get_right_chnl_place_for_iqk(u8 chnl) +{ + u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = { + 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, + 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, + 124, 126, 128, 130, 132, 134, 136, 138, 140, + 149, 151, 153, 155, 157, 159, 161, 163, 165}; + u8 place = chnl; + + if (chnl > 14) { + for (place = 14; place < sizeof(channel_all); place++) { + if (channel_all[place] == chnl) + return place - 13; + } + } + return 0; +} +#endif + +void +odm_iq_calibrate( + struct dm_struct *dm +) +{ +#if (RTL8721D_SUPPORT == 1) + struct dm_iqk_info *iqk_info = &dm->IQK_info; + + if (dm->is_linked && !iqk_info->rfk_forbidden) { + if ((*dm->channel != dm->pre_channel) && + (!*dm->is_scan_in_process)) { + dm->pre_channel = *dm->channel; + dm->linked_interval = 0; + } + + if (dm->linked_interval < 3) + dm->linked_interval++; + + if (dm->linked_interval == 2) + halrf_iqk_trigger(dm, false); + } else { + dm->linked_interval = 0; + } +#endif +} + +void phydm_rf_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + odm_txpowertracking_init(dm); + + odm_clear_txpowertracking_state(dm); +} + +void phydm_rf_watchdog(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + odm_txpowertracking_check(dm); +#if (RTL8721D_SUPPORT == 1) + odm_iq_calibrate(dm); +#endif +} diff --git a/hal/phydm/halrf/halphyrf_iot.h b/hal/phydm/halrf/halphyrf_iot.h new file mode 100644 index 0000000..e81c272 --- /dev/null +++ b/hal/phydm/halrf/halphyrf_iot.h @@ -0,0 +1,129 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +#ifndef __HALPHYRF_H__ +#define __HALPHYRF_H__ + +#include "halrf/halrf_kfree.h" + +#if (RTL8821C_SUPPORT == 1) + #include "halrf/rtl8821c/halrf_iqk_8821c.h" +#endif + +#if (RTL8195B_SUPPORT == 1) +// #include "halrf/rtl8195b/halrf.h" + #include "halrf/rtl8195b/halrf_iqk_8195b.h" + #include "halrf/rtl8195b/halrf_txgapk_8195b.h" + #include "halrf/rtl8195b/halrf_dpk_8195b.h" +#endif + +#include "halrf/halrf_powertracking_iot.h" + + +enum spur_cal_method { + PLL_RESET, + AFE_PHASE_SEL +}; + +enum pwrtrack_method { + BBSWING, + TXAGC, + MIX_MODE, + TSSI_MODE, + MIX_2G_TSSI_5G_MODE, + MIX_5G_TSSI_2G_MODE +}; + +typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8); +typedef void(*func_iqk)(void *, u8, u8, u8); +typedef void (*func_lck)(void *); +#if (RTL8721D_SUPPORT == 1) + typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **, + u8 **, u8 **, u8 **, u8 **); +#else + typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **); +#endif +typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **); +typedef void(*func_swing_xtal)(void *, s8 **, s8 **); +typedef void(*func_set_xtal)(void *); + +struct txpwrtrack_cfg { + u8 swing_table_size_cck; + u8 swing_table_size_ofdm; + u8 threshold_iqk; + u8 threshold_dpk; + u8 average_thermal_num; + u8 rf_path_count; + u32 thermal_reg_addr; + func_set_pwr odm_tx_pwr_track_set_pwr; + func_iqk do_iqk; + func_lck phy_lc_calibrate; + func_swing get_delta_swing_table; + func_swing8814only get_delta_swing_table8814only; + func_swing_xtal get_delta_swing_xtal_table; + func_set_xtal odm_txxtaltrack_set_xtal; +}; + +void +configure_txpower_track( + void *dm_void, + struct txpwrtrack_cfg *config +); + + +void +odm_clear_txpowertracking_state( + void *dm_void +); + +void +odm_txpowertracking_callback_thermal_meter( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + void *dm_void +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + void *dm +#else + void *adapter +#endif +); + + + +#define ODM_TARGET_CHNL_NUM_2G_5G 59 + + +void +odm_reset_iqk_result( + void *dm_void +); +u8 +odm_get_right_chnl_place_for_iqk( + u8 chnl +); + +void phydm_rf_init(void *dm_void); +void phydm_rf_watchdog(void *dm_void); + +#endif /*#ifndef __HALPHYRF_H__*/ diff --git a/hal/phydm/halrf/halphyrf_win.c b/hal/phydm/halrf/halphyrf_win.c index bb4c000..c267715 100644 --- a/hal/phydm/halrf/halphyrf_win.c +++ b/hal/phydm/halrf/halphyrf_win.c @@ -94,6 +94,22 @@ void configure_txpower_track( configure_txpower_track_8821c(config); #endif +#if RTL8192F_SUPPORT + if (dm->support_ic_type == ODM_RTL8192F) + configure_txpower_track_8192f(config); +#endif + +#if RTL8822C_SUPPORT + if (dm->support_ic_type == ODM_RTL8822C) + configure_txpower_track_8822c(config); +#endif + +#if RTL8814B_SUPPORT + if (dm->support_ic_type == ODM_RTL8814B) + configure_txpower_track_8814b(config); +#endif + + } /* ********************************************************************** @@ -166,7 +182,7 @@ odm_txpowertracking_callback_thermal_meter( u8 thermal_value = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0; s8 diff_DPK[4] = {0}; u8 thermal_value_avg_count = 0; - u32 thermal_value_avg = 0, regc80, regcd0, regcd4, regab4; + u32 thermal_value_avg = 0, regc80, regcd0, regcd4, regab4, regc88, rege14, reg848,reg838, reg86c; u8 OFDM_min_index = 0; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */ u8 indexforchannel = 0; /* get_right_chnl_place_for_iqk(hal_data->current_channel) */ @@ -197,11 +213,11 @@ odm_txpowertracking_callback_thermal_meter( (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a, (u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b); - if (dm->support_ic_type & ODM_RTL8814A) /*for 8814 path C & D*/ + if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8814B)) /*for 8814 path C & D*/ (*c.get_delta_swing_table8814only)(dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c, (u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d); /* JJ ADD 20161014 */ - if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) /*for Xtal Offset*/ + if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | ODM_RTL8192F)) /*for Xtal Offset*/ (*c.get_delta_swing_xtal_table)(dm, (s8 **)&delta_swing_table_xtal_up, (s8 **)&delta_swing_table_xtal_down); @@ -220,17 +236,17 @@ odm_txpowertracking_callback_thermal_meter( cali_info->rega24 = 0x090e1317; #endif - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n", cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], cali_info->default_ofdm_index); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "cali_info->txpowertrack_control=%d, hal_data->eeprom_thermal_meter %d\n", cali_info->txpowertrack_control, hal_data->eeprom_thermal_meter); thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "thermal_value_temp(%d) = thermal_value(%d) + power_time_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(dm)); if (thermal_value_temp > 63) @@ -242,34 +258,46 @@ odm_txpowertracking_callback_thermal_meter( /*add log by zhao he, check c80/c94/c14/ca0 value*/ if (dm->support_ic_type == ODM_RTL8723D) { - regc80 = odm_get_bb_reg(dm, 0xc80, MASKDWORD); - regcd0 = odm_get_bb_reg(dm, 0xcd0, MASKDWORD); - regcd4 = odm_get_bb_reg(dm, 0xcd4, MASKDWORD); - regab4 = odm_get_bb_reg(dm, 0xab4, 0x000007FF); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4); + regc80 = odm_get_bb_reg(dm, R_0xc80, MASKDWORD); + regcd0 = odm_get_bb_reg(dm, R_0xcd0, MASKDWORD); + regcd4 = odm_get_bb_reg(dm, R_0xcd4, MASKDWORD); + regab4 = odm_get_bb_reg(dm, R_0xab4, 0x000007FF); + RF_DBG(dm, DBG_RF_IQK, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4); } /* JJ ADD 20161014 */ if (dm->support_ic_type == ODM_RTL8710B) { - regc80 = odm_get_bb_reg(dm, 0xc80, MASKDWORD); - regcd0 = odm_get_bb_reg(dm, 0xcd0, MASKDWORD); - regcd4 = odm_get_bb_reg(dm, 0xcd4, MASKDWORD); - regab4 = odm_get_bb_reg(dm, 0xab4, 0x000007FF); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4); + regc80 = odm_get_bb_reg(dm, R_0xc80, MASKDWORD); + regcd0 = odm_get_bb_reg(dm, R_0xcd0, MASKDWORD); + regcd4 = odm_get_bb_reg(dm, R_0xcd4, MASKDWORD); + regab4 = odm_get_bb_reg(dm, R_0xab4, 0x000007FF); + RF_DBG(dm, DBG_RF_IQK, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4); + } + /* Winnita add 20171205 */ + if (dm->support_ic_type == ODM_RTL8192F) { + regc80 = odm_get_bb_reg(dm, R_0xc80, MASKDWORD); + regc88 = odm_get_bb_reg(dm, R_0xc88, MASKDWORD); + regab4 = odm_get_bb_reg(dm, R_0xab4, MASKDWORD); + rege14 = odm_get_bb_reg(dm, R_0xe14, MASKDWORD); + reg848 = odm_get_bb_reg(dm, R_0x848, MASKDWORD); + reg838 = odm_get_bb_reg(dm, R_0x838, MASKDWORD); + reg86c = odm_get_bb_reg(dm, R_0x86c, MASKDWORD); + RF_DBG(dm, DBG_RF_IQK, "0xc80 = 0x%x 0xc88 = 0x%x 0xab4 = 0x%x 0xe14 = 0x%x\n", regc80, regc88, regab4, rege14); + RF_DBG(dm, DBG_RF_IQK, "0x848 = 0x%x 0x838 = 0x%x 0x86c = 0x%x\n", reg848, reg838, reg86c); } if (!cali_info->txpowertrack_control) return; if (hal_data->eeprom_thermal_meter == 0xff) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", hal_data->eeprom_thermal_meter); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", hal_data->eeprom_thermal_meter); return; } /*4 3. Initialize ThermalValues of rf_calibrate_info*/ if (cali_info->is_reloadtxpowerindex) - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "reload ofdm index for band switch\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "reload ofdm index for band switch\n"); /*4 4. Calculate average thermal meter*/ @@ -288,7 +316,7 @@ odm_txpowertracking_callback_thermal_meter( if (thermal_value_avg_count) { /* Calculate Average thermal_value after average enough times */ thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count); cali_info->thermal_value_delta = thermal_value - hal_data->eeprom_thermal_meter; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, hal_data->eeprom_thermal_meter); } @@ -302,7 +330,7 @@ odm_txpowertracking_callback_thermal_meter( if (cali_info->thermal_value_iqk == 0xff) { /*no PG, use thermal value for IQK*/ cali_info->thermal_value_iqk = thermal_value; delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no PG, use thermal_value for IQK\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no PG, use thermal_value for IQK\n"); } for (p = RF_PATH_A; p < c.rf_path_count; p++) @@ -312,7 +340,7 @@ odm_txpowertracking_callback_thermal_meter( if (!(dm->support_ic_type & ODM_RTL8821)) { /*no PG, do LCK at initial status*/ if (cali_info->thermal_value_lck == 0xff) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no PG, do LCK\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no PG, do LCK\n"); cali_info->thermal_value_lck = thermal_value; /*Use RTLCK, so close power tracking driver LCK*/ @@ -324,13 +352,13 @@ odm_txpowertracking_callback_thermal_meter( delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value); } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK); /* Wait sacn to do LCK by RF Jenyu*/ if( (*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) { /* Delta temperature is equal to or larger than 20 centigrade.*/ if (delta_LCK >= c.threshold_iqk) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); cali_info->thermal_value_lck = thermal_value; /*Use RTLCK, so close power tracking driver LCK*/ @@ -366,51 +394,51 @@ odm_txpowertracking_callback_thermal_meter( cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/ switch (p) { case RF_PATH_B: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]); cali_info->delta_power_index[p] = delta_swing_table_idx_tup_b[delta]; cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; case RF_PATH_C: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]); cali_info->delta_power_index[p] = delta_swing_table_idx_tup_c[delta]; cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; case RF_PATH_D: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]); cali_info->delta_power_index[p] = delta_swing_table_idx_tup_d[delta]; cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; default: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]); cali_info->delta_power_index[p] = delta_swing_table_idx_tup_a[delta]; cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; } } /* JJ ADD 20161014 */ - if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) { + if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | ODM_RTL8192F)) { /*Save xtal_offset from Xtal table*/ cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "[Xtal] delta_swing_table_xtal_up[%d] = %d\n", delta, delta_swing_table_xtal_up[delta]); cali_info->xtal_offset = delta_swing_table_xtal_up[delta]; @@ -426,47 +454,47 @@ odm_txpowertracking_callback_thermal_meter( switch (p) { case RF_PATH_B: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]); cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_b[delta]; cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; case RF_PATH_C: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]); cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_c[delta]; cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; case RF_PATH_D: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]); cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_d[delta]; cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; default: - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]); cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_a[delta]; cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta]; /*Record delta swing for mix mode power tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); break; } } /* JJ ADD 20161014 */ - if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) { + if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | ODM_RTL8192F)) { /*Save xtal_offset from Xtal table*/ cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "[Xtal] delta_swing_table_xtal_down[%d] = %d\n", delta, delta_swing_table_xtal_down[delta]); cali_info->xtal_offset = delta_swing_table_xtal_down[delta]; @@ -479,7 +507,7 @@ odm_txpowertracking_callback_thermal_meter( } for (p = RF_PATH_A; p < c.rf_path_count; p++) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n\n=========================== [path-%d] Calculating power_index_offset===========================\n", p); if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/ @@ -487,7 +515,7 @@ odm_txpowertracking_callback_thermal_meter( else cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "[path-%d] power_index_offset(%d) = delta_power_index(%d) - delta_power_index_last(%d)\n", p, cali_info->power_index_offset[p], cali_info->delta_power_index[p], cali_info->delta_power_index_last[p]); cali_info->OFDM_index[p] = cali_info->bb_swing_idx_ofdm_base[p] + cali_info->power_index_offset[p]; @@ -498,9 +526,9 @@ odm_txpowertracking_callback_thermal_meter( /*************Print BB Swing base and index Offset*************/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, cali_info->power_index_offset[p]); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[p], p, cali_info->bb_swing_idx_ofdm_base[p], cali_info->power_index_offset[p]); /*4 7.1 Handle boundary conditions of index.*/ @@ -511,7 +539,7 @@ odm_txpowertracking_callback_thermal_meter( cali_info->OFDM_index[p] = OFDM_min_index; } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n\n========================================================================================================\n"); if (cali_info->CCK_index > c.swing_table_size_cck - 1) @@ -519,7 +547,7 @@ odm_txpowertracking_callback_thermal_meter( else if (cali_info->CCK_index <= 0) cali_info->CCK_index = 0; } else { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "The thermal meter is unchanged or TxPowerTracking OFF(%d): thermal_value: %d, cali_info->thermal_value: %d\n", cali_info->txpowertrack_control, thermal_value, cali_info->thermal_value); @@ -527,33 +555,36 @@ odm_txpowertracking_callback_thermal_meter( cali_info->power_index_offset[p] = 0; } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", cali_info->CCK_index, cali_info->bb_swing_idx_cck_base); /*Print Swing base & current*/ for (p = RF_PATH_A; p < c.rf_path_count; p++) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n", cali_info->OFDM_index[p], p, cali_info->bb_swing_idx_ofdm_base[p]); } - if ((dm->support_ic_type & ODM_RTL8814A)) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "power_tracking_type=%d\n", power_tracking_type); + if (dm->support_ic_type & ODM_RTL8814B) + power_tracking_type = TSSI_MODE; + + if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8814B)) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "power_tracking_type=%d\n", power_tracking_type); if (power_tracking_type == 0) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); } else if (power_tracking_type == 1) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(2G) TSSI(5G) MODE**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(2G) TSSI(5G) MODE**********\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_2G_TSSI_5G_MODE, p, 0); } else if (power_tracking_type == 2) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(5G) TSSI(2G)MODE**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(5G) TSSI(2G)MODE**********\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_5G_TSSI_2G_MODE, p, 0); } else if (power_tracking_type == 3) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI MODE**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI MODE**********\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, TSSI_MODE, p, 0); } @@ -574,13 +605,13 @@ odm_txpowertracking_callback_thermal_meter( /* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */ if (thermal_value > cali_info->thermal_value) { for (p = RF_PATH_A; p < c.rf_path_count; p++) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", p, cali_info->power_index_offset[p], delta, thermal_value, hal_data->eeprom_thermal_meter, cali_info->thermal_value); } } else if (thermal_value < cali_info->thermal_value) { /*Low temperature*/ for (p = RF_PATH_A; p < c.rf_path_count; p++) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", p, cali_info->power_index_offset[p], delta, thermal_value, hal_data->eeprom_thermal_meter, cali_info->thermal_value); } @@ -592,36 +623,37 @@ odm_txpowertracking_callback_thermal_meter( if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) #endif { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Temperature(%d) higher than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter); if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8821 || dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8723B || dm->support_ic_type == ODM_RTL8814A || dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8822B || - dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */ + dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B || + dm->support_ic_type == ODM_RTL8192F) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); } else { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel); } } else { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Temperature(%d) lower than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter); if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8821 || dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8723B || dm->support_ic_type == ODM_RTL8814A || dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8822B || - dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */ - - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); + dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B || + dm->support_ic_type == ODM_RTL8192F) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, indexforchannel); } else { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); for (p = RF_PATH_A; p < c.rf_path_count; p++) (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel); } @@ -632,7 +664,7 @@ odm_txpowertracking_callback_thermal_meter( for (p = RF_PATH_A; p < c.rf_path_count; p++) cali_info->bb_swing_idx_ofdm_base[p] = cali_info->bb_swing_idx_ofdm[p]; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "cali_info->thermal_value = %d thermal_value= %d\n", cali_info->thermal_value, thermal_value); cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/ @@ -640,27 +672,28 @@ odm_txpowertracking_callback_thermal_meter( } - if (dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */ + if (dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || + dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */ if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (hal_data->eeprom_thermal_meter != 0xff)) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter Xtal Tracking**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter Xtal Tracking**********\n"); #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) if (thermal_value > hal_data->eeprom_thermal_meter) { #else if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) { #endif - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Temperature(%d) higher than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter); (*c.odm_txxtaltrack_set_xtal)(dm); } else { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Temperature(%d) lower than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter); (*c.odm_txxtaltrack_set_xtal)(dm); } } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********End Xtal Tracking**********\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********End Xtal Tracking**********\n"); } #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) @@ -671,7 +704,7 @@ odm_txpowertracking_callback_thermal_meter( /*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ if (delta_IQK >= c.threshold_iqk) { cali_info->thermal_value_iqk = thermal_value; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); if (!cali_info->is_iqk_in_progress) (*c.do_iqk)(dm, delta_IQK, thermal_value, 8); } @@ -679,47 +712,243 @@ odm_txpowertracking_callback_thermal_meter( } if (cali_info->dpk_thermal[RF_PATH_A] != 0) { if (diff_DPK[RF_PATH_A] >= c.threshold_dpk) { - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); - odm_set_bb_reg(dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_A] / c.threshold_dpk)); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); + odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_A] / c.threshold_dpk)); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); } else if ((diff_DPK[RF_PATH_A] <= -1 * c.threshold_dpk)) { s32 value = 0x20 + (diff_DPK[RF_PATH_A] / c.threshold_dpk); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); - odm_set_bb_reg(dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); + odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); } else { - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); - odm_set_bb_reg(dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); + odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); } } if (cali_info->dpk_thermal[RF_PATH_B] != 0) { if (diff_DPK[RF_PATH_B] >= c.threshold_dpk) { - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); - odm_set_bb_reg(dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_B] / c.threshold_dpk)); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); + odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_B] / c.threshold_dpk)); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); } else if ((diff_DPK[RF_PATH_B] <= -1 * c.threshold_dpk)) { s32 value = 0x20 + (diff_DPK[RF_PATH_B] / c.threshold_dpk); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); - odm_set_bb_reg(dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); + odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); } else { - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); - odm_set_bb_reg(dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0); - odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); + odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0); + odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); } } #endif - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "<===odm_txpowertracking_callback_thermal_meter\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===odm_txpowertracking_callback_thermal_meter\n"); cali_info->tx_powercount = 0; } +#if (RTL8822C_SUPPORT == 1) +void +odm_txpowertracking_new_callback_thermal_meter(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + struct dm_iqk_info *iqk_info = &dm->IQK_info; + struct _hal_rf_ *rf = &dm->rf_table; + struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; + u8 thermal_value[MAX_RF_PATH] = {0}, delta[MAX_RF_PATH] = {0}; + u8 delta_swing_table_idx_tup[DELTA_SWINGIDX_SIZE] = {0}; + u8 delta_swing_table_idx_tdown[DELTA_SWINGIDX_SIZE] = {0}; + u8 delta_LCK = 0, delta_IQK = 0, i = 0, j = 0, p; + u8 thermal_value_avg_count[MAX_RF_PATH] = {0}; + u32 thermal_value_avg[MAX_RF_PATH] = {0}; + s8 thermal_value_temp[MAX_RF_PATH] = {0}; + struct txpwrtrack_cfg c; + + u8 *delta_swing_table_idx_tup_a = NULL; + u8 *delta_swing_table_idx_tdown_a = NULL; + u8 *delta_swing_table_idx_tup_b = NULL; + u8 *delta_swing_table_idx_tdown_b = NULL; + u8 *delta_swing_table_idx_tup_c = NULL; + u8 *delta_swing_table_idx_tdown_c = NULL; + u8 *delta_swing_table_idx_tup_d = NULL; + u8 *delta_swing_table_idx_tdown_d = NULL; + + configure_txpower_track(dm, &c); + + (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a, + (u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b); + + cali_info->txpowertracking_callback_cnt++; + cali_info->is_txpowertracking_init = true; + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n", + cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], cali_info->default_ofdm_index); + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "cali_info->txpowertrack_control=%d, tssi->thermal[RF_PATH_A]=%d tssi->thermal[RF_PATH_B]=%d\n", + cali_info->txpowertrack_control, tssi->thermal[RF_PATH_A], tssi->thermal[RF_PATH_B]); + + thermal_value[RF_PATH_A] = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ + thermal_value[RF_PATH_B] = (u8)odm_get_rf_reg(dm, RF_PATH_B, c.thermal_reg_addr, 0xfc00); + + for (i = 0; i < c.rf_path_count; i++) { + thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm); + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "thermal_value_temp[%d](%d) = thermal_value[%d](%d) + power_time_thermal(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm)); + + if (thermal_value_temp[i] > 63) + thermal_value[i] = 63; + else if (thermal_value_temp[i] < 0) + thermal_value[i] = 0; + else + thermal_value[i] = thermal_value_temp[i]; + } + + if (tssi->thermal[RF_PATH_A] == 0xff || tssi->thermal[RF_PATH_B] == 0xff) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no pg, tssi->thermal[A] = 0x%x tssi->thermal[B] = 0x%x\n", + tssi->thermal[RF_PATH_A], tssi->thermal[RF_PATH_B]); + return; + } + + for (j = 0; j < c.rf_path_count; j++) { + cali_info->thermal_value_avg_path[j][cali_info->thermal_value_avg_index_path[j]] = thermal_value[j]; + cali_info->thermal_value_avg_index_path[j]++; + if (cali_info->thermal_value_avg_index_path[j] == c.average_thermal_num) /*Average times = c.average_thermal_num*/ + cali_info->thermal_value_avg_index_path[j] = 0; + + + for (i = 0; i < c.average_thermal_num; i++) { + if (cali_info->thermal_value_avg_path[j][i]) { + thermal_value_avg[j] += cali_info->thermal_value_avg_path[j][i]; + thermal_value_avg_count[j]++; + } + } + + if (thermal_value_avg_count[j]) { /* Calculate Average thermal_value after average enough times */ + thermal_value[j] = (u8)(thermal_value_avg[j] / thermal_value_avg_count[j]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "AVG Thermal Meter = 0x%X, tssi->thermal[A] = 0x%x tssi->thermal[B] = 0x%x\n", + thermal_value[j], tssi->thermal[RF_PATH_A], tssi->thermal[RF_PATH_B]); + } + /* 4 5. Calculate delta, delta_LCK, delta_IQK. */ + + /* "delta" here is used to determine whether thermal value changes or not. */ + delta[j] = (thermal_value[j] > cali_info->thermal_value_path[j]) ? (thermal_value[j] - cali_info->thermal_value_path[j]) : (cali_info->thermal_value_path[j] - thermal_value[j]); + delta_LCK = (thermal_value[0] > cali_info->thermal_value_lck) ? (thermal_value[0] - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value[0]); + delta_IQK = (thermal_value[0] > cali_info->thermal_value_iqk) ? (thermal_value[0] - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value[0]); + } + + /*4 6. If necessary, do LCK.*/ + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", RF_PATH_A, delta[RF_PATH_A], delta_LCK, delta_IQK); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", RF_PATH_B, delta[RF_PATH_B], delta_LCK, delta_IQK); + + /* Wait sacn to do LCK by RF Jenyu*/ + if( (*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) { + /* Delta temperature is equal to or larger than 20 centigrade.*/ + if (delta_LCK >= c.threshold_iqk) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); + cali_info->thermal_value_lck = thermal_value[RF_PATH_A]; + + /*Use RTLCK, so close power tracking driver LCK*/ + if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) { + if (c.phy_lc_calibrate) + (*c.phy_lc_calibrate)(dm); + } else + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do not do LCK\n"); + } + } + + /*3 7. If necessary, move the index of swing table to adjust Tx power.*/ + for (i = 0; i < c.rf_path_count; i++) { + if (i == RF_PATH_B) { + odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_b, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_b, DELTA_SWINGIDX_SIZE); + } else if (i == RF_PATH_C) { + odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_c, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_c, DELTA_SWINGIDX_SIZE); + } else if (i == RF_PATH_D) { + odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_d, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_d, DELTA_SWINGIDX_SIZE); + } else { + odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_a, DELTA_SWINGIDX_SIZE); + } + + cali_info->delta_power_index_last[i] = cali_info->delta_power_index[i]; /*recording poer index offset*/ + delta[i] = thermal_value[i] > tssi->thermal[i] ? (thermal_value[i] - tssi->thermal[i]) : (tssi->thermal[i] - thermal_value[i]); + + if (delta[i] >= TXPWR_TRACK_TABLE_SIZE) + delta[i] = TXPWR_TRACK_TABLE_SIZE - 1; + + if (thermal_value[i] > tssi->thermal[i]) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tup[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tup[delta[i]], i); + + cali_info->delta_power_index[i] = delta_swing_table_idx_tup[delta[i]]; + cali_info->absolute_ofdm_swing_idx[i] = delta_swing_table_idx_tup[delta[i]]; /*Record delta swing for mix mode power tracking*/ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is higher and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i); + } else { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "delta_swing_table_idx_tdown[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tdown[delta[i]], i); + cali_info->delta_power_index[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; + cali_info->absolute_ofdm_swing_idx[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; /*Record delta swing for mix mode power tracking*/ + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Temp is lower and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i); + } + } + + for (p = RF_PATH_A; p < c.rf_path_count; p++) { + if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/ + cali_info->power_index_offset[p] = 0; + else + cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/ + } + + if ((cali_info->power_index_offset[RF_PATH_A] != 0 || + cali_info->power_index_offset[RF_PATH_B] != 0 || + cali_info->power_index_offset[RF_PATH_C] != 0 || + cali_info->power_index_offset[RF_PATH_D] != 0)) { + + if (dm->support_ic_type == ODM_RTL8822C) { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); + } else { + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); + for (p = RF_PATH_A; p < c.rf_path_count; p++) + (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0); + } + } else + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "TXAGC offset is unchanged\n"); + + /* Wait sacn to do IQK by RF Jenyu*/ + if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) { + /*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ + if (delta_IQK >= c.threshold_iqk) { + cali_info->thermal_value_iqk = thermal_value[RF_PATH_A]; + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); + if (!cali_info->is_iqk_in_progress) + (*c.do_iqk)(dm, delta_IQK, thermal_value[RF_PATH_A], 8); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do IQK\n"); + } + } + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===%s\n", __func__); + + cali_info->tx_powercount = 0; +} +#endif /* 3============================================================ * 3 IQ Calibration @@ -760,7 +989,7 @@ odm_iq_calibrate( void *adapter = dm->adapter; struct dm_iqk_info *iqk_info = &dm->IQK_info; - RT_TRACE(COMP_SCAN, ODM_DBG_LOUD, ("=>%s\n" , __FUNCTION__)); + RF_DBG(dm, DBG_RF_IQK, "=>%s\n",__FUNCTION__); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) if (*dm->is_fcs_mode_enable) @@ -768,8 +997,8 @@ odm_iq_calibrate( #endif if ((dm->is_linked) && (!iqk_info->rfk_forbidden)) { - RT_TRACE(COMP_SCAN, ODM_DBG_LOUD, ("interval=%d ch=%d prech=%d scan=%s\n", dm->linked_interval, - *dm->channel, dm->pre_channel, *dm->is_scan_in_process == TRUE ? "TRUE":"FALSE")); + RF_DBG(dm, DBG_RF_IQK, "interval=%d ch=%d prech=%d scan=%s\n", dm->linked_interval, + *dm->channel, dm->pre_channel, *dm->is_scan_in_process == TRUE ? "TRUE":"FALSE"); if (*dm->channel != dm->pre_channel) { dm->pre_channel = *dm->channel; @@ -780,12 +1009,12 @@ odm_iq_calibrate( dm->linked_interval++; if (dm->linked_interval == 2) - PHY_IQCalibrate((PADAPTER)adapter, false); + PHY_IQCalibrate(adapter, false); } else dm->linked_interval = 0; - RT_TRACE(COMP_SCAN, ODM_DBG_LOUD, ("<=%s interval=%d ch=%d prech=%d scan=%s\n", __FUNCTION__, dm->linked_interval, - *dm->channel, dm->pre_channel, *dm->is_scan_in_process == TRUE?"TRUE":"FALSE")); + RF_DBG(dm, DBG_RF_IQK, "<=%s interval=%d ch=%d prech=%d scan=%s\n", __FUNCTION__, dm->linked_interval, + *dm->channel, dm->pre_channel, *dm->is_scan_in_process == TRUE?"TRUE":"FALSE"); } void phydm_rf_init(struct dm_struct *dm) @@ -806,12 +1035,25 @@ void phydm_rf_init(struct dm_struct *dm) } -void phydm_rf_watchdog(struct dm_struct *dm) +void phydm_rf_watchdog(struct dm_struct *dm) { +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) +#if (MP_DRIVER == 1) + /*struct _ADAPTER *adapter = dm->adapter;*/ + /*PMPT_CONTEXT p_mpt_ctx = &(adapter->MptCtx);*/ +#endif + FunctionIn(COMP_MLME); -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - odm_txpowertracking_check(dm); - if (dm->support_ic_type & ODM_IC_11AC_SERIES) - odm_iq_calibrate(dm); + if (*dm->mp_mode == 1) { +#if (MP_DRIVER == 1) + /*if (p_mpt_ctx->bTxPowerTrackOn)*/ + odm_txpowertracking_check(dm); +#endif + } else { + odm_txpowertracking_check(dm); + + if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) + odm_iq_calibrate(dm); + } #endif } diff --git a/hal/phydm/halrf/halphyrf_win.h b/hal/phydm/halrf/halphyrf_win.h index 0d36a75..4deea57 100644 --- a/hal/phydm/halrf/halphyrf_win.h +++ b/hal/phydm/halrf/halphyrf_win.h @@ -13,43 +13,33 @@ * *****************************************************************************/ -#ifndef __HAL_PHY_RF_H__ -#define __HAL_PHY_RF_H__ +#ifndef __HALPHYRF_H__ +#define __HALPHYRF_H__ #if (RTL8814A_SUPPORT == 1) - #if RT_PLATFORM == PLATFORM_MACOSX - #include "rtl8814a/halrf_iqk_8814a.h" - #else - #include "halrf/rtl8814a/halrf_iqk_8814a.h" - #endif + #include "halrf/rtl8814a/halrf_iqk_8814a.h" #endif #if (RTL8822B_SUPPORT == 1) - #if RT_PLATFORM == PLATFORM_MACOSX - #include "rtl8822b/halrf_iqk_8822b.h" - #include "../../MAC/Halmac_type.h" - #else - #include "halrf/rtl8822b/halrf_iqk_8822b.h" - #include "../mac/Halmac_type.h" - #endif + #include "halrf/rtl8822b/halrf_iqk_8822b.h" + #include "../mac/Halmac_type.h" #endif - -#if RT_PLATFORM == PLATFORM_MACOSX - #include "halrf_powertracking_win.h" - #include "halrf_kfree.h" - #include "halrf_txgapcal.h" -#else - #include "halrf/halrf_powertracking_win.h" - #include "halrf/halrf_kfree.h" - #include "halrf/halrf_txgapcal.h" -#endif - +#include "halrf/halrf_powertracking_win.h" +#include "halrf/halrf_kfree.h" +#include "halrf/halrf_txgapcal.h" #if (RTL8821C_SUPPORT == 1) - #if RT_PLATFORM == PLATFORM_MACOSX - #include "rtl8821c/halrf_iqk_8821c.h" - #else - #include "halrf/rtl8821c/halrf_iqk_8821c.h" - #endif + #include "halrf/rtl8821c/halrf_iqk_8821c.h" +#endif + +#if (RTL8195B_SUPPORT == 1) +// #include "halrf/rtl8195b/halrf.h" + #include "halrf/rtl8195b/halrf_iqk_8195b.h" + #include "halrf/rtl8195b/halrf_txgapk_8195b.h" + #include "halrf/rtl8195b/halrf_dpk_8195b.h" +#endif + +#if (RTL8814B_SUPPORT == 1) + #include "halrf/rtl8814b/halrf_iqk_8814b.h" #endif enum spur_cal_method { @@ -63,7 +53,8 @@ enum pwrtrack_method { MIX_MODE, TSSI_MODE, MIX_2G_TSSI_5G_MODE, - MIX_5G_TSSI_2G_MODE + MIX_5G_TSSI_2G_MODE, + CLEAN_MODE }; typedef void(*func_set_pwr)(void *, enum pwrtrack_method, u8, u8); @@ -114,7 +105,10 @@ odm_txpowertracking_callback_thermal_meter( #endif ); - +#if (RTL8822C_SUPPORT == 1) +void +odm_txpowertracking_new_callback_thermal_meter(void *dm_void); +#endif #define ODM_TARGET_CHNL_NUM_2G_5G 59 @@ -132,4 +126,4 @@ void odm_iq_calibrate(struct dm_struct *dm); void phydm_rf_init(struct dm_struct *dm); void phydm_rf_watchdog(struct dm_struct *dm); -#endif /* #ifndef __HAL_PHY_RF_H__ */ +#endif /*#ifndef __HALPHYRF_H__*/ diff --git a/hal/phydm/halrf/halrf.c b/hal/phydm/halrf/halrf.c index 9760014..412bed5 100644 --- a/hal/phydm/halrf/halrf.c +++ b/hal/phydm/halrf/halrf.c @@ -23,72 +23,45 @@ * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * include files - * ************************************************************ */ + * ************************************************************ + */ #include "mp_precomp.h" #include "phydm_precomp.h" -void halrf_basic_profile( - void *dm_void, - u32 *_used, - char *output, - u32 *_out_len -) +#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ + RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ + RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ + RTL8812F_SUPPORT == 1) + +void _iqk_check_if_reload(void *dm_void) { -#ifdef CONFIG_PHYDM_DEBUG_FUNCTION - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 used = *_used; - u32 out_len = *_out_len; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_iqk_info *iqk_info = &dm->IQK_info; - /* HAL RF version List */ - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-35s\n", "% HAL RF version %"); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "Power Tracking", - HALRF_POWRTRACKING_VER); - - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s %s\n", "IQK", - (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD)? "FW" : HALRF_IQK_VER, - (halrf_match_iqk_version(dm_void))? "(match)" : "(mismatch)"); - - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "LCK", HALRF_LCK_VER); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "DPK", HALRF_DPK_VER); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "KFREE", HALRF_KFREE_VER); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "TX 2G Current Calibration", - HALRF_PABIASK_VER); - - *_used = used; - *_out_len = out_len; -#endif + iqk_info->is_reload = (boolean)odm_get_bb_reg(dm, R_0x1bf0, BIT(16)); } -#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) -void -_iqk_page_switch( - void *dm_void) +void _iqk_page_switch(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - if (dm->support_ic_type == ODM_RTL8821C) + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ic_type == ODM_RTL8821C) odm_write_4byte(dm, 0x1b00, 0xf8000008); - else + else odm_write_4byte(dm, 0x1b00, 0xf800000a); } u32 halrf_psd_log2base(u32 val) { - u8 j; - u32 tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0; - u32 result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200, - 174, 151, 132, 115, 100, 86, 74, 62, 51, 42, - 32, 23, 15, 7, 0 - }; + u8 j; + u32 tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0; + u32 result, val_fractiond_b = 0; + u32 table_fraction[21] = { + 0, 432, 332, 274, 232, 200, 174, 151, 132, 115, + 100, 86, 74, 62, 51, 42, 32, 23, 15, 7, 0}; if (val == 0) return 0; @@ -103,7 +76,6 @@ u32 halrf_psd_log2base(u32 val) shiftcount++; } - val_integerd_b = shiftcount + 1; tmp2 = 1; @@ -119,50 +91,42 @@ u32 halrf_psd_log2base(u32 val) val_fractiond_b = table_fraction[tindex]; result = val_integerd_b * 100 - val_fractiond_b; - + return result; - - } -void phydm_get_iqk_cfir( - void *dm_void, - u8 idx, - u8 path, - boolean debug -) +void phydm_get_iqk_cfir(void *dm_void, u8 idx, u8 path, boolean debug) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_iqk_info *iqk_info = &dm->IQK_info; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + u8 i, ch; u32 tmp; + u32 bit_mask_20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16); if (debug) ch = 2; else ch = 0; - odm_set_bb_reg(dm, 0x1b00, MASKDWORD, 0xf8000008 | path << 1); + + odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, 0xf8000008 | path << 1); if (idx == 0) - odm_set_bb_reg(dm, 0x1b0c, BIT(13) | BIT(12), 0x3); + odm_set_bb_reg(dm, R_0x1b0c, BIT(13) | BIT(12), 0x3); else - odm_set_bb_reg(dm, 0x1b0c, BIT(13) | BIT(12), 0x1); - odm_set_bb_reg(dm, 0x1bd4, BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16), 0x10); + odm_set_bb_reg(dm, R_0x1b0c, BIT(13) | BIT(12), 0x1); + odm_set_bb_reg(dm, R_0x1bd4, bit_mask_20_16, 0x10); for (i = 0; i < 8; i++) { - odm_set_bb_reg(dm, 0x1bd8, MASKDWORD, 0xe0000001 + (i * 4)); - tmp = odm_get_bb_reg(dm, 0x1bfc, MASKDWORD); - iqk_info->iqk_cfir_real[ch][path][idx][i] = (tmp & 0x0fff0000) >> 16; - iqk_info->iqk_cfir_imag[ch][path][idx][i] = tmp & 0xfff; + odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0xe0000001 + (i * 4)); + tmp = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD); + iqk_info->iqk_cfir_real[ch][path][idx][i] = + (u16)((tmp & 0x0fff0000) >> 16); + iqk_info->iqk_cfir_imag[ch][path][idx][i] = (u16)(tmp & 0xfff); } - odm_set_bb_reg(dm, 0x1bd8, MASKDWORD, 0x0); - odm_set_bb_reg(dm, 0x1b0c, BIT(13) | BIT(12), 0x0); + odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x0); + odm_set_bb_reg(dm, R_0x1b0c, BIT(13) | BIT(12), 0x0); } -void -halrf_iqk_xym_enable( - struct dm_struct *dm, - u8 xym_enable - ) +void halrf_iqk_xym_enable(struct dm_struct *dm, u8 xym_enable) { struct dm_iqk_info *iqk_info = &dm->IQK_info; @@ -171,18 +135,15 @@ halrf_iqk_xym_enable( else iqk_info->xym_read = true; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-20s %s\n", "xym_read = ", (iqk_info->xym_read ? "true": "false")); + RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s %s\n", "xym_read = ", + (iqk_info->xym_read ? "true" : "false")); } -void -halrf_iqk_xym_read( - void *dm_void, - u8 path, - u8 xym_type /*0: rx_sym; 1: tx_xym; 2:gs1_xym; 3:gs2_sym; 4: rxk1_xym*/ - ) +/*xym_type => 0: rx_sym; 1: tx_xym; 2:gs1_xym; 3:gs2_sym; 4: rxk1_xym*/ +void halrf_iqk_xym_read(void *dm_void, u8 path, u8 xym_type) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_iqk_info *iqk_info = &dm->IQK_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_iqk_info *iqk_info = &dm->IQK_info; u8 i, start, num; u32 tmp1, tmp2; @@ -192,61 +153,65 @@ halrf_iqk_xym_read( if (*dm->band_width == 0) { start = 3; num = 4; - }else if (*dm->band_width == 1) { + } else if (*dm->band_width == 1) { start = 2; num = 6; - }else { + } else { start = 0; - num = 10; - } - + num = 10; + } + odm_write_4byte(dm, 0x1b00, 0xf8000008); - tmp1 = odm_read_4byte(dm, 0x1b1c); + tmp1 = odm_read_4byte(dm, 0x1b1c); odm_write_4byte(dm, 0x1b1c, 0xa2193c32); - odm_write_4byte(dm, 0x1b00, 0xf800000a); - tmp2 = odm_read_4byte(dm, 0x1b1c); + odm_write_4byte(dm, 0x1b00, 0xf800000a); + tmp2 = odm_read_4byte(dm, 0x1b1c); odm_write_4byte(dm, 0x1b1c, 0xa2193c32); - for (path = 0; path < 2; path ++) { + for (path = 0; path < 2; path++) { odm_write_4byte(dm, 0x1b00, 0xf8000008 | path << 1); - switch(xym_type){ - case 0: - for (i = 0; i < num ;i++) { - odm_write_4byte(dm, 0x1b14, 0xe6+start+i); - odm_write_4byte(dm, 0x1b14, 0x0); - iqk_info->rx_xym[path][i] = odm_read_4byte(dm, 0x1b38); - } + switch (xym_type) { + case 0: + for (i = 0; i < num; i++) { + odm_write_4byte(dm, 0x1b14, 0xe6 + start + i); + odm_write_4byte(dm, 0x1b14, 0x0); + iqk_info->rx_xym[path][i] = + odm_read_4byte(dm, 0x1b38); + } break; - case 1: - for (i = 0; i < num ;i++) { - odm_write_4byte(dm, 0x1b14, 0xe6+start+i); - odm_write_4byte(dm, 0x1b14, 0x0); - iqk_info->tx_xym[path][i] = odm_read_4byte(dm, 0x1b38); - } + case 1: + for (i = 0; i < num; i++) { + odm_write_4byte(dm, 0x1b14, 0xe6 + start + i); + odm_write_4byte(dm, 0x1b14, 0x0); + iqk_info->tx_xym[path][i] = + odm_read_4byte(dm, 0x1b38); + } break; - case 2: - for (i = 0; i < 6 ;i++) { - odm_write_4byte(dm, 0x1b14, 0xe0+i); - odm_write_4byte(dm, 0x1b14, 0x0); - iqk_info->gs1_xym[path][i] = odm_read_4byte(dm, 0x1b38); - } + case 2: + for (i = 0; i < 6; i++) { + odm_write_4byte(dm, 0x1b14, 0xe0 + i); + odm_write_4byte(dm, 0x1b14, 0x0); + iqk_info->gs1_xym[path][i] = + odm_read_4byte(dm, 0x1b38); + } break; - case 3: - for (i = 0; i < 6 ;i++) { - odm_write_4byte(dm, 0x1b14, 0xe0+i); - odm_write_4byte(dm, 0x1b14, 0x0); - iqk_info->gs2_xym[path][i] = odm_read_4byte(dm, 0x1b38); - } - break; - case 4: - for (i = 0; i < 6 ;i++) { - odm_write_4byte(dm, 0x1b14, 0xe0+i); - odm_write_4byte(dm, 0x1b14, 0x0); - iqk_info->rxk1_xym[path][i] = odm_read_4byte(dm, 0x1b38); - } + case 3: + for (i = 0; i < 6; i++) { + odm_write_4byte(dm, 0x1b14, 0xe0 + i); + odm_write_4byte(dm, 0x1b14, 0x0); + iqk_info->gs2_xym[path][i] = + odm_read_4byte(dm, 0x1b38); + } + break; + case 4: + for (i = 0; i < 6; i++) { + odm_write_4byte(dm, 0x1b14, 0xe0 + i); + odm_write_4byte(dm, 0x1b14, 0x0); + iqk_info->rxk1_xym[path][i] = + odm_read_4byte(dm, 0x1b38); + } break; - } odm_write_4byte(dm, 0x1b38, 0x20000000); odm_write_4byte(dm, 0x1b00, 0xf8000008); @@ -257,17 +222,15 @@ halrf_iqk_xym_read( } } -void halrf_iqk_xym_show( - struct dm_struct *dm, - u8 xym_type /*0: rx_sym; 1: tx_xym; 2:gs1_xym; 3:gs2_sym; 4: rxk1_xym*/ - ) +/*xym_type => 0: rx_sym; 1: tx_xym; 2:gs1_xym; 3:gs2_sym; 4: rxk1_xym*/ +void halrf_iqk_xym_show(struct dm_struct *dm, u8 xym_type) { - u8 num, path, path_num, i; - struct dm_iqk_info *iqk_info = &dm->IQK_info; + u8 num, path, path_num, i; + struct dm_iqk_info *iqk_info = &dm->IQK_info; - if (dm->rf_type ==RF_1T1R) + if (dm->rf_type == RF_1T1R) path_num = 0x1; - else if (dm->rf_type ==RF_2T2R) + else if (dm->rf_type == RF_2T2R) path_num = 0x2; else path_num = 0x4; @@ -278,435 +241,429 @@ void halrf_iqk_xym_show( num = 6; else num = 10; - - for (path = 0; path < path_num; path ++) { - switch (xym_type){ + + for (path = 0; path < path_num; path++) { + switch (xym_type) { case 0: - for (i = 0 ; i < num; i ++) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-20s %-2d: 0x%x\n", - (path == 0) ? "PATH A RX-XYM ": "PATH B RX-XYM", i, iqk_info->rx_xym[path][i]); + for (i = 0; i < num; i++) + RF_DBG(dm, DBG_RF_IQK, + "[IQK]%-20s %-2d: 0x%x\n", + (path == 0) ? "PATH A RX-XYM " : + "PATH B RX-XYM", i, + iqk_info->rx_xym[path][i]); break; case 1: - for (i = 0 ; i < num; i ++) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-20s %-2d: 0x%x\n", - (path == 0) ? "PATH A TX-XYM ": "PATH B TX-XYM", i, iqk_info->tx_xym[path][i]); + for (i = 0; i < num; i++) + RF_DBG(dm, DBG_RF_IQK, + "[IQK]%-20s %-2d: 0x%x\n", + (path == 0) ? "PATH A TX-XYM " : + "PATH B TX-XYM", i, + iqk_info->tx_xym[path][i]); break; case 2: - for (i = 0 ; i < 6; i ++) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-20s %-2d: 0x%x\n", - (path == 0) ? "PATH A GS1-XYM ": "PATH B GS1-XYM", i, iqk_info->gs1_xym[path][i]); + for (i = 0; i < 6; i++) + RF_DBG(dm, DBG_RF_IQK, + "[IQK]%-20s %-2d: 0x%x\n", + (path == 0) ? "PATH A GS1-XYM " : + "PATH B GS1-XYM", i, + iqk_info->gs1_xym[path][i]); break; case 3: - for (i = 0 ; i < 6; i ++) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-20s %-2d: 0x%x\n", - (path == 0) ? "PATH A GS2-XYM ": "PATH B GS2-XYM", i, iqk_info->gs2_xym[path][i]); + for (i = 0; i < 6; i++) + RF_DBG(dm, DBG_RF_IQK, + "[IQK]%-20s %-2d: 0x%x\n", + (path == 0) ? "PATH A GS2-XYM " : + "PATH B GS2-XYM", i, + iqk_info->gs2_xym[path][i]); break; - case 4: - for (i = 0 ; i < 6; i ++) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-20s %-2d: 0x%x\n", - (path == 0) ? "PATH A RXK1-XYM ": "PATH B RXK1-XYM", i, iqk_info->rxk1_xym[path][i]); + case 4: + for (i = 0; i < 6; i++) + RF_DBG(dm, DBG_RF_IQK, + "[IQK]%-20s %-2d: 0x%x\n", + (path == 0) ? "PATH A RXK1-XYM " : + "PATH B RXK1-XYM", i, + iqk_info->rxk1_xym[path][i]); break; } } } - -void -halrf_iqk_xym_dump( - void *dm_void - ) +void halrf_iqk_xym_dump(void *dm_void) { u32 tmp1, tmp2; - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; odm_write_4byte(dm, 0x1b00, 0xf8000008); - tmp1 = odm_read_4byte(dm, 0x1b1c); - odm_write_4byte(dm, 0x1b00, 0xf800000a); - tmp2 = odm_read_4byte(dm, 0x1b1c); - /*halrf_iqk_xym_read(dm, xym_type);*/ - odm_write_4byte(dm, 0x1b00, 0xf8000008); - odm_write_4byte(dm, 0x1b1c, tmp1); - odm_write_4byte(dm, 0x1b00, 0xf800000a); - odm_write_4byte(dm, 0x1b1c, tmp2); - _iqk_page_switch(dm); + tmp1 = odm_read_4byte(dm, 0x1b1c); + odm_write_4byte(dm, 0x1b00, 0xf800000a); + tmp2 = odm_read_4byte(dm, 0x1b1c); +#if 0 + /*halrf_iqk_xym_read(dm, xym_type);*/ +#endif + odm_write_4byte(dm, 0x1b00, 0xf8000008); + odm_write_4byte(dm, 0x1b1c, tmp1); + odm_write_4byte(dm, 0x1b00, 0xf800000a); + odm_write_4byte(dm, 0x1b1c, tmp2); + _iqk_page_switch(dm); } -void halrf_iqk_info_dump( - void *dm_void, - u32 *_used, - char *output, - u32 *_out_len) +void halrf_iqk_info_dump(void *dm_void, u32 *_used, char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; u32 used = *_used; - u32 out_len = *_out_len; - u8 path, num, i; - + u32 out_len = *_out_len; u8 rf_path, j, reload_iqk = 0; u32 tmp; - boolean iqk_result[2][NUM][2]; /*two channel, PATH, TX/RX, 0:pass 1 :fail*/ - struct dm_iqk_info *iqk_info = &dm->IQK_info; + /*two channel, PATH, TX/RX, 0:pass 1 :fail*/ + boolean iqk_result[2][NUM][2]; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + + if (!(dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C))) + return; /* IQK INFO */ - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s\n", "% IQK Info %"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s\n", - (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW-IQK" : "Driver-IQK"); + PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s\n", + "% IQK Info %"); + PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s\n", + (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW-IQK" : + "Driver-IQK"); - reload_iqk = (u8)odm_get_bb_reg(dm, 0x1bf0, BIT(16)); - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %s\n", - "reload", (reload_iqk) ? "True" : "False"); + reload_iqk = (u8)odm_get_bb_reg(dm, R_0x1bf0, BIT(16)); + PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", + "reload", (reload_iqk) ? "True" : "False"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %s\n", - "rfk_forbidden", (iqk_info->rfk_forbidden) ? "True" : "False"); -#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %s\n", - "segment_iqk", (iqk_info->segment_iqk) ? "True" : "False"); + PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", + "rfk_forbidden", (iqk_info->rfk_forbidden) ? "True" : "False"); +#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || \ + RTL8821C_SUPPORT == 1 || RTL8195B_SUPPORT == 1 ||\ + RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1) + PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", + "segment_iqk", (iqk_info->segment_iqk) ? "True" : "False"); #endif - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s:%d %d\n", - "iqk count / fail count", dm->n_iqk_cnt, dm->n_iqk_fail_cnt); + PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s:%d %d\n", + "iqk count / fail count", dm->n_iqk_cnt, dm->n_iqk_fail_cnt); - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %d\n", - "channel", *dm->channel); + PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %d\n", + "channel", *dm->channel); if (*dm->band_width == CHANNEL_WIDTH_20) PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %s\n", - "bandwidth", "BW_20"); + "%-20s: %s\n", "bandwidth", "BW_20"); else if (*dm->band_width == CHANNEL_WIDTH_40) PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %s\n", - "bandwidth", "BW_40"); + "%-20s: %s\n", "bandwidth", "BW_40"); else if (*dm->band_width == CHANNEL_WIDTH_80) PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %s\n", - "bandwidth", "BW_80"); + "%-20s: %s\n", "bandwidth", "BW_80"); else if (*dm->band_width == CHANNEL_WIDTH_160) PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %s\n", - "bandwidth", "BW_160"); + "%-20s: %s\n", "bandwidth", "BW_160"); else PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %s\n", - "bandwidth", "BW_UNKNOW"); + "%-20s: %s\n", "bandwidth", "BW_UNKNOWN"); PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %llu %s\n", - "progressing_time", dm->rf_calibrate_info.iqk_total_progressing_time, "(ms)"); - + "%-20s: %llu %s\n", "progressing_time", + dm->rf_calibrate_info.iqk_total_progressing_time, "(ms)"); + tmp = odm_read_4byte(dm, 0x1bf0); - for(rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) - for(j = 0; j < 2; j++) - iqk_result[0][rf_path][j] = (boolean)(tmp & BIT(rf_path + (j * 4)) >> (rf_path + (j * 4))); + for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) + for (j = 0; j < 2; j++) + iqk_result[0][rf_path][j] = (boolean) + (tmp & (BIT(rf_path + (j * 4)) >> (rf_path + (j * 4)))); PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: 0x%08x\n","Reg0x1bf0", tmp); - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %s\n", - "PATH_A-Tx result", (iqk_result[0][RF_PATH_A][0]) ? "Fail" : "Pass"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %s\n", - "PATH_A-Rx result", (iqk_result[0][RF_PATH_A][1]) ? "Fail" : "Pass"); -#if (RTL8822B_SUPPORT == 1) - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %s\n", - "PATH_B-Tx result", (iqk_result[0][RF_PATH_B][0]) ? "Fail" : "Pass"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-20s: %s\n", - "PATH_B-Rx result", (iqk_result[0][RF_PATH_B][1]) ? "Fail" : "Pass"); + "%-20s: 0x%08x\n", "Reg0x1bf0", tmp); + PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", + "PATH_A-Tx result", + (iqk_result[0][RF_PATH_A][0]) ? "Fail" : "Pass"); + PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", + "PATH_A-Rx result", + (iqk_result[0][RF_PATH_A][1]) ? "Fail" : "Pass"); +#if (RTL8822B_SUPPORT == 1) + PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", + "PATH_B-Tx result", + (iqk_result[0][RF_PATH_B][0]) ? "Fail" : "Pass"); + PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", + "PATH_B-Rx result", + (iqk_result[0][RF_PATH_B][1]) ? "Fail" : "Pass"); #endif *_used = used; *_out_len = out_len; - } -void halrf_get_fw_version(void *dm_void) +void halrf_get_fw_version(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _hal_rf_ *rf = &dm->rf_table; + struct _hal_rf_ *rf = &dm->rf_table; -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - { - void *adapter = dm->adapter; - - rf->fw_ver = (((PADAPTER)adapter)->MgntInfo.FirmwareVersion << 16) | ((PADAPTER)adapter)->MgntInfo.FirmwareSubVersion; - } -#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) - { - struct rtl8192cd_priv *priv = dm->priv; - - rf->fw_ver = (priv->pshare->fw_version << 16) | priv->pshare->fw_sub_version; - } -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - { - struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; - struct rtl_hal *rtlhal = rtl_hal(rtlpriv); - - rf->fw_ver = (rtlhal->fw_version << 16) | rtlhal->fw_subversion; - } -#else - { - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - - rf->fw_ver = (hal_data->firmware_version << 16) | hal_data->firmware_sub_version; - } -#endif + rf->fw_ver = (dm->fw_version << 16) | dm->fw_sub_version; } - - -void halrf_iqk_dbg(void *dm_void) +void halrf_iqk_dbg(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 rf_path, j, reload_iqk = 0; - u8 path, num, i; + u8 rf_path, j; u32 tmp; - boolean iqk_result[2][NUM][2]; /*two channel, PATH, TX/RX, 0:pass 1 :fail*/ - struct dm_iqk_info *iqk_info = &dm->IQK_info; - struct _hal_rf_ *rf = &dm->rf_table; + /*two channel, PATH, TX/RX, 0:pass 1 :fail*/ + boolean iqk_result[2][NUM][2]; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + struct _hal_rf_ *rf = &dm->rf_table; /* IQK INFO */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s\n", "====== IQK Info ======"); + RF_DBG(dm, DBG_RF_IQK, "%-20s\n", "====== IQK Info ======"); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s\n", - (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW-IQK" : "Driver-IQK"); + RF_DBG(dm, DBG_RF_IQK, "%-20s\n", + (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW-IQK" : + "Driver-IQK"); if (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) { halrf_get_fw_version(dm); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: 0x%x\n", - "FW_VER", rf->fw_ver); - } else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %s\n", - "IQK_VER", HALRF_IQK_VER); + RF_DBG(dm, DBG_RF_IQK, "%-20s: 0x%x\n", "FW_VER", rf->fw_ver); + } else { + RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "IQK_VER", HALRF_IQK_VER); + } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"%-20s: %s\n", - "reload", (iqk_info->is_reload) ? "True" : "False"); + RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "reload", + (iqk_info->is_reload) ? "True" : "False"); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %d %d\n", - "iqk count / fail count", dm->n_iqk_cnt, dm->n_iqk_fail_cnt); + RF_DBG(dm, DBG_RF_IQK, "%-20s: %d %d\n", "iqk count / fail count", + dm->n_iqk_cnt, dm->n_iqk_fail_cnt); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %d\n", - "channel", *dm->channel); + RF_DBG(dm, DBG_RF_IQK, "%-20s: %d\n", "channel", *dm->channel); if (*dm->band_width == CHANNEL_WIDTH_20) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %s\n", - "bandwidth", "BW_20"); + RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", "BW_20"); else if (*dm->band_width == CHANNEL_WIDTH_40) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %s\n", - "bandwidth", "BW_40"); + RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", "BW_40"); else if (*dm->band_width == CHANNEL_WIDTH_80) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %s\n", - "bandwidth", "BW_80"); + RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", "BW_80"); else if (*dm->band_width == CHANNEL_WIDTH_160) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %s\n", - "bandwidth", "BW_160"); + RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", "BW_160"); else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %s\n", - "bandwidth", "BW_UNKNOW"); + RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", + "BW_UNKNOWN"); +#if 0 /* - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %llu %s\n", - "progressing_time", dm->rf_calibrate_info.iqk_total_progressing_time, "(ms)"); -*/ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %s\n", - "rfk_forbidden", (iqk_info->rfk_forbidden) ? "True" : "False"); -#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %s\n", - "segment_iqk", (iqk_info->segment_iqk) ? "True" : "False"); + * RF_DBG(dm, DBG_RF_IQK, "%-20s: %llu %s\n", + * "progressing_time", + * dm->rf_calibrate_info.iqk_total_progressing_time, "(ms)"); + */ +#endif + RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "rfk_forbidden", + (iqk_info->rfk_forbidden) ? "True" : "False"); +#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || \ + RTL8821C_SUPPORT == 1 || RTL8195B_SUPPORT == 1 ||\ + RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1) + RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "segment_iqk", + (iqk_info->segment_iqk) ? "True" : "False"); #endif - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %llu %s\n", - "progressing_time", dm->rf_calibrate_info.iqk_progressing_time, "(ms)"); - - - + RF_DBG(dm, DBG_RF_IQK, "%-20s: %llu %s\n", "progressing_time", + dm->rf_calibrate_info.iqk_progressing_time, "(ms)"); tmp = odm_read_4byte(dm, 0x1bf0); - for(rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) - for(j = 0; j < 2; j++) - iqk_result[0][rf_path][j] = (boolean)(tmp & BIT(rf_path + (j * 4)) >> (rf_path + (j * 4))); + for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) + for (j = 0; j < 2; j++) + iqk_result[0][rf_path][j] = (boolean) + (tmp & (BIT(rf_path + (j * 4)) >> (rf_path + (j * 4)))); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: 0x%08x\n", "Reg0x1bf0", tmp); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: 0x%08x\n", "Reg0x1be8", odm_read_4byte(dm, 0x1be8)); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %s\n", - "PATH_A-Tx result", (iqk_result[0][RF_PATH_A][0]) ? "Fail" : "Pass"); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %s\n", - "PATH_A-Rx result", (iqk_result[0][RF_PATH_A][1]) ? "Fail" : "Pass"); -#if (RTL8822B_SUPPORT == 1) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %s\n", - "PATH_B-Tx result", (iqk_result[0][RF_PATH_B][0]) ? "Fail" : "Pass"); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %s\n", - "PATH_B-Rx result", (iqk_result[0][RF_PATH_B][1]) ? "Fail" : "Pass"); + RF_DBG(dm, DBG_RF_IQK, "%-20s: 0x%08x\n", "Reg0x1bf0", tmp); + RF_DBG(dm, DBG_RF_IQK, "%-20s: 0x%08x\n", "Reg0x1be8", + odm_read_4byte(dm, 0x1be8)); + RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "PATH_A-Tx result", + (iqk_result[0][RF_PATH_A][0]) ? "Fail" : "Pass"); + RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "PATH_A-Rx result", + (iqk_result[0][RF_PATH_A][1]) ? "Fail" : "Pass"); +#if (RTL8822B_SUPPORT == 1) + RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "PATH_B-Tx result", + (iqk_result[0][RF_PATH_B][0]) ? "Fail" : "Pass"); + RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "PATH_B-Rx result", + (iqk_result[0][RF_PATH_B][1]) ? "Fail" : "Pass"); #endif - - } + void halrf_lck_dbg(struct dm_struct *dm) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s\n", "====== LCK Info ======"); - /*PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s\n", - (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "LCK" : "RTK"));*/ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "%-20s: %llu %s\n", - "progressing_time", dm->rf_calibrate_info.lck_progressing_time, "(ms)"); + RF_DBG(dm, DBG_RF_IQK, "%-20s\n", "====== LCK Info ======"); +#if 0 + /*RF_DBG(dm, DBG_RF_IQK, "%-20s\n", + * (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "LCK" : "RTK")); + */ +#endif + RF_DBG(dm, DBG_RF_IQK, "%-20s: %llu %s\n", "progressing_time", + dm->rf_calibrate_info.lck_progressing_time, "(ms)"); } -void -halrf_iqk_dbg_cfir_backup(struct dm_struct *dm) +void halrf_iqk_dbg_cfir_backup(struct dm_struct *dm) { struct dm_iqk_info *iqk_info = &dm->IQK_info; - u8 path, idx, i; + u8 path, idx, i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-20s\n", "backup TX/RX CFIR"); + RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "backup TX/RX CFIR"); - for (path = 0; path < 2; path ++) { - for (idx = 0; idx < 2; idx++) { + for (path = 0; path < 2; path++) + for (idx = 0; idx < 2; idx++) phydm_get_iqk_cfir(dm, idx, path, true); - } - } - for (path = 0; path < 2; path ++) { + for (path = 0; path < 2; path++) { for (idx = 0; idx < 2; idx++) { - for(i = 0; i < 8; i++) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-7s %-3s CFIR_real: %-2d: 0x%x\n", - (path == 0) ? "PATH A": "PATH B", (idx == 0) ? "TX": "RX", i, iqk_info->iqk_cfir_real[2][path][idx][i]); + for (i = 0; i < 8; i++) { + RF_DBG(dm, DBG_RF_IQK, + "[IQK]%-7s %-3s CFIR_real: %-2d: 0x%x\n", + (path == 0) ? "PATH A" : "PATH B", + (idx == 0) ? "TX" : "RX", i, + iqk_info->iqk_cfir_real[2][path][idx][i]) + ; } - for(i = 0; i < 8; i++) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-7s %-3s CFIR_img:%-2d: 0x%x\n", - (path == 0) ? "PATH A": "PATH B", (idx == 0) ? "TX": "RX", i, iqk_info->iqk_cfir_imag[2][path][idx][i]); + for (i = 0; i < 8; i++) { + RF_DBG(dm, DBG_RF_IQK, + "[IQK]%-7s %-3s CFIR_img:%-2d: 0x%x\n", + (path == 0) ? "PATH A" : "PATH B", + (idx == 0) ? "TX" : "RX", i, + iqk_info->iqk_cfir_imag[2][path][idx][i]) + ; } } } } - -void -halrf_iqk_dbg_cfir_backup_update( - struct dm_struct *dm -) +void halrf_iqk_dbg_cfir_backup_update(struct dm_struct *dm) { - struct dm_iqk_info *iqk_info = &dm->IQK_info; + struct dm_iqk_info *iqk = &dm->IQK_info; u8 i, path, idx; + u32 bmask13_12 = BIT(13) | BIT(12); + u32 bmask20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16); + u32 data; - if(iqk_info->iqk_cfir_real[2][0][0][0] == 0) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-20s\n", "CFIR is invalid"); + if (iqk->iqk_cfir_real[2][0][0][0] == 0) { + RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "CFIR is invalid"); return; } for (path = 0; path < 2; path++) { for (idx = 0; idx < 2; idx++) { - odm_set_bb_reg(dm, 0x1b00, MASKDWORD, 0xf8000008 | path << 1); - odm_set_bb_reg(dm, 0x1b2c, MASKDWORD, 0x7); - odm_set_bb_reg(dm, 0x1b38, MASKDWORD, 0x20000000); - odm_set_bb_reg(dm, 0x1b3c, MASKDWORD, 0x20000000); - odm_set_bb_reg(dm, 0x1bcc, MASKDWORD, 0x00000000); + odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, + 0xf8000008 | path << 1); + odm_set_bb_reg(dm, R_0x1b2c, MASKDWORD, 0x7); + odm_set_bb_reg(dm, R_0x1b38, MASKDWORD, 0x20000000); + odm_set_bb_reg(dm, R_0x1b3c, MASKDWORD, 0x20000000); + odm_set_bb_reg(dm, R_0x1bcc, MASKDWORD, 0x00000000); if (idx == 0) - odm_set_bb_reg(dm, 0x1b0c, BIT(13) | BIT(12), 0x3); + odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x3); else - odm_set_bb_reg(dm, 0x1b0c, BIT(13) | BIT(12), 0x1); - odm_set_bb_reg(dm, 0x1bd4, BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16), 0x10); + odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x1); + odm_set_bb_reg(dm, R_0x1bd4, bmask20_16, 0x10); for (i = 0; i < 8; i++) { - odm_write_4byte(dm, 0x1bd8, ((0xc0000000 >> idx) + 0x3) + (i * 4) + (iqk_info->iqk_cfir_real[2][path][idx][i] << 9)); - odm_write_4byte(dm, 0x1bd8, ((0xc0000000 >> idx) + 0x1) + (i * 4) + (iqk_info->iqk_cfir_imag[2][path][idx][i] << 9)); - /*odm_write_4byte(dm, 0x1bd8, iqk_info->iqk_cfir_real[2][path][idx][i]);*/ - /*odm_write_4byte(dm, 0x1bd8, iqk_info->iqk_cfir_imag[2][path][idx][i]);*/ + data = ((0xc0000000 >> idx) + 0x3) + (i * 4) + + (iqk->iqk_cfir_real[2][path][idx][i] + << 9); + odm_write_4byte(dm, 0x1bd8, data); + data = ((0xc0000000 >> idx) + 0x1) + (i * 4) + + (iqk->iqk_cfir_imag[2][path][idx][i] + << 9); + odm_write_4byte(dm, 0x1bd8, data); +#if 0 + /*odm_write_4byte(dm, 0x1bd8, iqk->iqk_cfir_real[2][path][idx][i]);*/ + /*odm_write_4byte(dm, 0x1bd8, iqk->iqk_cfir_imag[2][path][idx][i]);*/ +#endif } } - odm_set_bb_reg(dm, 0x1bd8, MASKDWORD, 0x0); - odm_set_bb_reg(dm, 0x1b0c, BIT(13) | BIT(12), 0x0); + odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x0); + odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x0); } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-20s\n", "update new CFIR"); + RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "update new CFIR"); } - -void -halrf_iqk_dbg_cfir_reload( - struct dm_struct *dm -) +void halrf_iqk_dbg_cfir_reload(struct dm_struct *dm) { - struct dm_iqk_info *iqk_info = &dm->IQK_info; + struct dm_iqk_info *iqk = &dm->IQK_info; u8 i, path, idx; + u32 bmask13_12 = BIT(13) | BIT(12); + u32 bmask20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16); + u32 data; - if(iqk_info->iqk_cfir_real[0][0][0][0] == 0) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-20s\n", "CFIR is invalid"); + if (iqk->iqk_cfir_real[0][0][0][0] == 0) { + RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "CFIR is invalid"); return; } for (path = 0; path < 2; path++) { for (idx = 0; idx < 2; idx++) { - odm_set_bb_reg(dm, 0x1b00, MASKDWORD, 0xf8000008 | path << 1); - odm_set_bb_reg(dm, 0x1b2c, MASKDWORD, 0x7); - odm_set_bb_reg(dm, 0x1b38, MASKDWORD, 0x20000000); - odm_set_bb_reg(dm, 0x1b3c, MASKDWORD, 0x20000000); - odm_set_bb_reg(dm, 0x1bcc, MASKDWORD, 0x00000000); + odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, + 0xf8000008 | path << 1); + odm_set_bb_reg(dm, R_0x1b2c, MASKDWORD, 0x7); + odm_set_bb_reg(dm, R_0x1b38, MASKDWORD, 0x20000000); + odm_set_bb_reg(dm, R_0x1b3c, MASKDWORD, 0x20000000); + odm_set_bb_reg(dm, R_0x1bcc, MASKDWORD, 0x00000000); if (idx == 0) - odm_set_bb_reg(dm, 0x1b0c, BIT(13) | BIT(12), 0x3); + odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x3); else - odm_set_bb_reg(dm, 0x1b0c, BIT(13) | BIT(12), 0x1); - odm_set_bb_reg(dm, 0x1bd4, BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16), 0x10); + odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x1); + odm_set_bb_reg(dm, R_0x1bd4, bmask20_16, 0x10); for (i = 0; i < 8; i++) { - /*odm_write_4byte(dm, 0x1bd8, iqk_info->iqk_cfir_real[0][path][idx][i]);*/ - /*odm_write_4byte(dm, 0x1bd8, iqk_info->iqk_cfir_imag[0][path][idx][i]);*/ - odm_write_4byte(dm, 0x1bd8, ((0xc0000000 >> idx) + 0x3) + (i * 4) + (iqk_info->iqk_cfir_real[0][path][idx][i] << 9)); - odm_write_4byte(dm, 0x1bd8, ((0xc0000000 >> idx) + 0x1) + (i * 4) + (iqk_info->iqk_cfir_imag[0][path][idx][i] << 9)); +#if 0 + /*odm_write_4byte(dm, 0x1bd8, iqk->iqk_cfir_real[0][path][idx][i]);*/ + /*odm_write_4byte(dm, 0x1bd8, iqk->iqk_cfir_imag[0][path][idx][i]);*/ +#endif + data = ((0xc0000000 >> idx) + 0x3) + (i * 4) + + (iqk->iqk_cfir_real[0][path][idx][i] + << 9); + odm_write_4byte(dm, 0x1bd8, data); + data = ((0xc0000000 >> idx) + 0x1) + (i * 4) + + (iqk->iqk_cfir_imag[0][path][idx][i] + << 9); + odm_write_4byte(dm, 0x1bd8, data); } } - odm_set_bb_reg(dm, 0x1bd8, MASKDWORD, 0x0); - odm_set_bb_reg(dm, 0x1b0c, BIT(13) | BIT(12), 0x0); + odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x0); + odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x0); } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-20s\n", "write CFIR with default value"); + RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "write CFIR with default value"); } -void -halrf_iqk_dbg_cfir_write( - struct dm_struct *dm, - u8 type, - u32 path, - u32 idx, - u32 i, - u32 data -) -{ - struct dm_iqk_info *iqk_info = &dm->IQK_info; - if (type == 0) - iqk_info->iqk_cfir_real[2][path][idx][i] = data; - else - iqk_info->iqk_cfir_imag[2][path][idx][i] = data; -} - -void -halrf_iqk_dbg_cfir_backup_show(struct dm_struct *dm) +void halrf_iqk_dbg_cfir_write(struct dm_struct *dm, u8 type, u32 path, u32 idx, + u32 i, u32 data) { struct dm_iqk_info *iqk_info = &dm->IQK_info; - u8 path, idx, i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-20s\n", "backup TX/RX CFIR"); + if (type == 0) + iqk_info->iqk_cfir_real[2][path][idx][i] = (u16)data; + else + iqk_info->iqk_cfir_imag[2][path][idx][i] = (u16)data; +} - for (path = 0; path < 2; path ++) { +void halrf_iqk_dbg_cfir_backup_show(struct dm_struct *dm) +{ + struct dm_iqk_info *iqk_info = &dm->IQK_info; + u8 path, idx, i; + + RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "backup TX/RX CFIR"); + + for (path = 0; path < 2; path++) { for (idx = 0; idx < 2; idx++) { - for(i = 0; i < 8; i++) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-10s %-3s CFIR_real: %-2d: 0x%x\n", - (path == 0) ? "PATH A": "PATH B", (idx == 0) ? "TX": "RX", i, iqk_info->iqk_cfir_real[2][path][idx][i]); + for (i = 0; i < 8; i++) { + RF_DBG(dm, DBG_RF_IQK, + "[IQK]%-10s %-3s CFIR_real:%-2d: 0x%x\n", + (path == 0) ? "PATH A" : "PATH B", + (idx == 0) ? "TX" : "RX", i, + iqk_info->iqk_cfir_real[2][path][idx][i]) + ; } - for(i = 0; i < 8; i++) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]%-10s %-3s CFIR_img:%-2d: 0x%x\n", - (path == 0) ? "PATH A": "PATH B", (idx == 0) ? "TX": "RX", i, iqk_info->iqk_cfir_imag[2][path][idx][i]); + for (i = 0; i < 8; i++) { + RF_DBG(dm, DBG_RF_IQK, + "[IQK]%-10s %-3s CFIR_img:%-2d: 0x%x\n", + (path == 0) ? "PATH A" : "PATH B", + (idx == 0) ? "TX" : "RX", i, + iqk_info->iqk_cfir_imag[2][path][idx][i]) + ; } } } } -void -halrf_do_imr_test( - void *dm_void, - u8 flag_imr_test -) +void halrf_do_imr_test(void *dm_void, u8 flag_imr_test) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (flag_imr_test != 0x0) switch (dm->support_ic_type) { @@ -721,21 +678,16 @@ halrf_do_imr_test( break; #endif default: - break; + break; } } -void halrf_iqk_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -) +void halrf_iqk_debug(void *dm_void, u32 *const dm_value, u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_iqk_info *iqk_info = &dm->IQK_info; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + +#if 0 /*dm_value[0]=0x0: backup from SRAM & show*/ /*dm_value[0]=0x1: write backup CFIR to SRAM*/ /*dm_value[0]=0x2: reload default CFIR to SRAM*/ @@ -743,12 +695,12 @@ void halrf_iqk_debug( /*dm_value[0]=0x10: write backup CFIR real part*/ /*--> dm_value[1]:path, dm_value[2]:tx/rx, dm_value[3]:index, dm_value[4]:data*/ /*dm_value[0]=0x11: write backup CFIR imag*/ - /*--> dm_value[1]:path, dm_value[2]:tx/rx, dm_value[3]:index, dm_value[4]:data*/ + /*--> dm_value[1]:path, dm_value[2]:tx/rx, dm_value[3]:index, dm_value[4]:data*/ /*dm_value[0]=0x20 :xym_read enable*/ - /*--> dm_value[1]:0:disable, 1:enable*/ + /*--> dm_value[1]:0:disable, 1:enable*/ /*if dm_value[0]=0x20 = enable, */ /*0x1:show rx_sym; 0x2: tx_xym; 0x3:gs1_xym; 0x4:gs2_sym; 0x5:rxk1_xym*/ - +#endif if (dm_value[0] == 0x0) halrf_iqk_dbg_cfir_backup(dm); else if (dm_value[0] == 0x1) @@ -758,57 +710,707 @@ void halrf_iqk_debug( else if (dm_value[0] == 0x3) halrf_iqk_dbg_cfir_backup_show(dm); else if (dm_value[0] == 0x10) - halrf_iqk_dbg_cfir_write(dm, 0, dm_value[1], dm_value[2], dm_value[3], dm_value[4]); + halrf_iqk_dbg_cfir_write(dm, 0, dm_value[1], dm_value[2], + dm_value[3], dm_value[4]); else if (dm_value[0] == 0x11) - halrf_iqk_dbg_cfir_write(dm, 1, dm_value[1], dm_value[2], dm_value[3], dm_value[4]); + halrf_iqk_dbg_cfir_write(dm, 1, dm_value[1], dm_value[2], + dm_value[3], dm_value[4]); else if (dm_value[0] == 0x20) halrf_iqk_xym_enable(dm, (u8)dm_value[1]); else if (dm_value[0] == 0x21) - halrf_iqk_xym_show(dm,(u8)dm_value[1]); + halrf_iqk_xym_show(dm, (u8)dm_value[1]); else if (dm_value[0] == 0x30) halrf_do_imr_test(dm, (u8)dm_value[1]); } -void -halrf_iqk_hwtx_check( - void *dm_void, - boolean is_check -) +void halrf_iqk_hwtx_check(void *dm_void, boolean is_check) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_iqk_info *iqk_info = &dm->IQK_info; +#if 0 + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_iqk_info *iqk_info = &dm->IQK_info; u32 tmp_b04; - if (is_check) - iqk_info->is_hwtx = (boolean)odm_get_bb_reg(dm, 0xb00, BIT(8)); - else { + if (is_check) { + iqk_info->is_hwtx = (boolean)odm_get_bb_reg(dm, R_0xb00, BIT(8)); + } else { if (iqk_info->is_hwtx) { tmp_b04 = odm_read_4byte(dm, 0xb04); - odm_set_bb_reg(dm, 0xb04, BIT(3) | BIT (2), 0x0); + odm_set_bb_reg(dm, R_0xb04, BIT(3) | BIT(2), 0x0); odm_write_4byte(dm, 0xb04, tmp_b04); } } +#endif } + +#endif + +u8 halrf_match_iqk_version(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + u32 iqk_version = 0; + char temp[10] = {0}; + + odm_move_memory(dm, temp, HALRF_IQK_VER, sizeof(temp)); + PHYDM_SSCANF(temp + 2, DCMD_HEX, &iqk_version); + + if (dm->support_ic_type == ODM_RTL8822B) { + if (iqk_version >= 0x24 && (odm_get_hw_img_version(dm) >= 72)) + return 1; + else if ((iqk_version <= 0x23) && + (odm_get_hw_img_version(dm) <= 71)) + return 1; + else + return 0; + } + + if (dm->support_ic_type == ODM_RTL8821C) { + if (iqk_version >= 0x18 && (odm_get_hw_img_version(dm) >= 37)) + return 1; + else + return 0; + } + + return 1; +} + +void halrf_rf_lna_setting(void *dm_void, enum halrf_lna_set type) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + switch (dm->support_ic_type) { +#if (RTL8188E_SUPPORT == 1) + case ODM_RTL8188E: + halrf_rf_lna_setting_8188e(dm, type); + break; +#endif +#if (RTL8192E_SUPPORT == 1) + case ODM_RTL8192E: + halrf_rf_lna_setting_8192e(dm, type); + break; +#endif +#if (RTL8192F_SUPPORT == 1) + case ODM_RTL8192F: + halrf_rf_lna_setting_8192f(dm, type); + break; +#endif + +#if (RTL8723B_SUPPORT == 1) + case ODM_RTL8723B: + halrf_rf_lna_setting_8723b(dm, type); + break; +#endif +#if (RTL8812A_SUPPORT == 1) + case ODM_RTL8812: + halrf_rf_lna_setting_8812a(dm, type); + break; +#endif +#if ((RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1)) + case ODM_RTL8881A: + case ODM_RTL8821: + halrf_rf_lna_setting_8821a(dm, type); + break; +#endif +#if (RTL8822B_SUPPORT == 1) + case ODM_RTL8822B: + halrf_rf_lna_setting_8822b(dm_void, type); + break; +#endif +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + halrf_rf_lna_setting_8822c(dm_void, type); + break; +#endif +#if (RTL8812F_SUPPORT == 1) + case ODM_RTL8812F: + halrf_rf_lna_setting_8812f(dm_void, type); + break; +#endif +#if (RTL8821C_SUPPORT == 1) + case ODM_RTL8821C: + halrf_rf_lna_setting_8821c(dm_void, type); + break; +#endif +#if (RTL8814B_SUPPORT == 1) + case ODM_RTL8814B: + break; +#endif + default: + break; + } +} + +void halrf_support_ability_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + u32 dm_value[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + u8 i; + + for (i = 0; i < 5; i++) + if (input[i + 1]) + PHYDM_SSCANF(input[i + 2], DCMD_DECIMAL, &dm_value[i]); + + if (dm_value[0] == 100) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "\n[RF Supportability]\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "00. (( %s ))Power Tracking\n", + ((rf->rf_supportability & HAL_RF_TX_PWR_TRACK) ? + ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "01. (( %s ))IQK\n", + ((rf->rf_supportability & HAL_RF_IQK) ? ("V") : + ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "02. (( %s ))LCK\n", + ((rf->rf_supportability & HAL_RF_LCK) ? ("V") : + ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "03. (( %s ))DPK\n", + ((rf->rf_supportability & HAL_RF_DPK) ? ("V") : + ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "04. (( %s ))HAL_RF_TXGAPK\n", + ((rf->rf_supportability & HAL_RF_TXGAPK) ? ("V") : + ("."))); + } else { + if (dm_value[1] == 1) /* enable */ + rf->rf_supportability |= BIT(dm_value[0]); + else if (dm_value[1] == 2) /* disable */ + rf->rf_supportability &= ~(BIT(dm_value[0])); + else + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Warning!!!] 1:enable, 2:disable\n"); + } + PDM_SNPF(out_len, used, output + used, out_len - used, + "\nCurr-RF_supportability = 0x%x\n\n", rf->rf_supportability); + + *_used = used; + *_out_len = out_len; +} + +void halrf_cmn_info_init(void *dm_void, enum halrf_cmninfo_init cmn_info, + u32 value) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + + switch (cmn_info) { + case HALRF_CMNINFO_EEPROM_THERMAL_VALUE: + rf->eeprom_thermal = (u8)value; + break; + case HALRF_CMNINFO_PWT_TYPE: + rf->pwt_type = (u8)value; + break; + default: + break; + } +} + +void halrf_cmn_info_hook(void *dm_void, enum halrf_cmninfo_hook cmn_info, + void *value) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + + switch (cmn_info) { + case HALRF_CMNINFO_CON_TX: + rf->is_con_tx = (boolean *)value; + break; + case HALRF_CMNINFO_SINGLE_TONE: + rf->is_single_tone = (boolean *)value; + break; + case HALRF_CMNINFO_CARRIER_SUPPRESSION: + rf->is_carrier_suppresion = (boolean *)value; + break; + case HALRF_CMNINFO_MP_RATE_INDEX: + rf->mp_rate_index = (u8 *)value; + break; + case HALRF_CMNINFO_MANUAL_RF_SUPPORTABILITY: + rf->manual_rf_supportability = (u32 *)value; + break; + default: + /*do nothing*/ + break; + } +} + +void halrf_cmn_info_set(void *dm_void, u32 cmn_info, u64 value) +{ + /* This init variable may be changed in run time. */ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + + switch (cmn_info) { + case HALRF_CMNINFO_ABILITY: + rf->rf_supportability = (u32)value; + break; + + case HALRF_CMNINFO_DPK_EN: + rf->dpk_en = (u8)value; + break; + case HALRF_CMNINFO_RFK_FORBIDDEN: + dm->IQK_info.rfk_forbidden = (boolean)value; + break; +#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || \ + RTL8821C_SUPPORT == 1 || RTL8195B_SUPPORT == 1 ||\ + RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1) + case HALRF_CMNINFO_IQK_SEGMENT: + dm->IQK_info.segment_iqk = (boolean)value; + break; +#endif + case HALRF_CMNINFO_RATE_INDEX: + rf->p_rate_index = (u32)value; + break; +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + case HALRF_CMNINFO_MP_PSD_POINT: + rf->halrf_psd_data.point = (u32)value; + break; + case HALRF_CMNINFO_MP_PSD_START_POINT: + rf->halrf_psd_data.start_point = (u32)value; + break; + case HALRF_CMNINFO_MP_PSD_STOP_POINT: + rf->halrf_psd_data.stop_point = (u32)value; + break; + case HALRF_CMNINFO_MP_PSD_AVERAGE: + rf->halrf_psd_data.average = (u32)value; + break; +#endif + default: + /* do nothing */ + break; + } +} + +u64 halrf_cmn_info_get(void *dm_void, u32 cmn_info) +{ + /* This init variable may be changed in run time. */ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + u64 return_value = 0; + + switch (cmn_info) { + case HALRF_CMNINFO_ABILITY: + return_value = (u32)rf->rf_supportability; + break; + case HALRF_CMNINFO_RFK_FORBIDDEN: + return_value = dm->IQK_info.rfk_forbidden; + break; +#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || \ + RTL8821C_SUPPORT == 1 || RTL8195B_SUPPORT == 1 ||\ + RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1) + case HALRF_CMNINFO_IQK_SEGMENT: + return_value = dm->IQK_info.segment_iqk; + break; + case HALRF_CMNINFO_IQK_TIMES: + return_value = dm->IQK_info.iqk_times; + break; +#endif + default: + /* do nothing */ + break; + } + + return return_value; +} + +void halrf_supportability_init_mp(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + + switch (dm->support_ic_type) { + case ODM_RTL8814B: +#if (RTL8814B_SUPPORT == 1) + rf->rf_supportability = + /*HAL_RF_TX_PWR_TRACK |*/ + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + HAL_RF_DACK | + HAL_RF_DPK_TRACK | + 0; +#endif + break; +#if (RTL8822B_SUPPORT == 1) + case ODM_RTL8822B: + rf->rf_supportability = + /*HAL_RF_TX_PWR_TRACK |*/ + HAL_RF_IQK | + HAL_RF_LCK | + /*@HAL_RF_DPK |*/ + 0; + break; +#endif +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + rf->rf_supportability = + /*HAL_RF_TX_PWR_TRACK |*/ + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + HAL_RF_DACK | + HAL_RF_DPK_TRACK | + 0; + break; +#endif +#if (RTL8821C_SUPPORT == 1) + case ODM_RTL8821C: + rf->rf_supportability = + /*HAL_RF_TX_PWR_TRACK |*/ + HAL_RF_IQK | + HAL_RF_LCK | + /*@HAL_RF_DPK |*/ + /*@HAL_RF_TXGAPK |*/ + 0; + break; +#endif +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + rf->rf_supportability = + HAL_RF_TX_PWR_TRACK | + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + HAL_RF_TXGAPK | + HAL_RF_DPK_TRACK | + 0; + break; +#endif +#if (RTL8812F_SUPPORT == 1) + case ODM_RTL8812F: + rf->rf_supportability = + /*HAL_RF_TX_PWR_TRACK |*/ + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + HAL_RF_DACK | + HAL_RF_DPK_TRACK | + 0; + break; +#endif + +#if (RTL8198F_SUPPORT == 1) + case ODM_RTL8198F: + rf->rf_supportability = + /*HAL_RF_TX_PWR_TRACK |*/ + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + /*@HAL_RF_TXGAPK |*/ + 0; + break; +#endif + +#if (RTL8192F_SUPPORT == 1) + case ODM_RTL8192F: + rf->rf_supportability = + /*HAL_RF_TX_PWR_TRACK |*/ + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + /*@HAL_RF_TXGAPK |*/ + 0; + break; +#endif + +#if (RTL8197F_SUPPORT == 1) + case ODM_RTL8197F: + rf->rf_supportability = + /*HAL_RF_TX_PWR_TRACK |*/ + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + /*@HAL_RF_TXGAPK |*/ + 0; + break; +#endif + + default: + rf->rf_supportability = + /*HAL_RF_TX_PWR_TRACK |*/ + HAL_RF_IQK | + HAL_RF_LCK | + /*@HAL_RF_DPK |*/ + /*@HAL_RF_TXGAPK |*/ + 0; + break; + } + + RF_DBG(dm, DBG_RF_INIT, + "IC = ((0x%x)), RF_Supportability Init MP = ((0x%x))\n", + dm->support_ic_type, rf->rf_supportability); +} + +void halrf_supportability_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + + switch (dm->support_ic_type) { + case ODM_RTL8814B: +#if (RTL8814B_SUPPORT == 1) + rf->rf_supportability = + HAL_RF_TX_PWR_TRACK | + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + HAL_RF_DPK_TRACK | + 0; +#endif + break; +#if (RTL8822B_SUPPORT == 1) + case ODM_RTL8822B: + rf->rf_supportability = + HAL_RF_TX_PWR_TRACK | + HAL_RF_IQK | + HAL_RF_LCK | + /*@HAL_RF_DPK |*/ + 0; + break; +#endif +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + rf->rf_supportability = + HAL_RF_TX_PWR_TRACK | + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + HAL_RF_DACK | + HAL_RF_DPK_TRACK | + 0; + break; +#endif +#if (RTL8821C_SUPPORT == 1) + case ODM_RTL8821C: + rf->rf_supportability = + HAL_RF_TX_PWR_TRACK | + HAL_RF_IQK | + HAL_RF_LCK | + /*@HAL_RF_DPK |*/ + /*@HAL_RF_TXGAPK |*/ + 0; + break; +#endif +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + rf->rf_supportability = + HAL_RF_TX_PWR_TRACK | + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + HAL_RF_TXGAPK | + HAL_RF_DPK_TRACK | + 0; + break; +#endif +#if (RTL8812F_SUPPORT == 1) + case ODM_RTL8812F: + rf->rf_supportability = + HAL_RF_TX_PWR_TRACK | + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + HAL_RF_DACK | + HAL_RF_DPK_TRACK | + 0; + break; +#endif + +#if (RTL8198F_SUPPORT == 1) + case ODM_RTL8198F: + rf->rf_supportability = + HAL_RF_TX_PWR_TRACK | + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + /*@HAL_RF_TXGAPK |*/ + 0; + break; +#endif + +#if (RTL8192F_SUPPORT == 1) + case ODM_RTL8192F: + rf->rf_supportability = + HAL_RF_TX_PWR_TRACK | + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + /*@HAL_RF_TXGAPK |*/ + 0; + break; +#endif + +#if (RTL8197F_SUPPORT == 1) + case ODM_RTL8197F: + rf->rf_supportability = + HAL_RF_TX_PWR_TRACK | + HAL_RF_IQK | + HAL_RF_LCK | + HAL_RF_DPK | + /*@HAL_RF_TXGAPK |*/ + 0; + break; +#endif + + default: + rf->rf_supportability = + HAL_RF_TX_PWR_TRACK | + HAL_RF_IQK | + HAL_RF_LCK | + /*@HAL_RF_DPK |*/ + 0; + break; + } + + RF_DBG(dm, DBG_RF_INIT, + "IC = ((0x%x)), RF_Supportability Init = ((0x%x))\n", + dm->support_ic_type, rf->rf_supportability); +} + +void halrf_watchdog(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; +#if 0 + /*RF_DBG(dm, DBG_RF_TMP, "%s\n", __func__);*/ +#endif + + if (rf->is_dpk_in_progress || dm->rf_calibrate_info.is_iqk_in_progress) + return; + + phydm_rf_watchdog(dm); + halrf_dpk_track(dm); +} + +#if 0 void -halrf_segment_iqk_trigger( - void *dm_void, - boolean clear, - boolean segment_iqk +halrf_iqk_init( + void *dm_void ) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_iqk_info *iqk_info = &dm->IQK_info; - struct _hal_rf_ *rf = &dm->rf_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + + switch (dm->support_ic_type) { +#if (RTL8814B_SUPPORT == 1) + case ODM_RTL8814B: + break; +#endif +#if (RTL8822B_SUPPORT == 1) + case ODM_RTL8822B: + _iq_calibrate_8822b_init(dm); + break; +#endif +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + _iq_calibrate_8822c_init(dm); + break; +#endif +#if (RTL8821C_SUPPORT == 1) + case ODM_RTL8821C: + break; +#endif + + default: + break; + } +} +#endif + +void halrf_rf_k_connect_trigger(void *dm_void, boolean is_recovery, + enum halrf_k_segment_time seg_time) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_dpk_info *dpk_info = &dm->dpk_info; + struct _hal_rf_ *rf = &dm->rf_table; + + if (dm->mp_mode && rf->is_con_tx && rf->is_single_tone && + rf->is_carrier_suppresion) { + if (*dm->mp_mode && + (*rf->is_con_tx || *rf->is_single_tone || + *rf->is_carrier_suppresion)) + return; + } + /*[TX GAP K]*/ + + /*[LOK, IQK]*/ + halrf_segment_iqk_trigger(dm, true, seg_time); + + /*[TSSI Trk]*/ + /*halrf_do_tssi(dm);*/ + /*halrf_do_tssi(dm);*/ + /*halrf_tssi_set_de(dm);*/ + + /*[DPK]*/ + if(dpk_info->is_dpk_by_channel == true) + halrf_dpk_trigger(dm); + else + halrf_dpk_reload(dm); +} + +void halrf_dack_trigger(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + u64 start_time; - + + if (!(rf->rf_supportability & HAL_RF_DACK)) + return; + + start_time = odm_get_current_time(dm); + + switch (dm->support_ic_type) { +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + halrf_dac_cal_8822c(dm); + break; +#endif +#if (RTL8812F_SUPPORT == 1) + case ODM_RTL8812F: + halrf_dac_cal_8812f(dm); + break; +#endif +#if (RTL8814B_SUPPORT == 1) + case ODM_RTL8814B: + halrf_dac_cal_8814b(dm); + break; +#endif + default: + break; + } + rf->dpk_progressing_time = odm_get_progressing_time(dm, start_time); + RF_DBG(dm, DBG_RF_DACK, "[DACK]DACK progressing_time = %lld ms\n", + rf->dpk_progressing_time); +} + +void halrf_segment_iqk_trigger(void *dm_void, boolean clear, + boolean segment_iqk) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + struct _hal_rf_ *rf = &dm->rf_table; + u64 start_time; + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) if (odm_check_power_status(dm) == false) return; #endif - if ((dm->mp_mode != NULL) && (rf->is_con_tx != NULL) && (rf->is_single_tone != NULL) && (rf->is_carrier_suppresion != NULL)) - if (*dm->mp_mode && ((*rf->is_con_tx || *rf->is_single_tone || *rf->is_carrier_suppresion))) + if (dm->mp_mode && + rf->is_con_tx && + rf->is_single_tone && + rf->is_carrier_suppresion) + if (*dm->mp_mode && + ((*rf->is_con_tx || + *rf->is_single_tone || + *rf->is_carrier_suppresion))) return; #if (DM_ODM_SUPPORT_TYPE == ODM_CE) @@ -835,6 +1437,11 @@ halrf_segment_iqk_trigger( phy_iq_calibrate_8822b(dm, clear, segment_iqk); break; #endif +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + phy_iq_calibrate_8822c(dm, clear, segment_iqk); + break; +#endif #if (RTL8821C_SUPPORT == 1) case ODM_RTL8821C: phy_iq_calibrate_8821c(dm, clear, segment_iqk); @@ -842,478 +1449,125 @@ halrf_segment_iqk_trigger( #endif #if (RTL8814B_SUPPORT == 1) case ODM_RTL8814B: + phy_iq_calibrate_8814b(dm, clear, segment_iqk); break; #endif - default: +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + phy_iq_calibrate_8195b(dm, clear, segment_iqk); + break; +#endif +/* +#if (RTL8710C_SUPPORT == 1) + case ODM_RTL8710C: + phy_iq_calibrate_8710c(dm, clear, segment_iqk); + break; +#endif +*/ +#if (RTL8198F_SUPPORT == 1) + case ODM_RTL8198F: + phy_iq_calibrate_8198f(dm, clear, segment_iqk); + break; +#endif +#if (RTL8812F_SUPPORT == 1) + case ODM_RTL8812F: + phy_iq_calibrate_8812f(dm, clear, segment_iqk); + break; +#endif +#if (RTL8197G_SUPPORT == 1) + case ODM_RTL8197G: + phy_iq_calibrate_8197g(dm, clear, segment_iqk); break; - } - dm->rf_calibrate_info.iqk_progressing_time = odm_get_progressing_time(dm, start_time); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]IQK progressing_time = %lld ms\n", dm->rf_calibrate_info.iqk_progressing_time); - - odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); - dm->rf_calibrate_info.is_iqk_in_progress = false; - odm_release_spin_lock(dm, RT_IQK_SPINLOCK); - } else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "== Return the IQK CMD, because RFKs in Progress ==\n"); -} - - - #endif - - - -u8 halrf_match_iqk_version(void *dm_void) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _hal_rf_ *rf = &dm->rf_table; - - u32 iqk_version = 0; - char temp[10] = {0}; - - odm_move_memory(dm, temp, (PVOID)(HALRF_IQK_VER), sizeof(temp)); - PHYDM_SSCANF(temp + 2, DCMD_HEX, &iqk_version); - - if (dm->support_ic_type == ODM_RTL8822B) { - if ((iqk_version >= 0x24) && (odm_get_hw_img_version(dm) >= 72)) - return 1; - else if ((iqk_version <= 0x23) && (odm_get_hw_img_version(dm) <= 71)) - return 1; - else - return 0; - } - - if (dm->support_ic_type == ODM_RTL8821C) { - if ((iqk_version >= 0x18) && (odm_get_hw_img_version(dm) >= 37)) - return 1; - else - return 0; - } - - return 1; -} - - - -void -halrf_rf_lna_setting( - void *dm_void, - enum phydm_lna_set type -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _hal_rf_ *rf = &dm->rf_table; - - switch (dm->support_ic_type) { #if (RTL8188E_SUPPORT == 1) case ODM_RTL8188E: - halrf_rf_lna_setting_8188e(dm, type); + phy_iq_calibrate_8188e(dm, false); + break; +#endif +#if (RTL8188F_SUPPORT == 1) + case ODM_RTL8188F: + phy_iq_calibrate_8188f(dm, false); break; #endif #if (RTL8192E_SUPPORT == 1) case ODM_RTL8192E: - halrf_rf_lna_setting_8192e(dm, type); + phy_iq_calibrate_8192e(dm, false); + break; +#endif +#if (RTL8197F_SUPPORT == 1) + case ODM_RTL8197F: + phy_iq_calibrate_8197f(dm, false); + break; +#endif +#if (RTL8192F_SUPPORT == 1) + case ODM_RTL8192F: + phy_iq_calibrate_8192f(dm, false); + break; +#endif +#if (RTL8703B_SUPPORT == 1) + case ODM_RTL8703B: + phy_iq_calibrate_8703b(dm, false); + break; +#endif +#if (RTL8710B_SUPPORT == 1) + case ODM_RTL8710B: + phy_iq_calibrate_8710b(dm, false); break; #endif #if (RTL8723B_SUPPORT == 1) case ODM_RTL8723B: - halrf_rf_lna_setting_8723b(dm, type); + phy_iq_calibrate_8723b(dm, false); + break; +#endif +#if (RTL8723D_SUPPORT == 1) + case ODM_RTL8723D: + phy_iq_calibrate_8723d(dm, false); + break; +#endif +#if (RTL8721D_SUPPORT == 1) + case ODM_RTL8721D: + phy_iq_calibrate_8721d(dm, false); break; #endif #if (RTL8812A_SUPPORT == 1) case ODM_RTL8812: - halrf_rf_lna_setting_8812a(dm, type); + phy_iq_calibrate_8812a(dm, false); break; #endif -#if ((RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1)) - case ODM_RTL8881A: +#if (RTL8821A_SUPPORT == 1) case ODM_RTL8821: - halrf_rf_lna_setting_8821a(dm, type); + phy_iq_calibrate_8821a(dm, false); break; #endif -#if (RTL8822B_SUPPORT == 1) - case ODM_RTL8822B: - halrf_rf_lna_setting_8822b(dm, type); - break; -#endif -#if (RTL8821C_SUPPORT == 1) - case ODM_RTL8821C: - halrf_rf_lna_setting_8821c(dm, type); +#if (RTL8814A_SUPPORT == 1) + case ODM_RTL8814A: + phy_iq_calibrate_8814a(dm, false); break; #endif default: break; } + dm->rf_calibrate_info.iqk_progressing_time = + odm_get_progressing_time(dm, start_time); + RF_DBG(dm, DBG_RF_IQK, "[IQK]IQK progressing_time = %lld ms\n", + dm->rf_calibrate_info.iqk_progressing_time); - } - - -void -halrf_support_ability_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _hal_rf_ *rf = &dm->rf_table; - u32 dm_value[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; - u8 i; - - for (i = 0; i < 5; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &dm_value[i]); - } - } - - PDM_SNPF(out_len, used, output + used, out_len - used, "\n%s\n", - "================================"); - if (dm_value[0] == 100) { - PDM_SNPF(out_len, used, output + used, out_len - used, - "[RF Supportability]\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "%s\n", "================================"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "00. (( %s ))Power Tracking\n", - ((rf->rf_supportability & HAL_RF_TX_PWR_TRACK) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, - "01. (( %s ))IQK\n", - ((rf->rf_supportability & HAL_RF_IQK) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, - "02. (( %s ))LCK\n", - ((rf->rf_supportability & HAL_RF_LCK) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, - "03. (( %s ))DPK\n", - ((rf->rf_supportability & HAL_RF_DPK) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, - "04. (( %s ))HAL_RF_TXGAPK\n", - ((rf->rf_supportability & HAL_RF_TXGAPK) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, - "%s\n", "================================"); - } - else { - if (dm_value[1] == 1) { /* enable */ - rf->rf_supportability |= BIT(dm_value[0]) ; - } else if (dm_value[1] == 2) /* disable */ - rf->rf_supportability &= ~(BIT(dm_value[0])) ; - else { - PDM_SNPF(out_len, used, output + used, - out_len - used, "%s\n", - "[Warning!!!] 1:enable, 2:disable"); - } - } - PDM_SNPF(out_len, used, output + used, out_len - used, - "Curr-RF_supportability = 0x%x\n", - rf->rf_supportability); - PDM_SNPF(out_len, used, output + used, out_len - used, "%s\n", - "================================"); - - *_used = used; - *_out_len = out_len; -} - -void -halrf_cmn_info_init( - void *dm_void, -enum halrf_cmninfo_init cmn_info, - u32 value -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _hal_rf_ *rf = &dm->rf_table; - - switch (cmn_info) { - case HALRF_CMNINFO_EEPROM_THERMAL_VALUE: - rf->eeprom_thermal = (u8)value; - break; - case HALRF_CMNINFO_FW_VER: - rf->fw_ver = (u32)value; - break; - default: - break; + odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); + dm->rf_calibrate_info.is_iqk_in_progress = false; + odm_release_spin_lock(dm, RT_IQK_SPINLOCK); + } else { + RF_DBG(dm, DBG_RF_IQK, + "== Return the IQK CMD, because RFKs in Progress ==\n"); } } -void -halrf_cmn_info_hook( - void *dm_void, -enum halrf_cmninfo_hook cmn_info, - void *value -) +void halrf_iqk_trigger(void *dm_void, boolean is_recovery) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _hal_rf_ *rf = &dm->rf_table; - - switch (cmn_info) { - case HALRF_CMNINFO_CON_TX: - rf->is_con_tx = (boolean *)value; - break; - case HALRF_CMNINFO_SINGLE_TONE: - rf->is_single_tone = (boolean *)value; - break; - case HALRF_CMNINFO_CARRIER_SUPPRESSION: - rf->is_carrier_suppresion = (boolean *)value; - break; - case HALRF_CMNINFO_MP_RATE_INDEX: - rf->mp_rate_index = (u8 *)value; - break; - default: - /*do nothing*/ - break; - } -} - -void -halrf_cmn_info_set( - void *dm_void, - u32 cmn_info, - u64 value -) -{ - /* */ - /* This init variable may be changed in run time. */ - /* */ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _hal_rf_ *rf = &dm->rf_table; - - switch (cmn_info) { - case HALRF_CMNINFO_ABILITY: - rf->rf_supportability = (u32)value; - break; - - case HALRF_CMNINFO_DPK_EN: - rf->dpk_en = (u8)value; - break; - case HALRF_CMNINFO_RFK_FORBIDDEN : - dm->IQK_info.rfk_forbidden = (boolean)value; - break; - #if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) - case HALRF_CMNINFO_IQK_SEGMENT: - dm->IQK_info.segment_iqk = (boolean)value; - break; - #endif - case HALRF_CMNINFO_RATE_INDEX: - rf->p_rate_index = (u32)value; - break; -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - case HALRF_CMNINFO_MP_PSD_POINT: - rf->halrf_psd_data.point = (u32)value; - break; - case HALRF_CMNINFO_MP_PSD_START_POINT: - rf->halrf_psd_data.start_point = (u32)value; - break; - case HALRF_CMNINFO_MP_PSD_STOP_POINT: - rf->halrf_psd_data.stop_point = (u32)value; - break; - case HALRF_CMNINFO_MP_PSD_AVERAGE: - rf->halrf_psd_data.average = (u32)value; - break; -#endif - default: - /* do nothing */ - break; - } -} - -u64 -halrf_cmn_info_get( - void *dm_void, - u32 cmn_info -) -{ - /* */ - /* This init variable may be changed in run time. */ - /* */ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _hal_rf_ *rf = &dm->rf_table; - u64 return_value = 0; - - switch (cmn_info) { - case HALRF_CMNINFO_ABILITY: - return_value = (u32)rf->rf_supportability; - break; - case HALRF_CMNINFO_RFK_FORBIDDEN : - return_value = dm->IQK_info.rfk_forbidden; - break; - #if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) - case HALRF_CMNINFO_IQK_SEGMENT: - return_value = dm->IQK_info.segment_iqk; - break; - #endif - default: - /* do nothing */ - break; - } - - return return_value; -} - -void -halrf_supportability_init_mp( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _hal_rf_ *rf = &dm->rf_table; - - switch (dm->support_ic_type) { - case ODM_RTL8814B: - #if (RTL8814B_SUPPORT == 1) - rf->rf_supportability = - HAL_RF_TX_PWR_TRACK | - HAL_RF_IQK | - HAL_RF_LCK | - /*HAL_RF_DPK |*/ - 0; - #endif - break; - #if (RTL8822B_SUPPORT == 1) - case ODM_RTL8822B: - rf->rf_supportability = - HAL_RF_TX_PWR_TRACK | - HAL_RF_IQK | - HAL_RF_LCK | - /*HAL_RF_DPK |*/ - 0; - break; - #endif - - #if (RTL8821C_SUPPORT == 1) - case ODM_RTL8821C: - rf->rf_supportability = - HAL_RF_TX_PWR_TRACK | - HAL_RF_IQK | - HAL_RF_LCK | - /*HAL_RF_DPK |*/ - /*HAL_RF_TXGAPK |*/ - 0; - break; - #endif - - default: - rf->rf_supportability = - HAL_RF_TX_PWR_TRACK | - HAL_RF_IQK | - HAL_RF_LCK | - /*HAL_RF_DPK |*/ - /*HAL_RF_TXGAPK |*/ - 0; - break; - - } - - PHYDM_DBG(dm, ODM_COMP_INIT, "IC = ((0x%x)), RF_Supportability Init MP = ((0x%x))\n", dm->support_ic_type, rf->rf_supportability); -} - -void -halrf_supportability_init( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _hal_rf_ *rf = &dm->rf_table; - - switch (dm->support_ic_type) { - case ODM_RTL8814B: - #if (RTL8814B_SUPPORT == 1) - rf->rf_supportability = - HAL_RF_TX_PWR_TRACK | - HAL_RF_IQK | - HAL_RF_LCK | - /*HAL_RF_DPK |*/ - 0; - #endif - break; - #if (RTL8822B_SUPPORT == 1) - case ODM_RTL8822B: - rf->rf_supportability = - HAL_RF_TX_PWR_TRACK | - HAL_RF_IQK | - HAL_RF_LCK | - /*HAL_RF_DPK |*/ - 0; - break; - #endif - - #if (RTL8821C_SUPPORT == 1) - case ODM_RTL8821C: - rf->rf_supportability = - HAL_RF_TX_PWR_TRACK | - HAL_RF_IQK | - HAL_RF_LCK | - /*HAL_RF_DPK |*/ - /*HAL_RF_TXGAPK |*/ - 0; - break; - #endif - - default: - rf->rf_supportability = - HAL_RF_TX_PWR_TRACK | - HAL_RF_IQK | - HAL_RF_LCK | - /*HAL_RF_DPK |*/ - 0; - break; - - } - - PHYDM_DBG(dm, ODM_COMP_INIT, "IC = ((0x%x)), RF_Supportability Init = ((0x%x))\n", dm->support_ic_type, rf->rf_supportability); -} - -void -halrf_watchdog( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - phydm_rf_watchdog(dm); -} -#if 0 -void -halrf_iqk_init( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _hal_rf_ *rf = &(dm->rf_table); - - switch (dm->support_ic_type) { - #if (RTL8814B_SUPPORT == 1) - case ODM_RTL8814B: - break; - #endif - #if (RTL8822B_SUPPORT == 1) - case ODM_RTL8822B: - _iq_calibrate_8822b_init(dm); - break; - #endif - #if (RTL8821C_SUPPORT == 1) - case ODM_RTL8821C: - break; - #endif - - default: - break; - } -} -#endif - - -void -halrf_iqk_trigger( - void *dm_void, - boolean is_recovery -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_iqk_info *iqk_info = &dm->IQK_info; - struct _hal_rf_ *rf = &dm->rf_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + struct dm_dpk_info *dpk_info = &dm->dpk_info; + struct _hal_rf_ *rf = &dm->rf_table; u64 start_time; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) @@ -1321,14 +1575,18 @@ halrf_iqk_trigger( return; #endif - if ((dm->mp_mode != NULL) && (rf->is_con_tx != NULL) && (rf->is_single_tone != NULL) && (rf->is_carrier_suppresion != NULL)) - if (*dm->mp_mode && ((*rf->is_con_tx || *rf->is_single_tone || *rf->is_carrier_suppresion))) + if (dm->mp_mode && + rf->is_con_tx && + rf->is_single_tone && + rf->is_carrier_suppresion) + if (*dm->mp_mode && + ((*rf->is_con_tx || + *rf->is_single_tone || + *rf->is_carrier_suppresion))) return; -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) if (!(rf->rf_supportability & HAL_RF_IQK)) return; -#endif #if DISABLE_BB_RF return; @@ -1343,121 +1601,154 @@ halrf_iqk_trigger( odm_release_spin_lock(dm, RT_IQK_SPINLOCK); start_time = odm_get_current_time(dm); switch (dm->support_ic_type) { -#if (RTL8188E_SUPPORT == 1) +#if (RTL8188E_SUPPORT == 1) case ODM_RTL8188E: phy_iq_calibrate_8188e(dm, is_recovery); break; #endif -#if (RTL8188F_SUPPORT == 1) +#if (RTL8188F_SUPPORT == 1) case ODM_RTL8188F: phy_iq_calibrate_8188f(dm, is_recovery); break; #endif -#if (RTL8192E_SUPPORT == 1) +#if (RTL8192E_SUPPORT == 1) case ODM_RTL8192E: phy_iq_calibrate_8192e(dm, is_recovery); break; #endif -#if (RTL8197F_SUPPORT == 1) +#if (RTL8197F_SUPPORT == 1) case ODM_RTL8197F: phy_iq_calibrate_8197f(dm, is_recovery); break; #endif -#if (RTL8703B_SUPPORT == 1) +#if (RTL8192F_SUPPORT == 1) + case ODM_RTL8192F: + phy_iq_calibrate_8192f(dm, is_recovery); + break; +#endif +#if (RTL8703B_SUPPORT == 1) case ODM_RTL8703B: phy_iq_calibrate_8703b(dm, is_recovery); break; #endif -#if (RTL8710B_SUPPORT == 1) +#if (RTL8710B_SUPPORT == 1) case ODM_RTL8710B: phy_iq_calibrate_8710b(dm, is_recovery); break; #endif -#if (RTL8723B_SUPPORT == 1) +#if (RTL8723B_SUPPORT == 1) case ODM_RTL8723B: phy_iq_calibrate_8723b(dm, is_recovery); break; #endif -#if (RTL8723D_SUPPORT == 1) +#if (RTL8723D_SUPPORT == 1) case ODM_RTL8723D: phy_iq_calibrate_8723d(dm, is_recovery); break; #endif -#if (RTL8812A_SUPPORT == 1) +#if (RTL8721D_SUPPORT == 1) + case ODM_RTL8721D: + phy_iq_calibrate_8721d(dm, is_recovery); + break; +#endif +#if (RTL8812A_SUPPORT == 1) case ODM_RTL8812: phy_iq_calibrate_8812a(dm, is_recovery); break; #endif -#if (RTL8821A_SUPPORT == 1) +#if (RTL8821A_SUPPORT == 1) case ODM_RTL8821: phy_iq_calibrate_8821a(dm, is_recovery); break; #endif -#if (RTL8814A_SUPPORT == 1) +#if (RTL8814A_SUPPORT == 1) case ODM_RTL8814A: phy_iq_calibrate_8814a(dm, is_recovery); break; #endif -#if (RTL8822B_SUPPORT == 1) +#if (RTL8822B_SUPPORT == 1) case ODM_RTL8822B: phy_iq_calibrate_8822b(dm, false, false); break; #endif -#if (RTL8821C_SUPPORT == 1) +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + phy_iq_calibrate_8822c(dm, false, false); + break; +#endif +#if (RTL8821C_SUPPORT == 1) case ODM_RTL8821C: phy_iq_calibrate_8821c(dm, false, false); break; #endif -#if (RTL8814B_SUPPORT == 1) +#if (RTL8814B_SUPPORT == 1) case ODM_RTL8814B: + phy_iq_calibrate_8814b(dm, false, false); + //_do_dpk_8814b(dm); + break; +#endif +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + phy_iq_calibrate_8195b(dm, false, false); + break; +#endif +#if (RTL8198F_SUPPORT == 1) + case ODM_RTL8198F: + phy_iq_calibrate_8198f(dm, false, false); + break; +#endif +#if (RTL8812F_SUPPORT == 1) + case ODM_RTL8812F: + phy_iq_calibrate_8812f(dm, false, false); break; #endif default: break; } - dm->rf_calibrate_info.iqk_progressing_time = odm_get_progressing_time(dm, start_time); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]IQK progressing_time = %lld ms\n", dm->rf_calibrate_info.iqk_progressing_time); - + rf->iqk_progressing_time = odm_get_progressing_time(dm, start_time); + RF_DBG(dm, DBG_RF_LCK, "[IQK]Trigger IQK progressing_time = %lld ms\n", + rf->iqk_progressing_time); odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); dm->rf_calibrate_info.is_iqk_in_progress = false; odm_release_spin_lock(dm, RT_IQK_SPINLOCK); - } else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "== Return the IQK CMD, because RFKs in Progress ==\n"); + } else { + RF_DBG(dm, DBG_RF_IQK, + "== Return the IQK CMD, because RFKs in Progress ==\n"); + } } - - -void -halrf_lck_trigger( - void *dm_void -) +void halrf_lck_trigger(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_iqk_info *iqk_info = &dm->IQK_info; - struct _hal_rf_ *rf = &dm->rf_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + struct _hal_rf_ *rf = &dm->rf_table; u64 start_time; - + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) if (odm_check_power_status(dm) == false) return; #endif - if ((dm->mp_mode != NULL) && (rf->is_con_tx != NULL) && (rf->is_single_tone != NULL) && (rf->is_carrier_suppresion != NULL)) - if (*dm->mp_mode && ((*rf->is_con_tx || *rf->is_single_tone || *rf->is_carrier_suppresion))) + if (dm->mp_mode && + rf->is_con_tx && + rf->is_single_tone && + rf->is_carrier_suppresion) + if (*dm->mp_mode && + ((*rf->is_con_tx || + *rf->is_single_tone || + *rf->is_carrier_suppresion))) return; -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) if (!(rf->rf_supportability & HAL_RF_LCK)) return; -#endif #if DISABLE_BB_RF - return; + return; #endif if (iqk_info->rfk_forbidden) return; while (*dm->is_scan_in_process) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[LCK]scan is in process, bypass LCK\n"); + RF_DBG(dm, DBG_RF_IQK, "[LCK]scan is in process, bypass LCK\n"); return; } @@ -1487,6 +1778,11 @@ halrf_lck_trigger( phy_lc_calibrate_8197f(dm); break; #endif +#if (RTL8192F_SUPPORT == 1) + case ODM_RTL8192F: + phy_lc_calibrate_8192f(dm); + break; +#endif #if (RTL8703B_SUPPORT == 1) case ODM_RTL8703B: phy_lc_calibrate_8703b(dm); @@ -1497,7 +1793,12 @@ halrf_lck_trigger( phy_lc_calibrate_8710b(dm); break; #endif -#if (RTL8723B_SUPPORT == 1) +#if (RTL8721D_SUPPORT == 1) + case ODM_RTL8721D: + phy_lc_calibrate_8721d(dm); + break; +#endif +#if (RTL8723B_SUPPORT == 1) case ODM_RTL8723B: phy_lc_calibrate_8723b(dm); break; @@ -1512,64 +1813,1189 @@ halrf_lck_trigger( phy_lc_calibrate_8812a(dm); break; #endif -#if (RTL8821A_SUPPORT == 1) +#if (RTL8821A_SUPPORT == 1) case ODM_RTL8821: phy_lc_calibrate_8821a(dm); break; #endif -#if (RTL8814A_SUPPORT == 1) +#if (RTL8814A_SUPPORT == 1) case ODM_RTL8814A: phy_lc_calibrate_8814a(dm); break; #endif -#if (RTL8822B_SUPPORT == 1) +#if (RTL8822B_SUPPORT == 1) case ODM_RTL8822B: phy_lc_calibrate_8822b(dm); break; #endif -#if (RTL8821C_SUPPORT == 1) +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + phy_lc_calibrate_8822c(dm); + break; +#endif +#if (RTL8812F_SUPPORT == 1) + case ODM_RTL8812F: + phy_lc_calibrate_8812f(dm); + break; +#endif +#if (RTL8821C_SUPPORT == 1) case ODM_RTL8821C: phy_lc_calibrate_8821c(dm); break; #endif -#if (RTL8814B_SUPPORT == 1) +#if (RTL8814B_SUPPORT == 1) case ODM_RTL8814B: break; #endif default: break; } - dm->rf_calibrate_info.lck_progressing_time = odm_get_progressing_time(dm, start_time); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "[IQK]LCK progressing_time = %lld ms\n", dm->rf_calibrate_info.lck_progressing_time); + dm->rf_calibrate_info.lck_progressing_time = + odm_get_progressing_time(dm, start_time); + RF_DBG(dm, DBG_RF_IQK, "[IQK]LCK progressing_time = %lld ms\n", + dm->rf_calibrate_info.lck_progressing_time); #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) halrf_lck_dbg(dm); #endif odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); dm->rf_calibrate_info.is_lck_in_progress = false; - odm_release_spin_lock(dm, RT_IQK_SPINLOCK); - }else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "== Return the LCK CMD, because RFK is in Progress ==\n"); + odm_release_spin_lock(dm, RT_IQK_SPINLOCK); + } else { + RF_DBG(dm, DBG_RF_IQK, + "= Return the LCK CMD, because RFK is in Progress =\n"); + } } -void -halrf_init( - void *dm_void -) +void halrf_aac_check(struct dm_struct *dm) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - - PHYDM_DBG(dm, ODM_COMP_INIT, "HALRF_Init\n"); + switch (dm->support_ic_type) { +#if (RTL8821C_SUPPORT == 1) + case ODM_RTL8821C: +#if 0 + aac_check_8821c(dm); +#endif + break; +#endif +#if (RTL8822B_SUPPORT == 1) + case ODM_RTL8822B: +#if 1 + aac_check_8822b(dm); +#endif + break; +#endif + default: + break; + } +} - if (*dm->mp_mode == true) +void halrf_x2k_check(struct dm_struct *dm) +{ + + switch (dm->support_ic_type) { + case ODM_RTL8821C: +#if (RTL8821C_SUPPORT == 1) +#endif + break; + case ODM_RTL8822C: +#if (RTL8822C_SUPPORT == 1) + phy_x2_check_8822c(dm); + break; +#endif + case ODM_RTL8812F: +#if (RTL8812F_SUPPORT == 1) + phy_x2_check_8812f(dm); + break; +#endif + default: + break; + } +} + +void halrf_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + + RF_DBG(dm, DBG_RF_INIT, "HALRF_Init\n"); + rf->aac_checked = false; + halrf_init_debug_setting(dm); + + if (rf->manual_rf_supportability && + *rf->manual_rf_supportability != 0xffffffff) { + rf->rf_supportability = *rf->manual_rf_supportability; + } else if (*dm->mp_mode) { halrf_supportability_init_mp(dm); - else + } else { halrf_supportability_init(dm); - + } +#if 1 /*Init all RF funciton*/ - /*iqk_init();*/ - /*dpk_init();*/ + halrf_aac_check(dm); + halrf_dack_trigger(dm); + halrf_x2k_check(dm); +#endif + + /*power trim, thrmal trim, pa bias*/ + phydm_config_new_kfree(dm); + + /*TSSI Init*/ + halrf_tssi_get_efuse(dm); +} + +void halrf_dpk_trigger(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + struct dm_dpk_info *dpk_info = &dm->dpk_info; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + + u64 start_time; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) + if (odm_check_power_status(dm) == false) + return; +#endif + + if (dm->mp_mode && + rf->is_con_tx && + rf->is_single_tone && + rf->is_carrier_suppresion) + if (*dm->mp_mode && + ((*rf->is_con_tx || + *rf->is_single_tone || + *rf->is_carrier_suppresion))) + return; + + if (!(rf->rf_supportability & HAL_RF_DPK)) + return; + +#if DISABLE_BB_RF + return; +#endif + + if (iqk_info->rfk_forbidden) + return; + + if (!rf->is_dpk_in_progress) { + odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); + rf->is_dpk_in_progress = true; + odm_release_spin_lock(dm, RT_IQK_SPINLOCK); + start_time = odm_get_current_time(dm); + + switch (dm->support_ic_type) { +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + do_dpk_8822c(dm); + break; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) +#if (RTL8197F_SUPPORT == 1) + case ODM_RTL8197F: + do_dpk_8197f(dm); + break; +#endif +#if (RTL8192F_SUPPORT == 1) + case ODM_RTL8192F: + do_dpk_8192f(dm); + break; +#endif + +#if (RTL8198F_SUPPORT == 1) + case ODM_RTL8198F: + do_dpk_8198f(dm); + break; +#endif +#if (RTL8812F_SUPPORT == 1) + case ODM_RTL8812F: + do_dpk_8812f(dm); + break; +#endif + +#endif + +#if (RTL8814B_SUPPORT == 1) + case ODM_RTL8814B: + do_dpk_8814b(dm); + break; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + do_dpk_8195b(dm); + break; +#endif +#endif + default: + break; + } + rf->dpk_progressing_time = odm_get_progressing_time(dm, start_time); + RF_DBG(dm, DBG_RF_DPK, "[DPK]DPK progressing_time = %lld ms\n", + rf->dpk_progressing_time); + + odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); + rf->is_dpk_in_progress = false; + odm_release_spin_lock(dm, RT_IQK_SPINLOCK); + } else { + RF_DBG(dm, DBG_RF_DPK, + "== Return the DPK CMD, because RFKs in Progress ==\n"); + } +} + +void halrf_set_dpkbychannel(void *dm_void, boolean dpk_by_ch) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + struct dm_dpk_info *dpk_info = &dm->dpk_info; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + + + switch (dm->support_ic_type) { +#if (RTL8814B_SUPPORT == 1) + case ODM_RTL8814B: + dpk_set_dpkbychannel_8814b(dm, dpk_by_ch); + break; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + dpk_set_dpkbychannel_8195b(dm,dpk_by_ch); + break; +#endif +#endif + default: + if (dpk_by_ch) + dpk_info->is_dpk_by_channel = 1; + else + dpk_info->is_dpk_by_channel = 0; + break; + } + +} + +void halrf_set_dpkenable(void *dm_void, boolean is_dpk_enable) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + struct dm_dpk_info *dpk_info = &dm->dpk_info; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + + + switch (dm->support_ic_type) { +#if (RTL8814B_SUPPORT == 1) + case ODM_RTL8814B: + dpk_set_is_dpk_enable_8814b(dm, is_dpk_enable); + break; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + dpk_set_is_dpk_enable_8195b(dm, is_dpk_enable); + break; +#endif +#endif + + + default: + break; + } + +} +boolean halrf_get_dpkbychannel(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + struct dm_dpk_info *dpk_info = &dm->dpk_info; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + boolean is_dpk_by_channel = true; + + switch (dm->support_ic_type) { +#if (RTL8814B_SUPPORT == 1) + case ODM_RTL8814B: + is_dpk_by_channel = dpk_get_dpkbychannel_8814b(dm); + break; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + is_dpk_by_channel = dpk_get_dpkbychannel_8195b(dm); + break; +#endif +#endif + + default: + break; + } + return is_dpk_by_channel; + +} + + +boolean halrf_get_dpkenable(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + struct dm_dpk_info *dpk_info = &dm->dpk_info; + struct dm_iqk_info *iqk_info = &dm->IQK_info; + boolean is_dpk_enable = true; + + + switch (dm->support_ic_type) { +#if (RTL8814B_SUPPORT == 1) + case ODM_RTL8814B: + is_dpk_enable = dpk_get_is_dpk_enable_8814b(dm); + break; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + is_dpk_enable = dpk_get_is_dpk_enable_8195b(dm); + break; +#endif +#endif + default: + break; + } + return is_dpk_enable; + +} + +u8 halrf_dpk_result_check(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_dpk_info *dpk_info = &dm->dpk_info; + + u8 result = 0; + + switch (dm->support_ic_type) { +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + if (dpk_info->dpk_path_ok == 0x3) + result = 1; + else + result = 0; + break; +#endif + +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + if (dpk_info->dpk_path_ok == 0x1) + result = 1; + else + result = 0; + break; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) + +#if (RTL8197F_SUPPORT == 1) + case ODM_RTL8197F: + if (dpk_info->dpk_path_ok == 0x3) + result = 1; + else + result = 0; + break; +#endif + +#if (RTL8192F_SUPPORT == 1) + case ODM_RTL8192F: + if (dpk_info->dpk_path_ok == 0x3) + result = 1; + else + result = 0; + break; +#endif + +#if (RTL8198F_SUPPORT == 1) + case ODM_RTL8198F: + if (dpk_info->dpk_path_ok == 0xf) + result = 1; + else + result = 0; + break; +#endif + +#if (RTL8814B_SUPPORT == 1) + case ODM_RTL8814B: + if (dpk_info->dpk_path_ok == 0xf) + result = 1; + else + result = 0; + break; +#endif + +#if (RTL8812F_SUPPORT == 1) + case ODM_RTL8812F: + if (dpk_info->dpk_path_ok == 0x3) + result = 1; + else + result = 0; + break; +#endif + +#endif + default: + break; + } + return result; +} + +void halrf_dpk_sram_read(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + u8 path, group; + + switch (dm->support_ic_type) { +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + dpk_coef_read_8822c(dm); + break; +#endif + +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + dpk_sram_read_8195b(dm); + break; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) + +#if (RTL8197F_SUPPORT == 1) + case ODM_RTL8197F: + dpk_sram_read_8197f(dm); + break; +#endif + +#if (RTL8192F_SUPPORT == 1) + case ODM_RTL8192F: + dpk_sram_read_8192f(dm); + break; +#endif + +#if (RTL8198F_SUPPORT == 1) + case ODM_RTL8198F: + dpk_sram_read_8198f(dm); + break; +#endif + +#if (RTL8814B_SUPPORT == 1) + case ODM_RTL8814B: + dpk_sram_read_8814b(dm); + break; +#endif + +#if (RTL8812F_SUPPORT == 1) + case ODM_RTL8812F: + dpk_coef_read_8812f(dm); + break; +#endif + + +#endif + default: + break; + } +} + +void halrf_dpk_enable_disable(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + + if (!(rf->rf_supportability & HAL_RF_DPK)) + return; + + if (!rf->is_dpk_in_progress) { + odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); + rf->is_dpk_in_progress = true; + odm_release_spin_lock(dm, RT_IQK_SPINLOCK); + + switch (dm->support_ic_type) { +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + dpk_enable_disable_8822c(dm); + break; +#endif +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + dpk_enable_disable_8195b(dm); + break; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) + +#if (RTL8197F_SUPPORT == 1) + case ODM_RTL8197F: + phy_dpk_enable_disable_8197f(dm); + break; +#endif +#if (RTL8192F_SUPPORT == 1) + case ODM_RTL8192F: + phy_dpk_enable_disable_8192f(dm); + break; +#endif + +#if (RTL8198F_SUPPORT == 1) + case ODM_RTL8198F: + dpk_enable_disable_8198f(dm); + break; +#endif + +#if (RTL8814B_SUPPORT == 1) + case ODM_RTL8814B: + dpk_enable_disable_8814b(dm); + break; +#endif + +#if (RTL8812F_SUPPORT == 1) + case ODM_RTL8812F: + dpk_enable_disable_8812f(dm); + break; +#endif + + +#endif + default: + break; + } + + odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); + rf->is_dpk_in_progress = false; + odm_release_spin_lock(dm, RT_IQK_SPINLOCK); + } else { + RF_DBG(dm, DBG_RF_DPK, + "== Return the DPK CMD, because RFKs in Progress ==\n"); + } +} + +void halrf_dpk_track(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_dpk_info *dpk_info = &dm->dpk_info; + struct _hal_rf_ *rf = &dm->rf_table; + + if (rf->is_dpk_in_progress || dm->rf_calibrate_info.is_iqk_in_progress || + dm->is_psd_in_process || (dpk_info->dpk_path_ok == 0) || + !(rf->rf_supportability & HAL_RF_DPK_TRACK)) + return; + + switch (dm->support_ic_type) { +#if (RTL8814B_SUPPORT == 1) + case ODM_RTL8814B: + dpk_track_8814b(dm); + break; +#endif + +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + dpk_track_8822c(dm); + break; +#endif + +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + dpk_track_8195b(dm); + break; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) + +#if (RTL8197F_SUPPORT == 1) + case ODM_RTL8197F: + phy_dpk_track_8197f(dm); + break; +#endif + +#if (RTL8192F_SUPPORT == 1) + case ODM_RTL8192F: + phy_dpk_track_8192f(dm); + break; +#endif + +#if (RTL8198F_SUPPORT == 1) + case ODM_RTL8198F: + dpk_track_8198f(dm); + break; +#endif + +#if (RTL8812F_SUPPORT == 1) + case ODM_RTL8812F: + dpk_track_8812f(dm); + break; +#endif + +#endif + default: + break; + } +} + +void halrf_set_dpk_track(void *dm_void, u8 enable) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &(dm->rf_table); + + if (enable) + rf->rf_supportability = rf->rf_supportability | HAL_RF_DPK_TRACK; + else + rf->rf_supportability = rf->rf_supportability & ~HAL_RF_DPK_TRACK; +} + +void halrf_dpk_reload(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_dpk_info *dpk_info = &dm->dpk_info; + + switch (dm->support_ic_type) { +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + if (dpk_info->dpk_path_ok > 0) + dpk_reload_8195b(dm); + break; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) + +#if (RTL8197F_SUPPORT == 1) + case ODM_RTL8197F: + if (dpk_info->dpk_path_ok > 0) + dpk_reload_8197f(dm); + break; +#endif + +#if (RTL8192F_SUPPORT == 1) + case ODM_RTL8192F: + if (dpk_info->dpk_path_ok > 0) + dpk_reload_8192f(dm); + + break; +#endif + +#if (RTL8198F_SUPPORT == 1) + case ODM_RTL8198F: + if (dpk_info->dpk_path_ok > 0) + dpk_reload_8198f(dm); + break; +#endif + +#if (RTL8814B_SUPPORT == 1) + case ODM_RTL8814B: + if (dpk_info->dpk_path_ok > 0) + dpk_reload_8814b(dm); + break; +#endif + +#endif + default: + break; + } +} + +void halrf_dpk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + struct dm_dpk_info *dpk_info = &dm->dpk_info; + + if (!(rf->rf_supportability & HAL_RF_DPK) || rf->is_dpk_in_progress) + return; + + switch (dm->support_ic_type) { +#if (RTL8822C_SUPPORT == 1) + case ODM_RTL8822C: + dpk_info_rsvd_page_8822c(dm, buf, buf_size); + break; +#endif + default: + break; + } +} + +enum hal_status +halrf_config_rfk_with_header_file(void *dm_void, u32 config_type) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + enum hal_status result = HAL_STATUS_SUCCESS; +#if 0 +#if (RTL8822B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8822B) { + if (config_type == CONFIG_BB_RF_CAL_INIT) + odm_read_and_config_mp_8822b_cal_init(dm); + } +#endif +#endif +#if (RTL8198F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8198F) { + if (config_type == CONFIG_BB_RF_CAL_INIT) + odm_read_and_config_mp_8198f_cal_init(dm); + } +#endif +#if (RTL8812F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8812F) { + if (config_type == CONFIG_BB_RF_CAL_INIT) + odm_read_and_config_mp_8812f_cal_init(dm); + } +#endif +#if (RTL8822C_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8822C) { + if (config_type == CONFIG_BB_RF_CAL_INIT) + odm_read_and_config_mp_8822c_cal_init(dm); + } +#endif +#if (RTL8814B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8814B) { + if (config_type == CONFIG_BB_RF_CAL_INIT) + odm_read_and_config_mp_8814b_cal_init(dm); + } +#endif +#if (RTL8195B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8195B) { + if (config_type == CONFIG_BB_RF_CAL_INIT) + odm_read_and_config_mp_8195b_cal_init(dm); + } +#endif + return result; +} + +void halrf_txgapk_trigger(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + + u64 start_time; + + start_time = odm_get_current_time(dm); + + switch (dm->support_ic_type) { +#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) +#if (RTL8195B_SUPPORT == 1) + case ODM_RTL8195B: + phy_txgap_calibrate_8195b(dm, false); + break; +#endif +#endif + + default: + break; + } + rf->dpk_progressing_time = + odm_get_progressing_time(dm_void, start_time); + RF_DBG(dm, DBG_RF_TXGAPK, "[TGGC]TXGAPK progressing_time = %lld ms\n", + rf->dpk_progressing_time); +} + +void halrf_tssi_get_efuse(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + +#if (RTL8822C_SUPPORT == 1) + if (dm->support_ic_type & ODM_RTL8822C) { + /*halrf_tssi_get_efuse_8822c(dm);*/ + /*halrf_tssi_get_kfree_efuse_8822c(dm);*/ + halrf_get_efuse_thermal_pwrtype_8822c(dm); + } +#endif + +#if (RTL8814B_SUPPORT == 1) + if (dm->support_ic_type & ODM_RTL8814B) { + halrf_tssi_get_efuse_8814b(dm); + } +#endif + +} + +void halrf_do_tssi(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + +#if (RTL8822C_SUPPORT == 1) + /*halrf_do_tssi_8822c(dm);*/ + halrf_do_thermal_8822c(dm); + +#endif +} + +void halrf_do_thermal(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + +#if (RTL8822C_SUPPORT == 1) + halrf_do_thermal_8822c(dm); +#endif } +u32 halrf_set_tssi_value(void *dm_void, u32 tssi_value) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + +#if (RTL8822C_SUPPORT == 1) + return halrf_set_tssi_value_8822c(dm, tssi_value); +#endif + return 0; +} + +void halrf_set_tssi_power(void *dm_void, s8 power) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + +#if (RTL8822C_SUPPORT == 1) + /*halrf_set_tssi_poewr_8822c(dm, power);*/ +#endif +} + +void halrf_tssi_set_de_for_tx_verify(void *dm_void, u32 tssi_de, u8 path) +{ + return; +} +u32 halrf_query_tssi_value(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + +#if (RTL8822C_SUPPORT == 1) + /*return halrf_query_tssi_value_8822c(dm);*/ +#endif + return 0; +} + +void halrf_tssi_cck(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + +#if (RTL8822C_SUPPORT == 1) + /*halrf_tssi_cck_8822c(dm);*/ + halrf_thermal_cck_8822c(dm); +#endif + +} + +void halrf_thermal_cck(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + +#if (RTL8822C_SUPPORT == 1) + halrf_thermal_cck_8822c(dm); +#endif + +} + +void halrf_tssi_set_de(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + +#if (RTL8814B_SUPPORT == 1) + if (dm->support_ic_type & ODM_RTL8814B) + halrf_tssi_set_de_8814b(dm); +#endif +} + +void halrf_tssi_dck(void *dm_void, u8 direct_do) +{ + +} + +void halrf_calculate_tssi_codeword(void *dm_void) +{ + +} + +void halrf_set_tssi_codeword(void *dm_void) +{ + +} + +u8 halrf_get_tssi_codeword_for_txindex(void *dm_void) +{ + return 0; +} + + +u32 halrf_tssi_get_de(void *dm_void, u8 path) +{ + return 0; +} + +/*Golbal function*/ +void halrf_reload_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 i; + + for (i = 0; i < num; i++) + odm_write_4byte(dm, bp_reg[i], bp[i]); +} + +void halrf_reload_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, + u8 ss) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 i, path; + + for (i = 0; i < num; i++) { + for (path = 0; path < ss; path++) + odm_set_rf_reg(dm, (enum rf_path)path, bp_reg[i], + MASK20BITS, bp[i][path]); + } +} + +void halrf_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 i; + + for (i = 0; i < num; i++) + bp[i] = odm_read_4byte(dm, bp_reg[i]); +} + +void halrf_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, u8 ss) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 i, path; + + for (i = 0; i < num; i++) { + for (path = 0; path < ss; path++) { + bp[i][path] = + odm_get_rf_reg(dm, (enum rf_path)path, + bp_reg[i], MASK20BITS); + } + } +} + +void halrf_swap(void *dm_void, u32 *v1, u32 *v2) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 temp; + + temp = *v1; + *v1 = *v2; + *v2 = temp; +} + +void halrf_bubble(void *dm_void, u32 *v1, u32 *v2) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 temp; + + if (*v1 >= 0x200 && *v2 >= 0x200) { + if (*v1 > *v2) + halrf_swap(dm, v1, v2); + } else if (*v1 < 0x200 && *v2 < 0x200) { + if (*v1 > *v2) + halrf_swap(dm, v1, v2); + } else if (*v1 < 0x200 && *v2 >= 0x200) { + halrf_swap(dm, v1, v2); + } +} + +void halrf_b_sort(void *dm_void, u32 *iv, u32 *qv) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 temp; + u32 i, j; + + RF_DBG(dm, DBG_RF_DACK, "[DACK]bubble!!!!!!!!!!!!"); + for (i = 0; i < SN - 1; i++) { + for (j = 0; j < (SN - 1 - i) ; j++) { + halrf_bubble(dm, &iv[j], &iv[j + 1]); + halrf_bubble(dm, &qv[j], &qv[j + 1]); + } + } +} + +void halrf_minmax_compare(void *dm_void, u32 value, u32 *min, + u32 *max) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (value >= 0x200) { + if (*min >= 0x200) { + if (*min > value) + *min = value; + } else { + *min = value; + } + if (*max >= 0x200) { + if (*max < value) + *max = value; + } + } else { + if (*min < 0x200) { + if (*min > value) + *min = value; + } + + if (*max >= 0x200) { + *max = value; + } else { + if (*max < value) + *max = value; + } + } +} + +u32 halrf_delta(void *dm_void, u32 v1, u32 v2) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (v1 >= 0x200 && v2 >= 0x200) { + if (v1 > v2) + return v1 - v2; + else + return v2 - v1; + } else if (v1 >= 0x200 && v2 < 0x200) { + return v2 + (0x400 - v1); + } else if (v1 < 0x200 && v2 >= 0x200) { + return v1 + (0x400 - v2); + } + + if (v1 > v2) + return v1 - v2; + else + return v2 - v1; +} + +boolean halrf_compare(void *dm_void, u32 value) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + boolean fail = false; + + if (value >= 0x200 && (0x400 - value) > 0x64) + fail = true; + else if (value < 0x200 && value > 0x64) + fail = true; + + if (fail) + RF_DBG(dm, DBG_RF_DACK, "[DACK]overflow!!!!!!!!!!!!!!!"); + return fail; +} + +void halrf_mode(void *dm_void, u32 *i_value, u32 *q_value) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 iv[SN], qv[SN], im[SN], qm[SN], temp, temp1, temp2; + u32 p, m, t; + u32 i_max = 0, q_max = 0, i_min = 0x0, q_min = 0x0, c = 0x0; + u32 i_delta, q_delta; + u8 i, j, ii = 0, qi = 0; + boolean fail = false; + + ODM_delay_ms(10); + for (i = 0; i < SN; i++) { + im[i] = 0; + qm[i] = 0; + } + i = 0; + c = 0; + while (i < SN && c < 1000) { + c++; + temp = odm_get_bb_reg(dm, 0x2dbc, 0x3fffff); + iv[i] = (temp & 0x3ff000) >> 12; + qv[i] = temp & 0x3ff; + + fail = false; + if (halrf_compare(dm, iv[i])) + fail = true; + if (halrf_compare(dm, qv[i])) + fail = true; + if (!fail) + i++; + } + c = 0; + do { + c++; + i_min = iv[0]; + i_max = iv[0]; + q_min = qv[0]; + q_max = qv[0]; + for (i = 0; i < SN; i++) { + halrf_minmax_compare(dm, iv[i], &i_min, &i_max); + halrf_minmax_compare(dm, qv[i], &q_min, &q_max); + } + RF_DBG(dm, DBG_RF_DACK, "[DACK]i_min=0x%x, i_max=0x%x", + i_min, i_max); + RF_DBG(dm, DBG_RF_DACK, "[DACK]q_min=0x%x, q_max=0x%x", + q_min, q_max); + if (i_max < 0x200 && i_min < 0x200) + i_delta = i_max - i_min; + else if (i_max >= 0x200 && i_min >= 0x200) + i_delta = i_max - i_min; + else + i_delta = i_max + (0x400 - i_min); + + if (q_max < 0x200 && q_min < 0x200) + q_delta = q_max - q_min; + else if (q_max >= 0x200 && q_min >= 0x200) + q_delta = q_max - q_min; + else + q_delta = q_max + (0x400 - q_min); + RF_DBG(dm, DBG_RF_DACK, "[DACK]i_delta=0x%x, q_delta=0x%x", + i_delta, q_delta); + halrf_b_sort(dm, iv, qv); + if (i_delta > 5 || q_delta > 5) { + temp = odm_get_bb_reg(dm, 0x2dbc, 0x3fffff); + iv[0] = (temp & 0x3ff000) >> 12; + qv[0] = temp & 0x3ff; + temp = odm_get_bb_reg(dm, 0x2dbc, 0x3fffff); + iv[SN - 1] = (temp & 0x3ff000) >> 12; + qv[SN - 1] = temp & 0x3ff; + } else { + break; + } + } while (c < 100); +#if 1 +#if 0 + for (i = 0; i < SN; i++) + RF_DBG(dm, DBG_RF_DACK, "[DACK]iv[%d] = 0x%x\n", i, iv[i]); + for (i = 0; i < SN; i++) + RF_DBG(dm, DBG_RF_DACK, "[DACK]qv[%d] = 0x%x\n", i, qv[i]); +#endif + /*i*/ + m = 0; + p = 0; + for (i = 10; i < SN - 10; i++) { + if (iv[i] > 0x200) + m = (0x400 - iv[i]) + m; + else + p = iv[i] + p; + } + + if (p > m) { + t = p - m; + t = t / (SN - 20); + } else { + t = m - p; + t = t / (SN - 20); + if (t != 0x0) + t = 0x400 - t; + } + *i_value = t; + /*q*/ + m = 0; + p = 0; + for (i = 10; i < SN - 10; i++) { + if (qv[i] > 0x200) + m = (0x400 - qv[i]) + m; + else + p = qv[i] + p; + } + if (p > m) { + t = p - m; + t = t / (SN - 20); + } else { + t = m - p; + t = t / (SN - 20); + if (t != 0x0) + t = 0x400 - t; + } + *q_value = t; +#endif +} diff --git a/hal/phydm/halrf/halrf.h b/hal/phydm/halrf/halrf.h index 7240397..4e69d9c 100644 --- a/hal/phydm/halrf/halrf.h +++ b/hal/phydm/halrf/halrf.h @@ -23,433 +23,657 @@ * *****************************************************************************/ +#ifndef __HALRF_H__ +#define __HALRF_H__ -#ifndef _HALRF_H__ -#define _HALRF_H__ - -/*============================================================*/ -/*include files*/ -/*============================================================*/ +/*@============================================================*/ +/*@include files*/ +/*@============================================================*/ #include "halrf/halrf_psd.h" +#if (RTL8822B_SUPPORT == 1) +#include "halrf/rtl8822b/halrf_rfk_init_8822b.h" +#endif +#if (RTL8822C_SUPPORT == 1) +#include "halrf/rtl8822c/halrf_rfk_init_8822c.h" +#include "halrf/rtl8822c/halrf_iqk_8822c.h" +#include "halrf/rtl8822c/halrf_tssi_8822c.h" +#include "halrf/rtl8822c/halrf_dpk_8822c.h" +#endif +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) +#if (RTL8198F_SUPPORT == 1) +#include "halrf/rtl8198f/halrf_rfk_init_8198f.h" +#endif +#if (RTL8812F_SUPPORT == 1) +#include "halrf/rtl8812f/halrf_rfk_init_8812f.h" +#endif -/*============================================================*/ -/*Definition */ -/*============================================================*/ +#endif + +#if (RTL8814B_SUPPORT == 1) +#include "halrf/rtl8814b/halrf_rfk_init_8814b.h" +#include "halrf/rtl8814b/halrf_iqk_8814b.h" +#include "halrf/rtl8814b/halrf_dpk_8814b.h" +#endif + +/*@============================================================*/ +/*@Definition */ +/*@============================================================*/ /*IQK version*/ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -#define IQK_VERSION_8188E "0x14" -#define IQK_VERSION_8192E "0x01" -#define IQK_VERSION_8723B "0x1e" -#define IQK_VERSION_8812A "0x01" -#define IQK_VERSION_8821A "0x01" +#define IQK_VER_8188E "0x14" +#define IQK_VER_8192E "0x01" +#define IQK_VER_8192F "0x01" +#define IQK_VER_8723B "0x1e" +#define IQK_VER_8812A "0x02" +#define IQK_VER_8821A "0x01" #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -#define IQK_VERSION_8188E "0x01" -#define IQK_VERSION_8192E "0x01" -#define IQK_VERSION_8723B "0x1e" -#define IQK_VERSION_8812A "0x01" -#define IQK_VERSION_8821A "0x01" +#define IQK_VER_8188E "0x01" +#define IQK_VER_8192E "0x01" +#define IQK_VER_8192F "0x01" +#define IQK_VER_8723B "0x1e" +#define IQK_VER_8812A "0x01" +#define IQK_VER_8821A "0x01" #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -#define IQK_VERSION_8188E "0x01" -#define IQK_VERSION_8192E "0x01" -#define IQK_VERSION_8723B "0x1e" -#define IQK_VERSION_8812A "0x01" -#define IQK_VERSION_8821A "0x01" +#define IQK_VER_8188E "0x01" +#define IQK_VER_8192E "0x01" +#define IQK_VER_8192F "0x01" +#define IQK_VER_8723B "0x1e" +#define IQK_VER_8812A "0x01" +#define IQK_VER_8821A "0x01" +#elif (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) +#define IQK_VER_8188E "0x01" +#define IQK_VER_8192E "0x01" +#define IQK_VER_8192F "0x01" +#define IQK_VER_8723B "0x1e" +#define IQK_VER_8812A "0x01" +#define IQK_VER_8821A "0x01" #endif -#define IQK_VERSION_8814A "0x0f" -#define IQK_VERSION_8188F "0x01" -#define IQK_VERSION_8197F "0x01" -#define IQK_VERSION_8703B "0x05" -#define IQK_VERSION_8710B "0x01" -#define IQK_VERSION_8723D "0x02" -#define IQK_VERSION_8822B "0x2f" -#define IQK_VERSION_8821C "0x23" +#define IQK_VER_8814A "0x0f" +#define IQK_VER_8188F "0x01" +#define IQK_VER_8197F "0x1d" +#define IQK_VER_8703B "0x05" +#define IQK_VER_8710B "0x01" +#define IQK_VER_8723D "0x02" +#define IQK_VER_8822B "0x30" +#define IQK_VER_8822C "0x0b" +#define IQK_VER_8821C "0x23" +#define IQK_VER_8198F "0x09" +#define IQK_VER_8814B "0x0b" +#define IQK_VER_8812F "0x07" /*LCK version*/ -#define LCK_VERSION_8188E "0x01" -#define LCK_VERSION_8192E "0x01" -#define LCK_VERSION_8723B "0x01" -#define LCK_VERSION_8812A "0x01" -#define LCK_VERSION_8821A "0x01" -#define LCK_VERSION_8814A "0x01" -#define LCK_VERSION_8188F "0x01" -#define LCK_VERSION_8197F "0x01" -#define LCK_VERSION_8703B "0x01" -#define LCK_VERSION_8710B "0x01" -#define LCK_VERSION_8723D "0x01" -#define LCK_VERSION_8822B "0x01" -#define LCK_VERSION_8821C "0x01" +#define LCK_VER_8188E "0x01" +#define LCK_VER_8192E "0x01" +#define LCK_VER_8192F "0x01" +#define LCK_VER_8723B "0x01" +#define LCK_VER_8812A "0x01" +#define LCK_VER_8821A "0x01" +#define LCK_VER_8814A "0x01" +#define LCK_VER_8188F "0x01" +#define LCK_VER_8197F "0x01" +#define LCK_VER_8703B "0x01" +#define LCK_VER_8710B "0x01" +#define LCK_VER_8723D "0x01" +#define LCK_VER_8822B "0x02" +#define LCK_VER_8822C "0x00" +#define LCK_VER_8821C "0x02" +#define LCK_VER_8814B "0x00" +#define LCK_VER_8195B "0x02" /*power tracking version*/ -#define POWERTRACKING_VERSION_8188E "0x01" -#define POWERTRACKING_VERSION_8192E "0x01" -#define POWERTRACKING_VERSION_8723B "0x01" -#define POWERTRACKING_VERSION_8812A "0x01" -#define POWERTRACKING_VERSION_8821A "0x01" -#define POWERTRACKING_VERSION_8814A "0x01" -#define POWERTRACKING_VERSION_8188F "0x01" -#define POWERTRACKING_VERSION_8197F "0x01" -#define POWERTRACKING_VERSION_8703B "0x01" -#define POWERTRACKING_VERSION_8710B "0x01" -#define POWERTRACKING_VERSION_8723D "0x01" -#define POWERTRACKING_VERSION_8822B "0x01" -#define POWERTRACKING_VERSION_8821C "0x01" +#define PWRTRK_VER_8188E "0x01" +#define PWRTRK_VER_8192E "0x01" +#define PWRTRK_VER_8192F "0x01" +#define PWRTRK_VER_8723B "0x01" +#define PWRTRK_VER_8812A "0x01" +#define PWRTRK_VER_8821A "0x01" +#define PWRTRK_VER_8814A "0x01" +#define PWRTRK_VER_8188F "0x01" +#define PWRTRK_VER_8197F "0x01" +#define PWRTRK_VER_8703B "0x01" +#define PWRTRK_VER_8710B "0x01" +#define PWRTRK_VER_8723D "0x01" +#define PWRTRK_VER_8822B "0x01" +#define PWRTRK_VER_8822C "0x00" +#define PWRTRK_VER_8821C "0x01" +#define PWRTRK_VER_8814B "0x00" -/*DPK tracking version*/ -#define DPK_VERSION_8188E "NONE" -#define DPK_VERSION_8192E "NONE" -#define DPK_VERSION_8723B "NONE" -#define DPK_VERSION_8812A "NONE" -#define DPK_VERSION_8821A "NONE" -#define DPK_VERSION_8814A "NONE" -#define DPK_VERSION_8188F "NONE" -#define DPK_VERSION_8197F "NONE" -#define DPK_VERSION_8703B "NONE" -#define DPK_VERSION_8710B "NONE" -#define DPK_VERSION_8723D "NONE" -#define DPK_VERSION_8822B "NONE" -#define DPK_VERSION_8821C "NONE" +/*DPK version*/ +#define DPK_VER_8188E "NONE" +#define DPK_VER_8192E "NONE" +#define DPK_VER_8723B "NONE" +#define DPK_VER_8812A "NONE" +#define DPK_VER_8821A "NONE" +#define DPK_VER_8814A "NONE" +#define DPK_VER_8188F "NONE" +#define DPK_VER_8197F "0x08" +#define DPK_VER_8703B "NONE" +#define DPK_VER_8710B "NONE" +#define DPK_VER_8723D "NONE" +#define DPK_VER_8822B "NONE" +#define DPK_VER_8822C "0x18" +#define DPK_VER_8821C "NONE" +#define DPK_VER_8192F "0x0d" +#define DPK_VER_8198F "0x0a" +#define DPK_VER_8814B "0x04" +#define DPK_VER_8195B "0x0a" +#define DPK_VER_8812F "0x02" + +/*RFK_INIT version*/ +#define RFK_INIT_VER_8822B "0x8" +#define RFK_INIT_VER_8822C "0x7" +#define RFK_INIT_VER_8195B "0x1" +#define RFK_INIT_VER_8198F "0x5" +#define RFK_INIT_VER_8814B "0x5" +#define RFK_INIT_VER_8812F "0x2" + + +/*DACK version*/ +#define DACK_VER_8822C "0x5" +#define DACK_VER_8814B "0x3" /*Kfree tracking version*/ -#define KFREE_VERSION_8188E (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE" -#define KFREE_VERSION_8192E (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE" -#define KFREE_VERSION_8723B (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE" -#define KFREE_VERSION_8812A (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE" -#define KFREE_VERSION_8821A (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE" -#define KFREE_VERSION_8814A (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE" -#define KFREE_VERSION_8188F (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE" -#define KFREE_VERSION_8197F (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE" -#define KFREE_VERSION_8703B (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE" -#define KFREE_VERSION_8710B (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE" -#define KFREE_VERSION_8723D (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE" -#define KFREE_VERSION_8822B (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE" -#define KFREE_VERSION_8821C (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE" +#define KFREE_VER_8188E \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8192E \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8192F \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8723B \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8812A \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8821A \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8814A \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8188F \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8197F \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8703B \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8710B \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8723D \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8822B \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8822C \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8821C \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" +#define KFREE_VER_8814B \ + (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" /*PA Bias Calibration version*/ -#define PABIASK_VERSION_8188E (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE" -#define PABIASK_VERSION_8192E (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE" -#define PABIASK_VERSION_8723B (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE" -#define PABIASK_VERSION_8812A (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE" -#define PABIASK_VERSION_8821A (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE" -#define PABIASK_VERSION_8814A (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE" -#define PABIASK_VERSION_8188F (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE" -#define PABIASK_VERSION_8197F (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE" -#define PABIASK_VERSION_8703B (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE" -#define PABIASK_VERSION_8710B (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE" -#define PABIASK_VERSION_8723D (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE" -#define PABIASK_VERSION_8822B (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE" -#define PABIASK_VERSION_8821C (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE" +#define PABIASK_VER_8188E \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8192E \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8192F \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8723B \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8812A \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8821A \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8814A \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8188F \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8197F \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8703B \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8710B \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8723D \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8822B \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8822C \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8821C \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" +#define PABIASK_VER_8814B \ + (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" + +#define HALRF_IQK_VER \ + (dm->support_ic_type == ODM_RTL8188E) ? IQK_VER_8188E : \ + (dm->support_ic_type == ODM_RTL8192E) ? IQK_VER_8192E : \ + (dm->support_ic_type == ODM_RTL8192F) ? IQK_VER_8192F : \ + (dm->support_ic_type == ODM_RTL8723B) ? IQK_VER_8723B : \ + (dm->support_ic_type == ODM_RTL8812) ? IQK_VER_8812A : \ + (dm->support_ic_type == ODM_RTL8821) ? IQK_VER_8821A : \ + (dm->support_ic_type == ODM_RTL8814A) ? IQK_VER_8814A : \ + (dm->support_ic_type == ODM_RTL8188F) ? IQK_VER_8188F : \ + (dm->support_ic_type == ODM_RTL8197F) ? IQK_VER_8197F : \ + (dm->support_ic_type == ODM_RTL8703B) ? IQK_VER_8703B : \ + (dm->support_ic_type == ODM_RTL8710B) ? IQK_VER_8710B : \ + (dm->support_ic_type == ODM_RTL8723D) ? IQK_VER_8723D : \ + (dm->support_ic_type == ODM_RTL8822B) ? IQK_VER_8822B : \ + (dm->support_ic_type == ODM_RTL8822C) ? IQK_VER_8822C : \ + (dm->support_ic_type == ODM_RTL8821C) ? IQK_VER_8821C : \ + (dm->support_ic_type == ODM_RTL8814B) ? IQK_VER_8814B : "unknown" + +#define HALRF_LCK_VER \ + (dm->support_ic_type == ODM_RTL8188E) ? LCK_VER_8188E : \ + (dm->support_ic_type == ODM_RTL8192E) ? LCK_VER_8192E : \ + (dm->support_ic_type == ODM_RTL8192F) ? LCK_VER_8192F : \ + (dm->support_ic_type == ODM_RTL8723B) ? LCK_VER_8723B : \ + (dm->support_ic_type == ODM_RTL8812) ? LCK_VER_8812A : \ + (dm->support_ic_type == ODM_RTL8821) ? LCK_VER_8821A : \ + (dm->support_ic_type == ODM_RTL8814A) ? LCK_VER_8814A : \ + (dm->support_ic_type == ODM_RTL8188F) ? LCK_VER_8188F : \ + (dm->support_ic_type == ODM_RTL8197F) ? LCK_VER_8197F : \ + (dm->support_ic_type == ODM_RTL8703B) ? LCK_VER_8703B : \ + (dm->support_ic_type == ODM_RTL8710B) ? LCK_VER_8710B : \ + (dm->support_ic_type == ODM_RTL8723D) ? LCK_VER_8723D : \ + (dm->support_ic_type == ODM_RTL8822B) ? LCK_VER_8822B : \ + (dm->support_ic_type == ODM_RTL8822C) ? LCK_VER_8822C : \ + (dm->support_ic_type == ODM_RTL8821C) ? LCK_VER_8821C : \ + (dm->support_ic_type == ODM_RTL8814B) ? LCK_VER_8814B : "unknown" + +#define HALRF_POWRTRACKING_VER \ + (dm->support_ic_type == ODM_RTL8188E) ? PWRTRK_VER_8188E : \ + (dm->support_ic_type == ODM_RTL8192E) ? PWRTRK_VER_8192E : \ + (dm->support_ic_type == ODM_RTL8192F) ? PWRTRK_VER_8192F : \ + (dm->support_ic_type == ODM_RTL8723B) ? PWRTRK_VER_8723B : \ + (dm->support_ic_type == ODM_RTL8812) ? PWRTRK_VER_8812A : \ + (dm->support_ic_type == ODM_RTL8821) ? PWRTRK_VER_8821A : \ + (dm->support_ic_type == ODM_RTL8814A) ? PWRTRK_VER_8814A : \ + (dm->support_ic_type == ODM_RTL8188F) ? PWRTRK_VER_8188F : \ + (dm->support_ic_type == ODM_RTL8197F) ? PWRTRK_VER_8197F : \ + (dm->support_ic_type == ODM_RTL8703B) ? PWRTRK_VER_8703B : \ + (dm->support_ic_type == ODM_RTL8710B) ? PWRTRK_VER_8710B : \ + (dm->support_ic_type == ODM_RTL8723D) ? PWRTRK_VER_8723D : \ + (dm->support_ic_type == ODM_RTL8822B) ? PWRTRK_VER_8822B : \ + (dm->support_ic_type == ODM_RTL8822C) ? PWRTRK_VER_8822C : \ + (dm->support_ic_type == ODM_RTL8821C) ? PWRTRK_VER_8821C : \ + (dm->support_ic_type == ODM_RTL8814B) ? PWRTRK_VER_8814B : "unknown" + +#define HALRF_DPK_VER \ + (dm->support_ic_type == ODM_RTL8188E) ? DPK_VER_8188E : \ + (dm->support_ic_type == ODM_RTL8192E) ? DPK_VER_8192E : \ + (dm->support_ic_type == ODM_RTL8192F) ? DPK_VER_8192F : \ + (dm->support_ic_type == ODM_RTL8723B) ? DPK_VER_8723B : \ + (dm->support_ic_type == ODM_RTL8812) ? DPK_VER_8812A : \ + (dm->support_ic_type == ODM_RTL8821) ? DPK_VER_8821A : \ + (dm->support_ic_type == ODM_RTL8814A) ? DPK_VER_8814A : \ + (dm->support_ic_type == ODM_RTL8188F) ? DPK_VER_8188F : \ + (dm->support_ic_type == ODM_RTL8197F) ? DPK_VER_8197F : \ + (dm->support_ic_type == ODM_RTL8198F) ? DPK_VER_8198F : \ + (dm->support_ic_type == ODM_RTL8703B) ? DPK_VER_8703B : \ + (dm->support_ic_type == ODM_RTL8710B) ? DPK_VER_8710B : \ + (dm->support_ic_type == ODM_RTL8723D) ? DPK_VER_8723D : \ + (dm->support_ic_type == ODM_RTL8822B) ? DPK_VER_8822B : \ + (dm->support_ic_type == ODM_RTL8822C) ? DPK_VER_8822C : \ + (dm->support_ic_type == ODM_RTL8821C) ? DPK_VER_8821C : \ + (dm->support_ic_type == ODM_RTL8814B) ? DPK_VER_8814B : "unknown" + +#define HALRF_KFREE_VER \ + (dm->support_ic_type == ODM_RTL8188E) ? KFREE_VER_8188E : \ + (dm->support_ic_type == ODM_RTL8192E) ? KFREE_VER_8192E : \ + (dm->support_ic_type == ODM_RTL8192F) ? KFREE_VER_8192F : \ + (dm->support_ic_type == ODM_RTL8723B) ? KFREE_VER_8723B : \ + (dm->support_ic_type == ODM_RTL8812) ? KFREE_VER_8812A : \ + (dm->support_ic_type == ODM_RTL8821) ? KFREE_VER_8821A : \ + (dm->support_ic_type == ODM_RTL8814A) ? KFREE_VER_8814A : \ + (dm->support_ic_type == ODM_RTL8188F) ? KFREE_VER_8188F : \ + (dm->support_ic_type == ODM_RTL8197F) ? KFREE_VER_8197F : \ + (dm->support_ic_type == ODM_RTL8703B) ? KFREE_VER_8703B : \ + (dm->support_ic_type == ODM_RTL8710B) ? KFREE_VER_8710B : \ + (dm->support_ic_type == ODM_RTL8723D) ? KFREE_VER_8723D : \ + (dm->support_ic_type == ODM_RTL8822B) ? KFREE_VER_8822B : \ + (dm->support_ic_type == ODM_RTL8822C) ? KFREE_VER_8822C : \ + (dm->support_ic_type == ODM_RTL8821C) ? KFREE_VER_8821C : \ + (dm->support_ic_type == ODM_RTL8814B) ? KFREE_VER_8814B : "unknown" + +#define HALRF_PABIASK_VER \ + (dm->support_ic_type == ODM_RTL8188E) ? PABIASK_VER_8188E : \ + (dm->support_ic_type == ODM_RTL8192E) ? PABIASK_VER_8192E : \ + (dm->support_ic_type == ODM_RTL8192F) ? PABIASK_VER_8192F : \ + (dm->support_ic_type == ODM_RTL8723B) ? PABIASK_VER_8723B : \ + (dm->support_ic_type == ODM_RTL8812) ? PABIASK_VER_8812A : \ + (dm->support_ic_type == ODM_RTL8821) ? PABIASK_VER_8821A : \ + (dm->support_ic_type == ODM_RTL8814A) ? PABIASK_VER_8814A : \ + (dm->support_ic_type == ODM_RTL8188F) ? PABIASK_VER_8188F : \ + (dm->support_ic_type == ODM_RTL8197F) ? PABIASK_VER_8197F : \ + (dm->support_ic_type == ODM_RTL8703B) ? PABIASK_VER_8703B : \ + (dm->support_ic_type == ODM_RTL8710B) ? PABIASK_VER_8710B : \ + (dm->support_ic_type == ODM_RTL8723D) ? PABIASK_VER_8723D : \ + (dm->support_ic_type == ODM_RTL8822B) ? PABIASK_VER_8822B : \ + (dm->support_ic_type == ODM_RTL8822C) ? PABIASK_VER_8822C : \ + (dm->support_ic_type == ODM_RTL8821C) ? PABIASK_VER_8821C : \ + (dm->support_ic_type == ODM_RTL8814B) ? PABIASK_VER_8814B : "unknown" + +#define HALRF_RFK_INIT_VER \ + (dm->support_ic_type == ODM_RTL8822B) ? RFK_INIT_VER_8822B : \ + (dm->support_ic_type == ODM_RTL8822C) ? RFK_INIT_VER_8822C : \ + (dm->support_ic_type == ODM_RTL8198F) ? RFK_INIT_VER_8198F : \ + (dm->support_ic_type == ODM_RTL8814B) ? RFK_INIT_VER_8814B : "unknown" + +#define HALRF_DACK_VER \ + (dm->support_ic_type == ODM_RTL8822C) ? DACK_VER_8822C : "unknown" + +#define IQK_THRESHOLD 8 +#define DPK_THRESHOLD 4 +#define HALRF_ABS(a,b) ((a>b) ? (a-b) : (b-a)) +#define SN 100 + +#define CCK_TSSI_NUM 6 +#define OFDM_2G_TSSI_NUM 5 +#define OFDM_5G_TSSI_NUM 14 -#define HALRF_IQK_VER (dm->support_ic_type == ODM_RTL8188E)? IQK_VERSION_8188E :\ - (dm->support_ic_type == ODM_RTL8192E)? IQK_VERSION_8192E :\ - (dm->support_ic_type == ODM_RTL8723B)? IQK_VERSION_8723B :\ - (dm->support_ic_type == ODM_RTL8812)? IQK_VERSION_8812A :\ - (dm->support_ic_type == ODM_RTL8821)? IQK_VERSION_8821A :\ - (dm->support_ic_type == ODM_RTL8814A)? IQK_VERSION_8814A :\ - (dm->support_ic_type == ODM_RTL8188F)? IQK_VERSION_8188F :\ - (dm->support_ic_type == ODM_RTL8197F)? IQK_VERSION_8197F :\ - (dm->support_ic_type == ODM_RTL8703B)? IQK_VERSION_8703B :\ - (dm->support_ic_type == ODM_RTL8710B)? IQK_VERSION_8710B :\ - (dm->support_ic_type == ODM_RTL8723D)? IQK_VERSION_8723D :\ - (dm->support_ic_type == ODM_RTL8822B)? IQK_VERSION_8822B :\ - (dm->support_ic_type == ODM_RTL8821C)? IQK_VERSION_8821C :"unknown" - - -#define HALRF_LCK_VER (dm->support_ic_type == ODM_RTL8188E)? LCK_VERSION_8188E :\ - (dm->support_ic_type == ODM_RTL8192E)? LCK_VERSION_8192E :\ - (dm->support_ic_type == ODM_RTL8723B)? LCK_VERSION_8723B :\ - (dm->support_ic_type == ODM_RTL8812)? LCK_VERSION_8812A :\ - (dm->support_ic_type == ODM_RTL8821)? LCK_VERSION_8821A :\ - (dm->support_ic_type == ODM_RTL8814A)? LCK_VERSION_8814A :\ - (dm->support_ic_type == ODM_RTL8188F)? LCK_VERSION_8188F :\ - (dm->support_ic_type == ODM_RTL8197F)? LCK_VERSION_8197F :\ - (dm->support_ic_type == ODM_RTL8703B)? LCK_VERSION_8703B :\ - (dm->support_ic_type == ODM_RTL8710B)? LCK_VERSION_8710B :\ - (dm->support_ic_type == ODM_RTL8723D)? LCK_VERSION_8723D :\ - (dm->support_ic_type == ODM_RTL8822B)? LCK_VERSION_8822B :\ - (dm->support_ic_type == ODM_RTL8821C)? LCK_VERSION_8821C :"unknown" - - -#define HALRF_POWRTRACKING_VER (dm->support_ic_type == ODM_RTL8188E)? POWERTRACKING_VERSION_8188E :\ - (dm->support_ic_type == ODM_RTL8192E)? POWERTRACKING_VERSION_8192E :\ - (dm->support_ic_type == ODM_RTL8723B)? POWERTRACKING_VERSION_8723B :\ - (dm->support_ic_type == ODM_RTL8812)? POWERTRACKING_VERSION_8812A :\ - (dm->support_ic_type == ODM_RTL8821)? POWERTRACKING_VERSION_8821A :\ - (dm->support_ic_type == ODM_RTL8814A)? POWERTRACKING_VERSION_8814A :\ - (dm->support_ic_type == ODM_RTL8188F)? POWERTRACKING_VERSION_8188F :\ - (dm->support_ic_type == ODM_RTL8197F)? POWERTRACKING_VERSION_8197F :\ - (dm->support_ic_type == ODM_RTL8703B)? POWERTRACKING_VERSION_8703B :\ - (dm->support_ic_type == ODM_RTL8710B)? POWERTRACKING_VERSION_8710B :\ - (dm->support_ic_type == ODM_RTL8723D)? POWERTRACKING_VERSION_8723D :\ - (dm->support_ic_type == ODM_RTL8822B)? POWERTRACKING_VERSION_8822B :\ - (dm->support_ic_type == ODM_RTL8821C)? POWERTRACKING_VERSION_8821C :"unknown" - -#define HALRF_DPK_VER (dm->support_ic_type == ODM_RTL8188E)? DPK_VERSION_8188E :\ - (dm->support_ic_type == ODM_RTL8192E)? DPK_VERSION_8192E :\ - (dm->support_ic_type == ODM_RTL8723B)? DPK_VERSION_8723B :\ - (dm->support_ic_type == ODM_RTL8812)? DPK_VERSION_8812A :\ - (dm->support_ic_type == ODM_RTL8821)? DPK_VERSION_8821A :\ - (dm->support_ic_type == ODM_RTL8814A)? DPK_VERSION_8814A :\ - (dm->support_ic_type == ODM_RTL8188F)? DPK_VERSION_8188F :\ - (dm->support_ic_type == ODM_RTL8197F)? DPK_VERSION_8197F :\ - (dm->support_ic_type == ODM_RTL8703B)? DPK_VERSION_8703B :\ - (dm->support_ic_type == ODM_RTL8710B)? DPK_VERSION_8710B :\ - (dm->support_ic_type == ODM_RTL8723D)? DPK_VERSION_8723D :\ - (dm->support_ic_type == ODM_RTL8822B)? DPK_VERSION_8822B :\ - (dm->support_ic_type == ODM_RTL8821C)? DPK_VERSION_8821C :"unknown" - -#define HALRF_KFREE_VER (dm->support_ic_type == ODM_RTL8188E)? KFREE_VERSION_8188E :\ - (dm->support_ic_type == ODM_RTL8192E)? KFREE_VERSION_8192E :\ - (dm->support_ic_type == ODM_RTL8723B)? KFREE_VERSION_8723B :\ - (dm->support_ic_type == ODM_RTL8812)? KFREE_VERSION_8812A :\ - (dm->support_ic_type == ODM_RTL8821)? KFREE_VERSION_8821A :\ - (dm->support_ic_type == ODM_RTL8814A)? KFREE_VERSION_8814A :\ - (dm->support_ic_type == ODM_RTL8188F)? KFREE_VERSION_8188F :\ - (dm->support_ic_type == ODM_RTL8197F)? KFREE_VERSION_8197F :\ - (dm->support_ic_type == ODM_RTL8703B)? KFREE_VERSION_8703B :\ - (dm->support_ic_type == ODM_RTL8710B)? KFREE_VERSION_8710B :\ - (dm->support_ic_type == ODM_RTL8723D)? KFREE_VERSION_8723D :\ - (dm->support_ic_type == ODM_RTL8822B)? KFREE_VERSION_8822B :\ - (dm->support_ic_type == ODM_RTL8821C)? KFREE_VERSION_8821C :"unknown" - -#define HALRF_PABIASK_VER (dm->support_ic_type == ODM_RTL8188E)? PABIASK_VERSION_8188E :\ - (dm->support_ic_type == ODM_RTL8192E)? PABIASK_VERSION_8192E :\ - (dm->support_ic_type == ODM_RTL8723B)? PABIASK_VERSION_8723B :\ - (dm->support_ic_type == ODM_RTL8812)? PABIASK_VERSION_8812A :\ - (dm->support_ic_type == ODM_RTL8821)? PABIASK_VERSION_8821A :\ - (dm->support_ic_type == ODM_RTL8814A)? PABIASK_VERSION_8814A :\ - (dm->support_ic_type == ODM_RTL8188F)? PABIASK_VERSION_8188F :\ - (dm->support_ic_type == ODM_RTL8197F)? PABIASK_VERSION_8197F :\ - (dm->support_ic_type == ODM_RTL8703B)? PABIASK_VERSION_8703B :\ - (dm->support_ic_type == ODM_RTL8710B)? PABIASK_VERSION_8710B :\ - (dm->support_ic_type == ODM_RTL8723D)? PABIASK_VERSION_8723D :\ - (dm->support_ic_type == ODM_RTL8822B)? PABIASK_VERSION_8822B :\ - (dm->support_ic_type == ODM_RTL8821C)? PABIASK_VERSION_8821C :"unknown" - - - -#define IQK_THRESHOLD 8 -#define DPK_THRESHOLD 4 - -/*===========================================================*/ +/*@===========================================================*/ /*AGC RX High Power mode*/ -/*===========================================================*/ -#define lna_low_gain_1 0x64 -#define lna_low_gain_2 0x5A -#define lna_low_gain_3 0x58 +/*@===========================================================*/ +#define lna_low_gain_1 0x64 +#define lna_low_gain_2 0x5A +#define lna_low_gain_3 0x58 + +/*@============================================================*/ +/*@ enumeration */ +/*@============================================================*/ + +#define POWER_INDEX_DIFF 4 +#define TSSI_TXAGC_DIFF 2 + +#define TSSI_CODE_NUM 84 + +#define TSSI_SLOPE_2G 8 +#define TSSI_SLOPE_5G 5 + +#define TSSI_EFUSE_NUM 25 +#define TSSI_EFUSE_KFREE_NUM 4 + + +enum halrf_func_idx { /*F_XXX = PHYDM XXX function*/ + RF00_PWR_TRK = 0, /*Pow_trk, TSSI_trk*/ + RF01_IQK = 1, /*LOK, IQK*/ + RF02_LCK = 2, + RF03_DPK = 3, + RF04_TXGAPK = 4, + RF05_DACK = 5, + RF06_DPK_TRK = 6, +}; -/*============================================================*/ -/* enumeration */ -/*============================================================*/ enum halrf_ability { - HAL_RF_TX_PWR_TRACK = BIT(0), - HAL_RF_IQK = BIT(1), - HAL_RF_LCK = BIT(2), - HAL_RF_DPK = BIT(3), - HAL_RF_TXGAPK = BIT(4) + HAL_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK), + HAL_RF_IQK = BIT(RF01_IQK), + HAL_RF_LCK = BIT(RF02_LCK), + HAL_RF_DPK = BIT(RF03_DPK), + HAL_RF_TXGAPK = BIT(RF04_TXGAPK), + HAL_RF_DACK = BIT(RF05_DACK), + HAL_RF_DPK_TRACK = BIT(RF06_DPK_TRK) +}; + +enum halrf_dbg_comp { + DBG_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK), + DBG_RF_IQK = BIT(RF01_IQK), + DBG_RF_LCK = BIT(RF02_LCK), + DBG_RF_DPK = BIT(RF03_DPK), + DBG_RF_TXGAPK = BIT(RF04_TXGAPK), + DBG_RF_DACK = BIT(RF05_DACK), + DBG_RF_MP = BIT(29), + DBG_RF_TMP = BIT(30), + DBG_RF_INIT = BIT(31) }; enum halrf_cmninfo_init { HALRF_CMNINFO_ABILITY = 0, HALRF_CMNINFO_DPK_EN = 1, HALRF_CMNINFO_EEPROM_THERMAL_VALUE, - HALRF_CMNINFO_FW_VER, HALRF_CMNINFO_RFK_FORBIDDEN, HALRF_CMNINFO_IQK_SEGMENT, HALRF_CMNINFO_RATE_INDEX, + HALRF_CMNINFO_PWT_TYPE, HALRF_CMNINFO_MP_PSD_POINT, HALRF_CMNINFO_MP_PSD_START_POINT, HALRF_CMNINFO_MP_PSD_STOP_POINT, - HALRF_CMNINFO_MP_PSD_AVERAGE + HALRF_CMNINFO_MP_PSD_AVERAGE, + HALRF_CMNINFO_IQK_TIMES }; enum halrf_cmninfo_hook { HALRF_CMNINFO_CON_TX, HALRF_CMNINFO_SINGLE_TONE, - HALRF_CMNINFO_CARRIER_SUPPRESSION, - HALRF_CMNINFO_MP_RATE_INDEX + HALRF_CMNINFO_CARRIER_SUPPRESSION, + HALRF_CMNINFO_MP_RATE_INDEX, + HALRF_CMNINFO_MANUAL_RF_SUPPORTABILITY }; -enum phydm_lna_set { - phydm_lna_disable = 0, - phydm_lna_enable = 1, +enum halrf_lna_set { + HALRF_LNA_DISABLE = 0, + HALRF_LNA_ENABLE = 1, +}; + +enum halrf_k_segment_time { + SEGMENT_FREE = 0, + SEGMENT_10MS = 10, /*10ms*/ + SEGMENT_30MS = 30, /*30ms*/ + SEGMENT_50MS = 50, /*50ms*/ }; -/*============================================================*/ -/* structure */ -/*============================================================*/ +#if (RTL8822C_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8814B_SUPPORT) + +#define POWER_INDEX_DIFF 4 +#define TSSI_TXAGC_DIFF 2 + +#define TSSI_CODE_NUM 84 + +#define TSSI_SLOPE_2G 8 +#define TSSI_SLOPE_5G 5 + +#define TSSI_EFUSE_NUM 25 +#define TSSI_EFUSE_KFREE_NUM 4 + +struct _halrf_tssi_data { + s32 cck_offset_patha; + s32 cck_offset_pathb; + s32 power_track_offset[PHYDM_MAX_RF_PATH]; + s16 txagc_codeword[TSSI_CODE_NUM]; + u16 tssi_codeword[TSSI_CODE_NUM]; + s8 tssi_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_NUM]; + s8 tssi_kfree_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_KFREE_NUM]; + u8 thermal[PHYDM_MAX_RF_PATH]; + u32 index[PHYDM_MAX_RF_PATH][14]; + u8 do_tssi; + u8 get_thermal; +}; +#endif + +/*@============================================================*/ +/*@ structure */ +/*@============================================================*/ struct _hal_rf_ { /*hook*/ - u8 *test1; + u8 *test1; /*update*/ - u32 rf_supportability; + u32 rf_supportability; - u8 eeprom_thermal; - u8 dpk_en; /*Enable Function DPK OFF/ON = 0/1*/ - boolean dpk_done; - u32 fw_ver; + u8 eeprom_thermal; + u8 dpk_en; /*Enable Function DPK OFF/ON = 0/1*/ + boolean dpk_done; + u64 dpk_progressing_time; + u64 iqk_progressing_time; + u32 fw_ver; - boolean *is_con_tx; - boolean *is_single_tone; - boolean *is_carrier_suppresion; + boolean *is_con_tx; + boolean *is_single_tone; + boolean *is_carrier_suppresion; + boolean is_dpk_in_progress; + boolean is_tssi_in_progress; + boolean aac_checked; - u8 *mp_rate_index; - u32 p_rate_index; -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - struct _halrf_psd_data halrf_psd_data; + u8 *mp_rate_index; + u32 *manual_rf_supportability; + u32 p_rate_index; + u8 pwt_type; + u32 rf_dbg_comp; + struct _halrf_psd_data halrf_psd_data; +#if (RTL8822C_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8814B_SUPPORT == 1) + struct _halrf_tssi_data halrf_tssi_data; #endif + u8 power_track_type; }; -/*============================================================*/ -/* function prototype */ -/*============================================================*/ +/*@============================================================*/ +/*@ function prototype */ +/*@============================================================*/ -void halrf_basic_profile( - void *dm_void, - u32 *_used, - char *output, - u32 *_out_len -); -#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) -void halrf_iqk_info_dump( - void *dm_void, - u32 *_used, - char *output, - u32 *_out_len -); +#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ + RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ + RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ + RTL8812F_SUPPORT == 1) +void halrf_iqk_info_dump(void *dm_void, u32 *_used, char *output, + u32 *_out_len); -void -halrf_iqk_hwtx_check( - void *dm_void, - boolean is_check -); +void halrf_iqk_hwtx_check(void *dm_void, boolean is_check); #endif -u8 -halrf_match_iqk_version( - void *dm_void -); +u8 halrf_match_iqk_version(void *dm_void); -void -halrf_support_ability_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len -); +void halrf_support_ability_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); -void -halrf_cmn_info_init( - void *dm_void, - enum halrf_cmninfo_init cmn_info, - u32 value -); +void halrf_cmn_info_init(void *dm_void, enum halrf_cmninfo_init cmn_info, + u32 value); -void -halrf_cmn_info_hook( - void *dm_void, - u32 cmn_info, - void *value -); +void halrf_cmn_info_hook(void *dm_void, enum halrf_cmninfo_hook cmn_info, + void *value); -void -halrf_cmn_info_set( - void *dm_void, - u32 cmn_info, - u64 value -); +void halrf_cmn_info_set(void *dm_void, u32 cmn_info, u64 value); -u64 -halrf_cmn_info_get( - void *dm_void, - u32 cmn_info -); +u64 halrf_cmn_info_get(void *dm_void, u32 cmn_info); -void -halrf_watchdog( - void *dm_void -); +void halrf_watchdog(void *dm_void); -void -halrf_supportability_init( - void *dm_void -); +void halrf_supportability_init(void *dm_void); -void -halrf_init( - void *dm_void -); +void halrf_init(void *dm_void); -void -halrf_iqk_trigger( - void *dm_void, - boolean is_recovery -); +void halrf_iqk_trigger(void *dm_void, boolean is_recovery); -void -halrf_segment_iqk_trigger( - void *dm_void, - boolean clear, - boolean segment_iqk -); +void halrf_rf_k_connect_trigger(void *dm_void, boolean is_recovery, + enum halrf_k_segment_time seg_time); -void -halrf_lck_trigger( - void *dm_void -); +void halrf_segment_iqk_trigger(void *dm_void, boolean clear, + boolean segment_iqk); -void -halrf_iqk_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -); +void halrf_lck_trigger(void *dm_void); -void -phydm_get_iqk_cfir( - void *dm_void, - u8 idx, - u8 path, - boolean debug -); +void halrf_iqk_debug(void *dm_void, u32 *const dm_value, u32 *_used, + char *output, u32 *_out_len); -void -halrf_iqk_xym_read( - void *dm_void, - u8 path, - u8 xym_type - ); +void phydm_get_iqk_cfir(void *dm_void, u8 idx, u8 path, boolean debug); -void -halrf_rf_lna_setting( - void *dm_void, - enum phydm_lna_set type -); +void halrf_iqk_xym_read(void *dm_void, u8 path, u8 xym_type); +void halrf_rf_lna_setting(void *dm_void, enum halrf_lna_set type); -void -halrf_do_imr_test( - void *dm_void, - u8 data -); +void halrf_do_imr_test(void *dm_void, u8 data); -u32 -halrf_psd_log2base( - u32 val -); +u32 halrf_psd_log2base(u32 val); +void halrf_dpk_trigger(void *dm_void); -#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) -void halrf_iqk_dbg(void *dm_void); -#endif +u8 halrf_dpk_result_check(void *dm_void); + +void halrf_dpk_sram_read(void *dm_void); + +void halrf_dpk_enable_disable(void *dm_void); + +void halrf_dpk_track(void *dm_void); + +void halrf_dpk_reload(void *dm_void); + +void halrf_dpk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size); + +/*Global function*/ + +void halrf_reload_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num); + +void halrf_reload_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, + u8 ss); + +void halrf_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num); + +void halrf_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, u8 ss); + +void halrf_mode(void *dm_void, u32 *i_value, u32 *q_value); + +boolean halrf_compare(void *dm_void, u32 value); + +u32 halrf_delta(void *dm_void, u32 v1, u32 v2); + +void halrf_minmax_compare(void *dm_void, u32 value, u32 *min, u32 *max); + +void halrf_b_sort(void *dm_void, u32 *iv, u32 *qv); + +void halrf_bubble(void *dm_void, u32 *v1, u32 *v2); + +void halrf_swap(void *dm_void, u32 *v1, u32 *v2); + +enum hal_status +halrf_config_rfk_with_header_file(void *dm_void, u32 config_type); + +#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ + RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ + RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ + RTL8812F_SUPPORT == 1) +void halrf_iqk_dbg(void *dm_void); #endif +void halrf_tssi_get_efuse(void *dm_void); +void halrf_do_tssi(void *dm_void); + +void halrf_do_thermal(void *dm_void); + +u32 halrf_set_tssi_value(void *dm_void, u32 tssi_value); + +void halrf_tssi_set_de_for_tx_verify(void *dm_void, u32 tssi_de, u8 path); + +void halrf_set_tssi_power(void *dm_void, s8 power); + +u32 halrf_query_tssi_value(void *dm_void); + +void halrf_tssi_cck(void *dm_void); + +void halrf_thermal_cck(void *dm_void); + +void halrf_tssi_set_de(void *dm_void); + +void halrf_tssi_dck(void *dm_void, u8 direct_do); + +void halrf_calculate_tssi_codeword(void *dm_void); + +void halrf_set_tssi_codeword(void *dm_void); + +u8 halrf_get_tssi_codeword_for_txindex(void *dm_void); + +u32 halrf_tssi_get_de(void *dm_void, u8 path); + +void halrf_set_dpk_track(void *dm_void, u8 enable); + +void halrf_set_dpkbychannel(void *dm_void, boolean dpk_by_ch); + +void halrf_set_dpkenable(void *dm_void, boolean is_dpk_enable); + +boolean halrf_get_dpkbychannel(void *dm_void); + +boolean halrf_get_dpkenable(void *dm_void); + +void _iqk_check_if_reload(void *dm_void); + + +#endif /*__HALRF_H__*/ diff --git a/hal/phydm/halrf/halrf_debug.c b/hal/phydm/halrf/halrf_debug.c new file mode 100644 index 0000000..882cf07 --- /dev/null +++ b/hal/phydm/halrf/halrf_debug.c @@ -0,0 +1,271 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +/*@************************************************************ + * include files + * ************************************************************ + */ + +#include "mp_precomp.h" +#include "phydm_precomp.h" + +void halrf_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len) +{ +#ifdef CONFIG_PHYDM_DEBUG_FUNCTION + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + u32 rf_release_ver = 0; + +#if (RTL8822C_SUPPORT) + if (dm->support_ic_type == ODM_RTL8822C) { + rf_release_ver = RF_RELEASE_VERSION_8822C; + } +#endif + + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n", + "RF Para Release Ver", rf_release_ver); + + /* HAL RF version List */ + PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n", + "% HAL RF version %"); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "Power Tracking", HALRF_POWRTRACKING_VER); + PDM_SNPF(out_len, used, output + used, out_len - used, + " %-35s: %s %s\n", "IQK", + (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW" : + HALRF_IQK_VER, + (halrf_match_iqk_version(dm_void)) ? "(match)" : "(mismatch)"); + + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "LCK", HALRF_LCK_VER); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "DPK", HALRF_DPK_VER); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "KFREE", HALRF_KFREE_VER); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "TX 2G Current Calibration", HALRF_PABIASK_VER); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "RFK Init. Parameter", HALRF_RFK_INIT_VER); + + *_used = used; + *_out_len = out_len; +#endif +} + +void halrf_debug_trace(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + u32 one = 1; + u32 used = *_used; + u32 out_len = *_out_len; + u32 rf_var[10] = {0}; + u8 i; + + for (i = 0; i < 5; i++) + if (input[i + 1]) + PHYDM_SSCANF(input[i + 2], DCMD_DECIMAL, &rf_var[i]); + + if (rf_var[0] == 100) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "\n[DBG MSG] RF Selection\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "00. (( %s ))TX_PWR_TRACK\n", + ((rf->rf_dbg_comp & DBG_RF_TX_PWR_TRACK) ? ("V") : + ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "01. (( %s ))IQK\n", + ((rf->rf_dbg_comp & DBG_RF_IQK) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "02. (( %s ))LCK\n", + ((rf->rf_dbg_comp & DBG_RF_LCK) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "03. (( %s ))DPK\n", + ((rf->rf_dbg_comp & DBG_RF_DPK) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "04. (( %s ))TXGAPK\n", + ((rf->rf_dbg_comp & DBG_RF_TXGAPK) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "29. (( %s ))MP\n", + ((rf->rf_dbg_comp & DBG_RF_MP) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "30. (( %s ))TMP\n", + ((rf->rf_dbg_comp & DBG_RF_TMP) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "31. (( %s ))INIT\n", + ((rf->rf_dbg_comp & DBG_RF_INIT) ? ("V") : ("."))); + + } else if (rf_var[0] == 101) { + rf->rf_dbg_comp = 0; + PDM_SNPF(out_len, used, output + used, out_len - used, + "Disable all DBG COMP\n"); + } else { + if (rf_var[1] == 1) /*enable*/ + rf->rf_dbg_comp |= (one << rf_var[0]); + else if (rf_var[1] == 2) /*disable*/ + rf->rf_dbg_comp &= ~(one << rf_var[0]); + } + PDM_SNPF(out_len, used, output + used, out_len - used, + "\nCurr-RF_Dbg_Comp = 0x%x\n", rf->rf_dbg_comp); + + *_used = used; + *_out_len = out_len; +} + +struct halrf_command { + char name[16]; + u8 id; +}; + +enum halrf_CMD_ID { + HALRF_HELP, + HALRF_SUPPORTABILITY, + HALRF_DBG_COMP, + HALRF_PROFILE, + HALRF_IQK_INFO, + HALRF_IQK, + HALRF_IQK_DEBUG, +}; + +struct halrf_command halrf_cmd_ary[] = { + {"-h", HALRF_HELP}, + {"ability", HALRF_SUPPORTABILITY}, + {"dbg", HALRF_DBG_COMP}, + {"profile", HALRF_PROFILE}, + {"iqk_info", HALRF_IQK_INFO}, + {"iqk", HALRF_IQK}, + {"iqk_dbg", HALRF_IQK_DEBUG}, +}; + +void halrf_cmd_parser(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len, u32 input_num) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; +#ifdef CONFIG_PHYDM_DEBUG_FUNCTION + u8 id = 0; + u32 rf_var[10] = {0}; + u32 i, input_idx = 0; + u32 halrf_ary_size = + sizeof(halrf_cmd_ary) / sizeof(struct halrf_command); + u32 used = *_used; + u32 out_len = *_out_len; + + /* Parsing Cmd ID */ + for (i = 0; i < halrf_ary_size; i++) { + if (strcmp(halrf_cmd_ary[i].name, input[1]) == 0) { + id = halrf_cmd_ary[i].id; + break; + } + } + + if (i == halrf_ary_size) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "RF Cmd not found\n"); + return; + } + + switch (id) { + case HALRF_HELP: + PDM_SNPF(out_len, used, output + used, out_len - used, + "RF cmd ==>\n"); + + for (i = 0; i < halrf_ary_size - 1; i++) { + PDM_SNPF(out_len, used, output + used, out_len - used, + " %-5d: %s\n", i, halrf_cmd_ary[i + 1].name); + } + break; + case HALRF_SUPPORTABILITY: + halrf_support_ability_debug(dm, &input[0], &used, output, + &out_len); + break; + case HALRF_DBG_COMP: + halrf_debug_trace(dm, &input[0], &used, output, &out_len); + break; + case HALRF_PROFILE: + halrf_basic_profile(dm, &used, output, &out_len); + break; + case HALRF_IQK_INFO: +#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) + halrf_iqk_info_dump(dm, &used, output, &out_len); +#endif + break; + case HALRF_IQK: + PDM_SNPF(out_len, used, output + used, out_len - used, + "TRX IQK Trigger\n"); + halrf_iqk_trigger(dm, false); +#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) + halrf_iqk_info_dump(dm, &used, output, &out_len); +#endif + break; + case HALRF_IQK_DEBUG: + + for (i = 0; i < 5; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 2], DCMD_HEX, + &rf_var[i]); + input_idx++; + } + } + + if (input_idx >= 1) { +#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) + if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) + halrf_iqk_debug(dm, (u32 *)rf_var, &used, + output, &out_len); +#endif + } + break; + default: + break; + } + + *_used = used; + *_out_len = out_len; +#endif +} + +void halrf_init_debug_setting(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + + rf->rf_dbg_comp = +#if DBG +#if 0 + /*DBG_RF_TX_PWR_TRACK |*/ + /*DBG_RF_IQK | */ + /*DBG_RF_LCK | */ + /*DBG_RF_DPK | */ + /*DBG_RF_DACK | */ + /*DBG_RF_TXGAPK | */ + /*DBG_RF_MP | */ + /*DBG_RF_TMP | */ + /*DBG_RF_INIT | */ +#endif +#endif + 0; +} diff --git a/hal/phydm/halrf/halrf_debug.h b/hal/phydm/halrf/halrf_debug.h new file mode 100644 index 0000000..ff1ff96 --- /dev/null +++ b/hal/phydm/halrf/halrf_debug.h @@ -0,0 +1,123 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +#ifndef __HALRF_DEBUG_H__ +#define __HALRF_DEBUG_H__ + +/*@============================================================*/ +/*@include files*/ +/*@============================================================*/ + +/*@============================================================*/ +/*@Definition */ +/*@============================================================*/ + +#if DBG + +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) +#define RF_DBG(dm, comp, fmt, args...) \ + do { \ + if ((comp) & dm->rf_table.rf_dbg_comp) { \ + pr_debug("[RF] "); \ + RT_PRINTK(fmt, ##args); \ + } \ + } while (0) + +#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) + +static __inline void RF_DBG(PDM_ODM_T dm, int comp, char *fmt, ...) +{ + RT_STATUS rt_status; + va_list args; + char buf[PRINT_MAX_SIZE] = {0}; + + if ((comp & dm->rf_table.rf_dbg_comp) == 0) + return; + + if (fmt == NULL) + return; + + va_start(args, fmt); + rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args); + va_end(args); + + if (rt_status != RT_STATUS_SUCCESS) { + DbgPrint("Failed (%d) to print message to buffer\n", rt_status); + return; + } + + DbgPrint("[RF] %s", buf); +} + +#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) + +#define RF_DBG(dm, comp, fmt, args...) \ + do { \ + if ((comp) & dm->rf_table.rf_dbg_comp) { \ + RT_DEBUG(COMP_PHYDM, DBG_DMESG, "[RF] " fmt, ##args); \ + } \ + } while (0) + +#else +#define RF_DBG(dm, comp, fmt, args...) \ + do { \ + struct dm_struct *__dm = dm; \ + if ((comp) & __dm->rf_table.rf_dbg_comp) { \ + RT_TRACE(((struct rtl_priv *)__dm->adapter), \ + COMP_PHYDM, DBG_DMESG, "[RF] " fmt, ##args); \ + } \ + } while (0) +#endif + +#else /*#if DBG*/ + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +static __inline void RF_DBG(struct dm_struct *dm, int comp, char *fmt, ...) +{ +} +#else +#define RF_DBG(dm, comp, fmt, args...) +#endif + +#endif /*#if DBG*/ + +/*@============================================================*/ +/*@ enumeration */ +/*@============================================================*/ + +/*@============================================================*/ +/*@ structure */ +/*@============================================================*/ + +/*@============================================================*/ +/*@ function prototype */ +/*@============================================================*/ + +void halrf_cmd_parser(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len, u32 input_num); + +void halrf_init_debug_setting(void *dm_void); + +#endif /*__HALRF_H__*/ diff --git a/hal/phydm/halrf/halrf_dpk.h b/hal/phydm/halrf/halrf_dpk.h new file mode 100644 index 0000000..5eed8cc --- /dev/null +++ b/hal/phydm/halrf/halrf_dpk.h @@ -0,0 +1,106 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +#ifndef __HALRF_DPK_H__ +#define __HALRF_DPK_H__ + +/*@--------------------------Define Parameters-------------------------------*/ +#define GAIN_LOSS 1 +#define DO_DPK 2 +#define DPK_ON 3 +#define DPK_LOK 4 +#define DPK_TXK 5 + +#define DAGC 4 +#define LOSS_CHK 0 +#define GAIN_CHK 1 +#define PAS_READ 2 +#define AVG_THERMAL_NUM 8 +#define AVG_THERMAL_NUM_DPK 8 +#define THERMAL_DPK_AVG_NUM 4 + +/*@---------------------------End Define Parameters---------------------------*/ + +struct dm_dpk_info { + + boolean is_dpk_enable; + boolean is_dpk_pwr_on; + boolean is_dpk_by_channel; + boolean is_tssi_mode; + boolean is_reload; + u16 dpk_path_ok; + /*@BIT(15)~BIT(12) : 5G reserved, BIT(11)~BIT(8) 5G_S3~5G_S0*/ + /*@BIT(7)~BIT(4) : 2G reserved, BIT(3)~BIT(0) 2G_S3~2G_S0*/ + u8 thermal_dpk[4]; /*path*/ + u8 thermal_dpk_avg[4][AVG_THERMAL_NUM_DPK]; /*path*/ + u8 thermal_dpk_avg_index; + u8 pre_pwsf[4]; + u32 gnt_control; + u32 gnt_value; + u8 dpk_ch; + u8 dpk_band; + u8 dpk_bw; + +#if (RTL8822C_SUPPORT == 1 || RTL8812F_SUPPORT == 1) + u8 result[2]; /*path*/ + u8 dpk_txagc[2]; /*path*/ + u32 coef[2][20]; /*path/MDPD coefficient*/ + u16 dpk_gs[2]; /*MDPD coef gs*/ + u8 thermal_dpk_delta[2]; /*path*/ +#endif + +#if (RTL8198F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8197F_SUPPORT == 1 || RTL8814B_SUPPORT) + /*2G DPK data*/ + u8 dpk_result[4][3]; /*path/group*/ + u8 pwsf_2g[4][3]; /*path/group*/ + u32 lut_2g_even[4][3][64]; /*path/group/LUT data*/ + u32 lut_2g_odd[4][3][64]; /*path/group/LUT data*/ + /*5G DPK data*/ + u8 dpk_5g_result[4][6]; /*path/group*/ + u8 pwsf_5g[4][6]; /*path/group*/ + u32 lut_5g[4][6][64]; /*path/group/LUT data*/ + u32 lut_2g[4][3][64]; /*path/group/LUT data*/ + /*8814B*/ + u8 rxbb[4]; /*path/group*/ + u8 txbb[4]; /*path/group*/ + u8 tx_gain; +#endif + +#if (RTL8195B_SUPPORT == 1) + /*2G DPK data*/ + u8 dpk_2g_result[1][3]; /*path/group*/ + u8 pwsf_2g[1][3]; /*path/group*/ + u32 lut_2g_even[1][3][16]; /*path/group/LUT data*/ + u32 lut_2g_odd[1][3][16]; /*path/group/LUT data*/ + /*5G DPK data*/ + u8 dpk_5g_result[1][13]; /*path/group*/ + u8 pwsf_5g[1][13]; /*path/group*/ + u32 lut_5g_even[1][13][16]; /*path/group/LUT data*/ + u32 lut_5g_odd[1][13][16]; /*path/group/LUT data*/ +#endif + +}; + +#endif /*__HALRF_DPK_H__*/ diff --git a/hal/phydm/halrf/halrf_features.h b/hal/phydm/halrf/halrf_features.h index c6ef3e6..da97614 100644 --- a/hal/phydm/halrf/halrf_features.h +++ b/hal/phydm/halrf/halrf_features.h @@ -23,21 +23,21 @@ * *****************************************************************************/ -#ifndef __HALRF_FEATURES_H__ -#define __HALRF_FEATURES +#ifndef __HALRF_FEATURES_H__ +#define __HALRF_FEATURES_H__ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - #define CONFIG_HALRF_POWERTRACKING 1 +#define CONFIG_HALRF_POWERTRACKING 1 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) - #define CONFIG_HALRF_POWERTRACKING 1 +#define CONFIG_HALRF_POWERTRACKING 1 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - #define CONFIG_HALRF_POWERTRACKING 1 +#define CONFIG_HALRF_POWERTRACKING 1 #endif -#endif +#endif /*#ifndef __HALRF_FEATURES_H__*/ diff --git a/hal/phydm/halrf/halrf_iqk.h b/hal/phydm/halrf/halrf_iqk.h index 846feb1..0e42e44 100644 --- a/hal/phydm/halrf/halrf_iqk.h +++ b/hal/phydm/halrf/halrf_iqk.h @@ -23,63 +23,97 @@ * *****************************************************************************/ -#ifndef __PHYDMIQK_H__ -#define __PHYDMIQK_H__ +#ifndef __HALRF_IQK_H__ +#define __HALRF_IQK_H__ -/*--------------------------Define Parameters-------------------------------*/ -#define LOK_delay 1 -#define WBIQK_delay 10 -#define TX_IQK 0 -#define RX_IQK 1 -#define TXIQK 0 -#define RXIQK1 1 -#define RXIQK2 2 +/*@--------------------------Define Parameters-------------------------------*/ +#define LOK_delay 1 +#define WBIQK_delay 10 +#define TX_IQK 0 +#define RX_IQK 1 +#define TXIQK 0 +#define RXIQK1 1 +#define RXIQK2 2 #define kcount_limit_80m 2 #define kcount_limit_others 4 -#define rxiqk_gs_limit 10 +#define rxiqk_gs_limit 6 +#define TXWBIQK_EN 1 +#define RXWBIQK_EN 1 +#define NUM 4 +/*@-----------------------End Define Parameters-----------------------*/ -#define NUM 4 -/*---------------------------End Define Parameters-------------------------------*/ +struct dm_dack_info { + u32 ic_a; + u32 qc_a; + u32 ic_b; + u32 qc_b; +}; struct dm_iqk_info { - boolean lok_fail[NUM]; - boolean iqk_fail[2][NUM]; - u32 iqc_matrix[2][NUM]; - u8 iqk_times; - u32 rf_reg18; - u32 lna_idx; - u8 rxiqk_step; - u8 tmp1bcc; - u8 kcount; - u8 rfk_ing; /*bit0:IQKing, bit1:LCKing, bit2:DPKing*/ - boolean rfk_forbidden; -#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) - u32 iqk_channel[2]; - boolean iqk_fail_report[2][4][2]; /*channel/path/TRX(TX:0, RX:1) */ - u32 iqk_cfir_real[3][4][2][8]; /*channel / path / TRX(TX:0, RX:1) / CFIR_real*/ /*channel index = 2 is just for debug*/ - u32 iqk_cfir_imag[3][4][2][8]; /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/ /*channel index = 2 is just for debug*/ - u8 retry_count[2][4][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */ - u8 gs_retry_count[2][4][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */ - u8 rxiqk_fail_code[2][4]; /* channel / path 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail */ - u32 lok_idac[2][4]; /*channel / path*/ - u16 rxiqk_agc[2][4]; /*channel / path*/ - u32 bypass_iqk[2][4]; /*channel / 0xc94/0xe94*/ - u32 txgap_result[8]; /*txagpK result */ - u32 tmp_gntwl; - boolean is_btg; - boolean isbnd; - boolean is_reload; + boolean lok_fail[NUM]; + boolean iqk_fail[2][NUM]; + u32 iqc_matrix[2][NUM]; + u8 iqk_times; + u32 rf_reg18; + u32 rf_reg08; + u32 lna_idx; + u8 iqk_step; + u8 rxiqk_step; + u8 tmp1bcc; + u8 txgain; + u32 txgain56; + u8 kcount; + u8 rfk_ing; /*bit0:IQKing, bit1:LCKing, bit2:DPKing*/ + boolean rfk_forbidden; + u8 rxbb; + u32 rf_reg58; boolean segment_iqk; +#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ + RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ + RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ + RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1 ) + u32 iqk_channel[2]; + boolean iqk_fail_report[2][4][2]; /*channel/path/TRX(TX:0, RX:1) */ + /*channel / path / TRX(TX:0, RX:1) / CFIR_real*/ + /*channel index = 2 is just for debug*/ +#if (RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ) + u16 iqk_cfir_real[3][2][2][17]; + /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/ + /*channel index = 2 is just for debug*/ + u16 iqk_cfir_imag[3][2][2][17]; + u32 rx_cfir_real[2][2][17]; + u32 rx_cfir_imag[2][2][17]; + u32 rx_cfir[2][2]; + /*times/path*/ +#else + u32 iqk_cfir_real[3][4][2][8]; + /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/ + /*channel index = 2 is just for debug*/ + u32 iqk_cfir_imag[3][4][2][8]; +#endif + u8 retry_count[2][4][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */ + u8 gs_retry_count[2][4][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */ + /* channel / path 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail */ + u8 rxiqk_fail_code[2][4]; + u32 lok_idac[2][4]; /*channel / path*/ + u16 rxiqk_agc[2][4]; /*channel / path*/ + u32 bypass_iqk[2][4]; /*channel / 0xc94/0xe94*/ + u32 txgap_result[8]; /*txagpK result */ + u32 tmp_gntwl; + boolean is_btg; + boolean isbnd; + boolean is_reload; boolean is_hwtx; - - boolean xym_read; + boolean xym_read; boolean trximr_enable; - u32 rx_xym[2][10]; - u32 tx_xym[2][10]; - u32 gs1_xym[2][6]; - u32 gs2_xym[2][6]; - u32 rxk1_xym[2][6]; + u32 rx_xym[2][10]; + u32 tx_xym[2][10]; + u32 gs1_xym[2][6]; + u32 gs2_xym[2][6]; + u32 rxk1_xym[2][6]; + u32 txxy[2][2]; + u32 rxxy[2][2]; #endif }; -#endif +#endif /*__HALRF_IQK_H__*/ diff --git a/hal/phydm/halrf/halrf_kfree.c b/hal/phydm/halrf/halrf_kfree.c index acc705f..f1502b8 100644 --- a/hal/phydm/halrf/halrf_kfree.c +++ b/hal/phydm/halrf/halrf_kfree.c @@ -23,90 +23,86 @@ * *****************************************************************************/ -/*============================================================*/ -/*include files*/ -/*============================================================*/ +/*@============================================================*/ +/*@include files*/ +/*@============================================================*/ #include "mp_precomp.h" #include "phydm_precomp.h" +/*@ Add for KFree Feature Requested by RF David.*/ +/*@This is a phydm API*/ -/* Add for KFree Feature Requested by RF David.*/ -/*This is a phydm API*/ - -void -phydm_set_kfree_to_rf_8814a( - void *dm_void, - u8 e_rf_path, - u8 data -) +void phydm_set_kfree_to_rf_8814a(void *dm_void, u8 e_rf_path, u8 data) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; boolean is_odd; + u32 tx_gain_bitmask = (BIT(17) | BIT(16) | BIT(15)); - if ((data % 2) != 0) { /*odd->positive*/ + if ((data % 2) != 0) { /*odd->positive*/ data = data - 1; - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(19), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), 1); is_odd = true; - } else { /*even->negative*/ - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(19), 0); + } else { /*even->negative*/ + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), 0); is_odd = false; } - PHYDM_DBG(dm, ODM_COMP_MP, "phy_ConfigKFree8814A(): RF_0x55[19]= %d\n", is_odd); + RF_DBG(dm, DBG_RF_MP, "phy_ConfigKFree8814A(): RF_0x55[19]= %d\n", + is_odd); switch (data) { case 0: - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0); - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 0); cali_info->kfree_offset[e_rf_path] = 0; break; case 2: - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1); - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 0); cali_info->kfree_offset[e_rf_path] = 0; break; case 4: - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0); - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 1); cali_info->kfree_offset[e_rf_path] = 1; break; case 6: - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1); - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 1); cali_info->kfree_offset[e_rf_path] = 1; break; case 8: - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0); - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 2); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 2); cali_info->kfree_offset[e_rf_path] = 2; break; case 10: - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1); - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 2); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 2); cali_info->kfree_offset[e_rf_path] = 2; break; case 12: - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0); - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 3); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 3); cali_info->kfree_offset[e_rf_path] = 3; break; case 14: - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1); - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 3); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 3); cali_info->kfree_offset[e_rf_path] = 3; break; case 16: - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0); - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 4); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 4); cali_info->kfree_offset[e_rf_path] = 4; break; case 18: - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1); - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 4); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 4); cali_info->kfree_offset[e_rf_path] = 4; break; case 20: - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0); - odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 5); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 5); cali_info->kfree_offset[e_rf_path] = 5; break; @@ -114,31 +110,28 @@ phydm_set_kfree_to_rf_8814a( break; } - if (is_odd == false) { + if (!is_odd) { /*that means Kfree offset is negative, we need to record it.*/ - cali_info->kfree_offset[e_rf_path] = (-1) * cali_info->kfree_offset[e_rf_path]; - PHYDM_DBG(dm, ODM_COMP_MP, "phy_ConfigKFree8814A(): kfree_offset = %d\n", cali_info->kfree_offset[e_rf_path]); - } else - PHYDM_DBG(dm, ODM_COMP_MP, "phy_ConfigKFree8814A(): kfree_offset = %d\n", cali_info->kfree_offset[e_rf_path]); - + cali_info->kfree_offset[e_rf_path] = + (-1) * cali_info->kfree_offset[e_rf_path]; + RF_DBG(dm, DBG_RF_MP, + "phy_ConfigKFree8814A(): kfree_offset = %d\n", + cali_info->kfree_offset[e_rf_path]); + } else { + RF_DBG(dm, DBG_RF_MP, + "phy_ConfigKFree8814A(): kfree_offset = %d\n", + cali_info->kfree_offset[e_rf_path]); + } } - - -// -// -// -void -phydm_get_thermal_trim_offset_8821c( - void *dm_void -) +void phydm_get_thermal_trim_offset_8821c(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; u8 pg_therm = 0xff; - odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_8821C, &pg_therm, false); + odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_21C, &pg_therm, false); if (pg_therm != 0xff) { pg_therm = pg_therm & 0x1f; @@ -150,293 +143,237 @@ phydm_get_thermal_trim_offset_8821c( power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; } - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8821c thermal trim flag:0x%02x\n", power_trim_info->flag); + RF_DBG(dm, DBG_RF_MP, "[kfree] 8821c thermal trim flag:0x%02x\n", + power_trim_info->flag); if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8821c thermal:%d\n", power_trim_info->thermal); + RF_DBG(dm, DBG_RF_MP, "[kfree] 8821c thermal:%d\n", + power_trim_info->thermal); } - - -void -phydm_get_power_trim_offset_8821c( - void *dm_void -) +void phydm_get_power_trim_offset_8821c(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; u8 pg_power = 0xff, i; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_2G_TXAB_OFFSET_8821C, &pg_power, false); + odm_efuse_one_byte_read(dm, PPG_2G_TXAB_21C, &pg_power, false); if (pg_power != 0xff) { power_trim_info->bb_gain[0][0] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL1_TXA_OFFSET_8821C, &pg_power, false); + odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_21C, &pg_power, false); power_trim_info->bb_gain[1][0] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL2_TXA_OFFSET_8821C, &pg_power, false); + odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_21C, &pg_power, false); power_trim_info->bb_gain[2][0] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GM1_TXA_OFFSET_8821C, &pg_power, false); + odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_21C, &pg_power, false); power_trim_info->bb_gain[3][0] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GM2_TXA_OFFSET_8821C, &pg_power, false); + odm_efuse_one_byte_read(dm, PPG_5GM2_TXA_21C, &pg_power, false); power_trim_info->bb_gain[4][0] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GH1_TXA_OFFSET_8821C, &pg_power, false); + odm_efuse_one_byte_read(dm, PPG_5GH1_TXA_21C, &pg_power, false); power_trim_info->bb_gain[5][0] = pg_power; - power_trim_info->flag = power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_2G | KFREE_FLAG_ON_5G; + power_trim_info->flag = + power_trim_info->flag | KFREE_FLAG_ON | + KFREE_FLAG_ON_2G | KFREE_FLAG_ON_5G; } - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8821c power trim flag:0x%02x\n", power_trim_info->flag); + RF_DBG(dm, DBG_RF_MP, "[kfree] 8821c power trim flag:0x%02x\n", + power_trim_info->flag); if (power_trim_info->flag & KFREE_FLAG_ON) { for (i = 0; i < KFREE_BAND_NUM; i++) - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8821c power_trim_data->bb_gain[%d][0]=0x%X\n", i, power_trim_info->bb_gain[i][0]); + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8821c pwr_trim->bb_gain[%d][0]=0x%X\n", + i, power_trim_info->bb_gain[i][0]); } } - - -void -phydm_set_kfree_to_rf_8821c( - void *dm_void, - u8 e_rf_path, - boolean wlg_btg, - u8 data -) +void phydm_set_kfree_to_rf_8821c(void *dm_void, u8 e_rf_path, boolean wlg_btg, + u8 data) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; - u8 wlg, btg; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 wlg, btg; + u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)); + u32 s_gain_bmask = (BIT(19) | BIT(18) | BIT(17) | + BIT(16) | BIT(15) | BIT(14)); - odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(0), 1); - odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(5), 1); - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(6), 1); - odm_set_rf_reg(dm, e_rf_path, 0x65, BIT(6), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(5), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(6), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(6), 1); - if (wlg_btg == true) { + if (wlg_btg) { wlg = data & 0xf; btg = (data & 0xf0) >> 4; - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (wlg & BIT(0))); - odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (wlg >> 1)); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (wlg & BIT(0))); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, (wlg >> 1)); - odm_set_rf_reg(dm, e_rf_path, 0x65, BIT(19), (btg & BIT(0))); - odm_set_rf_reg(dm, e_rf_path, 0x65, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (btg >> 1)); + odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(19), (btg & BIT(0))); + odm_set_rf_reg(dm, e_rf_path, RF_0x65, gain_bmask, (btg >> 1)); } else { - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (data & BIT(0))); - odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1)); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), data & BIT(0)); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, + ((data & 0x1f) >> 1)); } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[kfree] 8821c 0x55[19:14]=0x%X 0x65[19:14]=0x%X\n", - odm_get_rf_reg(dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))), - odm_get_rf_reg(dm, e_rf_path, 0x65, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))) - ); + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8821c 0x55[19:14]=0x%X 0x65[19:14]=0x%X\n", + odm_get_rf_reg(dm, e_rf_path, RF_0x55, s_gain_bmask), + odm_get_rf_reg(dm, e_rf_path, RF_0x65, s_gain_bmask)); } - - -void -phydm_clear_kfree_to_rf_8821c( - void *dm_void, - u8 e_rf_path, - u8 data -) +void phydm_clear_kfree_to_rf_8821c(void *dm_void, u8 e_rf_path, u8 data) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)); + u32 s_gain_bmask = (BIT(19) | BIT(18) | BIT(17) | + BIT(16) | BIT(15) | BIT(14)); - odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(0), 1); - odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(5), 1); - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(6), 1); - odm_set_rf_reg(dm, e_rf_path, 0x65, BIT(6), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(5), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(6), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(6), 1); - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (data & BIT(0))); - odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (data >> 1)); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0))); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, (data >> 1)); - odm_set_rf_reg(dm, e_rf_path, 0x65, BIT(19), (data & BIT(0))); - odm_set_rf_reg(dm, e_rf_path, 0x65, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (data >> 1)); + odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(19), (data & BIT(0))); + odm_set_rf_reg(dm, e_rf_path, RF_0x65, gain_bmask, (data >> 1)); - odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(0), 0); - odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(5), 0); - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(6), 0); - odm_set_rf_reg(dm, e_rf_path, 0x65, BIT(6), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(5), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(6), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(6), 0); - - PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[kfree] 8821c 0x55[19:14]=0x%X 0x65[19:14]=0x%X\n", - odm_get_rf_reg(dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))), - odm_get_rf_reg(dm, e_rf_path, 0x65, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))) - ); + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8821c 0x55[19:14]=0x%X 0x65[19:14]=0x%X\n", + odm_get_rf_reg(dm, e_rf_path, RF_0x55, s_gain_bmask), + odm_get_rf_reg(dm, e_rf_path, RF_0x65, s_gain_bmask)); } - - -void -phydm_get_thermal_trim_offset_8822b( - void *dm_void -) +void phydm_get_thermal_trim_offset_8822b(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; u8 pg_therm = 0xff; -#if 0 - u32 thermal_trim_enable = 0xff; + odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_22B, &pg_therm, false); - odm_efuse_logical_map_read(dm, 1, 0xc8, &thermal_trim_enable); + if (pg_therm != 0xff) { + pg_therm = pg_therm & 0x1f; + if ((pg_therm & BIT(0)) == 0) + power_trim_info->thermal = (-1 * (pg_therm >> 1)); + else + power_trim_info->thermal = (pg_therm >> 1); - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b 0xc8:0x%2x\n", thermal_trim_enable); + power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; + } - thermal_trim_enable = (thermal_trim_enable & BIT(5)) >> 5; - - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b thermal trim Enable:%d\n", thermal_trim_enable); - - if ((cali_info->reg_rf_kfree_enable == 0 && thermal_trim_enable == 1) || - cali_info->reg_rf_kfree_enable == 1) { -#endif - - odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET, &pg_therm, false); - - if (pg_therm != 0xff) { - pg_therm = pg_therm & 0x1f; - if ((pg_therm & BIT(0)) == 0) - power_trim_info->thermal = (-1 * (pg_therm >> 1)); - else - power_trim_info->thermal = (pg_therm >> 1); - - power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; - } - - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b thermal trim flag:0x%02x\n", power_trim_info->flag); - - if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b thermal:%d\n", power_trim_info->thermal); -#if 0 - } else - return; -#endif + RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b thermal trim flag:0x%02x\n", + power_trim_info->flag); + if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) + RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b thermal:%d\n", + power_trim_info->thermal); } - - -void -phydm_get_power_trim_offset_8822b( - void *dm_void -) +void phydm_get_power_trim_offset_8822b(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; - struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; u8 pg_power = 0xff, i, j; -#if 0 - u32 power_trim_enable = 0xff; + odm_efuse_one_byte_read(dm, PPG_2G_TXAB_22B, &pg_power, false); - odm_efuse_logical_map_read(dm, 1, 0xc8, &power_trim_enable); + if (pg_power != 0xff) { + /*Path A*/ + odm_efuse_one_byte_read(dm, PPG_2G_TXAB_22B, &pg_power, false); + power_trim_info->bb_gain[0][0] = (pg_power & 0xf); - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b 0xc8:0x%2x\n", power_trim_enable); + /*Path B*/ + odm_efuse_one_byte_read(dm, PPG_2G_TXAB_22B, &pg_power, false); + power_trim_info->bb_gain[0][1] = ((pg_power & 0xf0) >> 4); - power_trim_enable = (power_trim_enable & BIT(4)) >> 4; + power_trim_info->flag |= KFREE_FLAG_ON_2G; + power_trim_info->flag |= KFREE_FLAG_ON; + } - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b power trim Enable:%d\n", power_trim_enable); + odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_22B, &pg_power, false); - if ((cali_info->reg_rf_kfree_enable == 0 && power_trim_enable == 1) || - cali_info->reg_rf_kfree_enable == 1) { -#endif + if (pg_power != 0xff) { + /*Path A*/ + odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_22B, &pg_power, false); + power_trim_info->bb_gain[1][0] = pg_power; + odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_22B, &pg_power, false); + power_trim_info->bb_gain[2][0] = pg_power; + odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_22B, &pg_power, false); + power_trim_info->bb_gain[3][0] = pg_power; + odm_efuse_one_byte_read(dm, PPG_5GM2_TXA_22B, &pg_power, false); + power_trim_info->bb_gain[4][0] = pg_power; + odm_efuse_one_byte_read(dm, PPG_5GH1_TXA_22B, &pg_power, false); + power_trim_info->bb_gain[5][0] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_2G_TXAB_OFFSET, &pg_power, false); + /*Path B*/ + odm_efuse_one_byte_read(dm, PPG_5GL1_TXB_22B, &pg_power, false); + power_trim_info->bb_gain[1][1] = pg_power; + odm_efuse_one_byte_read(dm, PPG_5GL2_TXB_22B, &pg_power, false); + power_trim_info->bb_gain[2][1] = pg_power; + odm_efuse_one_byte_read(dm, PPG_5GM1_TXB_22B, &pg_power, false); + power_trim_info->bb_gain[3][1] = pg_power; + odm_efuse_one_byte_read(dm, PPG_5GM2_TXB_22B, &pg_power, false); + power_trim_info->bb_gain[4][1] = pg_power; + odm_efuse_one_byte_read(dm, PPG_5GH1_TXB_22B, &pg_power, false); + power_trim_info->bb_gain[5][1] = pg_power; - if (pg_power != 0xff) { - /*Path A*/ - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_2G_TXAB_OFFSET, &pg_power, false); - power_trim_info->bb_gain[0][0] = (pg_power & 0xf); + power_trim_info->flag |= KFREE_FLAG_ON_5G; + power_trim_info->flag |= KFREE_FLAG_ON; + } - /*Path B*/ - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_2G_TXAB_OFFSET, &pg_power, false); - power_trim_info->bb_gain[0][1] = ((pg_power & 0xf0) >> 4); + RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b power trim flag:0x%02x\n", + power_trim_info->flag); - power_trim_info->flag |= KFREE_FLAG_ON_2G; - power_trim_info->flag |= KFREE_FLAG_ON; - } - - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL1_TXA_OFFSET, &pg_power, false); - - if (pg_power != 0xff) { - /*Path A*/ - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL1_TXA_OFFSET, &pg_power, false); - power_trim_info->bb_gain[1][0] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL2_TXA_OFFSET, &pg_power, false); - power_trim_info->bb_gain[2][0] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GM1_TXA_OFFSET, &pg_power, false); - power_trim_info->bb_gain[3][0] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GM2_TXA_OFFSET, &pg_power, false); - power_trim_info->bb_gain[4][0] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GH1_TXA_OFFSET, &pg_power, false); - power_trim_info->bb_gain[5][0] = pg_power; - - /*Path B*/ - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL1_TXB_OFFSET, &pg_power, false); - power_trim_info->bb_gain[1][1] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL2_TXB_OFFSET, &pg_power, false); - power_trim_info->bb_gain[2][1] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GM1_TXB_OFFSET, &pg_power, false); - power_trim_info->bb_gain[3][1] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GM2_TXB_OFFSET, &pg_power, false); - power_trim_info->bb_gain[4][1] = pg_power; - odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GH1_TXB_OFFSET, &pg_power, false); - power_trim_info->bb_gain[5][1] = pg_power; - - power_trim_info->flag |= KFREE_FLAG_ON_5G; - power_trim_info->flag |= KFREE_FLAG_ON; - } - - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b power trim flag:0x%02x\n", power_trim_info->flag); - - if (!(power_trim_info->flag & KFREE_FLAG_ON)) - return; - - for (i = 0; i < KFREE_BAND_NUM; i++) { - for (j = 0; j < 2; j++) - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b power_trim_data->bb_gain[%d][%d]=0x%X\n", i, j, power_trim_info->bb_gain[i][j]); - } -#if 0 - } else + if (!(power_trim_info->flag & KFREE_FLAG_ON)) return; -#endif + + for (i = 0; i < KFREE_BAND_NUM; i++) { + for (j = 0; j < 2; j++) + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8822b PwrTrim->bb_gain[%d][%d]=0x%X\n", + i, j, power_trim_info->bb_gain[i][j]); + } } - - -void -phydm_set_pa_bias_to_rf_8822b( - void *dm_void, - u8 e_rf_path, - s8 tx_pa_bias -) +void phydm_set_pa_bias_to_rf_8822b(void *dm_void, u8 e_rf_path, s8 tx_pa_bias) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; - u32 rf_reg_51 = 0, rf_reg_52 = 0, rf_reg_3f = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 rf_reg_51 = 0, rf_reg_52 = 0, rf_reg_3f = 0; + u32 tx_pa_bias_bmask = (BIT(12) | BIT(11) | BIT(10) | BIT(9)); - rf_reg_51 = odm_get_rf_reg(dm, e_rf_path, 0x51, RFREGOFFSETMASK); - rf_reg_52 = odm_get_rf_reg(dm, e_rf_path, 0x52, RFREGOFFSETMASK); + rf_reg_51 = odm_get_rf_reg(dm, e_rf_path, RF_0x51, RFREGOFFSETMASK); + rf_reg_52 = odm_get_rf_reg(dm, e_rf_path, RF_0x52, RFREGOFFSETMASK); - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b 2g rf(0x51)=0x%X rf(0x52)=0x%X path=%d\n", - rf_reg_51, rf_reg_52, e_rf_path); + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8822b 2g rf(0x51)=0x%X rf(0x52)=0x%X path=%d\n", + rf_reg_51, rf_reg_52, e_rf_path); +#if 0 /*rf3f => rf52[19:17] = rf3f[2:0] rf52[16:15] = rf3f[4:3] rf52[3:0] = rf3f[8:5]*/ /*rf3f => rf51[6:3] = rf3f[12:9] rf52[13] = rf3f[13]*/ +#endif rf_reg_3f = ((rf_reg_52 & 0xe0000) >> 17) | - (((rf_reg_52 & 0x18000) >> 15) << 3) | - ((rf_reg_52 & 0xf) << 5) | - (((rf_reg_51 & 0x78) >> 3) << 9) | - (((rf_reg_52 & 0x2000) >> 13) << 13); + (((rf_reg_52 & 0x18000) >> 15) << 3) | + ((rf_reg_52 & 0xf) << 5) | + (((rf_reg_51 & 0x78) >> 3) << 9) | + (((rf_reg_52 & 0x2000) >> 13) << 13); - PHYDM_DBG(dm, ODM_COMP_MP,"[kfree] 8822b 2g original tx_pa_bias=%d rf_reg_3f=0x%X path=%d\n", - tx_pa_bias, rf_reg_3f, e_rf_path); + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8822b 2g original pa_bias=%d rf_reg_3f=0x%X path=%d\n", + tx_pa_bias, rf_reg_3f, e_rf_path); - tx_pa_bias = (s8)((rf_reg_3f & (BIT(12) | BIT(11) | BIT(10) | BIT(9))) >> 9) + tx_pa_bias; + tx_pa_bias = (s8)((rf_reg_3f & tx_pa_bias_bmask) >> 9) + tx_pa_bias; if (tx_pa_bias < 0) tx_pa_bias = 0; @@ -445,259 +382,848 @@ phydm_set_pa_bias_to_rf_8822b( rf_reg_3f = ((rf_reg_3f & 0xfe1ff) | (tx_pa_bias << 9)); - PHYDM_DBG(dm, ODM_COMP_MP,"[kfree] 8822b 2g offset efuse 0x3d5 0x3d6 tx_pa_bias=%d rf_reg_3f=0x%X path=%d\n", - tx_pa_bias, rf_reg_3f, e_rf_path); + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8822b 2g 0x%X 0x%X pa_bias=%d rfreg_3f=0x%X path=%d\n", + PPG_PABIAS_2GA_22B, PPG_PABIAS_2GB_22B, + tx_pa_bias, rf_reg_3f, e_rf_path); - odm_set_rf_reg(dm, e_rf_path, 0xef, BIT(10), 0x1); - odm_set_rf_reg(dm, e_rf_path, 0x33, RFREGOFFSETMASK, 0x0); - odm_set_rf_reg(dm, e_rf_path, 0x3f, RFREGOFFSETMASK, rf_reg_3f); - odm_set_rf_reg(dm, e_rf_path, 0x33, BIT(0), 0x1); - odm_set_rf_reg(dm, e_rf_path, 0x3f, RFREGOFFSETMASK, rf_reg_3f); - odm_set_rf_reg(dm, e_rf_path, 0x33, BIT(1), 0x1); - odm_set_rf_reg(dm, e_rf_path, 0x3f, RFREGOFFSETMASK, rf_reg_3f); - odm_set_rf_reg(dm, e_rf_path, 0x33, (BIT(1) | BIT(0)), 0x3); - odm_set_rf_reg(dm, e_rf_path, 0x3f, RFREGOFFSETMASK, rf_reg_3f); - odm_set_rf_reg(dm, e_rf_path, 0xef, BIT(10), 0x0); + odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(10), 0x1); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x0); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, BIT(0), 0x1); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, BIT(1), 0x1); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, (BIT(1) | BIT(0)), 0x3); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); + odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(10), 0x0); - PHYDM_DBG(dm, ODM_COMP_MP,"[kfree] 8822b 2g tx pa bias rf_0x3f(0x%X) path=%d\n", - odm_get_rf_reg(dm, e_rf_path, 0x3f, (BIT(12) | BIT(11) | BIT(10) | BIT(9))), e_rf_path); + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8822b 2g tx pa bias rf_0x3f(0x%X) path=%d\n", + odm_get_rf_reg(dm, e_rf_path, RF_0x3f, + (BIT(12) | BIT(11) | BIT(10) | BIT(9))), + e_rf_path); } - - -void -phydm_get_pa_bias_offset_8822b( - void *dm_void -) +void phydm_get_pa_bias_offset_8822b(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; u8 pg_pa_bias = 0xff, e_rf_path = 0; s8 tx_pa_bias[2] = {0}; - odm_efuse_one_byte_read(dm, PPG_PA_BIAS_2G_TXA_OFFSET, &pg_pa_bias, false); + odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_22B, &pg_pa_bias, false); if (pg_pa_bias != 0xff) { /*paht a*/ - odm_efuse_one_byte_read(dm, PPG_PA_BIAS_2G_TXA_OFFSET, &pg_pa_bias, false); + odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_22B, + &pg_pa_bias, false); pg_pa_bias = pg_pa_bias & 0xf; - + if ((pg_pa_bias & BIT(0)) == 0) tx_pa_bias[0] = (-1 * (pg_pa_bias >> 1)); else tx_pa_bias[0] = (pg_pa_bias >> 1); /*paht b*/ - odm_efuse_one_byte_read(dm, PPG_PA_BIAS_2G_TXB_OFFSET, &pg_pa_bias, false); + odm_efuse_one_byte_read(dm, PPG_PABIAS_2GB_22B, + &pg_pa_bias, false); pg_pa_bias = pg_pa_bias & 0xf; - + if ((pg_pa_bias & BIT(0)) == 0) tx_pa_bias[1] = (-1 * (pg_pa_bias >> 1)); else tx_pa_bias[1] = (pg_pa_bias >> 1); - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b 2g tx_patha_pa_bias:%d tx_pathb_pa_bias:%d\n", tx_pa_bias[0], tx_pa_bias[1]); + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8822b 2g PathA_pa_bias:%d PathB_pa_bias:%d\n", + tx_pa_bias[0], tx_pa_bias[1]); - for (e_rf_path = RF_PATH_A; e_rf_path < 2; e_rf_path++) - phydm_set_pa_bias_to_rf_8822b(dm, e_rf_path, tx_pa_bias[e_rf_path]); + for (e_rf_path = RF_PATH_A; e_rf_path < 2; e_rf_path++) + phydm_set_pa_bias_to_rf_8822b(dm, e_rf_path, + tx_pa_bias[e_rf_path]); power_trim_info->pa_bias_flag |= PA_BIAS_FLAG_ON; + } else { + RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b 2g tx pa bias no pg\n"); } - else - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b 2g tx pa bias no pg\n"); } - - -void -phydm_set_kfree_to_rf_8822b( - void *dm_void, - u8 e_rf_path, - u8 data -) +void phydm_set_kfree_to_rf_8822b(void *dm_void, u8 e_rf_path, u8 data) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)); - odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(0), 1); - odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(4), 1); - odm_set_rf_reg(dm, e_rf_path, 0x65, MASKLWORD, 0x9000); - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(5), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(4), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x65, MASKLWORD, 0x9000); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1); - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (data & BIT(0))); - odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1)); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0))); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, + ((data & 0x1f) >> 1)); - PHYDM_DBG(dm, ODM_COMP_MP,"[kfree] 8822b 0x55[19:14]=0x%X path=%d\n", - odm_get_rf_reg(dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))), - e_rf_path - ); + RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b 0x55[19:14]=0x%X path=%d\n", + odm_get_rf_reg(dm, e_rf_path, RF_0x55, + (BIT(19) | BIT(18) | BIT(17) | BIT(16) | + BIT(15) | BIT(14))), e_rf_path); } - - -void -phydm_clear_kfree_to_rf_8822b( - void *dm_void, - u8 e_rf_path, - u8 data -) +void phydm_clear_kfree_to_rf_8822b(void *dm_void, u8 e_rf_path, u8 data) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)); - odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(0), 1); - odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(4), 1); - odm_set_rf_reg(dm, e_rf_path, 0x65, MASKLWORD, 0x9000); - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(5), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(4), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x65, MASKLWORD, 0x9000); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1); - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (data & BIT(0))); - odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1)); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0))); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, + ((data & 0x1f) >> 1)); - odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(0), 0); - odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(4), 1); - odm_set_rf_reg(dm, e_rf_path, 0x65, MASKLWORD, 0x9000); - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(5), 0); - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(7), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(4), 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x65, MASKLWORD, 0x9000); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 0); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(7), 0); - PHYDM_DBG(dm, ODM_COMP_MP,"[kfree] 8822b clear power trim 0x55[19:14]=0x%X path=%d\n", - odm_get_rf_reg(dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))), - e_rf_path - ); + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8822b clear power trim 0x55[19:14]=0x%X path=%d\n", + odm_get_rf_reg(dm, e_rf_path, RF_0x55, + (BIT(19) | BIT(18) | BIT(17) | BIT(16) | + BIT(15) | BIT(14))), e_rf_path); } -void -phydm_get_thermal_trim_offset_8710b( -void *dm_void) +void phydm_get_thermal_trim_offset_8710b(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct odm_power_trim_data *power_trim_info = &(dm->power_trim_data); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; u8 pg_therm = 0xff; - + odm_efuse_one_byte_read(dm, 0x0EF, &pg_therm, false); - + if (pg_therm != 0xff) { pg_therm = pg_therm & 0x1f; if ((pg_therm & BIT(0)) == 0) power_trim_info->thermal = (-1 * (pg_therm >> 1)); else power_trim_info->thermal = (pg_therm >> 1); - + power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; } - - ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8710b thermal trim flag:0x%02x\n", power_trim_info->flag)); - - if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) - ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8710b thermal:%d\n", power_trim_info->thermal)); + RF_DBG(dm, DBG_RF_MP, "[kfree] 8710b thermal trim flag:0x%02x\n", + power_trim_info->flag); + + if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) + RF_DBG(dm, DBG_RF_MP, "[kfree] 8710b thermal:%d\n", + power_trim_info->thermal); } -void -phydm_get_power_trim_offset_8710b( - void *dm_void -) +void phydm_get_power_trim_offset_8710b(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct odm_power_trim_data *power_trim_info = &(dm->power_trim_data); - struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; u8 pg_power = 0xff; odm_efuse_one_byte_read(dm, 0xEE, &pg_power, false); - if (pg_power != 0xff) { - /*Path A*/ - odm_efuse_one_byte_read(dm, 0xEE, &pg_power, false); - power_trim_info->bb_gain[0][0] = (pg_power & 0xf); + if (pg_power != 0xff) { + /*Path A*/ + odm_efuse_one_byte_read(dm, 0xEE, &pg_power, false); + power_trim_info->bb_gain[0][0] = (pg_power & 0xf); - power_trim_info->flag |= KFREE_FLAG_ON_2G; - power_trim_info->flag |= KFREE_FLAG_ON; + power_trim_info->flag |= KFREE_FLAG_ON_2G; + power_trim_info->flag |= KFREE_FLAG_ON; + } + + RF_DBG(dm, DBG_RF_MP, "[kfree] 8710b power trim flag:0x%02x\n", + power_trim_info->flag); + + if (power_trim_info->flag & KFREE_FLAG_ON) + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8710b power_trim_data->bb_gain[0][0]=0x%X\n", + power_trim_info->bb_gain[0][0]); +} + +void phydm_set_kfree_to_rf_8710b(void *dm_void, u8 e_rf_path, u8 data) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15)); + + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0))); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, ((data & 0xf) >> 1)); + + RF_DBG(dm, DBG_RF_MP, "[kfree] 8710b 0x55[19:14]=0x%X path=%d\n", + odm_get_rf_reg(dm, e_rf_path, RF_0x55, + (BIT(19) | BIT(18) | BIT(17) | BIT(16) | + BIT(15) | BIT(14))), e_rf_path); +} + +void phydm_clear_kfree_to_rf_8710b(void *dm_void, u8 e_rf_path, u8 data) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)); + + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0))); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, + ((data & 0x1f) >> 1)); + + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8710b clear power trim 0x55[19:14]=0x%X path=%d\n", + odm_get_rf_reg(dm, e_rf_path, RF_0x55, + (BIT(19) | BIT(18) | BIT(17) | BIT(16) | + BIT(15) | BIT(14))), e_rf_path); +} + +void phydm_get_thermal_trim_offset_8192f(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + + u8 pg_therm = 0xff; + + odm_efuse_one_byte_read(dm, 0x1EF, &pg_therm, false); + + if (pg_therm != 0xff) { + pg_therm = pg_therm & 0x1f; + if ((pg_therm & BIT(0)) == 0) + power_trim_info->thermal = (-1 * (pg_therm >> 1)); + else + power_trim_info->thermal = (pg_therm >> 1); + + power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; + } + + RF_DBG(dm, DBG_RF_MP, "[kfree] 8192f thermal trim flag:0x%02x\n", + power_trim_info->flag); + + if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) + RF_DBG(dm, DBG_RF_MP, "[kfree] 8192f thermal:%d\n", + power_trim_info->thermal); +} + +void phydm_get_power_trim_offset_8192f(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + + u8 pg_power1 = 0xff, pg_power2 = 0xff, pg_power3 = 0xff, i, j; + + odm_efuse_one_byte_read(dm, 0x1EE, &pg_power1, false); /*CH4-9*/ + + if (pg_power1 != 0xff) { + /*Path A*/ + odm_efuse_one_byte_read(dm, 0x1EE, &pg_power1, false); + power_trim_info->bb_gain[1][0] = (pg_power1 & 0xf); + /*Path B*/ + odm_efuse_one_byte_read(dm, 0x1EE, &pg_power1, false); + power_trim_info->bb_gain[1][1] = ((pg_power1 & 0xf0) >> 4); + + power_trim_info->flag |= KFREE_FLAG_ON_2G; + power_trim_info->flag |= KFREE_FLAG_ON; + } + + odm_efuse_one_byte_read(dm, 0x1EC, &pg_power2, false); /*CH1-3*/ + + if (pg_power2 != 0xff) { + /*Path A*/ + odm_efuse_one_byte_read(dm, 0x1EC, &pg_power2, false); + power_trim_info->bb_gain[0][0] = (pg_power2 & 0xf); + /*Path B*/ + odm_efuse_one_byte_read(dm, 0x1EC, &pg_power2, false); + power_trim_info->bb_gain[0][1] = ((pg_power2 & 0xf0) >> 4); + + power_trim_info->flag |= KFREE_FLAG_ON_2G; + power_trim_info->flag |= KFREE_FLAG_ON; + } else { + power_trim_info->bb_gain[0][0] = (pg_power1 & 0xf); + power_trim_info->bb_gain[0][1] = ((pg_power1 & 0xf0) >> 4); + } + + odm_efuse_one_byte_read(dm, 0x1EA, &pg_power3, false); /*CH10-14*/ + + if (pg_power3 != 0xff) { + /*Path A*/ + odm_efuse_one_byte_read(dm, 0x1EA, &pg_power3, false); + power_trim_info->bb_gain[2][0] = (pg_power3 & 0xf); + /*Path B*/ + odm_efuse_one_byte_read(dm, 0x1EA, &pg_power3, false); + power_trim_info->bb_gain[2][1] = ((pg_power3 & 0xf0) >> 4); + + power_trim_info->flag |= KFREE_FLAG_ON_2G; + power_trim_info->flag |= KFREE_FLAG_ON; + } else { + power_trim_info->bb_gain[2][0] = (pg_power1 & 0xf); + power_trim_info->bb_gain[2][1] = ((pg_power1 & 0xf0) >> 4); + } + + RF_DBG(dm, DBG_RF_MP, "[kfree] 8192F power trim flag:0x%02x\n", + power_trim_info->flag); + + if (!(power_trim_info->flag & KFREE_FLAG_ON)) + return; + + for (i = 0; i < KFREE_CH_NUM; i++) { + for (j = 0; j < 2; j++) + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8192F PwrTrim->bb_gain[%d][%d]=0x%X\n", + i, j, power_trim_info->bb_gain[i][j]); + } +} + +void phydm_set_kfree_to_rf_8192f(void *dm_void, u8 e_rf_path, u8 channel_idx, + u8 data) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + /*power_trim based on 55[19:14]*/ + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1); + /*enable 55[14] for 0.5db step*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 1); + /*enter power_trim debug mode*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 1); + /*write enable*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 1); + + if (e_rf_path == 0) { + if (channel_idx == 0) { + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 0); + odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); + + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 1); + odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); + + } else if (channel_idx == 1) { + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 2); + odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); + + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 3); + odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); + } else if (channel_idx == 2) { + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 4); + odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); + + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 5); + odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); } + } else if (e_rf_path == 1) { + if (channel_idx == 0) { + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 0); + odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 1); + odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); + } else if (channel_idx == 1) { + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 2); + odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); - ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8710b power trim flag:0x%02x\n", power_trim_info->flag)); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 3); + odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); + } else if (channel_idx == 2) { + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 4); + odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); - if (power_trim_info->flag & KFREE_FLAG_ON) + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 5); + odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); + } + } - ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8710b power_trim_data->bb_gain[0][0]=0x%X\n", power_trim_info->bb_gain[0][0])); + /*leave power_trim debug mode*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0); + /*write disable*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 0); -} -void -phydm_set_kfree_to_rf_8710b( - void *dm_void, - u8 e_rf_path, - u8 data -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; - - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (data & BIT(0))); - odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15)), ((data & 0xf) >> 1)); - - ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD, - ("[kfree] 8710b 0x55[19:14]=0x%X path=%d\n", - odm_get_rf_reg(dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))), - e_rf_path - )); + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8192F 0x55[19:14]=0x%X path=%d channel=%d\n", + odm_get_rf_reg(dm, e_rf_path, RF_0x55, + (BIT(19) | BIT(18) | BIT(17) | BIT(16) | + BIT(15) | BIT(14))), e_rf_path, channel_idx); } -void -phydm_clear_kfree_to_rf_8710b( - void *dm_void, - u8 e_rf_path, - u8 data -) +#if 0 +/* +void phydm_clear_kfree_to_rf_8192f(void *dm_void, u8 e_rf_path, u8 data) { struct dm_struct *dm = (struct dm_struct *)dm_void; struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; - odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (data & BIT(0))); - odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1)); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0))); + odm_set_rf_reg(dm, e_rf_path, RF_0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1)); - ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD, - ("[kfree] 8710b clear power trim 0x55[19:14]=0x%X path=%d\n", - odm_get_rf_reg(dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))), + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8192F clear power trim 0x55[19:14]=0x%X path=%d\n", + odm_get_rf_reg(dm, e_rf_path, RF_0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))), e_rf_path - )); + ); +} +*/ +#endif + +void phydm_get_thermal_trim_offset_8198f(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + + u8 pg_therm = 0xff; + + odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_98F, &pg_therm, false); + + if (pg_therm != 0xff) { + pg_therm = pg_therm & 0x1f; + if ((pg_therm & BIT(0)) == 0) + power_trim_info->thermal = (-1 * (pg_therm >> 1)); + else + power_trim_info->thermal = (pg_therm >> 1); + + power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; + } + + RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f thermal trim flag:0x%02x\n", + power_trim_info->flag); + + if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) + RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f thermal:%d\n", + power_trim_info->thermal); +} + +void phydm_get_power_trim_offset_8198f(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + + u8 pg_power = 0xff, i, j; + + odm_efuse_one_byte_read(dm, PPG_2GL_TXAB_98F, &pg_power, false); + + if (pg_power != 0xff) { + power_trim_info->bb_gain[0][0] = pg_power & 0xf; + power_trim_info->bb_gain[0][1] = (pg_power & 0xf0) >> 4; + + odm_efuse_one_byte_read(dm, PPG_2GL_TXCD_98F, &pg_power, false); + power_trim_info->bb_gain[0][2] = pg_power & 0xf; + power_trim_info->bb_gain[0][3] = (pg_power & 0xf0) >> 4; + + odm_efuse_one_byte_read(dm, PPG_2GM_TXAB_98F, &pg_power, false); + power_trim_info->bb_gain[1][0] = pg_power & 0xf; + power_trim_info->bb_gain[1][1] = (pg_power & 0xf0) >> 4; + + odm_efuse_one_byte_read(dm, PPG_2GM_TXCD_98F, &pg_power, false); + power_trim_info->bb_gain[1][2] = pg_power & 0xf; + power_trim_info->bb_gain[1][3] = (pg_power & 0xf0) >> 4; + + odm_efuse_one_byte_read(dm, PPG_2GH_TXAB_98F, &pg_power, false); + power_trim_info->bb_gain[2][0] = pg_power & 0xf; + power_trim_info->bb_gain[2][1] = (pg_power & 0xf0) >> 4; + + odm_efuse_one_byte_read(dm, PPG_2GH_TXCD_98F, &pg_power, false); + power_trim_info->bb_gain[2][2] = pg_power & 0xf; + power_trim_info->bb_gain[2][3] = (pg_power & 0xf0) >> 4; + + power_trim_info->flag = + power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_2G; + } + + RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f power trim flag:0x%02x\n", + power_trim_info->flag); + + if (power_trim_info->flag & KFREE_FLAG_ON) { + for (i = 0; i < KFREE_BAND_NUM; i++) { + for (j = 0; j < MAX_RF_PATH; j++) { + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8198f pwr_trim->bb_gain[%d][%d]=0x%X\n", + i, j, power_trim_info->bb_gain[i][j]); + } + } + } +} + +void phydm_set_kfree_to_rf_8198f(void *dm_void, u8 e_rf_path, u8 data) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + u32 band, i; + s8 pwr_offset[3]; + + RF_DBG(dm, DBG_RF_MP, + "[kfree] %s:Set kfree to rf 0x33\n", __func__); + + /*power_trim based on 55[19:14]*/ + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1); + /*enable 55[14] for 0.5db step*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 1); + /*enter power_trim debug mode*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0); + /*write enable*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 1); + + for (i =0; i < 3; i++) + pwr_offset[i] = power_trim_info->bb_gain[i][e_rf_path]; + + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 0); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[0]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[0]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 2); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[1]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 3); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[1]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 4); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[2]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 5); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[2]); + + /*leave power_trim debug mode*/ + /*odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0);*/ + /*write disable*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 0); + +} + +void phydm_clear_kfree_to_rf_8198f(void *dm_void, u8 e_rf_path, u8 data) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + RF_DBG(dm, DBG_RF_MP, + "[kfree] %s:Clear kfree to rf 0x55\n", __func__); +#if 0 + /*power_trim based on 55[19:14]*/ + odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1); + /*enable 55[14] for 0.5db step*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 1); + /*enter power_trim debug mode*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0); + /*write enable*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 1); + + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 0); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 1); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 2); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 3); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 4); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 5); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data); + + /*leave power_trim debug mode*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0); + /*enable 55[14] for 0.5db step*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 0); + /*write disable*/ + odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 0); +#else + + odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 1); + /*odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 0);*/ + +#endif + +} + +void phydm_get_set_thermal_trim_offset_8822c(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + + u8 pg_therm = 0xff, thermal[2] = {0}; + + odm_efuse_one_byte_read(dm, PPG_THERMAL_A_OFFSET_22C, &pg_therm, false); + + if (pg_therm != 0xff) { + /*s0*/ + pg_therm = pg_therm & 0x1f; + + thermal[RF_PATH_A] = + ((pg_therm & 0x1) << 3) | ((pg_therm >> 1) & 0x7); + + odm_set_rf_reg(dm, RF_PATH_A, RF_0x43, 0x000f0000, thermal[RF_PATH_A]); + + /*s1*/ + odm_efuse_one_byte_read(dm, PPG_THERMAL_B_OFFSET_22C, &pg_therm, false); + + pg_therm = pg_therm & 0x1f; + + thermal[RF_PATH_B] = ((pg_therm & 0x1) << 3) | ((pg_therm >> 1) & 0x7); + + odm_set_rf_reg(dm, RF_PATH_B, RF_0x43, 0x000f0000, thermal[RF_PATH_B]); + + power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; + + } + + RF_DBG(dm, DBG_RF_MP, "[kfree] 8822c thermal trim flag:0x%02x\n", + power_trim_info->flag); + + if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) + RF_DBG(dm, DBG_RF_MP, "[kfree] 8822c thermalA:%d thermalB:%d\n", + thermal[RF_PATH_A], + thermal[RF_PATH_B]); +} + +void phydm_set_power_trim_offset_8822c(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + u8 e_rf_path; + + for (e_rf_path = RF_PATH_A; e_rf_path < 2; e_rf_path++) + { + odm_set_rf_reg(dm, e_rf_path, RF_0xee, BIT(19), 1); + + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x0); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[0][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x1); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[1][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x2); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[2][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x3); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[2][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x4); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[3][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x5); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[4][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x6); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[5][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x7); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[6][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x8); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[7][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x9); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[3][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xa); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[4][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xb); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[5][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xc); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[6][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xd); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[7][e_rf_path]); + odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xe); + odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, + power_trim_info->bb_gain[7][e_rf_path]); + + odm_set_rf_reg(dm, e_rf_path, RF_0xee, BIT(19), 0); + } +} + +void phydm_get_power_trim_offset_8822c(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + + u8 pg_power = 0xff, i, j; + u8 pg_power1, pg_power2 , pg_power3, pg_power4, pg_power5; + + odm_efuse_one_byte_read(dm, PPG_2GL_TXAB_22C, &pg_power1, false); + odm_efuse_one_byte_read(dm, PPG_2GM_TXAB_22C, &pg_power2, false); + odm_efuse_one_byte_read(dm, PPG_2GH_TXAB_22C, &pg_power3, false); + odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_22C, &pg_power4, false); + odm_efuse_one_byte_read(dm, PPG_5GL1_TXB_22C, &pg_power5, false); + + if (pg_power1 != 0xff || pg_power2 != 0xff || pg_power3 != 0xff || + pg_power4 != 0xff || pg_power5 != 0xff) { + odm_efuse_one_byte_read(dm, PPG_2GL_TXAB_22C, &pg_power, false); + if (pg_power == 0xff) + pg_power = 0; + power_trim_info->bb_gain[0][0] = pg_power & 0xf; + power_trim_info->bb_gain[0][1] = (pg_power & 0xf0) >> 4; + + odm_efuse_one_byte_read(dm, PPG_2GM_TXAB_22C, &pg_power, false); + if (pg_power == 0xff) + pg_power = 0; + power_trim_info->bb_gain[1][0] = pg_power & 0xf; + power_trim_info->bb_gain[1][1] = (pg_power & 0xf0) >> 4; + + odm_efuse_one_byte_read(dm, PPG_2GH_TXAB_22C, &pg_power, false); + if (pg_power == 0xff) + pg_power = 0; + power_trim_info->bb_gain[2][0] = pg_power & 0xf; + power_trim_info->bb_gain[2][1] = (pg_power & 0xf0) >> 4; + + odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_22C, &pg_power, false); + if (pg_power == 0xff) + pg_power = 0; + power_trim_info->bb_gain[3][0] = pg_power & 0x1f; + odm_efuse_one_byte_read(dm, PPG_5GL1_TXB_22C, &pg_power, false); + if (pg_power == 0xff) + pg_power = 0; + power_trim_info->bb_gain[3][1] = pg_power & 0x1f; + + odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_22C, &pg_power, false); + if (pg_power == 0xff) + pg_power = 0; + power_trim_info->bb_gain[4][0] = pg_power & 0x1f; + odm_efuse_one_byte_read(dm, PPG_5GL2_TXB_22C, &pg_power, false); + if (pg_power == 0xff) + pg_power = 0; + power_trim_info->bb_gain[4][1] = pg_power & 0x1f; + + odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_22C, &pg_power, false); + if (pg_power == 0xff) + pg_power = 0; + power_trim_info->bb_gain[5][0] = pg_power & 0x1f; + odm_efuse_one_byte_read(dm, PPG_5GM1_TXB_22C, &pg_power, false); + if (pg_power == 0xff) + pg_power = 0; + power_trim_info->bb_gain[5][1] = pg_power & 0x1f; + + odm_efuse_one_byte_read(dm, PPG_5GM2_TXA_22C, &pg_power, false); + if (pg_power == 0xff) + pg_power = 0; + power_trim_info->bb_gain[6][0] = pg_power & 0x1f; + odm_efuse_one_byte_read(dm, PPG_5GM2_TXB_22C, &pg_power, false); + if (pg_power == 0xff) + pg_power = 0; + power_trim_info->bb_gain[6][1] = pg_power & 0x1f; + + odm_efuse_one_byte_read(dm, PPG_5GH1_TXA_22C, &pg_power, false); + if (pg_power == 0xff) + pg_power = 0; + power_trim_info->bb_gain[7][0] = pg_power & 0x1f; + odm_efuse_one_byte_read(dm, PPG_5GH1_TXB_22C, &pg_power, false); + if (pg_power == 0xff) + pg_power = 0; + power_trim_info->bb_gain[7][1] = pg_power & 0x1f; + + power_trim_info->flag = + power_trim_info->flag | KFREE_FLAG_ON | + KFREE_FLAG_ON_2G | + KFREE_FLAG_ON_5G; + + phydm_set_power_trim_offset_8822c(dm); + } + + RF_DBG(dm, DBG_RF_MP, "[kfree] 8822c power trim flag:0x%02x\n", + power_trim_info->flag); + + if (power_trim_info->flag & KFREE_FLAG_ON) { + for (i = 0; i < KFREE_BAND_NUM; i++) { + for (j = 0; j < 2; j++) { + RF_DBG(dm, DBG_RF_MP, + "[kfree] 8822c pwr_trim->bb_gain[%d][%d]=0x%X\n", + i, j, power_trim_info->bb_gain[i][j]); + } + } + } +} + +void phydm_get_set_pa_bias_offset_8822c(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + + u8 pg_pa_bias = 0xff; + + RF_DBG(dm, DBG_RF_MP, "======>%s\n", __func__); + + odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_22C, &pg_pa_bias, false); + + if (pg_pa_bias != 0xff) { + /*2G s0*/ + odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_22C, + &pg_pa_bias, false); + pg_pa_bias = pg_pa_bias & 0xf; + + RF_DBG(dm, DBG_RF_MP, "[kfree] 2G s0 pa_bias=0x%x\n", pg_pa_bias); + + odm_set_rf_reg(dm, RF_PATH_A, 0x60, 0x0000f000, pg_pa_bias); + + /*2G s1*/ + odm_efuse_one_byte_read(dm, PPG_PABIAS_2GB_22C, + &pg_pa_bias, false); + pg_pa_bias = pg_pa_bias & 0xf; + + RF_DBG(dm, DBG_RF_MP, "[kfree] 2G s1 pa_bias=0x%x\n", pg_pa_bias); + + odm_set_rf_reg(dm, RF_PATH_B, 0x60, 0x0000f000, pg_pa_bias); + + /*5G s0*/ + odm_efuse_one_byte_read(dm, PPG_PABIAS_5GA_22C, + &pg_pa_bias, false); + pg_pa_bias = pg_pa_bias & 0xf; + + RF_DBG(dm, DBG_RF_MP, "[kfree] 5G s0 pa_bias=0x%x\n", pg_pa_bias); + + odm_set_rf_reg(dm, RF_PATH_A, 0x60, 0x000f0000, pg_pa_bias); + + /*5G s1*/ + odm_efuse_one_byte_read(dm, PPG_PABIAS_5GB_22C, + &pg_pa_bias, false); + pg_pa_bias = pg_pa_bias & 0xf; + + RF_DBG(dm, DBG_RF_MP, "[kfree] 5G s1 pa_bias=0x%x\n", pg_pa_bias); + + odm_set_rf_reg(dm, RF_PATH_B, 0x60, 0x000f0000, pg_pa_bias); + + power_trim_info->pa_bias_flag |= PA_BIAS_FLAG_ON; + } else { + RF_DBG(dm, DBG_RF_MP, "[kfree] 8822c tx pa bias no pg\n"); + } + +} + +void phydm_do_new_kfree(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ic_type & ODM_RTL8822C) { + phydm_get_set_thermal_trim_offset_8822c(dm); + phydm_get_power_trim_offset_8822c(dm); + phydm_get_set_pa_bias_offset_8822c(dm); + } } -void -phydm_set_kfree_to_rf( - void *dm_void, - u8 e_rf_path, - u8 data -) + +void phydm_set_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (dm->support_ic_type & ODM_RTL8814A) phydm_set_kfree_to_rf_8814a(dm, e_rf_path, data); - if ((dm->support_ic_type & ODM_RTL8821C) && (*dm->band_type == ODM_BAND_2_4G)) + if ((dm->support_ic_type & ODM_RTL8821C) && + (*dm->band_type == ODM_BAND_2_4G)) phydm_set_kfree_to_rf_8821c(dm, e_rf_path, true, data); else if (dm->support_ic_type & ODM_RTL8821C) phydm_set_kfree_to_rf_8821c(dm, e_rf_path, false, data); if (dm->support_ic_type & ODM_RTL8822B) phydm_set_kfree_to_rf_8822b(dm, e_rf_path, data); + if (dm->support_ic_type & ODM_RTL8710B) phydm_set_kfree_to_rf_8710b(dm, e_rf_path, data); + + if (dm->support_ic_type & ODM_RTL8198F) + phydm_set_kfree_to_rf_8198f(dm, e_rf_path, data); } - - -void -phydm_clear_kfree_to_rf( - void *dm_void, - u8 e_rf_path, - u8 data -) +void phydm_clear_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (dm->support_ic_type & ODM_RTL8822B) phydm_clear_kfree_to_rf_8822b(dm, e_rf_path, 1); @@ -705,28 +1231,22 @@ phydm_clear_kfree_to_rf( if (dm->support_ic_type & ODM_RTL8821C) phydm_clear_kfree_to_rf_8821c(dm, e_rf_path, 1); - if (dm->support_ic_type & ODM_RTL8710B) - phydm_set_kfree_to_rf_8710b(dm, e_rf_path, data); + if (dm->support_ic_type & ODM_RTL8198F) + phydm_clear_kfree_to_rf_8198f(dm, e_rf_path, 0); } - - - -void -phydm_get_thermal_trim_offset( - void *dm_void -) +void phydm_get_thermal_trim_offset(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - PEFUSE_HAL pEfuseHal = &hal_data->EfuseHal; - u1Byte eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2]; + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + PEFUSE_HAL pEfuseHal = &hal_data->EfuseHal; + u1Byte eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2]; if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO((PADAPTER)adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS) - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] dump efuse fail !!!\n"); + RF_DBG(dm, DBG_RF_MP, "[kfree] dump efuse fail !!!\n"); #endif if (dm->support_ic_type & ODM_RTL8821C) @@ -735,16 +1255,15 @@ phydm_get_thermal_trim_offset( phydm_get_thermal_trim_offset_8822b(dm_void); else if (dm->support_ic_type & ODM_RTL8710B) phydm_get_thermal_trim_offset_8710b(dm_void); + else if (dm->support_ic_type & ODM_RTL8192F) + phydm_get_thermal_trim_offset_8192f(dm_void); + else if (dm->support_ic_type & ODM_RTL8198F) + phydm_get_thermal_trim_offset_8198f(dm_void); } - - -void -phydm_get_power_trim_offset( - void *dm_void -) +void phydm_get_power_trim_offset(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if 0 //(DM_ODM_SUPPORT_TYPE & ODM_WIN) // 2017 MH DM Should use the same code.s void *adapter = dm->adapter; @@ -753,7 +1272,7 @@ phydm_get_power_trim_offset( u1Byte eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2]; if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO(adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS) - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] dump efuse fail !!!\n"); + RF_DBG(dm, DBG_RF_MP, "[kfree] dump efuse fail !!!\n"); #endif if (dm->support_ic_type & ODM_RTL8821C) @@ -762,41 +1281,34 @@ phydm_get_power_trim_offset( phydm_get_power_trim_offset_8822b(dm_void); else if (dm->support_ic_type & ODM_RTL8710B) phydm_get_power_trim_offset_8710b(dm_void); - + else if (dm->support_ic_type & ODM_RTL8192F) + phydm_get_power_trim_offset_8192f(dm_void); + else if (dm->support_ic_type & ODM_RTL8198F) + phydm_get_power_trim_offset_8198f(dm_void); } - - -void -phydm_get_pa_bias_offset( - void *dm_void -) +void phydm_get_pa_bias_offset(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - PEFUSE_HAL pEfuseHal = &hal_data->EfuseHal; - u1Byte eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2]; + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + PEFUSE_HAL pEfuseHal = &hal_data->EfuseHal; + u1Byte eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2]; if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO((PADAPTER)adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS) - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] dump efuse fail !!!\n"); + RF_DBG(dm, DBG_RF_MP, "[kfree] dump efuse fail !!!\n"); #endif if (dm->support_ic_type & ODM_RTL8822B) phydm_get_pa_bias_offset_8822b(dm_void); } - - -s8 -phydm_get_thermal_offset( - void *dm_void -) +s8 phydm_get_thermal_offset(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) return power_trim_info->thermal; @@ -804,80 +1316,163 @@ phydm_get_thermal_offset( return 0; } - - -void -phydm_config_kfree( - void *dm_void, - u8 channel_to_sw -) +void phydm_do_kfree(void *dm_void, u8 channel_to_sw) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; - struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; - - u8 rfpath = 0, max_rf_path = 0; - u8 channel_idx = 0, i, j; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_power_trim_data *pwrtrim = &dm->power_trim_data; + u8 channel_idx = 0, rfpath = 0, max_path = 0, kfree_band_num = 0; + u8 i, j; + s8 bb_gain; if (dm->support_ic_type & ODM_RTL8814A) - max_rf_path = 4; /*0~3*/ - else if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E | ODM_RTL8822B)) - max_rf_path = 2; /*0~1*/ - else if (dm->support_ic_type & (ODM_RTL8821C| ODM_RTL8710B)) - max_rf_path = 1; - - PHYDM_DBG(dm, ODM_COMP_MP, "===>[kfree] phy_ConfigKFree()\n"); - - if (cali_info->reg_rf_kfree_enable == 2) { - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] phy_ConfigKFree(): reg_rf_kfree_enable == 2, Disable\n"); - return; - } else if (cali_info->reg_rf_kfree_enable == 1 || cali_info->reg_rf_kfree_enable == 0) { - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] phy_ConfigKFree(): reg_rf_kfree_enable == true\n"); - /*Make sure the targetval is defined*/ - if (!(power_trim_info->flag & KFREE_FLAG_ON)) { - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] phy_ConfigKFree(): targetval not defined, Don't execute KFree Process.\n"); - return; - } - /*if kfree_table[0] == 0xff, means no Kfree*/ - if (dm->support_ic_type &ODM_RTL8710B) - ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] power_trim_data->bb_gain[0][0]=0x%X\n", power_trim_info->bb_gain[0][0])); - else if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E | ODM_RTL8822B |ODM_RTL8821C | ODM_RTL8814A)){ - for (i = 0; i < KFREE_BAND_NUM; i++) { - for (j = 0; j < max_rf_path; j++) - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] power_trim_data->bb_gain[%d][%d]=0x%X\n", i, j, power_trim_info->bb_gain[i][j]); - } - } - if (*dm->band_type == ODM_BAND_2_4G && power_trim_info->flag & KFREE_FLAG_ON_2G) { - if (channel_to_sw >= 1 && channel_to_sw <= 14) - channel_idx = PHYDM_2G; - - for (rfpath = RF_PATH_A; rfpath < max_rf_path; rfpath++) { - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] phydm_kfree(): channel_to_sw=%d PATH_%d bb_gain:0x%X\n", channel_to_sw, rfpath, power_trim_info->bb_gain[channel_idx][rfpath]); - phydm_set_kfree_to_rf(dm, rfpath, power_trim_info->bb_gain[channel_idx][rfpath]); - } - - } else if (*dm->band_type == ODM_BAND_5G && power_trim_info->flag & KFREE_FLAG_ON_5G) { - if (channel_to_sw >= 36 && channel_to_sw <= 48) - channel_idx = PHYDM_5GLB1; - if (channel_to_sw >= 52 && channel_to_sw <= 64) - channel_idx = PHYDM_5GLB2; - if (channel_to_sw >= 100 && channel_to_sw <= 120) - channel_idx = PHYDM_5GMB1; - if (channel_to_sw >= 122 && channel_to_sw <= 144) - channel_idx = PHYDM_5GMB2; - if (channel_to_sw >= 149 && channel_to_sw <= 177) - channel_idx = PHYDM_5GHB; - - for (rfpath = RF_PATH_A; rfpath < max_rf_path; rfpath++) { - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] phydm_kfree(): channel_to_sw=%d PATH_%d bb_gain:0x%X\n", channel_to_sw, rfpath, power_trim_info->bb_gain[channel_idx][rfpath]); - phydm_set_kfree_to_rf(dm, rfpath, power_trim_info->bb_gain[channel_idx][rfpath]); - } - } else { - PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] Set default Register\n"); - for (rfpath = RF_PATH_A; rfpath < max_rf_path; rfpath++) - phydm_clear_kfree_to_rf(dm, rfpath, power_trim_info->bb_gain[channel_idx][rfpath]); - } + max_path = 4; /*0~3*/ + else if (dm->support_ic_type & + (ODM_RTL8812 | ODM_RTL8822B | ODM_RTL8192F)) { + max_path = 2; /*0~1*/ + kfree_band_num = KFREE_BAND_NUM; + } else if (dm->support_ic_type & ODM_RTL8821C) { + max_path = 1; + kfree_band_num = KFREE_BAND_NUM; + } else if (dm->support_ic_type & ODM_RTL8710B) { + max_path = 1; + kfree_band_num = 1; + } else if (dm->support_ic_type & ODM_RTL8198F) { + max_path = 4; + kfree_band_num = 3; } - PHYDM_DBG(dm, ODM_COMP_MP, "<===[kfree] phy_ConfigKFree()\n"); + if (dm->support_ic_type & + (ODM_RTL8192F | ODM_RTL8822B | ODM_RTL8821C | + ODM_RTL8814A | ODM_RTL8710B)) { + for (i = 0; i < kfree_band_num; i++) { + for (j = 0; j < max_path; j++) + RF_DBG(dm, DBG_RF_MP, + "[kfree] PwrTrim->gain[%d][%d]=0x%X\n", + i, j, pwrtrim->bb_gain[i][j]); + } + } + if (*dm->band_type == ODM_BAND_2_4G && + pwrtrim->flag & KFREE_FLAG_ON_2G) { + if (!(dm->support_ic_type & ODM_RTL8192F)) { + if (channel_to_sw >= 1 && channel_to_sw <= 14) + channel_idx = PHYDM_2G; + for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) { + RF_DBG(dm, DBG_RF_MP, + "[kfree] %s:chnl=%d PATH=%d gain:0x%X\n", + __func__, channel_to_sw, rfpath, + pwrtrim->bb_gain[channel_idx][rfpath]); + bb_gain = pwrtrim->bb_gain[channel_idx][rfpath]; + phydm_set_kfree_to_rf(dm, rfpath, bb_gain); + } + } else if (dm->support_ic_type & ODM_RTL8192F) { + if (channel_to_sw >= 1 && channel_to_sw <= 3) + channel_idx = 0; + if (channel_to_sw >= 4 && channel_to_sw <= 9) + channel_idx = 1; + if (channel_to_sw >= 10 && channel_to_sw <= 14) + channel_idx = 2; + for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) { + RF_DBG(dm, DBG_RF_MP, + "[kfree] %s:chnl=%d PATH=%d gain:0x%X\n", + __func__, channel_to_sw, rfpath, + pwrtrim->bb_gain[channel_idx][rfpath]); + bb_gain = pwrtrim->bb_gain[channel_idx][rfpath]; + phydm_set_kfree_to_rf_8192f(dm, rfpath, + channel_idx, + bb_gain); + } + } + } else if (*dm->band_type == ODM_BAND_5G && + pwrtrim->flag & KFREE_FLAG_ON_5G) { + if (channel_to_sw >= 36 && channel_to_sw <= 48) + channel_idx = PHYDM_5GLB1; + if (channel_to_sw >= 52 && channel_to_sw <= 64) + channel_idx = PHYDM_5GLB2; + if (channel_to_sw >= 100 && channel_to_sw <= 120) + channel_idx = PHYDM_5GMB1; + if (channel_to_sw >= 122 && channel_to_sw <= 144) + channel_idx = PHYDM_5GMB2; + if (channel_to_sw >= 149 && channel_to_sw <= 177) + channel_idx = PHYDM_5GHB; + + for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) { + RF_DBG(dm, DBG_RF_MP, + "[kfree] %s: channel=%d PATH=%d bb_gain:0x%X\n", + __func__, channel_to_sw, rfpath, + pwrtrim->bb_gain[channel_idx][rfpath]); + bb_gain = pwrtrim->bb_gain[channel_idx][rfpath]; + phydm_set_kfree_to_rf(dm, rfpath, bb_gain); + } + } else { + RF_DBG(dm, DBG_RF_MP, "[kfree] Set default Register\n"); + if (!(dm->support_ic_type & ODM_RTL8192F)) { + for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) { + bb_gain = pwrtrim->bb_gain[channel_idx][rfpath]; + phydm_clear_kfree_to_rf(dm, rfpath, bb_gain); + } + } +#if 0 + /*else if(dm->support_ic_type & ODM_RTL8192F){ + if (channel_to_sw >= 1 && channel_to_sw <= 3) + channel_idx = 0; + if (channel_to_sw >= 4 && channel_to_sw <= 9) + channel_idx = 1; + if (channel_to_sw >= 9 && channel_to_sw <= 14) + channel_idx = 2; + for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) + phydm_clear_kfree_to_rf_8192f(dm, rfpath, pwrtrim->bb_gain[channel_idx][rfpath]); + }*/ +#endif + } +} + +void phydm_config_new_kfree(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + + if (cali_info->reg_rf_kfree_enable == 2) { + RF_DBG(dm, DBG_RF_MP, + "[kfree] %s: reg_rf_kfree_enable == 2, Disable\n", + __func__); + return; + } else if (cali_info->reg_rf_kfree_enable == 1 || + cali_info->reg_rf_kfree_enable == 0) { + RF_DBG(dm, DBG_RF_MP, + "[kfree] %s: reg_rf_kfree_enable == true\n", __func__); + + phydm_do_new_kfree(dm); + } +} + +void phydm_config_kfree(void *dm_void, u8 channel_to_sw) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + struct odm_power_trim_data *pwrtrim = &dm->power_trim_data; + + RF_DBG(dm, DBG_RF_MP, "===>[kfree] phy_ConfigKFree()\n"); + + if (cali_info->reg_rf_kfree_enable == 2) { + RF_DBG(dm, DBG_RF_MP, + "[kfree] %s: reg_rf_kfree_enable == 2, Disable\n", + __func__); + return; + } else if (cali_info->reg_rf_kfree_enable == 1 || + cali_info->reg_rf_kfree_enable == 0) { + RF_DBG(dm, DBG_RF_MP, + "[kfree] %s: reg_rf_kfree_enable == true\n", __func__); + /*Make sure the targetval is defined*/ + if (!(pwrtrim->flag & KFREE_FLAG_ON)) { + RF_DBG(dm, DBG_RF_MP, + "[kfree] %s: efuse is 0xff, KFree not work\n", + __func__); + return; + } +#if 0 + /*if kfree_table[0] == 0xff, means no Kfree*/ +#endif + phydm_do_kfree(dm, channel_to_sw); + } + RF_DBG(dm, DBG_RF_MP, "<===[kfree] phy_ConfigKFree()\n"); } diff --git a/hal/phydm/halrf/halrf_kfree.h b/hal/phydm/halrf/halrf_kfree.h index a5159d1..26acb3a 100644 --- a/hal/phydm/halrf/halrf_kfree.h +++ b/hal/phydm/halrf/halrf_kfree.h @@ -23,66 +23,91 @@ * *****************************************************************************/ +#ifndef __HALRF_KFREE_H__ +#define __HALRF_KFREE_H__ -#ifndef __PHYDMKFREE_H__ -#define __PHYDKFREE_H__ +#define KFREE_VERSION "1.0" -#define KFREE_VERSION "1.0" - -#define KFREE_BAND_NUM 6 +#define KFREE_BAND_NUM 8 +#define KFREE_CH_NUM 3 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP)) -#define BB_GAIN_NUM 6 +#define BB_GAIN_NUM 6 #endif -#define KFREE_FLAG_ON BIT(0) -#define KFREE_FLAG_THERMAL_K_ON BIT(1) +#define KFREE_FLAG_ON BIT(0) +#define KFREE_FLAG_THERMAL_K_ON BIT(1) -#define KFREE_FLAG_ON_2G BIT(2) -#define KFREE_FLAG_ON_5G BIT(3) +#define KFREE_FLAG_ON_2G BIT(2) +#define KFREE_FLAG_ON_5G BIT(3) -#define PA_BIAS_FLAG_ON BIT(4) +#define PA_BIAS_FLAG_ON BIT(4) -#define PPG_THERMAL_OFFSET_8821C 0x1EF -#define PPG_BB_GAIN_2G_TXAB_OFFSET_8821C 0x1EE -#define PPG_BB_GAIN_5GL1_TXA_OFFSET_8821C 0x1EC -#define PPG_BB_GAIN_5GL2_TXA_OFFSET_8821C 0x1E8 -#define PPG_BB_GAIN_5GM1_TXA_OFFSET_8821C 0x1E4 -#define PPG_BB_GAIN_5GM2_TXA_OFFSET_8821C 0x1E0 -#define PPG_BB_GAIN_5GH1_TXA_OFFSET_8821C 0x1DC +#define PPG_THERMAL_OFFSET_98F 0x50 +#define PPG_2GM_TXAB_98F 0x51 +#define PPG_2GM_TXCD_98F 0x52 +#define PPG_2GL_TXAB_98F 0x53 +#define PPG_2GL_TXCD_98F 0x54 +#define PPG_2GH_TXAB_98F 0x55 +#define PPG_2GH_TXCD_98F 0x56 +#define PPG_THERMAL_OFFSET_21C 0x1EF +#define PPG_2G_TXAB_21C 0x1EE +#define PPG_5GL1_TXA_21C 0x1EC +#define PPG_5GL2_TXA_21C 0x1E8 +#define PPG_5GM1_TXA_21C 0x1E4 +#define PPG_5GM2_TXA_21C 0x1E0 +#define PPG_5GH1_TXA_21C 0x1DC +#define PPG_THERMAL_OFFSET_22B 0x3EF +#define PPG_2G_TXAB_22B 0x3EE +#define PPG_2G_TXCD_22B 0x3ED +#define PPG_5GL1_TXA_22B 0x3EC +#define PPG_5GL1_TXB_22B 0x3EB +#define PPG_5GL1_TXC_22B 0x3EA +#define PPG_5GL1_TXD_22B 0x3E9 +#define PPG_5GL2_TXA_22B 0x3E8 +#define PPG_5GL2_TXB_22B 0x3E7 +#define PPG_5GL2_TXC_22B 0x3E6 +#define PPG_5GL2_TXD_22B 0x3E5 +#define PPG_5GM1_TXA_22B 0x3E4 +#define PPG_5GM1_TXB_22B 0x3E3 +#define PPG_5GM1_TXC_22B 0x3E2 +#define PPG_5GM1_TXD_22B 0x3E1 +#define PPG_5GM2_TXA_22B 0x3E0 +#define PPG_5GM2_TXB_22B 0x3DF +#define PPG_5GM2_TXC_22B 0x3DE +#define PPG_5GM2_TXD_22B 0x3DD +#define PPG_5GH1_TXA_22B 0x3DC +#define PPG_5GH1_TXB_22B 0x3DB +#define PPG_5GH1_TXC_22B 0x3DA +#define PPG_5GH1_TXD_22B 0x3D9 -#define PPG_THERMAL_OFFSET 0x3EF -#define PPG_BB_GAIN_2G_TXAB_OFFSET 0x3EE -#define PPG_BB_GAIN_2G_TXCD_OFFSET 0x3ED -#define PPG_BB_GAIN_5GL1_TXA_OFFSET 0x3EC -#define PPG_BB_GAIN_5GL1_TXB_OFFSET 0x3EB -#define PPG_BB_GAIN_5GL1_TXC_OFFSET 0x3EA -#define PPG_BB_GAIN_5GL1_TXD_OFFSET 0x3E9 -#define PPG_BB_GAIN_5GL2_TXA_OFFSET 0x3E8 -#define PPG_BB_GAIN_5GL2_TXB_OFFSET 0x3E7 -#define PPG_BB_GAIN_5GL2_TXC_OFFSET 0x3E6 -#define PPG_BB_GAIN_5GL2_TXD_OFFSET 0x3E5 -#define PPG_BB_GAIN_5GM1_TXA_OFFSET 0x3E4 -#define PPG_BB_GAIN_5GM1_TXB_OFFSET 0x3E3 -#define PPG_BB_GAIN_5GM1_TXC_OFFSET 0x3E2 -#define PPG_BB_GAIN_5GM1_TXD_OFFSET 0x3E1 -#define PPG_BB_GAIN_5GM2_TXA_OFFSET 0x3E0 -#define PPG_BB_GAIN_5GM2_TXB_OFFSET 0x3DF -#define PPG_BB_GAIN_5GM2_TXC_OFFSET 0x3DE -#define PPG_BB_GAIN_5GM2_TXD_OFFSET 0x3DD -#define PPG_BB_GAIN_5GH1_TXA_OFFSET 0x3DC -#define PPG_BB_GAIN_5GH1_TXB_OFFSET 0x3DB -#define PPG_BB_GAIN_5GH1_TXC_OFFSET 0x3DA -#define PPG_BB_GAIN_5GH1_TXD_OFFSET 0x3D9 - -#define PPG_PA_BIAS_2G_TXA_OFFSET 0x3D5 -#define PPG_PA_BIAS_2G_TXB_OFFSET 0x3D6 +#define PPG_PABIAS_2GA_22B 0x3D5 +#define PPG_PABIAS_2GB_22B 0x3D6 +#define PPG_THERMAL_A_OFFSET_22C 0x1ef +#define PPG_THERMAL_B_OFFSET_22C 0x1b0 +#define PPG_2GL_TXAB_22C 0x1d4 +#define PPG_2GM_TXAB_22C 0x1ee +#define PPG_2GH_TXAB_22C 0x1d2 +#define PPG_5GL1_TXA_22C 0x1ec +#define PPG_5GL1_TXB_22C 0x1eb +#define PPG_5GL2_TXA_22C 0x1e8 +#define PPG_5GL2_TXB_22C 0x1e7 +#define PPG_5GM1_TXA_22C 0x1e4 +#define PPG_5GM1_TXB_22C 0x1e3 +#define PPG_5GM2_TXA_22C 0x1e0 +#define PPG_5GM2_TXB_22C 0x1df +#define PPG_5GH1_TXA_22C 0x1dc +#define PPG_5GH1_TXB_22C 0x1db +#define PPG_PABIAS_2GA_22C 0x1d6 +#define PPG_PABIAS_2GB_22C 0x1d5 +#define PPG_PABIAS_5GA_22C 0x1d8 +#define PPG_PABIAS_5GB_22C 0x1d7 struct odm_power_trim_data { u8 flag; @@ -91,8 +116,6 @@ struct odm_power_trim_data { s8 thermal; }; - - enum phydm_kfree_channeltosw { PHYDM_2G = 0, PHYDM_5GLB1 = 1, @@ -102,41 +125,18 @@ enum phydm_kfree_channeltosw { PHYDM_5GHB = 5, }; +void phydm_get_thermal_trim_offset(void *dm_void); +void phydm_get_power_trim_offset(void *dm_void); -void -phydm_get_thermal_trim_offset( - void *dm_void -); +void phydm_get_pa_bias_offset(void *dm_void); -void -phydm_get_power_trim_offset( - void *dm_void -); +s8 phydm_get_thermal_offset(void *dm_void); -void -phydm_get_pa_bias_offset( - void *dm_void -); +void phydm_clear_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data); -s8 -phydm_get_thermal_offset( - void *dm_void -); +void phydm_config_new_kfree(void *dm_void); -void -phydm_clear_kfree_to_rf( - void *dm_void, - u8 e_rf_path, - u8 data -); +void phydm_config_kfree(void *dm_void, u8 channel_to_sw); - -void -phydm_config_kfree( - void *dm_void, - u8 channel_to_sw -); - - -#endif +#endif /*__HALRF_KFREE_H__*/ diff --git a/hal/phydm/halrf/halrf_powertracking.c b/hal/phydm/halrf/halrf_powertracking.c index db751bd..fcbd1d2 100644 --- a/hal/phydm/halrf/halrf_powertracking.c +++ b/hal/phydm/halrf/halrf_powertracking.c @@ -23,58 +23,55 @@ * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * include files - * ************************************************************ */ + * ************************************************************ + */ #include "mp_precomp.h" #include "phydm_precomp.h" - boolean -odm_check_power_status( - void *dm_void -) +odm_check_power_status(void *dm_void) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct dm_struct *dm = (struct dm_struct *)dm_void; - PADAPTER adapter = (PADAPTER)dm->adapter; + struct dm_struct *dm = (struct dm_struct *)dm_void; + PADAPTER *adapter = dm->adapter; - RT_RF_POWER_STATE rt_state; - MGNT_INFO *mgnt_info = &adapter->MgntInfo; + RT_RF_POWER_STATE rt_state; + MGNT_INFO *mgnt_info = &((PADAPTER)adapter)->MgntInfo; /* 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. */ if (mgnt_info->init_adpt_in_progress == true) { - PHYDM_DBG(dm, ODM_COMP_INIT, "check_pow_status Return true, due to initadapter\n"); - return true; + RF_DBG(dm, DBG_RF_INIT, + "check_pow_status Return true, due to initadapter\n"); + return true; } - /* */ - /* 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. */ - /* */ - adapter->HalFunc.GetHwRegHandler(adapter, HW_VAR_RF_STATE, (u8 *)(&rt_state)); - if (adapter->bDriverStopped || adapter->bDriverIsGoingToPnpSetPowerSleep || rt_state == eRfOff) { - PHYDM_DBG(dm, ODM_COMP_INIT, "check_pow_status Return false, due to %d/%d/%d\n", - adapter->bDriverStopped, adapter->bDriverIsGoingToPnpSetPowerSleep, rt_state); - return false; + /* + * 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. + */ + ((PADAPTER)adapter)->HalFunc.GetHwRegHandler((PADAPTER)adapter, HW_VAR_RF_STATE, (u8 *)(&rt_state)); + if (((PADAPTER)adapter)->bDriverStopped || ((PADAPTER)adapter)->bDriverIsGoingToPnpSetPowerSleep || rt_state == eRfOff) { + RF_DBG(dm, DBG_RF_INIT, + "check_pow_status Return false, due to %d/%d/%d\n", + ((PADAPTER)adapter)->bDriverStopped, + ((PADAPTER)adapter)->bDriverIsGoingToPnpSetPowerSleep, + rt_state); + return false; } #endif - return true; - + return true; } #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -void -halrf_update_pwr_track( - void *dm_void, - u8 rate -) +void halrf_update_pwr_track(void *dm_void, u8 rate) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - u8 path_idx = 0; + u8 path_idx = 0; #endif - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "Pwr Track Get rate=0x%x\n", rate); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Pwr Track Get rate=0x%x\n", rate); dm->tx_rate = rate; @@ -113,47 +110,64 @@ halrf_update_pwr_track( odm_schedule_work_item(&dm->ra_rpt_workitem); #endif #endif - } #endif - - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -halrf_update_init_rate_work_item_callback( - void *context -) +void halrf_update_init_rate_work_item_callback( + void *context) { - void *adapter = (void *)context; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; - u8 p = 0; + void *adapter = (void *)context; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; + u8 p = 0; if (dm->support_ic_type == ODM_RTL8821) { +#if (RTL8821A_SUPPORT == 1) odm_tx_pwr_track_set_pwr8821a(dm, MIX_MODE, RF_PATH_A, 0); - /**/ +#endif } else if (dm->support_ic_type == ODM_RTL8812) { - for (p = RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) { /*DOn't know how to include &c*/ - +#if (RTL8812A_SUPPORT == 1) + /*Don't know how to include &c*/ + for (p = RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) odm_tx_pwr_track_set_pwr8812a(dm, MIX_MODE, p, 0); - /**/ - } +#endif } else if (dm->support_ic_type == ODM_RTL8723B) { +#if (RTL8723B_SUPPORT == 1) odm_tx_pwr_track_set_pwr_8723b(dm, MIX_MODE, RF_PATH_A, 0); - /**/ +#endif } else if (dm->support_ic_type == ODM_RTL8192E) { - for (p = RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) { /*DOn't know how to include &c*/ +#if (RTL8192E_SUPPORT == 1) + /*Don't know how to include &c*/ + for (p = RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) odm_tx_pwr_track_set_pwr92_e(dm, MIX_MODE, p, 0); - /**/ - } +#endif } else if (dm->support_ic_type == ODM_RTL8188E) { +#if (RTL8188E_SUPPORT == 1) odm_tx_pwr_track_set_pwr88_e(dm, MIX_MODE, RF_PATH_A, 0); - /**/ +#endif } } #endif +void halrf_set_pwr_track(void *dm_void, u8 enable) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &(dm->rf_table); + struct txpwrtrack_cfg c; + u8 i; + configure_txpower_track(dm, &c); + if (enable) + rf->rf_supportability = rf->rf_supportability | HAL_RF_TX_PWR_TRACK; + else { + rf->rf_supportability = rf->rf_supportability & ~HAL_RF_TX_PWR_TRACK; + odm_clear_txpowertracking_state(dm); + for (i = 0; i < c.rf_path_count; i++) + (*c.odm_tx_pwr_track_set_pwr)(dm, CLEAN_MODE, i, 0); + } + + /*halrf_do_tssi(dm);*/ +} diff --git a/hal/phydm/halrf/halrf_powertracking.h b/hal/phydm/halrf/halrf_powertracking.h index 15e056b..c81f252 100644 --- a/hal/phydm/halrf/halrf_powertracking.h +++ b/hal/phydm/halrf/halrf_powertracking.h @@ -23,28 +23,21 @@ * *****************************************************************************/ -#ifndef __HALRF_POWER_TRACKING_H__ -#define __HALRF_POWER_TRACKING_H__ - +#ifndef __HALRF_POWER_TRACKING_H__ +#define __HALRF_POWER_TRACKING_H__ boolean -odm_check_power_status( - void *dm_void -); +odm_check_power_status(void *dm_void); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -void -halrf_update_pwr_track( - void *dm_void, - u8 rate -); +void halrf_update_pwr_track(void *dm_void, u8 rate); #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -halrf_update_init_rate_work_item_callback( - void *context -); +void halrf_update_init_rate_work_item_callback( + void *context); #endif -#endif +void halrf_set_pwr_track(void *dm_void, u8 enable); + +#endif /*#ifndef __HALRF_POWERTRACKING_H__*/ diff --git a/hal/phydm/halrf/halrf_powertracking_ap.c b/hal/phydm/halrf/halrf_powertracking_ap.c index 4e4e6a7..a368ff8 100644 --- a/hal/phydm/halrf/halrf_powertracking_ap.c +++ b/hal/phydm/halrf/halrf_powertracking_ap.c @@ -338,6 +338,50 @@ u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = { {0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ }; +/* Winnita ADD 20171113 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/ +u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = { + 0x0CD, /*0 , -20dB*/ + 0x0D9, + 0x0E6, + 0x0F3, + 0x102, + 0x111, + 0x121, + 0x132, + 0x144, + 0x158, + 0x16C, + 0x182, + 0x198, + 0x1B1, + 0x1CA, + 0x1E5, + 0x202, + 0x221, + 0x241, + 0x263, /*19*/ + 0x287, /*20*/ + 0x2AE, /*21*/ + 0x2D6, /*22*/ + 0x301, /*23*/ + 0x32F, /*24*/ + 0x35F, /*25*/ + 0x392, /*26*/ + 0x3C9, /*27*/ + 0x402, /*28*/ + 0x43F, /*29*/ + 0x47F, /*30*/ + 0x4C3, /*31*/ + 0x50C, /*32*/ + 0x558, /*33*/ + 0x5A9, /*34*/ + 0x5FF, /*35*/ + 0x65A, /*36*/ + 0x6BA, + 0x720, + 0x78C, + 0x7FF, +}; #if 0 @@ -692,7 +736,9 @@ u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8] = { }; #endif -#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) +#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\ + RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ + RTL8814B_SUPPORT == 1) u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = { 0x081, /* 0, -12.0dB */ 0x088, /* 1, -11.5dB */ @@ -910,6 +956,15 @@ get_swing_index( } #endif +#if (RTL8192F_SUPPORT == 1) + if (GET_CHIP_VER(priv) == VERSION_8192F) { + bb_swing = phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKOFDM_D); + swing_table = ofdm_swing_table_new; + swing_table_size = OFDM_TABLE_SIZE_92D; + bb_swing_mask = 22; + } +#endif + #if (RTL8822B_SUPPORT == 1) if (GET_CHIP_VER(priv) == VERSION_8822B) { bb_swing = phy_query_bb_reg(priv, REG_A_TX_SCALE_JAGUAR, 0xFFE00000); @@ -926,7 +981,7 @@ get_swing_index( break; } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "bb_swing=0x%x bbswing_index=%d\n", bb_swing, i); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "bb_swing=0x%x bbswing_index=%d\n", bb_swing, i); return i; @@ -943,8 +998,8 @@ odm_txpowertracking_thermal_meter_init( struct rtl8192cd_priv *priv = dm->priv; u8 p; u8 default_swing_index; -#if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1) - if ((GET_CHIP_VER(priv) == VERSION_8197F) || (GET_CHIP_VER(priv) == VERSION_8822B)) +#if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8192F_SUPPORT == 1) + if ((GET_CHIP_VER(priv) == VERSION_8197F) || (GET_CHIP_VER(priv) == VERSION_8822B) ||(GET_CHIP_VER(priv) == VERSION_8192F)) default_swing_index = get_swing_index(dm); #endif @@ -959,7 +1014,7 @@ odm_txpowertracking_thermal_meter_init( if (*(dm->mp_mode) == false) hal_data->txpowertrack_control = true; - PHYDM_DBG(dm, COMP_POWER_TRACKING, "mgnt_info->is_txpowertracking = %d\n", mgnt_info->is_txpowertracking); + RF_DBG(dm, COMP_POWER_TRACKING, "mgnt_info->is_txpowertracking = %d\n", mgnt_info->is_txpowertracking); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #ifdef CONFIG_RTL8188E { @@ -1016,6 +1071,13 @@ odm_txpowertracking_thermal_meter_init( } #endif +#if (RTL8192F_SUPPORT == 1) + if (GET_CHIP_VER(priv) == VERSION_8192F) { + cali_info->default_ofdm_index = 30; + cali_info->default_cck_index = 28; + } +#endif + #if (RTL8822B_SUPPORT == 1) if (GET_CHIP_VER(priv) == VERSION_8822B) { cali_info->default_ofdm_index = (default_swing_index >= (TXSCALE_TABLE_SIZE - 1)) ? 24 : default_swing_index; @@ -1040,7 +1102,7 @@ odm_txpowertracking_thermal_meter_init( } cali_info->bb_swing_idx_cck = cali_info->default_cck_index; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "cali_info->default_ofdm_index=%d cali_info->default_cck_index=%d\n", cali_info->default_ofdm_index, cali_info->default_cck_index); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "cali_info->default_ofdm_index=%d cali_info->default_cck_index=%d\n", cali_info->default_ofdm_index, cali_info->default_cck_index); cali_info->tm_trigger = 0; } @@ -1058,7 +1120,6 @@ odm_txpowertracking_check( struct dm_struct *dm = (struct dm_struct *)dm_void; struct _hal_rf_ *rf = &(dm->rf_table); - if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) return; @@ -1142,16 +1203,31 @@ odm_txpowertracking_check_ap( void *dm_void ) { - struct dm_struct *dm = (struct dm_struct *)dm_void; -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - struct rtl8192cd_priv *priv = dm->priv; + struct dm_struct *dm = (struct dm_struct *)dm_void; -#if ((RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8197F_SUPPORT == 1)) - if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A | ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8821C)) +#if ((RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1) || (RTL8198F_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8812F_SUPPORT == 1)) + if (!dm->rf_calibrate_info.tm_trigger) { + if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A | ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8192F | ODM_RTL8198F)) { + odm_set_rf_reg(dm, RF_PATH_A, 0x42, (BIT(17) | BIT(16)), 0x3); + } else if (dm->support_ic_type & ODM_RTL8812F) { + odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); + odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00); + odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); + + odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); + odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00); + odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); + } else if (dm->support_ic_type & ODM_RTL8814B) { + odm_set_rf_reg(dm, RF_PATH_A, 0x42, BIT(17), 0x1); + odm_set_rf_reg(dm, RF_PATH_B, 0x42, BIT(17), 0x1); + odm_set_rf_reg(dm, RF_PATH_C, 0x42, BIT(17), 0x1); + odm_set_rf_reg(dm, RF_PATH_D, 0x42, BIT(17), 0x1); + } + + dm->rf_calibrate_info.tm_trigger = 1; + } else { odm_txpowertracking_callback_thermal_meter(dm); - else -#endif - { + dm->rf_calibrate_info.tm_trigger = 0; } #endif diff --git a/hal/phydm/halrf/halrf_powertracking_ap.h b/hal/phydm/halrf/halrf_powertracking_ap.h index 703b876..dfeb323 100644 --- a/hal/phydm/halrf/halrf_powertracking_ap.h +++ b/hal/phydm/halrf/halrf_powertracking_ap.h @@ -13,8 +13,8 @@ * *****************************************************************************/ -#ifndef __PHYDMPOWERTRACKING_H__ -#define __PHYDMPOWERTRACKING_H__ +#ifndef __HALRF_POWERTRACKING_H__ +#define __HALRF_POWERTRACKING_H__ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #ifdef RTK_AC_SUPPORT @@ -44,6 +44,9 @@ #define IQK_BB_REG_NUM 9 #define AVG_THERMAL_NUM 8 +#define AVG_THERMAL_NUM_DPK 8 +#define THERMAL_DPK_AVG_NUM 4 + #define iqk_matrix_reg_num 8 /* #define IQK_MATRIX_SETTINGS_NUM 1+24+21 */ #define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */ @@ -53,6 +56,7 @@ #define OFDM_TABLE_SIZE 37 #define CCK_TABLE_SIZE 33 #define CCK_TABLE_SIZE_88F 21 + #define CCK_TABLE_SIZE_8192F 41 @@ -69,11 +73,13 @@ extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16]; extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16]; extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16]; + extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F]; #endif #define ODM_OFDM_TABLE_SIZE 37 #define ODM_CCK_TABLE_SIZE 33 +#define TXPWR_TRACK_TABLE_SIZE 30 /* <20140613, YuChen> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */ extern u8 delta_swing_table_idx_2ga_p_default[DELTA_SWINGIDX_SIZE]; extern u8 delta_swing_table_idx_2ga_n_default[DELTA_SWINGIDX_SIZE]; @@ -96,7 +102,9 @@ static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4 #define OFDM_TABLE_SIZE_8812 43 #define AVG_THERMAL_NUM_8812 4 -#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) +#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\ + RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ + RTL8814B_SUPPORT == 1) extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE]; #elif(ODM_IC_11AC_SERIES_SUPPORT) extern unsigned int ofdm_swing_table_8812[OFDM_TABLE_SIZE_8812]; @@ -132,18 +140,22 @@ struct dm_rf_calibration_struct { u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */ u8 thermal_value; + u8 thermal_value_path[MAX_RF_PATH]; u8 thermal_value_lck; u8 thermal_value_iqk; s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */ - u8 thermal_value_dpk; u8 thermal_value_avg[AVG_THERMAL_NUM]; + u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM]; u8 thermal_value_avg_index; + u8 thermal_value_avg_index_path[MAX_RF_PATH]; + s8 power_index_offset_path[MAX_RF_PATH]; + u8 thermal_value_rx_gain; u8 thermal_value_crystal; u8 thermal_value_dpk_store; u8 thermal_value_dpk_track; boolean txpowertracking_in_progress; - boolean is_dpk_enable; + boolean is_reloadtxpowerindex; u8 is_rf_pi_enable; @@ -154,7 +166,9 @@ struct dm_rf_calibration_struct { u8 OFDM_index[MAX_RF_PATH]; s8 power_index_offset; s8 delta_power_index; + s8 delta_power_index_path[MAX_RF_PATH]; s8 delta_power_index_last; + s8 delta_power_index_last_path[MAX_RF_PATH]; boolean is_tx_power_changed; struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM]; @@ -195,6 +209,8 @@ struct dm_rf_calibration_struct { u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE]; u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE]; u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE]; + s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE]; + s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE]; u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE]; u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE]; @@ -204,6 +220,7 @@ struct dm_rf_calibration_struct { u8 bb_swing_idx_ofdm_base[MAX_RF_PATH]; #else u8 bb_swing_idx_ofdm_base; + u8 bb_swing_idx_ofdm_base_path[MAX_RF_PATH]; #endif boolean bb_swing_flag_ofdm; u8 bb_swing_idx_cck; @@ -223,6 +240,7 @@ struct dm_rf_calibration_struct { boolean modify_tx_agc_flag_path_c; boolean modify_tx_agc_flag_path_d; boolean modify_tx_agc_flag_path_a_cck; + boolean modify_tx_agc_flag_path_b_cck; s8 kfree_offset[MAX_RF_PATH]; @@ -269,8 +287,51 @@ struct dm_rf_calibration_struct { u8 is_ap_kdone; u8 is_apk_thermal_meter_ignore; u8 is_dp_done; +#if 0 /*move below members to halrf_dpk.h*/ u8 is_dp_path_aok; u8 is_dp_path_bok; + u8 is_dp_path_cok; + u8 is_dp_path_dok; + u8 dp_path_a_result[3]; + u8 dp_path_b_result[3]; + u8 dp_path_c_result[3]; + u8 dp_path_d_result[3]; + boolean is_dpk_enable; + u32 txrate[11]; + u8 pwsf_2g_a[3]; + u8 pwsf_2g_b[3]; + u8 pwsf_2g_c[3]; + u8 pwsf_2g_d[3]; + u32 lut_2g_even_a[3][64]; + u32 lut_2g_odd_a[3][64]; + u32 lut_2g_even_b[3][64]; + u32 lut_2g_odd_b[3][64]; + u32 lut_2g_even_c[3][64]; + u32 lut_2g_odd_c[3][64]; + u32 lut_2g_even_d[3][64]; + u32 lut_2g_odd_d[3][64]; + u1Byte is_5g_pdk_a_ok; + u1Byte is_5g_pdk_b_ok; + u1Byte is_5g_pdk_c_ok; + u1Byte is_5g_pdk_d_ok; + u1Byte pwsf_5g_a[9]; + u1Byte pwsf_5g_b[9]; + u1Byte pwsf_5g_c[9]; + u1Byte pwsf_5g_d[9]; + u4Byte lut_5g_even_a[9][16]; + u4Byte lut_5g_odd_a[9][16]; + u4Byte lut_5g_even_b[9][16]; + u4Byte lut_5g_odd_b[9][16]; + u4Byte lut_5g_even_c[9][16]; + u4Byte lut_5g_odd_c[9][16]; + u4Byte lut_5g_even_d[9][16]; + u4Byte lut_5g_odd_d[9][16]; + u8 thermal_value_dpk; + u8 thermal_value_dpk_avg[AVG_THERMAL_NUM_DPK]; + u8 thermal_value_dpk_avg_index; +#endif + s8 modify_tx_agc_value_ofdm; + s8 modify_tx_agc_value_cck; /*Add by Yuchen for Kfree Phydm*/ u8 reg_rf_kfree_enable; /*for registry*/ @@ -342,4 +403,4 @@ odm_txpowertracking_thermal_meter_check( -#endif +#endif /*#ifndef __HALRF_POWER_TRACKING_H__*/ diff --git a/hal/phydm/halrf/halrf_powertracking_ce.c b/hal/phydm/halrf/halrf_powertracking_ce.c index ab12c80..3bdf5ab 100644 --- a/hal/phydm/halrf/halrf_powertracking_ce.c +++ b/hal/phydm/halrf/halrf_powertracking_ce.c @@ -23,370 +23,386 @@ * *****************************************************************************/ -/*============================================================ */ -/* include files */ -/*============================================================ */ +/*@=========================================================== + * include files + *============================================================ + */ + #include "mp_precomp.h" #include "phydm_precomp.h" -/* ************************************************************ +/*@************************************************************ * Global var - * ************************************************************ */ + * ************************************************************ + */ -u32 ofdm_swing_table[OFDM_TABLE_SIZE] = { - 0x7f8001fe, /* 0, +6.0dB */ - 0x788001e2, /* 1, +5.5dB */ - 0x71c001c7, /* 2, +5.0dB*/ - 0x6b8001ae, /* 3, +4.5dB*/ - 0x65400195, /* 4, +4.0dB*/ - 0x5fc0017f, /* 5, +3.5dB*/ - 0x5a400169, /* 6, +3.0dB*/ - 0x55400155, /* 7, +2.5dB*/ - 0x50800142, /* 8, +2.0dB*/ - 0x4c000130, /* 9, +1.5dB*/ - 0x47c0011f, /* 10, +1.0dB*/ - 0x43c0010f, /* 11, +0.5dB*/ - 0x40000100, /* 12, +0dB*/ - 0x3c8000f2, /* 13, -0.5dB*/ - 0x390000e4, /* 14, -1.0dB*/ - 0x35c000d7, /* 15, -1.5dB*/ - 0x32c000cb, /* 16, -2.0dB*/ - 0x300000c0, /* 17, -2.5dB*/ - 0x2d4000b5, /* 18, -3.0dB*/ - 0x2ac000ab, /* 19, -3.5dB*/ - 0x288000a2, /* 20, -4.0dB*/ - 0x26000098, /* 21, -4.5dB*/ - 0x24000090, /* 22, -5.0dB*/ - 0x22000088, /* 23, -5.5dB*/ - 0x20000080, /* 24, -6.0dB*/ - 0x1e400079, /* 25, -6.5dB*/ - 0x1c800072, /* 26, -7.0dB*/ - 0x1b00006c, /* 27. -7.5dB*/ - 0x19800066, /* 28, -8.0dB*/ - 0x18000060, /* 29, -8.5dB*/ - 0x16c0005b, /* 30, -9.0dB*/ - 0x15800056, /* 31, -9.5dB*/ - 0x14400051, /* 32, -10.0dB*/ - 0x1300004c, /* 33, -10.5dB*/ - 0x12000048, /* 34, -11.0dB*/ - 0x11000044, /* 35, -11.5dB*/ - 0x10000040, /* 36, -12.0dB*/ +u32 ofdm_swing_table[OFDM_TABLE_SIZE] = { + 0x7f8001fe, /* 0, +6.0dB */ + 0x788001e2, /* 1, +5.5dB */ + 0x71c001c7, /* 2, +5.0dB*/ + 0x6b8001ae, /* 3, +4.5dB*/ + 0x65400195, /* 4, +4.0dB*/ + 0x5fc0017f, /* 5, +3.5dB*/ + 0x5a400169, /* 6, +3.0dB*/ + 0x55400155, /* 7, +2.5dB*/ + 0x50800142, /* 8, +2.0dB*/ + 0x4c000130, /* 9, +1.5dB*/ + 0x47c0011f, /* 10, +1.0dB*/ + 0x43c0010f, /* 11, +0.5dB*/ + 0x40000100, /* 12, +0dB*/ + 0x3c8000f2, /* 13, -0.5dB*/ + 0x390000e4, /* 14, -1.0dB*/ + 0x35c000d7, /* 15, -1.5dB*/ + 0x32c000cb, /* 16, -2.0dB*/ + 0x300000c0, /* 17, -2.5dB*/ + 0x2d4000b5, /* 18, -3.0dB*/ + 0x2ac000ab, /* 19, -3.5dB*/ + 0x288000a2, /* 20, -4.0dB*/ + 0x26000098, /* 21, -4.5dB*/ + 0x24000090, /* 22, -5.0dB*/ + 0x22000088, /* 23, -5.5dB*/ + 0x20000080, /* 24, -6.0dB*/ + 0x1e400079, /* 25, -6.5dB*/ + 0x1c800072, /* 26, -7.0dB*/ + 0x1b00006c, /* 27. -7.5dB*/ + 0x19800066, /* 28, -8.0dB*/ + 0x18000060, /* 29, -8.5dB*/ + 0x16c0005b, /* 30, -9.0dB*/ + 0x15800056, /* 31, -9.5dB*/ + 0x14400051, /* 32, -10.0dB*/ + 0x1300004c, /* 33, -10.5dB*/ + 0x12000048, /* 34, -11.0dB*/ + 0x11000044, /* 35, -11.5dB*/ + 0x10000040, /* 36, -12.0dB*/ }; -u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = { - {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */ - {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */ - {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB*/ - {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB*/ - {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */ - {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB*/ - {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB*/ - {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB*/ - {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */ - {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB*/ - {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */ - {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB*/ - {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB <== default */ - {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB*/ - {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */ - {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB*/ - {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ - {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB*/ - {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */ - {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB*/ - {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB*/ - {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB*/ - {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB*/ - {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB*/ - {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB*/ - {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB*/ - {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB*/ - {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB*/ - {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB*/ - {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB*/ - {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB*/ - {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB*/ - {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB*/ +u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = { + {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */ + {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */ + {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */ + {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */ + {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */ + {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */ + {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */ + {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */ + {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */ + {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */ + {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */ + {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */ + {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0 default*/ + {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */ + {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */ + {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */ + {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ + {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */ + {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */ + {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */ + {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */ + {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */ + {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */ + {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */ + {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */ + {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */ + {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */ + {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */ + {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */ + {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */ + {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */ + {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */ + {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */ }; - -u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8] = { - {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */ - {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */ - {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */ - {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB*/ - {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */ - {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB*/ - {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */ - {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */ - {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */ - {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB*/ - {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */ - {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB*/ - {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB <== default*/ - {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */ - {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */ - {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB*/ - {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ - {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB*/ - {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */ - {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB*/ - {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB*/ - {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB*/ - {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB*/ - {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB*/ - {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB*/ - {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB*/ - {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB*/ - {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB*/ - {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB*/ - {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB*/ - {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB*/ - {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB*/ - {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB*/ +u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8] = { + {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */ + {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */ + {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */ + {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */ + {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */ + {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */ + {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */ + {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */ + {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */ + {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */ + {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */ + {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */ + {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0 default*/ + {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */ + {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */ + {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */ + {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ + {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */ + {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */ + {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */ + {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */ + {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */ + {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */ + {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */ + {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */ + {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */ + {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */ + {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */ + {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */ + {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */ + {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */ + {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */ + {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */ }; - u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = { - 0x0b40002d, /* 0, -15.0dB */ - 0x0c000030, /* 1, -14.5dB*/ - 0x0cc00033, /* 2, -14.0dB*/ - 0x0d800036, /* 3, -13.5dB*/ + 0x0b40002d, /* 0, -15.0dB */ + 0x0c000030, /* 1, -14.5dB */ + 0x0cc00033, /* 2, -14.0dB */ + 0x0d800036, /* 3, -13.5dB */ 0x0e400039, /* 4, -13.0dB */ - 0x0f00003c, /* 5, -12.5dB*/ - 0x10000040, /* 6, -12.0dB*/ - 0x11000044, /* 7, -11.5dB*/ - 0x12000048, /* 8, -11.0dB*/ - 0x1300004c, /* 9, -10.5dB*/ - 0x14400051, /* 10, -10.0dB*/ - 0x15800056, /* 11, -9.5dB*/ - 0x16c0005b, /* 12, -9.0dB*/ - 0x18000060, /* 13, -8.5dB*/ - 0x19800066, /* 14, -8.0dB*/ - 0x1b00006c, /* 15, -7.5dB*/ - 0x1c800072, /* 16, -7.0dB*/ - 0x1e400079, /* 17, -6.5dB*/ - 0x20000080, /* 18, -6.0dB*/ - 0x22000088, /* 19, -5.5dB*/ - 0x24000090, /* 20, -5.0dB*/ - 0x26000098, /* 21, -4.5dB*/ - 0x288000a2, /* 22, -4.0dB*/ - 0x2ac000ab, /* 23, -3.5dB*/ - 0x2d4000b5, /* 24, -3.0dB*/ - 0x300000c0, /* 25, -2.5dB*/ - 0x32c000cb, /* 26, -2.0dB*/ - 0x35c000d7, /* 27, -1.5dB*/ - 0x390000e4, /* 28, -1.0dB*/ - 0x3c8000f2, /* 29, -0.5dB*/ - 0x40000100, /* 30, +0dB*/ - 0x43c0010f, /* 31, +0.5dB*/ - 0x47c0011f, /* 32, +1.0dB*/ - 0x4c000130, /* 33, +1.5dB*/ - 0x50800142, /* 34, +2.0dB*/ - 0x55400155, /* 35, +2.5dB*/ - 0x5a400169, /* 36, +3.0dB*/ - 0x5fc0017f, /* 37, +3.5dB*/ - 0x65400195, /* 38, +4.0dB*/ - 0x6b8001ae, /* 39, +4.5dB*/ - 0x71c001c7, /* 40, +5.0dB*/ - 0x788001e2, /* 41, +5.5dB*/ - 0x7f8001fe /* 42, +6.0dB*/ + 0x0f00003c, /* 5, -12.5dB */ + 0x10000040, /* 6, -12.0dB */ + 0x11000044, /* 7, -11.5dB */ + 0x12000048, /* 8, -11.0dB */ + 0x1300004c, /* 9, -10.5dB */ + 0x14400051, /* 10, -10.0dB */ + 0x15800056, /* 11, -9.5dB */ + 0x16c0005b, /* 12, -9.0dB */ + 0x18000060, /* 13, -8.5dB */ + 0x19800066, /* 14, -8.0dB */ + 0x1b00006c, /* 15, -7.5dB */ + 0x1c800072, /* 16, -7.0dB */ + 0x1e400079, /* 17, -6.5dB */ + 0x20000080, /* 18, -6.0dB */ + 0x22000088, /* 19, -5.5dB */ + 0x24000090, /* 20, -5.0dB */ + 0x26000098, /* 21, -4.5dB */ + 0x288000a2, /* 22, -4.0dB */ + 0x2ac000ab, /* 23, -3.5dB */ + 0x2d4000b5, /* 24, -3.0dB */ + 0x300000c0, /* 25, -2.5dB */ + 0x32c000cb, /* 26, -2.0dB */ + 0x35c000d7, /* 27, -1.5dB */ + 0x390000e4, /* 28, -1.0dB */ + 0x3c8000f2, /* 29, -0.5dB */ + 0x40000100, /* 30, +0dB */ + 0x43c0010f, /* 31, +0.5dB */ + 0x47c0011f, /* 32, +1.0dB */ + 0x4c000130, /* 33, +1.5dB */ + 0x50800142, /* 34, +2.0dB */ + 0x55400155, /* 35, +2.5dB */ + 0x5a400169, /* 36, +3.0dB */ + 0x5fc0017f, /* 37, +3.5dB */ + 0x65400195, /* 38, +4.0dB */ + 0x6b8001ae, /* 39, +4.5dB */ + 0x71c001c7, /* 40, +5.0dB */ + 0x788001e2, /* 41, +5.5dB */ + 0x7f8001fe /* 42, +6.0dB */ }; - u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = { - {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ - {0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ - {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ - {0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ - {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ - {0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ - {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ - {0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ - {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ - {0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ - {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ - {0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ - {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ - {0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ - {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ - {0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ - {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ - {0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ - {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ - {0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ - {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ + {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ + {0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ + {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ + {0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ + {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ + {0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ + {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ + {0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ + {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ + {0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ + {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ + {0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ + {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ + {0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ + {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ + {0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ + {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ + {0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ + {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ + {0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ + {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ }; - u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = { - {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ - {0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ - {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ - {0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ - {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ - {0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ - {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ - {0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ - {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ - {0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ - {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ - {0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ - {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ - {0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ - {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ - {0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ - {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ - {0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ - {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ - {0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ - {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ + {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ + {0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ + {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ + {0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ + {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ + {0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ + {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ + {0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ + {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ + {0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ + {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ + {0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ + {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ + {0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ + {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ + {0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ + {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ + {0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ + {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ + {0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ + {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ }; - u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = { - {0x44, 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ - {0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ - {0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ - {0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ - {0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ - {0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ - {0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ - {0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ - {0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ - {0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ - {0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ - {0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ - {0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ - {0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ - {0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ - {0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ - {0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ - {0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ - {0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ - {0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ - {0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ + {0x44, 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ + {0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ + {0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ + {0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ + {0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ + {0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ + {0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ + {0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ + {0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ + {0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ + {0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ + {0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ + {0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ + {0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ + {0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ + {0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ + {0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ + {0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ + {0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ + {0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ + {0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ }; - u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = { - {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, /* 0, -16.0dB*/ - {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 1, -15.5dB*/ - {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 2, -15.0dB*/ - {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 3, -14.5dB*/ - {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 4, -14.0dB*/ - {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 5, -13.5dB*/ - {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 6, -13.0dB*/ - {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 7, -12.5dB*/ - {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 8, -12.0dB*/ - {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 9, -11.5dB*/ - {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 10, -11.0dB*/ - {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 11, -10.5dB*/ - {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 12, -10.0dB*/ - {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 13, -9.5dB*/ - {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 14, -9.0dB */ - {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 15, -8.5dB*/ - {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ - {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 17, -7.5dB*/ - {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 18, -7.0dB */ - {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 19, -6.5dB*/ - {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /*20, -6.0dB */ - {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 21, -5.5dB*/ - {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 22, -5.0dB */ - {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 23, -4.5dB*/ - {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 24, -4.0dB */ - {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 25, -3.5dB*/ - {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 26, -3.0dB*/ - {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 27, -2.5dB*/ - {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 28, -2.0dB */ - {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 29, -1.5dB*/ - {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 30, -1.0dB*/ - {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 31, -0.5dB*/ - {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} /* 32, +0dB*/ + {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, /* 0, -16.0dB*/ + {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 1, -15.5dB*/ + {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 2, -15.0dB*/ + {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 3, -14.5dB*/ + {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 4, -14.0dB*/ + {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 5, -13.5dB*/ + {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 6, -13.0dB*/ + {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 7, -12.5dB*/ + {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 8, -12.0dB*/ + {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 9, -11.5dB*/ + {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 10, -11.0dB*/ + {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 11, -10.5dB*/ + {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 12, -10.0dB*/ + {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 13, -9.5dB*/ + {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 14, -9.0dB */ + {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 15, -8.5dB*/ + {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ + {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 17, -7.5dB*/ + {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 18, -7.0dB */ + {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 19, -6.5dB*/ + {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 20, -6.0dB */ + {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 21, -5.5dB*/ + {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 22, -5.0dB */ + {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 23, -4.5dB*/ + {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 24, -4.0dB */ + {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 25, -3.5dB*/ + {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 26, -3.0dB*/ + {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 27, -2.5dB*/ + {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 28, -2.0dB */ + {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 29, -1.5dB*/ + {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 30, -1.0dB*/ + {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 31, -0.5dB*/ + {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} /* 32, +0dB*/ }; - u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = { - {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, /* 0, -16.0dB*/ - {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 1, -15.5dB*/ - {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 2, -15.0dB*/ - {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 3, -14.5dB*/ - {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 4, -14.0dB*/ - {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /*5, -13.5dB*/ - {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 6, -13.0dB*/ - {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 7, -12.5dB*/ - {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 8, -12.0dB*/ - {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 9, -11.5dB*/ - {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 10, -11.0dB*/ - {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /*11, -10.5dB*/ - {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 12, -10.0dB*/ - {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 13, -9.5dB*/ - {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /*14, -9.0dB */ - {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 15, -8.5dB*/ - {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ - {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 17, -7.5dB*/ - {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 18, -7.0dB */ - {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 19, -6.5dB */ - {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 20, -6.0dB */ - {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 21, -5.5dB*/ - {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 22, -5.0dB */ - {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /*23, -4.5dB*/ - {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 24, -4.0dB */ - {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 25, -3.5dB */ - {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 26, -3.0dB */ - {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /*27, -2.5dB*/ - {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 28, -2.0dB */ - {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /*29, -1.5dB*/ - {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 30, -1.0dB */ - {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 31, -0.5dB */ - {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} /* 32, +0dB */ + {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, /* 0, -16.0dB*/ + {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 1, -15.5dB*/ + {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 2, -15.0dB*/ + {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 3, -14.5dB*/ + {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 4, -14.0dB*/ + {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /*5, -13.5dB*/ + {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 6, -13.0dB*/ + {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 7, -12.5dB*/ + {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 8, -12.0dB*/ + {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 9, -11.5dB*/ + {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 10, -11.0dB*/ + {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /*11, -10.5dB*/ + {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 12, -10.0dB*/ + {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 13, -9.5dB*/ + {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /*14, -9.0dB */ + {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 15, -8.5dB*/ + {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ + {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 17, -7.5dB*/ + {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 18, -7.0dB */ + {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 19, -6.5dB */ + {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 20, -6.0dB */ + {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 21, -5.5dB*/ + {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 22, -5.0dB */ + {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /*23, -4.5dB*/ + {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 24, -4.0dB */ + {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 25, -3.5dB */ + {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 26, -3.0dB */ + {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /*27, -2.5dB*/ + {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 28, -2.0dB */ + {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /*29, -1.5dB*/ + {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 30, -1.0dB */ + {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 31, -0.5dB */ + {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} /* 32, +0dB */ }; + u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = { - 0x0CD, /*0 , -20dB*/ - 0x0D9, - 0x0E6, - 0x0F3, - 0x102, - 0x111, - 0x121, - 0x132, - 0x144, - 0x158, - 0x16C, - 0x182, - 0x198, - 0x1B1, - 0x1CA, - 0x1E5, - 0x202, - 0x221, - 0x241, - 0x263, - 0x287, - 0x2AE, - 0x2D6, - 0x301, - 0x32F, - 0x35F, - 0x392, - 0x3C9, - 0x402, - 0x43F, - 0x47F, - 0x4C3, - 0x50C, - 0x558, - 0x5A9, - 0x5FF, - 0x65A, - 0x6BA, - 0x720, - 0x78C, - 0x7FF, -}; -/* JJ ADD 20161014 */ -u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = { - 0x0CD, /*0 , -20dB*/ + 0x0CD, /*0 , -20dB*/ 0x0D9, 0x0E6, 0x0F3, @@ -429,6 +445,95 @@ u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = { 0x7FF, }; +/*@JJ ADD 20161014 */ +u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = { + 0x0CD, /*0 , -20dB*/ + 0x0D9, + 0x0E6, + 0x0F3, + 0x102, + 0x111, + 0x121, + 0x132, + 0x144, + 0x158, + 0x16C, + 0x182, + 0x198, + 0x1B1, + 0x1CA, + 0x1E5, + 0x202, + 0x221, + 0x241, + 0x263, + 0x287, + 0x2AE, + 0x2D6, + 0x301, + 0x32F, + 0x35F, + 0x392, + 0x3C9, + 0x402, + 0x43F, + 0x47F, + 0x4C3, + 0x50C, + 0x558, + 0x5A9, + 0x5FF, + 0x65A, + 0x6BA, + 0x720, + 0x78C, + 0x7FF, +}; + +/*@Winnita ADD 20171116 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/ +u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = { + 0x0CD, /*0 , -20dB*/ + 0x0D9, + 0x0E6, + 0x0F3, + 0x102, + 0x111, + 0x121, + 0x132, + 0x144, + 0x158, + 0x16C, + 0x182, + 0x198, + 0x1B1, + 0x1CA, + 0x1E5, + 0x202, + 0x221, + 0x241, + 0x263, /*19*/ + 0x287, /*20*/ + 0x2AE, /*21*/ + 0x2D6, /*22*/ + 0x301, /*23*/ + 0x32F, /*24*/ + 0x35F, /*25*/ + 0x392, /*26*/ + 0x3C9, /*27*/ + 0x402, /*28*/ + 0x43F, /*29*/ + 0x47F, /*30*/ + 0x4C3, /*31*/ + 0x50C, /*32*/ + 0x558, /*33*/ + 0x5A9, /*34*/ + 0x5FF, /*35*/ + 0x65A, /*36*/ + 0x6BA, + 0x720, + 0x78C, + 0x7FF, +}; u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = { 0x081, /* 0, -12.0dB*/ @@ -459,7 +564,7 @@ u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = { 0x21E, /* 25, +0.5dB*/ 0x23E, /* 26, +1.0dB*/ 0x261, /* 27, +1.5dB*/ - 0x285,/* 28, +2.0dB*/ + 0x285, /* 28, +2.0dB*/ 0x2AB, /* 29, +2.5dB*/ 0x2D3, /*30, +3.0dB*/ 0x2FE, /* 31, +3.5dB*/ @@ -467,90 +572,92 @@ u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = { 0x35C, /* 33, +4.5dB*/ 0x38E, /* 34, +5.0dB*/ 0x3C4, /* 35, +5.5dB*/ - 0x3FE /* 36, +6.0dB */ + 0x3FE /* 36, +6.0dB */ }; -void -odm_txpowertracking_init( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - if (!(dm->support_ic_type & (ODM_RTL8814A | ODM_IC_11N_SERIES | ODM_RTL8822B))) - return; +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) +#else +u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, + 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, + 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; +u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, + 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, + 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; #endif +void odm_txpowertracking_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + odm_txpowertracking_thermal_meter_init(dm); } -u8 -get_swing_index( - void *dm_void -) +u8 get_swing_index(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); #endif - u8 i = 0; - u32 bb_swing; - u32 swing_table_size; - u32 *swing_table; + u8 i = 0; + u32 bb_swing, table_value; - if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B - || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8710B - ) { - bb_swing = odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0xFFC00000); + if (dm->support_ic_type & + (ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E | + ODM_RTL8188F | ODM_RTL8703B | ODM_RTL8723D | + ODM_RTL8710B | ODM_RTL8821)) { +#if (RTL8821A_SUPPORT == 1) + bb_swing = + phy_get_tx_bb_swing_8812a(adapter, + hal_data->current_band_type, + RF_PATH_A); +#else + bb_swing = odm_get_bb_reg(dm, R_0xc80, 0xFFC00000); +#endif + for (i = 0; i < OFDM_TABLE_SIZE; i++) { + table_value = ofdm_swing_table_new[i]; - swing_table = ofdm_swing_table_new; - swing_table_size = OFDM_TABLE_SIZE; + if (table_value >= 0x100000) + table_value >>= 22; + if (bb_swing == table_value) + break; + } } else { -#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) - if (dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8821) { - bb_swing = phy_get_tx_bb_swing_8812a(adapter, hal_data->current_band_type, RF_PATH_A); - swing_table = tx_scaling_table_jaguar; - swing_table_size = TXSCALE_TABLE_SIZE; - } else +#if (RTL8812A_SUPPORT == 1) + bb_swing = + phy_get_tx_bb_swing_8812a(adapter, + hal_data->current_band_type, + RF_PATH_A); +#else + bb_swing = odm_get_bb_reg(dm, R_0xc1c, 0xFFE00000); #endif - { - bb_swing = 0; - swing_table = ofdm_swing_table; - swing_table_size = OFDM_TABLE_SIZE; + for (i = 0; i < TXSCALE_TABLE_SIZE; i++) { + table_value = tx_scaling_table_jaguar[i]; + + if (bb_swing == table_value) + break; } } - for (i = 0; i < swing_table_size; ++i) { - u32 table_value = swing_table[i]; - - if (table_value >= 0x100000) - table_value >>= 22; - if (bb_swing == table_value) - break; - } return i; } -u8 -get_cck_swing_index( - void *dm_void -) +u8 get_cck_swing_index(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i = 0; - u32 bb_cck_swing; + u8 i = 0; + u32 bb_cck_swing; - if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B || - dm->support_ic_type == ODM_RTL8192E) { + if (dm->support_ic_type & + (ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E)) { bb_cck_swing = odm_read_1byte(dm, 0xa22); for (i = 0; i < CCK_TABLE_SIZE; i++) { if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0]) break; } - } else if (dm->support_ic_type == ODM_RTL8703B) { + } else if (dm->support_ic_type & ODM_RTL8703B) { bb_cck_swing = odm_read_1byte(dm, 0xa22); for (i = 0; i < CCK_TABLE_SIZE_88F; i++) { @@ -562,85 +669,83 @@ get_cck_swing_index( return i; } - -void -odm_txpowertracking_thermal_meter_init( - void *dm_void -) +void odm_txpowertracking_thermal_meter_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 default_swing_index = get_swing_index(dm); - u8 default_cck_swing_index = get_cck_swing_index(dm); - u8 p = 0; - struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); - - if (*dm->mp_mode == false) - hal_data->txpowertrack_control = true; -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -#ifdef DM_ODM_CE_MAC80211 - struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; - struct rtl_efuse *rtlefu = rtl_efuse(rtlpriv); -#else - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + struct _hal_rf_ *rf = &dm->rf_table; +#if (RTL8822C_SUPPORT == 1) + struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; #endif + u8 swing_idx = get_swing_index(dm); + u8 cckswing_idx = get_cck_swing_index(dm); + u8 p = 0; + cali_info->is_txpowertracking = true; cali_info->tx_powercount = 0; cali_info->is_txpowertracking_init = false; - if (*dm->mp_mode == false) + if (!(*dm->mp_mode)) cali_info->txpowertrack_control = true; else cali_info->txpowertrack_control = false; - if (*dm->mp_mode == false) + if (!(*dm->mp_mode)) cali_info->txpowertrack_control = true; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "dm txpowertrack_control = %d\n", cali_info->txpowertrack_control); + RF_DBG(dm, DBG_RF_IQK, "dm txpowertrack_control = %d\n", + cali_info->txpowertrack_control); +#if 0 + /* dm->rf_calibrate_info.txpowertrack_control = true; */ +#endif + cali_info->thermal_value = rf->eeprom_thermal; + cali_info->thermal_value_iqk = rf->eeprom_thermal; + cali_info->thermal_value_lck = rf->eeprom_thermal; -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -#ifdef RTL8188E_SUPPORT - { - cali_info->is_txpowertracking = true; - cali_info->tx_powercount = 0; - cali_info->is_txpowertracking_init = false; - cali_info->txpowertrack_control = true; +#if (RTL8822C_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8822C) { + cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A]; + cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B]; + cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A]; + cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A]; } -#endif #endif - /* dm->rf_calibrate_info.txpowertrack_control = true; */ -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - cali_info->thermal_value = rtlefu->eeprom_thermalmeter; - cali_info->thermal_value_iqk = rtlefu->eeprom_thermalmeter; - cali_info->thermal_value_lck = rtlefu->eeprom_thermalmeter; -#else - cali_info->thermal_value = hal_data->eeprom_thermal_meter; - cali_info->thermal_value_iqk = hal_data->eeprom_thermal_meter; - cali_info->thermal_value_lck = hal_data->eeprom_thermal_meter; -#endif + if (!cali_info->default_bb_swing_index_flag) { + if (dm->support_ic_type & + (ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E | + ODM_RTL8703B | ODM_RTL8821)) { + if (swing_idx >= OFDM_TABLE_SIZE) + cali_info->default_ofdm_index = 30; + else + cali_info->default_ofdm_index = swing_idx; - if (cali_info->default_bb_swing_index_flag != true) { - /*The index of "0 dB" in SwingTable.*/ - if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B || - dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8703B) { - cali_info->default_ofdm_index = (default_swing_index >= OFDM_TABLE_SIZE) ? 30 : default_swing_index; - cali_info->default_cck_index = (default_cck_swing_index >= CCK_TABLE_SIZE) ? 20 : default_cck_swing_index; - } else if (dm->support_ic_type == ODM_RTL8188F) { /*add by Mingzhi.Guo 2015-03-23*/ - cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ - cali_info->default_cck_index = 20; /*CCK:-6dB*/ - } else if (dm->support_ic_type == ODM_RTL8723D) { /*add by zhaohe 2015-10-27*/ - cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ - cali_info->default_cck_index = 28; /*CCK: -6dB*/ - } else if (dm->support_ic_type == ODM_RTL8710B) { /* JJ ADD 20161014 */ - cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ - cali_info->default_cck_index = 28; /*CCK: -6dB*/ + if (cckswing_idx >= CCK_TABLE_SIZE) + cali_info->default_cck_index = 20; + else + cali_info->default_cck_index = cckswing_idx; + /*@add by Mingzhi.Guo 2015-03-23*/ + } else if (dm->support_ic_type == ODM_RTL8188F) { + cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ + cali_info->default_cck_index = 20; /*CCK:-6dB*/ + /*@add by zhaohe 2015-10-27*/ + } else if (dm->support_ic_type == ODM_RTL8723D) { + cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ + cali_info->default_cck_index = 28; /*CCK: -6dB*/ + /*@JJ ADD 20161014 */ + } else if (dm->support_ic_type == ODM_RTL8710B) { + cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ + cali_info->default_cck_index = 28; /*CCK: -6dB*/ + } else if (dm->support_ic_type == ODM_RTL8192F) { + cali_info->default_ofdm_index = 30;/*OFDM: 0dB*/ + cali_info->default_cck_index = 28; /*CCK: -6dB*/ } else { - cali_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index; + if (swing_idx >= TXSCALE_TABLE_SIZE) + cali_info->default_ofdm_index = 24; + else + cali_info->default_ofdm_index = swing_idx; + cali_info->default_cck_index = 24; } cali_info->default_bb_swing_index_flag = true; @@ -650,7 +755,8 @@ odm_txpowertracking_thermal_meter_init( cali_info->CCK_index = cali_info->default_cck_index; for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) { - cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index; + cali_info->bb_swing_idx_ofdm_base[p] = + cali_info->default_ofdm_index; cali_info->OFDM_index[p] = cali_info->default_ofdm_index; cali_info->delta_power_index[p] = 0; cali_info->delta_power_index_last[p] = 0; @@ -661,99 +767,155 @@ odm_txpowertracking_thermal_meter_init( cali_info->tm_trigger = 0; } - -void -odm_txpowertracking_check( - void *dm_void -) +void odm_txpowertracking_check(void *dm_void) { - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate - at the same time. In the stage2/3, we need to prive universal interface and merge all - HW dynamic mechanism. */ - struct dm_struct *dm = (struct dm_struct *)dm_void; - switch (dm->support_platform) { - case ODM_WIN: + /*@2011/09/29 MH In HW integration first stage + * we provide 4 different handle to operate at the same time. + * In the stage2/3, we need to prive universal interface and merge all + * HW dynamic mechanism. + */ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + switch (dm->support_platform) { + case ODM_WIN: odm_txpowertracking_check_mp(dm); break; - case ODM_CE: + case ODM_CE: odm_txpowertracking_check_ce(dm); break; - case ODM_AP: + case ODM_AP: odm_txpowertracking_check_ap(dm); break; default: break; } - } -void -odm_txpowertracking_check_ce( - void *dm_void -) +void odm_txpowertracking_check_ce(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _hal_rf_ *rf = &dm->rf_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; +#if (RTL8822C_SUPPORT == 1) + struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; +#endif + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - void *adapter = dm->adapter; - - if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) return; + if (dm->support_ic_type & ODM_RTL8814B) + return; + + if ((rf->power_track_type & 0xf0) >> 4 != 0) { + if (dm->support_ic_type & ODM_RTL8822C) { + /*halrf_tssi_cck(dm);*/ + /*halrf_thermal_cck(dm);*/ + return; + } + } + if (!dm->rf_calibrate_info.tm_trigger) { if (dm->support_ic_type & - (ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8192E | - ODM_RTL8723B | ODM_RTL8812 | ODM_RTL8821 | - ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8723D | - ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8710B)) - odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03); - else - odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_OLD, RFREGOFFSETMASK, 0x60); - - + (ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8192E | + ODM_RTL8723B | ODM_RTL8812 | ODM_RTL8821 | + ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8723D | + ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8710B | + ODM_RTL8192F)) + odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, + (BIT(17) | BIT(16)), 0x03); + else if (dm->support_ic_type & ODM_RTL8822C) { + odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); + odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00); + odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); + + odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); + odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00); + odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); + } else + odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_OLD, + RFREGOFFSETMASK, 0x60); dm->rf_calibrate_info.tm_trigger = 1; return; - } else { - odm_txpowertracking_callback_thermal_meter(dm); - dm->rf_calibrate_info.tm_trigger = 0; } - + + if (dm->support_ic_type & ODM_RTL8822C) { +#if (RTL8822C_SUPPORT == 1) + odm_txpowertracking_new_callback_thermal_meter(dm); +#endif + } else + odm_txpowertracking_callback_thermal_meter(dm); + dm->rf_calibrate_info.tm_trigger = 0; #endif } void -odm_txpowertracking_check_mp( - void *dm_void -) +odm_txpowertracking_direct_ce(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + + if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) + return; + + if (dm->support_ic_type & ODM_RTL8814B) + return; + + if (dm->support_ic_type & ODM_RTL8822C) { + /*halrf_tssi_cck(dm);*/ + /*halrf_thermal_cck(dm);*/ + return; + } + + if (dm->support_ic_type & + (ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8192E | + ODM_RTL8723B | ODM_RTL8812 | ODM_RTL8821 | + ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8723D | + ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8710B | + ODM_RTL8192F)) + odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03); + else if (dm->support_ic_type & ODM_RTL8822C) { + odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); + odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00); + odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); + + odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); + odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00); + odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); + } else + odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_OLD, RFREGOFFSETMASK, 0x60); + + odm_txpowertracking_callback_thermal_meter(dm); +#endif + +} + + +void odm_txpowertracking_check_mp(void *dm_void) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct dm_struct *dm = (struct dm_struct *)dm_void; - void *adapter = dm->adapter; + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *adapter = dm->adapter; if (odm_check_power_status(adapter) == false) { - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("check_pow_status, return false\n")); + RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, + ("check_pow_status, return false\n")); return; } odm_txpowertracking_thermal_meter_check(adapter); #endif - } - -void -odm_txpowertracking_check_ap( - void *dm_void -) +void odm_txpowertracking_check_ap(void *dm_void) { #if (DM_ODM_SUPPORT_TYPE == ODM_AP) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rtl8192cd_priv *priv = dm->priv; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rtl8192cd_priv *priv = dm->priv; return; diff --git a/hal/phydm/halrf/halrf_powertracking_ce.h b/hal/phydm/halrf/halrf_powertracking_ce.h index 1fef265..2f3067a 100644 --- a/hal/phydm/halrf/halrf_powertracking_ce.h +++ b/hal/phydm/halrf/halrf_powertracking_ce.h @@ -23,326 +23,308 @@ * *****************************************************************************/ -#ifndef __PHYDMPOWERTRACKING_H__ -#define __PHYDMPOWERTRACKING_H__ +#ifndef __HALRF_POWERTRACKING_H__ +#define __HALRF_POWERTRACKING_H__ -#define DPK_DELTA_MAPPING_NUM 13 -#define index_mapping_HP_NUM 15 -#define OFDM_TABLE_SIZE 43 -#define CCK_TABLE_SIZE 33 -#define CCK_TABLE_SIZE_88F 21 -#define TXSCALE_TABLE_SIZE 37 -#define CCK_TABLE_SIZE_8723D 41 -/* JJ ADD 20161014 */ -#define CCK_TABLE_SIZE_8710B 41 +#define DPK_DELTA_MAPPING_NUM 13 +#define index_mapping_HP_NUM 15 +#define OFDM_TABLE_SIZE 43 +#define CCK_TABLE_SIZE 33 +#define CCK_TABLE_SIZE_88F 21 +#define TXSCALE_TABLE_SIZE 37 +#define CCK_TABLE_SIZE_8723D 41 +/*@JJ ADD 20161014 */ +#define CCK_TABLE_SIZE_8710B 41 +#define CCK_TABLE_SIZE_8192F 41 -#define TXPWR_TRACK_TABLE_SIZE 30 -#define DELTA_SWINGIDX_SIZE 30 -#define DELTA_SWINTSSI_SIZE 61 -#define BAND_NUM 4 +#define TXPWR_TRACK_TABLE_SIZE 30 +#define DELTA_SWINGIDX_SIZE 30 +#define DELTA_SWINTSSI_SIZE 61 +#define BAND_NUM 4 -#define AVG_THERMAL_NUM 8 -#define IQK_MAC_REG_NUM 4 -#define IQK_ADDA_REG_NUM 16 -#define IQK_BB_REG_NUM_MAX 10 +#define AVG_THERMAL_NUM 8 +#define IQK_MAC_REG_NUM 4 +#define IQK_ADDA_REG_NUM 16 +#define IQK_BB_REG_NUM_MAX 10 -#define IQK_BB_REG_NUM 9 +#define IQK_BB_REG_NUM 9 - - -#define iqk_matrix_reg_num 8 +#define iqk_matrix_reg_num 8 #if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) #else -#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */ +/* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */ +#define IQK_MATRIX_SETTINGS_NUM (14 + 24 + 21) #endif -extern u32 ofdm_swing_table[OFDM_TABLE_SIZE]; -extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8]; -extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8]; +extern u32 ofdm_swing_table[OFDM_TABLE_SIZE]; +extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8]; +extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8]; -extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE]; -extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8]; -extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8]; -extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16]; -extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16]; -extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16]; -extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D]; -/* JJ ADD 20161014 */ -extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B]; +extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE]; +extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8]; +extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8]; +extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16]; +extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16]; +extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16]; +extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D]; +/*@JJ ADD 20161014 */ +extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B]; +extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F]; -extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE]; +extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE]; -/* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */ +/*@<20121018, Kordan> In case fail to read TxPowerTrack.txt */ +/* we use the table of 88E as the default table. */ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) #else -static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; -static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; +extern u8 delta_swing_table_idx_2ga_p_8188e[]; +extern u8 delta_swing_table_idx_2ga_n_8188e[]; #endif -#define dm_check_txpowertracking odm_txpowertracking_check +#define dm_check_txpowertracking odm_txpowertracking_check struct iqk_matrix_regs_setting { - boolean is_iqk_done; - s32 value[3][iqk_matrix_reg_num]; - boolean is_bw_iqk_result_saved[3]; + boolean is_iqk_done; + s32 value[3][iqk_matrix_reg_num]; + boolean is_bw_iqk_result_saved[3]; }; struct dm_rf_calibration_struct { /* for tx power tracking */ - u32 rega24; /* for TempCCK */ - s32 rege94; - s32 rege9c; - s32 regeb4; - s32 regebc; + u32 rega24; /* for TempCCK */ + s32 rege94; + s32 rege9c; + s32 regeb4; + s32 regebc; - u8 tx_powercount; + u8 tx_powercount; boolean is_txpowertracking_init; boolean is_txpowertracking; - u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */ - u8 tm_trigger; - u8 internal_pa_5g[2]; /* pathA / pathB */ + /* for mp mode, turn off txpwrtracking as default */ + u8 txpowertrack_control; + u8 tm_trigger; + u8 internal_pa_5g[2]; /* pathA / pathB */ - u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */ - u8 thermal_value; - u8 thermal_value_lck; - u8 thermal_value_iqk; - s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */ - u8 thermal_value_dpk; - u8 thermal_value_avg[AVG_THERMAL_NUM]; - u8 thermal_value_avg_index; - u8 thermal_value_rx_gain; - u8 thermal_value_crystal; - u8 thermal_value_dpk_store; - u8 thermal_value_dpk_track; - boolean txpowertracking_in_progress; + /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */ + u8 thermal_meter[2]; + u8 thermal_value; + u8 thermal_value_path[MAX_RF_PATH]; + u8 thermal_value_lck; + u8 thermal_value_iqk; + s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */ + u8 thermal_value_dpk; + u8 thermal_value_avg[AVG_THERMAL_NUM]; + u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM]; + u8 thermal_value_avg_index; + u8 thermal_value_avg_index_path[MAX_RF_PATH]; + u8 thermal_value_rx_gain; + u8 thermal_value_crystal; + u8 thermal_value_dpk_store; + u8 thermal_value_dpk_track; + boolean txpowertracking_in_progress; - boolean is_reloadtxpowerindex; - u8 is_rf_pi_enable; - u32 txpowertracking_callback_cnt; /* cosa add for debug */ + boolean is_reloadtxpowerindex; + u8 is_rf_pi_enable; + u32 txpowertracking_callback_cnt; /* cosa add for debug */ - - /* ------------------------- Tx power Tracking ------------------------- */ - u8 is_cck_in_ch14; - u8 CCK_index; - u8 OFDM_index[MAX_RF_PATH]; - s8 power_index_offset[MAX_RF_PATH]; - s8 delta_power_index[MAX_RF_PATH]; - s8 delta_power_index_last[MAX_RF_PATH]; + /*@---------------------- Tx power Tracking ---------------------- */ + u8 is_cck_in_ch14; + u8 CCK_index; + u8 OFDM_index[MAX_RF_PATH]; + s8 power_index_offset[MAX_RF_PATH]; + s8 delta_power_index[MAX_RF_PATH]; + s8 delta_power_index_last[MAX_RF_PATH]; boolean is_tx_power_changed; - s8 xtal_offset; - s8 xtal_offset_last; + s8 xtal_offset; + s8 xtal_offset_last; + u8 xtal_offset_eanble; - struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM]; - u8 delta_lck; - s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */ - u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE]; - s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE]; - s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE]; + struct iqk_matrix_regs_setting + iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM]; + u8 delta_lck; + s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */ + u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE]; + s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE]; + s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE]; - u8 bb_swing_idx_ofdm[MAX_RF_PATH]; - u8 bb_swing_idx_ofdm_current; + u8 bb_swing_idx_ofdm[MAX_RF_PATH]; + u8 bb_swing_idx_ofdm_current; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - u8 bb_swing_idx_ofdm_base[MAX_RF_PATH]; + u8 bb_swing_idx_ofdm_base[MAX_RF_PATH]; #else - u8 bb_swing_idx_ofdm_base; + u8 bb_swing_idx_ofdm_base; #endif - boolean default_bb_swing_index_flag; - boolean bb_swing_flag_ofdm; - u8 bb_swing_idx_cck; - u8 bb_swing_idx_cck_current; - u8 bb_swing_idx_cck_base; - u8 default_ofdm_index; - u8 default_cck_index; - boolean bb_swing_flag_cck; + boolean default_bb_swing_index_flag; + boolean bb_swing_flag_ofdm; + u8 bb_swing_idx_cck; + u8 bb_swing_idx_cck_current; + u8 bb_swing_idx_cck_base; + u8 default_ofdm_index; + u8 default_cck_index; + boolean bb_swing_flag_cck; - s8 absolute_ofdm_swing_idx[MAX_RF_PATH]; - s8 remnant_ofdm_swing_idx[MAX_RF_PATH]; - s8 absolute_cck_swing_idx[MAX_RF_PATH]; - s8 remnant_cck_swing_idx; - s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */ - boolean modify_tx_agc_flag_path_a; - boolean modify_tx_agc_flag_path_b; - boolean modify_tx_agc_flag_path_c; - boolean modify_tx_agc_flag_path_d; - boolean modify_tx_agc_flag_path_a_cck; + s8 absolute_ofdm_swing_idx[MAX_RF_PATH]; + s8 remnant_ofdm_swing_idx[MAX_RF_PATH]; + s8 absolute_cck_swing_idx[MAX_RF_PATH]; + s8 remnant_cck_swing_idx; + s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */ + boolean modify_tx_agc_flag_path_a; + boolean modify_tx_agc_flag_path_b; + boolean modify_tx_agc_flag_path_c; + boolean modify_tx_agc_flag_path_d; + boolean modify_tx_agc_flag_path_a_cck; + boolean modify_tx_agc_flag_path_b_cck; - s8 kfree_offset[MAX_RF_PATH]; + s8 kfree_offset[MAX_RF_PATH]; - /* -------------------------------------------------------------------- */ + /*@----------------------------------------------------------------- */ /* for IQK */ - u32 regc04; - u32 reg874; - u32 regc08; - u32 regb68; - u32 regb6c; - u32 reg870; - u32 reg860; - u32 reg864; + u32 regc04; + u32 reg874; + u32 regc08; + u32 regb68; + u32 regb6c; + u32 reg870; + u32 reg860; + u32 reg864; - boolean is_iqk_initialized; + boolean is_iqk_initialized; boolean is_lck_in_progress; - boolean is_antenna_detected; - boolean is_need_iqk; - boolean is_iqk_in_progress; + boolean is_antenna_detected; + boolean is_need_iqk; + boolean is_iqk_in_progress; boolean is_iqk_pa_off; - u8 delta_iqk; - u32 ADDA_backup[IQK_ADDA_REG_NUM]; - u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; - u32 IQK_BB_backup_recover[9]; - u32 IQK_BB_backup[IQK_BB_REG_NUM]; - u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ - u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ - u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ - u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ - u32 tx_iqc_8723d[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ - u32 rx_iqc_8723d[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ + u8 delta_iqk; + u32 ADDA_backup[IQK_ADDA_REG_NUM]; + u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; + u32 IQK_BB_backup_recover[9]; + u32 IQK_BB_backup[IQK_BB_REG_NUM]; + /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ + u32 tx_iqc_8723b[2][3][2]; + /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ + u32 rx_iqc_8723b[2][2][2]; + /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ + u32 tx_iqc_8703b[3][2]; + /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ + u32 rx_iqc_8703b[2][2]; + /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ + u32 tx_iqc_8723d[2][3][2]; + /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ + u32 rx_iqc_8723d[2][2][2]; /* JJ ADD 20161014 */ - u32 tx_iqc_8710b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ - u32 rx_iqc_8710b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ + /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ + u32 tx_iqc_8710b[2][3][2]; + /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ + u32 rx_iqc_8710b[2][2][2]; - u8 iqk_step; - u8 kcount; - u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */ - boolean is_mp_mode; + u8 iqk_step; + u8 kcount; + u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */ + boolean is_mp_mode; - - - /* IQK time measurement */ - u64 iqk_start_time; - u64 iqk_progressing_time; - u64 iqk_total_progressing_time; + /*@ IQK time measurement */ + u64 iqk_start_time; + u64 iqk_progressing_time; + u64 iqk_total_progressing_time; u64 lck_progressing_time; - u32 lok_result; + u32 lok_result; /* for APK */ - u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */ - u8 is_ap_kdone; - u8 is_apk_thermal_meter_ignore; + u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */ + u8 is_ap_kdone; + u8 is_apk_thermal_meter_ignore; /* DPK */ boolean is_dpk_fail; - u8 is_dp_done; - u8 is_dp_path_aok; - u8 is_dp_path_bok; + u8 is_dp_done; + u8 is_dp_path_aok; + u8 is_dp_path_bok; - u32 tx_lok[2]; - u32 dpk_tx_agc; - s32 dpk_gain; - u32 dpk_thermal[4]; + u32 tx_lok[2]; + u32 dpk_tx_agc; + s32 dpk_gain; + u32 dpk_thermal[4]; s8 modify_tx_agc_value_ofdm; s8 modify_tx_agc_value_cck; - /*Add by Yuchen for Kfree Phydm*/ - u8 reg_rf_kfree_enable; /*for registry*/ - u8 rf_kfree_enable; /*for efuse enable check*/ - + /*@Add by Yuchen for Kfree Phydm*/ + u8 reg_rf_kfree_enable; /*for registry*/ + u8 rf_kfree_enable; /*for efuse enable check*/ }; +void odm_txpowertracking_check(void *dm_void); -void -odm_txpowertracking_check( - void *dm_void -); +void odm_txpowertracking_init(void *dm_void); +void odm_txpowertracking_check_ap(void *dm_void); -void -odm_txpowertracking_init( - void *dm_void -); +void odm_txpowertracking_thermal_meter_init(void *dm_void); -void -odm_txpowertracking_check_ap( - void *dm_void -); +void odm_txpowertracking_init(void *dm_void); -void -odm_txpowertracking_thermal_meter_init( - void *dm_void -); +void odm_txpowertracking_check_mp(void *dm_void); -void -odm_txpowertracking_init( - void *dm_void -); +void odm_txpowertracking_check_ce(void *dm_void); -void -odm_txpowertracking_check_mp( - void *dm_void -); - - -void -odm_txpowertracking_check_ce( - void *dm_void -); +void odm_txpowertracking_direct_ce(void *dm_void); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -void -odm_txpowertracking_callback_thermal_meter92c( - void *adapter -); +void odm_txpowertracking_callback_thermal_meter92c( + void *adapter); -void -odm_txpowertracking_callback_rx_gain_thermal_meter92d( - void *adapter -); +void odm_txpowertracking_callback_rx_gain_thermal_meter92d( + void *adapter); -void -odm_txpowertracking_callback_thermal_meter92d( - void *adapter -); +void odm_txpowertracking_callback_thermal_meter92d( + void *adapter); -void -odm_txpowertracking_direct_call92c( - void *adapter -); +void odm_txpowertracking_direct_call92c( + void *adapter); -void -odm_txpowertracking_thermal_meter_check( - void *adapter -); +void odm_txpowertracking_thermal_meter_check( + void *adapter); #endif -#endif +#endif /*__HALRF_POWER_TRACKING_H__*/ diff --git a/hal/phydm/halrf/halrf_powertracking_iot.c b/hal/phydm/halrf/halrf_powertracking_iot.c new file mode 100644 index 0000000..c49d547 --- /dev/null +++ b/hal/phydm/halrf/halrf_powertracking_iot.c @@ -0,0 +1,741 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +/*============================================================ */ +/* include files */ +/*============================================================ */ +#include "mp_precomp.h" +#include "phydm_precomp.h" + +/* ************************************************************ + * Global var + * ************************************************************ + */ + +u32 ofdm_swing_table[OFDM_TABLE_SIZE] = { + 0x7f8001fe, /* 0, +6.0dB */ + 0x788001e2, /* 1, +5.5dB */ + 0x71c001c7, /* 2, +5.0dB*/ + 0x6b8001ae, /* 3, +4.5dB*/ + 0x65400195, /* 4, +4.0dB*/ + 0x5fc0017f, /* 5, +3.5dB*/ + 0x5a400169, /* 6, +3.0dB*/ + 0x55400155, /* 7, +2.5dB*/ + 0x50800142, /* 8, +2.0dB*/ + 0x4c000130, /* 9, +1.5dB*/ + 0x47c0011f, /* 10, +1.0dB*/ + 0x43c0010f, /* 11, +0.5dB*/ + 0x40000100, /* 12, +0dB*/ + 0x3c8000f2, /* 13, -0.5dB*/ + 0x390000e4, /* 14, -1.0dB*/ + 0x35c000d7, /* 15, -1.5dB*/ + 0x32c000cb, /* 16, -2.0dB*/ + 0x300000c0, /* 17, -2.5dB*/ + 0x2d4000b5, /* 18, -3.0dB*/ + 0x2ac000ab, /* 19, -3.5dB*/ + 0x288000a2, /* 20, -4.0dB*/ + 0x26000098, /* 21, -4.5dB*/ + 0x24000090, /* 22, -5.0dB*/ + 0x22000088, /* 23, -5.5dB*/ + 0x20000080, /* 24, -6.0dB*/ + 0x1e400079, /* 25, -6.5dB*/ + 0x1c800072, /* 26, -7.0dB*/ + 0x1b00006c, /* 27. -7.5dB*/ + 0x19800066, /* 28, -8.0dB*/ + 0x18000060, /* 29, -8.5dB*/ + 0x16c0005b, /* 30, -9.0dB*/ + 0x15800056, /* 31, -9.5dB*/ + 0x14400051, /* 32, -10.0dB*/ + 0x1300004c, /* 33, -10.5dB*/ + 0x12000048, /* 34, -11.0dB*/ + 0x11000044, /* 35, -11.5dB*/ + 0x10000040, /* 36, -12.0dB*/ +}; + +u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = { + {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */ + {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */ + {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB*/ + {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB*/ + {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */ + {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB*/ + {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB*/ + {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB*/ + {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */ + {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB*/ + {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */ + {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB*/ + {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB <== default */ + {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB*/ + {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */ + {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB*/ + {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ + {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB*/ + {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */ + {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB*/ + {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB*/ + {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB*/ + {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB*/ + {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB*/ + {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB*/ + {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB*/ + {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB*/ + {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB*/ + {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB*/ + {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB*/ + {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB*/ + {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB*/ + {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB*/ +}; + +u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8] = { + {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */ + {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */ + {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */ + {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB*/ + {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */ + {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB*/ + {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */ + {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */ + {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */ + {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB*/ + {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */ + {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB*/ + {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB <== default*/ + {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */ + {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */ + {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB*/ + {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ + {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB*/ + {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */ + {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB*/ + {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB*/ + {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB*/ + {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB*/ + {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB*/ + {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB*/ + {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB*/ + {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB*/ + {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB*/ + {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB*/ + {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB*/ + {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB*/ + {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB*/ + {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB*/ +}; + +u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = { + 0x0b40002d, /* 0, -15.0dB */ + 0x0c000030, /* 1, -14.5dB*/ + 0x0cc00033, /* 2, -14.0dB*/ + 0x0d800036, /* 3, -13.5dB*/ + 0x0e400039, /* 4, -13.0dB */ + 0x0f00003c, /* 5, -12.5dB*/ + 0x10000040, /* 6, -12.0dB*/ + 0x11000044, /* 7, -11.5dB*/ + 0x12000048, /* 8, -11.0dB*/ + 0x1300004c, /* 9, -10.5dB*/ + 0x14400051, /* 10, -10.0dB*/ + 0x15800056, /* 11, -9.5dB*/ + 0x16c0005b, /* 12, -9.0dB*/ + 0x18000060, /* 13, -8.5dB*/ + 0x19800066, /* 14, -8.0dB*/ + 0x1b00006c, /* 15, -7.5dB*/ + 0x1c800072, /* 16, -7.0dB*/ + 0x1e400079, /* 17, -6.5dB*/ + 0x20000080, /* 18, -6.0dB*/ + 0x22000088, /* 19, -5.5dB*/ + 0x24000090, /* 20, -5.0dB*/ + 0x26000098, /* 21, -4.5dB*/ + 0x288000a2, /* 22, -4.0dB*/ + 0x2ac000ab, /* 23, -3.5dB*/ + 0x2d4000b5, /* 24, -3.0dB*/ + 0x300000c0, /* 25, -2.5dB*/ + 0x32c000cb, /* 26, -2.0dB*/ + 0x35c000d7, /* 27, -1.5dB*/ + 0x390000e4, /* 28, -1.0dB*/ + 0x3c8000f2, /* 29, -0.5dB*/ + 0x40000100, /* 30, +0dB*/ + 0x43c0010f, /* 31, +0.5dB*/ + 0x47c0011f, /* 32, +1.0dB*/ + 0x4c000130, /* 33, +1.5dB*/ + 0x50800142, /* 34, +2.0dB*/ + 0x55400155, /* 35, +2.5dB*/ + 0x5a400169, /* 36, +3.0dB*/ + 0x5fc0017f, /* 37, +3.5dB*/ + 0x65400195, /* 38, +4.0dB*/ + 0x6b8001ae, /* 39, +4.5dB*/ + 0x71c001c7, /* 40, +5.0dB*/ + 0x788001e2, /* 41, +5.5dB*/ + 0x7f8001fe /* 42, +6.0dB*/ +}; + +u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = { + {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ + {0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ + {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ + {0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ + {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ + {0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ + {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ + {0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ + {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ + {0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ + {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ + {0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ + {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ + {0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ + {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ + {0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ + {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ + {0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ + {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ + {0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ + {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ +}; + +u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = { + {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ + {0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ + {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ + {0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ + {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ + {0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ + {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ + {0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ + {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ + {0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ + {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ + {0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ + {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ + {0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ + {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ + {0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ + {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ + {0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ + {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ + {0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ + {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ +}; + +u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = { + {0x44, 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ + {0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ + {0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ + {0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ + {0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ + {0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ + {0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ + {0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ + {0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ + {0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ + {0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ + {0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ + {0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ + {0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ + {0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ + {0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ + {0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ + {0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ + {0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ + {0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ + {0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ +}; + +u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = { + {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, /* 0, -16.0dB*/ + {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 1, -15.5dB*/ + {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 2, -15.0dB*/ + {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 3, -14.5dB*/ + {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 4, -14.0dB*/ + {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 5, -13.5dB*/ + {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 6, -13.0dB*/ + {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 7, -12.5dB*/ + {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 8, -12.0dB*/ + {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 9, -11.5dB*/ + {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 10, -11.0dB*/ + {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 11, -10.5dB*/ + {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 12, -10.0dB*/ + {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 13, -9.5dB*/ + {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 14, -9.0dB */ + {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 15, -8.5dB*/ + {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ + {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 17, -7.5dB*/ + {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 18, -7.0dB */ + {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 19, -6.5dB*/ + {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /*20, -6.0dB */ + {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 21, -5.5dB*/ + {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 22, -5.0dB */ + {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 23, -4.5dB*/ + {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 24, -4.0dB */ + {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 25, -3.5dB*/ + {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 26, -3.0dB*/ + {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 27, -2.5dB*/ + {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 28, -2.0dB */ + {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 29, -1.5dB*/ + {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 30, -1.0dB*/ + {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 31, -0.5dB*/ + {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} /* 32, +0dB*/ +}; + +u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = { + {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, /* 0, -16.0dB*/ + {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 1, -15.5dB*/ + {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 2, -15.0dB*/ + {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 3, -14.5dB*/ + {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 4, -14.0dB*/ + {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /*5, -13.5dB*/ + {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 6, -13.0dB*/ + {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 7, -12.5dB*/ + {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 8, -12.0dB*/ + {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 9, -11.5dB*/ + {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 10, -11.0dB*/ + {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /*11, -10.5dB*/ + {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 12, -10.0dB*/ + {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 13, -9.5dB*/ + {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /*14, -9.0dB */ + {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 15, -8.5dB*/ + {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ + {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 17, -7.5dB*/ + {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 18, -7.0dB */ + {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 19, -6.5dB */ + {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 20, -6.0dB */ + {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 21, -5.5dB*/ + {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 22, -5.0dB */ + {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /*23, -4.5dB*/ + {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 24, -4.0dB */ + {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 25, -3.5dB */ + {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 26, -3.0dB */ + {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /*27, -2.5dB*/ + {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 28, -2.0dB */ + {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /*29, -1.5dB*/ + {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 30, -1.0dB */ + {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 31, -0.5dB */ + {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} /* 32, +0dB */ +}; + +u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = { + 0x0CD, /*0 , -20dB*/ + 0x0D9, + 0x0E6, + 0x0F3, + 0x102, + 0x111, + 0x121, + 0x132, + 0x144, + 0x158, + 0x16C, + 0x182, + 0x198, + 0x1B1, + 0x1CA, + 0x1E5, + 0x202, + 0x221, + 0x241, + 0x263, + 0x287, + 0x2AE, + 0x2D6, + 0x301, + 0x32F, + 0x35F, + 0x392, + 0x3C9, + 0x402, + 0x43F, + 0x47F, + 0x4C3, + 0x50C, + 0x558, + 0x5A9, + 0x5FF, + 0x65A, + 0x6BA, + 0x720, + 0x78C, + 0x7FF, +}; + +/* JJ ADD 20161014 */ +u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = { + 0x0CD, /*0 , -20dB*/ + 0x0D9, + 0x0E6, + 0x0F3, + 0x102, + 0x111, + 0x121, + 0x132, + 0x144, + 0x158, + 0x16C, + 0x182, + 0x198, + 0x1B1, + 0x1CA, + 0x1E5, + 0x202, + 0x221, + 0x241, + 0x263, + 0x287, + 0x2AE, + 0x2D6, + 0x301, + 0x32F, + 0x35F, + 0x392, + 0x3C9, + 0x402, + 0x43F, + 0x47F, + 0x4C3, + 0x50C, + 0x558, + 0x5A9, + 0x5FF, + 0x65A, + 0x6BA, + 0x720, + 0x78C, + 0x7FF, +}; + +/* Winnita ADD 20171116 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/ +u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = { + 0x0CD, /*0 , -20dB*/ + 0x0D9, + 0x0E6, + 0x0F3, + 0x102, + 0x111, + 0x121, + 0x132, + 0x144, + 0x158, + 0x16C, + 0x182, + 0x198, + 0x1B1, + 0x1CA, + 0x1E5, + 0x202, + 0x221, + 0x241, + 0x263, /*19*/ + 0x287, /*20*/ + 0x2AE, /*21*/ + 0x2D6, /*22*/ + 0x301, /*23*/ + 0x32F, /*24*/ + 0x35F, /*25*/ + 0x392, /*26*/ + 0x3C9, /*27*/ + 0x402, /*28*/ + 0x43F, /*29*/ + 0x47F, /*30*/ + 0x4C3, /*31*/ + 0x50C, /*32*/ + 0x558, /*33*/ + 0x5A9, /*34*/ + 0x5FF, /*35*/ + 0x65A, /*36*/ + 0x6BA, + 0x720, + 0x78C, + 0x7FF, +}; + +/* Winnita ADD 201805 PathA 0xAB4[10:0]*/ +u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D] = { + 0x0CD, /*0 , -20dB*/ + 0x0D9, + 0x0E6, + 0x0F3, + 0x102, + 0x111, + 0x121, + 0x132, + 0x144, + 0x158, + 0x16C, + 0x182, + 0x198, + 0x1B1, + 0x1CA, + 0x1E5, + 0x202, + 0x221, + 0x241, + 0x263, /*19*/ + 0x287, /*20*/ + 0x2AE, /*21*/ + 0x2D6, /*22*/ + 0x301, /*23*/ + 0x32F, /*24*/ + 0x35F, /*25*/ + 0x392, /*26*/ + 0x3C9, /*27*/ + 0x402, /*28*/ + 0x43F, /*29*/ + 0x47F, /*30*/ + 0x4C3, /*31*/ + 0x50C, /*32*/ + 0x558, /*33*/ + 0x5A9, /*34*/ + 0x5FF, /*35*/ + 0x65A, /*36*/ + 0x6BA, + 0x720, + 0x78C, + 0x7FF, +}; + +u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = { + 0x081, /* 0, -12.0dB*/ + 0x088, /* 1, -11.5dB*/ + 0x090, /* 2, -11.0dB*/ + 0x099, /* 3, -10.5dB*/ + 0x0A2, /* 4, -10.0dB*/ + 0x0AC, /* 5, -9.5dB*/ + 0x0B6, /* 6, -9.0dB*/ + 0x0C0, /*7, -8.5dB*/ + 0x0CC, /* 8, -8.0dB*/ + 0x0D8, /* 9, -7.5dB*/ + 0x0E5, /* 10, -7.0dB*/ + 0x0F2, /* 11, -6.5dB*/ + 0x101, /* 12, -6.0dB*/ + 0x110, /* 13, -5.5dB*/ + 0x120, /* 14, -5.0dB*/ + 0x131, /* 15, -4.5dB*/ + 0x143, /* 16, -4.0dB*/ + 0x156, /* 17, -3.5dB*/ + 0x16A, /* 18, -3.0dB*/ + 0x180, /* 19, -2.5dB*/ + 0x197, /* 20, -2.0dB*/ + 0x1AF, /* 21, -1.5dB*/ + 0x1C8, /* 22, -1.0dB*/ + 0x1E3, /* 23, -0.5dB*/ + 0x200, /* 24, +0 dB*/ + 0x21E, /* 25, +0.5dB*/ + 0x23E, /* 26, +1.0dB*/ + 0x261, /* 27, +1.5dB*/ + 0x285,/* 28, +2.0dB*/ + 0x2AB, /* 29, +2.5dB*/ + 0x2D3, /*30, +3.0dB*/ + 0x2FE, /* 31, +3.5dB*/ + 0x32B, /* 32, +4.0dB*/ + 0x35C, /* 33, +4.5dB*/ + 0x38E, /* 34, +5.0dB*/ + 0x3C4, /* 35, +5.5dB*/ + 0x3FE /* 36, +6.0dB */ +}; + +void +odm_txpowertracking_init( + void *dm_void +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + odm_txpowertracking_thermal_meter_init(dm); +} + +u8 +get_swing_index( + void *dm_void +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + u8 i = 0; + u32 bb_swing; + u32 swing_table_size; + u32 *swing_table; + + if (dm->support_ic_type == ODM_RTL8195B) { + bb_swing = odm_get_bb_reg(dm, R_0xc1c, 0xFFE00000); + swing_table = tx_scaling_table_jaguar; + swing_table_size = TXSCALE_TABLE_SIZE; + } + + for (i = 0; i < swing_table_size; i++) { + u32 table_value = swing_table[i]; + + table_value = table_value; + if (bb_swing == table_value) + break; + } + + return i; +} + +u8 +get_cck_swing_index( + void *dm_void +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + u8 i = 0; + u32 bb_cck_swing; + + if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B || + dm->support_ic_type == ODM_RTL8192E) { + bb_cck_swing = odm_read_1byte(dm, 0xa22); + + for (i = 0; i < CCK_TABLE_SIZE; i++) { + if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0]) + break; + } + } else if (dm->support_ic_type == ODM_RTL8703B) { + bb_cck_swing = odm_read_1byte(dm, 0xa22); + + for (i = 0; i < CCK_TABLE_SIZE_88F; i++) { + if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0]) + break; + } + } + + return i; +} + +void +odm_txpowertracking_thermal_meter_init( + void *dm_void +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 default_swing_index = get_swing_index(dm); + u8 p = 0; + struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; + struct _hal_rf_ *rf = &dm->rf_table; + + if (!(*dm->mp_mode)) + cali_info->txpowertrack_control = true; + else + cali_info->txpowertrack_control = false; + + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "dm txpowertrack_control = %d\n", cali_info->txpowertrack_control); + + /* dm->rf_calibrate_info.txpowertrack_control = true; */ + cali_info->thermal_value = rf->eeprom_thermal; + cali_info->thermal_value_iqk = rf->eeprom_thermal; + cali_info->thermal_value_lck = rf->eeprom_thermal; + + if (!cali_info->default_bb_swing_index_flag) { + if (dm->support_ic_type == ODM_RTL8195B) { + cali_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index; + cali_info->default_cck_index = 24; + } else if (dm->support_ic_type == ODM_RTL8721D) { + cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ + cali_info->default_cck_index = 28; /*CCK: -6dB*/ + } + cali_info->default_bb_swing_index_flag = true; + } + + cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index; + cali_info->CCK_index = cali_info->default_cck_index; + + for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) { + cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index; + cali_info->OFDM_index[p] = cali_info->default_ofdm_index; + cali_info->delta_power_index[p] = 0; + cali_info->delta_power_index_last[p] = 0; + cali_info->power_index_offset[p] = 0; + } + cali_info->modify_tx_agc_value_ofdm = 0; + cali_info->modify_tx_agc_value_cck = 0; + cali_info->tm_trigger = 0; +} + +void +odm_txpowertracking_check( + void *dm_void +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + odm_txpowertracking_check_iot(dm); +} + +void +odm_txpowertracking_check_iot( + void *dm_void +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &dm->rf_table; + + if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) + return; + + if (!dm->rf_calibrate_info.tm_trigger) { + if (dm->support_ic_type == ODM_RTL8195B) + odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03); + else if (dm->support_ic_type == ODM_RTL8721D) + odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, + (BIT(12) | BIT(11)), 0x03); + + dm->rf_calibrate_info.tm_trigger = 1; + return; + } + odm_txpowertracking_callback_thermal_meter(dm); + dm->rf_calibrate_info.tm_trigger = 0; +} + +void +odm_txpowertracking_check_mp( + void *dm_void +) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *adapter = dm->adapter; + + if (odm_check_power_status(adapter) == false) { + RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("check_pow_status, return false\n")); + return; + } + + odm_txpowertracking_thermal_meter_check(adapter); +#endif +} + +void +odm_txpowertracking_check_ap( + void *dm_void +) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rtl8192cd_priv *priv = dm->priv; + + return; + +#endif +} diff --git a/hal/phydm/halrf/halrf_powertracking_iot.h b/hal/phydm/halrf/halrf_powertracking_iot.h new file mode 100644 index 0000000..55460a6 --- /dev/null +++ b/hal/phydm/halrf/halrf_powertracking_iot.h @@ -0,0 +1,349 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +#ifndef __HALRF_POWERTRACKING_H__ +#define __HALRF_POWERTRACKING_H__ + +#define DPK_DELTA_MAPPING_NUM 13 +#define index_mapping_HP_NUM 15 +#define OFDM_TABLE_SIZE 43 +#define CCK_TABLE_SIZE 33 +#define CCK_TABLE_SIZE_88F 21 +#define TXSCALE_TABLE_SIZE 37 +#define CCK_TABLE_SIZE_8723D 41 +/* JJ ADD 20161014 */ +#define CCK_TABLE_SIZE_8710B 41 +#define CCK_TABLE_SIZE_8192F 41 +#define CCK_TABLE_SIZE_8721D 41 + + +#define TXPWR_TRACK_TABLE_SIZE 30 +#define DELTA_SWINGIDX_SIZE 30 +#define DELTA_SWINTSSI_SIZE 61 +#define BAND_NUM 4 + +#define AVG_THERMAL_NUM 8 +#define IQK_MAC_REG_NUM 4 +#define IQK_ADDA_REG_NUM 16 +#define IQK_BB_REG_NUM_MAX 10 + +#define IQK_BB_REG_NUM 9 + + + +#define iqk_matrix_reg_num 8 +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) +#else +#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */ +#endif + +extern u32 ofdm_swing_table[OFDM_TABLE_SIZE]; +extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8]; +extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8]; + +extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE]; +extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8]; +extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8]; +extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16]; +extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16]; +extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16]; +extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D]; +/* JJ ADD 20161014 */ +extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B]; +extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F]; +extern u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D]; + +extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE]; + +/* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */ +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) +#else +static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; +static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; +#endif + +void +odm_txpowertracking_init( + void *dm_void +); + +#define dm_check_txpowertracking odm_txpowertracking_check + +struct iqk_matrix_regs_setting { + boolean is_iqk_done; + s32 value[3][iqk_matrix_reg_num]; + boolean is_bw_iqk_result_saved[3]; +}; + +struct dm_rf_calibration_struct { + /* for tx power tracking */ + + u32 rega24; /* for TempCCK */ + s32 rege94; + s32 rege9c; + s32 regeb4; + s32 regebc; + + u8 tx_powercount; + boolean is_txpowertracking_init; + boolean is_txpowertracking; + u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */ + u8 tm_trigger; + u8 internal_pa_5g[2]; /* pathA / pathB */ + + u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */ + u8 thermal_value; + u8 thermal_value_lck; + u8 thermal_value_iqk; + s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */ + u8 thermal_value_dpk; + u8 thermal_value_avg[AVG_THERMAL_NUM]; + u8 thermal_value_avg_index; + u8 thermal_value_rx_gain; + u8 thermal_value_crystal; + u8 thermal_value_dpk_store; + u8 thermal_value_dpk_track; + boolean txpowertracking_in_progress; + + boolean is_reloadtxpowerindex; + u8 is_rf_pi_enable; + u32 txpowertracking_callback_cnt; /* cosa add for debug */ + + + /* ------------------------- Tx power Tracking ------------------------- */ + u8 is_cck_in_ch14; + u8 CCK_index; + u8 OFDM_index[MAX_RF_PATH]; + s8 power_index_offset[MAX_RF_PATH]; + s8 delta_power_index[MAX_RF_PATH]; + s8 delta_power_index_last[MAX_RF_PATH]; + boolean is_tx_power_changed; + s8 xtal_offset; + s8 xtal_offset_last; + + struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM]; + u8 delta_lck; + s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */ + u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; + u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE]; + u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE]; + s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE]; + s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE]; + u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE]; + + u8 bb_swing_idx_ofdm[MAX_RF_PATH]; + u8 bb_swing_idx_ofdm_current; +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT)) + u8 bb_swing_idx_ofdm_base[MAX_RF_PATH]; +#else + u8 bb_swing_idx_ofdm_base; +#endif + boolean default_bb_swing_index_flag; + boolean bb_swing_flag_ofdm; + u8 bb_swing_idx_cck; + u8 bb_swing_idx_cck_current; + u8 bb_swing_idx_cck_base; + u8 default_ofdm_index; + u8 default_cck_index; + boolean bb_swing_flag_cck; + + s8 absolute_ofdm_swing_idx[MAX_RF_PATH]; + s8 remnant_ofdm_swing_idx[MAX_RF_PATH]; + s8 absolute_cck_swing_idx[MAX_RF_PATH]; + s8 remnant_cck_swing_idx; + s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */ + boolean modify_tx_agc_flag_path_a; + boolean modify_tx_agc_flag_path_b; + boolean modify_tx_agc_flag_path_c; + boolean modify_tx_agc_flag_path_d; + boolean modify_tx_agc_flag_path_a_cck; + boolean modify_tx_agc_flag_path_b_cck; + + s8 kfree_offset[MAX_RF_PATH]; + + /* -------------------------------------------------------------------- */ + + /* for IQK */ + u32 regc04; + u32 reg874; + u32 regc08; + u32 regb68; + u32 regb6c; + u32 reg870; + u32 reg860; + u32 reg864; + + boolean is_iqk_initialized; + boolean is_lck_in_progress; + boolean is_antenna_detected; + boolean is_need_iqk; + boolean is_iqk_in_progress; + boolean is_iqk_pa_off; + u8 delta_iqk; + u32 ADDA_backup[IQK_ADDA_REG_NUM]; + u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; + u32 IQK_BB_backup_recover[9]; + u32 IQK_BB_backup[IQK_BB_REG_NUM]; + u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ + u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ + u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ + u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ + u32 tx_iqc_8723d[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ + u32 rx_iqc_8723d[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ + /* JJ ADD 20161014 */ + u32 tx_iqc_8710b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ + u32 rx_iqc_8710b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ + + u8 iqk_step; + u8 kcount; + u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */ + boolean is_mp_mode; + + + + /* IQK time measurement */ + u32 iqk_start_time; + u32 iqk_progressing_time; + u32 iqk_total_progressing_time; + u32 lck_progressing_time; + + u32 lok_result; + + /* for APK */ + u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */ + u8 is_ap_kdone; + u8 is_apk_thermal_meter_ignore; + + /* DPK */ + boolean is_dpk_fail; + u8 is_dp_done; + u8 is_dp_path_aok; + u8 is_dp_path_bok; + + u32 tx_lok[2]; + u32 dpk_tx_agc; + s32 dpk_gain; + u32 dpk_thermal[4]; + s8 modify_tx_agc_value_ofdm; + s8 modify_tx_agc_value_cck; + + /*Add by Yuchen for Kfree Phydm*/ + u8 reg_rf_kfree_enable; /*for registry*/ + u8 rf_kfree_enable; /*for efuse enable check*/ + +}; + + +void +odm_txpowertracking_check( + void *dm_void +); + +void +odm_txpowertracking_check_ap( + void *dm_void +); + +void +odm_txpowertracking_thermal_meter_init( + void *dm_void +); + + +void +odm_txpowertracking_check_mp( + void *dm_void +); + + +void +odm_txpowertracking_check_iot( + void *dm_void +); + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) + +void +odm_txpowertracking_callback_thermal_meter92c( + void *adapter +); + +void +odm_txpowertracking_callback_rx_gain_thermal_meter92d( + void *adapter +); + +void +odm_txpowertracking_callback_thermal_meter92d( + void *adapter +); + +void +odm_txpowertracking_direct_call92c( + void *adapter +); + +void +odm_txpowertracking_thermal_meter_check( + void *adapter +); + +#endif + +#endif /*#ifndef __HALRF_POWER_TRACKING_H__*/ diff --git a/hal/phydm/halrf/halrf_powertracking_win.c b/hal/phydm/halrf/halrf_powertracking_win.c index 5705259..20ca0ad 100644 --- a/hal/phydm/halrf/halrf_powertracking_win.c +++ b/hal/phydm/halrf/halrf_powertracking_win.c @@ -419,6 +419,50 @@ u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = { 0x7FF, }; +/* Winnita ADD 20170828 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/ +u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = { + 0x0CD, /*0 , -20dB*/ + 0x0D9, + 0x0E6, + 0x0F3, + 0x102, + 0x111, + 0x121, + 0x132, + 0x144, + 0x158, + 0x16C, + 0x182, + 0x198, + 0x1B1, + 0x1CA, + 0x1E5, + 0x202, + 0x221, + 0x241, + 0x263, /*19*/ + 0x287, /*20*/ + 0x2AE, /*21*/ + 0x2D6, /*22*/ + 0x301, /*23*/ + 0x32F, /*24*/ + 0x35F, /*25*/ + 0x392, /*26*/ + 0x3C9, /*27*/ + 0x402, /*28*/ + 0x43F, /*29*/ + 0x47F, /*30*/ + 0x4C3, /*31*/ + 0x50C, /*32*/ + 0x558, /*33*/ + 0x5A9, /*34*/ + 0x5FF, /*35*/ + 0x65A, /*36*/ + 0x6BA, + 0x720, + 0x78C, + 0x7FF, +}; u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = { 0x081, /* 0, -12.0dB */ @@ -483,30 +527,34 @@ get_swing_index( void *adapter = dm->adapter; HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); u8 i = 0; - u32 bb_swing; - u32 swing_table_size; - u32 *swing_table; + u32 bb_swing, table_value; if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B || - dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8710B) { + dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8188F || + dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || + dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8710B || + dm->support_ic_type == ODM_RTL8821) { bb_swing = odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0xFFC00000); - swing_table = ofdm_swing_table_new; - swing_table_size = OFDM_TABLE_SIZE; + for (i = 0; i < OFDM_TABLE_SIZE; i++) { + table_value = ofdm_swing_table_new[i]; + + if (table_value >= 0x100000) + table_value >>= 22; + if (bb_swing == table_value) + break; + } } else { - bb_swing = PHY_GetTxBBSwing_8812A((PADAPTER)adapter, hal_data->CurrentBandType, RF_PATH_A); - swing_table = tx_scaling_table_jaguar; - swing_table_size = TXSCALE_TABLE_SIZE; + bb_swing = PHY_GetTxBBSwing_8812A(adapter, hal_data->CurrentBandType, RF_PATH_A); + + for (i = 0; i < TXSCALE_TABLE_SIZE; i++) { + table_value = tx_scaling_table_jaguar[i]; + + if (bb_swing == table_value) + break; + } } - for (i = 0; i < swing_table_size; ++i) { - u32 table_value = swing_table[i]; - - if (table_value >= 0x100000) - table_value >>= 22; - if (bb_swing == table_value) - break; - } return i; } @@ -550,6 +598,10 @@ odm_txpowertracking_thermal_meter_init( u8 default_swing_index = get_swing_index(dm); u8 default_cck_swing_index = get_cck_swing_index(dm); struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + struct _hal_rf_ *rf = &dm->rf_table; +#if (RTL8822C_SUPPORT == 1) + struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; +#endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) void *adapter = dm->adapter; @@ -608,14 +660,24 @@ odm_txpowertracking_thermal_meter_init( cali_info->txpowertrack_control = true; #endif - cali_info->thermal_value = hal_data->eeprom_thermal_meter; + cali_info->thermal_value = hal_data->eeprom_thermal_meter; cali_info->thermal_value_iqk = hal_data->eeprom_thermal_meter; cali_info->thermal_value_lck = hal_data->eeprom_thermal_meter; +#if (RTL8822C_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8822C) { + cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A]; + cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B]; + cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A]; + cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A]; + } +#endif + if (cali_info->default_bb_swing_index_flag != true) { /*The index of "0 dB" in SwingTable.*/ if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B || - dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8703B) { + dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8703B || + dm->support_ic_type == ODM_RTL8821) { cali_info->default_ofdm_index = (default_swing_index >= OFDM_TABLE_SIZE) ? 30 : default_swing_index; cali_info->default_cck_index = (default_cck_swing_index >= CCK_TABLE_SIZE) ? 20 : default_cck_swing_index; } else if (dm->support_ic_type == ODM_RTL8188F) { /*add by Mingzhi.Guo 2015-03-23*/ @@ -628,6 +690,10 @@ odm_txpowertracking_thermal_meter_init( } else if (dm->support_ic_type == ODM_RTL8710B) { cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ cali_info->default_cck_index = 28; /*CCK: -6dB*/ + /*Winnita add 20170828*/ + } else if (dm->support_ic_type == ODM_RTL8192F) { + cali_info->default_ofdm_index = 30; /*OFDM: 0dB*/ + cali_info->default_cck_index = 28; /*CCK: -6dB*/ } else { cali_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index; cali_info->default_cck_index = 24; @@ -765,7 +831,12 @@ odm_txpowertracking_direct_call( HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); struct dm_struct *dm = &hal_data->DM_OutSrc; - odm_txpowertracking_callback_thermal_meter(adapter); + if (dm->support_ic_type & ODM_RTL8822C) { +#if (RTL8822C_SUPPORT == 1) + odm_txpowertracking_new_callback_thermal_meter(dm); +#endif + } else + odm_txpowertracking_callback_thermal_meter(adapter); } void @@ -784,13 +855,31 @@ odm_txpowertracking_thermal_meter_check( return; } + if (rf->power_track_type != 0) { + if (IS_HARDWARE_TYPE_8822C(adapter)) { + /*halrf_tssi_cck(dm);*/ + /*halrf_thermal_cck(dm);*/ + return; + } + } + if (!tm_trigger) { - if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8192E(adapter) || - IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8814A(adapter) || IS_HARDWARE_TYPE_8188F(adapter) || IS_HARDWARE_TYPE_8703B(adapter) - || IS_HARDWARE_TYPE_8822B(adapter) || IS_HARDWARE_TYPE_8723D(adapter) || IS_HARDWARE_TYPE_8821C(adapter) || IS_HARDWARE_TYPE_8710B(adapter))/* JJ ADD 20161014 */ - PHY_SetRFReg((PADAPTER)adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03); + if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8192E(adapter) || IS_HARDWARE_TYPE_8192F(adapter) + ||IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8814A(adapter) || IS_HARDWARE_TYPE_8188F(adapter) || IS_HARDWARE_TYPE_8703B(adapter) + || IS_HARDWARE_TYPE_8822B(adapter) || IS_HARDWARE_TYPE_8723D(adapter) || IS_HARDWARE_TYPE_8821C(adapter) || IS_HARDWARE_TYPE_8710B(adapter) + || IS_HARDWARE_TYPE_8814B(adapter))/* JJ ADD 20161014 */ + PHY_SetRFReg(adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03); + else if (IS_HARDWARE_TYPE_8822C(adapter)) { + odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); + odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00); + odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); + + odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); + odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00); + odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); + } else - PHY_SetRFReg((PADAPTER)adapter, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60); + PHY_SetRFReg(adapter, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60); RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Trigger Thermal Meter!!\n")); diff --git a/hal/phydm/halrf/halrf_powertracking_win.h b/hal/phydm/halrf/halrf_powertracking_win.h index 19b27c0..2402548 100644 --- a/hal/phydm/halrf/halrf_powertracking_win.h +++ b/hal/phydm/halrf/halrf_powertracking_win.h @@ -13,8 +13,8 @@ * *****************************************************************************/ -#ifndef __PHYDMPOWERTRACKING_H__ -#define __PHYDMPOWERTRACKING_H__ +#ifndef __HALRF_POWERTRACKING_H__ +#define __HALRF_POWERTRACKING_H__ #define DPK_DELTA_MAPPING_NUM 13 #define index_mapping_HP_NUM 15 @@ -30,6 +30,7 @@ #define CCK_TABLE_SIZE_88F 21 /* JJ ADD 20161014 */ #define CCK_TABLE_SIZE_8710B 41 +#define CCK_TABLE_SIZE_8192F 41 #define dm_check_txpowertracking odm_txpowertracking_check @@ -56,6 +57,7 @@ extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16]; extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D]; /* JJ ADD 20161014 */ extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B]; +extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F]; extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE]; @@ -128,12 +130,15 @@ struct dm_rf_calibration_struct { u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */ u8 thermal_value; + u8 thermal_value_path[MAX_RF_PATH]; u8 thermal_value_lck; u8 thermal_value_iqk; - u8 thermal_value_dpk; - s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */ + u8 thermal_value_dpk; + s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */ u8 thermal_value_avg[AVG_THERMAL_NUM]; + u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM]; u8 thermal_value_avg_index; + u8 thermal_value_avg_index_path[MAX_RF_PATH]; u8 thermal_value_rx_gain; @@ -223,6 +228,7 @@ struct dm_rf_calibration_struct { boolean modify_tx_agc_flag_path_c; boolean modify_tx_agc_flag_path_d; boolean modify_tx_agc_flag_path_a_cck; + boolean modify_tx_agc_flag_path_b_cck; s8 kfree_offset[MAX_RF_PATH]; @@ -296,4 +302,4 @@ struct dm_rf_calibration_struct { -#endif +#endif /*#ifndef __HALRF_POWER_TRACKING_H__*/ diff --git a/hal/phydm/halrf/halrf_psd.c b/hal/phydm/halrf/halrf_psd.c index 3193ebe..cb25610 100644 --- a/hal/phydm/halrf/halrf_psd.c +++ b/hal/phydm/halrf/halrf_psd.c @@ -13,47 +13,20 @@ * *****************************************************************************/ -//============================================================ -// include files -//============================================================ +/*@=========================================================== + * include files + *============================================================ + */ #include "mp_precomp.h" #include "phydm_precomp.h" - -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - -#if 0 -u32 _sqrt(u64 n) -{ - u64 ans = 0, q = 0; - s64 i; - - /*for (i = sizeof(n) * 8 - 2; i > -1; i = i - 2) {*/ - for (i = 8 * 8 - 2; i > -1; i = i - 2) { - q = (q << 2) | ((n & (3 << i)) >> i); - if (q >= ((ans << 2) | 1)) - { - q = q - ((ans << 2) | 1); - ans = (ans << 1) | 1; - } - else - ans = ans << 1; - } - DbgPrint("ans=0x%x\n", ans); - - return (u32)ans; -} -#endif - - - u64 _sqrt(u64 x) { u64 i = 0; - u64 j = x / 2 + 1; + u64 j = (x >> 1) + 1; while (i <= j) { - u64 mid = (i + j) / 2; + u64 mid = (i + j) >> 1; u64 sq = mid * mid; @@ -68,36 +41,37 @@ u64 _sqrt(u64 x) return j; } - - -u32 -halrf_get_psd_data( - struct dm_struct *dm, - u32 point - ) +u32 halrf_get_psd_data( + struct dm_struct *dm, + u32 point) { - struct _hal_rf_ *rf = &(dm->rf_table); - struct _halrf_psd_data *psd = &(rf->halrf_psd_data); - u32 psd_val = 0, psd_reg, psd_report, psd_point, psd_start, i, delay_time; + struct _hal_rf_ *rf = &(dm->rf_table); + struct _halrf_psd_data *psd = &(rf->halrf_psd_data); + u32 psd_val = 0, psd_reg, psd_report, psd_point, psd_start, i, delay_time = 0; #if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE) - if (psd->average == 0) - delay_time = 100; - else - delay_time = 0; -#else - if (psd->average == 0) - delay_time = 1000; - else - delay_time = 100; + if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) { + if (psd->average == 0) + delay_time = 100; + else + delay_time = 0; + } +#endif +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) + if (dm->support_interface == ODM_ITRF_PCIE) { + if (psd->average == 0) + delay_time = 1000; + else + delay_time = 100; + } #endif if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) { - psd_reg = 0x910; - psd_report = 0xf44; + psd_reg = R_0x910; + psd_report = R_0xf44; } else { - psd_reg = 0x808; - psd_report = 0x8b4; + psd_reg = R_0x808; + psd_report = R_0x8b4; } if (dm->support_ic_type & ODM_RTL8710B) { @@ -109,12 +83,12 @@ halrf_get_psd_data( } psd_val = odm_get_bb_reg(dm, psd_reg, MASKDWORD); - + psd_val &= psd_point; psd_val |= point; odm_set_bb_reg(dm, psd_reg, MASKDWORD, psd_val); - + psd_val |= psd_start; odm_set_bb_reg(dm, psd_reg, MASKDWORD, psd_val); @@ -127,41 +101,40 @@ halrf_get_psd_data( if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8710B)) { psd_val &= MASKL3BYTES; psd_val = psd_val / 32; - } else + } else { psd_val &= MASKLWORD; + } return psd_val; } - - -void -halrf_psd( - struct dm_struct *dm, - u32 point, - u32 start_point, - u32 stop_point, - u32 average - ) +void halrf_psd( + struct dm_struct *dm, + u32 point, + u32 start_point, + u32 stop_point, + u32 average) { - struct _hal_rf_ *rf = &(dm->rf_table); - struct _halrf_psd_data *psd = &(rf->halrf_psd_data); - + struct _hal_rf_ *rf = &(dm->rf_table); + struct _halrf_psd_data *psd = &(rf->halrf_psd_data); + u32 i = 0, j = 0, k = 0; - u32 psd_reg, avg_org, point_temp, average_tmp; + u32 psd_reg, avg_org, point_temp, average_tmp, mode; u64 data_tatal = 0, data_temp[64] = {0}; psd->buf_size = 256; - if (average == 0) + mode = average >> 16; + + if (mode == 2) average_tmp = 1; else - average_tmp = average; + average_tmp = average & 0xffff; if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) - psd_reg = 0x910; + psd_reg = R_0x910; else - psd_reg = 0x808; + psd_reg = R_0x808; #if 0 dbg_print("[PSD]point=%d, start_point=%d, stop_point=%d, average=%d, average_tmp=%d, buf_size=%d\n", @@ -170,14 +143,13 @@ halrf_psd( for (i = 0; i < psd->buf_size; i++) psd->psd_data[i] = 0; - + if (dm->support_ic_type & ODM_RTL8710B) avg_org = odm_get_bb_reg(dm, psd_reg, 0x30000); else avg_org = odm_get_bb_reg(dm, psd_reg, 0x3000); - if (average != 0) - { + if (mode == 1) { if (dm->support_ic_type & ODM_RTL8710B) odm_set_bb_reg(dm, psd_reg, 0x30000, 0x1); else @@ -198,12 +170,12 @@ halrf_psd( i = start_point; while (i < stop_point) { data_tatal = 0; - + if (i >= point) point_temp = i - point; else point_temp = i; - + for (k = 0; k < average_tmp; k++) { data_temp[k] = halrf_get_psd_data(dm, point_temp); data_tatal = data_tatal + (data_temp[k] * data_temp[k]); @@ -211,13 +183,15 @@ halrf_psd( #if 0 if ((k % 20) == 0) dbg_print("\n "); - + dbg_print("0x%x ", data_temp[k]); #endif } +#if 0 /*dbg_print("\n");*/ +#endif - data_tatal = ((data_tatal * 100) / average_tmp); + data_tatal = phydm_division64((data_tatal * 100), average_tmp); psd->psd_data[j] = (u32)_sqrt(data_tatal); i++; @@ -228,7 +202,7 @@ halrf_psd( for (i = 0; i < psd->buf_size; i++) { if ((i % 20) == 0) dbg_print("\n "); - + dbg_print("0x%x ", psd->psd_data[i]); } dbg_print("\n\n"); @@ -240,82 +214,319 @@ halrf_psd( odm_set_bb_reg(dm, psd_reg, 0x3000, avg_org); } - - -enum rt_status -halrf_psd_init( - struct dm_struct *dm - ) +void backup_bb_register(struct dm_struct *dm, u32 *bb_backup, u32 *backup_bb_reg, u32 counter) { - enum rt_status ret_status = RT_STATUS_SUCCESS; - struct _hal_rf_ *rf = &(dm->rf_table); - struct _halrf_psd_data *psd = &(rf->halrf_psd_data); + u32 i ; - if (psd->psd_progress) - ret_status = RT_STATUS_PENDING; - else { - psd->psd_progress = 1; - halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average); - psd->psd_progress = 0; - } + for (i = 0; i < counter; i++) + bb_backup[i] = odm_get_bb_reg(dm, backup_bb_reg[i], MASKDWORD); +} - return ret_status; +void restore_bb_register(struct dm_struct *dm, u32 *bb_backup, u32 *backup_bb_reg, u32 counter) +{ + u32 i ; + + for (i = 0; i < counter; i++) + odm_set_bb_reg(dm, backup_bb_reg[i], MASKDWORD, bb_backup[i]); } -enum rt_status -halrf_psd_query( - struct dm_struct *dm, - u32 *outbuf, - u32 buf_size - ) +void _halrf_psd_iqk_init(struct dm_struct *dm) { - enum rt_status ret_status = RT_STATUS_SUCCESS; - struct _hal_rf_ *rf = &(dm->rf_table); - struct _halrf_psd_data *psd = &(rf->halrf_psd_data); + odm_set_bb_reg(dm, 0x1b04, MASKDWORD, 0x0); + odm_set_bb_reg(dm, 0x1b08, MASKDWORD, 0x80); + odm_set_bb_reg(dm, 0x1b0c, 0xc00, 0x3); + odm_set_bb_reg(dm, 0x1b14, MASKDWORD, 0x0); + odm_set_bb_reg(dm, 0x1b18, BIT(0), 0x1); + + if (dm->support_ic_type & ODM_RTL8197G) + odm_set_bb_reg(dm, 0x1b20, MASKDWORD, 0x00040008); + if (dm->support_ic_type & ODM_RTL8198F) { + odm_set_bb_reg(dm, 0x1b20, MASKDWORD, 0x00000000); + odm_set_bb_reg(dm, 0x1b1c, 0xfff, 0xd21); + odm_set_bb_reg(dm, 0x1b1c, 0xfff00000, 0x821); + } + + if (dm->support_ic_type & (ODM_RTL8197G | ODM_RTL8198F)) { + odm_set_bb_reg(dm, 0x1b24, MASKDWORD, 0x00030000); + odm_set_bb_reg(dm, 0x1b28, MASKDWORD, 0x00000000); + odm_set_bb_reg(dm, 0x1b2c, MASKDWORD, 0x00180018); + odm_set_bb_reg(dm, 0x1b30, MASKDWORD, 0x20000000); + /*odm_set_bb_reg(dm, 0x1b38, MASKDWORD, 0x20000000);*/ + /*odm_set_bb_reg(dm, 0x1b3C, MASKDWORD, 0x20000000);*/ + } + + odm_set_bb_reg(dm, 0x1b28, MASKDWORD, 0x0); + odm_set_bb_reg(dm, 0x1bcc, 0x3f, 0x3f); +} + + +u32 halrf_get_iqk_psd_data( + struct dm_struct *dm, + u32 point) +{ + struct _hal_rf_ *rf = &(dm->rf_table); + struct _halrf_psd_data *psd = &(rf->halrf_psd_data); + u32 psd_val, psd_val1, psd_val2, psd_point, i, delay_time = 0; + +#if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE) + if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) { + if (dm->support_ic_type & ODM_RTL8822C) + delay_time = 1000; + else + delay_time = 0; + } +#endif +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) + if (dm->support_interface == ODM_ITRF_PCIE) { + if (dm->support_ic_type & ODM_RTL8822C) + delay_time = 1000; + else + delay_time = 150; + } +#endif + psd_point = odm_get_bb_reg(dm, R_0x1b2c, MASKDWORD); + + psd_point &= 0xF000FFFF; + + point &= 0xFFF; + + psd_point = psd_point | (point << 16); + + odm_set_bb_reg(dm, R_0x1b2c, MASKDWORD, psd_point); + + odm_set_bb_reg(dm, R_0x1b34, MASKDWORD, 0x1); + + odm_set_bb_reg(dm, R_0x1b34, MASKDWORD, 0x0); + + for (i = 0; i < delay_time; i++) + ODM_delay_us(1); + + if (dm->support_ic_type & (ODM_RTL8197G | ODM_RTL8198F)) { + if (dm->support_ic_type & ODM_RTL8197G) + odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x001a0001); + else + odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001); + + psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD); + + psd_val1 = (psd_val1 & 0x001f0000) >> 16; + + if (dm->support_ic_type & ODM_RTL8197G) + odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x001b0001); + else + odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x002e0001); + + psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD); + + psd_val = (psd_val1 << 27) + (psd_val2 >> 5); + } else { + odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001); + + psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD); + + psd_val1 = (psd_val1 & 0x07FF0000) >> 16; + + odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x002e0001); + + psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD); + + psd_val = (psd_val1 << 21) + (psd_val2 >> 11); + } + + return psd_val; +} + +void halrf_iqk_psd( + struct dm_struct *dm, + u32 point, + u32 start_point, + u32 stop_point, + u32 average) +{ + struct _hal_rf_ *rf = &(dm->rf_table); + struct _halrf_psd_data *psd = &(rf->halrf_psd_data); + + u32 i = 0, j = 0, k = 0; + u32 psd_reg, avg_org, point_temp, average_tmp = 32, mode, reg_tmp = 5; + u64 data_tatal = 0, data_temp[64] = {0}; + s32 s_point_tmp; + + psd->buf_size = 256; + + mode = average >> 16; + + if (mode == 2) { + if (dm->support_ic_type & ODM_RTL8822C) + average_tmp = 1; + else { + reg_tmp = odm_get_bb_reg(dm, R_0x1b1c, 0x000e0000); + if (reg_tmp == 0) + average_tmp = 1; + else if (reg_tmp == 3) + average_tmp = 8; + else if (reg_tmp == 4) + average_tmp = 16; + else if (reg_tmp == 5) + average_tmp = 32; + odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, 0x0); + } + } else { + reg_tmp = odm_get_bb_reg(dm, R_0x1b1c, 0x000e0000); + if (reg_tmp == 0) + average_tmp = 1; + else if (reg_tmp == 3) + average_tmp = 8; + else if (reg_tmp == 4) + average_tmp = 16; + else if (reg_tmp == 5) + average_tmp = 32; + odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, 0x0); + } + +#if 0 + DbgPrint("[PSD]point=%d, start_point=%d, stop_point=%d, average=0x%x, average_tmp=%d, buf_size=%d, mode=%d\n", + point, start_point, stop_point, average, average_tmp, psd->buf_size, mode); +#endif + + for (i = 0; i < psd->buf_size; i++) + psd->psd_data[i] = 0; + + i = start_point; + while (i < stop_point) { + data_tatal = 0; + + if (i >= point) + point_temp = i - point; + else + { + if (dm->support_ic_type & ODM_RTL8814B) + { + s_point_tmp = i - point - 1; + point_temp = s_point_tmp & 0xfff; + } + else + point_temp = i; + } + + for (k = 0; k < average_tmp; k++) { + data_temp[k] = halrf_get_iqk_psd_data(dm, point_temp); + /*data_tatal = data_tatal + (data_temp[k] * data_temp[k]);*/ + data_tatal = data_tatal + data_temp[k]; + +#if 0 + if ((k % 20) == 0) + DbgPrint("\n "); + + DbgPrint("0x%x ", data_temp[k]); +#endif + } + + data_tatal = phydm_division64((data_tatal * 10), average_tmp); + psd->psd_data[j] = (u32)data_tatal; + + i++; + j++; + } + + if (dm->support_ic_type & (ODM_RTL8814B | ODM_RTL8198F | ODM_RTL8197G)) + odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, reg_tmp); + +#if 0 + DbgPrint("\n [iqk psd]psd result:\n"); + + for (i = 0; i < psd->buf_size; i++) { + if ((i % 20) == 0) + DbgPrint("\n "); + + DbgPrint("0x%x ", psd->psd_data[i]); + } + DbgPrint("\n\n"); +#endif +} + + +u32 +halrf_psd_init( + void *dm_void) +{ + enum rt_status ret_status = RT_STATUS_SUCCESS; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &(dm->rf_table); + struct _halrf_psd_data *psd = &(rf->halrf_psd_data); + +#if 0 + u32 bb_backup[12]; + u32 backup_bb_reg[12] = {0x1b04, 0x1b08, 0x1b0c, 0x1b14, 0x1b18, + 0x1b1c, 0x1b28, 0x1bcc, 0x1b2c, 0x1b34, + 0x1bd4, 0x1bfc}; +#endif + + if (psd->psd_progress) { + ret_status = RT_STATUS_PENDING; + } else { + psd->psd_progress = 1; + if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8198F | ODM_RTL8197G)) { + /*backup_bb_register(dm, bb_backup, backup_bb_reg, 12);*/ + _halrf_psd_iqk_init(dm); + halrf_iqk_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average); + /*restore_bb_register(dm, bb_backup, backup_bb_reg, 12);*/ + } else + halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average); + psd->psd_progress = 0; + } + return ret_status; +} + +u32 +halrf_psd_query( + void *dm_void, + u32 *outbuf, + u32 buf_size) +{ + enum rt_status ret_status = RT_STATUS_SUCCESS; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &(dm->rf_table); + struct _halrf_psd_data *psd = &(rf->halrf_psd_data); if (psd->psd_progress) ret_status = RT_STATUS_PENDING; else - PlatformMoveMemory(outbuf, psd->psd_data, 0x400); + odm_move_memory(dm, outbuf, psd->psd_data, + sizeof(u32) * psd->buf_size); return ret_status; } - - -enum rt_status +u32 halrf_psd_init_query( - struct dm_struct *dm, - u32 *outbuf, - u32 point, - u32 start_point, - u32 stop_point, - u32 average, - u32 buf_size - ) + void *dm_void, + u32 *outbuf, + u32 point, + u32 start_point, + u32 stop_point, + u32 average, + u32 buf_size) { - enum rt_status ret_status = RT_STATUS_SUCCESS; - struct _hal_rf_ *rf = &(dm->rf_table); - struct _halrf_psd_data *psd = &(rf->halrf_psd_data); + enum rt_status ret_status = RT_STATUS_SUCCESS; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _hal_rf_ *rf = &(dm->rf_table); + struct _halrf_psd_data *psd = &(rf->halrf_psd_data); psd->point = point; psd->start_point = start_point; psd->stop_point = stop_point; psd->average = average; - if (psd->psd_progress) + if (psd->psd_progress) { ret_status = RT_STATUS_PENDING; - else { + } else { psd->psd_progress = 1; halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average); - PlatformMoveMemory(outbuf, psd->psd_data, 0x400); + odm_move_memory(dm, outbuf, psd->psd_data, 0x400); psd->psd_progress = 0; } return ret_status; } - -#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/ - diff --git a/hal/phydm/halrf/halrf_psd.h b/hal/phydm/halrf/halrf_psd.h index 8e4b7f4..63eeada 100644 --- a/hal/phydm/halrf/halrf_psd.h +++ b/hal/phydm/halrf/halrf_psd.h @@ -16,45 +16,35 @@ #ifndef __HALRF_PSD_H__ #define __HALRF_PSD_H__ -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) struct _halrf_psd_data { - u32 point; - u32 start_point; - u32 stop_point; - u32 average; - u32 buf_size; - u32 psd_data[256]; - u32 psd_progress; + u32 point; + u32 start_point; + u32 stop_point; + u32 average; + u32 buf_size; + u32 psd_data[256]; + u32 psd_progress; }; +u32 +halrf_psd_init( + void *dm_void); +u32 +halrf_psd_query( + void *dm_void, + u32 *outbuf, + u32 buf_size); -enum rt_status -halrf_psd_init ( - struct dm_struct *dm - ); - - - -enum rt_status -halrf_psd_query ( - struct dm_struct *dm, - u32 *outbuf, - u32 buf_size -); - -enum rt_status +u32 halrf_psd_init_query( - struct dm_struct *dm, - u32 *outbuf, - u32 point, - u32 start_point, - u32 stop_point, - u32 average, - u32 buf_size -); - -#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/ -#endif /*#ifndef __HALRF_PSD_H__*/ + void *dm_void, + u32 *outbuf, + u32 point, + u32 start_point, + u32 stop_point, + u32 average, + u32 buf_size); +#endif /*#__HALRF_PSD_H__*/ diff --git a/hal/phydm/halrf/halrf_txgapcal.c b/hal/phydm/halrf/halrf_txgapcal.c index 713f811..0cc4497 100644 --- a/hal/phydm/halrf/halrf_txgapcal.c +++ b/hal/phydm/halrf/halrf_txgapcal.c @@ -22,282 +22,279 @@ * Larry Finger * *****************************************************************************/ -#include "mp_precomp.h" -#include "phydm_precomp.h" - - - -void odm_bub_sort(pu4Byte data, u4Byte n) -{ - int i, j, temp, sp; - - for (i = n - 1;i >= 0;i--) { - sp = 1; - for (j = 0;j < i;j++) { - if (data[j] < data[j + 1]) { - temp = data[j]; - data[j] = data[j + 1]; - data[j + 1] = temp; - sp = 0; - } - } - if (sp == 1) - break; - } -} - - -#if (RTL8197F_SUPPORT == 1) - -u4Byte -odm_tx_gain_gap_psd_8197f( - void *dm_void, - u1Byte rf_path, - u4Byte rf56 -) -{ - PDM_ODM_T dm = (PDM_ODM_T)dm_void; - - u1Byte i, j; - u4Byte psd_vaule[5], psd_avg_time = 5, psd_vaule_temp; - - u4Byte iqk_ctl_addr[2][6] = {{0xe30, 0xe34, 0xe50, 0xe54, 0xe38, 0xe3c}, - {0xe50, 0xe54, 0xe30, 0xe34, 0xe58, 0xe5c}}; - - u4Byte psd_finish_bit[2] = {0x04000000, 0x20000000}; - u4Byte psd_fail_bit[2] = {0x08000000, 0x40000000}; - - u4Byte psd_cntl_value[2][2] = {{0x38008c1c, 0x10008c1c}, - {0x38008c2c, 0x10008c2c}}; - - u4Byte psd_report_addr[2] = {0xea0, 0xec0}; - - odm_set_rf_reg(dm, rf_path, 0xdf, bRFRegOffsetMask, 0x00e02); - - ODM_delay_us(100); - - odm_set_bb_reg(dm, 0xe28, 0xffffffff, 0x0); - - odm_set_rf_reg(dm, rf_path, 0x56, 0xfff, rf56); - while(rf56 != (odm_get_rf_reg(dm, rf_path, 0x56, 0xfff))) - odm_set_rf_reg(dm, rf_path, 0x56, 0xfff, rf56); - - odm_set_bb_reg(dm, 0xd94, 0xffffffff, 0x44FFBB44); - odm_set_bb_reg(dm, 0xe70, 0xffffffff, 0x00400040); - odm_set_bb_reg(dm, 0xc04, 0xffffffff, 0x6f005403); - odm_set_bb_reg(dm, 0xc08, 0xffffffff, 0x000804e4); - odm_set_bb_reg(dm, 0x874, 0xffffffff, 0x04203400); - odm_set_bb_reg(dm, 0xe28, 0xffffffff, 0x80800000); - - odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][0], 0xffffffff, psd_cntl_value[rf_path][0]); - odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][1], 0xffffffff, psd_cntl_value[rf_path][1]); - odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][2], 0xffffffff, psd_cntl_value[rf_path][0]); - odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][3], 0xffffffff, psd_cntl_value[rf_path][0]); - odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][4], 0xffffffff, 0x8215001F); - odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][5], 0xffffffff, 0x2805001F); - - odm_set_bb_reg(dm, 0xe40, 0xffffffff, 0x81007C00); - odm_set_bb_reg(dm, 0xe44, 0xffffffff, 0x81004800); - odm_set_bb_reg(dm, 0xe4c, 0xffffffff, 0x0046a8d0); - - - for (i = 0; i < psd_avg_time; i++) { - - for(j = 0; j < 1000 ; j++) { - odm_set_bb_reg(dm, 0xe48, 0xffffffff, 0xfa005800); - odm_set_bb_reg(dm, 0xe48, 0xffffffff, 0xf8005800); - - while(!odm_get_bb_reg(dm, 0xeac, psd_finish_bit[rf_path])); /*wait finish bit*/ - - if (!odm_get_bb_reg(dm, 0xeac, psd_fail_bit[rf_path])) { /*check fail bit*/ - - psd_vaule[i] = odm_get_bb_reg(dm, psd_report_addr[rf_path], 0xffffffff); - - if (psd_vaule[i] > 0xffff) - break; - } - } - - - - PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x time=%d psd_vaule=0x%x\n", - odm_get_rf_reg(dm, rf_path, 0x0, 0xff), - rf56, odm_get_rf_reg(dm, rf_path, 0x56, 0xfff), j, psd_vaule[i]); - } - - odm_bub_sort(psd_vaule, psd_avg_time); - - psd_vaule_temp = psd_vaule[(UINT)(psd_avg_time / 2)]; - - odm_set_bb_reg(dm, 0xd94, 0xffffffff, 0x44BBBB44); - odm_set_bb_reg(dm, 0xe70, 0xffffffff, 0x80408040); - odm_set_bb_reg(dm, 0xc04, 0xffffffff, 0x6f005433); - odm_set_bb_reg(dm, 0xc08, 0xffffffff, 0x000004e4); - odm_set_bb_reg(dm, 0x874, 0xffffffff, 0x04003400); - odm_set_bb_reg(dm, 0xe28, 0xffffffff, 0x00000000); - - PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x psd_vaule_temp=0x%x\n", - odm_get_rf_reg(dm, rf_path, 0x0, 0xff), - rf56, odm_get_rf_reg(dm, rf_path, 0x56, 0xfff), psd_vaule_temp); - - odm_set_rf_reg(dm, rf_path, 0xdf, bRFRegOffsetMask, 0x00602); - - return psd_vaule_temp; - -} - - - -void -odm_tx_gain_gap_calibration_8197f( - void *dm_void -) -{ - PDM_ODM_T dm = (PDM_ODM_T)dm_void; - - u1Byte rf_path, rf0_idx, rf0_idx_current, rf0_idx_next, i, delta_gain_retry = 3; - - s1Byte delta_gain_gap_pre, delta_gain_gap[2][11]; - u4Byte rf56_current, rf56_next, psd_value_current, psd_value_next; - u4Byte psd_gap, rf56_current_temp[2][11]; - s4Byte rf33[2][11]; - - memset(rf33, 0x0, sizeof(rf33)); - - for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) { - - if (rf_path == RF_PATH_A) - odm_set_bb_reg(dm, 0x88c, (BIT(21) | BIT(20)), 0x3); /*disable 3-wire*/ - else if (rf_path == RF_PATH_B) - odm_set_bb_reg(dm, 0x88c, (BIT(23) | BIT(22)), 0x3); /*disable 3-wire*/ - - ODM_delay_us(100); - - for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) { - - rf0_idx_current = 3 * (rf0_idx - 1) + 1; - odm_set_rf_reg(dm, rf_path, 0x0, 0xff, rf0_idx_current); - ODM_delay_us(100); - rf56_current_temp[rf_path][rf0_idx] = odm_get_rf_reg(dm, rf_path, 0x56, 0xfff); - rf56_current = rf56_current_temp[rf_path][rf0_idx]; - - rf0_idx_next = 3 * rf0_idx + 1; - odm_set_rf_reg(dm, rf_path, 0x0, 0xff, rf0_idx_next); - ODM_delay_us(100); - rf56_next= odm_get_rf_reg(dm, rf_path, 0x56, 0xfff); - - PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] rf56_current[%d][%d]=0x%x rf56_next[%d][%d]=0x%x\n", - rf_path, rf0_idx, rf56_current, rf_path, rf0_idx, rf56_next); - - if ((rf56_current >> 5) == (rf56_next >> 5)) { - delta_gain_gap[rf_path][rf0_idx] = 0; - - PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] rf56_current[11:5] == rf56_next[%d][%d][11:5]=0x%x delta_gain_gap[%d][%d]=%d\n", - rf_path, rf0_idx, (rf56_next >> 5), rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx]); - - continue; - } - - PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] rf56_current[%d][%d][11:5]=0x%x != rf56_next[%d][%d][11:5]=0x%x\n", - rf_path, rf0_idx, (rf56_current >> 5), rf_path, rf0_idx, (rf56_next >> 5)); - - for (i = 0; i < delta_gain_retry; i++) { - psd_value_current = odm_tx_gain_gap_psd_8197f(dm, rf_path, rf56_current); - - psd_value_next = odm_tx_gain_gap_psd_8197f(dm, rf_path, rf56_next - 2); - - psd_gap = psd_value_next / (psd_value_current / 1000); - -#if 0 - if (psd_gap > 1413) - delta_gain_gap[rf_path][rf0_idx] = 1; - else if (psd_gap > 1122) - delta_gain_gap[rf_path][rf0_idx] = 0; - else - delta_gain_gap[rf_path][rf0_idx] = -1; -#endif - - if (psd_gap > 1445) - delta_gain_gap[rf_path][rf0_idx] = 1; - else if (psd_gap > 1096) - delta_gain_gap[rf_path][rf0_idx] = 0; - else - delta_gain_gap[rf_path][rf0_idx] = -1; - - if (i == 0) - delta_gain_gap_pre = delta_gain_gap[rf_path][rf0_idx]; - - PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] psd_value_current=0x%x psd_value_next=0x%x psd_value_next/psd_value_current=%d delta_gain_gap[%d][%d]=%d\n", - psd_value_current, psd_value_next, psd_gap, rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx]); - - if ((i == 0) && (delta_gain_gap[rf_path][rf0_idx] == 0)) - break; - - if (delta_gain_gap_pre != delta_gain_gap[rf_path][rf0_idx]) { - delta_gain_gap[rf_path][rf0_idx] = 0; - - PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] delta_gain_gap_pre(%d) != delta_gain_gap[%d][%d](%d) time=%d\n", - delta_gain_gap_pre, rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx], i); - - break; - } else { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] delta_gain_gap_pre(%d) == delta_gain_gap[%d][%d](%d) time=%d\n", - delta_gain_gap_pre, rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx], i); - } - } - } - - if (rf_path == RF_PATH_A) - odm_set_bb_reg(dm, 0x88c, (BIT(21) | BIT(20)), 0x0); /*enable 3-wire*/ - else if (rf_path == RF_PATH_B) - odm_set_bb_reg(dm, 0x88c, (BIT(23) | BIT(22)), 0x0); /*enable 3-wire*/ - - ODM_delay_us(100); - - } - - /*odm_set_bb_reg(dm, 0x88c, (BIT(23) | BIT(22) | BIT(21) | BIT(20)), 0x0);*/ /*enable 3-wire*/ - - for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) { - - odm_set_rf_reg(dm, rf_path, 0xef, bRFRegOffsetMask, 0x00100); - - for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) { - - rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + (rf56_current_temp[rf_path][rf0_idx] & 0x1f); - - for (i = rf0_idx; i <= 10; i++) - rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + delta_gain_gap[rf_path][i]; - - if (rf33[rf_path][rf0_idx] >= 0x1d) - rf33[rf_path][rf0_idx] = 0x1d; - else if (rf33[rf_path][rf0_idx] <= 0x2) - rf33[rf_path][rf0_idx] = 0x2; - - rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + ((rf0_idx - 1) * 0x4000) + (rf56_current_temp[rf_path][rf0_idx] & 0xfffe0); - - PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] rf56[%d][%d]=0x%05x rf33[%d][%d]=0x%05x\n", rf_path, rf0_idx, rf56_current_temp[rf_path][rf0_idx], rf_path, rf0_idx, rf33[rf_path][rf0_idx]); - - odm_set_rf_reg(dm, rf_path, 0x33, bRFRegOffsetMask, rf33[rf_path][rf0_idx]); - } - - odm_set_rf_reg(dm, rf_path, 0xef, bRFRegOffsetMask, 0x00000); - } - -} -#endif - - -void -odm_tx_gain_gap_calibration( - void *dm_void -) -{ - PDM_ODM_T dm = (PDM_ODM_T)dm_void; - - #if (RTL8197F_SUPPORT == 1) - if (dm->SupportICType & ODM_RTL8197F) - odm_tx_gain_gap_calibration_8197f(dm_void); - #endif - -} +#include "mp_precomp.h" +#include "phydm_precomp.h" + +void odm_bub_sort(u32 *data, u32 n) +{ + int i, j, temp, sp; + + for (i = n - 1; i >= 0; i--) { + sp = 1; + for (j = 0; j < i; j++) { + if (data[j] < data[j + 1]) { + temp = data[j]; + data[j] = data[j + 1]; + data[j + 1] = temp; + sp = 0; + } + } + if (sp == 1) + break; + } +} + +#if (RTL8197F_SUPPORT == 1) + +u4Byte +odm_tx_gain_gap_psd_8197f( + void *dm_void, + u1Byte rf_path, + u4Byte rf56) +{ + PDM_ODM_T dm = (PDM_ODM_T)dm_void; + + u1Byte i, j; + u4Byte psd_vaule[5], psd_avg_time = 5, psd_vaule_temp; + + u4Byte iqk_ctl_addr[2][6] = {{0xe30, 0xe34, 0xe50, 0xe54, 0xe38, 0xe3c}, + {0xe50, 0xe54, 0xe30, 0xe34, 0xe58, 0xe5c}}; + + u4Byte psd_finish_bit[2] = {0x04000000, 0x20000000}; + u4Byte psd_fail_bit[2] = {0x08000000, 0x40000000}; + + u4Byte psd_cntl_value[2][2] = {{0x38008c1c, 0x10008c1c}, + {0x38008c2c, 0x10008c2c}}; + + u4Byte psd_report_addr[2] = {0xea0, 0xec0}; + + odm_set_rf_reg(dm, rf_path, RF_0xdf, bRFRegOffsetMask, 0x00e02); + + ODM_delay_us(100); + + odm_set_bb_reg(dm, R_0xe28, 0xffffffff, 0x0); + + odm_set_rf_reg(dm, rf_path, RF_0x56, 0xfff, rf56); + while (rf56 != (odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff))) + odm_set_rf_reg(dm, rf_path, RF_0x56, 0xfff, rf56); + + odm_set_bb_reg(dm, R_0xd94, 0xffffffff, 0x44FFBB44); + odm_set_bb_reg(dm, R_0xe70, 0xffffffff, 0x00400040); + odm_set_bb_reg(dm, R_0xc04, 0xffffffff, 0x6f005403); + odm_set_bb_reg(dm, R_0xc08, 0xffffffff, 0x000804e4); + odm_set_bb_reg(dm, R_0x874, 0xffffffff, 0x04203400); + odm_set_bb_reg(dm, R_0xe28, 0xffffffff, 0x80800000); + + odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][0], 0xffffffff, psd_cntl_value[rf_path][0]); + odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][1], 0xffffffff, psd_cntl_value[rf_path][1]); + odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][2], 0xffffffff, psd_cntl_value[rf_path][0]); + odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][3], 0xffffffff, psd_cntl_value[rf_path][0]); + odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][4], 0xffffffff, 0x8215001F); + odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][5], 0xffffffff, 0x2805001F); + + odm_set_bb_reg(dm, R_0xe40, 0xffffffff, 0x81007C00); + odm_set_bb_reg(dm, R_0xe44, 0xffffffff, 0x81004800); + odm_set_bb_reg(dm, R_0xe4c, 0xffffffff, 0x0046a8d0); + + for (i = 0; i < psd_avg_time; i++) { + for (j = 0; j < 1000; j++) { + odm_set_bb_reg(dm, R_0xe48, 0xffffffff, 0xfa005800); + odm_set_bb_reg(dm, R_0xe48, 0xffffffff, 0xf8005800); + + while (!odm_get_bb_reg(dm, R_0xeac, psd_finish_bit[rf_path])) + ; /*wait finish bit*/ + + if (!odm_get_bb_reg(dm, R_0xeac, psd_fail_bit[rf_path])) { /*check fail bit*/ + + psd_vaule[i] = odm_get_bb_reg(dm, psd_report_addr[rf_path], 0xffffffff); + + if (psd_vaule[i] > 0xffff) + break; + } + } + + RF_DBG(dm, DBG_RF_IQK, + "[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x time=%d psd_vaule=0x%x\n", + odm_get_rf_reg(dm, rf_path, RF_0x0, 0xff), rf56, + odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff), j, + psd_vaule[i]); + } + + odm_bub_sort(psd_vaule, psd_avg_time); + + psd_vaule_temp = psd_vaule[(UINT)(psd_avg_time / 2)]; + + odm_set_bb_reg(dm, R_0xd94, 0xffffffff, 0x44BBBB44); + odm_set_bb_reg(dm, R_0xe70, 0xffffffff, 0x80408040); + odm_set_bb_reg(dm, R_0xc04, 0xffffffff, 0x6f005433); + odm_set_bb_reg(dm, R_0xc08, 0xffffffff, 0x000004e4); + odm_set_bb_reg(dm, R_0x874, 0xffffffff, 0x04003400); + odm_set_bb_reg(dm, R_0xe28, 0xffffffff, 0x00000000); + + RF_DBG(dm, DBG_RF_IQK, + "[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x psd_vaule_temp=0x%x\n", + odm_get_rf_reg(dm, rf_path, RF_0x0, 0xff), rf56, + odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff), psd_vaule_temp); + + odm_set_rf_reg(dm, rf_path, RF_0xdf, bRFRegOffsetMask, 0x00602); + + return psd_vaule_temp; +} + +void odm_tx_gain_gap_calibration_8197f( + void *dm_void) +{ + PDM_ODM_T dm = (PDM_ODM_T)dm_void; + + u1Byte rf_path, rf0_idx, rf0_idx_current, rf0_idx_next, i, delta_gain_retry = 3; + + s1Byte delta_gain_gap_pre, delta_gain_gap[2][11]; + u4Byte rf56_current, rf56_next, psd_value_current, psd_value_next; + u4Byte psd_gap, rf56_current_temp[2][11]; + s4Byte rf33[2][11]; + + memset(rf33, 0x0, sizeof(rf33)); + + for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) { + if (rf_path == RF_PATH_A) + odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x3); /*disable 3-wire*/ + else if (rf_path == RF_PATH_B) + odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x3); /*disable 3-wire*/ + + ODM_delay_us(100); + + for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) { + rf0_idx_current = 3 * (rf0_idx - 1) + 1; + odm_set_rf_reg(dm, rf_path, RF_0x0, 0xff, rf0_idx_current); + ODM_delay_us(100); + rf56_current_temp[rf_path][rf0_idx] = odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff); + rf56_current = rf56_current_temp[rf_path][rf0_idx]; + + rf0_idx_next = 3 * rf0_idx + 1; + odm_set_rf_reg(dm, rf_path, RF_0x0, 0xff, rf0_idx_next); + ODM_delay_us(100); + rf56_next = odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff); + + RF_DBG(dm, DBG_RF_IQK, + "[TGGC] rf56_current[%d][%d]=0x%x rf56_next[%d][%d]=0x%x\n", + rf_path, rf0_idx, rf56_current, rf_path, rf0_idx, + rf56_next); + + if ((rf56_current >> 5) == (rf56_next >> 5)) { + delta_gain_gap[rf_path][rf0_idx] = 0; + + RF_DBG(dm, DBG_RF_IQK, + "[TGGC] rf56_current[11:5] == rf56_next[%d][%d][11:5]=0x%x delta_gain_gap[%d][%d]=%d\n", + rf_path, rf0_idx, (rf56_next >> 5), + rf_path, rf0_idx, + delta_gain_gap[rf_path][rf0_idx]); + + continue; + } + + RF_DBG(dm, DBG_RF_IQK, + "[TGGC] rf56_current[%d][%d][11:5]=0x%x != rf56_next[%d][%d][11:5]=0x%x\n", + rf_path, rf0_idx, (rf56_current >> 5), rf_path, + rf0_idx, (rf56_next >> 5)); + + for (i = 0; i < delta_gain_retry; i++) { + psd_value_current = odm_tx_gain_gap_psd_8197f(dm, rf_path, rf56_current); + + psd_value_next = odm_tx_gain_gap_psd_8197f(dm, rf_path, rf56_next - 2); + + psd_gap = psd_value_next / (psd_value_current / 1000); + +#if 0 + if (psd_gap > 1413) + delta_gain_gap[rf_path][rf0_idx] = 1; + else if (psd_gap > 1122) + delta_gain_gap[rf_path][rf0_idx] = 0; + else + delta_gain_gap[rf_path][rf0_idx] = -1; +#endif + + if (psd_gap > 1445) + delta_gain_gap[rf_path][rf0_idx] = 1; + else if (psd_gap > 1096) + delta_gain_gap[rf_path][rf0_idx] = 0; + else + delta_gain_gap[rf_path][rf0_idx] = -1; + + if (i == 0) + delta_gain_gap_pre = delta_gain_gap[rf_path][rf0_idx]; + + RF_DBG(dm, DBG_RF_IQK, + "[TGGC] psd_value_current=0x%x psd_value_next=0x%x psd_value_next/psd_value_current=%d delta_gain_gap[%d][%d]=%d\n", + psd_value_current, psd_value_next, + psd_gap, rf_path, rf0_idx, + delta_gain_gap[rf_path][rf0_idx]); + + if (i == 0 && delta_gain_gap[rf_path][rf0_idx] == 0) + break; + + if (delta_gain_gap_pre != delta_gain_gap[rf_path][rf0_idx]) { + delta_gain_gap[rf_path][rf0_idx] = 0; + + RF_DBG(dm, DBG_RF_IQK, "[TGGC] delta_gain_gap_pre(%d) != delta_gain_gap[%d][%d](%d) time=%d\n", + delta_gain_gap_pre, rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx], i); + + break; + } + + RF_DBG(dm, DBG_RF_IQK, + "[TGGC] delta_gain_gap_pre(%d) == delta_gain_gap[%d][%d](%d) time=%d\n", + delta_gain_gap_pre, rf_path, rf0_idx, + delta_gain_gap[rf_path][rf0_idx], i); + } + } + + if (rf_path == RF_PATH_A) + odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x0); /*enable 3-wire*/ + else if (rf_path == RF_PATH_B) + odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x0); /*enable 3-wire*/ + + ODM_delay_us(100); + } + +#if 0 + /*odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22) | BIT(21) | BIT(20)), 0x0);*/ /*enable 3-wire*/ +#endif + + for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) { + odm_set_rf_reg(dm, rf_path, RF_0xef, bRFRegOffsetMask, 0x00100); + + for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) { + rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + (rf56_current_temp[rf_path][rf0_idx] & 0x1f); + + for (i = rf0_idx; i <= 10; i++) + rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + delta_gain_gap[rf_path][i]; + + if (rf33[rf_path][rf0_idx] >= 0x1d) + rf33[rf_path][rf0_idx] = 0x1d; + else if (rf33[rf_path][rf0_idx] <= 0x2) + rf33[rf_path][rf0_idx] = 0x2; + + rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + ((rf0_idx - 1) * 0x4000) + (rf56_current_temp[rf_path][rf0_idx] & 0xfffe0); + + RF_DBG(dm, DBG_RF_IQK, + "[TGGC] rf56[%d][%d]=0x%05x rf33[%d][%d]=0x%05x\n", + rf_path, rf0_idx, + rf56_current_temp[rf_path][rf0_idx], rf_path, + rf0_idx, rf33[rf_path][rf0_idx]); + + odm_set_rf_reg(dm, rf_path, RF_0x33, bRFRegOffsetMask, rf33[rf_path][rf0_idx]); + } + + odm_set_rf_reg(dm, rf_path, RF_0xef, bRFRegOffsetMask, 0x00000); + } +} +#endif + +void odm_tx_gain_gap_calibration(void *dm_void) +{ + PDM_ODM_T dm = (PDM_ODM_T)dm_void; +#if (RTL8197F_SUPPORT == 1) + if (dm->SupportICType & ODM_RTL8197F) + odm_tx_gain_gap_calibration_8197f(dm_void); +#endif +} diff --git a/hal/phydm/halrf/halrf_txgapcal.h b/hal/phydm/halrf/halrf_txgapcal.h index c404114..09651cb 100644 --- a/hal/phydm/halrf/halrf_txgapcal.h +++ b/hal/phydm/halrf/halrf_txgapcal.h @@ -22,8 +22,10 @@ * Larry Finger * *****************************************************************************/ -void -odm_tx_gain_gap_calibration( - void *dm_void -); - + +#ifndef __HALRF_TXGAPCAL_H__ +#define __HALRF_TXGAPCAL_H__ + +void odm_tx_gain_gap_calibration(void *dm_void); + +#endif /*__HALRF_TXGAPCAL_H__*/ diff --git a/hal/phydm/halrf/rtl8188e/halrf_8188e_ap.c b/hal/phydm/halrf/rtl8188e/halrf_8188e_ap.c index 8b4b9fd..0c0fa49 100644 --- a/hal/phydm/halrf/rtl8188e/halrf_8188e_ap.c +++ b/hal/phydm/halrf/rtl8188e/halrf_8188e_ap.c @@ -32,36 +32,36 @@ void halrf_rf_lna_setting_8188e( struct dm_struct *dm, - enum phydm_lna_set type + enum halrf_lna_set type ) { /*phydm_disable_lna*/ - if (type == phydm_lna_disable) { - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0x37f82); /*disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); + if (type == HALRF_LNA_DISABLE) { + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); /*select Rx mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0000f); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x37f82); /*disable LNA*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x0); if (dm->rf_type > RF_1T1R) { - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0xfffff, 0x18000); - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0x37f82); - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x0); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x0000f); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x37f82); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x0); } - } else if (type == phydm_lna_enable) { + } else if (type == HALRF_LNA_ENABLE) { /*phydm_enable_lna*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0x77f82); /*back to normal*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); /*select Rx mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0000f); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x77f82); /*back to normal*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x0); if (dm->rf_type > RF_1T1R) { - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0xfffff, 0x18000); - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0x77f82); - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x0); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x0000f); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x77f82); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x0); } } @@ -137,7 +137,7 @@ void set_iqk_matrix_8188e( } } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", (u32)iqk_result_x, (u32)iqk_result_y, (u32)ele_A, (u32)ele_C, (u32)ele_D, (u32)iqk_result_x, (u32)iqk_result_y); } @@ -184,7 +184,7 @@ odm_tx_pwr_track_set_pwr88_e( /* u8 cck_power_level[MAX_TX_COUNT], ofdm_power_level[MAX_TX_COUNT]; * u8 bw20_power_level[MAX_TX_COUNT], bw40_power_level[MAX_TX_COUNT]; * u8 rf = 0; */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "odm_TxPwrTrackSetPwr88E CH=%d\n", *(dm->channel)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "odm_TxPwrTrackSetPwr88E CH=%d\n", *(dm->channel)); #if (DM_ODM_SUPPORT_TYPE & ODM_AP) phy_rf6052_set_cck_tx_power(dm->priv, *(dm->channel)); phy_rf6052_set_ofdm_tx_power(dm->priv, *(dm->channel)); @@ -258,37 +258,37 @@ phy_path_a_iqk_8188e( u32 reg_eac, reg_e94, reg_e9c, reg_ea4; u8 result = 0x00; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A IQK!\n"); /* 1 Tx IQK */ /* path-A IQK setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path-A IQK setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "path-A IQK setting!\n"); odm_set_bb_reg(dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x10008c1c); odm_set_bb_reg(dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x30008c1c); odm_set_bb_reg(dm, REG_TX_IQK_PI_A, MASKDWORD, 0x8214032a); odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28160000); /* LO calibration setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "LO calibration setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "LO calibration setting!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x00462911); /* One shot, path A LOK & IQK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "One shot, path A LOK & IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "One shot, path A LOK & IQK!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); /* delay x ms */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); + RF_DBG(dm, DBG_RF_IQK, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); /* platform_stall_execution(IQK_DELAY_TIME_88E*1000); */ ODM_delay_ms(IQK_DELAY_TIME_88E); /* Check failed */ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeac = 0x%x\n", reg_eac); + RF_DBG(dm, DBG_RF_IQK, "0xeac = 0x%x\n", reg_eac); reg_e94 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe94 = 0x%x\n", reg_e94); + RF_DBG(dm, DBG_RF_IQK, "0xe94 = 0x%x\n", reg_e94); reg_e9c = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe9c = 0x%x\n", reg_e9c); + RF_DBG(dm, DBG_RF_IQK, "0xe9c = 0x%x\n", reg_e9c); reg_ea4 = odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xea4 = 0x%x\n", reg_ea4); + RF_DBG(dm, DBG_RF_IQK, "0xea4 = 0x%x\n", reg_ea4); if (!(reg_eac & BIT(28)) && (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && @@ -319,11 +319,11 @@ phy_path_a_rx_iqk( u32 reg_eac, reg_e94, reg_e9c, reg_ea4, u4tmp; u8 result = 0x00; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Rx IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Rx IQK!\n"); /* 1 Get TXIMR setting */ /* modify RXIQK mode table */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path-A Rx IQK modify RXIQK mode table!\n"); + RF_DBG(dm, DBG_RF_IQK, "path-A Rx IQK modify RXIQK mode table!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0); odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, RFREGOFFSETMASK, 0x800a0); odm_set_rf_reg(dm, RF_PATH_A, RF_RCK_OS, RFREGOFFSETMASK, 0x30000); @@ -342,25 +342,25 @@ phy_path_a_rx_iqk( odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28160000); /* LO calibration setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "LO calibration setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "LO calibration setting!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x0046a911); /* One shot, path A LOK & IQK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "One shot, path A LOK & IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "One shot, path A LOK & IQK!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); /* delay x ms */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); + RF_DBG(dm, DBG_RF_IQK, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); /* platform_stall_execution(IQK_DELAY_TIME_88E*1000); */ ODM_delay_ms(IQK_DELAY_TIME_88E); /* Check failed */ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeac = 0x%x\n", reg_eac); + RF_DBG(dm, DBG_RF_IQK, "0xeac = 0x%x\n", reg_eac); reg_e94 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe94 = 0x%x\n", reg_e94); + RF_DBG(dm, DBG_RF_IQK, "0xe94 = 0x%x\n", reg_e94); reg_e9c = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe9c = 0x%x\n", reg_e9c); + RF_DBG(dm, DBG_RF_IQK, "0xe9c = 0x%x\n", reg_e9c); if (!(reg_eac & BIT(28)) && (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && @@ -372,12 +372,12 @@ phy_path_a_rx_iqk( u4tmp = 0x80007C00 | (reg_e94 & 0x3FF0000) | ((reg_e9c & 0x3FF0000) >> 16); odm_set_bb_reg(dm, REG_TX_IQK, MASKDWORD, u4tmp); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe40 = 0x%x u4tmp = 0x%x\n", odm_get_bb_reg(dm, REG_TX_IQK, MASKDWORD), u4tmp); + RF_DBG(dm, DBG_RF_IQK, "0xe40 = 0x%x u4tmp = 0x%x\n", odm_get_bb_reg(dm, REG_TX_IQK, MASKDWORD), u4tmp); /* 1 RX IQK */ /* modify RXIQK mode table */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path-A Rx IQK modify RXIQK mode table 2!\n"); + RF_DBG(dm, DBG_RF_IQK, "path-A Rx IQK modify RXIQK mode table 2!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0); odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, RFREGOFFSETMASK, 0x800a0); odm_set_rf_reg(dm, RF_PATH_A, RF_RCK_OS, RFREGOFFSETMASK, 0x30000); @@ -395,28 +395,28 @@ phy_path_a_rx_iqk( odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28160c05); /* LO calibration setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "LO calibration setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "LO calibration setting!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x0046a911); /* One shot, path A LOK & IQK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "One shot, path A LOK & IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "One shot, path A LOK & IQK!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); /* delay x ms */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); + RF_DBG(dm, DBG_RF_IQK, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); /* platform_stall_execution(IQK_DELAY_TIME_88E*1000); */ ODM_delay_ms(IQK_DELAY_TIME_88E); /* Check failed */ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeac = 0x%x\n", reg_eac); + RF_DBG(dm, DBG_RF_IQK, "0xeac = 0x%x\n", reg_eac); reg_e94 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe94 = 0x%x\n", reg_e94); + RF_DBG(dm, DBG_RF_IQK, "0xe94 = 0x%x\n", reg_e94); reg_e9c = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe9c = 0x%x\n", reg_e9c); + RF_DBG(dm, DBG_RF_IQK, "0xe9c = 0x%x\n", reg_e9c); reg_ea4 = odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xea4 = 0x%x\n", reg_ea4); + RF_DBG(dm, DBG_RF_IQK, "0xea4 = 0x%x\n", reg_ea4); #if 0 if (!(reg_eac & BIT(28)) && @@ -432,7 +432,7 @@ phy_path_a_rx_iqk( (((reg_eac & 0x03FF0000) >> 16) != 0x36)) result |= 0x02; else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Rx IQK fail!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Rx IQK fail!!\n"); return result; @@ -446,29 +446,29 @@ phy_path_b_iqk_8188e( { u32 reg_eac, reg_eb4, reg_ebc, reg_ec4, reg_ecc; u8 result = 0x00; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "path B IQK!\n"); /* One shot, path B LOK & IQK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "One shot, path A LOK & IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "One shot, path A LOK & IQK!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_CONT, MASKDWORD, 0x00000002); odm_set_bb_reg(dm, REG_IQK_AGC_CONT, MASKDWORD, 0x00000000); /* delay x ms */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME_88E); + RF_DBG(dm, DBG_RF_IQK, "delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME_88E); /* platform_stall_execution(IQK_DELAY_TIME_88E*1000); */ ODM_delay_ms(IQK_DELAY_TIME_88E); /* Check failed */ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeac = 0x%x\n", reg_eac); + RF_DBG(dm, DBG_RF_IQK, "0xeac = 0x%x\n", reg_eac); reg_eb4 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeb4 = 0x%x\n", reg_eb4); + RF_DBG(dm, DBG_RF_IQK, "0xeb4 = 0x%x\n", reg_eb4); reg_ebc = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_B, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xebc = 0x%x\n", reg_ebc); + RF_DBG(dm, DBG_RF_IQK, "0xebc = 0x%x\n", reg_ebc); reg_ec4 = odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_B_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xec4 = 0x%x\n", reg_ec4); + RF_DBG(dm, DBG_RF_IQK, "0xec4 = 0x%x\n", reg_ec4); reg_ecc = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_B_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xecc = 0x%x\n", reg_ecc); + RF_DBG(dm, DBG_RF_IQK, "0xecc = 0x%x\n", reg_ecc); if (!(reg_eac & BIT(31)) && (((reg_eb4 & 0x03FF0000) >> 16) != 0x142) && @@ -482,7 +482,7 @@ phy_path_b_iqk_8188e( (((reg_ecc & 0x03FF0000) >> 16) != 0x36)) result |= 0x02; else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B Rx IQK fail!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path B Rx IQK fail!!\n"); return result; @@ -500,7 +500,7 @@ _phy_path_a_fill_iqk_matrix( { u32 oldval_0, X, TX0_A, reg; s32 Y, TX0_C; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"); + RF_DBG(dm, DBG_RF_IQK, "path A IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"); if (final_candidate == 0xFF) return; @@ -512,7 +512,7 @@ _phy_path_a_fill_iqk_matrix( if ((X & 0x00000200) != 0) X = X | 0xFFFFFC00; TX0_A = (X * oldval_0) >> 8; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "X = 0x%x, TX0_A = 0x%x, oldval_0 0x%x\n", X, TX0_A, oldval_0); + RF_DBG(dm, DBG_RF_IQK, "X = 0x%x, TX0_A = 0x%x, oldval_0 0x%x\n", X, TX0_A, oldval_0); odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0x3FF, TX0_A); odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(31), ((X * oldval_0 >> 7) & 0x1)); @@ -523,14 +523,14 @@ _phy_path_a_fill_iqk_matrix( TX0_C = (Y * oldval_0) >> 8; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Y = 0x%x, TX = 0x%x\n", Y, TX0_C); + RF_DBG(dm, DBG_RF_IQK, "Y = 0x%x, TX = 0x%x\n", Y, TX0_C); odm_set_bb_reg(dm, REG_OFDM_0_XC_TX_AFE, 0xF0000000, ((TX0_C & 0x3C0) >> 6)); odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0x003F0000, (TX0_C & 0x3F)); odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(29), ((Y * oldval_0 >> 7) & 0x1)); if (is_tx_only) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "_phy_path_a_fill_iqk_matrix only Tx OK\n"); + RF_DBG(dm, DBG_RF_IQK, "_phy_path_a_fill_iqk_matrix only Tx OK\n"); return; } @@ -560,7 +560,7 @@ _phy_path_b_fill_iqk_matrix( { u32 oldval_1, X, TX1_A, reg; s32 Y, TX1_C; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"); + RF_DBG(dm, DBG_RF_IQK, "path B IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"); if (final_candidate == 0xFF) return; @@ -572,7 +572,7 @@ _phy_path_b_fill_iqk_matrix( if ((X & 0x00000200) != 0) X = X | 0xFFFFFC00; TX1_A = (X * oldval_1) >> 8; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "X = 0x%x, TX1_A = 0x%x\n", X, TX1_A); + RF_DBG(dm, DBG_RF_IQK, "X = 0x%x, TX1_A = 0x%x\n", X, TX1_A); odm_set_bb_reg(dm, REG_OFDM_0_XB_TX_IQ_IMBALANCE, 0x3FF, TX1_A); odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(27), ((X * oldval_1 >> 7) & 0x1)); @@ -582,7 +582,7 @@ _phy_path_b_fill_iqk_matrix( Y = Y | 0xFFFFFC00; TX1_C = (Y * oldval_1) >> 8; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C); + RF_DBG(dm, DBG_RF_IQK, "Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C); odm_set_bb_reg(dm, REG_OFDM_0_XD_TX_AFE, 0xF0000000, ((TX1_C & 0x3C0) >> 6)); odm_set_bb_reg(dm, REG_OFDM_0_XB_TX_IQ_IMBALANCE, 0x003F0000, (TX1_C & 0x3F)); @@ -612,7 +612,7 @@ _phy_save_adda_registers( { u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Save ADDA parameters.\n"); + RF_DBG(dm, DBG_RF_IQK, "Save ADDA parameters.\n"); for (i = 0 ; i < register_num ; i++) adda_backup[i] = odm_get_bb_reg(dm, adda_reg[i], MASKDWORD); } @@ -626,7 +626,7 @@ _phy_save_mac_registers( ) { u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Save MAC parameters.\n"); + RF_DBG(dm, DBG_RF_IQK, "Save MAC parameters.\n"); for (i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++) mac_backup[i] = odm_read_1byte(dm, mac_reg[i]); mac_backup[i] = odm_read_4byte(dm, mac_reg[i]); @@ -643,7 +643,7 @@ _phy_reload_adda_registers( ) { u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Reload ADDA power saving parameters !\n"); + RF_DBG(dm, DBG_RF_IQK, "Reload ADDA power saving parameters !\n"); for (i = 0 ; i < regiester_num; i++) odm_set_bb_reg(dm, adda_reg[i], MASKDWORD, adda_backup[i]); } @@ -656,7 +656,7 @@ _phy_reload_mac_registers( ) { u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Reload MAC parameters !\n"); + RF_DBG(dm, DBG_RF_IQK, "Reload MAC parameters !\n"); for (i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++) odm_write_1byte(dm, mac_reg[i], (u8)mac_backup[i]); odm_write_4byte(dm, mac_reg[i], mac_backup[i]); @@ -673,7 +673,7 @@ _phy_path_adda_on( { u32 path_on; u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "ADDA ON.\n"); + RF_DBG(dm, DBG_RF_IQK, "ADDA ON.\n"); path_on = is_path_a_on ? 0x04db25a4 : 0x0b1b25a4; if (false == is2T) { @@ -695,7 +695,7 @@ _phy_mac_setting_calibration( ) { u32 i = 0; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "MAC settings for Calibration.\n"); + RF_DBG(dm, DBG_RF_IQK, "MAC settings for Calibration.\n"); odm_write_1byte(dm, mac_reg[i], 0x3F); @@ -710,10 +710,10 @@ _phy_path_a_stand_by( struct dm_struct *dm ) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path-A standby mode!\n"); + RF_DBG(dm, DBG_RF_IQK, "path-A standby mode!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x0); - odm_set_bb_reg(dm, 0x840, MASKDWORD, 0x00010000); + odm_set_bb_reg(dm, R_0x840, MASKDWORD, 0x00010000); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x808000); } @@ -724,7 +724,7 @@ _phy_pi_mode_switch( ) { u32 mode; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "BB Switch to %s mode!\n", (pi_mode ? "PI" : "SI")); + RF_DBG(dm, DBG_RF_IQK, "BB Switch to %s mode!\n", (pi_mode ? "PI" : "SI")); mode = pi_mode ? 0x01000100 : 0x01000000; odm_set_bb_reg(dm, REG_FPGA0_XA_HSSI_PARAMETER1, MASKDWORD, mode); @@ -749,7 +749,7 @@ phy_simularity_compare_8188e( else bound = 4; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "===> IQK:phy_simularity_compare_8188e c1 %d c2 %d!!!\n", c1, c2); + RF_DBG(dm, DBG_RF_IQK, "===> IQK:phy_simularity_compare_8188e c1 %d c2 %d!!!\n", c1, c2); simularity_bit_map = 0; @@ -757,7 +757,7 @@ phy_simularity_compare_8188e( for (i = 0; i < bound; i++) { diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); if (diff > MAX_TOLERANCE) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK:phy_simularity_compare_8188e differnece overflow index %d compare1 0x%x compare2 0x%x!!!\n", i, result[c1][i], result[c2][i]); + RF_DBG(dm, DBG_RF_IQK, "IQK:phy_simularity_compare_8188e differnece overflow index %d compare1 0x%x compare2 0x%x!!!\n", i, result[c1][i], result[c2][i]); if ((i == 2 || i == 6) && !simularity_bit_map) { if (result[c1][i] + result[c1][i + 1] == 0) @@ -771,7 +771,7 @@ phy_simularity_compare_8188e( } } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK:phy_simularity_compare_8188e simularity_bit_map %d !!!\n", simularity_bit_map); + RF_DBG(dm, DBG_RF_IQK, "IQK:phy_simularity_compare_8188e simularity_bit_map %d !!!\n", simularity_bit_map); if (simularity_bit_map == 0) { for (i = 0; i < (bound / 4); i++) { @@ -843,14 +843,14 @@ _phy_iq_calibrate_8188e( /* bbvalue = odm_get_bb_reg(dm, REG_FPGA0_RFMOD, MASKDWORD); * RTPRINT(FINIT, INIT_IQK, ("_phy_iq_calibrate_8188e()==>0x%08x\n",bbvalue)); */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t); + RF_DBG(dm, DBG_RF_IQK, "IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t); /* Save ADDA parameters, turn path A ADDA on */ _phy_save_adda_registers(dm, ADDA_REG, dm->rf_calibrate_info.ADDA_backup, IQK_ADDA_REG_NUM); _phy_save_mac_registers(dm, IQK_MAC_REG, dm->rf_calibrate_info.IQK_MAC_backup); _phy_save_adda_registers(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup, IQK_BB_REG_NUM); } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t); + RF_DBG(dm, DBG_RF_IQK, "IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t); _phy_path_adda_on(dm, ADDA_REG, true, is2T); @@ -892,7 +892,7 @@ _phy_iq_calibrate_8188e( odm_set_bb_reg(dm, REG_CONFIG_ANT_B, MASKDWORD, 0x0f600000); /* IQ calibration setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK setting!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x808000); odm_set_bb_reg(dm, REG_TX_IQK, MASKDWORD, 0x01007c00); odm_set_bb_reg(dm, REG_RX_IQK, MASKDWORD, 0x81004800); @@ -901,7 +901,7 @@ _phy_iq_calibrate_8188e( path_aok = phy_path_a_iqk_8188e(dm, is2T); /* if(path_aok == 0x03){ */ if (path_aok == 0x01) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Tx IQK Success!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Tx IQK Success!!\n"); result[t][0] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD) & 0x3FF0000) >> 16; result[t][1] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD) & 0x3FF0000) >> 16; break; @@ -919,18 +919,18 @@ _phy_iq_calibrate_8188e( for (i = 0 ; i < retry_count ; i++) { path_aok = phy_path_a_rx_iqk(dm, is2T); if (path_aok == 0x03) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Rx IQK Success!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Rx IQK Success!!\n"); /* result[t][0] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD)&0x3FF0000)>>16; * result[t][1] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD)&0x3FF0000)>>16; */ result[t][2] = (odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16; result[t][3] = (odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16; break; } else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Rx IQK Fail!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Rx IQK Fail!!\n"); } if (0x00 == path_aok) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A IQK failed!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A IQK failed!!\n"); if (is2T) { _phy_path_a_stand_by(dm); @@ -941,25 +941,25 @@ _phy_iq_calibrate_8188e( for (i = 0 ; i < retry_count ; i++) { path_bok = phy_path_b_iqk_8188e(dm); if (path_bok == 0x03) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B IQK Success!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path B IQK Success!!\n"); result[t][4] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD) & 0x3FF0000) >> 16; result[t][5] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_B, MASKDWORD) & 0x3FF0000) >> 16; result[t][6] = (odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_B_2, MASKDWORD) & 0x3FF0000) >> 16; result[t][7] = (odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_B_2, MASKDWORD) & 0x3FF0000) >> 16; break; } else if (i == (retry_count - 1) && path_bok == 0x01) { /* Tx IQK OK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B Only Tx IQK Success!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path B Only Tx IQK Success!!\n"); result[t][4] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD) & 0x3FF0000) >> 16; result[t][5] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_B, MASKDWORD) & 0x3FF0000) >> 16; } } if (0x00 == path_bok) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B IQK failed!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path B IQK failed!!\n"); } /* Back to BB mode, load original value */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK:Back to BB mode, load original value!\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK:Back to BB mode, load original value!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0); if (t != 0) { @@ -985,7 +985,7 @@ _phy_iq_calibrate_8188e( odm_set_bb_reg(dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x01008c00); } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "_phy_iq_calibrate_8188e() <==\n"); + RF_DBG(dm, DBG_RF_IQK, "_phy_iq_calibrate_8188e() <==\n"); } @@ -1068,11 +1068,11 @@ phy_iq_calibrate_8188e( }; if (is_recovery) { - PHYDM_DBG(dm, ODM_COMP_INIT, "phy_iq_calibrate_8188e: Return due to is_recovery!\n"); + RF_DBG(dm, DBG_RF_INIT, "phy_iq_calibrate_8188e: Return due to is_recovery!\n"); _phy_reload_adda_registers(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup_recover, 9); return; } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK:Start!!!\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK:Start!!!\n"); iqk_info->iqk_times++; /*priv->pshare->IQK_total_cnt++;*/ @@ -1096,7 +1096,7 @@ phy_iq_calibrate_8188e( is12simular = phy_simularity_compare_8188e(dm, result, 0, 1); if (is12simular) { final_candidate = 0; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: is12simular final_candidate is %x\n", final_candidate); + RF_DBG(dm, DBG_RF_IQK, "IQK: is12simular final_candidate is %x\n", final_candidate); break; } } @@ -1104,13 +1104,13 @@ phy_iq_calibrate_8188e( is13simular = phy_simularity_compare_8188e(dm, result, 0, 2); if (is13simular) { final_candidate = 0; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: is13simular final_candidate is %x\n", final_candidate); + RF_DBG(dm, DBG_RF_IQK, "IQK: is13simular final_candidate is %x\n", final_candidate); break; } is23simular = phy_simularity_compare_8188e(dm, result, 1, 2); if (is23simular) { final_candidate = 1; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: is23simular final_candidate is %x\n", final_candidate); + RF_DBG(dm, DBG_RF_IQK, "IQK: is23simular final_candidate is %x\n", final_candidate); } else { for (i = 0; i < 8; i++) reg_tmp += result[3][i]; @@ -1132,7 +1132,7 @@ phy_iq_calibrate_8188e( regebc = result[i][5]; regec4 = result[i][6]; regecc = result[i][7]; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc); + RF_DBG(dm, DBG_RF_IQK, "IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc); } if (final_candidate != 0xff) { dm->rf_calibrate_info.rege94 = rege94 = result[final_candidate][0]; @@ -1143,11 +1143,11 @@ phy_iq_calibrate_8188e( dm->rf_calibrate_info.regebc = regebc = result[final_candidate][5]; regec4 = result[final_candidate][6]; regecc = result[final_candidate][7]; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: final_candidate is %x\n", final_candidate); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc); + RF_DBG(dm, DBG_RF_IQK, "IQK: final_candidate is %x\n", final_candidate); + RF_DBG(dm, DBG_RF_IQK, "IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc); is_patha_ok = is_pathb_ok = true; } else { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: FAIL use default value\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK: FAIL use default value\n"); dm->rf_calibrate_info.rege94 = dm->rf_calibrate_info.regeb4 = 0x100; /* X default value */ dm->rf_calibrate_info.rege9c = dm->rf_calibrate_info.regebc = 0x0; /* Y default value */ @@ -1167,10 +1167,10 @@ phy_iq_calibrate_8188e( dm->rf_calibrate_info.iqk_matrix_reg_setting[indexforchannel].is_iqk_done = true; } /* RTPRINT(FINIT, INIT_IQK, ("\nIQK OK indexforchannel %d.\n", indexforchannel)); */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "\nIQK OK indexforchannel %d.\n", indexforchannel); + RF_DBG(dm, DBG_RF_IQK, "\nIQK OK indexforchannel %d.\n", indexforchannel); _phy_save_adda_registers(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup_recover, IQK_BB_REG_NUM); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK finished\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK finished\n"); #if 0 /* Suggested by Edlu,120413 */ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) @@ -1207,7 +1207,7 @@ void _phy_set_rf_path_switch_8188e( /* <20120504, Kordan> [8188E] We should make AntDiversity controlled by HW (0x870[9:8] = 0), */ /* otherwise the following action has no effect. (0x860[9:8] has the effect only if AntDiversity controlled by SW) */ odm_set_bb_reg(dm, REG_FPGA0_XAB_RF_INTERFACE_SW, BIT(8) | BIT(9), 0x0); - odm_set_bb_reg(dm, 0x914, MASKLWORD, 0x0201); /* Set up the ant mapping table */ + odm_set_bb_reg(dm, R_0x914, MASKLWORD, 0x0201); /* Set up the ant mapping table */ if (is_main) { /* odm_set_bb_reg(dm, REG_FPGA0_XA_RF_INTERFACE_OE, BIT(8)|BIT9, 0x2); */ /* Tx Main (SW control)(The right antenna) */ @@ -1217,7 +1217,7 @@ void _phy_set_rf_path_switch_8188e( /* 4 [ Rx ] */ odm_set_bb_reg(dm, REG_FPGA0_XB_RF_INTERFACE_OE, BIT(5) | BIT(4) | BIT(3), 0x1); /* ant_div_type = TRDiv, right antenna */ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) - odm_set_bb_reg(dm, 0xb2c, BIT(31), 0x1); /* RxCG, Default is RxCG. ant_div_type = 2RDiv, left antenna */ + odm_set_bb_reg(dm, R_0xb2c, BIT(31), 0x1); /* RxCG, Default is RxCG. ant_div_type = 2RDiv, left antenna */ } else { /* odm_set_bb_reg(dm, REG_FPGA0_XA_RF_INTERFACE_OE, BIT(8)|BIT9, 0x1); */ /* Tx Aux (SW control)(The left antenna) */ @@ -1227,7 +1227,7 @@ void _phy_set_rf_path_switch_8188e( /* 4 [ Rx ] */ odm_set_bb_reg(dm, REG_FPGA0_XB_RF_INTERFACE_OE, BIT(5) | BIT(4) | BIT(3), 0x0); /* ant_div_type = TRDiv, left antenna */ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) - odm_set_bb_reg(dm, 0xb2c, BIT(31), 0x0); /* RxCS, ant_div_type = 2RDiv, right antenna */ + odm_set_bb_reg(dm, R_0xb2c, BIT(31), 0x0); /* RxCS, ant_div_type = 2RDiv, right antenna */ } } diff --git a/hal/phydm/halrf/rtl8188e/halrf_8188e_ap.h b/hal/phydm/halrf/rtl8188e/halrf_8188e_ap.h index cb6700c..10ecd2d 100644 --- a/hal/phydm/halrf/rtl8188e/halrf_8188e_ap.h +++ b/hal/phydm/halrf/rtl8188e/halrf_8188e_ap.h @@ -13,8 +13,8 @@ * *****************************************************************************/ -#ifndef __HAL_PHY_RF_8188E_H__ -#define __HAL_PHY_RF_8188E_H__ +#ifndef __HALRF_8188E_H__ +#define __HALRF_8188E_H__ /*--------------------------Define Parameters-------------------------------*/ #define IQK_DELAY_TIME_88E 10 /* ms */ @@ -98,7 +98,7 @@ _phy_path_a_stand_by( void halrf_rf_lna_setting_8188e( struct dm_struct *dm, - enum phydm_lna_set type + enum halrf_lna_set type ); -#endif /* #ifndef __HAL_PHY_RF_8188E_H__ */ +#endif /*#ifndef __HALRF_8188E_H__*/ diff --git a/hal/phydm/halrf/rtl8188e/halrf_8188e_ce.c b/hal/phydm/halrf/rtl8188e/halrf_8188e_ce.c index cd4f6c4..9b57230 100644 --- a/hal/phydm/halrf/rtl8188e/halrf_8188e_ce.c +++ b/hal/phydm/halrf/rtl8188e/halrf_8188e_ce.c @@ -16,71 +16,59 @@ #include "mp_precomp.h" #include "../../phydm_precomp.h" - - /*---------------------------Define Local Constant---------------------------*/ /* 2010/04/25 MH Define the max tx power tracking tx agc power. */ -#define ODM_TXPWRTRACK_MAX_IDX_88E 6 +#define ODM_TXPWRTRACK_MAX_IDX_88E 6 /*---------------------------Define Local Constant---------------------------*/ - /* 3============================================================ * 3 Tx Power Tracking * 3============================================================ */ -void halrf_rf_lna_setting_8188e( - struct dm_struct *dm, - enum phydm_lna_set type -) +void halrf_rf_lna_setting_8188e(struct dm_struct *dm, enum halrf_lna_set type) { -/*phydm_disable_lna*/ - if (type == phydm_lna_disable) { - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0x37f82); /*disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); + /*phydm_disable_lna*/ + if (type == HALRF_LNA_DISABLE) { + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); /*select Rx mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0000f); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x37f82); /*disable LNA*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x0); if (dm->rf_type > RF_1T1R) { - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0xfffff, 0x18000); - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0x37f82); - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x0); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x0000f); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x37f82); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x0); } - } else if (type == phydm_lna_enable) { + } else if (type == HALRF_LNA_ENABLE) { /*phydm_enable_lna*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0x77f82); /*back to normal*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); /*select Rx mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0000f); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x77f82); /*back to normal*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x0); if (dm->rf_type > RF_1T1R) { - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0xfffff, 0x18000); - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0x77f82); - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x0); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x0000f); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x77f82); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x0); } - } } -void set_iqk_matrix_8188e( - struct dm_struct *dm, - u8 OFDM_index, - u8 rf_path, - s32 iqk_result_x, - s32 iqk_result_y -) +void set_iqk_matrix_8188e(struct dm_struct *dm, u8 OFDM_index, u8 rf_path, + s32 iqk_result_x, s32 iqk_result_y) { - s32 ele_A = 0, ele_D, ele_C = 0, value32; + s32 ele_A = 0, ele_D, ele_C = 0, value32; ele_D = (ofdm_swing_table_new[OFDM_index] & 0xFFC00000) >> 22; /* new element A = element D x X */ - if ((iqk_result_x != 0) && (*(dm->band_type) == ODM_BAND_2_4G)) { - if ((iqk_result_x & 0x00000200) != 0) /* consider minus */ + if (iqk_result_x != 0 && (*dm->band_type == ODM_BAND_2_4G)) { + if ((iqk_result_x & 0x00000200) != 0) /* consider minus */ iqk_result_x = iqk_result_x | 0xFFFFFC00; ele_A = ((iqk_result_x * ele_D) >> 8) & 0x000003FF; @@ -136,18 +124,16 @@ void set_iqk_matrix_8188e( } } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", - (u32)iqk_result_x, (u32)iqk_result_y, (u32)ele_A, (u32)ele_C, (u32)ele_D, (u32)iqk_result_x, (u32)iqk_result_y); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", + (u32)iqk_result_x, (u32)iqk_result_y, (u32)ele_A, (u32)ele_C, + (u32)ele_D, (u32)iqk_result_x, (u32)iqk_result_y); } -void do_iqk_8188e( - void *dm_void, - u8 delta_thermal_index, - u8 thermal_value, - u8 threshold -) +void do_iqk_8188e(void *dm_void, u8 delta_thermal_index, u8 thermal_value, + u8 threshold) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; odm_reset_iqk_result(dm); dm->rf_calibrate_info.thermal_value_iqk = thermal_value; @@ -171,27 +157,22 @@ void do_iqk_8188e( * 04/23/2012 MHC Create version 0. * *---------------------------------------------------------------------------*/ -void -odm_tx_pwr_track_set_pwr88_e( - void *dm_void, - enum pwrtrack_method method, - u8 rf_path, - u8 channel_mapped_index -) +void odm_tx_pwr_track_set_pwr88_e(void *dm_void, enum pwrtrack_method method, + u8 rf_path, u8 channel_mapped_index) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _ADAPTER *adapter = dm->adapter; - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); - u8 pwr_tracking_limit_ofdm = 30; /* +0dB */ - u8 pwr_tracking_limit_cck = 28; /* -2dB */ - u8 tx_rate = 0xFF; - u8 final_ofdm_swing_index = 0; - u8 final_cck_swing_index = 0; - u8 i = 0; - struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ADAPTER *adapter = dm->adapter; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); + u8 pwr_tracking_limit_ofdm = 30; /* +0dB */ + u8 pwr_tracking_limit_cck = 28; /* -2dB */ + u8 tx_rate = 0xFF; + u8 final_ofdm_swing_index = 0; + u8 final_cck_swing_index = 0; + u8 i = 0; + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); struct _hal_rf_ *rf = &(dm->rf_table); - if (*(dm->mp_mode) == true) { + if (*dm->mp_mode == true) { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) #if (MP_DRIVER == 1) @@ -208,7 +189,7 @@ odm_tx_pwr_track_set_pwr88_e( #endif #endif } else { - u16 rate = *(dm->forced_data_rate); + u16 rate = *(dm->forced_data_rate); if (!rate) { /*auto rate*/ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) @@ -219,17 +200,18 @@ odm_tx_pwr_track_set_pwr88_e( else tx_rate = rf->p_rate_index; #endif - } else /*force rate*/ + } else /*force rate*/ tx_rate = (u8)rate; } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "Power Tracking tx_rate=0x%X\n", tx_rate); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "===>ODM_TxPwrTrackSetPwr8188E\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Power Tracking tx_rate=0x%X\n", + tx_rate); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "===>ODM_TxPwrTrackSetPwr8188E\n"); if (tx_rate != 0xFF) { /* 2 CCK */ - if (((tx_rate >= MGN_1M) && (tx_rate <= MGN_5_5M)) || (tx_rate == MGN_11M)) - pwr_tracking_limit_cck = 28; /* -2dB */ + if ((tx_rate >= MGN_1M && tx_rate <= MGN_5_5M) || tx_rate == MGN_11M) + pwr_tracking_limit_cck = 28; /* -2dB */ /* 2 OFDM */ else if ((tx_rate >= MGN_6M) && (tx_rate <= MGN_48M)) pwr_tracking_limit_ofdm = 36; /* +3dB */ @@ -245,21 +227,23 @@ odm_tx_pwr_track_set_pwr88_e( pwr_tracking_limit_ofdm = 34; /* +2dB */ else - pwr_tracking_limit_ofdm = cali_info->default_ofdm_index; /*Default OFDM index = 30*/ + pwr_tracking_limit_ofdm = cali_info->default_ofdm_index; /*Default OFDM index = 30*/ } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "tx_rate=0x%x, pwr_tracking_limit=%d\n", tx_rate, pwr_tracking_limit_ofdm); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "tx_rate=0x%x, pwr_tracking_limit=%d\n", + tx_rate, pwr_tracking_limit_ofdm); if (method == TXAGC) { - u32 pwr = 0, tx_agc = 0; + u32 pwr = 0, tx_agc = 0; void *adapter = dm->adapter; - cali_info->remnant_ofdm_swing_idx[rf_path] = cali_info->absolute_ofdm_swing_idx[rf_path]; /*Remnant index equal to aboslute compensate value.*/ + cali_info->remnant_ofdm_swing_idx[rf_path] = cali_info->absolute_ofdm_swing_idx[rf_path]; /*Remnant index equal to aboslute compensate value.*/ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "odm_TxPwrTrackSetPwr88E CH=%d\n", *(dm->channel)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "odm_TxPwrTrackSetPwr88E CH=%d\n", *(dm->channel)); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - if (*(dm->mp_mode) == true) { + if (*dm->mp_mode == true) { pwr = phy_query_bb_reg(adapter, REG_TX_AGC_A_RATE18_06, 0xFF); pwr += dm->rf_calibrate_info.power_index_offset[RF_PATH_A]; phy_set_bb_reg(adapter, REG_TX_AGC_A_CCK_1_MCS32, MASKBYTE1, pwr); @@ -289,11 +273,10 @@ odm_tx_pwr_track_set_pwr88_e( } } - #endif #if (DM_ODM_SUPPORT_TYPE & ODM_AP) - /* phy_rf6052_set_cck_tx_power(dm->priv, *(dm->channel)); */ - /* phy_rf6052_set_ofdm_tx_power(dm->priv, *(dm->channel)); */ +/* phy_rf6052_set_cck_tx_power(dm->priv, *(dm->channel)); */ +/* phy_rf6052_set_ofdm_tx_power(dm->priv, *(dm->channel)); */ #endif } else if (method == BBSWING) { @@ -313,8 +296,8 @@ odm_tx_pwr_track_set_pwr88_e( /* Adjust BB swing by OFDM IQ matrix */ if (rf_path == RF_PATH_A) { set_iqk_matrix_8188e(dm, final_ofdm_swing_index, RF_PATH_A, - dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][0], - dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][1]); + dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][0], + dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][1]); /* Adjust BB swing by CCK filter coefficient */ if (*dm->channel != 14) { odm_write_1byte(dm, 0xa22, cck_swing_table_ch1_ch13_new[final_cck_swing_index][0]); @@ -337,44 +320,54 @@ odm_tx_pwr_track_set_pwr88_e( } } } else if (method == MIX_MODE) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "cali_info->default_ofdm_index=%d, dm->DefaultCCKIndex=%d, cali_info->absolute_ofdm_swing_idx[rf_path]=%d, rf_path = %d\n", - cali_info->default_ofdm_index, cali_info->default_cck_index, cali_info->absolute_ofdm_swing_idx[rf_path], rf_path); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "cali_info->default_ofdm_index=%d, dm->DefaultCCKIndex=%d, cali_info->absolute_ofdm_swing_idx[rf_path]=%d, rf_path = %d\n", + cali_info->default_ofdm_index, + cali_info->default_cck_index, + cali_info->absolute_ofdm_swing_idx[rf_path], rf_path); - final_cck_swing_index = cali_info->default_cck_index + cali_info->absolute_ofdm_swing_idx[rf_path]; + final_cck_swing_index = cali_info->default_cck_index + cali_info->absolute_ofdm_swing_idx[rf_path]; final_ofdm_swing_index = cali_info->default_ofdm_index + cali_info->absolute_ofdm_swing_idx[rf_path]; - if (final_ofdm_swing_index > pwr_tracking_limit_ofdm) { /* BBSwing higher then Limit */ + if (final_ofdm_swing_index > pwr_tracking_limit_ofdm) { /* BBSwing higher then Limit */ cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index - pwr_tracking_limit_ofdm; set_iqk_matrix_8188e(dm, pwr_tracking_limit_ofdm, RF_PATH_A, - dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][0], - dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][1]); + dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][0], + dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][1]); cali_info->modify_tx_agc_flag_path_a = true; phy_set_tx_power_index_by_rate_section(adapter, RF_PATH_A, *dm->channel, OFDM); phy_set_tx_power_index_by_rate_section(adapter, RF_PATH_A, *dm->channel, HT_MCS0_MCS7); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A Over BBSwing Limit, pwr_tracking_limit = %d, Remnant tx_agc value = %d\n", pwr_tracking_limit_ofdm, cali_info->remnant_ofdm_swing_idx[rf_path]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Path_A Over BBSwing Limit, pwr_tracking_limit = %d, Remnant tx_agc value = %d\n", + pwr_tracking_limit_ofdm, + cali_info->remnant_ofdm_swing_idx[rf_path]); } else if (final_ofdm_swing_index <= 0) { cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index; set_iqk_matrix_8188e(dm, 0, RF_PATH_A, - dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][0], - dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][1]); + dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][0], + dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][1]); cali_info->modify_tx_agc_flag_path_a = true; phy_set_tx_power_index_by_rate_section(adapter, RF_PATH_A, *dm->channel, OFDM); phy_set_tx_power_index_by_rate_section(adapter, RF_PATH_A, *dm->channel, HT_MCS0_MCS7); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A Lower then BBSwing lower bound 0, Remnant tx_agc value = %d\n", cali_info->remnant_ofdm_swing_idx[rf_path]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Path_A Lower then BBSwing lower bound 0, Remnant tx_agc value = %d\n", + cali_info->remnant_ofdm_swing_idx[rf_path]); } else { set_iqk_matrix_8188e(dm, final_ofdm_swing_index, RF_PATH_A, - dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][0], - dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][1]); + dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][0], + dm->rf_calibrate_info.iqk_matrix_reg_setting[channel_mapped_index].value[0][1]); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A Compensate with BBSwing, final_ofdm_swing_index = %d\n", final_ofdm_swing_index); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Path_A Compensate with BBSwing, final_ofdm_swing_index = %d\n", + final_ofdm_swing_index); if (cali_info->modify_tx_agc_flag_path_a) { /*If tx_agc has changed, reset tx_agc again*/ cali_info->remnant_ofdm_swing_idx[rf_path] = 0; @@ -384,14 +377,18 @@ odm_tx_pwr_track_set_pwr88_e( cali_info->modify_tx_agc_flag_path_a = false; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A dm->Modify_TxAGC_Flag = false\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Path_A dm->Modify_TxAGC_Flag = false\n"); } } if (final_cck_swing_index > pwr_tracking_limit_cck) { cali_info->remnant_cck_swing_idx = final_cck_swing_index - pwr_tracking_limit_cck; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A CCK Over Limit, pwr_tracking_limit_cck = %d, cali_info->remnant_cck_swing_idx = %d\n", pwr_tracking_limit_cck, cali_info->remnant_cck_swing_idx); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Path_A CCK Over Limit, pwr_tracking_limit_cck = %d, cali_info->remnant_cck_swing_idx = %d\n", + pwr_tracking_limit_cck, + cali_info->remnant_cck_swing_idx); /* Adjust BB swing by CCK filter coefficient */ @@ -422,7 +419,9 @@ odm_tx_pwr_track_set_pwr88_e( } else if (final_cck_swing_index <= 0) { /* Lowest CCK index = 0 */ cali_info->remnant_cck_swing_idx = final_cck_swing_index; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A CCK Under Limit, pwr_tracking_limit_cck = %d, cali_info->remnant_cck_swing_idx = %d\n", 0, cali_info->remnant_cck_swing_idx); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Path_A CCK Under Limit, pwr_tracking_limit_cck = %d, cali_info->remnant_cck_swing_idx = %d\n", + 0, cali_info->remnant_cck_swing_idx); if (*dm->channel != 14) { odm_write_1byte(dm, 0xa22, cck_swing_table_ch1_ch13_new[0][0]); @@ -449,7 +448,9 @@ odm_tx_pwr_track_set_pwr88_e( phy_set_tx_power_index_by_rate_section(adapter, RF_PATH_A, *dm->channel, CCK); } else { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A CCK Compensate with BBSwing, final_cck_swing_index = %d\n", final_cck_swing_index); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Path_A CCK Compensate with BBSwing, final_cck_swing_index = %d\n", + final_cck_swing_index); if (*dm->channel != 14) { odm_write_1byte(dm, 0xa22, cck_swing_table_ch1_ch13_new[final_cck_swing_index][0]); @@ -476,32 +477,28 @@ odm_tx_pwr_track_set_pwr88_e( phy_set_tx_power_index_by_rate_section(adapter, RF_PATH_A, *dm->channel, CCK); cali_info->modify_tx_agc_flag_path_a_cck = false; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A dm->Modify_TxAGC_Flag_CCK = false\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, + "******Path_A dm->Modify_TxAGC_Flag_CCK = false\n"); } } } else return; -} /* odm_TxPwrTrackSetPwr88E */ +} /* odm_TxPwrTrackSetPwr88E */ -void -get_delta_swing_table_8188e( - void *dm_void, - u8 **temperature_up_a, - u8 **temperature_down_a, - u8 **temperature_up_b, - u8 **temperature_down_b -) +void get_delta_swing_table_8188e(void *dm_void, u8 **temperature_up_a, + u8 **temperature_down_a, u8 **temperature_up_b, + u8 **temperature_down_b) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _ADAPTER *adapter = dm->adapter; - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); - struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ADAPTER *adapter = dm->adapter; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); struct _hal_rf_ *rf = &(dm->rf_table); - u8 tx_rate = 0xFF; - u8 channel = *dm->channel; + u8 tx_rate = 0xFF; + u8 channel = *dm->channel; - if (*(dm->mp_mode) == true) { + if (*dm->mp_mode == true) { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) #if (MP_DRIVER == 1) @@ -518,7 +515,7 @@ get_delta_swing_table_8188e( #endif #endif } else { - u16 rate = *(dm->forced_data_rate); + u16 rate = *(dm->forced_data_rate); if (!rate) { /*auto rate*/ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) @@ -529,11 +526,12 @@ get_delta_swing_table_8188e( else tx_rate = rf->p_rate_index; #endif - } else /*force rate*/ + } else /*force rate*/ tx_rate = (u8)rate; } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "Power Tracking tx_rate=0x%X\n", tx_rate); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Power Tracking tx_rate=0x%X\n", + tx_rate); if (1 <= channel && channel <= 14) { if (IS_CCK_RATE(tx_rate)) { @@ -547,12 +545,9 @@ get_delta_swing_table_8188e( *temperature_up_a = (u8 *)delta_swing_table_idx_2ga_p_8188e; *temperature_down_a = (u8 *)delta_swing_table_idx_2ga_n_8188e; } - } -void configure_txpower_track_8188e( - struct txpwrtrack_cfg *config -) +void configure_txpower_track_8188e(struct txpwrtrack_cfg *config) { config->swing_table_size_cck = CCK_TABLE_SIZE; config->swing_table_size_ofdm = OFDM_TABLE_SIZE; @@ -568,56 +563,56 @@ void configure_txpower_track_8188e( } /* 1 7. IQK */ -#define MAX_TOLERANCE 5 -#define IQK_DELAY_TIME 1 /* ms */ +#define MAX_TOLERANCE 5 +#define IQK_DELAY_TIME 1 /* ms */ -u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ -phy_path_a_iqk_8188e( - struct dm_struct *dm, - boolean config_path_b -) +u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ + phy_path_a_iqk_8188e( + struct dm_struct *dm, + boolean config_path_b) { u32 reg_eac, reg_e94, reg_e9c, reg_ea4; u8 result = 0x00; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A IQK!\n"); /* 1 Tx IQK */ /* path-A IQK setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path-A IQK setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "path-A IQK setting!\n"); odm_set_bb_reg(dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x10008c1c); odm_set_bb_reg(dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x30008c1c); odm_set_bb_reg(dm, REG_TX_IQK_PI_A, MASKDWORD, 0x8214032a); odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28160000); /* LO calibration setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "LO calibration setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "LO calibration setting!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x00462911); /* One shot, path A LOK & IQK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "One shot, path A LOK & IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "One shot, path A LOK & IQK!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); /* delay x ms */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); + RF_DBG(dm, DBG_RF_IQK, "delay %d ms for One shot, path A LOK & IQK.\n", + IQK_DELAY_TIME_88E); /* platform_stall_execution(IQK_DELAY_TIME_88E*1000); */ ODM_delay_ms(IQK_DELAY_TIME_88E); /* Check failed */ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeac = 0x%x\n", reg_eac); + RF_DBG(dm, DBG_RF_IQK, "0xeac = 0x%x\n", reg_eac); reg_e94 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe94 = 0x%x\n", reg_e94); + RF_DBG(dm, DBG_RF_IQK, "0xe94 = 0x%x\n", reg_e94); reg_e9c = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe9c = 0x%x\n", reg_e9c); + RF_DBG(dm, DBG_RF_IQK, "0xe9c = 0x%x\n", reg_e9c); reg_ea4 = odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xea4 = 0x%x\n", reg_ea4); + RF_DBG(dm, DBG_RF_IQK, "0xea4 = 0x%x\n", reg_ea4); if (!(reg_eac & BIT(28)) && (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && (((reg_e9c & 0x03FF0000) >> 16) != 0x42)) result |= 0x01; - else /* if Tx not OK, ignore Rx */ + else /* if Tx not OK, ignore Rx */ return result; #if 0 @@ -630,23 +625,20 @@ phy_path_a_iqk_8188e( #endif return result; - - } -u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ -phy_path_a_rx_iqk( - struct dm_struct *dm, - boolean config_path_b -) +u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ + phy_path_a_rx_iqk( + struct dm_struct *dm, + boolean config_path_b) { u32 reg_eac, reg_e94, reg_e9c, reg_ea4, u4tmp; u8 result = 0x00; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Rx IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Rx IQK!\n"); /* 1 Get TXIMR setting */ /* modify RXIQK mode table */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path-A Rx IQK modify RXIQK mode table!\n"); + RF_DBG(dm, DBG_RF_IQK, "path-A Rx IQK modify RXIQK mode table!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, MASKH3BYTES, 0x000000); odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, RFREGOFFSETMASK, 0x800a0); odm_set_rf_reg(dm, RF_PATH_A, RF_RCK_OS, RFREGOFFSETMASK, 0x30000); @@ -665,43 +657,43 @@ phy_path_a_rx_iqk( odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28160000); /* LO calibration setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "LO calibration setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "LO calibration setting!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x0046a911); /* One shot, path A LOK & IQK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "One shot, path A LOK & IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "One shot, path A LOK & IQK!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); /* delay x ms */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); + RF_DBG(dm, DBG_RF_IQK, "delay %d ms for One shot, path A LOK & IQK.\n", + IQK_DELAY_TIME_88E); /* platform_stall_execution(IQK_DELAY_TIME_88E*1000); */ ODM_delay_ms(IQK_DELAY_TIME_88E); - /* Check failed */ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeac = 0x%x\n", reg_eac); + RF_DBG(dm, DBG_RF_IQK, "0xeac = 0x%x\n", reg_eac); reg_e94 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe94 = 0x%x\n", reg_e94); + RF_DBG(dm, DBG_RF_IQK, "0xe94 = 0x%x\n", reg_e94); reg_e9c = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe9c = 0x%x\n", reg_e9c); + RF_DBG(dm, DBG_RF_IQK, "0xe9c = 0x%x\n", reg_e9c); if (!(reg_eac & BIT(28)) && (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && (((reg_e9c & 0x03FF0000) >> 16) != 0x42)) result |= 0x01; - else /* if Tx not OK, ignore Rx */ + else /* if Tx not OK, ignore Rx */ return result; - u4tmp = 0x80007C00 | (reg_e94 & 0x3FF0000) | ((reg_e9c & 0x3FF0000) >> 16); + u4tmp = 0x80007C00 | (reg_e94 & 0x3FF0000) | ((reg_e9c & 0x3FF0000) >> 16); odm_set_bb_reg(dm, REG_TX_IQK, MASKDWORD, u4tmp); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe40 = 0x%x u4tmp = 0x%x\n", odm_get_bb_reg(dm, REG_TX_IQK, MASKDWORD), u4tmp); - + RF_DBG(dm, DBG_RF_IQK, "0xe40 = 0x%x u4tmp = 0x%x\n", + odm_get_bb_reg(dm, REG_TX_IQK, MASKDWORD), u4tmp); /* 1 RX IQK */ /* modify RXIQK mode table */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path-A Rx IQK modify RXIQK mode table 2!\n"); + RF_DBG(dm, DBG_RF_IQK, "path-A Rx IQK modify RXIQK mode table 2!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, MASKH3BYTES, 0x000000); odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, RFREGOFFSETMASK, 0x800a0); odm_set_rf_reg(dm, RF_PATH_A, RF_RCK_OS, RFREGOFFSETMASK, 0x30000); @@ -719,28 +711,29 @@ phy_path_a_rx_iqk( odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28160c05); /* LO calibration setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "LO calibration setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "LO calibration setting!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x0046a911); /* One shot, path A LOK & IQK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "One shot, path A LOK & IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "One shot, path A LOK & IQK!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); /* delay x ms */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); + RF_DBG(dm, DBG_RF_IQK, "delay %d ms for One shot, path A LOK & IQK.\n", + IQK_DELAY_TIME_88E); /* platform_stall_execution(IQK_DELAY_TIME_88E*1000); */ ODM_delay_ms(IQK_DELAY_TIME_88E); /* Check failed */ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeac = 0x%x\n", reg_eac); + RF_DBG(dm, DBG_RF_IQK, "0xeac = 0x%x\n", reg_eac); reg_e94 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe94 = 0x%x\n", reg_e94); + RF_DBG(dm, DBG_RF_IQK, "0xe94 = 0x%x\n", reg_e94); reg_e9c = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe9c = 0x%x\n", reg_e9c); + RF_DBG(dm, DBG_RF_IQK, "0xe9c = 0x%x\n", reg_e9c); reg_ea4 = odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xea4 = 0x%x\n", reg_ea4); + RF_DBG(dm, DBG_RF_IQK, "0xea4 = 0x%x\n", reg_ea4); #if 0 if (!(reg_eac & BIT(28)) && @@ -751,49 +744,47 @@ phy_path_a_rx_iqk( return result; #endif - if (!(reg_eac & BIT(27)) && /* if Tx is OK, check whether Rx is OK */ + if (!(reg_eac & BIT(27)) && /* if Tx is OK, check whether Rx is OK */ (((reg_ea4 & 0x03FF0000) >> 16) != 0x132) && (((reg_eac & 0x03FF0000) >> 16) != 0x36)) result |= 0x02; else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Rx IQK fail!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Rx IQK fail!!\n"); return result; - - } -u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ -phy_path_b_iqk_8188e( - struct dm_struct *dm -) +u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ + phy_path_b_iqk_8188e( + struct dm_struct *dm) { u32 reg_eac, reg_eb4, reg_ebc, reg_ec4, reg_ecc; - u8 result = 0x00; + u8 result = 0x00; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "path B IQK!\n"); /* One shot, path B LOK & IQK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "One shot, path A LOK & IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "One shot, path A LOK & IQK!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_CONT, MASKDWORD, 0x00000002); odm_set_bb_reg(dm, REG_IQK_AGC_CONT, MASKDWORD, 0x00000000); /* delay x ms */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME_88E); + RF_DBG(dm, DBG_RF_IQK, "delay %d ms for One shot, path B LOK & IQK.\n", + IQK_DELAY_TIME_88E); /* platform_stall_execution(IQK_DELAY_TIME_88E*1000); */ ODM_delay_ms(IQK_DELAY_TIME_88E); /* Check failed */ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeac = 0x%x\n", reg_eac); + RF_DBG(dm, DBG_RF_IQK, "0xeac = 0x%x\n", reg_eac); reg_eb4 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeb4 = 0x%x\n", reg_eb4); + RF_DBG(dm, DBG_RF_IQK, "0xeb4 = 0x%x\n", reg_eb4); reg_ebc = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_B, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xebc = 0x%x\n", reg_ebc); + RF_DBG(dm, DBG_RF_IQK, "0xebc = 0x%x\n", reg_ebc); reg_ec4 = odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_B_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xec4 = 0x%x\n", reg_ec4); + RF_DBG(dm, DBG_RF_IQK, "0xec4 = 0x%x\n", reg_ec4); reg_ecc = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_B_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xecc = 0x%x\n", reg_ecc); + RF_DBG(dm, DBG_RF_IQK, "0xecc = 0x%x\n", reg_ecc); if (!(reg_eac & BIT(31)) && (((reg_eb4 & 0x03FF0000) >> 16) != 0x142) && @@ -807,26 +798,20 @@ phy_path_b_iqk_8188e( (((reg_ecc & 0x03FF0000) >> 16) != 0x36)) result |= 0x02; else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B Rx IQK fail!!\n"); - + RF_DBG(dm, DBG_RF_IQK, "path B Rx IQK fail!!\n"); return result; - } -void -_phy_path_a_fill_iqk_matrix( - struct dm_struct *dm, - boolean is_iqk_ok, - s32 result[][8], - u8 final_candidate, - boolean is_tx_only -) +void _phy_path_a_fill_iqk_matrix(struct dm_struct *dm, boolean is_iqk_ok, + s32 result[][8], u8 final_candidate, + boolean is_tx_only) { - u32 oldval_0, X, TX0_A, reg; - s32 Y, TX0_C; + u32 oldval_0, X, TX0_A, reg; + s32 Y, TX0_C; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"); + RF_DBG(dm, DBG_RF_IQK, "path A IQ Calibration %s !\n", + (is_iqk_ok) ? "Success" : "Failed"); if (final_candidate == 0xFF) return; @@ -838,7 +823,9 @@ _phy_path_a_fill_iqk_matrix( if ((X & 0x00000200) != 0) X = X | 0xFFFFFC00; TX0_A = (X * oldval_0) >> 8; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "X = 0x%x, TX0_A = 0x%x, oldval_0 0x%x\n", X, TX0_A, oldval_0); + RF_DBG(dm, DBG_RF_IQK, + "X = 0x%x, TX0_A = 0x%x, oldval_0 0x%x\n", X, TX0_A, + oldval_0); odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0x3FF, TX0_A); odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(31), ((X * oldval_0 >> 7) & 0x1)); @@ -847,16 +834,15 @@ _phy_path_a_fill_iqk_matrix( if ((Y & 0x00000200) != 0) Y = Y | 0xFFFFFC00; - TX0_C = (Y * oldval_0) >> 8; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Y = 0x%x, TX = 0x%x\n", Y, TX0_C); + RF_DBG(dm, DBG_RF_IQK, "Y = 0x%x, TX = 0x%x\n", Y, TX0_C); odm_set_bb_reg(dm, REG_OFDM_0_XC_TX_AFE, 0xF0000000, ((TX0_C & 0x3C0) >> 6)); odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0x003F0000, (TX0_C & 0x3F)); odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(29), ((Y * oldval_0 >> 7) & 0x1)); if (is_tx_only) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "_phy_path_a_fill_iqk_matrix only Tx OK\n"); + RF_DBG(dm, DBG_RF_IQK, "%s only Tx OK\n", __func__); return; } @@ -875,19 +861,15 @@ _phy_path_a_fill_iqk_matrix( } } -void -_phy_path_b_fill_iqk_matrix( - struct dm_struct *dm, - boolean is_iqk_ok, - s32 result[][8], - u8 final_candidate, - boolean is_tx_only /* do Tx only */ -) +void _phy_path_b_fill_iqk_matrix(struct dm_struct *dm, boolean is_iqk_ok, + s32 result[][8], u8 final_candidate, + boolean is_tx_only /* do Tx only */) { - u32 oldval_1, X, TX1_A, reg; - s32 Y, TX1_C; + u32 oldval_1, X, TX1_A, reg; + s32 Y, TX1_C; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"); + RF_DBG(dm, DBG_RF_IQK, "path B IQ Calibration %s !\n", + (is_iqk_ok) ? "Success" : "Failed"); if (final_candidate == 0xFF) return; @@ -899,7 +881,7 @@ _phy_path_b_fill_iqk_matrix( if ((X & 0x00000200) != 0) X = X | 0xFFFFFC00; TX1_A = (X * oldval_1) >> 8; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "X = 0x%x, TX1_A = 0x%x\n", X, TX1_A); + RF_DBG(dm, DBG_RF_IQK, "X = 0x%x, TX1_A = 0x%x\n", X, TX1_A); odm_set_bb_reg(dm, REG_OFDM_0_XB_TX_IQ_IMBALANCE, 0x3FF, TX1_A); odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(27), ((X * oldval_1 >> 7) & 0x1)); @@ -909,7 +891,7 @@ _phy_path_b_fill_iqk_matrix( Y = Y | 0xFFFFFC00; TX1_C = (Y * oldval_1) >> 8; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C); + RF_DBG(dm, DBG_RF_IQK, "Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C); odm_set_bb_reg(dm, REG_OFDM_0_XD_TX_AFE, 0xF0000000, ((TX1_C & 0x3C0) >> 6)); odm_set_bb_reg(dm, REG_OFDM_0_XB_TX_IQ_IMBALANCE, 0x003F0000, (TX1_C & 0x3F)); @@ -929,82 +911,55 @@ _phy_path_b_fill_iqk_matrix( } } -void -_phy_save_adda_registers( - struct dm_struct *dm, - u32 *adda_reg, - u32 *adda_backup, - u32 register_num -) +void _phy_save_adda_registers(struct dm_struct *dm, u32 *adda_reg, + u32 *adda_backup, u32 register_num) { - u32 i; + u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Save ADDA parameters.\n"); - for (i = 0 ; i < register_num ; i++) + RF_DBG(dm, DBG_RF_IQK, "Save ADDA parameters.\n"); + for (i = 0; i < register_num; i++) adda_backup[i] = odm_get_bb_reg(dm, adda_reg[i], MASKDWORD); } - -void -_phy_save_mac_registers( - struct dm_struct *dm, - u32 *mac_reg, - u32 *mac_backup -) +void _phy_save_mac_registers(struct dm_struct *dm, u32 *mac_reg, + u32 *mac_backup) { - u32 i; + u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Save MAC parameters.\n"); - for (i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++) + RF_DBG(dm, DBG_RF_IQK, "Save MAC parameters.\n"); + for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) mac_backup[i] = odm_read_1byte(dm, mac_reg[i]); mac_backup[i] = odm_read_4byte(dm, mac_reg[i]); - } - -void -_phy_reload_adda_registers( - struct dm_struct *dm, - u32 *adda_reg, - u32 *adda_backup, - u32 regiester_num -) +void _phy_reload_adda_registers(struct dm_struct *dm, u32 *adda_reg, + u32 *adda_backup, u32 regiester_num) { - u32 i; + u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Reload ADDA power saving parameters !\n"); - for (i = 0 ; i < regiester_num; i++) + RF_DBG(dm, DBG_RF_IQK, "Reload ADDA power saving parameters !\n"); + for (i = 0; i < regiester_num; i++) odm_set_bb_reg(dm, adda_reg[i], MASKDWORD, adda_backup[i]); } -void -_phy_reload_mac_registers( - struct dm_struct *dm, - u32 *mac_reg, - u32 *mac_backup -) +void _phy_reload_mac_registers(struct dm_struct *dm, u32 *mac_reg, + u32 *mac_backup) { - u32 i; + u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Reload MAC parameters !\n"); - for (i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++) + RF_DBG(dm, DBG_RF_IQK, "Reload MAC parameters !\n"); + for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) odm_write_1byte(dm, mac_reg[i], (u8)mac_backup[i]); odm_write_4byte(dm, mac_reg[i], mac_backup[i]); } - -void -_phy_path_adda_on( - struct dm_struct *dm, - u32 *adda_reg, - boolean is_path_a_on, - boolean is2T -) +void _phy_path_adda_on(struct dm_struct *dm, u32 *adda_reg, + boolean is_path_a_on, boolean is2T) { - u32 path_on; - u32 i; + u32 path_on; + u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "ADDA ON.\n"); + RF_DBG(dm, DBG_RF_IQK, "ADDA ON.\n"); path_on = is_path_a_on ? 0x04db25a4 : 0x0b1b25a4; if (false == is2T) { @@ -1013,78 +968,65 @@ _phy_path_adda_on( } else odm_set_bb_reg(dm, adda_reg[0], MASKDWORD, path_on); - for (i = 1 ; i < IQK_ADDA_REG_NUM ; i++) + for (i = 1; i < IQK_ADDA_REG_NUM; i++) odm_set_bb_reg(dm, adda_reg[i], MASKDWORD, path_on); - } -void -_phy_mac_setting_calibration( - struct dm_struct *dm, - u32 *mac_reg, - u32 *mac_backup -) +void _phy_mac_setting_calibration(struct dm_struct *dm, u32 *mac_reg, + u32 *mac_backup) { - u32 i = 0; + u32 i = 0; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "MAC settings for Calibration.\n"); + RF_DBG(dm, DBG_RF_IQK, "MAC settings for Calibration.\n"); odm_write_1byte(dm, mac_reg[i], 0x3F); - for (i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++) + for (i = 1; i < (IQK_MAC_REG_NUM - 1); i++) odm_write_1byte(dm, mac_reg[i], (u8)(mac_backup[i] & (~BIT(3)))); odm_write_1byte(dm, mac_reg[i], (u8)(mac_backup[i] & (~BIT(5)))); - } -void -_phy_path_a_stand_by( - struct dm_struct *dm -) +void _phy_path_a_stand_by(struct dm_struct *dm) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path-A standby mode!\n"); + RF_DBG(dm, DBG_RF_IQK, "path-A standby mode!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, MASKH3BYTES, 0x0); - odm_set_bb_reg(dm, 0x840, MASKDWORD, 0x00010000); + odm_set_bb_reg(dm, R_0x840, MASKDWORD, 0x00010000); odm_set_bb_reg(dm, REG_FPGA0_IQK, MASKH3BYTES, 0x808000); } -void -_phy_pi_mode_switch( - struct dm_struct *dm, - boolean pi_mode -) +void _phy_pi_mode_switch(struct dm_struct *dm, boolean pi_mode) { - u32 mode; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "BB Switch to %s mode!\n", (pi_mode ? "PI" : "SI")); + u32 mode; + RF_DBG(dm, DBG_RF_IQK, "BB Switch to %s mode!\n", + (pi_mode ? "PI" : "SI")); mode = pi_mode ? 0x01000100 : 0x01000000; odm_set_bb_reg(dm, REG_FPGA0_XA_HSSI_PARAMETER1, MASKDWORD, mode); odm_set_bb_reg(dm, REG_FPGA0_XB_HSSI_PARAMETER1, MASKDWORD, mode); } boolean -phy_simularity_compare_8188e( - struct dm_struct *dm, - s32 result[][8], - u8 c1, - u8 c2 -) +phy_simularity_compare_8188e(struct dm_struct *dm, s32 result[][8], u8 c1, + u8 c2) { - u32 i, j, diff, simularity_bit_map, bound = 0; - u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */ - boolean is_result = true; - boolean is2T = false; + u32 i, j, diff, simularity_bit_map, bound = 0; + u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */ + boolean is_result = true; + boolean is2T = false; if (is2T) bound = 8; else bound = 4; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "===> IQK:phy_simularity_compare_8188e c1 %d c2 %d!!!\n", c1, c2); + RF_DBG(dm, DBG_RF_IQK, "===> IQK:%s c1 %d c2 %d!!!\n", __func__, c1, + c2); simularity_bit_map = 0; for (i = 0; i < bound; i++) { diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); if (diff > MAX_TOLERANCE) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK:phy_simularity_compare_8188e differnece overflow index %d compare1 0x%x compare2 0x%x!!!\n", i, result[c1][i], result[c2][i]); + RF_DBG(dm, DBG_RF_IQK, + "IQK:%s differnece overflow index %d compare1 0x%x compare2 0x%x!!!\n", + __func__, i, result[c1][i], result[c2][i]); if ((i == 2 || i == 6) && !simularity_bit_map) { if (result[c1][i] + result[c1][i + 1] == 0) @@ -1098,7 +1040,8 @@ phy_simularity_compare_8188e( } } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK:phy_simularity_compare_8188e simularity_bit_map %d !!!\n", simularity_bit_map); + RF_DBG(dm, DBG_RF_IQK, "IQK:%s simularity_bit_map %d !!!\n", __func__, + simularity_bit_map); if (simularity_bit_map == 0) { for (i = 0; i < (bound / 4); i++) { @@ -1109,56 +1052,46 @@ phy_simularity_compare_8188e( } } return is_result; - } else if (!(simularity_bit_map & 0x0F)) { /* path A OK */ + } else if (!(simularity_bit_map & 0x0F)) { /* path A OK */ for (i = 0; i < 4; i++) result[3][i] = result[c1][i]; return false; - } else if (!(simularity_bit_map & 0xF0) && is2T) { /* path B OK */ + } else if (!(simularity_bit_map & 0xF0) && is2T) { /* path B OK */ for (i = 4; i < 8; i++) result[3][i] = result[c1][i]; return false; } else return false; - } - -void -_phy_iq_calibrate_8188e( - struct dm_struct *dm, - s32 result[][8], - u8 t, - boolean is2T -) +void _phy_iq_calibrate_8188e(struct dm_struct *dm, s32 result[][8], u8 t, + boolean is2T) { - u32 i; - u8 path_aok = 0, path_bok = 0; - u32 ADDA_REG[IQK_ADDA_REG_NUM] = { - REG_FPGA0_XCD_SWITCH_CONTROL, REG_BLUE_TOOTH, - REG_RX_WAIT_CCA, REG_TX_CCK_RFON, - REG_TX_CCK_BBON, REG_TX_OFDM_RFON, - REG_TX_OFDM_BBON, REG_TX_TO_RX, - REG_TX_TO_TX, REG_RX_CCK, - REG_RX_OFDM, REG_RX_WAIT_RIFS, - REG_RX_TO_RX, REG_STANDBY, - REG_SLEEP, REG_PMPD_ANAEN - }; - u32 IQK_MAC_REG[IQK_MAC_REG_NUM] = { - REG_TXPAUSE, REG_BCN_CTRL, - REG_BCN_CTRL_1, REG_GPIO_MUXCFG - }; + u32 i; + u8 path_aok = 0, path_bok = 0; + u32 ADDA_REG[IQK_ADDA_REG_NUM] = { + REG_FPGA0_XCD_SWITCH_CONTROL, REG_BLUE_TOOTH, + REG_RX_WAIT_CCA, REG_TX_CCK_RFON, + REG_TX_CCK_BBON, REG_TX_OFDM_RFON, + REG_TX_OFDM_BBON, REG_TX_TO_RX, + REG_TX_TO_TX, REG_RX_CCK, + REG_RX_OFDM, REG_RX_WAIT_RIFS, + REG_RX_TO_RX, REG_STANDBY, + REG_SLEEP, REG_PMPD_ANAEN}; + u32 IQK_MAC_REG[IQK_MAC_REG_NUM] = { + REG_TXPAUSE, REG_BCN_CTRL, + REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; /* since 92C & 92D have the different define in IQK_BB_REG */ - u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { - REG_OFDM_0_TRX_PATH_ENABLE, REG_OFDM_0_TR_MUX_PAR, - REG_FPGA0_XCD_RF_INTERFACE_SW, REG_CONFIG_ANT_A, REG_CONFIG_ANT_B, - REG_FPGA0_XAB_RF_INTERFACE_SW, REG_FPGA0_XA_RF_INTERFACE_OE, - REG_FPGA0_XB_RF_INTERFACE_OE, REG_CCK_0_AFE_SETTING - }; + u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { + REG_OFDM_0_TRX_PATH_ENABLE, REG_OFDM_0_TR_MUX_PAR, + REG_FPGA0_XCD_RF_INTERFACE_SW, REG_CONFIG_ANT_A, REG_CONFIG_ANT_B, + REG_FPGA0_XAB_RF_INTERFACE_SW, REG_FPGA0_XA_RF_INTERFACE_OE, + REG_FPGA0_XB_RF_INTERFACE_OE, REG_CCK_0_AFE_SETTING}; - u32 retry_count = 2; + u32 retry_count = 2; - if (*(dm->mp_mode) == true) + if (*dm->mp_mode == true) retry_count = 9; /* Note: IQ calibration must be performed after loading */ @@ -1170,14 +1103,16 @@ _phy_iq_calibrate_8188e( /* bbvalue = odm_get_bb_reg(dm, REG_FPGA0_RFMOD, MASKDWORD); * RT_DISP(FINIT, INIT_IQK, ("_phy_iq_calibrate_8188e()==>0x%08x\n",bbvalue)); */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t); + RF_DBG(dm, DBG_RF_IQK, "IQ Calibration for %s for %d times\n", + (is2T ? "2T2R" : "1T1R"), t); /* Save ADDA parameters, turn path A ADDA on */ _phy_save_adda_registers(dm, ADDA_REG, dm->rf_calibrate_info.ADDA_backup, IQK_ADDA_REG_NUM); _phy_save_mac_registers(dm, IQK_MAC_REG, dm->rf_calibrate_info.IQK_MAC_backup); _phy_save_adda_registers(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup, IQK_BB_REG_NUM); } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t); + RF_DBG(dm, DBG_RF_IQK, "IQ Calibration for %s for %d times\n", + (is2T ? "2T2R" : "1T1R"), t); _phy_path_adda_on(dm, ADDA_REG, true, is2T); if (t == 0) @@ -1212,16 +1147,16 @@ _phy_iq_calibrate_8188e( odm_set_bb_reg(dm, REG_CONFIG_ANT_B, MASKDWORD, 0x0f600000); /* IQ calibration setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK setting!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, MASKH3BYTES, 0x808000); odm_set_bb_reg(dm, REG_TX_IQK, MASKDWORD, 0x01007c00); odm_set_bb_reg(dm, REG_RX_IQK, MASKDWORD, 0x81004800); - for (i = 0 ; i < retry_count ; i++) { + for (i = 0; i < retry_count; i++) { path_aok = phy_path_a_iqk_8188e(dm, is2T); /* if(path_aok == 0x03){ */ if (path_aok == 0x01) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Tx IQK Success!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Tx IQK Success!!\n"); result[t][0] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD) & 0x3FF0000) >> 16; result[t][1] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD) & 0x3FF0000) >> 16; break; @@ -1236,49 +1171,52 @@ _phy_iq_calibrate_8188e( #endif } - for (i = 0 ; i < retry_count ; i++) { + for (i = 0; i < retry_count; i++) { path_aok = phy_path_a_rx_iqk(dm, is2T); if (path_aok == 0x03) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Rx IQK Success!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Rx IQK Success!!\n"); /* result[t][0] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD)&0x3FF0000)>>16; * result[t][1] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD)&0x3FF0000)>>16; */ result[t][2] = (odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16; result[t][3] = (odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16; break; - } else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Rx IQK Fail!!\n"); + } + + RF_DBG(dm, DBG_RF_IQK, "path A Rx IQK Fail!!\n"); } if (0x00 == path_aok) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A IQK failed!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A IQK failed!!\n"); if (is2T) { _phy_path_a_stand_by(dm); /* Turn path B ADDA on */ _phy_path_adda_on(dm, ADDA_REG, false, is2T); - for (i = 0 ; i < retry_count ; i++) { + for (i = 0; i < retry_count; i++) { path_bok = phy_path_b_iqk_8188e(dm); if (path_bok == 0x03) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B IQK Success!!\n"); + RF_DBG(dm, DBG_RF_IQK, + "path B IQK Success!!\n"); result[t][4] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD) & 0x3FF0000) >> 16; result[t][5] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_B, MASKDWORD) & 0x3FF0000) >> 16; result[t][6] = (odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_B_2, MASKDWORD) & 0x3FF0000) >> 16; result[t][7] = (odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_B_2, MASKDWORD) & 0x3FF0000) >> 16; break; - } else if (i == (retry_count - 1) && path_bok == 0x01) { /* Tx IQK OK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B Only Tx IQK Success!!\n"); + } else if (i == (retry_count - 1) && path_bok == 0x01) { /* Tx IQK OK */ + RF_DBG(dm, DBG_RF_IQK, + "path B Only Tx IQK Success!!\n"); result[t][4] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD) & 0x3FF0000) >> 16; result[t][5] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_B, MASKDWORD) & 0x3FF0000) >> 16; } } if (0x00 == path_bok) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B IQK failed!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path B IQK failed!!\n"); } /* Back to BB mode, load original value */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK:Back to BB mode, load original value!\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK:Back to BB mode, load original value!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, MASKH3BYTES, 0); if (t != 0) { @@ -1300,26 +1238,21 @@ _phy_iq_calibrate_8188e( odm_set_bb_reg(dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x01008c00); odm_set_bb_reg(dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x01008c00); } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "_phy_iq_calibrate_8188e() <==\n"); + RF_DBG(dm, DBG_RF_IQK, "%s <==\n", __func__); } - -void -_phy_lc_calibrate_8188e( - struct dm_struct *dm, - boolean is2T -) +void _phy_lc_calibrate_8188e(struct dm_struct *dm, boolean is2T) { - u8 tmp_reg; - u32 rf_amode = 0, rf_bmode = 0, lc_cal; + u8 tmp_reg; + u32 rf_amode = 0, rf_bmode = 0, lc_cal; /* Check continuous TX and Packet TX */ tmp_reg = odm_read_1byte(dm, 0xd03); - if ((tmp_reg & 0x70) != 0) /* Deal with contisuous TX case */ - odm_write_1byte(dm, 0xd03, tmp_reg & 0x8F); /* disable all continuous TX */ - else /* Deal with Packet TX case */ - odm_write_1byte(dm, REG_TXPAUSE, 0xFF); /* block all queues */ + if ((tmp_reg & 0x70) != 0) /* Deal with contisuous TX case */ + odm_write_1byte(dm, 0xd03, tmp_reg & 0x8F); /* disable all continuous TX */ + else /* Deal with Packet TX case */ + odm_write_1byte(dm, REG_TXPAUSE, 0xFF); /* block all queues */ if ((tmp_reg & 0x70) != 0) { /* 1. Read original RF mode */ @@ -1344,7 +1277,7 @@ _phy_lc_calibrate_8188e( ODM_delay_ms(100); /* Restore original situation */ - if ((tmp_reg & 0x70) != 0) { /* Deal with contisuous TX case */ + if ((tmp_reg & 0x70) != 0) { /* Deal with contisuous TX case */ /* path-A */ odm_write_1byte(dm, 0xd03, tmp_reg); odm_set_rf_reg(dm, RF_PATH_A, RF_AC, MASK12BITS, rf_amode); @@ -1356,33 +1289,29 @@ _phy_lc_calibrate_8188e( odm_write_1byte(dm, REG_TXPAUSE, 0x00); } -void -phy_iq_calibrate_8188e( - void *dm_void, - boolean is_recovery -) +void phy_iq_calibrate_8188e(void *dm_void, boolean is_recovery) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - s32 result[4][8]; /* last is final result */ - u8 i, final_candidate, indexforchannel; - u8 channel_to_iqk = 7; - boolean is_patha_ok, is_pathb_ok; - s32 rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc, reg_tmp = 0; - boolean is12simular, is13simular, is23simular; - u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { - REG_OFDM_0_XA_RX_IQ_IMBALANCE, REG_OFDM_0_XB_RX_IQ_IMBALANCE, - REG_OFDM_0_ECCA_THRESHOLD, REG_OFDM_0_AGC_RSSI_TABLE, - REG_OFDM_0_XA_TX_IQ_IMBALANCE, REG_OFDM_0_XB_TX_IQ_IMBALANCE, - REG_OFDM_0_XC_TX_AFE, REG_OFDM_0_XD_TX_AFE, - REG_OFDM_0_RX_IQ_EXT_ANTA - }; + struct dm_struct *dm = (struct dm_struct *)dm_void; + s32 result[4][8]; /* last is final result */ + u8 i, final_candidate, indexforchannel; + u8 channel_to_iqk = 7; + boolean is_patha_ok, is_pathb_ok; + s32 rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc, reg_tmp = 0; + boolean is12simular, is13simular, is23simular; + u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { + REG_OFDM_0_XA_RX_IQ_IMBALANCE, REG_OFDM_0_XB_RX_IQ_IMBALANCE, + REG_OFDM_0_ECCA_THRESHOLD, REG_OFDM_0_AGC_RSSI_TABLE, + REG_OFDM_0_XA_TX_IQ_IMBALANCE, REG_OFDM_0_XB_TX_IQ_IMBALANCE, + REG_OFDM_0_XC_TX_AFE, REG_OFDM_0_XD_TX_AFE, + REG_OFDM_0_RX_IQ_EXT_ANTA}; if (is_recovery) { - PHYDM_DBG(dm, ODM_COMP_INIT, "phy_iq_calibrate_8188e: Return due to is_recovery!\n"); + RF_DBG(dm, DBG_RF_INIT, "%s: Return due to is_recovery!\n", + __func__); _phy_reload_adda_registers(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup_recover, 9); return; } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK:Start!!!\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK:Start!!!\n"); for (i = 0; i < 8; i++) { result[0][i] = 0; @@ -1397,14 +1326,15 @@ phy_iq_calibrate_8188e( is23simular = false; is13simular = false; - for (i = 0; i < 3; i++) { - _phy_iq_calibrate_8188e(dm, result, i, false); + _phy_iq_calibrate_8188e(dm, result, i, false); if (i == 1) { is12simular = phy_simularity_compare_8188e(dm, result, 0, 1); if (is12simular) { final_candidate = 0; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: is12simular final_candidate is %x\n", final_candidate); + RF_DBG(dm, DBG_RF_IQK, + "IQK: is12simular final_candidate is %x\n", + final_candidate); break; } } @@ -1413,13 +1343,17 @@ phy_iq_calibrate_8188e( is13simular = phy_simularity_compare_8188e(dm, result, 0, 2); if (is13simular) { final_candidate = 0; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: is13simular final_candidate is %x\n", final_candidate); + RF_DBG(dm, DBG_RF_IQK, + "IQK: is13simular final_candidate is %x\n", + final_candidate); break; } is23simular = phy_simularity_compare_8188e(dm, result, 1, 2); if (is23simular) { final_candidate = 1; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: is23simular final_candidate is %x\n", final_candidate); + RF_DBG(dm, DBG_RF_IQK, + "IQK: is23simular final_candidate is %x\n", + final_candidate); } else { for (i = 0; i < 8; i++) reg_tmp += result[3][i]; @@ -1442,7 +1376,10 @@ phy_iq_calibrate_8188e( regebc = result[i][5]; regec4 = result[i][6]; regecc = result[i][7]; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc); + RF_DBG(dm, DBG_RF_IQK, + "IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", + rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, + regecc); } if (final_candidate != 0xff) { @@ -1454,17 +1391,21 @@ phy_iq_calibrate_8188e( dm->rf_calibrate_info.regebc = regebc = result[final_candidate][5]; regec4 = result[final_candidate][6]; regecc = result[final_candidate][7]; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: final_candidate is %x\n", final_candidate); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc); + RF_DBG(dm, DBG_RF_IQK, "IQK: final_candidate is %x\n", + final_candidate); + RF_DBG(dm, DBG_RF_IQK, + "IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", + rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, + regecc); is_patha_ok = is_pathb_ok = true; } else { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: FAIL use default value\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK: FAIL use default value\n"); - dm->rf_calibrate_info.rege94 = dm->rf_calibrate_info.regeb4 = 0x100; /* X default value */ - dm->rf_calibrate_info.rege9c = dm->rf_calibrate_info.regebc = 0x0; /* Y default value */ + dm->rf_calibrate_info.rege94 = dm->rf_calibrate_info.regeb4 = 0x100; /* X default value */ + dm->rf_calibrate_info.rege9c = dm->rf_calibrate_info.regebc = 0x0; /* Y default value */ } - if ((rege94 != 0)/*&&(regea4 != 0)*/) + if ((rege94 != 0) /*&&(regea4 != 0)*/) _phy_path_a_fill_iqk_matrix(dm, is_patha_ok, result, final_candidate, (regea4 == 0)); indexforchannel = odm_get_right_chnl_place_for_iqk(*dm->channel); @@ -1477,47 +1418,41 @@ phy_iq_calibrate_8188e( dm->rf_calibrate_info.iqk_matrix_reg_setting[indexforchannel].is_iqk_done = true; } /* RT_DISP(FINIT, INIT_IQK, ("\nIQK OK indexforchannel %d.\n", indexforchannel)); */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "\nIQK OK indexforchannel %d.\n", indexforchannel); + RF_DBG(dm, DBG_RF_IQK, "\nIQK OK indexforchannel %d.\n", + indexforchannel); _phy_save_adda_registers(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup_recover, IQK_BB_REG_NUM); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK finished\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK finished\n"); } - -void -phy_lc_calibrate_8188e( - void *dm_void -) +void phy_lc_calibrate_8188e(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; _phy_lc_calibrate_8188e(dm, false); } - void _phy_set_rf_path_switch_8188e( #if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE)) - struct dm_struct *dm, + struct dm_struct *dm, #else - void *adapter, + void *adapter, #endif - boolean is_main, - boolean is2T -) + boolean is_main, boolean is2T) { #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); - struct dm_struct *dm = &hal_data->DM_OutSrc; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + struct dm_struct *dm = &hal_data->DM_OutSrc; #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) if (!adapter->bHWInitReady) #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - void *adapter = dm->adapter; + void *adapter = dm->adapter; if (!rtw_is_hw_init_completed(adapter)) #endif { - u8 u1b_tmp; + u8 u1b_tmp; u1b_tmp = odm_read_1byte(dm, REG_LEDCFG2) | BIT(7); odm_write_1byte(dm, REG_LEDCFG2, u1b_tmp); /* odm_set_bb_reg(dm, REG_LEDCFG0, BIT23, 0x01); */ @@ -1526,17 +1461,17 @@ void _phy_set_rf_path_switch_8188e( #endif - if (is2T) { /* 92C */ + if (is2T) { /* 92C */ if (is_main) - odm_set_bb_reg(dm, REG_FPGA0_XB_RF_INTERFACE_OE, BIT(5) | BIT(6), 0x1); /* 92C_Path_A */ + odm_set_bb_reg(dm, REG_FPGA0_XB_RF_INTERFACE_OE, BIT(5) | BIT(6), 0x1); /* 92C_Path_A */ else - odm_set_bb_reg(dm, REG_FPGA0_XB_RF_INTERFACE_OE, BIT(5) | BIT(6), 0x2); /* BT */ - } else { /* 88C */ - + odm_set_bb_reg(dm, REG_FPGA0_XB_RF_INTERFACE_OE, BIT(5) | BIT(6), 0x2); /* BT */ + } else { /* 88C */ + #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY /* <20120504, Kordan> [8188E] We should make AntDiversity controlled by HW (0x870[9:8] = 0), */ /* otherwise the following action has no effect. (0x860[9:8] has the effect only if AntDiversity controlled by SW) */ odm_set_bb_reg(dm, REG_FPGA0_XAB_RF_INTERFACE_SW, BIT(8) | BIT(9), 0x0); - odm_set_bb_reg(dm, 0x914, MASKLWORD, 0x0201); /* Set up the ant mapping table */ + odm_set_bb_reg(dm, R_0x914, MASKLWORD, 0x0201); /* Set up the ant mapping table */ if (is_main) { /* odm_set_bb_reg(dm, REG_FPGA0_XA_RF_INTERFACE_OE, BIT(8)|BIT9, 0x2); */ /* Tx Main (SW control)(The right antenna) */ @@ -1546,32 +1481,31 @@ void _phy_set_rf_path_switch_8188e( /* 4 [ Rx ] */ odm_set_bb_reg(dm, REG_FPGA0_XB_RF_INTERFACE_OE, BIT(5) | BIT(4) | BIT(3), 0x1); /* ant_div_type = TRDiv, right antenna */ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) - odm_set_bb_reg(dm, 0xb2c, BIT(31), 0x1); /* RxCG, Default is RxCG. ant_div_type = 2RDiv, left antenna */ + odm_set_bb_reg(dm, R_0xb2c, BIT(31), 0x1); /* RxCG, Default is RxCG. ant_div_type = 2RDiv, left antenna */ } else { /* odm_set_bb_reg(dm, REG_FPGA0_XA_RF_INTERFACE_OE, BIT(8)|BIT9, 0x1); */ /* Tx Aux (SW control)(The left antenna) */ /* 4 [ Tx ] */ - odm_set_bb_reg(dm, REG_FPGA0_XA_RF_INTERFACE_OE, BIT(14) | BIT(13) | BIT(12), 0x0); /* Tx Aux (HW control)(The left antenna) */ + odm_set_bb_reg(dm, REG_FPGA0_XA_RF_INTERFACE_OE, BIT(14) | BIT(13) | BIT(12), 0x0); /* Tx Aux (HW control)(The left antenna) */ /* 4 [ Rx ] */ odm_set_bb_reg(dm, REG_FPGA0_XB_RF_INTERFACE_OE, BIT(5) | BIT(4) | BIT(3), 0x0); /* ant_div_type = TRDiv, left antenna */ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) - odm_set_bb_reg(dm, 0xb2c, BIT(31), 0x0); /* RxCS, ant_div_type = 2RDiv, right antenna */ + odm_set_bb_reg(dm, R_0xb2c, BIT(31), 0x0); /* RxCS, ant_div_type = 2RDiv, right antenna */ } - + #endif } } void phy_set_rf_path_switch_8188e( #if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE)) - struct dm_struct *dm, + struct dm_struct *dm, #else - void *adapter, + void *adapter, #endif - boolean is_main -) + boolean is_main) { #if !((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE & ODM_CE)) - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); #endif #if DISABLE_BB_RF @@ -1579,7 +1513,7 @@ void phy_set_rf_path_switch_8188e( #endif { - /* For 88C 1T1R */ +/* For 88C 1T1R */ #if !((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE & ODM_CE)) _phy_set_rf_path_switch_8188e(adapter, is_main, false); #else @@ -1592,24 +1526,23 @@ void phy_set_rf_path_switch_8188e( /* return value true => Main; false => Aux */ boolean _phy_query_rf_path_switch_8188e( #if (DM_ODM_SUPPORT_TYPE & ODM_AP) - struct dm_struct *dm, + struct dm_struct *dm, #else - void *adapter, + void *adapter, #endif - boolean is2T -) + boolean is2T) { #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - struct dm_struct *dm = &hal_data->odmpriv; + struct dm_struct *dm = &hal_data->odmpriv; #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct dm_struct *dm = &hal_data->DM_OutSrc; + struct dm_struct *dm = &hal_data->DM_OutSrc; #endif #endif if (!adapter->is_hw_init_ready) { - u8 u1b_tmp; + u8 u1b_tmp; u1b_tmp = odm_read_1byte(dm, REG_LEDCFG2) | BIT(7); odm_write_1byte(dm, REG_LEDCFG2, u1b_tmp); /* odm_set_bb_reg(dm, REG_LEDCFG0, BIT23, 0x01); */ @@ -1629,18 +1562,16 @@ boolean _phy_query_rf_path_switch_8188e( } } - - /* return value true => Main; false => Aux */ boolean phy_query_rf_path_switch_8188e( #if (DM_ODM_SUPPORT_TYPE & ODM_AP) - struct dm_struct *dm + struct dm_struct *dm #else - void *adapter + void *adapter #endif -) + ) { - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); #if DISABLE_BB_RF return true; @@ -1648,15 +1579,12 @@ boolean phy_query_rf_path_switch_8188e( #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) if (IS_2T2R(hal_data->version_id)) return _phy_query_rf_path_switch_8188e(adapter, true); - else #endif - { - /* For 88C 1T1R */ +/* For 88C 1T1R */ #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - return _phy_query_rf_path_switch_8188e(adapter, false); + return _phy_query_rf_path_switch_8188e(adapter, false); #else - return _phy_query_rf_path_switch_8188e(dm, false); + return _phy_query_rf_path_switch_8188e(dm, false); #endif - } } #endif diff --git a/hal/phydm/halrf/rtl8188e/halrf_8188e_ce.h b/hal/phydm/halrf/rtl8188e/halrf_8188e_ce.h index 55c9260..273b5c0 100644 --- a/hal/phydm/halrf/rtl8188e/halrf_8188e_ce.h +++ b/hal/phydm/halrf/rtl8188e/halrf_8188e_ce.h @@ -13,94 +13,47 @@ * *****************************************************************************/ -#ifndef __HAL_PHY_RF_8188E_H__ -#define __HAL_PHY_RF_8188E_H__ +#ifndef __HALRF_8188E_H__ +#define __HALRF_8188E_H__ /*--------------------------Define Parameters-------------------------------*/ -#define IQK_DELAY_TIME_88E 10 /* ms */ -#define index_mapping_NUM_88E 15 -#define AVG_THERMAL_NUM_88E 4 +#define IQK_DELAY_TIME_88E 10 /* ms */ +#define index_mapping_NUM_88E 15 +#define AVG_THERMAL_NUM_88E 4 #include "../halphyrf_ce.h" -void configure_txpower_track_8188e( - struct txpwrtrack_cfg *config -); +void configure_txpower_track_8188e(struct txpwrtrack_cfg *config); -void -get_delta_swing_table_8188e( - void *dm_void, - u8 **temperature_up_a, - u8 **temperature_down_a, - u8 **temperature_up_b, - u8 **temperature_down_b -); +void get_delta_swing_table_8188e(void *dm_void, u8 **temperature_up_a, + u8 **temperature_down_a, u8 **temperature_up_b, + u8 **temperature_down_b); -void do_iqk_8188e( - void *dm_void, - u8 delta_thermal_index, - u8 thermal_value, - u8 threshold -); +void do_iqk_8188e(void *dm_void, u8 delta_thermal_index, u8 thermal_value, + u8 threshold); -void -odm_tx_pwr_track_set_pwr88_e( - void *dm_void, - enum pwrtrack_method method, - u8 rf_path, - u8 channel_mapped_index -); +void odm_tx_pwr_track_set_pwr88_e(void *dm_void, enum pwrtrack_method method, + u8 rf_path, u8 channel_mapped_index); /* 1 7. IQK */ -void -phy_iq_calibrate_8188e( - void *dm_void, - boolean is_recovery); - +void phy_iq_calibrate_8188e(void *dm_void, boolean is_recovery); /* * LC calibrate * */ -void -phy_lc_calibrate_8188e( - void *dm_void -); +void phy_lc_calibrate_8188e(void *dm_void); +void _phy_save_adda_registers(struct dm_struct *dm, u32 *adda_reg, + u32 *adda_backup, u32 register_num); -void -_phy_save_adda_registers( - struct dm_struct *dm, - u32 *adda_reg, - u32 *adda_backup, - u32 register_num -); +void _phy_path_adda_on(struct dm_struct *dm, u32 *adda_reg, + boolean is_path_a_on, boolean is2T); -void -_phy_path_adda_on( - struct dm_struct *dm, - u32 *adda_reg, - boolean is_path_a_on, - boolean is2T -); +void _phy_mac_setting_calibration(struct dm_struct *dm, u32 *mac_reg, + u32 *mac_backup); -void -_phy_mac_setting_calibration( - struct dm_struct *dm, - u32 *mac_reg, - u32 *mac_backup -); +void _phy_path_a_stand_by(struct dm_struct *dm); +void halrf_rf_lna_setting_8188e(struct dm_struct *dm, enum halrf_lna_set type); - -void -_phy_path_a_stand_by( - struct dm_struct *dm -); -void -halrf_rf_lna_setting_8188e( - struct dm_struct *dm, - enum phydm_lna_set type -); - - -#endif /* #ifndef __HAL_PHY_RF_8188E_H__ */ +#endif /*#ifndef __HALRF_8188E_H__*/ diff --git a/hal/phydm/halrf/rtl8188e/halrf_8188e_win.c b/hal/phydm/halrf/rtl8188e/halrf_8188e_win.c index d7cfbf5..4facb65 100644 --- a/hal/phydm/halrf/rtl8188e/halrf_8188e_win.c +++ b/hal/phydm/halrf/rtl8188e/halrf_8188e_win.c @@ -21,6 +21,7 @@ #include "../phydm_precomp.h" #endif +#if (RTL8188E_SUPPORT == 1) /*---------------------------Define Local Constant---------------------------*/ /* 2010/04/25 MH Define the max tx power tracking tx agc power. */ @@ -35,36 +36,36 @@ void halrf_rf_lna_setting_8188e( struct dm_struct *dm, - enum phydm_lna_set type + enum halrf_lna_set type ) { /*phydm_disable_lna*/ - if (type == phydm_lna_disable) { - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0x37f82); /*disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); + if (type == HALRF_LNA_DISABLE) { + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); /*select Rx mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0000f); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x37f82); /*disable LNA*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x0); if (dm->rf_type > RF_1T1R) { - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0xfffff, 0x18000); - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0x37f82); - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x0); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x0000f); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x37f82); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x0); } - } else if (type == phydm_lna_enable) { + } else if (type == HALRF_LNA_ENABLE) { /*phydm_enable_lna*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0x77f82); /*back to normal*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); /*select Rx mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0000f); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x77f82); /*back to normal*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x0); if (dm->rf_type > RF_1T1R) { - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0xfffff, 0x18000); - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0x77f82); - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x0); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x0000f); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x77f82); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x0); } } @@ -140,7 +141,7 @@ void set_iqk_matrix_8188e( } } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", (u32)iqk_result_x, (u32)iqk_result_y, (u32)ele_A, (u32)ele_C, (u32)ele_D, (u32)iqk_result_x, (u32)iqk_result_y); } @@ -184,7 +185,7 @@ odm_tx_pwr_track_set_pwr88_e( ) { struct dm_struct *dm = (struct dm_struct *)dm_void; - PADAPTER adapter = (PADAPTER)dm->adapter; + struct _ADAPTER *adapter = dm->adapter; u8 pwr_tracking_limit_ofdm = 30; /* +0dB */ u8 pwr_tracking_limit_cck = 28; /* -2dB */ u8 tx_rate = 0xFF; @@ -214,7 +215,7 @@ odm_tx_pwr_track_set_pwr88_e( if (!rate) { /*auto rate*/ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate); + tx_rate = ((PADAPTER)adapter)->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) tx_rate = hw_rate_to_m_rate(dm->tx_rate); #endif @@ -222,8 +223,8 @@ odm_tx_pwr_track_set_pwr88_e( tx_rate = (u8)rate; } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "Power Tracking tx_rate=0x%X\n", tx_rate); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "===>ODM_TxPwrTrackSetPwr8188E\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Power Tracking tx_rate=0x%X\n", tx_rate); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "===>ODM_TxPwrTrackSetPwr8188E\n"); if (tx_rate != 0xFF) { /* 2 CCK */ @@ -246,14 +247,15 @@ odm_tx_pwr_track_set_pwr88_e( else pwr_tracking_limit_ofdm = cali_info->default_ofdm_index; /* Default OFDM index = 30 */ } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "tx_rate=0x%x, pwr_tracking_limit=%d\n", tx_rate, pwr_tracking_limit_ofdm); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "tx_rate=0x%x, pwr_tracking_limit=%d\n", tx_rate, pwr_tracking_limit_ofdm); if (method == TXAGC) { u32 pwr = 0, tx_agc = 0; + void *adapter = dm->adapter; cali_info->remnant_ofdm_swing_idx[rf_path] = cali_info->absolute_ofdm_swing_idx[rf_path]; /* Remnant index equal to aboslute compensate value. */ - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "odm_TxPwrTrackSetPwr88E CH=%d\n", *(dm->channel)); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "odm_TxPwrTrackSetPwr88E CH=%d\n", *(dm->channel)); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) @@ -336,7 +338,7 @@ odm_tx_pwr_track_set_pwr88_e( } } } else if (method == MIX_MODE) { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "cali_info->default_ofdm_index=%d, dm->DefaultCCKIndex=%d, cali_info->absolute_ofdm_swing_idx[rf_path]=%d, rf_path = %d\n", + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "cali_info->default_ofdm_index=%d, dm->DefaultCCKIndex=%d, cali_info->absolute_ofdm_swing_idx[rf_path]=%d, rf_path = %d\n", cali_info->default_ofdm_index, cali_info->default_cck_index, cali_info->absolute_ofdm_swing_idx[rf_path], rf_path); final_cck_swing_index = cali_info->default_cck_index + cali_info->absolute_ofdm_swing_idx[rf_path]; @@ -354,7 +356,7 @@ odm_tx_pwr_track_set_pwr88_e( PHY_SetTxPowerIndexByRateSection(adapter, RF_PATH_A, *dm->channel, OFDM); PHY_SetTxPowerIndexByRateSection(adapter, RF_PATH_A, *dm->channel, HT_MCS0_MCS7); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A Over BBSwing Limit, pwr_tracking_limit = %d, Remnant tx_agc value = %d\n", pwr_tracking_limit_ofdm, cali_info->remnant_ofdm_swing_idx[rf_path]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Path_A Over BBSwing Limit, pwr_tracking_limit = %d, Remnant tx_agc value = %d\n", pwr_tracking_limit_ofdm, cali_info->remnant_ofdm_swing_idx[rf_path]); } else if (final_ofdm_swing_index < 0) { cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index ; @@ -367,13 +369,13 @@ odm_tx_pwr_track_set_pwr88_e( PHY_SetTxPowerIndexByRateSection(adapter, RF_PATH_A, *dm->channel, OFDM); PHY_SetTxPowerIndexByRateSection(adapter, RF_PATH_A, *dm->channel, HT_MCS0_MCS7); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A Lower then BBSwing lower bound 0, Remnant tx_agc value = %d\n", cali_info->remnant_ofdm_swing_idx[rf_path]); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Path_A Lower then BBSwing lower bound 0, Remnant tx_agc value = %d\n", cali_info->remnant_ofdm_swing_idx[rf_path]); } else { set_iqk_matrix_8188e(dm, final_ofdm_swing_index, RF_PATH_A, cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][0], cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][1]); - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A Compensate with BBSwing, final_ofdm_swing_index = %d\n", final_ofdm_swing_index); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Path_A Compensate with BBSwing, final_ofdm_swing_index = %d\n", final_ofdm_swing_index); if (cali_info->modify_tx_agc_flag_path_a) { /* If tx_agc has changed, reset tx_agc again */ cali_info->remnant_ofdm_swing_idx[rf_path] = 0; @@ -383,14 +385,14 @@ odm_tx_pwr_track_set_pwr88_e( cali_info->modify_tx_agc_flag_path_a = false; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A dm->Modify_TxAGC_Flag = false\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Path_A dm->Modify_TxAGC_Flag = false\n"); } } if (final_cck_swing_index > pwr_tracking_limit_cck) { cali_info->remnant_cck_swing_idx = final_cck_swing_index - pwr_tracking_limit_cck; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A CCK Over Limit, pwr_tracking_limit_cck = %d, cali_info->remnant_cck_swing_idx = %d\n", pwr_tracking_limit_cck, cali_info->remnant_cck_swing_idx); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Path_A CCK Over Limit, pwr_tracking_limit_cck = %d, cali_info->remnant_cck_swing_idx = %d\n", pwr_tracking_limit_cck, cali_info->remnant_cck_swing_idx); /* Adjust BB swing by CCK filter coefficient */ @@ -421,7 +423,7 @@ odm_tx_pwr_track_set_pwr88_e( } else if (final_cck_swing_index < 0) { /* Lowest CCK index = 0 */ cali_info->remnant_cck_swing_idx = final_cck_swing_index; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A CCK Under Limit, pwr_tracking_limit_cck = %d, cali_info->remnant_cck_swing_idx = %d\n", 0, cali_info->remnant_cck_swing_idx); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Path_A CCK Under Limit, pwr_tracking_limit_cck = %d, cali_info->remnant_cck_swing_idx = %d\n", 0, cali_info->remnant_cck_swing_idx); if (*dm->channel != 14) { odm_write_1byte(dm, 0xa22, cck_swing_table_ch1_ch13_new[0][0]); @@ -448,7 +450,7 @@ odm_tx_pwr_track_set_pwr88_e( PHY_SetTxPowerIndexByRateSection(adapter, RF_PATH_A, *dm->channel, CCK); } else { - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A CCK Compensate with BBSwing, final_cck_swing_index = %d\n", final_cck_swing_index); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Path_A CCK Compensate with BBSwing, final_cck_swing_index = %d\n", final_cck_swing_index); if (*dm->channel != 14) { odm_write_1byte(dm, 0xa22, cck_swing_table_ch1_ch13_new[final_cck_swing_index][0]); @@ -475,7 +477,7 @@ odm_tx_pwr_track_set_pwr88_e( PHY_SetTxPowerIndexByRateSection(adapter, RF_PATH_A, *dm->channel, CCK); cali_info->modify_tx_agc_flag_path_a_cck = false; - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A dm->Modify_TxAGC_Flag_CCK = false\n"); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Path_A dm->Modify_TxAGC_Flag_CCK = false\n"); } } @@ -493,7 +495,7 @@ get_delta_swing_table_8188e( ) { struct dm_struct *dm = (struct dm_struct *)dm_void; - void *adapter = dm->adapter; + struct _ADAPTER *adapter = dm->adapter; struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); u8 tx_rate = 0xFF; u8 channel = *dm->channel; @@ -527,7 +529,7 @@ get_delta_swing_table_8188e( tx_rate = (u8)rate; } - PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "Power Tracking tx_rate=0x%X\n", tx_rate); + RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Power Tracking tx_rate=0x%X\n", tx_rate); if (1 <= channel && channel <= 14) { if (IS_CCK_RATE(tx_rate)) { @@ -574,11 +576,11 @@ phy_path_a_iqk_8188e( { u32 reg_eac, reg_e94, reg_e9c, reg_ea4; u8 result = 0x00; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A IQK!\n"); /* 1 Tx IQK */ /* path-A IQK setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path-A IQK setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "path-A IQK setting!\n"); odm_set_bb_reg(dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x18008c1c); odm_set_bb_reg(dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x38008c1c); odm_set_bb_reg(dm, REG_TX_IQK_PI_A, MASKDWORD, 0x821403ff); @@ -586,11 +588,11 @@ phy_path_a_iqk_8188e( if (ktimes == 0x0) { /* LO calibration on */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "LO calibration setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "LO calibration setting!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x00462911); } else { /* LO calibration off */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "LO calibration setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "LO calibration setting!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x0046a911); } @@ -602,25 +604,25 @@ phy_path_a_iqk_8188e( odm_set_rf_reg(dm, RF_PATH_A, RF_TXPA_G2, RFREGOFFSETMASK, 0x07f7f); /* PA,PAD gain adjust */ - odm_set_rf_reg(dm, RF_PATH_A, 0xdf, RFREGOFFSETMASK, 0x980); - odm_set_rf_reg(dm, RF_PATH_A, 0x56, RFREGOFFSETMASK, 0x510f0); + odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, RFREGOFFSETMASK, 0x980); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x56, RFREGOFFSETMASK, 0x510f0); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x808000); /* One shot, path A LOK & IQK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "One shot, path A LOK & IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "One shot, path A LOK & IQK!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); if (ktimes == 0) { /* delay x ms */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); + RF_DBG(dm, DBG_RF_IQK, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); /* platform_stall_execution(IQK_DELAY_TIME_88E*1000); */ ODM_delay_ms(IQK_DELAY_TIME_88E * 2); } else { /* delay x ms */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); + RF_DBG(dm, DBG_RF_IQK, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); /* platform_stall_execution(IQK_DELAY_TIME_88E*1000); */ ODM_delay_ms(IQK_DELAY_TIME_88E); @@ -628,19 +630,19 @@ phy_path_a_iqk_8188e( /* reload RF 0xdf */ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); - odm_set_rf_reg(dm, RF_PATH_A, 0xdf, RFREGOFFSETMASK, 0x180); + odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, RFREGOFFSETMASK, 0x180); /* Check failed */ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeac = 0x%x\n", reg_eac); + RF_DBG(dm, DBG_RF_IQK, "0xeac = 0x%x\n", reg_eac); reg_e94 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe94 = 0x%x\n", reg_e94); + RF_DBG(dm, DBG_RF_IQK, "0xe94 = 0x%x\n", reg_e94); reg_e9c = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe9c = 0x%x\n", reg_e9c); + RF_DBG(dm, DBG_RF_IQK, "0xe9c = 0x%x\n", reg_e9c); reg_ea4 = odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xea4 = 0x%x\n", reg_ea4); + RF_DBG(dm, DBG_RF_IQK, "0xea4 = 0x%x\n", reg_ea4); if (!(reg_eac & BIT(28)) && (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && @@ -671,11 +673,11 @@ phy_path_a_rx_iqk( { u32 reg_eac, reg_e94, reg_e9c, reg_ea4, u4tmp; u8 result = 0x00; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Rx IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Rx IQK!\n"); /* 1 Get TXIMR setting */ /* modify RXIQK mode table */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path-A Rx IQK modify RXIQK mode table!\n"); + RF_DBG(dm, DBG_RF_IQK, "path-A Rx IQK modify RXIQK mode table!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, RFREGOFFSETMASK, 0x800a0); odm_set_rf_reg(dm, RF_PATH_A, RF_RCK_OS, RFREGOFFSETMASK, 0x30000); @@ -683,8 +685,8 @@ phy_path_a_rx_iqk( odm_set_rf_reg(dm, RF_PATH_A, RF_TXPA_G2, RFREGOFFSETMASK, 0xf117b); /* PA,PAD gain adjust */ - odm_set_rf_reg(dm, RF_PATH_A, 0xdf, RFREGOFFSETMASK, 0x980); - odm_set_rf_reg(dm, RF_PATH_A, 0x56, RFREGOFFSETMASK, 0x510f0); + odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, RFREGOFFSETMASK, 0x980); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x56, RFREGOFFSETMASK, 0x510f0); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x808000); @@ -699,30 +701,30 @@ phy_path_a_rx_iqk( odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28160000); /* LO calibration setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "LO calibration setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "LO calibration setting!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x0046a911); /* One shot, path A LOK & IQK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "One shot, path A LOK & IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "One shot, path A LOK & IQK!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); /* delay x ms */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); + RF_DBG(dm, DBG_RF_IQK, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); /* platform_stall_execution(IQK_DELAY_TIME_88E*1000); */ ODM_delay_ms(IQK_DELAY_TIME_88E); /* reload RF 0xdf */ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); - odm_set_rf_reg(dm, RF_PATH_A, 0xdf, RFREGOFFSETMASK, 0x180); + odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, RFREGOFFSETMASK, 0x180); /* Check failed */ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeac = 0x%x\n", reg_eac); + RF_DBG(dm, DBG_RF_IQK, "0xeac = 0x%x\n", reg_eac); reg_e94 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe94 = 0x%x\n", reg_e94); + RF_DBG(dm, DBG_RF_IQK, "0xe94 = 0x%x\n", reg_e94); reg_e9c = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe9c = 0x%x\n", reg_e9c); + RF_DBG(dm, DBG_RF_IQK, "0xe9c = 0x%x\n", reg_e9c); if (!(reg_eac & BIT(28)) && (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && @@ -733,12 +735,12 @@ phy_path_a_rx_iqk( u4tmp = 0x80007C00 | (reg_e94 & 0x3FF0000) | ((reg_e9c & 0x3FF0000) >> 16); odm_set_bb_reg(dm, REG_TX_IQK, MASKDWORD, u4tmp); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe40 = 0x%x u4tmp = 0x%x\n", odm_get_bb_reg(dm, REG_TX_IQK, MASKDWORD), u4tmp); + RF_DBG(dm, DBG_RF_IQK, "0xe40 = 0x%x u4tmp = 0x%x\n", odm_get_bb_reg(dm, REG_TX_IQK, MASKDWORD), u4tmp); /* 1 RX IQK */ /* modify RXIQK mode table */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path-A Rx IQK modify RXIQK mode table 2!\n"); + RF_DBG(dm, DBG_RF_IQK, "path-A Rx IQK modify RXIQK mode table 2!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, RFREGOFFSETMASK, 0x800a0); odm_set_rf_reg(dm, RF_PATH_A, RF_RCK_OS, RFREGOFFSETMASK, 0x30000); @@ -746,8 +748,8 @@ phy_path_a_rx_iqk( odm_set_rf_reg(dm, RF_PATH_A, RF_TXPA_G2, RFREGOFFSETMASK, 0xf7ffa); /* PA,PAD gain adjust */ - odm_set_rf_reg(dm, RF_PATH_A, 0xdf, RFREGOFFSETMASK, 0x980); - odm_set_rf_reg(dm, RF_PATH_A, 0x56, RFREGOFFSETMASK, 0x51000); + odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, RFREGOFFSETMASK, 0x980); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x56, RFREGOFFSETMASK, 0x51000); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x808000); @@ -761,32 +763,32 @@ phy_path_a_rx_iqk( odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28160fff); /* LO calibration setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "LO calibration setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "LO calibration setting!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x0046a911); /* One shot, path A LOK & IQK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "One shot, path A LOK & IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "One shot, path A LOK & IQK!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); /* delay x ms */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); + RF_DBG(dm, DBG_RF_IQK, "delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E); /* platform_stall_execution(IQK_DELAY_TIME_88E*1000); */ ODM_delay_ms(IQK_DELAY_TIME_88E); /* reload RF 0xdf */ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); - odm_set_rf_reg(dm, RF_PATH_A, 0xdf, RFREGOFFSETMASK, 0x180); + odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, RFREGOFFSETMASK, 0x180); /* Check failed */ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeac = 0x%x\n", reg_eac); + RF_DBG(dm, DBG_RF_IQK, "0xeac = 0x%x\n", reg_eac); reg_e94 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe94 = 0x%x\n", reg_e94); + RF_DBG(dm, DBG_RF_IQK, "0xe94 = 0x%x\n", reg_e94); reg_e9c = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xe9c = 0x%x\n", reg_e9c); + RF_DBG(dm, DBG_RF_IQK, "0xe9c = 0x%x\n", reg_e9c); reg_ea4 = odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xea4 = 0x%x\n", reg_ea4); + RF_DBG(dm, DBG_RF_IQK, "0xea4 = 0x%x\n", reg_ea4); #if 0 if (!(reg_eac & BIT(28)) && @@ -802,7 +804,7 @@ phy_path_a_rx_iqk( (((reg_eac & 0x03FF0000) >> 16) != 0x36)) result |= 0x02; else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Rx IQK fail!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Rx IQK fail!!\n"); return result; @@ -816,29 +818,29 @@ phy_path_b_iqk_8188e( { u32 reg_eac, reg_eb4, reg_ebc, reg_ec4, reg_ecc; u8 result = 0x00; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "path B IQK!\n"); /* One shot, path B LOK & IQK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "One shot, path A LOK & IQK!\n"); + RF_DBG(dm, DBG_RF_IQK, "One shot, path A LOK & IQK!\n"); odm_set_bb_reg(dm, REG_IQK_AGC_CONT, MASKDWORD, 0x00000002); odm_set_bb_reg(dm, REG_IQK_AGC_CONT, MASKDWORD, 0x00000000); /* delay x ms */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME_88E); + RF_DBG(dm, DBG_RF_IQK, "delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME_88E); /* platform_stall_execution(IQK_DELAY_TIME_88E*1000); */ ODM_delay_ms(IQK_DELAY_TIME_88E); /* Check failed */ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeac = 0x%x\n", reg_eac); + RF_DBG(dm, DBG_RF_IQK, "0xeac = 0x%x\n", reg_eac); reg_eb4 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xeb4 = 0x%x\n", reg_eb4); + RF_DBG(dm, DBG_RF_IQK, "0xeb4 = 0x%x\n", reg_eb4); reg_ebc = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_B, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xebc = 0x%x\n", reg_ebc); + RF_DBG(dm, DBG_RF_IQK, "0xebc = 0x%x\n", reg_ebc); reg_ec4 = odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_B_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xec4 = 0x%x\n", reg_ec4); + RF_DBG(dm, DBG_RF_IQK, "0xec4 = 0x%x\n", reg_ec4); reg_ecc = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_B_2, MASKDWORD); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xecc = 0x%x\n", reg_ecc); + RF_DBG(dm, DBG_RF_IQK, "0xecc = 0x%x\n", reg_ecc); if (!(reg_eac & BIT(31)) && (((reg_eb4 & 0x03FF0000) >> 16) != 0x142) && @@ -852,7 +854,7 @@ phy_path_b_iqk_8188e( (((reg_ecc & 0x03FF0000) >> 16) != 0x36)) result |= 0x02; else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B Rx IQK fail!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path B Rx IQK fail!!\n"); return result; @@ -870,7 +872,7 @@ _phy_path_a_fill_iqk_matrix( { u32 oldval_0, X, TX0_A, reg; s32 Y, TX0_C; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"); + RF_DBG(dm, DBG_RF_IQK, "path A IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"); if (final_candidate == 0xFF) return; @@ -882,7 +884,7 @@ _phy_path_a_fill_iqk_matrix( if ((X & 0x00000200) != 0) X = X | 0xFFFFFC00; TX0_A = (X * oldval_0) >> 8; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "X = 0x%x, TX0_A = 0x%x, oldval_0 0x%x\n", X, TX0_A, oldval_0); + RF_DBG(dm, DBG_RF_IQK, "X = 0x%x, TX0_A = 0x%x, oldval_0 0x%x\n", X, TX0_A, oldval_0); odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0x3FF, TX0_A); odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(31), ((X * oldval_0 >> 7) & 0x1)); @@ -893,14 +895,14 @@ _phy_path_a_fill_iqk_matrix( TX0_C = (Y * oldval_0) >> 8; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Y = 0x%x, TX = 0x%x\n", Y, TX0_C); + RF_DBG(dm, DBG_RF_IQK, "Y = 0x%x, TX = 0x%x\n", Y, TX0_C); odm_set_bb_reg(dm, REG_OFDM_0_XC_TX_AFE, 0xF0000000, ((TX0_C & 0x3C0) >> 6)); odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0x003F0000, (TX0_C & 0x3F)); odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(29), ((Y * oldval_0 >> 7) & 0x1)); if (is_tx_only) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "_phy_path_a_fill_iqk_matrix only Tx OK\n"); + RF_DBG(dm, DBG_RF_IQK, "_phy_path_a_fill_iqk_matrix only Tx OK\n"); return; } @@ -931,7 +933,7 @@ _phy_path_b_fill_iqk_matrix( u32 oldval_1, X, TX1_A, reg; s32 Y, TX1_C; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"); + RF_DBG(dm, DBG_RF_IQK, "path B IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"); if (final_candidate == 0xFF) return; @@ -943,7 +945,7 @@ _phy_path_b_fill_iqk_matrix( if ((X & 0x00000200) != 0) X = X | 0xFFFFFC00; TX1_A = (X * oldval_1) >> 8; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "X = 0x%x, TX1_A = 0x%x\n", X, TX1_A); + RF_DBG(dm, DBG_RF_IQK, "X = 0x%x, TX1_A = 0x%x\n", X, TX1_A); odm_set_bb_reg(dm, REG_OFDM_0_XB_TX_IQ_IMBALANCE, 0x3FF, TX1_A); odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(27), ((X * oldval_1 >> 7) & 0x1)); @@ -953,7 +955,7 @@ _phy_path_b_fill_iqk_matrix( Y = Y | 0xFFFFFC00; TX1_C = (Y * oldval_1) >> 8; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C); + RF_DBG(dm, DBG_RF_IQK, "Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C); odm_set_bb_reg(dm, REG_OFDM_0_XD_TX_AFE, 0xF0000000, ((TX1_C & 0x3C0) >> 6)); odm_set_bb_reg(dm, REG_OFDM_0_XB_TX_IQ_IMBALANCE, 0x003F0000, (TX1_C & 0x3F)); @@ -985,7 +987,7 @@ _phy_save_adda_registers( if (odm_check_power_status(dm) == false) return; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Save ADDA parameters.\n"); + RF_DBG(dm, DBG_RF_IQK, "Save ADDA parameters.\n"); for (i = 0 ; i < register_num ; i++) adda_backup[i] = odm_get_bb_reg(dm, adda_reg[i], MASKDWORD); } @@ -1000,7 +1002,7 @@ _phy_save_mac_registers( { u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Save MAC parameters.\n"); + RF_DBG(dm, DBG_RF_IQK, "Save MAC parameters.\n"); for (i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++) mac_backup[i] = odm_read_1byte(dm, mac_reg[i]); mac_backup[i] = odm_read_4byte(dm, mac_reg[i]); @@ -1018,7 +1020,7 @@ _phy_reload_adda_registers( { u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Reload ADDA power saving parameters !\n"); + RF_DBG(dm, DBG_RF_IQK, "Reload ADDA power saving parameters !\n"); for (i = 0 ; i < regiester_num; i++) odm_set_bb_reg(dm, adda_reg[i], MASKDWORD, adda_backup[i]); } @@ -1032,7 +1034,7 @@ _phy_reload_mac_registers( { u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "Reload MAC parameters !\n"); + RF_DBG(dm, DBG_RF_IQK, "Reload MAC parameters !\n"); for (i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++) odm_write_1byte(dm, mac_reg[i], (u8)mac_backup[i]); odm_write_4byte(dm, mac_reg[i], mac_backup[i]); @@ -1050,7 +1052,7 @@ _phy_path_adda_on( u32 path_on; u32 i; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "ADDA ON.\n"); + RF_DBG(dm, DBG_RF_IQK, "ADDA ON.\n"); path_on = is_path_a_on ? 0x04db25a4 : 0x0b1b25a4; if (false == is2T) { @@ -1074,7 +1076,7 @@ _phy_mac_setting_calibration( { u32 i = 0; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "MAC settings for Calibration.\n"); + RF_DBG(dm, DBG_RF_IQK, "MAC settings for Calibration.\n"); odm_write_1byte(dm, mac_reg[i], 0x3F); @@ -1089,10 +1091,10 @@ _phy_path_a_stand_by( struct dm_struct *dm ) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path-A standby mode!\n"); + RF_DBG(dm, DBG_RF_IQK, "path-A standby mode!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); - odm_set_bb_reg(dm, 0x840, MASKDWORD, 0x00010000); + odm_set_bb_reg(dm, R_0x840, MASKDWORD, 0x00010000); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x808000); } @@ -1104,7 +1106,7 @@ _phy_pi_mode_switch( { u32 mode; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "BB Switch to %s mode!\n", (pi_mode ? "PI" : "SI")); + RF_DBG(dm, DBG_RF_IQK, "BB Switch to %s mode!\n", (pi_mode ? "PI" : "SI")); mode = pi_mode ? 0x01000100 : 0x01000000; odm_set_bb_reg(dm, REG_FPGA0_XA_HSSI_PARAMETER1, MASKDWORD, mode); @@ -1129,7 +1131,7 @@ phy_simularity_compare_8188e( else bound = 4; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "===> IQK:phy_simularity_compare_8188e c1 %d c2 %d!!!\n", c1, c2); + RF_DBG(dm, DBG_RF_IQK, "===> IQK:phy_simularity_compare_8188e c1 %d c2 %d!!!\n", c1, c2); simularity_bit_map = 0; @@ -1137,7 +1139,7 @@ phy_simularity_compare_8188e( for (i = 0; i < bound; i++) { diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); if (diff > MAX_TOLERANCE) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK:phy_simularity_compare_8188e differnece overflow index %d compare1 0x%x compare2 0x%x!!!\n", i, result[c1][i], result[c2][i]); + RF_DBG(dm, DBG_RF_IQK, "IQK:phy_simularity_compare_8188e differnece overflow index %d compare1 0x%x compare2 0x%x!!!\n", i, result[c1][i], result[c2][i]); if ((i == 2 || i == 6) && !simularity_bit_map) { if (result[c1][i] + result[c1][i + 1] == 0) @@ -1151,7 +1153,7 @@ phy_simularity_compare_8188e( } } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK:phy_simularity_compare_8188e simularity_bit_map %d !!!\n", simularity_bit_map); + RF_DBG(dm, DBG_RF_IQK, "IQK:phy_simularity_compare_8188e simularity_bit_map %d !!!\n", simularity_bit_map); if (simularity_bit_map == 0) { for (i = 0; i < (bound / 4); i++) { @@ -1238,14 +1240,14 @@ _phy_iq_calibrate_8188e( /* bbvalue = odm_get_bb_reg(dm, REG_FPGA0_RFMOD, MASKDWORD); * RT_DISP(FINIT, INIT_IQK, ("_phy_iq_calibrate_8188e()==>0x%08x\n",bbvalue)); */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t); + RF_DBG(dm, DBG_RF_IQK, "IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t); /* Save ADDA parameters, turn path A ADDA on */ _phy_save_adda_registers(dm, ADDA_REG, cali_info->ADDA_backup, IQK_ADDA_REG_NUM); _phy_save_mac_registers(dm, IQK_MAC_REG, cali_info->IQK_MAC_backup); _phy_save_adda_registers(dm, IQK_BB_REG_92C, cali_info->IQK_BB_backup, IQK_BB_REG_NUM); } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t); + RF_DBG(dm, DBG_RF_IQK, "IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t); _phy_path_adda_on(dm, ADDA_REG, true, is2T); @@ -1290,7 +1292,7 @@ _phy_iq_calibrate_8188e( odm_set_bb_reg(dm, REG_CONFIG_ANT_B, MASKDWORD, 0x0f600000); /* IQ calibration setting */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK setting!\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK setting!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x808000); odm_set_bb_reg(dm, REG_TX_IQK, MASKDWORD, 0x01007c00); odm_set_bb_reg(dm, REG_RX_IQK, MASKDWORD, 0x81004800); @@ -1301,7 +1303,7 @@ _phy_iq_calibrate_8188e( /* if(path_aok == 0x03){ */ if (path_aok == 0x01) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Tx IQK Success!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Tx IQK Success!!\n"); result[t][0] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD) & 0x3FF0000) >> 16; result[t][1] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD) & 0x3FF0000) >> 16; break; @@ -1320,18 +1322,18 @@ _phy_iq_calibrate_8188e( path_aok = phy_path_a_rx_iqk(dm, is2T); if (path_aok == 0x03) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Rx IQK Success!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Rx IQK Success!!\n"); /* result[t][0] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD)&0x3FF0000)>>16; * result[t][1] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD)&0x3FF0000)>>16; */ result[t][2] = (odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16; result[t][3] = (odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16; break; } else - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A Rx IQK Fail!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A Rx IQK Fail!!\n"); } if (0x00 == path_aok) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path A IQK failed!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path A IQK failed!!\n"); if (is2T) { _phy_path_a_stand_by(dm); @@ -1343,25 +1345,25 @@ _phy_iq_calibrate_8188e( path_bok = phy_path_b_iqk_8188e(dm); if (path_bok == 0x03) { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B IQK Success!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path B IQK Success!!\n"); result[t][4] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD) & 0x3FF0000) >> 16; result[t][5] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_B, MASKDWORD) & 0x3FF0000) >> 16; result[t][6] = (odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_B_2, MASKDWORD) & 0x3FF0000) >> 16; result[t][7] = (odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_B_2, MASKDWORD) & 0x3FF0000) >> 16; break; } else if (i == (retry_count - 1) && path_bok == 0x01) { /* Tx IQK OK */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B Only Tx IQK Success!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path B Only Tx IQK Success!!\n"); result[t][4] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD) & 0x3FF0000) >> 16; result[t][5] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_B, MASKDWORD) & 0x3FF0000) >> 16; } } if (0x00 == path_bok) - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "path B IQK failed!!\n"); + RF_DBG(dm, DBG_RF_IQK, "path B IQK failed!!\n"); } /* Back to BB mode, load original value */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK:Back to BB mode, load original value!\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK:Back to BB mode, load original value!\n"); odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); if (t != 0) { @@ -1385,7 +1387,7 @@ _phy_iq_calibrate_8188e( odm_set_bb_reg(dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x01008c00); } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "_phy_iq_calibrate_8188e() <==\n"); + RF_DBG(dm, DBG_RF_IQK, "_phy_iq_calibrate_8188e() <==\n"); } @@ -1492,11 +1494,11 @@ phy_iq_calibrate_8188e( if (is_recovery && (!dm->is_in_hct_test)) /* YJ,add for PowerTest,120405 */ #endif { - PHYDM_DBG(dm, ODM_COMP_INIT, "phy_iq_calibrate_8188e: Return due to is_recovery!\n"); + RF_DBG(dm, DBG_RF_INIT, "phy_iq_calibrate_8188e: Return due to is_recovery!\n"); _phy_reload_adda_registers(dm, IQK_BB_REG_92C, cali_info->IQK_BB_backup_recover, 9); return; } - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK:Start!!!\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK:Start!!!\n"); for (i = 0; i < 8; i++) { result[0][i] = 0; @@ -1519,7 +1521,7 @@ phy_iq_calibrate_8188e( is12simular = phy_simularity_compare_8188e(dm, result, 0, 1); if (is12simular) { final_candidate = 0; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: is12simular final_candidate is %x\n", final_candidate); + RF_DBG(dm, DBG_RF_IQK, "IQK: is12simular final_candidate is %x\n", final_candidate); break; } } @@ -1528,14 +1530,14 @@ phy_iq_calibrate_8188e( is13simular = phy_simularity_compare_8188e(dm, result, 0, 2); if (is13simular) { final_candidate = 0; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: is13simular final_candidate is %x\n", final_candidate); + RF_DBG(dm, DBG_RF_IQK, "IQK: is13simular final_candidate is %x\n", final_candidate); break; } is23simular = phy_simularity_compare_8188e(dm, result, 1, 2); if (is23simular) { final_candidate = 1; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: is23simular final_candidate is %x\n", final_candidate); + RF_DBG(dm, DBG_RF_IQK, "IQK: is23simular final_candidate is %x\n", final_candidate); } else { for (i = 0; i < 8; i++) reg_tmp += result[3][i]; @@ -1558,7 +1560,7 @@ phy_iq_calibrate_8188e( regebc = result[i][5]; regec4 = result[i][6]; regecc = result[i][7]; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc); + RF_DBG(dm, DBG_RF_IQK, "IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc); } if (final_candidate != 0xff) { @@ -1570,11 +1572,11 @@ phy_iq_calibrate_8188e( cali_info->regebc = regebc = result[final_candidate][5]; regec4 = result[final_candidate][6]; regecc = result[final_candidate][7]; - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: final_candidate is %x\n", final_candidate); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc); + RF_DBG(dm, DBG_RF_IQK, "IQK: final_candidate is %x\n", final_candidate); + RF_DBG(dm, DBG_RF_IQK, "IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc); is_patha_ok = is_pathb_ok = true; } else { - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK: FAIL use default value\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK: FAIL use default value\n"); cali_info->rege94 = cali_info->regeb4 = 0x100; /* X default value */ cali_info->rege9c = cali_info->regebc = 0x0; /* Y default value */ @@ -1594,9 +1596,9 @@ phy_iq_calibrate_8188e( cali_info->iqk_matrix_reg_setting[indexforchannel].is_iqk_done = true; } /* RT_DISP(FINIT, INIT_IQK, ("\nIQK OK indexforchannel %d.\n", indexforchannel)); */ - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "\nIQK OK indexforchannel %d.\n", indexforchannel); + RF_DBG(dm, DBG_RF_IQK, "\nIQK OK indexforchannel %d.\n", indexforchannel); _phy_save_adda_registers(dm, IQK_BB_REG_92C, cali_info->IQK_BB_backup_recover, IQK_BB_REG_NUM); - PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "IQK finished\n"); + RF_DBG(dm, DBG_RF_IQK, "IQK finished\n"); } @@ -1655,7 +1657,7 @@ void _phy_set_rf_path_switch_8188e( /* <20120504, Kordan> [8188E] We should make AntDiversity controlled by HW (0x870[9:8] = 0), */ /* otherwise the following action has no effect. (0x860[9:8] has the effect only if AntDiversity controlled by SW) */ odm_set_bb_reg(dm, REG_FPGA0_XAB_RF_INTERFACE_SW, BIT(8) | BIT(9), 0x0); - odm_set_bb_reg(dm, 0x914, MASKLWORD, 0x0201); /* Set up the ant mapping table */ + odm_set_bb_reg(dm, R_0x914, MASKLWORD, 0x0201); /* Set up the ant mapping table */ if (is_main) { /* odm_set_bb_reg(dm, REG_FPGA0_XA_RF_INTERFACE_OE, BIT(8)|BIT9, 0x2); */ /* Tx Main (SW control)(The right antenna) */ @@ -1665,7 +1667,7 @@ void _phy_set_rf_path_switch_8188e( /* 4 [ Rx ] */ odm_set_bb_reg(dm, REG_FPGA0_XB_RF_INTERFACE_OE, BIT(5) | BIT(4) | BIT(3), 0x1); /* ant_div_type = TRDiv, right antenna */ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) - odm_set_bb_reg(dm, 0xb2c, BIT(31), 0x1); /* RxCG, Default is RxCG. ant_div_type = 2RDiv, left antenna */ + odm_set_bb_reg(dm, R_0xb2c, BIT(31), 0x1); /* RxCG, Default is RxCG. ant_div_type = 2RDiv, left antenna */ } else { /* odm_set_bb_reg(dm, REG_FPGA0_XA_RF_INTERFACE_OE, BIT(8)|BIT9, 0x1); */ /* Tx Aux (SW control)(The left antenna) */ @@ -1675,7 +1677,7 @@ void _phy_set_rf_path_switch_8188e( /* 4 [ Rx ] */ odm_set_bb_reg(dm, REG_FPGA0_XB_RF_INTERFACE_OE, BIT(5) | BIT(4) | BIT(3), 0x0); /* ant_div_type = TRDiv, left antenna */ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) - odm_set_bb_reg(dm, 0xb2c, BIT(31), 0x0); /* RxCS, ant_div_type = 2RDiv, right antenna */ + odm_set_bb_reg(dm, R_0xb2c, BIT(31), 0x0); /* RxCS, ant_div_type = 2RDiv, right antenna */ } } @@ -1786,3 +1788,4 @@ boolean phy_query_rf_path_switch_8188e( } } #endif +#endif diff --git a/hal/phydm/halrf/rtl8188e/halrf_8188e_win.h b/hal/phydm/halrf/rtl8188e/halrf_8188e_win.h index 4b430d4..6fbc5fb 100644 --- a/hal/phydm/halrf/rtl8188e/halrf_8188e_win.h +++ b/hal/phydm/halrf/rtl8188e/halrf_8188e_win.h @@ -13,8 +13,8 @@ * *****************************************************************************/ -#ifndef __HAL_PHY_RF_8188E_H__ -#define __HAL_PHY_RF_8188E_H__ +#ifndef __HALRF_8188E_H__ +#define __HALRF_8188E_H__ /*--------------------------Define Parameters-------------------------------*/ #define IQK_DELAY_TIME_88E 15 /* ms */ @@ -23,11 +23,7 @@ #define index_mapping_NUM_88E 15 #define AVG_THERMAL_NUM_88E 4 -#if RT_PLATFORM == PLATFORM_MACOSX - #include "halphyrf_win.h" -#else #include "halrf/halphyrf_win.h" -#endif void configure_txpower_track_8188e( struct txpwrtrack_cfg *config @@ -134,7 +130,7 @@ void phy_set_rf_path_switch_8188e( void halrf_rf_lna_setting_8188e( struct dm_struct *dm, - enum phydm_lna_set type + enum halrf_lna_set type ); -#endif /* #ifndef __HAL_PHY_RF_8188E_H__ */ +#endif /*#ifndef __HALRF_8188E_H__*/ diff --git a/hal/phydm/phydm.c b/hal/phydm/phydm.c index d7b45b3..46f0620 100644 --- a/hal/phydm/phydm.c +++ b/hal/phydm/phydm.c @@ -23,30 +23,33 @@ * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" - -const u16 phy_rate_table[] = { /*20M*/ +const u16 phy_rate_table[] = { + /*@20M*/ 1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54, - 6, 13, 19, 26, 39, 52, 58, 65, /*MCS0~7*/ - 13, 26, 39, 52, 78, 104, 117, 130 /*MCS8~15*/ + 6, 13, 19, 26, 39, 52, 58, 65, /*@MCS0~7*/ + 13, 26, 39, 52, 78, 104, 117, 130, /*@MCS8~15*/ + 19, 39, 58, 78, 117, 156, 175, 195, /*@MCS16~23*/ + 26, 52, 78, 104, 156, 208, 234, 260, /*@MCS24~31*/ + 6, 13, 19, 26, 39, 52, 58, 65, 78, 90, /*@1ss MCS0~9*/ + 13, 26, 39, 52, 78, 104, 117, 130, 156, 180, /*@2ss MCS0~9*/ + 19, 39, 58, 78, 117, 156, 175, 195, 234, 260, /*@3ss MCS0~9*/ + 26, 52, 78, 104, 156, 208, 234, 260, 312, 360 /*@4ss MCS0~9*/ }; -void -phydm_traffic_load_decision( - void *dm_void -) +void phydm_traffic_load_decision(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 bit_shift_num = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 shift = 0; - /*---TP & Trafic-load calculation---*/ + /*@---TP & Trafic-load calculation---*/ if (dm->last_tx_ok_cnt > *dm->num_tx_bytes_unicast) dm->last_tx_ok_cnt = *dm->num_tx_bytes_unicast; @@ -59,15 +62,16 @@ phydm_traffic_load_decision( dm->last_tx_ok_cnt = *dm->num_tx_bytes_unicast; dm->last_rx_ok_cnt = *dm->num_rx_bytes_unicast; - bit_shift_num = 17 + (PHYDM_WATCH_DOG_PERIOD - 1); /*AP: <<3(8bit), >>20(10^6,M), >>0(1sec)*/ - /*WIN&CE: <<3(8bit), >>20(10^6,M), >>1(2sec)*/ + /*@AP: <<3(8bit), >>20(10^6,M), >>0(1sec)*/ + shift = 17 + (PHYDM_WATCH_DOG_PERIOD - 1); + /*@WIN&CE: <<3(8bit), >>20(10^6,M), >>1(2sec)*/ - dm->tx_tp = ((dm->tx_tp) >> 1) + (u32)(((dm->cur_tx_ok_cnt) >> bit_shift_num) >> 1); - dm->rx_tp = ((dm->rx_tp) >> 1) + (u32)(((dm->cur_rx_ok_cnt) >> bit_shift_num) >> 1); + dm->tx_tp = (dm->tx_tp >> 1) + (u32)((dm->cur_tx_ok_cnt >> shift) >> 1); + dm->rx_tp = (dm->rx_tp >> 1) + (u32)((dm->cur_rx_ok_cnt >> shift) >> 1); dm->total_tp = dm->tx_tp + dm->rx_tp; - /*[Calculate TX/RX state]*/ + /*@[Calculate TX/RX state]*/ if (dm->tx_tp > (dm->rx_tp << 1)) dm->txrx_state_all = TX_STATE; else if (dm->rx_tp > (dm->tx_tp << 1)) @@ -75,136 +79,187 @@ phydm_traffic_load_decision( else dm->txrx_state_all = BI_DIRECTION_STATE; - /*[Calculate consecutive idlel time]*/ - if (dm->total_tp == 0) + /*@[Traffic load decision]*/ + dm->pre_traffic_load = dm->traffic_load; + + if (dm->cur_tx_ok_cnt > 1875000 || dm->cur_rx_ok_cnt > 1875000) { + /* @( 1.875M * 8bit ) / 2sec= 7.5M bits /sec )*/ + dm->traffic_load = TRAFFIC_HIGH; + } else if (dm->cur_tx_ok_cnt > 500000 || dm->cur_rx_ok_cnt > 500000) { + /*@( 0.5M * 8bit ) / 2sec = 2M bits /sec )*/ + dm->traffic_load = TRAFFIC_MID; + } else if (dm->cur_tx_ok_cnt > 100000 || dm->cur_rx_ok_cnt > 100000) { + /*@( 0.1M * 8bit ) / 2sec = 0.4M bits /sec )*/ + dm->traffic_load = TRAFFIC_LOW; + } else if (dm->cur_tx_ok_cnt > 25000 || dm->cur_rx_ok_cnt > 25000) { + /*@( 0.025M * 8bit ) / 2sec = 0.1M bits /sec )*/ + dm->traffic_load = TRAFFIC_ULTRA_LOW; + } else { + dm->traffic_load = TRAFFIC_NO_TP; + } + + /*@[Calculate consecutive idlel time]*/ + if (dm->traffic_load == 0) dm->consecutive_idlel_time += PHYDM_WATCH_DOG_PERIOD; else dm->consecutive_idlel_time = 0; - /*[Traffic load decision]*/ - dm->pre_traffic_load = dm->traffic_load; + #if 0 + PHYDM_DBG(dm, DBG_COMMON_FLOW, + "cur_tx_ok_cnt = %d, cur_rx_ok_cnt = %d, last_tx_ok_cnt = %d, last_rx_ok_cnt = %d\n", + dm->cur_tx_ok_cnt, dm->cur_rx_ok_cnt, dm->last_tx_ok_cnt, + dm->last_rx_ok_cnt); - if (dm->cur_tx_ok_cnt > 1875000 || dm->cur_rx_ok_cnt > 1875000) { /* ( 1.875M * 8bit ) / 2sec= 7.5M bits /sec )*/ - - dm->traffic_load = TRAFFIC_HIGH; - /**/ - } else if (dm->cur_tx_ok_cnt > 500000 || dm->cur_rx_ok_cnt > 500000) { /*( 0.5M * 8bit ) / 2sec = 2M bits /sec )*/ - - dm->traffic_load = TRAFFIC_MID; - /**/ - } else if (dm->cur_tx_ok_cnt > 100000 || dm->cur_rx_ok_cnt > 100000) { /*( 0.1M * 8bit ) / 2sec = 0.4M bits /sec )*/ - - dm->traffic_load = TRAFFIC_LOW; - /**/ - } else { - dm->traffic_load = TRAFFIC_ULTRA_LOW; - /**/ - } - - /* - PHYDM_DBG(dm, DBG_COMMON_FLOW, "cur_tx_ok_cnt = %d, cur_rx_ok_cnt = %d, last_tx_ok_cnt = %d, last_rx_ok_cnt = %d\n", - dm->cur_tx_ok_cnt, dm->cur_rx_ok_cnt, dm->last_tx_ok_cnt, dm->last_rx_ok_cnt); - - PHYDM_DBG(dm, DBG_COMMON_FLOW, "tx_tp = %d, rx_tp = %d\n", - dm->tx_tp, dm->rx_tp); - */ - + PHYDM_DBG(dm, DBG_COMMON_FLOW, "tx_tp = %d, rx_tp = %d\n", dm->tx_tp, + dm->rx_tp); + #endif } -void -phydm_init_cck_setting( - struct dm_struct *dm -) +void phydm_cck_new_agc_chk(struct dm_struct *dm) { -#if (RTL8192E_SUPPORT == 1) - u32 value_824, value_82c; + dm->cck_new_agc = 0; + +#if (RTL8723D_SUPPORT || RTL8822B_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8197F_SUPPORT || RTL8710B_SUPPORT || RTL8192F_SUPPORT ||\ + RTL8195B_SUPPORT || RTL8198F_SUPPORT || RTL8822C_SUPPORT ||\ + RTL8721D_SUPPORT) + if (dm->support_ic_type & + (ODM_RTL8723D | ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8197F | + ODM_RTL8710B | ODM_RTL8192F | ODM_RTL8195B | ODM_RTL8721D)) { + /*@1: new agc 0: old agc*/ + dm->cck_new_agc = (boolean)odm_get_bb_reg(dm, R_0xa9c, BIT(17)); + } else if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8822C)) { + /*@1: new agc 0: old agc*/ + dm->cck_new_agc = (boolean)odm_get_bb_reg(dm, R_0x1a9c, + BIT(17)); + } #endif +} - dm->is_cck_high_power = (boolean) odm_get_bb_reg(dm, ODM_REG(CCK_RPT_FORMAT, dm), ODM_BIT(CCK_RPT_FORMAT, dm)); +/*select 3 or 4 bit LNA */ +void phydm_cck_lna_bit_num_chk(struct dm_struct *dm) +{ + boolean report_type = 0; + #if (RTL8192E_SUPPORT) + u32 value_824, value_82c; + #endif - phydm_config_cck_rx_antenna_init(dm); - phydm_config_cck_rx_path(dm, BB_PATH_A); - -#if (RTL8192E_SUPPORT == 1) + #if (RTL8192E_SUPPORT) if (dm->support_ic_type & (ODM_RTL8192E)) { - /* 0x824[9] = 0x82C[9] = 0xA80[7] those registers setting should be equal or CCK RSSI report may be incorrect */ - value_824 = odm_get_bb_reg(dm, 0x824, BIT(9)); - value_82c = odm_get_bb_reg(dm, 0x82c, BIT(9)); + /* @0x824[9] = 0x82C[9] = 0xA80[7] those registers setting + * should be equal or CCK RSSI report may be incorrect + */ + value_824 = odm_get_bb_reg(dm, R_0x824, BIT(9)); + value_82c = odm_get_bb_reg(dm, R_0x82c, BIT(9)); if (value_824 != value_82c) - odm_set_bb_reg(dm, 0x82c, BIT(9), value_824); - odm_set_bb_reg(dm, 0xa80, BIT(7), value_824); - dm->cck_agc_report_type = (boolean)value_824; - - PHYDM_DBG(dm, ODM_COMP_INIT, "cck_agc_report_type = (( %d )), ext_lna_gain = (( %d ))\n", dm->cck_agc_report_type, dm->ext_lna_gain); + odm_set_bb_reg(dm, R_0x82c, BIT(9), value_824); + odm_set_bb_reg(dm, R_0xa80, BIT(7), value_824); + report_type = (boolean)value_824; } -#endif + #endif -#if ((RTL8703B_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8710B_SUPPORT == 1)) - if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) { - dm->cck_agc_report_type = odm_get_bb_reg(dm, 0x950, BIT(11)) ? 1 : 0; /*1: 4bit LNA, 0: 3bit LNA */ + #if (RTL8703B_SUPPORT || RTL8723D_SUPPORT || RTL8710B_SUPPORT) + if (dm->support_ic_type & + (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) { + report_type = (boolean)odm_get_bb_reg(dm, R_0x950, BIT(11)); - if (dm->cck_agc_report_type != 1) { - pr_debug("[Warning] 8703B/8723D/8710B CCK should be 4bit LNA, ie. 0x950[11] = 1\n"); - /**/ - } + if (report_type != 1) + pr_debug("[Warning] CCK should be 4bit LNA\n"); } -#endif + #endif -#if (RTL8821C_SUPPORT == 1) + #if (RTL8821C_SUPPORT) if (dm->support_ic_type & ODM_RTL8821C) { - dm->cck_new_agc = odm_get_bb_reg(dm, 0xa9c, BIT(17)) ? true : false; /*1: new agc 0: old agc*/ - if (dm->cck_new_agc == 0 && dm->default_rf_set_8821c == SWITCH_TO_BTG) - dm->cck_agc_report_type = 1; + if (dm->default_rf_set_8821c == SWITCH_TO_BTG) + report_type = 1; } -#endif + #endif -#if ((RTL8723D_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8710B_SUPPORT == 1)) - if (dm->support_ic_type & (ODM_RTL8723D | ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8710B)) - dm->cck_new_agc = odm_get_bb_reg(dm, 0xa9c, BIT(17)) ? true : false; /*1: new agc 0: old agc*/ - else -#endif - { - dm->cck_new_agc = false; - /**/ - } - - phydm_get_cck_rssi_table_from_reg(dm); + dm->cck_agc_report_type = report_type; + PHYDM_DBG(dm, ODM_COMP_INIT, "cck_agc_report_type=((%d))\n", + dm->cck_agc_report_type); } -void -phydm_init_hw_info_by_rfe( - struct dm_struct *dm -) +void phydm_init_cck_setting(struct dm_struct *dm) { -#if (RTL8822B_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8822B) - phydm_init_hw_info_by_rfe_type_8822b(dm); + u32 reg_tmp = 0; + u32 mask_tmp = 0; + + phydm_cck_new_agc_chk(dm); + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + return; + + reg_tmp = ODM_REG(CCK_RPT_FORMAT, dm); + mask_tmp = ODM_BIT(CCK_RPT_FORMAT, dm); + dm->is_cck_high_power = (boolean)odm_get_bb_reg(dm, reg_tmp, mask_tmp); + + PHYDM_DBG(dm, ODM_COMP_INIT, "ext_lna_gain=((%d))\n", dm->ext_lna_gain); + + phydm_config_cck_rx_antenna_init(dm); + + if (dm->support_ic_type & ODM_RTL8192F) + phydm_config_cck_rx_path(dm, BB_PATH_AB); + else if (dm->valid_path_set == BB_PATH_A) + phydm_config_cck_rx_path(dm, BB_PATH_A); + else if (dm->valid_path_set == BB_PATH_B) + phydm_config_cck_rx_path(dm, BB_PATH_B); + + phydm_cck_lna_bit_num_chk(dm); + phydm_get_cck_rssi_table_from_reg(dm); +} + +void phydm_init_hw_info_by_rfe(struct dm_struct *dm) +{ +#if (RTL8822B_SUPPORT) + /*@if (dm->support_ic_type & ODM_RTL8822B)*/ + /*@phydm_init_hw_info_by_rfe_type_8822b(dm);*/ #endif -#if (RTL8821C_SUPPORT == 1) +#if (RTL8821C_SUPPORT) if (dm->support_ic_type & ODM_RTL8821C) phydm_init_hw_info_by_rfe_type_8821c(dm); #endif -#if (RTL8197F_SUPPORT == 1) +#if (RTL8197F_SUPPORT) if (dm->support_ic_type & ODM_RTL8197F) phydm_init_hw_info_by_rfe_type_8197f(dm); #endif } -void -phydm_common_info_self_init( - struct dm_struct *dm -) +void phydm_common_info_self_init(struct dm_struct *dm) { + u32 reg_tmp = 0; + u32 mask_tmp = 0; + + dm->run_in_drv_fw = RUN_IN_DRIVER; + + /*@BB IP Generation*/ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + dm->ic_ip_series = PHYDM_IC_JGR3; + else if (dm->support_ic_type & ODM_IC_11AC_SERIES) + dm->ic_ip_series = PHYDM_IC_AC; + else if (dm->support_ic_type & ODM_IC_11N_SERIES) + dm->ic_ip_series = PHYDM_IC_N; + + /*@BB phy-status Generation*/ + if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) + dm->ic_phy_sts_type = PHYDM_PHYSTS_TYPE_3; + else if (dm->support_ic_type & PHYSTS_2ND_TYPE_IC) + dm->ic_phy_sts_type = PHYDM_PHYSTS_TYPE_2; + else + dm->ic_phy_sts_type = PHYDM_PHYSTS_TYPE_1; + phydm_init_cck_setting(dm); - dm->rf_path_rx_enable = (u8) odm_get_bb_reg(dm, ODM_REG(BB_RX_PATH, dm), ODM_BIT(BB_RX_PATH, dm)); + + reg_tmp = ODM_REG(BB_RX_PATH, dm); + mask_tmp = ODM_BIT(BB_RX_PATH, dm); + dm->rf_path_rx_enable = (u8)odm_get_bb_reg(dm, reg_tmp, mask_tmp); #if (DM_ODM_SUPPORT_TYPE != ODM_CE) dm->is_net_closed = &dm->BOOLEAN_temp; phydm_init_debug_setting(dm); #endif - phydm_init_trx_antenna_setting(dm); phydm_init_soft_ml_setting(dm); dm->phydm_sys_up_time = 0; @@ -213,13 +268,20 @@ phydm_common_info_self_init( dm->num_rf_path = 1; else if (dm->support_ic_type & ODM_IC_2SS) dm->num_rf_path = 2; + #if 0 + /* @RTK do not has IC which is equipped with 3 RF paths, + * so ODM_IC_3SS is an enpty macro and result in coverity check errors + */ else if (dm->support_ic_type & ODM_IC_3SS) dm->num_rf_path = 3; + #endif else if (dm->support_ic_type & ODM_IC_4SS) dm->num_rf_path = 4; else dm->num_rf_path = 1; + phydm_trx_antenna_setting_init(dm, dm->num_rf_path); + dm->tx_rate = 0xFF; dm->rssi_min_by_path = 0xFF; @@ -237,67 +299,63 @@ phydm_common_info_self_init( dm->nbi_set_result = 0; dm->is_init_hw_info_by_rfe = false; - dm->pre_dbg_priority = BB_DBGPORT_RELEASE; + dm->pre_dbg_priority = DBGPORT_RELEASE; dm->tp_active_th = 5; dm->disable_phydm_watchdog = 0; dm->u8_dummy = 0xf; dm->u16_dummy = 0xffff; dm->u32_dummy = 0xffffffff; - - /*odm_memory_set(dm, &(dm->pause_lv_table.lv_dig), 0, sizeof(struct phydm_pause_lv));*/ + dm->pause_lv_table.lv_cckpd = PHYDM_PAUSE_RELEASE; dm->pause_lv_table.lv_dig = PHYDM_PAUSE_RELEASE; + dm->pre_is_linked = false; + dm->is_linked = false; + if (!(dm->is_fcs_mode_enable)) { + dm->is_fcs_mode_enable = &dm->boolean_dummy; + pr_debug("[Warning] is_fcs_mode_enable=NULL\n"); + } } -void -phydm_cmn_sta_info_update( - void *dm_void, - u8 macid -) +void phydm_cmn_sta_info_update(void *dm_void, u8 macid) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; - struct ra_sta_info *ra = NULL; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; + struct ra_sta_info *ra = NULL; if (is_sta_active(sta)) { ra = &sta->ra_info; } else { - PHYDM_DBG(dm, DBG_RA_MASK, "[Warning] %s invalid sta_info\n", __func__); + PHYDM_DBG(dm, DBG_RA_MASK, "[Warning] %s invalid sta_info\n", + __func__); return; } PHYDM_DBG(dm, DBG_RA_MASK, "%s ======>\n", __func__); PHYDM_DBG(dm, DBG_RA_MASK, "MACID=%d\n", sta->mac_id); - /*[Calculate TX/RX state]*/ + /*@[Calculate TX/RX state]*/ if (sta->tx_moving_average_tp > (sta->rx_moving_average_tp << 1)) - ra->txrx_state= TX_STATE; + ra->txrx_state = TX_STATE; else if (sta->rx_moving_average_tp > (sta->tx_moving_average_tp << 1)) ra->txrx_state = RX_STATE; else ra->txrx_state = BI_DIRECTION_STATE; - ra->is_noisy = dm->noisy_decision; - + ra->is_noisy = dm->noisy_decision; } -void -phydm_common_info_self_update( - struct dm_struct *dm -) +void phydm_common_info_self_update(struct dm_struct *dm) { - u8 sta_cnt = 0, num_active_client = 0; - u32 i, one_entry_macid = 0; - u32 ma_rx_tp = 0; - struct cmn_sta_info *sta; - + u8 sta_cnt = 0, num_active_client = 0; + u32 i, one_entry_macid = 0; + u32 ma_rx_tp = 0; + u32 tp_diff = 0; + struct cmn_sta_info *sta; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - - PADAPTER adapter = (PADAPTER)dm->adapter; - - PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; + PADAPTER adapter = (PADAPTER)dm->adapter; + PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; sta = dm->phydm_sta_info[0]; if (mgnt_info->mAssoc) { @@ -305,8 +363,7 @@ phydm_common_info_self_update( for (i = 0; i < 6; i++) sta->mac_addr[i] = mgnt_info->Bssid[i]; } else if (GetFirstClientPort(adapter)) { - //void *client_adapter = GetFirstClientPort(adapter); - struct _ADAPTER *client_adapter = GetFirstClientPort(adapter); + struct _ADAPTER *client_adapter = GetFirstClientPort(adapter); sta->dm_ctrl |= STA_DM_CTRL_ACTIVE; for (i = 0; i < 6; i++) @@ -328,17 +385,20 @@ phydm_common_info_self_update( sta = dm->phydm_sta_info[i]; if (is_sta_active(sta)) { sta_cnt++; - + if (sta_cnt == 1) one_entry_macid = i; phydm_cmn_sta_info_update(dm, (u8)i); - #if (BEAMFORMING_SUPPORT == 1) - //phydm_get_txbf_device_num(dm, (u8)i); + #ifdef PHYDM_BEAMFORMING_SUPPORT + /*@phydm_get_txbf_device_num(dm, (u8)i);*/ #endif - ma_rx_tp = sta->rx_moving_average_tp + sta->tx_moving_average_tp; - PHYDM_DBG(dm, DBG_COMMON_FLOW, "TP[%d]: ((%d )) bit/sec\n", i, ma_rx_tp); + ma_rx_tp = sta->rx_moving_average_tp + + sta->tx_moving_average_tp; + + PHYDM_DBG(dm, DBG_COMMON_FLOW, + "TP[%d]: ((%d )) bit/sec\n", i, ma_rx_tp); if (ma_rx_tp > ACTIVE_TP_THRESHOLD) num_active_client++; @@ -356,16 +416,21 @@ phydm_common_info_self_update( dm->tp_active_occur = 0; - PHYDM_DBG(dm, DBG_COMMON_FLOW, "one_entry_tp=((%d)), pre_one_entry_tp=((%d))\n", - dm->one_entry_tp, dm->pre_one_entry_tp); + PHYDM_DBG(dm, DBG_COMMON_FLOW, + "one_entry_tp=((%d)), pre_one_entry_tp=((%d))\n", + dm->one_entry_tp, dm->pre_one_entry_tp); - if ((dm->one_entry_tp > dm->pre_one_entry_tp) && (dm->pre_one_entry_tp <= 2)) { - if ((dm->one_entry_tp - dm->pre_one_entry_tp) > dm->tp_active_th) + if (dm->one_entry_tp > dm->pre_one_entry_tp && + dm->pre_one_entry_tp <= 2) { + tp_diff = dm->one_entry_tp - dm->pre_one_entry_tp; + + if (tp_diff > dm->tp_active_th) dm->tp_active_occur = 1; } dm->pre_one_entry_tp = dm->one_entry_tp; - } else + } else { dm->is_one_entry_only = false; + } dm->pre_number_linked_client = dm->number_linked_client; dm->pre_number_active_client = dm->number_active_client; @@ -381,59 +446,45 @@ phydm_common_info_self_update( dm->is_dfs_band = phydm_is_dfs_band(dm); dm->phy_dbg_info.show_phy_sts_cnt = 0; + /*[Link Status Check]*/ + dm->first_connect = dm->is_linked && !dm->pre_is_linked; + dm->first_disconnect = !dm->is_linked && dm->pre_is_linked; + dm->pre_is_linked = dm->is_linked; } -void -phydm_common_info_self_reset( - struct dm_struct *dm -) +void phydm_common_info_self_reset(struct dm_struct *dm) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - dm->phy_dbg_info.num_qry_beacon_pkt = 0; -#endif + struct odm_phy_dbg_info *dbg_t = &dm->phy_dbg_info; + + dbg_t->beacon_cnt_in_period = dbg_t->num_qry_beacon_pkt; + dbg_t->num_qry_beacon_pkt = 0; + + dm->rxsc_l = 0xff; + dm->rxsc_20 = 0xff; + dm->rxsc_40 = 0xff; + dm->rxsc_80 = 0xff; } void * -phydm_get_structure( - struct dm_struct *dm, - u8 structure_type -) +phydm_get_structure(struct dm_struct *dm, u8 structure_type) { - void *structure = NULL; -#if RTL8195A_SUPPORT + void *structure = NULL; + switch (structure_type) { - case PHYDM_FALSEALMCNT: - structure = &false_alm_cnt; - break; - - case PHYDM_CFOTRACK: - structure = &dm_cfo_track; - break; - - case PHYDM_ADAPTIVITY: - structure = &dm->adaptivity; - break; - - default: - break; - } - -#else - switch (structure_type) { - case PHYDM_FALSEALMCNT: + case PHYDM_FALSEALMCNT: structure = &dm->false_alm_cnt; break; - case PHYDM_CFOTRACK: + case PHYDM_CFOTRACK: structure = &dm->dm_cfo_track; break; - case PHYDM_ADAPTIVITY: + case PHYDM_ADAPTIVITY: structure = &dm->adaptivity; break; - case PHYDM_DFS: + case PHYDM_DFS: structure = &dm->dfs; break; @@ -441,14 +492,18 @@ phydm_get_structure( break; } -#endif - return structure; + return structure; } -void -phydm_hw_setting( - struct dm_struct *dm -) +void phydm_phy_info_update(struct dm_struct *dm) +{ +#if (RTL8822B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8822B) + dm->phy_dbg_info.condi_num = phydm_get_condi_num_8822b(dm); +#endif +} + +void phydm_hw_setting(struct dm_struct *dm) { #if (RTL8821A_SUPPORT == 1) if (dm->support_ic_type & ODM_RTL8821) @@ -474,235 +529,274 @@ phydm_hw_setting( if (dm->support_ic_type & ODM_RTL8197F) phydm_hwsetting_8197f(dm); #endif + +#if (RTL8192F_SUPPORT == 1) + if (dm->support_ic_type & ODM_RTL8192F) + phydm_hwsetting_8192f(dm); +#endif } - #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -u64 -phydm_supportability_init_win( - void *dm_void -) +u64 phydm_supportability_init_win( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u64 support_ability = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u64 support_ability = 0; switch (dm->support_ic_type) { - /*---------------N Series--------------------*/ - #if (RTL8188E_SUPPORT == 1) - case ODM_RTL8188E: +/*@---------------N Series--------------------*/ +#if (RTL8188E_SUPPORT) + case ODM_RTL8188E: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | + ODM_BB_DIG | + ODM_BB_RA_MASK | /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ENV_MONITOR | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + ODM_BB_ENV_MONITOR | ODM_BB_PRIMARY_CCA; break; - #endif +#endif - #if (RTL8192E_SUPPORT == 1) - case ODM_RTL8192E: +#if (RTL8192E_SUPPORT) + case ODM_RTL8192E: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | + ODM_BB_DIG | + ODM_BB_RA_MASK | /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ENV_MONITOR | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + ODM_BB_ENV_MONITOR | ODM_BB_PRIMARY_CCA; break; - #endif +#endif - #if (RTL8723B_SUPPORT == 1) - case ODM_RTL8723B: +#if (RTL8723B_SUPPORT) + case ODM_RTL8723B: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | + ODM_BB_DIG | + ODM_BB_RA_MASK | /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ENV_MONITOR | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + ODM_BB_ENV_MONITOR | ODM_BB_PRIMARY_CCA; break; - #endif +#endif - #if (RTL8703B_SUPPORT == 1) - case ODM_RTL8703B: +#if (RTL8703B_SUPPORT) + case ODM_RTL8703B: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | + ODM_BB_DIG | + ODM_BB_RA_MASK | /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif - #if (RTL8723D_SUPPORT == 1) - case ODM_RTL8723D: +#if (RTL8723D_SUPPORT) + case ODM_RTL8723D: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | + ODM_BB_DIG | + ODM_BB_RA_MASK | /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /* ODM_BB_PWR_TRAIN | */ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + ODM_BB_PWR_TRAIN | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif - #if (RTL8710B_SUPPORT == 1) - case ODM_RTL8710B: +#if (RTL8710B_SUPPORT) + case ODM_RTL8710B: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | + ODM_BB_DIG | + ODM_BB_RA_MASK | /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + ODM_BB_PWR_TRAIN | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif - #if (RTL8188F_SUPPORT == 1) - case ODM_RTL8188F: +#if (RTL8188F_SUPPORT) + case ODM_RTL8188F: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | + ODM_BB_DIG | + ODM_BB_RA_MASK | /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif - - /*---------------AC Series-------------------*/ +#endif - #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) - case ODM_RTL8812: - case ODM_RTL8821: +#if (RTL8192F_SUPPORT) + case ODM_RTL8192F: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_DYNAMIC_TXPWR | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + ODM_BB_PWR_TRAIN | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + ODM_BB_ADAPTIVE_SOML | + ODM_BB_ENV_MONITOR; + /*ODM_BB_LNA_SAT_CHK |*/ + /*ODM_BB_PRIMARY_CCA*/ + + break; +#endif + +/*@---------------AC Series-------------------*/ + +#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT) + case ODM_RTL8812: + case ODM_RTL8821: + support_ability |= + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_DYNAMIC_TXPWR | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif - #if (RTL8814A_SUPPORT == 1) +#if (RTL8814A_SUPPORT) case ODM_RTL8814A: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_DYNAMIC_TXPWR | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_DYNAMIC_TXPWR | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif - - #if (RTL8814B_SUPPORT == 1) - case ODM_RTL8814B: - support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ENV_MONITOR; - break; - #endif +#endif - #if (RTL8822B_SUPPORT == 1) +#if (RTL8822B_SUPPORT) case ODM_RTL8822B: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | + ODM_BB_DIG | + ODM_BB_RA_MASK | /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ENV_MONITOR | - ODM_BB_ADAPTIVE_SOML; - break; - #endif - - #if (RTL8821C_SUPPORT == 1) - case ODM_RTL8821C: - support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + /*ODM_BB_ADAPTIVE_SOML |*/ + ODM_BB_RATE_ADAPTIVE | + /*ODM_BB_PATH_DIV |*/ + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif + +#if (RTL8821C_SUPPORT) + case ODM_RTL8821C: + support_ability |= + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + ODM_BB_ENV_MONITOR; + break; +#endif + +/*@---------------JGR3 Series-------------------*/ + +#if (RTL8822C_SUPPORT) + case ODM_RTL8822C: + support_ability |= + ODM_BB_DIG | + ODM_BB_RA_MASK | + /* ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_PATH_DIV | + ODM_BB_CFO_TRACKING | + ODM_BB_ENV_MONITOR; + break; +#endif + +#if (RTL8814B_SUPPORT) + case ODM_RTL8814B: + support_ability |= + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + /*ODM_BB_CCK_PD |*/ + /*ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING; + /*ODM_BB_ENV_MONITOR;*/ + break; +#endif default: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | + ODM_BB_DIG | + ODM_BB_RA_MASK | /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; - pr_debug("[Warning] Supportability Init Warning !!!\n"); + pr_debug("[Warning] Supportability Init Warning !!!\n"); break; - } return support_ability; @@ -710,230 +804,262 @@ phydm_supportability_init_win( #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -u64 -phydm_supportability_init_ce( - void *dm_void -) +u64 phydm_supportability_init_ce(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u64 support_ability = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u64 support_ability = 0; switch (dm->support_ic_type) { - /*---------------N Series--------------------*/ - #if (RTL8188E_SUPPORT == 1) - case ODM_RTL8188E: +/*@---------------N Series--------------------*/ +#if (RTL8188E_SUPPORT) + case ODM_RTL8188E: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ENV_MONITOR | + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*@ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*@ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + ODM_BB_ENV_MONITOR | ODM_BB_PRIMARY_CCA; break; - #endif +#endif - #if (RTL8192E_SUPPORT == 1) - case ODM_RTL8192E: +#if (RTL8192E_SUPPORT) + case ODM_RTL8192E: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ENV_MONITOR | + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*@ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*@ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + ODM_BB_ENV_MONITOR | ODM_BB_PRIMARY_CCA; break; - #endif +#endif - #if (RTL8723B_SUPPORT == 1) - case ODM_RTL8723B: +#if (RTL8723B_SUPPORT) + case ODM_RTL8723B: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ENV_MONITOR | + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*@ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*@ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + ODM_BB_ENV_MONITOR | ODM_BB_PRIMARY_CCA; break; - #endif +#endif - #if (RTL8703B_SUPPORT == 1) - case ODM_RTL8703B: +#if (RTL8703B_SUPPORT) + case ODM_RTL8703B: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*@ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*@ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif - #if (RTL8723D_SUPPORT == 1) - case ODM_RTL8723D: +#if (RTL8723D_SUPPORT) + case ODM_RTL8723D: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /* ODM_BB_PWR_TRAIN | */ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*@ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + ODM_BB_PWR_TRAIN | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif - #if (RTL8710B_SUPPORT == 1) - case ODM_RTL8710B: +#if (RTL8710B_SUPPORT) + case ODM_RTL8710B: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*@ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*@ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif - #if (RTL8188F_SUPPORT == 1) - case ODM_RTL8188F: +#if (RTL8188F_SUPPORT) + case ODM_RTL8188F: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*@ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*@ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif - - /*---------------AC Series-------------------*/ +#endif - #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) - case ODM_RTL8812: - case ODM_RTL8821: +#if (RTL8192F_SUPPORT) + case ODM_RTL8192F: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + ODM_BB_PWR_TRAIN | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + /*@ODM_BB_ADAPTIVE_SOML |*/ + ODM_BB_ENV_MONITOR; + /*@ODM_BB_LNA_SAT_CHK |*/ + /*@ODM_BB_PRIMARY_CCA*/ + break; +#endif +/*@---------------AC Series-------------------*/ + +#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT) + case ODM_RTL8812: + case ODM_RTL8821: + support_ability |= + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*@ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*@ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif - #if (RTL8814A_SUPPORT == 1) +#if (RTL8814A_SUPPORT) case ODM_RTL8814A: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*@ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*@ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif - - #if (RTL8814B_SUPPORT == 1) - case ODM_RTL8814B: - support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ENV_MONITOR; - break; - #endif +#endif - #if (RTL8822B_SUPPORT == 1) +#if (RTL8822B_SUPPORT) case ODM_RTL8822B: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*@ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*@ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + /*ODM_BB_PATH_DIV |*/ + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif - #if (RTL8821C_SUPPORT == 1) +#if (RTL8821C_SUPPORT) case ODM_RTL8821C: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*@ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*@ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif + +/*@---------------JGR3 Series-------------------*/ + +#if (RTL8822C_SUPPORT) + case ODM_RTL8822C: + support_ability |= + ODM_BB_DIG | + ODM_BB_RA_MASK | + /* ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_PATH_DIV | + ODM_BB_CFO_TRACKING | + ODM_BB_ENV_MONITOR; + break; +#endif + +#if (RTL8814B_SUPPORT) + case ODM_RTL8814B: + support_ability |= + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*@ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR; + /*ODM_BB_CCK_PD |*/ + /*@ODM_BB_PWR_TRAIN |*/ + /*ODM_BB_RATE_ADAPTIVE |*/ + /*ODM_BB_CFO_TRACKING |*/ + /*ODM_BB_ENV_MONITOR;*/ + break; +#endif default: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*@ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*@ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; - pr_debug("[Warning] Supportability Init Warning !!!\n"); + pr_debug("[Warning] Supportability Init Warning !!!\n"); break; - } return support_ability; @@ -941,321 +1067,373 @@ phydm_supportability_init_ce( #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -u64 -phydm_supportability_init_ap( - void *dm_void -) +u64 phydm_supportability_init_ap( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u64 support_ability = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u64 support_ability = 0; switch (dm->support_ic_type) { - /*---------------N Series--------------------*/ - #if (RTL8188E_SUPPORT == 1) - case ODM_RTL8188E: +/*@---------------N Series--------------------*/ +#if (RTL8188E_SUPPORT) + case ODM_RTL8188E: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ENV_MONITOR | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + ODM_BB_ENV_MONITOR | ODM_BB_PRIMARY_CCA; break; - #endif +#endif - #if (RTL8192E_SUPPORT == 1) - case ODM_RTL8192E: +#if (RTL8192E_SUPPORT) + case ODM_RTL8192E: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ENV_MONITOR | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + ODM_BB_ENV_MONITOR | ODM_BB_PRIMARY_CCA; break; - #endif +#endif - #if (RTL8723B_SUPPORT == 1) - case ODM_RTL8723B: +#if (RTL8723B_SUPPORT) + case ODM_RTL8723B: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif - - #if ((RTL8198F_SUPPORT == 1) || (RTL8197F_SUPPORT == 1)) - case ODM_RTL8198F: - case ODM_RTL8197F: +#endif + +#if (RTL8198F_SUPPORT || RTL8197F_SUPPORT) + case ODM_RTL8198F: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + /*ODM_BB_DIG |*/ + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR; + /*ODM_BB_CCK_PD |*/ + /*ODM_BB_PWR_TRAIN |*/ + /*ODM_BB_RATE_ADAPTIVE |*/ + /*ODM_BB_CFO_TRACKING |*/ + /*ODM_BB_ADAPTIVE_SOML |*/ + /*ODM_BB_ENV_MONITOR |*/ + /*ODM_BB_LNA_SAT_CHK |*/ + /*ODM_BB_PRIMARY_CCA;*/ + break; + case ODM_RTL8197F: + support_ability |= + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ADAPTIVE_SOML | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + ODM_BB_ADAPTIVE_SOML | + ODM_BB_ENV_MONITOR | + ODM_BB_LNA_SAT_CHK | + ODM_BB_PRIMARY_CCA; + break; +#endif + +#if (RTL8192F_SUPPORT) + case ODM_RTL8192F: + support_ability |= + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + /*ODM_BB_CFO_TRACKING |*/ + ODM_BB_ADAPTIVE_SOML | ODM_BB_ENV_MONITOR | - ODM_BB_LNA_SAT_CHK | - ODM_BB_PRIMARY_CCA; + /*ODM_BB_LNA_SAT_CHK |*/ + /*ODM_BB_PRIMARY_CCA |*/ + 0; break; - #endif - - /*---------------AC Series-------------------*/ +#endif - #if (RTL8881A_SUPPORT == 1) - case ODM_RTL8881A: +/*@---------------AC Series-------------------*/ + +#if (RTL8881A_SUPPORT) + case ODM_RTL8881A: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif - #if (RTL8814A_SUPPORT == 1) +#if (RTL8814A_SUPPORT) case ODM_RTL8814A: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif - - #if (RTL8814B_SUPPORT == 1) - case ODM_RTL8814B: - support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ENV_MONITOR; - break; - #endif +#endif - #if (RTL8822B_SUPPORT == 1) +#if (RTL8822B_SUPPORT) case ODM_RTL8822B: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ /*ODM_BB_ADAPTIVE_SOML |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | - ODM_BB_ENV_MONITOR ; + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + ODM_BB_ENV_MONITOR; break; - #endif +#endif - #if (RTL8821C_SUPPORT == 1) +#if (RTL8821C_SUPPORT) case ODM_RTL8821C: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif + +/*@---------------JGR3 Series-------------------*/ + +#if (RTL8814B_SUPPORT) + case ODM_RTL8814B: + support_ability |= + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR; + /*ODM_BB_CCK_PD |*/ + /*ODM_BB_PWR_TRAIN |*/ + /*ODM_BB_RATE_ADAPTIVE |*/ + /*ODM_BB_CFO_TRACKING |*/ + /*ODM_BB_ENV_MONITOR;*/ + break; +#endif default: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_DIG | + ODM_BB_RA_MASK | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; - pr_debug("[Warning] Supportability Init Warning !!!\n"); + pr_debug("[Warning] Supportability Init Warning !!!\n"); break; - } - #if 0 - /*[Config Antenna Diveristy]*/ - if (*(dm->enable_antdiv)) +#if 0 + /*@[Config Antenna Diveristy]*/ + if (*dm->enable_antdiv) support_ability |= ODM_BB_ANT_DIV; - - /*[Config Adaptivity]*/ - if (*(dm->enable_adaptivity)) + + /*@[Config Adaptivity]*/ + if (*dm->enable_adaptivity) support_ability |= ODM_BB_ADAPTIVITY; - #endif +#endif return support_ability; } #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) -u64 -phydm_supportability_init_iot( - void *dm_void -) +u64 phydm_supportability_init_iot( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u64 support_ability = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u64 support_ability = 0; switch (dm->support_ic_type) { - #if (RTL8710B_SUPPORT == 1) - case ODM_RTL8710B: +#if (RTL8710B_SUPPORT) + case ODM_RTL8710B: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | + ODM_BB_DIG | + ODM_BB_RA_MASK | /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif +#endif - #if (RTL8195A_SUPPORT == 1) - case ODM_RTL8195A: +#if (RTL8195A_SUPPORT) + case ODM_RTL8195A: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | + ODM_BB_DIG | + ODM_BB_RA_MASK | /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; break; - #endif - +#endif + +#if (RTL8195B_SUPPORT) + case ODM_RTL8195B: + support_ability |= + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING; + /*ODM_BB_ENV_MONITOR*/ + break; +#endif + +#if (RTL8721D_SUPPORT) + case ODM_RTL8721D: + support_ability |= + ODM_BB_DIG | + ODM_BB_RA_MASK | + /*ODM_BB_DYNAMIC_TXPWR |*/ + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | + /*ODM_BB_PWR_TRAIN |*/ + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | + ODM_BB_ENV_MONITOR; + break; +#endif + default: support_ability |= - ODM_BB_DIG | - ODM_BB_RA_MASK | + ODM_BB_DIG | + ODM_BB_RA_MASK | /*ODM_BB_DYNAMIC_TXPWR |*/ - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | + ODM_BB_FA_CNT | + ODM_BB_RSSI_MONITOR | + ODM_BB_CCK_PD | /*ODM_BB_PWR_TRAIN |*/ - ODM_BB_RATE_ADAPTIVE | - ODM_BB_CFO_TRACKING | + ODM_BB_RATE_ADAPTIVE | + ODM_BB_CFO_TRACKING | ODM_BB_ENV_MONITOR; - pr_debug("[Warning] Supportability Init Warning !!!\n"); + pr_debug("[Warning] Supportability Init Warning !!!\n"); break; - } return support_ability; } #endif -void -phydm_fwoffload_ability_init( - struct dm_struct *dm, - enum phydm_offload_ability offload_ability -) +void phydm_fwoffload_ability_init(struct dm_struct *dm, + enum phydm_offload_ability offload_ability) { switch (offload_ability) { - case PHYDM_PHY_PARAM_OFFLOAD: - if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) + case PHYDM_PHY_PARAM_OFFLOAD: + if (dm->support_ic_type & + (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) dm->fw_offload_ability |= PHYDM_PHY_PARAM_OFFLOAD; break; - case PHYDM_RF_IQK_OFFLOAD: + case PHYDM_RF_IQK_OFFLOAD: dm->fw_offload_ability |= PHYDM_RF_IQK_OFFLOAD; break; default: PHYDM_DBG(dm, ODM_COMP_INIT, "fwofflad, wrong init type!!\n"); break; - } - PHYDM_DBG(dm, ODM_COMP_INIT, - "fw_offload_ability = %x\n", dm->fw_offload_ability); - + PHYDM_DBG(dm, ODM_COMP_INIT, "fw_offload_ability = %x\n", + dm->fw_offload_ability); } -void -phydm_fwoffload_ability_clear( - struct dm_struct *dm, - enum phydm_offload_ability offload_ability -) + +void phydm_fwoffload_ability_clear(struct dm_struct *dm, + enum phydm_offload_ability offload_ability) { switch (offload_ability) { - case PHYDM_PHY_PARAM_OFFLOAD: - if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) + case PHYDM_PHY_PARAM_OFFLOAD: + if (dm->support_ic_type & + (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) dm->fw_offload_ability &= (~PHYDM_PHY_PARAM_OFFLOAD); break; - case PHYDM_RF_IQK_OFFLOAD: + case PHYDM_RF_IQK_OFFLOAD: dm->fw_offload_ability &= (~PHYDM_RF_IQK_OFFLOAD); break; default: PHYDM_DBG(dm, ODM_COMP_INIT, "fwofflad, wrong init type!!\n"); break; - } - PHYDM_DBG(dm, ODM_COMP_INIT, - "fw_offload_ability = %x\n", dm->fw_offload_ability); - + PHYDM_DBG(dm, ODM_COMP_INIT, "fw_offload_ability = %x\n", + dm->fw_offload_ability); } -void -phydm_supportability_init( - void *dm_void -) +void phydm_supportability_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u64 support_ability; - - if (*dm->mp_mode == true) { - support_ability = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u64 support_ability; - /**/ + if (dm->manual_supportability && + *dm->manual_supportability != 0xffffffff) { + support_ability = *dm->manual_supportability; + } else if (*dm->mp_mode) { + support_ability = 0; } else { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) support_ability = phydm_supportability_init_win(dm); @@ -1267,61 +1445,59 @@ phydm_supportability_init( support_ability = phydm_supportability_init_iot(dm); #endif - /*[Config Antenna Diveristy]*/ + /*@[Config Antenna Diversity]*/ if (IS_FUNC_EN(dm->enable_antdiv)) support_ability |= ODM_BB_ANT_DIV; - /*[Config Adaptive SOML]*/ + /*@[Config TXpath Diversity]*/ + if (IS_FUNC_EN(dm->enable_pathdiv)) + support_ability |= ODM_BB_PATH_DIV; + + /*@[Config Adaptive SOML]*/ if (IS_FUNC_EN(dm->en_adap_soml)) support_ability |= ODM_BB_ADAPTIVE_SOML; - /*[Config Adaptivity]*/ + /* @[Config Adaptivity]*/ if (IS_FUNC_EN(dm->enable_adaptivity)) support_ability |= ODM_BB_ADAPTIVITY; } - odm_cmn_info_init(dm, ODM_CMNINFO_ABILITY, support_ability); - PHYDM_DBG(dm, ODM_COMP_INIT, "IC = ((0x%x)), Supportability Init = ((0x%llx))\n", dm->support_ic_type, dm->support_ability); + dm->support_ability = support_ability; + PHYDM_DBG(dm, ODM_COMP_INIT, "IC=0x%x, mp=%d, Supportability=0x%llx\n", + dm->support_ic_type, *dm->mp_mode, dm->support_ability); } -void -phydm_rfe_init( - void *dm_void -) +void phydm_rfe_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + PHYDM_DBG(dm, ODM_COMP_INIT, "RFE_Init\n"); #if (RTL8822B_SUPPORT == 1) - if (dm->support_ic_type == ODM_RTL8822B) { + if (dm->support_ic_type == ODM_RTL8822B) phydm_rfe_8822b_init(dm); - /**/ - } #endif } -void -phydm_dm_early_init( - struct dm_struct *dm -) +void phydm_dm_early_init(struct dm_struct *dm) { - #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - halrf_init(dm); - #endif +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + phydm_init_debug_setting(dm); +#endif } -void -odm_dm_init( - struct dm_struct *dm -) +void odm_dm_init(struct dm_struct *dm) { halrf_init(dm); phydm_supportability_init(dm); phydm_rfe_init(dm); phydm_common_info_self_init(dm); phydm_rx_phy_status_init(dm); +#ifdef PHYDM_AUTO_DEGBUG phydm_auto_dbg_engine_init(dm); +#endif phydm_dig_init(dm); +#ifdef PHYDM_SUPPORT_CCKPD phydm_cck_pd_init(dm); +#endif phydm_env_monitor_init(dm); phydm_adaptivity_init(dm); phydm_ra_info_init(dm); @@ -1333,184 +1509,190 @@ odm_dm_init( phydm_txcurrentcalibration(dm); phydm_get_pa_bias_offset(dm); #endif +#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY odm_antenna_diversity_init(dm); - phydm_adaptive_soml_init(dm); -#ifdef CONFIG_DYNAMIC_RX_PATH - phydm_dynamic_rx_path_init(dm); #endif - phydm_path_diversity_init(dm); - phydm_pow_train_init(dm); +#ifdef CONFIG_ADAPTIVE_SOML + phydm_adaptive_soml_init(dm); +#endif +#ifdef CONFIG_PATH_DIVERSITY + phydm_tx_path_diversity_init(dm); +#endif +#ifdef CONFIG_DYNAMIC_TX_TWR phydm_dynamic_tx_power_init(dm); +#endif #if (PHYDM_LA_MODE_SUPPORT == 1) - adc_smp_init(dm); + phydm_la_init(dm); #endif -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) +#ifdef PHYDM_BEAMFORMING_VERSION1 phydm_beamforming_init(dm); #endif + #if (RTL8188E_SUPPORT == 1) odm_ra_info_init_all(dm); #endif - +#ifdef PHYDM_PRIMARY_CCA phydm_primary_cca_init(dm); - - #ifdef CONFIG_PSD_TOOL +#endif +#ifdef CONFIG_PSD_TOOL phydm_psd_init(dm); - #endif - - #ifdef CONFIG_SMART_ANTENNA - phydm_smt_ant_init(dm); - #endif +#endif +#ifdef CONFIG_SMART_ANTENNA + phydm_smt_ant_init(dm); +#endif +#ifdef PHYDM_LNA_SAT_CHK_SUPPORT + phydm_lna_sat_check_init(dm); +#endif +#ifdef CONFIG_MCC_DM + phydm_mcc_init(dm); +#endif + +#ifdef CONFIG_MU_RSOML + phydm_mu_rsoml_init(dm); +#endif } -void -odm_dm_reset( - struct dm_struct *dm -) +void odm_dm_reset(struct dm_struct *dm) { struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY odm_ant_div_reset(dm); + #endif phydm_set_edcca_threshold_api(dm, dig_t->cur_ig_value); } -void -phydm_support_ability_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_supportability_en(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u64 pre_support_ability, one = 1; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 dm_value[10] = {0}; + u64 pre_support_ability, one = 1; + u64 comp = 0; u32 used = *_used; u32 out_len = *_out_len; + u8 i; + + for (i = 0; i < 5; i++) { + if (input[i + 1]) + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &dm_value[i]); + } pre_support_ability = dm->support_ability; + comp = dm->support_ability; + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\n================================\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, "\n%s\n", - "================================"); if (dm_value[0] == 100) { PDM_SNPF(out_len, used, output + used, out_len - used, - "[Supportability] PhyDM Selection\n"); + "[Supportability] PhyDM Selection\n"); PDM_SNPF(out_len, used, output + used, out_len - used, - "%s\n", "================================"); + "================================\n"); PDM_SNPF(out_len, used, output + used, out_len - used, - "00. (( %s ))DIG\n", - ((dm->support_ability & ODM_BB_DIG) ? ("V") : ("."))); + "00. (( %s ))DIG\n", + ((comp & ODM_BB_DIG) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "01. (( %s ))RA_MASK\n", - ((dm->support_ability & ODM_BB_RA_MASK) ? ("V") : ("."))); + "01. (( %s ))RA_MASK\n", + ((comp & ODM_BB_RA_MASK) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "02. (( %s ))DYN_TXPWR\n", - ((dm->support_ability & ODM_BB_DYNAMIC_TXPWR) ? ("V") : ("."))); + "02. (( %s ))DYN_TXPWR\n", + ((comp & ODM_BB_DYNAMIC_TXPWR) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "03. (( %s ))FA_CNT\n", - ((dm->support_ability & ODM_BB_FA_CNT) ? ("V") : ("."))); + "03. (( %s ))FA_CNT\n", + ((comp & ODM_BB_FA_CNT) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "04. (( %s ))RSSI_MNTR\n", - ((dm->support_ability & ODM_BB_RSSI_MONITOR) ? ("V") : ("."))); + "04. (( %s ))RSSI_MNTR\n", + ((comp & ODM_BB_RSSI_MONITOR) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "05. (( %s ))CCK_PD\n", - ((dm->support_ability & ODM_BB_CCK_PD) ? ("V") : ("."))); + "05. (( %s ))CCK_PD\n", + ((comp & ODM_BB_CCK_PD) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "06. (( %s ))ANT_DIV\n", - ((dm->support_ability & ODM_BB_ANT_DIV) ? ("V") : ("."))); + "06. (( %s ))ANT_DIV\n", + ((comp & ODM_BB_ANT_DIV) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "07. (( %s ))SMT_ANT\n", - ((dm->support_ability & ODM_BB_SMT_ANT) ? ("V") : ("."))); + "07. (( %s ))SMT_ANT\n", + ((comp & ODM_BB_SMT_ANT) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "08. (( %s ))PWR_TRAIN\n", - ((dm->support_ability & ODM_BB_PWR_TRAIN) ? ("V") : ("."))); + "08. (( %s ))PWR_TRAIN\n", + ((comp & ODM_BB_PWR_TRAIN) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "09. (( %s ))RA\n", - ((dm->support_ability & ODM_BB_RATE_ADAPTIVE) ? ("V") : ("."))); + "09. (( %s ))RA\n", + ((comp & ODM_BB_RATE_ADAPTIVE) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "10. (( %s ))PATH_DIV\n", - ((dm->support_ability & ODM_BB_PATH_DIV) ? ("V") : ("."))); + "10. (( %s ))PATH_DIV\n", + ((comp & ODM_BB_PATH_DIV) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "11. (( %s ))DFS\n", - ((dm->support_ability & ODM_BB_DFS) ? ("V") : ("."))); + "11. (( %s ))DFS\n", + ((comp & ODM_BB_DFS) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "12. (( %s ))DYN_ARFR\n", - ((dm->support_ability & ODM_BB_DYNAMIC_ARFR) ? ("V") : ("."))); + "12. (( %s ))DYN_ARFR\n", + ((comp & ODM_BB_DYNAMIC_ARFR) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "13. (( %s ))ADAPTIVITY\n", - ((dm->support_ability & ODM_BB_ADAPTIVITY) ? ("V") : ("."))); + "13. (( %s ))ADAPTIVITY\n", + ((comp & ODM_BB_ADAPTIVITY) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "14. (( %s ))CFO_TRACK\n", - ((dm->support_ability & ODM_BB_CFO_TRACKING) ? ("V") : ("."))); + "14. (( %s ))CFO_TRACK\n", + ((comp & ODM_BB_CFO_TRACKING) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "15. (( %s ))ENV_MONITOR\n", - ((dm->support_ability & ODM_BB_ENV_MONITOR) ? ("V") : ("."))); + "15. (( %s ))ENV_MONITOR\n", + ((comp & ODM_BB_ENV_MONITOR) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "16. (( %s ))PRI_CCA\n", - ((dm->support_ability & ODM_BB_PRIMARY_CCA) ? ("V") : ("."))); + "16. (( %s ))PRI_CCA\n", + ((comp & ODM_BB_PRIMARY_CCA) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "17. (( %s ))ADPTV_SOML\n", - ((dm->support_ability & ODM_BB_ADAPTIVE_SOML) ? ("V") : ("."))); + "17. (( %s ))ADPTV_SOML\n", + ((comp & ODM_BB_ADAPTIVE_SOML) ? ("V") : ("."))); PDM_SNPF(out_len, used, output + used, out_len - used, - "18. (( %s ))NA_SAT_CHK\n", - ((dm->support_ability & ODM_BB_LNA_SAT_CHK) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, - "19. (( %s ))DYN_RX_PATH\n", - ((dm->support_ability & ODM_BB_DYNAMIC_RX_PATH) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, - "%s\n", "================================"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "[Supportability] PhyDM offload ability\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "%s\n", "================================"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "00. (( %s ))PHY PARAM OFFLOAD\n", - ((dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, - "01. (( %s ))RF IQK OFFLOAD\n", - ((dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, - "%s\n", "================================"); + "18. (( %s ))LNA_SAT_CHK\n", + ((comp & ODM_BB_LNA_SAT_CHK) ? ("V") : ("."))); - } - /* - else if(dm_value[0] == 101) - { - dm->support_ability = 0 ; - dbg_print("Disable all support_ability components\n"); - PDM_SNPF((output+used, out_len-used,"%s\n", "Disable all support_ability components")); - } - */ - else { - if (dm_value[1] == 1) { /* enable */ + PDM_SNPF(out_len, used, output + used, out_len - used, + "================================\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Supportability] PhyDM offload ability\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "================================\n"); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "00. (( %s ))PHY PARAM OFFLOAD\n", + ((dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) ? + ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "01. (( %s ))RF IQK OFFLOAD\n", + ((dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? + ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "================================\n"); + + } else if (dm_value[0] == 101) { + dm->support_ability = 0; + PDM_SNPF(out_len, used, output + used, out_len - used, + "Disable all support_ability components\n"); + } else { + if (dm_value[1] == 1) { /* @enable */ dm->support_ability |= (one << dm_value[0]); - if (BIT(dm_value[0]) & ODM_BB_PATH_DIV) - phydm_path_diversity_init(dm); - } else if (dm_value[1] == 2) /* disable */ + } else if (dm_value[1] == 2) {/* @disable */ dm->support_ability &= ~(one << dm_value[0]); - else - PDM_SNPF(out_len, used, output + used, - out_len - used, "%s\n", - "[Warning!!!] 1:enable, 2:disable"); + } else { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Warning!!!] 1:enable, 2:disable\n"); + } } PDM_SNPF(out_len, used, output + used, out_len - used, - "pre-support_ability = 0x%llx\n", - pre_support_ability); + "pre-supportability = 0x%llx\n", pre_support_ability); PDM_SNPF(out_len, used, output + used, out_len - used, - "Curr-support_ability = 0x%llx\n", - dm->support_ability); - PDM_SNPF(out_len, used, output + used, out_len - used, "%s\n", - "================================"); + "Cur-supportability = 0x%llx\n", dm->support_ability); + PDM_SNPF(out_len, used, output + used, out_len - used, + "================================\n"); *_used = used; *_out_len = out_len; } -void -phydm_watchdog_lps_32k( - struct dm_struct *dm -) +void phydm_watchdog_lps_32k(struct dm_struct *dm) { PHYDM_DBG(dm, DBG_COMMON_FLOW, "%s ======>\n", __func__); @@ -1520,46 +1702,38 @@ phydm_watchdog_lps_32k( phydm_common_info_self_reset(dm); } -void -phydm_watchdog_lps( - struct dm_struct *dm -) +void phydm_watchdog_lps(struct dm_struct *dm) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT)) PHYDM_DBG(dm, DBG_COMMON_FLOW, "%s ======>\n", __func__); phydm_common_info_self_update(dm); phydm_rssi_monitor_check(dm); phydm_basic_dbg_message(dm); phydm_receiver_blocking(dm); - odm_false_alarm_counter_statistics(dm); + phydm_false_alarm_counter_statistics(dm); phydm_dig_by_rssi_lps(dm); + #ifdef PHYDM_SUPPORT_CCKPD phydm_cck_pd_th(dm); + #endif phydm_adaptivity(dm); #if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) - odm_antenna_diversity(dm); /*enable AntDiv in PS mode, request from SD4 Jeff*/ + #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + /*@enable AntDiv in PS mode, request from SD4 Jeff*/ + odm_antenna_diversity(dm); + #endif #endif phydm_common_info_self_reset(dm); #endif } -void -phydm_watchdog_mp( - struct dm_struct *dm -) +void phydm_watchdog_mp(struct dm_struct *dm) { -#ifdef CONFIG_DYNAMIC_RX_PATH - phydm_dynamic_rx_path_caller(dm); -#endif } -void -phydm_pause_dm_watchdog( - void *dm_void, - enum phydm_pause_type pause_type -) +void phydm_pause_dm_watchdog(void *dm_void, enum phydm_pause_type pause_type) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (pause_type == PHYDM_PAUSE) { dm->disable_phydm_watchdog = 1; @@ -1570,30 +1744,30 @@ phydm_pause_dm_watchdog( } } -u8 -phydm_pause_func( - void *dm_void, - enum phydm_func_idx pause_func, - enum phydm_pause_type pause_type, - enum phydm_pause_level pause_lv, - u8 val_lehgth, - u32 *val_buf -) +u8 phydm_pause_func(void *dm_void, enum phydm_func_idx pause_func, + enum phydm_pause_type pause_type, + enum phydm_pause_level pause_lv, u8 val_lehgth, + u32 *val_buf) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - s8 *pause_lv_pre = &dm->s8_dummy; - u32 *bkp_val = &dm->u32_dummy; - u32 ori_val[5] = {0}; - u64 pause_func_bitmap = (u64)BIT(pause_func); - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_func_poiner *func_t = &dm->phydm_func_handler; + s8 *pause_lv_pre = &dm->s8_dummy; + u32 *bkp_val = &dm->u32_dummy; + u32 ori_val[5] = {0}; + u64 pause_func_bitmap = (u64)BIT(pause_func); + u8 i = 0; + u8 en_2rcca = 0; + u8 en_bw40m = 0; + u8 pause_result = PAUSE_FAIL; - - - PHYDM_DBG(dm, ODM_COMP_API, "[%s][%s] LV=%d, Len=%d\n", __func__, - ((pause_type == PHYDM_PAUSE) ? "Pause" : "Resume"), pause_lv, val_lehgth); + PHYDM_DBG(dm, ODM_COMP_API, "\n"); + PHYDM_DBG(dm, ODM_COMP_API, "[%s][%s] LV=%d, Len=%d\n", __func__, + ((pause_type == PHYDM_PAUSE) ? "Pause" : + ((pause_type == PHYDM_RESUME) ? "Resume" : "Pause no_set")), + pause_lv, val_lehgth); if (pause_lv >= PHYDM_PAUSE_MAX_NUM) { - PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] Wrong LV=%d\n", pause_lv); + PHYDM_DBG(dm, ODM_COMP_API, "[WARNING]Wrong LV=%d\n", pause_lv); return PAUSE_FAIL; } @@ -1601,252 +1775,274 @@ phydm_pause_func( PHYDM_DBG(dm, ODM_COMP_API, "[DIG]\n"); if (val_lehgth != 1) { - PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] val_length != 1\n"); + PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 1\n"); return PAUSE_FAIL; } - - ori_val[0] = (u32)(dm->dm_dig_table.cur_ig_value); /*0xc50*/ + + ori_val[0] = (u32)(dm->dm_dig_table.cur_ig_value); pause_lv_pre = &dm->pause_lv_table.lv_dig; - bkp_val = (u32*)(&dm->dm_dig_table.rvrt_val); - dm->phydm_func_handler.pause_phydm_handler = phydm_set_dig_val; /*function pointer hook*/ - - } else - + bkp_val = (u32 *)(&dm->dm_dig_table.rvrt_val); + /*@function pointer hook*/ + func_t->pause_phydm_handler = phydm_set_dig_val; + #ifdef PHYDM_SUPPORT_CCKPD - if (pause_func == F05_CCK_PD) { - + } else if (pause_func == F05_CCK_PD) { PHYDM_DBG(dm, ODM_COMP_API, "[CCK_PD]\n"); - if (val_lehgth != 2) { - PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] val_length != 2\n"); + if (val_lehgth != 1) { + PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 1\n"); return PAUSE_FAIL; } - - ori_val[0] = dm->dm_cckpd_table.cur_cck_cca_thres; /*0xa0a*/ - ori_val[1] = dm->dm_cckpd_table.cck_cca_th_aaa; /*0xaaa*/ + + ori_val[0] = (u32)dm->dm_cckpd_table.cck_pd_lv; pause_lv_pre = &dm->pause_lv_table.lv_cckpd; - bkp_val = &dm->dm_cckpd_table.rvrt_val[0]; - dm->phydm_func_handler.pause_phydm_handler = phydm_set_cckpd_val; /*function pointer hook*/ - - } else + bkp_val = (u32 *)(&dm->dm_cckpd_table.rvrt_val); + /*@function pointer hook*/ + func_t->pause_phydm_handler = phydm_set_cckpd_val; #endif #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY - if (pause_func == F06_ANT_DIV) { + } else if (pause_func == F06_ANT_DIV) { PHYDM_DBG(dm, ODM_COMP_API, "[AntDiv]\n"); if (val_lehgth != 1) { - PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] val_length != 1\n"); + PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 1\n"); return PAUSE_FAIL; } - - ori_val[0] = (u32)(dm->dm_fat_table.rx_idle_ant); /*default antenna*/ + /*@default antenna*/ + ori_val[0] = (u32)(dm->dm_fat_table.rx_idle_ant); pause_lv_pre = &dm->pause_lv_table.lv_antdiv; - bkp_val = (u32*)(&dm->dm_fat_table.rvrt_val); - dm->phydm_func_handler.pause_phydm_handler = phydm_set_antdiv_val; /*function pointer hook*/ - - } else -#endif + bkp_val = (u32 *)(&dm->dm_fat_table.rvrt_val); + /*@function pointer hook*/ + func_t->pause_phydm_handler = phydm_set_antdiv_val; - if (pause_func == F13_ADPTVTY) { +#endif +#ifdef PHYDM_SUPPORT_ADAPTIVITY + } else if (pause_func == F13_ADPTVTY) { PHYDM_DBG(dm, ODM_COMP_API, "[Adaptivity]\n"); if (val_lehgth != 2) { - PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] val_length != 2\n"); + PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 2\n"); return PAUSE_FAIL; } - ori_val[0] = (u32)(dm->adaptivity.th_l2h); /*th_l2h*/ - ori_val[1] = (u32)(dm->adaptivity.th_h2l); /*th_h2l*/ + ori_val[0] = (u32)(dm->adaptivity.th_l2h); /*th_l2h*/ + ori_val[1] = (u32)(dm->adaptivity.th_h2l); /*th_h2l*/ pause_lv_pre = &dm->pause_lv_table.lv_adapt; bkp_val = (u32 *)(&dm->adaptivity.rvrt_val); - dm->phydm_func_handler.pause_phydm_handler = phydm_set_edcca_val; /*function pointer hook*/ + /*@function pointer hook*/ + func_t->pause_phydm_handler = phydm_set_edcca_val; - } else +#endif +#ifdef CONFIG_ADAPTIVE_SOML + } else if (pause_func == F17_ADPTV_SOML) { + PHYDM_DBG(dm, ODM_COMP_API, "[AD-SOML]\n"); - { + if (val_lehgth != 1) { + PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 1\n"); + return PAUSE_FAIL; + } + /*SOML_ON/OFF*/ + ori_val[0] = (u32)(dm->dm_soml_table.soml_on_off); + + pause_lv_pre = &dm->pause_lv_table.lv_adsl; + bkp_val = (u32 *)(&dm->dm_soml_table.rvrt_val); + /*@function pointer hook*/ + func_t->pause_phydm_handler = phydm_set_adsl_val; + +#endif + } else { PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] error func idx\n"); return PAUSE_FAIL; } - PHYDM_DBG(dm, ODM_COMP_API, "Pause_LV{new , pre} = {%d ,%d}\n", pause_lv, *pause_lv_pre); + PHYDM_DBG(dm, ODM_COMP_API, "Pause_LV{new , pre} = {%d ,%d}\n", + pause_lv, *pause_lv_pre); - if ((pause_type == PHYDM_PAUSE) || (pause_type == PHYDM_PAUSE_NO_SET)) { + if (pause_type == PHYDM_PAUSE || pause_type == PHYDM_PAUSE_NO_SET) { if (pause_lv <= *pause_lv_pre) { - PHYDM_DBG(dm, ODM_COMP_API, "[PAUSE FAIL] Pre_LV >= Curr_LV\n"); + PHYDM_DBG(dm, ODM_COMP_API, + "[PAUSE FAIL] Pre_LV >= Curr_LV\n"); return PAUSE_FAIL; } if (!(dm->pause_ability & pause_func_bitmap)) { - for (i = 0; i < val_lehgth; i ++) + for (i = 0; i < val_lehgth; i++) bkp_val[i] = ori_val[i]; } dm->pause_ability |= pause_func_bitmap; - PHYDM_DBG(dm, ODM_COMP_API, "pause_ability=0x%llx\n", dm->pause_ability); + PHYDM_DBG(dm, ODM_COMP_API, "pause_ability=0x%llx\n", + dm->pause_ability); if (pause_type == PHYDM_PAUSE) { - for (i = 0; i < val_lehgth; i ++) { - PHYDM_DBG(dm, ODM_COMP_API, "[PAUSE SUCCESS] val_idx[%d]{New, Ori}={0x%x, 0x%x}\n",i, val_buf[i], bkp_val[i]); - /**/ - } - dm->phydm_func_handler.pause_phydm_handler(dm, val_buf, val_lehgth); + for (i = 0; i < val_lehgth; i++) + PHYDM_DBG(dm, ODM_COMP_API, + "[PAUSE SUCCESS] val_idx[%d]{New, Ori}={0x%x, 0x%x}\n", + i, val_buf[i], bkp_val[i]); + func_t->pause_phydm_handler(dm, val_buf, val_lehgth); } else { - for (i = 0; i < val_lehgth; i ++) { - PHYDM_DBG(dm, ODM_COMP_API, "[PAUSE NO Set: SUCCESS] val_idx[%d]{Ori}={0x%x}\n",i, bkp_val[i]); - /**/ - } + for (i = 0; i < val_lehgth; i++) + PHYDM_DBG(dm, ODM_COMP_API, + "[PAUSE NO Set: SUCCESS] val_idx[%d]{Ori}={0x%x}\n", + i, bkp_val[i]); } *pause_lv_pre = pause_lv; - return PAUSE_SUCCESS; + pause_result = PAUSE_SUCCESS; } else if (pause_type == PHYDM_RESUME) { - dm->pause_ability &= ~pause_func_bitmap; - PHYDM_DBG(dm, ODM_COMP_API, "pause_ability=0x%llx\n", dm->pause_ability); - - *pause_lv_pre = PHYDM_PAUSE_RELEASE; - - for (i = 0; i < val_lehgth; i ++) { - PHYDM_DBG(dm, ODM_COMP_API, "[RESUME] val_idx[%d]={0x%x}\n", i, bkp_val[i]); + if ((dm->pause_ability & pause_func_bitmap) == 0) { + PHYDM_DBG(dm, ODM_COMP_API, + "[RESUME] No Need to Revert\n"); + return PAUSE_SUCCESS; } - - dm->phydm_func_handler.pause_phydm_handler(dm, bkp_val, val_lehgth); - - return PAUSE_SUCCESS; + + dm->pause_ability &= ~pause_func_bitmap; + PHYDM_DBG(dm, ODM_COMP_API, "pause_ability=0x%llx\n", + dm->pause_ability); + + *pause_lv_pre = PHYDM_PAUSE_RELEASE; + + for (i = 0; i < val_lehgth; i++) { + PHYDM_DBG(dm, ODM_COMP_API, + "[RESUME] val_idx[%d]={0x%x}\n", i, + bkp_val[i]); + } + + func_t->pause_phydm_handler(dm, bkp_val, val_lehgth); + + pause_result = PAUSE_SUCCESS; } else { PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] error pause_type\n"); - return PAUSE_FAIL; + pause_result = PAUSE_FAIL; } - + return pause_result; } -void -phydm_pause_func_console( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +void phydm_pause_func_console(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - char help[] = "-h"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; - u32 i; - u8 val_length = 0; - u32 val_buf[5] = {0}; - u8 set_result = 0; - enum phydm_func_idx func = (enum phydm_func_idx)0; - enum phydm_pause_type pause_type = (enum phydm_pause_type)0; - enum phydm_pause_level pause_lv = (enum phydm_pause_level)0; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + u32 i; + u8 length = 0; + u32 buf[5] = {0}; + u8 set_result = 0; + enum phydm_func_idx func = 0; + enum phydm_pause_type type = 0; + enum phydm_pause_level lv = 0; + if ((strcmp(input[1], help) == 0)) { - PDM_SNPF(out_len, used, output + used, out_len - used, "{Func} {1:pause, 2:Resume} {lv} Val[5:0]\n"); - - } else { - for (i = 0; i < 10; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); - } - } + PDM_SNPF(out_len, used, output + used, out_len - used, + "{Func} {1:pause,2:pause no set 3:Resume} {lv:0~3} Val[5:0]\n"); - func = (enum phydm_func_idx)var1[0]; - pause_type = (enum phydm_pause_type)var1[1]; - pause_lv = (enum phydm_pause_level)var1[2]; - - - for (i = 0; i < 5; i++) { - val_buf[i] = var1[3 + i]; - } - - if (func == F00_DIG) { - PDM_SNPF(out_len, used, output + used, out_len - used, "[DIG]\n"); - val_length = 1; - - } else if (func == F05_CCK_PD) { - PDM_SNPF(out_len, used, output + used, out_len - used, "[CCK_PD]\n"); - val_length = 2; - } else if (func == F06_ANT_DIV) { - PDM_SNPF(out_len, used, output + used, out_len - used, "[Ant_Div]\n"); - val_length = 1; - } else if (func == F13_ADPTVTY) { - PDM_SNPF(out_len, used, output + used, out_len - used, "[Adaptivity]\n"); - val_length = 2; - } else { - PDM_SNPF(out_len, used, output + used, out_len - used, "[Set Function Error]\n"); - val_length = 0; - } - - if (val_length != 0) { - - PDM_SNPF(out_len, used, output + used, out_len - used, "{%s, lv=%d} val = %d, %d}\n", - ((pause_type == PHYDM_PAUSE) ? "Pause" : "Resume"), - pause_lv, var1[3], var1[4]); - - set_result= phydm_pause_func(dm, func, pause_type, pause_lv, val_length, val_buf); - } - - PDM_SNPF(out_len, used, output + used, out_len - used, "set_result = %d\n", - set_result); + goto out; } + for (i = 0; i < 10; i++) { + if (input[i + 1]) + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); + } + func = (enum phydm_func_idx)var1[0]; + type = (enum phydm_pause_type)var1[1]; + lv = (enum phydm_pause_level)var1[2]; + + for (i = 0; i < 5; i++) + buf[i] = var1[3 + i]; + + if (func == F00_DIG) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[DIG]\n"); + length = 1; + + } else if (func == F05_CCK_PD) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[CCK_PD]\n"); + length = 1; + } else if (func == F06_ANT_DIV) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Ant_Div]\n"); + length = 1; + } else if (func == F13_ADPTVTY) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Adaptivity]\n"); + length = 2; + } else if (func == F17_ADPTV_SOML) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[ADSL]\n"); + length = 1; + } else { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Set Function Error]\n"); + length = 0; + } + + if (length != 0) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "{%s, lv=%d} val = %d, %d}\n", + ((type == PHYDM_PAUSE) ? "Pause" : + ((type == PHYDM_RESUME) ? "Resume" : "Pause no_set")), + lv, var1[3], var1[4]); + + set_result = phydm_pause_func(dm, func, type, lv, length, buf); + } + + PDM_SNPF(out_len, used, output + used, out_len - used, + "set_result = %d\n", set_result); + +out: *_used = used; *_out_len = out_len; } -u8 -phydm_stop_dm_watchdog_check( - void *dm_void -) +u8 phydm_stop_dm_watchdog_check(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (dm->disable_phydm_watchdog == 1) { PHYDM_DBG(dm, DBG_COMMON_FLOW, "Disable phydm\n"); return true; - } else + } else { return false; - + } } -/* - * 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. - * You can not add any dummy function here, be care, you can only use DM structure - * to perform any new ODM_DM. - * */ -void -phydm_watchdog( - struct dm_struct *dm -) +void phydm_watchdog(struct dm_struct *dm) { PHYDM_DBG(dm, DBG_COMMON_FLOW, "%s ======>\n", __func__); phydm_common_info_self_update(dm); + phydm_phy_info_update(dm); phydm_rssi_monitor_check(dm); phydm_basic_dbg_message(dm); + phydm_dm_summary(dm, FIRST_MACID); +#ifdef PHYDM_AUTO_DEGBUG phydm_auto_dbg_engine(dm); +#endif phydm_receiver_blocking(dm); - + if (phydm_stop_dm_watchdog_check(dm) == true) return; phydm_hw_setting(dm); - + #ifdef PHYDM_TDMA_DIG_SUPPORT if (dm->original_dig_restore == 0) phydm_tdma_dig_timer_check(dm); - else + else #endif { - odm_false_alarm_counter_statistics(dm); + phydm_false_alarm_counter_statistics(dm); phydm_noisy_detection(dm); phydm_dig(dm); + #ifdef PHYDM_SUPPORT_CCKPD phydm_cck_pd_th(dm); + #endif } #ifdef PHYDM_POWER_TRAINING_SUPPORT @@ -1854,23 +2050,28 @@ phydm_watchdog( #endif phydm_adaptivity(dm); phydm_ra_info_watchdog(dm); - odm_path_diversity(dm); +#ifdef CONFIG_PATH_DIVERSITY + phydm_tx_path_diversity(dm); +#endif phydm_cfo_tracking(dm); - /* odm_dynamic_tx_power(dm); */ +#ifdef CONFIG_DYNAMIC_TX_TWR phydm_dynamic_tx_power(dm); +#endif +#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY odm_antenna_diversity(dm); +#endif +#ifdef CONFIG_ADAPTIVE_SOML phydm_adaptive_soml(dm); -#ifdef CONFIG_DYNAMIC_RX_PATH - phydm_dynamic_rx_path(dm); #endif -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) +#ifdef PHYDM_BEAMFORMING_VERSION1 phydm_beamforming_watchdog(dm); #endif halrf_watchdog(dm); +#ifdef PHYDM_PRIMARY_CCA phydm_primary_cca(dm); - +#endif #if (DM_ODM_SUPPORT_TYPE == ODM_CE) odm_dtc(dm); #endif @@ -1880,428 +2081,417 @@ phydm_watchdog( #ifdef PHYDM_LNA_SAT_CHK_SUPPORT phydm_lna_sat_chk_watchdog(dm); #endif +#ifdef CONFIG_MCC_DM + phydm_mcc_switch(dm); +#endif + +#ifdef CONFIG_MU_RSOML + phydm_mu_rsoml_decision(dm); +#endif phydm_common_info_self_reset(dm); - } - -/* +/*@ * Init /.. Fixed HW value. Only init time. - * */ -void -odm_cmn_info_init( - struct dm_struct *dm, - enum odm_cmninfo cmn_info, - u64 value -) + */ +void odm_cmn_info_init(struct dm_struct *dm, enum odm_cmninfo cmn_info, + u64 value) { - /* */ /* This section is used for init value */ - /* */ - switch (cmn_info) { - /* */ - /* Fixed ODM value. */ - /* */ - case ODM_CMNINFO_ABILITY: + switch (cmn_info) { + /* @Fixed ODM value. */ + case ODM_CMNINFO_ABILITY: dm->support_ability = (u64)value; break; - case ODM_CMNINFO_RF_TYPE: + case ODM_CMNINFO_RF_TYPE: dm->rf_type = (u8)value; break; - case ODM_CMNINFO_PLATFORM: + case ODM_CMNINFO_PLATFORM: dm->support_platform = (u8)value; break; - case ODM_CMNINFO_INTERFACE: + case ODM_CMNINFO_INTERFACE: dm->support_interface = (u8)value; break; - case ODM_CMNINFO_MP_TEST_CHIP: + case ODM_CMNINFO_MP_TEST_CHIP: dm->is_mp_chip = (u8)value; break; - case ODM_CMNINFO_IC_TYPE: + case ODM_CMNINFO_IC_TYPE: dm->support_ic_type = (u32)value; break; - case ODM_CMNINFO_CUT_VER: + case ODM_CMNINFO_CUT_VER: dm->cut_version = (u8)value; break; - case ODM_CMNINFO_FAB_VER: + case ODM_CMNINFO_FAB_VER: dm->fab_version = (u8)value; break; - - case ODM_CMNINFO_RFE_TYPE: - #if (RTL8821C_SUPPORT == 1) + case ODM_CMNINFO_FW_VER: + dm->fw_version = (u8)value; + break; + case ODM_CMNINFO_FW_SUB_VER: + dm->fw_sub_version = (u8)value; + break; + case ODM_CMNINFO_RFE_TYPE: +#if (RTL8821C_SUPPORT) if (dm->support_ic_type & ODM_RTL8821C) - dm->rfe_type_expand = (u8)value; /**/ + dm->rfe_type_expand = (u8)value; else - #endif +#endif dm->rfe_type = (u8)value; phydm_init_hw_info_by_rfe(dm); break; - case ODM_CMNINFO_RF_ANTENNA_TYPE: + case ODM_CMNINFO_RF_ANTENNA_TYPE: dm->ant_div_type = (u8)value; break; - case ODM_CMNINFO_WITH_EXT_ANTENNA_SWITCH: + case ODM_CMNINFO_WITH_EXT_ANTENNA_SWITCH: dm->with_extenal_ant_switch = (u8)value; break; - case ODM_CMNINFO_BE_FIX_TX_ANT: +#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + case ODM_CMNINFO_BE_FIX_TX_ANT: dm->dm_fat_table.b_fix_tx_ant = (u8)value; break; +#endif - case ODM_CMNINFO_BOARD_TYPE: + case ODM_CMNINFO_BOARD_TYPE: if (!dm->is_init_hw_info_by_rfe) dm->board_type = (u8)value; break; - case ODM_CMNINFO_PACKAGE_TYPE: + case ODM_CMNINFO_PACKAGE_TYPE: if (!dm->is_init_hw_info_by_rfe) dm->package_type = (u8)value; break; - case ODM_CMNINFO_EXT_LNA: + case ODM_CMNINFO_EXT_LNA: if (!dm->is_init_hw_info_by_rfe) dm->ext_lna = (u8)value; break; - case ODM_CMNINFO_5G_EXT_LNA: + case ODM_CMNINFO_5G_EXT_LNA: if (!dm->is_init_hw_info_by_rfe) dm->ext_lna_5g = (u8)value; break; - case ODM_CMNINFO_EXT_PA: + case ODM_CMNINFO_EXT_PA: if (!dm->is_init_hw_info_by_rfe) dm->ext_pa = (u8)value; break; - case ODM_CMNINFO_5G_EXT_PA: + case ODM_CMNINFO_5G_EXT_PA: if (!dm->is_init_hw_info_by_rfe) dm->ext_pa_5g = (u8)value; break; - case ODM_CMNINFO_GPA: + case ODM_CMNINFO_GPA: if (!dm->is_init_hw_info_by_rfe) dm->type_gpa = (u16)value; break; - case ODM_CMNINFO_APA: + case ODM_CMNINFO_APA: if (!dm->is_init_hw_info_by_rfe) dm->type_apa = (u16)value; break; - case ODM_CMNINFO_GLNA: + case ODM_CMNINFO_GLNA: if (!dm->is_init_hw_info_by_rfe) dm->type_glna = (u16)value; break; - case ODM_CMNINFO_ALNA: + case ODM_CMNINFO_ALNA: if (!dm->is_init_hw_info_by_rfe) dm->type_alna = (u16)value; break; - case ODM_CMNINFO_EXT_TRSW: + case ODM_CMNINFO_EXT_TRSW: if (!dm->is_init_hw_info_by_rfe) dm->ext_trsw = (u8)value; break; - case ODM_CMNINFO_EXT_LNA_GAIN: + case ODM_CMNINFO_EXT_LNA_GAIN: dm->ext_lna_gain = (u8)value; break; - case ODM_CMNINFO_PATCH_ID: + case ODM_CMNINFO_PATCH_ID: dm->iot_table.win_patch_id = (u8)value; break; - case ODM_CMNINFO_BINHCT_TEST: + case ODM_CMNINFO_BINHCT_TEST: dm->is_in_hct_test = (boolean)value; break; - case ODM_CMNINFO_BWIFI_TEST: + case ODM_CMNINFO_BWIFI_TEST: dm->wifi_test = (u8)value; break; - case ODM_CMNINFO_SMART_CONCURRENT: + case ODM_CMNINFO_SMART_CONCURRENT: dm->is_dual_mac_smart_concurrent = (boolean)value; break; - case ODM_CMNINFO_DOMAIN_CODE_2G: - dm->odm_regulation_2_4g = (u8)value; - break; - case ODM_CMNINFO_DOMAIN_CODE_5G: - dm->odm_regulation_5g = (u8)value; - break; -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - case ODM_CMNINFO_CONFIG_BB_RF: +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) + case ODM_CMNINFO_CONFIG_BB_RF: dm->config_bbrf = (boolean)value; break; #endif - case ODM_CMNINFO_IQKPAOFF: + case ODM_CMNINFO_IQKPAOFF: dm->rf_calibrate_info.is_iqk_pa_off = (boolean)value; break; - case ODM_CMNINFO_REGRFKFREEENABLE: + case ODM_CMNINFO_REGRFKFREEENABLE: dm->rf_calibrate_info.reg_rf_kfree_enable = (u8)value; break; - case ODM_CMNINFO_RFKFREEENABLE: + case ODM_CMNINFO_RFKFREEENABLE: dm->rf_calibrate_info.rf_kfree_enable = (u8)value; break; - case ODM_CMNINFO_NORMAL_RX_PATH_CHANGE: + case ODM_CMNINFO_NORMAL_RX_PATH_CHANGE: dm->normal_rx_path = (u8)value; break; - case ODM_CMNINFO_EFUSE0X3D8: + case ODM_CMNINFO_VALID_PATH_SET: + dm->valid_path_set = (u8)value; + break; + case ODM_CMNINFO_EFUSE0X3D8: dm->efuse0x3d8 = (u8)value; break; - case ODM_CMNINFO_EFUSE0X3D7: + case ODM_CMNINFO_EFUSE0X3D7: dm->efuse0x3d7 = (u8)value; break; - case ODM_CMNINFO_ADVANCE_OTA: + case ODM_CMNINFO_ADVANCE_OTA: dm->p_advance_ota = (u8)value; break; - + #ifdef CONFIG_PHYDM_DFS_MASTER - case ODM_CMNINFO_DFS_REGION_DOMAIN: + case ODM_CMNINFO_DFS_REGION_DOMAIN: dm->dfs_region_domain = (u8)value; break; #endif - case ODM_CMNINFO_SOFT_AP_SPECIAL_SETTING: + case ODM_CMNINFO_SOFT_AP_SPECIAL_SETTING: dm->soft_ap_special_setting = (u32)value; break; - case ODM_CMNINFO_DPK_EN: - /*dm->dpk_en = (u1Byte)value;*/ + case ODM_CMNINFO_X_CAP_SETTING: + dm->dm_cfo_track.crystal_cap_default = (u8)value; + break; + + case ODM_CMNINFO_DPK_EN: + /*@dm->dpk_en = (u1Byte)value;*/ halrf_cmn_info_set(dm, HALRF_CMNINFO_DPK_EN, (u64)value); break; - case ODM_CMNINFO_HP_HWID: + case ODM_CMNINFO_HP_HWID: dm->hp_hw_id = (boolean)value; break; - /* To remove the compiler warning, must add an empty default statement to handle the other values. */ - default: - /* do nothing */ + case ODM_CMNINFO_DIS_DPD: + dm->en_dis_dpd = (boolean)value; + break; + default: break; - } - } - -void -odm_cmn_info_hook( - struct dm_struct *dm, - enum odm_cmninfo cmn_info, - void *value -) +void odm_cmn_info_hook(struct dm_struct *dm, enum odm_cmninfo cmn_info, + void *value) { - /* */ - /* Hook call by reference pointer. */ - /* */ - switch (cmn_info) { - /* */ - /* Dynamic call by reference pointer. */ - /* */ - case ODM_CMNINFO_TX_UNI: + /* @Hook call by reference pointer. */ + switch (cmn_info) { + /* @Dynamic call by reference pointer. */ + case ODM_CMNINFO_TX_UNI: dm->num_tx_bytes_unicast = (u64 *)value; break; - case ODM_CMNINFO_RX_UNI: + case ODM_CMNINFO_RX_UNI: dm->num_rx_bytes_unicast = (u64 *)value; break; - case ODM_CMNINFO_BAND: + case ODM_CMNINFO_BAND: dm->band_type = (u8 *)value; break; - case ODM_CMNINFO_SEC_CHNL_OFFSET: + case ODM_CMNINFO_SEC_CHNL_OFFSET: dm->sec_ch_offset = (u8 *)value; break; - case ODM_CMNINFO_SEC_MODE: + case ODM_CMNINFO_SEC_MODE: dm->security = (u8 *)value; break; - case ODM_CMNINFO_BW: + case ODM_CMNINFO_BW: dm->band_width = (u8 *)value; break; - case ODM_CMNINFO_CHNL: + case ODM_CMNINFO_CHNL: dm->channel = (u8 *)value; break; - case ODM_CMNINFO_SCAN: + case ODM_CMNINFO_SCAN: dm->is_scan_in_process = (boolean *)value; break; - case ODM_CMNINFO_POWER_SAVING: + case ODM_CMNINFO_POWER_SAVING: dm->is_power_saving = (boolean *)value; break; - case ODM_CMNINFO_ONE_PATH_CCA: + case ODM_CMNINFO_TDMA: + dm->is_tdma = (boolean *)value; + break; + + case ODM_CMNINFO_ONE_PATH_CCA: dm->one_path_cca = (u8 *)value; break; - case ODM_CMNINFO_DRV_STOP: + case ODM_CMNINFO_DRV_STOP: dm->is_driver_stopped = (boolean *)value; break; - - case ODM_CMNINFO_PNP_IN: - dm->is_driver_is_going_to_pnp_set_power_sleep = (boolean *)value; - break; - - case ODM_CMNINFO_INIT_ON: + case ODM_CMNINFO_INIT_ON: dm->pinit_adpt_in_progress = (boolean *)value; break; - case ODM_CMNINFO_ANT_TEST: + case ODM_CMNINFO_ANT_TEST: dm->antenna_test = (u8 *)value; break; - case ODM_CMNINFO_NET_CLOSED: + case ODM_CMNINFO_NET_CLOSED: dm->is_net_closed = (boolean *)value; break; - case ODM_CMNINFO_FORCED_RATE: + case ODM_CMNINFO_FORCED_RATE: dm->forced_data_rate = (u16 *)value; break; case ODM_CMNINFO_ANT_DIV: dm->enable_antdiv = (u8 *)value; break; - + case ODM_CMNINFO_PATH_DIV: + dm->enable_pathdiv = (u8 *)value; + break; case ODM_CMNINFO_ADAPTIVE_SOML: dm->en_adap_soml = (u8 *)value; break; - case ODM_CMNINFO_ADAPTIVITY: dm->enable_adaptivity = (u8 *)value; break; - case ODM_CMNINFO_P2P_LINK: + case ODM_CMNINFO_P2P_LINK: dm->dm_dig_table.is_p2p_in_process = (u8 *)value; break; - case ODM_CMNINFO_IS1ANTENNA: + case ODM_CMNINFO_IS1ANTENNA: dm->is_1_antenna = (boolean *)value; break; - case ODM_CMNINFO_RFDEFAULTPATH: + case ODM_CMNINFO_RFDEFAULTPATH: dm->rf_default_path = (u8 *)value; break; - case ODM_CMNINFO_FCS_MODE: + case ODM_CMNINFO_FCS_MODE: /* @fast channel switch (= MCC mode)*/ dm->is_fcs_mode_enable = (boolean *)value; break; - /*add by YuChen for beamforming PhyDM*/ - case ODM_CMNINFO_HUBUSBMODE: + + case ODM_CMNINFO_HUBUSBMODE: dm->hub_usb_mode = (u8 *)value; break; - case ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS: + case ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS: dm->is_fw_dw_rsvd_page_in_progress = (boolean *)value; break; - case ODM_CMNINFO_TX_TP: + case ODM_CMNINFO_TX_TP: dm->current_tx_tp = (u32 *)value; break; - case ODM_CMNINFO_RX_TP: + case ODM_CMNINFO_RX_TP: dm->current_rx_tp = (u32 *)value; break; - case ODM_CMNINFO_SOUNDING_SEQ: + case ODM_CMNINFO_SOUNDING_SEQ: dm->sounding_seq = (u8 *)value; break; #ifdef CONFIG_PHYDM_DFS_MASTER - case ODM_CMNINFO_DFS_MASTER_ENABLE: + case ODM_CMNINFO_DFS_MASTER_ENABLE: dm->dfs_master_enabled = (u8 *)value; break; #endif - case ODM_CMNINFO_FORCE_TX_ANT_BY_TXDESC: - dm->dm_fat_table.p_force_tx_ant_by_desc = (u8 *)value; + +#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + case ODM_CMNINFO_FORCE_TX_ANT_BY_TXDESC: + dm->dm_fat_table.p_force_tx_by_desc = (u8 *)value; break; - case ODM_CMNINFO_SET_S0S1_DEFAULT_ANTENNA: + case ODM_CMNINFO_SET_S0S1_DEFAULT_ANTENNA: dm->dm_fat_table.p_default_s0_s1 = (u8 *)value; break; - case ODM_CMNINFO_SOFT_AP_MODE: + case ODM_CMNINFO_BF_ANTDIV_DECISION: + dm->dm_fat_table.is_no_csi_feedback = (boolean *)value; + break; +#endif + + case ODM_CMNINFO_SOFT_AP_MODE: dm->soft_ap_mode = (u32 *)value; break; case ODM_CMNINFO_MP_MODE: dm->mp_mode = (u8 *)value; break; - case ODM_CMNINFO_INTERRUPT_MASK: + case ODM_CMNINFO_INTERRUPT_MASK: dm->interrupt_mask = (u32 *)value; break; case ODM_CMNINFO_BB_OPERATION_MODE: dm->bb_op_mode = (u8 *)value; break; - case ODM_CMNINFO_BF_ANTDIV_DECISION: - dm->dm_fat_table.is_no_csi_feedback = (boolean *)value; + case ODM_CMNINFO_MANUAL_SUPPORTABILITY: + dm->manual_supportability = (u32 *)value; break; - default: /*do nothing*/ break; - } - } -/* + +/*@ * Update band/CHannel/.. The values are dynamic but non-per-packet. - * */ -void -odm_cmn_info_update( - struct dm_struct *dm, - u32 cmn_info, - u64 value -) + */ +void odm_cmn_info_update(struct dm_struct *dm, u32 cmn_info, u64 value) { - /* */ /* This init variable may be changed in run time. */ - /* */ - switch (cmn_info) { + switch (cmn_info) { case ODM_CMNINFO_LINK_IN_PROGRESS: dm->is_link_in_process = (boolean)value; break; - case ODM_CMNINFO_ABILITY: + case ODM_CMNINFO_ABILITY: dm->support_ability = (u64)value; break; - case ODM_CMNINFO_RF_TYPE: + case ODM_CMNINFO_RF_TYPE: dm->rf_type = (u8)value; break; - case ODM_CMNINFO_WIFI_DIRECT: + case ODM_CMNINFO_WIFI_DIRECT: dm->is_wifi_direct = (boolean)value; break; - case ODM_CMNINFO_WIFI_DISPLAY: + case ODM_CMNINFO_WIFI_DISPLAY: dm->is_wifi_display = (boolean)value; break; - case ODM_CMNINFO_LINK: + case ODM_CMNINFO_LINK: dm->is_linked = (boolean)value; break; - case ODM_CMNINFO_CMW500LINK: + case ODM_CMNINFO_CMW500LINK: dm->iot_table.is_linked_cmw500 = (boolean)value; break; - case ODM_CMNINFO_STATION_STATE: + case ODM_CMNINFO_STATION_STATE: dm->bsta_state = (boolean)value; break; - case ODM_CMNINFO_RSSI_MIN: + case ODM_CMNINFO_RSSI_MIN: dm->rssi_min = (u8)value; break; - case ODM_CMNINFO_RSSI_MIN_BY_PATH: + case ODM_CMNINFO_RSSI_MIN_BY_PATH: dm->rssi_min_by_path = (u8)value; break; - case ODM_CMNINFO_DBG_COMP: + case ODM_CMNINFO_DBG_COMP: dm->debug_components = (u64)value; break; - case ODM_CMNINFO_DBG_LEVEL: - dm->debug_level = (u32)value; - break; - #ifdef ODM_CONFIG_BT_COEXIST /* The following is for BT HS mode and BT coexist mechanism. */ case ODM_CMNINFO_BT_ENABLED: @@ -2316,74 +2506,50 @@ odm_cmn_info_update( dm->bt_info_table.bt_hs_rssi = (u8)value; break; - case ODM_CMNINFO_BT_OPERATION: + case ODM_CMNINFO_BT_OPERATION: dm->bt_info_table.is_bt_hs_operation = (boolean)value; break; - case ODM_CMNINFO_BT_LIMITED_DIG: + case ODM_CMNINFO_BT_LIMITED_DIG: dm->bt_info_table.is_bt_limited_dig = (boolean)value; break; #endif - case ODM_CMNINFO_AP_TOTAL_NUM: + case ODM_CMNINFO_AP_TOTAL_NUM: dm->ap_total_num = (u8)value; break; #ifdef CONFIG_PHYDM_DFS_MASTER - case ODM_CMNINFO_DFS_REGION_DOMAIN: + case ODM_CMNINFO_DFS_REGION_DOMAIN: dm->dfs_region_domain = (u8)value; break; #endif - case ODM_CMNINFO_BT_CONTINUOUS_TURN: + case ODM_CMNINFO_BT_CONTINUOUS_TURN: dm->is_bt_continuous_turn = (boolean)value; break; - -#if 0 - case ODM_CMNINFO_OP_MODE: - dm->op_mode = (u8)value; + case ODM_CMNINFO_IS_DOWNLOAD_FW: + dm->is_download_fw = (boolean)value; break; - - case ODM_CMNINFO_BAND: - dm->band_type = (u8)value; + case ODM_CMNINFO_PHYDM_PATCH_ID: + dm->iot_table.phydm_patch_id = (u32)value; break; - - case ODM_CMNINFO_SEC_CHNL_OFFSET: - dm->sec_ch_offset = (u8)value; + case ODM_CMNINFO_RRSR_VAL: + dm->dm_ra_table.rrsr_val_init = (u32)value; break; - - case ODM_CMNINFO_SEC_MODE: - dm->security = (u8)value; - break; - - case ODM_CMNINFO_BW: - dm->band_width = (u8)value; - break; - - case ODM_CMNINFO_CHNL: - dm->channel = (u8)value; - break; -#endif default: - /* do nothing */ break; } - - } -u32 -phydm_cmn_info_query( - struct dm_struct *dm, - enum phydm_info_query info_type -) +u32 phydm_cmn_info_query(struct dm_struct *dm, enum phydm_info_query info_type) { - struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - struct ccx_info *ccx_info = &dm->dm_ccx_info; + struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct ccx_info *ccx_info = &dm->dm_ccx_info; switch (info_type) { - /*=== [FA Relative] ===========================================*/ + /*@=== [FA Relative] ===========================================*/ case PHYDM_INFO_FA_OFDM: return fa_t->cnt_ofdm_fail; @@ -2437,95 +2603,77 @@ phydm_cmn_info_query( case PHYDM_INFO_DBG_PORT_0: return fa_t->dbg_port0; - + case PHYDM_INFO_CRC32_OK_HT_AGG: return fa_t->cnt_ht_crc32_ok_agg; - + case PHYDM_INFO_CRC32_ERROR_HT_AGG: return fa_t->cnt_ht_crc32_error_agg; - - /*=== [DIG] ================================================*/ - + + /*@=== [DIG] ================================================*/ + case PHYDM_INFO_CURR_IGI: return dig_t->cur_ig_value; - /*=== [RSSI] ===============================================*/ + /*@=== [RSSI] ===============================================*/ case PHYDM_INFO_RSSI_MIN: return (u32)dm->rssi_min; - + case PHYDM_INFO_RSSI_MAX: return (u32)dm->rssi_max; - case PHYDM_INFO_CLM_RATIO : + case PHYDM_INFO_CLM_RATIO: return (u32)ccx_info->clm_ratio; - case PHYDM_INFO_NHM_RATIO : + case PHYDM_INFO_NHM_RATIO: return (u32)ccx_info->nhm_ratio; default: return 0xffffffff; - } } - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -odm_init_all_work_items(struct dm_struct *dm) +void odm_init_all_work_items(struct dm_struct *dm) { - void *adapter = dm->adapter; + void *adapter = dm->adapter; #if USE_WORKITEM -#ifdef CONFIG_DYNAMIC_RX_PATH - odm_initialize_work_item(dm, - &dm->dm_drp_table.phydm_dynamic_rx_path_workitem, - (RT_WORKITEM_CALL_BACK)phydm_dynamic_rx_path_workitem_callback, - (void *)adapter, - "DynamicRxPathWorkitem"); - -#endif - #ifdef CONFIG_ADAPTIVE_SOML odm_initialize_work_item(dm, - &dm->dm_soml_table.phydm_adaptive_soml_workitem, - (RT_WORKITEM_CALL_BACK)phydm_adaptive_soml_workitem_callback, + &dm->dm_soml_table.phydm_adaptive_soml_workitem, + (RT_WORKITEM_CALL_BACK)phydm_adaptive_soml_workitem_callback, (void *)adapter, "AdaptiveSOMLWorkitem"); #endif +#ifdef ODM_EVM_ENHANCE_ANTDIV + odm_initialize_work_item(dm, + &dm->phydm_evm_antdiv_workitem, + (RT_WORKITEM_CALL_BACK)phydm_evm_antdiv_workitem_callback, + (void *)adapter, + "EvmAntdivWorkitem"); +#endif + #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY odm_initialize_work_item(dm, - &dm->dm_swat_table.phydm_sw_antenna_switch_workitem, - (RT_WORKITEM_CALL_BACK)odm_sw_antdiv_workitem_callback, + &dm->dm_swat_table.phydm_sw_antenna_switch_workitem, + (RT_WORKITEM_CALL_BACK)odm_sw_antdiv_workitem_callback, (void *)adapter, "AntennaSwitchWorkitem"); #endif #if (defined(CONFIG_HL_SMART_ANTENNA)) odm_initialize_work_item(dm, - &dm->dm_sat_table.hl_smart_antenna_workitem, - (RT_WORKITEM_CALL_BACK)phydm_beam_switch_workitem_callback, + &dm->dm_sat_table.hl_smart_antenna_workitem, + (RT_WORKITEM_CALL_BACK)phydm_beam_switch_workitem_callback, (void *)adapter, "hl_smart_ant_workitem"); odm_initialize_work_item(dm, - &dm->dm_sat_table.hl_smart_antenna_decision_workitem, - (RT_WORKITEM_CALL_BACK)phydm_beam_decision_workitem_callback, + &dm->dm_sat_table.hl_smart_antenna_decision_workitem, + (RT_WORKITEM_CALL_BACK)phydm_beam_decision_workitem_callback, (void *)adapter, "hl_smart_ant_decision_workitem"); #endif - odm_initialize_work_item( - dm, - &dm->path_div_switch_workitem, - (RT_WORKITEM_CALL_BACK)odm_path_div_chk_ant_switch_workitem_callback, - (void *)adapter, - "SWAS_WorkItem"); - - odm_initialize_work_item( - dm, - &dm->cck_path_diversity_workitem, - (RT_WORKITEM_CALL_BACK)odm_cck_tx_path_diversity_work_item_callback, - (void *)adapter, - "CCKTXPathDiversityWorkItem"); - odm_initialize_work_item( dm, &dm->ra_rpt_workitem, @@ -2544,7 +2692,7 @@ odm_init_all_work_items(struct dm_struct *dm) #endif /*#if USE_WORKITEM*/ -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT odm_initialize_work_item( dm, &dm->beamforming_info.txbf_info.txbf_enter_work_item, @@ -2602,20 +2750,6 @@ odm_init_all_work_items(struct dm_struct *dm) "txbf_get_tx_rate_work_item"); #endif - odm_initialize_work_item( - dm, - &dm->adaptivity.phydm_pause_edcca_work_item, - (RT_WORKITEM_CALL_BACK)phydm_pause_edcca_work_item_callback, - (void *)adapter, - "phydm_pause_edcca_work_item"); - - odm_initialize_work_item( - dm, - &dm->adaptivity.phydm_resume_edcca_work_item, - (RT_WORKITEM_CALL_BACK)phydm_resume_edcca_work_item_callback, - (void *)adapter, - "phydm_resume_edcca_work_item"); - #if (PHYDM_LA_MODE_SUPPORT == 1) odm_initialize_work_item( dm, @@ -2631,11 +2765,9 @@ odm_init_all_work_items(struct dm_struct *dm) (void *)adapter, "adc_smp_work_item_1"); #endif - } -void -odm_free_all_work_items(struct dm_struct *dm) +void odm_free_all_work_items(struct dm_struct *dm) { #if USE_WORKITEM @@ -2643,30 +2775,27 @@ odm_free_all_work_items(struct dm_struct *dm) odm_free_work_item(&dm->dm_swat_table.phydm_sw_antenna_switch_workitem); #endif -#ifdef CONFIG_DYNAMIC_RX_PATH - odm_free_work_item(&dm->dm_drp_table.phydm_dynamic_rx_path_workitem); -#endif - #ifdef CONFIG_ADAPTIVE_SOML odm_free_work_item(&dm->dm_soml_table.phydm_adaptive_soml_workitem); #endif +#ifdef ODM_EVM_ENHANCE_ANTDIV + odm_free_work_item(&dm->phydm_evm_antdiv_workitem); +#endif #if (defined(CONFIG_HL_SMART_ANTENNA)) odm_free_work_item(&dm->dm_sat_table.hl_smart_antenna_workitem); odm_free_work_item(&dm->dm_sat_table.hl_smart_antenna_decision_workitem); #endif - odm_free_work_item(&dm->path_div_switch_workitem); - odm_free_work_item(&dm->cck_path_diversity_workitem); #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) odm_free_work_item(&dm->fast_ant_training_workitem); #endif odm_free_work_item(&dm->ra_rpt_workitem); - /*odm_free_work_item((&dm->sbdcnt_workitem));*/ +/*odm_free_work_item((&dm->sbdcnt_workitem));*/ #endif -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_enter_work_item)); odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_leave_work_item)); odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_fw_ndpa_work_item)); @@ -2677,150 +2806,134 @@ odm_free_all_work_items(struct dm_struct *dm) odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_get_tx_rate_work_item)); #endif - odm_free_work_item((&dm->adaptivity.phydm_pause_edcca_work_item)); - odm_free_work_item((&dm->adaptivity.phydm_resume_edcca_work_item)); - #if (PHYDM_LA_MODE_SUPPORT == 1) odm_free_work_item((&dm->adcsmp.adc_smp_work_item)); odm_free_work_item((&dm->adcsmp.adc_smp_work_item_1)); #endif - } #endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ -void -odm_init_all_timers( - struct dm_struct *dm -) +void odm_init_all_timers(struct dm_struct *dm) { #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) odm_ant_div_timers(dm, INIT_ANTDIV_TIMMER); #endif - +#if (defined(PHYDM_TDMA_DIG_SUPPORT)) +#ifdef IS_USE_NEW_TDMA + phydm_tdma_dig_timers(dm, INIT_TDMA_DIG_TIMMER); +#endif +#endif +#ifdef CONFIG_ADAPTIVE_SOML phydm_adaptive_soml_timers(dm, INIT_SOML_TIMMER); - +#endif #ifdef PHYDM_LNA_SAT_CHK_SUPPORT +#ifdef PHYDM_LNA_SAT_CHK_TYPE1 phydm_lna_sat_chk_timers(dm, INIT_LNA_SAT_CHK_TIMMER); #endif - -#ifdef CONFIG_DYNAMIC_RX_PATH - phydm_dynamic_rx_path_timers(dm, INIT_DRP_TIMMER); #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - odm_initialize_timer(dm, &dm->path_div_switch_timer, - (void *)odm_path_div_chk_ant_switch_callback, NULL, "PathDivTimer"); - odm_initialize_timer(dm, &dm->cck_path_diversity_timer, - (void *)odm_cck_tx_path_diversity_callback, NULL, "cck_path_diversity_timer"); odm_initialize_timer(dm, &dm->sbdcnt_timer, (void *)phydm_sbd_callback, NULL, "SbdTimer"); -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT odm_initialize_timer(dm, &dm->beamforming_info.txbf_info.txbf_fw_ndpa_timer, - (void *)hal_com_txbf_fw_ndpa_timer_callback, NULL, "txbf_fw_ndpa_timer"); + (void *)hal_com_txbf_fw_ndpa_timer_callback, NULL, + "txbf_fw_ndpa_timer"); #endif #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT odm_initialize_timer(dm, &dm->beamforming_info.beamforming_timer, - (void *)beamforming_sw_timer_callback, NULL, "beamforming_timer"); + (void *)beamforming_sw_timer_callback, NULL, + "beamforming_timer"); #endif #endif } -void -odm_cancel_all_timers( - struct dm_struct *dm -) +void odm_cancel_all_timers(struct dm_struct *dm) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - /* 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in win7*/ + /* @2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in win7*/ if (dm->adapter == NULL) - return; + return; #endif #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) odm_ant_div_timers(dm, CANCEL_ANTDIV_TIMMER); #endif - +#ifdef PHYDM_TDMA_DIG_SUPPORT +#ifdef IS_USE_NEW_TDMA + phydm_tdma_dig_timers(dm, CANCEL_TDMA_DIG_TIMMER); +#endif +#endif +#ifdef CONFIG_ADAPTIVE_SOML phydm_adaptive_soml_timers(dm, CANCEL_SOML_TIMMER); - +#endif #ifdef PHYDM_LNA_SAT_CHK_SUPPORT +#ifdef PHYDM_LNA_SAT_CHK_TYPE1 phydm_lna_sat_chk_timers(dm, CANCEL_LNA_SAT_CHK_TIMMER); #endif - - -#ifdef CONFIG_DYNAMIC_RX_PATH - phydm_dynamic_rx_path_timers(dm, CANCEL_DRP_TIMMER); #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - odm_cancel_timer(dm, &dm->path_div_switch_timer); - odm_cancel_timer(dm, &dm->cck_path_diversity_timer); odm_cancel_timer(dm, &dm->sbdcnt_timer); -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT odm_cancel_timer(dm, &dm->beamforming_info.txbf_info.txbf_fw_ndpa_timer); #endif #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT odm_cancel_timer(dm, &dm->beamforming_info.beamforming_timer); #endif #endif - } - -void -odm_release_all_timers( - struct dm_struct *dm -) +void odm_release_all_timers(struct dm_struct *dm) { #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) odm_ant_div_timers(dm, RELEASE_ANTDIV_TIMMER); #endif +#ifdef PHYDM_TDMA_DIG_SUPPORT +#ifdef IS_USE_NEW_TDMA + phydm_tdma_dig_timers(dm, RELEASE_TDMA_DIG_TIMMER); +#endif +#endif +#ifdef CONFIG_ADAPTIVE_SOML phydm_adaptive_soml_timers(dm, RELEASE_SOML_TIMMER); - +#endif #ifdef PHYDM_LNA_SAT_CHK_SUPPORT +#ifdef PHYDM_LNA_SAT_CHK_TYPE1 phydm_lna_sat_chk_timers(dm, RELEASE_LNA_SAT_CHK_TIMMER); #endif - -#ifdef CONFIG_DYNAMIC_RX_PATH - phydm_dynamic_rx_path_timers(dm, RELEASE_DRP_TIMMER); #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - odm_release_timer(dm, &dm->path_div_switch_timer); - odm_release_timer(dm, &dm->cck_path_diversity_timer); odm_release_timer(dm, &dm->sbdcnt_timer); -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT odm_release_timer(dm, &dm->beamforming_info.txbf_info.txbf_fw_ndpa_timer); #endif #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT odm_release_timer(dm, &dm->beamforming_info.beamforming_timer); #endif #endif } #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -void -odm_init_all_threads( - struct dm_struct *dm -) +void odm_init_all_threads( + struct dm_struct *dm) { #ifdef TPT_THREAD k_tpt_task_init(dm->priv); #endif } -void -odm_stop_all_threads( - struct dm_struct *dm -) +void odm_stop_all_threads( + struct dm_struct *dm) { #ifdef TPT_THREAD k_tpt_task_stop(dm->priv); @@ -2829,12 +2942,17 @@ odm_stop_all_threads( #endif #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -/* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */ +/* @Justin: According to the current RRSI to adjust Response Frame TX power, + * 2012/11/05 + */ void odm_dtc(struct dm_struct *dm) { #ifdef CONFIG_DM_RESP_TXAGC -#define DTC_BASE 35 /* RSSI higher than this value, start to decade TX power */ -#define DTC_DWN_BASE (DTC_BASE-5) /* RSSI lower than this value, start to increase TX power */ +/* RSSI higher than this value, start to decade TX power */ +#define DTC_BASE 35 + +/* RSSI lower than this value, start to increase TX power */ +#define DTC_DWN_BASE (DTC_BASE - 5) /* RSSI vs TX power step mapping: decade TX power */ static const u8 dtc_table_down[] = { @@ -2843,8 +2961,7 @@ void odm_dtc(struct dm_struct *dm) (DTC_BASE + 10), (DTC_BASE + 15), (DTC_BASE + 20), - (DTC_BASE + 25) - }; + (DTC_BASE + 25)}; /* RSSI vs TX power step mapping: increase TX power */ static const u8 dtc_table_up[] = { @@ -2858,8 +2975,7 @@ void odm_dtc(struct dm_struct *dm) (DTC_DWN_BASE - 25), (DTC_DWN_BASE - 25), (DTC_DWN_BASE - 30), - (DTC_DWN_BASE - 35) - }; + (DTC_DWN_BASE - 35)}; u8 i; u8 dtc_steps = 0; @@ -2867,7 +2983,7 @@ void odm_dtc(struct dm_struct *dm) u8 resp_txagc = 0; #if 0 - /* As DIG is disabled, DTC is also disable */ + /* @As DIG is disabled, DTC is also disable */ if (!(dm->support_ability & ODM_XXXXXX)) return; #endif @@ -2876,7 +2992,7 @@ void odm_dtc(struct dm_struct *dm) /* need to decade the CTS TX power */ sign = 1; for (i = 0; i < ARRAY_SIZE(dtc_table_down); i++) { - if ((dtc_table_down[i] >= dm->rssi_min) || (dtc_steps >= 6)) + if (dtc_table_down[i] >= dm->rssi_min || dtc_steps >= 6) break; else dtc_steps++; @@ -2888,7 +3004,7 @@ void odm_dtc(struct dm_struct *dm) sign = 0; dtc_steps = 1; for (i = 0; i < ARRAY_SIZE(dtc_table_up); i++) { - if ((dtc_table_up[i] <= dm->rssi_min) || (dtc_steps >= 10)) + if (dtc_table_up[i] <= dm->rssi_min || dtc_steps >= 10) break; else dtc_steps++; @@ -2904,189 +3020,301 @@ void odm_dtc(struct dm_struct *dm) resp_txagc = resp_txagc | (resp_txagc << 5); odm_write_1byte(dm, 0x06d9, resp_txagc); - PHYDM_DBG(dm, ODM_COMP_PWR_TRAIN, "%s rssi_min:%u, set RESP_TXAGC to %s %u\n", - __func__, dm->rssi_min, sign ? "minus" : "plus", dtc_steps); -#endif /* CONFIG_RESP_TXAGC_ADJUST */ + PHYDM_DBG(dm, ODM_COMP_PWR_TRAIN, + "%s rssi_min:%u, set RESP_TXAGC to %s %u\n", __func__, + dm->rssi_min, sign ? "minus" : "plus", dtc_steps); +#endif /* @CONFIG_RESP_TXAGC_ADJUST */ } -#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ +#endif /* @#if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ - -/*<20170126, BB-Kevin>8188F D-CUT DC cancellation and 8821C*/ -void -phydm_dc_cancellation( - struct dm_struct *dm - -) -{ +/*@<20170126, BB-Kevin>8188F D-CUT DC cancellation and 8821C*/ +void phydm_dc_cancellation(struct dm_struct *dm) +{ #ifdef PHYDM_DC_CANCELLATION - u32 offset_i_hex[PHYDM_MAX_RF_PATH] = {0}; - u32 offset_q_hex[PHYDM_MAX_RF_PATH] = {0}; - u32 reg_value32[PHYDM_MAX_RF_PATH] = {0}; - u8 path = RF_PATH_A; + u32 offset_i_hex[PHYDM_MAX_RF_PATH] = {0}; + u32 offset_q_hex[PHYDM_MAX_RF_PATH] = {0}; + u32 reg_value32[PHYDM_MAX_RF_PATH] = {0}; + u8 path = RF_PATH_A; + u8 set_result; if (!(dm->support_ic_type & ODM_DC_CANCELLATION_SUPPORT)) return; - - if ((dm->support_ic_type & ODM_RTL8188F) && (dm->cut_version < ODM_CUT_D)) + if ((dm->support_ic_type & ODM_RTL8188F) && + dm->cut_version < ODM_CUT_D) + return; + if ((dm->support_ic_type & ODM_RTL8192F) && + dm->cut_version == ODM_CUT_A) return; - /*DC_Estimation (only for 2x2 ic now) */ + PHYDM_DBG(dm, ODM_COMP_API, "%s ======>\n", __func__); + + /*@DC_Estimation (only for 2x2 ic now) */ for (path = RF_PATH_A; path < PHYDM_MAX_RF_PATH; path++) { + if (path > RF_PATH_A && + dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8188F | + ODM_RTL8710B | ODM_RTL8721D)) + break; + else if (path > RF_PATH_B && + dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8192F)) + break; + if (phydm_stop_ic_trx(dm, PHYDM_SET) == PHYDM_SET_FAIL) { + PHYDM_DBG(dm, ODM_COMP_API, "STOP_TRX_FAIL\n"); + return; + } + odm_write_dig(dm, 0x7e); + /*@Disable LNA*/ + if (dm->support_ic_type & ODM_RTL8821C) + halrf_rf_lna_setting(dm, HALRF_LNA_DISABLE); + /*Turn off 3-wire*/ + phydm_stop_3_wire(dm, PHYDM_SET); if (dm->support_ic_type & (ODM_RTL8188F | ODM_RTL8710B)) { - if (!phydm_set_bb_dbg_port(dm, - BB_DBGPORT_PRIORITY_2, 0x235)) {/*set debug port to 0x235*/ + /*set debug port to 0x235*/ + if (!phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x235)) { PHYDM_DBG(dm, ODM_COMP_API, - "[DC Cancellation] Set Debug port Fail"); + "Set Debug port Fail\n"); return; } - } else if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B)) { - if (!phydm_set_bb_dbg_port(dm, BB_DBGPORT_PRIORITY_2, 0x200)) { + } else if (dm->support_ic_type & ODM_RTL8721D) { + /*set debug port to 0x200*/ + if (!phydm_set_bb_dbg_port(dm, DBGPORT_PRI_2, 0x200)) { + PHYDM_DBG(dm, ODM_COMP_API, + "Set Debug port Fail\n"); + return; + } + } else if (dm->support_ic_type & ODM_RTL8821C) { + if (!phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x200)) { /*set debug port to 0x200*/ PHYDM_DBG(dm, ODM_COMP_API, - "[DC Cancellation] Set Debug port Fail"); + "Set Debug port Fail\n"); return; } phydm_bb_dbg_port_header_sel(dm, 0x0); - if (dm->rf_type > RF_1T1R) { - if (!phydm_set_bb_dbg_port(dm, BB_DBGPORT_PRIORITY_2, 0x202)) { - /*set debug port to 0x200*/ - PHYDM_DBG(dm, ODM_COMP_API, - "[DC Cancellation] Set Debug port Fail"); - return; - } - phydm_bb_dbg_port_header_sel(dm, 0x0); + } else if (dm->support_ic_type & ODM_RTL8822B) { + if (path == RF_PATH_A && + !phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x200)) { + /*set debug port to 0x200*/ + PHYDM_DBG(dm, ODM_COMP_API, + "Set Debug port Fail\n"); + return; + } + if (path == RF_PATH_B && + !phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x202)) { + /*set debug port to 0x200*/ + PHYDM_DBG(dm, ODM_COMP_API, + "Set Debug port Fail\n"); + return; + } + phydm_bb_dbg_port_header_sel(dm, 0x0); + } else if (dm->support_ic_type & ODM_RTL8192F) { + if (path == RF_PATH_A && + !phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x235)) { + /*set debug port to 0x235*/ + PHYDM_DBG(dm, ODM_COMP_API, + "Set Debug port Fail\n"); + return; + } + if (path == RF_PATH_B && + !phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x23d)) { + /*set debug port to 0x23d*/ + PHYDM_DBG(dm, ODM_COMP_API, + "Set Debug port Fail\n"); + return; } } - - odm_write_dig(dm, 0x7E); - - if (dm->support_ic_type & ODM_IC_11N_SERIES) - odm_set_bb_reg(dm, 0x88c, BIT(21)|BIT(20), 0x3); - else { - odm_set_bb_reg(dm, 0xc00, BIT(1)|BIT(0), 0x0); - if (dm->rf_type > RF_1T1R) - odm_set_bb_reg(dm, 0xe00, BIT(1)|BIT(0), 0x0); - } - odm_set_bb_reg(dm, 0xa78, MASKBYTE1, 0x0); /*disable CCK DCNF*/ - - PHYDM_DBG(dm, ODM_COMP_API, "DC cancellation Begin!!!"); - - phydm_stop_ck320(dm, true); /*stop ck320*/ + + /*@disable CCK DCNF*/ + odm_set_bb_reg(dm, R_0xa78, MASKBYTE1, 0x0); + + PHYDM_DBG(dm, ODM_COMP_API, "DC cancellation Begin!!!\n"); + + phydm_stop_ck320(dm, true); /*stop ck320*/ /* the same debug port both for path-a and path-b*/ - reg_value32[path] = phydm_get_bb_dbg_port_value(dm); + reg_value32[path] = phydm_get_bb_dbg_port_val(dm); - phydm_stop_ck320(dm, false); /*start ck320*/ + phydm_stop_ck320(dm, false); /*start ck320*/ - if (dm->support_ic_type & ODM_IC_11N_SERIES) { - odm_set_bb_reg(dm, 0x88c, BIT(21)|BIT(20), 0x0); - } else { - odm_set_bb_reg(dm, 0xc00, BIT(1)|BIT(0), 0x3); - odm_set_bb_reg(dm, 0xe00, BIT(1)|BIT(0), 0x3); - } - odm_write_dig(dm, 0x20); phydm_release_bb_dbg_port(dm); + /* @Turn on 3-wire*/ + phydm_stop_3_wire(dm, PHYDM_REVERT); + /* @Enable LNA*/ + if (dm->support_ic_type & ODM_RTL8821C) + halrf_rf_lna_setting(dm, HALRF_LNA_ENABLE); - PHYDM_DBG(dm, ODM_COMP_API, "DC cancellation OK!!!"); + odm_write_dig(dm, 0x20); + + set_result = phydm_stop_ic_trx(dm, PHYDM_REVERT); + + PHYDM_DBG(dm, ODM_COMP_API, "DC cancellation OK!!!\n"); } - - /*DC_Cancellation*/ - odm_set_bb_reg(dm, 0xa9c, BIT(20), 0x1); /*DC compensation to CCK data path*/ + + /*@DC_Cancellation*/ + /*@DC compensation to CCK data path*/ + odm_set_bb_reg(dm, R_0xa9c, BIT(20), 0x1); if (dm->support_ic_type & (ODM_RTL8188F | ODM_RTL8710B)) { offset_i_hex[0] = (reg_value32[0] & 0xffc0000) >> 18; offset_q_hex[0] = (reg_value32[0] & 0x3ff00) >> 8; - /*Before filling into registers, offset should be multiplexed (-1)*/ - offset_i_hex[0] = (offset_i_hex[0] >= 0x200) ? (0x400 - offset_i_hex[0]) : (0x1ff - offset_i_hex[0]); - offset_q_hex[0] = (offset_q_hex[0] >= 0x200) ? (0x400 - offset_q_hex[0]) : (0x1ff - offset_q_hex[0]); + /*@Before filling into registers, + *offset should be multiplexed (-1) + */ + offset_i_hex[0] = (offset_i_hex[0] >= 0x200) ? + (0x400 - offset_i_hex[0]) : + (0x1ff - offset_i_hex[0]); + offset_q_hex[0] = (offset_q_hex[0] >= 0x200) ? + (0x400 - offset_q_hex[0]) : + (0x1ff - offset_q_hex[0]); - odm_set_bb_reg(dm, 0x950, 0x1ff, offset_i_hex[0]); - odm_set_bb_reg(dm, 0x950, 0x1ff0000, offset_q_hex[0]); + odm_set_bb_reg(dm, R_0x950, 0x1ff, offset_i_hex[0]); + odm_set_bb_reg(dm, R_0x950, 0x1ff0000, offset_q_hex[0]); } else if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B)) { - /* Path-a */ offset_i_hex[0] = (reg_value32[0] & 0xffc00) >> 10; offset_q_hex[0] = reg_value32[0] & 0x3ff; - /*Before filling into registers, offset should be multiplexed (-1)*/ + /*@Before filling into registers, + *offset should be multiplexed (-1) + */ offset_i_hex[0] = 0x400 - offset_i_hex[0]; offset_q_hex[0] = 0x400 - offset_q_hex[0]; - odm_set_bb_reg(dm, 0xc10, 0x3c000000, ((0x3c0 & offset_i_hex[0]) >> 6)); - odm_set_bb_reg(dm, 0xc10, 0xfc00, (0x3f & offset_i_hex[0])); - odm_set_bb_reg(dm, 0xc14, 0x3c000000, ((0x3c0 & offset_q_hex[0]) >> 6)); - odm_set_bb_reg(dm, 0xc14, 0xfc00, (0x3f & offset_q_hex[0])); + odm_set_bb_reg(dm, R_0xc10, 0x3c000000, + (0x3c0 & offset_i_hex[0]) >> 6); + odm_set_bb_reg(dm, R_0xc10, 0xfc00, 0x3f & offset_i_hex[0]); + odm_set_bb_reg(dm, R_0xc14, 0x3c000000, + (0x3c0 & offset_q_hex[0]) >> 6); + odm_set_bb_reg(dm, R_0xc14, 0xfc00, 0x3f & offset_q_hex[0]); /* Path-b */ if (dm->rf_type > RF_1T1R) { - offset_i_hex[1] = (reg_value32[1] & 0xffc00) >> 10; offset_q_hex[1] = reg_value32[1] & 0x3ff; - /*Before filling into registers, offset should be multiplexed (-1)*/ + /*@Before filling into registers, + *offset should be multiplexed (-1) + */ offset_i_hex[1] = 0x400 - offset_i_hex[1]; offset_q_hex[1] = 0x400 - offset_q_hex[1]; - odm_set_bb_reg(dm, 0xe10, 0x3c000000, ((0x3c0 & offset_i_hex[1]) >> 6)); - odm_set_bb_reg(dm, 0xe10, 0xfc00, (0x3f & offset_i_hex[1])); - odm_set_bb_reg(dm, 0xe14, 0x3c000000, ((0x3c0 & offset_q_hex[1]) >> 6)); - odm_set_bb_reg(dm, 0xe14, 0xfc00, (0x3f & offset_q_hex[1])); + odm_set_bb_reg(dm, R_0xe10, 0x3c000000, + (0x3c0 & offset_i_hex[1]) >> 6); + odm_set_bb_reg(dm, R_0xe10, 0xfc00, + 0x3f & offset_i_hex[1]); + odm_set_bb_reg(dm, R_0xe14, 0x3c000000, + (0x3c0 & offset_q_hex[1]) >> 6); + odm_set_bb_reg(dm, R_0xe14, 0xfc00, + 0x3f & offset_q_hex[1]); } + } else if (dm->support_ic_type & (ODM_RTL8192F)) { + /* Path-a I:df4[27:18],Q:df4[17:8]*/ + offset_i_hex[0] = (reg_value32[0] & 0xffc0000) >> 18; + offset_q_hex[0] = (reg_value32[0] & 0x3ff00) >> 8; + + /*@Before filling into registers, + *offset should be multiplexed (-1) + */ + offset_i_hex[0] = (offset_i_hex[0] >= 0x200) ? + (0x400 - offset_i_hex[0]) : + (0xff - offset_i_hex[0]); + offset_q_hex[0] = (offset_q_hex[0] >= 0x200) ? + (0x400 - offset_q_hex[0]) : + (0xff - offset_q_hex[0]); + /*Path-a I:c10[7:0],Q:c10[15:8]*/ + odm_set_bb_reg(dm, R_0xc10, 0xff, offset_i_hex[0]); + odm_set_bb_reg(dm, R_0xc10, 0xff00, offset_q_hex[0]); + + /* Path-b */ + if (dm->rf_type > RF_1T1R) { + /* @I:df4[27:18],Q:df4[17:8]*/ + offset_i_hex[1] = (reg_value32[1] & 0xffc0000) >> 18; + offset_q_hex[1] = (reg_value32[1] & 0x3ff00) >> 8; + + /*@Before filling into registers, + *offset should be multiplexed (-1) + */ + offset_i_hex[1] = (offset_i_hex[1] >= 0x200) ? + (0x400 - offset_i_hex[1]) : + (0xff - offset_i_hex[1]); + offset_q_hex[1] = (offset_q_hex[1] >= 0x200) ? + (0x400 - offset_q_hex[1]) : + (0xff - offset_q_hex[1]); + /*Path-b I:c18[7:0],Q:c18[15:8]*/ + odm_set_bb_reg(dm, R_0xc18, 0xff, offset_i_hex[1]); + odm_set_bb_reg(dm, R_0xc18, 0xff00, offset_q_hex[1]); + } + } else if (dm->support_ic_type & (ODM_RTL8721D)) { + /*judy modified 20180517*/ + offset_i_hex[0] = (reg_value32[0] & 0xff80000) >> 19; + offset_q_hex[0] = (reg_value32[0] & 0x3fe00) >> 9; + + /*@Before filling into registers, + *offset should be multiplexed (-1) + */ + offset_i_hex[0] = 0x200 - offset_i_hex[0]; + offset_q_hex[0] = 0x200 - offset_q_hex[0]; + + odm_set_bb_reg(dm, R_0x950, 0x1ff, offset_i_hex[0]); + odm_set_bb_reg(dm, R_0x950, 0x1ff0000, offset_q_hex[0]); } #endif } -void -phydm_receiver_blocking( - void *dm_void -) +void phydm_receiver_blocking(void *dm_void) { #ifdef CONFIG_RECEIVER_BLOCKING - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 channel = *dm->channel; - u8 bw = *dm->band_width; - u32 bb_regf0 = odm_get_bb_reg(dm, 0xf0, MASKDWORD); + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 chnl = *dm->channel; + u8 bw = *dm->band_width; + u32 bb_regf0 = odm_get_bb_reg(dm, R_0xf0, 0xf000); - if (!(dm->support_ic_type & ODM_RECEIVER_BLOCKING_SUPPORT)) + if (!(dm->support_ic_type & ODM_RECEIVER_BLOCKING_SUPPORT) || + !(dm->support_ability & ODM_BB_ADAPTIVITY)) return; - if ((dm->support_ic_type & ODM_RTL8188E && ((bb_regf0 & 0xf000) >> 12) < 8) || - dm->support_ic_type & ODM_RTL8192E) { /*8188E_T version*/ - if (dm->consecutive_idlel_time > 10 && *dm->mp_mode == false && dm->adaptivity_enable == true) { - if ((bw == CHANNEL_WIDTH_20) && (channel == 1)) { - phydm_nbi_setting(dm, FUNC_ENABLE, channel, 20, 2410, PHYDM_DONT_CARE); - dm->is_receiver_blocking_en = true; - } else if ((bw == CHANNEL_WIDTH_20) && (channel == 13)) { - phydm_nbi_setting(dm, FUNC_ENABLE, channel, 20, 2473, PHYDM_DONT_CARE); - dm->is_receiver_blocking_en = true; - } else if (dm->is_receiver_blocking_en && channel != 1 && channel != 13) { - phydm_nbi_enable(dm, FUNC_DISABLE); - odm_set_bb_reg(dm, 0xc40, 0x1f000000, 0x1f); - dm->is_receiver_blocking_en = false; - } - return; + if ((dm->support_ic_type & ODM_RTL8188E && bb_regf0 < 8) || + dm->support_ic_type & ODM_RTL8192E) { + /*@8188E_T version*/ + if (dm->consecutive_idlel_time <= 10 || *dm->mp_mode) + goto end; + + if (bw == CHANNEL_WIDTH_20 && chnl == 1) { + phydm_nbi_setting(dm, FUNC_ENABLE, chnl, 20, 2410, + PHYDM_DONT_CARE); + dm->is_rx_blocking_en = true; + } else if ((bw == CHANNEL_WIDTH_20) && (chnl == 13)) { + phydm_nbi_setting(dm, FUNC_ENABLE, chnl, 20, 2473, + PHYDM_DONT_CARE); + dm->is_rx_blocking_en = true; + } else if (dm->is_rx_blocking_en && chnl != 1 && chnl != 13) { + phydm_nbi_enable(dm, FUNC_DISABLE); + odm_set_bb_reg(dm, R_0xc40, 0x1f000000, 0x1f); + dm->is_rx_blocking_en = false; } - } else if ((dm->support_ic_type & ODM_RTL8188E && ((bb_regf0 & 0xf000) >> 12) >= 8)) { /*8188E_S version*/ - if (dm->consecutive_idlel_time > 10 && *dm->mp_mode == false && dm->adaptivity_enable == true) { - if ((bw == CHANNEL_WIDTH_20) && (channel == 13)) { - phydm_nbi_setting(dm, FUNC_ENABLE, channel, 20, 2473, PHYDM_DONT_CARE); - dm->is_receiver_blocking_en = true; - } else if (dm->is_receiver_blocking_en && channel != 13) { - phydm_nbi_enable(dm, FUNC_DISABLE); - odm_set_bb_reg(dm, 0xc40, 0x1f000000, 0x1f); - dm->is_receiver_blocking_en = false; - } - return; + return; + } else if ((dm->support_ic_type & ODM_RTL8188E && bb_regf0 >= 8)) { + /*@8188E_S version*/ + if (dm->consecutive_idlel_time <= 10 || *dm->mp_mode) + goto end; + + if (bw == CHANNEL_WIDTH_20 && chnl == 13) { + phydm_nbi_setting(dm, FUNC_ENABLE, chnl, 20, 2473, + PHYDM_DONT_CARE); + dm->is_rx_blocking_en = true; + } else if (dm->is_rx_blocking_en && chnl != 13) { + phydm_nbi_enable(dm, FUNC_DISABLE); + odm_set_bb_reg(dm, R_0xc40, 0x1f000000, 0x1f); + dm->is_rx_blocking_en = false; } + return; } - if (dm->is_receiver_blocking_en) { +end: + if (dm->is_rx_blocking_en) { phydm_nbi_enable(dm, FUNC_DISABLE); - odm_set_bb_reg(dm, 0xc40, 0x1f000000, 0x1f); - dm->is_receiver_blocking_en = false; + odm_set_bb_reg(dm, R_0xc40, 0x1f000000, 0x1f); + dm->is_rx_blocking_en = false; } - #endif } diff --git a/hal/phydm/phydm.h b/hal/phydm/phydm.h index 602b663..bdbc76d 100644 --- a/hal/phydm/phydm.h +++ b/hal/phydm/phydm.h @@ -23,48 +23,82 @@ * *****************************************************************************/ - -#ifndef __HALDMOUTSRC_H__ +#ifndef __HALDMOUTSRC_H__ #define __HALDMOUTSRC_H__ -/*============================================================*/ -/*include files*/ -/*============================================================*/ +/*@============================================================*/ +/*@include files*/ +/*@============================================================*/ /*PHYDM header*/ #include "phydm_pre_define.h" +#include "phydm_features.h" #include "phydm_dig.h" +#ifdef CONFIG_PATH_DIVERSITY #include "phydm_pathdiv.h" +#endif +#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY #include "phydm_antdiv.h" +#endif + #include "phydm_soml.h" + +#ifdef CONFIG_SMART_ANTENNA #include "phydm_smt_ant.h" +#endif +#ifdef CONFIG_ANT_DETECTION #include "phydm_antdect.h" +#endif #include "phydm_rainfo.h" +#ifdef CONFIG_DYNAMIC_TX_TWR #include "phydm_dynamictxpower.h" +#endif #include "phydm_cfotracking.h" #include "phydm_adaptivity.h" #include "phydm_dfs.h" #include "phydm_ccx.h" #include "txbf/phydm_hal_txbf_api.h" +#if (PHYDM_LA_MODE_SUPPORT) #include "phydm_adc_sampling.h" -#include "phydm_dynamic_rx_path.h" +#endif +#ifdef CONFIG_PSD_TOOL #include "phydm_psd.h" +#endif +#ifdef PHYDM_PRIMARY_CCA #include "phydm_primary_cca.h" +#endif #include "phydm_cck_pd.h" #include "phydm_rssi_monitor.h" +#ifdef PHYDM_AUTO_DEGBUG #include "phydm_auto_dbg.h" +#endif #include "phydm_math_lib.h" #include "phydm_noisemonitor.h" #include "phydm_api.h" +#ifdef PHYDM_POWER_TRAINING_SUPPORT #include "phydm_pow_train.h" -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) +#endif +#ifdef PHYDM_LNA_SAT_CHK_SUPPORT +#include "phydm_lna_sat.h" +#endif +#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT +#include "phydm_pmac_tx_setting.h" +#endif +#ifdef PHYDM_MP_SUPPORT +#include "phydm_mp.h" +#endif +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) #include "phydm_beamforming.h" #endif -/* reg naming transfer */ +#ifdef CONFIG_DIRECTIONAL_BF +#include "phydm_direct_bf.h" +#endif + #include "phydm_regtable.h" -/*HALRF header*/ +/*@HALRF header*/ #include "halrf/halrf_iqk.h" +#include "halrf/halrf_dpk.h" #include "halrf/halrf.h" #include "halrf/halrf_powertracking.h" #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) @@ -73,33 +107,88 @@ #include "halrf/halphyrf_ce.h" #elif (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) #include "halrf/halphyrf_win.h" +#elif(DM_ODM_SUPPORT_TYPE & (ODM_IOT)) + #include "halrf/halphyrf_iot.h" #endif -extern const u16 phy_rate_table[28]; +extern const u16 phy_rate_table[84]; -/*============================================================*/ -/*Definition */ -/*============================================================*/ +/*@============================================================*/ +/*@Definition */ +/*@============================================================*/ /* Traffic load decision */ -#define TRAFFIC_ULTRA_LOW 1 +#define TRAFFIC_NO_TP 0 +#define TRAFFIC_ULTRA_LOW 1 #define TRAFFIC_LOW 2 #define TRAFFIC_MID 3 #define TRAFFIC_HIGH 4 -#define NONE 0 +#define NONE 0 -#define MAX_2(_x_, _y_) (((_x_)>(_y_))? (_x_) : (_y_)) -#define MIN_2(_x_, _y_) (((_x_)<(_y_))? (_x_) : (_y_)) -#define DIFF_2(_x_,_y_) ((_x_ >= _y_) ? (_x_ - _y_) : (_y_ - _x_)) +#if defined(DM_ODM_CE_MAC80211) +#define MAX_2(x, y) \ + __max2(typeof(x), typeof(y), \ + x, y) +#define __max2(t1, t2, x, y) ({ \ + t1 m80211_max1 = (x); \ + t2 m80211_max2 = (y); \ + m80211_max1 > m80211_max2 ? m80211_max1 : m80211_max2; }) -#define BYTE_2_DWORD(B3, B2, B1, B0) ((B3 << 24) | (B2 << 16) | (B1 << 8) | B0) -#define BIT_2_BYTE(B3, B2, B1, B0) ((B3 << 3) | (B2 << 2) | (B1 << 1) | B0) +#define MIN_2(x, y) \ + __min2(typeof(x), typeof(y), \ + x, y) +#define __min2(t1, t2, x, y) ({ \ + t1 m80211_min1 = (x); \ + t2 m80211_min2 = (y); \ + m80211_min1 < m80211_min2 ? m80211_min1 : m80211_min2; }) -/*For cmn sta info*/ +#define DIFF_2(x, y) \ + __diff2(typeof(x), typeof(y), \ + x, y) +#define __diff2(t1, t2, x, y) ({ \ + t1 __d1 = (x); \ + t2 __d2 = (y); \ + (__d1 >= __d2) ? (__d1 - __d2) : (__d2 - __d1); }) +#else +#define MAX_2(_x_, _y_) (((_x_) > (_y_)) ? (_x_) : (_y_)) +#define MIN_2(_x_, _y_) (((_x_) < (_y_)) ? (_x_) : (_y_)) +#define DIFF_2(_x_, _y_) ((_x_ >= _y_) ? (_x_ - _y_) : (_y_ - _x_)) +#endif + +#define IS_GREATER(_x_, _y_) (((_x_) >= (_y_)) ? true : false) +#define IS_LESS(_x_, _y_) (((_x_) < (_y_)) ? true : false) + +#if defined(DM_ODM_CE_MAC80211) +#define BYTE_DUPLICATE_2_DWORD(B0) ({ \ + u32 __b_dup = (B0);\ + (((__b_dup) << 24) | ((__b_dup) << 16) | ((__b_dup) << 8) | (__b_dup));\ + }) +#else +#define BYTE_DUPLICATE_2_DWORD(B0) \ + (((B0) << 24) | ((B0) << 16) | ((B0) << 8) | (B0)) +#endif +#define BYTE_2_DWORD(B3, B2, B1, B0) \ + (((B3) << 24) | ((B2) << 16) | ((B1) << 8) | (B0)) +#define BIT_2_BYTE(B3, B2, B1, B0) \ + (((B3) << 3) | ((B2) << 2) | ((B1) << 1) | (B0)) + +/*@For cmn sta info*/ +#if defined(DM_ODM_CE_MAC80211) +#define is_sta_active(sta) ({ \ + struct cmn_sta_info *__sta = (sta); \ + ((__sta) && (__sta->dm_ctrl & STA_DM_CTRL_ACTIVE)); \ + }) + +#define IS_FUNC_EN(name) ({ \ + u8 *__is_func_name = (name); \ + (__is_func_name) && (*__is_func_name); \ + }) +#else #define is_sta_active(sta) ((sta) && (sta->dm_ctrl & STA_DM_CTRL_ACTIVE)) #define IS_FUNC_EN(name) ((name) && (*name)) +#endif #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #define PHYDM_WATCH_DOG_PERIOD 1 /*second*/ @@ -107,123 +196,171 @@ extern const u16 phy_rate_table[28]; #define PHYDM_WATCH_DOG_PERIOD 2 /*second*/ #endif -/*============================================================*/ -/*structure and define*/ -/*============================================================*/ +#define PHY_HIST_SIZE 12 -#define dm_type_by_fw 0 -#define dm_type_by_driver 1 +/*@============================================================*/ +/*structure and define*/ +/*@============================================================*/ + +#define dm_type_by_fw 0 +#define dm_type_by_driver 1 + +#ifdef BB_RAM_SUPPORT + +struct phydm_bb_ram_per_sta { + /* @Reg0x1E84 for RAM I/O*/ + boolean hw_igi_en; + boolean tx_pwr_offset0_en; + boolean tx_pwr_offset1_en; + /* @ macid from 0 to 63, above 63 => mapping to 63*/ + u8 macid_addr; + /* @hw_igi value for paths after packet Tx in a period of time*/ + u8 hw_igi; + /* @tx_pwr_offset0 offset for Tx power index*/ + s8 tx_pwr_offset0; + s8 tx_pwr_offset1; + +}; + +struct phydm_bb_ram_ctrl { + /*@ For 98F/14B/22C/12F, each TxAGC step will be 0.25dB*/ + struct phydm_bb_ram_per_sta pram_sta_ctrl[ODM_ASSOCIATE_ENTRY_NUM]; + /*------------ For table2 do not set power offset by macid --------*/ + /* For type == 2'b10, 0x1e70[22:16] = tx_pwr_offset_reg0, 0x1e70[23] = enable */ + boolean tx_pwr_offset_reg0_en; + u8 tx_pwr_offset_reg0; + /* For type == 2'b11, 0x1e70[30:24] = tx_pwr_offset_reg1, 0x1e70[31] = enable */ + boolean tx_pwr_offset_reg1_en; + u8 tx_pwr_offset_reg1; +}; + +#endif struct phydm_phystatus_statistic { - - /*[CCK]*/ - u32 rssi_cck_sum; - u32 rssi_cck_cnt; - /*[OFDM]*/ - u32 rssi_ofdm_sum; - u32 rssi_ofdm_cnt; - u32 evm_ofdm_sum; - u32 snr_ofdm_sum; - /*[1SS]*/ - u32 rssi_1ss_cnt; - u32 rssi_1ss_sum; - u32 evm_1ss_sum; - u32 snr_1ss_sum; - /*[2SS]*/ + /*@[CCK]*/ + u32 rssi_cck_sum; + u32 rssi_cck_cnt; + u32 rssi_beacon_sum; + u32 rssi_beacon_cnt; + /*@[OFDM]*/ + u32 rssi_ofdm_sum[RF_PATH_MEM_SIZE]; + u32 rssi_ofdm_cnt; + u32 evm_ofdm_sum; + u32 snr_ofdm_sum[RF_PATH_MEM_SIZE]; + u16 evm_ofdm_hist[PHY_HIST_SIZE]; + u16 snr_ofdm_hist[PHY_HIST_SIZE]; + /*@[1SS]*/ + u32 rssi_1ss_cnt; + u32 rssi_1ss_sum[RF_PATH_MEM_SIZE]; + u32 evm_1ss_sum; + u32 snr_1ss_sum[RF_PATH_MEM_SIZE]; + u16 evm_1ss_hist[PHY_HIST_SIZE]; + u16 snr_1ss_hist[PHY_HIST_SIZE]; + /*@[2SS]*/ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) - u32 rssi_2ss_cnt; - u32 rssi_2ss_sum[2]; - u32 evm_2ss_sum[2]; - u32 snr_2ss_sum[2]; + u32 rssi_2ss_cnt; + u32 rssi_2ss_sum[RF_PATH_MEM_SIZE]; + u32 evm_2ss_sum[2]; + u32 snr_2ss_sum[RF_PATH_MEM_SIZE]; + u16 evm_2ss_hist[2][PHY_HIST_SIZE]; + u16 snr_2ss_hist[2][PHY_HIST_SIZE]; #endif - /*[3SS]*/ + /*@[3SS]*/ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) - u32 rssi_3ss_cnt; - u32 rssi_3ss_sum[3]; - u32 evm_3ss_sum[3]; - u32 snr_3ss_sum[3]; + u32 rssi_3ss_cnt; + u32 rssi_3ss_sum[RF_PATH_MEM_SIZE]; + u32 evm_3ss_sum[3]; + u32 snr_3ss_sum[RF_PATH_MEM_SIZE]; + u16 evm_3ss_hist[3][PHY_HIST_SIZE]; + u16 snr_3ss_hist[3][PHY_HIST_SIZE]; #endif - /*[4SS]*/ + /*@[4SS]*/ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) - u32 rssi_4ss_cnt; - u32 rssi_4ss_sum[4]; - u32 evm_4ss_sum[4]; - u32 snr_4ss_sum[4]; + u32 rssi_4ss_cnt; + u32 rssi_4ss_sum[RF_PATH_MEM_SIZE]; + u32 evm_4ss_sum[4]; + u32 snr_4ss_sum[RF_PATH_MEM_SIZE]; + u16 evm_4ss_hist[4][PHY_HIST_SIZE]; + u16 snr_4ss_hist[4][PHY_HIST_SIZE]; #endif }; struct phydm_phystatus_avg { - - /*[CCK]*/ - u8 rssi_cck_avg; - /*[OFDM]*/ - u8 rssi_ofdm_avg; - u8 evm_ofdm_avg; - u8 snr_ofdm_avg; - /*[1SS]*/ - u8 rssi_1ss_avg; - u8 evm_1ss_avg; - u8 snr_1ss_avg; - /*[2SS]*/ + /*@[CCK]*/ + u8 rssi_cck_avg; + u8 rssi_beacon_avg; + /*@[OFDM]*/ + u8 rssi_ofdm_avg[RF_PATH_MEM_SIZE]; + u8 evm_ofdm_avg; + u8 snr_ofdm_avg[RF_PATH_MEM_SIZE]; + /*@[1SS]*/ + u8 rssi_1ss_avg[RF_PATH_MEM_SIZE]; + u8 evm_1ss_avg; + u8 snr_1ss_avg[RF_PATH_MEM_SIZE]; + /*@[2SS]*/ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) - u8 rssi_2ss_avg[2]; - u8 evm_2ss_avg[2]; - u8 snr_2ss_avg[2]; + u8 rssi_2ss_avg[RF_PATH_MEM_SIZE]; + u8 evm_2ss_avg[2]; + u8 snr_2ss_avg[RF_PATH_MEM_SIZE]; #endif - /*[3SS]*/ + /*@[3SS]*/ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) - u8 rssi_3ss_avg[3]; - u8 evm_3ss_avg[3]; - u8 snr_3ss_avg[3]; + u8 rssi_3ss_avg[RF_PATH_MEM_SIZE]; + u8 evm_3ss_avg[3]; + u8 snr_3ss_avg[RF_PATH_MEM_SIZE]; #endif - /*[4SS]*/ + /*@[4SS]*/ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) - u8 rssi_4ss_avg[4]; - u8 evm_4ss_avg[4]; - u8 snr_4ss_avg[4]; + u8 rssi_4ss_avg[RF_PATH_MEM_SIZE]; + u8 evm_4ss_avg[4]; + u8 snr_4ss_avg[RF_PATH_MEM_SIZE]; #endif }; struct odm_phy_dbg_info { - /*ODM Write,debug info*/ - - u32 num_qry_phy_status_cck; - u32 num_qry_phy_status_ofdm; -#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) - u32 num_qry_mu_pkt; - u32 num_qry_bf_pkt; - u32 num_qry_mu_vht_pkt[VHT_RATE_NUM]; - boolean is_ldpc_pkt; - boolean is_stbc_pkt; - u8 num_of_ppdu[4]; - u8 gid_num[4]; + /*@ODM Write,debug info*/ + u32 num_qry_phy_status_cck; + u32 num_qry_phy_status_ofdm; +#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) || (defined(PHYSTS_3RD_TYPE_SUPPORT)) + u32 num_qry_mu_pkt; + u32 num_qry_bf_pkt; + u16 num_mu_vht_pkt[VHT_RATE_NUM]; + boolean is_ldpc_pkt; + boolean is_stbc_pkt; + u8 num_of_ppdu[4]; + u8 gid_num[4]; #endif - u8 num_qry_beacon_pkt; - u8 show_phy_sts_all_pkt; /*Show phy status witch not match BSSID*/ - u16 show_phy_sts_max_cnt; /*show number of phy-status row data per PHYDM watchdog*/ - u16 show_phy_sts_cnt; - /* Others */ - /*s32 rx_evm[4];*/ - /*s8 rx_snr_db[4];*/ - - u16 num_qry_legacy_pkt[LEGACY_RATE_NUM]; - u16 num_qry_ht_pkt[HT_RATE_NUM]; - u16 num_qry_pkt_sc_20m[LOW_BW_RATE_NUM]; /*for 20M SC*/ - boolean ht_pkt_not_zero; - boolean low_bw_20_occur; - #if ODM_IC_11AC_SERIES_SUPPORT - u16 num_qry_vht_pkt[VHT_RATE_NUM]; - u16 num_qry_pkt_sc_40m[LOW_BW_RATE_NUM]; /*for 40M SC*/ - boolean vht_pkt_not_zero; - boolean low_bw_40_occur; + u32 condi_num; /*@condition number U(18,4)*/ + u8 condi_num_cdf[CN_CNT_MAX]; + u8 num_qry_beacon_pkt; + u8 beacon_cnt_in_period; /*@beacon cnt within watchdog period*/ + u8 beacon_phy_rate; + u8 show_phy_sts_all_pkt; /*@Show phy status witch not match BSSID*/ + u16 show_phy_sts_max_cnt; /*@show number of phy-status row data per PHYDM watchdog*/ + u16 show_phy_sts_cnt; + u16 num_qry_legacy_pkt[LEGACY_RATE_NUM]; + u16 num_qry_ht_pkt[HT_RATE_NUM]; + u16 num_qry_pkt_sc_20m[LOW_BW_RATE_NUM]; /*@20M SC*/ + boolean ht_pkt_not_zero; + boolean low_bw_20_occur; + #if ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT) + u16 num_qry_vht_pkt[VHT_RATE_NUM]; + u16 num_qry_pkt_sc_40m[LOW_BW_RATE_NUM]; /*@40M SC*/ + boolean vht_pkt_not_zero; + boolean low_bw_40_occur; #endif - struct phydm_phystatus_statistic phystatus_statistic_info; + u16 snr_hist_th[PHY_HIST_SIZE - 1]; + u16 evm_hist_th[PHY_HIST_SIZE - 1]; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + s16 cfo_tail[4]; /* per-path's cfo_tail */ + #endif + struct phydm_phystatus_statistic physts_statistic_info; struct phydm_phystatus_avg phystatus_statistic_avg; }; enum odm_cmninfo { - /*Fixed value*/ - /*-----------HOOK BEFORE REG INIT-----------*/ + /*@Fixed value*/ + /*@-----------HOOK BEFORE REG INIT-----------*/ ODM_CMNINFO_PLATFORM = 0, ODM_CMNINFO_ABILITY, ODM_CMNINFO_INTERFACE, @@ -231,6 +368,8 @@ enum odm_cmninfo { ODM_CMNINFO_IC_TYPE, ODM_CMNINFO_CUT_VER, ODM_CMNINFO_FAB_VER, + ODM_CMNINFO_FW_VER, + ODM_CMNINFO_FW_SUB_VER, ODM_CMNINFO_RF_TYPE, ODM_CMNINFO_RFE_TYPE, ODM_CMNINFO_DPK_EN, @@ -244,6 +383,7 @@ enum odm_cmninfo { ODM_CMNINFO_APA, ODM_CMNINFO_GLNA, ODM_CMNINFO_ALNA, + ODM_CMNINFO_TDMA, ODM_CMNINFO_EXT_TRSW, ODM_CMNINFO_EXT_LNA_GAIN, ODM_CMNINFO_PATCH_ID, @@ -251,8 +391,6 @@ enum odm_cmninfo { ODM_CMNINFO_BWIFI_TEST, ODM_CMNINFO_SMART_CONCURRENT, ODM_CMNINFO_CONFIG_BB_RF, - ODM_CMNINFO_DOMAIN_CODE_2G, - ODM_CMNINFO_DOMAIN_CODE_5G, ODM_CMNINFO_IQKPAOFF, ODM_CMNINFO_HUBUSBMODE, ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS, @@ -262,16 +400,19 @@ enum odm_cmninfo { ODM_CMNINFO_REGRFKFREEENABLE, ODM_CMNINFO_RFKFREEENABLE, ODM_CMNINFO_NORMAL_RX_PATH_CHANGE, + ODM_CMNINFO_VALID_PATH_SET, ODM_CMNINFO_EFUSE0X3D8, ODM_CMNINFO_EFUSE0X3D7, ODM_CMNINFO_SOFT_AP_SPECIAL_SETTING, + ODM_CMNINFO_X_CAP_SETTING, ODM_CMNINFO_ADVANCE_OTA, ODM_CMNINFO_HP_HWID, - /*-----------HOOK BEFORE REG INIT-----------*/ + ODM_CMNINFO_DIS_DPD, + /*@-----------HOOK BEFORE REG INIT-----------*/ - /*Dynamic value:*/ + /*@Dynamic value:*/ - /*--------- POINTER REFERENCE-----------*/ + /*@--------- POINTER REFERENCE-----------*/ ODM_CMNINFO_TX_UNI, ODM_CMNINFO_RX_UNI, ODM_CMNINFO_BAND, @@ -281,6 +422,7 @@ enum odm_cmninfo { ODM_CMNINFO_CHNL, ODM_CMNINFO_FORCED_RATE, ODM_CMNINFO_ANT_DIV, + ODM_CMNINFO_PATH_DIV, ODM_CMNINFO_ADAPTIVE_SOML, ODM_CMNINFO_ADAPTIVITY, ODM_CMNINFO_SCAN, @@ -303,9 +445,10 @@ enum odm_cmninfo { ODM_CMNINFO_INTERRUPT_MASK, ODM_CMNINFO_BB_OPERATION_MODE, ODM_CMNINFO_BF_ANTDIV_DECISION, - /*--------- POINTER REFERENCE-----------*/ + ODM_CMNINFO_MANUAL_SUPPORTABILITY, + /*@--------- POINTER REFERENCE-----------*/ - /*------------CALL BY VALUE-------------*/ + /*@------------CALL BY VALUE-------------*/ ODM_CMNINFO_WIFI_DIRECT, ODM_CMNINFO_WIFI_DISPLAY, ODM_CMNINFO_LINK_IN_PROGRESS, @@ -315,7 +458,6 @@ enum odm_cmninfo { ODM_CMNINFO_RSSI_MIN, ODM_CMNINFO_RSSI_MIN_BY_PATH, ODM_CMNINFO_DBG_COMP, - ODM_CMNINFO_DBG_LEVEL, ODM_CMNINFO_RA_THRESHOLD_HIGH, /*to be removed*/ ODM_CMNINFO_RA_THRESHOLD_LOW, /*to be removed*/ ODM_CMNINFO_RF_ANTENNA_TYPE, @@ -330,31 +472,34 @@ enum odm_cmninfo { ODM_CMNINFO_POWER_TRAINING, ODM_CMNINFO_DFS_REGION_DOMAIN, ODM_CMNINFO_BT_CONTINUOUS_TURN, - /*------------CALL BY VALUE-------------*/ + ODM_CMNINFO_IS_DOWNLOAD_FW, + ODM_CMNINFO_PHYDM_PATCH_ID, + ODM_CMNINFO_RRSR_VAL, + /*@------------CALL BY VALUE-------------*/ - /*Dynamic ptr array hook itms.*/ + /*@Dynamic ptr array hook itms.*/ ODM_CMNINFO_STA_STATUS, ODM_CMNINFO_MAX, }; enum phydm_rfe_bb_source_sel { - PAPE_2G = 0, - PAPE_5G = 1, - LNA0N_2G = 2, - LNAON_5G = 3, - TRSW = 4, - TRSW_B = 5, - GNT_BT = 6, - ZERO = 7, - ANTSEL_0 = 8, - ANTSEL_1 = 9, - ANTSEL_2 = 0xa, - ANTSEL_3 = 0xb, - ANTSEL_4 = 0xc, - ANTSEL_5 = 0xd, - ANTSEL_6 = 0xe, - ANTSEL_7 = 0xf + PAPE_2G = 0, + PAPE_5G = 1, + LNA0N_2G = 2, + LNAON_5G = 3, + TRSW = 4, + TRSW_B = 5, + GNT_BT = 6, + ZERO = 7, + ANTSEL_0 = 8, + ANTSEL_1 = 9, + ANTSEL_2 = 0xa, + ANTSEL_3 = 0xb, + ANTSEL_4 = 0xc, + ANTSEL_5 = 0xd, + ANTSEL_6 = 0xe, + ANTSEL_7 = 0xf }; enum phydm_info_query { @@ -386,23 +531,22 @@ enum phydm_info_query { }; enum phydm_api { - PHYDM_API_NBI = 1, - PHYDM_API_CSI_MASK, - + PHYDM_API_NBI = 1, + PHYDM_API_CSI_MASK = 2, }; -enum phydm_func_idx { /*F_XXX = PHYDM XXX function*/ +enum phydm_func_idx { /*@F_XXX = PHYDM XXX function*/ F00_DIG = 0, F01_RA_MASK = 1, F02_DYN_TXPWR = 2, - F03_FA_CNT = 3, + F03_FA_CNT = 3, F04_RSSI_MNTR = 4, - F05_CCK_PD = 5, + F05_CCK_PD = 5, F06_ANT_DIV = 6, F07_SMT_ANT = 7, F08_PWR_TRAIN = 8, - F09_RA = 9, + F09_RA = 9, F10_PATH_DIV = 10, F11_DFS = 11, F12_DYN_ARFR = 12, @@ -410,76 +554,74 @@ enum phydm_func_idx { /*F_XXX = PHYDM XXX function*/ F14_CFO_TRK = 14, F15_ENV_MNTR = 15, F16_PRI_CCA = 16, - F17_ADPTV_SOML = 17, - F18_LNA_SAT_CHK = 18, - F19_DYN_RX_PATH = 19 + F17_ADPTV_SOML = 17, + F18_LNA_SAT_CHK = 18, }; -/*=[PHYDM supportability]==========================================*/ +/*@=[PHYDM supportability]==========================================*/ enum odm_ability { - ODM_BB_DIG = BIT(F00_DIG), - ODM_BB_RA_MASK = BIT(F01_RA_MASK), + ODM_BB_DIG = BIT(F00_DIG), + ODM_BB_RA_MASK = BIT(F01_RA_MASK), ODM_BB_DYNAMIC_TXPWR = BIT(F02_DYN_TXPWR), - ODM_BB_FA_CNT = BIT(F03_FA_CNT), - ODM_BB_RSSI_MONITOR = BIT(F04_RSSI_MNTR), - ODM_BB_CCK_PD = BIT(F05_CCK_PD), - ODM_BB_ANT_DIV = BIT(F06_ANT_DIV), - ODM_BB_SMT_ANT = BIT(F07_SMT_ANT), - ODM_BB_PWR_TRAIN = BIT(F08_PWR_TRAIN), - ODM_BB_RATE_ADAPTIVE = BIT(F09_RA), - ODM_BB_PATH_DIV = BIT(F10_PATH_DIV), - ODM_BB_DFS = BIT(F11_DFS), - ODM_BB_DYNAMIC_ARFR = BIT(F12_DYN_ARFR), - ODM_BB_ADAPTIVITY = BIT(F13_ADPTVTY), - ODM_BB_CFO_TRACKING = BIT(F14_CFO_TRK), - ODM_BB_ENV_MONITOR = BIT(F15_ENV_MNTR), - ODM_BB_PRIMARY_CCA = BIT(F16_PRI_CCA), - ODM_BB_ADAPTIVE_SOML = BIT(F17_ADPTV_SOML), - ODM_BB_LNA_SAT_CHK = BIT(F18_LNA_SAT_CHK), - ODM_BB_DYNAMIC_RX_PATH = BIT(F19_DYN_RX_PATH) + ODM_BB_FA_CNT = BIT(F03_FA_CNT), + ODM_BB_RSSI_MONITOR = BIT(F04_RSSI_MNTR), + ODM_BB_CCK_PD = BIT(F05_CCK_PD), + ODM_BB_ANT_DIV = BIT(F06_ANT_DIV), + ODM_BB_SMT_ANT = BIT(F07_SMT_ANT), + ODM_BB_PWR_TRAIN = BIT(F08_PWR_TRAIN), + ODM_BB_RATE_ADAPTIVE = BIT(F09_RA), + ODM_BB_PATH_DIV = BIT(F10_PATH_DIV), + ODM_BB_DFS = BIT(F11_DFS), + ODM_BB_DYNAMIC_ARFR = BIT(F12_DYN_ARFR), + ODM_BB_ADAPTIVITY = BIT(F13_ADPTVTY), + ODM_BB_CFO_TRACKING = BIT(F14_CFO_TRK), + ODM_BB_ENV_MONITOR = BIT(F15_ENV_MNTR), + ODM_BB_PRIMARY_CCA = BIT(F16_PRI_CCA), + ODM_BB_ADAPTIVE_SOML = BIT(F17_ADPTV_SOML), + ODM_BB_LNA_SAT_CHK = BIT(F18_LNA_SAT_CHK), }; -/*=[PHYDM Debug Component]=====================================*/ +/*@=[PHYDM Debug Component]=====================================*/ enum phydm_dbg_comp { - /*BB Driver Functions*/ + /*@BB Driver Functions*/ DBG_DIG = BIT(F00_DIG), DBG_RA_MASK = BIT(F01_RA_MASK), - DBG_DYN_TXPWR = BIT(F02_DYN_TXPWR), + DBG_DYN_TXPWR = BIT(F02_DYN_TXPWR), DBG_FA_CNT = BIT(F03_FA_CNT), DBG_RSSI_MNTR = BIT(F04_RSSI_MNTR), - DBG_CCKPD = BIT(F05_CCK_PD), + DBG_CCKPD = BIT(F05_CCK_PD), DBG_ANT_DIV = BIT(F06_ANT_DIV), DBG_SMT_ANT = BIT(F07_SMT_ANT), DBG_PWR_TRAIN = BIT(F08_PWR_TRAIN), - DBG_RA = BIT(F09_RA), + DBG_RA = BIT(F09_RA), DBG_PATH_DIV = BIT(F10_PATH_DIV), DBG_DFS = BIT(F11_DFS), DBG_DYN_ARFR = BIT(F12_DYN_ARFR), DBG_ADPTVTY = BIT(F13_ADPTVTY), - DBG_CFO_TRK = BIT(F14_CFO_TRK), + DBG_CFO_TRK = BIT(F14_CFO_TRK), DBG_ENV_MNTR = BIT(F15_ENV_MNTR), DBG_PRI_CCA = BIT(F16_PRI_CCA), - DBG_ADPTV_SOML = BIT(F17_ADPTV_SOML), - DBG_LNA_SAT_CHK = BIT(F18_LNA_SAT_CHK), - DBG_DYN_RX_PATH = BIT(F19_DYN_RX_PATH), + DBG_ADPTV_SOML = BIT(F17_ADPTV_SOML), + DBG_LNA_SAT_CHK = BIT(F18_LNA_SAT_CHK), + /*BIT(19)*/ /*Neet to re-arrange*/ - DBG_PHY_STATUS = BIT(20), + DBG_PHY_STATUS = BIT(20), DBG_TMP = BIT(21), DBG_FW_TRACE = BIT(22), - DBG_TXBF = BIT(23), - DBG_COMMON_FLOW = BIT(24), - ODM_COMP_TX_PWR_TRACK = BIT(25), - ODM_COMP_CALIBRATION = BIT(26), - ODM_COMP_MP = BIT(27), - ODM_PHY_CONFIG = BIT(28), + DBG_TXBF = BIT(23), + DBG_COMMON_FLOW = BIT(24), + DBG_COMP_MCC = BIT(25), + /*BIT(26)*/ + DBG_DM_SUMMARY = BIT(27), + ODM_PHY_CONFIG = BIT(28), ODM_COMP_INIT = BIT(29), - ODM_COMP_COMMON = BIT(30), + DBG_CMN = BIT(30),/*@common*/ ODM_COMP_API = BIT(31) }; -/*=========================================================*/ +/*@=========================================================*/ -/*ODM_CMNINFO_ONE_PATH_CCA*/ +/*@ODM_CMNINFO_ONE_PATH_CCA*/ enum odm_cca_path { ODM_CCA_2R = 0, ODM_CCA_1R_A = 1, @@ -487,97 +629,135 @@ enum odm_cca_path { }; enum phy_reg_pg_type { - PHY_REG_PG_RELATIVE_VALUE = 0, - PHY_REG_PG_EXACT_VALUE = 1 + PHY_REG_PG_RELATIVE_VALUE = 0, + PHY_REG_PG_EXACT_VALUE = 1 }; enum phydm_offload_ability { PHYDM_PHY_PARAM_OFFLOAD = BIT(0), - PHYDM_RF_IQK_OFFLOAD = BIT(1), + PHYDM_RF_IQK_OFFLOAD = BIT(1), }; struct phydm_pause_lv { - s8 lv_dig; - s8 lv_cckpd; - s8 lv_antdiv; - s8 lv_adapt; + s8 lv_dig; + s8 lv_cckpd; + s8 lv_antdiv; + s8 lv_adapt; + s8 lv_adsl; }; struct phydm_func_poiner { - void (*pause_phydm_handler)(void *dm_void, u32 *val_buf, u8 val_len); + void (*pause_phydm_handler)(void *dm_void, u32 *val_buf, u8 val_len); }; struct pkt_process_info { - u8 phystatus_smp_mode_en; /*send phystatus every sampling time*/ - u8 pre_ppdu_cnt; - u8 lna_idx; - u8 vga_idx; + u8 phystatus_smp_mode_en; /*@send phystatus every sampling time*/ + u8 pre_ppdu_cnt; + u8 lna_idx; + u8 vga_idx; }; #ifdef ODM_CONFIG_BT_COEXIST struct phydm_bt_info { - boolean is_bt_enabled; /*BT is enabled*/ - boolean is_bt_connect_process; /*BT HS is under connection progress.*/ - u8 bt_hs_rssi; /*BT HS mode wifi rssi value.*/ - boolean is_bt_hs_operation; /*BT HS mode is under progress*/ - boolean is_bt_limited_dig; /*BT is busy.*/ + boolean is_bt_enabled; /*@BT is enabled*/ + boolean is_bt_connect_process; /*@BT HS is under connection progress.*/ + u8 bt_hs_rssi; /*@BT HS mode wifi rssi value.*/ + boolean is_bt_hs_operation; /*@BT HS mode is under progress*/ + boolean is_bt_limited_dig; /*@BT is busy.*/ }; #endif struct phydm_iot_center { - boolean is_linked_cmw500; - u8 win_patch_id; /*Customer ID*/ + boolean is_linked_cmw500; + u8 win_patch_id; /*@Customer ID*/ u32 phydm_patch_id; }; +#if (RTL8822B_SUPPORT) +struct drp_rtl8822b_struct { + enum bb_path path_judge; + u16 path_a_cck_fa; + u16 path_b_cck_fa; +}; +#endif + +#ifdef CONFIG_MCC_DM +#define MCC_DM_REG_NUM 32 +struct _phydm_mcc_dm_ { + u8 mcc_pre_status; + u8 mcc_reg_id[MCC_DM_REG_NUM]; + u16 mcc_dm_reg[MCC_DM_REG_NUM]; + u8 mcc_dm_val[MCC_DM_REG_NUM][2]; + /*mcc DIG*/ + u8 mcc_rssi[2]; + /*u8 mcc_igi[2];*/ + + /* need to be config by driver*/ + u8 mcc_status; + u8 sta_macid[2][NUM_STA]; + u16 mcc_rf_ch[2]; + +}; +#endif + +#if (RTL8822C_SUPPORT || RTL8812F_SUPPORT) +struct phydm_physts { + u8 cck_gi_u_bnd; + u8 cck_gi_l_bnd; +}; +#endif + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) #if (RT_PLATFORM != PLATFORM_LINUX) typedef #endif - struct dm_struct +struct dm_struct { #else/*for AP, CE Team*/ - struct dm_struct +struct dm_struct { #endif -{ - /*Add for different team use temporarily*/ - void *adapter; /*For CE/NIC team*/ - struct rtl8192cd_priv *priv; /*For AP team*/ - /*WHen you use adapter or priv pointer, you must make sure the pointer is ready.*/ - boolean odm_ready; + /*@Add for different team use temporarily*/ + void *adapter; /*@For CE/NIC team*/ + struct rtl8192cd_priv *priv; /*@For AP team*/ + boolean odm_ready; enum phy_reg_pg_type phy_reg_pg_value_type; u8 phy_reg_pg_version; - u64 support_ability; /*PHYDM function Supportability*/ - u64 pause_ability; /*PHYDM function pause Supportability*/ + u64 support_ability; /*@PHYDM function Supportability*/ + u64 pause_ability; /*@PHYDM function pause Supportability*/ u64 debug_components; u8 cmn_dbg_msg_period; u8 cmn_dbg_msg_cnt; u32 fw_debug_components; - u32 debug_level; - u32 num_qry_phy_status_all; /*CCK + OFDM*/ + u32 num_qry_phy_status_all; /*@CCK + OFDM*/ u32 last_num_qry_phy_status_all; u32 rx_pwdb_ave; - boolean is_init_hw_info_by_rfe; + boolean is_init_hw_info_by_rfe; - /*------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------*/ - boolean is_cck_high_power; + /*@------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------*/ + boolean is_cck_high_power; u8 rf_path_rx_enable; - /*------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------*/ + /*@------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------*/ - /* COMMON INFORMATION */ + /* @COMMON INFORMATION */ - /*Init value*/ - /*-----------HOOK BEFORE REG INIT-----------*/ + /*@Init value*/ + /*@-----------HOOK BEFORE REG INIT-----------*/ - u8 support_platform;/*PHYDM Platform info WIN/AP/CE = 1/2/3 */ - u8 normal_rx_path; - boolean brxagcswitch; /* for rx AGC table switch in Microsoft case */ - u8 support_interface;/*PHYDM PCIE/USB/SDIO = 1/2/3*/ - u32 support_ic_type; /*PHYDM supported IC*/ - u8 cut_version; /*cut version TestChip/A-cut/B-cut... = 0/1/2/3/...*/ - u8 fab_version; /*Fab version TSMC/UMC = 0/1*/ - u8 rf_type; /*RF type 4T4R/3T3R/2T2R/1T2R/1T1R/...*/ + u8 support_platform; /*@PHYDM Platform info WIN/AP/CE = 1/2/3 */ + u8 normal_rx_path; + u8 valid_path_set; /*@use for single rx path only*/ + boolean brxagcswitch; /* @for rx AGC table switch in Microsoft case */ + u8 support_interface; /*@PHYDM PCIE/USB/SDIO = 1/2/3*/ + u32 support_ic_type; /*@PHYDM supported IC*/ + enum phydm_api_host run_in_drv_fw; /*@PHYDM API is using in FW or Driver*/ + u8 ic_ip_series; /*N/AC/JGR3*/ + enum phydm_phy_sts_type ic_phy_sts_type; /*@Type1/type2/type3*/ + u8 cut_version; /*@cut version TestChip/A-cut/B-cut... = 0/1/2/3/...*/ + u8 fab_version; /*@Fab version TSMC/UMC = 0/1*/ + u8 fw_version; + u8 fw_sub_version; + u8 rf_type; /*@RF type 4T4R/3T3R/2T2R/1T2R/1T1R/...*/ u8 rfe_type; u8 board_type; u8 package_type; @@ -585,65 +765,75 @@ struct phydm_iot_center { u16 type_gpa; u16 type_alna; u16 type_apa; - u8 ext_lna; /*with 2G external LNA NO/Yes = 0/1*/ - u8 ext_lna_5g; /*with 5G external LNA NO/Yes = 0/1*/ - u8 ext_pa; /*with 2G external PNA NO/Yes = 0/1*/ - u8 ext_pa_5g; /*with 5G external PNA NO/Yes = 0/1*/ - u8 efuse0x3d7; /*with Efuse number*/ - u8 efuse0x3d8; - u8 ext_trsw; /*with external TRSW NO/Yes = 0/1*/ - u8 ext_lna_gain; /*gain of external lna*/ - boolean is_in_hct_test; + u8 ext_lna; /*@with 2G external LNA NO/Yes = 0/1*/ + u8 ext_lna_5g; /*@with 5G external LNA NO/Yes = 0/1*/ + u8 ext_pa; /*@with 2G external PNA NO/Yes = 0/1*/ + u8 ext_pa_5g; /*@with 5G external PNA NO/Yes = 0/1*/ + u8 efuse0x3d7; /*@with Efuse number*/ + u8 efuse0x3d8; + u8 ext_trsw; /*@with external TRSW NO/Yes = 0/1*/ + u8 ext_lna_gain; /*@gain of external lna*/ + boolean is_in_hct_test; u8 wifi_test; - boolean is_dual_mac_smart_concurrent; - u32 bk_support_ability; /*SD4 only*/ + boolean is_dual_mac_smart_concurrent; + u32 bk_support_ability; /*SD4 only*/ u8 with_extenal_ant_switch; - /*cck agc relative*/ - boolean cck_new_agc; + /*@cck agc relative*/ + boolean cck_new_agc; s8 cck_lna_gain_table[8]; - /*-------------------------------------*/ + /*@-------------------------------------*/ u32 phydm_sys_up_time; - u8 num_rf_path; /*ex: 8821C=1, 8192E=2, 8814B=4*/ + u8 num_rf_path; /*@ex: 8821C=1, 8192E=2, 8814B=4*/ u32 soft_ap_special_setting; + boolean boolean_dummy; s8 s8_dummy; u8 u8_dummy; u16 u16_dummy; u32 u32_dummy; u8 rfe_hwsetting_band; u8 p_advance_ota; - boolean hp_hw_id; - boolean BOOLEAN_temp; - boolean is_dfs_band; - u8 is_receiver_blocking_en; + boolean hp_hw_id; + boolean BOOLEAN_temp; + boolean is_dfs_band; + u8 is_rx_blocking_en; u16 fw_offload_ability; -/*-----------HOOK BEFORE REG INIT-----------*/ -/*===========================================================*/ -/*====[ CALL BY Reference ]=========================================*/ -/*===========================================================*/ + boolean is_download_fw; + boolean en_dis_dpd; + u16 dis_dpd_rate; + #if (RTL8822C_SUPPORT) + u8 txagc_buff[2][NUM_RATE_AC_2SS]; + u32 bp_0x9b0; + #endif +/*@-----------HOOK BEFORE REG INIT-----------*/ +/*@===========================================================*/ +/*@====[ CALL BY Reference ]=========================================*/ +/*@===========================================================*/ - u64 *num_tx_bytes_unicast; /*TX Unicast byte count*/ - u64 *num_rx_bytes_unicast; /*RX Unicast byte count*/ - u8 *band_type; /*Frequence band 2.4G/5G = 0/1*/ - u8 *sec_ch_offset; /*Secondary channel offset don't_care/below/above = 0/1/2*/ - u8 *security; /*security mode Open/WEP/AES/TKIP = 0/1/2/3*/ - u8 *band_width; /*BW info 20M/40M/80M = 0/1/2*/ - u8 *channel; /*central channel number*/ - boolean *is_scan_in_process; /*Common info for status*/ - boolean *is_power_saving; - u8 *one_path_cca; /*CCA path 2-path/path-A/path-B = 0/1/2; using enum odm_cca_path.*/ + u64 *num_tx_bytes_unicast; /*@TX Unicast byte cnt*/ + u64 *num_rx_bytes_unicast; /*@RX Unicast byte cnt*/ + u8 *band_type; /*@2.4G/5G = 0/1*/ + u8 *sec_ch_offset; /*@Secondary channel offset don't_care/below/above = 0/1/2*/ + u8 *security; /*@security mode Open/WEP/AES/TKIP = 0/1/2/3*/ + u8 *band_width; /*@20M/40M/80M = 0/1/2*/ + u8 *channel; /*@central CH number*/ + boolean *is_scan_in_process; + boolean *is_power_saving; + boolean *is_tdma; + u8 *one_path_cca; /*@CCA path 2-path/path-A/path-B = 0/1/2; using enum odm_cca_path.*/ u8 *antenna_test; - boolean *is_net_closed; - boolean *is_fcs_mode_enable; - /*--------- For 8723B IQK-------------------------------------*/ - boolean *is_1_antenna; - u8 *rf_default_path; /* 0:S1, 1:S0 */ - /*-----------------------------------------------------------*/ + boolean *is_net_closed; + boolean *is_fcs_mode_enable; /*@fast channel switch (= MCC mode)*/ + /*@--------- For 8723B IQK-------------------------------------*/ + boolean *is_1_antenna; + u8 *rf_default_path; /* @0:S1, 1:S0 */ + /*@-----------------------------------------------------------*/ u16 *forced_data_rate; u8 *enable_antdiv; + u8 *enable_pathdiv; u8 *en_adap_soml; u8 *enable_adaptivity; - u8 *hub_usb_mode; /*1: USB 2.0, 2: USB 3.0*/ + u8 *hub_usb_mode; /*@1:USB2.0, 2:USB3.0*/ boolean *is_fw_dw_rsvd_page_in_progress; u32 *current_tx_tp; u32 *current_rx_tp; @@ -652,22 +842,28 @@ struct phydm_iot_center { u8 *mp_mode; u32 *interrupt_mask; u8 *bb_op_mode; -/*===========================================================*/ -/*====[ CALL BY VALUE ]===========================================*/ -/*===========================================================*/ + u32 *manual_supportability; +/*@===========================================================*/ +/*@====[ CALL BY VALUE ]===========================================*/ +/*@===========================================================*/ u8 disable_phydm_watchdog; - boolean is_link_in_process; - boolean is_wifi_direct; - boolean is_wifi_display; - boolean is_linked; - boolean bsta_state; + boolean is_link_in_process; + boolean is_wifi_direct; + boolean is_wifi_display; + boolean is_linked; + boolean pre_is_linked; + boolean first_connect; + boolean first_disconnect; + boolean bsta_state; u8 rssi_min; + u8 rssi_min_macid; u8 pre_rssi_min; u8 rssi_max; + u8 rssi_max_macid; u8 rssi_min_by_path; - boolean is_mp_chip; - boolean is_one_entry_only; + boolean is_mp_chip; + boolean is_one_entry_only; u32 one_entry_macid; u32 one_entry_tp; u32 pre_one_entry_tp; @@ -675,17 +871,31 @@ struct phydm_iot_center { u8 number_linked_client; u8 pre_number_active_client; u8 number_active_client; - boolean is_disable_phy_api; + boolean is_disable_phy_api; u8 rssi_a; u8 rssi_b; u8 rssi_c; u8 rssi_d; + s8 rxsc_80; + s8 rxsc_40; + s8 rxsc_20; + s8 rxsc_l; u64 rssi_trsw; u64 rssi_trsw_h; u64 rssi_trsw_l; u64 rssi_trsw_iso; - u8 tx_ant_status; - u8 rx_ant_status; + u8 tx_ant_status; /*TX path enable*/ + u8 rx_ant_status; /*RX path enable*/ + #ifdef PHYDM_COMPILE_ABOVE_4SS + enum bb_path tx_4ss_status; /*@Use N-X for 4STS rate*/ + #endif + #ifdef PHYDM_COMPILE_ABOVE_3SS + enum bb_path tx_3ss_status; /*@Use N-X for 3STS rate*/ + #endif + #ifdef PHYDM_COMPILE_ABOVE_2SS + enum bb_path tx_2ss_status; /*@Use N-X for 2STS rate*/ + #endif + enum bb_path tx_1ss_status; /*@Use N-X for 1STS rate*/ u8 cck_lna_idx; u8 cck_vga_idx; u8 curr_station_id; @@ -696,49 +906,56 @@ struct phydm_iot_center { u8 linked_interval; u8 pre_channel; u32 txagc_offset_value_a; - boolean is_txagc_offset_positive_a; + boolean is_txagc_offset_positive_a; u32 txagc_offset_value_b; - boolean is_txagc_offset_positive_b; - /*[traffic]*/ + boolean is_txagc_offset_positive_b; + u8 ap_total_num; + /*@[traffic]*/ u8 traffic_load; u8 pre_traffic_load; - u32 tx_tp; /*Mbps*/ - u32 rx_tp; /*Mbps*/ - u32 total_tp;/*Mbps*/ - u8 txrx_state_all; /*0: tx, 1:rx, 2:bi-direction*/ + u32 tx_tp; /*@Mbps*/ + u32 rx_tp; /*@Mbps*/ + u32 total_tp; /*@Mbps*/ + u8 txrx_state_all; /*@0:tx, 1:rx, 2:bi-dir*/ u64 cur_tx_ok_cnt; u64 cur_rx_ok_cnt; u64 last_tx_ok_cnt; u64 last_rx_ok_cnt; - u16 consecutive_idlel_time; /*unit: second*/ - /*---------------------------*/ - boolean is_bb_swing_offset_positive_a; - boolean is_bb_swing_offset_positive_b; + u16 consecutive_idlel_time; /*@unit: second*/ + /*@---------------------------*/ + boolean is_bb_swing_offset_positive_a; + boolean is_bb_swing_offset_positive_b; - /*[DIG]*/ - boolean MPDIG_2G; /*off MPDIG*/ - u8 times_2g; /*for MP DIG*/ + /*@[DIG]*/ + boolean MPDIG_2G; /*off MPDIG*/ + u8 times_2g; /*@for MP DIG*/ + u8 force_igi; /*@for debug*/ - /*[TDMA-DIG]*/ + /*@[TDMA-DIG]*/ u8 tdma_dig_timer_ms; u8 tdma_dig_state_number; u8 tdma_dig_low_upper_bond; + u8 force_tdma_low_igi; + u8 force_tdma_high_igi; u8 fix_expire_to_zero; - boolean original_dig_restore; - /*---------------------------*/ + boolean original_dig_restore; + /*@---------------------------*/ - /*[AntDiv]*/ + /*@[AntDiv]*/ u8 ant_div_type; u8 antdiv_rssi; u8 fat_comb_a; u8 fat_comb_b; u8 antdiv_intvl; + u8 antdiv_delay; u8 ant_type; + u8 ant_type2; u8 pre_ant_type; + u8 pre_ant_type2; u8 antdiv_period; u8 evm_antdiv_period; u8 antdiv_select; - u8 antdiv_train_num;/*training time for each antenna in EVM method*/ + u8 antdiv_train_num; /*@training time for each antenna in EVM method*/ u8 stop_antdiv_rssi_th; u16 stop_antdiv_tp_diff_th; u16 stop_antdiv_tp_th; @@ -748,264 +965,309 @@ struct phydm_iot_center { u8 path_select; u8 antdiv_evm_en; u8 bdc_holdstate; - /*---------------------------*/ - + u8 antdiv_counter; + /*@---------------------------*/ + u8 ndpa_period; - boolean h2c_rarpt_connect; - boolean cck_agc_report_type; + boolean h2c_rarpt_connect; + boolean cck_agc_report_type; /*@1:4bit LNA, 0:3bit LNA */ u8 print_agc; u8 la_mode; - /*---8821C Antenna and RF Set BTG/WLG/WLA Select---------------*/ + /*@---8821C Antenna and RF Set BTG/WLG/WLA Select---------------*/ u8 current_rf_set_8821c; u8 default_rf_set_8821c; u8 current_ant_num_8821c; u8 default_ant_num_8821c; u8 rfe_type_expand; - /*-----------------------------------------------------------*/ - /*---For Adaptivtiy---------------------------------------------*/ + /*@-----------------------------------------------------------*/ + /*@---For Adaptivtiy---------------------------------------------*/ s8 TH_L2H_default; s8 th_edcca_hl_diff_default; s8 th_l2h_ini; s8 th_edcca_hl_diff; - s8 th_l2h_ini_mode2; - s8 th_edcca_hl_diff_mode2; - boolean carrier_sense_enable; - boolean adaptivity_flag; /*Limit IGI upper bound for Adaptivity*/ - u8 dc_backoff; - boolean adaptivity_enable; - u8 ap_total_num; - boolean edcca_enable; - u8 odm_regulation_2_4g; - u8 odm_regulation_5g; - /*-----------------------------------------------------------*/ - + boolean carrier_sense_enable; + /*@-----------------------------------------------------------*/ u8 pre_dbg_priority; u8 nbi_set_result; u8 c2h_cmd_start; u8 fw_debug_trace[60]; u8 pre_c2h_seq; - boolean fw_buff_is_enpty; + boolean fw_buff_is_enpty; u32 data_frame_num; - - /*--- for noise detection ---------------------------------------*/ - boolean is_noisy_state; - boolean noisy_decision; /*b_noisy*/ - boolean pre_b_noisy; - u32 noisy_decision_smooth; - u8 lna_sat_chk_cnt; - u8 lna_sat_chk_duty_cycle; - u32 lna_sat_chk_period_ms; - boolean is_disable_lna_sat_chk; - boolean is_disable_gain_table_switch; - /*-----------------------------------------------------------*/ - - boolean is_disable_dym_ecs; - boolean is_disable_dym_ant_weighting; - struct sta_info *odm_sta_info[ODM_ASSOCIATE_ENTRY_NUM];/*odm_sta_info, 2012/01/12 MH For MP, we need to reduce one array pointer for default port.??*/ - struct cmn_sta_info *phydm_sta_info[ODM_ASSOCIATE_ENTRY_NUM]; - u8 phydm_macid_table[ODM_ASSOCIATE_ENTRY_NUM]; - -#if (RATE_ADAPTIVE_SUPPORT == 1) - u16 currmin_rpt_time; - struct _odm_ra_info_ ra_info[ODM_ASSOCIATE_ENTRY_NUM]; - /*Use mac_id as array index. STA mac_id=0, VWiFi Client mac_id={1, ODM_ASSOCIATE_ENTRY_NUM-1} //YJ,add,120119*/ +#if (RTL8814B_SUPPORT) + /*@--- for spur detection ---------------------------------------*/ + u8 dsde_sel; + u8 nbi_path_sel; + u8 csi_wgt; + /*@------------------------------------------*/ #endif - boolean ra_support88e; /*2012/02/14 MH Add to share 88E ra with other SW team.We need to colelct all support abilit to a proper area.*/ - boolean *is_driver_stopped; - boolean *is_driver_is_going_to_pnp_set_power_sleep; - boolean *pinit_adpt_in_progress; - boolean is_user_assign_level; - u8 RSSI_BT; /*come from BT*/ + /*@--- for noise detection ---------------------------------------*/ + boolean is_noisy_state; + boolean noisy_decision; /*@b_noisy*/ + boolean pre_b_noisy; + u32 noisy_decision_smooth; + /*@-----------------------------------------------------------*/ - /*---PSD Relative ---------------------------------------------*/ - boolean is_psd_in_process; - boolean is_psd_active; - /*-----------------------------------------------------------*/ - - boolean bsomlenabled; /* for dynamic SoML control */ - boolean bhtstfdisabled; /* for dynamic HTSTF gain control */ - boolean disrxhpsoml; /* for dynamic RxHP control with SoML on/off */ + /*@--- for MCC ant weighting ------------------------------------*/ + boolean is_stop_dym_ant_weighting; + /*@-----------------------------------------------------------*/ + + boolean is_disable_dym_ecs; + boolean is_disable_dym_ant_weighting; + struct cmn_sta_info *phydm_sta_info[ODM_ASSOCIATE_ENTRY_NUM]; + u8 phydm_macid_table[ODM_ASSOCIATE_ENTRY_NUM];/*@sta_idx = phydm_macid_table[HW_macid]*/ + +#if (RATE_ADAPTIVE_SUPPORT) + u16 currmin_rpt_time; + struct _phydm_txstatistic_ hw_stats; + struct _odm_ra_info_ ra_info[ODM_ASSOCIATE_ENTRY_NUM]; +/*Use mac_id as array index. STA mac_id=0*/ +/*VWiFi Client mac_id={1, ODM_ASSOCIATE_ENTRY_NUM-1} //YJ,add,120119*/ +#endif + /*@2012/02/14 MH Add to share 88E ra with other SW team*/ + /*We need to colelct all support abilit to a proper area.*/ + boolean ra_support88e; + boolean *is_driver_stopped; + boolean *is_driver_is_going_to_pnp_set_power_sleep; + boolean *pinit_adpt_in_progress; + boolean is_user_assign_level; + u8 RSSI_BT; /*@come from BT*/ + + /*@---PSD Relative ---------------------------------------------*/ + boolean is_psd_in_process; + boolean is_psd_active; + /*@-----------------------------------------------------------*/ + + boolean bsomlenabled; /* @D-SoML control */ + boolean bhtstfdisabled; /* @dynamic HTSTF gain control*/ u32 n_iqk_cnt; u32 n_iqk_ok_cnt; u32 n_iqk_fail_cnt; #if (DM_ODM_SUPPORT_TYPE & ODM_AP) - boolean config_bbrf; + boolean config_bbrf; +#endif + boolean is_disable_power_training; + boolean is_bt_continuous_turn; + u8 enhance_pwr_th[3]; + u8 set_pwr_th[3]; + /*@----------Dyn Tx Pwr ---------------------------------------*/ +#ifdef BB_RAM_SUPPORT + struct phydm_bb_ram_ctrl p_bb_ram_ctrl; #endif - boolean is_disable_power_training; - boolean is_bt_continuous_turn; u8 dynamic_tx_high_power_lvl; + void (*fill_desc_dyntxpwr)(void *dm, u8 *desc, u8 dyn_tx_power); u8 last_dtp_lvl; u8 min_power_index; u32 tx_agc_ofdm_18_6; + /*-------------------------------------------------------------*/ u8 rx_pkt_type; #ifdef CONFIG_PHYDM_DFS_MASTER u8 dfs_region_domain; u8 *dfs_master_enabled; - /*---phydm_radar_detect_with_dbg_parm start --------------------*/ + /*@---phydm_radar_detect_with_dbg_parm start --------------------*/ u8 radar_detect_dbg_parm_en; u32 radar_detect_reg_918; u32 radar_detect_reg_91c; u32 radar_detect_reg_920; u32 radar_detect_reg_924; - /*-----------------------------------------------------------*/ + + u32 radar_detect_reg_a40; + u32 radar_detect_reg_a44; + u32 radar_detect_reg_a48; + u32 radar_detect_reg_a4c; + u32 radar_detect_reg_a50; + u32 radar_detect_reg_a54; + + u32 radar_detect_reg_f54; + u32 radar_detect_reg_f58; + u32 radar_detect_reg_f5c; + u32 radar_detect_reg_f70; + u32 radar_detect_reg_f74; + /*@---For zero-wait DFS---------------------------------------*/ + boolean seg1_dfs_flag; + /*@-----------------------------------------------------------*/ +/*@-----------------------------------------------------------*/ #endif -/*=== PHYDM Timer ========================================== (start)*/ +/*@=== RTL8721D ADC clock 80MHz only for CBW20MHz ===*/ +#if (RTL8721D_SUPPORT) + boolean cbw20_adc80; +#endif - struct phydm_timer_list mpt_dig_timer; /*MPT DIG timer*/ - struct phydm_timer_list path_div_switch_timer; - struct phydm_timer_list cck_path_diversity_timer; /*2011.09.27 add for path Diversity*/ +/*@=== PHYDM Timer ========================================== (start)*/ + + struct phydm_timer_list mpt_dig_timer; struct phydm_timer_list fast_ant_training_timer; #ifdef ODM_EVM_ENHANCE_ANTDIV struct phydm_timer_list evm_fast_ant_training_timer; +#endif +#ifdef PHYDM_TDMA_DIG_SUPPORT + struct phydm_timer_list tdma_dig_timer; #endif struct phydm_timer_list sbdcnt_timer; - -/*=== PHYDM Workitem ======================================= (start)*/ +/*@=== PHYDM Workitem ======================================= (start)*/ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #if USE_WORKITEM - RT_WORK_ITEM path_div_switch_workitem; - RT_WORK_ITEM cck_path_diversity_workitem; - RT_WORK_ITEM fast_ant_training_workitem; - RT_WORK_ITEM ra_rpt_workitem; - RT_WORK_ITEM sbdcnt_workitem; + RT_WORK_ITEM fast_ant_training_workitem; + RT_WORK_ITEM ra_rpt_workitem; + RT_WORK_ITEM sbdcnt_workitem; + RT_WORK_ITEM phydm_evm_antdiv_workitem; #endif #endif - -/*=== PHYDM Structure ======================================== (start)*/ - struct phydm_func_poiner phydm_func_handler; - struct phydm_iot_center iot_table; +/*@=== PHYDM Structure ======================================== (start)*/ + struct phydm_func_poiner phydm_func_handler; + struct phydm_iot_center iot_table; #ifdef ODM_CONFIG_BT_COEXIST - struct phydm_bt_info bt_info_table; + struct phydm_bt_info bt_info_table; #endif - struct pkt_process_info pkt_proc_struct; - struct phydm_adaptivity_struct adaptivity; - struct _DFS_STATISTICS dfs; + struct pkt_process_info pkt_proc_struct; + struct phydm_adaptivity_struct adaptivity; + struct _DFS_STATISTICS dfs; + struct odm_noise_monitor noise_level; + struct odm_phy_dbg_info phy_dbg_info; - struct odm_noise_monitor noise_level; - - struct odm_phy_dbg_info phy_dbg_info; +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + struct phydm_bf_rate_info_jgr3 bf_rate_info_jgr3; +#endif #ifdef CONFIG_ADAPTIVE_SOML - struct adaptive_soml dm_soml_table; + struct adaptive_soml dm_soml_table; #endif #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - struct _BF_DIV_COEX_ dm_bdc_table; + struct _BF_DIV_COEX_ dm_bdc_table; #endif #if (defined(CONFIG_HL_SMART_ANTENNA)) - struct smt_ant_honbo dm_sat_table; + struct smt_ant_honbo dm_sat_table; #endif #endif #if (defined(CONFIG_SMART_ANTENNA)) - struct smt_ant smtant_table; + struct smt_ant smtant_table; #endif - struct phydm_fat_struct dm_fat_table; - struct phydm_dig_struct dm_dig_table; - struct phydm_lna_sat_info_struct dm_lna_sat_info; + struct _hal_rf_ rf_table; /*@for HALRF function*/ + struct dm_rf_calibration_struct rf_calibrate_info; + struct dm_iqk_info IQK_info; + struct dm_dpk_info dpk_info; + +#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + struct phydm_fat_struct dm_fat_table; + struct sw_antenna_switch dm_swat_table; +#endif + struct phydm_dig_struct dm_dig_table; +#ifdef PHYDM_LNA_SAT_CHK_SUPPORT + struct phydm_lna_sat_t dm_lna_sat_info; +#endif + +#ifdef CONFIG_MCC_DM + struct _phydm_mcc_dm_ mcc_dm; +#endif #ifdef PHYDM_SUPPORT_CCKPD - struct phydm_cckpd_struct dm_cckpd_table; + struct phydm_cckpd_struct dm_cckpd_table; #endif - + #ifdef PHYDM_PRIMARY_CCA - struct phydm_pricca_struct dm_pri_cca; + struct phydm_pricca_struct dm_pri_cca; #endif struct ra_table dm_ra_table; - struct phydm_fa_struct false_alm_cnt; + struct phydm_fa_struct false_alm_cnt; #ifdef PHYDM_TDMA_DIG_SUPPORT - struct phydm_fa_acc_struct false_alm_cnt_acc; + struct phydm_fa_acc_struct false_alm_cnt_acc; +#ifdef IS_USE_NEW_TDMA + struct phydm_fa_acc_struct false_alm_cnt_acc_low; #endif - struct sw_antenna_switch dm_swat_table; - struct phydm_cfo_track_struct dm_cfo_track; - struct ccx_info dm_ccx_info; - struct _hal_rf_ rf_table; /*for HALRF function*/ - struct dm_rf_calibration_struct rf_calibrate_info; - struct odm_power_trim_data power_trim_data; -#if (RTL8822B_SUPPORT == 1) - struct drp_rtl8822b_struct phydm_rtl8822b; +#endif + struct phydm_cfo_track_struct dm_cfo_track; + struct ccx_info dm_ccx_info; + + struct odm_power_trim_data power_trim_data; +#if (RTL8822B_SUPPORT) + struct drp_rtl8822b_struct phydm_rtl8822b; #endif #ifdef CONFIG_PSD_TOOL - struct psd_info dm_psd_table; + struct psd_info dm_psd_table; #endif -#if (PHYDM_LA_MODE_SUPPORT == 1) - struct rt_adcsmp adcsmp; -#endif - -#ifdef CONFIG_DYNAMIC_RX_PATH - struct _DYNAMIC_RX_PATH_ dm_drp_table; -#endif - - struct dm_iqk_info IQK_info; - -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - struct _path_div_parameter_define_ path_iqk; +#if (PHYDM_LA_MODE_SUPPORT) + struct rt_adcsmp adcsmp; #endif #if (defined(CONFIG_PATH_DIVERSITY)) - struct _ODM_PATH_DIVERSITY_ dm_path_div; + struct _ODM_PATH_DIVERSITY_ dm_path_div; #endif #if (defined(CONFIG_ANT_DETECTION)) - struct _ANT_DETECTED_INFO ant_detected_info; /* Antenna detected information for RSSI tool*/ + struct _ANT_DETECTED_INFO ant_detected_info; #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -#if (BEAMFORMING_SUPPORT == 1) - struct _RT_BEAMFORMING_INFO beamforming_info; +#ifdef PHYDM_BEAMFORMING_SUPPORT + struct _RT_BEAMFORMING_INFO beamforming_info; #endif #endif #ifdef PHYDM_AUTO_DEGBUG - struct phydm_auto_dbg_struc auto_dbg_table; + struct phydm_auto_dbg_struct auto_dbg_table; #endif - struct phydm_pause_lv pause_lv_table; - struct phydm_api_stuc api_table; + struct phydm_pause_lv pause_lv_table; + struct phydm_api_stuc api_table; #ifdef PHYDM_POWER_TRAINING_SUPPORT - struct phydm_pow_train_stuc pow_train_table; + struct phydm_pow_train_stuc pow_train_table; +#endif + +#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT + struct phydm_pmac_tx dm_pmac_tx_table; +#endif + +#ifdef PHYDM_MP_SUPPORT + struct phydm_mp dm_mp_table; +#endif +/*@==========================================================*/ + +#if (RTL8822C_SUPPORT || RTL8812F_SUPPORT) + /*@-------------------phydm_phystatus report --------------------*/ + struct phydm_physts dm_physts_table; #endif -/*==========================================================*/ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) #if (RT_PLATFORM != PLATFORM_LINUX) -}dm_struct; /*DM_Dynamic_Mechanism_Structure*/ +} dm_struct; /*@DM_Dynamic_Mechanism_Structure*/ #else }; #endif -#else /*for AP,CE Team*/ +#else /*@for AP,CE Team*/ }; #endif enum phydm_adv_ota { - PHYDM_PATHB_1RCCA = BIT(0), - PHYDM_HP_OTA_SETTING_A = BIT(1), - PHYDM_HP_OTA_SETTING_B = BIT(2), - PHYDM_ASUS_OTA_SETTING = BIT(3), + PHYDM_PATHB_1RCCA = BIT(0), + PHYDM_HP_OTA_SETTING_A = BIT(1), + PHYDM_HP_OTA_SETTING_B = BIT(2), + PHYDM_ASUS_OTA_SETTING = BIT(3), PHYDM_ASUS_OTA_SETTING_CCK_PATH = BIT(4), - PHYDM_HP_OTA_SETTING_CCK_PATH = BIT(5), + PHYDM_HP_OTA_SETTING_CCK_PATH = BIT(5), PHYDM_LENOVO_OTA_SETTING_NBI_CSI = BIT(6), }; enum phydm_bb_op_mode { - PHYDM_PERFORMANCE_MODE = 0, /*Service one device*/ - PHYDM_BALANCE_MODE = 1, /*Service more than one device*/ + PHYDM_PERFORMANCE_MODE = 0, /*Service one device*/ + PHYDM_BALANCE_MODE = 1, /*@Service more than one device*/ }; enum phydm_structure_type { @@ -1025,11 +1287,13 @@ enum odm_bb_config_type { CONFIG_BB_PHY_REG_PG, CONFIG_BB_PHY_REG_MP, CONFIG_BB_AGC_TAB_DIFF, + CONFIG_BB_RF_CAL_INIT, }; enum odm_rf_config_type { CONFIG_RF_RADIO, CONFIG_RF_TXPWR_LMT, + CONFIG_RF_SYN_RADIO, }; enum odm_fw_config_type { @@ -1056,170 +1320,100 @@ enum rt_status { RT_STATUS_NOT_SUPPORT, RT_STATUS_OS_API_FAILED, }; -#endif /*end of enum rt_status definition*/ +#endif /*@end of enum rt_status definition*/ void -phydm_watchdog_lps( - struct dm_struct *dm -); +phydm_watchdog_lps(struct dm_struct *dm); void -phydm_watchdog_lps_32k( - struct dm_struct *dm -); +phydm_watchdog_lps_32k(struct dm_struct *dm); void -phydm_txcurrentcalibration( - struct dm_struct *dm -); +phydm_txcurrentcalibration(struct dm_struct *dm); void -phydm_dm_early_init( - struct dm_struct *dm -); +phydm_dm_early_init(struct dm_struct *dm); void -odm_dm_init( - struct dm_struct *dm -); +odm_dm_init(struct dm_struct *dm); void -odm_dm_reset( - struct dm_struct *dm -); +odm_dm_reset(struct dm_struct *dm); void -phydm_fwoffload_ability_init( - struct dm_struct *dm, - enum phydm_offload_ability offload_ability -); +phydm_fwoffload_ability_init(struct dm_struct *dm, + enum phydm_offload_ability offload_ability); void -phydm_fwoffload_ability_clear( - struct dm_struct *dm, - enum phydm_offload_ability offload_ability -); +phydm_fwoffload_ability_clear(struct dm_struct *dm, + enum phydm_offload_ability offload_ability); void -phydm_support_ability_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -); +phydm_supportability_en(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); void -phydm_pause_dm_watchdog( - void *dm_void, - enum phydm_pause_type pause_type -); +phydm_pause_dm_watchdog(void *dm_void, enum phydm_pause_type pause_type); void -phydm_watchdog( - struct dm_struct *dm -); +phydm_watchdog(struct dm_struct *dm); void -phydm_watchdog_mp( - struct dm_struct *dm -); +phydm_watchdog_mp(struct dm_struct *dm); u8 -phydm_pause_func( - void *dm_void, - enum phydm_func_idx pause_func, - enum phydm_pause_type pause_type, - enum phydm_pause_level pause_lv, - u8 val_lehgth, - u32 *val_buf - -); +phydm_pause_func(void *dm_void, enum phydm_func_idx pause_func, + enum phydm_pause_type pause_type, + enum phydm_pause_level pause_lv, u8 val_lehgth, u32 *val_buf); void -phydm_pause_func_console( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); +phydm_pause_func_console(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); void -odm_cmn_info_init( - struct dm_struct *dm, - enum odm_cmninfo cmn_info, - u64 value -); +odm_cmn_info_init(struct dm_struct *dm, enum odm_cmninfo cmn_info, u64 value); void -odm_cmn_info_hook( - struct dm_struct *dm, - enum odm_cmninfo cmn_info, - void *value -); +odm_cmn_info_hook(struct dm_struct *dm, enum odm_cmninfo cmn_info, void *value); void -odm_cmn_info_update( - struct dm_struct *dm, - u32 cmn_info, - u64 value -); +odm_cmn_info_update(struct dm_struct *dm, u32 cmn_info, u64 value); u32 -phydm_cmn_info_query( - struct dm_struct *dm, - enum phydm_info_query info_type -); +phydm_cmn_info_query(struct dm_struct *dm, enum phydm_info_query info_type); void -odm_init_all_timers( - struct dm_struct *dm -); +odm_init_all_timers(struct dm_struct *dm); void -odm_cancel_all_timers( - struct dm_struct *dm -); +odm_cancel_all_timers(struct dm_struct *dm); void -odm_release_all_timers( - struct dm_struct *dm -); +odm_release_all_timers(struct dm_struct *dm); void * -phydm_get_structure( - struct dm_struct *dm, - u8 structure_type -); +phydm_get_structure(struct dm_struct *dm, u8 structure_type); void -phydm_dc_cancellation( - struct dm_struct *dm -); +phydm_dc_cancellation(struct dm_struct *dm); void -phydm_receiver_blocking( - void *dm_void -); +phydm_receiver_blocking(void *dm_void); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void +void odm_init_all_work_items( struct dm_struct *dm ); -void +void odm_free_all_work_items( struct dm_struct *dm ); -#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ +#endif /*@#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -void -odm_dtc( - struct dm_struct *dm -); +void +odm_dtc(struct dm_struct *dm); #endif #if (DM_ODM_SUPPORT_TYPE == ODM_AP) diff --git a/hal/phydm/phydm.mk b/hal/phydm/phydm.mk index 1b9ade7..e6f856f 100644 --- a/hal/phydm/phydm.mk +++ b/hal/phydm/phydm.mk @@ -17,6 +17,7 @@ _PHYDM_FILES := hal/phydm/phydm_debug.o \ hal/phydm/phydm_cfotracking.o\ hal/phydm/phydm_noisemonitor.o\ hal/phydm/phydm_beamforming.o\ + hal/phydm/phydm_direct_bf.o\ hal/phydm/phydm_dfs.o\ hal/phydm/txbf/halcomtxbf.o\ hal/phydm/txbf/haltxbfinterface.o\ @@ -31,11 +32,16 @@ _PHYDM_FILES := hal/phydm/phydm_debug.o \ hal/phydm/phydm_math_lib.o\ hal/phydm/phydm_api.o\ hal/phydm/phydm_pow_train.o\ + hal/phydm/phydm_lna_sat.o\ + hal/phydm/phydm_pmac_tx_setting.o\ + hal/phydm/phydm_mp.o\ hal/phydm/halrf/halrf.o\ + hal/phydm/halrf/halrf_debug.o\ hal/phydm/halrf/halphyrf_ce.o\ hal/phydm/halrf/halrf_powertracking_ce.o\ hal/phydm/halrf/halrf_powertracking.o\ - hal/phydm/halrf/halrf_kfree.o + hal/phydm/halrf/halrf_kfree.o\ + hal/phydm/halrf/halrf_psd.o ifeq ($(CONFIG_RTL8188E), y) RTL871X = rtl8188e @@ -115,6 +121,7 @@ _PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8703b_bb.o\ hal/phydm/$(RTL871X)/halhwimg8703b_mac.o\ hal/phydm/$(RTL871X)/halhwimg8703b_rf.o\ hal/phydm/$(RTL871X)/phydm_regconfig8703b.o\ + hal/phydm/$(RTL871X)/phydm_rtl8703b.o\ hal/phydm/halrf/$(RTL871X)/halrf_8703b.o endif @@ -129,6 +136,17 @@ _PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8723d_bb.o\ endif +ifeq ($(CONFIG_RTL8710B), y) +RTL871X = rtl8710b +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8710b_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8710b_mac.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8710b.o\ + hal/phydm/$(RTL871X)/phydm_rtl8710b.o\ + hal/phydm/halrf/$(RTL871X)/halhwimg8710b_rf.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8710b.o +endif + + ifeq ($(CONFIG_RTL8188F), y) RTL871X = rtl8188f _PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8188f_bb.o\ @@ -143,10 +161,11 @@ ifeq ($(CONFIG_RTL8822B), y) RTL871X = rtl8822b _PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8822b_bb.o \ hal/phydm/$(RTL871X)/halhwimg8822b_mac.o \ - hal/phydm/$(RTL871X)/halhwimg8822b_rf.o \ hal/phydm/halrf/$(RTL871X)/halrf_8822b.o \ hal/phydm/$(RTL871X)/phydm_hal_api8822b.o \ + hal/phydm/halrf/$(RTL871X)/halhwimg8822b_rf.o \ hal/phydm/halrf/$(RTL871X)/halrf_iqk_8822b.o \ + hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8822b.o \ hal/phydm/$(RTL871X)/phydm_regconfig8822b.o \ hal/phydm/$(RTL871X)/phydm_rtl8822b.o @@ -158,9 +177,55 @@ ifeq ($(CONFIG_RTL8821C), y) RTL871X = rtl8821c _PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8821c_bb.o \ hal/phydm/$(RTL871X)/halhwimg8821c_mac.o \ - hal/phydm/$(RTL871X)/halhwimg8821c_rf.o \ hal/phydm/$(RTL871X)/phydm_hal_api8821c.o \ hal/phydm/$(RTL871X)/phydm_regconfig8821c.o\ + hal/phydm/halrf/$(RTL871X)/halhwimg8821c_rf.o \ hal/phydm/halrf/$(RTL871X)/halrf_8821c.o\ hal/phydm/halrf/$(RTL871X)/halrf_iqk_8821c.o -endif \ No newline at end of file +endif +ifeq ($(CONFIG_RTL8192F), y) +RTL871X = rtl8192f +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8192f_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8192f_mac.o\ + hal/phydm/$(RTL871X)/phydm_hal_api8192f.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8192f.o\ + hal/phydm/$(RTL871X)/phydm_rtl8192f.o\ + hal/phydm/halrf/$(RTL871X)/halhwimg8192f_rf.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8192f.o +endif + +ifeq ($(CONFIG_RTL8198F), y) +RTL871X = rtl8198f +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8198f_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8198f_mac.o\ + hal/phydm/$(RTL871X)/phydm_hal_api8198f.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8198f.o\ + hal/phydm/halrf/$(RTL871X)/halhwimg8198f_rf.o +endif + +ifeq ($(CONFIG_RTL8822C), y) +RTL871X = rtl8822c +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8822c_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8822c_mac.o\ + hal/phydm/$(RTL871X)/phydm_hal_api8822c.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8822c.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8822c.o\ + hal/phydm/halrf/$(RTL871X)/halrf_iqk_8822c.o\ + hal/phydm/halrf/$(RTL871X)/halrf_tssi_8822c.o\ + hal/phydm/halrf/$(RTL871X)/halrf_dpk_8822c.o\ + hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8822c.o\ + hal/phydm/halrf/$(RTL871X)/halhwimg8822c_rf.o +endif + +ifeq ($(CONFIG_RTL8814B), y) +RTL871X = rtl8814b +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8814b_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8814b_mac.o\ + hal/phydm/$(RTL871X)/phydm_hal_api8814b.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8814b.o\ + hal/phydm/halrf/$(RTL871X)/halhwimg8814b_rf.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8814b.o \ + hal/phydm/halrf/$(RTL871X)/halrf_iqk_8814b.o \ + hal/phydm/halrf/$(RTL871X)/halrf_dpk_8814b.o\ + hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8814b.o +endif diff --git a/hal/phydm/phydm_acs.c b/hal/phydm/phydm_acs.c deleted file mode 100644 index de49bb3..0000000 --- a/hal/phydm/phydm_acs.c +++ /dev/null @@ -1,1152 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * The full GNU General Public License is included in this distribution in the - * file called LICENSE. - * - * Contact Information: - * wlanfae - * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, - * Hsinchu 300, Taiwan. - * - * Larry Finger - * - *****************************************************************************/ - -/* ************************************************************ - * include files - * ************************************************************ */ -#include "mp_precomp.h" -#include "phydm_precomp.h" - - -u8 -odm_get_auto_channel_select_result( - void *dm_void, - u8 band -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct acs_info *acs = &dm->dm_acs; - - PHYDM_DBG(dm, ODM_COMP_API, "%s ======>\n", __func__); - -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - if (band == ODM_BAND_2_4G) { - PHYDM_DBG(dm, ODM_COMP_API, "clean_CH_2g=%d\n", acs->clean_channel_2g); - return (u8)acs->clean_channel_2g; - } else { - PHYDM_DBG(dm, ODM_COMP_API, "clean_CH_5g=%d\n", acs->clean_channel_5g); - return (u8)acs->clean_channel_5g; - } -#else - return (u8)acs->clean_channel_2g; -#endif - -} - -void -odm_auto_channel_select_init( - void *dm_void -) -{ -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct acs_info *acs = &dm->dm_acs; - u8 i; - - if (!(dm->support_ability & ODM_BB_ENV_MONITOR)) - return; - - if (acs->is_force_acs_result) - return; - - PHYDM_DBG(dm, ODM_COMP_API, "%s ======>\n", __func__); - - acs->clean_channel_2g = 1; - acs->clean_channel_5g = 36; - - for (i = 0; i < ODM_MAX_CHANNEL_2G; ++i) { - acs->channel_info_2g[0][i] = 0; - acs->channel_info_2g[1][i] = 0; - } - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - for (i = 0; i < ODM_MAX_CHANNEL_5G; ++i) { - acs->channel_info_5g[0][i] = 0; - acs->channel_info_5g[1][i] = 0; - } - } -#endif -} - -void -odm_auto_channel_select_reset( - void *dm_void -) -{ -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct acs_info *acs = &dm->dm_acs; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - - if (!(dm->support_ability & ODM_BB_ENV_MONITOR)) - return; - - if (acs->is_force_acs_result) - return; - - PHYDM_DBG(dm, ODM_COMP_API, "%s ======>\n", __func__); - - ccx_info->nhm_period = 0x1388; /*20ms*/ - phydm_nhm_setting(dm, SET_NHM_SETTING); - phydm_nhm_trigger(dm); -#endif -} - -void -odm_auto_channel_select( - void *dm_void, - u8 channel -) -{ -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct acs_info *acs = &dm->dm_acs; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - u8 channel_idx = 0, search_idx = 0; - u8 noisy_nhm_th = 0x52; - u8 i, noisy_nhm_th_index, low_pwr_cnt = 0; - u16 max_score = 0; - - PHYDM_DBG(dm, ODM_COMP_API, "%s ======>\n", __func__); - - if (!(dm->support_ability & ODM_BB_ENV_MONITOR)) { - PHYDM_DBG(dm, DBG_DIG, "Return: Not support\n"); - return; - } - - if (acs->is_force_acs_result) { - PHYDM_DBG(dm, DBG_DIG, "Force clean CH{2G,5G}={%d,%d}\n", - acs->clean_channel_2g, acs->clean_channel_5g); - return; - } - - PHYDM_DBG(dm, ODM_COMP_API, "CH=%d\n", channel); - - phydm_get_nhm_result(dm); - noisy_nhm_th_index = (noisy_nhm_th - ccx_info->nhm_th[0]) << 2; - - for (i = 0; i <= 11; i++) { - if (i <= noisy_nhm_th_index) - low_pwr_cnt += ccx_info->nhm_result[i]; - } - - ccx_info->nhm_period = 0x2710; - phydm_nhm_setting(dm, SET_NHM_SETTING); - - if (channel >= 1 && channel <= 14) { - channel_idx = channel - 1; - acs->channel_info_2g[1][channel_idx]++; - - if (acs->channel_info_2g[1][channel_idx] >= 2) - acs->channel_info_2g[0][channel_idx] = (acs->channel_info_2g[0][channel_idx] >> 1) + - (acs->channel_info_2g[0][channel_idx] >> 2) + (low_pwr_cnt >> 2); - else - acs->channel_info_2g[0][channel_idx] = low_pwr_cnt; - - PHYDM_DBG(dm, ODM_COMP_API, "low_pwr_cnt = %d\n", low_pwr_cnt); - PHYDM_DBG(dm, ODM_COMP_API, "CH_Info[0][%d]=%d, CH_Info[1][%d]=%d\n", channel_idx, acs->channel_info_2g[0][channel_idx], channel_idx, acs->channel_info_2g[1][channel_idx]); - - for (search_idx = 0; search_idx < ODM_MAX_CHANNEL_2G; search_idx++) { - if (acs->channel_info_2g[1][search_idx] != 0 && acs->channel_info_2g[0][search_idx] >= max_score) { - max_score = acs->channel_info_2g[0][search_idx]; - acs->clean_channel_2g = search_idx + 1; - } - } - PHYDM_DBG(dm, ODM_COMP_API, "clean_CH_2g=%d, max_score=%d\n", - acs->clean_channel_2g, max_score); - - } else if (channel >= 36) { - /* Need to do */ - acs->clean_channel_5g = channel; - } -#endif -} - -boolean -phydm_acs_check( - void *dm_void -) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rtl8192cd_priv *priv = dm->priv; - - if ((priv->auto_channel != 0) && (priv->auto_channel != 2)) /* if struct acs_info running, do not do FA/CCA counter read */ - return true; - else - return false; -#else - return false; -#endif -} - -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - -void -phydm_auto_channel_select_setting_ap( - void *dm_void, - u32 setting, /* 0: STORE_DEFAULT_NHM_SETTING; 1: RESTORE_DEFAULT_NHM_SETTING, 2: ACS_NHM_SETTING */ - u32 acs_step -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rtl8192cd_priv *priv = dm->priv; - struct acs_info *acs = &dm->dm_acs; - - PHYDM_DBG(dm, ODM_COMP_API, "%s ======>\n", __func__); - - /* 3 Store Default setting */ - if (setting == STORE_DEFAULT_NHM_SETTING) { - PHYDM_DBG(dm, ODM_COMP_API, "STORE_DEFAULT_NHM_SETTING\n"); - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { /* store reg0x990, reg0x994, reg0x998, reg0x99c, Reg0x9a0 */ - acs->reg0x990 = odm_read_4byte(dm, ODM_REG_CCX_PERIOD_11AC); /* reg0x990 */ - acs->reg0x994 = odm_read_4byte(dm, ODM_REG_NHM_TH9_TH10_11AC); /* reg0x994 */ - acs->reg0x998 = odm_read_4byte(dm, ODM_REG_NHM_TH3_TO_TH0_11AC); /* reg0x998 */ - acs->reg0x99c = odm_read_4byte(dm, ODM_REG_NHM_TH7_TO_TH4_11AC); /* Reg0x99c */ - acs->reg0x9a0 = odm_read_1byte(dm, ODM_REG_NHM_TH8_11AC); /* Reg0x9a0, u8 */ - } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { - acs->reg0x890 = odm_read_4byte(dm, ODM_REG_NHM_TH9_TH10_11N); /* reg0x890 */ - acs->reg0x894 = odm_read_4byte(dm, ODM_REG_CCX_PERIOD_11N); /* reg0x894 */ - acs->reg0x898 = odm_read_4byte(dm, ODM_REG_NHM_TH3_TO_TH0_11N); /* reg0x898 */ - acs->reg0x89c = odm_read_4byte(dm, ODM_REG_NHM_TH7_TO_TH4_11N); /* Reg0x89c */ - acs->reg0xe28 = odm_read_1byte(dm, ODM_REG_NHM_TH8_11N); /* Reg0xe28, u8 */ - } - } - - /* 3 Restore Default setting */ - else if (setting == RESTORE_DEFAULT_NHM_SETTING) { - PHYDM_DBG(dm, ODM_COMP_API, "RESTORE_DEFAULT_NHM_SETTING\n"); - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { /* store reg0x990, reg0x994, reg0x998, reg0x99c, Reg0x9a0 */ - odm_write_4byte(dm, ODM_REG_CCX_PERIOD_11AC, acs->reg0x990); - odm_write_4byte(dm, ODM_REG_NHM_TH9_TH10_11AC, acs->reg0x994); - odm_write_4byte(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, acs->reg0x998); - odm_write_4byte(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, acs->reg0x99c); - odm_write_1byte(dm, ODM_REG_NHM_TH8_11AC, acs->reg0x9a0); - } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { - odm_write_4byte(dm, ODM_REG_NHM_TH9_TH10_11N, acs->reg0x890); - odm_write_4byte(dm, ODM_REG_CCX_PERIOD_11AC, acs->reg0x894); - odm_write_4byte(dm, ODM_REG_NHM_TH3_TO_TH0_11N, acs->reg0x898); - odm_write_4byte(dm, ODM_REG_NHM_TH7_TO_TH4_11N, acs->reg0x89c); - odm_write_1byte(dm, ODM_REG_NHM_TH8_11N, acs->reg0xe28); - } - } - - /* 3 struct acs_info setting */ - else if (setting == ACS_NHM_SETTING) { - PHYDM_DBG(dm, ODM_COMP_API, "ACS_NHM_SETTING\n"); - u16 period; - period = 0x61a8; - acs->acs_step = acs_step; - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - /* 4 Set NHM period, 0x990[31:16]=0x61a8, Time duration for NHM unit: 4us, 0x61a8=100ms */ - odm_write_2byte(dm, ODM_REG_CCX_PERIOD_11AC + 2, period); - /* 4 Set NHM ignore_cca=1, ignore_txon=1, ccx_en=0 */ - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(8) | BIT(9) | BIT(10), 3); - - if (acs->acs_step == 0) { - /* 4 Set IGI */ - odm_set_bb_reg(dm, 0xc50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x3E); - if (get_rf_mimo_mode(priv) != RF_1T1R) - odm_set_bb_reg(dm, 0xe50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x3E); - - /* 4 Set struct acs_info NHM threshold */ - odm_write_4byte(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0x82786e64); - odm_write_4byte(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffff8c); - odm_write_1byte(dm, ODM_REG_NHM_TH8_11AC, 0xff); - odm_write_2byte(dm, ODM_REG_NHM_TH9_TH10_11AC + 2, 0xffff); - - } else if (acs->acs_step == 1) { - /* 4 Set IGI */ - odm_set_bb_reg(dm, 0xc50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x2A); - if (get_rf_mimo_mode(priv) != RF_1T1R) - odm_set_bb_reg(dm, 0xe50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x2A); - - /* 4 Set struct acs_info NHM threshold */ - odm_write_4byte(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0x5a50463c); - odm_write_4byte(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffff64); - - } - - } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { - /* 4 Set NHM period, 0x894[31:16]=0x61a8, Time duration for NHM unit: 4us, 0x61a8=100ms */ - odm_write_2byte(dm, ODM_REG_CCX_PERIOD_11AC + 2, period); - /* 4 Set NHM ignore_cca=1, ignore_txon=1, ccx_en=0 */ - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, BIT(8) | BIT(9) | BIT(10), 3); - - if (acs->acs_step == 0) { - /* 4 Set IGI */ - odm_set_bb_reg(dm, 0xc50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x3E); - if (get_rf_mimo_mode(priv) != RF_1T1R) - odm_set_bb_reg(dm, 0xc58, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x3E); - - /* 4 Set struct acs_info NHM threshold */ - odm_write_4byte(dm, ODM_REG_NHM_TH3_TO_TH0_11N, 0x82786e64); - odm_write_4byte(dm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffff8c); - odm_write_1byte(dm, ODM_REG_NHM_TH8_11N, 0xff); - odm_write_2byte(dm, ODM_REG_NHM_TH9_TH10_11N + 2, 0xffff); - - } else if (acs->acs_step == 1) { - /* 4 Set IGI */ - odm_set_bb_reg(dm, 0xc50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x2A); - if (get_rf_mimo_mode(priv) != RF_1T1R) - odm_set_bb_reg(dm, 0xc58, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x2A); - - /* 4 Set struct acs_info NHM threshold */ - odm_write_4byte(dm, ODM_REG_NHM_TH3_TO_TH0_11N, 0x5a50463c); - odm_write_4byte(dm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffff64); - - } - } - } - -} - -void -phydm_get_nhm_statistics_ap( - void *dm_void, - u32 idx, /* @ 2G, Real channel number = idx+1 */ - u32 acs_step -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rtl8192cd_priv *priv = dm->priv; - struct acs_info *acs = &dm->dm_acs; - u32 value32 = 0; - u8 i; - - acs->acs_step = acs_step; - - if (dm->support_ic_type & ODM_IC_11N_SERIES) { - /* 4 Check if NHM result is ready */ - for (i = 0; i < 20; i++) { - ODM_delay_ms(1); - if (odm_get_bb_reg(dm, REG_FPGA0_PSD_REPORT, BIT(17))) - break; - } - - /* 4 Get NHM Statistics */ - if (acs->acs_step == 1) { - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT7_TO_CNT4_11N); - - acs->nhm_cnt[idx][9] = (value32 & MASKBYTE1) >> 8; - acs->nhm_cnt[idx][8] = (value32 & MASKBYTE0); - - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT_11N); /* ODM_REG_NHM_CNT3_TO_CNT0_11N */ - - acs->nhm_cnt[idx][7] = (value32 & MASKBYTE3) >> 24; - acs->nhm_cnt[idx][6] = (value32 & MASKBYTE2) >> 16; - acs->nhm_cnt[idx][5] = (value32 & MASKBYTE1) >> 8; - - } else if (acs->acs_step == 2) { - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT_11N); /* ODM_REG_NHM_CNT3_TO_CNT0_11N */ - - acs->nhm_cnt[idx][4] = odm_read_1byte(dm, ODM_REG_NHM_CNT7_TO_CNT4_11N); - acs->nhm_cnt[idx][3] = (value32 & MASKBYTE3) >> 24; - acs->nhm_cnt[idx][2] = (value32 & MASKBYTE2) >> 16; - acs->nhm_cnt[idx][1] = (value32 & MASKBYTE1) >> 8; - acs->nhm_cnt[idx][0] = (value32 & MASKBYTE0); - } - } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - /* 4 Check if NHM result is ready */ - for (i = 0; i < 20; i++) { - ODM_delay_ms(1); - if (odm_get_bb_reg(dm, ODM_REG_NHM_DUR_READY_11AC, BIT(16))) - break; - } - - if (acs->acs_step == 1) { - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT7_TO_CNT4_11AC); - - acs->nhm_cnt[idx][9] = (value32 & MASKBYTE1) >> 8; - acs->nhm_cnt[idx][8] = (value32 & MASKBYTE0); - - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT_11AC); /* ODM_REG_NHM_CNT3_TO_CNT0_11AC */ - - acs->nhm_cnt[idx][7] = (value32 & MASKBYTE3) >> 24; - acs->nhm_cnt[idx][6] = (value32 & MASKBYTE2) >> 16; - acs->nhm_cnt[idx][5] = (value32 & MASKBYTE1) >> 8; - - } else if (acs->acs_step == 2) { - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT_11AC); /* ODM_REG_NHM_CNT3_TO_CNT0_11AC */ - - acs->nhm_cnt[idx][4] = odm_read_1byte(dm, ODM_REG_NHM_CNT7_TO_CNT4_11AC); - acs->nhm_cnt[idx][3] = (value32 & MASKBYTE3) >> 24; - acs->nhm_cnt[idx][2] = (value32 & MASKBYTE2) >> 16; - acs->nhm_cnt[idx][1] = (value32 & MASKBYTE1) >> 8; - acs->nhm_cnt[idx][0] = (value32 & MASKBYTE0); - } - } - -} - - -/* #define ACS_DEBUG_INFO */ /* acs debug default off */ -#if 0 -int phydm_AutoChannelSelectAP( - void *dm_void, - u32 ACS_Type, /* 0: RXCount_Type, 1:NHM_Type */ - u32 available_chnl_num /* amount of all channels */ -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct acs_info *acs = &dm->dm_acs; - struct rtl8192cd_priv *priv = dm->priv; - - static u32 score2G[MAX_2G_CHANNEL_NUM], score5G[MAX_5G_CHANNEL_NUM]; - u32 score[MAX_BSS_NUM], use_nhm = 0; - u32 minScore = 0xffffffff; - u32 tmpScore, tmpIdx = 0; - u32 traffic_check = 0; - u32 fa_count_weighting = 1; - int i, j, idx = 0, idx_2G_end = -1, idx_5G_begin = -1, minChan = 0; - struct bss_desc *pBss = NULL; - -#ifdef _DEBUG_RTL8192CD_ - char tmpbuf[400]; - int len = 0; -#endif - - memset(score2G, '\0', sizeof(score2G)); - memset(score5G, '\0', sizeof(score5G)); - - for (i = 0; i < priv->available_chnl_num; i++) { - if (priv->available_chnl[i] <= 14) - idx_2G_end = i; - else - break; - } - - for (i = 0; i < priv->available_chnl_num; i++) { - if (priv->available_chnl[i] > 14) { - idx_5G_begin = i; - break; - } - } - - /* DELETE */ -#ifndef CONFIG_RTL_NEW_AUTOCH - for (i = 0; i < priv->site_survey->count; i++) { - pBss = &priv->site_survey->bss[i]; - for (idx = 0; idx < priv->available_chnl_num; idx++) { - if (pBss->channel == priv->available_chnl[idx]) { - if (pBss->channel <= 14) - setChannelScore(idx, score2G, 0, MAX_2G_CHANNEL_NUM - 1); - else - score5G[idx - idx_5G_begin] += 5; - break; - } - } - } -#endif - - if (idx_2G_end >= 0) - for (i = 0; i <= idx_2G_end; i++) - score[i] = score2G[i]; - if (idx_5G_begin >= 0) - for (i = idx_5G_begin; i < priv->available_chnl_num; i++) - score[i] = score5G[i - idx_5G_begin]; - -#ifdef CONFIG_RTL_NEW_AUTOCH - { - u32 y, ch_begin = 0, ch_end = priv->available_chnl_num; - - u32 do_ap_check = 1, ap_ratio = 0; - - if (idx_2G_end >= 0) - ch_end = idx_2G_end + 1; - if (idx_5G_begin >= 0) - ch_begin = idx_5G_begin; - -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("\n"); - for (y = ch_begin; y < ch_end; y++) - printk("1. init: chnl[%d] 20M_rx[%d] 40M_rx[%d] fa_cnt[%d] score[%d]\n", - priv->available_chnl[y], - priv->chnl_ss_mac_rx_count[y], - priv->chnl_ss_mac_rx_count_40M[y], - priv->chnl_ss_fa_count[y], - score[y]); - printk("\n"); -#endif - -#if defined(CONFIG_RTL_88E_SUPPORT) || defined(CONFIG_WLAN_HAL_8192EE) - if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8192E) && priv->pmib->dot11RFEntry.acs_type) { - u32 tmp_score[MAX_BSS_NUM]; - memcpy(tmp_score, score, sizeof(score)); - if (find_clean_channel(priv, ch_begin, ch_end, tmp_score)) { - /* memcpy(score, tmp_score, sizeof(score)); */ -#ifdef _DEBUG_RTL8192CD_ - printk("!! Found clean channel, select minimum FA channel\n"); -#endif - goto USE_CLN_CH; - } -#ifdef _DEBUG_RTL8192CD_ - printk("!! Not found clean channel, use NHM algorithm\n"); -#endif - use_nhm = 1; -USE_CLN_CH: - for (y = ch_begin; y < ch_end; y++) { - for (i = 0; i <= 9; i++) { - u32 val32 = priv->nhm_cnt[y][i]; - for (j = 0; j < i; j++) - val32 *= 3; - score[y] += val32; - } - -#ifdef _DEBUG_RTL8192CD_ - printk("nhm_cnt_%d: H<-[ %3d %3d %3d %3d %3d %3d %3d %3d %3d %3d]->L, score: %d\n", - y + 1, priv->nhm_cnt[y][9], priv->nhm_cnt[y][8], priv->nhm_cnt[y][7], - priv->nhm_cnt[y][6], priv->nhm_cnt[y][5], priv->nhm_cnt[y][4], - priv->nhm_cnt[y][3], priv->nhm_cnt[y][2], priv->nhm_cnt[y][1], - priv->nhm_cnt[y][0], score[y]); -#endif - } - - if (!use_nhm) - memcpy(score, tmp_score, sizeof(score)); - - goto choose_ch; - } -#endif - - /* For each channel, weighting behind channels with MAC RX counter */ - /* For each channel, weighting the channel with FA counter */ - - for (y = ch_begin; y < ch_end; y++) { - score[y] += 8 * priv->chnl_ss_mac_rx_count[y]; - if (priv->chnl_ss_mac_rx_count[y] > 30) - do_ap_check = 0; - if (priv->chnl_ss_mac_rx_count[y] > MAC_RX_COUNT_THRESHOLD) - traffic_check = 1; - -#ifdef RTK_5G_SUPPORT - if (*dm->band_type == ODM_BAND_2_4G) -#endif - { - if ((int)(y - 4) >= (int)ch_begin) - score[y - 4] += 2 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y - 3) >= (int)ch_begin) - score[y - 3] += 8 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y - 2) >= (int)ch_begin) - score[y - 2] += 8 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y - 1) >= (int)ch_begin) - score[y - 1] += 10 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y + 1) < (int)ch_end) - score[y + 1] += 10 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y + 2) < (int)ch_end) - score[y + 2] += 8 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y + 3) < (int)ch_end) - score[y + 3] += 8 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y + 4) < (int)ch_end) - score[y + 4] += 2 * priv->chnl_ss_mac_rx_count[y]; - } - - /* this is for CH_LOAD caculation */ - if (priv->chnl_ss_cca_count[y] > priv->chnl_ss_fa_count[y]) - priv->chnl_ss_cca_count[y] -= priv->chnl_ss_fa_count[y]; - else - priv->chnl_ss_cca_count[y] = 0; - } - -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("\n"); - for (y = ch_begin; y < ch_end; y++) - printk("2. after 20M check: chnl[%d] score[%d]\n", priv->available_chnl[y], score[y]); - printk("\n"); -#endif - - for (y = ch_begin; y < ch_end; y++) { - if (priv->chnl_ss_mac_rx_count_40M[y]) { - score[y] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; - if (priv->chnl_ss_mac_rx_count_40M[y] > 30) - do_ap_check = 0; - if (priv->chnl_ss_mac_rx_count_40M[y] > MAC_RX_COUNT_THRESHOLD) - traffic_check = 1; - -#ifdef RTK_5G_SUPPORT - if (*dm->band_type == ODM_BAND_2_4G) -#endif - { - if ((int)(y - 6) >= (int)ch_begin) - score[y - 6] += 1 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y - 5) >= (int)ch_begin) - score[y - 5] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y - 4) >= (int)ch_begin) - score[y - 4] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y - 3) >= (int)ch_begin) - score[y - 3] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y - 2) >= (int)ch_begin) - score[y - 2] += (5 * priv->chnl_ss_mac_rx_count_40M[y]) / 2; - if ((int)(y - 1) >= (int)ch_begin) - score[y - 1] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y + 1) < (int)ch_end) - score[y + 1] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y + 2) < (int)ch_end) - score[y + 2] += (5 * priv->chnl_ss_mac_rx_count_40M[y]) / 2; - if ((int)(y + 3) < (int)ch_end) - score[y + 3] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y + 4) < (int)ch_end) - score[y + 4] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y + 5) < (int)ch_end) - score[y + 5] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y + 6) < (int)ch_end) - score[y + 6] += 1 * priv->chnl_ss_mac_rx_count_40M[y]; - } - } - } - -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("\n"); - for (y = ch_begin; y < ch_end; y++) - printk("3. after 40M check: chnl[%d] score[%d]\n", priv->available_chnl[y], score[y]); - printk("\n"); - printk("4. do_ap_check=%d traffic_check=%d\n", do_ap_check, traffic_check); - printk("\n"); -#endif - - if (traffic_check == 0) - fa_count_weighting = 5; - else - fa_count_weighting = 1; - - for (y = ch_begin; y < ch_end; y++) - score[y] += fa_count_weighting * priv->chnl_ss_fa_count[y]; - -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("\n"); - for (y = ch_begin; y < ch_end; y++) - printk("5. after fa check: chnl[%d] score[%d]\n", priv->available_chnl[y], score[y]); - printk("\n"); -#endif - - if (do_ap_check) { - for (i = 0; i < priv->site_survey->count; i++) { - pBss = &priv->site_survey->bss[i]; - for (y = ch_begin; y < ch_end; y++) { - if (pBss->channel == priv->available_chnl[y]) { - if (pBss->channel <= 14) { -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("\n"); - printk("chnl[%d] has ap rssi=%d bw[0x%02x]\n", - pBss->channel, pBss->rssi, pBss->t_stamp[1]); - printk("\n"); -#endif - if (pBss->rssi > 60) - ap_ratio = 4; - else if (pBss->rssi > 35) - ap_ratio = 2; - else - ap_ratio = 1; - - if ((pBss->t_stamp[1] & 0x6) == 0) { - score[y] += 50 * ap_ratio; - if ((int)(y - 4) >= (int)ch_begin) - score[y - 4] += 10 * ap_ratio; - if ((int)(y - 3) >= (int)ch_begin) - score[y - 3] += 20 * ap_ratio; - if ((int)(y - 2) >= (int)ch_begin) - score[y - 2] += 30 * ap_ratio; - if ((int)(y - 1) >= (int)ch_begin) - score[y - 1] += 40 * ap_ratio; - if ((int)(y + 1) < (int)ch_end) - score[y + 1] += 40 * ap_ratio; - if ((int)(y + 2) < (int)ch_end) - score[y + 2] += 30 * ap_ratio; - if ((int)(y + 3) < (int)ch_end) - score[y + 3] += 20 * ap_ratio; - if ((int)(y + 4) < (int)ch_end) - score[y + 4] += 10 * ap_ratio; - } else if ((pBss->t_stamp[1] & 0x4) == 0) { - score[y] += 50 * ap_ratio; - if ((int)(y - 3) >= (int)ch_begin) - score[y - 3] += 20 * ap_ratio; - if ((int)(y - 2) >= (int)ch_begin) - score[y - 2] += 30 * ap_ratio; - if ((int)(y - 1) >= (int)ch_begin) - score[y - 1] += 40 * ap_ratio; - if ((int)(y + 1) < (int)ch_end) - score[y + 1] += 50 * ap_ratio; - if ((int)(y + 2) < (int)ch_end) - score[y + 2] += 50 * ap_ratio; - if ((int)(y + 3) < (int)ch_end) - score[y + 3] += 50 * ap_ratio; - if ((int)(y + 4) < (int)ch_end) - score[y + 4] += 50 * ap_ratio; - if ((int)(y + 5) < (int)ch_end) - score[y + 5] += 40 * ap_ratio; - if ((int)(y + 6) < (int)ch_end) - score[y + 6] += 30 * ap_ratio; - if ((int)(y + 7) < (int)ch_end) - score[y + 7] += 20 * ap_ratio; - } else { - score[y] += 50 * ap_ratio; - if ((int)(y - 7) >= (int)ch_begin) - score[y - 7] += 20 * ap_ratio; - if ((int)(y - 6) >= (int)ch_begin) - score[y - 6] += 30 * ap_ratio; - if ((int)(y - 5) >= (int)ch_begin) - score[y - 5] += 40 * ap_ratio; - if ((int)(y - 4) >= (int)ch_begin) - score[y - 4] += 50 * ap_ratio; - if ((int)(y - 3) >= (int)ch_begin) - score[y - 3] += 50 * ap_ratio; - if ((int)(y - 2) >= (int)ch_begin) - score[y - 2] += 50 * ap_ratio; - if ((int)(y - 1) >= (int)ch_begin) - score[y - 1] += 50 * ap_ratio; - if ((int)(y + 1) < (int)ch_end) - score[y + 1] += 40 * ap_ratio; - if ((int)(y + 2) < (int)ch_end) - score[y + 2] += 30 * ap_ratio; - if ((int)(y + 3) < (int)ch_end) - score[y + 3] += 20 * ap_ratio; - } - } else { - if ((pBss->t_stamp[1] & 0x6) == 0) - score[y] += 500; - else if ((pBss->t_stamp[1] & 0x4) == 0) { - score[y] += 500; - if ((int)(y + 1) < (int)ch_end) - score[y + 1] += 500; - } else { - score[y] += 500; - if ((int)(y - 1) >= (int)ch_begin) - score[y - 1] += 500; - } - } - break; - } - } - } - } - -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("\n"); - for (y = ch_begin; y < ch_end; y++) - printk("6. after ap check: chnl[%d]:%d\n", priv->available_chnl[y], score[y]); - printk("\n"); -#endif - -#ifdef SS_CH_LOAD_PROC - - /* caculate noise level -- suggested by wilson */ - for (y = ch_begin; y < ch_end; y++) { - int fa_lv = 0, cca_lv = 0; - if (priv->chnl_ss_fa_count[y] > 1000) - fa_lv = 100; - else if (priv->chnl_ss_fa_count[y] > 500) - fa_lv = 34 * (priv->chnl_ss_fa_count[y] - 500) / 500 + 66; - else if (priv->chnl_ss_fa_count[y] > 200) - fa_lv = 33 * (priv->chnl_ss_fa_count[y] - 200) / 300 + 33; - else if (priv->chnl_ss_fa_count[y] > 100) - fa_lv = 18 * (priv->chnl_ss_fa_count[y] - 100) / 100 + 15; - else - fa_lv = 15 * priv->chnl_ss_fa_count[y] / 100; - if (priv->chnl_ss_cca_count[y] > 400) - cca_lv = 100; - else if (priv->chnl_ss_cca_count[y] > 200) - cca_lv = 34 * (priv->chnl_ss_cca_count[y] - 200) / 200 + 66; - else if (priv->chnl_ss_cca_count[y] > 80) - cca_lv = 33 * (priv->chnl_ss_cca_count[y] - 80) / 120 + 33; - else if (priv->chnl_ss_cca_count[y] > 40) - cca_lv = 18 * (priv->chnl_ss_cca_count[y] - 40) / 40 + 15; - else - cca_lv = 15 * priv->chnl_ss_cca_count[y] / 40; - - priv->chnl_ss_load[y] = (((fa_lv > cca_lv) ? fa_lv : cca_lv) * 75 + ((score[y] > 100) ? 100 : score[y]) * 25) / 100; - - DEBUG_INFO("ch:%d f=%d (%d), c=%d (%d), fl=%d, cl=%d, sc=%d, cu=%d\n", - priv->available_chnl[y], - priv->chnl_ss_fa_count[y], fa_thd, - priv->chnl_ss_cca_count[y], cca_thd, - fa_lv, - cca_lv, - score[y], - priv->chnl_ss_load[y]); - - } -#endif - } -#endif - -choose_ch: - -#ifdef DFS - /* heavy weighted DFS channel */ - if (idx_5G_begin >= 0) { - for (i = idx_5G_begin; i < priv->available_chnl_num; i++) { - if (!priv->pmib->dot11DFSEntry.disable_DFS && is_DFS_channel(priv->available_chnl[i]) - && (score[i] != 0xffffffff)) - score[i] += 1600; - } - } -#endif - - - /* prevent Auto channel selecting wrong channel in 40M mode----------------- */ - if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) - && priv->pshare->is_40m_bw) { -#if 0 - if (GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset == 1) { - /* Upper Primary channel, cannot select the two lowest channels */ - if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) { - score[0] = 0xffffffff; - score[1] = 0xffffffff; - score[2] = 0xffffffff; - score[3] = 0xffffffff; - score[4] = 0xffffffff; - - score[13] = 0xffffffff; - score[12] = 0xffffffff; - score[11] = 0xffffffff; - } - - /* if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) { */ - /* score[idx_5G_begin] = 0xffffffff; */ - /* score[idx_5G_begin + 1] = 0xffffffff; */ - /* } */ - } else if (GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset == 2) { - /* Lower Primary channel, cannot select the two highest channels */ - if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) { - score[0] = 0xffffffff; - score[1] = 0xffffffff; - score[2] = 0xffffffff; - - score[13] = 0xffffffff; - score[12] = 0xffffffff; - score[11] = 0xffffffff; - score[10] = 0xffffffff; - score[9] = 0xffffffff; - } - - /* if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) { */ - /* score[priv->available_chnl_num - 2] = 0xffffffff; */ - /* score[priv->available_chnl_num - 1] = 0xffffffff; */ - /* } */ - } -#endif - for (i = 0; i <= idx_2G_end; ++i) - if (priv->available_chnl[i] == 14) - score[i] = 0xffffffff; /* mask chan14 */ - -#ifdef RTK_5G_SUPPORT - if (idx_5G_begin >= 0) { - for (i = idx_5G_begin; i < priv->available_chnl_num; i++) { - int ch = priv->available_chnl[i]; - if (priv->available_chnl[i] > 144) - --ch; - if ((ch % 4) || ch == 140 || ch == 164) /* mask ch 140, ch 165, ch 184... */ - score[i] = 0xffffffff; - } - } -#endif - - - } - - if (priv->pmib->dot11RFEntry.disable_ch1213) { - for (i = 0; i <= idx_2G_end; ++i) { - int ch = priv->available_chnl[i]; - if ((ch == 12) || (ch == 13)) - score[i] = 0xffffffff; - } - } - - if (((priv->pmib->dot11StationConfigEntry.dot11RegDomain == DOMAIN_GLOBAL) || - (priv->pmib->dot11StationConfigEntry.dot11RegDomain == DOMAIN_WORLD_WIDE)) && - (idx_2G_end >= 11) && (idx_2G_end < 14)) { - score[13] = 0xffffffff; /* mask chan14 */ - score[12] = 0xffffffff; /* mask chan13 */ - score[11] = 0xffffffff; /* mask chan12 */ - } - - /* ------------------------------------------------------------------ */ - -#ifdef _DEBUG_RTL8192CD_ - for (i = 0; i < priv->available_chnl_num; i++) - len += sprintf(tmpbuf + len, "ch%d:%u ", priv->available_chnl[i], score[i]); - strcat(tmpbuf, "\n"); - panic_printk("%s", tmpbuf); - -#endif - - if ((*dm->band_type == ODM_BAND_5G) - && (priv->pmib->dot11nConfigEntry.dot11nUse40M == CHANNEL_WIDTH_80)) { - for (i = 0; i < priv->available_chnl_num; i++) { - if (is80MChannel(priv->available_chnl, priv->available_chnl_num, priv->available_chnl[i])) { - tmpScore = 0; - for (j = 0; j < 4; j++) { - if ((tmpScore != 0xffffffff) && (score[i + j] != 0xffffffff)) - tmpScore += score[i + j]; - else - tmpScore = 0xffffffff; - } - tmpScore = tmpScore / 4; - if (minScore > tmpScore) { - minScore = tmpScore; - - tmpScore = 0xffffffff; - for (j = 0; j < 4; j++) { - if (score[i + j] < tmpScore) { - tmpScore = score[i + j]; - tmpIdx = i + j; - } - } - - idx = tmpIdx; - } - i += 3; - } - } - if (minScore == 0xffffffff) { - /* there is no 80M channels */ - priv->pshare->is_40m_bw = CHANNEL_WIDTH_20; - for (i = 0; i < priv->available_chnl_num; i++) { - if (score[i] < minScore) { - minScore = score[i]; - idx = i; - } - } - } - } else if ((*dm->band_type == ODM_BAND_5G) - && (priv->pmib->dot11nConfigEntry.dot11nUse40M == CHANNEL_WIDTH_40)) { - for (i = 0; i < priv->available_chnl_num; i++) { - if (is40MChannel(priv->available_chnl, priv->available_chnl_num, priv->available_chnl[i])) { - tmpScore = 0; - for (j = 0; j < 2; j++) { - if ((tmpScore != 0xffffffff) && (score[i + j] != 0xffffffff)) - tmpScore += score[i + j]; - else - tmpScore = 0xffffffff; - } - tmpScore = tmpScore / 2; - if (minScore > tmpScore) { - minScore = tmpScore; - - tmpScore = 0xffffffff; - for (j = 0; j < 2; j++) { - if (score[i + j] < tmpScore) { - tmpScore = score[i + j]; - tmpIdx = i + j; - } - } - - idx = tmpIdx; - } - i += 1; - } - } - if (minScore == 0xffffffff) { - /* there is no 40M channels */ - priv->pshare->is_40m_bw = CHANNEL_WIDTH_20; - for (i = 0; i < priv->available_chnl_num; i++) { - if (score[i] < minScore) { - minScore = score[i]; - idx = i; - } - } - } - } else if ((*dm->band_type == ODM_BAND_2_4G) - && (priv->pmib->dot11nConfigEntry.dot11nUse40M == CHANNEL_WIDTH_40) - && (priv->available_chnl_num >= 8)) { - u32 groupScore[14]; - - memset(groupScore, 0xff, sizeof(groupScore)); - for (i = 0; i < priv->available_chnl_num - 4; i++) { - if (score[i] != 0xffffffff && score[i + 4] != 0xffffffff) { - groupScore[i] = score[i] + score[i + 4]; - DEBUG_INFO("groupScore, ch %d,%d: %d\n", i + 1, i + 5, groupScore[i]); - if (groupScore[i] < minScore) { -#ifdef AUTOCH_SS_SPEEDUP - if (priv->pmib->miscEntry.autoch_1611_enable) { - if (priv->available_chnl[i] == 1 || priv->available_chnl[i] == 6 || priv->available_chnl[i] == 11) { - minScore = groupScore[i]; - idx = i; - } - } else -#endif - { - minScore = groupScore[i]; - idx = i; - } - } - } - } - - if (score[idx] < score[idx + 4]) { - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; - } else { - idx = idx + 4; - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; - } - } else { - for (i = 0; i < priv->available_chnl_num; i++) { - if (score[i] < minScore) { -#ifdef AUTOCH_SS_SPEEDUP - if (priv->pmib->miscEntry.autoch_1611_enable) { - if (priv->available_chnl[i] == 1 || priv->available_chnl[i] == 6 || priv->available_chnl[i] == 11) { - minScore = score[i]; - idx = i; - } - } else -#endif - { - minScore = score[i]; - idx = i; - } - } - } - } - - if (IS_A_CUT_8881A(priv) && - (priv->pmib->dot11nConfigEntry.dot11nUse40M == CHANNEL_WIDTH_80)) { - if ((priv->available_chnl[idx] == 36) || - (priv->available_chnl[idx] == 52) || - (priv->available_chnl[idx] == 100) || - (priv->available_chnl[idx] == 116) || - (priv->available_chnl[idx] == 132) || - (priv->available_chnl[idx] == 149) || - (priv->available_chnl[idx] == 165)) - idx++; - else if ((priv->available_chnl[idx] == 48) || - (priv->available_chnl[idx] == 64) || - (priv->available_chnl[idx] == 112) || - (priv->available_chnl[idx] == 128) || - (priv->available_chnl[idx] == 144) || - (priv->available_chnl[idx] == 161) || - (priv->available_chnl[idx] == 177)) - idx--; - } - - minChan = priv->available_chnl[idx]; - - /* skip channel 14 if don't support ofdm */ - if ((priv->pmib->dot11RFEntry.disable_ch14_ofdm) && - (minChan == 14)) { - score[idx] = 0xffffffff; - - minScore = 0xffffffff; - for (i = 0; i < priv->available_chnl_num; i++) { - if (score[i] < minScore) { - minScore = score[i]; - idx = i; - } - } - minChan = priv->available_chnl[idx]; - } - -#if 0 - /* Check if selected channel available for 80M/40M BW or NOT ? */ - if (*dm->band_type == ODM_BAND_5G) { - if (priv->pmib->dot11nConfigEntry.dot11nUse40M == CHANNEL_WIDTH_80) { - if (!is80MChannel(priv->available_chnl, priv->available_chnl_num, minChan)) { - /* priv->pmib->dot11n_config_entry.dot11nUse40M = CHANNEL_WIDTH_40; */ - priv->pshare->is_40m_bw = CHANNEL_WIDTH_40; - } - } - - if (priv->pmib->dot11nConfigEntry.dot11nUse40M == CHANNEL_WIDTH_40) { - if (!is40MChannel(priv->available_chnl, priv->available_chnl_num, minChan)) { - /* priv->pmib->dot11n_config_entry.dot11nUse40M = CHANNEL_WIDTH_20; */ - priv->pshare->is_40m_bw = CHANNEL_WIDTH_20; - } - } - } -#endif - -#ifdef CONFIG_RTL_NEW_AUTOCH - RTL_W32(RXERR_RPT, RXERR_RPT_RST); -#endif - - /* auto adjust contro-sideband */ - if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) - && (priv->pshare->is_40m_bw == 1 || priv->pshare->is_40m_bw == 2)) { -#ifdef RTK_5G_SUPPORT - if (*dm->band_type == ODM_BAND_5G) { - if ((minChan > 144) ? ((minChan - 1) % 8) : (minChan % 8)) { - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; - } else { - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; - } - - } else -#endif - { -#if 0 -#ifdef CONFIG_RTL_NEW_AUTOCH - unsigned int ch_max; - - if (priv->available_chnl[idx_2G_end] >= 13) - ch_max = 13; - else - ch_max = priv->available_chnl[idx_2G_end]; - - if ((minChan >= 5) && (minChan <= (ch_max - 5))) { - if (score[minChan + 4] > score[minChan - 4]) { /* what if some channels were cancelled? */ - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; - } else { - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; - } - } else -#endif - { - if (minChan < 5) { - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; - } else if (minChan > 7) { - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; - } - } -#endif - } - } - /* ----------------------- */ - -#if defined(__ECOS) && defined(CONFIG_SDIO_HCI) - panic_printk("Auto channel choose ch:%d\n", minChan); -#else -#ifdef _DEBUG_RTL8192CD_ - panic_printk("Auto channel choose ch:%d\n", minChan); -#endif -#endif -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("7. minChan:%d 2nd_offset:%d\n", minChan, priv->pshare->offset_2nd_chan); -#endif - - return minChan; -} -#endif - -#endif diff --git a/hal/phydm/phydm_acs.h b/hal/phydm/phydm_acs.h deleted file mode 100644 index 61bdecc..0000000 --- a/hal/phydm/phydm_acs.h +++ /dev/null @@ -1,115 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * The full GNU General Public License is included in this distribution in the - * file called LICENSE. - * - * Contact Information: - * wlanfae - * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, - * Hsinchu 300, Taiwan. - * - * Larry Finger - * - *****************************************************************************/ - -#ifndef __PHYDMACS_H__ -#define __PHYDMACS_H__ - -#define ACS_VERSION "1.1" /*20150729 by YuChen*/ -#define CLM_VERSION "1.0" - -#define ODM_MAX_CHANNEL_2G 14 -#define ODM_MAX_CHANNEL_5G 24 - -/* For phydm_auto_channel_select_setting_ap() */ -#define STORE_DEFAULT_NHM_SETTING 0 -#define RESTORE_DEFAULT_NHM_SETTING 1 -#define ACS_NHM_SETTING 2 - -struct acs_info { - boolean is_force_acs_result; - u8 clean_channel_2g; - u8 clean_channel_5g; - u16 channel_info_2g[2][ODM_MAX_CHANNEL_2G]; /* Channel_Info[1]: channel score, Channel_Info[2]:Channel_Scan_Times */ - u16 channel_info_5g[2][ODM_MAX_CHANNEL_5G]; - -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - u8 acs_step; - /* NHM count 0-11 */ - u8 nhm_cnt[14][11]; - - /* AC-Series, for storing previous setting */ - u32 reg0x990; - u32 reg0x994; - u32 reg0x998; - u32 reg0x99c; - u8 reg0x9a0; /* u8 */ - - /* N-Series, for storing previous setting */ - u32 reg0x890; - u32 reg0x894; - u32 reg0x898; - u32 reg0x89c; - u8 reg0xe28; /* u8 */ -#endif - -}; - - -void -odm_auto_channel_select_init( - void *dm_void -); - -void -odm_auto_channel_select_reset( - void *dm_void -); - -void -odm_auto_channel_select( - void *dm_void, - u8 channel -); - -u8 -odm_get_auto_channel_select_result( - void *dm_void, - u8 band -); - -boolean -phydm_acs_check( - void *dm_void -); - -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - -void -phydm_auto_channel_select_setting_ap( - void *dm_void, - u32 setting, /* 0: STORE_DEFAULT_NHM_SETTING; 1: RESTORE_DEFAULT_NHM_SETTING, 2: ACS_NHM_SETTING */ - u32 acs_step -); - -void -phydm_get_nhm_statistics_ap( - void *dm_void, - u32 idx, /* @ 2G, Real channel number = idx+1 */ - u32 acs_step -); - -#endif /* #if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) */ - -#endif /* #ifndef __PHYDMACS_H__ */ diff --git a/hal/phydm/phydm_adaptivity.c b/hal/phydm/phydm_adaptivity.c index fafe2d5..03503e1 100644 --- a/hal/phydm/phydm_adaptivity.c +++ b/hal/phydm/phydm_adaptivity.c @@ -23,9 +23,9 @@ * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" @@ -34,320 +34,197 @@ #include "PhyDM_Adaptivity.tmh" #endif #endif - -void -phydm_dig_up_bound_lmt_en( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY); - - if (!(dm->support_ability & ODM_BB_ADAPTIVITY) || - (!dm->adaptivity_flag) || - (!dm->is_linked) || - (!dm->adaptivity_enable) - ) { - adaptivity->igi_up_bound_lmt_cnt = 0; - adaptivity->igi_lmt_en = false; - return; - } - - if (dm->total_tp > 1) { - adaptivity->igi_lmt_en = true; - adaptivity->igi_up_bound_lmt_cnt = adaptivity->igi_up_bound_lmt_val; - PHYDM_DBG(dm, DBG_ADPTVTY, "TP >1, Start limit IGI upper bound\n"); - } else { - if (adaptivity->igi_up_bound_lmt_cnt == 0) - adaptivity->igi_lmt_en = false; - else - adaptivity->igi_up_bound_lmt_cnt--; - } - - PHYDM_DBG(dm, DBG_ADPTVTY, "IGI_lmt_cnt = %d\n", adaptivity->igi_up_bound_lmt_cnt); -} - -void -phydm_check_adaptivity( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY); - - if (!(dm->support_ability & ODM_BB_ADAPTIVITY)) { - dm->adaptivity_enable = false; - return; - } - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - if (dm->ap_total_num > adaptivity->ap_num_th) { - dm->adaptivity_enable = false; - PHYDM_DBG(dm, DBG_ADPTVTY, "AP total num > %d!!, disable adaptivity\n", adaptivity->ap_num_th); - return; - } -#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) - if (adaptivity->dynamic_link_adaptivity) { - if (dm->is_linked && adaptivity->is_check == false) { - phydm_check_environment(dm); - } else if (!dm->is_linked) - adaptivity->is_check = false; - - return; - } -#endif - - dm->adaptivity_enable = true; -} - +#ifdef PHYDM_SUPPORT_ADAPTIVITY #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) boolean -phydm_check_channel_plan( - void *dm_void -) +phydm_check_channel_plan(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - void *adapter = dm->adapter; - PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_adaptivity_struct *adapt = &dm->adaptivity; + void *adapter = dm->adapter; + PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; - if (mgnt_info->RegEnableAdaptivity == 2) { - if (dm->carrier_sense_enable == false) { /*check domain Code for adaptivity or CarrierSense*/ - if ((*dm->band_type == ODM_BAND_5G) && - !(dm->odm_regulation_5g == REGULATION_ETSI || dm->odm_regulation_5g == REGULATION_WW)) { - PHYDM_DBG(dm, DBG_ADPTVTY, "adaptivity skip 5G domain code : %d\n", dm->odm_regulation_5g); - dm->adaptivity_enable = false; - return true; - } else if ((*dm->band_type == ODM_BAND_2_4G) && - !(dm->odm_regulation_2_4g == REGULATION_ETSI || dm->odm_regulation_2_4g == REGULATION_WW)) { - PHYDM_DBG(dm, DBG_ADPTVTY, "adaptivity skip 2.4G domain code : %d\n", dm->odm_regulation_2_4g); - dm->adaptivity_enable = false; - return true; + if (mgnt_info->RegEnableAdaptivity != 2) + return false; - } else if ((*dm->band_type != ODM_BAND_2_4G) && (*dm->band_type != ODM_BAND_5G)) { - PHYDM_DBG(dm, DBG_ADPTVTY, "adaptivity neither 2G nor 5G band, return\n"); - dm->adaptivity_enable = false; - return true; - } - } else { - if ((*dm->band_type == ODM_BAND_5G) && - !(dm->odm_regulation_5g == REGULATION_MKK || dm->odm_regulation_5g == REGULATION_WW)) { - PHYDM_DBG(dm, DBG_ADPTVTY, "CarrierSense skip 5G domain code : %d\n", dm->odm_regulation_5g); - dm->adaptivity_enable = false; - return true; - } - - else if ((*dm->band_type == ODM_BAND_2_4G) && - !(dm->odm_regulation_2_4g == REGULATION_MKK || dm->odm_regulation_2_4g == REGULATION_WW)) { - PHYDM_DBG(dm, DBG_ADPTVTY, "CarrierSense skip 2.4G domain code : %d\n", dm->odm_regulation_2_4g); - dm->adaptivity_enable = false; - return true; - - } else if ((*dm->band_type != ODM_BAND_2_4G) && (*dm->band_type != ODM_BAND_5G)) { - PHYDM_DBG(dm, DBG_ADPTVTY, "CarrierSense neither 2G nor 5G band, return\n"); - dm->adaptivity_enable = false; - return true; - } + if (!dm->carrier_sense_enable) { /*@check domain Code for adaptivity or CarrierSense*/ + if ((*dm->band_type == ODM_BAND_5G) && + !(adapt->regulation_5g == REGULATION_ETSI || adapt->regulation_5g == REGULATION_WW)) { + PHYDM_DBG(dm, DBG_ADPTVTY, + "adaptivity skip 5G domain code : %d\n", + adapt->regulation_5g); + return true; + } else if ((*dm->band_type == ODM_BAND_2_4G) && + !(adapt->regulation_2g == REGULATION_ETSI || adapt->regulation_2g == REGULATION_WW)) { + PHYDM_DBG(dm, DBG_ADPTVTY, + "adaptivity skip 2.4G domain code : %d\n", + adapt->regulation_2g); + return true; + } else if ((*dm->band_type != ODM_BAND_2_4G) && (*dm->band_type != ODM_BAND_5G)) { + PHYDM_DBG(dm, DBG_ADPTVTY, + "adaptivity neither 2G nor 5G band, return\n"); + return true; + } + } else { + if ((*dm->band_type == ODM_BAND_5G) && + !(adapt->regulation_5g == REGULATION_MKK || adapt->regulation_5g == REGULATION_WW)) { + PHYDM_DBG(dm, DBG_ADPTVTY, + "CarrierSense skip 5G domain code : %d\n", + adapt->regulation_5g); + return true; + } else if ((*dm->band_type == ODM_BAND_2_4G) && + !(adapt->regulation_2g == REGULATION_MKK || adapt->regulation_2g == REGULATION_WW)) { + PHYDM_DBG(dm, DBG_ADPTVTY, + "CarrierSense skip 2.4G domain code : %d\n", + adapt->regulation_2g); + return true; + } else if ((*dm->band_type != ODM_BAND_2_4G) && (*dm->band_type != ODM_BAND_5G)) { + PHYDM_DBG(dm, DBG_ADPTVTY, + "CarrierSense neither 2G nor 5G band, return\n"); + return true; } } return false; +} +boolean +phydm_soft_ap_special_set(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_adaptivity_struct *adapt = &dm->adaptivity; + u8 disable_ap_adapt_setting = false; + + if (dm->soft_ap_mode != NULL) { + if (*dm->soft_ap_mode != 0 && + (dm->soft_ap_special_setting & BIT(0))) + disable_ap_adapt_setting = true; + else + disable_ap_adapt_setting = false; + PHYDM_DBG(dm, DBG_ADPTVTY, + "soft_ap_setting = %x, soft_ap = %d, dis_ap_adapt = %d\n", + dm->soft_ap_special_setting, *dm->soft_ap_mode, + disable_ap_adapt_setting); + } + + return disable_ap_adapt_setting; +} + +boolean +phydm_ap_num_check(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_adaptivity_struct *adapt = &dm->adaptivity; + boolean dis_adapt = false; + + if (dm->ap_total_num > adapt->ap_num_th) { + dis_adapt = true; + PHYDM_DBG(dm, DBG_ADPTVTY, "AP total num > %d, disable adapt\n", + adapt->ap_num_th); + } else { + dis_adapt = false; + } + return dis_adapt; } #endif -void -phydm_set_edcca_threshold( - void *dm_void, - s8 H2L, - s8 L2H -) +void phydm_dig_up_bound_lmt_en(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_adaptivity_struct *adapt = &dm->adaptivity; - if (dm->support_ic_type & ODM_IC_11N_SERIES) - odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKBYTE2 | MASKBYTE0, (u32)((u8)L2H | (u8)H2L << 16)); -#if (RTL8195A_SUPPORT == 0) - else if (dm->support_ic_type & ODM_IC_11AC_SERIES) - odm_set_bb_reg(dm, REG_FPGA0_XB_LSSI_READ_BACK, MASKLWORD, (u16)((u8)L2H | (u8)H2L << 8)); + if (!(dm->support_ability & ODM_BB_ADAPTIVITY) || + !dm->is_linked || + !adapt->is_adapt_en) { + adapt->igi_up_bound_lmt_cnt = 0; + adapt->igi_lmt_en = false; + return; + } + + if (dm->total_tp > 1) { + adapt->igi_lmt_en = true; + adapt->igi_up_bound_lmt_cnt = adapt->igi_up_bound_lmt_val; + PHYDM_DBG(dm, DBG_ADPTVTY, + "TP >1, Start limit IGI upper bound\n"); + } else { + if (adapt->igi_up_bound_lmt_cnt == 0) + adapt->igi_lmt_en = false; + else + adapt->igi_up_bound_lmt_cnt--; + } + + PHYDM_DBG(dm, DBG_ADPTVTY, "IGI_lmt_cnt = %d\n", + adapt->igi_up_bound_lmt_cnt); +} + +void phydm_check_adaptivity(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_adaptivity_struct *adapt = &dm->adaptivity; + + if (!(dm->support_ability & ODM_BB_ADAPTIVITY)) { + adapt->is_adapt_en = false; + PHYDM_DBG(dm, DBG_ADPTVTY, "adaptivity disable\n"); + return; + } + + adapt->is_adapt_en = true; +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + if (phydm_check_channel_plan(dm) || + phydm_ap_num_check(dm) || + phydm_soft_ap_special_set(dm)) + adapt->is_adapt_en = false; #endif - } -void -phydm_set_lna( - void *dm_void, - enum phydm_set_lna type -) +void phydm_set_edcca_threshold(void *dm_void, s8 H2L, s8 L2H) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8192E)) { - if (type == phydm_disable_lna) { - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0x37f82); /*disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); - if (dm->rf_type > RF_1T1R) { - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0xfffff, 0x18000); - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0x37f82); - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x0); - } - } else if (type == phydm_enable_lna) { - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0x77f82); /*back to normal*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); - if (dm->rf_type > RF_1T1R) { - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0xfffff, 0x18000); - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f); - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0x77f82); - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x0); - } - } - } else if (dm->support_ic_type & ODM_RTL8723B) { - if (type == phydm_disable_lna) { - /*S0*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0001f); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xe6137); /*disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); - /*S1*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xed, 0x00020, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x43, 0xfffff, 0x3008d); /*select Rx mode and disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xed, 0x00020, 0x0); - } else if (type == phydm_enable_lna) { - /*S0*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0001f); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xe6177); /*disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); - /*S1*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xed, 0x00020, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x43, 0xfffff, 0x300bd); /*select Rx mode and disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xed, 0x00020, 0x0); - } - - } else if (dm->support_ic_type & ODM_RTL8812) { - if (type == phydm_disable_lna) { - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x3f7ff); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xc22bf); /*disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); - if (dm->rf_type > RF_1T1R) { - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x3f7ff); - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0xc22bf); /*disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x0); - } - } else if (type == phydm_enable_lna) { - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x3f7ff); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xc26bf); /*disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); - if (dm->rf_type > RF_1T1R) { - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x3f7ff); - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0xc26bf); /*disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x0); - } - } - } else if (dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8881A)) { - if (type == phydm_disable_lna) { - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0002f); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xfb09b); /*disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); - } else if (type == phydm_enable_lna) { - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0002f); - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xfb0bb); /*disable LNA*/ - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); - } + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + odm_set_bb_reg(dm, R_0x84c, MASKBYTE2, (u8)L2H + 0x80); + odm_set_bb_reg(dm, R_0x84c, MASKBYTE3, (u8)H2L + 0x80); + } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { + odm_set_bb_reg(dm, R_0xc4c, MASKBYTE0, (u8)L2H); + odm_set_bb_reg(dm, R_0xc4c, MASKBYTE2, (u8)H2L); + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + odm_set_bb_reg(dm, R_0x8a4, MASKBYTE0, (u8)L2H); + odm_set_bb_reg(dm, R_0x8a4, MASKBYTE1, (u8)H2L); } } - - -void -phydm_set_trx_mux( - void *dm_void, - enum phydm_trx_mux_type tx_mode, - enum phydm_trx_mux_type rx_mode -) +void phydm_mac_edcca_state(void *dm_void, enum phydm_mac_edcca_type state) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - if (dm->support_ic_type & ODM_IC_11N_SERIES) { - odm_set_bb_reg(dm, ODM_REG_CCK_RPT_FORMAT_11N, BIT(3) | BIT(2) | BIT(1), tx_mode); /*set TXmod to standby mode to remove outside noise affect*/ - odm_set_bb_reg(dm, ODM_REG_CCK_RPT_FORMAT_11N, BIT(22) | BIT(21) | BIT(20), rx_mode); /*set RXmod to standby mode to remove outside noise affect*/ - if (dm->rf_type > RF_1T1R) { - odm_set_bb_reg(dm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT(3) | BIT(2) | BIT(1), tx_mode); /*set TXmod to standby mode to remove outside noise affect*/ - odm_set_bb_reg(dm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT(22) | BIT(21) | BIT(20), rx_mode); /*set RXmod to standby mode to remove outside noise affect*/ - } - } -#if (RTL8195A_SUPPORT == 0) - else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, BIT(11) | BIT(10) | BIT(9) | BIT(8), tx_mode); /*set TXmod to standby mode to remove outside noise affect*/ - odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, BIT(7) | BIT(6) | BIT(5) | BIT(4), rx_mode); /*set RXmod to standby mode to remove outside noise affect*/ - if (dm->rf_type > RF_1T1R) { - odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC_B, BIT(11) | BIT(10) | BIT(9) | BIT(8), tx_mode); /*set TXmod to standby mode to remove outside noise affect*/ - odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC_B, BIT(7) | BIT(6) | BIT(5) | BIT(4), rx_mode); /*set RXmod to standby mode to remove outside noise affect*/ - } - } + if (state == PHYDM_IGNORE_EDCCA) { + odm_set_mac_reg(dm, R_0x520, BIT(15), 1); /*@ignore EDCCA*/ +#if 0 + /*odm_set_mac_reg(dm, REG_RD_CTRL, BIT(11), 0);*/ +#endif + } else { /*@don't set MAC ignore EDCCA signal*/ + odm_set_mac_reg(dm, R_0x520, BIT(15), 0); /*@don't ignore EDCCA*/ +#if 0 + /*odm_set_mac_reg(dm, REG_RD_CTRL, BIT(11), 1);*/ #endif - -} - -void -phydm_mac_edcca_state( - void *dm_void, - enum phydm_mac_edcca_type state -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - if (state == phydm_ignore_edcca) { - odm_set_mac_reg(dm, REG_TX_PTCL_CTRL, BIT(15), 1); /*ignore EDCCA reg520[15]=1*/ - /* odm_set_mac_reg(dm, REG_RD_CTRL, BIT(11), 0); */ /*reg524[11]=0*/ - } else { /*don't set MAC ignore EDCCA signal*/ - odm_set_mac_reg(dm, REG_TX_PTCL_CTRL, BIT(15), 0); /*don't ignore EDCCA reg520[15]=0*/ - /* odm_set_mac_reg(dm, REG_RD_CTRL, BIT(11), 1); */ /*reg524[11]=1 */ } PHYDM_DBG(dm, DBG_ADPTVTY, "EDCCA enable state = %d\n", state); - } -void -phydm_search_pwdb_lower_bound( - void *dm_void -) +void phydm_search_pwdb_lower_bound(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY); - u32 value32 = 0, reg_value32 = 0; - u8 cnt, try_count = 0; - u8 tx_edcca1 = 0; - boolean is_adjust = true; - s8 th_l2h_dmc, th_h2l_dmc, igi_target = 0x32; - s8 diff; - u8 IGI = adaptivity->igi_base + 30 + (u8)dm->th_l2h_ini - (u8)dm->th_edcca_hl_diff; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_adaptivity_struct *adapt = &dm->adaptivity; + u32 value32 = 0, reg_value32 = 0; + u8 cnt = 0, try_count = 0; + u8 tx_edcca1 = 0; + boolean is_adjust = true; + s8 th_l2h_dmc, th_h2l_dmc, igi_target = 0x32; + s8 diff = 0; + s8 IGI = adapt->igi_base + 30 + dm->th_l2h_ini - dm->th_edcca_hl_diff; - if (dm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) - phydm_set_lna(dm, phydm_disable_lna); - - diff = igi_target - (s8)IGI; + halrf_rf_lna_setting(dm, HALRF_LNA_DISABLE); + diff = igi_target - IGI; th_l2h_dmc = dm->th_l2h_ini + diff; if (th_l2h_dmc > 10) th_l2h_dmc = 10; @@ -357,27 +234,30 @@ phydm_search_pwdb_lower_bound( ODM_delay_ms(30); while (is_adjust) { - /*check CCA status*/ - if (phydm_set_bb_dbg_port(dm, BB_DBGPORT_PRIORITY_1, 0x0)) {/*set debug port to 0x0*/ - reg_value32 = phydm_get_bb_dbg_port_value(dm); + /*@check CCA status*/ + /*set debug port to 0x0*/ + if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x0)) { + reg_value32 = phydm_get_bb_dbg_port_val(dm); while (reg_value32 & BIT(3) && try_count < 3) { ODM_delay_ms(3); try_count = try_count + 1; - reg_value32 = phydm_get_bb_dbg_port_value(dm); + reg_value32 = phydm_get_bb_dbg_port_val(dm); } phydm_release_bb_dbg_port(dm); try_count = 0; } - /*count EDCCA signal = 1 times*/ + /*@count EDCCA signal = 1 times*/ for (cnt = 0; cnt < 20; cnt++) { - if (phydm_set_bb_dbg_port(dm, BB_DBGPORT_PRIORITY_1, adaptivity->adaptivity_dbg_port)) { - value32 = phydm_get_bb_dbg_port_value(dm); + if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, + adapt->adaptivity_dbg_port)) { + value32 = phydm_get_bb_dbg_port_val(dm); phydm_release_bb_dbg_port(dm); } - if (value32 & BIT(30) && (dm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E))) + if (value32 & BIT(30) && dm->support_ic_type & + (ODM_RTL8723B | ODM_RTL8188E)) tx_edcca1 = tx_edcca1 + 1; else if (value32 & BIT(29)) tx_edcca1 = tx_edcca1 + 1; @@ -395,37 +275,25 @@ phydm_search_pwdb_lower_bound( if (th_l2h_dmc == 10) is_adjust = false; - } else + } else { is_adjust = false; - + } } - adaptivity->adapt_igi_up = IGI - dm->dc_backoff; - adaptivity->h2l_lb = th_h2l_dmc + dm->dc_backoff; - adaptivity->l2h_lb = th_l2h_dmc + dm->dc_backoff; + adapt->adapt_igi_up = IGI - ADAPT_DC_BACKOFF; + adapt->h2l_lb = th_h2l_dmc + ADAPT_DC_BACKOFF; + adapt->l2h_lb = th_l2h_dmc + ADAPT_DC_BACKOFF; - if (dm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) - phydm_set_lna(dm, phydm_enable_lna); - - phydm_set_edcca_threshold(dm, 0x7f, 0x7f); /*resume to no link state*/ + halrf_rf_lna_setting(dm, HALRF_LNA_ENABLE); + phydm_set_edcca_threshold(dm, 0x7f, 0x7f); /*resume to no link state*/ } boolean -phydm_re_search_condition( - void *dm_void -) +phydm_re_search_condition(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY); - u8 adaptivity_igi_upper = adaptivity->adapt_igi_up + dm->dc_backoff; - /*s8 TH_L2H_dmc, IGI_target = 0x32;*/ - /*s8 diff;*/ - - /*TH_L2H_dmc = 10;*/ - - /*diff = TH_L2H_dmc - dm->TH_L2H_ini;*/ - /*lowest_IGI_upper = IGI_target - diff;*/ - /*if ((adaptivity_igi_upper - lowest_IGI_upper) <= 5)*/ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity; + u8 adaptivity_igi_upper = adaptivity->adapt_igi_up + ADAPT_DC_BACKOFF; if (adaptivity_igi_upper <= 0x26) return true; @@ -433,424 +301,206 @@ phydm_re_search_condition( return false; } -void -phydm_adaptivity_info_init( - void *dm_void, - enum phydm_adapinfo cmn_info, - u32 value -) +void phydm_set_l2h_th_ini(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY); + struct dm_struct *dm = (struct dm_struct *)dm_void; - switch (cmn_info) { - case PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE: - dm->carrier_sense_enable = (boolean)value; - break; - - case PHYDM_ADAPINFO_DCBACKOFF: - dm->dc_backoff = (u8)value; - break; - - case PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY: - adaptivity->dynamic_link_adaptivity = (boolean)value; - break; - - case PHYDM_ADAPINFO_TH_L2H_INI: - dm->th_l2h_ini = (s8)value; - break; - - case PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF: - dm->th_edcca_hl_diff = (s8)value; - break; - - case PHYDM_ADAPINFO_AP_NUM_TH: - adaptivity->ap_num_th = (u8)value; - break; - - default: - break; - - } - -} - -void -phydm_adaptivity_init( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY); - s8 igi_target = 0x32; - /*struct phydm_dig_struct* dig_t = &dm->dm_dig_table;*/ - -#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN)) - - if (dm->carrier_sense_enable == false) { - if (dm->th_l2h_ini == 0) - phydm_set_l2h_th_ini(dm); - } else - dm->th_l2h_ini = 0xa; - - if (dm->th_edcca_hl_diff == 0) - dm->th_edcca_hl_diff = 7; -#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) - if (dm->wifi_test == true || *dm->mp_mode == true) -#else - if ((dm->wifi_test & RT_WIFI_LOGO) == true) -#endif - dm->edcca_enable = false; /*even no adaptivity, we still enable EDCCA, AP side use mib control*/ - else - dm->edcca_enable = true; - -#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) - struct rtl8192cd_priv *priv = dm->priv; - - if (dm->carrier_sense_enable) { - dm->th_l2h_ini = 0xa; - dm->th_edcca_hl_diff = 7; - } else { - dm->th_l2h_ini = dm->TH_L2H_default; /*set by mib*/ - dm->th_edcca_hl_diff = dm->th_edcca_hl_diff_default; - } - - if (priv->pshare->rf_ft_var.adaptivity_enable == 2) - adaptivity->dynamic_link_adaptivity = true; - else - adaptivity->dynamic_link_adaptivity = false; - -#endif - - adaptivity->adapt_igi_up = 0; - dm->adaptivity_enable = false; /*use this flag to decide enable or disable*/ - - dm->th_l2h_ini_mode2 = 20; - dm->th_edcca_hl_diff_mode2 = 8; - adaptivity->debug_mode = false; - adaptivity->th_l2h_ini_backup = dm->th_l2h_ini; - adaptivity->th_edcca_hl_diff_backup = dm->th_edcca_hl_diff; - - adaptivity->igi_base = 0x32; - adaptivity->igi_target = 0x1c; - adaptivity->h2l_lb = 0; - adaptivity->l2h_lb = 0; - adaptivity->is_check = false; - adaptivity->adajust_igi_level = 0; - adaptivity->is_stop_edcca = false; - adaptivity->backup_h2l = 0; - adaptivity->backup_l2h = 0; - adaptivity->adaptivity_dbg_port = (dm->support_ic_type & ODM_IC_11N_SERIES) ? 0x208 : 0x209; - - phydm_mac_edcca_state(dm, phydm_dont_ignore_edcca); - - if (dm->support_ic_type & ODM_IC_11N_GAIN_IDX_EDCCA) { - /*odm_set_bb_reg(dm, ODM_REG_EDCCA_DOWN_OPT_11N, BIT(12) | BIT(11) | BIT(10), 0x7);*/ /*interfernce need > 2^x us, and then EDCCA will be 1*/ - if (dm->support_ic_type & ODM_RTL8197F) { - odm_set_bb_reg(dm, ODM_REG_PAGE_B1_97F, BIT(30), 0x1); /*set to page B1*/ - odm_set_bb_reg(dm, ODM_REG_EDCCA_DCNF_97F, BIT(27) | BIT(26), 0x1); /*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ - odm_set_bb_reg(dm, ODM_REG_PAGE_B1_97F, BIT(30), 0x0); - } else - odm_set_bb_reg(dm, ODM_REG_EDCCA_DCNF_11N, BIT(21) | BIT(20), 0x1); /*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ - } -#if (RTL8195A_SUPPORT == 0) - if (dm->support_ic_type & ODM_IC_11AC_GAIN_IDX_EDCCA) { /*8814a no need to find pwdB lower bound, maybe*/ - /*odm_set_bb_reg(dm, ODM_REG_EDCCA_DOWN_OPT, BIT(30) | BIT(29) | BIT(28), 0x7);*/ /*interfernce need > 2^x us, and then EDCCA will be 1*/ - odm_set_bb_reg(dm, ODM_REG_ACBB_EDCCA_ENHANCE, BIT(29) | BIT(28), 0x1); /*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ - } - - if (!(dm->support_ic_type & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA))) { - phydm_search_pwdb_lower_bound(dm); - if (phydm_re_search_condition(dm)) - phydm_search_pwdb_lower_bound(dm); - } else - phydm_set_edcca_threshold(dm, 0x7f, 0x7f); /*resume to no link state*/ -#endif - /*forgetting factor setting*/ - phydm_set_forgetting_factor(dm); - - /*pwdb mode setting with 0: mean, 1:max*/ - phydm_set_pwdb_mode(dm); - - /*we need to consider PwdB upper bound for 8814 later IC*/ - adaptivity->adajust_igi_level = (u8)((dm->th_l2h_ini + igi_target) - pwdb_upper_bound + dfir_loss); /*IGI = L2H - PwdB - dfir_loss*/ - - /*Check this later on Windows*/ - /*phydm_set_edcca_threshold_api(dm, dig_t->cur_ig_value);*/ - - dm->adaptivity_flag = (dm->support_ic_type & ODM_IC_GAIN_IDX_EDCCA) ? false : true; - -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - adaptivity->igi_up_bound_lmt_val = 180; -#else - adaptivity->igi_up_bound_lmt_val = 90; -#endif - adaptivity->igi_up_bound_lmt_cnt = 0; - adaptivity->igi_lmt_en = false; - -} - - -void -phydm_adaptivity( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - u8 igi = dig_t->cur_ig_value; - s8 th_l2h_dmc, th_h2l_dmc; - s8 diff = 0, igi_target = 0x32; - struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY); -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER adapter = (PADAPTER)dm->adapter; - u32 is_fw_current_in_ps_mode = false; - u8 disable_ap_adapt_setting; - - adapter->HalFunc.GetHwRegHandler(adapter, HW_VAR_FW_PSMODE_STATUS, (u8 *)(&is_fw_current_in_ps_mode)); - - /*Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14.*/ - if (is_fw_current_in_ps_mode) - return; -#endif - - if (!dm->edcca_enable || adaptivity->is_stop_edcca) { - PHYDM_DBG(dm, DBG_ADPTVTY, "Disable EDCCA!!!\n"); - return; - } - - phydm_check_adaptivity(dm); /*Check adaptivity enable*/ - phydm_dig_up_bound_lmt_en(dm); - - if ((!(dm->support_ability & ODM_BB_ADAPTIVITY)) && adaptivity->debug_mode == false) { - PHYDM_DBG(dm, DBG_ADPTVTY, "adaptivity disable, enable EDCCA mode!!!\n"); - dm->th_l2h_ini = dm->th_l2h_ini_mode2; - dm->th_edcca_hl_diff = dm->th_edcca_hl_diff_mode2; - } -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - else if (adaptivity->debug_mode == false) { - disable_ap_adapt_setting = false; - if (dm->soft_ap_mode != NULL) { - if (*dm->soft_ap_mode != 0 && (dm->soft_ap_special_setting & BIT(0))) - disable_ap_adapt_setting = true; - PHYDM_DBG(dm, DBG_ADPTVTY, "soft_ap_setting = %x, soft_ap = %d, dis_ap_adapt = %d\n", - dm->soft_ap_special_setting, *dm->soft_ap_mode, disable_ap_adapt_setting); - } - if (phydm_check_channel_plan(dm) || (dm->ap_total_num > adaptivity->ap_num_th) || disable_ap_adapt_setting) { - dm->th_l2h_ini = dm->th_l2h_ini_mode2; - dm->th_edcca_hl_diff = dm->th_edcca_hl_diff_mode2; - } else { - dm->th_l2h_ini = adaptivity->th_l2h_ini_backup; - dm->th_edcca_hl_diff = adaptivity->th_edcca_hl_diff_backup; - } - } -#endif - else if (adaptivity->debug_mode == true) { - dm->th_l2h_ini = adaptivity->th_l2h_ini_debug; - dm->th_edcca_hl_diff = 7; - adaptivity->adajust_igi_level = (u8)((dm->th_l2h_ini + igi_target) - pwdb_upper_bound + dfir_loss); /*IGI = L2H - PwdB - dfir_loss*/ - } - PHYDM_DBG(dm, DBG_ADPTVTY, "odm_Adaptivity() =====>\n"); - PHYDM_DBG(dm, DBG_ADPTVTY, "igi_base=0x%x, th_l2h_ini = %d, th_edcca_hl_diff = %d\n", - adaptivity->igi_base, dm->th_l2h_ini, dm->th_edcca_hl_diff); -#if (RTL8195A_SUPPORT == 0) if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - /*fix AC series when enable EDCCA hang issue*/ - odm_set_bb_reg(dm, 0x800, BIT(10), 1); /*ADC_mask disable*/ - odm_set_bb_reg(dm, 0x800, BIT(10), 0); /*ADC_mask enable*/ - } -#endif - - igi_target = adaptivity->igi_base; - adaptivity->igi_target = (u8) igi_target; - - PHYDM_DBG(dm, DBG_ADPTVTY, "band_width=%s, igi_target=0x%x, dynamic_link_adaptivity = %d\n", - (*dm->band_width == CHANNEL_WIDTH_80) ? "80M" : ((*dm->band_width == CHANNEL_WIDTH_40) ? "40M" : "20M"), igi_target, adaptivity->dynamic_link_adaptivity); - PHYDM_DBG(dm, DBG_ADPTVTY, "adajust_igi_level= 0x%x, adaptivity_flag = %d, adaptivity_enable = %d\n", - adaptivity->adajust_igi_level, dm->adaptivity_flag, dm->adaptivity_enable); - - if (adaptivity->dynamic_link_adaptivity && (!dm->is_linked) && !dm->adaptivity_enable) { - phydm_set_edcca_threshold(dm, 0x7f, 0x7f); - PHYDM_DBG(dm, DBG_ADPTVTY, "In DynamicLink mode(noisy) and No link, Turn off EDCCA!!\n"); - return; - } - - if (dm->support_ic_type & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) { - if ((adaptivity->adajust_igi_level > igi) && dm->adaptivity_enable) - diff = adaptivity->adajust_igi_level - igi; - else if (dm->adaptivity_enable == false) - diff = 0x3e - igi; - - th_l2h_dmc = dm->th_l2h_ini - diff + igi_target; - th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff; - } -#if (RTL8195A_SUPPORT == 0) - else { - diff = igi_target - (s8)igi; - th_l2h_dmc = dm->th_l2h_ini + diff; - if (th_l2h_dmc > 10 && dm->adaptivity_enable) - th_l2h_dmc = 10; - - th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff; - - /*replace lower bound to prevent EDCCA always equal 1*/ - if (th_h2l_dmc < adaptivity->h2l_lb) - th_h2l_dmc = adaptivity->h2l_lb; - if (th_l2h_dmc < adaptivity->l2h_lb) - th_l2h_dmc = adaptivity->l2h_lb; - } -#endif - adaptivity->th_l2h = th_l2h_dmc; - adaptivity->th_h2l = th_h2l_dmc; - PHYDM_DBG(dm, DBG_ADPTVTY, "IGI=0x%x, th_l2h_dmc = %d, th_h2l_dmc = %d\n", igi, th_l2h_dmc, th_h2l_dmc); - PHYDM_DBG(dm, DBG_ADPTVTY, "adapt_igi_up=0x%x, h2l_lb = 0x%x, l2h_lb = 0x%x\n", adaptivity->adapt_igi_up, adaptivity->h2l_lb, adaptivity->l2h_lb); - PHYDM_DBG(dm, DBG_ADPTVTY, "debug_mode = %d\n", adaptivity->debug_mode); - phydm_set_edcca_threshold(dm, th_h2l_dmc, th_l2h_dmc); - - if (dm->adaptivity_enable == true) - odm_set_mac_reg(dm, REG_RD_CTRL, BIT(11), 1); - - return; -} - -/*This API is for solving USB can't Tx problem due to USB3.0 interference in 2.4G*/ -void -phydm_pause_edcca( - void *dm_void, - boolean is_pasue_edcca -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY); - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - u8 IGI = dig_t->cur_ig_value; - s8 diff = 0; - - if (is_pasue_edcca) { - adaptivity->is_stop_edcca = true; - - if (dm->support_ic_type & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) { - if (adaptivity->adajust_igi_level > IGI) - diff = adaptivity->adajust_igi_level - IGI; - - adaptivity->backup_l2h = dm->th_l2h_ini - diff + adaptivity->igi_target; - adaptivity->backup_h2l = adaptivity->backup_l2h - dm->th_edcca_hl_diff; - } -#if (RTL8195A_SUPPORT == 0) - else { - diff = adaptivity->igi_target - (s8)IGI; - adaptivity->backup_l2h = dm->th_l2h_ini + diff; - if (adaptivity->backup_l2h > 10) - adaptivity->backup_l2h = 10; - - adaptivity->backup_h2l = adaptivity->backup_l2h - dm->th_edcca_hl_diff; - - /*replace lower bound to prevent EDCCA always equal 1*/ - if (adaptivity->backup_h2l < adaptivity->h2l_lb) - adaptivity->backup_h2l = adaptivity->h2l_lb; - if (adaptivity->backup_l2h < adaptivity->l2h_lb) - adaptivity->backup_l2h = adaptivity->l2h_lb; - } -#endif - PHYDM_DBG(dm, DBG_ADPTVTY, "pauseEDCCA : L2Hbak = 0x%x, H2Lbak = 0x%x, IGI = 0x%x\n", adaptivity->backup_l2h, adaptivity->backup_h2l, IGI); - - /*Disable EDCCA*/ -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - if (odm_is_work_item_scheduled(&adaptivity->phydm_pause_edcca_work_item) == false) - odm_schedule_work_item(&adaptivity->phydm_pause_edcca_work_item); -#else - phydm_pause_edcca_work_item_callback(dm); -#endif - + if (dm->support_ic_type & + (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814A)) + dm->th_l2h_ini = 0xf2; + else + dm->th_l2h_ini = 0xef; + } else if (dm->support_ic_type & ODM_RTL8822C) { + dm->th_l2h_ini = 0x2d; + } else if (dm->support_ic_type & ODM_RTL8814B) { + dm->th_l2h_ini = 0x31; } else { - adaptivity->is_stop_edcca = false; - PHYDM_DBG(dm, DBG_ADPTVTY, "resumeEDCCA : L2Hbak = 0x%x, H2Lbak = 0x%x, IGI = 0x%x\n", adaptivity->backup_l2h, adaptivity->backup_h2l, IGI); - /*Resume EDCCA*/ -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - if (odm_is_work_item_scheduled(&adaptivity->phydm_resume_edcca_work_item) == false) - odm_schedule_work_item(&adaptivity->phydm_resume_edcca_work_item); -#else - phydm_resume_edcca_work_item_callback(dm); -#endif - + dm->th_l2h_ini = 0xf5; } - } - -void -phydm_pause_edcca_work_item_callback( -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter -#else - void *dm_void -#endif -) +void phydm_set_l2h_th_ini_carrier_sense(void *dm_void) { -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; -#else - struct dm_struct *dm = (struct dm_struct *)dm_void; -#endif - - if (dm->support_ic_type & ODM_IC_11N_SERIES) - odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKBYTE2 | MASKBYTE0, (u32)(0x7f | 0x7f << 16)); -#if (RTL8195A_SUPPORT == 0) - else if (dm->support_ic_type & ODM_IC_11AC_SERIES) - odm_set_bb_reg(dm, REG_FPGA0_XB_LSSI_READ_BACK, MASKLWORD, (u16)(0x7f | 0x7f << 8)); -#endif + struct dm_struct *dm = (struct dm_struct *)dm_void; + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + dm->th_l2h_ini = 0x3c; + else + dm->th_l2h_ini = 0xa; } -void -phydm_resume_edcca_work_item_callback( -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter -#else - void *dm_void -#endif -) +void phydm_set_forgetting_factor(void *dm_void) { -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; -#else - struct dm_struct *dm = (struct dm_struct *)dm_void; -#endif - struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY); - - if (dm->support_ic_type & ODM_IC_11N_SERIES) - odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKBYTE2 | MASKBYTE0, (u32)((u8)adaptivity->backup_l2h | (u8)adaptivity->backup_h2l << 16)); -#if (RTL8195A_SUPPORT == 0) - else if (dm->support_ic_type & ODM_IC_11AC_SERIES) - odm_set_bb_reg(dm, REG_FPGA0_XB_LSSI_READ_BACK, MASKLWORD, (u16)((u8)adaptivity->backup_l2h | (u8)adaptivity->backup_h2l << 8)); -#endif - -} - - -void -phydm_set_edcca_threshold_api( - void *dm_void, - u8 IGI -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY); - s8 th_l2h_dmc, th_h2l_dmc; - s8 diff = 0, igi_target = 0x32; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (dm->support_ability & ODM_BB_ADAPTIVITY) { - if (dm->support_ic_type & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) { - if (adaptivity->adajust_igi_level > IGI) - diff = adaptivity->adajust_igi_level - IGI; + if (dm->support_ic_type & + (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814A)) + odm_set_bb_reg(dm, R_0x8a0, BIT(1) | BIT(0), 0); + } +} + +void phydm_set_pwdb_mode(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ability & ODM_BB_ADAPTIVITY) { + if (dm->support_ic_type & ODM_RTL8822B) + odm_set_bb_reg(dm, R_0x8dc, BIT(5), 0x1); + else if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) + odm_set_bb_reg(dm, R_0xce8, BIT(13), 0x1); + else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + odm_set_bb_reg(dm, R_0x844, BIT(30) | BIT(29), 0x0); + } +} + +void phydm_adaptivity_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity; + u32 used = *_used; + u32 out_len = *_out_len; + char help[] = "-h"; + u32 dm_value[10] = {0}; + u8 i = 0, input_idx = 0; + u32 reg_value32 = 0; + s8 h2l_diff = 0; + + for (i = 0; i < 5; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]); + input_idx++; + } + } + if (strcmp(input[1], help) == 0) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "Show adaptivity message: {0}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Enter debug mode: {1} {th_l2h_ini} {th_edcca_hl_diff}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Leave debug mode: {2}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Disable EDCCA thr: {3}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Enable EDCCA thr: {4}\n"); + goto out; + } + + if (input_idx == 0) + return; + + if (dm_value[0] == PHYDM_ADAPT_DEBUG) { + adaptivity->debug_mode = true; + if (dm_value[1] != 0) + dm->th_l2h_ini = (s8)dm_value[1]; + if (dm_value[2] != 0) + dm->th_edcca_hl_diff = (s8)dm_value[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "th_l2h_ini = %d, th_edcca_hl_diff = %d\n", + dm->th_l2h_ini, dm->th_edcca_hl_diff); + } else if (dm_value[0] == PHYDM_ADAPT_RESUME) { + adaptivity->debug_mode = false; + dm->th_l2h_ini = adaptivity->th_l2h_ini_backup; + dm->th_edcca_hl_diff = adaptivity->th_edcca_hl_diff_backup; + } else if (dm_value[0] == PHYDM_EDCCA_TH_PAUSE) { + adaptivity->edcca_en = false; + } else if (dm_value[0] == PHYDM_EDCCA_TH_RESUME) { + adaptivity->edcca_en = true; + } else if (dm_value[0] == PHYDM_ADAPT_MSG) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "debug_mode = %s, th_l2h_ini = %d\n", + (adaptivity->debug_mode ? "TRUE" : "FALSE"), + dm->th_l2h_ini); + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + reg_value32 = odm_get_bb_reg(dm, R_0x84c, MASKDWORD); + h2l_diff = (s8)((0x00ff0000 & reg_value32) >> 16) - + (s8)((0xff000000 & reg_value32) >> 24); + } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { + reg_value32 = odm_get_bb_reg(dm, R_0xc4c, MASKDWORD); + h2l_diff = (s8)(0x000000ff & reg_value32) - + (s8)((0x00ff0000 & reg_value32) >> 16); + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + reg_value32 = odm_get_bb_reg(dm, R_0x8a4, MASKDWORD); + h2l_diff = (s8)(0x000000ff & reg_value32) - + (s8)((0x0000ff00 & reg_value32) >> 8); + } + + if (h2l_diff == 7) + PDM_SNPF(out_len, used, output + used, out_len - used, + "adaptivity enable\n"); + else + PDM_SNPF(out_len, used, output + used, out_len - used, + "adaptivity disable\n"); + } + +out: + *_used = used; + *_out_len = out_len; +} + +void phydm_set_edcca_val(void *dm_void, u32 *val_buf, u8 val_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (val_len != 2) { + PHYDM_DBG(dm, ODM_COMP_API, + "[Error][adaptivity]Need val_len = 2\n"); + return; + } + phydm_set_edcca_threshold(dm, (s8)val_buf[1], (s8)val_buf[0]); +} + +boolean phydm_edcca_abort(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_adaptivity_struct *adapt = &dm->adaptivity; +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + void *adapter = dm->adapter; + u32 is_fw_in_psmode = false; +#endif + + if (dm->pause_ability & ODM_BB_ADAPTIVITY) { + PHYDM_DBG(dm, DBG_ADPTVTY, "Return: Pause ADPTVTY in LV=%d\n", + dm->pause_lv_table.lv_adapt); + return true; + } + + if (!adapt->edcca_en) { + PHYDM_DBG(dm, DBG_ADPTVTY, "Disable EDCCA!!!\n"); + return true; + } + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + ((PADAPTER)adapter)->HalFunc.GetHwRegHandler(adapter, + HW_VAR_FW_PSMODE_STATUS, + (u8 *)(&is_fw_in_psmode)); + + /*@Disable EDCCA while under LPS mode, added by Roger, 2012.09.14.*/ + if (is_fw_in_psmode) + return true; +#endif + + return false; +} +#endif +void phydm_set_edcca_threshold_api(void *dm_void, u8 IGI) +{ +#ifdef PHYDM_SUPPORT_ADAPTIVITY + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity; + s8 th_l2h_dmc = 0, th_h2l_dmc = 0; + s8 diff = 0, igi_target = 0x32; + + if (dm->support_ability & ODM_BB_ADAPTIVITY) { + if (!(dm->support_ic_type & ODM_IC_PWDB_EDCCA)) { + if (adaptivity->adjust_l2h > IGI) + diff = adaptivity->adjust_l2h - IGI; th_l2h_dmc = dm->th_l2h_ini - diff + igi_target; th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff; - } -#if (RTL8195A_SUPPORT == 0) - else { + } else { diff = igi_target - (s8)IGI; th_l2h_dmc = dm->th_l2h_ini + diff; if (th_l2h_dmc > 10) @@ -864,142 +514,262 @@ phydm_set_edcca_threshold_api( if (th_l2h_dmc < adaptivity->l2h_lb) th_l2h_dmc = adaptivity->l2h_lb; } -#endif - PHYDM_DBG(dm, DBG_ADPTVTY, "API :IGI=0x%x, th_l2h_dmc = %d, th_h2l_dmc = %d\n", IGI, th_l2h_dmc, th_h2l_dmc); - PHYDM_DBG(dm, DBG_ADPTVTY, "API :adapt_igi_up=0x%x, h2l_lb = 0x%x, l2h_lb = 0x%x\n", adaptivity->adapt_igi_up, adaptivity->h2l_lb, adaptivity->l2h_lb); + + PHYDM_DBG(dm, DBG_ADPTVTY, + "API :IGI=0x%x, th_l2h_dmc = %d, th_h2l_dmc = %d\n", + IGI, th_l2h_dmc, th_h2l_dmc); phydm_set_edcca_threshold(dm, th_h2l_dmc, th_l2h_dmc); } -} - -void -phydm_adaptivity_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY); - u32 used = *_used; - u32 out_len = *_out_len; - u32 reg_value32; - s8 h2l_diff = 0; - - if (dm_value[0] == PHYDM_ADAPT_DEBUG) { - PDM_SNPF(out_len, used, output + used, out_len - used, - "Adaptivity Debug Mode ===>\n"); - adaptivity->debug_mode = true; - adaptivity->th_l2h_ini_debug = (s8)dm_value[1]; - PDM_SNPF(out_len, used, output + used, out_len - used, - "th_l2h_ini_debug = %d\n", - adaptivity->th_l2h_ini_debug); - } else if (dm_value[0] == PHYDM_ADAPT_RESUME) { - PDM_SNPF(out_len, used, output + used, out_len - used, - "===> Adaptivity Resume\n"); - adaptivity->debug_mode = false; - } else if (dm_value[0] == PHYDM_EDCCA_TH_PAUSE) { - PDM_SNPF(out_len, used, output + used, out_len - used, - "EDCCA Threshold Pause\n"); - dm->edcca_enable = false; - } else if (dm_value[0] == PHYDM_EDCCA_RESUME) { - PDM_SNPF(out_len, used, output + used, out_len - used, - "EDCCA Resume\n"); - dm->edcca_enable = true; - } else if (dm_value[0] == PHYDM_ADAPT_MSG) { - PDM_SNPF(out_len, used, output + used, out_len - used, - "debug_mode = %s, th_l2h_ini = %d\n", - (adaptivity->debug_mode ? "TRUE" : "FALSE"), - dm->th_l2h_ini); - if (dm->support_ic_type & ODM_IC_11N_SERIES) { - reg_value32 = odm_get_bb_reg(dm, 0xc4c, MASKDWORD); - h2l_diff = (s8)(0x000000ff & reg_value32) - (s8)((0x00ff0000 & reg_value32)>>16); - } -#if (RTL8195A_SUPPORT == 0) - else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - reg_value32 = odm_get_bb_reg(dm, 0x8a4, MASKDWORD); - h2l_diff = (s8)(0x000000ff & reg_value32) - (s8)((0x0000ff00 & reg_value32)>>8); - } #endif - if (h2l_diff == 7) - PDM_SNPF(out_len, used, output + used, - out_len - used, - "adaptivity is enabled\n"); - else - PDM_SNPF(out_len, used, output + used, - out_len - used, - "adaptivity is disabled\n"); +} + +void phydm_adaptivity_info_init(void *dm_void, enum phydm_adapinfo cmn_info, + u32 value) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity; + + switch (cmn_info) { + case PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE: + dm->carrier_sense_enable = (boolean)value; + break; + case PHYDM_ADAPINFO_TH_L2H_INI: + dm->th_l2h_ini = (s8)value; + break; + case PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF: + dm->th_edcca_hl_diff = (s8)value; + break; + case PHYDM_ADAPINFO_AP_NUM_TH: + adaptivity->ap_num_th = (u8)value; + break; + default: + break; } - *_used = used; - *_out_len = out_len; } -void -phydm_set_l2h_th_ini( - void *dm_void -) +void phydm_adaptivity_info_update(void *dm_void, enum phydm_adapinfo cmn_info, + u32 value) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_adaptivity_struct *adapt = &dm->adaptivity; - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814A)) - dm->th_l2h_ini = 0xf2; - else - dm->th_l2h_ini = 0xef; - } else - dm->th_l2h_ini = 0xf5; + /*This init variable may be changed in run time.*/ + switch (cmn_info) { + case PHYDM_ADAPINFO_DOMAIN_CODE_2G: + adapt->regulation_2g = (u8)value; + break; + case PHYDM_ADAPINFO_DOMAIN_CODE_5G: + adapt->regulation_5g = (u8)value; + break; + default: + break; + } } -void -phydm_set_forgetting_factor( - void *dm_void -) +void phydm_adaptivity_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; +#ifdef PHYDM_SUPPORT_ADAPTIVITY + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity; - if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814A)) - odm_set_bb_reg(dm, 0x8a0, BIT(1) | BIT(0), 0); -} +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN)) -void -phydm_set_pwdb_mode( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - - if (dm->support_ability & ODM_BB_ADAPTIVITY) { - if (dm->support_ic_type & ODM_RTL8822B) - odm_set_bb_reg(dm, 0x8dc, BIT(5), 0x1); - else if (dm->support_ic_type & ODM_RTL8197F) - odm_set_bb_reg(dm, 0xce8, BIT(13), 0x1); + if (!dm->carrier_sense_enable) { + if (dm->th_l2h_ini == 0) + phydm_set_l2h_th_ini(dm); } else { - if (dm->support_ic_type & ODM_RTL8822B) - odm_set_bb_reg(dm, 0x8dc, BIT(5), 0x0); - else if (dm->support_ic_type & ODM_RTL8197F) - odm_set_bb_reg(dm, 0xce8, BIT(13), 0x0); + phydm_set_l2h_th_ini_carrier_sense(dm); } -} -void -phydm_set_edcca_val( - void *dm_void, - u32 *val_buf, - u8 val_len -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - - if (val_len != 2) { - PHYDM_DBG(dm, ODM_COMP_API, "[Error][adaptivity]Need val_len = 2\n"); - return; - } - if (dm->pause_ability & BIT(F13_ADPTVTY)) - dm->adaptivity.is_stop_edcca = true; + if (dm->th_edcca_hl_diff == 0) + dm->th_edcca_hl_diff = 7; +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) + if (dm->wifi_test || *dm->mp_mode) +#else + if (dm->wifi_test & RT_WIFI_LOGO) /*@AP side use mib control*/ +#endif + /*@even no adaptivity, we still enable EDCCA*/ + adaptivity->edcca_en = false; else - dm->adaptivity.is_stop_edcca = false; + adaptivity->edcca_en = true; - phydm_set_edcca_threshold(dm, (s8)val_buf[1], (s8)val_buf[0]); +#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) + if (dm->carrier_sense_enable) { + phydm_set_l2h_th_ini_carrier_sense(dm); + dm->th_edcca_hl_diff = 7; + } else { + dm->th_l2h_ini = dm->TH_L2H_default; /*set by mib*/ + dm->th_edcca_hl_diff = dm->th_edcca_hl_diff_default; + } + + adaptivity->edcca_en = true; +#endif + + adaptivity->is_adapt_en = false; /*@decide enable or not*/ + adaptivity->debug_mode = false; + adaptivity->th_l2h_ini_backup = dm->th_l2h_ini; + adaptivity->th_edcca_hl_diff_backup = dm->th_edcca_hl_diff; + adaptivity->igi_base = 0x32; + adaptivity->adapt_igi_up = 0; + adaptivity->h2l_lb = 0; + adaptivity->l2h_lb = 0; + adaptivity->adjust_l2h = 0; + adaptivity->th_l2h = 0x7f; + adaptivity->th_h2l = 0x7f; + phydm_mac_edcca_state(dm, PHYDM_DONT_IGNORE_EDCCA); + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + adaptivity->adaptivity_dbg_port = 0x000; + odm_set_bb_reg(dm, R_0x1d6c, BIT(0), 1); + } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { + adaptivity->adaptivity_dbg_port = 0x208; + } else { + adaptivity->adaptivity_dbg_port = 0x209; + } + if (dm->support_ic_type & ODM_IC_11N_SERIES && + !(dm->support_ic_type & ODM_IC_PWDB_EDCCA)) { + /*@interfernce need > 2^x us, and then EDCCA will be 1*/ +#if 0 + /*odm_set_bb_reg(dm, 0x948, 0x1c00, 0x7);*/ +#endif + if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) { + /*set to page B1*/ + odm_set_bb_reg(dm, R_0xe28, BIT(30), 0x1); + /*@0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ + odm_set_bb_reg(dm, R_0xbc0, BIT(27) | BIT(26), 0x1); + odm_set_bb_reg(dm, R_0xe28, BIT(30), 0x0); + } else { + /*@0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ + odm_set_bb_reg(dm, R_0xe24, BIT(21) | BIT(20), 0x1); + } + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES && + !(dm->support_ic_type & ODM_IC_PWDB_EDCCA)) { + /*@interfernce need > 2^x us, and then EDCCA will be 1*/ +#if 0 + /*odm_set_bb_reg(dm, 0x900, 0x70000000, 0x7);*/ +#endif + /*@0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ + odm_set_bb_reg(dm, R_0x944, BIT(29) | BIT(28), 0x1); + } + + if (dm->support_ic_type & ODM_IC_PWDB_EDCCA) { + phydm_search_pwdb_lower_bound(dm); + if (phydm_re_search_condition(dm)) + phydm_search_pwdb_lower_bound(dm); + } else { + /*resume to no link state*/ + phydm_set_edcca_threshold(dm, 0x7f, 0x7f); + } + + /*@forgetting factor setting*/ + phydm_set_forgetting_factor(dm); + + /*pwdb mode setting with 0: mean, 1:max*/ + phydm_set_pwdb_mode(dm); + +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) + adaptivity->igi_up_bound_lmt_val = 180; +#else + adaptivity->igi_up_bound_lmt_val = 90; +#endif + adaptivity->igi_up_bound_lmt_cnt = 0; + adaptivity->igi_lmt_en = false; +#endif +} + +void phydm_adaptivity(void *dm_void) +{ +#ifdef PHYDM_SUPPORT_ADAPTIVITY + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_adaptivity_struct *adapt = &dm->adaptivity; + u8 igi = dig_t->cur_ig_value; + s8 th_l2h_dmc = 0, th_h2l_dmc = 0; + s8 diff = 0, igi_target = adapt->igi_base; + + if (phydm_edcca_abort(dm)) + return; + + /*@fix AC series when enable EDCCA hang issue*/ + if (dm->support_ic_type & ODM_RTL8812) { + odm_set_bb_reg(dm, R_0x800, BIT(10), 1); /*@ADC_mask disable*/ + odm_set_bb_reg(dm, R_0x800, BIT(10), 0); /*@ADC_mask enable*/ + } + + if (!adapt->debug_mode) + phydm_check_adaptivity(dm); /*@Check adaptivity enable*/ + + PHYDM_DBG(dm, DBG_ADPTVTY, "%s ====>\n", __func__); + PHYDM_DBG(dm, DBG_ADPTVTY, "th_l2h_ini = %d, th_edcca_hl_diff = %d\n", + dm->th_l2h_ini, dm->th_edcca_hl_diff); + PHYDM_DBG(dm, DBG_ADPTVTY, "is_adapt_en = %d, debug_mode = %d\n", + adapt->is_adapt_en, adapt->debug_mode); + + if (dm->support_ic_type & ODM_IC_PWDB_EDCCA) { + if (adapt->is_adapt_en) { + /*@Limit IGI upper bound for adaptivity*/ + phydm_dig_up_bound_lmt_en(dm); + diff = igi_target - (s8)igi; + th_l2h_dmc = dm->th_l2h_ini + diff; + if (th_l2h_dmc > 10) + th_l2h_dmc = 10; + + th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff; + } else { + th_l2h_dmc = 0x46 - igi; + th_h2l_dmc = th_l2h_dmc - EDCCA_HL_DIFF_NORMAL; + } + /*replace lower bound to prevent EDCCA always equal 1*/ + if (th_h2l_dmc < adapt->h2l_lb) + th_h2l_dmc = adapt->h2l_lb; + if (th_l2h_dmc < adapt->l2h_lb) + th_l2h_dmc = adapt->l2h_lb; + PHYDM_DBG(dm, DBG_ADPTVTY, + "adapt_igi_up=0x%x, h2l_lb = 0x%x, l2h_lb = 0x%x\n", + adapt->adapt_igi_up, adapt->h2l_lb, adapt->l2h_lb); + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + if (adapt->is_adapt_en) { + /*need to prevent pwdB clipping*/ + adapt->adjust_l2h = (u8)(dm->th_l2h_ini - ADC_BACKOFF); + diff = adapt->adjust_l2h > igi ? + adapt->adjust_l2h - igi : + 0; + th_l2h_dmc = dm->th_l2h_ini - diff; + th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff; + } else { + th_l2h_dmc = igi + TH_L2H_DIFF_IGI > EDCCA_TH_L2H_LB ? + igi + TH_L2H_DIFF_IGI : + EDCCA_TH_L2H_LB; + th_h2l_dmc = th_l2h_dmc - EDCCA_HL_DIFF_NORMAL; + } + } else { + if (adapt->is_adapt_en) { + /*need to consider PwdB upper bound for 8814 later IC*/ + adapt->adjust_l2h = (u8)(dm->th_l2h_ini + igi_target - + PWDB_UPPER_BOUND + DFIR_LOSS); + diff = adapt->adjust_l2h > igi ? + adapt->adjust_l2h - igi : + 0; + th_l2h_dmc = dm->th_l2h_ini - diff + igi_target; + th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff; + } else { + th_l2h_dmc = igi + TH_L2H_DIFF_IGI > EDCCA_TH_L2H_LB ? + igi + TH_L2H_DIFF_IGI : + EDCCA_TH_L2H_LB; + th_h2l_dmc = th_l2h_dmc - EDCCA_HL_DIFF_NORMAL; + } + } + + adapt->th_l2h = th_l2h_dmc; + adapt->th_h2l = th_h2l_dmc; + PHYDM_DBG(dm, DBG_ADPTVTY, "IGI=0x%x, th_l2h_dmc=%d, th_h2l_dmc=%d\n", + igi, th_l2h_dmc, th_h2l_dmc); + phydm_set_edcca_threshold(dm, th_h2l_dmc, th_l2h_dmc); + + if (adapt->is_adapt_en) + odm_set_mac_reg(dm, REG_RD_CTRL, BIT(11), 1); + + return; +#endif } diff --git a/hal/phydm/phydm_adaptivity.h b/hal/phydm/phydm_adaptivity.h index f1edb5c..4a754ea 100644 --- a/hal/phydm/phydm_adaptivity.h +++ b/hal/phydm/phydm_adaptivity.h @@ -23,15 +23,30 @@ * *****************************************************************************/ +#ifndef __PHYDMADAPTIVITY_H__ +#define __PHYDMADAPTIVITY_H__ -#ifndef __PHYDMADAPTIVITY_H__ -#define __PHYDMADAPTIVITY_H__ +#define ADAPTIVITY_VERSION "9.6.07" /*@20181107 changed by Kevin, + *remove pwdB mode with non-adaptivity case + */ -#define ADAPTIVITY_VERSION "9.5.7" /*20170627 changed by Kevin, move adapt_igi_up from phydm.h to phydm_adaptivity.h*/ +#define PWDB_UPPER_BOUND 7 +#define DFIR_LOSS 7 +#define ADC_BACKOFF 12 +#define EDCCA_TH_L2H_LB 0x30 +#define TH_L2H_DIFF_IGI 8 +#define EDCCA_HL_DIFF_NORMAL 8 -#define pwdb_upper_bound 7 -#define dfir_loss 7 +#define ODM_IC_PWDB_EDCCA (ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E |\ + ODM_RTL8881A | ODM_RTL8821 | ODM_RTL8812) +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP)) + #define ADAPT_DC_BACKOFF 2 +#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) + #define ADAPT_DC_BACKOFF 4 +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + #define ADAPT_DC_BACKOFF 0 +#endif #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) enum phydm_regulation_type { REGULATION_FCC = 0, @@ -44,174 +59,66 @@ enum phydm_regulation_type { enum phydm_adapinfo { PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE = 0, - PHYDM_ADAPINFO_DCBACKOFF, - PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY, PHYDM_ADAPINFO_TH_L2H_INI, PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF, - PHYDM_ADAPINFO_AP_NUM_TH -}; - -enum phydm_set_lna { - phydm_disable_lna = 0, - phydm_enable_lna = 1, -}; - -enum phydm_trx_mux_type { - phydm_shutdown = 0, - phydm_standby_mode = 1, - phydm_tx_mode = 2, - phydm_rx_mode = 3 + PHYDM_ADAPINFO_AP_NUM_TH, + PHYDM_ADAPINFO_DOMAIN_CODE_2G, + PHYDM_ADAPINFO_DOMAIN_CODE_5G }; enum phydm_mac_edcca_type { - phydm_ignore_edcca = 0, - phydm_dont_ignore_edcca = 1 + PHYDM_IGNORE_EDCCA = 0, + PHYDM_DONT_IGNORE_EDCCA = 1 }; enum phydm_adaptivity_mode { PHYDM_ADAPT_MSG = 0, PHYDM_ADAPT_DEBUG = 1, PHYDM_ADAPT_RESUME = 2, - PHYDM_EDCCA_TH_PAUSE = 3, - PHYDM_EDCCA_RESUME = 4 + PHYDM_EDCCA_TH_PAUSE = 3, + PHYDM_EDCCA_TH_RESUME = 4 }; struct phydm_adaptivity_struct { s8 th_l2h_ini_backup; s8 th_edcca_hl_diff_backup; s8 igi_base; - u8 igi_target; s8 h2l_lb; s8 l2h_lb; - boolean is_check; - boolean dynamic_link_adaptivity; u8 ap_num_th; - u8 adajust_igi_level; - s8 backup_l2h; - s8 backup_h2l; - boolean is_stop_edcca; -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - RT_WORK_ITEM phydm_pause_edcca_work_item; - RT_WORK_ITEM phydm_resume_edcca_work_item; -#endif + u8 adjust_l2h; u32 adaptivity_dbg_port; /*N:0x208, AC:0x209*/ u8 debug_mode; - s8 th_l2h_ini_debug; - u16 igi_up_bound_lmt_cnt; /*When igi_up_bound_lmt_cnt !=0, limit IGI upper bound to "adapt_igi_up"*/ - u16 igi_up_bound_lmt_val; /*max value of igi_up_bound_lmt_cnt*/ - boolean igi_lmt_en; + u16 igi_up_bound_lmt_cnt; /*@When igi_up_bound_lmt_cnt !=0, limit IGI upper bound to "adapt_igi_up"*/ + u16 igi_up_bound_lmt_val; /*@max value of igi_up_bound_lmt_cnt*/ + boolean igi_lmt_en; u8 adapt_igi_up; - s8 rvrt_val[2]; + u32 rvrt_val[2]; s8 th_l2h; s8 th_h2l; + u8 regulation_2g; + u8 regulation_5g; + boolean is_adapt_en; + boolean edcca_en; }; -void -phydm_pause_edcca( - void *dm_void, - boolean is_pasue_edcca -); +#ifdef PHYDM_SUPPORT_ADAPTIVITY +void phydm_adaptivity_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); -void -phydm_check_environment( - void *dm_void -); - -void -phydm_mac_edcca_state( - void *dm_void, - enum phydm_mac_edcca_type state -); - -void -phydm_set_edcca_threshold( - void *dm_void, - s8 H2L, - s8 L2H -); - -void -phydm_set_trx_mux( - void *dm_void, - enum phydm_trx_mux_type tx_mode, - enum phydm_trx_mux_type rx_mode -); - -void -phydm_search_pwdb_lower_bound( - void *dm_void -); - -void -phydm_adaptivity_info_init( - void *dm_void, - enum phydm_adapinfo cmn_info, - u32 value -); - -void -phydm_adaptivity_init( - void *dm_void -); - -void -phydm_adaptivity( - void *dm_void -); - -void -phydm_set_edcca_threshold_api( - void *dm_void, - u8 IGI -); - -void -phydm_pause_edcca_work_item_callback( -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter -#else - void *dm_void +void phydm_set_edcca_val(void *dm_void, u32 *val_buf, u8 val_len); #endif -); -void -phydm_resume_edcca_work_item_callback( -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter -#else - void *dm_void -#endif -); +void phydm_set_edcca_threshold_api(void *dm_void, u8 IGI); -void -phydm_adaptivity_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -); +void phydm_adaptivity_info_init(void *dm_void, enum phydm_adapinfo cmn_info, + u32 value); -void -phydm_set_l2h_th_ini( - void *dm_void -); +void phydm_adaptivity_info_update(void *dm_void, enum phydm_adapinfo cmn_info, + u32 value); -void -phydm_set_forgetting_factor( - void *dm_void -); +void phydm_adaptivity_init(void *dm_void); -void -phydm_set_pwdb_mode( - void *dm_void -); - -void -phydm_set_edcca_val( - void *dm_void, - u32 *val_buf, - u8 val_len -); +void phydm_adaptivity(void *dm_void); #endif diff --git a/hal/phydm/phydm_adc_sampling.c b/hal/phydm/phydm_adc_sampling.c index 55bb013..8f6579e 100644 --- a/hal/phydm/phydm_adc_sampling.c +++ b/hal/phydm/phydm_adc_sampling.c @@ -26,278 +26,928 @@ #include "mp_precomp.h" #include "phydm_precomp.h" +#if (PHYDM_LA_MODE_SUPPORT) + #if (DM_ODM_SUPPORT_TYPE & ODM_AP) - #if ((RTL8197F_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) - #include "rtl8197f/Hal8197FPhyReg.h" - #include "WlanHAL/HalMac88XX/halmac_reg2.h" + #if (RTL8197F_SUPPORT || RTL8822B_SUPPORT || RTL8192F_SUPPORT) + #include "rtl8197f/Hal8197FPhyReg.h" + #include "WlanHAL/HalMac88XX/halmac_reg2.h" #else - #include "WlanHAL/HalHeader/HalComReg.h" + #include "WlanHAL/HalHeader/HalComReg.h" + #endif +#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) + #if WPP_SOFTWARE_TRACE + #include "phydm_adc_sampling.tmh" #endif #endif -#if (PHYDM_LA_MODE_SUPPORT == 1) - -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - -#if WPP_SOFTWARE_TRACE - #include "phydm_adc_sampling.tmh" -#endif - -#endif - -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -boolean -phydm_la_buffer_allocate( - void *dm_void -) +#if RTL8814B_SUPPORT +boolean phydm_la_finish_addr_recover_8814B(void *dm_void, u32 *finish_addr) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rt_adcsmp *adc_smp = &dm->adcsmp; -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + boolean recover_success; + + if (dm->support_ic_type != ODM_RTL8814B) + return false; + + if (smp->la_buff_mode == ADCSMP_BUFF_HALF) { + if (*finish_addr < 0x4000) /*0~0x4000*/ + *finish_addr += 0x8000; + + recover_success = true; + } else { + if (*finish_addr >= 0x4000 && *finish_addr < 0x8000) + recover_success = true; + else + recover_success = false; + } + pr_debug("[8814B] recover_success=(%d)\n", recover_success); + + return recover_success; +} #endif - struct rt_adcsmp_string *adc_smp_buf = &adc_smp->adc_smp_buf; - boolean ret = true; + +#if RTL8198F_SUPPORT +void phydm_la_pre_run(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct rt_adcsmp_string *buf = &smp->adc_smp_buf; + u8 i = 0; + u8 tmp = 0; + u8 target_polling_bit = BIT(1); + + if (!(dm->support_ic_type & ODM_RTL8198F)) + return; + + if (smp->la_trig_mode == PHYDM_ADC_MAC_TRIG) + return; + + /*pre run */ + /*force to bb trigger*/ + odm_set_mac_reg(dm, R_0x7c0, BIT(3), 0); + /*dma_trig_and(AND1) output 1*/ + odm_set_bb_reg(dm, R_0x1ce4, 0xf0000000, 0x0); + /*r_dma_trigger_AND1_inv = 1*/ + odm_set_bb_reg(dm, R_0x1ce8, BIT5, 1); /*@AND 1 val*/ + /* polling bit for BB ADC mode */ + odm_set_mac_reg(dm, 0x7c0, BIT(1), 1); + + pr_debug("buf[end:start]=(0x%x~0x%x)\n", buf->end_pos, buf->start_pos); + + do { + tmp = odm_read_1byte(dm, R_0x7c0); + if ((tmp & target_polling_bit) == false) { + pr_debug("LA pre-run fail.\n"); + phydm_la_stop(dm); + phydm_release_bb_dbg_port(dm); + } else { + ODM_delay_ms(100); + pr_debug("LA pre-run while_cnt = %d.\n", i); + i++; + } + } while (i < 3); + + /*r_dma_trigger_AND1_inv = 0*/ + odm_set_bb_reg(dm, R_0x1ce8, BIT5, 0); /*@AND 1 val*/ + + if (smp->la_trig_mode == PHYDM_ADC_MAC_TRIG) + odm_set_mac_reg(dm, R_0x7c0, BIT(3), 1); +} +#endif + +#if (RTL8821C_SUPPORT | RTL8195B_SUPPORT) +void +phydm_la_clk_en(void *dm_void, boolean enable) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 val = (enable) ? 1 : 0; + + if (!(dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C))) + return; + + if (dm->support_ic_type == ODM_RTL8821C && + dm->cut_version == ODM_CUT_A) + return; + + odm_set_bb_reg(dm, R_0x95c, BIT(23), val); +} +#endif + +#if (RTL8197F_SUPPORT) +void +phydm_la_stop_dma_8197f(void *dm_void, enum phydm_backup_type opt) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + + if (dm->support_ic_type != ODM_RTL8197F) + return; + + if (opt == PHYDM_BACKUP) { + /*Stop DMA*/ + smp->backup_dma = odm_get_mac_reg(dm, R_0x300, 0xffff); + odm_set_mac_reg(dm, R_0x300, 0x7fff, 0x7fff); + } else { /*restore*/ + /*Resume DMA*/ + odm_set_mac_reg(dm, R_0x300, 0x7fff, smp->backup_dma); + } +} +#endif + +#ifdef PHYDM_COMPILE_LA_STORE_IN_IMEM +void +phydm_la_mv_data_2_tx_buffer(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct rt_adcsmp_string *buf = &smp->adc_smp_buf; + + if (!(dm->support_ic_type & PHYDM_LA_STORE_IN_IMEM_IC)) + return; + + pr_debug("98F GetTxPktBuf from iMEM\n"); + odm_set_bb_reg(dm, R_0x7c0, BIT(0), 0x0); /*Disable LA mode HW block*/ + + /* 98F LA memory loccation is separate from normal + * driver use, DMA is no longer required to stop + */ + #if (RTL8197F_SUPPORT) + phydm_la_stop_dma_8197f(dm, PHYDM_BACKUP); + #endif + + /* @move LA mode content from IMEM to TxPktBuffer + * Source : OCPBASE_IMEM 0x00000000 + * Destination : OCPBASE_TXBUF 0x18780000 + * Length : 64K + */ + GET_HAL_INTERFACE(dm->priv)->init_ddma_handler(dm->priv, + OCPBASE_IMEM, + OCPBASE_TXBUF + + buf->start_pos, + 0x10000); +} +#endif + +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + +void phydm_la_bb_adv_reset_jgr3(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct la_adv_trig *adv = &smp->adv_trig_table; + +#if 1 + odm_memory_set(dm, adv, 0, sizeof(struct la_adv_trig)); +#else + adv->la_en_new_bbtrigger = false; + adv->la_ori_bb_dis = false; + adv->la_and1_sel = 0; + adv->la_and1_val = 0; + adv->la_and2_sel = 0; + adv->la_and2_val = 0; + adv->la_and3_sel = 0; + adv->la_and3_val = 0; + adv->la_and4_mask = 0; + adv->la_and4_bitmap = 0; +#endif +} + +void phydm_la_bb_adv_trig_setting_jgr3(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct la_adv_trig *adv = &smp->adv_trig_table; + boolean adv_bb_trig_en = adv->la_en_new_bbtrigger; + + pr_debug(" *ADV BB-trig = %d\n", adv_bb_trig_en); + + if (!adv_bb_trig_en) { /*normal LA mode & back to default*/ + /*@AND0*/ + odm_set_bb_reg(dm, R_0x1ce4, BIT(27), 0); + + /*@AND1*/ + odm_set_bb_reg(dm, R_0x1ce4, MASKH4BITS, 0); + odm_set_bb_reg(dm, R_0x1ce8, BIT(5), 0); /*@AND 1 inv*/ + /*@AND2*/ + odm_set_bb_reg(dm, R_0x1ce8, 0x3c0, 0); + odm_set_bb_reg(dm, R_0x1ce8, BIT(15), 0); /*@AND 2 inv*/ + /*@AND3*/ + odm_set_bb_reg(dm, R_0x1ce8, 0xf0000, 0); + odm_set_bb_reg(dm, R_0x1ce8, BIT(25), 0); /*@AND 3 inv*/ + /*@AND4*/ + odm_set_bb_reg(dm, R_0x1cf0, MASKDWORD, 0); /*@AND 4 mask en*/ + odm_set_bb_reg(dm, R_0x1ce8, BIT(26), 0); /*@AND 4 inv*/ + } else { + /* @AND0 */ + /*path 1 default: enable ori. BB trigger*/ + odm_set_bb_reg(dm, R_0x1ce4, BIT(27), + (adv->la_ori_bb_dis ? 1 : 0)); + + /* @AND1 */ + odm_set_bb_reg(dm, R_0x1ce8, BIT(5), adv->la_and1_inv); + odm_set_bb_reg(dm, R_0x1ce4, MASKH4BITS, adv->la_and1_sel); + odm_set_bb_reg(dm, R_0x1ce8, 0x1f, adv->la_and1_val); + + /* @AND2 */ + odm_set_bb_reg(dm, R_0x1ce8, BIT(15), adv->la_and2_inv); + odm_set_bb_reg(dm, R_0x1ce8, 0x3c0, adv->la_and2_sel); + odm_set_bb_reg(dm, R_0x1ce8, 0x7c00, adv->la_and2_val); + + /* @AND3 */ + odm_set_bb_reg(dm, R_0x1ce8, BIT(25), adv->la_and3_inv); + odm_set_bb_reg(dm, R_0x1ce8, 0xf0000, adv->la_and3_sel); + odm_set_bb_reg(dm, R_0x1ce8, 0x1f00000, adv->la_and3_val); + + /* @AND4 */ + odm_set_bb_reg(dm, R_0x1ce8, BIT(26), adv->la_and4_inv); + odm_set_bb_reg(dm, R_0x1cf0, MASKDWORD, adv->la_and4_mask); + odm_set_bb_reg(dm, R_0x1cec, MASKDWORD, adv->la_and4_bitmap); + } +} + +void phydm_la_bb_adv_cmd_show_jgr3(void *dm_void, u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct la_adv_trig *adv = &smp->adv_trig_table; + + PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, + " *And0 Disable=%d\n", adv->la_ori_bb_dis); + PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, + " *And1{sel,val,inv}={0x%x,0x%x,%d}\n *And2{sel,val,inv}={0x%x,0x%x,%d}\n *And3{sel,val,inv}={0x%x,0x%x,%d}\n", + adv->la_and1_sel, adv->la_and1_val, adv->la_and1_inv, + adv->la_and2_sel, adv->la_and2_val, adv->la_and2_inv, + adv->la_and3_sel, adv->la_and3_val, adv->la_and3_inv); + PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, + " *And4{mask,bitmap,inv}={0x%x,0x%x,%d}\n", + adv->la_and4_mask, adv->la_and4_bitmap, adv->la_and4_inv); +} + +void phydm_la_bb_adv_cmd_jgr3(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct la_adv_trig *adv = &smp->adv_trig_table; + u32 var1[10] = {0}; + u32 adv_trig_en; + + if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) + return; + + if ((strcmp(input[2], "show") == 0)) { + phydm_la_bb_adv_cmd_show_jgr3(dm, _used, output, _out_len); + return; + } + + PHYDM_SSCANF(input[2], DCMD_HEX, &var1[0]); + PHYDM_SSCANF(input[3], DCMD_HEX, &var1[1]); + PHYDM_SSCANF(input[4], DCMD_HEX, &var1[2]); + PHYDM_SSCANF(input[5], DCMD_HEX, &var1[3]); + PHYDM_SSCANF(input[6], DCMD_HEX, &var1[4]); + + adv_trig_en = var1[0]; + + if (adv_trig_en != 1) { + PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, + "Back to Ori-BB-trig\n"); + phydm_la_bb_adv_reset_jgr3(dm); + return; + } + + adv->la_en_new_bbtrigger = true; + + if (var1[1] == 0) { + adv->la_ori_bb_dis = (boolean)var1[2]; + } else if (var1[1] == 1) { + adv->la_and1_sel = (u8)var1[2]; + adv->la_and1_val = (u8)var1[3]; + adv->la_and1_inv = (boolean)var1[4]; + } else if (var1[1] == 2) { + adv->la_and2_sel = (u8)var1[2]; + adv->la_and2_val = (u8)var1[3]; + adv->la_and2_inv = (boolean)var1[4]; + } else if (var1[1] == 3) { + adv->la_and3_sel = (u8)var1[2]; + adv->la_and3_val = (u8)var1[3]; + adv->la_and2_inv = (boolean)var1[4]; + } else if (var1[1] == 4) { + adv->la_and4_mask = (u8)var1[2]; + adv->la_and4_bitmap = (u8)var1[3]; + adv->la_and4_inv = (boolean)var1[4]; + } + + PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, + "[Adv_trig_en=%d]\n\n", adv_trig_en); + + phydm_la_bb_adv_cmd_show_jgr3(dm, _used, output, _out_len); +} + +#endif + +void +phydm_la_buffer_print(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct rt_adcsmp_string *buf = &smp->adc_smp_buf; + u32 i; + u32 idx; + + if (!buf->octet || buf->length == 0 || buf->length < smp->smp_number) + return; + + pr_debug("[LA Data Dump] smp_number = %d\n", smp->smp_number); + + for (i = 0; i < smp->smp_number; i++) { + idx = i << 1; + + #if 0 /*((DM_ODM_SUPPORT_TYPE & ODM_WIN) && !DBG)*/ + /*WIN driver free build*/ + RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("%08x%08x\n", + buf->octet[idx], buf->octet[idx + 1])); + #else + pr_debug("%08x%08x\n", buf->octet[idx], buf->octet[idx + 1]); + #endif + } + pr_debug("Dump Finished\n\n"); +} + +void +phydm_la_buffer_release(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct rt_adcsmp_string *buf = &smp->adc_smp_buf; + + if (buf->length != 0x0) { + odm_free_memory(dm, buf->octet, buf->length); + buf->length = 0x0; + } +} + +boolean +phydm_la_buffer_allocate(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + void *adapter = dm->adapter; + #endif + struct rt_adcsmp_string *buf = &smp->adc_smp_buf; + boolean ret = true; pr_debug("[LA mode BufferAllocate]\n"); - if (adc_smp_buf->length == 0) { -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - if (PlatformAllocateMemoryWithZero(adapter, (void **)&adc_smp_buf->octet, adc_smp_buf->buffer_size) != RT_STATUS_SUCCESS) + if (buf->length == 0) { + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + if (PlatformAllocateMemoryWithZero(adapter, (void **)& + buf->octet, + buf->buffer_size) != + RT_STATUS_SUCCESS) ret = false; -#else - odm_allocate_memory(dm, (void **)&adc_smp_buf->octet, adc_smp_buf->buffer_size); + #else + odm_allocate_memory(dm, (void **)&buf->octet, buf->buffer_size); - if (!adc_smp_buf->octet) + if (!buf->octet) ret = false; -#endif + #endif if (ret) - adc_smp_buf->length = adc_smp_buf->buffer_size; + buf->length = buf->buffer_size; } return ret; } -#endif -void -phydm_la_get_tx_pkt_buf( - void *dm_void -) +void phydm_la_access_tx_pkt_buf(void *dm_void, u32 addr, u32 buff_idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - struct rt_adcsmp_string *adc_smp_buf = &adc_smp->adc_smp_buf; - u32 i = 0, value32, data_l = 0, data_h = 0; - u32 addr, finish_addr; - u32 end_addr = (adc_smp_buf->start_pos + adc_smp_buf->buffer_size) - 1; /*end_addr = 0x3ffff;*/ - boolean is_round_up; - static u32 page = 0xFF; - u32 smp_cnt = 0, smp_number = 0, addr_8byte = 0; - u8 backup_dma = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct rt_adcsmp_string *buf = &smp->adc_smp_buf; + u32 page; + u32 data_l = 0, data_h = 0; - odm_memory_set(dm, adc_smp_buf->octet, 0, adc_smp_buf->length); - odm_write_1byte(dm, 0x0106, 0x69); + #if (RTL8192F_SUPPORT) + if (dm->support_ic_type & ODM_RTL8192F) { + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + indirect_access_sdram_8192f(dm->adapter, TX_PACKET_BUFFER, + TRUE, (u16)addr >> 3, 0, + &data_h, &data_l); + #else + odm_write_1byte(dm, R_0x0106, 0x69); + odm_set_bb_reg(dm, R_0x0140, MASKDWORD, addr >> 3); + data_l = odm_get_bb_reg(dm, R_0x0144, MASKDWORD); + data_h = odm_get_bb_reg(dm, R_0x0148, MASKDWORD); + odm_write_1byte(dm, R_0x0106, 0x0); + #endif + } else + #endif + { + /* Reg140=0x780+(addr>>12), + * addr=0x30~0x3F, total 16 pages + */ + page = addr >> 12; + if (page != smp->txff_page) { + smp->txff_page = page; + odm_set_bb_reg(dm, R_0x0140, MASKLWORD, 0x780 + page); + } + data_l = odm_read_4byte(dm, 0x8000 + (addr & 0xfff)); + data_h = odm_read_4byte(dm, 0x8000 + (addr & 0xfff) + 4); + } + + buf->octet[buff_idx] = data_h; + buf->octet[buff_idx + 1] = data_l; +} + +void phydm_la_get_tx_pkt_buf(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct rt_adcsmp_string *buf = &smp->adc_smp_buf; + u32 i = 0, value32 = 0; + u32 addr = 0, finish_addr = 0; /* @(unit: 8Byte)*/ + boolean is_round_up = false; + u32 addr_8byte = 0; + u32 round_up_point = 0; + #if (RTL8814B_SUPPORT) + boolean recover_success = true; + #endif + + odm_memory_set(dm, buf->octet, 0, buf->length); pr_debug("GetTxPktBuf\n"); - value32 = odm_read_4byte(dm, 0x7c0); - is_round_up = (boolean)((value32 & BIT(31)) >> 31); - finish_addr = (value32 & 0x7FFF0000) >> 16; /*Reg7C0[30:16]: finish addr (unit: 8byte)*/ + /*@==== [Get LA Report] ==============================================*/ + if (dm->support_ic_type & ODM_RTL8192F) { + value32 = odm_read_4byte(dm, R_0x7f0); + is_round_up = (boolean)((value32 & BIT(31)) >> 31); + finish_addr = (value32 & 0x7FFF8000) >> 15; /*@16 bit (unit: 8Byte)*/ + } else { + odm_write_1byte(dm, R_0x0106, 0x69); + value32 = odm_read_4byte(dm, R_0x7c0); + is_round_up = (boolean)((value32 & BIT(31)) >> 31); - #if (DM_ODM_SUPPORT_TYPE & ODM_AP) - #if (RTL8197F_SUPPORT) - if (dm->support_ic_type & ODM_RTL8197F) { - odm_set_bb_reg(dm, 0x7c0, BIT(0), 0x0); - - /*Stop DMA*/ - backup_dma = odm_get_mac_reg(dm, 0x300, MASKLWORD); - odm_set_mac_reg(dm, 0x300, 0x7fff, 0x7fff); - - /*move LA mode content from IMEM to TxPktBuffer - Source : OCPBASE_IMEM 0x00000000 - Destination : OCPBASE_TXBUF 0x18780000 - Length : 64K*/ - GET_HAL_INTERFACE(dm->priv)->init_ddma_handler(dm->priv, OCPBASE_IMEM, OCPBASE_TXBUF, 0x10000); - } - #endif - #endif - - if (is_round_up) { - addr = (finish_addr + 1) << 3; - pr_debug("is_round_up = ((%d)), finish_addr=((0x%x)), 0x7c0=((0x%x))\n", is_round_up, finish_addr, value32); - smp_number = ((adc_smp_buf->buffer_size) >> 3); /*Byte to 8Byte (64bit)*/ - } else { - addr = adc_smp_buf->start_pos; - addr_8byte = addr >> 3; - - if (addr_8byte > finish_addr) - smp_number = addr_8byte - finish_addr; + if (dm->support_ic_type & PHYDM_LA_STORE_IN_IMEM_IC) + finish_addr = (value32 & 0x7FFF8000) >> 15; /*@16 bit (unit: 8Byte)*/ else - smp_number = finish_addr - addr_8byte; - - pr_debug("is_round_up = ((%d)), finish_addr=((0x%x * 8Byte)), Start_Addr = ((0x%x * 8Byte)), smp_number = ((%d))\n", is_round_up, finish_addr, addr_8byte, smp_number); - + finish_addr = (value32 & 0x7FFF0000) >> 16; /*@15bit (unit: 8Byte)*/ } - /* - dbg_print("is_round_up = %d, finish_addr=0x%x, value32=0x%x\n", is_round_up, finish_addr, value32); - dbg_print("end_addr = %x, adc_smp_buf->start_pos = 0x%x, adc_smp_buf->buffer_size = 0x%x\n", end_addr, adc_smp_buf->start_pos, adc_smp_buf->buffer_size); - */ - if (dm->support_ic_type & ODM_RTL8197F) { - for (addr = 0x0, i = 0; addr < end_addr; addr += 8, i += 2) { /*64K byte*/ - if ((addr & 0xfff) == 0) - odm_set_bb_reg(dm, 0x0140, MASKLWORD, 0x780 + (addr >> 12)); - data_l = odm_get_bb_reg(dm, 0x8000 + (addr & 0xfff), MASKDWORD); - data_h = odm_get_bb_reg(dm, 0x8000 + (addr & 0xfff) + 4, MASKDWORD); + #if (RTL8814B_SUPPORT) + recover_success = phydm_la_finish_addr_recover_8814B(dm, &finish_addr); + #endif - pr_debug("%08x%08x\n", data_h, data_l); - } + pr_debug("start_addr = ((0x%x)), end_addr = ((0x%x)), buffer_size = ((0x%x))\n", + buf->start_pos, buf->end_pos, buf->buffer_size); + if (is_round_up) { + pr_debug("buf_start(0x%x)|----2---->|finish_addr(0x%x)|----1---->|buf_end(0x%x)\n", + buf->start_pos, finish_addr << 3, buf->end_pos); + addr = (finish_addr + 2) << 3; /*+1 or +2 ??*/ + round_up_point = (buf->end_pos - addr) >> 3; /*@Byte to 8Byte*/ + smp->smp_number = smp->smp_number_max; + pr_debug("is_round_up=(%d), round_up_point=(%d), 0x7c0/0x7F0=(0x%x), smp_number=(%d)\n", + is_round_up, round_up_point, value32, smp->smp_number); } else { - - i = 0; - while (addr != (finish_addr << 3)) { - if (page != (addr >> 12)) { - /*Reg140=0x780+(addr>>12), addr=0x30~0x3F, total 16 pages*/ - page = (addr >> 12); - } - odm_set_bb_reg(dm, 0x0140, MASKLWORD, 0x780 + page); + pr_debug("buf_start(0x%x)|------->|finish_addr(0x%x) |buf_end(0x%x)\n", + buf->start_pos, finish_addr << 3, buf->end_pos); + addr = buf->start_pos; + addr_8byte = addr >> 3; + smp->smp_number = DIFF_2(addr_8byte, finish_addr); - /*pDataL = 0x8000+(addr&0xfff);*/ - data_l = odm_get_bb_reg(dm, 0x8000 + (addr & 0xfff), MASKDWORD); - data_h = odm_get_bb_reg(dm, 0x8000 + (addr & 0xfff) + 4, MASKDWORD); - - #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - adc_smp_buf->octet[i] = data_h; - adc_smp_buf->octet[i + 1] = data_l; - #endif - - #if DBG /*WIN driver check build*/ - pr_debug("%08x%08x\n", data_h, data_l); - #else /*WIN driver free build*/ - #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("%08x%08x\n", adc_smp_buf->octet[i], adc_smp_buf->octet[i + 1])); - #endif - #endif - - i = i + 2; - - if ((addr + 8) >= end_addr) - addr = adc_smp_buf->start_pos; - else - addr = addr + 8; - - smp_cnt++; - if (smp_cnt >= (smp_number - 1)) - break; - } - pr_debug("smp_cnt = ((%d))\n", smp_cnt); - - #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("smp_cnt = ((%d))\n", smp_cnt)); - #endif + pr_debug("is_round_up=(%d), smp_number=(%d)\n", + is_round_up, smp->smp_number); } - #if (DM_ODM_SUPPORT_TYPE & ODM_AP) + /*@==== [Get LA Patterns in TXFF] ====================================*/ + #ifdef PHYDM_COMPILE_LA_STORE_IN_IMEM + phydm_la_mv_data_2_tx_buffer(dm); + #endif + + #if (RTL8814B_SUPPORT) + if ((dm->support_ic_type & ODM_RTL8814B) && !recover_success) { + addr = buf->start_pos; + smp->smp_number = smp->smp_number_max; + } + #endif + + for (i = 0; i < smp->smp_number; i++) { + phydm_la_access_tx_pkt_buf(dm, addr, i << 1); + addr += 8; + + if (addr >= buf->end_pos) + addr = buf->start_pos; /*Ring buffer*/ + } + + /*@==== [Print LA Patterns] ==========================================*/ + if (smp->is_la_print) + phydm_la_buffer_print(dm); + #if (RTL8197F_SUPPORT) - if (dm->support_ic_type & ODM_RTL8197F) - odm_set_mac_reg(dm, 0x300, 0x7fff, backup_dma); /*Resume DMA*/ - #endif + phydm_la_stop_dma_8197f(dm, PHYDM_RESTORE); #endif } -void -phydm_la_mode_set_mac_iq_dump( - void *dm_void -) +void phydm_la_set_trig_src(void *dm_void, u8 la_trig_mode) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - u32 reg_value; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 reg = (dm->support_ic_type == ODM_RTL8192F) ? R_0x7f0 : R_0x7c0; - odm_write_1byte(dm, 0x7c0, 0); /*clear all 0x7c0*/ - odm_set_mac_reg(dm, 0x7c0, BIT(0), 1); /*Enable LA mode HW block*/ + if (la_trig_mode == PHYDM_ADC_MAC_TRIG) + odm_set_mac_reg(dm, reg, BIT(3), 1); + else + odm_set_mac_reg(dm, reg, BIT(3), 0); +} - if (adc_smp->la_trig_mode == PHYDM_MAC_TRIG) { - adc_smp->is_bb_trigger = 0; - odm_set_mac_reg(dm, 0x7c0, BIT(2), 1); /*polling bit for MAC mode*/ - odm_set_mac_reg(dm, 0x7c0, BIT(4) | BIT(3), adc_smp->la_trigger_edge); /*trigger mode for MAC*/ - - pr_debug("[MAC_trig] ref_mask = ((0x%x)), ref_value = ((0x%x)), dbg_port = ((0x%x))\n", adc_smp->la_mac_mask_or_hdr_sel, adc_smp->la_trig_sig_sel, adc_smp->la_dbg_port); - /*[Set MAC Debug Port]*/ - odm_set_mac_reg(dm, 0xF4, BIT(16), 1); - odm_set_mac_reg(dm, 0x38, 0xff0000, adc_smp->la_dbg_port); - odm_set_mac_reg(dm, 0x7c4, MASKDWORD, adc_smp->la_mac_mask_or_hdr_sel); - odm_set_mac_reg(dm, 0x7c8, MASKDWORD, adc_smp->la_trig_sig_sel); +void phydm_la_set_mac_iq_dump(void *dm_void, boolean impossible_trig_condi) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + u32 reg_value = 0; + u32 reg1 = 0, reg2 = 0, reg3 = 0; + if (dm->support_ic_type & ODM_RTL8192F) { + reg1 = R_0x7f0; + reg2 = R_0x7f4; + reg3 = R_0x7f8; } else { - adc_smp->is_bb_trigger = 1; - odm_set_mac_reg(dm, 0x7c0, BIT(1), 1); /*polling bit for BB ADC mode*/ + reg1 = R_0x7c0; + reg2 = R_0x7c4; + reg3 = R_0x7c8; + } - if (adc_smp->la_trig_mode == PHYDM_ADC_MAC_TRIG) { - odm_set_mac_reg(dm, 0x7c0, BIT(3), 1); /*polling bit for MAC trigger event*/ - odm_set_mac_reg(dm, 0x7c0, BIT(7) | BIT(6), adc_smp->la_trig_sig_sel); + odm_write_1byte(dm, reg1, 0); /*@clear all reg1*/ + /*@Enable LA mode HW block*/ + odm_set_mac_reg(dm, reg1, BIT(0), 1); - if (adc_smp->la_trig_sig_sel == ADCSMP_TRIG_REG) - odm_set_mac_reg(dm, 0x7c0, BIT(5), 1); /* manual trigger 0x7C0[5] = 0->1*/ + if (smp->la_trig_mode == PHYDM_MAC_TRIG) { + smp->la_dump_mode = LA_MAC_DBG_DUMP; + /*polling bit for MAC mode*/ + odm_set_mac_reg(dm, reg1, BIT(2), 1); + /*trigger mode for MAC*/ + odm_set_mac_reg(dm, reg1, 0x18, smp->la_trigger_edge); + pr_debug("[MAC_trig] ref_mask=(0x%x), ref_value=(0x%x), dbg_port =(0x%x)\n", + smp->la_mac_mask_or_hdr_sel, smp->la_trig_sig_sel, + smp->la_dbg_port); + /*@[Set MAC Debug Port]*/ + odm_set_mac_reg(dm, R_0xf4, BIT(16), 1); + odm_set_mac_reg(dm, R_0x38, 0xff0000, smp->la_dbg_port); + odm_set_mac_reg(dm, reg2, MASKDWORD, + smp->la_mac_mask_or_hdr_sel); + odm_set_mac_reg(dm, reg3, MASKDWORD, smp->la_trig_sig_sel); + } else { + smp->la_dump_mode = LA_BB_ADC_DUMP; + + if (smp->la_trig_mode == PHYDM_ADC_MAC_TRIG) { + /*polling bit for MAC trigger event*/ + if (impossible_trig_condi) + phydm_la_set_trig_src(dm, PHYDM_ADC_BB_TRIG); + else + phydm_la_set_trig_src(dm, PHYDM_ADC_MAC_TRIG); + + odm_set_mac_reg(dm, reg1, 0xc0, smp->la_trig_sig_sel); + + if (smp->la_trig_sig_sel == ADCSMP_TRIG_REG) { + /* @manual trigger reg1[5] = 0->1*/ + odm_set_mac_reg(dm, reg1, BIT(5), 1); + } + } + /*polling bit for BB ADC mode*/ + odm_set_mac_reg(dm, reg1, BIT(1), 1); + } + + reg_value = odm_get_bb_reg(dm, reg1, 0xff); + pr_debug("4. [Set MAC IQ dump] 0x%x[7:0]=(0x%x)\n", reg1, reg_value); + + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, + ("4. [Set MAC IQ dump] 0x%x[7:0]=(0x%x)\n", reg1, + reg_value)); + #endif +} + +void phydm_la_set_bb_dbg_port(void *dm_void, boolean impossible_trig_condi) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + + u8 trig_mode = smp->la_trig_mode; + u32 trig_sel = smp->la_trig_sig_sel; + u32 dbg_port = smp->la_dbg_port; + + if (trig_mode == PHYDM_MAC_TRIG) + trig_sel = 0; /*@ignore this setting*/ + + /*set BB debug port*/ + if (impossible_trig_condi) { + dbg_port = 0xf; + trig_sel = 0; + pr_debug("[BB Setting] fake-trigger!\n"); + } + + if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbg_port)) { + pr_debug(" *Set dbg_port=(0x%x)\n", dbg_port); + } else { + dbg_port = phydm_get_bb_dbg_port_idx(dm); + pr_debug("[Set dbg_port fail!] Curr-DbgPort=0x%x\n", dbg_port); + } + + /*@debug port bit*/ + if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + odm_set_bb_reg(dm, R_0x95c, 0x1f, trig_sel); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + odm_set_bb_reg(dm, R_0x1ce4, 0x3e000, trig_sel); + #endif + } else { + odm_set_bb_reg(dm, R_0x9a0, 0x1f, trig_sel); + } + + if (smp->la_trig_mode == PHYDM_ADC_BB_TRIG) { + pr_debug(" *Set dbg_port[BIT] = %d\n", trig_sel); + + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, + (" *Set dbg_port[BIT] = %d\n", trig_sel)); + #endif + } +} + +void phydm_la_set_bb(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + + u8 trig_mode = smp->la_trig_mode; + u8 edge = smp->la_trigger_edge; + u8 smp_rate = smp->la_smp_rate; + u8 dma_type = smp->la_dma_type; + u32 dbg_port_hdr_sel = 0; + char *trig_mode_word = NULL; + + pr_debug("3. [BB Setting] mode=(%d), Edge=(%s), smp_rate=(%dM), Dma_type=(%d)\n", + trig_mode, + (edge == 0) ? "P" : "N", 80 >> smp_rate, dma_type); + + if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + if (trig_mode == PHYDM_ADC_RF0_TRIG) + dbg_port_hdr_sel = 9; /*@DBGOUT_RFC_a[31:0]*/ + else if (trig_mode == PHYDM_ADC_RF1_TRIG) + dbg_port_hdr_sel = 8; /*@DBGOUT_RFC_b[31:0]*/ + else if ((trig_mode == PHYDM_ADC_BB_TRIG) || + (trig_mode == PHYDM_ADC_MAC_TRIG)) { + if (smp->la_mac_mask_or_hdr_sel <= 0xf) + dbg_port_hdr_sel = smp->la_mac_mask_or_hdr_sel; + else + dbg_port_hdr_sel = 0; + } + + phydm_bb_dbg_port_header_sel(dm, dbg_port_hdr_sel); + + odm_set_bb_reg(dm, R_0x8b4, BIT(7), 1);/*@update rpt every pkt*/ + odm_set_bb_reg(dm, R_0x95c, 0xf00, dma_type); + /*@0: posedge, 1: negedge*/ + odm_set_bb_reg(dm, R_0x95c, BIT(31), edge); + odm_set_bb_reg(dm, R_0x95c, 0xe0, smp_rate); + /* @(0:) '80MHz' + * (1:) '40MHz' + * (2:) '20MHz' + * (3:) '10MHz' + * (4:) '5MHz' + * (5:) '2.5MHz' + * (6:) '1.25MHz' + * (7:) '160MHz (for BW160 ic)' + */ + #if (RTL8821C_SUPPORT | RTL8195B_SUPPORT) + phydm_la_clk_en(dm, true); + #endif + + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + odm_set_bb_reg(dm, R_0x1eb4, BIT(23), 0x1);/*@update rpt every pkt*/ + /*@MAC-PHY timing*/ + odm_set_bb_reg(dm, R_0x1ce4, BIT(7) | BIT(6), 0); + odm_set_bb_reg(dm, R_0x1cf4, BIT(23), 1); /*@LA mode on*/ + odm_set_bb_reg(dm, R_0x1ce4, 0x3f, dma_type); + /*@0: posedge, 1: negedge ??*/ + odm_set_bb_reg(dm, R_0x1ce4, BIT(26), edge); + odm_set_bb_reg(dm, R_0x1ce4, 0x700, smp_rate); + + phydm_la_bb_adv_trig_setting_jgr3(dm); + #endif + } else { + if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) + odm_set_bb_reg(dm, R_0xd00, BIT(26), 0x1); /*@update rpt every pkt*/ + + #if (RTL8192F_SUPPORT) + if ((dm->support_ic_type & ODM_RTL8192F)) + /*@LA reset HW block enable for true-mac asic*/ + odm_set_bb_reg(dm, R_0x9a0, BIT(15), 1); + #endif + + odm_set_bb_reg(dm, R_0x9a0, 0xf00, dma_type); + /*@0: posedge, 1: negedge*/ + odm_set_bb_reg(dm, R_0x9a0, BIT(31), edge); + odm_set_bb_reg(dm, R_0x9a0, 0xe0, smp_rate); + /* @(0:) '80MHz' + * (1:) '40MHz' + * (2:) '20MHz' + * (3:) '10MHz' + * (4:) '5MHz' + * (5:) '2.5MHz' + * (6:) '1.25MHz' + * (7:) '160MHz (for BW160 ic)' + */ + } +} + +void phydm_la_set_mac_trigger_time(void *dm_void, u32 trigger_time_mu_sec) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 time_unit_num = 0; + u32 unit = 0; + + if (trigger_time_mu_sec < 128) + unit = 0; /*unit: 1mu sec*/ + else if (trigger_time_mu_sec < 256) + unit = 1; /*unit: 2mu sec*/ + else if (trigger_time_mu_sec < 512) + unit = 2; /*unit: 4mu sec*/ + else if (trigger_time_mu_sec < 1024) + unit = 3; /*unit: 8mu sec*/ + else if (trigger_time_mu_sec < 2048) + unit = 4; /*unit: 16mu sec*/ + else if (trigger_time_mu_sec < 4096) + unit = 5; /*unit: 32mu sec*/ + else if (trigger_time_mu_sec < 8192) + unit = 6; /*unit: 64mu sec*/ + + time_unit_num = (u8)(trigger_time_mu_sec >> unit); + + pr_debug("2. [Set Trigger Time] Trig_Time = ((%d)) * unit = ((2^%d us))\n", + time_unit_num, unit); + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ( + "3. [Set Trigger Time] Trig_Time = ((%d)) * unit = ((2^%d us))\n", + time_unit_num, unit)); + #endif + + if (dm->support_ic_type & ODM_RTL8192F) { + odm_set_mac_reg(dm, R_0x7fc, BIT(2) | BIT(1) | BIT(0), unit); + odm_set_mac_reg(dm, R_0x7f0, 0x7f00, (time_unit_num & 0x7f)); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + odm_set_mac_reg(dm, R_0x7cc, BIT(18) | BIT(17) | BIT(16), unit); + odm_set_mac_reg(dm, R_0x7c0, 0x7f00, (time_unit_num & 0x7f)); + #endif + } else { + odm_set_mac_reg(dm, R_0x7cc, BIT(20) | BIT(19) | BIT(18), unit); + odm_set_mac_reg(dm, R_0x7c0, 0x7f00, (time_unit_num & 0x7f)); + } +} + +void phydm_la_set_buff_mode(void *dm_void, enum la_buff_mode mode) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct rt_adcsmp_string *buf = &smp->adc_smp_buf; +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) + struct rtl8192cd_priv *priv = dm->priv; + u8 normal_LA_on = priv->pmib->miscEntry.normal_LA_on; +#endif + u32 buff_size_base = 0; + u32 end_pos_tmp = 0; + + smp->la_buff_mode = mode; + switch (dm->support_ic_type) { + case ODM_RTL8814A: + buff_size_base = 0x10000; + end_pos_tmp = 0x40000; + break; + case ODM_RTL8822B: + case ODM_RTL8822C: + case ODM_RTL8812F: + buff_size_base = 0x20000; /*@WIN: TX_FIFO_SIZE_LA_8822C*/ + end_pos_tmp = 0x40000; + break; + case ODM_RTL8814B: + buff_size_base = 0x30000; + end_pos_tmp = 0x60000; + break; +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) + case ODM_RTL8197F: + case ODM_RTL8198F: + case ODM_RTL8197G: + buff_size_base = 0x10000; + end_pos_tmp = (normal_LA_on == 1) ? 0x20000 : 0x10000; + break; +#endif + case ODM_RTL8192F: + buff_size_base = 0xE000; + end_pos_tmp = 0x10000; + break; + case ODM_RTL8821C: + buff_size_base = 0x8000; + end_pos_tmp = 0x10000; + break; + case ODM_RTL8195B: + buff_size_base = 0x4000; + end_pos_tmp = 0x8000; + break; + default: + pr_debug("[%s] Warning!", __func__); + break; + } + + buf->buffer_size = buff_size_base; + + if (dm->support_ic_type & FULL_BUFF_MODE_SUPPORT) { + if (mode == ADCSMP_BUFF_HALF) { + odm_set_mac_reg(dm, R_0x7cc, BIT(30), 0); + } else { + buf->buffer_size = buf->buffer_size << 1; + odm_set_mac_reg(dm, R_0x7cc, BIT(30), 1); } } - reg_value = odm_get_bb_reg(dm, 0x7c0, 0xff); - pr_debug("4. [Set MAC IQ dump] 0x7c0[7:0] = ((0x%x))\n", reg_value); -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("4. [Set MAC IQ dump] 0x7c0[7:0] = ((0x%x))\n", reg_value)); -#endif + buf->end_pos = end_pos_tmp; + buf->start_pos = end_pos_tmp - buf->buffer_size; + smp->smp_number_max = buf->buffer_size >> 3; + PHYDM_DBG(dm, DBG_TMP, + "start_addr=(0x%x), end_addr=(0x%x), buffer_size=(0x%x), smp_number_max=(%d)\n", + buf->start_pos, buf->end_pos, buf->buffer_size, + smp->smp_number_max); } -void -phydm_adc_smp_start( - void *dm_void -) +void phydm_la_adc_smp_start(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - u8 tmp_u1b; - u8 while_cnt = 0; - u8 polling_ok = false, target_polling_bit; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + u8 tmp_u1b = 0; + u8 i = 0; + u8 polling_bit = 0; + boolean polling_ok = false; + boolean impossible_trig_condi = (smp->en_fake_trig) ? true : false; - phydm_la_mode_bb_setting(dm); - phydm_la_mode_set_trigger_time(dm, adc_smp->la_trigger_time); + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, + ("1. [BB Setting] Mode=(%d), DbgPort=(0x%x), Edge=(%d), SmpRate=(%d), Trig_Sel=(0x%x), Dma_type=(%d)\n", + smp->la_trig_mode, smp->la_dbg_port, smp->la_trigger_edge, + smp->la_smp_rate, smp->la_trig_sig_sel, smp->la_dma_type)); + #endif + pr_debug("1. [BB Setting] trig_mode = ((%d)), dbg_port = ((0x%x)), Trig_Edge = ((%d)), smp_rate = ((%d)), Trig_Sel = ((0x%x)), Dma_type = ((%d))\n", + smp->la_trig_mode, smp->la_dbg_port, smp->la_trigger_edge, + smp->la_smp_rate, smp->la_trig_sig_sel, smp->la_dma_type); - if (dm->support_ic_type & ODM_RTL8197F) - odm_set_bb_reg(dm, 0xd00, BIT(26), 0x1); - else { /*for 8814A and 8822B?*/ - odm_write_1byte(dm, 0x8b4, 0x80); - /* odm_set_bb_reg(dm, 0x8b4, BIT(7), 1); */ - } - - phydm_la_mode_set_mac_iq_dump(dm); + phydm_la_set_mac_trigger_time(dm, smp->la_trigger_time); + phydm_la_set_bb(dm); + phydm_la_set_bb_dbg_port(dm, impossible_trig_condi); + phydm_la_set_mac_iq_dump(dm, impossible_trig_condi); #if (DM_ODM_SUPPORT_TYPE & ODM_AP) watchdog_stop(dm->priv); #endif - target_polling_bit = (adc_smp->is_bb_trigger) ? BIT(1) : BIT(2); - do { /*Polling time always use 100ms, when it exceed 2s, break while loop*/ - tmp_u1b = odm_read_1byte(dm, 0x7c0); + if (impossible_trig_condi) { + ODM_delay_ms(100); + phydm_la_set_bb_dbg_port(dm, false); - if (adc_smp->adc_smp_state != ADCSMP_STATE_SET) { - pr_debug("[state Error] adc_smp_state != ADCSMP_STATE_SET\n"); + if (smp->la_trig_mode == PHYDM_ADC_MAC_TRIG) { + phydm_la_set_trig_src(dm, PHYDM_ADC_MAC_TRIG); + } + } +#if RTL8198F_SUPPORT + phydm_la_pre_run(dm); +#endif + polling_bit = (smp->la_dump_mode == LA_BB_ADC_DUMP) ? BIT(1) : BIT(2); + do { /*Polling time always use 100ms, when it exceed 2s, break loop*/ + if (dm->support_ic_type & ODM_RTL8192F) + tmp_u1b = odm_read_1byte(dm, R_0x7f0); + else + tmp_u1b = odm_read_1byte(dm, R_0x7c0); + + pr_debug("[%d] polling rpt=((0x%x))\n", i, tmp_u1b); + + if (smp->adc_smp_state != ADCSMP_STATE_SET) { + pr_debug("[state Error] state != ADCSMP_STATE_SET\n"); break; - } else if (tmp_u1b & target_polling_bit) { + } else if (tmp_u1b & polling_bit) { ODM_delay_ms(100); - while_cnt = while_cnt + 1; + i++; continue; } else { - pr_debug("[LA Query OK] polling_bit=((0x%x))\n", target_polling_bit); + pr_debug("[LA Query OK] polling_bit=%d\n", polling_bit); polling_ok = true; break; } - } while (while_cnt < 20); + } while (i < 20); - if (adc_smp->adc_smp_state == ADCSMP_STATE_SET) { + if (smp->adc_smp_state == ADCSMP_STATE_SET) { if (polling_ok) phydm_la_get_tx_pkt_buf(dm); else @@ -308,130 +958,367 @@ phydm_adc_smp_start( watchdog_resume(dm->priv); #endif -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - if (adc_smp->adc_smp_state == ADCSMP_STATE_SET) - adc_smp->adc_smp_state = ADCSMP_STATE_QUERY; -#endif + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + if (smp->adc_smp_state == ADCSMP_STATE_SET) + smp->adc_smp_state = ADCSMP_STATE_QUERY; + #endif - pr_debug("[LA mode] LA_pattern_count = ((%d))\n", adc_smp->la_count); -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("[LA mode] la_count = ((%d))\n", adc_smp->la_count)); -#endif + pr_debug("[LA mode] la_count = ((%d))\n", smp->la_count); + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, + ("[LA mode] la_count = ((%d))\n", smp->la_count)); + #endif + phydm_la_stop(dm); - adc_smp_stop(dm); - - if (adc_smp->la_count == 0) { + if (smp->la_count == 0) { pr_debug("LA Dump finished ---------->\n\n\n"); phydm_release_bb_dbg_port(dm); - - if ((dm->support_ic_type & ODM_RTL8821C) && (dm->cut_version >= ODM_CUT_B)) - odm_set_bb_reg(dm, 0x95c, BIT(23), 0); + #if (RTL8821C_SUPPORT | RTL8195B_SUPPORT) + phydm_la_clk_en(dm, false); + #endif } else { - adc_smp->la_count--; + smp->la_count--; pr_debug("LA Dump more ---------->\n\n\n"); - adc_smp_set(dm, adc_smp->la_trig_mode, adc_smp->la_trig_sig_sel, adc_smp->la_dma_type, adc_smp->la_trigger_time, 0); + phydm_la_set(dm); + } +} + +void phydm_la_set(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean is_set_success = true; + struct rt_adcsmp *smp = &dm->adcsmp; + + if (smp->adc_smp_state != ADCSMP_STATE_IDLE) + is_set_success = false; + else if (smp->adc_smp_buf.length == 0) + is_set_success = phydm_la_buffer_allocate(dm); + + if (!is_set_success) { + pr_debug("[LA Set Fail] LA_State=(%d)\n", smp->adc_smp_state); + return; } -} + smp->adc_smp_state = ADCSMP_STATE_SET; -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -void -adc_smp_work_item_callback( - void *context -) -{ - void *adapter = (void *)context; - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - - pr_debug("[WorkItem Call back] LA_State=((%d))\n", adc_smp->adc_smp_state); - phydm_adc_smp_start(dm); -} -#endif - -void -adc_smp_set( - void *dm_void, - u8 trig_mode, - u32 trig_sig_sel, - u8 dma_data_sig_sel, - u32 trigger_time, - u16 polling_time -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - boolean is_set_success = true; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - - adc_smp->la_trig_mode = trig_mode; - adc_smp->la_trig_sig_sel = trig_sig_sel; - adc_smp->la_dma_type = dma_data_sig_sel; - adc_smp->la_trigger_time = trigger_time; - -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - if (adc_smp->adc_smp_state != ADCSMP_STATE_IDLE) - is_set_success = false; - else if (adc_smp->adc_smp_buf.length == 0) - is_set_success = phydm_la_buffer_allocate(dm); -#endif - - if (is_set_success) { - adc_smp->adc_smp_state = ADCSMP_STATE_SET; - - pr_debug("[LA Set Success] LA_State=((%d))\n", adc_smp->adc_smp_state); + pr_debug("[LA Set Success] LA_State=(%d)\n", smp->adc_smp_state); #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - pr_debug("ADCSmp_work_item_index = ((%d))\n", adc_smp->la_work_item_index); - if (adc_smp->la_work_item_index != 0) { - odm_schedule_work_item(&adc_smp->adc_smp_work_item_1); - adc_smp->la_work_item_index = 0; - } else { - odm_schedule_work_item(&adc_smp->adc_smp_work_item); - adc_smp->la_work_item_index = 1; - } + pr_debug("ADCSmp_work_item_index=(%d)\n", smp->la_work_item_index); + + if (smp->la_work_item_index != 0) { + odm_schedule_work_item(&smp->adc_smp_work_item_1); + smp->la_work_item_index = 0; + } else { + odm_schedule_work_item(&smp->adc_smp_work_item); + smp->la_work_item_index = 1; + } #else - phydm_adc_smp_start(dm); + phydm_la_adc_smp_start(dm); #endif - } else - pr_debug("[LA Set Fail] LA_State=((%d))\n", adc_smp->adc_smp_state); - - } +void phydm_la_cmd_fast(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + u32 var[10] = {0}; + u8 bw = *dm->band_width; + + if (bw > 2) { + PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, + "Not Support for BW > %dM\n", 20 << bw); + return; + } + + PHYDM_SSCANF(input[2], DCMD_HEX, &var[0]); + + if (var[0] <= 10) { /* CCA P-edge trigger*/ + smp->la_trig_mode = 1; + smp->la_trig_sig_sel = 2; + smp->la_trigger_time = ((smp->smp_number_max >> (bw + 1)) / 10) + - (2 << (2 - bw)) - (2 - bw); + smp->la_mac_mask_or_hdr_sel = 0; + smp->la_trigger_edge = 0; + smp->la_smp_rate = 2 - bw; + smp->la_count = 0; + if (var[0] == 0) { + smp->la_dma_type = 5; + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + smp->la_dbg_port = 0x870; + else + smp->la_dbg_port = 0x210; + } else if (var[0] == 1) { + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + smp->la_dma_type = 4; + smp->la_dbg_port = 0x392; + } else { + smp->la_dma_type = 5; + smp->la_dbg_port = 0xa44; + } + } + } + + PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, + "echo lamode 1 %d %d %d %d %d %x %d %d %d\n", + smp->la_trig_mode, smp->la_trig_sig_sel, smp->la_dma_type, + smp->la_trigger_time, smp->la_mac_mask_or_hdr_sel, + smp->la_dbg_port, smp->la_trigger_edge, smp->la_smp_rate, + smp->la_count); + + phydm_la_set(dm); +} + +void phydm_la_cmd(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + u8 trig_mode = 0, dma_data_sig_sel = 0; + u32 trig_sig_sel = 0; + u32 trigger_time_mu_sec = 0; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + + if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_LA_MODE)) + return; + +#ifdef PHYDM_COMPILE_LA_STORE_IN_IMEM + if (dm->support_ic_type & PHYDM_LA_STORE_IN_IMEM_IC) { + if (dm->is_download_fw) + return; + } + #if RTL8198F_SUPPORT + if (dm->support_ic_type & ODM_RTL8198F) { + if (!*dm->mp_mode && !dm->priv->pmib->miscEntry.normal_LA_on) { + pr_debug("plz re-set normal_LA_on = 1 & DnUp.\n"); + return; + } + } + #endif +#endif + + PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); + + /*@dbg_print("echo cmd input_num = %d\n", input_num);*/ + + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "=====[LA Mode Help] =============================\n"); + /*Trigger*/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "BB_trig: 1 0 {DbgPort Bit} {DMA#} {TrigTime} {DbgPort_head(Jgr2)}\n\t{DbgPort} {Edge: 0(P),1(N)} {f_smp:80 >> N} {Capture num}\n\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "MAC_trig: 1 1 {0-ok/1-fail/2-cca} {DMA#} {TrigTime} {DbgPort_head(Jgr2)}\n\t{DbgPort} {N/A} {f_smp:80 >> N} {Cpture num}\n\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "All: {En} {0:ADC_BB_trig,1:ADC MAC_trig,2:RF0,3:RF1,4:MAC}\n\t{BB:dbg_port[bit],BB_MAC:0-ok/1-fail/2-cca,MAC:ref} {DMA#} {TrigTime}\n\t{DbgPort_head/ref_mask} {dbg_port} {0:P_Edge, 1:N_Edge} {SpRate:0-80M,1-40M,2-20M} {Capture num}\n\n"); + /*Adv-Trig*/ + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + PDM_SNPF(out_len, used, output + used, out_len - used, + "adv show\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "adv {adv_trig_en} {0:And[0]_disable} {en}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "adv {adv_trig_en} {1~3: And[3:0]} {Sel} {Val} {Inv}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "adv {adv_trig_en} {4: And[4]} {BitMask} {BitVal} {Inv}\n\n"); + #endif + /*Setting*/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "set {1:tx_buff_size} {0: half, 1:full}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "set {2:Fake Trigger} {en}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "set {3:Auto Print} {en}\n\n"); + /*Print*/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "print\n\n"); + + /*Fast Trigger*/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "fast {0: CCA trig & CCA Dbg Port}\n"); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "fast {1: CCA trig & EVM Dbg Port}\n"); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "=================================================\n"); + } else if ((strcmp(input[1], "print") == 0)) { + phydm_la_buffer_print(dm); + } else if ((strcmp(input[1], "fast") == 0)) { + phydm_la_cmd_fast(dm, input, &used, output, &out_len); +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if ((strcmp(input[1], "adv") == 0)) { + phydm_la_bb_adv_cmd_jgr3(dm, input, &used, output, &out_len); +#endif + } else if ((strcmp(input[1], "set") == 0)) { + PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]); + + if (var1[1] == 1) { + PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]); + phydm_la_set_buff_mode(dm, (enum la_buff_mode)var1[2]); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Buff_mode=(%d/2)\n", smp->la_buff_mode + 1); + } else if (var1[1] == 2) { + PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]); + smp->en_fake_trig = (boolean)var1[2]; + + PDM_SNPF(out_len, used, output + used, out_len - used, + "en_fake_trig=(%d)\n", smp->en_fake_trig); + } else if (var1[1] == 3) { + PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]); + smp->is_la_print = (boolean)var1[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "Auto print=(%d)\n", smp->is_la_print); + } + } else if (var1[0] == 1) { + PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]); + + smp->la_trig_mode = (u8)var1[1]; + + if (trig_mode == PHYDM_MAC_TRIG) + PHYDM_SSCANF(input[3], DCMD_HEX, &var1[2]); + else + PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]); + smp->la_trig_sig_sel = var1[2]; + + PHYDM_SSCANF(input[4], DCMD_DECIMAL, &var1[3]); + PHYDM_SSCANF(input[5], DCMD_DECIMAL, &var1[4]); + PHYDM_SSCANF(input[6], DCMD_HEX, &var1[5]); + PHYDM_SSCANF(input[7], DCMD_HEX, &var1[6]); + PHYDM_SSCANF(input[8], DCMD_DECIMAL, &var1[7]); + PHYDM_SSCANF(input[9], DCMD_DECIMAL, &var1[8]); + PHYDM_SSCANF(input[10], DCMD_DECIMAL, &var1[9]); + + smp->la_dma_type = (u8)var1[3]; + smp->la_trigger_time = var1[4]; /*unit: us*/ + smp->la_mac_mask_or_hdr_sel = var1[5]; + smp->la_dbg_port = var1[6]; + smp->la_trigger_edge = (u8)var1[7]; + smp->la_smp_rate = (u8)(var1[8] & 0x7); + smp->la_count = var1[9]; + + pr_debug("echo lamode %d %d %d %d %d %d %x %d %d %d\n", + var1[0], var1[1], var1[2], var1[3], var1[4], + var1[5], var1[6], var1[7], var1[8], var1[9]); + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, + ("echo lamode %d %d %d %d %d %d %x %d %d %d\n", + var1[0], var1[1], var1[2], var1[3], + var1[4], var1[5], var1[6], var1[7], + var1[8], var1[9])); + #endif + + PDM_SNPF(out_len, used, output + used, out_len - used, + "a.En= ((1)), b.mode = ((%d)), c.Trig_Sel = ((0x%x)), d.Dma_type = ((%d))\n", + trig_mode, trig_sig_sel, dma_data_sig_sel); + PDM_SNPF(out_len, used, output + used, out_len - used, + "e.Trig_Time = ((%dus)), f.Dbg_head/mac_ref_mask = ((0x%x)), g.dbg_port = ((0x%x))\n", + trigger_time_mu_sec, + smp->la_mac_mask_or_hdr_sel, smp->la_dbg_port); + PDM_SNPF(out_len, used, output + used, out_len - used, + "h.Trig_edge = ((%d)), i.smp rate = ((%d MHz)), j.Cap_num = ((%d))\n", + smp->la_trigger_edge, (80 >> smp->la_smp_rate), + smp->la_count); + + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + PDM_SNPF(out_len, used, output + used, out_len - used, + "k.en_new_bbtrigger = ((%d))\n", + smp->adv_trig_table.la_en_new_bbtrigger); + #endif + + phydm_la_set(dm); + } else { + phydm_la_stop(dm); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Disable LA mode\n"); + } + + *_used = used; + *_out_len = out_len; +} + +void phydm_la_stop(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + + smp->adc_smp_state = ADCSMP_STATE_IDLE; + + PHYDM_DBG(dm, DBG_TMP, "[LA_Stop] LA_state = %d\n", smp->adc_smp_state); +} + +void phydm_la_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct rt_adcsmp_string *buf = &smp->adc_smp_buf; + + smp->adc_smp_state = ADCSMP_STATE_IDLE; + smp->is_la_print = true; + smp->en_fake_trig = false; + smp->txff_page = 0xffffffff; + phydm_la_set_buff_mode(dm, ADCSMP_BUFF_HALF); + + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + phydm_la_bb_adv_reset_jgr3(dm); + #endif +} + +void adc_smp_de_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + phydm_la_stop(dm); + phydm_la_buffer_release(dm); +} + +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) +void adc_smp_work_item_callback(void *context) +{ + void *adapter = (void *)context; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; + struct rt_adcsmp *smp = &dm->adcsmp; + + pr_debug("[WorkItem Call back] LA_State=(%d)\n", smp->adc_smp_state); + phydm_la_adc_smp_start(dm); +} +#endif + +#if 0 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) enum rt_status -adc_smp_query( - void *dm_void, - ULONG information_buffer_length, - void *information_buffer, - PULONG bytes_written -) +adc_smp_query(void *dm_void, ULONG info_buf_length, void *info_buf, + PULONG bytes_written) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - enum rt_status ret_status = RT_STATUS_SUCCESS; - struct rt_adcsmp_string *adc_smp_buf = &adc_smp->adc_smp_buf; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + enum rt_status ret_status = RT_STATUS_SUCCESS; + struct rt_adcsmp_string *buf = &smp->adc_smp_buf; - pr_debug("[%s] LA_State=((%d))", __func__, adc_smp->adc_smp_state); + pr_debug("[%s] LA_State=((%d))", __func__, smp->adc_smp_state); - if (information_buffer_length != adc_smp_buf->buffer_size) { + if (info_buf_length != buf->buffer_size) { *bytes_written = 0; ret_status = RT_STATUS_RESOURCE; - } else if (adc_smp_buf->length != adc_smp_buf->buffer_size) { + } else if (buf->length != buf->buffer_size) { *bytes_written = 0; ret_status = RT_STATUS_RESOURCE; - } else if (adc_smp->adc_smp_state != ADCSMP_STATE_QUERY) { + } else if (smp->adc_smp_state != ADCSMP_STATE_QUERY) { *bytes_written = 0; ret_status = RT_STATUS_PENDING; } else { - odm_move_memory(dm, information_buffer, adc_smp_buf->octet, adc_smp_buf->buffer_size); - *bytes_written = adc_smp_buf->buffer_size; + odm_move_memory(dm, info_buf, buf->octet, buf->buffer_size); + *bytes_written = buf->buffer_size; - adc_smp->adc_smp_state = ADCSMP_STATE_IDLE; + smp->adc_smp_state = ADCSMP_STATE_IDLE; } pr_debug("Return status %d\n", ret_status); @@ -440,351 +1327,62 @@ adc_smp_query( } #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -void -adc_smp_query( - void *dm_void, - void *output, - u32 out_len, - u32 *pused -) +void adc_smp_query(void *dm_void, void *output, u32 out_len, u32 *pused) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - struct rt_adcsmp_string *adc_smp_buf = &adc_smp->adc_smp_buf; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct rt_adcsmp_string *buf = &smp->adc_smp_buf; u32 used = *pused; - u32 i; + u32 i = 0; +#if 0 /* struct timespec t; */ /* rtw_get_current_timespec(&t); */ +#endif - pr_debug("%s adc_smp_state %d", __func__, adc_smp->adc_smp_state); + pr_debug("%s adc_smp_state %d", __func__, smp->adc_smp_state); - for (i = 0; i < (adc_smp_buf->length >> 2) - 2; i += 2) { + for (i = 0; i < (buf->length >> 2) - 2; i += 2) { PDM_SNPF(out_len, used, output + used, out_len - used, - "%08x%08x\n", adc_smp_buf->octet[i], - adc_smp_buf->octet[i + 1]); + "%08x%08x\n", buf->octet[i], buf->octet[i + 1]); } PDM_SNPF(out_len, used, output + used, out_len - used, "\n"); - /* PDM_SNPF((output+used, out_len-used, "\n[%lu.%06lu]\n", t.tv_sec, t.tv_nsec)); */ + /* PDM_SNPF(output + used, out_len - used, "\n[%lu.%06lu]\n", */ + /* t.tv_sec, t.tv_nsec); */ *pused = used; } -s32 -adc_smp_get_sample_counts( - void *dm_void -) +s32 adc_smp_get_sample_counts(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - struct rt_adcsmp_string *adc_smp_buf = &adc_smp->adc_smp_buf; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct rt_adcsmp_string *buf = &smp->adc_smp_buf; - return (adc_smp_buf->length >> 2) - 2; + return (buf->length >> 2) - 2; } -s32 -adc_smp_query_single_data( - void *dm_void, - void *output, - u32 out_len, - u32 index -) +s32 adc_smp_query_single_data(void *dm_void, void *output, u32 out_len, u32 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - struct rt_adcsmp_string *adc_smp_buf = &adc_smp->adc_smp_buf; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct rt_adcsmp *smp = &dm->adcsmp; + struct rt_adcsmp_string *buf = &smp->adc_smp_buf; u32 used = 0; - /* dbg_print("%s adc_smp_state %d\n", __func__, adc_smp->adc_smp_state); */ - if (adc_smp->adc_smp_state != ADCSMP_STATE_QUERY) { + /* @dbg_print("%s adc_smp_state %d\n", __func__,*/ + /* smp->adc_smp_state);*/ + if (smp->adc_smp_state != ADCSMP_STATE_QUERY) { PDM_SNPF(out_len, used, output + used, out_len - used, - "Error: la data is not ready yet ...\n"); + "Error: la data is not ready yet ...\n"); return -1; } - if (index < ((adc_smp_buf->length >> 2) - 2)) { + if (idx < ((buf->length >> 2) - 2)) { PDM_SNPF(out_len, used, output + used, out_len - used, - "%08x%08x\n", - adc_smp_buf->octet[index], - adc_smp_buf->octet[index + 1]); + "%08x%08x\n", buf->octet[idx], buf->octet[idx + 1]); } return 0; } - +#endif #endif -void -adc_smp_stop( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - - adc_smp->adc_smp_state = ADCSMP_STATE_IDLE; - pr_debug("[LA_Stop] LA_state = ((%d))\n", adc_smp->adc_smp_state); -} - -void -adc_smp_init( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - struct rt_adcsmp_string *adc_smp_buf = &adc_smp->adc_smp_buf; - - adc_smp->adc_smp_state = ADCSMP_STATE_IDLE; - - if (dm->support_ic_type & ODM_RTL8814A) { - adc_smp_buf->start_pos = 0x30000; - adc_smp_buf->buffer_size = 0x10000; - } else if (dm->support_ic_type & ODM_RTL8822B) { - adc_smp_buf->start_pos = 0x20000; - adc_smp_buf->buffer_size = 0x20000; - } else if (dm->support_ic_type & ODM_RTL8197F) { - adc_smp_buf->start_pos = 0x00000; - adc_smp_buf->buffer_size = 0x10000; - } else if (dm->support_ic_type & ODM_RTL8821C) { - adc_smp_buf->start_pos = 0x8000; - adc_smp_buf->buffer_size = 0x8000; - } - -} - -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -void -adc_smp_de_init( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - struct rt_adcsmp_string *adc_smp_buf = &adc_smp->adc_smp_buf; - - adc_smp_stop(dm); - - if (adc_smp_buf->length != 0x0) { - odm_free_memory(dm, adc_smp_buf->octet, adc_smp_buf->length); - adc_smp_buf->length = 0x0; - } -} - -#endif - - -void -phydm_la_mode_bb_setting( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - - u8 trig_mode = adc_smp->la_trig_mode; - u32 trig_sig_sel = adc_smp->la_trig_sig_sel; - u32 dbg_port = adc_smp->la_dbg_port; - u8 is_trigger_edge = adc_smp->la_trigger_edge; - u8 sampling_rate = adc_smp->la_smp_rate; - u8 la_dma_type = adc_smp->la_dma_type; - u32 dbg_port_header_sel = 0; - - pr_debug("1. [BB Setting] trig_mode = ((%d)), dbg_port = ((0x%x)), Trig_Edge = ((%d)), smp_rate = ((%d)), Trig_Sel = ((0x%x)), Dma_type = ((%d))\n", - trig_mode, dbg_port, is_trigger_edge, sampling_rate, trig_sig_sel, la_dma_type); - -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("1. [LA mode bb_setting]trig_mode = ((%d)), dbg_port = ((0x%x)), Trig_Edge = ((%d)), smp_rate = ((%d)), Trig_Sel = ((0x%x)), Dma_type = ((%d))\n", - trig_mode, dbg_port, is_trigger_edge, sampling_rate, trig_sig_sel, la_dma_type)); -#endif - - if (trig_mode == PHYDM_MAC_TRIG) - trig_sig_sel = 0; /*ignore this setting*/ - - /*set BB debug port*/ - if (phydm_set_bb_dbg_port(dm, BB_DBGPORT_PRIORITY_3, dbg_port)) { - pr_debug("Set dbg_port((0x%x)) success\n", dbg_port); - } - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - if (trig_mode == PHYDM_ADC_RF0_TRIG) - dbg_port_header_sel = 9; /*DBGOUT_RFC_a[31:0]*/ - else if (trig_mode == PHYDM_ADC_RF1_TRIG) - dbg_port_header_sel = 8; /*DBGOUT_RFC_b[31:0]*/ - else if ((trig_mode == PHYDM_ADC_BB_TRIG) || (trig_mode == PHYDM_ADC_MAC_TRIG)) { - - if (adc_smp->la_mac_mask_or_hdr_sel <= 0xf) { - dbg_port_header_sel = adc_smp->la_mac_mask_or_hdr_sel; - } else { - dbg_port_header_sel = 0; - } - } - - phydm_bb_dbg_port_header_sel(dm, dbg_port_header_sel); - - odm_set_bb_reg(dm, 0x95c, 0xf00, la_dma_type); /*0x95C[11:8]*/ - odm_set_bb_reg(dm, 0x95C, 0x1f, trig_sig_sel); /*0x95C[4:0], BB debug port bit*/ - odm_set_bb_reg(dm, 0x95C, BIT(31), is_trigger_edge); /*0: posedge, 1: negedge*/ - odm_set_bb_reg(dm, 0x95c, 0xe0, sampling_rate); - /* (0:) '80MHz' - (1:) '40MHz' - (2:) '20MHz' - (3:) '10MHz' - (4:) '5MHz' - (5:) '2.5MHz' - (6:) '1.25MHz' - (7:) '160MHz (for BW160 ic)' - */ - if ((dm->support_ic_type & ODM_RTL8821C) && (dm->cut_version >= ODM_CUT_B)) { - odm_set_bb_reg(dm, 0x95c, BIT(23), 1); - } - } else { - odm_set_bb_reg(dm, 0x9a0, 0xf00, la_dma_type); /*0x9A0[11:8]*/ - odm_set_bb_reg(dm, 0x9a0, 0x1f, trig_sig_sel); /*0x9A0[4:0], BB debug port bit*/ - odm_set_bb_reg(dm, 0x9A0, BIT(31), is_trigger_edge); /*0: posedge, 1: negedge*/ - odm_set_bb_reg(dm, 0x9A0, 0xe0, sampling_rate); - /* (0:) '80MHz' - (1:) '40MHz' - (2:) '20MHz' - (3:) '10MHz' - (4:) '5MHz' - (5:) '2.5MHz' - (6:) '1.25MHz' - (7:) '160MHz (for BW160 ic)' - */ - } -} - -void -phydm_la_mode_set_trigger_time( - void *dm_void, - u32 trigger_time_mu_sec -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 trigger_time_unit_num; - u32 time_unit = 0; - - if (trigger_time_mu_sec < 128) { - time_unit = 0; /*unit: 1mu sec*/ - } else if (trigger_time_mu_sec < 256) { - time_unit = 1; /*unit: 2mu sec*/ - } else if (trigger_time_mu_sec < 512) { - time_unit = 2; /*unit: 4mu sec*/ - } else if (trigger_time_mu_sec < 1024) { - time_unit = 3; /*unit: 8mu sec*/ - } else if (trigger_time_mu_sec < 2048) { - time_unit = 4; /*unit: 16mu sec*/ - } else if (trigger_time_mu_sec < 4096) { - time_unit = 5; /*unit: 32mu sec*/ - } else if (trigger_time_mu_sec < 8192) { - time_unit = 6; /*unit: 64mu sec*/ - } - - trigger_time_unit_num = (u8)(trigger_time_mu_sec >> time_unit); - - pr_debug("2. [Set Trigger Time] Trig_Time = ((%d)) * unit = ((2^%d us))\n", trigger_time_unit_num, time_unit); -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("3. [Set Trigger Time] Trig_Time = ((%d)) * unit = ((2^%d us))\n", trigger_time_unit_num, time_unit)); -#endif - - odm_set_mac_reg(dm, 0x7cc, BIT(20) | BIT(19) | BIT(18), time_unit); - odm_set_mac_reg(dm, 0x7c0, 0x7f00, (trigger_time_unit_num & 0x7f)); - -} - - -void -phydm_lamode_trigger_setting( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct rt_adcsmp *adc_smp = &dm->adcsmp; - u8 trig_mode, dma_data_sig_sel; - u32 trig_sig_sel; - boolean is_enable_la_mode; - u32 trigger_time_mu_sec; - char help[] = "-h"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; - - if (dm->support_ic_type & PHYDM_IC_SUPPORT_LA_MODE) { - PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); - is_enable_la_mode = (boolean)var1[0]; - /*dbg_print("echo cmd input_num = %d\n", input_num);*/ - - if ((strcmp(input[1], help) == 0)) { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "{En} {0:BB,1:BB_MAC,2:RF0,3:RF1,4:MAC} \n {BB:dbg_port[bit],BB_MAC:0-ok/1-fail/2-cca,MAC:ref} {DMA type} {TrigTime} \n {DbgPort_head/ref_mask} {dbg_port} {0:P_Edge, 1:N_Edge} {SpRate:0-80M,1-40M,2-20M} {Capture num}\n"); - /**/ - } else if ((is_enable_la_mode == 1)) { - PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]); - - trig_mode = (u8)var1[1]; - - if (trig_mode == PHYDM_MAC_TRIG) - PHYDM_SSCANF(input[3], DCMD_HEX, &var1[2]); - else - PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]); - trig_sig_sel = var1[2]; - - PHYDM_SSCANF(input[4], DCMD_DECIMAL, &var1[3]); - PHYDM_SSCANF(input[5], DCMD_DECIMAL, &var1[4]); - PHYDM_SSCANF(input[6], DCMD_HEX, &var1[5]); - PHYDM_SSCANF(input[7], DCMD_HEX, &var1[6]); - PHYDM_SSCANF(input[8], DCMD_DECIMAL, &var1[7]); - PHYDM_SSCANF(input[9], DCMD_DECIMAL, &var1[8]); - PHYDM_SSCANF(input[10], DCMD_DECIMAL, &var1[9]); - - dma_data_sig_sel = (u8)var1[3]; - trigger_time_mu_sec = var1[4]; /*unit: us*/ - - adc_smp->la_mac_mask_or_hdr_sel = var1[5]; - adc_smp->la_dbg_port = var1[6]; - adc_smp->la_trigger_edge = (u8) var1[7]; - adc_smp->la_smp_rate = (u8)(var1[8] & 0x7); - adc_smp->la_count = var1[9]; - - - pr_debug("echo lamode %d %d %d %d %d %d %x %d %d %d\n", var1[0], var1[1], var1[2], var1[3], var1[4], var1[5], var1[6], var1[7], var1[8], var1[9]); -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("echo lamode %d %d %d %d %d %d %x %d %d %d\n", var1[0], var1[1], var1[2], var1[3], var1[4], var1[5], var1[6], var1[7], var1[8], var1[9])); -#endif - - PDM_SNPF(out_len, used, output + used, - out_len - used, - "a.En= ((1)), b.mode = ((%d)), c.Trig_Sel = ((0x%x)), d.Dma_type = ((%d))\n", - trig_mode, trig_sig_sel, - dma_data_sig_sel); - PDM_SNPF(out_len, used, output + used, - out_len - used, - "e.Trig_Time = ((%dus)), f.Dbg_head/mac_ref_mask = ((0x%x)), g.dbg_port = ((0x%x))\n", - trigger_time_mu_sec, - adc_smp->la_mac_mask_or_hdr_sel, - adc_smp->la_dbg_port); - PDM_SNPF(out_len, used, output + used, - out_len - used, - "h.Trig_edge = ((%d)), i.smp rate = ((%d MHz)), j.Cap_num = ((%d))\n", - adc_smp->la_trigger_edge, - (80 >> adc_smp->la_smp_rate), - adc_smp->la_count); - - adc_smp_set(dm, trig_mode, trig_sig_sel, dma_data_sig_sel, trigger_time_mu_sec, 0); - - } else { - adc_smp_stop(dm); - PDM_SNPF(out_len, used, output + used, - out_len - used, "Disable LA mode\n"); - } - } - *_used = used; - *_out_len = out_len; -} - -#endif /*endif PHYDM_LA_MODE_SUPPORT == 1*/ +#endif /*@endif PHYDM_LA_MODE_SUPPORT*/ diff --git a/hal/phydm/phydm_adc_sampling.h b/hal/phydm/phydm_adc_sampling.h index 9e9fc59..74e1517 100644 --- a/hal/phydm/phydm_adc_sampling.h +++ b/hal/phydm/phydm_adc_sampling.h @@ -26,18 +26,35 @@ #ifndef __INC_ADCSMP_H #define __INC_ADCSMP_H -#define DYNAMIC_LA_MODE "2.0" /*2017.02.06 Dino */ +#if (PHYDM_LA_MODE_SUPPORT) -#if (PHYDM_LA_MODE_SUPPORT == 1) +#define DYNAMIC_LA_MODE "4.0" -struct rt_adcsmp_string { - u32 *octet; - u32 length; - u32 buffer_size; - u32 start_pos; +/* @1 ============================================================ + * 1 Definition + * 1 ============================================================ + */ + +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) +#if (RTL8197F_SUPPORT || RTL8198F_SUPPORT || RTL8197G_SUPPORT) + #define PHYDM_COMPILE_LA_STORE_IN_IMEM +#endif +#endif + +#define PHYDM_LA_STORE_IN_IMEM_IC (ODM_RTL8197F | ODM_RTL8198F | ODM_RTL8197G) + +#define FULL_BUFF_MODE_SUPPORT (ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8822C |\ + ODM_RTL8812F | ODM_RTL8814B) + +/* @ ============================================================ + * enumrate + * ============================================================ + */ +enum la_dump_mode { + LA_BB_ADC_DUMP = 0, + LA_MAC_DBG_DUMP = 1 }; - enum rt_adcsmp_trig_sel { PHYDM_ADC_BB_TRIG = 0, PHYDM_ADC_MAC_TRIG = 1, @@ -46,7 +63,6 @@ enum rt_adcsmp_trig_sel { PHYDM_MAC_TRIG = 4 }; - enum rt_adcsmp_trig_sig_sel { ADCSMP_TRIG_CRCOK = 0, ADCSMP_TRIG_CRCFAIL = 1, @@ -54,119 +70,119 @@ enum rt_adcsmp_trig_sig_sel { ADCSMP_TRIG_REG = 3 }; - enum rt_adcsmp_state { - ADCSMP_STATE_IDLE = 0, - ADCSMP_STATE_SET = 1, - ADCSMP_STATE_QUERY = 2 + ADCSMP_STATE_IDLE = 0, + ADCSMP_STATE_SET = 1, + ADCSMP_STATE_QUERY = 2 }; +enum la_buff_mode { + ADCSMP_BUFF_HALF = 0, + ADCSMP_BUFF_ALL = 1 /*Only use in MP Driver*/ +}; + +/* @ ============================================================ + * structure + * ============================================================ + */ + +struct rt_adcsmp_string { + u32 *octet; + u32 length; + u32 buffer_size; + u32 start_pos; + u32 end_pos; /*@buf addr*/ +}; + +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT +struct la_adv_trig { + boolean la_en_new_bbtrigger; + boolean la_ori_bb_dis; + u8 la_and1_sel; + u8 la_and1_val; + boolean la_and1_inv; + u8 la_and2_sel; + u8 la_and2_val; + boolean la_and2_inv; + u8 la_and3_sel; + u8 la_and3_val; + boolean la_and3_inv; + u32 la_and4_mask; + u32 la_and4_bitmap; + boolean la_and4_inv; +}; +#endif struct rt_adcsmp { - struct rt_adcsmp_string adc_smp_buf; - enum rt_adcsmp_state adc_smp_state; - u8 la_trig_mode; - u32 la_trig_sig_sel; - u8 la_dma_type; - u32 la_trigger_time; - u32 la_mac_mask_or_hdr_sel; /*1.BB mode: for debug port header sel; 2.MAC mode: for reference mask*/ - u32 la_dbg_port; - u8 la_trigger_edge; - u8 la_smp_rate; - u32 la_count; - u8 is_bb_trigger; - u8 la_work_item_index; + struct rt_adcsmp_string adc_smp_buf; + enum rt_adcsmp_state adc_smp_state; + enum la_buff_mode la_buff_mode; + enum la_dump_mode la_dump_mode; + u8 la_trig_mode; + u32 la_trig_sig_sel; + u8 la_dma_type; + u32 la_trigger_time; + /*@1.BB mode: Dbg port header sel, 2.MAC mode: for reference mask*/ + u32 la_mac_mask_or_hdr_sel; + u32 la_dbg_port; + u8 la_trigger_edge; + u8 la_smp_rate; + u32 la_count; + u32 smp_number; + u32 smp_number_max; + u32 txff_page; + boolean is_la_print; + boolean en_fake_trig; +#if (RTL8197F_SUPPORT) + u32 backup_dma; +#endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - RT_WORK_ITEM adc_smp_work_item; - RT_WORK_ITEM adc_smp_work_item_1; + u8 la_work_item_index; + RT_WORK_ITEM adc_smp_work_item; + RT_WORK_ITEM adc_smp_work_item_1; +#endif + +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + struct la_adv_trig adv_trig_table; #endif }; +/* @ ============================================================ + * Function Prototype + * ============================================================ + */ + +void phydm_la_set(void *dm_void); + +void phydm_la_cmd(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len); + +void phydm_la_stop(void *dm_void); + +void phydm_la_init(void *dm_void); + +void adc_smp_de_init(void *dm_void); + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -void -adc_smp_work_item_callback( - void *context -); +void adc_smp_work_item_callback(void *context); #endif -void -adc_smp_set( - void *dm_void, - u8 trig_mode, - u32 trig_sig_sel, - u8 dma_data_sig_sel, - u32 trigger_time, - u16 polling_time -); - +#if 0 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -enum rt_status -adc_smp_query( - void *dm_void, - ULONG information_buffer_length, - void *information_buffer, - PULONG bytes_written -); +enum rt_status adc_smp_query(void *dm_void, ULONG info_buf_length, + void *info_buf, PULONG bytes_written); + #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -void -adc_smp_query( - void *dm_void, - void *output, - u32 out_len, - u32 *pused -); -s32 -adc_smp_get_sample_counts( - void *dm_void -); +void adc_smp_query(void *dm_void, void *output, u32 out_len, u32 *pused); -s32 -adc_smp_query_single_data( - void *dm_void, - void *output, - u32 out_len, - u32 index -); +s32 adc_smp_get_sample_counts(void *dm_void); + +s32 adc_smp_query_single_data(void *dm_void, void *output, u32 out_len, + u32 idx); +#endif +#endif -#endif -void -adc_smp_stop( - void *dm_void -); - -void -adc_smp_init( - void *dm_void -); - -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -void -adc_smp_de_init( - void *dm_void -); -#endif - -void -phydm_la_mode_bb_setting( - void *dm_void -); - -void -phydm_la_mode_set_trigger_time( - void *dm_void, - u32 trigger_time_mu_sec -); - -void -phydm_lamode_trigger_setting( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); #endif #endif diff --git a/hal/phydm/phydm_antdect.c b/hal/phydm/phydm_antdect.c index 1d96aa9..5a44a05 100644 --- a/hal/phydm/phydm_antdect.c +++ b/hal/phydm/phydm_antdect.c @@ -30,29 +30,38 @@ #include "mp_precomp.h" #include "phydm_precomp.h" -/* #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) */ -#if (defined(CONFIG_ANT_DETECTION)) +#ifdef CONFIG_ANT_DETECTION -/* IS_ANT_DETECT_SUPPORT_SINGLE_TONE(adapter) +/* @IS_ANT_DETECT_SUPPORT_SINGLE_TONE(adapter) * IS_ANT_DETECT_SUPPORT_RSSI(adapter) * IS_ANT_DETECT_SUPPORT_PSD(adapter) */ -/* 1 [1. Single Tone method] =================================================== */ +/* @1 [1. Single Tone method] =================================================== */ -/* +/*@ * Description: * Set Single/Dual Antenna default setting for products that do not do detection in advance. * * Added by Joseph, 2012.03.22 * */ -void -odm_single_dual_antenna_default_setting( - void *dm_void -) +void odm_sw_ant_div_construct_scan_chnl( + void *adapter, + u8 scan_chnl) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - void *adapter = dm->adapter; +} + +u8 odm_sw_ant_div_select_scan_chnl( + void *adapter) +{ + return 0; +} + +void odm_single_dual_antenna_default_setting( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; + void *adapter = dm->adapter; u8 bt_ant_num = BT_GetPgAntNum(adapter); /* Set default antenna A and B status */ @@ -69,8 +78,7 @@ odm_single_dual_antenna_default_setting( RT_ASSERT(false, ("Incorrect antenna number!!\n")); } - -/* 2 8723A ANT DETECT +/* @2 8723A ANT DETECT * * Description: * Implement IQK single tone for RF DPK loopback and BB PSD scanning. @@ -80,23 +88,21 @@ odm_single_dual_antenna_default_setting( * */ boolean odm_single_dual_antenna_detection( - void *dm_void, - u8 mode -) + void *dm_void, + u8 mode) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - void *adapter = dm->adapter; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - u32 current_channel, rf_loop_reg; - u8 n; - u32 reg88c, regc08, reg874, regc50, reg948, regb2c, reg92c, reg930, reg064, afe_rrx_wait_cca; - u8 initial_gain = 0x5a; - u32 PSD_report_tmp; - u32 ant_a_report = 0x0, ant_b_report = 0x0, ant_0_report = 0x0; - boolean is_result = true; - - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_single_dual_antenna_detection()============>\n"); + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *adapter = dm->adapter; + struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; + u32 current_channel, rf_loop_reg; + u8 n; + u32 reg88c, regc08, reg874, regc50, reg948, regb2c, reg92c, reg930, reg064, afe_rrx_wait_cca; + u8 initial_gain = 0x5a; + u32 PSD_report_tmp; + u32 ant_a_report = 0x0, ant_b_report = 0x0, ant_0_report = 0x0; + boolean is_result = true; + PHYDM_DBG(dm, DBG_ANT_DIV, "%s============>\n", __func__); if (!(dm->support_ic_type & ODM_RTL8723B)) return is_result; @@ -105,10 +111,10 @@ odm_single_dual_antenna_detection( if (!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(((PADAPTER)adapter))) return is_result; - /* 1 Backup Current RF/BB Settings */ + /* @1 Backup Current RF/BB Settings */ current_channel = odm_get_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK); - rf_loop_reg = odm_get_rf_reg(dm, RF_PATH_A, 0x00, RFREGOFFSETMASK); + rf_loop_reg = odm_get_rf_reg(dm, RF_PATH_A, RF_0x00, RFREGOFFSETMASK); if (dm->support_ic_type & ODM_RTL8723B) { reg92c = odm_get_bb_reg(dm, REG_DPDT_CONTROL, MASKDWORD); reg930 = odm_get_bb_reg(dm, rfe_ctrl_anta_src, MASKDWORD); @@ -117,8 +123,8 @@ odm_single_dual_antenna_detection( reg064 = odm_get_mac_reg(dm, REG_SYM_WLBT_PAPE_SEL, BIT(29)); odm_set_bb_reg(dm, REG_DPDT_CONTROL, 0x3, 0x1); odm_set_bb_reg(dm, rfe_ctrl_anta_src, 0xff, 0x77); - odm_set_mac_reg(dm, REG_SYM_WLBT_PAPE_SEL, BIT(29), 0x1); /* dbg 7 */ - odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, 0x3c0, 0x0);/* dbg 8 */ + odm_set_mac_reg(dm, REG_SYM_WLBT_PAPE_SEL, BIT(29), 0x1); /* @dbg 7 */ + odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, 0x3c0, 0x0); /* @dbg 8 */ odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, BIT(31), 0x0); } @@ -135,23 +141,23 @@ odm_single_dual_antenna_detection( afe_rrx_wait_cca = odm_get_bb_reg(dm, REG_RX_WAIT_CCA, MASKDWORD); /* Set PSD 128 pts */ - odm_set_bb_reg(dm, REG_FPGA0_PSD_FUNCTION, BIT(14) | BIT15, 0x0); /* 128 pts */ + odm_set_bb_reg(dm, REG_FPGA0_PSD_FUNCTION, BIT(14) | BIT15, 0x0); /* @128 pts */ /* To SET CH1 to do */ - odm_set_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK, 0x7401); /* channel 1 */ + odm_set_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK, 0x7401); /* @channel 1 */ - /* AFE all on step */ + /* @AFE all on step */ if (dm->support_ic_type & ODM_RTL8723B) odm_set_bb_reg(dm, REG_RX_WAIT_CCA, MASKDWORD, 0x01c00016); - /* 3 wire Disable */ + /* @3 wire Disable */ odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, MASKDWORD, 0xCCF000C0); - /* BB IQK setting */ + /* @BB IQK setting */ odm_set_bb_reg(dm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD, 0x000800E4); odm_set_bb_reg(dm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD, 0x22208000); - /* IQK setting tone@ 4.34Mhz */ + /* @IQK setting tone@ 4.34Mhz */ odm_set_bb_reg(dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x10008C1C); odm_set_bb_reg(dm, REG_TX_IQK, MASKDWORD, 0x01007c00); @@ -167,7 +173,7 @@ odm_single_dual_antenna_detection( odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x001028d0); odm_set_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, 0x7f, initial_gain); - /* IQK Single tone start */ + /* @IQK Single tone start */ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x808000); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); @@ -182,9 +188,11 @@ odm_single_dual_antenna_detection( ant_a_report = PSD_report_tmp; } - /* change to Antenna B */ + /* @change to Antenna B */ if (dm->support_ic_type & ODM_RTL8723B) { +#if 0 /* odm_set_bb_reg(dm, REG_DPDT_CONTROL, 0x3, 0x2); */ +#endif odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, 0xfff, 0x280); odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, BIT(31), 0x1); } @@ -199,15 +207,15 @@ odm_single_dual_antenna_detection( ant_b_report = PSD_report_tmp; } - /* Close IQK Single Tone function */ + /* @Close IQK Single Tone function */ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); - /* 1 Return to antanna A */ + /* @1 Return to antanna A */ if (dm->support_ic_type & ODM_RTL8723B) { - /* external DPDT */ + /* @external DPDT */ odm_set_bb_reg(dm, REG_DPDT_CONTROL, MASKDWORD, reg92c); - /* internal S0/S1 */ + /* @internal S0/S1 */ odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, MASKDWORD, reg948); odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, MASKDWORD, regb2c); odm_set_bb_reg(dm, rfe_ctrl_anta_src, MASKDWORD, reg930); @@ -220,34 +228,40 @@ odm_single_dual_antenna_detection( odm_set_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, 0x7F, 0x40); odm_set_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD, regc50); odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, current_channel); - odm_set_rf_reg(dm, RF_PATH_A, 0x00, RFREGOFFSETMASK, rf_loop_reg); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x00, RFREGOFFSETMASK, rf_loop_reg); /* Reload AFE Registers */ if (dm->support_ic_type & ODM_RTL8723B) odm_set_bb_reg(dm, REG_RX_WAIT_CCA, MASKDWORD, afe_rrx_wait_cca); if (dm->support_ic_type & ODM_RTL8723B) { - PHYDM_DBG(dm, DBG_ANT_DIV, "psd_report_A[%d]= %d\n", 2416, ant_a_report); - PHYDM_DBG(dm, DBG_ANT_DIV, "psd_report_B[%d]= %d\n", 2416, ant_b_report); + PHYDM_DBG(dm, DBG_ANT_DIV, "psd_report_A[%d]= %d\n", 2416, + ant_a_report); + PHYDM_DBG(dm, DBG_ANT_DIV, "psd_report_B[%d]= %d\n", 2416, + ant_b_report); - /* 2 Test ant B based on ant A is ON */ - if ((ant_a_report >= 100) && (ant_b_report >= 100) && (ant_a_report <= 135) && (ant_b_report <= 135)) { + /* @2 Test ant B based on ant A is ON */ + if (ant_a_report >= 100 && ant_b_report >= 100 && ant_a_report <= 135 && ant_b_report <= 135) { u8 TH1 = 2, TH2 = 6; if ((ant_a_report - ant_b_report < TH1) || (ant_b_report - ant_a_report < TH1)) { dm_swat_table->ANTA_ON = true; dm_swat_table->ANTB_ON = true; - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_single_dual_antenna_detection(): Dual Antenna\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Dual Antenna\n", + __func__); } else if (((ant_a_report - ant_b_report >= TH1) && (ant_a_report - ant_b_report <= TH2)) || - ((ant_b_report - ant_a_report >= TH1) && (ant_b_report - ant_a_report <= TH2))) { + ((ant_b_report - ant_a_report >= TH1) && (ant_b_report - ant_a_report <= TH2))) { dm_swat_table->ANTA_ON = false; dm_swat_table->ANTB_ON = false; is_result = false; - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_single_dual_antenna_detection(): Need to check again\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "%s: Need to check again\n", + __func__); } else { dm_swat_table->ANTA_ON = true; dm_swat_table->ANTB_ON = false; - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_single_dual_antenna_detection(): Single Antenna\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "%s: Single Antenna\n", __func__); } dm->ant_detected_info.is_ant_detected = true; dm->ant_detected_info.db_for_ant_a = ant_a_report; @@ -260,44 +274,39 @@ odm_single_dual_antenna_detection( } } return is_result; - } - - -/* 1 [2. Scan AP RSSI method] ================================================== */ - - - +/* @1 [2. Scan AP RSSI method] ================================================== */ boolean odm_sw_ant_div_check_before_link( - void *dm_void -) + void *dm_void) { #if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) - struct dm_struct *dm = (struct dm_struct *)dm_void; - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); //PMGNT_INFO mgnt_info = &adapter->MgntInfo; - PMGNT_INFO mgnt_info = &(((PADAPTER)(adapter))->MgntInfo); - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - s8 score = 0; - PRT_WLAN_BSS p_tmp_bss_desc, p_test_bss_desc; - u8 power_target_L = 9, power_target_H = 16; - u8 tmp_power_diff = 0, power_diff = 0, avg_power_diff = 0, max_power_diff = 0, min_power_diff = 0xff; - u16 index, counter = 0; - static u8 scan_channel; - u32 tmp_swas_no_link_bk_reg948; + PMGNT_INFO mgnt_info = &(((PADAPTER)(adapter))->MgntInfo); + struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + s8 score = 0; + PRT_WLAN_BSS p_tmp_bss_desc, p_test_bss_desc; + u8 power_target_L = 9, power_target_H = 16; + u8 tmp_power_diff = 0, power_diff = 0, avg_power_diff = 0, max_power_diff = 0, min_power_diff = 0xff; + u16 index, counter = 0; + static u8 scan_channel; + u32 tmp_swas_no_link_bk_reg948; - PHYDM_DBG(dm, DBG_ANT_DIV, "ANTA_ON = (( %d )) , ANTB_ON = (( %d ))\n", dm->dm_swat_table.ANTA_ON, dm->dm_swat_table.ANTB_ON); + PHYDM_DBG(dm, DBG_ANT_DIV, "ANTA_ON = (( %d )) , ANTB_ON = (( %d ))\n", + dm->dm_swat_table.ANTA_ON, dm->dm_swat_table.ANTB_ON); - /* if(HP id) */ + /* @if(HP id) */ { if (dm->dm_swat_table.rssi_ant_dect_result == true && dm->support_ic_type == ODM_RTL8723B) { - PHYDM_DBG(dm, DBG_ANT_DIV, "8723B RSSI-based Antenna Detection is done\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "8723B RSSI-based Antenna Detection is done\n"); return false; } @@ -307,7 +316,7 @@ odm_sw_ant_div_check_before_link( } } - if (dm->adapter == NULL) { /* For BSOD when plug/unplug fast. //By YJ,120413 */ + if (dm->adapter == NULL) { /* @For BSOD when plug/unplug fast. //By YJ,120413 */ /* The ODM structure is not initialized. */ return false; } @@ -324,33 +333,35 @@ odm_sw_ant_div_check_before_link( odm_release_spin_lock(dm, RT_RF_STATE_SPINLOCK); PHYDM_DBG(dm, DBG_ANT_DIV, - "odm_sw_ant_div_check_before_link(): rf_change_in_progress(%x), e_rf_power_state(%x)\n", - mgnt_info->RFChangeInProgress, hal_data->eRFPowerState); + "%s: rf_change_in_progress(%x), e_rf_power_state(%x)\n", + __func__, mgnt_info->RFChangeInProgress, + hal_data->eRFPowerState); dm_swat_table->swas_no_link_state = 0; return false; } else odm_release_spin_lock(dm, RT_RF_STATE_SPINLOCK); - PHYDM_DBG(dm, DBG_ANT_DIV, "dm_swat_table->swas_no_link_state = %d\n", dm_swat_table->swas_no_link_state); - /* 1 Run AntDiv mechanism "Before Link" part. */ + PHYDM_DBG(dm, DBG_ANT_DIV, "dm_swat_table->swas_no_link_state = %d\n", + dm_swat_table->swas_no_link_state); + /* @1 Run AntDiv mechanism "Before Link" part. */ if (dm_swat_table->swas_no_link_state == 0) { - /* 1 Prepare to do Scan again to check current antenna state. */ + /* @1 Prepare to do Scan again to check current antenna state. */ /* Set check state to next step. */ dm_swat_table->swas_no_link_state = 1; - /* Copy Current Scan list. */ + /* @Copy Current Scan list. */ mgnt_info->tmpNumBssDesc = mgnt_info->NumBssDesc; PlatformMoveMemory((void *)mgnt_info->tmpbssDesc, (void *)mgnt_info->bssDesc, sizeof(RT_WLAN_BSS) * MAX_BSS_DESC); - /* Go back to scan function again. */ - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_sw_ant_div_check_before_link: Scan one more time\n"); + /* @Go back to scan function again. */ + PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Scan one more time\n", + __func__); mgnt_info->ScanStep = 0; mgnt_info->bScanAntDetect = true; scan_channel = odm_sw_ant_div_select_scan_chnl(adapter); - if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8821)) { if (fat_tab->rx_idle_ant == MAIN_ANT) odm_update_rx_idle_ant(dm, AUX_ANT); @@ -358,7 +369,10 @@ odm_sw_ant_div_check_before_link( odm_update_rx_idle_ant(dm, MAIN_ANT); if (scan_channel == 0) { PHYDM_DBG(dm, DBG_ANT_DIV, - "odm_sw_ant_div_check_before_link(): No AP List Avaiable, Using ant(%s)\n", (fat_tab->rx_idle_ant == MAIN_ANT) ? "AUX_ANT" : "MAIN_ANT"); + "%s: No AP List Avaiable, Using ant(%s)\n", + __func__, + (fat_tab->rx_idle_ant == MAIN_ANT) ? + "AUX_ANT" : "MAIN_ANT"); if (IS_5G_WIRELESS_MODE(mgnt_info->dot11CurrentWirelessMode)) { dm_swat_table->ant_5g = fat_tab->rx_idle_ant; @@ -371,56 +385,67 @@ odm_sw_ant_div_check_before_link( } PHYDM_DBG(dm, DBG_ANT_DIV, - "odm_sw_ant_div_check_before_link: Change to %s for testing.\n", ((fat_tab->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT")); + "%s: Change to %s for testing.\n", __func__, + ((fat_tab->rx_idle_ant == MAIN_ANT) ? + "MAIN_ANT" : "AUX_ANT")); } else if (dm->support_ic_type & (ODM_RTL8723B)) { /*Switch Antenna to another one.*/ tmp_swas_no_link_bk_reg948 = odm_read_4byte(dm, REG_S0_S1_PATH_SWITCH); - if ((dm_swat_table->cur_antenna == MAIN_ANT) && (tmp_swas_no_link_bk_reg948 == 0x200)) { + if (dm_swat_table->cur_antenna == MAIN_ANT && tmp_swas_no_link_bk_reg948 == 0x200) { odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, 0xfff, 0x280); odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, BIT(31), 0x1); dm_swat_table->cur_antenna = AUX_ANT; } else { - PHYDM_DBG(dm, DBG_ANT_DIV, "Reg[948]= (( %x )) was in wrong state\n", tmp_swas_no_link_bk_reg948); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Reg[948]= (( %x )) was in wrong state\n", + tmp_swas_no_link_bk_reg948); return false; } ODM_delay_us(10); - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_sw_ant_div_check_before_link: Change to (( %s-ant)) for testing.\n", (dm_swat_table->cur_antenna == MAIN_ANT) ? "MAIN" : "AUX"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "%s: Change to (( %s-ant)) for testing.\n", + __func__, + (dm_swat_table->cur_antenna == MAIN_ANT) ? + "MAIN" : "AUX"); } odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel); PlatformSetTimer(adapter, &mgnt_info->ScanTimer, 5); return true; - } else { /* dm_swat_table->swas_no_link_state == 1 */ - /* 1 ScanComple() is called after antenna swiched. */ - /* 1 Check scan result and determine which antenna is going */ - /* 1 to be used. */ + } else { /* @dm_swat_table->swas_no_link_state == 1 */ + /* @1 ScanComple() is called after antenna swiched. */ + /* @1 Check scan result and determine which antenna is going */ + /* @1 to be used. */ - PHYDM_DBG(dm, DBG_ANT_DIV, " tmp_num_bss_desc= (( %d ))\n", mgnt_info->tmpNumBssDesc); /* debug for Dino */ + PHYDM_DBG(dm, DBG_ANT_DIV, " tmp_num_bss_desc= (( %d ))\n", + mgnt_info->tmpNumBssDesc); /* @debug for Dino */ for (index = 0; index < mgnt_info->tmpNumBssDesc; index++) { - p_tmp_bss_desc = &mgnt_info->tmpbssDesc[index]; /* Antenna 1 */ - p_test_bss_desc = &mgnt_info->bssDesc[index]; /* Antenna 2 */ + p_tmp_bss_desc = &mgnt_info->tmpbssDesc[index]; /* @Antenna 1 */ + p_test_bss_desc = &mgnt_info->bssDesc[index]; /* @Antenna 2 */ if (PlatformCompareMemory(p_test_bss_desc->bdBssIdBuf, p_tmp_bss_desc->bdBssIdBuf, 6) != 0) { - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_sw_ant_div_check_before_link(): ERROR!! This shall not happen.\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "%s: ERROR!! This shall not happen.\n", + __func__); continue; } if (dm->support_ic_type != ODM_RTL8723B) { if (p_tmp_bss_desc->ChannelNumber == scan_channel) { if (p_tmp_bss_desc->RecvSignalPower > p_test_bss_desc->RecvSignalPower) { - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_sw_ant_div_check_before_link: Compare scan entry: score++\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Compare scan entry: score++\n", __func__); RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen); PHYDM_DBG(dm, DBG_ANT_DIV, "at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower); score++; PlatformMoveMemory(p_test_bss_desc, p_tmp_bss_desc, sizeof(RT_WLAN_BSS)); } else if (p_tmp_bss_desc->RecvSignalPower < p_test_bss_desc->RecvSignalPower) { - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_sw_ant_div_check_before_link: Compare scan entry: score--\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Compare scan entry: score--\n", __func__); RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen); PHYDM_DBG(dm, DBG_ANT_DIV, "at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower); score--; @@ -432,7 +457,7 @@ odm_sw_ant_div_check_before_link( } } } - } else { /* 8723B */ + } else { /* @8723B */ if (p_tmp_bss_desc->ChannelNumber == scan_channel) { PHYDM_DBG(dm, DBG_ANT_DIV, "channel_number == scan_channel->(( %d ))\n", p_tmp_bss_desc->ChannelNumber); @@ -445,12 +470,16 @@ odm_sw_ant_div_check_before_link( PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "SSID:", p_tmp_bss_desc->bdSsIdBuf); PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "BSSID:", p_tmp_bss_desc->bdSsIdBuf); +#if 0 /* PHYDM_DBG(dm,DBG_ANT_DIV, "tmp_power_diff: (( %d)),max_power_diff: (( %d)),min_power_diff: (( %d))\n", tmp_power_diff,max_power_diff,min_power_diff); */ +#endif if (tmp_power_diff > max_power_diff) max_power_diff = tmp_power_diff; if (tmp_power_diff < min_power_diff) min_power_diff = tmp_power_diff; +#if 0 /* PHYDM_DBG(dm,DBG_ANT_DIV, "max_power_diff: (( %d)),min_power_diff: (( %d))\n",max_power_diff,min_power_diff); */ +#endif PlatformMoveMemory(p_test_bss_desc, p_tmp_bss_desc, sizeof(RT_WLAN_BSS)); } else if (p_test_bss_desc->RecvSignalPower > p_tmp_bss_desc->RecvSignalPower) { /* Pow(Ant1) < Pow(Ant2) */ @@ -484,10 +513,14 @@ odm_sw_ant_div_check_before_link( if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8821)) { if (mgnt_info->NumBssDesc != 0 && score < 0) { PHYDM_DBG(dm, DBG_ANT_DIV, - "odm_sw_ant_div_check_before_link(): Using ant(%s)\n", (fat_tab->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); + "%s: Using ant(%s)\n", __func__, + (fat_tab->rx_idle_ant == MAIN_ANT) ? + "MAIN_ANT" : "AUX_ANT"); } else { PHYDM_DBG(dm, DBG_ANT_DIV, - "odm_sw_ant_div_check_before_link(): Remain ant(%s)\n", (fat_tab->rx_idle_ant == MAIN_ANT) ? "AUX_ANT" : "MAIN_ANT"); + "%s: Remain ant(%s)\n", __func__, + (fat_tab->rx_idle_ant == MAIN_ANT) ? + "AUX_ANT" : "MAIN_ANT"); if (fat_tab->rx_idle_ant == MAIN_ANT) odm_update_rx_idle_ant(dm, AUX_ANT); @@ -497,10 +530,16 @@ odm_sw_ant_div_check_before_link( if (IS_5G_WIRELESS_MODE(mgnt_info->dot11CurrentWirelessMode)) { dm_swat_table->ant_5g = fat_tab->rx_idle_ant; - PHYDM_DBG(dm, DBG_ANT_DIV, "dm_swat_table->ant_5g=%s\n", (fat_tab->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "dm_swat_table->ant_5g=%s\n", + (fat_tab->rx_idle_ant == MAIN_ANT) ? + "MAIN_ANT" : "AUX_ANT"); } else { dm_swat_table->ant_2g = fat_tab->rx_idle_ant; - PHYDM_DBG(dm, DBG_ANT_DIV, "dm_swat_table->ant_2g=%s\n", (fat_tab->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "dm_swat_table->ant_2g=%s\n", + (fat_tab->rx_idle_ant == MAIN_ANT) ? + "MAIN_ANT" : "AUX_ANT"); } } else if (dm->support_ic_type == ODM_RTL8723B) { if (counter == 0) { @@ -509,16 +548,16 @@ odm_sw_ant_div_check_before_link( dm->dm_swat_table.rssi_ant_dect_result = false; PHYDM_DBG(dm, DBG_ANT_DIV, "counter=(( 0 )) , [[ Cannot find any AP with Aux-ant ]] -> Scan Target-channel again\n"); - /* 3 [ Scan again ] */ + /* @3 [ Scan again ] */ odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel); PlatformSetTimer(adapter, &mgnt_info->ScanTimer, 5); return true; } else { /* pre_aux_fail_detec == true */ - /* 2 [ Single Antenna ] */ + /* @2 [ Single Antenna ] */ dm->dm_swat_table.pre_aux_fail_detec = false; dm->dm_swat_table.rssi_ant_dect_result = true; PHYDM_DBG(dm, DBG_ANT_DIV, "counter=(( 0 )) , [[ Still cannot find any AP ]]\n"); - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_sw_ant_div_check_before_link(): Single antenna\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Single antenna\n", __func__); } dm->dm_swat_table.aux_fail_detec_counter++; } else { @@ -533,74 +572,82 @@ odm_sw_ant_div_check_before_link( PHYDM_DBG(dm, DBG_ANT_DIV, "counter: (( %d )) , power_diff: (( %d ))\n", counter, power_diff); PHYDM_DBG(dm, DBG_ANT_DIV, "[ counter>=4 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d ))\n", avg_power_diff, max_power_diff, min_power_diff); - } else { /* counter==1,2 */ + } else { /* @counter==1,2 */ avg_power_diff = power_diff / counter; PHYDM_DBG(dm, DBG_ANT_DIV, "avg_power_diff: (( %d )) , counter: (( %d )) , power_diff: (( %d ))\n", avg_power_diff, counter, power_diff); } - /* 2 [ Retry ] */ - if ((avg_power_diff >= power_target_L) && (avg_power_diff <= power_target_H)) { + /* @2 [ Retry ] */ + if (avg_power_diff >= power_target_L && avg_power_diff <= power_target_H) { dm->dm_swat_table.retry_counter++; if (dm->dm_swat_table.retry_counter <= 3) { dm->dm_swat_table.rssi_ant_dect_result = false; PHYDM_DBG(dm, DBG_ANT_DIV, "[[ Low confidence result ]] avg_power_diff= (( %d )) -> Scan Target-channel again ]]\n", avg_power_diff); - /* 3 [ Scan again ] */ + /* @3 [ Scan again ] */ odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel); PlatformSetTimer(adapter, &mgnt_info->ScanTimer, 5); return true; } else { dm->dm_swat_table.rssi_ant_dect_result = true; PHYDM_DBG(dm, DBG_ANT_DIV, "[[ Still Low confidence result ]] (( retry_counter > 3 ))\n"); - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_sw_ant_div_check_before_link(): Single antenna\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Single antenna\n", __func__); } - } - /* 2 [ Dual Antenna ] */ + /* @2 [ Dual Antenna ] */ else if ((mgnt_info->NumBssDesc != 0) && (avg_power_diff < power_target_L)) { dm->dm_swat_table.rssi_ant_dect_result = true; if (dm->dm_swat_table.ANTB_ON == false) { dm->dm_swat_table.ANTA_ON = true; dm->dm_swat_table.ANTB_ON = true; } - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_sw_ant_div_check_before_link(): Dual antenna\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Dual antenna\n", __func__); dm->dm_swat_table.dual_ant_counter++; /* set bt coexDM from 1ant coexDM to 2ant coexDM */ BT_SetBtCoexAntNum(adapter, BT_COEX_ANT_TYPE_DETECTED, 2); - /* 3 [ Init antenna diversity ] */ + /* @3 [ Init antenna diversity ] */ dm->support_ability |= ODM_BB_ANT_DIV; odm_ant_div_init(dm); } - /* 2 [ Single Antenna ] */ + /* @2 [ Single Antenna ] */ else if (avg_power_diff > power_target_H) { dm->dm_swat_table.rssi_ant_dect_result = true; if (dm->dm_swat_table.ANTB_ON == true) { dm->dm_swat_table.ANTA_ON = true; dm->dm_swat_table.ANTB_ON = false; - /* bt_set_bt_coex_ant_num(adapter, BT_COEX_ANT_TYPE_DETECTED, 1); */ +#if 0 + /* @bt_set_bt_coex_ant_num(adapter, BT_COEX_ANT_TYPE_DETECTED, 1); */ +#endif } - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_sw_ant_div_check_before_link(): Single antenna\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Single antenna\n", __func__); dm->dm_swat_table.single_ant_counter++; } } +#if 0 /* PHYDM_DBG(dm,DBG_ANT_DIV, "is_result=(( %d ))\n",dm->dm_swat_table.rssi_ant_dect_result); */ - PHYDM_DBG(dm, DBG_ANT_DIV, "dual_ant_counter = (( %d )), single_ant_counter = (( %d )) , retry_counter = (( %d )) , aux_fail_detec_counter = (( %d ))\n\n\n", - dm->dm_swat_table.dual_ant_counter, dm->dm_swat_table.single_ant_counter, dm->dm_swat_table.retry_counter, dm->dm_swat_table.aux_fail_detec_counter); +#endif + PHYDM_DBG(dm, DBG_ANT_DIV, + "dual_ant_counter = (( %d )), single_ant_counter = (( %d )) , retry_counter = (( %d )) , aux_fail_detec_counter = (( %d ))\n\n\n", + dm->dm_swat_table.dual_ant_counter, + dm->dm_swat_table.single_ant_counter, + dm->dm_swat_table.retry_counter, + dm->dm_swat_table.aux_fail_detec_counter); - /* 2 recover the antenna setting */ + /* @2 recover the antenna setting */ if (dm->dm_swat_table.ANTB_ON == false) odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, 0xfff, (dm_swat_table->swas_no_link_bk_reg948)); - PHYDM_DBG(dm, DBG_ANT_DIV, "is_result=(( %d )), Recover Reg[948]= (( %x ))\n\n", dm->dm_swat_table.rssi_ant_dect_result, dm_swat_table->swas_no_link_bk_reg948); - - + PHYDM_DBG(dm, DBG_ANT_DIV, + "is_result=(( %d )), Recover Reg[948]= (( %x ))\n\n", + dm->dm_swat_table.rssi_ant_dect_result, + dm_swat_table->swas_no_link_bk_reg948); } - /* Check state reset to default and wait for next time. */ + /* @Check state reset to default and wait for next time. */ dm_swat_table->swas_no_link_state = 0; mgnt_info->bScanAntDetect = false; @@ -608,236 +655,237 @@ odm_sw_ant_div_check_before_link( } #else - return false; + return false; #endif return false; } - - - - - -/* 1 [3. PSD method] ========================================================== */ -void -odm_single_dual_antenna_detection_psd( - void *dm_void -) +/* @1 [3. PSD method] ========================================================== */ +void odm_single_dual_antenna_detection_psd( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 channel_ori; - u8 initial_gain = 0x36; - u8 tone_idx; - u8 tone_lenth_1 = 7, tone_lenth_2 = 4; - u16 tone_idx_1[7] = {88, 104, 120, 8, 24, 40, 56}; - u16 tone_idx_2[4] = {8, 24, 40, 56}; - u32 psd_report_main[11] = {0}, psd_report_aux[11] = {0}; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 channel_ori; + u8 initial_gain = 0x36; + u8 tone_idx; + u8 tone_lenth_1 = 7, tone_lenth_2 = 4; + u16 tone_idx_1[7] = {88, 104, 120, 8, 24, 40, 56}; + u16 tone_idx_2[4] = {8, 24, 40, 56}; + u32 psd_report_main[11] = {0}, psd_report_aux[11] = {0}; /* u8 tone_lenth_1=4, tone_lenth_2=2; */ /* u16 tone_idx_1[4]={88, 120, 24, 56}; */ /* u16 tone_idx_2[2]={ 24, 56}; */ /* u32 psd_report_main[6]={0}, psd_report_aux[6]={0}; */ - u32 PSD_report_temp, max_psd_report_main = 0, max_psd_report_aux = 0; - u32 PSD_power_threshold; - u32 main_psd_result = 0, aux_psd_result = 0; - u32 regc50, reg948, regb2c, regc14, reg908; - u32 i = 0, test_num = 8; - + u32 PSD_report_temp, max_psd_report_main = 0, max_psd_report_aux = 0; + u32 PSD_power_threshold; + u32 main_psd_result = 0, aux_psd_result = 0; + u32 regc50, reg948, regb2c, regc14, reg908; + u32 i = 0, test_num = 8; if (dm->support_ic_type != ODM_RTL8723B) return; - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_single_dual_antenna_detection_psd()============>\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "%s============>\n", __func__); - /* 2 [ Backup Current RF/BB Settings ] */ + /* @2 [ Backup Current RF/BB Settings ] */ channel_ori = odm_get_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK); reg948 = odm_get_bb_reg(dm, REG_S0_S1_PATH_SWITCH, MASKDWORD); - regb2c = odm_get_bb_reg(dm, REG_AGC_TABLE_SELECT, MASKDWORD); + regb2c = odm_get_bb_reg(dm, REG_AGC_TABLE_SELECT, MASKDWORD); regc50 = odm_get_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD); - regc14 = odm_get_bb_reg(dm, 0xc14, MASKDWORD); - reg908 = odm_get_bb_reg(dm, 0x908, MASKDWORD); + regc14 = odm_get_bb_reg(dm, R_0xc14, MASKDWORD); + reg908 = odm_get_bb_reg(dm, R_0x908, MASKDWORD); - /* 2 [ setting for doing PSD function (CH4)] */ - odm_set_bb_reg(dm, REG_FPGA0_RFMOD, BIT(24), 0); /* disable whole CCK block */ + /* @2 [ setting for doing PSD function (CH4)] */ + odm_set_bb_reg(dm, REG_FPGA0_RFMOD, BIT(24), 0); /* @disable whole CCK block */ odm_write_1byte(dm, REG_TXPAUSE, 0xFF); /* Turn off TX -> Pause TX Queue */ - odm_set_bb_reg(dm, 0xC14, MASKDWORD, 0x0); /* [ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] */ + odm_set_bb_reg(dm, R_0xc14, MASKDWORD, 0x0); /* @[ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] */ /* PHYTXON while loop */ - odm_set_bb_reg(dm, 0x908, MASKDWORD, 0x803); - while (odm_get_bb_reg(dm, 0xdf4, BIT(6))) { + odm_set_bb_reg(dm, R_0x908, MASKDWORD, 0x803); + while (odm_get_bb_reg(dm, R_0xdf4, BIT(6))) { i++; if (i > 1000000) { - PHYDM_DBG(dm, DBG_ANT_DIV, "Wait in %s() more than %d times!\n", __FUNCTION__, i); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Wait in %s() more than %d times!\n", + __FUNCTION__, i); break; } } - odm_set_bb_reg(dm, 0xc50, 0x7f, initial_gain); - odm_set_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); /* Set RF to CH4 & 40M */ - odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0xf); /* 3 wire Disable 88c[23:20]=0xf */ - odm_set_bb_reg(dm, REG_FPGA0_PSD_FUNCTION, BIT(14) | BIT15, 0x0); /* 128 pt */ /* Set PSD 128 ptss */ + odm_set_bb_reg(dm, R_0xc50, 0x7f, initial_gain); + odm_set_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); /* Set RF to CH4 & 40M */ + odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0xf); /* @3 wire Disable 88c[23:20]=0xf */ + odm_set_bb_reg(dm, REG_FPGA0_PSD_FUNCTION, BIT(14) | BIT15, 0x0); /* 128 pt */ /* Set PSD 128 ptss */ ODM_delay_us(3000); + /* @2 [ Doing PSD Function in (CH4)] */ - /* 2 [ Doing PSD Function in (CH4)] */ - - /* Antenna A */ + /* @Antenna A */ PHYDM_DBG(dm, DBG_ANT_DIV, "Switch to Main-ant (CH4)\n"); - odm_set_bb_reg(dm, 0x948, 0xfff, 0x200); + odm_set_bb_reg(dm, R_0x948, 0xfff, 0x200); ODM_delay_us(10); PHYDM_DBG(dm, DBG_ANT_DIV, "dbg\n"); for (i = 0; i < test_num; i++) { for (tone_idx = 0; tone_idx < tone_lenth_1; tone_idx++) { PSD_report_temp = phydm_get_psd_data(dm, tone_idx_1[tone_idx], initial_gain); - /* if( PSD_report_temp>psd_report_main[tone_idx] ) */ + /* @if( PSD_report_temp>psd_report_main[tone_idx] ) */ psd_report_main[tone_idx] += PSD_report_temp; } } - /* Antenna B */ + /* @Antenna B */ PHYDM_DBG(dm, DBG_ANT_DIV, "Switch to Aux-ant (CH4)\n"); - odm_set_bb_reg(dm, 0x948, 0xfff, 0x280); + odm_set_bb_reg(dm, R_0x948, 0xfff, 0x280); ODM_delay_us(10); for (i = 0; i < test_num; i++) { for (tone_idx = 0; tone_idx < tone_lenth_1; tone_idx++) { PSD_report_temp = phydm_get_psd_data(dm, tone_idx_1[tone_idx], initial_gain); - /* if( PSD_report_temp>psd_report_aux[tone_idx] ) */ + /* @if( PSD_report_temp>psd_report_aux[tone_idx] ) */ psd_report_aux[tone_idx] += PSD_report_temp; } } - /* 2 [ Doing PSD Function in (CH8)] */ + /* @2 [ Doing PSD Function in (CH8)] */ - odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0x0); /* 3 wire enable 88c[23:20]=0x0 */ + odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0x0); /* @3 wire enable 88c[23:20]=0x0 */ ODM_delay_us(3000); - odm_set_bb_reg(dm, 0xc50, 0x7f, initial_gain); - odm_set_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); /* Set RF to CH8 & 40M */ + odm_set_bb_reg(dm, R_0xc50, 0x7f, initial_gain); + odm_set_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); /* Set RF to CH8 & 40M */ - odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0xf); /* 3 wire Disable 88c[23:20]=0xf */ + odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0xf); /* @3 wire Disable 88c[23:20]=0xf */ ODM_delay_us(3000); - /* Antenna A */ + /* @Antenna A */ PHYDM_DBG(dm, DBG_ANT_DIV, "Switch to Main-ant (CH8)\n"); - odm_set_bb_reg(dm, 0x948, 0xfff, 0x200); + odm_set_bb_reg(dm, R_0x948, 0xfff, 0x200); ODM_delay_us(10); for (i = 0; i < test_num; i++) { for (tone_idx = 0; tone_idx < tone_lenth_2; tone_idx++) { PSD_report_temp = phydm_get_psd_data(dm, tone_idx_2[tone_idx], initial_gain); - /* if( PSD_report_temp>psd_report_main[tone_idx] ) */ + /* @if( PSD_report_temp>psd_report_main[tone_idx] ) */ psd_report_main[tone_lenth_1 + tone_idx] += PSD_report_temp; } } - /* Antenna B */ + /* @Antenna B */ PHYDM_DBG(dm, DBG_ANT_DIV, "Switch to Aux-ant (CH8)\n"); - odm_set_bb_reg(dm, 0x948, 0xfff, 0x280); + odm_set_bb_reg(dm, R_0x948, 0xfff, 0x280); ODM_delay_us(10); for (i = 0; i < test_num; i++) { for (tone_idx = 0; tone_idx < tone_lenth_2; tone_idx++) { PSD_report_temp = phydm_get_psd_data(dm, tone_idx_2[tone_idx], initial_gain); - /* if( PSD_report_temp>psd_report_aux[tone_idx] ) */ + /* @if( PSD_report_temp>psd_report_aux[tone_idx] ) */ psd_report_aux[tone_lenth_1 + tone_idx] += PSD_report_temp; } } - /* 2 [ Calculate Result ] */ + /* @2 [ Calculate Result ] */ PHYDM_DBG(dm, DBG_ANT_DIV, "\nMain PSD Result: (ALL)\n"); for (tone_idx = 0; tone_idx < (tone_lenth_1 + tone_lenth_2); tone_idx++) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Tone-%d]: %d,\n", (tone_idx + 1), psd_report_main[tone_idx]); + PHYDM_DBG(dm, DBG_ANT_DIV, "[Tone-%d]: %d,\n", (tone_idx + 1), + psd_report_main[tone_idx]); main_psd_result += psd_report_main[tone_idx]; if (psd_report_main[tone_idx] > max_psd_report_main) max_psd_report_main = psd_report_main[tone_idx]; } - PHYDM_DBG(dm, DBG_ANT_DIV, "--------------------------- \nTotal_Main= (( %d ))\n", main_psd_result); - PHYDM_DBG(dm, DBG_ANT_DIV, "MAX_Main = (( %d ))\n", max_psd_report_main); - + PHYDM_DBG(dm, DBG_ANT_DIV, + "--------------------------- \nTotal_Main= (( %d ))\n", + main_psd_result); + PHYDM_DBG(dm, DBG_ANT_DIV, "MAX_Main = (( %d ))\n", + max_psd_report_main); PHYDM_DBG(dm, DBG_ANT_DIV, "\nAux PSD Result: (ALL)\n"); for (tone_idx = 0; tone_idx < (tone_lenth_1 + tone_lenth_2); tone_idx++) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Tone-%d]: %d,\n", (tone_idx + 1), psd_report_aux[tone_idx]); + PHYDM_DBG(dm, DBG_ANT_DIV, "[Tone-%d]: %d,\n", (tone_idx + 1), + psd_report_aux[tone_idx]); aux_psd_result += psd_report_aux[tone_idx]; if (psd_report_aux[tone_idx] > max_psd_report_aux) max_psd_report_aux = psd_report_aux[tone_idx]; } - PHYDM_DBG(dm, DBG_ANT_DIV, "--------------------------- \nTotal_Aux= (( %d ))\n", aux_psd_result); - PHYDM_DBG(dm, DBG_ANT_DIV, "MAX_Aux = (( %d ))\n\n", max_psd_report_aux); + PHYDM_DBG(dm, DBG_ANT_DIV, + "--------------------------- \nTotal_Aux= (( %d ))\n", + aux_psd_result); + PHYDM_DBG(dm, DBG_ANT_DIV, "MAX_Aux = (( %d ))\n\n", + max_psd_report_aux); - /* main_psd_result=main_psd_result-max_psd_report_main; */ - /* aux_psd_result=aux_psd_result-max_psd_report_aux; */ + /* @main_psd_result=main_psd_result-max_psd_report_main; */ + /* @aux_psd_result=aux_psd_result-max_psd_report_aux; */ PSD_power_threshold = (main_psd_result * 7) >> 3; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Main_result, Aux_result ] = [ %d , %d ], PSD_power_threshold=(( %d ))\n", main_psd_result, aux_psd_result, PSD_power_threshold); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Main_result, Aux_result ] = [ %d , %d ], PSD_power_threshold=(( %d ))\n", + main_psd_result, aux_psd_result, PSD_power_threshold); - /* 3 [ Dual Antenna ] */ + /* @3 [ Dual Antenna ] */ if (aux_psd_result >= PSD_power_threshold) { if (dm->dm_swat_table.ANTB_ON == false) { dm->dm_swat_table.ANTA_ON = true; dm->dm_swat_table.ANTB_ON = true; } - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_sw_ant_div_check_before_link(): Dual antenna\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "odm_sw_ant_div_check_before_link(): Dual antenna\n"); +#if 0 /* set bt coexDM from 1ant coexDM to 2ant coexDM */ - /* bt_set_bt_coex_ant_num(adapter, BT_COEX_ANT_TYPE_DETECTED, 2); */ + /* @bt_set_bt_coex_ant_num(adapter, BT_COEX_ANT_TYPE_DETECTED, 2); */ +#endif - /* Init antenna diversity */ + /* @Init antenna diversity */ dm->support_ability |= ODM_BB_ANT_DIV; odm_ant_div_init(dm); } - /* 3 [ Single Antenna ] */ + /* @3 [ Single Antenna ] */ else { if (dm->dm_swat_table.ANTB_ON == true) { dm->dm_swat_table.ANTA_ON = true; dm->dm_swat_table.ANTB_ON = false; } - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_sw_ant_div_check_before_link(): Single antenna\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "odm_sw_ant_div_check_before_link(): Single antenna\n"); } - /* 2 [ Recover all parameters ] */ + /* @2 [ Recover all parameters ] */ odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, channel_ori); - odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0x0); /* 3 wire enable 88c[23:20]=0x0 */ - odm_set_bb_reg(dm, 0xc50, 0x7f, regc50); + odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0x0); /* @3 wire enable 88c[23:20]=0x0 */ + odm_set_bb_reg(dm, R_0xc50, 0x7f, regc50); odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, MASKDWORD, reg948); odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, MASKDWORD, regb2c); - odm_set_bb_reg(dm, REG_FPGA0_RFMOD, BIT(24), 1); /* enable whole CCK block */ + odm_set_bb_reg(dm, REG_FPGA0_RFMOD, BIT(24), 1); /* @enable whole CCK block */ odm_write_1byte(dm, REG_TXPAUSE, 0x0); /* Turn on TX */ /* Resume TX Queue */ - odm_set_bb_reg(dm, 0xC14, MASKDWORD, regc14); /* [ Set IQK Matrix = 0 ] equivalent to [ Turn on CCA] */ - odm_set_bb_reg(dm, 0x908, MASKDWORD, reg908); + odm_set_bb_reg(dm, R_0xc14, MASKDWORD, regc14); /* @[ Set IQK Matrix = 0 ] equivalent to [ Turn on CCA] */ + odm_set_bb_reg(dm, R_0x908, MASKDWORD, reg908); return; - } -#endif -void -odm_sw_ant_detect_init( - void *dm_void -) +void odm_sw_ant_detect_init(void *dm_void) { -#if (defined(CONFIG_ANT_DETECTION)) #if (RTL8723B_SUPPORT == 1) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; if (dm->support_ic_type != ODM_RTL8723B) return; - /* dm_swat_table->pre_antenna = MAIN_ANT; */ - /* dm_swat_table->cur_antenna = MAIN_ANT; */ + /* @dm_swat_table->pre_antenna = MAIN_ANT; */ + /* @dm_swat_table->cur_antenna = MAIN_ANT; */ dm_swat_table->swas_no_link_state = 0; dm_swat_table->pre_aux_fail_detec = false; dm_swat_table->swas_no_link_bk_reg948 = 0xff; - #ifdef CONFIG_PSD_TOOL +#ifdef CONFIG_PSD_TOOL phydm_psd_init(dm); - #endif #endif #endif } +#endif + diff --git a/hal/phydm/phydm_antdect.h b/hal/phydm/phydm_antdect.h index bf85c9b..f7fc75f 100644 --- a/hal/phydm/phydm_antdect.h +++ b/hal/phydm/phydm_antdect.h @@ -23,78 +23,56 @@ * *****************************************************************************/ -#ifndef __PHYDMANTDECT_H__ -#define __PHYDMANTDECT_H__ +#ifndef __PHYDMANTDECT_H__ +#define __PHYDMANTDECT_H__ -#define ANTDECT_VERSION "2.1" /*2015.07.29 by YuChen*/ +#define ANTDECT_VERSION "2.1" #if (defined(CONFIG_ANT_DETECTION)) -/* #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) */ -/* ANT Test */ -#define ANTTESTALL 0x00 /*ant A or B will be Testing*/ -#define ANTTESTA 0x01 /*ant A will be Testing*/ -#define ANTTESTB 0x02 /*ant B will be testing*/ - -#define MAX_ANTENNA_DETECTION_CNT 10 +/* @#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) */ +/* @ANT Test */ +#define ANTTESTALL 0x00 /*@ant A or B will be Testing*/ +#define ANTTESTA 0x01 /*@ant A will be Testing*/ +#define ANTTESTB 0x02 /*@ant B will be testing*/ +#define MAX_ANTENNA_DETECTION_CNT 10 struct _ANT_DETECTED_INFO { - boolean is_ant_detected; - u32 db_for_ant_a; - u32 db_for_ant_b; - u32 db_for_ant_o; + boolean is_ant_detected; + u32 db_for_ant_a; + u32 db_for_ant_b; + u32 db_for_ant_o; }; - enum dm_swas { antenna_a = 1, antenna_b = 2, antenna_max = 3, }; +/* @1 [1. Single Tone method] =================================================== */ - -/* 1 [1. Single Tone method] =================================================== */ - - - -void -odm_single_dual_antenna_default_setting( - void *dm_void -); +void odm_single_dual_antenna_default_setting( + void *dm_void); boolean odm_single_dual_antenna_detection( - void *dm_void, - u8 mode -); + void *dm_void, + u8 mode); -/* 1 [2. Scan AP RSSI method] ================================================== */ +/* @1 [2. Scan AP RSSI method] ================================================== */ -#define sw_ant_div_check_before_link odm_sw_ant_div_check_before_link +#define sw_ant_div_check_before_link odm_sw_ant_div_check_before_link boolean odm_sw_ant_div_check_before_link( - void *dm_void -); + void *dm_void); +/* @1 [3. PSD method] ========================================================== */ +void odm_single_dual_antenna_detection_psd( + void *dm_void); - -/* 1 [3. PSD method] ========================================================== */ - - -void -odm_single_dual_antenna_detection_psd( - void *dm_void -); - +void odm_sw_ant_detect_init(void *dm_void); #endif - -void -odm_sw_ant_detect_init( - void *dm_void -); - - #endif diff --git a/hal/phydm/phydm_antdiv.c b/hal/phydm/phydm_antdiv.c index ffa3ec4..4dabf38 100644 --- a/hal/phydm/phydm_antdiv.c +++ b/hal/phydm/phydm_antdiv.c @@ -23,36 +23,39 @@ * *****************************************************************************/ -/* ************************************************************ +/************************************************************* * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" -/* ****************************************************** - * when antenna test utility is on or some testing need to disable antenna diversity - * call this function to disable all ODM related mechanisms which will switch antenna. - * ****************************************************** */ -void -odm_stop_antenna_switch_dm( - void *dm_void -) +/******************************************************* + * when antenna test utility is on or some testing need to disable antenna + * diversity call this function to disable all ODM related mechanisms which + * will switch antenna. + ***************************************************** + */ +#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY +void odm_stop_antenna_switch_dm(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - /* disable ODM antenna diversity */ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + /* @disable ODM antenna diversity */ dm->support_ability &= ~ODM_BB_ANT_DIV; - odm_ant_div_on_off(dm, ANTDIV_OFF); + if (fat_tab->div_path_type == ANT_PATH_A) + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); + else if (fat_tab->div_path_type == ANT_PATH_B) + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B); + else if (fat_tab->div_path_type == ANT_PATH_AB) + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_AB); odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); PHYDM_DBG(dm, DBG_ANT_DIV, "STOP Antenna Diversity\n"); } -void -phydm_enable_antenna_diversity( - void *dm_void -) +void phydm_enable_antenna_diversity(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; dm->support_ability |= ODM_BB_ANT_DIV; dm->antdiv_select = 0; @@ -60,162 +63,185 @@ phydm_enable_antenna_diversity( odm_antenna_diversity_init(dm); } -void -odm_set_ant_config( - void *dm_void, - u8 ant_setting /* 0=A, 1=B, 2=C, .... */ -) +void odm_set_ant_config(void *dm_void, u8 ant_setting /* @0=A, 1=B, 2=C,...*/) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + if (dm->support_ic_type == ODM_RTL8723B) { - if (ant_setting == 0) /* ant A*/ - odm_set_bb_reg(dm, 0x948, MASKDWORD, 0x00000000); + if (ant_setting == 0) /* @ant A*/ + odm_set_bb_reg(dm, R_0x948, MASKDWORD, 0x00000000); else if (ant_setting == 1) - odm_set_bb_reg(dm, 0x948, MASKDWORD, 0x00000280); + odm_set_bb_reg(dm, R_0x948, MASKDWORD, 0x00000280); } else if (dm->support_ic_type == ODM_RTL8723D) { - if (ant_setting == 0) /* ant A*/ - odm_set_bb_reg(dm, 0x948, MASKLWORD, 0x0000); + if (ant_setting == 0) /* @ant A*/ + odm_set_bb_reg(dm, R_0x948, MASKLWORD, 0x0000); else if (ant_setting == 1) - odm_set_bb_reg(dm, 0x948, MASKLWORD, 0x0280); + odm_set_bb_reg(dm, R_0x948, MASKLWORD, 0x0280); } } /* ****************************************************** */ - -void -odm_sw_ant_div_rest_after_link( - void *dm_void -) +void odm_sw_ant_div_rest_after_link(void *dm_void) { #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - u32 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u32 i; if (dm->ant_div_type == S0S1_SW_ANTDIV) { - dm_swat_table->try_flag = SWAW_STEP_INIT; - dm_swat_table->rssi_trying = 0; - dm_swat_table->double_chk_flag = 0; + swat_tab->try_flag = SWAW_STEP_INIT; + swat_tab->rssi_trying = 0; + swat_tab->double_chk_flag = 0; fat_tab->rx_idle_ant = MAIN_ANT; for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) phydm_antdiv_reset_statistic(dm, i); } - -#endif + +#endif } -void -odm_ant_div_on_off( - void *dm_void, - u8 swch -) +void phydm_n_on_off(void *dm_void, u8 swch, u8 path) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + + if (path == ANT_PATH_A) { + odm_set_bb_reg(dm, R_0xc50, BIT(7), swch); + } else if (path == ANT_PATH_B) { + odm_set_bb_reg(dm, R_0xc58, BIT(7), swch); + } else if (path == ANT_PATH_AB) { + odm_set_bb_reg(dm, R_0xc50, BIT(7), swch); + odm_set_bb_reg(dm, R_0xc58, BIT(7), swch); + } + odm_set_bb_reg(dm, R_0xa00, BIT(15), swch); +#if (RTL8723D_SUPPORT == 1) + /*@Mingzhi 2017-05-08*/ + if (dm->support_ic_type == ODM_RTL8723D) { + if (swch == ANTDIV_ON) { + odm_set_bb_reg(dm, R_0xce0, BIT(1), 1); + odm_set_bb_reg(dm, R_0x948, BIT(6), 1); + /*@1:HW ctrl 0:SW ctrl*/ + } else { + odm_set_bb_reg(dm, R_0xce0, BIT(1), 0); + odm_set_bb_reg(dm, R_0x948, BIT(6), 0); + /*@1:HW ctrl 0:SW ctrl*/ + } + } +#endif +} + +void phydm_ac_on_off(void *dm_void, u8 swch, u8 path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + + if (dm->support_ic_type & ODM_RTL8812) { + odm_set_bb_reg(dm, R_0xc50, BIT(7), swch); + /* OFDM AntDiv function block enable */ + odm_set_bb_reg(dm, R_0xa00, BIT(15), swch); + /* @CCK AntDiv function block enable */ + } else if (dm->support_ic_type & ODM_RTL8822B) { + odm_set_bb_reg(dm, R_0x800, BIT(25), swch); + odm_set_bb_reg(dm, R_0xa00, BIT(15), swch); + if (path == ANT_PATH_A) { + odm_set_bb_reg(dm, R_0xc50, BIT(7), swch); + } else if (path == ANT_PATH_B) { + odm_set_bb_reg(dm, R_0xe50, BIT(7), swch); + } else if (path == ANT_PATH_AB) { + odm_set_bb_reg(dm, R_0xc50, BIT(7), swch); + odm_set_bb_reg(dm, R_0xe50, BIT(7), swch); + } + } else { + odm_set_bb_reg(dm, R_0x8d4, BIT(24), swch); + /* OFDM AntDiv function block enable */ + + if (dm->cut_version >= ODM_CUT_C && + dm->support_ic_type == ODM_RTL8821 && + dm->ant_div_type != S0S1_SW_ANTDIV) { + PHYDM_DBG(dm, DBG_ANT_DIV, "(Turn %s) CCK HW-AntDiv\n", + (swch == ANTDIV_ON) ? "ON" : "OFF"); + odm_set_bb_reg(dm, R_0x800, BIT(25), swch); + odm_set_bb_reg(dm, R_0xa00, BIT(15), swch); + /* @CCK AntDiv function block enable */ + } else if (dm->support_ic_type == ODM_RTL8821C) { + PHYDM_DBG(dm, DBG_ANT_DIV, "(Turn %s) CCK HW-AntDiv\n", + (swch == ANTDIV_ON) ? "ON" : "OFF"); + odm_set_bb_reg(dm, R_0x800, BIT(25), swch); + odm_set_bb_reg(dm, R_0xa00, BIT(15), swch); + /* @CCK AntDiv function block enable */ + } + } +} + +void odm_ant_div_on_off(void *dm_void, u8 swch, u8 path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; if (fat_tab->ant_div_on_off != swch) { if (dm->ant_div_type == S0S1_SW_ANTDIV) return; if (dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) { - PHYDM_DBG(dm, DBG_ANT_DIV, "(( Turn %s )) N-Series HW-AntDiv block\n", (swch == ANTDIV_ON) ? "ON" : "OFF"); - odm_set_bb_reg(dm, 0xc50, BIT(7), swch); - odm_set_bb_reg(dm, 0xa00, BIT(15), swch); - -#if (RTL8723D_SUPPORT == 1) - /*Mingzhi 2017-05-08*/ - if (dm->support_ic_type == ODM_RTL8723D) { - if (swch == ANTDIV_ON) { - odm_set_bb_reg(dm, 0xce0, BIT(1), 1); - odm_set_bb_reg(dm, 0x948, BIT(6), 1); /*1:HW ctrl 0:SW ctrl*/ - } - else{ - odm_set_bb_reg(dm, 0xce0, BIT(1), 0); - odm_set_bb_reg(dm, 0x948, BIT(6), 0); /*1:HW ctrl 0:SW ctrl*/ - } - } -#endif + PHYDM_DBG(dm, DBG_ANT_DIV, + "(( Turn %s )) N-Series HW-AntDiv block\n", + (swch == ANTDIV_ON) ? "ON" : "OFF"); + phydm_n_on_off(dm, swch, path); } else if (dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) { - PHYDM_DBG(dm, DBG_ANT_DIV, "(( Turn %s )) AC-Series HW-AntDiv block\n", (swch == ANTDIV_ON) ? "ON" : "OFF"); - if (dm->support_ic_type & ODM_RTL8812) { - odm_set_bb_reg(dm, 0xc50, BIT(7), swch); /* OFDM AntDiv function block enable */ - odm_set_bb_reg(dm, 0xa00, BIT(15), swch); /* CCK AntDiv function block enable */ - } else { - odm_set_bb_reg(dm, 0x8D4, BIT(24), swch); /* OFDM AntDiv function block enable */ - - if ((dm->cut_version >= ODM_CUT_C) && (dm->support_ic_type == ODM_RTL8821) && (dm->ant_div_type != S0S1_SW_ANTDIV)) { - PHYDM_DBG(dm, DBG_ANT_DIV, "(( Turn %s )) CCK HW-AntDiv block\n", (swch == ANTDIV_ON) ? "ON" : "OFF"); - odm_set_bb_reg(dm, 0x800, BIT(25), swch); - odm_set_bb_reg(dm, 0xA00, BIT(15), swch); /* CCK AntDiv function block enable */ - } else if (dm->support_ic_type == ODM_RTL8821C) { - PHYDM_DBG(dm, DBG_ANT_DIV, "(( Turn %s )) CCK HW-AntDiv block\n", (swch == ANTDIV_ON) ? "ON" : "OFF"); - odm_set_bb_reg(dm, 0x800, BIT(25), swch); - odm_set_bb_reg(dm, 0xA00, BIT(15), swch); /* CCK AntDiv function block enable */ - } - } + PHYDM_DBG(dm, DBG_ANT_DIV, + "(( Turn %s )) AC-Series HW-AntDiv block\n", + (swch == ANTDIV_ON) ? "ON" : "OFF"); + phydm_ac_on_off(dm, swch, path); } } fat_tab->ant_div_on_off = swch; - } -void -odm_tx_by_tx_desc_or_reg( - void *dm_void, - u8 swch -) +void odm_tx_by_tx_desc_or_reg(void *dm_void, u8 swch) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; u8 enable; if (fat_tab->b_fix_tx_ant == NO_FIX_TX_ANT) enable = (swch == TX_BY_DESC) ? 1 : 0; else - enable = 0;/*Force TX by Reg*/ + enable = 0; /*@Force TX by Reg*/ if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) { if (dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) - odm_set_bb_reg(dm, 0x80c, BIT(21), enable); + odm_set_bb_reg(dm, R_0x80c, BIT(21), enable); else if (dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) - odm_set_bb_reg(dm, 0x900, BIT(18), enable); + odm_set_bb_reg(dm, R_0x900, BIT(18), enable); - PHYDM_DBG(dm, DBG_ANT_DIV, "[AntDiv] TX_Ant_BY (( %s ))\n", (enable == TX_BY_DESC) ? "DESC" : "REG"); + PHYDM_DBG(dm, DBG_ANT_DIV, "[AntDiv] TX_Ant_BY (( %s ))\n", + (enable == TX_BY_DESC) ? "DESC" : "REG"); } } -#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -void -phydm_antdiv_reset_statistic( - void *dm_void, - u32 macid -) +void phydm_antdiv_reset_statistic(void *dm_void, u32 macid) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - fat_tab->main_ant_sum[macid] = 0; - fat_tab->aux_ant_sum[macid] = 0; - fat_tab->main_ant_cnt[macid] = 0; - fat_tab->aux_ant_cnt[macid] = 0; - fat_tab->main_ant_sum_cck[macid] = 0; - fat_tab->aux_ant_sum_cck[macid] = 0; - fat_tab->main_ant_cnt_cck[macid] = 0; - fat_tab->aux_ant_cnt_cck[macid] = 0; + fat_tab->main_sum[macid] = 0; + fat_tab->aux_sum[macid] = 0; + fat_tab->main_cnt[macid] = 0; + fat_tab->aux_cnt[macid] = 0; + fat_tab->main_sum_cck[macid] = 0; + fat_tab->aux_sum_cck[macid] = 0; + fat_tab->main_cnt_cck[macid] = 0; + fat_tab->aux_cnt_cck[macid] = 0; } -void -phydm_fast_training_enable( - void *dm_void, - u8 swch -) +void phydm_fast_training_enable(void *dm_void, u8 swch) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 enable; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 enable; if (swch == FAT_ON) enable = 1; @@ -225,173 +251,228 @@ phydm_fast_training_enable( PHYDM_DBG(dm, DBG_ANT_DIV, "Fast ant Training_en = ((%d))\n", enable); if (dm->support_ic_type == ODM_RTL8188E) { - odm_set_bb_reg(dm, 0xe08, BIT(16), enable); /*enable fast training*/ - /**/ + odm_set_bb_reg(dm, R_0xe08, BIT(16), enable); + /*@enable fast training*/ } else if (dm->support_ic_type == ODM_RTL8192E) { - odm_set_bb_reg(dm, 0xB34, BIT(28), enable); /*enable fast training (path-A)*/ - /*odm_set_bb_reg(dm, 0xB34, BIT(29), enable);*/ /*enable fast training (path-B)*/ + odm_set_bb_reg(dm, R_0xb34, BIT(28), enable); + /*@enable fast training (path-A)*/ +#if 0 + odm_set_bb_reg(dm, R_0xb34, BIT(29), enable); + /*enable fast training (path-B)*/ +#endif } else if (dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8822B)) { - odm_set_bb_reg(dm, 0x900, BIT(19), enable); /*enable fast training */ - /**/ + odm_set_bb_reg(dm, R_0x900, BIT(19), enable); + /*@enable fast training */ } } -void -phydm_keep_rx_ack_ant_by_tx_ant_time( - void *dm_void, - u32 time -) +void phydm_keep_rx_ack_ant_by_tx_ant_time(void *dm_void, u32 time) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; /* Timming issue: keep Rx ant after tx for ACK ( time x 3.2 mu sec)*/ - if (dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) { - odm_set_bb_reg(dm, 0xE20, BIT(23) | BIT(22) | BIT(21) | BIT(20), time); - /**/ - } else if (dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) { - odm_set_bb_reg(dm, 0x818, BIT(23) | BIT(22) | BIT(21) | BIT(20), time); - /**/ + if (dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) + odm_set_bb_reg(dm, R_0xe20, 0xf00000, time); + else if (dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) + odm_set_bb_reg(dm, R_0x818, 0xf00000, time); +} + +void phydm_update_rx_idle_ac(void *dm_void, u8 ant, u32 default_ant, + u32 optional_ant, u32 default_tx_ant) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + u16 value16 = odm_read_2byte(dm, ODM_REG_TRMUX_11AC + 2); + /* @2014/01/14 MH/Luke.Lee Add direct write for register 0xc0a to */ + /* @prevnt incorrect 0xc08 bit0-15.We still not know why it is changed*/ + value16 &= ~(BIT(11) | BIT(10) | BIT(9) | BIT(8) | BIT(7) | BIT(6) | + BIT(5) | BIT(4) | BIT(3)); + value16 |= ((u16)default_ant << 3); + value16 |= ((u16)optional_ant << 6); + value16 |= ((u16)default_tx_ant << 9); + odm_write_2byte(dm, ODM_REG_TRMUX_11AC + 2, value16); +#if 0 + odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, 0x380000, default_ant); + /* @Default RX */ + odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, 0x1c00000, optional_ant); + /* Optional RX */ + odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, 0xe000000, default_ant); + /* @Default TX */ +#endif +} + +void phydm_update_rx_idle_n(void *dm_void, u8 ant, u32 default_ant, + u32 optional_ant, u32 default_tx_ant) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 value32; + + if (dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8197F)) { + odm_set_bb_reg(dm, R_0xb38, 0x38, default_ant); + /* @Default RX */ + odm_set_bb_reg(dm, R_0xb38, 0x1c0, optional_ant); + /* Optional RX */ + odm_set_bb_reg(dm, R_0x860, 0x7000, default_ant); + /* @Default TX */ +#if (RTL8723B_SUPPORT == 1) + } else if (dm->support_ic_type == ODM_RTL8723B) { + value32 = odm_get_bb_reg(dm, R_0x948, 0xFFF); + + if (value32 != 0x280) + odm_update_rx_idle_ant_8723b(dm, ant, default_ant, + optional_ant); + else + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to 0x948 = 0x280\n"); +#endif + +#if (RTL8723D_SUPPORT == 1) /*@Mingzhi 2017-05-08*/ + } else if (dm->support_ic_type == ODM_RTL8723D) { + phydm_set_tx_ant_pwr_8723d(dm, ant); + odm_update_rx_idle_ant_8723d(dm, ant, default_ant, + optional_ant); +#endif + +#if (RTL8721D_SUPPORT == 1) + } else if (dm->support_ic_type == ODM_RTL8721D) { + odm_update_rx_idle_ant_8721d(dm, ant, default_ant, + optional_ant); +#endif + } else { +/*@8188E & 8188F*/ +/*@ if (dm->support_ic_type == ODM_RTL8723D) {*/ +/*#if (RTL8723D_SUPPORT == 1)*/ +/* phydm_set_tx_ant_pwr_8723d(dm, ant);*/ +/*#endif*/ +/* }*/ +#if (RTL8188F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8188F) + phydm_update_rx_idle_antenna_8188F(dm, default_ant); +#endif + + odm_set_bb_reg(dm, R_0x864, 0x38, default_ant);/*@Default RX*/ + odm_set_bb_reg(dm, R_0x864, 0x1c0, optional_ant); + /*Optional RX*/ + odm_set_bb_reg(dm, R_0x860, 0x7000, default_tx_ant); + /*@Default TX*/ } } -void -odm_update_rx_idle_ant( - void *dm_void, - u8 ant -) +void odm_update_rx_idle_ant(void *dm_void, u8 ant) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - u32 default_ant, optional_ant, value32, default_tx_ant; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u32 default_ant, optional_ant, value32, default_tx_ant; if (fat_tab->rx_idle_ant != ant) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Update Rx-Idle-ant ] rx_idle_ant =%s\n", (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Update Rx-Idle-ant ] rx_idle_ant =%s\n", + (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); if (!(dm->support_ic_type & ODM_RTL8723B)) fat_tab->rx_idle_ant = ant; if (ant == MAIN_ANT) { - default_ant = ANT1_2G; - optional_ant = ANT2_2G; + default_ant = ANT1_2G; + optional_ant = ANT2_2G; } else { - default_ant = ANT2_2G; - optional_ant = ANT1_2G; + default_ant = ANT2_2G; + optional_ant = ANT1_2G; } if (fat_tab->b_fix_tx_ant != NO_FIX_TX_ANT) - default_tx_ant = (fat_tab->b_fix_tx_ant == FIX_TX_AT_MAIN) ? 0 : 1; + default_tx_ant = (fat_tab->b_fix_tx_ant == + FIX_TX_AT_MAIN) ? 0 : 1; else default_tx_ant = default_ant; if (dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) { - if (dm->support_ic_type == ODM_RTL8192E) { - odm_set_bb_reg(dm, 0xB38, BIT(5) | BIT(4) | BIT(3), default_ant); /* Default RX */ - odm_set_bb_reg(dm, 0xB38, BIT(8) | BIT(7) | BIT(6), optional_ant); /* Optional RX */ - odm_set_bb_reg(dm, 0x860, BIT(14) | BIT(13) | BIT(12), default_ant); /* Default TX */ - } -#if (RTL8723B_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8723B) { - value32 = odm_get_bb_reg(dm, 0x948, 0xFFF); - - if (value32 != 0x280) - odm_update_rx_idle_ant_8723b(dm, ant, default_ant, optional_ant); - else - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to 0x948 = 0x280\n"); - } -#endif - -#if (RTL8723D_SUPPORT == 1) /*Mingzhi 2017-05-08*/ - else if (dm->support_ic_type == ODM_RTL8723D) { - phydm_set_tx_ant_pwr_8723d(dm, ant); - odm_update_rx_idle_ant_8723d(dm, ant, default_ant, optional_ant); - - } -#endif - - else { /*8188E & 8188F*/ -/* - if (dm->support_ic_type == ODM_RTL8723D) { -#if (RTL8723D_SUPPORT == 1) - phydm_set_tx_ant_pwr_8723d(dm, ant); -#endif - } -*/ -#if (RTL8188F_SUPPORT == 1) - if (dm->support_ic_type == ODM_RTL8188F) { - phydm_update_rx_idle_antenna_8188F(dm, default_ant); - /**/ - } -#endif - - odm_set_bb_reg(dm, 0x864, BIT(5) | BIT(4) | BIT(3), default_ant); /*Default RX*/ - odm_set_bb_reg(dm, 0x864, BIT(8) | BIT(7) | BIT(6), optional_ant); /*Optional RX*/ - odm_set_bb_reg(dm, 0x860, BIT(14) | BIT(13) | BIT(12), default_tx_ant); /*Default TX*/ - } + phydm_update_rx_idle_n(dm, ant, default_ant, + optional_ant, default_tx_ant); } else if (dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) { - u16 value16 = odm_read_2byte(dm, ODM_REG_TRMUX_11AC + 2); - /* */ - /* 2014/01/14 MH/Luke.Lee Add direct write for register 0xc0a to prevnt */ - /* incorrect 0xc08 bit0-15 .We still not know why it is changed. */ - /* */ - value16 &= ~(BIT(11) | BIT(10) | BIT(9) | BIT(8) | BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3)); - value16 |= ((u16)default_ant << 3); - value16 |= ((u16)optional_ant << 6); - value16 |= ((u16)default_ant << 9); - odm_write_2byte(dm, ODM_REG_TRMUX_11AC + 2, value16); -#if 0 - odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, BIT(21) | BIT20 | BIT19, default_ant); /* Default RX */ - odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, BIT(24) | BIT23 | BIT22, optional_ant); /* Optional RX */ - odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, BIT(27) | BIT26 | BIT25, default_ant); /* Default TX */ -#endif + phydm_update_rx_idle_ac(dm, ant, default_ant, + optional_ant, default_tx_ant); } + /*PathA Resp Tx*/ + if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | + ODM_RTL8814A)) + odm_set_mac_reg(dm, R_0x6d8, 0x7, default_tx_ant); + else if (dm->support_ic_type == ODM_RTL8188E) + odm_set_mac_reg(dm, R_0x6d8, 0xc0, default_tx_ant); + else + odm_set_mac_reg(dm, R_0x6d8, 0x700, default_tx_ant); - if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814A)) { - odm_set_mac_reg(dm, 0x6D8, 0x7, default_tx_ant); /*PathA Resp Tx*/ - /**/ - } else if (dm->support_ic_type == ODM_RTL8188E) { - odm_set_mac_reg(dm, 0x6D8, BIT(7) | BIT(6), default_tx_ant); /*PathA Resp Tx*/ - /**/ - } else { - odm_set_mac_reg(dm, 0x6D8, BIT(10) | BIT(9) | BIT(8), default_tx_ant); /*PathA Resp Tx*/ - /**/ - } - - } else { /* fat_tab->rx_idle_ant == ant */ - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Stay in Ori-ant ] rx_idle_ant =%s\n", (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); + } else { /* @fat_tab->rx_idle_ant == ant */ + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Stay in Ori-ant ] rx_idle_ant =%s\n", + (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); fat_tab->rx_idle_ant = ant; } } -void -phydm_set_antdiv_val( - void *dm_void, - u32 *val_buf, - u8 val_len -) +void phydm_update_rx_idle_ant_pathb(void *dm_void, u8 ant) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u32 default_ant, optional_ant, value32, default_tx_ant; + + if (fat_tab->rx_idle_ant2 != ant) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Update Rx-Idle-ant2 ] rx_idle_ant2 =%s\n", + (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); + if (ant == MAIN_ANT) { + default_ant = ANT1_2G; + optional_ant = ANT2_2G; + } else { + default_ant = ANT2_2G; + optional_ant = ANT1_2G; + } + + if (fat_tab->b_fix_tx_ant != NO_FIX_TX_ANT) + default_tx_ant = (fat_tab->b_fix_tx_ant == + FIX_TX_AT_MAIN) ? 0 : 1; + else + default_tx_ant = default_ant; + if (dm->support_ic_type & ODM_RTL8822B) { + u16 v16 = odm_read_2byte(dm, ODM_REG_ANT_11AC_B + 2); + + v16 &= ~(0xff8);/*0xE08[11:3]*/ + v16 |= ((u16)default_ant << 3); + v16 |= ((u16)optional_ant << 6); + v16 |= ((u16)default_tx_ant << 9); + odm_write_2byte(dm, ODM_REG_ANT_11AC_B + 2, v16); + odm_set_mac_reg(dm, R_0x6d8, 0x38, default_tx_ant); + /*PathB Resp Tx*/ + } + } else { + /* fat_tab->rx_idle_ant2 == ant */ + PHYDM_DBG(dm, DBG_ANT_DIV, "[Stay Ori Ant] rx_idle_ant2 = %s\n", + (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); + fat_tab->rx_idle_ant2 = ant; + } +} + +void phydm_set_antdiv_val(void *dm_void, u32 *val_buf, u8 val_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; if (val_len != 1) { PHYDM_DBG(dm, ODM_COMP_API, "[Error][antdiv]Need val_len=1\n"); return; } - + odm_update_rx_idle_ant(dm, (u8)(*val_buf)); } -void -odm_update_tx_ant( - void *dm_void, - u8 ant, - u32 mac_id -) +void odm_update_tx_ant(void *dm_void, u8 ant, u32 mac_id) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - u8 tx_ant; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u8 tx_ant; if (fat_tab->b_fix_tx_ant != NO_FIX_TX_ANT) - ant = (fat_tab->b_fix_tx_ant == FIX_TX_AT_MAIN) ? MAIN_ANT : AUX_ANT; + ant = (fat_tab->b_fix_tx_ant == FIX_TX_AT_MAIN) ? + MAIN_ANT : AUX_ANT; if (dm->ant_div_type == CG_TRX_SMART_ANTDIV) tx_ant = ant; @@ -406,21 +487,25 @@ odm_update_tx_ant( fat_tab->antsel_b[mac_id] = (tx_ant & BIT(1)) >> 1; fat_tab->antsel_c[mac_id] = (tx_ant & BIT(2)) >> 2; - PHYDM_DBG(dm, DBG_ANT_DIV, "[Set TX-DESC value]: mac_id:(( %d )), tx_ant = (( %s ))\n", mac_id, (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); - /* PHYDM_DBG(dm,DBG_ANT_DIV,"antsel_tr_mux=(( 3'b%d%d%d ))\n",fat_tab->antsel_c[mac_id] , fat_tab->antsel_b[mac_id] , fat_tab->antsel_a[mac_id] ); */ - + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Set TX-DESC value]: mac_id:(( %d )), tx_ant = (( %s ))\n", + mac_id, (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); +#if 0 + PHYDM_DBG(dm, DBG_ANT_DIV, + "antsel_tr_mux=(( 3'b%d%d%d ))\n", + fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], + fat_tab->antsel_a[mac_id]); +#endif } -#ifdef BEAMFORMING_SUPPORT +#ifdef PHYDM_BEAMFORMING_SUPPORT #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -void -odm_bdc_init( - void *dm_void -) +void odm_bdc_init( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; PHYDM_DBG(dm, DBG_ANT_DIV, "\n[ BDC Initialization......]\n"); dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE; @@ -430,82 +515,83 @@ odm_bdc_init( dm->bdc_holdstate = 0xff; if (dm->support_ic_type == ODM_RTL8192E) { - odm_set_bb_reg(dm, 0xd7c, 0x0FFFFFFF, 0x1081008); - odm_set_bb_reg(dm, 0xd80, 0x0FFFFFFF, 0); + odm_set_bb_reg(dm, R_0xd7c, 0x0FFFFFFF, 0x1081008); + odm_set_bb_reg(dm, R_0xd80, 0x0FFFFFFF, 0); } else if (dm->support_ic_type == ODM_RTL8812) { - odm_set_bb_reg(dm, 0x9b0, 0x0FFFFFFF, 0x1081008); /* 0x9b0[30:0] = 01081008 */ - odm_set_bb_reg(dm, 0x9b4, 0x0FFFFFFF, 0); /* 0x9b4[31:0] = 00000000 */ + odm_set_bb_reg(dm, R_0x9b0, 0x0FFFFFFF, 0x1081008); + /* @0x9b0[30:0] = 01081008 */ + odm_set_bb_reg(dm, R_0x9b4, 0x0FFFFFFF, 0); + /* @0x9b4[31:0] = 00000000 */ } - } - -void -odm_CSI_on_off( - void *dm_void, - u8 CSI_en -) +void odm_CSI_on_off( + void *dm_void, + u8 CSI_en) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (CSI_en == CSI_ON) { if (dm->support_ic_type == ODM_RTL8192E) - odm_set_mac_reg(dm, 0xd84, BIT(11), 1); /* 0xd84[11]=1 */ + odm_set_mac_reg(dm, R_0xd84, BIT(11), 1); + /* @0xd84[11]=1 */ else if (dm->support_ic_type == ODM_RTL8812) - odm_set_mac_reg(dm, 0x9b0, BIT(31), 1); /* 0x9b0[31]=1 */ + odm_set_mac_reg(dm, R_0x9b0, BIT(31), 1); + /* @0x9b0[31]=1 */ } else if (CSI_en == CSI_OFF) { if (dm->support_ic_type == ODM_RTL8192E) - odm_set_mac_reg(dm, 0xd84, BIT(11), 0); /* 0xd84[11]=0 */ + odm_set_mac_reg(dm, R_0xd84, BIT(11), 0); + /* @0xd84[11]=0 */ else if (dm->support_ic_type == ODM_RTL8812) - odm_set_mac_reg(dm, 0x9b0, BIT(31), 0); /* 0x9b0[31]=0 */ + odm_set_mac_reg(dm, R_0x9b0, BIT(31), 0); + /* @0x9b0[31]=0 */ } } -void -odm_bd_ccoex_type_with_bfer_client( - void *dm_void, - u8 swch -) +void odm_bd_ccoex_type_with_bfer_client( + void *dm_void, + u8 swch) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; - u8 bd_ccoex_type_wbfer; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; + u8 bd_ccoex_type_wbfer; if (swch == DIVON_CSIOFF) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[BDCcoexType: 1] {DIV,CSI} ={1,0}\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[BDCcoexType: 1] {DIV,CSI} ={1,0}\n"); bd_ccoex_type_wbfer = 1; if (bd_ccoex_type_wbfer != dm_bdc_table->bd_ccoex_type_wbfer) { - odm_ant_div_on_off(dm, ANTDIV_ON); + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); odm_CSI_on_off(dm, CSI_OFF); dm_bdc_table->bd_ccoex_type_wbfer = 1; } } else if (swch == DIVOFF_CSION) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[BDCcoexType: 2] {DIV,CSI} ={0,1}\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[BDCcoexType: 2] {DIV,CSI} ={0,1}\n"); bd_ccoex_type_wbfer = 2; if (bd_ccoex_type_wbfer != dm_bdc_table->bd_ccoex_type_wbfer) { - odm_ant_div_on_off(dm, ANTDIV_OFF); + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); odm_CSI_on_off(dm, CSI_ON); dm_bdc_table->bd_ccoex_type_wbfer = 2; } } } -void -odm_bf_ant_div_mode_arbitration( - void *dm_void -) +void odm_bf_ant_div_mode_arbitration( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; - u8 current_bdc_mode; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; + u8 current_bdc_mode; #if (DM_ODM_SUPPORT_TYPE == ODM_AP) PHYDM_DBG(dm, DBG_ANT_DIV, "\n"); - /* 2 mode 1 */ - if ((dm_bdc_table->num_txbfee_client != 0) && (dm_bdc_table->num_txbfer_client == 0)) { + /* @2 mode 1 */ + if (dm_bdc_table->num_txbfee_client != 0 && + dm_bdc_table->num_txbfer_client == 0) { current_bdc_mode = BDC_MODE_1; if (current_bdc_mode != dm_bdc_table->bdc_mode) { @@ -515,10 +601,12 @@ odm_bf_ant_div_mode_arbitration( PHYDM_DBG(dm, DBG_ANT_DIV, "Change to (( Mode1 ))\n"); } - PHYDM_DBG(dm, DBG_ANT_DIV, "[Antdiv + BF coextance mode] : (( Mode1 ))\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Antdiv + BF coextance mode] : (( Mode1 ))\n"); } - /* 2 mode 2 */ - else if ((dm_bdc_table->num_txbfee_client == 0) && (dm_bdc_table->num_txbfer_client != 0)) { + /* @2 mode 2 */ + else if ((dm_bdc_table->num_txbfee_client == 0) && + (dm_bdc_table->num_txbfer_client != 0)) { current_bdc_mode = BDC_MODE_2; if (current_bdc_mode != dm_bdc_table->bdc_mode) { @@ -526,12 +614,13 @@ odm_bf_ant_div_mode_arbitration( dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE; dm_bdc_table->bdc_try_flag = 0; PHYDM_DBG(dm, DBG_ANT_DIV, "Change to (( Mode2 ))\n"); - } - PHYDM_DBG(dm, DBG_ANT_DIV, "[Antdiv + BF coextance mode] : (( Mode2 ))\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Antdiv + BF coextance mode] : (( Mode2 ))\n"); } - /* 2 mode 3 */ - else if ((dm_bdc_table->num_txbfee_client != 0) && (dm_bdc_table->num_txbfer_client != 0)) { + /* @2 mode 3 */ + else if ((dm_bdc_table->num_txbfee_client != 0) && + (dm_bdc_table->num_txbfer_client != 0)) { current_bdc_mode = BDC_MODE_3; if (current_bdc_mode != dm_bdc_table->bdc_mode) { @@ -542,10 +631,12 @@ odm_bf_ant_div_mode_arbitration( PHYDM_DBG(dm, DBG_ANT_DIV, "Change to (( Mode3 ))\n"); } - PHYDM_DBG(dm, DBG_ANT_DIV, "[Antdiv + BF coextance mode] : (( Mode3 ))\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Antdiv + BF coextance mode] : (( Mode3 ))\n"); } - /* 2 mode 4 */ - else if ((dm_bdc_table->num_txbfee_client == 0) && (dm_bdc_table->num_txbfer_client == 0)) { + /* @2 mode 4 */ + else if ((dm_bdc_table->num_txbfee_client == 0) && + (dm_bdc_table->num_txbfer_client == 0)) { current_bdc_mode = BDC_MODE_4; if (current_bdc_mode != dm_bdc_table->bdc_mode) { @@ -554,44 +645,45 @@ odm_bf_ant_div_mode_arbitration( PHYDM_DBG(dm, DBG_ANT_DIV, "Change to (( Mode4 ))\n"); } - PHYDM_DBG(dm, DBG_ANT_DIV, "[Antdiv + BF coextance mode] : (( Mode4 ))\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Antdiv + BF coextance mode] : (( Mode4 ))\n"); } #endif - } -void -odm_div_train_state_setting( - void *dm_void -) +void odm_div_train_state_setting( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; - PHYDM_DBG(dm, DBG_ANT_DIV, "\n*****[S T A R T ]***** [2-0. DIV_TRAIN_STATE]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "\n*****[S T A R T ]***** [2-0. DIV_TRAIN_STATE]\n"); dm_bdc_table->bdc_try_counter = 2; dm_bdc_table->bdc_try_flag = 1; dm_bdc_table->BDC_state = bdc_bfer_train_state; odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF); } -void -odm_bd_ccoex_bfee_rx_div_arbitration( - void *dm_void -) +void odm_bd_ccoex_bfee_rx_div_arbitration( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; boolean stop_bf_flag; - u8 bdc_active_mode; - + u8 bdc_active_mode; #if (DM_ODM_SUPPORT_TYPE == ODM_AP) - PHYDM_DBG(dm, DBG_ANT_DIV, "***{ num_BFee, num_BFer, num_client} = (( %d , %d , %d))\n", dm_bdc_table->num_txbfee_client, dm_bdc_table->num_txbfer_client, dm_bdc_table->num_client); - PHYDM_DBG(dm, DBG_ANT_DIV, "***{ num_BF_tars, num_DIV_tars } = (( %d , %d ))\n", dm_bdc_table->num_bf_tar, dm_bdc_table->num_div_tar); + PHYDM_DBG(dm, DBG_ANT_DIV, + "***{ num_BFee, num_BFer, num_client} = (( %d , %d , %d))\n", + dm_bdc_table->num_txbfee_client, + dm_bdc_table->num_txbfer_client, dm_bdc_table->num_client); + PHYDM_DBG(dm, DBG_ANT_DIV, + "***{ num_BF_tars, num_DIV_tars } = (( %d , %d ))\n", + dm_bdc_table->num_bf_tar, dm_bdc_table->num_div_tar); - /* 2 [ MIB control ] */ + /* @2 [ MIB control ] */ if (dm->bdc_holdstate == 2) { odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION); dm_bdc_table->BDC_state = BDC_BF_HOLD_STATE; @@ -604,33 +696,40 @@ odm_bd_ccoex_bfee_rx_div_arbitration( return; } - /* ------------------------------------------------------------ */ + /* @------------------------------------------------------------ */ + /* @2 mode 2 & 3 */ + if (dm_bdc_table->bdc_mode == BDC_MODE_2 || + dm_bdc_table->bdc_mode == BDC_MODE_3) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "\n{ Try_flag, Try_counter } = { %d , %d }\n", + dm_bdc_table->bdc_try_flag, + dm_bdc_table->bdc_try_counter); + PHYDM_DBG(dm, DBG_ANT_DIV, "BDCcoexType = (( %d ))\n\n", + dm_bdc_table->bd_ccoex_type_wbfer); - - /* 2 mode 2 & 3 */ - if (dm_bdc_table->bdc_mode == BDC_MODE_2 || dm_bdc_table->bdc_mode == BDC_MODE_3) { - PHYDM_DBG(dm, DBG_ANT_DIV, "\n{ Try_flag, Try_counter } = { %d , %d }\n", dm_bdc_table->bdc_try_flag, dm_bdc_table->bdc_try_counter); - PHYDM_DBG(dm, DBG_ANT_DIV, "BDCcoexType = (( %d ))\n\n", dm_bdc_table->bd_ccoex_type_wbfer); - - /* All Client have Bfer-Cap------------------------------- */ - if (dm_bdc_table->num_txbfer_client == dm_bdc_table->num_client) { /* BFer STA Only?: yes */ - PHYDM_DBG(dm, DBG_ANT_DIV, "BFer STA only? (( Yes ))\n"); + /* @All Client have Bfer-Cap------------------------------- */ + if (dm_bdc_table->num_txbfer_client == dm_bdc_table->num_client) { + /* @BFer STA Only?: yes */ + PHYDM_DBG(dm, DBG_ANT_DIV, + "BFer STA only? (( Yes ))\n"); dm_bdc_table->bdc_try_flag = 0; dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE; odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION); return; } else - PHYDM_DBG(dm, DBG_ANT_DIV, "BFer STA only? (( No ))\n"); - /* */ + PHYDM_DBG(dm, DBG_ANT_DIV, + "BFer STA only? (( No ))\n"); if (dm_bdc_table->is_all_bf_sta_idle == false && dm_bdc_table->is_all_div_sta_idle == true) { - PHYDM_DBG(dm, DBG_ANT_DIV, "All DIV-STA are idle, but BF-STA not\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "All DIV-STA are idle, but BF-STA not\n"); dm_bdc_table->bdc_try_flag = 0; dm_bdc_table->BDC_state = bdc_bfer_train_state; odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION); return; } else if (dm_bdc_table->is_all_bf_sta_idle == true && dm_bdc_table->is_all_div_sta_idle == false) { - PHYDM_DBG(dm, DBG_ANT_DIV, "All BF-STA are idle, but DIV-STA not\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "All BF-STA are idle, but DIV-STA not\n"); dm_bdc_table->bdc_try_flag = 0; dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE; odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF); @@ -640,10 +739,12 @@ odm_bd_ccoex_bfee_rx_div_arbitration( /* Select active mode-------------------------------------- */ if (dm_bdc_table->num_bf_tar == 0) { /* Selsect_1, Selsect_2 */ if (dm_bdc_table->num_div_tar == 0) { /* Selsect_3 */ - PHYDM_DBG(dm, DBG_ANT_DIV, "Select active mode (( 1 ))\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Select active mode (( 1 ))\n"); dm_bdc_table->bdc_active_mode = 1; } else { - PHYDM_DBG(dm, DBG_ANT_DIV, "Select active mode (( 2 ))\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Select active mode (( 2 ))\n"); dm_bdc_table->bdc_active_mode = 2; } dm_bdc_table->bdc_try_flag = 0; @@ -652,15 +753,19 @@ odm_bd_ccoex_bfee_rx_div_arbitration( return; } else { /* num_bf_tar > 0 */ if (dm_bdc_table->num_div_tar == 0) { /* Selsect_3 */ - PHYDM_DBG(dm, DBG_ANT_DIV, "Select active mode (( 3 ))\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Select active mode (( 3 ))\n"); dm_bdc_table->bdc_active_mode = 3; dm_bdc_table->bdc_try_flag = 0; dm_bdc_table->BDC_state = bdc_bfer_train_state; - odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION); + odm_bd_ccoex_type_with_bfer_client(dm, + DIVOFF_CSION) + ; return; } else { /* Selsect_4 */ bdc_active_mode = 4; - PHYDM_DBG(dm, DBG_ANT_DIV, "Select active mode (( 4 ))\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Select active mode (( 4 ))\n"); if (bdc_active_mode != dm_bdc_table->bdc_active_mode) { dm_bdc_table->bdc_active_mode = 4; @@ -679,71 +784,85 @@ odm_bd_ccoex_bfee_rx_div_arbitration( } #endif - /* Does Client number changed ? ------------------------------- */ + /* @Does Client number changed ? ------------------------------- */ if (dm_bdc_table->num_client != dm_bdc_table->pre_num_client) { dm_bdc_table->bdc_try_flag = 0; dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ The number of client has been changed !!!] return to (( BDC_DIV_TRAIN_STATE ))\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ The number of client has been changed !!!] return to (( BDC_DIV_TRAIN_STATE ))\n"); } dm_bdc_table->pre_num_client = dm_bdc_table->num_client; if (dm_bdc_table->bdc_try_flag == 0) { - /* 2 DIV_TRAIN_STATE (mode 2-0) */ + /* @2 DIV_TRAIN_STATE (mode 2-0) */ if (dm_bdc_table->BDC_state == BDC_DIV_TRAIN_STATE) odm_div_train_state_setting(dm); - /* 2 BFer_TRAIN_STATE (mode 2-1) */ + /* @2 BFer_TRAIN_STATE (mode 2-1) */ else if (dm_bdc_table->BDC_state == bdc_bfer_train_state) { - PHYDM_DBG(dm, DBG_ANT_DIV, "*****[2-1. BFer_TRAIN_STATE ]*****\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "*****[2-1. BFer_TRAIN_STATE ]*****\n"); - /* if(dm_bdc_table->num_bf_tar==0) */ - /* { */ +#if 0 + /* @if(dm_bdc_table->num_bf_tar==0) */ + /* @{ */ /* PHYDM_DBG(dm,DBG_ANT_DIV, "BF_tars exist? : (( No )), [ bdc_bfer_train_state ] >> [BDC_DIV_TRAIN_STATE]\n"); */ /* odm_div_train_state_setting( dm); */ - /* } */ + /* @} */ /* else */ /* num_bf_tar != 0 */ - /* { */ + /* @{ */ +#endif dm_bdc_table->bdc_try_counter = 2; dm_bdc_table->bdc_try_flag = 1; dm_bdc_table->BDC_state = BDC_DECISION_STATE; odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION); - PHYDM_DBG(dm, DBG_ANT_DIV, "BF_tars exist? : (( Yes )), [ bdc_bfer_train_state ] >> [BDC_DECISION_STATE]\n"); - /* } */ + PHYDM_DBG(dm, DBG_ANT_DIV, + "BF_tars exist? : (( Yes )), [ bdc_bfer_train_state ] >> [BDC_DECISION_STATE]\n"); + /* @} */ } - /* 2 DECISION_STATE (mode 2-2) */ + /* @2 DECISION_STATE (mode 2-2) */ else if (dm_bdc_table->BDC_state == BDC_DECISION_STATE) { - PHYDM_DBG(dm, DBG_ANT_DIV, "*****[2-2. DECISION_STATE]*****\n"); - /* if(dm_bdc_table->num_bf_tar==0) */ - /* { */ + PHYDM_DBG(dm, DBG_ANT_DIV, + "*****[2-2. DECISION_STATE]*****\n"); +#if 0 + /* @if(dm_bdc_table->num_bf_tar==0) */ + /* @{ */ /* ODM_AntDiv_Printk(("BF_tars exist? : (( No )), [ DECISION_STATE ] >> [BDC_DIV_TRAIN_STATE]\n")); */ /* odm_div_train_state_setting( dm); */ - /* } */ + /* @} */ /* else */ /* num_bf_tar != 0 */ - /* { */ + /* @{ */ +#endif if (dm_bdc_table->BF_pass == false || dm_bdc_table->DIV_pass == false) stop_bf_flag = true; else stop_bf_flag = false; - PHYDM_DBG(dm, DBG_ANT_DIV, "BF_tars exist? : (( Yes )), {BF_pass, DIV_pass, stop_bf_flag } = { %d, %d, %d }\n", dm_bdc_table->BF_pass, dm_bdc_table->DIV_pass, stop_bf_flag); + PHYDM_DBG(dm, DBG_ANT_DIV, + "BF_tars exist? : (( Yes )), {BF_pass, DIV_pass, stop_bf_flag } = { %d, %d, %d }\n", + dm_bdc_table->BF_pass, + dm_bdc_table->DIV_pass, stop_bf_flag); - if (stop_bf_flag == true) { /* DIV_en */ - dm_bdc_table->bdc_hold_counter = 10; /* 20 */ + if (stop_bf_flag == true) { /* @DIV_en */ + dm_bdc_table->bdc_hold_counter = 10; /* @20 */ odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF); dm_bdc_table->BDC_state = BDC_DIV_HOLD_STATE; PHYDM_DBG(dm, DBG_ANT_DIV, "[ stop_bf_flag= ((true)), BDC_DECISION_STATE ] >> [BDC_DIV_HOLD_STATE]\n"); - } else { /* BF_en */ - dm_bdc_table->bdc_hold_counter = 10; /* 20 */ + } else { /* @BF_en */ + dm_bdc_table->bdc_hold_counter = 10; /* @20 */ odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION); dm_bdc_table->BDC_state = BDC_BF_HOLD_STATE; PHYDM_DBG(dm, DBG_ANT_DIV, "[stop_bf_flag= ((false)), BDC_DECISION_STATE ] >> [BDC_BF_HOLD_STATE]\n"); } - /* } */ + /* @} */ } - /* 2 BF-HOLD_STATE (mode 2-3) */ + /* @2 BF-HOLD_STATE (mode 2-3) */ else if (dm_bdc_table->BDC_state == BDC_BF_HOLD_STATE) { - PHYDM_DBG(dm, DBG_ANT_DIV, "*****[2-3. BF_HOLD_STATE ]*****\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "*****[2-3. BF_HOLD_STATE ]*****\n"); - PHYDM_DBG(dm, DBG_ANT_DIV, "bdc_hold_counter = (( %d ))\n", dm_bdc_table->bdc_hold_counter); + PHYDM_DBG(dm, DBG_ANT_DIV, + "bdc_hold_counter = (( %d ))\n", + dm_bdc_table->bdc_hold_counter); if (dm_bdc_table->bdc_hold_counter == 1) { PHYDM_DBG(dm, DBG_ANT_DIV, "[ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE]\n"); @@ -751,26 +870,30 @@ odm_bd_ccoex_bfee_rx_div_arbitration( } else { dm_bdc_table->bdc_hold_counter--; - /* if(dm_bdc_table->num_bf_tar==0) */ - /* { */ +#if 0 + /* @if(dm_bdc_table->num_bf_tar==0) */ + /* @{ */ /* PHYDM_DBG(dm,DBG_ANT_DIV, "BF_tars exist? : (( No )), [ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE]\n"); */ /* odm_div_train_state_setting( dm); */ - /* } */ + /* @} */ /* else */ /* num_bf_tar != 0 */ - /* { */ + /* @{ */ /* PHYDM_DBG(dm,DBG_ANT_DIV, "BF_tars exist? : (( Yes ))\n"); */ +#endif dm_bdc_table->BDC_state = BDC_BF_HOLD_STATE; odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION); PHYDM_DBG(dm, DBG_ANT_DIV, "[ BDC_BF_HOLD_STATE ] >> [BDC_BF_HOLD_STATE]\n"); - /* } */ + /* @} */ } - } - /* 2 DIV-HOLD_STATE (mode 2-4) */ + /* @2 DIV-HOLD_STATE (mode 2-4) */ else if (dm_bdc_table->BDC_state == BDC_DIV_HOLD_STATE) { - PHYDM_DBG(dm, DBG_ANT_DIV, "*****[2-4. DIV_HOLD_STATE ]*****\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "*****[2-4. DIV_HOLD_STATE ]*****\n"); - PHYDM_DBG(dm, DBG_ANT_DIV, "bdc_hold_counter = (( %d ))\n", dm_bdc_table->bdc_hold_counter); + PHYDM_DBG(dm, DBG_ANT_DIV, + "bdc_hold_counter = (( %d ))\n", + dm_bdc_table->bdc_hold_counter); if (dm_bdc_table->bdc_hold_counter == 1) { PHYDM_DBG(dm, DBG_ANT_DIV, "[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE]\n"); @@ -781,11 +904,10 @@ odm_bd_ccoex_bfee_rx_div_arbitration( odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF); PHYDM_DBG(dm, DBG_ANT_DIV, "[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_HOLD_STATE]\n"); } - } } else if (dm_bdc_table->bdc_try_flag == 1) { - /* 2 Set Training counter */ + /* @2 Set Training counter */ if (dm_bdc_table->bdc_try_counter > 1) { dm_bdc_table->bdc_try_counter--; if (dm_bdc_table->bdc_try_counter == 1) @@ -794,126 +916,116 @@ odm_bd_ccoex_bfee_rx_div_arbitration( PHYDM_DBG(dm, DBG_ANT_DIV, "Training !!\n"); /* return ; */ } - } - } PHYDM_DBG(dm, DBG_ANT_DIV, "\n[end]\n"); -#endif /* #if(DM_ODM_SUPPORT_TYPE == ODM_AP) */ - - - - - - +#endif /* @#if(DM_ODM_SUPPORT_TYPE == ODM_AP) */ } #endif -#endif /* #ifdef BEAMFORMING_SUPPORT */ - +#endif /* @#ifdef PHYDM_BEAMFORMING_SUPPORT*/ #if (RTL8188E_SUPPORT == 1) - -void -odm_rx_hw_ant_div_init_88e( - void *dm_void -) +void odm_rx_hw_ant_div_init_88e(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 value32; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 value32; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -#if 0 - if (*(dm->mp_mode) == true) { - odm_set_bb_reg(dm, ODM_REG_IGI_A_11N, BIT(7), 0); /* disable HW AntDiv */ - odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); /* 1:CG, 0:CS */ - return; - } -#endif + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); - PHYDM_DBG(dm, DBG_ANT_DIV, "***8188E AntDiv_Init => ant_div_type=[CGCS_RX_HW_ANTDIV]\n"); - - /* MAC setting */ + /* @MAC setting */ value32 = odm_get_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD); - odm_set_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ + odm_set_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD, + value32 | (BIT(23) | BIT(25))); + /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ /* Pin Settings */ - odm_set_bb_reg(dm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);/* reg870[8]=1'b0, reg870[9]=1'b0 */ /* antsel antselb by HW */ - odm_set_bb_reg(dm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); /* reg864[10]=1'b0 */ /* antsel2 by HW */ - odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(22), 1); /* regb2c[22]=1'b0 */ /* disable CS/CG switch */ - odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); /* regb2c[31]=1'b1 */ /* output at CG only */ + odm_set_bb_reg(dm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0); + /* reg870[8]=1'b0, reg870[9]=1'b0 */ + /* antsel antselb by HW */ + odm_set_bb_reg(dm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); + /* reg864[10]=1'b0 */ /* antsel2 by HW */ + odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(22), 1); + /* regb2c[22]=1'b0 */ /* disable CS/CG switch */ + odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); + /* regb2c[31]=1'b1 */ /* output at CG only */ /* OFDM Settings */ odm_set_bb_reg(dm, ODM_REG_ANTDIV_PARA1_11N, MASKDWORD, 0x000000a0); - /* CCK Settings */ - odm_set_bb_reg(dm, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); /* Fix CCK PHY status report issue */ - odm_set_bb_reg(dm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */ + /* @CCK Settings */ + odm_set_bb_reg(dm, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); + /* @Fix CCK PHY status report issue */ + odm_set_bb_reg(dm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); + /* @CCK complete HW AntDiv within 64 samples */ - odm_set_bb_reg(dm, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0001); /* antenna mapping table */ + odm_set_bb_reg(dm, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0001); + /* @antenna mapping table */ fat_tab->enable_ctrl_frame_antdiv = 1; } -void -odm_trx_hw_ant_div_init_88e( - void *dm_void -) +void odm_trx_hw_ant_div_init_88e(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 value32; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 value32; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -#if 0 - if (*(dm->mp_mode) == true) { - odm_set_bb_reg(dm, ODM_REG_IGI_A_11N, BIT(7), 0); /* disable HW AntDiv */ - odm_set_bb_reg(dm, ODM_REG_RX_ANT_CTRL_11N, BIT(5) | BIT4 | BIT3, 0); /* Default RX (0/1) */ - return; - } -#endif - PHYDM_DBG(dm, DBG_ANT_DIV, "***8188E AntDiv_Init => ant_div_type=[CG_TRX_HW_ANTDIV (SPDT)]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); - /* MAC setting */ + /* @MAC setting */ value32 = odm_get_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD); - odm_set_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ + odm_set_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD, + value32 | (BIT(23) | BIT(25))); + /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ /* Pin Settings */ - odm_set_bb_reg(dm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);/* reg870[8]=1'b0, reg870[9]=1'b0 */ /* antsel antselb by HW */ - odm_set_bb_reg(dm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); /* reg864[10]=1'b0 */ /* antsel2 by HW */ - odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(22), 0); /* regb2c[22]=1'b0 */ /* disable CS/CG switch */ - odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); /* regb2c[31]=1'b1 */ /* output at CG only */ + odm_set_bb_reg(dm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0); + /* reg870[8]=1'b0, reg870[9]=1'b0 */ + /* antsel antselb by HW */ + odm_set_bb_reg(dm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); + /* reg864[10]=1'b0 */ /* antsel2 by HW */ + odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(22), 0); + /* regb2c[22]=1'b0 */ /* disable CS/CG switch */ + odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); + /* regb2c[31]=1'b1 */ /* output at CG only */ /* OFDM Settings */ odm_set_bb_reg(dm, ODM_REG_ANTDIV_PARA1_11N, MASKDWORD, 0x000000a0); - /* CCK Settings */ - odm_set_bb_reg(dm, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); /* Fix CCK PHY status report issue */ - odm_set_bb_reg(dm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */ + /* @CCK Settings */ + odm_set_bb_reg(dm, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); + /* @Fix CCK PHY status report issue */ + odm_set_bb_reg(dm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); + /* @CCK complete HW AntDiv within 64 samples */ - /* antenna mapping table */ + /* @antenna mapping table */ if (!dm->is_mp_chip) { /* testchip */ - odm_set_bb_reg(dm, ODM_REG_RX_DEFAULT_A_11N, BIT(10) | BIT(9) | BIT(8), 1); /* Reg858[10:8]=3'b001 */ - odm_set_bb_reg(dm, ODM_REG_RX_DEFAULT_A_11N, BIT(13) | BIT(12) | BIT(11), 2); /* Reg858[13:11]=3'b010 */ - } else /* MPchip */ - odm_set_bb_reg(dm, ODM_REG_ANT_MAPPING1_11N, MASKDWORD, 0x0201); /*Reg914=3'b010, Reg915=3'b001*/ + odm_set_bb_reg(dm, ODM_REG_RX_DEFAULT_A_11N, 0x700, 1); + /* Reg858[10:8]=3'b001 */ + odm_set_bb_reg(dm, ODM_REG_RX_DEFAULT_A_11N, 0x3800, 2); + /* Reg858[13:11]=3'b010 */ + } else /* @MPchip */ + odm_set_bb_reg(dm, ODM_REG_ANT_MAPPING1_11N, MASKDWORD, 0x0201); + /*Reg914=3'b010, Reg915=3'b001*/ fat_tab->enable_ctrl_frame_antdiv = 1; } - #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -void -odm_smart_hw_ant_div_init_88e( - void *dm_void -) +void odm_smart_hw_ant_div_init_88e( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 value32, i; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 value32, i; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - PHYDM_DBG(dm, DBG_ANT_DIV, "***8188E AntDiv_Init => ant_div_type=[CG_TRX_SMART_ANTDIV]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "***8188E AntDiv_Init => ant_div_type=[CG_TRX_SMART_ANTDIV]\n"); #if 0 - if (*(dm->mp_mode) == true) { - PHYDM_DBG(dm, ODM_COMP_INIT, "dm->ant_div_type: %d\n", dm->ant_div_type); + if (*dm->mp_mode == true) { + PHYDM_DBG(dm, ODM_COMP_INIT, "dm->ant_div_type: %d\n", + dm->ant_div_type); return; } #endif @@ -922,74 +1034,75 @@ odm_smart_hw_ant_div_init_88e( fat_tab->fat_state = FAT_PREPARE_STATE; dm->fat_comb_a = 5; - dm->antdiv_intvl = 0x64; /* 100ms */ + dm->antdiv_intvl = 0x64; /* @100ms */ for (i = 0; i < 6; i++) fat_tab->bssid[i] = 0; - for (i = 0; i < (dm->fat_comb_a) ; i++) { + for (i = 0; i < (dm->fat_comb_a); i++) { fat_tab->ant_sum_rssi[i] = 0; fat_tab->ant_rssi_cnt[i] = 0; fat_tab->ant_ave_rssi[i] = 0; } - /* MAC setting */ - value32 = odm_get_mac_reg(dm, 0x4c, MASKDWORD); - odm_set_mac_reg(dm, 0x4c, MASKDWORD, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ - value32 = odm_get_mac_reg(dm, 0x7B4, MASKDWORD); - odm_set_mac_reg(dm, 0x7b4, MASKDWORD, value32 | (BIT(16) | BIT(17))); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */ + /* @MAC setting */ + value32 = odm_get_mac_reg(dm, R_0x4c, MASKDWORD); + odm_set_mac_reg(dm, R_0x4c, MASKDWORD, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ + value32 = odm_get_mac_reg(dm, R_0x7b4, MASKDWORD); + odm_set_mac_reg(dm, R_0x7b4, MASKDWORD, value32 | (BIT(16) | BIT(17))); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */ /* value32 = platform_efio_read_4byte(adapter, 0x7B4); */ /* platform_efio_write_4byte(adapter, 0x7b4, value32|BIT(18)); */ /* append MACID in reponse packet */ - /* Match MAC ADDR */ - odm_set_mac_reg(dm, 0x7b4, 0xFFFF, 0); - odm_set_mac_reg(dm, 0x7b0, MASKDWORD, 0); + /* @Match MAC ADDR */ + odm_set_mac_reg(dm, R_0x7b4, 0xFFFF, 0); + odm_set_mac_reg(dm, R_0x7b0, MASKDWORD, 0); - odm_set_bb_reg(dm, 0x870, BIT(9) | BIT(8), 0);/* reg870[8]=1'b0, reg870[9]=1'b0 */ /* antsel antselb by HW */ - odm_set_bb_reg(dm, 0x864, BIT(10), 0); /* reg864[10]=1'b0 */ /* antsel2 by HW */ - odm_set_bb_reg(dm, 0xb2c, BIT(22), 0); /* regb2c[22]=1'b0 */ /* disable CS/CG switch */ - odm_set_bb_reg(dm, 0xb2c, BIT(31), 0); /* regb2c[31]=1'b1 */ /* output at CS only */ - odm_set_bb_reg(dm, 0xca4, MASKDWORD, 0x000000a0); + odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0); /* reg870[8]=1'b0, reg870[9]=1'b0 */ /* antsel antselb by HW */ + odm_set_bb_reg(dm, R_0x864, BIT(10), 0); /* reg864[10]=1'b0 */ /* antsel2 by HW */ + odm_set_bb_reg(dm, R_0xb2c, BIT(22), 0); /* regb2c[22]=1'b0 */ /* disable CS/CG switch */ + odm_set_bb_reg(dm, R_0xb2c, BIT(31), 0); /* regb2c[31]=1'b1 */ /* output at CS only */ + odm_set_bb_reg(dm, R_0xca4, MASKDWORD, 0x000000a0); - /* antenna mapping table */ + /* @antenna mapping table */ if (dm->fat_comb_a == 2) { if (!dm->is_mp_chip) { /* testchip */ - odm_set_bb_reg(dm, 0x858, BIT(10) | BIT(9) | BIT(8), 1); /* Reg858[10:8]=3'b001 */ - odm_set_bb_reg(dm, 0x858, BIT(13) | BIT(12) | BIT(11), 2); /* Reg858[13:11]=3'b010 */ - } else { /* MPchip */ - odm_set_bb_reg(dm, 0x914, MASKBYTE0, 1); - odm_set_bb_reg(dm, 0x914, MASKBYTE1, 2); + odm_set_bb_reg(dm, R_0x858, BIT(10) | BIT(9) | BIT(8), 1); /* Reg858[10:8]=3'b001 */ + odm_set_bb_reg(dm, R_0x858, BIT(13) | BIT(12) | BIT(11), 2); /* Reg858[13:11]=3'b010 */ + } else { /* @MPchip */ + odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 1); + odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 2); } } else { if (!dm->is_mp_chip) { /* testchip */ - odm_set_bb_reg(dm, 0x858, BIT(10) | BIT(9) | BIT(8), 0); /* Reg858[10:8]=3'b000 */ - odm_set_bb_reg(dm, 0x858, BIT(13) | BIT(12) | BIT(11), 1); /* Reg858[13:11]=3'b001 */ - odm_set_bb_reg(dm, 0x878, BIT(16), 0); - odm_set_bb_reg(dm, 0x858, BIT(15) | BIT(14), 2); /* (Reg878[0],Reg858[14:15])=3'b010 */ - odm_set_bb_reg(dm, 0x878, BIT(19) | BIT(18) | BIT(17), 3); /* Reg878[3:1]=3b'011 */ - odm_set_bb_reg(dm, 0x878, BIT(22) | BIT(21) | BIT(20), 4); /* Reg878[6:4]=3b'100 */ - odm_set_bb_reg(dm, 0x878, BIT(25) | BIT(24) | BIT(23), 5); /* Reg878[9:7]=3b'101 */ - odm_set_bb_reg(dm, 0x878, BIT(28) | BIT(27) | BIT(26), 6); /* Reg878[12:10]=3b'110 */ - odm_set_bb_reg(dm, 0x878, BIT(31) | BIT(30) | BIT(29), 7); /* Reg878[15:13]=3b'111 */ - } else { /* MPchip */ - odm_set_bb_reg(dm, 0x914, MASKBYTE0, 4); /* 0: 3b'000 */ - odm_set_bb_reg(dm, 0x914, MASKBYTE1, 2); /* 1: 3b'001 */ - odm_set_bb_reg(dm, 0x914, MASKBYTE2, 0); /* 2: 3b'010 */ - odm_set_bb_reg(dm, 0x914, MASKBYTE3, 1); /* 3: 3b'011 */ - odm_set_bb_reg(dm, 0x918, MASKBYTE0, 3); /* 4: 3b'100 */ - odm_set_bb_reg(dm, 0x918, MASKBYTE1, 5); /* 5: 3b'101 */ - odm_set_bb_reg(dm, 0x918, MASKBYTE2, 6); /* 6: 3b'110 */ - odm_set_bb_reg(dm, 0x918, MASKBYTE3, 255); /* 7: 3b'111 */ + odm_set_bb_reg(dm, R_0x858, BIT(10) | BIT(9) | BIT(8), 0); /* Reg858[10:8]=3'b000 */ + odm_set_bb_reg(dm, R_0x858, BIT(13) | BIT(12) | BIT(11), 1); /* Reg858[13:11]=3'b001 */ + odm_set_bb_reg(dm, R_0x878, BIT(16), 0); + odm_set_bb_reg(dm, R_0x858, BIT(15) | BIT(14), 2); /* @(Reg878[0],Reg858[14:15])=3'b010 */ + odm_set_bb_reg(dm, R_0x878, BIT(19) | BIT(18) | BIT(17), 3); /* Reg878[3:1]=3b'011 */ + odm_set_bb_reg(dm, R_0x878, BIT(22) | BIT(21) | BIT(20), 4); /* Reg878[6:4]=3b'100 */ + odm_set_bb_reg(dm, R_0x878, BIT(25) | BIT(24) | BIT(23), 5); /* Reg878[9:7]=3b'101 */ + odm_set_bb_reg(dm, R_0x878, BIT(28) | BIT(27) | BIT(26), 6); /* Reg878[12:10]=3b'110 */ + odm_set_bb_reg(dm, R_0x878, BIT(31) | BIT(30) | BIT(29), 7); /* Reg878[15:13]=3b'111 */ + } else { /* @MPchip */ + odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 4); /* @0: 3b'000 */ + odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 2); /* @1: 3b'001 */ + odm_set_bb_reg(dm, R_0x914, MASKBYTE2, 0); /* @2: 3b'010 */ + odm_set_bb_reg(dm, R_0x914, MASKBYTE3, 1); /* @3: 3b'011 */ + odm_set_bb_reg(dm, R_0x918, MASKBYTE0, 3); /* @4: 3b'100 */ + odm_set_bb_reg(dm, R_0x918, MASKBYTE1, 5); /* @5: 3b'101 */ + odm_set_bb_reg(dm, R_0x918, MASKBYTE2, 6); /* @6: 3b'110 */ + odm_set_bb_reg(dm, R_0x918, MASKBYTE3, 255); /* @7: 3b'111 */ } } - /* Default ant setting when no fast training */ - odm_set_bb_reg(dm, 0x864, BIT(5) | BIT(4) | BIT(3), 0); /* Default RX */ - odm_set_bb_reg(dm, 0x864, BIT(8) | BIT(7) | BIT(6), 1); /* Optional RX */ - odm_set_bb_reg(dm, 0x860, BIT(14) | BIT(13) | BIT(12), 0); /* Default TX */ + /* @Default ant setting when no fast training */ + odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), 0); /* @Default RX */ + odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), 1); /* Optional RX */ + odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), 0); /* @Default TX */ - /* Enter Traing state */ - odm_set_bb_reg(dm, 0x864, BIT(2) | BIT(1) | BIT(0), (dm->fat_comb_a - 1)); /* reg864[2:0]=3'd6 */ /* ant combination=reg864[2:0]+1 */ + /* @Enter Traing state */ + odm_set_bb_reg(dm, R_0x864, BIT(2) | BIT(1) | BIT(0), (dm->fat_comb_a - 1)); /* reg864[2:0]=3'd6 */ /* ant combination=reg864[2:0]+1 */ +#if 0 /* SW Control */ /* phy_set_bb_reg(adapter, 0x864, BIT10, 1); */ /* phy_set_bb_reg(adapter, 0x870, BIT9, 1); */ @@ -997,116 +1110,130 @@ odm_smart_hw_ant_div_init_88e( /* phy_set_bb_reg(adapter, 0x864, BIT11, 1); */ /* phy_set_bb_reg(adapter, 0x860, BIT9, 0); */ /* phy_set_bb_reg(adapter, 0x860, BIT8, 0); */ +#endif } #endif -#endif /* #if (RTL8188E_SUPPORT == 1) */ - +#endif /* @#if (RTL8188E_SUPPORT == 1) */ #if (RTL8192E_SUPPORT == 1) -void -odm_rx_hw_ant_div_init_92e( - void *dm_void -) +void odm_rx_hw_ant_div_init_92e(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; #if 0 - if (*(dm->mp_mode) == true) { + if (*dm->mp_mode == true) { odm_ant_div_on_off(dm, ANTDIV_OFF); - odm_set_bb_reg(dm, 0xc50, BIT(8), 0); /* r_rxdiv_enable_anta regc50[8]=1'b0 0: control by c50[9] */ - odm_set_bb_reg(dm, 0xc50, BIT(9), 1); /* 1:CG, 0:CS */ + odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); + /* r_rxdiv_enable_anta regc50[8]=1'b0 0: control by c50[9] */ + odm_set_bb_reg(dm, R_0xc50, BIT(9), 1); + /* @1:CG, 0:CS */ return; } #endif - PHYDM_DBG(dm, DBG_ANT_DIV, "***8192E AntDiv_Init => ant_div_type=[CGCS_RX_HW_ANTDIV]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); /* Pin Settings */ - odm_set_bb_reg(dm, 0x870, BIT(8), 0);/* reg870[8]=1'b0, */ /* "antsel" is controled by HWs */ - odm_set_bb_reg(dm, 0xc50, BIT(8), 1); /* regc50[8]=1'b1 */ /* " CS/CG switching" is controled by HWs */ + odm_set_bb_reg(dm, R_0x870, BIT(8), 0); + /* reg870[8]=1'b0, antsel is controled by HWs */ + odm_set_bb_reg(dm, R_0xc50, BIT(8), 1); + /* regc50[8]=1'b1 CS/CG switching is controled by HWs*/ - /* Mapping table */ - odm_set_bb_reg(dm, 0x914, 0xFFFF, 0x0100); /* antenna mapping table */ + /* @Mapping table */ + odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100); + /* @antenna mapping table */ /* OFDM Settings */ - odm_set_bb_reg(dm, 0xca4, 0x7FF, 0xA0); /* thershold */ - odm_set_bb_reg(dm, 0xca4, 0x7FF000, 0x0); /* bias */ + odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */ + odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */ - /* CCK Settings */ - odm_set_bb_reg(dm, 0xa04, 0xF000000, 0); /* Select which path to receive for CCK_1 & CCK_2 */ - odm_set_bb_reg(dm, 0xb34, BIT(30), 0); /* (92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */ - odm_set_bb_reg(dm, 0xa74, BIT(7), 1); /* Fix CCK PHY status report issue */ - odm_set_bb_reg(dm, 0xa0c, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */ + /* @CCK Settings */ + odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0); + /* Select which path to receive for CCK_1 & CCK_2 */ + odm_set_bb_reg(dm, R_0xb34, BIT(30), 0); + /* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + /* @Fix CCK PHY status report issue */ + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); + /* @CCK complete HW AntDiv within 64 samples */ #ifdef ODM_EVM_ENHANCE_ANTDIV phydm_evm_sw_antdiv_init(dm); #endif - } -void -odm_trx_hw_ant_div_init_92e( - void *dm_void -) +void odm_trx_hw_ant_div_init_92e(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if 0 - if (*(dm->mp_mode) == true) { + if (*dm->mp_mode == true) { odm_ant_div_on_off(dm, ANTDIV_OFF); - odm_set_bb_reg(dm, 0xc50, BIT(8), 0); /* r_rxdiv_enable_anta regc50[8]=1'b0 0: control by c50[9] */ - odm_set_bb_reg(dm, 0xc50, BIT(9), 1); /* 1:CG, 0:CS */ + odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); /* r_rxdiv_enable_anta regc50[8]=1'b0 0: control by c50[9] */ + odm_set_bb_reg(dm, R_0xc50, BIT(9), 1); /* @1:CG, 0:CS */ return; } #endif - PHYDM_DBG(dm, DBG_ANT_DIV, "***8192E AntDiv_Init => ant_div_type=[ Only for DIR605, CG_TRX_HW_ANTDIV]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); - /* 3 --RFE pin setting--------- */ - /* [MAC] */ - odm_set_mac_reg(dm, 0x38, BIT(11), 1); /* DBG PAD Driving control (GPIO 8) */ - odm_set_mac_reg(dm, 0x4c, BIT(23), 0); /* path-A, RFE_CTRL_3 */ - odm_set_mac_reg(dm, 0x4c, BIT(29), 1); /* path-A, RFE_CTRL_8 */ - /* [BB] */ - odm_set_bb_reg(dm, 0x944, BIT(3), 1); /* RFE_buffer */ - odm_set_bb_reg(dm, 0x944, BIT(8), 1); - odm_set_bb_reg(dm, 0x940, BIT(7) | BIT(6), 0x0); /* r_rfe_path_sel_ (RFE_CTRL_3) */ - odm_set_bb_reg(dm, 0x940, BIT(17) | BIT(16), 0x0); /* r_rfe_path_sel_ (RFE_CTRL_8) */ - odm_set_bb_reg(dm, 0x944, BIT(31), 0); /* RFE_buffer */ - odm_set_bb_reg(dm, 0x92C, BIT(3), 0); /* rfe_inv (RFE_CTRL_3) */ - odm_set_bb_reg(dm, 0x92C, BIT(8), 1); /* rfe_inv (RFE_CTRL_8) */ - odm_set_bb_reg(dm, 0x930, 0xF000, 0x8); /* path-A, RFE_CTRL_3 */ - odm_set_bb_reg(dm, 0x934, 0xF, 0x8); /* path-A, RFE_CTRL_8 */ - /* 3 ------------------------- */ + /* @3 --RFE pin setting--------- */ + /* @[MAC] */ + odm_set_mac_reg(dm, R_0x38, BIT(11), 1); + /* @DBG PAD Driving control (GPIO 8) */ + odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); /* path-A, RFE_CTRL_3 */ + odm_set_mac_reg(dm, R_0x4c, BIT(29), 1); /* path-A, RFE_CTRL_8 */ + /* @[BB] */ + odm_set_bb_reg(dm, R_0x944, BIT(3), 1); /* RFE_buffer */ + odm_set_bb_reg(dm, R_0x944, BIT(8), 1); + odm_set_bb_reg(dm, R_0x940, BIT(7) | BIT(6), 0x0); + /* r_rfe_path_sel_ (RFE_CTRL_3) */ + odm_set_bb_reg(dm, R_0x940, BIT(17) | BIT(16), 0x0); + /* r_rfe_path_sel_ (RFE_CTRL_8) */ + odm_set_bb_reg(dm, R_0x944, BIT(31), 0); /* RFE_buffer */ + odm_set_bb_reg(dm, R_0x92c, BIT(3), 0); /* rfe_inv (RFE_CTRL_3) */ + odm_set_bb_reg(dm, R_0x92c, BIT(8), 1); /* rfe_inv (RFE_CTRL_8) */ + odm_set_bb_reg(dm, R_0x930, 0xF000, 0x8); /* path-A, RFE_CTRL_3 */ + odm_set_bb_reg(dm, R_0x934, 0xF, 0x8); /* path-A, RFE_CTRL_8 */ + /* @3 ------------------------- */ /* Pin Settings */ - odm_set_bb_reg(dm, 0xC50, BIT(8), 0); /* path-A */ /* disable CS/CG switch */ + odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); + /* path-A */ /* disable CS/CG switch */ #if 0 - /* Let it follows PHY_REG for bit9 setting */ - if (dm->priv->pshare->rf_ft_var.use_ext_pa || dm->priv->pshare->rf_ft_var.use_ext_lna) - odm_set_bb_reg(dm, 0xC50, BIT(9), 1); /* path-A output at CS */ + /* @Let it follows PHY_REG for bit9 setting */ + if (dm->priv->pshare->rf_ft_var.use_ext_pa || + dm->priv->pshare->rf_ft_var.use_ext_lna) + odm_set_bb_reg(dm, R_0xc50, BIT(9), 1);/* path-A output at CS */ else - odm_set_bb_reg(dm, 0xC50, BIT(9), 0); /* path-A output at CG ->normal power */ + odm_set_bb_reg(dm, R_0xc50, BIT(9), 0); + /* path-A output at CG ->normal power */ #endif - odm_set_bb_reg(dm, 0x870, BIT(9) | BIT(8), 0); /* path-A*/ /* antsel antselb by HW */ - odm_set_bb_reg(dm, 0xB38, BIT(10), 0); /* path-A */ /* antsel2 by HW */ + odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0); + /* path-A*/ /* antsel antselb by HW */ + odm_set_bb_reg(dm, R_0xb38, BIT(10), 0);/* path-A*/ /* antsel2 by HW */ - /* Mapping table */ - odm_set_bb_reg(dm, 0x914, 0xFFFF, 0x0100); /* antenna mapping table */ + /* @Mapping table */ + odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100); + /* @antenna mapping table */ /* OFDM Settings */ - odm_set_bb_reg(dm, 0xca4, 0x7FF, 0xA0); /* thershold */ - odm_set_bb_reg(dm, 0xca4, 0x7FF000, 0x0); /* bias */ + odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */ + odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */ - /* CCK Settings */ - odm_set_bb_reg(dm, 0xa04, 0xF000000, 0); /* Select which path to receive for CCK_1 & CCK_2 */ - odm_set_bb_reg(dm, 0xb34, BIT(30), 0); /* (92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */ - odm_set_bb_reg(dm, 0xa74, BIT(7), 1); /* Fix CCK PHY status report issue */ - odm_set_bb_reg(dm, 0xa0c, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */ + /* @CCK Settings */ + odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0); + /* Select which path to receive for CCK_1 & CCK_2 */ + odm_set_bb_reg(dm, R_0xb34, BIT(30), 0); + /* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + /* @Fix CCK PHY status report issue */ + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); + /* @CCK complete HW AntDiv within 64 samples */ #ifdef ODM_EVM_ENHANCE_ANTDIV phydm_evm_sw_antdiv_init(dm); @@ -1114,249 +1241,621 @@ odm_trx_hw_ant_div_init_92e( } #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -void -odm_smart_hw_ant_div_init_92e( - void *dm_void -) +void odm_smart_hw_ant_div_init_92e( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - PHYDM_DBG(dm, DBG_ANT_DIV, "***8192E AntDiv_Init => ant_div_type=[CG_TRX_SMART_ANTDIV]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "***8192E AntDiv_Init => ant_div_type=[CG_TRX_SMART_ANTDIV]\n"); } #endif -#endif /* #if (RTL8192E_SUPPORT == 1) */ +#endif /* @#if (RTL8192E_SUPPORT == 1) */ + +#if (RTL8192F_SUPPORT == 1) +void odm_rx_hw_ant_div_init_92f(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); + + /* Pin Settings */ + odm_set_bb_reg(dm, R_0x870, BIT(8), 0); + /* reg870[8]=1'b0, "antsel" is controlled by HWs */ + odm_set_bb_reg(dm, R_0xc50, BIT(8), 1); + /* regc50[8]=1'b1, " CS/CG switching" is controlled by HWs */ + + /* @Mapping table */ + odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100); + /* @antenna mapping table */ + + /* OFDM Settings */ + odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */ + odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */ + + /* @CCK Settings */ + odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0); + /* Select which path to receive for CCK_1 & CCK_2 */ + odm_set_bb_reg(dm, R_0xb34, BIT(30), 0); + /* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + /* @Fix CCK PHY status report issue */ + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); + /* @CCK complete HW AntDiv within 64 samples */ + +#ifdef ODM_EVM_ENHANCE_ANTDIV + phydm_evm_sw_antdiv_init(dm); +#endif +} + +void odm_trx_hw_ant_div_init_92f(void *dm_void) + +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); + /* @3 --RFE pin setting--------- */ + /* @[MAC] */ + odm_set_mac_reg(dm, R_0x1048, BIT(0), 1); + /* @DBG PAD Driving control (gpioA_0) */ + odm_set_mac_reg(dm, R_0x1048, BIT(1), 1); + /* @DBG PAD Driving control (gpioA_1) */ + odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); + odm_set_mac_reg(dm, R_0x1038, BIT(25) | BIT(24) | BIT(23), 0); + /* @gpioA_0,gpioA_1*/ + odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); + /* @[BB] */ + odm_set_bb_reg(dm, R_0x944, BIT(8), 1); /* output enable */ + odm_set_bb_reg(dm, R_0x944, BIT(9), 1); + odm_set_bb_reg(dm, R_0x940, BIT(16) | BIT(17), 0x0); + /* r_rfe_path_sel_ (RFE_CTRL_8) */ + odm_set_bb_reg(dm, R_0x940, BIT(18) | BIT(19), 0x0); + /* r_rfe_path_sel_ (RFE_CTRL_9) */ + odm_set_bb_reg(dm, R_0x944, BIT(31), 0); /* RFE_buffer_en */ + odm_set_bb_reg(dm, R_0x92c, BIT(8), 0); /* rfe_inv (RFE_CTRL_8) */ + odm_set_bb_reg(dm, R_0x92c, BIT(9), 1); /* rfe_inv (RFE_CTRL_9) */ + odm_set_bb_reg(dm, R_0x934, 0xF, 0x8); /* path-A, RFE_CTRL_8 */ + odm_set_bb_reg(dm, R_0x934, 0xF0, 0x8); /* path-A, RFE_CTRL_9 */ + /* @3 ------------------------- */ + + /* Pin Settings */ + odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); + /* path-A,disable CS/CG switch */ + odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0); + /* path-A*, antsel antselb by HW */ + odm_set_bb_reg(dm, R_0xb38, BIT(10), 0); /* path-A ,antsel2 by HW */ + + /* @Mapping table */ + odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100); + /* @antenna mapping table */ + + /* OFDM Settings */ + odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */ + odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */ + + /* @CCK Settings */ + odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0); + /* Select which path to receive for CCK_1 & CCK_2 */ + odm_set_bb_reg(dm, R_0xb34, BIT(30), 0); + /* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + /* @Fix CCK PHY status report issue */ + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); + /* @CCK complete HW AntDiv within 64 samples */ + +#ifdef ODM_EVM_ENHANCE_ANTDIV + phydm_evm_sw_antdiv_init(dm); +#endif +} + +#endif /* @#if (RTL8192F_SUPPORT == 1) */ + +#if (RTL8822B_SUPPORT == 1) +void phydm_trx_hw_ant_div_init_22b(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); + + /* Pin Settings */ + odm_set_bb_reg(dm, R_0xcb8, BIT(21) | BIT(20), 0x1); + odm_set_bb_reg(dm, R_0xcb8, BIT(23) | BIT(22), 0x1); + odm_set_bb_reg(dm, R_0xc1c, BIT(7) | BIT(6), 0x0); + /* @------------------------- */ + + /* @Mapping table */ + /* @antenna mapping table */ + odm_set_bb_reg(dm, R_0xca4, 0xFFFF, 0x0100); + + /* OFDM Settings */ + /* thershold */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); + /* @bias */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x0); + odm_set_bb_reg(dm, R_0x668, BIT(3), 0x1); + + /* @CCK Settings */ + /* Select which path to receive for CCK_1 & CCK_2 */ + odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0); + /* @Fix CCK PHY status report issue */ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + /* @CCK complete HW AntDiv within 64 samples */ + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); + /* @BT Coexistence */ + /* @keep antsel_map when GNT_BT = 1 */ + odm_set_bb_reg(dm, R_0xcac, BIT(9), 1); + /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ + odm_set_bb_reg(dm, R_0x804, BIT(4), 1); + /* response TX ant by RX ant */ + odm_set_mac_reg(dm, R_0x668, BIT(3), 1); +#if (defined(CONFIG_2T4R_ANTENNA)) + PHYDM_DBG(dm, DBG_ANT_DIV, + "***8822B AntDiv_Init => 2T4R case\n"); + /* Pin Settings */ + odm_set_bb_reg(dm, R_0xeb8, BIT(21) | BIT(20), 0x1); + odm_set_bb_reg(dm, R_0xeb8, BIT(23) | BIT(22), 0x1); + odm_set_bb_reg(dm, R_0xe1c, BIT(7) | BIT(6), 0x0); + /* @BT Coexistence */ + odm_set_bb_reg(dm, R_0xeac, BIT(9), 1); + /* @keep antsel_map when GNT_BT = 1 */ + /* Mapping table */ + /* antenna mapping table */ + odm_set_bb_reg(dm, R_0xea4, 0xFFFF, 0x0100); + /*odm_set_bb_reg(dm, R_0x900, 0x30000, 0x3);*/ +#endif + +#ifdef ODM_EVM_ENHANCE_ANTDIV + phydm_evm_sw_antdiv_init(dm); +#endif +} +#endif /* @#if (RTL8822B_SUPPORT == 1) */ + +#if (RTL8197F_SUPPORT == 1) +void phydm_rx_hw_ant_div_init_97f(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + +#if 0 + if (*dm->mp_mode == true) { + odm_ant_div_on_off(dm, ANTDIV_OFF); + odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); + /* r_rxdiv_enable_anta regc50[8]=1'b0 0: control by c50[9] */ + odm_set_bb_reg(dm, R_0xc50, BIT(9), 1); /* @1:CG, 0:CS */ + return; + } +#endif + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); + + /* Pin Settings */ + odm_set_bb_reg(dm, R_0x870, BIT(8), 0); + /* reg870[8]=1'b0, */ /* "antsel" is controlled by HWs */ + odm_set_bb_reg(dm, R_0xc50, BIT(8), 1); + /* regc50[8]=1'b1 *//*"CS/CG switching" is controlled by HWs */ + + /* @Mapping table */ + odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100); + /* @antenna mapping table */ + + /* OFDM Settings */ + odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */ + odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */ + + /* @CCK Settings */ + odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0); + /* Select which path to receive for CCK_1 & CCK_2 */ + odm_set_bb_reg(dm, R_0xb34, BIT(30), 0); + /* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + /* @Fix CCK PHY status report issue */ + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); + /* @CCK complete HW AntDiv within 64 samples */ + +#ifdef ODM_EVM_ENHANCE_ANTDIV + phydm_evm_sw_antdiv_init(dm); +#endif +} +#endif //#if (RTL8197F_SUPPORT == 1) #if (RTL8723D_SUPPORT == 1) -void -odm_trx_hw_ant_div_init_8723d( - void *dm_void -) +void odm_trx_hw_ant_div_init_8723d(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - PHYDM_DBG(dm, DBG_ANT_DIV, "[8723D] AntDiv_Init => ant_div_type=[S0S1_HW_TRX_AntDiv]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); - /*BT Coexistence*/ - /*keep antsel_map when GNT_BT = 1*/ - odm_set_bb_reg(dm, 0x864, BIT(12), 1); - /* Disable hw antsw & fast_train.antsw when GNT_BT=1 */ - odm_set_bb_reg(dm, 0x874, BIT(23), 0); - /* Disable hw antsw & fast_train.antsw when BT TX/RX */ - odm_set_bb_reg(dm, 0xE64, 0xFFFF0000, 0x000c); + /*@BT Coexistence*/ + /*@keep antsel_map when GNT_BT = 1*/ + odm_set_bb_reg(dm, R_0x864, BIT(12), 1); + /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ + odm_set_bb_reg(dm, R_0x874, BIT(23), 0); + /* @Disable hw antsw & fast_train.antsw when BT TX/RX */ + odm_set_bb_reg(dm, R_0xe64, 0xFFFF0000, 0x000c); - - odm_set_bb_reg(dm, 0x870, BIT(9) | BIT(8), 0); + odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0); +#if 0 /*PTA setting: WL_BB_SEL_BTG_TRXG_anta, (1: HW CTRL 0: SW CTRL)*/ - /*odm_set_bb_reg(dm, 0x948, BIT6, 0);*/ - /*odm_set_bb_reg(dm, 0x948, BIT8, 0);*/ - /*GNT_WL tx*/ - odm_set_bb_reg(dm, 0x950, BIT(29), 0); + /*odm_set_bb_reg(dm, R_0x948, BIT6, 0);*/ + /*odm_set_bb_reg(dm, R_0x948, BIT8, 0);*/ +#endif + /*@GNT_WL tx*/ + odm_set_bb_reg(dm, R_0x950, BIT(29), 0); - - /*Mapping Table*/ - odm_set_bb_reg(dm, 0x914, MASKBYTE0, 0); - odm_set_bb_reg(dm, 0x914, MASKBYTE1, 3); - /* odm_set_bb_reg(dm, 0x864, BIT5|BIT4|BIT3, 0); */ - /* odm_set_bb_reg(dm, 0x864, BIT8|BIT7|BIT6, 1); */ + /*@Mapping Table*/ + odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0); + odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 3); +#if 0 + /* odm_set_bb_reg(dm, R_0x864, BIT5|BIT4|BIT3, 0); */ + /* odm_set_bb_reg(dm, R_0x864, BIT8|BIT7|BIT6, 1); */ +#endif /* Set WLBB_SEL_RF_ON 1 if RXFIR_PWDB > 0xCcc[3:0] */ - odm_set_bb_reg(dm, 0xCcc, BIT(12), 0); - /* Low-to-High threshold for WLBB_SEL_RF_ON when OFDM enable */ - odm_set_bb_reg(dm, 0xCcc, 0x0F, 0x01); - /* High-to-Low threshold for WLBB_SEL_RF_ON when OFDM enable */ - odm_set_bb_reg(dm, 0xCcc, 0xF0, 0x0); - /* b Low-to-High threshold for WLBB_SEL_RF_ON when OFDM disable ( only CCK ) */ - odm_set_bb_reg(dm, 0xAbc, 0xFF, 0x06); - /* High-to-Low threshold for WLBB_SEL_RF_ON when OFDM disable ( only CCK ) */ - odm_set_bb_reg(dm, 0xAbc, 0xFF00, 0x00); - + odm_set_bb_reg(dm, R_0xccc, BIT(12), 0); + /* @Low-to-High threshold for WLBB_SEL_RF_ON when OFDM enable */ + odm_set_bb_reg(dm, R_0xccc, 0x0F, 0x01); + /* @High-to-Low threshold for WLBB_SEL_RF_ON when OFDM enable */ + odm_set_bb_reg(dm, R_0xccc, 0xF0, 0x0); + /* @b Low-to-High threshold for WLBB_SEL_RF_ON when OFDM disable (CCK)*/ + odm_set_bb_reg(dm, R_0xabc, 0xFF, 0x06); + /* @High-to-Low threshold for WLBB_SEL_RF_ON when OFDM disable (CCK) */ + odm_set_bb_reg(dm, R_0xabc, 0xFF00, 0x00); /*OFDM HW AntDiv Parameters*/ - odm_set_bb_reg(dm, 0xCA4, 0x7FF, 0xa0); - odm_set_bb_reg(dm, 0xCA4, 0x7FF000, 0x00); - odm_set_bb_reg(dm, 0xC5C, BIT(20) | BIT(19) | BIT(18), 0x04); + odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xa0); + odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x00); + odm_set_bb_reg(dm, R_0xc5c, BIT(20) | BIT(19) | BIT(18), 0x04); - /*CCK HW AntDiv Parameters*/ - odm_set_bb_reg(dm, 0xA74, BIT(7), 1); - odm_set_bb_reg(dm, 0xA0C, BIT(4), 1); - odm_set_bb_reg(dm, 0xAA8, BIT(8), 0); + /*@CCK HW AntDiv Parameters*/ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); + odm_set_bb_reg(dm, R_0xaa8, BIT(8), 0); - odm_set_bb_reg(dm, 0xA0C, 0x0F, 0xf); - odm_set_bb_reg(dm, 0xA14, 0x1F, 0x8); - odm_set_bb_reg(dm, 0xA10, BIT(13), 0x1); - odm_set_bb_reg(dm, 0xA74, BIT(8), 0x0); - odm_set_bb_reg(dm, 0xB34, BIT(30), 0x1); - - /*disable antenna training */ - odm_set_bb_reg(dm, 0xE08, BIT(16), 0); - odm_set_bb_reg(dm, 0xc50, BIT(8), 0); + odm_set_bb_reg(dm, R_0xa0c, 0x0F, 0xf); + odm_set_bb_reg(dm, R_0xa14, 0x1F, 0x8); + odm_set_bb_reg(dm, R_0xa10, BIT(13), 0x1); + odm_set_bb_reg(dm, R_0xa74, BIT(8), 0x0); + odm_set_bb_reg(dm, R_0xb34, BIT(30), 0x1); + /*@disable antenna training */ + odm_set_bb_reg(dm, R_0xe08, BIT(16), 0); + odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); } -/*Mingzhi 2017-05-08*/ +/*@Mingzhi 2017-05-08*/ -void -odm_update_rx_idle_ant_8723d( - void *dm_void, - u8 ant, - u32 default_ant, - u32 optional_ant -) +void odm_s0s1_sw_ant_div_init_8723d(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - void *adapter = dm->adapter; - u8 count = 0; - + struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -/* odm_set_bb_reg(dm, 0x948, BIT(6), 0x1); */ - odm_set_bb_reg(dm, 0x948, BIT(7), default_ant); - odm_set_bb_reg(dm, 0x864, BIT(5) | BIT(4) | BIT(3), default_ant); /*Default RX*/ - odm_set_bb_reg(dm, 0x864, BIT(8) | BIT(7) | BIT(6), optional_ant); /*Optional RX*/ - odm_set_bb_reg(dm, 0x860, BIT(14) | BIT(13) | BIT(12), default_ant); /*Default TX*/ + PHYDM_DBG(dm, DBG_ANT_DIV, + "***8723D AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n"); + + /*@keep antsel_map when GNT_BT = 1*/ + odm_set_bb_reg(dm, R_0x864, BIT(12), 1); + + /* @Disable antsw when GNT_BT=1 */ + odm_set_bb_reg(dm, R_0x874, BIT(23), 0); + + /* @Mapping Table */ + odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0); + odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 1); + + /* Output Pin Settings */ +#if 0 + /* odm_set_bb_reg(dm, R_0x948, BIT6, 0x1); */ +#endif + odm_set_bb_reg(dm, R_0x870, BIT(8), 1); + odm_set_bb_reg(dm, R_0x870, BIT(9), 1); + + /* Status init */ + fat_tab->is_become_linked = false; + swat_tab->try_flag = SWAW_STEP_INIT; + swat_tab->double_chk_flag = 0; + swat_tab->cur_antenna = MAIN_ANT; + swat_tab->pre_ant = MAIN_ANT; + dm->antdiv_counter = CONFIG_ANTDIV_PERIOD; + + /* @2 [--For HW Bug setting] */ + odm_set_bb_reg(dm, R_0x80c, BIT(21), 0); /* TX ant by Reg */ +} + +void odm_update_rx_idle_ant_8723d(void *dm_void, u8 ant, u32 default_ant, + u32 optional_ant) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + void *adapter = dm->adapter; + u8 count = 0; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) + /*score board to BT ,a002:WL to do ant-div*/ + odm_set_mac_reg(dm, R_0xa8, MASKHWORD, 0xa002); + ODM_delay_us(50); +#endif +#if 0 + /* odm_set_bb_reg(dm, R_0x948, BIT(6), 0x1); */ +#endif + if (dm->ant_div_type == S0S1_SW_ANTDIV) { + odm_set_bb_reg(dm, R_0x860, BIT(8), default_ant); + odm_set_bb_reg(dm, R_0x860, BIT(9), default_ant); + } + odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), default_ant); + /*@Default RX*/ + odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), optional_ant); + /*Optional RX*/ + odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), default_ant); + /*@Default TX*/ fat_tab->rx_idle_ant = ant; - +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) + /*score board to BT ,a000:WL@S1 a001:WL@S0*/ + if (default_ant == ANT1_2G) + odm_set_mac_reg(dm, R_0xa8, MASKHWORD, 0xa000); + else + odm_set_mac_reg(dm, R_0xa8, MASKHWORD, 0xa001); +#endif } -void -phydm_set_tx_ant_pwr_8723d( - void *dm_void, - u8 ant -) +void phydm_set_tx_ant_pwr_8723d(void *dm_void, u8 ant) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - PADAPTER adapter = (PADAPTER)dm->adapter; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + void *adapter = dm->adapter; fat_tab->rx_idle_ant = ant; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - adapter->HalFunc.SetTxPowerLevelHandler(adapter, *dm->channel); + ((PADAPTER)adapter)->HalFunc.SetTxPowerLevelHandler(adapter, *dm->channel); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) rtw_hal_set_tx_power_level(adapter, *dm->channel); #endif - } #endif -#if (RTL8723B_SUPPORT == 1) -void -odm_trx_hw_ant_div_init_8723b( - void *dm_void -) +#if (RTL8721D_SUPPORT == 1) + +void odm_update_rx_idle_ant_8721d(void *dm_void, u8 ant, u32 default_ant, + u32 optional_ant) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - PHYDM_DBG(dm, DBG_ANT_DIV, "***8723B AntDiv_Init => ant_div_type=[CG_TRX_HW_ANTDIV(DPDT)]\n"); + odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), default_ant); + /*@Default RX*/ + odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), optional_ant); + /*@Optional RX*/ + odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), default_ant); + /*@Default TX*/ + fat_tab->rx_idle_ant = ant; +} - /* Mapping Table */ - odm_set_bb_reg(dm, 0x914, MASKBYTE0, 0); - odm_set_bb_reg(dm, 0x914, MASKBYTE1, 1); +void odm_trx_hw_ant_div_init_8721d(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + PHYDM_DBG(dm, DBG_ANT_DIV, + "[8721D] AntDiv_Init => ant_div_type=[CG_TRX_HW_ANTDIV]\n"); + + /*@BT Coexistence*/ + /*@keep antsel_map when GNT_BT = 1*/ + odm_set_bb_reg(dm, R_0x864, BIT(12), 1); + /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ + odm_set_bb_reg(dm, R_0x874, BIT(23), 0); + /* @Disable hw antsw & fast_train.antsw when BT TX/RX */ + odm_set_bb_reg(dm, R_0xe64, 0xFFFF0000, 0x000c); + + u32 sysreg408 = HAL_READ32(SYSTEM_CTRL_BASE_LP, 0x0408); + + sysreg408 &= ~0x0000001F; + sysreg408 |= 0x12; + HAL_WRITE32(SYSTEM_CTRL_BASE_LP, 0x0408, sysreg408); + + u32 sysreg410 = HAL_READ32(SYSTEM_CTRL_BASE_LP, 0x0410); + + sysreg410 &= ~0x0000001F; + sysreg410 |= 0x12; + HAL_WRITE32(SYSTEM_CTRL_BASE_LP, 0x0410, sysreg410); + + u32 sysreg208 = HAL_READ32(SYSTEM_CTRL_BASE_LP, REG_LP_FUNC_EN0); + + sysreg208 |= BIT(28); + HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_LP_FUNC_EN0, sysreg208); + + u32 sysreg344 = + HAL_READ32(SYSTEM_CTRL_BASE_LP, REG_AUDIO_SHARE_PAD_CTRL); + + sysreg344 |= BIT(9); + HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_AUDIO_SHARE_PAD_CTRL, sysreg344); + + u32 sysreg280 = HAL_READ32(SYSTEM_CTRL_BASE_LP, REG_LP_SYSPLL_CTRL0); + + sysreg280 |= 0x7; + HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_LP_SYSPLL_CTRL0, sysreg280); + + sysreg344 |= BIT(8); + HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_AUDIO_SHARE_PAD_CTRL, sysreg344); + + sysreg344 |= BIT(0); + HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_AUDIO_SHARE_PAD_CTRL, sysreg344); + + odm_set_bb_reg(dm, R_0x930, 0xF00, 8); /* RFE CTRL_2 ANTSEL0 */ + odm_set_bb_reg(dm, R_0x930, 0xF000, 8); /* RFE CTRL_3 ANTSEL0 */ + odm_set_bb_reg(dm, R_0x92c, BIT(3) | BIT(2), 2); + + odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0); + odm_set_bb_reg(dm, R_0x804, 0xF00, 1); /* r_keep_rfpin */ + odm_set_bb_reg(dm, R_0x944, 0x0000000C, 0x3); /* PAD in/output CTRL */ + + /*PTA setting: WL_BB_SEL_BTG_TRXG_anta, (1: HW CTRL 0: SW CTRL)*/ + /*odm_set_bb_reg(dm, R_0x948, BIT6, 0);*/ + /*odm_set_bb_reg(dm, R_0x948, BIT8, 0);*/ + /*@GNT_WL tx*/ + odm_set_bb_reg(dm, R_0x950, BIT(29), 0); + + /*@Mapping Table*/ + odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0); + odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 1); + /* odm_set_bb_reg(dm, R_0x864, BIT5|BIT4|BIT3, 0); */ + /* odm_set_bb_reg(dm, R_0x864, BIT8|BIT7|BIT6, 1); */ + + /* Set WLBB_SEL_RF_ON 1 if RXFIR_PWDB > 0xCcc[3:0] */ + odm_set_bb_reg(dm, R_0xccc, BIT(12), 0); + /* @Low-to-High threshold for WLBB_SEL_RF_ON */ + /*when OFDM enable */ + odm_set_bb_reg(dm, R_0xccc, 0x0F, 0x01); + /* @High-to-Low threshold for WLBB_SEL_RF_ON */ + /* when OFDM enable */ + odm_set_bb_reg(dm, R_0xccc, 0xF0, 0x0); + /* @b Low-to-High threshold for WLBB_SEL_RF_ON*/ + /*when OFDM disable ( only CCK ) */ + odm_set_bb_reg(dm, R_0xabc, 0xFF, 0x06); + /* @High-to-Low threshold for WLBB_SEL_RF_ON*/ + /* when OFDM disable ( only CCK ) */ + odm_set_bb_reg(dm, R_0xabc, 0xFF00, 0x00); + + /*OFDM HW AntDiv Parameters*/ + odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xa0); + odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x00); + odm_set_bb_reg(dm, R_0xc5c, BIT(20) | BIT(19) | BIT(18), 0x04); + + /*@CCK HW AntDiv Parameters*/ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); + odm_set_bb_reg(dm, R_0xaa8, BIT(8), 0); + + odm_set_bb_reg(dm, R_0xa0c, 0x0F, 0xf); + odm_set_bb_reg(dm, R_0xa14, 0x1F, 0x8); + odm_set_bb_reg(dm, R_0xa10, BIT(13), 0x1); + odm_set_bb_reg(dm, R_0xa74, BIT(8), 0x0); + odm_set_bb_reg(dm, R_0xb34, BIT(30), 0x1); + + /*@disable antenna training */ + odm_set_bb_reg(dm, R_0xe08, BIT(16), 0); + odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); +} +#endif +#if (RTL8723B_SUPPORT == 1) +void odm_trx_hw_ant_div_init_8723b(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + PHYDM_DBG(dm, DBG_ANT_DIV, + "***8723B AntDiv_Init => ant_div_type=[CG_TRX_HW_ANTDIV(DPDT)]\n"); + + /* @Mapping Table */ + odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0); + odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 1); /* OFDM HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0xCA4, 0x7FF, 0xa0); /* thershold */ - odm_set_bb_reg(dm, 0xCA4, 0x7FF000, 0x00); /* bias */ + odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xa0); /* thershold */ + odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x00); /* @bias */ - /* CCK HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */ - odm_set_bb_reg(dm, 0xA0C, BIT(4), 1); /* do 64 samples */ + /* @CCK HW AntDiv Parameters */ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + /* patch for clk from 88M to 80M */ + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); + /* @do 64 samples */ - /* BT Coexistence */ - odm_set_bb_reg(dm, 0x864, BIT(12), 0); /* keep antsel_map when GNT_BT = 1 */ - odm_set_bb_reg(dm, 0x874, BIT(23), 0); /* Disable hw antsw & fast_train.antsw when GNT_BT=1 */ + /* @BT Coexistence */ + odm_set_bb_reg(dm, R_0x864, BIT(12), 0); + /* @keep antsel_map when GNT_BT = 1 */ + odm_set_bb_reg(dm, R_0x874, BIT(23), 0); + /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ /* Output Pin Settings */ - odm_set_bb_reg(dm, 0x870, BIT(8), 0); + odm_set_bb_reg(dm, R_0x870, BIT(8), 0); - odm_set_bb_reg(dm, 0x948, BIT(6), 0); /* WL_BB_SEL_BTG_TRXG_anta, (1: HW CTRL 0: SW CTRL) */ - odm_set_bb_reg(dm, 0x948, BIT(7), 0); + odm_set_bb_reg(dm, R_0x948, BIT(6), 0); + /* WL_BB_SEL_BTG_TRXG_anta, (1: HW CTRL 0: SW CTRL) */ + odm_set_bb_reg(dm, R_0x948, BIT(7), 0); - odm_set_mac_reg(dm, 0x40, BIT(3), 1); - odm_set_mac_reg(dm, 0x38, BIT(11), 1); - odm_set_mac_reg(dm, 0x4C, BIT(24) | BIT(23), 2); /* select DPDT_P and DPDT_N as output pin */ + odm_set_mac_reg(dm, R_0x40, BIT(3), 1); + odm_set_mac_reg(dm, R_0x38, BIT(11), 1); + odm_set_mac_reg(dm, R_0x4c, BIT(24) | BIT(23), 2); + /* select DPDT_P and DPDT_N as output pin */ - odm_set_bb_reg(dm, 0x944, BIT(0) | BIT(1), 3); /* in/out */ - odm_set_bb_reg(dm, 0x944, BIT(31), 0); + odm_set_bb_reg(dm, R_0x944, BIT(0) | BIT(1), 3); /* @in/out */ + odm_set_bb_reg(dm, R_0x944, BIT(31), 0); - odm_set_bb_reg(dm, 0x92C, BIT(1), 0); /* DPDT_P non-inverse */ - odm_set_bb_reg(dm, 0x92C, BIT(0), 1); /* DPDT_N inverse */ + odm_set_bb_reg(dm, R_0x92c, BIT(1), 0); /* @DPDT_P non-inverse */ + odm_set_bb_reg(dm, R_0x92c, BIT(0), 1); /* @DPDT_N inverse */ - odm_set_bb_reg(dm, 0x930, 0xF0, 8); /* DPDT_P = ANTSEL[0] */ - odm_set_bb_reg(dm, 0x930, 0xF, 8); /* DPDT_N = ANTSEL[0] */ + odm_set_bb_reg(dm, R_0x930, 0xF0, 8); /* @DPDT_P = ANTSEL[0] */ + odm_set_bb_reg(dm, R_0x930, 0xF, 8); /* @DPDT_N = ANTSEL[0] */ - /* 2 [--For HW Bug setting] */ + /* @2 [--For HW Bug setting] */ if (dm->ant_type == ODM_AUTO_ANT) - odm_set_bb_reg(dm, 0xA00, BIT(15), 0); /* CCK AntDiv function block enable */ - + odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); + /* @CCK AntDiv function block enable */ } - - -void -odm_s0s1_sw_ant_div_init_8723b( - void *dm_void -) +void odm_s0s1_sw_ant_div_init_8723b(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - PHYDM_DBG(dm, DBG_ANT_DIV, "***8723B AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "***8723B AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n"); - /* Mapping Table */ - odm_set_bb_reg(dm, 0x914, MASKBYTE0, 0); - odm_set_bb_reg(dm, 0x914, MASKBYTE1, 1); + /* @Mapping Table */ + odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0); + odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 1); +#if 0 /* Output Pin Settings */ - /* odm_set_bb_reg(dm, 0x948, BIT6, 0x1); */ - odm_set_bb_reg(dm, 0x870, BIT(9) | BIT(8), 0); + /* odm_set_bb_reg(dm, R_0x948, BIT6, 0x1); */ +#endif + odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0); - fat_tab->is_become_linked = false; - dm_swat_table->try_flag = SWAW_STEP_INIT; - dm_swat_table->double_chk_flag = 0; - - /* 2 [--For HW Bug setting] */ - odm_set_bb_reg(dm, 0x80C, BIT(21), 0); /* TX ant by Reg */ + fat_tab->is_become_linked = false; + swat_tab->try_flag = SWAW_STEP_INIT; + swat_tab->double_chk_flag = 0; + /* @2 [--For HW Bug setting] */ + odm_set_bb_reg(dm, R_0x80c, BIT(21), 0); /* TX ant by Reg */ } -void -odm_update_rx_idle_ant_8723b( - void *dm_void, - u8 ant, - u32 default_ant, - u32 optional_ant -) +void odm_update_rx_idle_ant_8723b( + void *dm_void, + u8 ant, + u32 default_ant, + u32 optional_ant) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - PADAPTER adapter = (PADAPTER)dm->adapter; - u8 count = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + void *adapter = dm->adapter; + u8 count = 0; /*u8 u1_temp;*/ /*u8 h2c_parameter;*/ - if ((!dm->is_linked) && (dm->ant_type == ODM_AUTO_ANT)) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to no link\n"); + if (!dm->is_linked && dm->ant_type == ODM_AUTO_ANT) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to no link\n"); return; } #if 0 /* Send H2C command to FW */ - /* Enable wifi calibration */ + /* @Enable wifi calibration */ h2c_parameter = true; odm_fill_h2c_cmd(dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter); - /* Check if H2C command sucess or not (0x1e6) */ + /* @Check if H2C command sucess or not (0x1e6) */ u1_temp = odm_read_1byte(dm, 0x1e6); while ((u1_temp != 0x1) && (count < 100)) { ODM_delay_us(10); u1_temp = odm_read_1byte(dm, 0x1e6); count++; } - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Update Rx-Idle-ant ] 8723B: H2C command status = %d, count = %d\n", u1_temp, count); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Update Rx-Idle-ant ] 8723B: H2C command status = %d, count = %d\n", + u1_temp, count); if (u1_temp == 0x1) { - /* Check if BT is doing IQK (0x1e7) */ + /* @Check if BT is doing IQK (0x1e7) */ count = 0; u1_temp = odm_read_1byte(dm, 0x1e7); while ((!(u1_temp & BIT(0))) && (count < 100)) { @@ -1364,14 +1863,19 @@ odm_update_rx_idle_ant_8723b( u1_temp = odm_read_1byte(dm, 0x1e7); count++; } - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Update Rx-Idle-ant ] 8723B: BT IQK status = %d, count = %d\n", u1_temp, count); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Update Rx-Idle-ant ] 8723B: BT IQK status = %d, count = %d\n", + u1_temp, count); if (u1_temp & BIT(0)) { - odm_set_bb_reg(dm, 0x948, BIT(6), 0x1); - odm_set_bb_reg(dm, 0x948, BIT(9), default_ant); - odm_set_bb_reg(dm, 0x864, BIT(5) | BIT4 | BIT3, default_ant); /* Default RX */ - odm_set_bb_reg(dm, 0x864, BIT(8) | BIT7 | BIT6, optional_ant); /* Optional RX */ - odm_set_bb_reg(dm, 0x860, BIT(14) | BIT13 | BIT12, default_ant); /* Default TX */ + odm_set_bb_reg(dm, R_0x948, BIT(6), 0x1); + odm_set_bb_reg(dm, R_0x948, BIT(9), default_ant); + odm_set_bb_reg(dm, R_0x864, 0x38, default_ant); + /* @Default RX */ + odm_set_bb_reg(dm, R_0x864, 0x1c0, optional_ant); + /* @Optional RX */ + odm_set_bb_reg(dm, R_0x860, 0x7000, default_ant); + /* @Default TX */ fat_tab->rx_idle_ant = ant; /* Set TX AGC by S0/S1 */ @@ -1384,520 +1888,626 @@ odm_update_rx_idle_ant_8723b( /* Set IQC by S0/S1 */ odm_set_iqc_by_rfpath(dm, default_ant); - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Update Rx-Idle-ant ] 8723B: Success to set RX antenna\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Update Rx-Idle-ant ] 8723B: Success to set RX antenna\n"); } else - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to BT IQK\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to BT IQK\n"); } else - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to H2C command fail\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to H2C command fail\n"); /* Send H2C command to FW */ - /* Disable wifi calibration */ + /* @Disable wifi calibration */ h2c_parameter = false; odm_fill_h2c_cmd(dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter); #else - odm_set_bb_reg(dm, 0x948, BIT(6), 0x1); - odm_set_bb_reg(dm, 0x948, BIT(9), default_ant); - odm_set_bb_reg(dm, 0x864, BIT(5) | BIT(4) | BIT(3), default_ant); /*Default RX*/ - odm_set_bb_reg(dm, 0x864, BIT(8) | BIT(7) | BIT(6), optional_ant); /*Optional RX*/ - odm_set_bb_reg(dm, 0x860, BIT(14) | BIT(13) | BIT(12), default_ant); /*Default TX*/ + odm_set_bb_reg(dm, R_0x948, BIT(6), 0x1); + odm_set_bb_reg(dm, R_0x948, BIT(9), default_ant); + odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), default_ant); + /*@Default RX*/ + odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), optional_ant); + /*Optional RX*/ + odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), default_ant); + /*@Default TX*/ fat_tab->rx_idle_ant = ant; - /* Set TX AGC by S0/S1 */ - /* Need to consider Linux driver */ +/* Set TX AGC by S0/S1 */ +/* Need to consider Linux driver */ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - adapter->HalFunc.SetTxPowerLevelHandler(adapter, *dm->channel); + ((PADAPTER)adapter)->HalFunc.SetTxPowerLevelHandler(adapter, *dm->channel); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) rtw_hal_set_tx_power_level(adapter, *dm->channel); #endif /* Set IQC by S0/S1 */ odm_set_iqc_by_rfpath(dm, default_ant); - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Update Rx-Idle-ant ] 8723B: Success to set RX antenna\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Update Rx-Idle-ant ] 8723B: Success to set RX antenna\n"); #endif } boolean -phydm_is_bt_enable_8723b( - void *dm_void -) +phydm_is_bt_enable_8723b(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 bt_state; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 bt_state; +#if 0 /*u32 reg75;*/ - /*reg75 = odm_get_bb_reg(dm, 0x74, BIT8);*/ - /*odm_set_bb_reg(dm, 0x74, BIT8, 0x0);*/ - odm_set_bb_reg(dm, 0xa0, BIT(24) | BIT(25) | BIT(26), 0x5); - bt_state = odm_get_bb_reg(dm, 0xa0, (BIT(3) | BIT(2) | BIT(1) | BIT(0))); - /*odm_set_bb_reg(dm, 0x74, BIT8, reg75);*/ + /*reg75 = odm_get_bb_reg(dm, R_0x74, BIT8);*/ + /*odm_set_bb_reg(dm, R_0x74, BIT8, 0x0);*/ +#endif + odm_set_bb_reg(dm, R_0xa0, BIT(24) | BIT(25) | BIT(26), 0x5); + bt_state = odm_get_bb_reg(dm, R_0xa0, 0xf); +#if 0 + /*odm_set_bb_reg(dm, R_0x74, BIT8, reg75);*/ +#endif - if ((bt_state == 4) || (bt_state == 7) || (bt_state == 9) || (bt_state == 13)) + if (bt_state == 4 || bt_state == 7 || bt_state == 9 || bt_state == 13) return true; else return false; } -#endif /* #if (RTL8723B_SUPPORT == 1) */ +#endif /* @#if (RTL8723B_SUPPORT == 1) */ #if (RTL8821A_SUPPORT == 1) -void -odm_trx_hw_ant_div_init_8821a( - void *dm_void -) +void odm_trx_hw_ant_div_init_8821a(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - PHYDM_DBG(dm, DBG_ANT_DIV, "***8821A AntDiv_Init => ant_div_type=[ CG_TRX_HW_ANTDIV (DPDT)]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); /* Output Pin Settings */ - odm_set_mac_reg(dm, 0x4C, BIT(25), 0); + odm_set_mac_reg(dm, R_0x4c, BIT(25), 0); - odm_set_mac_reg(dm, 0x64, BIT(29), 1); /* PAPE by WLAN control */ - odm_set_mac_reg(dm, 0x64, BIT(28), 1); /* LNAON by WLAN control */ + odm_set_mac_reg(dm, R_0x64, BIT(29), 1); /* PAPE by WLAN control */ + odm_set_mac_reg(dm, R_0x64, BIT(28), 1); /* @LNAON by WLAN control */ - odm_set_bb_reg(dm, 0xCB8, BIT(16), 0); + odm_set_bb_reg(dm, R_0xcb8, BIT(16), 0); - odm_set_mac_reg(dm, 0x4C, BIT(23), 0); /* select DPDT_P and DPDT_N as output pin */ - odm_set_mac_reg(dm, 0x4C, BIT(24), 1); /* by WLAN control */ - odm_set_bb_reg(dm, 0xCB4, 0xF, 8); /* DPDT_P = ANTSEL[0] */ - odm_set_bb_reg(dm, 0xCB4, 0xF0, 8); /* DPDT_N = ANTSEL[0] */ - odm_set_bb_reg(dm, 0xCB4, BIT(29), 0); /* DPDT_P non-inverse */ - odm_set_bb_reg(dm, 0xCB4, BIT(28), 1); /* DPDT_N inverse */ + odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); + /* select DPDT_P and DPDT_N as output pin */ + odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); /* @by WLAN control */ + odm_set_bb_reg(dm, R_0xcb4, 0xF, 8); /* @DPDT_P = ANTSEL[0] */ + odm_set_bb_reg(dm, R_0xcb4, 0xF0, 8); /* @DPDT_N = ANTSEL[0] */ + odm_set_bb_reg(dm, R_0xcb4, BIT(29), 0); /* @DPDT_P non-inverse */ + odm_set_bb_reg(dm, R_0xcb4, BIT(28), 1); /* @DPDT_N inverse */ - /* Mapping Table */ - odm_set_bb_reg(dm, 0xCA4, MASKBYTE0, 0); - odm_set_bb_reg(dm, 0xCA4, MASKBYTE1, 1); + /* @Mapping Table */ + odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0); + odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1); /* OFDM HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0x8D4, 0x7FF, 0xA0); /* thershold */ - odm_set_bb_reg(dm, 0x8D4, 0x7FF000, 0x10); /* bias */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x10); /* @bias */ - /* CCK HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */ - odm_set_bb_reg(dm, 0xA0C, BIT(4), 1); /* do 64 samples */ + /* @CCK HW AntDiv Parameters */ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + /* patch for clk from 88M to 80M */ + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */ - odm_set_bb_reg(dm, 0x800, BIT(25), 0); /* ANTSEL_CCK sent to the smart_antenna circuit */ - odm_set_bb_reg(dm, 0xA00, BIT(15), 0); /* CCK AntDiv function block enable */ + odm_set_bb_reg(dm, R_0x800, BIT(25), 0); + /* @ANTSEL_CCK sent to the smart_antenna circuit */ + odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); + /* @CCK AntDiv function block enable */ - /* BT Coexistence */ - odm_set_bb_reg(dm, 0xCAC, BIT(9), 1); /* keep antsel_map when GNT_BT = 1 */ - odm_set_bb_reg(dm, 0x804, BIT(4), 1); /* Disable hw antsw & fast_train.antsw when GNT_BT=1 */ + /* @BT Coexistence */ + odm_set_bb_reg(dm, R_0xcac, BIT(9), 1); + /* @keep antsel_map when GNT_BT = 1 */ + odm_set_bb_reg(dm, R_0x804, BIT(4), 1); + /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ - odm_set_bb_reg(dm, 0x8CC, BIT(20) | BIT(19) | BIT(18), 3); /* settling time of antdiv by RF LNA = 100ns */ + odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3); + /* settling time of antdiv by RF LNA = 100ns */ /* response TX ant by RX ant */ - odm_set_mac_reg(dm, 0x668, BIT(3), 1); - + odm_set_mac_reg(dm, R_0x668, BIT(3), 1); } -void -odm_s0s1_sw_ant_div_init_8821a( - void *dm_void -) +void odm_s0s1_sw_ant_div_init_8821a(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; - PHYDM_DBG(dm, DBG_ANT_DIV, "***8821A AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); /* Output Pin Settings */ - odm_set_mac_reg(dm, 0x4C, BIT(25), 0); + odm_set_mac_reg(dm, R_0x4c, BIT(25), 0); - odm_set_mac_reg(dm, 0x64, BIT(29), 1); /* PAPE by WLAN control */ - odm_set_mac_reg(dm, 0x64, BIT(28), 1); /* LNAON by WLAN control */ + odm_set_mac_reg(dm, R_0x64, BIT(29), 1); /* PAPE by WLAN control */ + odm_set_mac_reg(dm, R_0x64, BIT(28), 1); /* @LNAON by WLAN control */ - odm_set_bb_reg(dm, 0xCB8, BIT(16), 0); + odm_set_bb_reg(dm, R_0xcb8, BIT(16), 0); - odm_set_mac_reg(dm, 0x4C, BIT(23), 0); /* select DPDT_P and DPDT_N as output pin */ - odm_set_mac_reg(dm, 0x4C, BIT(24), 1); /* by WLAN control */ - odm_set_bb_reg(dm, 0xCB4, 0xF, 8); /* DPDT_P = ANTSEL[0] */ - odm_set_bb_reg(dm, 0xCB4, 0xF0, 8); /* DPDT_N = ANTSEL[0] */ - odm_set_bb_reg(dm, 0xCB4, BIT(29), 0); /* DPDT_P non-inverse */ - odm_set_bb_reg(dm, 0xCB4, BIT(28), 1); /* DPDT_N inverse */ + odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); + /* select DPDT_P and DPDT_N as output pin */ + odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); /* @by WLAN control */ + odm_set_bb_reg(dm, R_0xcb4, 0xF, 8); /* @DPDT_P = ANTSEL[0] */ + odm_set_bb_reg(dm, R_0xcb4, 0xF0, 8); /* @DPDT_N = ANTSEL[0] */ + odm_set_bb_reg(dm, R_0xcb4, BIT(29), 0); /* @DPDT_P non-inverse */ + odm_set_bb_reg(dm, R_0xcb4, BIT(28), 1); /* @DPDT_N inverse */ - /* Mapping Table */ - odm_set_bb_reg(dm, 0xCA4, MASKBYTE0, 0); - odm_set_bb_reg(dm, 0xCA4, MASKBYTE1, 1); + /* @Mapping Table */ + odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0); + odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1); /* OFDM HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0x8D4, 0x7FF, 0xA0); /* thershold */ - odm_set_bb_reg(dm, 0x8D4, 0x7FF000, 0x10); /* bias */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x10); /* @bias */ - /* CCK HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */ - odm_set_bb_reg(dm, 0xA0C, BIT(4), 1); /* do 64 samples */ + /* @CCK HW AntDiv Parameters */ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + /* patch for clk from 88M to 80M */ + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */ - odm_set_bb_reg(dm, 0x800, BIT(25), 0); /* ANTSEL_CCK sent to the smart_antenna circuit */ - odm_set_bb_reg(dm, 0xA00, BIT(15), 0); /* CCK AntDiv function block enable */ + odm_set_bb_reg(dm, R_0x800, BIT(25), 0); + /* @ANTSEL_CCK sent to the smart_antenna circuit */ + odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); + /* @CCK AntDiv function block enable */ - /* BT Coexistence */ - odm_set_bb_reg(dm, 0xCAC, BIT(9), 1); /* keep antsel_map when GNT_BT = 1 */ - odm_set_bb_reg(dm, 0x804, BIT(4), 1); /* Disable hw antsw & fast_train.antsw when GNT_BT=1 */ + /* @BT Coexistence */ + odm_set_bb_reg(dm, R_0xcac, BIT(9), 1); + /* @keep antsel_map when GNT_BT = 1 */ + odm_set_bb_reg(dm, R_0x804, BIT(4), 1); + /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ - odm_set_bb_reg(dm, 0x8CC, BIT(20) | BIT(19) | BIT(18), 3); /* settling time of antdiv by RF LNA = 100ns */ + odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3); + /* settling time of antdiv by RF LNA = 100ns */ /* response TX ant by RX ant */ - odm_set_mac_reg(dm, 0x668, BIT(3), 1); + odm_set_mac_reg(dm, R_0x668, BIT(3), 1); + odm_set_bb_reg(dm, R_0x900, BIT(18), 0); - odm_set_bb_reg(dm, 0x900, BIT(18), 0); - - dm_swat_table->try_flag = SWAW_STEP_INIT; - dm_swat_table->double_chk_flag = 0; - dm_swat_table->cur_antenna = MAIN_ANT; - dm_swat_table->pre_antenna = MAIN_ANT; - dm_swat_table->swas_no_link_state = 0; - + swat_tab->try_flag = SWAW_STEP_INIT; + swat_tab->double_chk_flag = 0; + swat_tab->cur_antenna = MAIN_ANT; + swat_tab->pre_ant = MAIN_ANT; + swat_tab->swas_no_link_state = 0; } -#endif /* #if (RTL8821A_SUPPORT == 1) */ +#endif /* @#if (RTL8821A_SUPPORT == 1) */ #if (RTL8821C_SUPPORT == 1) -void -odm_trx_hw_ant_div_init_8821c( - void *dm_void -) +void odm_trx_hw_ant_div_init_8821c(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - PHYDM_DBG(dm, DBG_ANT_DIV, "***8821C AntDiv_Init => ant_div_type=[ CG_TRX_HW_ANTDIV (DPDT)]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); /* Output Pin Settings */ - odm_set_mac_reg(dm, 0x4C, BIT(25), 0); + odm_set_mac_reg(dm, R_0x4c, BIT(25), 0); - odm_set_mac_reg(dm, 0x64, BIT(29), 1); /* PAPE by WLAN control */ - odm_set_mac_reg(dm, 0x64, BIT(28), 1); /* LNAON by WLAN control */ + odm_set_mac_reg(dm, R_0x64, BIT(29), 1); /* PAPE by WLAN control */ + odm_set_mac_reg(dm, R_0x64, BIT(28), 1); /* @LNAON by WLAN control */ - odm_set_bb_reg(dm, 0xCB8, BIT(16), 0); + odm_set_bb_reg(dm, R_0xcb8, BIT(16), 0); - odm_set_mac_reg(dm, 0x4C, BIT(23), 0); /* select DPDT_P and DPDT_N as output pin */ - odm_set_mac_reg(dm, 0x4C, BIT(24), 1); /* by WLAN control */ - odm_set_bb_reg(dm, 0xCB4, 0xF, 8); /* DPDT_P = ANTSEL[0] */ - odm_set_bb_reg(dm, 0xCB4, 0xF0, 8); /* DPDT_N = ANTSEL[0] */ - odm_set_bb_reg(dm, 0xCB4, BIT(29), 0); /* DPDT_P non-inverse */ - odm_set_bb_reg(dm, 0xCB4, BIT(28), 1); /* DPDT_N inverse */ + odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); + /* select DPDT_P and DPDT_N as output pin */ + odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); /* @by WLAN control */ + odm_set_bb_reg(dm, R_0xcb4, 0xF, 8); /* @DPDT_P = ANTSEL[0] */ + odm_set_bb_reg(dm, R_0xcb4, 0xF0, 8); /* @DPDT_N = ANTSEL[0] */ + odm_set_bb_reg(dm, R_0xcb4, BIT(29), 0); /* @DPDT_P non-inverse */ + odm_set_bb_reg(dm, R_0xcb4, BIT(28), 1); /* @DPDT_N inverse */ - /* Mapping Table */ - odm_set_bb_reg(dm, 0xCA4, MASKBYTE0, 0); - odm_set_bb_reg(dm, 0xCA4, MASKBYTE1, 1); + /* @Mapping Table */ + odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0); + odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1); /* OFDM HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0x8D4, 0x7FF, 0xA0); /* thershold */ - odm_set_bb_reg(dm, 0x8D4, 0x7FF000, 0x10); /* bias */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x10); /* @bias */ - /* CCK HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */ - odm_set_bb_reg(dm, 0xA0C, BIT(4), 1); /* do 64 samples */ + /* @CCK HW AntDiv Parameters */ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + /* patch for clk from 88M to 80M */ + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */ - odm_set_bb_reg(dm, 0x800, BIT(25), 0); /* ANTSEL_CCK sent to the smart_antenna circuit */ - odm_set_bb_reg(dm, 0xA00, BIT(15), 0); /* CCK AntDiv function block enable */ + odm_set_bb_reg(dm, R_0x800, BIT(25), 0); + /* @ANTSEL_CCK sent to the smart_antenna circuit */ + odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); + /* @CCK AntDiv function block enable */ - /* BT Coexistence */ - odm_set_bb_reg(dm, 0xCAC, BIT(9), 1); /* keep antsel_map when GNT_BT = 1 */ - odm_set_bb_reg(dm, 0x804, BIT(4), 1); /* Disable hw antsw & fast_train.antsw when GNT_BT=1 */ + /* @BT Coexistence */ + odm_set_bb_reg(dm, R_0xcac, BIT(9), 1); + /* @keep antsel_map when GNT_BT = 1 */ + odm_set_bb_reg(dm, R_0x804, BIT(4), 1); + /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ /* Timming issue */ - odm_set_bb_reg(dm, 0x818, BIT(23) | BIT(22) | BIT(21) | BIT(20), 0); /*keep antidx after tx for ACK ( unit x 3.2 mu sec)*/ - odm_set_bb_reg(dm, 0x8CC, BIT(20) | BIT(19) | BIT(18), 3); /* settling time of antdiv by RF LNA = 100ns */ + odm_set_bb_reg(dm, R_0x818, BIT(23) | BIT(22) | BIT(21) | BIT(20), 0); + /*@keep antidx after tx for ACK ( unit x 3.2 mu sec)*/ + odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3); + /* settling time of antdiv by RF LNA = 100ns */ /* response TX ant by RX ant */ - odm_set_mac_reg(dm, 0x668, BIT(3), 1); - + odm_set_mac_reg(dm, R_0x668, BIT(3), 1); } -void -phydm_s0s1_sw_ant_div_init_8821c( - void *dm_void -) +void phydm_s0s1_sw_ant_div_init_8821c(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; - PHYDM_DBG(dm, DBG_ANT_DIV, "***8821C AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); /* Output Pin Settings */ - odm_set_mac_reg(dm, 0x4C, BIT(25), 0); + odm_set_mac_reg(dm, R_0x4c, BIT(25), 0); - odm_set_mac_reg(dm, 0x64, BIT(29), 1); /* PAPE by WLAN control */ - odm_set_mac_reg(dm, 0x64, BIT(28), 1); /* LNAON by WLAN control */ + odm_set_mac_reg(dm, R_0x64, BIT(29), 1); /* PAPE by WLAN control */ + odm_set_mac_reg(dm, R_0x64, BIT(28), 1); /* @LNAON by WLAN control */ - odm_set_bb_reg(dm, 0xCB8, BIT(16), 0); + odm_set_bb_reg(dm, R_0xcb8, BIT(16), 0); - odm_set_mac_reg(dm, 0x4C, BIT(23), 0); /* select DPDT_P and DPDT_N as output pin */ - odm_set_mac_reg(dm, 0x4C, BIT(24), 1); /* by WLAN control */ - odm_set_bb_reg(dm, 0xCB4, 0xF, 8); /* DPDT_P = ANTSEL[0] */ - odm_set_bb_reg(dm, 0xCB4, 0xF0, 8); /* DPDT_N = ANTSEL[0] */ - odm_set_bb_reg(dm, 0xCB4, BIT(29), 0); /* DPDT_P non-inverse */ - odm_set_bb_reg(dm, 0xCB4, BIT(28), 1); /* DPDT_N inverse */ + odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); + /* select DPDT_P and DPDT_N as output pin */ + odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); /* @by WLAN control */ + odm_set_bb_reg(dm, R_0xcb4, 0xF, 8); /* @DPDT_P = ANTSEL[0] */ + odm_set_bb_reg(dm, R_0xcb4, 0xF0, 8); /* @DPDT_N = ANTSEL[0] */ + odm_set_bb_reg(dm, R_0xcb4, BIT(29), 0); /* @DPDT_P non-inverse */ + odm_set_bb_reg(dm, R_0xcb4, BIT(28), 1); /* @DPDT_N inverse */ - /* Mapping Table */ - odm_set_bb_reg(dm, 0xCA4, MASKBYTE0, 0); - odm_set_bb_reg(dm, 0xCA4, MASKBYTE1, 1); + /* @Mapping Table */ + odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0); + odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1); /* OFDM HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0x8D4, 0x7FF, 0xA0); /* thershold */ - odm_set_bb_reg(dm, 0x8D4, 0x7FF000, 0x00); /* bias */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x00); /* @bias */ - /* CCK HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */ - odm_set_bb_reg(dm, 0xA0C, BIT(4), 1); /* do 64 samples */ + /* @CCK HW AntDiv Parameters */ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + /* patch for clk from 88M to 80M */ + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */ - odm_set_bb_reg(dm, 0x800, BIT(25), 0); /* ANTSEL_CCK sent to the smart_antenna circuit */ - odm_set_bb_reg(dm, 0xA00, BIT(15), 0); /* CCK AntDiv function block enable */ + odm_set_bb_reg(dm, R_0x800, BIT(25), 0); + /* @ANTSEL_CCK sent to the smart_antenna circuit */ + odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); + /* @CCK AntDiv function block enable */ - /* BT Coexistence */ - odm_set_bb_reg(dm, 0xCAC, BIT(9), 1); /* keep antsel_map when GNT_BT = 1 */ - odm_set_bb_reg(dm, 0x804, BIT(4), 1); /* Disable hw antsw & fast_train.antsw when GNT_BT=1 */ + /* @BT Coexistence */ + odm_set_bb_reg(dm, R_0xcac, BIT(9), 1); + /* @keep antsel_map when GNT_BT = 1 */ + odm_set_bb_reg(dm, R_0x804, BIT(4), 1); + /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ - odm_set_bb_reg(dm, 0x8CC, BIT(20) | BIT(19) | BIT(18), 3); /* settling time of antdiv by RF LNA = 100ns */ + odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3); + /* settling time of antdiv by RF LNA = 100ns */ /* response TX ant by RX ant */ - odm_set_mac_reg(dm, 0x668, BIT(3), 1); + odm_set_mac_reg(dm, R_0x668, BIT(3), 1); + odm_set_bb_reg(dm, R_0x900, BIT(18), 0); - odm_set_bb_reg(dm, 0x900, BIT(18), 0); - - dm_swat_table->try_flag = SWAW_STEP_INIT; - dm_swat_table->double_chk_flag = 0; - dm_swat_table->cur_antenna = MAIN_ANT; - dm_swat_table->pre_antenna = MAIN_ANT; - dm_swat_table->swas_no_link_state = 0; - + swat_tab->try_flag = SWAW_STEP_INIT; + swat_tab->double_chk_flag = 0; + swat_tab->cur_antenna = MAIN_ANT; + swat_tab->pre_ant = MAIN_ANT; + swat_tab->swas_no_link_state = 0; } -#endif /* #if (RTL8821C_SUPPORT == 1) */ - +#endif /* @#if (RTL8821C_SUPPORT == 1) */ #if (RTL8881A_SUPPORT == 1) -void -odm_trx_hw_ant_div_init_8881a( - void *dm_void -) +void odm_trx_hw_ant_div_init_8881a(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - PHYDM_DBG(dm, DBG_ANT_DIV, "***8881A AntDiv_Init => ant_div_type=[ CG_TRX_HW_ANTDIV (SPDT)]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); /* Output Pin Settings */ - /* [SPDT related] */ - odm_set_mac_reg(dm, 0x4C, BIT(25), 0); - odm_set_mac_reg(dm, 0x4C, BIT(26), 0); - odm_set_bb_reg(dm, 0xCB4, BIT(31), 0); /* delay buffer */ - odm_set_bb_reg(dm, 0xCB4, BIT(22), 0); - odm_set_bb_reg(dm, 0xCB4, BIT(24), 1); - odm_set_bb_reg(dm, 0xCB0, 0xF00, 8); /* DPDT_P = ANTSEL[0] */ - odm_set_bb_reg(dm, 0xCB0, 0xF0000, 8); /* DPDT_N = ANTSEL[0] */ + /* @[SPDT related] */ + odm_set_mac_reg(dm, R_0x4c, BIT(25), 0); + odm_set_mac_reg(dm, R_0x4c, BIT(26), 0); + odm_set_bb_reg(dm, R_0xcb4, BIT(31), 0); /* @delay buffer */ + odm_set_bb_reg(dm, R_0xcb4, BIT(22), 0); + odm_set_bb_reg(dm, R_0xcb4, BIT(24), 1); + odm_set_bb_reg(dm, R_0xcb0, 0xF00, 8); /* @DPDT_P = ANTSEL[0] */ + odm_set_bb_reg(dm, R_0xcb0, 0xF0000, 8); /* @DPDT_N = ANTSEL[0] */ - /* Mapping Table */ - odm_set_bb_reg(dm, 0xCA4, MASKBYTE0, 0); - odm_set_bb_reg(dm, 0xCA4, MASKBYTE1, 1); + /* @Mapping Table */ + odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0); + odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1); /* OFDM HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0x8D4, 0x7FF, 0xA0); /* thershold */ - odm_set_bb_reg(dm, 0x8D4, 0x7FF000, 0x0); /* bias */ - odm_set_bb_reg(dm, 0x8CC, BIT(20) | BIT(19) | BIT(18), 3); /* settling time of antdiv by RF LNA = 100ns */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x0); /* @bias */ + odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3); + /* settling time of antdiv by RF LNA = 100ns */ - /* CCK HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */ - odm_set_bb_reg(dm, 0xA0C, BIT(4), 1); /* do 64 samples */ + /* @CCK HW AntDiv Parameters */ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + /* patch for clk from 88M to 80M */ + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */ - /* 2 [--For HW Bug setting] */ + /* @2 [--For HW Bug setting] */ - odm_set_bb_reg(dm, 0x900, BIT(18), 0); /* TX ant by Reg */ /* A-cut bug */ + odm_set_bb_reg(dm, R_0x900, BIT(18), 0); + /* TX ant by Reg *//* A-cut bug */ } -#endif /* #if (RTL8881A_SUPPORT == 1) */ - +#endif /* @#if (RTL8881A_SUPPORT == 1) */ #if (RTL8812A_SUPPORT == 1) -void -odm_trx_hw_ant_div_init_8812a( - void *dm_void -) +void odm_trx_hw_ant_div_init_8812a(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - PHYDM_DBG(dm, DBG_ANT_DIV, "***8812A AntDiv_Init => ant_div_type=[ CG_TRX_HW_ANTDIV (SPDT)]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); - /* 3 */ /* 3 --RFE pin setting--------- */ - /* [BB] */ - odm_set_bb_reg(dm, 0x900, BIT(10) | BIT(9) | BIT(8), 0x0); /* disable SW switch */ - odm_set_bb_reg(dm, 0x900, BIT(17) | BIT(16), 0x0); - odm_set_bb_reg(dm, 0x974, BIT(7) | BIT(6), 0x3); /* in/out */ - odm_set_bb_reg(dm, 0xCB4, BIT(31), 0); /* delay buffer */ - odm_set_bb_reg(dm, 0xCB4, BIT(26), 0); - odm_set_bb_reg(dm, 0xCB4, BIT(27), 1); - odm_set_bb_reg(dm, 0xCB0, 0xF000000, 8); /* DPDT_P = ANTSEL[0] */ - odm_set_bb_reg(dm, 0xCB0, 0xF0000000, 8); /* DPDT_N = ANTSEL[0] */ - /* 3 ------------------------- */ + /* @3 */ /* @3 --RFE pin setting--------- */ + /* @[BB] */ + odm_set_bb_reg(dm, R_0x900, BIT(10) | BIT(9) | BIT(8), 0x0); + /* @disable SW switch */ + odm_set_bb_reg(dm, R_0x900, BIT(17) | BIT(16), 0x0); + odm_set_bb_reg(dm, R_0x974, BIT(7) | BIT(6), 0x3); /* @in/out */ + odm_set_bb_reg(dm, R_0xcb4, BIT(31), 0); /* @delay buffer */ + odm_set_bb_reg(dm, R_0xcb4, BIT(26), 0); + odm_set_bb_reg(dm, R_0xcb4, BIT(27), 1); + odm_set_bb_reg(dm, R_0xcb0, 0xF000000, 8); /* @DPDT_P = ANTSEL[0] */ + odm_set_bb_reg(dm, R_0xcb0, 0xF0000000, 8); /* @DPDT_N = ANTSEL[0] */ + /* @3 ------------------------- */ - /* Mapping Table */ - odm_set_bb_reg(dm, 0xCA4, MASKBYTE0, 0); - odm_set_bb_reg(dm, 0xCA4, MASKBYTE1, 1); + /* @Mapping Table */ + odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0); + odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1); /* OFDM HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0x8D4, 0x7FF, 0xA0); /* thershold */ - odm_set_bb_reg(dm, 0x8D4, 0x7FF000, 0x0); /* bias */ - odm_set_bb_reg(dm, 0x8CC, BIT(20) | BIT(19) | BIT(18), 3); /* settling time of antdiv by RF LNA = 100ns */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */ + odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x0); /* @bias */ + odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3); + /* settling time of antdiv by RF LNA = 100ns */ - /* CCK HW AntDiv Parameters */ - odm_set_bb_reg(dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */ - odm_set_bb_reg(dm, 0xA0C, BIT(4), 1); /* do 64 samples */ + /* @CCK HW AntDiv Parameters */ + odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); + /* patch for clk from 88M to 80M */ + odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */ - /* 2 [--For HW Bug setting] */ - - odm_set_bb_reg(dm, 0x900, BIT(18), 0); /* TX ant by Reg */ /* A-cut bug */ + /* @2 [--For HW Bug setting] */ + odm_set_bb_reg(dm, R_0x900, BIT(18), 0); + /* TX ant by Reg */ /* A-cut bug */ } -#endif /* #if (RTL8812A_SUPPORT == 1) */ +#endif /* @#if (RTL8812A_SUPPORT == 1) */ #if (RTL8188F_SUPPORT == 1) -void -odm_s0s1_sw_ant_div_init_8188f( - void *dm_void -) +void odm_s0s1_sw_ant_div_init_8188f(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - PHYDM_DBG(dm, DBG_ANT_DIV, "***8188F AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); - - /*GPIO setting*/ - /*odm_set_mac_reg(dm, 0x64, BIT(18), 0); */ - /*odm_set_mac_reg(dm, 0x44, BIT(28)|BIT(27), 0);*/ - /*odm_set_mac_reg(dm, 0x44, BIT(20) | BIT(19), 0x3);*/ /*enable_output for P_GPIO[4:3]*/ - /*odm_set_mac_reg(dm, 0x44, BIT(12)|BIT(11), 0);*/ /*output value*/ - /*odm_set_mac_reg(dm, 0x40, BIT(1)|BIT(0), 0);*/ /*GPIO function*/ +#if 0 + /*@GPIO setting*/ + /*odm_set_mac_reg(dm, R_0x64, BIT(18), 0); */ + /*odm_set_mac_reg(dm, R_0x44, BIT(28)|BIT(27), 0);*/ + /*odm_set_mac_reg(dm, R_0x44, BIT(20) | BIT(19), 0x3);*/ + /*enable_output for P_GPIO[4:3]*/ + /*odm_set_mac_reg(dm, R_0x44, BIT(12)|BIT(11), 0);*/ /*output value*/ + /*odm_set_mac_reg(dm, R_0x40, BIT(1)|BIT(0), 0);*/ /*GPIO function*/ +#endif if (dm->support_ic_type == ODM_RTL8188F) { if (dm->support_interface == ODM_ITRF_USB) - odm_set_mac_reg(dm, 0x44, BIT(20) | BIT(19), 0x3); /*enable_output for P_GPIO[4:3]*/ + odm_set_mac_reg(dm, R_0x44, BIT(20) | BIT(19), 0x3); + /*@enable_output for P_GPIO[4:3]*/ else if (dm->support_interface == ODM_ITRF_SDIO) - odm_set_mac_reg(dm, 0x44, BIT(18), 0x1); /*enable_output for P_GPIO[2]*/ + odm_set_mac_reg(dm, R_0x44, BIT(18), 0x1); + /*@enable_output for P_GPIO[2]*/ } - - fat_tab->is_become_linked = false; - dm_swat_table->try_flag = SWAW_STEP_INIT; - dm_swat_table->double_chk_flag = 0; + + fat_tab->is_become_linked = false; + swat_tab->try_flag = SWAW_STEP_INIT; + swat_tab->double_chk_flag = 0; } -void -phydm_update_rx_idle_antenna_8188F( - void *dm_void, - u32 default_ant -) +void phydm_update_rx_idle_antenna_8188F(void *dm_void, u32 default_ant) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 codeword; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 codeword; if (dm->support_ic_type == ODM_RTL8188F) { if (dm->support_interface == ODM_ITRF_USB) { if (default_ant == ANT1_2G) - codeword = 1; /*2'b01*/ + codeword = 1; /*@2'b01*/ else - codeword = 2;/*2'b10*/ - odm_set_mac_reg(dm, 0x44, (BIT(12) | BIT(11)), codeword); /*GPIO[4:3] output value*/ + codeword = 2; /*@2'b10*/ + odm_set_mac_reg(dm, R_0x44, 0x1800, codeword); + /*@GPIO[4:3] output value*/ } else if (dm->support_interface == ODM_ITRF_SDIO) { if (default_ant == ANT1_2G) { - codeword = 0; /*1'b0*/ - odm_set_bb_reg(dm, 0x870, BIT(9)|BIT(8), 0x3); - odm_set_bb_reg(dm, 0x860, BIT(9)|BIT(8), 0x1); + codeword = 0; /*@1'b0*/ + odm_set_bb_reg(dm, R_0x870, 0x300, 0x3); + odm_set_bb_reg(dm, R_0x860, 0x300, 0x1); } else { - codeword = 1;/*1'b1*/ - odm_set_bb_reg(dm, 0x870, BIT(9)|BIT(8), 0x3); - odm_set_bb_reg(dm, 0x860, BIT(9)|BIT(8), 0x2); + codeword = 1; /*@1'b1*/ + odm_set_bb_reg(dm, R_0x870, 0x300, 0x3); + odm_set_bb_reg(dm, R_0x860, 0x300, 0x2); } - odm_set_mac_reg(dm, 0x44, BIT(10), codeword); /*GPIO[2] output value*/ - } + odm_set_mac_reg(dm, R_0x44, BIT(10), codeword); + /*@GPIO[2] output value*/ + } } } #endif - - #ifdef ODM_EVM_ENHANCE_ANTDIV -void -phydm_evm_sw_antdiv_init( - void *dm_void -) +void phydm_rx_rate_for_antdiv(void *dm_void, void *pkt_info_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct phydm_perpkt_info_struct *pktinfo = NULL; + u8 data_rate = 0; - /*EVM enhance AntDiv method init----------------------------------------------------------------------*/ + pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; + data_rate = pktinfo->data_rate & 0x7f; + + if (!fat_tab->get_stats) + return; + + if (fat_tab->antsel_rx_keep_0 == ANT1_2G) { + if (data_rate >= ODM_RATEMCS0 && + data_rate <= ODM_RATEMCS15) + fat_tab->main_ht_cnt[data_rate - ODM_RATEMCS0]++; + else if (data_rate >= ODM_RATEVHTSS1MCS0 && + data_rate <= ODM_RATEVHTSS2MCS9) + fat_tab->main_vht_cnt[data_rate - ODM_RATEVHTSS1MCS0]++; + } else { /*ANT2_2G*/ + if (data_rate >= ODM_RATEMCS0 && + data_rate <= ODM_RATEMCS15) + fat_tab->aux_ht_cnt[data_rate - ODM_RATEMCS0]++; + else if (data_rate >= ODM_RATEVHTSS1MCS0 && + data_rate <= ODM_RATEVHTSS2MCS9) + fat_tab->aux_vht_cnt[data_rate - ODM_RATEVHTSS1MCS0]++; + } +} + +void phydm_antdiv_reset_rx_rate(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + + odm_memory_set(dm, &fat_tab->main_ht_cnt[0], 0, HT_IDX * 2); + odm_memory_set(dm, &fat_tab->aux_ht_cnt[0], 0, HT_IDX * 2); + odm_memory_set(dm, &fat_tab->main_vht_cnt[0], 0, VHT_IDX * 2); + odm_memory_set(dm, &fat_tab->aux_vht_cnt[0], 0, VHT_IDX * 2); +} + +void phydm_statistics_evm_1ss(void *dm_void, void *phy_info_void, + u8 antsel_tr_mux, u32 id, u32 utility) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct phydm_phyinfo_struct *phy_info = NULL; + + phy_info = (struct phydm_phyinfo_struct *)phy_info_void; + if (antsel_tr_mux == ANT1_2G) { + fat_tab->main_evm_sum[id] += ((phy_info->rx_mimo_evm_dbm[0]) + << 5); + fat_tab->main_evm_cnt[id]++; + } else { + fat_tab->aux_evm_sum[id] += ((phy_info->rx_mimo_evm_dbm[0]) + << 5); + fat_tab->aux_evm_cnt[id]++; + } +} + +void phydm_statistics_evm_2ss(void *dm_void, void *phy_info_void, + u8 antsel_tr_mux, u32 id, u32 utility) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct phydm_phyinfo_struct *phy_info = NULL; + + phy_info = (struct phydm_phyinfo_struct *)phy_info_void; + if (antsel_tr_mux == ANT1_2G) { + fat_tab->main_evm_2ss_sum[id][0] += phy_info->rx_mimo_evm_dbm[0] + << 5; + fat_tab->main_evm_2ss_sum[id][1] += phy_info->rx_mimo_evm_dbm[1] + << 5; + fat_tab->main_evm_2ss_cnt[id]++; + + } else { + fat_tab->aux_evm_2ss_sum[id][0] += (phy_info->rx_mimo_evm_dbm[0] + << 5); + fat_tab->aux_evm_2ss_sum[id][1] += (phy_info->rx_mimo_evm_dbm[1] + << 5); + fat_tab->aux_evm_2ss_cnt[id]++; + } +} + +void phydm_evm_sw_antdiv_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + + /*@EVM enhance AntDiv method init----------------*/ fat_tab->evm_method_enable = 0; fat_tab->fat_state = NORMAL_STATE_MIAN; fat_tab->fat_state_cnt = 0; fat_tab->pre_antdiv_rssi = 0; dm->antdiv_intvl = 30; - dm->antdiv_train_num = 2; - odm_set_bb_reg(dm, 0x910, 0x3f, 0xf); + dm->antdiv_delay = 20; + dm->antdiv_train_num = 4; + odm_set_bb_reg(dm, R_0x910, 0x3f, 0xf); dm->antdiv_evm_en = 1; - /*dm->antdiv_period=1;*/ + /*@dm->antdiv_period=1;*/ +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + dm->evm_antdiv_period = 1; +#else dm->evm_antdiv_period = 3; +#endif dm->stop_antdiv_rssi_th = 3; dm->stop_antdiv_tp_th = 80; dm->antdiv_tp_period = 3; dm->stop_antdiv_tp_diff_th = 5; } -void -odm_evm_fast_ant_reset( - void *dm_void -) +void odm_evm_fast_ant_reset(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; fat_tab->evm_method_enable = 0; - odm_ant_div_on_off(dm, ANTDIV_ON); + if (fat_tab->div_path_type == ANT_PATH_A) + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); + else if (fat_tab->div_path_type == ANT_PATH_B) + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_B); + else if (fat_tab->div_path_type == ANT_PATH_AB) + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_AB); fat_tab->fat_state = NORMAL_STATE_MIAN; fat_tab->fat_state_cnt = 0; dm->antdiv_period = 0; - odm_set_mac_reg(dm, 0x608, BIT(8), 0); + odm_set_mac_reg(dm, R_0x608, BIT(8), 0); } - -void -odm_evm_enhance_ant_div( - void *dm_void -) +void odm_evm_enhance_ant_div(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 main_rssi, aux_rssi ; - u32 main_crc_utility = 0, aux_crc_utility = 0, utility_ratio = 1; - u32 main_evm, aux_evm, diff_rssi = 0, diff_EVM = 0; - u32 main_2ss_evm[2], aux_2ss_evm[2]; - u32 main_1ss_evm, aux_1ss_evm; - u32 main_2ss_evm_sum, aux_2ss_evm_sum; - u8 score_EVM = 0, score_CRC = 0; - u8 rssi_larger_ant = 0; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - u32 value32, i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 main_rssi, aux_rssi; + u32 main_crc_utility = 0, aux_crc_utility = 0, utility_ratio = 1; + u32 main_evm, aux_evm, diff_rssi = 0, diff_EVM = 0; + u32 main_2ss_evm[2], aux_2ss_evm[2]; + u32 main_1ss_evm, aux_1ss_evm; + u32 main_2ss_evm_sum, aux_2ss_evm_sum; + u8 score_EVM = 0, score_CRC = 0; + u8 rssi_larger_ant = 0; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u32 value32, i, mac_id; boolean main_above1 = false, aux_above1 = false; boolean force_antenna = false; - struct cmn_sta_info *sta; - u32 antdiv_tp_main_avg, antdiv_tp_aux_avg; - u8 curr_rssi, rssi_diff; - u32 tp_diff; - u8 tp_diff_return = 0, tp_return = 0, rssi_return = 0; - u8 target_ant_evm_1ss, target_ant_evm_2ss; - u8 decision_evm_ss; - u8 next_ant; + struct cmn_sta_info *sta; + u32 main_tp_avg, aux_tp_avg; + u8 curr_rssi, rssi_diff; + u32 tp_diff, tp_diff_avg; + u16 main_max_cnt = 0, aux_max_cnt = 0; + u16 main_max_idx = 0, aux_max_idx = 0; + u16 main_cnt_all = 0, aux_cnt_all = 0; + u8 rate_num = dm->num_rf_path; + u8 rate_ss_shift = 0; + u8 tp_diff_return = 0, tp_return = 0, rssi_return = 0; + u8 target_ant_evm_1ss, target_ant_evm_2ss; + u8 decision_evm_ss; + u8 next_ant; fat_tab->target_ant_enhance = 0xFF; - if ((dm->support_ic_type & ODM_EVM_ENHANCE_ANTDIV_SUPPORT_IC)) { + if ((dm->support_ic_type & ODM_EVM_ANTDIV_IC)) { if (dm->is_one_entry_only) { +#if 0 /* PHYDM_DBG(dm,DBG_ANT_DIV, "[One Client only]\n"); */ - i = dm->one_entry_macid; - sta = dm->phydm_sta_info[i]; +#endif + mac_id = dm->one_entry_macid; + sta = dm->phydm_sta_info[mac_id]; - main_rssi = (fat_tab->main_ant_cnt[i] != 0) ? (fat_tab->main_ant_sum[i] / fat_tab->main_ant_cnt[i]) : 0; - aux_rssi = (fat_tab->aux_ant_cnt[i] != 0) ? (fat_tab->aux_ant_sum[i] / fat_tab->aux_ant_cnt[i]) : 0; + main_rssi = (fat_tab->main_cnt[mac_id] != 0) ? (fat_tab->main_sum[mac_id] / fat_tab->main_cnt[mac_id]) : 0; + aux_rssi = (fat_tab->aux_cnt[mac_id] != 0) ? (fat_tab->aux_sum[mac_id] / fat_tab->aux_cnt[mac_id]) : 0; if ((main_rssi == 0 && aux_rssi != 0 && aux_rssi >= FORCE_RSSI_DIFF) || (main_rssi != 0 && aux_rssi == 0 && main_rssi >= FORCE_RSSI_DIFF)) diff_rssi = FORCE_RSSI_DIFF; @@ -1909,73 +2519,81 @@ odm_evm_enhance_ant_div( else rssi_larger_ant = AUX_ANT; - PHYDM_DBG(dm, DBG_ANT_DIV, "Main_Cnt=(( %d )), main_rssi=(( %d ))\n", fat_tab->main_ant_cnt[i], main_rssi); - PHYDM_DBG(dm, DBG_ANT_DIV, "Aux_Cnt=(( %d )), aux_rssi=(( %d ))\n", fat_tab->aux_ant_cnt[i], aux_rssi); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Main_Cnt=(( %d )), main_rssi=(( %d ))\n", + fat_tab->main_cnt[mac_id], main_rssi); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Aux_Cnt=(( %d )), aux_rssi=(( %d ))\n", + fat_tab->aux_cnt[mac_id], aux_rssi); - if (((main_rssi >= evm_rssi_th_high || aux_rssi >= evm_rssi_th_high) || (fat_tab->evm_method_enable == 1)) - /* && (diff_rssi <= FORCE_RSSI_DIFF + 1) */ - ) { - PHYDM_DBG(dm, DBG_ANT_DIV, "> TH_H || evm_method_enable==1\n"); + if (((main_rssi >= evm_rssi_th_high || aux_rssi >= evm_rssi_th_high) || fat_tab->evm_method_enable == 1) + /* @&& (diff_rssi <= FORCE_RSSI_DIFF + 1) */ + ) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "> TH_H || evm_method_enable==1\n"); - if (((main_rssi >= evm_rssi_th_low) || (aux_rssi >= evm_rssi_th_low))) { + if ((main_rssi >= evm_rssi_th_low || aux_rssi >= evm_rssi_th_low)) { PHYDM_DBG(dm, DBG_ANT_DIV, "> TH_L, fat_state_cnt =((%d))\n", fat_tab->fat_state_cnt); /*Traning state: 0(alt) 1(ori) 2(alt) 3(ori)============================================================*/ - if (fat_tab->fat_state_cnt < ((dm->antdiv_train_num)<<1)) { + if (fat_tab->fat_state_cnt < (dm->antdiv_train_num << 1)) { if (fat_tab->fat_state_cnt == 0) { /*Reset EVM 1SS Method */ - fat_tab->main_ant_evm_sum[i] = 0; - fat_tab->aux_ant_evm_sum[i] = 0; - fat_tab->main_ant_evm_cnt[i] = 0; - fat_tab->aux_ant_evm_cnt[i] = 0; + fat_tab->main_evm_sum[mac_id] = 0; + fat_tab->aux_evm_sum[mac_id] = 0; + fat_tab->main_evm_cnt[mac_id] = 0; + fat_tab->aux_evm_cnt[mac_id] = 0; /*Reset EVM 2SS Method */ - fat_tab->main_ant_evm_2ss_sum[i][0] = 0; - fat_tab->main_ant_evm_2ss_sum[i][1] = 0; - fat_tab->aux_ant_evm_2ss_sum[i][0] = 0; - fat_tab->aux_ant_evm_2ss_sum[i][1] = 0; - fat_tab->main_ant_evm_2ss_cnt[i] = 0; - fat_tab->aux_ant_evm_2ss_cnt[i] = 0; - #if 0 + fat_tab->main_evm_2ss_sum[mac_id][0] = 0; + fat_tab->main_evm_2ss_sum[mac_id][1] = 0; + fat_tab->aux_evm_2ss_sum[mac_id][0] = 0; + fat_tab->aux_evm_2ss_sum[mac_id][1] = 0; + fat_tab->main_evm_2ss_cnt[mac_id] = 0; + fat_tab->aux_evm_2ss_cnt[mac_id] = 0; + /*Reset TP Method */ - fat_tab->antdiv_tp_main = 0; - fat_tab->antdiv_tp_aux = 0; - fat_tab->antdiv_tp_main_cnt = 0; - fat_tab->antdiv_tp_aux_cnt = 0; - #endif + fat_tab->main_tp = 0; + fat_tab->aux_tp = 0; + fat_tab->main_tp_cnt = 0; + fat_tab->aux_tp_cnt = 0; + phydm_antdiv_reset_rx_rate(dm); + /*Reset CRC Method */ fat_tab->main_crc32_ok_cnt = 0; fat_tab->main_crc32_fail_cnt = 0; fat_tab->aux_crc32_ok_cnt = 0; fat_tab->aux_crc32_fail_cnt = 0; - #ifdef SKIP_EVM_ANTDIV_TRAINING_PATCH - if ((*dm->band_width == CHANNEL_WIDTH_20) && (sta->mimo_type == RF_2T2R)) { - /*1. Skip training: RSSI*/ +#ifdef SKIP_EVM_ANTDIV_TRAINING_PATCH + if ((*dm->band_width == CHANNEL_WIDTH_20) && sta->mimo_type == RF_2T2R) { + /*@1. Skip training: RSSI*/ +#if 0 /*PHYDM_DBG(pDM_Odm,DBG_ANT_DIV, "TargetAnt_enhance=((%d)), RxIdleAnt=((%d))\n", pDM_FatTable->TargetAnt_enhance, pDM_FatTable->RxIdleAnt);*/ +#endif curr_rssi = (u8)((fat_tab->rx_idle_ant == MAIN_ANT) ? main_rssi : aux_rssi); rssi_diff = (curr_rssi > fat_tab->pre_antdiv_rssi) ? (curr_rssi - fat_tab->pre_antdiv_rssi) : (fat_tab->pre_antdiv_rssi - curr_rssi); PHYDM_DBG(dm, DBG_ANT_DIV, "[1] rssi_return, curr_rssi=((%d)), pre_rssi=((%d))\n", curr_rssi, fat_tab->pre_antdiv_rssi); fat_tab->pre_antdiv_rssi = curr_rssi; - if ((rssi_diff < (dm->stop_antdiv_rssi_th)) && (curr_rssi != 0)) + if (rssi_diff < dm->stop_antdiv_rssi_th && curr_rssi != 0) rssi_return = 1; - /*2. Skip training: TP Diff*/ - tp_diff = (dm->rx_tp > fat_tab->pre_antdiv_tp) ? (dm->rx_tp - fat_tab->pre_antdiv_tp) : (fat_tab->pre_antdiv_tp - dm->rx_tp); + /*@2. Skip training: TP Diff*/ + tp_diff = (dm->rx_tp > fat_tab->pre_antdiv_tp) ? (dm->rx_tp - fat_tab->pre_antdiv_tp) : (fat_tab->pre_antdiv_tp - dm->rx_tp); PHYDM_DBG(dm, DBG_ANT_DIV, "[2] tp_diff_return, curr_tp=((%d)), pre_tp=((%d))\n", dm->rx_tp, fat_tab->pre_antdiv_tp); fat_tab->pre_antdiv_tp = dm->rx_tp; - if ((tp_diff < (u32)(dm->stop_antdiv_tp_diff_th) && (dm->rx_tp != 0))) + if ((tp_diff < (u32)(dm->stop_antdiv_tp_diff_th) && dm->rx_tp != 0)) tp_diff_return = 1; PHYDM_DBG(dm, DBG_ANT_DIV, "[3] tp_return, curr_rx_tp=((%d))\n", dm->rx_tp); - /*3. Skip training: TP*/ + /*@3. Skip training: TP*/ if (dm->rx_tp >= (u32)(dm->stop_antdiv_tp_th)) tp_return = 1; PHYDM_DBG(dm, DBG_ANT_DIV, "[4] Return {rssi, tp_diff, tp} = {%d, %d, %d}\n", rssi_return, tp_diff_return, tp_return); - /*4. Joint Return Decision*/ + /*@4. Joint Return Decision*/ if (tp_return) { if (tp_diff_return || rssi_diff) { PHYDM_DBG(dm, DBG_ANT_DIV, "***Return EVM SW AntDiv\n"); @@ -1983,30 +2601,45 @@ odm_evm_enhance_ant_div( } } } - #endif +#endif fat_tab->evm_method_enable = 1; - odm_ant_div_on_off(dm, ANTDIV_OFF); + if (fat_tab->div_path_type == ANT_PATH_A) + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); + else if (fat_tab->div_path_type == ANT_PATH_B) + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B); + else if (fat_tab->div_path_type == ANT_PATH_AB) + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_AB); dm->antdiv_period = dm->evm_antdiv_period; - odm_set_mac_reg(dm, 0x608, BIT(8), 1); /*RCR accepts CRC32-Error packets*/ - + odm_set_mac_reg(dm, R_0x608, BIT(8), 1); /*RCR accepts CRC32-Error packets*/ + fat_tab->fat_state_cnt++; + fat_tab->get_stats = false; + next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? MAIN_ANT : AUX_ANT; + odm_update_rx_idle_ant(dm, next_ant); + PHYDM_DBG(dm, DBG_ANT_DIV, "[Antdiv Delay ]\n"); + odm_set_timer(dm, &dm->evm_fast_ant_training_timer, dm->antdiv_delay); //ms + } else if ((fat_tab->fat_state_cnt % 2) != 0) { + fat_tab->fat_state_cnt++; + fat_tab->get_stats = true; + odm_set_timer(dm, &dm->evm_fast_ant_training_timer, dm->antdiv_intvl); //ms + } else if ((fat_tab->fat_state_cnt % 2) == 0) { + fat_tab->fat_state_cnt++; + fat_tab->get_stats = false; + next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT; + odm_update_rx_idle_ant(dm, next_ant); + PHYDM_DBG(dm, DBG_ANT_DIV, "[Antdiv Delay ]\n"); + odm_set_timer(dm, &dm->evm_fast_ant_training_timer, dm->antdiv_delay); //ms } - - - fat_tab->fat_state_cnt++; - next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT; - odm_update_rx_idle_ant(dm, next_ant); - odm_set_timer(dm, &dm->evm_fast_ant_training_timer, dm->antdiv_intvl); //ms - } - /*Decision state: 4==============================================================*/ + /*@Decision state: 4==============================================================*/ else { + fat_tab->get_stats = false; fat_tab->fat_state_cnt = 0; PHYDM_DBG(dm, DBG_ANT_DIV, "[Decisoin state ]\n"); - /* 3 [CRC32 statistic] */ - #if 0 - if ((fat_tab->main_crc32_ok_cnt > ((fat_tab->aux_crc32_ok_cnt) << 1)) || ((diff_rssi >= 40) && (rssi_larger_ant == MAIN_ANT))) { +/* @3 [CRC32 statistic] */ +#if 0 + if ((fat_tab->main_crc32_ok_cnt > (fat_tab->aux_crc32_ok_cnt << 1)) || (diff_rssi >= 40 && rssi_larger_ant == MAIN_ANT)) { fat_tab->target_ant_crc32 = MAIN_ANT; force_antenna = true; PHYDM_DBG(dm, DBG_ANT_DIV, "CRC32 Force Main\n"); @@ -2015,7 +2648,7 @@ odm_evm_enhance_ant_div( force_antenna = true; PHYDM_DBG(dm, DBG_ANT_DIV, "CRC32 Force Aux\n"); } else - #endif +#endif { if (fat_tab->main_crc32_fail_cnt <= 5) fat_tab->main_crc32_fail_cnt = 5; @@ -2064,35 +2697,70 @@ odm_evm_enhance_ant_div( } } } - odm_set_mac_reg(dm, 0x608, BIT(8), 0);/* NOT Accept CRC32 Error packets. */ + odm_set_mac_reg(dm, R_0x608, BIT(8), 0); /* NOT Accept CRC32 Error packets. */ PHYDM_DBG(dm, DBG_ANT_DIV, "MAIN_CRC: Ok=((%d)), Fail = ((%d)), Utility = ((%d))\n", fat_tab->main_crc32_ok_cnt, fat_tab->main_crc32_fail_cnt, main_crc_utility); PHYDM_DBG(dm, DBG_ANT_DIV, "AUX__CRC: Ok=((%d)), Fail = ((%d)), Utility = ((%d))\n", fat_tab->aux_crc32_ok_cnt, fat_tab->aux_crc32_fail_cnt, aux_crc_utility); - PHYDM_DBG(dm, DBG_ANT_DIV, "***1.TargetAnt_CRC32 = ((%s))\n", (fat_tab->target_ant_crc32 == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"); + PHYDM_DBG(dm, DBG_ANT_DIV, "***1.TargetAnt_CRC32 = ((%s))\n", (fat_tab->target_ant_crc32 == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); - /* 3 [EVM statistic] */ - /*1SS EVM*/ - main_1ss_evm = (fat_tab->main_ant_evm_cnt[i] != 0) ? (fat_tab->main_ant_evm_sum[i] / fat_tab->main_ant_evm_cnt[i]) : 0; - aux_1ss_evm = (fat_tab->aux_ant_evm_cnt[i] != 0) ? (fat_tab->aux_ant_evm_sum[i] / fat_tab->aux_ant_evm_cnt[i]) : 0; + for (i = 0; i < HT_IDX; i++) { + main_cnt_all += fat_tab->main_ht_cnt[i]; + aux_cnt_all += fat_tab->aux_ht_cnt[i]; + + if (fat_tab->main_ht_cnt[i] > main_max_cnt) { + main_max_cnt = fat_tab->main_ht_cnt[i]; + main_max_idx = i; + } + + if (fat_tab->aux_ht_cnt[i] > aux_max_cnt) { + aux_max_cnt = fat_tab->aux_ht_cnt[i]; + aux_max_idx = i; + } + } + + for (i = 0; i < rate_num; i++) { + rate_ss_shift = (i << 3); + PHYDM_DBG(dm, DBG_ANT_DIV, "*main_ht_cnt HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", + (rate_ss_shift), (rate_ss_shift + 7), + fat_tab->main_ht_cnt[rate_ss_shift + 0], fat_tab->main_ht_cnt[rate_ss_shift + 1], + fat_tab->main_ht_cnt[rate_ss_shift + 2], fat_tab->main_ht_cnt[rate_ss_shift + 3], + fat_tab->main_ht_cnt[rate_ss_shift + 4], fat_tab->main_ht_cnt[rate_ss_shift + 5], + fat_tab->main_ht_cnt[rate_ss_shift + 6], fat_tab->main_ht_cnt[rate_ss_shift + 7]); + } + + for (i = 0; i < rate_num; i++) { + rate_ss_shift = (i << 3); + PHYDM_DBG(dm, DBG_ANT_DIV, "*aux_ht_cnt HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", + (rate_ss_shift), (rate_ss_shift + 7), + fat_tab->aux_ht_cnt[rate_ss_shift + 0], fat_tab->aux_ht_cnt[rate_ss_shift + 1], + fat_tab->aux_ht_cnt[rate_ss_shift + 2], fat_tab->aux_ht_cnt[rate_ss_shift + 3], + fat_tab->aux_ht_cnt[rate_ss_shift + 4], fat_tab->aux_ht_cnt[rate_ss_shift + 5], + fat_tab->aux_ht_cnt[rate_ss_shift + 6], fat_tab->aux_ht_cnt[rate_ss_shift + 7]); + } + + /* @3 [EVM statistic] */ + /*@1SS EVM*/ + main_1ss_evm = (fat_tab->main_evm_cnt[mac_id] != 0) ? (fat_tab->main_evm_sum[mac_id] / fat_tab->main_evm_cnt[mac_id]) : 0; + aux_1ss_evm = (fat_tab->aux_evm_cnt[mac_id] != 0) ? (fat_tab->aux_evm_sum[mac_id] / fat_tab->aux_evm_cnt[mac_id]) : 0; target_ant_evm_1ss = (main_1ss_evm == aux_1ss_evm) ? (fat_tab->pre_target_ant_enhance) : ((main_1ss_evm >= aux_1ss_evm) ? MAIN_ANT : AUX_ANT); - PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Main1ss_EVM= (( %d ))\n", fat_tab->main_ant_evm_cnt[i], main_1ss_evm); - PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Aux_1ss_EVM = (( %d ))\n", fat_tab->main_ant_evm_cnt[i], aux_1ss_evm); + PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Main1ss_EVM= (( %d ))\n", fat_tab->main_evm_cnt[mac_id], main_1ss_evm); + PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Aux_1ss_EVM = (( %d ))\n", fat_tab->aux_evm_cnt[mac_id], aux_1ss_evm); - /*2SS EVM*/ - main_2ss_evm[0] = (fat_tab->main_ant_evm_2ss_cnt[i] != 0) ? (fat_tab->main_ant_evm_2ss_sum[i][0] / fat_tab->main_ant_evm_2ss_cnt[i]) : 0; - main_2ss_evm[1] = (fat_tab->main_ant_evm_2ss_cnt[i] != 0) ? (fat_tab->main_ant_evm_2ss_sum[i][1] / fat_tab->main_ant_evm_2ss_cnt[i]) : 0; + /*@2SS EVM*/ + main_2ss_evm[0] = (fat_tab->main_evm_2ss_cnt[mac_id] != 0) ? (fat_tab->main_evm_2ss_sum[mac_id][0] / fat_tab->main_evm_2ss_cnt[mac_id]) : 0; + main_2ss_evm[1] = (fat_tab->main_evm_2ss_cnt[mac_id] != 0) ? (fat_tab->main_evm_2ss_sum[mac_id][1] / fat_tab->main_evm_2ss_cnt[mac_id]) : 0; main_2ss_evm_sum = main_2ss_evm[0] + main_2ss_evm[1]; - aux_2ss_evm[0] = (fat_tab->aux_ant_evm_2ss_cnt[i] != 0) ? (fat_tab->aux_ant_evm_2ss_sum[i][0] / fat_tab->aux_ant_evm_2ss_cnt[i]) : 0; - aux_2ss_evm[1] = (fat_tab->aux_ant_evm_2ss_cnt[i] != 0) ? (fat_tab->aux_ant_evm_2ss_sum[i][1] / fat_tab->aux_ant_evm_2ss_cnt[i]) : 0; + aux_2ss_evm[0] = (fat_tab->aux_evm_2ss_cnt[mac_id] != 0) ? (fat_tab->aux_evm_2ss_sum[mac_id][0] / fat_tab->aux_evm_2ss_cnt[mac_id]) : 0; + aux_2ss_evm[1] = (fat_tab->aux_evm_2ss_cnt[mac_id] != 0) ? (fat_tab->aux_evm_2ss_sum[mac_id][1] / fat_tab->aux_evm_2ss_cnt[mac_id]) : 0; aux_2ss_evm_sum = aux_2ss_evm[0] + aux_2ss_evm[1]; target_ant_evm_2ss = (main_2ss_evm_sum == aux_2ss_evm_sum) ? (fat_tab->pre_target_ant_enhance) : ((main_2ss_evm_sum >= aux_2ss_evm_sum) ? MAIN_ANT : AUX_ANT); PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Main2ss_EVM{A,B,Sum} = {%d, %d, %d}\n", - fat_tab->main_ant_evm_2ss_cnt[i], main_2ss_evm[0], main_2ss_evm[1], main_2ss_evm_sum); + fat_tab->main_evm_2ss_cnt[mac_id], main_2ss_evm[0], main_2ss_evm[1], main_2ss_evm_sum); PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Aux_2ss_EVM{A,B,Sum} = {%d, %d, %d}\n", - fat_tab->aux_ant_evm_2ss_cnt[i], aux_2ss_evm[0], aux_2ss_evm[1], aux_2ss_evm_sum); + fat_tab->aux_evm_2ss_cnt[mac_id], aux_2ss_evm[0], aux_2ss_evm[1], aux_2ss_evm_sum); if ((main_2ss_evm_sum + aux_2ss_evm_sum) != 0) { decision_evm_ss = 2; @@ -2115,23 +2783,32 @@ odm_evm_enhance_ant_div( PHYDM_DBG(dm, DBG_ANT_DIV, "***2.TargetAnt_EVM((%d-ss)) = ((%s))\n", decision_evm_ss, (fat_tab->target_ant_evm == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); - //3 [TP statistic] - antdiv_tp_main_avg = (fat_tab->antdiv_tp_main_cnt != 0) ? (fat_tab->antdiv_tp_main / fat_tab->antdiv_tp_main_cnt) : 0; - antdiv_tp_aux_avg = (fat_tab->antdiv_tp_aux_cnt != 0) ? (fat_tab->antdiv_tp_aux / fat_tab->antdiv_tp_aux_cnt) : 0; - fat_tab->target_ant_tp = (antdiv_tp_main_avg == antdiv_tp_aux_avg) ? (fat_tab->pre_target_ant_enhance) : ((antdiv_tp_main_avg >= antdiv_tp_aux_avg) ? MAIN_ANT : AUX_ANT); + main_tp_avg = (fat_tab->main_tp_cnt != 0) ? (fat_tab->main_tp / fat_tab->main_tp_cnt) : 0; + aux_tp_avg = (fat_tab->aux_tp_cnt != 0) ? (fat_tab->aux_tp / fat_tab->aux_tp_cnt) : 0; + tp_diff_avg = DIFF_2(main_tp_avg, aux_tp_avg); + fat_tab->target_ant_tp = (tp_diff_avg < 100) ? (fat_tab->pre_target_ant_enhance) : ((main_tp_avg >= aux_tp_avg) ? MAIN_ANT : AUX_ANT); - PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Main_TP = ((%d))\n", fat_tab->antdiv_tp_main_cnt, antdiv_tp_main_avg); - PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Aux_TP = ((%d))\n", fat_tab->antdiv_tp_aux_cnt, antdiv_tp_aux_avg); + PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Main_TP = ((%d))\n", fat_tab->main_tp_cnt, main_tp_avg); + PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Aux_TP = ((%d))\n", fat_tab->aux_tp_cnt, aux_tp_avg); PHYDM_DBG(dm, DBG_ANT_DIV, "***3.TargetAnt_TP = ((%s))\n", (fat_tab->target_ant_tp == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); /*Reset TP Method */ - fat_tab->antdiv_tp_main = 0; - fat_tab->antdiv_tp_aux = 0; - fat_tab->antdiv_tp_main_cnt = 0; - fat_tab->antdiv_tp_aux_cnt = 0; + fat_tab->main_tp = 0; + fat_tab->aux_tp = 0; + fat_tab->main_tp_cnt = 0; + fat_tab->aux_tp_cnt = 0; - /* 2 [ Decision state ] */ + /* @2 [ Decision state ] */ + #if 1 + if (main_max_idx == aux_max_idx && ((main_cnt_all + aux_cnt_all) != 0)) { + PHYDM_DBG(dm, DBG_ANT_DIV, "Decision EVM, main_max_idx = ((MCS%d)), aux_max_idx = ((MCS%d))\n", main_max_idx, aux_max_idx); + fat_tab->target_ant_enhance = fat_tab->target_ant_evm; + } else { + PHYDM_DBG(dm, DBG_ANT_DIV, "Decision TP, main_max_idx = ((MCS%d)), aux_max_idx = ((MCS%d))\n", main_max_idx, aux_max_idx); + fat_tab->target_ant_enhance = fat_tab->target_ant_tp; + } + #else if (fat_tab->target_ant_evm == fat_tab->target_ant_crc32) { PHYDM_DBG(dm, DBG_ANT_DIV, "Decision type 1, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM); @@ -2157,9 +2834,9 @@ odm_evm_enhance_ant_div( if (force_antenna == true) score_CRC = 2; - else if (utility_ratio >= 5) /*>2.5*/ + else if (utility_ratio >= 5) /*@>2.5*/ score_CRC = 2; - else if (utility_ratio >= 4) /*>2*/ + else if (utility_ratio >= 4) /*@>2*/ score_CRC = 1; else score_CRC = 0; @@ -2180,18 +2857,18 @@ odm_evm_enhance_ant_div( else fat_tab->target_ant_enhance = fat_tab->pre_target_ant_enhance; } + #endif fat_tab->pre_target_ant_enhance = fat_tab->target_ant_enhance; - PHYDM_DBG(dm, DBG_ANT_DIV, "*** 4.TargetAnt_enhance = (( %s ))******\n", (fat_tab->target_ant_enhance == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"); - - + PHYDM_DBG(dm, DBG_ANT_DIV, "*** 4.TargetAnt_enhance = (( %s ))******\n", (fat_tab->target_ant_enhance == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); } } else { /* RSSI< = evm_rssi_th_low */ PHYDM_DBG(dm, DBG_ANT_DIV, "[ TH_L ]\n"); odm_evm_fast_ant_reset(dm); } } else { - PHYDM_DBG(dm, DBG_ANT_DIV, "[escape from> TH_H || evm_method_enable==1]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[escape from> TH_H || evm_method_enable==1]\n"); odm_evm_fast_ant_reset(dm); } } else { @@ -2201,54 +2878,115 @@ odm_evm_enhance_ant_div( } } -void -odm_evm_fast_ant_training_callback( - void *dm_void -) +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +void phydm_evm_antdiv_callback( + struct phydm_timer_list *timer) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + void *adapter = (void *)timer->Adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; + + #if DEV_BUS_TYPE == RT_PCI_INTERFACE + #if USE_WORKITEM + odm_schedule_work_item(&dm->phydm_evm_antdiv_workitem); + #else + { + odm_hw_ant_div(dm); + } + #endif + #else + odm_schedule_work_item(&dm->phydm_evm_antdiv_workitem); + #endif +} + +void phydm_evm_antdiv_workitem_callback( + void *context) +{ + void *adapter = (void *)context; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; + + odm_hw_ant_div(dm); +} + +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) +void phydm_evm_antdiv_callback(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *padapter = dm->adapter; + + if (*dm->is_net_closed) + return; + if (dm->support_interface == ODM_ITRF_PCIE) { + odm_hw_ant_div(dm); + } else { + /* @Can't do I/O in timer callback*/ + phydm_run_in_thread_cmd(dm, + phydm_evm_antdiv_workitem_callback, + padapter); + } +} + +void phydm_evm_antdiv_workitem_callback(void *context) +{ + void *adapter = (void *)context; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->odmpriv; + + odm_hw_ant_div(dm); +} + +#else +void phydm_evm_antdiv_callback( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; PHYDM_DBG(dm, DBG_ANT_DIV, "******AntDiv_Callback******\n"); odm_hw_ant_div(dm); } #endif -void -odm_hw_ant_div( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 i, min_max_rssi = 0xFF, ant_div_max_rssi = 0, max_rssi = 0, local_max_rssi; - u32 main_rssi, aux_rssi, mian_cnt, aux_cnt; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - u8 rx_idle_ant = fat_tab->rx_idle_ant, target_ant = 7; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - struct cmn_sta_info *sta; +#endif -#if (BEAMFORMING_SUPPORT == 1) +void odm_hw_ant_div(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 i, min_max_rssi = 0xFF, ant_div_max_rssi = 0, max_rssi = 0; + u32 main_rssi, aux_rssi, mian_cnt, aux_cnt, local_max_rssi; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u8 rx_idle_ant = fat_tab->rx_idle_ant, target_ant = 7; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct cmn_sta_info *sta; + +#ifdef PHYDM_BEAMFORMING_SUPPORT #if (DM_ODM_SUPPORT_TYPE == ODM_AP) - struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; - u32 TH1 = 500000; - u32 TH2 = 10000000; - u32 ma_rx_temp, degrade_TP_temp, improve_TP_temp; - u8 monitor_rssi_threshold = 30; + struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; + u32 TH1 = 500000; + u32 TH2 = 10000000; + u32 ma_rx_temp, degrade_TP_temp, improve_TP_temp; + u8 monitor_rssi_threshold = 30; dm_bdc_table->BF_pass = true; dm_bdc_table->DIV_pass = true; dm_bdc_table->is_all_div_sta_idle = true; dm_bdc_table->is_all_bf_sta_idle = true; - dm_bdc_table->num_bf_tar = 0 ; + dm_bdc_table->num_bf_tar = 0; dm_bdc_table->num_div_tar = 0; dm_bdc_table->num_client = 0; #endif #endif - if (!dm->is_linked) { /* is_linked==False */ + if (!dm->is_linked) { /* @is_linked==False */ PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n"); - if (fat_tab->is_become_linked == true) { - odm_ant_div_on_off(dm, ANTDIV_OFF); + if (fat_tab->is_become_linked) { + if (fat_tab->div_path_type == ANT_PATH_A) + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); + else if (fat_tab->div_path_type == ANT_PATH_B) + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B); + else if (fat_tab->div_path_type == ANT_PATH_AB) + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_AB); odm_update_rx_idle_ant(dm, MAIN_ANT); odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); dm->antdiv_period = 0; @@ -2257,44 +2995,58 @@ odm_hw_ant_div( } return; } else { - if (fat_tab->is_become_linked == false) { + if (!fat_tab->is_become_linked) { PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n"); - odm_ant_div_on_off(dm, ANTDIV_ON); + if (fat_tab->div_path_type == ANT_PATH_A) + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); + else if (fat_tab->div_path_type == ANT_PATH_B) + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_B); + else if (fat_tab->div_path_type == ANT_PATH_AB) + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_AB); + #if 0 /*odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC);*/ - /* if(dm->support_ic_type == ODM_RTL8821 ) */ - /* odm_set_bb_reg(dm, 0x800, BIT(25), 0); */ /* CCK AntDiv function disable */ + /* @if(dm->support_ic_type == ODM_RTL8821 ) */ + /* odm_set_bb_reg(dm, R_0x800, BIT(25), 0); */ + /* CCK AntDiv function disable */ - /* #if(DM_ODM_SUPPORT_TYPE == ODM_AP) */ - /* else if(dm->support_ic_type == ODM_RTL8881A) */ - /* odm_set_bb_reg(dm, 0x800, BIT(25), 0); */ /* CCK AntDiv function disable */ - /* #endif */ + /* @#if(DM_ODM_SUPPORT_TYPE == ODM_AP) */ + /* @else if(dm->support_ic_type == ODM_RTL8881A) */ + /* odm_set_bb_reg(dm, R_0x800, BIT(25), 0); */ + /* CCK AntDiv function disable */ + /* @#endif */ - /* else if(dm->support_ic_type == ODM_RTL8723B ||dm->support_ic_type == ODM_RTL8812) */ - /* odm_set_bb_reg(dm, 0xA00, BIT(15), 0); */ /* CCK AntDiv function disable */ + /* @else if(dm->support_ic_type == ODM_RTL8723B ||*/ + /* @dm->support_ic_type == ODM_RTL8812) */ + /* odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); */ + /* CCK AntDiv function disable */ + #endif fat_tab->is_become_linked = dm->is_linked; - if (dm->support_ic_type == ODM_RTL8723B && dm->ant_div_type == CG_TRX_HW_ANTDIV) { - odm_set_bb_reg(dm, 0x930, 0xF0, 8); /* DPDT_P = ANTSEL[0] */ /* for 8723B AntDiv function patch. BB Dino 130412 */ - odm_set_bb_reg(dm, 0x930, 0xF, 8); /* DPDT_N = ANTSEL[0] */ + if (dm->support_ic_type == ODM_RTL8723B && + dm->ant_div_type == CG_TRX_HW_ANTDIV) { + odm_set_bb_reg(dm, R_0x930, 0xF0, 8); + /* @DPDT_P = ANTSEL[0] for 8723B AntDiv */ + odm_set_bb_reg(dm, R_0x930, 0xF, 8); + /* @DPDT_N = ANTSEL[0] */ } - /* 2 BDC Init */ -#if (BEAMFORMING_SUPPORT == 1) -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) + /* @ BDC Init */ + #ifdef PHYDM_BEAMFORMING_SUPPORT + #if (DM_ODM_SUPPORT_TYPE == ODM_AP) odm_bdc_init(dm); -#endif -#endif + #endif + #endif -#ifdef ODM_EVM_ENHANCE_ANTDIV + #ifdef ODM_EVM_ENHANCE_ANTDIV odm_evm_fast_ant_reset(dm); -#endif + #endif } } - if (*fat_tab->p_force_tx_ant_by_desc == false) { - if (dm->is_one_entry_only == true) + if (!(*fat_tab->p_force_tx_by_desc)) { + if (dm->is_one_entry_only) odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); else odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); @@ -2309,8 +3061,8 @@ odm_hw_ant_div( odm_evm_fast_ant_reset(dm); #endif - /* 2 BDC mode Arbitration */ -#if (BEAMFORMING_SUPPORT == 1) +/* @2 BDC mode Arbitration */ +#ifdef PHYDM_BEAMFORMING_SUPPORT #if (DM_ODM_SUPPORT_TYPE == ODM_AP) if (dm->antdiv_evm_en == 0 || fat_tab->evm_method_enable == 0) odm_bf_ant_div_mode_arbitration(dm); @@ -2319,147 +3071,171 @@ odm_hw_ant_div( for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { sta = dm->phydm_sta_info[i]; - if (is_sta_active(sta)) { - /* 2 Caculate RSSI per Antenna */ - if ((fat_tab->main_ant_cnt[i] != 0) || (fat_tab->aux_ant_cnt[i] != 0)) { - mian_cnt = fat_tab->main_ant_cnt[i]; - aux_cnt = fat_tab->aux_ant_cnt[i]; - main_rssi = (mian_cnt != 0) ? (fat_tab->main_ant_sum[i] / mian_cnt) : 0; - aux_rssi = (aux_cnt != 0) ? (fat_tab->aux_ant_sum[i] / aux_cnt) : 0; - target_ant = (mian_cnt == aux_cnt) ? fat_tab->rx_idle_ant : ((mian_cnt >= aux_cnt) ? MAIN_ANT : AUX_ANT); /*Use counter number for OFDM*/ - - } else { /*CCK only case*/ - mian_cnt = fat_tab->main_ant_cnt_cck[i]; - aux_cnt = fat_tab->aux_ant_cnt_cck[i]; - main_rssi = (mian_cnt != 0) ? (fat_tab->main_ant_sum_cck[i] / mian_cnt) : 0; - aux_rssi = (aux_cnt != 0) ? (fat_tab->aux_ant_sum_cck[i] / aux_cnt) : 0; - target_ant = (main_rssi == aux_rssi) ? fat_tab->rx_idle_ant : ((main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT); /*Use RSSI for CCK only case*/ - } - - PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : Main_Cnt = (( %d )) , CCK_Main_Cnt = (( %d )) , main_rssi= (( %d ))\n", i, fat_tab->main_ant_cnt[i], fat_tab->main_ant_cnt_cck[i], main_rssi); - PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : Aux_Cnt = (( %d )) , CCK_Aux_Cnt = (( %d )) , aux_rssi = (( %d ))\n", i, fat_tab->aux_ant_cnt[i], fat_tab->aux_ant_cnt_cck[i], aux_rssi); - /* PHYDM_DBG(dm,DBG_ANT_DIV, "*** MAC ID:[ %d ] , target_ant = (( %s ))\n", i ,( target_ant ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"); */ - - local_max_rssi = (main_rssi > aux_rssi) ? main_rssi : aux_rssi; - /* 2 Select max_rssi for DIG */ - if ((local_max_rssi > ant_div_max_rssi) && (local_max_rssi < 40)) - ant_div_max_rssi = local_max_rssi; - if (local_max_rssi > max_rssi) - max_rssi = local_max_rssi; - - /* 2 Select RX Idle Antenna */ - if ((local_max_rssi != 0) && (local_max_rssi < min_max_rssi)) { - rx_idle_ant = target_ant; - min_max_rssi = local_max_rssi; - } - -#ifdef ODM_EVM_ENHANCE_ANTDIV - if (dm->antdiv_evm_en == 1) { - if (fat_tab->target_ant_enhance != 0xFF) { - target_ant = fat_tab->target_ant_enhance; - rx_idle_ant = fat_tab->target_ant_enhance; - } - } -#endif - - /* 2 Select TX Antenna */ - if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) { -#if (BEAMFORMING_SUPPORT == 1) -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - if (dm_bdc_table->w_bfee_client[i] == 0) -#endif -#endif - { - odm_update_tx_ant(dm, target_ant, i); - } - } - - /* ------------------------------------------------------------ */ - -#if (BEAMFORMING_SUPPORT == 1) -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - - dm_bdc_table->num_client++; - - if (dm_bdc_table->bdc_mode == BDC_MODE_2 || dm_bdc_table->bdc_mode == BDC_MODE_3) { - /* 2 Byte counter */ - - ma_rx_temp = sta->rx_moving_average_tp; /* RX TP ( bit /sec) */ - - if (dm_bdc_table->BDC_state == bdc_bfer_train_state) - dm_bdc_table->MA_rx_TP_DIV[i] = ma_rx_temp ; - else - dm_bdc_table->MA_rx_TP[i] = ma_rx_temp ; - - if ((ma_rx_temp < TH2) && (ma_rx_temp > TH1) && (local_max_rssi <= monitor_rssi_threshold)) { - if (dm_bdc_table->w_bfer_client[i] == 1) { /* Bfer_Target */ - dm_bdc_table->num_bf_tar++; - - if (dm_bdc_table->BDC_state == BDC_DECISION_STATE && dm_bdc_table->bdc_try_flag == 0) { - improve_TP_temp = (dm_bdc_table->MA_rx_TP_DIV[i] * 9) >> 3 ; /* * 1.125 */ - dm_bdc_table->BF_pass = (dm_bdc_table->MA_rx_TP[i] > improve_TP_temp) ? true : false; - PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : { MA_rx_TP,improve_TP_temp, MA_rx_TP_DIV, BF_pass}={ %d, %d, %d , %d }\n", i, dm_bdc_table->MA_rx_TP[i], improve_TP_temp, dm_bdc_table->MA_rx_TP_DIV[i], dm_bdc_table->BF_pass); - } - } else { /* DIV_Target */ - dm_bdc_table->num_div_tar++; - - if (dm_bdc_table->BDC_state == BDC_DECISION_STATE && dm_bdc_table->bdc_try_flag == 0) { - degrade_TP_temp = (dm_bdc_table->MA_rx_TP_DIV[i] * 5) >> 3; /* * 0.625 */ - dm_bdc_table->DIV_pass = (dm_bdc_table->MA_rx_TP[i] > degrade_TP_temp) ? true : false; - PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : { MA_rx_TP, degrade_TP_temp, MA_rx_TP_DIV, DIV_pass}=\n{ %d, %d, %d , %d }\n", i, dm_bdc_table->MA_rx_TP[i], degrade_TP_temp, dm_bdc_table->MA_rx_TP_DIV[i], dm_bdc_table->DIV_pass); - } - } - } - - if (ma_rx_temp > TH1) { - if (dm_bdc_table->w_bfer_client[i] == 1) /* Bfer_Target */ - dm_bdc_table->is_all_bf_sta_idle = false; - else/* DIV_Target */ - dm_bdc_table->is_all_div_sta_idle = false; - } - - PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : { BFmeeCap, BFmerCap} = { %d , %d }\n", i, dm_bdc_table->w_bfee_client[i], dm_bdc_table->w_bfer_client[i]); - - if (dm_bdc_table->BDC_state == bdc_bfer_train_state) - PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : MA_rx_TP_DIV = (( %d ))\n", i, dm_bdc_table->MA_rx_TP_DIV[i]); - - else - PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : MA_rx_TP = (( %d ))\n", i, dm_bdc_table->MA_rx_TP[i]); - - } -#endif -#endif - + if (!is_sta_active(sta)) { + phydm_antdiv_reset_statistic(dm, i); + continue; } -#if (BEAMFORMING_SUPPORT == 1) -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) + /* @2 Caculate RSSI per Antenna */ + if (fat_tab->main_cnt[i] != 0 || fat_tab->aux_cnt[i] != 0) { + mian_cnt = fat_tab->main_cnt[i]; + aux_cnt = fat_tab->aux_cnt[i]; + main_rssi = (mian_cnt != 0) ? + (fat_tab->main_sum[i] / mian_cnt) : 0; + aux_rssi = (aux_cnt != 0) ? + (fat_tab->aux_sum[i] / aux_cnt) : 0; + target_ant = (mian_cnt == aux_cnt) ? + fat_tab->rx_idle_ant : + ((mian_cnt >= aux_cnt) ? + MAIN_ANT : AUX_ANT); + /*Use counter number for OFDM*/ + + } else { /*@CCK only case*/ + mian_cnt = fat_tab->main_cnt_cck[i]; + aux_cnt = fat_tab->aux_cnt_cck[i]; + main_rssi = (mian_cnt != 0) ? + (fat_tab->main_sum_cck[i] / mian_cnt) : 0; + aux_rssi = (aux_cnt != 0) ? + (fat_tab->aux_sum_cck[i] / aux_cnt) : 0; + target_ant = (main_rssi == aux_rssi) ? + fat_tab->rx_idle_ant : + ((main_rssi >= aux_rssi) ? + MAIN_ANT : AUX_ANT); + /*Use RSSI for CCK only case*/ + } + + PHYDM_DBG(dm, DBG_ANT_DIV, + "*** Client[ %d ] : Main_Cnt = (( %d )) , CCK_Main_Cnt = (( %d )) , main_rssi= (( %d ))\n", + i, fat_tab->main_cnt[i], + fat_tab->main_cnt_cck[i], main_rssi); + PHYDM_DBG(dm, DBG_ANT_DIV, + "*** Client[ %d ] : Aux_Cnt = (( %d )) , CCK_Aux_Cnt = (( %d )) , aux_rssi = (( %d ))\n", + i, fat_tab->aux_cnt[i], + fat_tab->aux_cnt_cck[i], aux_rssi); + + local_max_rssi = (main_rssi > aux_rssi) ? main_rssi : aux_rssi; + /* @ Select max_rssi for DIG */ + if (local_max_rssi > ant_div_max_rssi && local_max_rssi < 40) + ant_div_max_rssi = local_max_rssi; + if (local_max_rssi > max_rssi) + max_rssi = local_max_rssi; + + /* @ Select RX Idle Antenna */ + if (local_max_rssi != 0 && local_max_rssi < min_max_rssi) { + rx_idle_ant = target_ant; + min_max_rssi = local_max_rssi; + } + +#ifdef ODM_EVM_ENHANCE_ANTDIV + if (dm->antdiv_evm_en == 1) { + if (fat_tab->target_ant_enhance != 0xFF) { + target_ant = fat_tab->target_ant_enhance; + rx_idle_ant = fat_tab->target_ant_enhance; + } + } +#endif + + /* @2 Select TX Antenna */ + if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) { + #ifdef PHYDM_BEAMFORMING_SUPPORT + #if (DM_ODM_SUPPORT_TYPE == ODM_AP) + if (dm_bdc_table->w_bfee_client[i] == 0) + #endif + #endif + { + odm_update_tx_ant(dm, target_ant, i); + } + } + +/* @------------------------------------------------------------ */ + + #ifdef PHYDM_BEAMFORMING_SUPPORT + #if (DM_ODM_SUPPORT_TYPE == ODM_AP) + + dm_bdc_table->num_client++; + + if (dm_bdc_table->bdc_mode == BDC_MODE_2 || dm_bdc_table->bdc_mode == BDC_MODE_3) { + /* @2 Byte counter */ + + ma_rx_temp = sta->rx_moving_average_tp; /* RX TP ( bit /sec) */ + + if (dm_bdc_table->BDC_state == bdc_bfer_train_state) + dm_bdc_table->MA_rx_TP_DIV[i] = ma_rx_temp; + else + dm_bdc_table->MA_rx_TP[i] = ma_rx_temp; + + if (ma_rx_temp < TH2 && ma_rx_temp > TH1 && local_max_rssi <= monitor_rssi_threshold) { + if (dm_bdc_table->w_bfer_client[i] == 1) { /* @Bfer_Target */ + dm_bdc_table->num_bf_tar++; + + if (dm_bdc_table->BDC_state == BDC_DECISION_STATE && dm_bdc_table->bdc_try_flag == 0) { + improve_TP_temp = (dm_bdc_table->MA_rx_TP_DIV[i] * 9) >> 3; /* @* 1.125 */ + dm_bdc_table->BF_pass = (dm_bdc_table->MA_rx_TP[i] > improve_TP_temp) ? true : false; + PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : { MA_rx_TP,improve_TP_temp, MA_rx_TP_DIV, BF_pass}={ %d, %d, %d , %d }\n", i, dm_bdc_table->MA_rx_TP[i], improve_TP_temp, dm_bdc_table->MA_rx_TP_DIV[i], dm_bdc_table->BF_pass); + } + } else { /* @DIV_Target */ + dm_bdc_table->num_div_tar++; + + if (dm_bdc_table->BDC_state == BDC_DECISION_STATE && dm_bdc_table->bdc_try_flag == 0) { + degrade_TP_temp = (dm_bdc_table->MA_rx_TP_DIV[i] * 5) >> 3; /* @* 0.625 */ + dm_bdc_table->DIV_pass = (dm_bdc_table->MA_rx_TP[i] > degrade_TP_temp) ? true : false; + PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : { MA_rx_TP, degrade_TP_temp, MA_rx_TP_DIV, DIV_pass}=\n{ %d, %d, %d , %d }\n", i, dm_bdc_table->MA_rx_TP[i], degrade_TP_temp, dm_bdc_table->MA_rx_TP_DIV[i], dm_bdc_table->DIV_pass); + } + } + } + + if (ma_rx_temp > TH1) { + if (dm_bdc_table->w_bfer_client[i] == 1) /* @Bfer_Target */ + dm_bdc_table->is_all_bf_sta_idle = false; + else /* @DIV_Target */ + dm_bdc_table->is_all_div_sta_idle = false; + } + + PHYDM_DBG(dm, DBG_ANT_DIV, + "*** Client[ %d ] : { BFmeeCap, BFmerCap} = { %d , %d }\n", + i, dm_bdc_table->w_bfee_client[i], + dm_bdc_table->w_bfer_client[i]); + + if (dm_bdc_table->BDC_state == bdc_bfer_train_state) + PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : MA_rx_TP_DIV = (( %d ))\n", i, dm_bdc_table->MA_rx_TP_DIV[i]); + + else + PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : MA_rx_TP = (( %d ))\n", i, dm_bdc_table->MA_rx_TP[i]); + } + #endif + #endif + + #ifdef PHYDM_BEAMFORMING_SUPPORT + #if (DM_ODM_SUPPORT_TYPE == ODM_AP) if (dm_bdc_table->bdc_try_flag == 0) -#endif -#endif + #endif + #endif { phydm_antdiv_reset_statistic(dm, i); } } - - - /* 2 Set RX Idle Antenna & TX Antenna(Because of HW Bug ) */ +/* @2 Set RX Idle Antenna & TX Antenna(Because of HW Bug ) */ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) - PHYDM_DBG(dm, DBG_ANT_DIV, "*** rx_idle_ant = (( %s ))\n", (rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); + PHYDM_DBG(dm, DBG_ANT_DIV, "*** rx_idle_ant = (( %s ))\n", + (rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT #if (DM_ODM_SUPPORT_TYPE == ODM_AP) if (dm_bdc_table->bdc_mode == BDC_MODE_1 || dm_bdc_table->bdc_mode == BDC_MODE_3) { - PHYDM_DBG(dm, DBG_ANT_DIV, "*** bdc_rx_idle_update_counter = (( %d ))\n", dm_bdc_table->bdc_rx_idle_update_counter); + PHYDM_DBG(dm, DBG_ANT_DIV, + "*** bdc_rx_idle_update_counter = (( %d ))\n", + dm_bdc_table->bdc_rx_idle_update_counter); if (dm_bdc_table->bdc_rx_idle_update_counter == 1) { - PHYDM_DBG(dm, DBG_ANT_DIV, "***Update RxIdle Antenna!!!\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "***Update RxIdle Antenna!!!\n"); dm_bdc_table->bdc_rx_idle_update_counter = 30; odm_update_rx_idle_ant(dm, rx_idle_ant); } else { dm_bdc_table->bdc_rx_idle_update_counter--; - PHYDM_DBG(dm, DBG_ANT_DIV, "***NOT update RxIdle Antenna because of BF ( need to fix TX-ant)\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "***NOT update RxIdle Antenna because of BF ( need to fix TX-ant)\n"); } } else #endif @@ -2469,12 +3245,10 @@ odm_hw_ant_div( odm_update_rx_idle_ant(dm, rx_idle_ant); -#endif/* #if(DM_ODM_SUPPORT_TYPE == ODM_AP) */ +#endif /* @#if(DM_ODM_SUPPORT_TYPE == ODM_AP) */ - - - /* 2 BDC Main Algorithm */ -#if (BEAMFORMING_SUPPORT == 1) +/* @2 BDC Main Algorithm */ +#ifdef PHYDM_BEAMFORMING_SUPPORT #if (DM_ODM_SUPPORT_TYPE == ODM_AP) if (dm->antdiv_evm_en == 0 || fat_tab->evm_method_enable == 0) odm_bd_ccoex_bfee_rx_div_arbitration(dm); @@ -2492,55 +3266,371 @@ odm_hw_ant_div( PHYDM_DBG(dm, DBG_ANT_DIV, "***AntDiv End***\n\n"); } - - #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -void -odm_s0s1_sw_ant_div_reset( - void *dm_void -) +void odm_s0s1_sw_ant_div_reset(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - fat_tab->is_become_linked = false; - dm_swat_table->try_flag = SWAW_STEP_INIT; - dm_swat_table->double_chk_flag = 0; + fat_tab->is_become_linked = false; + swat_tab->try_flag = SWAW_STEP_INIT; + swat_tab->double_chk_flag = 0; - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_s0s1_sw_ant_div_reset(): fat_tab->is_become_linked = %d\n", fat_tab->is_become_linked); + PHYDM_DBG(dm, DBG_ANT_DIV, "%s: fat_tab->is_become_linked = %d\n", + __func__, fat_tab->is_become_linked); } -void -odm_s0s1_sw_ant_div( - void *dm_void, - u8 step -) +void phydm_sw_antdiv_train_time(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - u32 i, min_max_rssi = 0xFF, local_max_rssi, local_min_rssi; - u32 main_rssi, aux_rssi; - u8 high_traffic_train_time_u = 0x32, high_traffic_train_time_l = 0, train_time_temp; - u8 low_traffic_train_time_u = 200, low_traffic_train_time_l = 0; - u8 rx_idle_ant = dm_swat_table->pre_antenna, target_ant, next_ant = 0; - struct cmn_sta_info *entry = NULL; - u32 value32; - u32 main_ant_sum = 0; - u32 aux_ant_sum = 0; - u32 main_ant_cnt = 0; - u32 aux_ant_cnt = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; + u8 high_traffic_train_time_u = 0x32, high_traffic_train_time_l = 0; + u8 low_traffic_train_time_u = 200, low_traffic_train_time_l = 0; + u8 train_time_temp; + if (dm->traffic_load == TRAFFIC_HIGH) { + train_time_temp = swat_tab->train_time; - if (!dm->is_linked) { /* is_linked==False */ + if (swat_tab->train_time_flag == 3) { + high_traffic_train_time_l = 0xa; + + if (train_time_temp <= 16) + train_time_temp = high_traffic_train_time_l; + else + train_time_temp -= 16; + + } else if (swat_tab->train_time_flag == 2) { + train_time_temp -= 8; + high_traffic_train_time_l = 0xf; + } else if (swat_tab->train_time_flag == 1) { + train_time_temp -= 4; + high_traffic_train_time_l = 0x1e; + } else if (swat_tab->train_time_flag == 0) { + train_time_temp += 8; + high_traffic_train_time_l = 0x28; + } + + if (dm->support_ic_type == ODM_RTL8188F) { + if (dm->support_interface == ODM_ITRF_SDIO) + high_traffic_train_time_l += 0xa; + } + + /* @-- */ + if (train_time_temp > high_traffic_train_time_u) + train_time_temp = high_traffic_train_time_u; + + else if (train_time_temp < high_traffic_train_time_l) + train_time_temp = high_traffic_train_time_l; + + swat_tab->train_time = train_time_temp; /*@10ms~200ms*/ + + PHYDM_DBG(dm, DBG_ANT_DIV, + "train_time_flag=((%d)), train_time=((%d))\n", + swat_tab->train_time_flag, + swat_tab->train_time); + + } else if ((dm->traffic_load == TRAFFIC_MID) || + (dm->traffic_load == TRAFFIC_LOW)) { + train_time_temp = swat_tab->train_time; + + if (swat_tab->train_time_flag == 3) { + low_traffic_train_time_l = 10; + if (train_time_temp < 50) + train_time_temp = low_traffic_train_time_l; + else + train_time_temp -= 50; + } else if (swat_tab->train_time_flag == 2) { + train_time_temp -= 30; + low_traffic_train_time_l = 36; + } else if (swat_tab->train_time_flag == 1) { + train_time_temp -= 10; + low_traffic_train_time_l = 40; + } else { + train_time_temp += 10; + low_traffic_train_time_l = 50; + } + + if (dm->support_ic_type == ODM_RTL8188F) { + if (dm->support_interface == ODM_ITRF_SDIO) + low_traffic_train_time_l += 10; + } + + /* @-- */ + if (train_time_temp >= low_traffic_train_time_u) + train_time_temp = low_traffic_train_time_u; + + else if (train_time_temp <= low_traffic_train_time_l) + train_time_temp = low_traffic_train_time_l; + + swat_tab->train_time = train_time_temp; /*@10ms~200ms*/ + + PHYDM_DBG(dm, DBG_ANT_DIV, + "train_time_flag=((%d)) , train_time=((%d))\n", + swat_tab->train_time_flag, swat_tab->train_time); + + } else { + swat_tab->train_time = 0xc8; /*@200ms*/ + } +} + +void phydm_sw_antdiv_decision(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u32 i, min_max_rssi = 0xFF, local_max_rssi, local_min_rssi; + u32 main_rssi, aux_rssi; + u8 rx_idle_ant = swat_tab->pre_ant; + u8 target_ant = swat_tab->pre_ant, next_ant = 0; + struct cmn_sta_info *entry = NULL; + u32 main_cnt = 0, aux_cnt = 0, main_sum = 0, aux_sum = 0; + u32 main_ctrl_cnt = 0, aux_ctrl_cnt = 0; + boolean is_by_ctrl_frame = false; + boolean cond_23d_main, cond_23d_aux; + u64 pkt_cnt_total = 0; + + for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { + entry = dm->phydm_sta_info[i]; + if (!is_sta_active(entry)) { + phydm_antdiv_reset_statistic(dm, i); + continue; + } + + /* @2 Caculate RSSI per Antenna */ + if (fat_tab->main_cnt[i] != 0 || fat_tab->aux_cnt[i] != 0) { + main_cnt = (u32)fat_tab->main_cnt[i]; + aux_cnt = (u32)fat_tab->aux_cnt[i]; + main_rssi = (main_cnt != 0) ? + (fat_tab->main_sum[i] / main_cnt) : 0; + aux_rssi = (aux_cnt != 0) ? + (fat_tab->aux_sum[i] / aux_cnt) : 0; + if (dm->support_ic_type == ODM_RTL8723D) { + cond_23d_main = (aux_cnt > main_cnt) && + ((main_rssi - aux_rssi < 5) || + (aux_rssi > main_rssi)); + cond_23d_aux = (main_cnt > aux_cnt) && + ((aux_rssi - main_rssi < 5) || + (main_rssi > aux_rssi)); + if (swat_tab->pre_ant == MAIN_ANT) { + if (main_cnt == 0) + target_ant = (aux_cnt != 0) ? + AUX_ANT : + swat_tab->pre_ant; + else + target_ant = cond_23d_main ? + AUX_ANT : + swat_tab->pre_ant; + } else { + if (aux_cnt == 0) + target_ant = (main_cnt != 0) ? + MAIN_ANT : + swat_tab->pre_ant; + else + target_ant = cond_23d_aux ? + MAIN_ANT : + swat_tab->pre_ant; + } + } else { + if (swat_tab->pre_ant == MAIN_ANT) { + target_ant = (aux_rssi > main_rssi) ? + AUX_ANT : + swat_tab->pre_ant; + } else if (swat_tab->pre_ant == AUX_ANT) { + target_ant = (main_rssi > aux_rssi) ? + MAIN_ANT : + swat_tab->pre_ant; + } + } + } else { /*@CCK only case*/ + main_cnt = fat_tab->main_cnt_cck[i]; + aux_cnt = fat_tab->aux_cnt_cck[i]; + main_rssi = (main_cnt != 0) ? + (fat_tab->main_sum_cck[i] / main_cnt) : 0; + aux_rssi = (aux_cnt != 0) ? + (fat_tab->aux_sum_cck[i] / aux_cnt) : 0; + target_ant = (main_rssi == aux_rssi) ? + swat_tab->pre_ant : + ((main_rssi >= aux_rssi) ? + MAIN_ANT : AUX_ANT); + /*Use RSSI for CCK only case*/ + } + local_max_rssi = (main_rssi >= aux_rssi) ? main_rssi : aux_rssi; + local_min_rssi = (main_rssi >= aux_rssi) ? aux_rssi : main_rssi; + + PHYDM_DBG(dm, DBG_ANT_DIV, + "*** CCK_counter_main = (( %d )) , CCK_counter_aux= (( %d ))\n", + fat_tab->main_cnt_cck[i], fat_tab->aux_cnt_cck[i]); + PHYDM_DBG(dm, DBG_ANT_DIV, + "*** OFDM_counter_main = (( %d )) , OFDM_counter_aux= (( %d ))\n", + fat_tab->main_cnt[i], fat_tab->aux_cnt[i]); + PHYDM_DBG(dm, DBG_ANT_DIV, + "*** main_Cnt = (( %d )) , aux_Cnt = (( %d ))\n", + main_cnt, aux_cnt); + PHYDM_DBG(dm, DBG_ANT_DIV, + "*** main_rssi= (( %d )) , aux_rssi = (( %d ))\n", + main_rssi, aux_rssi); + PHYDM_DBG(dm, DBG_ANT_DIV, + "*** MAC ID:[ %d ] , target_ant = (( %s ))\n", i, + (target_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); + + /* @2 Select RX Idle Antenna */ + + if (local_max_rssi != 0 && local_max_rssi < min_max_rssi) { + rx_idle_ant = target_ant; + min_max_rssi = local_max_rssi; + PHYDM_DBG(dm, DBG_ANT_DIV, + "*** local_max_rssi-local_min_rssi = ((%d))\n", + (local_max_rssi - local_min_rssi)); + + if ((local_max_rssi - local_min_rssi) > 8) { + if (local_min_rssi != 0) { + swat_tab->train_time_flag = 3; + } else { + if (min_max_rssi > RSSI_CHECK_THRESHOLD) + swat_tab->train_time_flag = 0; + else + swat_tab->train_time_flag = 3; + } + } else if ((local_max_rssi - local_min_rssi) > 5) { + swat_tab->train_time_flag = 2; + } else if ((local_max_rssi - local_min_rssi) > 2) { + swat_tab->train_time_flag = 1; + } else { + swat_tab->train_time_flag = 0; + } + } + + /* @2 Select TX Antenna */ + if (target_ant == MAIN_ANT) + fat_tab->antsel_a[i] = ANT1_2G; + else + fat_tab->antsel_a[i] = ANT2_2G; + + phydm_antdiv_reset_statistic(dm, i); + pkt_cnt_total += (main_cnt + aux_cnt); + } + + if (swat_tab->is_sw_ant_div_by_ctrl_frame) { + odm_s0s1_sw_ant_div_by_ctrl_frame(dm, SWAW_STEP_DETERMINE); + is_by_ctrl_frame = true; + } + + PHYDM_DBG(dm, DBG_ANT_DIV, + "Control frame packet counter = %d, data frame packet counter = %llu\n", + swat_tab->pkt_cnt_sw_ant_div_by_ctrl_frame, pkt_cnt_total); + + if (min_max_rssi == 0xff || ((pkt_cnt_total < + (swat_tab->pkt_cnt_sw_ant_div_by_ctrl_frame >> 1)) && + dm->phy_dbg_info.num_qry_beacon_pkt < 2)) { + min_max_rssi = 0; + PHYDM_DBG(dm, DBG_ANT_DIV, + "Check RSSI of control frame because min_max_rssi == 0xff\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "is_by_ctrl_frame = %d\n", + is_by_ctrl_frame); + + if (is_by_ctrl_frame) { + main_ctrl_cnt = fat_tab->main_ctrl_cnt; + aux_ctrl_cnt = fat_tab->aux_ctrl_cnt; + main_rssi = (main_ctrl_cnt != 0) ? + (fat_tab->main_ctrl_sum / main_ctrl_cnt) : + 0; + aux_rssi = (aux_ctrl_cnt != 0) ? + (fat_tab->aux_ctrl_sum / aux_ctrl_cnt) : 0; + + if (main_ctrl_cnt <= 1 && + fat_tab->cck_ctrl_frame_cnt_main >= 1) + main_rssi = 0; + + if (aux_ctrl_cnt <= 1 && + fat_tab->cck_ctrl_frame_cnt_aux >= 1) + aux_rssi = 0; + + if (main_rssi != 0 || aux_rssi != 0) { + rx_idle_ant = (main_rssi == aux_rssi) ? + swat_tab->pre_ant : + ((main_rssi >= aux_rssi) ? + MAIN_ANT : AUX_ANT); + local_max_rssi = (main_rssi >= aux_rssi) ? + main_rssi : aux_rssi; + local_min_rssi = (main_rssi >= aux_rssi) ? + aux_rssi : main_rssi; + + if ((local_max_rssi - local_min_rssi) > 8) + swat_tab->train_time_flag = 3; + else if ((local_max_rssi - local_min_rssi) > 5) + swat_tab->train_time_flag = 2; + else if ((local_max_rssi - local_min_rssi) > 2) + swat_tab->train_time_flag = 1; + else + swat_tab->train_time_flag = 0; + + PHYDM_DBG(dm, DBG_ANT_DIV, + "Control frame: main_rssi = %d, aux_rssi = %d\n", + main_rssi, aux_rssi); + PHYDM_DBG(dm, DBG_ANT_DIV, + "rx_idle_ant decided by control frame = %s\n", + (rx_idle_ant == MAIN_ANT ? + "MAIN" : "AUX")); + } + } + } + + fat_tab->min_max_rssi = min_max_rssi; + swat_tab->try_flag = SWAW_STEP_PEEK; + + if (swat_tab->double_chk_flag == 1) { + swat_tab->double_chk_flag = 0; + + if (fat_tab->min_max_rssi > RSSI_CHECK_THRESHOLD) { + PHYDM_DBG(dm, DBG_ANT_DIV, + " [Double check] min_max_rssi ((%d)) > %d again!!\n", + fat_tab->min_max_rssi, RSSI_CHECK_THRESHOLD); + + odm_update_rx_idle_ant(dm, rx_idle_ant); + + PHYDM_DBG(dm, DBG_ANT_DIV, + "[reset try_flag = 0] Training accomplished !!!]\n\n\n"); + } else { + PHYDM_DBG(dm, DBG_ANT_DIV, + " [Double check] min_max_rssi ((%d)) <= %d !!\n", + fat_tab->min_max_rssi, RSSI_CHECK_THRESHOLD); + + next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? + AUX_ANT : MAIN_ANT; + swat_tab->try_flag = SWAW_STEP_PEEK; + swat_tab->reset_idx = RSSI_CHECK_RESET_PERIOD; + PHYDM_DBG(dm, DBG_ANT_DIV, + "[set try_flag=0] Normal state: Need to tryg again!!\n\n\n"); + } + } else { + if (fat_tab->min_max_rssi < RSSI_CHECK_THRESHOLD) + swat_tab->reset_idx = RSSI_CHECK_RESET_PERIOD; + + swat_tab->pre_ant = rx_idle_ant; + odm_update_rx_idle_ant(dm, rx_idle_ant); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[reset try_flag = 0] Training accomplished !!!]\n\n\n"); + } +} + +void odm_s0s1_sw_ant_div(void *dm_void, u8 step) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u32 value32; + u8 next_ant = 0; + + if (!dm->is_linked) { /* @is_linked==False */ PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n"); if (fat_tab->is_become_linked == true) { odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); if (dm->support_ic_type == ODM_RTL8723B) { - PHYDM_DBG(dm, DBG_ANT_DIV, "Set REG 948[9:6]=0x0\n"); - odm_set_bb_reg(dm, 0x948, (BIT(9) | BIT(8) | BIT(7) | BIT(6)), 0x0); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Set REG 948[9:6]=0x0\n"); + odm_set_bb_reg(dm, R_0x948, 0x3c0, 0x0); } fat_tab->is_become_linked = dm->is_linked; } @@ -2550,522 +3640,332 @@ odm_s0s1_sw_ant_div( PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n"); if (dm->support_ic_type == ODM_RTL8723B) { - value32 = odm_get_bb_reg(dm, 0x864, BIT(5) | BIT(4) | BIT(3)); + value32 = odm_get_bb_reg(dm, R_0x864, 0x38); #if (RTL8723B_SUPPORT == 1) if (value32 == 0x0) - odm_update_rx_idle_ant_8723b(dm, MAIN_ANT, ANT1_2G, ANT2_2G); + odm_update_rx_idle_ant_8723b(dm, + MAIN_ANT, + ANT1_2G, + ANT2_2G); else if (value32 == 0x1) - odm_update_rx_idle_ant_8723b(dm, AUX_ANT, ANT2_2G, ANT1_2G); + odm_update_rx_idle_ant_8723b(dm, + AUX_ANT, + ANT2_2G, + ANT1_2G); #endif - PHYDM_DBG(dm, DBG_ANT_DIV, "8723B: First link! Force antenna to %s\n", (value32 == 0x0 ? "MAIN" : "AUX")); + PHYDM_DBG(dm, DBG_ANT_DIV, + "8723B: First link! Force antenna to %s\n", + (value32 == 0x0 ? "MAIN" : "AUX")); + } + + if (dm->support_ic_type == ODM_RTL8723D) { + value32 = odm_get_bb_reg(dm, R_0x864, 0x38); +#if (RTL8723D_SUPPORT == 1) + if (value32 == 0x0) + odm_update_rx_idle_ant_8723d(dm, + MAIN_ANT, + ANT1_2G, + ANT2_2G); + else if (value32 == 0x1) + odm_update_rx_idle_ant_8723d(dm, + AUX_ANT, + ANT2_2G, + ANT1_2G); + PHYDM_DBG(dm, DBG_ANT_DIV, + "8723D: First link! Force antenna to %s\n", + (value32 == 0x0 ? "MAIN" : "AUX")); +#endif } fat_tab->is_become_linked = dm->is_linked; } } - if (*fat_tab->p_force_tx_ant_by_desc == false) { + if (!(*fat_tab->p_force_tx_by_desc)) { if (dm->is_one_entry_only == true) odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); else odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); } - PHYDM_DBG(dm, DBG_ANT_DIV, "[%d] { try_flag=(( %d )), step=(( %d )), double_chk_flag = (( %d )) }\n", - __LINE__, dm_swat_table->try_flag, step, dm_swat_table->double_chk_flag); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[%d] { try_flag=(( %d )), step=(( %d )), double_chk_flag = (( %d )) }\n", + __LINE__, swat_tab->try_flag, step, + swat_tab->double_chk_flag); - /* Handling step mismatch condition. */ - /* Peak step is not finished at last time. Recover the variable and check again. */ - if (step != dm_swat_table->try_flag) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[step != try_flag] Need to Reset After Link\n"); + /* @ Handling step mismatch condition. */ + /* @ Peak step is not finished at last time. */ + /* @ Recover the variable and check again. */ + if (step != swat_tab->try_flag) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[step != try_flag] Need to Reset After Link\n"); odm_sw_ant_div_rest_after_link(dm); } - if (dm_swat_table->try_flag == SWAW_STEP_INIT) { - dm_swat_table->try_flag = SWAW_STEP_PEEK; - dm_swat_table->train_time_flag = 0; - PHYDM_DBG(dm, DBG_ANT_DIV, "[set try_flag = 0] Prepare for peek!\n\n"); + if (swat_tab->try_flag == SWAW_STEP_INIT) { + swat_tab->try_flag = SWAW_STEP_PEEK; + swat_tab->train_time_flag = 0; + PHYDM_DBG(dm, DBG_ANT_DIV, + "[set try_flag = 0] Prepare for peek!\n\n"); return; } else { - /* 1 Normal state (Begin Trying) */ - if (dm_swat_table->try_flag == SWAW_STEP_PEEK) { - PHYDM_DBG(dm, DBG_ANT_DIV, "TxOkCnt=(( %llu )), RxOkCnt=(( %llu )), traffic_load = (%d))\n", dm->cur_tx_ok_cnt, dm->cur_rx_ok_cnt, dm->traffic_load); + /* @1 Normal state (Begin Trying) */ + if (swat_tab->try_flag == SWAW_STEP_PEEK) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "TxOkCnt=(( %llu )), RxOkCnt=(( %llu )), traffic_load = (%d))\n", + dm->cur_tx_ok_cnt, dm->cur_rx_ok_cnt, + dm->traffic_load); + phydm_sw_antdiv_train_time(dm); - if (dm->traffic_load == TRAFFIC_HIGH) { - train_time_temp = dm_swat_table->train_time ; + PHYDM_DBG(dm, DBG_ANT_DIV, + "Current min_max_rssi is ((%d))\n", + fat_tab->min_max_rssi); - if (dm_swat_table->train_time_flag == 3) { - high_traffic_train_time_l = 0xa; - - if (train_time_temp <= 16) - train_time_temp = high_traffic_train_time_l; - else - train_time_temp -= 16; - - } else if (dm_swat_table->train_time_flag == 2) { - train_time_temp -= 8; - high_traffic_train_time_l = 0xf; - } else if (dm_swat_table->train_time_flag == 1) { - train_time_temp -= 4; - high_traffic_train_time_l = 0x1e; - } else if (dm_swat_table->train_time_flag == 0) { - train_time_temp += 8; - high_traffic_train_time_l = 0x28; - } - - if (dm->support_ic_type == ODM_RTL8188F) { - if (dm->support_interface == ODM_ITRF_SDIO) - high_traffic_train_time_l += 0xa; - } - - /* PHYDM_DBG(dm,DBG_ANT_DIV, "*** train_time_temp = ((%d))\n",train_time_temp); */ - - /* -- */ - if (train_time_temp > high_traffic_train_time_u) - train_time_temp = high_traffic_train_time_u; - - else if (train_time_temp < high_traffic_train_time_l) - train_time_temp = high_traffic_train_time_l; - - dm_swat_table->train_time = train_time_temp; /*10ms~200ms*/ - - PHYDM_DBG(dm, DBG_ANT_DIV, "train_time_flag=((%d)), train_time=((%d))\n", dm_swat_table->train_time_flag, dm_swat_table->train_time); - - } else if ((dm->traffic_load == TRAFFIC_MID) || (dm->traffic_load == TRAFFIC_LOW)) { - train_time_temp = dm_swat_table->train_time ; - - if (dm_swat_table->train_time_flag == 3) { - low_traffic_train_time_l = 10; - if (train_time_temp < 50) - train_time_temp = low_traffic_train_time_l; - else - train_time_temp -= 50; - } else if (dm_swat_table->train_time_flag == 2) { - train_time_temp -= 30; - low_traffic_train_time_l = 36; - } else if (dm_swat_table->train_time_flag == 1) { - train_time_temp -= 10; - low_traffic_train_time_l = 40; - } else { - train_time_temp += 10; - low_traffic_train_time_l = 50; - } - - if (dm->support_ic_type == ODM_RTL8188F) { - if (dm->support_interface == ODM_ITRF_SDIO) - low_traffic_train_time_l += 10; - } - - /* -- */ - if (train_time_temp >= low_traffic_train_time_u) - train_time_temp = low_traffic_train_time_u; - - else if (train_time_temp <= low_traffic_train_time_l) - train_time_temp = low_traffic_train_time_l; - - dm_swat_table->train_time = train_time_temp; /*10ms~200ms*/ - - PHYDM_DBG(dm, DBG_ANT_DIV, "train_time_flag=((%d)) , train_time=((%d))\n", dm_swat_table->train_time_flag, dm_swat_table->train_time); - - } else { - dm_swat_table->train_time = 0xc8; /*200ms*/ - - } - - /* ----------------- */ - - PHYDM_DBG(dm, DBG_ANT_DIV, "Current min_max_rssi is ((%d))\n", fat_tab->min_max_rssi); - - /* ---reset index--- */ - if (dm_swat_table->reset_idx >= RSSI_CHECK_RESET_PERIOD) { + /* @---reset index--- */ + if (swat_tab->reset_idx >= RSSI_CHECK_RESET_PERIOD) { fat_tab->min_max_rssi = 0; - dm_swat_table->reset_idx = 0; + swat_tab->reset_idx = 0; } - PHYDM_DBG(dm, DBG_ANT_DIV, "reset_idx = (( %d ))\n", dm_swat_table->reset_idx); + PHYDM_DBG(dm, DBG_ANT_DIV, "reset_idx = (( %d ))\n", + swat_tab->reset_idx); - dm_swat_table->reset_idx++; + swat_tab->reset_idx++; - /* ---double check flag--- */ - if ((fat_tab->min_max_rssi > RSSI_CHECK_THRESHOLD) && (dm_swat_table->double_chk_flag == 0)) { - PHYDM_DBG(dm, DBG_ANT_DIV, " min_max_rssi is ((%d)), and > %d\n", - fat_tab->min_max_rssi, RSSI_CHECK_THRESHOLD); + /* @---double check flag--- */ + if (fat_tab->min_max_rssi > RSSI_CHECK_THRESHOLD && + swat_tab->double_chk_flag == 0) { + PHYDM_DBG(dm, DBG_ANT_DIV, + " min_max_rssi is ((%d)), and > %d\n", + fat_tab->min_max_rssi, + RSSI_CHECK_THRESHOLD); - dm_swat_table->double_chk_flag = 1; - dm_swat_table->try_flag = SWAW_STEP_DETERMINE; - dm_swat_table->rssi_trying = 0; + swat_tab->double_chk_flag = 1; + swat_tab->try_flag = SWAW_STEP_DETERMINE; + swat_tab->rssi_trying = 0; - PHYDM_DBG(dm, DBG_ANT_DIV, "Test the current ant for (( %d )) ms again\n", dm_swat_table->train_time); - odm_update_rx_idle_ant(dm, fat_tab->rx_idle_ant); - odm_set_timer(dm, - &dm_swat_table->phydm_sw_antenna_switch_timer, - dm_swat_table->train_time); /*ms*/ + PHYDM_DBG(dm, DBG_ANT_DIV, + "Test the current ant for (( %d )) ms again\n", + swat_tab->train_time); + odm_update_rx_idle_ant(dm, + fat_tab->rx_idle_ant); + odm_set_timer(dm, &swat_tab->sw_antdiv_timer, + swat_tab->train_time); /*@ms*/ return; } - next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT; + next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? + AUX_ANT : MAIN_ANT; - dm_swat_table->try_flag = SWAW_STEP_DETERMINE; + swat_tab->try_flag = SWAW_STEP_DETERMINE; - if (dm_swat_table->reset_idx <= 1) - dm_swat_table->rssi_trying = 2; + if (swat_tab->reset_idx <= 1) + swat_tab->rssi_trying = 2; else - dm_swat_table->rssi_trying = 1; + swat_tab->rssi_trying = 1; odm_s0s1_sw_ant_div_by_ctrl_frame(dm, SWAW_STEP_PEEK); - PHYDM_DBG(dm, DBG_ANT_DIV, "[set try_flag=1] Normal state: Begin Trying!!\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[set try_flag=1] Normal state: Begin Trying!!\n"); - } else if ((dm_swat_table->try_flag == SWAW_STEP_DETERMINE) && (dm_swat_table->double_chk_flag == 0)) { - next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT; - dm_swat_table->rssi_trying--; + } else if ((swat_tab->try_flag == SWAW_STEP_DETERMINE) && + (swat_tab->double_chk_flag == 0)) { + next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? + AUX_ANT : MAIN_ANT; + swat_tab->rssi_trying--; } - /* 1 Decision state */ - if ((dm_swat_table->try_flag == SWAW_STEP_DETERMINE) && (dm_swat_table->rssi_trying == 0)) { - boolean is_by_ctrl_frame = false; - u64 pkt_cnt_total = 0; - - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - entry = dm->phydm_sta_info[i]; - if (is_sta_active(entry)) { - /* 2 Caculate RSSI per Antenna */ - #if 0 - main_ant_sum = (u32)fat_tab->main_ant_sum[i] + (u32)fat_tab->main_ant_sum_cck[i]; - aux_ant_sum = (u32)fat_tab->aux_ant_sum[i] + (u32)fat_tab->aux_ant_sum_cck[i]; - main_ant_cnt = (u32)fat_tab->main_ant_cnt[i] + (u32)fat_tab->main_ant_cnt_cck[i]; - aux_ant_cnt = (u32)fat_tab->aux_ant_cnt[i] + (u32)fat_tab->aux_ant_cnt_cck[i]; - - main_rssi = (main_ant_cnt != 0) ? (main_ant_sum / main_ant_cnt) : 0; - aux_rssi = (aux_ant_cnt != 0) ? (aux_ant_sum / aux_ant_cnt) : 0; - - if (fat_tab->main_ant_cnt[i] <= 1 && fat_tab->main_ant_cnt_cck[i] >= 1) - main_rssi = 0; - - if (fat_tab->aux_ant_cnt[i] <= 1 && fat_tab->aux_ant_cnt_cck[i] >= 1) - aux_rssi = 0; - #endif - if ((fat_tab->main_ant_cnt[i] != 0) || (fat_tab->aux_ant_cnt[i] != 0)) { - main_ant_cnt = (u32)fat_tab->main_ant_cnt[i]; - aux_ant_cnt = (u32)fat_tab->aux_ant_cnt[i]; - main_rssi = (main_ant_cnt != 0) ? (fat_tab->main_ant_sum[i] / main_ant_cnt) : 0; - aux_rssi = (aux_ant_cnt != 0) ? (fat_tab->aux_ant_sum[i] / aux_ant_cnt) : 0; - if (dm_swat_table->pre_antenna == MAIN_ANT) { - target_ant = ((aux_ant_cnt > main_ant_cnt) && (aux_rssi >= main_rssi)) ? AUX_ANT : dm_swat_table->pre_antenna; - } else { - target_ant = ((main_ant_cnt > aux_ant_cnt) && (main_rssi >= aux_rssi)) ? MAIN_ANT : dm_swat_table->pre_antenna; - } - - } else { /*CCK only case*/ - main_ant_cnt = fat_tab->main_ant_cnt_cck[i]; - aux_ant_cnt = fat_tab->aux_ant_cnt_cck[i]; - main_rssi = (main_ant_cnt != 0) ? (fat_tab->main_ant_sum_cck[i] / main_ant_cnt) : 0; - aux_rssi = (aux_ant_cnt != 0) ? (fat_tab->aux_ant_sum_cck[i] / aux_ant_cnt) : 0; - target_ant = (main_rssi == aux_rssi) ? fat_tab->rx_idle_ant : ((main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT); /*Use RSSI for CCK only case*/ - } - #if 0 - target_ant = (main_rssi == aux_rssi) ? dm_swat_table->pre_antenna : ((main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT); - #endif - local_max_rssi = (main_rssi >= aux_rssi) ? main_rssi : aux_rssi; - local_min_rssi = (main_rssi >= aux_rssi) ? aux_rssi : main_rssi; - - PHYDM_DBG(dm, DBG_ANT_DIV, "*** CCK_counter_main = (( %d )) , CCK_counter_aux= (( %d ))\n", fat_tab->main_ant_cnt_cck[i], fat_tab->aux_ant_cnt_cck[i]); - PHYDM_DBG(dm, DBG_ANT_DIV, "*** OFDM_counter_main = (( %d )) , OFDM_counter_aux= (( %d ))\n", fat_tab->main_ant_cnt[i], fat_tab->aux_ant_cnt[i]); - PHYDM_DBG(dm, DBG_ANT_DIV, "*** Main_Cnt = (( %d )) , main_rssi= (( %d ))\n", main_ant_cnt, main_rssi); - PHYDM_DBG(dm, DBG_ANT_DIV, "*** Aux_Cnt = (( %d )) , aux_rssi = (( %d ))\n", aux_ant_cnt, aux_rssi); - PHYDM_DBG(dm, DBG_ANT_DIV, "*** MAC ID:[ %d ] , target_ant = (( %s ))\n", i, (target_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); - - /* 2 Select RX Idle Antenna */ - - if (local_max_rssi != 0 && local_max_rssi < min_max_rssi) { - rx_idle_ant = target_ant; - min_max_rssi = local_max_rssi; - PHYDM_DBG(dm, DBG_ANT_DIV, "*** local_max_rssi-local_min_rssi = ((%d))\n", (local_max_rssi - local_min_rssi)); - - if ((local_max_rssi - local_min_rssi) > 8) { - if (local_min_rssi != 0) - dm_swat_table->train_time_flag = 3; - else { - if (min_max_rssi > RSSI_CHECK_THRESHOLD) - dm_swat_table->train_time_flag = 0; - else - dm_swat_table->train_time_flag = 3; - } - } else if ((local_max_rssi - local_min_rssi) > 5) - dm_swat_table->train_time_flag = 2; - else if ((local_max_rssi - local_min_rssi) > 2) - dm_swat_table->train_time_flag = 1; - else - dm_swat_table->train_time_flag = 0; - - } - - /* 2 Select TX Antenna */ - if (target_ant == MAIN_ANT) - fat_tab->antsel_a[i] = ANT1_2G; - else - fat_tab->antsel_a[i] = ANT2_2G; - - } - phydm_antdiv_reset_statistic(dm, i); - pkt_cnt_total += (main_ant_cnt + aux_ant_cnt); - } - - if (dm_swat_table->is_sw_ant_div_by_ctrl_frame) { - odm_s0s1_sw_ant_div_by_ctrl_frame(dm, SWAW_STEP_DETERMINE); - is_by_ctrl_frame = true; - } - - PHYDM_DBG(dm, DBG_ANT_DIV, "Control frame packet counter = %d, data frame packet counter = %llu\n", - dm_swat_table->pkt_cnt_sw_ant_div_by_ctrl_frame, pkt_cnt_total); - - if (min_max_rssi == 0xff || ((pkt_cnt_total < (dm_swat_table->pkt_cnt_sw_ant_div_by_ctrl_frame >> 1)) && dm->phy_dbg_info.num_qry_beacon_pkt < 2)) { - min_max_rssi = 0; - PHYDM_DBG(dm, DBG_ANT_DIV, "Check RSSI of control frame because min_max_rssi == 0xff\n"); - PHYDM_DBG(dm, DBG_ANT_DIV, "is_by_ctrl_frame = %d\n", is_by_ctrl_frame); - - if (is_by_ctrl_frame) { - main_rssi = (fat_tab->main_ant_ctrl_frame_cnt != 0) ? (fat_tab->main_ant_ctrl_frame_sum / fat_tab->main_ant_ctrl_frame_cnt) : 0; - aux_rssi = (fat_tab->aux_ant_ctrl_frame_cnt != 0) ? (fat_tab->aux_ant_ctrl_frame_sum / fat_tab->aux_ant_ctrl_frame_cnt) : 0; - - if (fat_tab->main_ant_ctrl_frame_cnt <= 1 && fat_tab->cck_ctrl_frame_cnt_main >= 1) - main_rssi = 0; - - if (fat_tab->aux_ant_ctrl_frame_cnt <= 1 && fat_tab->cck_ctrl_frame_cnt_aux >= 1) - aux_rssi = 0; - - if (main_rssi != 0 || aux_rssi != 0) { - rx_idle_ant = (main_rssi == aux_rssi) ? dm_swat_table->pre_antenna : ((main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT); - local_max_rssi = (main_rssi >= aux_rssi) ? main_rssi : aux_rssi; - local_min_rssi = (main_rssi >= aux_rssi) ? aux_rssi : main_rssi; - - if ((local_max_rssi - local_min_rssi) > 8) - dm_swat_table->train_time_flag = 3; - else if ((local_max_rssi - local_min_rssi) > 5) - dm_swat_table->train_time_flag = 2; - else if ((local_max_rssi - local_min_rssi) > 2) - dm_swat_table->train_time_flag = 1; - else - dm_swat_table->train_time_flag = 0; - - PHYDM_DBG(dm, DBG_ANT_DIV, "Control frame: main_rssi = %d, aux_rssi = %d\n", main_rssi, aux_rssi); - PHYDM_DBG(dm, DBG_ANT_DIV, "rx_idle_ant decided by control frame = %s\n", (rx_idle_ant == MAIN_ANT ? "MAIN" : "AUX")); - } - } - } - - fat_tab->min_max_rssi = min_max_rssi; - dm_swat_table->try_flag = SWAW_STEP_PEEK; - - if (dm_swat_table->double_chk_flag == 1) { - dm_swat_table->double_chk_flag = 0; - - if (fat_tab->min_max_rssi > RSSI_CHECK_THRESHOLD) { - PHYDM_DBG(dm, DBG_ANT_DIV, " [Double check] min_max_rssi ((%d)) > %d again!!\n", - fat_tab->min_max_rssi, RSSI_CHECK_THRESHOLD); - - odm_update_rx_idle_ant(dm, rx_idle_ant); - - PHYDM_DBG(dm, DBG_ANT_DIV, "[reset try_flag = 0] Training accomplished !!!]\n\n\n"); - return; - } else { - PHYDM_DBG(dm, DBG_ANT_DIV, " [Double check] min_max_rssi ((%d)) <= %d !!\n", - fat_tab->min_max_rssi, RSSI_CHECK_THRESHOLD); - - next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT; - dm_swat_table->try_flag = SWAW_STEP_PEEK; - dm_swat_table->reset_idx = RSSI_CHECK_RESET_PERIOD; - PHYDM_DBG(dm, DBG_ANT_DIV, "[set try_flag=0] Normal state: Need to tryg again!!\n\n\n"); - return; - } - } else { - if (fat_tab->min_max_rssi < RSSI_CHECK_THRESHOLD) - dm_swat_table->reset_idx = RSSI_CHECK_RESET_PERIOD; - - dm_swat_table->pre_antenna = rx_idle_ant; - odm_update_rx_idle_ant(dm, rx_idle_ant); - PHYDM_DBG(dm, DBG_ANT_DIV, "[reset try_flag = 0] Training accomplished !!!]\n\n\n"); - return; - } - + /* @1 Decision state */ + if (swat_tab->try_flag == SWAW_STEP_DETERMINE && + swat_tab->rssi_trying == 0) { + phydm_sw_antdiv_decision(dm); + return; } - } - /* 1 4.Change TRX antenna */ + /* @1 4.Change TRX antenna */ - PHYDM_DBG(dm, DBG_ANT_DIV, "rssi_trying = (( %d )), ant: (( %s )) >>> (( %s ))\n", - dm_swat_table->rssi_trying, (fat_tab->rx_idle_ant == MAIN_ANT ? "MAIN" : "AUX"), (next_ant == MAIN_ANT ? "MAIN" : "AUX")); + PHYDM_DBG(dm, DBG_ANT_DIV, + "rssi_trying = (( %d )), ant: (( %s )) >>> (( %s ))\n", + swat_tab->rssi_trying, + (fat_tab->rx_idle_ant == MAIN_ANT ? "MAIN" : "AUX"), + (next_ant == MAIN_ANT ? "MAIN" : "AUX")); odm_update_rx_idle_ant(dm, next_ant); - /* 1 5.Reset Statistics */ + /* @1 5.Reset Statistics */ - fat_tab->rx_idle_ant = next_ant; + fat_tab->rx_idle_ant = next_ant; + + if (dm->support_ic_type == ODM_RTL8723D) { + if (fat_tab->rx_idle_ant == MAIN_ANT) { + fat_tab->main_sum[0] = 0; + fat_tab->main_cnt[0] = 0; + fat_tab->main_sum_cck[0] = 0; + fat_tab->main_cnt_cck[0] = 0; + } else { + fat_tab->aux_sum[0] = 0; + fat_tab->aux_cnt[0] = 0; + fat_tab->aux_sum_cck[0] = 0; + fat_tab->aux_cnt_cck[0] = 0; + } + } if (dm->support_ic_type == ODM_RTL8188F) { if (dm->support_interface == ODM_ITRF_SDIO) { ODM_delay_us(200); - + if (fat_tab->rx_idle_ant == MAIN_ANT) { - fat_tab->main_ant_sum[0] = 0; - fat_tab->main_ant_cnt[0] = 0; - fat_tab->main_ant_sum_cck[0] = 0; - fat_tab->main_ant_cnt_cck[0] = 0; + fat_tab->main_sum[0] = 0; + fat_tab->main_cnt[0] = 0; + fat_tab->main_sum_cck[0] = 0; + fat_tab->main_cnt_cck[0] = 0; } else { - fat_tab->aux_ant_sum[0] = 0; - fat_tab->aux_ant_cnt[0] = 0; - fat_tab->aux_ant_sum_cck[0] = 0; - fat_tab->aux_ant_cnt_cck[0] = 0; - } - } + fat_tab->aux_sum[0] = 0; + fat_tab->aux_cnt[0] = 0; + fat_tab->aux_sum_cck[0] = 0; + fat_tab->aux_cnt_cck[0] = 0; + } + } } - - /* 1 6.Set next timer (Trying state) */ - - PHYDM_DBG(dm, DBG_ANT_DIV, " Test ((%s)) ant for (( %d )) ms\n", (next_ant == MAIN_ANT ? "MAIN" : "AUX"), dm_swat_table->train_time); - odm_set_timer(dm, &dm_swat_table->phydm_sw_antenna_switch_timer, - dm_swat_table->train_time); /*ms*/ + /* @1 6.Set next timer (Trying state) */ + PHYDM_DBG(dm, DBG_ANT_DIV, " Test ((%s)) ant for (( %d )) ms\n", + (next_ant == MAIN_ANT ? "MAIN" : "AUX"), + swat_tab->train_time); + odm_set_timer(dm, &swat_tab->sw_antdiv_timer, swat_tab->train_time); + /*@ms*/ } - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -odm_sw_antdiv_callback( - struct phydm_timer_list *timer -) +void odm_sw_antdiv_callback(struct phydm_timer_list *timer) { - void *adapter = (void *)timer->Adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct sw_antenna_switch *dm_swat_table = &hal_data->DM_OutSrc.dm_swat_table; + void *adapter = (void *)timer->Adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct sw_antenna_switch *swat_tab = &hal_data->DM_OutSrc.dm_swat_table; #if DEV_BUS_TYPE == RT_PCI_INTERFACE #if USE_WORKITEM - odm_schedule_work_item(&dm_swat_table->phydm_sw_antenna_switch_workitem); + odm_schedule_work_item(&swat_tab->phydm_sw_antenna_switch_workitem); #else { - /* dbg_print("SW_antdiv_Callback"); */ +#if 0 + /* @dbg_print("SW_antdiv_Callback"); */ +#endif odm_s0s1_sw_ant_div(&hal_data->DM_OutSrc, SWAW_STEP_DETERMINE); } #endif #else - odm_schedule_work_item(&dm_swat_table->phydm_sw_antenna_switch_workitem); + odm_schedule_work_item(&swat_tab->phydm_sw_antenna_switch_workitem); #endif } -void -odm_sw_antdiv_workitem_callback( - void *context -) -{ - void *adapter = (void *)context; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - /* dbg_print("SW_antdiv_Workitem_Callback"); */ +void odm_sw_antdiv_workitem_callback(void *context) +{ + void *adapter = (void *)context; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + +#if 0 + /* @dbg_print("SW_antdiv_Workitem_Callback"); */ +#endif odm_s0s1_sw_ant_div(&hal_data->DM_OutSrc, SWAW_STEP_DETERMINE); } #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -void -odm_sw_antdiv_workitem_callback( - void *context -) +void odm_sw_antdiv_workitem_callback(void *context) { void * - adapter = (void *)context; + adapter = (void *)context; HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - /*dbg_print("SW_antdiv_Workitem_Callback");*/ +#if 0 + /*@dbg_print("SW_antdiv_Workitem_Callback");*/ +#endif odm_s0s1_sw_ant_div(&hal_data->odmpriv, SWAW_STEP_DETERMINE); } -void -odm_sw_antdiv_callback(void *function_context) +void odm_sw_antdiv_callback(void *function_context) { - struct dm_struct *dm = (struct dm_struct *)function_context; - void *padapter = dm->adapter; - if (*(dm->is_net_closed) == true) + struct dm_struct *dm = (struct dm_struct *)function_context; + void *padapter = dm->adapter; + if (*dm->is_net_closed == true) return; -#if 0 /* Can't do I/O in timer callback*/ +#if 0 /* @Can't do I/O in timer callback*/ odm_s0s1_sw_ant_div(dm, SWAW_STEP_DETERMINE); #else - rtw_run_in_thread_cmd(padapter, odm_sw_antdiv_workitem_callback, padapter); + rtw_run_in_thread_cmd(padapter, odm_sw_antdiv_workitem_callback, + padapter); #endif } - #endif -void -odm_s0s1_sw_ant_div_by_ctrl_frame( - void *dm_void, - u8 step -) +void odm_s0s1_sw_ant_div_by_ctrl_frame(void *dm_void, u8 step) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; switch (step) { case SWAW_STEP_PEEK: - dm_swat_table->pkt_cnt_sw_ant_div_by_ctrl_frame = 0; - dm_swat_table->is_sw_ant_div_by_ctrl_frame = true; - fat_tab->main_ant_ctrl_frame_cnt = 0; - fat_tab->aux_ant_ctrl_frame_cnt = 0; - fat_tab->main_ant_ctrl_frame_sum = 0; - fat_tab->aux_ant_ctrl_frame_sum = 0; + swat_tab->pkt_cnt_sw_ant_div_by_ctrl_frame = 0; + swat_tab->is_sw_ant_div_by_ctrl_frame = true; + fat_tab->main_ctrl_cnt = 0; + fat_tab->aux_ctrl_cnt = 0; + fat_tab->main_ctrl_sum = 0; + fat_tab->aux_ctrl_sum = 0; fat_tab->cck_ctrl_frame_cnt_main = 0; fat_tab->cck_ctrl_frame_cnt_aux = 0; fat_tab->ofdm_ctrl_frame_cnt_main = 0; fat_tab->ofdm_ctrl_frame_cnt_aux = 0; - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_S0S1_SwAntDivForAPMode(): Start peek and reset counter\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "odm_S0S1_SwAntDivForAPMode(): Start peek and reset counter\n"); break; case SWAW_STEP_DETERMINE: - dm_swat_table->is_sw_ant_div_by_ctrl_frame = false; - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_S0S1_SwAntDivForAPMode(): Stop peek\n"); + swat_tab->is_sw_ant_div_by_ctrl_frame = false; + PHYDM_DBG(dm, DBG_ANT_DIV, + "odm_S0S1_SwAntDivForAPMode(): Stop peek\n"); break; default: - dm_swat_table->is_sw_ant_div_by_ctrl_frame = false; + swat_tab->is_sw_ant_div_by_ctrl_frame = false; break; } } -void -odm_antsel_statistics_of_ctrl_frame( - void *dm_void, - u8 antsel_tr_mux, - u32 rx_pwdb_all - -) +void odm_antsel_statistics_ctrl(void *dm_void, u8 antsel_tr_mux, + u32 rx_pwdb_all) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; if (antsel_tr_mux == ANT1_2G) { - fat_tab->main_ant_ctrl_frame_sum += rx_pwdb_all; - fat_tab->main_ant_ctrl_frame_cnt++; + fat_tab->main_ctrl_sum += rx_pwdb_all; + fat_tab->main_ctrl_cnt++; } else { - fat_tab->aux_ant_ctrl_frame_sum += rx_pwdb_all; - fat_tab->aux_ant_ctrl_frame_cnt++; + fat_tab->aux_ctrl_sum += rx_pwdb_all; + fat_tab->aux_ctrl_cnt++; } } -void -odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi( - void *dm_void, - void *phy_info_void, - void *pkt_info_void +void odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(void *dm_void, + void *phy_info_void, + void *pkt_info_void /* struct phydm_phyinfo_struct* phy_info, */ /* struct phydm_perpkt_info_struct* pktinfo */ -) + ) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_phyinfo_struct *phy_info = (struct phydm_phyinfo_struct *)phy_info_void; - struct phydm_perpkt_info_struct *pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_phyinfo_struct *phy_info = NULL; + struct phydm_perpkt_info_struct *pktinfo = NULL; + struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u8 rssi_cck; + + phy_info = (struct phydm_phyinfo_struct *)phy_info_void; + pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; if (!(dm->support_ability & ODM_BB_ANT_DIV)) return; @@ -3073,53 +3973,52 @@ odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi( if (dm->ant_div_type != S0S1_SW_ANTDIV) return; - /* In try state */ - if (!dm_swat_table->is_sw_ant_div_by_ctrl_frame) + /* @In try state */ + if (!swat_tab->is_sw_ant_div_by_ctrl_frame) return; /* No HW error and match receiver address */ if (!pktinfo->is_to_self) return; - dm_swat_table->pkt_cnt_sw_ant_div_by_ctrl_frame++; + swat_tab->pkt_cnt_sw_ant_div_by_ctrl_frame++; if (pktinfo->is_cck_rate) { - fat_tab->antsel_rx_keep_0 = (fat_tab->rx_idle_ant == MAIN_ANT) ? ANT1_2G : ANT2_2G; + rssi_cck = phy_info->rx_mimo_signal_strength[RF_PATH_A]; + fat_tab->antsel_rx_keep_0 = (fat_tab->rx_idle_ant == MAIN_ANT) ? + ANT1_2G : ANT2_2G; if (fat_tab->antsel_rx_keep_0 == ANT1_2G) fat_tab->cck_ctrl_frame_cnt_main++; else fat_tab->cck_ctrl_frame_cnt_aux++; - odm_antsel_statistics_of_ctrl_frame(dm, fat_tab->antsel_rx_keep_0, phy_info->rx_mimo_signal_strength[RF_PATH_A]); + odm_antsel_statistics_ctrl(dm, fat_tab->antsel_rx_keep_0, + rssi_cck); } else { - fat_tab->antsel_rx_keep_0 = (fat_tab->rx_idle_ant == MAIN_ANT) ? ANT1_2G : ANT2_2G; - + fat_tab->antsel_rx_keep_0 = (fat_tab->rx_idle_ant == MAIN_ANT) ? + ANT1_2G : ANT2_2G; + if (fat_tab->antsel_rx_keep_0 == ANT1_2G) fat_tab->ofdm_ctrl_frame_cnt_main++; else fat_tab->ofdm_ctrl_frame_cnt_aux++; - odm_antsel_statistics_of_ctrl_frame(dm, fat_tab->antsel_rx_keep_0, phy_info->rx_pwdb_all); + odm_antsel_statistics_ctrl(dm, fat_tab->antsel_rx_keep_0, + phy_info->rx_pwdb_all); } } -#endif /* #if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) */ +#endif /* @#if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) */ - - - -void -odm_set_next_mac_addr_target( - void *dm_void -) +void odm_set_next_mac_addr_target(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - struct cmn_sta_info *entry; - u32 value32, i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct cmn_sta_info *entry; + u32 value32, i; - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_set_next_mac_addr_target() ==>\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "%s ==>\n", __func__); if (dm->is_linked) { for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { @@ -3131,52 +4030,56 @@ odm_set_next_mac_addr_target( entry = dm->phydm_sta_info[fat_tab->train_idx]; if (is_sta_active(entry)) { - /*Match MAC ADDR*/ + /*@Match MAC ADDR*/ value32 = (entry->mac_addr[5] << 8) | entry->mac_addr[4]; - odm_set_mac_reg(dm, 0x7b4, 0xFFFF, value32);/*0x7b4~0x7b5*/ + odm_set_mac_reg(dm, R_0x7b4, 0xFFFF, value32); /*@0x7b4~0x7b5*/ value32 = (entry->mac_addr[3] << 24) | (entry->mac_addr[2] << 16) | (entry->mac_addr[1] << 8) | entry->mac_addr[0]; - odm_set_mac_reg(dm, 0x7b0, MASKDWORD, value32);/*0x7b0~0x7b3*/ + odm_set_mac_reg(dm, R_0x7b0, MASKDWORD, value32); /*@0x7b0~0x7b3*/ - PHYDM_DBG(dm, DBG_ANT_DIV, "fat_tab->train_idx=%d\n", fat_tab->train_idx); + PHYDM_DBG(dm, DBG_ANT_DIV, + "fat_tab->train_idx=%d\n", + fat_tab->train_idx); - PHYDM_DBG(dm, DBG_ANT_DIV, "Training MAC addr = %x:%x:%x:%x:%x:%x\n", - entry->mac_addr[5], entry->mac_addr[4], entry->mac_addr[3], entry->mac_addr[2], entry->mac_addr[1], entry->mac_addr[0]); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Training MAC addr = %x:%x:%x:%x:%x:%x\n", + entry->mac_addr[5], + entry->mac_addr[4], + entry->mac_addr[3], + entry->mac_addr[2], + entry->mac_addr[1], + entry->mac_addr[0]); break; } } } - } #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -void -odm_fast_ant_training( - void *dm_void -) +void odm_fast_ant_training( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - u32 max_rssi_path_a = 0, pckcnt_path_a = 0; - u8 i, target_ant_path_a = 0; - boolean is_pkt_filter_macth_path_a = false; + u32 max_rssi_path_a = 0, pckcnt_path_a = 0; + u8 i, target_ant_path_a = 0; + boolean is_pkt_filter_macth_path_a = false; #if (RTL8192E_SUPPORT == 1) - u32 max_rssi_path_b = 0, pckcnt_path_b = 0; - u8 target_ant_path_b = 0; - boolean is_pkt_filter_macth_path_b = false; + u32 max_rssi_path_b = 0, pckcnt_path_b = 0; + u8 target_ant_path_b = 0; + boolean is_pkt_filter_macth_path_b = false; #endif - - if (!dm->is_linked) { /* is_linked==False */ + if (!dm->is_linked) { /* @is_linked==False */ PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n"); if (fat_tab->is_become_linked == true) { - odm_ant_div_on_off(dm, ANTDIV_OFF); + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); phydm_fast_training_enable(dm, FAT_OFF); odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); fat_tab->is_become_linked = dm->is_linked; @@ -3189,31 +4092,30 @@ odm_fast_ant_training( } } - if (*fat_tab->p_force_tx_ant_by_desc == false) { + if (!(*fat_tab->p_force_tx_by_desc)) { if (dm->is_one_entry_only == true) odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); else odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); } - if (dm->support_ic_type == ODM_RTL8188E) - odm_set_bb_reg(dm, 0x864, BIT(2) | BIT(1) | BIT(0), ((dm->fat_comb_a) - 1)); + odm_set_bb_reg(dm, R_0x864, BIT(2) | BIT(1) | BIT(0), ((dm->fat_comb_a) - 1)); #if (RTL8192E_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8192E) { - odm_set_bb_reg(dm, 0xB38, BIT(2) | BIT(1) | BIT(0), ((dm->fat_comb_a) - 1)); /* path-A */ /* ant combination=regB38[2:0]+1 */ - odm_set_bb_reg(dm, 0xB38, BIT(18) | BIT(17) | BIT(16), ((dm->fat_comb_b) - 1)); /* path-B */ /* ant combination=regB38[18:16]+1 */ + odm_set_bb_reg(dm, R_0xb38, BIT(2) | BIT(1) | BIT(0), ((dm->fat_comb_a) - 1)); /* path-A */ /* ant combination=regB38[2:0]+1 */ + odm_set_bb_reg(dm, R_0xb38, BIT(18) | BIT(17) | BIT(16), ((dm->fat_comb_b) - 1)); /* path-B */ /* ant combination=regB38[18:16]+1 */ } #endif - PHYDM_DBG(dm, DBG_ANT_DIV, "==>odm_fast_ant_training()\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "==>%s\n", __func__); - /* 1 TRAINING STATE */ + /* @1 TRAINING STATE */ if (fat_tab->fat_state == FAT_TRAINING_STATE) { - /* 2 Caculate RSSI per Antenna */ + /* @2 Caculate RSSI per Antenna */ - /* 3 [path-A]--------------------------- */ - for (i = 0; i < (dm->fat_comb_a); i++) { /* i : antenna index */ + /* @3 [path-A]--------------------------- */ + for (i = 0; i < (dm->fat_comb_a); i++) { /* @i : antenna index */ if (fat_tab->ant_rssi_cnt[i] == 0) fat_tab->ant_ave_rssi[i] = 0; else { @@ -3224,99 +4126,112 @@ odm_fast_ant_training( if (fat_tab->ant_ave_rssi[i] > max_rssi_path_a) { max_rssi_path_a = fat_tab->ant_ave_rssi[i]; pckcnt_path_a = fat_tab->ant_rssi_cnt[i]; - target_ant_path_a = i ; + target_ant_path_a = i; } else if (fat_tab->ant_ave_rssi[i] == max_rssi_path_a) { - if ((fat_tab->ant_rssi_cnt[i]) > pckcnt_path_a) { + if (fat_tab->ant_rssi_cnt[i] > pckcnt_path_a) { max_rssi_path_a = fat_tab->ant_ave_rssi[i]; pckcnt_path_a = fat_tab->ant_rssi_cnt[i]; - target_ant_path_a = i ; + target_ant_path_a = i; } } - PHYDM_DBG("*** ant-index : [ %d ], counter = (( %d )), Avg RSSI = (( %d ))\n", i, fat_tab->ant_rssi_cnt[i], fat_tab->ant_ave_rssi[i]); + PHYDM_DBG( + "*** ant-index : [ %d ], counter = (( %d )), Avg RSSI = (( %d ))\n", + i, fat_tab->ant_rssi_cnt[i], + fat_tab->ant_ave_rssi[i]); } - #if 0 #if (RTL8192E_SUPPORT == 1) - /* 3 [path-B]--------------------------- */ + /* @3 [path-B]--------------------------- */ for (i = 0; i < (dm->fat_comb_b); i++) { if (fat_tab->antRSSIcnt_pathB[i] == 0) fat_tab->antAveRSSI_pathB[i] = 0; - else { /* (ant_rssi_cnt[i] != 0) */ + else { /* @(ant_rssi_cnt[i] != 0) */ fat_tab->antAveRSSI_pathB[i] = fat_tab->antSumRSSI_pathB[i] / fat_tab->antRSSIcnt_pathB[i]; is_pkt_filter_macth_path_b = true; } if (fat_tab->antAveRSSI_pathB[i] > max_rssi_path_b) { max_rssi_path_b = fat_tab->antAveRSSI_pathB[i]; pckcnt_path_b = fat_tab->antRSSIcnt_pathB[i]; - target_ant_path_b = (u8) i; + target_ant_path_b = (u8)i; } if (fat_tab->antAveRSSI_pathB[i] == max_rssi_path_b) { if (fat_tab->antRSSIcnt_pathB > pckcnt_path_b) { max_rssi_path_b = fat_tab->antAveRSSI_pathB[i]; - target_ant_path_b = (u8) i; + target_ant_path_b = (u8)i; } } if (dm->fat_print_rssi == 1) { - PHYDM_DBG(dm, DBG_ANT_DIV, "***{path-B}: Sum RSSI[%d] = (( %d )), cnt RSSI [%d] = (( %d )), Avg RSSI[%d] = (( %d ))\n", - i, fat_tab->antSumRSSI_pathB[i], i, fat_tab->antRSSIcnt_pathB[i], i, fat_tab->antAveRSSI_pathB[i]); + PHYDM_DBG(dm, DBG_ANT_DIV, + "***{path-B}: Sum RSSI[%d] = (( %d )), cnt RSSI [%d] = (( %d )), Avg RSSI[%d] = (( %d ))\n", + i, fat_tab->antSumRSSI_pathB[i], i, + fat_tab->antRSSIcnt_pathB[i], i, + fat_tab->antAveRSSI_pathB[i]); } } #endif #endif - /* 1 DECISION STATE */ + /* @1 DECISION STATE */ - /* 2 Select TRX Antenna */ + /* @2 Select TRX Antenna */ phydm_fast_training_enable(dm, FAT_OFF); - /* 3 [path-A]--------------------------- */ - if (is_pkt_filter_macth_path_a == false) { + /* @3 [path-A]--------------------------- */ + if (is_pkt_filter_macth_path_a == false) { +#if 0 /* PHYDM_DBG(dm,DBG_ANT_DIV, "{path-A}: None Packet is matched\n"); */ - PHYDM_DBG(dm, DBG_ANT_DIV, "{path-A}: None Packet is matched\n"); - odm_ant_div_on_off(dm, ANTDIV_OFF); +#endif + PHYDM_DBG(dm, DBG_ANT_DIV, + "{path-A}: None Packet is matched\n"); + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); } else { - PHYDM_DBG("target_ant_path_a = (( %d )) , max_rssi_path_a = (( %d ))\n", target_ant_path_a, max_rssi_path_a); + PHYDM_DBG( + "target_ant_path_a = (( %d )) , max_rssi_path_a = (( %d ))\n", + target_ant_path_a, max_rssi_path_a); - /* 3 [ update RX-optional ant ] Default RX is Omni, Optional RX is the best decision by FAT */ + /* @3 [ update RX-optional ant ] Default RX is Omni, Optional RX is the best decision by FAT */ if (dm->support_ic_type == ODM_RTL8188E) - odm_set_bb_reg(dm, 0x864, BIT(8) | BIT(7) | BIT(6), target_ant_path_a); + odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), target_ant_path_a); else if (dm->support_ic_type == ODM_RTL8192E) - odm_set_bb_reg(dm, 0xB38, BIT(8) | BIT(7) | BIT(6), target_ant_path_a); /* Optional RX [pth-A] */ + odm_set_bb_reg(dm, R_0xb38, BIT(8) | BIT(7) | BIT(6), target_ant_path_a); /* Optional RX [pth-A] */ - /* 3 [ update TX ant ] */ + /* @3 [ update TX ant ] */ odm_update_tx_ant(dm, target_ant_path_a, (fat_tab->train_idx)); if (target_ant_path_a == 0) - odm_ant_div_on_off(dm, ANTDIV_OFF); + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); } #if 0 #if (RTL8192E_SUPPORT == 1) - /* 3 [path-B]--------------------------- */ + /* @3 [path-B]--------------------------- */ if (is_pkt_filter_macth_path_b == false) { if (dm->fat_print_rssi == 1) - PHYDM_DBG(dm, DBG_ANT_DIV, "***[%d]{path-B}: None Packet is matched\n\n\n", __LINE__); + PHYDM_DBG(dm, DBG_ANT_DIV, + "***[%d]{path-B}: None Packet is matched\n\n\n", + __LINE__); } else { if (dm->fat_print_rssi == 1) { PHYDM_DBG(dm, DBG_ANT_DIV, - " ***target_ant_path_b = (( %d )) *** max_rssi = (( %d ))***\n\n\n", target_ant_path_b, max_rssi_path_b); + " ***target_ant_path_b = (( %d )) *** max_rssi = (( %d ))***\n\n\n", + target_ant_path_b, max_rssi_path_b); } - odm_set_bb_reg(dm, 0xB38, BIT(21) | BIT20 | BIT19, target_ant_path_b); /* Default RX is Omni, Optional RX is the best decision by FAT */ - odm_set_bb_reg(dm, 0x80c, BIT(21), 1); /* Reg80c[21]=1'b1 //from TX Info */ + odm_set_bb_reg(dm, R_0xb38, BIT(21) | BIT20 | BIT19, target_ant_path_b); /* @Default RX is Omni, Optional RX is the best decision by FAT */ + odm_set_bb_reg(dm, R_0x80c, BIT(21), 1); /* Reg80c[21]=1'b1 //from TX Info */ fat_tab->antsel_pathB[fat_tab->train_idx] = target_ant_path_b; } #endif #endif - /* 2 Reset counter */ + /* @2 Reset counter */ for (i = 0; i < (dm->fat_comb_a); i++) { fat_tab->ant_sum_rssi[i] = 0; fat_tab->ant_rssi_cnt[i] = 0; } - /* + /*@ #if (RTL8192E_SUPPORT == 1) for(i=0; i<=(dm->fat_comb_b); i++) { @@ -3330,29 +4245,27 @@ odm_fast_ant_training( return; } - /* 1 NORMAL STATE */ + /* @1 NORMAL STATE */ if (fat_tab->fat_state == FAT_PREPARE_STATE) { PHYDM_DBG(dm, DBG_ANT_DIV, "[ Start Prepare state ]\n"); odm_set_next_mac_addr_target(dm); - /* 2 Prepare Training */ + /* @2 Prepare Training */ fat_tab->fat_state = FAT_TRAINING_STATE; phydm_fast_training_enable(dm, FAT_ON); - odm_ant_div_on_off(dm, ANTDIV_ON); /* enable HW AntDiv */ + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); + /* @enable HW AntDiv */ PHYDM_DBG(dm, DBG_ANT_DIV, "[Start Training state]\n"); - odm_set_timer(dm, &dm->fast_ant_training_timer, dm->antdiv_intvl); /* ms */ + odm_set_timer(dm, &dm->fast_ant_training_timer, dm->antdiv_intvl); /* @ms */ } - } -void -odm_fast_ant_training_callback( - void *dm_void -) +void odm_fast_ant_training_callback( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE == ODM_CE) if (*(dm->is_net_closed) == true) @@ -3362,106 +4275,114 @@ odm_fast_ant_training_callback( #if USE_WORKITEM odm_schedule_work_item(&dm->fast_ant_training_workitem); #else - PHYDM_DBG(dm, DBG_ANT_DIV, "******odm_fast_ant_training_callback******\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "******%s******\n", __func__); odm_fast_ant_training(dm); #endif } -void -odm_fast_ant_training_work_item_callback( - void *dm_void -) +void odm_fast_ant_training_work_item_callback( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - PHYDM_DBG(dm, DBG_ANT_DIV, "******odm_fast_ant_training_work_item_callback******\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, "******%s******\n", __func__); odm_fast_ant_training(dm); } #endif -void -odm_ant_div_init( - void *dm_void -) +void odm_ant_div_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; if (!(dm->support_ability & ODM_BB_ANT_DIV)) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Return!!!] Not Support Antenna Diversity Function\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] Not Support Antenna Diversity Function\n"); return; } - /* --- */ +/* @--- */ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) if (fat_tab->ant_div_2g_5g == ODM_ANTDIV_2G) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[2G AntDiv Init]: Only Support 2G Antenna Diversity Function\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[2G AntDiv Init]: Only Support 2G Antenna Diversity Function\n"); if (!(dm->support_ic_type & ODM_ANTDIV_2G_SUPPORT_IC)) return; - } else if (fat_tab->ant_div_2g_5g == ODM_ANTDIV_5G) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[5G AntDiv Init]: Only Support 5G Antenna Diversity Function\n"); + } else if (fat_tab->ant_div_2g_5g == ODM_ANTDIV_5G) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[5G AntDiv Init]: Only Support 5G Antenna Diversity Function\n"); if (!(dm->support_ic_type & ODM_ANTDIV_5G_SUPPORT_IC)) return; - } else if (fat_tab->ant_div_2g_5g == (ODM_ANTDIV_2G | ODM_ANTDIV_5G)) - PHYDM_DBG(dm, DBG_ANT_DIV, "[2G & 5G AntDiv Init]:Support Both 2G & 5G Antenna Diversity Function\n"); + } else if (fat_tab->ant_div_2g_5g == (ODM_ANTDIV_2G | ODM_ANTDIV_5G)) + PHYDM_DBG(dm, DBG_ANT_DIV, + "[2G & 5G AntDiv Init]:Support Both 2G & 5G Antenna Diversity Function\n"); #endif - /* --- */ + /* @--- */ - /* 2 [--General---] */ + /* @2 [--General---] */ dm->antdiv_period = 0; fat_tab->is_become_linked = false; fat_tab->ant_div_on_off = 0xff; - /* 3 - AP - */ +/* @3 - AP - */ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT #if (DM_ODM_SUPPORT_TYPE == ODM_AP) odm_bdc_init(dm); #endif #endif - /* 3 - WIN - */ +/* @3 - WIN - */ #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) - dm_swat_table->ant_5g = MAIN_ANT; - dm_swat_table->ant_2g = MAIN_ANT; + swat_tab->ant_5g = MAIN_ANT; + swat_tab->ant_2g = MAIN_ANT; #endif - /* 2 [---Set MAIN_ANT as default antenna if Auto-ant enable---] */ - odm_ant_div_on_off(dm, ANTDIV_OFF); + /* @2 [---Set MAIN_ANT as default antenna if Auto-ant enable---] */ + if (fat_tab->div_path_type == ANT_PATH_A) + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); + else if (fat_tab->div_path_type == ANT_PATH_B) + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B); + else if (fat_tab->div_path_type == ANT_PATH_AB) + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_AB); dm->ant_type = ODM_AUTO_ANT; - fat_tab->rx_idle_ant = 0xff; /*to make RX-idle-antenna will be updated absolutly*/ + fat_tab->rx_idle_ant = 0xff; + /*to make RX-idle-antenna will be updated absolutly*/ odm_update_rx_idle_ant(dm, MAIN_ANT); - phydm_keep_rx_ack_ant_by_tx_ant_time(dm, 0); /* Timming issue: keep Rx ant after tx for ACK ( 5 x 3.2 mu = 16mu sec)*/ + phydm_keep_rx_ack_ant_by_tx_ant_time(dm, 0); + /* Timming issue: keep Rx ant after tx for ACK(5 x 3.2 mu = 16mu sec)*/ - /* 2 [---Set TX Antenna---] */ - if (fat_tab->p_force_tx_ant_by_desc == NULL) { - fat_tab->force_tx_ant_by_desc = 0; - fat_tab->p_force_tx_ant_by_desc = &fat_tab->force_tx_ant_by_desc; + /* @2 [---Set TX Antenna---] */ + if (!fat_tab->p_force_tx_by_desc) { + fat_tab->force_tx_by_desc = 0; + fat_tab->p_force_tx_by_desc = &fat_tab->force_tx_by_desc; } - PHYDM_DBG(dm, DBG_ANT_DIV, "p_force_tx_ant_by_desc = %d\n", *fat_tab->p_force_tx_ant_by_desc); + PHYDM_DBG(dm, DBG_ANT_DIV, "p_force_tx_by_desc = %d\n", + *fat_tab->p_force_tx_by_desc); - if (*fat_tab->p_force_tx_ant_by_desc == true) + if (*fat_tab->p_force_tx_by_desc) odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); else - odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); + odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); - - /* 2 [--88E---] */ + /* @2 [--88E---] */ if (dm->support_ic_type == ODM_RTL8188E) { #if (RTL8188E_SUPPORT == 1) - /* dm->ant_div_type = CGCS_RX_HW_ANTDIV; */ - /* dm->ant_div_type = CG_TRX_HW_ANTDIV; */ - /* dm->ant_div_type = CG_TRX_SMART_ANTDIV; */ + /* @dm->ant_div_type = CGCS_RX_HW_ANTDIV; */ + /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ + /* @dm->ant_div_type = CG_TRX_SMART_ANTDIV; */ - if ((dm->ant_div_type != CGCS_RX_HW_ANTDIV) && (dm->ant_div_type != CG_TRX_HW_ANTDIV) && (dm->ant_div_type != CG_TRX_SMART_ANTDIV)) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Return!!!] 88E Not Supprrt This AntDiv type\n"); + if (dm->ant_div_type != CGCS_RX_HW_ANTDIV && + dm->ant_div_type != CG_TRX_HW_ANTDIV && + dm->ant_div_type != CG_TRX_SMART_ANTDIV) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] 88E Not Supprrt This AntDiv type\n"); dm->support_ability &= ~(ODM_BB_ANT_DIV); return; } @@ -3477,15 +4398,18 @@ odm_ant_div_init( #endif } - /* 2 [--92E---] */ +/* @2 [--92E---] */ #if (RTL8192E_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8192E) { - /* dm->ant_div_type = CGCS_RX_HW_ANTDIV; */ - /* dm->ant_div_type = CG_TRX_HW_ANTDIV; */ - /* dm->ant_div_type = CG_TRX_SMART_ANTDIV; */ + /* @dm->ant_div_type = CGCS_RX_HW_ANTDIV; */ + /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ + /* @dm->ant_div_type = CG_TRX_SMART_ANTDIV; */ - if ((dm->ant_div_type != CGCS_RX_HW_ANTDIV) && (dm->ant_div_type != CG_TRX_HW_ANTDIV) && (dm->ant_div_type != CG_TRX_SMART_ANTDIV)) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Return!!!] 8192E Not Supprrt This AntDiv type\n"); + if (dm->ant_div_type != CGCS_RX_HW_ANTDIV && + dm->ant_div_type != CG_TRX_HW_ANTDIV && + dm->ant_div_type != CG_TRX_SMART_ANTDIV) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] 8192E Not Supprrt This AntDiv type\n"); dm->support_ability &= ~(ODM_BB_ANT_DIV); return; } @@ -3498,18 +4422,54 @@ odm_ant_div_init( else if (dm->ant_div_type == CG_TRX_SMART_ANTDIV) odm_smart_hw_ant_div_init_92e(dm); #endif - } #endif - /* 2 [--8723B---] */ + /* @2 [--92F---] */ +#if (RTL8192F_SUPPORT == 1) + else if (dm->support_ic_type == ODM_RTL8192F) { + /* @dm->ant_div_type = CGCS_RX_HW_ANTDIV; */ + /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ + /* @dm->ant_div_type = CG_TRX_SMART_ANTDIV; */ + + if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) { + if (dm->ant_div_type != CG_TRX_HW_ANTDIV) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] 8192F Not Supprrt This AntDiv type\n"); + dm->support_ability &= ~(ODM_BB_ANT_DIV); + return; + } + } + if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) + odm_rx_hw_ant_div_init_92f(dm); + else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) + odm_trx_hw_ant_div_init_92f(dm); + } +#endif + +#if (RTL8197F_SUPPORT == 1) + else if (dm->support_ic_type == ODM_RTL8197F) { + dm->ant_div_type = CGCS_RX_HW_ANTDIV; + + if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] 8197F Not Supprrt This AntDiv type\n"); + dm->support_ability &= ~(ODM_BB_ANT_DIV); + return; + } + phydm_rx_hw_ant_div_init_97f(dm); + } +#endif +/* @2 [--8723B---] */ #if (RTL8723B_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8723B) { dm->ant_div_type = S0S1_SW_ANTDIV; - /* dm->ant_div_type = CG_TRX_HW_ANTDIV; */ + /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ - if (dm->ant_div_type != S0S1_SW_ANTDIV && dm->ant_div_type != CG_TRX_HW_ANTDIV) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Return!!!] 8723B Not Supprrt This AntDiv type\n"); + if (dm->ant_div_type != S0S1_SW_ANTDIV && + dm->ant_div_type != CG_TRX_HW_ANTDIV) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] 8723B Not Supprrt This AntDiv type\n"); dm->support_ability &= ~(ODM_BB_ANT_DIV); return; } @@ -3520,14 +4480,15 @@ odm_ant_div_init( odm_trx_hw_ant_div_init_8723b(dm); } #endif - /*2 [--8723D---]*/ +/*@2 [--8723D---]*/ #if (RTL8723D_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8723D) { if (fat_tab->p_default_s0_s1 == NULL) { fat_tab->default_s0_s1 = 1; fat_tab->p_default_s0_s1 = &fat_tab->default_s0_s1; } - PHYDM_DBG(dm, DBG_ANT_DIV, "default_s0_s1 = %d\n", *fat_tab->p_default_s0_s1); + PHYDM_DBG(dm, DBG_ANT_DIV, "default_s0_s1 = %d\n", + *fat_tab->p_default_s0_s1); if (*fat_tab->p_default_s0_s1 == true) odm_update_rx_idle_ant(dm, MAIN_ANT); @@ -3536,34 +4497,52 @@ odm_ant_div_init( if (dm->ant_div_type == S0S1_TRX_HW_ANTDIV) odm_trx_hw_ant_div_init_8723d(dm); + else if (dm->ant_div_type == S0S1_SW_ANTDIV) + odm_s0s1_sw_ant_div_init_8723d(dm); else { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Return!!!] 8723D Not Supprrt This AntDiv type\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] 8723D Not Supprrt This AntDiv type\n"); dm->support_ability &= ~(ODM_BB_ANT_DIV); return; } - } #endif - /* 2 [--8811A 8821A---] */ +#if (RTL8721D_SUPPORT == 1) + else if (dm->support_ic_type == ODM_RTL8721D) { + /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ + + if (dm->ant_div_type != CG_TRX_HW_ANTDIV) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] 8721D Not Supprrt This AntDiv type\n"); + dm->support_ability &= ~(ODM_BB_ANT_DIV); + return; + } + if (dm->ant_div_type == CG_TRX_HW_ANTDIV) + odm_trx_hw_ant_div_init_8721d(dm); + } +#endif +/* @2 [--8811A 8821A---] */ #if (RTL8821A_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8821) { - #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 +#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 dm->ant_div_type = HL_SW_SMART_ANT_TYPE1; if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { odm_trx_hw_ant_div_init_8821a(dm); phydm_hl_smart_ant_type1_init_8821a(dm); } else - #endif +#endif { - #ifdef ODM_CONFIG_BT_COEXIST +#ifdef ODM_CONFIG_BT_COEXIST dm->ant_div_type = S0S1_SW_ANTDIV; - #else +#else dm->ant_div_type = CG_TRX_HW_ANTDIV; - #endif +#endif - if (dm->ant_div_type != CG_TRX_HW_ANTDIV && dm->ant_div_type != S0S1_SW_ANTDIV) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Return!!!] 8821A & 8811A Not Supprrt This AntDiv type\n"); + if (dm->ant_div_type != CG_TRX_HW_ANTDIV && + dm->ant_div_type != S0S1_SW_ANTDIV) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] 8821A & 8811A Not Supprrt This AntDiv type\n"); dm->support_ability &= ~(ODM_BB_ANT_DIV); return; } @@ -3575,12 +4554,13 @@ odm_ant_div_init( } #endif - /* 2 [--8821C---] */ +/* @2 [--8821C---] */ #if (RTL8821C_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8821C) { dm->ant_div_type = S0S1_SW_ANTDIV; if (dm->ant_div_type != S0S1_SW_ANTDIV) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Return!!!] 8821C Not Supprrt This AntDiv type\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] 8821C Not Supprrt This AntDiv type\n"); dm->support_ability &= ~(ODM_BB_ANT_DIV); return; } @@ -3589,17 +4569,17 @@ odm_ant_div_init( } #endif - /* 2 [--8881A---] */ +/* @2 [--8881A---] */ #if (RTL8881A_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8881A) { - /* dm->ant_div_type = CGCS_RX_HW_ANTDIV; */ - /* dm->ant_div_type = CG_TRX_HW_ANTDIV; */ + /* @dm->ant_div_type = CGCS_RX_HW_ANTDIV; */ + /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { odm_trx_hw_ant_div_init_8881a(dm); - /**/ } else { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Return!!!] 8881A Not Supprrt This AntDiv type\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] 8881A Not Supprrt This AntDiv type\n"); dm->support_ability &= ~(ODM_BB_ANT_DIV); return; } @@ -3608,13 +4588,14 @@ odm_ant_div_init( } #endif - /* 2 [--8812---] */ +/* @2 [--8812---] */ #if (RTL8812A_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8812) { - /* dm->ant_div_type = CG_TRX_HW_ANTDIV; */ + /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ if (dm->ant_div_type != CG_TRX_HW_ANTDIV) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Return!!!] 8812A Not Supprrt This AntDiv type\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] 8812A Not Supprrt This AntDiv type\n"); dm->support_ability &= ~(ODM_BB_ANT_DIV); return; } @@ -3622,7 +4603,7 @@ odm_ant_div_init( } #endif - /*[--8188F---]*/ +/*@[--8188F---]*/ #if (RTL8188F_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8188F) { dm->ant_div_type = S0S1_SW_ANTDIV; @@ -3630,44 +4611,51 @@ odm_ant_div_init( } #endif - /*[--8822B---]*/ +/*@[--8822B---]*/ #if (RTL8822B_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8822B) { - #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 + dm->ant_div_type = CG_TRX_HW_ANTDIV; + + if (dm->ant_div_type != CG_TRX_HW_ANTDIV) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] 8822B Not Supprrt This AntDiv type\n"); + dm->support_ability &= ~(ODM_BB_ANT_DIV); + return; + } + phydm_trx_hw_ant_div_init_22b(dm); +#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 dm->ant_div_type = HL_SW_SMART_ANT_TYPE2; if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE2) phydm_hl_smart_ant_type2_init_8822b(dm); - #endif +#endif } #endif - /* - PHYDM_DBG(dm, DBG_ANT_DIV, "*** support_ic_type=[%lu]\n",dm->support_ic_type); - PHYDM_DBG(dm, DBG_ANT_DIV, "*** AntDiv support_ability=[%lu]\n",(dm->support_ability & ODM_BB_ANT_DIV)>>6); - PHYDM_DBG(dm, DBG_ANT_DIV, "*** AntDiv type=[%d]\n",dm->ant_div_type); - */ +/*@PHYDM_DBG(dm, DBG_ANT_DIV, "*** support_ic_type=[%lu]\n",*/ +/*dm->support_ic_type);*/ +/*PHYDM_DBG(dm, DBG_ANT_DIV, "*** AntDiv support_ability=[%lu]\n",*/ +/* (dm->support_ability & ODM_BB_ANT_DIV)>>6);*/ +/*PHYDM_DBG(dm, DBG_ANT_DIV, "*** AntDiv type=[%d]\n",dm->ant_div_type);*/ } -void -odm_ant_div( - void *dm_void -) +void odm_ant_div(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - void *adapter = dm->adapter; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *adapter = dm->adapter; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; #if (defined(CONFIG_HL_SMART_ANTENNA)) - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; #endif #ifdef ODM_EVM_ENHANCE_ANTDIV - if (dm->is_linked) { - PHYDM_DBG(dm, DBG_ANT_DIV, "tp_active_occur=((%d)), evm_method_enable=((%d))\n", - dm->tp_active_occur, fat_tab->evm_method_enable); + PHYDM_DBG(dm, DBG_ANT_DIV, + "tp_active_occur=((%d)), evm_method_enable=((%d))\n", + dm->tp_active_occur, fat_tab->evm_method_enable); - if ((dm->tp_active_occur == 1) && (fat_tab->evm_method_enable == 1)) { + if (dm->tp_active_occur == 1 && + fat_tab->evm_method_enable == 1) { fat_tab->idx_ant_div_counter_5g = dm->antdiv_period; fat_tab->idx_ant_div_counter_2g = dm->antdiv_period; } @@ -3675,66 +4663,85 @@ odm_ant_div( #endif if (*dm->band_type == ODM_BAND_5G) { - if (fat_tab->idx_ant_div_counter_5g < dm->antdiv_period) { + if (fat_tab->idx_ant_div_counter_5g < dm->antdiv_period) { fat_tab->idx_ant_div_counter_5g++; return; } else fat_tab->idx_ant_div_counter_5g = 0; - } else if (*dm->band_type == ODM_BAND_2_4G) { - if (fat_tab->idx_ant_div_counter_2g < dm->antdiv_period) { + } else if (*dm->band_type == ODM_BAND_2_4G) { + if (fat_tab->idx_ant_div_counter_2g < dm->antdiv_period) { fat_tab->idx_ant_div_counter_2g++; return; } else fat_tab->idx_ant_div_counter_2g = 0; } - /* ---------- */ - - /* ---------- */ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN || DM_ODM_SUPPORT_TYPE == ODM_CE) if (fat_tab->enable_ctrl_frame_antdiv) { - if ((dm->data_frame_num <= 10) && (dm->is_linked)) + if (dm->data_frame_num <= 10 && dm->is_linked) fat_tab->use_ctrl_frame_antdiv = 1; else fat_tab->use_ctrl_frame_antdiv = 0; - PHYDM_DBG(dm, DBG_ANT_DIV, "use_ctrl_frame_antdiv = (( %d )), data_frame_num = (( %d ))\n", fat_tab->use_ctrl_frame_antdiv, dm->data_frame_num); + PHYDM_DBG(dm, DBG_ANT_DIV, + "use_ctrl_frame_antdiv = (( %d )), data_frame_num = (( %d ))\n", + fat_tab->use_ctrl_frame_antdiv, dm->data_frame_num); dm->data_frame_num = 0; } { -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT - enum beamforming_cap beamform_cap = phydm_get_beamform_cap(dm); - PHYDM_DBG(dm, DBG_ANT_DIV, "is_bt_continuous_turn = ((%d))\n", dm->is_bt_continuous_turn); - PHYDM_DBG(dm, DBG_ANT_DIV, "[ AntDiv Beam Cap ] cap= ((%d))\n", beamform_cap); + enum beamforming_cap beamform_cap = phydm_get_beamform_cap(dm); + PHYDM_DBG(dm, DBG_ANT_DIV, "is_bt_continuous_turn = ((%d))\n", + dm->is_bt_continuous_turn); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ AntDiv Beam Cap ] cap= ((%d))\n", beamform_cap); if (!dm->is_bt_continuous_turn) { - if ((beamform_cap & BEAMFORMEE_CAP) && (!(*fat_tab->is_no_csi_feedback))) { /* BFmee On && Div On->Div Off */ - PHYDM_DBG(dm, DBG_ANT_DIV, "[ AntDiv : OFF ] BFmee ==1; cap= ((%d))\n", beamform_cap); - PHYDM_DBG(dm, DBG_ANT_DIV, "[ AntDiv BF] is_no_csi_feedback= ((%d))\n", *(fat_tab->is_no_csi_feedback)); + if ((beamform_cap & BEAMFORMEE_CAP) && + (!(*fat_tab->is_no_csi_feedback))) { + /* @BFmee On && Div On->Div Off */ + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ AntDiv : OFF ] BFmee ==1; cap= ((%d))\n", + beamform_cap); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ AntDiv BF] is_no_csi_feedback= ((%d))\n", + *(fat_tab->is_no_csi_feedback)); if (fat_tab->fix_ant_bfee == 0) { - odm_ant_div_on_off(dm, ANTDIV_OFF); + odm_ant_div_on_off(dm, ANTDIV_OFF, + ANT_PATH_A); fat_tab->fix_ant_bfee = 1; } return; - } else { /* BFmee Off && Div Off->Div On */ - if ((fat_tab->fix_ant_bfee == 1) && dm->is_linked) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[ AntDiv : ON ] BFmee ==0; cap=((%d))\n", beamform_cap); - PHYDM_DBG(dm, DBG_ANT_DIV, "[ AntDiv BF] is_no_csi_feedback= ((%d))\n", *(fat_tab->is_no_csi_feedback)); + } else { /* @BFmee Off && Div Off->Div On */ + if (fat_tab->fix_ant_bfee == 1 && + dm->is_linked) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ AntDiv : ON ] BFmee ==0; cap=((%d))\n", + beamform_cap); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ AntDiv BF] is_no_csi_feedback= ((%d))\n", + *fat_tab->is_no_csi_feedback); if (dm->ant_div_type != S0S1_SW_ANTDIV) - odm_ant_div_on_off(dm, ANTDIV_ON); - + odm_ant_div_on_off(dm, ANTDIV_ON + , ANT_PATH_A) + ; fat_tab->fix_ant_bfee = 0; } } } else { - odm_ant_div_on_off(dm, ANTDIV_ON); + if (fat_tab->div_path_type == ANT_PATH_A) + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); + else if (fat_tab->div_path_type == ANT_PATH_B) + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_B); + else if (fat_tab->div_path_type == ANT_PATH_AB) + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_AB); } #endif } #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) - /* ----------just for fool proof */ + /* @----------just for fool proof */ if (dm->antdiv_rssi) dm->debug_components |= DBG_ANT_DIV; @@ -3742,45 +4749,43 @@ odm_ant_div( dm->debug_components &= ~DBG_ANT_DIV; if (fat_tab->ant_div_2g_5g == ODM_ANTDIV_2G) { - /* PHYDM_DBG(dm, DBG_ANT_DIV,"[ 2G AntDiv Running ]\n"); */ if (!(dm->support_ic_type & ODM_ANTDIV_2G_SUPPORT_IC)) return; } else if (fat_tab->ant_div_2g_5g == ODM_ANTDIV_5G) { - /* PHYDM_DBG(dm, DBG_ANT_DIV,"[ 5G AntDiv Running ]\n"); */ if (!(dm->support_ic_type & ODM_ANTDIV_5G_SUPPORT_IC)) return; } - /* else if(fat_tab->ant_div_2g_5g == (ODM_ANTDIV_2G|ODM_ANTDIV_5G)) */ - /* { */ - /* PHYDM_DBG(dm, DBG_ANT_DIV,"[ 2G & 5G AntDiv Running ]\n"); */ - /* } */ #endif - /* ---------- */ + /* @---------- */ if (dm->antdiv_select == 1) dm->ant_type = ODM_FIX_MAIN_ANT; else if (dm->antdiv_select == 2) dm->ant_type = ODM_FIX_AUX_ANT; - else { /* if (dm->antdiv_select==0) */ + else { /* @if (dm->antdiv_select==0) */ dm->ant_type = ODM_AUTO_ANT; - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) /*Stop Antenna diversity for CMW500 testing case*/ if (dm->consecutive_idlel_time >= 10) { dm->ant_type = ODM_FIX_MAIN_ANT; - PHYDM_DBG(dm, DBG_ANT_DIV, "[AntDiv: OFF] No TP case, consecutive_idlel_time=((%d))\n", dm->consecutive_idlel_time); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[AntDiv: OFF] No TP case, consecutive_idlel_time=((%d))\n", + dm->consecutive_idlel_time); } - #endif +#endif } - /* PHYDM_DBG(dm, DBG_ANT_DIV,"ant_type= (( %d )) , pre_ant_type= (( %d ))\n",dm->ant_type,dm->pre_ant_type); */ + /*PHYDM_DBG(dm, DBG_ANT_DIV,"ant_type= (%d), pre_ant_type= (%d)\n",*/ + /*dm->ant_type,dm->pre_ant_type); */ if (dm->ant_type != ODM_AUTO_ANT) { - PHYDM_DBG(dm, DBG_ANT_DIV, "Fix Antenna at (( %s ))\n", (dm->ant_type == ODM_FIX_MAIN_ANT) ? "MAIN" : "AUX"); + PHYDM_DBG(dm, DBG_ANT_DIV, "Fix Antenna at (( %s ))\n", + (dm->ant_type == ODM_FIX_MAIN_ANT) ? "MAIN" : "AUX"); if (dm->ant_type != dm->pre_ant_type) { - odm_ant_div_on_off(dm, ANTDIV_OFF); + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); if (dm->ant_type == ODM_FIX_MAIN_ANT) @@ -3792,110 +4797,90 @@ odm_ant_div( return; } else { if (dm->ant_type != dm->pre_ant_type) { - odm_ant_div_on_off(dm, ANTDIV_ON); + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); } dm->pre_ant_type = dm->ant_type; } +#if (defined(CONFIG_2T4R_ANTENNA)) + if (dm->ant_type2 != ODM_AUTO_ANT) { + PHYDM_DBG(dm, DBG_ANT_DIV, "PathB Fix Ant at (( %s ))\n", + (dm->ant_type2 == ODM_FIX_MAIN_ANT) ? "MAIN" : "AUX"); + if (dm->ant_type2 != dm->pre_ant_type2) { + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B); + odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); - /* 3 ----------------------------------------------------------------------------------------------------------- */ - /* 2 [--88E---] */ + if (dm->ant_type2 == ODM_FIX_MAIN_ANT) + phydm_update_rx_idle_ant_pathb(dm, MAIN_ANT); + else if (dm->ant_type2 == ODM_FIX_AUX_ANT) + phydm_update_rx_idle_ant_pathb(dm, AUX_ANT); + } + dm->pre_ant_type2 = dm->ant_type2; + return; + } + if (dm->ant_type2 != dm->pre_ant_type2) { + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_B); + odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); + } + dm->pre_ant_type2 = dm->ant_type2; + +#endif + +/*@ ----------------------------------------------- */ +/*@ [--8188E--] */ if (dm->support_ic_type == ODM_RTL8188E) { #if (RTL8188E_SUPPORT == 1) - if (dm->ant_div_type == CG_TRX_HW_ANTDIV || dm->ant_div_type == CGCS_RX_HW_ANTDIV) + if (dm->ant_div_type == CG_TRX_HW_ANTDIV || + dm->ant_div_type == CGCS_RX_HW_ANTDIV) odm_hw_ant_div(dm); -#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) +#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\ + (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) else if (dm->ant_div_type == CG_TRX_SMART_ANTDIV) odm_fast_ant_training(dm); #endif #endif - } - /* 2 [--92E---] */ +/*@ [--8192E--] */ #if (RTL8192E_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8192E) { - if (dm->ant_div_type == CGCS_RX_HW_ANTDIV || dm->ant_div_type == CG_TRX_HW_ANTDIV) + if (dm->ant_div_type == CGCS_RX_HW_ANTDIV || + dm->ant_div_type == CG_TRX_HW_ANTDIV) odm_hw_ant_div(dm); -#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) +#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\ + (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) else if (dm->ant_div_type == CG_TRX_SMART_ANTDIV) odm_fast_ant_training(dm); #endif - + } +#endif +/*@ [--8197F--] */ +#if (RTL8197F_SUPPORT == 1) + else if (dm->support_ic_type == ODM_RTL8197F) { + if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) + odm_hw_ant_div(dm); } #endif #if (RTL8723B_SUPPORT == 1) - /* 2 [--8723B---] */ +/*@ [--8723B---] */ else if (dm->support_ic_type == ODM_RTL8723B) { if (phydm_is_bt_enable_8723b(dm)) { PHYDM_DBG(dm, DBG_ANT_DIV, "[BT is enable!!!]\n"); if (fat_tab->is_become_linked == true) { - PHYDM_DBG(dm, DBG_ANT_DIV, "Set REG 948[9:6]=0x0\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Set REG 948[9:6]=0x0\n"); if (dm->support_ic_type == ODM_RTL8723B) - odm_set_bb_reg(dm, 0x948, BIT(9) | BIT(8) | BIT(7) | BIT(6), 0x0); + odm_set_bb_reg(dm, R_0x948, 0x3c0, 0x0) + ; fat_tab->is_become_linked = false; } } else { if (dm->ant_div_type == S0S1_SW_ANTDIV) { -#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY - odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK); -#endif - } else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) - odm_hw_ant_div(dm); - } - } -#endif - /*8723D*/ -#if (RTL8723D_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8723D) { - odm_hw_ant_div(dm); - /**/ - } -#endif - - /* 2 [--8821A---] */ -#if (RTL8821A_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8821) { - #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 - if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { - if (sat_tab->fix_beam_pattern_en != 0) { - PHYDM_DBG(dm, DBG_ANT_DIV, " [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n", sat_tab->fix_beam_pattern_codeword); - /*return;*/ - } else { - /*PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] ant_div_type = HL_SW_SMART_ANT_TYPE1\n");*/ - odm_fast_ant_training_hl_smart_antenna_type1(dm); - } - - } else - #endif - { - #ifdef ODM_CONFIG_BT_COEXIST - if (!dm->bt_info_table.is_bt_enabled) { /*BT disabled*/ - if (dm->ant_div_type == S0S1_SW_ANTDIV) { - dm->ant_div_type = CG_TRX_HW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, " [S0S1_SW_ANTDIV] -> [CG_TRX_HW_ANTDIV]\n"); - /*odm_set_bb_reg(dm, 0x8D4, BIT24, 1); */ - if (fat_tab->is_become_linked == true) - odm_ant_div_on_off(dm, ANTDIV_ON); - } - - } else { /*BT enabled*/ - - if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { - dm->ant_div_type = S0S1_SW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, " [CG_TRX_HW_ANTDIV] -> [S0S1_SW_ANTDIV]\n"); - /*odm_set_bb_reg(dm, 0x8D4, BIT24, 0);*/ - odm_ant_div_on_off(dm, ANTDIV_OFF); - } - } - #endif - - if (dm->ant_div_type == S0S1_SW_ANTDIV) { #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK); #endif @@ -3904,140 +4889,212 @@ odm_ant_div( } } #endif +/*@ [--8723D--]*/ +#if (RTL8723D_SUPPORT == 1) + else if (dm->support_ic_type == ODM_RTL8723D) { + if (dm->ant_div_type == S0S1_SW_ANTDIV) { + #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY + if (dm->antdiv_counter == CONFIG_ANTDIV_PERIOD) { + odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK); + dm->antdiv_counter--; + } else { + dm->antdiv_counter--; + } + if (dm->antdiv_counter == 0) + dm->antdiv_counter = CONFIG_ANTDIV_PERIOD; + #endif + } else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { + odm_hw_ant_div(dm); + } + } +#endif +#if (RTL8721D_SUPPORT == 1) + else if (dm->support_ic_type == ODM_RTL8721D) { + if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { + odm_hw_ant_div(dm); + } + } +#endif +/*@ [--8821A--] */ +#if (RTL8821A_SUPPORT == 1) + else if (dm->support_ic_type == ODM_RTL8821) { + #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 + if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { + if (sat_tab->fix_beam_pattern_en != 0) { + PHYDM_DBG(dm, DBG_ANT_DIV, + " [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n", + sat_tab->fix_beam_pattern_codeword); + /*return;*/ + } else { + odm_fast_ant_training_hl_smart_antenna_type1(dm); + } - /* 2 [--8821C---] */ + } else + #endif + { + #ifdef ODM_CONFIG_BT_COEXIST + if (!dm->bt_info_table.is_bt_enabled) { /*@BT disabled*/ + if (dm->ant_div_type == S0S1_SW_ANTDIV) { + dm->ant_div_type = CG_TRX_HW_ANTDIV; + PHYDM_DBG(dm, DBG_ANT_DIV, + " [S0S1_SW_ANTDIV] -> [CG_TRX_HW_ANTDIV]\n"); + /*odm_set_bb_reg(dm, 0x8d4, BIT24, 1);*/ + if (fat_tab->is_become_linked == true) + odm_ant_div_on_off(dm, + ANTDIV_ON, + ANT_PATH_A); + } + + } else { /*@BT enabled*/ + + if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { + dm->ant_div_type = S0S1_SW_ANTDIV; + PHYDM_DBG(dm, DBG_ANT_DIV, + " [CG_TRX_HW_ANTDIV] -> [S0S1_SW_ANTDIV]\n"); + /*odm_set_bb_reg(dm, 0x8d4, BIT24, 0);*/ + odm_ant_div_on_off(dm, ANTDIV_OFF, + ANT_PATH_A); + } + } + #endif + + if (dm->ant_div_type == S0S1_SW_ANTDIV) { + #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY + odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK); + #endif + } else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { + odm_hw_ant_div(dm); + } + } + } +#endif + +/*@ [--8821C--] */ #if (RTL8821C_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8821C) { if (!dm->is_bt_continuous_turn) { dm->ant_div_type = S0S1_SW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "is_bt_continuous_turn = ((%d)) ==> SW AntDiv\n", dm->is_bt_continuous_turn); + PHYDM_DBG(dm, DBG_ANT_DIV, + "is_bt_continuous_turn = ((%d)) ==> SW AntDiv\n", + dm->is_bt_continuous_turn); } else { dm->ant_div_type = CG_TRX_HW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "is_bt_continuous_turn = ((%d)) ==> HW AntDiv\n", dm->is_bt_continuous_turn); - odm_ant_div_on_off(dm, ANTDIV_ON); + PHYDM_DBG(dm, DBG_ANT_DIV, + "is_bt_continuous_turn = ((%d)) ==> HW AntDiv\n", + dm->is_bt_continuous_turn); + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); } + if (fat_tab->force_antdiv_type) + dm->ant_div_type = fat_tab->antdiv_type_dbg; + if (dm->ant_div_type == S0S1_SW_ANTDIV) { -#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY + #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK); -#endif - } else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) + #endif + } else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); odm_hw_ant_div(dm); + } } #endif - /* 2 [--8881A---] */ +/* @ [--8881A--] */ #if (RTL8881A_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8881A) odm_hw_ant_div(dm); #endif - /* 2 [--8812A---] */ +/*@ [--8812A--] */ #if (RTL8812A_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8812) odm_hw_ant_div(dm); #endif #if (RTL8188F_SUPPORT == 1) - /* [--8188F---]*/ - else if (dm->support_ic_type == ODM_RTL8188F) { -#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY +/*@ [--8188F--]*/ + else if (dm->support_ic_type == ODM_RTL8188F) { + #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK); -#endif + #endif } #endif - /* [--8822B---]*/ +/*@ [--8822B--]*/ #if (RTL8822B_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8822B) { + if (dm->ant_div_type == CG_TRX_HW_ANTDIV) + odm_hw_ant_div(dm); #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE2) { if (sat_tab->fix_beam_pattern_en != 0) - PHYDM_DBG(dm, DBG_ANT_DIV, " [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n", sat_tab->fix_beam_pattern_codeword); + PHYDM_DBG(dm, DBG_ANT_DIV, + " [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n", + sat_tab->fix_beam_pattern_codeword); else phydm_fast_ant_training_hl_smart_antenna_type2(dm); } #endif } #endif - - } - -void -odm_antsel_statistics( - void *dm_void, - void *phy_info_void, - u8 antsel_tr_mux, - u32 mac_id, - u32 utility, - u8 method, - u8 is_cck_rate - -) +void odm_antsel_statistics(void *dm_void, void *phy_info_void, + u8 antsel_tr_mux, u32 mac_id, u32 utility, u8 method, + u8 is_cck_rate) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - struct phydm_phyinfo_struct *phy_info = (struct phydm_phyinfo_struct *)phy_info_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct phydm_phyinfo_struct *phy_info = NULL; + + phy_info = (struct phydm_phyinfo_struct *)phy_info_void; if (method == RSSI_METHOD) { if (is_cck_rate) { if (antsel_tr_mux == ANT1_2G) { - if (fat_tab->main_ant_sum_cck[mac_id] > 65435) /*to prevent u16 overflow, max(RSSI)=100, 65435+100 = 65535 (u16)*/ + /*to prevent u16 overflow, max(RSSI)=100, 65435+100 = 65535 (u16)*/ + if (fat_tab->main_sum_cck[mac_id] > 65435) return; - fat_tab->main_ant_sum_cck[mac_id] += (u16)utility; - fat_tab->main_ant_cnt_cck[mac_id]++; + fat_tab->main_sum_cck[mac_id] += (u16)utility; + fat_tab->main_cnt_cck[mac_id]++; } else { - if (fat_tab->aux_ant_sum_cck[mac_id] > 65435) + if (fat_tab->aux_sum_cck[mac_id] > 65435) return; - fat_tab->aux_ant_sum_cck[mac_id] += (u16)utility; - fat_tab->aux_ant_cnt_cck[mac_id]++; + fat_tab->aux_sum_cck[mac_id] += (u16)utility; + fat_tab->aux_cnt_cck[mac_id]++; } } else { /*ofdm rate*/ if (antsel_tr_mux == ANT1_2G) { - if (fat_tab->main_ant_sum[mac_id] > 65435) + if (fat_tab->main_sum[mac_id] > 65435) return; - fat_tab->main_ant_sum[mac_id] += (u16)utility; - fat_tab->main_ant_cnt[mac_id]++; + fat_tab->main_sum[mac_id] += (u16)utility; + fat_tab->main_cnt[mac_id]++; } else { - if (fat_tab->aux_ant_sum[mac_id] > 65435) + if (fat_tab->aux_sum[mac_id] > 65435) return; - fat_tab->aux_ant_sum[mac_id] += (u16)utility; - fat_tab->aux_ant_cnt[mac_id]++; + fat_tab->aux_sum[mac_id] += (u16)utility; + fat_tab->aux_cnt[mac_id]++; } } } #ifdef ODM_EVM_ENHANCE_ANTDIV else if (method == EVM_METHOD) { + if (!fat_tab->get_stats) + return; + if (dm->rate_ss == 1) { - if (antsel_tr_mux == ANT1_2G) { - fat_tab->main_ant_evm_sum[mac_id] += ((phy_info->rx_mimo_evm_dbm[0])<<5); - fat_tab->main_ant_evm_cnt[mac_id]++; - } else { - fat_tab->aux_ant_evm_sum[mac_id] += ((phy_info->rx_mimo_evm_dbm[0])<<5); - fat_tab->aux_ant_evm_cnt[mac_id]++; - } - - } else {/*>= 2SS*/ - - if (antsel_tr_mux == ANT1_2G) { - fat_tab->main_ant_evm_2ss_sum[mac_id][0] += (phy_info->rx_mimo_evm_dbm[0]<<5); - fat_tab->main_ant_evm_2ss_sum[mac_id][1] += (phy_info->rx_mimo_evm_dbm[1]<<5); - fat_tab->main_ant_evm_2ss_cnt[mac_id]++; - - } else { - fat_tab->aux_ant_evm_2ss_sum[mac_id][0] += (phy_info->rx_mimo_evm_dbm[0]<<5); - fat_tab->aux_ant_evm_2ss_sum[mac_id][1] += (phy_info->rx_mimo_evm_dbm[1]<<5); - fat_tab->aux_ant_evm_2ss_cnt[mac_id]++; - } + phydm_statistics_evm_1ss(dm, phy_info, antsel_tr_mux, + mac_id, utility); + } else { /*@>= 2SS*/ + phydm_statistics_evm_2ss(dm, phy_info, antsel_tr_mux, + mac_id, utility); } } else if (method == CRC32_METHOD) { @@ -4050,66 +5107,157 @@ odm_antsel_statistics( } } else if (method == TP_METHOD) { - if (((utility <= ODM_RATEMCS15) && (utility >= ODM_RATEMCS0)) && - (fat_tab->fat_state_cnt <= dm->antdiv_tp_period) - ) { + if (!fat_tab->get_stats) + return; + if (utility <= ODM_RATEMCS15 && utility >= ODM_RATEMCS0) { if (antsel_tr_mux == ANT1_2G) { - fat_tab->antdiv_tp_main += (phy_rate_table[utility])<<5; - fat_tab->antdiv_tp_main_cnt++; + fat_tab->main_tp += (phy_rate_table[utility]) + << 5; + fat_tab->main_tp_cnt++; } else { - fat_tab->antdiv_tp_aux += (phy_rate_table[utility])<<5; - fat_tab->antdiv_tp_aux_cnt++; + fat_tab->aux_tp += (phy_rate_table[utility]) + << 5; + fat_tab->aux_tp_cnt++; } } } #endif } -void -odm_process_rssi_for_ant_div( - void *dm_void, - void *phy_info_void, - void *pkt_info_void -) +void odm_process_rssi_smart(void *dm_void, void *phy_info_void, + void *pkt_info_void, u8 rx_power_ant0) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_phyinfo_struct *phy_info = (struct phydm_phyinfo_struct *)phy_info_void; - struct phydm_perpkt_info_struct *pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -#if (defined(CONFIG_HL_SMART_ANTENNA)) - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - u32 beam_tmp; - u8 next_ant; - u8 train_pkt_number; -#endif - u8 rx_power_ant0 = phy_info->rx_mimo_signal_strength[0]; - u8 rx_power_ant1 = phy_info->rx_mimo_signal_strength[1]; - u8 rx_evm_ant0 = phy_info->rx_mimo_signal_quality[0]; - u8 rx_evm_ant1 = phy_info->rx_mimo_signal_quality[1]; - u8 rssi_avg; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_phyinfo_struct *phy_info = NULL; + struct phydm_perpkt_info_struct *pktinfo = NULL; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + + phy_info = (struct phydm_phyinfo_struct *)phy_info_void; + pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; + + if ((dm->support_ic_type & ODM_SMART_ANT_SUPPORT) && + pktinfo->is_packet_to_self && + fat_tab->fat_state == FAT_TRAINING_STATE) { + /* @(pktinfo->is_packet_match_bssid && (!pktinfo->is_packet_beacon)) */ + u8 antsel_tr_mux; + + antsel_tr_mux = (fat_tab->antsel_rx_keep_2 << 2) | + (fat_tab->antsel_rx_keep_1 << 1) | + fat_tab->antsel_rx_keep_0; + fat_tab->ant_sum_rssi[antsel_tr_mux] += rx_power_ant0; + fat_tab->ant_rssi_cnt[antsel_tr_mux]++; + } +} + +void odm_process_rssi_normal(void *dm_void, void *phy_info_void, + void *pkt_info_void, u8 rx_pwr0) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_phyinfo_struct *phy_info = NULL; + struct phydm_perpkt_info_struct *pktinfo = NULL; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u8 rx_evm0, rx_evm1; + boolean b_main; + + phy_info = (struct phydm_phyinfo_struct *)phy_info_void; + pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; + rx_evm0 = phy_info->rx_mimo_signal_quality[0]; + rx_evm1 = phy_info->rx_mimo_signal_quality[1]; + + if (!(pktinfo->is_packet_to_self || fat_tab->use_ctrl_frame_antdiv)) + return; + + if (dm->ant_div_type == S0S1_SW_ANTDIV) { + if (pktinfo->is_cck_rate || + dm->support_ic_type == ODM_RTL8188F) { + + b_main = (fat_tab->rx_idle_ant == MAIN_ANT); + fat_tab->antsel_rx_keep_0 = b_main ? ANT1_2G : ANT2_2G; + } + + odm_antsel_statistics(dm, phy_info, fat_tab->antsel_rx_keep_0, + pktinfo->station_id, rx_pwr0, RSSI_METHOD, + pktinfo->is_cck_rate); + } else { + odm_antsel_statistics(dm, phy_info, fat_tab->antsel_rx_keep_0, + pktinfo->station_id, rx_pwr0, RSSI_METHOD, + pktinfo->is_cck_rate); + + #ifdef ODM_EVM_ENHANCE_ANTDIV + if (!(dm->support_ic_type & ODM_EVM_ANTDIV_IC)) + return; + if (pktinfo->is_cck_rate) + return; + + odm_antsel_statistics(dm, phy_info, fat_tab->antsel_rx_keep_0, + pktinfo->station_id, rx_evm0, EVM_METHOD, + pktinfo->is_cck_rate); + odm_antsel_statistics(dm, phy_info, fat_tab->antsel_rx_keep_0, + pktinfo->station_id, rx_evm0, TP_METHOD, + pktinfo->is_cck_rate); + #endif + } +} + +void odm_process_rssi_for_ant_div(void *dm_void, void *phy_info_void, + void *pkt_info_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_phyinfo_struct *phy_info = NULL; + struct phydm_perpkt_info_struct *pktinfo = NULL; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; +#if (defined(CONFIG_HL_SMART_ANTENNA)) + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + u32 beam_tmp; + u8 next_ant; + u8 train_pkt_number; +#endif + boolean b_main; + u8 rx_power_ant0, rx_power_ant1; + u8 rx_evm_ant0, rx_evm_ant1; + u8 rssi_avg; + u64 rssi_linear = 0; + + phy_info = (struct phydm_phyinfo_struct *)phy_info_void; + pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; + rx_power_ant0 = phy_info->rx_mimo_signal_strength[0]; + rx_power_ant1 = phy_info->rx_mimo_signal_strength[1]; + rx_evm_ant0 = phy_info->rx_mimo_signal_quality[0]; + rx_evm_ant1 = phy_info->rx_mimo_signal_quality[1]; + + if ((dm->support_ic_type & ODM_IC_2SS) && !pktinfo->is_cck_rate) { + if (rx_power_ant1 < 100) { + rssi_linear = phydm_db_2_linear(rx_power_ant0) + + phydm_db_2_linear(rx_power_ant1); + /* @Rounding and removing fractional bits */ + rssi_linear = (rssi_linear + + (1 << (FRAC_BITS - 1))) >> FRAC_BITS; + /* @Calculate average RSSI */ + rssi_linear = DIVIDED_2(rssi_linear); + /* @averaged PWDB */ + rssi_avg = (u8)odm_convert_to_db(rssi_linear); + } - if ((dm->support_ic_type & ODM_IC_2SS) && (!pktinfo->is_cck_rate)) { - if (rx_power_ant1 < 100) - rssi_avg = (u8)odm_convert_to_db((odm_convert_to_linear(rx_power_ant0) + odm_convert_to_linear(rx_power_ant1))>>1); /*averaged PWDB*/ - } else { rx_power_ant0 = (u8)phy_info->rx_pwdb_all; rssi_avg = rx_power_ant0; } - + #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 if ((dm->ant_div_type == HL_SW_SMART_ANT_TYPE2) && (fat_tab->fat_state == FAT_TRAINING_STATE)) - phydm_process_rssi_for_hb_smtant_type2(dm, phy_info, pktinfo, rssi_avg); /*for 8822B*/ + phydm_process_rssi_for_hb_smtant_type2(dm, phy_info, pktinfo, rssi_avg); /*@for 8822B*/ else #endif #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 #ifdef CONFIG_FAT_PATCH - if ((dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) && (fat_tab->fat_state == FAT_TRAINING_STATE)) { - /*[Beacon]*/ + if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1 && fat_tab->fat_state == FAT_TRAINING_STATE) { + /*@[Beacon]*/ if (pktinfo->is_packet_beacon) { sat_tab->beacon_counter++; - PHYDM_DBG(dm, DBG_ANT_DIV, "MatchBSSID_beacon_counter = ((%d))\n", sat_tab->beacon_counter); + PHYDM_DBG(dm, DBG_ANT_DIV, + "MatchBSSID_beacon_counter = ((%d))\n", + sat_tab->beacon_counter); if (sat_tab->beacon_counter >= sat_tab->pre_beacon_counter + 2) { if (sat_tab->ant_num > 1) { @@ -4119,32 +5267,40 @@ odm_process_rssi_for_ant_div( sat_tab->update_beam_idx++; - PHYDM_DBG(dm, DBG_ANT_DIV, "pre_beacon_counter = ((%d)), pkt_counter = ((%d)), update_beam_idx = ((%d))\n", - sat_tab->pre_beacon_counter, sat_tab->pkt_counter, sat_tab->update_beam_idx); + PHYDM_DBG(dm, DBG_ANT_DIV, + "pre_beacon_counter = ((%d)), pkt_counter = ((%d)), update_beam_idx = ((%d))\n", + sat_tab->pre_beacon_counter, + sat_tab->pkt_counter, + sat_tab->update_beam_idx); sat_tab->pre_beacon_counter = sat_tab->beacon_counter; sat_tab->pkt_counter = 0; } } - /*[data]*/ + /*@[data]*/ else if (pktinfo->is_packet_to_self) { if (sat_tab->pkt_skip_statistic_en == 0) { - /* + /*@ PHYDM_DBG(dm, DBG_ANT_DIV, "StaID[%d]: antsel_pathA = ((%d)), hw_antsw_occur = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n", pktinfo->station_id, fat_tab->antsel_rx_keep_0, fat_tab->hw_antsw_occur, sat_tab->fast_training_beam_num, rx_power_ant0); */ - PHYDM_DBG(dm, DBG_ANT_DIV, "ID[%d][pkt_cnt = %d]: {ANT, Beam} = {%d, %d}, RSSI = ((%d))\n", - pktinfo->station_id, sat_tab->pkt_counter, fat_tab->antsel_rx_keep_0, sat_tab->fast_training_beam_num, rx_power_ant0); + PHYDM_DBG(dm, DBG_ANT_DIV, + "ID[%d][pkt_cnt = %d]: {ANT, Beam} = {%d, %d}, RSSI = ((%d))\n", + pktinfo->station_id, + sat_tab->pkt_counter, + fat_tab->antsel_rx_keep_0, + sat_tab->fast_training_beam_num, + rx_power_ant0); sat_tab->pkt_rssi_sum[fat_tab->antsel_rx_keep_0][sat_tab->fast_training_beam_num] += rx_power_ant0; sat_tab->pkt_rssi_cnt[fat_tab->antsel_rx_keep_0][sat_tab->fast_training_beam_num]++; sat_tab->pkt_counter++; - #if 1 +#if 1 train_pkt_number = sat_tab->beam_train_cnt[fat_tab->rx_idle_ant - 1][sat_tab->fast_training_beam_num]; - #else - train_pkt_number = sat_tab->per_beam_training_pkt_num; - #endif +#else + train_pkt_number = sat_tab->per_beam_training_pkt_num; +#endif /*Swich Antenna erery N pkts*/ if (sat_tab->pkt_counter == train_pkt_number) { @@ -4156,7 +5312,7 @@ odm_process_rssi_for_ant_div( sat_tab->update_beam_idx++; PHYDM_DBG(dm, DBG_ANT_DIV, "pre_beacon_counter = ((%d)), update_beam_idx_counter = ((%d))\n", - sat_tab->pre_beacon_counter, sat_tab->update_beam_idx); + sat_tab->pre_beacon_counter, sat_tab->update_beam_idx); sat_tab->pre_beacon_counter = sat_tab->beacon_counter; sat_tab->pkt_counter = 0; @@ -4173,57 +5329,66 @@ odm_process_rssi_for_ant_div( if (sat_tab->fast_training_beam_num >= (sat_tab->beam_patten_num_each_ant - 1)) { fat_tab->fat_state = FAT_DECISION_STATE; - #if DEV_BUS_TYPE == RT_PCI_INTERFACE - odm_fast_ant_training_hl_smart_antenna_type1(dm); - #else - odm_schedule_work_item(&sat_tab->hl_smart_antenna_decision_workitem); - #endif - +#if DEV_BUS_TYPE == RT_PCI_INTERFACE + if (dm->support_interface == ODM_ITRF_PCIE) + odm_fast_ant_training_hl_smart_antenna_type1(dm); +#endif +#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE + if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) + odm_schedule_work_item(&sat_tab->hl_smart_antenna_decision_workitem); +#endif } else { sat_tab->fast_training_beam_num++; - PHYDM_DBG(dm, DBG_ANT_DIV, "Update Beam_num (( %d )) -> (( %d ))\n", beam_tmp, sat_tab->fast_training_beam_num); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Update Beam_num (( %d )) -> (( %d ))\n", + beam_tmp, + sat_tab->fast_training_beam_num); phydm_set_all_ant_same_beam_num(dm); fat_tab->fat_state = FAT_TRAINING_STATE; } } - } #else - if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { + if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { if ((dm->support_ic_type & ODM_HL_SMART_ANT_TYPE1_SUPPORT) && - (pktinfo->is_packet_to_self) && - (fat_tab->fat_state == FAT_TRAINING_STATE) - ) { + pktinfo->is_packet_to_self && + fat_tab->fat_state == FAT_TRAINING_STATE) { if (sat_tab->pkt_skip_statistic_en == 0) { - /* + /*@ PHYDM_DBG(dm, DBG_ANT_DIV, "StaID[%d]: antsel_pathA = ((%d)), hw_antsw_occur = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n", pktinfo->station_id, fat_tab->antsel_rx_keep_0, fat_tab->hw_antsw_occur, sat_tab->fast_training_beam_num, rx_power_ant0); */ - PHYDM_DBG(dm, DBG_ANT_DIV, "StaID[%d]: antsel_pathA = ((%d)), is_packet_to_self = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n", - pktinfo->station_id, fat_tab->antsel_rx_keep_0, pktinfo->is_packet_to_self, sat_tab->fast_training_beam_num, rx_power_ant0); - + PHYDM_DBG(dm, DBG_ANT_DIV, + "StaID[%d]: antsel_pathA = ((%d)), is_packet_to_self = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n", + pktinfo->station_id, + fat_tab->antsel_rx_keep_0, + pktinfo->is_packet_to_self, + sat_tab->fast_training_beam_num, + rx_power_ant0); sat_tab->pkt_rssi_sum[fat_tab->antsel_rx_keep_0][sat_tab->fast_training_beam_num] += rx_power_ant0; sat_tab->pkt_rssi_cnt[fat_tab->antsel_rx_keep_0][sat_tab->fast_training_beam_num]++; sat_tab->pkt_counter++; /*swich beam every N pkt*/ - if ((sat_tab->pkt_counter) >= (sat_tab->per_beam_training_pkt_num)) { + if (sat_tab->pkt_counter >= sat_tab->per_beam_training_pkt_num) { sat_tab->pkt_counter = 0; beam_tmp = sat_tab->fast_training_beam_num; if (sat_tab->fast_training_beam_num >= (sat_tab->beam_patten_num_each_ant - 1)) { fat_tab->fat_state = FAT_DECISION_STATE; - #if DEV_BUS_TYPE == RT_PCI_INTERFACE - odm_fast_ant_training_hl_smart_antenna_type1(dm); - #else - odm_schedule_work_item(&sat_tab->hl_smart_antenna_decision_workitem); - #endif - +#if DEV_BUS_TYPE == RT_PCI_INTERFACE + if (dm->support_interface == ODM_ITRF_PCIE) + odm_fast_ant_training_hl_smart_antenna_type1(dm); +#endif +#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE + if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) + odm_schedule_work_item(&sat_tab->hl_smart_antenna_decision_workitem); +#endif } else { sat_tab->fast_training_beam_num++; @@ -4240,51 +5405,27 @@ odm_process_rssi_for_ant_div( else #endif if (dm->ant_div_type == CG_TRX_SMART_ANTDIV) { - if ((dm->support_ic_type & ODM_SMART_ANT_SUPPORT) && (pktinfo->is_packet_to_self) && (fat_tab->fat_state == FAT_TRAINING_STATE)) { /* (pktinfo->is_packet_match_bssid && (!pktinfo->is_packet_beacon)) */ - u8 antsel_tr_mux; - antsel_tr_mux = (fat_tab->antsel_rx_keep_2 << 2) | (fat_tab->antsel_rx_keep_1 << 1) | fat_tab->antsel_rx_keep_0; - fat_tab->ant_sum_rssi[antsel_tr_mux] += rx_power_ant0; - fat_tab->ant_rssi_cnt[antsel_tr_mux]++; - } - } else { /* ant_div_type != CG_TRX_SMART_ANTDIV */ - if ((dm->support_ic_type & ODM_ANTDIV_SUPPORT) && (pktinfo->is_packet_to_self || fat_tab->use_ctrl_frame_antdiv)) { - if (dm->ant_div_type == S0S1_SW_ANTDIV) { - if (pktinfo->is_cck_rate || (dm->support_ic_type == ODM_RTL8188F)) - fat_tab->antsel_rx_keep_0 = (fat_tab->rx_idle_ant == MAIN_ANT) ? ANT1_2G : ANT2_2G; - - odm_antsel_statistics(dm, phy_info, fat_tab->antsel_rx_keep_0, pktinfo->station_id, rx_power_ant0, RSSI_METHOD, pktinfo->is_cck_rate); - - } else { - - odm_antsel_statistics(dm, phy_info, fat_tab->antsel_rx_keep_0, pktinfo->station_id, rx_power_ant0, RSSI_METHOD, pktinfo->is_cck_rate); - - #ifdef ODM_EVM_ENHANCE_ANTDIV - if (dm->support_ic_type == ODM_RTL8192E) { - if (!pktinfo->is_cck_rate) { - odm_antsel_statistics(dm, phy_info, fat_tab->antsel_rx_keep_0, pktinfo->station_id, rx_evm_ant0, EVM_METHOD, pktinfo->is_cck_rate); - odm_antsel_statistics(dm, phy_info, fat_tab->antsel_rx_keep_0, pktinfo->station_id, rx_evm_ant0, TP_METHOD, pktinfo->is_cck_rate); - } - - } - #endif - } - } + odm_process_rssi_smart(dm, phy_info, pktinfo, + rx_power_ant0); + } else { /* @ant_div_type != CG_TRX_SMART_ANTDIV */ + odm_process_rssi_normal(dm, phy_info, pktinfo, + rx_power_ant0); } - /* PHYDM_DBG(dm,DBG_ANT_DIV,"is_cck_rate=%d, pwdb_all=%d\n",pktinfo->is_cck_rate, phy_info->rx_pwdb_all); */ - /* PHYDM_DBG(dm,DBG_ANT_DIV,"antsel_tr_mux=3'b%d%d%d\n",fat_tab->antsel_rx_keep_2, fat_tab->antsel_rx_keep_1, fat_tab->antsel_rx_keep_0); */ +#if 0 +/* PHYDM_DBG(dm,DBG_ANT_DIV,"is_cck_rate=%d, pwdb_all=%d\n", + * pktinfo->is_cck_rate, phy_info->rx_pwdb_all); + * PHYDM_DBG(dm,DBG_ANT_DIV,"antsel_tr_mux=3'b%d%d%d\n", + * fat_tab->antsel_rx_keep_2, fat_tab->antsel_rx_keep_1, + * fat_tab->antsel_rx_keep_0); + */ +#endif } -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -void -odm_set_tx_ant_by_tx_info( - void *dm_void, - u8 *desc, - u8 mac_id - -) +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT)) +void odm_set_tx_ant_by_tx_info(void *dm_void, u8 *desc, u8 mac_id) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; if (!(dm->support_ability & ODM_BB_ANT_DIV)) return; @@ -4292,46 +5433,60 @@ odm_set_tx_ant_by_tx_info( if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) return; - - if (dm->support_ic_type == ODM_RTL8723B) { -#if (RTL8723B_SUPPORT == 1) + if (dm->support_ic_type == (ODM_RTL8723B | ODM_RTL8721D)) { +#if (RTL8723B_SUPPORT == 1 || RTL8721D_SUPPORT == 1) SET_TX_DESC_ANTSEL_A_8723B(desc, fat_tab->antsel_a[mac_id]); - /*PHYDM_DBG(dm,DBG_ANT_DIV, "[8723B] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n", - mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], fat_tab->antsel_a[mac_id]);*/ +/*PHYDM_DBG(dm,DBG_ANT_DIV, + * "[8723B] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n", + * mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], + * fat_tab->antsel_a[mac_id]); + */ #endif } else if (dm->support_ic_type == ODM_RTL8821) { #if (RTL8821A_SUPPORT == 1) SET_TX_DESC_ANTSEL_A_8812(desc, fat_tab->antsel_a[mac_id]); - /*PHYDM_DBG(dm,DBG_ANT_DIV, "[8821A] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n", - mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], fat_tab->antsel_a[mac_id]);*/ +/*PHYDM_DBG(dm,DBG_ANT_DIV, + * "[8821A] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n", + * mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], + * fat_tab->antsel_a[mac_id]); + */ #endif } else if (dm->support_ic_type == ODM_RTL8188E) { #if (RTL8188E_SUPPORT == 1) SET_TX_DESC_ANTSEL_A_88E(desc, fat_tab->antsel_a[mac_id]); SET_TX_DESC_ANTSEL_B_88E(desc, fat_tab->antsel_b[mac_id]); SET_TX_DESC_ANTSEL_C_88E(desc, fat_tab->antsel_c[mac_id]); - /*PHYDM_DBG(dm,DBG_ANT_DIV, "[8188E] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n", - mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], fat_tab->antsel_a[mac_id]);*/ +/*PHYDM_DBG(dm,DBG_ANT_DIV, + * "[8188E] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n", + * mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], + * fat_tab->antsel_a[mac_id]); + */ #endif } else if (dm->support_ic_type == ODM_RTL8821C) { #if (RTL8821C_SUPPORT == 1) SET_TX_DESC_ANTSEL_A_8821C(desc, fat_tab->antsel_a[mac_id]); - /*PHYDM_DBG(dm,DBG_ANT_DIV, "[8821C] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n", - mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], fat_tab->antsel_a[mac_id]);*/ +/*PHYDM_DBG(dm,DBG_ANT_DIV, + * "[8821C] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n", + * mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], + * fat_tab->antsel_a[mac_id]); + */ #endif + } else if (dm->support_ic_type == ODM_RTL8822B) { +#if (RTL8822B_SUPPORT == 1) + SET_TX_DESC_ANTSEL_A_8822B(desc, fat_tab->antsel_a[mac_id]); +#endif + } } #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -void -odm_set_tx_ant_by_tx_info( - struct rtl8192cd_priv *priv, - struct tx_desc *pdesc, - unsigned short aid -) +void odm_set_tx_ant_by_tx_info( + struct rtl8192cd_priv *priv, + struct tx_desc *pdesc, + unsigned short aid) { - struct dm_struct *dm = GET_PDM_ODM(priv);/*&(priv->pshare->_dmODM);*/ - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = GET_PDM_ODM(priv); /*@&(priv->pshare->_dmODM);*/ + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; if (!(dm->support_ability & ODM_BB_ANT_DIV)) return; @@ -4340,15 +5495,30 @@ odm_set_tx_ant_by_tx_info( return; if (dm->support_ic_type == ODM_RTL8881A) { +#if 0 /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__); */ +#endif pdesc->Dword6 &= set_desc(~(BIT(18) | BIT(17) | BIT(16))); pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16); } else if (dm->support_ic_type == ODM_RTL8192E) { +#if 0 /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8192E******\n",__FUNCTION__,__LINE__); */ +#endif pdesc->Dword6 &= set_desc(~(BIT(18) | BIT(17) | BIT(16))); pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16); + } else if (dm->support_ic_type == ODM_RTL8197F) { +#if 0 + /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8192E******\n",__FUNCTION__,__LINE__); */ +#endif + pdesc->Dword6 &= set_desc(~(BIT(17) | BIT(16))); + pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16); + } else if (dm->support_ic_type == ODM_RTL8822B) { + pdesc->Dword6 &= set_desc(~(BIT(17) | BIT(16))); + pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16); } else if (dm->support_ic_type == ODM_RTL8188E) { +#if 0 /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8188E******\n",__FUNCTION__,__LINE__);*/ +#endif pdesc->Dword2 &= set_desc(~BIT(24)); pdesc->Dword2 &= set_desc(~BIT(25)); pdesc->Dword7 &= set_desc(~BIT(29)); @@ -4357,10 +5527,11 @@ odm_set_tx_ant_by_tx_info( pdesc->Dword2 |= set_desc(fat_tab->antsel_b[aid] << 25); pdesc->Dword7 |= set_desc(fat_tab->antsel_c[aid] << 29); - } else if (dm->support_ic_type == ODM_RTL8812) { - /*[path-A]*/ + /*@[path-A]*/ +#if 0 /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__);*/ +#endif pdesc->Dword6 &= set_desc(~BIT(16)); pdesc->Dword6 &= set_desc(~BIT(17)); @@ -4369,22 +5540,18 @@ odm_set_tx_ant_by_tx_info( pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16); pdesc->Dword6 |= set_desc(fat_tab->antsel_b[aid] << 17); pdesc->Dword6 |= set_desc(fat_tab->antsel_c[aid] << 18); - } } - -#if 1 /*def CONFIG_WLAN_HAL*/ -void -odm_set_tx_ant_by_tx_info_hal( - struct rtl8192cd_priv *priv, - void *pdesc_data, - u16 aid -) +#if 1 /*@def CONFIG_WLAN_HAL*/ +void odm_set_tx_ant_by_tx_info_hal( + struct rtl8192cd_priv *priv, + void *pdesc_data, + u16 aid) { - struct dm_struct *dm = GET_PDM_ODM(priv);/*&(priv->pshare->_dmODM);*/ - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - PTX_DESC_DATA_88XX pdescdata = (PTX_DESC_DATA_88XX)pdesc_data; + struct dm_struct *dm = GET_PDM_ODM(priv); /*@&(priv->pshare->_dmODM);*/ + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + PTX_DESC_DATA_88XX pdescdata = (PTX_DESC_DATA_88XX)pdesc_data; if (!(dm->support_ability & ODM_BB_ANT_DIV)) return; @@ -4392,37 +5559,48 @@ odm_set_tx_ant_by_tx_info_hal( if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) return; - if (dm->support_ic_type & (ODM_RTL8881A | ODM_RTL8192E | ODM_RTL8814A)) { - /*panic_printk("[%s] [%d] ******odm_set_tx_ant_by_tx_info_hal******\n",__FUNCTION__,__LINE__);*/ + if (dm->support_ic_type & (ODM_RTL8881A | ODM_RTL8192E | ODM_RTL8814A | + ODM_RTL8197F | ODM_RTL8822B)) { +#if 0 + /*panic_printk("[%s] [%d] **odm_set_tx_ant_by_tx_info_hal**\n", + * __FUNCTION__,__LINE__); + */ +#endif pdescdata->ant_sel = 1; pdescdata->ant_sel_a = fat_tab->antsel_a[aid]; } } -#endif /*#ifdef CONFIG_WLAN_HAL*/ +#endif /*@#ifdef CONFIG_WLAN_HAL*/ #endif - -void -odm_ant_div_config( - void *dm_void -) +void odm_ant_div_config(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) PHYDM_DBG(dm, DBG_ANT_DIV, "WIN Config Antenna Diversity\n"); - /* + /*@ if(dm->support_ic_type==ODM_RTL8723B) { - if((!dm->dm_swat_table.ANTA_ON || !dm->dm_swat_table.ANTB_ON)) + if((!dm->swat_tab.ANTA_ON || !dm->swat_tab.ANTB_ON)) dm->support_ability &= ~(ODM_BB_ANT_DIV); } */ - if (dm->support_ic_type == ODM_RTL8723D) { - dm->ant_div_type = S0S1_TRX_HW_ANTDIV; - /**/ - } + #if (defined(CONFIG_2T3R_ANTENNA)) + #if (RTL8822B_SUPPORT == 1) + dm->rfe_type = ANT_2T3R_RFE_TYPE; + #endif + #endif + + #if (defined(CONFIG_2T4R_ANTENNA)) + #if (RTL8822B_SUPPORT == 1) + dm->rfe_type = ANT_2T4R_RFE_TYPE; + #endif + #endif + + if (dm->support_ic_type == ODM_RTL8723D) + dm->ant_div_type = S0S1_SW_ANTDIV; #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) PHYDM_DBG(dm, DBG_ANT_DIV, "CE Config Antenna Diversity\n"); @@ -4430,20 +5608,29 @@ odm_ant_div_config( if (dm->support_ic_type == ODM_RTL8723B) dm->ant_div_type = S0S1_SW_ANTDIV; + if (dm->support_ic_type == ODM_RTL8723D) + dm->ant_div_type = S0S1_SW_ANTDIV; +#elif (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) + PHYDM_DBG(dm, DBG_ANT_DIV, "IOT Config Antenna Diversity\n"); + + if (dm->support_ic_type == ODM_RTL8721D) + dm->ant_div_type = CG_TRX_HW_ANTDIV; #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) PHYDM_DBG(dm, DBG_ANT_DIV, "AP Config Antenna Diversity\n"); - /* 2 [ NOT_SUPPORT_ANTDIV ] */ + /* @2 [ NOT_SUPPORT_ANTDIV ] */ #if (defined(CONFIG_NOT_SUPPORT_ANTDIV)) dm->support_ability &= ~(ODM_BB_ANT_DIV); - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Disable AntDiv function] : Not Support 2.4G & 5G Antenna Diversity\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Disable AntDiv function] : Not Support 2.4G & 5G Antenna Diversity\n"); - /* 2 [ 2G&5G_SUPPORT_ANTDIV ] */ + /* @2 [ 2G&5G_SUPPORT_ANTDIV ] */ #elif (defined(CONFIG_2G5G_SUPPORT_ANTDIV)) - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Enable AntDiv function] : 2.4G & 5G Support Antenna Diversity Simultaneously\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Enable AntDiv function] : 2.4G & 5G Support Antenna Diversity Simultaneously\n"); fat_tab->ant_div_2g_5g = (ODM_ANTDIV_2G | ODM_ANTDIV_5G); if (dm->support_ic_type & ODM_ANTDIV_SUPPORT) @@ -4451,38 +5638,49 @@ odm_ant_div_config( if (*dm->band_type == ODM_BAND_5G) { #if (defined(CONFIG_5G_CGCS_RX_DIVERSITY)) dm->ant_div_type = CGCS_RX_HW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); panic_printk("[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); -#elif (defined(CONFIG_5G_CG_TRX_DIVERSITY) || defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A)) +#elif (defined(CONFIG_5G_CG_TRX_DIVERSITY) ||\ + defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A)) dm->ant_div_type = CG_TRX_HW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); panic_printk("[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); #elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) dm->ant_div_type = CG_TRX_SMART_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 5G] : AntDiv type = CG_SMART_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 5G] : AntDiv type = CG_SMART_ANTDIV\n"); #elif (defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY)) dm->ant_div_type = S0S1_SW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 5G] : AntDiv type = S0S1_SW_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 5G] : AntDiv type = S0S1_SW_ANTDIV\n"); #endif } else if (*dm->band_type == ODM_BAND_2_4G) { #if (defined(CONFIG_2G_CGCS_RX_DIVERSITY)) dm->ant_div_type = CGCS_RX_HW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2.4G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); -#elif (defined(CONFIG_2G_CG_TRX_DIVERSITY) || defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A)) + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 2.4G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); +#elif (defined(CONFIG_2G_CG_TRX_DIVERSITY) ||\ + defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A)) dm->ant_div_type = CG_TRX_HW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2.4G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 2.4G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); #elif (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) dm->ant_div_type = CG_TRX_SMART_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2.4G] : AntDiv type = CG_SMART_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 2.4G] : AntDiv type = CG_SMART_ANTDIV\n"); #elif (defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY)) dm->ant_div_type = S0S1_SW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2.4G] : AntDiv type = S0S1_SW_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 2.4G] : AntDiv type = S0S1_SW_ANTDIV\n"); #endif } - /* 2 [ 5G_SUPPORT_ANTDIV ] */ + /* @2 [ 5G_SUPPORT_ANTDIV ] */ #elif (defined(CONFIG_5G_SUPPORT_ANTDIV)) - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n"); panic_printk("[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n"); fat_tab->ant_div_2g_5g = (ODM_ANTDIV_5G); if (*dm->band_type == ODM_BAND_5G) { @@ -4490,43 +5688,52 @@ odm_ant_div_config( dm->support_ability |= ODM_BB_ANT_DIV; #if (defined(CONFIG_5G_CGCS_RX_DIVERSITY)) dm->ant_div_type = CGCS_RX_HW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); panic_printk("[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); #elif (defined(CONFIG_5G_CG_TRX_DIVERSITY)) dm->ant_div_type = CG_TRX_HW_ANTDIV; panic_printk("[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); #elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) dm->ant_div_type = CG_TRX_SMART_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 5G] : AntDiv type = CG_SMART_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 5G] : AntDiv type = CG_SMART_ANTDIV\n"); #elif (defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY)) dm->ant_div_type = S0S1_SW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 5G] : AntDiv type = S0S1_SW_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 5G] : AntDiv type = S0S1_SW_ANTDIV\n"); #endif } else if (*dm->band_type == ODM_BAND_2_4G) { PHYDM_DBG(dm, DBG_ANT_DIV, "Not Support 2G ant_div_type\n"); dm->support_ability &= ~(ODM_BB_ANT_DIV); } - /* 2 [ 2G_SUPPORT_ANTDIV ] */ + /* @2 [ 2G_SUPPORT_ANTDIV ] */ #elif (defined(CONFIG_2G_SUPPORT_ANTDIV)) - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Enable AntDiv function] : Only 2.4G Support Antenna Diversity\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Enable AntDiv function] : Only 2.4G Support Antenna Diversity\n"); fat_tab->ant_div_2g_5g = (ODM_ANTDIV_2G); if (*dm->band_type == ODM_BAND_2_4G) { if (dm->support_ic_type & ODM_ANTDIV_2G_SUPPORT_IC) dm->support_ability |= ODM_BB_ANT_DIV; #if (defined(CONFIG_2G_CGCS_RX_DIVERSITY)) dm->ant_div_type = CGCS_RX_HW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2.4G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 2.4G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); #elif (defined(CONFIG_2G_CG_TRX_DIVERSITY)) dm->ant_div_type = CG_TRX_HW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2.4G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 2.4G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); #elif (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) dm->ant_div_type = CG_TRX_SMART_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2.4G] : AntDiv type = CG_SMART_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 2.4G] : AntDiv type = CG_SMART_ANTDIV\n"); #elif (defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY)) dm->ant_div_type = S0S1_SW_ANTDIV; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2.4G] : AntDiv type = S0S1_SW_ANTDIV\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ 2.4G] : AntDiv type = S0S1_SW_ANTDIV\n"); #endif } else if (*dm->band_type == ODM_BAND_5G) { PHYDM_DBG(dm, DBG_ANT_DIV, "Not Support 5G ant_div_type\n"); @@ -4535,39 +5742,41 @@ odm_ant_div_config( #endif #endif - PHYDM_DBG(dm, DBG_ANT_DIV, "[AntDiv Config Info] AntDiv_SupportAbility = (( %x ))\n", ((dm->support_ability & ODM_BB_ANT_DIV) ? 1 : 0)); - PHYDM_DBG(dm, DBG_ANT_DIV, "[AntDiv Config Info] be_fix_tx_ant = ((%d))\n", dm->dm_fat_table.b_fix_tx_ant); - + PHYDM_DBG(dm, DBG_ANT_DIV, + "[AntDiv Config Info] AntDiv_SupportAbility = (( %x ))\n", + ((dm->support_ability & ODM_BB_ANT_DIV) ? 1 : 0)); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[AntDiv Config Info] be_fix_tx_ant = ((%d))\n", + dm->dm_fat_table.b_fix_tx_ant); } - -void -odm_ant_div_timers( - void *dm_void, - u8 state -) +void odm_ant_div_timers(void *dm_void, u8 state) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (state == INIT_ANTDIV_TIMMER) { #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY odm_initialize_timer(dm, - &dm->dm_swat_table.phydm_sw_antenna_switch_timer, + &dm->dm_swat_table.sw_antdiv_timer, (void *)odm_sw_antdiv_callback, NULL, - "phydm_sw_antenna_switch_timer"); -#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) + "sw_antdiv_timer"); +#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\ + (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) odm_initialize_timer(dm, &dm->fast_ant_training_timer, - (void *)odm_fast_ant_training_callback, NULL, "fast_ant_training_timer"); + (void *)odm_fast_ant_training_callback, + NULL, "fast_ant_training_timer"); #endif #ifdef ODM_EVM_ENHANCE_ANTDIV odm_initialize_timer(dm, &dm->evm_fast_ant_training_timer, - (void *)odm_evm_fast_ant_training_callback, NULL, "evm_fast_ant_training_timer"); + (void *)phydm_evm_antdiv_callback, NULL, + "evm_fast_ant_training_timer"); #endif } else if (state == CANCEL_ANTDIV_TIMMER) { #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY odm_cancel_timer(dm, - &dm->dm_swat_table.phydm_sw_antenna_switch_timer); -#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) + &dm->dm_swat_table.sw_antdiv_timer); +#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\ + (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) odm_cancel_timer(dm, &dm->fast_ant_training_timer); #endif @@ -4577,8 +5786,9 @@ odm_ant_div_timers( } else if (state == RELEASE_ANTDIV_TIMMER) { #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY odm_release_timer(dm, - &dm->dm_swat_table.phydm_sw_antenna_switch_timer); -#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) + &dm->dm_swat_table.sw_antdiv_timer); +#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\ + (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) odm_release_timer(dm, &dm->fast_ant_training_timer); #endif @@ -4586,37 +5796,53 @@ odm_ant_div_timers( odm_release_timer(dm, &dm->evm_fast_ant_training_timer); #endif } - } -void -phydm_antdiv_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_antdiv_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - /*struct phydm_fat_struct* fat_tab = &dm->dm_fat_table;*/ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; u32 used = *_used; u32 out_len = *_out_len; + u32 dm_value[10] = {0}; + char help[] = "-h"; + u8 i, input_idx = 0; - if (dm_value[0] == 1) { /*fixed or auto antenna*/ + for (i = 0; i < 5; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]); + input_idx++; + } + } + if (input_idx == 0) + return; + + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "{1} {0:auto, 1:fix main, 2:fix auto}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{2} {antdiv_period}\n"); + #if (RTL8821C_SUPPORT == 1) + PDM_SNPF(out_len, used, output + used, out_len - used, + "{3} {en} {0:Default, 1:HW_Div, 2:SW_Div}\n"); + #endif + + } else if (dm_value[0] == 1) { + /*@fixed or auto antenna*/ if (dm_value[1] == 0) { dm->ant_type = ODM_AUTO_ANT; - PDM_SNPF(out_len, used, output + used, - out_len - used, "AntDiv: Auto\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "AntDiv: Auto\n"); } else if (dm_value[1] == 1) { dm->ant_type = ODM_FIX_MAIN_ANT; - PDM_SNPF(out_len, used, output + used, - out_len - used, "AntDiv: Fix Main\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "AntDiv: Fix Main\n"); } else if (dm_value[1] == 2) { dm->ant_type = ODM_FIX_AUX_ANT; - PDM_SNPF(out_len, used, output + used, - out_len - used, "AntDiv: Fix Aux\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "AntDiv: Fix Aux\n"); } if (dm->ant_type != ODM_AUTO_ANT) { @@ -4629,74 +5855,144 @@ phydm_antdiv_debug( phydm_enable_antenna_diversity(dm); } dm->pre_ant_type = dm->ant_type; - } else if (dm_value[0] == 2) { /*dynamic period for AntDiv*/ - + } else if (dm_value[0] == 2) { + /*@dynamic period for AntDiv*/ dm->antdiv_period = (u8)dm_value[1]; PDM_SNPF(out_len, used, output + used, out_len - used, - "AntDiv_period = ((%d))\n", dm->antdiv_period); + "AntDiv_period=((%d))\n", dm->antdiv_period); } + #if (RTL8821C_SUPPORT == 1) + else if (dm_value[0] == 3 && + dm->support_ic_type == ODM_RTL8821C) { + /*Only for 8821C*/ + if (dm_value[1] == 0) { + fat_tab->force_antdiv_type = false; + PDM_SNPF(out_len, used, output + used, out_len - used, + "[8821C] AntDiv: Default\n"); + } else if (dm_value[1] == 1) { + fat_tab->force_antdiv_type = true; + fat_tab->antdiv_type_dbg = CG_TRX_HW_ANTDIV; + PDM_SNPF(out_len, used, output + used, out_len - used, + "[8821C] AntDiv: HW diversity\n"); + } else if (dm_value[1] == 2) { + fat_tab->force_antdiv_type = true; + fat_tab->antdiv_type_dbg = S0S1_SW_ANTDIV; + PDM_SNPF(out_len, used, output + used, out_len - used, + "[8821C] AntDiv: SW diversity\n"); + } + } + #endif + #ifdef ODM_EVM_ENHANCE_ANTDIV + else if (dm_value[0] == 4) { + if (dm_value[1] == 0) { + /*@init parameters for EVM AntDiv*/ + phydm_evm_sw_antdiv_init(dm); + PDM_SNPF(out_len, used, output + used, out_len - used, + "init evm antdiv parameters\n"); + } else if (dm_value[1] == 1) { + /*training number for EVM AntDiv*/ + dm->antdiv_train_num = (u8)dm_value[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "antdiv_train_num = ((%d))\n", + dm->antdiv_train_num); + } else if (dm_value[1] == 2) { + /*training interval for EVM AntDiv*/ + dm->antdiv_intvl = (u8)dm_value[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "antdiv_intvl = ((%d))\n", + dm->antdiv_intvl); + } else if (dm_value[1] == 3) { + /*@function period for EVM AntDiv*/ + dm->evm_antdiv_period = (u8)dm_value[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "evm_antdiv_period = ((%d))\n", + dm->evm_antdiv_period); + } else if (dm_value[1] == 100) {/*show parameters*/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "ant_type = ((%d))\n", dm->ant_type); + PDM_SNPF(out_len, used, output + used, out_len - used, + "antdiv_train_num = ((%d))\n", + dm->antdiv_train_num); + PDM_SNPF(out_len, used, output + used, out_len - used, + "antdiv_intvl = ((%d))\n", + dm->antdiv_intvl); + PDM_SNPF(out_len, used, output + used, out_len - used, + "evm_antdiv_period = ((%d))\n", + dm->evm_antdiv_period); + } + } + #ifdef CONFIG_2T4R_ANTENNA + else if (dm_value[0] == 5) { /*Only for 8822B 2T4R case*/ + + if (dm_value[1] == 0) { + dm->ant_type2 = ODM_AUTO_ANT; + PDM_SNPF(out_len, used, output + used, out_len - used, + "AntDiv: PathB Auto\n"); + } else if (dm_value[1] == 1) { + dm->ant_type2 = ODM_FIX_MAIN_ANT; + PDM_SNPF(out_len, used, output + used, out_len - used, + "AntDiv: PathB Fix Main\n"); + } else if (dm_value[1] == 2) { + dm->ant_type2 = ODM_FIX_AUX_ANT; + PDM_SNPF(out_len, used, output + used, out_len - used, + "AntDiv: PathB Fix Aux\n"); + } + + if (dm->ant_type2 != ODM_AUTO_ANT) { + odm_stop_antenna_switch_dm(dm); + if (dm->ant_type2 == ODM_FIX_MAIN_ANT) + phydm_update_rx_idle_ant_pathb(dm, MAIN_ANT); + else if (dm->ant_type2 == ODM_FIX_AUX_ANT) + phydm_update_rx_idle_ant_pathb(dm, AUX_ANT); + } else { + phydm_enable_antenna_diversity(dm); + } + dm->pre_ant_type2 = dm->ant_type2; + } + #endif + #endif *_used = used; *_out_len = out_len; } -#endif /*#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))*/ - -void -odm_ant_div_reset( - void *dm_void -) +void odm_ant_div_reset(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - if (dm->ant_div_type == S0S1_SW_ANTDIV) { -#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY + #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY + if (dm->ant_div_type == S0S1_SW_ANTDIV) odm_s0s1_sw_ant_div_reset(dm); -#endif - } - + #endif } -void -odm_antenna_diversity_init( - void *dm_void -) +void odm_antenna_diversity_init(void *dm_void) { -#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - -#if 0 - if (*(dm->mp_mode) == true) - return; -#endif + struct dm_struct *dm = (struct dm_struct *)dm_void; odm_ant_div_config(dm); odm_ant_div_init(dm); -#endif } -void -odm_antenna_diversity( - void *dm_void -) +void odm_antenna_diversity(void *dm_void) { -#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) + struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dm_struct *dm = (struct dm_struct *)dm_void; - - if (*dm->mp_mode == true) + if (*dm->mp_mode) return; if (!(dm->support_ability & ODM_BB_ANT_DIV)) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Return!!!] Not Support Antenna Diversity Function\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Return!!!] Not Support Antenna Diversity Function\n"); return; } if (dm->pause_ability & ODM_BB_ANT_DIV) { - - PHYDM_DBG(dm, DBG_ANT_DIV, "Return: Pause AntDIv in LV=%d\n", dm->pause_lv_table.lv_antdiv); + PHYDM_DBG(dm, DBG_ANT_DIV, "Return: Pause AntDIv in LV=%d\n", + dm->pause_lv_table.lv_antdiv); return; } odm_ant_div(dm); -#endif } +#endif /*@#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY*/ + diff --git a/hal/phydm/phydm_antdiv.h b/hal/phydm/phydm_antdiv.h index 0918afc..4cc776b 100644 --- a/hal/phydm/phydm_antdiv.h +++ b/hal/phydm/phydm_antdiv.h @@ -23,35 +23,49 @@ * *****************************************************************************/ -#ifndef __PHYDMANTDIV_H__ -#define __PHYDMANTDIV_H__ +#ifndef __PHYDMANTDIV_H__ +#define __PHYDMANTDIV_H__ -/*#define ANTDIV_VERSION "2.0" //2014.11.04*/ -/*#define ANTDIV_VERSION "2.1" //2015.01.13 Dino*/ -/*#define ANTDIV_VERSION "2.2" 2015.01.16 Dino*/ -/*#define ANTDIV_VERSION "3.1" 2015.07.29 YuChen, remove 92c 92d 8723a*/ -/*#define ANTDIV_VERSION "3.2" 2015.08.11 Stanley, disable antenna diversity when BT is enable for 8723B*/ -/*#define ANTDIV_VERSION "3.3" 2015.08.12 Stanley. 8723B does not need to check the antenna is control by BT, - because antenna diversity only works when BT is disable or radio off*/ -/*#define ANTDIV_VERSION "3.4" 2015.08.28 Dino 1.Add 8821A Smart Antenna 2. Add 8188F SW S0S1 Antenna Diversity*/ -/*#define ANTDIV_VERSION "3.5" 2015.10.07 Stanley Always check antenna detection result from BT-coex. for 8723B, not from PHYDM*/ -/*#define ANTDIV_VERSION "3.6"*/ /*2015.11.16 Stanley */ -/*#define ANTDIV_VERSION "3.7"*/ /*2015.11.20 Dino Add SmartAnt FAT Patch */ -/*#define ANTDIV_VERSION "3.8" 2015.12.21 Dino, Add SmartAnt dynamic training packet num */ -/*#define ANTDIV_VERSION "3.9" 2016.01.05 Dino, Add SmartAnt cmd for converting single & two smtant, and add cmd for adjust truth table */ -#define ANTDIV_VERSION "4.0" /*2017.05.25 Mark, Add SW antenna diversity for 8821c because HW transient issue */ +/*@#define ANTDIV_VERSION "2.0" //2014.11.04*/ +/*@#define ANTDIV_VERSION "2.1" //2015.01.13 Dino*/ +/*@#define ANTDIV_VERSION "2.2" 2015.01.16 Dino*/ +/*@#define ANTDIV_VERSION "3.1" 2015.07.29 YuChen,remove 92c 92d 8723a*/ +/*@#define ANTDIV_VERSION "3.2" 2015.08.11 Stanley, disable antenna*/ + /*@diversity when BT is enable for 8723B*/ +/*@#define ANTDIV_VERSION "3.3" 2015.08.12 Stanley. 8723B does not*/ + /*@need to check the antenna is control by BT,*/ + /*@because antenna diversity only works when */ + /*@BT is disable or radio off*/ +/*@#define ANTDIV_VERSION "3.4" 2015.08.28 Dino 1.Add 8821A Smart */ + /*@Antenna 2. Add 8188F SW S0S1 Antenna*/ + /*@Diversity*/ +/*@#define ANTDIV_VERSION "3.5" 2015.10.07 Stanley Always check antenna*/ + /*@detection result from BT-coex. for 8723B,*/ + /*@not from PHYDM*/ +/*@#define ANTDIV_VERSION "3.6"*/ /*@2015.11.16 Stanley */ +/*@#define ANTDIV_VERSION "3.7" 2015.11.20 Dino Add SmartAnt FAT Patch */ +/*@#define ANTDIV_VERSION "3.8" 2015.12.21 Dino, Add SmartAnt dynamic*/ + /*@training packet num */ +/*@#define ANTDIV_VERSION "3.9" 2016.01.05 Dino, Add SmartAnt cmd for*/ + /*@converting single & two smtant, and add cmd*/ + /*@for adjust truth table */ +#define ANTDIV_VERSION "4.0" /*@2017.05.25 Mark, Add SW antenna diversity*/ + /*@for 8821c because HW transient issue */ -/* 1 ============================================================ +/* @1 ============================================================ * 1 Definition - * 1 ============================================================ */ + * 1 ============================================================ + */ #define ANTDIV_INIT 0xff -#define MAIN_ANT 1 /*ant A or ant Main or S1*/ -#define AUX_ANT 2 /*AntB or ant Aux or S0*/ -#define MAX_ANT 3 /* 3 for AP using*/ +#define MAIN_ANT 1 /*@ant A or ant Main or S1*/ +#define AUX_ANT 2 /*@AntB or ant Aux or S0*/ +#define MAX_ANT 3 /* @3 for AP using*/ -#define ANT1_2G 0 /* = ANT2_5G for 8723D BTG S1 RX S0S1 diversity for 8723D, TX fixed at S1 */ -#define ANT2_2G 1 /* = ANT1_5G for 8723D BTG S0 RX S0S1 diversity for 8723D, TX fixed at S1 */ +#define ANT1_2G 0 +/* @= ANT2_5G for 8723D BTG S1 RX S0S1 diversity for 8723D, TX fixed at S1 */ +#define ANT2_2G 1 +/* @= ANT1_5G for 8723D BTG S0 RX S0S1 diversity for 8723D, TX fixed at S1 */ /*smart antenna*/ #define SUPPORT_RF_PATH_NUM 4 #define SUPPORT_BEAM_PATTERN_NUM 4 @@ -63,21 +77,27 @@ #define FIX_TX_AT_MAIN 1 #define FIX_AUX_AT_MAIN 2 -/* Antenna Diversty Control type */ +/* @Antenna Diversty Control type */ #define ODM_AUTO_ANT 0 #define ODM_FIX_MAIN_ANT 1 #define ODM_FIX_AUX_ANT 2 -#define ODM_N_ANTDIV_SUPPORT (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8188F | ODM_RTL8723D | ODM_RTL8195A) -#define ODM_AC_ANTDIV_SUPPORT (ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8812 | ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814B) -#define ODM_ANTDIV_SUPPORT (ODM_N_ANTDIV_SUPPORT | ODM_AC_ANTDIV_SUPPORT) +#define ODM_N_ANTDIV_SUPPORT (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B |\ + ODM_RTL8188F | ODM_RTL8723D | ODM_RTL8195A |\ + ODM_RTL8197F | ODM_RTL8721D) +#define ODM_AC_ANTDIV_SUPPORT (ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8812 |\ + ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814B) +#define ODM_ANTDIV_SUPPORT (ODM_N_ANTDIV_SUPPORT | ODM_AC_ANTDIV_SUPPORT) #define ODM_SMART_ANT_SUPPORT (ODM_RTL8188E | ODM_RTL8192E) #define ODM_HL_SMART_ANT_TYPE1_SUPPORT (ODM_RTL8821 | ODM_RTL8822B) -#define ODM_ANTDIV_2G_SUPPORT_IC (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8881A | ODM_RTL8188F | ODM_RTL8723D) -#define ODM_ANTDIV_5G_SUPPORT_IC (ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8812 | ODM_RTL8821C) +#define ODM_ANTDIV_2G_SUPPORT_IC (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B |\ + ODM_RTL8881A | ODM_RTL8188F | ODM_RTL8723D |\ + ODM_RTL8197F) +#define ODM_ANTDIV_5G_SUPPORT_IC (ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8812 |\ + ODM_RTL8821C | ODM_RTL8822B) -#define ODM_EVM_ENHANCE_ANTDIV_SUPPORT_IC (ODM_RTL8192E) +#define ODM_EVM_ANTDIV_IC (ODM_RTL8192E | ODM_RTL8197F | ODM_RTL8822B) #define ODM_ANTDIV_2G BIT(0) #define ODM_ANTDIV_5G BIT(1) @@ -85,6 +105,10 @@ #define ANTDIV_ON 1 #define ANTDIV_OFF 0 +#define ANT_PATH_A 0 +#define ANT_PATH_B 1 +#define ANT_PATH_AB 2 + #define FAT_ON 1 #define FAT_OFF 0 @@ -112,6 +136,9 @@ #define FORCE_RSSI_DIFF 10 +#define HT_IDX 16 +#define VHT_IDX 20 + #define CSI_ON 1 #define CSI_OFF 0 @@ -138,25 +165,34 @@ #define RSSI_CHECK_RESET_PERIOD 10 #define RSSI_CHECK_THRESHOLD 50 -/*Hong Lin Smart antenna*/ +/*@Hong Lin Smart antenna*/ #define HL_SMTANT_2WIRE_DATA_LEN 24 -/* 1 ============================================================ +#if (RTL8723D_SUPPORT == 1) + #ifndef CONFIG_ANTDIV_PERIOD + #define CONFIG_ANTDIV_PERIOD 1 + #endif +#endif +/* @1 ============================================================ * 1 structure - * 1 ============================================================ */ + * 1 ============================================================ + */ struct sw_antenna_switch { - u8 double_chk_flag; /*If current antenna RSSI > "RSSI_CHECK_THRESHOLD", than check this antenna again*/ + u8 double_chk_flag; + /*@If current antenna RSSI > "RSSI_CHECK_THRESHOLD", than*/ + /*@check this antenna again*/ u8 try_flag; s32 pre_rssi; u8 cur_antenna; - u8 pre_antenna; + u8 pre_ant; u8 rssi_trying; u8 reset_idx; u8 train_time; - u8 train_time_flag; /*base on RSSI difference between two antennas*/ - struct phydm_timer_list phydm_sw_antenna_switch_timer; + u8 train_time_flag; + /*@base on RSSI difference between two antennas*/ + struct phydm_timer_list sw_antdiv_timer; u32 pkt_cnt_sw_ant_div_by_ctrl_frame; boolean is_sw_ant_div_by_ctrl_frame; @@ -166,7 +202,7 @@ struct sw_antenna_switch { #endif #endif - /* AntDect (Before link Antenna Switch check) need to be moved*/ + /* @AntDect (Before link Antenna Switch check) need to be moved*/ u16 single_ant_counter; u16 dual_ant_counter; u16 aux_fail_detec_counter; @@ -174,25 +210,22 @@ struct sw_antenna_switch { u8 swas_no_link_state; u32 swas_no_link_bk_reg948; boolean ANTA_ON; /*To indicate ant A is or not*/ - boolean ANTB_ON; /*To indicate ant B is on or not*/ + boolean ANTB_ON; /*@To indicate ant B is on or not*/ boolean pre_aux_fail_detec; boolean rssi_ant_dect_result; u8 ant_5g; u8 ant_2g; - - }; - #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) struct _BF_DIV_COEX_ { boolean w_bfer_client[ODM_ASSOCIATE_ENTRY_NUM]; boolean w_bfee_client[ODM_ASSOCIATE_ENTRY_NUM]; - u32 MA_rx_TP[ODM_ASSOCIATE_ENTRY_NUM]; - u32 MA_rx_TP_DIV[ODM_ASSOCIATE_ENTRY_NUM]; + u32 MA_rx_TP[ODM_ASSOCIATE_ENTRY_NUM]; + u32 MA_rx_TP_DIV[ODM_ASSOCIATE_ENTRY_NUM]; - u8 bd_ccoex_type_wbfer; + u8 bd_ccoex_type_wbfer; u8 num_txbfee_client; u8 num_txbfer_client; u8 bdc_try_counter; @@ -215,7 +248,6 @@ struct _BF_DIV_COEX_ { #endif #endif - struct phydm_fat_struct { u8 bssid[6]; u8 antsel_rx_keep_0; @@ -231,35 +263,42 @@ struct phydm_fat_struct { u8 antsel_a[ODM_ASSOCIATE_ENTRY_NUM]; u8 antsel_b[ODM_ASSOCIATE_ENTRY_NUM]; u8 antsel_c[ODM_ASSOCIATE_ENTRY_NUM]; - u16 main_ant_sum[ODM_ASSOCIATE_ENTRY_NUM]; - u16 aux_ant_sum[ODM_ASSOCIATE_ENTRY_NUM]; - u16 main_ant_cnt[ODM_ASSOCIATE_ENTRY_NUM]; - u16 aux_ant_cnt[ODM_ASSOCIATE_ENTRY_NUM]; - u16 main_ant_sum_cck[ODM_ASSOCIATE_ENTRY_NUM]; - u16 aux_ant_sum_cck[ODM_ASSOCIATE_ENTRY_NUM]; - u16 main_ant_cnt_cck[ODM_ASSOCIATE_ENTRY_NUM]; - u16 aux_ant_cnt_cck[ODM_ASSOCIATE_ENTRY_NUM]; + u16 main_ht_cnt[HT_IDX]; + u16 aux_ht_cnt[HT_IDX]; + u16 main_vht_cnt[VHT_IDX]; + u16 aux_vht_cnt[VHT_IDX]; + u16 main_sum[ODM_ASSOCIATE_ENTRY_NUM]; + u16 aux_sum[ODM_ASSOCIATE_ENTRY_NUM]; + u16 main_cnt[ODM_ASSOCIATE_ENTRY_NUM]; + u16 aux_cnt[ODM_ASSOCIATE_ENTRY_NUM]; + u16 main_sum_cck[ODM_ASSOCIATE_ENTRY_NUM]; + u16 aux_sum_cck[ODM_ASSOCIATE_ENTRY_NUM]; + u16 main_cnt_cck[ODM_ASSOCIATE_ENTRY_NUM]; + u16 aux_cnt_cck[ODM_ASSOCIATE_ENTRY_NUM]; u8 rx_idle_ant; + u8 rx_idle_ant2; u8 rvrt_val; u8 ant_div_on_off; + u8 div_path_type; boolean is_become_linked; + boolean get_stats; u32 min_max_rssi; u8 idx_ant_div_counter_2g; u8 idx_ant_div_counter_5g; u8 ant_div_2g_5g; #ifdef ODM_EVM_ENHANCE_ANTDIV - /*For 1SS RX phy rate*/ - u32 main_ant_evm_sum[ODM_ASSOCIATE_ENTRY_NUM]; - u32 aux_ant_evm_sum[ODM_ASSOCIATE_ENTRY_NUM]; - u32 main_ant_evm_cnt[ODM_ASSOCIATE_ENTRY_NUM]; - u32 aux_ant_evm_cnt[ODM_ASSOCIATE_ENTRY_NUM]; + /*@For 1SS RX phy rate*/ + u32 main_evm_sum[ODM_ASSOCIATE_ENTRY_NUM]; + u32 aux_evm_sum[ODM_ASSOCIATE_ENTRY_NUM]; + u32 main_evm_cnt[ODM_ASSOCIATE_ENTRY_NUM]; + u32 aux_evm_cnt[ODM_ASSOCIATE_ENTRY_NUM]; - /*For 2SS RX phy rate*/ - u32 main_ant_evm_2ss_sum[ODM_ASSOCIATE_ENTRY_NUM][2]; /*2SS with A1+B*/ - u32 aux_ant_evm_2ss_sum[ODM_ASSOCIATE_ENTRY_NUM][2]; /*2SS with A2+B*/ - u32 main_ant_evm_2ss_cnt[ODM_ASSOCIATE_ENTRY_NUM]; - u32 aux_ant_evm_2ss_cnt[ODM_ASSOCIATE_ENTRY_NUM]; + /*@For 2SS RX phy rate*/ + u32 main_evm_2ss_sum[ODM_ASSOCIATE_ENTRY_NUM][2];/*@2SS with A1+B*/ + u32 aux_evm_2ss_sum[ODM_ASSOCIATE_ENTRY_NUM][2];/*@2SS with A2+B*/ + u32 main_evm_2ss_cnt[ODM_ASSOCIATE_ENTRY_NUM]; + u32 aux_evm_2ss_cnt[ODM_ASSOCIATE_ENTRY_NUM]; boolean evm_method_enable; u8 target_ant_evm; @@ -277,10 +316,10 @@ struct phydm_fat_struct { u32 main_crc32_fail_cnt; u32 aux_crc32_fail_cnt; - u32 antdiv_tp_main; - u32 antdiv_tp_aux; - u32 antdiv_tp_main_cnt; - u32 antdiv_tp_aux_cnt; + u32 main_tp; + u32 aux_tp; + u32 main_tp_cnt; + u32 aux_tp_cnt; u8 pre_antdiv_rssi; u8 pre_antdiv_tp; @@ -290,31 +329,32 @@ struct phydm_fat_struct { u32 cck_ctrl_frame_cnt_aux; u32 ofdm_ctrl_frame_cnt_main; u32 ofdm_ctrl_frame_cnt_aux; - u32 main_ant_ctrl_frame_sum; - u32 aux_ant_ctrl_frame_sum; - u32 main_ant_ctrl_frame_cnt; - u32 aux_ant_ctrl_frame_cnt; + u32 main_ctrl_sum; + u32 aux_ctrl_sum; + u32 main_ctrl_cnt; + u32 aux_ctrl_cnt; #endif u8 b_fix_tx_ant; boolean fix_ant_bfee; boolean enable_ctrl_frame_antdiv; boolean use_ctrl_frame_antdiv; boolean *is_no_csi_feedback; + boolean force_antdiv_type; + u8 antdiv_type_dbg; u8 hw_antsw_occur; - u8 *p_force_tx_ant_by_desc; - u8 force_tx_ant_by_desc; /*A temp value, will hook to driver team's outer parameter later*/ - u8 *p_default_s0_s1; - u8 default_s0_s1; + u8 *p_force_tx_by_desc; + u8 force_tx_by_desc; + /*@A temp value, will hook to driver team's outer parameter later*/ + u8 *p_default_s0_s1; + u8 default_s0_s1; }; - -/* 1 ============================================================ +/* @1 ============================================================ * 1 enumeration - * 1 ============================================================ */ + * 1 ============================================================ + */ - - -enum fat_state /*Fast antenna training*/ +enum fat_state /*@Fast antenna training*/ { FAT_BEFORE_LINK_STATE = 0, FAT_PREPARE_STATE = 1, @@ -329,289 +369,163 @@ enum ant_div_type { FIXED_HW_ANTDIV = 0x03, CG_TRX_SMART_ANTDIV = 0x04, CGCS_RX_SW_ANTDIV = 0x05, - S0S1_SW_ANTDIV = 0x06, /*8723B intrnal switch S0 S1*/ - S0S1_TRX_HW_ANTDIV = 0x07, /*TRX S0S1 diversity for 8723D*/ - HL_SW_SMART_ANT_TYPE1 = 0x10, /*Hong-Lin Smart antenna use for 8821AE which is a 2 ant. entitys, and each ant. is equipped with 4 antenna patterns*/ - HL_SW_SMART_ANT_TYPE2 = 0x11 /*Hong-Bo Smart antenna use for 8822B which is a 2 ant. entitys*/ + S0S1_SW_ANTDIV = 0x06, /*@8723B intrnal switch S0 S1*/ + S0S1_TRX_HW_ANTDIV = 0x07, /*TRX S0S1 diversity for 8723D*/ + HL_SW_SMART_ANT_TYPE1 = 0x10, + /*@Hong-Lin Smart antenna use for 8821AE which is a 2 ant. entitys,*/ + /*@and each ant. is equipped with 4 antenna patterns*/ + HL_SW_SMART_ANT_TYPE2 = 0x11 + /*@Hong-Bo Smart antenna use for 8822B which is a 2 ant. entitys*/ }; - -/* 1 ============================================================ +/* @1 ============================================================ * 1 function prototype - * 1 ============================================================ */ + * 1 ============================================================ + */ +void odm_stop_antenna_switch_dm(void *dm_void); -void -odm_stop_antenna_switch_dm( - void *dm_void -); +void phydm_enable_antenna_diversity(void *dm_void); -void -phydm_enable_antenna_diversity( - void *dm_void -); +void odm_set_ant_config(void *dm_void, u8 ant_setting /* @0=A, 1=B, 2=C,....*/ + ); -void -odm_set_ant_config( - void *dm_void, - u8 ant_setting /* 0=A, 1=B, 2=C, .... */ -); +#define sw_ant_div_rest_after_link odm_sw_ant_div_rest_after_link +void odm_sw_ant_div_rest_after_link(void *dm_void); -#define sw_ant_div_rest_after_link odm_sw_ant_div_rest_after_link +void odm_ant_div_on_off(void *dm_void, u8 swch, u8 path); -void odm_sw_ant_div_rest_after_link( - void *dm_void -); - -void -odm_ant_div_on_off( - void *dm_void, - u8 swch -); - -void -odm_tx_by_tx_desc_or_reg( - void *dm_void, - u8 swch -); +void odm_tx_by_tx_desc_or_reg(void *dm_void, u8 swch); #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -void -phydm_antdiv_reset_statistic( - void *dm_void, - u32 macid -); +void phydm_antdiv_reset_statistic(void *dm_void, u32 macid); -void -odm_update_rx_idle_ant( - void *dm_void, - u8 ant -); +void odm_update_rx_idle_ant(void *dm_void, u8 ant); -void -phydm_set_antdiv_val( - void *dm_void, - u32 *val_buf, - u8 val_len -); +void phydm_update_rx_idle_ant_pathb(void *dm_void, u8 ant); + +void phydm_set_antdiv_val(void *dm_void, u32 *val_buf, u8 val_len); #if (RTL8723B_SUPPORT == 1) -void -odm_update_rx_idle_ant_8723b( - void *dm_void, - u8 ant, - u32 default_ant, - u32 optional_ant -); +void odm_update_rx_idle_ant_8723b(void *dm_void, u8 ant, u32 default_ant, + u32 optional_ant); #endif #if (RTL8188F_SUPPORT == 1) -void -phydm_update_rx_idle_antenna_8188F( - void *dm_void, - u32 default_ant -); +void phydm_update_rx_idle_antenna_8188F(void *dm_void, u32 default_ant); #endif #if (RTL8723D_SUPPORT == 1) -void -phydm_set_tx_ant_pwr_8723d( - void *dm_void, - u8 ant -); +void phydm_set_tx_ant_pwr_8723d(void *dm_void, u8 ant); -void -odm_update_rx_idle_ant_8723d( - void *dm_void, - u8 ant, - u32 default_ant, - u32 optional_ant -); +void odm_update_rx_idle_ant_8723d(void *dm_void, u8 ant, u32 default_ant, + u32 optional_ant); #endif #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -odm_sw_antdiv_callback( - struct phydm_timer_list *timer -); - -void -odm_sw_antdiv_workitem_callback( - void *context -); +void odm_sw_antdiv_callback(struct phydm_timer_list *timer); +void odm_sw_antdiv_workitem_callback(void *context); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -void -odm_sw_antdiv_workitem_callback( - void *context -); +void odm_sw_antdiv_workitem_callback(void *context); -void -odm_sw_antdiv_callback( - void *function_context -); +void odm_sw_antdiv_callback(void *function_context); #endif -void -odm_s0s1_sw_ant_div_by_ctrl_frame( - void *dm_void, - u8 step -); +void odm_s0s1_sw_ant_div_by_ctrl_frame(void *dm_void, u8 step); -void -odm_antsel_statistics_of_ctrl_frame( - void *dm_void, - u8 antsel_tr_mux, - u32 rx_pwdb_all -); +void odm_antsel_statistics_ctrl(void *dm_void, u8 antsel_tr_mux, + u32 rx_pwdb_all); -void -odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi( - void *dm_void, - void *phy_info_void, - void *pkt_info_void -); +void odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(void *dm_void, + void *phy_info_void, + void *pkt_info_void); #endif #ifdef ODM_EVM_ENHANCE_ANTDIV -void -phydm_evm_sw_antdiv_init( - void *dm_void -); +void phydm_evm_sw_antdiv_init(void *dm_void); -void -odm_evm_fast_ant_training_callback( - void *dm_void -); +void phydm_rx_rate_for_antdiv(void *dm_void, void *pkt_info_void); + +void phydm_antdiv_reset_rx_rate(void *dm_void); + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +void phydm_evm_antdiv_callback(struct phydm_timer_list *timer); + +void phydm_evm_antdiv_workitem_callback(void *context); + +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) +void phydm_evm_antdiv_callback(void *dm_void); + +void phydm_evm_antdiv_workitem_callback(void *context); + +#else +void phydm_evm_antdiv_callback(void *dm_void); #endif -void -odm_hw_ant_div( - void *dm_void -); - -#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -void -odm_fast_ant_training( - void *dm_void -); - -void -odm_fast_ant_training_callback( - void *dm_void -); - -void -odm_fast_ant_training_work_item_callback( - void *dm_void -); #endif -void -odm_ant_div_init( - void *dm_void -); +void odm_hw_ant_div(void *dm_void); -void -odm_ant_div( - void *dm_void -); +#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\ + (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) +void odm_fast_ant_training( + void *dm_void); -void -odm_antsel_statistics( - void *dm_void, - void *phy_info_void, - u8 antsel_tr_mux, - u32 mac_id, - u32 utility, - u8 method, - u8 is_cck_rate -); +void odm_fast_ant_training_callback(void *dm_void); -void -odm_process_rssi_for_ant_div( - void *dm_void, - void *phy_info_void, - void *pkt_info_void -); +void odm_fast_ant_training_work_item_callback(void *dm_void); +#endif +void odm_ant_div_init(void *dm_void); +void odm_ant_div(void *dm_void); + +void odm_antsel_statistics(void *dm_void, void *phy_info_void, + u8 antsel_tr_mux, u32 mac_id, u32 utility, u8 method, + u8 is_cck_rate); + +void odm_process_rssi_for_ant_div(void *dm_void, void *phy_info_void, + void *pkt_info_void); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -void -odm_set_tx_ant_by_tx_info( - void *dm_void, - u8 *desc, - u8 mac_id -); +void odm_set_tx_ant_by_tx_info(void *dm_void, u8 *desc, u8 mac_id); #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -struct tx_desc; /*declared tx_desc here or compile error happened when enabled 8822B*/ +struct tx_desc; +/*@declared tx_desc here or compile error happened when enabled 8822B*/ -void -odm_set_tx_ant_by_tx_info( - struct rtl8192cd_priv *priv, - struct tx_desc *pdesc, - unsigned short aid -); +void odm_set_tx_ant_by_tx_info(struct rtl8192cd_priv *priv, + struct tx_desc *pdesc, unsigned short aid); -#if 1/*def def CONFIG_WLAN_HAL*/ -void -odm_set_tx_ant_by_tx_info_hal( - struct rtl8192cd_priv *priv, - void *pdesc_data, - u16 aid -); -#endif /*#ifdef CONFIG_WLAN_HAL*/ +#if 1 /*@def def CONFIG_WLAN_HAL*/ +void odm_set_tx_ant_by_tx_info_hal(struct rtl8192cd_priv *priv, + void *pdesc_data, u16 aid); +#endif /*@#ifdef CONFIG_WLAN_HAL*/ #endif +void odm_ant_div_config(void *dm_void); -void -odm_ant_div_config( - void *dm_void -); +void odm_ant_div_timers(void *dm_void, u8 state); -void -odm_ant_div_timers( - void *dm_void, - u8 state -); +void phydm_antdiv_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); -void -phydm_antdiv_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -); +void odm_ant_div_reset(void *dm_void); -#endif /*#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))*/ +void odm_antenna_diversity_init(void *dm_void); -void -odm_ant_div_reset( - void *dm_void -); - -void -odm_antenna_diversity_init( - void *dm_void -); - -void -odm_antenna_diversity( - void *dm_void -); - -#endif /*#ifndef __ODMANTDIV_H__*/ +void odm_antenna_diversity(void *dm_void); +#endif /*@#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY*/ +#endif /*@#ifndef __ODMANTDIV_H__*/ diff --git a/hal/phydm/phydm_api.c b/hal/phydm/phydm_api.c index 9b959b4..eefa82a 100644 --- a/hal/phydm/phydm_api.c +++ b/hal/phydm/phydm_api.c @@ -23,70 +23,81 @@ * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * include files - * ************************************************************ */ + * ************************************************************ + */ #include "mp_precomp.h" #include "phydm_precomp.h" -void -phydm_dynamic_ant_weighting( - void *dm_void -) +void phydm_reset_bb_hw_cnt(void *dm_void) { -struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + + /*@ Reset all counter when 1 */ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + odm_set_bb_reg(dm, R_0x1eb4, BIT(25), 1); + odm_set_bb_reg(dm, R_0x1eb4, BIT(25), 0); + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + /*@ Reset all counter when 1 (including PMAC and PHY)*/ + /* Reset Page F counter*/ + odm_set_bb_reg(dm, R_0xb58, BIT(0), 1); + odm_set_bb_reg(dm, R_0xb58, BIT(0), 0); + } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { + odm_set_bb_reg(dm, R_0xf14, BIT(16), 0x1); + odm_set_bb_reg(dm, R_0xf14, BIT(16), 0x0); + } +} + +void phydm_dynamic_ant_weighting(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; #ifdef DYN_ANT_WEIGHTING_SUPPORT - #if (RTL8197F_SUPPORT == 1) + #if (RTL8197F_SUPPORT) if (dm->support_ic_type & (ODM_RTL8197F)) phydm_dynamic_ant_weighting_8197f(dm); #endif - #if (RTL8812A_SUPPORT == 1) + #if (RTL8812A_SUPPORT) if (dm->support_ic_type & (ODM_RTL8812)) { phydm_dynamic_ant_weighting_8812a(dm); } #endif - #if (RTL8822B_SUPPORT == 1) - if (dm->support_ic_type & (ODM_RTL8822B)) { + #if (RTL8822B_SUPPORT) + if (dm->support_ic_type & (ODM_RTL8822B)) phydm_dynamic_ant_weighting_8822b(dm); - } #endif #endif } #ifdef DYN_ANT_WEIGHTING_SUPPORT -void -phydm_dyn_ant_weight_dbg( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +void phydm_ant_weight_dbg(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - char help[] = "-h"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; + struct dm_struct *dm = (struct dm_struct *)dm_void; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; if ((strcmp(input[1], help) == 0)) { - PDM_SNPF(out_len, used, output + used, out_len - used, "echo dis_dym_ant_weighting {0/1}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "echo dis_dym_ant_weighting {0/1}\n"); } else { - PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); if (var1[0] == 1) { dm->is_disable_dym_ant_weighting = 1; - PDM_SNPF(out_len, used, output + used, out_len - used, "Disable dyn-ant-weighting\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Disable dyn-ant-weighting\n"); } else { dm->is_disable_dym_ant_weighting = 0; - PDM_SNPF(out_len, used, output + used, out_len - used, "Enable dyn-ant-weighting\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Enable dyn-ant-weighting\n"); } } *_used = used; @@ -94,255 +105,158 @@ phydm_dyn_ant_weight_dbg( } #endif -void -phydm_iq_gen_en( - void *dm_void -) +void phydm_trx_antenna_setting_init(void *dm_void, u8 num_rf_path) { -#ifdef PHYDM_COMPILE_IC_2SS - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 rx_ant = 0, tx_ant = 0; + u8 path_bitmap = 1; - #if (ODM_IC_11AC_SERIES_SUPPORT) - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - for (i = RF_PATH_A; i <= RF_PATH_B; i++) { - odm_set_rf_reg(dm, (enum rf_path)i, 0xEF, BIT(19), 0x1); /*RF mode table write enable*/ - odm_set_rf_reg(dm, (enum rf_path)i, 0x33, 0xF, 3); /*Select RX mode*/ - odm_set_rf_reg(dm, (enum rf_path)i, 0x3E, 0xfffff, 0x00036); /*Set Table data*/ - odm_set_rf_reg(dm, (enum rf_path)i, 0x3F, 0xfffff, 0x5AFCE); /*Set Table data*/ - odm_set_rf_reg(dm, (enum rf_path)i, 0xEF, BIT(19), 0x0); /*RF mode table write disable*/ - } - } - #endif + path_bitmap = (u8)phydm_gen_bitmask(num_rf_path); +#if 0 + /*PHYDM_DBG(dm, ODM_COMP_INIT, "path_bitmap=0x%x\n", path_bitmap);*/ #endif -} -void -phydm_dis_cdd( - void *dm_void -) -{ -#ifdef PHYDM_COMPILE_IC_2SS - struct dm_struct *dm = (struct dm_struct *)dm_void; + dm->tx_ant_status = path_bitmap; + dm->rx_ant_status = path_bitmap; - #if (ODM_IC_11AC_SERIES_SUPPORT) - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - odm_set_bb_reg(dm, 0x808, 0x3ffff00, 0); - odm_set_bb_reg(dm, 0x9ac, 0x1fff, 0); - odm_set_bb_reg(dm, 0x9ac, BIT(13), 1); - } - #endif -#endif -} - -void -phydm_pathb_q_matrix_rotate_en( - void *dm_void -) -{ -#ifdef PHYDM_COMPILE_IC_2SS - struct dm_struct *dm = (struct dm_struct *)dm_void; - - #if (ODM_IC_11AC_SERIES_SUPPORT) - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - phydm_iq_gen_en(dm); - - #ifdef PHYDM_COMMON_API_SUPPORT - if (phydm_api_trx_mode(dm, BB_PATH_AB, BB_PATH_AB, true) == false) - return; - #endif - - phydm_dis_cdd(dm); - odm_set_bb_reg(dm, 0x195c, MASKDWORD, 0x40000); /*Set Q matrix r_v11 =1*/ - phydm_pathb_q_matrix_rotate(dm, 0); - odm_set_bb_reg(dm, 0x191c, BIT(7), 1); /*Set Q matrix enable*/ - } - #endif -#endif -} - -void -phydm_pathb_q_matrix_rotate( - void *dm_void, - u16 phase_idx -) -{ -#ifdef PHYDM_COMPILE_IC_2SS - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 phase_table_0[12] = {0x40000, 0x376CF, 0x20000, 0x00000, 0xFE0000, 0xFC8930, - 0xFC0000, 0xFC8930, 0xFDFFFF, 0x000000, 0x020000, 0x0376CF}; - u32 phase_table_1[12] = {0x00000, 0x1FFFF, 0x376CF, 0x40000, 0x0376CF, 0x01FFFF, - 0x000000, 0xFDFFFF, 0xFC8930, 0xFC0000, 0xFC8930, 0xFDFFFF}; - - if (phase_idx >= 12) { - PHYDM_DBG(dm, ODM_COMP_API, "Phase Set Error: %d\n", phase_idx); + if (num_rf_path == PDM_1SS) return; - } - #if (ODM_IC_11AC_SERIES_SUPPORT) - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - odm_set_bb_reg(dm, 0x1954, 0xffffff, phase_table_0[phase_idx]); /*Set Q matrix r_v21*/ - odm_set_bb_reg(dm, 0x1950, 0xffffff, phase_table_1[phase_idx]); + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + if (dm->support_ic_type & + (ODM_RTL8192F | ODM_RTL8192E | ODM_RTL8197F)) { + dm->rx_ant_status = (u8)odm_get_bb_reg(dm, R_0xc04, 0x3); + dm->tx_ant_status = (u8)odm_get_bb_reg(dm, R_0x90c, 0x3); + } else if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8814A)) { + dm->rx_ant_status = (u8)odm_get_bb_reg(dm, R_0x808, 0xf); + dm->tx_ant_status = (u8)odm_get_bb_reg(dm, R_0x80c, 0xf); } #endif -#endif + #if (defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) + if (dm->support_ic_type & + (ODM_RTL8198F | ODM_RTL8814B | ODM_RTL8822C)) { + dm->rx_ant_status = (u8)odm_get_bb_reg(dm, R_0x824, 0xf0000); + dm->tx_ant_status = (u8)odm_get_bb_reg(dm, R_0x820, 0xf); + } + #endif + + PHYDM_DBG(dm, ODM_COMP_INIT, "[%s]ant_status{tx,rx}={0x%x, 0x%x}\n", + __func__, dm->tx_ant_status, dm->rx_ant_status); } -void -phydm_init_trx_antenna_setting( - void *dm_void -) +void phydm_config_ofdm_tx_path(void *dm_void, u32 path) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - - if (dm->support_ic_type & (ODM_RTL8814A)) { - u8 rx_ant = 0, tx_ant = 0; +#if (RTL8192E_SUPPORT || RTL8812A_SUPPORT) + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 ofdm_tx_path = 0x33; - rx_ant = (u8)odm_get_bb_reg(dm, ODM_REG(BB_RX_PATH, dm), ODM_BIT(BB_RX_PATH, dm)); - tx_ant = (u8)odm_get_bb_reg(dm, ODM_REG(BB_TX_PATH, dm), ODM_BIT(BB_TX_PATH, dm)); - dm->tx_ant_status = (tx_ant & 0xf); - dm->rx_ant_status = (rx_ant & 0xf); - } else if (dm->support_ic_type & (ODM_RTL8723D | ODM_RTL8821C | ODM_RTL8710B)) {/* JJ ADD 20161014 */ - dm->tx_ant_status = 0x1; - dm->rx_ant_status = 0x1; + if (dm->num_rf_path == PDM_1SS) + return; - } -} + switch (dm->support_ic_type) { + #if (RTL8192E_SUPPORT) + case ODM_RTL8192E: + if (path == BB_PATH_A) + odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x81121111); + else if (path == BB_PATH_B) + odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x82221222); + else if (path == BB_PATH_AB) + odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x83321333); -void -phydm_config_ofdm_tx_path( - void *dm_void, - u32 path -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; -#if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1)) - u8 ofdm_tx_path = 0x33; -#endif + break; + #endif -#if (RTL8192E_SUPPORT == 1) - if (dm->support_ic_type & (ODM_RTL8192E)) { - if (path == BB_PATH_A) { - odm_set_bb_reg(dm, 0x90c, MASKDWORD, 0x81121111); - /**/ - } else if (path == BB_PATH_B) { - odm_set_bb_reg(dm, 0x90c, MASKDWORD, 0x82221222); - /**/ - } else if (path == BB_PATH_AB) { - odm_set_bb_reg(dm, 0x90c, MASKDWORD, 0x83321333); - /**/ - } - - - } -#endif - -#if (RTL8812A_SUPPORT == 1) - if (dm->support_ic_type & (ODM_RTL8812)) { - if (path == BB_PATH_A) { + #if (RTL8812A_SUPPORT) + case ODM_RTL8812: + if (path == BB_PATH_A) ofdm_tx_path = 0x11; - /**/ - } else if (path == BB_PATH_B) { + else if (path == BB_PATH_B) ofdm_tx_path = 0x22; - /**/ - } else if (path == BB_PATH_AB) { + else if (path == BB_PATH_AB) ofdm_tx_path = 0x33; - /**/ - } - odm_set_bb_reg(dm, 0x80c, 0xff00, ofdm_tx_path); + odm_set_bb_reg(dm, R_0x80c, 0xff00, ofdm_tx_path); + + break; + #endif + + default: + break; } #endif } -void -phydm_config_ofdm_rx_path( - void *dm_void, - u32 path -) +void phydm_config_ofdm_rx_path(void *dm_void, u32 path) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 ofdm_rx_path = 0; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 val = 0; if (dm->support_ic_type & (ODM_RTL8192E)) { -#if (RTL8192E_SUPPORT == 1) - if (path == BB_PATH_A) { - ofdm_rx_path = 1; - /**/ - } else if (path == BB_PATH_B) { - ofdm_rx_path = 2; - /**/ - } else if (path == BB_PATH_AB) { - ofdm_rx_path = 3; - /**/ - } +#if (RTL8192E_SUPPORT) + if (path == BB_PATH_A) + val = 1; + else if (path == BB_PATH_B) + val = 2; + else if (path == BB_PATH_AB) + val = 3; - odm_set_bb_reg(dm, 0xC04, 0xff, (((ofdm_rx_path) << 4) | ofdm_rx_path)); - odm_set_bb_reg(dm, 0xD04, 0xf, ofdm_rx_path); + odm_set_bb_reg(dm, R_0xc04, 0xff, ((val << 4) | val)); + odm_set_bb_reg(dm, R_0xd04, 0xf, val); #endif } #if (RTL8812A_SUPPORT || RTL8822B_SUPPORT) else if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8822B)) { - if (path == BB_PATH_A) { - ofdm_rx_path = 1; - /**/ - } else if (path == BB_PATH_B) { - ofdm_rx_path = 2; - /**/ - } else if (path == BB_PATH_AB) { - ofdm_rx_path = 3; - /**/ - } + if (path == BB_PATH_A) + val = 1; + else if (path == BB_PATH_B) + val = 2; + else if (path == BB_PATH_AB) + val = 3; - odm_set_bb_reg(dm, 0x808, MASKBYTE0, ((ofdm_rx_path << 4) | ofdm_rx_path)); + odm_set_bb_reg(dm, R_0x808, MASKBYTE0, ((val << 4) | val)); } #endif } -void -phydm_config_cck_rx_antenna_init( - void *dm_void -) +void phydm_config_cck_rx_antenna_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (defined(PHYDM_COMPILE_ABOVE_2SS)) - /*CCK 2R CCA parameters*/ - odm_set_bb_reg(dm, 0xa00, BIT(15), 0x0); /*Disable antenna diversity*/ - odm_set_bb_reg(dm, 0xa70, BIT(7), 0); /*Concurrent CCA at LSB & USB*/ - odm_set_bb_reg(dm, 0xa74, BIT(8), 0); /*RX path diversity enable*/ - odm_set_bb_reg(dm, 0xa14, BIT(7), 0); /*r_en_mrc_antsel*/ - odm_set_bb_reg(dm, 0xa20, (BIT(5) | BIT(4)), 1); /*MBC weighting*/ + if (dm->support_ic_type & ODM_IC_1SS) + return; - if (dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8197F)) { - odm_set_bb_reg(dm, 0xa08, BIT(28), 1); /*r_cck_2nd_sel_eco*/ - /**/ - } else if (dm->support_ic_type & ODM_RTL8814A) { - odm_set_bb_reg(dm, 0xa84, BIT(28), 1); /*2R CCA only*/ - /**/ - } + /*@CCK 2R CCA parameters*/ + odm_set_bb_reg(dm, R_0xa00, BIT(15), 0x0); /*@Disable Ant diversity*/ + odm_set_bb_reg(dm, R_0xa70, BIT(7), 0); /*@Concurrent CCA at LSB & USB*/ + odm_set_bb_reg(dm, R_0xa74, BIT(8), 0); /*RX path diversity enable*/ + odm_set_bb_reg(dm, R_0xa14, BIT(7), 0); /*r_en_mrc_antsel*/ + odm_set_bb_reg(dm, R_0xa20, (BIT(5) | BIT(4)), 1); /*@MBC weighting*/ + + if (dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8197F | ODM_RTL8192F)) + odm_set_bb_reg(dm, R_0xa08, BIT(28), 1); /*r_cck_2nd_sel_eco*/ + else if (dm->support_ic_type & ODM_RTL8814A) + odm_set_bb_reg(dm, R_0xa84, BIT(28), 1); /*@2R CCA only*/ #endif } -void -phydm_config_cck_rx_path( - void *dm_void, - enum bb_path path -) +void phydm_config_cck_rx_path(void *dm_void, enum bb_path path) { #if (defined(PHYDM_COMPILE_ABOVE_2SS)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 path_div_select = 0; - u8 cck_path[2] = {0}; - u8 en_2R_path = 0; - u8 en_2R_mrc = 0; - u8 i = 0, j =0; - u8 num_enable_path = 0; - u8 cck_mrc_max_path = 2; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 path_div_select = 0; + u8 cck_path[2] = {0}; + u8 en_2R_path = 0; + u8 en_2R_mrc = 0; + u8 i = 0, j = 0; + u8 num_enable_path = 0; + u8 cck_mrc_max_path = 2; + + if (dm->support_ic_type & ODM_IC_1SS) + return; + for (i = 0; i < 4; i++) { - if (path & BIT(i)) { /*ex: PHYDM_ABCD*/ + if (path & BIT(i)) { /*@ex: PHYDM_ABCD*/ num_enable_path++; cck_path[j] = i; j++; @@ -360,318 +274,570 @@ phydm_config_cck_rx_path( en_2R_path = 0; en_2R_mrc = 0; } - - odm_set_bb_reg(dm, 0xa04, (BIT(27) | BIT(26)), cck_path[0]); /*CCK_1 input signal path*/ - odm_set_bb_reg(dm, 0xa04, (BIT(25) | BIT(24)), cck_path[1]); /*CCK_2 input signal path*/ - odm_set_bb_reg(dm, 0xa74, BIT(8), path_div_select); /*enable Rx path diversity*/ - odm_set_bb_reg(dm, 0xa2c, BIT(18), en_2R_path); /*enable 2R Rx path*/ - odm_set_bb_reg(dm, 0xa2c, BIT(22), en_2R_mrc); /*enable 2R MRC*/ - + /*@CCK_1 input signal path*/ + odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), cck_path[0]); + /*@CCK_2 input signal path*/ + odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), cck_path[1]); + /*@enable Rx path diversity*/ + odm_set_bb_reg(dm, R_0xa74, BIT(8), path_div_select); + /*@enable 2R Rx path*/ + odm_set_bb_reg(dm, R_0xa2c, BIT(18), en_2R_path); + /*@enable 2R MRC*/ + odm_set_bb_reg(dm, R_0xa2c, BIT(22), en_2R_mrc); + if (dm->support_ic_type & ODM_RTL8192F) { + if (path == BB_PATH_A) { + odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), 0); + odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), 0); + odm_set_bb_reg(dm, R_0xa74, BIT(8), 0); + odm_set_bb_reg(dm, R_0xa2c, (BIT(18) | BIT(17)), 0); + odm_set_bb_reg(dm, R_0xa2c, (BIT(22) | BIT(21)), 0); + } else if (path == BB_PATH_B) {/*@for DC cancellation*/ + odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), 1); + odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), 1); + odm_set_bb_reg(dm, R_0xa74, BIT(8), 0); + odm_set_bb_reg(dm, R_0xa2c, (BIT(18) | BIT(17)), 0); + odm_set_bb_reg(dm, R_0xa2c, (BIT(22) | BIT(21)), 0); + } else if (path == BB_PATH_AB) { + odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), 0); + odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), 1); + odm_set_bb_reg(dm, R_0xa74, BIT(8), 1); + odm_set_bb_reg(dm, R_0xa2c, (BIT(18) | BIT(17)), 1); + odm_set_bb_reg(dm, R_0xa2c, (BIT(22) | BIT(21)), 1); + } + } else if (dm->support_ic_type & ODM_RTL8822B) { + if (path == BB_PATH_A) { + odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), 0); + odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), 0); + } else { + odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), 1); + odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), 1); + } + } + #endif } -void -phydm_config_cck_tx_path( - void *dm_void, - enum bb_path path -) +void phydm_config_cck_tx_path(void *dm_void, enum bb_path path) { #if (defined(PHYDM_COMPILE_ABOVE_2SS)) - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (path == BB_PATH_A) - odm_set_bb_reg(dm, 0xa04, 0xf0000000, 0x8); + odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0x8); else if (path == BB_PATH_B) - odm_set_bb_reg(dm, 0xa04, 0xf0000000, 0x4); + odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0x4); else if (path == BB_PATH_AB) - odm_set_bb_reg(dm, 0xa04, 0xf0000000, 0xc); + odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0xc); #endif } -void -phydm_config_trx_path( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_config_trx_path_v2(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; +#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT ||\ + RTL8822C_SUPPORT || RTL8814B_SUPPORT) + struct dm_struct *dm = (struct dm_struct *)dm_void; u32 used = *_used; u32 out_len = *_out_len; + u32 val[10] = {0}; + char help[] = "-h"; + u8 i = 0, input_idx = 0; + enum bb_path tx_path, rx_path, tx_path_ctrl; + boolean dbg_mode_en; - /* - dm_value[0]: 0:CCK, 1:OFDM - dm_value[1]: 1:TX, 2:RX - dm_value[2]: 1:path_A, 2:path_B, 3:path_AB - */ - - /* CCK */ - if (dm_value[0] == 0) { - if (dm_value[1] == 1) { /*TX*/ - if (dm_value[2] == 1) + if (!(dm->support_ic_type & + (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F | ODM_RTL8822C | + ODM_RTL8814B | ODM_RTL8812F | ODM_RTL8197G))) + return; + + for (i = 0; i < 5; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &val[i]); + input_idx++; + } + } + + if (input_idx == 0) + return; + + dbg_mode_en = (boolean)val[0]; + tx_path = (enum bb_path)val[1]; + rx_path = (enum bb_path)val[2]; + tx_path_ctrl = (enum bb_path)val[3]; + + if ((strcmp(input[1], help) == 0)) { + if (dm->support_ic_type & ODM_RTL8822C) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "{en} {tx_path} {rx_path} {ff:auto, else:1ss_tx_path}\n" + ); + } else { + PDM_SNPF(out_len, used, output + used, out_len - used, + "{en} {tx_path} {rx_path} {is_tx_2_path}\n"); + } + + } else if (dbg_mode_en) { + dm->is_disable_phy_api = false; + phydm_api_trx_mode(dm, tx_path, rx_path, tx_path_ctrl); + dm->is_disable_phy_api = true; + PDM_SNPF(out_len, used, output + used, out_len - used, + "T/RX path = 0x%x/0x%x, tx_path_ctrl=%d\n", + tx_path, rx_path, tx_path_ctrl); + PDM_SNPF(out_len, used, output + used, out_len - used, + "T/RX path_en={0x%x, 0x%x}, tx_1ss=%d\n", + dm->tx_ant_status, dm->rx_ant_status, + dm->tx_1ss_status); + } else { + dm->is_disable_phy_api = false; + PDM_SNPF(out_len, used, output + used, out_len - used, + "Disable API debug mode\n"); + } +#endif +} + +void phydm_config_trx_path_v1(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ +#if (RTL8192E_SUPPORT || RTL8812A_SUPPORT) + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + u32 val[10] = {0}; + char help[] = "-h"; + u8 i = 0, input_idx = 0; + + if (!(dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8812))) + return; + + for (i = 0; i < 5; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &val[i]); + input_idx++; + } + } + + if (input_idx == 0) + return; + + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "{0:CCK, 1:OFDM} {1:TX, 2:RX} {1:path_A, 2:path_B, 3:path_AB}\n"); + + *_used = used; + *_out_len = out_len; + return; + + } else if (val[0] == 0) { + /* @CCK */ + if (val[1] == 1) { /*TX*/ + if (val[2] == 1) phydm_config_cck_tx_path(dm, BB_PATH_A); - else if (dm_value[2] == 2) + else if (val[2] == 2) phydm_config_cck_tx_path(dm, BB_PATH_B); - else if (dm_value[2] == 3) + else if (val[2] == 3) phydm_config_cck_tx_path(dm, BB_PATH_AB); - } else if (dm_value[1] == 2) { /*RX*/ + } else if (val[1] == 2) { /*RX*/ phydm_config_cck_rx_antenna_init(dm); - if (dm_value[2] == 1) + if (val[2] == 1) phydm_config_cck_rx_path(dm, BB_PATH_A); - else if (dm_value[2] == 2) + else if (val[2] == 2) phydm_config_cck_rx_path(dm, BB_PATH_B); - else if (dm_value[2] == 3) { + else if (val[2] == 3) phydm_config_cck_rx_path(dm, BB_PATH_AB); } } - } /* OFDM */ - else if (dm_value[0] == 1) { - if (dm_value[1] == 1) { /*TX*/ - phydm_config_ofdm_tx_path(dm, dm_value[2]); - /**/ - } else if (dm_value[1] == 2) { /*RX*/ - phydm_config_ofdm_rx_path(dm, dm_value[2]); - /**/ - } + else if (val[0] == 1) { + if (val[1] == 1) /*TX*/ + phydm_config_ofdm_tx_path(dm, val[2]); + else if (val[1] == 2) /*RX*/ + phydm_config_ofdm_rx_path(dm, val[2]); } PDM_SNPF(out_len, used, output + used, out_len - used, - "PHYDM Set path [%s] [%s] = [%s%s%s%s]\n", - (dm_value[0] == 1) ? "OFDM" : "CCK", - (dm_value[1] == 1) ? "TX" : "RX", - (dm_value[2] & 0x1) ? "A" : "", - (dm_value[2] & 0x2) ? "B" : "", - (dm_value[2] & 0x4) ? "C" : "", - (dm_value[2] & 0x8) ? "D" : "" - ); + "PHYDM Set path [%s] [%s] = [%s%s%s%s]\n", + (val[0] == 1) ? "OFDM" : "CCK", + (val[1] == 1) ? "TX" : "RX", + (val[2] & 0x1) ? "A" : "", (val[2] & 0x2) ? "B" : "", + (val[2] & 0x4) ? "C" : "", + (val[2] & 0x8) ? "D" : ""); + *_used = used; + *_out_len = out_len; +#endif } -void -phydm_tx_2path( - void *dm_void -) +void phydm_config_trx_path(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8812)) { + #if (RTL8192E_SUPPORT || RTL8812A_SUPPORT) + phydm_config_trx_path_v1(dm, input, _used, output, _out_len); + #endif + } else if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | + ODM_RTL8192F | ODM_RTL8822C | ODM_RTL8812F | + ODM_RTL8197G | ODM_RTL8814B)) { + #if (RTL8822B_SUPPORT || RTL8197F_SUPPORT ||\ + RTL8192F_SUPPORT || RTL8822C_SUPPORT ||\ + RTL8814B_SUPPORT || RTL8812F_SUPPORT ||\ + RTL8197G_SUPPORT) + phydm_config_trx_path_v2(dm, input, _used, output, _out_len); + #endif + } +} + +void phydm_tx_2path(void *dm_void) +{ +#if (defined(PHYDM_COMPILE_IC_2SS)) + struct dm_struct *dm = (struct dm_struct *)dm_void; + enum bb_path rx_path = (enum bb_path)dm->rx_ant_status; PHYDM_DBG(dm, ODM_COMP_API, "%s ======>\n", __func__); -#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1) - if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) { - phydm_api_trx_mode(dm, BB_PATH_AB, (enum bb_path)dm->rx_ant_status, true); - } -#endif -#if (RTL8812A_SUPPORT == 1 || RTL8192E_SUPPORT == 1) + if (!(dm->support_ic_type & ODM_IC_2SS)) + return; + + #if (RTL8822B_SUPPORT || RTL8192F_SUPPORT || RTL8197F_SUPPORT ||\ + RTL8822C_SUPPORT || RTL8812F_SUPPORT || RTL8197G_SUPPORT) + if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F | + ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) + phydm_api_trx_mode(dm, BB_PATH_AB, rx_path, BB_PATH_AB); + #endif + + #if (RTL8812A_SUPPORT || RTL8192E_SUPPORT) if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E)) { phydm_config_cck_tx_path(dm, BB_PATH_AB); phydm_config_ofdm_tx_path(dm, BB_PATH_AB); } + #endif #endif } -void -phydm_stop_3_wire( - void *dm_void, - u8 set_type -) +void phydm_stop_3_wire(void *dm_void, u8 set_type) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (set_type == PHYDM_SET) { - /*[Stop 3-wires]*/ - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - odm_set_bb_reg(dm, 0xc00, 0xf, 0x4);/* hardware 3-wire off */ - odm_set_bb_reg(dm, 0xe00, 0xf, 0x4);/* hardware 3-wire off */ + /*@[Stop 3-wires]*/ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + odm_set_bb_reg(dm, R_0x180c, 0x3, 0x0); + odm_set_bb_reg(dm, R_0x180c, BIT(28), 0x1); + + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) { + odm_set_bb_reg(dm, R_0x410c, 0x3, 0x0); + odm_set_bb_reg(dm, R_0x410c, BIT(28), 0x1); + } + #endif + + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { + odm_set_bb_reg(dm, R_0x520c, 0x3, 0x0); + odm_set_bb_reg(dm, R_0x520c, BIT(28), 0x1); + odm_set_bb_reg(dm, R_0x530c, 0x3, 0x0); + odm_set_bb_reg(dm, R_0x530c, BIT(28), 0x1); + } + #endif + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + odm_set_bb_reg(dm, R_0xc00, 0xf, 0x4); + odm_set_bb_reg(dm, R_0xe00, 0xf, 0x4); } else { - odm_set_bb_reg(dm, 0x88c, 0xf00000, 0xf); /* 3 wire Disable 88c[23:20]=0xf */ + odm_set_bb_reg(dm, R_0x88c, 0xf00000, 0xf); } - - } else { /*if (set_type == PHYDM_REVERT)*/ - - /*[Start 3-wires]*/ - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - odm_set_bb_reg(dm, 0xc00, 0xf, 0x7);/* hardware 3-wire on */ - odm_set_bb_reg(dm, 0xe00, 0xf, 0x7);/* hardware 3-wire on */ + + } else { /*@if (set_type == PHYDM_REVERT)*/ + + /*@[Start 3-wires]*/ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + odm_set_bb_reg(dm, R_0x180c, 0x3, 0x3); + odm_set_bb_reg(dm, R_0x180c, BIT(28), 0x1); + + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) { + odm_set_bb_reg(dm, R_0x410c, 0x3, 0x3); + odm_set_bb_reg(dm, R_0x410c, BIT(28), 0x1); + } + #endif + + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { + odm_set_bb_reg(dm, R_0x520c, 0x3, 0x3); + odm_set_bb_reg(dm, R_0x520c, BIT(28), 0x1); + odm_set_bb_reg(dm, R_0x530c, 0x3, 0x3); + odm_set_bb_reg(dm, R_0x530c, BIT(28), 0x1); + } + #endif + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + odm_set_bb_reg(dm, R_0xc00, 0xf, 0x7); + odm_set_bb_reg(dm, R_0xe00, 0xf, 0x7); } else { - odm_set_bb_reg(dm, 0x88c, 0xf00000, 0x0); /* 3 wire enable 88c[23:20]=0x0 */ + odm_set_bb_reg(dm, R_0x88c, 0xf00000, 0x0); } } } -u8 -phydm_stop_ic_trx( - void *dm_void, - u8 set_type - ) +u8 phydm_stop_ic_trx(void *dm_void, u8 set_type) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_api_stuc *api = &dm->api_table; - u32 i; - u8 trx_idle_success = false; - u32 dbg_port_value = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_api_stuc *api = &dm->api_table; + u32 i = 0; + u8 trx_idle_success = false; + u32 dbg_port_value = 0; if (set_type == PHYDM_SET) { - /*[Stop TRX]---------------------------------------------------------------------*/ - if (phydm_set_bb_dbg_port(dm, BB_DBGPORT_PRIORITY_3, 0x0) == false) /*set debug port to 0x0*/ + /*@[Stop TRX]---------------------------------------------------------*/ + /*set debug port to 0x0*/ + if (!phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, 0x0)) return PHYDM_SET_FAIL; - - for (i = 0; i<10000; i++) { - dbg_port_value = phydm_get_bb_dbg_port_value(dm); - if ((dbg_port_value & (BIT(17) | BIT(3))) == 0) /* PHYTXON && CCA_all */ { - PHYDM_DBG(dm, ODM_COMP_API, "PSD wait for ((%d)) times\n", i); - - trx_idle_success = true; - break; + + for (i = 0; i < 100; i++) { + dbg_port_value = phydm_get_bb_dbg_port_val(dm); + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + /* BB idle */ + if ((dbg_port_value & 0x1FFEFF3F) == 0 && + (dbg_port_value & 0xC0010000) == + 0xC0010000) { + PHYDM_DBG(dm, ODM_COMP_API, + "Stop trx wait for (%d) times\n", + i); + + trx_idle_success = true; + break; + } + } else { + /* PHYTXON && CCA_all */ + if (dm->support_ic_type == ODM_RTL8721D) { + if ((dbg_port_value & + (BIT(20) | BIT(15))) == 0) { + PHYDM_DBG(dm, ODM_COMP_API, + "Stop trx wait for (%d) times\n", + i); + + trx_idle_success = true; + break; + } + } else { + if ((dbg_port_value & + (BIT(17) | BIT(3))) == 0) { + PHYDM_DBG(dm, ODM_COMP_API, + "Stop trx wait for (%d) times\n", + i); + + trx_idle_success = true; + break; + } + } } + ODM_delay_ms(1); } phydm_release_bb_dbg_port(dm); - + if (trx_idle_success) { - api->tx_queue_bitmap = (u8)odm_get_bb_reg(dm, 0x520, 0xff0000); - - odm_set_bb_reg(dm, 0x520, 0xff0000, 0xff); /*pause all TX queue*/ - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - odm_set_bb_reg(dm, 0x808, BIT(28), 0); /*disable CCK block*/ - odm_set_bb_reg(dm, 0x838, BIT(1), 1); /*disable OFDM RX CCA*/ + api->tx_queue_bitmap = odm_read_1byte(dm, R_0x522); + + /*pause all TX queue*/ + odm_set_mac_reg(dm, R_0x520, 0xff0000, 0xff); + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + /*@disable OFDM RX CCA*/ + odm_set_bb_reg(dm, R_0x1c68, BIT(24), 1); + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + /*@disable OFDM RX CCA*/ + odm_set_bb_reg(dm, R_0x838, BIT(1), 1); } else { - /*TBD*/ - odm_set_bb_reg(dm, 0x800, BIT(24), 0); /* disable whole CCK block */ - - - api->rx_iqc_reg_1 = odm_get_bb_reg(dm, 0xc14, MASKDWORD); - api->rx_iqc_reg_2 = odm_get_bb_reg(dm, 0xc1c, MASKDWORD); - - odm_set_bb_reg(dm, 0xc14, MASKDWORD, 0x0); /* [ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] */ - odm_set_bb_reg(dm, 0xc1c, MASKDWORD, 0x0); + api->rxiqc_reg1 = odm_read_4byte(dm, R_0xc14); + api->rxiqc_reg2 = odm_read_4byte(dm, R_0xc1c); + /* @[ Set IQK Matrix = 0 ] + * equivalent to [ Turn off CCA] + */ + odm_set_bb_reg(dm, R_0xc14, MASKDWORD, 0x0); + odm_set_bb_reg(dm, R_0xc1c, MASKDWORD, 0x0); } - + phydm_dis_cck_trx(dm, PHYDM_SET); } else { return PHYDM_SET_FAIL; } - + return PHYDM_SET_SUCCESS; - - } else { /*if (set_type == PHYDM_REVERT)*/ - odm_set_bb_reg(dm, 0x520, 0xff0000, (u32)(api->tx_queue_bitmap)); /*Release all TX queue*/ + } else { /*@if (set_type == PHYDM_REVERT)*/ + /*Release all TX queue*/ + odm_write_1byte(dm, R_0x522, api->tx_queue_bitmap); - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - odm_set_bb_reg(dm, 0x808, BIT(28), 1); /*enable CCK block*/ - odm_set_bb_reg(dm, 0x838, BIT(1), 0); /*enable OFDM RX CCA*/ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + /*@enable OFDM RX CCA*/ + odm_set_bb_reg(dm, R_0x1c68, BIT(24), 0); + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + /*@enable OFDM RX CCA*/ + odm_set_bb_reg(dm, R_0x838, BIT(1), 0); } else { - /*TBD*/ - odm_set_bb_reg(dm, 0x800, BIT(24), 1); /* enable whole CCK block */ - - odm_set_bb_reg(dm, 0xc14, MASKDWORD, api->rx_iqc_reg_1); /* [ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] */ - odm_set_bb_reg(dm, 0xc1c, MASKDWORD, api->rx_iqc_reg_2); + /* @[Set IQK Matrix = 0] equivalent to [ Turn off CCA]*/ + odm_write_4byte(dm, R_0xc14, api->rxiqc_reg1); + odm_write_4byte(dm, R_0xc1c, api->rxiqc_reg2); } - + phydm_dis_cck_trx(dm, PHYDM_REVERT); return PHYDM_SET_SUCCESS; } - } -void -phydm_set_ext_switch( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_dis_cck_trx(void *dm_void, u8 set_type) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 ext_ant_switch = dm_value[0]; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_api_stuc *api = &dm->api_table; -#if (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) - if (dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8881A)) { - /*Output Pin Settings*/ - odm_set_mac_reg(dm, 0x4C, BIT(23), 0); /*select DPDT_P and DPDT_N as output pin*/ - odm_set_mac_reg(dm, 0x4C, BIT(24), 1); /*by WLAN control*/ - - odm_set_bb_reg(dm, 0xCB4, 0xFF, 77); /*DPDT_N = 1b'0*/ /*DPDT_P = 1b'0*/ - - if (ext_ant_switch == MAIN_ANT) { - odm_set_bb_reg(dm, 0xCB4, (BIT(29) | BIT(28)), 1); - PHYDM_DBG(dm, ODM_COMP_API, "***8821A set ant switch = 2b'01 (Main)\n"); - } else if (ext_ant_switch == AUX_ANT) { - odm_set_bb_reg(dm, 0xCB4, BIT(29) | BIT(28), 2); - PHYDM_DBG(dm, ODM_COMP_API, "***8821A set ant switch = 2b'10 (Aux)\n"); + if (set_type == PHYDM_SET) { + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + api->ccktx_path = (u8)odm_get_bb_reg(dm, R_0x1a04, + 0xf0000000); + /* @CCK RxIQ weighting = [0,0] */ + odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x3); + /* @disable CCK Tx */ + odm_set_bb_reg(dm, R_0x1a04, 0xf0000000, 0x0); + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + api->ccktx_path = (u8)odm_get_bb_reg(dm, R_0xa04, + 0xf0000000); + /* @disable CCK block */ + odm_set_bb_reg(dm, R_0x808, BIT(28), 0); + /* @disable CCK Tx */ + odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0x0); + } else { + api->ccktx_path = (u8)odm_get_bb_reg(dm, R_0xa04, + 0xf0000000); + /* @disable whole CCK block */ + odm_set_bb_reg(dm, R_0x800, BIT(24), 0); + /* @disable CCK Tx */ + odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0x0); } + } else if (set_type == PHYDM_REVERT) { + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + /* @CCK RxIQ weighting = [1,1] */ + odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x0); + /* @enable CCK Tx */ + odm_set_bb_reg(dm, R_0x1a04, 0xf0000000, + api->ccktx_path); + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + /* @enable CCK block */ + odm_set_bb_reg(dm, R_0x808, BIT(28), 1); + /* @enable CCK Tx */ + odm_set_bb_reg(dm, R_0xa04, 0xf0000000, + api->ccktx_path); + } else { + /* @enable whole CCK block */ + odm_set_bb_reg(dm, R_0x800, BIT(24), 1); + /* @enable CCK Tx */ + odm_set_bb_reg(dm, R_0xa04, 0xf0000000, + api->ccktx_path); + } + } +} +void phydm_set_ext_switch(void *dm_void, u32 ext_ant_switch) +{ +#if (RTL8821A_SUPPORT || RTL8881A_SUPPORT) + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (!(dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8881A))) + return; + + /*Output Pin Settings*/ + + /*select DPDT_P and DPDT_N as output pin*/ + odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); + + /*@by WLAN control*/ + odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); + + /*@DPDT_N = 1b'0*/ /*@DPDT_P = 1b'0*/ + odm_set_bb_reg(dm, R_0xcb4, 0xFF, 77); + + if (ext_ant_switch == 1) { /*@2b'01*/ + odm_set_bb_reg(dm, R_0xcb4, (BIT(29) | BIT(28)), 1); + PHYDM_DBG(dm, ODM_COMP_API, "8821A ant swh=2b'01\n"); + } else if (ext_ant_switch == 2) { /*@2b'10*/ + odm_set_bb_reg(dm, R_0xcb4, BIT(29) | BIT(28), 2); + PHYDM_DBG(dm, ODM_COMP_API, "*8821A ant swh=2b'10\n"); } #endif } -void -phydm_csi_mask_enable( - void *dm_void, - u32 enable -) +void phydm_csi_mask_enable(void *dm_void, u32 enable) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 reg_value = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean en = false; - reg_value = (enable == FUNC_ENABLE) ? 1 : 0; + en = (enable == FUNC_ENABLE) ? true : false; if (dm->support_ic_type & ODM_IC_11N_SERIES) { - odm_set_bb_reg(dm, 0xD2C, BIT(28), reg_value); - PHYDM_DBG(dm, ODM_COMP_API, "Enable CSI Mask: Reg 0xD2C[28] = ((0x%x))\n", reg_value); - + odm_set_bb_reg(dm, R_0xd2c, BIT(28), en); + PHYDM_DBG(dm, ODM_COMP_API, + "Enable CSI Mask: Reg 0xD2C[28] = ((0x%x))\n", en); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + odm_set_bb_reg(dm, R_0xc0c, BIT(3), en); + PHYDM_DBG(dm, ODM_COMP_API, + "Enable CSI Mask: Reg 0xc0c[3] = ((0x%x))\n", en); + #endif } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - odm_set_bb_reg(dm, 0x874, BIT(0), reg_value); - PHYDM_DBG(dm, ODM_COMP_API, "Enable CSI Mask: Reg 0x874[0] = ((0x%x))\n", reg_value); - } - -} - -void -phydm_clean_all_csi_mask( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - - if (dm->support_ic_type & ODM_IC_11N_SERIES) { - odm_set_bb_reg(dm, 0xD40, MASKDWORD, 0); - odm_set_bb_reg(dm, 0xD44, MASKDWORD, 0); - odm_set_bb_reg(dm, 0xD48, MASKDWORD, 0); - odm_set_bb_reg(dm, 0xD4c, MASKDWORD, 0); - - } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - odm_set_bb_reg(dm, 0x880, MASKDWORD, 0); - odm_set_bb_reg(dm, 0x884, MASKDWORD, 0); - odm_set_bb_reg(dm, 0x888, MASKDWORD, 0); - odm_set_bb_reg(dm, 0x88c, MASKDWORD, 0); - odm_set_bb_reg(dm, 0x890, MASKDWORD, 0); - odm_set_bb_reg(dm, 0x894, MASKDWORD, 0); - odm_set_bb_reg(dm, 0x898, MASKDWORD, 0); - odm_set_bb_reg(dm, 0x89c, MASKDWORD, 0); + odm_set_bb_reg(dm, R_0x874, BIT(0), en); + PHYDM_DBG(dm, ODM_COMP_API, + "Enable CSI Mask: Reg 0x874[0] = ((0x%x))\n", en); } } -void -phydm_set_csi_mask_reg( - void *dm_void, - u32 tone_idx_tmp, - u8 tone_direction -) +void phydm_clean_all_csi_mask(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 byte_offset, bit_offset; - u32 target_reg; - u8 reg_tmp_value; - u32 tone_num = 64; - u32 tone_num_shift = 0; - u32 csi_mask_reg_p = 0, csi_mask_reg_n = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; - /* calculate real tone idx*/ + if (dm->support_ic_type & ODM_IC_11N_SERIES) { + odm_set_bb_reg(dm, R_0xd40, MASKDWORD, 0); + odm_set_bb_reg(dm, R_0xd44, MASKDWORD, 0); + odm_set_bb_reg(dm, R_0xd48, MASKDWORD, 0); + odm_set_bb_reg(dm, R_0xd4c, MASKDWORD, 0); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + u8 i = 0, idx_lmt = 0; + + if (dm->support_ic_type & + (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) + idx_lmt = 127; + else /*@for IC supporting 80 + 80*/ + idx_lmt = 255; + + odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x3); + odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x1); + for (i = 0; i < idx_lmt; i++) { + odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, i); + odm_set_bb_reg(dm, R_0x1d94, MASKBYTE0, 0x0); + } + odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x0); + #endif + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + odm_set_bb_reg(dm, R_0x880, MASKDWORD, 0); + odm_set_bb_reg(dm, R_0x884, MASKDWORD, 0); + odm_set_bb_reg(dm, R_0x888, MASKDWORD, 0); + odm_set_bb_reg(dm, R_0x88c, MASKDWORD, 0); + odm_set_bb_reg(dm, R_0x890, MASKDWORD, 0); + odm_set_bb_reg(dm, R_0x894, MASKDWORD, 0); + odm_set_bb_reg(dm, R_0x898, MASKDWORD, 0); + odm_set_bb_reg(dm, R_0x89c, MASKDWORD, 0); + } +} + +void phydm_set_csi_mask(void *dm_void, u32 tone_idx_tmp, u8 tone_direction) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 byte_offset = 0, bit_offset = 0; + u32 target_reg = 0; + u8 reg_tmp_value = 0; + u32 tone_num = 64; + u32 tone_num_shift = 0; + u32 csi_mask_reg_p = 0, csi_mask_reg_n = 0; + + /* @calculate real tone idx*/ if ((tone_idx_tmp % 10) >= 5) tone_idx_tmp += 10; @@ -710,61 +876,64 @@ phydm_set_csi_mask_reg( } reg_tmp_value = odm_read_1byte(dm, target_reg); - PHYDM_DBG(dm, ODM_COMP_API, "Pre Mask tone idx[%d]: Reg0x%x = ((0x%x))\n", (tone_idx_tmp + tone_num_shift), target_reg, reg_tmp_value); + PHYDM_DBG(dm, ODM_COMP_API, + "Pre Mask tone idx[%d]: Reg0x%x = ((0x%x))\n", + (tone_idx_tmp + tone_num_shift), target_reg, reg_tmp_value); reg_tmp_value |= BIT(bit_offset); odm_write_1byte(dm, target_reg, reg_tmp_value); - PHYDM_DBG(dm, ODM_COMP_API, "New Mask tone idx[%d]: Reg0x%x = ((0x%x))\n", (tone_idx_tmp + tone_num_shift), target_reg, reg_tmp_value); + PHYDM_DBG(dm, ODM_COMP_API, + "New Mask tone idx[%d]: Reg0x%x = ((0x%x))\n", + (tone_idx_tmp + tone_num_shift), target_reg, reg_tmp_value); } -void -phydm_set_nbi_reg( - void *dm_void, - u32 tone_idx_tmp, - u32 bw -) +void phydm_set_nbi_reg(void *dm_void, u32 tone_idx_tmp, u32 bw) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 nbi_table_128[NBI_TABLE_SIZE_128] = {25, 55, 85, 115, 135, 155, 185, 205, 225, 245, /*1~10*/ /*tone_idx X 10*/ - 265, 285, 305, 335, 355, 375, 395, 415, 435, 455, /*11~20*/ - 485, 505, 525, 555, 585, 615, 635 - }; /*21~27*/ - - u32 nbi_table_256[NBI_TABLE_SIZE_256] = { 25, 55, 85, 115, 135, 155, 175, 195, 225, 245, /*1~10*/ - 265, 285, 305, 325, 345, 365, 385, 405, 425, 445, /*11~20*/ - 465, 485, 505, 525, 545, 565, 585, 605, 625, 645, /*21~30*/ - 665, 695, 715, 735, 755, 775, 795, 815, 835, 855, /*31~40*/ - 875, 895, 915, 935, 955, 975, 995, 1015, 1035, 1055, /*41~50*/ - 1085, 1105, 1125, 1145, 1175, 1195, 1225, 1255, 1275 - }; /*51~59*/ - - u32 reg_idx = 0; - u32 i; - u8 nbi_table_idx = FFT_128_TYPE; - - if (dm->support_ic_type & ODM_IC_11N_SERIES) + struct dm_struct *dm = (struct dm_struct *)dm_void; + /*tone_idx X 10*/ + u32 nbi_128[NBI_128TONE] = {25, 55, 85, 115, 135, + 155, 185, 205, 225, 245, + 265, 285, 305, 335, 355, + 375, 395, 415, 435, 455, + 485, 505, 525, 555, 585, 615, 635}; + /*tone_idx X 10*/ + u32 nbi_256[NBI_256TONE] = {25, 55, 85, 115, 135, + 155, 175, 195, 225, 245, + 265, 285, 305, 325, 345, + 365, 385, 405, 425, 445, + 465, 485, 505, 525, 545, + 565, 585, 605, 625, 645, + 665, 695, 715, 735, 755, + 775, 795, 815, 835, 855, + 875, 895, 915, 935, 955, + 975, 995, 1015, 1035, 1055, + 1085, 1105, 1125, 1145, 1175, + 1195, 1225, 1255, 1275}; + u32 reg_idx = 0; + u32 i; + u8 nbi_table_idx = FFT_128_TYPE; + if (dm->support_ic_type & ODM_IC_11N_SERIES) { nbi_table_idx = FFT_128_TYPE; - else if (dm->support_ic_type & ODM_IC_11AC_1_SERIES) - + } else if (dm->support_ic_type & ODM_IC_11AC_1_SERIES) { nbi_table_idx = FFT_256_TYPE; - else if (dm->support_ic_type & ODM_IC_11AC_2_SERIES) { + } else if (dm->support_ic_type & ODM_IC_11AC_2_SERIES) { if (bw == 80) nbi_table_idx = FFT_256_TYPE; - else /*20M, 40M*/ + else /*@20M, 40M*/ nbi_table_idx = FFT_128_TYPE; } if (nbi_table_idx == FFT_128_TYPE) { - for (i = 0; i < NBI_TABLE_SIZE_128; i++) { - if (tone_idx_tmp < nbi_table_128[i]) { + for (i = 0; i < NBI_128TONE; i++) { + if (tone_idx_tmp < nbi_128[i]) { reg_idx = i + 1; break; } } } else if (nbi_table_idx == FFT_256_TYPE) { - for (i = 0; i < NBI_TABLE_SIZE_256; i++) { - if (tone_idx_tmp < nbi_table_256[i]) { + for (i = 0; i < NBI_256TONE; i++) { + if (tone_idx_tmp < nbi_256[i]) { reg_idx = i + 1; break; } @@ -772,84 +941,86 @@ phydm_set_nbi_reg( } if (dm->support_ic_type & ODM_IC_11N_SERIES) { - odm_set_bb_reg(dm, 0xc40, 0x1f000000, reg_idx); - PHYDM_DBG(dm, ODM_COMP_API, "Set tone idx: Reg0xC40[28:24] = ((0x%x))\n", reg_idx); - /**/ + odm_set_bb_reg(dm, R_0xc40, 0x1f000000, reg_idx); + PHYDM_DBG(dm, ODM_COMP_API, + "Set tone idx: Reg0xC40[28:24] = ((0x%x))\n", + reg_idx); } else { - odm_set_bb_reg(dm, 0x87c, 0xfc000, reg_idx); - PHYDM_DBG(dm, ODM_COMP_API, "Set tone idx: Reg0x87C[19:14] = ((0x%x))\n", reg_idx); - /**/ + odm_set_bb_reg(dm, R_0x87c, 0xfc000, reg_idx); + PHYDM_DBG(dm, ODM_COMP_API, + "Set tone idx: Reg0x87C[19:14] = ((0x%x))\n", + reg_idx); } } - -void -phydm_nbi_enable( - void *dm_void, - u32 enable -) +void phydm_nbi_enable(void *dm_void, u32 enable) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 reg_value = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 val = 0; - reg_value = (enable == FUNC_ENABLE) ? 1 : 0; + val = (enable == FUNC_ENABLE) ? 1 : 0; + + PHYDM_DBG(dm, ODM_COMP_API, "Enable NBI=%d\n", val); if (dm->support_ic_type & ODM_IC_11N_SERIES) { - odm_set_bb_reg(dm, 0xc40, BIT(9), reg_value); - PHYDM_DBG(dm, ODM_COMP_API, "Enable NBI Reg0xC40[9] = ((0x%x))\n", reg_value); - + if (dm->support_ic_type & (ODM_RTL8192F | ODM_RTL8197F)) { + val = (enable == FUNC_ENABLE) ? 0xf : 0; + odm_set_bb_reg(dm, R_0xc50, 0xf000000, val); + } else { + odm_set_bb_reg(dm, R_0xc40, BIT(9), val); + } } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - if (dm->support_ic_type & (ODM_RTL8822B|ODM_RTL8821C)) { - odm_set_bb_reg(dm, 0x87c, BIT(13), reg_value); - odm_set_bb_reg(dm, 0xc20, BIT(28), reg_value); + if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) { + odm_set_bb_reg(dm, R_0x87c, BIT(13), val); + odm_set_bb_reg(dm, R_0xc20, BIT(28), val); if (dm->rf_type > RF_1T1R) - odm_set_bb_reg(dm, 0xe20, BIT(28), reg_value); - } else - odm_set_bb_reg(dm, 0x87c, BIT(13), reg_value); - PHYDM_DBG(dm, ODM_COMP_API, "Enable NBI Reg0x87C[13] = ((0x%x))\n", reg_value); + odm_set_bb_reg(dm, R_0xe20, BIT(28), val); + } else { + odm_set_bb_reg(dm, R_0x87c, BIT(13), val); + } } } -u8 -phydm_calculate_fc( - void *dm_void, - u32 channel, - u32 bw, - u32 second_ch, - u32 *fc_in -) +u8 phydm_find_fc(void *dm_void, u32 channel, u32 bw, u32 second_ch, u32 *fc_in) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 fc = *fc_in; - u32 start_ch_per_40m[NUM_START_CH_40M] = {36, 44, 52, 60, 100, 108, 116, 124, 132, 140, 149, 157, 165, 173}; - u32 start_ch_per_80m[NUM_START_CH_80M] = {36, 52, 100, 116, 132, 149, 165}; - u32 *start_ch = &start_ch_per_40m[0]; - u32 num_start_channel = NUM_START_CH_40M; - u32 channel_offset = 0; - u32 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 fc = *fc_in; + u32 start_ch_per_40m[NUM_START_CH_40M] = {36, 44, 52, 60, 100, + 108, 116, 124, 132, 140, + 149, 157, 165, 173}; + u32 start_ch_per_80m[NUM_START_CH_80M] = {36, 52, 100, 116, 132, + 149, 165}; + u32 *start_ch = &start_ch_per_40m[0]; + u32 num_start_channel = NUM_START_CH_40M; + u32 channel_offset = 0; + u32 i; - /*2.4G*/ + /*@2.4G*/ if (channel <= 14 && channel > 0) { if (bw == 80) - return PHYDM_SET_FAIL; + return PHYDM_SET_FAIL; fc = 2412 + (channel - 1) * 5; - if (bw == 40 && (second_ch == PHYDM_ABOVE)) { + if (bw == 40 && second_ch == PHYDM_ABOVE) { if (channel >= 10) { - PHYDM_DBG(dm, ODM_COMP_API, "CH = ((%d)), Scnd_CH = ((%d)) Error setting\n", channel, second_ch); - return PHYDM_SET_FAIL; + PHYDM_DBG(dm, ODM_COMP_API, + "CH = ((%d)), Scnd_CH = ((%d)) Error setting\n", + channel, second_ch); + return PHYDM_SET_FAIL; } fc += 10; } else if (bw == 40 && (second_ch == PHYDM_BELOW)) { if (channel <= 2) { - PHYDM_DBG(dm, ODM_COMP_API, "CH = ((%d)), Scnd_CH = ((%d)) Error setting\n", channel, second_ch); - return PHYDM_SET_FAIL; + PHYDM_DBG(dm, ODM_COMP_API, + "CH = ((%d)), Scnd_CH = ((%d)) Error setting\n", + channel, second_ch); + return PHYDM_SET_FAIL; } fc -= 10; } } - /*5G*/ + /*@5G*/ else if (channel >= 36 && channel <= 177) { if (bw != 20) { if (bw == 40) { @@ -868,14 +1039,16 @@ phydm_calculate_fc( break; } } - PHYDM_DBG(dm, ODM_COMP_API, "Mod_CH = ((%d))\n", channel); + PHYDM_DBG(dm, ODM_COMP_API, "Mod_CH = ((%d))\n", + channel); } fc = 5180 + (channel - 36) * 5; } else { - PHYDM_DBG(dm, ODM_COMP_API, "CH = ((%d)) Error setting\n", channel); - return PHYDM_SET_FAIL; + PHYDM_DBG(dm, ODM_COMP_API, "CH = ((%d)) Error setting\n", + channel); + return PHYDM_SET_FAIL; } *fc_in = fc; @@ -883,76 +1056,76 @@ phydm_calculate_fc( return PHYDM_SET_SUCCESS; } - -u8 -phydm_calculate_intf_distance( - void *dm_void, - u32 bw, - u32 fc, - u32 f_interference, - u32 *tone_idx_tmp_in -) +u8 phydm_find_intf_distance(void *dm_void, u32 bw, u32 fc, u32 f_interference, + u32 *tone_idx_tmp_in) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 bw_up, bw_low; - u32 int_distance; - u32 tone_idx_tmp; - u8 set_result = PHYDM_SET_NO_NEED; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 bw_up = 0, bw_low = 0; + u32 int_distance = 0; + u32 tone_idx_tmp = 0; + u8 set_result = PHYDM_SET_NO_NEED; bw_up = fc + bw / 2; bw_low = fc - bw / 2; - PHYDM_DBG(dm, ODM_COMP_API, "[f_l, fc, fh] = [ %d, %d, %d ], f_int = ((%d))\n", bw_low, fc, bw_up, f_interference); + PHYDM_DBG(dm, ODM_COMP_API, + "[f_l, fc, fh] = [ %d, %d, %d ], f_int = ((%d))\n", bw_low, + fc, bw_up, f_interference); - if ((f_interference >= bw_low) && (f_interference <= bw_up)) { - int_distance = (fc >= f_interference) ? (fc - f_interference) : (f_interference - fc); - tone_idx_tmp = (int_distance << 5); /* =10*(int_distance /0.3125) */ - PHYDM_DBG(dm, ODM_COMP_API, "int_distance = ((%d MHz)) Mhz, tone_idx_tmp = ((%d.%d))\n", int_distance, (tone_idx_tmp / 10), (tone_idx_tmp % 10)); + if (f_interference >= bw_low && f_interference <= bw_up) { + int_distance = DIFF_2(fc, f_interference); + /*@10*(int_distance /0.3125)*/ + tone_idx_tmp = (int_distance << 5); + PHYDM_DBG(dm, ODM_COMP_API, + "int_distance = ((%d MHz)) Mhz, tone_idx_tmp = ((%d.%d))\n", + int_distance, tone_idx_tmp / 10, + tone_idx_tmp % 10); *tone_idx_tmp_in = tone_idx_tmp; set_result = PHYDM_SET_SUCCESS; } - return set_result; - + return set_result; } - -u8 -phydm_csi_mask_setting( - void *dm_void, - u32 enable, - u32 channel, - u32 bw, - u32 f_interference, - u32 second_ch -) +u8 phydm_csi_mask_setting(void *dm_void, u32 enable, u32 ch, u32 bw, + u32 f_intf, u32 sec_ch) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 fc = 2412; - u8 tone_direction; - u32 tone_idx_tmp; - u8 set_result = PHYDM_SET_SUCCESS; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 fc = 2412; + u8 direction = FREQ_POSITIVE; + u32 tone_idx = 0; + u8 set_result = PHYDM_SET_SUCCESS; + u8 rpt = 0; if (enable == FUNC_DISABLE) { set_result = PHYDM_SET_SUCCESS; phydm_clean_all_csi_mask(dm); } else { - PHYDM_DBG(dm, ODM_COMP_API, "[Set CSI MASK_] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", - channel, bw, f_interference, (((bw == 20) || (channel > 14)) ? "Don't care" : (second_ch == PHYDM_ABOVE) ? "H" : "L")); + PHYDM_DBG(dm, ODM_COMP_API, + "[Set CSI MASK_] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", + ch, bw, f_intf, + (((bw == 20) || (ch > 14)) ? "Don't care" : + (sec_ch == PHYDM_ABOVE) ? "H" : "L")); - /*calculate fc*/ - if (phydm_calculate_fc(dm, channel, bw, second_ch, &fc) == PHYDM_SET_FAIL) + /*@calculate fc*/ + if (phydm_find_fc(dm, ch, bw, sec_ch, &fc) == PHYDM_SET_FAIL) { set_result = PHYDM_SET_FAIL; + } else { + /*@calculate interference distance*/ + rpt = phydm_find_intf_distance(dm, bw, fc, f_intf, + &tone_idx); + if (rpt == PHYDM_SET_SUCCESS) { + if (f_intf >= fc) + direction = FREQ_POSITIVE; + else + direction = FREQ_NEGATIVE; - else { - /*calculate interference distance*/ - if (phydm_calculate_intf_distance(dm, bw, fc, f_interference, &tone_idx_tmp) == PHYDM_SET_SUCCESS) { - tone_direction = (f_interference >= fc) ? FREQ_POSITIVE : FREQ_NEGATIVE; - phydm_set_csi_mask_reg(dm, tone_idx_tmp, tone_direction); + phydm_set_csi_mask(dm, tone_idx, direction); set_result = PHYDM_SET_SUCCESS; - } else + } else { set_result = PHYDM_SET_NO_NEED; + } } } @@ -961,367 +1134,1875 @@ phydm_csi_mask_setting( else phydm_csi_mask_enable(dm, FUNC_DISABLE); - return set_result; + return set_result; } -u8 -phydm_nbi_setting( - void *dm_void, - u32 enable, - u32 channel, - u32 bw, - u32 f_interference, - u32 second_ch -) +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT +u8 phydm_find_intf_distance_jgr3(void *dm_void, u32 bw, u32 fc, + u32 f_interference, u32 *tone_idx_tmp_in) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 fc = 2412; - u32 tone_idx_tmp; - u8 set_result = PHYDM_SET_SUCCESS; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 bw_up = 0, bw_low = 0; + u32 int_distance = 0; + u32 tone_idx_tmp = 0; + u8 set_result = PHYDM_SET_NO_NEED; - if (enable == FUNC_DISABLE) + bw_up = 1000 * (fc + bw / 2); + bw_low = 1000 * (fc - bw / 2); + fc = 1000 * fc; + + PHYDM_DBG(dm, ODM_COMP_API, + "[f_l, fc, fh] = [ %d, %d, %d ], f_int = ((%d))\n", bw_low, + fc, bw_up, f_interference); + + if (f_interference >= bw_low && f_interference <= bw_up) { + int_distance = DIFF_2(fc, f_interference); + /*@10*(int_distance /0.3125)*/ + tone_idx_tmp = (int_distance / 312); + PHYDM_DBG(dm, ODM_COMP_API, + "int_distance = ((%d)) , tone_idx_tmp = ((%d))\n", + int_distance, tone_idx_tmp); + *tone_idx_tmp_in = tone_idx_tmp; set_result = PHYDM_SET_SUCCESS; + } - else { - PHYDM_DBG(dm, ODM_COMP_API, "[Set NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", - channel, bw, f_interference, (((second_ch == PHYDM_DONT_CARE) || (bw == 20) || (channel > 14)) ? "Don't care" : (second_ch == PHYDM_ABOVE) ? "H" : "L")); + return set_result; +} +u8 phydm_csi_mask_setting_jgr3(void *dm_void, u32 enable, u32 ch, u32 bw, + u32 f_intf, u32 sec_ch, u8 wgt) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 fc = 2412; + u8 direction = FREQ_POSITIVE; + u32 tone_idx = 0; + u8 set_result = PHYDM_SET_SUCCESS; + u8 rpt = 0; - /*calculate fc*/ - if (phydm_calculate_fc(dm, channel, bw, second_ch, &fc) == PHYDM_SET_FAIL) + if (enable == FUNC_DISABLE) { + phydm_csi_mask_enable(dm, FUNC_ENABLE); + phydm_clean_all_csi_mask(dm); + phydm_csi_mask_enable(dm, FUNC_DISABLE); + set_result = PHYDM_SET_SUCCESS; + } else { + PHYDM_DBG(dm, ODM_COMP_API, + "[Set CSI MASK] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s)), wgt = ((%d))\n", + ch, bw, f_intf, + (((bw == 20) || (ch > 14)) ? "Don't care" : + (sec_ch == PHYDM_ABOVE) ? "H" : "L"), wgt); + + /*@calculate fc*/ + if (phydm_find_fc(dm, ch, bw, sec_ch, &fc) == PHYDM_SET_FAIL) { set_result = PHYDM_SET_FAIL; + } else { + /*@calculate interference distance*/ + rpt = phydm_find_intf_distance_jgr3(dm, bw, fc, f_intf, + &tone_idx); + if (rpt == PHYDM_SET_SUCCESS) { + if (f_intf >= 1000 * fc) + direction = FREQ_POSITIVE; + else + direction = FREQ_NEGATIVE; - else { - /*calculate interference distance*/ - if (phydm_calculate_intf_distance(dm, bw, fc, f_interference, &tone_idx_tmp) == PHYDM_SET_SUCCESS) { - phydm_set_nbi_reg(dm, tone_idx_tmp, bw); + phydm_csi_mask_enable(dm, FUNC_ENABLE); + phydm_set_csi_mask_jgr3(dm, tone_idx, direction, + wgt); set_result = PHYDM_SET_SUCCESS; - } else + } else { + set_result = PHYDM_SET_NO_NEED; + } + } + if (!(set_result == PHYDM_SET_SUCCESS)) + phydm_csi_mask_enable(dm, FUNC_DISABLE); + } + + return set_result; +} + +void phydm_set_csi_mask_jgr3(void *dm_void, u32 tone_idx_tmp, u8 tone_direction, + u8 wgt) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 reg_tmp_value = 0; + u32 tone_num = 64; + u32 table_addr = 0; + u32 addr = 0; + u8 rf_bw = 0; + u8 value = 0; + + rf_bw = odm_read_1byte(dm, R_0x9b0); + if (((rf_bw & 0xc) >> 2) == 0x2) + tone_num = 128; /* @RF80 : tone(-1) at tone_idx=255 */ + else + tone_num = 64; /* @RF20/40 : tone(-1) at tone_idx=127 */ + + if (tone_direction == FREQ_POSITIVE) { + if (tone_idx_tmp >= (tone_num - 1)) + tone_idx_tmp = (tone_num - 1); + } else { + if (tone_idx_tmp >= tone_num) + tone_idx_tmp = tone_num; + + tone_idx_tmp = (tone_num << 1) - tone_idx_tmp; + } + table_addr = tone_idx_tmp >> 1; + + reg_tmp_value = odm_read_4byte(dm, R_0x1d94); + PHYDM_DBG(dm, ODM_COMP_API, + "Pre Mask tone idx[%d]: Reg0x1d94 = ((0x%x))\n", + tone_idx_tmp, reg_tmp_value); + odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x3); + odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x1); + odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, (table_addr & 0xff)); + if (tone_idx_tmp % 2) + value = (BIT(3) | (wgt & 0x7)) << 4; + else + value = BIT(3) | (wgt & 0x7); + + odm_set_bb_reg(dm, R_0x1d94, 0xff, value); + reg_tmp_value = odm_read_4byte(dm, R_0x1d94); + PHYDM_DBG(dm, ODM_COMP_API, + "New Mask tone idx[%d]: Reg0x1d94 = ((0x%x))\n", + tone_idx_tmp, reg_tmp_value); + odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x0); +} + +void phydm_nbi_reset_jgr3(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + odm_set_bb_reg(dm, R_0x818, BIT(3), 1); + odm_set_bb_reg(dm, R_0x1d3c, 0x78000000, 0); + odm_set_bb_reg(dm, R_0x818, BIT(3), 0); + odm_set_bb_reg(dm, R_0x818, BIT(11), 0); +} + +u8 phydm_nbi_setting_jgr3(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf, + u32 sec_ch, u8 path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 fc = 2412; + u8 direction = FREQ_POSITIVE; + u32 tone_idx = 0; + u8 set_result = PHYDM_SET_SUCCESS; + u8 rpt = 0; + + if (enable == FUNC_DISABLE) { + phydm_nbi_reset_jgr3(dm); + set_result = PHYDM_SET_SUCCESS; + } else { + PHYDM_DBG(dm, ODM_COMP_API, + "[Set NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", + ch, bw, f_intf, + (((sec_ch == PHYDM_DONT_CARE) || (bw == 20) || + (ch > 14)) ? "Don't care" : + (sec_ch == PHYDM_ABOVE) ? "H" : "L")); + + /*@calculate fc*/ + if (phydm_find_fc(dm, ch, bw, sec_ch, &fc) == PHYDM_SET_FAIL) { + set_result = PHYDM_SET_FAIL; + } else { + /*@calculate interference distance*/ + rpt = phydm_find_intf_distance_jgr3(dm, bw, fc, f_intf, + &tone_idx); + if (rpt == PHYDM_SET_SUCCESS) { + if (f_intf >= 1000 * fc) + direction = FREQ_POSITIVE; + else + direction = FREQ_NEGATIVE; + + phydm_set_nbi_reg_jgr3(dm, tone_idx, direction, + path); + set_result = PHYDM_SET_SUCCESS; + } else { set_result = PHYDM_SET_NO_NEED; } } + } + + if (set_result == PHYDM_SET_SUCCESS) + phydm_nbi_enable_jgr3(dm, enable, path); + else + phydm_nbi_enable_jgr3(dm, FUNC_DISABLE, path); + + return set_result; +} + +void phydm_set_nbi_reg_jgr3(void *dm_void, u32 tone_idx_tmp, u8 tone_direction, + u8 path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 reg_tmp_value = 0; + u32 tone_num = 64; + u32 addr = 0; + u8 rf_bw = 0; + + rf_bw = odm_read_1byte(dm, R_0x9b0); + if (((rf_bw & 0xc) >> 2) == 0x2) + tone_num = 128; /* RF80 : tone-1 at tone_idx=255 */ + else + tone_num = 64; /* RF20/40 : tone-1 at tone_idx=127 */ + + if (tone_direction == FREQ_POSITIVE) { + if (tone_idx_tmp >= (tone_num - 1)) + tone_idx_tmp = (tone_num - 1); + } else { + if (tone_idx_tmp >= tone_num) + tone_idx_tmp = tone_num; + + tone_idx_tmp = (tone_num << 1) - tone_idx_tmp; + } + + switch (path) { + case RF_PATH_A: + odm_set_bb_reg(dm, R_0x1944, 0x001FF000, tone_idx_tmp); + PHYDM_DBG(dm, ODM_COMP_API, + "Set tone idx[%d]:PATH-A = ((0x%x))\n", + tone_idx_tmp, tone_idx_tmp); + break; + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + case RF_PATH_B: + odm_set_bb_reg(dm, R_0x4044, 0x001FF000, tone_idx_tmp); + PHYDM_DBG(dm, ODM_COMP_API, + "Set tone idx[%d]:PATH-B = ((0x%x))\n", + tone_idx_tmp, tone_idx_tmp); + break; + #endif + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + case RF_PATH_C: + odm_set_bb_reg(dm, R_0x5044, 0x001FF000, tone_idx_tmp); + PHYDM_DBG(dm, ODM_COMP_API, + "Set tone idx[%d]:PATH-C = ((0x%x))\n", + tone_idx_tmp, tone_idx_tmp); + break; + #endif + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + case RF_PATH_D: + odm_set_bb_reg(dm, R_0x5144, 0x001FF000, tone_idx_tmp); + PHYDM_DBG(dm, ODM_COMP_API, + "Set tone idx[%d]:PATH-D = ((0x%x))\n", + tone_idx_tmp, tone_idx_tmp); + break; + #endif + default: + break; + } +} + +void phydm_nbi_enable_jgr3(void *dm_void, u32 enable, u8 path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean val = false; + + val = (enable == FUNC_ENABLE) ? true : false; + + PHYDM_DBG(dm, ODM_COMP_API, "Enable NBI=%d\n", val); + + if (dm->support_ic_type & ODM_RTL8814B) { + odm_set_bb_reg(dm, R_0x1d3c, BIT(19), val); + odm_set_bb_reg(dm, R_0x818, BIT(3), val); + } else if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F)) { + odm_set_bb_reg(dm, R_0x818, BIT(3), !val); + } + odm_set_bb_reg(dm, R_0x818, BIT(11), val); + odm_set_bb_reg(dm, R_0x1d3c, 0x78000000, 0xf); + + if (enable == FUNC_ENABLE) { + switch (path) { + case RF_PATH_A: + odm_set_bb_reg(dm, R_0x1940, BIT(31), val); + break; + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + case RF_PATH_B: + odm_set_bb_reg(dm, R_0x4040, BIT(31), val); + break; + #endif + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + case RF_PATH_C: + odm_set_bb_reg(dm, R_0x5040, BIT(31), val); + break; + #endif + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + case RF_PATH_D: + odm_set_bb_reg(dm, R_0x5140, BIT(31), val); + break; + #endif + default: + break; + } + } else { + odm_set_bb_reg(dm, R_0x1940, BIT(31), val); + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + odm_set_bb_reg(dm, R_0x4040, BIT(31), val); + #endif + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + odm_set_bb_reg(dm, R_0x5040, BIT(31), val); + #endif + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + odm_set_bb_reg(dm, R_0x5140, BIT(31), val); + #endif + } +} + +u8 phydm_phystat_rpt_jgr3(void *dm_void, enum phystat_rpt info, + enum rf_path ant_path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + s8 evm_org, cfo_org, rxsnr_org; + u8 i, return_info = 0, tmp_lsb = 0, tmp_msb = 0, tmp_info = 0; + + /* Update the status for each pkt */ + odm_set_bb_reg(dm, R_0x8c4, 0xfff000, 0x448); + odm_set_bb_reg(dm, R_0x8c0, MASKLWORD, 0x4001); + /* PHY status Page1 */ + odm_set_bb_reg(dm, R_0x8c0, 0x3C00000, 0x1); + /*choose debug port for phystatus */ + odm_set_bb_reg(dm, R_0x1c3c, 0xFFF00, 0x380); + + if (info == PHY_PWDB) { + /* Choose the report of the diff path */ + if (ant_path == RF_PATH_A) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x1); + else if (ant_path == RF_PATH_B) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x2); + else if (ant_path == RF_PATH_C) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x3); + else if (ant_path == RF_PATH_D) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x4); + } else if (info == PHY_EVM) { + /* Choose the report of the diff path */ + if (ant_path == RF_PATH_A) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x10); + else if (ant_path == RF_PATH_B) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x11); + else if (ant_path == RF_PATH_C) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x12); + else if (ant_path == RF_PATH_D) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x13); + return_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xff); + } else if (info == PHY_CFO) { + /* Choose the report of the diff path */ + if (ant_path == RF_PATH_A) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x14); + else if (ant_path == RF_PATH_B) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x15); + else if (ant_path == RF_PATH_C) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x16); + else if (ant_path == RF_PATH_D) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x17); + return_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xff); + } else if (info == PHY_RXSNR) { + /* Choose the report of the diff path */ + if (ant_path == RF_PATH_A) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x18); + else if (ant_path == RF_PATH_B) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x19); + else if (ant_path == RF_PATH_C) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x1a); + else if (ant_path == RF_PATH_D) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x1b); + return_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xff); + } else if (info == PHY_LGAIN) { + /* choose page */ + odm_set_bb_reg(dm, R_0x8c0, 0x3c00000, 0x2); + /* Choose the report of the diff path */ + if (ant_path == RF_PATH_A) { + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xd); + tmp_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0x3f); + return_info = tmp_info; + } else if (ant_path == RF_PATH_B) { + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xd); + tmp_lsb = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xc0); + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xe); + tmp_msb = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xf); + tmp_info |= (tmp_msb << 2) | tmp_lsb; + return_info = tmp_info; + } else if (ant_path == RF_PATH_C) { + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xe); + tmp_lsb = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xf0); + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xf); + tmp_msb = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0x3); + tmp_info |= (tmp_msb << 4) | tmp_lsb; + return_info = tmp_info; + } else if (ant_path == RF_PATH_D) { + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x10); + tmp_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0x3f); + return_info = tmp_info; + } + } else if (info == PHY_HT_AAGC_GAIN) { + /* choose page */ + odm_set_bb_reg(dm, R_0x8c0, 0x3c00000, 0x2); + /* Choose the report of the diff path */ + if (ant_path == RF_PATH_A) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x12); + else if (ant_path == RF_PATH_B) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x13); + else if (ant_path == RF_PATH_C) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x14); + else if (ant_path == RF_PATH_D) + odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x15); + return_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xff); + } + return return_info; +} + +void phydm_ex_hal8814b_wifi_only_hw_config(void *dm_void) +{ + /*BB control*/ + /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c, 0x01800000, 0x2);*/ + /*SW control*/ + /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0xff, 0x77);*/ + /*antenna mux switch */ + /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x974, 0x300, 0x3);*/ + + /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1990, 0x300, 0x0);*/ + + /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x80000, 0x0);*/ + /*switch to WL side controller and gnt_wl gnt_bt debug signal */ + /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x70, 0xff000000, 0x0e);*/ + /*gnt_wl=1 , gnt_bt=0*/ + /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1704, 0xffffffff, + * 0x7700); + */ + /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1700, 0xffffffff, + * 0xc00f0038); + */ +} + +void phydm_user_position_for_sniffer(void *dm_void, u8 user_position) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + /* user position valid */ + odm_set_bb_reg(dm, R_0xa68, BIT(17), 1); + /* Select user seat from pmac */ + odm_set_bb_reg(dm, R_0xa68, BIT(16), 1); + /*user seat*/ + odm_set_bb_reg(dm, R_0xa68, (BIT(19) | BIT(18)), user_position); +} + +#endif +u8 phydm_nbi_setting(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf, + u32 sec_ch) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 fc = 2412; + u8 direction = FREQ_POSITIVE; + u32 tone_idx = 0; + u8 set_result = PHYDM_SET_SUCCESS; + u8 rpt = 0; + + if (enable == FUNC_DISABLE) { + set_result = PHYDM_SET_SUCCESS; + } else { + PHYDM_DBG(dm, ODM_COMP_API, + "[Set NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", + ch, bw, f_intf, + (((sec_ch == PHYDM_DONT_CARE) || (bw == 20) || + (ch > 14)) ? "Don't care" : + (sec_ch == PHYDM_ABOVE) ? "H" : "L")); + + /*@calculate fc*/ + if (phydm_find_fc(dm, ch, bw, sec_ch, &fc) == PHYDM_SET_FAIL) { + set_result = PHYDM_SET_FAIL; + } else { + /*@calculate interference distance*/ + rpt = phydm_find_intf_distance(dm, bw, fc, f_intf, + &tone_idx); + if (rpt == PHYDM_SET_SUCCESS) { + if (f_intf >= fc) + direction = FREQ_POSITIVE; + else + direction = FREQ_NEGATIVE; + + phydm_set_nbi_reg(dm, tone_idx, bw); + + set_result = PHYDM_SET_SUCCESS; + } else { + set_result = PHYDM_SET_NO_NEED; + } + } + } if (set_result == PHYDM_SET_SUCCESS) phydm_nbi_enable(dm, enable); else phydm_nbi_enable(dm, FUNC_DISABLE); - return set_result; + return set_result; } -void -phydm_api_debug( - void *dm_void, - u32 function_map, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_nbi_debug(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 used = *_used; - u32 out_len = *_out_len; - u32 channel = dm_value[1]; - u32 bw = dm_value[2]; - u32 f_interference = dm_value[3]; - u32 second_ch = dm_value[4]; - u8 set_result = 0; - - /*PHYDM_API_NBI*/ - /*-------------------------------------------------------------------------------------------------------------------------------*/ - if (function_map == PHYDM_API_NBI) { - if (dm_value[0] == 100) { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[HELP-NBI] EN(on=1, off=2) CH BW(20/40/80) f_intf(Mhz) Scnd_CH(L=1, H=2)\n"); - return; - - } else if (dm_value[0] == FUNC_ENABLE) { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[Enable NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", - channel, bw, f_interference, - ((second_ch == PHYDM_DONT_CARE) || (bw == 20) || (channel > 14)) ? "Don't care" : ((second_ch == PHYDM_ABOVE) ? "H" : "L")); - set_result = phydm_nbi_setting(dm, FUNC_ENABLE, channel, bw, f_interference, second_ch); - - } else if (dm_value[0] == FUNC_DISABLE) { - PDM_SNPF(out_len, used, output + used, - out_len - used, "[Disable NBI]\n"); - set_result = phydm_nbi_setting(dm, FUNC_DISABLE, channel, bw, f_interference, second_ch); - - } else - - set_result = PHYDM_SET_FAIL; - PDM_SNPF(out_len, used, output + used, out_len - used, - "[NBI set result: %s]\n", - (set_result == PHYDM_SET_SUCCESS) ? "Success" : ((set_result == PHYDM_SET_NO_NEED) ? "No need" : "Error")); + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + u32 val[10] = {0}; + char help[] = "-h"; + u8 i = 0, input_idx = 0, idx_lmt = 0; + u32 enable = 0; /*@function enable*/ + u32 ch = 0; + u32 bw = 0; + u32 f_int = 0; /*@interference frequency*/ + u32 sec_ch = 0; /*secondary channel*/ + u8 rpt = 0; + u8 path = 0; + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + idx_lmt = 6; + else + idx_lmt = 5; + for (i = 0; i < idx_lmt; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]); + input_idx++; + } } - /*PHYDM_CSI_MASK*/ - /*-------------------------------------------------------------------------------------------------------------------------------*/ - else if (function_map == PHYDM_API_CSI_MASK) { - if (dm_value[0] == 100) { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[HELP-CSI MASK] EN(on=1, off=2) CH BW(20/40/80) f_intf(Mhz) Scnd_CH(L=1, H=2)\n"); - return; + if (input_idx == 0) + return; - } else if (dm_value[0] == FUNC_ENABLE) { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[Enable CSI MASK] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", - channel, bw, f_interference, - (channel > 14) ? "Don't care" : (((second_ch == PHYDM_DONT_CARE) || (bw == 20) || (channel > 14)) ? "H" : "L")); - set_result = phydm_csi_mask_setting(dm, FUNC_ENABLE, channel, bw, f_interference, second_ch); + enable = val[0]; + ch = val[1]; + bw = val[2]; + f_int = val[3]; + sec_ch = val[4]; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + path = (u8)val[5]; + #endif - } else if (dm_value[0] == FUNC_DISABLE) { - PDM_SNPF(out_len, used, output + used, - out_len - used, "[Disable CSI MASK]\n"); - set_result = phydm_csi_mask_setting(dm, FUNC_DISABLE, channel, bw, f_interference, second_ch); - - } else - - set_result = PHYDM_SET_FAIL; + if ((strcmp(input[1], help) == 0)) { + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + PDM_SNPF(out_len, used, output + used, out_len - used, + "{en:1 Dis:2} {ch} {BW:20/40/80} {f_intf(khz)} {Scnd_CH(L=1, H=2)} {Path:A~D(0~3)}\n"); + else + #endif + PDM_SNPF(out_len, used, output + used, out_len - used, + "{en:1 Dis:2} {ch} {BW:20/40/80} {f_intf(khz)} {Scnd_CH(L=1, H=2)}\n"); + *_used = used; + *_out_len = out_len; + return; + } else if (val[0] == FUNC_ENABLE) { PDM_SNPF(out_len, used, output + used, out_len - used, - "[CSI MASK set result: %s]\n", - (set_result == PHYDM_SET_SUCCESS) ? "Success" : ((set_result == PHYDM_SET_NO_NEED) ? "No need" : "Error")); + "[Enable NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", + ch, bw, f_int, + ((sec_ch == PHYDM_DONT_CARE) || + (bw == 20) || (ch > 14)) ? "Don't care" : + ((sec_ch == PHYDM_ABOVE) ? "H" : "L")); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + rpt = phydm_nbi_setting_jgr3(dm, enable, ch, bw, f_int, + sec_ch, path); + else + #endif + rpt = phydm_nbi_setting(dm, enable, ch, bw, f_int, + sec_ch); + } else if (val[0] == FUNC_DISABLE) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Disable NBI]\n"); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + rpt = phydm_nbi_setting_jgr3(dm, enable, ch, bw, f_int, + sec_ch, path); + else + #endif + rpt = phydm_nbi_setting(dm, enable, ch, bw, f_int, + sec_ch); + } else { + rpt = PHYDM_SET_FAIL; } + + PDM_SNPF(out_len, used, output + used, out_len - used, + "[NBI set result: %s]\n", + (rpt == PHYDM_SET_SUCCESS) ? "Success" : + ((rpt == PHYDM_SET_NO_NEED) ? "No need" : "Error")); + *_used = used; *_out_len = out_len; } -void -phydm_stop_ck320( - void *dm_void, - u8 enable -) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 reg_value = enable ? 1 : 0; - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - odm_set_bb_reg(dm, 0x8b4, BIT(6), reg_value); - /**/ - } else { +void phydm_csi_debug(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + u32 val[10] = {0}; + char help[] = "-h"; + u8 i = 0, input_idx = 0, idx_lmt = 0; + u32 enable = 0; /*@function enable*/ + u32 ch = 0; + u32 bw = 0; + u32 f_int = 0; /*@interference frequency*/ + u32 sec_ch = 0; /*secondary channel*/ + u8 rpt = 0; + u8 wgt = 0; - if (dm->support_ic_type & ODM_IC_N_2SS) { /*N-2SS*/ - odm_set_bb_reg(dm, 0x87c, BIT(29), reg_value); - /**/ - } else { /*N-1SS*/ - odm_set_bb_reg(dm, 0x87c, BIT(31), reg_value); - /**/ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + idx_lmt = 6; + else + idx_lmt = 5; + + for (i = 0; i < idx_lmt; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]); + input_idx++; } } + + if (input_idx == 0) + return; + + enable = val[0]; + ch = val[1]; + bw = val[2]; + f_int = val[3]; + sec_ch = val[4]; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + wgt = (u8)val[5]; + #endif + + if ((strcmp(input[1], help) == 0)) { + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + PDM_SNPF(out_len, used, output + used, out_len - used, + "{en:1 Dis:2} {ch} {BW:20/40/80} {f_intf(KHz)} {Scnd_CH(L=1, H=2)}\n{wgt:(7:3/4),(6~1: 1/2 ~ 1/64),(0:0)}\n"); + else + #endif + PDM_SNPF(out_len, used, output + used, out_len - used, + "{en:1 Dis:2} {ch} {BW:20/40/80} {f_intf(Mhz)} {Scnd_CH(L=1, H=2)}\n"); + + *_used = used; + *_out_len = out_len; + return; + + } else if (val[0] == FUNC_ENABLE) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Enable CSI MASK] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", + ch, bw, f_int, + (ch > 14) ? "Don't care" : + (((sec_ch == PHYDM_DONT_CARE) || + (bw == 20) || (ch > 14)) ? "H" : "L")); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + rpt = phydm_csi_mask_setting_jgr3(dm, enable, ch, bw, + f_int, sec_ch, wgt); + else + #endif + rpt = phydm_csi_mask_setting(dm, enable, ch, bw, f_int, + sec_ch); + } else if (val[0] == FUNC_DISABLE) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Disable CSI MASK]\n"); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + rpt = phydm_csi_mask_setting_jgr3(dm, enable, ch, bw, + f_int, sec_ch, wgt); + else + #endif + rpt = phydm_csi_mask_setting(dm, enable, ch, bw, f_int, + sec_ch); + } else { + rpt = PHYDM_SET_FAIL; + } + PDM_SNPF(out_len, used, output + used, out_len - used, + "[CSI MASK set result: %s]\n", + (rpt == PHYDM_SET_SUCCESS) ? "Success" : + ((rpt == PHYDM_SET_NO_NEED) ? "No need" : "Error")); + + *_used = used; + *_out_len = out_len; +} + +void phydm_stop_ck320(void *dm_void, u8 enable) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 val = enable ? 1 : 0; + + if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + odm_set_bb_reg(dm, R_0x8b4, BIT(6), val); + } else { + if (dm->support_ic_type & ODM_IC_N_2SS) /*N-2SS*/ + odm_set_bb_reg(dm, R_0x87c, BIT(29), val); + else /*N-1SS*/ + odm_set_bb_reg(dm, R_0x87c, BIT(31), val); + } } boolean -phydm_set_bb_txagc_offset( - void *dm_void, - s8 power_offset, /*(unit: dB)*/ - u8 add_half_db /*(+0.5 dB)*/ -) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - s8 power_idx = power_offset * 2; - boolean set_success = false; +phydm_set_bb_txagc_offset(void *dm_void, s8 power_offset, /*@(unit: dB)*/ + u8 add_half_db /*@(+0.5 dB)*/) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + s8 power_idx = power_offset * 2; + boolean set_success = false; - PHYDM_DBG(dm, ODM_COMP_API, "power_offset=%d, add_half_db =%d\n", power_offset, add_half_db); + PHYDM_DBG(dm, ODM_COMP_API, "power_offset=%d, add_half_db =%d\n", + power_offset, add_half_db); - #if ODM_IC_11AC_SERIES_SUPPORT + #if ODM_IC_11AC_SERIES_SUPPORT if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - if (power_offset > -16 || power_offset < 15) { + if (power_offset > -16 && power_offset < 15) { if (add_half_db) power_idx += 1; power_idx &= 0x3f; - PHYDM_DBG(dm, ODM_COMP_API, "Reg_idx =0x%x\n", power_idx); - odm_set_bb_reg(dm, 0x8b4, 0x3f, power_idx); + PHYDM_DBG(dm, ODM_COMP_API, "Reg_idx =0x%x\n", + power_idx); + odm_set_bb_reg(dm, R_0x8b4, 0x3f, power_idx); set_success = true; } else { pr_debug("[Warning] TX AGC Offset Setting error!"); } } #endif - - #if ODM_IC_11N_SERIES_SUPPORT + + #if ODM_IC_11N_SERIES_SUPPORT if (dm->support_ic_type & ODM_IC_11N_SERIES) { if (power_offset > -8 || power_offset < 7) { if (add_half_db) power_idx += 1; power_idx &= 0x1f; - - PHYDM_DBG(dm, ODM_COMP_API, "Reg_idx =0x%x\n", power_idx); - odm_set_bb_reg(dm, 0x80c, 0x1f00, power_idx); - odm_set_bb_reg(dm, 0x80c, 0x3e000, power_idx); + + PHYDM_DBG(dm, ODM_COMP_API, "Reg_idx =0x%x\n", + power_idx); + /*r_txagc_offset_a*/ + odm_set_bb_reg(dm, R_0x80c, 0x1f00, power_idx); + /*r_txagc_offset_b*/ + odm_set_bb_reg(dm, R_0x80c, 0x3e000, power_idx); set_success = true; } else { pr_debug("[Warning] TX AGC Offset Setting error!"); } } #endif - - return set_success; + + return set_success; } #ifdef PHYDM_COMMON_API_SUPPORT boolean -phydm_api_set_txagc( - void *dm_void, - u32 power_index, - enum rf_path path, - u8 hw_rate, - boolean is_single_rate -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - boolean ret = false; - u8 i; +phydm_api_shift_txagc(void *dm_void, u32 pwr_offset, enum rf_path path, + boolean is_positive) { + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean ret = false; + u32 txagc_cck = 0; + u32 txagc_ofdm = 0; + u32 r_txagc_ofdm[4] = {0x18e8, 0x41e8, 0x52e8, 0x53e8}; + u32 r_txagc_cck[4] = {0x18a0, 0x41a0, 0x52a0, 0x53a0}; -#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1)) - if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) { + #if (RTL8822C_SUPPORT || RTL8812F_SUPPORT || RTL8197G_SUPPORT) + if (dm->support_ic_type & + (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) { + if (path > RF_PATH_B) { + PHYDM_DBG(dm, ODM_PHY_CONFIG, "Unsupported path (%d)\n", + path); + return false; + } + txagc_cck = (u8)odm_get_bb_reg(dm, r_txagc_cck[path], + 0x7F0000); + txagc_ofdm = (u8)odm_get_bb_reg(dm, r_txagc_ofdm[path], + 0x1FC00); + if (is_positive) { + if (((txagc_cck + pwr_offset) > 127) || + ((txagc_ofdm + pwr_offset) > 127)) + return false; + + txagc_cck += pwr_offset; + txagc_ofdm += pwr_offset; + } else { + if (pwr_offset > txagc_cck || pwr_offset > txagc_ofdm) + return false; + + txagc_cck -= pwr_offset; + txagc_ofdm -= pwr_offset; + } + #if (RTL8822C_SUPPORT) + ret = config_phydm_write_txagc_ref_8822c(dm, (u8)txagc_cck, + path, PDM_CCK); + ret &= config_phydm_write_txagc_ref_8822c(dm, (u8)txagc_ofdm, + path, PDM_OFDM); + #endif + #if (RTL8812F_SUPPORT) + ret = config_phydm_write_txagc_ref_8812f(dm, (u8)txagc_cck, + path, PDM_CCK); + ret &= config_phydm_write_txagc_ref_8812f(dm, (u8)txagc_ofdm, + path, PDM_OFDM); + #endif + #if (RTL8197G_SUPPORT) + ret = config_phydm_write_txagc_ref_8197g(dm, (u8)txagc_cck, + path, PDM_CCK); + ret &= config_phydm_write_txagc_ref_8197g(dm, (u8)txagc_ofdm, + path, PDM_OFDM); + #endif + PHYDM_DBG(dm, ODM_PHY_CONFIG, + "%s: path-%d txagc_cck_ref=%x txagc_ofdm_ref=0x%x\n", + __func__, path, txagc_cck, txagc_ofdm); + } + #endif + + #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) + if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) { + if (path > RF_PATH_D) { + PHYDM_DBG(dm, ODM_PHY_CONFIG, "Unsupported path (%d)\n", + path); + return false; + } + txagc_cck = (u8)odm_get_bb_reg(dm, r_txagc_cck[path], + 0x7F0000); + txagc_ofdm = (u8)odm_get_bb_reg(dm, r_txagc_ofdm[path], + 0x1FC00); + if (is_positive) { + if (((txagc_cck + pwr_offset) > 127) || + ((txagc_ofdm + pwr_offset) > 127)) + return false; + + txagc_cck += pwr_offset; + txagc_ofdm += pwr_offset; + } else { + if (pwr_offset > txagc_cck || pwr_offset > txagc_ofdm) + return false; + + txagc_cck -= pwr_offset; + txagc_ofdm -= pwr_offset; + } + #if (RTL8198F_SUPPORT) + ret = config_phydm_write_txagc_ref_8198f(dm, (u8)txagc_cck, + path, PDM_CCK); + ret &= config_phydm_write_txagc_ref_8198f(dm, (u8)txagc_ofdm, + path, PDM_OFDM); + #endif + #if (RTL8814B_SUPPORT) + ret = config_phydm_write_txagc_ref_8814b(dm, (u8)txagc_cck, + path, PDM_CCK); + ret &= config_phydm_write_txagc_ref_8814b(dm, (u8)txagc_ofdm, + path, PDM_OFDM); + #endif + PHYDM_DBG(dm, ODM_PHY_CONFIG, + "%s: path-%d txagc_cck_ref=%x txagc_ofdm_ref=0x%x\n", + __func__, path, txagc_cck, txagc_ofdm); + } + #endif + + return ret; +} + +boolean +phydm_api_set_txagc(void *dm_void, u32 pwr_idx, enum rf_path path, + u8 rate, boolean is_single_rate) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean ret = false; + #if (RTL8198F_SUPPORT || RTL8822C_SUPPORT || RTL8812F_SUPPORT ||\ + RTL8814B_SUPPORT || RTL8197G_SUPPORT) + u8 base = 0; + u8 txagc_tmp = 0; + s8 pw_by_rate_tmp = 0; + s8 pw_by_rate_new = 0; + #endif + #if (DM_ODM_SUPPORT_TYPE & ODM_AP) + u8 i = 0; + #endif + +#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8195B_SUPPORT) + if (dm->support_ic_type & + (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B)) { if (is_single_rate) { - - #if (RTL8822B_SUPPORT == 1) + #if (RTL8822B_SUPPORT) if (dm->support_ic_type == ODM_RTL8822B) - ret = phydm_write_txagc_1byte_8822b(dm, power_index, path, hw_rate); + ret = phydm_write_txagc_1byte_8822b(dm, pwr_idx, + path, rate); #endif - - #if (RTL8821C_SUPPORT == 1) + + #if (RTL8821C_SUPPORT) if (dm->support_ic_type == ODM_RTL8821C) - ret = phydm_write_txagc_1byte_8821c(dm, power_index, path, hw_rate); + ret = phydm_write_txagc_1byte_8821c(dm, pwr_idx, + path, rate); #endif - + + #if (RTL8195B_SUPPORT) + if (dm->support_ic_type == ODM_RTL8195B) + ret = phydm_write_txagc_1byte_8195b(dm, pwr_idx, + path, rate); + #endif + #if (DM_ODM_SUPPORT_TYPE & ODM_AP) - set_current_tx_agc(dm->priv, path, hw_rate, (u8)power_index); + set_current_tx_agc(dm->priv, path, rate, (u8)pwr_idx); #endif } else { - #if (RTL8822B_SUPPORT == 1) + #if (RTL8822B_SUPPORT) if (dm->support_ic_type == ODM_RTL8822B) - ret = config_phydm_write_txagc_8822b(dm, power_index, path, hw_rate); + ret = config_phydm_write_txagc_8822b(dm, + pwr_idx, + path, + rate); #endif - - #if (RTL8821C_SUPPORT == 1) + + #if (RTL8821C_SUPPORT) if (dm->support_ic_type == ODM_RTL8821C) - ret = config_phydm_write_txagc_8821c(dm, power_index, path, hw_rate); + ret = config_phydm_write_txagc_8821c(dm, + pwr_idx, + path, + rate); #endif - + + #if (RTL8195B_SUPPORT) + if (dm->support_ic_type == ODM_RTL8195B) + ret = config_phydm_write_txagc_8195b(dm, + pwr_idx, + path, + rate); + #endif + #if (DM_ODM_SUPPORT_TYPE & ODM_AP) for (i = 0; i < 4; i++) - set_current_tx_agc(dm->priv, path, (hw_rate + i), (u8)power_index); + set_current_tx_agc(dm->priv, path, (rate + i), + (u8)pwr_idx); #endif } } #endif +#if (RTL8198F_SUPPORT) + if (dm->support_ic_type & ODM_RTL8198F) { + if (rate < 0x4) + txagc_tmp = config_phydm_read_txagc_8198f(dm, path, + rate, + PDM_CCK); + else + txagc_tmp = config_phydm_read_txagc_8198f(dm, path, + rate, + PDM_OFDM); -#if (RTL8197F_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8197F) - ret = config_phydm_write_txagc_8197f(dm, power_index, path, hw_rate); + pw_by_rate_tmp = config_phydm_read_txagc_diff_8198f(dm, rate); + base = txagc_tmp - pw_by_rate_tmp; + base = base & 0x7f; + if (DIFF_2((pwr_idx & 0x7f), base) > 64 || pwr_idx > 127) + return false; + + pw_by_rate_new = (s8)(pwr_idx - base); + ret = phydm_write_txagc_1byte_8198f(dm, pw_by_rate_new, rate); + PHYDM_DBG(dm, ODM_PHY_CONFIG, + "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n", + __func__, path, rate, base, pw_by_rate_new); + } #endif +#if (RTL8822C_SUPPORT) + if (dm->support_ic_type & ODM_RTL8822C) { + if (rate < 0x4) + txagc_tmp = config_phydm_read_txagc_8822c(dm, path, + rate, + PDM_CCK); + else + txagc_tmp = config_phydm_read_txagc_8822c(dm, path, + rate, + PDM_OFDM); + + pw_by_rate_tmp = config_phydm_read_txagc_diff_8822c(dm, rate); + base = txagc_tmp - pw_by_rate_tmp; + base = base & 0x7f; + if (DIFF_2((pwr_idx & 0x7f), base) > 63 || pwr_idx > 127) + return false; + + pw_by_rate_new = (s8)(pwr_idx - base); + ret = phydm_write_txagc_1byte_8822c(dm, pw_by_rate_new, rate); + PHYDM_DBG(dm, ODM_PHY_CONFIG, + "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n", + __func__, path, rate, base, pw_by_rate_new); + } +#endif + +#if (RTL8814B_SUPPORT) + if (dm->support_ic_type & ODM_RTL8814B) { + if (rate < 0x4) + txagc_tmp = config_phydm_read_txagc_8814b(dm, path, + rate, + PDM_CCK); + else + txagc_tmp = config_phydm_read_txagc_8814b(dm, path, + rate, + PDM_OFDM); + + pw_by_rate_tmp = config_phydm_read_txagc_diff_8814b(dm, rate); + base = txagc_tmp - pw_by_rate_tmp; + base = base & 0x7f; + if (DIFF_2((pwr_idx & 0x7f), base) > 64) + return false; + + pw_by_rate_new = (s8)(pwr_idx - base); + ret = phydm_write_txagc_1byte_8814b(dm, pw_by_rate_new, rate); + PHYDM_DBG(dm, ODM_PHY_CONFIG, + "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n", + __func__, path, rate, base, pw_by_rate_new); + } +#endif + +#if (RTL8812F_SUPPORT) + if (dm->support_ic_type & ODM_RTL8812F) { + if (rate < 0x4) + txagc_tmp = config_phydm_read_txagc_8812f(dm, path, + rate, + PDM_CCK); + else + txagc_tmp = config_phydm_read_txagc_8812f(dm, path, + rate, + PDM_OFDM); + + pw_by_rate_tmp = config_phydm_read_txagc_diff_8812f(dm, rate); + base = txagc_tmp - pw_by_rate_tmp; + base = base & 0x7f; + if (DIFF_2((pwr_idx & 0x7f), base) > 63 || pwr_idx > 127) + return false; + + pw_by_rate_new = (s8)(pwr_idx - base); + ret = phydm_write_txagc_1byte_8812f(dm, pw_by_rate_new, rate); + PHYDM_DBG(dm, ODM_PHY_CONFIG, + "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n", + __func__, path, rate, base, pw_by_rate_new); + } +#endif + +#if (RTL8197G_SUPPORT) + if (dm->support_ic_type & ODM_RTL8197G) { + if (rate < 0x4) + txagc_tmp = config_phydm_read_txagc_8197g(dm, path, + rate, + PDM_CCK); + else + txagc_tmp = config_phydm_read_txagc_8197g(dm, path, + rate, + PDM_OFDM); + + pw_by_rate_tmp = config_phydm_read_txagc_diff_8197g(dm, rate); + base = txagc_tmp - pw_by_rate_tmp; + base = base & 0x7f; + if (DIFF_2((pwr_idx & 0x7f), base) > 63 || pwr_idx > 127) + return false; + + pw_by_rate_new = (s8)(pwr_idx - base); + ret = phydm_write_txagc_1byte_8197g(dm, pw_by_rate_new, rate); + PHYDM_DBG(dm, ODM_PHY_CONFIG, + "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n", + __func__, path, rate, base, pw_by_rate_new); + } +#endif + +#if (RTL8197F_SUPPORT) + if (dm->support_ic_type & ODM_RTL8197F) + ret = config_phydm_write_txagc_8197f(dm, pwr_idx, path, rate); +#endif + +#if (RTL8192F_SUPPORT) + if (dm->support_ic_type & ODM_RTL8192F) + ret = config_phydm_write_txagc_8192f(dm, pwr_idx, path, rate); +#endif + +#if (RTL8721D_SUPPORT) + if (dm->support_ic_type & ODM_RTL8721D) + ret = config_phydm_write_txagc_8721d(dm, pwr_idx, path, rate); +#endif return ret; } -u8 -phydm_api_get_txagc( - void *dm_void, - enum rf_path path, - u8 hw_rate -) +u8 phydm_api_get_txagc(void *dm_void, enum rf_path path, u8 hw_rate) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 ret = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 ret = 0; -#if (RTL8822B_SUPPORT == 1) +#if (RTL8822B_SUPPORT) if (dm->support_ic_type & ODM_RTL8822B) ret = config_phydm_read_txagc_8822b(dm, path, hw_rate); #endif -#if (RTL8197F_SUPPORT == 1) +#if (RTL8197F_SUPPORT) if (dm->support_ic_type & ODM_RTL8197F) ret = config_phydm_read_txagc_8197f(dm, path, hw_rate); #endif -#if (RTL8821C_SUPPORT == 1) +#if (RTL8821C_SUPPORT) if (dm->support_ic_type & ODM_RTL8821C) ret = config_phydm_read_txagc_8821c(dm, path, hw_rate); #endif - return ret; -} - - -boolean -phydm_api_switch_bw_channel( - void *dm_void, - u8 central_ch, - u8 primary_ch_idx, - enum channel_width bandwidth -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - boolean ret = false; - -#if (RTL8822B_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8822B) - ret = config_phydm_switch_channel_bw_8822b(dm, central_ch, primary_ch_idx, bandwidth); +#if (RTL8195B_SUPPORT) + if (dm->support_ic_type & ODM_RTL8195B) + ret = config_phydm_read_txagc_8195b(dm, path, hw_rate); #endif -#if (RTL8197F_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8197F) - ret = config_phydm_switch_channel_bw_8197f(dm, central_ch, primary_ch_idx, bandwidth); +/*@jj add 20170822*/ +#if (RTL8192F_SUPPORT) + if (dm->support_ic_type & ODM_RTL8192F) + ret = config_phydm_read_txagc_8192f(dm, path, hw_rate); #endif -#if (RTL8821C_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8821C) - ret = config_phydm_switch_channel_bw_8821c(dm, central_ch, primary_ch_idx, bandwidth); +#if (RTL8198F_SUPPORT) + if (dm->support_ic_type & ODM_RTL8198F) { + if (hw_rate < 0x4) { + ret = config_phydm_read_txagc_8198f(dm, path, hw_rate, + PDM_CCK); + } else { + ret = config_phydm_read_txagc_8198f(dm, path, hw_rate, + PDM_OFDM); + } + } #endif +#if (RTL8822C_SUPPORT) + if (dm->support_ic_type & ODM_RTL8822C) { + if (hw_rate < 0x4) { + ret = config_phydm_read_txagc_8822c(dm, path, hw_rate, + PDM_CCK); + } else { + ret = config_phydm_read_txagc_8822c(dm, path, hw_rate, + PDM_OFDM); + } + } +#endif + +#if (RTL8814B_SUPPORT) + if (dm->support_ic_type & ODM_RTL8814B) { + if (hw_rate < 0x4) { + ret = config_phydm_read_txagc_8814b(dm, path, hw_rate, + PDM_CCK); + } else { + ret = config_phydm_read_txagc_8814b(dm, path, hw_rate, + PDM_OFDM); + } + } +#endif + +#if (RTL8812F_SUPPORT) + if (dm->support_ic_type & ODM_RTL8812F) { + if (hw_rate < 0x4) { + ret = config_phydm_read_txagc_8812f(dm, path, hw_rate, + PDM_CCK); + } else { + ret = config_phydm_read_txagc_8812f(dm, path, hw_rate, + PDM_OFDM); + } + } +#endif + +#if (RTL8197G_SUPPORT) + if (dm->support_ic_type & ODM_RTL8197G) { + if (hw_rate < 0x4) { + ret = config_phydm_read_txagc_8197g(dm, path, hw_rate, + PDM_CCK); + } else { + ret = config_phydm_read_txagc_8197g(dm, path, hw_rate, + PDM_OFDM); + } + } +#endif + +#if (RTL8721D_SUPPORT) + if (dm->support_ic_type & ODM_RTL8721D) + ret = config_phydm_read_txagc_8721d(dm, path, hw_rate); +#endif return ret; } boolean -phydm_api_trx_mode( - void *dm_void, - enum bb_path tx_path, - enum bb_path rx_path, - boolean is_tx2_path -) +phydm_api_switch_bw_channel(void *dm_void, u8 ch, u8 pri_ch, + enum channel_width bw) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - boolean ret = false; + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean ret = false; -#if (RTL8822B_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8822B) - ret = config_phydm_trx_mode_8822b(dm, tx_path, rx_path, is_tx2_path); + switch (dm->support_ic_type) { +#if (RTL8822B_SUPPORT) + case ODM_RTL8822B: + ret = config_phydm_switch_channel_bw_8822b(dm, ch, pri_ch, bw); + break; #endif -#if (RTL8197F_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8197F) - ret = config_phydm_trx_mode_8197f(dm, tx_path, rx_path, is_tx2_path); +#if (RTL8197F_SUPPORT) + case ODM_RTL8197F: + ret = config_phydm_switch_channel_bw_8197f(dm, ch, pri_ch, bw); + break; #endif +#if (RTL8821C_SUPPORT) + case ODM_RTL8821C: + ret = config_phydm_switch_channel_bw_8821c(dm, ch, pri_ch, bw); + break; +#endif + +#if (RTL8192F_SUPPORT) + case ODM_RTL8192F: + ret = config_phydm_switch_channel_bw_8192f(dm, ch, pri_ch, bw); + break; +#endif + +#if (RTL8198F_SUPPORT) + case ODM_RTL8198F: + ret = config_phydm_switch_channel_bw_8198f(dm, ch, pri_ch, bw); + break; +#endif + +#if (RTL8822C_SUPPORT) + case ODM_RTL8822C: + ret = config_phydm_switch_channel_bw_8822c(dm, ch, pri_ch, bw); + break; +#endif + +#if (RTL8814B_SUPPORT) + case ODM_RTL8814B: + ret = config_phydm_switch_channel_bw_8814b(dm, ch, pri_ch, bw); + break; +#endif + +#if (RTL8812F_SUPPORT) + case ODM_RTL8812F: + ret = config_phydm_switch_channel_bw_8812f(dm, ch, pri_ch, bw); + break; +#endif + +#if (RTL8197G_SUPPORT) + case ODM_RTL8197G: + ret = config_phydm_switch_channel_bw_8197g(dm, ch, pri_ch, bw); + break; +#endif + +#if (RTL8721D_SUPPORT) + case ODM_RTL8721D: + ret = config_phydm_switch_channel_bw_8721d(dm, ch, pri_ch, bw); +#endif + + default: + break; + } return ret; } + +boolean +phydm_api_trx_mode(void *dm_void, enum bb_path tx_path, enum bb_path rx_path, + enum bb_path tx_path_ctrl) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean ret = false; + boolean is_2tx = false; + + if (tx_path_ctrl == BB_PATH_AB) + is_2tx = true; + + switch (dm->support_ic_type) { + #if (RTL8822B_SUPPORT) + case ODM_RTL8822B: + ret = config_phydm_trx_mode_8822b(dm, tx_path, rx_path, + tx_path_ctrl); + break; + #endif + + #if (RTL8197F_SUPPORT) + case ODM_RTL8197F: + ret = config_phydm_trx_mode_8197f(dm, tx_path, rx_path, is_2tx); + break; + #endif + + #if (RTL8192F_SUPPORT) + case ODM_RTL8192F: + ret = config_phydm_trx_mode_8192f(dm, tx_path, rx_path, is_2tx); + break; + #endif + + #if (RTL8198F_SUPPORT) + case ODM_RTL8198F: + ret = config_phydm_trx_mode_8198f(dm, tx_path, rx_path, is_2tx); + break; + #endif + + #if 0/*(RTL8814B_SUPPORT)*/ + case ODM_RTL8814B: + ret = config_phydm_trx_mode_8814b(dm, tx_path, rx_path, is_2tx); + break; + #endif + + #if (RTL8822C_SUPPORT) + case ODM_RTL8822C: + ret = config_phydm_trx_mode_8822c(dm, tx_path, rx_path, + tx_path_ctrl); + break; + #endif + + #if (RTL8812F_SUPPORT) + case ODM_RTL8812F: + ret = config_phydm_trx_mode_8812f(dm, tx_path, rx_path, is_2tx); + break; + #endif + + #if (RTL8197G_SUPPORT) + case ODM_RTL8197G: + ret = config_phydm_trx_mode_8197g(dm, tx_path, rx_path, is_2tx); + break; + #endif + + #if (RTL8721D_SUPPORT) + case ODM_RTL8721D: + ret = config_phydm_trx_mode_8721d(dm, tx_path, rx_path, is_2tx); + break; + #endif + } + return ret; +} +#else +u8 config_phydm_read_txagc_n(void *dm_void, enum rf_path path, u8 hw_rate) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 read_back_data = INVALID_TXAGC_DATA; + u32 reg_txagc; + u32 reg_mask; + /* This function is for 92E/88E etc... */ + /* @Input need to be HW rate index, not driver rate index!!!! */ + + /* @Error handling */ + if (path > RF_PATH_B || hw_rate > ODM_RATEMCS15) { + PHYDM_DBG(dm, ODM_PHY_CONFIG, "%s: unsupported path (%d)\n", + __func__, path); + return INVALID_TXAGC_DATA; + } + + if (path == RF_PATH_A) { + switch (hw_rate) { + case ODM_RATE1M: + reg_txagc = R_0xe08; + reg_mask = 0x00007f00; + break; + case ODM_RATE2M: + reg_txagc = R_0x86c; + reg_mask = 0x00007f00; + break; + case ODM_RATE5_5M: + reg_txagc = R_0x86c; + reg_mask = 0x007f0000; + break; + case ODM_RATE11M: + reg_txagc = R_0x86c; + reg_mask = 0x7f000000; + break; + + case ODM_RATE6M: + reg_txagc = R_0xe00; + reg_mask = 0x0000007f; + break; + case ODM_RATE9M: + reg_txagc = R_0xe00; + reg_mask = 0x00007f00; + break; + case ODM_RATE12M: + reg_txagc = R_0xe00; + reg_mask = 0x007f0000; + break; + case ODM_RATE18M: + reg_txagc = R_0xe00; + reg_mask = 0x7f000000; + break; + case ODM_RATE24M: + reg_txagc = R_0xe04; + reg_mask = 0x0000007f; + break; + case ODM_RATE36M: + reg_txagc = R_0xe04; + reg_mask = 0x00007f00; + break; + case ODM_RATE48M: + reg_txagc = R_0xe04; + reg_mask = 0x007f0000; + break; + case ODM_RATE54M: + reg_txagc = R_0xe04; + reg_mask = 0x7f000000; + break; + + case ODM_RATEMCS0: + reg_txagc = R_0xe10; + reg_mask = 0x0000007f; + break; + case ODM_RATEMCS1: + reg_txagc = R_0xe10; + reg_mask = 0x00007f00; + break; + case ODM_RATEMCS2: + reg_txagc = R_0xe10; + reg_mask = 0x007f0000; + break; + case ODM_RATEMCS3: + reg_txagc = R_0xe10; + reg_mask = 0x7f000000; + break; + case ODM_RATEMCS4: + reg_txagc = R_0xe14; + reg_mask = 0x0000007f; + break; + case ODM_RATEMCS5: + reg_txagc = R_0xe14; + reg_mask = 0x00007f00; + break; + case ODM_RATEMCS6: + reg_txagc = R_0xe14; + reg_mask = 0x007f0000; + break; + case ODM_RATEMCS7: + reg_txagc = R_0xe14; + reg_mask = 0x7f000000; + break; + + case ODM_RATEMCS8: + reg_txagc = R_0xe18; + reg_mask = 0x0000007f; + break; + case ODM_RATEMCS9: + reg_txagc = R_0xe18; + reg_mask = 0x00007f00; + break; + case ODM_RATEMCS10: + reg_txagc = R_0xe18; + reg_mask = 0x007f0000; + break; + case ODM_RATEMCS11: + reg_txagc = R_0xe18; + reg_mask = 0x7f000000; + break; + case ODM_RATEMCS12: + reg_txagc = R_0xe1c; + reg_mask = 0x0000007f; + break; + case ODM_RATEMCS13: + reg_txagc = R_0xe1c; + reg_mask = 0x00007f00; + break; + case ODM_RATEMCS14: + reg_txagc = R_0xe1c; + reg_mask = 0x007f0000; + break; + case ODM_RATEMCS15: + reg_txagc = R_0xe1c; + reg_mask = 0x7f000000; + break; + + default: + PHYDM_DBG(dm, ODM_PHY_CONFIG, "Invalid HWrate!\n"); + break; + } + } else if (path == RF_PATH_B) { + switch (hw_rate) { + case ODM_RATE1M: + reg_txagc = R_0x838; + reg_mask = 0x00007f00; + break; + case ODM_RATE2M: + reg_txagc = R_0x838; + reg_mask = 0x007f0000; + break; + case ODM_RATE5_5M: + reg_txagc = R_0x838; + reg_mask = 0x7f000000; + break; + case ODM_RATE11M: + reg_txagc = R_0x86c; + reg_mask = 0x0000007f; + break; + + case ODM_RATE6M: + reg_txagc = R_0x830; + reg_mask = 0x0000007f; + break; + case ODM_RATE9M: + reg_txagc = R_0x830; + reg_mask = 0x00007f00; + break; + case ODM_RATE12M: + reg_txagc = R_0x830; + reg_mask = 0x007f0000; + break; + case ODM_RATE18M: + reg_txagc = R_0x830; + reg_mask = 0x7f000000; + break; + case ODM_RATE24M: + reg_txagc = R_0x834; + reg_mask = 0x0000007f; + break; + case ODM_RATE36M: + reg_txagc = R_0x834; + reg_mask = 0x00007f00; + break; + case ODM_RATE48M: + reg_txagc = R_0x834; + reg_mask = 0x007f0000; + break; + case ODM_RATE54M: + reg_txagc = R_0x834; + reg_mask = 0x7f000000; + break; + + case ODM_RATEMCS0: + reg_txagc = R_0x83c; + reg_mask = 0x0000007f; + break; + case ODM_RATEMCS1: + reg_txagc = R_0x83c; + reg_mask = 0x00007f00; + break; + case ODM_RATEMCS2: + reg_txagc = R_0x83c; + reg_mask = 0x007f0000; + break; + case ODM_RATEMCS3: + reg_txagc = R_0x83c; + reg_mask = 0x7f000000; + break; + case ODM_RATEMCS4: + reg_txagc = R_0x848; + reg_mask = 0x0000007f; + break; + case ODM_RATEMCS5: + reg_txagc = R_0x848; + reg_mask = 0x00007f00; + break; + case ODM_RATEMCS6: + reg_txagc = R_0x848; + reg_mask = 0x007f0000; + break; + case ODM_RATEMCS7: + reg_txagc = R_0x848; + reg_mask = 0x7f000000; + break; + + case ODM_RATEMCS8: + reg_txagc = R_0x84c; + reg_mask = 0x0000007f; + break; + case ODM_RATEMCS9: + reg_txagc = R_0x84c; + reg_mask = 0x00007f00; + break; + case ODM_RATEMCS10: + reg_txagc = R_0x84c; + reg_mask = 0x007f0000; + break; + case ODM_RATEMCS11: + reg_txagc = R_0x84c; + reg_mask = 0x7f000000; + break; + case ODM_RATEMCS12: + reg_txagc = R_0x868; + reg_mask = 0x0000007f; + break; + case ODM_RATEMCS13: + reg_txagc = R_0x868; + reg_mask = 0x00007f00; + break; + case ODM_RATEMCS14: + reg_txagc = R_0x868; + reg_mask = 0x007f0000; + break; + case ODM_RATEMCS15: + reg_txagc = R_0x868; + reg_mask = 0x7f000000; + break; + + default: + PHYDM_DBG(dm, ODM_PHY_CONFIG, "Invalid HWrate!\n"); + break; + } + } else { + PHYDM_DBG(dm, ODM_PHY_CONFIG, "Invalid RF path!!\n"); + } + read_back_data = (u8)odm_get_bb_reg(dm, reg_txagc, reg_mask); + PHYDM_DBG(dm, ODM_PHY_CONFIG, "%s: path-%d rate index 0x%x = 0x%x\n", + __func__, path, hw_rate, read_back_data); + return read_back_data; +} #endif +#ifdef CONFIG_MCC_DM +#ifdef DYN_ANT_WEIGHTING_SUPPORT +void phydm_set_weighting_cmn(struct dm_struct *dm) +{ + PHYDM_DBG(dm, DBG_COMP_MCC, "%s\n", __func__); + odm_set_bb_reg(dm, 0xc04, (BIT(18) | BIT(21)), 0x0); + odm_set_bb_reg(dm, 0xe04, (BIT(18) | BIT(21)), 0x0); +} + +void phydm_set_weighting_mcc(u8 b_equal_weighting, void *dm_void, u8 port) +{ + /*u8 reg_8;*/ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + u8 val_0x98e, val_0x98f, val_0x81b; + u32 temp_reg; + + PHYDM_DBG(dm, DBG_COMP_MCC, "ant_weighting_mcc, port = %d\n", port); + if (b_equal_weighting) { + temp_reg = odm_get_bb_reg(dm, 0x98c, 0x00ff0000); + val_0x98e = (u8)(temp_reg >> 16) & 0xc0; + temp_reg = odm_get_bb_reg(dm, 0x98c, 0xff000000); + val_0x98f = (u8)(temp_reg >> 24) & 0x7f; + temp_reg = odm_get_bb_reg(dm, 0x818, 0xff000000); + val_0x81b = (u8)(temp_reg >> 24) & 0xfd; + PHYDM_DBG(dm, DBG_COMP_MCC, "Equal weighting ,rssi_min = %d\n", + dm->rssi_min); + /*equal weighting*/ + } else { + val_0x98e = 0x44; + val_0x98f = 0x43; + temp_reg = odm_get_bb_reg(dm, 0x818, 0xff000000); + val_0x81b = (u8)(temp_reg >> 24) | BIT(2); + PHYDM_DBG(dm, DBG_COMP_MCC, "AGC weighting ,rssi_min = %d\n", + dm->rssi_min); + /*fix sec_min_wgt = 1/2*/ + } + mcc_dm->mcc_reg_id[2] = 0x2; + mcc_dm->mcc_dm_reg[2] = 0x98e; + mcc_dm->mcc_dm_val[2][port] = val_0x98e; + + mcc_dm->mcc_reg_id[3] = 0x3; + mcc_dm->mcc_dm_reg[3] = 0x98f; + mcc_dm->mcc_dm_val[3][port] = val_0x98f; + + mcc_dm->mcc_reg_id[4] = 0x4; + mcc_dm->mcc_dm_reg[4] = 0x81b; + mcc_dm->mcc_dm_val[4][port] = val_0x81b; +} + +void phydm_dyn_ant_dec_mcc(u8 port, u8 rssi_in, void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 rssi_l2h = 43, rssi_h2l = 37; + + if (rssi_in == 0xff) + phydm_set_weighting_mcc(FALSE, dm, port); + else if (rssi_in >= rssi_l2h) + phydm_set_weighting_mcc(TRUE, dm, port); + else if (rssi_in <= rssi_h2l) + phydm_set_weighting_mcc(FALSE, dm, port); +} + +void phydm_dynamic_ant_weighting_mcc_8822b(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + u8 i; + + phydm_set_weighting_cmn(dm); + for (i = 0; i <= 1; i++) + phydm_dyn_ant_dec_mcc(i, mcc_dm->mcc_rssi[i], dm); +} +#endif /*#ifdef DYN_ANT_WEIGHTING_SUPPORT*/ + +void phydm_mcc_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + u8 i; + + /*PHYDM_DBG(dm, DBG_COMP_MCC, ("MCC init\n"));*/ + PHYDM_DBG(dm, DBG_COMP_MCC, "MCC init\n"); + for (i = 0; i < MCC_DM_REG_NUM; i++) { + mcc_dm->mcc_reg_id[i] = 0xff; + mcc_dm->mcc_dm_reg[i] = 0; + mcc_dm->mcc_dm_val[i][0] = 0; + mcc_dm->mcc_dm_val[i][1] = 0; + } + for (i = 0; i < NUM_STA; i++) { + mcc_dm->sta_macid[0][i] = 0xff; + mcc_dm->sta_macid[1][i] = 0xff; + } + /* Function init */ + dm->is_stop_dym_ant_weighting = 0; +} + +u8 phydm_check(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + struct cmn_sta_info *p_entry = NULL; + u8 shift = 0; + u8 i = 0; + u8 j = 0; + u8 rssi_min[2] = {0xff, 0xff}; + u8 sta_num = 8; + u8 mcc_macid = 0; + + for (i = 0; i <= 1; i++) { + for (j = 0; j < sta_num; j++) { + if (mcc_dm->sta_macid[i][j] != 0xff) { + mcc_macid = mcc_dm->sta_macid[i][j]; + p_entry = dm->phydm_sta_info[mcc_macid]; + if (!p_entry) { + PHYDM_DBG(dm, DBG_COMP_MCC, + "PEntry NULL(mac=%d)\n", + mcc_dm->sta_macid[i][j]); + return _FAIL; + } + PHYDM_DBG(dm, DBG_COMP_MCC, + "undec_smoothed_pwdb=%d\n", + p_entry->rssi_stat.rssi); + if (p_entry->rssi_stat.rssi < rssi_min[i]) + rssi_min[i] = p_entry->rssi_stat.rssi; + } + } + } + mcc_dm->mcc_rssi[0] = (u8)rssi_min[0]; + mcc_dm->mcc_rssi[1] = (u8)rssi_min[1]; + return _SUCCESS; +} + +void phydm_mcc_h2ccmd_rst(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + u8 i; + u8 regid; + u8 h2c_mcc[H2C_MAX_LENGTH]; + + /* RST MCC */ + for (i = 0; i < H2C_MAX_LENGTH; i++) + h2c_mcc[i] = 0xff; + h2c_mcc[0] = 0x00; + odm_fill_h2c_cmd(dm, PHYDM_H2C_MCC, H2C_MAX_LENGTH, h2c_mcc); + PHYDM_DBG(dm, DBG_COMP_MCC, "MCC H2C RST\n"); +} + +void phydm_mcc_h2ccmd(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + u8 i; + u8 regid; + u8 h2c_mcc[H2C_MAX_LENGTH]; + + if (mcc_dm->mcc_rf_ch[0] == 0xff && mcc_dm->mcc_rf_ch[1] == 0xff) { + PHYDM_DBG(dm, DBG_COMP_MCC, "MCC channel Error\n"); + return; + } + /* Set Channel number */ + for (i = 0; i < H2C_MAX_LENGTH; i++) + h2c_mcc[i] = 0xff; + h2c_mcc[0] = 0xe0; + h2c_mcc[1] = (u8)(mcc_dm->mcc_rf_ch[0]); + h2c_mcc[2] = (u8)(mcc_dm->mcc_rf_ch[0] >> 8); + h2c_mcc[3] = (u8)(mcc_dm->mcc_rf_ch[1]); + h2c_mcc[4] = (u8)(mcc_dm->mcc_rf_ch[1] >> 8); + h2c_mcc[5] = 0xff; + h2c_mcc[6] = 0xff; + odm_fill_h2c_cmd(dm, PHYDM_H2C_MCC, H2C_MAX_LENGTH, h2c_mcc); + PHYDM_DBG(dm, DBG_COMP_MCC, + "MCC H2C SetCH: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", + h2c_mcc[0], h2c_mcc[1], h2c_mcc[2], h2c_mcc[3], + h2c_mcc[4], h2c_mcc[5], h2c_mcc[6]); + + /* Set Reg and value*/ + for (i = 0; i < H2C_MAX_LENGTH; i++) + h2c_mcc[i] = 0xff; + + for (i = 0; i < MCC_DM_REG_NUM; i++) { + regid = mcc_dm->mcc_reg_id[i]; + if (regid != 0xff) { + h2c_mcc[0] = 0xa0 | (regid & 0x1f); + h2c_mcc[1] = (u8)(mcc_dm->mcc_dm_reg[i]); + h2c_mcc[2] = (u8)(mcc_dm->mcc_dm_reg[i] >> 8); + h2c_mcc[3] = mcc_dm->mcc_dm_val[i][0]; + h2c_mcc[4] = mcc_dm->mcc_dm_val[i][1]; + h2c_mcc[5] = 0xff; + h2c_mcc[6] = 0xff; + odm_fill_h2c_cmd(dm, PHYDM_H2C_MCC, H2C_MAX_LENGTH, + h2c_mcc); + PHYDM_DBG(dm, DBG_COMP_MCC, + "MCC H2C: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", + h2c_mcc[0], h2c_mcc[1], h2c_mcc[2], + h2c_mcc[3], h2c_mcc[4], + h2c_mcc[5], h2c_mcc[6]); + } + } +} + +void phydm_mcc_ctrl(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + + PHYDM_DBG(dm, DBG_COMP_MCC, "MCC status: %x\n", mcc_dm->mcc_status); + /*MCC stage no change*/ + if (mcc_dm->mcc_status == mcc_dm->mcc_pre_status) + return; + /*Not in MCC stage*/ + if (mcc_dm->mcc_status == 0) { + /* Enable normal Ant-weighting */ + dm->is_stop_dym_ant_weighting = 0; + /* Enable normal DIG */ + odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, 0x20); + } else { + /* Disable normal Ant-weighting */ + dm->is_stop_dym_ant_weighting = 1; + /* Enable normal DIG */ + odm_pause_dig(dm, PHYDM_PAUSE_NO_SET, PHYDM_PAUSE_LEVEL_1, + 0x20); + } + if (mcc_dm->mcc_status == 0 && mcc_dm->mcc_pre_status != 0) + phydm_mcc_init(dm); + mcc_dm->mcc_pre_status = mcc_dm->mcc_status; + } + +void phydm_fill_mcccmd(void *dm_void, u8 regid, u16 reg_add, + u8 val0, u8 val1) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + + mcc_dm->mcc_reg_id[regid] = regid; + mcc_dm->mcc_dm_reg[regid] = reg_add; + mcc_dm->mcc_dm_val[regid][0] = val0; + mcc_dm->mcc_dm_val[regid][1] = val1; +} + +void phydm_mcc_switch(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + s8 ret; + + phydm_mcc_ctrl(dm); + if (mcc_dm->mcc_status == 0) {/*Not in MCC stage*/ + phydm_mcc_h2ccmd_rst(dm); + return; + } + PHYDM_DBG(dm, DBG_COMP_MCC, "MCC switch\n"); + ret = phydm_check(dm); + if (ret == _FAIL) { + PHYDM_DBG(dm, DBG_COMP_MCC, "MCC check fail\n"); + return; + } + /* Set IGI*/ + phydm_mcc_igi_cal(dm); + + /* Set Antenna Gain*/ +#if (RTL8822B_SUPPORT == 1) + phydm_dynamic_ant_weighting_mcc_8822b(dm); +#endif + /* Set H2C Cmd*/ + phydm_mcc_h2ccmd(dm); +} +#endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -phydm_normal_driver_rx_sniffer( - struct dm_struct *dm, - u8 *desc, - PRT_RFD_STATUS rt_rfd_status, - u8 *drv_info, - u8 phy_status -) +void phydm_normal_driver_rx_sniffer( + struct dm_struct *dm, + u8 *desc, + PRT_RFD_STATUS rt_rfd_status, + u8 *drv_info, + u8 phy_status) { #if (defined(CONFIG_PHYDM_RX_SNIFFER_PARSING)) - u32 *msg; - u16 seq_num; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u32 *msg; + u16 seq_num; if (rt_rfd_status->packet_report_type != NORMAL_RX) return; @@ -1331,94 +3012,84 @@ phydm_normal_driver_rx_sniffer( return; } - if (!(fat_tab->fat_state == FAT_TRAINING_STATE)) - return; - if (phy_status == true) { - if ((dm->rx_pkt_type == type_block_ack) || (dm->rx_pkt_type == type_rts) || (dm->rx_pkt_type == type_cts)) + if (dm->rx_pkt_type == type_block_ack || + dm->rx_pkt_type == type_rts || dm->rx_pkt_type == type_cts) seq_num = 0; else seq_num = rt_rfd_status->seq_num; - PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, "%04d , %01s, rate=0x%02x, L=%04d , %s , %s", - seq_num, - /*rt_rfd_status->mac_id,*/ - ((rt_rfd_status->is_crc) ? "C" : (rt_rfd_status->is_ampdu) ? "A" : "_"), - rt_rfd_status->data_rate, - rt_rfd_status->length, - ((rt_rfd_status->band_width == 0) ? "20M" : ((rt_rfd_status->band_width == 1) ? "40M" : "80M")), - ((rt_rfd_status->is_ldpc) ? "LDP" : "BCC")); + PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, + "%04d , %01s, rate=0x%02x, L=%04d , %s , %s", + seq_num, + /*rt_rfd_status->mac_id,*/ + (rt_rfd_status->is_crc ? "C" : + rt_rfd_status->is_ampdu ? "A" : "_"), + rt_rfd_status->data_rate, + rt_rfd_status->length, + ((rt_rfd_status->band_width == 0) ? "20M" : + ((rt_rfd_status->band_width == 1) ? "40M" : "80M")), + (rt_rfd_status->is_ldpc ? "LDP" : "BCC")); - if (dm->rx_pkt_type == type_asoc_req) { + if (dm->rx_pkt_type == type_asoc_req) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "AS_REQ"); - /**/ - } else if (dm->rx_pkt_type == type_asoc_rsp) { + else if (dm->rx_pkt_type == type_asoc_rsp) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "AS_RSP"); - /**/ - } else if (dm->rx_pkt_type == type_probe_req) { + else if (dm->rx_pkt_type == type_probe_req) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "PR_REQ"); - /**/ - } else if (dm->rx_pkt_type == type_probe_rsp) { + else if (dm->rx_pkt_type == type_probe_rsp) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "PR_RSP"); - /**/ - } else if (dm->rx_pkt_type == type_deauth) { + else if (dm->rx_pkt_type == type_deauth) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "DEAUTH"); - /**/ - } else if (dm->rx_pkt_type == type_beacon) { + else if (dm->rx_pkt_type == type_beacon) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "BEACON"); - /**/ - } else if (dm->rx_pkt_type == type_block_ack_req) { + else if (dm->rx_pkt_type == type_block_ack_req) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "BA_REQ"); - /**/ - } else if (dm->rx_pkt_type == type_rts) { + else if (dm->rx_pkt_type == type_rts) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "__RTS_"); - /**/ - } else if (dm->rx_pkt_type == type_cts) { + else if (dm->rx_pkt_type == type_cts) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "__CTS_"); - /**/ - } else if (dm->rx_pkt_type == type_ack) { + else if (dm->rx_pkt_type == type_ack) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "__ACK_"); - /**/ - } else if (dm->rx_pkt_type == type_block_ack) { + else if (dm->rx_pkt_type == type_block_ack) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "__BA__"); - /**/ - } else if (dm->rx_pkt_type == type_data) { + else if (dm->rx_pkt_type == type_data) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "_DATA_"); - /**/ - } else if (dm->rx_pkt_type == type_data_ack) { + else if (dm->rx_pkt_type == type_data_ack) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "Data_Ack"); - /**/ - } else if (dm->rx_pkt_type == type_qos_data) { + else if (dm->rx_pkt_type == type_qos_data) PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "QoS_Data"); - /**/ - } else { - PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [0x%x]", dm->rx_pkt_type); - /**/ - } + else + PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [0x%x]", + dm->rx_pkt_type); PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [RSSI=%d,%d,%d,%d ]", - dm->rssi_a, - dm->rssi_b, - dm->rssi_c, - dm->rssi_d); + dm->rssi_a, + dm->rssi_b, + dm->rssi_c, + dm->rssi_d); msg = (u32 *)drv_info; - PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , P-STS[28:0]=%08x-%08x-%08x-%08x-%08x-%08x-%08x\n", - msg[6], msg[5], msg[4], msg[3], msg[2], msg[1], msg[1]); + PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, + " , P-STS[28:0]=%08x-%08x-%08x-%08x-%08x-%08x-%08x\n", + msg[6], msg[5], msg[4], msg[3], + msg[2], msg[1], msg[1]); } else { - PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, "%04d , %01s, rate=0x%02x, L=%04d , %s , %s\n", - rt_rfd_status->seq_num, - /*rt_rfd_status->mac_id,*/ - ((rt_rfd_status->is_crc) ? "C" : (rt_rfd_status->is_ampdu) ? "A" : "_"), - rt_rfd_status->data_rate, - rt_rfd_status->length, - ((rt_rfd_status->band_width == 0) ? "20M" : ((rt_rfd_status->band_width == 1) ? "40M" : "80M")), - ((rt_rfd_status->is_ldpc) ? "LDP" : "BCC")); + PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, + "%04d , %01s, rate=0x%02x, L=%04d , %s , %s\n", + rt_rfd_status->seq_num, + /*rt_rfd_status->mac_id,*/ + (rt_rfd_status->is_crc ? "C" : + (rt_rfd_status->is_ampdu) ? "A" : "_"), + rt_rfd_status->data_rate, + rt_rfd_status->length, + ((rt_rfd_status->band_width == 0) ? "20M" : + ((rt_rfd_status->band_width == 1) ? "40M" : "80M")), + (rt_rfd_status->is_ldpc ? "LDP" : "BCC")); } - #endif } -#endif +#endif diff --git a/hal/phydm/phydm_api.h b/hal/phydm/phydm_api.h index 69ac533..bceb0c4 100644 --- a/hal/phydm/phydm_api.h +++ b/hal/phydm/phydm_api.h @@ -23,228 +23,170 @@ * *****************************************************************************/ +#ifndef __PHYDM_API_H__ +#define __PHYDM_API_H__ -#ifndef __PHYDM_API_H__ -#define __PHYDM_API_H__ +#define PHYDM_API_VERSION "1.0" /* @2017.07.10 Dino, Add phydm_api.h*/ -#define PHYDM_API_VERSION "1.0" /* 2017.07.10 Dino, Add phydm_api.h*/ - - -/* 1 ============================================================ +/* @1 ============================================================ * 1 Definition - * 1 ============================================================ */ + * 1 ============================================================ + */ +#define CN_CNT_MAX 10 /*@max condition number threshold*/ +#define FUNC_ENABLE 1 +#define FUNC_DISABLE 2 -#define FUNC_ENABLE 1 -#define FUNC_DISABLE 2 +/*@NBI API------------------------------------*/ +#define NBI_128TONE 27 /*register table size*/ +#define NBI_256TONE 59 /*register table size*/ -/*NBI API------------------------------------*/ -#define NBI_TABLE_SIZE_128 27 -#define NBI_TABLE_SIZE_256 59 +#define NUM_START_CH_80M 7 +#define NUM_START_CH_40M 14 -#define NUM_START_CH_80M 7 -#define NUM_START_CH_40M 14 +#define CH_OFFSET_40M 2 +#define CH_OFFSET_80M 6 -#define CH_OFFSET_40M 2 -#define CH_OFFSET_80M 6 +#define FFT_128_TYPE 1 +#define FFT_256_TYPE 2 -#define FFT_128_TYPE 1 -#define FFT_256_TYPE 2 - -#define FREQ_POSITIVE 1 -#define FREQ_NEGATIVE 2 -/*------------------------------------------------*/ - -/* 1 ============================================================ - * 1 structure - * 1 ============================================================ */ - -struct phydm_api_stuc { - u32 rx_iqc_reg_1; /*N-mode: for pathA REG0xc14*/ - u32 rx_iqc_reg_2; /*N-mode: for pathB REG0xc1c*/ - u8 tx_queue_bitmap;/*REG0x520[23:16]*/ +#define FREQ_POSITIVE 1 +#define FREQ_NEGATIVE 2 +/*@------------------------------------------------*/ +enum phystat_rpt { + PHY_PWDB = 0, + PHY_EVM = 1, + PHY_CFO = 2, + PHY_RXSNR = 3, + PHY_LGAIN = 4, + PHY_HT_AAGC_GAIN = 5, }; -/* 1 ============================================================ +#ifndef PHYDM_COMMON_API_SUPPORT +#define INVALID_RF_DATA 0xffffffff +#define INVALID_TXAGC_DATA 0xff +#endif + +/* @1 ============================================================ + * 1 structure + * 1 ============================================================ + */ + +struct phydm_api_stuc { + u32 rxiqc_reg1; /*N-mode: for pathA REG0xc14*/ + u32 rxiqc_reg2; /*N-mode: for pathB REG0xc1c*/ + u8 tx_queue_bitmap; /*REG0x520[23:16]*/ + u8 ccktx_path; +}; + +/* @1 ============================================================ * 1 enumeration - * 1 ============================================================ */ + * 1 ============================================================ + */ - - -/* 1 ============================================================ +/* @1 ============================================================ * 1 function prototype - * 1 ============================================================ */ + * 1 ============================================================ + */ +void phydm_reset_bb_hw_cnt(void *dm_void); -void -phydm_dynamic_ant_weighting( - void *dm_void -); +void phydm_dynamic_ant_weighting(void *dm_void); #ifdef DYN_ANT_WEIGHTING_SUPPORT -void -phydm_dyn_ant_weight_dbg( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); +void phydm_ant_weight_dbg(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); #endif -void -phydm_pathb_q_matrix_rotate_en( - void *dm_void -); +void phydm_trx_antenna_setting_init(void *dm_void, u8 num_rf_path); -void -phydm_pathb_q_matrix_rotate( - void *dm_void, - u16 phase_idx -); +void phydm_config_ofdm_rx_path(void *dm_void, u32 path); -void -phydm_init_trx_antenna_setting( - void *dm_void -); +void phydm_config_cck_rx_path(void *dm_void, enum bb_path path); -void -phydm_config_ofdm_rx_path( - void *dm_void, - u32 path -); +void phydm_config_cck_rx_antenna_init(void *dm_void); -void -phydm_config_cck_rx_path( - void *dm_void, - enum bb_path path -); +void phydm_config_trx_path(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); -void -phydm_config_cck_rx_antenna_init( - void *dm_void -); +void phydm_tx_2path(void *dm_void); -void -phydm_config_trx_path( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -); +void phydm_stop_3_wire(void *dm_void, u8 set_type); -void -phydm_tx_2path( - void *dm_void -); +u8 phydm_stop_ic_trx(void *dm_void, u8 set_type); -void -phydm_stop_3_wire( - void *dm_void, - u8 set_type -); +void phydm_dis_cck_trx(void *dm_void, u8 set_type); -u8 -phydm_stop_ic_trx( - void *dm_void, - u8 set_type -); +void phydm_set_ext_switch(void *dm_void, u32 ext_ant_switch); -void -phydm_set_ext_switch( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -); +void phydm_nbi_enable(void *dm_void, u32 enable); -void -phydm_nbi_enable( - void *dm_void, - u32 enable -); +u8 phydm_csi_mask_setting(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf, + u32 sec_ch); -u8 -phydm_csi_mask_setting( - void *dm_void, - u32 enable, - u32 channel, - u32 bw, - u32 f_interference, - u32 Second_ch -); +u8 phydm_nbi_setting(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf, + u32 sec_ch); -u8 -phydm_nbi_setting( - void *dm_void, - u32 enable, - u32 channel, - u32 bw, - u32 f_interference, - u32 second_ch -); +void phydm_nbi_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); +void phydm_csi_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); -void -phydm_api_debug( - void *dm_void, - u32 function_map, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -); - -void -phydm_stop_ck320( - void *dm_void, - u8 enable -); +void phydm_stop_ck320(void *dm_void, u8 enable); boolean -phydm_set_bb_txagc_offset( - void *dm_void, - s8 power_offset, - u8 add_half_db -); +phydm_set_bb_txagc_offset(void *dm_void, s8 power_offset, u8 add_half_db); +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT +u8 phydm_csi_mask_setting_jgr3(void *dm_void, u32 enable, u32 ch, u32 bw, + u32 f_intf, u32 sec_ch, u8 wgt); + +void phydm_set_csi_mask_jgr3(void *dm_void, u32 tone_idx_tmp, u8 tone_direction, + u8 wgt); + +u8 phydm_nbi_setting_jgr3(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf, + u32 sec_ch, u8 path); + +void phydm_set_nbi_reg_jgr3(void *dm_void, u32 tone_idx_tmp, u8 tone_direction, + u8 path); + +void phydm_nbi_enable_jgr3(void *dm_void, u32 enable, u8 path); + +u8 phydm_phystat_rpt_jgr3(void *dm_void, enum phystat_rpt info, + enum rf_path ant_path); +void phydm_user_position_for_sniffer(void *dm_void, u8 user_position); + +#endif #ifdef PHYDM_COMMON_API_SUPPORT +boolean +phydm_api_shift_txagc(void *dm_void, u32 pwr_offset, enum rf_path path, + boolean is_positive); +boolean +phydm_api_set_txagc(void *dm_void, u32 power_index, enum rf_path path, + u8 hw_rate, boolean is_single_rate); + +u8 phydm_api_get_txagc(void *dm_void, enum rf_path path, u8 hw_rate); boolean -phydm_api_set_txagc( - void *dm_void, - u32 power_index, - enum rf_path path, - u8 hw_rate, - boolean is_single_rate -); - -u8 -phydm_api_get_txagc( - void *dm_void, - enum rf_path path, - u8 hw_rate -); +phydm_api_switch_bw_channel(void *dm_void, u8 central_ch, u8 primary_ch_idx, + enum channel_width bandwidth); boolean -phydm_api_switch_bw_channel( - void *dm_void, - u8 central_ch, - u8 primary_ch_idx, - enum channel_width bandwidth -); - -boolean -phydm_api_trx_mode( - void *dm_void, - enum bb_path tx_path, - enum bb_path rx_path, - boolean is_tx2_path -); +phydm_api_trx_mode(void *dm_void, enum bb_path tx_path, enum bb_path rx_path, + enum bb_path tx_path_ctrl); #endif +#ifdef CONFIG_MCC_DM +#ifdef DYN_ANT_WEIGHTING_SUPPORT +void phydm_dynamic_ant_weighting_mcc_8822b(void *dm_void); +#endif /*#ifdef DYN_ANT_WEIGHTING_SUPPORT*/ +void phydm_fill_mcccmd(void *dm_void, u8 regid, u16 reg_add, + u8 val0, u8 val1); +u8 phydm_check(void *dm_void); +void phydm_mcc_init(void *dm_void); +void phydm_mcc_switch(void *dm_void); +#endif /*#ifdef CONFIG_MCC_DM*/ + #endif diff --git a/hal/phydm/phydm_auto_dbg.c b/hal/phydm/phydm_auto_dbg.c index b907661..bd77799 100644 --- a/hal/phydm/phydm_auto_dbg.c +++ b/hal/phydm/phydm_auto_dbg.c @@ -23,22 +23,20 @@ * *****************************************************************************/ -/* ************************************************************ +/************************************************************* * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" #ifdef PHYDM_AUTO_DEGBUG -void -phydm_check_hang_reset( - void *dm_void -) +void phydm_check_hang_reset( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_auto_dbg_struc *atd_t = &dm->auto_dbg_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table; atd_t->dbg_step = 0; atd_t->auto_dbg_type = AUTO_DBG_STOP; @@ -46,32 +44,40 @@ phydm_check_hang_reset( dm->debug_components &= (~ODM_COMP_API); } -#if (ODM_IC_11N_SERIES_SUPPORT == 1) -void -phydm_auto_check_hang_engine_n( - void *dm_void -) +void phydm_check_hang_init( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_auto_dbg_struc *atd_t = &dm->auto_dbg_table; - struct n_dbgport_803 dbgport_803 = {0}; - u32 value32_tmp = 0, value32_tmp_2 = 0; - u8 i; - u32 curr_dbg_port_val[DBGPORT_CHK_NUM]; - u16 curr_ofdm_t_cnt; - u16 curr_ofdm_r_cnt; - u16 curr_cck_t_cnt; - u16 curr_cck_r_cnt; - u16 curr_ofdm_crc_error_cnt; - u16 curr_cck_crc_error_cnt; - u16 diff_ofdm_t_cnt; - u16 diff_ofdm_r_cnt; - u16 diff_cck_t_cnt; - u16 diff_cck_r_cnt; - u16 diff_ofdm_crc_error_cnt; - u16 diff_cck_crc_error_cnt; - u8 rf_mode; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table; + atd_t->dbg_step = 0; + atd_t->auto_dbg_type = AUTO_DBG_STOP; + phydm_pause_dm_watchdog(dm, PHYDM_RESUME); +} + +#if (ODM_IC_11N_SERIES_SUPPORT == 1) +void phydm_auto_check_hang_engine_n( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table; + struct n_dbgport_803 dbgport_803 = {0}; + u32 value32_tmp = 0, value32_tmp_2 = 0; + u8 i; + u32 curr_dbg_port_val[DBGPORT_CHK_NUM]; + u16 curr_ofdm_t_cnt; + u16 curr_ofdm_r_cnt; + u16 curr_cck_t_cnt; + u16 curr_cck_r_cnt; + u16 curr_ofdm_crc_error_cnt; + u16 curr_cck_crc_error_cnt; + u16 diff_ofdm_t_cnt; + u16 diff_ofdm_r_cnt; + u16 diff_cck_t_cnt; + u16 diff_cck_r_cnt; + u16 diff_ofdm_crc_error_cnt; + u16 diff_cck_crc_error_cnt; + u8 rf_mode; if (atd_t->auto_dbg_type == AUTO_DBG_STOP) return; @@ -83,246 +89,228 @@ phydm_auto_check_hang_engine_n( if (atd_t->dbg_step == 0) { pr_debug("dbg_step=0\n\n"); - + /*Reset all packet counter*/ - odm_set_bb_reg(dm, 0xf14, BIT(16), 1); - odm_set_bb_reg(dm, 0xf14, BIT(16), 0); + odm_set_bb_reg(dm, R_0xf14, BIT(16), 1); + odm_set_bb_reg(dm, R_0xf14, BIT(16), 0); - - - } else if (atd_t->dbg_step == 1) { + } else if (atd_t->dbg_step == 1) { pr_debug("dbg_step=1\n\n"); /*Check packet counter Register*/ - atd_t->ofdm_t_cnt = (u16)odm_get_bb_reg(dm, 0x9cc, MASKHWORD); - atd_t->ofdm_r_cnt = (u16)odm_get_bb_reg(dm, 0xf94, MASKLWORD); - atd_t->ofdm_crc_error_cnt = (u16)odm_get_bb_reg(dm, 0xf94, MASKHWORD); - - atd_t->cck_t_cnt = (u16)odm_get_bb_reg(dm, 0x9d0, MASKHWORD);; - atd_t->cck_r_cnt = (u16)odm_get_bb_reg(dm, 0xfa0, MASKHWORD); - atd_t->cck_crc_error_cnt = (u16)odm_get_bb_reg(dm, 0xf84, 0x3fff); + atd_t->ofdm_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9cc, MASKHWORD); + atd_t->ofdm_r_cnt = (u16)odm_get_bb_reg(dm, R_0xf94, MASKLWORD); + atd_t->ofdm_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf94, + MASKHWORD); + atd_t->cck_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9d0, MASKHWORD); + atd_t->cck_r_cnt = (u16)odm_get_bb_reg(dm, R_0xfa0, MASKHWORD); + atd_t->cck_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf84, + 0x3fff); /*Check Debug Port*/ for (i = 0; i < DBGPORT_CHK_NUM; i++) { - - if (phydm_set_bb_dbg_port(dm, BB_DBGPORT_PRIORITY_3, (u32)atd_t->dbg_port_table[i])) { - atd_t->dbg_port_val[i] = phydm_get_bb_dbg_port_value(dm); + if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, + (u32)atd_t->dbg_port_table[i]) + ) { + atd_t->dbg_port_val[i] = + phydm_get_bb_dbg_port_val(dm); phydm_release_bb_dbg_port(dm); } } - - } else if (atd_t->dbg_step == 2) { + + } else if (atd_t->dbg_step == 2) { pr_debug("dbg_step=2\n\n"); /*Check packet counter Register*/ - curr_ofdm_t_cnt = (u16)odm_get_bb_reg(dm, 0x9cc, MASKHWORD); - curr_ofdm_r_cnt = (u16)odm_get_bb_reg(dm, 0xf94, MASKLWORD); - curr_ofdm_crc_error_cnt = (u16)odm_get_bb_reg(dm, 0xf94, MASKHWORD); - - curr_cck_t_cnt = (u16)odm_get_bb_reg(dm, 0x9d0, MASKHWORD);; - curr_cck_r_cnt = (u16)odm_get_bb_reg(dm, 0xfa0, MASKHWORD); - curr_cck_crc_error_cnt = (u16)odm_get_bb_reg(dm, 0xf84, 0x3fff); + curr_ofdm_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9cc, MASKHWORD); + curr_ofdm_r_cnt = (u16)odm_get_bb_reg(dm, R_0xf94, MASKLWORD); + curr_ofdm_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf94, + MASKHWORD); + + curr_cck_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9d0, MASKHWORD); + curr_cck_r_cnt = (u16)odm_get_bb_reg(dm, R_0xfa0, MASKHWORD); + curr_cck_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf84, + 0x3fff); /*Check Debug Port*/ for (i = 0; i < DBGPORT_CHK_NUM; i++) { - - if (phydm_set_bb_dbg_port(dm, BB_DBGPORT_PRIORITY_3, (u32)atd_t->dbg_port_table[i])) { - curr_dbg_port_val[i] = phydm_get_bb_dbg_port_value(dm); + if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, + (u32)atd_t->dbg_port_table[i]) + ) { + curr_dbg_port_val[i] = + phydm_get_bb_dbg_port_val(dm); phydm_release_bb_dbg_port(dm); } } - - /*=== Make check hang decision ================================*/ + + /*=== Make check hang decision ===============================*/ pr_debug("Check Hang Decision\n\n"); /* ----- Check RF Register -----------------------------------*/ for (i = 0; i < dm->num_rf_path; i++) { - - rf_mode = (u8)odm_get_rf_reg(dm, i, 0x0, 0xf0000); - + rf_mode = (u8)odm_get_rf_reg(dm, i, RF_0x0, 0xf0000); pr_debug("RF0x0[%d] = 0x%x\n", i, rf_mode); - if (rf_mode > 3) { pr_debug("Incorrect RF mode\n"); pr_debug("ReasonCode:RHN-1\n"); - - } } - - value32_tmp = odm_get_rf_reg(dm, 0, 0xb0, 0xf0000); - + value32_tmp = odm_get_rf_reg(dm, 0, RF_0xb0, 0xf0000); if (dm->support_ic_type == ODM_RTL8188E) { if (value32_tmp != 0xff8c8) { pr_debug("ReasonCode:RHN-3\n"); } } - - /* ----- Check BB Register -----------------------------------*/ - + /* ----- Check BB Register ----------------------------------*/ /*BB mode table*/ - value32_tmp = odm_get_bb_reg(dm, 0x824, 0xe); - value32_tmp_2 = odm_get_bb_reg(dm, 0x82c, 0xe); - pr_debug("BB TX mode table {A, B}= {%d, %d}\n", value32_tmp, value32_tmp_2); + value32_tmp = odm_get_bb_reg(dm, R_0x824, 0xe); + value32_tmp_2 = odm_get_bb_reg(dm, R_0x82c, 0xe); + pr_debug("BB TX mode table {A, B}= {%d, %d}\n", + value32_tmp, value32_tmp_2); - if ((value32_tmp > 3) || (value32_tmp_2 > 3)) { - + if (value32_tmp > 3 || value32_tmp_2 > 3) { pr_debug("ReasonCode:RHN-2\n"); } - value32_tmp = odm_get_bb_reg(dm, 0x824, 0x700000); - value32_tmp_2 = odm_get_bb_reg(dm, 0x82c, 0x700000); - pr_debug("BB RX mode table {A, B}= {%d, %d}\n", value32_tmp, value32_tmp_2); + value32_tmp = odm_get_bb_reg(dm, R_0x824, 0x700000); + value32_tmp_2 = odm_get_bb_reg(dm, R_0x82c, 0x700000); + pr_debug("BB RX mode table {A, B}= {%d, %d}\n", value32_tmp, + value32_tmp_2); - if ((value32_tmp > 3) || (value32_tmp_2 > 3)) { - + if (value32_tmp > 3 || value32_tmp_2 > 3) { pr_debug("ReasonCode:RHN-2\n"); } - /*BB HW Block*/ - value32_tmp = odm_get_bb_reg(dm, 0x800, MASKDWORD); - + value32_tmp = odm_get_bb_reg(dm, R_0x800, MASKDWORD); + if (!(value32_tmp & BIT(24))) { pr_debug("Reg0x800[24] = 0, CCK BLK is disabled\n"); pr_debug("ReasonCode: THN-3\n"); } - + if (!(value32_tmp & BIT(25))) { pr_debug("Reg0x800[24] = 0, OFDM BLK is disabled\n"); pr_debug("ReasonCode:THN-3\n"); } /*BB Continue TX*/ - value32_tmp = odm_get_bb_reg(dm, 0xd00, 0x70000000); + value32_tmp = odm_get_bb_reg(dm, R_0xd00, 0x70000000); pr_debug("Continue TX=%d\n", value32_tmp); if (value32_tmp != 0) { pr_debug("ReasonCode: THN-4\n"); } - /* ----- Check Packet Counter --------------------------------*/ diff_ofdm_t_cnt = curr_ofdm_t_cnt - atd_t->ofdm_t_cnt; diff_ofdm_r_cnt = curr_ofdm_r_cnt - atd_t->ofdm_r_cnt; - diff_ofdm_crc_error_cnt = curr_ofdm_crc_error_cnt - atd_t->ofdm_crc_error_cnt; - + diff_ofdm_crc_error_cnt = curr_ofdm_crc_error_cnt - + atd_t->ofdm_crc_error_cnt; + diff_cck_t_cnt = curr_cck_t_cnt - atd_t->cck_t_cnt; diff_cck_r_cnt = curr_cck_r_cnt - atd_t->cck_r_cnt; - diff_cck_crc_error_cnt = curr_cck_crc_error_cnt - atd_t->cck_crc_error_cnt; + diff_cck_crc_error_cnt = curr_cck_crc_error_cnt - + atd_t->cck_crc_error_cnt; - pr_debug("OFDM[t=0~1] {TX, RX, CRC_error} = {%d, %d, %d}\n", - atd_t->ofdm_t_cnt, atd_t->ofdm_r_cnt, atd_t->ofdm_crc_error_cnt); - pr_debug("OFDM[t=1~2] {TX, RX, CRC_error} = {%d, %d, %d}\n", - curr_ofdm_t_cnt, curr_ofdm_r_cnt, curr_ofdm_crc_error_cnt); - pr_debug("OFDM_diff {TX, RX, CRC_error} = {%d, %d, %d}\n", - diff_ofdm_t_cnt, diff_ofdm_r_cnt, diff_ofdm_crc_error_cnt); + pr_debug("OFDM[t=0~1] {TX, RX, CRC_error} = {%d, %d, %d}\n", + atd_t->ofdm_t_cnt, atd_t->ofdm_r_cnt, + atd_t->ofdm_crc_error_cnt); + pr_debug("OFDM[t=1~2] {TX, RX, CRC_error} = {%d, %d, %d}\n", + curr_ofdm_t_cnt, curr_ofdm_r_cnt, + curr_ofdm_crc_error_cnt); + pr_debug("OFDM_diff {TX, RX, CRC_error} = {%d, %d, %d}\n", + diff_ofdm_t_cnt, diff_ofdm_r_cnt, + diff_ofdm_crc_error_cnt); - pr_debug("CCK[t=0~1] {TX, RX, CRC_error} = {%d, %d, %d}\n", - atd_t->cck_t_cnt, atd_t->cck_r_cnt, atd_t->cck_crc_error_cnt); - pr_debug("CCK[t=1~2] {TX, RX, CRC_error} = {%d, %d, %d}\n", - curr_cck_t_cnt, curr_cck_r_cnt, curr_cck_crc_error_cnt); - pr_debug("CCK_diff {TX, RX, CRC_error} = {%d, %d, %d}\n", - diff_cck_t_cnt, diff_cck_r_cnt, diff_cck_crc_error_cnt); + pr_debug("CCK[t=0~1] {TX, RX, CRC_error} = {%d, %d, %d}\n", + atd_t->cck_t_cnt, atd_t->cck_r_cnt, + atd_t->cck_crc_error_cnt); + pr_debug("CCK[t=1~2] {TX, RX, CRC_error} = {%d, %d, %d}\n", + curr_cck_t_cnt, curr_cck_r_cnt, + curr_cck_crc_error_cnt); + pr_debug("CCK_diff {TX, RX, CRC_error} = {%d, %d, %d}\n", + diff_cck_t_cnt, diff_cck_r_cnt, + diff_cck_crc_error_cnt); /* ----- Check Dbg Port --------------------------------*/ for (i = 0; i < DBGPORT_CHK_NUM; i++) { - pr_debug("Dbg_port=((0x%x))\n", atd_t->dbg_port_table[i]); - pr_debug("Val{pre, curr}={0x%x, 0x%x}\n", atd_t->dbg_port_val[i], curr_dbg_port_val[i]); + pr_debug("Dbg_port=((0x%x))\n", + atd_t->dbg_port_table[i]); + pr_debug("Val{pre, curr}={0x%x, 0x%x}\n", + atd_t->dbg_port_val[i], curr_dbg_port_val[i]); - if ((atd_t->dbg_port_table[i]) == 0) { - if (atd_t->dbg_port_val[i] == curr_dbg_port_val[i]) { - + if (atd_t->dbg_port_table[i] == 0) { + if (atd_t->dbg_port_val[i] == + curr_dbg_port_val[i]) { pr_debug("BB state hang\n"); pr_debug("ReasonCode:\n"); } } else if (atd_t->dbg_port_table[i] == 0x803) { - if (atd_t->dbg_port_val[i] == curr_dbg_port_val[i]) { - //dbgport_803 = (struct n_dbgport_803 )(atd_t->dbg_port_val[i]); - + if (atd_t->dbg_port_val[i] == + curr_dbg_port_val[i]) { + /* dbgport_803 = */ + /* (struct n_dbgport_803 ) */ + /* (atd_t->dbg_port_val[i]); */ odm_move_memory(dm, &dbgport_803, - &atd_t->dbg_port_val[i], + &atd_t->dbg_port_val[i], sizeof(struct n_dbgport_803)); - - pr_debug("RSTB{BB, GLB, OFDM}={%d, %d, %d}\n", dbgport_803.bb_rst_b, dbgport_803.glb_rst_b, dbgport_803.ofdm_rst_b); - pr_debug("{ofdm_tx_en, cck_tx_en, phy_tx_on}={%d, %d, %d}\n", dbgport_803.ofdm_tx_en, dbgport_803.cck_tx_en, dbgport_803.phy_tx_on); - pr_debug("CCA_PP{OFDM, CCK}={%d, %d}\n", dbgport_803.ofdm_cca_pp, dbgport_803.cck_cca_pp); + pr_debug("RSTB{BB, GLB, OFDM}={%d, %d,%d}\n", + dbgport_803.bb_rst_b, + dbgport_803.glb_rst_b, + dbgport_803.ofdm_rst_b); + pr_debug("{ofdm_tx_en, cck_tx_en, phy_tx_on}={%d, %d, %d}\n", + dbgport_803.ofdm_tx_en, + dbgport_803.cck_tx_en, + dbgport_803.phy_tx_on); + pr_debug("CCA_PP{OFDM, CCK}={%d, %d}\n", + dbgport_803.ofdm_cca_pp, + dbgport_803.cck_cca_pp); if (dbgport_803.phy_tx_on) pr_debug("Maybe TX Hang\n"); - else if (dbgport_803.ofdm_cca_pp || dbgport_803.cck_cca_pp) - pr_debug("Maybe RX Hang\n"); + else if (dbgport_803.ofdm_cca_pp || + dbgport_803.cck_cca_pp) + pr_debug("Maybe RX Hang\n"); } } else if (atd_t->dbg_port_table[i] == 0x208) { - if ((atd_t->dbg_port_val[i] & BIT(30)) && (curr_dbg_port_val[i] & BIT(30))) { - + if ((atd_t->dbg_port_val[i] & BIT(30)) && + (curr_dbg_port_val[i] & BIT(30))) { pr_debug("EDCCA Pause TX\n"); pr_debug("ReasonCode: THN-2\n"); } } else if (atd_t->dbg_port_table[i] == 0xab0) { - if (((atd_t->dbg_port_val[i] & 0xffffff) == 0) || - ((curr_dbg_port_val[i] & 0xffffff) == 0)) { - + /* atd_t->dbg_port_val[i] & 0xffffff == 0 */ + /* curr_dbg_port_val[i] & 0xffffff == 0 */ + if (((atd_t->dbg_port_val[i] & + MASK24BITS) == 0) || + ((curr_dbg_port_val[i] & + MASK24BITS) == 0)) { pr_debug("Wrong L-SIG formate\n"); pr_debug("ReasonCode: THN-1\n"); } } } - + phydm_check_hang_reset(dm); } atd_t->dbg_step++; - } -void -phydm_bb_auto_check_hang_start_n( - void *dm_void, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_bb_auto_check_hang_start_n( + void *dm_void, + u32 *_used, + char *output, + u32 *_out_len) { - u32 value32 = 0; - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_auto_dbg_struc *atd_t = &dm->auto_dbg_table; - u32 used = *_used; - u32 out_len = *_out_len; - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) - return; - - PDM_SNPF(out_len, used, output + used, out_len - used, - "PHYDM auto check hang (N-series) is started, Please check the system log\n"); - - dm->debug_components |= ODM_COMP_API; - atd_t->auto_dbg_type = AUTO_DBG_CHECK_HANG; - atd_t->dbg_step = 0; - - - phydm_pause_dm_watchdog(dm, PHYDM_PAUSE); - - - - *_used = used; - *_out_len = out_len; -} - -void -phydm_bb_rx_hang_info_n( - void *dm_void, - u32 *_used, - char *output, - u32 *_out_len -) -{ - u32 value32 = 0; - struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 value32 = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table; u32 used = *_used; u32 out_len = *_out_len; @@ -330,50 +318,67 @@ phydm_bb_rx_hang_info_n( return; PDM_SNPF(out_len, used, output + used, out_len - used, - "not support now\n"); + "PHYDM auto check hang (N-series) is started, Please check the system log\n"); + + dm->debug_components |= ODM_COMP_API; + atd_t->auto_dbg_type = AUTO_DBG_CHECK_HANG; + atd_t->dbg_step = 0; + + phydm_pause_dm_watchdog(dm, PHYDM_PAUSE); *_used = used; *_out_len = out_len; } -#endif +void phydm_dbg_port_dump_n(void *dm_void, u32 *_used, char *output, + u32 *_out_len) +{ + u32 value32 = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + + if (dm->support_ic_type & ODM_IC_11AC_SERIES) + return; + + PDM_SNPF(out_len, used, output + used, out_len - used, + "not support now\n"); + + *_used = used; + *_out_len = out_len; +} + +#endif #if (ODM_IC_11AC_SERIES_SUPPORT == 1) -void -phydm_bb_rx_hang_info_ac( - void *dm_void, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_dbg_port_dump_ac(void *dm_void, u32 *_used, char *output, + u32 *_out_len) { - u32 value32 = 0; - struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 value32 = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; u32 used = *_used; u32 out_len = *_out_len; if (dm->support_ic_type & ODM_IC_11N_SERIES) return; - value32 = odm_get_bb_reg(dm, 0xF80, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0xf80, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "rptreg of sc/bw/ht/...", - value32); + "\r\n %-35s = 0x%x", "rptreg of sc/bw/ht/...", value32); if (dm->support_ic_type & ODM_RTL8822B) - odm_set_bb_reg(dm, 0x198c, BIT(2) | BIT(1) | BIT(0), 7); + odm_set_bb_reg(dm, R_0x198c, BIT(2) | BIT(1) | BIT(0), 7); /* dbg_port = basic state machine */ { odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x000); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "basic state machine", - value32); + "\r\n %-35s = 0x%x", "basic state machine", value32); } /* dbg_port = state machine */ @@ -381,11 +386,11 @@ phydm_bb_rx_hang_info_ac( odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x007); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "state machine", value32); + "\r\n %-35s = 0x%x", "state machine", value32); } /* dbg_port = CCA-related*/ @@ -393,24 +398,23 @@ phydm_bb_rx_hang_info_ac( odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x204); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "CCA-related", value32); + "\r\n %-35s = 0x%x", "CCA-related", value32); } - /* dbg_port = edcca/rxd*/ { odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x278); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "edcca/rxd", value32); + "\r\n %-35s = 0x%x", "edcca/rxd", value32); } /* dbg_port = rx_state/mux_state/ADC_MASK_OFDM*/ @@ -418,12 +422,12 @@ phydm_bb_rx_hang_info_ac( odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x290); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", - "rx_state/mux_state/ADC_MASK_OFDM", value32); + "\r\n %-35s = 0x%x", + "rx_state/mux_state/ADC_MASK_OFDM", value32); } /* dbg_port = bf-related*/ @@ -431,11 +435,11 @@ phydm_bb_rx_hang_info_ac( odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x2B2); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "bf-related", value32); + "\r\n %-35s = 0x%x", "bf-related", value32); } /* dbg_port = bf-related*/ @@ -443,11 +447,11 @@ phydm_bb_rx_hang_info_ac( odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x2B8); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "bf-related", value32); + "\r\n %-35s = 0x%x", "bf-related", value32); } /* dbg_port = txon/rxd*/ @@ -455,11 +459,11 @@ phydm_bb_rx_hang_info_ac( odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA03); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "txon/rxd", value32); + "\r\n %-35s = 0x%x", "txon/rxd", value32); } /* dbg_port = l_rate/l_length*/ @@ -467,12 +471,11 @@ phydm_bb_rx_hang_info_ac( odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA0B); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "l_rate/l_length", - value32); + "\r\n %-35s = 0x%x", "l_rate/l_length", value32); } /* dbg_port = rxd/rxd_hit*/ @@ -480,11 +483,11 @@ phydm_bb_rx_hang_info_ac( odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA0D); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "rxd/rxd_hit", value32); + "\r\n %-35s = 0x%x", "rxd/rxd_hit", value32); } /* dbg_port = dis_cca*/ @@ -492,24 +495,23 @@ phydm_bb_rx_hang_info_ac( odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAA0); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "dis_cca", value32); + "\r\n %-35s = 0x%x", "dis_cca", value32); } - /* dbg_port = tx*/ { odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAB0); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "tx", value32); + "\r\n %-35s = 0x%x", "tx", value32); } /* dbg_port = rx plcp*/ @@ -517,130 +519,179 @@ phydm_bb_rx_hang_info_ac( odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD0); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "rx plcp", value32); + "\r\n %-35s = 0x%x", "rx plcp", value32); odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD1); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "rx plcp", value32); + "\r\n %-35s = 0x%x", "rx plcp", value32); odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD2); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "rx plcp", value32); + "\r\n %-35s = 0x%x", "rx plcp", value32); odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD3); value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "0x8fc", value32); + "\r\n %-35s = 0x%x", "0x8fc", value32); value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = 0x%x", "rx plcp", value32); + "\r\n %-35s = 0x%x", "rx plcp", value32); } *_used = used; *_out_len = out_len; } #endif -void -phydm_auto_dbg_console( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT +void phydm_dbg_port_dump_jgr3(void *dm_void, u32 *_used, char *output, + u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - char help[] = "-h"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + /*u32 dbg_port_idx_all[3] = {0x000, 0x001, 0x002};*/ + u32 val = 0; + u32 dbg_port_idx = 0; + u32 i = 0; + if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) + return; + + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "%-17s = %s\n", "DbgPort index", "Value"); + +#if 0 + /*0x000/0x001/0x002*/ + for (i = 0; i < 3; i++) { + dbg_port_idx = dbg_port_idx_all[i]; + if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbg_port_idx)) { + val = phydm_get_bb_dbg_port_val(dm); + PDM_SNPF(out_len, used, output + used, out_len - used, + "0x%-15x = 0x%x\n", dbg_port_idx, val); + phydm_release_bb_dbg_port(dm); + } + } +#endif + for (dbg_port_idx = 0x0; dbg_port_idx <= 0xfff; dbg_port_idx++) { + if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbg_port_idx)) { + val = phydm_get_bb_dbg_port_val(dm); + PDM_VAST_SNPF(out_len, used, output + used, + out_len - used, + "0x%-15x = 0x%x\n", dbg_port_idx, val); + phydm_release_bb_dbg_port(dm); + } + } + *_used = used; + *_out_len = out_len; +} +#endif + +void phydm_dbg_port_dump(void *dm_void, u32 *_used, char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "------ BB debug port start ------\n"); + + switch (dm->ic_ip_series) { + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + case PHYDM_IC_JGR3: + phydm_dbg_port_dump_jgr3(dm, &used, output, &out_len); + break; + #endif + + #if (ODM_IC_11AC_SERIES_SUPPORT == 1) + case PHYDM_IC_AC: + phydm_dbg_port_dump_ac(dm, &used, output, &out_len); + break; + #endif + + #if (ODM_IC_11N_SERIES_SUPPORT == 1) + case PHYDM_IC_N: + phydm_dbg_port_dump_n(dm, &used, output, &out_len); + break; + #endif + + default: + break; + } + *_used = used; + *_out_len = out_len; +} + +void phydm_auto_dbg_console( + void *dm_void, + char input[][16], + u32 *_used, + char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); if ((strcmp(input[1], help) == 0)) { PDM_SNPF(out_len, used, output + used, out_len - used, - "Show dbg port: {1} {1}\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "Auto check hang: {1} {2}\n"); + "hang: {1} {1:Show DbgPort, 2:Auto check hang}\n"); return; } else if (var1[0] == 1) { PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]); - if (var1[1] == 1) { - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - #if (ODM_IC_11AC_SERIES_SUPPORT == 1) - phydm_bb_rx_hang_info_ac(dm, &used, output, &out_len); - #else - PDM_SNPF(out_len, used, output + used, - out_len - used, - "Not support\n"); - #endif - } else { - #if (ODM_IC_11N_SERIES_SUPPORT == 1) - phydm_bb_rx_hang_info_n(dm, &used, output, &out_len); - #else - PDM_SNPF(out_len, used, output + used, - out_len - used, - "Not support\n"); - #endif - } + phydm_dbg_port_dump(dm, &used, output, &out_len); } else if (var1[1] == 2) { - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { PDM_SNPF(out_len, used, output + used, - out_len - used, - "Not support\n"); + out_len - used, "Not support\n"); } else { #if (ODM_IC_11N_SERIES_SUPPORT == 1) - phydm_bb_auto_check_hang_start_n(dm, &used, output, &out_len); + phydm_bb_auto_check_hang_start_n(dm, &used, + output, + &out_len); #else PDM_SNPF(out_len, used, output + used, - out_len - used, - "Not support\n"); + out_len - used, "Not support\n"); #endif } } - } + } *_used = used; *_out_len = out_len; } - -#endif - -void -phydm_auto_dbg_engine( - void *dm_void -) +void phydm_auto_dbg_engine(void *dm_void) { -#ifdef PHYDM_AUTO_DEGBUG - u32 value32 = 0; - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_auto_dbg_struc *atd_t = &dm->auto_dbg_table; + u32 value32 = 0; + + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table; if (atd_t->auto_dbg_type == AUTO_DBG_STOP) return; pr_debug("%s ======>\n", __func__); - + if (atd_t->auto_dbg_type == AUTO_DBG_CHECK_HANG) { if (dm->support_ic_type & ODM_IC_11AC_SERIES) { pr_debug("Not Support\n"); @@ -653,30 +704,22 @@ phydm_auto_dbg_engine( } } else if (atd_t->auto_dbg_type == AUTO_DBG_CHECK_RA) { - pr_debug("Not Support\n"); - } -#endif } -void -phydm_auto_dbg_engine_init( - void *dm_void -) +void phydm_auto_dbg_engine_init(void *dm_void) { -#ifdef PHYDM_AUTO_DEGBUG - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_auto_dbg_struc *atd_t = &dm->auto_dbg_table; - u16 dbg_port_table[DBGPORT_CHK_NUM] = {0x0, 0x803, 0x208, 0xab0, 0xab1, 0xab2}; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table; + u16 dbg_port_table[DBGPORT_CHK_NUM] = {0x0, 0x803, 0x208, 0xab0, + 0xab1, 0xab2}; PHYDM_DBG(dm, ODM_COMP_API, "%s ======>n", __func__); odm_move_memory(dm, &atd_t->dbg_port_table[0], - &dbg_port_table[0], (DBGPORT_CHK_NUM * 2)); + &dbg_port_table[0], (DBGPORT_CHK_NUM * 2)); - phydm_check_hang_reset(dm); -#endif + phydm_check_hang_init(dm); } - - +#endif diff --git a/hal/phydm/phydm_auto_dbg.h b/hal/phydm/phydm_auto_dbg.h index d6ea5b3..78bde62 100644 --- a/hal/phydm/phydm_auto_dbg.h +++ b/hal/phydm/phydm_auto_dbg.h @@ -23,102 +23,93 @@ * *****************************************************************************/ +#ifndef __PHYDM_AUTO_DBG_H__ +#define __PHYDM_AUTO_DBG_H__ -#ifndef __PHYDM_AUTO_DBG_H__ -#define __PHYDM_AUTO_DBG_H__ +#define AUTO_DBG_VERSION "1.0" /* @2017.05.015 Dino, Add phydm_auto_dbg.h*/ -#define AUTO_DBG_VERSION "1.0" /* 2017.05.015 Dino, Add phydm_auto_dbg.h*/ - - -/* 1 ============================================================ +/* @1 ============================================================ * 1 Definition - * 1 ============================================================ */ + * 1 ============================================================ + */ -#define AUTO_CHK_HANG_STEP_MAX 3 -#define DBGPORT_CHK_NUM 6 +#define AUTO_CHK_HANG_STEP_MAX 3 +#define DBGPORT_CHK_NUM 6 #ifdef PHYDM_AUTO_DEGBUG - -/* 1 ============================================================ +/* @1 ============================================================ * 1 enumeration - * 1 ============================================================ */ + * 1 ============================================================ + */ -enum auto_dbg_type_e{ - AUTO_DBG_STOP = 0, - AUTO_DBG_CHECK_HANG = 1, +enum auto_dbg_type_e { + AUTO_DBG_STOP = 0, + AUTO_DBG_CHECK_HANG = 1, AUTO_DBG_CHECK_RA = 2, - AUTO_DBG_CHECK_DIG = 3 + AUTO_DBG_CHECK_DIG = 3 }; -/* 1 ============================================================ +/* @1 ============================================================ * 1 structure - * 1 ============================================================ */ + * 1 ============================================================ + */ struct n_dbgport_803 { - /*BYTE 3*/ - u8 bb_rst_b: 1; - u8 glb_rst_b: 1; - u8 zero_1bit_1:1; - u8 ofdm_rst_b: 1; - u8 cck_txpe: 1; - u8 ofdm_txpe: 1; - u8 phy_tx_on: 1; - u8 tdrdy: 1; - /*BYTE 2*/ - u8 txd:8; - /*BYTE 1*/ - u8 cck_cca_pp: 1; - u8 ofdm_cca_pp: 1; - u8 rx_rst: 1; - u8 rdrdy: 1; - u8 rxd_7_4: 4; - /*BYTE 0*/ - u8 rxd_3_0: 4; - u8 ofdm_tx_en: 1; - u8 cck_tx_en: 1; - u8 zero_1bit_2:1; - u8 clk_80m: 1; + /*@BYTE 3*/ + u8 bb_rst_b : 1; + u8 glb_rst_b : 1; + u8 zero_1bit_1 : 1; + u8 ofdm_rst_b : 1; + u8 cck_txpe : 1; + u8 ofdm_txpe : 1; + u8 phy_tx_on : 1; + u8 tdrdy : 1; + /*@BYTE 2*/ + u8 txd : 8; + /*@BYTE 1*/ + u8 cck_cca_pp : 1; + u8 ofdm_cca_pp : 1; + u8 rx_rst : 1; + u8 rdrdy : 1; + u8 rxd_7_4 : 4; + /*@BYTE 0*/ + u8 rxd_3_0 : 4; + u8 ofdm_tx_en : 1; + u8 cck_tx_en : 1; + u8 zero_1bit_2 : 1; + u8 clk_80m : 1; }; -struct phydm_auto_dbg_struc { - enum auto_dbg_type_e auto_dbg_type; - u8 dbg_step; - u16 dbg_port_table[DBGPORT_CHK_NUM]; - u32 dbg_port_val[DBGPORT_CHK_NUM]; - u16 ofdm_t_cnt; - u16 ofdm_r_cnt; - u16 cck_t_cnt; - u16 cck_r_cnt; - u16 ofdm_crc_error_cnt; - u16 cck_crc_error_cnt; - +struct phydm_auto_dbg_struct { + enum auto_dbg_type_e auto_dbg_type; + u8 dbg_step; + u16 dbg_port_table[DBGPORT_CHK_NUM]; + u32 dbg_port_val[DBGPORT_CHK_NUM]; + u16 ofdm_t_cnt; + u16 ofdm_r_cnt; + u16 cck_t_cnt; + u16 cck_r_cnt; + u16 ofdm_crc_error_cnt; + u16 cck_crc_error_cnt; }; - -/* 1 ============================================================ +/* @1 ============================================================ * 1 function prototype - * 1 ============================================================ */ + * 1 ============================================================ + */ +void phydm_dbg_port_dump(void *dm_void, u32 *used, char *output, u32 *out_len); -void -phydm_auto_dbg_console( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); +void phydm_auto_dbg_console( + void *dm_void, + char input[][16], + u32 *_used, + char *output, + u32 *_out_len); + +void phydm_auto_dbg_engine(void *dm_void); + +void phydm_auto_dbg_engine_init(void *dm_void); +#endif #endif - -void -phydm_auto_dbg_engine( - void *dm_void -); - -void -phydm_auto_dbg_engine_init( - void *dm_void -); -#endif \ No newline at end of file diff --git a/hal/phydm/phydm_beamforming.c b/hal/phydm/phydm_beamforming.c index 4b84d1b..bc4855c 100644 --- a/hal/phydm/phydm_beamforming.c +++ b/hal/phydm/phydm_beamforming.c @@ -32,95 +32,97 @@ #endif #endif -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT -void -phydm_get_txbf_device_num( - void *dm_void, - u8 macid -) +void phydm_get_txbf_device_num( + void *dm_void, + u8 macid) { -#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) /*For BDC*/ +#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) /*@For BDC*/ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; - struct bf_cmn_info *bf = NULL; - struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; - u8 act_as_bfer = 0; - u8 act_as_bfee = 0; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; + struct bf_cmn_info *bf = NULL; + struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; + u8 act_as_bfer = 0; + u8 act_as_bfee = 0; + if (is_sta_active(sta)) { bf = &(sta->bf_info); } else { - PHYDM_DBG(dm, DBG_TXBF, "[Warning] %s invalid sta_info\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "[Warning] %s invalid sta_info\n", + __func__); return; } - if (sta->support_wireless_set & WIRELESS_VHT) { + if (sta->support_wireless_set & WIRELESS_VHT) { if (bf->vht_beamform_cap & BEAMFORMING_VHT_BEAMFORMEE_ENABLE) act_as_bfer = 1; if (bf->vht_beamform_cap & BEAMFORMING_VHT_BEAMFORMER_ENABLE) act_as_bfee = 1; - + } else if (sta->support_wireless_set & WIRELESS_HT) { if (bf->ht_beamform_cap & BEAMFORMING_HT_BEAMFORMEE_ENABLE) act_as_bfer = 1; if (bf->ht_beamform_cap & BEAMFORMING_HT_BEAMFORMER_ENABLE) act_as_bfee = 1; - } - if (act_as_bfer)) { /* Our Device act as BFer */ - dm_bdc_table->w_bfee_client[macid] = true; - dm_bdc_table->num_txbfee_client++; - } else - dm_bdc_table->w_bfee_client[macid] = false; - - if (act_as_bfee)) { /* Our Device act as BFee */ - dm_bdc_table->w_bfer_client[macid] = true; - dm_bdc_table->num_txbfer_client++; - } else - dm_bdc_table->w_bfer_client[macid] = false; + if (act_as_bfer)) + { /* Our Device act as BFer */ + dm_bdc_table->w_bfee_client[macid] = true; + dm_bdc_table->num_txbfee_client++; + } + else + dm_bdc_table->w_bfee_client[macid] = false; + + if (act_as_bfee)) + { /* Our Device act as BFee */ + dm_bdc_table->w_bfer_client[macid] = true; + dm_bdc_table->num_txbfer_client++; + } + else + dm_bdc_table->w_bfer_client[macid] = false; #endif #endif } struct _RT_BEAMFORM_STAINFO * -phydm_sta_info_init( - struct dm_struct *dm, - u16 sta_idx -) +phydm_sta_info_init(struct dm_struct *dm, u16 sta_idx, u8 *my_mac_addr) { - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_BEAMFORM_STAINFO *entry = &beam_info->beamform_sta_info; - struct sta_info *sta = dm->odm_sta_info[sta_idx]; - struct cmn_sta_info *cmn_sta = dm->phydm_sta_info[sta_idx]; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_BEAMFORM_STAINFO *entry = &beam_info->beamform_sta_info; + struct cmn_sta_info *cmn_sta = dm->phydm_sta_info[sta_idx]; //void *adapter = dm->adapter; - PADAPTER adapter = (PADAPTER)dm->adapter; + ADAPTER * adapter = dm->adapter; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PMGNT_INFO p_MgntInfo = &((adapter)->MgntInfo); - PRT_HIGH_THROUGHPUT p_ht_info = GET_HT_INFO(p_MgntInfo); - PRT_VERY_HIGH_THROUGHPUT p_vht_info = GET_VHT_INFO(p_MgntInfo); + PMGNT_INFO p_MgntInfo = &((adapter)->MgntInfo); + PRT_HIGH_THROUGHPUT p_ht_info = GET_HT_INFO(p_MgntInfo); + PRT_VERY_HIGH_THROUGHPUT p_vht_info = GET_VHT_INFO(p_MgntInfo); #endif if (!is_sta_active(cmn_sta)) { - - PHYDM_DBG(dm, DBG_TXBF, "%s => sta_info(mac_id:%d) failed\n", __func__, sta_idx); + PHYDM_DBG(dm, DBG_TXBF, "%s => sta_info(mac_id:%d) failed\n", + __func__, sta_idx); #if (DM_ODM_SUPPORT_TYPE == ODM_CE) rtw_warn_on(1); #endif - + return entry; } -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - odm_move_memory(dm, (PVOID)(entry->my_mac_addr), (PVOID)(adapter->CurrentAddress), 6); +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + /*odm_move_memory(dm, (PVOID)(entry->my_mac_addr),*/ + /*(PVOID)(adapter->CurrentAddress), 6);*/ + odm_move_memory(dm, entry->my_mac_addr, my_mac_addr, 6); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - odm_move_memory(dm, entry->my_mac_addr, adapter_mac_addr(sta->padapter), 6); + /*odm_move_memory(dm, entry->my_mac_addr,*/ + /*adapter_mac_addr(sta->padapter), 6);*/ + odm_move_memory(dm, entry->my_mac_addr, my_mac_addr, 6); #endif entry->aid = cmn_sta->aid; @@ -129,37 +131,37 @@ phydm_sta_info_init( entry->bw = cmn_sta->bw_mode; entry->cur_beamform = cmn_sta->bf_info.ht_beamform_cap; entry->ht_beamform_cap = cmn_sta->bf_info.ht_beamform_cap; - -#if ODM_IC_11AC_SERIES_SUPPORT + +#if ODM_IC_11AC_SERIES_SUPPORT if (cmn_sta->support_wireless_set & WIRELESS_VHT) { entry->cur_beamform_vht = cmn_sta->bf_info.vht_beamform_cap; entry->vht_beamform_cap = cmn_sta->bf_info.vht_beamform_cap; } #endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) /*To Be Removed */ + entry->ht_beamform_cap = p_ht_info->HtBeamformCap; /*To Be Removed*/ + entry->vht_beamform_cap = p_vht_info->VhtBeamformCap; /*To Be Removed*/ -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) /*To Be Removed */ - entry->ht_beamform_cap = p_ht_info->HtBeamformCap; /*To Be Removed*/ - entry->vht_beamform_cap = p_vht_info->VhtBeamformCap; /*To Be Removed*/ - - if (sta_idx == 0) { /*client mode*/ - #if ODM_IC_11AC_SERIES_SUPPORT + if (sta_idx == 0) { /*@client mode*/ + #if ODM_IC_11AC_SERIES_SUPPORT if (cmn_sta->support_wireless_set & WIRELESS_VHT) entry->cur_beamform_vht = p_vht_info->VhtCurBeamform; #endif } #endif - PHYDM_DBG(dm, DBG_TXBF, "wireless_set = 0x%x, staidx = %d\n", cmn_sta->support_wireless_set, sta_idx); - PHYDM_DBG(dm, DBG_TXBF, "entry->cur_beamform = 0x%x, entry->cur_beamform_vht = 0x%x\n", entry->cur_beamform, entry->cur_beamform_vht); + PHYDM_DBG(dm, DBG_TXBF, "wireless_set = 0x%x, staidx = %d\n", + cmn_sta->support_wireless_set, sta_idx); + PHYDM_DBG(dm, DBG_TXBF, + "entry->cur_beamform = 0x%x, entry->cur_beamform_vht = 0x%x\n", + entry->cur_beamform, entry->cur_beamform_vht); return entry; - } void phydm_sta_info_update( - struct dm_struct *dm, - u16 sta_idx, - struct _RT_BEAMFORMEE_ENTRY *beamform_entry -) + struct dm_struct *dm, + u16 sta_idx, + struct _RT_BEAMFORMEE_ENTRY *beamform_entry) { struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; @@ -172,13 +174,12 @@ void phydm_sta_info_update( struct _RT_BEAMFORMEE_ENTRY * phydm_beamforming_get_bfee_entry_by_addr( - void *dm_void, - u8 *RA, - u8 *idx -) + void *dm_void, + u8 *RA, + u8 *idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i = 0; struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { @@ -193,14 +194,13 @@ phydm_beamforming_get_bfee_entry_by_addr( struct _RT_BEAMFORMER_ENTRY * phydm_beamforming_get_bfer_entry_by_addr( - void *dm_void, - u8 *TA, - u8 *idx -) + void *dm_void, + u8 *TA, + u8 *idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i = 0; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i = 0; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) { if (beam_info->beamformer_entry[i].is_used && (eq_mac_addr(TA, beam_info->beamformer_entry[i].mac_addr))) { @@ -212,20 +212,18 @@ phydm_beamforming_get_bfer_entry_by_addr( return NULL; } - struct _RT_BEAMFORMEE_ENTRY * phydm_beamforming_get_entry_by_mac_id( - void *dm_void, - u8 mac_id, - u8 *idx -) + void *dm_void, + u8 mac_id, + u8 *idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i = 0; struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { - if (beam_info->beamformee_entry[i].is_used && (mac_id == beam_info->beamformee_entry[i].mac_id)) { + if (beam_info->beamformee_entry[i].is_used && mac_id == beam_info->beamformee_entry[i].mac_id) { *idx = i; return &beam_info->beamformee_entry[i]; } @@ -234,21 +232,19 @@ phydm_beamforming_get_entry_by_mac_id( return NULL; } - enum beamforming_cap phydm_beamforming_get_entry_beam_cap_by_mac_id( - void *dm_void, - u8 mac_id -) + void *dm_void, + u8 mac_id) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i = 0; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - enum beamforming_cap beamform_entry_cap = BEAMFORMING_CAP_NONE; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i = 0; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + enum beamforming_cap beamform_entry_cap = BEAMFORMING_CAP_NONE; for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { - if (beam_info->beamformee_entry[i].is_used && (mac_id == beam_info->beamformee_entry[i].mac_id)) { - beamform_entry_cap = beam_info->beamformee_entry[i].beamform_entry_cap; + if (beam_info->beamformee_entry[i].is_used && mac_id == beam_info->beamformee_entry[i].mac_id) { + beamform_entry_cap = beam_info->beamformee_entry[i].beamform_entry_cap; i = BEAMFORMEE_ENTRY_NUM; } } @@ -256,15 +252,13 @@ phydm_beamforming_get_entry_beam_cap_by_mac_id( return beamform_entry_cap; } - struct _RT_BEAMFORMEE_ENTRY * phydm_beamforming_get_free_bfee_entry( - void *dm_void, - u8 *idx -) + void *dm_void, + u8 *idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i = 0; struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { @@ -278,12 +272,11 @@ phydm_beamforming_get_free_bfee_entry( struct _RT_BEAMFORMER_ENTRY * phydm_beamforming_get_free_bfer_entry( - void *dm_void, - u8 *idx -) + void *dm_void, + u8 *idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i = 0; struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; PHYDM_DBG(dm, DBG_TXBF, "%s ===>\n", __func__); @@ -297,7 +290,7 @@ phydm_beamforming_get_free_bfer_entry( return NULL; } -/* +/*@ * Description: Get the first entry index of MU Beamformee. * * Return value: index of the first MU sta. @@ -305,19 +298,18 @@ phydm_beamforming_get_free_bfer_entry( * 2015.05.25. Created by tynli. * */ -u8 -phydm_beamforming_get_first_mu_bfee_entry_idx( - void *dm_void -) +u8 phydm_beamforming_get_first_mu_bfee_entry_idx( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 idx = 0xFF; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - boolean is_found = false; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 idx = 0xFF; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + boolean is_found = false; for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { if (beam_info->beamformee_entry[idx].is_used && beam_info->beamformee_entry[idx].is_mu_sta) { - PHYDM_DBG(dm, DBG_TXBF, "[%s] idx=%d!\n", __func__, idx); + PHYDM_DBG(dm, DBG_TXBF, "[%s] idx=%d!\n", __func__, + idx); is_found = true; break; } @@ -329,20 +321,18 @@ phydm_beamforming_get_first_mu_bfee_entry_idx( return idx; } - -/*Add SU BFee and MU BFee*/ +/*@Add SU BFee and MU BFee*/ struct _RT_BEAMFORMEE_ENTRY * beamforming_add_bfee_entry( - void *dm_void, - struct _RT_BEAMFORM_STAINFO *sta, - enum beamforming_cap beamform_cap, - u8 num_of_sounding_dim, - u8 comp_steering_num_of_bfer, - u8 *idx -) + void *dm_void, + struct _RT_BEAMFORM_STAINFO *sta, + enum beamforming_cap beamform_cap, + u8 num_of_sounding_dim, + u8 comp_steering_num_of_bfer, + u8 *idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMEE_ENTRY *entry = phydm_beamforming_get_free_bfee_entry(dm, idx); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMEE_ENTRY *entry = phydm_beamforming_get_free_bfee_entry(dm, idx); PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); @@ -354,24 +344,29 @@ beamforming_add_bfee_entry( odm_move_memory(dm, entry->my_mac_addr, sta->my_mac_addr, 6); if (phydm_acting_determine(dm, phydm_acting_as_ap)) { - /*BSSID[44:47] xor BSSID[40:43]*/ + /*@BSSID[44:47] xor BSSID[40:43]*/ u16 bssid = ((sta->my_mac_addr[5] & 0xf0) >> 4) ^ (sta->my_mac_addr[5] & 0xf); - /*(dec(A) + dec(B)*32) mod 512*/ + /*@(dec(A) + dec(B)*32) mod 512*/ entry->p_aid = (sta->aid + bssid * 32) & 0x1ff; entry->g_id = 63; - PHYDM_DBG(dm, DBG_TXBF, "%s: BFee P_AID addressed to STA=%d\n", __func__, entry->p_aid); + PHYDM_DBG(dm, DBG_TXBF, + "%s: BFee P_AID addressed to STA=%d\n", + __func__, entry->p_aid); } else if (phydm_acting_determine(dm, phydm_acting_as_ibss)) { - /*ad hoc mode*/ + /*@ad hoc mode*/ entry->p_aid = 0; entry->g_id = 63; - PHYDM_DBG(dm, DBG_TXBF, "%s: BFee P_AID as IBSS=%d\n", __func__, entry->p_aid); + PHYDM_DBG(dm, DBG_TXBF, "%s: BFee P_AID as IBSS=%d\n", + __func__, entry->p_aid); } else { - /*client mode*/ - entry->p_aid = sta->ra[5]; - /*BSSID[39:47]*/ + /*@client mode*/ + entry->p_aid = sta->ra[5]; + /*@BSSID[39:47]*/ entry->p_aid = (entry->p_aid << 1) | (sta->ra[4] >> 7); entry->g_id = 0; - PHYDM_DBG(dm, DBG_TXBF, "%s: BFee P_AID addressed to AP=0x%X\n", __func__, entry->p_aid); + PHYDM_DBG(dm, DBG_TXBF, + "%s: BFee P_AID addressed to AP=0x%X\n", + __func__, entry->p_aid); } cp_mac_addr(entry->mac_addr, sta->ra); entry->is_txbf = false; @@ -380,9 +375,9 @@ beamforming_add_bfee_entry( entry->beamform_entry_cap = beamform_cap; entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; - /* entry->log_seq = 0xff; Move to beamforming_add_bfer_entry*/ - /* entry->log_retry_cnt = 0; Move to beamforming_add_bfer_entry*/ - /* entry->LogSuccessCnt = 0; Move to beamforming_add_bfer_entry*/ + /* @entry->log_seq = 0xff; Move to beamforming_add_bfer_entry*/ + /* @entry->log_retry_cnt = 0; Move to beamforming_add_bfer_entry*/ + /* @entry->LogSuccessCnt = 0; Move to beamforming_add_bfer_entry*/ entry->log_status_fail_cnt = 0; @@ -403,18 +398,17 @@ beamforming_add_bfee_entry( return NULL; } -/*Add SU BFee and MU BFer*/ +/*@Add SU BFee and MU BFer*/ struct _RT_BEAMFORMER_ENTRY * beamforming_add_bfer_entry( - void *dm_void, - struct _RT_BEAMFORM_STAINFO *sta, - enum beamforming_cap beamform_cap, - u8 num_of_sounding_dim, - u8 *idx -) + void *dm_void, + struct _RT_BEAMFORM_STAINFO *sta, + enum beamforming_cap beamform_cap, + u8 num_of_sounding_dim, + u8 *idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMER_ENTRY *entry = phydm_beamforming_get_free_bfer_entry(dm, idx); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMER_ENTRY *entry = phydm_beamforming_get_free_bfer_entry(dm, idx); PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); @@ -422,31 +416,33 @@ beamforming_add_bfer_entry( entry->is_used = true; odm_move_memory(dm, entry->my_mac_addr, sta->my_mac_addr, 6); if (phydm_acting_determine(dm, phydm_acting_as_ap)) { - /*BSSID[44:47] xor BSSID[40:43]*/ + /*@BSSID[44:47] xor BSSID[40:43]*/ u16 bssid = ((sta->my_mac_addr[5] & 0xf0) >> 4) ^ (sta->my_mac_addr[5] & 0xf); entry->p_aid = (sta->aid + bssid * 32) & 0x1ff; entry->g_id = 63; - /*(dec(A) + dec(B)*32) mod 512*/ + /*@(dec(A) + dec(B)*32) mod 512*/ } else if (phydm_acting_determine(dm, phydm_acting_as_ibss)) { entry->p_aid = 0; entry->g_id = 63; } else { - entry->p_aid = sta->ra[5]; - /*BSSID[39:47]*/ + entry->p_aid = sta->ra[5]; + /*@BSSID[39:47]*/ entry->p_aid = (entry->p_aid << 1) | (sta->ra[4] >> 7); entry->g_id = 0; - PHYDM_DBG(dm, DBG_TXBF, "%s: P_AID addressed to AP=0x%X\n", __func__, entry->p_aid); + PHYDM_DBG(dm, DBG_TXBF, + "%s: P_AID addressed to AP=0x%X\n", __func__, + entry->p_aid); } cp_mac_addr(entry->mac_addr, sta->ra); entry->beamform_entry_cap = beamform_cap; - entry->pre_log_seq = 0; /*Modified by Jeffery @2015-04-13*/ - entry->log_seq = 0; /*Modified by Jeffery @2014-10-29*/ - entry->log_retry_cnt = 0; /*Modified by Jeffery @2014-10-29*/ - entry->log_success = 0; /*log_success is NOT needed to be accumulated, so LogSuccessCnt->log_success, 2015-04-13, Jeffery*/ - entry->clock_reset_times = 0; /*Modified by Jeffery @2015-04-13*/ + entry->pre_log_seq = 0; /*@Modified by Jeffery @2015-04-13*/ + entry->log_seq = 0; /*@Modified by Jeffery @2014-10-29*/ + entry->log_retry_cnt = 0; /*@Modified by Jeffery @2014-10-29*/ + entry->log_success = 0; /*@log_success is NOT needed to be accumulated, so LogSuccessCnt->log_success, 2015-04-13, Jeffery*/ + entry->clock_reset_times = 0; /*@Modified by Jeffery @2015-04-13*/ entry->num_of_sounding_dim = num_of_sounding_dim; @@ -486,7 +482,7 @@ beamforming_remove_entry( if (entry != NULL) { entry->is_used = false; entry->beamform_entry_cap = BEAMFORMING_CAP_NONE; - /*entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;*/ + /*@entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;*/ entry->is_beamforming_in_progress = false; ret = true; } @@ -496,25 +492,22 @@ beamforming_remove_entry( ret = true; } return ret; - } #endif /* Used for beamforming_start_v1 */ -void -phydm_beamforming_ndpa_rate( - void *dm_void, - enum channel_width BW, - u8 rate -) +void phydm_beamforming_ndpa_rate( + void *dm_void, + enum channel_width BW, + u8 rate) { - u16 ndpa_rate = rate; - struct dm_struct *dm = (struct dm_struct *)dm_void; + u16 ndpa_rate = rate; + struct dm_struct *dm = (struct dm_struct *)dm_void; PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); if (ndpa_rate == 0) { - if (dm->rssi_min > 30) /* link RSSI > 30% */ + if (dm->rssi_min > 30) /* @link RSSI > 30% */ ndpa_rate = ODM_RATE24M; else ndpa_rate = ODM_RATE6M; @@ -525,79 +518,76 @@ phydm_beamforming_ndpa_rate( ndpa_rate = (ndpa_rate << 8) | BW; hal_com_txbf_set(dm, TXBF_SET_SOUNDING_RATE, (u8 *)&ndpa_rate); - } - /* Used for beamforming_start_sw and beamforming_start_fw */ -void -phydm_beamforming_dym_ndpa_rate( - void *dm_void -) +void phydm_beamforming_dym_ndpa_rate( + void *dm_void) { - u16 ndpa_rate = ODM_RATE6M, BW; - struct dm_struct *dm = (struct dm_struct *)dm_void; + u16 ndpa_rate = ODM_RATE6M, BW; + struct dm_struct *dm = (struct dm_struct *)dm_void; ndpa_rate = ODM_RATE6M; BW = CHANNEL_WIDTH_20; ndpa_rate = ndpa_rate << 8 | BW; hal_com_txbf_set(dm, TXBF_SET_SOUNDING_RATE, (u8 *)&ndpa_rate); - PHYDM_DBG(dm, DBG_TXBF, "%s End, NDPA rate = 0x%X\n", __func__, ndpa_rate); + PHYDM_DBG(dm, DBG_TXBF, "%s End, NDPA rate = 0x%X\n", __func__, + ndpa_rate); } -/* +/*@ * SW Sounding : SW Timer unit 1ms * HW Timer unit (1/32000) s 32k is clock. * FW Sounding : FW Timer unit 10ms */ -void -beamforming_dym_period( - void *dm_void, - u8 status -) +void beamforming_dym_period( + void *dm_void, + u8 status) { - u8 idx; - boolean is_change_period = false; - u16 sound_period_sw, sound_period_fw; - struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 idx; + boolean is_change_period = false; + u16 sound_period_sw, sound_period_fw; + struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMEE_ENTRY *beamform_entry; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; + struct _RT_BEAMFORMEE_ENTRY *beamform_entry; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; - struct _RT_BEAMFORMEE_ENTRY *entry = &beam_info->beamformee_entry[beam_info->beamformee_cur_idx]; + struct _RT_BEAMFORMEE_ENTRY *entry = &beam_info->beamformee_entry[beam_info->beamformee_cur_idx]; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); - /* 3 TODO per-client throughput caculation. */ + /* @3 TODO per-client throughput caculation. */ - if ((*dm->current_tx_tp + *dm->current_rx_tp > 2) && ((entry->log_status_fail_cnt <= 20) || status)) { - sound_period_sw = 40; /* 40ms */ - sound_period_fw = 40; /* From H2C cmd, unit = 10ms */ + if ((*dm->current_tx_tp + *dm->current_rx_tp > 2) && (entry->log_status_fail_cnt <= 20 || status)) { + sound_period_sw = 40; /* @40ms */ + sound_period_fw = 40; /* @From H2C cmd, unit = 10ms */ } else { - sound_period_sw = 4000;/* 4s */ + sound_period_sw = 4000; /* @4s */ sound_period_fw = 400; } - PHYDM_DBG(dm, DBG_TXBF, "[%s]sound_period_sw=%d, sound_period_fw=%d\n", __func__, sound_period_sw, sound_period_fw); + PHYDM_DBG(dm, DBG_TXBF, "[%s]sound_period_sw=%d, sound_period_fw=%d\n", + __func__, sound_period_sw, sound_period_fw); for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { beamform_entry = beam_info->beamformee_entry + idx; if (beamform_entry->default_csi_cnt > 20) { - /*Modified by David*/ + /*@Modified by David*/ sound_period_sw = 4000; sound_period_fw = 400; } - PHYDM_DBG(dm, DBG_TXBF, "[%s] period = %d\n", __func__, sound_period_sw); + PHYDM_DBG(dm, DBG_TXBF, "[%s] period = %d\n", __func__, + sound_period_sw); if ((beamform_entry->beamform_entry_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) == 0) continue; if (sound_info->sound_mode == SOUNDING_FW_VHT_TIMER || sound_info->sound_mode == SOUNDING_FW_HT_TIMER) { if (beamform_entry->sound_period != sound_period_fw) { beamform_entry->sound_period = sound_period_fw; - is_change_period = true; /*Only FW sounding need to send H2C packet to change sound period. */ + is_change_period = true; /*Only FW sounding need to send H2C packet to change sound period. */ } } else if (beamform_entry->sound_period != sound_period_sw) beamform_entry->sound_period = sound_period_sw; @@ -607,19 +597,15 @@ beamforming_dym_period( hal_com_txbf_set(dm, TXBF_SET_SOUNDING_FW_NDPA, (u8 *)&idx); } - - - boolean beamforming_send_ht_ndpa_packet( - void *dm_void, - u8 *RA, - enum channel_width BW, - u8 q_idx -) + void *dm_void, + u8 *RA, + enum channel_width BW, + u8 q_idx) { - boolean ret = true; - struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean ret = true; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (q_idx == BEACON_QUEUE) ret = send_fw_ht_ndpa_packet(dm, RA, BW); @@ -629,27 +615,25 @@ beamforming_send_ht_ndpa_packet( return ret; } - - boolean beamforming_send_vht_ndpa_packet( - void *dm_void, - u8 *RA, - u16 AID, - enum channel_width BW, - u8 q_idx -) + void *dm_void, + u8 *RA, + u16 AID, + enum channel_width BW, + u8 q_idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - boolean ret = true; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + boolean ret = true; hal_com_txbf_set(dm, TXBF_SET_GET_TX_RATE, NULL); - if ((beam_info->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7) && (beam_info->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9) && (!beam_info->snding3ss)) - PHYDM_DBG(dm, DBG_TXBF, "@%s: 3SS VHT 789 don't sounding\n", __func__); + if (beam_info->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7 && beam_info->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9 && !beam_info->snding3ss) + PHYDM_DBG(dm, DBG_TXBF, "@%s: 3SS VHT 789 don't sounding\n", + __func__); - else { + else { if (q_idx == BEACON_QUEUE) /* Send to reserved page => FW NDPA */ ret = send_fw_vht_ndpa_packet(dm, RA, AID, BW); else { @@ -670,65 +654,66 @@ beamforming_send_vht_ndpa_packet( return ret; } - enum beamforming_notify_state phydm_beamfomring_is_sounding( - void *dm_void, - struct _RT_BEAMFORMING_INFO *beam_info, - u8 *idx -) + void *dm_void, + struct _RT_BEAMFORMING_INFO *beam_info, + u8 *idx) { - enum beamforming_notify_state is_sounding = BEAMFORMING_NOTIFY_NONE; - struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; - struct dm_struct *dm = (struct dm_struct *)dm_void; + enum beamforming_notify_state is_sounding = BEAMFORMING_NOTIFY_NONE; + struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; u8 i; PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); - /*if(( Beamforming_GetBeamCap(beam_info) & BEAMFORMER_CAP) == 0)*/ - /*is_sounding = BEAMFORMING_NOTIFY_RESET;*/ + /*@if(( Beamforming_GetBeamCap(beam_info) & BEAMFORMER_CAP) == 0)*/ + /*@is_sounding = BEAMFORMING_NOTIFY_RESET;*/ if (beam_oid_info.sound_oid_mode == sounding_stop_all_timer) { is_sounding = BEAMFORMING_NOTIFY_RESET; goto out; } - for (i = 0 ; i < BEAMFORMEE_ENTRY_NUM ; i++) { - PHYDM_DBG(dm, DBG_TXBF, "@%s: BFee Entry %d is_used=%d, is_sound=%d\n", __func__, i, beam_info->beamformee_entry[i].is_used, beam_info->beamformee_entry[i].is_sound); - if (beam_info->beamformee_entry[i].is_used && (!beam_info->beamformee_entry[i].is_sound)) { - PHYDM_DBG(dm, DBG_TXBF, "%s: Add BFee entry %d\n", __func__, i); - *idx = i; - if (beam_info->beamformee_entry[i].is_mu_sta) - is_sounding = BEAMFORMEE_NOTIFY_ADD_MU; - else - is_sounding = BEAMFORMEE_NOTIFY_ADD_SU; - } - - if ((!beam_info->beamformee_entry[i].is_used) && beam_info->beamformee_entry[i].is_sound) { - PHYDM_DBG(dm, DBG_TXBF, "%s: Delete BFee entry %d\n", __func__, i); - *idx = i; - if (beam_info->beamformee_entry[i].is_mu_sta) - is_sounding = BEAMFORMEE_NOTIFY_DELETE_MU; - else - is_sounding = BEAMFORMEE_NOTIFY_DELETE_SU; - } + for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { + PHYDM_DBG(dm, DBG_TXBF, + "@%s: BFee Entry %d is_used=%d, is_sound=%d\n", + __func__, i, beam_info->beamformee_entry[i].is_used, + beam_info->beamformee_entry[i].is_sound); + if (beam_info->beamformee_entry[i].is_used && !beam_info->beamformee_entry[i].is_sound) { + PHYDM_DBG(dm, DBG_TXBF, "%s: Add BFee entry %d\n", + __func__, i); + *idx = i; + if (beam_info->beamformee_entry[i].is_mu_sta) + is_sounding = BEAMFORMEE_NOTIFY_ADD_MU; + else + is_sounding = BEAMFORMEE_NOTIFY_ADD_SU; } + if (!beam_info->beamformee_entry[i].is_used && beam_info->beamformee_entry[i].is_sound) { + PHYDM_DBG(dm, DBG_TXBF, "%s: Delete BFee entry %d\n", + __func__, i); + *idx = i; + if (beam_info->beamformee_entry[i].is_mu_sta) + is_sounding = BEAMFORMEE_NOTIFY_DELETE_MU; + else + is_sounding = BEAMFORMEE_NOTIFY_DELETE_SU; + } + } + out: - PHYDM_DBG(dm, DBG_TXBF, "%s End, is_sounding = %d\n", __func__, is_sounding); + PHYDM_DBG(dm, DBG_TXBF, "%s End, is_sounding = %d\n", __func__, + is_sounding); return is_sounding; } - /* This function is unused */ -u8 -phydm_beamforming_sounding_idx( - void *dm_void, - struct _RT_BEAMFORMING_INFO *beam_info -) +u8 phydm_beamforming_sounding_idx( + void *dm_void, + struct _RT_BEAMFORMING_INFO *beam_info) { - u8 idx = 0; - struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; - struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 idx = 0; + struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); @@ -736,9 +721,9 @@ phydm_beamforming_sounding_idx( beam_oid_info.sound_oid_mode == SOUNDING_HW_HT_TIMER || beam_oid_info.sound_oid_mode == SOUNDING_HW_VHT_TIMER) idx = beam_oid_info.sound_oid_idx; else { - u8 i; + u8 i; for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { - if (beam_info->beamformee_entry[i].is_used && (!beam_info->beamformee_entry[i].is_sound)) { + if (beam_info->beamformee_entry[i].is_used && !beam_info->beamformee_entry[i].is_sound) { idx = i; break; } @@ -748,20 +733,18 @@ phydm_beamforming_sounding_idx( return idx; } - enum sounding_mode phydm_beamforming_sounding_mode( - void *dm_void, - struct _RT_BEAMFORMING_INFO *beam_info, - u8 idx -) + void *dm_void, + struct _RT_BEAMFORMING_INFO *beam_info, + u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 support_interface = dm->support_interface; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 support_interface = dm->support_interface; - struct _RT_BEAMFORMEE_ENTRY beam_entry = beam_info->beamformee_entry[idx]; - struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; - enum sounding_mode mode = beam_oid_info.sound_oid_mode; + struct _RT_BEAMFORMEE_ENTRY beam_entry = beam_info->beamformee_entry[idx]; + struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; + enum sounding_mode mode = beam_oid_info.sound_oid_mode; if (beam_oid_info.sound_oid_mode == SOUNDING_SW_VHT_TIMER || beam_oid_info.sound_oid_mode == SOUNDING_HW_VHT_TIMER) { if (beam_entry.beamform_entry_cap & BEAMFORMER_CAP_VHT_SU) @@ -774,89 +757,84 @@ phydm_beamforming_sounding_mode( else mode = sounding_stop_all_timer; } else if (beam_entry.beamform_entry_cap & BEAMFORMER_CAP_VHT_SU) { - if ((support_interface == ODM_ITRF_USB) && !(dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B))) + if (support_interface == ODM_ITRF_USB && !(dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B))) mode = SOUNDING_FW_VHT_TIMER; else mode = SOUNDING_SW_VHT_TIMER; } else if (beam_entry.beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) { - if ((support_interface == ODM_ITRF_USB) && !(dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B))) + if (support_interface == ODM_ITRF_USB && !(dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B))) mode = SOUNDING_FW_HT_TIMER; else mode = SOUNDING_SW_HT_TIMER; } else mode = sounding_stop_all_timer; - PHYDM_DBG(dm, DBG_TXBF, "[%s] support_interface=%d, mode=%d\n", __func__, support_interface, mode); + PHYDM_DBG(dm, DBG_TXBF, "[%s] support_interface=%d, mode=%d\n", + __func__, support_interface, mode); return mode; } - -u16 -phydm_beamforming_sounding_time( - void *dm_void, - struct _RT_BEAMFORMING_INFO *beam_info, - enum sounding_mode mode, - u8 idx -) +u16 phydm_beamforming_sounding_time( + void *dm_void, + struct _RT_BEAMFORMING_INFO *beam_info, + enum sounding_mode mode, + u8 idx) { - u16 sounding_time = 0xffff; - struct _RT_BEAMFORMEE_ENTRY beam_entry = beam_info->beamformee_entry[idx]; - struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; - struct dm_struct *dm = (struct dm_struct *)dm_void; + u16 sounding_time = 0xffff; + struct _RT_BEAMFORMEE_ENTRY beam_entry = beam_info->beamformee_entry[idx]; + struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); if (mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_HW_VHT_TIMER) sounding_time = beam_oid_info.sound_oid_period * 32; else if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_SW_VHT_TIMER) - /*Modified by David*/ - sounding_time = beam_entry.sound_period; /*beam_oid_info.sound_oid_period;*/ + /*@Modified by David*/ + sounding_time = beam_entry.sound_period; /*@beam_oid_info.sound_oid_period;*/ else sounding_time = beam_entry.sound_period; return sounding_time; } - enum channel_width phydm_beamforming_sounding_bw( - void *dm_void, - struct _RT_BEAMFORMING_INFO *beam_info, - enum sounding_mode mode, - u8 idx -) + void *dm_void, + struct _RT_BEAMFORMING_INFO *beam_info, + enum sounding_mode mode, + u8 idx) { - enum channel_width sounding_bw = CHANNEL_WIDTH_20; - struct _RT_BEAMFORMEE_ENTRY beam_entry = beam_info->beamformee_entry[idx]; - struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; - struct dm_struct *dm = (struct dm_struct *)dm_void; + enum channel_width sounding_bw = CHANNEL_WIDTH_20; + struct _RT_BEAMFORMEE_ENTRY beam_entry = beam_info->beamformee_entry[idx]; + struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_HW_VHT_TIMER) sounding_bw = beam_oid_info.sound_oid_bw; else if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_SW_VHT_TIMER) - /*Modified by David*/ - sounding_bw = beam_entry.sound_bw; /*beam_oid_info.sound_oid_bw;*/ + /*@Modified by David*/ + sounding_bw = beam_entry.sound_bw; /*@beam_oid_info.sound_oid_bw;*/ else sounding_bw = beam_entry.sound_bw; - PHYDM_DBG(dm, DBG_TXBF, "%s, sounding_bw=0x%X\n", __func__, sounding_bw); + PHYDM_DBG(dm, DBG_TXBF, "%s, sounding_bw=0x%X\n", __func__, + sounding_bw); return sounding_bw; } - boolean phydm_beamforming_select_beam_entry( - void *dm_void, - struct _RT_BEAMFORMING_INFO *beam_info -) + void *dm_void, + struct _RT_BEAMFORMING_INFO *beam_info) { - struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; - /*entry.is_sound is different between first and latter NDPA, and should not be used as BFee entry selection*/ - /*BTW, latter modification should sync to the selection mechanism of AP/ADSL instead of the fixed sound_idx.*/ + /*@entry.is_sound is different between first and latter NDPA, and should not be used as BFee entry selection*/ + /*@BTW, latter modification should sync to the selection mechanism of AP/ADSL instead of the fixed sound_idx.*/ sound_info->sound_idx = phydm_beamforming_sounding_idx(dm, beam_info); /*sound_info->sound_idx = 0;*/ @@ -866,7 +844,9 @@ phydm_beamforming_select_beam_entry( sound_info->sound_mode = sounding_stop_all_timer; if (sounding_stop_all_timer == sound_info->sound_mode) { - PHYDM_DBG(dm, DBG_TXBF, "[%s] Return because of sounding_stop_all_timer\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, + "[%s] Return because of sounding_stop_all_timer\n", + __func__); return false; } else { sound_info->sound_bw = phydm_beamforming_sounding_bw(dm, beam_info, sound_info->sound_mode, sound_info->sound_idx); @@ -878,33 +858,32 @@ phydm_beamforming_select_beam_entry( /*SU BFee Entry Only*/ boolean phydm_beamforming_start_period( - void *dm_void -) + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - boolean ret = true; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean ret = true; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; phydm_beamforming_dym_ndpa_rate(dm); - phydm_beamforming_select_beam_entry(dm, beam_info); /* Modified */ + phydm_beamforming_select_beam_entry(dm, beam_info); /* @Modified */ if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER) odm_set_timer(dm, &beam_info->beamforming_timer, sound_info->sound_period); else if (sound_info->sound_mode == SOUNDING_HW_VHT_TIMER || sound_info->sound_mode == SOUNDING_HW_HT_TIMER || - sound_info->sound_mode == SOUNDING_AUTO_VHT_TIMER || sound_info->sound_mode == SOUNDING_AUTO_HT_TIMER) { + sound_info->sound_mode == SOUNDING_AUTO_VHT_TIMER || sound_info->sound_mode == SOUNDING_AUTO_HT_TIMER) { HAL_HW_TIMER_TYPE timer_type = HAL_TIMER_TXBF; - u32 val = (sound_info->sound_period | (timer_type << 16)); + u32 val = (sound_info->sound_period | (timer_type << 16)); - /* HW timer stop: All IC has the same setting */ + /* @HW timer stop: All IC has the same setting */ phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_STOP, (u8 *)(&timer_type)); /* odm_write_1byte(dm, 0x15F, 0); */ - /* HW timer init: All IC has the same setting, but 92E & 8812A only write 2 bytes */ + /* @HW timer init: All IC has the same setting, but 92E & 8812A only write 2 bytes */ phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_INIT, (u8 *)(&val)); /* odm_write_1byte(dm, 0x164, 1); */ /* odm_write_4byte(dm, 0x15C, val); */ - /* HW timer start: All IC has the same setting */ + /* @HW timer start: All IC has the same setting */ phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_START, (u8 *)(&timer_type)); /* odm_write_1byte(dm, 0x15F, 0x5); */ } else if (sound_info->sound_mode == SOUNDING_FW_VHT_TIMER || sound_info->sound_mode == SOUNDING_FW_HT_TIMER) @@ -912,23 +891,23 @@ phydm_beamforming_start_period( else ret = false; - PHYDM_DBG(dm, DBG_TXBF, "[%s] sound_idx=%d, sound_mode=%d, sound_bw=%d, sound_period=%d\n", __func__, - sound_info->sound_idx, sound_info->sound_mode, sound_info->sound_bw, sound_info->sound_period); + PHYDM_DBG(dm, DBG_TXBF, + "[%s] sound_idx=%d, sound_mode=%d, sound_bw=%d, sound_period=%d\n", + __func__, sound_info->sound_idx, sound_info->sound_mode, + sound_info->sound_bw, sound_info->sound_period); return ret; } /* Used after beamforming_leave, and will clear the setting of the "already deleted" entry *SU BFee Entry Only*/ -void -phydm_beamforming_end_period_sw( - void *dm_void -) +void phydm_beamforming_end_period_sw( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; /*void *adapter = dm->adapter;*/ - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; HAL_HW_TIMER_TYPE timer_type = HAL_TIMER_TXBF; @@ -937,53 +916,51 @@ phydm_beamforming_end_period_sw( if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER) odm_cancel_timer(dm, &beam_info->beamforming_timer); else if (sound_info->sound_mode == SOUNDING_HW_VHT_TIMER || sound_info->sound_mode == SOUNDING_HW_HT_TIMER || - sound_info->sound_mode == SOUNDING_AUTO_VHT_TIMER || sound_info->sound_mode == SOUNDING_AUTO_HT_TIMER) - /*HW timer stop: All IC has the same setting*/ + sound_info->sound_mode == SOUNDING_AUTO_VHT_TIMER || sound_info->sound_mode == SOUNDING_AUTO_HT_TIMER) + /*@HW timer stop: All IC has the same setting*/ phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_STOP, (u8 *)(&timer_type)); /*odm_write_1byte(dm, 0x15F, 0);*/ } -void -phydm_beamforming_end_period_fw( - void *dm_void -) +void phydm_beamforming_end_period_fw( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 idx = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 idx = 0; hal_com_txbf_set(dm, TXBF_SET_SOUNDING_FW_NDPA, (u8 *)&idx); PHYDM_DBG(dm, DBG_TXBF, "[%s]\n", __func__); } - /*SU BFee Entry Only*/ -void -phydm_beamforming_clear_entry_sw( - void *dm_void, - boolean is_delete, - u8 delete_idx -) +void phydm_beamforming_clear_entry_sw( + void *dm_void, + boolean is_delete, + u8 delete_idx) { - u8 idx = 0; - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + u8 idx = 0; + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; if (is_delete) { if (delete_idx < BEAMFORMEE_ENTRY_NUM) { beamform_entry = beam_info->beamformee_entry + delete_idx; - if (!((!beamform_entry->is_used) && beamform_entry->is_sound)) { - PHYDM_DBG(dm, DBG_TXBF, "[%s] SW delete_idx is wrong!!!!!\n", __func__); + if (!(!beamform_entry->is_used && beamform_entry->is_sound)) { + PHYDM_DBG(dm, DBG_TXBF, + "[%s] SW delete_idx is wrong!!!!!\n", + __func__); return; } } - PHYDM_DBG(dm, DBG_TXBF, "[%s] SW delete BFee entry %d\n", __func__, delete_idx); + PHYDM_DBG(dm, DBG_TXBF, "[%s] SW delete BFee entry %d\n", + __func__, delete_idx); if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING) { beamform_entry->is_beamforming_in_progress = false; beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; } else if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { - beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; + beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&delete_idx); } beamform_entry->is_sound = false; @@ -995,13 +972,14 @@ phydm_beamforming_clear_entry_sw( /*Used after is_sounding=RESET, and will clear the setting of "ever sounded" entry, which is not necessarily be deleted.*/ /*This function is mainly used in case "beam_oid_info.sound_oid_mode == sounding_stop_all_timer".*/ - /*However, setting oid doesn't delete entries (is_used is still true), new entries may fail to be added in.*/ + /*@However, setting oid doesn't delete entries (is_used is still true), new entries may fail to be added in.*/ if (!beamform_entry->is_sound) continue; - PHYDM_DBG(dm, DBG_TXBF, "[%s] SW reset BFee entry %d\n", __func__, idx); - /* + PHYDM_DBG(dm, DBG_TXBF, "[%s] SW reset BFee entry %d\n", + __func__, idx); + /*@ * If End procedure is * 1. Between (Send NDPA, C2H packet return), reset state to initialized. * After C2H packet return , status bit will be set to zero. @@ -1012,7 +990,7 @@ phydm_beamforming_clear_entry_sw( if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING) phydm_beamforming_end_sw(dm, 0); else if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { - beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; + beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&idx); } @@ -1020,28 +998,29 @@ phydm_beamforming_clear_entry_sw( } } -void -phydm_beamforming_clear_entry_fw( - void *dm_void, - boolean is_delete, - u8 delete_idx -) +void phydm_beamforming_clear_entry_fw( + void *dm_void, + boolean is_delete, + u8 delete_idx) { - u8 idx = 0; - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + u8 idx = 0; + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; if (is_delete) { if (delete_idx < BEAMFORMEE_ENTRY_NUM) { beamform_entry = beam_info->beamformee_entry + delete_idx; - if (!((!beamform_entry->is_used) && beamform_entry->is_sound)) { - PHYDM_DBG(dm, DBG_TXBF, "[%s] FW delete_idx is wrong!!!!!\n", __func__); + if (!(!beamform_entry->is_used && beamform_entry->is_sound)) { + PHYDM_DBG(dm, DBG_TXBF, + "[%s] FW delete_idx is wrong!!!!!\n", + __func__); return; } } - PHYDM_DBG(dm, DBG_TXBF, "%s: FW delete BFee entry %d\n", __func__, delete_idx); + PHYDM_DBG(dm, DBG_TXBF, "%s: FW delete BFee entry %d\n", + __func__, delete_idx); beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; beamform_entry->is_sound = false; } else { @@ -1050,11 +1029,13 @@ phydm_beamforming_clear_entry_fw( /*Used after is_sounding=RESET, and will clear the setting of "ever sounded" entry, which is not necessarily be deleted.*/ /*This function is mainly used in case "beam_oid_info.sound_oid_mode == sounding_stop_all_timer".*/ - /*However, setting oid doesn't delete entries (is_used is still true), new entries may fail to be added in.*/ + /*@However, setting oid doesn't delete entries (is_used is still true), new entries may fail to be added in.*/ if (beamform_entry->is_sound) { - PHYDM_DBG(dm, DBG_TXBF, "[%s]FW reset BFee entry %d\n", __func__, idx); - /* + PHYDM_DBG(dm, DBG_TXBF, + "[%s]FW reset BFee entry %d\n", + __func__, idx); + /*@ * If End procedure is * 1. Between (Send NDPA, C2H packet return), reset state to initialized. * After C2H packet return , status bit will be set to zero. @@ -1069,70 +1050,79 @@ phydm_beamforming_clear_entry_fw( } } -/* +/*@ * Called : * 1. Add and delete entry : beamforming_enter/beamforming_leave * 2. FW trigger : Beamforming_SetTxBFen * 3. Set OID_RT_BEAMFORMING_PERIOD : beamforming_control_v2 */ -void -phydm_beamforming_notify( - void *dm_void -) +void phydm_beamforming_notify( + void *dm_void) { - u8 idx = BEAMFORMEE_ENTRY_NUM; - enum beamforming_notify_state is_sounding = BEAMFORMING_NOTIFY_NONE; - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; + u8 idx = BEAMFORMEE_ENTRY_NUM; + enum beamforming_notify_state is_sounding = BEAMFORMING_NOTIFY_NONE; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); is_sounding = phydm_beamfomring_is_sounding(dm, beam_info, &idx); - PHYDM_DBG(dm, DBG_TXBF, "%s, Before notify, is_sounding=%d, idx=%d\n", __func__, is_sounding, idx); - PHYDM_DBG(dm, DBG_TXBF, "%s: beam_info->beamformee_su_cnt = %d\n", __func__, beam_info->beamformee_su_cnt); - + PHYDM_DBG(dm, DBG_TXBF, "%s, Before notify, is_sounding=%d, idx=%d\n", + __func__, is_sounding, idx); + PHYDM_DBG(dm, DBG_TXBF, "%s: beam_info->beamformee_su_cnt = %d\n", + __func__, beam_info->beamformee_su_cnt); switch (is_sounding) { case BEAMFORMEE_NOTIFY_ADD_SU: - PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_ADD_SU\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_ADD_SU\n", + __func__); phydm_beamforming_start_period(dm); break; case BEAMFORMEE_NOTIFY_DELETE_SU: - PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_DELETE_SU\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_DELETE_SU\n", + __func__); if (sound_info->sound_mode == SOUNDING_FW_HT_TIMER || sound_info->sound_mode == SOUNDING_FW_VHT_TIMER) { phydm_beamforming_clear_entry_fw(dm, true, idx); - if (beam_info->beamformee_su_cnt == 0) { /* For 2->1 entry, we should not cancel SW timer */ + if (beam_info->beamformee_su_cnt == 0) { /* @For 2->1 entry, we should not cancel SW timer */ phydm_beamforming_end_period_fw(dm); - PHYDM_DBG(dm, DBG_TXBF, "%s: No BFee left\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s: No BFee left\n", + __func__); } } else { phydm_beamforming_clear_entry_sw(dm, true, idx); - if (beam_info->beamformee_su_cnt == 0) { /* For 2->1 entry, we should not cancel SW timer */ + if (beam_info->beamformee_su_cnt == 0) { /* @For 2->1 entry, we should not cancel SW timer */ phydm_beamforming_end_period_sw(dm); - PHYDM_DBG(dm, DBG_TXBF, "%s: No BFee left\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s: No BFee left\n", + __func__); } } break; case BEAMFORMEE_NOTIFY_ADD_MU: - PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_ADD_MU\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_ADD_MU\n", + __func__); if (beam_info->beamformee_mu_cnt == 2) { - /*if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER) + /*@if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER) odm_set_timer(dm, &beam_info->beamforming_timer, sound_info->sound_period);*/ - odm_set_timer(dm, &beam_info->beamforming_timer, 1000); /*Do MU sounding every 1sec*/ + odm_set_timer(dm, &beam_info->beamforming_timer, 1000); /*@Do MU sounding every 1sec*/ } else - PHYDM_DBG(dm, DBG_TXBF, "%s: Less or larger than 2 MU STAs, not to set timer\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, + "%s: Less or larger than 2 MU STAs, not to set timer\n", + __func__); break; case BEAMFORMEE_NOTIFY_DELETE_MU: - PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_DELETE_MU\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_DELETE_MU\n", + __func__); if (beam_info->beamformee_mu_cnt == 1) { - /*if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER)*/{ + /*@if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER)*/ { odm_cancel_timer(dm, &beam_info->beamforming_timer); - PHYDM_DBG(dm, DBG_TXBF, "%s: Less than 2 MU STAs, stop sounding\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, + "%s: Less than 2 MU STAs, stop sounding\n", + __func__); } } break; @@ -1151,91 +1141,104 @@ phydm_beamforming_notify( default: break; } - } - - boolean -beamforming_init_entry( - void *dm_void, - u16 sta_idx, - u8 *bfer_bfee_idx -) +beamforming_init_entry(void *dm_void, u16 sta_idx, u8 *bfer_bfee_idx, + u8 *my_mac_addr) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *cmn_sta = dm->phydm_sta_info[sta_idx]; - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; - struct _RT_BEAMFORMER_ENTRY *beamformer_entry = NULL; - struct _RT_BEAMFORM_STAINFO *sta = NULL; - enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE; - u8 bfer_idx = 0xF, bfee_idx = 0xF; - u8 num_of_sounding_dim = 0, comp_steering_num_of_bfer = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *cmn_sta = dm->phydm_sta_info[sta_idx]; + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; + struct _RT_BEAMFORMER_ENTRY *beamformer_entry = NULL; + struct _RT_BEAMFORM_STAINFO *sta = NULL; + enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE; + u8 bfer_idx = 0xF, bfee_idx = 0xF; + u8 num_of_sounding_dim = 0, comp_steering_num_of_bfer = 0; - sta = phydm_sta_info_init(dm, sta_idx); + if (!is_sta_active(cmn_sta)) { + PHYDM_DBG(dm, DBG_TXBF, "%s => sta_info(mac_id:%d) failed\n", + __func__, sta_idx); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + rtw_warn_on(1); + #endif + return false; + } + sta = phydm_sta_info_init(dm, sta_idx, my_mac_addr); /*The current setting does not support Beaforming*/ if (BEAMFORMING_CAP_NONE == sta->ht_beamform_cap && BEAMFORMING_CAP_NONE == sta->vht_beamform_cap) { - PHYDM_DBG(dm, DBG_TXBF, "The configuration disabled Beamforming! Skip...\n"); + PHYDM_DBG(dm, DBG_TXBF, + "The configuration disabled Beamforming! Skip...\n"); return false; } if (!(cmn_sta->support_wireless_set & (WIRELESS_VHT | WIRELESS_HT))) return false; else { - if (cmn_sta->support_wireless_set & WIRELESS_HT) {/*HT*/ - if (TEST_FLAG(sta->cur_beamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) {/*We are Beamformee because the STA is Beamformer*/ - beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMEE_CAP_HT_EXPLICIT); - num_of_sounding_dim = (sta->cur_beamform & BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP) >> 6; + if (cmn_sta->support_wireless_set & WIRELESS_HT) { /*@HT*/ + if (TEST_FLAG(sta->cur_beamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { /*We are Beamformee because the STA is Beamformer*/ + beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMEE_CAP_HT_EXPLICIT); + num_of_sounding_dim = (sta->cur_beamform & BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP) >> 6; } /*We are Beamformer because the STA is Beamformee*/ if (TEST_FLAG(sta->cur_beamform, BEAMFORMING_HT_BEAMFORMEE_ENABLE) || - TEST_FLAG(sta->ht_beamform_cap, BEAMFORMING_HT_BEAMFORMER_TEST)) { - beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMER_CAP_HT_EXPLICIT); - comp_steering_num_of_bfer = (sta->cur_beamform & BEAMFORMING_HT_BEAMFORMER_STEER_NUM) >> 4; + TEST_FLAG(sta->ht_beamform_cap, BEAMFORMING_HT_BEAMFORMER_TEST)) { + beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMER_CAP_HT_EXPLICIT); + comp_steering_num_of_bfer = (sta->cur_beamform & BEAMFORMING_HT_BEAMFORMER_STEER_NUM) >> 4; } - PHYDM_DBG(dm, DBG_TXBF, "[%s] HT cur_beamform=0x%X, beamform_cap=0x%X\n", __func__, sta->cur_beamform, beamform_cap); - PHYDM_DBG(dm, DBG_TXBF, "[%s] HT num_of_sounding_dim=%d, comp_steering_num_of_bfer=%d\n", __func__, num_of_sounding_dim, comp_steering_num_of_bfer); + PHYDM_DBG(dm, DBG_TXBF, + "[%s] HT cur_beamform=0x%X, beamform_cap=0x%X\n", + __func__, sta->cur_beamform, beamform_cap); + PHYDM_DBG(dm, DBG_TXBF, + "[%s] HT num_of_sounding_dim=%d, comp_steering_num_of_bfer=%d\n", + __func__, num_of_sounding_dim, + comp_steering_num_of_bfer); } #if (ODM_IC_11AC_SERIES_SUPPORT == 1) - if (cmn_sta->support_wireless_set & WIRELESS_VHT) { /*VHT*/ + if (cmn_sta->support_wireless_set & WIRELESS_VHT) { /*VHT*/ - /* We are Beamformee because the STA is SU Beamformer*/ - if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) { - beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMEE_CAP_VHT_SU); - num_of_sounding_dim = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM) >> 12; - } - /* We are Beamformer because the STA is SU Beamformee*/ - if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) || - TEST_FLAG(sta->vht_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_TEST)) { - beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMER_CAP_VHT_SU); - comp_steering_num_of_bfer = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMER_STS_CAP) >> 8; - } - /* We are Beamformee because the STA is MU Beamformer*/ - if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) { - beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMEE_CAP_VHT_MU); - num_of_sounding_dim = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM) >> 12; - } - /* We are Beamformer because the STA is MU Beamformee*/ - if (phydm_acting_determine(dm, phydm_acting_as_ap)) { /* Only AP mode supports to act an MU beamformer */ - if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE) || - TEST_FLAG(sta->vht_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_TEST)) { - beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMER_CAP_VHT_MU); + /* We are Beamformee because the STA is SU Beamformer*/ + if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) { + beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMEE_CAP_VHT_SU); + num_of_sounding_dim = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM) >> 12; + } + /* We are Beamformer because the STA is SU Beamformee*/ + if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) || + TEST_FLAG(sta->vht_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_TEST)) { + beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMER_CAP_VHT_SU); comp_steering_num_of_bfer = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMER_STS_CAP) >> 8; } - } - PHYDM_DBG(dm, DBG_TXBF, "[%s]VHT cur_beamform_vht=0x%X, beamform_cap=0x%X\n", __func__, sta->cur_beamform_vht, beamform_cap); - PHYDM_DBG(dm, DBG_TXBF, "[%s]VHT num_of_sounding_dim=0x%X, comp_steering_num_of_bfer=0x%X\n", __func__, num_of_sounding_dim, comp_steering_num_of_bfer); - + /* We are Beamformee because the STA is MU Beamformer*/ + if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) { + beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMEE_CAP_VHT_MU); + num_of_sounding_dim = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM) >> 12; + } + /* We are Beamformer because the STA is MU Beamformee*/ + if (phydm_acting_determine(dm, phydm_acting_as_ap)) { /* Only AP mode supports to act an MU beamformer */ + if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE) || + TEST_FLAG(sta->vht_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_TEST)) { + beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMER_CAP_VHT_MU); + comp_steering_num_of_bfer = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMER_STS_CAP) >> 8; + } + } + PHYDM_DBG(dm, DBG_TXBF, + "[%s]VHT cur_beamform_vht=0x%X, beamform_cap=0x%X\n", + __func__, sta->cur_beamform_vht, + beamform_cap); + PHYDM_DBG(dm, DBG_TXBF, + "[%s]VHT num_of_sounding_dim=0x%X, comp_steering_num_of_bfer=0x%X\n", + __func__, num_of_sounding_dim, + comp_steering_num_of_bfer); } #endif } - if (beamform_cap == BEAMFORMING_CAP_NONE) return false; - PHYDM_DBG(dm, DBG_TXBF, "[%s] Self BF Entry Cap = 0x%02X\n", __func__, beamform_cap); + PHYDM_DBG(dm, DBG_TXBF, "[%s] Self BF Entry Cap = 0x%02X\n", __func__, + beamform_cap); /*We are BFee, so the entry is BFer*/ if (beamform_cap & (BEAMFORMEE_CAP_VHT_MU | BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP_HT_EXPLICIT)) { @@ -1244,7 +1247,9 @@ beamforming_init_entry( if (beamformer_entry == NULL) { beamformer_entry = beamforming_add_bfer_entry(dm, sta, beamform_cap, num_of_sounding_dim, &bfer_idx); if (beamformer_entry == NULL) - PHYDM_DBG(dm, DBG_TXBF, "[%s]Not enough BFer entry!!!!!\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, + "[%s]Not enough BFer entry!!!!!\n", + __func__); } } @@ -1252,20 +1257,24 @@ beamforming_init_entry( if (beamform_cap & (BEAMFORMER_CAP_VHT_MU | BEAMFORMER_CAP_VHT_SU | BEAMFORMER_CAP_HT_EXPLICIT)) { beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, sta->ra, &bfee_idx); - /*¦pªGBFeeIdx = 0xF «h¥Nªí¥Ø«eentry·í¤¤¨S¦³¬Û¦PªºMACID¦b¤º*/ - PHYDM_DBG(dm, DBG_TXBF, "[%s] Get BFee entry 0x%X by address\n", __func__, bfee_idx); + /*@if BFeeIdx = 0xF, that represent for no matched MACID among all linked entrys */ + PHYDM_DBG(dm, DBG_TXBF, "[%s] Get BFee entry 0x%X by address\n", + __func__, bfee_idx); if (beamform_entry == NULL) { beamform_entry = beamforming_add_bfee_entry(dm, sta, beamform_cap, num_of_sounding_dim, comp_steering_num_of_bfer, &bfee_idx); - PHYDM_DBG(dm, DBG_TXBF, "[%s]: sta->AID=%d, sta->mac_id=%d\n", __func__, sta->aid, sta->mac_id); + PHYDM_DBG(dm, DBG_TXBF, + "[%s]: sta->AID=%d, sta->mac_id=%d\n", + __func__, sta->aid, sta->mac_id); - PHYDM_DBG(dm, DBG_TXBF, "[%s]: Add BFee entry %d\n", __func__, bfee_idx); + PHYDM_DBG(dm, DBG_TXBF, "[%s]: Add BFee entry %d\n", + __func__, bfee_idx); if (beamform_entry == NULL) return false; else beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; } else { - /*Entry has been created. If entry is initialing or progressing then errors occur.*/ + /*@Entry has been created. If entry is initialing or progressing then errors occur.*/ if (beamform_entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && beamform_entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) return false; @@ -1277,26 +1286,25 @@ beamforming_init_entry( } *bfer_bfee_idx = (bfer_idx << 4) | bfee_idx; - PHYDM_DBG(dm, DBG_TXBF, "[%s] End: bfer_idx=0x%X, bfee_idx=0x%X, bfer_bfee_idx=0x%X\n", __func__, bfer_idx, bfee_idx, *bfer_bfee_idx); + PHYDM_DBG(dm, DBG_TXBF, + "[%s] End: bfer_idx=0x%X, bfee_idx=0x%X, bfer_bfee_idx=0x%X\n", + __func__, bfer_idx, bfee_idx, *bfer_bfee_idx); return true; } - -void -beamforming_deinit_entry( - void *dm_void, - u8 *RA -) +void beamforming_deinit_entry( + void *dm_void, + u8 *RA) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 idx = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 idx = 0; - struct _RT_BEAMFORMER_ENTRY *bfer_entry = phydm_beamforming_get_bfer_entry_by_addr(dm, RA, &idx); - struct _RT_BEAMFORMEE_ENTRY *bfee_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); + struct _RT_BEAMFORMER_ENTRY *bfer_entry = phydm_beamforming_get_bfer_entry_by_addr(dm, RA, &idx); + struct _RT_BEAMFORMEE_ENTRY *bfee_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); boolean ret = false; - PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); if (bfee_entry != NULL) { PHYDM_DBG(dm, DBG_TXBF, "%s, bfee_entry\n", __func__); @@ -1328,21 +1336,19 @@ beamforming_deinit_entry( PHYDM_DBG(dm, DBG_TXBF, "%s End, idx = 0x%X\n", __func__, idx); } - boolean beamforming_start_v1( - void *dm_void, - u8 *RA, - boolean mode, - enum channel_width BW, - u8 rate -) + void *dm_void, + u8 *RA, + boolean mode, + enum channel_width BW, + u8 rate) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 idx = 0; - struct _RT_BEAMFORMEE_ENTRY *entry; - boolean ret = true; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 idx = 0; + struct _RT_BEAMFORMEE_ENTRY *entry; + boolean ret = true; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); @@ -1396,24 +1402,22 @@ beamforming_start_v1( return true; } - boolean beamforming_start_sw( - void *dm_void, - u8 idx, - u8 mode, - enum channel_width BW -) + void *dm_void, + u8 idx, + u8 mode, + enum channel_width BW) { - u8 *ra = NULL; - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMEE_ENTRY *entry; - boolean ret = true; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + u8 *ra = NULL; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMEE_ENTRY *entry; + boolean ret = true; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; #ifdef SUPPORT_MU_BF #if (SUPPORT_MU_BF == 1) - u8 i, poll_sta_cnt = 0; - boolean is_get_first_bfee = false; + u8 i, poll_sta_cnt = 0; + boolean is_get_first_bfee = false; #endif #endif @@ -1426,13 +1430,16 @@ beamforming_start_sw( entry = &beam_info->beamformee_entry[idx]; if (entry->is_used == false) { - PHYDM_DBG(dm, DBG_TXBF, "Skip Beamforming, no entry for idx =%d\n", idx); + PHYDM_DBG(dm, DBG_TXBF, + "Skip Beamforming, no entry for idx =%d\n", + idx); entry->is_beamforming_in_progress = false; return false; } if (entry->is_beamforming_in_progress) { - PHYDM_DBG(dm, DBG_TXBF, "is_beamforming_in_progress, skip...\n"); + PHYDM_DBG(dm, DBG_TXBF, + "is_beamforming_in_progress, skip...\n"); return false; } @@ -1442,19 +1449,25 @@ beamforming_start_sw( if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_AUTO_HT_TIMER) { if (!(entry->beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) { entry->is_beamforming_in_progress = false; - PHYDM_DBG(dm, DBG_TXBF, "%s Return by not support BEAMFORMER_CAP_HT_EXPLICIT <==\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, + "%s Return by not support BEAMFORMER_CAP_HT_EXPLICIT <==\n", + __func__); return false; } } else if (mode == SOUNDING_SW_VHT_TIMER || mode == SOUNDING_HW_VHT_TIMER || mode == SOUNDING_AUTO_VHT_TIMER) { if (!(entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)) { entry->is_beamforming_in_progress = false; - PHYDM_DBG(dm, DBG_TXBF, "%s Return by not support BEAMFORMER_CAP_VHT_SU <==\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, + "%s Return by not support BEAMFORMER_CAP_VHT_SU <==\n", + __func__); return false; } } if (entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) { entry->is_beamforming_in_progress = false; - PHYDM_DBG(dm, DBG_TXBF, "%s Return by incorrect beamform_entry_state(%d) <==\n", __func__, entry->beamform_entry_state); + PHYDM_DBG(dm, DBG_TXBF, + "%s Return by incorrect beamform_entry_state(%d) <==\n", + __func__, entry->beamform_entry_state); return false; } else { entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING; @@ -1464,8 +1477,8 @@ beamforming_start_sw( beam_info->beamformee_cur_idx = idx; } - /*2014.12.22 Luke: Need to be checked*/ - /*GET_TXBF_INFO(adapter)->fTxbfSet(adapter, TXBF_SET_SOUNDING_STATUS, (u8*)&idx);*/ + /*@2014.12.22 Luke: Need to be checked*/ + /*@GET_TXBF_INFO(adapter)->fTxbfSet(adapter, TXBF_SET_SOUNDING_STATUS, (u8*)&idx);*/ if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_AUTO_HT_TIMER) ret = beamforming_send_ht_ndpa_packet(dm, ra, BW, NORMAL_QUEUE); @@ -1478,8 +1491,7 @@ beamforming_start_sw( return false; } - - /*-------------------------- +/*@-------------------------- * Send BF Report Poll for MU BF --------------------------*/ #ifdef SUPPORT_MU_BF @@ -1487,7 +1499,7 @@ beamforming_start_sw( if (beam_info->beamformee_mu_cnt <= 1) goto out; - /* More than 1 MU STA*/ + /* @More than 1 MU STA*/ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { entry = &beam_info->beamformee_entry[i]; if (!entry->is_mu_sta) @@ -1499,7 +1511,7 @@ beamforming_start_sw( } poll_sta_cnt++; - if (poll_sta_cnt == (beam_info->beamformee_mu_cnt - 1))/* The last STA*/ + if (poll_sta_cnt == (beam_info->beamformee_mu_cnt - 1)) /* The last STA*/ send_sw_vht_bf_report_poll(dm, entry->mac_addr, true); else send_sw_vht_bf_report_poll(dm, entry->mac_addr, false); @@ -1510,20 +1522,19 @@ out: return true; } - boolean beamforming_start_fw( - void *dm_void, - u8 idx -) + void *dm_void, + u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMEE_ENTRY *entry; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMEE_ENTRY *entry; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; entry = &beam_info->beamformee_entry[idx]; if (entry->is_used == false) { - PHYDM_DBG(dm, DBG_TXBF, "Skip Beamforming, no entry for idx =%d\n", idx); + PHYDM_DBG(dm, DBG_TXBF, + "Skip Beamforming, no entry for idx =%d\n", idx); return false; } @@ -1535,15 +1546,13 @@ beamforming_start_fw( return true; } -void -beamforming_check_sounding_success( - void *dm_void, - boolean status -) +void beamforming_check_sounding_success( + void *dm_void, + boolean status) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY *entry = &beam_info->beamformee_entry[beam_info->beamformee_cur_idx]; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY *entry = &beam_info->beamformee_entry[beam_info->beamformee_cur_idx]; PHYDM_DBG(dm, DBG_TXBF, "[David]@%s Start!\n", __func__); @@ -1553,24 +1562,25 @@ beamforming_check_sounding_success( entry->log_status_fail_cnt = 0; } else if (entry->log_status_fail_cnt <= 20) { entry->log_status_fail_cnt++; - PHYDM_DBG(dm, DBG_TXBF, "%s log_status_fail_cnt %d\n", __func__, entry->log_status_fail_cnt); + PHYDM_DBG(dm, DBG_TXBF, "%s log_status_fail_cnt %d\n", __func__, + entry->log_status_fail_cnt); } if (entry->log_status_fail_cnt > 20) { entry->log_status_fail_cnt = 21; - PHYDM_DBG(dm, DBG_TXBF, "%s log_status_fail_cnt > 20, Stop SOUNDING\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, + "%s log_status_fail_cnt > 20, Stop SOUNDING\n", + __func__); beamforming_dym_period(dm, status); } } -void -phydm_beamforming_end_sw( - void *dm_void, - boolean status -) +void phydm_beamforming_end_sw( + void *dm_void, + boolean status) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY *entry = &beam_info->beamformee_entry[beam_info->beamformee_cur_idx]; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY *entry = &beam_info->beamformee_entry[beam_info->beamformee_cur_idx]; if (beam_info->is_mu_sounding) { PHYDM_DBG(dm, DBG_TXBF, "%s: MU sounding done\n", __func__); @@ -1579,12 +1589,15 @@ phydm_beamforming_end_sw( (u8 *)&beam_info->beamformee_cur_idx); } else { if (entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSING) { - PHYDM_DBG(dm, DBG_TXBF, "[%s] BeamformStatus %d\n", __func__, entry->beamform_entry_state); + PHYDM_DBG(dm, DBG_TXBF, "[%s] BeamformStatus %d\n", + __func__, entry->beamform_entry_state); return; } - if ((beam_info->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7) && (beam_info->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9) && (!beam_info->snding3ss)) { - PHYDM_DBG(dm, DBG_TXBF, "[%s] VHT3SS 7,8,9, do not apply V matrix.\n", __func__); + if (beam_info->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7 && beam_info->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9 && !beam_info->snding3ss) { + PHYDM_DBG(dm, DBG_TXBF, + "[%s] VHT3SS 7,8,9, do not apply V matrix.\n", + __func__); entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&beam_info->beamformee_cur_idx); @@ -1598,15 +1611,18 @@ phydm_beamforming_end_sw( entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; hal_com_txbf_set(dm, TXBF_SET_TX_PATH_RESET, (u8 *)&beam_info->beamformee_cur_idx); - PHYDM_DBG(dm, DBG_TXBF, "[%s] log_status_fail_cnt %d\n", __func__, entry->log_status_fail_cnt); + PHYDM_DBG(dm, DBG_TXBF, "[%s] log_status_fail_cnt %d\n", + __func__, entry->log_status_fail_cnt); } if (entry->log_status_fail_cnt > 50) { - PHYDM_DBG(dm, DBG_TXBF, "%s log_status_fail_cnt > 50, Stop SOUNDING\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, + "%s log_status_fail_cnt > 50, Stop SOUNDING\n", + __func__); entry->is_sound = false; beamforming_deinit_entry(dm, entry->mac_addr); - /*Modified by David - Every action of deleting entry should follow by Notify*/ + /*@Modified by David - Every action of deleting entry should follow by Notify*/ phydm_beamforming_notify(dm); } @@ -1615,28 +1631,26 @@ phydm_beamforming_end_sw( PHYDM_DBG(dm, DBG_TXBF, "%s: status=%d\n", __func__, status); } - -void -beamforming_timer_callback( +void beamforming_timer_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *dm_void + void *dm_void #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - void *context + void *context #endif -) + ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - void *adapter = (void *)context; - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->odmpriv; + void *adapter = (void *)context; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->odmpriv; #endif - boolean ret = false; - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - struct _RT_BEAMFORMEE_ENTRY *entry = &(beam_info->beamformee_entry[beam_info->beamformee_cur_idx]); - struct _RT_SOUNDING_INFO *sound_info = &(beam_info->sounding_info); - boolean is_beamforming_in_progress; + boolean ret = false; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + struct _RT_BEAMFORMEE_ENTRY *entry = &(beam_info->beamformee_entry[beam_info->beamformee_cur_idx]); + struct _RT_SOUNDING_INFO *sound_info = &(beam_info->sounding_info); + boolean is_beamforming_in_progress; PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); @@ -1646,7 +1660,8 @@ beamforming_timer_callback( is_beamforming_in_progress = entry->is_beamforming_in_progress; if (is_beamforming_in_progress) { - PHYDM_DBG(dm, DBG_TXBF, "is_beamforming_in_progress, reset it\n"); + PHYDM_DBG(dm, DBG_TXBF, + "is_beamforming_in_progress, reset it\n"); phydm_beamforming_end_sw(dm, 0); } @@ -1660,68 +1675,65 @@ beamforming_timer_callback( if (ret) ret = beamforming_start_sw(dm, sound_info->sound_idx, sound_info->sound_mode, sound_info->sound_bw); else - PHYDM_DBG(dm, DBG_TXBF, "%s, Error value return from BeamformingStart_V2\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, + "%s, Error value return from BeamformingStart_V2\n", + __func__); - if ((beam_info->beamformee_su_cnt != 0) || (beam_info->beamformee_mu_cnt > 1)) { + if (beam_info->beamformee_su_cnt != 0 || beam_info->beamformee_mu_cnt > 1) { if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER) odm_set_timer(dm, &beam_info->beamforming_timer, sound_info->sound_period); else { - u32 val = (sound_info->sound_period << 16) | HAL_TIMER_TXBF; + u32 val = (sound_info->sound_period << 16) | HAL_TIMER_TXBF; phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_RESTART, (u8 *)(&val)); } } } - -void -beamforming_sw_timer_callback( +void beamforming_sw_timer_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct phydm_timer_list *timer + struct phydm_timer_list *timer #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) void *function_context #endif -) + ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter = (void *)timer->Adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; + void *adapter = (void *)timer->Adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); beamforming_timer_callback(dm); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - struct dm_struct *dm = (struct dm_struct *)function_context; - void *adapter = dm->adapter; + struct dm_struct *dm = (struct dm_struct *)function_context; + void *adapter = dm->adapter; - if (*(dm->is_net_closed) == true) + if (*dm->is_net_closed == true) return; - rtw_run_in_thread_cmd(adapter, beamforming_timer_callback, adapter); + phydm_run_in_thread_cmd(dm, beamforming_timer_callback, adapter); #endif - } - -void -phydm_beamforming_init( - void *dm_void -) +void phydm_beamforming_init( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_BEAMFORMING_OID_INFO *beam_oid_info = &beam_info->beamforming_oid_info; - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - - #ifdef BEAMFORMING_VERSION_1 + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_BEAMFORMING_OID_INFO *beam_oid_info = &beam_info->beamforming_oid_info; +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + +#ifdef BEAMFORMING_VERSION_1 if (hal_data->beamforming_version != BEAMFORMING_VERSION_1) { return; } - #endif - #endif +#endif +#endif beam_oid_info->sound_oid_mode = SOUNDING_STOP_OID_TIMER; - PHYDM_DBG(dm, DBG_TXBF, "%s mode (%d)\n", __func__, beam_oid_info->sound_oid_mode); + PHYDM_DBG(dm, DBG_TXBF, "%s mode (%d)\n", __func__, + beam_oid_info->sound_oid_mode); beam_info->beamformee_su_cnt = 0; beam_info->beamformer_su_cnt = 0; @@ -1740,19 +1752,17 @@ phydm_beamforming_init( hal_com_txbf_beamform_init(dm); } - boolean phydm_acting_determine( - void *dm_void, - enum phydm_acting_type type -) + void *dm_void, + enum phydm_acting_type type) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - boolean ret = false; + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean ret = false; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER adapter = (PADAPTER)dm->beamforming_info.source_adapter; + void *adapter = dm->beamforming_info.source_adapter; #else - struct _ADAPTER *adapter = dm->adapter; + struct _ADAPTER *adapter = dm->adapter; #endif #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) @@ -1761,7 +1771,7 @@ phydm_acting_determine( else if (type == phydm_acting_as_ibss) ret = ACTING_AS_IBSS(((PADAPTER)(adapter))); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; if (type == phydm_acting_as_ap) ret = check_fwstate(pmlmepriv, WIFI_AP_STATE); @@ -1770,32 +1780,24 @@ phydm_acting_determine( #endif return ret; - } -void -beamforming_enter( - void *dm_void, - u16 sta_idx -) +void beamforming_enter(void *dm_void, u16 sta_idx, u8 *my_mac_addr) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 bfer_bfee_idx = 0xff; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 bfer_bfee_idx = 0xff; - if (beamforming_init_entry(dm, sta_idx, &bfer_bfee_idx)) + if (beamforming_init_entry(dm, sta_idx, &bfer_bfee_idx, my_mac_addr)) hal_com_txbf_set(dm, TXBF_SET_SOUNDING_ENTER, (u8 *)&bfer_bfee_idx); PHYDM_DBG(dm, DBG_TXBF, "[%s] End!\n", __func__); } - -void -beamforming_leave( - void *dm_void, - u8 *RA -) +void beamforming_leave( + void *dm_void, + u8 *RA) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (RA != NULL) { beamforming_deinit_entry(dm, RA); @@ -1827,7 +1829,8 @@ phydm_beamforming_set_txbf_en( else entry->is_txbf = is_txbf; - PHYDM_DBG(dm, DBG_TXBF, "%s mac_id %d TxBF %d\n", __func__, entry->mac_id, entry->is_txbf); + PHYDM_DBG(dm, DBG_TXBF, "%s mac_id %d TxBF %d\n", __func__, + entry->mac_id, entry->is_txbf); phydm_beamforming_notify(dm); } @@ -1835,17 +1838,16 @@ phydm_beamforming_set_txbf_en( enum beamforming_cap phydm_beamforming_get_beam_cap( - void *dm_void, - struct _RT_BEAMFORMING_INFO *beam_info -) + void *dm_void, + struct _RT_BEAMFORMING_INFO *beam_info) { - u8 i; - boolean is_self_beamformer = false; - boolean is_self_beamformee = false; - struct _RT_BEAMFORMEE_ENTRY beamformee_entry; - struct _RT_BEAMFORMER_ENTRY beamformer_entry; - enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE; - struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i; + boolean is_self_beamformer = false; + boolean is_self_beamformee = false; + struct _RT_BEAMFORMEE_ENTRY beamformee_entry; + struct _RT_BEAMFORMER_ENTRY beamformer_entry; + enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE; + struct dm_struct *dm = (struct dm_struct *)dm_void; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -1854,7 +1856,9 @@ phydm_beamforming_get_beam_cap( if (beamformee_entry.is_used) { is_self_beamformer = true; - PHYDM_DBG(dm, DBG_TXBF, "[%s] BFee entry %d is_used=true\n", __func__, i); + PHYDM_DBG(dm, DBG_TXBF, + "[%s] BFee entry %d is_used=true\n", __func__, + i); break; } } @@ -1864,7 +1868,9 @@ phydm_beamforming_get_beam_cap( if (beamformer_entry.is_used) { is_self_beamformee = true; - PHYDM_DBG(dm, DBG_TXBF, "[%s]: BFer entry %d is_used=true\n", __func__, i); + PHYDM_DBG(dm, DBG_TXBF, + "[%s]: BFer entry %d is_used=true\n", + __func__, i); break; } } @@ -1877,23 +1883,22 @@ phydm_beamforming_get_beam_cap( return beamform_cap; } - boolean beamforming_control_v1( - void *dm_void, - u8 *RA, - u8 AID, - u8 mode, - enum channel_width BW, - u8 rate -) + void *dm_void, + u8 *RA, + u8 AID, + u8 mode, + enum channel_width BW, + u8 rate) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - boolean ret = true; + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean ret = true; PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); - PHYDM_DBG(dm, DBG_TXBF, "AID (%d), mode (%d), BW (%d)\n", AID, mode, BW); + PHYDM_DBG(dm, DBG_TXBF, "AID (%d), mode (%d), BW (%d)\n", AID, mode, + BW); switch (mode) { case 0: @@ -1917,22 +1922,22 @@ beamforming_control_v1( /*Only OID uses this function*/ boolean phydm_beamforming_control_v2( - void *dm_void, - u8 idx, - u8 mode, - enum channel_width BW, - u16 period -) + void *dm_void, + u8 idx, + u8 mode, + enum channel_width BW, + u16 period) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_BEAMFORMING_OID_INFO *beam_oid_info = &beam_info->beamforming_oid_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_BEAMFORMING_OID_INFO *beam_oid_info = &beam_info->beamforming_oid_info; PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); - PHYDM_DBG(dm, DBG_TXBF, "idx (%d), mode (%d), BW (%d), period (%d)\n", idx, mode, BW, period); + PHYDM_DBG(dm, DBG_TXBF, "idx (%d), mode (%d), BW (%d), period (%d)\n", + idx, mode, BW, period); beam_oid_info->sound_oid_idx = idx; - beam_oid_info->sound_oid_mode = (enum sounding_mode) mode; + beam_oid_info->sound_oid_mode = (enum sounding_mode)mode; beam_oid_info->sound_oid_bw = BW; beam_oid_info->sound_oid_period = period; @@ -1941,14 +1946,11 @@ phydm_beamforming_control_v2( return true; } - -void -phydm_beamforming_watchdog( - void *dm_void -) +void phydm_beamforming_watchdog( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); @@ -1959,29 +1961,29 @@ phydm_beamforming_watchdog( } enum beamforming_cap phydm_get_beamform_cap( - void *dm_void -) + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *sta = NULL; - struct bf_cmn_info *bf_info = NULL; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - void *adapter = dm->adapter; - enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE; - u8 macid; - u8 ht_curbeamformcap = 0; - u16 vht_curbeamformcap = 0; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta = NULL; + struct bf_cmn_info *bf_info = NULL; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + void *adapter = dm->adapter; + enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE; + u8 macid; + u8 ht_curbeamformcap = 0; + u16 vht_curbeamformcap = 0; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PMGNT_INFO p_MgntInfo = &(((PADAPTER)(adapter))->MgntInfo); - PRT_VERY_HIGH_THROUGHPUT p_vht_info = GET_VHT_INFO(p_MgntInfo); - PRT_HIGH_THROUGHPUT p_ht_info = GET_HT_INFO(p_MgntInfo); + PMGNT_INFO p_MgntInfo = &(((PADAPTER)(adapter))->MgntInfo); + PRT_VERY_HIGH_THROUGHPUT p_vht_info = GET_VHT_INFO(p_MgntInfo); + PRT_HIGH_THROUGHPUT p_ht_info = GET_HT_INFO(p_MgntInfo); ht_curbeamformcap = p_ht_info->HtCurBeamform; vht_curbeamformcap = p_vht_info->VhtCurBeamform; - PHYDM_DBG(dm, DBG_ANT_DIV, "[%s] WIN ht_curcap = %d ; vht_curcap = %d\n", __func__, ht_curbeamformcap, vht_curbeamformcap); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[%s] WIN ht_curcap = %d ; vht_curcap = %d\n", __func__, + ht_curbeamformcap, vht_curbeamformcap); if (TEST_FLAG(ht_curbeamformcap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) /*We are Beamformee because the STA is Beamformer*/ beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_HT_EXPLICIT | BEAMFORMEE_CAP)); @@ -1990,7 +1992,7 @@ phydm_get_beamform_cap( if (TEST_FLAG(ht_curbeamformcap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP)); - #if (ODM_IC_11AC_SERIES_SUPPORT == 1) +#if (ODM_IC_11AC_SERIES_SUPPORT == 1) /* We are Beamformee because the STA is SU Beamformer*/ if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) @@ -2003,11 +2005,10 @@ phydm_get_beamform_cap( /* We are Beamformee because the STA is MU Beamformer*/ if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_VHT_MU | BEAMFORMEE_CAP)); - #endif +#endif #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - - for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) { + for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) { sta = dm->phydm_sta_info[macid]; if (!is_sta_active(sta)) @@ -2015,7 +2016,7 @@ phydm_get_beamform_cap( bf_info = &sta->bf_info; vht_curbeamformcap = bf_info->vht_beamform_cap; - ht_curbeamformcap = bf_info->ht_beamform_cap; + ht_curbeamformcap = bf_info->ht_beamform_cap; if (TEST_FLAG(ht_curbeamformcap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) /*We are Beamformee because the STA is Beamformer*/ beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_HT_EXPLICIT | BEAMFORMEE_CAP)); @@ -2024,7 +2025,7 @@ phydm_get_beamform_cap( if (TEST_FLAG(ht_curbeamformcap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP)); - #if (ODM_IC_11AC_SERIES_SUPPORT == 1) +#if (ODM_IC_11AC_SERIES_SUPPORT == 1) /* We are Beamformee because the STA is SU Beamformer*/ if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP)); @@ -2036,14 +2037,14 @@ phydm_get_beamform_cap( /* We are Beamformee because the STA is MU Beamformer*/ if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_VHT_MU | BEAMFORMEE_CAP)); - #endif -} - PHYDM_DBG(dm, DBG_ANT_DIV, "[%s] CE ht_curcap = %d ; vht_curcap = %d\n", __func__, ht_curbeamformcap, vht_curbeamformcap); +#endif + } + PHYDM_DBG(dm, DBG_ANT_DIV, "[%s] CE ht_curcap = %d ; vht_curcap = %d\n", + __func__, ht_curbeamformcap, vht_curbeamformcap); #endif -return beamform_cap; - + return beamform_cap; } #endif diff --git a/hal/phydm/phydm_beamforming.h b/hal/phydm/phydm_beamforming.h index 9537a0a..26e54c0 100644 --- a/hal/phydm/phydm_beamforming.h +++ b/hal/phydm/phydm_beamforming.h @@ -26,11 +26,7 @@ #ifndef __INC_PHYDM_BEAMFORMING_H #define __INC_PHYDM_BEAMFORMING_H -#ifndef BEAMFORMING_SUPPORT - #define BEAMFORMING_SUPPORT 0 -#endif - -/*Beamforming Related*/ +/*@Beamforming Related*/ #include "txbf/halcomtxbf.h" #include "txbf/haltxbfjaguar.h" #include "txbf/haltxbf8192e.h" @@ -38,34 +34,34 @@ #include "txbf/haltxbf8822b.h" #include "txbf/haltxbfinterface.h" -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -#define eq_mac_addr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 ) -#define cp_mac_addr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5]) +#define eq_mac_addr(a, b) (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0) +#define cp_mac_addr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5]) #endif -#define MAX_BEAMFORMEE_SU 2 -#define MAX_BEAMFORMER_SU 2 +#define MAX_BEAMFORMEE_SU 2 +#define MAX_BEAMFORMER_SU 2 #if (RTL8822B_SUPPORT == 1) - #define MAX_BEAMFORMEE_MU 6 - #define MAX_BEAMFORMER_MU 1 +#define MAX_BEAMFORMEE_MU 6 +#define MAX_BEAMFORMER_MU 1 #else - #define MAX_BEAMFORMEE_MU 0 - #define MAX_BEAMFORMER_MU 0 +#define MAX_BEAMFORMEE_MU 0 +#define MAX_BEAMFORMER_MU 0 #endif -#define BEAMFORMEE_ENTRY_NUM (MAX_BEAMFORMEE_SU + MAX_BEAMFORMEE_MU) -#define BEAMFORMER_ENTRY_NUM (MAX_BEAMFORMER_SU + MAX_BEAMFORMER_MU) +#define BEAMFORMEE_ENTRY_NUM (MAX_BEAMFORMEE_SU + MAX_BEAMFORMEE_MU) +#define BEAMFORMER_ENTRY_NUM (MAX_BEAMFORMER_SU + MAX_BEAMFORMER_MU) #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - /*for different naming between WIN and CE*/ - #define BEACON_QUEUE BCN_QUEUE_INX - #define NORMAL_QUEUE MGT_QUEUE_INX - #define RT_DISABLE_FUNC RTW_DISABLE_FUNC - #define RT_ENABLE_FUNC RTW_ENABLE_FUNC +/*@for different naming between WIN and CE*/ +#define BEACON_QUEUE BCN_QUEUE_INX +#define NORMAL_QUEUE MGT_QUEUE_INX +#define RT_DISABLE_FUNC RTW_DISABLE_FUNC +#define RT_ENABLE_FUNC RTW_ENABLE_FUNC #endif enum beamforming_entry_state { @@ -76,7 +72,6 @@ enum beamforming_entry_state { BEAMFORMING_ENTRY_STATE_PROGRESSED }; - enum beamforming_notify_state { BEAMFORMING_NOTIFY_NONE, BEAMFORMING_NOTIFY_ADD, @@ -92,15 +87,14 @@ enum beamforming_cap { BEAMFORMING_CAP_NONE = 0x0, BEAMFORMER_CAP_HT_EXPLICIT = BIT(1), BEAMFORMEE_CAP_HT_EXPLICIT = BIT(2), - BEAMFORMER_CAP_VHT_SU = BIT(5), /* Self has er Cap, because Reg er & peer ee */ - BEAMFORMEE_CAP_VHT_SU = BIT(6), /* Self has ee Cap, because Reg ee & peer er */ - BEAMFORMER_CAP_VHT_MU = BIT(7), /* Self has er Cap, because Reg er & peer ee */ - BEAMFORMEE_CAP_VHT_MU = BIT(8), /* Self has ee Cap, because Reg ee & peer er */ + BEAMFORMER_CAP_VHT_SU = BIT(5), /* @Self has er Cap, because Reg er & peer ee */ + BEAMFORMEE_CAP_VHT_SU = BIT(6), /* @Self has ee Cap, because Reg ee & peer er */ + BEAMFORMER_CAP_VHT_MU = BIT(7), /* @Self has er Cap, because Reg er & peer ee */ + BEAMFORMEE_CAP_VHT_MU = BIT(8), /* @Self has ee Cap, because Reg ee & peer er */ BEAMFORMER_CAP = BIT(9), BEAMFORMEE_CAP = BIT(10), }; - enum sounding_mode { SOUNDING_SW_VHT_TIMER = 0x0, SOUNDING_SW_HT_TIMER = 0x1, @@ -115,138 +109,131 @@ enum sounding_mode { }; struct _RT_BEAMFORM_STAINFO { - u8 *ra; - u16 aid; - u16 mac_id; - u8 my_mac_addr[6]; + u8 *ra; + u16 aid; + u16 mac_id; + u8 my_mac_addr[6]; /*WIRELESS_MODE wireless_mode;*/ - enum channel_width bw; - enum beamforming_cap beamform_cap; - u8 ht_beamform_cap; - u16 vht_beamform_cap; - u8 cur_beamform; - u16 cur_beamform_vht; + enum channel_width bw; + enum beamforming_cap beamform_cap; + u8 ht_beamform_cap; + u16 vht_beamform_cap; + u8 cur_beamform; + u16 cur_beamform_vht; }; - struct _RT_BEAMFORMEE_ENTRY { boolean is_used; - boolean is_txbf; + boolean is_txbf; boolean is_sound; - u16 aid; /*Used to construct AID field of NDPA packet.*/ - u16 mac_id; /*Used to Set Reg42C in IBSS mode. */ - u16 p_aid; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ - u8 g_id; /*Used to fill Tx DESC*/ - u8 my_mac_addr[6]; - u8 mac_addr[6]; /*Used to fill Reg6E4 to fill Mac address of CSI report frame.*/ - enum channel_width sound_bw; /*Sounding band_width*/ - u16 sound_period; - enum beamforming_cap beamform_entry_cap; - enum beamforming_entry_state beamform_entry_state; - boolean is_beamforming_in_progress; - /*u8 log_seq; // Move to _RT_BEAMFORMER_ENTRY*/ - /*u16 log_retry_cnt:3; // 0~4 // Move to _RT_BEAMFORMER_ENTRY*/ - /*u16 LogSuccessCnt:2; // 0~2 // Move to _RT_BEAMFORMER_ENTRY*/ - u16 log_status_fail_cnt:5; /* 0~21 */ - u16 default_csi_cnt:5; /* 0~21 */ - u8 csi_matrix[327]; - u16 csi_matrix_len; - u8 num_of_sounding_dim; - u8 comp_steering_num_of_bfer; - u8 su_reg_index; - /*For MU-MIMO*/ - boolean is_mu_sta; - u8 mu_reg_index; - u8 gid_valid[8]; - u8 user_position[16]; + u16 aid; /*Used to construct AID field of NDPA packet.*/ + u16 mac_id; /*Used to Set Reg42C in IBSS mode. */ + u16 p_aid; /*@Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ + u8 g_id; /*Used to fill Tx DESC*/ + u8 my_mac_addr[6]; + u8 mac_addr[6]; /*@Used to fill Reg6E4 to fill Mac address of CSI report frame.*/ + enum channel_width sound_bw; /*Sounding band_width*/ + u16 sound_period; + enum beamforming_cap beamform_entry_cap; + enum beamforming_entry_state beamform_entry_state; + boolean is_beamforming_in_progress; + /*@u8 log_seq; // Move to _RT_BEAMFORMER_ENTRY*/ + /*@u16 log_retry_cnt:3; // 0~4 // Move to _RT_BEAMFORMER_ENTRY*/ + /*@u16 LogSuccessCnt:2; // 0~2 // Move to _RT_BEAMFORMER_ENTRY*/ + u16 log_status_fail_cnt : 5; /* @0~21 */ + u16 default_csi_cnt : 5; /* @0~21 */ + u8 csi_matrix[327]; + u16 csi_matrix_len; + u8 num_of_sounding_dim; + u8 comp_steering_num_of_bfer; + u8 su_reg_index; + /*@For MU-MIMO*/ + boolean is_mu_sta; + u8 mu_reg_index; + u8 gid_valid[8]; + u8 user_position[16]; }; struct _RT_BEAMFORMER_ENTRY { - boolean is_used; + boolean is_used; /*P_AID of BFer entry is probably not used*/ - u16 p_aid; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ - u8 g_id; - u8 my_mac_addr[6]; - u8 mac_addr[6]; - enum beamforming_cap beamform_entry_cap; - u8 num_of_sounding_dim; - u8 clock_reset_times; /*Modified by Jeffery @2015-04-10*/ - u8 pre_log_seq; /*Modified by Jeffery @2015-03-30*/ - u8 log_seq; /*Modified by Jeffery @2014-10-29*/ - u16 log_retry_cnt:3; /*Modified by Jeffery @2014-10-29*/ - u16 log_success:2; /*Modified by Jeffery @2014-10-29*/ - u8 su_reg_index; - /*For MU-MIMO*/ - boolean is_mu_ap; - u8 gid_valid[8]; - u8 user_position[16]; - u16 aid; + u16 p_aid; /*@Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ + u8 g_id; + u8 my_mac_addr[6]; + u8 mac_addr[6]; + enum beamforming_cap beamform_entry_cap; + u8 num_of_sounding_dim; + u8 clock_reset_times; /*@Modified by Jeffery @2015-04-10*/ + u8 pre_log_seq; /*@Modified by Jeffery @2015-03-30*/ + u8 log_seq; /*@Modified by Jeffery @2014-10-29*/ + u16 log_retry_cnt : 3; /*@Modified by Jeffery @2014-10-29*/ + u16 log_success : 2; /*@Modified by Jeffery @2014-10-29*/ + u8 su_reg_index; + /*@For MU-MIMO*/ + boolean is_mu_ap; + u8 gid_valid[8]; + u8 user_position[16]; + u16 aid; }; struct _RT_SOUNDING_INFO { - u8 sound_idx; - enum channel_width sound_bw; - enum sounding_mode sound_mode; - u16 sound_period; + u8 sound_idx; + enum channel_width sound_bw; + enum sounding_mode sound_mode; + u16 sound_period; }; - - struct _RT_BEAMFORMING_OID_INFO { - u8 sound_oid_idx; - enum channel_width sound_oid_bw; - enum sounding_mode sound_oid_mode; - u16 sound_oid_period; + u8 sound_oid_idx; + enum channel_width sound_oid_bw; + enum sounding_mode sound_oid_mode; + u16 sound_oid_period; }; - struct _RT_BEAMFORMING_INFO { - enum beamforming_cap beamform_cap; - struct _RT_BEAMFORMEE_ENTRY beamformee_entry[BEAMFORMEE_ENTRY_NUM]; - struct _RT_BEAMFORMER_ENTRY beamformer_entry[BEAMFORMER_ENTRY_NUM]; - struct _RT_BEAMFORM_STAINFO beamform_sta_info; - u8 beamformee_cur_idx; - struct phydm_timer_list beamforming_timer; - struct phydm_timer_list mu_timer; - struct _RT_SOUNDING_INFO sounding_info; - struct _RT_BEAMFORMING_OID_INFO beamforming_oid_info; - struct _HAL_TXBF_INFO txbf_info; - u8 sounding_sequence; - u8 beamformee_su_cnt; - u8 beamformer_su_cnt; - u32 beamformee_su_reg_maping; - u32 beamformer_su_reg_maping; - /*For MU-MINO*/ - u8 beamformee_mu_cnt; - u8 beamformer_mu_cnt; - u32 beamformee_mu_reg_maping; - u8 mu_ap_index; - boolean is_mu_sounding; - u8 first_mu_bfee_index; - boolean is_mu_sounding_in_progress; - boolean dbg_disable_mu_tx; - boolean apply_v_matrix; - boolean snding3ss; + enum beamforming_cap beamform_cap; + struct _RT_BEAMFORMEE_ENTRY beamformee_entry[BEAMFORMEE_ENTRY_NUM]; + struct _RT_BEAMFORMER_ENTRY beamformer_entry[BEAMFORMER_ENTRY_NUM]; + struct _RT_BEAMFORM_STAINFO beamform_sta_info; + u8 beamformee_cur_idx; + struct phydm_timer_list beamforming_timer; + struct phydm_timer_list mu_timer; + struct _RT_SOUNDING_INFO sounding_info; + struct _RT_BEAMFORMING_OID_INFO beamforming_oid_info; + struct _HAL_TXBF_INFO txbf_info; + u8 sounding_sequence; + u8 beamformee_su_cnt; + u8 beamformer_su_cnt; + u32 beamformee_su_reg_maping; + u32 beamformer_su_reg_maping; + /*@For MU-MINO*/ + u8 beamformee_mu_cnt; + u8 beamformer_mu_cnt; + u32 beamformee_mu_reg_maping; + u8 mu_ap_index; + boolean is_mu_sounding; + u8 first_mu_bfee_index; + boolean is_mu_sounding_in_progress; + boolean dbg_disable_mu_tx; + boolean apply_v_matrix; + boolean snding3ss; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *source_adapter; + void *source_adapter; #endif - /* Control register */ - u32 reg_mu_tx_ctrl; /* For USB/SDIO interfaces aync I/O */ - u8 tx_bf_data_rate; - u8 last_usb_hub; + /* @Control register */ + u32 reg_mu_tx_ctrl; /* @For USB/SDIO interfaces aync I/O */ + u8 tx_bf_data_rate; + u8 last_usb_hub; }; - -void -phydm_get_txbf_device_num( - void *dm_void, - u8 macid -); +void phydm_get_txbf_device_num( + void *dm_void, + u8 macid); struct _RT_NDPA_STA_INFO { - u16 aid:12; - u16 feedback_type:1; - u16 nc_index:3; + u16 aid : 12; + u16 feedback_type : 1; + u16 nc_index : 3; }; enum phydm_acting_type { @@ -254,158 +241,123 @@ enum phydm_acting_type { phydm_acting_as_ap = 1 }; - enum beamforming_cap phydm_beamforming_get_entry_beam_cap_by_mac_id( - void *dm_void, - u8 mac_id -); + void *dm_void, + u8 mac_id); struct _RT_BEAMFORMEE_ENTRY * phydm_beamforming_get_bfee_entry_by_addr( - void *dm_void, - u8 *RA, - u8 *idx -); + void *dm_void, + u8 *RA, + u8 *idx); struct _RT_BEAMFORMER_ENTRY * phydm_beamforming_get_bfer_entry_by_addr( - void *dm_void, - u8 *TA, - u8 *idx -); + void *dm_void, + u8 *TA, + u8 *idx); -void -phydm_beamforming_notify( - void *dm_void -); +void phydm_beamforming_notify( + void *dm_void); boolean phydm_acting_determine( - void *dm_void, - enum phydm_acting_type type -); + void *dm_void, + enum phydm_acting_type type); -void -beamforming_enter( - void *dm_void, - u16 sta_idx -); +void beamforming_enter(void *dm_void, u16 sta_idx, u8 *my_mac_addr); -void -beamforming_leave( - void *dm_void, - u8 *RA -); +void beamforming_leave( + void *dm_void, + u8 *RA); boolean beamforming_start_fw( - void *dm_void, - u8 idx -); + void *dm_void, + u8 idx); -void -beamforming_check_sounding_success( - void *dm_void, - boolean status -); +void beamforming_check_sounding_success( + void *dm_void, + boolean status); -void -phydm_beamforming_end_sw( - void *dm_void, - boolean status -); - -void -beamforming_timer_callback( - void *dm_void -); - -void -phydm_beamforming_init( - void *dm_void -); +void phydm_beamforming_end_sw( + void *dm_void, + boolean status); +void beamforming_timer_callback( + void *dm_void); +void phydm_beamforming_init( + void *dm_void); enum beamforming_cap phydm_beamforming_get_beam_cap( - void *dm_void, - struct _RT_BEAMFORMING_INFO *beam_info -); + void *dm_void, + struct _RT_BEAMFORMING_INFO *beam_info); enum beamforming_cap phydm_get_beamform_cap( - void *dm_void -); + void *dm_void); boolean beamforming_control_v1( - void *dm_void, - u8 *RA, - u8 AID, - u8 mode, - enum channel_width BW, - u8 rate -); - + void *dm_void, + u8 *RA, + u8 AID, + u8 mode, + enum channel_width BW, + u8 rate); boolean phydm_beamforming_control_v2( - void *dm_void, - u8 idx, - u8 mode, - enum channel_width BW, - u16 period -); + void *dm_void, + u8 idx, + u8 mode, + enum channel_width BW, + u16 period); -void -phydm_beamforming_watchdog( - void *dm_void -); +void phydm_beamforming_watchdog( + void *dm_void); -void -beamforming_sw_timer_callback( +void beamforming_sw_timer_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct phydm_timer_list *timer + struct phydm_timer_list *timer #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) void *function_context #endif -); + ); boolean beamforming_send_ht_ndpa_packet( - void *dm_void, - u8 *RA, - enum channel_width BW, - u8 q_idx -); - + void *dm_void, + u8 *RA, + enum channel_width BW, + u8 q_idx); boolean beamforming_send_vht_ndpa_packet( - void *dm_void, - u8 *RA, - u16 AID, - enum channel_width BW, - u8 q_idx -); + void *dm_void, + u8 *RA, + u16 AID, + enum channel_width BW, + u8 q_idx); #else +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP)) #define beamforming_gid_paid(adapter, tcb) -#define phydm_acting_determine(dm, type) false -#define beamforming_enter(dm, sta_idx) +#define phydm_acting_determine(dm, type) false +#define beamforming_enter(dm, sta_idx, my_mac_addr) #define beamforming_leave(dm, RA) #define beamforming_end_fw(dm) -#define beamforming_control_v1(dm, RA, AID, mode, BW, rate) true -#define beamforming_control_v2(dm, idx, mode, BW, period) true +#define beamforming_control_v1(dm, RA, AID, mode, BW, rate) true +#define beamforming_control_v2(dm, idx, mode, BW, period) true #define phydm_beamforming_end_sw(dm, _status) #define beamforming_timer_callback(dm) #define phydm_beamforming_init(dm) -#define phydm_beamforming_control_v2(dm, _idx, _mode, _BW, _period) false +#define phydm_beamforming_control_v2(dm, _idx, _mode, _BW, _period) false #define beamforming_watchdog(dm) #define phydm_beamforming_watchdog(dm) - - -#endif +#endif /*@(DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))*/ +#endif /*@#ifdef PHYDM_BEAMFORMING_SUPPORT*/ #endif diff --git a/hal/phydm/phydm_cck_pd.c b/hal/phydm/phydm_cck_pd.c index 87b41da..8f5229a 100644 --- a/hal/phydm/phydm_cck_pd.c +++ b/hal/phydm/phydm_cck_pd.c @@ -23,449 +23,1064 @@ * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" - + #ifdef PHYDM_SUPPORT_CCKPD - -void -phydm_write_cck_cca_th_new_cs_ratio( - void *dm_void, - u8 cca_th, - u8 cca_th_aaa -) +#ifdef PHYDM_COMPILE_CCKPD_TYPE1 +void phydm_write_cck_pd_type1(void *dm_void, u8 cca_th) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; - PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); - PHYDM_DBG(dm, DBG_CCKPD, "[New] pd_th=0x%x, cs_ratio=0x%x\n\n", cca_th, cca_th_aaa); + PHYDM_DBG(dm, DBG_CCKPD, "[%s] cck_cca_th=((0x%x))\n", + __func__, cca_th); - if (cckpd_t->cur_cck_cca_thres != cca_th) { - - cckpd_t->cur_cck_cca_thres = cca_th; - odm_set_bb_reg(dm, 0xa08, 0xf0000, cca_th); - cckpd_t->cck_fa_ma = CCK_FA_MA_RESET; - - } - - if (cckpd_t->cck_cca_th_aaa != cca_th_aaa) { - - cckpd_t->cck_cca_th_aaa = cca_th_aaa; - odm_set_bb_reg(dm, 0xaa8, 0x1f0000, cca_th_aaa); - cckpd_t->cck_fa_ma = CCK_FA_MA_RESET; - } - -} - -void -phydm_write_cck_cca_th( - void *dm_void, - u8 cca_th -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; - - PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); - PHYDM_DBG(dm, DBG_CCKPD, "New cck_cca_th=((0x%x))\n\n", cca_th); - - if (cckpd_t->cur_cck_cca_thres != cca_th) { - - odm_write_1byte(dm, ODM_REG(CCK_CCA, dm), cca_th); - cckpd_t->cck_fa_ma = CCK_FA_MA_RESET; - } + odm_write_1byte(dm, R_0xa0a, cca_th); cckpd_t->cur_cck_cca_thres = cca_th; } -void -phydm_set_cckpd_val( - void *dm_void, - u32 *val_buf, - u8 val_len -) +void phydm_set_cckpd_lv_type1(void *dm_void, enum cckpd_lv lv) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + u8 pd_th = 0; + PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); + PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv); - if (val_len != 2) { - PHYDM_DBG(dm, ODM_COMP_API, "[Error][CCKPD]Need val_len=2\n"); + if (cckpd_t->cck_pd_lv == lv) { + PHYDM_DBG(dm, DBG_CCKPD, "stay in lv=%d\n", lv); return; } - - /*val_buf[0]: 0xa0a*/ - /*val_buf[1]: 0xaaa*/ - - if (dm->support_ic_type & EXTEND_CCK_CCATH_AAA_IC) { - phydm_write_cck_cca_th_new_cs_ratio(dm, (u8)val_buf[0], (u8)val_buf[1]); - } else { - phydm_write_cck_cca_th(dm, (u8)val_buf[0]); - } + cckpd_t->cck_pd_lv = lv; + cckpd_t->cck_fa_ma = CCK_FA_MA_RESET; + + if (lv == CCK_PD_LV_4) + pd_th = 0xed; + else if (lv == CCK_PD_LV_3) + pd_th = 0xdd; + else if (lv == CCK_PD_LV_2) + pd_th = 0xcd; + else if (lv == CCK_PD_LV_1) + pd_th = 0x83; + else if (lv == CCK_PD_LV_0) + pd_th = 0x40; + + phydm_write_cck_pd_type1(dm, pd_th); } -boolean -phydm_stop_cck_pd_th( - void *dm_void -) +void phydm_cckpd_type1(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - - if (!(dm->support_ability & (ODM_BB_CCK_PD | ODM_BB_FA_CNT))) { - - PHYDM_DBG(dm, DBG_CCKPD, "Not Support\n"); - - #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - #ifdef MCR_WIRELESS_EXTEND - phydm_write_cck_cca_th(dm, 0x43); - #endif - #endif - - return true; - } - - if (dm->pause_ability & ODM_BB_CCK_PD) { - - PHYDM_DBG(dm, DBG_CCKPD, "Return: Pause CCKPD in LV=%d\n", dm->pause_lv_table.lv_cckpd); - return true; - } - - #if 0/*(DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))*/ - if (dm->ext_lna) - return true; - #endif - - return false; - -} - -void -phydm_cckpd( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; - u8 cur_cck_cca_th= cckpd_t->cur_cck_cca_thres; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + enum cckpd_lv lv = CCK_PD_LV_INIT; + boolean is_update = true; if (dm->is_linked) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - - /*Add hp_hw_id condition due to 22B LPS power consumption issue and [PCIE-1596]*/ - if (dm->hp_hw_id && (dm->traffic_load == TRAFFIC_ULTRA_LOW)) - cur_cck_cca_th = 0x40; - else if (dm->rssi_min > 35) - cur_cck_cca_th = 0xcd; - else if (dm->rssi_min > 20) { - + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + if (dm->rssi_min > 60) { + lv = CCK_PD_LV_3; + } else if (dm->rssi_min > 35) { + lv = CCK_PD_LV_2; + } else if (dm->rssi_min > 20) { if (cckpd_t->cck_fa_ma > 500) - cur_cck_cca_th = 0xcd; + lv = CCK_PD_LV_2; else if (cckpd_t->cck_fa_ma < 250) - cur_cck_cca_th = 0x83; - - } else { - if((dm->p_advance_ota & PHYDM_ASUS_OTA_SETTING) && (cckpd_t->cck_fa_ma > 200)) - cur_cck_cca_th = 0xc3; /*for ASUS OTA test*/ + lv = CCK_PD_LV_1; else - cur_cck_cca_th = 0x83; + is_update = false; + } else { /*RSSI < 20*/ + lv = CCK_PD_LV_1; } - -#else /*ODM_AP*/ + #else /*ODM_AP*/ if (dig_t->cur_ig_value > 0x32) - cur_cck_cca_th = 0xed; + lv = CCK_PD_LV_4; else if (dig_t->cur_ig_value > 0x2a) - cur_cck_cca_th = 0xdd; + lv = CCK_PD_LV_3; else if (dig_t->cur_ig_value > 0x24) - cur_cck_cca_th = 0xcd; - else - cur_cck_cca_th = 0x83; - -#endif + lv = CCK_PD_LV_2; + else + lv = CCK_PD_LV_1; + #endif } else { - if (cckpd_t->cck_fa_ma > 1000) - cur_cck_cca_th = 0x83; + lv = CCK_PD_LV_1; else if (cckpd_t->cck_fa_ma < 500) - cur_cck_cca_th = 0x40; + lv = CCK_PD_LV_0; + else + is_update = false; } - phydm_write_cck_cca_th(dm, cur_cck_cca_th); - /*PHYDM_DBG(dm, DBG_CCKPD, "New cck_cca_th=((0x%x))\n\n", cur_cck_cca_th);*/ + /*[Abnormal case] =================================================*/ + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + /*@HP 22B LPS power consumption issue & [PCIE-1596]*/ + if (dm->hp_hw_id && dm->traffic_load == TRAFFIC_ULTRA_LOW) { + lv = CCK_PD_LV_0; + PHYDM_DBG(dm, DBG_CCKPD, "CCKPD Abnormal case1\n"); + } else if ((dm->p_advance_ota & PHYDM_ASUS_OTA_SETTING) && + cckpd_t->cck_fa_ma > 200 && dm->rssi_min <= 20) { + lv = CCK_PD_LV_1; + cckpd_t->cck_pd_lv = lv; + phydm_write_cck_pd_type1(dm, 0xc3); /*@for ASUS OTA test*/ + is_update = false; + PHYDM_DBG(dm, DBG_CCKPD, "CCKPD Abnormal case2\n"); + } + #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) + #ifdef MCR_WIRELESS_EXTEND + lv = CCK_PD_LV_2; + cckpd_t->cck_pd_lv = lv; + phydm_write_cck_pd_type1(dm, 0x43); + is_update = false; + PHYDM_DBG(dm, DBG_CCKPD, "CCKPD Abnormal case3\n"); + #endif + #endif + /*=================================================================*/ + if (is_update) + phydm_set_cckpd_lv_type1(dm, lv); + + PHYDM_DBG(dm, DBG_CCKPD, "is_linked=%d, lv=%d, pd_th=0x%x\n\n", + dm->is_linked, cckpd_t->cck_pd_lv, + cckpd_t->cur_cck_cca_thres); +} +#endif /*#ifdef PHYDM_COMPILE_CCKPD_TYPE1*/ + +#ifdef PHYDM_COMPILE_CCKPD_TYPE2 +void phydm_write_cck_pd_type2(void *dm_void, u8 cca_th, u8 cca_th_aaa) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + + PHYDM_DBG(dm, DBG_CCKPD, "[%s] pd_th=0x%x, cs_ratio=0x%x\n", + __func__, cca_th, cca_th_aaa); + + odm_set_bb_reg(dm, R_0xa08, 0x3f0000, cca_th); + odm_set_bb_reg(dm, R_0xaa8, 0x1f0000, cca_th_aaa); + cckpd_t->cur_cck_cca_thres = cca_th; + cckpd_t->cck_cca_th_aaa = cca_th_aaa; } -void -phydm_cckpd_new_cs_ratio( - void *dm_void -) +void phydm_set_cckpd_lv_type2(void *dm_void, enum cckpd_lv lv) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; - u8 pd_th = 0, cs_ration = 0, cs_2r_offset = 0; - u8 igi_curr = dig_t->cur_ig_value; - u8 en_2rcca; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + u8 pd_th = 0, cs_ratio = 0, cs_2r_offset = 0; + u8 cck_n_rx = 1; + + PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); + PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv); + + /*@r_mrx & r_cca_mrc*/ + cck_n_rx = (odm_get_bb_reg(dm, R_0xa2c, BIT(18)) && + odm_get_bb_reg(dm, R_0xa2c, BIT(22))) ? 2 : 1; + + if (cckpd_t->cck_pd_lv == lv && cckpd_t->cck_n_rx == cck_n_rx) { + PHYDM_DBG(dm, DBG_CCKPD, "stay in lv=%d\n", lv); + return; + } + + cckpd_t->cck_n_rx = cck_n_rx; + cckpd_t->cck_pd_lv = lv; + cckpd_t->cck_fa_ma = CCK_FA_MA_RESET; + + if (lv == CCK_PD_LV_4) { + cs_ratio = cckpd_t->aaa_default + 8; + cs_2r_offset = 5; + pd_th = 0xd; + } else if (lv == CCK_PD_LV_3) { + cs_ratio = cckpd_t->aaa_default + 6; + cs_2r_offset = 4; + pd_th = 0xd; + } else if (lv == CCK_PD_LV_2) { + cs_ratio = cckpd_t->aaa_default + 4; + cs_2r_offset = 3; + pd_th = 0xd; + } else if (lv == CCK_PD_LV_1) { + cs_ratio = cckpd_t->aaa_default + 2; + cs_2r_offset = 1; + pd_th = 0x7; + } else if (lv == CCK_PD_LV_0) { + cs_ratio = cckpd_t->aaa_default; + cs_2r_offset = 0; + pd_th = 0x3; + } + + if (cckpd_t->cck_n_rx == 2) { + if (cs_ratio >= cs_2r_offset) + cs_ratio = cs_ratio - cs_2r_offset; + else + cs_ratio = 0; + } + phydm_write_cck_pd_type2(dm, pd_th, cs_ratio); +} + +void phydm_cckpd_type2(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + enum cckpd_lv lv = CCK_PD_LV_INIT; + u8 igi = dig_t->cur_ig_value; + u8 rssi_min = dm->rssi_min; boolean is_update = true; PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); - en_2rcca = (u8)(odm_get_bb_reg(dm, 0xa2c, BIT(18)) && odm_get_bb_reg(dm, 0xa2c, BIT(22))); - if (dm->is_linked) { - - if ((igi_curr > 0x38) && (dm->rssi_min > 32)) { - cs_ration = dig_t->aaa_default + AAA_BASE + AAA_STEP * 2; - cs_2r_offset = 5; - pd_th = 0xd; - } else if ((igi_curr > 0x2a) && (dm->rssi_min > 32)) { - cs_ration = dig_t->aaa_default + AAA_BASE + AAA_STEP; - cs_2r_offset = 4; - pd_th = 0xd; - } else if ((igi_curr > 0x24) || (dm->rssi_min > 24 && dm->rssi_min <= 30)) { - cs_ration = dig_t->aaa_default + AAA_BASE; - cs_2r_offset = 3; - pd_th = 0xd; - } else if ((igi_curr <= 0x24) || (dm->rssi_min < 22)) { - + if (igi > 0x38 && rssi_min > 32) { + lv = CCK_PD_LV_4; + } else if (igi > 0x2a && rssi_min > 32) { + lv = CCK_PD_LV_3; + } else if (igi > 0x24 || (rssi_min > 24 && rssi_min <= 30)) { + lv = CCK_PD_LV_2; + } else if (igi <= 0x24 || rssi_min < 22) { if (cckpd_t->cck_fa_ma > 1000) { - cs_ration = dig_t->aaa_default + AAA_STEP; - cs_2r_offset = 1; - pd_th = 0x7; + lv = CCK_PD_LV_1; } else if (cckpd_t->cck_fa_ma < 500) { - cs_ration = dig_t->aaa_default; - pd_th = 0x3; + lv = CCK_PD_LV_0; } else { is_update = false; - cs_ration = cckpd_t->cck_cca_th_aaa; - pd_th = cckpd_t->cur_cck_cca_thres; + } + } else { + is_update = false; + } + } else { + if (cckpd_t->cck_fa_ma > 1000) { + lv = CCK_PD_LV_1; + } else if (cckpd_t->cck_fa_ma < 500) { + lv = CCK_PD_LV_0; + } else { + is_update = false; + } + } + + /*[Abnormal case] =================================================*/ + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + /*@21C Miracast lag issue & [PCIE-3298]*/ + if (dm->support_ic_type & ODM_RTL8821C && rssi_min > 60) { + lv = CCK_PD_LV_4; + cckpd_t->cck_pd_lv = lv; + phydm_write_cck_pd_type2(dm, 0x1d, (cckpd_t->aaa_default + 8)); + is_update = false; + PHYDM_DBG(dm, DBG_CCKPD, "CCKPD Abnormal case1\n"); + } + #endif + /*=================================================================*/ + + if (is_update) { + phydm_set_cckpd_lv_type2(dm, lv); + } + + PHYDM_DBG(dm, DBG_CCKPD, + "is_linked=%d, lv=%d, n_rx=%d, cs_ratio=0x%x, pd_th=0x%x\n\n", + dm->is_linked, cckpd_t->cck_pd_lv, cckpd_t->cck_n_rx, + cckpd_t->cck_cca_th_aaa, cckpd_t->cur_cck_cca_thres); +} +#endif /*#ifdef PHYDM_COMPILE_CCKPD_TYPE2*/ + +#ifdef PHYDM_COMPILE_CCKPD_TYPE3 +void phydm_write_cck_pd_type3(void *dm_void, u8 pd_th, u8 cs_ratio, + enum cckpd_mode mode) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + + PHYDM_DBG(dm, DBG_CCKPD, + "[%s] mode=%d, pd_th=0x%x, cs_ratio=0x%x\n", __func__, + mode, pd_th, cs_ratio); + + switch (mode) { + case CCK_BW20_1R: /*RFBW20_1R*/ + { + cckpd_t->cur_cck_pd_20m_1r = pd_th; + cckpd_t->cur_cck_cs_ratio_20m_1r = cs_ratio; + odm_set_bb_reg(dm, R_0xac8, 0xff, pd_th); + odm_set_bb_reg(dm, R_0xad0, 0x1f, cs_ratio); + } break; + case CCK_BW20_2R: /*RFBW20_2R*/ + { + cckpd_t->cur_cck_pd_20m_2r = pd_th; + cckpd_t->cur_cck_cs_ratio_20m_2r = cs_ratio; + odm_set_bb_reg(dm, R_0xac8, 0xff00, pd_th); + odm_set_bb_reg(dm, R_0xad0, 0x3e0, cs_ratio); + } break; + case CCK_BW40_1R: /*RFBW40_1R*/ + { + cckpd_t->cur_cck_pd_40m_1r = pd_th; + cckpd_t->cur_cck_cs_ratio_40m_1r = cs_ratio; + odm_set_bb_reg(dm, R_0xacc, 0xff, pd_th); + odm_set_bb_reg(dm, R_0xad0, 0x1f00000, cs_ratio); + } break; + case CCK_BW40_2R: /*RFBW40_2R*/ + { + cckpd_t->cur_cck_pd_40m_2r = pd_th; + cckpd_t->cur_cck_cs_ratio_40m_2r = cs_ratio; + odm_set_bb_reg(dm, R_0xacc, 0xff00, pd_th); + odm_set_bb_reg(dm, R_0xad0, 0x3e000000, cs_ratio); + } break; + + default: + /*@pr_debug("[%s] warning!\n", __func__);*/ + break; + } +} + +void phydm_set_cckpd_lv_type3(void *dm_void, enum cckpd_lv lv) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + enum cckpd_mode cck_mode = CCK_BW20_2R; + enum channel_width cck_bw = CHANNEL_WIDTH_20; + u8 cck_n_rx = 1; + u8 pd_th; + u8 cs_ratio; + + PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); + PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv); + + /*[Check Nrx]*/ + cck_n_rx = (odm_get_bb_reg(dm, R_0xa2c, BIT(17))) ? 2 : 1; + + /*[Check BW]*/ + if (odm_get_bb_reg(dm, R_0x800, BIT(0))) + cck_bw = CHANNEL_WIDTH_40; + else + cck_bw = CHANNEL_WIDTH_20; + + /*[Check LV]*/ + if (cckpd_t->cck_pd_lv == lv && + cckpd_t->cck_n_rx == cck_n_rx && + cckpd_t->cck_bw == cck_bw) { + PHYDM_DBG(dm, DBG_CCKPD, "stay in lv=%d\n", lv); + return; + } + + cckpd_t->cck_bw = cck_bw; + cckpd_t->cck_n_rx = cck_n_rx; + cckpd_t->cck_pd_lv = lv; + cckpd_t->cck_fa_ma = CCK_FA_MA_RESET; + + if (cck_n_rx == 2) { + if (cck_bw == CHANNEL_WIDTH_20) { + pd_th = cckpd_t->cck_pd_20m_2r; + cs_ratio = cckpd_t->cck_cs_ratio_20m_2r; + cck_mode = CCK_BW20_2R; + } else { + pd_th = cckpd_t->cck_pd_40m_2r; + cs_ratio = cckpd_t->cck_cs_ratio_40m_2r; + cck_mode = CCK_BW40_2R; + } + } else { + if (cck_bw == CHANNEL_WIDTH_20) { + pd_th = cckpd_t->cck_pd_20m_1r; + cs_ratio = cckpd_t->cck_cs_ratio_20m_1r; + cck_mode = CCK_BW20_1R; + } else { + pd_th = cckpd_t->cck_pd_40m_1r; + cs_ratio = cckpd_t->cck_cs_ratio_40m_1r; + cck_mode = CCK_BW40_1R; + } + } + + if (lv == CCK_PD_LV_4) { + if (cck_n_rx == 2) { + pd_th += 4; + cs_ratio += 2; + } else { + pd_th += 4; + cs_ratio += 3; + } + } else if (lv == CCK_PD_LV_3) { + if (cck_n_rx == 2) { + pd_th += 3; + cs_ratio += 1; + } else { + pd_th += 3; + cs_ratio += 2; + } + } else if (lv == CCK_PD_LV_2) { + pd_th += 2; + cs_ratio += 1; + } else if (lv == CCK_PD_LV_1) { + pd_th += 1; + cs_ratio += 1; + } + #if 0 + else if (lv == CCK_PD_LV_0) { + pd_th += 0; + cs_ratio += 0; + } + #endif + + phydm_write_cck_pd_type3(dm, pd_th, cs_ratio, cck_mode); +} + +void phydm_cckpd_type3(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + enum cckpd_lv lv = CCK_PD_LV_INIT; + u8 igi = dm->dm_dig_table.cur_ig_value; + boolean is_update = true; + u8 pd_th = 0; + u8 cs_ratio = 0; + + PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); + + if (dm->is_linked) { + if (igi > 0x38 && dm->rssi_min > 32) { + lv = CCK_PD_LV_4; + } else if ((igi > 0x2a) && (dm->rssi_min > 32)) { + lv = CCK_PD_LV_3; + } else if ((igi > 0x24) || + (dm->rssi_min > 24 && dm->rssi_min <= 30)) { + lv = CCK_PD_LV_2; + } else if ((igi <= 0x24) || (dm->rssi_min < 22)) { + if (cckpd_t->cck_fa_ma > 1000) + lv = CCK_PD_LV_1; + else if (cckpd_t->cck_fa_ma < 500) + lv = CCK_PD_LV_0; + else + is_update = false; + } + } else { + if (cckpd_t->cck_fa_ma > 1000) + lv = CCK_PD_LV_1; + else if (cckpd_t->cck_fa_ma < 500) + lv = CCK_PD_LV_0; + else + is_update = false; + } + + if (is_update) + phydm_set_cckpd_lv_type3(dm, lv); + + if (cckpd_t->cck_n_rx == 2) { + if (cckpd_t->cck_bw == CHANNEL_WIDTH_20) { + pd_th = cckpd_t->cur_cck_pd_20m_2r; + cs_ratio = cckpd_t->cur_cck_cs_ratio_20m_2r; + } else { + pd_th = cckpd_t->cur_cck_pd_40m_2r; + cs_ratio = cckpd_t->cur_cck_cs_ratio_40m_2r; + } + } else { + if (cckpd_t->cck_bw == CHANNEL_WIDTH_20) { + pd_th = cckpd_t->cur_cck_pd_20m_1r; + cs_ratio = cckpd_t->cur_cck_cs_ratio_20m_1r; + } else { + pd_th = cckpd_t->cur_cck_pd_40m_1r; + cs_ratio = cckpd_t->cur_cck_cs_ratio_40m_1r; + } + } + PHYDM_DBG(dm, DBG_CCKPD, + "[%dR][%dM] is_linked=%d, lv=%d, cs_ratio=0x%x, pd_th=0x%x\n\n", + cckpd_t->cck_n_rx, 20 << cckpd_t->cck_bw, dm->is_linked, + cckpd_t->cck_pd_lv, cs_ratio, pd_th); +} + +void phydm_cck_pd_init_type3(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + u32 reg_tmp = 0; + + /*Get Default value*/ + cckpd_t->cck_pd_20m_1r = (u8)odm_get_bb_reg(dm, R_0xac8, 0xff); + cckpd_t->cck_pd_20m_2r = (u8)odm_get_bb_reg(dm, R_0xac8, 0xff00); + cckpd_t->cck_pd_40m_1r = (u8)odm_get_bb_reg(dm, R_0xacc, 0xff); + cckpd_t->cck_pd_40m_2r = (u8)odm_get_bb_reg(dm, R_0xacc, 0xff00); + + reg_tmp = odm_get_bb_reg(dm, R_0xad0, MASKDWORD); + cckpd_t->cck_cs_ratio_20m_1r = (u8)(reg_tmp & 0x1f); + cckpd_t->cck_cs_ratio_20m_2r = (u8)((reg_tmp & 0x3e0) >> 5); + cckpd_t->cck_cs_ratio_40m_1r = (u8)((reg_tmp & 0x1f00000) >> 20); + cckpd_t->cck_cs_ratio_40m_2r = (u8)((reg_tmp & 0x3e000000) >> 25); + + phydm_set_cckpd_lv_type3(dm, CCK_PD_LV_0); +} +#endif /*#ifdef PHYDM_COMPILE_CCKPD_TYPE3*/ + +#ifdef PHYDM_COMPILE_CCKPD_TYPE4 +void phydm_write_cck_pd_type4(void *dm_void, enum cckpd_lv lv, + enum cckpd_mode mode) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + u32 val = 0; + + PHYDM_DBG(dm, DBG_CCKPD, "write CCK CCA parameters(CS_ratio & PD)\n"); + switch (mode) { + case CCK_BW20_1R: /*RFBW20_1R*/ + { + val = cckpd_t->cck_pd_table_jgr3[0][0][0][lv]; + odm_set_bb_reg(dm, R_0x1ac8, 0xff, val); + val = cckpd_t->cck_pd_table_jgr3[0][0][1][lv]; + odm_set_bb_reg(dm, R_0x1ad0, 0x1f, val); + } break; + case CCK_BW40_1R: /*RFBW40_1R*/ + { + val = cckpd_t->cck_pd_table_jgr3[1][0][0][lv]; + odm_set_bb_reg(dm, R_0x1acc, 0xff, val); + val = cckpd_t->cck_pd_table_jgr3[1][0][1][lv]; + odm_set_bb_reg(dm, R_0x1ad0, 0x01F00000, val); + } break; + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + case CCK_BW20_2R: /*RFBW20_2R*/ + { + val = cckpd_t->cck_pd_table_jgr3[0][1][0][lv]; + odm_set_bb_reg(dm, R_0x1ac8, 0xff00, val); + val = cckpd_t->cck_pd_table_jgr3[0][1][1][lv]; + odm_set_bb_reg(dm, R_0x1ad0, 0x3e0, val); + } break; + case CCK_BW40_2R: /*RFBW40_2R*/ + { + val = cckpd_t->cck_pd_table_jgr3[1][1][0][lv]; + odm_set_bb_reg(dm, R_0x1acc, 0xff00, val); + val = cckpd_t->cck_pd_table_jgr3[1][1][1][lv]; + odm_set_bb_reg(dm, R_0x1ad0, 0x3E000000, val); + } break; + #endif + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + case CCK_BW20_3R: /*RFBW20_3R*/ + { + val = cckpd_t->cck_pd_table_jgr3[0][2][0][lv]; + odm_set_bb_reg(dm, R_0x1ac8, 0xff0000, val); + val = cckpd_t->cck_pd_table_jgr3[0][2][1][lv]; + odm_set_bb_reg(dm, R_0x1ad0, 0x7c00, val); + } break; + case CCK_BW40_3R: /*RFBW40_3R*/ + { + val = cckpd_t->cck_pd_table_jgr3[1][2][0][lv]; + odm_set_bb_reg(dm, R_0x1acc, 0xff0000, val); + val = cckpd_t->cck_pd_table_jgr3[1][2][1][lv] & 0x3; + odm_set_bb_reg(dm, R_0x1ad0, 0xC0000000, val); + val = (cckpd_t->cck_pd_table_jgr3[1][2][1][lv] & 0x1c) >> 2; + odm_set_bb_reg(dm, R_0x1ad4, 0x7, val); + } break; + #endif + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + case CCK_BW20_4R: /*RFBW20_4R*/ + { + val = cckpd_t->cck_pd_table_jgr3[0][3][0][lv]; + odm_set_bb_reg(dm, R_0x1ac8, 0xff000000, val); + val = cckpd_t->cck_pd_table_jgr3[0][3][1][lv]; + odm_set_bb_reg(dm, R_0x1ad0, 0xF8000, val); + } break; + case CCK_BW40_4R: /*RFBW40_4R*/ + { + val = cckpd_t->cck_pd_table_jgr3[1][3][0][lv]; + odm_set_bb_reg(dm, R_0x1acc, 0xff000000, val); + val = cckpd_t->cck_pd_table_jgr3[1][3][1][lv]; + odm_set_bb_reg(dm, R_0x1ad4, 0xf8, val); + } break; + #endif + default: + /*@pr_debug("[%s] warning!\n", __func__);*/ + break; + } +} + +void phydm_set_cck_pd_lv_type4(void *dm_void, enum cckpd_lv lv) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + enum cckpd_mode cck_mode = CCK_BW20_2R; + enum channel_width cck_bw = CHANNEL_WIDTH_20; + u8 cck_n_rx = 0; + u32 val = 0; + /*u32 val_dbg = 0;*/ + + PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); + PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv); + + /*[Check Nrx]*/ + cck_n_rx = (u8)odm_get_bb_reg(dm, R_0x1a2c, 0x60000) + 1; + + /*[Check BW]*/ + val = odm_get_bb_reg(dm, R_0x9b0, 0xc); + if (val == 0) + cck_bw = CHANNEL_WIDTH_20; + else if (val == 1) + cck_bw = CHANNEL_WIDTH_40; + else + cck_bw = CHANNEL_WIDTH_80; + + /*[Check LV]*/ + if (cckpd_t->cck_pd_lv == lv && + cckpd_t->cck_n_rx == cck_n_rx && + cckpd_t->cck_bw == cck_bw) { + PHYDM_DBG(dm, DBG_CCKPD, "stay in lv=%d\n", lv); + return; + } + + cckpd_t->cck_bw = cck_bw; + cckpd_t->cck_n_rx = cck_n_rx; + cckpd_t->cck_pd_lv = lv; + cckpd_t->cck_fa_ma = CCK_FA_MA_RESET; + + switch (cck_n_rx) { + case 1: /*1R*/ + { + if (cck_bw == CHANNEL_WIDTH_20) + cck_mode = CCK_BW20_1R; + else if (cck_bw == CHANNEL_WIDTH_40) + cck_mode = CCK_BW40_1R; + } break; + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + case 2: /*2R*/ + { + if (cck_bw == CHANNEL_WIDTH_20) + cck_mode = CCK_BW20_2R; + else if (cck_bw == CHANNEL_WIDTH_40) + cck_mode = CCK_BW40_2R; + } break; + #endif + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + case 3: /*3R*/ + { + if (cck_bw == CHANNEL_WIDTH_20) + cck_mode = CCK_BW20_3R; + else if (cck_bw == CHANNEL_WIDTH_40) + cck_mode = CCK_BW40_3R; + } break; + #endif + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + case 4: /*4R*/ + { + if (cck_bw == CHANNEL_WIDTH_20) + cck_mode = CCK_BW20_4R; + else if (cck_bw == CHANNEL_WIDTH_40) + cck_mode = CCK_BW40_4R; + } break; + #endif + default: + /*@pr_debug("[%s] warning!\n", __func__);*/ + break; + } +phydm_write_cck_pd_type4(dm, lv, cck_mode); +} + +void phydm_read_cckpd_para_type4(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + u8 bw = 0; /*r_RX_RF_BW*/ + u8 n_rx = 0; + u8 curr_cck_pd_t[2][4][2]; + u32 reg0 = 0; + u32 reg1 = 0; + u32 reg2 = 0; + u32 reg3 = 0; + + bw = (u8)odm_get_bb_reg(dm, R_0x9b0, 0xc); + n_rx = (u8)odm_get_bb_reg(dm, R_0x1a2c, 0x60000) + 1; + + reg0 = odm_get_bb_reg(dm, R_0x1ac8, MASKDWORD); + reg1 = odm_get_bb_reg(dm, R_0x1acc, MASKDWORD); + reg2 = odm_get_bb_reg(dm, R_0x1ad0, MASKDWORD); + reg3 = odm_get_bb_reg(dm, R_0x1ad4, MASKDWORD); + curr_cck_pd_t[0][0][0] = (u8)(reg0 & 0x000000ff); + curr_cck_pd_t[1][0][0] = (u8)(reg1 & 0x000000ff); + curr_cck_pd_t[0][0][1] = (u8)(reg2 & 0x0000001f); + curr_cck_pd_t[1][0][1] = (u8)((reg2 & 0x01f00000) >> 20); + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) { + curr_cck_pd_t[0][1][0] = (u8)((reg0 & 0x0000ff00) >> 8); + curr_cck_pd_t[1][1][0] = (u8)((reg1 & 0x0000ff00) >> 8); + curr_cck_pd_t[0][1][1] = (u8)((reg2 & 0x000003E0) >> 5); + curr_cck_pd_t[1][1][1] = (u8)((reg2 & 0x3E000000) >> 25); + } + #endif + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS) { + curr_cck_pd_t[0][2][0] = (u8)((reg0 & 0x00ff0000) >> 16); + curr_cck_pd_t[1][2][0] = (u8)((reg1 & 0x00ff0000) >> 16); + curr_cck_pd_t[0][2][1] = (u8)((reg2 & 0x00007C00) >> 10); + curr_cck_pd_t[1][2][1] = (u8)((reg2 & 0xC0000000) >> 30) | + (u8)((reg3 & 0x00000007) << 3); + } + #endif + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { + curr_cck_pd_t[0][3][0] = (u8)((reg0 & 0xff000000) >> 24); + curr_cck_pd_t[1][3][0] = (u8)((reg1 & 0xff000000) >> 24); + curr_cck_pd_t[0][3][1] = (u8)((reg2 & 0x000F8000) >> 15); + curr_cck_pd_t[1][3][1] = (u8)((reg3 & 0x000000F8) >> 3); + } + #endif + + PHYDM_DBG(dm, DBG_CCKPD, "bw=%dM, Nrx=%d\n", 20 << bw, n_rx); + PHYDM_DBG(dm, DBG_CCKPD, "lv=%d, readback CS_th=0x%x, PD th=0x%x\n", + cckpd_t->cck_pd_lv, + curr_cck_pd_t[bw][n_rx - 1][1], + curr_cck_pd_t[bw][n_rx - 1][0]); +} + +void phydm_cckpd_type4(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + u8 igi = dm->dm_dig_table.cur_ig_value; + enum cckpd_lv lv = 0; + boolean is_update = true; + + PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); + + if (dm->is_linked) { + PHYDM_DBG(dm, DBG_CCKPD, "Linked!!!\n"); + if (igi > 0x38 && dm->rssi_min > 32) { + lv = CCK_PD_LV_4; + PHYDM_DBG(dm, DBG_CCKPD, "Order 1\n"); + } else if (igi > 0x2a && dm->rssi_min > 32) { + lv = CCK_PD_LV_3; + PHYDM_DBG(dm, DBG_CCKPD, "Order 2\n"); + } else if (igi > 0x24 || dm->rssi_min > 24) { + lv = CCK_PD_LV_2; + PHYDM_DBG(dm, DBG_CCKPD, "Order 3\n"); + } else { + if (cckpd_t->cck_fa_ma > 1000) { + lv = CCK_PD_LV_1; + PHYDM_DBG(dm, DBG_CCKPD, "Order 4-1\n"); + } else if (cckpd_t->cck_fa_ma < 500) { + lv = CCK_PD_LV_0; + PHYDM_DBG(dm, DBG_CCKPD, "Order 4-2\n"); + } else { + is_update = false; + PHYDM_DBG(dm, DBG_CCKPD, "Order 4-3\n"); } } } else { - + PHYDM_DBG(dm, DBG_CCKPD, "UnLinked!!!\n"); if (cckpd_t->cck_fa_ma > 1000) { - cs_ration = dig_t->aaa_default + AAA_STEP; - cs_2r_offset = 1; - pd_th = 0x7; + lv = CCK_PD_LV_1; + PHYDM_DBG(dm, DBG_CCKPD, "Order 1\n"); } else if (cckpd_t->cck_fa_ma < 500) { - cs_ration = dig_t->aaa_default; - pd_th = 0x3; + lv = CCK_PD_LV_0; + PHYDM_DBG(dm, DBG_CCKPD, "Order 2\n"); } else { is_update = false; - cs_ration = cckpd_t->cck_cca_th_aaa; - pd_th = cckpd_t->cur_cck_cca_thres; + PHYDM_DBG(dm, DBG_CCKPD, "Order 3\n"); } } - - if (en_2rcca) - cs_ration = (cs_ration >= cs_2r_offset) ? (cs_ration - cs_2r_offset) : 0; - - PHYDM_DBG(dm, DBG_CCKPD, - "[New] cs_ratio=0x%x, pd_th=0x%x\n", cs_ration, pd_th); if (is_update) { - cckpd_t->cur_cck_cca_thres = pd_th; - cckpd_t->cck_cca_th_aaa = cs_ration; - odm_set_bb_reg(dm, 0xa08, 0xf0000, pd_th); - odm_set_bb_reg(dm, 0xaa8, 0x1f0000, cs_ration); + phydm_set_cck_pd_lv_type4(dm, lv); + + PHYDM_DBG(dm, DBG_CCKPD, "setting CS_th = 0x%x, PD th = 0x%x\n", + cckpd_t->cck_pd_table_jgr3[cckpd_t->cck_bw] + [cckpd_t->cck_n_rx - 1][1][lv], + cckpd_t->cck_pd_table_jgr3[cckpd_t->cck_bw] + [cckpd_t->cck_n_rx - 1][0][lv]); } - /*phydm_write_cck_cca_th_new_cs_ratio(dm, pd_th, cs_ration);*/ + + phydm_read_cckpd_para_type4(dm); } -#endif - -void -phydm_cck_pd_th( - void *dm_void -) +void phydm_cck_pd_init_type4(void *dm_void) { -#ifdef PHYDM_SUPPORT_CCKPD - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fa_struct *fa_t= &dm->false_alm_cnt; - struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; - u32 cnt_cck_fail_tmp = fa_t->cnt_cck_fail; - #ifdef PHYDM_TDMA_DIG_SUPPORT - struct phydm_fa_acc_struct *fa_acc_t = &dm->false_alm_cnt_acc; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + u32 reg0 = 0; + u32 reg1 = 0; + u32 reg2 = 0; + u32 reg3 = 0; + u8 pd_step = 0; + u8 cck_bw = 0; /*r_RX_RF_BW*/ + u8 cck_n_rx = 0; + u8 val = 0; + u8 i = 0; + + PHYDM_DBG(dm, DBG_CCKPD, "[%s]======>\n", __func__); + + #if 0 + /*@ + *cckpd_t[0][0][0][0] = 1ac8[7:0] r_PD_lim_RFBW20_1R + *cckpd_t[0][1][0][0] = 1ac8[15:8] r_PD_lim_RFBW20_2R + *cckpd_t[0][2][0][0] = 1ac8[23:16] r_PD_lim_RFBW20_3R + *cckpd_t[0][3][0][0] = 1ac8[31:24] r_PD_lim_RFBW20_4R + *cckpd_t[1][0][0][0] = 1acc[7:0] r_PD_lim_RFBW40_1R + *cckpd_t[1][1][0][0] = 1acc[15:8] r_PD_lim_RFBW40_2R + *cckpd_t[1][2][0][0] = 1acc[23:16] r_PD_lim_RFBW40_3R + *cckpd_t[1][3][0][0] = 1acc[31:24] r_PD_lim_RFBW40_4R + * + * + *cckpd_t[0][0][1][0] = 1ad0[4:0] r_CS_ratio_RFBW20_1R[4:0] + *cckpd_t[0][1][1][0] = 1ad0[9:5] r_CS_ratio_RFBW20_2R[4:0] + *cckpd_t[0][2][1][0] = 1ad0[14:10] r_CS_ratio_RFBW20_3R[4:0] + *cckpd_t[0][3][1][0] = 1ad0[19:15] r_CS_ratio_RFBW20_4R[4:0] + *cckpd_t[1][0][1][0] = 1ad0[24:20] r_CS_ratio_RFBW40_1R[4:0] + *cckpd_t[1][1][1][0] = 1ad0[29:25] r_CS_ratio_RFBW40_2R[4:0] + *cckpd_t[1][2][1][0] = 1ad0[31:30] r_CS_ratio_RFBW40_3R[1:0] + * 1ad4[2:0] r_CS_ratio_RFBW40_3R[4:2] + *cckpd_t[1][3][1][0] = 1ad4[7:3] r_CS_ratio_RFBW40_4R[4:0] + */ #endif - - PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); + /*[Check Nrx]*/ + cck_n_rx = (u8)odm_get_bb_reg(dm, R_0x1a2c, 0x60000) + 1; - if (phydm_stop_cck_pd_th(dm) == true) - return; - -#ifdef PHYDM_TDMA_DIG_SUPPORT - cnt_cck_fail_tmp = (dm->original_dig_restore) ? (fa_t->cnt_cck_fail) : (fa_acc_t->cnt_cck_fail_1sec); -#endif - - if (cckpd_t->cck_fa_ma == CCK_FA_MA_RESET) - cckpd_t->cck_fa_ma = cnt_cck_fail_tmp; - else { - cckpd_t->cck_fa_ma = ((cckpd_t->cck_fa_ma << 1) + - cckpd_t->cck_fa_ma + cnt_cck_fail_tmp) >> 2; - } - - PHYDM_DBG(dm, DBG_CCKPD, "CCK FA=%d\n", cckpd_t->cck_fa_ma); - - if (dm->support_ic_type & EXTEND_CCK_CCATH_AAA_IC) - phydm_cckpd_new_cs_ratio(dm); + /*[Check BW]*/ + val = (u8)odm_get_bb_reg(dm, R_0x9b0, 0xc); + if (val == 0) + cck_bw = CHANNEL_WIDTH_20; + else if (val == 1) + cck_bw = CHANNEL_WIDTH_40; else - phydm_cckpd(dm); - -#endif + cck_bw = CHANNEL_WIDTH_80; + + cckpd_t->cck_bw = cck_bw; + cckpd_t->cck_n_rx = cck_n_rx; + reg0 = odm_get_bb_reg(dm, R_0x1ac8, MASKDWORD); + reg1 = odm_get_bb_reg(dm, R_0x1acc, MASKDWORD); + reg2 = odm_get_bb_reg(dm, R_0x1ad0, MASKDWORD); + reg3 = odm_get_bb_reg(dm, R_0x1ad4, MASKDWORD); + + for (i = 0 ; i < CCK_PD_LV_MAX ; i++) { + pd_step = i * 2; + + val = (u8)(reg0 & 0x000000ff) + pd_step; + PHYDM_DBG(dm, DBG_CCKPD, "lvl %d val = %x\n\n", i, val); + cckpd_t->cck_pd_table_jgr3[0][0][0][i] = val; + + val = (u8)(reg1 & 0x000000ff) + pd_step; + cckpd_t->cck_pd_table_jgr3[1][0][0][i] = val; + + val = (u8)(reg2 & 0x0000001F) + pd_step; + cckpd_t->cck_pd_table_jgr3[0][0][1][i] = val; + + val = (u8)((reg2 & 0x01F00000) >> 20) + pd_step; + cckpd_t->cck_pd_table_jgr3[1][0][1][i] = val; + + #ifdef PHYDM_COMPILE_ABOVE_2SS + if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) { + val = (u8)((reg0 & 0x0000ff00) >> 8) + pd_step; + cckpd_t->cck_pd_table_jgr3[0][1][0][i] = val; + + val = (u8)((reg1 & 0x0000ff00) >> 8) + pd_step; + cckpd_t->cck_pd_table_jgr3[1][1][0][i] = val; + + val = (u8)((reg2 & 0x000003E0) >> 5) + pd_step; + cckpd_t->cck_pd_table_jgr3[0][1][1][i] = val; + + val = (u8)((reg2 & 0x3E000000) >> 25) + pd_step; + cckpd_t->cck_pd_table_jgr3[1][1][1][i] = val; + } + #endif + + #ifdef PHYDM_COMPILE_ABOVE_3SS + if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS) { + val = (u8)((reg0 & 0x00ff0000) >> 16) + pd_step; + cckpd_t->cck_pd_table_jgr3[0][2][0][i] = val; + + val = (u8)((reg1 & 0x00ff0000) >> 16) + pd_step; + cckpd_t->cck_pd_table_jgr3[1][2][0][i] = val; + val = (u8)((reg2 & 0x00007C00) >> 10) + pd_step; + cckpd_t->cck_pd_table_jgr3[0][2][1][i] = val; + val = (u8)(((reg2 & 0xC0000000) >> 30) | + ((reg3 & 0x7) << 3)) + pd_step; + cckpd_t->cck_pd_table_jgr3[1][2][1][i] = val; + } + #endif + + #ifdef PHYDM_COMPILE_ABOVE_4SS + if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { + val = (u8)((reg0 & 0xff000000) >> 24) + pd_step; + cckpd_t->cck_pd_table_jgr3[0][3][0][i] = val; + + val = (u8)((reg1 & 0xff000000) >> 24) + pd_step; + cckpd_t->cck_pd_table_jgr3[1][3][0][i] = val; + + val = (u8)((reg2 & 0x000F8000) >> 15) + pd_step; + cckpd_t->cck_pd_table_jgr3[0][3][1][i] = val; + + val = (u8)((reg3 & 0x000000F8) >> 3) + pd_step; + cckpd_t->cck_pd_table_jgr3[1][3][1][i] = val; + } + #endif + } } +#endif /*#ifdef PHYDM_COMPILE_CCKPD_TYPE4*/ -void -odm_pause_cck_packet_detection( - void *dm_void, - enum phydm_pause_type pause_type, - enum phydm_pause_level pause_lv, - u8 cck_pd_th -) +void phydm_set_cckpd_val(void *dm_void, u32 *val_buf, u8 val_len) { -#ifdef PHYDM_SUPPORT_CCKPD - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; - s8 max_level; - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + enum cckpd_lv lv; - PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); - - if ((cckpd_t->pause_bitmap == 0) && - (!(dm->support_ability & (ODM_BB_CCK_PD | ODM_BB_FA_CNT)))) { - - PHYDM_DBG(dm, DBG_CCKPD, "Return: not support\n"); + if (val_len != 1) { + PHYDM_DBG(dm, ODM_COMP_API, "[Error][CCKPD]Need val_len=1\n"); return; } - if (pause_lv >= PHYDM_PAUSE_MAX_NUM) { - PHYDM_DBG(dm, DBG_CCKPD, "Return: Wrong LV !\n"); + lv = (enum cckpd_lv)val_buf[0]; + + if (lv > CCK_PD_LV_4) { + pr_debug("[%s] warning! lv=%d\n", __func__, lv); return; } - PHYDM_DBG(dm, DBG_CCKPD, "Set pause{Type, LV, val} = {%d, %d, 0x%x}\n", - pause_type, pause_lv, cck_pd_th); - PHYDM_DBG(dm, DBG_CCKPD, "pause LV=0x%x\n", cckpd_t->pause_bitmap); - - for (i = 0; i < PHYDM_PAUSE_MAX_NUM; i ++) { - PHYDM_DBG(dm, DBG_CCKPD, "pause val[%d]=0x%x\n", - i, cckpd_t->pause_cckpd_value[i]); - } - - switch (pause_type) { - case PHYDM_PAUSE: - { - /* Disable CCK PD */ - dm->support_ability &= ~ODM_BB_CCK_PD; - - PHYDM_DBG(dm, DBG_CCKPD, "Pause CCK PD th\n"); - - /* Backup original CCK PD threshold decided by CCK PD mechanism */ - if (cckpd_t->pause_bitmap == 0) { - - cckpd_t->cckpd_bkp = cckpd_t->cur_cck_cca_thres; - - PHYDM_DBG(dm, DBG_CCKPD, "cckpd_bkp=0x%x\n", - cckpd_t->cckpd_bkp); - } - - cckpd_t->pause_bitmap |= BIT(pause_lv); /* Update pause level */ - cckpd_t->pause_cckpd_value[pause_lv] = cck_pd_th; - - /* Write new CCK PD threshold */ - if (BIT(pause_lv + 1) > cckpd_t->pause_bitmap) { - PHYDM_DBG(dm, DBG_CCKPD, "> ori pause LV=0x%x\n", - cckpd_t->pause_bitmap); - - phydm_write_cck_cca_th(dm, cck_pd_th); - } + switch (cckpd_t->cckpd_hw_type) { + #ifdef PHYDM_COMPILE_CCKPD_TYPE1 + case 1: + phydm_set_cckpd_lv_type1(dm, lv); break; - } - case PHYDM_RESUME: - { - /* check if the level is illegal or not */ - if ((cckpd_t->pause_bitmap & (BIT(pause_lv))) != 0) { - - cckpd_t->pause_bitmap &= (~(BIT(pause_lv))); - cckpd_t->pause_cckpd_value[pause_lv] = 0; - PHYDM_DBG(dm, DBG_CCKPD, "Resume CCK PD\n"); - } else { - - PHYDM_DBG(dm, DBG_CCKPD, "Wrong resume LV\n"); - break; - } - - /* Resume CCKPD */ - if (cckpd_t->pause_bitmap == 0) { - - PHYDM_DBG(dm, DBG_CCKPD, "Revert bkp_CCKPD=0x%x\n", - cckpd_t->cckpd_bkp); - - phydm_write_cck_cca_th(dm, cckpd_t->cckpd_bkp); - dm->support_ability |= ODM_BB_CCK_PD;/* Enable CCKPD */ - break; - } - - if (BIT(pause_lv) <= cckpd_t->pause_bitmap) - break; - - /* Calculate the maximum level now */ - for (max_level = (pause_lv - 1); max_level >= 0; max_level--) { - if (cckpd_t->pause_bitmap & BIT(max_level)) - break; - } - - /* write CCKPD of lower level */ - phydm_write_cck_cca_th(dm, cckpd_t->pause_cckpd_value[max_level]); - PHYDM_DBG(dm, DBG_CCKPD, "Write CCKPD=0x%x for max_LV=%d\n", - cckpd_t->pause_cckpd_value[max_level], max_level); + #endif + #ifdef PHYDM_COMPILE_CCKPD_TYPE2 + case 2: + phydm_set_cckpd_lv_type2(dm, lv); break; - } + #endif + #ifdef PHYDM_COMPILE_CCKPD_TYPE3 + case 3: + phydm_set_cckpd_lv_type3(dm, lv); + break; + #endif + #ifdef PHYDM_COMPILE_CCKPD_TYPE4 + case 4: + phydm_set_cck_pd_lv_type4(dm, lv); + break; + #endif default: - PHYDM_DBG(dm, DBG_CCKPD, "Wrong type\n"); + pr_debug("[%s]warning\n", __func__); break; } - - PHYDM_DBG(dm, DBG_CCKPD, "New pause bitmap=0x%x\n", - cckpd_t->pause_bitmap); - - for (i = 0; i < PHYDM_PAUSE_MAX_NUM; i ++) { - PHYDM_DBG(dm, DBG_CCKPD, "pause val[%d]=0x%x\n", - i, cckpd_t->pause_cckpd_value[i]); - } -#endif } -void -phydm_cck_pd_init( - void *dm_void -) +boolean +phydm_stop_cck_pd_th(void *dm_void) { -#ifdef PHYDM_SUPPORT_CCKPD - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; - cckpd_t->cur_cck_cca_thres = 0; - cckpd_t->cck_cca_th_aaa = 0; - - cckpd_t->pause_bitmap = 0; - - if (dm->support_ic_type & EXTEND_CCK_CCATH_AAA_IC) { - dig_t->aaa_default = odm_read_1byte(dm, 0xaaa) & 0x1f; - dig_t->a0a_default = (u8)odm_get_bb_reg(dm, R_0xa08, 0xff0000); - cckpd_t->cck_cca_th_aaa = dig_t->aaa_default; - cckpd_t->cur_cck_cca_thres = dig_t->a0a_default; - } else { - dig_t->a0a_default = (u8)odm_get_bb_reg(dm, R_0xa08, 0xff0000); - cckpd_t->cur_cck_cca_thres = dig_t->a0a_default; + if (!(dm->support_ability & (ODM_BB_CCK_PD | ODM_BB_FA_CNT))) { + PHYDM_DBG(dm, DBG_CCKPD, "Not Support\n"); + return true; } - odm_memory_set(dm, cckpd_t->pause_cckpd_value, 0, PHYDM_PAUSE_MAX_NUM); -#endif + if (dm->pause_ability & ODM_BB_CCK_PD) { + PHYDM_DBG(dm, DBG_CCKPD, "Return: Pause CCKPD in LV=%d\n", + dm->pause_lv_table.lv_cckpd); + return true; + } + + if (dm->is_linked && (*dm->channel > 36)) { + PHYDM_DBG(dm, DBG_CCKPD, "Return: 5G CH=%d\n", *dm->channel); + return true; + } + return false; } +void phydm_cck_pd_th(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + u32 cck_fa = fa_t->cnt_cck_fail; + #ifdef PHYDM_TDMA_DIG_SUPPORT + struct phydm_fa_acc_struct *fa_acc_t = &dm->false_alm_cnt_acc; + #endif + + PHYDM_DBG(dm, DBG_CCKPD, "[%s] ======>\n", __func__); + + if (phydm_stop_cck_pd_th(dm)) + return; + + #ifdef PHYDM_TDMA_DIG_SUPPORT + if (dm->original_dig_restore) + cck_fa = fa_t->cnt_cck_fail; + else + cck_fa = fa_acc_t->cnt_cck_fail_1sec; + #endif + + if (cckpd_t->cck_fa_ma == CCK_FA_MA_RESET) + cckpd_t->cck_fa_ma = cck_fa; + else + cckpd_t->cck_fa_ma = (cckpd_t->cck_fa_ma * 3 + cck_fa) >> 2; + + PHYDM_DBG(dm, DBG_CCKPD, + "IGI=0x%x, rssi_min=%d, cck_fa=%d, cck_fa_ma=%d\n", + dm->dm_dig_table.cur_ig_value, dm->rssi_min, + cck_fa, cckpd_t->cck_fa_ma); + + switch (cckpd_t->cckpd_hw_type) { + #ifdef PHYDM_COMPILE_CCKPD_TYPE1 + case 1: + phydm_cckpd_type1(dm); + break; + #endif + #ifdef PHYDM_COMPILE_CCKPD_TYPE2 + case 2: + phydm_cckpd_type2(dm); + break; + #endif + #ifdef PHYDM_COMPILE_CCKPD_TYPE3 + case 3: + phydm_cckpd_type3(dm); + break; + #endif + #ifdef PHYDM_COMPILE_CCKPD_TYPE4 + case 4: + phydm_cckpd_type4(dm); + break; + #endif + default: + pr_debug("[%s]warning\n", __func__); + break; + } +} + +void phydm_cck_pd_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; + + if (dm->support_ic_type & CCK_PD_IC_TYPE1) + cckpd_t->cckpd_hw_type = 1; + else if (dm->support_ic_type & CCK_PD_IC_TYPE2) + cckpd_t->cckpd_hw_type = 2; + else if (dm->support_ic_type & CCK_PD_IC_TYPE3) + cckpd_t->cckpd_hw_type = 3; + else if (dm->support_ic_type & CCK_PD_IC_TYPE4) + cckpd_t->cckpd_hw_type = 4; + + PHYDM_DBG(dm, DBG_CCKPD, "[%s] cckpd_hw_type=%d\n", + __func__, cckpd_t->cckpd_hw_type); + + cckpd_t->cck_pd_lv = CCK_PD_LV_INIT; + cckpd_t->cck_n_rx = 0xff; + cckpd_t->cck_bw = CHANNEL_WIDTH_MAX; + + switch (cckpd_t->cckpd_hw_type) { + #ifdef PHYDM_COMPILE_CCKPD_TYPE1 + case 1: + phydm_set_cckpd_lv_type1(dm, CCK_PD_LV_0); + break; + #endif + #ifdef PHYDM_COMPILE_CCKPD_TYPE2 + case 2: + cckpd_t->aaa_default = odm_read_1byte(dm, 0xaaa) & 0x1f; + phydm_set_cckpd_lv_type2(dm, CCK_PD_LV_0); + break; + #endif + #ifdef PHYDM_COMPILE_CCKPD_TYPE3 + case 3: + phydm_cck_pd_init_type3(dm); + break; + #endif + #ifdef PHYDM_COMPILE_CCKPD_TYPE4 + case 4: + phydm_cck_pd_init_type4(dm); + break; + #endif + default: + pr_debug("[%s]warning\n", __func__); + break; + } +} +#endif /*#ifdef PHYDM_SUPPORT_CCKPD*/ diff --git a/hal/phydm/phydm_cck_pd.h b/hal/phydm/phydm_cck_pd.h index e56f768..f8c8625 100644 --- a/hal/phydm/phydm_cck_pd.h +++ b/hal/phydm/phydm_cck_pd.h @@ -23,72 +23,133 @@ * *****************************************************************************/ +#ifndef __PHYDM_CCK_PD_H__ +#define __PHYDM_CCK_PD_H__ -#ifndef __PHYDM_CCK_PD_H__ -#define __PHYDM_CCK_PD_H__ +#define CCK_PD_VERSION "3.1" -#define CCK_PD_VERSION "1.0" /* 2017.05.09 Dino, Add phydm_cck_pd.h*/ - - -/* 1 ============================================================ +/*@ + * 1 ============================================================ * 1 Definition - * 1 ============================================================ */ + * 1 ============================================================ + */ +#define CCK_FA_MA_RESET 0xffffffff +/*@Run time flag of CCK_PD HW type*/ +#define CCK_PD_IC_TYPE1 (ODM_RTL8188E | ODM_RTL8812 | ODM_RTL8821 |\ + ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8814A |\ + ODM_RTL8881A | ODM_RTL8822B | ODM_RTL8703B |\ + ODM_RTL8195A | ODM_RTL8188F) -#define AAA_BASE 4 -#define AAA_STEP 2 +#define CCK_PD_IC_TYPE2 (ODM_RTL8197F | ODM_RTL8821C | ODM_RTL8723D |\ + ODM_RTL8710B | ODM_RTL8195B) /*extend 0xaaa*/ -#define CCK_FA_MA_RESET 0xffffffff +#define CCK_PD_IC_TYPE3 (ODM_RTL8192F | ODM_RTL8721D) +/*@extend for different bw & path*/ -#define EXTEND_CCK_CCATH_AAA_IC (ODM_RTL8197F | ODM_RTL8821C | ODM_RTL8723D |ODM_RTL8710B) -/* 1 ============================================================ +#define CCK_PD_IC_TYPE4 ODM_IC_JGR3_SERIES /*@extend for different bw & path*/ + +/*@Compile time flag of CCK_PD HW type*/ +#if (RTL8188E_SUPPORT || RTL8812A_SUPPORT || RTL8821A_SUPPORT ||\ + RTL8192E_SUPPORT || RTL8723B_SUPPORT || RTL8814A_SUPPORT ||\ + RTL8881A_SUPPORT || RTL8822B_SUPPORT || RTL8703B_SUPPORT ||\ + RTL8195A_SUPPORT || RTL8188F_SUPPORT) + #define PHYDM_COMPILE_CCKPD_TYPE1 /*@only 0xa0a*/ +#endif + +#if (RTL8197F_SUPPORT || RTL8821C_SUPPORT || RTL8723D_SUPPORT ||\ + RTL8710B_SUPPORT || RTL8195B_SUPPORT) + #define PHYDM_COMPILE_CCKPD_TYPE2 /*@extend 0xaaa*/ +#endif + +#if (RTL8192F_SUPPORT || RTL8721D_SUPPORT) + #define PHYDM_COMPILE_CCKPD_TYPE3 /*@extend for different & path*/ +#endif + +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + #define PHYDM_COMPILE_CCKPD_TYPE4 /*@extend for different bw & path*/ +#endif +/*@ + * 1 ============================================================ + * 1 enumeration + * 1 ============================================================ + */ +enum cckpd_lv { + CCK_PD_LV_INIT = 0xff, + CCK_PD_LV_0 = 0, + CCK_PD_LV_1 = 1, + CCK_PD_LV_2 = 2, + CCK_PD_LV_3 = 3, + CCK_PD_LV_4 = 4, + CCK_PD_LV_MAX = 5 +}; + +enum cckpd_mode { + CCK_BW20_1R = 0, + CCK_BW20_2R = 1, + CCK_BW20_3R = 2, + CCK_BW20_4R = 3, + CCK_BW40_1R = 4, + CCK_BW40_2R = 5, + CCK_BW40_3R = 6, + CCK_BW40_4R = 7 +}; + +/*@ + * 1 ============================================================ * 1 structure - * 1 ============================================================ */ + * 1 ============================================================ + */ #ifdef PHYDM_SUPPORT_CCKPD struct phydm_cckpd_struct { - u8 cur_cck_cca_thres; /*0xA0A*/ - u8 cck_cca_th_aaa; /*0xAAA*/ + u8 cckpd_hw_type; + u8 cur_cck_cca_thres; /*@current cck_pd value 0xa0a*/ u32 cck_fa_ma; - u8 cckpd_bkp; - u32 rvrt_val[2]; - u8 pause_bitmap;/*will be removed*/ + u8 rvrt_val; u8 pause_lv; - u8 pause_cckpd_value[PHYDM_PAUSE_MAX_NUM]; /*will be removed*/ + u8 cck_n_rx; + enum channel_width cck_bw; + enum cckpd_lv cck_pd_lv; + #ifdef PHYDM_COMPILE_CCKPD_TYPE2 + u8 cck_cca_th_aaa; /*@current cs_ratio value 0xaaa*/ + u8 aaa_default; /*@Init cs_ratio value - 0xaaa*/ + #endif + #ifdef PHYDM_COMPILE_CCKPD_TYPE3 + /*Default value*/ + u8 cck_pd_20m_1r; + u8 cck_pd_20m_2r; + u8 cck_pd_40m_1r; + u8 cck_pd_40m_2r; + u8 cck_cs_ratio_20m_1r; + u8 cck_cs_ratio_20m_2r; + u8 cck_cs_ratio_40m_1r; + u8 cck_cs_ratio_40m_2r; + /*Current value*/ + u8 cur_cck_pd_20m_1r; + u8 cur_cck_pd_20m_2r; + u8 cur_cck_pd_40m_1r; + u8 cur_cck_pd_40m_2r; + u8 cur_cck_cs_ratio_20m_1r; + u8 cur_cck_cs_ratio_20m_2r; + u8 cur_cck_cs_ratio_40m_1r; + u8 cur_cck_cs_ratio_40m_2r; + #endif + #ifdef PHYDM_COMPILE_CCKPD_TYPE4 + /*@[bw][nrx][0:PD/1:CS][lv]*/ + u8 cck_pd_table_jgr3[2][4][2][CCK_PD_LV_MAX]; + #endif }; #endif -/* 1 ============================================================ - * 1 enumeration - * 1 ============================================================ */ - -/* 1 ============================================================ +/*@ + * 1 ============================================================ * 1 function prototype - * 1 ============================================================ */ + * 1 ============================================================ + */ +void phydm_set_cckpd_val(void *dm_void, u32 *val_buf, u8 val_len); -void -phydm_set_cckpd_val( - void *dm_void, - u32 *val_buf, - u8 val_len -); - -void -phydm_cck_pd_th( - void *dm_void -); - -void -odm_pause_cck_packet_detection( - void *dm_void, - enum phydm_pause_type pause_type, - enum phydm_pause_level pause_level, - u8 cck_pd_threshold -); - -void -phydm_cck_pd_init( - void *dm_void -); +void phydm_cck_pd_th(void *dm_void); +void phydm_cck_pd_init(void *dm_void); #endif diff --git a/hal/phydm/phydm_ccx.c b/hal/phydm/phydm_ccx.c index 8335b1d..b253c08 100644 --- a/hal/phydm/phydm_ccx.c +++ b/hal/phydm/phydm_ccx.c @@ -26,231 +26,208 @@ #include "mp_precomp.h" #include "phydm_precomp.h" -void -phydm_ccx_hw_restart( - void *dm_void -)/*Will Restart NHM/CLM/FAHM simultaneously*/ +void phydm_ccx_hw_restart(void *dm_void) + /*@Will Restart NHM/CLM/FAHM simultaneously*/ { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 reg1 = (dm->support_ic_type & ODM_IC_11AC_SERIES) ? R_0x994 : R_0x890; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 reg1 = 0; + + if (dm->support_ic_type & ODM_IC_11AC_SERIES) + reg1 = R_0x994; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + reg1 = R_0x1e60; + #endif + else + reg1 = R_0x890; PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); - odm_set_bb_reg(dm, reg1, 0x7, 0x0); /*disable NHM,CLM, FAHM*/ - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - odm_set_bb_reg(dm, R_0x994, BIT(8), 0x0); - odm_set_bb_reg(dm, R_0x994, BIT(8), 0x1); - - } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { - odm_set_bb_reg(dm, R_0x890, BIT(8), 0x0); - odm_set_bb_reg(dm, R_0x890, BIT(8), 0x1); - } + /*@disable NHM,CLM, FAHM*/ + odm_set_bb_reg(dm, reg1, 0x7, 0x0); + odm_set_bb_reg(dm, reg1, BIT(8), 0x0); + odm_set_bb_reg(dm, reg1, BIT(8), 0x1); } #ifdef FAHM_SUPPORT -u16 -phydm_hw_divider( - void *dm_void, - u16 numerator, - u16 denumerator -) +u16 phydm_hw_divider(void *dm_void, u16 numerator, u16 denumerator) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u16 result = DEVIDER_ERROR; - u32 tmp_u32 = ((numerator << 16) | denumerator); - u32 reg_devider_input; - u32 reg_devider_rpt; - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u16 result = DEVIDER_ERROR; + u32 tmp_u32 = ((numerator << 16) | denumerator); + u32 reg_devider_input; + u32 reg; + u8 i; - PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __FUNCTION__); + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - reg_devider_input = 0x1cbc; - reg_devider_rpt = 0x1f98; + reg_devider_input = 0x1cbc; + reg = 0x1f98; } else { - reg_devider_input = 0x980; - reg_devider_rpt = 0x9f0; + reg_devider_input = 0x980; + reg = 0x9f0; } odm_set_bb_reg(dm, reg_devider_input, MASKDWORD, tmp_u32); for (i = 0; i < 10; i++) { ODM_delay_ms(1); - if (odm_get_bb_reg(dm, reg_devider_rpt, BIT(24))) { /*Chk HW rpt is ready*/ - - result = (u16)odm_get_bb_reg(dm, reg_devider_rpt, MASKBYTE2); + if (odm_get_bb_reg(dm, reg, BIT(24))) { + /*@Chk HW rpt is ready*/ + + result = (u16)odm_get_bb_reg(dm, reg, MASKBYTE2); break; } } - return result; + return result; } -void -phydm_fahm_trigger( - void *dm_void, - u16 trigger_period /*unit (4us)*/ -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - u32 fahm_reg1; - u32 fahm_reg2; +void phydm_fahm_trigger(void *dm_void, u16 tgr_period) +{ /*@unit (4us)*/ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 fahm_reg1; if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - odm_set_bb_reg(dm, R_0x1cf8, 0xffff00, trigger_period); - - fahm_reg1 = 0x994; + odm_set_bb_reg(dm, R_0x1cf8, 0xffff00, tgr_period); + + fahm_reg1 = 0x994; } else { - - odm_set_bb_reg(dm, R_0x978, 0xff000000, (trigger_period & 0xff)); - odm_set_bb_reg(dm, R_0x97c, 0xff, (trigger_period & 0xff00)>>8); - - fahm_reg1 = 0x890; + odm_set_bb_reg(dm, R_0x978, 0xff000000, (tgr_period & 0xff)); + odm_set_bb_reg(dm, R_0x97c, 0xff, (tgr_period & 0xff00) >> 8); + + fahm_reg1 = 0x890; } odm_set_bb_reg(dm, fahm_reg1, BIT(2), 0); odm_set_bb_reg(dm, fahm_reg1, BIT(2), 1); } -void -phydm_fahm_set_valid_cnt( - void *dm_void, - u8 numerator_sel, - u8 denumerator_sel -) +void phydm_fahm_set_valid_cnt(void *dm_void, u8 numerator_sel, + u8 denominator_sel) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - u32 fahm_reg1; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx_info = &dm->dm_ccx_info; + u32 fahm_reg1; - PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __FUNCTION__); + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); - if ((ccx_info->fahm_nume_sel == numerator_sel) && - (ccx_info->fahm_denum_sel == denumerator_sel)) { + if (ccx_info->fahm_nume_sel == numerator_sel && + ccx_info->fahm_denom_sel == denominator_sel) { PHYDM_DBG(dm, DBG_ENV_MNTR, "no need to update\n"); return; } ccx_info->fahm_nume_sel = numerator_sel; - ccx_info->fahm_denum_sel = denumerator_sel; - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - fahm_reg1 = 0x994; - } else { - fahm_reg1 = 0x890; - } + ccx_info->fahm_denom_sel = denominator_sel; + + if (dm->support_ic_type & ODM_IC_11AC_SERIES) + fahm_reg1 = 0x994; + else + fahm_reg1 = 0x890; odm_set_bb_reg(dm, fahm_reg1, 0xe0, numerator_sel); - odm_set_bb_reg(dm, fahm_reg1, 0x7000, denumerator_sel); + odm_set_bb_reg(dm, fahm_reg1, 0x7000, denominator_sel); } -void -phydm_fahm_get_result( - void *dm_void -) +void phydm_fahm_get_result(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - u16 fahm_rpt_cnt[12]; /*packet count*/ - u16 fahm_rpt[12]; /*percentage*/ - u16 fahm_denumerator; /*packet count*/ - u32 reg_rpt, reg_rpt_2; - u32 reg_val_tmp; - boolean is_ready = false; - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u16 fahm_cnt[12]; /*packet count*/ + u16 fahm_rpt[12]; /*percentage*/ + u16 denominator; /*@fahm_denominator packet count*/ + u32 reg_rpt, reg_rpt_2; + u32 reg_tmp; + boolean is_ready = false; + u8 i; + + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); - PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __FUNCTION__); - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - reg_rpt = 0x1f80; + reg_rpt = 0x1f80; reg_rpt_2 = 0x1f98; } else { - reg_rpt = 0x9d8; + reg_rpt = 0x9d8; reg_rpt_2 = 0x9f0; } for (i = 0; i < 3; i++) { - - if (odm_get_bb_reg(dm, reg_rpt_2, BIT(31))) { /*Chk HW rpt is ready*/ - + if (odm_get_bb_reg(dm, reg_rpt_2, BIT(31))) { + /*@Chk HW rpt is ready*/ is_ready = true; break; } ODM_delay_ms(1); } - if (is_ready == false) + if (!is_ready) return; - /*Get Denumerator*/ - fahm_denumerator = (u16)odm_get_bb_reg(dm, reg_rpt_2, MASKLWORD); + /*@Get FAHM Denominator*/ + denominator = (u16)odm_get_bb_reg(dm, reg_rpt_2, MASKLWORD); - PHYDM_DBG(dm, DBG_ENV_MNTR, "Reg[0x%x] fahm_denmrtr = %d\n", reg_rpt_2, fahm_denumerator); - + PHYDM_DBG(dm, DBG_ENV_MNTR, "Reg[0x%x] fahm_denmrtr = %d\n", reg_rpt_2, + denominator); - /*Get nemerator*/ - for (i = 0; i<6; i++) { - reg_val_tmp = odm_get_bb_reg(dm, reg_rpt + (i<<2), MASKDWORD); - - PHYDM_DBG(dm, DBG_ENV_MNTR, "Reg[0x%x] fahm_denmrtr = %d\n", reg_rpt + (i*4), reg_val_tmp); - - fahm_rpt_cnt[i*2] = (u16)(reg_val_tmp & MASKLWORD); - fahm_rpt_cnt[i*2 +1] = (u16)((reg_val_tmp & MASKHWORD)>>16); + /*@Get FAHM nemerator*/ + for (i = 0; i < 6; i++) { + reg_tmp = odm_get_bb_reg(dm, reg_rpt + (i << 2), MASKDWORD); + + PHYDM_DBG(dm, DBG_ENV_MNTR, "Reg[0x%x] fahm_denmrtr = %d\n", + reg_rpt + (i * 4), reg_tmp); + + fahm_cnt[i * 2] = (u16)(reg_tmp & MASKLWORD); + fahm_cnt[i * 2 + 1] = (u16)((reg_tmp & MASKHWORD) >> 16); } - for (i = 0; i<12; i++) { - fahm_rpt[i] = phydm_hw_divider(dm, fahm_rpt_cnt[i], fahm_denumerator); - } + for (i = 0; i < 12; i++) + fahm_rpt[i] = phydm_hw_divider(dm, fahm_cnt[i], denominator); PHYDM_DBG(dm, DBG_ENV_MNTR, "FAHM_RPT_cnt[10:0]=[%d, %d, %d, %d, %d(IGI), %d, %d, %d, %d, %d, %d, %d]\n", - fahm_rpt_cnt[11], fahm_rpt_cnt[10], fahm_rpt_cnt[9], - fahm_rpt_cnt[8], fahm_rpt_cnt[7], fahm_rpt_cnt[6], - fahm_rpt_cnt[5], fahm_rpt_cnt[4], fahm_rpt_cnt[3], - fahm_rpt_cnt[2], fahm_rpt_cnt[1], fahm_rpt_cnt[0]); + fahm_cnt[11], fahm_cnt[10], fahm_cnt[9], + fahm_cnt[8], fahm_cnt[7], fahm_cnt[6], + fahm_cnt[5], fahm_cnt[4], fahm_cnt[3], + fahm_cnt[2], fahm_cnt[1], fahm_cnt[0]); PHYDM_DBG(dm, DBG_ENV_MNTR, "FAHM_RPT[10:0]=[%d, %d, %d, %d, %d(IGI), %d, %d, %d, %d, %d, %d, %d]\n", fahm_rpt[11], fahm_rpt[10], fahm_rpt[9], fahm_rpt[8], - fahm_rpt[7], fahm_rpt[6], - fahm_rpt[5], fahm_rpt[4], fahm_rpt[3], fahm_rpt[2], - fahm_rpt[1], fahm_rpt[0]); - + fahm_rpt[7], fahm_rpt[6], fahm_rpt[5], fahm_rpt[4], + fahm_rpt[3], fahm_rpt[2], fahm_rpt[1], fahm_rpt[0]); } -void -phydm_fahm_set_th_by_igi( - void *dm_void, - u8 igi -) +void phydm_fahm_set_th_by_igi(void *dm_void, u8 igi) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - u8 fahm_th[11]; - u8 rssi_th[11]; /*in RSSI scale*/ - u8 th_gap = 2 * IGI_TO_NHM_TH_MULTIPLIER; /*beacuse unit is 0.5dB for FAHM*/ - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx_info = &dm->dm_ccx_info; + u32 val = 0; + u8 f_th[11]; /*@FAHM Threshold*/ + u8 rssi_th[11]; /*@in RSSI scale*/ + u8 th_gap = 2 * IGI_TO_NHM_TH_MULTIPLIER; /*unit is 0.5dB for FAHM*/ + u8 i; - PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __FUNCTION__); + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); if (ccx_info->env_mntr_igi == igi) { - PHYDM_DBG(dm, DBG_ENV_MNTR, "No need to update FAHM_th, IGI=0x%x\n", ccx_info->env_mntr_igi); + PHYDM_DBG(dm, DBG_ENV_MNTR, + "No need to update FAHM_th, IGI=0x%x\n", + ccx_info->env_mntr_igi); return; } - ccx_info->env_mntr_igi = igi; /*bkp IGI*/ + ccx_info->env_mntr_igi = igi; /*@bkp IGI*/ - if (igi >= CCA_CAP) - fahm_th[0] = (igi - CCA_CAP) * IGI_TO_NHM_TH_MULTIPLIER; + if (igi >= CCA_CAP) + f_th[0] = (igi - CCA_CAP) * IGI_TO_NHM_TH_MULTIPLIER; else - fahm_th[0] = 0; - - rssi_th[0] = igi -10 - CCA_CAP; - + f_th[0] = 0; + + rssi_th[0] = igi - 10 - CCA_CAP; + for (i = 1; i <= 10; i++) { - fahm_th[i] = fahm_th[0] + th_gap * i; - rssi_th[i] = rssi_th[0] + (i<<1); + f_th[i] = f_th[0] + th_gap * i; + rssi_th[i] = rssi_th[0] + (i << 1); } PHYDM_DBG(dm, DBG_ENV_MNTR, @@ -260,131 +237,125 @@ phydm_fahm_set_th_by_igi( rssi_th[0]); if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - - odm_set_bb_reg(dm, R_0x1c38, 0xffffff00, ((fahm_th[2]<<24) |(fahm_th[1]<<16) | (fahm_th[0]<<8))); - odm_set_bb_reg(dm, R_0x1c78, 0xffffff00, ((fahm_th[5]<<24) |(fahm_th[4]<<16) | (fahm_th[3]<<8))); - odm_set_bb_reg(dm, R_0x1c7c, 0xffffff00, ((fahm_th[7]<<24) |(fahm_th[6]<<16))); - odm_set_bb_reg(dm, R_0x1cb8, 0xffffff00, ((fahm_th[10]<<24) |(fahm_th[9]<<16) | (fahm_th[8]<<8))); + val = BYTE_2_DWORD(0, f_th[2], f_th[1], f_th[0]); + odm_set_bb_reg(dm, R_0x1c38, 0xffffff00, val); + val = BYTE_2_DWORD(0, f_th[5], f_th[4], f_th[3]); + odm_set_bb_reg(dm, R_0x1c78, 0xffffff00, val); + val = BYTE_2_DWORD(0, 0, f_th[7], f_th[6]); + odm_set_bb_reg(dm, R_0x1c7c, 0xffff0000, val); + val = BYTE_2_DWORD(0, f_th[10], f_th[9], f_th[8]); + odm_set_bb_reg(dm, R_0x1cb8, 0xffffff00, val); } else { - odm_set_bb_reg(dm, R_0x970, MASKDWORD, ((fahm_th[3]<<24) |(fahm_th[2]<<16) | (fahm_th[1]<<8) | fahm_th[0])); - odm_set_bb_reg(dm, R_0x974, MASKDWORD, ((fahm_th[7]<<24) |(fahm_th[6]<<16) | (fahm_th[5]<<8) | fahm_th[4])); - odm_set_bb_reg(dm, R_0x978, MASKDWORD, ((fahm_th[10]<<16) | (fahm_th[9]<<8) | fahm_th[8])); - } + val = BYTE_2_DWORD(f_th[3], f_th[2], f_th[1], f_th[0]); + odm_set_bb_reg(dm, R_0x970, MASKDWORD, val); + val = BYTE_2_DWORD(f_th[7], f_th[6], f_th[5], f_th[4]); + odm_set_bb_reg(dm, R_0x974, MASKDWORD, val); + val = BYTE_2_DWORD(0, f_th[10], f_th[9], f_th[8]); + odm_set_bb_reg(dm, R_0x978, 0xffffff, val); + } } -void -phydm_fahm_init( - void *dm_void -) +void phydm_fahm_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - u32 fahm_reg1; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx_info = &dm->dm_ccx_info; + u32 fahm_reg1; + u8 denumerator_sel = 0; - PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __FUNCTION__); - PHYDM_DBG(dm, DBG_ENV_MNTR, "IGI=0x%x\n", dm->dm_dig_table.cur_ig_value); + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); + PHYDM_DBG(dm, DBG_ENV_MNTR, "IGI=0x%x\n", + dm->dm_dig_table.cur_ig_value); - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - fahm_reg1 = 0x994; - } else { - fahm_reg1 = 0x890; - } + if (dm->support_ic_type & ODM_IC_11AC_SERIES) + fahm_reg1 = 0x994; + else + fahm_reg1 = 0x890; ccx_info->fahm_period = 65535; - - odm_set_bb_reg(dm, fahm_reg1, 0x6, 3); /*FAHM HW block enable*/ - - phydm_fahm_set_valid_cnt(dm, FAHM_INCLD_FA, (FAHM_INCLD_FA| FAHM_INCLD_CRC_OK |FAHM_INCLD_CRC_ER)); + + odm_set_bb_reg(dm, fahm_reg1, 0x6, 3); /*@FAHM HW block enable*/ + + denumerator_sel = FAHM_INCLD_FA | FAHM_INCLD_CRC_OK | FAHM_INCLD_CRC_ER; + phydm_fahm_set_valid_cnt(dm, FAHM_INCLD_FA, denumerator_sel); phydm_fahm_set_th_by_igi(dm, dm->dm_dig_table.cur_ig_value); } -void -phydm_fahm_dbg( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +void phydm_fahm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - char help[] = "-h"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; - u32 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx_info = &dm->dm_ccx_info; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + u32 i; for (i = 0; i < 2; i++) { - if (input[i + 1]) { + if (input[i + 1]) PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); - } } if ((strcmp(input[1], help) == 0)) { - PDM_SNPF(out_len, used, output + used, out_len - used, "{1: trigger, 2:get result}\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, "{3: MNTR mode sel} {1: driver, 2. FW}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{1: trigger, 2:get result}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{3: MNTR mode sel} {1: driver, 2. FW}\n"); return; } else if (var1[0] == 1) { /* Set & trigger CLM */ - + phydm_fahm_set_th_by_igi(dm, dm->dm_dig_table.cur_ig_value); phydm_fahm_trigger(dm, ccx_info->fahm_period); - PDM_SNPF(out_len, used, output + used, out_len - used, "Monitor FAHM for %d * 4us\n", - ccx_info->fahm_period); - - } else if (var1[0] == 2) { /* Get CLM results */ + PDM_SNPF(out_len, used, output + used, out_len - used, + "Monitor FAHM for %d * 4us\n", ccx_info->fahm_period); + + } else if (var1[0] == 2) { /* @Get CLM results */ phydm_fahm_get_result(dm); - PDM_SNPF(out_len, used, output + used, out_len - used,"FAHM_result=%d us\n", - (ccx_info->clm_result<<2)); + PDM_SNPF(out_len, used, output + used, out_len - used, + "FAHM_result=%d us\n", (ccx_info->clm_result << 2)); } else { - PDM_SNPF(out_len, used, output + used, out_len - used, "Error\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Error\n"); } - + *_used = used; *_out_len = out_len; } - -#endif /*#ifdef FAHM_SUPPORT*/ +#endif /*@#ifdef FAHM_SUPPORT*/ #ifdef NHM_SUPPORT -void -phydm_nhm_racing_release( - void *dm_void -) +void phydm_nhm_racing_release(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - u32 value32; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u32 value32 = 0; PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); PHYDM_DBG(dm, DBG_ENV_MNTR, "lv:(%d)->(0)\n", ccx->nhm_set_lv); - + ccx->nhm_ongoing = false; ccx->nhm_set_lv = NHM_RELEASE; - if (!((ccx->nhm_app == NHM_BACKGROUND) || (ccx->nhm_app == NHM_ACS))) - phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, 1, &value32); - + if (!(ccx->nhm_app == NHM_BACKGROUND || ccx->nhm_app == NHM_ACS)) { + phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, + PHYDM_PAUSE_LEVEL_1, 1, &value32); + } + ccx->nhm_app = NHM_BACKGROUND; } -u8 -phydm_nhm_racing_ctrl( - void *dm_void, - enum phydm_nhm_level nhm_lv -) +u8 phydm_nhm_racing_ctrl(void *dm_void, enum phydm_nhm_level nhm_lv) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - u8 set_result = PHYDM_SET_SUCCESS; - /*acquire to control NHM API*/ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u8 set_result = PHYDM_SET_SUCCESS; + /*@acquire to control NHM API*/ - PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm_ongoing=%d, lv:(%d)->(%d)\n", + PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm_ongoing=%d, lv:(%d)->(%d)\n", ccx->nhm_ongoing, ccx->nhm_set_lv, nhm_lv); if (ccx->nhm_ongoing) { if (nhm_lv <= ccx->nhm_set_lv) { @@ -394,27 +365,31 @@ phydm_nhm_racing_ctrl( ccx->nhm_ongoing = false; } } - + if (set_result) ccx->nhm_set_lv = nhm_lv; - + PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm racing success=%d\n", set_result); return set_result; } - -void -phydm_nhm_trigger( - void *dm_void -) +void phydm_nhm_trigger(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - u32 nhm_reg1 = (dm->support_ic_type & ODM_IC_11AC_SERIES) ? 0x994 : 0x890; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u32 nhm_reg1 = 0; + if (dm->support_ic_type & ODM_IC_11AC_SERIES) + nhm_reg1 = R_0x994; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + nhm_reg1 = R_0x1e60; + #endif + else + nhm_reg1 = R_0x890; PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); - - /*Trigger NHM*/ + + /* @Trigger NHM*/ pdm_set_reg(dm, nhm_reg1, BIT(1), 0); pdm_set_reg(dm, nhm_reg1, BIT(1), 1); ccx->nhm_trigger_time = dm->phydm_sys_up_time; @@ -423,44 +398,105 @@ phydm_nhm_trigger( } boolean -phydm_nhm_check_rdy( - void *dm_void -) +phydm_nhm_check_rdy(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - boolean is_ready = false; - u32 reg1 = 0, reg1_bit = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean is_ready = false; + u32 reg1 = 0, reg1_bit = 0; +#if (ENV_MNTR_DBG || ENV_MNTR_DBG_1) + u16 i = 0; + u64 start_time = 0, progressing_time = 0; + u32 reg_val_start = 0, reg_val = 0; + u8 print_rpt = 0; +#endif if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - reg1 = 0xfb4; + reg1 = R_0xfb4; reg1_bit = 16; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + reg1 = R_0x2d4c; + reg1_bit = 16; + #endif } else { - reg1 = 0x8b4; - if (dm->support_ic_type == ODM_RTL8710B) { - reg1_bit = 25; + reg1 = R_0x8b4; + if (dm->support_ic_type & (ODM_RTL8710B | ODM_RTL8721D)) { + reg1_bit = 25; } else { reg1_bit = 17; } } +#if (ENV_MNTR_DBG_1) + start_time = odm_get_current_time(dm); + + if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821)) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM_period = %d\n", + odm_get_bb_reg(dm, R_0x990, MASKDWORD)); + + /*NHM trigger bit*/ + reg_val_start = odm_get_bb_reg(dm, R_0x994, BIT(1)); + PHYDM_DBG(dm, DBG_ENV_MNTR, "reg_val_start = %d\n", + reg_val_start); + + for (i = 0; i <= 400; i++) { + if (print_rpt == 0) { + reg_val = odm_get_bb_reg(dm, R_0x994, BIT(1)); + if (reg_val != reg_val_start) { + print_rpt = 1; + PHYDM_DBG(dm, DBG_ENV_MNTR, + "Trig[%d] (%d) -> (%d)\n", + i, reg_val_start, reg_val); + } + } + + if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit))) { + is_ready = true; + break; + } + ODM_delay_ms(1); + } + } else { + if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit))) + is_ready = true; + } + + progressing_time = odm_get_progressing_time(dm, start_time); + PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM rdy=%d, i=%d, NHM_polling_time=%lld\n", + is_ready, i, progressing_time); + +#elif (ENV_MNTR_DBG) + start_time = odm_get_current_time(dm); + for (i = 0; i <= 400; i++) { + if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit))) { + is_ready = true; + break; + } + ODM_delay_ms(1); + } + progressing_time = odm_get_progressing_time(dm, start_time); + PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM rdy=%d, i=%d, NHM_polling_time=%lld\n", + is_ready, i, progressing_time); +#else if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit))) is_ready = true; PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM rdy=%d\n", is_ready); + +#endif return is_ready; } -void -phydm_nhm_get_utility( - void *dm_void -) +void phydm_nhm_get_utility(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - - if (ccx->nhm_rpt_sum >= ccx->nhm_result[0]) - ccx->nhm_ratio = (u8)(((ccx->nhm_rpt_sum - ccx->nhm_result[0]) * 100) >> 8); - else { + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u8 nhm_rpt_non_0 = 0; + + if (ccx->nhm_rpt_sum >= ccx->nhm_result[0]) { + nhm_rpt_non_0 = ccx->nhm_rpt_sum - ccx->nhm_result[0]; + ccx->nhm_ratio = (nhm_rpt_non_0 * 100) >> 8; + } else { PHYDM_DBG(dm, DBG_ENV_MNTR, "[warning] nhm_rpt_sum invalid\n"); ccx->nhm_ratio = 0; } @@ -469,62 +505,96 @@ phydm_nhm_get_utility( } boolean -phydm_nhm_get_result( - void *dm_void -) +phydm_nhm_get_result(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - u32 value32; - u8 i; - u32 nhm_reg1 = (dm->support_ic_type & ODM_IC_11AC_SERIES) ? 0x994 : 0x890; - u16 nhm_rpt_sum_tmp = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u32 value32 = 0; + u8 i = 0; + u32 nhm_reg1 = 0; + u16 nhm_rpt_sum_tmp = 0; + if (dm->support_ic_type & ODM_IC_11AC_SERIES) + nhm_reg1 = R_0x994; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + nhm_reg1 = R_0x1e60; + #endif + else + nhm_reg1 = R_0x890; PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); - pdm_set_reg(dm, nhm_reg1, BIT(1), 0); - if (phydm_nhm_check_rdy(dm) == false) { + if (!(dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F | + ODM_RTL8197G))) + pdm_set_reg(dm, nhm_reg1, BIT(1), 0); + +#if (ENV_MNTR_DBG_2) + PHYDM_DBG(dm, DBG_ENV_MNTR, + "[DBG][3] 0xc50=0x%x, 0x994=0x%x, 0x998=0x%x\n", + odm_get_bb_reg(dm, R_0xc50, MASKDWORD), + odm_get_bb_reg(dm, R_0x994, MASKDWORD), + odm_get_bb_reg(dm, R_0x998, MASKDWORD)); +#endif + + if (!(phydm_nhm_check_rdy(dm))) { PHYDM_DBG(dm, DBG_ENV_MNTR, "Get NHM report Fail\n"); phydm_nhm_racing_release(dm); return false; } if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - value32 = odm_read_4byte(dm, 0xfa8); + value32 = odm_read_4byte(dm, R_0xfa8); odm_move_memory(dm, &ccx->nhm_result[0], &value32, 4); - value32 = odm_read_4byte(dm, 0xfac); + value32 = odm_read_4byte(dm, R_0xfac); odm_move_memory(dm, &ccx->nhm_result[4], &value32, 4); - value32 = odm_read_4byte(dm, 0xfb0); + value32 = odm_read_4byte(dm, R_0xfb0); odm_move_memory(dm, &ccx->nhm_result[8], &value32, 4); - /*Get NHM duration*/ - value32 = odm_read_4byte(dm, 0xfb4); + /*@Get NHM duration*/ + value32 = odm_read_4byte(dm, R_0xfb4); ccx->nhm_duration = (u16)(value32 & MASKLWORD); - } else { - value32 = odm_read_4byte(dm, 0x8d8); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + value32 = odm_read_4byte(dm, R_0x2d40); odm_move_memory(dm, &ccx->nhm_result[0], &value32, 4); - value32 = odm_read_4byte(dm, 0x8dc); + value32 = odm_read_4byte(dm, R_0x2d44); + odm_move_memory(dm, &ccx->nhm_result[4], &value32, 4); + + value32 = odm_read_4byte(dm, R_0x2d48); + odm_move_memory(dm, &ccx->nhm_result[8], &value32, 4); + + /*@Get NHM duration*/ + value32 = odm_read_4byte(dm, R_0x2d4c); + ccx->nhm_duration = (u16)(value32 & MASKLWORD); + #endif + } else { + value32 = odm_read_4byte(dm, R_0x8d8); + odm_move_memory(dm, &ccx->nhm_result[0], &value32, 4); + + value32 = odm_read_4byte(dm, R_0x8dc); odm_move_memory(dm, &ccx->nhm_result[4], &value32, 4); value32 = odm_get_bb_reg(dm, R_0x8d0, 0xffff0000); odm_move_memory(dm, &ccx->nhm_result[8], &value32, 2); - value32 = odm_read_4byte(dm, 0x8d4); - /*odm_move_memory(dm, &ccx->nhm_result[10], (&value32 + 2), 2);*/ + value32 = odm_read_4byte(dm, R_0x8d4); + ccx->nhm_result[10] = (u8)((value32 & MASKBYTE2) >> 16); ccx->nhm_result[11] = (u8)((value32 & MASKBYTE3) >> 24); - - /*Get NHM duration*/ + + /*@Get NHM duration*/ ccx->nhm_duration = (u16)(value32 & MASKLWORD); } - /* sum all nhm_result */ + /* sum all nhm_result */ if (ccx->nhm_period >= 65530) { value32 = (ccx->nhm_duration * 100) >> 16; - PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM valid time = %d, valid: %d percent\n", ccx->nhm_duration, value32); + PHYDM_DBG(dm, DBG_ENV_MNTR, + "NHM valid time = %d, valid: %d percent\n", + ccx->nhm_duration, value32); } for (i = 0; i < NHM_RPT_NUM; i++) @@ -532,17 +602,27 @@ phydm_nhm_get_result( ccx->nhm_rpt_sum = (u8)nhm_rpt_sum_tmp; - PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM_Rpt[%d](H->L)[%d %d %d %d %d %d %d %d %d %d %d %d]\n", - ccx->nhm_rpt_stamp, - ccx->nhm_result[11], ccx->nhm_result[10], ccx->nhm_result[9], - ccx->nhm_result[8], ccx->nhm_result[7], ccx->nhm_result[6], - ccx->nhm_result[5], ccx->nhm_result[4], ccx->nhm_result[3], - ccx->nhm_result[2], ccx->nhm_result[1], ccx->nhm_result[0]); + PHYDM_DBG(dm, DBG_ENV_MNTR, + "NHM_Rpt[%d](H->L)[%d %d %d %d %d %d %d %d %d %d %d %d]\n", + ccx->nhm_rpt_stamp, ccx->nhm_result[11], ccx->nhm_result[10], + ccx->nhm_result[9], ccx->nhm_result[8], ccx->nhm_result[7], + ccx->nhm_result[6], ccx->nhm_result[5], ccx->nhm_result[4], + ccx->nhm_result[3], ccx->nhm_result[2], ccx->nhm_result[1], + ccx->nhm_result[0]); phydm_nhm_racing_release(dm); +#if (ENV_MNTR_DBG_2) + PHYDM_DBG(dm, DBG_ENV_MNTR, + "[DBG][4] 0xc50=0x%x, 0x994=0x%x, 0x998=0x%x\n", + odm_get_bb_reg(dm, R_0xc50, MASKDWORD), + odm_get_bb_reg(dm, R_0x994, MASKDWORD), + odm_get_bb_reg(dm, R_0x998, MASKDWORD)); +#endif + if (nhm_rpt_sum_tmp > 255) { - PHYDM_DBG(dm, DBG_ENV_MNTR, "[Warning] Invalid NHM RPT, total=%d\n", + PHYDM_DBG(dm, DBG_ENV_MNTR, + "[Warning] Invalid NHM RPT, total=%d\n", nhm_rpt_sum_tmp); return false; } @@ -550,69 +630,108 @@ phydm_nhm_get_result( return true; } -void -phydm_nhm_set_th_reg( - void *dm_void -) +void phydm_nhm_set_th_reg(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - u32 reg1 = 0, reg2 = 0, reg3 = 0, reg4 = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u32 reg1 = 0, reg2 = 0, reg3 = 0, reg4 = 0, reg4_bit = 0; + u32 val = 0; PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - reg1 = 0x994; - reg2 = 0x998; - reg3 = 0x99c; - reg4 = 0x9a0; - } else { - reg1 = 0x890; - reg2 = 0x898; - reg3 = 0x89c; - reg4 = 0xe28; - } - - /*Set NHM threshold*/ /*Unit: PWdB U(8,1)*/ - pdm_set_reg(dm, reg2, MASKDWORD, BYTE_2_DWORD(ccx->nhm_th[3], ccx->nhm_th[2], ccx->nhm_th[1], ccx->nhm_th[0])); - pdm_set_reg(dm, reg3, MASKDWORD, BYTE_2_DWORD(ccx->nhm_th[7], ccx->nhm_th[6], ccx->nhm_th[5], ccx->nhm_th[4])); - pdm_set_reg(dm, reg4, MASKBYTE0, ccx->nhm_th[8]); - pdm_set_reg(dm, reg1, 0xffff0000, BYTE_2_DWORD(0, 0, ccx->nhm_th[10], ccx->nhm_th[9])); - PHYDM_DBG(dm, DBG_ENV_MNTR, "Update NHM_th[H->L]=[%d %d %d %d %d %d %d %d %d %d %d]\n", - ccx->nhm_th[10], ccx->nhm_th[9], ccx->nhm_th[8],ccx->nhm_th[7], - ccx->nhm_th[6], ccx->nhm_th[5],ccx->nhm_th[4], ccx->nhm_th[3], - ccx->nhm_th[2], ccx->nhm_th[1], ccx->nhm_th[0]); + if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + reg1 = R_0x994; + reg2 = R_0x998; + reg3 = R_0x99c; + reg4 = R_0x9a0; + reg4_bit = MASKBYTE0; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + reg1 = R_0x1e60; + reg2 = R_0x1e44; + reg3 = R_0x1e48; + reg4 = R_0x1e5c; + reg4_bit = MASKBYTE2; + #endif + } else { + reg1 = R_0x890; + reg2 = R_0x898; + reg3 = R_0x89c; + reg4 = R_0xe28; + reg4_bit = MASKBYTE0; + } + + /*Set NHM threshold*/ /*Unit: PWdB U(8,1)*/ + val = BYTE_2_DWORD(ccx->nhm_th[3], ccx->nhm_th[2], + ccx->nhm_th[1], ccx->nhm_th[0]); + pdm_set_reg(dm, reg2, MASKDWORD, val); + val = BYTE_2_DWORD(ccx->nhm_th[7], ccx->nhm_th[6], + ccx->nhm_th[5], ccx->nhm_th[4]); + pdm_set_reg(dm, reg3, MASKDWORD, val); + pdm_set_reg(dm, reg4, reg4_bit, ccx->nhm_th[8]); + val = BYTE_2_DWORD(0, 0, ccx->nhm_th[10], ccx->nhm_th[9]); + pdm_set_reg(dm, reg1, 0xffff0000, val); + + PHYDM_DBG(dm, DBG_ENV_MNTR, + "Update NHM_th[H->L]=[%d %d %d %d %d %d %d %d %d %d %d]\n", + ccx->nhm_th[10], ccx->nhm_th[9], ccx->nhm_th[8], + ccx->nhm_th[7], ccx->nhm_th[6], ccx->nhm_th[5], + ccx->nhm_th[4], ccx->nhm_th[3], ccx->nhm_th[2], + ccx->nhm_th[1], ccx->nhm_th[0]); } boolean -phydm_nhm_th_update_chk( - void *dm_void, - enum nhm_application nhm_app, - u8 *nhm_th, - u32 *igi_new -) +phydm_nhm_th_update_chk(void *dm_void, enum nhm_application nhm_app, u8 *nhm_th, + u32 *igi_new) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - boolean is_update = false; - u8 igi_curr = dm->dm_dig_table.cur_ig_value; - u8 nhm_igi_th_11k_low[NHM_TH_NUM] = {0x12, 0x15, 0x18, 0x1b, 0x1e, 0x23, 0x28, 0x2c, 0x78, 0x78, 0x78}; - u8 nhm_igi_th_11k_high[NHM_TH_NUM] = {0x1e, 0x23, 0x28, 0x2d, 0x32, 0x37, 0x78, 0x78, 0x78, 0x78, 0x78}; - u8 nhm_igi_th_xbox[NHM_TH_NUM] = {0x1a, 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x3a, 0x3c, 0x3d}; - u8 i; - - PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); - PHYDM_DBG(dm, DBG_ENV_MNTR, "App=%d, nhm_igi=0x%x, igi_curr=0x%x\n", nhm_app, ccx->nhm_igi, igi_curr); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + boolean is_update = false; + u8 igi_curr = phydm_get_igi(dm, BB_PATH_A); + u8 nhm_igi_th_11k_low[NHM_TH_NUM] = {0x12, 0x15, 0x18, 0x1b, 0x1e, + 0x23, 0x28, 0x2c, 0x78, + 0x78, 0x78}; + u8 nhm_igi_th_11k_high[NHM_TH_NUM] = {0x1e, 0x23, 0x28, 0x2d, 0x32, + 0x37, 0x78, 0x78, 0x78, 0x78, + 0x78}; + u8 nhm_igi_th_xbox[NHM_TH_NUM] = {0x1a, 0x2c, 0x2e, 0x30, 0x32, 0x34, + 0x36, 0x38, 0x3a, 0x3c, 0x3d}; + u8 i = 0; + u8 th_tmp = igi_curr - CCA_CAP; + u8 th_step = 2; - if (igi_curr < 0x10)/* Protect for invalid IGI*/ - return false; + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); + PHYDM_DBG(dm, DBG_ENV_MNTR, "App=%d, nhm_igi=0x%x, igi_curr=0x%x\n", + nhm_app, ccx->nhm_igi, igi_curr); + + if (igi_curr < 0x10) /* Protect for invalid IGI*/ + return false; switch (nhm_app) { + case NHM_BACKGROUND: /* @Get IGI form driver parameter(cur_ig_value)*/ + if (ccx->nhm_igi != igi_curr || ccx->nhm_app != nhm_app) { + is_update = true; + *igi_new = (u32)igi_curr; + + #ifdef NHM_DYM_PW_TH_SUPPORT + if ((dm->support_ic_type & ODM_IC_JGR3_SERIES) && + ccx->nhm_dym_pw_th_en) { + th_tmp = MAX_2(igi_curr - DYM_PWTH_CCA_CAP, 0); + th_step = 3; + } + #endif + + nhm_th[0] = (u8)IGI_2_NHM_TH(th_tmp); + + for (i = 1; i <= 10; i++) + nhm_th[i] = nhm_th[0] + + IGI_2_NHM_TH(th_step * i); + + } + break; - case NHM_BACKGROUND: /*Get IGI form driver parameter(cur_ig_value)*/ case NHM_ACS: - if ((ccx->nhm_igi != igi_curr) || (ccx->nhm_app != nhm_app)) { + if (ccx->nhm_igi != igi_curr || ccx->nhm_app != nhm_app) { is_update = true; *igi_new = (u32)igi_curr; nhm_th[0] = (u8)IGI_2_NHM_TH(igi_curr - CCA_CAP); @@ -620,31 +739,31 @@ phydm_nhm_th_update_chk( nhm_th[i] = nhm_th[0] + IGI_2_NHM_TH(2 * i); } break; - + case IEEE_11K_HIGH: is_update = true; *igi_new = 0x2c; for (i = 0; i < NHM_TH_NUM; i++) nhm_th[i] = IGI_2_NHM_TH(nhm_igi_th_11k_high[i]); break; - + case IEEE_11K_LOW: is_update = true; *igi_new = 0x20; for (i = 0; i < NHM_TH_NUM; i++) nhm_th[i] = IGI_2_NHM_TH(nhm_igi_th_11k_low[i]); break; - + case INTEL_XBOX: is_update = true; *igi_new = 0x36; for (i = 0; i < NHM_TH_NUM; i++) nhm_th[i] = IGI_2_NHM_TH(nhm_igi_th_xbox[i]); break; - - case NHM_DBG: /*Get IGI form register*/ - igi_curr = (u8)odm_get_bb_reg(dm, R_0xc50, MASKBYTE0); - if ((ccx->nhm_igi != igi_curr) || (ccx->nhm_app != nhm_app)) { + + case NHM_DBG: /*@Get IGI form register*/ + igi_curr = phydm_get_igi(dm, BB_PATH_A); + if (ccx->nhm_igi != igi_curr || ccx->nhm_app != nhm_app) { is_update = true; *igi_new = (u32)igi_curr; nhm_th[0] = (u8)IGI_2_NHM_TH(igi_curr - CCA_CAP); @@ -655,9 +774,9 @@ phydm_nhm_th_update_chk( } if (is_update) { - PHYDM_DBG(dm, DBG_ENV_MNTR, "[Update NHM_TH] igi_RSSI=%d\n", + PHYDM_DBG(dm, DBG_ENV_MNTR, "[Update NHM_TH] igi_RSSI=%d\n", IGI_2_RSSI(*igi_new)); - + for (i = 0; i < NHM_TH_NUM; i++) { PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM_th[%d](RSSI) = %d\n", i, NTH_TH_2_RSSI(nhm_th[i])); @@ -668,61 +787,70 @@ phydm_nhm_th_update_chk( return is_update; } -void -phydm_nhm_set( - void *dm_void, - enum nhm_inexclude_txon_all include_tx, - enum nhm_inexclude_cca_all include_cca, - enum nhm_divider_opt_all divi_opt, - enum nhm_application nhm_app, - u16 period -) +void phydm_nhm_set(void *dm_void, enum nhm_option_txon_all include_tx, + enum nhm_option_cca_all include_cca, + enum nhm_divider_opt_all divi_opt, + enum nhm_application nhm_app, u16 period) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - u8 nhm_th[NHM_TH_NUM] = {0}; - u8 i = 0; - u32 igi = 0x20; - u32 reg1 = 0, reg2 = 0; - u32 val_tmp = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u8 nhm_th[NHM_TH_NUM] = {0}; + u32 igi = 0x20; + u32 reg1 = 0, reg2 = 0; + u32 val_tmp = 0; PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); - PHYDM_DBG(dm, DBG_ENV_MNTR, "incld{tx, cca}={%d, %d}, divi_opt=%d, period=%d\n", + PHYDM_DBG(dm, DBG_ENV_MNTR, + "incld{tx, cca}={%d, %d}, divi_opt=%d, period=%d\n", include_tx, include_cca, divi_opt, period); if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - reg1 = 0x994; - reg2 = 0x990; + reg1 = R_0x994; + reg2 = R_0x990; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + reg1 = R_0x1e60; + reg2 = R_0x1e40; + #endif } else { - reg1 = 0x890; - reg2 = 0x894; + reg1 = R_0x890; + reg2 = R_0x894; } /*Set disable_ignore_cca, disable_ignore_txon, ccx_en*/ - if ((include_tx != ccx->nhm_include_txon) || - (include_cca != ccx->nhm_include_cca) || - (divi_opt != ccx->nhm_divider_opt)) { - - val_tmp = (u32)BIT_2_BYTE(divi_opt, include_tx, include_cca, 1); - pdm_set_reg(dm, reg1, 0xf00, val_tmp); - + if (include_tx != ccx->nhm_include_txon || + include_cca != ccx->nhm_include_cca || + divi_opt != ccx->nhm_divider_opt) { + /* some old ic is not supported on NHM divider option */ + if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8723B | + ODM_RTL8195A | ODM_RTL8192E)) { + val_tmp = (u32)((include_tx << 2) | + (include_cca << 1) | 1); + pdm_set_reg(dm, reg1, 0x700, val_tmp); + } else { + val_tmp = (u32)BIT_2_BYTE(divi_opt, include_tx, + include_cca, 1); + pdm_set_reg(dm, reg1, 0xf00, val_tmp); + } ccx->nhm_include_txon = include_tx; ccx->nhm_include_cca = include_cca; ccx->nhm_divider_opt = divi_opt; - /* - PHYDM_DBG(dm, DBG_ENV_MNTR, "val_tmp=%d, incld{tx, cca}={%d, %d}, divi_opt=%d, period=%d\n", - val_tmp, include_tx, include_cca, divi_opt, period); + #if 0 + PHYDM_DBG(dm, DBG_ENV_MNTR, + "val_tmp=%d, incld{tx, cca}={%d, %d}, divi_opt=%d, period=%d\n", + val_tmp, include_tx, include_cca, divi_opt, period); - PHYDM_DBG(dm, DBG_ENV_MNTR, "0x994=0x%x\n", odm_get_bb_reg(dm, 0x994, 0xf00)); - */ - + PHYDM_DBG(dm, DBG_ENV_MNTR, "0x994=0x%x\n", + odm_get_bb_reg(dm, 0x994, 0xf00)); + #endif } - + /*Set NHM period*/ if (period != ccx->nhm_period) { pdm_set_reg(dm, reg2, MASKHWORD, period); - PHYDM_DBG(dm, DBG_ENV_MNTR, "Update NHM period ((%d)) -> ((%d))\n", + PHYDM_DBG(dm, DBG_ENV_MNTR, + "Update NHM period ((%d)) -> ((%d))\n", ccx->nhm_period, period); ccx->nhm_period = period; @@ -730,11 +858,12 @@ phydm_nhm_set( /*Set NHM threshold*/ if (phydm_nhm_th_update_chk(dm, nhm_app, &(nhm_th[0]), &igi)) { - /*Pause IGI*/ - if ((nhm_app == NHM_BACKGROUND) || (nhm_app == NHM_ACS)) { + if (nhm_app == NHM_BACKGROUND || nhm_app == NHM_ACS) { PHYDM_DBG(dm, DBG_ENV_MNTR, "DIG Free Run\n"); - } else if (phydm_pause_func(dm, F00_DIG, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, 1, &igi) == PAUSE_FAIL) { + } else if (phydm_pause_func(dm, F00_DIG, PHYDM_PAUSE, + PHYDM_PAUSE_LEVEL_1, 1, &igi) + == PAUSE_FAIL) { PHYDM_DBG(dm, DBG_ENV_MNTR, "pause DIG Fail\n"); return; } else { @@ -749,15 +878,11 @@ phydm_nhm_set( } } -u8 -phydm_nhm_mntr_set( - void *dm_void, - struct nhm_para_info *nhm_para -) +u8 phydm_nhm_mntr_set(void *dm_void, struct nhm_para_info *nhm_para) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u16 nhm_time = 0; /*unit: 4us*/ - + struct dm_struct *dm = (struct dm_struct *)dm_void; + u16 nhm_time = 0; /*unit: 4us*/ + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); if (nhm_para->mntr_time == 0) @@ -770,28 +895,317 @@ phydm_nhm_mntr_set( if (phydm_nhm_racing_ctrl(dm, nhm_para->nhm_lv) == PHYDM_SET_FAIL) return PHYDM_SET_FAIL; - + if (nhm_para->mntr_time >= 262) nhm_time = NHM_PERIOD_MAX; else nhm_time = nhm_para->mntr_time * MS_TO_4US_RATIO; - phydm_nhm_set(dm, nhm_para->incld_txon, nhm_para->incld_cca, nhm_para->div_opt, nhm_para->nhm_app, nhm_time); - + phydm_nhm_set(dm, nhm_para->incld_txon, nhm_para->incld_cca, + nhm_para->div_opt, nhm_para->nhm_app, nhm_time); + return PHYDM_SET_SUCCESS; } -/*Environment Monitor*/ -boolean -phydm_nhm_mntr_chk( - void *dm_void, - u16 monitor_time /*unit ms*/ -) +#ifdef NHM_DYM_PW_TH_SUPPORT +void +phydm_nhm_restore_pw_th(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - struct nhm_para_info nhm_para = {0}; - boolean nhm_chk_result = false; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + + odm_set_bb_reg(dm, R_0x82c, 0x3f, ccx->nhm_pw_th_rf20_dft); +} + +void +phydm_nhm_set_pw_th(void *dm_void, u8 noise, boolean chk_succ) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u8 pre_pw_th_rf20 = 0; + u8 new_pw_th_rf20 = 0; + u8 pw_th_u_bnd = 0; + s8 noise_diff = 0; + u8 point_mean = 15; + + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); + + if (*dm->band_width != CHANNEL_WIDTH_20 || + *dm->band_type == ODM_BAND_5G) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "bandwidth=((%d)), band=((%d))\n", + *dm->band_width, *dm->band_type); + phydm_nhm_restore_pw_th(dm); + return; + } + + pre_pw_th_rf20 = (u8)odm_get_bb_reg(dm, R_0x82c, 0x3f); + + /* @pre_pw_th can not be lower than default value*/ + if (pre_pw_th_rf20 < ccx->nhm_pw_th_rf20_dft) { + PHYDM_DBG(dm, DBG_ENV_MNTR, + "pre_pw_th=((%d)), new_pw_th=((%d))\n", + pre_pw_th_rf20, ccx->nhm_pw_th_rf20_dft); + + phydm_nhm_restore_pw_th(dm); + return; + } + + if (chk_succ) { + noise_diff = noise - (ccx->nhm_igi - 10); + pw_th_u_bnd = (u8)(noise_diff + 32 + point_mean); + + pw_th_u_bnd = MIN_2(pw_th_u_bnd, ccx->nhm_pw_th_max); + + PHYDM_DBG(dm, DBG_ENV_MNTR, + "noise_diff=((%d)), max=((%d)), pw_th_u_bnd=((%d))\n", + noise_diff, ccx->nhm_pw_th_max, pw_th_u_bnd); + + if (pw_th_u_bnd > pre_pw_th_rf20) { + new_pw_th_rf20 = pre_pw_th_rf20 + 1; + } else if (pw_th_u_bnd == pre_pw_th_rf20) { + new_pw_th_rf20 = pre_pw_th_rf20; + } else { + if (pre_pw_th_rf20 > ccx->nhm_pw_th_rf20_dft) + new_pw_th_rf20 = pre_pw_th_rf20 - 1; + else /* @pre_pw_th = ccx->nhm_pw_th_dft*/ + new_pw_th_rf20 = pre_pw_th_rf20; + } + } else { + if (pre_pw_th_rf20 > ccx->nhm_pw_th_rf20_dft) + new_pw_th_rf20 = pre_pw_th_rf20 - 1; + else /* @pre_pw_th = ccx->nhm_pw_th_dft*/ + new_pw_th_rf20 = pre_pw_th_rf20; + } + + PHYDM_DBG(dm, DBG_ENV_MNTR, "pre_pw_th=((%d)), new_pw_th=((%d))\n", + pre_pw_th_rf20, new_pw_th_rf20); + + if (new_pw_th_rf20 != pre_pw_th_rf20) + odm_set_bb_reg(dm, R_0x82c, 0x3f, new_pw_th_rf20); +} + +u8 +phydm_nhm_cal_noise(void *dm_void, u8 start_i, u8 end_i, u8 n_sum) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u8 i = 0; + u32 noise_tmp = 0; + u8 noise = 0; + + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); + + for (i = start_i; i <= end_i; i++) + noise_tmp += ccx->nhm_result[i] * (ccx->nhm_th[0] - 3 + + 6 * i); + + noise = (u8)(NTH_TH_2_RSSI(noise_tmp / n_sum)); + PHYDM_DBG(dm, DBG_ENV_MNTR, "noise(RSSI)=((%d))\n", noise); + + return noise; +} + +void +phydm_nhm_dym_pw_th_1peak(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u8 i = 0; + u8 max_i = 0; + u8 m_dif_l1 = 0; + u8 m_dif_r1 = 0; + u8 patt_case = 0; + u8 l1_dif_r2 = 0; + u8 l2_dif_r1 = 0; + u8 l1_dif_r1 = 0; + u8 n_sum = 0; + u8 r1_dif_r2 = 0; + u8 l1_dif_l2 = 0; + u8 noise = 0; + boolean chk_succ = false; + + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); + + /* @step1*/ + for (i = 1; i < NHM_RPT_NUM; i++) { + if (ccx->nhm_result[i] >= ccx->nhm_result[max_i]) + max_i = i; + } + + if (max_i == 0 || max_i == (NHM_RPT_NUM - 1)) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "max index can not be 0 or 11\n"); + phydm_nhm_set_pw_th(dm, 0, chk_succ); + return; + } + + /* @step2*/ + m_dif_l1 = ccx->nhm_result[max_i] - ccx->nhm_result[max_i - 1]; + m_dif_r1 = ccx->nhm_result[max_i] - ccx->nhm_result[max_i + 1]; + + if (m_dif_r1 <= NHM_TH1 && (max_i != NHM_RPT_NUM - 1)) + patt_case = NHM_1PEAK_PS; + else if ((m_dif_l1 <= NHM_TH1) && (max_i != 0)) + patt_case = NHM_1PEAK_NS; + else + patt_case = NHM_1PEAK_SYM; + + switch (patt_case) { + case NHM_1PEAK_PS: + /* @step3*/ + l1_dif_r2 = DIFF_2(ccx->nhm_result[max_i - 1], + ccx->nhm_result[max_i + 2]); + if (l1_dif_r2 > NHM_TH2) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "S3 fail:c1((%d))\n", + l1_dif_r2); + break; + } + /* @step4*/ + n_sum = ccx->nhm_result[max_i - 1] + ccx->nhm_result[max_i] + + ccx->nhm_result[max_i + 1] + ccx->nhm_result[max_i + 2]; + if (n_sum < NHM_TH4) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "S4 fail:((%d))\n", n_sum); + break; + } + /* @step5*/ + r1_dif_r2 = DIFF_2(ccx->nhm_result[max_i + 1], + ccx->nhm_result[max_i + 2]); + if (m_dif_l1 < NHM_TH5 || r1_dif_r2 < NHM_TH5) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "S5 fail:c1((%d, %d))\n", + m_dif_l1, r1_dif_r2); + break; + } + /* @step6*/ + chk_succ = true; + noise = phydm_nhm_cal_noise(dm, max_i - 1, max_i + 2, n_sum); + break; + case NHM_1PEAK_NS: + /* @step3*/ + l2_dif_r1 = DIFF_2(ccx->nhm_result[max_i - 2], + ccx->nhm_result[max_i + 1]); + if (l2_dif_r1 > NHM_TH2) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "S3 fail:c2((%d))\n", + l2_dif_r1); + break; + } + /* @step4*/ + n_sum = ccx->nhm_result[max_i - 2] + + ccx->nhm_result[max_i - 1] + + ccx->nhm_result[max_i] + ccx->nhm_result[max_i + 1]; + if (n_sum < NHM_TH4) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "S4 fail:((%d))\n", n_sum); + break; + } + /* @step5*/ + l1_dif_l2 = DIFF_2(ccx->nhm_result[max_i - 1], + ccx->nhm_result[max_i - 2]); + if (m_dif_r1 < NHM_TH5 || l1_dif_l2 < NHM_TH5) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "S5 fail:c2((%d, %d))\n", + m_dif_r1, l1_dif_l2); + break; + } + /* @step6*/ + chk_succ = true; + noise = phydm_nhm_cal_noise(dm, max_i - 2, max_i + 1, n_sum); + + break; + case NHM_1PEAK_SYM: + /* @step3*/ + l1_dif_r1 = DIFF_2(ccx->nhm_result[max_i - 1], + ccx->nhm_result[max_i + 1]); + if (l1_dif_r1 > NHM_TH3) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "S3 fail: c3((%d))\n", + l1_dif_r1); + break; + } + /* @step4*/ + n_sum = ccx->nhm_result[max_i - 1] + ccx->nhm_result[max_i] + + ccx->nhm_result[max_i + 1]; + if (n_sum < NHM_TH4) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "S4 fail:((%d))\n", n_sum); + break; + } + /* @step5*/ + if (m_dif_l1 < NHM_TH6 || m_dif_r1 < NHM_TH6) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "S5 fail:c3((%d, %d))\n", + m_dif_l1, m_dif_r1); + break; + } + /* @step6*/ + chk_succ = true; + noise = phydm_nhm_cal_noise(dm, max_i - 1, max_i + 1, n_sum); + + break; + } + phydm_nhm_set_pw_th(dm, noise, chk_succ); +} + +void +phydm_nhm_dym_pw_th_sl(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u8 i = 0; + u8 n_sum = 0; + u8 noise = 0; + boolean chk_succ = false; + + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); + + for (i = 0; i < NHM_RPT_NUM - 3; i++) { + n_sum = ccx->nhm_result[i] + ccx->nhm_result[i + 1] + + ccx->nhm_result[i + 2] + ccx->nhm_result[i + 3]; + if (n_sum >= ccx->nhm_sl_pw_th) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "Do sl[%d:%d]\n", i, i + 3); + chk_succ = true; + noise = phydm_nhm_cal_noise(dm, i, i + 3, n_sum); + break; + } + } + + if (!chk_succ) + PHYDM_DBG(dm, DBG_ENV_MNTR, "SL method failed!\n"); + + phydm_nhm_set_pw_th(dm, noise, chk_succ); +} + +void +phydm_nhm_dym_pw_th(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + + if (ccx->nhm_dym_1_peak_en) + phydm_nhm_dym_pw_th_1peak(dm); + else + phydm_nhm_dym_pw_th_sl(dm); +} + +void +phydm_nhm_dym_pw_th_patch_id_chk(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + + if (dm->iot_table.phydm_patch_id == 0x100f0401) { + ccx->nhm_dym_pw_th_en = true; + } else { + if (ccx->nhm_dym_pw_th_en) { + phydm_nhm_restore_pw_th(dm); + ccx->nhm_dym_pw_th_en = false; + } + } +} +#endif + +/*@Environment Monitor*/ +boolean +phydm_nhm_mntr_chk(void *dm_void, u16 monitor_time /*unit ms*/) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + struct nhm_para_info nhm_para = {0}; + boolean nhm_chk_result = false; + u32 sys_return_time = 0; PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); @@ -799,45 +1213,73 @@ phydm_nhm_mntr_chk( PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM in manual ctrl\n"); return nhm_chk_result; } + sys_return_time = ccx->nhm_trigger_time + MAX_ENV_MNTR_TIME; + if (ccx->nhm_app != NHM_BACKGROUND && + (sys_return_time > dm->phydm_sys_up_time)) { + PHYDM_DBG(dm, DBG_ENV_MNTR, + "nhm_app=%d, trigger_time %d, sys_time=%d\n", + ccx->nhm_app, ccx->nhm_trigger_time, + dm->phydm_sys_up_time); - if (ccx->nhm_app != NHM_BACKGROUND && - ((ccx->nhm_trigger_time + MAX_ENV_MNTR_TIME) > dm->phydm_sys_up_time)) { - - PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm_app=%d, trigger_time %d, sys_time=%d\n", - ccx->nhm_app, ccx->nhm_trigger_time, dm->phydm_sys_up_time); - return nhm_chk_result; } - - /*[NHM get result & calculate Utility----------------------------*/ + + /*@[NHM get result & calculate Utility----------------------------*/ + #ifdef NHM_DYM_PW_TH_SUPPORT + phydm_nhm_dym_pw_th_patch_id_chk(dm); + #endif + if (phydm_nhm_get_result(dm)) { PHYDM_DBG(dm, DBG_ENV_MNTR, "Get NHM_rpt success\n"); phydm_nhm_get_utility(dm); + + #ifdef NHM_DYM_PW_TH_SUPPORT + if ((dm->support_ic_type & ODM_IC_JGR3_SERIES) && + ccx->nhm_dym_pw_th_en) + phydm_nhm_dym_pw_th(dm); + #endif + } else { + #ifdef NHM_DYM_PW_TH_SUPPORT + if ((dm->support_ic_type & ODM_IC_JGR3_SERIES) && + ccx->nhm_dym_pw_th_en) + phydm_nhm_set_pw_th(dm, 0, false); + #endif } - /*[NHM trigger]-------------------------------------------------*/ + /*@[NHM trigger setting]------------------------------------------*/ nhm_para.incld_txon = NHM_EXCLUDE_TXON; nhm_para.incld_cca = NHM_EXCLUDE_CCA; - nhm_para.div_opt = NHM_CNT_ALL; + #ifdef NHM_DYM_PW_TH_SUPPORT + if ((dm->support_ic_type & ODM_IC_JGR3_SERIES) && + ccx->nhm_app == NHM_BACKGROUND && ccx->nhm_dym_pw_th_en) + nhm_para.div_opt = NHM_VALID; + else + #endif + nhm_para.div_opt = NHM_CNT_ALL; + nhm_para.nhm_app = NHM_BACKGROUND; - nhm_para.nhm_lv = NHM_LV_1; - nhm_para.mntr_time = monitor_time; - + nhm_para.nhm_lv = NHM_LV_1; + #ifdef NHM_DYM_PW_TH_SUPPORT + if ((dm->support_ic_type & ODM_IC_JGR3_SERIES) && + ccx->nhm_app == NHM_BACKGROUND && ccx->nhm_dym_pw_th_en) + nhm_para.mntr_time = monitor_time >> ccx->nhm_period_decre; + else + #endif + nhm_para.mntr_time = monitor_time; + nhm_chk_result = phydm_nhm_mntr_set(dm, &nhm_para); - + return nhm_chk_result; } -void -phydm_nhm_init( - void *dm_void -) +void phydm_nhm_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; - PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __FUNCTION__); - PHYDM_DBG(dm, DBG_ENV_MNTR, "cur_igi=0x%x\n", dm->dm_dig_table.cur_ig_value); + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); + PHYDM_DBG(dm, DBG_ENV_MNTR, "cur_igi=0x%x\n", + dm->dm_dig_table.cur_ig_value); ccx->nhm_app = NHM_BACKGROUND; ccx->nhm_igi = 0xff; @@ -846,66 +1288,123 @@ phydm_nhm_init( ccx->nhm_ongoing = false; ccx->nhm_set_lv = NHM_RELEASE; - if (phydm_nhm_th_update_chk(dm, ccx->nhm_app, &(ccx->nhm_th[0]), (u32*)(&ccx->nhm_igi))) { + if (phydm_nhm_th_update_chk(dm, ccx->nhm_app, &ccx->nhm_th[0], + (u32 *)&ccx->nhm_igi)) phydm_nhm_set_th_reg(dm); - } + ccx->nhm_period = 0; - + ccx->nhm_include_cca = NHM_CCA_INIT; ccx->nhm_include_txon = NHM_TXON_INIT; ccx->nhm_divider_opt = NHM_CNT_INIT; - + ccx->nhm_manual_ctrl = 0; ccx->nhm_rpt_stamp = 0; + + #ifdef NHM_DYM_PW_TH_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + ccx->nhm_dym_pw_th_en = false; + ccx->nhm_dym_1_peak_en = false; + ccx->nhm_pw_th_rf20_dft = (u8)odm_get_bb_reg(dm, R_0x82c, 0x3f); + ccx->nhm_pw_th_max = 63; + ccx->nhm_sl_pw_th = 100; /* @39%*/ + ccx->nhm_period_decre = 1; + } + #endif } -void -phydm_nhm_dbg( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +void phydm_nhm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - struct nhm_para_info nhm_para; - char help[] = "-h"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; - boolean nhm_rpt_success = true; - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + struct nhm_para_info nhm_para; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + boolean nhm_rpt_success = true; + u8 result_tmp = 0; + u8 i; PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); - - if ((strcmp(input[1], help) == 0)) { - PDM_SNPF(out_len, used, output + used, out_len - used, "NHM Basic-Trigger 262ms: {1}\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, "NHM Adv-Trigger: {2} {Include TXON} {Include CCA}\n{0:Cnt_all, 1:Cnt valid} {App} {LV} {0~262ms}\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, "NHM Get Result: {100}\n"); - } else if (var1[0] == 100) { /*Get NHM results*/ - PDM_SNPF(out_len, used, output + used, out_len - used, "IGI=0x%x, rpt_stamp=%d\n", ccx->nhm_igi, ccx->nhm_rpt_stamp); + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "NHM Basic-Trigger 262ms: {1}\n"); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "NHM Adv-Trigger: {2} {Include TXON} {Include CCA}\n{0:Cnt_all, 1:Cnt valid} {App} {LV} {0~262ms}\n"); + #ifdef NHM_DYM_PW_TH_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "NHM dym_pw_th: {3} {en} {en_1-peak} {max} {period_decre} {sl_th}\n"); + } + #endif + + PDM_SNPF(out_len, used, output + used, out_len - used, + "NHM Get Result: {100}\n"); + } else if (var1[0] == 100) { /*@Get NHM results*/ + + PDM_SNPF(out_len, used, output + used, out_len - used, + "IGI=0x%x, rpt_stamp=%d\n", ccx->nhm_igi, + ccx->nhm_rpt_stamp); nhm_rpt_success = phydm_nhm_get_result(dm); if (nhm_rpt_success) { for (i = 0; i <= 11; i++) { - PDM_SNPF(out_len, used, output + used, out_len - used, "nhm_rpt[%d] = %d (%d percent)\n", - i, ccx->nhm_result[i], - (((ccx->nhm_result[i] * 100) + 128) >> 8)); + result_tmp = ccx->nhm_result[i]; + PDM_SNPF(out_len, used, output + used, + out_len - used, + "nhm_rpt[%d] = %d (%d percent)\n", + i, result_tmp, + (((result_tmp * 100) + 128) >> 8)); } } else { - PDM_SNPF(out_len, used, output + used, out_len - used, "Get NHM_rpt Fail\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Get NHM_rpt Fail\n"); } ccx->nhm_manual_ctrl = 0; - - } else { /* NMH trigger */ - + #ifdef NHM_DYM_PW_TH_SUPPORT + } else if (var1[0] == 3) { /* @NMH dym_pw_th*/ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + for (i = 1; i < 7; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, + &var1[i]); + } + } + + if (var1[1] == 1) { + ccx->nhm_dym_pw_th_en = true; + ccx->nhm_dym_1_peak_en = (boolean)var1[2]; + ccx->nhm_pw_th_max = (u8)var1[3]; + ccx->nhm_period_decre = (u8)var1[4]; + ccx->nhm_sl_pw_th = (u8)var1[5]; + } else if (var1[1] == 0) { + ccx->nhm_dym_pw_th_en = false; + phydm_nhm_restore_pw_th(dm); + } else if (var1[1] == 2) { + ccx->nhm_dym_pw_th_en = true; + ccx->nhm_dym_1_peak_en = false; + ccx->nhm_pw_th_max = 63; + ccx->nhm_period_decre = 1; + ccx->nhm_sl_pw_th = 100; + } + } + #endif + } else { /*NMH trigger*/ + ccx->nhm_manual_ctrl = 1; + for (i = 1; i < 7; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, + &var1[i]); + } + } + if (var1[0] == 1) { nhm_para.incld_txon = NHM_EXCLUDE_TXON; nhm_para.incld_cca = NHM_EXCLUDE_CCA; @@ -914,506 +1413,69 @@ phydm_nhm_dbg( nhm_para.nhm_lv = NHM_LV_4; nhm_para.mntr_time = 262; } else { - for (i = 1; i < 7; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); - } - } - nhm_para.incld_txon = (enum nhm_inexclude_txon_all)var1[1]; - nhm_para.incld_cca = (enum nhm_inexclude_cca_all)var1[2]; + nhm_para.incld_txon = (enum nhm_option_txon_all)var1[1]; + nhm_para.incld_cca = (enum nhm_option_cca_all)var1[2]; nhm_para.div_opt = (enum nhm_divider_opt_all)var1[3]; nhm_para.nhm_app = (enum nhm_application)var1[4]; nhm_para.nhm_lv = (enum phydm_nhm_level)var1[5]; nhm_para.mntr_time = (u16)var1[6]; + + /* some old ic is not supported on NHM divider option */ + if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8723B | + ODM_RTL8195A | ODM_RTL8192E)) { + nhm_para.div_opt = NHM_CNT_ALL; + } } - PDM_SNPF(out_len, used, output + used, out_len - used, " txon=%d, cca=%d, dev=%d, app=%d, lv=%d, time=%d ms\n", - nhm_para.incld_txon, nhm_para.incld_cca, - nhm_para.div_opt, nhm_para.nhm_app, nhm_para.nhm_lv, - nhm_para.mntr_time); - - if (phydm_nhm_mntr_set(dm, &nhm_para) == PHYDM_SET_SUCCESS) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "txon=%d, cca=%d, dev=%d, app=%d, lv=%d, time=%d ms\n", + nhm_para.incld_txon, nhm_para.incld_cca, + nhm_para.div_opt, nhm_para.nhm_app, + nhm_para.nhm_lv, nhm_para.mntr_time); + + if (phydm_nhm_mntr_set(dm, &nhm_para) == PHYDM_SET_SUCCESS) phydm_nhm_trigger(dm); - } - - PDM_SNPF(out_len, used, output + used, out_len - used, "IGI=0x%x, rpt_stamp=%d\n", - ccx->nhm_igi, ccx->nhm_rpt_stamp); - + + PDM_SNPF(out_len, used, output + used, out_len - used, + "IGI=0x%x, rpt_stamp=%d\n", ccx->nhm_igi, + ccx->nhm_rpt_stamp); + for (i = 0; i <= 10; i++) { - PDM_SNPF(out_len, used, output + used, out_len - used, "NHM_th[%d] RSSI = %d\n", - i, NTH_TH_2_RSSI(ccx->nhm_th[i])); + PDM_SNPF(out_len, used, output + used, out_len - used, + "NHM_th[%d] RSSI = %d\n", i, + NTH_TH_2_RSSI(ccx->nhm_th[i])); } } - + *_used = used; *_out_len = out_len; } -#endif /*#ifdef NHM_SUPPORT*/ - -#if 1 - -void -phydm_set_nhm_th_by_igi( - void *dm_void, - u8 igi -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - u8 th_gap = 2 * IGI_TO_NHM_TH_MULTIPLIER; - u8 i; - - ccx_info->echo_igi = igi; - ccx_info->nhm_th[0] = (ccx_info->echo_igi - CCA_CAP) * IGI_TO_NHM_TH_MULTIPLIER; - for (i = 1; i <= 10; i++) - ccx_info->nhm_th[i] = ccx_info->nhm_th[0] + th_gap * i; -} - - - -void -phydm_nhm_setting( - void *dm_void, - u8 nhm_setting -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - - PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __FUNCTION__); - - - PHYDM_DBG(dm, DBG_ENV_MNTR, "IGI=0x%x\n", ccx_info->echo_igi); - - if (nhm_setting == SET_NHM_SETTING) { - PHYDM_DBG(dm, DBG_ENV_MNTR, - "NHM_th[H->L]=[0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x]\n", - ccx_info->nhm_th[10], ccx_info->nhm_th[9], ccx_info->nhm_th[8], - ccx_info->nhm_th[7], ccx_info->nhm_th[6], ccx_info->nhm_th[5], - ccx_info->nhm_th[4], ccx_info->nhm_th[3], ccx_info->nhm_th[2], - ccx_info->nhm_th[1], ccx_info->nhm_th[0]); - } - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - if (nhm_setting == SET_NHM_SETTING) { - /*Set inexclude_cca, inexclude_txon*/ - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(9), ccx_info->nhm_include_cca); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(10), ccx_info->nhm_include_txon); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(11), ccx_info->nhm_divider_opt); - - /*Set NHM period*/ - odm_set_bb_reg(dm, ODM_REG_CCX_PERIOD_11AC, MASKHWORD, ccx_info->nhm_period); - - /*Set NHM threshold*/ /*Unit: PWdB U(8,1)*/ - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE0, ccx_info->nhm_th[0]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE1, ccx_info->nhm_th[1]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE2, ccx_info->nhm_th[2]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE3, ccx_info->nhm_th[3]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE0, ccx_info->nhm_th[4]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE1, ccx_info->nhm_th[5]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE2, ccx_info->nhm_th[6]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE3, ccx_info->nhm_th[7]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH8_11AC, MASKBYTE0, ccx_info->nhm_th[8]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE2, ccx_info->nhm_th[9]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE3, ccx_info->nhm_th[10]); - - /*CCX EN*/ - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(8), CCX_EN); - - } else if (nhm_setting == STORE_NHM_SETTING) { - /*Store pervious disable_ignore_cca, disable_ignore_txon*/ - ccx_info->nhm_inexclude_cca_restore = (enum nhm_inexclude_cca_all)odm_get_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(9)); - ccx_info->nhm_inexclude_txon_restore = (enum nhm_inexclude_txon_all)odm_get_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(10)); - - /*Store pervious NHM period*/ - ccx_info->nhm_period_restore = (u16)odm_get_bb_reg(dm, ODM_REG_CCX_PERIOD_11AC, MASKHWORD); - - /*Store NHM threshold*/ - ccx_info->nhm_th_restore[0] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE0); - ccx_info->nhm_th_restore[1] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE1); - ccx_info->nhm_th_restore[2] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE2); - ccx_info->nhm_th_restore[3] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE3); - ccx_info->nhm_th_restore[4] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE0); - ccx_info->nhm_th_restore[5] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE1); - ccx_info->nhm_th_restore[6] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE2); - ccx_info->nhm_th_restore[7] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE3); - ccx_info->nhm_th_restore[8] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH8_11AC, MASKBYTE0); - ccx_info->nhm_th_restore[9] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE2); - ccx_info->nhm_th_restore[10] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE3); - } else if (nhm_setting == RESTORE_NHM_SETTING) { - /*Set disable_ignore_cca, disable_ignore_txon*/ - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(9), ccx_info->nhm_inexclude_cca_restore); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(10), ccx_info->nhm_inexclude_txon_restore); - - /*Set NHM period*/ - odm_set_bb_reg(dm, ODM_REG_CCX_PERIOD_11AC, MASKHWORD, ccx_info->nhm_period); - - /*Set NHM threshold*/ - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE0, ccx_info->nhm_th_restore[0]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE1, ccx_info->nhm_th_restore[1]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE2, ccx_info->nhm_th_restore[2]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE3, ccx_info->nhm_th_restore[3]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE0, ccx_info->nhm_th_restore[4]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE1, ccx_info->nhm_th_restore[5]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE2, ccx_info->nhm_th_restore[6]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE3, ccx_info->nhm_th_restore[7]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH8_11AC, MASKBYTE0, ccx_info->nhm_th_restore[8]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE2, ccx_info->nhm_th_restore[9]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE3, ccx_info->nhm_th_restore[10]); - } else - return; - } - - else if (dm->support_ic_type & ODM_IC_11N_SERIES) { - if (nhm_setting == SET_NHM_SETTING) { - /*Set disable_ignore_cca, disable_ignore_txon*/ - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, BIT(9), ccx_info->nhm_include_cca); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, BIT(10), ccx_info->nhm_include_txon); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, BIT(11), ccx_info->nhm_divider_opt); - - /*Set NHM period*/ - odm_set_bb_reg(dm, ODM_REG_CCX_PERIOD_11N, MASKHWORD, ccx_info->nhm_period); - - /*Set NHM threshold*/ - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE0, ccx_info->nhm_th[0]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE1, ccx_info->nhm_th[1]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE2, ccx_info->nhm_th[2]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE3, ccx_info->nhm_th[3]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE0, ccx_info->nhm_th[4]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE1, ccx_info->nhm_th[5]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE2, ccx_info->nhm_th[6]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE3, ccx_info->nhm_th[7]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH8_11N, MASKBYTE0, ccx_info->nhm_th[8]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE2, ccx_info->nhm_th[9]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE3, ccx_info->nhm_th[10]); - - /*CCX EN*/ - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, BIT(8), CCX_EN); - } else if (nhm_setting == STORE_NHM_SETTING) { - /*Store pervious disable_ignore_cca, disable_ignore_txon*/ - ccx_info->nhm_inexclude_cca_restore = (enum nhm_inexclude_cca_all)odm_get_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, BIT(9)); - ccx_info->nhm_inexclude_txon_restore = (enum nhm_inexclude_txon_all)odm_get_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, BIT(10)); - - /*Store pervious NHM period*/ - ccx_info->nhm_period_restore = (u16)odm_get_bb_reg(dm, ODM_REG_CCX_PERIOD_11N, MASKHWORD); - - /*Store NHM threshold*/ - ccx_info->nhm_th_restore[0] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE0); - ccx_info->nhm_th_restore[1] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE1); - ccx_info->nhm_th_restore[2] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE2); - ccx_info->nhm_th_restore[3] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE3); - ccx_info->nhm_th_restore[4] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE0); - ccx_info->nhm_th_restore[5] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE1); - ccx_info->nhm_th_restore[6] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE2); - ccx_info->nhm_th_restore[7] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE3); - ccx_info->nhm_th_restore[8] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH8_11N, MASKBYTE0); - ccx_info->nhm_th_restore[9] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE2); - ccx_info->nhm_th_restore[10] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE3); - - } else if (nhm_setting == RESTORE_NHM_SETTING) { - /*Set disable_ignore_cca, disable_ignore_txon*/ - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, BIT(9), ccx_info->nhm_inexclude_cca_restore); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, BIT(10), ccx_info->nhm_inexclude_txon_restore); - - /*Set NHM period*/ - odm_set_bb_reg(dm, ODM_REG_CCX_PERIOD_11N, MASKHWORD, ccx_info->nhm_period_restore); - - /*Set NHM threshold*/ - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE0, ccx_info->nhm_th_restore[0]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE1, ccx_info->nhm_th_restore[1]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE2, ccx_info->nhm_th_restore[2]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE3, ccx_info->nhm_th_restore[3]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE0, ccx_info->nhm_th_restore[4]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE1, ccx_info->nhm_th_restore[5]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE2, ccx_info->nhm_th_restore[6]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE3, ccx_info->nhm_th_restore[7]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH8_11N, MASKBYTE0, ccx_info->nhm_th_restore[8]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE2, ccx_info->nhm_th_restore[9]); - odm_set_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE3, ccx_info->nhm_th_restore[10]); - } else - return; - - } -} - -void -phydm_get_nhm_result( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - u32 value32; - u8 i; - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT_11AC); - ccx_info->nhm_result[0] = (u8)(value32 & MASKBYTE0); - ccx_info->nhm_result[1] = (u8)((value32 & MASKBYTE1) >> 8); - ccx_info->nhm_result[2] = (u8)((value32 & MASKBYTE2) >> 16); - ccx_info->nhm_result[3] = (u8)((value32 & MASKBYTE3) >> 24); - - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT7_TO_CNT4_11AC); - ccx_info->nhm_result[4] = (u8)(value32 & MASKBYTE0); - ccx_info->nhm_result[5] = (u8)((value32 & MASKBYTE1) >> 8); - ccx_info->nhm_result[6] = (u8)((value32 & MASKBYTE2) >> 16); - ccx_info->nhm_result[7] = (u8)((value32 & MASKBYTE3) >> 24); - - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT11_TO_CNT8_11AC); - ccx_info->nhm_result[8] = (u8)(value32 & MASKBYTE0); - ccx_info->nhm_result[9] = (u8)((value32 & MASKBYTE1) >> 8); - ccx_info->nhm_result[10] = (u8)((value32 & MASKBYTE2) >> 16); - ccx_info->nhm_result[11] = (u8)((value32 & MASKBYTE3) >> 24); - - /*Get NHM duration*/ - value32 = odm_read_4byte(dm, ODM_REG_NHM_DUR_READY_11AC); - ccx_info->nhm_duration = (u16)(value32 & MASKLWORD); - - } - - else if (dm->support_ic_type & ODM_IC_11N_SERIES) { - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT_11N); - ccx_info->nhm_result[0] = (u8)(value32 & MASKBYTE0); - ccx_info->nhm_result[1] = (u8)((value32 & MASKBYTE1) >> 8); - ccx_info->nhm_result[2] = (u8)((value32 & MASKBYTE2) >> 16); - ccx_info->nhm_result[3] = (u8)((value32 & MASKBYTE3) >> 24); - - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT7_TO_CNT4_11N); - ccx_info->nhm_result[4] = (u8)(value32 & MASKBYTE0); - ccx_info->nhm_result[5] = (u8)((value32 & MASKBYTE1) >> 8); - ccx_info->nhm_result[6] = (u8)((value32 & MASKBYTE2) >> 16); - ccx_info->nhm_result[7] = (u8)((value32 & MASKBYTE3) >> 24); - - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT9_TO_CNT8_11N); - ccx_info->nhm_result[8] = (u8)((value32 & MASKBYTE2) >> 16); - ccx_info->nhm_result[9] = (u8)((value32 & MASKBYTE3) >> 24); - - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT10_TO_CNT11_11N); - ccx_info->nhm_result[10] = (u8)((value32 & MASKBYTE2) >> 16); - ccx_info->nhm_result[11] = (u8)((value32 & MASKBYTE3) >> 24); - - /*Get NHM duration*/ - value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT10_TO_CNT11_11N); - ccx_info->nhm_duration = (u16)(value32 & MASKLWORD); - - } - - /* sum all nhm_result */ - ccx_info->nhm_rpt_sum = 0; - for (i = 0; i <= 11; i++) - ccx_info->nhm_rpt_sum += ccx_info->nhm_result[i]; - - PHYDM_DBG(dm, DBG_ENV_MNTR, - "NHM_result=(H->L)[%d %d %d %d (igi) %d %d %d %d %d %d %d %d]\n", - ccx_info->nhm_result[11], ccx_info->nhm_result[10], ccx_info->nhm_result[9], - ccx_info->nhm_result[8], ccx_info->nhm_result[7], ccx_info->nhm_result[6], - ccx_info->nhm_result[5], ccx_info->nhm_result[4], ccx_info->nhm_result[3], - ccx_info->nhm_result[2], ccx_info->nhm_result[1], ccx_info->nhm_result[0]); - -} - -boolean -phydm_check_nhm_rdy( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i; - boolean is_ready = false; - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - if (odm_get_bb_reg(dm, ODM_REG_NHM_DUR_READY_11AC, BIT(16))) - is_ready = 1; - } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { - - if (dm->support_ic_type == ODM_RTL8710B) { - if (odm_get_bb_reg(dm, R_0x8b4, BIT(25))) - is_ready = 1; - } else { - if (odm_get_bb_reg(dm, R_0x8b4, BIT(17))) - is_ready = 1; - } - } - PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM rdy=%d\n", is_ready); - return is_ready; -} - -void -phydm_ccx_monitor_trigger( - void *dm_void, - u16 monitor_time /*unit ms*/ -) -{ - u8 nhm_th[11], i, igi; - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - u16 monitor_time_4us = 0; - - if (!(dm->support_ability & ODM_BB_ENV_MONITOR)) - return; - - PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __FUNCTION__); - - if (monitor_time == 0) - return; - - if (monitor_time >= 262) - monitor_time_4us = 65534; - else - monitor_time_4us = monitor_time * MS_TO_4US_RATIO; - - /* check if NHM threshold is changed */ - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - - nhm_th[0] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE0); - nhm_th[1] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE1); - nhm_th[2] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE2); - nhm_th[3] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE3); - nhm_th[4] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE0); - nhm_th[5] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE1); - nhm_th[6] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE2); - nhm_th[7] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE3); - nhm_th[8] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH8_11AC, MASKBYTE0); - nhm_th[9] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE2); - nhm_th[10] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE3); - } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { - - nhm_th[0] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE0); - nhm_th[1] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE1); - nhm_th[2] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE2); - nhm_th[3] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE3); - nhm_th[4] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE0); - nhm_th[5] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE1); - nhm_th[6] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE2); - nhm_th[7] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE3); - nhm_th[8] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH8_11N, MASKBYTE0); - nhm_th[9] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE2); - nhm_th[10] = (u8)odm_get_bb_reg(dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE3); - } - - for (i = 0; i <= 10; i++) { - - if (nhm_th[i] != ccx_info->nhm_th[i]) { - PHYDM_DBG(dm, DBG_ENV_MNTR, - "nhm_th[%d] != ccx_info->nhm_th[%d]!!\n", i, i); - } - } - /*[NHM]*/ - igi = (u8)odm_get_bb_reg(dm, R_0xc50, MASKBYTE0); - phydm_set_nhm_th_by_igi(dm, igi); - - ccx_info->nhm_period = monitor_time_4us; - ccx_info->nhm_include_cca = NHM_EXCLUDE_CCA; - ccx_info->nhm_include_txon = NHM_EXCLUDE_TXON; - ccx_info->nhm_divider_opt = NHM_CNT_ALL; - - phydm_nhm_setting(dm, SET_NHM_SETTING); - phydm_nhm_trigger(dm); - - /*[CLM]*/ - ccx_info->clm_period = monitor_time_4us; - - if (ccx_info->clm_mntr_mode == CLM_DRIVER_MNTR) { - phydm_clm_setting(dm, ccx_info->clm_period); - phydm_clm_trigger(dm); - } else if (ccx_info->clm_mntr_mode == CLM_FW_MNTR){ - phydm_clm_h2c(dm, monitor_time_4us, true); - } - -} - -void -phydm_ccx_monitor_result( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - u32 clm_result_tmp = 0; - - if (!(dm->support_ability & ODM_BB_ENV_MONITOR)) - return; - - PHYDM_DBG(dm, DBG_ENV_MNTR, "%s ======>\n", __func__); - - if (phydm_check_nhm_rdy(dm)) { - phydm_get_nhm_result(dm); - - if (ccx_info->nhm_rpt_sum != 0) - ccx_info->nhm_ratio = (u8)(((ccx_info->nhm_rpt_sum - ccx_info->nhm_result[0])*100) >> 8); - } - - if (ccx_info->clm_mntr_mode == CLM_DRIVER_MNTR) { - - if (!phydm_clm_check_rdy(dm)) - goto out; - - phydm_clm_get_result(dm); - - if (ccx_info->clm_period != 0) { - if (ccx_info->clm_period == 64000) - ccx_info->clm_ratio = (u8)(((ccx_info->clm_result >> 6) + 5) /10); - else if (ccx_info->clm_period == 65535) { - clm_result_tmp = (u32)(ccx_info->clm_result * 100); - ccx_info->clm_ratio = (u8)((clm_result_tmp + (1<<15)) >> 16); - } else - ccx_info->clm_ratio = (u8)((ccx_info->clm_result*100) / ccx_info->clm_period); - } - - } else { - if (ccx_info->clm_fw_result_cnt != 0) - ccx_info->clm_ratio = (u8)(ccx_info->clm_fw_result_acc /ccx_info->clm_fw_result_cnt); - else - ccx_info->clm_ratio = 0; - - PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_fw_result_acc=%d, clm_fw_result_cnt=%d\n", - ccx_info->clm_fw_result_acc, ccx_info->clm_fw_result_cnt); - - ccx_info->clm_fw_result_acc = 0; - ccx_info->clm_fw_result_cnt = 0; - } - -out: - PHYDM_DBG(dm, DBG_ENV_MNTR, "IGI=0x%x, nhm_ratio=%d, clm_ratio=%d\n\n", - ccx_info->echo_igi, ccx_info->nhm_ratio, ccx_info->clm_ratio); - -} - - -#endif +#endif /*@#ifdef NHM_SUPPORT*/ #ifdef CLM_SUPPORT -void -phydm_clm_racing_release( - void *dm_void -) +void phydm_clm_racing_release(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - u32 value32; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); PHYDM_DBG(dm, DBG_ENV_MNTR, "lv:(%d)->(0)\n", ccx->clm_set_lv); - + ccx->clm_ongoing = false; ccx->clm_set_lv = CLM_RELEASE; ccx->clm_app = CLM_BACKGROUND; } -u8 -phydm_clm_racing_ctrl( - void *dm_void, - enum phydm_nhm_level clm_lv -) +u8 phydm_clm_racing_ctrl(void *dm_void, enum phydm_clm_level clm_lv) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - u8 set_result = PHYDM_SET_SUCCESS; - /*acquire to control CLM API*/ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u8 set_result = PHYDM_SET_SUCCESS; + /*@acquire to control CLM API*/ - PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_ongoing=%d, lv:(%d)->(%d)\n", + PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_ongoing=%d, lv:(%d)->(%d)\n", ccx->clm_ongoing, ccx->clm_set_lv, clm_lv); if (ccx->clm_ongoing) { if (clm_lv <= ccx->clm_set_lv) { @@ -1423,117 +1485,108 @@ phydm_clm_racing_ctrl( ccx->clm_ongoing = false; } } - + if (set_result) ccx->clm_set_lv = clm_lv; - + PHYDM_DBG(dm, DBG_ENV_MNTR, "clm racing success=%d\n", set_result); return set_result; } - -void -phydm_clm_c2h_report_handler( - void *dm_void, - u8 *cmd_buf, - u8 cmd_len -) +void phydm_clm_c2h_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - u8 clm_report = cmd_buf[0]; - u8 clm_report_idx = cmd_buf[1]; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx_info = &dm->dm_ccx_info; + u8 clm_report = cmd_buf[0]; + /*@u8 clm_report_idx = cmd_buf[1];*/ - if (cmd_len >=12) + if (cmd_len >= 12) return; - + ccx_info->clm_fw_result_acc += clm_report; ccx_info->clm_fw_result_cnt++; - PHYDM_DBG(dm, DBG_ENV_MNTR, "[%d] clm_report= %d\n", ccx_info->clm_fw_result_cnt, clm_report); - + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%d] clm_report= %d\n", + ccx_info->clm_fw_result_cnt, clm_report); } -void -phydm_clm_h2c( - void *dm_void, - u16 obs_time, - u8 fw_clm_en -) +void phydm_clm_h2c(void *dm_void, u16 obs_time, u8 fw_clm_en) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 h2c_val[H2C_MAX_LENGTH] = {0}; - u8 i = 0; - u8 obs_time_idx = 0; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 h2c_val[H2C_MAX_LENGTH] = {0}; + u8 i = 0; + u8 obs_time_idx = 0; + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__); PHYDM_DBG(dm, DBG_ENV_MNTR, "obs_time_index=%d *4 us\n", obs_time); - for (i =1; i<=16; i++) { - if (obs_time & BIT(16 -i)) { - obs_time_idx = 16-i; + for (i = 1; i <= 16; i++) { + if (obs_time & BIT(16 - i)) { + obs_time_idx = 16 - i; break; } } - - /* - obs_time =(2^16 -1) ~ (2^15) => obs_time_idx = 15 (65535 ~ 32768) - obs_time =(2^15 -1) ~ (2^14) => obs_time_idx = 14 +#if 0 + obs_time = (2 ^ 16 - 1)~(2 ^ 15) => obs_time_idx = 15 (65535 ~32768) + obs_time = (2 ^ 15 - 1)~(2 ^ 14) => obs_time_idx = 14 ... ... ... - obs_time =(2^1 -1) ~ (2^0) => obs_time_idx = 0 + obs_time = (2 ^ 1 - 1)~(2 ^ 0) => obs_time_idx = 0 - */ +#endif - h2c_val[0] = obs_time_idx | (((fw_clm_en) ? 1 : 0)<< 7); + h2c_val[0] = obs_time_idx | (((fw_clm_en) ? 1 : 0) << 7); h2c_val[1] = CLM_MAX_REPORT_TIME; PHYDM_DBG(dm, DBG_ENV_MNTR, "PHYDM h2c[0x4d]=0x%x %x %x %x %x %x %x\n", - h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2], h2c_val[1], h2c_val[0]); + h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2], + h2c_val[1], h2c_val[0]); odm_fill_h2c_cmd(dm, PHYDM_H2C_FW_CLM_MNTR, H2C_MAX_LENGTH, h2c_val); - } -void -phydm_clm_setting( - void *dm_void, - u16 clm_period /*4us sample 1 time*/ -) +void phydm_clm_setting(void *dm_void, u16 clm_period /*@4us sample 1 time*/) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; if (ccx->clm_period != clm_period) { - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + if (dm->support_ic_type & ODM_IC_11AC_SERIES) odm_set_bb_reg(dm, R_0x990, MASKLWORD, clm_period); - - } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + odm_set_bb_reg(dm, R_0x1e40, MASKLWORD, clm_period); + #endif + else if (dm->support_ic_type & ODM_IC_11N_SERIES) odm_set_bb_reg(dm, R_0x894, MASKLWORD, clm_period); - } ccx->clm_period = clm_period; - PHYDM_DBG(dm, DBG_ENV_MNTR, "Update CLM period ((%d)) -> ((%d))\n", + PHYDM_DBG(dm, DBG_ENV_MNTR, + "Update CLM period ((%d)) -> ((%d))\n", ccx->clm_period, clm_period); } - PHYDM_DBG(dm, DBG_ENV_MNTR, "Set CLM period=%d * 4us\n", ccx->clm_period); - + PHYDM_DBG(dm, DBG_ENV_MNTR, "Set CLM period=%d * 4us\n", + ccx->clm_period); } -void -phydm_clm_trigger( - void *dm_void -) +void phydm_clm_trigger(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - u32 reg1 = (dm->support_ic_type & ODM_IC_11AC_SERIES) ? R_0x994 : R_0x890; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u32 reg1 = 0; + if (dm->support_ic_type & ODM_IC_11AC_SERIES) + reg1 = R_0x994; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + reg1 = R_0x1e60; + #endif + else + reg1 = R_0x890; PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); - + odm_set_bb_reg(dm, reg1, BIT(0), 0x0); odm_set_bb_reg(dm, reg1, BIT(0), 0x1); @@ -1543,19 +1596,26 @@ phydm_clm_trigger( } boolean -phydm_clm_check_rdy( - void *dm_void -) +phydm_clm_check_rdy(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - boolean is_ready = false; - u32 reg1 = 0, reg1_bit = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean is_ready = false; + u32 reg1 = 0, reg1_bit = 0; +#if (ENV_MNTR_DBG) + u16 i = 0; + u64 start_time = 0, progressing_time = 0; +#endif if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - reg1 = ODM_REG_CLM_RESULT_11AC; + reg1 = R_0xfa4; reg1_bit = 16; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + reg1 = R_0x2d88; + reg1_bit = 16; + #endif } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { - if (dm->support_ic_type == ODM_RTL8710B) { + if (dm->support_ic_type & (ODM_RTL8710B | ODM_RTL8721D)) { reg1 = R_0x8b4; reg1_bit = 24; } else { @@ -1563,112 +1623,139 @@ phydm_clm_check_rdy( reg1_bit = 16; } } +#if (ENV_MNTR_DBG) + start_time = odm_get_current_time(dm); + for (i = 0; i <= 400; i++) { + if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit))) { + is_ready = true; + break; + } + ODM_delay_ms(1); + } + progressing_time = odm_get_progressing_time(dm, start_time); + + PHYDM_DBG(dm, DBG_ENV_MNTR, "CLM rdy=%d, i=%d, CLM_polling_time=%lld\n", + is_ready, i, progressing_time); +#else + if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit))) + is_ready = true; + PHYDM_DBG(dm, DBG_ENV_MNTR, "CLM rdy=%d\n", is_ready); +#endif return is_ready; } -void -phydm_clm_get_utility( - void *dm_void -) +void phydm_clm_get_utility(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - u32 clm_result_tmp; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u32 clm_result_tmp; if (ccx->clm_period == 0) { PHYDM_DBG(dm, DBG_ENV_MNTR, "[warning] clm_period = 0\n"); ccx->clm_ratio = 0; } else if (ccx->clm_period >= 65530) { clm_result_tmp = (u32)(ccx->clm_result * 100); - ccx->clm_ratio = (u8)((clm_result_tmp + (1<<15)) >> 16); - } else - ccx->clm_ratio = (u8)((ccx->clm_result*100) / ccx->clm_period); + ccx->clm_ratio = (u8)((clm_result_tmp + (1 << 15)) >> 16); + } else { + clm_result_tmp = (u32)(ccx->clm_result * 100); + ccx->clm_ratio = (u8)(clm_result_tmp / (u32)ccx->clm_period); + } } boolean -phydm_clm_get_result( - void *dm_void -) +phydm_clm_get_result(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - u32 reg1 = (dm->support_ic_type & ODM_IC_11AC_SERIES) ? R_0x994 : R_0x890; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx_info = &dm->dm_ccx_info; + u32 reg1 = 0; + u32 val = 0; - odm_set_bb_reg(dm, reg1, BIT(0), 0x0); - if (phydm_clm_check_rdy(dm) == false) { + if (dm->support_ic_type & ODM_IC_11AC_SERIES) + reg1 = R_0x994; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + reg1 = R_0x1e60; + #endif + else + reg1 = R_0x890; + if (!(dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F | + ODM_RTL8197G))) + odm_set_bb_reg(dm, reg1, BIT(0), 0x0); + if (!(phydm_clm_check_rdy(dm))) { PHYDM_DBG(dm, DBG_ENV_MNTR, "Get CLM report Fail\n"); phydm_clm_racing_release(dm); return false; } - if (dm->support_ic_type & ODM_IC_11AC_SERIES) - ccx_info->clm_result = (u16)odm_get_bb_reg(dm, R_0xfa4, MASKLWORD); - else if (dm->support_ic_type & ODM_IC_11N_SERIES) - ccx_info->clm_result = (u16)odm_get_bb_reg(dm, R_0x8d0, MASKLWORD); + if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + val = odm_get_bb_reg(dm, R_0xfa4, MASKLWORD); + ccx_info->clm_result = (u16)val; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + val = odm_get_bb_reg(dm, R_0x2d88, MASKLWORD); + ccx_info->clm_result = (u16)val; + #endif + } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { + val = odm_get_bb_reg(dm, R_0x8d0, MASKLWORD); + ccx_info->clm_result = (u16)val; + } - - PHYDM_DBG(dm, DBG_ENV_MNTR, "CLM result = %d *4 us\n", ccx_info->clm_result); + PHYDM_DBG(dm, DBG_ENV_MNTR, "CLM result = %d *4 us\n", + ccx_info->clm_result); phydm_clm_racing_release(dm); return true; } -void -phydm_clm_mntr_fw( - void *dm_void, - u16 monitor_time /*unit ms*/ -) +void phydm_clm_mntr_fw(void *dm_void, u16 monitor_time /*unit ms*/) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - u32 clm_result_tmp = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u32 val = 0; - /*[Get CLM report]*/ - if (ccx->clm_fw_result_cnt != 0) - ccx->clm_ratio = (u8)(ccx->clm_fw_result_acc /ccx->clm_fw_result_cnt); - else + /*@[Get CLM report]*/ + if (ccx->clm_fw_result_cnt != 0) { + val = ccx->clm_fw_result_acc / ccx->clm_fw_result_cnt; + ccx->clm_ratio = (u8)val; + } else { ccx->clm_ratio = 0; + } + + PHYDM_DBG(dm, DBG_ENV_MNTR, + "clm_fw_result_acc=%d, clm_fw_result_cnt=%d\n", + ccx->clm_fw_result_acc, ccx->clm_fw_result_cnt); - PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_fw_result_acc=%d, clm_fw_result_cnt=%d\n", - ccx->clm_fw_result_acc, ccx->clm_fw_result_cnt); - ccx->clm_fw_result_acc = 0; ccx->clm_fw_result_cnt = 0; - - /*[CLM trigger]*/ + /*@[CLM trigger]*/ if (monitor_time >= 262) ccx->clm_period = 65535; else ccx->clm_period = monitor_time * MS_TO_4US_RATIO; - - phydm_clm_h2c(dm, monitor_time, true); + phydm_clm_h2c(dm, ccx->clm_period, true); } -u8 -phydm_clm_mntr_set( - void *dm_void, - struct clm_para_info *clm_para -) +u8 phydm_clm_mntr_set(void *dm_void, struct clm_para_info *clm_para) { - /*Driver Monitor CLM*/ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - u16 clm_period = 0; + /*@Driver Monitor CLM*/ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u16 clm_period = 0; - if (clm_para->mntr_time == 0) return PHYDM_SET_FAIL; if (clm_para->clm_lv >= CLM_MAX_NUM) { - PHYDM_DBG(dm, DBG_ENV_MNTR, "[WARNING] Wrong LV=%d\n", clm_para->clm_lv); + PHYDM_DBG(dm, DBG_ENV_MNTR, "[WARNING] Wrong LV=%d\n", + clm_para->clm_lv); return PHYDM_SET_FAIL; } if (phydm_clm_racing_ctrl(dm, clm_para->clm_lv) == PHYDM_SET_FAIL) return PHYDM_SET_FAIL; - + if (clm_para->mntr_time >= 262) clm_period = CLM_PERIOD_MAX; else @@ -1676,91 +1763,79 @@ phydm_clm_mntr_set( ccx->clm_app = clm_para->clm_app; phydm_clm_setting(dm, clm_period); - + return PHYDM_SET_SUCCESS; } boolean -phydm_clm_mntr_chk( - void *dm_void, - u16 monitor_time /*unit ms*/ -) +phydm_clm_mntr_chk(void *dm_void, u16 monitor_time /*unit ms*/) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - struct clm_para_info clm_para = {0}; - u32 clm_result_tmp = 0; - boolean clm_chk_result = false; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + struct clm_para_info clm_para = {0}; + boolean clm_chk_result = false; + u32 sys_return_time = 0; PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__); - if (ccx->clm_manual_ctrl) { PHYDM_DBG(dm, DBG_ENV_MNTR, "CLM in manual ctrl\n"); return clm_chk_result; } - if ((ccx->clm_app != CLM_BACKGROUND) && - (ccx->clm_trigger_time + MAX_ENV_MNTR_TIME) > dm->phydm_sys_up_time) { - - PHYDM_DBG(dm, DBG_ENV_MNTR, "trigger_time %d, sys_time=%d\n", + sys_return_time = ccx->clm_trigger_time + MAX_ENV_MNTR_TIME; + + if (ccx->clm_app != CLM_BACKGROUND && + sys_return_time > dm->phydm_sys_up_time) { + PHYDM_DBG(dm, DBG_ENV_MNTR, "trigger_time %d, sys_time=%d\n", ccx->clm_trigger_time, dm->phydm_sys_up_time); - + return clm_chk_result; } - + clm_para.clm_app = CLM_BACKGROUND; - clm_para.clm_lv = CLM_LV_1; + clm_para.clm_lv = CLM_LV_1; clm_para.mntr_time = monitor_time; - if (ccx->clm_mntr_mode == CLM_DRIVER_MNTR) { - - /*[Get CLM report]*/ + /*@[Get CLM report]*/ if (phydm_clm_get_result(dm)) { PHYDM_DBG(dm, DBG_ENV_MNTR, "Get CLM_rpt success\n"); phydm_clm_get_utility(dm); } - /*[CLM trigger]-------------------------------------------------*/ - if (phydm_clm_mntr_set(dm, &clm_para) == PHYDM_SET_SUCCESS) { + /*@[CLM trigger]----------------------------------------------*/ + if (phydm_clm_mntr_set(dm, &clm_para) == PHYDM_SET_SUCCESS) clm_chk_result = true; - } } else { phydm_clm_mntr_fw(dm, monitor_time); } PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_ratio=%d\n", ccx->clm_ratio); + + /*@PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_chk_result=%d\n",clm_chk_result);*/ + return clm_chk_result; } -void -phydm_set_clm_mntr_mode( - void *dm_void, - enum clm_monitor_mode mode -) +void phydm_set_clm_mntr_mode(void *dm_void, enum clm_monitor_mode mode) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx_info = &dm->dm_ccx_info; if (ccx_info->clm_mntr_mode != mode) { - ccx_info->clm_mntr_mode = mode; phydm_ccx_hw_restart(dm); if (mode == CLM_DRIVER_MNTR) - phydm_clm_h2c(dm,0, 0); + phydm_clm_h2c(dm, 0, 0); } } -void -phydm_clm_init( - void *dm_void -) +void phydm_clm_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; - PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __FUNCTION__); - + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); ccx->clm_ongoing = false; ccx->clm_manual_ctrl = 0; ccx->clm_mntr_mode = CLM_DRIVER_MNTR; @@ -1769,117 +1844,126 @@ phydm_clm_init( phydm_clm_setting(dm, 65535); } -void -phydm_clm_dbg( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +void phydm_clm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - char help[] = "-h"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; - struct clm_para_info clm_para = {0}; - u32 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + struct clm_para_info clm_para = {0}; + u32 i; for (i = 0; i < 4; i++) { - if (input[i + 1]) { + if (input[i + 1]) PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); - } } if ((strcmp(input[1], help) == 0)) { - PDM_SNPF(out_len, used, output + used, out_len - used, "CLM Driver Basic-Trigger 262ms: {1}\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, "CLM Driver Adv-Trigger: {2} {app} {LV} {0~262ms}\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, "CLM FW Trigger: {3}\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, "CLM Get Result: {100}\n"); - } else if (var1[0] == 100) { /* Get CLM results */ + PDM_SNPF(out_len, used, output + used, out_len - used, + "CLM Driver Basic-Trigger 262ms: {1}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "CLM Driver Adv-Trigger: {2} {app} {LV} {0~262ms}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "CLM FW Trigger: {3} {1:drv, 2:fw}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "CLM Get Result: {100}\n"); + } else if (var1[0] == 100) { /* @Get CLM results */ - if (phydm_clm_get_result(dm)) { + if (phydm_clm_get_result(dm)) phydm_clm_get_utility(dm); - } - - PDM_SNPF(out_len, used, output + used, out_len - used, "clm_rpt_stamp=%d\n", - ccx->clm_rpt_stamp); - - PDM_SNPF(out_len, used, output + used, out_len - used, "clm_ratio:((%d percent)) = (%d us/ %d us)\n", - ccx->clm_ratio, ccx->clm_result<<2, ccx->clm_period<<2); - + + PDM_SNPF(out_len, used, output + used, out_len - used, + "clm_rpt_stamp=%d\n", ccx->clm_rpt_stamp); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "clm_ratio:((%d percent)) = (%d us/ %d us)\n", + ccx->clm_ratio, ccx->clm_result << 2, + ccx->clm_period << 2); + ccx->clm_manual_ctrl = 0; - + + } else if (var1[0] == 3) { + phydm_set_clm_mntr_mode(dm, (enum clm_monitor_mode)var1[1]); + PDM_SNPF(out_len, used, output + used, out_len - used, + "CLM mode: %s mode\n", + ((ccx->clm_mntr_mode == CLM_FW_MNTR) ? "FW" : "Drv")); } else { /* Set & trigger CLM */ ccx->clm_manual_ctrl = 1; - + if (var1[0] == 1) { clm_para.clm_app = CLM_BACKGROUND; - clm_para.clm_lv = CLM_LV_4; + clm_para.clm_lv = CLM_LV_4; clm_para.mntr_time = 262; ccx->clm_mntr_mode = CLM_DRIVER_MNTR; - + } else if (var1[0] == 2) { - clm_para.clm_app = (enum clm_application )var1[1]; - clm_para.clm_lv = (enum phydm_clm_level )var1[2]; + clm_para.clm_app = (enum clm_application)var1[1]; + clm_para.clm_lv = (enum phydm_clm_level)var1[2]; ccx->clm_mntr_mode = CLM_DRIVER_MNTR; clm_para.mntr_time = (u16)var1[3]; - - } else if (var1[0] == 3) { - clm_para.clm_app = CLM_BACKGROUND; - clm_para.clm_lv = CLM_LV_4; - ccx->clm_mntr_mode = CLM_FW_MNTR; - clm_para.mntr_time = 262; - } - - PDM_SNPF(out_len, used, output + used, out_len - used, "app=%d, lv=%d, mode=%s, time=%d ms\n", - clm_para.clm_app, clm_para.clm_lv, - ((ccx->clm_mntr_mode == CLM_FW_MNTR) ? "FW" : "driver"), - clm_para.mntr_time); - - if (phydm_clm_mntr_set(dm, &clm_para) == PHYDM_SET_SUCCESS) { - phydm_clm_trigger(dm); - /**/ + } - PDM_SNPF(out_len, used, output + used, out_len - used, "clm_rpt_stamp=%d\n", - ccx->clm_rpt_stamp); - + PDM_SNPF(out_len, used, output + used, out_len - used, + "app=%d, lv=%d, mode=%s, time=%d ms\n", + clm_para.clm_app, clm_para.clm_lv, + ((ccx->clm_mntr_mode == CLM_FW_MNTR) ? "FW" : + "driver"), clm_para.mntr_time); + + if (phydm_clm_mntr_set(dm, &clm_para) == PHYDM_SET_SUCCESS) + phydm_clm_trigger(dm); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "clm_rpt_stamp=%d\n", ccx->clm_rpt_stamp); } - + *_used = used; *_out_len = out_len; } +#endif /*@#ifdef CLM_SUPPORT*/ -#endif /*#ifdef CLM_SUPPORT*/ - -u8 -phydm_env_mntr_trigger( - void *dm_void, - struct nhm_para_info *nhm_para, - struct clm_para_info *clm_para, - struct env_trig_rpt *trig_rpt -) +u8 phydm_env_mntr_trigger(void *dm_void, struct nhm_para_info *nhm_para, + struct clm_para_info *clm_para, + struct env_trig_rpt *trig_rpt) { -#if(defined(NHM_SUPPORT) && defined(CLM_SUPPORT)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - boolean nhm_set_ok = false; - boolean clm_set_ok = false; - u8 trigger_result = 0; +#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT)) + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + boolean nhm_set_ok = false; + boolean clm_set_ok = false; + u8 trigger_result = 0; PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__); - /*[NHM]*/ + +#if (ENV_MNTR_DBG_2) + if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + PHYDM_DBG(dm, DBG_ENV_MNTR, + "[DBG][2] 0xc50=0x%x, 0x994=0x%x, 0x998=0x%x\n", + odm_get_bb_reg(dm, R_0xc50, MASKDWORD), + odm_get_bb_reg(dm, R_0x994, MASKDWORD), + odm_get_bb_reg(dm, R_0x998, MASKDWORD)); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + PHYDM_DBG(dm, DBG_ENV_MNTR, + "[DBG][2] 0x1d70=0x%x, 0x1e60=0x%x, 0x1e44=0x%x\n", + odm_get_bb_reg(dm, R_0x1d70, MASKDWORD), + odm_get_bb_reg(dm, R_0x1e60, MASKDWORD), + odm_get_bb_reg(dm, R_0x1e44, MASKDWORD)); + #endif + } +#endif + + /*@[NHM]*/ nhm_set_ok = phydm_nhm_mntr_set(dm, nhm_para); - - /*[CLM]*/ + + /*@[CLM]*/ if (ccx->clm_mntr_mode == CLM_DRIVER_MNTR) { clm_set_ok = phydm_clm_mntr_set(dm, clm_para); - } else if (ccx->clm_mntr_mode == CLM_FW_MNTR){ + } else if (ccx->clm_mntr_mode == CLM_FW_MNTR) { phydm_clm_h2c(dm, CLM_PERIOD_MAX, true); trigger_result |= CLM_SUCCESS; } @@ -1888,15 +1972,18 @@ phydm_env_mntr_trigger( phydm_nhm_trigger(dm); trigger_result |= NHM_SUCCESS; } - + if (clm_set_ok) { phydm_clm_trigger(dm); trigger_result |= CLM_SUCCESS; } + /*@monitor for the test duration*/ + ccx->start_time = odm_get_current_time(dm); + trig_rpt->nhm_rpt_stamp = ccx->nhm_rpt_stamp; trig_rpt->clm_rpt_stamp = ccx->clm_rpt_stamp; - + PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm_rpt_stamp=%d, clm_rpt_stamp=%d,\n\n", trig_rpt->nhm_rpt_stamp, trig_rpt->clm_rpt_stamp); @@ -1904,32 +1991,53 @@ phydm_env_mntr_trigger( #endif } -u8 -phydm_env_mntr_result( - void *dm_void, - struct env_mntr_rpt *rpt -) +u8 phydm_env_mntr_result(void *dm_void, struct env_mntr_rpt *rpt) { -#if(defined(NHM_SUPPORT) && defined(CLM_SUPPORT)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - u8 env_mntr_rpt = 0; - u32 clm_result_tmp = 0; +#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT)) + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + u8 env_mntr_rpt = 0; + u64 progressing_time = 0; + u32 val_tmp = 0; + + /*@monitor for the test duration*/ + progressing_time = odm_get_progressing_time(dm, ccx->start_time); PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__); - /*Get NHM result*/ + PHYDM_DBG(dm, DBG_ENV_MNTR, "env_time=%lld\n", progressing_time); + +#if (ENV_MNTR_DBG_2) + if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + PHYDM_DBG(dm, DBG_ENV_MNTR, + "[DBG][2] 0xc50=0x%x, 0x994=0x%x, 0x998=0x%x\n", + odm_get_bb_reg(dm, R_0xc50, MASKDWORD), + odm_get_bb_reg(dm, R_0x994, MASKDWORD), + odm_get_bb_reg(dm, R_0x998, MASKDWORD)); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + PHYDM_DBG(dm, DBG_ENV_MNTR, + "[DBG][2] 0x1d70=0x%x, 0x1e60=0x%x, 0x1e44=0x%x\n", + odm_get_bb_reg(dm, R_0x1d70, MASKDWORD), + odm_get_bb_reg(dm, R_0x1e60, MASKDWORD), + odm_get_bb_reg(dm, R_0x1e44, MASKDWORD)); + #endif + } +#endif + + /*@Get NHM result*/ if (phydm_nhm_get_result(dm)) { PHYDM_DBG(dm, DBG_ENV_MNTR, "Get NHM_rpt success\n"); phydm_nhm_get_utility(dm); rpt->nhm_ratio = ccx->nhm_ratio; env_mntr_rpt |= NHM_SUCCESS; - odm_move_memory(dm, &rpt->nhm_result[0], &ccx->nhm_result[0], NHM_RPT_NUM); + + odm_move_memory(dm, &rpt->nhm_result[0], + &ccx->nhm_result[0], NHM_RPT_NUM); } else { rpt->nhm_ratio = ENV_MNTR_FAIL; } - - /*Get CLM result*/ + + /*@Get CLM result*/ if (ccx->clm_mntr_mode == CLM_DRIVER_MNTR) { - if (phydm_clm_get_result(dm)) { PHYDM_DBG(dm, DBG_ENV_MNTR, "Get CLM_rpt success\n"); phydm_clm_get_utility(dm); @@ -1940,15 +2048,19 @@ phydm_env_mntr_result( } } else { - if (ccx->clm_fw_result_cnt != 0) - ccx->clm_ratio = (u8)(ccx->clm_fw_result_acc /ccx->clm_fw_result_cnt); - else + if (ccx->clm_fw_result_cnt != 0) { + val_tmp = ccx->clm_fw_result_acc + / ccx->clm_fw_result_cnt; + ccx->clm_ratio = (u8)val_tmp; + } else { ccx->clm_ratio = 0; + } rpt->clm_ratio = ccx->clm_ratio; - PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_fw_result_acc=%d, clm_fw_result_cnt=%d\n", - ccx->clm_fw_result_acc, ccx->clm_fw_result_cnt); - + PHYDM_DBG(dm, DBG_ENV_MNTR, + "clm_fw_result_acc=%d, clm_fw_result_cnt=%d\n", + ccx->clm_fw_result_acc, ccx->clm_fw_result_cnt); + ccx->clm_fw_result_acc = 0; ccx->clm_fw_result_cnt = 0; env_mntr_rpt |= CLM_SUCCESS; @@ -1957,125 +2069,123 @@ phydm_env_mntr_result( rpt->nhm_rpt_stamp = ccx->nhm_rpt_stamp; rpt->clm_rpt_stamp = ccx->clm_rpt_stamp; - PHYDM_DBG(dm, DBG_ENV_MNTR, "IGI=0x%x, nhm_ratio=%d, clm_ratio=%d, nhm_rpt_stamp=%d, clm_rpt_stamp=%d\n\n", - ccx->nhm_igi, rpt->nhm_ratio, rpt->clm_ratio, rpt->nhm_rpt_stamp, rpt->clm_rpt_stamp); - + PHYDM_DBG(dm, DBG_ENV_MNTR, + "IGI=0x%x, nhm_ratio=%d, clm_ratio=%d, nhm_rpt_stamp=%d, clm_rpt_stamp=%d\n\n", + ccx->nhm_igi, rpt->nhm_ratio, rpt->clm_ratio, + rpt->nhm_rpt_stamp, rpt->clm_rpt_stamp); + return env_mntr_rpt; #endif } -/*Environment Monitor*/ -void -phydm_env_mntr_watchdog( - void *dm_void -) +/*@Environment Monitor*/ +void phydm_env_mntr_watchdog(void *dm_void) { -#if(defined(NHM_SUPPORT) && defined(CLM_SUPPORT)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - boolean nhm_chk_ok = false; - boolean clm_chk_ok = false; +#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT)) + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx = &dm->dm_ccx_info; + boolean nhm_chk_ok = false; + boolean clm_chk_ok = false; if (!(dm->support_ability & ODM_BB_ENV_MONITOR)) return; PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); + nhm_chk_ok = phydm_nhm_mntr_chk(dm, 262); /*@monitor 262ms*/ + clm_chk_ok = phydm_clm_mntr_chk(dm, 262); /*@monitor 262ms*/ - nhm_chk_ok = phydm_nhm_mntr_chk(dm, 262);/*monitor 262ms*/ - clm_chk_ok = phydm_clm_mntr_chk(dm, 262); /*monitor 262ms*/ + /*@PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm_chk_ok %d\n\n",nhm_chk_ok);*/ + /*@PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_chk_ok %d\n\n",clm_chk_ok);*/ if (nhm_chk_ok) phydm_nhm_trigger(dm); - + if (clm_chk_ok) phydm_clm_trigger(dm); - PHYDM_DBG(dm, DBG_ENV_MNTR, "Summary: nhm_ratio=((%d)) clm_ratio=((%d))\n\n", + PHYDM_DBG(dm, DBG_ENV_MNTR, + "Summary: nhm_ratio=((%d)) clm_ratio=((%d))\n\n", ccx->nhm_ratio, ccx->clm_ratio); #endif } - -void -phydm_env_monitor_init( - void *dm_void -) +void phydm_env_monitor_init(void *dm_void) { -#if(defined(NHM_SUPPORT) && defined(CLM_SUPPORT)) - struct dm_struct *dm = (struct dm_struct *)dm_void; +#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT)) + struct dm_struct *dm = (struct dm_struct *)dm_void; if (!(dm->support_ability & ODM_BB_ENV_MONITOR)) return; - PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __FUNCTION__); - + PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); phydm_ccx_hw_restart(dm); phydm_nhm_init(dm); phydm_clm_init(dm); #endif } -void -phydm_env_mntr_dbg( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +void phydm_env_mntr_dbg(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx = &dm->dm_ccx_info; - char help[] = "-h"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; - struct clm_para_info clm_para = {0}; - struct nhm_para_info nhm_para = {0}; - struct env_mntr_rpt rpt = {0}; - struct env_trig_rpt trig_rpt = {0}; - u8 set_result; - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + struct clm_para_info clm_para = {0}; + struct nhm_para_info nhm_para = {0}; + struct env_mntr_rpt rpt = {0}; + struct env_trig_rpt trig_rpt = {0}; + u8 set_result; + u8 i; PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); if ((strcmp(input[1], help) == 0)) { - PDM_SNPF(out_len, used, output + used, out_len - used, "Basic-Trigger 262ms: {1}\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, "Get Result: {100}\n"); - } else if (var1[0] == 100) { /* Get CLM results */ + PDM_SNPF(out_len, used, output + used, out_len - used, + "Basic-Trigger 262ms: {1}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Get Result: {100}\n"); + } else if (var1[0] == 100) { /* @Get CLM results */ set_result = phydm_env_mntr_result(dm, &rpt); - PDM_SNPF(out_len, used, output + used, out_len - used, "Set Result=%d\n nhm_ratio=%d clm_ratio=%d\n nhm_rpt_stamp=%d, clm_rpt_stamp=%d, \n", - set_result, rpt.nhm_ratio, rpt.clm_ratio, rpt.nhm_rpt_stamp, rpt.clm_rpt_stamp); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Set Result=%d\n nhm_ratio=%d clm_ratio=%d\n nhm_rpt_stamp=%d, clm_rpt_stamp=%d,\n", + set_result, rpt.nhm_ratio, rpt.clm_ratio, + rpt.nhm_rpt_stamp, rpt.clm_rpt_stamp); for (i = 0; i <= 11; i++) { - PDM_SNPF(out_len, used, output + used, out_len - used, "nhm_rpt[%d] = %d (%d percent)\n", - i, rpt.nhm_result[i], + PDM_SNPF(out_len, used, output + used, out_len - used, + "nhm_rpt[%d] = %d (%d percent)\n", i, + rpt.nhm_result[i], (((rpt.nhm_result[i] * 100) + 128) >> 8)); } - + } else { /* Set & trigger CLM */ /*nhm para*/ nhm_para.incld_txon = NHM_EXCLUDE_TXON; nhm_para.incld_cca = NHM_EXCLUDE_CCA; nhm_para.div_opt = NHM_CNT_ALL; nhm_para.nhm_app = NHM_ACS; - nhm_para.nhm_lv = NHM_LV_2; + nhm_para.nhm_lv = NHM_LV_2; nhm_para.mntr_time = 262; - - /*clm para*/ + + /*@clm para*/ clm_para.clm_app = CLM_ACS; - clm_para.clm_lv = CLM_LV_2; + clm_para.clm_lv = CLM_LV_2; clm_para.mntr_time = 262; - set_result = phydm_env_mntr_trigger(dm, &nhm_para, &clm_para, &trig_rpt); + set_result = phydm_env_mntr_trigger(dm, &nhm_para, + &clm_para, &trig_rpt); - PDM_SNPF(out_len, used, output + used, out_len - used, "Set Result=%d, nhm_rpt_stamp=%d, clm_rpt_stamp=%d\n", - set_result, trig_rpt.nhm_rpt_stamp, trig_rpt.clm_rpt_stamp); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Set Result=%d, nhm_rpt_stamp=%d, clm_rpt_stamp=%d\n", + set_result, trig_rpt.nhm_rpt_stamp, + trig_rpt.clm_rpt_stamp); } - + *_used = used; *_out_len = out_len; -} \ No newline at end of file +} + diff --git a/hal/phydm/phydm_ccx.h b/hal/phydm/phydm_ccx.h index f55f6f8..f9ea9dd 100644 --- a/hal/phydm/phydm_ccx.h +++ b/hal/phydm/phydm_ccx.h @@ -23,12 +23,18 @@ * *****************************************************************************/ -#ifndef __PHYDMCCX_H__ -#define __PHYDMCCX_H__ +#ifndef __PHYDMCCX_H__ +#define __PHYDMCCX_H__ -/* 1 ============================================================ +#define CCX_VERSION "1.4" /* @ Remove r0 chk*/ + +/* @1 ============================================================ * 1 Definition - * 1 ============================================================ */ + * 1 ============================================================ + */ +#define ENV_MNTR_DBG 0 /*@debug for the HW processing time from NHM/CLM trigger and get result*/ +#define ENV_MNTR_DBG_1 0 /*@debug 8812A & 8821A P2P Fail to get result*/ +#define ENV_MNTR_DBG_2 0 /*@debug for read reister*/ #define CCX_EN 1 @@ -42,11 +48,23 @@ #define NHM_PERIOD_MAX 65534 #define NHM_TH_NUM 11 /*threshold number of NHM*/ #define NHM_RPT_NUM 12 +#ifdef NHM_DYM_PW_TH_SUPPORT +#define DYM_PWTH_CCA_CAP 25 +#define NHM_1PEAK_PS 1 /* @case1 : positive skew*/ +#define NHM_1PEAK_NS 2 /* @case2 : negative skew*/ +#define NHM_1PEAK_SYM 3 /* @case3 : symmetry*/ +#define NHM_TH1 33 /* @13%, for step2 decision*/ +#define NHM_TH2 35 /* @14%, for step3_c1_c2 decision*/ +#define NHM_TH3 31 /* @12%, for step3_c3 decision*/ +#define NHM_TH4 178 /* @70%, for step4 decision*/ +#define NHM_TH5 25 /* @10%, for step5_c1_c2 decision*/ +#define NHM_TH6 39 /* @15%, for step5_c3 decision*/ +#endif #define IGI_2_NHM_TH(igi) ((igi) << 1)/*NHM_threshold = IGI * 2*/ #define NTH_TH_2_RSSI(th) ((th >> 1) - 10) -/*FAHM*/ +/*@FAHM*/ #define FAHM_INCLD_FA BIT(0) #define FAHM_INCLD_CRC_OK BIT(1) #define FAHM_INCLD_CRC_ER BIT(2) @@ -56,25 +74,26 @@ #define FAHM_SUCCESS BIT(2) #define ENV_MNTR_FAIL 0xff -/* 1 ============================================================ +/* @1 ============================================================ * 1 enumrate - * 1 ============================================================ */ + * 1 ============================================================ + */ enum phydm_clm_level { - CLM_RELEASE = 0, - CLM_LV_1 = 1, /* Low Priority function */ - CLM_LV_2 = 2, /* Middle Priority function */ - CLM_LV_3 = 3, /* High priority function (ex: Check hang function) */ - CLM_LV_4 = 4, /* Debug function (the highest priority) */ - CLM_MAX_NUM = 5 + CLM_RELEASE = 0, + CLM_LV_1 = 1, /* @Low Priority function */ + CLM_LV_2 = 2, /* @Middle Priority function */ + CLM_LV_3 = 3, /* @High priority function (ex: Check hang function) */ + CLM_LV_4 = 4, /* @Debug function (the highest priority) */ + CLM_MAX_NUM = 5 }; enum phydm_nhm_level { - NHM_RELEASE = 0, - NHM_LV_1 = 1, /* Low Priority function */ - NHM_LV_2 = 2, /* Middle Priority function */ - NHM_LV_3 = 3, /* High priority function (ex: Check hang function) */ - NHM_LV_4 = 4, /* Debug function (the highest priority) */ - NHM_MAX_NUM = 5 + NHM_RELEASE = 0, + NHM_LV_1 = 1, /* @Low Priority function */ + NHM_LV_2 = 2, /* @Middle Priority function */ + NHM_LV_3 = 3, /* @High priority function (ex: Check hang function) */ + NHM_LV_4 = 4, /* @Debug function (the highest priority) */ + NHM_MAX_NUM = 5 }; enum nhm_divider_opt_all { @@ -89,29 +108,29 @@ enum nhm_setting { RESTORE_NHM_SETTING }; -enum nhm_inexclude_cca_all { +enum nhm_option_cca_all { NHM_EXCLUDE_CCA = 0, NHM_INCLUDE_CCA = 1, NHM_CCA_INIT }; -enum nhm_inexclude_txon_all { +enum nhm_option_txon_all { NHM_EXCLUDE_TXON = 0, NHM_INCLUDE_TXON = 1, NHM_TXON_INIT }; enum nhm_application { - NHM_BACKGROUND = 0,/*default*/ + NHM_BACKGROUND = 0,/*@default*/ NHM_ACS = 1, IEEE_11K_HIGH = 2, IEEE_11K_LOW = 3, INTEL_XBOX = 4, - NHM_DBG = 5, /*manual trigger*/ + NHM_DBG = 5, /*@manual trigger*/ }; enum clm_application { - CLM_BACKGROUND = 0,/*default*/ + CLM_BACKGROUND = 0,/*@default*/ CLM_ACS = 1, }; @@ -120,9 +139,10 @@ enum clm_monitor_mode { CLM_FW_MNTR = 2 }; -/* 1 ============================================================ +/* @1 ============================================================ * 1 structure - * 1 ============================================================ */ + * 1 ============================================================ + */ struct env_trig_rpt { u8 nhm_rpt_stamp; u8 clm_rpt_stamp; @@ -138,48 +158,58 @@ struct env_mntr_rpt { }; struct nhm_para_info { - enum nhm_inexclude_txon_all incld_txon; /*Include TX on*/ - enum nhm_inexclude_cca_all incld_cca; /*Include CCA*/ - enum nhm_divider_opt_all div_opt; /*divider option*/ + enum nhm_option_txon_all incld_txon; /*@Include TX on*/ + enum nhm_option_cca_all incld_cca; /*@Include CCA*/ + enum nhm_divider_opt_all div_opt; /*@divider option*/ enum nhm_application nhm_app; - enum phydm_nhm_level nhm_lv; - u16 mntr_time; /*0~262 unit ms*/ - + enum phydm_nhm_level nhm_lv; + u16 mntr_time; /*@0~262 unit ms*/ + }; struct clm_para_info { enum clm_application clm_app; - enum phydm_clm_level clm_lv; - u16 mntr_time; /*0~262 unit ms*/ + enum phydm_clm_level clm_lv; + u16 mntr_time; /*@0~262 unit ms*/ }; struct ccx_info { u32 nhm_trigger_time; u32 clm_trigger_time; + u64 start_time; /*@monitor for the test duration*/ #ifdef NHM_SUPPORT enum nhm_application nhm_app; - enum nhm_inexclude_txon_all nhm_include_txon; - enum nhm_inexclude_cca_all nhm_include_cca; + enum nhm_option_txon_all nhm_include_txon; + enum nhm_option_cca_all nhm_include_cca; enum nhm_divider_opt_all nhm_divider_opt; /*Report*/ u8 nhm_th[NHM_TH_NUM]; u8 nhm_result[NHM_RPT_NUM]; - u16 nhm_period; /* 4us per unit */ + u16 nhm_period; /* @4us per unit */ u8 nhm_igi; u8 nhm_manual_ctrl; - u8 nhm_ratio; /*1% per nuit, it means the interference igi can't overcome.*/ + u8 nhm_ratio; /*@1% per nuit, it means the interference igi can't overcome.*/ u8 nhm_rpt_sum; - u16 nhm_duration; /*Real time of NHM_VALID */ + u16 nhm_duration; /*@Real time of NHM_VALID */ u8 nhm_set_lv; boolean nhm_ongoing; u8 nhm_rpt_stamp; +#ifdef NHM_DYM_PW_TH_SUPPORT + boolean nhm_dym_pw_th_en; + boolean nhm_dym_1_peak_en; + u8 nhm_pw_th_rf20_dft; + u8 nhm_pw_th_max; + u8 nhm_period_decre; + u8 nhm_sl_pw_th; #endif +#endif + #ifdef CLM_SUPPORT enum clm_application clm_app; u8 clm_manual_ctrl; u8 clm_set_lv; boolean clm_ongoing; - u16 clm_period; /* 4us per unit */ + u16 clm_period; /* @4us per unit */ u16 clm_result; u8 clm_ratio; u32 clm_fw_result_acc; @@ -190,195 +220,72 @@ struct ccx_info { #ifdef FAHM_SUPPORT boolean fahm_ongoing; u8 env_mntr_igi; - u8 fahm_nume_sel; /*fahm_numerator_sel: select {FA, CRCOK, CRC_fail} */ - u8 fahm_denum_sel; /*fahm_denumerator_sel: select {FA, CRCOK, CRC_fail} */ + u8 fahm_nume_sel; /*@fahm_numerator_sel: select {FA, CRCOK, CRC_fail} */ + u8 fahm_denom_sel; /*@fahm_denominator_sel: select {FA, CRCOK, CRC_fail} */ u16 fahm_period; /*unit: 4us*/ #endif -#if 1 /*Will remove*/ - /*Previous Settings*/ - enum nhm_inexclude_txon_all nhm_inexclude_txon_restore; - enum nhm_inexclude_cca_all nhm_inexclude_cca_restore; - u8 nhm_th_restore[NHM_TH_NUM]; - u16 nhm_period_restore;/* 4us per unit */ - u8 echo_igi; /* nhm_result comes from this igi */ -#endif }; -/* 1 ============================================================ - * 1 structure - * 1 ============================================================ */ - -void -phydm_get_nhm_result( - void *dm_void -); - -void -phydm_set_nhm_th_by_igi( - void *dm_void, - u8 igi -); - -void -phydm_nhm_setting( - void *dm_void, - u8 nhm_setting -); - -void -phydm_ccx_monitor_trigger( - void *dm_void, - u16 monitor_time -); - -void -phydm_ccx_monitor_result( - void *dm_void -); - +/* @1 ============================================================ + * 1 Function Prototype + * 1 ============================================================ + */ #ifdef FAHM_SUPPORT -void -phydm_fahm_init( - void *dm_void -); +void phydm_fahm_init(void *dm_void); -void -phydm_fahm_dbg( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); +void phydm_fahm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len); #endif - -/*NHM*/ +/*@NHM*/ #ifdef NHM_SUPPORT -void -phydm_nhm_trigger( - void *dm_void -); +void phydm_nhm_trigger(void *dm_void); -void -phydm_nhm_init( - void *dm_void -); +void phydm_nhm_init(void *dm_void); -void -phydm_nhm_dbg( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); +void phydm_nhm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len); +u8 phydm_get_igi(void *dm_void, enum bb_path path); #endif -/*CLM*/ +/*@CLM*/ #ifdef CLM_SUPPORT -void -phydm_clm_c2h_report_handler( - void *dm_void, - u8 *cmd_buf, - u8 cmd_len -); +void phydm_clm_c2h_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len); -void -phydm_clm_h2c( - void *dm_void, - u16 obs_time, - u8 fw_clm_en -); +void phydm_clm_h2c(void *dm_void, u16 obs_time, u8 fw_clm_en); +void phydm_clm_setting(void *dm_void, u16 clm_period); -void -phydm_clm_setting( - void *dm_void, - u16 clm_period -); +void phydm_clm_trigger(void *dm_void); -void -phydm_clm_trigger( - void *dm_void -); +boolean phydm_clm_check_rdy(void *dm_void); -boolean -phydm_clm_check_rdy( - void *dm_void -); +void phydm_clm_get_utility(void *dm_void); -void -phydm_clm_get_utility( - void *dm_void -); +boolean phydm_clm_get_result(void *dm_void); -boolean -phydm_clm_get_result( - void *dm_void -); +u8 phydm_clm_mntr_set(void *dm_void, struct clm_para_info *clm_para); -u8 -phydm_clm_mntr_set( - void *dm_void, - struct clm_para_info *clm_para -); +void phydm_set_clm_mntr_mode(void *dm_void, enum clm_monitor_mode mode); -void -phydm_set_clm_mntr_mode( - void *dm_void, - enum clm_monitor_mode mode -); - -void -phydm_clm_dbg( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); +void phydm_clm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len); #endif -u8 -phydm_env_mntr_trigger( - void *dm_void, - struct nhm_para_info *nhm_para, - struct clm_para_info *clm_para, - struct env_trig_rpt *rpt -); +u8 phydm_env_mntr_trigger(void *dm_void, struct nhm_para_info *nhm_para, + struct clm_para_info *clm_para, + struct env_trig_rpt *rpt); -u8 -phydm_env_mntr_result( - void *dm_void, - struct env_mntr_rpt *rpt -); +u8 phydm_env_mntr_result(void *dm_void, struct env_mntr_rpt *rpt); -void -phydm_env_mntr_watchdog( - void *dm_void -); +void phydm_env_mntr_watchdog(void *dm_void); +void phydm_env_monitor_init(void *dm_void); -void -phydm_env_monitor_init( - void *dm_void -); - -void -phydm_env_mntr_dbg( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); +void phydm_env_mntr_dbg(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); #endif diff --git a/hal/phydm/phydm_cfotracking.c b/hal/phydm/phydm_cfotracking.c index abef19b..2df2c05 100644 --- a/hal/phydm/phydm_cfotracking.c +++ b/hal/phydm/phydm_cfotracking.c @@ -25,212 +25,369 @@ #include "mp_precomp.h" #include "phydm_precomp.h" -void -phydm_set_crystal_cap( - void *dm_void, - u8 crystal_cap -) +s32 phydm_get_cfo_hz(void *dm_void, u32 val, u8 bit_num, u8 frac_num) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_cfo_track_struct *cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(dm, PHYDM_CFOTRACK); + s32 val_s = 0; - if (cfo_track->crystal_cap == crystal_cap) - return; + val_s = phydm_cnvrt_2_sign(val, bit_num); - crystal_cap = crystal_cap & 0x3F; - cfo_track->crystal_cap = crystal_cap; - - if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8188F)) { - #if (RTL8188E_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) - /* write 0x24[22:17] = 0x24[16:11] = crystal_cap */ - odm_set_bb_reg(dm, REG_AFE_XTAL_CTRL, 0x007ff800, (crystal_cap | (crystal_cap << 6))); - #endif - } - #if (RTL8812A_SUPPORT == 1) - else if (dm->support_ic_type & ODM_RTL8812) { - - /* write 0x2C[30:25] = 0x2C[24:19] = crystal_cap */ - odm_set_bb_reg(dm, REG_MAC_PHY_CTRL, 0x7FF80000, (crystal_cap | (crystal_cap << 6))); - - } - #endif - #if (RTL8703B_SUPPORT == 1) || (RTL8723B_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) - else if ((dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723B | ODM_RTL8192E | ODM_RTL8821 | ODM_RTL8723D))) { - - /* 0x2C[23:18] = 0x2C[17:12] = crystal_cap */ - odm_set_bb_reg(dm, REG_MAC_PHY_CTRL, 0x00FFF000, (crystal_cap | (crystal_cap << 6))); - - } - #endif - #if (RTL8814A_SUPPORT == 1) - else if (dm->support_ic_type & ODM_RTL8814A) { - - /* write 0x2C[26:21] = 0x2C[20:15] = crystal_cap */ - odm_set_bb_reg(dm, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6))); - - } - #endif - #if (RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) - else if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8197F)) { - - /* write 0x24[30:25] = 0x28[6:1] = crystal_cap */ - odm_set_bb_reg(dm, REG_AFE_XTAL_CTRL, 0x7e000000, crystal_cap); - odm_set_bb_reg(dm, REG_AFE_PLL_CTRL, 0x7e, crystal_cap); - - } - #endif - #if (RTL8710B_SUPPORT == 1) - else if (dm->support_ic_type & (ODM_RTL8710B)) { - - #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - /* write 0x60[29:24] = 0x60[23:18] = crystal_cap */ - HAL_SetSYSOnReg((PADAPTER)dm->adapter, REG_SYS_XTAL_CTRL0, 0x3FFC0000, (crystal_cap | (crystal_cap << 6))); - #endif - } - #endif - PHYDM_DBG(dm, DBG_CFO_TRK, "Set rystal_cap = 0x%x\n", cfo_track->crystal_cap); + if (frac_num == 10) /*@ (X*312500)/1024 ~= X*305*/ + val_s *= 305; + else if (frac_num == 11) /*@ (X*312500)/2048 ~= X*152*/ + val_s *= 152; + else if (frac_num == 12) /*@ (X*312500)/4096 ~= X*76*/ + val_s *= 76; + return val_s; } -u8 -phydm_get_default_crytaltal_cap( - void *dm_void -) +#if (ODM_IC_11AC_SERIES_SUPPORT) +void phydm_get_cfo_info_ac(void *dm_void, struct phydm_cfo_rpt *cfo) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 crystal_cap = 0x20; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i = 0; + u32 val[4] = {0}; + u32 val_1[4] = {0}; + u32 val_2[4] = {0}; + u32 val_tmp = 0; -#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) - struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; - struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv); + val[0] = odm_read_4byte(dm, R_0xd0c); + val_1[0] = odm_read_4byte(dm, R_0xd10); + val_2[0] = odm_get_bb_reg(dm, R_0xd14, 0x1fff0000); - crystal_cap = rtlefuse->crystalcap; -#elif (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + val[1] = odm_read_4byte(dm, R_0xd4c); + val_1[1] = odm_read_4byte(dm, R_0xd50); + val_2[1] = odm_get_bb_reg(dm, R_0xd54, 0x1fff0000); + #endif - crystal_cap = hal_data->crystal_cap; -#else - struct rtl8192cd_priv *priv = dm->priv; + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + val[2] = odm_read_4byte(dm, R_0xd8c); + val_1[2] = odm_read_4byte(dm, R_0xd90); + val_2[2] = odm_get_bb_reg(dm, R_0xd94, 0x1fff0000); + #endif - if (priv->pmib->dot11RFEntry.xcap > 0) - crystal_cap = priv->pmib->dot11RFEntry.xcap; + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + val[3] = odm_read_4byte(dm, R_0xdcc); + val_1[3] = odm_read_4byte(dm, R_0xdd0); + val_2[3] = odm_get_bb_reg(dm, R_0xdd4, 0x1fff0000); + #endif + + for (i = 0; i < dm->num_rf_path; i++) { + val_tmp = val[i] & 0xfff; /*@ Short CFO, S(12,11)*/ + cfo->cfo_rpt_s[i] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); + + val_tmp = val[i] >> 16; /*@ Long CFO, S(13,12)*/ + cfo->cfo_rpt_l[i] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); + + val_tmp = val_1[i] & 0x7ff; /*@ SCFO, S(11,10)*/ + cfo->cfo_rpt_sec[i] = phydm_get_cfo_hz(dm, val_tmp, 11, 10); + + val_tmp = val_1[i] >> 16; /*@ Acq CFO, S(13,12)*/ + cfo->cfo_rpt_acq[i] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); + + val_tmp = val_2[i]; /*@ End CFO, S(13,12)*/ + cfo->cfo_rpt_end[i] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); + } +} #endif - crystal_cap = crystal_cap & 0x3f; +#if (ODM_IC_11N_SERIES_SUPPORT) +void phydm_get_cfo_info_n(void *dm_void, struct phydm_cfo_rpt *cfo) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 val[5] = {0}; + u32 val_tmp = 0; - return crystal_cap; + odm_set_bb_reg(dm, R_0xd00, BIT(26), 1); + + val[0] = odm_read_4byte(dm, R_0xdac); /*@ Short CFO*/ + val[1] = odm_read_4byte(dm, R_0xdb0); /*@ Long CFO*/ + val[2] = odm_read_4byte(dm, R_0xdb8); /*@ Sec CFO*/ + val[3] = odm_read_4byte(dm, R_0xde0); /*@ Acq CFO*/ + val[4] = odm_read_4byte(dm, R_0xdbc); /*@ End CFO*/ + + /*@[path-A]*/ + if (dm->support_ic_type == ODM_RTL8721D) { + val_tmp = (val[0] & 0x0fff0000) >> 16; /*@ Short CFO, S(12,11)*/ + cfo->cfo_rpt_s[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); + val_tmp = (val[1] & 0x0fff0000) >> 16; /*@ Long CFO, S(12,11)*/ + cfo->cfo_rpt_l[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); + val_tmp = (val[2] & 0x0fff0000) >> 16; /*@ Sec CFO, S(12,11)*/ + cfo->cfo_rpt_sec[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); + val_tmp = (val[3] & 0x0fff0000) >> 16; /*@ Acq CFO, S(12,11)*/ + cfo->cfo_rpt_acq[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); + val_tmp = (val[4] & 0x0fff0000) >> 16; /*@ Acq CFO, S(12,11)*/ + cfo->cfo_rpt_end[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); + } else { + val_tmp = (val[0] & 0x0fff0000) >> 16; /*@ Short CFO, S(12,11)*/ + cfo->cfo_rpt_s[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); + val_tmp = (val[1] & 0x1fff0000) >> 16; /*@ Long CFO, S(13,12)*/ + cfo->cfo_rpt_l[0] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); + val_tmp = (val[2] & 0x7ff0000) >> 16; /*@ Sec CFO, S(11,10)*/ + cfo->cfo_rpt_sec[0] = phydm_get_cfo_hz(dm, val_tmp, 11, 10); + val_tmp = (val[3] & 0x1fff0000) >> 16; /*@ Acq CFO, S(13,12)*/ + cfo->cfo_rpt_acq[0] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); + val_tmp = (val[4] & 0x1fff0000) >> 16; /*@ Acq CFO, S(13,12)*/ + cfo->cfo_rpt_end[0] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); + } + + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + /*@[path-B]*/ + val_tmp = val[0] & 0xfff; /*@ Short CFO, S(12,11)*/ + cfo->cfo_rpt_s[1] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); + val_tmp = val[1] & 0x1fff; /*@ Long CFO, S(13,12)*/ + cfo->cfo_rpt_l[1] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); + val_tmp = val[2] & 0x7ff; /*@ Sec CFO, S(11,10)*/ + cfo->cfo_rpt_sec[1] = phydm_get_cfo_hz(dm, val_tmp, 11, 10); + val_tmp = val[3] & 0x1fff; /*@ Acq CFO, S(13,12)*/ + cfo->cfo_rpt_acq[1] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); + val_tmp = val[4] & 0x1fff; /*@ Acq CFO, S(13,12)*/ + cfo->cfo_rpt_end[1] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); + #endif } -void -phydm_set_atc_status( - void *dm_void, - boolean atc_status -) +void phydm_set_atc_status(void *dm_void, boolean atc_status) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_cfo_track_struct *cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(dm, PHYDM_CFOTRACK); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; + u32 reg_tmp = 0; + u32 mask_tmp = 0; + + PHYDM_DBG(dm, DBG_CFO_TRK, "[%s]ATC_en=%d\n", __func__, atc_status); if (cfo_track->is_atc_status == atc_status) return; - odm_set_bb_reg(dm, ODM_REG(BB_ATC, dm), ODM_BIT(BB_ATC, dm), atc_status); + reg_tmp = ODM_REG(BB_ATC, dm); + mask_tmp = ODM_BIT(BB_ATC, dm); + odm_set_bb_reg(dm, reg_tmp, mask_tmp, atc_status); cfo_track->is_atc_status = atc_status; } boolean -phydm_get_atc_status( - void *dm_void -) +phydm_get_atc_status(void *dm_void) { - boolean atc_status; - struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean atc_status = false; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 reg_tmp = 0; + u32 mask_tmp = 0; - atc_status = (boolean)odm_get_bb_reg(dm, ODM_REG(BB_ATC, dm), ODM_BIT(BB_ATC, dm)); + reg_tmp = ODM_REG(BB_ATC, dm); + mask_tmp = ODM_BIT(BB_ATC, dm); + + atc_status = (boolean)odm_get_bb_reg(dm, reg_tmp, mask_tmp); + + PHYDM_DBG(dm, DBG_CFO_TRK, "[%s]atc_status=%d\n", __func__, atc_status); return atc_status; } +#endif -void -phydm_cfo_tracking_reset( - void *dm_void -) +void phydm_get_cfo_info(void *dm_void, struct phydm_cfo_rpt *cfo) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_cfo_track_struct *cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(dm, PHYDM_CFOTRACK); + struct dm_struct *dm = (struct dm_struct *)dm_void; + + switch (dm->ic_ip_series) { + #if (ODM_IC_11N_SERIES_SUPPORT) + case PHYDM_IC_N: + phydm_get_cfo_info_n(dm, cfo); + break; + #endif + #if (ODM_IC_11AC_SERIES_SUPPORT) + case PHYDM_IC_AC: + phydm_get_cfo_info_ac(dm, cfo); + break; + #endif + default: + break; + } +} + +boolean +phydm_set_crystal_cap_reg(void *dm_void, u8 crystal_cap) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; + u32 reg_val = 0; + + if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | + ODM_RTL8195B | ODM_RTL8812F | ODM_RTL8197G | ODM_RTL8721D)) { + crystal_cap &= 0x7F; + reg_val = crystal_cap | (crystal_cap << 7); + } else { + crystal_cap &= 0x3F; + reg_val = crystal_cap | (crystal_cap << 6); + } + + cfo_track->crystal_cap = crystal_cap; + + if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8188F)) { + #if (RTL8188E_SUPPORT || RTL8188F_SUPPORT) + /* write 0x24[22:17] = 0x24[16:11] = crystal_cap */ + odm_set_mac_reg(dm, R_0x24, 0x7ff800, reg_val); + #endif + } + #if (RTL8812A_SUPPORT) + else if (dm->support_ic_type & ODM_RTL8812) { + /* write 0x2C[30:25] = 0x2C[24:19] = crystal_cap */ + odm_set_mac_reg(dm, R_0x2c, 0x7FF80000, reg_val); + } + #endif + #if (RTL8703B_SUPPORT || RTL8723B_SUPPORT || RTL8192E_SUPPORT ||\ + RTL8821A_SUPPORT || RTL8723D_SUPPORT) + else if ((dm->support_ic_type & + (ODM_RTL8703B | ODM_RTL8723B | ODM_RTL8192E | ODM_RTL8821 | + ODM_RTL8723D))) { + /* @0x2C[23:18] = 0x2C[17:12] = crystal_cap */ + odm_set_mac_reg(dm, R_0x2c, 0x00FFF000, reg_val); + } + #endif + #if (RTL8814A_SUPPORT) + else if (dm->support_ic_type & ODM_RTL8814A) { + /* write 0x2C[26:21] = 0x2C[20:15] = crystal_cap */ + odm_set_mac_reg(dm, R_0x2c, 0x07FF8000, reg_val); + } + #endif + #if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8197F_SUPPORT ||\ + RTL8192F_SUPPORT) + else if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | + ODM_RTL8197F | ODM_RTL8192F)) { + /* write 0x24[30:25] = 0x28[6:1] = crystal_cap */ + odm_set_mac_reg(dm, R_0x24, 0x7e000000, crystal_cap); + odm_set_mac_reg(dm, R_0x28, 0x7e, crystal_cap); + } + #endif + #if (RTL8710B_SUPPORT) + else if (dm->support_ic_type & (ODM_RTL8710B)) { + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + /* write 0x60[29:24] = 0x60[23:18] = crystal_cap */ + HAL_SetSYSOnReg(dm->adapter, R_0x60, 0x3FFC0000, reg_val); + #endif + } + #endif + #if (RTL8195B_SUPPORT) + else if (dm->support_ic_type & ODM_RTL8195B) { + phydm_set_crystalcap(dm, (u8)(reg_val & 0x7f)); + } + #endif + #if (RTL8721D_SUPPORT) + else if (dm->support_ic_type & (ODM_RTL8721D)) { + /* write 0x4800_0228[30:24] crystal_cap */ + /*HAL_SetSYSOnReg(dm->adapter, */ + /*REG_SYS_XTAL_8721d, 0x7F000000, crystal_cap);*/ + u32 temp_val = HAL_READ32(SYSTEM_CTRL_BASE_LP, + REG_SYS_EFUSE_SYSCFG2); + temp_val = ((crystal_cap << 24) & 0x7F000000) + | (temp_val & (~0x7F000000)); + HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_SYS_EFUSE_SYSCFG2, + temp_val); + } + #endif +#if (RTL8822C_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT ||\ + RTL8197G_SUPPORT) + else if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | + ODM_RTL8812F | ODM_RTL8197G)) { + /* write 0x1040[23:17] = 0x1040[16:10] = crystal_cap */ + odm_set_mac_reg(dm, R_0x1040, 0x00FFFC00, reg_val); + } else { + return false; + } +#endif + return true; +} + +void phydm_set_crystal_cap(void *dm_void, u8 crystal_cap) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; + + if (cfo_track->crystal_cap == crystal_cap) + return; + + if (phydm_set_crystal_cap_reg(dm, crystal_cap)) + PHYDM_DBG(dm, DBG_CFO_TRK, "Set crystal_cap = 0x%x\n", + cfo_track->crystal_cap); + else + PHYDM_DBG(dm, DBG_CFO_TRK, "Set fail\n"); +} + +void phydm_cfo_tracking_reset(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; PHYDM_DBG(dm, DBG_CFO_TRK, "%s ======>\n", __func__); - cfo_track->def_x_cap = phydm_get_default_crytaltal_cap(dm); + if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8195B | + ODM_RTL8812F | ODM_RTL8197G)) + cfo_track->def_x_cap = cfo_track->crystal_cap_default & 0x7f; + else + cfo_track->def_x_cap = cfo_track->crystal_cap_default & 0x3f; + cfo_track->is_adjust = true; if (cfo_track->crystal_cap > cfo_track->def_x_cap) { - phydm_set_crystal_cap(dm, cfo_track->crystal_cap - 1); - PHYDM_DBG(dm, DBG_CFO_TRK, "approch to Init-val (0x%x)\n", cfo_track->crystal_cap); - + PHYDM_DBG(dm, DBG_CFO_TRK, "approch to Init-val (0x%x)\n", + cfo_track->crystal_cap); + } else if (cfo_track->crystal_cap < cfo_track->def_x_cap) { - phydm_set_crystal_cap(dm, cfo_track->crystal_cap + 1); - PHYDM_DBG(dm, DBG_CFO_TRK, "approch to init-val 0x%x\n", cfo_track->crystal_cap); + PHYDM_DBG(dm, DBG_CFO_TRK, "approch to init-val 0x%x\n", + cfo_track->crystal_cap); } +#if ODM_IC_11N_SERIES_SUPPORT #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - phydm_set_atc_status(dm, true); + if (dm->support_ic_type & ODM_IC_11N_SERIES) + phydm_set_atc_status(dm, true); +#endif #endif } -void -phydm_cfo_tracking_init( - void *dm_void -) +void phydm_cfo_tracking_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_cfo_track_struct *cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(dm, PHYDM_CFOTRACK); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; - cfo_track->def_x_cap = cfo_track->crystal_cap = phydm_get_default_crytaltal_cap(dm); - cfo_track->is_atc_status = phydm_get_atc_status(dm); + PHYDM_DBG(dm, DBG_CFO_TRK, "[%s]=========>\n", __func__); + if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8195B | + ODM_RTL8812F | ODM_RTL8197G)) + cfo_track->crystal_cap = cfo_track->crystal_cap_default & 0x7f; + else + cfo_track->crystal_cap = cfo_track->crystal_cap_default & 0x3f; + + cfo_track->def_x_cap = cfo_track->crystal_cap; cfo_track->is_adjust = true; - PHYDM_DBG(dm, DBG_CFO_TRK, "ODM_CfoTracking_init()=========>\n"); - PHYDM_DBG(dm, DBG_CFO_TRK, "ODM_CfoTracking_init(): is_atc_status = %d, crystal_cap = 0x%x\n", cfo_track->is_atc_status, cfo_track->def_x_cap); + PHYDM_DBG(dm, DBG_CFO_TRK, "crystal_cap=0x%x\n", cfo_track->def_x_cap); -#if RTL8822B_SUPPORT - /* Crystal cap. control by WiFi */ - if (dm->support_ic_type & ODM_RTL8822B) - odm_set_bb_reg(dm, 0x10, 0x40, 0x1); -#endif - -#if RTL8821C_SUPPORT - /* Crystal cap. control by WiFi */ - if (dm->support_ic_type & ODM_RTL8821C) - odm_set_bb_reg(dm, 0x10, 0x40, 0x1); +#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT) + /* @Crystal cap. control by WiFi */ + if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) + odm_set_mac_reg(dm, R_0x10, 0x40, 0x1); #endif } -void -phydm_cfo_tracking( - void *dm_void -) +void phydm_cfo_tracking(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_cfo_track_struct *cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(dm, PHYDM_CFOTRACK); - s32 cfo_avg = 0, cfo_path_sum = 0; /*avg among each path*/ - u32 cfo_rpt_sum, cfo_khz_avg[4] = {0}; - s8 crystal_cap = cfo_track->crystal_cap; - u8 i, valid_path_cnt = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; + s32 cfo_avg = 0, cfo_path_sum = 0, cfo_abs = 0; + u32 cfo_rpt_sum = 0, cfo_khz_avg[4] = {0}; + s8 crystal_cap = cfo_track->crystal_cap; + u8 i = 0, valid_path_cnt = 0; - if (!(dm->support_ability & ODM_BB_CFO_TRACKING)) { + if (!(dm->support_ability & ODM_BB_CFO_TRACKING)) return; - } PHYDM_DBG(dm, DBG_CFO_TRK, "%s ======>\n", __func__); if (!dm->is_linked || !dm->is_one_entry_only) { phydm_cfo_tracking_reset(dm); - PHYDM_DBG(dm, DBG_CFO_TRK, "is_linked = %d, one_entry_only = %d\n", - dm->is_linked, dm->is_one_entry_only); - + PHYDM_DBG(dm, DBG_CFO_TRK, "is_linked=%d, one_entry_only=%d\n", + dm->is_linked, dm->is_one_entry_only); + } else { - /* No new packet */ if (cfo_track->packet_count == cfo_track->packet_count_pre) { PHYDM_DBG(dm, DBG_CFO_TRK, "Pkt cnt doesn't change\n"); @@ -238,23 +395,31 @@ phydm_cfo_tracking( } cfo_track->packet_count_pre = cfo_track->packet_count; - /*Calculate CFO */ + /*@Calculate CFO */ for (i = 0; i < dm->num_rf_path; i++) { - if (cfo_track->CFO_cnt[i] == 0) + if (!(dm->rx_ant_status & BIT(i))) continue; valid_path_cnt++; - cfo_rpt_sum = (u32)CFO_HW_RPT_2_KHZ(((cfo_track->CFO_tail[i] < 0) ? (0 - cfo_track->CFO_tail[i]) : cfo_track->CFO_tail[i])); - cfo_khz_avg[i] = cfo_rpt_sum / cfo_track->CFO_cnt[i]; - PHYDM_DBG(dm, DBG_CFO_TRK, "[Path-%d] CFO_sum = (( %d )), cnt = (( %d )) , CFO_avg= (( %s%d )) kHz\n", - i, cfo_rpt_sum, cfo_track->CFO_cnt[i], ((cfo_track->CFO_tail[i] < 0) ? "-" : " "), cfo_khz_avg[i]); - } + if (cfo_track->CFO_tail[i] < 0) + cfo_abs = 0 - cfo_track->CFO_tail[i]; + else + cfo_abs = cfo_track->CFO_tail[i]; - for (i = 0; i < valid_path_cnt; i++) { - if (cfo_track->CFO_tail[i] < 0) { + cfo_rpt_sum = (u32)CFO_HW_RPT_2_KHZ(cfo_abs); + cfo_khz_avg[i] = PHYDM_DIV(cfo_rpt_sum, + cfo_track->CFO_cnt[i]); + + PHYDM_DBG(dm, DBG_CFO_TRK, + "[Path-%d] CFO_sum=((%d)), cnt=((%d)), CFO_avg=((%s%d))kHz\n", + i, cfo_rpt_sum, cfo_track->CFO_cnt[i], + ((cfo_track->CFO_tail[i] < 0) ? "-" : " "), + cfo_khz_avg[i]); + + if (cfo_track->CFO_tail[i] < 0) cfo_path_sum += (0 - (s32)cfo_khz_avg[i]); - } else + else cfo_path_sum += (s32)cfo_khz_avg[i]; } @@ -265,7 +430,8 @@ phydm_cfo_tracking( cfo_track->CFO_ave_pre = cfo_avg; - PHYDM_DBG(dm, DBG_CFO_TRK, "path_cnt = ((%d)), CFO_avg_path=((%d kHz))\n", valid_path_cnt, cfo_avg); + PHYDM_DBG(dm, DBG_CFO_TRK, "path_cnt=%d, CFO_avg_path=%d kHz\n", + valid_path_cnt, cfo_avg); /*reset counter*/ for (i = 0; i < dm->num_rf_path; i++) { @@ -274,98 +440,157 @@ phydm_cfo_tracking( } /* To adjust crystal cap or not */ - if (cfo_track->is_adjust == false) { - if (cfo_avg > CFO_TRK_ENABLE_TH || cfo_avg < (-CFO_TRK_ENABLE_TH)) + if (!cfo_track->is_adjust) { + if (cfo_avg > CFO_TRK_ENABLE_TH || + cfo_avg < (-CFO_TRK_ENABLE_TH)) cfo_track->is_adjust = true; } else { - if (cfo_avg < CFO_TRK_STOP_TH && cfo_avg > (-CFO_TRK_STOP_TH)) + if (cfo_avg < CFO_TRK_STOP_TH && + cfo_avg > (-CFO_TRK_STOP_TH)) cfo_track->is_adjust = false; } #ifdef ODM_CONFIG_BT_COEXIST - /*BT case: Disable CFO tracking */ + /*@BT case: Disable CFO tracking */ if (dm->bt_info_table.is_bt_enabled) { cfo_track->is_adjust = false; phydm_set_crystal_cap(dm, cfo_track->def_x_cap); - PHYDM_DBG(dm, DBG_CFO_TRK, "Disable CFO tracking for BT\n"); + PHYDM_DBG(dm, DBG_CFO_TRK, "[BT]Disable CFO_track\n"); } #endif - - /*Adjust Crystal Cap. */ + + /*@Adjust Crystal Cap. */ if (cfo_track->is_adjust) { if (cfo_avg > CFO_TRK_STOP_TH) crystal_cap += 1; else if (cfo_avg < (-CFO_TRK_STOP_TH)) - crystal_cap -=1; + crystal_cap -= 1; - if (crystal_cap > 0x3f) - crystal_cap = 0x3f; - else if (crystal_cap < 0) + if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | + ODM_RTL8195B | ODM_RTL8812F | ODM_RTL8197G)) { + if (crystal_cap > 0x7F) + crystal_cap = 0x7F; + } else { + if (crystal_cap > 0x3F) + crystal_cap = 0x3F; + } + if (crystal_cap < 0) crystal_cap = 0; phydm_set_crystal_cap(dm, (u8)crystal_cap); } - - PHYDM_DBG(dm, DBG_CFO_TRK, "Crystal cap{Current, Default}={0x%x, 0x%x}\n\n", - cfo_track->crystal_cap, cfo_track->def_x_cap); - /* Dynamic ATC switch */ + PHYDM_DBG(dm, DBG_CFO_TRK, "X_cap{Curr,Default}={0x%x,0x%x}\n", + cfo_track->crystal_cap, cfo_track->def_x_cap); + + /* @Dynamic ATC switch */ + #if ODM_IC_11N_SERIES_SUPPORT #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) if (dm->support_ic_type & ODM_IC_11N_SERIES) { - if (cfo_avg < CFO_TH_ATC && cfo_avg > -CFO_TH_ATC) { + if (cfo_avg < CFO_TH_ATC && cfo_avg > -CFO_TH_ATC) phydm_set_atc_status(dm, false); - PHYDM_DBG(dm, DBG_CFO_TRK, "Disable ATC\n"); - } else { + else phydm_set_atc_status(dm, true); - PHYDM_DBG(dm, DBG_CFO_TRK, "Enable ATC\n"); - } + } #endif + #endif } } -void -phydm_parsing_cfo( - void *dm_void, - void *pktinfo_void, - s8 *pcfotail, - u8 num_ss -) +void phydm_parsing_cfo(void *dm_void, void *pktinfo_void, s8 *pcfotail, + u8 num_ss) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_perpkt_info_struct *pktinfo = (struct phydm_perpkt_info_struct *)pktinfo_void; - struct phydm_cfo_track_struct *cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(dm, PHYDM_CFOTRACK); - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_perpkt_info_struct *pktinfo = NULL; + struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; + boolean valid_info = false; + u8 i = 0; if (!(dm->support_ability & ODM_BB_CFO_TRACKING)) return; -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + pktinfo = (struct phydm_perpkt_info_struct *)pktinfo_void; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT)) if (pktinfo->is_packet_match_bssid) + valid_info = true; #else - if (pktinfo->station_id != 0) + if (dm->number_active_client == 1) + valid_info = true; #endif - { - if (num_ss > dm->num_rf_path) /*For fool proof*/ + if (valid_info) { + if (num_ss > dm->num_rf_path) /*@For fool proof*/ num_ss = dm->num_rf_path; + #if 0 + PHYDM_DBG(dm, DBG_CFO_TRK, "num_ss=%d, num_rf_path=%d\n", + num_ss, dm->num_rf_path); + #endif - /*PHYDM_DBG(dm, DBG_CFO_TRK, "num_ss = ((%d)), dm->num_rf_path = ((%d))\n", num_ss, dm->num_rf_path);*/ - - - /* 3 Update CFO report for path-A & path-B */ + /* @ Update CFO report for path-A & path-B */ /* Only paht-A and path-B have CFO tail and short CFO */ - for (i = 0; i < num_ss; i++) { + for (i = 0; i < dm->num_rf_path; i++) { + if (!(dm->rx_ant_status & BIT(i))) + continue; cfo_track->CFO_tail[i] += pcfotail[i]; cfo_track->CFO_cnt[i]++; - /*PHYDM_DBG(dm, DBG_CFO_TRK, "[ID %d][path %d][rate 0x%x] CFO_tail = ((%d)), CFO_tail_sum = ((%d)), CFO_cnt = ((%d))\n", - pktinfo->station_id, i, pktinfo->data_rate, pcfotail[i], cfo_track->CFO_tail[i], cfo_track->CFO_cnt[i]); - */ + #if 0 + PHYDM_DBG(dm, DBG_CFO_TRK, + "[ID %d][path %d][rate 0x%x] CFO_tail = ((%d)), CFO_tail_sum = ((%d)), CFO_cnt = ((%d))\n", + pktinfo->station_id, i, pktinfo->data_rate, + pcfotail[i], cfo_track->CFO_tail[i], + cfo_track->CFO_cnt[i]); + #endif } - /* 3 Update packet counter */ + /* @ Update packet counter */ if (cfo_track->packet_count == 0xffffffff) cfo_track->packet_count = 0; else cfo_track->packet_count++; } } + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +void phy_Init_crystal_capacity(void *dm_void, u8 crystal_cap) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (!phydm_set_crystal_cap_reg(dm, crystal_cap)) + RT_TRACE_F(COMP_INIT, DBG_SERIOUS, + ("Crystal is not initialized!\n")); +} +#endif + +void phydm_cfo_tracking_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "set Xcap: {1}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "show Xcap: {100}\n"); + } else { + PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); + + if (var1[0] == 1) { + PHYDM_SSCANF(input[2], DCMD_HEX, &var1[1]); + phydm_set_crystal_cap(dm, (u8)var1[1]); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Set X_cap=0x%x\n", cfo_track->crystal_cap); + } else if (var1[0] == 100) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "X_cap=0x%x\n", cfo_track->crystal_cap); + } + } + *_used = used; + *_out_len = out_len; +} + diff --git a/hal/phydm/phydm_cfotracking.h b/hal/phydm/phydm_cfotracking.h index 9324489..4f4ba97 100644 --- a/hal/phydm/phydm_cfotracking.h +++ b/hal/phydm/phydm_cfotracking.h @@ -23,49 +23,51 @@ * *****************************************************************************/ -#ifndef __PHYDMCFOTRACK_H__ -#define __PHYDMCFOTRACK_H__ +#ifndef __PHYDMCFOTRACK_H__ +#define __PHYDMCFOTRACK_H__ -#define CFO_TRACKING_VERSION "1.4" /*2015.10.01 Stanley, Modify for 8822B*/ +#define CFO_TRACKING_VERSION "2.3" -#define CFO_TRK_ENABLE_TH 20 /* (kHz) enable CFO Tracking threshold*/ -#define CFO_TRK_STOP_TH 10 /* (kHz) disable CFO Tracking threshold*/ -#define CFO_TH_ATC 80 /* kHz */ +#define CFO_TRK_ENABLE_TH 20 /* @kHz enable CFO_Track threshold*/ +#define CFO_TRK_STOP_TH 10 /* @kHz disable CFO_Track threshold*/ +#define CFO_TH_ATC 80 /* @kHz */ struct phydm_cfo_track_struct { boolean is_atc_status; - boolean is_adjust; /*already modify crystal cap*/ - u8 crystal_cap; - u8 def_x_cap; - s32 CFO_tail[4]; - u32 CFO_cnt[4]; - s32 CFO_ave_pre; - u32 packet_count; - u32 packet_count_pre; + boolean is_adjust; /*@already modify crystal cap*/ + u8 crystal_cap; + u8 crystal_cap_default; + u8 def_x_cap; + s32 CFO_tail[4]; + u32 CFO_cnt[4]; + s32 CFO_ave_pre; + u32 packet_count; + u32 packet_count_pre; }; -void -phydm_set_crystal_cap( - void *dm_void, - u8 crystal_cap -); +struct phydm_cfo_rpt { + s32 cfo_rpt_s[PHYDM_MAX_RF_PATH]; + s32 cfo_rpt_l[PHYDM_MAX_RF_PATH]; + s32 cfo_rpt_acq[PHYDM_MAX_RF_PATH]; + s32 cfo_rpt_sec[PHYDM_MAX_RF_PATH]; + s32 cfo_rpt_end[PHYDM_MAX_RF_PATH]; +}; -void -phydm_cfo_tracking_init( - void *dm_void -); +void phydm_get_cfo_info(void *dm_void, struct phydm_cfo_rpt *cfo); -void -phydm_cfo_tracking( - void *dm_void -); +boolean phydm_set_crystal_cap_reg(void *dm_void, u8 crystal_cap); -void -phydm_parsing_cfo( - void *dm_void, - void *pktinfo_void, - s8 *pcfotail, - u8 num_ss -); +void phydm_set_crystal_cap(void *dm_void, u8 crystal_cap); +void phydm_cfo_tracking_init(void *dm_void); + +void phydm_cfo_tracking(void *dm_void); + +void phydm_parsing_cfo(void *dm_void, void *pktinfo_void, s8 *pcfotail, + u8 num_ss); +void phydm_cfo_tracking_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +void phy_Init_crystal_capacity(void *dm_void, u8 crystal_cap); +#endif #endif diff --git a/hal/phydm/phydm_debug.c b/hal/phydm/phydm_debug.c index 3599e65..e36dc94 100644 --- a/hal/phydm/phydm_debug.c +++ b/hal/phydm/phydm_debug.c @@ -23,203 +23,193 @@ * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" -void -phydm_init_debug_setting( - struct dm_struct *dm -) +void phydm_init_debug_setting(struct dm_struct *dm) { - dm->debug_level = ODM_DBG_TRACE; - dm->fw_debug_components = 0; dm->debug_components = - \ + #if DBG - /*BB Functions*/ - /* DBG_DIG |*/ - /* DBG_RA_MASK |*/ - /* DBG_DYN_TXPWR |*/ - /* DBG_FA_CNT |*/ - /* DBG_RSSI_MNTR |*/ - /* DBG_CCKPD |*/ - /* DBG_ANT_DIV |*/ - /* DBG_SMT_ANT |*/ - /* DBG_PWR_TRAIN |*/ - /* DBG_RA |*/ - /* DBG_PATH_DIV |*/ - /* DBG_DFS |*/ - /* DBG_DYN_ARFR |*/ - /* DBG_ADPTVTY |*/ - /* DBG_CFO_TRK |*/ - /* DBG_ENV_MNTR |*/ - /* DBG_PRI_CCA |*/ - /* DBG_ADPTV_SOML |*/ - /* DBG_LNA_SAT_CHK |*/ - /* DBG_DYN_RX_PATH |*/ - /* DBG_PHY_STATUS |*/ - /* DBG_TMP |*/ - /* DBG_FW_TRACE |*/ - /* DBG_TXBF |*/ - /* DBG_COMMON_FLOW |*/ - /* ODM_COMP_TX_PWR_TRACK |*/ - /* ODM_COMP_CALIBRATION |*/ - /* ODM_COMP_MP |*/ - /* ODM_PHY_CONFIG |*/ - /* ODM_COMP_INIT |*/ - /* ODM_COMP_COMMON |*/ - /* ODM_COMP_API |*/ - - + /*@BB Functions*/ + /*@DBG_DIG |*/ + /*@DBG_RA_MASK |*/ + /*@DBG_DYN_TXPWR |*/ + /*@DBG_FA_CNT |*/ + /*@DBG_RSSI_MNTR |*/ + /*@DBG_CCKPD |*/ + /*@DBG_ANT_DIV |*/ + /*@DBG_SMT_ANT |*/ + /*@DBG_PWR_TRAIN |*/ + /*@DBG_RA |*/ + /*@DBG_PATH_DIV |*/ + /*@DBG_DFS |*/ + /*@DBG_DYN_ARFR |*/ + /*@DBG_ADPTVTY |*/ + /*@DBG_CFO_TRK |*/ + /*@DBG_ENV_MNTR |*/ + /*@DBG_PRI_CCA |*/ + /*@DBG_ADPTV_SOML |*/ + /*@DBG_LNA_SAT_CHK |*/ + /*@DBG_PHY_STATUS |*/ + /*@DBG_TMP |*/ + /*@DBG_FW_TRACE |*/ + /*@DBG_TXBF |*/ + /*@DBG_COMMON_FLOW |*/ + /*@ODM_PHY_CONFIG |*/ + /*@ODM_COMP_INIT |*/ + /*@DBG_CMN |*/ + /*@ODM_COMP_API |*/ #endif - 0; + 0; dm->fw_buff_is_enpty = true; dm->pre_c2h_seq = 0; dm->c2h_cmd_start = 0; dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD; dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD; + phydm_reset_rx_rate_distribution(dm); } -void -phydm_bb_dbg_port_header_sel( - void *dm_void, - u32 header_idx -) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - - odm_set_bb_reg(dm, 0x8f8, (BIT(25) | BIT(24) | BIT(23) | BIT(22)), header_idx); - - /* - header_idx: - (0:) '{ofdm_dbg[31:0]}' - (1:) '{cca,crc32_fail,dbg_ofdm[29:0]}' - (2:) '{vbon,crc32_fail,dbg_ofdm[29:0]}' - (3:) '{cca,crc32_ok,dbg_ofdm[29:0]}' - (4:) '{vbon,crc32_ok,dbg_ofdm[29:0]}' - (5:) '{dbg_iqk_anta}' - (6:) '{cca,ofdm_crc_ok,dbg_dp_anta[29:0]}' - (7:) '{dbg_iqk_antb}' - (8:) '{DBGOUT_RFC_b[31:0]}' - (9:) '{DBGOUT_RFC_a[31:0]}' - (a:) '{dbg_ofdm}' - (b:) '{dbg_cck}' - */ - } -} - -void -phydm_bb_dbg_port_clock_en( - void *dm_void, - u8 enable -) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 reg_value = 0; - - if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8814A | ODM_RTL8814B)) { - - reg_value = enable ? 0x7 : 0; - odm_set_bb_reg(dm, 0x198c, 0x7, reg_value); /*enable/disable debug port clock, for power saving*/ - } -} - -u8 -phydm_set_bb_dbg_port( - void *dm_void, - u8 curr_dbg_priority, - u32 debug_port -) +void phydm_bb_dbg_port_header_sel(void *dm_void, u32 header_idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 dbg_port_result = false; + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + odm_set_bb_reg(dm, R_0x8f8, 0x3c00000, header_idx); + + /*@ + * header_idx: + * (0:) '{ofdm_dbg[31:0]}' + * (1:) '{cca,crc32_fail,dbg_ofdm[29:0]}' + * (2:) '{vbon,crc32_fail,dbg_ofdm[29:0]}' + * (3:) '{cca,crc32_ok,dbg_ofdm[29:0]}' + * (4:) '{vbon,crc32_ok,dbg_ofdm[29:0]}' + * (5:) '{dbg_iqk_anta}' + * (6:) '{cca,ofdm_crc_ok,dbg_dp_anta[29:0]}' + * (7:) '{dbg_iqk_antb}' + * (8:) '{DBGOUT_RFC_b[31:0]}' + * (9:) '{DBGOUT_RFC_a[31:0]}' + * (a:) '{dbg_ofdm}' + * (b:) '{dbg_cck}' + */ + } +} + +void phydm_bb_dbg_port_clock_en(void *dm_void, u8 enable) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 reg_value = 0; + + if (dm->support_ic_type & + (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8814A | ODM_RTL8814B | + ODM_RTL8195B)) { + /*@enable/disable debug port clock, for power saving*/ + reg_value = enable ? 0x7 : 0; + odm_set_bb_reg(dm, R_0x198c, 0x7, reg_value); + } +} + +u32 phydm_get_bb_dbg_port_idx(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 val = 0; + + if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + phydm_bb_dbg_port_clock_en(dm, true); + val = odm_get_bb_reg(dm, R_0x8fc, MASKDWORD); + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + val = odm_get_bb_reg(dm, R_0x1c3c, 0xfff00); + } else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/ + val = odm_get_bb_reg(dm, R_0x908, MASKDWORD); + } + return val; +} + +u8 phydm_set_bb_dbg_port(void *dm_void, u8 curr_dbg_priority, u32 debug_port) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 dbg_port_result = false; if (curr_dbg_priority > dm->pre_dbg_priority) { if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - phydm_bb_dbg_port_clock_en(dm, true); - - odm_set_bb_reg(dm, 0x8fc, MASKDWORD, debug_port); - /**/ - } else /*if (dm->support_ic_type & ODM_IC_11N_SERIES)*/ { - odm_set_bb_reg(dm, 0x908, MASKDWORD, debug_port); - /**/ + + odm_set_bb_reg(dm, R_0x8fc, MASKDWORD, debug_port); + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + odm_set_bb_reg(dm, R_0x1c3c, 0xfff00, debug_port); + + } else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/ + odm_set_bb_reg(dm, R_0x908, MASKDWORD, debug_port); } - PHYDM_DBG(dm, ODM_COMP_API, "DbgPort ((0x%x)) set success, Cur_priority=((%d)), Pre_priority=((%d))\n", debug_port, curr_dbg_priority, dm->pre_dbg_priority); + PHYDM_DBG(dm, ODM_COMP_API, + "DbgPort ((0x%x)) set success, Cur_priority=((%d)), Pre_priority=((%d))\n", + debug_port, curr_dbg_priority, dm->pre_dbg_priority); dm->pre_dbg_priority = curr_dbg_priority; dbg_port_result = true; } - + return dbg_port_result; } -void -phydm_release_bb_dbg_port( - void *dm_void -) +void phydm_release_bb_dbg_port(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; phydm_bb_dbg_port_clock_en(dm, false); phydm_bb_dbg_port_header_sel(dm, 0); - dm->pre_dbg_priority = BB_DBGPORT_RELEASE; + dm->pre_dbg_priority = DBGPORT_RELEASE; PHYDM_DBG(dm, ODM_COMP_API, "Release BB dbg_port\n"); } -u32 -phydm_get_bb_dbg_port_value( - void *dm_void -) +u32 phydm_get_bb_dbg_port_val(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 dbg_port_value = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 dbg_port_value = 0; + + if (dm->support_ic_type & ODM_IC_11AC_SERIES) + dbg_port_value = odm_get_bb_reg(dm, R_0xfa0, MASKDWORD); + else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + dbg_port_value = odm_get_bb_reg(dm, R_0x2dbc, MASKDWORD); + else /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/ + dbg_port_value = odm_get_bb_reg(dm, R_0xdf4, MASKDWORD); - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - dbg_port_value = odm_get_bb_reg(dm, 0xfa0, MASKDWORD); - /**/ - } else /*if (dm->support_ic_type & ODM_IC_11N_SERIES)*/ { - dbg_port_value = odm_get_bb_reg(dm, 0xdf4, MASKDWORD); - /**/ - } PHYDM_DBG(dm, ODM_COMP_API, "dbg_port_value = 0x%x\n", dbg_port_value); - return dbg_port_value; + return dbg_port_value; } #ifdef CONFIG_PHYDM_DEBUG_FUNCTION - -void -phydm_bb_debug_info_n_series( - void *dm_void, - u32 *_used, - char *output, - u32 *_out_len -) +#if (ODM_IC_11N_SERIES_SUPPORT) +void phydm_bb_hw_dbg_info_n(void *dm_void, u32 *_used, char *output, + u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; u32 used = *_used; u32 out_len = *_out_len; + u32 value32 = 0, value32_1 = 0; + u8 rf_gain_a = 0, rf_gain_b = 0, rf_gain_c = 0, rf_gain_d = 0; + u8 rx_snr_a = 0, rx_snr_b = 0, rx_snr_c = 0, rx_snr_d = 0; + s8 rxevm_0 = 0, rxevm_1 = 0; + #if 1 + struct phydm_cfo_rpt cfo; + u8 i = 0; + #else + s32 short_cfo_a = 0, short_cfo_b = 0, long_cfo_a = 0, long_cfo_b = 0; + s32 scfo_a = 0, scfo_b = 0, avg_cfo_a = 0, avg_cfo_b = 0; + s32 cfo_end_a = 0, cfo_end_b = 0, acq_cfo_a = 0, acq_cfo_b = 0; + #endif - u32 value32 = 0, value32_1 = 0; - u8 rf_gain_a = 0, rf_gain_b = 0, rf_gain_c = 0, rf_gain_d = 0; - u8 rx_snr_a = 0, rx_snr_b = 0, rx_snr_c = 0, rx_snr_d = 0; + PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n", + "BB Report Info"); - s8 rxevm_0 = 0, rxevm_1 = 0; - s32 short_cfo_a = 0, short_cfo_b = 0, long_cfo_a = 0, long_cfo_b = 0; - s32 scfo_a = 0, scfo_b = 0, avg_cfo_a = 0, avg_cfo_b = 0; - s32 cfo_end_a = 0, cfo_end_b = 0, acq_cfo_a = 0, acq_cfo_b = 0; - - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s\n", "BB Report Info"); - - /*AGC result*/ - value32 = odm_get_bb_reg(dm, 0xdd0, MASKDWORD); + /*@AGC result*/ + value32 = odm_get_bb_reg(dm, R_0xdd0, MASKDWORD); rf_gain_a = (u8)(value32 & 0x3f); rf_gain_a = rf_gain_a << 1; @@ -233,12 +223,11 @@ phydm_bb_debug_info_n_series( rf_gain_d = rf_gain_d << 1; PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d / %d / %d", - "OFDM RX RF Gain(A/B/C/D)", rf_gain_a, rf_gain_b, - rf_gain_c, rf_gain_d); + "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", + rf_gain_a, rf_gain_b, rf_gain_c, rf_gain_d); /*SNR report*/ - value32 = odm_get_bb_reg(dm, 0xdd4, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD); rx_snr_a = (u8)(value32 & 0xff); rx_snr_a = rx_snr_a >> 1; @@ -252,11 +241,11 @@ phydm_bb_debug_info_n_series( rx_snr_d = rx_snr_d >> 1; PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", - rx_snr_a, rx_snr_b, rx_snr_c, rx_snr_d); + "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", + rx_snr_a, rx_snr_b, rx_snr_c, rx_snr_d); /* PostFFT related info*/ - value32 = odm_get_bb_reg(dm, 0xdd8, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0xdd8, MASKDWORD); rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16); rxevm_0 /= 2; @@ -269,20 +258,29 @@ phydm_bb_debug_info_n_series( rxevm_1 = 0; PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d", "RXEVM (1ss/2ss)", rxevm_0, - rxevm_1); + "\r\n %-35s = %d / %d", "RXEVM (1ss/2ss)", rxevm_0, rxevm_1); - /*CFO Report Info*/ - odm_set_bb_reg(dm, 0xd00, BIT(26), 1); +#if 1 + phydm_get_cfo_info(dm, &cfo); + for (i = 0; i < dm->num_rf_path; i++) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}", + "CFO", i, "{S, L, Sec, Acq, End}", + cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i], + cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]); + } +#else + /*@CFO Report Info*/ + odm_set_bb_reg(dm, R_0xd00, BIT(26), 1); /*Short CFO*/ - value32 = odm_get_bb_reg(dm, 0xdac, MASKDWORD); - value32_1 = odm_get_bb_reg(dm, 0xdb0, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0xdac, MASKDWORD); + value32_1 = odm_get_bb_reg(dm, R_0xdb0, MASKDWORD); - short_cfo_b = (s32)(value32 & 0xfff); /*S(12,11)*/ + short_cfo_b = (s32)(value32 & 0xfff); /*S(12,11)*/ short_cfo_a = (s32)((value32 & 0x0fff0000) >> 16); - long_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/ + long_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/ long_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16); /*SFO 2's to dec*/ @@ -294,7 +292,7 @@ phydm_bb_debug_info_n_series( short_cfo_a = (short_cfo_a * 312500) / 2048; short_cfo_b = (short_cfo_b * 312500) / 2048; - /*LFO 2's to dec*/ + /*@LFO 2's to dec*/ if (long_cfo_a > 4095) long_cfo_a = long_cfo_a - 8192; @@ -305,20 +303,20 @@ phydm_bb_debug_info_n_series( long_cfo_a = long_cfo_a * 312500 / 4096; long_cfo_b = long_cfo_b * 312500 / 4096; + PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s", + "CFO Report Info"); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s", "CFO Report Info"); + "\r\n %-35s = %d / %d", "Short CFO(Hz) ", short_cfo_a, + short_cfo_b); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d", "Short CFO(Hz) ", - short_cfo_a, short_cfo_b); - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d", "Long CFO(Hz) ", - long_cfo_a, long_cfo_b); + "\r\n %-35s = %d / %d", "Long CFO(Hz) ", long_cfo_a, + long_cfo_b); /*SCFO*/ - value32 = odm_get_bb_reg(dm, 0xdb8, MASKDWORD); - value32_1 = odm_get_bb_reg(dm, 0xdb4, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0xdb8, MASKDWORD); + value32_1 = odm_get_bb_reg(dm, R_0xdb4, MASKDWORD); - scfo_b = (s32)(value32 & 0x7ff); /*S(11,10)*/ + scfo_b = (s32)(value32 & 0x7ff); /*S(11,10)*/ scfo_a = (s32)((value32 & 0x07ff0000) >> 16); if (scfo_a > 1023) @@ -330,7 +328,7 @@ phydm_bb_debug_info_n_series( scfo_a = scfo_a * 312500 / 1024; scfo_b = scfo_b * 312500 / 1024; - avg_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/ + avg_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/ avg_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16); if (avg_cfo_a > 4095) @@ -343,16 +341,16 @@ phydm_bb_debug_info_n_series( avg_cfo_b = avg_cfo_b * 312500 / 4096; PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d", "value SCFO(Hz) ", scfo_a, - scfo_b); + "\r\n %-35s = %d / %d", "value SCFO(Hz) ", scfo_a, + scfo_b); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d", "Avg CFO(Hz) ", avg_cfo_a, - avg_cfo_b); + "\r\n %-35s = %d / %d", "Avg CFO(Hz) ", avg_cfo_a, + avg_cfo_b); - value32 = odm_get_bb_reg(dm, 0xdbc, MASKDWORD); - value32_1 = odm_get_bb_reg(dm, 0xde0, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0xdbc, MASKDWORD); + value32_1 = odm_get_bb_reg(dm, R_0xde0, MASKDWORD); - cfo_end_b = (s32)(value32 & 0x1fff); /*S(13,12)*/ + cfo_end_b = (s32)(value32 & 0x1fff); /*S(13,12)*/ cfo_end_a = (s32)((value32 & 0x1fff0000) >> 16); if (cfo_end_a > 4095) @@ -364,7 +362,7 @@ phydm_bb_debug_info_n_series( cfo_end_a = cfo_end_a * 312500 / 4096; cfo_end_b = cfo_end_b * 312500 / 4096; - acq_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/ + acq_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/ acq_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16); if (acq_cfo_a > 4095) @@ -377,98 +375,96 @@ phydm_bb_debug_info_n_series( acq_cfo_b = acq_cfo_b * 312500 / 4096; PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d", "End CFO(Hz) ", cfo_end_a, - cfo_end_b); + "\r\n %-35s = %d / %d", "End CFO(Hz) ", cfo_end_a, + cfo_end_b); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d", "ACQ CFO(Hz) ", acq_cfo_a, - acq_cfo_b); - + "\r\n %-35s = %d / %d", "ACQ CFO(Hz) ", acq_cfo_a, + acq_cfo_b); +#endif } - - -void -phydm_bb_debug_info( - void *dm_void, - u32 *_used, - char *output, - u32 *_out_len -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 used = *_used; - u32 out_len = *_out_len; - - char *tmp_string = NULL; - - u8 rx_ht_bw, rx_vht_bw, rxsc, rx_ht, rx_bw; - static u8 v_rx_bw ; - u32 value32, value32_1, value32_2, value32_3; - s32 sfo_a, sfo_b, sfo_c, sfo_d; - s32 lfo_a, lfo_b, lfo_c, lfo_d; - static u8 MCSS, tail, parity, rsv, vrsv, idx, smooth, htsound, agg, stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts, vtxops, vrsv2, vbrsv, bf, vbcrc; - static u16 h_length, htcrc8, length; - static u16 vpaid; - static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail; - static u8 hmcss, hrx_bw; - - u8 pwdb; - s8 rxevm_0, rxevm_1, rxevm_2 ; - u8 rf_gain_path_a, rf_gain_path_b, rf_gain_path_c, rf_gain_path_d; - u8 rx_snr_path_a, rx_snr_path_b, rx_snr_path_c, rx_snr_path_d; - s32 sig_power; - - const char *L_rate[8] = {"6M", "9M", "12M", "18M", "24M", "36M", "48M", "54M"}; - -#if 0 - const double evm_comp_20M = 0.579919469776867; /* 10*log10(64.0/56.0) */ - const double evm_comp_40M = 0.503051183113957; /* 10*log10(128.0/114.0) */ - const double evm_comp_80M = 0.244245993314183; /* 10*log10(256.0/242.0) */ - const double evm_comp_160M = 0.244245993314183; /* 10*log10(512.0/484.0) */ #endif - if (dm->support_ic_type & ODM_IC_11N_SERIES) { - phydm_bb_debug_info_n_series(dm, &used, output, &out_len); +#if (ODM_IC_11AC_SERIES_SUPPORT) +#if (RTL8822B_SUPPORT) +void phydm_bb_hw_dbg_info_8822b(void *dm_void, u32 *_used, char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + u32 condi_num = 0; + u8 i = 0; + + if (!(dm->support_ic_type == ODM_RTL8822B)) return; - } + + condi_num = phydm_get_condi_num_8822b(dm); + phydm_get_condi_num_acc_8822b(dm); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s\n", "BB Report Info"); + "\r\n %-35s = %d.%.4d", "condi_num", + condi_num >> 4, phydm_show_fraction_num(condi_num & 0xf, 4)); - /*BW & mode Detection*/ - - value32 = odm_get_bb_reg(dm, 0xf80, MASKDWORD); - value32_2 = value32; - rx_ht_bw = (u8)(value32 & 0x1); - rx_vht_bw = (u8)((value32 >> 1) & 0x3); - rxsc = (u8)(value32 & 0x78); - value32_1 = (value32 & 0x180) >> 7; - rx_ht = (u8)(value32_1); - - rx_bw = 0; - - if (rx_ht == 2) { - if (rx_vht_bw == 0) - tmp_string = "20M"; - else if (rx_vht_bw == 1) - tmp_string = "40M"; - else - tmp_string = "80M"; + for (i = 0; i < CN_CNT_MAX; i++) { PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s %s %s", "mode", "VHT", tmp_string); - rx_bw = rx_vht_bw; - } else if (rx_ht == 1) { - if (rx_ht_bw == 0) - tmp_string = "20M"; - else if (rx_ht_bw == 1) - tmp_string = "40M"; - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s %s %s", "mode", "HT", tmp_string); - rx_bw = rx_ht_bw; - } else - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s %s", "mode", "Legacy"); + "\r\n Tone_num[CN>%d]%-21s = %d", + i, " ", dm->phy_dbg_info.condi_num_cdf[i]); + } + + *_used = used; + *_out_len = out_len; +} +#endif + +void phydm_bb_hw_dbg_info_ac(void *dm_void, u32 *_used, char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + char *tmp_string = NULL; + u8 rx_ht_bw, rx_vht_bw, rxsc, rx_ht, bw_idx = 0; + static u8 v_rx_bw; + u32 value32, value32_1, value32_2, value32_3; + struct phydm_cfo_rpt cfo; + u8 i = 0; + static u8 tail, parity, rsv, vrsv, smooth, htsound, agg; + static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts; + static u8 vtxops, vrsv2, vbrsv, bf, vbcrc; + static u16 h_length, htcrc8, length; + static u16 vpaid; + static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail; + static u8 hmcss, hrx_bw; + u8 pwdb; + s8 rxevm_0, rxevm_1, rxevm_2; + u8 rf_gain[4]; + u8 rx_snr[4]; + s32 sig_power; + + PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n", + "BB Report Info"); + + /*@ [BW & Mode] =====================================================*/ + + value32 = odm_get_bb_reg(dm, R_0xf80, MASKDWORD); + rx_ht = (u8)((value32 & 0x180) >> 7); + + if (rx_ht == AD_VHT_MODE) { + tmp_string = "VHT"; + bw_idx = (u8)((value32 >> 1) & 0x3); + } else if (rx_ht == AD_HT_MODE) { + tmp_string = "HT"; + bw_idx = (u8)(value32 & 0x1); + } else { + tmp_string = "Legacy"; + bw_idx = 0; + } + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s %s %dM", "mode", tmp_string, (20 << bw_idx)); + + if (rx_ht != AD_LEGACY_MODE) { + rxsc = (u8)(value32 & 0x78); - if (rx_ht != 0) { if (rxsc == 0) tmp_string = "duplicate/full bw"; else if (rxsc == 1) @@ -483,80 +479,71 @@ phydm_bb_debug_info( tmp_string = "usc40"; else if (rxsc == 10) tmp_string = "lsc40"; + PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s", tmp_string); + " %-35s", tmp_string); } - /* RX signal power and AGC related info*/ + /*@ [RX signal power and AGC related info] ==========================*/ - value32 = odm_get_bb_reg(dm, 0xF90, MASKDWORD); - pwdb = (u8)((value32 & MASKBYTE1) >> 8); - pwdb = pwdb >> 1; - sig_power = -110 + pwdb; + pwdb = (u8)odm_get_bb_reg(dm, R_0xf90, MASKBYTE1); + sig_power = -110 + (pwdb >> 1); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", - sig_power); + "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power); - value32 = odm_get_bb_reg(dm, 0xd14, MASKDWORD); - rx_snr_path_a = (u8)(value32 & 0xFF) >> 1; - rf_gain_path_a = (s8)((value32 & MASKBYTE1) >> 8); - rf_gain_path_a *= 2; - value32 = odm_get_bb_reg(dm, 0xd54, MASKDWORD); - rx_snr_path_b = (u8)(value32 & 0xFF) >> 1; - rf_gain_path_b = (s8)((value32 & MASKBYTE1) >> 8); - rf_gain_path_b *= 2; - value32 = odm_get_bb_reg(dm, 0xd94, MASKDWORD); - rx_snr_path_c = (u8)(value32 & 0xFF) >> 1; - rf_gain_path_c = (s8)((value32 & MASKBYTE1) >> 8); - rf_gain_path_c *= 2; - value32 = odm_get_bb_reg(dm, 0xdd4, MASKDWORD); - rx_snr_path_d = (u8)(value32 & 0xFF) >> 1; - rf_gain_path_d = (s8)((value32 & MASKBYTE1) >> 8); - rf_gain_path_d *= 2; + value32 = odm_get_bb_reg(dm, R_0xd14, MASKDWORD); + rx_snr[RF_PATH_A] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/ + rf_gain[RF_PATH_A] = (s8)(((value32 & MASKBYTE1) >> 8) * 2); + + value32 = odm_get_bb_reg(dm, R_0xd54, MASKDWORD); + rx_snr[RF_PATH_B] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/ + rf_gain[RF_PATH_B] = (s8)(((value32 & MASKBYTE1) >> 8) * 2); + + value32 = odm_get_bb_reg(dm, R_0xd94, MASKDWORD); + rx_snr[RF_PATH_C] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/ + rf_gain[RF_PATH_C] = (s8)(((value32 & MASKBYTE1) >> 8) * 2); + + value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD); + rx_snr[RF_PATH_D] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/ + rf_gain[RF_PATH_D] = (s8)(((value32 & MASKBYTE1) >> 8) * 2); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d / %d / %d", - "OFDM RX RF Gain(A/B/C/D)", rf_gain_path_a, - rf_gain_path_b, rf_gain_path_c, rf_gain_path_d); + "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", + rf_gain[RF_PATH_A], rf_gain[RF_PATH_B], + rf_gain[RF_PATH_C], rf_gain[RF_PATH_D]); + /*@ [RX counter Info] ===============================================*/ - /* RX counter related info*/ - - value32 = odm_get_bb_reg(dm, 0xF08, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d", "OFDM CCA counter", - ((value32 & 0xFFFF0000) >> 16)); + "\r\n %-35s = %d", "OFDM CCA cnt", + odm_get_bb_reg(dm, R_0xf08, 0xFFFF0000)); - value32 = odm_get_bb_reg(dm, 0xFD0, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d", "OFDM SBD Fail counter", - value32 & 0xFFFF); + "\r\n %-35s = %d", "OFDM SBD Fail cnt", + odm_get_bb_reg(dm, R_0xfd0, 0xFFFF)); - value32 = odm_get_bb_reg(dm, 0xFC4, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0xfc4, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d", - "VHT SIGA/SIGB CRC8 Fail counter", value32 & 0xFFFF, - ((value32 & 0xFFFF0000) >> 16)); + "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt", + value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)); - value32 = odm_get_bb_reg(dm, 0xFCC, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d", "CCK CCA counter", value32 & 0xFFFF); + "\r\n %-35s = %d", "CCK CCA cnt", + odm_get_bb_reg(dm, R_0xfcc, 0xFFFF)); - value32 = odm_get_bb_reg(dm, 0xFBC, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0xfbc, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d", - "LSIG (parity Fail/rate Illegal) counter", - value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)); + "\r\n %-35s = %d / %d", + "LSIG (parity Fail/rate Illegal) cnt", value32 & 0xFFFF, + ((value32 & 0xFFFF0000) >> 16)); - value32_1 = odm_get_bb_reg(dm, 0xFC8, MASKDWORD); - value32_2 = odm_get_bb_reg(dm, 0xFC0, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d", - "HT/VHT MCS NOT SUPPORT counter", - ((value32_2 & 0xFFFF0000) >> 16), value32_1 & 0xFFFF); + "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt", + odm_get_bb_reg(dm, R_0xfc0, (0xFFFF0000 >> 16)), + odm_get_bb_reg(dm, R_0xfc8, 0xFFFF)); - /* PostFFT related info*/ - value32 = odm_get_bb_reg(dm, 0xF8c, MASKDWORD); + /*@ [PostFFT Info] =================================================*/ + value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD); rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16); rxevm_0 /= 2; if (rxevm_0 < -63) @@ -564,7 +551,7 @@ phydm_bb_debug_info( rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24); rxevm_1 /= 2; - value32 = odm_get_bb_reg(dm, 0xF88, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0xf88, MASKDWORD); rxevm_2 = (s8)((value32 & MASKBYTE2) >> 16); rxevm_2 /= 2; @@ -574,400 +561,1045 @@ phydm_bb_debug_info( rxevm_2 = 0; PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", - rxevm_0, rxevm_1, rxevm_2); + "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", rxevm_0, + rxevm_1, rxevm_2); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", - rx_snr_path_a, rx_snr_path_b, rx_snr_path_c, - rx_snr_path_d); + "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D dB)", + rx_snr[RF_PATH_A], rx_snr[RF_PATH_B], + rx_snr[RF_PATH_C], rx_snr[RF_PATH_D]); - value32 = odm_get_bb_reg(dm, 0xF8C, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", - value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)); - - /*BW & mode Detection*/ - - /*Reset Page F counter*/ - odm_set_bb_reg(dm, 0xB58, BIT(0), 1); - odm_set_bb_reg(dm, 0xB58, BIT(0), 0); - - /*CFO Report Info*/ - /*Short CFO*/ - value32 = odm_get_bb_reg(dm, 0xd0c, MASKDWORD); - value32_1 = odm_get_bb_reg(dm, 0xd4c, MASKDWORD); - value32_2 = odm_get_bb_reg(dm, 0xd8c, MASKDWORD); - value32_3 = odm_get_bb_reg(dm, 0xdcc, MASKDWORD); - - sfo_a = (s32)(value32 & 0xfff); - sfo_b = (s32)(value32_1 & 0xfff); - sfo_c = (s32)(value32_2 & 0xfff); - sfo_d = (s32)(value32_3 & 0xfff); - - lfo_a = (s32)(value32 >> 16); - lfo_b = (s32)(value32_1 >> 16); - lfo_c = (s32)(value32_2 >> 16); - lfo_d = (s32)(value32_3 >> 16); - - /*SFO 2's to dec*/ - if (sfo_a > 2047) - sfo_a = sfo_a - 4096; - sfo_a = (sfo_a * 312500) / 2048; - if (sfo_b > 2047) - sfo_b = sfo_b - 4096; - sfo_b = (sfo_b * 312500) / 2048; - if (sfo_c > 2047) - sfo_c = sfo_c - 4096; - sfo_c = (sfo_c * 312500) / 2048; - if (sfo_d > 2047) - sfo_d = sfo_d - 4096; - sfo_d = (sfo_d * 312500) / 2048; - - /*LFO 2's to dec*/ - - if (lfo_a > 4095) - lfo_a = lfo_a - 8192; - - if (lfo_b > 4095) - lfo_b = lfo_b - 8192; - - if (lfo_c > 4095) - lfo_c = lfo_c - 8192; - - if (lfo_d > 4095) - lfo_d = lfo_d - 8192; - lfo_a = lfo_a * 312500 / 4096; - lfo_b = lfo_b * 312500 / 4096; - lfo_c = lfo_c * 312500 / 4096; - lfo_d = lfo_d * 312500 / 4096; - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s", "CFO Report Info"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d / %d /%d", - "Short CFO(Hz) ", sfo_a, sfo_b, sfo_c, sfo_d); - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d / %d /%d", - "Long CFO(Hz) ", lfo_a, lfo_b, lfo_c, lfo_d); - - /*SCFO*/ - value32 = odm_get_bb_reg(dm, 0xd10, MASKDWORD); - value32_1 = odm_get_bb_reg(dm, 0xd50, MASKDWORD); - value32_2 = odm_get_bb_reg(dm, 0xd90, MASKDWORD); - value32_3 = odm_get_bb_reg(dm, 0xdd0, MASKDWORD); - - sfo_a = (s32)(value32 & 0x7ff); - sfo_b = (s32)(value32_1 & 0x7ff); - sfo_c = (s32)(value32_2 & 0x7ff); - sfo_d = (s32)(value32_3 & 0x7ff); - - if (sfo_a > 1023) - sfo_a = sfo_a - 2048; - - if (sfo_b > 2047) - sfo_b = sfo_b - 4096; - - if (sfo_c > 2047) - sfo_c = sfo_c - 4096; - - if (sfo_d > 2047) - sfo_d = sfo_d - 4096; - - sfo_a = sfo_a * 312500 / 1024; - sfo_b = sfo_b * 312500 / 1024; - sfo_c = sfo_c * 312500 / 1024; - sfo_d = sfo_d * 312500 / 1024; - - lfo_a = (s32)(value32 >> 16); - lfo_b = (s32)(value32_1 >> 16); - lfo_c = (s32)(value32_2 >> 16); - lfo_d = (s32)(value32_3 >> 16); - - if (lfo_a > 4095) - lfo_a = lfo_a - 8192; - - if (lfo_b > 4095) - lfo_b = lfo_b - 8192; - - if (lfo_c > 4095) - lfo_c = lfo_c - 8192; - - if (lfo_d > 4095) - lfo_d = lfo_d - 8192; - lfo_a = lfo_a * 312500 / 4096; - lfo_b = lfo_b * 312500 / 4096; - lfo_c = lfo_c * 312500 / 4096; - lfo_d = lfo_d * 312500 / 4096; - - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d / %d /%d", - "value SCFO(Hz) ", sfo_a, sfo_b, sfo_c, sfo_d); - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d / %d /%d", - "ACQ CFO(Hz) ", lfo_a, lfo_b, lfo_c, lfo_d); - - value32 = odm_get_bb_reg(dm, 0xd14, MASKDWORD); - value32_1 = odm_get_bb_reg(dm, 0xd54, MASKDWORD); - value32_2 = odm_get_bb_reg(dm, 0xd94, MASKDWORD); - value32_3 = odm_get_bb_reg(dm, 0xdd4, MASKDWORD); - - lfo_a = (s32)(value32 >> 16); - lfo_b = (s32)(value32_1 >> 16); - lfo_c = (s32)(value32_2 >> 16); - lfo_d = (s32)(value32_3 >> 16); - - if (lfo_a > 4095) - lfo_a = lfo_a - 8192; - - if (lfo_b > 4095) - lfo_b = lfo_b - 8192; - - if (lfo_c > 4095) - lfo_c = lfo_c - 8192; - - if (lfo_d > 4095) - lfo_d = lfo_d - 8192; - - lfo_a = lfo_a * 312500 / 4096; - lfo_b = lfo_b * 312500 / 4096; - lfo_c = lfo_c * 312500 / 4096; - lfo_d = lfo_d * 312500 / 4096; - - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d / %d / %d /%d", - "End CFO(Hz) ", lfo_a, lfo_b, lfo_c, lfo_d); - - value32 = odm_get_bb_reg(dm, 0xf20, MASKDWORD); /*L SIG*/ - - tail = (u8)((value32 & 0xfc0000) >> 16); - parity = (u8)((value32 & 0x20000) >> 16); - length = (u16)((value32 & 0x1ffe00) >> 8); - rsv = (u8)(value32 & 0x10); - MCSS = (u8)(value32 & 0x0f); - - switch (MCSS) { - case 0x0b: - idx = 0; - break; - case 0x0f: - idx = 1; - break; - case 0x0a: - idx = 2; - break; - case 0x0e: - idx = 3; - break; - case 0x09: - idx = 4; - break; - case 0x08: - idx = 5; - break; - case 0x0c: - idx = 6; - break; - default: - idx = 6; - break; + "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32 & 0xFFFF, + ((value32 & 0xFFFF0000) >> 16)); + /*@ [CFO Report Info] ===============================================*/ + phydm_get_cfo_info(dm, &cfo); + for (i = 0; i < dm->num_rf_path; i++) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}", + "CFO", i, "{S, L, Sec, Acq, End}", + cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i], + cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]); } - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s", "L-SIG"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s : %s", "rate", L_rate[idx]); - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %x / %x / %x", "Rsv/length/parity", rsv, - rx_bw, length); + /*@ [L-SIG Content] =================================================*/ + value32 = odm_get_bb_reg(dm, R_0xf20, MASKDWORD); + + tail = (u8)((value32 & 0xfc0000) >> 18);/*@[23:18]*/ + parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/ + length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/ + rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/ + + PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s", + "L-SIG"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %d M", "rate", + phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f))); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length, + parity); + + if (rx_ht == AD_HT_MODE) { + /*@ [HT SIG 1] ======================================================*/ + value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD); - value32 = odm_get_bb_reg(dm, 0xf2c, MASKDWORD); /*HT SIG*/ - if (rx_ht == 1) { hmcss = (u8)(value32 & 0x7F); - hrx_bw = (u8)(value32 & 0x80); - h_length = (u16)((value32 >> 8) & 0xffff); - } - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s", "HT-SIG1"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %x / %x / %x", "MCS/BW/length", hmcss, - hrx_bw, h_length); - - value32 = odm_get_bb_reg(dm, 0xf30, MASKDWORD); /*HT SIG*/ - - if (rx_ht == 1) { - smooth = (u8)(value32 & 0x01); - htsound = (u8)(value32 & 0x02); - rsv = (u8)(value32 & 0x04); - agg = (u8)(value32 & 0x08); - stbc = (u8)(value32 & 0x30); - fec = (u8)(value32 & 0x40); - sgi = (u8)(value32 & 0x80); - htltf = (u8)((value32 & 0x300) >> 8); - htcrc8 = (u16)((value32 & 0x3fc00) >> 8); - tail = (u8)((value32 & 0xfc0000) >> 16); - } - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s", "HT-SIG2"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %x / %x / %x / %x / %x / %x", - "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC", smooth, - htsound, rsv, agg, stbc, fec); - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %x / %x / %x / %x", - "SGI/E-HT-LTFs/CRC/tail", sgi, htltf, htcrc8, tail); - - value32 = odm_get_bb_reg(dm, 0xf2c, MASKDWORD); /*VHT SIG A1*/ - if (rx_ht == 2) { - /* value32 = odm_get_bb_reg(dm, 0xf2c,MASKDWORD);*/ - v_rx_bw = (u8)(value32 & 0x03); - vrsv = (u8)(value32 & 0x04); - vstbc = (u8)(value32 & 0x08); - vgid = (u8)((value32 & 0x3f0) >> 4); - v_nsts = (u8)(((value32 & 0x1c00) >> 8) + 1); - vpaid = (u16)(value32 & 0x3fe); - vtxops = (u8)((value32 & 0x400000) >> 20); - vrsv2 = (u8)((value32 & 0x800000) >> 20); - } - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s", "VHT-SIG-A1"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x", - "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw, - vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2); - - value32 = odm_get_bb_reg(dm, 0xf30, MASKDWORD); /*VHT SIG*/ - - if (rx_ht == 2) { - /*value32 = odm_get_bb_reg(dm, 0xf30,MASKDWORD); */ /*VHT SIG*/ - - /* sgi=(u8)(value32&0x01); */ - sgiext = (u8)(value32 & 0x03); - /* fec = (u8)(value32&0x04); */ - fecext = (u8)(value32 & 0x0C); - - v_mcss = (u8)(value32 & 0xf0); - bf = (u8)((value32 & 0x100) >> 8); - vrsv = (u8)((value32 & 0x200) >> 8); - vhtcrc8 = (u16)((value32 & 0x3fc00) >> 8); - v_tail = (u8)((value32 & 0xfc0000) >> 16); - } - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s", "VHT-SIG-A2"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x", - "SGI/FEC/MCS/BF/Rsv/CRC/tail", sgiext, fecext, v_mcss, - bf, vrsv, vhtcrc8, v_tail); - - value32 = odm_get_bb_reg(dm, 0xf34, MASKDWORD); /*VHT SIG*/ - { - v_length = (u16)(value32 & 0x1fffff); - vbrsv = (u8)((value32 & 0x600000) >> 20); - vb_tail = (u16)((value32 & 0x1f800000) >> 20); - vbcrc = (u8)((value32 & 0x80000000) >> 28); - - } - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s", "VHT-SIG-B"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %x / %x / %x / %x", - "length/Rsv/tail/CRC", v_length, vbrsv, vb_tail, vbcrc); - - /*for Condition number*/ - if (dm->support_ic_type & ODM_RTL8822B) { - s32 condition_num = 0; - char *factor = NULL; - - odm_set_bb_reg(dm, 0x1988, BIT(22), 0x1); /*enable report condition number*/ - - condition_num = odm_get_bb_reg(dm, 0xf84, MASKDWORD); - condition_num = (condition_num & 0x3ffff) >> 4; - - if (*dm->band_width == CHANNEL_WIDTH_80) - factor = "256/234"; - else if (*dm->band_width == CHANNEL_WIDTH_40) - factor = "128/108"; - else if (*dm->band_width == CHANNEL_WIDTH_20) { - if (rx_ht != 2 || rx_ht != 1) - factor = "64/52"; /*HT or VHT*/ - else - factor = "64/48"; /*legacy*/ - } + hrx_bw = (u8)((value32 & 0x80) >> 7); + h_length = (u16)((value32 & 0x0fff00) >> 8); PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n %-35s = %d (factor = %s)", - "Condition number", condition_num, factor); + "\r\n %-35s", "HT-SIG1"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %d / %d / %d", "MCS/BW/length", + hmcss, hrx_bw, h_length); + /*@ [HT SIG 2] ======================================================*/ + value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD); + smooth = (u8)(value32 & 0x01); + htsound = (u8)((value32 & 0x02) >> 1); + rsv = (u8)((value32 & 0x04) >> 2); + agg = (u8)((value32 & 0x08) >> 3); + stbc = (u8)((value32 & 0x30) >> 4); + fec = (u8)((value32 & 0x40) >> 6); + sgi = (u8)((value32 & 0x80) >> 7); + htltf = (u8)((value32 & 0x300) >> 8); + htcrc8 = (u16)((value32 & 0x3fc00) >> 10); + tail = (u8)((value32 & 0xfc0000) >> 18); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s", + "HT-SIG2"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x / %x / %x / %x / %x / %x", + "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC", + smooth, htsound, rsv, agg, stbc, fec); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x / %x / %x / %x", + "SGI/E-HT-LTFs/CRC/tail", + sgi, htltf, htcrc8, tail); + } else if (rx_ht == AD_VHT_MODE) { + /*@ [VHT SIG A1] ====================================================*/ + value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD); + + v_rx_bw = (u8)(value32 & 0x03); + vrsv = (u8)((value32 & 0x04) >> 2); + vstbc = (u8)((value32 & 0x08) >> 3); + vgid = (u8)((value32 & 0x3f0) >> 4); + v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1); + vpaid = (u16)((value32 & 0x3fe000) >> 13); + vtxops = (u8)((value32 & 0x400000) >> 22); + vrsv2 = (u8)((value32 & 0x800000) >> 23); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s", + "VHT-SIG-A1"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x", + "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw, + vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2); + + /*@ [VHT SIG A2] ====================================================*/ + value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD); + + /* @sgi=(u8)(value32&0x01); */ + sgiext = (u8)(value32 & 0x03); + /* @fec = (u8)(value32&0x04); */ + fecext = (u8)((value32 & 0x0C) >> 2); + + v_mcss = (u8)((value32 & 0xf0) >> 4); + bf = (u8)((value32 & 0x100) >> 8); + vrsv = (u8)((value32 & 0x200) >> 9); + vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10); + v_tail = (u8)((value32 & 0xfc0000) >> 18); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s", "VHT-SIG-A2"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x", + "SGI/FEC/MCS/BF/Rsv/CRC/tail", + sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail); + + /*@ [VHT SIG B] ====================================================*/ + value32 = odm_get_bb_reg(dm, R_0xf34, MASKDWORD); + + #if 0 + v_length = (u16)(value32 & 0x1fffff); + vbrsv = (u8)((value32 & 0x600000) >> 21); + vb_tail = (u16)((value32 & 0x1f800000) >> 23); + vbcrc = (u8)((value32 & 0x80000000) >> 31); + #endif + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s", "VHT-SIG-B"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x", + "Codeword", value32); + + #if 0 + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x / %x / %x / %x", + "length/Rsv/tail/CRC", + v_length, vbrsv, vb_tail, vbcrc); + #endif } + *_used = used; *_out_len = out_len; - } -#endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ +#endif + +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT +void phydm_bb_hw_dbg_info_jgr3(void *dm_void, u32 *_used, char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + char *tmp_string = NULL; + u8 rx_ht_bw = 0, rx_vht_bw = 0, rx_ht = 0; + static u8 v_rx_bw; + u32 value32 = 0; + u8 i = 0; + static u8 tail, parity, rsv, vrsv, smooth, htsound, agg; + static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts; + static u8 vtxops, vrsv2, vbrsv, bf, vbcrc; + static u16 h_length, htcrc8, length; + static u16 vpaid; + static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail; + static u8 hmcss, hrx_bw; + + PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n", + "BB Report Info"); + + /*@ [Mode] =====================================================*/ + + value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD); + rx_ht = (u8)((value32 & 0xC0000) >> 18); + if (rx_ht == AD_VHT_MODE) + tmp_string = "VHT"; + else if (rx_ht == AD_HT_MODE) + tmp_string = "HT"; + else + tmp_string = "Legacy"; + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s %s", "mode", tmp_string); + /*@ [RX counter Info] ===============================================*/ + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %d", "CCK CCA cnt", + odm_get_bb_reg(dm, R_0x2c08, 0xFFFF)); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %d", "OFDM CCA cnt", + odm_get_bb_reg(dm, R_0x2c08, 0xFFFF0000)); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %d", "OFDM SBD Fail cnt", + odm_get_bb_reg(dm, R_0x2d20, 0xFFFF0000)); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %d / %d", + "LSIG (parity Fail/rate Illegal) cnt", + odm_get_bb_reg(dm, R_0x2d04, 0xFFFF0000), + odm_get_bb_reg(dm, R_0x2d08, 0xFFFF)); + + value32 = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt", + value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)); + + value32 = odm_get_bb_reg(dm, R_0x2d0c, MASKDWORD); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt", + value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)); + /*@ [L-SIG Content] =================================================*/ + value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD); + + parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/ + length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/ + rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/ + + PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s", + "L-SIG"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %d M", "rate", + phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f))); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length, + parity); + + if (rx_ht == AD_HT_MODE) { + /*@ [HT SIG 1] ======================================================*/ + value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD); + + hmcss = (u8)(value32 & 0x7F); + hrx_bw = (u8)((value32 & 0x80) >> 7); + h_length = (u16)((value32 & 0x0fff00) >> 8); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s", "HT-SIG1"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %d / %d / %d", "MCS/BW/length", + hmcss, hrx_bw, h_length); + /*@ [HT SIG 2] ======================================================*/ + value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD); + smooth = (u8)(value32 & 0x01); + htsound = (u8)((value32 & 0x02) >> 1); + rsv = (u8)((value32 & 0x04) >> 2); + agg = (u8)((value32 & 0x08) >> 3); + stbc = (u8)((value32 & 0x30) >> 4); + fec = (u8)((value32 & 0x40) >> 6); + sgi = (u8)((value32 & 0x80) >> 7); + htltf = (u8)((value32 & 0x300) >> 8); + htcrc8 = (u16)((value32 & 0x3fc00) >> 10); + tail = (u8)((value32 & 0xfc0000) >> 18); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s", + "HT-SIG2"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x / %x / %x / %x / %x / %x", + "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC", + smooth, htsound, rsv, agg, stbc, fec); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x / %x / %x / %x", + "SGI/E-HT-LTFs/CRC/tail", + sgi, htltf, htcrc8, tail); + } else if (rx_ht == AD_VHT_MODE) { + /*@ [VHT SIG A1] ====================================================*/ + value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD); + + v_rx_bw = (u8)(value32 & 0x03); + vrsv = (u8)((value32 & 0x04) >> 2); + vstbc = (u8)((value32 & 0x08) >> 3); + vgid = (u8)((value32 & 0x3f0) >> 4); + v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1); + vpaid = (u16)((value32 & 0x3fe000) >> 13); + vtxops = (u8)((value32 & 0x400000) >> 22); + vrsv2 = (u8)((value32 & 0x800000) >> 23); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s", + "VHT-SIG-A1"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x", + "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw, + vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2); + + /*@ [VHT SIG A2] ====================================================*/ + value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD); + + /* @sgi=(u8)(value32&0x01); */ + sgiext = (u8)(value32 & 0x03); + /* @fec = (u8)(value32&0x04); */ + fecext = (u8)((value32 & 0x0C) >> 2); + + v_mcss = (u8)((value32 & 0xf0) >> 4); + bf = (u8)((value32 & 0x100) >> 8); + vrsv = (u8)((value32 & 0x200) >> 9); + vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10); + v_tail = (u8)((value32 & 0xfc0000) >> 18); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s", "VHT-SIG-A2"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x", + "SGI/FEC/MCS/BF/Rsv/CRC/tail", + sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail); + + /*@ [VHT SIG B] ====================================================*/ + value32 = odm_get_bb_reg(dm, R_0x2c34, MASKDWORD); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s", "VHT-SIG-B"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x", + "Codeword", value32); + + if (v_rx_bw == 0) { + v_length = (u16)(value32 & 0x1ffff); + vbrsv = (u8)((value32 & 0xE0000) >> 17); + vb_tail = (u16)((value32 & 0x03F00000) >> 20); + } else if (v_rx_bw == 1) { + v_length = (u16)(value32 & 0x7FFFF); + vbrsv = (u8)((value32 & 0x180000) >> 19); + vb_tail = (u16)((value32 & 0x07E00000) >> 21); + } else if (v_rx_bw == 2) { + v_length = (u16)(value32 & 0x1fffff); + vbrsv = (u8)((value32 & 0x600000) >> 21); + vb_tail = (u16)((value32 & 0x1f800000) >> 23); + } + vbcrc = (u8)((value32 & 0x80000000) >> 31); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n %-35s = %x / %x / %x / %x", + "length/Rsv/tail/CRC", + v_length, vbrsv, vb_tail, vbcrc); + } + + *_used = used; + *_out_len = out_len; +} +#endif + +u8 phydm_get_l_sig_rate(void *dm_void, u8 rate_idx_l_sig) +{ + u8 rate_idx = 0xff; + + switch (rate_idx_l_sig) { + case 0x0b: + rate_idx = 6; + break; + case 0x0f: + rate_idx = 9; + break; + case 0x0a: + rate_idx = 12; + break; + case 0x0e: + rate_idx = 18; + break; + case 0x09: + rate_idx = 24; + break; + case 0x0d: + rate_idx = 36; + break; + case 0x08: + rate_idx = 48; + break; + case 0x0c: + rate_idx = 54; + break; + default: + rate_idx = 0xff; + break; + } + + return rate_idx; +} + +void phydm_bb_hw_dbg_info(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + + switch (dm->ic_ip_series) { + #if (ODM_IC_11N_SERIES_SUPPORT) + case PHYDM_IC_N: + phydm_bb_hw_dbg_info_n(dm, &used, output, &out_len); + break; + #endif + + #if (ODM_IC_11AC_SERIES_SUPPORT) + case PHYDM_IC_AC: + phydm_bb_hw_dbg_info_ac(dm, &used, output, &out_len); + phydm_reset_bb_hw_cnt(dm); + #if (RTL8822B_SUPPORT) + phydm_bb_hw_dbg_info_8822b(dm, &used, output, &out_len); + #endif + break; + #endif + + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + case PHYDM_IC_JGR3: + phydm_bb_hw_dbg_info_jgr3(dm, &used, output, &out_len); + phydm_reset_bb_hw_cnt(dm); + break; + #endif + default: + break; + } + + *_used = used; + *_out_len = out_len; +} + +#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) +void phydm_dm_summary_cli_win(void *dm_void, char *buf, u8 macid) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track; + struct cmn_sta_info *sta = NULL; + struct ra_sta_info *ra = NULL; + struct dtp_info *dtp = NULL; + u64 comp = dm->support_ability; + u64 pause_comp = dm->pause_ability; + + if (!dm->is_linked) { + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "[%s]No Link !!!\n", __func__); + RT_PRINT(buf); + return; + } + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, FA_th={%d,%d,%d}\n", + ((comp & ODM_BB_DIG) ? + ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."), + "DIG", + dig_t->cur_ig_value, + dig_t->rx_gain_range_min, dig_t->rx_gain_range_max, + dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]); + RT_PRINT(buf); + + sta = dm->phydm_sta_info[macid]; + if (is_sta_active(sta)) { + RT_PRINT(buf); + + ra = &sta->ra_info; + dtp = &sta->dtp_stat; + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n", + ((comp & ODM_BB_RA_MASK) ? + ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."), + "RaMask", + ra->rssi_level, ra->ramask); + RT_PRINT(buf); + + #ifdef CONFIG_DYNAMIC_TX_TWR + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "02.(%s) %-12s: pwr_lv=%d\n", + ((comp & ODM_BB_DYNAMIC_TXPWR) ? + ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."), + "DynTxPwr", + dtp->sta_tx_high_power_lvl); + RT_PRINT(buf); + #endif + } + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "05.(%s) %-12s: cck_pd_lv=%d\n", + ((comp & ODM_BB_CCK_PD) ? + ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."), + "CCK_PD", dm->dm_cckpd_table.cck_pd_lv); + RT_PRINT(buf); + +#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "06.(%s) %-12s: div_type=%d, curr_ant=%s\n", + ((comp & ODM_BB_ANT_DIV) ? + ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."), + "ANT_DIV", + dm->ant_div_type, + (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX"); + RT_PRINT(buf); +#endif + +#ifdef PHYDM_POWER_TRAINING_SUPPORT + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "08.(%s) %-12s: PT_score=%d, disable_PT=%d\n", + ((comp & ODM_BB_PWR_TRAIN) ? + ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."), + "PwrTrain", + dm->pow_train_table.pow_train_score, + dm->is_disable_power_training); + RT_PRINT(buf); +#endif + +#ifdef CONFIG_PHYDM_DFS_MASTER + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n", + ((comp & ODM_BB_DFS) ? + ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."), + "DFS", + dm->dfs.dbg_mode, dm->dfs_region_domain); + RT_PRINT(buf); +#endif +#ifdef PHYDM_SUPPORT_ADAPTIVITY + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n", + ((comp & ODM_BB_ADAPTIVITY) ? + ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."), + "Adaptivity", + dm->adaptivity.th_l2h, dm->adaptivity.th_h2l, + dm->false_alm_cnt.edcca_flag); + RT_PRINT(buf); +#endif + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n", + ((comp & ODM_BB_CFO_TRACKING) ? + ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."), + "CfoTrack", + cfo_t->CFO_ave_pre, + ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"), + DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap)); + RT_PRINT(buf); + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "15.(%s) %-12s: ratio{nhm, clm}={%d, %d}\n", + ((comp & ODM_BB_ENV_MONITOR) ? + ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."), + "EnvMntr", + dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio); + RT_PRINT(buf); +#ifdef PHYDM_PRIMARY_CCA + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "16.(%s) %-12s: CCA @ (%s SB)\n", + ((comp & ODM_BB_PRIMARY_CCA) ? + ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."), + "PriCCA", + ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" : + ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U"))); + RT_PRINT(buf); +#endif +#ifdef CONFIG_ADAPTIVE_SOML + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "17.(%s) %-12s: soml_en = %s\n", + ((comp & ODM_BB_ADAPTIVE_SOML) ? + ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."), + "A-SOML", + (dm->dm_soml_table.soml_last_state == SOML_ON) ? + "ON" : "OFF"); + RT_PRINT(buf); +#endif +#ifdef PHYDM_LNA_SAT_CHK_SUPPORT + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "18.(%s) %-12s:\n", + ((comp & ODM_BB_LNA_SAT_CHK) ? + ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."), + "LNA_SAT_CHK"); + RT_PRINT(buf); +#endif +} + +void phydm_basic_dbg_msg_cli_win(void *dm_void, char *buf) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; + struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track; + struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; + struct phydm_phystatus_statistic *dbg_s = &dbg->physts_statistic_info; + struct phydm_phystatus_avg *dbg_avg = &dbg->phystatus_statistic_avg; + char *rate_type = NULL; + u8 tmp_rssi_avg[4]; + u8 tmp_snr_avg[4]; + u8 tmp_evm_avg[4]; + u32 tmp_cnt = 0; + u8 macid, target_macid = 0; + u8 i = 0; + u8 rate_num = dm->num_rf_path; + u8 ss_ofst = 0; + struct cmn_sta_info *entry = NULL; + char dbg_buf[PHYDM_SNPRINT_SIZE] = {0}; + + if (dm->debug_components & DBG_CMN) + return; + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n PHYDM Common Dbg Msg --------->"); + RT_PRINT(buf); + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n System up time=%d", dm->phydm_sys_up_time); + RT_PRINT(buf); + + if (dm->is_linked) { + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n ID=((%d)), BW=((%d)), fc=((CH-%d))", + dm->curr_station_id, 20 << *dm->band_width, *dm->channel); + RT_PRINT(buf); + + if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) && + (dm->support_ic_type & ODM_IC_11N_SERIES)) { + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Primary CCA at ((%s SB))", + (*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" : "L"); + RT_PRINT(buf); + } + + if ((dm->support_ic_type & PHYSTS_2ND_TYPE_IC) || dm->rx_rate > ODM_RATE11M) { + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}", + dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1], + dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]); + RT_PRINT(buf); + } else { + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}", + dm->cck_lna_idx, dm->cck_vga_idx); + RT_PRINT(buf); + } + + phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE); + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)", + (dm->rssi_a == 0xff) ? 0 : dm->rssi_a, + (dm->rssi_b == 0xff) ? 0 : dm->rssi_b, + (dm->rssi_c == 0xff) ? 0 : dm->rssi_c, + (dm->rssi_d == 0xff) ? 0 : dm->rssi_d, + dbg_buf, dm->rx_rate); + RT_PRINT(buf); + + phydm_print_rate_2_buff(dm, dm->phy_dbg_info.beacon_phy_rate, dbg_buf, PHYDM_SNPRINT_SIZE); + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Beacon_cnt=%d, rate_idx:%s (0x%x)", + dm->phy_dbg_info.beacon_cnt_in_period, + dbg_buf, + dm->phy_dbg_info.beacon_phy_rate); + RT_PRINT(buf); + + /*Show phydm_rx_rate_distribution;*/ + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [RxRate Cnt] =============>"); + RT_PRINT(buf); + + /*@======CCK=================================================*/ + if (*dm->channel <= 14) { + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * CCK = {%d, %d, %d, %d}", + dbg->num_qry_legacy_pkt[0], dbg->num_qry_legacy_pkt[1], + dbg->num_qry_legacy_pkt[2], dbg->num_qry_legacy_pkt[3]); + RT_PRINT(buf); + } + /*@======OFDM================================================*/ + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}", + dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5], + dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7], + dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9], + dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]); + RT_PRINT(buf); + + /*@======HT==================================================*/ + if (dbg->ht_pkt_not_zero) { + for (i = 0; i < rate_num; i++) { + ss_ofst = (i << 3); + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}", + (ss_ofst), (ss_ofst + 7), + dbg->num_qry_ht_pkt[ss_ofst + 0], dbg->num_qry_ht_pkt[ss_ofst + 1], + dbg->num_qry_ht_pkt[ss_ofst + 2], dbg->num_qry_ht_pkt[ss_ofst + 3], + dbg->num_qry_ht_pkt[ss_ofst + 4], dbg->num_qry_ht_pkt[ss_ofst + 5], + dbg->num_qry_ht_pkt[ss_ofst + 6], dbg->num_qry_ht_pkt[ss_ofst + 7]); + RT_PRINT(buf); + } + + if (dbg->low_bw_20_occur) { + for (i = 0; i < rate_num; i++) { + ss_ofst = (i << 3); + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}", + (ss_ofst), (ss_ofst + 7), + dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1], + dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3], + dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5], + dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7]); + RT_PRINT(buf); + } + } + } + +#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) + /*@======VHT=================================================*/ + if (dbg->vht_pkt_not_zero) { + for (i = 0; i < rate_num; i++) { + ss_ofst = 10 * i; + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}", + (i + 1), + dbg->num_qry_vht_pkt[ss_ofst + 0], dbg->num_qry_vht_pkt[ss_ofst + 1], + dbg->num_qry_vht_pkt[ss_ofst + 2], dbg->num_qry_vht_pkt[ss_ofst + 3], + dbg->num_qry_vht_pkt[ss_ofst + 4], dbg->num_qry_vht_pkt[ss_ofst + 5], + dbg->num_qry_vht_pkt[ss_ofst + 6], dbg->num_qry_vht_pkt[ss_ofst + 7], + dbg->num_qry_vht_pkt[ss_ofst + 8], dbg->num_qry_vht_pkt[ss_ofst + 9]); + RT_PRINT(buf); + } + + if (dbg->low_bw_20_occur) { + for (i = 0; i < rate_num; i++) { + ss_ofst = 10 * i; + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}", + (i + 1), + dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1], + dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3], + dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5], + dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7], + dbg->num_qry_pkt_sc_20m[ss_ofst + 8], dbg->num_qry_pkt_sc_20m[ss_ofst + 9]); + RT_PRINT(buf); + } + } + + if (dbg->low_bw_40_occur) { + for (i = 0; i < rate_num; i++) { + ss_ofst = 10 * i; + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}", + (i + 1), + dbg->num_qry_pkt_sc_40m[ss_ofst + 0], dbg->num_qry_pkt_sc_40m[ss_ofst + 1], + dbg->num_qry_pkt_sc_40m[ss_ofst + 2], dbg->num_qry_pkt_sc_40m[ss_ofst + 3], + dbg->num_qry_pkt_sc_40m[ss_ofst + 4], dbg->num_qry_pkt_sc_40m[ss_ofst + 5], + dbg->num_qry_pkt_sc_40m[ss_ofst + 6], dbg->num_qry_pkt_sc_40m[ss_ofst + 7], + dbg->num_qry_pkt_sc_40m[ss_ofst + 8], dbg->num_qry_pkt_sc_40m[ss_ofst + 9]); + RT_PRINT(buf); + } + } + } +#endif + + phydm_reset_rx_rate_distribution(dm); + + //1 Show phydm_avg_phystatus_val + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [Avg PHY Statistic] ==============>"); + RT_PRINT(buf); +#if 1 + phydm_get_avg_phystatus_val(dm); + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n", + "[Beacon]", dbg_s->rssi_beacon_cnt, dbg_avg->rssi_beacon_avg); + RT_PRINT(buf); + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n", + "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg); + RT_PRINT(buf); + + for (i = 0; i <= 4; i++) { + if (i > dm->num_rf_path) + break; + + odm_memory_set(dm, tmp_rssi_avg, 0, 4); + odm_memory_set(dm, tmp_snr_avg, 0, 4); + odm_memory_set(dm, tmp_evm_avg, 0, 4); + + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + if (i == 4) { + rate_type = "[4-SS]"; + tmp_cnt = dbg_s->rssi_4ss_cnt; + odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_4ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_4ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg, 4); + } else + #endif + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + if (i == 3) { + rate_type = "[3-SS]"; + tmp_cnt = dbg_s->rssi_3ss_cnt; + odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_3ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_3ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_3ss_avg, 3); + } else + #endif + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + if (i == 2) { + rate_type = "[2-SS]"; + tmp_cnt = dbg_s->rssi_2ss_cnt; + odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_2ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_2ss_avg, 2); + } else + #endif + if (i == 1) { + rate_type = "[1-SS]"; + tmp_cnt = dbg_s->rssi_1ss_cnt; + odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_1ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_1ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_1ss_avg, 1); + } else { + rate_type = "[L-OFDM]"; + tmp_cnt = dbg_s->rssi_ofdm_cnt; + odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_ofdm_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_ofdm_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_ofdm_avg, 1); + } + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, + "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n", + rate_type, tmp_cnt, + tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2], tmp_rssi_avg[3], + tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2], tmp_snr_avg[3], + tmp_evm_avg[0], tmp_evm_avg[1], tmp_evm_avg[2], tmp_evm_avg[3]); + RT_PRINT(buf); + } +#else + phydm_reset_phystatus_avg(dm); + + /*@CCK*/ + dbg_avg->rssi_cck_avg = (u8)((dbg_s->rssi_cck_cnt != 0) ? (dbg_s->rssi_cck_sum / dbg_s->rssi_cck_cnt) : 0); + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * cck Cnt= ((%d)) RSSI:{%d}", + dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg); + RT_PRINT(buf); + + /*OFDM*/ + if (dbg_s->rssi_ofdm_cnt != 0) { + dbg_avg->rssi_ofdm_avg = (u8)(dbg_s->rssi_ofdm_sum / dbg_s->rssi_ofdm_cnt); + dbg_avg->evm_ofdm_avg = (u8)(dbg_s->evm_ofdm_sum / dbg_s->rssi_ofdm_cnt); + dbg_avg->snr_ofdm_avg = (u8)(dbg_s->snr_ofdm_sum / dbg_s->rssi_ofdm_cnt); + } + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * ofdm Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}", + dbg_s->rssi_ofdm_cnt, dbg_avg->rssi_ofdm_avg, + dbg_avg->evm_ofdm_avg, dbg_avg->snr_ofdm_avg); + RT_PRINT(buf); + + if (dbg_s->rssi_1ss_cnt != 0) { + dbg_avg->rssi_1ss_avg = (u8)(dbg_s->rssi_1ss_sum / dbg_s->rssi_1ss_cnt); + dbg_avg->evm_1ss_avg = (u8)(dbg_s->evm_1ss_sum / dbg_s->rssi_1ss_cnt); + dbg_avg->snr_1ss_avg = (u8)(dbg_s->snr_1ss_sum / dbg_s->rssi_1ss_cnt); + } + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * 1-ss Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}", + dbg_s->rssi_1ss_cnt, dbg_avg->rssi_1ss_avg, + dbg_avg->evm_1ss_avg, dbg_avg->snr_1ss_avg); + RT_PRINT(buf); + +#if (defined(PHYDM_COMPILE_ABOVE_2SS)) + if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) { + if (dbg_s->rssi_2ss_cnt != 0) { + dbg_avg->rssi_2ss_avg[0] = (u8)(dbg_s->rssi_2ss_sum[0] / dbg_s->rssi_2ss_cnt); + dbg_avg->rssi_2ss_avg[1] = (u8)(dbg_s->rssi_2ss_sum[1] / dbg_s->rssi_2ss_cnt); + + dbg_avg->evm_2ss_avg[0] = (u8)(dbg_s->evm_2ss_sum[0] / dbg_s->rssi_2ss_cnt); + dbg_avg->evm_2ss_avg[1] = (u8)(dbg_s->evm_2ss_sum[1] / dbg_s->rssi_2ss_cnt); + + dbg_avg->snr_2ss_avg[0] = (u8)(dbg_s->snr_2ss_sum[0] / dbg_s->rssi_2ss_cnt); + dbg_avg->snr_2ss_avg[1] = (u8)(dbg_s->snr_2ss_sum[1] / dbg_s->rssi_2ss_cnt); + } + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * 2-ss Cnt= ((%d)) RSSI:{%d, %d}, EVM:{%d, %d}, SNR:{%d, %d}", + dbg_s->rssi_2ss_cnt, dbg_avg->rssi_2ss_avg[0], + dbg_avg->rssi_2ss_avg[1], dbg_avg->evm_2ss_avg[0], + dbg_avg->evm_2ss_avg[1], dbg_avg->snr_2ss_avg[0], + dbg_avg->snr_2ss_avg[1]); + RT_PRINT(buf); + } +#endif + +#if (defined(PHYDM_COMPILE_ABOVE_3SS)) + if (dm->support_ic_type & (PHYDM_IC_ABOVE_3SS)) { + if (dbg_s->rssi_3ss_cnt != 0) { + dbg_avg->rssi_3ss_avg[0] = (u8)(dbg_s->rssi_3ss_sum[0] / dbg_s->rssi_3ss_cnt); + dbg_avg->rssi_3ss_avg[1] = (u8)(dbg_s->rssi_3ss_sum[1] / dbg_s->rssi_3ss_cnt); + dbg_avg->rssi_3ss_avg[2] = (u8)(dbg_s->rssi_3ss_sum[2] / dbg_s->rssi_3ss_cnt); + + dbg_avg->evm_3ss_avg[0] = (u8)(dbg_s->evm_3ss_sum[0] / dbg_s->rssi_3ss_cnt); + dbg_avg->evm_3ss_avg[1] = (u8)(dbg_s->evm_3ss_sum[1] / dbg_s->rssi_3ss_cnt); + dbg_avg->evm_3ss_avg[2] = (u8)(dbg_s->evm_3ss_sum[2] / dbg_s->rssi_3ss_cnt); + + dbg_avg->snr_3ss_avg[0] = (u8)(dbg_s->snr_3ss_sum[0] / dbg_s->rssi_3ss_cnt); + dbg_avg->snr_3ss_avg[1] = (u8)(dbg_s->snr_3ss_sum[1] / dbg_s->rssi_3ss_cnt); + dbg_avg->snr_3ss_avg[2] = (u8)(dbg_s->snr_3ss_sum[2] / dbg_s->rssi_3ss_cnt); + } + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * 3-ss Cnt= ((%d)) RSSI:{%d, %d, %d} EVM:{%d, %d, %d} SNR:{%d, %d, %d}", + dbg_s->rssi_3ss_cnt, dbg_avg->rssi_3ss_avg[0], + dbg_avg->rssi_3ss_avg[1], dbg_avg->rssi_3ss_avg[2], + dbg_avg->evm_3ss_avg[0], dbg_avg->evm_3ss_avg[1], + dbg_avg->evm_3ss_avg[2], dbg_avg->snr_3ss_avg[0], + dbg_avg->snr_3ss_avg[1], dbg_avg->snr_3ss_avg[2]); + RT_PRINT(buf); + } +#endif + +#if (defined(PHYDM_COMPILE_ABOVE_4SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { + if (dbg_s->rssi_4ss_cnt != 0) { + dbg_avg->rssi_4ss_avg[0] = (u8)(dbg_s->rssi_4ss_sum[0] / dbg_s->rssi_4ss_cnt); + dbg_avg->rssi_4ss_avg[1] = (u8)(dbg_s->rssi_4ss_sum[1] / dbg_s->rssi_4ss_cnt); + dbg_avg->rssi_4ss_avg[2] = (u8)(dbg_s->rssi_4ss_sum[2] / dbg_s->rssi_4ss_cnt); + dbg_avg->rssi_4ss_avg[3] = (u8)(dbg_s->rssi_4ss_sum[3] / dbg_s->rssi_4ss_cnt); + + dbg_avg->evm_4ss_avg[0] = (u8)(dbg_s->evm_4ss_sum[0] / dbg_s->rssi_4ss_cnt); + dbg_avg->evm_4ss_avg[1] = (u8)(dbg_s->evm_4ss_sum[1] / dbg_s->rssi_4ss_cnt); + dbg_avg->evm_4ss_avg[2] = (u8)(dbg_s->evm_4ss_sum[2] / dbg_s->rssi_4ss_cnt); + dbg_avg->evm_4ss_avg[3] = (u8)(dbg_s->evm_4ss_sum[3] / dbg_s->rssi_4ss_cnt); + + dbg_avg->snr_4ss_avg[0] = (u8)(dbg_s->snr_4ss_sum[0] / dbg_s->rssi_4ss_cnt); + dbg_avg->snr_4ss_avg[1] = (u8)(dbg_s->snr_4ss_sum[1] / dbg_s->rssi_4ss_cnt); + dbg_avg->snr_4ss_avg[2] = (u8)(dbg_s->snr_4ss_sum[2] / dbg_s->rssi_4ss_cnt); + dbg_avg->snr_4ss_avg[3] = (u8)(dbg_s->snr_4ss_sum[3] / dbg_s->rssi_4ss_cnt); + } + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * 4-ss Cnt= ((%d)) RSSI:{%d, %d, %d, %d} EVM:{%d, %d, %d, %d} SNR:{%d, %d, %d, %d}", + dbg_s->rssi_4ss_cnt, dbg_avg->rssi_4ss_avg[0], + dbg_avg->rssi_4ss_avg[1], dbg_avg->rssi_4ss_avg[2], + dbg_avg->rssi_4ss_avg[3], dbg_avg->evm_4ss_avg[0], + dbg_avg->evm_4ss_avg[1], dbg_avg->evm_4ss_avg[2], + dbg_avg->evm_4ss_avg[3], dbg_avg->snr_4ss_avg[0], + dbg_avg->snr_4ss_avg[1], dbg_avg->snr_4ss_avg[2], + dbg_avg->snr_4ss_avg[3]); + RT_PRINT(buf); + } +#endif +#endif + phydm_reset_phystatus_statistic(dm); + /*@----------------------------------------------------------*/ + + /*Print TX rate*/ + for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) { + entry = dm->phydm_sta_info[macid]; + + if (is_sta_active(entry)) { + phydm_print_rate_2_buff(dm, entry->ra_info.curr_tx_rate, dbg_buf, PHYDM_SNPRINT_SIZE); + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n TxRate[%d]=%s (0x%x)", macid, dbg_buf, entry->ra_info.curr_tx_rate); + RT_PRINT(buf); + target_macid = macid; + break; + } + } + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, + "\r\n TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))", + dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load); + RT_PRINT(buf); + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n CFO_avg=((%d kHz)), CFO_traking = ((%s%d))", + cfo_t->CFO_ave_pre, + ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"), + DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap)); + RT_PRINT(buf); + + /* @Condition number */ + #if (RTL8822B_SUPPORT) + if (dm->support_ic_type == ODM_RTL8822B) { + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Condi_Num=((%d.%.4d))", + dm->phy_dbg_info.condi_num >> 4, + phydm_show_fraction_num(dm->phy_dbg_info.condi_num & 0xf, 4)); + RT_PRINT(buf); + } + #endif + +#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT)) + /*STBC or LDPC pkt*/ + if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC | + PHYSTS_3RD_TYPE_IC)) + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Coding: LDPC=((%s)), STBC=((%s))", + (dm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N", + (dm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N"); + RT_PRINT(buf); +#endif + + } else { + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n No Link !!!"); + RT_PRINT(buf); + } + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}", + fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all); + RT_PRINT(buf); + + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}", + fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all); + RT_PRINT(buf); + + #if (ODM_IC_11N_SERIES_SUPPORT) + if (dm->support_ic_type & ODM_IC_11N_SERIES) { + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, + "\r\n [OFDM FA Detail] Parity_Fail=%d, Rate_Illegal=%d, CRC8=%d, MCS_fail=%d, Fast_sync=%d, SB_Search_fail=%d", + fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal, + fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail, + fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail); + RT_PRINT(buf); + } + #endif + RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, + "\r\n is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n", + dm->is_linked, dm->number_linked_client, dm->rssi_min, + dm->dm_dig_table.cur_ig_value, dm->noisy_decision); + RT_PRINT(buf); + + phydm_dm_summary_cli_win(dm, buf, target_macid); +} + #ifdef CONFIG_PHYDM_DEBUG_FUNCTION void phydm_sbd_check( - struct dm_struct *dm -) + struct dm_struct *dm) { - static u32 pkt_cnt = 0; - static boolean sbd_state = 0; - u32 sym_count, count, value32; + static u32 pkt_cnt; + static boolean sbd_state; + u32 sym_count, count, value32; if (sbd_state == 0) { pkt_cnt++; - if (pkt_cnt % 5 == 0) { /*read SBD conter once every 5 packets*/ - odm_set_timer(dm, &dm->sbdcnt_timer, 0); /*ms*/ + /*read SBD conter once every 5 packets*/ + if (pkt_cnt % 5 == 0) { + odm_set_timer(dm, &dm->sbdcnt_timer, 0); /*@ms*/ sbd_state = 1; } } else { /*read counter*/ - value32 = odm_get_bb_reg(dm, 0xF98, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0xf98, MASKDWORD); sym_count = (value32 & 0x7C000000) >> 26; count = (value32 & 0x3F00000) >> 20; - pr_debug("#SBD# sym_count %d count %d\n", sym_count, count); + pr_debug("#SBD# sym_count %d count %d\n", sym_count, count); sbd_state = 0; } } #endif void phydm_sbd_callback( - struct phydm_timer_list *timer -) + struct phydm_timer_list *timer) { #ifdef CONFIG_PHYDM_DEBUG_FUNCTION - void *adapter = timer->Adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); - struct dm_struct *dm = &hal_data->DM_OutSrc; + void *adapter = timer->Adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); + struct dm_struct *dm = &hal_data->DM_OutSrc; - #if USE_WORKITEM +#if USE_WORKITEM odm_schedule_work_item(&dm->sbdcnt_workitem); - #else +#else phydm_sbd_check(dm); - #endif +#endif #endif } void phydm_sbd_workitem_callback( - void *context -) + void *context) { #ifdef CONFIG_PHYDM_DEBUG_FUNCTION - void *adapter = (void *)context; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); - struct dm_struct *dm = &hal_data->DM_OutSrc; + void *adapter = (void *)context; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); + struct dm_struct *dm = &hal_data->DM_OutSrc; phydm_sbd_check(dm); #endif } #endif -void -phydm_reset_rx_rate_distribution( - struct dm_struct *dm -) +void phydm_reset_rx_rate_distribution(struct dm_struct *dm) { - struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; + struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; odm_memory_set(dm, &dbg->num_qry_legacy_pkt[0], 0, (LEGACY_RATE_NUM * 2)); @@ -975,507 +1607,991 @@ phydm_reset_rx_rate_distribution( (HT_RATE_NUM * 2)); odm_memory_set(dm, &dbg->num_qry_pkt_sc_20m[0], 0, (LOW_BW_RATE_NUM * 2)); - + dbg->ht_pkt_not_zero = false; dbg->low_bw_20_occur = false; - -#if ODM_IC_11AC_SERIES_SUPPORT - odm_memory_set(dm, &dbg->num_qry_vht_pkt[0], 0, - (VHT_RATE_NUM * 2)); - odm_memory_set(dm, &dbg->num_qry_pkt_sc_40m[0], 0, - (LOW_BW_RATE_NUM * 2)); - + +#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) + odm_memory_set(dm, &dbg->num_qry_vht_pkt[0], 0, VHT_RATE_NUM * 2); + odm_memory_set(dm, &dbg->num_qry_pkt_sc_40m[0], 0, LOW_BW_RATE_NUM * 2); + #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) || (defined(PHYSTS_3RD_TYPE_SUPPORT)) + odm_memory_set(dm, &dbg->num_mu_vht_pkt[0], 0, VHT_RATE_NUM * 2); + #endif dbg->vht_pkt_not_zero = false; dbg->low_bw_40_occur = false; #endif } -void -phydm_rx_rate_distribution -( - void *dm_void -) +void phydm_rx_rate_distribution(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; - u8 i = 0, j = 0; - u8 rate_num = dm->num_rf_path, rate_ss_shift = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; + u8 i = 0; + u8 rate_num = dm->num_rf_path, ss_ofst = 0; - PHYDM_DBG(dm, ODM_COMP_COMMON, "[RxRate Cnt] =============>\n"); + PHYDM_DBG(dm, DBG_CMN, "[RxRate Cnt] =============>\n"); - /*======CCK=============================================================*/ + /*@======CCK=========================================================*/ if (*dm->channel <= 14) { - PHYDM_DBG(dm, ODM_COMP_COMMON, "* CCK = {%d, %d, %d, %d}\n", - dbg->num_qry_legacy_pkt[0], - dbg->num_qry_legacy_pkt[1], - dbg->num_qry_legacy_pkt[2], - dbg->num_qry_legacy_pkt[3] - ); + PHYDM_DBG(dm, DBG_CMN, "* CCK = {%d, %d, %d, %d}\n", + dbg->num_qry_legacy_pkt[0], + dbg->num_qry_legacy_pkt[1], + dbg->num_qry_legacy_pkt[2], + dbg->num_qry_legacy_pkt[3]); } - /*======OFDM============================================================*/ - PHYDM_DBG(dm, ODM_COMP_COMMON, "* OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}\n", - dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5], - dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7], - dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9], - dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]); + /*@======OFDM========================================================*/ + PHYDM_DBG(dm, DBG_CMN, "* OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}\n", + dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5], + dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7], + dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9], + dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]); - /*======HT==============================================================*/ + /*@======HT==========================================================*/ if (dbg->ht_pkt_not_zero) { - for (i = 0; i < rate_num; i++) { - - rate_ss_shift = (i << 3); - - PHYDM_DBG(dm, ODM_COMP_COMMON, "* HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", - (rate_ss_shift), (rate_ss_shift+7), - dbg->num_qry_ht_pkt[rate_ss_shift + 0], dbg->num_qry_ht_pkt[rate_ss_shift + 1], - dbg->num_qry_ht_pkt[rate_ss_shift + 2], dbg->num_qry_ht_pkt[rate_ss_shift + 3], - dbg->num_qry_ht_pkt[rate_ss_shift + 4], dbg->num_qry_ht_pkt[rate_ss_shift + 5], - dbg->num_qry_ht_pkt[rate_ss_shift + 6], dbg->num_qry_ht_pkt[rate_ss_shift + 7]); + ss_ofst = (i << 3); + + PHYDM_DBG(dm, DBG_CMN, + "* HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", + (ss_ofst), (ss_ofst + 7), + dbg->num_qry_ht_pkt[ss_ofst + 0], + dbg->num_qry_ht_pkt[ss_ofst + 1], + dbg->num_qry_ht_pkt[ss_ofst + 2], + dbg->num_qry_ht_pkt[ss_ofst + 3], + dbg->num_qry_ht_pkt[ss_ofst + 4], + dbg->num_qry_ht_pkt[ss_ofst + 5], + dbg->num_qry_ht_pkt[ss_ofst + 6], + dbg->num_qry_ht_pkt[ss_ofst + 7]); } if (dbg->low_bw_20_occur) { for (i = 0; i < rate_num; i++) { - - rate_ss_shift = (i << 3); - - PHYDM_DBG(dm, ODM_COMP_COMMON, "* [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", - (rate_ss_shift), (rate_ss_shift+7), - dbg->num_qry_pkt_sc_20m[rate_ss_shift + 0], dbg->num_qry_pkt_sc_20m[rate_ss_shift + 1], - dbg->num_qry_pkt_sc_20m[rate_ss_shift + 2], dbg->num_qry_pkt_sc_20m[rate_ss_shift + 3], - dbg->num_qry_pkt_sc_20m[rate_ss_shift + 4], dbg->num_qry_pkt_sc_20m[rate_ss_shift + 5], - dbg->num_qry_pkt_sc_20m[rate_ss_shift + 6], dbg->num_qry_pkt_sc_20m[rate_ss_shift + 7]); + ss_ofst = (i << 3); + + PHYDM_DBG(dm, DBG_CMN, + "* [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", + (ss_ofst), (ss_ofst + 7), + dbg->num_qry_pkt_sc_20m[ss_ofst + 0], + dbg->num_qry_pkt_sc_20m[ss_ofst + 1], + dbg->num_qry_pkt_sc_20m[ss_ofst + 2], + dbg->num_qry_pkt_sc_20m[ss_ofst + 3], + dbg->num_qry_pkt_sc_20m[ss_ofst + 4], + dbg->num_qry_pkt_sc_20m[ss_ofst + 5], + dbg->num_qry_pkt_sc_20m[ss_ofst + 6], + dbg->num_qry_pkt_sc_20m[ss_ofst + 7]); } - } + } } - - -#if ODM_IC_11AC_SERIES_SUPPORT - /*======VHT=============================================================*/ +#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) + /*@======VHT==========================================================*/ if (dbg->vht_pkt_not_zero) { for (i = 0; i < rate_num; i++) { - rate_ss_shift = 10 * i; - - PHYDM_DBG(dm, ODM_COMP_COMMON, "* VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", - (i + 1), - dbg->num_qry_vht_pkt[rate_ss_shift + 0], dbg->num_qry_vht_pkt[rate_ss_shift + 1], - dbg->num_qry_vht_pkt[rate_ss_shift + 2], dbg->num_qry_vht_pkt[rate_ss_shift + 3], - dbg->num_qry_vht_pkt[rate_ss_shift + 4], dbg->num_qry_vht_pkt[rate_ss_shift + 5], - dbg->num_qry_vht_pkt[rate_ss_shift + 6], dbg->num_qry_vht_pkt[rate_ss_shift + 7], - dbg->num_qry_vht_pkt[rate_ss_shift + 8], dbg->num_qry_vht_pkt[rate_ss_shift + 9]); + ss_ofst = 10 * i; + + PHYDM_DBG(dm, DBG_CMN, + "* VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", + (i + 1), + dbg->num_qry_vht_pkt[ss_ofst + 0], + dbg->num_qry_vht_pkt[ss_ofst + 1], + dbg->num_qry_vht_pkt[ss_ofst + 2], + dbg->num_qry_vht_pkt[ss_ofst + 3], + dbg->num_qry_vht_pkt[ss_ofst + 4], + dbg->num_qry_vht_pkt[ss_ofst + 5], + dbg->num_qry_vht_pkt[ss_ofst + 6], + dbg->num_qry_vht_pkt[ss_ofst + 7], + dbg->num_qry_vht_pkt[ss_ofst + 8], + dbg->num_qry_vht_pkt[ss_ofst + 9]); } if (dbg->low_bw_20_occur) { for (i = 0; i < rate_num; i++) { - rate_ss_shift = 10 * i; - - PHYDM_DBG(dm, ODM_COMP_COMMON, "*[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", - (i + 1), - dbg->num_qry_pkt_sc_20m[rate_ss_shift + 0], dbg->num_qry_pkt_sc_20m[rate_ss_shift + 1], - dbg->num_qry_pkt_sc_20m[rate_ss_shift + 2], dbg->num_qry_pkt_sc_20m[rate_ss_shift + 3], - dbg->num_qry_pkt_sc_20m[rate_ss_shift + 4], dbg->num_qry_pkt_sc_20m[rate_ss_shift + 5], - dbg->num_qry_pkt_sc_20m[rate_ss_shift + 6], dbg->num_qry_pkt_sc_20m[rate_ss_shift + 7], - dbg->num_qry_pkt_sc_20m[rate_ss_shift + 8], dbg->num_qry_pkt_sc_20m[rate_ss_shift + 9]); + ss_ofst = 10 * i; + + PHYDM_DBG(dm, DBG_CMN, + "*[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", + (i + 1), + dbg->num_qry_pkt_sc_20m[ss_ofst + 0], + dbg->num_qry_pkt_sc_20m[ss_ofst + 1], + dbg->num_qry_pkt_sc_20m[ss_ofst + 2], + dbg->num_qry_pkt_sc_20m[ss_ofst + 3], + dbg->num_qry_pkt_sc_20m[ss_ofst + 4], + dbg->num_qry_pkt_sc_20m[ss_ofst + 5], + dbg->num_qry_pkt_sc_20m[ss_ofst + 6], + dbg->num_qry_pkt_sc_20m[ss_ofst + 7], + dbg->num_qry_pkt_sc_20m[ss_ofst + 8], + dbg->num_qry_pkt_sc_20m[ss_ofst + 9]); } } if (dbg->low_bw_40_occur) { for (i = 0; i < rate_num; i++) { - rate_ss_shift = 10 * i; - - PHYDM_DBG(dm, ODM_COMP_COMMON, "*[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", - (i + 1), - dbg->num_qry_pkt_sc_40m[rate_ss_shift + 0], dbg->num_qry_pkt_sc_40m[rate_ss_shift + 1], - dbg->num_qry_pkt_sc_40m[rate_ss_shift + 2], dbg->num_qry_pkt_sc_40m[rate_ss_shift + 3], - dbg->num_qry_pkt_sc_40m[rate_ss_shift + 4], dbg->num_qry_pkt_sc_40m[rate_ss_shift + 5], - dbg->num_qry_pkt_sc_40m[rate_ss_shift + 6], dbg->num_qry_pkt_sc_40m[rate_ss_shift + 7], - dbg->num_qry_pkt_sc_40m[rate_ss_shift + 8], dbg->num_qry_pkt_sc_40m[rate_ss_shift + 9]); + ss_ofst = 10 * i; + + PHYDM_DBG(dm, DBG_CMN, + "*[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", + (i + 1), + dbg->num_qry_pkt_sc_40m[ss_ofst + 0], + dbg->num_qry_pkt_sc_40m[ss_ofst + 1], + dbg->num_qry_pkt_sc_40m[ss_ofst + 2], + dbg->num_qry_pkt_sc_40m[ss_ofst + 3], + dbg->num_qry_pkt_sc_40m[ss_ofst + 4], + dbg->num_qry_pkt_sc_40m[ss_ofst + 5], + dbg->num_qry_pkt_sc_40m[ss_ofst + 6], + dbg->num_qry_pkt_sc_40m[ss_ofst + 7], + dbg->num_qry_pkt_sc_40m[ss_ofst + 8], + dbg->num_qry_pkt_sc_40m[ss_ofst + 9]); } } } #endif - } -void -phydm_get_avg_phystatus_val -( - void *dm_void -) +u16 phydm_rx_utility(void *dm_void, u16 avg_phy_rate, u8 rx_max_ss, + enum channel_width bw) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_phystatus_statistic *dbg_statistic = &dm->phy_dbg_info.phystatus_statistic_info; - struct phydm_phystatus_avg *dbg_avg = &dm->phy_dbg_info.phystatus_statistic_avg; - - PHYDM_DBG(dm, ODM_COMP_COMMON, "[Avg PHY Statistic] ==============>\n"); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; + u16 utility_primitive = 0, utility = 0; + if (dbg->ht_pkt_not_zero) { + /*@ MCS7 20M: tp = 65, 1000/65 = 15.38, 65*15.5 = 1007*/ + utility_primitive = avg_phy_rate * 15 + (avg_phy_rate >> 1); + } +#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) + else if (dbg->vht_pkt_not_zero) { + /*@ VHT 1SS MCS9(fake) 20M: tp = 90, 1000/90 = 11.11, 65*11.125 = 1001*/ + utility_primitive = avg_phy_rate * 11 + (avg_phy_rate >> 3); + } +#endif + else { + /*@ 54M, 1000/54 = 18.5, 54*18.5 = 999*/ + utility_primitive = avg_phy_rate * 18 + (avg_phy_rate >> 1); + } + + utility = (utility_primitive / rx_max_ss) >> bw; + + if (utility > 1000) + utility = 1000; + + return utility; +} + +u16 phydm_rx_avg_phy_rate(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; + u8 i = 0, rate_num = 0, rate_base = 0; + u16 rate = 0, avg_phy_rate = 0; + u32 pkt_cnt = 0, phy_rate_sum = 0; + + if (dbg->ht_pkt_not_zero) { + rate_num = HT_RATE_NUM; + rate_base = ODM_RATEMCS0; + for (i = 0; i < rate_num; i++) { + rate = phy_rate_table[i + rate_base] << *dm->band_width; + phy_rate_sum += dbg->num_qry_ht_pkt[i] * rate; + pkt_cnt += dbg->num_qry_ht_pkt[i]; + } + } +#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) + else if (dbg->vht_pkt_not_zero) { + rate_num = VHT_RATE_NUM; + rate_base = ODM_RATEVHTSS1MCS0; + for (i = 0; i < rate_num; i++) { + rate = phy_rate_table[i + rate_base] << *dm->band_width; + phy_rate_sum += dbg->num_qry_vht_pkt[i] * rate; + pkt_cnt += dbg->num_qry_vht_pkt[i]; + } + } +#endif + else { + for (i = ODM_RATE1M; i <= ODM_RATE54M; i++) { + /*SKIP 1M & 6M for beacon case*/ + if (*dm->channel < 36 && i == ODM_RATE1M) + continue; + + if (*dm->channel >= 36 && i == ODM_RATE6M) + continue; + + rate = phy_rate_table[i]; + phy_rate_sum += dbg->num_qry_legacy_pkt[i] * rate; + pkt_cnt += dbg->num_qry_legacy_pkt[i]; + } + } + +#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) + if (dbg->low_bw_40_occur) { + for (i = 0; i < LOW_BW_RATE_NUM; i++) { + rate = phy_rate_table[i + rate_base] + << CHANNEL_WIDTH_40; + phy_rate_sum += dbg->num_qry_pkt_sc_40m[i] * rate; + pkt_cnt += dbg->num_qry_pkt_sc_40m[i]; + } + } +#endif + + if (dbg->low_bw_20_occur) { + for (i = 0; i < LOW_BW_RATE_NUM; i++) { + rate = phy_rate_table[i + rate_base]; + phy_rate_sum += dbg->num_qry_pkt_sc_20m[i] * rate; + pkt_cnt += dbg->num_qry_pkt_sc_20m[i]; + } + } + + avg_phy_rate = (pkt_cnt == 0) ? 0 : (u16)(phy_rate_sum / pkt_cnt); + + return avg_phy_rate; +} + +void phydm_print_hist_2_buf(void *dm_void, u16 *val, u16 len, char *buf, + u16 buf_size) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (len == PHY_HIST_SIZE) { + PHYDM_SNPRINTF(buf, buf_size, + "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]", + val[0], val[1], val[2], val[3], val[4], + val[5], val[6], val[7], val[8], val[9], + val[10], val[11]); + } else if (len == (PHY_HIST_SIZE - 1)) { + PHYDM_SNPRINTF(buf, buf_size, + "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]", + val[0], val[1], val[2], val[3], val[4], + val[5], val[6], val[7], val[8], val[9], + val[10]); + } +} + +void phydm_nss_hitogram(void *dm_void, enum PDM_RATE_TYPE rate_type) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; + char buf[PHYDM_SNPRINT_SIZE] = {0}; + u16 buf_size = PHYDM_SNPRINT_SIZE; + u16 h_size = PHY_HIST_SIZE; + u16 *evm_hist = &dbg_s->evm_1ss_hist[0]; + u16 *snr_hist = &dbg_s->snr_1ss_hist[0]; + u8 i = 0; + u8 ss = phydm_rate_type_2_num_ss(dm, rate_type); + + for (i = 0; i < ss; i++) { + if (rate_type == PDM_1SS) { + evm_hist = &dbg_s->evm_1ss_hist[0]; + snr_hist = &dbg_s->snr_1ss_hist[0]; + } else if (rate_type == PDM_2SS) { + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + evm_hist = &dbg_s->evm_2ss_hist[i][0]; + snr_hist = &dbg_s->snr_2ss_hist[i][0]; + #endif + } else if (rate_type == PDM_3SS) { + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + evm_hist = &dbg_s->evm_3ss_hist[i][0]; + snr_hist = &dbg_s->snr_3ss_hist[i][0]; + #endif + } else if (rate_type == PDM_4SS) { + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + evm_hist = &dbg_s->evm_4ss_hist[i][0]; + snr_hist = &dbg_s->snr_4ss_hist[i][0]; + #endif + } + + phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size); + PHYDM_DBG(dm, DBG_CMN, "[%d-SS][EVM][%d]=%s\n", ss, i, buf); + phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size); + PHYDM_DBG(dm, DBG_CMN, "[%d-SS][SNR][%d]=%s\n", ss, i, buf); + } +} + +void phydm_show_phy_hitogram(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; + char buf[PHYDM_SNPRINT_SIZE] = {0}; + u16 buf_size = PHYDM_SNPRINT_SIZE; + u16 th_size = PHY_HIST_SIZE - 1; + u8 i = 0; + + PHYDM_DBG(dm, DBG_CMN, "[PHY Histogram] ==============>\n"); +/*@===[Threshold]=============================================================*/ + phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size); + PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[EVM_TH]", buf); + + phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size); + PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[SNR_TH]", buf); +/*@===[OFDM]==================================================================*/ + if (dbg_s->rssi_ofdm_cnt) { + phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE, + buf, buf_size); + PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][EVM]", buf); + + phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE, + buf, buf_size); + PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][SNR]", buf); + } +/*@===[1-SS]==================================================================*/ + if (dbg_s->rssi_1ss_cnt) + phydm_nss_hitogram(dm, PDM_1SS); +/*@===[2-SS]==================================================================*/ + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + if ((dm->support_ic_type & PHYDM_IC_ABOVE_2SS) && dbg_s->rssi_2ss_cnt) + phydm_nss_hitogram(dm, PDM_2SS); + #endif +/*@===[3-SS]==================================================================*/ + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + if ((dm->support_ic_type & PHYDM_IC_ABOVE_3SS) && dbg_s->rssi_3ss_cnt) + phydm_nss_hitogram(dm, PDM_3SS); + #endif +/*@===[4-SS]==================================================================*/ + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS && dbg_s->rssi_4ss_cnt) + phydm_nss_hitogram(dm, PDM_4SS); + #endif +} + +void phydm_avg_phy_val_nss(void *dm_void, u8 nss) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; + struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg; + char *rate_type = NULL; + u32 *tmp_cnt = NULL; + u8 *tmp_rssi_avg = NULL; + u32 *tmp_rssi_sum = NULL; + u8 *tmp_snr_avg = NULL; + u32 *tmp_snr_sum = NULL; + u8 *tmp_evm_avg = NULL; + u32 *tmp_evm_sum = NULL; + u8 evm_rpt_show[RF_PATH_MEM_SIZE]; + u8 i = 0; + + odm_memory_set(dm, &evm_rpt_show[0], 0, RF_PATH_MEM_SIZE); + + switch (nss) { + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + case 4: + rate_type = "[4-SS]"; + tmp_cnt = &dbg_s->rssi_4ss_cnt; + tmp_rssi_avg = &dbg_avg->rssi_4ss_avg[0]; + tmp_snr_avg = &dbg_avg->snr_4ss_avg[0]; + tmp_rssi_sum = &dbg_s->rssi_4ss_sum[0]; + tmp_snr_sum = &dbg_s->snr_4ss_sum[0]; + tmp_evm_avg = &dbg_avg->evm_4ss_avg[0]; + tmp_evm_sum = &dbg_s->evm_4ss_sum[0]; + break; + #endif + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + case 3: + rate_type = "[3-SS]"; + tmp_cnt = &dbg_s->rssi_3ss_cnt; + tmp_rssi_avg = &dbg_avg->rssi_3ss_avg[0]; + tmp_snr_avg = &dbg_avg->snr_3ss_avg[0]; + tmp_rssi_sum = &dbg_s->rssi_3ss_sum[0]; + tmp_snr_sum = &dbg_s->snr_3ss_sum[0]; + tmp_evm_avg = &dbg_avg->evm_3ss_avg[0]; + tmp_evm_sum = &dbg_s->evm_3ss_sum[0]; + break; + #endif + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + case 2: + rate_type = "[2-SS]"; + tmp_cnt = &dbg_s->rssi_2ss_cnt; + tmp_rssi_avg = &dbg_avg->rssi_2ss_avg[0]; + tmp_snr_avg = &dbg_avg->snr_2ss_avg[0]; + tmp_rssi_sum = &dbg_s->rssi_2ss_sum[0]; + tmp_snr_sum = &dbg_s->snr_2ss_sum[0]; + tmp_evm_avg = &dbg_avg->evm_2ss_avg[0]; + tmp_evm_sum = &dbg_s->evm_2ss_sum[0]; + break; + #endif + case 1: + rate_type = "[1-SS]"; + tmp_cnt = &dbg_s->rssi_1ss_cnt; + tmp_rssi_avg = &dbg_avg->rssi_1ss_avg[0]; + tmp_snr_avg = &dbg_avg->snr_1ss_avg[0]; + tmp_rssi_sum = &dbg_s->rssi_1ss_sum[0]; + tmp_snr_sum = &dbg_s->snr_1ss_sum[0]; + tmp_evm_avg = &dbg_avg->evm_1ss_avg; + tmp_evm_sum = &dbg_s->evm_1ss_sum; + break; + default: + rate_type = "[L-OFDM]"; + tmp_cnt = &dbg_s->rssi_ofdm_cnt; + tmp_rssi_avg = &dbg_avg->rssi_ofdm_avg[0]; + tmp_snr_avg = &dbg_avg->snr_ofdm_avg[0]; + tmp_rssi_sum = &dbg_s->rssi_ofdm_sum[0]; + tmp_snr_sum = &dbg_s->snr_ofdm_sum[0]; + tmp_evm_avg = &dbg_avg->evm_ofdm_avg; + tmp_evm_sum = &dbg_s->evm_ofdm_sum; + break; + } + + if (*tmp_cnt != 0) { + for (i = 0; i < dm->num_rf_path; i++) { + tmp_rssi_avg[i] = (u8)(tmp_rssi_sum[i] / *tmp_cnt); + tmp_snr_avg[i] = (u8)(tmp_snr_sum[i] / *tmp_cnt); + } + + if (nss > 1) { + for (i = 0; i < nss; i++) { + tmp_evm_avg[i] = (u8)(tmp_evm_sum[i] / + *tmp_cnt); + evm_rpt_show[i] = tmp_evm_avg[i]; + } + } else { + *tmp_evm_avg = (u8)(*tmp_evm_sum / *tmp_cnt); + evm_rpt_show[0] = *tmp_evm_avg; + } + } + +#if (defined(PHYDM_COMPILE_ABOVE_4SS)) + PHYDM_DBG(dm, DBG_CMN, + "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n", + rate_type, *tmp_cnt, + tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2], + tmp_rssi_avg[3], tmp_snr_avg[0], tmp_snr_avg[1], + tmp_snr_avg[2], tmp_snr_avg[3], evm_rpt_show[0], + evm_rpt_show[1], evm_rpt_show[2], evm_rpt_show[3]); +#elif (defined(PHYDM_COMPILE_ABOVE_3SS)) + PHYDM_DBG(dm, DBG_CMN, + "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d}\n", + rate_type, *tmp_cnt, + tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2], + tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2], + evm_rpt_show[0], evm_rpt_show[1], evm_rpt_show[2]); +#elif (defined(PHYDM_COMPILE_ABOVE_2SS)) + PHYDM_DBG(dm, DBG_CMN, + "* %-8s Cnt= ((%.3d)) RSSI:{%.2d, %.2d} SNR:{%.2d, %.2d} EVM:{-%.2d, -%.2d}\n", + rate_type, *tmp_cnt, + tmp_rssi_avg[0], tmp_rssi_avg[1], + tmp_snr_avg[0], tmp_snr_avg[1], + evm_rpt_show[0], evm_rpt_show[1]); +#else + PHYDM_DBG(dm, DBG_CMN, + "* %-8s Cnt= ((%.3d)) RSSI:{%.2d} SNR:{%.2d} EVM:{-%.2d}\n", + rate_type, *tmp_cnt, + tmp_rssi_avg[0], tmp_snr_avg[0], evm_rpt_show[0]); +#endif +} + +void phydm_get_avg_phystatus_val(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; + struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg; + u8 i = 0; + + PHYDM_DBG(dm, DBG_CMN, "[PHY Avg] ==============>\n"); phydm_reset_phystatus_avg(dm); - /*CCK*/ - dbg_avg->rssi_cck_avg = (u8)((dbg_statistic->rssi_cck_cnt != 0) ? (dbg_statistic->rssi_cck_sum/dbg_statistic->rssi_cck_cnt) : 0); - PHYDM_DBG(dm, ODM_COMP_COMMON, "* cck Cnt= ((%d)) RSSI:{%d}\n", dbg_statistic->rssi_cck_cnt, dbg_avg->rssi_cck_avg); - - /*OFDM*/ - if (dbg_statistic->rssi_ofdm_cnt != 0) { - dbg_avg->rssi_ofdm_avg = (u8)(dbg_statistic->rssi_ofdm_sum/dbg_statistic->rssi_ofdm_cnt); - dbg_avg->evm_ofdm_avg = (u8)(dbg_statistic->evm_ofdm_sum/dbg_statistic->rssi_ofdm_cnt); - dbg_avg->snr_ofdm_avg = (u8)(dbg_statistic->snr_ofdm_sum/dbg_statistic->rssi_ofdm_cnt); + /*@===[Beacon]===*/ + if (dbg_s->rssi_beacon_cnt) { + dbg_avg->rssi_beacon_avg = (u8)(dbg_s->rssi_beacon_sum / + dbg_s->rssi_beacon_cnt); } + PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n", + "[Beacon]", dbg_s->rssi_beacon_cnt, dbg_avg->rssi_beacon_avg); - PHYDM_DBG(dm, ODM_COMP_COMMON, "* ofdm Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}\n", - dbg_statistic->rssi_ofdm_cnt, dbg_avg->rssi_ofdm_avg, dbg_avg->evm_ofdm_avg, dbg_avg->snr_ofdm_avg); - - if (dbg_statistic->rssi_1ss_cnt != 0) { - dbg_avg->rssi_1ss_avg = (u8)(dbg_statistic->rssi_1ss_sum/dbg_statistic->rssi_1ss_cnt); - dbg_avg->evm_1ss_avg = (u8)(dbg_statistic->evm_1ss_sum/dbg_statistic->rssi_1ss_cnt); - dbg_avg->snr_1ss_avg = (u8)(dbg_statistic->snr_1ss_sum/dbg_statistic->rssi_1ss_cnt); + /*@===[CCK]===*/ + if (dbg_s->rssi_cck_cnt) { + dbg_avg->rssi_cck_avg = (u8)(dbg_s->rssi_cck_sum / + dbg_s->rssi_cck_cnt); } + PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n", + "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg); - PHYDM_DBG(dm, ODM_COMP_COMMON, "* 1-ss Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}\n", - dbg_statistic->rssi_1ss_cnt, dbg_avg->rssi_1ss_avg, dbg_avg->evm_1ss_avg, dbg_avg->snr_1ss_avg); +#if 1 + for (i = 0; i <= 4; i++) { + if (i > dm->num_rf_path) + break; + phydm_avg_phy_val_nss(dm, i); + } +#else + /*@===[OFDM]===*/ + phydm_avg_phy_val_nss(dm, 0); + /*@===[1-SS]===*/ + phydm_avg_phy_val_nss(dm, 1); + /*@===[2-SS]===*/ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) - if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) { - if (dbg_statistic->rssi_2ss_cnt != 0) { - dbg_avg->rssi_2ss_avg[0] = (u8)(dbg_statistic->rssi_2ss_sum[0] /dbg_statistic->rssi_2ss_cnt); - dbg_avg->rssi_2ss_avg[1] = (u8)(dbg_statistic->rssi_2ss_sum[1] /dbg_statistic->rssi_2ss_cnt); - - dbg_avg->evm_2ss_avg[0] = (u8)(dbg_statistic->evm_2ss_sum[0] /dbg_statistic->rssi_2ss_cnt); - dbg_avg->evm_2ss_avg[1] = (u8)(dbg_statistic->evm_2ss_sum[1] /dbg_statistic->rssi_2ss_cnt); - - dbg_avg->snr_2ss_avg[0] = (u8)(dbg_statistic->snr_2ss_sum[0] /dbg_statistic->rssi_2ss_cnt); - dbg_avg->snr_2ss_avg[1] = (u8)(dbg_statistic->snr_2ss_sum[1] /dbg_statistic->rssi_2ss_cnt); - } - - PHYDM_DBG(dm, ODM_COMP_COMMON, "* 2-ss Cnt= ((%d)) RSSI:{%d, %d}, EVM:{%d, %d}, SNR:{%d, %d}\n", - dbg_statistic->rssi_2ss_cnt, - dbg_avg->rssi_2ss_avg[0], dbg_avg->rssi_2ss_avg[1], - dbg_avg->evm_2ss_avg[0], dbg_avg->evm_2ss_avg[1], - dbg_avg->snr_2ss_avg[0], dbg_avg->snr_2ss_avg[1]); - } + if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) + phydm_avg_phy_val_nss(dm, 2); #endif - + /*@===[3-SS]===*/ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) - if (dm->support_ic_type & (PHYDM_IC_ABOVE_3SS)) { - if (dbg_statistic->rssi_3ss_cnt != 0) { - dbg_avg->rssi_3ss_avg[0] = (u8)(dbg_statistic->rssi_3ss_sum[0] /dbg_statistic->rssi_3ss_cnt); - dbg_avg->rssi_3ss_avg[1] = (u8)(dbg_statistic->rssi_3ss_sum[1] /dbg_statistic->rssi_3ss_cnt); - dbg_avg->rssi_3ss_avg[2] = (u8)(dbg_statistic->rssi_3ss_sum[2] /dbg_statistic->rssi_3ss_cnt); - - dbg_avg->evm_3ss_avg[0] = (u8)(dbg_statistic->evm_3ss_sum[0] /dbg_statistic->rssi_3ss_cnt); - dbg_avg->evm_3ss_avg[1] = (u8)(dbg_statistic->evm_3ss_sum[1] /dbg_statistic->rssi_3ss_cnt); - dbg_avg->evm_3ss_avg[2] = (u8)(dbg_statistic->evm_3ss_sum[2] /dbg_statistic->rssi_3ss_cnt); - - dbg_avg->snr_3ss_avg[0] = (u8)(dbg_statistic->snr_3ss_sum[0] /dbg_statistic->rssi_3ss_cnt); - dbg_avg->snr_3ss_avg[1] = (u8)(dbg_statistic->snr_3ss_sum[1] /dbg_statistic->rssi_3ss_cnt); - dbg_avg->snr_3ss_avg[2] = (u8)(dbg_statistic->snr_3ss_sum[2] /dbg_statistic->rssi_3ss_cnt); - } - - PHYDM_DBG(dm, ODM_COMP_COMMON, "* 3-ss Cnt= ((%d)) RSSI:{%d, %d, %d} EVM:{%d, %d, %d} SNR:{%d, %d, %d}\n", - dbg_statistic->rssi_3ss_cnt, - dbg_avg->rssi_3ss_avg[0], dbg_avg->rssi_3ss_avg[1], dbg_avg->rssi_3ss_avg[2], - dbg_avg->evm_3ss_avg[0], dbg_avg->evm_3ss_avg[1], dbg_avg->evm_3ss_avg[2], - dbg_avg->snr_3ss_avg[0], dbg_avg->snr_3ss_avg[1], dbg_avg->snr_3ss_avg[2]); - } + if (dm->support_ic_type & (PHYDM_IC_ABOVE_3SS)) + phydm_avg_phy_val_nss(dm, 3); #endif - + /*@===[4-SS]===*/ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) - if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { - if (dbg_statistic->rssi_4ss_cnt != 0) { - dbg_avg->rssi_4ss_avg[0] = (u8)(dbg_statistic->rssi_4ss_sum[0] /dbg_statistic->rssi_4ss_cnt); - dbg_avg->rssi_4ss_avg[1] = (u8)(dbg_statistic->rssi_4ss_sum[1] /dbg_statistic->rssi_4ss_cnt); - dbg_avg->rssi_4ss_avg[2] = (u8)(dbg_statistic->rssi_4ss_sum[2] /dbg_statistic->rssi_4ss_cnt); - dbg_avg->rssi_4ss_avg[3] = (u8)(dbg_statistic->rssi_4ss_sum[3] /dbg_statistic->rssi_4ss_cnt); - - dbg_avg->evm_4ss_avg[0] = (u8)(dbg_statistic->evm_4ss_sum[0] /dbg_statistic->rssi_4ss_cnt); - dbg_avg->evm_4ss_avg[1] = (u8)(dbg_statistic->evm_4ss_sum[1] /dbg_statistic->rssi_4ss_cnt); - dbg_avg->evm_4ss_avg[2] = (u8)(dbg_statistic->evm_4ss_sum[2] /dbg_statistic->rssi_4ss_cnt); - dbg_avg->evm_4ss_avg[3] = (u8)(dbg_statistic->evm_4ss_sum[3] /dbg_statistic->rssi_4ss_cnt); - - dbg_avg->snr_4ss_avg[0] = (u8)(dbg_statistic->snr_4ss_sum[0] /dbg_statistic->rssi_4ss_cnt); - dbg_avg->snr_4ss_avg[1] = (u8)(dbg_statistic->snr_4ss_sum[1] /dbg_statistic->rssi_4ss_cnt); - dbg_avg->snr_4ss_avg[2] = (u8)(dbg_statistic->snr_4ss_sum[2] /dbg_statistic->rssi_4ss_cnt); - dbg_avg->snr_4ss_avg[3] = (u8)(dbg_statistic->snr_4ss_sum[3] /dbg_statistic->rssi_4ss_cnt); - } - - PHYDM_DBG(dm, ODM_COMP_COMMON, "* 4-ss Cnt= ((%d)) RSSI:{%d, %d, %d, %d} EVM:{%d, %d, %d, %d} SNR:{%d, %d, %d, %d}\n", - dbg_statistic->rssi_4ss_cnt, - dbg_avg->rssi_4ss_avg[0], dbg_avg->rssi_4ss_avg[1], dbg_avg->rssi_4ss_avg[2], dbg_avg->rssi_4ss_avg[3], - dbg_avg->evm_4ss_avg[0], dbg_avg->evm_4ss_avg[1], dbg_avg->evm_4ss_avg[2], dbg_avg->evm_4ss_avg[3], - dbg_avg->snr_4ss_avg[0], dbg_avg->snr_4ss_avg[1], dbg_avg->snr_4ss_avg[2], dbg_avg->snr_4ss_avg[3]); - } + if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) + phydm_avg_phy_val_nss(dm, 4); #endif - - - +#endif } -void -phydm_get_phy_statistic( - void *dm_void -) +void phydm_get_phy_statistic(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta = dm->phydm_sta_info[dm->one_entry_macid]; + enum channel_width bw; + u16 avg_phy_rate = 0; + u16 utility = 0; + u8 rx_ss = 1; + + avg_phy_rate = phydm_rx_avg_phy_rate(dm); + + if (dm->is_one_entry_only && is_sta_active(sta)) { + rx_ss = phydm_get_rx_stream_num(dm, sta->mimo_type); + bw = sta->bw_mode; + utility = phydm_rx_utility(dm, avg_phy_rate, rx_ss, bw); + } + PHYDM_DBG(dm, DBG_CMN, "Avg_rx_rate = %d, rx_utility=( %d / 1000 )\n", + avg_phy_rate, utility); + phydm_rx_rate_distribution(dm); phydm_reset_rx_rate_distribution(dm); - + + phydm_show_phy_hitogram(dm); phydm_get_avg_phystatus_val(dm); phydm_reset_phystatus_statistic(dm); }; -void -phydm_basic_dbg_message -( - void *dm_void -) +void phydm_basic_dbg_msg_linked(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fa_struct *false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(dm, PHYDM_FALSEALMCNT); - struct phydm_cfo_track_struct *cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(dm, PHYDM_CFOTRACK); - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - struct ra_table *ra_tab = &dm->dm_ra_table; - u16 macid, phydm_macid, client_cnt = 0; - struct cmn_sta_info *entry = NULL; - s32 tmp_val = 0; - u8 tmp_val_u1 = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track; + struct odm_phy_dbg_info *dbg_t = &dm->phy_dbg_info; + u16 macid, client_cnt = 0; + u8 rate = 0; + struct cmn_sta_info *entry = NULL; + char dbg_buf[PHYDM_SNPRINT_SIZE] = {0}; + struct phydm_cfo_rpt cfo; + u8 i = 0; - if (!(dm->debug_components & ODM_COMP_COMMON)) - return; + PHYDM_DBG(dm, DBG_CMN, "ID=((%d)), BW=((%d)), fc=((CH-%d))\n", + dm->curr_station_id, 20 << *dm->band_width, *dm->channel); - if (dm->cmn_dbg_msg_cnt < dm->cmn_dbg_msg_period) { - dm->cmn_dbg_msg_cnt += PHYDM_WATCH_DOG_PERIOD; - return; + #ifdef ODM_IC_11N_SERIES_SUPPORT + #ifdef PHYDM_PRIMARY_CCA + if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) && + (dm->support_ic_type & ODM_IC_11N_SERIES)) { + PHYDM_DBG(dm, DBG_CMN, "Primary CCA at ((%s SB))\n", + ((*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" : + "L")); + } + #endif + #endif + + if ((dm->support_ic_type & PHYSTS_2ND_TYPE_IC) || + dm->rx_rate > ODM_RATE11M) { + PHYDM_DBG(dm, DBG_CMN, "[AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}\n", + dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1], + dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]); } else { - dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD; + PHYDM_DBG(dm, DBG_CMN, "[CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}\n", + dm->cck_lna_idx, dm->cck_vga_idx); } - PHYDM_DBG(dm, ODM_COMP_COMMON, "[PHYDM Common MSG] System up time: ((%d sec))----->\n", dm->phydm_sys_up_time); + phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE); + PHYDM_DBG(dm, DBG_CMN, "RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)\n", + (dm->rssi_a == 0xff) ? 0 : dm->rssi_a, + (dm->rssi_b == 0xff) ? 0 : dm->rssi_b, + (dm->rssi_c == 0xff) ? 0 : dm->rssi_c, + (dm->rssi_d == 0xff) ? 0 : dm->rssi_d, + dbg_buf, dm->rx_rate); - if (dm->is_linked) { - PHYDM_DBG(dm, ODM_COMP_COMMON, - "ID=((%d)), BW=((%d)), fc=((CH-%d))\n", dm->curr_station_id, 20<<*dm->band_width, *dm->channel); + rate = dbg_t->beacon_phy_rate; + phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE); - if ((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) { - PHYDM_DBG(dm, ODM_COMP_COMMON, "Primary CCA at ((%s SB))\n", - ((*dm->sec_ch_offset == SECOND_CH_AT_LSB)?"U":"L")); - } + PHYDM_DBG(dm, DBG_CMN, "Beacon_cnt=%d, rate_idx=%s (0x%x)\n", + dbg_t->num_qry_beacon_pkt, dbg_buf, dbg_t->beacon_phy_rate); - if ((dm->support_ic_type & PHYSTS_2ND_TYPE_IC) || dm->rx_rate > ODM_RATE11M) { - - PHYDM_DBG(dm, ODM_COMP_COMMON, "[AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}\n", - dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1], dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]); - } else { - - PHYDM_DBG(dm, ODM_COMP_COMMON, "[CCK AGC Idx] {LNA, VGA}={0x%x, 0x%x}\n", - dm->cck_lna_idx, dm->cck_vga_idx); - } + phydm_get_phy_statistic(dm); - PHYDM_DBG(dm, ODM_COMP_COMMON, "RSSI:{%d, %d, %d, %d}, RxRate:", - (dm->rssi_a == 0xff) ? 0 : dm->rssi_a, - (dm->rssi_b == 0xff) ? 0 : dm->rssi_b, - (dm->rssi_c == 0xff) ? 0 : dm->rssi_c, - (dm->rssi_d == 0xff) ? 0 : dm->rssi_d); + PHYDM_DBG(dm, DBG_CMN, + "rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n", + dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80); - phydm_print_rate(dm, dm->rx_rate, ODM_COMP_COMMON); + /*Print TX rate*/ + for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) { + entry = dm->phydm_sta_info[macid]; - phydm_get_phy_statistic(dm); + if (!is_sta_active(entry)) + continue; - /*Print TX rate*/ - for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) { - entry = dm->phydm_sta_info[macid]; - if (!is_sta_active(entry)) { - continue; - } + rate = entry->ra_info.curr_tx_rate; + phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE); + PHYDM_DBG(dm, DBG_CMN, "TxRate[%d]=%s (0x%x)\n", + macid, dbg_buf, entry->ra_info.curr_tx_rate); - phydm_macid = (dm->phydm_macid_table[macid]); - PHYDM_DBG(dm, ODM_COMP_COMMON, "TxRate[%d]:", macid); - phydm_print_rate(dm, entry->ra_info.curr_tx_rate, ODM_COMP_COMMON); + client_cnt++; - client_cnt++; - - if (client_cnt >= dm->number_linked_client) - break; - } - - PHYDM_DBG(dm, ODM_COMP_COMMON, "TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))\n", - dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load); - - tmp_val_u1 = (cfo_track->crystal_cap > cfo_track->def_x_cap) ? (cfo_track->crystal_cap - cfo_track->def_x_cap) : (cfo_track->def_x_cap - cfo_track->crystal_cap); - PHYDM_DBG(dm, ODM_COMP_COMMON, "CFO_avg = ((%d kHz)) , CFO_tracking = ((%s%d))\n", - cfo_track->CFO_ave_pre, ((cfo_track->crystal_cap > cfo_track->def_x_cap) ? "+" : "-"), tmp_val_u1); - - /* Condition number */ - #if (RTL8822B_SUPPORT == 1) - if (dm->support_ic_type == ODM_RTL8822B) { - tmp_val = phydm_get_condition_number_8822B(dm); - PHYDM_DBG(dm, ODM_COMP_COMMON, "Condi_Num=((%d))\n", tmp_val); - } - #endif - - #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) - /*STBC or LDPC pkt*/ - if (dm->support_ic_type & PHYSTS_2ND_TYPE_IC) - PHYDM_DBG(dm, ODM_COMP_COMMON, "Coding: LDPC=((%s)), STBC=((%s))\n", (dm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N", (dm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N"); - #endif - } else - PHYDM_DBG(dm, ODM_COMP_COMMON, "No Link !!!\n"); - - PHYDM_DBG(dm, ODM_COMP_COMMON, "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", - false_alm_cnt->cnt_cck_cca, false_alm_cnt->cnt_ofdm_cca, false_alm_cnt->cnt_cca_all); - - PHYDM_DBG(dm, ODM_COMP_COMMON, "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", - false_alm_cnt->cnt_cck_fail, false_alm_cnt->cnt_ofdm_fail, false_alm_cnt->cnt_all); - - #if (ODM_IC_11N_SERIES_SUPPORT == 1) - if (dm->support_ic_type & ODM_IC_11N_SERIES) { - PHYDM_DBG(dm, ODM_COMP_COMMON, "[OFDM FA Detail] Parity_Fail = (( %d )), Rate_Illegal = (( %d )), CRC8_fail = (( %d )), Mcs_fail = (( %d )), Fast_Fsync = (( %d )), SB_Search_fail = (( %d ))\n", - false_alm_cnt->cnt_parity_fail, false_alm_cnt->cnt_rate_illegal, false_alm_cnt->cnt_crc8_fail, false_alm_cnt->cnt_mcs_fail, false_alm_cnt->cnt_fast_fsync, false_alm_cnt->cnt_sb_search_fail); + if (client_cnt >= dm->number_linked_client) + break; } - #endif - PHYDM_DBG(dm, ODM_COMP_COMMON, "is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n\n", - dm->is_linked, dm->number_linked_client, dm->rssi_min, dig_t->cur_ig_value, dm->noisy_decision); + PHYDM_DBG(dm, DBG_CMN, + "TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))\n", + dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load); + + PHYDM_DBG(dm, DBG_CMN, "CFO_avg=((%d kHz)), CFO_traking = ((%s%d))\n", + cfo_t->CFO_ave_pre, + ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"), + DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap)); + + /* @CFO report */ + switch (dm->ic_ip_series) { + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + case PHYDM_IC_JGR3: + PHYDM_DBG(dm, DBG_CMN, "cfo_tail = {%d, %d, %d, %d}\n", + dbg_t->cfo_tail[0], dbg_t->cfo_tail[1], + dbg_t->cfo_tail[2], dbg_t->cfo_tail[3]); + break; + #endif + default: + phydm_get_cfo_info(dm, &cfo); + for (i = 0; i < dm->num_rf_path; i++) { + PHYDM_DBG(dm, DBG_CMN, + "CFO[%d] {S, L, Sec, Acq, End} = {%d, %d, %d, %d, %d}\n", + i, cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], + cfo.cfo_rpt_sec[i], cfo.cfo_rpt_acq[i], + cfo.cfo_rpt_end[i]); + } + break; + } + +/* @Condition number */ +#if (RTL8822B_SUPPORT) + if (dm->support_ic_type == ODM_RTL8822B) { + PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%.4d)), %d\n", + dbg_t->condi_num >> 4, + phydm_show_fraction_num(dbg_t->condi_num & 0xf, 4), + dbg_t->condi_num); + } +#endif +#ifdef PHYSTS_3RD_TYPE_SUPPORT + if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) { + PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%4d dB))\n", + dbg_t->condi_num >> 1, + phydm_show_fraction_num(dbg_t->condi_num & 0x1, 1)); + } +#endif + +#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT)) + /*STBC or LDPC pkt*/ + if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC)) + PHYDM_DBG(dm, DBG_CMN, "Coding: LDPC=((%s)), STBC=((%s))\n", + (dbg_t->is_ldpc_pkt) ? "Y" : "N", + (dbg_t->is_stbc_pkt) ? "Y" : "N"); +#endif } +void phydm_dm_summary(void *dm_void, u8 macid) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track; + struct cmn_sta_info *sta = NULL; + struct ra_sta_info *ra = NULL; + struct dtp_info *dtp = NULL; + u64 comp = dm->support_ability; + u64 pause_comp = dm->pause_ability; -void phydm_basic_profile( - void *dm_void, - u32 *_used, - char *output, - u32 *_out_len -) + if (!(dm->debug_components & DBG_DM_SUMMARY)) + return; + + if (!dm->is_linked) { + pr_debug("[%s]No Link !!!\n", __func__); + return; + } + + sta = dm->phydm_sta_info[macid]; + + if (!is_sta_active(sta)) { + pr_debug("[Warning] %s invalid STA, macid=%d\n", + __func__, macid); + return; + } + + ra = &sta->ra_info; + dtp = &sta->dtp_stat; + pr_debug("[%s]===========>\n", __func__); + + pr_debug("00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, FA_th={%d,%d,%d}\n", + ((comp & ODM_BB_DIG) ? + ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."), + "DIG", + dig_t->cur_ig_value, + dig_t->rx_gain_range_min, dig_t->rx_gain_range_max, + dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]); + + pr_debug("01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n", + ((comp & ODM_BB_RA_MASK) ? + ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."), + "RaMask", + ra->rssi_level, ra->ramask); + +#ifdef CONFIG_DYNAMIC_TX_TWR + pr_debug("02.(%s) %-12s: pwr_lv=%d\n", + ((comp & ODM_BB_DYNAMIC_TXPWR) ? + ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."), + "DynTxPwr", + dtp->sta_tx_high_power_lvl); +#endif + + pr_debug("05.(%s) %-12s: cck_pd_lv=%d\n", + ((comp & ODM_BB_CCK_PD) ? + ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."), + "CCK_PD", dm->dm_cckpd_table.cck_pd_lv); + +#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + pr_debug("06.(%s) %-12s: div_type=%d, curr_ant=%s\n", + ((comp & ODM_BB_ANT_DIV) ? + ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."), + "ANT_DIV", + dm->ant_div_type, + (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX"); +#endif + +#ifdef PHYDM_POWER_TRAINING_SUPPORT + pr_debug("08.(%s) %-12s: PT_score=%d, disable_PT=%d\n", + ((comp & ODM_BB_PWR_TRAIN) ? + ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."), + "PwrTrain", + dm->pow_train_table.pow_train_score, + dm->is_disable_power_training); +#endif + +#ifdef CONFIG_PHYDM_DFS_MASTER + pr_debug("11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n", + ((comp & ODM_BB_DFS) ? + ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."), + "DFS", + dm->dfs.dbg_mode, dm->dfs_region_domain); +#endif +#ifdef PHYDM_SUPPORT_ADAPTIVITY + pr_debug("13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n", + ((comp & ODM_BB_ADAPTIVITY) ? + ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."), + "Adaptivity", + dm->adaptivity.th_l2h, dm->adaptivity.th_h2l, + dm->false_alm_cnt.edcca_flag); +#endif + pr_debug("14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n", + ((comp & ODM_BB_CFO_TRACKING) ? + ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."), + "CfoTrack", + cfo_t->CFO_ave_pre, + ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"), + DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap)); + + pr_debug("15.(%s) %-12s: ratio{nhm, clm}={%d, %d}\n", + ((comp & ODM_BB_ENV_MONITOR) ? + ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."), + "EnvMntr", + dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio); + +#ifdef PHYDM_PRIMARY_CCA + pr_debug("16.(%s) %-12s: CCA @ (%s SB)\n", + ((comp & ODM_BB_PRIMARY_CCA) ? + ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."), + "PriCCA", + ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" : + ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U"))); +#endif +#ifdef CONFIG_ADAPTIVE_SOML + pr_debug("17.(%s) %-12s: soml_en = %s\n", + ((comp & ODM_BB_ADAPTIVE_SOML) ? + ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."), + "A-SOML", + (dm->dm_soml_table.soml_last_state == SOML_ON) ? + "ON" : "OFF"); +#endif +#ifdef PHYDM_LNA_SAT_CHK_SUPPORT + pr_debug("18.(%s) %-12s:\n", + ((comp & ODM_BB_LNA_SAT_CHK) ? + ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."), + "LNA_SAT_CHK"); +#endif +} + +void phydm_basic_dbg_message(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; + + if (!(dm->debug_components & DBG_CMN)) + return; + + + if (dm->cmn_dbg_msg_cnt >= dm->cmn_dbg_msg_period) { + dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD; + } else { + dm->cmn_dbg_msg_cnt += PHYDM_WATCH_DOG_PERIOD; + return; + } + + PHYDM_DBG(dm, DBG_CMN, "[%s] System up time: ((%d sec))---->\n", + __func__, dm->phydm_sys_up_time); + + if (dm->is_linked) + phydm_basic_dbg_msg_linked(dm); + else + PHYDM_DBG(dm, DBG_CMN, "No Link !!!\n"); + + PHYDM_DBG(dm, DBG_CMN, "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", + fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all); + + PHYDM_DBG(dm, DBG_CMN, "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", + fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all); + + PHYDM_DBG(dm, DBG_CMN, + "[OFDM FA Detail] Parity_Fail=%d, Rate_Illegal=%d, CRC8=%d, MCS_fail=%d, Fast_sync=%d, SB_Search_fail=%d\n", + fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal, + fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail, + fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail); + +#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) + if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) { + PHYDM_DBG(dm, DBG_CMN, + "[OFDM FA Detail VHT] CRC8_VHT=%d, MCS_Fail_VHT=%d\n", + fa_t->cnt_crc8_fail_vht, fa_t->cnt_mcs_fail_vht); + } +#endif + + PHYDM_DBG(dm, DBG_CMN, + "is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n\n", + dm->is_linked, dm->number_linked_client, dm->rssi_min, + dm->dm_dig_table.cur_ig_value, dm->noisy_decision); +} + +void phydm_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len) { #ifdef CONFIG_PHYDM_DEBUG_FUNCTION - struct dm_struct *dm = (struct dm_struct *)dm_void; - char *cut = NULL; + struct dm_struct *dm = (struct dm_struct *)dm_void; + char *cut = NULL; char *ic_type = NULL; u32 used = *_used; u32 out_len = *_out_len; - u32 date = 0; - char *commit_by = NULL; - u32 release_ver = 0; + u32 date = 0; + char *commit_by = NULL; + u32 release_ver = 0; - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-35s\n", "% Basic Profile %"); + PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n", + "% Basic Profile %"); if (dm->support_ic_type == ODM_RTL8188E) { -#if (RTL8188E_SUPPORT == 1) +#if (RTL8188E_SUPPORT) ic_type = "RTL8188E"; date = RELEASE_DATE_8188E; commit_by = COMMIT_BY_8188E; release_ver = RELEASE_VERSION_8188E; #endif - } -#if (RTL8812A_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8812) { +#if (RTL8812A_SUPPORT) + } else if (dm->support_ic_type == ODM_RTL8812) { ic_type = "RTL8812A"; date = RELEASE_DATE_8812A; commit_by = COMMIT_BY_8812A; release_ver = RELEASE_VERSION_8812A; - } #endif -#if (RTL8821A_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8821) { +#if (RTL8821A_SUPPORT) + } else if (dm->support_ic_type == ODM_RTL8821) { ic_type = "RTL8821A"; date = RELEASE_DATE_8821A; commit_by = COMMIT_BY_8821A; release_ver = RELEASE_VERSION_8821A; - } #endif -#if (RTL8192E_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8192E) { +#if (RTL8192E_SUPPORT) + } else if (dm->support_ic_type == ODM_RTL8192E) { ic_type = "RTL8192E"; date = RELEASE_DATE_8192E; commit_by = COMMIT_BY_8192E; release_ver = RELEASE_VERSION_8192E; - } #endif -#if (RTL8723B_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8723B) { +#if (RTL8723B_SUPPORT) + } else if (dm->support_ic_type == ODM_RTL8723B) { ic_type = "RTL8723B"; date = RELEASE_DATE_8723B; commit_by = COMMIT_BY_8723B; release_ver = RELEASE_VERSION_8723B; - } #endif -#if (RTL8814A_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8814A) { +#if (RTL8814A_SUPPORT) + } else if (dm->support_ic_type == ODM_RTL8814A) { ic_type = "RTL8814A"; date = RELEASE_DATE_8814A; commit_by = COMMIT_BY_8814A; release_ver = RELEASE_VERSION_8814A; - } #endif -#if (RTL8881A_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8881A) { +#if (RTL8881A_SUPPORT) + } else if (dm->support_ic_type == ODM_RTL8881A) { ic_type = "RTL8881A"; - /**/ - } #endif -#if (RTL8822B_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8822B) { +#if (RTL8822B_SUPPORT) + } else if (dm->support_ic_type == ODM_RTL8822B) { ic_type = "RTL8822B"; date = RELEASE_DATE_8822B; commit_by = COMMIT_BY_8822B; release_ver = RELEASE_VERSION_8822B; - } #endif -#if (RTL8197F_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8197F) { +#if (RTL8197F_SUPPORT) + } else if (dm->support_ic_type == ODM_RTL8197F) { ic_type = "RTL8197F"; date = RELEASE_DATE_8197F; commit_by = COMMIT_BY_8197F; release_ver = RELEASE_VERSION_8197F; - } #endif - -#if (RTL8703B_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8703B) { +#if (RTL8703B_SUPPORT) + } else if (dm->support_ic_type == ODM_RTL8703B) { ic_type = "RTL8703B"; date = RELEASE_DATE_8703B; commit_by = COMMIT_BY_8703B; release_ver = RELEASE_VERSION_8703B; - - } #endif -#if (RTL8195A_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8195A) { +#if (RTL8195A_SUPPORT) + } else if (dm->support_ic_type == ODM_RTL8195A) { ic_type = "RTL8195A"; - /**/ - } #endif -#if (RTL8188F_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8188F) { +#if (RTL8188F_SUPPORT) + } else if (dm->support_ic_type == ODM_RTL8188F) { ic_type = "RTL8188F"; date = RELEASE_DATE_8188F; commit_by = COMMIT_BY_8188F; release_ver = RELEASE_VERSION_8188F; - } #endif -#if (RTL8723D_SUPPORT == 1) - else if (dm->support_ic_type == ODM_RTL8723D) { +#if (RTL8723D_SUPPORT) + } else if (dm->support_ic_type == ODM_RTL8723D) { ic_type = "RTL8723D"; date = RELEASE_DATE_8723D; commit_by = COMMIT_BY_8723D; release_ver = RELEASE_VERSION_8723D; - /**/ - } #endif + } -/* JJ ADD 20161014 */ -#if (RTL8710B_SUPPORT == 1) +/* @JJ ADD 20161014 */ +#if (RTL8710B_SUPPORT) else if (dm->support_ic_type == ODM_RTL8710B) { ic_type = "RTL8710B"; date = RELEASE_DATE_8710B; commit_by = COMMIT_BY_8710B; release_ver = RELEASE_VERSION_8710B; - /**/ } #endif -#if (RTL8821C_SUPPORT == 1) +#if (RTL8721D_SUPPORT) + else if (dm->support_ic_type == ODM_RTL8721D) { + ic_type = "RTL8721D"; + date = RELEASE_DATE_8721D; + commit_by = COMMIT_BY_8721D; + release_ver = RELEASE_VERSION_8721D; + } +#endif +#if (RTL8821C_SUPPORT) else if (dm->support_ic_type == ODM_RTL8821C) { ic_type = "RTL8821C"; date = RELEASE_DATE_8821C; @@ -1483,9 +2599,65 @@ void phydm_basic_profile( release_ver = RELEASE_VERSION_8821C; } #endif + +/*@jj add 20170822*/ +#if (RTL8192F_SUPPORT) + else if (dm->support_ic_type == ODM_RTL8192F) { + ic_type = "RTL8192F"; + date = RELEASE_DATE_8192F; + commit_by = COMMIT_BY_8192F; + release_ver = RELEASE_VERSION_8192F; + } +#endif + +#if (RTL8198F_SUPPORT) + else if (dm->support_ic_type == ODM_RTL8198F) { + ic_type = "RTL8198F"; + date = RELEASE_DATE_8198F; + commit_by = COMMIT_BY_8198F; + release_ver = RELEASE_VERSION_8198F; + } +#endif + +#if (RTL8822C_SUPPORT) + else if (dm->support_ic_type == ODM_RTL8822C) { + ic_type = "RTL8822C"; + date = RELEASE_DATE_8822C; + commit_by = COMMIT_BY_8822C; + release_ver = RELEASE_VERSION_8822C; + } +#endif + +#if (RTL8812F_SUPPORT) + else if (dm->support_ic_type == ODM_RTL8812F) { + ic_type = "RTL8812F"; + date = RELEASE_DATE_8812F; + commit_by = COMMIT_BY_8812F; + release_ver = RELEASE_VERSION_8812F; + } +#endif + +#if (RTL8197G_SUPPORT) + else if (dm->support_ic_type == ODM_RTL8197G) { + ic_type = "RTL8197G"; + date = RELEASE_DATE_8197G; + commit_by = COMMIT_BY_8197G; + release_ver = RELEASE_VERSION_8197G; + } +#endif + +#if (RTL8814B_SUPPORT) + else if (dm->support_ic_type == ODM_RTL8814B) { + ic_type = "RTL8814B"; + date = RELEASE_DATE_8814B; + commit_by = COMMIT_BY_8814B; + release_ver = RELEASE_VERSION_8814B; + } +#endif + PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s (MP Chip: %s)\n", "IC type", ic_type, - dm->is_mp_chip ? "Yes" : "No"); + " %-35s: %s (MP Chip: %s)\n", "IC type", ic_type, + dm->is_mp_chip ? "Yes" : "No"); if (dm->cut_version == ODM_CUT_A) cut = "A"; @@ -1499,134 +2671,140 @@ void phydm_basic_profile( cut = "E"; else if (dm->cut_version == ODM_CUT_F) cut = "F"; + else if (dm->cut_version == ODM_CUT_G) + cut = "G"; + else if (dm->cut_version == ODM_CUT_H) + cut = "H"; else if (dm->cut_version == ODM_CUT_I) cut = "I"; + else if (dm->cut_version == ODM_CUT_J) + cut = "J"; + else if (dm->cut_version == ODM_CUT_K) + cut = "K"; + else if (dm->cut_version == ODM_CUT_L) + cut = "L"; + else if (dm->cut_version == ODM_CUT_M) + cut = "M"; + else if (dm->cut_version == ODM_CUT_N) + cut = "N"; + else if (dm->cut_version == ODM_CUT_O) + cut = "O"; + else if (dm->cut_version == ODM_CUT_TEST) + cut = "TEST"; + else + cut = "UNKNOWN"; + + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n", + "RFE type", dm->rfe_type); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "Cut Ver", cut); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n", + "PHY Para Ver", odm_get_hw_img_version(dm)); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n", + "PHY Para Commit date", date); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "PHY Para Commit by", commit_by); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n", + "PHY Para Release Ver", release_ver); PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %d\n", "RFE type", dm->rfe_type); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "Cut Ver", cut); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %d\n", "PHY Para Ver", - odm_get_hw_img_version(dm)); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %d\n", "PHY Para Commit date", date); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "PHY Para Commit by", commit_by); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %d\n", "PHY Para Release Ver", release_ver); + " %-35s: %d (Subversion: %d)\n", "FW Ver", dm->fw_version, + dm->fw_sub_version); -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - { - void *adapter = dm->adapter; - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %d (Subversion: %d)\n", "FW Ver", - ((PADAPTER)adapter)->MgntInfo.FirmwareVersion, - ((PADAPTER)adapter)->MgntInfo.FirmwareSubVersion); - } -#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) - { - struct rtl8192cd_priv *priv = dm->priv; - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %d (Subversion: %d)\n", "FW Ver", - priv->pshare->fw_version, - priv->pshare->fw_sub_version); - } -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - { - struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; - struct rtl_hal *rtlhal = rtl_hal(rtlpriv); - - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %d (Subversion: %d)\n", "FW Ver", - rtlhal->fw_version, rtlhal->fw_subversion); - } -#else - { - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %d (Subversion: %d)\n", "FW Ver", - hal_data->firmware_version, - hal_data->firmware_sub_version); - } + /* @1 PHY DM version List */ + PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n", + "% PHYDM version %"); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "Code base", PHYDM_CODE_BASE); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "Release Date", PHYDM_RELEASE_DATE); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "Adaptivity", ADAPTIVITY_VERSION); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "DIG", DIG_VERSION); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "CFO Tracking", CFO_TRACKING_VERSION); +#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "AntDiv", ANTDIV_VERSION); #endif - /* 1 PHY DM version List */ - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-35s\n", "% PHYDM version %"); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "Code base", PHYDM_CODE_BASE); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "Release Date", PHYDM_RELEASE_DATE); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "Adaptivity", ADAPTIVITY_VERSION); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "DIG", DIG_VERSION); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "CFO Tracking", CFO_TRACKING_VERSION); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "AntDiv", ANTDIV_VERSION); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "Dynamic TxPower", - DYNAMIC_TXPWR_VERSION); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "RA Info", RAINFO_VERSION); -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "AntDetect", ANTDECT_VERSION); +#ifdef CONFIG_DYNAMIC_TX_TWR + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "Dynamic TxPower", DYNAMIC_TXPWR_VERSION); #endif - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "PathDiv", PATHDIV_VERSION); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "LA mode", DYNAMIC_LA_MODE); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "Primary CCA", PRIMARYCCA_VERSION); - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "DFS", DFS_VERSION); + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "RA Info", RAINFO_VERSION); +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "AntDetect", ANTDECT_VERSION); +#endif +#ifdef CONFIG_PATH_DIVERSITY + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "PathDiv", PATHDIV_VERSION); +#endif +#ifdef CONFIG_ADAPTIVE_SOML + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "Adaptive SOML", ADAPTIVE_SOML_VERSION); +#endif +#if (PHYDM_LA_MODE_SUPPORT) + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "LA mode", DYNAMIC_LA_MODE); +#endif +#ifdef PHYDM_PRIMARY_CCA + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "Primary CCA", PRIMARYCCA_VERSION); +#endif + PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", + "DFS", DFS_VERSION); -#if (RTL8822B_SUPPORT == 1) +#if (RTL8822B_SUPPORT) if (dm->support_ic_type & ODM_RTL8822B) PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "PHY config 8822B", - PHY_CONFIG_VERSION_8822B); + " %-35s: %s\n", "PHY config 8822B", + PHY_CONFIG_VERSION_8822B); #endif -#if (RTL8197F_SUPPORT == 1) +#if (RTL8197F_SUPPORT) if (dm->support_ic_type & ODM_RTL8197F) PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s\n", "PHY config 8197F", - PHY_CONFIG_VERSION_8197F); + " %-35s: %s\n", "PHY config 8197F", + PHY_CONFIG_VERSION_8197F); +#endif + +/*@jj add 20170822*/ +#if (RTL8192F_SUPPORT) + if (dm->support_ic_type & ODM_RTL8192F) + PDM_SNPF(out_len, used, output + used, out_len - used, + " %-35s: %s\n", "PHY config 8192F", + PHY_CONFIG_VERSION_8192F); +#endif +#if (RTL8721D_SUPPORT) + if (dm->support_ic_type & ODM_RTL8721D) + PDM_SNPF(out_len, used, output + used, out_len - used, + " %-35s: %s\n", "PHY config 8721D", + PHY_CONFIG_VERSION_8721D); #endif *_used = used; *_out_len = out_len; - - /* RF Function version List */ - halrf_basic_profile(dm_void, &used, output, &out_len); -#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/ +#endif /*@#if CONFIG_PHYDM_DEBUG_FUNCTION*/ } #ifdef CONFIG_PHYDM_DEBUG_FUNCTION -void -phydm_fw_trace_en_h2c( - void *dm_void, - boolean enable, - u32 fw_debug_component, - u32 monitor_mode, - u32 macid -) +void phydm_fw_trace_en_h2c(void *dm_void, boolean enable, + u32 fw_dbg_comp, u32 monitor_mode, u32 macid) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 h2c_parameter[7] = {0}; - u8 cmd_length; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 h2c_parameter[7] = {0}; + u8 cmd_length; if (dm->support_ic_type & PHYDM_IC_3081_SERIES) { h2c_parameter[0] = enable; - h2c_parameter[1] = (u8)(fw_debug_component & MASKBYTE0); - h2c_parameter[2] = (u8)((fw_debug_component & MASKBYTE1) >> 8); - h2c_parameter[3] = (u8)((fw_debug_component & MASKBYTE2) >> 16); - h2c_parameter[4] = (u8)((fw_debug_component & MASKBYTE3) >> 24); + h2c_parameter[1] = (u8)(fw_dbg_comp & MASKBYTE0); + h2c_parameter[2] = (u8)((fw_dbg_comp & MASKBYTE1) >> 8); + h2c_parameter[3] = (u8)((fw_dbg_comp & MASKBYTE2) >> 16); + h2c_parameter[4] = (u8)((fw_dbg_comp & MASKBYTE3) >> 24); h2c_parameter[5] = (u8)monitor_mode; h2c_parameter[6] = (u8)macid; cmd_length = 7; @@ -1638,196 +2816,190 @@ phydm_fw_trace_en_h2c( cmd_length = 3; } + PHYDM_DBG(dm, DBG_FW_TRACE, + "[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n", + enable, monitor_mode, macid); - PHYDM_DBG(dm, DBG_FW_TRACE, "---->\n"); - if (monitor_mode == 0) - PHYDM_DBG(dm, DBG_FW_TRACE, "[H2C] FW_debug_en: (( %d ))\n", enable); - else - PHYDM_DBG(dm, DBG_FW_TRACE, "[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n", enable, monitor_mode, macid); odm_fill_h2c_cmd(dm, PHYDM_H2C_FW_TRACE_EN, cmd_length, h2c_parameter); } -void -phydm_get_per_path_txagc( - void *dm_void, - u8 path, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_get_per_path_txagc(void *dm_void, u8 path, u32 *_used, char *output, + u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 rate_idx; - u8 txagc; - u32 used = *_used; - u32 out_len = *_out_len; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 rate_idx = 0; + u8 txagc = 0; + u32 used = *_used; + u32 out_len = *_out_len; #ifdef PHYDM_COMMON_API_SUPPORT - if (((dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) && (path <= RF_PATH_B)) || - ((dm->support_ic_type & (ODM_RTL8821C)) && (path <= RF_PATH_A))) { - for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) { - if (rate_idx == ODM_RATE1M) - PDM_SNPF(out_len, used, output + used, - out_len - used, " %-35s\n", - "CCK====>"); - else if (rate_idx == ODM_RATE6M) - PDM_SNPF(out_len, used, output + used, - out_len - used, "\n %-35s\n", - "OFDM====>"); - else if (rate_idx == ODM_RATEMCS0) - PDM_SNPF(out_len, used, output + used, - out_len - used, "\n %-35s\n", - "HT 1ss====>"); - else if (rate_idx == ODM_RATEMCS8) - PDM_SNPF(out_len, used, output + used, - out_len - used, "\n %-35s\n", - "HT 2ss====>"); - else if (rate_idx == ODM_RATEMCS16) - PDM_SNPF(out_len, used, output + used, - out_len - used, "\n %-35s\n", - "HT 3ss====>"); - else if (rate_idx == ODM_RATEMCS24) - PDM_SNPF(out_len, used, output + used, - out_len - used, "\n %-35s\n", - "HT 4ss====>"); - else if (rate_idx == ODM_RATEVHTSS1MCS0) - PDM_SNPF(out_len, used, output + used, - out_len - used, "\n %-35s\n", - "VHT 1ss====>"); - else if (rate_idx == ODM_RATEVHTSS2MCS0) - PDM_SNPF(out_len, used, output + used, - out_len - used, "\n %-35s\n", - "VHT 2ss====>"); - else if (rate_idx == ODM_RATEVHTSS3MCS0) - PDM_SNPF(out_len, used, output + used, - out_len - used, "\n %-35s\n", - "VHT 3ss====>"); - else if (rate_idx == ODM_RATEVHTSS4MCS0) - PDM_SNPF(out_len, used, output + used, - out_len - used, "\n %-35s\n", - "VHT 4ss====>"); + if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) + return; - txagc = phydm_api_get_txagc(dm, (enum rf_path) path, rate_idx); - if (config_phydm_read_txagc_check(txagc)) - PDM_SNPF(out_len, used, output + used, - out_len - used, " 0x%02x ", - txagc); - else - PDM_SNPF(out_len, used, output + used, - out_len - used, " 0x%s ", - "xx"); - } + if (dm->num_rf_path == 1 && path > RF_PATH_A) + return; + else if (dm->num_rf_path == 2 && path > RF_PATH_B) + return; + else if (dm->num_rf_path == 3 && path > RF_PATH_C) + return; + else if (dm->num_rf_path == 4 && path > RF_PATH_D) + return; + + for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) { + if (!(dm->support_ic_type & PHYDM_IC_ABOVE_3SS) && + ((rate_idx >= ODM_RATEMCS16 && + rate_idx < ODM_RATEVHTSS1MCS0) || + rate_idx >= ODM_RATEVHTSS3MCS0)) + continue; + + if (rate_idx == ODM_RATE1M) + PDM_SNPF(out_len, used, output + used, out_len - used, + " %-35s\n", "CCK====>"); + else if (rate_idx == ODM_RATE6M) + PDM_SNPF(out_len, used, output + used, out_len - used, + "\n %-35s\n", "OFDM====>"); + else if (rate_idx == ODM_RATEMCS0) + PDM_SNPF(out_len, used, output + used, out_len - used, + "\n %-35s\n", "HT 1ss====>"); + else if (rate_idx == ODM_RATEMCS8) + PDM_SNPF(out_len, used, output + used, out_len - used, + "\n %-35s\n", "HT 2ss====>"); + else if (rate_idx == ODM_RATEMCS16) + PDM_SNPF(out_len, used, output + used, out_len - used, + "\n %-35s\n", "HT 3ss====>"); + else if (rate_idx == ODM_RATEMCS24) + PDM_SNPF(out_len, used, output + used, out_len - used, + "\n %-35s\n", "HT 4ss====>"); + else if (rate_idx == ODM_RATEVHTSS1MCS0) + PDM_SNPF(out_len, used, output + used, out_len - used, + "\n %-35s\n", "VHT 1ss====>"); + else if (rate_idx == ODM_RATEVHTSS2MCS0) + PDM_SNPF(out_len, used, output + used, out_len - used, + "\n %-35s\n", "VHT 2ss====>"); + else if (rate_idx == ODM_RATEVHTSS3MCS0) + PDM_SNPF(out_len, used, output + used, out_len - used, + "\n %-35s\n", "VHT 3ss====>"); + else if (rate_idx == ODM_RATEVHTSS4MCS0) + PDM_SNPF(out_len, used, output + used, out_len - used, + "\n %-35s\n", "VHT 4ss====>"); + + txagc = phydm_api_get_txagc(dm, (enum rf_path)path, rate_idx); + if (config_phydm_read_txagc_check(txagc)) + PDM_SNPF(out_len, used, output + used, + out_len - used, " 0x%02x ", txagc); + else + PDM_SNPF(out_len, used, output + used, + out_len - used, " 0x%s ", "xx"); } #endif *_used = used; *_out_len = out_len; - } - -void -phydm_get_txagc( - void *dm_void, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_get_txagc(void *dm_void, u32 *_used, char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 used = *_used; - u32 out_len = *_out_len; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; /* path-A */ - PDM_SNPF(out_len, used, output + used, out_len - used, - "%-35s\n", "path-A===================="); + PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n", + "path-A===================="); phydm_get_per_path_txagc(dm, RF_PATH_A, &used, output, &out_len); /* path-B */ - PDM_SNPF(out_len, used, output + used, out_len - used, - "\n%-35s\n", "path-B===================="); + PDM_SNPF(out_len, used, output + used, out_len - used, "\n%-35s\n", + "path-B===================="); phydm_get_per_path_txagc(dm, RF_PATH_B, &used, output, &out_len); /* path-C */ - PDM_SNPF(out_len, used, output + used, out_len - used, - "\n%-35s\n", "path-C===================="); + PDM_SNPF(out_len, used, output + used, out_len - used, "\n%-35s\n", + "path-C===================="); phydm_get_per_path_txagc(dm, RF_PATH_C, &used, output, &out_len); /* path-D */ - PDM_SNPF(out_len, used, output + used, out_len - used, - "\n%-35s\n", "path-D===================="); + PDM_SNPF(out_len, used, output + used, out_len - used, "\n%-35s\n", + "path-D===================="); phydm_get_per_path_txagc(dm, RF_PATH_D, &used, output, &out_len); *_used = used; *_out_len = out_len; - } -void -phydm_set_txagc( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_set_txagc(void *dm_void, u32 *const val, u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 used = *_used; - u32 out_len = *_out_len; - u8 i; - u32 power_index; - boolean status = true; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + u8 i = 0; + u32 pow = 0; /*power index*/ + u8 vht_start_rate = ODM_RATEVHTSS1MCS0; + boolean rpt = true; + enum rf_path path = RF_PATH_A; - /*dm_value[1] = path*/ - /*dm_value[2] = hw_rate*/ - /*dm_value[3] = power_index*/ +/*@val[1] = path*/ +/*@val[2] = hw_rate*/ +/*@val[3] = power_index*/ #ifdef PHYDM_COMMON_API_SUPPORT - if ((dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)) == 0) + if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) return; - - if (dm_value[1] >= dm->num_rf_path) { - PDM_SNPF(out_len, used, output + used, out_len - used, - " %s%d %s%x%s\n", "Write path-", - (dm_value[1] & 0x1), "rate index-0x", - (dm_value[2] & 0x7f), " fail"); - } else if ((u8)dm_value[2] != 0xff) { - if (phydm_api_set_txagc(dm, dm_value[3], (enum rf_path) dm_value[1], (u8)dm_value[2], true)) - PDM_SNPF(out_len, used, output + used, - out_len - used, " %s%d %s%x%s%x\n", - "Write path-", dm_value[1], - "rate index-0x", dm_value[2], " = 0x", - dm_value[3]); - else - PDM_SNPF(out_len, used, output + used, - out_len - used, " %s%d %s%x%s\n", - "Write path-", (dm_value[1] & 0x1), - "rate index-0x", (dm_value[2] & 0x7f), - " fail"); - } else { - power_index = (dm_value[3] & 0x3f); - if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) { - power_index = (power_index << 24) | (power_index << 16) | (power_index << 8) | (power_index); + path = (enum rf_path)val[1]; + + if (val[1] >= dm->num_rf_path) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "Write path-%d rate_idx-0x%x fail\n", val[1], val[2]); + } else if ((u8)val[2] != 0xff) { + if (phydm_api_set_txagc(dm, val[3], path, (u8)val[2], true)) + PDM_SNPF(out_len, used, output + used, out_len - used, + "Write path-%d rate_idx-0x%x = 0x%x\n", + val[1], val[2], val[3]); + else + PDM_SNPF(out_len, used, output + used, out_len - used, + "Write path-%d rate index-0x%x fail\n", + val[1], val[2]); + } else { + + if (dm->support_ic_type & + (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B)) { + pow = (val[3] & 0x3f); + pow = BYTE_DUPLICATE_2_DWORD(pow); for (i = 0; i < ODM_RATEVHTSS2MCS9; i += 4) - status = (status & phydm_api_set_txagc(dm, power_index, (enum rf_path) dm_value[1], i, false)); - } else if (dm->support_ic_type & ODM_RTL8197F) { + rpt &= phydm_api_set_txagc(dm, pow, path, i, 0); + } else if (dm->support_ic_type & + (ODM_RTL8197F | ODM_RTL8192F)) { + pow = (val[3] & 0x3f); for (i = 0; i <= ODM_RATEMCS15; i++) - status = (status & phydm_api_set_txagc(dm, power_index, (enum rf_path) dm_value[1], i, false)); + rpt &= phydm_api_set_txagc(dm, pow, path, i, 0); + } else if (dm->support_ic_type & ODM_RTL8198F) { + pow = (val[3] & 0x7f); + for (i = 0; i <= ODM_RATEVHTSS4MCS9; i++) + rpt &= phydm_api_set_txagc(dm, pow, path, i, 0); + } else if (dm->support_ic_type & + (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) { + pow = (val[3] & 0x7f); + for (i = 0; i <= ODM_RATEMCS15; i++) + rpt &= phydm_api_set_txagc(dm, pow, path, i, 0); + for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) + rpt &= phydm_api_set_txagc(dm, pow, path, i, 0); + } else if (dm->support_ic_type & + (ODM_RTL8721D)) { + pow = (val[3] & 0x3f); + for (i = 0; i <= ODM_RATEMCS7; i++) + rpt &= phydm_api_set_txagc(dm, pow, path, i, 0); } - if (status) - PDM_SNPF(out_len, used, output + used, - out_len - used, " %s%d %s%x\n", - "Write all TXAGC of path-", - dm_value[1], " = 0x", dm_value[3]); + if (rpt) + PDM_SNPF(out_len, used, output + used, out_len - used, + "Write all TXAGC of path-%d = 0x%x\n", + val[1], val[3]); else - PDM_SNPF(out_len, used, output + used, - out_len - used, " %s%d %s\n", - "Write all TXAGC of path-", - dm_value[1], " fail"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Write all TXAGC of path-%d fail\n", val[1]); } #endif @@ -1835,483 +3007,906 @@ phydm_set_txagc( *_out_len = out_len; } -void -phydm_debug_trace( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_shift_txagc(void *dm_void, u32 *const val, u32 *_used, char *output, + u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u64 pre_debug_components, one = 1; - u32 used = *_used; - u32 out_len = *_out_len; - u32 dm_value[10] = {0}; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + u8 i = 0; + u32 pow = 0; /*Power index*/ + boolean rpt = true; + u8 vht_start_rate = ODM_RATEVHTSS1MCS0; + enum rf_path path = RF_PATH_A; - u8 i; +#ifdef PHYDM_COMMON_API_SUPPORT + if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) + return; + + if (val[1] >= dm->num_rf_path) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "Write path-%d fail\n", val[1]); + return; + } + + path = (enum rf_path)val[1]; + + if ((u8)val[2] == 0) { + /*@{0:-, 1:+} {Pwr Offset}*/ + if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) { + for (i = 0; i <= ODM_RATEMCS7; i++) { + pow = phydm_api_get_txagc(dm, path, i) - val[3]; + rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); + } + for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) { + pow = phydm_api_get_txagc(dm, path, i) - val[3]; + rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); + } + } else if (dm->support_ic_type & (ODM_RTL8822B)) { + for (i = 0; i <= ODM_RATEMCS15; i++) { + pow = phydm_api_get_txagc(dm, path, i) - val[3]; + rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); + } + for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) { + pow = phydm_api_get_txagc(dm, path, i) - val[3]; + rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); + } + } else if (dm->support_ic_type & + (ODM_RTL8197F | ODM_RTL8192F)) { + for (i = 0; i <= ODM_RATEMCS15; i++) { + pow = phydm_api_get_txagc(dm, path, i) - val[3]; + rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); + } + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + rpt &= phydm_api_shift_txagc(dm, val[3], path, 0); + } else if (dm->support_ic_type & + (ODM_RTL8721D)) { + for (i = 0; i <= ODM_RATEMCS7; i++) { + pow = phydm_api_get_txagc(dm, path, i) - val[3]; + rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); + } + } + } else if ((u8)val[2] == 1) { + /*@{0:-, 1:+} {Pwr Offset}*/ + if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) { + for (i = 0; i <= ODM_RATEMCS7; i++) { + pow = phydm_api_get_txagc(dm, path, i) + val[3]; + rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); + } + for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) { + pow = phydm_api_get_txagc(dm, path, i) + val[3]; + rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); + } + } else if (dm->support_ic_type & (ODM_RTL8822B)) { + for (i = 0; i <= ODM_RATEMCS15; i++) { + pow = phydm_api_get_txagc(dm, path, i) + val[3]; + rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); + } + for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) { + pow = phydm_api_get_txagc(dm, path, i) + val[3]; + rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); + } + } else if (dm->support_ic_type & + (ODM_RTL8197F | ODM_RTL8192F)) { + for (i = 0; i <= ODM_RATEMCS15; i++) { + pow = phydm_api_get_txagc(dm, path, i) + val[3]; + rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); + } + } else if (dm->support_ic_type & ODM_RTL8721D) { + for (i = 0; i <= ODM_RATEMCS7; i++) { + pow = phydm_api_get_txagc(dm, path, i) + val[3]; + rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); + } + } else if (dm->support_ic_type & + (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) { + rpt &= phydm_api_shift_txagc(dm, val[3], path, 1); + } + } + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + PDM_SNPF(out_len, used, output + used, out_len - used, + "[All rate] Set Path-%d Pow_idx: %s %d\n", + val[1], (val[2] ? "+" : "-"), val[3]); + else + #endif + PDM_SNPF(out_len, used, output + used, out_len - used, + "[All rate] Set Path-%d Pow_idx: %s %d(%d.%s dB)\n", + val[1], (val[2] ? "+" : "-"), val[3], val[3] >> 1, + ((val[3] & 1) ? "5" : "0")); + +#endif + *_used = used; + *_out_len = out_len; +} + +void phydm_set_txagc_dbg(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + u32 var1[10] = {0}; + char help[] = "-h"; + u8 i = 0, input_idx = 0; for (i = 0; i < 5; i++) { if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &dm_value[i]); + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); + input_idx++; } } + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "{Dis:0, En:1} {pathA~D(0~3)} {rate_idx(Hex), All_rate:0xff} {txagc_idx (Hex)}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{Pwr Shift(All rate):2} {pathA~D(0~3)} {0:-, 1:+} {Pwr Offset(Hex)}\n"); + } else if (var1[0] == 0) { + dm->is_disable_phy_api = false; + PDM_SNPF(out_len, used, output + used, out_len - used, + "Disable API debug mode\n"); + } else if (var1[0] == 1) { + dm->is_disable_phy_api = false; + #ifdef CONFIG_TXAGC_DEBUG_8822C + config_phydm_write_txagc_8822c(dm, var1[3], + (enum rf_path)var1[1], + (u8)var1[2]); + #else + phydm_set_txagc(dm, (u32 *)var1, &used, output, &out_len); + #endif + dm->is_disable_phy_api = true; + } else if (var1[0] == 2) { + PHYDM_SSCANF(input[4], DCMD_HEX, &var1[3]); + dm->is_disable_phy_api = false; + phydm_shift_txagc(dm, (u32 *)var1, &used, output, &out_len); + dm->is_disable_phy_api = true; + } + #ifdef CONFIG_TXAGC_DEBUG_8822C + else if (var1[0] == 3) { + dm->is_disable_phy_api = false; + phydm_txagc_tab_buff_show_8822c(dm); + dm->is_disable_phy_api = true; + } else if (var1[0] == 4) { + dm->is_disable_phy_api = false; + config_phydm_set_txagc_to_hw_8822c(dm); + dm->is_disable_phy_api = true; + } + #endif + + *_used = used; + *_out_len = out_len; +} + +void phydm_debug_trace(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u64 pre_debug_components, one = 1; + u64 comp = 0; + u32 used = *_used; + u32 out_len = *_out_len; + u32 val[10] = {0}; + u8 i = 0; + + for (i = 0; i < 5; i++) { + if (input[i + 1]) + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]); + } + comp = dm->debug_components; pre_debug_components = dm->debug_components; - PDM_SNPF(out_len, used, output + used, out_len - used, "\n================================\n"); - if (dm_value[0] == 100) { - PDM_SNPF(out_len, used, output + used, out_len - used, "[DBG MSG] Component Selection\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, "================================\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, "00. (( %s ))DIG\n", - ((dm->debug_components & DBG_DIG) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "01. (( %s ))RA_MASK\n", - ((dm->debug_components & DBG_RA_MASK) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "02. (( %s ))DYN_TXPWR\n", - ((dm->debug_components & DBG_DYN_TXPWR) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "03. (( %s ))FA_CNT\n", - ((dm->debug_components & DBG_FA_CNT) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "04. (( %s ))RSSI_MNTR\n", - ((dm->debug_components & DBG_RSSI_MNTR) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "05. (( %s ))CCKPD\n", - ((dm->debug_components & DBG_CCKPD) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "06. (( %s ))ANT_DIV\n", - ((dm->debug_components & DBG_ANT_DIV) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "07. (( %s ))SMT_ANT\n", - ((dm->debug_components & DBG_SMT_ANT) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "08. (( %s ))PWR_TRAIN\n", - ((dm->debug_components & F08_PWR_TRAIN) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "09. (( %s ))RA\n", - ((dm->debug_components & DBG_RA) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "10. (( %s ))PATH_DIV\n", - ((dm->debug_components & DBG_PATH_DIV) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "11. (( %s ))DFS\n", - ((dm->debug_components & DBG_DFS) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "12. (( %s ))DYN_ARFR\n", - ((dm->debug_components & DBG_DYN_ARFR) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "13. (( %s ))ADAPTIVITY\n", - ((dm->debug_components & DBG_ADPTVTY) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "14. (( %s ))CFO_TRK\n", - ((dm->debug_components & DBG_CFO_TRK) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "15. (( %s ))ENV_MNTR\n", - ((dm->debug_components & DBG_ENV_MNTR) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "16. (( %s ))PRI_CCA\n", - ((dm->debug_components & DBG_PRI_CCA) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "17. (( %s ))ADPTV_SOML\n", - ((dm->debug_components & DBG_ADPTV_SOML) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "18. (( %s ))LNA_SAT_CHK\n", - ((dm->debug_components & DBG_LNA_SAT_CHK) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "19. (( %s ))DRP\n", - ((dm->debug_components & DBG_DYN_RX_PATH) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "20. (( %s ))PHY_STATUS\n", - ((dm->debug_components & DBG_PHY_STATUS) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "21. (( %s ))TMP\n", - ((dm->debug_components & DBG_TMP) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "22. (( %s ))FW_DBG_TRACE\n", - ((dm->debug_components & DBG_FW_TRACE) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "23. (( %s ))TXBF\n", - ((dm->debug_components & DBG_TXBF) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "24. (( %s ))COMMON_FLOW\n", - ((dm->debug_components & DBG_COMMON_FLOW) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "25. (( %s ))TX_PWR_TRK\n", - ((dm->debug_components & ODM_COMP_TX_PWR_TRACK) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "26. (( %s ))CALIBRATION\n", - ((dm->debug_components & ODM_COMP_CALIBRATION) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "27. (( %s ))MP\n", - ((dm->debug_components & ODM_COMP_MP) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "28. (( %s ))PHY_CONFIG\n", - ((dm->debug_components & ODM_PHY_CONFIG) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "29. (( %s ))INIT\n", - ((dm->debug_components & ODM_COMP_INIT) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "30. (( %s ))COMMON\n", - ((dm->debug_components & ODM_COMP_COMMON) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "31. (( %s ))API\n", - ((dm->debug_components & ODM_COMP_API) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, out_len - used, "================================\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\n================================\n"); + if (val[0] == 100) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[DBG MSG] Component Selection\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "================================\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "00. (( %s ))DIG\n", + ((comp & DBG_DIG) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "01. (( %s ))RA_MASK\n", + ((comp & DBG_RA_MASK) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "02. (( %s ))DYN_TXPWR\n", + ((comp & DBG_DYN_TXPWR) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "03. (( %s ))FA_CNT\n", + ((comp & DBG_FA_CNT) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "04. (( %s ))RSSI_MNTR\n", + ((comp & DBG_RSSI_MNTR) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "05. (( %s ))CCKPD\n", + ((comp & DBG_CCKPD) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "06. (( %s ))ANT_DIV\n", + ((comp & DBG_ANT_DIV) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "07. (( %s ))SMT_ANT\n", + ((comp & DBG_SMT_ANT) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "08. (( %s ))PWR_TRAIN\n", + ((comp & DBG_PWR_TRAIN) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "09. (( %s ))RA\n", + ((comp & DBG_RA) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "10. (( %s ))PATH_DIV\n", + ((comp & DBG_PATH_DIV) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "11. (( %s ))DFS\n", + ((comp & DBG_DFS) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "12. (( %s ))DYN_ARFR\n", + ((comp & DBG_DYN_ARFR) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "13. (( %s ))ADAPTIVITY\n", + ((comp & DBG_ADPTVTY) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "14. (( %s ))CFO_TRK\n", + ((comp & DBG_CFO_TRK) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "15. (( %s ))ENV_MNTR\n", + ((comp & DBG_ENV_MNTR) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "16. (( %s ))PRI_CCA\n", + ((comp & DBG_PRI_CCA) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "17. (( %s ))ADPTV_SOML\n", + ((comp & DBG_ADPTV_SOML) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "18. (( %s ))LNA_SAT_CHK\n", + ((comp & DBG_LNA_SAT_CHK) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "20. (( %s ))PHY_STATUS\n", + ((comp & DBG_PHY_STATUS) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "21. (( %s ))TMP\n", + ((comp & DBG_TMP) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "22. (( %s ))FW_DBG_TRACE\n", + ((comp & DBG_FW_TRACE) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "23. (( %s ))TXBF\n", + ((comp & DBG_TXBF) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "24. (( %s ))COMMON_FLOW\n", + ((comp & DBG_COMMON_FLOW) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "28. (( %s ))PHY_CONFIG\n", + ((comp & ODM_PHY_CONFIG) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "29. (( %s ))INIT\n", + ((comp & ODM_COMP_INIT) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "30. (( %s ))COMMON\n", + ((comp & DBG_CMN) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "31. (( %s ))API\n", + ((comp & ODM_COMP_API) ? ("V") : ("."))); + PDM_SNPF(out_len, used, output + used, out_len - used, + "================================\n"); - } else if (dm_value[0] == 101) { + } else if (val[0] == 101) { dm->debug_components = 0; - PDM_SNPF(out_len, used, output + used, out_len - used, "Disable all debug components\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "Disable all debug components\n"); } else { - if (dm_value[1] == 1) /*enable*/ - dm->debug_components |= (one << dm_value[0]); - else if (dm_value[1] == 2) /*disable*/ - dm->debug_components &= ~(one << dm_value[0]); + if (val[1] == 1) /*@enable*/ + dm->debug_components |= (one << val[0]); + else if (val[1] == 2) /*@disable*/ + dm->debug_components &= ~(one << val[0]); else - PDM_SNPF(out_len, used, output + used, out_len - used, "[Warning] 1:on, 2:off\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Warning] 1:on, 2:off\n"); - if ((BIT(dm_value[0]) == DBG_PHY_STATUS) && (dm_value[1] == 1)) { + if ((BIT(val[0]) == DBG_PHY_STATUS) && val[1] == 1) { + dm->phy_dbg_info.show_phy_sts_all_pkt = (u8)val[2]; + dm->phy_dbg_info.show_phy_sts_max_cnt = (u16)val[3]; - dm->phy_dbg_info.show_phy_sts_all_pkt = (u8)dm_value[2]; - dm->phy_dbg_info.show_phy_sts_max_cnt = (u16)dm_value[3]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "show_all_pkt=%d, show_max_num=%d\n\n", + dm->phy_dbg_info.show_phy_sts_all_pkt, + dm->phy_dbg_info.show_phy_sts_max_cnt); - PDM_SNPF(out_len, used, output + used, out_len - used, "show_phy_sts_all_pkt=%d, show_phy_sts_max=%d\n\n", - dm->phy_dbg_info.show_phy_sts_all_pkt, - dm->phy_dbg_info.show_phy_sts_max_cnt); - - } else if ((BIT(dm_value[0]) == ODM_COMP_COMMON) && (dm_value[1] == 1)) { - dm->cmn_dbg_msg_period = (u8)dm_value[2]; + } else if ((BIT(val[0]) == DBG_CMN) && (val[1] == 1)) { + dm->cmn_dbg_msg_period = (u8)val[2]; if (dm->cmn_dbg_msg_period < PHYDM_WATCH_DOG_PERIOD) dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD; - PDM_SNPF(out_len, used, output + used, out_len - used, "cmn_dbg_msg_period=%d\n", - dm->cmn_dbg_msg_period); + PDM_SNPF(out_len, used, output + used, out_len - used, + "cmn_dbg_msg_period=%d\n", + dm->cmn_dbg_msg_period); } } PDM_SNPF(out_len, used, output + used, out_len - used, - "pre-DbgComponents = 0x%llx\n", pre_debug_components); + "pre-DbgComponents = 0x%llx\n", pre_debug_components); PDM_SNPF(out_len, used, output + used, out_len - used, - "Curr-DbgComponents = 0x%llx\n", dm->debug_components); - PDM_SNPF(out_len, used, output + used, out_len - used, "================================\n"); + "Curr-DbgComponents = 0x%llx\n", dm->debug_components); + PDM_SNPF(out_len, used, output + used, out_len - used, + "================================\n"); *_used = used; *_out_len = out_len; } -void -phydm_fw_debug_trace( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_fw_debug_trace(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 pre_fw_debug_components, one = 1; - u32 used = *_used; - u32 out_len = *_out_len; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + u32 val[10] = {0}; + u8 i, input_idx = 0; + char help[] = "-h"; + u32 pre_fw_debug_components = 0, one = 1; + u32 comp = 0; + + for (i = 0; i < 5; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]); + input_idx++; + } + } + + if (input_idx == 0) + return; pre_fw_debug_components = dm->fw_debug_components; + comp = dm->fw_debug_components; - PDM_SNPF(out_len, used, output + used, out_len - used, "\n%s\n", - "================================"); - if (dm_value[0] == 100) { + if ((strcmp(input[1], help) == 0)) { PDM_SNPF(out_len, used, output + used, out_len - used, - "%s\n", "[FW Debug Component]"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "%s\n", "================================"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "00. (( %s ))RA\n", - ((dm->fw_debug_components & PHYDM_FW_COMP_RA) ? ("V") : ("."))); - - if (dm->support_ic_type & PHYDM_IC_3081_SERIES) { - PDM_SNPF(out_len, used, output + used, - out_len - used, "01. (( %s ))MU\n", - ((dm->fw_debug_components & PHYDM_FW_COMP_MU) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, - out_len - used, - "02. (( %s ))path Div\n", - ((dm->fw_debug_components & PHYDM_FW_COMP_PATH_DIV) ? ("V") : ("."))); - PDM_SNPF(out_len, used, output + used, - out_len - used, - "03. (( %s ))Power training\n", - ((dm->fw_debug_components & PHYDM_FW_COMP_PT) ? ("V") : ("."))); - } - PDM_SNPF(out_len, used, output + used, out_len - used, - "%s\n", "================================"); - + "{dbg_comp} {1:en, 2:dis} {mode} {macid}\n"); } else { - if (dm_value[0] == 101) { + if (val[0] == 101) { dm->fw_debug_components = 0; - PDM_SNPF(out_len, used, output + used, - out_len - used, "%s\n", - "Clear all fw debug components"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "%s\n", "Clear all fw debug components"); } else { - if (dm_value[1] == 1) /*enable*/ - dm->fw_debug_components |= (one << dm_value[0]); - else if (dm_value[1] == 2) /*disable*/ - dm->fw_debug_components &= ~(one << dm_value[0]); + if (val[1] == 1) /*@enable*/ + dm->fw_debug_components |= (one << val[0]); + else if (val[1] == 2) /*@disable*/ + dm->fw_debug_components &= ~(one << val[0]); else PDM_SNPF(out_len, used, output + used, - out_len - used, "%s\n", - "[Warning!!!] 1:enable, 2:disable"); + out_len - used, "%s\n", + "[Warning!!!] 1:enable, 2:disable"); } - if (dm->fw_debug_components == 0) { + comp = dm->fw_debug_components; + + if (comp == 0) { dm->debug_components &= ~DBG_FW_TRACE; - phydm_fw_trace_en_h2c(dm, false, dm->fw_debug_components, dm_value[2], dm_value[3]); /*H2C to enable C2H Msg*/ + /*@H2C to enable C2H Msg*/ + phydm_fw_trace_en_h2c(dm, false, comp, val[2], val[3]); } else { dm->debug_components |= DBG_FW_TRACE; - phydm_fw_trace_en_h2c(dm, true, dm->fw_debug_components, dm_value[2], dm_value[3]); /*H2C to enable C2H Msg*/ + /*@H2C to enable C2H Msg*/ + phydm_fw_trace_en_h2c(dm, true, comp, val[2], val[3]); } } } -void -phydm_dump_bb_reg( - void *dm_void, - u32 *_used, - char *output, - u32 *_out_len -) +#if (ODM_IC_11N_SERIES_SUPPORT) +void phydm_dump_bb_reg_n(void *dm_void, u32 *_used, char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 addr = 0; - u32 used = *_used; - u32 out_len = *_out_len; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 addr = 0; + u32 used = *_used; + u32 out_len = *_out_len; - - /* BB Reg, For Nseries IC we only need to dump page8 to pageF using 3 digits*/ + /*@For Nseries IC we only need to dump page8 to pageF using 3 digits*/ for (addr = 0x800; addr < 0xfff; addr += 4) { - if (dm->support_ic_type & ODM_IC_11N_SERIES) - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, - out_len - used, - "0x%03x 0x%08x\n", addr, - odm_get_bb_reg(dm, addr, MASKDWORD)); - else - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, - out_len - used, - "0x%04x 0x%08x\n", addr, - odm_get_bb_reg(dm, addr, MASKDWORD)); - } - - if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8814A | ODM_RTL8821C)) { - if (dm->rf_type > RF_2T2R) { - for (addr = 0x1800; addr < 0x18ff; addr += 4) - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, - out_len - used, - "0x%04x 0x%08x\n", - addr, - odm_get_bb_reg(dm, addr, MASKDWORD)); - } - - if (dm->rf_type > RF_3T3R) { - for (addr = 0x1a00; addr < 0x1aff; addr += 4) - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, - out_len - used, - "0x%04x 0x%08x\n", - addr, - odm_get_bb_reg(dm, addr, MASKDWORD)); - } - - for (addr = 0x1900; addr < 0x19ff; addr += 4) - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, - out_len - used, - "0x%04x 0x%08x\n", addr, - odm_get_bb_reg(dm, addr, MASKDWORD)); - - for (addr = 0x1c00; addr < 0x1cff; addr += 4) - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, - out_len - used, - "0x%04x 0x%08x\n", addr, - odm_get_bb_reg(dm, addr, MASKDWORD)); - - for (addr = 0x1f00; addr < 0x1fff; addr += 4) - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, - out_len - used, - "0x%04x 0x%08x\n", addr, - odm_get_bb_reg(dm, addr, MASKDWORD)); + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "0x%03x 0x%08x\n", + addr, odm_get_bb_reg(dm, addr, MASKDWORD)); } *_used = used; *_out_len = out_len; } +#endif -void -phydm_dump_all_reg( - void *dm_void, - u32 *_used, - char *output, - u32 *_out_len -) +#if (ODM_IC_11AC_SERIES_SUPPORT) +void phydm_dump_bb_reg_ac(void *dm_void, u32 *_used, char *output, + u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 addr = 0; - u32 used = *_used; - u32 out_len = *_out_len; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 addr = 0; + u32 used = *_used; + u32 out_len = *_out_len; - /* dump MAC register */ - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, out_len - used, - "MAC==========\n"); - for (addr = 0; addr < 0x7ff; addr += 4) - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, out_len - used, "0x%04x 0x%08x\n", - addr, - odm_get_bb_reg(dm, addr, MASKDWORD)); - - for (addr = 0x1000; addr < 0x17ff; addr += 4) - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, out_len - used, "0x%04x 0x%08x\n", - addr, - odm_get_bb_reg(dm, addr, MASKDWORD)); - - /* dump BB register */ - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, out_len - used, - "BB==========\n"); - phydm_dump_bb_reg(dm, &used, output, &out_len); - - /* dump RF register */ - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, out_len - used, - "RF-A==========\n"); - for (addr = 0; addr < 0xFF; addr++) - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, out_len - used, "0x%02x 0x%05x\n", - addr, - odm_get_rf_reg(dm, RF_PATH_A, addr, RFREGOFFSETMASK)); - - if (dm->rf_type > RF_1T1R) { - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, out_len - used, "RF-B==========\n"); - for (addr = 0; addr < 0xFF; addr++) - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, out_len - used, - "0x%02x 0x%05x\n", addr, - odm_get_rf_reg(dm, RF_PATH_B, addr, RFREGOFFSETMASK)); + for (addr = 0x800; addr < 0xfff; addr += 4) { + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "0x%04x 0x%08x\n", + addr, odm_get_bb_reg(dm, addr, MASKDWORD)); } + if (!(dm->support_ic_type & + (ODM_RTL8822B | ODM_RTL8814A | ODM_RTL8821C))) + goto rpt_reg; + if (dm->rf_type > RF_2T2R) { - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, out_len - used, "RF-C==========\n"); - for (addr = 0; addr < 0xFF; addr++) - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, out_len - used, - "0x%02x 0x%05x\n", addr, - odm_get_rf_reg(dm, RF_PATH_C, addr, RFREGOFFSETMASK)); + for (addr = 0x1800; addr < 0x18ff; addr += 4) + PDM_VAST_SNPF(out_len, used, output + used, + out_len - used, "0x%04x 0x%08x\n", + addr, + odm_get_bb_reg(dm, addr, MASKDWORD)); } if (dm->rf_type > RF_3T3R) { - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, out_len - used, "RF-D==========\n"); - for (addr = 0; addr < 0xFF; addr++) - PHYDM_VAST_INFO_SNPRINTF(out_len, used, output + used, out_len - used, - "0x%02x 0x%05x\n", addr, - odm_get_rf_reg(dm, RF_PATH_D, addr, RFREGOFFSETMASK)); + for (addr = 0x1a00; addr < 0x1aff; addr += 4) + PDM_VAST_SNPF(out_len, used, output + used, + out_len - used, "0x%04x 0x%08x\n", + addr, + odm_get_bb_reg(dm, addr, MASKDWORD)); + } + + for (addr = 0x1900; addr < 0x19ff; addr += 4) + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "0x%04x 0x%08x\n", + addr, odm_get_bb_reg(dm, addr, MASKDWORD)); + + for (addr = 0x1c00; addr < 0x1cff; addr += 4) + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "0x%04x 0x%08x\n", + addr, odm_get_bb_reg(dm, addr, MASKDWORD)); + + for (addr = 0x1f00; addr < 0x1fff; addr += 4) + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "0x%04x 0x%08x\n", + addr, odm_get_bb_reg(dm, addr, MASKDWORD)); + +rpt_reg: + + *_used = used; + *_out_len = out_len; +} + +#endif + +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT +void phydm_dump_bb_reg_jgr3(void *dm_void, u32 *_used, char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 addr = 0; + u32 used = *_used; + u32 out_len = *_out_len; + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + for (addr = 0x800; addr < 0xdff; addr += 4) + PDM_VAST_SNPF(out_len, used, output + used, + out_len - used, "0x%04x 0x%08x\n", addr, + odm_get_bb_reg(dm, addr, MASKDWORD)); + + for (addr = 0x1800; addr < 0x1aff; addr += 4) + PDM_VAST_SNPF(out_len, used, output + used, + out_len - used, "0x%04x 0x%08x\n", addr, + odm_get_bb_reg(dm, addr, MASKDWORD)); + + for (addr = 0x1c00; addr < 0x1eff; addr += 4) + PDM_VAST_SNPF(out_len, used, output + used, + out_len - used, "0x%04x 0x%08x\n", addr, + odm_get_bb_reg(dm, addr, MASKDWORD)); + + for (addr = 0x4000; addr < 0x41ff; addr += 4) + PDM_VAST_SNPF(out_len, used, output + used, + out_len - used, "0x%04x 0x%08x\n", addr, + odm_get_bb_reg(dm, addr, MASKDWORD)); + } + *_used = used; + *_out_len = out_len; +} + +void phydm_dump_bb_reg2_jgr3(void *dm_void, u32 *_used, char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 addr = 0; + u32 used = *_used; + u32 out_len = *_out_len; + + if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) + return; + + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { + for (addr = 0x5000; addr < 0x53ff; addr += 4) { + PDM_VAST_SNPF(out_len, used, output + used, + out_len - used, "0x%04x 0x%08x\n", + addr, + odm_get_bb_reg(dm, addr, MASKDWORD)); + } + } + #endif + /* @Do not change the order of page-2C/2D*/ + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "------ BB report-register start ------\n"); + for (addr = 0x2c00; addr < 0x2dff; addr += 4) { + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "0x%04x 0x%08x\n", + addr, odm_get_bb_reg(dm, addr, MASKDWORD)); } *_used = used; *_out_len = out_len; } -void -phydm_enable_big_jump( - struct dm_struct *dm, - boolean state -) +void phydm_get_per_path_anapar_jgr3(void *dm_void, u8 path, u32 *_used, + char *output, u32 *_out_len) { -#if (RTL8822B_SUPPORT == 1) - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 state = 0; + u8 state_bp = 0; + u32 control_bb = 0; + u32 control_pow = 0; + u32 used = *_used; + u32 out_len = *_out_len; + u32 reg_idx = 0; + u32 dbgport_idx = 0; + u32 dbgport_val = 0; - if (state == false) { + PDM_SNPF(out_len, used, output + used, out_len - used, "path-%d:\n", + path); + + if (path == RF_PATH_A) { + reg_idx = R_0x1830; + dbgport_idx = 0x9F0; + } else if (path == RF_PATH_B) { + reg_idx = R_0x4130; + dbgport_idx = 0xBF0; + } else if (path == RF_PATH_C) { + reg_idx = R_0x5230; + dbgport_idx = 0xDF0; + } else if (path == RF_PATH_D) { + reg_idx = R_0x5330; + dbgport_idx = 0xFF0; + } + + state_bp = (u8)odm_get_bb_reg(dm, reg_idx, 0xf00000); + odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x5); /* @read en*/ + + for (state = 0; state <= 0xf; state++) { + odm_set_bb_reg(dm, reg_idx, 0xF00000, state); + if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbgport_idx)) { + dbgport_val = phydm_get_bb_dbg_port_val(dm); + phydm_release_bb_dbg_port(dm); + } else { + PDM_SNPF(out_len, used, output + used, out_len - used, + "state:0x%x = read dbg_port error!\n", state); + } + control_bb = (dbgport_val & 0xFFFF0) >> 4; + control_pow = dbgport_val & 0xF; + PDM_SNPF(out_len, used, output + used, out_len - used, + "state:0x%x = control_bb:0x%x pow_bb:0x%x\n", + state, control_bb, control_pow); + } + odm_set_bb_reg(dm, reg_idx, 0xf00000, state_bp); + odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x6); /* @write en*/ + + *_used = used; + *_out_len = out_len; +} + +#endif + +void phydm_dump_bb_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "BB==========\n"); + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "------ BB control register start ------\n"); + + switch (dm->ic_ip_series) { + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + case PHYDM_IC_JGR3: + phydm_dump_bb_reg_jgr3(dm, &used, output, &out_len); + break; + #endif + + #if (ODM_IC_11AC_SERIES_SUPPORT == 1) + case PHYDM_IC_AC: + phydm_dump_bb_reg_ac(dm, &used, output, &out_len); + break; + #endif + + #if (ODM_IC_11N_SERIES_SUPPORT == 1) + case PHYDM_IC_N: + phydm_dump_bb_reg_n(dm, &used, output, &out_len); + break; + #endif + + default: + break; + } + + *_used = used; + *_out_len = out_len; +} + +void phydm_dump_rf_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 addr = 0; + u32 used = *_used; + u32 out_len = *_out_len; + u32 reg = 0; + + /* @dump RF register */ + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "RF-A==========\n"); + + for (addr = 0; addr <= 0xFF; addr++) { + reg = odm_get_rf_reg(dm, RF_PATH_A, addr, RFREG_MASK); + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "0x%02x 0x%05x\n", addr, reg); + } + +#ifdef PHYDM_COMPILE_ABOVE_2SS + if (dm->rf_type > RF_1T1R) { + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "RF-B==========\n"); + + for (addr = 0; addr <= 0xFF; addr++) { + reg = odm_get_rf_reg(dm, RF_PATH_B, addr, RFREG_MASK); + PDM_VAST_SNPF(out_len, used, output + used, + out_len - used, "0x%02x 0x%05x\n", + addr, reg); + } + } +#endif + +#ifdef PHYDM_COMPILE_ABOVE_3SS + if (dm->rf_type > RF_2T2R) { + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "RF-C==========\n"); + + for (addr = 0; addr <= 0xFF; addr++) { + reg = odm_get_rf_reg(dm, RF_PATH_C, addr, RFREG_MASK); + PDM_VAST_SNPF(out_len, used, output + used, + out_len - used, "0x%02x 0x%05x\n", + addr, reg); + } + } +#endif + +#ifdef PHYDM_COMPILE_ABOVE_4SS + if (dm->rf_type > RF_3T3R) { + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "RF-D==========\n"); + + for (addr = 0; addr <= 0xFF; addr++) { + reg = odm_get_rf_reg(dm, RF_PATH_D, addr, RFREG_MASK); + PDM_VAST_SNPF(out_len, used, output + used, + out_len - used, "0x%02x 0x%05x\n", + addr, reg); + } + } +#endif + + *_used = used; + *_out_len = out_len; +} + +void phydm_dump_mac_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 addr = 0; + u32 used = *_used; + u32 out_len = *_out_len; + + /* @dump MAC register */ + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "MAC==========\n"); + + for (addr = 0; addr < 0x7ff; addr += 4) + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "0x%04x 0x%08x\n", + addr, odm_get_bb_reg(dm, addr, MASKDWORD)); + + for (addr = 0x1000; addr < 0x17ff; addr += 4) + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "0x%04x 0x%08x\n", + addr, odm_get_bb_reg(dm, addr, MASKDWORD)); + + *_used = used; + *_out_len = out_len; +} + +void phydm_dump_reg(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + u32 addr = 0; + + if (input[1]) + PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); + + if ((strcmp(input[1], help) == 0)) { + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + PDM_SNPF(out_len, used, output + used, out_len - used, + "dumpreg {0:all, 1:BB, 2:RF, 3:MAC 4:BB2 for jgr3}\n"); + else + #endif + PDM_SNPF(out_len, used, output + used, out_len - used, + "dumpreg {0:all, 1:BB, 2:RF, 3:MAC}\n"); + } else if (var1[0] == 0) { + phydm_dump_mac_reg(dm, &used, output, &out_len); + phydm_dump_bb_reg(dm, &used, output, &out_len); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->ic_ip_series == PHYDM_IC_JGR3) + phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len); + #endif + + phydm_dump_rf_reg(dm, &used, output, &out_len); + } else if (var1[0] == 1) { + phydm_dump_bb_reg(dm, &used, output, &out_len); + } else if (var1[0] == 2) { + phydm_dump_rf_reg(dm, &used, output, &out_len); + } else if (var1[0] == 3) { + phydm_dump_mac_reg(dm, &used, output, &out_len); + } else if (var1[0] == 4) { + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->ic_ip_series == PHYDM_IC_JGR3) + phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len); + #endif + } + + *_used = used; + *_out_len = out_len; +} + +void phydm_enable_big_jump(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ +#if (RTL8822B_SUPPORT) + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + u32 dm_value[10] = {0}; + u8 i, input_idx = 0; + u32 val; + + if (!(dm->support_ic_type & ODM_RTL8822B)) + return; + + for (i = 0; i < 5; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]); + input_idx++; + } + } + + if (input_idx == 0) + return; + + if (dm_value[0] == 0) { dm->dm_dig_table.enable_adjust_big_jump = false; - odm_set_bb_reg(dm, 0x8c8, 0xfe, ((dig_t->big_jump_step3 << 5) | (dig_t->big_jump_step2 << 3) | dig_t->big_jump_step1)); - } else + + val = (dig_t->big_jump_step3 << 5) | + (dig_t->big_jump_step2 << 3) | + dig_t->big_jump_step1; + + odm_set_bb_reg(dm, R_0x8c8, 0xfe, val); + } else { dm->dm_dig_table.enable_adjust_big_jump = true; + } #endif } -#if (RTL8822B_SUPPORT == 1 | RTL8821C_SUPPORT == 1 | RTL8814B_SUPPORT == 1) - -void -phydm_show_rx_rate( - struct dm_struct *dm, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_show_rx_rate(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - u32 used = *_used; - u32 out_len = *_out_len; +#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8814B_SUPPORT ||\ + RTL8195B_SUPPORT || RTL8822C_SUPPORT) + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; + u32 used = *_used; + u32 out_len = *_out_len; + u32 var1[10] = {0}; + char help[] = "-h"; + u8 i, input_idx = 0; - PDM_SNPF(out_len, used, output + used, out_len - used, - "=====Rx SU rate Statistics=====\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "1SS MCS0 = %d, 1SS MCS1 = %d, 1SS MCS2 = %d, 1SS MCS 3 = %d\n", - dm->phy_dbg_info.num_qry_vht_pkt[0], - dm->phy_dbg_info.num_qry_vht_pkt[1], - dm->phy_dbg_info.num_qry_vht_pkt[2], - dm->phy_dbg_info.num_qry_vht_pkt[3]); - PDM_SNPF(out_len, used, output + used, out_len - used, - "1SS MCS4 = %d, 1SS MCS5 = %d, 1SS MCS6 = %d, 1SS MCS 7 = %d\n", - dm->phy_dbg_info.num_qry_vht_pkt[4], - dm->phy_dbg_info.num_qry_vht_pkt[5], - dm->phy_dbg_info.num_qry_vht_pkt[6], - dm->phy_dbg_info.num_qry_vht_pkt[7]); - PDM_SNPF(out_len, used, output + used, out_len - used, - "1SS MCS8 = %d, 1SS MCS9 = %d\n", - dm->phy_dbg_info.num_qry_vht_pkt[8], - dm->phy_dbg_info.num_qry_vht_pkt[9]); - -#if (defined(PHYDM_COMPILE_ABOVE_2SS)) - if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) { - PDM_SNPF(out_len, used, output + used, out_len - used, - "2SS MCS0 = %d, 2SS MCS1 = %d, 2SS MCS2 = %d, 2SS MCS 3 = %d\n", - dm->phy_dbg_info.num_qry_vht_pkt[10], - dm->phy_dbg_info.num_qry_vht_pkt[11], - dm->phy_dbg_info.num_qry_vht_pkt[12], - dm->phy_dbg_info.num_qry_vht_pkt[13]); - PDM_SNPF(out_len, used, output + used, out_len - used, - "2SS MCS4 = %d, 2SS MCS5 = %d, 2SS MCS6 = %d, 2SS MCS 7 = %d\n", - dm->phy_dbg_info.num_qry_vht_pkt[14], - dm->phy_dbg_info.num_qry_vht_pkt[15], - dm->phy_dbg_info.num_qry_vht_pkt[16], - dm->phy_dbg_info.num_qry_vht_pkt[17]); - PDM_SNPF(out_len, used, output + used, out_len - used, - "2SS MCS8 = %d, 2SS MCS9 = %d\n", - dm->phy_dbg_info.num_qry_vht_pkt[18], - dm->phy_dbg_info.num_qry_vht_pkt[19]); + for (i = 0; i < 5; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); + input_idx++; + } } -#endif - PDM_SNPF(out_len, used, output + used, out_len - used, - "=====Rx MU rate Statistics=====\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "1SS MCS0 = %d, 1SS MCS1 = %d, 1SS MCS2 = %d, 1SS MCS 3 = %d\n", - dm->phy_dbg_info.num_qry_mu_vht_pkt[0], - dm->phy_dbg_info.num_qry_mu_vht_pkt[1], - dm->phy_dbg_info.num_qry_mu_vht_pkt[2], - dm->phy_dbg_info.num_qry_mu_vht_pkt[3]); - PDM_SNPF(out_len, used, output + used, out_len - used, - "1SS MCS4 = %d, 1SS MCS5 = %d, 1SS MCS6 = %d, 1SS MCS 7 = %d\n", - dm->phy_dbg_info.num_qry_mu_vht_pkt[4], - dm->phy_dbg_info.num_qry_mu_vht_pkt[5], - dm->phy_dbg_info.num_qry_mu_vht_pkt[6], - dm->phy_dbg_info.num_qry_mu_vht_pkt[7]); - PDM_SNPF(out_len, used, output + used, out_len - used, - "1SS MCS8 = %d, 1SS MCS9 = %d\n", - dm->phy_dbg_info.num_qry_mu_vht_pkt[8], - dm->phy_dbg_info.num_qry_mu_vht_pkt[9]); - -#if (defined(PHYDM_COMPILE_ABOVE_2SS)) - if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) { + if (input_idx == 0) + return; + + if ((strcmp(input[1], help) == 0)) { PDM_SNPF(out_len, used, output + used, out_len - used, - "2SS MCS0 = %d, 2SS MCS1 = %d, 2SS MCS2 = %d, 2SS MCS 3 = %d\n", - dm->phy_dbg_info.num_qry_mu_vht_pkt[10], - dm->phy_dbg_info.num_qry_mu_vht_pkt[11], - dm->phy_dbg_info.num_qry_mu_vht_pkt[12], - dm->phy_dbg_info.num_qry_mu_vht_pkt[13]); - PDM_SNPF(out_len, used, output + used, out_len - used, - "2SS MCS4 = %d, 2SS MCS5 = %d, 2SS MCS6 = %d, 2SS MCS 7 = %d\n", - dm->phy_dbg_info.num_qry_mu_vht_pkt[14], - dm->phy_dbg_info.num_qry_mu_vht_pkt[15], - dm->phy_dbg_info.num_qry_mu_vht_pkt[16], - dm->phy_dbg_info.num_qry_mu_vht_pkt[17]); - PDM_SNPF(out_len, used, output + used, out_len - used, - "2SS MCS8 = %d, 2SS MCS9 = %d\n", - dm->phy_dbg_info.num_qry_mu_vht_pkt[18], - dm->phy_dbg_info.num_qry_mu_vht_pkt[19]); + "{1: show Rx rate, 0:reset counter}\n"); + *_used = used; + *_out_len = out_len; + return; + + } else if (var1[0] == 0) { + phydm_reset_rx_rate_distribution(dm); + *_used = used; + *_out_len = out_len; + return; } -#endif + /* @==Show SU Rate====================================================*/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "=====Rx SU rate Statistics=====\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[SU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n", + dbg->num_qry_vht_pkt[0], dbg->num_qry_vht_pkt[1], + dbg->num_qry_vht_pkt[2], dbg->num_qry_vht_pkt[3], + dbg->num_qry_vht_pkt[4], dbg->num_qry_vht_pkt[5], + dbg->num_qry_vht_pkt[6], dbg->num_qry_vht_pkt[7], + dbg->num_qry_vht_pkt[8], dbg->num_qry_vht_pkt[9]); + + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[SU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n", + dbg->num_qry_vht_pkt[10], dbg->num_qry_vht_pkt[11], + dbg->num_qry_vht_pkt[12], dbg->num_qry_vht_pkt[13], + dbg->num_qry_vht_pkt[14], dbg->num_qry_vht_pkt[15], + dbg->num_qry_vht_pkt[16], dbg->num_qry_vht_pkt[17], + dbg->num_qry_vht_pkt[18], dbg->num_qry_vht_pkt[19]); + } + #endif + /* @==Show MU Rate====================================================*/ +#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) || (defined(PHYSTS_3RD_TYPE_SUPPORT)) + PDM_SNPF(out_len, used, output + used, out_len - used, + "=====Rx MU rate Statistics=====\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[MU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n", + dbg->num_mu_vht_pkt[0], dbg->num_mu_vht_pkt[1], + dbg->num_mu_vht_pkt[2], dbg->num_mu_vht_pkt[3], + dbg->num_mu_vht_pkt[4], dbg->num_mu_vht_pkt[5], + dbg->num_mu_vht_pkt[6], dbg->num_mu_vht_pkt[7], + dbg->num_mu_vht_pkt[8], dbg->num_mu_vht_pkt[9]); + + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[MU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n", + dbg->num_mu_vht_pkt[10], dbg->num_mu_vht_pkt[11], + dbg->num_mu_vht_pkt[12], dbg->num_mu_vht_pkt[13], + dbg->num_mu_vht_pkt[14], dbg->num_mu_vht_pkt[15], + dbg->num_mu_vht_pkt[16], dbg->num_mu_vht_pkt[17], + dbg->num_mu_vht_pkt[18], dbg->num_mu_vht_pkt[19]); + } + #endif +#endif *_used = used; *_out_len = out_len; +#endif } -#endif - -void -phydm_per_tone_evm( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +void phydm_per_tone_evm(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i, j; - u32 used = *_used; - u32 out_len = *_out_len; - u32 var1[4] = {0}; - u32 value32, tone_num, round; - s8 rxevm_0, rxevm_1; - s32 avg_num, evm_tone_0[256] = {0}, evm_tone_1[256] = {0}; - s32 rxevm_sum_0, rxevm_sum_1; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i, j; + u32 used = *_used; + u32 out_len = *_out_len; + u32 var1[4] = {0}; + u32 val, tone_num, round; + s8 rxevm_0, rxevm_1; + s32 avg_num, evm_tone_0[256] = {0}, evm_tone_1[256] = {0}; + s32 rxevm_sum_0, rxevm_sum_1; if (dm->support_ic_type & ODM_IC_11N_SERIES) { pr_debug("n series not support yet !\n"); @@ -2322,32 +3917,42 @@ phydm_per_tone_evm( if (input[i + 1]) PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); } + avg_num = var1[0]; round = var1[1]; - if (dm->is_linked) { - pr_debug("ID=((%d)), BW=((%d)), fc=((CH-%d))\n", dm->curr_station_id, - 20<<*dm->band_width, *dm->channel); - pr_debug("avg_num =((%d)), round =((%d))\n", avg_num, round); - #if (DM_ODM_SUPPORT_TYPE & ODM_AP) - watchdog_stop(dm->priv); - #endif - for (j = 0; j < round; j++) { - pr_debug("\nround((%d))\n", (j + 1)); + if (!dm->is_linked) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "No Link !!\n"); + + *_used = used; + *_out_len = out_len; + + return; + } + + pr_debug("ID=((%d)), BW=((%d)), fc=((CH-%d))\n", dm->curr_station_id, + 20 << *dm->band_width, *dm->channel); + pr_debug("avg_num =((%d)), round =((%d))\n", avg_num, round); +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + watchdog_stop(dm->priv); +#endif + for (j = 0; j < round; j++) { + pr_debug("\nround((%d))\n", (j + 1)); if (*dm->band_width == CHANNEL_WIDTH_20) { for (tone_num = 228; tone_num <= 255; tone_num++) { - odm_set_bb_reg(dm, 0x8c4, 0xff8, tone_num); + odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num); rxevm_sum_0 = 0; rxevm_sum_1 = 0; for (i = 0; i < avg_num; i++) { - value32 = odm_get_bb_reg(dm, 0xF8c, MASKDWORD); + val = odm_read_4byte(dm, R_0xf8c); - rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16); + rxevm_0 = (s8)((val & MASKBYTE2) >> 16); rxevm_0 = (rxevm_0 / 2); if (rxevm_0 < -63) rxevm_0 = 0; - rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24); + rxevm_1 = (s8)((val & MASKBYTE3) >> 24); rxevm_1 = (rxevm_1 / 2); if (rxevm_1 < -63) rxevm_1 = 0; @@ -2357,22 +3962,24 @@ phydm_per_tone_evm( } evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num); evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num); - pr_debug("Tone((-%-3d)) RXEVM (1ss/2ss) =%d , %d\n", (256 - tone_num), evm_tone_0[tone_num], evm_tone_1[tone_num]); + pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n", + (256 - tone_num), evm_tone_0[tone_num], + evm_tone_1[tone_num]); } for (tone_num = 1; tone_num <= 28; tone_num++) { - odm_set_bb_reg(dm, 0x8c4, 0xff8, tone_num); + odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num); rxevm_sum_0 = 0; rxevm_sum_1 = 0; for (i = 0; i < avg_num; i++) { - value32 = odm_get_bb_reg(dm, 0xF8c, MASKDWORD); + val = odm_read_4byte(dm, R_0xf8c); - rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16); + rxevm_0 = (s8)((val & MASKBYTE2) >> 16); rxevm_0 = (rxevm_0 / 2); if (rxevm_0 < -63) rxevm_0 = 0; - rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24); + rxevm_1 = (s8)((val & MASKBYTE3) >> 24); rxevm_1 = (rxevm_1 / 2); if (rxevm_1 < -63) rxevm_1 = 0; @@ -2382,22 +3989,24 @@ phydm_per_tone_evm( } evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num); evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num); - pr_debug("Tone(( %-3d)) RXEVM (1ss/2ss) =%d , %d\n", tone_num, evm_tone_0[tone_num], evm_tone_1[tone_num]); + pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n", + tone_num, evm_tone_0[tone_num], + evm_tone_1[tone_num]); } } else if (*dm->band_width == CHANNEL_WIDTH_40) { for (tone_num = 198; tone_num <= 254; tone_num++) { - odm_set_bb_reg(dm, 0x8c4, 0xff8, tone_num); + odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num); rxevm_sum_0 = 0; rxevm_sum_1 = 0; for (i = 0; i < avg_num; i++) { - value32 = odm_get_bb_reg(dm, 0xF8c, MASKDWORD); + val = odm_read_4byte(dm, R_0xf8c); - rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16); + rxevm_0 = (s8)((val & MASKBYTE2) >> 16); rxevm_0 = (rxevm_0 / 2); if (rxevm_0 < -63) rxevm_0 = 0; - rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24); + rxevm_1 = (s8)((val & MASKBYTE3) >> 24); rxevm_1 = (rxevm_1 / 2); if (rxevm_1 < -63) rxevm_1 = 0; @@ -2408,22 +4017,24 @@ phydm_per_tone_evm( } evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num); evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num); - pr_debug("Tone((-%-3d)) RXEVM (1ss/2ss) =%d , %d\n", (256 - tone_num), evm_tone_0[tone_num], evm_tone_1[tone_num]); + pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n", + (256 - tone_num), evm_tone_0[tone_num], + evm_tone_1[tone_num]); } for (tone_num = 2; tone_num <= 58; tone_num++) { - odm_set_bb_reg(dm, 0x8c4, 0xff8, tone_num); + odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num); rxevm_sum_0 = 0; rxevm_sum_1 = 0; for (i = 0; i < avg_num; i++) { - value32 = odm_get_bb_reg(dm, 0xF8c, MASKDWORD); + val = odm_read_4byte(dm, R_0xf8c); - rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16); + rxevm_0 = (s8)((val & MASKBYTE2) >> 16); rxevm_0 = (rxevm_0 / 2); if (rxevm_0 < -63) rxevm_0 = 0; - rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24); + rxevm_1 = (s8)((val & MASKBYTE3) >> 24); rxevm_1 = (rxevm_1 / 2); if (rxevm_1 < -63) rxevm_1 = 0; @@ -2433,22 +4044,24 @@ phydm_per_tone_evm( } evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num); evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num); - pr_debug("Tone(( %-3d)) RXEVM (1ss/2ss) =%d , %d\n", tone_num, evm_tone_0[tone_num], evm_tone_1[tone_num]); + pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n", + tone_num, evm_tone_0[tone_num], + evm_tone_1[tone_num]); } } else if (*dm->band_width == CHANNEL_WIDTH_80) { for (tone_num = 134; tone_num <= 254; tone_num++) { - odm_set_bb_reg(dm, 0x8c4, 0xff8, tone_num); + odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num); rxevm_sum_0 = 0; rxevm_sum_1 = 0; for (i = 0; i < avg_num; i++) { - value32 = odm_get_bb_reg(dm, 0xF8c, MASKDWORD); + val = odm_read_4byte(dm, R_0xf8c); - rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16); + rxevm_0 = (s8)((val & MASKBYTE2) >> 16); rxevm_0 = (rxevm_0 / 2); if (rxevm_0 < -63) rxevm_0 = 0; - rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24); + rxevm_1 = (s8)((val & MASKBYTE3) >> 24); rxevm_1 = (rxevm_1 / 2); if (rxevm_1 < -63) rxevm_1 = 0; @@ -2458,22 +4071,24 @@ phydm_per_tone_evm( } evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num); evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num); - pr_debug("Tone((-%-3d)) RXEVM (1ss/2ss) =%d , %d\n", (256 - tone_num), evm_tone_0[tone_num], evm_tone_1[tone_num]); + pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n", + (256 - tone_num), evm_tone_0[tone_num], + evm_tone_1[tone_num]); } for (tone_num = 2; tone_num <= 122; tone_num++) { - odm_set_bb_reg(dm, 0x8c4, 0xff8, tone_num); + odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num); rxevm_sum_0 = 0; rxevm_sum_1 = 0; for (i = 0; i < avg_num; i++) { - value32 = odm_get_bb_reg(dm, 0xF8c, MASKDWORD); + val = odm_read_4byte(dm, R_0xf8c); - rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16); + rxevm_0 = (s8)((val & MASKBYTE2) >> 16); rxevm_0 = (rxevm_0 / 2); if (rxevm_0 < -63) rxevm_0 = 0; - rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24); + rxevm_1 = (s8)((val & MASKBYTE3) >> 24); rxevm_1 = (rxevm_1 / 2); if (rxevm_1 < -63) rxevm_1 = 0; @@ -2483,49 +4098,40 @@ phydm_per_tone_evm( } evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num); evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num); - pr_debug("Tone(( %-3d)) RXEVM (1ss/2ss) =%d , %d\n", tone_num, evm_tone_0[tone_num], evm_tone_1[tone_num]); - } + pr_debug("Tone(%-3d) RXEVM (1ss/2ss)=%d, %d\n", + tone_num, evm_tone_0[tone_num], + evm_tone_1[tone_num]); } } - } else - PDM_SNPF(out_len, used, output + used, out_len - used, - "No Link !!\n"); - + } + *_used = used; + *_out_len = out_len; } -void -phydm_api_adjust( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +void phydm_bw_ch_adjust(void *dm_void, char input[][16], + u32 *_used, char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - char help[] = "-h"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; - u8 i; - boolean is_enable_dbg_mode; + struct dm_struct *dm = (struct dm_struct *)dm_void; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + u8 i; + boolean is_enable_dbg_mode; u8 central_ch, primary_ch_idx; - enum channel_width bandwidth; - + enum channel_width bw; + #ifdef PHYDM_COMMON_API_SUPPORT if ((strcmp(input[1], help) == 0)) { PDM_SNPF(out_len, used, output + used, out_len - used, - "{en} {ch_num} {prm_ch 1/2/3/4/9/10} {0:20M, 1:40M, 2:80M}\n"); + "{en} {CH} {pr_ch_idx 1/2/3/4/9/10} {0:20M,1:40M,2:80M}\n"); goto out; - } - if ((dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)) == 0) { + if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) { PDM_SNPF(out_len, used, output + used, out_len - used, - "This IC doesn't support PHYDM API function\n"); - /**/ + "Not support this API\n"); goto out; } @@ -2535,71 +4141,440 @@ phydm_api_adjust( } is_enable_dbg_mode = (boolean)var1[0]; - central_ch = (u8) var1[1]; - primary_ch_idx = (u8) var1[2]; - bandwidth = (enum channel_width)var1[3]; + central_ch = (u8)var1[1]; + primary_ch_idx = (u8)var1[2]; + bw = (enum channel_width)var1[3]; if (is_enable_dbg_mode) { dm->is_disable_phy_api = false; - phydm_api_switch_bw_channel(dm, central_ch, primary_ch_idx, bandwidth); + phydm_api_switch_bw_channel(dm, central_ch, primary_ch_idx, bw); dm->is_disable_phy_api = true; PDM_SNPF(out_len, used, output + used, out_len - used, - "central_ch = %d, primary_ch_idx = %d, bandwidth = %d\n", - central_ch, primary_ch_idx, bandwidth); - } else { - dm->is_disable_phy_api = false; - PDM_SNPF(out_len, used, output + used, out_len - used, - "Disable API debug mode\n"); + "central_ch = %d, primary_ch_idx = %d, bw = %d\n", + central_ch, primary_ch_idx, bw); } out: -#else - PDM_SNPF(out_len, used, output + used, out_len - used, - "This IC doesn't support PHYDM API function\n"); #endif *_used = used; *_out_len = out_len; } -void -phydm_parameter_adjust( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +void phydm_ext_rf_element_ctrl(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_cfo_track_struct *cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(dm, PHYDM_CFOTRACK); - char help[] = "-h"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 val[10] = {0}; + u8 i = 0, input_idx = 0; + + for (i = 0; i < 5; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]); + input_idx++; + } + } + + if (input_idx == 0) + return; + + if (val[0] == 1) /*@ext switch*/ { + phydm_set_ext_switch(dm, val[1]); + } +} + +void phydm_print_dbgport(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + u32 dbg_port_value = 0; + u8 val[32]; + u8 tmp = 0; + u8 i; + + if (strcmp(input[1], help) == 0) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "{dbg_port_idx}\n"); + goto out; + } + + PHYDM_SSCANF(input[1], DCMD_HEX, &var1[0]); + + dm->debug_components |= ODM_COMP_API; + if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, var1[0])) { + dbg_port_value = phydm_get_bb_dbg_port_val(dm); + phydm_release_bb_dbg_port(dm); + + for (i = 0; i < 32; i++) + val[i] = (u8)((dbg_port_value & BIT(i)) >> i); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "Dbg Port[0x%x] = ((0x%x))\n", var1[0], + dbg_port_value); + + for (i = 4; i != 0; i--) { + tmp = 8 * (i - 1); + PDM_SNPF(out_len, used, output + used, out_len - used, + "val[%d:%d] = 8b'%d %d %d %d %d %d %d %d\n", + tmp + 7, tmp, val[tmp + 7], val[tmp + 6], + val[tmp + 5], val[tmp + 4], val[tmp + 3], + val[tmp + 2], val[tmp + 1], val[tmp + 0]); + } + } + dm->debug_components &= (~ODM_COMP_API); +out: + *_used = used; + *_out_len = out_len; +} + +void phydm_get_anapar_table(void *dm_void, u32 *_used, char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + enum rf_path i = RF_PATH_A; + +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) + return; + + PDM_VAST_SNPF(out_len, used, output + used, out_len - used, + "------ Analog parameters start ------\n"); + + for (i = RF_PATH_A; i < (enum rf_path)dm->num_rf_path; i++) + phydm_get_per_path_anapar_jgr3(dm, i, &used, output, &out_len); +#endif + + *_used = used; + *_out_len = out_len; +} + +void phydm_dd_dbg_dump(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + + PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); if ((strcmp(input[1], help) == 0)) { PDM_SNPF(out_len, used, output + used, out_len - used, - "1. X_cap = ((0x%x))\n", - cfo_track->crystal_cap); + "dump: {1}\n"); + return; + } else if (var1[0] == 1) { + /*[Reg]*/ + phydm_dump_mac_reg(dm, &used, output, &out_len); + phydm_dump_bb_reg(dm, &used, output, &out_len); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->ic_ip_series == PHYDM_IC_JGR3) + phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len); + #endif - } else { - - PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); + phydm_dump_rf_reg(dm, &used, output, &out_len); + /*[Dbg Port]*/ + #ifdef PHYDM_AUTO_DEGBUG + phydm_dbg_port_dump(dm, &used, output, &out_len); + #endif + /*[Analog Parameters]*/ + phydm_get_anapar_table(dm, &used, output, &out_len); + } +} - if (var1[0] == 0) { - PHYDM_SSCANF(input[2], DCMD_HEX, &var1[1]); - phydm_set_crystal_cap(dm, (u8)var1[1]); - PDM_SNPF(out_len, used, output + used, - out_len - used, "X_cap = ((0x%x))\n", - cfo_track->crystal_cap); +void phydm_nss_hitogram_mp(void *dm_void, enum PDM_RATE_TYPE rate_type, + u32 *_used, char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; + u32 used = *_used; + u32 out_len = *_out_len; + char buf[PHYDM_SNPRINT_SIZE] = {0}; + u16 buf_size = PHYDM_SNPRINT_SIZE; + u16 h_size = PHY_HIST_SIZE; + u16 *evm_hist = &dbg_s->evm_1ss_hist[0]; + u16 *snr_hist = &dbg_s->snr_1ss_hist[0]; + u8 i = 0; + u8 ss = phydm_rate_type_2_num_ss(dm, rate_type); + + if (rate_type == PDM_OFDM) { + phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE, + buf, buf_size); + PDM_SNPF(out_len, used, output + used, out_len - used, + "%-14s=%s\n", "[OFDM][EVM]", buf); + + phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE, + buf, buf_size); + PDM_SNPF(out_len, used, output + used, out_len - used, + "%-14s=%s\n", "[OFDM][SNR]", buf); + + *_used = used; + *_out_len = out_len; + return; + } + + for (i = 0; i < ss; i++) { + if (rate_type == PDM_1SS) { + evm_hist = &dbg_s->evm_1ss_hist[0]; + snr_hist = &dbg_s->snr_1ss_hist[0]; + } else if (rate_type == PDM_2SS) { + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + evm_hist = &dbg_s->evm_2ss_hist[i][0]; + snr_hist = &dbg_s->snr_2ss_hist[i][0]; + #endif + } else if (rate_type == PDM_3SS) { + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + evm_hist = &dbg_s->evm_3ss_hist[i][0]; + snr_hist = &dbg_s->snr_3ss_hist[i][0]; + #endif + } else if (rate_type == PDM_4SS) { + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + evm_hist = &dbg_s->evm_4ss_hist[i][0]; + snr_hist = &dbg_s->snr_4ss_hist[i][0]; + #endif } + + phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[%d-SS][EVM][%d]=%s\n", ss, i, buf); + phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[%d-SS][SNR][%d]=%s\n", ss, i, buf); } *_used = used; *_out_len = out_len; } +void phydm_mp_dbg(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; + struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg; + char *rate_type = NULL; + u8 tmp_rssi_avg[4]; + u8 tmp_snr_avg[4]; + u8 tmp_evm_avg[4]; + u32 tmp_cnt = 0; + char buf[PHYDM_SNPRINT_SIZE] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + u32 var1[10] = {0}; + u16 buf_size = PHYDM_SNPRINT_SIZE; + u16 th_size = PHY_HIST_SIZE - 1; + u8 i = 0; + + if (!(*dm->mp_mode)) + return; + + PDM_SNPF(out_len, used, output + used, out_len - used, + "BW=((%d)), fc=((CH-%d))\n", + 20 << *dm->band_width, *dm->channel); + + /*@===[PHY Histogram]================================================*/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "[PHY Histogram] ==============>\n"); + /*@===[Threshold]===*/ + phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size); + PDM_SNPF(out_len, used, output + used, out_len - used, + "%-16s=%s\n", "[EVM_TH]", buf); + phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size); + PDM_SNPF(out_len, used, output + used, out_len - used, + "%-16s=%s\n", "[SNR_TH]", buf); + /*@===[OFDM]===*/ + phydm_nss_hitogram_mp(dm, PDM_OFDM, &used, output, &out_len); + /*@===[1-SS]===*/ + phydm_nss_hitogram_mp(dm, PDM_1SS, &used, output, &out_len); + /*@===[2-SS]===*/ + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) + phydm_nss_hitogram_mp(dm, PDM_2SS, &used, output, &out_len); + #endif + /*@===[3-SS]===*/ + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS) + phydm_nss_hitogram_mp(dm, PDM_3SS, &used, output, &out_len); + #endif + /*@===[4-SS]===*/ + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) + phydm_nss_hitogram_mp(dm, PDM_4SS, &used, output, &out_len); + #endif + /*@===[PHY Avg]======================================================*/ + phydm_get_avg_phystatus_val(dm); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[PHY Avg] ==============>\n"); + + phydm_get_avg_phystatus_val(dm); + PDM_SNPF(out_len, used, output + used, out_len - used, + "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n", + "[Beacon]", dbg_s->rssi_beacon_cnt, dbg_avg->rssi_beacon_avg); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n", + "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg); + + for (i = 0; i <= 4; i++) { + if (i > dm->num_rf_path) + break; + + odm_memory_set(dm, tmp_rssi_avg, 0, 4); + odm_memory_set(dm, tmp_snr_avg, 0, 4); + odm_memory_set(dm, tmp_evm_avg, 0, 4); + + switch (i) { + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + case 4: + rate_type = "[4-SS]"; + tmp_cnt = dbg_s->rssi_4ss_cnt; + odm_move_memory(dm, tmp_rssi_avg, + dbg_avg->rssi_4ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_snr_avg, + dbg_avg->snr_4ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg, + 4); + break; + #endif + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + case 3: + rate_type = "[3-SS]"; + tmp_cnt = dbg_s->rssi_3ss_cnt; + odm_move_memory(dm, tmp_rssi_avg, + dbg_avg->rssi_3ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_snr_avg, + dbg_avg->snr_3ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_evm_avg, + dbg_avg->evm_3ss_avg, 3); + break; + #endif + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + case 2: + rate_type = "[2-SS]"; + tmp_cnt = dbg_s->rssi_2ss_cnt; + odm_move_memory(dm, tmp_rssi_avg, + dbg_avg->rssi_2ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg, + dm->num_rf_path); + odm_move_memory(dm, tmp_evm_avg, + dbg_avg->evm_2ss_avg, 2); + break; + #endif + case 1: + rate_type = "[1-SS]"; + tmp_cnt = dbg_s->rssi_1ss_cnt; + odm_move_memory(dm, tmp_rssi_avg, + dbg_avg->rssi_1ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_snr_avg, + dbg_avg->snr_1ss_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_evm_avg, + &dbg_avg->evm_1ss_avg, 1); + break; + default: + rate_type = "[L-OFDM]"; + tmp_cnt = dbg_s->rssi_ofdm_cnt; + odm_move_memory(dm, tmp_rssi_avg, + dbg_avg->rssi_ofdm_avg, + dm->num_rf_path); + odm_move_memory(dm, tmp_snr_avg, + dbg_avg->snr_ofdm_avg, dm->num_rf_path); + odm_move_memory(dm, tmp_evm_avg, + &dbg_avg->evm_ofdm_avg, 1); + break; + } + + PDM_SNPF(out_len, used, output + used, out_len - used, + "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n", + rate_type, tmp_cnt, + tmp_rssi_avg[0], tmp_rssi_avg[1], + tmp_rssi_avg[2], tmp_rssi_avg[3], + tmp_snr_avg[0], tmp_snr_avg[1], + tmp_snr_avg[2], tmp_snr_avg[3], + tmp_evm_avg[0], tmp_evm_avg[1], + tmp_evm_avg[2], tmp_evm_avg[3]); + } + + phydm_reset_phystatus_statistic(dm); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n", + dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80); + + *_used = used; + *_out_len = out_len; +} + +#if RTL8814B_SUPPORT +void phydm_spur_detect_dbg(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + u32 i; + + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "{0: Auto spur detect(NBI+CSI), 1:NBI only,"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "2: CSI only, 3: Disable}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{NBI path(0~3) | CSI wgt (0~7)}\n"); + } else { + for (i = 0; i < 10; i++) { + if (input[i + 1]) + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); + } + + if (var1[0] == 1) + dm->dsde_sel = DET_NBI; + else if (var1[0] == 2) + dm->dsde_sel = DET_CSI; + else if (var1[0] == 3) + dm->dsde_sel = DET_DISABLE; + else + dm->dsde_sel = DET_AUTO; + + PDM_SNPF(out_len, used, output + used, out_len - used, + "spur detect mode = %d\n", dm->dsde_sel); + + if (dm->dsde_sel == DET_NBI) { + if (var1[1] < 4) { + dm->nbi_path_sel = (u8)var1[1]; + PDM_SNPF(out_len, used, output + used, + out_len - used, "NBI set path %d\n", + dm->nbi_path_sel); + } else { + PDM_SNPF(out_len, used, output + used, + out_len - used, "path setting fail\n"); + } + } else if (dm->dsde_sel == DET_CSI) { + if (var1[1] < 8) { + dm->csi_wgt = (u8)var1[1]; + PDM_SNPF(out_len, used, output + used, + out_len - used, "CSI wgt %d\n", + dm->csi_wgt); + } else { + PDM_SNPF(out_len, used, output + used, + out_len - used, + "CSI wgt setting fail\n"); + } + } + } + + *_used = used; + *_out_len = out_len; +} +#endif + struct phydm_command { char name[16]; u8 id; @@ -2608,128 +4583,130 @@ struct phydm_command { enum PHYDM_CMD_ID { PHYDM_HELP, PHYDM_DEMO, + PHYDM_RF_CMD, PHYDM_DIG, PHYDM_RA, PHYDM_PROFILE, PHYDM_ANTDIV, PHYDM_PATHDIV, PHYDM_DEBUG, + PHYDM_MP_DEBUG, PHYDM_FW_DEBUG, PHYDM_SUPPORT_ABILITY, - PHYDM_RF_SUPPORTABILITY, - PHYDM_RF_PROFILE, - PHYDM_RF_IQK_INFO, - PHYDM_IQK, - PHYDM_IQK_DEBUG, PHYDM_GET_TXAGC, PHYDM_SET_TXAGC, PHYDM_SMART_ANT, - PHYDM_API, + PHYDM_CH_BW, PHYDM_TRX_PATH, PHYDM_LA_MODE, PHYDM_DUMP_REG, PHYDM_AUTO_DBG, + PHYDM_DD_DBG, PHYDM_BIG_JUMP, PHYDM_SHOW_RXRATE, PHYDM_NBI_EN, PHYDM_CSI_MASK_EN, PHYDM_DFS_DEBUG, + PHYDM_DFS_HIST, PHYDM_NHM, PHYDM_CLM, PHYDM_FAHM, PHYDM_ENV_MNTR, PHYDM_BB_INFO, - PHYDM_TXBF, + //PHYDM_TXBF, PHYDM_H2C, - PHYDM_ANT_SWITCH, - PHYDM_DYNAMIC_RA_PATH, + PHYDM_EXT_RF_E_CTRL, PHYDM_ADAPTIVE_SOML, PHYDM_PSD, PHYDM_DEBUG_PORT, PHYDM_DIS_HTSTF_CONTROL, - PHYDM_TUNE_PARAMETER, + PHYDM_CFO_TRK, PHYDM_ADAPTIVITY_DEBUG, PHYDM_DIS_DYM_ANT_WEIGHTING, PHYDM_FORECE_PT_STATE, - PHYDM_DIS_RXHP_CTR, PHYDM_STA_INFO, PHYDM_PAUSE_FUNC, - PHYDM_PER_TONE_EVM + PHYDM_PER_TONE_EVM, + PHYDM_DYN_TXPWR, + PHYDM_LNA_SAT, + PHYDM_ANAPAR, + PHYDM_BEAM_FORMING, +#if RTL8814B_SUPPORT + PHYDM_SPUR_DETECT +#endif }; struct phydm_command phy_dm_ary[] = { - {"-h", PHYDM_HELP}, /*do not move this element to other position*/ - {"demo", PHYDM_DEMO}, /*do not move this element to other position*/ - {"dig", PHYDM_DIG}, + {"-h", PHYDM_HELP}, /*@do not move this element to other position*/ + {"demo", PHYDM_DEMO}, /*@do not move this element to other position*/ + {"rf", PHYDM_RF_CMD}, + {"dig", PHYDM_DIG}, {"ra", PHYDM_RA}, {"profile", PHYDM_PROFILE}, {"antdiv", PHYDM_ANTDIV}, {"pathdiv", PHYDM_PATHDIV}, {"dbg", PHYDM_DEBUG}, + {"mp_dbg", PHYDM_MP_DEBUG}, {"fw_dbg", PHYDM_FW_DEBUG}, {"ability", PHYDM_SUPPORT_ABILITY}, - {"rf_ability", PHYDM_RF_SUPPORTABILITY}, - {"rf_profile", PHYDM_RF_PROFILE}, - {"iqk_info", PHYDM_RF_IQK_INFO}, - {"iqk", PHYDM_IQK}, - {"iqk_dbg", PHYDM_IQK_DEBUG}, {"get_txagc", PHYDM_GET_TXAGC}, {"set_txagc", PHYDM_SET_TXAGC}, {"smtant", PHYDM_SMART_ANT}, - {"api", PHYDM_API}, + {"ch_bw", PHYDM_CH_BW}, {"trxpath", PHYDM_TRX_PATH}, {"lamode", PHYDM_LA_MODE}, {"dumpreg", PHYDM_DUMP_REG}, {"auto_dbg", PHYDM_AUTO_DBG}, + {"dd_dbg", PHYDM_DD_DBG}, {"bigjump", PHYDM_BIG_JUMP}, {"rxrate", PHYDM_SHOW_RXRATE}, {"nbi", PHYDM_NBI_EN}, {"csi_mask", PHYDM_CSI_MASK_EN}, {"dfs", PHYDM_DFS_DEBUG}, + {"dfs_hist", PHYDM_DFS_HIST}, {"nhm", PHYDM_NHM}, {"clm", PHYDM_CLM}, {"fahm", PHYDM_FAHM}, - {"env_mntr", PHYDM_ENV_MNTR}, + {"env_mntr", PHYDM_ENV_MNTR}, {"bbinfo", PHYDM_BB_INFO}, - {"txbf", PHYDM_TXBF}, + //{"txbf", PHYDM_TXBF}, {"h2c", PHYDM_H2C}, - {"ant_switch", PHYDM_ANT_SWITCH}, - {"drp", PHYDM_DYNAMIC_RA_PATH}, + {"ext_rfe", PHYDM_EXT_RF_E_CTRL}, {"soml", PHYDM_ADAPTIVE_SOML}, {"psd", PHYDM_PSD}, {"dbgport", PHYDM_DEBUG_PORT}, {"dis_htstf", PHYDM_DIS_HTSTF_CONTROL}, - {"tune_para", PHYDM_TUNE_PARAMETER}, + {"cfo_trk", PHYDM_CFO_TRK}, {"adapt_debug", PHYDM_ADAPTIVITY_DEBUG}, {"dis_dym_ant_wgt", PHYDM_DIS_DYM_ANT_WEIGHTING}, {"force_pt_state", PHYDM_FORECE_PT_STATE}, - {"dis_drxhp", PHYDM_DIS_RXHP_CTR}, {"sta_info", PHYDM_STA_INFO}, {"pause", PHYDM_PAUSE_FUNC}, - {"evm", PHYDM_PER_TONE_EVM} -}; + {"evm", PHYDM_PER_TONE_EVM}, + {"dyn_txpwr", PHYDM_DYN_TXPWR}, + {"lna_sat", PHYDM_LNA_SAT}, + {"anapar", PHYDM_ANAPAR}, + {"bf", PHYDM_BEAM_FORMING}, +#if RTL8814B_SUPPORT + {"spur_detect", PHYDM_SPUR_DETECT} +#endif + }; -#endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ +#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ -void -phydm_cmd_parser( - struct dm_struct *dm, - char input[][MAX_ARGV], - u32 input_num, - u8 flag, - char *output, - u32 out_len -) +void phydm_cmd_parser(struct dm_struct *dm, char input[][MAX_ARGV], + u32 input_num, u8 flag, char *output, u32 out_len) { #ifdef CONFIG_PHYDM_DEBUG_FUNCTION u32 used = 0; u8 id = 0; - int var1[10] = {0}; - int i, input_idx = 0, phydm_ary_size = sizeof(phy_dm_ary) / sizeof(struct phydm_command); - char help[] = "-h"; + u32 var1[10] = {0}; + u32 i; + u32 phydm_ary_size = sizeof(phy_dm_ary) / sizeof(struct phydm_command); if (flag == 0) { - PDM_SNPF(out_len, used, output + used, out_len - used, "GET, nothing to print\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "GET, nothing to print\n"); return; } @@ -2744,208 +4721,100 @@ phydm_cmd_parser( } } if (i == phydm_ary_size) { - PDM_SNPF(out_len, used, output + used, out_len - used, "SET, command not found!\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "PHYDM command not found!\n"); return; } } switch (id) { - case PHYDM_HELP: - { + case PHYDM_HELP: { PDM_SNPF(out_len, used, output + used, out_len - used, - "BB cmd ==>\n"); - for (i = 0; i < phydm_ary_size - 2; i++) { - PDM_SNPF(out_len, used, output + used, - out_len - used, " %-5d: %s\n", i, phy_dm_ary[i + 2].name); - /**/ - } - } - break; + "BB cmd ==>\n"); - case PHYDM_DEMO: { /*echo demo 10 0x3a z abcde >cmd*/ + for (i = 0; i < phydm_ary_size - 2; i++) + PDM_SNPF(out_len, used, output + used, out_len - used, + " %-5d: %s\n", i, phy_dm_ary[i + 2].name); + } break; + + case PHYDM_DEMO: { /*@echo demo 10 0x3a z abcde >cmd*/ u32 directory = 0; -#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP)) + #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP)) char char_temp; -#else + #else u32 char_temp = ' '; -#endif + #endif PHYDM_SSCANF(input[1], DCMD_DECIMAL, &directory); PDM_SNPF(out_len, used, output + used, out_len - used, - "Decimal value = %d\n", directory); + "Decimal value = %d\n", directory); PHYDM_SSCANF(input[2], DCMD_HEX, &directory); PDM_SNPF(out_len, used, output + used, out_len - used, - "Hex value = 0x%x\n", directory); + "Hex value = 0x%x\n", directory); PHYDM_SSCANF(input[3], DCMD_CHAR, &char_temp); PDM_SNPF(out_len, used, output + used, out_len - used, - "Char = %c\n", char_temp); + "Char = %c\n", char_temp); PDM_SNPF(out_len, used, output + used, out_len - used, - "String = %s\n", input[4]); - } - break; - - case PHYDM_DIG: + "String = %s\n", input[4]); + } break; + case PHYDM_RF_CMD: + halrf_cmd_parser(dm, input, &used, output, &out_len, input_num); + break; - phydm_dig_debug(dm, &input[0], &used, output, &out_len, input_num); + case PHYDM_DIG: + phydm_dig_debug(dm, input, &used, output, &out_len); break; case PHYDM_RA: - phydm_ra_debug(dm, &input[0], &used, output, &out_len); + phydm_ra_debug(dm, input, &used, output, &out_len); break; case PHYDM_ANTDIV: - - for (i = 0; i < 5; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); - - /*PDM_SNPF((output+used, out_len-used, "new SET, PATHDIV_var[%d]= (( %d ))\n", i, var1[i]));*/ - input_idx++; - } - } - - if (input_idx >= 1) { - /*PDM_SNPF((output+used, out_len-used, "odm_PATHDIV_debug\n"));*/ -#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) - phydm_antdiv_debug(dm, (u32 *)var1, &used, output, &out_len); -#endif - } - + #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) + phydm_antdiv_debug(dm, input, &used, output, &out_len); + #endif break; case PHYDM_PATHDIV: - - for (i = 0; i < 5; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); - - /*PDM_SNPF((output+used, out_len-used, "new SET, PATHDIV_var[%d]= (( %d ))\n", i, var1[i]));*/ - input_idx++; - } - } - - if (input_idx >= 1) { - /*PDM_SNPF((output+used, out_len-used, "odm_PATHDIV_debug\n"));*/ -#if (defined(CONFIG_PATH_DIVERSITY)) - odm_pathdiv_debug(dm, (u32 *)var1, &used, output, &out_len); -#endif - } - + #if (defined(CONFIG_PATH_DIVERSITY)) + phydm_pathdiv_debug(dm, input, &used, output, &out_len); + #endif break; case PHYDM_DEBUG: + phydm_debug_trace(dm, input, &used, output, &out_len); + break; - phydm_debug_trace(dm, &input[0], &used, output, &out_len); - + case PHYDM_MP_DEBUG: + phydm_mp_dbg(dm, input, &used, output, &out_len); break; case PHYDM_FW_DEBUG: - - for (i = 0; i < 5; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); - input_idx++; - } - } - - if (input_idx >= 1) - phydm_fw_debug_trace(dm, (u32 *)var1, &used, output, &out_len); - + phydm_fw_debug_trace(dm, input, &used, output, &out_len); break; case PHYDM_SUPPORT_ABILITY: - - for (i = 0; i < 5; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); - - /*PDM_SNPF((output+used, out_len-used, "new SET, support ablity_var[%d]= (( %d ))\n", i, var1[i]));*/ - input_idx++; - } - } - - if (input_idx >= 1) { - /*PDM_SNPF((output+used, out_len-used, "support ablity\n"));*/ - phydm_support_ability_debug(dm, (u32 *)var1, &used, output, &out_len); - } - + phydm_supportability_en(dm, input, &used, output, &out_len); break; - case PHYDM_RF_SUPPORTABILITY: - halrf_support_ability_debug(dm, &input[0], &used, output, &out_len); - break; - - case PHYDM_RF_PROFILE: - halrf_basic_profile(dm, &used, output, &out_len); - break; - - case PHYDM_RF_IQK_INFO: - #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) - if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) - halrf_iqk_info_dump(dm, &used, output, &out_len); - #endif - break; - - case PHYDM_IQK: - - PDM_SNPF(out_len, used, output + used, out_len - used, - "TRX IQK Trigger\n"); - halrf_iqk_trigger(dm, false); - - #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) - if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) - halrf_iqk_info_dump(dm, &used, output, &out_len); - #endif - - break; - - case PHYDM_IQK_DEBUG: - - for (i = 0; i < 5; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); - input_idx++; - } - } - - if (input_idx >= 1) { - #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) - if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) - halrf_iqk_debug(dm, (u32 *)var1, &used, output, &out_len); - #endif - } - break; - case PHYDM_SMART_ANT: - - for (i = 0; i < 5; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); - input_idx++; - } - } - - if (input_idx >= 1) { - #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) + #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 - phydm_hl_smart_ant_debug_type2(dm, &input[0], &used, output, &out_len, input_num); + phydm_hl_smt_ant_dbg_type2(dm, input, &used, output, &out_len); #elif (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) - phydm_hl_smart_ant_debug(dm, &input[0], &used, output, &out_len, input_num); + phydm_hl_smart_ant_debug(dm, input, &used, output, &out_len); #endif - - #endif - #if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) - phydm_cumitek_smt_ant_debug(dm, &input[0], &used, output, &out_len, input_num); - #endif - } + #elif (defined(CONFIG_CUMITEK_SMART_ANTENNA)) + phydm_cumitek_smt_ant_debug(dm, input, &used, output, &out_len); + #endif break; - case PHYDM_API: - phydm_api_adjust(dm, &input[0], &used, output, &out_len, input_num); + case PHYDM_CH_BW: + phydm_bw_ch_adjust(dm, input, &used, output, &out_len); break; case PHYDM_PROFILE: @@ -2957,504 +4826,235 @@ phydm_cmd_parser( break; case PHYDM_SET_TXAGC: - { - boolean is_enable_dbg_mode; - - for (i = 0; i < 5; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); - input_idx++; - } - } - - if ((strcmp(input[1], help) == 0)) { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "{En} {pathA~D(0~3)} {rate_idx(Hex), All_rate:0xff} {txagc_idx (Hex)}\n"); - /**/ - - } else { - is_enable_dbg_mode = (boolean)var1[0]; - if (is_enable_dbg_mode) { - dm->is_disable_phy_api = false; - phydm_set_txagc(dm, (u32 *)var1, &used, output, &out_len); - dm->is_disable_phy_api = true; - } else { - dm->is_disable_phy_api = false; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "Disable API debug mode\n"); - } - } - } - break; + phydm_set_txagc_dbg(dm, input, &used, output, &out_len); + break; case PHYDM_TRX_PATH: - - for (i = 0; i < 4; i++) { - if (input[i + 1]) - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); - } -#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1) - if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) { - u8 tx_path, rx_path; - boolean is_enable_dbg_mode, is_tx2_path; - - is_enable_dbg_mode = (boolean)var1[0]; - tx_path = (u8) var1[1]; - rx_path = (u8) var1[2]; - is_tx2_path = (boolean) var1[3]; - - if (is_enable_dbg_mode) { - dm->is_disable_phy_api = false; - phydm_api_trx_mode(dm, (enum bb_path) tx_path, (enum bb_path) rx_path, is_tx2_path); - dm->is_disable_phy_api = true; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "tx_path = 0x%x, rx_path = 0x%x, is_tx2_path = %d\n", - tx_path, rx_path, is_tx2_path); - } else { - dm->is_disable_phy_api = false; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "Disable API debug mode\n"); - } - } else -#endif - phydm_config_trx_path(dm, (u32 *)var1, &used, output, &out_len); - + phydm_config_trx_path(dm, input, &used, output, &out_len); break; case PHYDM_LA_MODE: - - #if (PHYDM_LA_MODE_SUPPORT == 1) - phydm_lamode_trigger_setting(dm, &input[0], &used, output, &out_len, input_num); - #else - PDM_SNPF(out_len, used, output + used, out_len - used, - "This IC doesn't support LA mode\n"); + #if (PHYDM_LA_MODE_SUPPORT) + phydm_la_cmd(dm, input, &used, output, &out_len); #endif - break; case PHYDM_DUMP_REG: - { - u8 type = 0; - - if (input[1]) { - PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); - type = (u8)var1[0]; - } - - if (type == 0) - phydm_dump_bb_reg(dm, &used, output, &out_len); - else if (type == 1) - phydm_dump_all_reg(dm, &used, output, &out_len); - } - break; + phydm_dump_reg(dm, input, &used, output, &out_len); + break; case PHYDM_BIG_JUMP: - { -#if (RTL8822B_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8822B) { - if (input[1]) { - PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); - phydm_enable_big_jump(dm, (boolean)(var1[0])); - } else - PDM_SNPF(out_len, used, output + used, - out_len - used, - "unknown command!\n"); - } else - PDM_SNPF(out_len, used, output + used, - out_len - used, - "The command is only for 8822B!\n"); -#endif + phydm_enable_big_jump(dm, input, &used, output, &out_len); break; - } case PHYDM_AUTO_DBG: #ifdef PHYDM_AUTO_DEGBUG - phydm_auto_dbg_console(dm, &input[0], &used, output, &out_len, input_num); + phydm_auto_dbg_console(dm, input, &used, output, &out_len); #endif break; - case PHYDM_SHOW_RXRATE: - { -#if (RTL8822B_SUPPORT == 1 | RTL8821C_SUPPORT == 1 | RTL8814B_SUPPORT == 1) - u8 rate_idx; - if ((dm->support_ic_type & PHYDM_IC_SUPPORT_MU_BFEE) == 0) - break; - - if (input[1]) - PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); - - if (var1[0] == 1) - phydm_show_rx_rate(dm, &used, output, &out_len); - else { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "Reset Rx rate counter\n"); - - for (rate_idx = 0; rate_idx < VHT_RATE_NUM; rate_idx++) { - dm->phy_dbg_info.num_qry_vht_pkt[rate_idx] = 0; - dm->phy_dbg_info.num_qry_mu_vht_pkt[rate_idx] = 0; - } - } -#endif + case PHYDM_DD_DBG: + phydm_dd_dbg_dump(dm, input, &used, output, &out_len); + break; + + case PHYDM_SHOW_RXRATE: + phydm_show_rx_rate(dm, input, &used, output, &out_len); break; - } case PHYDM_NBI_EN: - - for (i = 0; i < 5; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); - input_idx++; - } - } - - if (input_idx >= 1) { - phydm_api_debug(dm, PHYDM_API_NBI, (u32 *)var1, &used, output, &out_len); - /**/ - } - - + phydm_nbi_debug(dm, input, &used, output, &out_len); break; case PHYDM_CSI_MASK_EN: - - for (i = 0; i < 5; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); - input_idx++; - } - } - - if (input_idx >= 1) { - phydm_api_debug(dm, PHYDM_API_CSI_MASK, (u32 *)var1, &used, output, &out_len); - /**/ - } - - + phydm_csi_debug(dm, input, &used, output, &out_len); break; + #ifdef CONFIG_PHYDM_DFS_MASTER case PHYDM_DFS_DEBUG: - { -#ifdef CONFIG_PHYDM_DFS_MASTER - u32 var[4] = {0}; - - for (i = 0; i < 4; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var[i]); - input_idx++; - } - } - - if (input_idx >= 1) - phydm_dfs_debug(dm, var, &used, output, &out_len); -#endif + phydm_dfs_debug(dm, input, &used, output, &out_len); break; - } + + case PHYDM_DFS_HIST: + phydm_dfs_hist_dbg(dm, input, &used, output, &out_len); + break; + #endif case PHYDM_NHM: #ifdef NHM_SUPPORT - phydm_nhm_dbg(dm, &input[0], &used, output, &out_len, input_num); + phydm_nhm_dbg(dm, input, &used, output, &out_len); #endif break; case PHYDM_CLM: #ifdef CLM_SUPPORT - phydm_clm_dbg(dm, &input[0], &used, output, &out_len, input_num); + phydm_clm_dbg(dm, input, &used, output, &out_len); #endif break; #ifdef FAHM_SUPPORT case PHYDM_FAHM: - phydm_fahm_dbg(dm, &input[0], &used, output, &out_len, input_num); + phydm_fahm_dbg(dm, input, &used, output, &out_len); break; #endif case PHYDM_ENV_MNTR: - phydm_env_mntr_dbg(dm, &input[0], &used, output, &out_len, input_num); + phydm_env_mntr_dbg(dm, input, &used, output, &out_len); break; - case PHYDM_BB_INFO: - { - s32 value32 = 0; + phydm_bb_hw_dbg_info(dm, input, &used, output, &out_len); + break; + /* + case PHYDM_TXBF: { + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + #ifdef PHYDM_BEAMFORMING_SUPPORT + struct _RT_BEAMFORMING_INFO *beamforming_info = NULL; - phydm_bb_debug_info(dm, &used, output, &out_len); - - if (dm->support_ic_type & ODM_RTL8822B && input[1]) { - PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); - odm_set_bb_reg(dm, 0x1988, 0x003fff00, var1[0]); - value32 = odm_get_bb_reg(dm, 0xf84, MASKDWORD); - value32 = (value32 & 0xff000000) >> 24; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "\r\n %-35s = condition num = %d, subcarriers = %d\n", - "Over condition num subcarrier", - var1[0], value32); - odm_set_bb_reg(dm, 0x1988, BIT(22), 0x0); /*disable report condition number*/ - } - } - break; - - case PHYDM_TXBF: - { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -#if (BEAMFORMING_SUPPORT == 1) - struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; + beamforming_info = &dm->beamforming_info; PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); if (var1[0] == 0) { beamforming_info->apply_v_matrix = false; beamforming_info->snding3ss = true; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "\r\n dont apply V matrix and 3SS 789 snding\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n dont apply V matrix and 3SS 789 snding\n"); } else if (var1[0] == 1) { beamforming_info->apply_v_matrix = true; beamforming_info->snding3ss = true; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "\r\n apply V matrix and 3SS 789 snding\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n apply V matrix and 3SS 789 snding\n"); } else if (var1[0] == 2) { beamforming_info->apply_v_matrix = true; beamforming_info->snding3ss = false; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "\r\n default txbf setting\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n default txbf setting\n"); } else - PDM_SNPF(out_len, used, output + used, - out_len - used, "\r\n unknown cmd!!\n"); -#else - PDM_SNPF(out_len, used, output + used, out_len - used, - "\r\n no TxBF !!\n"); -#endif -#endif - } - break; - + PDM_SNPF(out_len, used, output + used, out_len - used, + "\r\n unknown cmd!!\n"); + #endif + #endif + } break; + */ case PHYDM_H2C: - - for (i = 0; i < 8; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); - input_idx++; - } - } - - if (input_idx >= 1) - phydm_h2C_debug(dm, (u32 *)var1, &used, output, &out_len); - - + phydm_h2C_debug(dm, input, &used, output, &out_len); break; - case PHYDM_ANT_SWITCH: - - for (i = 0; i < 8; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); - input_idx++; - } - } - - if (input_idx >= 1) { -#if (RTL8821A_SUPPORT == 1) - phydm_set_ext_switch(dm, (u32 *)var1, &used, output, &out_len); -#else - PDM_SNPF(out_len, used, output + used, - out_len - used, "Not Support IC"); -#endif - } - - - break; - - case PHYDM_DYNAMIC_RA_PATH: - -#ifdef CONFIG_DYNAMIC_RX_PATH - for (i = 0; i < 8; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); - input_idx++; - } - } - - if (input_idx >= 1) - phydm_drp_debug(dm, (u32 *)var1, &used, output, &out_len); - -#else - PDM_SNPF(out_len, used, output + used, out_len - used, - "Not Support IC"); -#endif - + case PHYDM_EXT_RF_E_CTRL: + phydm_ext_rf_element_ctrl(dm, input, &used, output, &out_len); break; case PHYDM_ADAPTIVE_SOML: - -#ifdef CONFIG_ADAPTIVE_SOML - for (i = 0; i < 8; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); - input_idx++; - } - } - - if (input_idx >= 1) - phydm_soml_debug(dm, (u32 *)var1, &used, output, &out_len); - -#else - PDM_SNPF(out_len, used, output + used, out_len - used, - "Not Support IC"); -#endif - + #ifdef CONFIG_ADAPTIVE_SOML + phydm_soml_debug(dm, input, &used, output, &out_len); + #endif break; case PHYDM_PSD: #ifdef CONFIG_PSD_TOOL - phydm_psd_debug(dm, &input[0], &used, output, &out_len, input_num); + phydm_psd_debug(dm, input, &used, output, &out_len); #endif break; - + case PHYDM_DEBUG_PORT: - { - u32 dbg_port_value; - - PHYDM_SSCANF(input[1], DCMD_HEX, &var1[0]); - - dm->debug_components |= ODM_COMP_API; - if (phydm_set_bb_dbg_port(dm, BB_DBGPORT_PRIORITY_3, var1[0])) {/*set debug port to 0x0*/ - - dbg_port_value = phydm_get_bb_dbg_port_value(dm); - phydm_release_bb_dbg_port(dm); - - PDM_SNPF(out_len, used, output + used, - out_len - used, - "Dbg Port[0x%x] = ((0x%x))\n", - var1[0], dbg_port_value); - } - dm->debug_components &= (~ODM_COMP_API); - } + phydm_print_dbgport(dm, input, &used, output, &out_len); break; - - case PHYDM_DIS_HTSTF_CONTROL: - { - if (input[1]) - PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); - if (var1[0] == 1) { - - /* setting being false is for debug */ - dm->bhtstfdisabled = true; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "Dynamic HT-STF Gain Control is Disable\n"); - } - else { - - /* default setting should be true, always be dynamic control*/ - dm->bhtstfdisabled = false; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "Dynamic HT-STF Gain Control is Enable\n"); - } + case PHYDM_DIS_HTSTF_CONTROL: { + if (input[1]) + PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); + + if (var1[0] == 1) { + /* setting being false is for debug */ + dm->bhtstfdisabled = true; + PDM_SNPF(out_len, used, output + used, out_len - used, + "Dynamic HT-STF Gain Control is Disable\n"); + } else { + /* @default setting should be true, + * always be dynamic control + */ + dm->bhtstfdisabled = false; + PDM_SNPF(out_len, used, output + used, out_len - used, + "Dynamic HT-STF Gain Control is Enable\n"); } - break; - - case PHYDM_TUNE_PARAMETER: - phydm_parameter_adjust(dm, &input[0], &used, output, &out_len, input_num); + } break; + + case PHYDM_CFO_TRK: + phydm_cfo_tracking_debug(dm, input, &used, output, &out_len); break; case PHYDM_ADAPTIVITY_DEBUG: - - for (i = 0; i < 5; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); - input_idx++; - } - } - - if (input_idx >= 1) - phydm_adaptivity_debug(dm, (u32 *)var1, &used, output, &out_len); - + #ifdef PHYDM_SUPPORT_ADAPTIVITY + phydm_adaptivity_debug(dm, input, &used, output, &out_len); + #endif break; - case PHYDM_DIS_DYM_ANT_WEIGHTING: + case PHYDM_DIS_DYM_ANT_WEIGHTING: #ifdef DYN_ANT_WEIGHTING_SUPPORT - phydm_dyn_ant_weight_dbg(dm, &input[0], &used, output, &out_len, input_num); + phydm_ant_weight_dbg(dm, input, &used, output, &out_len); #endif break; case PHYDM_FORECE_PT_STATE: - { - #ifdef PHYDM_POWER_TRAINING_SUPPORT - phydm_pow_train_debug(dm, &input[0], &used, output, &out_len, input_num); - #else - PDM_SNPF(out_len, used, output + used, out_len - used, "Pow training: Not Support\n"); + #ifdef PHYDM_POWER_TRAINING_SUPPORT + phydm_pow_train_debug(dm, input, &used, output, &out_len); #endif - break; - } - case PHYDM_DIS_RXHP_CTR: - { - if (input[1]) - PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); - - if (var1[0] == 1) { - /* the setting being on is at debug mode to disconnect RxHP seeting with SoML on/odd */ - dm->disrxhpsoml = true; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "Dynamic RxHP Control with SoML on/off is Disable\n"); - } - else if (var1[0] == 0) { - /* default setting, RxHP setting will follow SoML on/off setting */ - dm->disrxhpsoml = false; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "Dynamic RxHP Control with SoML on/off is Enable\n"); - } - else { - dm->disrxhpsoml = false; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "Default Setting, Dynamic RxHP Control with SoML on/off is Enable\n"); - } - } - break; - case PHYDM_STA_INFO: - phydm_show_sta_info(dm, &input[0], &used, output, &out_len, input_num); + phydm_show_sta_info(dm, input, &used, output, &out_len); break; case PHYDM_PAUSE_FUNC: - phydm_pause_func_console(dm, &input[0], &used, output, &out_len, input_num); + phydm_pause_func_console(dm, input, &used, output, &out_len); break; case PHYDM_PER_TONE_EVM: - phydm_per_tone_evm(dm, &input[0], &used, output, &out_len, input_num); + phydm_per_tone_evm(dm, input, &used, output, &out_len); break; + #ifdef CONFIG_DYNAMIC_TX_TWR + case PHYDM_DYN_TXPWR: + phydm_dtp_debug(dm, input, &used, output, &out_len); + break; + #endif + + case PHYDM_LNA_SAT: + #ifdef PHYDM_LNA_SAT_CHK_SUPPORT + phydm_lna_sat_debug(dm, input, &used, output, &out_len); + #endif + break; + + case PHYDM_ANAPAR: + phydm_get_anapar_table(dm, &used, output, &out_len); + break; + case PHYDM_BEAM_FORMING: + #ifdef CONFIG_BB_TXBF_API + phydm_bf_debug(dm, input, &used, output, &out_len); + #endif + break; + +#if RTL8814B_SUPPORT + case PHYDM_SPUR_DETECT: + phydm_spur_detect_dbg(dm, input, &used, output, &out_len); + break; +#endif default: PDM_SNPF(out_len, used, output + used, out_len - used, - "SET, unknown command!\n"); + "Do not support this command\n"); break; - } -#endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ +#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ } -#ifdef __ECOS +#if defined __ECOS || defined __ICCARM__ char *strsep(char **s, const char *ct) { char *sbegin = *s; char *end; - if (sbegin == NULL) + if (!sbegin) return NULL; end = strpbrk(sbegin, ct); @@ -3465,28 +5065,24 @@ char *strsep(char **s, const char *ct) } #endif -#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP)) -s32 -phydm_cmd( - struct dm_struct *dm, - char *input, - u32 in_len, - u8 flag, - char *output, - u32 out_len -) +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP | ODM_IOT)) +s32 phydm_cmd(struct dm_struct *dm, char *input, u32 in_len, u8 flag, + char *output, u32 out_len) { char *token; - u32 argc = 0; - char argv[MAX_ARGC][MAX_ARGV]; + u32 argc = 0; + char argv[MAX_ARGC][MAX_ARGV]; do { token = strsep(&input, ", "); if (token) { - strcpy(argv[argc], token); + if (strlen(token) <= MAX_ARGV) + strcpy(argv[argc], token); + argc++; - } else + } else { break; + } } while (argc < MAX_ARGC); if (argc == 1) @@ -3498,25 +5094,18 @@ phydm_cmd( } #endif - -void -phydm_fw_trace_handler( - void *dm_void, - u8 *cmd_buf, - u8 cmd_len -) +void phydm_fw_trace_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len) { #ifdef CONFIG_PHYDM_DEBUG_FUNCTION - struct dm_struct *dm = (struct dm_struct *)dm_void; - - /*u8 debug_trace_11byte[60];*/ - u8 freg_num, c2h_seq, buf_0 = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + /*@u8 debug_trace_11byte[60];*/ + u8 freg_num, c2h_seq, buf_0 = 0; if (!(dm->support_ic_type & PHYDM_IC_3081_SERIES)) return; - if ((cmd_len > 12) || (cmd_len == 0)) { + if (cmd_len > 12 || cmd_len == 0) { pr_debug("[Warning] Error C2H cmd_len=%d\n", cmd_len); return; } @@ -3524,28 +5113,39 @@ phydm_fw_trace_handler( buf_0 = cmd_buf[0]; freg_num = (buf_0 & 0xf); c2h_seq = (buf_0 & 0xf0) >> 4; - /*PHYDM_DBG(dm, DBG_FW_TRACE,"[FW debug message] freg_num = (( %d )), c2h_seq = (( %d ))\n", freg_num,c2h_seq );*/ - /*strncpy(debug_trace_11byte,&cmd_buf[1],(cmd_len-1));*/ - /*debug_trace_11byte[cmd_len-1] = '\0';*/ - /*PHYDM_DBG(dm, DBG_FW_TRACE,"[FW debug message] %s\n", debug_trace_11byte);*/ - /*PHYDM_DBG(dm, DBG_FW_TRACE,"[FW debug message] cmd_len = (( %d ))\n", cmd_len);*/ - /*PHYDM_DBG(dm, DBG_FW_TRACE,"[FW debug message] c2h_cmd_start = (( %d ))\n", dm->c2h_cmd_start);*/ + #if 0 + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW debug message] freg_num = (( %d )), c2h_seq=(( %d ))\n", + freg_num, c2h_seq); + strncpy(debug_trace_11byte, &cmd_buf[1], (cmd_len - 1)); + debug_trace_11byte[cmd_len - 1] = '\0'; + PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] %s\n", + debug_trace_11byte); + PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] cmd_len = (( %d ))\n", + cmd_len); + PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] c2h_cmd_start=((%d))\n", + dm->c2h_cmd_start); + PHYDM_DBG(dm, DBG_FW_TRACE, "pre_seq = (( %d )), current_seq=((%d))\n", + dm->pre_c2h_seq, c2h_seq); + PHYDM_DBG(dm, DBG_FW_TRACE, "fw_buff_is_enpty = (( %d ))\n", + dm->fw_buff_is_enpty); + #endif - /*PHYDM_DBG(dm, DBG_FW_TRACE,"pre_seq = (( %d )), current_seq = (( %d ))\n", dm->pre_c2h_seq, c2h_seq);*/ - /*PHYDM_DBG(dm, DBG_FW_TRACE,"fw_buff_is_enpty = (( %d ))\n", dm->fw_buff_is_enpty);*/ - - if ((c2h_seq != dm->pre_c2h_seq) && dm->fw_buff_is_enpty == false) { + if (c2h_seq != dm->pre_c2h_seq && dm->fw_buff_is_enpty == false) { dm->fw_debug_trace[dm->c2h_cmd_start] = '\0'; - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW Dbg Queue Overflow] %s\n", dm->fw_debug_trace); + PHYDM_DBG(dm, DBG_FW_TRACE, "[FW Dbg Queue Overflow] %s\n", + dm->fw_debug_trace); dm->c2h_cmd_start = 0; } if ((cmd_len - 1) > (60 - dm->c2h_cmd_start)) { dm->fw_debug_trace[dm->c2h_cmd_start] = '\0'; - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW Dbg Queue error: wrong C2H length] %s\n", dm->fw_debug_trace); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW Dbg Queue error: wrong C2H length] %s\n", + dm->fw_debug_trace); dm->c2h_cmd_start = 0; return; } @@ -3561,192 +5161,271 @@ phydm_fw_trace_handler( else dm->fw_debug_trace[59] = '\0'; - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s\n", dm->fw_debug_trace); - /*dbg_print("[FW DBG Msg] %s\n", dm->fw_debug_trace);*/ + PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s\n", + dm->fw_debug_trace); +#if 0 + /*@dbg_print("[FW DBG Msg] %s\n", dm->fw_debug_trace);*/ +#endif dm->c2h_cmd_start = 0; dm->fw_buff_is_enpty = true; } dm->pre_c2h_seq = c2h_seq; -#endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ +#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ } -void -phydm_fw_trace_handler_code( - void *dm_void, - u8 *buffer, - u8 cmd_len -) +void phydm_fw_trace_handler_code(void *dm_void, u8 *buffer, u8 cmd_len) { #ifdef CONFIG_PHYDM_DEBUG_FUNCTION - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 function = buffer[0]; - u8 dbg_num = buffer[1]; - u16 content_0 = (((u16)buffer[3]) << 8) | ((u16)buffer[2]); - u16 content_1 = (((u16)buffer[5]) << 8) | ((u16)buffer[4]); - u16 content_2 = (((u16)buffer[7]) << 8) | ((u16)buffer[6]); - u16 content_3 = (((u16)buffer[9]) << 8) | ((u16)buffer[8]); - u16 content_4 = (((u16)buffer[11]) << 8) | ((u16)buffer[10]); + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 function = buffer[0]; + u8 dbg_num = buffer[1]; + u16 content_0 = (((u16)buffer[3]) << 8) | ((u16)buffer[2]); + u16 content_1 = (((u16)buffer[5]) << 8) | ((u16)buffer[4]); + u16 content_2 = (((u16)buffer[7]) << 8) | ((u16)buffer[6]); + u16 content_3 = (((u16)buffer[9]) << 8) | ((u16)buffer[8]); + u16 content_4 = (((u16)buffer[11]) << 8) | ((u16)buffer[10]); if (cmd_len > 12) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW Msg] Invalid cmd length (( %d )) >12\n", cmd_len); - - /* PHYDM_DBG(dm, DBG_FW_TRACE,"[FW Msg] Func=((%d)), num=((%d)), ct_0=((%d)), ct_1=((%d)), ct_2=((%d)), ct_3=((%d)), ct_4=((%d))\n", */ - /* function, dbg_num, content_0, content_1, content_2, content_3, content_4); */ - - /*--------------------------------------------*/ + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW Msg] Invalid cmd length (( %d )) >12\n", + cmd_len); +/*@--------------------------------------------*/ #ifdef CONFIG_RA_FW_DBG_CODE if (function == RATE_DECISION) { if (dbg_num == 0) { if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] RA_CNT=((%d)) Max_device=((%d))--------------------------->\n", content_1, content_2); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] RA_CNT=((%d)) Max_device=((%d))--------------------------->\n", + content_1, content_2); else if (content_0 == 2) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)), try_bit=((0x%x))\n", content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)), try_bit=((0x%x))\n", + content_1, content_2, content_3, + content_4); else if (content_0 == 3) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] Check RA total=((%d)), drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n", content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] Check RA total=((%d)), drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n", + content_1, content_2, content_3, + content_4); } else if (dbg_num == 1) { if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] RTY[0,1,2,3]=[ %d , %d , %d , %d ]\n", content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] RTY[0,1,2,3]=[ %d , %d , %d , %d ]\n", + content_1, content_2, content_3, + content_4); else if (content_0 == 2) { - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] RTY[4]=[ %d ], drop=(( %d )), total=(( %d )), current_rate=((0x %x ))", content_1, content_2, content_3, content_4); - phydm_print_rate(dm, (u8)content_4, DBG_FW_TRACE); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] RTY[4]=[ %d ], drop=(( %d )), total=(( %d )), current_rate=((0x %x ))", + content_1, content_2, content_3, + content_4); + phydm_print_rate(dm, (u8)content_4, + DBG_FW_TRACE); } else if (content_0 == 3) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] penality_idx=(( %d ))\n", content_1); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] penality_idx=(( %d ))\n", + content_1); else if (content_0 == 4) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] RSSI=(( %d )), ra_stage = (( %d ))\n", content_1, content_2); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] RSSI=(( %d )), ra_stage = (( %d ))\n", + content_1, content_2); } else if (dbg_num == 3) { if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] Fast_RA (( DOWN )) total=((%d)), total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] Fast_RA (( DOWN )) total=((%d)), total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", + content_1, content_2, content_3, + content_4); else if (content_0 == 2) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] Fast_RA (( UP )) total_acc=((%d)), total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] Fast_RA (( UP )) total_acc=((%d)), total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", + content_1, content_2, content_3, + content_4); else if (content_0 == 3) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] Fast_RA (( UP )) ((rate Down Hold)) RA_CNT=((%d))\n", content_1); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] Fast_RA (( UP )) ((rate Down Hold)) RA_CNT=((%d))\n", + content_1); else if (content_0 == 4) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] Fast_RA (( UP )) ((tota_accl<5 skip)) RA_CNT=((%d))\n", content_1); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] Fast_RA (( UP )) ((tota_accl<5 skip)) RA_CNT=((%d))\n", + content_1); else if (content_0 == 8) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n", content_1); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n", + content_1); } else if (dbg_num == 4) { - if (content_0 == 3) { - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] RER_CNT PCR_ori =(( %d )), ratio_ori =(( %d )), pcr_updown_bitmap =(( 0x%x )), pcr_var_diff =(( %d ))\n", content_1, content_2, content_3, content_4); - /**/ - } else if (content_0 == 4) { - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] pcr_shift_value =(( %s%d )), rate_down_threshold =(( %d )), rate_up_threshold =(( %d ))\n", ((content_1) ? "+" : "-"), content_2, content_3, content_4); - /**/ - } else if (content_0 == 5) { - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] pcr_mean =(( %d )), PCR_VAR =(( %d )), offset =(( %d )), decision_offset_p =(( %d ))\n", content_1, content_2, content_3, content_4); - /**/ - } + if (content_0 == 3) + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] RER_CNT PCR_ori =(( %d )), ratio_ori =(( %d )), pcr_updown_bitmap =(( 0x%x )), pcr_var_diff =(( %d ))\n", + content_1, content_2, content_3, + content_4); + else if (content_0 == 4) + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] pcr_shift_value =(( %s%d )), rate_down_threshold =(( %d )), rate_up_threshold =(( %d ))\n", + ((content_1) ? "+" : "-"), content_2, + content_3, content_4); + else if (content_0 == 5) + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] pcr_mean =(( %d )), PCR_VAR =(( %d )), offset =(( %d )), decision_offset_p =(( %d ))\n", + content_1, content_2, content_3, + content_4); } else if (dbg_num == 5) { if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] (( UP)) Nsc=(( %d )), N_High=(( %d )), RateUp_Waiting=(( %d )), RateUp_Fail=(( %d ))\n", content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] (( UP)) Nsc=(( %d )), N_High=(( %d )), RateUp_Waiting=(( %d )), RateUp_Fail=(( %d ))\n", + content_1, content_2, content_3, + content_4); else if (content_0 == 2) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] ((DOWN)) Nsc=(( %d )), N_Low=(( %d ))\n", content_1, content_2); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] ((DOWN)) Nsc=(( %d )), N_Low=(( %d ))\n", + content_1, content_2); else if (content_0 == 3) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] ((HOLD)) Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n", content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] ((HOLD)) Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n", + content_1, content_2, content_3, + content_4); } else if (dbg_num == 0x60) { if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] ((AP RPT)) macid=((%d)), BUPDATE[macid]=((%d))\n", content_1, content_2); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] ((AP RPT)) macid=((%d)), BUPDATE[macid]=((%d))\n", + content_1, content_2); else if (content_0 == 4) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] ((AP RPT)) pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n", content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] ((AP RPT)) pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n", + content_1, content_2, content_3, + content_4); else if (content_0 == 5) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW] ((AP RPT)) PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n", content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW] ((AP RPT)) PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n", + content_1, content_2, content_3, + content_4); } } else if (function == INIT_RA_TABLE) { if (dbg_num == 3) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n", content_0); - } else if (function == RATE_UP) { + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n", + content_0); + } else if (function == RATE_UP) { if (dbg_num == 2) { if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][RateUp] ((Highest rate->return)), macid=((%d)) Nsc=((%d))\n", content_1, content_2); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][RateUp] ((Highest rate->return)), macid=((%d)) Nsc=((%d))\n", + content_1, content_2); } else if (dbg_num == 5) { if (content_0 == 0) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][RateUp] ((rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)), SGI=((%d))\n", content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][RateUp] ((rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)), SGI=((%d))\n", + content_1, content_2, content_3, + content_4); else if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][RateUp] ((rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n", content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][RateUp] ((rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n", + content_1, content_2, content_3, + content_4); } } else if (function == RATE_DOWN) { if (dbg_num == 5) { if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][RateDownStep] ((rate Down)), macid=((%d)), rate1=((0x%x)), rate2=((0x%x)), BW=((%d))\n", content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][RateDownStep] ((rate Down)), macid=((%d)), rate1=((0x%x)), rate2=((0x%x)), BW=((%d))\n", + content_1, content_2, content_3, + content_4); } } else if (function == TRY_DONE) { if (dbg_num == 1) { - if (content_0 == 1) { - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][Try Done] ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n", content_1, content_2); - /**/ - } + if (content_0 == 1) + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][Try Done] ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n", + content_1, content_2); } else if (dbg_num == 2) { - if (content_0 == 1) { - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][Try Done] ((try)) macid=((%d)), Try_Done_cnt=((%d)), rate_2=((%d)), try_succes=((%d))\n", content_1, content_2, content_3, content_4); - /**/ - } + if (content_0 == 1) + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][Try Done] ((try)) macid=((%d)), Try_Done_cnt=((%d)), rate_2=((%d)), try_succes=((%d))\n", + content_1, content_2, content_3, + content_4); } } else if (function == RA_H2C) { if (dbg_num == 1) { - if (content_0 == 0) { - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][H2C=0x49] fw_trace_en=((%d)), mode =((%d)), macid=((%d))\n", content_1, content_2, content_3); - /**/ - } + if (content_0 == 0) + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][H2C=0x49] fw_trace_en=((%d)), mode =((%d)), macid=((%d))\n", + content_1, content_2, content_3); } } else if (function == F_RATE_AP_RPT) { if (dbg_num == 1) { if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][AP RPT] ((1)), SPE_STATIS=((0x%x))---------->\n", content_3); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][AP RPT] ((1)), SPE_STATIS=((0x%x))---------->\n", + content_3); } else if (dbg_num == 2) { if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][AP RPT] RTY_all=((%d))\n", content_1); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][AP RPT] RTY_all=((%d))\n", + content_1); } else if (dbg_num == 3) { if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][AP RPT] MACID1[%d], TOTAL=((%d)), RTY=((%d))\n", content_3, content_1, content_2); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][AP RPT] MACID1[%d], TOTAL=((%d)), RTY=((%d))\n", + content_3, content_1, content_2); } else if (dbg_num == 4) { if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][AP RPT] MACID2[%d], TOTAL=((%d)), RTY=((%d))\n", content_3, content_1, content_2); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][AP RPT] MACID2[%d], TOTAL=((%d)), RTY=((%d))\n", + content_3, content_1, content_2); } else if (dbg_num == 5) { if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][AP RPT] MACID1[%d], PASS=((%d)), DROP=((%d))\n", content_3, content_1, content_2); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][AP RPT] MACID1[%d], PASS=((%d)), DROP=((%d))\n", + content_3, content_1, content_2); } else if (dbg_num == 6) { if (content_0 == 1) - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][AP RPT] MACID2[%d],, PASS=((%d)), DROP=((%d))\n", content_3, content_1, content_2); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][AP RPT] MACID2[%d],, PASS=((%d)), DROP=((%d))\n", + content_3, content_1, content_2); } } else if (function == DBC_FW_CLM) { - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][CLM][%d, %d] = {%d, %d, %d, %d}\n", dbg_num, content_0, content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][CLM][%d, %d] = {%d, %d, %d, %d}\n", dbg_num, + content_0, content_1, content_2, content_3, + content_4); } else { - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function, dbg_num, content_0, content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", + function, dbg_num, content_0, content_1, content_2, + content_3, content_4); } #else - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function, dbg_num, content_0, content_1, content_2, content_3, content_4); + PHYDM_DBG(dm, DBG_FW_TRACE, + "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function, + dbg_num, content_0, content_1, content_2, content_3, + content_4); #endif - /*--------------------------------------------*/ +/*@--------------------------------------------*/ -#endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ +#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ } -void -phydm_fw_trace_handler_8051( - void *dm_void, - u8 *buffer, - u8 cmd_len -) +void phydm_fw_trace_handler_8051(void *dm_void, u8 *buffer, u8 cmd_len) { #ifdef CONFIG_PHYDM_DEBUG_FUNCTION - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if 0 if (cmd_len >= 3) cmd_buf[cmd_len - 1] = '\0'; - PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s\n", &(cmd_buf[3])); + PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s\n", &cmd_buf[3]); #else int i = 0; - u8 extend_c2h_sub_id = 0, extend_c2h_dbg_len = 0, extend_c2h_dbg_seq = 0; - u8 fw_debug_trace[128]; - u8 *extend_c2h_dbg_content = 0; + u8 extend_c2h_sub_id = 0, extend_c2h_dbg_len = 0; + u8 extend_c2h_dbg_seq = 0; + u8 fw_debug_trace[128]; + u8 *extend_c2h_dbg_content = 0; if (cmd_len > 127) return; extend_c2h_sub_id = buffer[0]; extend_c2h_dbg_len = buffer[1]; - extend_c2h_dbg_content = buffer + 2; /*DbgSeq+DbgContent for show HEX*/ + extend_c2h_dbg_content = buffer + 2; /*@DbgSeq+DbgContent for show HEX*/ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) RT_DISP(FC2H, C2H_Summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, extend_c2h_dbg_len=%d\n", @@ -3764,23 +5443,22 @@ go_backfor_aggre_dbg_pkt: RT_DISP(FC2H, C2H_Summary, ("[RTKFW, SEQ= %d] :", extend_c2h_dbg_seq)); #endif - for (; ; i++) { + for (;; i++) { fw_debug_trace[i] = extend_c2h_dbg_content[i]; if (extend_c2h_dbg_content[i + 1] == '\0') { fw_debug_trace[i + 1] = '\0'; - PHYDM_DBG(dm, DBG_FW_TRACE, - "[FW DBG Msg] %s", &fw_debug_trace[0]); + PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s", + &fw_debug_trace[0]); break; } else if (extend_c2h_dbg_content[i] == '\n') { fw_debug_trace[i + 1] = '\0'; - PHYDM_DBG(dm, DBG_FW_TRACE, - "[FW DBG Msg] %s", &fw_debug_trace[0]); + PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s", + &fw_debug_trace[0]); buffer = extend_c2h_dbg_content + i + 3; goto go_backfor_aggre_dbg_pkt; } } - #endif -#endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ +#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ } diff --git a/hal/phydm/phydm_debug.h b/hal/phydm/phydm_debug.h index 67e190e..bee99ad 100644 --- a/hal/phydm/phydm_debug.h +++ b/hal/phydm/phydm_debug.h @@ -23,101 +23,86 @@ * *****************************************************************************/ -#ifndef __ODM_DBG_H__ +#ifndef __ODM_DBG_H__ #define __ODM_DBG_H__ -/*#define DEBUG_VERSION "1.1"*/ /*2015.07.29 YuChen*/ -/*#define DEBUG_VERSION "1.2"*/ /*2015.08.28 Dino*/ -/*#define DEBUG_VERSION "1.3"*/ /*2016.04.28 YuChen*/ -#define DEBUG_VERSION "1.4" /*2017.03.13 Dino*/ +/*@#define DEBUG_VERSION "1.1"*/ /*@2015.07.29 YuChen*/ +/*@#define DEBUG_VERSION "1.2"*/ /*@2015.08.28 Dino*/ +/*@#define DEBUG_VERSION "1.3"*/ /*@2016.04.28 YuChen*/ +/*@#define DEBUG_VERSION "1.4"*/ /*@2017.03.13 Dino*/ +#define DEBUG_VERSION "2.0" /*@2018.01.10 Dino*/ -/* ----------------------------------------------------------------------------- - * Define the debug levels - * - * 1. DBG_TRACE and DBG_LOUD are used for normal cases. - * So that, they can help SW engineer to develope or trace states changed - * and also help HW enginner to trace every operation to and from HW, - * e.g IO, Tx, Rx. - * - * 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases, - * which help us to debug SW or HW. - * - * ----------------------------------------------------------------------------- - * - * Never used in a call to ODM_RT_TRACE()! - * */ -#define ODM_DBG_OFF 1 +/*@ + * ============================================================ + * Definition + * ============================================================ + */ -/* - * Fatal bug. - * For example, Tx/Rx/IO locked up, OS hangs, memory access violation, - * resource allocation failed, unexpected HW behavior, HW BUG and so on. - * */ -#define ODM_DBG_SERIOUS 2 - -/* - * Abnormal, rare, or unexpeted cases. - * For example, IRP/Packet/OID canceled, device suprisely unremoved and so on. - * */ -#define ODM_DBG_WARNING 3 - -/* - * Normal case with useful information about current SW or HW state. - * For example, Tx/Rx descriptor to fill, Tx/Rx descriptor completed status, - * SW protocol state change, dynamic mechanism state change and so on. - * */ -#define ODM_DBG_LOUD 4 - -/* - * Normal case with detail execution flow or information. - * */ -#define ODM_DBG_TRACE 5 - -/*FW DBG MSG*/ -#define RATE_DECISION 1 -#define INIT_RA_TABLE 2 -#define RATE_UP 4 +/*@FW DBG MSG*/ +#define RATE_DECISION 1 +#define INIT_RA_TABLE 2 +#define RATE_UP 4 #define RATE_DOWN 8 #define TRY_DONE 16 #define RA_H2C 32 -#define F_RATE_AP_RPT 64 -#define DBC_FW_CLM 9 +#define F_RATE_AP_RPT 64 +#define DBC_FW_CLM 9 -/* ----------------------------------------------------------------------------- +#define PHYDM_SNPRINT_SIZE 64 +/* @---------------------------------------------------------------------------- * Define the tracing components * * ----------------------------------------------------------------------------- - *BB FW Functions*/ -#define PHYDM_FW_COMP_RA BIT(0) -#define PHYDM_FW_COMP_MU BIT(1) -#define PHYDM_FW_COMP_PATH_DIV BIT(2) -#define PHYDM_FW_COMP_PT BIT(3) + * BB FW Functions + */ +#define PHYDM_FW_COMP_RA BIT(0) +#define PHYDM_FW_COMP_MU BIT(1) +#define PHYDM_FW_COMP_PATH_DIV BIT(2) +#define PHYDM_FW_COMP_PT BIT(3) -/*------------------------Export Marco Definition---------------------------*/ +/*@------------------------Export Marco Definition---------------------------*/ -#define config_phydm_read_txagc_check(data) (data != INVALID_TXAGC_DATA) +#define config_phydm_read_txagc_check(data) (data != INVALID_TXAGC_DATA) #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - extern VOID DCMD_Printf(const char *pMsg); + #if (DBG_CMD_SUPPORT == 1) + extern VOID DCMD_Printf(const char *pMsg); + #else + #define DCMD_Printf(_pMsg) + #endif - #define pr_debug DbgPrint - #define dcmd_printf DCMD_Printf - #define dcmd_scanf DCMD_Scanf - #define RT_PRINTK pr_debug + #if OS_WIN_FROM_WIN10(OS_VERSION) + #define pr_debug(fmt, ...) DbgPrintEx(DPFLTR_IHVNETWORK_ID, DPFLTR_ERROR_LEVEL, fmt, ##__VA_ARGS__) + #else + #define pr_debug DbgPrint + #endif + + #define dcmd_printf DCMD_Printf + #define dcmd_scanf DCMD_Scanf + #define RT_PRINTK pr_debug #define PRINT_MAX_SIZE 512 + #define PHYDM_SNPRINTF RT_SPRINTF + #define PHYDM_TRACE(_MSG_) EXhalPHYDMoutsrc_Print(_MSG_) #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - + #define PHYDM_SNPRINTF snprintf #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - #undef pr_debug - #define pr_debug printk + #undef pr_debug + #define pr_debug printk #define RT_PRINTK(fmt, args...) pr_debug(fmt, ## args) #define RT_DISP(dbgtype, dbgflag, printstr) #define RT_TRACE(adapter, comp, drv_level, fmt, args...) \ RTW_INFO(fmt, ## args) + #define PHYDM_SNPRINTF snprintf +#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) + #define pr_debug(fmt, args...) RTW_PRINT_MSG(fmt, ## args) + #define RT_DEBUG(comp, drv_level, fmt, args...) \ + RTW_PRINT_MSG(fmt, ## args) + #define PHYDM_SNPRINTF snprintf #else #define pr_debug panic_printk - /*#define RT_PRINTK(fmt, args...) pr_debug("%s(): " fmt, __FUNCTION__, ## args);*/ + /*@#define RT_PRINTK(fmt, args...) pr_debug("%s(): " fmt, __FUNCTION__, ## args);*/ #define RT_PRINTK(fmt, args...) pr_debug(fmt, ## args) + #define PHYDM_SNPRINTF snprintf #endif #ifndef ASSERT @@ -128,16 +113,16 @@ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #define PHYDM_DBG(dm, comp, fmt, args...) \ do { \ - if ((comp) & (dm->debug_components)) { \ + if ((comp) & dm->debug_components) { \ pr_debug("[PHYDM] "); \ - RT_PRINTK(fmt, ## args); \ + RT_PRINTK(fmt, ## args); \ } \ } while (0) #define PHYDM_DBG_F(dm, comp, fmt, args...) \ do { \ if ((comp) & dm->debug_components) { \ - RT_PRINTK(fmt, ## args); \ + RT_PRINTK(fmt, ## args); \ } \ } while (0) @@ -158,7 +143,6 @@ static __inline void PHYDM_DBG(PDM_ODM_T dm, int comp, char *fmt, ...) { - RT_STATUS rt_status; va_list args; char buf[PRINT_MAX_SIZE] = {0}; @@ -178,12 +162,15 @@ static __inline void PHYDM_DBG(PDM_ODM_T dm, int comp, char *fmt, ...) return; } - DbgPrint("[PHYDM] %s", buf); + #if OS_WIN_FROM_WIN10(OS_VERSION) + DbgPrintEx(DPFLTR_IHVNETWORK_ID, DPFLTR_ERROR_LEVEL, "%s", buf); + #else + DbgPrint("%s", buf); + #endif } static __inline void PHYDM_DBG_F(PDM_ODM_T dm, int comp, char *fmt, ...) { - RT_STATUS rt_status; va_list args; char buf[PRINT_MAX_SIZE] = {0}; @@ -199,79 +186,141 @@ static __inline void PHYDM_DBG_F(PDM_ODM_T dm, int comp, char *fmt, ...) va_end(args); if (rt_status != RT_STATUS_SUCCESS) { - /*DbgPrint("DM Print Fail\n");*/ + /*@DbgPrint("DM Print Fail\n");*/ return; } + #if OS_WIN_FROM_WIN10(OS_VERSION) + DbgPrintEx(DPFLTR_IHVNETWORK_ID, DPFLTR_ERROR_LEVEL, "%s", buf); + #else DbgPrint("%s", buf); + #endif } -#define PHYDM_PRINT_ADDR(p_dm, comp, title_str, ptr) do {\ - if ((comp) & p_dm->debug_components) { \ - \ - int __i; \ - u8 *__ptr = (u8 *)ptr; \ - pr_debug("[PHYDM] "); \ - pr_debug(title_str); \ - pr_debug(" "); \ - for (__i = 0; __i < 6; __i++) \ - pr_debug("%02X%s", __ptr[__i], (__i == 5) ? "" : "-"); \ - pr_debug("\n"); \ +#define PHYDM_PRINT_ADDR(p_dm, comp, title_str, ptr) \ + do { \ + if ((comp) & p_dm->debug_components) { \ + \ + int __i; \ + u8 *__ptr = (u8 *)ptr; \ + pr_debug("[PHYDM] "); \ + pr_debug(title_str); \ + pr_debug(" "); \ + for (__i = 0; __i < 6; __i++) \ + pr_debug("%02X%s", __ptr[__i], (__i == 5) ? "" : "-"); \ + pr_debug("\n"); \ } \ } while (0) +#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) + +#define PHYDM_DBG(dm, comp, fmt, args...) \ + do { \ + if ((comp) & dm->debug_components) { \ + RT_DEBUG(COMP_PHYDM, \ + DBG_DMESG, "[PHYDM] " fmt, ##args); \ + } \ + } while (0) + +#define PHYDM_DBG_F(dm, comp, fmt, args...) \ + do { \ + if ((comp) & dm->debug_components) { \ + RT_DEBUG(COMP_PHYDM, \ + DBG_DMESG, fmt, ##args); \ + } \ + } while (0) + +#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr) \ + do { \ + if ((comp) & dm->debug_components) { \ + RT_DEBUG(COMP_PHYDM, \ + DBG_DMESG, "[PHYDM] " title_str "%pM\n", \ + addr); \ + } \ + } while (0) + +#elif defined(DM_ODM_CE_MAC80211_V2) + +#define PHYDM_DBG(dm, comp, fmt, args...) +#define PHYDM_DBG_F(dm, comp, fmt, args...) +#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr) #else -#define PHYDM_DBG(dm, comp, fmt, args...) \ - do { \ - if ((comp) & (dm->debug_components)) { \ - RT_TRACE(((struct rtl_priv *)dm->adapter), COMP_PHYDM, \ - DBG_DMESG, "[PHYDM] " fmt, ##args); \ - } \ + +#define PHYDM_DBG(dm, comp, fmt, args...) \ + do { \ + struct dm_struct *__dm = (dm); \ + if ((comp) & __dm->debug_components) { \ + RT_TRACE(((struct rtl_priv *)__dm->adapter),\ + COMP_PHYDM, DBG_DMESG, \ + "[PHYDM] " fmt, ##args); \ + } \ } while (0) -#define PHYDM_DBG_F(dm, comp, fmt, args...) \ - do { \ - if ((comp) & dm->debug_components) { \ - RT_TRACE(((struct rtl_priv *)dm->adapter), COMP_PHYDM, \ - DBG_DMESG, fmt, ##args); \ +#define PHYDM_DBG_F(dm, comp, fmt, args...) \ + do { \ + struct dm_struct *__dm = (dm); \ + if ((comp) & __dm->debug_components) { \ + RT_TRACE(((struct rtl_priv *)__dm->adapter),\ + COMP_PHYDM, DBG_DMESG, fmt, ##args); \ } \ } while (0) -#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr) \ - do { \ - if ((comp) & dm->debug_components) { \ - RT_TRACE(((struct rtl_priv *)dm->adapter), COMP_PHYDM, \ - DBG_DMESG, "[PHYDM] " title_str "%pM\n", \ - addr); \ - } \ +#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr) \ + do { \ + struct dm_struct *__dm = (dm); \ + if ((comp) & __dm->debug_components) { \ + RT_TRACE(((struct rtl_priv *)__dm->adapter),\ + COMP_PHYDM, DBG_DMESG, \ + "[PHYDM] " title_str "%pM\n", addr);\ + } \ } while (0) #endif -#define ODM_RT_TRACE(dm, comp, level, fmt) - -#else +#else /*@#if DBG*/ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -static __inline void PHYDM_DBG(struct dm_struct *dm, int comp, char *fmt, ...) -{} -static __inline void PHYDM_DBG_F(struct dm_struct *dm, int comp, char *fmt, ...) -{} +static __inline void PHYDM_DBG(struct dm_struct *dm, int comp, char *fmt, ...) +{ + RT_STATUS rt_status; + va_list args; + char buf[PRINT_MAX_SIZE] = {0}; + + if ((comp & dm->debug_components) == 0) + return; + + if (fmt == NULL) + return; + + va_start(args, fmt); + rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args); + va_end(args); + + if (rt_status != RT_STATUS_SUCCESS) { + DbgPrint("Failed (%d) to print message to buffer\n", rt_status); + return; + } + + PHYDM_TRACE(buf); +} +static __inline void PHYDM_DBG_F(struct dm_struct *dm, int comp, char *fmt, ...) +{ +} #else -#define PHYDM_DBG(dm, comp, fmt) -#define PHYDM_DBG_F(dm, comp, fmt) +#define PHYDM_DBG(dm, comp, fmt, args...) +#define PHYDM_DBG_F(dm, comp, fmt, args...) #endif #define PHYDM_PRINT_ADDR(dm, comp, title_str, ptr) -#define ODM_RT_TRACE(dm, comp, level, fmt) + #endif -#define BB_DBGPORT_PRIORITY_3 3 /*Debug function (the highest priority)*/ -#define BB_DBGPORT_PRIORITY_2 2 /*Check hang function & Strong function*/ -#define BB_DBGPORT_PRIORITY_1 1 /*Watch dog function*/ -#define BB_DBGPORT_RELEASE 0 /*Init value (the lowest priority)*/ +#define DBGPORT_PRI_3 3 /*@Debug function (the highest priority)*/ +#define DBGPORT_PRI_2 2 /*@Check hang function & Strong function*/ +#define DBGPORT_PRI_1 1 /*Watch dog function*/ +#define DBGPORT_RELEASE 0 /*@Init value (the lowest priority)*/ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #define PHYDM_DBGPRINT 0 #define PHYDM_SSCANF(x, y, z) dcmd_scanf(x, y, z) -#define PHYDM_VAST_INFO_SNPRINTF PDM_SNPF +#define PDM_VAST_SNPF PDM_SNPF #if (PHYDM_DBGPRINT == 1) #define PDM_SNPF(msg) \ do {\ @@ -280,7 +329,8 @@ static __inline void PHYDM_DBG_F(struct dm_struct *dm, int comp, char *fmt, ...) } while (0) #else -static __inline void PDM_SNPF(u32 out_len, u32 used, char * buff, int len, char *fmt, ...) +static __inline void PDM_SNPF(u32 out_len, u32 used, char *buff, int len, + char *fmt, ...) { RT_STATUS rt_status; va_list args; @@ -294,33 +344,45 @@ static __inline void PDM_SNPF(u32 out_len, u32 used, char * buff, int len, char va_end(args); if (rt_status != RT_STATUS_SUCCESS) { - /*DbgPrint("DM Print Fail\n");*/ + /*@DbgPrint("DM Print Fail\n");*/ return; } DCMD_Printf(buf); } -#endif /*#if (PHYDM_DBGPRINT == 1)*/ -#else /*(DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))*/ + + +#endif /*@#if (PHYDM_DBGPRINT == 1)*/ +#else /*@(DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))*/ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) || defined(__OSK__) - #define PHYDM_DBGPRINT 0 + #define PHYDM_DBGPRINT 0 #else - #define PHYDM_DBGPRINT 1 + #define PHYDM_DBGPRINT 1 #endif -#define MAX_ARGC 20 -#define MAX_ARGV 16 -#define DCMD_DECIMAL "%d" -#define DCMD_CHAR "%c" -#define DCMD_HEX "%x" +#define MAX_ARGC 20 +#define MAX_ARGV 16 +#define DCMD_DECIMAL "%d" +#define DCMD_CHAR "%c" +#define DCMD_HEX "%x" #define PHYDM_SSCANF(x, y, z) sscanf(x, y, z) -#define PHYDM_VAST_INFO_SNPRINTF(out_len, used, buff, len, fmt, args...) \ +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) +#define PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...) RT_PRINTK(fmt, ## args) + +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) +#define PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...) \ do { \ - RT_TRACE(((struct rtl_priv *)dm->adapter), COMP_PHYDM, \ - DBG_DMESG, fmt, ##args); \ + RT_DEBUG(COMP_PHYDM, DBG_DMESG, fmt, ##args); \ } while (0) +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) +#define PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...) +#else +#define PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...) \ + RT_TRACE(((struct rtl_priv *)dm->adapter), COMP_PHYDM, \ + DBG_DMESG, fmt, ##args) +#endif #if (PHYDM_DBGPRINT == 1) #define PDM_SNPF(out_len, used, buff, len, fmt, args...) \ @@ -331,30 +393,59 @@ static __inline void PDM_SNPF(u32 out_len, u32 used, char * buff, int len, char #else #define PDM_SNPF(out_len, used, buff, len, fmt, args...) \ do { \ - if (out_len > used) \ - used += snprintf(buff, len, fmt, ##args); \ + u32 *__pdm_snpf_u = &(used); \ + if (out_len > *__pdm_snpf_u) \ + *__pdm_snpf_u += snprintf(buff, len, fmt, ##args);\ } while (0) #endif #endif +/* @1 ============================================================ + * 1 enumeration + * 1 ============================================================ + */ + +enum auto_detection_state { /*@Fast antenna training*/ + AD_LEGACY_MODE = 0, + AD_HT_MODE = 1, + AD_VHT_MODE = 2 +}; + +/*@ + * ============================================================ + * 1 structure + * ============================================================ + */ + +#ifdef CONFIG_PHYDM_DEBUG_FUNCTION +u8 phydm_get_l_sig_rate(void *dm_void, u8 rate_idx_l_sig); +#endif void phydm_init_debug_setting(struct dm_struct *dm); void phydm_bb_dbg_port_header_sel(void *dm_void, u32 header_idx); +u32 phydm_get_bb_dbg_port_idx(void *dm_void); + u8 phydm_set_bb_dbg_port(void *dm_void, u8 curr_dbg_priority, u32 debug_port); void phydm_release_bb_dbg_port(void *dm_void); -u32 phydm_get_bb_dbg_port_value(void *dm_void); +u32 phydm_get_bb_dbg_port_val(void *dm_void); void phydm_reset_rx_rate_distribution(struct dm_struct *dm); void phydm_rx_rate_distribution(void *dm_void); +u16 phydm_rx_avg_phy_rate(void *dm_void); + +void phydm_show_phy_hitogram(void *dm_void); + void phydm_get_avg_phystatus_val(void *dm_void); void phydm_get_phy_statistic(void *dm_void); +void phydm_dm_summary(void *dm_void, u8 macid); + void phydm_basic_dbg_message(void *dm_void); void phydm_basic_profile(void *dm_void, u32 *_used, char *output, @@ -367,17 +458,16 @@ void phydm_cmd_parser(struct dm_struct *dm, char input[][16], u32 input_num, u8 flag, char *output, u32 out_len); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +void phydm_basic_dbg_msg_cli_win(void *dm_void, char *buf); + void phydm_sbd_check( - struct dm_struct *dm -); + struct dm_struct *dm); void phydm_sbd_callback( - struct phydm_timer_list *timer -); + struct phydm_timer_list *timer); void phydm_sbd_workitem_callback( - void *context -); + void *context); #endif void phydm_fw_trace_en_h2c(void *dm_void, boolean enable, @@ -389,4 +479,4 @@ void phydm_fw_trace_handler_code(void *dm_void, u8 *buffer, u8 cmd_len); void phydm_fw_trace_handler_8051(void *dm_void, u8 *cmd_buf, u8 cmd_len); -#endif /* __ODM_DBG_H__ */ +#endif /* @__ODM_DBG_H__ */ diff --git a/hal/phydm/phydm_dfs.c b/hal/phydm/phydm_dfs.c index 2ca538d..9d86970 100644 --- a/hal/phydm/phydm_dfs.c +++ b/hal/phydm/phydm_dfs.c @@ -23,41 +23,100 @@ * *****************************************************************************/ -/* -============================================================ - include files -============================================================ -*/ +/*@ + * ============================================================ + * include files + * ============================================================ + */ #include "mp_precomp.h" #include "phydm_precomp.h" #if defined(CONFIG_PHYDM_DFS_MASTER) -boolean phydm_dfs_is_meteorology_channel(void *dm_void){ +boolean phydm_dfs_is_meteorology_channel(void *dm_void) +{ struct dm_struct *dm = (struct dm_struct *)dm_void; - - u8 c_channel = *dm->channel; - u8 band_width = *dm->band_width; - - return ( (band_width == CHANNEL_WIDTH_80 && (c_channel) >= 116 && (c_channel) <= 128) || - (band_width == CHANNEL_WIDTH_40 && (c_channel) >= 116 && (c_channel) <= 128) || - (band_width == CHANNEL_WIDTH_20 && (c_channel) >= 120 && (c_channel) <= 128) ); + + u8 ch = *dm->channel; + u8 bw = *dm->band_width; + + return ((bw == CHANNEL_WIDTH_80 && (ch) >= 116 && (ch) <= 128) || + (bw == CHANNEL_WIDTH_40 && (ch) >= 116 && (ch) <= 128) || + (bw == CHANNEL_WIDTH_20 && (ch) >= 120 && (ch) <= 128)); +} + +void phydm_dfs_segment_distinguish(void *dm_void, enum rf_syn syn_path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (!(dm->support_ic_type & (ODM_RTL8814B))) + return; + if (syn_path == RF_SYN1) + dm->seg1_dfs_flag = 1; + else + dm->seg1_dfs_flag = 0; +} + +void phydm_dfs_segment_flag_reset(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (!(dm->support_ic_type & (ODM_RTL8814B))) + return; + if (dm->seg1_dfs_flag) + dm->seg1_dfs_flag = 0; } void phydm_radar_detect_reset(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - odm_set_bb_reg(dm, 0x924, BIT(15), 0); - odm_set_bb_reg(dm, 0x924, BIT(15), 1); + if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8822C | ODM_RTL8812F | + ODM_RTL8197G)) { + odm_set_bb_reg(dm, R_0xa40, BIT(15), 0); + odm_set_bb_reg(dm, R_0xa40, BIT(15), 1); + #if (RTL8721D_SUPPORT) + } else if (dm->support_ic_type & (ODM_RTL8721D)) { + odm_set_bb_reg(dm, R_0xf58, BIT(29), 0); + odm_set_bb_reg(dm, R_0xf58, BIT(29), 1); + #endif + } else if (dm->support_ic_type & (ODM_RTL8814B)) { + if (dm->seg1_dfs_flag == 1) { + odm_set_bb_reg(dm, R_0xa6c, BIT(0), 0); + odm_set_bb_reg(dm, R_0xa6c, BIT(0), 1); + return; + } + odm_set_bb_reg(dm, R_0xa40, BIT(15), 0); + odm_set_bb_reg(dm, R_0xa40, BIT(15), 1); + } else { + odm_set_bb_reg(dm, R_0x924, BIT(15), 0); + odm_set_bb_reg(dm, R_0x924, BIT(15), 1); + } } void phydm_radar_detect_disable(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - odm_set_bb_reg(dm, 0x924, BIT(15), 0); + if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8822C | ODM_RTL8812F | + ODM_RTL8197G)) + odm_set_bb_reg(dm, R_0xa40, BIT(15), 0); + else if (dm->support_ic_type & (ODM_RTL8814B)) { + if (dm->seg1_dfs_flag == 1) { + odm_set_bb_reg(dm, R_0xa6c, BIT(0), 0); + dm->seg1_dfs_flag = 0; + return; + } + odm_set_bb_reg(dm, R_0xa40, BIT(15), 0); + } + #if (RTL8721D_SUPPORT) + else if (dm->support_ic_type & (ODM_RTL8721D)) + odm_set_bb_reg(dm, R_0xf58, BIT(29), 0); + #endif + else + odm_set_bb_reg(dm, R_0x924, BIT(15), 0); + PHYDM_DBG(dm, DBG_DFS, "\n"); } @@ -65,21 +124,53 @@ static void phydm_radar_detect_with_dbg_parm(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - odm_set_bb_reg(dm, 0x918, MASKDWORD, dm->radar_detect_reg_918); - odm_set_bb_reg(dm, 0x91c, MASKDWORD, dm->radar_detect_reg_91c); - odm_set_bb_reg(dm, 0x920, MASKDWORD, dm->radar_detect_reg_920); - odm_set_bb_reg(dm, 0x924, MASKDWORD, dm->radar_detect_reg_924); + if (dm->support_ic_type & ODM_RTL8721D) { + odm_set_bb_reg(dm, R_0xf54, MASKDWORD, + dm->radar_detect_reg_f54); + odm_set_bb_reg(dm, R_0xf58, MASKDWORD, + dm->radar_detect_reg_f58); + odm_set_bb_reg(dm, R_0xf5c, MASKDWORD, + dm->radar_detect_reg_f5c); + odm_set_bb_reg(dm, R_0xf70, MASKDWORD, + dm->radar_detect_reg_f70); + odm_set_bb_reg(dm, R_0xf74, MASKDWORD, + dm->radar_detect_reg_f74); + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + odm_set_bb_reg(dm, R_0xa40, MASKDWORD, + dm->radar_detect_reg_a40); + odm_set_bb_reg(dm, R_0xa44, MASKDWORD, + dm->radar_detect_reg_a44); + odm_set_bb_reg(dm, R_0xa48, MASKDWORD, + dm->radar_detect_reg_a48); + odm_set_bb_reg(dm, R_0xa4c, MASKDWORD, + dm->radar_detect_reg_a4c); + odm_set_bb_reg(dm, R_0xa50, MASKDWORD, + dm->radar_detect_reg_a50); + odm_set_bb_reg(dm, R_0xa54, MASKDWORD, + dm->radar_detect_reg_a54); + } else { + odm_set_bb_reg(dm, R_0x918, MASKDWORD, + dm->radar_detect_reg_918); + odm_set_bb_reg(dm, R_0x91c, MASKDWORD, + dm->radar_detect_reg_91c); + odm_set_bb_reg(dm, R_0x920, MASKDWORD, + dm->radar_detect_reg_920); + odm_set_bb_reg(dm, R_0x924, MASKDWORD, + dm->radar_detect_reg_924); + } } -/* Init radar detection parameters, called after ch, bw is set */ +/* @Init radar detection parameters, called after ch, bw is set */ + void phydm_radar_detect_enable(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _DFS_STATISTICS *dfs = (struct _DFS_STATISTICS *)phydm_get_structure(dm, PHYDM_DFS); + struct _DFS_STATISTICS *dfs = &dm->dfs; u8 region_domain = dm->dfs_region_domain; u8 c_channel = *dm->channel; u8 band_width = *dm->band_width; - u8 enable = 0; + u8 enable = 0, i; + u8 short_pw_upperbound = 0; PHYDM_DBG(dm, DBG_DFS, "test, region_domain = %d\n", region_domain); if (region_domain == PHYDM_DFS_DOMAIN_UNKNOWN) { @@ -88,8 +179,8 @@ void phydm_radar_detect_enable(void *dm_void) } if (dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8812 | ODM_RTL8881A)) { - odm_set_bb_reg(dm, 0x814, 0x3fffffff, 0x04cc4d10); - odm_set_bb_reg(dm, 0x834, MASKBYTE0, 0x06); + odm_set_bb_reg(dm, R_0x814, 0x3fffffff, 0x04cc4d10); + odm_set_bb_reg(dm, R_0x834, MASKBYTE0, 0x06); if (dm->radar_detect_dbg_parm_en) { phydm_radar_detect_with_dbg_parm(dm); @@ -98,51 +189,64 @@ void phydm_radar_detect_enable(void *dm_void) } if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { - odm_set_bb_reg(dm, 0x918, MASKDWORD, 0x1c17ecdf); - odm_set_bb_reg(dm, 0x924, MASKDWORD, 0x01528500); - odm_set_bb_reg(dm, 0x91c, MASKDWORD, 0x0fa21a20); - odm_set_bb_reg(dm, 0x920, MASKDWORD, 0xe0f69204); + odm_set_bb_reg(dm, R_0x918, MASKDWORD, 0x1c17ecdf); + odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x01528500); + odm_set_bb_reg(dm, R_0x91c, MASKDWORD, 0x0fa21a20); + odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0f69204); } else if (region_domain == PHYDM_DFS_DOMAIN_MKK) { - odm_set_bb_reg(dm, 0x924, MASKDWORD, 0x01528500); - odm_set_bb_reg(dm, 0x920, MASKDWORD, 0xe0d67234); + odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x01528500); + odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0d67234); if (c_channel >= 52 && c_channel <= 64) { - odm_set_bb_reg(dm, 0x918, MASKDWORD, 0x1c16ecdf); - odm_set_bb_reg(dm, 0x91c, MASKDWORD, 0x0f141a20); + odm_set_bb_reg(dm, R_0x918, MASKDWORD, + 0x1c16ecdf); + odm_set_bb_reg(dm, R_0x91c, MASKDWORD, + 0x0f141a20); } else { - odm_set_bb_reg(dm, 0x918, MASKDWORD, 0x1c16acdf); + odm_set_bb_reg(dm, R_0x918, MASKDWORD, + 0x1c16acdf); if (band_width == CHANNEL_WIDTH_20) - odm_set_bb_reg(dm, 0x91c, MASKDWORD, 0x64721a20); + odm_set_bb_reg(dm, R_0x91c, MASKDWORD, + 0x64721a20); else - odm_set_bb_reg(dm, 0x91c, MASKDWORD, 0x68721a20); + odm_set_bb_reg(dm, R_0x91c, MASKDWORD, + 0x68721a20); } } else if (region_domain == PHYDM_DFS_DOMAIN_FCC) { - odm_set_bb_reg(dm, 0x918, MASKDWORD, 0x1c16acdf); - odm_set_bb_reg(dm, 0x924, MASKDWORD, 0x01528500); - odm_set_bb_reg(dm, 0x920, MASKDWORD, 0xe0d67231); + odm_set_bb_reg(dm, R_0x918, MASKDWORD, 0x1c16acdf); + odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x01528500); + odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0d67231); if (band_width == CHANNEL_WIDTH_20) - odm_set_bb_reg(dm, 0x91c, MASKDWORD, 0x64741a20); + odm_set_bb_reg(dm, R_0x91c, MASKDWORD, + 0x64741a20); else - odm_set_bb_reg(dm, 0x91c, MASKDWORD, 0x68741a20); + odm_set_bb_reg(dm, R_0x91c, MASKDWORD, + 0x68741a20); } else { /* not supported */ - PHYDM_DBG(dm, DBG_DFS, "Unsupported dfs_region_domain:%d\n", region_domain); + PHYDM_DBG(dm, DBG_DFS, + "Unsupported dfs_region_domain:%d\n", + region_domain); goto exit; } - } else if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) { - odm_set_bb_reg(dm, 0x814, 0x3fffffff, 0x04cc4d10); - odm_set_bb_reg(dm, 0x834, MASKBYTE0, 0x06); + } else if (dm->support_ic_type & + (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) { - /* 8822B only, when BW = 20M, DFIR output is 40Mhz, but DFS input is 80MMHz, so it need to upgrade to 80MHz */ + odm_set_bb_reg(dm, R_0x814, 0x3fffffff, 0x04cc4d10); + odm_set_bb_reg(dm, R_0x834, MASKBYTE0, 0x06); + + /* @8822B only, when BW = 20M, DFIR output is 40Mhz, + * but DFS input is 80MMHz, so it need to upgrade to 80MHz + */ if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) { if (band_width == CHANNEL_WIDTH_20) - odm_set_bb_reg(dm, 0x1984, BIT(26), 1); + odm_set_bb_reg(dm, R_0x1984, BIT(26), 1); else - odm_set_bb_reg(dm, 0x1984, BIT(26), 0); + odm_set_bb_reg(dm, R_0x1984, BIT(26), 0); } if (dm->radar_detect_dbg_parm_en) { @@ -152,62 +256,355 @@ void phydm_radar_detect_enable(void *dm_void) } if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { - odm_set_bb_reg(dm, 0x918, MASKDWORD, 0x1c16acdf); - odm_set_bb_reg(dm, 0x924, MASKDWORD, 0x095a8500); - odm_set_bb_reg(dm, 0x91c, MASKDWORD, 0x0fa21a20); - odm_set_bb_reg(dm, 0x920, MASKDWORD, 0xe0f57204); + odm_set_bb_reg(dm, R_0x918, MASKDWORD, 0x1c16acdf); + odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x095a8500); + odm_set_bb_reg(dm, R_0x91c, MASKDWORD, 0x0fc01a1f); + odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0f57204); } else if (region_domain == PHYDM_DFS_DOMAIN_MKK) { - odm_set_bb_reg(dm, 0x924, MASKDWORD, 0x095a8500); - odm_set_bb_reg(dm, 0x920, MASKDWORD, 0xe0d67234); + odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x095a8500); + odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0d67234); if (c_channel >= 52 && c_channel <= 64) { - odm_set_bb_reg(dm, 0x918, MASKDWORD, 0x1c16ecdf); - odm_set_bb_reg(dm, 0x91c, MASKDWORD, 0x0f141a20); + odm_set_bb_reg(dm, R_0x918, MASKDWORD, + 0x1c16ecdf); + odm_set_bb_reg(dm, R_0x91c, MASKDWORD, + 0x0f141a1f); } else { - odm_set_bb_reg(dm, 0x918, MASKDWORD, 0x1c166cdf); + odm_set_bb_reg(dm, R_0x918, MASKDWORD, + 0x1c166cdf); if (band_width == CHANNEL_WIDTH_20) - odm_set_bb_reg(dm, 0x91c, MASKDWORD, 0x64721a20); + odm_set_bb_reg(dm, R_0x91c, MASKDWORD, + 0x64721a1f); else - odm_set_bb_reg(dm, 0x91c, MASKDWORD, 0x68721a20); + odm_set_bb_reg(dm, R_0x91c, MASKDWORD, + 0x68721a1f); } } else if (region_domain == PHYDM_DFS_DOMAIN_FCC) { - odm_set_bb_reg(dm, 0x918, MASKDWORD, 0x1c166cdf); - odm_set_bb_reg(dm, 0x924, MASKDWORD, 0x095a8500); - odm_set_bb_reg(dm, 0x920, MASKDWORD, 0xe0d67231); + odm_set_bb_reg(dm, R_0x918, MASKDWORD, 0x1c176cdf); + odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x095a8400); + odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe076d231); if (band_width == CHANNEL_WIDTH_20) - odm_set_bb_reg(dm, 0x91c, MASKDWORD, 0x64741a20); + odm_set_bb_reg(dm, R_0x91c, MASKDWORD, + 0x64901a1f); else - odm_set_bb_reg(dm, 0x91c, MASKDWORD, 0x68741a20); + odm_set_bb_reg(dm, R_0x91c, MASKDWORD, + 0x62901a1f); } else { /* not supported */ - PHYDM_DBG(dm, DBG_DFS, "Unsupported dfs_region_domain:%d\n", region_domain); + PHYDM_DBG(dm, DBG_DFS, + "Unsupported dfs_region_domain:%d\n", + region_domain); goto exit; } + /*RXHP low corner will extend the pulse width, + *so we need to increase the upper bound. + */ + if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) { + if (odm_get_bb_reg(dm, 0x8d8, + BIT28 | BIT27 | BIT26) == 0) { + short_pw_upperbound = + (u8)odm_get_bb_reg(dm, 0x91c, + BIT23 | BIT22 | + BIT21 | BIT20); + if ((short_pw_upperbound + 4) > 15) + odm_set_bb_reg(dm, 0x91c, + BIT23 | BIT22 | + BIT21 | BIT20, 15); + else + odm_set_bb_reg(dm, 0x91c, + BIT23 | BIT22 | + BIT21 | BIT20, + short_pw_upperbound + 4); + } + /*@if peak index -1~+1, use original NB method*/ + odm_set_bb_reg(dm, 0x19e4, 0x003C0000, 13); + odm_set_bb_reg(dm, 0x924, 0x70000, 0); + } + + if (dm->support_ic_type & (ODM_RTL8881A)) + odm_set_bb_reg(dm, 0xb00, 0xc0000000, 3); + + /*@for 8814 new dfs mechanism setting*/ + if (dm->support_ic_type & + (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) { + /*Turn off dfs scaling factor*/ + odm_set_bb_reg(dm, 0x19e4, 0x1fff, 0x0c00); + /*NonDC peak_th = 2times DC peak_th*/ + odm_set_bb_reg(dm, 0x19e4, 0x30000, 1); + /*power for debug and auto test flow latch after ST*/ + odm_set_bb_reg(dm, 0x9f8, 0xc0000000, 3); + + /*@low pulse width radar pattern will cause wrong drop*/ + /*@disable peak index should the same + *during the same short pulse (new mechan) + */ + odm_set_bb_reg(dm, 0x9f4, 0x80000000, 0); + + /*@disable peak index should the same + *during the same short pulse (old mechan) + */ + odm_set_bb_reg(dm, 0x924, 0x20000000, 0); + + /*@if peak index diff >=2, then drop the result*/ + odm_set_bb_reg(dm, 0x19e4, 0xe000, 2); + if (region_domain == 2) { + if ((c_channel >= 52) && (c_channel <= 64)) { + /*pulse width hist th setting*/ + /*th1=2*04us*/ + odm_set_bb_reg(dm, 0x19e4, + 0xff000000, 2); + /*th2 = 3*0.4us, th3 = 4*0.4us + *th4 = 7*0.4, th5 = 34*0.4 + */ + odm_set_bb_reg(dm, 0x19e8, + MASKDWORD, 0x22070403); + + /*PRI hist th setting*/ + /*th1=42*32us*/ + odm_set_bb_reg(dm, 0x19b8, + 0x00007f80, 42); + /*th2=47*32us, th3=115*32us, + *th4=123*32us, th5=130*32us + */ + odm_set_bb_reg(dm, 0x19ec, + MASKDWORD, 0x827b732f); + } else { + /*pulse width hist th setting*/ + /*th1=2*04us*/ + odm_set_bb_reg(dm, 0x19e4, + 0xff000000, 1); + /*th2 = 13*0.4us, th3 = 26*0.4us + *th4 = 75*0.4us, th5 = 255*0.4us + */ + odm_set_bb_reg(dm, 0x19e8, + MASKDWORD, 0xff4b1a0d); + /*PRI hist th setting*/ + /*th1=4*32us*/ + + odm_set_bb_reg(dm, 0x19b8, + 0x00007f80, 4); + /*th2=8*32us, th3=16*32us, + *th4=32*32us, th5=128*32=4096us + */ + odm_set_bb_reg(dm, 0x19ec, + MASKDWORD, 0x80201008); + } + } + /*@ETSI*/ + else if (region_domain == 3) { + /*pulse width hist th setting*/ + /*th1=2*04us*/ + odm_set_bb_reg(dm, 0x19e4, 0xff000000, 1); + odm_set_bb_reg(dm, 0x19e8, + MASKDWORD, 0x68260d06); + /*PRI hist th setting*/ + /*th1=7*32us*/ + odm_set_bb_reg(dm, 0x19b8, 0x00007f80, 7); + /*th2=40*32us, th3=80*32us, + *th4=110*32us, th5=157*32=5024 + */ + odm_set_bb_reg(dm, 0x19ec, + MASKDWORD, 0xc06e2010); + } + /*@FCC*/ + else if (region_domain == 1) { + /*pulse width hist th setting*/ + /*th1=2*04us*/ + odm_set_bb_reg(dm, 0x19e4, 0xff000000, 2); + /*th2 = 13*0.4us, th3 = 26*0.4us, + *th4 = 75*0.4us, th5 = 255*0.4us + */ + odm_set_bb_reg(dm, 0x19e8, + MASKDWORD, 0xff4b1a0d); + + /*PRI hist th setting*/ + /*th1=4*32us*/ + odm_set_bb_reg(dm, 0x19b8, 0x00007f80, 4); + /*th2=8*32us, th3=21*32us, + *th4=32*32us, th5=96*32=3072 + */ + if (band_width == CHANNEL_WIDTH_20) + odm_set_bb_reg(dm, 0x19ec, + MASKDWORD, 0x60282010); + else + odm_set_bb_reg(dm, 0x19ec, + MASKDWORD, 0x60282420); + } else { + } + } + } else if (dm->support_ic_type & + ODM_IC_JGR3_SERIES) { + if (dm->radar_detect_dbg_parm_en) { + phydm_radar_detect_with_dbg_parm(dm); + enable = 1; + goto exit; + } + if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { + odm_set_bb_reg(dm, R_0xa40, MASKDWORD, 0xb359c5bd); + if (dm->support_ic_type & (ODM_RTL8814B)) { + if (dm->seg1_dfs_flag == 1) + odm_set_bb_reg(dm, R_0xa6c, BIT(0), 1); + } + odm_set_bb_reg(dm, R_0xa44, MASKDWORD, 0x3033bebd); + odm_set_bb_reg(dm, R_0xa48, MASKDWORD, 0x2a521254); + odm_set_bb_reg(dm, R_0xa4c, MASKDWORD, 0xa2533345); + odm_set_bb_reg(dm, R_0xa50, MASKDWORD, 0x605be003); + odm_set_bb_reg(dm, R_0xa54, MASKDWORD, 0x500089e8); + } else if (region_domain == PHYDM_DFS_DOMAIN_MKK) { + odm_set_bb_reg(dm, R_0xa40, MASKDWORD, 0xb359c5bd); + if (dm->support_ic_type & (ODM_RTL8814B)) { + if (dm->seg1_dfs_flag == 1) + odm_set_bb_reg(dm, R_0xa6c, BIT(0), 1); + } + odm_set_bb_reg(dm, R_0xa44, MASKDWORD, 0x3033bebd); + odm_set_bb_reg(dm, R_0xa48, MASKDWORD, 0x2a521254); + odm_set_bb_reg(dm, R_0xa4c, MASKDWORD, 0xa2533345); + odm_set_bb_reg(dm, R_0xa50, MASKDWORD, 0x605be003); + odm_set_bb_reg(dm, R_0xa54, MASKDWORD, 0x500089e8); + } else if (region_domain == PHYDM_DFS_DOMAIN_FCC) { + odm_set_bb_reg(dm, R_0xa40, MASKDWORD, 0xb359c5bd); + if (dm->support_ic_type & (ODM_RTL8814B)) { + if (dm->seg1_dfs_flag == 1) + odm_set_bb_reg(dm, R_0xa6c, BIT(0), 1); + } + odm_set_bb_reg(dm, R_0xa44, MASKDWORD, 0x3033bebd); + odm_set_bb_reg(dm, R_0xa48, MASKDWORD, 0x2a521254); + odm_set_bb_reg(dm, R_0xa4c, MASKDWORD, 0xa2533345); + odm_set_bb_reg(dm, R_0xa50, MASKDWORD, 0x605be003); + odm_set_bb_reg(dm, R_0xa54, MASKDWORD, 0x500089e8); + } else { + /* not supported */ + PHYDM_DBG(dm, DBG_DFS, + "Unsupported dfs_region_domain:%d\n", + region_domain); + goto exit; + } + #if (RTL8721D_SUPPORT) + } else if (dm->support_ic_type & ODM_RTL8721D) { + odm_set_bb_reg(dm, R_0x814, 0x3fffffff, 0x04cc4d10); + /*CCA MASK*/ + odm_set_bb_reg(dm, R_0xc38, 0x07c00000, 0x06); + /*CCA Threshold*/ + odm_set_bb_reg(dm, R_0xc3c, 0x00000007, 0x0); + + if (dm->radar_detect_dbg_parm_en) { + phydm_radar_detect_with_dbg_parm(dm); + enable = 1; + goto exit; + } + + if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { + odm_set_bb_reg(dm, R_0xf54, MASKDWORD, 0x230006a8); + odm_set_bb_reg(dm, R_0xf58, MASKDWORD, 0x354cd7dd); + odm_set_bb_reg(dm, R_0xf5c, MASKDWORD, 0x9984ab25); + odm_set_bb_reg(dm, R_0xf70, MASKDWORD, 0xbd9fab98); + odm_set_bb_reg(dm, R_0xf74, MASKDWORD, 0xcc45029f); + + } else if (region_domain == PHYDM_DFS_DOMAIN_MKK) { + odm_set_bb_reg(dm, R_0xf54, MASKDWORD, 0x230006a8); + odm_set_bb_reg(dm, R_0xf5c, MASKDWORD, 0x9984ab25); + odm_set_bb_reg(dm, R_0xf70, MASKDWORD, 0xbd9fb398); + odm_set_bb_reg(dm, R_0xf74, MASKDWORD, 0xcc450e9d); + + if (c_channel >= 52 && c_channel <= 64) { + odm_set_bb_reg(dm, R_0xf58, MASKDWORD, + 0x354cd7fd); + } else { + odm_set_bb_reg(dm, R_0xf58, MASKDWORD, + 0x354cd7bd); + } + } else if (region_domain == PHYDM_DFS_DOMAIN_FCC) { + odm_set_bb_reg(dm, R_0xf54, MASKDWORD, 0x230006a8); + odm_set_bb_reg(dm, R_0xf58, MASKDWORD, 0x3558d7bd); + odm_set_bb_reg(dm, R_0xf5c, MASKDWORD, 0x9984ab35); + odm_set_bb_reg(dm, R_0xf70, MASKDWORD, 0xbd9fb398); + odm_set_bb_reg(dm, R_0xf74, MASKDWORD, 0xcc444e9d); + } else { + /* not supported */ + PHYDM_DBG(dm, DBG_DFS, + "Unsupported dfs_region_domain:%d\n", + region_domain); + goto exit; + } + + /*if peak index -1~+1, use original NB method*/ + odm_set_bb_reg(dm, R_0xf70, 0x00070000, 0x7); + odm_set_bb_reg(dm, R_0xf74, 0x000c0000, 0); + + /*Turn off dfs scaling factor*/ + odm_set_bb_reg(dm, R_0xf70, 0x00080000, 0x0); + /*NonDC peak_th = 2times DC peak_th*/ + odm_set_bb_reg(dm, R_0xf58, 0x00007800, 1); + + /*low pulse width radar pattern will cause wrong drop*/ + /*disable peak index should the same*/ + /*during the same short pulse (new mechan)*/ + odm_set_bb_reg(dm, R_0xf70, 0x00100000, 0x0); + /*if peak index diff >=2, then drop the result*/ + odm_set_bb_reg(dm, R_0xf70, 0x30000000, 0x2); + #endif } else { - /* not supported IC type*/ - PHYDM_DBG(dm, DBG_DFS, "Unsupported IC type:%d\n", dm->support_ic_type); + /*not supported IC type*/ + PHYDM_DBG(dm, DBG_DFS, "Unsupported IC type:%d\n", + dm->support_ic_type); goto exit; } enable = 1; - dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, 0x91c, 0x000000ff); - dfs->pwdb_th = (u8)odm_get_bb_reg(dm, 0x918, 0x00001f00); - dfs->peak_th = (u8)odm_get_bb_reg(dm, 0x918, 0x00030000); - dfs->short_pulse_cnt_th = (u8)odm_get_bb_reg(dm, 0x920, 0x000f0000); - dfs->long_pulse_cnt_th = (u8)odm_get_bb_reg(dm, 0x920, 0x00f00000); - dfs->peak_window = (u8)odm_get_bb_reg(dm, 0x920, 0x00000300); - dfs->nb2wb_th = (u8)odm_get_bb_reg(dm, 0x920, 0x0000e000); + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0xa40, 0x00007f00); + dfs->pwdb_th_cur = (u8)odm_get_bb_reg(dm, R_0xa50, 0x000000f0); + dfs->peak_th = (u8)odm_get_bb_reg(dm, R_0xa48, 0x00c00000); + dfs->short_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0xa50, + 0x00f00000); + dfs->long_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0xa4c, + 0xf0000000); + dfs->peak_window = (u8)odm_get_bb_reg(dm, R_0xa40, 0x00030000); + dfs->three_peak_opt = (u8)odm_get_bb_reg(dm, R_0xa40, + 0x30000000); + dfs->three_peak_th2 = (u8)odm_get_bb_reg(dm, R_0xa44, + 0x00000007); + #if (RTL8721D_SUPPORT) + } else if (dm->support_ic_type & (ODM_RTL8721D)) { + dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0xf54, + 0x0000001f) << 2); + dfs->st_l2h_cur += (u8)odm_get_bb_reg(dm, R_0xf58, 0xc0000000); + dfs->pwdb_th_cur = (u8)odm_get_bb_reg(dm, R_0xf70, 0x03c00000); + dfs->peak_th = (u8)odm_get_bb_reg(dm, R_0xf5c, 0x00000030); + dfs->short_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0xf70, + 0x00007800); + dfs->long_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0xf74, + 0x0000000f); + dfs->peak_window = (u8)odm_get_bb_reg(dm, R_0xf58, 0x18000000); + dfs->three_peak_opt = (u8)odm_get_bb_reg(dm, R_0xf58, + 0x00030000); + dfs->three_peak_th2 = (u8)odm_get_bb_reg(dm, + R_0xf58, 0x00007c00); + #endif + } else { + dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0x91c, 0x000000ff); + dfs->pwdb_th_cur = (u8)odm_get_bb_reg(dm, R_0x918, 0x00001f00); + dfs->peak_th = (u8)odm_get_bb_reg(dm, R_0x918, 0x00030000); + dfs->short_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0x920, + 0x000f0000); + dfs->long_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0x920, + 0x00f00000); + dfs->peak_window = (u8)odm_get_bb_reg(dm, R_0x920, 0x00000300); + dfs->three_peak_opt = (u8)odm_get_bb_reg(dm, 0x924, 0x00000180); + dfs->three_peak_th2 = (u8)odm_get_bb_reg(dm, 0x924, 0x00007000); + } - phydm_dfs_parameter_init(dm); + phydm_dfs_parameter_init(dm); exit: if (enable) { phydm_radar_detect_reset(dm); - PHYDM_DBG(dm, DBG_DFS, "on cch:%u, bw:%u\n", c_channel, band_width); + PHYDM_DBG(dm, DBG_DFS, "on cch:%u, bw:%u\n", c_channel, + band_width); } else phydm_radar_detect_disable(dm); } @@ -215,61 +612,100 @@ exit: void phydm_dfs_parameter_init(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _DFS_STATISTICS *dfs = (struct _DFS_STATISTICS *)phydm_get_structure(dm, PHYDM_DFS); + struct _DFS_STATISTICS *dfs = &dm->dfs; u8 i; - - dfs->fa_mask_th = 30; - dfs->det_print = 1; - dfs->det_print2 = 0; - dfs->st_l2h_min = 0x20; - dfs->st_l2h_max = 0x4e; - dfs->pwdb_scalar_factor = 12; - dfs->pwdb_th = 8; - for (i = 0 ; i < 5 ; i++) { + for (i = 0; i < 5; i++) { dfs->pulse_flag_hist[i] = 0; + dfs->pulse_type_hist[i] = 0; dfs->radar_det_mask_hist[i] = 0; dfs->fa_inc_hist[i] = 0; } + /*@for dfs mode*/ + dfs->force_TP_mode = 0; + dfs->sw_trigger_mode = 0; + dfs->det_print = 0; + dfs->det_print2 = 0; + dfs->print_hist_rpt = 0; + if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) + dfs->hist_cond_on = 1; + else + dfs->hist_cond_on = 0; + + /*@for dynamic dfs*/ + dfs->pwdb_th = 8; + dfs->fa_mask_th = 30; + dfs->st_l2h_min = 0x20; + dfs->st_l2h_max = 0x4e; + dfs->pwdb_scalar_factor = 12; + + /*@for dfs histogram*/ + dfs->pri_hist_th = 5; + dfs->pri_sum_g1_th = 9; + dfs->pri_sum_g5_th = 5; + dfs->pri_sum_g1_fcc_th = 4; /*@FCC Type6*/ + dfs->pri_sum_g3_fcc_th = 6; + dfs->pri_sum_safe_th = 50; + dfs->pri_sum_safe_fcc_th = 110; /*@30 for AP*/ + dfs->pri_sum_type4_th = 16; + dfs->pri_sum_type6_th = 12; + dfs->pri_sum_g5_under_g1_th = 4; + dfs->pri_pw_diff_th = 4; + dfs->pri_pw_diff_fcc_th = 8; + dfs->pri_pw_diff_fcc_idle_th = 2; + dfs->pri_pw_diff_w53_th = 10; + dfs->pw_std_th = 7; /*@FCC Type4*/ + dfs->pw_std_idle_th = 10; + dfs->pri_std_th = 6; /*@FCC Type3,4,6*/ + dfs->pri_std_idle_th = 10; + dfs->pri_type1_upp_fcc_th = 110; + dfs->pri_type1_low_fcc_th = 50; + dfs->pri_type1_cen_fcc_th = 70; + dfs->pw_g0_th = 8; + dfs->pw_long_lower_th = 6; /*@7->6*/ + dfs->pri_long_upper_th = 30; + dfs->pw_long_lower_20m_th = 7; /*@7 for AP*/ + dfs->pw_long_sum_upper_th = 60; + dfs->type4_pw_max_cnt = 7; + dfs->type4_safe_pri_sum_th = 5; } void phydm_dfs_dynamic_setting( - void *dm_void -){ + void *dm_void) +{ struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _DFS_STATISTICS *dfs = (struct _DFS_STATISTICS *)phydm_get_structure(dm, PHYDM_DFS); + struct _DFS_STATISTICS *dfs = &dm->dfs; - u8 peak_th_cur=0, short_pulse_cnt_th_cur=0, long_pulse_cnt_th_cur=0, three_peak_opt_cur=0, three_peak_th2_cur=0; - u8 peak_window_cur=0, nb2wb_th_cur=0; + u8 peak_th_cur = 0, short_pulse_cnt_th_cur = 0; + u8 long_pulse_cnt_th_cur = 0, three_peak_opt_cur = 0; + u8 three_peak_th2_cur = 0; + u8 peak_window_cur = 0; u8 region_domain = dm->dfs_region_domain; u8 c_channel = *dm->channel; - - if (dm->rx_tp <= 2) { + + if (dm->rx_tp + dm->tx_tp <= 2) { dfs->idle_mode = 1; - if(dfs->force_TP_mode) + if (dfs->force_TP_mode) dfs->idle_mode = 0; - } else{ + } else { dfs->idle_mode = 0; } - if ((dfs->idle_mode == 1)) { /*idle (no traffic)*/ + if (dfs->idle_mode == 1) { /*@idle (no traffic)*/ peak_th_cur = 3; short_pulse_cnt_th_cur = 6; - long_pulse_cnt_th_cur = 13; + long_pulse_cnt_th_cur = 9; peak_window_cur = 2; - nb2wb_th_cur = 6; - three_peak_opt_cur = 1; + three_peak_opt_cur = 0; three_peak_th2_cur = 2; if (region_domain == PHYDM_DFS_DOMAIN_MKK) { - if ((c_channel >= 52) && (c_channel <= 64)) { + if (c_channel >= 52 && c_channel <= 64) { short_pulse_cnt_th_cur = 14; long_pulse_cnt_th_cur = 15; - nb2wb_th_cur = 3; - three_peak_th2_cur = 0; + three_peak_th2_cur = 0; } else { short_pulse_cnt_th_cur = 6; - nb2wb_th_cur = 3; three_peak_th2_cur = 0; long_pulse_cnt_th_cur = 10; } @@ -277,72 +713,176 @@ void phydm_dfs_dynamic_setting( three_peak_th2_cur = 0; } else if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { long_pulse_cnt_th_cur = 15; - if (phydm_dfs_is_meteorology_channel(dm)) {/*need to add check cac end condition*/ + if (phydm_dfs_is_meteorology_channel(dm)) { + /*need to add check cac end condition*/ peak_th_cur = 2; - nb2wb_th_cur = 3; - three_peak_opt_cur = 1; - three_peak_th2_cur = 0; + three_peak_opt_cur = 0; + three_peak_th2_cur = 0; short_pulse_cnt_th_cur = 7; } else { - three_peak_opt_cur = 1; - three_peak_th2_cur = 0; + three_peak_opt_cur = 0; + three_peak_th2_cur = 0; short_pulse_cnt_th_cur = 7; - nb2wb_th_cur = 3; } - } else /*default: FCC*/ + } else /*@default: FCC*/ three_peak_th2_cur = 0; - } else { /*in service (with TP)*/ + } else { /*@in service (with TP)*/ peak_th_cur = 2; short_pulse_cnt_th_cur = 6; - long_pulse_cnt_th_cur = 9; + long_pulse_cnt_th_cur = 7; peak_window_cur = 2; - nb2wb_th_cur = 3; - three_peak_opt_cur = 1; + three_peak_opt_cur = 0; three_peak_th2_cur = 2; - if(region_domain == PHYDM_DFS_DOMAIN_MKK){ - if ((c_channel >= 52) && (c_channel <= 64)) { + if (region_domain == PHYDM_DFS_DOMAIN_MKK) { + if (c_channel >= 52 && c_channel <= 64) { long_pulse_cnt_th_cur = 15; - short_pulse_cnt_th_cur = 5; /*for high duty cycle*/ - three_peak_th2_cur = 0; - } - else { + /*@for high duty cycle*/ + short_pulse_cnt_th_cur = 5; + three_peak_th2_cur = 0; + } else { three_peak_opt_cur = 0; three_peak_th2_cur = 0; long_pulse_cnt_th_cur = 8; } - } - else if(region_domain == PHYDM_DFS_DOMAIN_FCC){ - } - else if(region_domain == PHYDM_DFS_DOMAIN_ETSI){ + } else if (region_domain == PHYDM_DFS_DOMAIN_FCC) { + long_pulse_cnt_th_cur = 5; /*for 80M FCC*/ + short_pulse_cnt_th_cur = 5; /*for 80M FCC*/ + } else if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { long_pulse_cnt_th_cur = 15; short_pulse_cnt_th_cur = 5; three_peak_opt_cur = 0; } } -} + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + if (dfs->peak_th != peak_th_cur) + odm_set_bb_reg(dm, R_0xa48, 0x00c00000, peak_th_cur); + if (dfs->short_pulse_cnt_th != short_pulse_cnt_th_cur) + odm_set_bb_reg(dm, R_0xa50, 0x00f00000, + short_pulse_cnt_th_cur); + if (dfs->long_pulse_cnt_th != long_pulse_cnt_th_cur) + odm_set_bb_reg(dm, R_0xa4c, 0xf0000000, + long_pulse_cnt_th_cur); + if (dfs->peak_window != peak_window_cur) + odm_set_bb_reg(dm, R_0xa40, 0x00030000, + peak_window_cur); + if (dfs->three_peak_opt != three_peak_opt_cur) + odm_set_bb_reg(dm, R_0xa40, 0x30000000, + three_peak_opt_cur); + if (dfs->three_peak_th2 != three_peak_th2_cur) + odm_set_bb_reg(dm, R_0xa44, 0x00000007, + three_peak_th2_cur); + #if (RTL8721D_SUPPORT) + } else if (dm->support_ic_type & (ODM_RTL8721D)) { + if (dfs->peak_th != peak_th_cur) + odm_set_bb_reg(dm, R_0xf5c, 0x00000030, peak_th_cur); + if (dfs->short_pulse_cnt_th != short_pulse_cnt_th_cur) + odm_set_bb_reg(dm, R_0xf70, 0x00007800, + short_pulse_cnt_th_cur); + if (dfs->long_pulse_cnt_th != long_pulse_cnt_th_cur) + odm_set_bb_reg(dm, R_0xf74, 0x0000000f, + long_pulse_cnt_th_cur); + if (dfs->peak_window != peak_window_cur) + odm_set_bb_reg(dm, R_0xf58, 0x18000000, + peak_window_cur); + if (dfs->three_peak_opt != three_peak_opt_cur) + odm_set_bb_reg(dm, R_0xf58, 0x00030000, + three_peak_opt_cur); + if (dfs->three_peak_th2 != three_peak_th2_cur) + odm_set_bb_reg(dm, R_0xf58, 0x00007c00, + three_peak_th2_cur); + #endif + } else { + if (dfs->peak_th != peak_th_cur) + odm_set_bb_reg(dm, R_0x918, 0x00030000, peak_th_cur); + if (dfs->short_pulse_cnt_th != short_pulse_cnt_th_cur) + odm_set_bb_reg(dm, R_0x920, 0x000f0000, + short_pulse_cnt_th_cur); + if (dfs->long_pulse_cnt_th != long_pulse_cnt_th_cur) + odm_set_bb_reg(dm, R_0x920, 0x00f00000, + long_pulse_cnt_th_cur); + if (dfs->peak_window != peak_window_cur) + odm_set_bb_reg(dm, R_0x920, 0x00000300, + peak_window_cur); + if (dfs->three_peak_opt != three_peak_opt_cur) + odm_set_bb_reg(dm, R_0x924, 0x00000180, + three_peak_opt_cur); + if (dfs->three_peak_th2 != three_peak_th2_cur) + odm_set_bb_reg(dm, R_0x924, 0x00007000, + three_peak_th2_cur); + } + dfs->peak_th = peak_th_cur; + dfs->short_pulse_cnt_th = short_pulse_cnt_th_cur; + dfs->long_pulse_cnt_th = long_pulse_cnt_th_cur; + dfs->peak_window = peak_window_cur; + dfs->three_peak_opt = three_peak_opt_cur; + dfs->three_peak_th2 = three_peak_th2_cur; +} boolean phydm_radar_detect_dm_check( - void *dm_void -){ + void *dm_void) +{ struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _DFS_STATISTICS *dfs = (struct _DFS_STATISTICS *)phydm_get_structure(dm, PHYDM_DFS); + struct _DFS_STATISTICS *dfs = &dm->dfs; u8 region_domain = dm->dfs_region_domain, index = 0; - u16 i = 0, k = 0, fa_count_cur = 0, fa_count_inc = 0, total_fa_in_hist = 0, pre_post_now_acc_fa_in_hist = 0, max_fa_in_hist = 0, vht_crc_ok_cnt_cur = 0; - u16 vht_crc_ok_cnt_inc = 0, ht_crc_ok_cnt_cur = 0, ht_crc_ok_cnt_inc = 0, leg_crc_ok_cnt_cur = 0, leg_crc_ok_cnt_inc = 0; - u16 total_crc_ok_cnt_inc = 0, short_pulse_cnt_cur = 0, short_pulse_cnt_inc = 0, long_pulse_cnt_cur = 0, long_pulse_cnt_inc = 0, total_pulse_count_inc = 0; - u32 regf98_value = 0, reg918_value = 0, reg91c_value = 0, reg920_value = 0, reg924_value = 0; - boolean tri_short_pulse = 0, tri_long_pulse = 0, radar_type = 0, fault_flag_det = 0, fault_flag_psd = 0, fa_flag = 0, radar_detected = 0; + u16 i = 0, j = 0, k = 0, fa_count_cur = 0, fa_count_inc = 0; + u16 total_fa_in_hist = 0, pre_post_now_acc_fa_in_hist = 0; + u16 max_fa_in_hist = 0, vht_crc_ok_cnt_cur = 0; + u16 vht_crc_ok_cnt_inc = 0, ht_crc_ok_cnt_cur = 0; + u16 ht_crc_ok_cnt_inc = 0, leg_crc_ok_cnt_cur = 0; + u16 leg_crc_ok_cnt_inc = 0; + u16 total_crc_ok_cnt_inc = 0, short_pulse_cnt_cur = 0; + u16 short_pulse_cnt_inc = 0, long_pulse_cnt_cur = 0; + u16 long_pulse_cnt_inc = 0, total_pulse_count_inc = 0; + u32 regf98_value = 0, reg918_value = 0, reg91c_value = 0; + u32 reg920_value = 0, reg924_value = 0, radar_rpt_reg_value = 0; + u32 regf54_value = 0, regf58_value = 0, regf5c_value = 0; + u32 regdf4_value = 0, regf70_value = 0, regf74_value = 0; + u32 rega40_value = 0, rega44_value = 0, rega48_value = 0; + u32 rega4c_value = 0, rega50_value = 0, rega54_value = 0; + #if (RTL8721D_SUPPORT) + u32 reg908_value = 0, regdf4_value = 0; + u32 regf54_value = 0, regf58_value = 0, regf5c_value = 0; + u32 regf70_value = 0, regf74_value = 0; + #endif + boolean tri_short_pulse = 0, tri_long_pulse = 0, radar_type = 0; + boolean fault_flag_det = 0, fault_flag_psd = 0, fa_flag = 0; + boolean radar_detected = 0; u8 st_l2h_new = 0, fa_mask_th = 0, sum = 0; u8 c_channel = *dm->channel; - - /*Get FA count during past 100ms*/ - fa_count_cur = (u16)odm_get_bb_reg(dm, 0xf48, 0x0000ffff); - + + /*@Get FA count during past 100ms, R_0xf48 for AC series*/ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + fa_count_cur = (u16)odm_get_bb_reg(dm, R_0x2d00, MASKLWORD); + #if (RTL8721D_SUPPORT) + else if (dm->support_ic_type & (ODM_RTL8721D)) { + fa_count_cur = (u16)odm_get_bb_reg(dm, + ODM_REG_OFDM_FA_TYPE2_11N, + MASKHWORD); + fa_count_cur += (u16)odm_get_bb_reg(dm, + ODM_REG_OFDM_FA_TYPE3_11N, + MASKLWORD); + fa_count_cur += (u16)odm_get_bb_reg(dm, + ODM_REG_OFDM_FA_TYPE3_11N, + MASKHWORD); + fa_count_cur += (u16)odm_get_bb_reg(dm, + ODM_REG_OFDM_FA_TYPE4_11N, + MASKLWORD); + fa_count_cur += (u16)odm_get_bb_reg(dm, + ODM_REG_OFDM_FA_TYPE1_11N, + MASKLWORD); + fa_count_cur += (u16)odm_get_bb_reg(dm, + ODM_REG_OFDM_FA_TYPE1_11N, + MASKHWORD); + } + #endif + else + fa_count_cur = (u16)odm_get_bb_reg(dm, R_0xf48, 0x0000ffff); + if (dfs->fa_count_pre == 0) fa_count_inc = 0; else if (fa_count_cur >= dfs->fa_count_pre) @@ -352,106 +892,255 @@ phydm_radar_detect_dm_check( dfs->fa_count_pre = fa_count_cur; dfs->fa_inc_hist[dfs->mask_idx] = fa_count_inc; - - for (i=0; i<5; i++) { - total_fa_in_hist = total_fa_in_hist + dfs->fa_inc_hist[i]; - if (dfs->fa_inc_hist[i] > max_fa_in_hist) - max_fa_in_hist = dfs->fa_inc_hist[i]; - } - if (dfs->mask_idx >= 2) + + for (i = 0; i < 5; i++) { + total_fa_in_hist = total_fa_in_hist + dfs->fa_inc_hist[i]; + if (dfs->fa_inc_hist[i] > max_fa_in_hist) + max_fa_in_hist = dfs->fa_inc_hist[i]; + } + if (dfs->mask_idx >= 2) index = dfs->mask_idx - 2; - else - index = 5 + dfs->mask_idx - 2; - if (index == 0) - pre_post_now_acc_fa_in_hist = dfs->fa_inc_hist[index] + dfs->fa_inc_hist[index+1] + dfs->fa_inc_hist[4]; - else if (index == 4) - pre_post_now_acc_fa_in_hist = dfs->fa_inc_hist[index] + dfs->fa_inc_hist[0] + dfs->fa_inc_hist[index-1]; - else - pre_post_now_acc_fa_in_hist = dfs->fa_inc_hist[index] + dfs->fa_inc_hist[index+1] + dfs->fa_inc_hist[index-1]; - - /*Get VHT CRC32 ok count during past 100ms*/ - vht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, 0xf0c, 0x00003fff); - if (vht_crc_ok_cnt_cur >= dfs->vht_crc_ok_cnt_pre) - vht_crc_ok_cnt_inc = vht_crc_ok_cnt_cur - dfs->vht_crc_ok_cnt_pre; else + index = 5 + dfs->mask_idx - 2; + if (index == 0) { + pre_post_now_acc_fa_in_hist = dfs->fa_inc_hist[index] + + dfs->fa_inc_hist[index + 1] + + dfs->fa_inc_hist[4]; + } else if (index == 4) { + pre_post_now_acc_fa_in_hist = dfs->fa_inc_hist[index] + + dfs->fa_inc_hist[0] + + dfs->fa_inc_hist[index - 1]; + } else { + pre_post_now_acc_fa_in_hist = dfs->fa_inc_hist[index] + + dfs->fa_inc_hist[index + 1] + + dfs->fa_inc_hist[index - 1]; + } + + /*@Get VHT CRC32 ok count during past 100ms*/ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + vht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0x2c0c, 0xffff); + #if (RTL8721D_SUPPORT) + else if (dm->support_ic_type & ODM_RTL8721D) + vht_crc_ok_cnt_cur = 0; + #endif + else + vht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0xf0c, + 0x00003fff); + + if (vht_crc_ok_cnt_cur >= dfs->vht_crc_ok_cnt_pre) { + vht_crc_ok_cnt_inc = vht_crc_ok_cnt_cur - + dfs->vht_crc_ok_cnt_pre; + } else { vht_crc_ok_cnt_inc = vht_crc_ok_cnt_cur; + } dfs->vht_crc_ok_cnt_pre = vht_crc_ok_cnt_cur; - /*Get HT CRC32 ok count during past 100ms*/ - ht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, 0xf10, 0x00003fff); + /*@Get HT CRC32 ok count during past 100ms*/ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + ht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0x2c10, 0xffff); + #if (RTL8721D_SUPPORT) + else if (dm->support_ic_type & (ODM_RTL8721D)) + ht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0xf90, MASKLWORD); + #endif + else + ht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0xf10, + 0x00003fff); + if (ht_crc_ok_cnt_cur >= dfs->ht_crc_ok_cnt_pre) ht_crc_ok_cnt_inc = ht_crc_ok_cnt_cur - dfs->ht_crc_ok_cnt_pre; else ht_crc_ok_cnt_inc = ht_crc_ok_cnt_cur; dfs->ht_crc_ok_cnt_pre = ht_crc_ok_cnt_cur; - /*Get Legacy CRC32 ok count during past 100ms*/ - leg_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, 0xf14, 0x00003fff); + /*@Get Legacy CRC32 ok count during past 100ms*/ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + leg_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0x2c14, 0xffff); + #if (RTL8721D_SUPPORT) + else if (dm->support_ic_type & ODM_RTL8721D) + leg_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, + R_0xf94, MASKLWORD); + #endif + else + leg_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0xf14, + 0x00003fff); + if (leg_crc_ok_cnt_cur >= dfs->leg_crc_ok_cnt_pre) leg_crc_ok_cnt_inc = leg_crc_ok_cnt_cur - dfs->leg_crc_ok_cnt_pre; else leg_crc_ok_cnt_inc = leg_crc_ok_cnt_cur; dfs->leg_crc_ok_cnt_pre = leg_crc_ok_cnt_cur; - if ((vht_crc_ok_cnt_cur == 0x3fff) || - (ht_crc_ok_cnt_cur == 0x3fff) || - (leg_crc_ok_cnt_cur == 0x3fff)) { - odm_set_bb_reg(dm, 0xb58, BIT(0), 1); - odm_set_bb_reg(dm, 0xb58, BIT(0), 0); + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + if (vht_crc_ok_cnt_cur == 0xffff || + ht_crc_ok_cnt_cur == 0xffff || + leg_crc_ok_cnt_cur == 0xffff) { + phydm_reset_bb_hw_cnt(dm); + } + #if (RTL8721D_SUPPORT) + } else if (dm->support_ic_type & (ODM_RTL8721D)) { + if (ht_crc_ok_cnt_cur == 0xffff || + leg_crc_ok_cnt_cur == 0xffff) { + odm_set_bb_reg(dm, R_0xf14, BIT(16), 1); + odm_set_bb_reg(dm, R_0xf14, BIT(16), 0); + } + #endif + } else { + if (vht_crc_ok_cnt_cur == 0x3fff || + ht_crc_ok_cnt_cur == 0x3fff || + leg_crc_ok_cnt_cur == 0x3fff) { + phydm_reset_bb_hw_cnt(dm); + } } - total_crc_ok_cnt_inc = vht_crc_ok_cnt_inc + ht_crc_ok_cnt_inc + leg_crc_ok_cnt_inc; + total_crc_ok_cnt_inc = vht_crc_ok_cnt_inc + + ht_crc_ok_cnt_inc + + leg_crc_ok_cnt_inc; - /*Get short pulse count, need carefully handle the counter overflow*/ - regf98_value = odm_get_bb_reg(dm, 0xf98, 0xffffffff); - short_pulse_cnt_cur = (u16)(regf98_value & 0x000000ff); - if (short_pulse_cnt_cur >= dfs->short_pulse_cnt_pre) - short_pulse_cnt_inc = short_pulse_cnt_cur - dfs->short_pulse_cnt_pre; - else + if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8822C | ODM_RTL8812F | + ODM_RTL8197G)) { + /* if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_2, 0x3b0)) { + * odm_set_bb_reg(dm, 0x1e28, 0x03c00000, 8); + * dbgport2dbc_value = phydm_get_bb_dbg_port_val(dm); + * phydm_release_bb_dbg_port(dm); } + */ + radar_rpt_reg_value = odm_get_bb_reg(dm, R_0x2e00, 0xffffffff); + short_pulse_cnt_cur = (u16)((radar_rpt_reg_value & 0x000ff800) + >> 11); + long_pulse_cnt_cur = (u16)((radar_rpt_reg_value & 0x0fc00000) + >> 22); + #if (RTL8721D_SUPPORT) + } else if (dm->support_ic_type & (ODM_RTL8721D)) { + reg908_value = (u32)odm_get_bb_reg(dm, R_0x908, MASKDWORD); + odm_set_bb_reg(dm, R_0x908, MASKDWORD, 0x254); + regdf4_value = odm_get_bb_reg(dm, R_0xdf4, MASKDWORD); + short_pulse_cnt_cur = (u16)((regdf4_value & 0x000ff000) >> 12); + long_pulse_cnt_cur = (u16)((regdf4_value & 0x0fc00000) >> 22); + + tri_short_pulse = (regdf4_value & BIT(20)) ? 1 : 0; + tri_long_pulse = (regdf4_value & BIT(28)) ? 1 : 0; + if (tri_short_pulse || tri_long_pulse) { + odm_set_bb_reg(dm, R_0xf58, BIT(29), 0); + odm_set_bb_reg(dm, R_0xf58, BIT(29), 1); + } + #endif + } else if (dm->support_ic_type & (ODM_RTL8814B)) { + if (dm->seg1_dfs_flag == 1) + radar_rpt_reg_value = odm_get_bb_reg(dm, R_0x2e20, + 0xffffffff); + else + radar_rpt_reg_value = odm_get_bb_reg(dm, R_0x2e00, + 0xffffffff); + short_pulse_cnt_cur = (u16)((radar_rpt_reg_value & 0x000ff800) + >> 11); + long_pulse_cnt_cur = (u16)((radar_rpt_reg_value & 0x0fc00000) + >> 22); + } else { + regf98_value = odm_get_bb_reg(dm, R_0xf98, 0xffffffff); + short_pulse_cnt_cur = (u16)(regf98_value & 0x000000ff); + long_pulse_cnt_cur = (u16)((regf98_value & 0x0000ff00) >> 8); + } + + /*@Get short pulse count, need carefully handle the counter overflow*/ + + if (short_pulse_cnt_cur >= dfs->short_pulse_cnt_pre) { + short_pulse_cnt_inc = short_pulse_cnt_cur - + dfs->short_pulse_cnt_pre; + } else { short_pulse_cnt_inc = short_pulse_cnt_cur; + } dfs->short_pulse_cnt_pre = short_pulse_cnt_cur; - /*Get long pulse count, need carefully handle the counter overflow*/ - long_pulse_cnt_cur = (u16)((regf98_value & 0x0000ff00) >> 8); - if (long_pulse_cnt_cur >= dfs->long_pulse_cnt_pre) - long_pulse_cnt_inc = long_pulse_cnt_cur - dfs->long_pulse_cnt_pre; - else + /*@Get long pulse count, need carefully handle the counter overflow*/ + + if (long_pulse_cnt_cur >= dfs->long_pulse_cnt_pre) { + long_pulse_cnt_inc = long_pulse_cnt_cur - + dfs->long_pulse_cnt_pre; + } else { long_pulse_cnt_inc = long_pulse_cnt_cur; + } dfs->long_pulse_cnt_pre = long_pulse_cnt_cur; total_pulse_count_inc = short_pulse_cnt_inc + long_pulse_cnt_inc; - if (dfs->det_print){ - PHYDM_DBG(dm, DBG_DFS, "=====================================================================\n"); - PHYDM_DBG(dm, DBG_DFS, "Total_CRC_OK_cnt_inc[%d] VHT_CRC_ok_cnt_inc[%d] HT_CRC_ok_cnt_inc[%d] LEG_CRC_ok_cnt_inc[%d] FA_count_inc[%d]\n", - total_crc_ok_cnt_inc, vht_crc_ok_cnt_inc, ht_crc_ok_cnt_inc, leg_crc_ok_cnt_inc, fa_count_inc); - PHYDM_DBG(dm, DBG_DFS, "Init_Gain[%x] 0x91c[%x] 0xf98[%08x] short_pulse_cnt_inc[%d] long_pulse_cnt_inc[%d]\n", - dfs->igi_cur, dfs->st_l2h_cur, regf98_value, short_pulse_cnt_inc, long_pulse_cnt_inc); - PHYDM_DBG(dm, DBG_DFS, "Throughput: %dMbps\n", dm->rx_tp); - reg918_value = odm_get_bb_reg(dm, 0x918, 0xffffffff); - reg91c_value = odm_get_bb_reg(dm, 0x91c, 0xffffffff); - reg920_value = odm_get_bb_reg(dm, 0x920, 0xffffffff); - reg924_value = odm_get_bb_reg(dm, 0x924, 0xffffffff); - PHYDM_DBG(dm, DBG_DFS, "0x918[%08x] 0x91c[%08x] 0x920[%08x] 0x924[%08x]\n", reg918_value, reg91c_value, reg920_value, reg924_value); - PHYDM_DBG(dm, DBG_DFS, "dfs_regdomain = %d, dbg_mode = %d, idle_mode = %d\n", region_domain, dfs->dbg_mode, dfs->idle_mode); - } - tri_short_pulse = (regf98_value & BIT(17))? 1 : 0; - tri_long_pulse = (regf98_value & BIT(19))? 1 : 0; + if (dfs->det_print) { + PHYDM_DBG(dm, DBG_DFS, + "===============================================\n"); + PHYDM_DBG(dm, DBG_DFS, + "Total_CRC_OK_cnt_inc[%d] VHT_CRC_ok_cnt_inc[%d] HT_CRC_ok_cnt_inc[%d] LEG_CRC_ok_cnt_inc[%d] FA_count_inc[%d]\n", + total_crc_ok_cnt_inc, vht_crc_ok_cnt_inc, + ht_crc_ok_cnt_inc, leg_crc_ok_cnt_inc, fa_count_inc); + if (dm->support_ic_type & (ODM_RTL8721D)) { + PHYDM_DBG(dm, DBG_DFS, + "Init_Gain[%x] st_l2h_cur[%x] 0xdf4[%08x] short_pulse_cnt_inc[%d] long_pulse_cnt_inc[%d]\n", + dfs->igi_cur, dfs->st_l2h_cur, regdf4_value, + short_pulse_cnt_inc, long_pulse_cnt_inc); + regf54_value = odm_get_bb_reg(dm, R_0xf54, MASKDWORD); + regf58_value = odm_get_bb_reg(dm, R_0xf58, MASKDWORD); + regf5c_value = odm_get_bb_reg(dm, R_0xf5c, MASKDWORD); + regf70_value = odm_get_bb_reg(dm, R_0xf70, MASKDWORD); + regf74_value = odm_get_bb_reg(dm, R_0xf74, MASKDWORD); + PHYDM_DBG(dm, DBG_DFS, + "0xf54[%08x] 0xf58[%08x] 0xf5c[%08x] 0xf70[%08x] 0xf74[%08x]\n", + regf54_value, regf58_value, regf5c_value, + regf70_value, regf74_value); + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + PHYDM_DBG(dm, DBG_DFS, + "Init_Gain[%x] st_l2h_cur[%x] 0x2dbc[%08x] short_pulse_cnt_inc[%d] long_pulse_cnt_inc[%d]\n", + dfs->igi_cur, dfs->st_l2h_cur, + radar_rpt_reg_value, short_pulse_cnt_inc, + long_pulse_cnt_inc); + rega40_value = odm_get_bb_reg(dm, R_0xa40, MASKDWORD); + rega44_value = odm_get_bb_reg(dm, R_0xa44, MASKDWORD); + rega48_value = odm_get_bb_reg(dm, R_0xa48, MASKDWORD); + rega4c_value = odm_get_bb_reg(dm, R_0xa4c, MASKDWORD); + rega50_value = odm_get_bb_reg(dm, R_0xa50, MASKDWORD); + rega54_value = odm_get_bb_reg(dm, R_0xa54, MASKDWORD); + PHYDM_DBG(dm, DBG_DFS, + "0xa40[%08x] 0xa44[%08x] 0xa48[%08x] 0xa4c[%08x] 0xa50[%08x] 0xa54[%08x]\n", + rega40_value, rega44_value, rega48_value, + rega4c_value, rega50_value, rega54_value); + } else { + PHYDM_DBG(dm, DBG_DFS, + "Init_Gain[%x] 0x91c[%x] 0xf98[%08x] short_pulse_cnt_inc[%d] long_pulse_cnt_inc[%d]\n", + dfs->igi_cur, dfs->st_l2h_cur, regf98_value, + short_pulse_cnt_inc, long_pulse_cnt_inc); + reg918_value = odm_get_bb_reg(dm, R_0x918, + 0xffffffff); + reg91c_value = odm_get_bb_reg(dm, R_0x91c, + 0xffffffff); + reg920_value = odm_get_bb_reg(dm, R_0x920, + 0xffffffff); + reg924_value = odm_get_bb_reg(dm, R_0x924, + 0xffffffff); + PHYDM_DBG(dm, DBG_DFS, + "0x918[%08x] 0x91c[%08x] 0x920[%08x] 0x924[%08x]\n", + reg918_value, reg91c_value, + reg920_value, reg924_value); + } + PHYDM_DBG(dm, DBG_DFS, "Throughput: %dMbps\n", + (dm->rx_tp + dm->tx_tp)); - if(tri_short_pulse) - radar_type = 0; - else if(tri_long_pulse) - radar_type = 1; + PHYDM_DBG(dm, DBG_DFS, + "dfs_regdomain = %d, dbg_mode = %d, idle_mode = %d, print_hist_rpt = %d, hist_cond_on = %d\n", + region_domain, dfs->dbg_mode, + dfs->idle_mode, dfs->print_hist_rpt, + dfs->hist_cond_on); + } + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + tri_short_pulse = (radar_rpt_reg_value & BIT(20)) ? 1 : 0; + tri_long_pulse = (radar_rpt_reg_value & BIT(28)) ? 1 : 0; + } else { + tri_short_pulse = (regf98_value & BIT(17)) ? 1 : 0; + tri_long_pulse = (regf98_value & BIT(19)) ? 1 : 0; + } if (tri_short_pulse) { - odm_set_bb_reg(dm, 0x924, BIT(15), 0); - odm_set_bb_reg(dm, 0x924, BIT(15), 1); + phydm_radar_detect_reset(dm); } if (tri_long_pulse) { - odm_set_bb_reg(dm, 0x924, BIT(15), 0); - odm_set_bb_reg(dm, 0x924, BIT(15), 1); - if (region_domain == PHYDM_DFS_DOMAIN_MKK) { - if ((c_channel >= 52) && (c_channel <= 64)) { + phydm_radar_detect_reset(dm); + if (region_domain == PHYDM_DFS_DOMAIN_MKK) { + if (c_channel >= 52 && c_channel <= 64) { tri_long_pulse = 0; } } @@ -462,25 +1151,29 @@ phydm_radar_detect_dm_check( st_l2h_new = dfs->st_l2h_cur; dfs->pulse_flag_hist[dfs->mask_idx] = tri_short_pulse | tri_long_pulse; + dfs->pulse_type_hist[dfs->mask_idx] = (tri_long_pulse) ? 1 : 0; /* PSD(not ready) */ fault_flag_det = 0; fault_flag_psd = 0; fa_flag = 0; - if(region_domain == PHYDM_DFS_DOMAIN_ETSI){ - fa_mask_th = dfs->fa_mask_th + 20; + if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { + fa_mask_th = dfs->fa_mask_th + 20; + } else { + fa_mask_th = dfs->fa_mask_th; } - else{ - fa_mask_th = dfs->fa_mask_th; - } - if (max_fa_in_hist >= fa_mask_th || total_fa_in_hist >= fa_mask_th || pre_post_now_acc_fa_in_hist >= fa_mask_th || (dfs->igi_cur >= 0x30)){ + if (max_fa_in_hist >= fa_mask_th || + total_fa_in_hist >= fa_mask_th || + pre_post_now_acc_fa_in_hist >= fa_mask_th || + dfs->igi_cur >= 0x30) { st_l2h_new = dfs->st_l2h_max; - dfs->radar_det_mask_hist[index] = 1; - if (dfs->pulse_flag_hist[index] == 1){ - dfs->pulse_flag_hist[index] = 0; - if (dfs->det_print2){ - PHYDM_DBG(dm, DBG_DFS, "Radar is masked : FA mask\n"); + dfs->radar_det_mask_hist[index] = 1; + if (dfs->pulse_flag_hist[index] == 1) { + dfs->pulse_flag_hist[index] = 0; + if (dfs->det_print2) { + PHYDM_DBG(dm, DBG_DFS, + "Radar is masked : FA mask\n"); } } fa_flag = 1; @@ -491,20 +1184,23 @@ phydm_radar_detect_dm_check( if (dfs->det_print) { PHYDM_DBG(dm, DBG_DFS, "mask_idx: %d\n", dfs->mask_idx); PHYDM_DBG(dm, DBG_DFS, "radar_det_mask_hist: "); - for (i=0; i<5; i++) - PHYDM_DBG(dm, DBG_DFS, "%d ", dfs->radar_det_mask_hist[i]); + for (i = 0; i < 5; i++) + PHYDM_DBG(dm, DBG_DFS, "%d ", + dfs->radar_det_mask_hist[i]); PHYDM_DBG(dm, DBG_DFS, "pulse_flag_hist: "); - for (i=0; i<5; i++) + for (i = 0; i < 5; i++) PHYDM_DBG(dm, DBG_DFS, "%d ", dfs->pulse_flag_hist[i]); PHYDM_DBG(dm, DBG_DFS, "fa_inc_hist: "); - for (i=0; i<5; i++) + for (i = 0; i < 5; i++) PHYDM_DBG(dm, DBG_DFS, "%d ", dfs->fa_inc_hist[i]); PHYDM_DBG(dm, DBG_DFS, - "\nfa_mask_th: %d max_fa_in_hist: %d total_fa_in_hist: %d pre_post_now_acc_fa_in_hist: %d ", fa_mask_th, max_fa_in_hist, total_fa_in_hist, pre_post_now_acc_fa_in_hist); + "\nfa_mask_th: %d max_fa_in_hist: %d total_fa_in_hist: %d pre_post_now_acc_fa_in_hist: %d ", + fa_mask_th, max_fa_in_hist, total_fa_in_hist, + pre_post_now_acc_fa_in_hist); } sum = 0; - for (k=0; k<5; k++) { + for (k = 0; k < 5; k++) { if (dfs->radar_det_mask_hist[k] == 1) sum++; } @@ -512,17 +1208,26 @@ phydm_radar_detect_dm_check( if (dfs->mask_hist_checked <= 5) dfs->mask_hist_checked++; - if ((dfs->mask_hist_checked >= 5) && dfs->pulse_flag_hist[index]) - { - if (sum <= 2) - { - radar_detected = 1 ; - PHYDM_DBG(dm, DBG_DFS, "Detected type %d radar signal!\n", radar_type); - } - else { + if (dfs->mask_hist_checked >= 5 && dfs->pulse_flag_hist[index]) { + if (sum <= 2) { + if (dfs->hist_cond_on) { + /*return the value from hist_radar_detected*/ + radar_detected = phydm_dfs_hist_log(dm, index); + } else { + if (dfs->pulse_type_hist[index] == 0) + dfs->radar_type = 0; + else if (dfs->pulse_type_hist[index] == 1) + dfs->radar_type = 1; + radar_detected = 1; + PHYDM_DBG(dm, DBG_DFS, + "Detected type %d radar signal!\n", + dfs->radar_type); + } + } else { fault_flag_det = 1; - if (dfs->det_print2){ - PHYDM_DBG(dm, DBG_DFS, "Radar is masked : mask_hist large than thd\n"); + if (dfs->det_print2) { + PHYDM_DBG(dm, DBG_DFS, + "Radar is masked : mask_hist large than thd\n"); } } } @@ -531,105 +1236,1128 @@ phydm_radar_detect_dm_check( if (dfs->mask_idx == 5) dfs->mask_idx = 0; - if ((fault_flag_det == 0) && (fault_flag_psd == 0) && (fa_flag ==0)) { + if (fault_flag_det == 0 && fault_flag_psd == 0 && fa_flag == 0) { if (dfs->igi_cur < 0x30) { st_l2h_new = dfs->st_l2h_min; } } - - if ((st_l2h_new != dfs->st_l2h_cur)) { - if (st_l2h_new < dfs->st_l2h_min) { - dfs->st_l2h_cur = dfs->st_l2h_min; - } - else if (st_l2h_new > dfs->st_l2h_max) + + if (st_l2h_new != dfs->st_l2h_cur) { + if (st_l2h_new < dfs->st_l2h_min) { + dfs->st_l2h_cur = dfs->st_l2h_min; + } else if (st_l2h_new > dfs->st_l2h_max) dfs->st_l2h_cur = dfs->st_l2h_max; else dfs->st_l2h_cur = st_l2h_new; - odm_set_bb_reg(dm, 0x91c, 0xff, dfs->st_l2h_cur); + /*odm_set_bb_reg(dm, R_0x91c, 0xff, dfs->st_l2h_cur);*/ - dfs->pwdb_th = ((int)dfs->st_l2h_cur - (int)dfs->igi_cur)/2 + dfs->pwdb_scalar_factor; - dfs->pwdb_th = MAX_2(dfs->pwdb_th, (int)dfs->pwdb_th); /*limit the pwdb value to absoulte lower bound 8*/ - dfs->pwdb_th = MIN_2(dfs->pwdb_th, 0x1f); /*limit the pwdb value to absoulte upper bound 0x1f*/ - odm_set_bb_reg(dm, 0x918, 0x00001f00, dfs->pwdb_th); + dfs->pwdb_th_cur = ((int)dfs->st_l2h_cur - (int)dfs->igi_cur) + / 2 + dfs->pwdb_scalar_factor; + + /*@limit the pwdb value to absolute lower bound 8*/ + dfs->pwdb_th_cur = MAX_2(dfs->pwdb_th_cur, (int)dfs->pwdb_th); + + /*@limit the pwdb value to absolute upper bound 0x1f*/ + dfs->pwdb_th_cur = MIN_2(dfs->pwdb_th_cur, 0x1f); + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + odm_set_bb_reg(dm, R_0xa50, 0x000000f0, + dfs->pwdb_th_cur); + #if (RTL8721D_SUPPORT) + else if (dm->support_ic_type & ODM_RTL8721D) { + odm_set_bb_reg(dm, R_0xf54, 0x0000001f, + ((dfs->st_l2h_cur & 0x0000007c) >> 2)); + odm_set_bb_reg(dm, R_0xf58, 0xc0000000, + (dfs->st_l2h_cur & 0x00000003)); + odm_set_bb_reg(dm, R_0xf70, 0x03c00000, + dfs->pwdb_th_cur); + } + #endif + else + odm_set_bb_reg(dm, R_0x918, 0x00001f00, + dfs->pwdb_th_cur); } if (dfs->det_print) { PHYDM_DBG(dm, DBG_DFS, - "fault_flag_det[%d], fault_flag_psd[%d], DFS_detected [%d]\n", fault_flag_det, fault_flag_psd, radar_detected); + "fault_flag_det[%d], fault_flag_psd[%d], DFS_detected [%d]\n", + fault_flag_det, fault_flag_psd, radar_detected); } + #if (RTL8721D_SUPPORT) + if (dm->support_ic_type & (ODM_RTL8721D)) + odm_set_bb_reg(dm, R_0x908, MASKDWORD, reg908_value); + #endif return radar_detected; +} +void phydm_dfs_histogram_radar_distinguish( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _DFS_STATISTICS *dfs = &dm->dfs; + u8 region_domain = dm->dfs_region_domain; + u8 c_channel = *dm->channel; + u8 band_width = *dm->band_width; + + u8 dfs_pw_thd1 = 0, dfs_pw_thd2 = 0, dfs_pw_thd3 = 0; + u8 dfs_pw_thd4 = 0, dfs_pw_thd5 = 0; + u8 dfs_pri_thd1 = 0, dfs_pri_thd2 = 0, dfs_pri_thd3 = 0; + u8 dfs_pri_thd4 = 0, dfs_pri_thd5 = 0; + u8 pri_th = 0, i = 0; + u8 max_pri_idx = 0, max_pw_idx = 0, max_pri_cnt_th = 0; + u8 max_pri_cnt_fcc_g1_th = 0, max_pri_cnt_fcc_g3_th = 0; + u8 safe_pri_pw_diff_th = 0, safe_pri_pw_diff_fcc_th = 0; + u8 safe_pri_pw_diff_w53_th = 0, safe_pri_pw_diff_fcc_idle_th = 0; + u16 j = 0; + u32 dfs_hist1_peak_index = 0, dfs_hist2_peak_index = 0; + u32 dfs_hist1_pw = 0, dfs_hist2_pw = 0, g_pw[6] = {0}; + u32 g_peakindex[16] = {0}, g_mask_32 = 0, false_peak_hist1 = 0; + u32 false_peak_hist2_above10 = 0, false_peak_hist2_above0 = 0; + u32 dfs_hist1_pri = 0, dfs_hist2_pri = 0, g_pri[6] = {0}; + u32 pw_sum_g0g5 = 0, pw_sum_g1g2g3g4 = 0; + u32 pri_sum_g0g5 = 0, pri_sum_g1g2g3g4 = 0; + u32 pw_sum_ss_g1g2g3g4 = 0, pri_sum_ss_g1g2g3g4 = 0; + u32 max_pri_cnt = 0, max_pw_cnt = 0; + #if (RTL8721D_SUPPORT) + if (dm->support_ic_type & (ODM_RTL8721D)) + return; + #endif + + /*read peak index hist report*/ + odm_set_bb_reg(dm, 0x19e4, BIT(22) | BIT(23), 0x0); + dfs_hist1_peak_index = odm_get_bb_reg(dm, 0xf5c, 0xffffffff); + dfs_hist2_peak_index = odm_get_bb_reg(dm, 0xf74, 0xffffffff); + + g_peakindex[15] = ((dfs_hist1_peak_index & 0x0000000f) >> 0); + g_peakindex[14] = ((dfs_hist1_peak_index & 0x000000f0) >> 4); + g_peakindex[13] = ((dfs_hist1_peak_index & 0x00000f00) >> 8); + g_peakindex[12] = ((dfs_hist1_peak_index & 0x0000f000) >> 12); + g_peakindex[11] = ((dfs_hist1_peak_index & 0x000f0000) >> 16); + g_peakindex[10] = ((dfs_hist1_peak_index & 0x00f00000) >> 20); + g_peakindex[9] = ((dfs_hist1_peak_index & 0x0f000000) >> 24); + g_peakindex[8] = ((dfs_hist1_peak_index & 0xf0000000) >> 28); + g_peakindex[7] = ((dfs_hist2_peak_index & 0x0000000f) >> 0); + g_peakindex[6] = ((dfs_hist2_peak_index & 0x000000f0) >> 4); + g_peakindex[5] = ((dfs_hist2_peak_index & 0x00000f00) >> 8); + g_peakindex[4] = ((dfs_hist2_peak_index & 0x0000f000) >> 12); + g_peakindex[3] = ((dfs_hist2_peak_index & 0x000f0000) >> 16); + g_peakindex[2] = ((dfs_hist2_peak_index & 0x00f00000) >> 20); + g_peakindex[1] = ((dfs_hist2_peak_index & 0x0f000000) >> 24); + g_peakindex[0] = ((dfs_hist2_peak_index & 0xf0000000) >> 28); + + /*read pulse width hist report*/ + odm_set_bb_reg(dm, 0x19e4, BIT(22) | BIT(23), 0x1); + dfs_hist1_pw = odm_get_bb_reg(dm, 0xf5c, 0xffffffff); + dfs_hist2_pw = odm_get_bb_reg(dm, 0xf74, 0xffffffff); + + g_pw[0] = (unsigned int)((dfs_hist2_pw & 0xff000000) >> 24); + g_pw[1] = (unsigned int)((dfs_hist2_pw & 0x00ff0000) >> 16); + g_pw[2] = (unsigned int)((dfs_hist2_pw & 0x0000ff00) >> 8); + g_pw[3] = (unsigned int)dfs_hist2_pw & 0x000000ff; + g_pw[4] = (unsigned int)((dfs_hist1_pw & 0xff000000) >> 24); + g_pw[5] = (unsigned int)((dfs_hist1_pw & 0x00ff0000) >> 16); + + /*read pulse repetition interval hist report*/ + odm_set_bb_reg(dm, 0x19e4, BIT(22) | BIT(23), 0x3); + dfs_hist1_pri = odm_get_bb_reg(dm, 0xf5c, 0xffffffff); + dfs_hist2_pri = odm_get_bb_reg(dm, 0xf74, 0xffffffff); + odm_set_bb_reg(dm, 0x19b4, 0x10000000, 1); /*reset histo report*/ + odm_set_bb_reg(dm, 0x19b4, 0x10000000, 0); /*@continue histo report*/ + + g_pri[0] = (unsigned int)((dfs_hist2_pri & 0xff000000) >> 24); + g_pri[1] = (unsigned int)((dfs_hist2_pri & 0x00ff0000) >> 16); + g_pri[2] = (unsigned int)((dfs_hist2_pri & 0x0000ff00) >> 8); + g_pri[3] = (unsigned int)dfs_hist2_pri & 0x000000ff; + g_pri[4] = (unsigned int)((dfs_hist1_pri & 0xff000000) >> 24); + g_pri[5] = (unsigned int)((dfs_hist1_pri & 0x00ff0000) >> 16); + + dfs->pri_cond1 = 0; + dfs->pri_cond2 = 0; + dfs->pri_cond3 = 0; + dfs->pri_cond4 = 0; + dfs->pri_cond5 = 0; + dfs->pw_cond1 = 0; + dfs->pw_cond2 = 0; + dfs->pw_cond3 = 0; + dfs->pri_type3_4_cond1 = 0; /*@for ETSI*/ + dfs->pri_type3_4_cond2 = 0; /*@for ETSI*/ + dfs->pw_long_cond1 = 0; /*@for long radar*/ + dfs->pw_long_cond2 = 0; /*@for long radar*/ + dfs->pri_long_cond1 = 0; /*@for long radar*/ + dfs->pw_flag = 0; + dfs->pri_flag = 0; + dfs->pri_type3_4_flag = 0; /*@for ETSI*/ + dfs->long_radar_flag = 0; + dfs->pw_std = 0; /*The std(var) of reasonable num of pw group*/ + dfs->pri_std = 0; /*The std(var) of reasonable num of pri group*/ + + for (i = 0; i < 6; i++) { + dfs->pw_hold_sum[i] = 0; + dfs->pri_hold_sum[i] = 0; + dfs->pw_long_hold_sum[i] = 0; + dfs->pri_long_hold_sum[i] = 0; + } + + if (dfs->idle_mode == 1) + pri_th = dfs->pri_hist_th; + else + pri_th = dfs->pri_hist_th - 1; + + for (i = 0; i < 6; i++) { + dfs->pw_hold[dfs->hist_idx][i] = (u8)g_pw[i]; + dfs->pri_hold[dfs->hist_idx][i] = (u8)g_pri[i]; + /*@collect whole histogram report may take some time + *so we add the counter of 2 time slots in FCC and ETSI + */ + if (region_domain == 1 || region_domain == 3) { + dfs->pw_hold_sum[i] = dfs->pw_hold_sum[i] + + dfs->pw_hold[(dfs->hist_idx + 1) % 3][i] + + dfs->pw_hold[(dfs->hist_idx + 2) % 3][i]; + dfs->pri_hold_sum[i] = dfs->pri_hold_sum[i] + + dfs->pri_hold[(dfs->hist_idx + 1) % 3][i] + + dfs->pri_hold[(dfs->hist_idx + 2) % 3][i]; + } else{ + /*@collect whole histogram report may take some time, + *so we add the counter of 3 time slots in MKK or else + */ + dfs->pw_hold_sum[i] = dfs->pw_hold_sum[i] + + dfs->pw_hold[(dfs->hist_idx + 1) % 4][i] + + dfs->pw_hold[(dfs->hist_idx + 2) % 4][i] + + dfs->pw_hold[(dfs->hist_idx + 3) % 4][i]; + dfs->pri_hold_sum[i] = dfs->pri_hold_sum[i] + + dfs->pri_hold[(dfs->hist_idx + 1) % 4][i] + + dfs->pri_hold[(dfs->hist_idx + 2) % 4][i] + + dfs->pri_hold[(dfs->hist_idx + 3) % 4][i]; + } + } + /*@For long radar type*/ + for (i = 0; i < 6; i++) { + dfs->pw_long_hold[dfs->hist_long_idx][i] = (u8)g_pw[i]; + dfs->pri_long_hold[dfs->hist_long_idx][i] = (u8)g_pri[i]; + /*@collect whole histogram report may take some time, + *so we add the counter of 299 time slots for long radar + */ + for (j = 1; j < 300; j++) { + dfs->pw_long_hold_sum[i] = dfs->pw_long_hold_sum[i] + + dfs->pw_long_hold[(dfs->hist_long_idx + j) % 300][i]; + dfs->pri_long_hold_sum[i] = dfs->pri_long_hold_sum[i] + + dfs->pri_long_hold[(dfs->hist_long_idx + j) % 300][i]; + } + } + dfs->hist_idx++; + dfs->hist_long_idx++; + if (dfs->hist_long_idx == 300) + dfs->hist_long_idx = 0; + if (region_domain == 1 || region_domain == 3) { + if (dfs->hist_idx == 3) + dfs->hist_idx = 0; + } else if (dfs->hist_idx == 4) { + dfs->hist_idx = 0; + } + + max_pri_cnt = 0; + max_pri_idx = 0; + max_pw_cnt = 0; + max_pw_idx = 0; + max_pri_cnt_th = dfs->pri_sum_g1_th; + max_pri_cnt_fcc_g1_th = dfs->pri_sum_g1_fcc_th; + max_pri_cnt_fcc_g3_th = dfs->pri_sum_g3_fcc_th; + safe_pri_pw_diff_th = dfs->pri_pw_diff_th; + safe_pri_pw_diff_fcc_th = dfs->pri_pw_diff_fcc_th; + safe_pri_pw_diff_fcc_idle_th = dfs->pri_pw_diff_fcc_idle_th; + safe_pri_pw_diff_w53_th = dfs->pri_pw_diff_w53_th; + + /*@g1 to g4 is the reseasonable range of pri and pw*/ + for (i = 1; i <= 4; i++) { + if (dfs->pri_hold_sum[i] > max_pri_cnt) { + max_pri_cnt = dfs->pri_hold_sum[i]; + max_pri_idx = i; + } + if (dfs->pw_hold_sum[i] > max_pw_cnt) { + max_pw_cnt = dfs->pw_hold_sum[i]; + max_pw_idx = i; + } + if (dfs->pri_hold_sum[i] >= pri_th) + dfs->pri_cond1 = 1; + } + + pri_sum_g0g5 = dfs->pri_hold_sum[0]; + if (pri_sum_g0g5 == 0) + pri_sum_g0g5 = 1; + pri_sum_g1g2g3g4 = dfs->pri_hold_sum[1] + dfs->pri_hold_sum[2] + + dfs->pri_hold_sum[3] + dfs->pri_hold_sum[4]; + + /*pw will reduce because of dc, so we do not treat g0 as illegal group*/ + pw_sum_g0g5 = dfs->pw_hold_sum[5]; + if (pw_sum_g0g5 == 0) + pw_sum_g0g5 = 1; + pw_sum_g1g2g3g4 = dfs->pw_hold_sum[1] + dfs->pw_hold_sum[2] + + dfs->pw_hold_sum[3] + dfs->pw_hold_sum[4]; + + /*@Calculate the variation from g1 to g4*/ + for (i = 1; i < 5; i++) { + /*Sum of square*/ + pw_sum_ss_g1g2g3g4 = pw_sum_ss_g1g2g3g4 + + (dfs->pw_hold_sum[i] - (pw_sum_g1g2g3g4 / 4)) * + (dfs->pw_hold_sum[i] - (pw_sum_g1g2g3g4 / 4)); + pri_sum_ss_g1g2g3g4 = pri_sum_ss_g1g2g3g4 + + (dfs->pri_hold_sum[i] - (pri_sum_g1g2g3g4 / 4)) * + (dfs->pri_hold_sum[i] - (pri_sum_g1g2g3g4 / 4)); + } + /*The value may less than the normal variance, + *since the variable type is int (not float) + */ + dfs->pw_std = (u16)(pw_sum_ss_g1g2g3g4 / 4); + dfs->pri_std = (u16)(pri_sum_ss_g1g2g3g4 / 4); + + if (region_domain == 1) { + dfs->pri_type3_4_flag = 1; /*@ETSI flag*/ + + /*PRI judgment conditions for short radar type*/ + /*ratio of reasonable group and illegal group && + *pri variation of short radar should be large (=6) + */ + if (max_pri_idx != 4 && dfs->pri_hold_sum[5] > 0) + dfs->pri_cond2 = 0; + else + dfs->pri_cond2 = 1; + + /*reasonable group shouldn't large*/ + if ((pri_sum_g0g5 + pri_sum_g1g2g3g4) / pri_sum_g0g5 > 2 && + pri_sum_g1g2g3g4 <= dfs->pri_sum_safe_fcc_th) + dfs->pri_cond3 = 1; + + /*@Cancel the condition that the abs between pri and pw*/ + if (dfs->pri_std >= dfs->pri_std_th) + dfs->pri_cond4 = 1; + else if (max_pri_idx == 1 && + max_pri_cnt >= max_pri_cnt_fcc_g1_th) + dfs->pri_cond4 = 1; + + /*we set threshold = 7 (>4) for distinguishing type 3,4 (g3)*/ + if (max_pri_idx == 1 && dfs->pri_hold_sum[3] + + dfs->pri_hold_sum[4] + dfs->pri_hold_sum[5] > 0) + dfs->pri_cond5 = 0; + else + dfs->pri_cond5 = 1; + + if (dfs->pri_cond1 && dfs->pri_cond2 && dfs->pri_cond3 && + dfs->pri_cond4 && dfs->pri_cond5) + dfs->pri_flag = 1; + + /* PW judgment conditions for short radar type */ + /*ratio of reasonable and illegal group && g5 should be zero*/ + if (((pw_sum_g0g5 + pw_sum_g1g2g3g4) / pw_sum_g0g5 > 2) && + (dfs->pw_hold_sum[5] <= 1)) + dfs->pw_cond1 = 1; + /*unreasonable group*/ + if (dfs->pw_hold_sum[4] == 0 && dfs->pw_hold_sum[5] == 0) + dfs->pw_cond2 = 1; + /*pw's std (short radar) should be large(=7)*/ + if (dfs->pw_std >= dfs->pw_std_th) + dfs->pw_cond3 = 1; + if (dfs->pw_cond1 && dfs->pw_cond2 && dfs->pw_cond3) + dfs->pw_flag = 1; + + /* @Judgment conditions of long radar type */ + if (band_width == CHANNEL_WIDTH_20) { + if (dfs->pw_long_hold_sum[4] >= + dfs->pw_long_lower_20m_th) + dfs->pw_long_cond1 = 1; + } else{ + if (dfs->pw_long_hold_sum[4] >= dfs->pw_long_lower_th) + dfs->pw_long_cond1 = 1; + } + /* @Disable the condition that dfs->pw_long_hold_sum[1] */ + if (dfs->pw_long_hold_sum[2] + dfs->pw_long_hold_sum[3] + + dfs->pw_long_hold_sum[4] <= dfs->pw_long_sum_upper_th && + dfs->pw_long_hold_sum[2] <= dfs->pw_long_hold_sum[4] && + dfs->pw_long_hold_sum[3] <= dfs->pw_long_hold_sum[4]) + dfs->pw_long_cond2 = 1; + /*@g4 should be large for long radar*/ + if (dfs->pri_long_hold_sum[4] <= dfs->pri_long_upper_th) + dfs->pri_long_cond1 = 1; + if (dfs->pw_long_cond1 && dfs->pw_long_cond2 && + dfs->pri_long_cond1) + dfs->long_radar_flag = 1; + } else if (region_domain == 2) { + dfs->pri_type3_4_flag = 1; /*@ETSI flag*/ + + /*PRI judgment conditions for short radar type*/ + if ((pri_sum_g0g5 + pri_sum_g1g2g3g4) / pri_sum_g0g5 > 2) + dfs->pri_cond2 = 1; + + /*reasonable group shouldn't too large*/ + if (pri_sum_g1g2g3g4 <= dfs->pri_sum_safe_fcc_th) + dfs->pri_cond3 = 1; + + /*Cancel the abs diff between pri and pw for idle mode (thr=2)*/ + dfs->pri_cond4 = 1; + + if (dfs->idle_mode == 1) { + if (dfs->pri_std >= dfs->pri_std_idle_th) { + if (max_pw_idx == 3 && + pri_sum_g1g2g3g4 <= dfs->pri_sum_type4_th){ + /*To distinguish between type 4 radar and false detection*/ + dfs->pri_cond5 = 1; + } else if (max_pw_idx == 1 && + pri_sum_g1g2g3g4 >= + dfs->pri_sum_type6_th) { + /*To distinguish between type 6 radar and false detection*/ + dfs->pri_cond5 = 1; + } else { + /*pri variation of short radar should be large (idle mode)*/ + dfs->pri_cond5 = 1; + } + } + } else { + /*pri variation of short radar should be large (TP mode)*/ + if (dfs->pri_std >= dfs->pri_std_th) + dfs->pri_cond5 = 1; + } + + if (dfs->pri_cond1 && dfs->pri_cond2 && dfs->pri_cond3 && + dfs->pri_cond4 && dfs->pri_cond5) + dfs->pri_flag = 1; + + /* PW judgment conditions for short radar type */ + if (((pw_sum_g0g5 + pw_sum_g1g2g3g4) / pw_sum_g0g5 > 2) && + (dfs->pw_hold_sum[5] <= 1)) + /*ratio of reasonable and illegal group && g5 should be zero*/ + dfs->pw_cond1 = 1; + + if ((c_channel >= 52) && (c_channel <= 64)) + dfs->pw_cond2 = 1; + /*unreasonable group shouldn't too large*/ + else if (dfs->pw_hold_sum[0] <= dfs->pw_g0_th) + dfs->pw_cond2 = 1; + + if (dfs->idle_mode == 1) { + /*pw variation of short radar should be large (idle mode)*/ + if (dfs->pw_std >= dfs->pw_std_idle_th) + dfs->pw_cond3 = 1; + } else { + /*pw variation of short radar should be large (TP mode)*/ + if (dfs->pw_std >= dfs->pw_std_th) + dfs->pw_cond3 = 1; + } + if (dfs->pw_cond1 && dfs->pw_cond2 && dfs->pw_cond3) + dfs->pw_flag = 1; + + /* @Judgment conditions of long radar type */ + if (band_width == CHANNEL_WIDTH_20) { + if (dfs->pw_long_hold_sum[4] >= + dfs->pw_long_lower_20m_th) + dfs->pw_long_cond1 = 1; + } else{ + if (dfs->pw_long_hold_sum[4] >= dfs->pw_long_lower_th) + dfs->pw_long_cond1 = 1; + } + if (dfs->pw_long_hold_sum[1] + dfs->pw_long_hold_sum[2] + + dfs->pw_long_hold_sum[3] + dfs->pw_long_hold_sum[4] + <= dfs->pw_long_sum_upper_th) + dfs->pw_long_cond2 = 1; + /*@g4 should be large for long radar*/ + if (dfs->pri_long_hold_sum[4] <= dfs->pri_long_upper_th) + dfs->pri_long_cond1 = 1; + if (dfs->pw_long_cond1 && + dfs->pw_long_cond2 && dfs->pri_long_cond1) + dfs->long_radar_flag = 1; + } else if (region_domain == 3) { + /*ratio of reasonable group and illegal group */ + if ((pri_sum_g0g5 + pri_sum_g1g2g3g4) / pri_sum_g0g5 > 2) + dfs->pri_cond2 = 1; + + if (pri_sum_g1g2g3g4 <= dfs->pri_sum_safe_th) + dfs->pri_cond3 = 1; + + /*@Cancel the condition that the abs between pri and pw*/ + dfs->pri_cond4 = 1; + + if (dfs->pri_hold_sum[5] <= dfs->pri_sum_g5_th) + dfs->pri_cond5 = 1; + + if (band_width == CHANNEL_WIDTH_40) { + if (max_pw_idx == 4) { + if (max_pw_cnt >= dfs->type4_pw_max_cnt && + pri_sum_g1g2g3g4 >= + dfs->type4_safe_pri_sum_th) { + dfs->pri_cond1 = 1; + dfs->pri_cond4 = 1; + dfs->pri_type3_4_cond1 = 1; + } + } + } + + if (dfs->pri_cond1 && dfs->pri_cond2 && + dfs->pri_cond3 && dfs->pri_cond4 && dfs->pri_cond5) + dfs->pri_flag = 1; + + if (((pw_sum_g0g5 + pw_sum_g1g2g3g4) / pw_sum_g0g5 > 2)) + dfs->pw_flag = 1; + + /*@max num pri group is g1 means radar type3 or type4*/ + if (max_pri_idx == 1) { + if (max_pri_cnt >= max_pri_cnt_th) + dfs->pri_type3_4_cond1 = 1; + if (dfs->pri_hold_sum[4] <= + dfs->pri_sum_g5_under_g1_th && + dfs->pri_hold_sum[5] <= dfs->pri_sum_g5_under_g1_th) + dfs->pri_type3_4_cond2 = 1; + } else { + dfs->pri_type3_4_cond1 = 1; + dfs->pri_type3_4_cond2 = 1; + } + if (dfs->pri_type3_4_cond1 && dfs->pri_type3_4_cond2) + dfs->pri_type3_4_flag = 1; + } else { + } + + if (dfs->print_hist_rpt) { + dfs_pw_thd1 = (u8)odm_get_bb_reg(dm, 0x19e4, 0xff000000); + dfs_pw_thd2 = (u8)odm_get_bb_reg(dm, 0x19e8, 0x000000ff); + dfs_pw_thd3 = (u8)odm_get_bb_reg(dm, 0x19e8, 0x0000ff00); + dfs_pw_thd4 = (u8)odm_get_bb_reg(dm, 0x19e8, 0x00ff0000); + dfs_pw_thd5 = (u8)odm_get_bb_reg(dm, 0x19e8, 0xff000000); + + dfs_pri_thd1 = (u8)odm_get_bb_reg(dm, 0x19b8, 0x7F80); + dfs_pri_thd2 = (u8)odm_get_bb_reg(dm, 0x19ec, 0x000000ff); + dfs_pri_thd3 = (u8)odm_get_bb_reg(dm, 0x19ec, 0x0000ff00); + dfs_pri_thd4 = (u8)odm_get_bb_reg(dm, 0x19ec, 0x00ff0000); + dfs_pri_thd5 = (u8)odm_get_bb_reg(dm, 0x19ec, 0xff000000); + + PHYDM_DBG(dm, DBG_DFS, "peak index hist\n"); + PHYDM_DBG(dm, DBG_DFS, "dfs_hist_peak_index=%x %x\n", + dfs_hist1_peak_index, dfs_hist2_peak_index); + PHYDM_DBG(dm, DBG_DFS, "g_peak_index_hist = "); + for (i = 0; i < 16; i++) + PHYDM_DBG(dm, DBG_DFS, " %x", g_peakindex[i]); + PHYDM_DBG(dm, DBG_DFS, "\ndfs_pw_thd=%d %d %d %d %d\n", + dfs_pw_thd1, dfs_pw_thd2, dfs_pw_thd3, + dfs_pw_thd4, dfs_pw_thd5); + PHYDM_DBG(dm, DBG_DFS, "-----pulse width hist-----\n"); + PHYDM_DBG(dm, DBG_DFS, "dfs_hist_pw=%x %x\n", + dfs_hist1_pw, dfs_hist2_pw); + PHYDM_DBG(dm, DBG_DFS, "g_pw_hist = %x %x %x %x %x %x\n", + g_pw[0], g_pw[1], g_pw[2], g_pw[3], + g_pw[4], g_pw[5]); + PHYDM_DBG(dm, DBG_DFS, "dfs_pri_thd=%d %d %d %d %d\n", + dfs_pri_thd1, dfs_pri_thd2, dfs_pri_thd3, + dfs_pri_thd4, dfs_pri_thd5); + PHYDM_DBG(dm, DBG_DFS, "-----pulse interval hist-----\n"); + PHYDM_DBG(dm, DBG_DFS, "dfs_hist_pri=%x %x\n", + dfs_hist1_pri, dfs_hist2_pri); + PHYDM_DBG(dm, DBG_DFS, + "g_pri_hist = %x %x %x %x %x %x, pw_flag = %d, pri_flag = %d\n", + g_pri[0], g_pri[1], g_pri[2], g_pri[3], g_pri[4], + g_pri[5], dfs->pw_flag, dfs->pri_flag); + if (region_domain == 1 || region_domain == 3) { + PHYDM_DBG(dm, DBG_DFS, "hist_idx= %d\n", + (dfs->hist_idx + 2) % 3); + } else { + PHYDM_DBG(dm, DBG_DFS, "hist_idx= %d\n", + (dfs->hist_idx + 3) % 4); + } + PHYDM_DBG(dm, DBG_DFS, "hist_long_idx= %d\n", + (dfs->hist_long_idx + 299) % 300); + PHYDM_DBG(dm, DBG_DFS, + "pw_sum_g0g5 = %d, pw_sum_g1g2g3g4 = %d\n", + pw_sum_g0g5, pw_sum_g1g2g3g4); + PHYDM_DBG(dm, DBG_DFS, + "pri_sum_g0g5 = %d, pri_sum_g1g2g3g4 = %d\n", + pri_sum_g0g5, pri_sum_g1g2g3g4); + PHYDM_DBG(dm, DBG_DFS, "pw_hold_sum = %d %d %d %d %d %d\n", + dfs->pw_hold_sum[0], dfs->pw_hold_sum[1], + dfs->pw_hold_sum[2], dfs->pw_hold_sum[3], + dfs->pw_hold_sum[4], dfs->pw_hold_sum[5]); + PHYDM_DBG(dm, DBG_DFS, "pri_hold_sum = %d %d %d %d %d %d\n", + dfs->pri_hold_sum[0], dfs->pri_hold_sum[1], + dfs->pri_hold_sum[2], dfs->pri_hold_sum[3], + dfs->pri_hold_sum[4], dfs->pri_hold_sum[5]); + PHYDM_DBG(dm, DBG_DFS, "pw_long_hold_sum = %d %d %d %d %d %d\n", + dfs->pw_long_hold_sum[0], dfs->pw_long_hold_sum[1], + dfs->pw_long_hold_sum[2], dfs->pw_long_hold_sum[3], + dfs->pw_long_hold_sum[4], dfs->pw_long_hold_sum[5]); + PHYDM_DBG(dm, DBG_DFS, + "pri_long_hold_sum = %d %d %d %d %d %d\n", + dfs->pri_long_hold_sum[0], dfs->pri_long_hold_sum[1], + dfs->pri_long_hold_sum[2], dfs->pri_long_hold_sum[3], + dfs->pri_long_hold_sum[4], dfs->pri_long_hold_sum[5]); + PHYDM_DBG(dm, DBG_DFS, "idle_mode = %d\n", dfs->idle_mode); + PHYDM_DBG(dm, DBG_DFS, "pw_standard = %d\n", dfs->pw_std); + PHYDM_DBG(dm, DBG_DFS, "pri_standard = %d\n", dfs->pri_std); + for (j = 0; j < 4; j++) { + for (i = 0; i < 6; i++) { + PHYDM_DBG(dm, DBG_DFS, "pri_hold = %d ", + dfs->pri_hold[j][i]); + } + PHYDM_DBG(dm, DBG_DFS, "\n"); + } + PHYDM_DBG(dm, DBG_DFS, "\n"); + PHYDM_DBG(dm, DBG_DFS, + "pri_cond1 = %d, pri_cond2 = %d, pri_cond3 = %d, pri_cond4 = %d, pri_cond5 = %d\n", + dfs->pri_cond1, dfs->pri_cond2, dfs->pri_cond3, + dfs->pri_cond4, dfs->pri_cond5); + PHYDM_DBG(dm, DBG_DFS, + "bandwidth = %d, pri_th = %d, max_pri_cnt_th = %d, safe_pri_pw_diff_th = %d\n", + band_width, pri_th, max_pri_cnt_th, + safe_pri_pw_diff_th); + } +} + +boolean phydm_dfs_hist_log(void *dm_void, u8 index) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _DFS_STATISTICS *dfs = &dm->dfs; + u8 i = 0, j = 0; + boolean hist_radar_detected = 0; + + if (dfs->pulse_type_hist[index] == 0) { + dfs->radar_type = 0; + if (dfs->pw_flag && dfs->pri_flag && + dfs->pri_type3_4_flag) { + hist_radar_detected = 1; + PHYDM_DBG(dm, DBG_DFS, + "Detected type %d radar signal!\n", + dfs->radar_type); + if (dfs->det_print2) { + PHYDM_DBG(dm, DBG_DFS, + "hist_idx= %d\n", + (dfs->hist_idx + 3) % 4); + for (j = 0; j < 4; j++) { + for (i = 0; i < 6; i++) { + PHYDM_DBG(dm, DBG_DFS, + "pri_hold = %d ", + dfs->pri_hold[j][i]); + } + PHYDM_DBG(dm, DBG_DFS, "\n"); + } + PHYDM_DBG(dm, DBG_DFS, "\n"); + for (j = 0; j < 4; j++) { + for (i = 0; i < 6; i++) { + PHYDM_DBG(dm, DBG_DFS, "pw_hold = %d ", + dfs->pw_hold[j][i]); + } + PHYDM_DBG(dm, DBG_DFS, "\n"); + } + PHYDM_DBG(dm, DBG_DFS, "\n"); + PHYDM_DBG(dm, DBG_DFS, "idle_mode = %d\n", + dfs->idle_mode); + PHYDM_DBG(dm, DBG_DFS, + "pw_hold_sum = %d %d %d %d %d %d\n", + dfs->pw_hold_sum[0], + dfs->pw_hold_sum[1], + dfs->pw_hold_sum[2], + dfs->pw_hold_sum[3], + dfs->pw_hold_sum[4], + dfs->pw_hold_sum[5]); + PHYDM_DBG(dm, DBG_DFS, + "pri_hold_sum = %d %d %d %d %d %d\n", + dfs->pri_hold_sum[0], + dfs->pri_hold_sum[1], + dfs->pri_hold_sum[2], + dfs->pri_hold_sum[3], + dfs->pri_hold_sum[4], + dfs->pri_hold_sum[5]); + } + } else { + if (dfs->det_print2) { + if (dfs->pulse_flag_hist[index] && + dfs->pri_flag == 0) { + PHYDM_DBG(dm, DBG_DFS, "pri_variation = %d\n", + dfs->pri_std); + PHYDM_DBG(dm, DBG_DFS, + "PRI criterion is not satisfied!\n"); + if (dfs->pri_cond1 == 0) + PHYDM_DBG(dm, DBG_DFS, + "pri_cond1 is not satisfied!\n"); + if (dfs->pri_cond2 == 0) + PHYDM_DBG(dm, DBG_DFS, + "pri_cond2 is not satisfied!\n"); + if (dfs->pri_cond3 == 0) + PHYDM_DBG(dm, DBG_DFS, + "pri_cond3 is not satisfied!\n"); + if (dfs->pri_cond4 == 0) + PHYDM_DBG(dm, DBG_DFS, + "pri_cond4 is not satisfied!\n"); + if (dfs->pri_cond5 == 0) + PHYDM_DBG(dm, DBG_DFS, + "pri_cond5 is not satisfied!\n"); + } + if (dfs->pulse_flag_hist[index] && + dfs->pw_flag == 0) { + PHYDM_DBG(dm, DBG_DFS, "pw_variation = %d\n", + dfs->pw_std); + PHYDM_DBG(dm, DBG_DFS, + "PW criterion is not satisfied!\n"); + if (dfs->pw_cond1 == 0) + PHYDM_DBG(dm, DBG_DFS, + "pw_cond1 is not satisfied!\n"); + if (dfs->pw_cond2 == 0) + PHYDM_DBG(dm, DBG_DFS, + "pw_cond2 is not satisfied!\n"); + if (dfs->pw_cond3 == 0) + PHYDM_DBG(dm, DBG_DFS, + "pw_cond3 is not satisfied!\n"); + } + if (dfs->pulse_flag_hist[index] && + (dfs->pri_type3_4_flag == 0)) { + PHYDM_DBG(dm, DBG_DFS, + "pri_type3_4 criterion is not satisfied!\n"); + if (dfs->pri_type3_4_cond1 == 0) + PHYDM_DBG(dm, DBG_DFS, + "pri_type3_4_cond1 is not satisfied!\n"); + if (dfs->pri_type3_4_cond2 == 0) + PHYDM_DBG(dm, DBG_DFS, + "pri_type3_4_cond2 is not satisfied!\n"); + } + PHYDM_DBG(dm, DBG_DFS, "hist_idx= %d\n", + (dfs->hist_idx + 3) % 4); + for (j = 0; j < 4; j++) { + for (i = 0; i < 6; i++) { + PHYDM_DBG(dm, DBG_DFS, + "pri_hold = %d ", + dfs->pri_hold[j][i]); + } + PHYDM_DBG(dm, DBG_DFS, "\n"); + } + PHYDM_DBG(dm, DBG_DFS, "\n"); + for (j = 0; j < 4; j++) { + for (i = 0; i < 6; i++) + PHYDM_DBG(dm, DBG_DFS, + "pw_hold = %d ", + dfs->pw_hold[j][i]); + PHYDM_DBG(dm, DBG_DFS, "\n"); + } + PHYDM_DBG(dm, DBG_DFS, "\n"); + PHYDM_DBG(dm, DBG_DFS, "idle_mode = %d\n", + dfs->idle_mode); + PHYDM_DBG(dm, DBG_DFS, + "pw_hold_sum = %d %d %d %d %d %d\n", + dfs->pw_hold_sum[0], dfs->pw_hold_sum[1], + dfs->pw_hold_sum[2], dfs->pw_hold_sum[3], + dfs->pw_hold_sum[4], dfs->pw_hold_sum[5]); + PHYDM_DBG(dm, DBG_DFS, + "pri_hold_sum = %d %d %d %d %d %d\n", + dfs->pri_hold_sum[0], dfs->pri_hold_sum[1], + dfs->pri_hold_sum[2], dfs->pri_hold_sum[3], + dfs->pri_hold_sum[4], dfs->pri_hold_sum[5]); + } + } + } else { + dfs->radar_type = 1; + if (dfs->det_print2) { + PHYDM_DBG(dm, DBG_DFS, "\n"); + PHYDM_DBG(dm, DBG_DFS, "idle_mode = %d\n", + dfs->idle_mode); + PHYDM_DBG(dm, DBG_DFS, + "long_radar_pw_hold_sum = %d %d %d %d %d %d\n", + dfs->pw_long_hold_sum[0], + dfs->pw_long_hold_sum[1], + dfs->pw_long_hold_sum[2], + dfs->pw_long_hold_sum[3], + dfs->pw_long_hold_sum[4], + dfs->pw_long_hold_sum[5]); + PHYDM_DBG(dm, DBG_DFS, + "long_radar_pri_hold_sum = %d %d %d %d %d %d\n", + dfs->pri_long_hold_sum[0], + dfs->pri_long_hold_sum[1], + dfs->pri_long_hold_sum[2], + dfs->pri_long_hold_sum[3], + dfs->pri_long_hold_sum[4], + dfs->pri_long_hold_sum[5]); + } + /* @Long radar should satisfy three conditions */ + if (dfs->long_radar_flag == 1) { + hist_radar_detected = 1; + PHYDM_DBG(dm, DBG_DFS, + "Detected type %d radar signal!\n", + dfs->radar_type); + } else { + if (dfs->det_print2) { + if (dfs->pw_long_cond1 == 0) + PHYDM_DBG(dm, DBG_DFS, + "--pw_long_cond1 is not satisfied!--\n"); + if (dfs->pw_long_cond2 == 0) + PHYDM_DBG(dm, DBG_DFS, + "--pw_long_cond2 is not satisfied!--\n"); + if (dfs->pri_long_cond1 == 0) + PHYDM_DBG(dm, DBG_DFS, + "--pri_long_cond1 is not satisfied!--\n"); + } + } + } + return hist_radar_detected; } boolean phydm_radar_detect(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _DFS_STATISTICS *dfs = (struct _DFS_STATISTICS *)phydm_get_structure(dm, PHYDM_DFS); + struct _DFS_STATISTICS *dfs = &dm->dfs; boolean enable_DFS = false; boolean radar_detected = false; - dfs->igi_cur = (u8)odm_get_bb_reg(dm, 0xc50, 0x0000007f); + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + dfs->igi_cur = (u8)odm_get_bb_reg(dm, R_0x1d70, 0x0000007f); + dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0xa40, 0x00007f00); + #if (RTL8721D_SUPPORT) + } else if (dm->support_ic_type & (ODM_RTL8721D)) { + dfs->st_l2h_cur = (u8)(odm_get_bb_reg(dm, R_0xf54, + 0x0000001f) << 2); + dfs->st_l2h_cur += (u8)odm_get_bb_reg(dm, R_0xf58, 0xc0000000); + #endif + } else { + dfs->igi_cur = (u8)odm_get_bb_reg(dm, R_0xc50, 0x0000007f); + dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0x91c, 0x000000ff); + } - dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, 0x91c, 0x000000ff); - - /* dynamic pwdb calibration */ + /* @dynamic pwdb calibration */ if (dfs->igi_pre != dfs->igi_cur) { - dfs->pwdb_th = ((int)dfs->st_l2h_cur - (int)dfs->igi_cur)/2 + dfs->pwdb_scalar_factor; - dfs->pwdb_th = MAX_2(dfs->pwdb_th_cur, (int)dfs->pwdb_th); /* limit the pwdb value to absoulte lower bound 0xa */ - dfs->pwdb_th = MIN_2(dfs->pwdb_th_cur, 0x1f); /* limit the pwdb value to absoulte upper bound 0x1f */ - odm_set_bb_reg(dm, 0x918, 0x00001f00, dfs->pwdb_th); + dfs->pwdb_th_cur = ((int)dfs->st_l2h_cur - (int)dfs->igi_cur) + / 2 + dfs->pwdb_scalar_factor; + + /* @limit the pwdb value to absolute lower bound 0xa */ + dfs->pwdb_th_cur = MAX_2(dfs->pwdb_th_cur, (int)dfs->pwdb_th); + /* @limit the pwdb value to absolute upper bound 0x1f */ + dfs->pwdb_th_cur = MIN_2(dfs->pwdb_th_cur, 0x1f); + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + odm_set_bb_reg(dm, R_0xa50, 0x000000f0, + dfs->pwdb_th_cur); + #if (RTL8721D_SUPPORT) + else if (dm->support_ic_type & (ODM_RTL8721D)) + odm_set_bb_reg(dm, R_0xf70, 0x03c00000, + dfs->pwdb_th_cur); + #endif + else + odm_set_bb_reg(dm, R_0x918, 0x00001f00, + dfs->pwdb_th_cur); } dfs->igi_pre = dfs->igi_cur; phydm_dfs_dynamic_setting(dm); + if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) + phydm_dfs_histogram_radar_distinguish(dm); radar_detected = phydm_radar_detect_dm_check(dm); - if (odm_get_bb_reg(dm, 0x924, BIT(15))) - enable_DFS = true; + if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8822C | ODM_RTL8812F | + ODM_RTL8197G)) { + if (odm_get_bb_reg(dm, R_0xa40, BIT(15))) + enable_DFS = true; + #if (RTL8721D_SUPPORT) + } else if (dm->support_ic_type & (ODM_RTL8721D)) { + if (odm_get_bb_reg(dm, R_0xf58, BIT(29))) + enable_DFS = true; + #endif + } else if (dm->support_ic_type & (ODM_RTL8814B)) { + if (dm->seg1_dfs_flag == 1) { + if (odm_get_bb_reg(dm, R_0xa6c, BIT(15))) + enable_DFS = true; + } else if (odm_get_bb_reg(dm, R_0xa40, BIT(15))) + enable_DFS = true; + } else { + if (odm_get_bb_reg(dm, R_0x924, BIT(15))) + enable_DFS = true; + } if (enable_DFS && radar_detected) { - PHYDM_DBG(dm, DBG_DFS, "Radar detect: enable_DFS:%d, radar_detected:%d\n", enable_DFS, radar_detected); + PHYDM_DBG(dm, DBG_DFS, + "Radar detect: enable_DFS:%d, radar_detected:%d\n", + enable_DFS, radar_detected); phydm_radar_detect_reset(dm); - if (dfs->dbg_mode == 1){ - PHYDM_DBG(dm, DBG_DFS, "Radar is detected in DFS dbg mode.\n"); + if (dfs->dbg_mode == 1) { + PHYDM_DBG(dm, DBG_DFS, + "Radar is detected in DFS dbg mode.\n"); radar_detected = 0; } } + if (enable_DFS && dfs->sw_trigger_mode == 1) { + radar_detected = 1; + PHYDM_DBG(dm, DBG_DFS, + "Radar is detected in DFS SW trigger mode.\n"); + } + return enable_DFS && radar_detected; } - -void -phydm_dfs_debug( - void *dm_void, - u32 *const argv, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_dfs_hist_dbg(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _DFS_STATISTICS *dfs = (struct _DFS_STATISTICS *)phydm_get_structure(dm, PHYDM_DFS); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _DFS_STATISTICS *dfs = &dm->dfs; + char help[] = "-h"; + u32 argv[30] = {0}; u32 used = *_used; u32 out_len = *_out_len; + u8 i; + + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "{0} pri_hist_th = %d\n", dfs->pri_hist_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{1} pri_sum_g1_th = %d\n", dfs->pri_sum_g1_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{2} pri_sum_g5_th = %d\n", dfs->pri_sum_g5_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{3} pri_sum_g1_fcc_th = %d\n", + dfs->pri_sum_g1_fcc_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{4} pri_sum_g3_fcc_th = %d\n", + dfs->pri_sum_g3_fcc_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{5} pri_sum_safe_fcc_th = %d\n", + dfs->pri_sum_safe_fcc_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{6} pri_sum_type4_th = %d\n", dfs->pri_sum_type4_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{7} pri_sum_type6_th = %d\n", dfs->pri_sum_type6_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{8} pri_sum_safe_th = %d\n", dfs->pri_sum_safe_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{9} pri_sum_g5_under_g1_th = %d\n", + dfs->pri_sum_g5_under_g1_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{10} pri_pw_diff_th = %d\n", dfs->pri_pw_diff_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{11} pri_pw_diff_fcc_th = %d\n", + dfs->pri_pw_diff_fcc_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{12} pri_pw_diff_fcc_idle_th = %d\n", + dfs->pri_pw_diff_fcc_idle_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{13} pri_pw_diff_w53_th = %d\n", + dfs->pri_pw_diff_w53_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{14} pri_type1_low_fcc_th = %d\n", + dfs->pri_type1_low_fcc_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{15} pri_type1_upp_fcc_th = %d\n", + dfs->pri_type1_upp_fcc_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{16} pri_type1_cen_fcc_th = %d\n", + dfs->pri_type1_cen_fcc_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{17} pw_g0_th = %d\n", dfs->pw_g0_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{18} pw_long_lower_20m_th = %d\n", + dfs->pw_long_lower_20m_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{19} pw_long_lower_th = %d\n", + dfs->pw_long_lower_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{20} pri_long_upper_th = %d\n", + dfs->pri_long_upper_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{21} pw_long_sum_upper_th = %d\n", + dfs->pw_long_sum_upper_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{22} pw_std_th = %d\n", dfs->pw_std_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{23} pw_std_idle_th = %d\n", dfs->pw_std_idle_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{24} pri_std_th = %d\n", dfs->pri_std_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{25} pri_std_idle_th = %d\n", dfs->pri_std_idle_th); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{26} type4_pw_max_cnt = %d\n", dfs->type4_pw_max_cnt); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{27} type4_safe_pri_sum_th = %d\n", + dfs->type4_safe_pri_sum_th); + } else { + PHYDM_SSCANF(input[1], DCMD_DECIMAL, &argv[0]); + + for (i = 1; i < 30; i++) { + if (input[i + 1]) + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, + &argv[i]); + } + if (argv[0] == 0) { + dfs->pri_hist_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_hist_th = %d\n", + dfs->pri_hist_th); + } else if (argv[0] == 1) { + dfs->pri_sum_g1_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_sum_g1_th = %d\n", + dfs->pri_sum_g1_th); + } else if (argv[0] == 2) { + dfs->pri_sum_g5_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_sum_g5_th = %d\n", + dfs->pri_sum_g5_th); + } else if (argv[0] == 3) { + dfs->pri_sum_g1_fcc_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_sum_g1_fcc_th = %d\n", + dfs->pri_sum_g1_fcc_th); + } else if (argv[0] == 4) { + dfs->pri_sum_g3_fcc_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_sum_g3_fcc_th = %d\n", + dfs->pri_sum_g3_fcc_th); + } else if (argv[0] == 5) { + dfs->pri_sum_safe_fcc_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_sum_safe_fcc_th = %d\n", + dfs->pri_sum_safe_fcc_th); + } else if (argv[0] == 6) { + dfs->pri_sum_type4_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_sum_type4_th = %d\n", + dfs->pri_sum_type4_th); + } else if (argv[0] == 7) { + dfs->pri_sum_type6_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_sum_type6_th = %d\n", + dfs->pri_sum_type6_th); + } else if (argv[0] == 8) { + dfs->pri_sum_safe_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_sum_safe_th = %d\n", + dfs->pri_sum_safe_th); + } else if (argv[0] == 9) { + dfs->pri_sum_g5_under_g1_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_sum_g5_under_g1_th = %d\n", + dfs->pri_sum_g5_under_g1_th); + } else if (argv[0] == 10) { + dfs->pri_pw_diff_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_pw_diff_th = %d\n", + dfs->pri_pw_diff_th); + } else if (argv[0] == 11) { + dfs->pri_pw_diff_fcc_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_pw_diff_fcc_th = %d\n", + dfs->pri_pw_diff_fcc_th); + } else if (argv[0] == 12) { + dfs->pri_pw_diff_fcc_idle_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_pw_diff_fcc_idle_th = %d\n", + dfs->pri_pw_diff_fcc_idle_th); + } else if (argv[0] == 13) { + dfs->pri_pw_diff_w53_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_pw_diff_w53_th = %d\n", + dfs->pri_pw_diff_w53_th); + } else if (argv[0] == 14) { + dfs->pri_type1_low_fcc_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_type1_low_fcc_th = %d\n", + dfs->pri_type1_low_fcc_th); + } else if (argv[0] == 15) { + dfs->pri_type1_upp_fcc_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_type1_upp_fcc_th = %d\n", + dfs->pri_type1_upp_fcc_th); + } else if (argv[0] == 16) { + dfs->pri_type1_cen_fcc_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_type1_cen_fcc_th = %d\n", + dfs->pri_type1_cen_fcc_th); + } else if (argv[0] == 17) { + dfs->pw_g0_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pw_g0_th = %d\n", + dfs->pw_g0_th); + } else if (argv[0] == 18) { + dfs->pw_long_lower_20m_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pw_long_lower_20m_th = %d\n", + dfs->pw_long_lower_20m_th); + } else if (argv[0] == 19) { + dfs->pw_long_lower_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pw_long_lower_th = %d\n", + dfs->pw_long_lower_th); + } else if (argv[0] == 20) { + dfs->pri_long_upper_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_long_upper_th = %d\n", + dfs->pri_long_upper_th); + } else if (argv[0] == 21) { + dfs->pw_long_sum_upper_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pw_long_sum_upper_th = %d\n", + dfs->pw_long_sum_upper_th); + } else if (argv[0] == 22) { + dfs->pw_std_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pw_std_th = %d\n", + dfs->pw_std_th); + } else if (argv[0] == 23) { + dfs->pw_std_idle_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pw_std_idle_th = %d\n", + dfs->pw_std_idle_th); + } else if (argv[0] == 24) { + dfs->pri_std_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_std_th = %d\n", + dfs->pri_std_th); + } else if (argv[0] == 25) { + dfs->pri_std_idle_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "pri_std_idle_th = %d\n", + dfs->pri_std_idle_th); + } else if (argv[0] == 26) { + dfs->type4_pw_max_cnt = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "type4_pw_max_cnt = %d\n", + dfs->type4_pw_max_cnt); + } else if (argv[0] == 27) { + dfs->type4_safe_pri_sum_th = (u8)argv[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "type4_safe_pri_sum_th = %d\n", + dfs->type4_safe_pri_sum_th); + } + } + *_used = used; + *_out_len = out_len; +} + +void phydm_dfs_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _DFS_STATISTICS *dfs = &dm->dfs; + u32 used = *_used; + u32 out_len = *_out_len; + u32 argv[10] = {0}; + u8 i, input_idx = 0; + + for (i = 0; i < 7; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &argv[i]); + input_idx++; + } + } + + if (input_idx == 0) + return; dfs->dbg_mode = (boolean)argv[0]; - dfs->force_TP_mode = (boolean)argv[1]; - dfs->det_print = (boolean)argv[2]; - dfs->det_print2 = (boolean)argv[3]; + dfs->sw_trigger_mode = (boolean)argv[1]; + dfs->force_TP_mode = (boolean)argv[2]; + dfs->det_print = (boolean)argv[3]; + dfs->det_print2 = (boolean)argv[4]; + dfs->print_hist_rpt = (boolean)argv[5]; + dfs->hist_cond_on = (boolean)argv[6]; PDM_SNPF(out_len, used, output + used, out_len - used, - "dbg_mode: %d, force_TP_mode: %d, det_print: %d, det_print2: %d\n", - dfs->dbg_mode, dfs->force_TP_mode, dfs->det_print, - dfs->det_print2); - + "dbg_mode: %d, sw_trigger_mode: %d, force_TP_mode: %d, det_print: %d,det_print2: %d, print_hist_rpt: %d, hist_cond_on: %d\n", + dfs->dbg_mode, dfs->sw_trigger_mode, dfs->force_TP_mode, + dfs->det_print, dfs->det_print2, dfs->print_hist_rpt, + dfs->hist_cond_on); + /*switch (argv[0]) { case 1: #if defined(CONFIG_PHYDM_DFS_MASTER) - set dbg parameters for radar detection instead of the default value + set dbg parameters for radar detection instead of the default value if (argv[1] == 1) { dm->radar_detect_reg_918 = argv[2]; dm->radar_detect_reg_91c = argv[3]; @@ -647,7 +2375,7 @@ phydm_dfs_debug( PDM_SNPF((output + used, out_len - used, "Radar detection with default parameter\n")); } phydm_radar_detect_enable(dm); -#endif defined(CONFIG_PHYDM_DFS_MASTER) +#endif defined(CONFIG_PHYDM_DFS_MASTER) break; default: @@ -655,35 +2383,62 @@ phydm_dfs_debug( }*/ } +u8 phydm_dfs_polling_time(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 dfs_polling_time = 0; + if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) + dfs_polling_time = 40; + else + dfs_polling_time = 100; -#endif /* defined(CONFIG_PHYDM_DFS_MASTER) */ + return dfs_polling_time; +} + +#endif /* @defined(CONFIG_PHYDM_DFS_MASTER) */ boolean -phydm_is_dfs_band( - void *dm_void -) +phydm_is_dfs_band(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; if (((*dm->channel >= 52) && (*dm->channel <= 64)) || - ((*dm->channel >= 100) && (*dm->channel <= 140))) + ((*dm->channel >= 100) && (*dm->channel <= 144))) return true; else return false; } boolean -phydm_dfs_master_enabled( - void *dm_void -) +phydm_dfs_master_enabled(void *dm_void) { #ifdef CONFIG_PHYDM_DFS_MASTER - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean ret_val = false; - return *dm->dfs_master_enabled ? true : false; + if (dm->dfs_master_enabled) /*pointer protection*/ + ret_val = *dm->dfs_master_enabled ? true : false; + + return ret_val; #else return false; #endif } +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT +void phydm_dfs_ap_reset_radar_detect_counter_and_flag(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + /* @Clear Radar Counter and Radar flag */ + odm_set_bb_reg(dm, R_0xa40, BIT(15), 0); + odm_set_bb_reg(dm, R_0xa40, BIT(15), 1); + + /* RT_TRACE(COMP_DFS, DBG_LOUD, ("[DFS], After reset radar counter, 0xcf8 = 0x%x, 0xcf4 = 0x%x\n", */ + /* PHY_QueryBBReg(Adapter, 0xcf8, bMaskDWord), */ + /* PHY_QueryBBReg(Adapter, 0xcf4, bMaskDWord))); */ +} +#endif +#endif diff --git a/hal/phydm/phydm_dfs.h b/hal/phydm/phydm_dfs.h index c46da12..d9412bd 100644 --- a/hal/phydm/phydm_dfs.h +++ b/hal/phydm/phydm_dfs.h @@ -26,93 +26,171 @@ #ifndef __PHYDM_DFS_H__ #define __PHYDM_DFS_H__ -#define DFS_VERSION "1.1" +#define DFS_VERSION "1.1" -/* ============================================================ - Definition - ============================================================ -*/ +/*@ + * ============================================================ + * Definition + * ============================================================ + */ -/* -============================================================ -1 structure - ============================================================ -*/ +/*@ + * ============================================================ + * 1 structure + * ============================================================ + */ struct _DFS_STATISTICS { - u8 mask_idx; - u8 igi_cur; - u8 igi_pre; - u8 st_l2h_cur; - u16 fa_count_pre; - u16 fa_inc_hist[5]; - u16 vht_crc_ok_cnt_pre; - u16 ht_crc_ok_cnt_pre; - u16 leg_crc_ok_cnt_pre; - u16 short_pulse_cnt_pre; - u16 long_pulse_cnt_pre; - u8 pwdb_th; - u8 pwdb_th_cur; - u8 pwdb_scalar_factor; - u8 peak_th; - u8 short_pulse_cnt_th; - u8 long_pulse_cnt_th; - u8 peak_window; - u8 nb2wb_th; - u8 fa_mask_th; - u8 det_flag_offset; - u8 st_l2h_max; - u8 st_l2h_min; - u8 mask_hist_checked; + u8 mask_idx; + u8 igi_cur; + u8 igi_pre; + u8 st_l2h_cur; + u16 fa_count_pre; + u16 fa_inc_hist[5]; + u16 vht_crc_ok_cnt_pre; + u16 ht_crc_ok_cnt_pre; + u16 leg_crc_ok_cnt_pre; + u16 short_pulse_cnt_pre; + u16 long_pulse_cnt_pre; + u8 pwdb_th; + u8 pwdb_th_cur; + u8 pwdb_scalar_factor; + u8 peak_th; + u8 short_pulse_cnt_th; + u8 long_pulse_cnt_th; + u8 peak_window; + u8 three_peak_opt; + u8 three_peak_th2; + u8 fa_mask_th; + u8 det_flag_offset; + u8 st_l2h_max; + u8 st_l2h_min; + u8 mask_hist_checked; boolean pulse_flag_hist[5]; + boolean pulse_type_hist[5]; boolean radar_det_mask_hist[5]; boolean idle_mode; boolean force_TP_mode; boolean dbg_mode; + boolean sw_trigger_mode; boolean det_print; boolean det_print2; + boolean radar_type; + /*@dfs histogram*/ + boolean print_hist_rpt; + boolean hist_cond_on; + boolean pri_cond1; + boolean pri_cond2; + boolean pri_cond3; + boolean pri_cond4; + boolean pri_cond5; + boolean pw_cond1; + boolean pw_cond2; + boolean pw_cond3; + boolean pri_type3_4_cond1; /*@for ETSI*/ + boolean pri_type3_4_cond2; /*@for ETSI*/ + boolean pw_long_cond1; /*@for long radar*/ + boolean pw_long_cond2; /*@for long radar*/ + boolean pri_long_cond1; /*@for long radar*/ + boolean pw_flag; + boolean pri_flag; + boolean pri_type3_4_flag; /*@for ETSI*/ + boolean long_radar_flag; + u16 pri_hold_sum[6]; + u16 pw_hold_sum[6]; + u16 pri_long_hold_sum[6]; + u16 pw_long_hold_sum[6]; + u8 hist_idx; + u8 hist_long_idx; + u8 pw_hold[4][6]; + u8 pri_hold[4][6]; + u8 pw_long_hold[300][6]; + u8 pri_long_hold[300][6]; + u16 pw_std; /*@The std(var) of reasonable num of pw group*/ + u16 pri_std;/*@The std(var) of reasonable num of pri group*/ + /*@dfs histogram threshold*/ + u8 pri_hist_th; + u8 pri_sum_g1_th; + u8 pri_sum_g5_th; + u8 pri_sum_g1_fcc_th; + u8 pri_sum_g3_fcc_th; + u8 pri_sum_safe_fcc_th; + u8 pri_sum_type4_th; + u8 pri_sum_type6_th; + u8 pri_sum_safe_th; + u8 pri_sum_g5_under_g1_th; + u8 pri_pw_diff_th; + u8 pri_pw_diff_fcc_th; + u8 pri_pw_diff_fcc_idle_th; + u8 pri_pw_diff_w53_th; + u8 pri_type1_low_fcc_th; + u8 pri_type1_upp_fcc_th; + u8 pri_type1_cen_fcc_th; + u8 pw_g0_th; + u8 pw_long_lower_20m_th; + u8 pw_long_lower_th; + u8 pri_long_upper_th; + u8 pw_long_sum_upper_th; + u8 pw_std_th; + u8 pw_std_idle_th; + u8 pri_std_th; + u8 pri_std_idle_th; + u8 type4_pw_max_cnt; + u8 type4_safe_pri_sum_th; }; - -/* ============================================================ - enumeration - ============================================================ -*/ +/*@ + * ============================================================ + * enumeration + * ============================================================ + */ enum phydm_dfs_region_domain { - PHYDM_DFS_DOMAIN_UNKNOWN = 0, - PHYDM_DFS_DOMAIN_FCC = 1, - PHYDM_DFS_DOMAIN_MKK = 2, - PHYDM_DFS_DOMAIN_ETSI = 3, + PHYDM_DFS_DOMAIN_UNKNOWN = 0, + PHYDM_DFS_DOMAIN_FCC = 1, + PHYDM_DFS_DOMAIN_MKK = 2, + PHYDM_DFS_DOMAIN_ETSI = 3, }; -/* -============================================================ - function prototype -============================================================ -*/ +/*@ + * ============================================================ + * function prototype + * ============================================================ + */ #if defined(CONFIG_PHYDM_DFS_MASTER) void phydm_radar_detect_reset(void *dm_void); void phydm_radar_detect_disable(void *dm_void); void phydm_radar_detect_enable(void *dm_void); boolean phydm_radar_detect(void *dm_void); +void phydm_dfs_histogram_radar_distinguish(void *dm_void); +boolean phydm_dfs_hist_log(void *dm_void, u8 index); void phydm_dfs_parameter_init(void *dm_void); -void phydm_dfs_debug(void *dm_void, u32 *const argv, u32 *_used, char *output, u32 *_out_len); -#endif /* defined(CONFIG_PHYDM_DFS_MASTER) */ - -boolean -phydm_dfs_is_meteorology_channel( - void *dm_void -); +void phydm_dfs_hist_dbg(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); +void phydm_dfs_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); +u8 phydm_dfs_polling_time(void *dm_void); +#endif /* @defined(CONFIG_PHYDM_DFS_MASTER) */ boolean -phydm_is_dfs_band( - void *dm_void -); +phydm_dfs_is_meteorology_channel(void *dm_void); + +void +phydm_dfs_segment_distinguish(void *dm_void, enum rf_syn syn_path); + +void +phydm_dfs_segment_flag_reset(void *dm_void); boolean -phydm_dfs_master_enabled( - void *dm_void -); +phydm_is_dfs_band(void *dm_void); -#endif /*#ifndef __PHYDM_DFS_H__ */ +boolean +phydm_dfs_master_enabled(void *dm_void); + +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT +void phydm_dfs_ap_reset_radar_detect_counter_and_flag(void *dm_void); +#endif +#endif + +#endif /*@#ifndef __PHYDM_DFS_H__ */ diff --git a/hal/phydm/phydm_dig.c b/hal/phydm/phydm_dig.c index 25786fc..367c939 100644 --- a/hal/phydm/phydm_dig.c +++ b/hal/phydm/phydm_dig.c @@ -23,103 +23,268 @@ * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * include files - * ************************************************************ */ + * ************************************************************ + */ #include "mp_precomp.h" #include "phydm_precomp.h" +#ifdef CFG_DIG_DAMPING_CHK +void phydm_dig_recorder_reset(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t; + + PHYDM_DBG(dm, DBG_DIG, "%s ======>\n", __func__); + + odm_memory_set(dm, &dig_rc->igi_bitmap, 0, + sizeof(struct phydm_dig_recorder_strcut)); +} + +void phydm_dig_recorder(void *dm_void, boolean first_connect, u8 igi_curr, + u32 fa_cnt) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t; + u8 igi_pre = dig_rc->igi_history[0]; + u8 igi_up = 0; + + if (!dm->is_linked) + return; + + PHYDM_DBG(dm, DBG_DIG, "%s ======>\n", __func__); + + if (first_connect) { + phydm_dig_recorder_reset(dm); + dig_rc->igi_history[0] = igi_curr; + dig_rc->fa_history[0] = fa_cnt; + return; + } + + if (igi_curr % 2) + igi_curr--; + + igi_pre = dig_rc->igi_history[0]; + igi_up = (igi_curr > igi_pre) ? 1 : 0; + dig_rc->igi_bitmap = ((dig_rc->igi_bitmap << 1) & 0xfe) | igi_up; + + dig_rc->igi_history[3] = dig_rc->igi_history[2]; + dig_rc->igi_history[2] = dig_rc->igi_history[1]; + dig_rc->igi_history[1] = dig_rc->igi_history[0]; + dig_rc->igi_history[0] = igi_curr; + + dig_rc->fa_history[3] = dig_rc->fa_history[2]; + dig_rc->fa_history[2] = dig_rc->fa_history[1]; + dig_rc->fa_history[1] = dig_rc->fa_history[0]; + dig_rc->fa_history[0] = fa_cnt; + + PHYDM_DBG(dm, DBG_DIG, "igi_history[3:0] = {0x%x, 0x%x, 0x%x, 0x%x}\n", + dig_rc->igi_history[3], dig_rc->igi_history[2], + dig_rc->igi_history[1], dig_rc->igi_history[0]); + PHYDM_DBG(dm, DBG_DIG, "fa_history[3:0] = {%d, %d, %d, %d}\n", + dig_rc->fa_history[3], dig_rc->fa_history[2], + dig_rc->fa_history[1], dig_rc->fa_history[0]); + PHYDM_DBG(dm, DBG_DIG, "igi_bitmap = {%d, %d, %d, %d} = 0x%x\n", + (u8)((dig_rc->igi_bitmap & BIT(3)) >> 3), + (u8)((dig_rc->igi_bitmap & BIT(2)) >> 2), + (u8)((dig_rc->igi_bitmap & BIT(1)) >> 1), + (u8)(dig_rc->igi_bitmap & BIT(0)), + dig_rc->igi_bitmap); +} + +void phydm_dig_damping_chk(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t; + u8 igi_bitmap_4bit = dig_rc->igi_bitmap & 0xf; + u8 diff1 = 0, diff2 = 0; + u32 fa_low_th = dig_t->fa_th[0]; + u32 fa_high_th = dig_t->fa_th[1]; + u32 fa_high_th2 = dig_t->fa_th[2]; + u8 fa_pattern_match = 0; + u32 time_tmp = 0; + + if (!dm->is_linked) + return; + + PHYDM_DBG(dm, DBG_DIG, "%s ======>\n", __func__); + + /*@== Release Damping ================================================*/ + if (dig_rc->damping_limit_en) { + PHYDM_DBG(dm, DBG_DIG, + "[Damping Limit!] limit_time=%d, phydm_sys_up_time=%d\n", + dig_rc->limit_time, dm->phydm_sys_up_time); + + time_tmp = dig_rc->limit_time + DIG_LIMIT_PERIOD; + + if (DIFF_2(dm->rssi_min, dig_rc->limit_rssi) > 3 || + time_tmp < dm->phydm_sys_up_time) { + dig_rc->damping_limit_en = 0; + PHYDM_DBG(dm, DBG_DIG, "rssi_min=%d, limit_rssi=%d\n", + dm->rssi_min, dig_rc->limit_rssi); + } + return; + } + + /*@== Damping Pattern Check===========================================*/ + PHYDM_DBG(dm, DBG_DIG, "fa_th{H, L}= {%d,%d}\n", fa_high_th, fa_low_th); + + switch (igi_bitmap_4bit) { + case 0x5: + /*@ 4b'0101 + * IGI:[3]down(0x24)->[2]up(0x26)->[1]down(0x24)->[0]up(0x26)->[new](Lock @ 0x26) + * FA: [3] >high1 ->[2] [1] >high1 ->[0] [new] [2]up(0x28)->[1]down(0x24)->[0]up(0x28)->[new](Lock @ 0x28) + * FA: [3] >high2 ->[2] [1] >high2 ->[0] [new] igi_history[0] > dig_rc->igi_history[1]) + diff1 = dig_rc->igi_history[0] - dig_rc->igi_history[1]; + + if (dig_rc->igi_history[2] > dig_rc->igi_history[3]) + diff2 = dig_rc->igi_history[2] - dig_rc->igi_history[3]; + + if (dig_rc->fa_history[0] < fa_low_th && + dig_rc->fa_history[1] > fa_high_th && + dig_rc->fa_history[2] < fa_low_th && + dig_rc->fa_history[3] > fa_high_th) { + /*@Check each fa element*/ + fa_pattern_match = 1; + } + break; + case 0x9: + /*@ 4b'1001 + * IGI:[3]up(0x28)->[2]down(0x26)->[1]down(0x24)->[0]up(0x28)->[new](Lock @ 0x28) + * FA: [3] [2] [1] >high2 ->[0] [new] igi_history[0] > dig_rc->igi_history[1]) + diff1 = dig_rc->igi_history[0] - dig_rc->igi_history[1]; + + if (dig_rc->igi_history[2] < dig_rc->igi_history[3]) + diff2 = dig_rc->igi_history[3] - dig_rc->igi_history[2]; + + if (dig_rc->fa_history[0] < fa_low_th && + dig_rc->fa_history[1] > fa_high_th2 && + dig_rc->fa_history[2] < fa_low_th && + dig_rc->fa_history[3] < fa_low_th) { + /*@Check each fa element*/ + fa_pattern_match = 1; + } + break; + default: + break; + } + + if (diff1 >= 2 && diff2 >= 2 && fa_pattern_match) { + dig_rc->damping_limit_en = 1; + dig_rc->damping_limit_val = dig_rc->igi_history[0]; + dig_rc->limit_time = dm->phydm_sys_up_time; + dig_rc->limit_rssi = dm->rssi_min; + + PHYDM_DBG(dm, DBG_DIG, + "[Start damping_limit!] IGI_dyn_min=0x%x, limit_time=%d, limit_rssi=%d\n", + dig_rc->damping_limit_val, + dig_rc->limit_time, dig_rc->limit_rssi); + } + + PHYDM_DBG(dm, DBG_DIG, "damping_limit=%d\n", dig_rc->damping_limit_en); +} +#endif boolean -phydm_dig_go_up_check( - void *dm_void -) +phydm_dig_go_up_check(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ccx_info *ccx_info = &dm->dm_ccx_info; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - u8 cur_ig_value = dig_t->cur_ig_value; - u8 max_cover_bond; - u8 rx_gain_range_max = dig_t->rx_gain_range_max; - u8 i = 0, j = 0; - u8 total_nhm_cnt = ccx_info->nhm_rpt_sum; - u32 dig_cover_cnt = 0; - u32 over_dig_cover_cnt = 0; - boolean ret = true; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ccx_info *ccx_info = &dm->dm_ccx_info; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + u8 cur_ig_value = dig_t->cur_ig_value; + u8 max_cover_bond = 0; + u8 rx_gain_range_max = dig_t->rx_gain_range_max; + u8 i = 0, j = 0; + u8 total_nhm_cnt = ccx_info->nhm_rpt_sum; + u32 dig_cnt = 0; + u32 over_dig_cnt = 0; + boolean ret = true; if (*dm->bb_op_mode == PHYDM_PERFORMANCE_MODE) return ret; - max_cover_bond = DIG_MAX_BALANCE_MODE - dig_t->dig_upcheck_initial_value; + max_cover_bond = DIG_MAX_BALANCE_MODE - dig_t->upcheck_init_val; if (cur_ig_value < max_cover_bond - 6) - dig_t->dig_go_up_check_level = DIG_GOUPCHECK_LEVEL_0; + dig_t->go_up_chk_lv = DIG_GOUPCHECK_LEVEL_0; else if (cur_ig_value <= DIG_MAX_BALANCE_MODE) - dig_t->dig_go_up_check_level = DIG_GOUPCHECK_LEVEL_1; - else /* cur_ig_value > DM_DIG_MAX_AP, foolproof */ - dig_t->dig_go_up_check_level = DIG_GOUPCHECK_LEVEL_2; - + dig_t->go_up_chk_lv = DIG_GOUPCHECK_LEVEL_1; + else /* @cur_ig_value > DM_DIG_MAX_AP, foolproof */ + dig_t->go_up_chk_lv = DIG_GOUPCHECK_LEVEL_2; PHYDM_DBG(dm, DBG_DIG, "check_lv = %d, max_cover_bond = 0x%x\n", - dig_t->dig_go_up_check_level, - max_cover_bond); + dig_t->go_up_chk_lv, max_cover_bond); if (total_nhm_cnt == 0) return true; - if (dig_t->dig_go_up_check_level == DIG_GOUPCHECK_LEVEL_0) { - for (i = 3; i<=11; i++) - dig_cover_cnt += ccx_info->nhm_result[i]; - ret = ((dig_t->dig_level0_ratio_reciprocal * dig_cover_cnt) >= total_nhm_cnt) ? true : false; - } else if (dig_t->dig_go_up_check_level == DIG_GOUPCHECK_LEVEL_1) { - + if (dig_t->go_up_chk_lv == DIG_GOUPCHECK_LEVEL_0) { + for (i = 3; i <= 11; i++) + dig_cnt += ccx_info->nhm_result[i]; + + if ((dig_t->lv0_ratio_reciprocal * dig_cnt) >= total_nhm_cnt) + ret = true; + else + ret = false; + + } else if (dig_t->go_up_chk_lv == DIG_GOUPCHECK_LEVEL_1) { /* search index */ - for (i = 0; i<=10; i++) { + for (i = 0; i <= 10; i++) { if ((max_cover_bond * 2) == ccx_info->nhm_th[i]) { - for(j =(i+1); j <= 11; j++) - over_dig_cover_cnt += ccx_info->nhm_result[j]; + for (j = (i + 1); j <= 11; j++) + over_dig_cnt += ccx_info->nhm_result[j]; break; } } - ret = (dig_t->dig_level1_ratio_reciprocal * over_dig_cover_cnt < total_nhm_cnt) ? true : false; + + if (dig_t->lv1_ratio_reciprocal * over_dig_cnt < total_nhm_cnt) + ret = true; + else + ret = false; if (!ret) { /* update dig_t->rx_gain_range_max */ - dig_t->rx_gain_range_max = (rx_gain_range_max >= max_cover_bond - 6) ? (max_cover_bond - 6) : rx_gain_range_max; + if (rx_gain_range_max + 6 >= max_cover_bond) + dig_t->rx_gain_range_max = max_cover_bond - 6; + else + dig_t->rx_gain_range_max = rx_gain_range_max; PHYDM_DBG(dm, DBG_DIG, - "Noise pwr over DIG can filter, lock rx_gain_range_max to 0x%x\n", - dig_t->rx_gain_range_max); + "Noise pwr over DIG can filter, lock rx_gain_range_max to 0x%x\n", + dig_t->rx_gain_range_max); } - } else if (dig_t->dig_go_up_check_level == DIG_GOUPCHECK_LEVEL_2) { - /* cur_ig_value > DM_DIG_MAX_AP, foolproof */ + } else if (dig_t->go_up_chk_lv == DIG_GOUPCHECK_LEVEL_2) { + /* @cur_ig_value > DM_DIG_MAX_AP, foolproof */ ret = true; } return ret; } -void -odm_fa_threshold_check( - void *dm_void, - boolean is_dfs_band, - boolean is_performance -) +void phydm_fa_threshold_check(void *dm_void, boolean is_dfs_band) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; if (dig_t->is_dbg_fa_th) { - PHYDM_DBG(dm, DBG_DIG, "Manual Fix FA_th\n"); - - } else if (dm->is_linked && (is_performance || is_dfs_band)) { - if (dm->rssi_min < 20) { /*[PHYDM-252]*/ + } else if (dm->is_linked) { + if (dm->rssi_min < 20) { /*@[PHYDM-252]*/ dig_t->fa_th[0] = 500; dig_t->fa_th[1] = 750; dig_t->fa_th[2] = 1000; } else if (((dm->rx_tp >> 2) > dm->tx_tp) && /*Test RX TP*/ - (dm->rx_tp < 10) && (dm->rx_tp > 1)) { /*RXTP = 1 ~ 10Mbps*/ + (dm->rx_tp < 10) && (dm->rx_tp > 1)) { /*TP=1~10Mb*/ dig_t->fa_th[0] = 125; dig_t->fa_th[1] = 250; dig_t->fa_th[2] = 500; @@ -129,8 +294,8 @@ odm_fa_threshold_check( dig_t->fa_th[2] = 750; } } else { - if (is_dfs_band) { /* For DFS band and no link */ - + if (is_dfs_band) { /* @For DFS band and no link */ + dig_t->fa_th[0] = 250; dig_t->fa_th[1] = 1000; dig_t->fa_th[2] = 2000; @@ -141,162 +306,380 @@ odm_fa_threshold_check( } } - PHYDM_DBG(dm, DBG_DIG, "FA_th={%d,%d,%d}\n", - dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]); - + PHYDM_DBG(dm, DBG_DIG, "FA_th={%d,%d,%d}\n", dig_t->fa_th[0], + dig_t->fa_th[1], dig_t->fa_th[2]); } -void -phydm_set_big_jump_step( - void *dm_void, - u8 current_igi -) +void phydm_set_big_jump_step(void *dm_void, u8 curr_igi) { -#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - u8 step1[8] = {24, 30, 40, 50, 60, 70, 80, 90}; - u8 i; +#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + u8 step1[8] = {24, 30, 40, 50, 60, 70, 80, 90}; + u8 big_jump_lmt = dig_t->big_jump_lmt[dig_t->agc_table_idx]; + u8 i; if (dig_t->enable_adjust_big_jump == 0) return; for (i = 0; i <= dig_t->big_jump_step1; i++) { - if ((current_igi + step1[i]) > dig_t->big_jump_lmt[dig_t->agc_table_idx]) { + if ((curr_igi + step1[i]) > big_jump_lmt) { if (i != 0) i = i - 1; break; - } else if (i == dig_t->big_jump_step1) + } else if (i == dig_t->big_jump_step1) { break; + } } if (dm->support_ic_type & ODM_RTL8822B) - odm_set_bb_reg(dm, 0x8c8, 0xe, i); - else if (dm->support_ic_type & ODM_RTL8197F) + odm_set_bb_reg(dm, R_0x8c8, 0xe, i); + else if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) odm_set_bb_reg(dm, ODM_REG_BB_AGC_SET_2_11N, 0xe, i); - PHYDM_DBG(dm, DBG_DIG, - "phydm_set_big_jump_step(): bigjump = %d (ori = 0x%x), LMT=0x%x\n", - i, dig_t->big_jump_step1, dig_t->big_jump_lmt[dig_t->agc_table_idx]); + PHYDM_DBG(dm, DBG_DIG, "Bigjump = %d (ori = 0x%x), LMT=0x%x\n", i, + dig_t->big_jump_step1, big_jump_lmt); #endif } -void -odm_write_dig( - void *dm_void, - u8 current_igi -) +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT +void phydm_write_dig_reg_jgr3(void *dm_void, u8 igi) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - PHYDM_DBG(dm, DBG_DIG, "odm_write_dig===>\n"); + PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__); - /* 1 Check IGI by upper bound */ - if (adaptivity->igi_lmt_en && - (current_igi > adaptivity->adapt_igi_up) && dm->is_linked) { - - current_igi = adaptivity->adapt_igi_up; + /* Set IGI value */ + if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) + return; - PHYDM_DBG(dm, DBG_DIG, - "Force to Adaptivity Upper bound=((0x%x))\n", current_igi); + odm_set_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_11AC, igi); + + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) + odm_set_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_B_11AC3, igi); + #endif + + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { + odm_set_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_C_11AC3, igi); + odm_set_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_D_11AC3, igi); + } + #endif +} + +u8 phydm_get_igi_reg_val_jgr3(void *dm_void, enum bb_path path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 val = 0; + + PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__); + + /* Set IGI value */ + if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) + return (u8)val; + + if (path == BB_PATH_A) + val = odm_get_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_11AC); +#if (defined(PHYDM_COMPILE_ABOVE_2SS)) + else if (path == BB_PATH_B) + val = odm_get_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_B_11AC3); +#endif + +#if (defined(PHYDM_COMPILE_ABOVE_3SS)) + else if (path == BB_PATH_C) + val = odm_get_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_C_11AC3); +#endif + +#if (defined(PHYDM_COMPILE_ABOVE_4SS)) + else if (path == BB_PATH_D) + val = odm_get_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_D_11AC3); +#endif + return (u8)val; +} + +void phydm_fa_cnt_statistics_jgr3(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; + u32 ret_value = 0; + u32 cck_enable = 0; + u16 ofdm_tx_counter = 0; + u16 cck_tx_counter = 0; + + if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) + return; + + ofdm_tx_counter = (u16)odm_get_bb_reg(dm, R_0x2de0, MASKLWORD); + cck_tx_counter = (u16)odm_get_bb_reg(dm, R_0x2de4, MASKLWORD); + + ret_value = odm_get_bb_reg(dm, R_0x2d20, MASKDWORD); + fa_t->cnt_fast_fsync = (ret_value & 0xffff); + fa_t->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16); + + ret_value = odm_get_bb_reg(dm, R_0x2d04, MASKDWORD); + fa_t->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16); + + ret_value = odm_get_bb_reg(dm, R_0x2d08, MASKDWORD); + fa_t->cnt_rate_illegal = (ret_value & 0xffff); + fa_t->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16); + + ret_value = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD); + fa_t->cnt_mcs_fail = (ret_value & 0xffff); + + /* read CCK CRC32 counter */ + ret_value = odm_get_bb_reg(dm, R_0x2c04, MASKDWORD); + fa_t->cnt_cck_crc32_error = ((ret_value & 0xffff0000) >> 16); + fa_t->cnt_cck_crc32_ok = ret_value & 0xffff; + + /* read OFDM CRC32 counter */ + ret_value = odm_get_bb_reg(dm, R_0x2c14, MASKDWORD); + fa_t->cnt_ofdm_crc32_error = ((ret_value & 0xffff0000) >> 16); + fa_t->cnt_ofdm_crc32_ok = ret_value & 0xffff; + + /* read HT CRC32 counter */ + ret_value = odm_get_bb_reg(dm, R_0x2c10, MASKDWORD); + fa_t->cnt_ht_crc32_error = ((ret_value & 0xffff0000) >> 16); + fa_t->cnt_ht_crc32_ok = ret_value & 0xffff; + + /* @for VHT part */ + if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F | + ODM_RTL8814B)) { + /* read VHT CRC32 counter */ + ret_value = odm_get_bb_reg(dm, R_0x2c0c, MASKDWORD); + fa_t->cnt_vht_crc32_error = ((ret_value & 0xffff0000) >> 16); + fa_t->cnt_vht_crc32_ok = ret_value & 0xffff; + + ret_value = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD); + fa_t->cnt_mcs_fail_vht = ((ret_value & 0xffff0000) >> 16); + + ret_value = odm_get_bb_reg(dm, R_0x2d0c, MASKDWORD); + fa_t->cnt_crc8_fail_vht = (ret_value & 0xffff) + + ((ret_value & 0xffff0000) >> 16); + } else { + fa_t->cnt_vht_crc32_error = 0; + fa_t->cnt_vht_crc32_ok = 0; + fa_t->cnt_mcs_fail_vht = 0; + fa_t->cnt_crc8_fail_vht = 0; } - if (dig_t->cur_ig_value != current_igi) { - #if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1) - /* Modify big jump step for 8822B and 8197F */ - if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) - phydm_set_big_jump_step(dm, current_igi); - #endif + /* @calculate OFDM FA counter instead of reading brk_cnt*/ + fa_t->cnt_ofdm_fail = fa_t->cnt_parity_fail + fa_t->cnt_rate_illegal + + fa_t->cnt_crc8_fail + fa_t->cnt_mcs_fail + + fa_t->cnt_fast_fsync + fa_t->cnt_sb_search_fail + + fa_t->cnt_mcs_fail_vht + fa_t->cnt_crc8_fail_vht; - #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) - /* Set IGI value of CCK for new CCK AGC */ - if (dm->cck_new_agc && (dm->support_ic_type & PHYSTS_2ND_TYPE_IC)) - odm_set_bb_reg(dm, 0xa0c, 0x3f00, (current_igi >> 1)); - #endif + /* Read CCK FA counter */ + fa_t->cnt_cck_fail = odm_get_bb_reg(dm, R_0x1a5c, MASKLWORD); - /*Add by YuChen for USB IO too slow issue*/ + /* read CCK/OFDM CCA counter */ + ret_value = odm_get_bb_reg(dm, R_0x2c08, MASKDWORD); + fa_t->cnt_ofdm_cca = ((ret_value & 0xffff0000) >> 16); + fa_t->cnt_cck_cca = ret_value & 0xffff; + + /* @CCK RxIQ weighting = 1 => 0x1a14[9:8]=0x0 */ + cck_enable = odm_get_bb_reg(dm, R_0x1a14, 0x300); + if (cck_enable == 0x0) { /* @if(*dm->band_type == ODM_BAND_2_4G) */ + fa_t->cnt_all = fa_t->cnt_ofdm_fail + fa_t->cnt_cck_fail; + fa_t->cnt_cca_all = fa_t->cnt_cck_cca + fa_t->cnt_ofdm_cca; + PHYDM_DBG(dm, DBG_FA_CNT, "ac3 OFDM FA = %d, CCK FA = %d\n", + fa_t->cnt_ofdm_fail, fa_t->cnt_cck_fail); + } else { + fa_t->cnt_all = fa_t->cnt_ofdm_fail; + fa_t->cnt_cca_all = fa_t->cnt_ofdm_cca; + PHYDM_DBG(dm, DBG_FA_CNT, "ac3 CCK disable OFDM FA = %d\n", + fa_t->cnt_ofdm_fail); + } + + PHYDM_DBG(dm, DBG_FA_CNT, + "ac3 [OFDM FA Detail] Parity_fail=((%d)), Rate_Illegal=((%d)), CRC8_fail=((%d)), Mcs_fail=((%d)), Fast_Fsync=((%d)), SBD_fail=((%d))\n", + fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal, + fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail, fa_t->cnt_fast_fsync, + fa_t->cnt_sb_search_fail); +} + +#endif + +void phydm_write_dig_reg_c50(void *dm_void, u8 igi) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__); + + odm_set_bb_reg(dm, ODM_REG(IGI_A, dm), ODM_BIT(IGI, dm), igi); + + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) + odm_set_bb_reg(dm, ODM_REG(IGI_B, dm), ODM_BIT(IGI, dm), igi); + #endif + + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { + odm_set_bb_reg(dm, ODM_REG(IGI_C, dm), ODM_BIT(IGI, dm), igi); + odm_set_bb_reg(dm, ODM_REG(IGI_D, dm), ODM_BIT(IGI, dm), igi); + } + #endif +} + +void phydm_write_dig_reg(void *dm_void, u8 igi) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + + PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__); + + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + phydm_write_dig_reg_jgr3(dm, igi); + else + #endif + phydm_write_dig_reg_c50(dm, igi); + + dig_t->cur_ig_value = igi; +} + +void odm_write_dig(void *dm_void, u8 new_igi) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity; + + PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__); + + /* @1 Check IGI by upper bound */ + if (adaptivity->igi_lmt_en && + new_igi > adaptivity->adapt_igi_up && dm->is_linked) { + new_igi = adaptivity->adapt_igi_up; + + PHYDM_DBG(dm, DBG_DIG, "Force Adaptivity Up-bound=((0x%x))\n", + new_igi); + } + + #if (RTL8192F_SUPPORT) + if ((dm->support_ic_type & ODM_RTL8192F) && + dm->cut_version == ODM_CUT_A && + new_igi > 0x38) { + new_igi = 0x38; + PHYDM_DBG(dm, DBG_DIG, + "Force 92F Adaptivity Up-bound=((0x%x))\n", new_igi); + } + #endif + + if (dig_t->cur_ig_value != new_igi) { + #if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) + /* @Modify big jump step for 8822B and 8197F */ if (dm->support_ic_type & - (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) { - if ((dm->support_ability & ODM_BB_ADAPTIVITY) && - (current_igi < dig_t->cur_ig_value)) { - dig_t->cur_ig_value = current_igi; + (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F)) + phydm_set_big_jump_step(dm, new_igi); + #endif + + #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) + /* Set IGI value of CCK for new CCK AGC */ + if (dm->cck_new_agc && + (dm->support_ic_type & PHYSTS_2ND_TYPE_IC)) + odm_set_bb_reg(dm, R_0xa0c, 0x3f00, (new_igi >> 1)); + #endif + + /*@Add by YuChen for USB IO too slow issue*/ + if (!(dm->support_ic_type & ODM_IC_PWDB_EDCCA)) { + if (dm->support_ability & ODM_BB_ADAPTIVITY && + new_igi < dig_t->cur_ig_value) { + dig_t->cur_ig_value = new_igi; phydm_adaptivity(dm); } } else { - if ((dm->support_ability & ODM_BB_ADAPTIVITY) && - (current_igi > dig_t->cur_ig_value)) { - dig_t->cur_ig_value = current_igi; + if (dm->support_ability & ODM_BB_ADAPTIVITY && + new_igi > dig_t->cur_ig_value) { + dig_t->cur_ig_value = new_igi; phydm_adaptivity(dm); } } - - /* Set IGI value */ - odm_set_bb_reg(dm, ODM_REG(IGI_A, dm), ODM_BIT(IGI, dm), current_igi); - - #if (defined(PHYDM_COMPILE_ABOVE_2SS)) - if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) - odm_set_bb_reg(dm, ODM_REG(IGI_B, dm), ODM_BIT(IGI, dm), current_igi); - #endif - - #if (defined(PHYDM_COMPILE_ABOVE_4SS)) - if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { - odm_set_bb_reg(dm, ODM_REG(IGI_C, dm), ODM_BIT(IGI, dm), current_igi); - odm_set_bb_reg(dm, ODM_REG(IGI_D, dm), ODM_BIT(IGI, dm), current_igi); - } - #endif - - dig_t->cur_ig_value = current_igi; + phydm_write_dig_reg(dm, new_igi); } - PHYDM_DBG(dm, DBG_DIG, "New_igi=((0x%x))\n\n", current_igi); + PHYDM_DBG(dm, DBG_DIG, "New_igi=((0x%x))\n\n", new_igi); } -void -phydm_set_dig_val( - void *dm_void, - u32 *val_buf, - u8 val_len -) +u8 phydm_get_igi_reg_val(void *dm_void, enum bb_path path) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 val = 0; + u32 bit_map = ODM_BIT(IGI, dm); + + switch (path) { + case BB_PATH_A: + val = odm_get_bb_reg(dm, ODM_REG(IGI_A, dm), bit_map); + break; + #if (defined(PHYDM_COMPILE_ABOVE_2SS)) + case BB_PATH_B: + val = odm_get_bb_reg(dm, ODM_REG(IGI_B, dm), bit_map); + break; + #endif + + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + case BB_PATH_C: + val = odm_get_bb_reg(dm, ODM_REG(IGI_C, dm), bit_map); + break; + #endif + + #if (defined(PHYDM_COMPILE_ABOVE_4SS)) + case BB_PATH_D: + val = odm_get_bb_reg(dm, ODM_REG(IGI_D, dm), bit_map); + break; + #endif + + default: + break; + } + + return (u8)val; +} + +u8 phydm_get_igi(void *dm_void, enum bb_path path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 val = 0; + + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + val = phydm_get_igi_reg_val_jgr3(dm, path); + else + #endif + val = phydm_get_igi_reg_val(dm, path); + + return val; +} + +void phydm_set_dig_val(void *dm_void, u32 *val_buf, u8 val_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; if (val_len != 1) { PHYDM_DBG(dm, ODM_COMP_API, "[Error][DIG]Need val_len=1\n"); return; } - + odm_write_dig(dm, (u8)(*val_buf)); } -void -odm_pause_dig( - void *dm_void, - enum phydm_pause_type type, - enum phydm_pause_level lv, - u8 igi_input -) +void odm_pause_dig(void *dm_void, enum phydm_pause_type type, + enum phydm_pause_level lv, u8 igi_input) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 rpt = false; - u32 igi = (u32)igi_input; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 rpt = false; + u32 igi = (u32)igi_input; - PHYDM_DBG(dm, DBG_DIG, "[%s]type = %s, LV = %d, igi = 0x%x\n", - __func__, - ((type == PHYDM_PAUSE) ? "Pause" : ((type == PHYDM_RESUME) ? "Resume" : "PauseNoSet")), + PHYDM_DBG(dm, DBG_DIG, "[%s]type=%d, LV=%d, igi=0x%x\n", __func__, type, lv, igi); switch (type) { - case PHYDM_PAUSE: - case PHYDM_PAUSE_NO_SET: - { + case PHYDM_PAUSE_NO_SET: { rpt = phydm_pause_func(dm, F00_DIG, PHYDM_PAUSE, lv, 1, &igi); break; } - - case PHYDM_RESUME: - { + + case PHYDM_RESUME: { rpt = phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, lv, 1, &igi); break; } @@ -308,35 +691,25 @@ odm_pause_dig( PHYDM_DBG(dm, DBG_DIG, "pause_result=%d\n", rpt); } - boolean -odm_dig_abort( - void *dm_void -) +phydm_dig_abort(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; + void *adapter = dm->adapter; #endif /* support_ability */ if ((!(dm->support_ability & ODM_BB_FA_CNT)) || - (!(dm->support_ability & ODM_BB_DIG)) || - *dm->is_scan_in_process) { + (!(dm->support_ability & ODM_BB_DIG)) || + *dm->is_scan_in_process) { PHYDM_DBG(dm, DBG_DIG, "Not Support\n"); return true; } if (dm->pause_ability & ODM_BB_DIG) { - - PHYDM_DBG(dm, DBG_DIG, "Return: Pause DIG in LV=%d\n", dm->pause_lv_table.lv_dig); - return true; - } - - if (dig_t->is_ignore_dig) { - dig_t->is_ignore_dig = false; - PHYDM_DBG(dm, DBG_DIG, "Return: Ignore DIG\n"); + PHYDM_DBG(dm, DBG_DIG, "Return: Pause DIG in LV=%d\n", + dm->pause_lv_table.lv_dig); return true; } @@ -352,25 +725,22 @@ odm_dig_abort( return false; } -void -phydm_dig_init( - void *dm_void -) +void phydm_dig_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - struct phydm_fa_struct *false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(dm, PHYDM_FALSEALMCNT); + struct phydm_fa_struct *false_alm_cnt = &dm->false_alm_cnt; #endif - u32 ret_value = 0; - u8 i; + u32 ret_value = 0; + u8 i; dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE; dig_t->dm_dig_min = DIG_MIN_PERFORMANCE; dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE; - dig_t->is_ignore_dig = false; - dig_t->cur_ig_value = (u8) odm_get_bb_reg(dm, ODM_REG(IGI_A, dm), ODM_BIT(IGI, dm)); + dig_t->cur_ig_value = phydm_get_igi(dm, BB_PATH_A); + dig_t->is_media_connect = false; dig_t->fa_th[0] = 250; @@ -378,81 +748,55 @@ phydm_dig_init( dig_t->fa_th[2] = 750; dig_t->is_dbg_fa_th = false; #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - /* For RTL8881A */ + /* @For RTL8881A */ false_alm_cnt->cnt_ofdm_fail_pre = 0; #endif - odm_memory_set(dm, dig_t->pause_dig_value, 0, PHYDM_PAUSE_MAX_NUM); - dig_t->pause_lv_bitmap = 0; - dig_t->rx_gain_range_max = DIG_MAX_BALANCE_MODE; dig_t->rx_gain_range_min = dig_t->cur_ig_value; -#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1) +#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) dig_t->enable_adjust_big_jump = 1; if (dm->support_ic_type & ODM_RTL8822B) - ret_value = odm_get_bb_reg(dm, 0x8c8, MASKLWORD); - else if (dm->support_ic_type & ODM_RTL8197F) - ret_value = odm_get_bb_reg(dm, 0xc74, MASKLWORD); + ret_value = odm_get_bb_reg(dm, R_0x8c8, MASKLWORD); + else if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) + ret_value = odm_get_bb_reg(dm, R_0xc74, MASKLWORD); dig_t->big_jump_step1 = (u8)(ret_value & 0xe) >> 1; dig_t->big_jump_step2 = (u8)(ret_value & 0x30) >> 4; dig_t->big_jump_step3 = (u8)(ret_value & 0xc0) >> 6; - if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) { + if (dm->support_ic_type & + (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F)) { for (i = 0; i < sizeof(dig_t->big_jump_lmt); i++) { if (dig_t->big_jump_lmt[i] == 0) - dig_t->big_jump_lmt[i] = 0x64; /* Set -10dBm as default value */ + dig_t->big_jump_lmt[i] = 0x64; + /* Set -10dBm as default value */ } } #endif - dm->pre_rssi_min = 0; - #ifdef PHYDM_TDMA_DIG_SUPPORT - dm->original_dig_restore = 1; + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + dm->original_dig_restore = true; + dm->tdma_dig_state_number = DIG_NUM_OF_TDMA_STATES; + dm->tdma_dig_timer_ms = DIG_TIMER_MS; + #endif +#endif +#ifdef CFG_DIG_DAMPING_CHK + phydm_dig_recorder_reset(dm); + dig_t->dig_dl_en = 1; #endif } - -boolean -phydm_dig_performance_mode_decision( - struct dm_struct *dm -) +void phydm_dig_abs_boundary_decision(struct dm_struct *dm, boolean is_dfs_band) { - boolean is_performance = true; - -#ifdef PHYDM_DIG_MODE_DECISION_SUPPORT - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - - switch (dig_t->dig_mode_decision) { - case PHYDM_DIG_PERFORAMNCE_MODE: - is_performance = true; - break; - case PHYDM_DIG_COVERAGE_MODE: - is_performance = false; - break; - default: - is_performance = true; - break; - } -#endif - - return is_performance; -} - -void -phydm_dig_abs_boundary_decision( - struct dm_struct *dm, - boolean is_performance, - boolean is_dfs_band -) -{ - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_adaptivity_struct *adapt = &dm->adaptivity; if (!dm->is_linked) { dig_t->dm_dig_max = DIG_MAX_COVERAGR; dig_t->dm_dig_min = DIG_MIN_COVERAGE; - } else if (is_dfs_band == true) { + } else if (is_dfs_band) { if (*dm->band_width == CHANNEL_WIDTH_20) dig_t->dm_dig_min = DIG_MIN_DFS + 2; else @@ -460,59 +804,66 @@ phydm_dig_abs_boundary_decision( dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE; dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE; - - } else if (!is_performance) { - dig_t->dm_dig_max = DIG_MAX_COVERAGR; - dig_t->dm_dig_min = DIG_MIN_COVERAGE; - #if (DIG_HW == 1) - dig_t->dig_max_of_min = DIG_MIN_COVERAGE; - #else - dig_t->dig_max_of_min = DIG_MAX_OF_MIN_COVERAGE; - #endif } else { - if (*dm->bb_op_mode == PHYDM_BALANCE_MODE) { /*service > 2 devices*/ + if (*dm->bb_op_mode == PHYDM_BALANCE_MODE) { + /*service > 2 devices*/ dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE; #if (DIG_HW == 1) dig_t->dig_max_of_min = DIG_MIN_COVERAGE; #else dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE; #endif - } else if (*dm->bb_op_mode == PHYDM_PERFORMANCE_MODE) { /*service 1 devices*/ - dig_t->dm_dig_max = DIG_MAX_PERFORMANCE_MODE; + } else if (*dm->bb_op_mode == PHYDM_PERFORMANCE_MODE) { + /*service 1 devices*/ + if (adapt->is_adapt_en && (dm->support_ic_type & + (ODM_RTL8197F | ODM_RTL8192F))) + /*dig_max shouldn't be too high because of adaptivity*/ + dig_t->dm_dig_max = + MIN_2((adapt->th_l2h + 40), + DIG_MAX_PERFORMANCE_MODE); + else + dig_t->dm_dig_max = DIG_MAX_PERFORMANCE_MODE; + dig_t->dig_max_of_min = DIG_MAX_OF_MIN_PERFORMANCE_MODE; } if (dm->support_ic_type & - (ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B)) + (ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B)) dig_t->dm_dig_min = 0x1c; else if (dm->support_ic_type & ODM_RTL8197F) - dig_t->dm_dig_min = 0x1e; /*For HW setting*/ + dig_t->dm_dig_min = 0x1e; /*@For HW setting*/ else dig_t->dm_dig_min = DIG_MIN_PERFORMANCE; } - PHYDM_DBG(dm, DBG_DIG, - "Abs-bound{Max, Min}={0x%x, 0x%x}, Max_of_min = 0x%x\n", - dig_t->dm_dig_max, - dig_t->dm_dig_min, - dig_t->dig_max_of_min); - + PHYDM_DBG(dm, DBG_DIG, "Abs{Max, Min}={0x%x, 0x%x}, Max_of_min=0x%x\n", + dig_t->dm_dig_max, dig_t->dm_dig_min, dig_t->dig_max_of_min); } -void -phydm_dig_dym_boundary_decision( - struct dm_struct *dm, - boolean is_performance -) +void phydm_dig_dym_boundary_decision(struct dm_struct *dm) { - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; +#ifdef CFG_DIG_DAMPING_CHK + struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t; +#endif u8 offset = 15, tmp_max = 0; u8 max_of_rssi_min = 0; - PHYDM_DBG(dm, DBG_DIG, - "Offset=((%d))\n", offset); + PHYDM_DBG(dm, DBG_DIG, "%s ======>\n", __func__); - /* DIG lower bound */ + if (!dm->is_linked) { + /*@if no link, always stay at lower bound*/ + dig_t->rx_gain_range_max = dig_t->dig_max_of_min; + dig_t->rx_gain_range_min = dig_t->dm_dig_min; + + PHYDM_DBG(dm, DBG_DIG, "No-Link, Dyn{Max, Min}={0x%x, 0x%x}\n", + dig_t->rx_gain_range_max, dig_t->rx_gain_range_min); + return; + } + + PHYDM_DBG(dm, DBG_DIG, "rssi_min=%d, ofst=%d\n", dm->rssi_min, offset); + + /* @DIG lower bound */ if (dm->rssi_min > dig_t->dig_max_of_min) dig_t->rx_gain_range_min = dig_t->dig_max_of_min; else if (dm->rssi_min < dig_t->dm_dig_min) @@ -520,7 +871,20 @@ phydm_dig_dym_boundary_decision( else dig_t->rx_gain_range_min = dm->rssi_min; - /* DIG upper bound */ +#ifdef CFG_DIG_DAMPING_CHK + /*@Limit Dyn min by damping*/ + if (dig_t->dig_dl_en && + dig_rc->damping_limit_en && + dig_t->rx_gain_range_min < dig_rc->damping_limit_val) { + PHYDM_DBG(dm, DBG_DIG, + "[Limit by Damping] Dig_dyn_min=0x%x -> 0x%x\n", + dig_t->rx_gain_range_min, dig_rc->damping_limit_val); + + dig_t->rx_gain_range_min = dig_rc->damping_limit_val; + } +#endif + + /* @DIG upper bound */ tmp_max = dig_t->rx_gain_range_min + offset; if (dig_t->rx_gain_range_min != dm->rssi_min) { max_of_rssi_min = dm->rssi_min + offset; @@ -530,325 +894,285 @@ phydm_dig_dym_boundary_decision( if (tmp_max > dig_t->dm_dig_max) dig_t->rx_gain_range_max = dig_t->dm_dig_max; + else if (tmp_max < dig_t->dm_dig_min) + dig_t->rx_gain_range_max = dig_t->dm_dig_min; else dig_t->rx_gain_range_max = tmp_max; - /* 1 Force Lower Bound for AntDiv */ - if (dm->is_one_entry_only != 0) - goto out; + #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + /* @1 Force Lower Bound for AntDiv */ + if (!dm->is_one_entry_only && + (dm->support_ability & ODM_BB_ANT_DIV) && + (dm->ant_div_type == CG_TRX_HW_ANTDIV || + dm->ant_div_type == CG_TRX_SMART_ANTDIV)) { + if (dig_t->ant_div_rssi_max > dig_t->dig_max_of_min) + dig_t->rx_gain_range_min = dig_t->dig_max_of_min; + else + dig_t->rx_gain_range_min = (u8)dig_t->ant_div_rssi_max; - if ((dm->support_ic_type & ODM_ANTDIV_SUPPORT) && (dm->support_ability & ODM_BB_ANT_DIV)) { - if (dm->ant_div_type == CG_TRX_HW_ANTDIV || dm->ant_div_type == CG_TRX_SMART_ANTDIV) { - if (dig_t->ant_div_rssi_max > dig_t->dig_max_of_min) - dig_t->rx_gain_range_min = dig_t->dig_max_of_min; - else - dig_t->rx_gain_range_min = (u8)dig_t->ant_div_rssi_max; - - PHYDM_DBG(dm, DBG_DIG, - "AntDiv: Force Dyn-Min = 0x%x, RSSI_max = 0x%x\n", - dig_t->rx_gain_range_min, dig_t->ant_div_rssi_max); - } + PHYDM_DBG(dm, DBG_DIG, "Force Dyn-Min=0x%x, RSSI_max=0x%x\n", + dig_t->rx_gain_range_min, dig_t->ant_div_rssi_max); } + #endif -out: - PHYDM_DBG(dm, DBG_DIG, - "Dym-bound{Max, Min}={0x%x, 0x%x}\n", - dig_t->rx_gain_range_max, dig_t->rx_gain_range_min); + PHYDM_DBG(dm, DBG_DIG, "Dyn{Max, Min}={0x%x, 0x%x}\n", + dig_t->rx_gain_range_max, dig_t->rx_gain_range_min); } -void -phydm_dig_abnormal_case( - struct dm_struct *dm, - u8 current_igi, - boolean is_performance, - boolean is_dfs_band -) +void phydm_dig_abnormal_case(struct dm_struct *dm) { - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - boolean first_connect = false, first_dis_connect = false; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - first_connect = (dm->is_linked) && !dig_t->is_media_connect; - first_dis_connect = (!dm->is_linked) && dig_t->is_media_connect; - - /* Modify DIG lower bound, deal with abnormal case */ - if (!dm->is_linked && is_dfs_band && is_performance) { - dig_t->rx_gain_range_max = DIG_MAX_DFS; - PHYDM_DBG(dm, DBG_DIG, - "DFS band: Force max to 0x%x before link\n", dig_t->rx_gain_range_max); - } - - if (is_dfs_band) - dig_t->rx_gain_range_min = dig_t->dm_dig_min; - - /* Abnormal lower bound case */ + /* @Abnormal lower bound case */ if (dig_t->rx_gain_range_min > dig_t->rx_gain_range_max) dig_t->rx_gain_range_min = dig_t->rx_gain_range_max; - PHYDM_DBG(dm, DBG_DIG, - "Abnoraml checked {Max, Min}={0x%x, 0x%x}\n", - dig_t->rx_gain_range_max, dig_t->rx_gain_range_min); - + PHYDM_DBG(dm, DBG_DIG, "Abnoraml checked {Max, Min}={0x%x, 0x%x}\n", + dig_t->rx_gain_range_max, dig_t->rx_gain_range_min); } -u8 -phydm_dig_current_igi_by_fa_th( - struct dm_struct *dm, - u8 current_igi, - u32 false_alm_cnt, - u8 *step_size -) +u8 phydm_new_igi_by_fa(struct dm_struct *dm, u8 igi, u32 fa_cnt, u8 *step_size) { - boolean dig_go_up_check = true; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - - dig_go_up_check = phydm_dig_go_up_check(dm); + boolean dig_go_up_check = true; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - if ((false_alm_cnt > dig_t->fa_th[2]) && dig_go_up_check) - current_igi = current_igi + step_size[0]; - else if ((false_alm_cnt > dig_t->fa_th[1]) && dig_go_up_check) - current_igi = current_igi + step_size[1]; - else if (false_alm_cnt < dig_t->fa_th[0]) - current_igi = current_igi - step_size[2]; +#if 0 + /*@dig_go_up_check = phydm_dig_go_up_check(dm);*/ +#endif - return current_igi; + if (fa_cnt > dig_t->fa_th[2] && dig_go_up_check) + igi = igi + step_size[0]; + else if ((fa_cnt > dig_t->fa_th[1]) && dig_go_up_check) + igi = igi + step_size[1]; + else if (fa_cnt < dig_t->fa_th[0]) + igi = igi - step_size[2]; + return igi; } -u8 -phydm_dig_igi_start_value( - struct dm_struct *dm, - boolean is_performance, - u8 current_igi, - u32 false_alm_cnt, - boolean is_dfs_band -) +u8 phydm_get_new_igi(struct dm_struct *dm, u8 igi, u32 fa_cnt, + boolean is_dfs_band) { - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - u8 step_size[3] = {0}; - boolean first_connect = false, first_dis_connect = false; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + u8 step[3] = {0}; + boolean first_connect = false, first_dis_connect = false; first_connect = (dm->is_linked) && !dig_t->is_media_connect; first_dis_connect = (!dm->is_linked) && dig_t->is_media_connect; if (dm->is_linked) { if (dm->pre_rssi_min <= dm->rssi_min) { - step_size[0] = 2; - step_size[1] = 1; - step_size[2] = 2; + PHYDM_DBG(dm, DBG_DIG, "pre_rssi_min <= rssi_min\n"); + step[0] = 2; + step[1] = 1; + step[2] = 2; } else { - step_size[0] = 4; - step_size[1] = 2; - step_size[2] = 2; + step[0] = 4; + step[1] = 2; + step[2] = 2; } - dm->pre_rssi_min = dm->rssi_min; } else { - step_size[0] = 2; - step_size[1] = 1; - step_size[2] = 2; + step[0] = 2; + step[1] = 1; + step[2] = 2; } - - PHYDM_DBG(dm, DBG_DIG, - "step_size = {-%d, +%d, +%d}\n", step_size[2], step_size[1], step_size[0]); - PHYDM_DBG(dm, DBG_DIG, - "rssi_min = %d, pre_rssi_min = %d\n", dm->rssi_min, dm->pre_rssi_min); + PHYDM_DBG(dm, DBG_DIG, "step = {-%d, +%d, +%d}\n", step[2], step[1], + step[0]); - if (dm->is_linked && is_performance) { - /* 2 After link */ - PHYDM_DBG(dm, DBG_DIG, "Adjust IGI after link\n"); - - if (first_connect && is_performance) { - if (is_dfs_band) { - if (dm->rssi_min > DIG_MAX_DFS) - current_igi = DIG_MAX_DFS; - else - current_igi = dm->rssi_min; - PHYDM_DBG(dm, DBG_DIG, - "DFS band: one shot IGI to 0x%x most\n", dig_t->rx_gain_range_max); - } else - current_igi = dig_t->rx_gain_range_min; -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -#if (RTL8812A_SUPPORT == 1) - if (dm->support_ic_type == ODM_RTL8812) - odm_config_bb_with_header_file(dm, CONFIG_BB_AGC_TAB_DIFF); -#endif -#endif - PHYDM_DBG(dm, DBG_DIG, - "First connect case: IGI does on-shot to 0x%x\n", current_igi); + if (first_connect) { + if (is_dfs_band) { + if (dm->rssi_min > DIG_MAX_DFS) + igi = DIG_MAX_DFS; + else + igi = dm->rssi_min; + PHYDM_DBG(dm, DBG_DIG, "DFS band:IgiMax=0x%x\n", + dig_t->rx_gain_range_max); } else { - /* 4 Abnormal # beacon case */ -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - if ((dm->phy_dbg_info.num_qry_beacon_pkt < 5) && - (false_alm_cnt < DM_DIG_FA_TH1) && (dm->bsta_state)) { - if (dm->support_ic_type != ODM_RTL8723D) { - dig_t->rx_gain_range_min = 0x1c; - current_igi = dig_t->rx_gain_range_min; - PHYDM_DBG(dm, DBG_DIG, - "Abnormal #beacon (%d) case: IGI does one-shot to 0x%x\n", - dm->phy_dbg_info.num_qry_beacon_pkt, current_igi); - } - } else -#endif - current_igi = phydm_dig_current_igi_by_fa_th(dm, - current_igi, false_alm_cnt, step_size); + igi = dig_t->rx_gain_range_min; } + + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + #if (RTL8812A_SUPPORT) + if (dm->support_ic_type == ODM_RTL8812) + odm_config_bb_with_header_file(dm, + CONFIG_BB_AGC_TAB_DIFF); + #endif + #endif + PHYDM_DBG(dm, DBG_DIG, "First connect: foce IGI=0x%x\n", igi); + } else if (dm->is_linked) { + PHYDM_DBG(dm, DBG_DIG, "Adjust IGI @ linked\n"); + /* @4 Abnormal # beacon case */ + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + if (dm->phy_dbg_info.num_qry_beacon_pkt < 5 && + fa_cnt < DM_DIG_FA_TH1 && dm->bsta_state && + dm->support_ic_type != ODM_RTL8723D) { + dig_t->rx_gain_range_min = 0x1c; + igi = dig_t->rx_gain_range_min; + PHYDM_DBG(dm, DBG_DIG, "Beacon_num=%d,force igi=0x%x\n", + dm->phy_dbg_info.num_qry_beacon_pkt, igi); + } else { + igi = phydm_new_igi_by_fa(dm, igi, fa_cnt, step); + } + #else + igi = phydm_new_igi_by_fa(dm, igi, fa_cnt, step); + #endif } else { - /* 2 Before link */ + /* @2 Before link */ PHYDM_DBG(dm, DBG_DIG, "Adjust IGI before link\n"); if (first_dis_connect) { - current_igi = dig_t->dm_dig_min; - PHYDM_DBG(dm, DBG_DIG, "First disconnect case: IGI does on-shot to lower bound\n"); - } else { + igi = dig_t->dm_dig_min; PHYDM_DBG(dm, DBG_DIG, - "Pre_IGI=((0x%x)), FA=((%d))\n", current_igi, false_alm_cnt); + "First disconnect:foce IGI to lower bound\n"); + } else { + PHYDM_DBG(dm, DBG_DIG, "Pre_IGI=((0x%x)), FA=((%d))\n", + igi, fa_cnt); - current_igi = phydm_dig_current_igi_by_fa_th(dm, - current_igi, false_alm_cnt, step_size); + igi = phydm_new_igi_by_fa(dm, igi, fa_cnt, step); } } - return current_igi; + /*@Check IGI by dyn-upper/lower bound */ + if (igi < dig_t->rx_gain_range_min) + igi = dig_t->rx_gain_range_min; + if (igi > dig_t->rx_gain_range_max) + igi = dig_t->rx_gain_range_max; + + PHYDM_DBG(dm, DBG_DIG, "fa_cnt = %d, IGI: 0x%x -> 0x%x\n", + fa_cnt, dig_t->cur_ig_value, igi); + + return igi; } -void -phydm_dig( - void *dm_void -) +boolean phydm_dig_dfs_mode_en(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean dfs_mode_en = false; + + /* @Modify lower bound for DFS band */ + if (dm->is_dfs_band) { + #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) + dfs_mode_en = true; + #else + if (phydm_dfs_master_enabled(dm)) + dfs_mode_en = true; + #endif + PHYDM_DBG(dm, DBG_DIG, "In DFS band\n"); + } + return dfs_mode_en; +} + +void phydm_dig(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; #ifdef PHYDM_TDMA_DIG_SUPPORT struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc; #endif - boolean first_connect, first_dis_connect; - u8 current_igi = dig_t->cur_ig_value; - u32 false_alm_cnt= falm_cnt->cnt_all; - boolean is_dfs_band = false, is_performance = true; + boolean first_connect, first_disconnect; + u8 igi = dig_t->cur_ig_value; + u8 new_igi = 0x20; + u32 fa_cnt = falm_cnt->cnt_all; + boolean dfs_mode_en = false; #ifdef PHYDM_TDMA_DIG_SUPPORT - if (dm->original_dig_restore == 0) { + if (!(dm->original_dig_restore)) { if (dig_t->cur_ig_value_tdma == 0) dig_t->cur_ig_value_tdma = dig_t->cur_ig_value; - - current_igi = dig_t->cur_ig_value_tdma; - false_alm_cnt = falm_cnt_acc->cnt_all_1sec; + + igi = dig_t->cur_ig_value_tdma; + fa_cnt = falm_cnt_acc->cnt_all_1sec; } #endif - if (odm_dig_abort(dm) == true) { - dig_t->cur_ig_value = (u8)odm_get_bb_reg(dm, 0xc50, 0x7f); + if (phydm_dig_abort(dm)) { + dig_t->cur_ig_value = phydm_get_igi(dm, BB_PATH_A); return; } PHYDM_DBG(dm, DBG_DIG, "%s Start===>\n", __func__); - /* 1 Update status */ + /* @1 Update status */ first_connect = (dm->is_linked) && !dig_t->is_media_connect; - first_dis_connect = (!dm->is_linked) && dig_t->is_media_connect; + first_disconnect = (!dm->is_linked) && dig_t->is_media_connect; PHYDM_DBG(dm, DBG_DIG, - "is_linked = %d, RSSI = %d, 1stConnect = %d, 1stDisconnect = %d\n", - dm->is_linked, dm->rssi_min, first_connect, first_dis_connect); + "is_linked=%d, RSSI=%d, 1stConnect=%d, 1stDisconnect=%d\n", + dm->is_linked, dm->rssi_min, first_connect, first_disconnect); -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE)) - /* Modify lower bound for DFS band */ - if (dm->is_dfs_band) { - #if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) - if (phydm_dfs_master_enabled(dm)) - #endif - is_dfs_band = true; - - PHYDM_DBG(dm, DBG_DIG, "In DFS band\n"); - } + PHYDM_DBG(dm, DBG_DIG, "DIG ((%s)) mode\n", + (*dm->bb_op_mode ? "Balance" : "Performance")); + + /*@DFS mode enable check*/ + dfs_mode_en = phydm_dig_dfs_mode_en(dm); + +#ifdef CFG_DIG_DAMPING_CHK + /*Record IGI History*/ + phydm_dig_recorder(dm, first_connect, igi, fa_cnt); + + /*@DIG Damping Check*/ + phydm_dig_damping_chk(dm); #endif - is_performance = phydm_dig_performance_mode_decision(dm); - PHYDM_DBG(dm, DBG_DIG, - "DIG ((%s)) mode\n", (is_performance ? "Performance" : "Coverage")); + /*@Absolute Boundary Decision */ + phydm_dig_abs_boundary_decision(dm, dfs_mode_en); - /* Boundary Decision */ - phydm_dig_abs_boundary_decision(dm, is_performance, is_dfs_band); + /*@Dynamic Boundary Decision*/ + phydm_dig_dym_boundary_decision(dm); - /*init dym boundary*/ - dig_t->rx_gain_range_max = dig_t->dig_max_of_min; /*if no link, always stay at lower bound*/ - dig_t->rx_gain_range_min = dig_t->dm_dig_min; + /*@Abnormal case check*/ + phydm_dig_abnormal_case(dm); - /* Adjust boundary by RSSI */ - if (dm->is_linked) - phydm_dig_dym_boundary_decision(dm, is_performance); + /*@FA threshold decision */ + phydm_fa_threshold_check(dm, dfs_mode_en); - /*Abnormal case check*/ - phydm_dig_abnormal_case(dm, current_igi, is_performance, is_dfs_band); + /*Select new IGI by FA */ + new_igi = phydm_get_new_igi(dm, igi, fa_cnt, dfs_mode_en); - /* False alarm threshold decision */ - odm_fa_threshold_check(dm, is_dfs_band, is_performance); - - /* 1 Adjust initial gain by false alarm */ - current_igi = phydm_dig_igi_start_value(dm, - is_performance, current_igi, false_alm_cnt, is_dfs_band); - - /* 1 Check initial gain by upper/lower bound */ - if (current_igi < dig_t->rx_gain_range_min) - current_igi = dig_t->rx_gain_range_min; - - if (current_igi > dig_t->rx_gain_range_max) - current_igi = dig_t->rx_gain_range_max; - - PHYDM_DBG(dm, DBG_DIG, "New_IGI=((0x%x))\n", current_igi); - - /* 1 Update status */ -#ifdef PHYDM_TDMA_DIG_SUPPORT - if (dm->original_dig_restore == 0) { - dig_t->cur_ig_value_tdma = current_igi; - /*It is possible fa_acc_1sec_tsf >= */ - /*1sec while tdma_dig_state == 0*/ + /* @1 Update status */ + #ifdef PHYDM_TDMA_DIG_SUPPORT + if (!(dm->original_dig_restore)) { + dig_t->cur_ig_value_tdma = new_igi; + /*@It is possible fa_acc_1sec_tsf >= */ + /*@1sec while tdma_dig_state == 0*/ if (dig_t->tdma_dig_state != 0) odm_write_dig(dm, dig_t->cur_ig_value_tdma); } else -#endif - odm_write_dig(dm, current_igi); + #endif + odm_write_dig(dm, new_igi); dig_t->is_media_connect = dm->is_linked; - - PHYDM_DBG(dm, DBG_DIG, "DIG end\n"); } -void -phydm_dig_lps_32k( - void *dm_void -) +void phydm_dig_lps_32k(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 current_igi = dm->rssi_min; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 current_igi = dm->rssi_min; odm_write_dig(dm, current_igi); } -void -phydm_dig_by_rssi_lps( - void *dm_void -) +void phydm_dig_by_rssi_lps(void *dm_void) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fa_struct *falm_cnt; +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT)) + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fa_struct *falm_cnt; - u8 rssi_lower = DIG_MIN_LPS; /* 0x1E or 0x1C */ - u8 current_igi = dm->rssi_min; + u8 rssi_lower = DIG_MIN_LPS; /* @0x1E or 0x1C */ + u8 current_igi = dm->rssi_min; falm_cnt = &dm->false_alm_cnt; - if (odm_dig_abort(dm) == true) + if (phydm_dig_abort(dm)) return; current_igi = current_igi + RSSI_OFFSET_DIG_LPS; PHYDM_DBG(dm, DBG_DIG, "%s==>\n", __func__); /* Using FW PS mode to make IGI */ - /* Adjust by FA in LPS MODE */ + /* @Adjust by FA in LPS MODE */ if (falm_cnt->cnt_all > DM_DIG_FA_TH2_LPS) current_igi = current_igi + 4; else if (falm_cnt->cnt_all > DM_DIG_FA_TH1_LPS) @@ -856,8 +1180,7 @@ phydm_dig_by_rssi_lps( else if (falm_cnt->cnt_all < DM_DIG_FA_TH0_LPS) current_igi = current_igi - 2; - - /* Lower bound checking */ + /* @Lower bound checking */ /* RSSI Lower bound check */ if ((dm->rssi_min - 10) > DIG_MIN_LPS) @@ -871,377 +1194,439 @@ phydm_dig_by_rssi_lps( else if (current_igi < rssi_lower) current_igi = rssi_lower; - PHYDM_DBG(dm, DBG_DIG, - "%s falm_cnt->cnt_all = %d\n", __func__, - falm_cnt->cnt_all); - PHYDM_DBG(dm, DBG_DIG, - "%s dm->rssi_min = %d\n", __func__, - dm->rssi_min); - PHYDM_DBG(dm, DBG_DIG, - "%s current_igi = 0x%x\n", __func__, - current_igi); - - /* odm_write_dig(dm, dig_t->cur_ig_value); */ + PHYDM_DBG(dm, DBG_DIG, "fa_cnt_all=%d, rssi_min=%d, curr_igi=0x%x\n", + falm_cnt->cnt_all, dm->rssi_min, current_igi); odm_write_dig(dm, current_igi); #endif } -/* 3============================================================ +/* @3============================================================ * 3 FASLE ALARM CHECK - * 3============================================================ */ -void -phydm_false_alarm_counter_reg_reset( - void *dm_void -) + * 3============================================================ + */ +void phydm_false_alarm_counter_reg_reset(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; #ifdef PHYDM_TDMA_DIG_SUPPORT + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc; #endif - u32 false_alm_cnt; + u32 false_alm_cnt = 0; #ifdef PHYDM_TDMA_DIG_SUPPORT - if (dm->original_dig_restore == 0) { + if (!(dm->original_dig_restore)) { if (dig_t->cur_ig_value_tdma == 0) dig_t->cur_ig_value_tdma = dig_t->cur_ig_value; false_alm_cnt = falm_cnt_acc->cnt_all_1sec; - } else + } else #endif { false_alm_cnt = falm_cnt->cnt_all; } -#if (ODM_IC_11N_SERIES_SUPPORT == 1) - if (dm->support_ic_type & ODM_IC_11N_SERIES) { - /*reset false alarm counter registers*/ - odm_set_bb_reg(dm, 0xC0C, BIT(31), 1); - odm_set_bb_reg(dm, 0xC0C, BIT(31), 0); - odm_set_bb_reg(dm, 0xD00, BIT(27), 1); - odm_set_bb_reg(dm, 0xD00, BIT(27), 0); +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + /* @reset CCK FA counter */ + odm_set_bb_reg(dm, R_0x1a2c, BIT(15) | BIT(14), 0); + odm_set_bb_reg(dm, R_0x1a2c, BIT(15) | BIT(14), 2); - /*update ofdm counter*/ - /*update page C counter*/ - odm_set_bb_reg(dm, 0xD00, BIT(31), 0); - /*update page D counter*/ - odm_set_bb_reg(dm, 0xD00, BIT(31), 0); + /* @reset CCK CCA counter */ + odm_set_bb_reg(dm, R_0x1a2c, BIT(13) | BIT(12), 0); + odm_set_bb_reg(dm, R_0x1a2c, BIT(13) | BIT(12), 2); - /*reset CCK CCA counter*/ - odm_set_bb_reg(dm, 0xA2C, BIT(13) | BIT(12), 0); - odm_set_bb_reg(dm, 0xA2C, BIT(13) | BIT(12), 2); - - /*reset CCK FA counter*/ - odm_set_bb_reg(dm, 0xA2C, BIT(15) | BIT(14), 0); - odm_set_bb_reg(dm, 0xA2C, BIT(15) | BIT(14), 2); - - /*reset CRC32 counter*/ - odm_set_bb_reg(dm, 0xF14, BIT(16), 1); - odm_set_bb_reg(dm, 0xF14, BIT(16), 0); + /* @Disable common rx clk gating => WLANBB-1106*/ + odm_set_bb_reg(dm, R_0x1d2c, BIT(31), 0); + /* @reset OFDM CCA counter, OFDM FA counter*/ + phydm_reset_bb_hw_cnt(dm); + /* @Enable common rx clk gating => WLANBB-1106*/ + odm_set_bb_reg(dm, R_0x1d2c, BIT(31), 1); } -#endif /* #if (ODM_IC_11N_SERIES_SUPPORT == 1) */ +#endif +#if (ODM_IC_11N_SERIES_SUPPORT) + if (dm->support_ic_type & ODM_IC_11N_SERIES) { + /* @reset false alarm counter registers*/ + odm_set_bb_reg(dm, R_0xc0c, BIT(31), 1); + odm_set_bb_reg(dm, R_0xc0c, BIT(31), 0); + odm_set_bb_reg(dm, R_0xd00, BIT(27), 1); + odm_set_bb_reg(dm, R_0xd00, BIT(27), 0); -#if (ODM_IC_11AC_SERIES_SUPPORT == 1) - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - #if (RTL8881A_SUPPORT == 1) - /* Reset FA counter by enable/disable OFDM */ - if (false_alm_cnt->cnt_ofdm_fail_pre >= 0x7fff) { - /* reset OFDM */ - odm_set_bb_reg(dm, 0x808, BIT(29), 0); - odm_set_bb_reg(dm, 0x808, BIT(29), 1); - false_alm_cnt->cnt_ofdm_fail_pre = 0; - PHYDM_DBG(dm, DBG_FA_CNT, "Reset FA_cnt\n"); - } - #endif /* #if (RTL8881A_SUPPORT == 1) */ - /* reset OFDM FA countner */ - odm_set_bb_reg(dm, 0x9A4, BIT(17), 1); - odm_set_bb_reg(dm, 0x9A4, BIT(17), 0); + /* @update ofdm counter*/ + /* @update page C counter*/ + odm_set_bb_reg(dm, R_0xc00, BIT(31), 0); + /* @update page D counter*/ + odm_set_bb_reg(dm, R_0xd00, BIT(31), 0); - /* reset CCK FA counter */ - odm_set_bb_reg(dm, 0xA2C, BIT(15), 0); - odm_set_bb_reg(dm, 0xA2C, BIT(15), 1); + /* @reset CCK CCA counter*/ + odm_set_bb_reg(dm, R_0xa2c, BIT(13) | BIT(12), 0); + odm_set_bb_reg(dm, R_0xa2c, BIT(13) | BIT(12), 2); - /* reset CCA counter */ - odm_set_bb_reg(dm, 0xB58, BIT(0), 1); - odm_set_bb_reg(dm, 0xB58, BIT(0), 0); + /* @reset CCK FA counter*/ + odm_set_bb_reg(dm, R_0xa2c, BIT(15) | BIT(14), 0); + odm_set_bb_reg(dm, R_0xa2c, BIT(15) | BIT(14), 2); + + /* @reset CRC32 counter*/ + odm_set_bb_reg(dm, R_0xf14, BIT(16), 1); + odm_set_bb_reg(dm, R_0xf14, BIT(16), 0); + } +#endif /* @#if (ODM_IC_11N_SERIES_SUPPORT) */ + +#if (ODM_IC_11AC_SERIES_SUPPORT) + if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + #if (RTL8881A_SUPPORT) + /* @Reset FA counter by enable/disable OFDM */ + if ((dm->support_ic_type == ODM_RTL8881A) && + false_alm_cnt->cnt_ofdm_fail_pre >= 0x7fff) { + /* reset OFDM */ + odm_set_bb_reg(dm, R_0x808, BIT(29), 0); + odm_set_bb_reg(dm, R_0x808, BIT(29), 1); + false_alm_cnt->cnt_ofdm_fail_pre = 0; + PHYDM_DBG(dm, DBG_FA_CNT, "Reset FA_cnt\n"); } -#endif /* #if (ODM_IC_11AC_SERIES_SUPPORT == 1) */ + #endif /* @#if (RTL8881A_SUPPORT) */ + + /* @reset OFDM FA countner */ + odm_set_bb_reg(dm, R_0x9a4, BIT(17), 1); + odm_set_bb_reg(dm, R_0x9a4, BIT(17), 0); + + /* @reset CCK FA counter */ + odm_set_bb_reg(dm, R_0xa2c, BIT(15), 0); + odm_set_bb_reg(dm, R_0xa2c, BIT(15), 1); + + /* @reset CCA counter */ + phydm_reset_bb_hw_cnt(dm); + } +#endif /* @#if (ODM_IC_11AC_SERIES_SUPPORT) */ } -void -phydm_false_alarm_counter_reg_hold( - void *dm_void -) +void phydm_false_alarm_counter_reg_hold(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - if (dm->support_ic_type & ODM_IC_11N_SERIES) { - /*hold ofdm counter*/ - /*hold page C counter*/ - odm_set_bb_reg(dm, 0xC00, BIT(31), 1); - /*hold page D counter*/ - odm_set_bb_reg(dm, 0xD00, BIT(31), 1); + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + /* @hold cck counter */ + odm_set_bb_reg(dm, R_0x1a2c, BIT(12), 1); + odm_set_bb_reg(dm, R_0x1a2c, BIT(14), 1); + } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { + /*@hold ofdm counter*/ + /*@hold page C counter*/ + odm_set_bb_reg(dm, R_0xc00, BIT(31), 1); + /*@hold page D counter*/ + odm_set_bb_reg(dm, R_0xd00, BIT(31), 1); - //hold cck counter - odm_set_bb_reg(dm, 0xA2C, BIT(12), 1); - odm_set_bb_reg(dm, 0xA2C, BIT(14), 1); + /*@hold cck counter*/ + odm_set_bb_reg(dm, R_0xa2c, BIT(12), 1); + odm_set_bb_reg(dm, R_0xa2c, BIT(14), 1); } } -void -odm_false_alarm_counter_statistics( - void *dm_void -) +#if (ODM_IC_11N_SERIES_SUPPORT) +void phydm_fa_cnt_statistics_n(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fa_struct *false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(dm, PHYDM_FALSEALMCNT); - struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY); - u32 ret_value; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; + u32 reg = 0; + + if (!(dm->support_ic_type & ODM_IC_11N_SERIES)) + return; + + /* @hold ofdm & cck counter */ + phydm_false_alarm_counter_reg_hold(dm); + + reg = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE1_11N, MASKDWORD); + fa_t->cnt_fast_fsync = (reg & 0xffff); + fa_t->cnt_sb_search_fail = ((reg & 0xffff0000) >> 16); + + reg = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE2_11N, MASKDWORD); + fa_t->cnt_ofdm_cca = (reg & 0xffff); + fa_t->cnt_parity_fail = ((reg & 0xffff0000) >> 16); + + reg = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE3_11N, MASKDWORD); + fa_t->cnt_rate_illegal = (reg & 0xffff); + fa_t->cnt_crc8_fail = ((reg & 0xffff0000) >> 16); + + reg = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE4_11N, MASKDWORD); + fa_t->cnt_mcs_fail = (reg & 0xffff); + + fa_t->cnt_ofdm_fail = + fa_t->cnt_parity_fail + fa_t->cnt_rate_illegal + + fa_t->cnt_crc8_fail + fa_t->cnt_mcs_fail + + fa_t->cnt_fast_fsync + fa_t->cnt_sb_search_fail; + + /* read CCK CRC32 counter */ + fa_t->cnt_cck_crc32_error = odm_get_bb_reg(dm, R_0xf84, MASKDWORD); + fa_t->cnt_cck_crc32_ok = odm_get_bb_reg(dm, R_0xf88, MASKDWORD); + + /* read OFDM CRC32 counter */ + reg = odm_get_bb_reg(dm, ODM_REG_OFDM_CRC32_CNT_11N, MASKDWORD); + fa_t->cnt_ofdm_crc32_error = (reg & 0xffff0000) >> 16; + fa_t->cnt_ofdm_crc32_ok = reg & 0xffff; + + /* read HT CRC32 counter */ + reg = odm_get_bb_reg(dm, ODM_REG_HT_CRC32_CNT_11N, MASKDWORD); + fa_t->cnt_ht_crc32_error = (reg & 0xffff0000) >> 16; + fa_t->cnt_ht_crc32_ok = reg & 0xffff; + + /* read VHT CRC32 counter */ + fa_t->cnt_vht_crc32_error = 0; + fa_t->cnt_vht_crc32_ok = 0; + + #if (RTL8723D_SUPPORT) + if (dm->support_ic_type == ODM_RTL8723D) { + /* read HT CRC32 agg counter */ + reg = odm_get_bb_reg(dm, R_0xfb8, MASKDWORD); + fa_t->cnt_ht_crc32_error_agg = (reg & 0xffff0000) >> 16; + fa_t->cnt_ht_crc32_ok_agg = reg & 0xffff; + } + #endif + + #if (RTL8188E_SUPPORT) + if (dm->support_ic_type == ODM_RTL8188E) { + reg = odm_get_bb_reg(dm, ODM_REG_SC_CNT_11N, MASKDWORD); + fa_t->cnt_bw_lsc = (reg & 0xffff); + fa_t->cnt_bw_usc = ((reg & 0xffff0000) >> 16); + } + #endif + + reg = odm_get_bb_reg(dm, ODM_REG_CCK_FA_LSB_11N, MASKBYTE0); + fa_t->cnt_cck_fail = reg; + + reg = odm_get_bb_reg(dm, ODM_REG_CCK_FA_MSB_11N, MASKBYTE3); + fa_t->cnt_cck_fail += (reg & 0xff) << 8; + + reg = odm_get_bb_reg(dm, ODM_REG_CCK_CCA_CNT_11N, MASKDWORD); + fa_t->cnt_cck_cca = ((reg & 0xFF) << 8) | ((reg & 0xFF00) >> 8); + + fa_t->cnt_all_pre = fa_t->cnt_all; + + fa_t->cnt_all = fa_t->cnt_fast_fsync + + fa_t->cnt_sb_search_fail + + fa_t->cnt_parity_fail + + fa_t->cnt_rate_illegal + + fa_t->cnt_crc8_fail + + fa_t->cnt_mcs_fail + + fa_t->cnt_cck_fail; + + fa_t->cnt_cca_all = fa_t->cnt_ofdm_cca + fa_t->cnt_cck_cca; + + PHYDM_DBG(dm, DBG_FA_CNT, + "[OFDM FA Detail] Parity_Fail=((%d)), Rate_Illegal=((%d)), CRC8_fail=((%d)), Mcs_fail=((%d)), Fast_Fsync=(( %d )), SBD_fail=((%d))\n", + fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal, + fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail, fa_t->cnt_fast_fsync, + fa_t->cnt_sb_search_fail); +} +#endif + +#if (ODM_IC_11AC_SERIES_SUPPORT) +void phydm_fa_cnt_statistics_ac(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; + u32 ret_value = 0; + u32 cck_enable = 0; + + if (!(dm->support_ic_type & ODM_IC_11AC_SERIES)) + return; + + ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE1_11AC, MASKDWORD); + fa_t->cnt_fast_fsync = ((ret_value & 0xffff0000) >> 16); + + ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE2_11AC, MASKDWORD); + fa_t->cnt_sb_search_fail = (ret_value & 0xffff); + + ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE3_11AC, MASKDWORD); + fa_t->cnt_parity_fail = (ret_value & 0xffff); + fa_t->cnt_rate_illegal = ((ret_value & 0xffff0000) >> 16); + + ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE4_11AC, MASKDWORD); + fa_t->cnt_crc8_fail = (ret_value & 0xffff); + fa_t->cnt_mcs_fail = ((ret_value & 0xffff0000) >> 16); + + ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE5_11AC, MASKDWORD); + fa_t->cnt_crc8_fail_vht = (ret_value & 0xffff) + + (ret_value & 0xffff0000 >> 16); + + ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE6_11AC, MASKDWORD); + fa_t->cnt_mcs_fail_vht = (ret_value & 0xffff); + + /* read OFDM FA counter */ + fa_t->cnt_ofdm_fail = odm_get_bb_reg(dm, R_0xf48, MASKLWORD); + + /* Read CCK FA counter */ + fa_t->cnt_cck_fail = odm_get_bb_reg(dm, ODM_REG_CCK_FA_11AC, MASKLWORD); + + /* read CCK/OFDM CCA counter */ + ret_value = odm_get_bb_reg(dm, ODM_REG_CCK_CCA_CNT_11AC, MASKDWORD); + fa_t->cnt_ofdm_cca = (ret_value & 0xffff0000) >> 16; + fa_t->cnt_cck_cca = ret_value & 0xffff; + + /* read CCK CRC32 counter */ + ret_value = odm_get_bb_reg(dm, ODM_REG_CCK_CRC32_CNT_11AC, MASKDWORD); + fa_t->cnt_cck_crc32_error = (ret_value & 0xffff0000) >> 16; + fa_t->cnt_cck_crc32_ok = ret_value & 0xffff; + + /* read OFDM CRC32 counter */ + ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_CRC32_CNT_11AC, MASKDWORD); + fa_t->cnt_ofdm_crc32_error = (ret_value & 0xffff0000) >> 16; + fa_t->cnt_ofdm_crc32_ok = ret_value & 0xffff; + + /* read HT CRC32 counter */ + ret_value = odm_get_bb_reg(dm, ODM_REG_HT_CRC32_CNT_11AC, MASKDWORD); + fa_t->cnt_ht_crc32_error = (ret_value & 0xffff0000) >> 16; + fa_t->cnt_ht_crc32_ok = ret_value & 0xffff; + + /* read VHT CRC32 counter */ + ret_value = odm_get_bb_reg(dm, ODM_REG_VHT_CRC32_CNT_11AC, MASKDWORD); + fa_t->cnt_vht_crc32_error = (ret_value & 0xffff0000) >> 16; + fa_t->cnt_vht_crc32_ok = ret_value & 0xffff; + + #if (RTL8881A_SUPPORT) + if (dm->support_ic_type == ODM_RTL8881A) { + u32 tmp = 0; + + if (fa_t->cnt_ofdm_fail >= fa_t->cnt_ofdm_fail_pre) { + tmp = fa_t->cnt_ofdm_fail_pre; + fa_t->cnt_ofdm_fail_pre = fa_t->cnt_ofdm_fail; + fa_t->cnt_ofdm_fail = fa_t->cnt_ofdm_fail - tmp; + } else { + fa_t->cnt_ofdm_fail_pre = fa_t->cnt_ofdm_fail; + } + + PHYDM_DBG(dm, DBG_FA_CNT, + "[8881]cnt_ofdm_fail{curr,pre}={%d,%d}\n", + fa_t->cnt_ofdm_fail_pre, tmp); + } + #endif + + cck_enable = odm_get_bb_reg(dm, ODM_REG_BB_RX_PATH_11AC, BIT(28)); + + if (cck_enable) { /* @if(*dm->band_type == ODM_BAND_2_4G) */ + fa_t->cnt_all = fa_t->cnt_ofdm_fail + fa_t->cnt_cck_fail; + fa_t->cnt_cca_all = fa_t->cnt_cck_cca + fa_t->cnt_ofdm_cca; + } else { + fa_t->cnt_all = fa_t->cnt_ofdm_fail; + fa_t->cnt_cca_all = fa_t->cnt_ofdm_cca; + } +} +#endif + +void phydm_get_dbg_port_info(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; + u32 dbg_port = dm->adaptivity.adaptivity_dbg_port; + u32 val = 0; + + /*set debug port to 0x0*/ + if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x0)) { + fa_t->dbg_port0 = phydm_get_bb_dbg_port_val(dm); + phydm_release_bb_dbg_port(dm); + } + + if (dm->support_ic_type & ODM_RTL8723D) { + val = odm_get_bb_reg(dm, R_0x9a0, BIT(29)); + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + val = odm_get_bb_reg(dm, R_0x2d38, BIT(24)); + } else if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, dbg_port)) { + if (dm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E)) + val = (phydm_get_bb_dbg_port_val(dm) & BIT(30)) >> 30; + else + val = (phydm_get_bb_dbg_port_val(dm) & BIT(29)) >> 29; + phydm_release_bb_dbg_port(dm); + } + + fa_t->edcca_flag = (boolean)val; + + PHYDM_DBG(dm, DBG_FA_CNT, "FA_Cnt: Dbg port 0x0 = 0x%x, EDCCA = %d\n\n", + fa_t->dbg_port0, fa_t->edcca_flag); +} + +void phydm_false_alarm_counter_statistics(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; if (!(dm->support_ability & ODM_BB_FA_CNT)) return; - PHYDM_DBG(dm, DBG_FA_CNT, "FA_Counter()======>\n"); + PHYDM_DBG(dm, DBG_FA_CNT, "%s======>\n", __func__); -#if (ODM_IC_11N_SERIES_SUPPORT == 1) - if (dm->support_ic_type & ODM_IC_11N_SERIES) { - /* hold ofdm & cck counter */ - phydm_false_alarm_counter_reg_hold(dm); - - ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE1_11N, MASKDWORD); - false_alm_cnt->cnt_fast_fsync = (ret_value & 0xffff); - false_alm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16); - - ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE2_11N, MASKDWORD); - false_alm_cnt->cnt_ofdm_cca = (ret_value & 0xffff); - false_alm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16); - - ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE3_11N, MASKDWORD); - false_alm_cnt->cnt_rate_illegal = (ret_value & 0xffff); - false_alm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16); - - ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE4_11N, MASKDWORD); - false_alm_cnt->cnt_mcs_fail = (ret_value & 0xffff); - - false_alm_cnt->cnt_ofdm_fail = - false_alm_cnt->cnt_parity_fail + false_alm_cnt->cnt_rate_illegal + - false_alm_cnt->cnt_crc8_fail + false_alm_cnt->cnt_mcs_fail + - false_alm_cnt->cnt_fast_fsync + false_alm_cnt->cnt_sb_search_fail; - - /* read CCK CRC32 counter */ - false_alm_cnt->cnt_cck_crc32_error = odm_get_bb_reg(dm, ODM_REG_CCK_CRC32_ERROR_CNT_11N, MASKDWORD); - false_alm_cnt->cnt_cck_crc32_ok = odm_get_bb_reg(dm, ODM_REG_CCK_CRC32_OK_CNT_11N, MASKDWORD); - - /* read OFDM CRC32 counter */ - ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_CRC32_CNT_11N, MASKDWORD); - false_alm_cnt->cnt_ofdm_crc32_error = (ret_value & 0xffff0000) >> 16; - false_alm_cnt->cnt_ofdm_crc32_ok = ret_value & 0xffff; - - /* read HT CRC32 counter */ - ret_value = odm_get_bb_reg(dm, ODM_REG_HT_CRC32_CNT_11N, MASKDWORD); - false_alm_cnt->cnt_ht_crc32_error = (ret_value & 0xffff0000) >> 16; - false_alm_cnt->cnt_ht_crc32_ok = ret_value & 0xffff; - - /* read VHT CRC32 counter */ - false_alm_cnt->cnt_vht_crc32_error = 0; - false_alm_cnt->cnt_vht_crc32_ok = 0; - -#if (RTL8723D_SUPPORT == 1) - if (dm->support_ic_type == ODM_RTL8723D) { - /* read HT CRC32 agg counter */ - ret_value = odm_get_bb_reg(dm, ODM_REG_HT_CRC32_CNT_11N_AGG, MASKDWORD); - false_alm_cnt->cnt_ht_crc32_error_agg = (ret_value & 0xffff0000) >> 16; - false_alm_cnt->cnt_ht_crc32_ok_agg= ret_value & 0xffff; - } -#endif - -#if (RTL8188E_SUPPORT == 1) - if (dm->support_ic_type == ODM_RTL8188E) { - ret_value = odm_get_bb_reg(dm, ODM_REG_SC_CNT_11N, MASKDWORD); - false_alm_cnt->cnt_bw_lsc = (ret_value & 0xffff); - false_alm_cnt->cnt_bw_usc = ((ret_value & 0xffff0000) >> 16); - } -#endif - - { - ret_value = odm_get_bb_reg(dm, ODM_REG_CCK_FA_LSB_11N, MASKBYTE0); - false_alm_cnt->cnt_cck_fail = ret_value; - - ret_value = odm_get_bb_reg(dm, ODM_REG_CCK_FA_MSB_11N, MASKBYTE3); - false_alm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8; - - ret_value = odm_get_bb_reg(dm, ODM_REG_CCK_CCA_CNT_11N, MASKDWORD); - false_alm_cnt->cnt_cck_cca = ((ret_value & 0xFF) << 8) | ((ret_value & 0xFF00) >> 8); - } - - false_alm_cnt->cnt_all_pre = false_alm_cnt->cnt_all; - - false_alm_cnt->time_fa_all = (false_alm_cnt->cnt_fast_fsync + false_alm_cnt->cnt_sb_search_fail) * 12 + - (false_alm_cnt->cnt_parity_fail + false_alm_cnt->cnt_rate_illegal) * 28 + - false_alm_cnt->cnt_crc8_fail * 36 + - false_alm_cnt->cnt_mcs_fail * 32 + - false_alm_cnt->cnt_cck_fail * 80; - - false_alm_cnt->cnt_all = (false_alm_cnt->cnt_fast_fsync + - false_alm_cnt->cnt_sb_search_fail + - false_alm_cnt->cnt_parity_fail + - false_alm_cnt->cnt_rate_illegal + - false_alm_cnt->cnt_crc8_fail + - false_alm_cnt->cnt_mcs_fail + - false_alm_cnt->cnt_cck_fail); - - false_alm_cnt->cnt_cca_all = false_alm_cnt->cnt_ofdm_cca + false_alm_cnt->cnt_cck_cca; - - PHYDM_DBG(dm, DBG_FA_CNT, - "[OFDM FA Detail] Parity_Fail = (( %d )), Rate_Illegal = (( %d )), CRC8_fail = (( %d )), Mcs_fail = (( %d )), Fast_Fsync = (( %d )), SB_Search_fail = (( %d ))\n", - false_alm_cnt->cnt_parity_fail, false_alm_cnt->cnt_rate_illegal, false_alm_cnt->cnt_crc8_fail, false_alm_cnt->cnt_mcs_fail, false_alm_cnt->cnt_fast_fsync, false_alm_cnt->cnt_sb_search_fail); - - } -#endif - -#if (ODM_IC_11AC_SERIES_SUPPORT == 1) - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - u32 cck_enable; - - ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE1_11AC, MASKDWORD); - false_alm_cnt->cnt_fast_fsync = ((ret_value & 0xffff0000) >> 16); - - ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE2_11AC, MASKDWORD); - false_alm_cnt->cnt_sb_search_fail = (ret_value & 0xffff); - - ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE3_11AC, MASKDWORD); - false_alm_cnt->cnt_parity_fail = (ret_value & 0xffff); - false_alm_cnt->cnt_rate_illegal = ((ret_value & 0xffff0000) >> 16); - - ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE4_11AC, MASKDWORD); - false_alm_cnt->cnt_crc8_fail = (ret_value & 0xffff); - false_alm_cnt->cnt_mcs_fail = ((ret_value & 0xffff0000) >> 16); - - ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE5_11AC, MASKDWORD); - false_alm_cnt->cnt_crc8_fail_vht = (ret_value & 0xffff); - - ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE6_11AC, MASKDWORD); - false_alm_cnt->cnt_mcs_fail_vht = (ret_value & 0xffff); - - /* read OFDM FA counter */ - false_alm_cnt->cnt_ofdm_fail = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_11AC, MASKLWORD); - - /* Read CCK FA counter */ - false_alm_cnt->cnt_cck_fail = odm_get_bb_reg(dm, ODM_REG_CCK_FA_11AC, MASKLWORD); - - /* read CCK/OFDM CCA counter */ - ret_value = odm_get_bb_reg(dm, ODM_REG_CCK_CCA_CNT_11AC, MASKDWORD); - false_alm_cnt->cnt_ofdm_cca = (ret_value & 0xffff0000) >> 16; - false_alm_cnt->cnt_cck_cca = ret_value & 0xffff; - - /* read CCK CRC32 counter */ - ret_value = odm_get_bb_reg(dm, ODM_REG_CCK_CRC32_CNT_11AC, MASKDWORD); - false_alm_cnt->cnt_cck_crc32_error = (ret_value & 0xffff0000) >> 16; - false_alm_cnt->cnt_cck_crc32_ok = ret_value & 0xffff; - - /* read OFDM CRC32 counter */ - ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_CRC32_CNT_11AC, MASKDWORD); - false_alm_cnt->cnt_ofdm_crc32_error = (ret_value & 0xffff0000) >> 16; - false_alm_cnt->cnt_ofdm_crc32_ok = ret_value & 0xffff; - - /* read HT CRC32 counter */ - ret_value = odm_get_bb_reg(dm, ODM_REG_HT_CRC32_CNT_11AC, MASKDWORD); - false_alm_cnt->cnt_ht_crc32_error = (ret_value & 0xffff0000) >> 16; - false_alm_cnt->cnt_ht_crc32_ok = ret_value & 0xffff; - - /* read VHT CRC32 counter */ - ret_value = odm_get_bb_reg(dm, ODM_REG_VHT_CRC32_CNT_11AC, MASKDWORD); - false_alm_cnt->cnt_vht_crc32_error = (ret_value & 0xffff0000) >> 16; - false_alm_cnt->cnt_vht_crc32_ok = ret_value & 0xffff; - -#if (RTL8881A_SUPPORT == 1) - /* For 8881A */ - if (dm->support_ic_type == ODM_RTL8881A) { - u32 cnt_ofdm_fail_temp = 0; - - if (false_alm_cnt->cnt_ofdm_fail >= false_alm_cnt->cnt_ofdm_fail_pre) { - cnt_ofdm_fail_temp = false_alm_cnt->cnt_ofdm_fail_pre; - false_alm_cnt->cnt_ofdm_fail_pre = false_alm_cnt->cnt_ofdm_fail; - false_alm_cnt->cnt_ofdm_fail = false_alm_cnt->cnt_ofdm_fail - cnt_ofdm_fail_temp; - } else - false_alm_cnt->cnt_ofdm_fail_pre = false_alm_cnt->cnt_ofdm_fail; - PHYDM_DBG(dm, DBG_FA_CNT, "odm_false_alarm_counter_statistics(): cnt_ofdm_fail=%d\n", false_alm_cnt->cnt_ofdm_fail_pre); - PHYDM_DBG(dm, DBG_FA_CNT, "odm_false_alarm_counter_statistics(): cnt_ofdm_fail_pre=%d\n", cnt_ofdm_fail_temp); - } -#endif - cck_enable = odm_get_bb_reg(dm, ODM_REG_BB_RX_PATH_11AC, BIT(28)); - if (cck_enable) { /* if(*dm->band_type == ODM_BAND_2_4G) */ - false_alm_cnt->cnt_all = false_alm_cnt->cnt_ofdm_fail + false_alm_cnt->cnt_cck_fail; - false_alm_cnt->cnt_cca_all = false_alm_cnt->cnt_cck_cca + false_alm_cnt->cnt_ofdm_cca; - } else { - false_alm_cnt->cnt_all = false_alm_cnt->cnt_ofdm_fail; - false_alm_cnt->cnt_cca_all = false_alm_cnt->cnt_ofdm_cca; - } - } -#endif - - if (dm->support_ic_type != ODM_RTL8723D) { - if (phydm_set_bb_dbg_port(dm, BB_DBGPORT_PRIORITY_1, 0x0)) {/*set debug port to 0x0*/ - false_alm_cnt->dbg_port0 = phydm_get_bb_dbg_port_value(dm); - phydm_release_bb_dbg_port(dm); - } - - if (phydm_set_bb_dbg_port(dm, BB_DBGPORT_PRIORITY_1, adaptivity->adaptivity_dbg_port)) { - if (dm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E)) - false_alm_cnt->edcca_flag = (boolean)((phydm_get_bb_dbg_port_value(dm) & BIT(30)) >> 30); - else - false_alm_cnt->edcca_flag = (boolean)((phydm_get_bb_dbg_port_value(dm) & BIT(29)) >> 29); - phydm_release_bb_dbg_port(dm); - } - } else { - false_alm_cnt->edcca_flag = (boolean)(odm_get_bb_reg(dm, 0x9a0, BIT(29))); + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + phydm_fa_cnt_statistics_jgr3(dm); + #endif + } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { + #if (ODM_IC_11N_SERIES_SUPPORT) + phydm_fa_cnt_statistics_n(dm); + #endif + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + #if (ODM_IC_11AC_SERIES_SUPPORT) + phydm_fa_cnt_statistics_ac(dm); + #endif } + phydm_get_dbg_port_info(dm); phydm_false_alarm_counter_reg_reset(dm_void); - false_alm_cnt->time_fa_all = (false_alm_cnt->cnt_fast_fsync + false_alm_cnt->cnt_sb_search_fail) * 12 + - (false_alm_cnt->cnt_parity_fail + false_alm_cnt->cnt_rate_illegal) * 28 + - (false_alm_cnt->cnt_crc8_fail + false_alm_cnt->cnt_crc8_fail_vht + false_alm_cnt->cnt_mcs_fail_vht) * 36 + - false_alm_cnt->cnt_mcs_fail * 32 + - false_alm_cnt->cnt_cck_fail * 80; + fa_t->time_fa_all = fa_t->cnt_fast_fsync * 12 + + fa_t->cnt_sb_search_fail * 12 + + fa_t->cnt_parity_fail * 28 + + fa_t->cnt_rate_illegal * 28 + + fa_t->cnt_crc8_fail * 36 + + fa_t->cnt_crc8_fail_vht * 36 + + fa_t->cnt_mcs_fail_vht * 36 + + fa_t->cnt_mcs_fail * 32 + + fa_t->cnt_cck_fail * 80; - false_alm_cnt->cnt_crc32_error_all = false_alm_cnt->cnt_vht_crc32_error + false_alm_cnt->cnt_ht_crc32_error + false_alm_cnt->cnt_ofdm_crc32_error + false_alm_cnt->cnt_cck_crc32_error; - false_alm_cnt->cnt_crc32_ok_all = false_alm_cnt->cnt_vht_crc32_ok + false_alm_cnt->cnt_ht_crc32_ok + false_alm_cnt->cnt_ofdm_crc32_ok + false_alm_cnt->cnt_cck_crc32_ok; + fa_t->cnt_crc32_error_all = fa_t->cnt_vht_crc32_error + + fa_t->cnt_ht_crc32_error + + fa_t->cnt_ofdm_crc32_error + + fa_t->cnt_cck_crc32_error; + + fa_t->cnt_crc32_ok_all = fa_t->cnt_vht_crc32_ok + + fa_t->cnt_ht_crc32_ok + + fa_t->cnt_ofdm_crc32_ok + + fa_t->cnt_cck_crc32_ok; PHYDM_DBG(dm, DBG_FA_CNT, - "[OFDM FA Detail] Parity_Fail = (( %d )), Rate_Illegal = (( %d )), HT_CRC8_fail = (( %d )), HT_Mcs_fail = (( %d )), Fast_Fsync = (( %d )), SB_Search_fail = (( %d )), VHT_CRC8_fail = (( %d )), VHT_Mcs_fail = (( %d ))\n", - false_alm_cnt->cnt_parity_fail, false_alm_cnt->cnt_rate_illegal, false_alm_cnt->cnt_crc8_fail, false_alm_cnt->cnt_mcs_fail, false_alm_cnt->cnt_fast_fsync, false_alm_cnt->cnt_sb_search_fail, false_alm_cnt->cnt_crc8_fail_vht, false_alm_cnt->cnt_mcs_fail_vht); - PHYDM_DBG(dm, DBG_FA_CNT, "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", - false_alm_cnt->cnt_cck_cca, false_alm_cnt->cnt_ofdm_cca, false_alm_cnt->cnt_cca_all); - - PHYDM_DBG(dm, DBG_FA_CNT, "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", - false_alm_cnt->cnt_cck_fail, false_alm_cnt->cnt_ofdm_fail, false_alm_cnt->cnt_all); - - PHYDM_DBG(dm, DBG_FA_CNT, "[CCK] CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_cck_crc32_error, false_alm_cnt->cnt_cck_crc32_ok); - PHYDM_DBG(dm, DBG_FA_CNT, "[OFDM]CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_ofdm_crc32_error, false_alm_cnt->cnt_ofdm_crc32_ok); - PHYDM_DBG(dm, DBG_FA_CNT, "[ HT ] CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_ht_crc32_error, false_alm_cnt->cnt_ht_crc32_ok); - PHYDM_DBG(dm, DBG_FA_CNT, "[VHT] CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_vht_crc32_error, false_alm_cnt->cnt_vht_crc32_ok); - PHYDM_DBG(dm, DBG_FA_CNT, "[TOTAL] CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_crc32_error_all, false_alm_cnt->cnt_crc32_ok_all); - PHYDM_DBG(dm, DBG_FA_CNT, "FA_Cnt: Dbg port 0x0 = 0x%x, EDCCA = %d\n\n", false_alm_cnt->dbg_port0, false_alm_cnt->edcca_flag); + "[OFDM FA Detail-1] Parity=((%d)), Rate_Illegal=((%d)), HT_CRC8=((%d)), HT_MCS=((%d))\n", + fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal, + fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail); + PHYDM_DBG(dm, DBG_FA_CNT, + "[OFDM FA Detail-2] Fast_Fsync=((%d)), SBD=((%d)), VHT_CRC8=((%d)), VHT_MCS=((%d))\n", + fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail, + fa_t->cnt_crc8_fail_vht, fa_t->cnt_mcs_fail_vht); + PHYDM_DBG(dm, DBG_FA_CNT, + "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", + fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all); + PHYDM_DBG(dm, DBG_FA_CNT, + "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", + fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all); + PHYDM_DBG(dm, DBG_FA_CNT, "[CCK] CRC32 {error, ok}= {%d, %d}\n", + fa_t->cnt_cck_crc32_error, fa_t->cnt_cck_crc32_ok); + PHYDM_DBG(dm, DBG_FA_CNT, "[OFDM]CRC32 {error, ok}= {%d, %d}\n", + fa_t->cnt_ofdm_crc32_error, fa_t->cnt_ofdm_crc32_ok); + PHYDM_DBG(dm, DBG_FA_CNT, "[ HT ] CRC32 {error, ok}= {%d, %d}\n", + fa_t->cnt_ht_crc32_error, fa_t->cnt_ht_crc32_ok); + PHYDM_DBG(dm, DBG_FA_CNT, "[VHT] CRC32 {error, ok}= {%d, %d}\n", + fa_t->cnt_vht_crc32_error, fa_t->cnt_vht_crc32_ok); + PHYDM_DBG(dm, DBG_FA_CNT, "[TOTAL] CRC32 {error, ok}= {%d, %d}\n", + fa_t->cnt_crc32_error_all, fa_t->cnt_crc32_ok_all); } #ifdef PHYDM_TDMA_DIG_SUPPORT -void -phydm_set_tdma_dig_timer( - void *dm_void - ) +void phydm_set_tdma_dig_timer(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 delta_time_us = dm->tdma_dig_timer_ms * 1000; - struct phydm_dig_struct *dig_t; - u32 timeout; - u32 current_time_stamp, diff_time_stamp, regb0; - - dig_t = &dm->dm_dig_table; + u32 delta_time_us = dm->tdma_dig_timer_ms * 1000; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + u32 timeout = 0; + u32 current_time_stamp, diff_time_stamp, regb0 = 0; + /*some IC has no FREERUN_CUNT register, like 92E*/ if (dm->support_ic_type & ODM_RTL8197F) - current_time_stamp = odm_get_bb_reg(dm, 0x568, bMaskDWord); + current_time_stamp = odm_get_bb_reg(dm, R_0x568, 0xffffffff); else return; @@ -1251,119 +1636,129 @@ phydm_set_tdma_dig_timer( dig_t->pre_timestamp = dig_t->cur_timestamp; dig_t->cur_timestamp = current_time_stamp; - /*HIMR0, it shows HW interrupt mask*/ - regb0 = odm_get_bb_reg(dm, 0xb0, bMaskDWord); + /*@HIMR0, it shows HW interrupt mask*/ + regb0 = odm_get_bb_reg(dm, R_0xb0, 0xffffffff); + PHYDM_DBG(dm, DBG_DIG, "Set next timer\n"); PHYDM_DBG(dm, DBG_DIG, - "Set next tdma_dig_timer\n"); + "curr_time_stamp=%d, delta_time_us=%d\n", + current_time_stamp, delta_time_us); PHYDM_DBG(dm, DBG_DIG, - "current_time_stamp=%d, delta_time_us=%d, timeout=%d, diff_time_stamp=%d, Reg0xb0 = 0x%x\n", - current_time_stamp, - delta_time_us, - timeout, - diff_time_stamp, - regb0); + "timeout=%d, diff_time_stamp=%d, Reg0xb0 = 0x%x\n", + timeout, diff_time_stamp, regb0); - if (dm->support_ic_type & ODM_RTL8197F) /*REG_PS_TIMER2*/ - odm_set_bb_reg(dm, 0x588, bMaskDWord, timeout); + if (dm->support_ic_type & ODM_RTL8197F) /*REG_PS_TIMER2*/ + odm_set_bb_reg(dm, R_0x588, 0xffffffff, timeout); else { - PHYDM_DBG(dm, DBG_DIG, - "NOT 97F, TDMA-DIG timer does NOT start!\n"); + PHYDM_DBG(dm, DBG_DIG, "NOT 97F, NOT start\n"); return; } } -void -phydm_tdma_dig_timer_check( - void *dm_void - ) +void phydm_tdma_dig_timer_check(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_dig_struct *dig_t; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - dig_t = &dm->dm_dig_table; - - PHYDM_DBG(dm, DBG_DIG, - "tdma_dig_cnt=%d, pre_tdma_dig_cnt=%d\n", - dig_t->tdma_dig_cnt, - dig_t->pre_tdma_dig_cnt); + PHYDM_DBG(dm, DBG_DIG, "tdma_dig_cnt=%d, pre_tdma_dig_cnt=%d\n", + dig_t->tdma_dig_cnt, dig_t->pre_tdma_dig_cnt); - if ((dig_t->tdma_dig_cnt == 0) || - (dig_t->tdma_dig_cnt == dig_t->pre_tdma_dig_cnt)) { + if (dig_t->tdma_dig_cnt == 0 || + dig_t->tdma_dig_cnt == dig_t->pre_tdma_dig_cnt) { if (dm->support_ability & ODM_BB_DIG) { - /*if interrupt mask info is got.*/ +#ifdef IS_USE_NEW_TDMA + if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B | + ODM_RTL8812F | ODM_RTL8822B | ODM_RTL8192F | + ODM_RTL8821C | ODM_RTL8197G | ODM_RTL8822C | + ODM_RTL8723D)) { + PHYDM_DBG(dm, DBG_DIG, + "Check fail, Restart timer\n\n"); + phydm_false_alarm_counter_reset(dm); + odm_set_timer(dm, &dm->tdma_dig_timer, + dm->tdma_dig_timer_ms); + } else { + PHYDM_DBG(dm, DBG_DIG, + "Not support TDMADIG, no SW timer\n"); + } +#else + /*@if interrupt mask info is got.*/ /*Reg0xb0 is no longer needed*/ - /*regb0 = odm_get_bb_reg(dm, 0xb0, bMaskDWord);*/ +#if 0 + /*regb0 = odm_get_bb_reg(dm, R_0xb0, bMaskDWord);*/ +#endif PHYDM_DBG(dm, DBG_DIG, - "Check fail, IntMask[0]=0x%x, restart tdma_dig_timer !!!\n", - *dm->interrupt_mask); + "Check fail, Mask[0]=0x%x, restart timer\n", + *dm->interrupt_mask); phydm_tdma_dig_add_interrupt_mask_handler(dm); phydm_enable_rx_related_interrupt_handler(dm); phydm_set_tdma_dig_timer(dm); +#endif } - } else - PHYDM_DBG(dm, DBG_DIG, - "Check pass, update pre_tdma_dig_cnt\n"); + } else { + PHYDM_DBG(dm, DBG_DIG, "Check pass, update pre_tdma_dig_cnt\n"); + } dig_t->pre_tdma_dig_cnt = dig_t->tdma_dig_cnt; } -/*different IC/team may use different timer for tdma-dig*/ -void -phydm_tdma_dig_add_interrupt_mask_handler( - void *dm_void - ) +/*@different IC/team may use different timer for tdma-dig*/ +void phydm_tdma_dig_add_interrupt_mask_handler(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE == (ODM_AP)) - if (dm->support_ic_type & ODM_RTL8197F) - phydm_add_interrupt_mask_handler(dm, HAL_INT_TYPE_PSTIMEOUT2); /*HAL_INT_TYPE_PSTIMEOUT2*/ + if (dm->support_ic_type & ODM_RTL8197F) { + /*@HAL_INT_TYPE_PSTIMEOUT2*/ + phydm_add_interrupt_mask_handler(dm, HAL_INT_TYPE_PSTIMEOUT2); + } #elif (DM_ODM_SUPPORT_TYPE == (ODM_WIN)) #elif (DM_ODM_SUPPORT_TYPE == (ODM_CE)) #endif } -void -phydm_tdma_dig( - void *dm_void - ) +/* will be triggered by HW timer*/ +void phydm_tdma_dig(void *dm_void) { - struct dm_struct *dm; - struct phydm_dig_struct *dig_t; - struct phydm_fa_struct *falm_cnt; - u32 reg_c50; - - dm = (struct dm_struct *)dm_void; - dig_t = &dm->dm_dig_table; - falm_cnt = &dm->false_alm_cnt; - reg_c50 = odm_get_bb_reg(dm, 0xc50, MASKBYTE0); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; + u32 reg_c50 = 0; + +#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT ||\ + RTL8822B_SUPPORT || RTL8192F_SUPPORT || RTL8821C_SUPPORT) +#ifdef IS_USE_NEW_TDMA + if (dm->support_ic_type & + (ODM_RTL8198F | ODM_RTL8814B | ODM_RTL8812F | ODM_RTL8822B | + ODM_RTL8192F | ODM_RTL8821C)) { + PHYDM_DBG(dm, DBG_DIG, "98F/14B/12F/22B/92F/21C, new tdma\n"); + return; + } +#endif +#endif + reg_c50 = odm_get_bb_reg(dm, R_0xc50, MASKBYTE0); dig_t->tdma_dig_state = dig_t->tdma_dig_cnt % dm->tdma_dig_state_number; - PHYDM_DBG(dm, DBG_DIG, - "tdma_dig_state=%d, regc50=0x%x\n", - dig_t->tdma_dig_state, - reg_c50); + PHYDM_DBG(dm, DBG_DIG, "tdma_dig_state=%d, regc50=0x%x\n", + dig_t->tdma_dig_state, reg_c50); dig_t->tdma_dig_cnt++; if (dig_t->tdma_dig_state == 1) { - // update IGI from tdma_dig_state == 0 + /* update IGI from tdma_dig_state == 0*/ if (dig_t->cur_ig_value_tdma == 0) dig_t->cur_ig_value_tdma = dig_t->cur_ig_value; odm_write_dig(dm, dig_t->cur_ig_value_tdma); phydm_tdma_false_alarm_counter_check(dm); - PHYDM_DBG(dm, DBG_DIG, - "tdma_dig_state=%d, reset FA counter !!!\n", - dig_t->tdma_dig_state); + PHYDM_DBG(dm, DBG_DIG, "tdma_dig_state=%d, reset FA counter\n", + dig_t->tdma_dig_state); } else if (dig_t->tdma_dig_state == 0) { /* update dig_t->CurIGValue,*/ - /* it may different from dig_t->cur_ig_value_tdma */ + /* @it may different from dig_t->cur_ig_value_tdma */ /* TDMA IGI upperbond @ L-state = */ /* rf_ft_var.tdma_dig_low_upper_bond = 0x26 */ @@ -1374,44 +1769,36 @@ phydm_tdma_dig( odm_write_dig(dm, dig_t->low_ig_value); phydm_tdma_false_alarm_counter_check(dm); - } else + } else { phydm_tdma_false_alarm_counter_check(dm); + } } -/*============================================================*/ -/*FASLE ALARM CHECK*/ -/*============================================================*/ - -void -phydm_tdma_false_alarm_counter_check( - void *dm_void - ) +/*@============================================================*/ +/*@FASLE ALARM CHECK*/ +/*@============================================================*/ +void phydm_tdma_false_alarm_counter_check(void *dm_void) { - struct dm_struct *dm; - struct phydm_fa_struct *falm_cnt; - struct phydm_fa_acc_struct *falm_cnt_acc; - struct phydm_dig_struct *dig_t; - boolean rssi_dump_en = 0; - u32 timestamp; - u8 tdma_dig_state_number; - - dm = (struct dm_struct *)dm_void; - falm_cnt = &dm->false_alm_cnt; - falm_cnt_acc = &dm->false_alm_cnt_acc; - dig_t = &dm->dm_dig_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; + struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + boolean rssi_dump_en = 0; + u32 timestamp = 0; + u8 tdma_dig_state_number = 0; + u32 start_th = 0; if (dig_t->tdma_dig_state == 1) phydm_false_alarm_counter_reset(dm); - /* Reset FalseAlarmCounterStatistics */ - /* fa_acc_1sec_tsf = fa_acc_1sec_tsf, keep */ - /* fa_end_tsf = fa_start_tsf = TSF */ + /* Reset FalseAlarmCounterStatistics */ + /* @fa_acc_1sec_tsf = fa_acc_1sec_tsf, keep */ + /* @fa_end_tsf = fa_start_tsf = TSF */ else { - odm_false_alarm_counter_statistics(dm); - if (dm->support_ic_type & ODM_RTL8197F) /*REG_FREERUN_CNT*/ - timestamp = odm_get_bb_reg(dm, 0x568, bMaskDWord); + phydm_false_alarm_counter_statistics(dm); + if (dm->support_ic_type & ODM_RTL8197F) /*REG_FREERUN_CNT*/ + timestamp = odm_get_bb_reg(dm, R_0x568, bMaskDWord); else { - PHYDM_DBG(dm, DBG_DIG, - "Caution! NOT 97F! TDMA-DIG timer does NOT start!!!\n"); + PHYDM_DBG(dm, DBG_DIG, "NOT 97F! NOT start\n"); return; } dig_t->fa_end_timestamp = timestamp; @@ -1426,44 +1813,41 @@ phydm_tdma_false_alarm_counter_check( dig_t->sec_factor = tdma_dig_state_number / (tdma_dig_state_number - 1); - /*1sec = 1000000us*/ - if (dig_t->fa_acc_1sec_timestamp >= (u32)(1000000 / dig_t->sec_factor)) { + /*@1sec = 1000000us*/ + if (dig_t->sec_factor) + start_th = (u32)(1000000 / dig_t->sec_factor); + + if (dig_t->fa_acc_1sec_timestamp >= start_th) { rssi_dump_en = 1; phydm_false_alarm_counter_acc(dm, rssi_dump_en); PHYDM_DBG(dm, DBG_DIG, - "sec_factor = %u, total FA = %u, is_linked=%u\n", - dig_t->sec_factor, - falm_cnt_acc->cnt_all, - dm->is_linked); + "sec_factor=%d, total FA=%d, is_linked=%d\n", + dig_t->sec_factor, falm_cnt_acc->cnt_all, + dm->is_linked); phydm_noisy_detection(dm); + #ifdef PHYDM_SUPPORT_CCKPD phydm_cck_pd_th(dm); + #endif phydm_dig(dm); phydm_false_alarm_counter_acc_reset(dm); /* Reset FalseAlarmCounterStatistics */ - /* fa_end_tsf = fa_start_tsf = TSF, keep */ - /* fa_acc_1sec_tsf = 0 */ + /* @fa_end_tsf = fa_start_tsf = TSF, keep */ + /* @fa_acc_1sec_tsf = 0 */ phydm_false_alarm_counter_reset(dm); - } else + } else { phydm_false_alarm_counter_acc(dm, rssi_dump_en); + } } } -void -phydm_false_alarm_counter_acc( - void *dm_void, - boolean rssi_dump_en - ) +void phydm_false_alarm_counter_acc(void *dm_void, boolean rssi_dump_en) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fa_struct *falm_cnt; - struct phydm_fa_acc_struct *falm_cnt_acc; - struct phydm_dig_struct *dig_t; - - falm_cnt = &dm->false_alm_cnt; - falm_cnt_acc = &dm->false_alm_cnt_acc; - dig_t = &dm->dm_dig_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; + struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; falm_cnt_acc->cnt_parity_fail += falm_cnt->cnt_parity_fail; falm_cnt_acc->cnt_rate_illegal += falm_cnt->cnt_rate_illegal; @@ -1498,30 +1882,45 @@ phydm_false_alarm_counter_acc( } } -void -phydm_false_alarm_counter_acc_reset( - void *dm_void - ) +void phydm_false_alarm_counter_acc_reset(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fa_acc_struct *falm_cnt_acc; + struct phydm_fa_acc_struct *falm_cnt_acc = NULL; +#ifdef IS_USE_NEW_TDMA + struct phydm_fa_acc_struct *falm_cnt_acc_low = NULL; + u32 tmp_cca_1sec = 0; + u32 tmp_fa_1sec = 0; + + /*@clear L-fa_acc struct*/ + falm_cnt_acc_low = &dm->false_alm_cnt_acc_low; + tmp_cca_1sec = falm_cnt_acc_low->cnt_cca_all_1sec; + tmp_fa_1sec = falm_cnt_acc_low->cnt_all_1sec; + odm_memory_set(dm, falm_cnt_acc_low, 0, sizeof(dm->false_alm_cnt_acc)); + falm_cnt_acc_low->cnt_cca_all_1sec = tmp_cca_1sec; + falm_cnt_acc_low->cnt_all_1sec = tmp_fa_1sec; + + /*@clear H-fa_acc struct*/ falm_cnt_acc = &dm->false_alm_cnt_acc; - - /* Cnt_all_for_rssi_dump & Cnt_CCA_all_for_rssi_dump */ - /* do NOT need to be reset */ + tmp_cca_1sec = falm_cnt_acc->cnt_cca_all_1sec; + tmp_fa_1sec = falm_cnt_acc->cnt_all_1sec; + odm_memory_set(dm, falm_cnt_acc, 0, sizeof(dm->false_alm_cnt_acc)); + falm_cnt_acc->cnt_cca_all_1sec = tmp_cca_1sec; + falm_cnt_acc->cnt_all_1sec = tmp_fa_1sec; +#else + falm_cnt_acc = &dm->false_alm_cnt_acc; + /* @Cnt_all_for_rssi_dump & Cnt_CCA_all_for_rssi_dump */ + /* @do NOT need to be reset */ odm_memory_set(dm, falm_cnt_acc, 0, sizeof(falm_cnt_acc)); +#endif } -void -phydm_false_alarm_counter_reset( - void *dm_void - ) +void phydm_false_alarm_counter_reset(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; struct phydm_fa_struct *falm_cnt; - struct phydm_dig_struct *dig_t; - u32 timestamp; + struct phydm_dig_struct *dig_t; + u32 timestamp; falm_cnt = &dm->false_alm_cnt; dig_t = &dm->dm_dig_table; @@ -1529,340 +1928,940 @@ phydm_false_alarm_counter_reset( memset(falm_cnt, 0, sizeof(dm->false_alm_cnt)); phydm_false_alarm_counter_reg_reset(dm); +#ifdef IS_USE_NEW_TDMA + return; +#endif if (dig_t->tdma_dig_state != 1) dig_t->fa_acc_1sec_timestamp = 0; else dig_t->fa_acc_1sec_timestamp = dig_t->fa_acc_1sec_timestamp; /*REG_FREERUN_CNT*/ - timestamp = odm_get_bb_reg(dm, 0x568, bMaskDWord); + timestamp = odm_get_bb_reg(dm, R_0x568, bMaskDWord); dig_t->fa_start_timestamp = timestamp; dig_t->fa_end_timestamp = timestamp; } -#endif /*#ifdef PHYDM_TDMA_DIG_SUPPORT*/ - -#ifdef PHYDM_LNA_SAT_CHK_SUPPORT -void -phydm_lna_sat_chk_init( - void *dm_void - ) +void phydm_tdma_dig_para_upd(void *dm_void, enum upd_type type, u8 input) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_lna_sat_info_struct *lna_info = &dm->dm_lna_sat_info; - - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __FUNCTION__); - - lna_info->check_time = 0; - lna_info->sat_cnt_acc_patha = 0; - lna_info->sat_cnt_acc_pathb = 0; - lna_info->cur_sat_status = 0; - lna_info->pre_sat_status = 0; - lna_info->cur_timer_check_cnt = 0; - lna_info->pre_timer_check_cnt = 0; -} - -void -phydm_set_ofdm_agc_tab( - void *dm_void, - u8 tab_sel -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - - /* table sel:0/2, 1 is used for CCK */ - if (tab_sel == OFDM_AGC_TAB_0) - odm_set_bb_reg(dm, 0xc70, 0x1e00, OFDM_AGC_TAB_0); - else if (tab_sel == OFDM_AGC_TAB_2) - odm_set_bb_reg(dm, 0xc70, 0x1e00, OFDM_AGC_TAB_2); - else - odm_set_bb_reg(dm, 0xc70, 0x1e00, OFDM_AGC_TAB_0); -} - -u8 -phydm_get_ofdm_agc_tab( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - - return (u1Byte)odm_get_bb_reg(dm, 0xc70, 0x1e00); -} - -void -phydm_lna_sat_chk( - void *dm_void - ) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - struct phydm_lna_sat_info_struct *lna_info = &dm->dm_lna_sat_info; - - u1Byte igi_rssi_min, rssi_min = dm->rssi_min; - u4Byte sat_status_patha, sat_status_pathb; - u1Byte igi_restore = dig_t->cur_ig_value; - u1Byte i, lna_sat_chk_cnt = dm->lna_sat_chk_cnt; - u4Byte lna_sat_cnt_thd = 0; - u1Byte agc_tab; - u4Byte max_check_time = 0; - - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __FUNCTION__); - - if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK)) { - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, - "support ability is disabled, return.\n"); - return; - } - - if (dm->is_disable_lna_sat_chk) { - phydm_lna_sat_chk_init(dm); - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, - "is_disable_lna_sat_chk=%d, return.\n", dm->is_disable_lna_sat_chk); - return; - } - - //func_start = ODM_GetBBReg(pDM_Odm, 0x560, bMaskDWord); - - // move igi to target pin of rssi_min - if ((rssi_min == 0) || (rssi_min == 0xff)) { - // adapt agc table 0 - phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0); - phydm_lna_sat_chk_init(dm); - return; - } else if (rssi_min % 2 != 0) - igi_rssi_min = rssi_min + DIFF_RSSI_TO_IGI - 1; - else - igi_rssi_min = rssi_min + DIFF_RSSI_TO_IGI; - - if ((dm->lna_sat_chk_period_ms > 0) && (dm->lna_sat_chk_period_ms <= ONE_SEC_MS)) - max_check_time = lna_sat_chk_cnt*(ONE_SEC_MS/(dm->lna_sat_chk_period_ms))*5; - else - max_check_time = lna_sat_chk_cnt * 5; - - lna_sat_cnt_thd = (max_check_time * dm->lna_sat_chk_duty_cycle)/100; - - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, - "check_time=%d, rssi_min=%d, igi_rssi_min=0x%x\nlna_sat_chk_cnt=%d, lna_sat_chk_period_ms=%d, max_check_time=%d, lna_sat_cnt_thd=%d\n", - lna_info->check_time, - rssi_min, - igi_rssi_min, - lna_sat_chk_cnt, - dm->lna_sat_chk_period_ms, - max_check_time, - lna_sat_cnt_thd); - - odm_write_dig(dm, igi_rssi_min); - - // adapt agc table 0 check saturation status - phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0); - // open rf power detection ckt & set detection range - odm_set_rf_reg(dm, RF_PATH_A, 0x86, 0x1f, 0x10); - odm_set_rf_reg(dm, RF_PATH_B, 0x86, 0x1f, 0x10); - - // check saturation status - for (i = 0; i < lna_sat_chk_cnt; i++) { - sat_status_patha = odm_get_rf_reg(dm, RF_PATH_A, 0xae, 0xc0000); - sat_status_pathb = odm_get_rf_reg(dm, RF_PATH_B, 0xae, 0xc0000); - if (sat_status_patha != 0) - lna_info->sat_cnt_acc_patha++; - if (sat_status_pathb != 0) - lna_info->sat_cnt_acc_pathb++; - - if ((lna_info->sat_cnt_acc_patha >= lna_sat_cnt_thd) || - (lna_info->sat_cnt_acc_pathb >= lna_sat_cnt_thd)) { - lna_info->cur_sat_status = 1; - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, - "cur_sat_status=%d, check_time=%d\n", - lna_info->cur_sat_status, - lna_info->check_time); - break; - } else - lna_info->cur_sat_status = 0; - } - - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, - "cur_sat_status=%d, pre_sat_status=%d, sat_cnt_acc_patha=%d, sat_cnt_acc_pathb=%d\n", - lna_info->cur_sat_status, - lna_info->pre_sat_status, - lna_info->sat_cnt_acc_patha, - lna_info->sat_cnt_acc_pathb); - - // agc table decision - if (lna_info->cur_sat_status) { - if (!dm->is_disable_gain_table_switch) - phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_2); - lna_info->check_time = 0; - lna_info->sat_cnt_acc_patha = 0; - lna_info->sat_cnt_acc_pathb = 0; - lna_info->pre_sat_status = lna_info->cur_sat_status; - - } else if (lna_info->check_time <= (max_check_time - 1)) { - if (lna_info->pre_sat_status && (!dm->is_disable_gain_table_switch)) - phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_2); - lna_info->check_time++; - - } else if (lna_info->check_time == max_check_time) { - if (!dm->is_disable_gain_table_switch && (lna_info->pre_sat_status == 1)) - phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0); - lna_info->check_time = 0; - lna_info->sat_cnt_acc_patha = 0; - lna_info->sat_cnt_acc_pathb = 0; - lna_info->pre_sat_status = lna_info->cur_sat_status; - } - - agc_tab = phydm_get_ofdm_agc_tab(dm); - - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "use AGC tab %d\n", agc_tab); - //func_end = ODM_GetBBReg(pDM_Odm, 0x560, bMaskDWord); - - //PHYDM_DBG(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("function process time=%d\n", - // func_end - func_start)); - - // restore previous igi - odm_write_dig(dm, igi_restore); - lna_info->cur_timer_check_cnt++; - odm_set_timer(dm, &lna_info->phydm_lna_sat_chk_timer, dm->lna_sat_chk_period_ms); -} - -void -phydm_lna_sat_chk_callback( - void *dm_void - - ) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __FUNCTION__); - phydm_lna_sat_chk(dm); -} - -void -phydm_lna_sat_chk_timers( - void *dm_void, - u8 state - ) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_lna_sat_info_struct *lna_info = &dm->dm_lna_sat_info; - - if (state == INIT_LNA_SAT_CHK_TIMMER) { - odm_initialize_timer(dm, - &lna_info->phydm_lna_sat_chk_timer, - (void *)phydm_lna_sat_chk_callback, NULL, - "phydm_lna_sat_chk_timer"); - } else if (state == CANCEL_LNA_SAT_CHK_TIMMER) { - odm_cancel_timer(dm, &lna_info->phydm_lna_sat_chk_timer); - } else if (state == RELEASE_LNA_SAT_CHK_TIMMER) { - odm_release_timer(dm, &lna_info->phydm_lna_sat_chk_timer); + switch (type) { + case ENABLE_TDMA: + dm->original_dig_restore = !((boolean)input); + break; + case MODE_DECISION: + if (input == MODE_PERFORMANCE) + dm->tdma_dig_state_number = DIG_NUM_OF_TDMA_STATES + 2; + else if (input == MODE_COVERAGE) + dm->tdma_dig_state_number = DIG_NUM_OF_TDMA_STATES; + else + dm->tdma_dig_state_number = DIG_NUM_OF_TDMA_STATES; + break; } } -void -phydm_lna_sat_chk_watchdog( - void *dm_void - ) +#ifdef IS_USE_NEW_TDMA +void phydm_tdma_dig_timers(void *dm_void, u8 state) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_lna_sat_info_struct *lna_info = &dm->dm_lna_sat_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - u1Byte rssi_min = dm->rssi_min; + if (state == INIT_TDMA_DIG_TIMMER) + odm_initialize_timer(dm, &dm->tdma_dig_timer, + (void *)phydm_tdma_dig_cbk, + NULL, "phydm_tdma_dig_timer"); + else if (state == CANCEL_TDMA_DIG_TIMMER) + odm_cancel_timer(dm, &dm->tdma_dig_timer); + else if (state == RELEASE_TDMA_DIG_TIMMER) + odm_release_timer(dm, &dm->tdma_dig_timer); +} - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __FUNCTION__); +u8 get_new_igi_bound(struct dm_struct *dm, u8 igi, u32 fa_cnt, u8 *rx_gain_max, + u8 *rx_gain_min, boolean is_dfs_band) +{ + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + u8 step[3] = {0}; + u8 cur_igi = igi; + boolean first_connect = false, first_dis_connect = false; - if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK)) { - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, - "support ability is disabled, return.\n"); - return; - } + first_connect = (dm->is_linked) && !dig_t->is_media_connect; + first_dis_connect = (!dm->is_linked) && dig_t->is_media_connect; - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "pre_timer_check_cnt=%d, cur_timer_check_cnt=%d\n", - lna_info->pre_timer_check_cnt, - lna_info->cur_timer_check_cnt); - - if (dm->is_disable_lna_sat_chk) { - phydm_lna_sat_chk_init(dm); - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, - "is_disable_lna_sat_chk=%d, return.\n", dm->is_disable_lna_sat_chk); - return; - } - - if ((dm->support_ic_type & ODM_RTL8197F) == 0) { - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, - "SupportICType != ODM_RTL8197F, return.\n"); - return; - } - - if ((rssi_min == 0) || (rssi_min == 0xff)) { - // adapt agc table 0 - phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0); - phydm_lna_sat_chk_init(dm); - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, - "rssi_min=%d, return.\n", rssi_min); - return; - } - - if (lna_info->cur_timer_check_cnt == lna_info->pre_timer_check_cnt) { - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "Timer check fail, restart timer.\n"); - phydm_lna_sat_chk(dm); + if (dm->is_linked) { + if (dm->pre_rssi_min <= dm->rssi_min) { + PHYDM_DBG(dm, DBG_DIG, "pre_rssi_min <= rssi_min\n"); + step[0] = 2; + step[1] = 1; + step[2] = 2; + } else { + step[0] = 4; + step[1] = 2; + step[2] = 2; + } } else { - PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "Timer check pass.\n"); + step[0] = 2; + step[1] = 1; + step[2] = 2; } - lna_info->pre_timer_check_cnt = lna_info->cur_timer_check_cnt; + + PHYDM_DBG(dm, DBG_DIG, "step = {-%d, +%d, +%d}\n", step[2], step[1], + step[0]); + + if (first_connect) { + if (is_dfs_band) { + if (dm->rssi_min > DIG_MAX_DFS) + igi = DIG_MAX_DFS; + else + igi = dm->rssi_min; + PHYDM_DBG(dm, DBG_DIG, "DFS band:IgiMax=0x%x\n", + *rx_gain_max); + } else { + igi = *rx_gain_min; + } + + #if 0 + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + #if (RTL8812A_SUPPORT) + if (dm->support_ic_type == ODM_RTL8812) + odm_config_bb_with_header_file(dm, + CONFIG_BB_AGC_TAB_DIFF); + #endif + #endif + #endif + PHYDM_DBG(dm, DBG_DIG, "First connect: foce IGI=0x%x\n", igi); + } else { + /* @2 Before link */ + PHYDM_DBG(dm, DBG_DIG, "Adjust IGI before link\n"); + + if (first_dis_connect) { + igi = dig_t->dm_dig_min; + PHYDM_DBG(dm, DBG_DIG, + "First disconnect:foce IGI to lower bound\n"); + } else { + PHYDM_DBG(dm, DBG_DIG, "Pre_IGI=((0x%x)), FA=((%d))\n", + igi, fa_cnt); + + igi = phydm_new_igi_by_fa(dm, igi, fa_cnt, step); + } + } + /*@Check IGI by dyn-upper/lower bound */ + if (igi < *rx_gain_min) + igi = *rx_gain_min; + + if (igi > *rx_gain_max) + igi = *rx_gain_max; + + PHYDM_DBG(dm, DBG_DIG, "fa_cnt = %d, IGI: 0x%x -> 0x%x\n", + fa_cnt, cur_igi, igi); + + return igi; } -#endif /*#if (PHYDM_LNA_SAT_CHK_SUPPORT == 1)*/ -void -phydm_dig_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +/*@callback function triggered by SW timer*/ +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +void phydm_tdma_dig_cbk(struct phydm_timer_list *timer) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - char help[] = "-h"; - char monitor[] = "-m"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; - u8 i; + void *adapter = (void *)timer->Adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; - if ((strcmp(input[1], help) == 0)) - PDM_SNPF(out_len, used, output + used, out_len - used, - "{0} fa[0] fa[1] fa[2]\n"); - else if ((strcmp(input[1], monitor) == 0)) { - PDM_SNPF(out_len, used, output + used, out_len - used, - "Read DIG fa_th[0:2]= {%d, %d, %d}\n", - dig_t->fa_th[0], dig_t->fa_th[1], - dig_t->fa_th[2]); + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + if (phydm_dig_abort(dm) || dm->original_dig_restore) + return; + /*@ + *PHYDM_DBG(dm, DBG_DIG, "timer callback =======> tdma_dig_state=%d\n"); + * dig_t->tdma_dig_state); + *PHYDM_DBG(dm, DBG_DIG, "tdma_h_igi=0x%x, tdma_l_igi=0x%x\n", + * dig_t->cur_ig_value_tdma, + * dig_t->low_ig_value); + */ + phydm_tdma_fa_cnt_chk(dm); + + /*@prevent dumb*/ + if (dm->tdma_dig_state_number < 2) + dm->tdma_dig_state_number = 2; + + /*@update state*/ + dig_t->tdma_dig_cnt++; + dig_t->tdma_dig_state = dig_t->tdma_dig_cnt % dm->tdma_dig_state_number; + + /*@ + *PHYDM_DBG(dm, DBG_DIG, "enter state %d, dig count %d\n", + * dig_t->tdma_dig_state, dig_t->tdma_dig_cnt); + */ + + if (dig_t->tdma_dig_state == TDMA_DIG_LOW_STATE) + odm_write_dig(dm, dig_t->low_ig_value); + else if (dig_t->tdma_dig_state >= TDMA_DIG_HIGH_STATE) + odm_write_dig(dm, dig_t->cur_ig_value_tdma); + + odm_set_timer(dm, &dm->tdma_dig_timer, dm->tdma_dig_timer_ms); +} +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) +void phydm_tdma_dig_cbk(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *padapter = dm->adapter; + + if (dm->support_interface == ODM_ITRF_PCIE) + phydm_tdma_dig_workitem_callback(dm); + /* @Can't do I/O in timer callback*/ + else + phydm_run_in_thread_cmd(dm, phydm_tdma_dig_workitem_callback, + dm); +} + +void phydm_tdma_dig_workitem_callback(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + + if (phydm_dig_abort(dm) || (dm->original_dig_restore)) + return; + /*@ + *PHYDM_DBG(dm, DBG_DIG, "timer callback =======> tdma_dig_state=%d\n"); + * dig_t->tdma_dig_state); + *PHYDM_DBG(dm, DBG_DIG, "tdma_h_igi=0x%x, tdma_l_igi=0x%x\n", + * dig_t->cur_ig_value_tdma, + * dig_t->low_ig_value); + */ + phydm_tdma_fa_cnt_chk(dm); + + /*@prevent dumb*/ + if (dm->tdma_dig_state_number < 2) + dm->tdma_dig_state_number = 2; + + /*@update state*/ + dig_t->tdma_dig_cnt++; + dig_t->tdma_dig_state = dig_t->tdma_dig_cnt % dm->tdma_dig_state_number; + + /*@ + *PHYDM_DBG(dm, DBG_DIG, "enter state %d, dig count %d\n", + * dig_t->tdma_dig_state, dig_t->tdma_dig_cnt); + */ + + if (dig_t->tdma_dig_state == TDMA_DIG_LOW_STATE) + odm_write_dig(dm, dig_t->low_ig_value); + else if (dig_t->tdma_dig_state >= TDMA_DIG_HIGH_STATE) + odm_write_dig(dm, dig_t->cur_ig_value_tdma); + + odm_set_timer(dm, &dm->tdma_dig_timer, dm->tdma_dig_timer_ms); +} +#else +void phydm_tdma_dig_cbk(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + + if (phydm_dig_abort(dm) || dm->original_dig_restore) + return; + /*@ + *PHYDM_DBG(dm, DBG_DIG, "timer callback =======> tdma_dig_state=%d\n"); + * dig_t->tdma_dig_state); + *PHYDM_DBG(dm, DBG_DIG, "tdma_h_igi=0x%x, tdma_l_igi=0x%x\n", + * dig_t->cur_ig_value_tdma, + * dig_t->low_ig_value); + */ + phydm_tdma_fa_cnt_chk(dm); + + /*@prevent dumb*/ + if (dm->tdma_dig_state_number < 2) + dm->tdma_dig_state_number = 2; + + /*@update state*/ + dig_t->tdma_dig_cnt++; + dig_t->tdma_dig_state = dig_t->tdma_dig_cnt % dm->tdma_dig_state_number; + + /*@ + *PHYDM_DBG(dm, DBG_DIG, "enter state %d, dig count %d\n", + * dig_t->tdma_dig_state, dig_t->tdma_dig_cnt); + */ + + if (dig_t->tdma_dig_state == TDMA_DIG_LOW_STATE) + odm_write_dig(dm, dig_t->low_ig_value); + else if (dig_t->tdma_dig_state >= TDMA_DIG_HIGH_STATE) + odm_write_dig(dm, dig_t->cur_ig_value_tdma); + + odm_set_timer(dm, &dm->tdma_dig_timer, dm->tdma_dig_timer_ms); +} +#endif +/*@============================================================*/ +/*@FASLE ALARM CHECK*/ +/*@============================================================*/ +void phydm_tdma_fa_cnt_chk(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; + struct phydm_fa_acc_struct *fa_t_acc = &dm->false_alm_cnt_acc; + struct phydm_fa_acc_struct *fa_t_acc_low = &dm->false_alm_cnt_acc_low; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + boolean rssi_dump_en = false; + u32 timestamp = 0; + u8 states_per_block = dm->tdma_dig_state_number; + u8 cur_tdma_dig_state = 0; + u32 start_th = 0; + u8 state_diff = 0; + u32 tdma_dig_block_period_ms = 0; + u32 tdma_dig_block_cnt_thd = 0; + u32 timestamp_diff = 0; + + /*@calculate duration of a tdma block*/ + tdma_dig_block_period_ms = dm->tdma_dig_timer_ms * states_per_block; + + /*@ + *caution!ONE_SEC_MS must be divisible by tdma_dig_block_period_ms, + *or FA will be fewer. + */ + tdma_dig_block_cnt_thd = ONE_SEC_MS / tdma_dig_block_period_ms; + + /*@tdma_dig_state == 0, collect H-state FA, else, collect L-state FA*/ + if (dig_t->tdma_dig_state == TDMA_DIG_LOW_STATE) + cur_tdma_dig_state = TDMA_DIG_LOW_STATE; + else if (dig_t->tdma_dig_state >= TDMA_DIG_HIGH_STATE) + cur_tdma_dig_state = TDMA_DIG_HIGH_STATE; + /*@ + *PHYDM_DBG(dm, DBG_DIG, "in state %d, dig count %d\n", + * cur_tdma_dig_state, dig_t->tdma_dig_cnt); + */ + if (cur_tdma_dig_state == 0) { + /*@L-state indicates next block*/ + dig_t->tdma_dig_block_cnt++; + + /*@1sec dump check*/ + if (dig_t->tdma_dig_block_cnt >= tdma_dig_block_cnt_thd) + rssi_dump_en = true; + + /*@ + *PHYDM_DBG(dm, DBG_DIG,"[L-state] tdma_dig_block_cnt=%d\n", + * dig_t->tdma_dig_block_cnt); + */ + + /*@collect FA till this block end*/ + phydm_false_alarm_counter_statistics(dm); + phydm_fa_cnt_acc(dm, rssi_dump_en, cur_tdma_dig_state); + /*@1s L-FA collect end*/ + + /*@1sec dump reached*/ + if (rssi_dump_en) { + /*@L-DIG*/ + phydm_noisy_detection(dm); + #ifdef PHYDM_SUPPORT_CCKPD + phydm_cck_pd_th(dm); + #endif + PHYDM_DBG(dm, DBG_DIG, "run tdma L-state dig ====>\n"); + phydm_tdma_low_dig(dm); + PHYDM_DBG(dm, DBG_DIG, "\n\n"); + } + } else if (cur_tdma_dig_state == 1) { + /*@1sec dump check*/ + if (dig_t->tdma_dig_block_cnt >= tdma_dig_block_cnt_thd) + rssi_dump_en = true; + + /*@ + *PHYDM_DBG(dm, DBG_DIG,"[H-state] tdma_dig_block_cnt=%d\n", + * dig_t->tdma_dig_block_cnt); + */ + + /*@collect FA till this block end*/ + phydm_false_alarm_counter_statistics(dm); + phydm_fa_cnt_acc(dm, rssi_dump_en, cur_tdma_dig_state); + /*@1s H-FA collect end*/ + + /*@1sec dump reached*/ + state_diff = dm->tdma_dig_state_number - dig_t->tdma_dig_state; + if (rssi_dump_en && (state_diff == 1)) { + /*@H-DIG*/ + phydm_noisy_detection(dm); + #ifdef PHYDM_SUPPORT_CCKPD + phydm_cck_pd_th(dm); + #endif + PHYDM_DBG(dm, DBG_DIG, "run tdma H-state dig ====>\n"); + phydm_tdma_high_dig(dm); + PHYDM_DBG(dm, DBG_DIG, "\n\n"); + PHYDM_DBG(dm, DBG_DIG, "1 sec reached, is_linked=%d\n", + dm->is_linked); + PHYDM_DBG(dm, DBG_DIG, "1 sec L-CCA=%d, L-FA=%d\n", + fa_t_acc_low->cnt_cca_all_1sec, + fa_t_acc_low->cnt_all_1sec); + PHYDM_DBG(dm, DBG_DIG, "1 sec H-CCA=%d, H-FA=%d\n", + fa_t_acc->cnt_cca_all_1sec, + fa_t_acc->cnt_all_1sec); + PHYDM_DBG(dm, DBG_DIG, + "1 sec TOTAL-CCA=%d, TOTAL-FA=%d\n\n", + fa_t_acc->cnt_cca_all + + fa_t_acc_low->cnt_cca_all, + fa_t_acc->cnt_all + fa_t_acc_low->cnt_all); + + /*@Reset AccFalseAlarmCounterStatistics */ + phydm_false_alarm_counter_acc_reset(dm); + dig_t->tdma_dig_block_cnt = 0; + } + } + /*@Reset FalseAlarmCounterStatistics */ + phydm_false_alarm_counter_reset(dm); +} + +void phydm_tdma_low_dig(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; + struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc_low; +#ifdef CFG_DIG_DAMPING_CHK + struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t; +#endif + boolean first_connect, first_disconnect = false; + u8 igi = dig_t->cur_ig_value; + u8 new_igi = 0x20; + u8 tdma_l_igi = dig_t->low_ig_value; + u8 tdma_l_dym_min = dig_t->tdma_rx_gain_min[TDMA_DIG_LOW_STATE]; + u8 tdma_l_dym_max = dig_t->tdma_rx_gain_max[TDMA_DIG_LOW_STATE]; + u32 fa_cnt = falm_cnt->cnt_all; + boolean dfs_mode_en = false, is_performance = true; + u8 rssi_min = dm->rssi_min; + u8 igi_upper_rssi_min = 0; + u8 offset = 15; + + if (!(dm->original_dig_restore)) { + if (tdma_l_igi == 0) + tdma_l_igi = igi; + + fa_cnt = falm_cnt_acc->cnt_all_1sec; + } + + if (phydm_dig_abort(dm)) { + dig_t->low_ig_value = phydm_get_igi(dm, BB_PATH_A); + return; + } + + /*@Mode Decision*/ + dfs_mode_en = false; + is_performance = true; + + /* @Abs Boundary Decision*/ + dig_t->dm_dig_max = DIG_MAX_COVERAGR; //0x26 + dig_t->dm_dig_min = DIG_MIN_PERFORMANCE; //0x20 + dig_t->dig_max_of_min = DIG_MAX_OF_MIN_COVERAGE; //0x22 + + if (dfs_mode_en) { + if (*dm->band_width == CHANNEL_WIDTH_20) + dig_t->dm_dig_min = DIG_MIN_DFS + 2; + else + dig_t->dm_dig_min = DIG_MIN_DFS; + + } else { + #if 0 + if (dm->support_ic_type & + (ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B)) + dig_t->dm_dig_min = 0x1c; + else if (dm->support_ic_type & ODM_RTL8197F) + dig_t->dm_dig_min = 0x1e; /*@For HW setting*/ + #endif + } + + PHYDM_DBG(dm, DBG_DIG, "Abs{Max, Min}={0x%x, 0x%x}, Max_of_min=0x%x\n", + dig_t->dm_dig_max, dig_t->dm_dig_min, dig_t->dig_max_of_min); + + /* @Dyn Boundary by RSSI*/ + if (!dm->is_linked) { + /*@if no link, always stay at lower bound*/ + tdma_l_dym_max = 0x26; + tdma_l_dym_min = dig_t->dm_dig_min; + + PHYDM_DBG(dm, DBG_DIG, "No-Link, Dyn{Max, Min}={0x%x, 0x%x}\n", + tdma_l_dym_max, tdma_l_dym_min); + } else { + PHYDM_DBG(dm, DBG_DIG, "rssi_min=%d, ofst=%d\n", + dm->rssi_min, offset); + + /* @DIG lower bound in L-state*/ + tdma_l_dym_min = dig_t->dm_dig_min; + +#ifdef CFG_DIG_DAMPING_CHK + /*@Limit Dyn min by damping*/ + if (dig_t->dig_dl_en && + dig_rc->damping_limit_en && + tdma_l_dym_min < dig_rc->damping_limit_val) { + PHYDM_DBG(dm, DBG_DIG, + "[Limit by Damping] dyn_min=0x%x -> 0x%x\n", + tdma_l_dym_min, dig_rc->damping_limit_val); + + tdma_l_dym_min = dig_rc->damping_limit_val; + } +#endif + + /*@DIG upper bound in L-state*/ + igi_upper_rssi_min = rssi_min + offset; + if (igi_upper_rssi_min > dig_t->dm_dig_max) + tdma_l_dym_max = dig_t->dm_dig_max; + else if (igi_upper_rssi_min < dig_t->dm_dig_min) + tdma_l_dym_max = dig_t->dm_dig_min; + else + tdma_l_dym_max = igi_upper_rssi_min; + + /* @1 Force Lower Bound for AntDiv */ + /*@ + *if (!dm->is_one_entry_only && + *(dm->support_ability & ODM_BB_ANT_DIV) && + *(dm->ant_div_type == CG_TRX_HW_ANTDIV || + *dm->ant_div_type == CG_TRX_SMART_ANTDIV)) { + *if (dig_t->ant_div_rssi_max > dig_t->dig_max_of_min) + * dig_t->rx_gain_range_min = dig_t->dig_max_of_min; + *else + * dig_t->rx_gain_range_min = (u8)dig_t->ant_div_rssi_max; + * + *PHYDM_DBG(dm, DBG_DIG, "Force Dyn-Min=0x%x, RSSI_max=0x%x\n", + * dig_t->rx_gain_range_min, dig_t->ant_div_rssi_max); + *} + */ + + PHYDM_DBG(dm, DBG_DIG, "Dyn{Max, Min}={0x%x, 0x%x}\n", + tdma_l_dym_max, tdma_l_dym_min); + } + + /*@Abnormal Case Check*/ + /*@Abnormal lower bound case*/ + if (tdma_l_dym_min > tdma_l_dym_max) + tdma_l_dym_min = tdma_l_dym_max; + + PHYDM_DBG(dm, DBG_DIG, + "Abnoraml chk, force {Max, Min}={0x%x, 0x%x}\n", + tdma_l_dym_max, tdma_l_dym_min); + + /*@False Alarm Threshold Decision*/ + phydm_fa_threshold_check(dm, dfs_mode_en); + + /*@Adjust Initial Gain by False Alarm*/ + /*Select new IGI by FA */ + if (!(dm->original_dig_restore)) { + tdma_l_igi = get_new_igi_bound(dm, tdma_l_igi, fa_cnt, + &tdma_l_dym_max, + &tdma_l_dym_min, + dfs_mode_en); + } else { + new_igi = phydm_get_new_igi(dm, igi, fa_cnt, dfs_mode_en); + } + + /*Update status*/ + if (!(dm->original_dig_restore)) { + dig_t->low_ig_value = tdma_l_igi; + dig_t->tdma_rx_gain_min[TDMA_DIG_LOW_STATE] = tdma_l_dym_min; + dig_t->tdma_rx_gain_max[TDMA_DIG_LOW_STATE] = tdma_l_dym_max; +#if 0 + /*odm_write_dig(dm, tdma_l_igi);*/ +#endif + } else { + odm_write_dig(dm, new_igi); + } + + dig_t->is_media_connect = dm->is_linked; +} + +void phydm_tdma_high_dig(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; + struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc; +#ifdef CFG_DIG_DAMPING_CHK + struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t; +#endif + boolean first_connect, first_disconnect = false; + u8 igi = dig_t->cur_ig_value; + u8 new_igi = 0x20; + u8 tdma_h_igi = dig_t->cur_ig_value_tdma; + u8 tdma_h_dym_min = dig_t->tdma_rx_gain_min[TDMA_DIG_HIGH_STATE]; + u8 tdma_h_dym_max = dig_t->tdma_rx_gain_max[TDMA_DIG_HIGH_STATE]; + u32 fa_cnt = falm_cnt->cnt_all; + boolean dfs_mode_en = false, is_performance = true; + u8 rssi_min = dm->rssi_min; + u8 igi_upper_rssi_min = 0; + u8 offset = 15; + + if (!(dm->original_dig_restore)) { + if (tdma_h_igi == 0) + tdma_h_igi = igi; + + fa_cnt = falm_cnt_acc->cnt_all_1sec; + } + + if (phydm_dig_abort(dm)) { + dig_t->cur_ig_value_tdma = phydm_get_igi(dm, BB_PATH_A); + return; + } + + /*@Mode Decision*/ + dfs_mode_en = false; + is_performance = true; + + /*@Abs Boundary Decision*/ + dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE; // 0x2a + + if (!dm->is_linked) { + dig_t->dm_dig_max = DIG_MAX_COVERAGR; + dig_t->dm_dig_min = DIG_MIN_PERFORMANCE; // 0x20 + } else if (dfs_mode_en) { + if (*dm->band_width == CHANNEL_WIDTH_20) + dig_t->dm_dig_min = DIG_MIN_DFS + 2; + else + dig_t->dm_dig_min = DIG_MIN_DFS; + + dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE; + dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE; + } else { + if (*dm->bb_op_mode == PHYDM_BALANCE_MODE) { + /*service > 2 devices*/ + dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE; + #if (DIG_HW == 1) + dig_t->dig_max_of_min = DIG_MIN_COVERAGE; + #else + dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE; + #endif + } else if (*dm->bb_op_mode == PHYDM_PERFORMANCE_MODE) { + /*service 1 devices*/ + dig_t->dm_dig_max = DIG_MAX_PERFORMANCE_MODE; + dig_t->dig_max_of_min = DIG_MAX_OF_MIN_PERFORMANCE_MODE; + } + + #if 0 + if (dm->support_ic_type & + (ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B)) + dig_t->dm_dig_min = 0x1c; + else if (dm->support_ic_type & ODM_RTL8197F) + dig_t->dm_dig_min = 0x1e; /*@For HW setting*/ + else + #endif + dig_t->dm_dig_min = DIG_MIN_PERFORMANCE; + } + PHYDM_DBG(dm, DBG_DIG, "Abs{Max, Min}={0x%x, 0x%x}, Max_of_min=0x%x\n", + dig_t->dm_dig_max, dig_t->dm_dig_min, dig_t->dig_max_of_min); + + /*@Dyn Boundary by RSSI*/ + if (!dm->is_linked) { + /*@if no link, always stay at lower bound*/ + tdma_h_dym_max = dig_t->dig_max_of_min; + tdma_h_dym_min = dig_t->dm_dig_min; + + PHYDM_DBG(dm, DBG_DIG, "No-Link, Dyn{Max, Min}={0x%x, 0x%x}\n", + tdma_h_dym_max, tdma_h_dym_min); + } else { + PHYDM_DBG(dm, DBG_DIG, "rssi_min=%d, ofst=%d\n", + dm->rssi_min, offset); + + /* @DIG lower bound in H-state*/ + if (rssi_min < dig_t->dm_dig_min) + tdma_h_dym_min = dig_t->dm_dig_min; + else + tdma_h_dym_min = rssi_min; // turbo not considered yet + +#ifdef CFG_DIG_DAMPING_CHK + /*@Limit Dyn min by damping*/ + if (dig_t->dig_dl_en && + dig_rc->damping_limit_en && + tdma_h_dym_min < dig_rc->damping_limit_val) { + PHYDM_DBG(dm, DBG_DIG, + "[Limit by Damping] dyn_min=0x%x -> 0x%x\n", + tdma_h_dym_min, dig_rc->damping_limit_val); + + tdma_h_dym_min = dig_rc->damping_limit_val; + } +#endif + + /*@DIG upper bound in H-state*/ + igi_upper_rssi_min = rssi_min + offset; + if (igi_upper_rssi_min > dig_t->dm_dig_max) + tdma_h_dym_max = dig_t->dm_dig_max; + else + tdma_h_dym_max = igi_upper_rssi_min; + + /* @1 Force Lower Bound for AntDiv */ + /*@ + *if (!dm->is_one_entry_only && + *(dm->support_ability & ODM_BB_ANT_DIV) && + *(dm->ant_div_type == CG_TRX_HW_ANTDIV || + *dm->ant_div_type == CG_TRX_SMART_ANTDIV)) { + * if (dig_t->ant_div_rssi_max > dig_t->dig_max_of_min) + * dig_t->rx_gain_range_min = dig_t->dig_max_of_min; + * else + * dig_t->rx_gain_range_min = (u8)dig_t->ant_div_rssi_max; + */ + /*@ + *PHYDM_DBG(dm, DBG_DIG, "Force Dyn-Min=0x%x, RSSI_max=0x%x\n", + * dig_t->rx_gain_range_min, dig_t->ant_div_rssi_max); + *} + */ + PHYDM_DBG(dm, DBG_DIG, "Dyn{Max, Min}={0x%x, 0x%x}\n", + tdma_h_dym_max, tdma_h_dym_min); + } + + /*@Abnormal Case Check*/ + /*@Abnormal low higher bound case*/ + if (tdma_h_dym_max < dig_t->dm_dig_min) + tdma_h_dym_max = dig_t->dm_dig_min; + /*@Abnormal lower bound case*/ + if (tdma_h_dym_min > tdma_h_dym_max) + tdma_h_dym_min = tdma_h_dym_max; + + PHYDM_DBG(dm, DBG_DIG, "Abnoraml chk, force {Max, Min}={0x%x, 0x%x}\n", + tdma_h_dym_max, tdma_h_dym_min); + + /*@False Alarm Threshold Decision*/ + phydm_fa_threshold_check(dm, dfs_mode_en); + + /*@Adjust Initial Gain by False Alarm*/ + /*Select new IGI by FA */ + if (!(dm->original_dig_restore)) { + tdma_h_igi = get_new_igi_bound(dm, tdma_h_igi, fa_cnt, + &tdma_h_dym_max, + &tdma_h_dym_min, + dfs_mode_en); + } else { + new_igi = phydm_get_new_igi(dm, igi, fa_cnt, dfs_mode_en); + } + + /*Update status*/ + if (!(dm->original_dig_restore)) { + dig_t->cur_ig_value_tdma = tdma_h_igi; + dig_t->tdma_rx_gain_min[TDMA_DIG_HIGH_STATE] = tdma_h_dym_min; + dig_t->tdma_rx_gain_max[TDMA_DIG_HIGH_STATE] = tdma_h_dym_max; +#if 0 + /*odm_write_dig(dm, tdma_h_igi);*/ +#endif + } else { + odm_write_dig(dm, new_igi); + } + + dig_t->is_media_connect = dm->is_linked; +} + +void phydm_fa_cnt_acc(void *dm_void, boolean rssi_dump_en, + u8 cur_tdma_dig_state) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; + struct phydm_fa_acc_struct *falm_cnt_acc = NULL; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + u8 factor_num = 0; + u8 factor_denum = 1; + u8 total_state_number = 0; + + if (cur_tdma_dig_state == TDMA_DIG_LOW_STATE) + falm_cnt_acc = &dm->false_alm_cnt_acc_low; + else if (cur_tdma_dig_state == TDMA_DIG_HIGH_STATE) + + falm_cnt_acc = &dm->false_alm_cnt_acc; + /*@ + *PHYDM_DBG(dm, DBG_DIG, + * "[%s] ==> dig_state=%d, one_sec=%d\n", __func__, + * cur_tdma_dig_state, rssi_dump_en); + */ + falm_cnt_acc->cnt_parity_fail += falm_cnt->cnt_parity_fail; + falm_cnt_acc->cnt_rate_illegal += falm_cnt->cnt_rate_illegal; + falm_cnt_acc->cnt_crc8_fail += falm_cnt->cnt_crc8_fail; + falm_cnt_acc->cnt_mcs_fail += falm_cnt->cnt_mcs_fail; + falm_cnt_acc->cnt_ofdm_fail += falm_cnt->cnt_ofdm_fail; + falm_cnt_acc->cnt_cck_fail += falm_cnt->cnt_cck_fail; + falm_cnt_acc->cnt_all += falm_cnt->cnt_all; + falm_cnt_acc->cnt_fast_fsync += falm_cnt->cnt_fast_fsync; + falm_cnt_acc->cnt_sb_search_fail += falm_cnt->cnt_sb_search_fail; + falm_cnt_acc->cnt_ofdm_cca += falm_cnt->cnt_ofdm_cca; + falm_cnt_acc->cnt_cck_cca += falm_cnt->cnt_cck_cca; + falm_cnt_acc->cnt_cca_all += falm_cnt->cnt_cca_all; + falm_cnt_acc->cnt_cck_crc32_error += falm_cnt->cnt_cck_crc32_error; + falm_cnt_acc->cnt_cck_crc32_ok += falm_cnt->cnt_cck_crc32_ok; + falm_cnt_acc->cnt_ofdm_crc32_error += falm_cnt->cnt_ofdm_crc32_error; + falm_cnt_acc->cnt_ofdm_crc32_ok += falm_cnt->cnt_ofdm_crc32_ok; + falm_cnt_acc->cnt_ht_crc32_error += falm_cnt->cnt_ht_crc32_error; + falm_cnt_acc->cnt_ht_crc32_ok += falm_cnt->cnt_ht_crc32_ok; + falm_cnt_acc->cnt_vht_crc32_error += falm_cnt->cnt_vht_crc32_error; + falm_cnt_acc->cnt_vht_crc32_ok += falm_cnt->cnt_vht_crc32_ok; + falm_cnt_acc->cnt_crc32_error_all += falm_cnt->cnt_crc32_error_all; + falm_cnt_acc->cnt_crc32_ok_all += falm_cnt->cnt_crc32_ok_all; + + /*@ + *PHYDM_DBG(dm, DBG_DIG, + * "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", + * falm_cnt->cnt_cck_cca, + * falm_cnt->cnt_ofdm_cca, + * falm_cnt->cnt_cca_all); + *PHYDM_DBG(dm, DBG_DIG, + * "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", + * falm_cnt->cnt_cck_fail, + * falm_cnt->cnt_ofdm_fail, + * falm_cnt->cnt_all); + */ + if (rssi_dump_en == 1) { + total_state_number = dm->tdma_dig_state_number; + + if (cur_tdma_dig_state == TDMA_DIG_HIGH_STATE) { + factor_num = total_state_number; + factor_denum = total_state_number - 1; + } else if (cur_tdma_dig_state == TDMA_DIG_LOW_STATE) { + factor_num = total_state_number; + factor_denum = 1; + } + + falm_cnt_acc->cnt_all_1sec = + falm_cnt_acc->cnt_all * factor_num / factor_denum; + falm_cnt_acc->cnt_cca_all_1sec = + falm_cnt_acc->cnt_cca_all * factor_num / factor_denum; + falm_cnt_acc->cnt_cck_fail_1sec = + falm_cnt_acc->cnt_cck_fail * factor_num / factor_denum; + + PHYDM_DBG(dm, DBG_DIG, + "[ACC CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", + falm_cnt_acc->cnt_cck_cca, + falm_cnt_acc->cnt_ofdm_cca, + falm_cnt_acc->cnt_cca_all); + PHYDM_DBG(dm, DBG_DIG, + "[ACC FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n\n", + falm_cnt_acc->cnt_cck_fail, + falm_cnt_acc->cnt_ofdm_fail, + falm_cnt_acc->cnt_all); + + } +} +#endif /*@#ifdef IS_USE_NEW_TDMA*/ +#endif /*@#ifdef PHYDM_TDMA_DIG_SUPPORT*/ + +void phydm_dig_debug(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + u8 i = 0; + + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "{0} {en} fa_th[0] fa_th[1] fa_th[2]\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{1} {Damping Limit en}\n"); + #ifdef PHYDM_TDMA_DIG_SUPPORT + PDM_SNPF(out_len, used, output + used, out_len - used, + "{2} {original_dig_restore = %d}\n", + dm->original_dig_restore); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{3} {tdma_dig_timer_ms = %d}\n", + dm->tdma_dig_timer_ms); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{4} {tdma_dig_state_number = %d}\n", + dm->tdma_dig_state_number); + #endif } else { PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); - for (i = 1; i < 10; i++) { - if (input[i + 1]) - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); - } + for (i = 1; i < 10; i++) + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); if (var1[0] == 0) { - dig_t->is_dbg_fa_th = true; - dig_t->fa_th[0] = (u16)var1[1]; - dig_t->fa_th[1] = (u16)var1[2]; - dig_t->fa_th[2] = (u16)var1[3]; + if (var1[1] == 1) { + dig_t->is_dbg_fa_th = true; + dig_t->fa_th[0] = (u16)var1[2]; + dig_t->fa_th[1] = (u16)var1[3]; + dig_t->fa_th[2] = (u16)var1[4]; + PDM_SNPF(out_len, used, output + used, + out_len - used, + "Set DIG fa_th[0:2]= {%d, %d, %d}\n", + dig_t->fa_th[0], dig_t->fa_th[1], + dig_t->fa_th[2]); + } else { + dig_t->is_dbg_fa_th = false; + } + #ifdef PHYDM_TDMA_DIG_SUPPORT + } else if (var1[0] == 2) { + dm->original_dig_restore = (u8)var1[1]; + if (dm->original_dig_restore == 1) { + PDM_SNPF(out_len, used, output + used, + out_len - used, "Disable TDMA-DIG\n"); + } else { + PDM_SNPF(out_len, used, output + used, + out_len - used, "Enable TDMA-DIG\n"); + } + } else if (var1[0] == 3) { + dm->tdma_dig_timer_ms = (u8)var1[1]; PDM_SNPF(out_len, used, output + used, - out_len - used, - "Set DIG fa_th[0:2]= {%d, %d, %d}\n", - dig_t->fa_th[0], dig_t->fa_th[1], - dig_t->fa_th[2]); - } else - dig_t->is_dbg_fa_th = false; + out_len - used, "tdma_dig_timer_ms = %d\n", + dm->tdma_dig_timer_ms); + } else if (var1[0] == 4) { + dm->tdma_dig_state_number = (u8)var1[1]; + PDM_SNPF(out_len, used, output + used, + out_len - used, "tdma_dig_state_number = %d\n", + dm->tdma_dig_state_number); + #endif + } + + #ifdef CFG_DIG_DAMPING_CHK + else if (var1[0] == 1) { + dig_t->dig_dl_en = (u8)var1[1]; + /*@*/ + } + #endif } *_used = used; *_out_len = out_len; } +#ifdef CONFIG_MCC_DM +#if (RTL8822B_SUPPORT || RTL8822C_SUPPORT) +void phydm_mcc_igi_clr(void *dm_void, u8 clr_port) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + + mcc_dm->mcc_rssi[clr_port] = 0xff; + mcc_dm->mcc_dm_val[0][clr_port] = 0xff; /* 0xc50 clr */ + mcc_dm->mcc_dm_val[1][clr_port] = 0xff; /* 0xe50 clr */ +} + +void phydm_mcc_igi_chk(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + + if (mcc_dm->mcc_dm_val[0][0] == 0xff && + mcc_dm->mcc_dm_val[0][1] == 0xff) { + mcc_dm->mcc_dm_reg[0] = 0xffff; + mcc_dm->mcc_reg_id[0] = 0xff; + } + if (mcc_dm->mcc_dm_val[1][0] == 0xff && + mcc_dm->mcc_dm_val[1][1] == 0xff) { + mcc_dm->mcc_dm_reg[1] = 0xffff; + mcc_dm->mcc_reg_id[1] = 0xff; + } +} + +void phydm_mcc_igi_cal(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + u8 shift = 0; + u8 igi_val0, igi_val1; + + if (mcc_dm->mcc_rssi[0] == 0xff) + phydm_mcc_igi_clr(dm, 0); + if (mcc_dm->mcc_rssi[1] == 0xff) + phydm_mcc_igi_clr(dm, 1); + phydm_mcc_igi_chk(dm); + igi_val0 = mcc_dm->mcc_rssi[0] - shift; + igi_val1 = mcc_dm->mcc_rssi[1] - shift; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + phydm_fill_mcccmd(dm, 0, R_0x1d70, igi_val0, igi_val1); + phydm_fill_mcccmd(dm, 1, R_0x1d70 + 1, igi_val0, igi_val1); + #else + phydm_fill_mcccmd(dm, 0, 0xc50, igi_val0, igi_val1); + phydm_fill_mcccmd(dm, 1, 0xe50, igi_val0, igi_val1); + #endif + PHYDM_DBG(dm, DBG_COMP_MCC, "RSSI_min: %d %d, MCC_igi: %d %d\n", + mcc_dm->mcc_rssi[0], mcc_dm->mcc_rssi[1], + mcc_dm->mcc_dm_val[0][0], mcc_dm->mcc_dm_val[0][1]); +} +#endif /*#if (RTL8822B_SUPPORT)*/ +#endif /*#ifdef CONFIG_MCC_DM*/ diff --git a/hal/phydm/phydm_dig.h b/hal/phydm/phydm_dig.h index 553093e..9800980 100644 --- a/hal/phydm/phydm_dig.h +++ b/hal/phydm/phydm_dig.h @@ -23,64 +23,64 @@ * *****************************************************************************/ -#ifndef __PHYDMDIG_H__ -#define __PHYDMDIG_H__ +#ifndef __PHYDMDIG_H__ +#define __PHYDMDIG_H__ -/*#define DIG_VERSION "1.4"*/ /* 2017.04.18 YuChen. refine DIG code structure*/ -/*#define DIG_VERSION "2.0"*/ /* 2017.05.09 Dino. Move CCKPD to new files*/ -/*#define DIG_VERSION "2.1"*/ /* 2017.06.01 YuChen. Refine DFS condition*/ -#define DIG_VERSION "2.2" /* 2017.06.13 YuChen. Remove MP dig*/ +#define DIG_VERSION "2.3" -#define DIG_HW 0 +#define DIG_HW 0 +#define DIG_LIMIT_PERIOD 60 /*@60 sec*/ -/*--------------------Define ---------------------------------------*/ +/*@--------------------Define ---------------------------------------*/ -/*=== [DIG Boundary] ========================================*/ -/*DIG coverage mode*/ -#define DIG_MAX_COVERAGR 0x26 -#define DIG_MIN_COVERAGE 0x1c -#define DIG_MAX_OF_MIN_COVERAGE 0x22 -/*DIG performance mode*/ +/*@=== [DIG Boundary] ========================================*/ +/*@DIG coverage mode*/ +#define DIG_MAX_COVERAGR 0x26 +#define DIG_MIN_COVERAGE 0x1c +#define DIG_MAX_OF_MIN_COVERAGE 0x22 + +/*@[DIG Balance mode]*/ #if (DIG_HW == 1) -#define DIG_MAX_BALANCE_MODE 0x32 +#define DIG_MAX_BALANCE_MODE 0x32 #else -#define DIG_MAX_BALANCE_MODE 0x3e +#define DIG_MAX_BALANCE_MODE 0x3e #endif -#define DIG_MAX_OF_MIN_BALANCE_MODE 0x2a +#define DIG_MAX_OF_MIN_BALANCE_MODE 0x2a -#define DIG_MAX_PERFORMANCE_MODE 0x5a -#define DIG_MAX_OF_MIN_PERFORMANCE_MODE 0x40 /*from 3E -> 2A, refine by YuChen 2017/04/18*/ +/*@[DIG Performance mode]*/ +#define DIG_MAX_PERFORMANCE_MODE 0x5a +#define DIG_MAX_OF_MIN_PERFORMANCE_MODE 0x40 /*@[WLANBB-871]*/ +#define DIG_MIN_PERFORMANCE 0x20 -#define DIG_MIN_PERFORMANCE 0x20 +/*@DIG DFS function*/ +#define DIG_MAX_DFS 0x28 +#define DIG_MIN_DFS 0x20 -/*DIG DFS function*/ -#define DIG_MAX_DFS 0x28 -#define DIG_MIN_DFS 0x20 +/*@DIG LPS function*/ +#define DIG_MAX_LPS 0x3e +#define DIG_MIN_LPS 0x20 -/*DIG LPS function*/ -#define DIG_MAX_LPS 0x3e -#define DIG_MIN_LPS 0x20 +#ifdef PHYDM_TDMA_DIG_SUPPORT +#define DIG_NUM_OF_TDMA_STATES 2 /*@L, H state*/ +#define DIG_TIMER_MS 250 +#define ONE_SEC_MS 1000 +#endif -/*=== [DIG FA Threshold] ======================================*/ +/*@=== [DIG FA Threshold] ======================================*/ /*Normal*/ -#define DM_DIG_FA_TH0 500 -#define DM_DIG_FA_TH1 750 +#define DM_DIG_FA_TH0 500 +#define DM_DIG_FA_TH1 750 -/*LPS*/ -#define DM_DIG_FA_TH0_LPS 4 /* -> 4 lps */ -#define DM_DIG_FA_TH1_LPS 15 /* -> 15 lps */ -#define DM_DIG_FA_TH2_LPS 30 /* -> 30 lps */ +/*@LPS*/ +#define DM_DIG_FA_TH0_LPS 4 /* @-> 4 lps */ +#define DM_DIG_FA_TH1_LPS 15 /* @-> 15 lps */ +#define DM_DIG_FA_TH2_LPS 30 /* @-> 30 lps */ -#define RSSI_OFFSET_DIG_LPS 5 +#define RSSI_OFFSET_DIG_LPS 5 +#define DIG_RECORD_NUM 4 -/*LNA saturation check*/ -#define OFDM_AGC_TAB_0 0 -#define OFDM_AGC_TAB_2 2 -#define DIFF_RSSI_TO_IGI 10 -#define ONE_SEC_MS 1000 - -/*--------------------Enum-----------------------------------*/ +/*@--------------------Enum-----------------------------------*/ enum dig_goupcheck_level { DIG_GOUPCHECK_LEVEL_0, DIG_GOUPCHECK_LEVEL_1, @@ -89,38 +89,76 @@ enum dig_goupcheck_level { enum phydm_dig_mode { PHYDM_DIG_PERFORAMNCE_MODE = 0, - PHYDM_DIG_COVERAGE_MODE = 1, + PHYDM_DIG_COVERAGE_MODE = 1, }; -enum lna_sat_timer_state { - INIT_LNA_SAT_CHK_TIMMER, - CANCEL_LNA_SAT_CHK_TIMMER, - RELEASE_LNA_SAT_CHK_TIMMER +#ifdef PHYDM_TDMA_DIG_SUPPORT +enum upd_type { + ENABLE_TDMA, + MODE_DECISION +}; + +enum tdma_opmode { + MODE_PERFORMANCE = 1, + MODE_COVERAGE = 2 +}; + +#ifdef IS_USE_NEW_TDMA +enum tdma_dig_timer { + INIT_TDMA_DIG_TIMMER, + CANCEL_TDMA_DIG_TIMMER, + RELEASE_TDMA_DIG_TIMMER +}; + +enum tdma_dig_state { + TDMA_DIG_LOW_STATE = 0, + TDMA_DIG_HIGH_STATE = 1, + NORMAL_DIG = 2 +}; +#endif +#endif + +/*@--------------------Define Struct-----------------------------------*/ +#ifdef CFG_DIG_DAMPING_CHK +struct phydm_dig_recorder_strcut { + u8 igi_bitmap; /*@Don't add any new parameter before this*/ + u8 igi_history[DIG_RECORD_NUM]; + u32 fa_history[DIG_RECORD_NUM]; + u8 damping_limit_en; + u8 damping_limit_val; /*@Limit IGI_dyn_min*/ + u32 limit_time; + u8 limit_rssi; +}; +#endif + +struct phydm_mcc_dig { + u8 mcc_rssi_A; + u8 mcc_rssi_B; }; -/*--------------------Define Struct-----------------------------------*/ struct phydm_dig_struct { - boolean is_ignore_dig; /*for old pause function*/ - boolean is_dbg_fa_th; - u8 dig_mode_decision; +#ifdef CFG_DIG_DAMPING_CHK + struct phydm_dig_recorder_strcut dig_recorder_t; + u8 dig_dl_en; /*@damping limit function enable*/ +#endif + boolean is_dbg_fa_th; u8 cur_ig_value; u8 rvrt_val; u8 igi_backup; - u8 rx_gain_range_max; /*dig_dynamic_max*/ - u8 rx_gain_range_min; /*dig_dynamic_min*/ - u8 dm_dig_max; /*Absolutly upper bound*/ - u8 dm_dig_min; /*Absolutly lower bound*/ - u8 dig_max_of_min; /*Absolutly max of min*/ - boolean is_media_connect; + u8 rx_gain_range_max; /*@dig_dynamic_max*/ + u8 rx_gain_range_min; /*@dig_dynamic_min*/ + u8 dm_dig_max; /*@Absolutly upper bound*/ + u8 dm_dig_min; /*@Absolutly lower bound*/ + u8 dig_max_of_min; /*@Absolutly max of min*/ + boolean is_media_connect; u32 ant_div_rssi_max; u8 *is_p2p_in_process; - u8 pause_lv_bitmap; /*bit-map of pause level*/ - u8 pause_dig_value[PHYDM_PAUSE_MAX_NUM]; - enum dig_goupcheck_level dig_go_up_check_level; - u8 aaa_default; - u8 a0a_default; + enum dig_goupcheck_level go_up_chk_lv; u16 fa_th[3]; -#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1 || RTL8821C_SUPPORT == 1) +#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8198F_SUPPORT || RTL8192F_SUPPORT || RTL8195B_SUPPORT ||\ + RTL8822C_SUPPORT || RTL8814B_SUPPORT || RTL8721D_SUPPORT ||\ + RTL8812F_SUPPORT || RTL8197G_SUPPORT) u8 rf_gain_idx; u8 agc_table_idx; u8 big_jump_lmt[16]; @@ -129,14 +167,14 @@ struct phydm_dig_struct { u8 big_jump_step2:2; u8 big_jump_step3:2; #endif - u8 dig_upcheck_initial_value; - u8 dig_level0_ratio_reciprocal; - u8 dig_level1_ratio_reciprocal; + u8 upcheck_init_val; + u8 lv0_ratio_reciprocal; + u8 lv1_ratio_reciprocal; #ifdef PHYDM_TDMA_DIG_SUPPORT u8 cur_ig_value_tdma; u8 low_ig_value; - u8 tdma_dig_state; /*To distinguish which state is now.(L-sate or H-state)*/ - u8 tdma_dig_cnt; /*for phydm_tdma_dig_timer_check use*/ + u8 tdma_dig_state; /*@To distinguish which state is now.(L-sate or H-state)*/ + u8 tdma_dig_cnt; /*@for phydm_tdma_dig_timer_check use*/ u8 pre_tdma_dig_cnt; u8 sec_factor; u32 cur_timestamp; @@ -144,7 +182,15 @@ struct phydm_dig_struct { u32 fa_start_timestamp; u32 fa_end_timestamp; u32 fa_acc_1sec_timestamp; -#endif +#ifdef IS_USE_NEW_TDMA + u8 tdma_dig_block_cnt;/*@for 1 second dump indicator use*/ + /*@dynamic upper bound for L/H state*/ + u8 tdma_rx_gain_max[DIG_NUM_OF_TDMA_STATES]; + /*@dynamic lower bound for L/H state*/ + u8 tdma_rx_gain_min[DIG_NUM_OF_TDMA_STATES]; + /*To distinguish current state(L-sate or H-state)*/ +#endif +#endif }; struct phydm_fa_struct { @@ -155,9 +201,10 @@ struct phydm_fa_struct { u32 cnt_mcs_fail; u32 cnt_mcs_fail_vht; u32 cnt_ofdm_fail; - u32 cnt_ofdm_fail_pre; /* For RTL8881A */ + u32 cnt_ofdm_fail_pre; /* @For RTL8881A */ u32 cnt_cck_fail; u32 cnt_all; + u32 cnt_all_accumulated; u32 cnt_all_pre; u32 cnt_fast_fsync; u32 cnt_sb_search_fail; @@ -179,10 +226,10 @@ struct phydm_fa_struct { u32 cnt_crc32_error_all; u32 cnt_crc32_ok_all; u32 time_fa_all; - boolean cck_block_enable; - boolean ofdm_block_enable; + boolean cck_block_enable; + boolean ofdm_block_enable; u32 dbg_port0; - boolean edcca_flag; + boolean edcca_flag; }; #ifdef PHYDM_TDMA_DIG_SUPPORT @@ -192,7 +239,7 @@ struct phydm_fa_acc_struct { u32 cnt_crc8_fail; u32 cnt_mcs_fail; u32 cnt_ofdm_fail; - u32 cnt_ofdm_fail_pre; /*For RTL8881A*/ + u32 cnt_ofdm_fail_pre; /*@For RTL8881A*/ u32 cnt_cck_fail; u32 cnt_all; u32 cnt_all_pre; @@ -216,148 +263,75 @@ struct phydm_fa_acc_struct { u32 cnt_cck_fail_1sec; }; -#endif /*#ifdef PHYDM_TDMA_DIG_SUPPORT*/ +#endif /*@#ifdef PHYDM_TDMA_DIG_SUPPORT*/ -struct phydm_lna_sat_info_struct { - u32 sat_cnt_acc_patha; - u32 sat_cnt_acc_pathb; - u32 check_time; - boolean pre_sat_status; - boolean cur_sat_status; - struct phydm_timer_list phydm_lna_sat_chk_timer; - u32 cur_timer_check_cnt; - u32 pre_timer_check_cnt; -}; +/*@--------------------Function declaration-----------------------------*/ +void phydm_write_dig_reg(void *dm_void, u8 igi); -/*--------------------Function declaration-----------------------------*/ -void -odm_write_dig( - void *dm_void, - u8 current_igi -); +void odm_write_dig(void *dm_void, u8 current_igi); -void -phydm_set_dig_val( - void *dm_void, - u32 *val_buf, - u8 val_len -); +u8 phydm_get_igi(void *dm_void, enum bb_path path); -void -odm_pause_dig( - void *dm_void, - enum phydm_pause_type pause_type, - enum phydm_pause_level pause_level, - u8 igi_value -); +void phydm_set_dig_val(void *dm_void, u32 *val_buf, u8 val_len); -void -phydm_dig_init( - void *dm_void -); +void odm_pause_dig(void *dm_void, enum phydm_pause_type pause_type, + enum phydm_pause_level pause_level, u8 igi_value); -void -phydm_dig( - void *dm_void -); +void phydm_dig_init(void *dm_void); -void -phydm_dig_lps_32k( - void *dm_void -); +void phydm_dig(void *dm_void); -void -phydm_dig_by_rssi_lps( - void *dm_void -); +void phydm_dig_lps_32k(void *dm_void); -void -odm_false_alarm_counter_statistics( - void *dm_void -); +void phydm_dig_by_rssi_lps(void *dm_void); + +void phydm_false_alarm_counter_statistics(void *dm_void); #ifdef PHYDM_TDMA_DIG_SUPPORT -void -phydm_set_tdma_dig_timer( - void *dm_void -); +void phydm_set_tdma_dig_timer(void *dm_void); -void -phydm_tdma_dig_timer_check( - void *dm_void -); +void phydm_tdma_dig_timer_check(void *dm_void); -void -phydm_tdma_dig( - void *dm_void -); +void phydm_tdma_dig(void *dm_void); -void -phydm_tdma_false_alarm_counter_check( - void *dm_void -); +void phydm_tdma_false_alarm_counter_check(void *dm_void); -void -phydm_tdma_dig_add_interrupt_mask_handler( - void *dm_void -); +void phydm_tdma_dig_add_interrupt_mask_handler(void *dm_void); -void -phydm_false_alarm_counter_reset( - void *dm_void -); +void phydm_false_alarm_counter_reset(void *dm_void); -void -phydm_false_alarm_counter_acc( - void *dm_void, - boolean rssi_dump_en - ); +void phydm_false_alarm_counter_acc(void *dm_void, boolean rssi_dump_en); -void -phydm_false_alarm_counter_acc_reset( - void *dm_void - ); +void phydm_false_alarm_counter_acc_reset(void *dm_void); -#endif /*#ifdef PHYDM_TDMA_DIG_SUPPORT*/ +void phydm_tdma_dig_para_upd(void *dm_void, enum upd_type type, u8 input); -void -phydm_set_ofdm_agc_tab( - void *dm_void, - u8 tab_sel -); +#ifdef IS_USE_NEW_TDMA +void phydm_tdma_dig_timers(void *dm_void, u8 state); -#ifdef PHYDM_LNA_SAT_CHK_SUPPORT -u8 -phydm_get_ofdm_agc_tab( - void *dm_void -); +void phydm_tdma_dig_cbk(void *dm_void); -void -phydm_lna_sat_chk( - void *dm_void -); +void phydm_tdma_dig_workitem_callback(void *dm_void); -void -phydm_lna_sat_chk_timers( - void *dm_void, - u8 state -); +void phydm_tdma_fa_cnt_chk(void *dm_void); -void -phydm_lna_sat_chk_watchdog( - void *dm_void -); +void phydm_tdma_low_dig(void *dm_void); -#endif /*#if (PHYDM_LNA_SAT_CHK_SUPPORT == 1)*/ +void phydm_tdma_high_dig(void *dm_void); + +void phydm_fa_cnt_acc(void *dm_void, boolean rssi_dump_en, + u8 cur_tdma_dig_state); +#endif /*@#ifdef IS_USE_NEW_TDMA*/ +#endif /*@#ifdef PHYDM_TDMA_DIG_SUPPORT*/ + +void phydm_set_ofdm_agc_tab(void *dm_void, u8 tab_sel); + +void phydm_dig_debug(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len); + +#ifdef CONFIG_MCC_DM +void phydm_mcc_igi_cal(void *dm_void); +#endif -void -phydm_dig_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); #endif diff --git a/hal/phydm/phydm_direct_bf.c b/hal/phydm/phydm_direct_bf.c new file mode 100644 index 0000000..3270c4d --- /dev/null +++ b/hal/phydm/phydm_direct_bf.c @@ -0,0 +1,310 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +/*@************************************************************ + * include files + ***************************************************************/ + +#include "mp_precomp.h" +#include "phydm_precomp.h" +#ifdef CONFIG_DIRECTIONAL_BF +#ifdef PHYDM_COMPILE_IC_2SS +void phydm_iq_gen_en(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + enum rf_path i = RF_PATH_A; + enum rf_path path = RF_PATH_A; + + #if (ODM_IC_11AC_SERIES_SUPPORT) + if (dm->support_ic_type & ODM_RTL8822B) { + for (i = RF_PATH_A; i <= RF_PATH_B; i++) { + /*RF mode table write enable*/ + odm_set_rf_reg(dm, path, RF_0xef, BIT(19), 0x1); + /*Select RX mode*/ + odm_set_rf_reg(dm, path, RF_0x33, 0xF, 3); + /*Set Table data*/ + odm_set_rf_reg(dm, path, RF_0x3e, 0xfffff, 0x00036); + /*Set Table data*/ + odm_set_rf_reg(dm, path, RF_0x3f, 0xfffff, 0x5AFCE); + /*RF mode table write disable*/ + odm_set_rf_reg(dm, path, RF_0xef, BIT(19), 0x0); + } + } + #endif + + #if (ODM_IC_11N_SERIES_SUPPORT) + if (dm->support_ic_type & ODM_RTL8192F) { + /*RF mode table write enable*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x1); + /* Path A */ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x08000); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0005f); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x01042); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0004f); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x71fc2); + /* Path B */ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x08000); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x00050); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x01042); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x00040); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x71fc2); + /*RF mode table write disable*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x0); + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x0); + } + #endif +} + +void phydm_dis_cdd(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + #if (ODM_IC_11AC_SERIES_SUPPORT) + if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + odm_set_bb_reg(dm, R_0x808, 0x3ffff00, 0); + odm_set_bb_reg(dm, R_0x9ac, 0x1fff, 0); + odm_set_bb_reg(dm, R_0x9ac, BIT(13), 1); + } + #endif + #if (ODM_IC_11N_SERIES_SUPPORT) + if (dm->support_ic_type & ODM_IC_11N_SERIES) { + odm_set_bb_reg(dm, R_0x90c, 0xffffffff, 0x83321333); + /* Set Tx delay setting for CCK pathA,B*/ + odm_set_bb_reg(dm, R_0xa2c, 0xf0000000, 0); + /*Enable Tx CDD for HT part when spatial expansion is applied*/ + odm_set_bb_reg(dm, R_0xd00, BIT(8), 0); + /* Tx CDD for Legacy*/ + odm_set_bb_reg(dm, R_0xd04, 0xf0000, 0); + /* Tx CDD for non-HT*/ + odm_set_bb_reg(dm, R_0xd0c, 0x3c0, 0); + /* Tx CDD for HT SS1*/ + odm_set_bb_reg(dm, R_0xd0c, 0xf8000, 0); + } + #endif +} + +void phydm_pathb_q_matrix_rotate_en(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + phydm_iq_gen_en(dm); + + /*#ifdef PHYDM_COMMON_API_SUPPORT*/ + /*path selection is controlled by driver*/ + #if 0 + if (!phydm_api_trx_mode(dm, BB_PATH_AB, BB_PATH_AB, BB_PATH_AB)) + return; + #endif + + phydm_dis_cdd(dm); + phydm_pathb_q_matrix_rotate(dm, 0); + + #if (ODM_IC_11AC_SERIES_SUPPORT) + if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + /*Set Q matrix r_v11 =1*/ + odm_set_bb_reg(dm, R_0x195c, MASKDWORD, 0x40000); + /*Set Q matrix enable*/ + odm_set_bb_reg(dm, R_0x191c, BIT(7), 1); + } + #endif +} + +void phydm_pathb_q_matrix_rotate(void *dm_void, u16 idx) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + #if (ODM_IC_11AC_SERIES_SUPPORT) + u32 phase_table_0[ANGLE_NUM] = {0x40000, 0x376CF, 0x20000, 0x00000, + 0xFE0000, 0xFC8930, 0xFC0000, + 0xFC8930, 0xFDFFFF, 0x000000, + 0x020000, 0x0376CF}; + u32 phase_table_1[ANGLE_NUM] = {0x00000, 0x1FFFF, 0x376CF, 0x40000, + 0x0376CF, 0x01FFFF, 0x000000, + 0xFDFFFF, 0xFC8930, 0xFC0000, + 0xFC8930, 0xFDFFFF}; + #endif + #if (ODM_IC_11N_SERIES_SUPPORT) + u32 phase_table_n_0[ANGLE_NUM] = {0x00, 0x0B, 0x02, 0x00, 0x02, 0x02, + 0x04, 0x02, 0x0D, 0x09, 0x04, 0x0B}; + u32 phase_table_n_1[ANGLE_NUM] = {0x40000100, 0x377F00DD, 0x201D8880, + 0x00000000, 0xE01D8B80, 0xC8BF0322, + 0xC000FF00, 0xC8BF0322, 0xDFE2777F, + 0xFFC003FF, 0x20227480, 0x377F00DD}; + u32 phase_table_n_2[ANGLE_NUM] = {0x00, 0x1E, 0x3C, 0x4C, 0x3C, 0x1E, + 0x0F, 0xD2, 0xC3, 0xC4, 0xC3, 0xD2}; + #endif + if (idx >= ANGLE_NUM) { + pr_debug("[%s]warning Phase Set Error: %d\n", __func__, idx); + return; + } + + switch (dm->ic_ip_series) { + #if (ODM_IC_11AC_SERIES_SUPPORT == 1) + case PHYDM_IC_AC: + /*Set Q matrix r_v21*/ + odm_set_bb_reg(dm, R_0x1954, 0xffffff, phase_table_0[idx]); + odm_set_bb_reg(dm, R_0x1950, 0xffffff, phase_table_1[idx]); + break; + #endif + + #if (ODM_IC_11N_SERIES_SUPPORT == 1) + case PHYDM_IC_N: + /*Set Q matrix r_v21*/ + odm_set_bb_reg(dm, R_0xc4c, 0xff000000, phase_table_n_0[idx]); + odm_set_bb_reg(dm, R_0xc88, 0xffffffff, phase_table_n_1[idx]); + odm_set_bb_reg(dm, R_0xc9c, 0xff000000, phase_table_n_2[idx]); + break; + #endif + + default: + break; + } +} + +/*Before use this API, Fill correct Tx Des. and Disable STBC in advance*/ +void phydm_set_direct_bfer(void *dm_void, u16 phs_idx, u8 su_idx) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; +#if (RTL8822B_SUPPORT) + if (dm->support_ic_type & ODM_RTL8822B) { +#if 0 + u8 phi[13] = {0x0, 0x5, 0xa, 0xf, 0x15, 0x1a, 0x1f, 0x25, + 0x2a, 0x2f, 0x35, 0x3a, 0x0}; + u8 psi[13] = {0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, + 0x7, 0x7, 0x7, 0x7}; + u16 psiphi[13] = {0x1c0, 0x1c5, 0x1ca, 0x1cf, 0x1d5, 0x1da, + 0x1df, 0x1e5, 0x1ea, 0x1ef, 0x1f5, 0x1fa, + 0x1c0}; //{Psi_4bit, Phi_6bit} of 0~360 +#endif + u16 ns[3] = {52, 108, 234}; //20/40/80 MHz subcarrier number + u16 psiphi[13] = {0x1c0, 0x1c5, 0x1ca, 0x1cf, 0x1d5, 0x1da, + 0x1df, 0x1e5, 0x1ea, 0x1ef, 0x1f5, 0x1fa, + 0x1c0}; //{Psi_4bit, Phi_6bit} of 0~360 + u16 psiphiR; + u8 i; + u8 snr = 0x12; // for 1SS BF + u8 nc = 0x0; //bit 2-0 + u8 nr = 0x1; //bit 5-3 + u8 ng = 0x0; //bit 7-6 + u8 cb = 0x1; //bit 9-8; 1 => phi:6, psi:4; + u32 bw = odm_get_bb_reg(dm, R_0x8ac, 0x3); //bit 11-10 + u8 userid = su_idx; //bit 12 + u32 csi_report = 0x0; + u32 ndp_bw = odm_get_bb_reg(dm, R_0x8ac, 0x3); //bit 11-10 + u8 ndp_sc = 0; //bit 11-10 + u32 ndp_info = 0x0; + + u16 mem_num = 0; + u8 mem_move = 0; + u8 mem_sel = 0; + u16 mem_addr = 0; + u32 dw0, dw1; + u64 vm_info = 0; + u64 temp = 0; + u8 vm_cnt = 0; + + mem_num = ((8 + (6 + 4) * ns[bw]) >> 6) + 1; // SU codebook 1 + + /* setting NDP BW/SC info*/ + ndp_info = (ndp_bw & 0x3) | (ndp_bw & 0x3) << 6 | + (ndp_bw & 0x3) << 12 | (ndp_sc & 0xf) << 2 | + (ndp_sc & 0xf) << 8 | (ndp_sc & 0xf) << 14; + odm_set_bb_reg(dm, R_0xb58, 0x000FFFFC, ndp_info); + odm_set_bb_reg(dm, R_0x19f8, 0x00010000, 1); + ODM_delay_ms(1); // delay 1ms + odm_set_bb_reg(dm, R_0x19f8, 0x00010000, 0); + + /* setting CSI report info*/ + csi_report = (userid & 0x1) << 12 | (bw & 0x3) << 10 | + (cb & 0x3) << 8 | (ng & 0x3) << 6 | + (nr & 0x7) << 3 | (nc & 0x7); + odm_set_bb_reg(dm, R_0x72c, 0x1FFF, csi_report); + odm_set_bb_reg(dm, R_0x71c, 0x80000000, 1); + PHYDM_DBG(dm, DBG_TXBF, "[%s] direct BF csi report 0x%x\n", + __func__, csi_report); + /*========================*/ + + odm_set_bb_reg(dm, R_0x19b8, 0x40, 1); //0x19b8[6]:1 to csi_rpt + odm_set_bb_reg(dm, R_0x19e0, 0x3FC0, 0xFF); //gated_clk off + odm_set_bb_reg(dm, R_0x9e8, 0x2000000, 1); //abnormal txbf + odm_set_bb_reg(dm, R_0x9e8, 0x1000000, 0); //read phi psi + odm_set_bb_reg(dm, R_0x9e8, 0x70000000, su_idx); //SU user 0 + odm_set_bb_reg(dm, R_0x1910, 0x8000, 0); //BFer + + dw0 = 0; // for 0x9ec + dw1 = 0; // for 0x1900 + mem_addr = 0; + mem_sel = 0; + mem_move = 0; + vm_info = vm_info | (snr & 0xff); //V matrix info + vm_cnt = 8; // V matrix length counter + psiphiR = (psiphi[phs_idx] & 0x3ff); + + while (mem_addr < mem_num) { + while (vm_cnt <= 32) { + // shift only max. 32 bit + if (vm_cnt >= 20) { + temp = psiphiR << 20; + temp = temp << (vm_cnt - 20); + } else { + temp = psiphiR << vm_cnt; + } + vm_info |= temp; + vm_cnt += 10; + } + if (mem_sel == 0) { + dw0 = vm_info & 0xffffffff; + vm_info = vm_info >> 32; + vm_cnt -= 32; + mem_sel = 1; + mem_move = 0; + } else { + dw1 = vm_info & 0xffffffff; + vm_info = vm_info >> 32; + vm_cnt -= 32; + mem_sel = 0; + mem_move = 1; + } + if (mem_move == 1) { + odm_set_bb_reg(dm, 0x9e8, 0x1000000, 0); + //read phi psi + odm_set_bb_reg(dm, 0x1910, 0x3FF0000, + mem_addr); + odm_set_bb_reg(dm, 0x09ec, 0xFFFFFFFF, dw0); + odm_set_bb_reg(dm, 0x1900, 0xFFFFFFFF, dw1); + odm_set_bb_reg(dm, 0x9e8, 0x1000000, 1); + //write phi psi + mem_move = 0; + mem_addr += 1; + } + } + odm_set_bb_reg(dm, 0x9e8, 0x2000000, 0); //normal txbf + } +#endif +} //end function +#endif +#endif diff --git a/hal/phydm/phydm_direct_bf.h b/hal/phydm/phydm_direct_bf.h new file mode 100644 index 0000000..8d35022 --- /dev/null +++ b/hal/phydm/phydm_direct_bf.h @@ -0,0 +1,42 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +#ifndef __PHYDM_DIR_BF_H__ +#define __PHYDM_DIR_BF_H__ + +#ifdef CONFIG_DIRECTIONAL_BF +#define ANGLE_NUM 12 + +/*@ + * ============================================================ + * function prototype + * ============================================================ + */ +void phydm_iq_gen_en(void *dm_void); +void phydm_dis_cdd(void *dm_void); +void phydm_pathb_q_matrix_rotate_en(void *dm_void); +void phydm_pathb_q_matrix_rotate(void *dm_void, u16 idx); +#endif +#endif diff --git a/hal/phydm/phydm_dynamic_rx_path.c b/hal/phydm/phydm_dynamic_rx_path.c deleted file mode 100644 index b5b90b0..0000000 --- a/hal/phydm/phydm_dynamic_rx_path.c +++ /dev/null @@ -1,352 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ - -/* ************************************************************ - * include files - * ************************************************************ */ -#include "mp_precomp.h" -#include "phydm_precomp.h" - -#ifdef CONFIG_DYNAMIC_RX_PATH - -void -phydm_process_phy_status_for_dynamic_rx_path( - void *dm_void, - void *phy_info_void, - void *pkt_info_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_phyinfo_struct *phy_info = (struct phydm_phyinfo_struct *)phy_info_void; - struct phydm_perpkt_info_struct *pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; - struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table); -} - -void -phydm_drp_get_statistic( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table); - struct phydm_fa_struct *false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(dm, PHYDM_FALSEALMCNT); - - odm_false_alarm_counter_statistics(dm); - - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", - false_alm_cnt->cnt_cck_cca, false_alm_cnt->cnt_ofdm_cca, false_alm_cnt->cnt_cca_all); - - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", - false_alm_cnt->cnt_cck_fail, false_alm_cnt->cnt_ofdm_fail, false_alm_cnt->cnt_all); -} - -void -phydm_dynamic_rx_path( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table); - u8 training_set_timmer_en; - u8 curr_drp_state; - u32 rx_ok_cal; - u32 RSSI = 0; - struct phydm_fa_struct *false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(dm, PHYDM_FALSEALMCNT); - - if (!(dm->support_ability & ODM_BB_DYNAMIC_RX_PATH)) { - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[Return Init] Not Support Dynamic RX PAth\n"); - return; - } - - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "Current drp_state = ((%d))\n", p_dm_drp_table->drp_state); - - curr_drp_state = p_dm_drp_table->drp_state; - - if (p_dm_drp_table->drp_state == DRP_INIT_STATE) { - - phydm_drp_get_statistic(dm); - - if (false_alm_cnt->cnt_crc32_ok_all > 20) { /*Signal + Interference*/ - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[Stop DRP Training] cnt_crc32_ok_all = ((%d))\n", false_alm_cnt->cnt_crc32_ok_all); - p_dm_drp_table->drp_state = DRP_INIT_STATE; - training_set_timmer_en = false; - } else {/*Interference only*/ - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[Start DRP Training] cnt_crc32_ok_all = ((%d))\n", false_alm_cnt->cnt_crc32_ok_all); - p_dm_drp_table->drp_state = DRP_TRAINING_STATE_0; - p_dm_drp_table->curr_rx_path = BB_PATH_AB; - training_set_timmer_en = true; - } - - } else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_0) { - - phydm_drp_get_statistic(dm); - - p_dm_drp_table->curr_cca_all_cnt_0 = false_alm_cnt->cnt_cca_all; - p_dm_drp_table->curr_fa_all_cnt_0 = false_alm_cnt->cnt_all; - - p_dm_drp_table->drp_state = DRP_TRAINING_STATE_1; - p_dm_drp_table->curr_rx_path = BB_PATH_B; - training_set_timmer_en = true; - - } else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_1) { - - phydm_drp_get_statistic(dm); - - p_dm_drp_table->curr_cca_all_cnt_1 = false_alm_cnt->cnt_cca_all; - p_dm_drp_table->curr_fa_all_cnt_1 = false_alm_cnt->cnt_all; - -#if 1 - p_dm_drp_table->drp_state = DRP_DECISION_STATE; -#else - - if (*(dm->mp_mode)) { - rx_ok_cal = dm->phy_dbg_info.num_qry_phy_status_cck + dm->phy_dbg_info.num_qry_phy_status_ofdm; - RSSI = (rx_ok_cal != 0) ? dm->rx_pwdb_ave / rx_ok_cal : 0; - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "MP RSSI = ((%d))\n", RSSI); - } - - if (RSSI > p_dm_drp_table->rssi_threshold) - - p_dm_drp_table->drp_state = DRP_DECISION_STATE; - - else { - - p_dm_drp_table->drp_state = DRP_TRAINING_STATE_2; - p_dm_drp_table->curr_rx_path = BB_PATH_A; - training_set_timmer_en = true; - } -#endif - } else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_2) { - - phydm_drp_get_statistic(dm); - - p_dm_drp_table->curr_cca_all_cnt_2 = false_alm_cnt->cnt_cca_all; - p_dm_drp_table->curr_fa_all_cnt_2 = false_alm_cnt->cnt_all; - p_dm_drp_table->drp_state = DRP_DECISION_STATE; - } - - if (p_dm_drp_table->drp_state == DRP_DECISION_STATE) { - - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "Current drp_state = ((%d))\n", p_dm_drp_table->drp_state); - - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[0] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_0, p_dm_drp_table->curr_fa_all_cnt_0); - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[1] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_1, p_dm_drp_table->curr_fa_all_cnt_1); - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[2] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_2, p_dm_drp_table->curr_fa_all_cnt_2); - - if (p_dm_drp_table->curr_fa_all_cnt_1 < p_dm_drp_table->curr_fa_all_cnt_0) { - - if ((p_dm_drp_table->curr_fa_all_cnt_0 - p_dm_drp_table->curr_fa_all_cnt_1) > p_dm_drp_table->fa_diff_threshold) - p_dm_drp_table->curr_rx_path = BB_PATH_B; - else - p_dm_drp_table->curr_rx_path = BB_PATH_AB; - } else - p_dm_drp_table->curr_rx_path = BB_PATH_AB; - - phydm_config_ofdm_rx_path(dm, p_dm_drp_table->curr_rx_path); - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[Training Result] curr_rx_path = ((%s%s)),\n", - ((p_dm_drp_table->curr_rx_path & BB_PATH_A) ? "A" : " "), ((p_dm_drp_table->curr_rx_path & BB_PATH_B) ? "B" : " ")); - - p_dm_drp_table->drp_state = DRP_INIT_STATE; - training_set_timmer_en = false; - } - - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "DRP_state: ((%d)) -> ((%d))\n", curr_drp_state, p_dm_drp_table->drp_state); - - if (training_set_timmer_en) { - - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[Training en] curr_rx_path = ((%s%s)), training_time = ((%d ms))\n", - ((p_dm_drp_table->curr_rx_path & BB_PATH_A) ? "A" : " "), ((p_dm_drp_table->curr_rx_path & BB_PATH_B) ? "B" : " "), p_dm_drp_table->training_time); - - phydm_config_ofdm_rx_path(dm, p_dm_drp_table->curr_rx_path); - odm_set_timer(dm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer), p_dm_drp_table->training_time); /*ms*/ - } else - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "DRP period end\n\n", curr_drp_state, p_dm_drp_table->drp_state); - -} - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -phydm_dynamic_rx_path_callback( - struct phydm_timer_list *timer -) -{ - void *adapter = (void *)timer->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &(hal_data->DM_OutSrc); - struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table); - -#if DEV_BUS_TYPE == RT_PCI_INTERFACE -#if USE_WORKITEM - odm_schedule_work_item(&(p_dm_drp_table->phydm_dynamic_rx_path_workitem)); -#else - { - /* dbg_print("phydm_dynamic_rx_path\n"); */ - phydm_dynamic_rx_path(dm); - } -#endif -#else - odm_schedule_work_item(&(p_dm_drp_table->phydm_dynamic_rx_path_workitem)); -#endif -} - -void -phydm_dynamic_rx_path_workitem_callback( - void *context -) -{ - void *adapter = (void *)context; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &(hal_data->DM_OutSrc); - - /* dbg_print("phydm_dynamic_rx_path\n"); */ - phydm_dynamic_rx_path(dm); -} -#else if (DM_ODM_SUPPORT_TYPE == ODM_CE) - -void -phydm_dynamic_rx_path_callback( - void *function_context -) -{ - struct dm_struct *dm = (struct dm_struct *)function_context; - void *padapter = dm->adapter; - - if (*(dm->is_net_closed) == true) - return; - -#if 0 /* Can't do I/O in timer callback*/ - odm_s0s1_sw_ant_div(dm, SWAW_STEP_DETERMINE); -#else - /*rtw_run_in_thread_cmd(padapter, odm_sw_antdiv_workitem_callback, padapter);*/ -#endif -} - -#endif - -void -phydm_dynamic_rx_path_timers( - void *dm_void, - u8 state -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table); - - if (state == INIT_DRP_TIMMER) { - - odm_initialize_timer(dm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer), - (void *)phydm_dynamic_rx_path_callback, NULL, "phydm_sw_antenna_switch_timer"); - } else if (state == CANCEL_DRP_TIMMER) - - odm_cancel_timer(dm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer)); - - else if (state == RELEASE_DRP_TIMMER) - - odm_release_timer(dm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer)); - -} - -void -phydm_dynamic_rx_path_init( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table); - boolean ret_value; - - if (!(dm->support_ability & ODM_BB_DYNAMIC_RX_PATH)) { - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[Return] Not Support Dynamic RX PAth\n"); - return; - } - PHYDM_DBG(dm, DBG_DYN_RX_PATH, "phydm_dynamic_rx_path_init\n"); - - p_dm_drp_table->drp_state = DRP_INIT_STATE; - p_dm_drp_table->rssi_threshold = DRP_RSSI_TH; - p_dm_drp_table->fa_count_thresold = 50; - p_dm_drp_table->fa_diff_threshold = 50; - p_dm_drp_table->training_time = 100; /*ms*/ - p_dm_drp_table->drp_skip_counter = 0; - p_dm_drp_table->drp_period = 0; - p_dm_drp_table->drp_init_finished = true; - - ret_value = phydm_api_trx_mode(dm, (enum bb_path)BB_PATH_AB, (enum bb_path)BB_PATH_AB, true); - -} - -void -phydm_drp_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 used = *_used; - u32 out_len = *_out_len; - struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table); - - switch (dm_value[0]) { - - case DRP_TRAINING_TIME: - p_dm_drp_table->training_time = (u16)dm_value[1]; - break; - case DRP_TRAINING_PERIOD: - p_dm_drp_table->drp_period = (u8)dm_value[1]; - break; - case DRP_RSSI_THRESHOLD: - p_dm_drp_table->rssi_threshold = (u8)dm_value[1]; - break; - case DRP_FA_THRESHOLD: - p_dm_drp_table->fa_count_thresold = dm_value[1]; - break; - case DRP_FA_DIFF_THRESHOLD: - p_dm_drp_table->fa_diff_threshold = dm_value[1]; - break; - default: - PDM_SNPF(out_len, used, output + used, out_len - used, - "[DRP] unknown command\n"); - break; - } - - *_used = used; - *_out_len = out_len; -} - -void -phydm_dynamic_rx_path_caller( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table); - - if (p_dm_drp_table->drp_skip_counter < p_dm_drp_table->drp_period) - p_dm_drp_table->drp_skip_counter++; - else - p_dm_drp_table->drp_skip_counter = 0; - - if (p_dm_drp_table->drp_skip_counter != 0) - return; - - if (p_dm_drp_table->drp_init_finished != true) - return; - - phydm_dynamic_rx_path(dm); - -} -#endif diff --git a/hal/phydm/phydm_dynamic_rx_path.h b/hal/phydm/phydm_dynamic_rx_path.h deleted file mode 100644 index 4d0b142..0000000 --- a/hal/phydm/phydm_dynamic_rx_path.h +++ /dev/null @@ -1,151 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * The full GNU General Public License is included in this distribution in the - * file called LICENSE. - * - * Contact Information: - * wlanfae - * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, - * Hsinchu 300, Taiwan. - * - * Larry Finger - * - *****************************************************************************/ - -#ifndef __PHYDMDYMICRXPATH_H__ -#define __PHYDMDYMICRXPATH_H__ - -#define DYNAMIC_RX_PATH_VERSION "1.0" /*2016.07.15 Dino */ - - -#define DRP_RSSI_TH 35 - -#define INIT_DRP_TIMMER 0 -#define CANCEL_DRP_TIMMER 1 -#define RELEASE_DRP_TIMMER 2 - -#if (RTL8822B_SUPPORT == 1) -struct drp_rtl8822b_struct { - enum bb_path path_judge; - u16 path_a_cck_fa; - u16 path_b_cck_fa; - -}; -#endif - -#ifdef CONFIG_DYNAMIC_RX_PATH - -enum drp_state { - DRP_INIT_STATE = 0, - DRP_TRAINING_STATE_0 = 1, - DRP_TRAINING_STATE_1 = 2, - DRP_TRAINING_STATE_2 = 3, - DRP_DECISION_STATE = 4 -}; - -enum adjustable_value { - DRP_TRAINING_TIME = 0, - DRP_TRAINING_PERIOD = 1, - DRP_RSSI_THRESHOLD = 2, - DRP_FA_THRESHOLD = 3, - DRP_FA_DIFF_THRESHOLD = 4 -}; - -struct _DYNAMIC_RX_PATH_ { - u8 curr_rx_path; - u8 drp_state; - u16 training_time; - u8 rssi_threshold; - u32 fa_count_thresold; - u32 fa_diff_threshold; - u32 curr_cca_all_cnt_0; - u32 curr_fa_all_cnt_0; - u32 curr_cca_all_cnt_1; - u32 curr_fa_all_cnt_1; - u32 curr_cca_all_cnt_2; - u32 curr_fa_all_cnt_2; - u8 drp_skip_counter; - u8 drp_period; - u8 drp_init_finished; - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -#if USE_WORKITEM - RT_WORK_ITEM phydm_dynamic_rx_path_workitem; -#endif -#endif - struct phydm_timer_list phydm_dynamic_rx_path_timer; - -}; - - - -void -phydm_process_phy_status_for_dynamic_rx_path( - void *dm_void, - void *phy_info_void, - void *pkt_info_void -); - -void -phydm_dynamic_rx_path( - void *dm_void -); - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -phydm_dynamic_rx_path_callback( - struct phydm_timer_list *timer -); - -void -phydm_dynamic_rx_path_workitem_callback( - void *context -); - -#else if (DM_ODM_SUPPORT_TYPE == ODM_CE) - -void -phydm_dynamic_rx_path_callback( - void *function_context -); - -#endif - -void -phydm_dynamic_rx_path_timers( - void *dm_void, - u8 state -); - -void -phydm_dynamic_rx_path_init( - void *dm_void -); - -void -phydm_drp_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -); - -void -phydm_dynamic_rx_path_caller( - void *dm_void -); - -#endif -#endif diff --git a/hal/phydm/phydm_dynamictxpower.c b/hal/phydm/phydm_dynamictxpower.c index 1b68fc6..eb6bb94 100644 --- a/hal/phydm/phydm_dynamictxpower.c +++ b/hal/phydm/phydm_dynamictxpower.c @@ -23,107 +23,120 @@ * *****************************************************************************/ -/* ************************************************************ +/************************************************************* * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" -/* *********************Power training init************************ */ -void phydm_pow_train_init( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter = dm->adapter; - PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); - /* This is for power training init @ 11N serious */ - #if DEV_BUS_TYPE == RT_USB_INTERFACE - if (RT_GetInterfaceSelection((PADAPTER)adapter) == INTF_SEL1_USB_High_Power) { - odm_dynamic_tx_power_save_power_index(dm); - } - #else - - /* so 92c pci do not need dynamic tx power? vivi check it later */ - #endif -#endif - -} - -void -odm_dynamic_tx_power_save_power_index( - void *dm_void -) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 index; - u32 power_index_reg[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - /* Save PT index, but nothing used?? */ - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); - for (index = 0; index < 6; index++) - hal_data->PowerIndex_backup[index] = PlatformEFIORead1Byte((PADAPTER)adapter, power_index_reg[index]); - - -#endif -#endif -} - -void -odm_dynamic_tx_power_restore_power_index( - void *dm_void -) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 index; - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); - u32 power_index_reg[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; - - for (index = 0; index < 6; index++) - PlatformEFIOWrite1Byte(adapter, power_index_reg[index], hal_data->PowerIndex_backup[index]); - - - -#endif -} - -void -odm_dynamic_tx_power_write_power_index( - void *dm_void, - u8 value) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 index; - u32 power_index_reg[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; - - for (index = 0; index < 6; index++) - /* platform_efio_write_1byte(adapter, power_index_reg[index], value); */ - odm_write_1byte(dm, power_index_reg[index], value); - -} - -/* ************************************************************ */ - #ifdef CONFIG_DYNAMIC_TX_TWR -boolean -phydm_check_rates( - void *dm_void, - u8 rate_idx -) +#ifdef BB_RAM_SUPPORT + +void +phdm_2ndtype_rd_ram_pwr(void *dm_void, u8 macid) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 check_rate_bitmap0 = 0x08080808; /* check CCK11M, OFDM54M, MCS7, MCS15*/ - u32 check_rate_bitmap1 = 0x80200808; /* check MCS23, MCS31, VHT1SS M9, VHT2SS M9*/ - u32 check_rate_bitmap2 = 0x00080200; /* check VHT3SS M9, VHT4SS M9*/ - u32 bitmap_result; +}; + +void +phdm_2ndtype_wt_ram_pwr(void *dm_void, u8 macid, boolean pwr_offset0_en, + boolean pwr_offset1_en, s8 pwr_offset0, s8 pwr_offset1) +{ + u32 reg_io_0x1e84 = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_bb_ram_per_sta *dm_ram_per_sta = NULL; + dm_ram_per_sta = &dm->p_bb_ram_ctrl.pram_sta_ctrl[macid]; + dm_ram_per_sta->tx_pwr_offset0_en = pwr_offset0_en; + dm_ram_per_sta->tx_pwr_offset1_en = pwr_offset1_en; + dm_ram_per_sta->tx_pwr_offset0 = pwr_offset0; + dm_ram_per_sta->tx_pwr_offset1 = pwr_offset1; + reg_io_0x1e84 = (dm_ram_per_sta->hw_igi_en<<7) + dm_ram_per_sta->hw_igi; + reg_io_0x1e84 |= (pwr_offset0_en<<15) + ((pwr_offset0&0x7f)<<8); + reg_io_0x1e84 |= (pwr_offset1_en<<23) + ((pwr_offset1&0x7f)<<16); + reg_io_0x1e84 |= (macid&0x3f)<<24; + reg_io_0x1e84 |= BIT(30); + odm_set_bb_reg(dm, 0x1e84, 0xffffffff, reg_io_0x1e84); +}; + +u8 phydm_pwr_lv_mapping_2ndtype(u8 tx_pwr_lv) +{ + if (tx_pwr_lv == tx_high_pwr_level_level3) + /*PHYDM_2ND_OFFSET_MINUS_11DB;*/ + return PHYDM_2ND_OFFSET_MINUS_7DB; + else if (tx_pwr_lv == tx_high_pwr_level_level2) + return PHYDM_2ND_OFFSET_MINUS_7DB; + else if (tx_pwr_lv == tx_high_pwr_level_level1) + return PHYDM_2ND_OFFSET_MINUS_3DB; + else + return PHYDM_2ND_OFFSET_ZERO; +} + +#if CONFIG_PHY_CTRL_PWR +void phydm_pwr_lv_ctrl(void *dm_void, u8 macid, u8 tx_pwr_lv) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + s8 pwr_offset; + + if (tx_pwr_lv == tx_high_pwr_level_level3) + pwr_offset = PHYDM_BBRAM_OFFSET_MINUS_11DB; + else if (tx_pwr_lv == tx_high_pwr_level_level2) + pwr_offset = PHYDM_BBRAM_OFFSET_MINUS_7DB; + else if (tx_pwr_lv == tx_high_pwr_level_level1) + pwr_offset = PHYDM_BBRAM_OFFSET_MINUS_3DB; + else + pwr_offset = PHYDM_BBRAM_OFFSET_ZERO; + phdm_2ndtype_wt_ram_pwr(dm, macid, false, true, 0, pwr_offset); + odm_set_mac_reg(dm, ODM_REG_RESP_TX_11AC, BIT(19) | BIT(18), 1); +} +#endif + +void phydm_dtp_fill_cmninfo_2ndtype(void *dm_void, u8 macid, u8 dtp_lvl) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dtp_info *dtp = NULL; + + dtp = &dm->phydm_sta_info[macid]->dtp_stat; + if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR)) + return; + #if CONFIG_PHY_CTRL_PWR + dtp->dyn_tx_power = 1; + #else + dtp->dyn_tx_power = phydm_pwr_lv_mapping_2ndtype(dtp_lvl); + #endif + PHYDM_DBG(dm, DBG_DYN_TXPWR, + "Fill cmninfo TxPwr: macid=(%d), PwrLv (%d)\n", macid, + dtp->dyn_tx_power); + /* dyn_tx_power is 2 bit at 8822C/14B/98F/12F*/ +} + +void +phydm_2ndtype_dtp_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 pwr_offset_minus3, pwr_offset_minus7; + u8 i; + + #if 0 + /*@ 2's com, for offset 3dB and 7dB, which 1 step will be 1dB*/ + pwr_offset_minus3 = 0x0; + pwr_offset_minus7 = 0x0; + odm_set_bb_reg(dm, 0x1e70, 0x00ff0000, pwr_offset_minus3); + odm_set_bb_reg(dm, 0x1e70, 0xff000000, pwr_offset_minus7); + for (i = 0; i <= 63; i++) + phdm_2ndtype_wt_ram_pwr(dm, i, false, false, 0, 0); + #endif +}; + +#endif + +boolean +phydm_check_rates(void *dm_void, u8 rate_idx) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 check_rate_bitmap0 = 0x08080808; /* @check CCK11M, OFDM54M, MCS7, MCS15*/ + u32 check_rate_bitmap1 = 0x80200808; /* @check MCS23, MCS31, VHT1SS M9, VHT2SS M9*/ + u32 check_rate_bitmap2 = 0x00080200; /* @check VHT3SS M9, VHT4SS M9*/ + u32 bitmap_result; #if (RTL8822B_SUPPORT == 1) if (dm->support_ic_type & ODM_RTL8822B) { @@ -133,7 +146,6 @@ phydm_check_rates( } #endif - #if (RTL8197F_SUPPORT == 1) if (dm->support_ic_type & ODM_RTL8197F) { check_rate_bitmap2 &= 0; @@ -142,6 +154,29 @@ phydm_check_rates( } #endif +#if (RTL8192E_SUPPORT == 1) + if (dm->support_ic_type & ODM_RTL8192E) { + check_rate_bitmap2 &= 0; + check_rate_bitmap1 &= 0; + check_rate_bitmap0 &= 0x0fffffff; + } +#endif + +/*@jj add 20170822*/ +#if (RTL8192F_SUPPORT == 1) + if (dm->support_ic_type & ODM_RTL8192F) { + check_rate_bitmap2 &= 0; + check_rate_bitmap1 &= 0; + check_rate_bitmap0 &= 0x0fffffff; + } +#endif +#if (RTL8721D_SUPPORT == 1) + if (dm->support_ic_type & ODM_RTL8721D) { + check_rate_bitmap2 &= 0; + check_rate_bitmap1 &= 0; + check_rate_bitmap0 &= 0x000fffff; + } +#endif #if (RTL8821C_SUPPORT == 1) if (dm->support_ic_type & ODM_RTL8821C) { check_rate_bitmap2 &= 0; @@ -150,554 +185,304 @@ phydm_check_rates( } #endif - if (rate_idx >= 64) - bitmap_result = BIT(rate_idx-64) & check_rate_bitmap2; + bitmap_result = BIT(rate_idx - 64) & check_rate_bitmap2; else if (rate_idx >= 32) - bitmap_result = BIT(rate_idx-32) & check_rate_bitmap1; + bitmap_result = BIT(rate_idx - 32) & check_rate_bitmap1; else if (rate_idx <= 31) bitmap_result = BIT(rate_idx) & check_rate_bitmap0; - if (bitmap_result!=0) + if (bitmap_result != 0) return true; else return false; } enum rf_path -phydm_check_paths( - void *dm_void -) +phydm_check_paths(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - enum rf_path max_path; -#if (RTL8822B_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8822B) - max_path = RF_PATH_B; -#endif + struct dm_struct *dm = (struct dm_struct *)dm_void; + enum rf_path max_path = RF_PATH_A; - -#if (RTL8197F_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8197F) - max_path = RF_PATH_B; -#endif - -#if (RTL8821C_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8821C) + if (dm->num_rf_path == 1) max_path = RF_PATH_A; -#endif + if (dm->num_rf_path == 2) + max_path = RF_PATH_B; + if (dm->num_rf_path == 3) + max_path = RF_PATH_C; + if (dm->num_rf_path == 4) + max_path = RF_PATH_D; + return max_path; } -u8 -phydm_search_min_power_index( - void *dm_void -) +#ifndef PHYDM_COMMON_API_SUPPORT +u8 phydm_dtp_get_txagc(void *dm_void, enum rf_path path, u8 hw_rate) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - enum rf_path path; - enum rf_path max_path; - u8 min_gain_index = 0x3f; - u8 gain_index; - u8 rate_idx; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 ret = 0xff; - PHYDM_DBG(dm, DBG_DYN_TXPWR, "phydm_search_min_power_index\n"); +#if (RTL8192E_SUPPORT == 1) + ret = config_phydm_read_txagc_n(dm, path, hw_rate); +#endif + return ret; +} +#endif + +u8 phydm_search_min_power_index(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + enum rf_path path; + enum rf_path max_path; + u8 min_gain_index = 0x3f; + u8 gain_index; + u8 rate_idx; + + PHYDM_DBG(dm, DBG_DYN_TXPWR, "%s\n", __func__); max_path = phydm_check_paths(dm); for (path = 0; path <= max_path; path++) for (rate_idx = 0; rate_idx < 84; rate_idx++) if (phydm_check_rates(dm, rate_idx)) { +#ifdef PHYDM_COMMON_API_SUPPORT + /*This is for API support IC : 97F,8822B,92F,8821C*/ gain_index = phydm_api_get_txagc(dm, path, rate_idx); - PHYDM_DBG(dm, DBG_DYN_TXPWR, "Support Rate: ((%d)) -> Gain index: ((%d))\n", rate_idx, gain_index); +#else + /*This is for API non-support IC : 92E */ + gain_index = phydm_dtp_get_txagc(dm, path, rate_idx); +#endif + if (gain_index == 0xff) { + min_gain_index = 0x20; + PHYDM_DBG(dm, DBG_DYN_TXPWR, + "Error Gain idx!! Rewite to: ((%d))\n", min_gain_index); + break; + } + PHYDM_DBG(dm, DBG_DYN_TXPWR, + "Support Rate: ((%d)) -> Gain idx: ((%d))\n", + rate_idx, gain_index); if (gain_index < min_gain_index) min_gain_index = gain_index; } - + return min_gain_index; } - -void -phydm_dynamic_tx_power_init( - void *dm_void -) +void phydm_dynamic_tx_power_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i; dm->last_dtp_lvl = tx_high_pwr_level_normal; dm->dynamic_tx_high_power_lvl = tx_high_pwr_level_normal; + for (i = 0; i < 3; i++) { + dm->enhance_pwr_th[i] = 0xff; + } + dm->set_pwr_th[0] = TX_POWER_NEAR_FIELD_THRESH_LVL1; + dm->set_pwr_th[1] = TX_POWER_NEAR_FIELD_THRESH_LVL2; + dm->set_pwr_th[2] = 0xff; dm->min_power_index = phydm_search_min_power_index(dm); - PHYDM_DBG(dm, DBG_DYN_TXPWR, "DTP init: Min Gain index: ((%d))\n", dm->min_power_index); + PHYDM_DBG(dm, DBG_DYN_TXPWR, "DTP init: Min Gain idx: ((%d))\n", + dm->min_power_index); + #ifdef BB_RAM_SUPPORT + phydm_2ndtype_dtp_init(dm); + #endif } -u8 -phydm_pwr_lvl_check( - void *dm_void, - u8 input_rssi -) +void phydm_noisy_enhance_hp_th(void *dm_void, u8 noisy_state) { - if (input_rssi >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { + struct dm_struct *dm = (struct dm_struct *)dm_void; + if (noisy_state == 0) { + dm->enhance_pwr_th[0] = dm->set_pwr_th[0]; + dm->enhance_pwr_th[1] = dm->set_pwr_th[1]; + dm->enhance_pwr_th[2] = dm->set_pwr_th[2]; + } else { + dm->enhance_pwr_th[0] = dm->set_pwr_th[0] + 8; + dm->enhance_pwr_th[1] = dm->set_pwr_th[1] + 5; + dm->enhance_pwr_th[2] = dm->set_pwr_th[2]; + } + PHYDM_DBG(dm, DBG_DYN_TXPWR, + "DTP hp_th: Lv1_th =%d ,Lv2_th = %d ,Lv3_th = %d\n", + dm->enhance_pwr_th[0], dm->enhance_pwr_th[1], + dm->enhance_pwr_th[2]); +} + +u8 phydm_pwr_lvl_check(void *dm_void, u8 input_rssi) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 th0,th1,th2; + th2 = dm->enhance_pwr_th[2]; + th1 = dm->enhance_pwr_th[1]; + th0 = dm->enhance_pwr_th[0]; + if (input_rssi >= th2) + return tx_high_pwr_level_level3; + else if (input_rssi < (th2 - 3) && input_rssi >= th1) return tx_high_pwr_level_level2; - /**/ - } else if (input_rssi >= TX_POWER_NEAR_FIELD_THRESH_LVL1) { + else if (input_rssi < (th1 - 3) && input_rssi >= th0) return tx_high_pwr_level_level1; - /**/ - } else if (input_rssi < (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) { + else if (input_rssi < (th0 - 3)) return tx_high_pwr_level_normal; - /**/ - } - else { - return tx_high_pwr_level_normal; - } + else + return tx_high_pwr_level_unchange; } -void -phydm_dynamic_response_power( - void *dm_void -) +u8 phydm_pwr_lv_mapping(u8 tx_pwr_lv) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 now_pwr_lvl; + if (tx_pwr_lv == tx_high_pwr_level_level3) + return PHYDM_OFFSET_MINUS_11DB; + else if (tx_pwr_lv == tx_high_pwr_level_level2) + return PHYDM_OFFSET_MINUS_7DB; + else if (tx_pwr_lv == tx_high_pwr_level_level1) + return PHYDM_OFFSET_MINUS_3DB; + else + return PHYDM_OFFSET_ZERO; +} + +void phydm_dynamic_response_power(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 rpwr; + +#if CONFIG_PHY_CTRL_PWR + return; +#endif if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR)) return; - if (dm->last_dtp_lvl != dm->dynamic_tx_high_power_lvl) { - PHYDM_DBG(dm, DBG_DYN_TXPWR, "Response Power update_DTP_lv: ((%d)) -> ((%d))\n", dm->last_dtp_lvl, dm->dynamic_tx_high_power_lvl); - dm->last_dtp_lvl = dm->dynamic_tx_high_power_lvl; - now_pwr_lvl = dm->dynamic_tx_high_power_lvl; - if (now_pwr_lvl == tx_high_pwr_level_level2 || now_pwr_lvl == tx_high_pwr_level_level1) { - odm_set_mac_reg(dm, 0x6D8, BIT(20) | BIT(19) | BIT(18), 1); /* Resp TXAGC offset = -3dB*/ - PHYDM_DBG(dm, DBG_DYN_TXPWR, "Response Power Set TX power: level 1\n"); - } else if (now_pwr_lvl == tx_high_pwr_level_normal) { - odm_set_mac_reg(dm, 0x6D8, BIT(20) | BIT(19) | BIT(18), 0); /* Resp TXAGC offset = 0dB*/ - PHYDM_DBG(dm, DBG_DYN_TXPWR, "Response Power Set TX power: normal\n"); - } + if (dm->dynamic_tx_high_power_lvl == tx_high_pwr_level_unchange) { + dm->dynamic_tx_high_power_lvl = dm->last_dtp_lvl; + PHYDM_DBG(dm, DBG_DYN_TXPWR, "RespPwr not change\n"); + return; } + PHYDM_DBG(dm, DBG_DYN_TXPWR, + "RespPwr update_DTP_lv: ((%d)) -> ((%d))\n", dm->last_dtp_lvl, + dm->dynamic_tx_high_power_lvl); + dm->last_dtp_lvl = dm->dynamic_tx_high_power_lvl; + rpwr = phydm_pwr_lv_mapping(dm->dynamic_tx_high_power_lvl); + odm_set_mac_reg(dm, ODM_REG_RESP_TX_11AC, BIT(20) | BIT(19) | BIT(18), rpwr); + PHYDM_DBG(dm, DBG_DYN_TXPWR, "RespPwr Set TxPwr: Lv (%d)\n", + dm->dynamic_tx_high_power_lvl); } -void -phydm_dtp_fill_cmninfo( - void *dm_void, - u8 macid, - u8 dtp_lvl -) +void phydm_dtp_fill_cmninfo(void *dm_void, u8 macid, u8 dtp_lvl) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct dtp_info *dtp= NULL; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dtp_info *dtp = NULL; dtp = &dm->phydm_sta_info[macid]->dtp_stat; if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR)) return; - if (dtp_lvl == tx_high_pwr_level_level2) - dtp->dyn_tx_power = PHYDM_OFFSET_MINUS_7DB; - else if (dtp_lvl == tx_high_pwr_level_level1) - dtp->dyn_tx_power = PHYDM_OFFSET_MINUS_3DB; - else - dtp->dyn_tx_power = PHYDM_OFFSET_ZERO; - + dtp->dyn_tx_power = phydm_pwr_lv_mapping(dtp_lvl); + PHYDM_DBG(dm, DBG_DYN_TXPWR, + "Fill cmninfo TxPwr: macid=(%d), PwrLv (%d)\n", macid, + dtp->dyn_tx_power); } -void -phydm_dtp_per_sta( - void *dm_void, - u8 macid -) +void phydm_dtp_per_sta(void *dm_void, u8 macid) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; - struct dtp_info *dtp = NULL; - struct rssi_info *rssi = NULL; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; + struct dtp_info *dtp = NULL; + struct rssi_info *rssi = NULL; if (is_sta_active(sta)) { dtp = &sta->dtp_stat; rssi = &sta->rssi_stat; - dtp->sta_tx_high_power_lvl = phydm_pwr_lvl_check(dm,rssi->rssi); - if (dtp->sta_tx_high_power_lvl != dtp->sta_last_dtp_lvl) { - PHYDM_DBG(dm, DBG_DYN_TXPWR, "STA=%d : update_DTP_lv: ((%d)) -> ((%d))\n", macid, dm->last_dtp_lvl, dm->dynamic_tx_high_power_lvl); - dm->last_dtp_lvl = dm->dynamic_tx_high_power_lvl; - phydm_dtp_fill_cmninfo(dm, macid, dm->dynamic_tx_high_power_lvl); - } - } -} - - -#else -void -phydm_dynamic_tx_power_init( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter = dm->adapter; - PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); - - /*if (!IS_HARDWARE_TYPE_8814A(adapter)) {*/ - /* PHYDM_DBG(dm,DBG_DYN_TXPWR, */ - /* ("DynamicTxPowerEnable=%d\n", mgnt_info->is_dynamic_tx_power_enable));*/ - /* return;*/ - /*} else*/ - { - mgnt_info->bDynamicTxPowerEnable = true; + dtp->sta_tx_high_power_lvl = phydm_pwr_lvl_check(dm, rssi->rssi); PHYDM_DBG(dm, DBG_DYN_TXPWR, - "DynamicTxPowerEnable=%d\n", mgnt_info->bDynamicTxPowerEnable); - } + "STA=%d , RSSI: %d , GetPwrLv: %d\n", macid, + rssi->rssi, dtp->sta_tx_high_power_lvl); + if (dtp->sta_tx_high_power_lvl == tx_high_pwr_level_unchange + || dtp->sta_tx_high_power_lvl == dtp->sta_last_dtp_lvl) { + dtp->sta_tx_high_power_lvl = dtp->sta_last_dtp_lvl; + PHYDM_DBG(dm, DBG_DYN_TXPWR, + "DTP_lv not change: ((%d))\n", + dtp->sta_tx_high_power_lvl); + return; + } -#if DEV_BUS_TYPE == RT_USB_INTERFACE - if (RT_GetInterfaceSelection((PADAPTER)adapter) == INTF_SEL1_USB_High_Power) { - mgnt_info->bDynamicTxPowerEnable = true; - } else + PHYDM_DBG(dm, DBG_DYN_TXPWR, + "DTP_lv update: ((%d)) -> ((%d))\n", dm->last_dtp_lvl, + dm->dynamic_tx_high_power_lvl); + dtp->sta_last_dtp_lvl = dtp->sta_tx_high_power_lvl; +#ifdef BB_RAM_SUPPORT + phydm_dtp_fill_cmninfo_2ndtype(dm, macid, dtp->sta_tx_high_power_lvl); #else - /* so 92c pci do not need dynamic tx power? vivi check it later */ - mgnt_info->bDynamicTxPowerEnable = false; + phydm_dtp_fill_cmninfo(dm, macid, dtp->sta_tx_high_power_lvl); #endif - - - hal_data->LastDTPLvl = tx_high_pwr_level_normal; - hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal; - -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - - dm->last_dtp_lvl = tx_high_pwr_level_normal; - dm->dynamic_tx_high_power_lvl = tx_high_pwr_level_normal; - dm->tx_agc_ofdm_18_6 = odm_get_bb_reg(dm, 0xC24, MASKDWORD); /*TXAGC {18M 12M 9M 6M}*/ - -#endif - + } } - -void -odm_dynamic_tx_power_nic_ce( - void *dm_void -) +void odm_set_dyntxpwr(void *dm_void, u8 *desc, u8 macid) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -#if (RTL8821A_SUPPORT == 1) - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 val; - u8 rssi_tmp = dm->rssi_min; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dtp_info *dtp = NULL; + dtp = &dm->phydm_sta_info[macid]->dtp_stat; if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR)) return; - - if (rssi_tmp >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { - dm->dynamic_tx_high_power_lvl = tx_high_pwr_level_level2; - /**/ - } else if (rssi_tmp >= TX_POWER_NEAR_FIELD_THRESH_LVL1) { - dm->dynamic_tx_high_power_lvl = tx_high_pwr_level_level1; - /**/ - } else if (rssi_tmp < (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) { - dm->dynamic_tx_high_power_lvl = tx_high_pwr_level_normal; - /**/ + if (dm->fill_desc_dyntxpwr) + dm->fill_desc_dyntxpwr(dm, desc, dtp->dyn_tx_power); + else + PHYDM_DBG(dm, DBG_DYN_TXPWR, + "%s: fill_desc_dyntxpwr is null!\n", __func__); + if (dtp->last_tx_power != dtp->dyn_tx_power) { + PHYDM_DBG(dm, DBG_DYN_TXPWR, + "%s: last_offset=%d, txpwr_offset=%d\n", __func__, + dtp->last_tx_power, dtp->dyn_tx_power); + dtp->last_tx_power = dtp->dyn_tx_power; } - - if (dm->last_dtp_lvl == dm->dynamic_tx_high_power_lvl) - return; - - PHYDM_DBG(dm, DBG_DYN_TXPWR, "update_DTP_lv: ((%d)) -> ((%d))\n", dm->last_dtp_lvl, dm->dynamic_tx_high_power_lvl); - - dm->last_dtp_lvl = dm->dynamic_tx_high_power_lvl; - - if (dm->support_ic_type & (ODM_RTL8821)) { - if (dm->dynamic_tx_high_power_lvl == tx_high_pwr_level_level2) { - odm_set_mac_reg(dm, 0x6D8, BIT(20) | BIT19 | BIT18, 1); /* Resp TXAGC offset = -3dB*/ - - val = dm->tx_agc_ofdm_18_6 & 0xff; - if (val >= 0x20) - val -= 0x16; - - odm_set_bb_reg(dm, 0xC24, 0xff, val); - PHYDM_DBG(dm, DBG_DYN_TXPWR, "Set TX power: level 2\n"); - } else if (dm->dynamic_tx_high_power_lvl == tx_high_pwr_level_level1) { - odm_set_mac_reg(dm, 0x6D8, BIT(20) | BIT19 | BIT18, 1); /* Resp TXAGC offset = -3dB*/ - - val = dm->tx_agc_ofdm_18_6 & 0xff; - if (val >= 0x20) - val -= 0x10; - - odm_set_bb_reg(dm, 0xC24, 0xff, val); - PHYDM_DBG(dm, DBG_DYN_TXPWR, "Set TX power: level 1\n"); - } else if (dm->dynamic_tx_high_power_lvl == tx_high_pwr_level_normal) { - odm_set_mac_reg(dm, 0x6D8, BIT(20) | BIT19 | BIT18, 0); /* Resp TXAGC offset = 0dB*/ - odm_set_bb_reg(dm, 0xC24, MASKDWORD, dm->tx_agc_ofdm_18_6); - PHYDM_DBG(dm, DBG_DYN_TXPWR, "Set TX power: normal\n"); - } - } - -#endif -#endif } - -void -odm_dynamic_tx_power( - void *dm_void -) +void phydm_dtp_debug(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len) { - /* */ - /* For AP/ADSL use struct rtl8192cd_priv* */ - /* For CE/NIC use struct void* */ - /* */ - /* struct void* adapter = dm->adapter; - * struct rtl8192cd_priv* priv = dm->priv; */ - struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; - if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR)) - return; - /* */ - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - /* */ - switch (dm->support_platform) { - case ODM_WIN: - odm_dynamic_tx_power_nic(dm); - break; - case ODM_CE: - odm_dynamic_tx_power_nic_ce(dm); - break; - default: - break; - } - - -} - - -void -odm_dynamic_tx_power_nic( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - - if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR)) - return; - -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - - if (dm->support_ic_type == ODM_RTL8814A) - odm_dynamic_tx_power_8814a(dm); - else if (dm->support_ic_type & ODM_RTL8821) { - void *adapter = dm->adapter; - PMGNT_INFO mgnt_info = GetDefaultMgntInfo((PADAPTER)adapter); - - if (mgnt_info->RegRspPwr == 1) { - if (dm->rssi_min > 60) - odm_set_mac_reg(dm, ODM_REG_RESP_TX_11AC, BIT(20) | BIT19 | BIT18, 1); /*Resp TXAGC offset = -3dB*/ - else if (dm->rssi_min < 55) - odm_set_mac_reg(dm, ODM_REG_RESP_TX_11AC, BIT(20) | BIT19 | BIT18, 0); /*Resp TXAGC offset = 0dB*/ - } - } -#endif -} - - -void -odm_dynamic_tx_power_8821( - void *dm_void, - u8 *desc, - u8 mac_id -) -{ -#if (RTL8821A_SUPPORT == 1) -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *entry; - u8 reg0xc56_byte; - u8 txpwr_offset = 0; - - entry = dm->phydm_sta_info[mac_id]; - - reg0xc56_byte = odm_read_1byte(dm, 0xc56); - - PHYDM_DBG(dm, DBG_DYN_TXPWR, "reg0xc56_byte=%d\n", reg0xc56_byte); - - if (entry[mac_id].rssi_stat.rssi > 85) { - /* Avoid TXAGC error after TX power offset is applied. - For example: Reg0xc56=0x6, if txpwr_offset=3( reduce 11dB ) - Total power = 6-11= -5( overflow!! ), PA may be burned ! - so txpwr_offset should be adjusted by Reg0xc56*/ - - if (reg0xc56_byte < 7) - txpwr_offset = 1; - else if (reg0xc56_byte < 11) - txpwr_offset = 2; - else - txpwr_offset = 3; - - SET_TX_DESC_TX_POWER_OFFSET_8812(desc, txpwr_offset); - PHYDM_DBG(dm, DBG_DYN_TXPWR, "odm_dynamic_tx_power_8821: RSSI=%d, txpwr_offset=%d\n", entry[mac_id].rssi_stat.rssi, txpwr_offset); + struct dm_struct *dm = (struct dm_struct *)dm_void; + char help[] = "-h"; + u32 var1[3] = {0}; + u8 set_pwr_th1, set_pwr_th2, set_pwr_th3; + u8 i; + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "Set DTP threhosld: {1} {TH[0]} {TH[1]} {TH[2]}\n"); } else { - SET_TX_DESC_TX_POWER_OFFSET_8812(desc, txpwr_offset); - PHYDM_DBG(dm, DBG_DYN_TXPWR, "odm_dynamic_tx_power_8821: RSSI=%d, txpwr_offset=%d\n", entry[mac_id].rssi_stat.rssi, txpwr_offset); + for (i = 0; i < 3; i++) { + if (input[i + 1]) + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); + } + if (var1[0] == 1) { + for (i = 0; i < 3; i++) + if (var1[i] == 0 || var1[i] > 100) + dm->set_pwr_th[i] = 0xff; + else + dm->set_pwr_th[i] = (u8)var1[1 + i]; - } -#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ -#endif /*#if (RTL8821A_SUPPORT==1)*/ -} - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -odm_dynamic_tx_power_8814a( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - void *adapter = dm->adapter; - PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); - s32 undecorated_smoothed_pwdb = dm->rssi_min; - - PHYDM_DBG(dm, DBG_DYN_TXPWR, - "TxLevel=%d mgnt_info->iot_action=%x mgnt_info->is_dynamic_tx_power_enable=%d\n", - hal_data->DynamicTxHighPowerLvl, mgnt_info->IOTAction, mgnt_info->bDynamicTxPowerEnable); - - /*STA not connected and AP not connected*/ - if ((!mgnt_info->bMediaConnect) && (hal_data->EntryMinUndecoratedSmoothedPWDB == 0)) { - PHYDM_DBG(dm, DBG_DYN_TXPWR, "Not connected to any reset power lvl\n"); - hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal; - return; - } - - - if (!mgnt_info->bDynamicTxPowerEnable || mgnt_info->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) - hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal; - else { - - /*Should we separate as 2.4G/5G band?*/ - PHYDM_DBG(dm, DBG_DYN_TXPWR, "rssi_tmp = %d\n", undecorated_smoothed_pwdb); - - if (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { - hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_level2; - PHYDM_DBG(dm, DBG_DYN_TXPWR, "tx_high_pwr_level_level1 (TxPwr=0x0)\n"); - } else if ((undecorated_smoothed_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) && - (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL1)) { - hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_level1; - PHYDM_DBG(dm, DBG_DYN_TXPWR, "tx_high_pwr_level_level1 (TxPwr=0x10)\n"); - } else if (undecorated_smoothed_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) { - hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal; - PHYDM_DBG(dm, DBG_DYN_TXPWR, "tx_high_pwr_level_normal\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "DTP_TH[0:2] = {%d, %d, %d}\n", + dm->set_pwr_th[0], dm->set_pwr_th[1], + dm->set_pwr_th[2]); } } - - - if (hal_data->DynamicTxHighPowerLvl != hal_data->LastDTPLvl) { - PHYDM_DBG(dm, DBG_DYN_TXPWR, "odm_dynamic_tx_power_8814a() channel = %d\n", hal_data->CurrentChannel); - odm_set_tx_power_level8814(adapter, hal_data->CurrentChannel, hal_data->DynamicTxHighPowerLvl); - } - - - PHYDM_DBG(dm, DBG_DYN_TXPWR, - "odm_dynamic_tx_power_8814a() channel = %d TXpower lvl=%d/%d\n", - hal_data->CurrentChannel, hal_data->LastDTPLvl, hal_data->DynamicTxHighPowerLvl); - - hal_data->LastDTPLvl = hal_data->DynamicTxHighPowerLvl; - + *_used = used; + *_out_len = out_len; } - -/**/ -/*For normal driver we always use the FW method to configure TX power index to reduce I/O transaction.*/ -/**/ -/**/ -void -odm_set_tx_power_level8814( - void *adapter, - u8 channel, - u8 pwr_lvl -) +void phydm_dynamic_tx_power(void *dm_void) { -#if (DEV_BUS_TYPE == RT_USB_INTERFACE) - u32 i, j, k = 0; - u32 value[264] = {0}; - u32 path = 0, power_index, txagc_table_wd = 0x00801000; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta = NULL; + u8 i; + u8 cnt = 0; + u8 rssi_min = dm->rssi_min; + u8 rssi_tmp = 0; - u8 jaguar2_rates[][4] = { {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}, - {MGN_6M, MGN_9M, MGN_12M, MGN_18M}, - {MGN_24M, MGN_36M, MGN_48M, MGN_54M}, - {MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3}, - {MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7}, - {MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11}, - {MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15}, - {MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19}, - {MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23}, - {MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3}, - {MGN_VHT1SS_MCS4, MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7}, - {MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9, MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1}, - {MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, MGN_VHT2SS_MCS5}, - {MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9}, - {MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3}, - {MGN_VHT3SS_MCS4, MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7}, - {MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9, 0, 0} - }; - - for (path = RF_PATH_A; path <= RF_PATH_D; ++path) { - u8 usb_host = UsbModeQueryHubUsbType((PADAPTER)adapter); - u8 usb_rfset = UsbModeQueryRfSet((PADAPTER)adapter); - u8 usb_rf_type = RT_GetRFType((PADAPTER)adapter); - - for (i = 0; i <= 16; i++) { - for (j = 0; j <= 3; j++) { - if (jaguar2_rates[i][j] == 0) - continue; - - txagc_table_wd = 0x00801000; - power_index = (u32) PHY_GetTxPowerIndex((PADAPTER)adapter, (u8)path, jaguar2_rates[i][j], hal_data->CurrentChannelBW, channel); - - /*for Query bus type to recude tx power.*/ - if (usb_host != USB_MODE_U3 && usb_rfset == 1 && IS_HARDWARE_TYPE_8814AU(adapter) && usb_rf_type == RF_3T3R) { - if (channel <= 14) { - if (power_index >= 16) - power_index -= 16; - else - power_index = 0; - } else - power_index = 0; - } - - if (pwr_lvl == tx_high_pwr_level_level1) { - if (power_index >= 0x10) - power_index -= 0x10; - else - power_index = 0; - } else if (pwr_lvl == tx_high_pwr_level_level2) - power_index = 0; - - txagc_table_wd |= (path << 8) | MRateToHwRate(jaguar2_rates[i][j]) | (power_index << 24); - - PHY_SetTxPowerIndexShadow((PADAPTER)adapter, (u8)power_index, (u8)path, jaguar2_rates[i][j]); - - value[k++] = txagc_table_wd; - } - } - } - - if (((PADAPTER)adapter)->MgntInfo.bScanInProgress == false && ((PADAPTER)adapter)->MgntInfo.RegFWOffload == 2) - HalDownloadTxPowerLevel8814((PADAPTER)adapter, value); -#endif -} -#endif - -#endif /* #ifdef CONFIG_DYNAMIC_TX_TWR */ - -void -phydm_dynamic_tx_power( - void *dm_void -) -{ -#ifdef CONFIG_DYNAMIC_TX_TWR - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *sta = NULL; - u8 i; - u8 cnt = 0; - u8 rssi_min = dm->rssi_min; - u8 rssi_tmp; if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR)) return; + + PHYDM_DBG(dm, DBG_DYN_TXPWR, + "[%s] RSSI_min = %d, Noisy_dec = %d\n", __func__, rssi_min, + dm->noisy_decision); + phydm_noisy_enhance_hp_th(dm, dm->noisy_decision); /* Response Power */ dm->dynamic_tx_high_power_lvl = phydm_pwr_lvl_check(dm, rssi_min); phydm_dynamic_response_power(dm); @@ -708,5 +493,60 @@ phydm_dynamic_tx_power( if (cnt >= dm->number_linked_client) break; } -#endif -} \ No newline at end of file +} +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + +void phydm_dynamic_tx_power_init_win(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *adapter = dm->adapter; + PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); + + mgnt_info->bDynamicTxPowerEnable = false; + + #if DEV_BUS_TYPE == RT_USB_INTERFACE + if (RT_GetInterfaceSelection((PADAPTER)adapter) == + INTF_SEL1_USB_High_Power) { + mgnt_info->bDynamicTxPowerEnable = true; + } + #endif + + hal_data->LastDTPLvl = tx_high_pwr_level_normal; + hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal; + + PHYDM_DBG(dm, DBG_DYN_TXPWR, "[%s] DTP=%d\n", __func__, + mgnt_info->bDynamicTxPowerEnable); +} + +void phydm_dynamic_tx_power_win(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR)) + return; + + #if (RTL8814A_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8814A) + odm_dynamic_tx_power_8814a(dm); + #endif + + #if (RTL8821A_SUPPORT == 1) + if (dm->support_ic_type & ODM_RTL8821) { + void *adapter = dm->adapter; + PMGNT_INFO mgnt_info = GetDefaultMgntInfo((PADAPTER)adapter); + + if (mgnt_info->RegRspPwr == 1) { + if (dm->rssi_min > 60) { + /*Resp TXAGC offset = -3dB*/ + odm_set_mac_reg(dm, 0x6d8, 0x1C0000, 1); + } else if (dm->rssi_min < 55) { + /*Resp TXAGC offset = 0dB*/ + odm_set_mac_reg(dm, 0x6d8, 0x1C0000, 0); + } + } + } + #endif +} +#endif /*@#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ +#endif /* @#ifdef CONFIG_DYNAMIC_TX_TWR */ diff --git a/hal/phydm/phydm_dynamictxpower.h b/hal/phydm/phydm_dynamictxpower.h index 4698cb2..3ccc714 100644 --- a/hal/phydm/phydm_dynamictxpower.h +++ b/hal/phydm/phydm_dynamictxpower.h @@ -23,112 +23,88 @@ * *****************************************************************************/ -#ifndef __PHYDMDYNAMICTXPOWER_H__ -#define __PHYDMDYNAMICTXPOWER_H__ +#ifndef __PHYDMDYNAMICTXPOWER_H__ +#define __PHYDMDYNAMICTXPOWER_H__ -/*#define DYNAMIC_TXPWR_VERSION "1.0"*/ -/*#define DYNAMIC_TXPWR_VERSION "1.3" */ /*2015.08.26, Add 8814 Dynamic TX power*/ -#define DYNAMIC_TXPWR_VERSION "1.4" /*2015.11.06, Add CE 8821A Dynamic TX power*/ +#ifdef CONFIG_DYNAMIC_TX_TWR +/* @============================================================ + * Definition + * ============================================================ + */ + +/*@#define DYNAMIC_TXPWR_VERSION "1.0"*/ +/*@#define DYNAMIC_TXPWR_VERSION "1.3" */ /*@2015.08.26, Add 8814 Dynamic TX power*/ +#define DYNAMIC_TXPWR_VERSION "1.4" /*@2015.11.06, Add CE 8821A Dynamic TX power*/ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) - #define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 - #define TX_POWER_NEAR_FIELD_THRESH_LVL1 60 - #define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F +#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 +#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60 +#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) - #define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 - #define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 +#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 +#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - #define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 - #define TX_POWER_NEAR_FIELD_THRESH_LVL1 60 +#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 +#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60 #endif -#define tx_high_pwr_level_normal 0 -#define tx_high_pwr_level_level1 1 -#define tx_high_pwr_level_level2 2 - -#define tx_high_pwr_level_bt1 3 -#define tx_high_pwr_level_bt2 4 -#define tx_high_pwr_level_15 5 -#define tx_high_pwr_level_35 6 -#define tx_high_pwr_level_50 7 -#define tx_high_pwr_level_70 8 -#define tx_high_pwr_level_100 9 +#define tx_high_pwr_level_normal 0 +#define tx_high_pwr_level_level1 1 +#define tx_high_pwr_level_level2 2 +#define tx_high_pwr_level_level3 3 +#define tx_high_pwr_level_unchange 4 +/* @============================================================ + * enumrate + * ============================================================ + */ enum phydm_dtp_power_offset { PHYDM_OFFSET_ZERO = 0, - PHYDM_OFFSET_MINUS_3DB = 1, + PHYDM_OFFSET_MINUS_3DB = 1, PHYDM_OFFSET_MINUS_7DB = 2, PHYDM_OFFSET_MINUS_11DB = 3, PHYDM_OFFSET_ADD_3DB = 4, PHYDM_OFFSET_ADD_6DB = 5 }; -void -phydm_pow_train_init( - void *dm_void -); +enum phydm_dtp_power_offset_2ndtype { + PHYDM_2ND_OFFSET_ZERO = 0, + PHYDM_2ND_OFFSET_MINUS_3DB = 2, + PHYDM_2ND_OFFSET_MINUS_7DB = 3, + PHYDM_2ND_OFFSET_MINUS_11DB = 1 +}; -void -phydm_dynamic_tx_power( - void *dm_void -); +enum phydm_dtp_power_offset_bbram { + /*@ HW min use 0.25*/ + PHYDM_BBRAM_OFFSET_ZERO = 0, + PHYDM_BBRAM_OFFSET_MINUS_3DB = -3, + PHYDM_BBRAM_OFFSET_MINUS_7DB = -7, + PHYDM_BBRAM_OFFSET_MINUS_11DB = -11 +}; -void -odm_dynamic_tx_power_restore_power_index( - void *dm_void -); +/* @============================================================ + * structure + * ============================================================ + */ -void -odm_dynamic_tx_power_nic( - void *dm_void -); +/* @============================================================ + * Function Prototype + * ============================================================ + */ -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -void -odm_dynamic_tx_power_save_power_index( - void *dm_void -); +extern void +odm_set_dyntxpwr(void *dm_void, u8 *desc, u8 mac_id); -void -odm_dynamic_tx_power_write_power_index( - void *dm_void, - u8 value); +void phydm_dynamic_tx_power(void *dm_void); + +void phydm_dynamic_tx_power_init(void *dm_void); + +void phydm_dtp_debug(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len); -void -odm_dynamic_tx_power_8821( - void *dm_void, - u8 *desc, - u8 mac_id -); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -odm_dynamic_tx_power_8814a( - void *dm_void -); - - -void -odm_set_tx_power_level8814( - void *adapter, - u8 channel, - u8 pwr_lvl -); -#endif +void odm_dynamic_tx_power_win(void *dm_void); #endif -void -odm_dynamic_tx_power( - void *dm_void -); - -void -phydm_dynamic_tx_power( - void *dm_void -); - -void -phydm_dynamic_tx_power_init( - void *dm_void -); - +#endif #endif diff --git a/hal/phydm/phydm_features.h b/hal/phydm/phydm_features.h index 7710703..afb1839 100644 --- a/hal/phydm/phydm_features.h +++ b/hal/phydm/phydm_features.h @@ -23,30 +23,50 @@ * *****************************************************************************/ -#ifndef __PHYDM_FEATURES_H__ +#ifndef __PHYDM_FEATURES_H__ #define __PHYDM_FEATURES_H__ -#define ODM_DC_CANCELLATION_SUPPORT (ODM_RTL8188F | ODM_RTL8710B) +#define CONFIG_RUN_IN_DRV +#define ODM_DC_CANCELLATION_SUPPORT (ODM_RTL8188F | \ + ODM_RTL8710B | \ + ODM_RTL8192F | \ + ODM_RTL8821C | \ + ODM_RTL8721D) #define ODM_RECEIVER_BLOCKING_SUPPORT (ODM_RTL8188E | ODM_RTL8192E) -#if ((RTL8814A_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1)) - #define PHYDM_LA_MODE_SUPPORT 1 -#else - #define PHYDM_LA_MODE_SUPPORT 0 -#endif - -/*20170103 YuChen add for FW API*/ -#define PHYDM_FW_API_ENABLE_8822B 1 +/*@20170103 YuChen add for FW API*/ +#define PHYDM_FW_API_ENABLE_8822B 1 #define PHYDM_FW_API_FUNC_ENABLE_8822B 1 -#define PHYDM_FW_API_ENABLE_8821C 1 +#define PHYDM_FW_API_ENABLE_8821C 1 #define PHYDM_FW_API_FUNC_ENABLE_8821C 1 +#define PHYDM_FW_API_ENABLE_8195B 1 +#define PHYDM_FW_API_FUNC_ENABLE_8195B 1 +#define PHYDM_FW_API_ENABLE_8198F 1 +#define PHYDM_FW_API_FUNC_ENABLE_8198F 1 +#define PHYDM_FW_API_ENABLE_8822C 1 +#define PHYDM_FW_API_FUNC_ENABLE_8822C 1 +#define PHYDM_FW_API_ENABLE_8814B 1 +#define PHYDM_FW_API_FUNC_ENABLE_8814B 1 +#define PHYDM_FW_API_ENABLE_8812F 1 +#define PHYDM_FW_API_FUNC_ENABLE_8812F 1 + +#define CONFIG_POWERSAVING 0 + +#ifdef BEAMFORMING_SUPPORT +#if (BEAMFORMING_SUPPORT) + #define PHYDM_BEAMFORMING_SUPPORT +#endif +#endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #include "phydm_features_win.h" #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #include "phydm_features_ce.h" + /*@#include "phydm_features_ce2_kernel.h"*/ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) #include "phydm_features_ap.h" +#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) + #include "phydm_features_iot.h" #endif #endif diff --git a/hal/phydm/phydm_features_ap.h b/hal/phydm/phydm_features_ap.h index f986e8f..0202cd5 100644 --- a/hal/phydm/phydm_features_ap.h +++ b/hal/phydm/phydm_features_ap.h @@ -16,81 +16,140 @@ #ifndef __PHYDM_FEATURES_AP_H__ #define __PHYDM_FEATURES_AP_H__ -#if (RTL8822B_SUPPORT == 1 || RTL8812A_SUPPORT == 1 || RTL8197F_SUPPORT == 1) +#if (RTL8814A_SUPPORT || RTL8821C_SUPPORT || RTL8822B_SUPPORT ||\ + RTL8197F_SUPPORT || RTL8192F_SUPPORT || RTL8198F_SUPPORT ||\ + RTL8822C_SUPPORT || RTL8812F_SUPPORT || RTL8814B_SUPPORT) + #define PHYDM_LA_MODE_SUPPORT 1 +#else + #define PHYDM_LA_MODE_SUPPORT 0 +#endif + +#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\ + RTL8192F_SUPPORT) #define DYN_ANT_WEIGHTING_SUPPORT #endif -#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) +#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT) #define FAHM_SUPPORT #endif #define NHM_SUPPORT #define CLM_SUPPORT -#if (RTL8822B_SUPPORT == 1) +#if (RTL8822B_SUPPORT) /*#define PHYDM_PHYSTAUS_SMP_MODE*/ #endif -#if (RTL8197F_SUPPORT == 1) +#if (RTL8197F_SUPPORT) /*#define PHYDM_TDMA_DIG_SUPPORT*/ #endif -#if (RTL8197F_SUPPORT == 1) - #define PHYDM_LNA_SAT_CHK_SUPPORT +#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT) + #define PHYDM_TDMA_DIG_SUPPORT 1 + #ifdef PHYDM_TDMA_DIG_SUPPORT + #define IS_USE_NEW_TDMA /*new tdma dig test*/ + #endif #endif -#if (RTL8822B_SUPPORT == 1) +#if (RTL8197F_SUPPORT || RTL8822B_SUPPORT ||\ + RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT) + #define PHYDM_LNA_SAT_CHK_SUPPORT + #ifdef PHYDM_LNA_SAT_CHK_SUPPORT + + #if (RTL8197F_SUPPORT) + /*#define PHYDM_LNA_SAT_CHK_SUPPORT_TYPE1*/ + #endif + + #if (RTL8822B_SUPPORT) + /*#define PHYDM_LNA_SAT_CHK_TYPE2*/ + #endif + + #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT) + #define PHYDM_LNA_SAT_CHK_TYPE1 + #endif + #endif +#endif + +#if (RTL8822B_SUPPORT) /*#define PHYDM_POWER_TRAINING_SUPPORT*/ #endif -#if (RTL8822B_SUPPORT == 1) +#if (RTL8814B_SUPPORT || RTL8198F_SUPPORT || RTL8822C_SUPPORT ||\ + RTL8812F_SUPPORT) + #define PHYDM_PMAC_TX_SETTING_SUPPORT +#endif + +#if (RTL8814B_SUPPORT || RTL8198F_SUPPORT || RTL8822C_SUPPORT ||\ + RTL8812F_SUPPORT) + #define PHYDM_MP_SUPPORT +#endif + +#if (RTL8822B_SUPPORT) #define PHYDM_TXA_CALIBRATION #endif -#if (RTL8188E_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) +#if (RTL8188E_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) #define PHYDM_PRIMARY_CCA #endif -#if (RTL8188F_SUPPORT == 1 || RTL8710B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8822B_SUPPORT == 1) +#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8822B_SUPPORT || RTL8192F_SUPPORT) #define PHYDM_DC_CANCELLATION #endif -#if (RTL8822B_SUPPORT == 1) - /*#define CONFIG_DYNAMIC_RX_PATH*/ +#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) + #define CONFIG_ADAPTIVE_SOML #endif -#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1) - /*#define CONFIG_ADAPTIVE_SOML*/ -#endif - -#if (RTL8812A_SUPPORT == 1 || RTL8821A_SUPPORT == 1 || RTL8881A_SUPPORT == 1 || RTL8192E_SUPPORT == 1 || RTL8723B_SUPPORT == 1) +#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8881A_SUPPORT ||\ + RTL8192E_SUPPORT || RTL8723B_SUPPORT) /*#define CONFIG_RA_FW_DBG_CODE*/ #endif -/* #define CONFIG_DYNAMIC_TX_TWR */ -#define PHYDM_DIG_MODE_DECISION_SUPPORT +#if (RTL8192F_SUPPORT == 1) + /*#define CONFIG_8912F_SPUR_CALIBRATION*/ +#endif + +#if (RTL8822B_SUPPORT == 1) + /* #define CONFIG_8822B_SPUR_CALIBRATION */ +#endif + +#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR +#define CONFIG_DYNAMIC_TX_TWR +#endif /*#define CONFIG_PSD_TOOL*/ #define PHYDM_SUPPORT_CCKPD -#define RA_MASK_PHYDMLIZE_AP -/* #define CONFIG_RA_DBG_CMD*/ +#define PHYDM_SUPPORT_ADAPTIVITY /*#define CONFIG_PATH_DIVERSITY*/ /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ -#define CONFIG_RA_DYNAMIC_RATE_ID +/*#define CONFIG_RA_DYNAMIC_RATE_ID*/ #define CONFIG_BB_TXBF_API /*#define ODM_CONFIG_BT_COEXIST*/ -/*#define PHYDM_3RD_REFORM_RA_MASK*/ -#define PHYDM_3RD_REFORM_RSSI_MONOTOR #define PHYDM_SUPPORT_RSSI_MONITOR #if !defined(CONFIG_DISABLE_PHYDM_DEBUG_FUNCTION) #define CONFIG_PHYDM_DEBUG_FUNCTION #endif /* [ Configure Antenna Diversity ] */ -#if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH) +#if (RTL8188F_SUPPORT) + #ifdef CONFIG_ANTENNA_DIVERSITY + #define CONFIG_PHYDM_ANTENNA_DIVERSITY + #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY + #endif +#endif + +#if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH) || defined(CONFIG_RTL_8197F_ANT_SWITCH) #define CONFIG_PHYDM_ANTENNA_DIVERSITY #define ODM_EVM_ENHANCE_ANTDIV - #define SKIP_EVM_ANTDIV_TRAINING_PATCH + /*#define SKIP_EVM_ANTDIV_TRAINING_PATCH*/ /*----------*/ + #ifdef CONFIG_NO_2G_DIVERSITY_8197F + #define CONFIG_NO_2G_DIVERSITY + #elif defined(CONFIG_2G_CGCS_RX_DIVERSITY_8197F) + #define CONFIG_2G_CGCS_RX_DIVERSITY + #elif defined(CONFIG_2G_CG_TRX_DIVERSITY_8197F) + #define CONFIG_2G_CG_TRX_DIVERSITY + #endif #if (!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A) && !defined(CONFIG_2G_CGCS_RX_DIVERSITY) && !defined(CONFIG_2G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) #define CONFIG_NO_2G_DIVERSITY @@ -126,6 +185,14 @@ #ifdef CONFIG_SMART_ANTENNA /*#define CONFIG_CUMITEK_SMART_ANTENNA*/ #endif +#define CFG_DIG_DAMPING_CHK /* --------------------------------------------------*/ +#ifdef PHYDM_BEAMFORMING_SUPPORT + #if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\ + RTL8814B_SUPPORT || RTL8812F_SUPPORT) + #define DRIVER_BEAMFORMING_VERSION2 + #endif +#endif #endif diff --git a/hal/phydm/phydm_features_ce.h b/hal/phydm/phydm_features_ce.h index a9e4e4e..43e608a 100644 --- a/hal/phydm/phydm_features_ce.h +++ b/hal/phydm/phydm_features_ce.h @@ -23,110 +23,203 @@ * *****************************************************************************/ -#ifndef __PHYDM_FEATURES_CE_H__ +#ifndef __PHYDM_FEATURES_CE_H__ #define __PHYDM_FEATURES_CE_H__ -#if (RTL8822B_SUPPORT == 1 || RTL8812A_SUPPORT == 1 || RTL8197F_SUPPORT == 1) +#if (RTL8814A_SUPPORT || RTL8821C_SUPPORT || RTL8822B_SUPPORT ||\ + RTL8197F_SUPPORT || RTL8192F_SUPPORT || RTL8198F_SUPPORT ||\ + RTL8822C_SUPPORT) + #define PHYDM_LA_MODE_SUPPORT 1 +#else + #define PHYDM_LA_MODE_SUPPORT 0 +#endif + +#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\ + RTL8192F_SUPPORT) #define DYN_ANT_WEIGHTING_SUPPORT #endif -#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) +#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT) #define FAHM_SUPPORT #endif #define NHM_SUPPORT #define CLM_SUPPORT -#if (RTL8822B_SUPPORT == 1) - /*#define PHYDM_PHYSTAUS_SMP_MODE*/ +#if (RTL8822C_SUPPORT) + #define NHM_DYM_PW_TH_SUPPORT #endif -/*#define PHYDM_TDMA_DIG_SUPPORT*/ -/*#define PHYDM_LNA_SAT_CHK_SUPPORT*/ +#if (RTL8822B_SUPPORT) + /*@#define PHYDM_PHYSTAUS_SMP_MODE*/ +#endif -#if (RTL8822B_SUPPORT == 1) +/*@#define PHYDM_TDMA_DIG_SUPPORT*/ + +#if (RTL8822B_SUPPORT || RTL8192F_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8822C_SUPPORT || RTL8723D_SUPPORT) + #ifdef CONFIG_TDMADIG + #define PHYDM_TDMA_DIG_SUPPORT + #ifdef PHYDM_TDMA_DIG_SUPPORT + #define IS_USE_NEW_TDMA /*new tdma dig test*/ + #endif + #endif +#endif + +#if (RTL8814B_SUPPORT) + /*@#define PHYDM_TDMA_DIG_SUPPORT*/ + #ifdef PHYDM_TDMA_DIG_SUPPORT + /*@#define IS_USE_NEW_TDMA*/ /*new tdma dig test*/ + #endif +#endif + +#if (RTL8197F_SUPPORT || RTL8822B_SUPPORT || RTL8814B_SUPPORT) + /*@#define PHYDM_LNA_SAT_CHK_SUPPORT*/ + #ifdef PHYDM_LNA_SAT_CHK_SUPPORT + + #if (RTL8197F_SUPPORT) + /*@#define PHYDM_LNA_SAT_CHK_SUPPORT_TYPE1*/ + #endif + + #if (RTL8822B_SUPPORT) + /*@#define PHYDM_LNA_SAT_CHK_TYPE2*/ + #endif + + #if (RTL8814B_SUPPORT) + /*@#define PHYDM_LNA_SAT_CHK_TYPE1*/ + #endif + #endif +#endif + +#if (RTL8822B_SUPPORT || RTL8192F_SUPPORT) #define PHYDM_POWER_TRAINING_SUPPORT #endif -#if (RTL8822B_SUPPORT == 1) +#if (RTL8822C_SUPPORT) + #define PHYDM_PMAC_TX_SETTING_SUPPORT +#endif + +#if (RTL8822C_SUPPORT) + #define PHYDM_MP_SUPPORT +#endif + +#if (RTL8822B_SUPPORT) #define PHYDM_TXA_CALIBRATION #endif -#if (RTL8188E_SUPPORT == 1) +#if (RTL8188E_SUPPORT) #define PHYDM_PRIMARY_CCA #endif -#if (RTL8188F_SUPPORT == 1 || RTL8710B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8822B_SUPPORT == 1) +#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8822B_SUPPORT || RTL8192F_SUPPORT) #define PHYDM_DC_CANCELLATION #endif -#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1) +#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) #define CONFIG_ADAPTIVE_SOML #endif - - -#if (RTL8822B_SUPPORT == 1) - /*#define CONFIG_DYNAMIC_RX_PATH*/ -#endif - -#if (RTL8188E_SUPPORT == 1 || RTL8192E_SUPPORT == 1) +#if (RTL8188E_SUPPORT || RTL8192E_SUPPORT) #define CONFIG_RECEIVER_BLOCKING #endif -/* #define CONFIG_DYNAMIC_TX_TWR */ -#define PHYDM_SUPPORT_CCKPD -#define RA_MASK_PHYDMLIZE_CE +#if (RTL8192F_SUPPORT == 1) + /*#define CONFIG_8912F_SPUR_CALIBRATION*/ +#endif -/*Antenna Diversity*/ +#if (RTL8822B_SUPPORT == 1) + #define CONFIG_8822B_SPUR_CALIBRATION +#endif + +#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR +#define CONFIG_DYNAMIC_TX_TWR +#endif +#define PHYDM_SUPPORT_CCKPD +#define PHYDM_SUPPORT_ADAPTIVITY + +/*@Antenna Diversity*/ #ifdef CONFIG_ANTENNA_DIVERSITY #define CONFIG_PHYDM_ANTENNA_DIVERSITY #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY - #if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) + #if (RTL8723B_SUPPORT || RTL8821A_SUPPORT ||\ + RTL8188F_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8723D_SUPPORT) #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY #endif - #if (RTL8821A_SUPPORT == 1) - /*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ + #if (RTL8821A_SUPPORT) + /*@#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ #endif - #if (RTL8822B_SUPPORT == 1) - /*#define CONFIG_HL_SMART_ANTENNA_TYPE2*/ + #if (RTL8822B_SUPPORT) + /*@#define CONFIG_HL_SMART_ANTENNA_TYPE2*/ #endif + #endif #endif -/*[SmartAntenna]*/ -/*#define CONFIG_SMART_ANTENNA*/ -#ifdef CONFIG_SMART_ANTENNA - /*#define CONFIG_CUMITEK_SMART_ANTENNA*/ +#if (RTL8822C_SUPPORT) + #define CONFIG_PATH_DIVERSITY #endif -/* --------------------------------------------------*/ + +/*@[SmartAntenna]*/ +/*@#define CONFIG_SMART_ANTENNA*/ +#ifdef CONFIG_SMART_ANTENNA + /*@#define CONFIG_CUMITEK_SMART_ANTENNA*/ +#endif +/* @--------------------------------------------------*/ #ifdef CONFIG_DFS_MASTER #define CONFIG_PHYDM_DFS_MASTER #endif -#if (RTL8812A_SUPPORT == 1 || RTL8821A_SUPPORT == 1 || RTL8881A_SUPPORT == 1 || RTL8192E_SUPPORT == 1 || RTL8723B_SUPPORT == 1) - /*#define CONFIG_RA_FW_DBG_CODE*/ +#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8881A_SUPPORT ||\ + RTL8192E_SUPPORT || RTL8723B_SUPPORT) + /*@#define CONFIG_RA_FW_DBG_CODE*/ #endif -/*#define PHYDM_DIG_MODE_DECISION_SUPPORT*/ #define CONFIG_PSD_TOOL -/*#define CONFIG_RA_DBG_CMD*/ -/*#define CONFIG_ANT_DETECTION*/ -/*#define CONFIG_PATH_DIVERSITY*/ -/*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ +/*@#define CONFIG_ANT_DETECTION*/ +/*@#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ #define CONFIG_BB_TXBF_API #define CONFIG_PHYDM_DEBUG_FUNCTION #ifdef CONFIG_BT_COEXIST #define ODM_CONFIG_BT_COEXIST #endif -#define PHYDM_3RD_REFORM_RA_MASK -#define PHYDM_3RD_REFORM_RSSI_MONOTOR #define PHYDM_SUPPORT_RSSI_MONITOR -/*#define PHYDM_AUTO_DEGBUG*/ +#define PHYDM_AUTO_DEGBUG +#define CFG_DIG_DAMPING_CHK + + +#ifdef PHYDM_BEAMFORMING_SUPPORT + #if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8192E_SUPPORT ||\ + RTL8814A_SUPPORT || RTL8881A_SUPPORT) + #define PHYDM_BEAMFORMING_VERSION1 + #endif + #if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\ + RTL8822C_SUPPORT || RTL8814B_SUPPORT) + #define DRIVER_BEAMFORMING_VERSION2 + #endif +#endif + +#if (RTL8822B_SUPPORT || RTL8822C_SUPPORT) + #ifdef CONFIG_MCC_MODE + #define CONFIG_MCC_DM + #endif +#endif + +#if (RTL8822B_SUPPORT) + #ifdef CONFIG_DYNAMIC_BYPASS_MODE + #define CONFIG_DYNAMIC_BYPASS + #endif +#endif + +#if (RTL8822B_SUPPORT || RTL8192F_SUPPORT) + #define CONFIG_DIRECTIONAL_BF +#endif #endif diff --git a/hal/phydm/phydm_features_ce2_kernel.h b/hal/phydm/phydm_features_ce2_kernel.h new file mode 100644 index 0000000..c206ea6 --- /dev/null +++ b/hal/phydm/phydm_features_ce2_kernel.h @@ -0,0 +1,84 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +#ifndef __PHYDM_FEATURES_CE_H__ +#define __PHYDM_FEATURES_CE_H__ + +#define PHYDM_LA_MODE_SUPPORT 0 + +#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\ + RTL8192F_SUPPORT) + #define DYN_ANT_WEIGHTING_SUPPORT +#endif + +#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT) + #define FAHM_SUPPORT +#endif + #define NHM_SUPPORT + #define CLM_SUPPORT + +#if (RTL8822B_SUPPORT) + #define PHYDM_TXA_CALIBRATION +#endif + +#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8822B_SUPPORT || RTL8192F_SUPPORT) + #define PHYDM_DC_CANCELLATION +#endif + +#if (RTL8192F_SUPPORT == 1) + /*#define CONFIG_8912F_SPUR_CALIBRATION*/ +#endif + +#if (RTL8822B_SUPPORT == 1) + /* #define CONFIG_8822B_SPUR_CALIBRATION */ +#endif + +#define PHYDM_SUPPORT_CCKPD +#define PHYDM_SUPPORT_ADAPTIVITY + +#ifdef CONFIG_DFS_MASTER + #define CONFIG_PHYDM_DFS_MASTER +#endif + +#define CONFIG_BB_TXBF_API +#define CONFIG_PHYDM_DEBUG_FUNCTION + +#ifdef CONFIG_BT_COEXIST + #define ODM_CONFIG_BT_COEXIST +#endif +#define PHYDM_SUPPORT_RSSI_MONITOR +#define CFG_DIG_DAMPING_CHK + + +#ifdef PHYDM_BEAMFORMING_SUPPORT + #if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\ + RTL8822C_SUPPORT || RTL8814B_SUPPORT) + #define DRIVER_BEAMFORMING_VERSION2 + #endif +#endif + +#endif diff --git a/hal/phydm/phydm_features_iot.h b/hal/phydm/phydm_features_iot.h new file mode 100644 index 0000000..8db551a --- /dev/null +++ b/hal/phydm/phydm_features_iot.h @@ -0,0 +1,174 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +#ifndef __PHYDM_FEATURES_IOT_H__ +#define __PHYDM_FEATURES_IOT_H__ + +#if (RTL8814A_SUPPORT || RTL8821C_SUPPORT || RTL8822B_SUPPORT ||\ + RTL8197F_SUPPORT || RTL8192F_SUPPORT || RTL8198F_SUPPORT ||\ + RTL8822C_SUPPORT || RTL8195B_SUPPORT) + #define PHYDM_LA_MODE_SUPPORT 1 +#else + #define PHYDM_LA_MODE_SUPPORT 0 +#endif + +#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\ + RTL8192F_SUPPORT) + #define DYN_ANT_WEIGHTING_SUPPORT +#endif + +#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT) + #define FAHM_SUPPORT +#endif + #define NHM_SUPPORT + #define CLM_SUPPORT + +#if (RTL8822B_SUPPORT) + /*#define PHYDM_PHYSTAUS_SMP_MODE*/ +#endif + +/*#define PHYDM_TDMA_DIG_SUPPORT*/ + +#if (RTL8197F_SUPPORT || RTL8822B_SUPPORT) + /*#define PHYDM_LNA_SAT_CHK_SUPPORT*/ + #ifdef PHYDM_LNA_SAT_CHK_SUPPORT + #if (RTL8197F_SUPPORT) + /*#define PHYDM_LNA_SAT_CHK_SUPPORT_TYPE1*/ + #endif + + #if (RTL8822B_SUPPORT) + /*#define PHYDM_LNA_SAT_CHK_TYPE2*/ + #endif + #endif +#endif + +#if (RTL8822B_SUPPORT || RTL8721D_SUPPORT) + #define PHYDM_POWER_TRAINING_SUPPORT +#endif + +#if (RTL8822C_SUPPORT) + /* #define PHYDM_PMAC_TX_SETTING_SUPPORT */ +#endif + +#if (RTL8822C_SUPPORT) + /* #define PHYDM_MP_SUPPORT */ +#endif + +#if (RTL8822B_SUPPORT) + #define PHYDM_TXA_CALIBRATION +#endif + +#if (RTL8188E_SUPPORT) + #define PHYDM_PRIMARY_CCA +#endif + +#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8822B_SUPPORT || RTL8721D_SUPPORT) + #define PHYDM_DC_CANCELLATION +#endif + +#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) + #define CONFIG_ADAPTIVE_SOML +#endif + +#if (RTL8822B_SUPPORT) + /*#define CONFIG_DYNAMIC_RX_PATH*/ +#endif + +#if (RTL8822B_SUPPORT == 1) + /* #define CONFIG_8822B_SPUR_CALIBRATION */ +#endif + +#if (RTL8188E_SUPPORT || RTL8192E_SUPPORT) + #define CONFIG_RECEIVER_BLOCKING +#endif + +#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR +#define CONFIG_DYNAMIC_TX_TWR +#endif +#define PHYDM_SUPPORT_CCKPD +#define PHYDM_SUPPORT_ADAPTIVITY + +/*Antenna Diversity*/ +#ifdef CONFIG_ANTENNA_DIVERSITY + #define CONFIG_PHYDM_ANTENNA_DIVERSITY + + #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + + #if (RTL8723B_SUPPORT || RTL8821A_SUPPORT ||\ + RTL8188F_SUPPORT || RTL8821C_SUPPORT) + #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY + #endif + + #if (RTL8821A_SUPPORT) + /*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ + #endif + + #if (RTL8822B_SUPPORT) + /*#define CONFIG_HL_SMART_ANTENNA_TYPE2*/ + #endif + #endif +#endif + +/*[SmartAntenna]*/ +/*#define CONFIG_SMART_ANTENNA*/ +#ifdef CONFIG_SMART_ANTENNA + /*#define CONFIG_CUMITEK_SMART_ANTENNA*/ +#endif +/* --------------------------------------------------*/ + +#ifdef CONFIG_DFS_MASTER + #define CONFIG_PHYDM_DFS_MASTER +#endif + +#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8881A_SUPPORT ||\ + RTL8192E_SUPPORT || RTL8723B_SUPPORT) + /*#define CONFIG_RA_FW_DBG_CODE*/ +#endif + +#define CONFIG_PSD_TOOL +/*#define CONFIG_RA_DBG_CMD*/ +/*#define CONFIG_ANT_DETECTION*/ +/*#define CONFIG_PATH_DIVERSITY*/ +/*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ +#define CONFIG_BB_TXBF_API +#define CONFIG_PHYDM_DEBUG_FUNCTION + +#ifdef CONFIG_BT_COEXIST + #define ODM_CONFIG_BT_COEXIST +#endif +#define PHYDM_SUPPORT_RSSI_MONITOR +/*#define PHYDM_AUTO_DEGBUG*/ +#define CFG_DIG_DAMPING_CHK + +#ifdef PHYDM_BEAMFORMING_SUPPORT + #if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\ + RTL8822C_SUPPORT || RTL8814B_SUPPORT) + #define DRIVER_BEAMFORMING_VERSION2 + #endif +#endif + +#endif diff --git a/hal/phydm/phydm_features_win.h b/hal/phydm/phydm_features_win.h index 47b8bef..dc6252e 100644 --- a/hal/phydm/phydm_features_win.h +++ b/hal/phydm/phydm_features_win.h @@ -16,59 +16,116 @@ #ifndef __PHYDM_FEATURES_WIN_H__ #define __PHYDM_FEATURES_WIN_H__ -#if (RTL8822B_SUPPORT == 1 || RTL8812A_SUPPORT == 1 || RTL8197F_SUPPORT == 1) +#if (RTL8814A_SUPPORT || RTL8821C_SUPPORT || RTL8822B_SUPPORT ||\ + RTL8197F_SUPPORT || RTL8192F_SUPPORT || RTL8198F_SUPPORT ||\ + RTL8822C_SUPPORT || RTL8814B_SUPPORT) + #define PHYDM_LA_MODE_SUPPORT 1 +#else + #define PHYDM_LA_MODE_SUPPORT 0 +#endif + +#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\ + RTL8192F_SUPPORT) #define DYN_ANT_WEIGHTING_SUPPORT #endif -#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) +#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT) #define FAHM_SUPPORT #endif #define NHM_SUPPORT #define CLM_SUPPORT -#if (RTL8822B_SUPPORT == 1) +#if (RTL8822C_SUPPORT) + #define NHM_DYM_PW_TH_SUPPORT +#endif + +#if (RTL8822B_SUPPORT) /*#define PHYDM_PHYSTAUS_SMP_MODE*/ #endif /*#define PHYDM_TDMA_DIG_SUPPORT*/ -/*#define PHYDM_LNA_SAT_CHK_SUPPORT*/ -#if (RTL8822B_SUPPORT == 1) +#if (RTL8814B_SUPPORT) + /*#define PHYDM_TDMA_DIG_SUPPORT*/ + #ifdef PHYDM_TDMA_DIG_SUPPORT + /*#define IS_USE_NEW_TDMA*/ /*new tdma dig test*/ + #endif +#endif + +#if (RTL8197F_SUPPORT || RTL8822B_SUPPORT || RTL8814B_SUPPORT) + /*#define PHYDM_LNA_SAT_CHK_SUPPORT*/ + #ifdef PHYDM_LNA_SAT_CHK_SUPPORT + + #if (RTL8197F_SUPPORT) + /*#define PHYDM_LNA_SAT_CHK_SUPPORT_TYPE1*/ + #endif + + #if (RTL8822B_SUPPORT) + /*#define PHYDM_LNA_SAT_CHK_TYPE2*/ + #endif + + #if (RTL8814B_SUPPORT) + /*#define PHYDM_LNA_SAT_CHK_TYPE1*/ + #endif + #endif +#endif + +#if (RTL8822B_SUPPORT || RTL8710B_SUPPORT || RTL8723D_SUPPORT ||\ + RTL8192F_SUPPORT) #define PHYDM_POWER_TRAINING_SUPPORT #endif -#if (RTL8822B_SUPPORT == 1) +#if (RTL8822C_SUPPORT || RTL8814B_SUPPORT) + #define PHYDM_PMAC_TX_SETTING_SUPPORT +#endif + +#if (RTL8822C_SUPPORT || RTL8814B_SUPPORT) + #define PHYDM_MP_SUPPORT +#endif + +#if (RTL8822B_SUPPORT) #define PHYDM_TXA_CALIBRATION #endif -#if (RTL8188E_SUPPORT == 1 || RTL8192E_SUPPORT == 1) +#if (RTL8188E_SUPPORT || RTL8192E_SUPPORT) #define PHYDM_PRIMARY_CCA #endif -#if (RTL8188F_SUPPORT == 1 || RTL8710B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8822B_SUPPORT == 1) +#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8822B_SUPPORT || RTL8192F_SUPPORT) #define PHYDM_DC_CANCELLATION #endif -#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1) - /*#define CONFIG_ADAPTIVE_SOML*/ +#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) + #define CONFIG_ADAPTIVE_SOML #endif +#if (RTL8192F_SUPPORT == 1) + #define CONFIG_8912F_SPUR_CALIBRATION +#endif /*Antenna Diversity*/ #define CONFIG_PHYDM_ANTENNA_DIVERSITY #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY - #if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) + #if (RTL8723B_SUPPORT || RTL8821A_SUPPORT || RTL8188F_SUPPORT ||\ + RTL8821C_SUPPORT || RTL8723D_SUPPORT) #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY #endif + #if (RTL8822B_SUPPORT) + /*#define ODM_EVM_ENHANCE_ANTDIV*/ + /*#define CONFIG_2T3R_ANTENNA*/ + /*#define CONFIG_2T4R_ANTENNA*/ + #endif + /* --[SmtAnt]-----------------------------------------*/ - #if (RTL8821A_SUPPORT == 1) + #if (RTL8821A_SUPPORT) /*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ #define CONFIG_FAT_PATCH #endif - #if (RTL8822B_SUPPORT == 1) + #if (RTL8822B_SUPPORT) /*#define CONFIG_HL_SMART_ANTENNA_TYPE2*/ #endif @@ -80,41 +137,60 @@ #endif +#if (RTL8822C_SUPPORT) + #define CONFIG_PATH_DIVERSITY +#endif + /*[SmartAntenna]*/ #define CONFIG_SMART_ANTENNA #ifdef CONFIG_SMART_ANTENNA - /*#define CONFIG_CUMITEK_SMART_ANTENNA*/ + /*#define CONFIG_CUMITEK_SMART_ANTENNA*/ #endif /* --------------------------------------------------*/ -#if (RTL8822B_SUPPORT == 1) - /*#define CONFIG_DYNAMIC_RX_PATH*/ -#endif - -#if (RTL8188E_SUPPORT == 1 || RTL8192E_SUPPORT == 1) +#if (RTL8188E_SUPPORT || RTL8192E_SUPPORT) #define CONFIG_RECEIVER_BLOCKING #endif -#if (RTL8812A_SUPPORT == 1 || RTL8821A_SUPPORT == 1 || RTL8881A_SUPPORT == 1 || RTL8192E_SUPPORT == 1 || RTL8723B_SUPPORT == 1) +#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8881A_SUPPORT ||\ + RTL8192E_SUPPORT || RTL8723B_SUPPORT) #define CONFIG_RA_FW_DBG_CODE #endif -/* #define CONFIG_DYNAMIC_TX_TWR */ -/*#define PHYDM_DIG_MODE_DECISION_SUPPORT */ +/* #ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR */ +#define CONFIG_DYNAMIC_TX_TWR +/* #endif */ #define CONFIG_PSD_TOOL +#define PHYDM_SUPPORT_ADAPTIVITY #define PHYDM_SUPPORT_CCKPD -#define RA_MASK_PHYDMLIZE_WIN -/*#define CONFIG_PATH_DIVERSITY*/ /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ #define CONFIG_ANT_DETECTION -/*#define CONFIG_RA_DBG_CMD*/ #define CONFIG_BB_TXBF_API #define ODM_CONFIG_BT_COEXIST -#define PHYDM_3RD_REFORM_RA_MASK -#define PHYDM_3RD_REFORM_RSSI_MONOTOR #define CONFIG_PHYDM_DFS_MASTER #define PHYDM_SUPPORT_RSSI_MONITOR #define PHYDM_AUTO_DEGBUG #define CONFIG_PHYDM_DEBUG_FUNCTION +#define CFG_DIG_DAMPING_CHK + +#ifdef PHYDM_BEAMFORMING_SUPPORT + #if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8192E_SUPPORT ||\ + RTL8814A_SUPPORT || RTL8881A_SUPPORT) + #define PHYDM_BEAMFORMING_VERSION1 + #endif + #if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\ + RTL8822C_SUPPORT || RTL8814B_SUPPORT) + #define DRIVER_BEAMFORMING_VERSION2 + #endif +#endif + +#if (RTL8822B_SUPPORT || RTL8192F_SUPPORT) + /*#define CONFIG_DIRECTIONAL_BF*/ +#endif + +#if (RTL8822C_SUPPORT) + #define CONFIG_MU_RSOML +#endif #endif diff --git a/hal/phydm/phydm_hwconfig.c b/hal/phydm/phydm_hwconfig.c index 9e4a6fd..abc3114 100644 --- a/hal/phydm/phydm_hwconfig.c +++ b/hal/phydm/phydm_hwconfig.c @@ -23,9 +23,9 @@ * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" @@ -33,47 +33,45 @@ #define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(dm)) #define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(dm)) - #if (PHYDM_TESTCHIP_SUPPORT == 1) -#define READ_AND_CONFIG(ic, txt) do {\ - if (dm->is_mp_chip)\ - READ_AND_CONFIG_MP(ic, txt);\ - else\ - READ_AND_CONFIG_TC(ic, txt);\ +#define READ_AND_CONFIG(ic, txt) \ + do { \ + if (dm->is_mp_chip) \ + READ_AND_CONFIG_MP(ic, txt); \ + else \ + READ_AND_CONFIG_TC(ic, txt); \ } while (0) #else -#define READ_AND_CONFIG READ_AND_CONFIG_MP +#define READ_AND_CONFIG READ_AND_CONFIG_MP #endif -#define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt()) -#define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt()) +#define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt()) +#define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt()) #if (PHYDM_TESTCHIP_SUPPORT == 1) - #define GET_VERSION(ic, txt) (dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt)) +#define GET_VERSION(ic, txt) (dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt)) #else - #define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt) +#define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt) #endif enum hal_status -odm_config_rf_with_header_file( - struct dm_struct *dm, - enum odm_rf_config_type config_type, - u8 e_rf_path -) +odm_config_rf_with_header_file(struct dm_struct *dm, + enum odm_rf_config_type config_type, + u8 e_rf_path) { #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; - PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; + void *adapter = dm->adapter; + PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; #endif - enum hal_status result = HAL_STATUS_SUCCESS; + enum hal_status result = HAL_STATUS_SUCCESS; + PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__, + (dm->is_mp_chip) ? "MPChip" : "TestChip"); PHYDM_DBG(dm, ODM_COMP_INIT, - "===>odm_config_rf_with_header_file (%s)\n", (dm->is_mp_chip) ? "MPChip" : "TestChip"); - PHYDM_DBG(dm, ODM_COMP_INIT, - "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n", - dm->support_platform, dm->support_interface, dm->board_type); + "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n", + dm->support_platform, dm->support_interface, dm->board_type); - /* 1 AP doesn't use PHYDM power tracking table in these ICs */ +/* @1 AP doesn't use PHYDM power tracking table in these ICs */ #if (DM_ODM_SUPPORT_TYPE != ODM_AP) #if (RTL8812A_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8812) { @@ -84,7 +82,7 @@ odm_config_rf_with_header_file( READ_AND_CONFIG_MP(8812a, _radiob); } else if (config_type == CONFIG_RF_TXPWR_LMT) { #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter)); if ((hal_data->EEPROMSVID == 0x17AA && hal_data->EEPROMSMID == 0xA811) || (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0xA812) || (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0x8812)) @@ -127,8 +125,8 @@ odm_config_rf_with_header_file( else if (e_rf_path == RF_PATH_B) READ_AND_CONFIG_MP(8192e, _radiob); } else if (config_type == CONFIG_RF_TXPWR_LMT) { -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) /*Refine by Vincent Lan for 5mm SAR pwr limit*/ - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) /*Refine by Vincent Lan for 5mm SAR pwr limit*/ + HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter)); if ((hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8192) || (hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8193)) @@ -144,11 +142,12 @@ odm_config_rf_with_header_file( if (config_type == CONFIG_RF_RADIO) { if (e_rf_path == RF_PATH_A) READ_AND_CONFIG_MP(8723d, _radioa); - } else if (config_type == CONFIG_RF_TXPWR_LMT) + } else if (config_type == CONFIG_RF_TXPWR_LMT) { READ_AND_CONFIG_MP(8723d, _txpwr_lmt); + } } #endif -/* JJ ADD 20161014 */ +/* @JJ ADD 20161014 */ #if (RTL8710B_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8710B) { if (config_type == CONFIG_RF_RADIO) { @@ -159,9 +158,8 @@ odm_config_rf_with_header_file( } #endif -#endif/* (DM_ODM_SUPPORT_TYPE != ODM_AP) */ - - /* 1 All platforms support */ +#endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */ +/* @1 All platforms support */ #if (RTL8188E_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8188E) { if (config_type == CONFIG_RF_RADIO) { @@ -192,21 +190,21 @@ odm_config_rf_with_header_file( READ_AND_CONFIG_MP(8814a, _radiod); } else if (config_type == CONFIG_RF_TXPWR_LMT) { if (dm->rfe_type == 0) - READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type0); + READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type0); else if (dm->rfe_type == 1) - READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type1); + READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type1); else if (dm->rfe_type == 2) - READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type2); + READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type2); else if (dm->rfe_type == 3) - READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type3); + READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type3); else if (dm->rfe_type == 5) - READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type5); + READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type5); else if (dm->rfe_type == 7) - READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type7); + READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type7); else if (dm->rfe_type == 8) - READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type8); + READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type8); else - READ_AND_CONFIG_MP(8814a,_txpwr_lmt); + READ_AND_CONFIG_MP(8814a, _txpwr_lmt); } } #endif @@ -251,9 +249,10 @@ odm_config_rf_with_header_file( READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type16); else if (dm->rfe_type == 17) READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type17); + else if (dm->rfe_type == 18) + READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type18); else READ_AND_CONFIG_MP(8822b, _txpwr_lmt); - } } #endif @@ -268,28 +267,202 @@ odm_config_rf_with_header_file( } } #endif - +/*@jj add 20170822*/ +#if (RTL8192F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8192F) { + if (config_type == CONFIG_RF_RADIO) { + if (e_rf_path == RF_PATH_A) + READ_AND_CONFIG_MP(8192f, _radioa); + else if (e_rf_path == RF_PATH_B) + READ_AND_CONFIG_MP(8192f, _radiob); + } else if (config_type == CONFIG_RF_TXPWR_LMT) { + if (dm->rfe_type == 0) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type0); + else if (dm->rfe_type == 1) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type1); + else if (dm->rfe_type == 2) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type2); + else if (dm->rfe_type == 3) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type3); + else if (dm->rfe_type == 4) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type4); + else if (dm->rfe_type == 5) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type5); + else if (dm->rfe_type == 6) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type6); + else if (dm->rfe_type == 7) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type7); + else if (dm->rfe_type == 8) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type8); + else if (dm->rfe_type == 9) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type9); + else if (dm->rfe_type == 10) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type10); + else if (dm->rfe_type == 11) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type11); + else if (dm->rfe_type == 12) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type12); + else if (dm->rfe_type == 13) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type13); + else if (dm->rfe_type == 14) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type14); + else if (dm->rfe_type == 15) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type15); + else if (dm->rfe_type == 16) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type16); + else if (dm->rfe_type == 17) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type17); + else if (dm->rfe_type == 18) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type18); + else if (dm->rfe_type == 19) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type19); + else if (dm->rfe_type == 20) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type20); + else if (dm->rfe_type == 21) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type21); + else if (dm->rfe_type == 22) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type22); + else if (dm->rfe_type == 23) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type23); + else if (dm->rfe_type == 24) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type24); + else if (dm->rfe_type == 25) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type25); + else if (dm->rfe_type == 26) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type26); + else if (dm->rfe_type == 27) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type27); + else if (dm->rfe_type == 28) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type28); + else if (dm->rfe_type == 29) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type29); + else if (dm->rfe_type == 30) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type30); + else if (dm->rfe_type == 31) + READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type31); + else + READ_AND_CONFIG_MP(8192f, _txpwr_lmt); + } + } +#endif +#if (RTL8721D_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8721D) { + if (config_type == CONFIG_RF_RADIO) { + if (e_rf_path == RF_PATH_A) + READ_AND_CONFIG_MP(8721d, _radioa); + } else if (config_type == CONFIG_RF_TXPWR_LMT) + READ_AND_CONFIG_MP(8721d, _txpwr_lmt); + } +#endif #if (RTL8821C_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8821C) { if (config_type == CONFIG_RF_RADIO) { if (e_rf_path == RF_PATH_A) READ_AND_CONFIG(8821c, _radioa); - } else if (config_type == CONFIG_RF_TXPWR_LMT) + } else if (config_type == CONFIG_RF_TXPWR_LMT) { READ_AND_CONFIG(8821c, _txpwr_lmt); + } } #endif +#if (RTL8195B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8195B) { + if (config_type == CONFIG_RF_RADIO) { + if (e_rf_path == RF_PATH_A) + READ_AND_CONFIG(8195b, _radioa); + } + #if 0 + else if (config_type == CONFIG_RF_TXPWR_LMT) { + READ_AND_CONFIG(8821c, _txpwr_lmt); + /*@*/ + } + #endif + } +#endif +#if (RTL8198F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8198F) { + if (config_type == CONFIG_RF_RADIO) { + if (e_rf_path == RF_PATH_A) + READ_AND_CONFIG_MP(8198f, _radioa); + else if (e_rf_path == RF_PATH_B) + READ_AND_CONFIG_MP(8198f, _radiob); + else if (e_rf_path == RF_PATH_C) + READ_AND_CONFIG_MP(8198f, _radioc); + else if (e_rf_path == RF_PATH_D) + READ_AND_CONFIG_MP(8198f, _radiod); + } + } +#endif +/*#if (RTL8814B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8814B) { + if (config_type == CONFIG_RF_RADIO) { + if (e_rf_path == RF_PATH_A) + READ_AND_CONFIG_MP(8814b, _radioa); + else if (e_rf_path == RF_PATH_B) + READ_AND_CONFIG_MP(8814b, _radiob); + else if (e_rf_path == RF_PATH_C) + READ_AND_CONFIG_MP(8814b, _radioc); + else if (e_rf_path == RF_PATH_D) + READ_AND_CONFIG_MP(8814b, _radiod); + } + } +#endif +*/ +#if (RTL8822C_SUPPORT) + if (dm->support_ic_type == ODM_RTL8822C) { + if (config_type == CONFIG_RF_RADIO) { + if (e_rf_path == RF_PATH_A) + READ_AND_CONFIG_MP(8822c, _radioa); + else if (e_rf_path == RF_PATH_B) + READ_AND_CONFIG_MP(8822c, _radiob); + } else if (config_type == CONFIG_RF_TXPWR_LMT) { + READ_AND_CONFIG_MP(8822c, _txpwr_lmt); + } + } +#endif +#if (RTL8812F_SUPPORT) + if (dm->support_ic_type == ODM_RTL8812F) { + if (config_type == CONFIG_RF_RADIO) { + if (e_rf_path == RF_PATH_A) + READ_AND_CONFIG_MP(8812f, _radioa); + else if (e_rf_path == RF_PATH_B) + READ_AND_CONFIG_MP(8812f, _radiob); + } + } +#endif + + /*8814B need review, when phydm has related files*/ + #if (RTL8814B_SUPPORT) + if (dm->support_ic_type == ODM_RTL8814B) { + if (config_type == CONFIG_RF_RADIO) { + if (e_rf_path == RF_PATH_A) + READ_AND_CONFIG_MP(8814b, _radioa); + else if (e_rf_path == RF_PATH_B) + READ_AND_CONFIG_MP(8814b, _radiob); + else if (e_rf_path == RF_PATH_C) + READ_AND_CONFIG_MP(8814b, _radioc); + else if (e_rf_path == RF_PATH_D) + READ_AND_CONFIG_MP(8814b, _radiod); + } + if (config_type == CONFIG_RF_SYN_RADIO) { + if (e_rf_path == RF_SYN0) + READ_AND_CONFIG_MP(8814b, _radiosyn0); + else if (e_rf_path == RF_SYN1) + READ_AND_CONFIG_MP(8814b, _radiosyn1); + } + } + #endif if (config_type == CONFIG_RF_RADIO) { if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) { result = phydm_set_reg_by_fw(dm, - PHYDM_HALMAC_CMD_END, - 0, - 0, - 0, - (enum rf_path)0, - 0); + PHYDM_HALMAC_CMD_END, + 0, + 0, + 0, + (enum rf_path)0, + 0); PHYDM_DBG(dm, ODM_COMP_INIT, - "rf param offload end!result = %d", result); + "rf param offload end!result = %d", result); } } @@ -297,18 +470,15 @@ odm_config_rf_with_header_file( } enum hal_status -odm_config_rf_with_tx_pwr_track_header_file( - struct dm_struct *dm -) +odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct *dm) { + PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__, + (dm->is_mp_chip) ? "MPChip" : "TestChip"); PHYDM_DBG(dm, ODM_COMP_INIT, - "===>odm_config_rf_with_tx_pwr_track_header_file (%s)\n", (dm->is_mp_chip) ? "MPChip" : "TestChip"); - PHYDM_DBG(dm, ODM_COMP_INIT, - "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n", - dm->support_platform, dm->support_interface, dm->board_type); + "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n", + dm->support_platform, dm->support_interface, dm->board_type); - - /* 1 AP doesn't use PHYDM power tracking table in these ICs */ +/* @1 AP doesn't use PHYDM power tracking table in these ICs */ #if (DM_ODM_SUPPORT_TYPE != ODM_AP) #if RTL8821A_SUPPORT if (dm->support_ic_type == ODM_RTL8821) { @@ -330,7 +500,6 @@ odm_config_rf_with_tx_pwr_track_header_file( else READ_AND_CONFIG_MP(8812a, _txpowertrack_usb); } - } #endif #if RTL8192E_SUPPORT @@ -355,28 +524,27 @@ odm_config_rf_with_tx_pwr_track_header_file( READ_AND_CONFIG_MP(8723d, _txxtaltrack); } #endif -/* JJ ADD 20161014 */ +/* @JJ ADD 20161014 */ #if RTL8710B_SUPPORT if (dm->support_ic_type == ODM_RTL8710B) { if (dm->package_type == 1) READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_smic); else if (dm->package_type == 5) READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_umc); - + READ_AND_CONFIG_MP(8710b, _txxtaltrack); } #endif - #if RTL8188E_SUPPORT if (dm->support_ic_type == ODM_RTL8188E) { - if (odm_get_mac_reg(dm, 0xF0, 0xF000) >= 8) { /*if 0xF0[15:12] >= 8, SMIC*/ + if (odm_get_mac_reg(dm, R_0xf0, 0xF000) >= 8) { /*@if 0xF0[15:12] >= 8, SMIC*/ if (dm->support_interface == ODM_ITRF_PCIE) READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie_icut); else if (dm->support_interface == ODM_ITRF_USB) READ_AND_CONFIG_MP(8188e, _txpowertrack_usb_icut); else if (dm->support_interface == ODM_ITRF_SDIO) READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio_icut); - } else { /*else 0xF0[15:12] < 8, TSMC*/ + } else { /*@else 0xF0[15:12] < 8, TSMC*/ if (dm->support_interface == ODM_ITRF_PCIE) READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie); else if (dm->support_interface == ODM_ITRF_USB) @@ -384,12 +552,10 @@ odm_config_rf_with_tx_pwr_track_header_file( else if (dm->support_interface == ODM_ITRF_SDIO) READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio); } - } #endif -#endif/* (DM_ODM_SUPPORT_TYPE != ODM_AP) */ - - /* 1 All platforms support */ +#endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */ +/* @1 All platforms support */ #if RTL8723B_SUPPORT if (dm->support_ic_type == ODM_RTL8723B) { if (dm->support_interface == ODM_ITRF_PCIE) @@ -428,7 +594,6 @@ odm_config_rf_with_tx_pwr_track_header_file( READ_AND_CONFIG_MP(8703b, _txxtaltrack); } #endif - #if RTL8188F_SUPPORT if (dm->support_ic_type == ODM_RTL8188F) { if (dm->support_interface == ODM_ITRF_USB) @@ -437,7 +602,6 @@ odm_config_rf_with_tx_pwr_track_header_file( READ_AND_CONFIG_MP(8188f, _txpowertrack_sdio); } #endif - #if RTL8822B_SUPPORT if (dm->support_ic_type == ODM_RTL8822B) { if (dm->rfe_type == 0) @@ -474,11 +638,12 @@ odm_config_rf_with_tx_pwr_track_header_file( READ_AND_CONFIG_MP(8822b, _txpowertrack_type16); else if (dm->rfe_type == 17) READ_AND_CONFIG_MP(8822b, _txpowertrack_type17); + else if (dm->rfe_type == 18) + READ_AND_CONFIG_MP(8822b, _txpowertrack_type18); else READ_AND_CONFIG_MP(8822b, _txpowertrack); } #endif - #if RTL8197F_SUPPORT if (dm->support_ic_type == ODM_RTL8197F) { if (dm->rfe_type == 0) @@ -489,7 +654,92 @@ odm_config_rf_with_tx_pwr_track_header_file( READ_AND_CONFIG_MP(8197f, _txpowertrack); } #endif +/*@jj add 20170822*/ +#if RTL8192F_SUPPORT + if (dm->support_ic_type == ODM_RTL8192F) { + if (dm->rfe_type == 0) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type0); + else if (dm->rfe_type == 1) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type1); + else if (dm->rfe_type == 2) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type2); + else if (dm->rfe_type == 3) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type3); + else if (dm->rfe_type == 4) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type4); + else if (dm->rfe_type == 5) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type5); + else if (dm->rfe_type == 6) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type6); + else if (dm->rfe_type == 7) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type7); + else if (dm->rfe_type == 8) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type8); + else if (dm->rfe_type == 9) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type9); + else if (dm->rfe_type == 10) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type10); + else if (dm->rfe_type == 11) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type11); + else if (dm->rfe_type == 12) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type12); + else if (dm->rfe_type == 13) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type13); + else if (dm->rfe_type == 14) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type14); + else if (dm->rfe_type == 15) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type15); + else if (dm->rfe_type == 16) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type16); + else if (dm->rfe_type == 17) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type17); + else if (dm->rfe_type == 18) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type18); + else if (dm->rfe_type == 19) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type19); + else if (dm->rfe_type == 20) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type20); + else if (dm->rfe_type == 21) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type21); + else if (dm->rfe_type == 22) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type22); + else if (dm->rfe_type == 23) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type23); + else if (dm->rfe_type == 24) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type24); + else if (dm->rfe_type == 25) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type25); + else if (dm->rfe_type == 26) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type26); + else if (dm->rfe_type == 27) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type27); + else if (dm->rfe_type == 28) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type28); + else if (dm->rfe_type == 29) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type29); + else if (dm->rfe_type == 30) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type30); + else if (dm->rfe_type == 31) + READ_AND_CONFIG_MP(8192f, _txpowertrack_type31); + else + READ_AND_CONFIG_MP(8192f, _txpowertrack); + READ_AND_CONFIG_MP(8192f, _txxtaltrack); + } +#endif + +#if RTL8721D_SUPPORT + if (dm->support_ic_type == ODM_RTL8721D) { + #if 0 + if (dm->package_type == 1) + READ_AND_CONFIG_MP(8721d, _txpowertrack_qfn48m_smic); + else if (dm->package_type == 5) + READ_AND_CONFIG_MP(8721d, _txpowertrack_qfn48m_umc); + #endif + READ_AND_CONFIG_MP(8721d, _txpowertrack); + READ_AND_CONFIG_MP(8721d, _txxtaltrack); + } +#endif #if RTL8821C_SUPPORT if (dm->support_ic_type == ODM_RTL8821C) { if (dm->rfe_type == 0x5) @@ -501,22 +751,53 @@ odm_config_rf_with_tx_pwr_track_header_file( } #endif +#if RTL8198F_SUPPORT + if (dm->support_ic_type == ODM_RTL8198F) { + if (dm->rfe_type == 0) + READ_AND_CONFIG_MP(8198f, _txpowertrack_type0); + else if (dm->rfe_type == 1) + READ_AND_CONFIG_MP(8198f, _txpowertrack_type1); + else + READ_AND_CONFIG_MP(8198f, _txpowertrack); + } +#endif + +#if RTL8195B_SUPPORT + if (dm->support_ic_type == ODM_RTL8195B) { + READ_AND_CONFIG_MP(8195b, _txpowertrack); + READ_AND_CONFIG_MP(8195b, _txxtaltrack); + } +#endif + +#if (RTL8822C_SUPPORT) + if (dm->support_ic_type == ODM_RTL8822C) + READ_AND_CONFIG_MP(8822c, _txpowertrack); +#endif + +#if (RTL8812F_SUPPORT) + if (dm->support_ic_type == ODM_RTL8812F) + READ_AND_CONFIG_MP(8812f, _txpowertrack); +#endif + +#if RTL8814B_SUPPORT + if (dm->support_ic_type == ODM_RTL8814B) + READ_AND_CONFIG_MP(8814b, _txpowertrack); +#endif + return HAL_STATUS_SUCCESS; } enum hal_status -odm_config_bb_with_header_file( - struct dm_struct *dm, - enum odm_bb_config_type config_type -) +odm_config_bb_with_header_file(struct dm_struct *dm, + enum odm_bb_config_type config_type) { #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; - PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; + void *adapter = dm->adapter; + PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; #endif - enum hal_status result = HAL_STATUS_SUCCESS; + enum hal_status result = HAL_STATUS_SUCCESS; - /* 1 AP doesn't use PHYDM initialization in these ICs */ +/* @1 AP doesn't use PHYDM initialization in these ICs */ #if (DM_ODM_SUPPORT_TYPE != ODM_AP) #if (RTL8812A_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8812) { @@ -531,7 +812,7 @@ odm_config_bb_with_header_file( else if (mgnt_info->CustomerID == RT_CID_WNC_NEC && dm->is_mp_chip) READ_AND_CONFIG_MP(8812a, _phy_reg_pg_nec); #if RT_PLATFORM == PLATFORM_MACOSX - /*{1827}{1024} for BUFFALO power by rate table. Isaiah 2013-11-29*/ + /*@{1827}{1024} for BUFFALO power by rate table. Isaiah 2013-11-29*/ else if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) READ_AND_CONFIG_MP(8812a, _phy_reg_pg_dni); /* TP-Link T4UH, Isaiah 2015-03-16*/ @@ -547,8 +828,8 @@ odm_config_bb_with_header_file( READ_AND_CONFIG_MP(8812a, _phy_reg_mp); else if (config_type == CONFIG_BB_AGC_TAB_DIFF) { dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD; - /*AGC_TAB DIFF dont support FW offload*/ - if ((*dm->channel >= 36) && (*dm->channel <= 64)) + /*@AGC_TAB DIFF dont support FW offload*/ + if ((*dm->channel >= 36) && (*dm->channel <= 64)) AGC_DIFF_CONFIG_MP(8812a, lb); else if (*dm->channel >= 100) AGC_DIFF_CONFIG_MP(8812a, hb); @@ -564,24 +845,24 @@ odm_config_bb_with_header_file( else if (config_type == CONFIG_BB_PHY_REG_PG) { #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter)); if ((hal_data->EEPROMSVID == 0x1043 && hal_data->EEPROMSMID == 0x207F)) READ_AND_CONFIG_MP(8821a, _phy_reg_pg_e202_sa); else #endif #if (RT_PLATFORM == PLATFORM_MACOSX) - /*{1827}{1022} for BUFFALO power by rate table. Isaiah 2013-10-18*/ + /*@ for BUFFALO pwr by rate table */ if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) { - /*{1024} for BUFFALO power by rate table. (JP/US)*/ - if (mgnt_info->ChannelPlan == RT_CHANNEL_DOMAIN_US_2G_CANADA_5G) - READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_us); - else - READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_jp); - } else + /*@ for BUFFALO pwr by rate table (JP/US)*/ + if (mgnt_info->ChannelPlan == RT_CHANNEL_DOMAIN_US_2G_CANADA_5G) + READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_us); + else + READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_jp); + } else #endif #endif - READ_AND_CONFIG_MP(8821a, _phy_reg_pg); + READ_AND_CONFIG_MP(8821a, _phy_reg_pg); } } #endif @@ -605,7 +886,7 @@ odm_config_bb_with_header_file( READ_AND_CONFIG_MP(8723d, _phy_reg_pg); } #endif -/* JJ ADD 20161014 */ +/* @JJ ADD 20161014 */ #if (RTL8710B_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8710B) { if (config_type == CONFIG_BB_PHY_REG) @@ -617,10 +898,8 @@ odm_config_bb_with_header_file( } #endif -#endif/* (DM_ODM_SUPPORT_TYPE != ODM_AP) */ - - - /* 1 All platforms support */ +#endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */ +/* @1 All platforms support */ #if (RTL8188E_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8188E) { if (config_type == CONFIG_BB_PHY_REG) @@ -649,23 +928,22 @@ odm_config_bb_with_header_file( READ_AND_CONFIG_MP(8814a, _agc_tab); else if (config_type == CONFIG_BB_PHY_REG_PG) { if (dm->rfe_type == 0) - READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type0); + READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type0); else if (dm->rfe_type == 2) - READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type2); + READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type2); else if (dm->rfe_type == 3) - READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type3); + READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type3); else if (dm->rfe_type == 4) - READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type4); + READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type4); else if (dm->rfe_type == 5) - READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type5); + READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type5); else if (dm->rfe_type == 7) - READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type7); + READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type7); else if (dm->rfe_type == 8) - READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type8); + READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type8); else - READ_AND_CONFIG_MP(8814a,_phy_reg_pg); - } - else if (config_type == CONFIG_BB_PHY_REG_MP) + READ_AND_CONFIG_MP(8814a, _phy_reg_pg); + } else if (config_type == CONFIG_BB_PHY_REG_MP) READ_AND_CONFIG_MP(8814a, _phy_reg_mp); } #endif @@ -691,11 +969,11 @@ odm_config_bb_with_header_file( #endif #if (RTL8822B_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8822B) { - if (config_type == CONFIG_BB_PHY_REG) + if (config_type == CONFIG_BB_PHY_REG) { READ_AND_CONFIG_MP(8822b, _phy_reg); - else if (config_type == CONFIG_BB_AGC_TAB) + } else if (config_type == CONFIG_BB_AGC_TAB) { READ_AND_CONFIG_MP(8822b, _agc_tab); - else if (config_type == CONFIG_BB_PHY_REG_PG) { + } else if (config_type == CONFIG_BB_PHY_REG_PG) { if (dm->rfe_type == 2) READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type2); else if (dm->rfe_type == 3) @@ -712,6 +990,8 @@ odm_config_bb_with_header_file( READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type16); else if (dm->rfe_type == 17) READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type17); + else if (dm->rfe_type == 18) + READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type18); else READ_AND_CONFIG_MP(8822b, _phy_reg_pg); } @@ -728,14 +1008,100 @@ odm_config_bb_with_header_file( READ_AND_CONFIG_MP(8197f, _agc_tab); } #endif - +/*@jj add 20170822*/ +#if (RTL8192F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8192F) { + if (config_type == CONFIG_BB_PHY_REG) { + READ_AND_CONFIG_MP(8192f, _phy_reg); + } else if (config_type == CONFIG_BB_AGC_TAB) { + READ_AND_CONFIG_MP(8192f, _agc_tab); + } else if (config_type == CONFIG_BB_PHY_REG_PG) { + if (dm->rfe_type == 0) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type0); + else if (dm->rfe_type == 1) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type1); + else if (dm->rfe_type == 2) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type2); + else if (dm->rfe_type == 3) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type3); + else if (dm->rfe_type == 4) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type4); + else if (dm->rfe_type == 5) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type5); + else if (dm->rfe_type == 6) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type6); + else if (dm->rfe_type == 7) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type7); + else if (dm->rfe_type == 8) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type8); + else if (dm->rfe_type == 9) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type9); + else if (dm->rfe_type == 10) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type10); + else if (dm->rfe_type == 11) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type11); + else if (dm->rfe_type == 12) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type12); + else if (dm->rfe_type == 13) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type13); + else if (dm->rfe_type == 14) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type14); + else if (dm->rfe_type == 15) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type15); + else if (dm->rfe_type == 16) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type16); + else if (dm->rfe_type == 17) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type17); + else if (dm->rfe_type == 18) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type18); + else if (dm->rfe_type == 19) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type19); + else if (dm->rfe_type == 20) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type20); + else if (dm->rfe_type == 21) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type21); + else if (dm->rfe_type == 22) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type22); + else if (dm->rfe_type == 23) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type23); + else if (dm->rfe_type == 24) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type24); + else if (dm->rfe_type == 25) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type25); + else if (dm->rfe_type == 26) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type26); + else if (dm->rfe_type == 27) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type27); + else if (dm->rfe_type == 28) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type28); + else if (dm->rfe_type == 29) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type29); + else if (dm->rfe_type == 30) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type30); + else if (dm->rfe_type == 31) + READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type31); + else + READ_AND_CONFIG_MP(8192f, _phy_reg_pg); + } + } +#endif +#if (RTL8721D_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8721D) { + if (config_type == CONFIG_BB_PHY_REG) + READ_AND_CONFIG_MP(8721d, _phy_reg); + else if (config_type == CONFIG_BB_AGC_TAB) + READ_AND_CONFIG_MP(8721d, _agc_tab); + else if (config_type == CONFIG_BB_PHY_REG_PG) + READ_AND_CONFIG_MP(8721d, _phy_reg_pg); + } +#endif #if (RTL8821C_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8821C) { - if (config_type == CONFIG_BB_PHY_REG) + if (config_type == CONFIG_BB_PHY_REG) { READ_AND_CONFIG(8821c, _phy_reg); - else if (config_type == CONFIG_BB_AGC_TAB) { + } else if (config_type == CONFIG_BB_AGC_TAB) { READ_AND_CONFIG(8821c, _agc_tab); - /* According to RFEtype, choosing correct AGC table*/ + /* @According to RFEtype, choosing correct AGC table*/ if (dm->default_rf_set_8821c == SWITCH_TO_BTG) AGC_DIFF_CONFIG_MP(8821c, btg); } else if (config_type == CONFIG_BB_PHY_REG_PG) { @@ -745,13 +1111,14 @@ odm_config_bb_with_header_file( READ_AND_CONFIG(8821c, _phy_reg_pg); } else if (config_type == CONFIG_BB_AGC_TAB_DIFF) { dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD; - /*AGC_TAB DIFF dont support FW offload*/ + /*@AGC_TAB DIFF dont support FW offload*/ if (dm->current_rf_set_8821c == SWITCH_TO_BTG) AGC_DIFF_CONFIG_MP(8821c, btg); else if (dm->current_rf_set_8821c == SWITCH_TO_WLG) AGC_DIFF_CONFIG_MP(8821c, wlg); - } else if (config_type == CONFIG_BB_PHY_REG_MP) + } else if (config_type == CONFIG_BB_PHY_REG_MP) { READ_AND_CONFIG(8821c, _phy_reg_mp); + } } #endif @@ -765,36 +1132,84 @@ odm_config_bb_with_header_file( READ_AND_CONFIG(8195a, _phy_reg_pg); } #endif +#if (RTL8195B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8195B) { + if (config_type == CONFIG_BB_PHY_REG) + READ_AND_CONFIG(8195b, _phy_reg); + else if (config_type == CONFIG_BB_AGC_TAB) + READ_AND_CONFIG(8195b, _agc_tab); + else if (config_type == CONFIG_BB_PHY_REG_PG) + READ_AND_CONFIG(8195b, _phy_reg_pg); + } +#endif +#if (RTL8198F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8198F) { + if (config_type == CONFIG_BB_PHY_REG) + READ_AND_CONFIG_MP(8198f, _phy_reg); + else if (config_type == CONFIG_BB_AGC_TAB) + READ_AND_CONFIG_MP(8198f, _agc_tab); + } +#endif +#if (RTL8814B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8814B) { + if (config_type == CONFIG_BB_PHY_REG) + READ_AND_CONFIG_MP(8814b, _phy_reg); + else if (config_type == CONFIG_BB_AGC_TAB) + READ_AND_CONFIG_MP(8814b, _agc_tab); + else if (config_type == CONFIG_BB_PHY_REG_PG) + READ_AND_CONFIG(8814b, _phy_reg_pg); + } +#endif +#if (RTL8822C_SUPPORT) + if (dm->support_ic_type == ODM_RTL8822C) { + if (config_type == CONFIG_BB_PHY_REG) + READ_AND_CONFIG_MP(8822c, _phy_reg); + else if (config_type == CONFIG_BB_AGC_TAB) + READ_AND_CONFIG_MP(8822c, _agc_tab); + else if (config_type == CONFIG_BB_PHY_REG_PG) + READ_AND_CONFIG(8822c, _phy_reg_pg); + } +#endif +#if (RTL8812F_SUPPORT) + if (dm->support_ic_type == ODM_RTL8812F) { + if (config_type == CONFIG_BB_PHY_REG) + READ_AND_CONFIG_MP(8812f, _phy_reg); + else if (config_type == CONFIG_BB_AGC_TAB) + READ_AND_CONFIG_MP(8812f, _agc_tab); + else if (config_type == CONFIG_BB_PHY_REG_PG) + READ_AND_CONFIG(8812f, _phy_reg_pg); + } +#endif - if (config_type == CONFIG_BB_PHY_REG || config_type == CONFIG_BB_AGC_TAB) + if (config_type == CONFIG_BB_PHY_REG || + config_type == CONFIG_BB_AGC_TAB) if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) { result = phydm_set_reg_by_fw(dm, - PHYDM_HALMAC_CMD_END, - 0, - 0, - 0, - (enum rf_path)0, - 0); + PHYDM_HALMAC_CMD_END, + 0, + 0, + 0, + (enum rf_path)0, + 0); PHYDM_DBG(dm, ODM_COMP_INIT, - "phy param offload end!result = %d", result); + "phy param offload end!result = %d", result); } return result; } enum hal_status -odm_config_mac_with_header_file( - struct dm_struct *dm -) +odm_config_mac_with_header_file(struct dm_struct *dm) { - enum hal_status result = HAL_STATUS_SUCCESS; - PHYDM_DBG(dm, ODM_COMP_INIT, - "===>odm_config_mac_with_header_file (%s)\n", (dm->is_mp_chip) ? "MPChip" : "TestChip"); - PHYDM_DBG(dm, ODM_COMP_INIT, - "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n", - dm->support_platform, dm->support_interface, dm->board_type); + enum hal_status result = HAL_STATUS_SUCCESS; - /* 1 AP doesn't use PHYDM initialization in these ICs */ + PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__, + (dm->is_mp_chip) ? "MPChip" : "TestChip"); + PHYDM_DBG(dm, ODM_COMP_INIT, + "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n", + dm->support_platform, dm->support_interface, dm->board_type); + +/* @1 AP doesn't use PHYDM initialization in these ICs */ #if (DM_ODM_SUPPORT_TYPE != ODM_AP) #if (RTL8812A_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8812) @@ -812,15 +1227,13 @@ odm_config_mac_with_header_file( if (dm->support_ic_type == ODM_RTL8723D) READ_AND_CONFIG_MP(8723d, _mac_reg); #endif -/* JJ ADD 20161014 */ +/* @JJ ADD 20161014 */ #if (RTL8710B_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8710B) READ_AND_CONFIG_MP(8710b, _mac_reg); #endif - -#endif/* (DM_ODM_SUPPORT_TYPE != ODM_AP) */ - - /* 1 All platforms support */ +#endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */ +/* @1 All platforms support */ #if (RTL8188E_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8188E) READ_AND_CONFIG_MP(8188e, _mac_reg); @@ -845,45 +1258,70 @@ odm_config_mac_with_header_file( if (dm->support_ic_type == ODM_RTL8822B) READ_AND_CONFIG_MP(8822b, _mac_reg); #endif - #if (RTL8197F_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8197F) READ_AND_CONFIG_MP(8197f, _mac_reg); #endif +/*@jj add 20170822*/ +#if (RTL8192F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8192F) + READ_AND_CONFIG_MP(8192f, _mac_reg); +#endif + +#if (RTL8721D_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8721D) + READ_AND_CONFIG_MP(8721d, _mac_reg); +#endif #if (RTL8821C_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8821C) READ_AND_CONFIG(8821c, _mac_reg); #endif - #if (RTL8195A_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8195A) READ_AND_CONFIG_MP(8195a, _mac_reg); #endif +#if (RTL8195B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8195B) + READ_AND_CONFIG_MP(8195b, _mac_reg); +#endif +#if (RTL8198F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8198F) + READ_AND_CONFIG_MP(8198f, _mac_reg); +#endif +#if (RTL8814B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8814B) + READ_AND_CONFIG_MP(8814b, _mac_reg); +#endif +#if 0 /*(RTL8822C_SUPPORT)*/ + if (dm->support_ic_type == ODM_RTL8822C) + READ_AND_CONFIG_MP(8822c, _mac_reg); +#endif +#if (RTL8812F_SUPPORT) + if (dm->support_ic_type == ODM_RTL8812F) + READ_AND_CONFIG_MP(8812f, _mac_reg); +#endif if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) { result = phydm_set_reg_by_fw(dm, - PHYDM_HALMAC_CMD_END, - 0, - 0, - 0, - (enum rf_path)0, - 0); + PHYDM_HALMAC_CMD_END, + 0, + 0, + 0, + (enum rf_path)0, + 0); PHYDM_DBG(dm, ODM_COMP_INIT, - "mac param offload end!result = %d", result); + "mac param offload end!result = %d", result); } return result; } -u32 -odm_get_hw_img_version( - struct dm_struct *dm -) +u32 odm_get_hw_img_version(struct dm_struct *dm) { - u32 version = 0; + u32 version = 0; - /* 1 AP doesn't use PHYDM initialization in these ICs */ +/* @1 AP doesn't use PHYDM initialization in these ICs */ #if (DM_ODM_SUPPORT_TYPE != ODM_AP) #if (RTL8821A_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8821) @@ -901,15 +1339,14 @@ odm_get_hw_img_version( if (dm->support_ic_type == ODM_RTL8723D) version = GET_VERSION_MP(8723d, _mac_reg); #endif -/* JJ ADD 20161014 */ +/* @JJ ADD 20161014 */ #if (RTL8710B_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8710B) version = GET_VERSION_MP(8710b, _mac_reg); #endif +#endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */ -#endif /* (DM_ODM_SUPPORT_TYPE != ODM_AP) */ - - /*1 All platforms support*/ +/*@1 All platforms support*/ #if (RTL8188E_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8188E) version = GET_VERSION_MP(8188e, _mac_reg); @@ -934,25 +1371,49 @@ odm_get_hw_img_version( if (dm->support_ic_type == ODM_RTL8822B) version = GET_VERSION_MP(8822b, _mac_reg); #endif - #if (RTL8197F_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8197F) version = GET_VERSION_MP(8197f, _mac_reg); #endif +/*@jj add 20170822*/ +#if (RTL8192F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8192F) + version = GET_VERSION_MP(8192f, _mac_reg); +#endif +#if (RTL8721D_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8721D) + version = GET_VERSION_MP(8721d, _mac_reg); +#endif #if (RTL8821C_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8821C) version = GET_VERSION(8821c, _mac_reg); #endif +#if (RTL8195B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8195B) + version = GET_VERSION(8195b, _mac_reg); +#endif +#if (RTL8198F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8198F) + version = GET_VERSION_MP(8198f, _mac_reg); +#endif +#if 0 /*(RTL8822C_SUPPORT)*/ + if (dm->support_ic_type == ODM_RTL8822C) + version = GET_VERSION_MP(8822c, _mac_reg); +#endif +#if (RTL8812F_SUPPORT) + if (dm->support_ic_type == ODM_RTL8812F) + version = GET_VERSION_MP(8812f, _mac_reg); +#endif +#if (RTL8814B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8814B) + version = GET_VERSION_MP(8814b, _mac_reg); +#endif return version; } - -u32 -query_phydm_trx_capability( - struct dm_struct *dm -) +u32 query_phydm_trx_capability(struct dm_struct *dm) { u32 value32 = 0xFFFFFFFF; @@ -960,14 +1421,14 @@ query_phydm_trx_capability( if (dm->support_ic_type == ODM_RTL8821C) value32 = query_phydm_trx_capability_8821c(dm); #endif - +#if (RTL8195B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8195B) + value32 = query_phydm_trx_capability_8195b(dm); +#endif return value32; } -u32 -query_phydm_stbc_capability( - struct dm_struct *dm -) +u32 query_phydm_stbc_capability(struct dm_struct *dm) { u32 value32 = 0xFFFFFFFF; @@ -975,14 +1436,15 @@ query_phydm_stbc_capability( if (dm->support_ic_type == ODM_RTL8821C) value32 = query_phydm_stbc_capability_8821c(dm); #endif +#if (RTL8195B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8195B) + value32 = query_phydm_stbc_capability_8195b(dm); +#endif return value32; } -u32 -query_phydm_ldpc_capability( - struct dm_struct *dm -) +u32 query_phydm_ldpc_capability(struct dm_struct *dm) { u32 value32 = 0xFFFFFFFF; @@ -990,14 +1452,14 @@ query_phydm_ldpc_capability( if (dm->support_ic_type == ODM_RTL8821C) value32 = query_phydm_ldpc_capability_8821c(dm); #endif - +#if (RTL8195B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8195B) + value32 = query_phydm_ldpc_capability_8195b(dm); +#endif return value32; } -u32 -query_phydm_txbf_parameters( - struct dm_struct *dm -) +u32 query_phydm_txbf_parameters(struct dm_struct *dm) { u32 value32 = 0xFFFFFFFF; @@ -1005,14 +1467,14 @@ query_phydm_txbf_parameters( if (dm->support_ic_type == ODM_RTL8821C) value32 = query_phydm_txbf_parameters_8821c(dm); #endif - +#if (RTL8195B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8195B) + value32 = query_phydm_txbf_parameters_8195b(dm); +#endif return value32; } -u32 -query_phydm_txbf_capability( - struct dm_struct *dm -) +u32 query_phydm_txbf_capability(struct dm_struct *dm) { u32 value32 = 0xFFFFFFFF; @@ -1020,6 +1482,9 @@ query_phydm_txbf_capability( if (dm->support_ic_type == ODM_RTL8821C) value32 = query_phydm_txbf_capability_8821c(dm); #endif - +#if (RTL8195B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8195B) + value32 = query_phydm_txbf_capability_8195b(dm); +#endif return value32; } diff --git a/hal/phydm/phydm_hwconfig.h b/hal/phydm/phydm_hwconfig.h index a695f69..7c4d1e3 100644 --- a/hal/phydm/phydm_hwconfig.h +++ b/hal/phydm/phydm_hwconfig.h @@ -23,81 +23,57 @@ * *****************************************************************************/ - -#ifndef __HALHWOUTSRC_H__ +#ifndef __HALHWOUTSRC_H__ #define __HALHWOUTSRC_H__ - -/*--------------------------Define -------------------------------------------*/ -#define AGC_DIFF_CONFIG_MP(ic, band) (odm_read_and_config_mp_##ic##_agc_tab_diff(dm, array_mp_##ic##_agc_tab_diff_##band, \ - sizeof(array_mp_##ic##_agc_tab_diff_##band)/sizeof(u32))) -#define AGC_DIFF_CONFIG_TC(ic, band) (odm_read_and_config_tc_##ic##_agc_tab_diff(dm, array_tc_##ic##_agc_tab_diff_##band, \ - sizeof(array_tc_##ic##_agc_tab_diff_##band)/sizeof(u32))) - -#define AGC_DIFF_CONFIG(ic, band) do {\ - if (dm->is_mp_chip)\ - AGC_DIFF_CONFIG_MP(ic, band);\ - else\ - AGC_DIFF_CONFIG_TC(ic, band);\ +/*@--------------------------Define -------------------------------------------*/ +#define AGC_DIFF_CONFIG_MP(ic, band) \ + (odm_read_and_config_mp_##ic##_agc_tab_diff(dm, \ + array_mp_##ic##_agc_tab_diff_##band, \ + sizeof(array_mp_##ic##_agc_tab_diff_##band) / sizeof(u32))) +#define AGC_DIFF_CONFIG_TC(ic, band) \ + (odm_read_and_config_tc_##ic##_agc_tab_diff(dm, \ + array_tc_##ic##_agc_tab_diff_##band, \ + sizeof(array_tc_##ic##_agc_tab_diff_##band) / sizeof(u32))) +#if defined(DM_ODM_CE_MAC80211) +#else +#define AGC_DIFF_CONFIG(ic, band) \ + do { \ + if (dm->is_mp_chip) \ + AGC_DIFF_CONFIG_MP(ic, band); \ + else \ + AGC_DIFF_CONFIG_TC(ic, band); \ } while (0) - - -/* ************************************************************ +#endif +/*@************************************************************ * structure and define - * ************************************************************ */ + ************************************************************/ enum hal_status -odm_config_rf_with_tx_pwr_track_header_file( - struct dm_struct *dm -); +odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct *dm); enum hal_status -odm_config_rf_with_header_file( - struct dm_struct *dm, - enum odm_rf_config_type config_type, - u8 e_rf_path -); +odm_config_rf_with_header_file(struct dm_struct *dm, + enum odm_rf_config_type config_type, + u8 e_rf_path); enum hal_status -odm_config_bb_with_header_file( - struct dm_struct *dm, - enum odm_bb_config_type config_type -); +odm_config_bb_with_header_file(struct dm_struct *dm, + enum odm_bb_config_type config_type); enum hal_status -odm_config_mac_with_header_file( - struct dm_struct *dm -); +odm_config_mac_with_header_file(struct dm_struct *dm); -u32 -odm_get_hw_img_version( - struct dm_struct *dm -); +u32 odm_get_hw_img_version(struct dm_struct *dm); +u32 query_phydm_trx_capability(struct dm_struct *dm); -u32 -query_phydm_trx_capability( - struct dm_struct *dm -); +u32 query_phydm_stbc_capability(struct dm_struct *dm); -u32 -query_phydm_stbc_capability( - struct dm_struct *dm -); +u32 query_phydm_ldpc_capability(struct dm_struct *dm); -u32 -query_phydm_ldpc_capability( - struct dm_struct *dm -); +u32 query_phydm_txbf_parameters(struct dm_struct *dm); -u32 -query_phydm_txbf_parameters( - struct dm_struct *dm -); +u32 query_phydm_txbf_capability(struct dm_struct *dm); -u32 -query_phydm_txbf_capability( - struct dm_struct *dm -); - -#endif /*#ifndef __HALHWOUTSRC_H__*/ +#endif /*@#ifndef __HALHWOUTSRC_H__*/ diff --git a/hal/phydm/phydm_interface.c b/hal/phydm/phydm_interface.c index e12bac9..fb8caea 100644 --- a/hal/phydm/phydm_interface.c +++ b/hal/phydm/phydm_interface.c @@ -23,499 +23,508 @@ * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" -/* +/*@ * ODM IO Relative API. - * */ + */ -u8 -odm_read_1byte( - struct dm_struct *dm, - u32 reg_addr -) +u8 odm_read_1byte(struct dm_struct *dm, u32 reg_addr) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - struct rtl8192cd_priv *priv = dm->priv; - return RTL_R8(reg_addr); + struct rtl8192cd_priv *priv = dm->priv; + return RTL_R8(reg_addr); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; return rtl_read_byte(rtlpriv, reg_addr); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + return rtw_read8(rtwdev, reg_addr); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) - void *adapter = dm->adapter; + void *adapter = dm->adapter; return rtw_read8(adapter, reg_addr); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; - return PlatformEFIORead1Byte(adapter, reg_addr); -#endif + void *adapter = dm->adapter; + return PlatformEFIORead1Byte(adapter, reg_addr); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + void *adapter = dm->adapter; + return rtw_read8(adapter, reg_addr); +#endif } - -u16 -odm_read_2byte( - struct dm_struct *dm, - u32 reg_addr -) +u16 odm_read_2byte(struct dm_struct *dm, u32 reg_addr) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - struct rtl8192cd_priv *priv = dm->priv; - return RTL_R16(reg_addr); + struct rtl8192cd_priv *priv = dm->priv; + return RTL_R16(reg_addr); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; return rtl_read_word(rtlpriv, reg_addr); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + return rtw_read16(rtwdev, reg_addr); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) - void *adapter = dm->adapter; + void *adapter = dm->adapter; return rtw_read16(adapter, reg_addr); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; - return PlatformEFIORead2Byte(adapter, reg_addr); -#endif + void *adapter = dm->adapter; + return PlatformEFIORead2Byte(adapter, reg_addr); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + void *adapter = dm->adapter; + return rtw_read16(adapter, reg_addr); +#endif } - -u32 -odm_read_4byte( - struct dm_struct *dm, - u32 reg_addr -) +u32 odm_read_4byte(struct dm_struct *dm, u32 reg_addr) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - struct rtl8192cd_priv *priv = dm->priv; - return RTL_R32(reg_addr); + struct rtl8192cd_priv *priv = dm->priv; + return RTL_R32(reg_addr); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; return rtl_read_dword(rtlpriv, reg_addr); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + return rtw_read32(rtwdev, reg_addr); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) - void *adapter = dm->adapter; + void *adapter = dm->adapter; return rtw_read32(adapter, reg_addr); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; - return PlatformEFIORead4Byte(adapter, reg_addr); -#endif + void *adapter = dm->adapter; + return PlatformEFIORead4Byte(adapter, reg_addr); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + void *adapter = dm->adapter; + return rtw_read32(adapter, reg_addr); +#endif } - -void -odm_write_1byte( - struct dm_struct *dm, - u32 reg_addr, - u8 data -) +void odm_write_1byte(struct dm_struct *dm, u32 reg_addr, u8 data) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - struct rtl8192cd_priv *priv = dm->priv; + struct rtl8192cd_priv *priv = dm->priv; RTL_W8(reg_addr, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; rtl_write_byte(rtlpriv, reg_addr, data); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + rtw_write8(rtwdev, reg_addr, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) - void *adapter = dm->adapter; + void *adapter = dm->adapter; rtw_write8(adapter, reg_addr, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; + void *adapter = dm->adapter; PlatformEFIOWrite1Byte(adapter, reg_addr, data); -#endif +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + void *adapter = dm->adapter; + rtw_write8(adapter, reg_addr, data); +#endif } - -void -odm_write_2byte( - struct dm_struct *dm, - u32 reg_addr, - u16 data -) +void odm_write_2byte(struct dm_struct *dm, u32 reg_addr, u16 data) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - struct rtl8192cd_priv *priv = dm->priv; + struct rtl8192cd_priv *priv = dm->priv; RTL_W16(reg_addr, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; rtl_write_word(rtlpriv, reg_addr, data); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + rtw_write16(rtwdev, reg_addr, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) - void *adapter = dm->adapter; + void *adapter = dm->adapter; rtw_write16(adapter, reg_addr, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; + void *adapter = dm->adapter; PlatformEFIOWrite2Byte(adapter, reg_addr, data); -#endif +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + void *adapter = dm->adapter; + rtw_write16(adapter, reg_addr, data); +#endif } - -void -odm_write_4byte( - struct dm_struct *dm, - u32 reg_addr, - u32 data -) +void odm_write_4byte(struct dm_struct *dm, u32 reg_addr, u32 data) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - struct rtl8192cd_priv *priv = dm->priv; + struct rtl8192cd_priv *priv = dm->priv; RTL_W32(reg_addr, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; rtl_write_dword(rtlpriv, reg_addr, data); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + rtw_write32(rtwdev, reg_addr, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) - void *adapter = dm->adapter; + void *adapter = dm->adapter; rtw_write32(adapter, reg_addr, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; + void *adapter = dm->adapter; PlatformEFIOWrite4Byte(adapter, reg_addr, data); -#endif +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + void *adapter = dm->adapter; + rtw_write32(adapter, reg_addr, data); +#endif } - -void -odm_set_mac_reg( - struct dm_struct *dm, - u32 reg_addr, - u32 bit_mask, - u32 data -) +void odm_set_mac_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask, u32 data) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) phy_set_bb_reg(dm->priv, reg_addr, bit_mask, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - PHY_SetBBReg((PADAPTER)dm->adapter, reg_addr, bit_mask, data); + void *adapter = dm->adapter; + PHY_SetBBReg(adapter, reg_addr, bit_mask, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; rtl_set_bbreg(rtlpriv->hw, reg_addr, bit_mask, data); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + rtw_set_reg_with_mask(rtwdev, reg_addr, bit_mask, data); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + phy_set_bb_reg(dm->adapter, reg_addr, bit_mask, data); #else phy_set_bb_reg(dm->adapter, reg_addr, bit_mask, data); #endif } - -u32 -odm_get_mac_reg( - struct dm_struct *dm, - u32 reg_addr, - u32 bit_mask -) +u32 odm_get_mac_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) return phy_query_bb_reg(dm->priv, reg_addr, bit_mask); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - return PHY_QueryMacReg((PADAPTER)dm->adapter, reg_addr, bit_mask); + return PHY_QueryMacReg(dm->adapter, reg_addr, bit_mask); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; return rtl_get_bbreg(rtlpriv->hw, reg_addr, bit_mask); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + return rtw_get_reg_with_mask(rtwdev, reg_addr, bit_mask); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + return phy_query_bb_reg(dm->adapter, reg_addr, bit_mask); #else return phy_query_mac_reg(dm->adapter, reg_addr, bit_mask); #endif } - -void -odm_set_bb_reg( - struct dm_struct *dm, - u32 reg_addr, - u32 bit_mask, - u32 data -) +void odm_set_bb_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask, u32 data) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) phy_set_bb_reg(dm->priv, reg_addr, bit_mask, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - PHY_SetBBReg((PADAPTER)dm->adapter, reg_addr, bit_mask, data); + void *adapter = dm->adapter; + PHY_SetBBReg(adapter, reg_addr, bit_mask, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; rtl_set_bbreg(rtlpriv->hw, reg_addr, bit_mask, data); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + rtw_set_reg_with_mask(rtwdev, reg_addr, bit_mask, data); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + phy_set_bb_reg(dm->adapter, reg_addr, bit_mask, data); #else phy_set_bb_reg(dm->adapter, reg_addr, bit_mask, data); #endif } - -u32 -odm_get_bb_reg( - struct dm_struct *dm, - u32 reg_addr, - u32 bit_mask -) +u32 odm_get_bb_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) return phy_query_bb_reg(dm->priv, reg_addr, bit_mask); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - return PHY_QueryBBReg((PADAPTER)dm->adapter, reg_addr, bit_mask); + void *adapter = dm->adapter; + return PHY_QueryBBReg(adapter, reg_addr, bit_mask); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; return rtl_get_bbreg(rtlpriv->hw, reg_addr, bit_mask); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + return rtw_get_reg_with_mask(rtwdev, reg_addr, bit_mask); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + return phy_query_bb_reg(dm->adapter, reg_addr, bit_mask); #else return phy_query_bb_reg(dm->adapter, reg_addr, bit_mask); #endif } - -void -odm_set_rf_reg( - struct dm_struct *dm, - u8 e_rf_path, - u32 reg_addr, - u32 bit_mask, - u32 data -) +void odm_set_rf_reg(struct dm_struct *dm, u8 e_rf_path, u32 reg_addr, + u32 bit_mask, u32 data) { #if (DM_ODM_SUPPORT_TYPE & ODM_AP) phy_set_rf_reg(dm->priv, e_rf_path, reg_addr, bit_mask, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - PHY_SetRFReg((PADAPTER)dm->adapter, e_rf_path, reg_addr, bit_mask, data); + void *adapter = dm->adapter; + PHY_SetRFReg(adapter, e_rf_path, reg_addr, bit_mask, data); ODM_delay_us(2); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; rtl_set_rfreg(rtlpriv->hw, e_rf_path, reg_addr, bit_mask, data); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + rtw_write_rf(rtwdev, e_rf_path, reg_addr, bit_mask, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) phy_set_rf_reg(dm->adapter, e_rf_path, reg_addr, bit_mask, data); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + phy_set_rf_reg(dm->adapter, e_rf_path, reg_addr, bit_mask, data); + ODM_delay_us(2); #endif } -u32 -odm_get_rf_reg( - struct dm_struct *dm, - u8 e_rf_path, - u32 reg_addr, - u32 bit_mask -) +u32 odm_get_rf_reg(struct dm_struct *dm, u8 e_rf_path, u32 reg_addr, + u32 bit_mask) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) return phy_query_rf_reg(dm->priv, e_rf_path, reg_addr, bit_mask, 1); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - return PHY_QueryRFReg((PADAPTER)dm->adapter, e_rf_path, reg_addr, bit_mask); + void *adapter = dm->adapter; + return PHY_QueryRFReg(adapter, e_rf_path, reg_addr, bit_mask); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; return rtl_get_rfreg(rtlpriv->hw, e_rf_path, reg_addr, bit_mask); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + return rtw_read_rf(rtwdev, e_rf_path, reg_addr, bit_mask); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + return phy_query_rf_reg(dm->adapter, e_rf_path, reg_addr, bit_mask); #else return phy_query_rf_reg(dm->adapter, e_rf_path, reg_addr, bit_mask); #endif } enum hal_status -phydm_set_reg_by_fw( - struct dm_struct *dm, - enum phydm_halmac_param config_type, - u32 offset, - u32 data, - u32 mask, - enum rf_path e_rf_path, - u32 delay_time -) +phydm_set_reg_by_fw(struct dm_struct *dm, enum phydm_halmac_param config_type, + u32 offset, u32 data, u32 mask, enum rf_path e_rf_path, + u32 delay_time) { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) return HAL_MAC_Config_PHY_WriteNByte(dm, - config_type, - offset, - data, - mask, - e_rf_path, - delay_time); + config_type, + offset, + data, + mask, + e_rf_path, + delay_time); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) #if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) - PHYDM_DBG(dm, ODM_COMP_COMMON, "Not support for CE MAC80211 driver!\n"); + PHYDM_DBG(dm, DBG_CMN, "Not support for CE MAC80211 driver!\n"); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + return -ENOTSUPP; #else return rtw_phydm_cfg_phy_para(dm, - config_type, - offset, - data, - mask, - e_rf_path, - delay_time); + config_type, + offset, + data, + mask, + e_rf_path, + delay_time); #endif +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + PHYDM_DBG(dm, DBG_CMN, "Not support for CE MAC80211 driver!\n"); #endif - } - -/* +/*@ * ODM Memory relative API. - * */ -void -odm_allocate_memory( - struct dm_struct *dm, - void **ptr, - u32 length -) + */ +void odm_allocate_memory(struct dm_struct *dm, void **ptr, u32 length) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) *ptr = kmalloc(length, GFP_ATOMIC); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) *ptr = kmalloc(length, GFP_ATOMIC); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + *ptr = kmalloc(length, GFP_ATOMIC); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) *ptr = rtw_zvmalloc(length); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; + void *adapter = dm->adapter; PlatformAllocateMemory(adapter, ptr, length); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + *ptr = rtw_zvmalloc(length); #endif } -/* length could be ignored, used to detect memory leakage. */ -void -odm_free_memory( - struct dm_struct *dm, - void *ptr, - u32 length -) +/* @length could be ignored, used to detect memory leakage. */ +void odm_free_memory(struct dm_struct *dm, void *ptr, u32 length) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) kfree(ptr); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) kfree(ptr); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + kfree(ptr); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) rtw_vmfree(ptr, length); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) /* struct void* adapter = dm->adapter; */ PlatformFreeMemory(ptr, length); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + rtw_vmfree(ptr, length); #endif } -void -odm_move_memory( - struct dm_struct *dm, - void *dest, - void *src, - u32 length -) +void odm_move_memory(struct dm_struct *dm, void *dest, void *src, u32 length) { #if (DM_ODM_SUPPORT_TYPE & ODM_AP) memcpy(dest, src, length); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) memcpy(dest, src, length); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + memcpy(dest, src, length); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) _rtw_memcpy(dest, src, length); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) PlatformMoveMemory(dest, src, length); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + rtw_memcpy(dest, src, length); #endif } -void odm_memory_set( - struct dm_struct *dm, - void *pbuf, - s8 value, - u32 length -) +void odm_memory_set(struct dm_struct *dm, void *pbuf, s8 value, u32 length) { #if (DM_ODM_SUPPORT_TYPE & ODM_AP) memset(pbuf, value, length); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) memset(pbuf, value, length); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + memset(pbuf, value, length); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) _rtw_memset(pbuf, value, length); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) PlatformFillMemory(pbuf, length, value); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + rtw_memset(pbuf, value, length); #endif } -s32 odm_compare_memory( - struct dm_struct *dm, - void *buf1, - void *buf2, - u32 length -) + +s32 odm_compare_memory(struct dm_struct *dm, void *buf1, void *buf2, u32 length) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) return memcmp(buf1, buf2, length); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) return memcmp(buf1, buf2, length); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + return memcmp(buf1, buf2, length); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) return _rtw_memcmp(buf1, buf2, length); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) return PlatformCompareMemory(buf1, buf2, length); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + return rtw_memcmp(buf1, buf2, length); #endif } - - -/* +/*@ * ODM MISC relative API. - * */ -void -odm_acquire_spin_lock( - struct dm_struct *dm, - enum rt_spinlock_type type -) + */ +void odm_acquire_spin_lock(struct dm_struct *dm, enum rt_spinlock_type type) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; + rtl_odm_acquirespinlock(rtlpriv, type); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + spin_lock(&rtwdev->hal.dm_lock); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) void *adapter = dm->adapter; rtw_odm_acquirespinlock(adapter, type); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; + void *adapter = dm->adapter; PlatformAcquireSpinLock(adapter, type); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + void *adapter = dm->adapter; + + rtw_odm_acquirespinlock(adapter, type); #endif } -void -odm_release_spin_lock( - struct dm_struct *dm, - enum rt_spinlock_type type -) + +void odm_release_spin_lock(struct dm_struct *dm, enum rt_spinlock_type type) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; + rtl_odm_releasespinlock(rtlpriv, type); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + + spin_unlock(&rtwdev->hal.dm_lock); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) void *adapter = dm->adapter; rtw_odm_releasespinlock(adapter, type); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; + void *adapter = dm->adapter; PlatformReleaseSpinLock(adapter, type); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + void *adapter = dm->adapter; + + rtw_odm_releasespinlock(adapter, type); #endif } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -/* +/*@ * Work item relative API. FOr MP driver only~! * */ -void -odm_initialize_work_item( - struct dm_struct *dm, - PRT_WORK_ITEM p_rt_work_item, - RT_WORKITEM_CALL_BACK rt_work_item_callback, - void *context, - const char *sz_id -) +void odm_initialize_work_item( + struct dm_struct *dm, + PRT_WORK_ITEM work_item, + RT_WORKITEM_CALL_BACK callback, + void *context, + const char *id) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; - PlatformInitializeWorkItem(adapter, p_rt_work_item, rt_work_item_callback, context, sz_id); + void *adapter = dm->adapter; + PlatformInitializeWorkItem(adapter, work_item, callback, context, id); #endif } - -void -odm_start_work_item( - PRT_WORK_ITEM p_rt_work_item -) +void odm_start_work_item( + PRT_WORK_ITEM p_rt_work_item) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) @@ -526,11 +535,8 @@ odm_start_work_item( #endif } - -void -odm_stop_work_item( - PRT_WORK_ITEM p_rt_work_item -) +void odm_stop_work_item( + PRT_WORK_ITEM p_rt_work_item) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) @@ -541,11 +547,8 @@ odm_stop_work_item( #endif } - -void -odm_free_work_item( - PRT_WORK_ITEM p_rt_work_item -) +void odm_free_work_item( + PRT_WORK_ITEM p_rt_work_item) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) @@ -556,11 +559,8 @@ odm_free_work_item( #endif } - -void -odm_schedule_work_item( - PRT_WORK_ITEM p_rt_work_item -) +void odm_schedule_work_item( + PRT_WORK_ITEM p_rt_work_item) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) @@ -571,11 +571,9 @@ odm_schedule_work_item( #endif } - boolean odm_is_work_item_scheduled( - PRT_WORK_ITEM p_rt_work_item -) + PRT_WORK_ITEM p_rt_work_item) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) @@ -587,106 +585,110 @@ odm_is_work_item_scheduled( } #endif - -/* +/*@ * ODM Timer relative API. - * */ + */ -void -ODM_delay_ms(u32 ms) +void ODM_delay_ms(u32 ms) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) delay_ms(ms); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) mdelay(ms); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + mdelay(ms); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) rtw_mdelay_os(ms); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) delay_ms(ms); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + rtw_mdelay_os(ms); #endif } -void -ODM_delay_us(u32 us) +void ODM_delay_us(u32 us) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) delay_us(us); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) udelay(us); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + udelay(us); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) rtw_udelay_os(us); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) PlatformStallExecution(us); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + rtw_udelay_os(us); #endif } -void -ODM_sleep_ms(u32 ms) +void ODM_sleep_ms(u32 ms) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) delay_ms(ms); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) msleep(ms); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + msleep(ms); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) rtw_msleep_os(ms); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) delay_ms(ms); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + rtw_msleep_os(ms); #endif } -void -ODM_sleep_us(u32 us) +void ODM_sleep_us(u32 us) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) delay_us(us); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) usleep_range(us, us + 1); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + usleep_range(us, us + 1); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) rtw_usleep_os(us); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) PlatformStallExecution(us); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + rtw_usleep_os(us); #endif } -void -odm_set_timer( - struct dm_struct *dm, - struct phydm_timer_list *timer, - u32 ms_delay -) +void odm_set_timer(struct dm_struct *dm, struct phydm_timer_list *timer, + u32 ms_delay) { #if (DM_ODM_SUPPORT_TYPE & ODM_AP) mod_timer(timer, jiffies + RTL_MILISECONDS_TO_JIFFIES(ms_delay)); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) mod_timer(timer, jiffies + msecs_to_jiffies(ms_delay)); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + mod_timer(&timer->timer, jiffies + msecs_to_jiffies(ms_delay)); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) - _set_timer(timer, ms_delay); /* ms */ + _set_timer(timer, ms_delay); /* @ms */ #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - void *adapter = dm->adapter; + void *adapter = dm->adapter; PlatformSetTimer(adapter, timer, ms_delay); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + rtw_set_timer(timer, ms_delay); /* @ms */ #endif - } -void -odm_initialize_timer( - struct dm_struct *dm, - struct phydm_timer_list *timer, - void *call_back_func, - void *context, - const char *sz_id -) +void odm_initialize_timer(struct dm_struct *dm, struct phydm_timer_list *timer, + void *call_back_func, void *context, + const char *sz_id) { #if (DM_ODM_SUPPORT_TYPE & ODM_AP) init_timer(timer); timer->function = call_back_func; timer->data = (unsigned long)dm; - /*mod_timer(timer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10)); */ +#if 0 + /*@mod_timer(timer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10)); */ +#endif #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) - init_timer(timer); - timer->function = call_back_func; - timer->data = (unsigned long)dm; - /*mod_timer(timer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10)); */ + timer_setup(timer, call_back_func, 0); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) struct _ADAPTER *adapter = dm->adapter; @@ -695,34 +697,32 @@ odm_initialize_timer( void *adapter = dm->adapter; PlatformInitializeTimer(adapter, timer, (RT_TIMER_CALL_BACK)call_back_func, context, sz_id); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + struct _ADAPTER *adapter = dm->adapter; + + rtw_init_timer(timer, adapter->pnetdev, (TIMER_FUN)call_back_func, dm, NULL); #endif } - -void -odm_cancel_timer( - struct dm_struct *dm, - struct phydm_timer_list *timer -) +void odm_cancel_timer(struct dm_struct *dm, struct phydm_timer_list *timer) { #if (DM_ODM_SUPPORT_TYPE & ODM_AP) del_timer(timer); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) del_timer(timer); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + del_timer(&timer->timer); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) _cancel_timer_ex(timer); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) void *adapter = dm->adapter; PlatformCancelTimer(adapter, timer); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + rtw_cancel_timer(timer); #endif } - -void -odm_release_timer( - struct dm_struct *dm, - struct phydm_timer_list *timer -) +void odm_release_timer(struct dm_struct *dm, struct phydm_timer_list *timer) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) @@ -732,59 +732,62 @@ odm_release_timer( void *adapter = dm->adapter; - /* <20120301, Kordan> If the initilization fails, InitializeAdapterXxx will return regardless of InitHalDm. - * Hence, uninitialized timers cause BSOD when the driver releases resources since the init fail. */ + /* @<20120301, Kordan> If the initilization fails, + * InitializeAdapterXxx will return regardless of InitHalDm. + * Hence, uninitialized timers cause BSOD when the driver + * releases resources since the init fail. + */ if (timer == 0) { - PHYDM_DBG(dm, ODM_COMP_INIT, "=====>odm_release_timer(), The timer is NULL! Please check it!\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, + "[%s] Timer is NULL! Please check!\n", __func__); return; } PlatformReleaseTimer(adapter, timer); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + rtw_del_timer(timer); #endif } - -u8 -phydm_trans_h2c_id( - struct dm_struct *dm, - u8 phydm_h2c_id -) +u8 phydm_trans_h2c_id(struct dm_struct *dm, u8 phydm_h2c_id) { u8 platform_h2c_id = phydm_h2c_id; switch (phydm_h2c_id) { - /* 1 [0] */ + /* @1 [0] */ case ODM_H2C_RSSI_REPORT: #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + #if (RTL8188E_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8188E) platform_h2c_id = H2C_88E_RSSI_REPORT; - else if (dm->support_ic_type == ODM_RTL8814A) - platform_h2c_id = H2C_8814A_RSSI_REPORT; else + #endif platform_h2c_id = H2C_RSSI_REPORT; #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) platform_h2c_id = H2C_RSSI_SETTING; #elif (DM_ODM_SUPPORT_TYPE & ODM_AP) -#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1)) +#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)) /*@jj add 20170822*/ if (dm->support_ic_type == ODM_RTL8881A || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type & PHYDM_IC_3081_SERIES) platform_h2c_id = H2C_88XX_RSSI_REPORT; else #endif #if (RTL8812A_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8812) - platform_h2c_id = H2C_8812_RSSI_REPORT; - else + platform_h2c_id = H2C_8812_RSSI_REPORT; + else #endif - {} + { + } #endif break; - /* 1 [3] */ + /* @1 [3] */ case ODM_H2C_WIFI_CALIBRATION: #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) platform_h2c_id = H2C_WIFI_CALIBRATION; @@ -798,8 +801,7 @@ phydm_trans_h2c_id( #endif break; - - /* 1 [4] */ + /* @1 [4] */ case ODM_H2C_IQ_CALIBRATION: #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) platform_h2c_id = H2C_IQ_CALIBRATION; @@ -812,15 +814,13 @@ phydm_trans_h2c_id( #endif break; - /* 1 [5] */ + /* @1 [5] */ case ODM_H2C_RA_PARA_ADJUST: #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B)) - platform_h2c_id = H2C_8814A_RA_PARA_ADJUST; - else - platform_h2c_id = H2C_RA_PARA_ADJUST; + platform_h2c_id = H2C_RA_PARA_ADJUST; #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) platform_h2c_id = H2C_8812_RA_PARA_ADJUST; @@ -833,28 +833,30 @@ phydm_trans_h2c_id( #endif #elif (DM_ODM_SUPPORT_TYPE & ODM_AP) -#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1)) +#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)) /*@jj add 20170822*/ if (dm->support_ic_type == ODM_RTL8881A || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type & PHYDM_IC_3081_SERIES) platform_h2c_id = H2C_88XX_RA_PARA_ADJUST; else #endif #if (RTL8812A_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8812) - platform_h2c_id = H2C_8812_RA_PARA_ADJUST; - else + platform_h2c_id = H2C_8812_RA_PARA_ADJUST; + else #endif - {} + { + } #endif break; - - /* 1 [6] */ + /* @1 [6] */ case PHYDM_H2C_DYNAMIC_TX_PATH: #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + #if (RTL8814A_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8814A) platform_h2c_id = H2C_8814A_DYNAMIC_TX_PATH; + #endif #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) #if (RTL8814A_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8814A) @@ -870,31 +872,30 @@ phydm_trans_h2c_id( break; - /* [7]*/ + /* @[7]*/ case PHYDM_H2C_FW_TRACE_EN: #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B)) - platform_h2c_id = H2C_8814A_FW_TRACE_EN; - else - platform_h2c_id = H2C_FW_TRACE_EN; + + platform_h2c_id = H2C_FW_TRACE_EN; #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) platform_h2c_id = 0x49; #elif (DM_ODM_SUPPORT_TYPE & ODM_AP) -#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1)) +#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)) /*@jj add 20170822*/ if (dm->support_ic_type == ODM_RTL8881A || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type & PHYDM_IC_3081_SERIES) - platform_h2c_id = H2C_88XX_FW_TRACE_EN; + platform_h2c_id = H2C_88XX_FW_TRACE_EN; else #endif #if (RTL8812A_SUPPORT == 1) - if (dm->support_ic_type == ODM_RTL8812) - platform_h2c_id = H2C_8812_FW_TRACE_EN; - else + if (dm->support_ic_type == ODM_RTL8812) + platform_h2c_id = H2C_8812_FW_TRACE_EN; + else #endif - {} + { + } #endif @@ -902,13 +903,13 @@ phydm_trans_h2c_id( case PHYDM_H2C_TXBF: #if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1)) - platform_h2c_id = 0x41; /*H2C_TxBF*/ + platform_h2c_id = 0x41; /*@H2C_TxBF*/ #endif break; case PHYDM_H2C_MU: #if (RTL8822B_SUPPORT == 1) - platform_h2c_id = 0x4a; /*H2C_MU*/ + platform_h2c_id = 0x4a; /*@H2C_MU*/ #endif break; @@ -918,82 +919,87 @@ phydm_trans_h2c_id( } return platform_h2c_id; - } -/*ODM FW relative API.*/ +/*@ODM FW relative API.*/ -void -odm_fill_h2c_cmd( - struct dm_struct *dm, - u8 phydm_h2c_id, - u32 cmd_len, - u8 *cmd_buffer -) +void odm_fill_h2c_cmd(struct dm_struct *dm, u8 phydm_h2c_id, u32 cmd_len, + u8 *cmd_buf) { #if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + struct rtw_dev *rtwdev = dm->adapter; + u8 cmd_id, cmd_class; + u8 h2c_pkt[8]; #else - PADAPTER adapter = (PADAPTER)dm->adapter; + void *adapter = dm->adapter; #endif - u8 h2c_id = phydm_trans_h2c_id(dm, phydm_h2c_id); + u8 h2c_id = phydm_trans_h2c_id(dm, phydm_h2c_id); PHYDM_DBG(dm, DBG_RA, "[H2C] h2c_id=((0x%x))\n", h2c_id); #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - if (dm->support_ic_type == ODM_RTL8188E) { + if (dm->support_ic_type == ODM_RTL8188E) { if (!dm->ra_support88e) - FillH2CCmd88E(adapter, h2c_id, cmd_len, cmd_buffer); + FillH2CCmd88E(adapter, h2c_id, cmd_len, cmd_buf); } else if (dm->support_ic_type == ODM_RTL8814A) - FillH2CCmd8814A(adapter, h2c_id, cmd_len, cmd_buffer); + FillH2CCmd8814A(adapter, h2c_id, cmd_len, cmd_buf); else if (dm->support_ic_type == ODM_RTL8822B) - FillH2CCmd8822B(adapter, h2c_id, cmd_len, cmd_buffer); + FillH2CCmd8822B(adapter, h2c_id, cmd_len, cmd_buf); else - FillH2CCmd(adapter, h2c_id, cmd_len, cmd_buffer); + FillH2CCmd(adapter, h2c_id, cmd_len, cmd_buf); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) #ifdef DM_ODM_CE_MAC80211 - rtlpriv->cfg->ops->fill_h2c_cmd(rtlpriv->hw, h2c_id,cmd_len, cmd_buffer); + rtlpriv->cfg->ops->fill_h2c_cmd(rtlpriv->hw, h2c_id, cmd_len, cmd_buf); + #elif defined(DM_ODM_CE_MAC80211_V2) + cmd_id = phydm_h2c_id & 0x1f; + cmd_class = (phydm_h2c_id >> RTW_H2C_CLASS_OFFSET) & 0x7; + memcpy(h2c_pkt + 1, cmd_buf, 7); + h2c_pkt[0] = phydm_h2c_id; + rtw_fw_send_h2c_packet(rtwdev, h2c_pkt, cmd_id, cmd_class); + /* TODO: implement fill h2c command for rtwlan */ #else - rtw_hal_fill_h2c_cmd(adapter, h2c_id, cmd_len, cmd_buffer); + rtw_hal_fill_h2c_cmd(adapter, h2c_id, cmd_len, cmd_buf); #endif #elif (DM_ODM_SUPPORT_TYPE & ODM_AP) #if (RTL8812A_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8812) { - fill_h2c_cmd8812(dm->priv, h2c_id, cmd_len, cmd_buffer); + fill_h2c_cmd8812(dm->priv, h2c_id, cmd_len, cmd_buf); } else #endif { - GET_HAL_INTERFACE(dm->priv)->fill_h2c_cmd_handler(dm->priv, h2c_id, cmd_len, cmd_buffer); + GET_HAL_INTERFACE(dm->priv)->fill_h2c_cmd_handler(dm->priv, h2c_id, cmd_len, cmd_buf); } + +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + rtw_hal_fill_h2c_cmd(adapter, h2c_id, cmd_len, cmd_buf); + #endif } -u8 -phydm_c2H_content_parsing( - void *dm_void, - u8 c2h_cmd_id, - u8 c2h_cmd_len, - u8 *tmp_buf -) +u8 phydm_c2H_content_parsing(void *dm_void, u8 c2h_cmd_id, u8 c2h_cmd_len, + u8 *tmp_buf) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter = dm->adapter; + void *adapter = dm->adapter; #endif - u8 extend_c2h_sub_id = 0; - u8 find_c2h_cmd = true; - - if ((c2h_cmd_len > 12) || (c2h_cmd_len == 0)) { - pr_debug("[Warning] Error C2H ID=%d, len=%d\n", c2h_cmd_id, c2h_cmd_len); - + u8 extend_c2h_sub_id = 0; + u8 find_c2h_cmd = true; + + if (c2h_cmd_len > 12 || c2h_cmd_len == 0) { + pr_debug("[Warning] Error C2H ID=%d, len=%d\n", + c2h_cmd_id, c2h_cmd_len); + find_c2h_cmd = false; return find_c2h_cmd; } - + switch (c2h_cmd_id) { case PHYDM_C2H_DBG: phydm_fw_trace_handler(dm, tmp_buf, c2h_cmd_len); @@ -1006,11 +1012,12 @@ phydm_c2H_content_parsing( case PHYDM_C2H_RA_PARA_RPT: odm_c2h_ra_para_report_handler(dm, tmp_buf, c2h_cmd_len); break; - +#ifdef CONFIG_PATH_DIVERSITY case PHYDM_C2H_DYNAMIC_TX_PATH_RPT: if (dm->support_ic_type & (ODM_RTL8814A)) phydm_c2h_dtp_handler(dm, tmp_buf, c2h_cmd_len); break; +#endif case PHYDM_C2H_IQK_FINISH: #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) @@ -1048,53 +1055,50 @@ phydm_c2H_content_parsing( } return find_c2h_cmd; - } -u64 -odm_get_current_time( - struct dm_struct *dm -) +u64 odm_get_current_time(struct dm_struct *dm) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) return (u64)rtw_get_current_time(); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) return jiffies; +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + return jiffies; #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) return rtw_get_current_time(); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - return PlatformGetCurrentTime(); + return PlatformGetCurrentTime(); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + return rtw_get_current_time(); #endif } -u64 -odm_get_progressing_time( - struct dm_struct *dm, - u64 start_time -) +u64 odm_get_progressing_time(struct dm_struct *dm, u64 start_time) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) return rtw_get_passing_time_ms((u32)start_time); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) return jiffies_to_msecs(jiffies - start_time); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + return jiffies_to_msecs(jiffies - start_time); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) return rtw_get_passing_time_ms((systime)start_time); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) return ((PlatformGetCurrentTime() - start_time) >> 10); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + return rtw_get_passing_time_ms(start_time); #endif } -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) && !defined(DM_ODM_CE_MAC80211) +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) && \ + (!defined(DM_ODM_CE_MAC80211) && !defined(DM_ODM_CE_MAC80211_V2)) -void -phydm_set_hw_reg_handler_interface ( - struct dm_struct *dm, - u8 RegName, - u8 *val - ) +void phydm_set_hw_reg_handler_interface(struct dm_struct *dm, u8 RegName, + u8 *val) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) - struct _ADAPTER *adapter = (PADAPTER)dm->adapter; +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + struct _ADAPTER *adapter = dm->adapter; #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ((PADAPTER)adapter)->HalFunc.SetHwRegHandler(adapter, RegName, val); @@ -1103,21 +1107,17 @@ phydm_set_hw_reg_handler_interface ( #endif #endif - } -void -phydm_get_hal_def_var_handler_interface ( - struct dm_struct *dm, - enum _HAL_DEF_VARIABLE e_variable, - void *value - ) +void phydm_get_hal_def_var_handler_interface(struct dm_struct *dm, + enum _HAL_DEF_VARIABLE e_variable, + void *value) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) - struct _ADAPTER *adapter = (PADAPTER)dm->adapter; +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + struct _ADAPTER *adapter = dm->adapter; #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - adapter->HalFunc.GetHalDefVarHandler(adapter, e_variable, value); + ((PADAPTER)adapter)->HalFunc.GetHalDefVarHandler(adapter, e_variable, value); #else adapter->hal_func.get_hal_def_var_handler(adapter, e_variable, value); #endif @@ -1127,141 +1127,130 @@ phydm_get_hal_def_var_handler_interface ( #endif -void -odm_set_tx_power_index_by_rate_section ( - struct dm_struct *dm, - enum rf_path path, - u8 channel, - u8 rate_section - ) +void odm_set_tx_power_index_by_rate_section(struct dm_struct *dm, + enum rf_path path, u8 ch, + u8 section) { #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - PHY_SetTxPowerIndexByRateSection((PADAPTER)dm->adapter, path, channel, rate_section); + void *adapter = dm->adapter; + PHY_SetTxPowerIndexByRateSection(adapter, path, ch, section); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) - phy_set_tx_power_index_by_rs((PADAPTER)dm->adapter, channel, path, rate_section); + void *adapter = dm->adapter; + + phy_set_tx_power_index_by_rs(adapter, ch, path, section); +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) - phy_set_tx_power_index_by_rate_section(dm->adapter, path, channel, rate_section); + phy_set_tx_power_index_by_rate_section(dm->adapter, path, ch, section); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + void *adapter = dm->adapter; + + PHY_SetTxPowerIndexByRateSection(adapter, path, ch, section); #endif } - -u8 -odm_get_tx_power_index ( - struct dm_struct *dm, - enum rf_path path, - u8 tx_rate, - u8 band_width, - u8 channel - ) +u8 odm_get_tx_power_index(struct dm_struct *dm, enum rf_path path, u8 rate, + u8 bw, u8 ch) { #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - return PHY_GetTxPowerIndex((PADAPTER)dm->adapter, path, tx_rate, (CHANNEL_WIDTH)band_width, channel); -#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) - void *adapter = dm->adapter; + void *adapter = dm->adapter; - return phy_get_tx_power_index(adapter, (enum rf_path)path, tx_rate, band_width, channel); + return PHY_GetTxPowerIndex(dm->adapter, path, rate, (CHANNEL_WIDTH)bw, ch); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) + void *adapter = dm->adapter; + + return phy_get_tx_power_index(adapter, path, rate, bw, ch); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + void *adapter = dm->adapter; + + return phy_get_tx_power_index(adapter, path, rate, bw, ch); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) - return phy_get_tx_power_index(dm->adapter, path, tx_rate, band_width, channel); + return phy_get_tx_power_index(dm->adapter, path, rate, bw, ch); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + void *adapter = dm->adapter; + + return PHY_GetTxPowerIndex(dm->adapter, path, rate, bw, ch); #endif } - - -u8 -odm_efuse_one_byte_read( - struct dm_struct *dm, - u16 addr, - u8 *data, - boolean b_pseu_do_test - ) +u8 odm_efuse_one_byte_read(struct dm_struct *dm, u16 addr, u8 *data, + boolean b_pseu_do_test) { #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - return (u8)EFUSE_OneByteRead((PADAPTER)dm->adapter, addr, data, b_pseu_do_test); + void *adapter = dm->adapter; + + return (u8)EFUSE_OneByteRead(adapter, addr, data, b_pseu_do_test); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) - void *adapter = dm->adapter; + void *adapter = dm->adapter; return rtl_efuse_onebyte_read(adapter, addr, data, b_pseu_do_test); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + return -1; #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) return efuse_onebyte_read(dm->adapter, addr, data, b_pseu_do_test); #elif (DM_ODM_SUPPORT_TYPE & ODM_AP) - /*ReadEFuseByte(dm->priv, addr, data);*/ - /*return true;*/ + return Efuse_OneByteRead(dm, addr, data); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + void *adapter = dm->adapter; + + return (u8)efuse_OneByteRead(adapter, addr, data, b_pseu_do_test); #endif } - - -void -odm_efuse_logical_map_read( - struct dm_struct *dm, - u8 type, - u16 offset, - u32 *data -) +void odm_efuse_logical_map_read(struct dm_struct *dm, u8 type, u16 offset, + u32 *data) { #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - EFUSE_ShadowRead((PADAPTER)dm->adapter, type, offset, data); + void *adapter = dm->adapter; + + EFUSE_ShadowRead(adapter, type, offset, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) - void *adapter = dm->adapter; + void *adapter = dm->adapter; rtl_efuse_logical_map_read(adapter, type, offset, data); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) efuse_logical_map_read(dm->adapter, type, offset, data); +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + void *adapter = dm->adapter; + + EFUSE_ShadowRead(adapter, type, offset, data); #endif } enum hal_status -odm_iq_calibrate_by_fw( - struct dm_struct *dm, - u8 clear, - u8 segment - ) +odm_iq_calibrate_by_fw(struct dm_struct *dm, u8 clear, u8 segment) { enum hal_status iqk_result = HAL_STATUS_FAILURE; #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - struct _ADAPTER *adapter = (PADAPTER)dm->adapter; - + struct _ADAPTER *adapter = dm->adapter; + if (HAL_MAC_FWIQK_Trigger(&GET_HAL_MAC_INFO(adapter), clear, segment) == 0) iqk_result = HAL_STATUS_SUCCESS; #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) #if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) - void *adapter = dm->adapter; + void *adapter = dm->adapter; + iqk_result = rtl_phydm_fw_iqk(adapter, clear, segment); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) #else iqk_result = rtw_phydm_fw_iqk(dm, clear, segment); #endif +#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) + iqk_result = rtw_phydm_fw_iqk(dm, clear, segment); #endif return iqk_result; } -void -odm_cmn_info_ptr_array_hook( - struct dm_struct *dm, - enum odm_cmninfo cmn_info, - u16 index, - void *value -) +void odm_cmn_info_ptr_array_hook(struct dm_struct *dm, + enum odm_cmninfo cmn_info, u16 index, + void *value) { - switch (cmn_info) { - /*Dynamic call by reference pointer. */ - case ODM_CMNINFO_STA_STATUS: - dm->odm_sta_info[index] = (struct sta_info *)value; - break; - /* To remove the compiler warning, must add an empty default statement to handle the other values. */ - default: - /* do nothing */ - break; - } - + /*ODM_CMNINFO_STA_STATUS*/ } -void -phydm_cmn_sta_info_hook( - struct dm_struct *dm, - u8 mac_id, - struct cmn_sta_info *pcmn_sta_info -) +void phydm_cmn_sta_info_hook(struct dm_struct *dm, u8 mac_id, + struct cmn_sta_info *pcmn_sta_info) { dm->phydm_sta_info[mac_id] = pcmn_sta_info; @@ -1269,48 +1258,41 @@ phydm_cmn_sta_info_hook( dm->phydm_macid_table[pcmn_sta_info->mac_id] = mac_id; } -void -phydm_macid2sta_idx_table( - struct dm_struct *dm, - u8 entry_idx, - struct cmn_sta_info *pcmn_sta_info -) +void phydm_macid2sta_idx_table(struct dm_struct *dm, u8 entry_idx, + struct cmn_sta_info *pcmn_sta_info) { if (is_sta_active(pcmn_sta_info)) dm->phydm_macid_table[pcmn_sta_info->mac_id] = entry_idx; } -void -phydm_add_interrupt_mask_handler( - struct dm_struct *dm, - u8 interrupt_type -) +void phydm_add_interrupt_mask_handler(struct dm_struct *dm, u8 interrupt_type) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) - struct rtl8192cd_priv *priv = dm->priv; + struct rtl8192cd_priv *priv = dm->priv; #if IS_EXIST_PCI || IS_EXIST_EMBEDDED - GET_HAL_INTERFACE(priv)->AddInterruptMaskHandler(priv, interrupt_type); + if (dm->support_interface == ODM_ITRF_PCIE) + GET_HAL_INTERFACE(priv)->AddInterruptMaskHandler(priv, + interrupt_type) + ; #endif - + #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #endif } -void -phydm_enable_rx_related_interrupt_handler( - struct dm_struct *dm -) +void phydm_enable_rx_related_interrupt_handler(struct dm_struct *dm) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) - struct rtl8192cd_priv *priv = dm->priv; + struct rtl8192cd_priv *priv = dm->priv; #if IS_EXIST_PCI || IS_EXIST_EMBEDDED - GET_HAL_INTERFACE(priv)->EnableRxRelatedInterruptHandler(priv); + if (dm->support_interface == ODM_ITRF_PCIE) + GET_HAL_INTERFACE(priv)->EnableRxRelatedInterruptHandler(priv); #endif #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) @@ -1330,13 +1312,13 @@ phydm_get_txbf_en( #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && !defined(DM_ODM_CE_MAC80211) - #ifdef CONFIG_BEAMFORMING +#ifdef CONFIG_BEAMFORMING enum beamforming_cap beamform_cap; void *adapter = dm->adapter; - #if (BEAMFORMING_SUPPORT == 1) + #ifdef PHYDM_BEAMFORMING_SUPPORT beamform_cap = phydm_beamforming_get_entry_beam_cap_by_mac_id(dm, mac_id); - #else/*for drv beamforming*/ + #else/*@for drv beamforming*/ beamform_cap = beamforming_get_entry_beam_cap_by_mac_id(&adapter->mlmepriv, mac_id); #endif @@ -1344,11 +1326,11 @@ phydm_get_txbf_en( txbf_en = true; else txbf_en = false; - #endif /*#ifdef CONFIG_BEAMFORMING*/ +#endif /*@#ifdef CONFIG_BEAMFORMING*/ #elif (DM_ODM_SUPPORT_TYPE & ODM_AP) - #if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT u8 idx = 0xff; boolean act_bfer = false; BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE; @@ -1360,9 +1342,9 @@ phydm_get_txbf_en( dm_bdc_table->num_txbfee_client = 0; dm_bdc_table->num_txbfer_client = 0; #endif - #endif +#endif - #if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT beamform_cap = Beamforming_GetEntryBeamCapByMacId(priv, mac_id); entry = Beamforming_GetEntryByMacId(priv, mac_id, &idx); if (beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) { @@ -1372,41 +1354,137 @@ phydm_get_txbf_en( txbf_en = false; act_bfer = true; } - #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) /*BDC*/ + #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) /*@BDC*/ if (act_bfer == true) { - dm_bdc_table->w_bfee_client[i] = true; /* AP act as BFer */ + dm_bdc_table->w_bfee_client[i] = true; /* @AP act as BFer */ dm_bdc_table->num_txbfee_client++; } else - dm_bdc_table->w_bfee_client[i] = false; /* AP act as BFer */ - + dm_bdc_table->w_bfee_client[i] = false; /* @AP act as BFer */ + if (beamform_cap & (BEAMFORMEE_CAP_HT_EXPLICIT | BEAMFORMEE_CAP_VHT_SU)) { - dm_bdc_table->w_bfer_client[i] = true; /* AP act as BFee */ + dm_bdc_table->w_bfer_client[i] = true; /* @AP act as BFee */ dm_bdc_table->num_txbfer_client++; } else - dm_bdc_table->w_bfer_client[i] = false; /* AP act as BFer */ + dm_bdc_table->w_bfer_client[i] = false; /* @AP act as BFer */ #endif - #endif +#endif #endif return txbf_en; - } #endif -void -phydm_iqk_wait( - struct dm_struct *dm, - u32 timeout -) +void phydm_iqk_wait(struct dm_struct *dm, u32 timeout) { #if (DM_ODM_SUPPORT_TYPE == ODM_CE) #if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) - PHYDM_DBG(dm, ODM_COMP_COMMON, "Not support for CE MAC80211 driver!\n"); + PHYDM_DBG(dm, DBG_CMN, "Not support for CE MAC80211 driver!\n"); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) #else - void *adapter = dm->adapter; + void *adapter = dm->adapter; rtl8812_iqk_wait(adapter, timeout); #endif #endif } + +u8 phydm_get_hwrate_to_mrate(struct dm_struct *dm, u8 rate) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_IOT) + return HwRateToMRate(rate); +#endif + return 0; +} + +void phydm_set_crystalcap(struct dm_struct *dm, u8 crystal_cap) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_IOT) + ROM_odm_SetCrystalCap(dm, crystal_cap); +#endif +} + +void phydm_run_in_thread_cmd(struct dm_struct *dm, void (*func)(void *), + void *context) +{ +#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) + PHYDM_DBG(dm, DBG_CMN, "Not support for CE MAC80211 driver!\n"); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + void *adapter = dm->adapter; + + rtw_run_in_thread_cmd(adapter, func, context); +#endif +} + +u8 phydm_get_tx_rate(struct dm_struct *dm) +{ + struct _hal_rf_ *rf = &dm->rf_table; +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + struct _ADAPTER *adapter = dm->adapter; +#endif + u8 tx_rate = 0xff; + u8 mpt_rate_index = 0; + + if (*dm->mp_mode == 1) { +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) +#if (MP_DRIVER == 1) + PMPT_CONTEXT p_mpt_ctx = &adapter->MptCtx; + + tx_rate = MptToMgntRate(p_mpt_ctx->MptRateIndex); +#endif +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) +#ifdef CONFIG_MP_INCLUDED + if (rf->mp_rate_index) + mpt_rate_index = *rf->mp_rate_index; + + tx_rate = mpt_to_mgnt_rate(mpt_rate_index); +#endif +#endif +#endif + } else { + u16 rate = *dm->forced_data_rate; + + if (!rate) { /*auto rate*/ +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + struct _ADAPTER *adapter = dm->adapter; + + tx_rate = ((PADAPTER)adapter)->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) + tx_rate = dm->tx_rate; +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + if (dm->number_linked_client != 0) + tx_rate = hw_rate_to_m_rate(dm->tx_rate); + else + tx_rate = rf->p_rate_index; +#endif + } else { /*force rate*/ + tx_rate = (u8)rate; + } + } + + return tx_rate; +} + +u8 phydm_get_tx_power_dbm(struct dm_struct *dm, u8 rf_path, + u8 rate, u8 bandwidth, u8 channel) +{ + u8 tx_power_dbm = 0; +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + struct _ADAPTER *adapter = dm->adapter; + tx_power_dbm = PHY_GetTxPowerFinalAbsoluteValue(adapter, rf_path, rate, bandwidth, channel); +#endif + return tx_power_dbm; +} + +u64 phydm_division64(u64 x, u64 y) +{ +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) + do_div(x, y); + return x; +#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) + return x / y; +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + return rtw_division64(x, y); +#endif +} diff --git a/hal/phydm/phydm_interface.h b/hal/phydm/phydm_interface.h index 04ff7d4..a1b4c33 100644 --- a/hal/phydm/phydm_interface.h +++ b/hal/phydm/phydm_interface.h @@ -23,46 +23,48 @@ * *****************************************************************************/ - -#ifndef __ODM_INTERFACE_H__ +#ifndef __ODM_INTERFACE_H__ #define __ODM_INTERFACE_H__ -#define INTERFACE_VERSION "1.2" /*2017.05.03 YuChen add phy param offload HAL MAC API*/ +#define INTERFACE_VERSION "1.2" -#define pdm_set_reg odm_set_bb_reg +#define pdm_set_reg odm_set_bb_reg -/*=========== Constant/Structure/Enum/... Define*/ +/*@=========== Constant/Structure/Enum/... Define*/ enum phydm_h2c_cmd { PHYDM_H2C_RA_MASK = 0x40, PHYDM_H2C_TXBF = 0x41, ODM_H2C_RSSI_REPORT = 0x42, - ODM_H2C_IQ_CALIBRATION = 0x45, - PHYDM_RA_MASK_ABOVE_3SS = 0x46, - ODM_H2C_RA_PARA_ADJUST = 0x47, - PHYDM_H2C_DYNAMIC_TX_PATH = 0x48, - PHYDM_H2C_FW_TRACE_EN = 0x49, + ODM_H2C_IQ_CALIBRATION = 0x45, + PHYDM_RA_MASK_ABOVE_3SS = 0x46, + ODM_H2C_RA_PARA_ADJUST = 0x47, + PHYDM_H2C_DYNAMIC_TX_PATH = 0x48, + PHYDM_H2C_FW_TRACE_EN = 0x49, ODM_H2C_WIFI_CALIBRATION = 0x6d, - PHYDM_H2C_MU = 0x4a, - PHYDM_H2C_FW_GENERAL_INIT = 0x4c, - PHYDM_H2C_FW_CLM_MNTR = 0x4d, + PHYDM_H2C_MU = 0x4a, + PHYDM_H2C_FW_GENERAL_INIT = 0x4c, + PHYDM_H2C_FW_CLM_MNTR = 0x4d, + PHYDM_H2C_MCC = 0x4f, + PHYDM_H2C_RESP_TX_PATH_CTRL = 0x50, + PHYDM_H2C_RESP_TX_ANT_CTRL = 0x51, ODM_MAX_H2CCMD }; enum phydm_c2h_evt { - PHYDM_C2H_DBG = 0, - PHYDM_C2H_LB = 1, - PHYDM_C2H_XBF = 2, - PHYDM_C2H_TX_REPORT = 3, - PHYDM_C2H_INFO = 9, - PHYDM_C2H_BT_MP = 11, - PHYDM_C2H_RA_RPT = 12, + PHYDM_C2H_DBG = 0, + PHYDM_C2H_LB = 1, + PHYDM_C2H_XBF = 2, + PHYDM_C2H_TX_REPORT = 3, + PHYDM_C2H_INFO = 9, + PHYDM_C2H_BT_MP = 11, + PHYDM_C2H_RA_RPT = 12, PHYDM_C2H_RA_PARA_RPT = 14, PHYDM_C2H_DYNAMIC_TX_PATH_RPT = 15, - PHYDM_C2H_IQK_FINISH = 17, /*0x11*/ - PHYDM_C2H_CLM_MONITOR = 0x2a, - PHYDM_C2H_DBG_CODE = 0xFE, - PHYDM_C2H_EXTEND = 0xFF, + PHYDM_C2H_IQK_FINISH = 17, /*@0x11*/ + PHYDM_C2H_CLM_MONITOR = 0x2a, + PHYDM_C2H_DBG_CODE = 0xFE, + PHYDM_C2H_EXTEND = 0xFF, }; enum phydm_extend_c2h_evt { @@ -83,430 +85,243 @@ enum phydm_halmac_param { PHYDM_HALMAC_CMD_END = 0XFF, }; -/*=========== Macro Define*/ +/*@=========== Macro Define*/ #define _reg_all(_name) ODM_##_name #define _reg_ic(_name, _ic) ODM_##_name##_ic #define _bit_all(_name) BIT_##_name #define _bit_ic(_name, _ic) BIT_##_name##_ic -/* _cat: implemented by Token-Pasting Operator. */ +/* @_cat: implemented by Token-Pasting Operator. */ #if 0 -#define _cat(_name, _ic_type, _func) \ - (\ - _func##_all(_name) \ - ) +#define _cat(_name, _ic_type, _func) \ + ( \ + _func##_all(_name)) #endif -/*=================================== +#if 0 #define ODM_REG_DIG_11N 0xC50 #define ODM_REG_DIG_11AC 0xDDD ODM_REG(DIG,_pdm_odm) -=====================================*/ +#endif +#if defined(DM_ODM_CE_MAC80211) +#define ODM_BIT(name, dm) \ + ((dm->support_ic_type & ODM_IC_11N_SERIES) ? \ + ODM_BIT_##name##_11N : ODM_BIT_##name##_11AC) + +#define ODM_REG(name, dm) \ + ((dm->support_ic_type & ODM_IC_11N_SERIES) ? \ + ODM_REG_##name##_11N : ODM_REG_##name##_11AC) +#else #define _reg_11N(_name) ODM_REG_##_name##_11N #define _reg_11AC(_name) ODM_REG_##_name##_11AC #define _bit_11N(_name) ODM_BIT_##_name##_11N #define _bit_11AC(_name) ODM_BIT_##_name##_11AC #ifdef __ECOS -#define _rtk_cat(_name, _ic_type, _func) \ - (\ - ((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \ - _func##_11AC(_name) \ - ) +#define _rtk_cat(_name, _ic_type, _func) \ + ( \ + ((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \ + _func##_11AC(_name)) #else -#define _cat(_name, _ic_type, _func) \ - (\ - ((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \ - _func##_11AC(_name) \ - ) +#define _cat(_name, _ic_type, _func) \ + ( \ + ((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \ + _func##_11AC(_name)) #endif -/* +/*@ * only sample code - *#define _cat(_name, _ic_type, _func) \ - * ( \ - * ((_ic_type) & ODM_RTL8188E) ? _func##_ic(_name, _8188E) : \ - * _func##_ic(_name, _8195) \ + *#define _cat(_name, _ic_type, _func) \ + * ( \ + * ((_ic_type) & ODM_RTL8188E) ? _func##_ic(_name, _8188E) :\ + * _func##_ic(_name, _8195) \ * ) */ -/* _name: name of register or bit. +/* @_name: name of register or bit. * Example: "ODM_REG(R_A_AGC_CORE1, dm)" - * gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", depends on support_ic_type. */ + * gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", + * depends on support_ic_type. + */ #ifdef __ECOS - #define ODM_REG(_name, _pdm_odm) _rtk_cat(_name, _pdm_odm->support_ic_type, _reg) - #define ODM_BIT(_name, _pdm_odm) _rtk_cat(_name, _pdm_odm->support_ic_type, _bit) + #define ODM_REG(_name, _pdm_odm) \ + _rtk_cat(_name, _pdm_odm->support_ic_type, _reg) + #define ODM_BIT(_name, _pdm_odm) \ + _rtk_cat(_name, _pdm_odm->support_ic_type, _bit) #else - #define ODM_REG(_name, _pdm_odm) _cat(_name, _pdm_odm->support_ic_type, _reg) - #define ODM_BIT(_name, _pdm_odm) _cat(_name, _pdm_odm->support_ic_type, _bit) + #define ODM_REG(_name, _pdm_odm) \ + _cat(_name, _pdm_odm->support_ic_type, _reg) + #define ODM_BIT(_name, _pdm_odm) \ + _cat(_name, _pdm_odm->support_ic_type, _bit) #endif -/* +#endif +/*@ * =========== Extern Variable ??? It should be forbidden. - * */ + */ - -/* +/*@ * =========== EXtern Function Prototype - * */ + */ +u8 odm_read_1byte(struct dm_struct *dm, u32 reg_addr); -u8 -odm_read_1byte( - struct dm_struct *dm, - u32 reg_addr -); +u16 odm_read_2byte(struct dm_struct *dm, u32 reg_addr); -u16 -odm_read_2byte( - struct dm_struct *dm, - u32 reg_addr -); +u32 odm_read_4byte(struct dm_struct *dm, u32 reg_addr); -u32 -odm_read_4byte( - struct dm_struct *dm, - u32 reg_addr -); +void odm_write_1byte(struct dm_struct *dm, u32 reg_addr, u8 data); -void -odm_write_1byte( - struct dm_struct *dm, - u32 reg_addr, - u8 data -); +void odm_write_2byte(struct dm_struct *dm, u32 reg_addr, u16 data); -void -odm_write_2byte( - struct dm_struct *dm, - u32 reg_addr, - u16 data -); +void odm_write_4byte(struct dm_struct *dm, u32 reg_addr, u32 data); -void -odm_write_4byte( - struct dm_struct *dm, - u32 reg_addr, - u32 data -); +void odm_set_mac_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask, + u32 data); -void -odm_set_mac_reg( - struct dm_struct *dm, - u32 reg_addr, - u32 bit_mask, - u32 data -); +u32 odm_get_mac_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask); -u32 -odm_get_mac_reg( - struct dm_struct *dm, - u32 reg_addr, - u32 bit_mask -); +void odm_set_bb_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask, u32 data); -void -odm_set_bb_reg( - struct dm_struct *dm, - u32 reg_addr, - u32 bit_mask, - u32 data -); +u32 odm_get_bb_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask); -u32 -odm_get_bb_reg( - struct dm_struct *dm, - u32 reg_addr, - u32 bit_mask -); +void odm_set_rf_reg(struct dm_struct *dm, u8 e_rf_path, u32 reg_addr, + u32 bit_mask, u32 data); -void -odm_set_rf_reg( - struct dm_struct *dm, - u8 e_rf_path, - u32 reg_addr, - u32 bit_mask, - u32 data -); +u32 odm_get_rf_reg(struct dm_struct *dm, u8 e_rf_path, u32 reg_addr, + u32 bit_mask); -u32 -odm_get_rf_reg( - struct dm_struct *dm, - u8 e_rf_path, - u32 reg_addr, - u32 bit_mask -); - - -/* +/*@ * Memory Relative Function. - * */ -void -odm_allocate_memory( - struct dm_struct *dm, - void **ptr, - u32 length -); -void -odm_free_memory( - struct dm_struct *dm, - void *ptr, - u32 length -); + */ +void odm_allocate_memory(struct dm_struct *dm, void **ptr, u32 length); +void odm_free_memory(struct dm_struct *dm, void *ptr, u32 length); -void -odm_move_memory( - struct dm_struct *dm, - void *dest, - void *src, - u32 length -); +void odm_move_memory(struct dm_struct *dm, void *dest, void *src, u32 length); -s32 odm_compare_memory( - struct dm_struct *dm, - void *buf1, - void *buf2, - u32 length -); +s32 odm_compare_memory(struct dm_struct *dm, void *buf1, void *buf2, + u32 length); -void odm_memory_set( - struct dm_struct *dm, - void *pbuf, - s8 value, - u32 length -); +void odm_memory_set(struct dm_struct *dm, void *pbuf, s8 value, u32 length); -/* +/*@ * ODM MISC-spin lock relative API. - * */ -void -odm_acquire_spin_lock( - struct dm_struct *dm, - enum rt_spinlock_type type -); + */ +void odm_acquire_spin_lock(struct dm_struct *dm, enum rt_spinlock_type type); -void -odm_release_spin_lock( - struct dm_struct *dm, - enum rt_spinlock_type type -); +void odm_release_spin_lock(struct dm_struct *dm, enum rt_spinlock_type type); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -/* +/*@ * ODM MISC-workitem relative API. - * */ -void -odm_initialize_work_item( - struct dm_struct *dm, - PRT_WORK_ITEM p_rt_work_item, - RT_WORKITEM_CALL_BACK rt_work_item_callback, - void *context, - const char *sz_id -); + */ +void odm_initialize_work_item( + struct dm_struct *dm, + PRT_WORK_ITEM p_rt_work_item, + RT_WORKITEM_CALL_BACK rt_work_item_callback, + void *context, + const char *sz_id); -void -odm_start_work_item( - PRT_WORK_ITEM p_rt_work_item -); +void odm_start_work_item( + PRT_WORK_ITEM p_rt_work_item); -void -odm_stop_work_item( - PRT_WORK_ITEM p_rt_work_item -); +void odm_stop_work_item( + PRT_WORK_ITEM p_rt_work_item); -void -odm_free_work_item( - PRT_WORK_ITEM p_rt_work_item -); +void odm_free_work_item( + PRT_WORK_ITEM p_rt_work_item); -void -odm_schedule_work_item( - PRT_WORK_ITEM p_rt_work_item -); +void odm_schedule_work_item( + PRT_WORK_ITEM p_rt_work_item); boolean odm_is_work_item_scheduled( - PRT_WORK_ITEM p_rt_work_item -); + PRT_WORK_ITEM p_rt_work_item); #endif -/* +/*@ * ODM Timer relative API. - * */ -void -ODM_delay_ms(u32 ms); + */ +void ODM_delay_ms(u32 ms); -void -ODM_delay_us(u32 us); +void ODM_delay_us(u32 us); -void -ODM_sleep_ms(u32 ms); +void ODM_sleep_ms(u32 ms); -void -ODM_sleep_us(u32 us); +void ODM_sleep_us(u32 us); -void -odm_set_timer( - struct dm_struct *dm, - struct phydm_timer_list *timer, - u32 ms_delay -); +void odm_set_timer(struct dm_struct *dm, struct phydm_timer_list *timer, + u32 ms_delay); -void -odm_initialize_timer( - struct dm_struct *dm, - struct phydm_timer_list *timer, - void *call_back_func, - void *context, - const char *sz_id -); +void odm_initialize_timer(struct dm_struct *dm, struct phydm_timer_list *timer, + void *call_back_func, void *context, + const char *sz_id); -void -odm_cancel_timer( - struct dm_struct *dm, - struct phydm_timer_list *timer -); +void odm_cancel_timer(struct dm_struct *dm, struct phydm_timer_list *timer); -void -odm_release_timer( - struct dm_struct *dm, - struct phydm_timer_list *timer -); +void odm_release_timer(struct dm_struct *dm, struct phydm_timer_list *timer); /*ODM FW relative API.*/ - enum hal_status -phydm_set_reg_by_fw( - struct dm_struct *dm, - enum phydm_halmac_param config_type, - u32 offset, - u32 data, - u32 mask, - enum rf_path e_rf_path, - u32 delay_time -); +phydm_set_reg_by_fw(struct dm_struct *dm, enum phydm_halmac_param config_type, + u32 offset, u32 data, u32 mask, enum rf_path e_rf_path, + u32 delay_time); -void -odm_fill_h2c_cmd( - struct dm_struct *dm, - u8 element_id, - u32 cmd_len, - u8 *cmd_buffer -); +void odm_fill_h2c_cmd(struct dm_struct *dm, u8 element_id, u32 cmd_len, + u8 *cmd_buffer); -u8 -phydm_c2H_content_parsing( - void *dm_void, - u8 c2h_cmd_id, - u8 c2h_cmd_len, - u8 *tmp_buf -); +u8 phydm_c2H_content_parsing(void *dm_void, u8 c2h_cmd_id, u8 c2h_cmd_len, + u8 *tmp_buf); -u64 -odm_get_current_time( - struct dm_struct *dm -); -u64 -odm_get_progressing_time( - struct dm_struct *dm, - u64 start_time -); +u64 odm_get_current_time(struct dm_struct *dm); +u64 odm_get_progressing_time(struct dm_struct *dm, u64 start_time); -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) && !defined(DM_ODM_CE_MAC80211) +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) && \ + (!defined(DM_ODM_CE_MAC80211) && !defined(DM_ODM_CE_MAC80211_V2)) -void -phydm_set_hw_reg_handler_interface ( - struct dm_struct *dm, - u8 reg_Name, - u8 *val - ); +void phydm_set_hw_reg_handler_interface(struct dm_struct *dm, u8 reg_Name, + u8 *val); -void -phydm_get_hal_def_var_handler_interface ( - struct dm_struct *dm, - enum _HAL_DEF_VARIABLE e_variable, - void *value - ); +void phydm_get_hal_def_var_handler_interface(struct dm_struct *dm, + enum _HAL_DEF_VARIABLE e_variable, + void *value); #endif -void -odm_set_tx_power_index_by_rate_section ( - struct dm_struct *dm, - enum rf_path path, - u8 channel, - u8 rate_section -); +void odm_set_tx_power_index_by_rate_section(struct dm_struct *dm, + enum rf_path path, u8 channel, + u8 rate_section); -u8 -odm_get_tx_power_index ( - struct dm_struct *dm, - enum rf_path path, - u8 tx_rate, - u8 band_width, - u8 channel -); +u8 odm_get_tx_power_index(struct dm_struct *dm, enum rf_path path, u8 tx_rate, + u8 band_width, u8 channel); -u8 -odm_efuse_one_byte_read( - struct dm_struct *dm, - u16 addr, - u8 *data, - boolean b_pseu_do_test -); +u8 odm_efuse_one_byte_read(struct dm_struct *dm, u16 addr, u8 *data, + boolean b_pseu_do_test); -void -odm_efuse_logical_map_read( - struct dm_struct *dm, - u8 type, - u16 offset, - u32 *data -); +void odm_efuse_logical_map_read(struct dm_struct *dm, u8 type, u16 offset, + u32 *data); enum hal_status -odm_iq_calibrate_by_fw( - struct dm_struct *dm, - u8 clear, - u8 segment -); +odm_iq_calibrate_by_fw(struct dm_struct *dm, u8 clear, u8 segment); -void -odm_cmn_info_ptr_array_hook( - struct dm_struct *dm, - enum odm_cmninfo cmn_info, - u16 index, - void *value -); +void odm_cmn_info_ptr_array_hook(struct dm_struct *dm, + enum odm_cmninfo cmn_info, u16 index, + void *value); -void -phydm_cmn_sta_info_hook( - struct dm_struct *dm, - u8 index, - struct cmn_sta_info *pcmn_sta_info -); +void phydm_cmn_sta_info_hook(struct dm_struct *dm, u8 index, + struct cmn_sta_info *pcmn_sta_info); -void -phydm_macid2sta_idx_table( - struct dm_struct *dm, - u8 entry_idx, - struct cmn_sta_info *pcmn_sta_info -); +void phydm_macid2sta_idx_table(struct dm_struct *dm, u8 entry_idx, + struct cmn_sta_info *pcmn_sta_info); -void -phydm_add_interrupt_mask_handler( - struct dm_struct *dm, - u8 interrupt_type -); +void phydm_add_interrupt_mask_handler(struct dm_struct *dm, u8 interrupt_type); -void -phydm_enable_rx_related_interrupt_handler( - struct dm_struct *dm -); +void phydm_enable_rx_related_interrupt_handler(struct dm_struct *dm); #if 0 boolean @@ -517,10 +332,15 @@ phydm_get_txbf_en( ); #endif -void -phydm_iqk_wait( - struct dm_struct *dm, - u32 timeout -); -#endif /* __ODM_INTERFACE_H__ */ +void phydm_iqk_wait(struct dm_struct *dm, u32 timeout); +u8 phydm_get_hwrate_to_mrate(struct dm_struct *dm, u8 rate); +void phydm_set_crystalcap(struct dm_struct *dm, u8 crystal_cap); +void phydm_run_in_thread_cmd(struct dm_struct *dm, void (*func)(void *), + void *context); +u8 phydm_get_tx_rate(struct dm_struct *dm); +u8 phydm_get_tx_power_dbm(struct dm_struct *dm, u8 rf_path, + u8 rate, u8 bandwidth, u8 channel); +u64 phydm_division64(u64 x, u64 y); + +#endif /* @__ODM_INTERFACE_H__ */ diff --git a/hal/phydm/phydm_lna_sat.c b/hal/phydm/phydm_lna_sat.c new file mode 100644 index 0000000..9288610 --- /dev/null +++ b/hal/phydm/phydm_lna_sat.c @@ -0,0 +1,1339 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +/************************************************************* + * include files + * *************************************************************/ +#include "mp_precomp.h" +#include "phydm_precomp.h" + +#ifdef PHYDM_LNA_SAT_CHK_SUPPORT + +#ifdef PHYDM_LNA_SAT_CHK_TYPE1 +void phydm_lna_sat_chk_init( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info; + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); + + lna_info->check_time = 0; + lna_info->sat_cnt_acc_patha = 0; + lna_info->sat_cnt_acc_pathb = 0; + #ifdef PHYDM_IC_ABOVE_3SS + lna_info->sat_cnt_acc_pathc = 0; + #endif + #ifdef PHYDM_IC_ABOVE_4SS + lna_info->sat_cnt_acc_pathd = 0; + #endif + lna_info->cur_sat_status = 0; + lna_info->pre_sat_status = 0; + lna_info->cur_timer_check_cnt = 0; + lna_info->pre_timer_check_cnt = 0; + + #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) + if (dm->support_ic_type & + (ODM_RTL8198F | ODM_RTL8814B)) + phydm_lna_sat_chk_bb_init(dm); + #endif +} + +#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) +void phydm_lna_sat_chk_bb_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info; + + boolean disable_bb_switch_tab = false; + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); + + /*@set table switch mux r_6table_sel_anten*/ + odm_set_bb_reg(dm, 0x18ac, BIT(8), 0); + + /*@tab decision when idle*/ + odm_set_bb_reg(dm, 0x18ac, BIT(16), disable_bb_switch_tab); + odm_set_bb_reg(dm, 0x41ac, BIT(16), disable_bb_switch_tab); + odm_set_bb_reg(dm, 0x52ac, BIT(16), disable_bb_switch_tab); + odm_set_bb_reg(dm, 0x53ac, BIT(16), disable_bb_switch_tab); + /*@tab decision when ofdmcca*/ + odm_set_bb_reg(dm, 0x18ac, BIT(17), disable_bb_switch_tab); + odm_set_bb_reg(dm, 0x41ac, BIT(17), disable_bb_switch_tab); + odm_set_bb_reg(dm, 0x52ac, BIT(17), disable_bb_switch_tab); + odm_set_bb_reg(dm, 0x53ac, BIT(17), disable_bb_switch_tab); +} + +void phydm_set_ofdm_agc_tab_path( + void *dm_void, + u8 tab_sel, + enum rf_path path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); + if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) { + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "set AGC Tab%d\n", tab_sel); + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "r_6table_sel_anten = 0x%x\n", + odm_get_bb_reg(dm, 0x18ac, BIT(8))); + } + + if (dm->support_ic_type & ODM_RTL8198F) { + /*@table sel:0/2, mapping 2 to 1 */ + if (tab_sel == OFDM_AGC_TAB_0) { + odm_set_bb_reg(dm, 0x18ac, BIT(4), 0); + odm_set_bb_reg(dm, 0x41ac, BIT(4), 0); + odm_set_bb_reg(dm, 0x52ac, BIT(4), 0); + odm_set_bb_reg(dm, 0x53ac, BIT(4), 0); + } else if (tab_sel == OFDM_AGC_TAB_2) { + odm_set_bb_reg(dm, 0x18ac, BIT(4), 1); + odm_set_bb_reg(dm, 0x41ac, BIT(4), 1); + odm_set_bb_reg(dm, 0x52ac, BIT(4), 1); + odm_set_bb_reg(dm, 0x53ac, BIT(4), 1); + } else { + odm_set_bb_reg(dm, 0x18ac, BIT(4), 0); + odm_set_bb_reg(dm, 0x41ac, BIT(4), 0); + odm_set_bb_reg(dm, 0x52ac, BIT(4), 0); + odm_set_bb_reg(dm, 0x53ac, BIT(4), 0); + } + } else if (dm->support_ic_type & ODM_RTL8814B) { + if (tab_sel == OFDM_AGC_TAB_0) { + odm_set_bb_reg(dm, 0x18ac, 0xf0, 0); + odm_set_bb_reg(dm, 0x41ac, 0xf0, 0); + odm_set_bb_reg(dm, 0x52ac, 0xf0, 0); + odm_set_bb_reg(dm, 0x53ac, 0xf0, 0); + } else if (tab_sel == OFDM_AGC_TAB_2) { + odm_set_bb_reg(dm, 0x18ac, 0xf0, 2); + odm_set_bb_reg(dm, 0x41ac, 0xf0, 2); + odm_set_bb_reg(dm, 0x52ac, 0xf0, 2); + odm_set_bb_reg(dm, 0x53ac, 0xf0, 2); + } else { + odm_set_bb_reg(dm, 0x18ac, 0xf0, 0); + odm_set_bb_reg(dm, 0x41ac, 0xf0, 0); + odm_set_bb_reg(dm, 0x52ac, 0xf0, 0); + odm_set_bb_reg(dm, 0x53ac, 0xf0, 0); + } + } +} + +u8 phydm_get_ofdm_agc_tab_path( + void *dm_void, + enum rf_path path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 tab_sel = 0; + + if (dm->support_ic_type & ODM_RTL8198F) { + tab_sel = (u8)odm_get_bb_reg(dm, R_0x18ac, BIT(4)); + if (tab_sel == 0) + tab_sel = OFDM_AGC_TAB_0; + else if (tab_sel == 1) + tab_sel = OFDM_AGC_TAB_2; + } else if (dm->support_ic_type & ODM_RTL8814B) { + tab_sel = (u8)odm_get_bb_reg(dm, R_0x18ac, 0xf0); + if (tab_sel == 0) + tab_sel = OFDM_AGC_TAB_0; + else if (tab_sel == 2) + tab_sel = OFDM_AGC_TAB_2; + } + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "get path %d AGC Tab %d\n", + path, tab_sel); + return tab_sel; +} +#endif /*@#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)*/ + +void phydm_set_ofdm_agc_tab( + void *dm_void, + u8 tab_sel) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + /*@table sel:0/2, 1 is used for CCK */ + if (tab_sel == OFDM_AGC_TAB_0) + odm_set_bb_reg(dm, R_0xc70, 0x1e00, OFDM_AGC_TAB_0); + else if (tab_sel == OFDM_AGC_TAB_2) + odm_set_bb_reg(dm, R_0xc70, 0x1e00, OFDM_AGC_TAB_2); + else + odm_set_bb_reg(dm, R_0xc70, 0x1e00, OFDM_AGC_TAB_0); +} + +u8 phydm_get_ofdm_agc_tab( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + return (u8)odm_get_bb_reg(dm, R_0xc70, 0x1e00); +} + +void phydm_lna_sat_chk( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_dig_struct *dig_t = &dm->dm_dig_table; + struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info; + u8 igi_rssi_min; + u8 rssi_min = dm->rssi_min; + u32 sat_status_a, sat_status_b; + #ifdef PHYDM_IC_ABOVE_3SS + u32 sat_status_c; + #endif + #ifdef PHYDM_IC_ABOVE_4SS + u32 sat_status_d; + #endif + u8 igi_restore = dig_t->cur_ig_value; + u8 i, chk_cnt = lna_info->chk_cnt; + u32 lna_sat_cnt_thd = 0; + u8 agc_tab; + u32 max_check_time = 0; + /*@use rssi_max if rssi_min is not stable;*/ + /*@rssi_min = dm->rssi_max;*/ + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __func__); + + if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK)) { + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "Func disable\n"); + return; + } + + if (lna_info->is_disable_lna_sat_chk) { + phydm_lna_sat_chk_init(dm); + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "disable_lna_sat_chk\n"); + return; + } + + /*@move igi to target pin of rssi_min */ + if (rssi_min == 0 || rssi_min == 0xff) { + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "rssi_min=%d, set AGC Tab0\n", rssi_min); + /*@adapt agc table 0*/ + phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0); + phydm_lna_sat_chk_init(dm); + return; + } else if (rssi_min % 2 != 0) { + igi_rssi_min = rssi_min + DIFF_RSSI_TO_IGI - 1; + } else { + igi_rssi_min = rssi_min + DIFF_RSSI_TO_IGI; + } + + if ((lna_info->chk_period > 0) && (lna_info->chk_period <= ONE_SEC_MS)) + max_check_time = chk_cnt * (ONE_SEC_MS / (lna_info->chk_period)) * 5; + else + max_check_time = chk_cnt * 5; + + lna_sat_cnt_thd = (max_check_time * lna_info->chk_duty_cycle) / 100; + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "check_time=%d, rssi_min=%d, igi_rssi_min=0x%x\nchk_cnt=%d, chk_period=%d, max_check_time=%d, lna_sat_cnt_thd=%d\n", + lna_info->check_time, + rssi_min, + igi_rssi_min, + chk_cnt, + lna_info->chk_period, + max_check_time, + lna_sat_cnt_thd); + + odm_write_dig(dm, igi_rssi_min); + + /*@adapt agc table 0 check saturation status*/ + #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) + if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) + phydm_set_ofdm_agc_tab_path(dm, OFDM_AGC_TAB_0, RF_PATH_A); + else + #endif + phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0); + /*@open rf power detection ckt & set detection range */ +#if (RTL8198F_SUPPORT) + if (dm->support_ic_type & ODM_RTL8198F) { + /*@set rf detection range (threshold)*/ + config_phydm_write_rf_reg_8198f(dm, RF_PATH_A, 0x85, + 0x3f, 0x3f); + config_phydm_write_rf_reg_8198f(dm, RF_PATH_B, 0x85, + 0x3f, 0x3f); + config_phydm_write_rf_reg_8198f(dm, RF_PATH_C, 0x85, + 0x3f, 0x3f); + config_phydm_write_rf_reg_8198f(dm, RF_PATH_D, 0x85, + 0x3f, 0x3f); + /*@open rf power detection ckt*/ + config_phydm_write_rf_reg_8198f(dm, RF_PATH_A, 0x86, 0x10, 1); + config_phydm_write_rf_reg_8198f(dm, RF_PATH_B, 0x86, 0x10, 1); + config_phydm_write_rf_reg_8198f(dm, RF_PATH_C, 0x86, 0x10, 1); + config_phydm_write_rf_reg_8198f(dm, RF_PATH_D, 0x86, 0x10, 1); + } +#elif (RTL8814B_SUPPORT) + if (dm->support_ic_type & ODM_RTL8814B) { + /*@set rf detection range (threshold)*/ + config_phydm_write_rf_reg_8814b(dm, RF_PATH_A, 0x8B, 0x3, 0x3); + config_phydm_write_rf_reg_8814b(dm, RF_PATH_B, 0x8B, 0x3, 0x3); + config_phydm_write_rf_reg_8814b(dm, RF_PATH_C, 0x8B, 0x3, 0x3); + config_phydm_write_rf_reg_8814b(dm, RF_PATH_D, 0x8B, 0x3, 0x3); + /*@open rf power detection ckt*/ + config_phydm_write_rf_reg_8814b(dm, RF_PATH_A, 0x8B, 0x4, 1); + config_phydm_write_rf_reg_8814b(dm, RF_PATH_B, 0x8B, 0x4, 1); + config_phydm_write_rf_reg_8814b(dm, RF_PATH_C, 0x8B, 0x4, 1); + config_phydm_write_rf_reg_8814b(dm, RF_PATH_D, 0x8B, 0x4, 1); + } +#else + odm_set_rf_reg(dm, RF_PATH_A, RF_0x86, 0x1f, 0x10); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x86, 0x1f, 0x10); + #ifdef PHYDM_IC_ABOVE_3SS + odm_set_rf_reg(dm, RF_PATH_C, RF_0x86, 0x1f, 0x10); + #endif + #ifdef PHYDM_IC_ABOVE_4SS + odm_set_rf_reg(dm, RF_PATH_D, RF_0x86, 0x1f, 0x10); + #endif +#endif + + /*@check saturation status*/ + for (i = 0; i < chk_cnt; i++) { +#if (RTL8198F_SUPPORT) + if (dm->support_ic_type & ODM_RTL8198F) { + sat_status_a = config_phydm_read_rf_reg_8198f(dm, RF_PATH_A, + RF_0xae, + 0xe0000); + sat_status_b = config_phydm_read_rf_reg_8198f(dm, RF_PATH_B, + RF_0xae, + 0xe0000); + sat_status_c = config_phydm_read_rf_reg_8198f(dm, RF_PATH_C, + RF_0xae, + 0xe0000); + sat_status_d = config_phydm_read_rf_reg_8198f(dm, RF_PATH_D, + RF_0xae, + 0xe0000); + } +#elif (RTL8814B_SUPPORT) + if (dm->support_ic_type & ODM_RTL8814B) { + /*@read peak detector info from 8814B rf reg*/ + sat_status_a = config_phydm_read_rf_reg_8814b(dm, RF_PATH_A, + RF_0xae, + 0xc0000); + sat_status_b = config_phydm_read_rf_reg_8814b(dm, RF_PATH_B, + RF_0xae, + 0xc0000); + sat_status_c = config_phydm_read_rf_reg_8814b(dm, RF_PATH_C, + RF_0xae, + 0xc0000); + sat_status_d = config_phydm_read_rf_reg_8814b(dm, RF_PATH_D, + RF_0xae, + 0xc0000); + } +#else + sat_status_a = odm_get_rf_reg(dm, RF_PATH_A, RF_0xae, 0xc0000); + sat_status_b = odm_get_rf_reg(dm, RF_PATH_B, RF_0xae, 0xc0000); + #ifdef PHYDM_IC_ABOVE_3SS + sat_status_c = odm_get_rf_reg(dm, RF_PATH_C, RF_0xae, 0xc0000); + #endif + #ifdef PHYDM_IC_ABOVE_4SS + sat_status_d = odm_get_rf_reg(dm, RF_PATH_D, RF_0xae, 0xc0000); + #endif +#endif + + if (sat_status_a != 0) + lna_info->sat_cnt_acc_patha++; + if (sat_status_b != 0) + lna_info->sat_cnt_acc_pathb++; + #ifdef PHYDM_IC_ABOVE_3SS + if (sat_status_c != 0) + lna_info->sat_cnt_acc_pathc++; + #endif + #ifdef PHYDM_IC_ABOVE_4SS + if (sat_status_d != 0) + lna_info->sat_cnt_acc_pathd++; + #endif + + if (lna_info->sat_cnt_acc_patha >= lna_sat_cnt_thd || + lna_info->sat_cnt_acc_pathb >= lna_sat_cnt_thd || + #ifdef PHYDM_IC_ABOVE_3SS + lna_info->sat_cnt_acc_pathc >= lna_sat_cnt_thd || + #endif + #ifdef PHYDM_IC_ABOVE_4SS + lna_info->sat_cnt_acc_pathd >= lna_sat_cnt_thd || + #endif + 0) { + lna_info->cur_sat_status = 1; + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "cur_sat_status=%d, check_time=%d\n", + lna_info->cur_sat_status, + lna_info->check_time); + break; + } + lna_info->cur_sat_status = 0; + } + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "cur_sat_status=%d, pre_sat_status=%d, sat_cnt_acc_patha=%d, sat_cnt_acc_pathb=%d\n", + lna_info->cur_sat_status, + lna_info->pre_sat_status, + lna_info->sat_cnt_acc_patha, + lna_info->sat_cnt_acc_pathb); + + #ifdef PHYDM_IC_ABOVE_4SS + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "cur_sat_status=%d, pre_sat_status=%d, sat_cnt_acc_pathc=%d, sat_cnt_acc_pathd=%d\n", + lna_info->cur_sat_status, + lna_info->pre_sat_status, + lna_info->sat_cnt_acc_pathc, + lna_info->sat_cnt_acc_pathd); + #endif + /*@agc table decision*/ + if (lna_info->cur_sat_status) { + if (!lna_info->dis_agc_table_swh) + #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) + if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) + phydm_set_ofdm_agc_tab_path(dm, + OFDM_AGC_TAB_2, + RF_PATH_A); + else + #endif + phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_2); + else + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "disable set to AGC Tab%d\n", OFDM_AGC_TAB_2); + lna_info->check_time = 0; + lna_info->sat_cnt_acc_patha = 0; + lna_info->sat_cnt_acc_pathb = 0; + #ifdef PHYDM_IC_ABOVE_3SS + lna_info->sat_cnt_acc_pathc = 0; + #endif + #ifdef PHYDM_IC_ABOVE_4SS + lna_info->sat_cnt_acc_pathd = 0; + #endif + lna_info->pre_sat_status = lna_info->cur_sat_status; + + } else if (lna_info->check_time <= (max_check_time - 1)) { + if (lna_info->pre_sat_status && !lna_info->dis_agc_table_swh) + #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) + if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) + phydm_set_ofdm_agc_tab_path(dm, + OFDM_AGC_TAB_2, + RF_PATH_A); + else + #endif + phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_2); + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ckeck time not reached\n"); + if (lna_info->dis_agc_table_swh) + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "disable set to AGC Tab%d\n", OFDM_AGC_TAB_2); + lna_info->check_time++; + + } else if (lna_info->check_time >= max_check_time) { + if (!lna_info->dis_agc_table_swh) + #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) + if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) + phydm_set_ofdm_agc_tab_path(dm, + OFDM_AGC_TAB_0, + RF_PATH_A); + else + #endif + phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0); + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ckeck time reached\n"); + if (lna_info->dis_agc_table_swh) + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "disable set to AGC Tab%d\n", OFDM_AGC_TAB_0); + lna_info->check_time = 0; + lna_info->sat_cnt_acc_patha = 0; + lna_info->sat_cnt_acc_pathb = 0; + #ifdef PHYDM_IC_ABOVE_3SS + lna_info->sat_cnt_acc_pathc = 0; + #endif + #ifdef PHYDM_IC_ABOVE_4SS + lna_info->sat_cnt_acc_pathd = 0; + #endif + lna_info->pre_sat_status = lna_info->cur_sat_status; + } + + #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) + if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) + agc_tab = phydm_get_ofdm_agc_tab_path(dm, RF_PATH_A); + else + #endif + agc_tab = phydm_get_ofdm_agc_tab(dm); + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "use AGC tab %d\n", agc_tab); + + /*@restore previous igi*/ + odm_write_dig(dm, igi_restore); + lna_info->cur_timer_check_cnt++; + odm_set_timer(dm, &lna_info->phydm_lna_sat_chk_timer, + lna_info->chk_period); +} + +void phydm_lna_sat_chk_callback( + void *dm_void + + ) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __func__); + phydm_lna_sat_chk(dm); +} + +void phydm_lna_sat_chk_timers( + void *dm_void, + u8 state) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info; + + if (state == INIT_LNA_SAT_CHK_TIMMER) { + odm_initialize_timer(dm, + &lna_info->phydm_lna_sat_chk_timer, + (void *)phydm_lna_sat_chk_callback, NULL, + "phydm_lna_sat_chk_timer"); + } else if (state == CANCEL_LNA_SAT_CHK_TIMMER) { + odm_cancel_timer(dm, &lna_info->phydm_lna_sat_chk_timer); + } else if (state == RELEASE_LNA_SAT_CHK_TIMMER) { + odm_release_timer(dm, &lna_info->phydm_lna_sat_chk_timer); + } +} + +void phydm_lna_sat_chk_watchdog_type1( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info; + + u8 rssi_min = dm->rssi_min; + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __func__); + + if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK)) { + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "func disable\n"); + return; + } + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "pre_timer_check_cnt=%d, cur_timer_check_cnt=%d\n", + lna_info->pre_timer_check_cnt, + lna_info->cur_timer_check_cnt); + + if (lna_info->is_disable_lna_sat_chk) { + phydm_lna_sat_chk_init(dm); + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "is_disable_lna_sat_chk=%d, return\n", + lna_info->is_disable_lna_sat_chk); + return; + } + + if (!(dm->support_ic_type & + (ODM_RTL8197F | ODM_RTL8198F | ODM_RTL8814B))) { + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "support_ic_type not 97F/98F/14B, return\n"); + return; + } + + if (rssi_min == 0 || rssi_min == 0xff) { + /*@adapt agc table 0 */ + phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0); + phydm_lna_sat_chk_init(dm); + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "rssi_min=%d, return\n", rssi_min); + return; + } + + if (lna_info->cur_timer_check_cnt == lna_info->pre_timer_check_cnt) { + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "fail, restart timer\n"); + odm_set_timer(dm, &lna_info->phydm_lna_sat_chk_timer, + lna_info->chk_period); + } else { + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "Timer check pass\n"); + } + lna_info->pre_timer_check_cnt = lna_info->cur_timer_check_cnt; +} + +#endif /*@#ifdef PHYDM_LNA_SAT_CHK_TYPE1*/ + +#ifdef PHYDM_LNA_SAT_CHK_TYPE2 + +void phydm_bubble_sort( + void *dm_void, + u8 *array, + u16 array_length) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u16 i, j; + u8 temp; + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); + for (i = 0; i < (array_length - 1); i++) { + for (j = (i + 1); j < (array_length); j++) { + if (array[i] > array[j]) { + temp = array[i]; + array[i] = array[j]; + array[j] = temp; + } + } + } +} + +void phydm_lna_sat_chk_type2_init( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + u8 real_shift = pinfo->total_bit_shift; + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); + + pinfo->total_cnt_snr = 1 << real_shift; + pinfo->is_sm_done = TRUE; + pinfo->is_snr_done = FALSE; + pinfo->cur_snr_mean = 0; + pinfo->cur_snr_var = 0; + pinfo->cur_lower_snr_mean = 0; + pinfo->pre_snr_mean = 0; + pinfo->pre_snr_var = 0; + pinfo->pre_lower_snr_mean = 0; + pinfo->nxt_state = ORI_TABLE_MONITOR; + pinfo->pre_state = ORI_TABLE_MONITOR; +} + +void phydm_snr_collect( + void *dm_void, + u8 rx_snr) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + + if (pinfo->is_sm_done) { +#if 0 + /*PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);*/ +#endif + + /* @adapt only path-A for calculation */ + pinfo->snr_statistic[pinfo->cnt_snr_statistic] = rx_snr; + + if (pinfo->cnt_snr_statistic == (pinfo->total_cnt_snr - 1)) { + pinfo->is_snr_done = TRUE; + pinfo->cnt_snr_statistic = 0; + } else { + pinfo->cnt_snr_statistic++; + } + } else { + return; + } +} + +void phydm_parsing_snr(void *dm_void, void *pktinfo_void, s8 *rx_snr) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *lna_t = &dm->dm_lna_sat_info; + struct phydm_perpkt_info_struct *pktinfo = NULL; + u8 target_macid = dm->rssi_min_macid; + + if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK)) + return; + + pktinfo = (struct phydm_perpkt_info_struct *)pktinfo_void; + + if (!pktinfo->is_packet_match_bssid) + return; + + if (lna_t->force_traget_macid != 0) + target_macid = lna_t->force_traget_macid; + + if (target_macid != pktinfo->station_id) + return; + + phydm_snr_collect(dm, rx_snr[0]); /*path-A B C D???*/ +} + +void phydm_snr_data_processing( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + u8 real_shift = pinfo->total_bit_shift; + u16 total_snr_cnt = pinfo->total_cnt_snr; + u16 total_loop_cnt = (total_snr_cnt - 1), i; + u32 temp; + u32 sum_snr_statistic = 0; + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "total_loop_cnt=%d\n", total_loop_cnt); + + for (i = 0; (i <= total_loop_cnt); i++) { + if (pinfo->is_snr_detail_en) { + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "snr[%d]=%d\n", i, pinfo->snr_statistic[i]); + } + + sum_snr_statistic += (u32)(pinfo->snr_statistic[i]); + + pinfo->snr_statistic_sqr[i] = (u16)(pinfo->snr_statistic[i] * pinfo->snr_statistic[i]); + } + + phydm_bubble_sort(dm, pinfo->snr_statistic, pinfo->total_cnt_snr); + + /*update SNR's cur mean*/ + pinfo->cur_snr_mean = (sum_snr_statistic >> real_shift); + + for (i = 0; (i <= total_loop_cnt); i++) { + if (pinfo->snr_statistic[i] >= pinfo->cur_snr_mean) + temp = pinfo->snr_statistic[i] - pinfo->cur_snr_mean; + else + temp = pinfo->cur_snr_mean - pinfo->snr_statistic[i]; + + pinfo->cur_snr_var += (temp * temp); + } + + /*update SNR's VAR*/ + pinfo->cur_snr_var = (pinfo->cur_snr_var >> real_shift); + + /*@acquire lower SNR's statistics*/ + temp = 0; + pinfo->cnt_lower_snr_statistic = (total_snr_cnt >> pinfo->lwr_snr_ratio_bit_shift); + pinfo->cnt_lower_snr_statistic = MAX_2(pinfo->cnt_lower_snr_statistic, SNR_RPT_MAX); + + for (i = 0; i < pinfo->cnt_lower_snr_statistic; i++) + temp += pinfo->snr_statistic[i]; + + pinfo->cur_lower_snr_mean = temp >> (real_shift - pinfo->lwr_snr_ratio_bit_shift); +} + +boolean phydm_is_snr_improve( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + boolean is_snr_improve; + u8 cur_state = pinfo->nxt_state; + u32 cur_mean = pinfo->cur_snr_mean; + u32 pre_mean = pinfo->pre_snr_mean; + u32 cur_lower_mean = pinfo->cur_lower_snr_mean; + u32 pre_lower_mean = pinfo->pre_lower_snr_mean; + u32 cur_var = pinfo->cur_snr_var; + + /*special case, zero VAR, interference is gone*/ + /*@make sure pre_var is larger enough*/ + if (cur_state == SAT_TABLE_MONITOR || + cur_state == ORI_TABLE_TRAINING) { + if (cur_mean >= pre_mean) { + if (cur_var == 0) + return true; + } + } +#if 0 + /*special case, mean degrade less than VAR improvement*/ + /*@make sure pre_var is larger enough*/ + if (cur_state == ORI_TABLE_MONITOR && + cur_mean < pre_mean && + cur_var < pre_var) { + diff_mean = pre_mean - cur_mean; + diff_var = pre_var - cur_var; + return (diff_var > (2 * diff_mean * diff_mean)) ? true : false; + } + +#endif + if (cur_lower_mean >= (pre_lower_mean + pinfo->delta_snr_mean)) + is_snr_improve = true; + else + is_snr_improve = false; +#if 0 +/* @condition refine, mean is bigger enough or VAR is smaller enough*/ +/* @1. from mean's view, mean improve delta_snr_mean(2), VAR not degrade lot*/ + if (cur_mean > (pre_mean + pinfo->delta_snr_mean)) { + is_mean_improve = TRUE; + is_var_improve = (cur_var <= pre_var + dm->delta_snr_var) + ? TRUE : FALSE; + + } else if (cur_var + dm->delta_snr_var <= pre_var) { + is_var_improve = TRUE; + is_mean_improve = ((cur_mean + 1) >= pre_mean) ? TRUE : FALSE; + } else { + return false; + } +#endif + return is_snr_improve; +} + +boolean phydm_is_snr_degrade( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + u32 cur_lower_mean = pinfo->cur_lower_snr_mean; + u32 pre_lower_mean = pinfo->pre_lower_snr_mean; + boolean is_degrade; + + if (cur_lower_mean <= (pre_lower_mean - pinfo->delta_snr_mean)) + is_degrade = TRUE; + else + is_degrade = FALSE; +#if 0 + is_mean_dgrade = (pinfo->cur_snr_mean + pinfo->delta_snr_mean <= pinfo->pre_snr_mean) ? TRUE : FALSE; + is_var_degrade = (pinfo->cur_snr_var > (pinfo->pre_snr_var + pinfo->delta_snr_mean)) ? TRUE : FALSE; + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s: cur_mean=%d, pre_mean=%d, cur_var=%d, pre_var=%d\n", + __func__, + pinfo->cur_snr_mean, + pinfo->pre_snr_mean, + pinfo->cur_snr_var, + pinfo->pre_snr_var); + + return (is_mean_dgrade & is_var_degrade); +#endif + return is_degrade; +} + +boolean phydm_is_large_var( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + boolean is_large_var = (pinfo->cur_snr_var >= pinfo->snr_var_thd) ? TRUE : FALSE; + + return is_large_var; +} + +void phydm_update_pre_status( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + + pinfo->pre_lower_snr_mean = pinfo->cur_lower_snr_mean; + pinfo->pre_snr_mean = pinfo->cur_snr_mean; + pinfo->pre_snr_var = pinfo->cur_snr_var; +} + +void phydm_ori_table_monitor( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + + if (phydm_is_large_var(dm)) { + pinfo->nxt_state = SAT_TABLE_TRAINING; + config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); + } else { + pinfo->nxt_state = ORI_TABLE_MONITOR; + /*switch to anti-sat table*/ + config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); + } + phydm_update_pre_status(dm); + pinfo->pre_state = ORI_TABLE_MONITOR; +} + +void phydm_sat_table_training( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + + #if 0 + if pre_state = ORI_TABLE_MONITOR || SAT_TABLE_TRY_FAIL, + /*@"pre" adapt ori-table, "cur" adapt sat-table*/ + /*@adapt ori table*/ + if (pinfo->pre_state == ORI_TABLE_MONITOR) { + pinfo->nxt_state = SAT_TABLE_TRAINING; + config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); + } else { + #endif + if (phydm_is_snr_improve(dm)) { + pinfo->nxt_state = SAT_TABLE_MONITOR; + } else { + pinfo->nxt_state = SAT_TABLE_TRY_FAIL; + config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); + } + /*@}*/ + + phydm_update_pre_status(dm); + pinfo->pre_state = SAT_TABLE_TRAINING; +} + +void phydm_sat_table_try_fail( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + + /* @if pre_state = SAT_TABLE_TRAINING, "pre" adapt sat-table, "cur" adapt ori-table */ + /* @if pre_state = SAT_TABLE_TRY_FAIL, "pre" adapt ori-table, "cur" adapt ori-table */ + + if (phydm_is_large_var(dm)) { + if (phydm_is_snr_degrade(dm)) { + pinfo->nxt_state = SAT_TABLE_TRAINING; + config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); + } else { + pinfo->nxt_state = SAT_TABLE_TRY_FAIL; + } + } else { + pinfo->nxt_state = ORI_TABLE_MONITOR; + } + phydm_update_pre_status(dm); + pinfo->pre_state = SAT_TABLE_TRY_FAIL; +} + +void phydm_sat_table_monitor( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + + if (phydm_is_snr_improve(dm)) { + pinfo->sat_table_monitor_times = 0; + + /* @if pre_state = SAT_TABLE_MONITOR, "pre" adapt sat-table, "cur" adapt sat-table */ + if (pinfo->pre_state == SAT_TABLE_MONITOR) { + pinfo->nxt_state = ORI_TABLE_TRAINING; + config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); + //phydm_update_pre_status(dm); + } else { + pinfo->nxt_state = SAT_TABLE_MONITOR; + } + + /* @if pre_state = SAT_TABLE_TRAINING, "pre" adapt sat-table, "cur" adapt sat-table */ + /* @if pre_state = ORI_TABLE_TRAINING, "pre" adapt ori-table, "cur" adapt sat-table */ + /*pre_state above is no need to update*/ + } else { + if (pinfo->sat_table_monitor_times == pinfo->force_change_period) { + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s: sat_table_monitor_times=%d\n", + __func__, pinfo->sat_table_monitor_times); + + pinfo->nxt_state = ORI_TABLE_TRAINING; + pinfo->sat_table_monitor_times = 0; + config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); + } else { + pinfo->nxt_state = SAT_TABLE_MONITOR; + pinfo->sat_table_monitor_times++; + } + } + phydm_update_pre_status(dm); + pinfo->pre_state = SAT_TABLE_MONITOR; +} + +void phydm_ori_table_training( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + + /* pre_state = SAT_TABLE_MONITOR, "pre" adapt sat-table, "cur" adapt ori-table */ + + if (phydm_is_snr_degrade(dm) == FALSE) { + pinfo->nxt_state = ORI_TABLE_MONITOR; + } else { + if (pinfo->pre_snr_var == 0) + pinfo->nxt_state = ORI_TABLE_TRY_FAIL; + else + pinfo->nxt_state = SAT_TABLE_MONITOR; + + config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); + } + phydm_update_pre_status(dm); + pinfo->pre_state = ORI_TABLE_TRAINING; +} + +void phydm_ori_table_try_fail( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + + if (pinfo->pre_state == ORI_TABLE_TRY_FAIL) { + if (phydm_is_snr_improve(dm)) { + pinfo->nxt_state = ORI_TABLE_TRAINING; + pinfo->ori_table_try_fail_times = 0; + config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); + } else { + if (pinfo->ori_table_try_fail_times == pinfo->force_change_period) { + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "%s: ori_table_try_fail_times=%d\n", __func__, pinfo->ori_table_try_fail_times); + + pinfo->nxt_state = ORI_TABLE_TRY_FAIL; + pinfo->ori_table_try_fail_times = 0; + phydm_update_pre_status(dm); + } else { + pinfo->nxt_state = ORI_TABLE_TRY_FAIL; + pinfo->ori_table_try_fail_times++; + phydm_update_pre_status(dm); + //config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); + } + } + } else { + pinfo->nxt_state = ORI_TABLE_TRY_FAIL; + pinfo->ori_table_try_fail_times = 0; + phydm_update_pre_status(dm); + //config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); + } + +#if 0 + if (phydm_is_large_var(dm)) { + if (phydm_is_snr_degrade(dm)) { + pinfo->nxt_state = SAT_TABLE_TRAINING; + config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); + } else { + pinfo->nxt_state = SAT_TABLE_TRY_FAIL; + } + } else { + pinfo->nxt_state = ORI_TABLE_MONITOR; + } + + phydm_update_pre_status(dm); +#endif + pinfo->pre_state = ORI_TABLE_TRY_FAIL; +} + +char *phydm_lna_sat_state_msg( + void *dm_void, + IN u8 state) +{ + char *dbg_message; + + switch (state) { + case ORI_TABLE_MONITOR: + dbg_message = "ORI_TABLE_MONITOR"; + break; + + case SAT_TABLE_TRAINING: + dbg_message = "SAT_TABLE_TRAINING"; + break; + + case SAT_TABLE_TRY_FAIL: + dbg_message = "SAT_TABLE_TRY_FAIL"; + break; + + case SAT_TABLE_MONITOR: + dbg_message = "SAT_TABLE_MONITOR"; + break; + + case ORI_TABLE_TRAINING: + dbg_message = "ORI_TABLE_TRAINING"; + break; + + case ORI_TABLE_TRY_FAIL: + dbg_message = "ORI_TABLE_TRY_FAIL"; + break; + + default: + dbg_message = "ORI_TABLE_MONITOR"; + break; + } + + return dbg_message; +} + +void phydm_lna_sat_type2_sm( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; + u8 state = pinfo->nxt_state; + u8 agc_tab = (u8)odm_get_bb_reg(dm, 0x958, 0x1f); + char *dbg_message, *nxt_dbg_message; + u8 real_shift = pinfo->total_bit_shift; + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n\n%s ==>\n", __func__); + + if ((dm->support_ic_type & ODM_RTL8822B) == FALSE) { + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ODM_BB_LNA_SAT_CHK_TYPE2 only support 22B.\n"); + return; + } + + if ((dm->support_ability & ODM_BB_LNA_SAT_CHK) == FALSE) { + phydm_lna_sat_chk_type2_init(dm); + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ODM_BB_LNA_SAT_CHK_TYPE2 is NOT supported, cur table=%d\n", agc_tab); + return; + } + + if (pinfo->is_snr_done) + phydm_snr_data_processing(dm); + else + return; + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "cur agc table %d\n", agc_tab); + + if (pinfo->is_force_lna_sat_table != AUTO_AGC_TABLE) { + /*reset state machine*/ + pinfo->nxt_state = ORI_TABLE_MONITOR; + if (pinfo->is_snr_done) { + if (pinfo->is_force_lna_sat_table == DEFAULT_AGC_TABLE) + config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); + else if (pinfo->is_force_lna_sat_table == LNA_SAT_AGC_TABLE) + config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); + else + config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "%s: cur_mean=%d, pre_mean=%d, cur_var=%d, pre_var=%d,cur_lower_mean=%d, pre_lower_mean=%d, cnt_lower_snr=%d\n", + __func__, + pinfo->cur_snr_mean, + pinfo->pre_snr_mean, + pinfo->cur_snr_var, + pinfo->pre_snr_var, + pinfo->cur_lower_snr_mean, + pinfo->pre_lower_snr_mean, + pinfo->cnt_lower_snr_statistic); + + pinfo->is_snr_done = FALSE; + pinfo->is_sm_done = TRUE; + phydm_update_pre_status(dm); + } else { + return; + } + } else if (pinfo->is_snr_done) { + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, + "%s: cur_mean=%d, pre_mean=%d, cur_var=%d, pre_var=%d,cur_lower_mean=%d, pre_lower_mean=%d, cnt_lower_snr=%d\n", + __func__, + pinfo->cur_snr_mean, + pinfo->pre_snr_mean, + pinfo->cur_snr_var, + pinfo->pre_snr_var, + pinfo->cur_lower_snr_mean, + pinfo->pre_lower_snr_mean, + pinfo->cnt_lower_snr_statistic); + + switch (state) { + case ORI_TABLE_MONITOR: + dbg_message = "ORI_TABLE_MONITOR"; + phydm_ori_table_monitor(dm); + break; + + case SAT_TABLE_TRAINING: + dbg_message = "SAT_TABLE_TRAINING"; + phydm_sat_table_training(dm); + break; + + case SAT_TABLE_TRY_FAIL: + dbg_message = "SAT_TABLE_TRY_FAIL"; + phydm_sat_table_try_fail(dm); + break; + + case SAT_TABLE_MONITOR: + dbg_message = "SAT_TABLE_MONITOR"; + phydm_sat_table_monitor(dm); + break; + + case ORI_TABLE_TRAINING: + dbg_message = "ORI_TABLE_TRAINING"; + phydm_ori_table_training(dm); + break; + + case ORI_TABLE_TRY_FAIL: + dbg_message = "ORI_TABLE_TRAINING"; + phydm_ori_table_try_fail(dm); + break; + + default: + dbg_message = "ORI_TABLE_MONITOR"; + phydm_ori_table_monitor(dm); + break; + } + + dbg_message = phydm_lna_sat_state_msg(dm, state); + nxt_dbg_message = phydm_lna_sat_state_msg(dm, pinfo->nxt_state); + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "state: [%s]->[%s]\n", + dbg_message, nxt_dbg_message); + + pinfo->is_snr_done = FALSE; + pinfo->is_sm_done = TRUE; + pinfo->total_cnt_snr = 1 << real_shift; + + } else { + return; + } +} + + +#endif /*@#ifdef PHYDM_LNA_SAT_CHK_TYPE2*/ + +void phydm_lna_sat_debug( + void *dm_void, + char input[][16], + u32 *_used, + char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *lna_t = &dm->dm_lna_sat_info; + char help[] = "-h"; + char monitor[] = "-m"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + u8 i; + u8 agc_tab = 0; + + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "monitor: -m\n"); + #ifdef PHYDM_LNA_SAT_CHK_TYPE1 + PDM_SNPF(out_len, used, output + used, out_len - used, + "{0} {lna_sat_chk_en}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{1} {agc_table_switch_en}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{2} {chk_cnt per callback}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{3} {chk_period(ms)}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{4} {chk_duty_cycle(%)}\n"); + #endif + } else if ((strcmp(input[1], monitor) == 0)) { +#ifdef PHYDM_LNA_SAT_CHK_TYPE1 + #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) + if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) + agc_tab = phydm_get_ofdm_agc_tab_path(dm, RF_PATH_A); + else + #endif + agc_tab = phydm_get_ofdm_agc_tab(dm); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "%s%d, %s%d, %s%d, %s%d\n", + "check_time = ", lna_t->check_time, + "pre_sat_status = ", lna_t->pre_sat_status, + "cur_sat_status = ", lna_t->cur_sat_status, + "current AGC tab = ", agc_tab); +#endif + } else { + PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); + + for (i = 1; i < 10; i++) { + if (input[i + 1]) + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, + &var1[i]); + } + #ifdef PHYDM_LNA_SAT_CHK_TYPE1 + if (var1[0] == 0) { + if (var1[1] == 1) + lna_t->is_disable_lna_sat_chk = false; + else if (var1[1] == 0) + lna_t->is_disable_lna_sat_chk = true; + + PDM_SNPF(out_len, used, output + used, out_len - used, + "dis_lna_sat_chk=%d\n", + lna_t->is_disable_lna_sat_chk); + } else if (var1[0] == 1) { + if (var1[1] == 1) + lna_t->dis_agc_table_swh = false; + else if (var1[1] == 0) + lna_t->dis_agc_table_swh = true; + + PDM_SNPF(out_len, used, output + used, out_len - used, + "dis_agc_table_swh=%d\n", + lna_t->dis_agc_table_swh); + + } else if (var1[0] == 2) { + lna_t->chk_cnt = (u8)var1[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "chk_cnt=%d\n", lna_t->chk_cnt); + } else if (var1[0] == 3) { + lna_t->chk_period = var1[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "chk_period=%d\n", lna_t->chk_period); + } else if (var1[0] == 4) { + lna_t->chk_duty_cycle = (u8)var1[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "chk_duty_cycle=%d\n", + lna_t->chk_duty_cycle); + } + #endif + #ifdef PHYDM_LNA_SAT_CHK_TYPE2 + if (var1[0] == 1) + lna_t->force_traget_macid = var1[1]; + #endif + } + *_used = used; + *_out_len = out_len; +} + +void phydm_lna_sat_chk_watchdog( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info; + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); + + if (lna_sat->lna_sat_type == LNA_SAT_WITH_PEAK_DET) { + #ifdef PHYDM_LNA_SAT_CHK_TYPE1 + phydm_lna_sat_chk_watchdog_type1(dm); + #endif + } else if (lna_sat->lna_sat_type == LNA_SAT_WITH_TRAIN) { + #ifdef PHYDM_LNA_SAT_CHK_TYPE2 + + #endif + } + +} + +void phydm_lna_sat_config( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info; + + #if (RTL8822B_SUPPORT == 1) + if (dm->support_ic_type & (ODM_RTL8822B)) + lna_sat->lna_sat_type = LNA_SAT_WITH_TRAIN; + #endif + + #if (RTL8197F_SUPPORT || RTL8192F_SUPPORT ||\ + RTL8198F_SUPPORT || RTL8814B_SUPPORT) + if (dm->support_ic_type & + (ODM_RTL8197F | ODM_RTL8192F | ODM_RTL8198F | ODM_RTL8814B)) + lna_sat->lna_sat_type = LNA_SAT_WITH_PEAK_DET; + #endif + + PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "[%s] lna_sat_type=%d\n", + __func__, lna_sat->lna_sat_type); +} + +void phydm_lna_sat_check_init( + void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info; + + if ((dm->support_ability & ODM_BB_LNA_SAT_CHK)) + return; + + /*@2018.04.17 Johnson*/ + phydm_lna_sat_config(dm); + #ifdef PHYDM_LNA_SAT_CHK_TYPE1 + lna_sat->chk_period = LNA_CHK_PERIOD; + lna_sat->chk_cnt = LNA_CHK_CNT; + lna_sat->chk_duty_cycle = LNA_CHK_DUTY_CYCLE; + lna_sat->dis_agc_table_swh = false; + #endif + /*@2018.04.17 Johnson end*/ + + if (lna_sat->lna_sat_type == LNA_SAT_WITH_PEAK_DET) { + #ifdef PHYDM_LNA_SAT_CHK_TYPE1 + phydm_lna_sat_chk_init(dm); + #endif + } else if (lna_sat->lna_sat_type == LNA_SAT_WITH_TRAIN) { + #ifdef PHYDM_LNA_SAT_CHK_TYPE2 + phydm_lna_sat_chk_type2_init(dm); + #endif + } +} + +#endif /*@#ifdef PHYDM_LNA_SAT_CHK_SUPPORT*/ diff --git a/hal/phydm/phydm_lna_sat.h b/hal/phydm/phydm_lna_sat.h new file mode 100644 index 0000000..c9345b8 --- /dev/null +++ b/hal/phydm/phydm_lna_sat.h @@ -0,0 +1,173 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +#ifndef __PHYDM_LNA_SAT_H__ +#define __PHYDM_LNA_SAT_H__ +#ifdef PHYDM_LNA_SAT_CHK_SUPPORT +/* @1 ============================================================ + * 1 Definition + * 1 ============================================================ + */ + +#define LNA_SAT_VERSION "1.0" + +/*@LNA saturation check*/ +#define OFDM_AGC_TAB_0 0 +#define OFDM_AGC_TAB_2 2 + +#define DIFF_RSSI_TO_IGI 10 +#define ONE_SEC_MS 1000 + +#define LNA_CHK_PERIOD 100 /*@ms*/ +#define LNA_CHK_CNT 10 /*@checks per callback*/ +#define LNA_CHK_DUTY_CYCLE 5 /*@percentage*/ + +#define DELTA_STD 2 +#define DELTA_MEAN 2 +#define SNR_STATISTIC_SHIFT 8 +#define SNR_RPT_MAX 256 + +/* @1 ============================================================ + * 1 enumrate + * 1 ============================================================ + */ + +enum lna_sat_timer_state { + INIT_LNA_SAT_CHK_TIMMER, + CANCEL_LNA_SAT_CHK_TIMMER, + RELEASE_LNA_SAT_CHK_TIMMER +}; + +#ifdef PHYDM_LNA_SAT_CHK_TYPE2 +enum lna_sat_chk_type2_status { + ORI_TABLE_MONITOR, + ORI_TABLE_TRAINING, + SAT_TABLE_MONITOR, + SAT_TABLE_TRAINING, + SAT_TABLE_TRY_FAIL, + ORI_TABLE_TRY_FAIL +}; + +#endif + +enum lna_sat_type { + LNA_SAT_WITH_PEAK_DET = 1, /*type1*/ + LNA_SAT_WITH_TRAIN = 2, /*type2*/ +}; + +/* @1 ============================================================ + * 1 structure + * 1 ============================================================ + */ + +struct phydm_lna_sat_t { +#ifdef PHYDM_LNA_SAT_CHK_TYPE1 + u8 chk_cnt; + u8 chk_duty_cycle; + u32 chk_period;/*@ms*/ + boolean is_disable_lna_sat_chk; + boolean dis_agc_table_swh; +#endif +#ifdef PHYDM_LNA_SAT_CHK_TYPE2 + u8 force_traget_macid; + u32 snr_var_thd; + u32 delta_snr_mean; + u16 ori_table_try_fail_times; + u16 cnt_lower_snr_statistic; + u16 sat_table_monitor_times; + u16 force_change_period; + u8 is_snr_detail_en; + u8 is_force_lna_sat_table; + u8 lwr_snr_ratio_bit_shift; + u8 cnt_snr_statistic; + u16 snr_statistic_sqr[SNR_RPT_MAX]; + u8 snr_statistic[SNR_RPT_MAX]; + u8 is_sm_done; + u8 is_snr_done; + u32 cur_snr_var; + u8 total_bit_shift; + u8 total_cnt_snr; + u32 cur_snr_mean; + u8 cur_snr_var0; + u32 cur_lower_snr_mean; + u32 pre_snr_mean; + u32 pre_snr_var; + u32 pre_lower_snr_mean; + u8 nxt_state; + u8 pre_state; +#endif + enum lna_sat_type lna_sat_type; + u32 sat_cnt_acc_patha; + u32 sat_cnt_acc_pathb; +#ifdef PHYDM_IC_ABOVE_3SS + u32 sat_cnt_acc_pathc; +#endif +#ifdef PHYDM_IC_ABOVE_4SS + u32 sat_cnt_acc_pathd; +#endif + u32 check_time; + boolean pre_sat_status; + boolean cur_sat_status; + struct phydm_timer_list phydm_lna_sat_chk_timer; + u32 cur_timer_check_cnt; + u32 pre_timer_check_cnt; +}; + +/* @1 ============================================================ + * 1 function prototype + * 1 ============================================================ + */ +void phydm_lna_sat_chk_init(void *dm_void); + +u8 phydm_get_ofdm_agc_tab(void *dm_void); + +void phydm_lna_sat_chk(void *dm_void); + +void phydm_lna_sat_chk_timers(void *dm_void, u8 state); + +#ifdef PHYDM_LNA_SAT_CHK_TYPE1 +#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) +void phydm_lna_sat_chk_bb_init(void *dm_void); + +void phydm_set_ofdm_agc_tab_path(void *dm_void, + u8 tab_sel, enum rf_path path); + +u8 phydm_get_ofdm_agc_tab_path(void *dm_void, enum rf_path path); +#endif /*@#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)*/ +#endif + +#ifdef PHYDM_LNA_SAT_CHK_TYPE2 +void phydm_parsing_snr(void *dm_void, void *pktinfo_void, s8 *rx_snr); +#endif + +void phydm_lna_sat_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); + +void phydm_lna_sat_chk_watchdog(void *dm_void); + +void phydm_lna_sat_check_init(void *dm_void); + +#endif /*@#if (PHYDM_LNA_SAT_CHK_SUPPORT == 1)*/ +#endif diff --git a/hal/phydm/phydm_math_lib.c b/hal/phydm/phydm_math_lib.c index 16480f6..90e0868 100644 --- a/hal/phydm/phydm_math_lib.c +++ b/hal/phydm/phydm_math_lib.c @@ -22,88 +22,98 @@ * Larry Finger * *****************************************************************************/ - -/* ************************************************************ - * include files - * ************************************************************ */ - -#include "mp_precomp.h" -#include "phydm_precomp.h" - -const u16 db_invert_table[12][8] = { - { 1, 1, 1, 2, 2, 2, 2, 3}, - { 3, 3, 4, 4, 4, 5, 6, 6}, - { 7, 8, 9, 10, 11, 13, 14, 16}, - { 18, 20, 22, 25, 28, 32, 35, 40}, - { 45, 50, 56, 63, 71, 79, 89, 100}, - { 112, 126, 141, 158, 178, 200, 224, 251}, - { 282, 316, 355, 398, 447, 501, 562, 631}, - { 708, 794, 891, 1000, 1122, 1259, 1413, 1585}, - { 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981}, - { 4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000}, - { 11220, 12589, 14125, 15849, 17783, 19953, 22387, 25119}, - { 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535} -}; - + +/*@************************************************************ + * include files + ************************************************************/ + +#include "mp_precomp.h" +#include "phydm_precomp.h" + +const u32 db_invert_table[12][8] = { + {10, 13, 16, 20, 25, 32, 40, 50}, /* @U(32,3) */ + {64, 80, 101, 128, 160, 201, 256, 318}, /* @U(32,3) */ + {401, 505, 635, 800, 1007, 1268, 1596, 2010}, /* @U(32,3) */ + {316, 398, 501, 631, 794, 1000, 1259, 1585}, /* @U(32,0) */ + {1995, 2512, 3162, 3981, 5012, 6310, 7943, 10000}, /* @U(32,0) */ + {12589, 15849, 19953, 25119, 31623, 39811, 50119, 63098}, /* @U(32,0) */ + {79433, 100000, 125893, 158489, 199526, 251189, 316228, + 398107}, /* @U(32,0) */ + {501187, 630957, 794328, 1000000, 1258925, 1584893, 1995262, + 2511886}, /* @U(32,0) */ + {3162278, 3981072, 5011872, 6309573, 7943282, 1000000, 12589254, + 15848932}, /* @U(32,0) */ + {19952623, 25118864, 31622777, 39810717, 50118723, 63095734, + 79432823, 100000000}, /* @U(32,0) */ + {125892541, 158489319, 199526232, 251188643, 316227766, 398107171, + 501187234, 630957345}, /* @U(32,0) */ + {794328235, 1000000000, 1258925412, 1584893192, 1995262315, + 2511886432U, 3162277660U, 3981071706U} }; /* @U(32,0) */ /*Y = 10*log(X)*/ -s32 -odm_pwdb_conversion( - s32 X, - u32 total_bit, - u32 decimal_bit -) +s32 odm_pwdb_conversion(s32 X, u32 total_bit, u32 decimal_bit) { s32 Y, integer = 0, decimal = 0; u32 i; if (X == 0) - X = 1; /* log2(x), x can't be 0 */ + X = 1; /* @log2(x), x can't be 0 */ for (i = (total_bit - 1); i > 0; i--) { if (X & BIT(i)) { integer = i; - if (i > 0) - decimal = (X & BIT(i - 1)) ? 2 : 0; /* decimal is 0.5dB*3=1.5dB~=2dB */ + if (i > 0) { + /*decimal is 0.5dB*3=1.5dB~=2dB */ + decimal = (X & BIT(i - 1)) ? 2 : 0; + } break; } } - Y = 3 * (integer - decimal_bit) + decimal; /* 10*log(x)=3*log2(x), */ + Y = 3 * (integer - decimal_bit) + decimal; /* @10*log(x)=3*log2(x), */ return Y; } -s32 -odm_sign_conversion( - s32 value, - u32 total_bit -) +s32 odm_sign_conversion(s32 value, u32 total_bit) { if (value & BIT(total_bit - 1)) - value -= BIT(total_bit); - + value -= BIT(total_bit); + return value; } -void -phydm_seq_sorting( - void *dm_void, - u32 *value, - u32 *rank_idx, - u32 *idx_out, - u8 seq_length -) +/*threshold must form low to high*/ +u16 phydm_find_intrvl(void *dm_void, u16 val, u16 *threshold, u16 th_len) { - u8 i = 0, j = 0; - u32 tmp_a, tmp_b; - u32 tmp_idx_a, tmp_idx_b; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u16 i = 0; + u16 ret_val = 0; + u16 max_th = threshold[th_len - 1]; - for (i = 0; i < seq_length; i++) { - rank_idx[i] = i; - /**/ + for (i = 0; i < th_len; i++) { + if (val < threshold[i]) { + ret_val = i; + break; + } else if (val >= max_th) { + ret_val = th_len; + break; + } } + return ret_val; +} + +void phydm_seq_sorting(void *dm_void, u32 *value, u32 *rank_idx, u32 *idx_out, + u8 seq_length) +{ + u8 i = 0, j = 0; + u32 tmp_a, tmp_b; + u32 tmp_idx_a, tmp_idx_b; + + for (i = 0; i < seq_length; i++) + rank_idx[i] = i; + for (i = 0; i < (seq_length - 1); i++) { for (j = 0; j < (seq_length - 1 - i); j++) { tmp_a = value[j]; @@ -122,58 +132,139 @@ phydm_seq_sorting( } } - for (i = 0; i < seq_length; i++) { + for (i = 0; i < seq_length; i++) idx_out[rank_idx[i]] = i + 1; - /**/ - } } - -u32 -odm_convert_to_db( - u32 value) + +u32 odm_convert_to_db(u64 value) { u8 i; u8 j; u32 dB; - value = value & 0xFFFF; + if (value >= db_invert_table[11][7]) + return 96; /* @maximum 96 dB */ for (i = 0; i < 12; i++) { - if (value <= db_invert_table[i][7]) + if (i <= 2 && (value << FRAC_BITS) <= db_invert_table[i][7]) + break; + else if (i > 2 && value <= db_invert_table[i][7]) break; - } - - if (i >= 12) { - return 96; /* maximum 96 dB */ } for (j = 0; j < 8; j++) { - if (value <= db_invert_table[i][j]) + if (i <= 2 && (value << FRAC_BITS) <= db_invert_table[i][j]) + break; + else if (i > 2 && i < 12 && value <= db_invert_table[i][j]) break; } + if (j == 0 && i == 0) + goto end; + + if (j == 0) { + if (i != 3) { + if (db_invert_table[i][0] - value > + value - db_invert_table[i - 1][7]) { + i = i - 1; + j = 7; + } + } else { + if (db_invert_table[3][0] - value > + value - db_invert_table[2][7]) { + i = 2; + j = 7; + } + } + } else { + if (db_invert_table[i][j] - value > + value - db_invert_table[i][j - 1]) { + i = i; + j = j - 1; + } + } +end: dB = (i << 3) + j + 1; return dB; } -u32 -odm_convert_to_linear( - u32 value) +u64 phydm_db_2_linear(u32 value) { - u8 i; - u8 j; - u32 linear; - - /* 1dB~96dB */ + u8 i = 0; + u8 j = 0; + u64 linear = 0; value = value & 0xFF; + /* @1dB~96dB */ + if (value > 96) { + value = 96; + } else if (value < 1) { + linear = 1; + return linear; + } + i = (u8)((value - 1) >> 3); j = (u8)(value - 1) - (i << 3); linear = db_invert_table[i][j]; + if (i > 2) + linear = linear << FRAC_BITS; + return linear; -} - +} + +u16 phydm_show_fraction_num(u32 frac_val, u8 bit_num) +{ + u8 i = 0; + u16 val = 0; + u16 base = 5000; + + for (i = bit_num; i > 0; i--) { + if (frac_val & BIT(i - 1)) + val += (base >> (bit_num - i)); + } + return val; +} + +u64 phydm_gen_bitmask(u8 mask_num) +{ + u8 i = 0; + u64 bitmask = 0; + + if (mask_num > 64) + return 1; + + for (i = 0; i < mask_num; i++) + bitmask = (bitmask << 1) | BIT(0); + + return bitmask; +} + +s32 phydm_cnvrt_2_sign(u32 val, u8 bit_num) +{ + if (bit_num >= 32) + return (s32)val; + + if (val & BIT(bit_num - 1)) /*Sign BIT*/ + val -= (1 << bit_num); /*@2's*/ + + return val; +} + +s64 phydm_cnvrt_2_sign_64(u64 val, u8 bit_num) +{ + u64 one = 1; + s64 val_sign = (s64)val; + + if (bit_num >= 64) + return (s64)val; + + if (val & (one << (bit_num - 1))) /*Sign BIT*/ + val_sign = val - (one << bit_num); /*@2's*/ + + return val_sign; +} + diff --git a/hal/phydm/phydm_math_lib.h b/hal/phydm/phydm_math_lib.h index 80124f9..25efc51 100644 --- a/hal/phydm/phydm_math_lib.h +++ b/hal/phydm/phydm_math_lib.h @@ -23,65 +23,96 @@ * *****************************************************************************/ +#ifndef __PHYDM_MATH_LIB_H__ +#define __PHYDM_MATH_LIB_H__ -#ifndef __PHYDM_MATH_LIB_H__ -#define __PHYDM_MATH_LIB_H__ +/* @2019.01.24 remove linear2db debug log*/ +#define AUTO_MATH_LIB_VERSION "1.2" -#define AUTO_MATH_LIB_VERSION "1.0" /* 2017.06.06*/ - - -/* 1 ============================================================ +/*@ + * 1 ============================================================ * 1 Definition - * 1 ============================================================ */ - - - - -/* 1 ============================================================ - * 1 enumeration - * 1 ============================================================ */ - - - -/* 1 ============================================================ - * 1 structure - * 1 ============================================================ */ - - -/* 1 ============================================================ - * 1 function prototype - * 1 ============================================================ */ - -s32 -odm_pwdb_conversion( - s32 X, - u32 total_bit, - u32 decimal_bit -); - -s32 -odm_sign_conversion( - s32 value, - u32 total_bit -); - -void -phydm_seq_sorting( - void *dm_void, - u32 *value, - u32 *rank_idx, - u32 *idx_out, - u8 seq_length -); - -u32 -odm_convert_to_db( - u32 value -); - -u32 -odm_convert_to_linear( - u32 value -); + * 1 ============================================================ + */ +#define PHYDM_DIV(a, b) ((b) ? (a / b) : 0) +#define DIVIDED_2(X) ((X) >> 1) +/*@1/3 ~ 11/32*/ +#if defined(DM_ODM_CE_MAC80211) +#define DIVIDED_3(X) ({ \ + u32 div_3_tmp = (X); \ + (((div_3_tmp) + ((div_3_tmp) << 1) + ((div_3_tmp) << 3)) >> 5); }) +#else +#define DIVIDED_3(X) (((X) + ((X) << 1) + ((X) << 3)) >> 5) +#endif +#define DIVIDED_4(X) ((X) >> 2) + +/*Store Ori Value*/ +#if defined(DM_ODM_CE_MAC80211) +#define WEIGHTING_AVG(v1, w1, v2, w2) \ + __WEIGHTING_AVG(v1, w1, v2, w2, typeof(v1), typeof(w1), typeof(v2), \ + typeof(w2)) +#define __WEIGHTING_AVG(v1, w1, v2, w2, t1, t2, t3, t4) ({ \ + t1 __w_a_v1 = (v1); \ + t2 __w_a_w1 = (w1); \ + t3 __w_a_v2 = (v2); \ + t4 __w_a_w2 = (w2); \ + ((__w_a_v1) * (__w_a_w1) + (__w_a_v2) * (__w_a_w2)) \ + / ((__w_a_w2) + (__w_a_w1)); }) +#else +#define WEIGHTING_AVG(v1, w1, v2, w2) \ + (((v1) * (w1) + (v2) * (w2)) / ((w2) + (w1))) +#endif + +/*Store 2^ma x Value*/ +#if defined(DM_ODM_CE_MAC80211) +#define MA_ACC(old, new_val, ma) ({ \ + s16 __ma_acc_o = (old); \ + (__ma_acc_o) - ((__ma_acc_o) >> (ma)) + (new_val); }) +#define GET_MA_VAL(val, ma) ({ \ + s16 __get_ma_tmp = (ma);\ + ((val) + (1 << ((__get_ma_tmp) - 1))) >> (__get_ma_tmp); }) +#else +#define MA_ACC(old, new_val, ma) ((old) - ((old) >> (ma)) + (new_val)) +#define GET_MA_VAL(val, ma) (((val) + (1 << ((ma) - 1))) >> (ma)) +#endif +#define FRAC_BITS 3 +/*@ + * 1 ============================================================ + * 1 enumeration + * 1 ============================================================ + */ + +/*@ + * 1 ============================================================ + * 1 structure + * 1 ============================================================ + */ + +/*@ + * 1 ============================================================ + * 1 function prototype + * 1 ============================================================ + */ + +s32 odm_pwdb_conversion(s32 X, u32 total_bit, u32 decimal_bit); + +s32 odm_sign_conversion(s32 value, u32 total_bit); + +u16 phydm_find_intrvl(void *dm_void, u16 val, u16 *threshold, u16 th_len); + +void phydm_seq_sorting(void *dm_void, u32 *value, u32 *rank_idx, u32 *idx_out, + u8 seq_length); + +u32 odm_convert_to_db(u64 value); + +u64 phydm_db_2_linear(u32 value); + +u16 phydm_show_fraction_num(u32 frac_val, u8 bit_num); + +u64 phydm_gen_bitmask(u8 mask_num); + +s32 phydm_cnvrt_2_sign(u32 val, u8 bit_num); + +s64 phydm_cnvrt_2_sign_64(u64 val, u8 bit_num); #endif diff --git a/hal/phydm/phydm_mp.c b/hal/phydm/phydm_mp.c new file mode 100644 index 0000000..3af2c0c --- /dev/null +++ b/hal/phydm/phydm_mp.c @@ -0,0 +1,348 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +/*@************************************************************ + * include files + ************************************************************/ + +#include "mp_precomp.h" +#include "phydm_precomp.h" + +#ifdef PHYDM_MP_SUPPORT +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + +void phydm_mp_set_single_tone_jgr3(void *dm_void, boolean is_single_tone, + u8 path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_mp *mp = &dm->dm_mp_table; + u8 start = RF_PATH_A, end = RF_PATH_A; + u8 i = 0; + + switch (path) { + case RF_PATH_A: + case RF_PATH_B: + case RF_PATH_C: + case RF_PATH_D: + start = path; + end = path; + break; + case RF_PATH_AB: + start = RF_PATH_A; + end = RF_PATH_B; + break; +#if (RTL8814B_SUPPORT == 1 || RTL8198F_SUPPORT == 1) + case RF_PATH_AC: + start = RF_PATH_A; + end = RF_PATH_C; + break; + case RF_PATH_AD: + start = RF_PATH_A; + end = RF_PATH_D; + break; + case RF_PATH_BC: + start = RF_PATH_B; + end = RF_PATH_C; + break; + case RF_PATH_BD: + start = RF_PATH_B; + end = RF_PATH_D; + break; + case RF_PATH_CD: + start = RF_PATH_C; + end = RF_PATH_D; + break; + case RF_PATH_ABC: + start = RF_PATH_A; + end = RF_PATH_C; + break; + case RF_PATH_ABD: + start = RF_PATH_A; + end = RF_PATH_D; + break; + case RF_PATH_ACD: + start = RF_PATH_A; + end = RF_PATH_D; + break; + case RF_PATH_BCD: + start = RF_PATH_B; + end = RF_PATH_D; + break; + case RF_PATH_ABCD: + start = RF_PATH_A; + end = RF_PATH_D; + break; +#endif + } + if (is_single_tone) { + mp->rf_reg0 = odm_get_rf_reg(dm, RF_PATH_A, RF_0x00, 0xfffff); +#if 0 + mp->rfe_sel_a_0 = odm_get_bb_reg(dm, R_0x1840, MASKDWORD); + mp->rfe_sel_b_0 = odm_get_bb_reg(dm, R_0x4140, MASKDWORD); + mp->rfe_sel_c_0 = odm_get_bb_reg(dm, R_0x5240, MASKDWORD); + mp->rfe_sel_d_0 = odm_get_bb_reg(dm, R_0x5340, MASKDWORD); + mp->rfe_sel_a_1 = odm_get_bb_reg(dm, R_0x1844, MASKDWORD); + mp->rfe_sel_b_1 = odm_get_bb_reg(dm, R_0x4144, MASKDWORD); + mp->rfe_sel_c_1 = odm_get_bb_reg(dm, R_0x5244, MASKDWORD); + mp->rfe_sel_d_1 = odm_get_bb_reg(dm, R_0x5344, MASKDWORD); +#endif + /* Disable CCK and OFDM */ + odm_set_bb_reg(dm, R_0x1c3c, 0x3, 0x0); + for (i = start; i <= end; i++) { + /* @Tx mode: RF0x00[19:16]=4'b0010 */ + odm_set_rf_reg(dm, i, RF_0x0, 0xF0000, 0x2); + /* @Lowest RF gain index: RF_0x0[4:0] = 0*/ + odm_set_rf_reg(dm, i, RF_0x0, 0x1F, 0x0); + /* @RF LO enabled */ + odm_set_rf_reg(dm, i, RF_0x58, BIT(1), 0x1); + } + #if (RTL8814B_SUPPORT) + if (dm->support_ic_type & ODM_RTL8814B) { + /* @Tx mode: RF0x00[19:16]=4'b0010 */ + config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x0, + 0xF0000, 0x2); + /* @Lowest RF gain index: RF_0x0[4:0] = 0*/ + config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x0, + 0x1F, 0x0); + /* @RF LO enabled */ + config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x58, + BIT(1), 0x1); + } + #endif + } else { + /* Eable CCK and OFDM */ + odm_set_bb_reg(dm, R_0x1c3c, 0x3, 0x3); + if (!(dm->support_ic_type & ODM_RTL8814B)) { + for (i = start; i <= end; i++) { + odm_set_rf_reg(dm, i, RF_0x00, 0xfffff, + mp->rf_reg0); + /* RF LO disabled */ + odm_set_rf_reg(dm, i, RF_0x58, BIT(1), 0x0); + } + } +#if 0 + odm_set_bb_reg(dm, R_0x1840, MASKDWORD, mp->rfe_sel_a_0); + odm_set_bb_reg(dm, R_0x4140, MASKDWORD, mp->rfe_sel_b_0); + odm_set_bb_reg(dm, R_0x5240, MASKDWORD, mp->rfe_sel_c_0); + odm_set_bb_reg(dm, R_0x5340, MASKDWORD, mp->rfe_sel_d_0); + odm_set_bb_reg(dm, R_0x1844, MASKDWORD, mp->rfe_sel_a_1); + odm_set_bb_reg(dm, R_0x4144, MASKDWORD, mp->rfe_sel_b_1); + odm_set_bb_reg(dm, R_0x5244, MASKDWORD, mp->rfe_sel_c_1); + odm_set_bb_reg(dm, R_0x5344, MASKDWORD, mp->rfe_sel_d_1); +#endif + } +} + +void phydm_mp_set_carrier_supp_jgr3(void *dm_void, boolean is_carrier_supp, + u32 rate_index) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_mp *mp = &dm->dm_mp_table; + + if (is_carrier_supp) { + if (phydm_is_cck_rate(dm, (u8)rate_index)) { + /* @if CCK block on? */ + if (!odm_get_bb_reg(dm, R_0x1c3c, BIT(1))) + odm_set_bb_reg(dm, R_0x1c3c, BIT(1), 1); + + /* @Turn Off All Test mode */ + odm_set_bb_reg(dm, R_0x1ca4, 0x7, 0x0); + + /* @transmit mode */ + odm_set_bb_reg(dm, R_0x1a00, 0x3, 0x2); + /* @turn off scramble setting */ + odm_set_bb_reg(dm, R_0x1a00, 0x8, 0x0); + /* @Set CCK Tx Test Rate, set FTxRate to 1Mbps */ + odm_set_bb_reg(dm, R_0x1a00, 0x3000, 0x0); + } + } else { /* @Stop Carrier Suppression. */ + if (phydm_is_cck_rate(dm, (u8)rate_index)) { + /* @normal mode */ + odm_set_bb_reg(dm, R_0x1a00, 0x3, 0x0); + /* @turn on scramble setting */ + odm_set_bb_reg(dm, R_0x1a00, 0x8, 0x1); + /* @BB Reset */ + odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x0); + odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x1); + } + } +} +#endif + +void phydm_mp_set_crystal_cap(void *dm_void, u8 crystal_cap) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + phydm_set_crystal_cap(dm, crystal_cap); +} + +void phydm_mp_set_single_tone(void *dm_void, boolean is_single_tone, u8 path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + phydm_mp_set_single_tone_jgr3(dm, is_single_tone, path); +} + +void phydm_mp_set_carrier_supp(void *dm_void, boolean is_carrier_supp, + u32 rate_index) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + phydm_mp_set_carrier_supp_jgr3(dm, is_carrier_supp, rate_index); +} + +void phydm_mp_set_single_carrier(void *dm_void, boolean is_single_carrier) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_mp *mp = &dm->dm_mp_table; + + if (is_single_carrier) { + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + /* @1. if OFDM block on? */ + if (!odm_get_bb_reg(dm, R_0x1c3c, BIT(0))) + odm_set_bb_reg(dm, R_0x1c3c, BIT(0), 1); + + /* @2. set CCK test mode off, set to CCK normal mode */ + odm_set_bb_reg(dm, R_0x1a00, 0x3, 0); + + /* @3. turn on scramble setting */ + odm_set_bb_reg(dm, R_0x1a00, 0x8, 1); + + /* @4. Turn On single carrier. */ + odm_set_bb_reg(dm, R_0x1ca4, 0x7, OFDM_SINGLE_CARRIER); + } else { + /* @1. if OFDM block on? */ + if (!odm_get_bb_reg(dm, R_0x800, 0x2000000)) + odm_set_bb_reg(dm, R_0x800, 0x2000000, 1); + + /* @2. set CCK test mode off, set to CCK normal mode */ + odm_set_bb_reg(dm, R_0xa00, 0x3, 0); + + /* @3. turn on scramble setting */ + odm_set_bb_reg(dm, R_0xa00, 0x8, 1); + + /* @4. Turn On single carrier. */ + if (dm->support_ic_type & ODM_IC_11AC_SERIES) + odm_set_bb_reg(dm, R_0x914, 0x70000, + OFDM_SINGLE_CARRIER); + else if (dm->support_ic_type & ODM_IC_11N_SERIES) + odm_set_bb_reg(dm, R_0xd00, 0x70000000, + OFDM_SINGLE_CARRIER); + } + } else { /* @Stop Single Carrier. */ + /* @Turn off all test modes. */ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + odm_set_bb_reg(dm, R_0x1ca4, 0x7, OFDM_OFF); + else if (dm->support_ic_type & ODM_IC_11AC_SERIES) + odm_set_bb_reg(dm, R_0x914, 0x70000, OFDM_OFF); + else if (dm->support_ic_type & ODM_IC_11N_SERIES) + odm_set_bb_reg(dm, R_0xd00, 0x70000000, OFDM_OFF); + /* @Delay 10 ms */ + ODM_delay_ms(10); + + /* @BB Reset */ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x0); + odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x1); + } else { + odm_set_bb_reg(dm, R_0x100, 0x100, 0x0); + odm_set_bb_reg(dm, R_0x100, 0x100, 0x1); + } + } +} +void phydm_mp_reset_rx_counters_phy(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + phydm_reset_bb_hw_cnt(dm); +} + +void phydm_mp_get_tx_ok(void *dm_void, u32 rate_index) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_mp *mp = &dm->dm_mp_table; + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + if (phydm_is_cck_rate(dm, (u8)rate_index)) + mp->tx_phy_ok_cnt = odm_get_bb_reg(dm, R_0x2de4, + 0xffff); + else + mp->tx_phy_ok_cnt = odm_get_bb_reg(dm, R_0x2de0, + 0xffff); + } else { + if (phydm_is_cck_rate(dm, (u8)rate_index)) + mp->tx_phy_ok_cnt = odm_get_bb_reg(dm, R_0xf50, + 0xffff); + else + mp->tx_phy_ok_cnt = odm_get_bb_reg(dm, R_0xf50, + 0xffff0000); + } +} + +void phydm_mp_get_rx_ok(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_mp *mp = &dm->dm_mp_table; + + u32 cck_ok = 0, ofdm_ok = 0, ht_ok = 0, vht_ok = 0; + u32 cck_err = 0, ofdm_err = 0, ht_err = 0, vht_err = 0; + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + cck_ok = odm_get_bb_reg(dm, R_0x2c04, 0xffff); + ofdm_ok = odm_get_bb_reg(dm, R_0x2c14, 0xffff); + ht_ok = odm_get_bb_reg(dm, R_0x2c10, 0xffff); + vht_ok = odm_get_bb_reg(dm, R_0x2c0c, 0xffff); + + cck_err = odm_get_bb_reg(dm, R_0x2c04, 0xffff0000); + ofdm_err = odm_get_bb_reg(dm, R_0x2c14, 0xffff0000); + ht_err = odm_get_bb_reg(dm, R_0x2c10, 0xffff0000); + vht_err = odm_get_bb_reg(dm, R_0x2c0c, 0xffff0000); + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + cck_ok = odm_get_bb_reg(dm, R_0xf04, 0x3FFF); + ofdm_ok = odm_get_bb_reg(dm, R_0xf14, 0x3FFF); + ht_ok = odm_get_bb_reg(dm, R_0xf10, 0x3FFF); + vht_ok = odm_get_bb_reg(dm, R_0xf0c, 0x3FFF); + + cck_err = odm_get_bb_reg(dm, R_0xf04, 0x3FFF0000); + ofdm_err = odm_get_bb_reg(dm, R_0xf14, 0x3FFF0000); + ht_err = odm_get_bb_reg(dm, R_0xf10, 0x3FFF0000); + vht_err = odm_get_bb_reg(dm, R_0xf0c, 0x3FFF0000); + } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { + cck_ok = odm_get_bb_reg(dm, R_0xf88, MASKDWORD); + ofdm_ok = odm_get_bb_reg(dm, R_0xf94, 0xffff); + ht_ok = odm_get_bb_reg(dm, R_0xf90, 0xffff); + + cck_err = odm_get_bb_reg(dm, R_0xf84, MASKDWORD); + ofdm_err = odm_get_bb_reg(dm, R_0xf94, 0xffff0000); + ht_err = odm_get_bb_reg(dm, R_0xf90, 0xffff0000); + } + + mp->rx_phy_ok_cnt = cck_ok + ofdm_ok + ht_ok + vht_ok; + mp->rx_phy_crc_err_cnt = cck_err + ofdm_err + ht_err + vht_err; + mp->io_value = (u32)mp->rx_phy_ok_cnt; +} +#endif diff --git a/hal/phydm/phydm_mp.h b/hal/phydm/phydm_mp.h new file mode 100644 index 0000000..e9e40ae --- /dev/null +++ b/hal/phydm/phydm_mp.h @@ -0,0 +1,86 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +#ifndef __PHYDM_MP_H__ +#define __PHYDM_MP_H__ + +#define MP_VERSION "1.3" + +/* @1 ============================================================ + * 1 Definition + * 1 ============================================================ + */ +/* @1 ============================================================ + * 1 structure + * 1 ============================================================ + */ +struct phydm_mp { + /* @Rx OK count, statistics used in Mass Production Test.*/ + u64 tx_phy_ok_cnt; + u64 rx_phy_ok_cnt; + /* @Rx CRC32 error count, statistics used in Mass Production Test.*/ + u64 rx_phy_crc_err_cnt; + /* @The Value of IO operation is depend of MptActType.*/ + u32 io_value; + u32 rf_reg0; + /* @u32 rfe_sel_a_0;*/ + /* @u32 rfe_sel_b_0;*/ + /* @u32 rfe_sel_c_0;*/ + /* @u32 rfe_sel_d_0;*/ + /* @u32 rfe_sel_a_1;*/ + /* @u32 rfe_sel_b_1;*/ + /* @u32 rfe_sel_c_1;*/ + /* @u32 rfe_sel_d_1;*/ +}; + +/* @1 ============================================================ + * 1 enumeration + * 1 ============================================================ + */ +enum TX_MODE_OFDM { + OFDM_OFF = 0, + OFDM_CONT_TX = 1, + OFDM_SINGLE_CARRIER = 2, + OFDM_SINGLE_TONE = 4, +}; +/* @1 ============================================================ + * 1 function prototype + * 1 ============================================================ + */ +void phydm_mp_set_crystal_cap(void *dm_void, u8 crystal_cap); + +void phydm_mp_set_single_tone(void *dm_void, boolean is_single_tone, u8 path); + +void phydm_mp_set_carrier_supp(void *dm_void, boolean is_carrier_supp, + u32 rate_index); + +void phydm_mp_set_single_carrier(void *dm_void, boolean is_single_carrier); + +void phydm_mp_reset_rx_counters_phy(void *dm_void); + +void phydm_mp_get_tx_ok(void *dm_void, u32 rate_index); + +void phydm_mp_get_rx_ok(void *dm_void); +#endif diff --git a/hal/phydm/phydm_noisemonitor.c b/hal/phydm/phydm_noisemonitor.c index 1034167..aeeb255 100644 --- a/hal/phydm/phydm_noisemonitor.c +++ b/hal/phydm/phydm_noisemonitor.c @@ -23,13 +23,13 @@ * *****************************************************************************/ -/* ************************************************************ +/************************************************************* * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" -/* ************************************************* +/************************************************** * This function is for inband noise test utility only * To obtain the inband noise level(dbm), do the following. * 1. disable DIG and Power Saving @@ -37,45 +37,47 @@ * 3. Stop updating idle time pwer report (for driver read) * - 0x80c[25] * - * ************************************************* */ - -#define VALID_CNT 5 + *************************************************/ void phydm_set_noise_data_sum(struct noise_level *noise_data, u8 max_rf_path) { - u8 rf_path; + u8 i = 0; - for (rf_path = RF_PATH_A; rf_path < max_rf_path; rf_path++) { - if (noise_data->valid_cnt[rf_path]) - noise_data->sum[rf_path] /= noise_data->valid_cnt[rf_path]; + for (i = RF_PATH_A; i < max_rf_path; i++) { + if (noise_data->valid_cnt[i]) + noise_data->sum[i] /= noise_data->valid_cnt[i]; else - noise_data->sum[rf_path] = 0; + noise_data->sum[i] = 0; } } -s16 odm_inband_noise_monitor_n_series(struct dm_struct *dm, u8 is_pause_dig, u8 igi_value, u32 max_time) +#if (ODM_IC_11N_SERIES_SUPPORT) +s16 odm_inband_noise_monitor_n(struct dm_struct *dm, u8 is_pause_dig, u8 igi, + u32 max_time) { - u32 tmp4b; - u8 max_rf_path = 0, rf_path; - u8 reg_c50, reg_c58, valid_done = 0; - struct noise_level noise_data; - u64 start = 0, func_start = 0, func_end = 0; + u32 tmp4b; + u8 max_rf_path = 0, i = 0; + u8 reg_c50, reg_c58, valid_done = 0; + struct noise_level noise_data; + u64 start = 0, func_start = 0, func_end = 0; + s8 val_s8 = 0; func_start = odm_get_current_time(dm); dm->noise_level.noise_all = 0; - if ((dm->rf_type == RF_1T2R) || (dm->rf_type == RF_2T2R)) + if (dm->rf_type == RF_1T2R || dm->rf_type == RF_2T2R) max_rf_path = 2; else max_rf_path = 1; - PHYDM_DBG(dm, DBG_ENV_MNTR, "odm_DebugControlInbandNoise_Nseries() ==>\n"); + PHYDM_DBG(dm, DBG_ENV_MNTR, + "odm_DebugControlInbandNoise_Nseries() ==>\n"); odm_memory_set(dm, &noise_data, 0, sizeof(struct noise_level)); /* step 1. Disable DIG && Set initial gain. */ if (is_pause_dig) - odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi_value); + odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi); /* step 3. Get noise power level */ start = odm_get_current_time(dm); @@ -84,7 +86,7 @@ s16 odm_inband_noise_monitor_n_series(struct dm_struct *dm, u8 is_pause_dig, u8 odm_set_bb_reg(dm, REG_FPGA0_TX_GAIN_STAGE, BIT(25), 1); /* Read Noise Floor Report */ - tmp4b = odm_get_bb_reg(dm, 0x8f8, MASKDWORD); + tmp4b = odm_get_bb_reg(dm, R_0x8f8, MASKDWORD); /* update idle time pwer report per 5us */ odm_set_bb_reg(dm, REG_FPGA0_TX_GAIN_STAGE, BIT(25), 0); @@ -92,172 +94,179 @@ s16 odm_inband_noise_monitor_n_series(struct dm_struct *dm, u8 is_pause_dig, u8 ODM_delay_us(5); noise_data.value[RF_PATH_A] = (u8)(tmp4b & 0xff); - noise_data.value[RF_PATH_B] = (u8)((tmp4b & 0xff00) >> 8); + noise_data.value[RF_PATH_B] = (u8)((tmp4b & 0xff00) >> 8); - for (rf_path = RF_PATH_A; rf_path < max_rf_path; rf_path++) { - noise_data.sval[rf_path] = (s8)noise_data.value[rf_path]; - noise_data.sval[rf_path] /= 2; + for (i = RF_PATH_A; i < max_rf_path; i++) { + noise_data.sval[i] = (s8)noise_data.value[i]; + noise_data.sval[i] /= 2; } - for (rf_path = RF_PATH_A; rf_path < max_rf_path; rf_path++) { - if (noise_data.valid_cnt[rf_path] >= VALID_CNT) + for (i = RF_PATH_A; i < max_rf_path; i++) { + if (noise_data.valid_cnt[i] >= VALID_CNT) continue; - noise_data.valid_cnt[rf_path]++; - noise_data.sum[rf_path] += noise_data.sval[rf_path]; - PHYDM_DBG(dm, DBG_ENV_MNTR, "rf_path:%d Valid sval = %d\n", rf_path, noise_data.sval[rf_path]); - PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d,\n", noise_data.sum[rf_path]); - if (noise_data.valid_cnt[rf_path] == VALID_CNT) + noise_data.valid_cnt[i]++; + noise_data.sum[i] += noise_data.sval[i]; + PHYDM_DBG(dm, DBG_ENV_MNTR, + "rf_path:%d Valid sval=%d\n", i, + noise_data.sval[i]); + PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d,\n", + noise_data.sum[i]); + if (noise_data.valid_cnt[i] == VALID_CNT) valid_done++; } - if ((valid_done == max_rf_path) || (odm_get_progressing_time(dm, start) > max_time)) { + if (valid_done == max_rf_path || + (odm_get_progressing_time(dm, start) > max_time)) { phydm_set_noise_data_sum(&noise_data, max_rf_path); break; } } reg_c50 = (u8)odm_get_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, MASKBYTE0); reg_c50 &= ~BIT(7); - dm->noise_level.noise[RF_PATH_A] = (s8)(-110 + reg_c50 + noise_data.sum[RF_PATH_A]); + val_s8 = (s8)(-110 + reg_c50 + noise_data.sum[RF_PATH_A]); + dm->noise_level.noise[RF_PATH_A] = val_s8; dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_A]; if (max_rf_path == 2) { - reg_c58 = (u8)odm_get_bb_reg(dm, REG_OFDM_0_XB_AGC_CORE1, MASKBYTE0); + reg_c58 = (u8)odm_get_bb_reg(dm, R_0xc58, MASKBYTE0); reg_c58 &= ~BIT(7); - dm->noise_level.noise[RF_PATH_B] = (s8)(-110 + reg_c58 + noise_data.sum[RF_PATH_B]); + val_s8 = (s8)(-110 + reg_c58 + noise_data.sum[RF_PATH_B]); + dm->noise_level.noise[RF_PATH_B] = val_s8; dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_B]; } dm->noise_level.noise_all /= max_rf_path; - PHYDM_DBG(dm, DBG_ENV_MNTR, "noise_a = %d, noise_b = %d, noise_all = %d\n", - dm->noise_level.noise[RF_PATH_A], dm->noise_level.noise[RF_PATH_B], - dm->noise_level.noise_all); + PHYDM_DBG(dm, DBG_ENV_MNTR, + "noise_a = %d, noise_b = %d, noise_all = %d\n", + dm->noise_level.noise[RF_PATH_A], + dm->noise_level.noise[RF_PATH_B], dm->noise_level.noise_all); /* step 4. Recover the Dig */ if (is_pause_dig) - odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi_value); + odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi); func_end = odm_get_progressing_time(dm, func_start); PHYDM_DBG(dm, DBG_ENV_MNTR, "end\n"); return dm->noise_level.noise_all; - } +#endif - -s16 -phydm_idle_noise_measurement_ac( - struct dm_struct *dm, - u8 is_pause_dig, - u8 igi_value, - u32 max_time - ) +#if (ODM_IC_11AC_SERIES_SUPPORT) +s16 phydm_idle_noise_measure_ac(struct dm_struct *dm, u8 pause_dig, + u8 igi, u32 max_time) { - u32 tmp4b; - u8 max_rf_path = 0, rf_path; - u8 reg_c50, reg_e50, valid_done = 0; - u64 start = 0, func_start = 0, func_end = 0; - struct noise_level noise_data; + u32 tmp4b; + u8 max_rf_path = 0, i = 0; + u8 reg_c50, reg_e50, valid_done = 0; + u64 start = 0, func_start = 0, func_end = 0; + struct noise_level noise_data; + s8 val_s8 = 0; func_start = odm_get_current_time(dm); dm->noise_level.noise_all = 0; - if ((dm->rf_type == RF_1T2R) || (dm->rf_type == RF_2T2R)) + if (dm->rf_type == RF_1T2R || dm->rf_type == RF_2T2R) max_rf_path = 2; else max_rf_path = 1; - PHYDM_DBG(dm, DBG_ENV_MNTR, "phydm_idle_noise_measurement_ac==>\n"); + PHYDM_DBG(dm, DBG_ENV_MNTR, "%s==>\n", __func__); odm_memory_set(dm, &noise_data, 0, sizeof(struct noise_level)); /*Step 1. Disable DIG && Set initial gain.*/ - if (is_pause_dig) - odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi_value); + if (pause_dig) + odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi); /*Step 2. Get noise power level*/ start = odm_get_current_time(dm); while (1) { /*Stop updating idle time pwer report (for driver read)*/ - odm_set_bb_reg(dm, 0x9e4, BIT(30), 0x1); + odm_set_bb_reg(dm, R_0x9e4, BIT(30), 0x1); /*Read Noise Floor Report*/ - tmp4b = odm_get_bb_reg(dm, 0xff0, MASKDWORD); + tmp4b = odm_get_bb_reg(dm, R_0xff0, MASKDWORD); /*update idle time pwer report per 5us*/ - odm_set_bb_reg(dm, 0x9e4, BIT(30), 0x0); + odm_set_bb_reg(dm, R_0x9e4, BIT(30), 0x0); ODM_delay_us(5); noise_data.value[RF_PATH_A] = (u8)(tmp4b & 0xff); noise_data.value[RF_PATH_B] = (u8)((tmp4b & 0xff00) >> 8); - for (rf_path = RF_PATH_A; rf_path < max_rf_path; rf_path++) { - noise_data.sval[rf_path] = (s8)noise_data.value[rf_path]; - noise_data.sval[rf_path] = noise_data.sval[rf_path] >> 1; + for (i = RF_PATH_A; i < max_rf_path; i++) { + noise_data.sval[i] = (s8)noise_data.value[i]; + noise_data.sval[i] = noise_data.sval[i] >> 1; } - for (rf_path = RF_PATH_A; rf_path < max_rf_path; rf_path++) { - if (noise_data.valid_cnt[rf_path] >= VALID_CNT) + for (i = RF_PATH_A; i < max_rf_path; i++) { + if (noise_data.valid_cnt[i] >= VALID_CNT) continue; - noise_data.valid_cnt[rf_path]++; - noise_data.sum[rf_path] += noise_data.sval[rf_path]; - PHYDM_DBG(dm, DBG_ENV_MNTR, "Path:%d Valid sval = %d\n", rf_path, noise_data.sval[rf_path]); - PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d\n", noise_data.sum[rf_path]); - if (noise_data.valid_cnt[rf_path] == VALID_CNT) + noise_data.valid_cnt[i]++; + noise_data.sum[i] += noise_data.sval[i]; + PHYDM_DBG(dm, DBG_ENV_MNTR, "Path:%d Valid sval = %d\n", + i, noise_data.sval[i]); + PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d\n", + noise_data.sum[i]); + if (noise_data.valid_cnt[i] == VALID_CNT) valid_done++; } - if ((valid_done == max_rf_path) || (odm_get_progressing_time(dm, start) > max_time)) { + if (valid_done == max_rf_path || + (odm_get_progressing_time(dm, start) > max_time)) { phydm_set_noise_data_sum(&noise_data, max_rf_path); break; } } - reg_c50 = (u8)odm_get_bb_reg(dm, 0xc50, MASKBYTE0); + reg_c50 = (u8)odm_get_bb_reg(dm, R_0xc50, MASKBYTE0); reg_c50 &= ~BIT(7); - dm->noise_level.noise[RF_PATH_A] = (s8)(-110 + reg_c50 + noise_data.sum[RF_PATH_A]); + val_s8 = (s8)(-110 + reg_c50 + noise_data.sum[RF_PATH_A]); + dm->noise_level.noise[RF_PATH_A] = val_s8; dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_A]; if (max_rf_path == 2) { - reg_e50 = (u8)odm_get_bb_reg(dm, 0xe50, MASKBYTE0); + reg_e50 = (u8)odm_get_bb_reg(dm, R_0xe50, MASKBYTE0); reg_e50 &= ~BIT(7); - dm->noise_level.noise[RF_PATH_B] = (s8)(-110 + reg_e50 + noise_data.sum[RF_PATH_B]); + val_s8 = (s8)(-110 + reg_e50 + noise_data.sum[RF_PATH_B]); + dm->noise_level.noise[RF_PATH_B] = val_s8; dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_B]; } dm->noise_level.noise_all /= max_rf_path; - PHYDM_DBG(dm, DBG_ENV_MNTR, "noise_a = %d, noise_b = %d, noise_all = %d\n", - dm->noise_level.noise[RF_PATH_A], dm->noise_level.noise[RF_PATH_B], - dm->noise_level.noise_all); + PHYDM_DBG(dm, DBG_ENV_MNTR, + "noise_a = %d, noise_b = %d, noise_all = %d\n", + dm->noise_level.noise[RF_PATH_A], + dm->noise_level.noise[RF_PATH_B], dm->noise_level.noise_all); /*Step 3. Recover the Dig*/ - if (is_pause_dig) - odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi_value); + if (pause_dig) + odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi); func_end = odm_get_progressing_time(dm, func_start); PHYDM_DBG(dm, DBG_ENV_MNTR, "end\n"); return dm->noise_level.noise_all; - } - -s16 -odm_inband_noise_monitor_ac_series( - struct dm_struct *dm, - u8 is_pause_dig, - u8 igi_value, - u32 max_time - ) +s16 odm_inband_noise_monitor_ac(struct dm_struct *dm, u8 pause_dig, u8 igi, + u32 max_time) { - s32 rxi_buf_anta, rxq_buf_anta; /*rxi_buf_antb, rxq_buf_antb;*/ - s32 value32, pwdb_A = 0, sval, noise, sum = 0; - boolean pd_flag; - u8 valid_cnt = 0; - u64 start = 0, func_start = 0, func_end = 0; + s32 rxi_buf_anta, rxq_buf_anta; /*rxi_buf_antb, rxq_buf_antb;*/ + s32 value32, pwdb_A = 0, sval, noise, sum = 0; + boolean pd_flag; + u8 valid_cnt = 0; + u64 start = 0, func_start = 0, func_end = 0; + s32 val_s32 = 0; + s16 rpt = 0; + u8 val_u8 = 0; - if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) - return phydm_idle_noise_measurement_ac(dm, is_pause_dig, igi_value, max_time); + if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) { + rpt = phydm_idle_noise_measure_ac(dm, pause_dig, igi, max_time); + return rpt; + } if (!(dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A))) return 0; @@ -265,11 +274,11 @@ odm_inband_noise_monitor_ac_series( func_start = odm_get_current_time(dm); dm->noise_level.noise_all = 0; - PHYDM_DBG(dm, DBG_ENV_MNTR, "odm_inband_noise_monitor_ac_series() ==>\n"); + PHYDM_DBG(dm, DBG_ENV_MNTR, "%s ==>\n", __func__); /* step 1. Disable DIG && Set initial gain. */ - if (is_pause_dig) - odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi_value); + if (pause_dig) + odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi); /* step 3. Get noise power level */ start = odm_get_current_time(dm); @@ -279,56 +288,72 @@ odm_inband_noise_monitor_ac_series( /*Set IGI=0x1C */ odm_write_dig(dm, 0x1C); /*stop CK320&CK88 */ - odm_set_bb_reg(dm, 0x8B4, BIT(6), 1); + odm_set_bb_reg(dm, R_0x8b4, BIT(6), 1); /*Read path-A */ - odm_set_bb_reg(dm, 0x8FC, MASKDWORD, 0x200); /*set debug port*/ - value32 = odm_get_bb_reg(dm, 0xFA0, MASKDWORD); /*read debug port*/ - - rxi_buf_anta = (value32 & 0xFFC00) >> 10; /*rxi_buf_anta=RegFA0[19:10]*/ + /*set debug port*/ + odm_set_bb_reg(dm, R_0x8fc, MASKDWORD, 0x200); + /*read debug port*/ + value32 = odm_get_bb_reg(dm, R_0xfa0, MASKDWORD); + /*rxi_buf_anta=RegFA0[19:10]*/ + rxi_buf_anta = (value32 & 0xFFC00) >> 10; rxq_buf_anta = value32 & 0x3FF; /*rxq_buf_anta=RegFA0[19:10]*/ pd_flag = (boolean)((value32 & BIT(31)) >> 31); /*Not in packet detection period or Tx state */ - if ((!pd_flag) || (rxi_buf_anta != 0x200)) { + if (!pd_flag || rxi_buf_anta != 0x200) { /*sign conversion*/ rxi_buf_anta = odm_sign_conversion(rxi_buf_anta, 10); rxq_buf_anta = odm_sign_conversion(rxq_buf_anta, 10); - pwdb_A = odm_pwdb_conversion(rxi_buf_anta * rxi_buf_anta + rxq_buf_anta * rxq_buf_anta, 20, 18); /*S(10,9)*S(10,9)=S(20,18)*/ + val_s32 = rxi_buf_anta * rxi_buf_anta + + rxq_buf_anta * rxq_buf_anta; + /*S(10,9)*S(10,9)=S(20,18)*/ + pwdb_A = odm_pwdb_conversion(val_s32, 20, 18); - PHYDM_DBG(dm, DBG_ENV_MNTR, "pwdb_A= %d dB, rxi_buf_anta= 0x%x, rxq_buf_anta= 0x%x\n", pwdb_A, rxi_buf_anta & 0x3FF, rxq_buf_anta & 0x3FF); + PHYDM_DBG(dm, DBG_ENV_MNTR, + "pwdb_A= %d dB, rxi_buf_anta= 0x%x, rxq_buf_anta= 0x%x\n", + pwdb_A, rxi_buf_anta & 0x3FF, + rxq_buf_anta & 0x3FF); } /*Start CK320&CK88*/ - odm_set_bb_reg(dm, 0x8B4, BIT(6), 0); - /*BB Reset*/ - odm_write_1byte(dm, 0x02, odm_read_1byte(dm, 0x02) & (~BIT(0))); - odm_write_1byte(dm, 0x02, odm_read_1byte(dm, 0x02) | BIT(0)); + odm_set_bb_reg(dm, R_0x8b4, BIT(6), 0); + /*@BB Reset*/ + val_u8 = odm_read_1byte(dm, 0x02) & (~BIT(0)); + odm_write_1byte(dm, 0x02, val_u8); + val_u8 = odm_read_1byte(dm, 0x02) | BIT(0); + odm_write_1byte(dm, 0x02, val_u8); /*PMAC Reset*/ - odm_write_1byte(dm, 0xB03, odm_read_1byte(dm, 0xB03) & (~BIT(0))); - odm_write_1byte(dm, 0xB03, odm_read_1byte(dm, 0xB03) | BIT(0)); - /*CCK Reset*/ + val_u8 = odm_read_1byte(dm, 0xB03) & (~BIT(0)); + odm_write_1byte(dm, 0xB03, val_u8); + val_u8 = odm_read_1byte(dm, 0xB03) | BIT(0); + odm_write_1byte(dm, 0xB03, val_u8); + /*@CCK Reset*/ if (odm_read_1byte(dm, 0x80B) & BIT(4)) { - odm_write_1byte(dm, 0x80B, odm_read_1byte(dm, 0x80B) & (~BIT(4))); - odm_write_1byte(dm, 0x80B, odm_read_1byte(dm, 0x80B) | BIT(4)); + val_u8 = odm_read_1byte(dm, 0x80B) & (~BIT(4)); + odm_write_1byte(dm, 0x80B, val_u8); + val_u8 = odm_read_1byte(dm, 0x80B) | BIT(4); + odm_write_1byte(dm, 0x80B, val_u8); } sval = pwdb_A; - if ((sval < 0 && sval >= -27) && (valid_cnt < VALID_CNT)){ + if ((sval < 0 && sval >= -27) && valid_cnt < VALID_CNT) { valid_cnt++; sum += sval; PHYDM_DBG(dm, DBG_ENV_MNTR, "Valid sval = %d\n", sval); PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d,\n", sum); - if ((valid_cnt >= VALID_CNT) || (odm_get_progressing_time(dm, start) > max_time)) { + if (valid_cnt >= VALID_CNT || + (odm_get_progressing_time(dm, start) > max_time)) { sum /= VALID_CNT; - PHYDM_DBG(dm, DBG_ENV_MNTR, "After divided, sum = %d\n", sum); + PHYDM_DBG(dm, DBG_ENV_MNTR, + "After divided, sum = %d\n", sum); break; } } } - /*ADC backoff is 12dB,*/ + /*@ADC backoff is 12dB,*/ /*Ptarget=0x1C-110=-82dBm*/ noise = sum + 12 + 0x1C - 110; @@ -338,70 +363,72 @@ odm_inband_noise_monitor_ac_series( dm->noise_level.noise_all = (s16)noise; /* step 4. Recover the Dig*/ - if (is_pause_dig) - odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi_value); + if (pause_dig) + odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi); func_end = odm_get_progressing_time(dm, func_start); - PHYDM_DBG(dm, DBG_ENV_MNTR, "odm_inband_noise_monitor_ac_series() <==\n"); + PHYDM_DBG(dm, DBG_ENV_MNTR, "%s <==\n", __func__); return dm->noise_level.noise_all; } +#endif - - -s16 -odm_inband_noise_monitor( - void *dm_void, - u8 is_pause_dig, - u8 igi_value, - u32 max_time - ) +s16 odm_inband_noise_monitor(void *dm_void, u8 pause_dig, u8 igi, + u32 max_time) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + s16 val = 0; - igi_value = 0x32; /*since HW ability is about +15~-35, we fix IGI = -60 for maximum coverage*/ + igi = 0x32; + /* since HW ability is about +15~-35, + * we fix IGI = -60 for maximum coverage + */ + #if (ODM_IC_11AC_SERIES_SUPPORT) if (dm->support_ic_type & ODM_IC_11AC_SERIES) - return odm_inband_noise_monitor_ac_series(dm, is_pause_dig, igi_value, max_time); - else - return odm_inband_noise_monitor_n_series(dm, is_pause_dig, igi_value, max_time); + val = odm_inband_noise_monitor_ac(dm, pause_dig, igi, max_time); + #endif + + #if (ODM_IC_11N_SERIES_SUPPORT) + if (dm->support_ic_type & ODM_IC_11N_SERIES) + val = odm_inband_noise_monitor_n(dm, pause_dig, igi, max_time); + #endif + + return val; } -void -phydm_noisy_detection( - void *dm_void -) +void phydm_noisy_detection(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 total_fa_cnt, total_cca_cnt; - u32 score = 0, i, score_smooth; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 total_fa_cnt, total_cca_cnt; + u32 score = 0, i, score_smooth; total_cca_cnt = dm->false_alm_cnt.cnt_cca_all; - total_fa_cnt = dm->false_alm_cnt.cnt_all; + total_fa_cnt = dm->false_alm_cnt.cnt_all; #if 0 - if (total_fa_cnt * 16 >= total_cca_cnt * 14) /* 87.5 */ + if (total_fa_cnt * 16 >= total_cca_cnt * 14) /* @87.5 */ ; - else if (total_fa_cnt * 16 >= total_cca_cnt * 12) /* 75 */ + else if (total_fa_cnt * 16 >= total_cca_cnt * 12) /* @75 */ ; - else if (total_fa_cnt * 16 >= total_cca_cnt * 10) /* 56.25 */ + else if (total_fa_cnt * 16 >= total_cca_cnt * 10) /* @56.25 */ ; - else if (total_fa_cnt * 16 >= total_cca_cnt * 8) /* 50 */ + else if (total_fa_cnt * 16 >= total_cca_cnt * 8) /* @50 */ ; - else if (total_fa_cnt * 16 >= total_cca_cnt * 7) /* 43.75 */ + else if (total_fa_cnt * 16 >= total_cca_cnt * 7) /* @43.75 */ ; - else if (total_fa_cnt * 16 >= total_cca_cnt * 6) /* 37.5 */ + else if (total_fa_cnt * 16 >= total_cca_cnt * 6) /* @37.5 */ ; - else if (total_fa_cnt * 16 >= total_cca_cnt * 5) /* 31.25% */ + else if (total_fa_cnt * 16 >= total_cca_cnt * 5) /* @31.25% */ ; - else if (total_fa_cnt * 16 >= total_cca_cnt * 4) /* 25% */ + else if (total_fa_cnt * 16 >= total_cca_cnt * 4) /* @25% */ ; - else if (total_fa_cnt * 16 >= total_cca_cnt * 3) /* 18.75% */ + else if (total_fa_cnt * 16 >= total_cca_cnt * 3) /* @18.75% */ ; - else if (total_fa_cnt * 16 >= total_cca_cnt * 2) /* 12.5% */ + else if (total_fa_cnt * 16 >= total_cca_cnt * 2) /* @12.5% */ ; - else if (total_fa_cnt * 16 >= total_cca_cnt * 1) /* 6.25% */ + else if (total_fa_cnt * 16 >= total_cca_cnt * 1) /* @6.25% */ ; #endif for (i = 0; i <= 16; i++) { @@ -412,16 +439,19 @@ phydm_noisy_detection( } /* noisy_decision_smooth = noisy_decision_smooth>>1 + (score<<3)>>1; */ - dm->noisy_decision_smooth = (dm->noisy_decision_smooth >> 1) + (score << 2); + dm->noisy_decision_smooth = (dm->noisy_decision_smooth >> 1) + + (score << 2); /* Round the noisy_decision_smooth: +"3" comes from (2^3)/2-1 */ - score_smooth = (total_cca_cnt >= 300) ? ((dm->noisy_decision_smooth + 3) >> 3) : 0; + if (total_cca_cnt >= 300) + score_smooth = (dm->noisy_decision_smooth + 3) >> 3; + else + score_smooth = 0; dm->noisy_decision = (score_smooth >= 3) ? 1 : 0; - + PHYDM_DBG(dm, DBG_ENV_MNTR, - "[NoisyDetection] CCA_cnt=%d,FA_cnt=%d, noisy_dec_smooth=%d, score=%d, score_smooth=%d, noisy_dec=%d\n", - total_cca_cnt, total_fa_cnt, dm->noisy_decision_smooth, score, score_smooth, dm->noisy_decision); - + "[NoisyDetection] CCA_cnt=%d,FA_cnt=%d, noisy_dec_smooth=%d, score=%d, score_smooth=%d, noisy_dec=%d\n", + total_cca_cnt, total_fa_cnt, dm->noisy_decision_smooth, score, + score_smooth, dm->noisy_decision); } - diff --git a/hal/phydm/phydm_noisemonitor.h b/hal/phydm/phydm_noisemonitor.h index d7101ad..507285a 100644 --- a/hal/phydm/phydm_noisemonitor.h +++ b/hal/phydm/phydm_noisemonitor.h @@ -22,34 +22,27 @@ * Larry Finger * *****************************************************************************/ -#ifndef __ODMNOISEMONITOR_H__ +#ifndef __ODMNOISEMONITOR_H__ #define __ODMNOISEMONITOR_H__ -#define ODM_MAX_CHANNEL_NUM 38/* 14+24 */ -struct noise_level { - u8 value[PHYDM_MAX_RF_PATH]; - s8 sval[PHYDM_MAX_RF_PATH]; - s32 sum[PHYDM_MAX_RF_PATH]; - u8 valid[PHYDM_MAX_RF_PATH]; - u8 valid_cnt[PHYDM_MAX_RF_PATH]; -}; +#define VALID_CNT 5 +struct noise_level { + u8 value[PHYDM_MAX_RF_PATH]; + s8 sval[PHYDM_MAX_RF_PATH]; + s32 sum[PHYDM_MAX_RF_PATH]; + u8 valid[PHYDM_MAX_RF_PATH]; + u8 valid_cnt[PHYDM_MAX_RF_PATH]; +}; struct odm_noise_monitor { - s8 noise[PHYDM_MAX_RF_PATH]; - s16 noise_all; + s8 noise[PHYDM_MAX_RF_PATH]; + s16 noise_all; }; -s16 odm_inband_noise_monitor( - void *dm_void, - u8 is_pause_dig, - u8 igi_value, - u32 max_time -); +s16 odm_inband_noise_monitor(void *dm_void, u8 is_pause_dig, u8 igi_value, + u32 max_time); -void -phydm_noisy_detection( - void *dm_void -); +void phydm_noisy_detection(void *dm_void); #endif diff --git a/hal/phydm/phydm_pathdiv.c b/hal/phydm/phydm_pathdiv.c index 5550ab4..696b701 100644 --- a/hal/phydm/phydm_pathdiv.c +++ b/hal/phydm/phydm_pathdiv.c @@ -23,471 +23,469 @@ * *****************************************************************************/ -/* ************************************************************ +/************************************************************* * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" -#if (defined(CONFIG_PATH_DIVERSITY)) +#ifdef CONFIG_PATH_DIVERSITY #if RTL8814A_SUPPORT - -void -phydm_dtp_fix_tx_path( - void *dm_void, - u8 path -) +void phydm_dtp_fix_tx_path( + void *dm_void, + u8 path) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _ODM_PATH_DIVERSITY_ *dm_path_div = &dm->dm_path_div; - u8 i, num_enable_path = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + u8 i, num_enable_path = 0; - if (path == dm_path_div->pre_tx_path) + if (path == p_div->pre_tx_path) return; else - dm_path_div->pre_tx_path = path; + p_div->pre_tx_path = path; - odm_set_bb_reg(dm, 0x93c, BIT(18) | BIT(19), 3); + odm_set_bb_reg(dm, R_0x93c, BIT(18) | BIT(19), 3); for (i = 0; i < 4; i++) { if (path & BIT(i)) num_enable_path++; } - PHYDM_DBG(dm, DBG_PATH_DIV, " number of turn-on path : (( %d ))\n", num_enable_path); + PHYDM_DBG(dm, DBG_PATH_DIV, " number of turn-on path : (( %d ))\n", + num_enable_path); if (num_enable_path == 1) { - odm_set_bb_reg(dm, 0x93c, 0xf00000, path); + odm_set_bb_reg(dm, R_0x93c, 0xf00000, path); - if (path == BB_PATH_A) { /* 1-1 */ + if (path == BB_PATH_A) { /* @1-1 */ PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( A ))\n"); - odm_set_bb_reg(dm, 0x93c, BIT(25) | BIT(24), 0); - } else if (path == BB_PATH_B) { /* 1-2 */ + odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); + } else if (path == BB_PATH_B) { /* @1-2 */ PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( B ))\n"); - odm_set_bb_reg(dm, 0x93c, BIT(27) | BIT(26), 0); - } else if (path == BB_PATH_C) { /* 1-3 */ + odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 0); + } else if (path == BB_PATH_C) { /* @1-3 */ PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( C ))\n"); - odm_set_bb_reg(dm, 0x93c, BIT(29) | BIT(28), 0); + odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 0); - } else if (path == BB_PATH_D) { /* 1-4 */ + } else if (path == BB_PATH_D) { /* @1-4 */ PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( D ))\n"); - odm_set_bb_reg(dm, 0x93c, BIT(31) | BIT(30), 0); + odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 0); } - } else if (num_enable_path == 2) { - odm_set_bb_reg(dm, 0x93c, 0xf00000, path); - odm_set_bb_reg(dm, 0x940, 0xf0, path); + } else if (num_enable_path == 2) { + odm_set_bb_reg(dm, R_0x93c, 0xf00000, path); + odm_set_bb_reg(dm, R_0x940, 0xf0, path); - if (path == (BB_PATH_AB)) { /* 2-1 */ - PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( A B ))\n"); + if (path == (BB_PATH_AB)) { /* @2-1 */ + PHYDM_DBG(dm, DBG_PATH_DIV, + " Turn on path (( A B ))\n"); /* set for 1ss */ - odm_set_bb_reg(dm, 0x93c, BIT(25) | BIT(24), 0); - odm_set_bb_reg(dm, 0x93c, BIT(27) | BIT(26), 1); + odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); + odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 1); /* set for 2ss */ - odm_set_bb_reg(dm, 0x940, BIT(9) | BIT(8), 0); - odm_set_bb_reg(dm, 0x940, BIT(11) | BIT(10), 1); - } else if (path == BB_PATH_AC) { /* 2-2 */ - PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( A C ))\n"); + odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0); + odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 1); + } else if (path == BB_PATH_AC) { /* @2-2 */ + PHYDM_DBG(dm, DBG_PATH_DIV, + " Turn on path (( A C ))\n"); /* set for 1ss */ - odm_set_bb_reg(dm, 0x93c, BIT(25) | BIT(24), 0); - odm_set_bb_reg(dm, 0x93c, BIT(29) | BIT(28), 1); + odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); + odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 1); /* set for 2ss */ - odm_set_bb_reg(dm, 0x940, BIT(9) | BIT(8), 0); - odm_set_bb_reg(dm, 0x940, BIT(13) | BIT(12), 1); - } else if (path == BB_PATH_AD) { /* 2-3 */ - PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( A D ))\n"); + odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0); + odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 1); + } else if (path == BB_PATH_AD) { /* @2-3 */ + PHYDM_DBG(dm, DBG_PATH_DIV, + " Turn on path (( A D ))\n"); /* set for 1ss */ - odm_set_bb_reg(dm, 0x93c, BIT(25) | BIT(24), 0); - odm_set_bb_reg(dm, 0x93c, BIT(31) | BIT(30), 1); + odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); + odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 1); /* set for 2ss */ - odm_set_bb_reg(dm, 0x940, BIT(9) | BIT(8), 0); - odm_set_bb_reg(dm, 0x940, BIT(15) | BIT(14), 1); - } else if (path == BB_PATH_BC) { /* 2-4 */ - PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( B C ))\n"); + odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0); + odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 1); + } else if (path == BB_PATH_BC) { /* @2-4 */ + PHYDM_DBG(dm, DBG_PATH_DIV, + " Turn on path (( B C ))\n"); /* set for 1ss */ - odm_set_bb_reg(dm, 0x93c, BIT(27) | BIT(26), 0); - odm_set_bb_reg(dm, 0x93c, BIT(29) | BIT(28), 1); + odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 0); + odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 1); /* set for 2ss */ - odm_set_bb_reg(dm, 0x940, BIT(11) | BIT(10), 0); - odm_set_bb_reg(dm, 0x940, BIT(13) | BIT(12), 1); - } else if (path == BB_PATH_BD) { /* 2-5 */ - PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( B D ))\n"); + odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 0); + odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 1); + } else if (path == BB_PATH_BD) { /* @2-5 */ + PHYDM_DBG(dm, DBG_PATH_DIV, + " Turn on path (( B D ))\n"); /* set for 1ss */ - odm_set_bb_reg(dm, 0x93c, BIT(27) | BIT(26), 0); - odm_set_bb_reg(dm, 0x93c, BIT(31) | BIT(30), 1); + odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 0); + odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 1); /* set for 2ss */ - odm_set_bb_reg(dm, 0x940, BIT(11) | BIT(10), 0); - odm_set_bb_reg(dm, 0x940, BIT(15) | BIT(14), 1); - } else if (path == BB_PATH_CD) { /* 2-6 */ - PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( C D ))\n"); + odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 0); + odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 1); + } else if (path == BB_PATH_CD) { /* @2-6 */ + PHYDM_DBG(dm, DBG_PATH_DIV, + " Turn on path (( C D ))\n"); /* set for 1ss */ - odm_set_bb_reg(dm, 0x93c, BIT(29) | BIT(28), 0); - odm_set_bb_reg(dm, 0x93c, BIT(31) | BIT(30), 1); + odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 0); + odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 1); /* set for 2ss */ - odm_set_bb_reg(dm, 0x940, BIT(13) | BIT(12), 0); - odm_set_bb_reg(dm, 0x940, BIT(15) | BIT(14), 1); + odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 0); + odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 1); } - } else if (num_enable_path == 3) { - odm_set_bb_reg(dm, 0x93c, 0xf00000, path); - odm_set_bb_reg(dm, 0x940, 0xf0, path); - odm_set_bb_reg(dm, 0x940, 0xf0000, path); + } else if (num_enable_path == 3) { + odm_set_bb_reg(dm, R_0x93c, 0xf00000, path); + odm_set_bb_reg(dm, R_0x940, 0xf0, path); + odm_set_bb_reg(dm, R_0x940, 0xf0000, path); - if (path == BB_PATH_ABC) { /* 3-1 */ - PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( A B C))\n"); + if (path == BB_PATH_ABC) { /* @3-1 */ + PHYDM_DBG(dm, DBG_PATH_DIV, + " Turn on path (( A B C))\n"); /* set for 1ss */ - odm_set_bb_reg(dm, 0x93c, BIT(25) | BIT(24), 0); - odm_set_bb_reg(dm, 0x93c, BIT(27) | BIT(26), 1); - odm_set_bb_reg(dm, 0x93c, BIT(29) | BIT(28), 2); + odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); + odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 1); + odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 2); /* set for 2ss */ - odm_set_bb_reg(dm, 0x940, BIT(9) | BIT(8), 0); - odm_set_bb_reg(dm, 0x940, BIT(11) | BIT(10), 1); - odm_set_bb_reg(dm, 0x940, BIT(13) | BIT(12), 2); + odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0); + odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 1); + odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 2); /* set for 3ss */ - odm_set_bb_reg(dm, 0x940, BIT(21) | BIT(20), 0); - odm_set_bb_reg(dm, 0x940, BIT(23) | BIT(22), 1); - odm_set_bb_reg(dm, 0x940, BIT(25) | BIT(24), 2); - } else if (path == BB_PATH_ABD) { /* 3-2 */ - PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( A B D ))\n"); + odm_set_bb_reg(dm, R_0x940, BIT(21) | BIT(20), 0); + odm_set_bb_reg(dm, R_0x940, BIT(23) | BIT(22), 1); + odm_set_bb_reg(dm, R_0x940, BIT(25) | BIT(24), 2); + } else if (path == BB_PATH_ABD) { /* @3-2 */ + PHYDM_DBG(dm, DBG_PATH_DIV, + " Turn on path (( A B D ))\n"); /* set for 1ss */ - odm_set_bb_reg(dm, 0x93c, BIT(25) | BIT(24), 0); - odm_set_bb_reg(dm, 0x93c, BIT(27) | BIT(26), 1); - odm_set_bb_reg(dm, 0x93c, BIT(31) | BIT(30), 2); + odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); + odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 1); + odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 2); /* set for 2ss */ - odm_set_bb_reg(dm, 0x940, BIT(9) | BIT(8), 0); - odm_set_bb_reg(dm, 0x940, BIT(11) | BIT(10), 1); - odm_set_bb_reg(dm, 0x940, BIT(15) | BIT(14), 2); + odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0); + odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 1); + odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 2); /* set for 3ss */ - odm_set_bb_reg(dm, 0x940, BIT(21) | BIT(20), 0); - odm_set_bb_reg(dm, 0x940, BIT(23) | BIT(22), 1); - odm_set_bb_reg(dm, 0x940, BIT(27) | BIT(26), 2); + odm_set_bb_reg(dm, R_0x940, BIT(21) | BIT(20), 0); + odm_set_bb_reg(dm, R_0x940, BIT(23) | BIT(22), 1); + odm_set_bb_reg(dm, R_0x940, BIT(27) | BIT(26), 2); - } else if (path == BB_PATH_ACD) { /* 3-3 */ - PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( A C D ))\n"); + } else if (path == BB_PATH_ACD) { /* @3-3 */ + PHYDM_DBG(dm, DBG_PATH_DIV, + " Turn on path (( A C D ))\n"); /* set for 1ss */ - odm_set_bb_reg(dm, 0x93c, BIT(25) | BIT(24), 0); - odm_set_bb_reg(dm, 0x93c, BIT(29) | BIT(28), 1); - odm_set_bb_reg(dm, 0x93c, BIT(31) | BIT(30), 2); + odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); + odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 1); + odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 2); /* set for 2ss */ - odm_set_bb_reg(dm, 0x940, BIT(9) | BIT(8), 0); - odm_set_bb_reg(dm, 0x940, BIT(13) | BIT(12), 1); - odm_set_bb_reg(dm, 0x940, BIT(15) | BIT(14), 2); + odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0); + odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 1); + odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 2); /* set for 3ss */ - odm_set_bb_reg(dm, 0x940, BIT(21) | BIT(20), 0); - odm_set_bb_reg(dm, 0x940, BIT(25) | BIT(24), 1); - odm_set_bb_reg(dm, 0x940, BIT(27) | BIT(26), 2); - } else if (path == BB_PATH_BCD) { /* 3-4 */ - PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( B C D))\n"); + odm_set_bb_reg(dm, R_0x940, BIT(21) | BIT(20), 0); + odm_set_bb_reg(dm, R_0x940, BIT(25) | BIT(24), 1); + odm_set_bb_reg(dm, R_0x940, BIT(27) | BIT(26), 2); + } else if (path == BB_PATH_BCD) { /* @3-4 */ + PHYDM_DBG(dm, DBG_PATH_DIV, + " Turn on path (( B C D))\n"); /* set for 1ss */ - odm_set_bb_reg(dm, 0x93c, BIT(27) | BIT(26), 0); - odm_set_bb_reg(dm, 0x93c, BIT(29) | BIT(28), 1); - odm_set_bb_reg(dm, 0x93c, BIT(31) | BIT(30), 2); + odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 0); + odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 1); + odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 2); /* set for 2ss */ - odm_set_bb_reg(dm, 0x940, BIT(11) | BIT(10), 0); - odm_set_bb_reg(dm, 0x940, BIT(13) | BIT(12), 1); - odm_set_bb_reg(dm, 0x940, BIT(15) | BIT(14), 2); + odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 0); + odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 1); + odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 2); /* set for 3ss */ - odm_set_bb_reg(dm, 0x940, BIT(23) | BIT(22), 0); - odm_set_bb_reg(dm, 0x940, BIT(25) | BIT(24), 1); - odm_set_bb_reg(dm, 0x940, BIT(27) | BIT(26), 2); + odm_set_bb_reg(dm, R_0x940, BIT(23) | BIT(22), 0); + odm_set_bb_reg(dm, R_0x940, BIT(25) | BIT(24), 1); + odm_set_bb_reg(dm, R_0x940, BIT(27) | BIT(26), 2); } - } else if (num_enable_path == 4) + } else if (num_enable_path == 4) PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path ((A B C D))\n"); - } -void -phydm_find_default_path( - void *dm_void -) +void phydm_find_default_path( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _ODM_PATH_DIVERSITY_ *dm_path_div = &dm->dm_path_div; - u32 rssi_avg_a = 0, rssi_avg_b = 0, rssi_avg_c = 0, rssi_avg_d = 0, rssi_avg_bcd = 0; - u32 rssi_total_a = 0, rssi_total_b = 0, rssi_total_c = 0, rssi_total_d = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + u32 rssi_a = 0, rssi_b = 0, rssi_c = 0, rssi_d = 0, rssi_bcd = 0; + u32 rssi_total_a = 0, rssi_total_b = 0; + u32 rssi_total_c = 0, rssi_total_d = 0; - /* 2 Default path Selection By RSSI */ + /* @2 Default path Selection By RSSI */ - rssi_avg_a = (dm_path_div->path_a_cnt_all > 0) ? (dm_path_div->path_a_sum_all / dm_path_div->path_a_cnt_all) : 0 ; - rssi_avg_b = (dm_path_div->path_b_cnt_all > 0) ? (dm_path_div->path_b_sum_all / dm_path_div->path_b_cnt_all) : 0 ; - rssi_avg_c = (dm_path_div->path_c_cnt_all > 0) ? (dm_path_div->path_c_sum_all / dm_path_div->path_c_cnt_all) : 0 ; - rssi_avg_d = (dm_path_div->path_d_cnt_all > 0) ? (dm_path_div->path_d_sum_all / dm_path_div->path_d_cnt_all) : 0 ; + rssi_a = (p_div->path_a_cnt_all > 0) ? + (p_div->path_a_sum_all / p_div->path_a_cnt_all) : 0; + rssi_b = (p_div->path_b_cnt_all > 0) ? + (p_div->path_b_sum_all / p_div->path_b_cnt_all) : 0; + rssi_c = (p_div->path_c_cnt_all > 0) ? + (p_div->path_c_sum_all / p_div->path_c_cnt_all) : 0; + rssi_d = (p_div->path_d_cnt_all > 0) ? + (p_div->path_d_sum_all / p_div->path_d_cnt_all) : 0; + p_div->path_a_sum_all = 0; + p_div->path_a_cnt_all = 0; + p_div->path_b_sum_all = 0; + p_div->path_b_cnt_all = 0; + p_div->path_c_sum_all = 0; + p_div->path_c_cnt_all = 0; + p_div->path_d_sum_all = 0; + p_div->path_d_cnt_all = 0; - dm_path_div->path_a_sum_all = 0; - dm_path_div->path_a_cnt_all = 0; - dm_path_div->path_b_sum_all = 0; - dm_path_div->path_b_cnt_all = 0; - dm_path_div->path_c_sum_all = 0; - dm_path_div->path_c_cnt_all = 0; - dm_path_div->path_d_sum_all = 0; - dm_path_div->path_d_cnt_all = 0; + if (p_div->use_path_a_as_default_ant == 1) { + rssi_bcd = (rssi_b + rssi_c + rssi_d) / 3; - if (dm_path_div->use_path_a_as_default_ant == 1) { - rssi_avg_bcd = (rssi_avg_b + rssi_avg_c + rssi_avg_d) / 3; - - if ((rssi_avg_a + ANT_DECT_RSSI_TH) > rssi_avg_bcd) { - dm_path_div->is_path_a_exist = true; - dm_path_div->default_path = PATH_A; - } else - dm_path_div->is_path_a_exist = false; + if ((rssi_a + ANT_DECT_RSSI_TH) > rssi_bcd) { + p_div->is_path_a_exist = true; + p_div->default_path = PATH_A; + } else { + p_div->is_path_a_exist = false; + } } else { - if ((rssi_avg_a >= rssi_avg_b) && (rssi_avg_a >= rssi_avg_c) && (rssi_avg_a >= rssi_avg_d)) - dm_path_div->default_path = PATH_A; - else if ((rssi_avg_b >= rssi_avg_c) && (rssi_avg_b >= rssi_avg_d)) - dm_path_div->default_path = PATH_B; - else if (rssi_avg_c >= rssi_avg_d) - dm_path_div->default_path = PATH_C; + if (rssi_a >= rssi_b && + rssi_a >= rssi_c && + rssi_a >= rssi_d) + p_div->default_path = PATH_A; + else if ((rssi_b >= rssi_c) && (rssi_b >= rssi_d)) + p_div->default_path = PATH_B; + else if (rssi_c >= rssi_d) + p_div->default_path = PATH_C; else - dm_path_div->default_path = PATH_D; + p_div->default_path = PATH_D; } - - } - -void -phydm_candidate_dtp_update( - void *dm_void -) +void phydm_candidate_dtp_update( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _ODM_PATH_DIVERSITY_ *dm_path_div = &dm->dm_path_div; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; - dm_path_div->num_candidate = 3; + p_div->num_candidate = 3; - if (dm_path_div->use_path_a_as_default_ant == 1) { - if (dm_path_div->num_tx_path == 3) { - if (dm_path_div->is_path_a_exist) { - dm_path_div->ant_candidate_1 = BB_PATH_ABC; - dm_path_div->ant_candidate_2 = BB_PATH_ABD; - dm_path_div->ant_candidate_3 = BB_PATH_ACD; + if (p_div->use_path_a_as_default_ant == 1) { + if (p_div->num_tx_path == 3) { + if (p_div->is_path_a_exist) { + p_div->ant_candidate_1 = BB_PATH_ABC; + p_div->ant_candidate_2 = BB_PATH_ABD; + p_div->ant_candidate_3 = BB_PATH_ACD; } else { /* use path BCD */ - dm_path_div->num_candidate = 1; + p_div->num_candidate = 1; phydm_dtp_fix_tx_path(dm, BB_PATH_BCD); return; } - } else if (dm_path_div->num_tx_path == 2) { - if (dm_path_div->is_path_a_exist) { - dm_path_div->ant_candidate_1 = BB_PATH_AB; - dm_path_div->ant_candidate_2 = BB_PATH_AC; - dm_path_div->ant_candidate_3 = BB_PATH_AD; + } else if (p_div->num_tx_path == 2) { + if (p_div->is_path_a_exist) { + p_div->ant_candidate_1 = BB_PATH_AB; + p_div->ant_candidate_2 = BB_PATH_AC; + p_div->ant_candidate_3 = BB_PATH_AD; } else { - dm_path_div->ant_candidate_1 = BB_PATH_BC; - dm_path_div->ant_candidate_2 = BB_PATH_BD; - dm_path_div->ant_candidate_3 = BB_PATH_CD; + p_div->ant_candidate_1 = BB_PATH_BC; + p_div->ant_candidate_2 = BB_PATH_BD; + p_div->ant_candidate_3 = BB_PATH_CD; } } } else { - /* 2 3 TX mode */ - if (dm_path_div->num_tx_path == 3) { /* choose 3 ant form 4 */ - if (dm_path_div->default_path == PATH_A) { /* choose 2 ant form 3 */ - dm_path_div->ant_candidate_1 = BB_PATH_ABC; - dm_path_div->ant_candidate_2 = BB_PATH_ABD; - dm_path_div->ant_candidate_3 = BB_PATH_ACD; - } else if (dm_path_div->default_path == PATH_B) { - dm_path_div->ant_candidate_1 = BB_PATH_ABC; - dm_path_div->ant_candidate_2 = BB_PATH_ABD; - dm_path_div->ant_candidate_3 = BB_PATH_BCD; - } else if (dm_path_div->default_path == PATH_C) { - dm_path_div->ant_candidate_1 = BB_PATH_ABC; - dm_path_div->ant_candidate_2 = BB_PATH_ACD; - dm_path_div->ant_candidate_3 = BB_PATH_BCD; - } else if (dm_path_div->default_path == PATH_D) { - dm_path_div->ant_candidate_1 = BB_PATH_ABD; - dm_path_div->ant_candidate_2 = BB_PATH_ACD; - dm_path_div->ant_candidate_3 = BB_PATH_BCD; + /* @2 3 TX mode */ + if (p_div->num_tx_path == 3) { /* @choose 3 ant form 4 */ + if (p_div->default_path == PATH_A) { + /* @choose 2 ant form 3 */ + p_div->ant_candidate_1 = BB_PATH_ABC; + p_div->ant_candidate_2 = BB_PATH_ABD; + p_div->ant_candidate_3 = BB_PATH_ACD; + } else if (p_div->default_path == PATH_B) { + p_div->ant_candidate_1 = BB_PATH_ABC; + p_div->ant_candidate_2 = BB_PATH_ABD; + p_div->ant_candidate_3 = BB_PATH_BCD; + } else if (p_div->default_path == PATH_C) { + p_div->ant_candidate_1 = BB_PATH_ABC; + p_div->ant_candidate_2 = BB_PATH_ACD; + p_div->ant_candidate_3 = BB_PATH_BCD; + } else if (p_div->default_path == PATH_D) { + p_div->ant_candidate_1 = BB_PATH_ABD; + p_div->ant_candidate_2 = BB_PATH_ACD; + p_div->ant_candidate_3 = BB_PATH_BCD; } } - /* 2 2 TX mode */ - else if (dm_path_div->num_tx_path == 2) { /* choose 2 ant form 4 */ - if (dm_path_div->default_path == PATH_A) { /* choose 2 ant form 3 */ - dm_path_div->ant_candidate_1 = BB_PATH_AB; - dm_path_div->ant_candidate_2 = BB_PATH_AC; - dm_path_div->ant_candidate_3 = BB_PATH_AD; - } else if (dm_path_div->default_path == PATH_B) { - dm_path_div->ant_candidate_1 = BB_PATH_AB; - dm_path_div->ant_candidate_2 = BB_PATH_BC; - dm_path_div->ant_candidate_3 = BB_PATH_BD; - } else if (dm_path_div->default_path == PATH_C) { - dm_path_div->ant_candidate_1 = BB_PATH_AC; - dm_path_div->ant_candidate_2 = BB_PATH_BC; - dm_path_div->ant_candidate_3 = BB_PATH_CD; - } else if (dm_path_div->default_path == PATH_D) { - dm_path_div->ant_candidate_1 = BB_PATH_AD; - dm_path_div->ant_candidate_2 = BB_PATH_BD; - dm_path_div->ant_candidate_3 = BB_PATH_CD; + /* @2 2 TX mode */ + else if (p_div->num_tx_path == 2) { /* @choose 2 ant form 4 */ + if (p_div->default_path == PATH_A) { + /* @choose 2 ant form 3 */ + p_div->ant_candidate_1 = BB_PATH_AB; + p_div->ant_candidate_2 = BB_PATH_AC; + p_div->ant_candidate_3 = BB_PATH_AD; + } else if (p_div->default_path == PATH_B) { + p_div->ant_candidate_1 = BB_PATH_AB; + p_div->ant_candidate_2 = BB_PATH_BC; + p_div->ant_candidate_3 = BB_PATH_BD; + } else if (p_div->default_path == PATH_C) { + p_div->ant_candidate_1 = BB_PATH_AC; + p_div->ant_candidate_2 = BB_PATH_BC; + p_div->ant_candidate_3 = BB_PATH_CD; + } else if (p_div->default_path == PATH_D) { + p_div->ant_candidate_1 = BB_PATH_AD; + p_div->ant_candidate_2 = BB_PATH_BD; + p_div->ant_candidate_3 = BB_PATH_CD; } } } } - -void -phydm_dynamic_tx_path( - void *dm_void -) +void phydm_dynamic_tx_path( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _ODM_PATH_DIVERSITY_ *dm_path_div = &dm->dm_path_div; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; - struct sta_info *entry; - u32 i; - u8 num_client = 0; - u8 h2c_parameter[6] = {0}; + struct sta_info *entry; + u32 i; + u8 num_client = 0; + u8 h2c_parameter[6] = {0}; - - if (!dm->is_linked) { /* is_linked==False */ + if (!dm->is_linked) { /* @is_linked==False */ PHYDM_DBG(dm, DBG_PATH_DIV, "DTP_8814 [No Link!!!]\n"); - if (dm_path_div->is_become_linked == true) { - PHYDM_DBG(dm, DBG_PATH_DIV, " [Be disconnected]----->\n"); - dm_path_div->is_become_linked = dm->is_linked; + if (p_div->is_become_linked) { + PHYDM_DBG(dm, DBG_PATH_DIV, "[Be disconnected]---->\n"); + p_div->is_become_linked = dm->is_linked; } return; } else { - if (dm_path_div->is_become_linked == false) { + if (!p_div->is_become_linked) { PHYDM_DBG(dm, DBG_PATH_DIV, " [Be Linked !!!]----->\n"); - dm_path_div->is_become_linked = dm->is_linked; + p_div->is_become_linked = dm->is_linked; } } - /* 2 [period CTRL] */ - if (dm_path_div->dtp_period >= 2) - dm_path_div->dtp_period = 0; - else { - /* PHYDM_DBG(dm,DBG_PATH_DIV, "Phydm_Dynamic_Tx_Path_8814A() Stay = (( %d ))\n",dm_path_div->dtp_period); */ - dm_path_div->dtp_period++; + /* @2 [period CTRL] */ + if (p_div->dtp_period >= 2) { + p_div->dtp_period = 0; + } else { + p_div->dtp_period++; return; } - - /* 2 [Fix path] */ + /* @2 [Fix path] */ if (dm->path_select != PHYDM_AUTO_PATH) return; - /* 2 [Check Bfer] */ +/* @2 [Check Bfer] */ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT { - enum beamforming_cap beamform_cap = (dm->beamforming_info.beamform_cap); + enum beamforming_cap beamform_cap = (dm->beamforming_info.beamform_cap); - if (beamform_cap & BEAMFORMER_CAP) { /* BFmer On && Div On->Div Off */ - if (dm_path_div->fix_path_bfer == 0) { - PHYDM_DBG(dm, DBG_PATH_DIV, "[ PathDiv : OFF ] BFmer ==1\n"); - dm_path_div->fix_path_bfer = 1 ; + if (beamform_cap & BEAMFORMER_CAP) { /* @BFmer On && Div On->Div Off */ + if (p_div->fix_path_bfer == 0) { + PHYDM_DBG(dm, DBG_PATH_DIV, + "[ PathDiv : OFF ] BFmer ==1\n"); + p_div->fix_path_bfer = 1; } return; - } else { /* BFmer Off && Div Off->Div On */ - if (dm_path_div->fix_path_bfer == 1) { - PHYDM_DBG(dm, DBG_PATH_DIV, "[ PathDiv : ON ] BFmer ==0\n"); - dm_path_div->fix_path_bfer = 0; + } else { /* @BFmer Off && Div Off->Div On */ + if (p_div->fix_path_bfer == 1) { + PHYDM_DBG(dm, DBG_PATH_DIV, + "[ PathDiv : ON ] BFmer ==0\n"); + p_div->fix_path_bfer = 0; } } } #endif #endif - if (dm_path_div->use_path_a_as_default_ant == 1) { + if (p_div->use_path_a_as_default_ant == 1) { phydm_find_default_path(dm); phydm_candidate_dtp_update(dm); } else { - if (dm_path_div->phydm_dtp_state == PHYDM_DTP_INIT) { + if (p_div->phydm_dtp_state == PHYDM_DTP_INIT) { phydm_find_default_path(dm); phydm_candidate_dtp_update(dm); - dm_path_div->phydm_dtp_state = PHYDM_DTP_RUNNING_1; + p_div->phydm_dtp_state = PHYDM_DTP_RUNNING_1; } - else if (dm_path_div->phydm_dtp_state == PHYDM_DTP_RUNNING_1) { - dm_path_div->dtp_check_patha_counter++; + else if (p_div->phydm_dtp_state == PHYDM_DTP_RUNNING_1) { + p_div->dtp_check_patha_counter++; - if (dm_path_div->dtp_check_patha_counter >= NUM_RESET_DTP_PERIOD) { - dm_path_div->dtp_check_patha_counter = 0; - dm_path_div->phydm_dtp_state = PHYDM_DTP_INIT; + if (p_div->dtp_check_patha_counter >= + NUM_RESET_DTP_PERIOD) { + p_div->dtp_check_patha_counter = 0; + p_div->phydm_dtp_state = PHYDM_DTP_INIT; } #if 0 - /* 2 Search space update */ + /* @2 Search space update */ else { - /* 1. find the worst candidate */ + /* @1. find the worst candidate */ - /* 2. repalce the worst candidate */ + /* @2. repalce the worst candidate */ } #endif } } - /* 2 Dynamic path Selection H2C */ + /* @2 Dynamic path Selection H2C */ - if (dm_path_div->num_candidate == 1) + if (p_div->num_candidate == 1) { return; - else { - h2c_parameter[0] = dm_path_div->num_candidate; - h2c_parameter[1] = dm_path_div->num_tx_path; - h2c_parameter[2] = dm_path_div->ant_candidate_1; - h2c_parameter[3] = dm_path_div->ant_candidate_2; - h2c_parameter[4] = dm_path_div->ant_candidate_3; + } else { + h2c_parameter[0] = p_div->num_candidate; + h2c_parameter[1] = p_div->num_tx_path; + h2c_parameter[2] = p_div->ant_candidate_1; + h2c_parameter[3] = p_div->ant_candidate_2; + h2c_parameter[4] = p_div->ant_candidate_3; odm_fill_h2c_cmd(dm, PHYDM_H2C_DYNAMIC_TX_PATH, 6, h2c_parameter); } - } - - -void -phydm_dynamic_tx_path_init( - void *dm_void -) +void phydm_dynamic_tx_path_init( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _ODM_PATH_DIVERSITY_ *dm_path_div = &dm->dm_path_div; - void *adapter = dm->adapter; - u8 search_space_2[NUM_CHOOSE2_FROM4] = {BB_PATH_AB, BB_PATH_AC, BB_PATH_AD, BB_PATH_BC, BB_PATH_BD, BB_PATH_CD }; - u8 search_space_3[NUM_CHOOSE3_FROM4] = {BB_PATH_BCD, BB_PATH_ACD, BB_PATH_ABD, BB_PATH_ABC}; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + void *adapter = dm->adapter; + u8 search_space_2[NUM_CHOOSE2_FROM4] = {BB_PATH_AB, BB_PATH_AC, BB_PATH_AD, BB_PATH_BC, BB_PATH_BD, BB_PATH_CD}; + u8 search_space_3[NUM_CHOOSE3_FROM4] = {BB_PATH_BCD, BB_PATH_ACD, BB_PATH_ABD, BB_PATH_ABC}; #if ((DM_ODM_SUPPORT_TYPE == ODM_WIN) && USB_SWITCH_SUPPORT) - dm_path_div->is_u3_mode = (*dm->hub_usb_mode == 2) ? 1 : 0; - PHYDM_DBG(dm, DBG_PATH_DIV, "[WIN USB] is_u3_mode = (( %d ))\n", dm_path_div->is_u3_mode); + p_div->is_u3_mode = (*dm->hub_usb_mode == 2) ? 1 : 0; + PHYDM_DBG(dm, DBG_PATH_DIV, "[WIN USB] is_u3_mode = (( %d ))\n", + p_div->is_u3_mode); #else - dm_path_div->is_u3_mode = 1; + p_div->is_u3_mode = 1; #endif PHYDM_DBG(dm, DBG_PATH_DIV, "Dynamic TX path Init 8814\n"); - memcpy(&dm_path_div->search_space_2[0], &search_space_2[0], + memcpy(&p_div->search_space_2[0], &search_space_2[0], NUM_CHOOSE2_FROM4); - memcpy(&dm_path_div->search_space_3[0], &search_space_3[0], + memcpy(&p_div->search_space_3[0], &search_space_3[0], NUM_CHOOSE3_FROM4); - dm_path_div->use_path_a_as_default_ant = 1; - dm_path_div->phydm_dtp_state = PHYDM_DTP_INIT; + p_div->use_path_a_as_default_ant = 1; + p_div->phydm_dtp_state = PHYDM_DTP_INIT; dm->path_select = PHYDM_AUTO_PATH; - dm_path_div->phydm_path_div_type = PHYDM_4R_PATH_DIV; + p_div->phydm_path_div_type = PHYDM_4R_PATH_DIV; - - if (dm_path_div->is_u3_mode) { - dm_path_div->num_tx_path = 3; - phydm_dtp_fix_tx_path(dm, BB_PATH_BCD);/* 3TX Set Init TX path*/ + if (p_div->is_u3_mode) { + p_div->num_tx_path = 3; + phydm_dtp_fix_tx_path(dm, BB_PATH_BCD); /* @3TX Set Init TX path*/ } else { - dm_path_div->num_tx_path = 2; - phydm_dtp_fix_tx_path(dm, BB_PATH_BC);/* 2TX // Set Init TX path*/ + p_div->num_tx_path = 2; + phydm_dtp_fix_tx_path(dm, BB_PATH_BC); /* @2TX // Set Init TX path*/ } - } - -void -phydm_process_rssi_for_path_div( - void *dm_void, - void *phy_info_void, - void *pkt_info_void -) +void phydm_process_rssi_for_path_div_8814a(void *dm_void, void *phy_info_void, + void *pkt_info_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_phyinfo_struct *phy_info = (struct phydm_phyinfo_struct *)phy_info_void; - struct phydm_perpkt_info_struct *pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; - struct _ODM_PATH_DIVERSITY_ *dm_path_div = &dm->dm_path_div; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_phyinfo_struct *phy_info = NULL; + struct phydm_perpkt_info_struct *pktinfo = NULL; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + + phy_info = (struct phydm_phyinfo_struct *)phy_info_void; + pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; if (!(pktinfo->is_packet_to_self || pktinfo->is_packet_match_bssid)) return; @@ -495,215 +493,599 @@ phydm_process_rssi_for_path_div( if (pktinfo->data_rate <= ODM_RATE11M) return; - if (dm_path_div->phydm_path_div_type == PHYDM_4R_PATH_DIV) { -#if RTL8814A_SUPPORT - if (dm->support_ic_type & ODM_RTL8814A) { - dm_path_div->path_a_sum_all += phy_info->rx_mimo_signal_strength[0]; - dm_path_div->path_a_cnt_all++; + if (p_div->phydm_path_div_type == PHYDM_4R_PATH_DIV) { + p_div->path_a_sum_all += phy_info->rx_mimo_signal_strength[0]; + p_div->path_a_cnt_all++; - dm_path_div->path_b_sum_all += phy_info->rx_mimo_signal_strength[1]; - dm_path_div->path_b_cnt_all++; + p_div->path_b_sum_all += phy_info->rx_mimo_signal_strength[1]; + p_div->path_b_cnt_all++; - dm_path_div->path_c_sum_all += phy_info->rx_mimo_signal_strength[2]; - dm_path_div->path_c_cnt_all++; + p_div->path_c_sum_all += phy_info->rx_mimo_signal_strength[2]; + p_div->path_c_cnt_all++; - dm_path_div->path_d_sum_all += phy_info->rx_mimo_signal_strength[3]; - dm_path_div->path_d_cnt_all++; - } -#endif - } else { - dm_path_div->path_a_sum[pktinfo->station_id] += phy_info->rx_mimo_signal_strength[0]; - dm_path_div->path_a_cnt[pktinfo->station_id]++; - - dm_path_div->path_b_sum[pktinfo->station_id] += phy_info->rx_mimo_signal_strength[1]; - dm_path_div->path_b_cnt[pktinfo->station_id]++; + p_div->path_d_sum_all += phy_info->rx_mimo_signal_strength[3]; + p_div->path_d_cnt_all++; } } -#endif /* #if RTL8814A_SUPPORT */ - -void -odm_pathdiv_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_pathdiv_debug_8814a(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _ODM_PATH_DIVERSITY_ *dm_path_div = &dm->dm_path_div; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; u32 used = *_used; u32 out_len = *_out_len; + u32 dm_value[10] = {0}; + u8 i, input_idx = 0; - dm->path_select = (dm_value[0] & 0xf); + for (i = 0; i < 5; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]); + input_idx++; + } + } + + if (input_idx == 0) + return; + + dm->path_select = (u8)(dm_value[0] & 0xf); PDM_SNPF(out_len, used, output + used, out_len - used, - "Path_select = (( 0x%x ))\n", dm->path_select); + "Path_select = (( 0x%x ))\n", dm->path_select); - /* 2 [Fix path] */ + /* @2 [Fix path] */ if (dm->path_select != PHYDM_AUTO_PATH) { PDM_SNPF(out_len, used, output + used, out_len - used, - "Trun on path [%s%s%s%s]\n", - ((dm->path_select) & 0x1) ? "A" : "", - ((dm->path_select) & 0x2) ? "B" : "", - ((dm->path_select) & 0x4) ? "C" : "", - ((dm->path_select) & 0x8) ? "D" : ""); + "Turn on path [%s%s%s%s]\n", + ((dm->path_select) & 0x1) ? "A" : "", + ((dm->path_select) & 0x2) ? "B" : "", + ((dm->path_select) & 0x4) ? "C" : "", + ((dm->path_select) & 0x8) ? "D" : ""); phydm_dtp_fix_tx_path(dm, dm->path_select); - } else - PDM_SNPF(out_len, used, output + used, out_len - used, - "%s\n", "Auto path"); + } else { + PDM_SNPF(out_len, used, output + used, out_len - used, "%s\n", + "Auto path"); + } *_used = used; *_out_len = out_len; } -#endif /* #if(defined(CONFIG_PATH_DIVERSITY)) */ +#endif /* @#if RTL8814A_SUPPORT */ -void -phydm_c2h_dtp_handler( - void *dm_void, - u8 *cmd_buf, - u8 cmd_len -) +#if RTL8812A_SUPPORT +void phydm_update_tx_path_8812a(void *dm_void, enum bb_path path) { -#if (defined(CONFIG_PATH_DIVERSITY)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _ODM_PATH_DIVERSITY_ *dm_path_div = &dm->dm_path_div; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; - u8 macid = cmd_buf[0]; - u8 target = cmd_buf[1]; - u8 nsc_1 = cmd_buf[2]; - u8 nsc_2 = cmd_buf[3]; - u8 nsc_3 = cmd_buf[4]; + if (p_div->default_tx_path != path) { + PHYDM_DBG(dm, DBG_PATH_DIV, "Need to Update Tx path\n"); + + if (path == BB_PATH_A) { + /*Tx by Reg*/ + odm_set_bb_reg(dm, R_0x80c, 0xFFF0, 0x111); + /*Resp Tx by Txinfo*/ + odm_set_bb_reg(dm, R_0x6d8, 0xc0, 1); + } else { + /*Tx by Reg*/ + odm_set_bb_reg(dm, R_0x80c, 0xFFF0, 0x222); + /*Resp Tx by Txinfo*/ + odm_set_bb_reg(dm, R_0x6d8, 0xc0, 2); + } + } + p_div->default_tx_path = path; + + PHYDM_DBG(dm, DBG_PATH_DIV, "path=%s\n", + (path == BB_PATH_A) ? "A" : "B"); +} + +void phydm_path_diversity_init_8812a(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + u32 i; + + odm_set_bb_reg(dm, R_0x80c, BIT(29), 1); /* Tx path from Reg */ + odm_set_bb_reg(dm, R_0x80c, 0xFFF0, 0x111); /* Tx by Reg */ + odm_set_bb_reg(dm, R_0x6d8, BIT(7) | BIT6, 1); /* Resp Tx by Txinfo */ + phydm_set_tx_path_by_bb_reg(dm, RF_PATH_A); + + for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + p_div->path_sel[i] = 1; /* TxInfo default at path-A */ +} +#endif + +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT +void phydm_set_resp_tx_path_by_fw_jgr3(void *dm_void, u8 macid, + enum bb_path path, boolean enable) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + u8 h2c_para[7] = {0}; + u8 path_map[4] = {0}; /* tx logic map*/ + u8 num_enable_path = 0; + u8 n_tx_path_ctrl_map = 0; + u8 i = 0, n_sts = 0; + + /*Response TX is controlled in FW ctrl info*/ + + PHYDM_DBG(dm, DBG_PATH_DIV, "[%s] =====>\n", __func__); + + if (enable) { + n_tx_path_ctrl_map = path; + + for (i = 0; i < 4; i++) { + path_map[i] = 0; + if (path & BIT(i)) + num_enable_path++; + } + + for (i = 0; i < 4; i++) { + if (path & BIT(i)) { + path_map[i] = n_sts; + n_sts++; + + if (n_sts == num_enable_path) + break; + } + } + } + + PHYDM_DBG(dm, DBG_PATH_DIV, "ctrl_map=0x%x Map[D:A]={%d, %d, %d, %d}\n", + n_tx_path_ctrl_map, + path_map[3], path_map[2], path_map[1], path_map[0]); + + h2c_para[0] = macid; + h2c_para[1] = n_tx_path_ctrl_map; + h2c_para[2] = (path_map[3] << 6) | (path_map[2] << 4) | + (path_map[1] << 2) | path_map[0]; + + odm_fill_h2c_cmd(dm, PHYDM_H2C_DYNAMIC_TX_PATH, 7, h2c_para); +} + +void phydm_get_tx_path_txdesc_jgr3(void *dm_void, u8 macid, + struct path_txdesc_ctrl *desc) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + u8 ant_map_a = 0, ant_map_b = 0; + u8 ntx_map = 0; + + if (p_div->path_sel[macid] == BB_PATH_A) { + desc->ant_map_a = 0; /*offest24[23:22]*/ + desc->ant_map_b = 0; /*offest24[25:24]*/ + desc->ntx_map = BB_PATH_A; /*offest28[23:20]*/ + } else if (p_div->path_sel[macid] == BB_PATH_B) { + desc->ant_map_a = 0; /*offest24[23:22]*/ + desc->ant_map_b = 0; /*offest24[25:24]*/ + desc->ntx_map = BB_PATH_B; /*offest28[23:20]*/ + } else { + desc->ant_map_a = 0; /*offest24[23:22]*/ + desc->ant_map_b = 1; /*offest24[25:24]*/ + desc->ntx_map = BB_PATH_AB; /*offest28[23:20]*/ + } +} +#endif + +void phydm_tx_path_by_mac_or_reg(void *dm_void, enum phydm_path_ctrl ctrl) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + + PHYDM_DBG(dm, DBG_PATH_DIV, "[%s] ctrl=%s\n", + __func__, (ctrl == TX_PATH_BY_REG) ? "REG" : "DESC"); + + if (ctrl == p_div->tx_path_ctrl) + return; + + p_div->tx_path_ctrl = ctrl; + + switch (dm->support_ic_type) { + #if (RTL8822C_SUPPORT) + case ODM_RTL8822C: + if (ctrl == TX_PATH_BY_REG) { + odm_set_bb_reg(dm, R_0x1e24, BIT(16), 0); /*OFDM*/ + odm_set_bb_reg(dm, R_0x1a84, 0xe0, 0); /*CCK*/ + } else { + odm_set_bb_reg(dm, R_0x1e24, BIT(16), 1); /*OFDM*/ + odm_set_bb_reg(dm, R_0x1a84, 0xe0, 7); /*CCK*/ + } + + break; + #endif + #if 0 /*(RTL8822B_SUPPORT)*/ /*@ HW Bug*/ + case ODM_RTL8822B: + if (ctrl == TX_PATH_BY_REG) { + odm_set_bb_reg(dm, R_0x93c, BIT(18), 0); + odm_set_bb_reg(dm, R_0xa84, 0xe0, 0); /*CCK*/ + } else { + odm_set_bb_reg(dm, R_0x93c, BIT(18), 1); + odm_set_bb_reg(dm, R_0xa84, 0xe0, 7); /*CCK*/ + } + + break; + #endif + default: + break; + } +} + +void phydm_fix_1ss_tx_path_by_bb_reg(void *dm_void, + enum bb_path tx_path_sel_1ss, + enum bb_path tx_path_sel_cck) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + + if (tx_path_sel_1ss != BB_PATH_AUTO) { + p_div->ofdm_fix_path_en = true; + p_div->ofdm_fix_path_sel = tx_path_sel_1ss; + } else { + p_div->ofdm_fix_path_en = false; + p_div->ofdm_fix_path_sel = dm->tx_1ss_status; + } + + if (tx_path_sel_cck != BB_PATH_AUTO) { + p_div->cck_fix_path_en = true; + p_div->cck_fix_path_sel = tx_path_sel_cck; + } else { + p_div->cck_fix_path_en = false; + p_div->cck_fix_path_sel = dm->tx_1ss_status; + } + + p_div->force_update = true; + + PHYDM_DBG(dm, DBG_PATH_DIV, + "{OFDM_fix_en=%d, path=%d} {CCK_fix_en=%d, path=%d}\n", + p_div->ofdm_fix_path_en, p_div->ofdm_fix_path_sel, + p_div->cck_fix_path_en, p_div->cck_fix_path_sel); +} + +void phydm_set_tx_path_by_bb_reg(void *dm_void, enum bb_path tx_path_sel_1ss) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + enum bb_path tx_path_sel_cck = tx_path_sel_1ss; + + if (!p_div->force_update) { + if (tx_path_sel_1ss == p_div->default_tx_path) { + PHYDM_DBG(dm, DBG_PATH_DIV, "Stay in TX path=%s\n", + (tx_path_sel_1ss == BB_PATH_A) ? "A" : "B"); + return; + } + } + p_div->force_update = false; + + p_div->default_tx_path = tx_path_sel_1ss; + + PHYDM_DBG(dm, DBG_PATH_DIV, "Switch TX path=%s\n", + (tx_path_sel_1ss == BB_PATH_A) ? "A" : "B"); + + /*Adv-ctrl mode*/ + if (p_div->cck_fix_path_en) { + PHYDM_DBG(dm, DBG_PATH_DIV, "Fix CCK TX path=%d\n", + p_div->cck_fix_path_sel); + tx_path_sel_cck = p_div->cck_fix_path_sel; + } + + if (p_div->ofdm_fix_path_en) { + PHYDM_DBG(dm, DBG_PATH_DIV, "Fix OFDM TX path=%d\n", + p_div->ofdm_fix_path_sel); + tx_path_sel_1ss = p_div->ofdm_fix_path_sel; + } + + switch (dm->support_ic_type) { + #if RTL8822C_SUPPORT + case ODM_RTL8822C: + phydm_config_tx_path_8822c(dm, dm->tx_2ss_status, + tx_path_sel_1ss, tx_path_sel_cck); + break; + #endif + + #if 0 /*RTL8822B_SUPPORT*/ + case ODM_RTL8822B: + if (dm->tx_ant_status != BB_PATH_AB) + return; + + phydm_config_tx_path_8822b(dm, BB_PATH_AB, + tx_path_sel_1ss, tx_path_sel_cck); + break; + #endif + + #if RTL8812A_SUPPORT + case ODM_RTL8812: + phydm_update_tx_path_8812a(dm, tx_path_sel_1ss); + break; + #endif + default: + break; + } +} + +void phydm_tx_path_diversity_2ss(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + struct cmn_sta_info *sta; + enum bb_path default_tx_path = BB_PATH_A, path = BB_PATH_A; + u32 rssi_a = 0, rssi_b = 0; + u32 local_max_rssi, glb_min_rssi = 0xff; + u8 i = 0; + + PHYDM_DBG(dm, DBG_PATH_DIV, "[%s] =======>\n", __func__); + + if (!dm->is_linked) { + if (dm->first_disconnect) + phydm_tx_path_by_mac_or_reg(dm, TX_PATH_BY_REG); + + PHYDM_DBG(dm, DBG_PATH_DIV, "No Link\n"); + return; + } + + #if 0/*def PHYDM_IC_JGR3_SERIES_SUPPORT*/ + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + if (dm->is_one_entry_only || p_div->cck_fix_path_en || + p_div->ofdm_fix_path_en) + phydm_tx_path_by_mac_or_reg(dm, TX_PATH_BY_REG); + else + phydm_tx_path_by_mac_or_reg(dm, TX_PATH_BY_DESC); + } + #endif + + for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { + sta = dm->phydm_sta_info[i]; + if (!is_sta_active(sta)) + continue; + + /* 2 Caculate RSSI per path */ + rssi_a = PHYDM_DIV(p_div->path_a_sum[i], p_div->path_a_cnt[i]); + rssi_b = PHYDM_DIV(p_div->path_b_sum[i], p_div->path_b_cnt[i]); + + if (rssi_a == rssi_b) + path = p_div->default_tx_path; + else + path = (rssi_a > rssi_b) ? BB_PATH_A : BB_PATH_B; + + local_max_rssi = (rssi_a > rssi_b) ? rssi_a : rssi_b; + + PHYDM_DBG(dm, DBG_PATH_DIV, + "[%d]PathA sum=%d, cnt=%d, avg_rssi=%d\n", + i, p_div->path_a_sum[i], + p_div->path_a_cnt[i], rssi_a); + PHYDM_DBG(dm, DBG_PATH_DIV, + "[%d]PathB sum=%d, cnt=%d, avg_rssi=%d\n", + i, p_div->path_b_sum[i], + p_div->path_b_cnt[i], rssi_b); + + /*Select default Tx path */ + if (local_max_rssi < glb_min_rssi) { + glb_min_rssi = local_max_rssi; + default_tx_path = path; + } + + if (p_div->path_sel[i] != path) { + p_div->path_sel[i] = path; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + phydm_set_resp_tx_path_by_fw_jgr3(dm, i, + path, true); + #endif + } + + p_div->path_a_cnt[i] = 0; + p_div->path_a_sum[i] = 0; + p_div->path_b_cnt[i] = 0; + p_div->path_b_sum[i] = 0; + } + + /* 2 Update default Tx path */ + phydm_set_tx_path_by_bb_reg(dm, default_tx_path); + PHYDM_DBG(dm, DBG_PATH_DIV, "[%s] end\n\n", __func__); +} + +void phydm_tx_path_diversity(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + + p_div->path_div_in_progress = false; + + if (!(dm->support_ability & ODM_BB_PATH_DIV)) + return; + + if (p_div->stop_path_div) { + PHYDM_DBG(dm, DBG_PATH_DIV, + "stop_path_div=1, tx_1ss_status=%d\n", + dm->tx_1ss_status); + return; + } + + switch (dm->support_ic_type) { + #if (RTL8822C_SUPPORT || RTL8822B_SUPPORT || RTL8812A_SUPPORT) + case ODM_RTL8812: + case ODM_RTL8822B: + case ODM_RTL8822C: + if (dm->rx_ant_status != BB_PATH_AB) { + PHYDM_DBG(dm, DBG_PATH_DIV, + "[Return] tx_Path_en=%d, rx_Path_en=%d\n", + dm->tx_ant_status, dm->rx_ant_status); + return; + } + + p_div->path_div_in_progress = true; + phydm_tx_path_diversity_2ss(dm); + break; + #endif + + #if RTL8814A_SUPPORT + case ODM_RTL8814A: + phydm_dynamic_tx_path(dm); + break; + #endif + } +} + +void phydm_tx_path_diversity_init_v2(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + u32 i = 0; + + PHYDM_DBG(dm, DBG_PATH_DIV, "[%s] ====>\n", __func__); + + /*BB_PATH_AB is a invalid value used for init state*/ + p_div->default_tx_path = BB_PATH_A; + p_div->tx_path_ctrl = TX_PATH_CTRL_INIT; + p_div->path_div_in_progress = false; + + p_div->cck_fix_path_en = false; + p_div->ofdm_fix_path_en = false; + p_div->force_update = false; + + for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + p_div->path_sel[i] = BB_PATH_A; /* TxInfo default at path-A */ + + phydm_tx_path_by_mac_or_reg(dm, TX_PATH_BY_REG); +} + +void phydm_tx_path_diversity_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (!(dm->support_ability & ODM_BB_PATH_DIV)) + return; + + switch (dm->support_ic_type) { + #if (RTL8822C_SUPPORT || RTL8822B_SUPPORT) + case ODM_RTL8822C: + case ODM_RTL8822B: + phydm_tx_path_diversity_init_v2(dm); /*@ After 8822B*/ + break; + #endif + + #if RTL8812A_SUPPORT + case ODM_RTL8812: + phydm_path_diversity_init_8812a(dm); + break; + #endif + + #if RTL8814A_SUPPORT + case ODM_RTL8814A: + phydm_dynamic_tx_path_init(dm); + break; + #endif + } +} + +void phydm_process_rssi_for_path_div(void *dm_void, void *phy_info_void, + void *pkt_info_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_phyinfo_struct *phy_info = NULL; + struct phydm_perpkt_info_struct *pktinfo = NULL; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + u8 id = 0; + + phy_info = (struct phydm_phyinfo_struct *)phy_info_void; + pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; + + if (!(pktinfo->is_packet_to_self || pktinfo->is_packet_match_bssid)) + return; + + if (pktinfo->is_cck_rate) + return; + + id = pktinfo->station_id; + p_div->path_a_sum[id] += phy_info->rx_mimo_signal_strength[0]; + p_div->path_a_cnt[id]++; + + p_div->path_b_sum[id] += phy_info->rx_mimo_signal_strength[1]; + p_div->path_b_cnt[id]++; +} + +void phydm_pathdiv_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + char help[] = "-h"; + u32 used = *_used; + u32 out_len = *_out_len; + u32 val[10] = {0}; + u8 i, input_idx = 0; + + for (i = 0; i < 5; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &val[i]); + input_idx++; + } + } + + if (input_idx == 0) + return; + + PHYDM_SSCANF(input[1], DCMD_HEX, &val[0]); + PHYDM_SSCANF(input[2], DCMD_HEX, &val[1]); + + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "{1:TX Ctrl Sig} {0:BB, 1:MAC}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{2:BB Default TX REG} {path}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{3:MAC DESC TX} {path} {macid}\n"); + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + PDM_SNPF(out_len, used, output + used, out_len - used, + "{4:MAC Resp TX} {path} {macid}\n"); + #endif + PDM_SNPF(out_len, used, output + used, out_len - used, + "{5:Fix 1ss path} {ofdm path} {cck path}\n"); + } else if (val[0] == 1) { + phydm_tx_path_by_mac_or_reg(dm, (enum phydm_path_ctrl)val[1]); + } else if (val[0] == 2) { + phydm_set_tx_path_by_bb_reg(dm, (enum bb_path)val[1]); + } else if (val[0] == 3) { + p_div->path_sel[val[2]] = (enum bb_path)val[1]; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + } else if (val[0] == 4) { + phydm_set_resp_tx_path_by_fw_jgr3(dm, (u8)val[2], + (enum bb_path)val[1], true); + #endif + } else if (val[0] == 5) { + phydm_fix_1ss_tx_path_by_bb_reg(dm, (enum bb_path)val[1], + (enum bb_path)val[2]); + } + *_used = used; + *_out_len = out_len; +} + +void phydm_c2h_dtp_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; + + u8 macid = cmd_buf[0]; + u8 target = cmd_buf[1]; + u8 nsc_1 = cmd_buf[2]; + u8 nsc_2 = cmd_buf[3]; + u8 nsc_3 = cmd_buf[4]; PHYDM_DBG(dm, DBG_PATH_DIV, "Target_candidate = (( %d ))\n", target); - /* +/*@ if( (nsc_1 >= nsc_2) && (nsc_1 >= nsc_3)) { - phydm_dtp_fix_tx_path(dm, dm_path_div->ant_candidate_1); + phydm_dtp_fix_tx_path(dm, p_div->ant_candidate_1); } else if( nsc_2 >= nsc_3) { - phydm_dtp_fix_tx_path(dm, dm_path_div->ant_candidate_2); + phydm_dtp_fix_tx_path(dm, p_div->ant_candidate_2); } else { - phydm_dtp_fix_tx_path(dm, dm_path_div->ant_candidate_3); + phydm_dtp_fix_tx_path(dm, p_div->ant_candidate_3); } */ -#endif } -void -odm_path_diversity( - void *dm_void -) -{ -#if (defined(CONFIG_PATH_DIVERSITY)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - - if (!(dm->support_ability & ODM_BB_PATH_DIV)) { - PHYDM_DBG(dm, DBG_PATH_DIV, "Return: Not Support PathDiv\n"); - return; - } - -#if RTL8812A_SUPPORT - - if (dm->support_ic_type & ODM_RTL8812) - odm_path_diversity_8812a(dm); - else -#endif - -#if RTL8814A_SUPPORT - if (dm->support_ic_type & ODM_RTL8814A) - phydm_dynamic_tx_path(dm); - else -#endif - {} -#endif -} - -void -phydm_path_diversity_init( - void *dm_void -) -{ -#if (defined(CONFIG_PATH_DIVERSITY)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - - /*dm->support_ability |= ODM_BB_PATH_DIV;*/ - - if (*dm->mp_mode == true) - return; - - if (!(dm->support_ability & ODM_BB_PATH_DIV)) { - PHYDM_DBG(dm, DBG_PATH_DIV, "Return: Not Support PathDiv\n"); - return; - } - -#if RTL8812A_SUPPORT - if (dm->support_ic_type & ODM_RTL8812) - odm_path_diversity_init_8812a(dm); - else -#endif - -#if RTL8814A_SUPPORT - if (dm->support_ic_type & ODM_RTL8814A) - phydm_dynamic_tx_path_init(dm); - else -#endif - {} -#endif -} - - - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -/* - * 2011/12/02 MH Copy from MP oursrc for temporarily test. - * */ - -void -odm_path_div_chk_ant_switch_callback( - struct phydm_timer_list *timer -) -{ -} - -void -odm_path_div_chk_ant_switch_workitem_callback( - void *context -) -{ -} - -void -odm_cck_tx_path_diversity_callback( - struct phydm_timer_list *timer -) -{ -} - -void -odm_cck_tx_path_diversity_work_item_callback( - void *context -) -{ -} -u8 -odm_sw_ant_div_select_scan_chnl( - void *adapter -) -{ - return 0; -} -void -odm_sw_ant_div_construct_scan_chnl( - void *adapter, - u8 scan_chnl -) -{ -} - -#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) */ +#endif /* @#ifdef CONFIG_PATH_DIVERSITY */ diff --git a/hal/phydm/phydm_pathdiv.h b/hal/phydm/phydm_pathdiv.h index 29e2078..bff58e1 100644 --- a/hal/phydm/phydm_pathdiv.h +++ b/hal/phydm/phydm_pathdiv.h @@ -23,24 +23,24 @@ * *****************************************************************************/ -#ifndef __PHYDMPATHDIV_H__ -#define __PHYDMPATHDIV_H__ -/*#define PATHDIV_VERSION "2.0" //2014.11.04*/ -#define PATHDIV_VERSION "3.1" /*2015.07.29 by YuChen*/ +#ifndef __PHYDMPATHDIV_H__ +#define __PHYDMPATHDIV_H__ -#if (defined(CONFIG_PATH_DIVERSITY)) -#define USE_PATH_A_AS_DEFAULT_ANT /* for 8814 dynamic TX path selection */ +#ifdef CONFIG_PATH_DIVERSITY +#define PATHDIV_VERSION "4.1" /* @ modify the condition of by reg*/ -#define NUM_RESET_DTP_PERIOD 5 -#define ANT_DECT_RSSI_TH 3 +#define USE_PATH_A_AS_DEFAULT_ANT /* @for 8814 dynamic TX path selection */ + +#define NUM_RESET_DTP_PERIOD 5 +#define ANT_DECT_RSSI_TH 3 #define PATH_A 1 #define PATH_B 2 #define PATH_C 3 #define PATH_D 4 -#define PHYDM_AUTO_PATH 0 -#define PHYDM_FIX_PATH 1 +#define PHYDM_AUTO_PATH 0 +#define PHYDM_FIX_PATH 1 #define NUM_CHOOSE2_FROM4 6 #define NUM_CHOOSE3_FROM4 4 @@ -48,7 +48,6 @@ enum phydm_dtp_state { PHYDM_DTP_INIT = 1, PHYDM_DTP_RUNNING_1 - }; enum phydm_path_div_type { @@ -56,21 +55,34 @@ enum phydm_path_div_type { PHYDM_4R_PATH_DIV = 2 }; -void -phydm_process_rssi_for_path_div( - void *dm_void, - void *phy_info_void, - void *pkt_info_void -); +enum phydm_path_ctrl { + TX_PATH_BY_REG = 0, + TX_PATH_BY_DESC = 1, + TX_PATH_CTRL_INIT +}; + +struct path_txdesc_ctrl { + u8 ant_map_a : 2; + u8 ant_map_b : 2; + u8 ntx_map : 4; +}; struct _ODM_PATH_DIVERSITY_ { - u8 resp_tx_path; - u8 path_sel[ODM_ASSOCIATE_ENTRY_NUM]; + boolean stop_path_div; /*@Limit by enabled path number*/ + boolean path_div_in_progress; + boolean cck_fix_path_en; /*@ BB Reg for Adv-Ctrl (or debug mode)*/ + boolean ofdm_fix_path_en; /*@ BB Reg for Adv-Ctrl (or debug mode)*/ + enum bb_path cck_fix_path_sel; /*@ BB Reg for Adv-Ctrl (or debug mode)*/ + enum bb_path ofdm_fix_path_sel;/*@ BB Reg for Adv-Ctrl (or debug mode)*/ + enum phydm_path_ctrl tx_path_ctrl; + enum bb_path default_tx_path; + enum bb_path path_sel[ODM_ASSOCIATE_ENTRY_NUM]; u32 path_a_sum[ODM_ASSOCIATE_ENTRY_NUM]; u32 path_b_sum[ODM_ASSOCIATE_ENTRY_NUM]; u16 path_a_cnt[ODM_ASSOCIATE_ENTRY_NUM]; u16 path_b_cnt[ODM_ASSOCIATE_ENTRY_NUM]; u8 phydm_path_div_type; + boolean force_update; #if RTL8814A_SUPPORT u32 path_a_sum_all; @@ -100,205 +112,28 @@ struct _ODM_PATH_DIVERSITY_ { u8 pre_tx_path; u8 use_path_a_as_default_ant; - boolean is_path_a_exist; + boolean is_path_a_exist; #endif }; +void phydm_set_tx_path_by_bb_reg(void *dm_void, enum bb_path tx_path_sel_1ss); -#endif /* #if(defined(CONFIG_PATH_DIVERSITY)) */ +void phydm_get_tx_path_txdesc_jgr3(void *dm_void, u8 macid, + struct path_txdesc_ctrl *desc); -void -phydm_c2h_dtp_handler( - void *dm_void, - u8 *cmd_buf, - u8 cmd_len -); +void phydm_c2h_dtp_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len); -void -phydm_path_diversity_init( - void *dm_void -); +void phydm_tx_path_diversity_init(void *dm_void); -void -odm_path_diversity( - void *dm_void -); +void phydm_tx_path_diversity(void *dm_void); -void -odm_pathdiv_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -); +void phydm_process_rssi_for_path_div(void *dm_void, void *phy_info_void, + void *pkt_info_void); +void phydm_pathdiv_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); +#endif /* @#ifdef CONFIG_PATH_DIVERSITY */ +#endif /* @#ifndef __PHYDMPATHDIV_H__ */ -/* 1 [OLD IC]-------------------------------------------------------------------------------- */ - - - - - - -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) - -/* #define PATHDIV_ENABLE 1 */ -#define dm_path_div_rssi_check odm_path_div_chk_per_pkt_rssi -#define path_div_check_before_link8192c odm_path_diversity_before_link92c - - - - -struct _path_div_parameter_define_ { - u32 org_5g_rege30; - u32 org_5g_regc14; - u32 org_5g_regca0; - u32 swt_5g_rege30; - u32 swt_5g_regc14; - u32 swt_5g_regca0; - /* for 2G IQK information */ - u32 org_2g_regc80; - u32 org_2g_regc4c; - u32 org_2g_regc94; - u32 org_2g_regc14; - u32 org_2g_regca0; - - u32 swt_2g_regc80; - u32 swt_2g_regc4c; - u32 swt_2g_regc94; - u32 swt_2g_regc14; - u32 swt_2g_regca0; -}; - -void -odm_path_diversity_init_92c( - void *adapter -); - -void -odm_2t_path_diversity_init_92c( - void *adapter -); - -void -odm_1t_path_diversity_init_92c( - void *adapter -); - -boolean -odm_is_connected_92c( - void *adapter -); - -boolean -odm_path_diversity_before_link92c( - /* struct void* adapter */ - struct dm_struct *dm -); - -void -odm_path_diversity_after_link_92c( - void *adapter -); - -void -odm_set_resp_path_92c( - void *adapter, - u8 default_resp_path -); - -void -odm_ofdm_tx_path_diversity_92c( - void *adapter -); - -void -odm_cck_tx_path_diversity_92c( - void *adapter -); - -void -odm_reset_path_diversity_92c( - void *adapter -); - -void -odm_cck_tx_path_diversity_callback( - struct phydm_timer_list *timer -); - -void -odm_cck_tx_path_diversity_work_item_callback( - void *context -); - -void -odm_path_div_chk_ant_switch_callback( - struct phydm_timer_list *timer -); - -void -odm_path_div_chk_ant_switch_workitem_callback( - void *context -); - - -void -odm_path_div_chk_ant_switch( - struct dm_struct *dm -); - -void -odm_cck_path_diversity_chk_per_pkt_rssi( - void *adapter, - boolean is_def_port, - boolean is_match_bssid, - struct _WLAN_STA *entry, - PRT_RFD rfd, - u8 *desc -); - -void -odm_path_div_chk_per_pkt_rssi( - void *adapter, - boolean is_def_port, - boolean is_match_bssid, - struct _WLAN_STA *entry, - PRT_RFD rfd -); - -void -odm_path_div_rest_after_link( - struct dm_struct *dm -); - -void -odm_fill_tx_path_in_txdesc( - void *adapter, - PRT_TCB tcb, - u8 *desc -); - -void -odm_path_div_init_92d( - struct dm_struct *dm -); - -u8 -odm_sw_ant_div_select_scan_chnl( - void *adapter -); - -void -odm_sw_ant_div_construct_scan_chnl( - void *adapter, - u8 scan_chnl -); - -#endif /* #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) */ - - -#endif /* #ifndef __ODMPATHDIV_H__ */ diff --git a/hal/phydm/phydm_phystatus.c b/hal/phydm/phydm_phystatus.c index b87a144..2215007 100644 --- a/hal/phydm/phydm_phystatus.c +++ b/hal/phydm/phydm_phystatus.c @@ -23,215 +23,354 @@ * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" -void -phydm_rx_statistic_cal( - struct dm_struct *phydm, - struct phydm_phyinfo_struct *phy_info, - u8 *phy_status_inf, - struct phydm_perpkt_info_struct *pktinfo -) +#ifdef PHYDM_COMPILE_MU +u8 phydm_get_gid(struct dm_struct *dm, u8 *phy_status_inf) { -#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) - struct phy_status_rpt_jaguar2_type1 *phy_sta_rpt = (struct phy_status_rpt_jaguar2_type1 *)phy_status_inf; - u8 phy_status_type = (*phy_status_inf & 0xf); +#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) + struct phy_sts_rpt_jgr2_type1 *rpt_jgr2 = NULL; #endif - u8 date_rate = (pktinfo->data_rate & 0x7f); - u8 bw_idx = phy_info->band_width ; +#ifdef PHYSTS_3RD_TYPE_SUPPORT + struct phy_sts_rpt_jgr3_type1 *rpt_jgr3 = NULL; +#endif + u8 gid = 0; - if (date_rate <= ODM_RATE54M) { - phydm->phy_dbg_info.num_qry_legacy_pkt[date_rate]++; - /**/ - } else if (date_rate <= ODM_RATEMCS31) { - phydm->phy_dbg_info.ht_pkt_not_zero = true; + if (dm->ic_phy_sts_type == PHYDM_PHYSTS_TYPE_1) + return 0; - if (phydm->support_ic_type & PHYSTS_2ND_TYPE_IC) { - if ((bw_idx == *phydm->band_width)) { - - phydm->phy_dbg_info.num_qry_ht_pkt[date_rate - ODM_RATEMCS0]++; + if ((*phy_status_inf & 0xf) != 1) + return 0; + + switch (dm->ic_phy_sts_type) { + #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) + case PHYDM_PHYSTS_TYPE_2: + rpt_jgr2 = (struct phy_sts_rpt_jgr2_type1 *)phy_status_inf; + gid = rpt_jgr2->gid; + break; + #endif + #ifdef PHYSTS_3RD_TYPE_SUPPORT + case PHYDM_PHYSTS_TYPE_3: + rpt_jgr3 = (struct phy_sts_rpt_jgr3_type1 *)phy_status_inf; + gid = rpt_jgr3->gid; + break; + #endif + default: + break; + } + + return gid; +} +#endif + +void phydm_rx_statistic_cal(struct dm_struct *dm, + struct phydm_phyinfo_struct *phy_info, + u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo) +{ + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + struct phydm_bf_rate_info_jgr3 *bfrateinfo = &dm->bf_rate_info_jgr3; +#endif + + u8 rate = (pktinfo->data_rate & 0x7f); + u8 bw_idx = phy_info->band_width; + u8 offset = 0; + u8 gid = 0; +#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT)) + u8 val = 0; +#endif + #ifdef PHYDM_COMPILE_MU + u8 is_mu_pkt = 0; + #endif + + if (rate <= ODM_RATE54M) { + dbg_i->num_qry_legacy_pkt[rate]++; + } else if (rate <= ODM_RATEMCS31) { + dbg_i->ht_pkt_not_zero = true; + offset = rate - ODM_RATEMCS0; + + if (offset > (HT_RATE_NUM - 1)) + offset = HT_RATE_NUM - 1; + + if (dm->support_ic_type & + (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC)) { + if (bw_idx == *dm->band_width) { + dbg_i->num_qry_ht_pkt[offset]++; } else if (bw_idx == CHANNEL_WIDTH_20) { - - phydm->phy_dbg_info.num_qry_pkt_sc_20m[date_rate - ODM_RATEMCS0]++; - phydm->phy_dbg_info.low_bw_20_occur = true; + dbg_i->num_qry_pkt_sc_20m[offset]++; + dbg_i->low_bw_20_occur = true; } } else { - phydm->phy_dbg_info.num_qry_ht_pkt[date_rate - ODM_RATEMCS0]++; + dbg_i->num_qry_ht_pkt[offset]++; } } - #if ODM_IC_11AC_SERIES_SUPPORT - else if (date_rate <= ODM_RATEVHTSS4MCS9) { - #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) - if ((phy_status_type == 1) && - (phy_sta_rpt->gid != 0) && - (phy_sta_rpt->gid != 63) && - (phydm->support_ic_type & PHYSTS_2ND_TYPE_IC)) { - phydm->phy_dbg_info.num_qry_mu_vht_pkt[date_rate - ODM_RATEVHTSS1MCS0]++; - if (pktinfo->ppdu_cnt < 4) { - phydm->phy_dbg_info.num_of_ppdu[pktinfo->ppdu_cnt] = date_rate | BIT(7); - phydm->phy_dbg_info.gid_num[pktinfo->ppdu_cnt] = phy_sta_rpt->gid; - } +#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT)) + else if (rate <= ODM_RATEVHTSS4MCS9) { + offset = rate - ODM_RATEVHTSS1MCS0; + + if (offset > (VHT_RATE_NUM - 1)) + offset = VHT_RATE_NUM - 1; + + #ifdef PHYDM_COMPILE_MU + gid = phydm_get_gid(dm, phy_status_inf); + + if (gid != 0 && gid != 63) + is_mu_pkt = true; + + if (is_mu_pkt) { + #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT ||\ + (defined(PHYSTS_3RD_TYPE_SUPPORT))) + dbg_i->num_mu_vht_pkt[offset]++; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + bfrateinfo->num_mu_vht_pkt[offset]++; + #endif + #else + dbg_i->num_qry_vht_pkt[offset]++; /*@for debug*/ + #endif } else #endif { - phydm->phy_dbg_info.vht_pkt_not_zero = true; - - if (phydm->support_ic_type & PHYSTS_2ND_TYPE_IC) { - if ((bw_idx == *phydm->band_width)) { - phydm->phy_dbg_info.num_qry_vht_pkt[date_rate - ODM_RATEVHTSS1MCS0]++; + dbg_i->vht_pkt_not_zero = true; + + if (dm->support_ic_type & + (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC)) { + if (bw_idx == *dm->band_width) { + dbg_i->num_qry_vht_pkt[offset]++; + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + bfrateinfo->num_qry_vht_pkt[offset]++; + #endif } else if (bw_idx == CHANNEL_WIDTH_20) { - phydm->phy_dbg_info.num_qry_pkt_sc_20m[date_rate - ODM_RATEVHTSS1MCS0]++; - phydm->phy_dbg_info.low_bw_20_occur = true; - } else /*if (bw_idx == CHANNEL_WIDTH_40)*/ { - phydm->phy_dbg_info.num_qry_pkt_sc_40m[date_rate - ODM_RATEVHTSS1MCS0]++; - phydm->phy_dbg_info.low_bw_40_occur = true; + dbg_i->num_qry_pkt_sc_20m[offset]++; + dbg_i->low_bw_20_occur = true; + } else {/*@if (bw_idx == CHANNEL_WIDTH_40)*/ + dbg_i->num_qry_pkt_sc_40m[offset]++; + dbg_i->low_bw_40_occur = true; } } else { - phydm->phy_dbg_info.num_qry_vht_pkt[date_rate - ODM_RATEVHTSS1MCS0]++; + dbg_i->num_qry_vht_pkt[offset]++; } - - #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) - if (pktinfo->ppdu_cnt < 4) { - phydm->phy_dbg_info.num_of_ppdu[pktinfo->ppdu_cnt] = date_rate; - phydm->phy_dbg_info.gid_num[pktinfo->ppdu_cnt] = phy_sta_rpt->gid; - } - #endif } + + #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT ||\ + (defined(PHYSTS_3RD_TYPE_SUPPORT))) + if (pktinfo->ppdu_cnt < 4) { + val = rate; + + #ifdef PHYDM_COMPILE_MU + if (is_mu_pkt) + val |= BIT(7); + #endif + + dbg_i->num_of_ppdu[pktinfo->ppdu_cnt] = val; + dbg_i->gid_num[pktinfo->ppdu_cnt] = gid; + } + #endif } - #endif +#endif } -void -phydm_reset_phystatus_avg( - struct dm_struct *dm -) +void phydm_reset_phystatus_avg(struct dm_struct *dm) { - struct phydm_phystatus_avg *dbg_avg = &dm->phy_dbg_info.phystatus_statistic_avg; + struct phydm_phystatus_avg *dbg_avg = NULL; + dbg_avg = &dm->phy_dbg_info.phystatus_statistic_avg; odm_memory_set(dm, &dbg_avg->rssi_cck_avg, 0, sizeof(struct phydm_phystatus_avg)); } -void -phydm_reset_phystatus_statistic( - struct dm_struct *dm -) +void phydm_reset_phystatus_statistic(struct dm_struct *dm) { - struct phydm_phystatus_statistic *dbg_statistic = &dm->phy_dbg_info.phystatus_statistic_info; + struct phydm_phystatus_statistic *dbg_s = NULL; - odm_memory_set(dm, &dbg_statistic->rssi_cck_sum, 0, + dbg_s = &dm->phy_dbg_info.physts_statistic_info; + + odm_memory_set(dm, &dbg_s->rssi_cck_sum, 0, sizeof(struct phydm_phystatus_statistic)); } -void -phydm_avg_phystatus_index( - struct dm_struct *dm, - struct phydm_phyinfo_struct *phy_info, - struct phydm_perpkt_info_struct *pktinfo -) +void phydm_avg_phystatus_index(void *dm_void, + struct phydm_phyinfo_struct *phy_info, + struct phydm_perpkt_info_struct *pktinfo) { - struct phydm_phystatus_statistic *dbg_statistic = &dm->phy_dbg_info.phystatus_statistic_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; + u8 rssi[PHYSTS_PATH_NUM] = {0}; + u8 evm[PHYSTS_PATH_NUM] = {0}; + s8 snr[PHYSTS_PATH_NUM] = {0}; + u32 size = PHYSTS_PATH_NUM; /*size of path=4*/ + u16 size_th = PHY_HIST_SIZE - 1; /*size of threshold*/ + u16 val = 0, intvl = 0; + u8 i = 0; + + odm_move_memory(dm, rssi, phy_info->rx_mimo_signal_strength, size); + odm_move_memory(dm, evm, phy_info->rx_mimo_evm_dbm, size); + odm_move_memory(dm, snr, phy_info->rx_snr, size); + + if (pktinfo->is_packet_beacon) { + dbg_s->rssi_beacon_sum += rssi[0]; + dbg_s->rssi_beacon_cnt++; + } if (pktinfo->data_rate <= ODM_RATE11M) { /*RSSI*/ - dbg_statistic->rssi_cck_sum += phy_info->rx_mimo_signal_strength[0]; - dbg_statistic->rssi_cck_cnt++; + dbg_s->rssi_cck_sum += rssi[0]; + dbg_s->rssi_cck_cnt++; } else if (pktinfo->data_rate <= ODM_RATE54M) { - /*evm*/ - dbg_statistic->evm_ofdm_sum += phy_info->rx_mimo_evm_dbm[0]; + for (i = 0; i < dm->num_rf_path; i++) { + /*SNR & RSSI*/ + dbg_s->snr_ofdm_sum[i] += snr[i]; + dbg_s->rssi_ofdm_sum[i] += rssi[i]; + } + /*@evm*/ + dbg_s->evm_ofdm_sum += evm[0]; + dbg_s->rssi_ofdm_cnt++; - /*SNR*/ - dbg_statistic->snr_ofdm_sum += phy_info->rx_snr[0]; + val = (u16)evm[0]; + intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th, size_th); + dbg_s->evm_ofdm_hist[intvl]++; + + val = (u16)snr[0]; + intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th, size_th); + dbg_s->snr_ofdm_hist[intvl]++; - /*RSSI*/ - dbg_statistic->rssi_ofdm_sum += phy_info->rx_mimo_signal_strength[0]; - dbg_statistic->rssi_ofdm_cnt++; } else if (pktinfo->rate_ss == 1) { - /*evm*/ - dbg_statistic->evm_1ss_sum += phy_info->rx_mimo_evm_dbm[0]; +/*@===[1-SS]==================================================================*/ + for (i = 0; i < dm->num_rf_path; i++) { + /*SNR & RSSI*/ + dbg_s->snr_1ss_sum[i] += snr[i]; + dbg_s->rssi_1ss_sum[i] += rssi[i]; + } - /*SNR*/ - dbg_statistic->snr_1ss_sum += phy_info->rx_snr[0]; + /*@evm*/ + dbg_s->evm_1ss_sum += evm[0]; + /*@EVM Histogram*/ + val = (u16)evm[0]; + intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th, size_th); + dbg_s->evm_1ss_hist[intvl]++; - dbg_statistic->rssi_1ss_sum += phy_info->rx_mimo_signal_strength[0]; - dbg_statistic->rssi_1ss_cnt++; + /*SNR Histogram*/ + val = (u16)snr[0]; + intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th, size_th); + dbg_s->snr_1ss_hist[intvl]++; + + dbg_s->rssi_1ss_cnt++; } else if (pktinfo->rate_ss == 2) { +/*@===[2-SS]==================================================================*/ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) - /*evm*/ - dbg_statistic->evm_2ss_sum[0] += phy_info->rx_mimo_evm_dbm[0]; - dbg_statistic->evm_2ss_sum[1] += phy_info->rx_mimo_evm_dbm[1]; + for (i = 0; i < dm->num_rf_path; i++) { + /*SNR & RSSI*/ + dbg_s->snr_2ss_sum[i] += snr[i]; + dbg_s->rssi_2ss_sum[i] += rssi[i]; + } - /*SNR*/ - dbg_statistic->snr_2ss_sum[0] += phy_info->rx_snr[0]; - dbg_statistic->snr_2ss_sum[1] += phy_info->rx_snr[1]; + for (i = 0; i < pktinfo->rate_ss; i++) { + /*@evm*/ + dbg_s->evm_2ss_sum[i] += evm[i]; + /*@EVM Histogram*/ + val = (u16)evm[i]; + intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th, + size_th); + dbg_s->evm_2ss_hist[i][intvl]++; - /*RSSI*/ - dbg_statistic->rssi_2ss_sum[0] += phy_info->rx_mimo_signal_strength[0]; - dbg_statistic->rssi_2ss_sum[1] += phy_info->rx_mimo_signal_strength[1]; - dbg_statistic->rssi_2ss_cnt++; + /*SNR Histogram*/ + val = (u16)snr[i]; + intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th, + size_th); + dbg_s->snr_2ss_hist[i][intvl]++; + } + dbg_s->rssi_2ss_cnt++; #endif } else if (pktinfo->rate_ss == 3) { +/*@===[3-SS]==================================================================*/ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) - /*evm*/ - dbg_statistic->evm_3ss_sum[0] += phy_info->rx_mimo_evm_dbm[0]; - dbg_statistic->evm_3ss_sum[1] += phy_info->rx_mimo_evm_dbm[1]; - dbg_statistic->evm_3ss_sum[2] += phy_info->rx_mimo_evm_dbm[2]; + for (i = 0; i < dm->num_rf_path; i++) { + /*SNR & RSSI*/ + dbg_s->snr_3ss_sum[i] += snr[i]; + dbg_s->rssi_3ss_sum[i] += rssi[i]; + } - /*SNR*/ - dbg_statistic->snr_3ss_sum[0] += phy_info->rx_snr[0]; - dbg_statistic->snr_3ss_sum[1] += phy_info->rx_snr[1]; - dbg_statistic->snr_3ss_sum[2] += phy_info->rx_snr[2]; + for (i = 0; i < pktinfo->rate_ss; i++) { + /*@evm*/ + dbg_s->evm_3ss_sum[i] += evm[i]; + /*@EVM Histogram*/ + val = (u16)evm[i]; + intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th, + size_th); + dbg_s->evm_3ss_hist[i][intvl]++; - /*RSSI*/ - dbg_statistic->rssi_3ss_sum[0] += phy_info->rx_mimo_signal_strength[0]; - dbg_statistic->rssi_3ss_sum[1] += phy_info->rx_mimo_signal_strength[1]; - dbg_statistic->rssi_3ss_sum[2] += phy_info->rx_mimo_signal_strength[2]; - dbg_statistic->rssi_3ss_cnt++; + /*SNR Histogram*/ + val = (u16)snr[i]; + intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th, + size_th); + dbg_s->snr_3ss_hist[i][intvl]++; + } + dbg_s->rssi_3ss_cnt++; #endif } else if (pktinfo->rate_ss == 4) { +/*@===[4-SS]==================================================================*/ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) - /*evm*/ - dbg_statistic->evm_4ss_sum[0] += phy_info->rx_mimo_evm_dbm[0]; - dbg_statistic->evm_4ss_sum[1] += phy_info->rx_mimo_evm_dbm[1]; - dbg_statistic->evm_4ss_sum[2] += phy_info->rx_mimo_evm_dbm[2]; - dbg_statistic->evm_4ss_sum[3] += phy_info->rx_mimo_evm_dbm[3]; + for (i = 0; i < dm->num_rf_path; i++) { + /*SNR & RSSI*/ + dbg_s->snr_4ss_sum[i] += snr[i]; + dbg_s->rssi_4ss_sum[i] += rssi[i]; + } - /*SNR*/ - dbg_statistic->snr_4ss_sum[0] += phy_info->rx_snr[0]; - dbg_statistic->snr_4ss_sum[1] += phy_info->rx_snr[1]; - dbg_statistic->snr_4ss_sum[2] += phy_info->rx_snr[2]; - dbg_statistic->snr_4ss_sum[3] += phy_info->rx_snr[3]; + for (i = 0; i < pktinfo->rate_ss; i++) { + /*@evm*/ + dbg_s->evm_4ss_sum[i] += evm[i]; - /*RSSI*/ - dbg_statistic->rssi_4ss_sum[0] += phy_info->rx_mimo_signal_strength[0]; - dbg_statistic->rssi_4ss_sum[1] += phy_info->rx_mimo_signal_strength[1]; - dbg_statistic->rssi_4ss_sum[2] += phy_info->rx_mimo_signal_strength[2]; - dbg_statistic->rssi_4ss_sum[3] += phy_info->rx_mimo_signal_strength[3]; - dbg_statistic->rssi_4ss_cnt++; + /*@EVM Histogram*/ + val = (u16)evm[i]; + intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th, + size_th); + dbg_s->evm_4ss_hist[i][intvl]++; + + /*SNR Histogram*/ + val = (u16)snr[i]; + intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th, + size_th); + dbg_s->snr_4ss_hist[i][intvl]++; + } + dbg_s->rssi_4ss_cnt++; #endif } } -u8 phydm_get_signal_quality( - struct phydm_phyinfo_struct *phy_info, - struct dm_struct *dm, - struct phy_status_rpt_8192cd *phy_sta_rpt - ) +void phydm_avg_phystatus_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + u16 snr_hist_th[PHY_HIST_SIZE - 1] = {5, 8, 11, 14, 17, 20, 23, 26, + 29, 32, 35}; + u16 evm_hist_th[PHY_HIST_SIZE - 1] = {5, 8, 11, 14, 17, 20, 23, 26, + 29, 32, 35}; + u32 size = (PHY_HIST_SIZE - 1) * 2; + + odm_move_memory(dm, dbg_i->snr_hist_th, snr_hist_th, size); + odm_move_memory(dm, dbg_i->evm_hist_th, evm_hist_th, size); +} + +u8 phydm_get_signal_quality(struct phydm_phyinfo_struct *phy_info, + struct dm_struct *dm, + struct phy_status_rpt_8192cd *phy_sts) { u8 sq_rpt; u8 result = 0; - if (phy_info->rx_pwdb_all > 40 && !dm->is_in_hct_test) + if (phy_info->rx_pwdb_all > 40 && !dm->is_in_hct_test) { result = 100; - else { - sq_rpt = phy_sta_rpt->cck_sig_qual_ofdm_pwdb_all; + } else { + sq_rpt = phy_sts->cck_sig_qual_ofdm_pwdb_all; if (sq_rpt > 64) result = 0; @@ -239,38 +378,30 @@ u8 phydm_get_signal_quality( result = 100; else result = ((64 - sq_rpt) * 100) / 44; - } return result; } -u8 -phydm_query_rx_pwr_percentage( - s8 ant_power -) +u8 phydm_pwr_2_percent(s8 ant_power) { - if ((ant_power <= -100) || (ant_power >= 20)) - return 0; + if ((ant_power <= -100) || ant_power >= 20) + return 0; else if (ant_power >= 0) - return 100; + return 100; else return 100 + ant_power; } +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -s32 -phydm_signal_scale_mapping_92c_series( - struct dm_struct *dm, - s32 curr_sig -) +#if 0 /*(DM_ODM_SUPPORT_TYPE == ODM_CE)*/ +s32 phydm_signal_scale_mapping_92c_series(struct dm_struct *dm, s32 curr_sig) { s32 ret_sig = 0; + #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) - if (dm->support_interface == ODM_ITRF_PCIE) { + if (dm->support_interface == ODM_ITRF_PCIE) { /* step 1. Scale mapping. */ if (curr_sig >= 61 && curr_sig <= 100) ret_sig = 90 + ((curr_sig - 60) / 4); @@ -296,7 +427,8 @@ phydm_signal_scale_mapping_92c_series( #endif #if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) - if ((dm->support_interface == ODM_ITRF_USB) || (dm->support_interface == ODM_ITRF_SDIO)) { + if (dm->support_interface == ODM_ITRF_USB || + dm->support_interface == ODM_ITRF_SDIO) { if (curr_sig >= 51 && curr_sig <= 100) ret_sig = 100; else if (curr_sig >= 41 && curr_sig <= 50) @@ -319,141 +451,139 @@ phydm_signal_scale_mapping_92c_series( return ret_sig; } -s32 -phydm_signal_scale_mapping( - struct dm_struct *dm, - s32 curr_sig -) +s32 phydm_signal_scale_mapping(struct dm_struct *dm, s32 curr_sig) { - #ifdef CONFIG_SIGNAL_SCALE_MAPPING - return phydm_signal_scale_mapping_92c_series(dm, curr_sig); - #else - return curr_sig; - #endif - +#ifdef CONFIG_SIGNAL_SCALE_MAPPING + return phydm_signal_scale_mapping_92c_series(dm, curr_sig); +#else + return curr_sig; +#endif } #endif -void -phydm_process_signal_strength( - struct dm_struct *dm, - struct phydm_phyinfo_struct *phy_info, - struct phydm_perpkt_info_struct *pktinfo -) +void phydm_process_signal_strength(struct dm_struct *dm, + struct phydm_phyinfo_struct *phy_info, + struct phydm_perpkt_info_struct *pktinfo) { - u8 avg_rssi = 0, tmp_rssi = 0, best_rssi = 0, second_rssi = 0; - u8 i; + u8 avg_rssi = 0, tmp_rssi = 0, best_rssi = 0, second_rssi = 0; + u8 ss = 0; /*signal strenth after scale mapping*/ + u8 pwdb = phy_info->rx_pwdb_all; + u8 i; - /* 2015/01 Sean, use the best two RSSI only, suggested by Ynlin and ChenYu.*/ + /*use the best two RSSI only*/ for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { - tmp_rssi = phy_info->rx_mimo_signal_strength[i]; - /*Get the best two RSSI*/ + /*@Get the best two RSSI*/ if (tmp_rssi > best_rssi && tmp_rssi > second_rssi) { second_rssi = best_rssi; best_rssi = tmp_rssi; - } else if (tmp_rssi > second_rssi && tmp_rssi <= best_rssi) + } else if (tmp_rssi > second_rssi && tmp_rssi <= best_rssi) { second_rssi = tmp_rssi; + } } if (best_rssi == 0) return; - avg_rssi = (pktinfo->rate_ss == 1) ? best_rssi : ((best_rssi + second_rssi) >> 1); + if (pktinfo->rate_ss == 1) + avg_rssi = best_rssi; + else + avg_rssi = (best_rssi + second_rssi) >> 1; - if (dm->support_ic_type & PHYSTS_2ND_TYPE_IC) { - #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) - - /* Update signal strength to UI, and phy_info->rx_pwdb_all is the maximum RSSI of all path */ - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - phy_info->signal_strength = SignalScaleProc((PADAPTER)dm->adapter, phy_info->rx_pwdb_all, false, false); + if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) { + #ifdef PHYSTS_3RD_TYPE_SUPPORT + /* Update signal strength to UI, + * and phy_info->rx_pwdb_all is the maximum RSSI of all path + */ + #if 1 /*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ + ss = SignalScaleProc(dm->adapter, pwdb, false, false); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - phy_info->signal_strength = (u8)(phydm_signal_scale_mapping(dm, phy_info->rx_pwdb_all)); + ss = (u8)phydm_signal_scale_mapping(dm, pwdb); + #elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) + ss = (u8)phydm_signal_scale_mapping(dm, pwdb); + #endif + + #endif + } else if (dm->support_ic_type & PHYSTS_2ND_TYPE_IC) { + #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) + /* Update signal strength to UI, + * and phy_info->rx_pwdb_all is the maximum RSSI of all path + */ + #if 1 /*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ + ss = SignalScaleProc(dm->adapter, pwdb, false, false); + #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + ss = (u8)phydm_signal_scale_mapping(dm, pwdb); #endif #endif } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - #if ODM_IC_11AC_SERIES_SUPPORT - - /*UI BSS List signal strength(in percentage), make it good looking, from 0~100.*/ - /*It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().*/ - if (pktinfo->is_cck_rate) { - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - /*2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/ - phy_info->signal_strength = SignalScaleProc((PADAPTER)dm->adapter, phy_info->rx_pwdb_all, false, true); + #if ODM_IC_11AC_SERIES_SUPPORT + if (pktinfo->is_cck_rate) + #if 1/*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ + ss = SignalScaleProc(dm->adapter, pwdb, 0, 1); #else - phy_info->signal_strength = (u8)(phydm_signal_scale_mapping(dm, phy_info->rx_pwdb_all));/*pwdb_all;*/ + ss = (u8)phydm_signal_scale_mapping(dm, pwdb); #endif - } else { - - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - /* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/ - phy_info->signal_strength = SignalScaleProc((PADAPTER)dm->adapter, avg_rssi, false, false); + else + #if 1 /*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ + ss = SignalScaleProc(dm->adapter, avg_rssi, 0, 1); #else - phy_info->signal_strength = (u8)(phydm_signal_scale_mapping(dm, avg_rssi)); + ss = (u8)phydm_signal_scale_mapping(dm, avg_rssi); #endif - } #endif } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { - #if ODM_IC_11N_SERIES_SUPPORT - - /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */ - /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */ - if (pktinfo->is_cck_rate) { - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - /* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ */ - phy_info->signal_strength = SignalScaleProc((PADAPTER)dm->adapter, phy_info->rx_pwdb_all, true, true); + #if ODM_IC_11N_SERIES_SUPPORT + if (pktinfo->is_cck_rate) + #if 1/*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ + ss = SignalScaleProc(dm->adapter, pwdb, 1, 1); #else - phy_info->signal_strength = (u8)(phydm_signal_scale_mapping(dm, phy_info->rx_pwdb_all));/*pwdb_all;*/ + ss = (u8)phydm_signal_scale_mapping(dm, pwdb); #endif - } else { - - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - /* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ */ - phy_info->signal_strength = SignalScaleProc((PADAPTER)dm->adapter, avg_rssi, true, false); + else + #if 1 /*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ + ss = SignalScaleProc(dm->adapter, avg_rssi, 1, 0); #else - phy_info->signal_strength = (u8)(phydm_signal_scale_mapping(dm, avg_rssi)); + ss = (u8)phydm_signal_scale_mapping(dm, avg_rssi); #endif - } #endif } + phy_info->signal_strength = ss; } #endif #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -static u8 phydm_sq_patch_rt_cid_819x_lenovo( - struct dm_struct *dm, - u8 is_cck_rate, - u8 pwdb_all, - u8 path, - u8 RSSI -) +static u8 phydm_sq_patch_lenovo( + struct dm_struct *dm, + u8 is_cck_rate, + u8 pwdb_all, + u8 path, + u8 RSSI) { - u8 sq = 0; + u8 sq = 0; if (is_cck_rate) { - if (IS_HARDWARE_TYPE_8192E(dm->adapter)) { - /* */ - /* Expected signal strength and bars indication at Lenovo lab. 2013.04.11 */ - /* 802.11n, 802.11b, 802.11g only at channel 6 */ - /* */ - /* Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm) */ - /* 50 5 -49 */ - /* 55 5 -49 */ - /* 60 5 -50 */ - /* 65 5 -51 */ - /* 70 5 -52 */ - /* 75 5 -54 */ - /* 80 5 -55 */ - /* 85 4 -60 */ - /* 90 3 -63 */ - /* 95 3 -65 */ - /* 100 2 -67 */ - /* 102 2 -67 */ - /* 104 1 -70 */ - /* */ - + if (dm->support_ic_type & ODM_RTL8192E) { +/*@ + * + * Expected signal strength and bars indication at Lenovo lab. 2013.04.11 + * 802.11n, 802.11b, 802.11g only at channel 6 + * + * Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm) + * 50 5 -49 + * 55 5 -49 + * 60 5 -50 + * 65 5 -51 + * 70 5 -52 + * 75 5 -54 + * 80 5 -55 + * 85 4 -60 + * 90 3 -63 + * 95 3 -65 + * 100 2 -67 + * 102 2 -67 + * 104 1 -70 + */ if (pwdb_all >= 50) sq = 100; else if (pwdb_all >= 35 && pwdb_all < 50) @@ -482,7 +612,7 @@ static u8 phydm_sq_patch_rt_cid_819x_lenovo( } else { /* OFDM rate */ - if (IS_HARDWARE_TYPE_8192E(dm->adapter)) { + if (dm->support_ic_type & ODM_RTL8192E) { if (RSSI >= 45) sq = 100; else if (RSSI >= 22 && RSSI < 45) @@ -502,28 +632,20 @@ static u8 phydm_sq_patch_rt_cid_819x_lenovo( sq = 20; } } - - RT_TRACE(COMP_DBG, DBG_TRACE, ("is_cck_rate(%#d), pwdb_all(%#d), RSSI(%#d), sq(%#d)\n", is_cck_rate, pwdb_all, RSSI, sq)); - - return sq; } static u8 phydm_sq_patch_rt_cid_819x_acer( - struct dm_struct *dm, - u8 is_cck_rate, - u8 pwdb_all, - u8 path, - u8 RSSI -) + struct dm_struct *dm, + u8 is_cck_rate, + u8 pwdb_all, + u8 path, + u8 RSSI) { - u8 sq = 0; + u8 sq = 0; if (is_cck_rate) { - RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_Acer\n")); - #if OS_WIN_FROM_WIN8(OS_VERSION) - if (pwdb_all >= 50) sq = 100; else if (pwdb_all >= 35 && pwdb_all < 50) @@ -550,16 +672,14 @@ static u8 phydm_sq_patch_rt_cid_819x_acer( else sq = 10; - if (pwdb_all == 0) /* Abnormal case, do not indicate the value above 20 on Win7 */ + /* @Abnormal case, do not indicate the value above 20 on Win7 */ + if (pwdb_all == 0) sq = 20; #endif - - } else { /* OFDM rate */ - - if (IS_HARDWARE_TYPE_8192E(dm->adapter)) { + if (dm->support_ic_type & ODM_RTL8192E) { if (RSSI >= 45) sq = 100; else if (RSSI >= 22 && RSSI < 45) @@ -579,29 +699,20 @@ static u8 phydm_sq_patch_rt_cid_819x_acer( sq = 20; } } - - RT_TRACE(COMP_DBG, DBG_LOUD, ("is_cck_rate(%#d), pwdb_all(%#d), RSSI(%#d), sq(%#d)\n", is_cck_rate, pwdb_all, RSSI, sq)); - - return sq; } #endif static u8 -phydm_evm_db_to_percentage( - s8 value -) +phydm_evm_2_percent(s8 value) { - /* */ - /* -33dB~0dB to 0%~99% */ - /* */ + /* @-33dB~0dB to 0%~99% */ s8 ret_val; ret_val = value; ret_val /= 2; - /*dbg_print("value=%d\n", value);*/ - /*ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C value=%d / %x\n", ret_val, ret_val));*/ +/*@dbg_print("value=%d\n", value);*/ #ifdef ODM_EVM_ENHANCE_ANTDIV if (ret_val >= 0) ret_val = 0; @@ -628,376 +739,234 @@ phydm_evm_db_to_percentage( return (u8)ret_val; } -static u8 -phydm_evm_dbm_jaguar_series( - s8 value -) -{ - s8 ret_val = value; - - /* -33dB~0dB to 33dB ~ 0dB */ - if (ret_val == -128) - ret_val = 127; - else if (ret_val < 0) - ret_val = 0 - ret_val; - - ret_val = ret_val >> 1; - return (u8)ret_val; -} - -static s16 -phydm_cfo( - s8 value -) -{ - s16 ret_val; - - if (value < 0) { - ret_val = 0 - value; - ret_val = (ret_val << 1) + (ret_val >> 1) ; /* *2.5~=312.5/2^7 */ - ret_val = ret_val | BIT(12); /* set bit12 as 1 for negative cfo */ - } else { - ret_val = value; - ret_val = (ret_val << 1) + (ret_val >> 1) ; /* *2.5~=312.5/2^7 */ - } - return ret_val; -} - -s8 -phydm_cck_rssi_convert( - struct dm_struct *dm, - u16 lna_idx, - u8 vga_idx -) +s8 phydm_cck_rssi_convert(struct dm_struct *dm, u16 lna_idx, u8 vga_idx) { + /*@phydm_get_cck_rssi_table_from_reg*/ return (dm->cck_lna_gain_table[lna_idx] - (vga_idx << 1)); } -void -phydm_get_cck_rssi_table_from_reg( - struct dm_struct *dm -) +void phydm_get_cck_rssi_table_from_reg(struct dm_struct *dm) { - u8 used_lna_idx_tmp; - u32 reg_0xa80 = 0x7431, reg_0xabc = 0xcbe5edfd; /*example: {-53, -43, -33, -27, -19, -13, -3, 1}*/ /*{0xCB, 0xD5, 0xDF, 0xE5, 0xED, 0xF3, 0xFD, 0x2}*/ - u8 i; + u8 used_lna_idx_tmp; + u32 reg_0xa80 = 0x7431, reg_0xabc = 0xcbe5edfd; + u32 val = 0; + u8 i; + + /*@example: {-53, -43, -33, -27, -19, -13, -3, 1}*/ + /*@{0xCB, 0xD5, 0xDF, 0xE5, 0xED, 0xF3, 0xFD, 0x2}*/ PHYDM_DBG(dm, ODM_COMP_INIT, "CCK LNA Gain table init\n"); - if (!(dm->support_ic_type & (ODM_RTL8197F))) + if (!(dm->support_ic_type & ODM_RTL8197F)) return; - reg_0xa80 = odm_get_bb_reg(dm, 0xa80, 0xFFFF); - reg_0xabc = odm_get_bb_reg(dm, 0xabc, MASKDWORD); + reg_0xa80 = odm_get_bb_reg(dm, R_0xa80, 0xFFFF); + reg_0xabc = odm_get_bb_reg(dm, R_0xabc, MASKDWORD); PHYDM_DBG(dm, ODM_COMP_INIT, "reg_0xa80 = 0x%x\n", reg_0xa80); PHYDM_DBG(dm, ODM_COMP_INIT, "reg_0xabc = 0x%x\n", reg_0xabc); for (i = 0; i <= 3; i++) { - used_lna_idx_tmp = (u8)((reg_0xa80 >> (4*i)) & 0x7); - dm->cck_lna_gain_table[used_lna_idx_tmp] = (s8)((reg_0xabc >> (8*i)) & 0xff); + used_lna_idx_tmp = (u8)((reg_0xa80 >> (4 * i)) & 0x7); + val = (reg_0xabc >> (8 * i)) & 0xff; + dm->cck_lna_gain_table[used_lna_idx_tmp] = (s8)val; } - PHYDM_DBG(dm, ODM_COMP_INIT, "cck_lna_gain_table = {%d,%d,%d,%d,%d,%d,%d,%d}\n", - dm->cck_lna_gain_table[0], - dm->cck_lna_gain_table[1], - dm->cck_lna_gain_table[2], - dm->cck_lna_gain_table[3], - dm->cck_lna_gain_table[4], - dm->cck_lna_gain_table[5], - dm->cck_lna_gain_table[6], - dm->cck_lna_gain_table[7]); - + PHYDM_DBG(dm, ODM_COMP_INIT, + "cck_lna_gain_table = {%d,%d,%d,%d,%d,%d,%d,%d}\n", + dm->cck_lna_gain_table[0], dm->cck_lna_gain_table[1], + dm->cck_lna_gain_table[2], dm->cck_lna_gain_table[3], + dm->cck_lna_gain_table[4], dm->cck_lna_gain_table[5], + dm->cck_lna_gain_table[6], dm->cck_lna_gain_table[7]); } -u8 -phydm_rate_to_num_ss( - struct dm_struct *dm, - u8 data_rate -) +s8 phydm_get_cck_rssi(void *dm_void, u8 lna_idx, u8 vga_idx) { - u8 num_ss = 1; + struct dm_struct *dm = (struct dm_struct *)dm_void; + s8 rx_pow = 0; - if (data_rate <= ODM_RATE54M) - num_ss = 1; - else if (data_rate <= ODM_RATEMCS31) - num_ss = ((data_rate - ODM_RATEMCS0) >> 3) + 1; - else if (data_rate <= ODM_RATEVHTSS1MCS9) - num_ss = 1; - else if (data_rate <= ODM_RATEVHTSS2MCS9) - num_ss = 2; - else if (data_rate <= ODM_RATEVHTSS3MCS9) - num_ss = 3; - else if (data_rate <= ODM_RATEVHTSS4MCS9) - num_ss = 4; + switch (dm->support_ic_type) { + #if (RTL8197F_SUPPORT) + case ODM_RTL8197F: + rx_pow = phydm_cck_rssi_convert(dm, lna_idx, vga_idx); + break; + #endif - return num_ss; -} + #if (RTL8723D_SUPPORT) + case ODM_RTL8723D: + rx_pow = phydm_cckrssi_8723d(dm, lna_idx, vga_idx); + break; + #endif + #if (RTL8710B_SUPPORT) + case ODM_RTL8710B: + rx_pow = phydm_cckrssi_8710b(dm, lna_idx, vga_idx); + break; + #endif + #if (RTL8721D_SUPPORT) + case ODM_RTL8721D: + rx_pow = phydm_cckrssi_8721d(dm, lna_idx, vga_idx); + break; + #endif -#if (RTL8703B_SUPPORT == 1) -s8 -phydm_cck_rssi_8703B( - u16 LNA_idx, - u8 VGA_idx -) -{ - s8 rx_pwr_all = 0x00; + #if (RTL8192F_SUPPORT) + case ODM_RTL8192F: + rx_pow = phydm_cckrssi_8192f(dm, lna_idx, vga_idx); + break; + #endif - switch (LNA_idx) { - case 0xf: - rx_pwr_all = -48 - (2 * VGA_idx); + #if (RTL8821C_SUPPORT) + case ODM_RTL8821C: + rx_pow = phydm_cck_rssi_8821c(dm, lna_idx, vga_idx); break; - case 0xb: - rx_pwr_all = -42 - (2 * VGA_idx); /*TBD*/ + #endif + + #if (RTL8195B_SUPPORT) + case ODM_RTL8195B: + rx_pow = phydm_cck_rssi_8195B(dm, lna_idx, vga_idx); break; - case 0xa: - rx_pwr_all = -36 - (2 * VGA_idx); + #endif + + #if (RTL8188E_SUPPORT) + case ODM_RTL8188E: + rx_pow = phydm_cck_rssi_8188e(dm, lna_idx, vga_idx); break; - case 8: - rx_pwr_all = -32 - (2 * VGA_idx); + #endif + + #if (RTL8192E_SUPPORT) + case ODM_RTL8192E: + rx_pow = phydm_cck_rssi_8192e(dm, lna_idx, vga_idx); break; - case 7: - rx_pwr_all = -19 - (2 * VGA_idx); + #endif + + #if (RTL8723B_SUPPORT) + case ODM_RTL8723B: + rx_pow = phydm_cck_rssi_8723b(dm, lna_idx, vga_idx); break; - case 4: - rx_pwr_all = -6 - (2 * VGA_idx); + #endif + + #if (RTL8703B_SUPPORT) + case ODM_RTL8703B: + rx_pow = phydm_cck_rssi_8703b(dm, lna_idx, vga_idx); break; - case 0: - rx_pwr_all = -2 - (2 * VGA_idx); + #endif + + #if (RTL8188F_SUPPORT) + case ODM_RTL8188F: + rx_pow = phydm_cck_rssi_8188f(dm, lna_idx, vga_idx); break; + #endif + + #if (RTL8195A_SUPPORT) + case ODM_RTL8195A: + rx_pow = phydm_cck_rssi_8195a(dm, lna_idx, vga_idx); + break; + #endif + + #if (RTL8812A_SUPPORT) + case ODM_RTL8812: + rx_pow = phydm_cck_rssi_8812a(dm, lna_idx, vga_idx); + break; + #endif + + #if (RTL8821A_SUPPORT || RTL8881A_SUPPORT) + case ODM_RTL8821: + case ODM_RTL8881A: + rx_pow = phydm_cck_rssi_8821a(dm, lna_idx, vga_idx); + break; + #endif + + #if (RTL8814A_SUPPORT) + case ODM_RTL8814A: + rx_pow = phydm_cck_rssi_8814a(dm, lna_idx, vga_idx); + break; + #endif + default: - /*rx_pwr_all = -53+(2*(31-VGA_idx));*/ - /*dbg_print("wrong LNA index\n");*/ break; - - } - return rx_pwr_all; -} -#endif - -#if (RTL8195A_SUPPORT == 1) -s8 -phydm_cck_rssi_8195a( - struct dm_struct *dm, - u16 LNA_idx, - u8 VGA_idx -) -{ - s8 rx_pwr_all = 0; - s8 lna_gain = 0; - s8 lna_gain_table_0[8] = {0, -8, -15, -22, -29, -36, -45, -54}; - s8 lna_gain_table_1[8] = {0, -8, -15, -22, -29, -36, -45, -54};/*use 8195A to calibrate this table. 2016.06.24, Dino*/ - - if (dm->cck_agc_report_type == 0) - lna_gain = lna_gain_table_0[LNA_idx]; - else - lna_gain = lna_gain_table_1[LNA_idx]; - - rx_pwr_all = lna_gain - (2 * VGA_idx); - - return rx_pwr_all; -} -#endif - -#if (RTL8192E_SUPPORT == 1) -s8 -phydm_cck_rssi_8192e( - struct dm_struct *dm, - u16 LNA_idx, - u8 VGA_idx -) -{ - s8 rx_pwr_all = 0; - s8 lna_gain = 0; - s8 lna_gain_table_0[8] = {15, 9, -10, -21, -23, -27, -43, -44}; - s8 lna_gain_table_1[8] = {24, 18, 13, -4, -11, -18, -31, -36};/*use 8192EU to calibrate this table. 2015.12.15, Dino*/ - - if (dm->cck_agc_report_type == 0) - lna_gain = lna_gain_table_0[LNA_idx]; - else - lna_gain = lna_gain_table_1[LNA_idx]; - - rx_pwr_all = lna_gain - (2 * VGA_idx); - - return rx_pwr_all; -} -#endif - -#if (RTL8188E_SUPPORT == 1) -s8 -phydm_cck_rssi_8188e( - struct dm_struct *dm, - u16 LNA_idx, - u8 VGA_idx -) -{ - s8 rx_pwr_all = 0; - s8 lna_gain = 0; - s8 lna_gain_table_0[8] = {17, -1, -13, -29, -32, -35, -38, -41};/*only use lna0/1/2/3/7*/ - s8 lna_gain_table_1[8] = {29, 20, 12, 3, -6, -15, -24, -33}; /*only use lna3 /7*/ - s8 lna_gain_table_2[8] = {17, -1, -13, -17, -32, -43, -38, -47};/*only use lna1/3/5/7*/ - - if (dm->cut_version >= ODM_CUT_I) { /*SMIC*/ - if (dm->ext_lna == 0x1) { - switch (dm->type_glna) { - case 0x2: /*eLNA 14dB*/ - lna_gain = lna_gain_table_2[LNA_idx]; - break; - default: - lna_gain = lna_gain_table_0[LNA_idx]; - break; - } - } else { - lna_gain = lna_gain_table_0[LNA_idx]; - } - } else { /*TSMC*/ - lna_gain = lna_gain_table_1[LNA_idx]; } - rx_pwr_all = lna_gain - (2 * VGA_idx); - - return rx_pwr_all; + return rx_pow; } -#endif -#if (RTL8821C_SUPPORT == 1) -s8 -phydm_cck_rssi_8821c( - struct dm_struct *dm, - u8 LNA_idx, - u8 VGA_idx -) +#if (ODM_IC_11N_SERIES_SUPPORT) +void phydm_phy_sts_n_parsing(struct dm_struct *dm, + struct phydm_phyinfo_struct *phy_info, + u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo) { - s8 rx_pwr_all = 0; - s8 lna_gain = 0; - s8 lna_gain_table_0[8] = {22, 8, -6, -22, -31, -40, -46, -52};/*only use lna2/3/5/7*/ - s8 lna_gain_table_1[16] = {10, 6, 2, -2, -6, -10, -14, -17, - -20, -24, -28, -31, -34, -37, -40, -44}; /*only use lna4/8/C/F*/ + u8 i = 0; + s8 rx_pwr[4], rx_pwr_all = 0; + u8 EVM, pwdb_all = 0, pwdb_all_bt = 0; + u8 RSSI, total_rssi = 0; + u8 rf_rx_num = 0; + u8 lna_idx = 0; + u8 vga_idx = 0; + u8 cck_agc_rpt; + s8 evm_tmp = 0; + u8 sq = 0; + u8 val_tmp = 0; + s8 val_s8 = 0; + struct phy_status_rpt_8192cd *phy_sts = NULL; - if (dm->cck_agc_report_type == 0) - lna_gain = lna_gain_table_0[LNA_idx]; - else - lna_gain = lna_gain_table_1[LNA_idx]; - - rx_pwr_all = lna_gain - (2 * VGA_idx); - - return rx_pwr_all; -} -#endif - -#if (ODM_IC_11N_SERIES_SUPPORT == 1) -void -phydm_rx_phy_status92c_series_parsing( - struct dm_struct *dm, - struct phydm_phyinfo_struct *phy_info, - u8 *phy_status_inf, - struct phydm_perpkt_info_struct *pktinfo -) -{ - u8 i, max_spatial_stream; - s8 rx_pwr[4], rx_pwr_all = 0; - u8 EVM, pwdb_all = 0, pwdb_all_bt; - u8 RSSI, total_rssi = 0; - u8 rf_rx_num = 0; - u8 LNA_idx = 0; - u8 VGA_idx = 0; - u8 cck_agc_rpt; - u8 stream_rxevm_tmp = 0; - u8 sq; - struct phy_status_rpt_8192cd *phy_sta_rpt = (struct phy_status_rpt_8192cd *)phy_status_inf; - - if (pktinfo->is_to_self) - dm->curr_station_id = pktinfo->station_id; + phy_sts = (struct phy_status_rpt_8192cd *)phy_status_inf; if (pktinfo->is_cck_rate) { - - cck_agc_rpt = phy_sta_rpt->cck_agc_rpt_ofdm_cfosho_a; + cck_agc_rpt = phy_sts->cck_agc_rpt_ofdm_cfosho_a; - if (dm->support_ic_type & (ODM_RTL8703B)) { -#if (RTL8703B_SUPPORT == 1) - if (dm->cck_agc_report_type == 1) { /*4 bit LNA*/ + /*@3 bit LNA*/ + lna_idx = ((cck_agc_rpt & 0xE0) >> 5); + vga_idx = (cck_agc_rpt & 0x1F); - u8 cck_agc_rpt_b = (phy_sta_rpt->cck_rpt_b_ofdm_cfosho_b & BIT(7)) ? 1 : 0; - - LNA_idx = (cck_agc_rpt_b << 3) | ((cck_agc_rpt & 0xE0) >> 5); - VGA_idx = (cck_agc_rpt & 0x1F); - - rx_pwr_all = phydm_cck_rssi_8703B(LNA_idx, VGA_idx); - } -#endif - } else { /*3 bit LNA*/ - - LNA_idx = ((cck_agc_rpt & 0xE0) >> 5); - VGA_idx = (cck_agc_rpt & 0x1F); - - if (dm->support_ic_type & (ODM_RTL8188E)) { -#if (RTL8188E_SUPPORT == 1) - rx_pwr_all = phydm_cck_rssi_8188e(dm, LNA_idx, VGA_idx); - /**/ -#endif - } -#if (RTL8192E_SUPPORT == 1) - else if (dm->support_ic_type & (ODM_RTL8192E)) { - rx_pwr_all = phydm_cck_rssi_8192e(dm, LNA_idx, VGA_idx); - /**/ - } -#endif -#if (RTL8723B_SUPPORT == 1) - else if (dm->support_ic_type & (ODM_RTL8723B)) { - rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx, VGA_idx); - /**/ - } -#endif -#if (RTL8188F_SUPPORT == 1) - else if (dm->support_ic_type & (ODM_RTL8188F)) { - rx_pwr_all = odm_CCKRSSI_8188F(LNA_idx, VGA_idx); - /**/ - } -#endif -#if (RTL8195A_SUPPORT == 1) - else if (dm->support_ic_type & (ODM_RTL8195A)) { - rx_pwr_all = phydm_cck_rssi_8195a(LNA_idx, VGA_idx); - /**/ - } -#endif + #if (RTL8703B_SUPPORT) + if (dm->support_ic_type & (ODM_RTL8703B) && + dm->cck_agc_report_type == 1) { + /*@4 bit LNA*/ + if (phy_sts->cck_rpt_b_ofdm_cfosho_b & BIT(7)) + val_tmp = 1; + else + val_tmp = 0; + lna_idx = (val_tmp << 3) | lna_idx; } + #endif - PHYDM_DBG(dm, DBG_RSSI_MNTR, "ext_lna_gain (( %d )), LNA_idx: (( 0x%x )), VGA_idx: (( 0x%x )), rx_pwr_all: (( %d ))\n", - dm->ext_lna_gain, LNA_idx, VGA_idx, rx_pwr_all); + rx_pwr_all = phydm_get_cck_rssi(dm, lna_idx, vga_idx); + + PHYDM_DBG(dm, DBG_RSSI_MNTR, + "ext_lna_gain (( %d )), lna_idx: (( 0x%x )), vga_idx: (( 0x%x )), rx_pwr_all: (( %d ))\n", + dm->ext_lna_gain, lna_idx, vga_idx, rx_pwr_all); -#if ~(RTL8188E_SUPPORT == 1) if (dm->board_type & ODM_BOARD_EXT_LNA) rx_pwr_all -= dm->ext_lna_gain; -#endif - pwdb_all = phydm_query_rx_pwr_percentage(rx_pwr_all); + pwdb_all = phydm_pwr_2_percent(rx_pwr_all); if (pktinfo->is_to_self) { - dm->cck_lna_idx = LNA_idx; - dm->cck_vga_idx = VGA_idx; + dm->cck_lna_idx = lna_idx; + dm->cck_vga_idx = vga_idx; } - + phy_info->rx_pwdb_all = pwdb_all; phy_info->bt_rx_rssi_percentage = pwdb_all; phy_info->recv_signal_power = rx_pwr_all; - - /* (3) Get Signal Quality (EVM) */ + + /* @(3) Get Signal Quality (EVM) */ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) if (dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) - sq = phydm_sq_patch_rt_cid_819x_lenovo(dm, pktinfo->is_cck_rate, pwdb_all, 0, 0); + sq = phydm_sq_patch_lenovo(dm, pktinfo->is_cck_rate, pwdb_all, 0, 0); else if (dm->iot_table.win_patch_id == RT_CID_819X_ACER) sq = phydm_sq_patch_rt_cid_819x_acer(dm, pktinfo->is_cck_rate, pwdb_all, 0, 0); else #endif - sq = phydm_get_signal_quality(phy_info, dm, phy_sta_rpt); + sq = phydm_get_signal_quality(phy_info, dm, phy_sts); - /* dbg_print("cck sq = %d\n", sq); */ +#if 0 + /* @dbg_print("cck sq = %d\n", sq); */ +#endif phy_info->signal_quality = sq; phy_info->rx_mimo_signal_quality[RF_PATH_A] = sq; phy_info->rx_mimo_signal_quality[RF_PATH_B] = -1; - for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { if (i == 0) @@ -1005,130 +974,143 @@ phydm_rx_phy_status92c_series_parsing( else phy_info->rx_mimo_signal_strength[i] = 0; } - } else { /* 2 is OFDM rate */ + } else { /* @2 is OFDM rate */ - /* */ - /* (1)Get RSSI for HT rate */ - /* */ + /* @(1)Get RSSI for HT rate */ - for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH_N; i++) { - + for (i = RF_PATH_A; i < dm->num_rf_path; i++) { if (dm->rf_path_rx_enable & BIT(i)) rf_rx_num++; - rx_pwr[i] = ((phy_sta_rpt->path_agc[i].gain & 0x3F) * 2) - 110; + val_s8 = phy_sts->path_agc[i].gain & 0x3F; + rx_pwr[i] = (val_s8 * 2) - 110; - if (pktinfo->is_to_self) { - dm->ofdm_agc_idx[i] = (phy_sta_rpt->path_agc[i].gain & 0x3F); - /**/ - } + if (pktinfo->is_to_self) + dm->ofdm_agc_idx[i] = val_s8; phy_info->rx_pwr[i] = rx_pwr[i]; - RSSI = phydm_query_rx_pwr_percentage(rx_pwr[i]); + RSSI = phydm_pwr_2_percent(rx_pwr[i]); total_rssi += RSSI; - /* RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI)); */ - phy_info->rx_mimo_signal_strength[i] = (u8) RSSI; + phy_info->rx_mimo_signal_strength[i] = (u8)RSSI; - /* Get Rx snr value in DB */ - phy_info->rx_snr[i] = (s8)(phy_sta_rpt->path_rxsnr[i] / 2); + /* @Get Rx snr value in DB */ + val_s8 = (s8)(phy_sts->path_rxsnr[i] / 2); + phy_info->rx_snr[i] = val_s8; /* Record Signal Strength for next packet */ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) if (i == RF_PATH_A) { if (dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) { - phy_info->signal_quality = phydm_sq_patch_rt_cid_819x_lenovo(dm, pktinfo->is_cck_rate, pwdb_all, i, RSSI); + phy_info->signal_quality = phydm_sq_patch_lenovo(dm, pktinfo->is_cck_rate, pwdb_all, i, RSSI); } else if (dm->iot_table.win_patch_id == RT_CID_819X_ACER) phy_info->signal_quality = phydm_sq_patch_rt_cid_819x_acer(dm, pktinfo->is_cck_rate, pwdb_all, 0, RSSI); } #endif } - /* (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */ - rx_pwr_all = (((phy_sta_rpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110; + /* @(2)PWDB, Average PWDB calculated by hardware (for RA) */ + val_s8 = phy_sts->cck_sig_qual_ofdm_pwdb_all >> 1; + rx_pwr_all = (val_s8 & 0x7f) - 110; - pwdb_all_bt = pwdb_all = phydm_query_rx_pwr_percentage(rx_pwr_all); + pwdb_all = phydm_pwr_2_percent(rx_pwr_all); + pwdb_all_bt = pwdb_all; phy_info->rx_pwdb_all = pwdb_all; phy_info->bt_rx_rssi_percentage = pwdb_all_bt; phy_info->rx_power = rx_pwr_all; phy_info->recv_signal_power = rx_pwr_all; + /* @(3)EVM of HT rate */ + for (i = 0; i < pktinfo->rate_ss; i++) { + /* @Do not use shift operation like "rx_evmX >>= 1" + * because the compilor of free build environment + * fill most significant bit to "zero" when doing shifting + * operation which may change a negative + * value to positive one, then the dbm value + * (which is supposed to be negative) is not correct anymore. + */ + EVM = phydm_evm_2_percent(phy_sts->stream_rxevm[i]); -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - if (dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) { - /* do nothing */ - } else if (dm->iot_table.win_patch_id == RT_CID_819X_ACER) { - /* do nothing */ - } else { -#endif - /* (3)EVM of HT rate */ - - if (pktinfo->data_rate >= ODM_RATEMCS8 && pktinfo->data_rate <= ODM_RATEMCS15) - max_spatial_stream = 2; /* both spatial stream make sense */ - else - max_spatial_stream = 1; /* only spatial stream 1 makes sense */ - - for (i = 0; i < max_spatial_stream; i++) { - /* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */ - /* fill most significant bit to "zero" when doing shifting operation which may change a negative */ - /* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */ - EVM = phydm_evm_db_to_percentage((phy_sta_rpt->stream_rxevm[i])); /* dbm */ - - if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */ + /*@Fill value in RFD, Get the 1st spatial stream only*/ + if (i == RF_PATH_A) phy_info->signal_quality = (u8)(EVM & 0xff); phy_info->rx_mimo_signal_quality[i] = (u8)(EVM & 0xff); - if (phy_sta_rpt->stream_rxevm[i] < 0) - stream_rxevm_tmp = (u8)(0 - (phy_sta_rpt->stream_rxevm[i])); + if (phy_sts->stream_rxevm[i] < 0) + evm_tmp = 0 - phy_sts->stream_rxevm[i]; - if (stream_rxevm_tmp == 64) - stream_rxevm_tmp = 0; - - phy_info->rx_mimo_evm_dbm[i] = stream_rxevm_tmp; + if (evm_tmp == 64) + evm_tmp = 0; + phy_info->rx_mimo_evm_dbm[i] = (u8)evm_tmp; } -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - } -#endif - - phydm_parsing_cfo(dm, pktinfo, phy_sta_rpt->path_cfotail, pktinfo->rate_ss); - + phydm_parsing_cfo(dm, pktinfo, + phy_sts->path_cfotail, pktinfo->rate_ss); } -#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) - dm->dm_fat_table.antsel_rx_keep_0 = phy_sta_rpt->ant_sel; - dm->dm_fat_table.antsel_rx_keep_1 = phy_sta_rpt->ant_sel_b; - dm->dm_fat_table.antsel_rx_keep_2 = phy_sta_rpt->antsel_rx_keep_2; -#endif - + #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->ant_sel; + dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->ant_sel_b; + dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antsel_rx_keep_2; + #endif } #endif -#if ODM_IC_11AC_SERIES_SUPPORT +#if ODM_IC_11AC_SERIES_SUPPORT +static s16 +phydm_cfo(s8 value) +{ + s16 ret_val; -void -phydm_rx_phy_bw_jaguar_series_parsing( - struct phydm_phyinfo_struct *phy_info, - struct phydm_perpkt_info_struct *pktinfo, - struct phy_status_rpt_8812 *phy_sta_rpt -) + if (value < 0) { + ret_val = 0 - value; + ret_val = (ret_val << 1) + (ret_val >> 1); /*@2.5~=312.5/2^7 */ + ret_val = ret_val | BIT(12); /*set bit12 as 1 for negative cfo*/ + } else { + ret_val = value; + ret_val = (ret_val << 1) + (ret_val >> 1); /* @*2.5~=312.5/2^7*/ + } + return ret_val; +} + +static u8 +phydm_evm_dbm(s8 value) +{ + s8 ret_val = value; + + /* @-33dB~0dB to 33dB ~ 0dB */ + if (ret_val == -128) + ret_val = 127; + else if (ret_val < 0) + ret_val = 0 - ret_val; + + ret_val = ret_val >> 1; + return (u8)ret_val; +} + +void phydm_rx_physts_bw_parsing(struct phydm_phyinfo_struct *phy_info, + struct phydm_perpkt_info_struct * + pktinfo, + struct phy_status_rpt_8812 * + phy_sts) { if (pktinfo->data_rate <= ODM_RATE54M) { - switch (phy_sta_rpt->r_RFMOD) { + switch (phy_sts->r_RFMOD) { case 1: - if (phy_sta_rpt->sub_chnl == 0) + if (phy_sts->sub_chnl == 0) phy_info->band_width = 1; else phy_info->band_width = 0; break; case 2: - if (phy_sta_rpt->sub_chnl == 0) + if (phy_sts->sub_chnl == 0) phy_info->band_width = 2; - else if (phy_sta_rpt->sub_chnl == 9 || phy_sta_rpt->sub_chnl == 10) + else if (phy_sts->sub_chnl == 9 || + phy_sts->sub_chnl == 10) phy_info->band_width = 1; else phy_info->band_width = 0; @@ -1140,407 +1122,195 @@ phydm_rx_phy_bw_jaguar_series_parsing( break; } } - } -void -phydm_rx_phy_status_jaguar_series_parsing( - struct dm_struct *dm, - struct phydm_phyinfo_struct *phy_info, - u8 *phy_status_inf, - struct phydm_perpkt_info_struct *pktinfo -) +void phydm_get_sq(struct dm_struct *dm, struct phydm_phyinfo_struct *phy_info, + u8 is_cck_rate) { - u8 i, max_spatial_stream; - s8 rx_pwr[4], rx_pwr_all = 0; - u8 EVM = 0, evm_dbm, pwdb_all = 0, pwdb_all_bt; - u8 RSSI, avg_rssi = 0; - u8 rf_rx_num = 0; - u8 cck_highpwr = 0; - u8 LNA_idx, VGA_idx; - struct phy_status_rpt_8812 *phy_sta_rpt = (struct phy_status_rpt_8812 *)phy_status_inf; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u8 sq = 0; + u8 pwdb_all = phy_info->rx_pwdb_all; /*precentage*/ + #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + u8 rssi = phy_info->rx_mimo_signal_strength[0]; + #endif - phydm_rx_phy_bw_jaguar_series_parsing(phy_info, pktinfo, phy_sta_rpt); - - if (pktinfo->is_to_self) - dm->curr_station_id = pktinfo->station_id; - else - dm->curr_station_id = 0xff; - - - - if (pktinfo->is_cck_rate) { - u8 cck_agc_rpt; - - /*(1)Hardware does not provide RSSI for CCK*/ - /*(2)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/ - - /*if(hal_data->e_rf_power_state == e_rf_on)*/ - cck_highpwr = dm->is_cck_high_power; - /*else*/ - /*cck_highpwr = false;*/ - - cck_agc_rpt = phy_sta_rpt->cfosho[0]; - LNA_idx = ((cck_agc_rpt & 0xE0) >> 5); - VGA_idx = (cck_agc_rpt & 0x1F); - - if (dm->support_ic_type == ODM_RTL8812) { - switch (LNA_idx) { - case 7: - if (VGA_idx <= 27) - rx_pwr_all = -100 + 2 * (27 - VGA_idx); /*VGA_idx = 27~2*/ - else - rx_pwr_all = -100; - break; - case 6: - rx_pwr_all = -48 + 2 * (2 - VGA_idx); /*VGA_idx = 2~0*/ - break; - case 5: - rx_pwr_all = -42 + 2 * (7 - VGA_idx); /*VGA_idx = 7~5*/ - break; - case 4: - rx_pwr_all = -36 + 2 * (7 - VGA_idx); /*VGA_idx = 7~4*/ - break; - case 3: - /*rx_pwr_all = -28 + 2*(7-VGA_idx); VGA_idx = 7~0*/ - rx_pwr_all = -24 + 2 * (7 - VGA_idx); /*VGA_idx = 7~0*/ - break; - case 2: - if (cck_highpwr) - rx_pwr_all = -12 + 2 * (5 - VGA_idx); /*VGA_idx = 5~0*/ - else - rx_pwr_all = -6 + 2 * (5 - VGA_idx); - break; - case 1: - rx_pwr_all = 8 - 2 * VGA_idx; - break; - case 0: - rx_pwr_all = 14 - 2 * VGA_idx; - break; - default: - /*dbg_print("CCK Exception default\n");*/ - break; - } - rx_pwr_all += 6; - pwdb_all = phydm_query_rx_pwr_percentage(rx_pwr_all); - - if (cck_highpwr == false) { - if (pwdb_all >= 80) - pwdb_all = ((pwdb_all - 80) << 1) + ((pwdb_all - 80) >> 1) + 80; - else if ((pwdb_all <= 78) && (pwdb_all >= 20)) - pwdb_all += 3; - if (pwdb_all > 100) - pwdb_all = 100; - } - } else if (dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8881A)) { - s8 pout = -6; - - switch (LNA_idx) { - case 5: - rx_pwr_all = pout - 32 - (2 * VGA_idx); - break; - case 4: - rx_pwr_all = pout - 24 - (2 * VGA_idx); - break; - case 2: - rx_pwr_all = pout - 11 - (2 * VGA_idx); - break; - case 1: - rx_pwr_all = pout + 5 - (2 * VGA_idx); - break; - case 0: - rx_pwr_all = pout + 21 - (2 * VGA_idx); - break; - } - pwdb_all = phydm_query_rx_pwr_percentage(rx_pwr_all); - } else if (dm->support_ic_type == ODM_RTL8814A) { - s8 pout = -6; - - switch (LNA_idx) { - /*CCK only use LNA: 2, 3, 5, 7*/ - case 7: - rx_pwr_all = pout - 32 - (2 * VGA_idx); - break; - case 5: - rx_pwr_all = pout - 22 - (2 * VGA_idx); - break; - case 3: - rx_pwr_all = pout - 2 - (2 * VGA_idx); - break; - case 2: - rx_pwr_all = pout + 5 - (2 * VGA_idx); - break; - /*case 6:*/ - /*rx_pwr_all = pout -26 - (2*VGA_idx);*/ - /*break;*/ - /*case 4:*/ - /*rx_pwr_all = pout - 8 - (2*VGA_idx);*/ - /*break;*/ - /*case 1:*/ - /*rx_pwr_all = pout + 21 - (2*VGA_idx);*/ - /*break;*/ - /*case 0:*/ - /*rx_pwr_all = pout + 10 - (2*VGA_idx);*/ - /* break; */ - default: - /* dbg_print("CCK Exception default\n"); */ - break; - } - pwdb_all = phydm_query_rx_pwr_percentage(rx_pwr_all); - } - - dm->cck_lna_idx = LNA_idx; - dm->cck_vga_idx = VGA_idx; - phy_info->rx_pwdb_all = pwdb_all; - /* if(pktinfo->station_id == 0) */ - /* { */ - /* dbg_print("CCK: LNA_idx = %d, VGA_idx = %d, phy_info->rx_pwdb_all = %d\n", */ - /* LNA_idx, VGA_idx, phy_info->rx_pwdb_all); */ - /* } */ -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - phy_info->bt_rx_rssi_percentage = pwdb_all; - phy_info->recv_signal_power = rx_pwr_all; -#endif - /*(3) Get Signal Quality (EVM)*/ - /*if (pktinfo->is_packet_match_bssid)*/ - { - u8 sq, sq_rpt; - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - if (dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) - sq = phydm_sq_patch_rt_cid_819x_lenovo(dm, pktinfo->is_cck_rate, pwdb_all, 0, 0); - else -#endif - if (phy_info->rx_pwdb_all > 40 && !dm->is_in_hct_test) + #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + if (dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) { + if (is_cck_rate) + sq = phydm_sq_patch_lenovo(dm, 1, pwdb_all, 0, 0); + else + sq = phydm_sq_patch_lenovo(dm, 0, pwdb_all, 0, rssi); + } else + #endif + { + if (is_cck_rate) { + if (pwdb_all > 40 && !dm->is_in_hct_test) { sq = 100; - else { - sq_rpt = phy_sta_rpt->pwdb_all; - - if (sq_rpt > 64) + } else { + if (pwdb_all > 64) sq = 0; - else if (sq_rpt < 20) + else if (pwdb_all < 20) sq = 100; else - sq = ((64 - sq_rpt) * 100) / 44; + sq = ((64 - pwdb_all) * 100) / 44; } - - /* dbg_print("cck sq = %d\n", sq); */ - phy_info->signal_quality = sq; - phy_info->rx_mimo_signal_quality[RF_PATH_A] = sq; + } else { + sq = phy_info->rx_mimo_signal_quality[0]; } + } - for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { - if (i == 0) - phy_info->rx_mimo_signal_strength[0] = pwdb_all; - else - phy_info->rx_mimo_signal_strength[i] = 0; +#if 0 + /* @dbg_print("cck sq = %d\n", sq); */ +#endif + phy_info->signal_quality = sq; +} + +void phydm_rx_physts_1st_type(struct dm_struct *dm, + struct phydm_phyinfo_struct *phy_info, + u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo) +{ + u8 i = 0; + s8 rx_pwr_db = 0; + u8 val = 0; /*tmp value*/ + s8 val_s8 = 0; /*tmp value*/ + u8 rssi = 0; /*pre path RSSI*/ + u8 rf_rx_num = 0; + u8 lna_idx = 0, vga_idx = 0; + u8 cck_agc_rpt = 0; + struct phy_status_rpt_8812 *phy_sts = NULL; + #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + #endif + + phy_sts = (struct phy_status_rpt_8812 *)phy_status_inf; + phydm_rx_physts_bw_parsing(phy_info, pktinfo, phy_sts); + + /* @== [CCK rate] ====================================================*/ + if (pktinfo->is_cck_rate) { + cck_agc_rpt = phy_sts->cfosho[0]; + lna_idx = (cck_agc_rpt & 0xE0) >> 5; + vga_idx = cck_agc_rpt & 0x1F; + + rx_pwr_db = phydm_get_cck_rssi(dm, lna_idx, vga_idx); + rssi = phydm_pwr_2_percent(rx_pwr_db); + + if (dm->support_ic_type == ODM_RTL8812 && + !dm->is_cck_high_power) { + if (rssi >= 80) { + rssi = ((rssi - 80) << 1) + + ((rssi - 80) >> 1) + 80; + } else if ((rssi <= 78) && (rssi >= 20)) { + rssi += 3; + } } + dm->cck_lna_idx = lna_idx; + dm->cck_vga_idx = vga_idx; + + phy_info->rx_pwdb_all = rssi; + phy_info->rx_mimo_signal_strength[0] = rssi; } else { - /*is OFDM rate*/ - fat_tab->hw_antsw_occur = phy_sta_rpt->hw_antsw_occur; - - /*(1)Get RSSI for OFDM rate*/ - for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { - /*2008/01/30 MH we will judge RF RX path now.*/ - /* dbg_print("dm->rf_path_rx_enable = %x\n", dm->rf_path_rx_enable); */ + /* @== [OFDM rate] ===================================================*/ + for (i = RF_PATH_A; i < dm->num_rf_path; i++) { + /*@[RSSI]*/ if (dm->rf_path_rx_enable & BIT(i)) rf_rx_num++; - /* else */ - /* continue; */ - /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/ - /* if((dm->support_ic_type & (ODM_RTL8812|ODM_RTL8821)) && (!dm->is_mp_chip)) */ - if (i < RF_PATH_C) { - rx_pwr[i] = (phy_sta_rpt->gain_trsw[i] & 0x7F) - 110; - - if (pktinfo->is_to_self) - dm->ofdm_agc_idx[i] = phy_sta_rpt->gain_trsw[i]; - - } else - rx_pwr[i] = (phy_sta_rpt->gain_trsw_cd[i - 2] & 0x7F) - 110; - /* else */ - /*rx_pwr[i] = ((phy_sta_rpt->gain_trsw[i]& 0x3F)*2) - 110; OLD FORMULA*/ - - phy_info->rx_pwr[i] = rx_pwr[i]; - - /* Translate DBM to percentage. */ - RSSI = phydm_query_rx_pwr_percentage(rx_pwr[i]); - - phy_info->rx_mimo_signal_strength[i] = (u8) RSSI; - - - /*Get Rx snr value in DB*/ - if (i < RF_PATH_C) - phy_info->rx_snr[i] = phy_sta_rpt->rxsnr[i] / 2; - else if (dm->support_ic_type & (ODM_RTL8814A)) - phy_info->rx_snr[i] = phy_sta_rpt->csi_current[i - 2] / 2; - -#if (DM_ODM_SUPPORT_TYPE != ODM_AP) - /*(2) CFO_short & CFO_tail*/ - if (i < RF_PATH_C) { - phy_info->cfo_short[i] = phydm_cfo((phy_sta_rpt->cfosho[i])); - phy_info->cfo_tail[i] = phydm_cfo((phy_sta_rpt->cfotail[i])); - } -#endif - /* Record Signal Strength for next packet */ -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - if (pktinfo->is_packet_match_bssid && (i == RF_PATH_A)) { - if (dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) { - phy_info->signal_quality = phydm_sq_patch_rt_cid_819x_lenovo(dm, pktinfo->is_cck_rate, pwdb_all, i, RSSI); - } - } -#endif - } - - /*(3)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/ - - /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/ - if ((dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) && (!dm->is_mp_chip)) - rx_pwr_all = (phy_sta_rpt->pwdb_all & 0x7f) - 110; - else - rx_pwr_all = (((phy_sta_rpt->pwdb_all) >> 1) & 0x7f) - 110; /*OLD FORMULA*/ - - pwdb_all_bt = pwdb_all = phydm_query_rx_pwr_percentage(rx_pwr_all); - - phy_info->rx_pwdb_all = pwdb_all; - /*PHYDM_DBG(dm,DBG_RSSI_MNTR, "ODM OFDM RSSI=%d\n",phy_info->rx_pwdb_all);*/ -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - phy_info->bt_rx_rssi_percentage = pwdb_all_bt; - phy_info->rx_power = rx_pwr_all; - phy_info->recv_signal_power = rx_pwr_all; -#endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - if (dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) { - /*do nothing*/ - } else { -#endif - /*(4)EVM of OFDM rate*/ - - if ((pktinfo->data_rate >= ODM_RATEMCS8) && - (pktinfo->data_rate <= ODM_RATEMCS15)) - max_spatial_stream = 2; - else if ((pktinfo->data_rate >= ODM_RATEVHTSS2MCS0) && - (pktinfo->data_rate <= ODM_RATEVHTSS2MCS9)) - max_spatial_stream = 2; - else if ((pktinfo->data_rate >= ODM_RATEMCS16) && - (pktinfo->data_rate <= ODM_RATEMCS23)) - max_spatial_stream = 3; - else if ((pktinfo->data_rate >= ODM_RATEVHTSS3MCS0) && - (pktinfo->data_rate <= ODM_RATEVHTSS3MCS9)) - max_spatial_stream = 3; - else - max_spatial_stream = 1; - - /*if (pktinfo->is_packet_match_bssid) */ - /*dbg_print("pktinfo->data_rate = %d\n", pktinfo->data_rate);*/ - - for (i = 0; i < max_spatial_stream; i++) { - /*Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment*/ - /*fill most significant bit to "zero" when doing shifting operation which may change a negative*/ - /*value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.*/ - - if (pktinfo->data_rate >= ODM_RATE6M && pktinfo->data_rate <= ODM_RATE54M) { - if (i == RF_PATH_A) { - EVM = phydm_evm_db_to_percentage((phy_sta_rpt->sigevm)); /*dbm*/ - EVM += 20; - if (EVM > 100) - EVM = 100; - } - } else { - if (i < RF_PATH_C) { - if (phy_sta_rpt->rxevm[i] == -128) - phy_sta_rpt->rxevm[i] = -25; - EVM = phydm_evm_db_to_percentage((phy_sta_rpt->rxevm[i])); /*dbm*/ - } else { - if (phy_sta_rpt->rxevm_cd[i - 2] == -128) - phy_sta_rpt->rxevm_cd[i - 2] = -25; - EVM = phydm_evm_db_to_percentage((phy_sta_rpt->rxevm_cd[i - 2])); /*dbm*/ - } - } if (i < RF_PATH_C) - evm_dbm = phydm_evm_dbm_jaguar_series(phy_sta_rpt->rxevm[i]); + val = phy_sts->gain_trsw[i]; else - evm_dbm = phydm_evm_dbm_jaguar_series(phy_sta_rpt->rxevm_cd[i - 2]); - /*RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",*/ - /*pktinfo->data_rate, phy_sta_rpt->rxevm[i], "%", EVM));*/ + val = phy_sts->gain_trsw_cd[i - 2]; - if (i == RF_PATH_A) { - /*Fill value in RFD, Get the first spatial stream only*/ - phy_info->signal_quality = EVM; + phy_info->rx_pwr[i] = (val & 0x7F) - 110; + rssi = phydm_pwr_2_percent(phy_info->rx_pwr[i]); + phy_info->rx_mimo_signal_strength[i] = rssi; + + /*@[SNR]*/ + if (i < RF_PATH_C) + val_s8 = phy_sts->rxsnr[i]; + else if (dm->support_ic_type & (ODM_RTL8814A)) + val_s8 = (s8)phy_sts->csi_current[i - 2]; + + phy_info->rx_snr[i] = val_s8 >> 1; + + /*@[CFO_short & CFO_tail]*/ + if (i < RF_PATH_C) { + val_s8 = phy_sts->cfosho[i]; + phy_info->cfo_short[i] = phydm_cfo(val_s8); + val_s8 = phy_sts->cfotail[i]; + phy_info->cfo_tail[i] = phydm_cfo(val_s8); } - phy_info->rx_mimo_signal_quality[i] = EVM; -#if (DM_ODM_SUPPORT_TYPE != ODM_AP) - phy_info->rx_mimo_evm_dbm[i] = evm_dbm; -#endif - } -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - } -#endif - phydm_parsing_cfo(dm, pktinfo, phy_sta_rpt->cfotail, pktinfo->rate_ss); + if (i < RF_PATH_C && pktinfo->is_to_self) + dm->ofdm_agc_idx[i] = phy_sts->gain_trsw[i]; + } + /* @== [PWDB] ========================================================*/ + + /*@(Avg PWDB calculated by hardware*/ + if (!dm->is_mp_chip) /*@8812, 8821*/ + val = phy_sts->pwdb_all; + else + val = phy_sts->pwdb_all >> 1; /*old fomula*/ + + rx_pwr_db = (val & 0x7f) - 110; + phy_info->rx_pwdb_all = phydm_pwr_2_percent(rx_pwr_db); + + /*@(4)EVM of OFDM rate*/ + for (i = 0; i < pktinfo->rate_ss; i++) { + if (!pktinfo->is_cck_rate && + pktinfo->data_rate <= ODM_RATE54M) { + val_s8 = phy_sts->sigevm; + } else if (i < RF_PATH_C) { + if (phy_sts->rxevm[i] == -128) + phy_sts->rxevm[i] = -25; + + val_s8 = phy_sts->rxevm[i]; + } else { + if (phy_sts->rxevm_cd[i - 2] == -128) + phy_sts->rxevm_cd[i - 2] = -25; + + val_s8 = phy_sts->rxevm_cd[i - 2]; + } + /*@[EVM to 0~100%]*/ + val = phydm_evm_2_percent(val_s8); + phy_info->rx_mimo_signal_quality[i] = val; + /*@[EVM dBm]*/ + phy_info->rx_mimo_evm_dbm[i] = phydm_evm_dbm(val_s8); + } + phydm_parsing_cfo(dm, pktinfo, + phy_sts->cfotail, pktinfo->rate_ss); } - /* dbg_print("is_cck_rate= %d, phy_info->signal_strength=%d % PWDB_AL=%d rf_rx_num=%d\n", is_cck_rate, phy_info->signal_strength, pwdb_all, rf_rx_num); */ + + /* @== [General Info] ================================================*/ + + phy_info->rx_power = rx_pwr_db; + phy_info->bt_rx_rssi_percentage = phy_info->rx_pwdb_all; + phy_info->recv_signal_power = phy_info->rx_power; + phydm_get_sq(dm, phy_info, pktinfo->is_cck_rate); dm->rx_pwdb_ave = dm->rx_pwdb_ave + phy_info->rx_pwdb_all; -#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) - dm->dm_fat_table.antsel_rx_keep_0 = phy_sta_rpt->antidx_anta; - dm->dm_fat_table.antsel_rx_keep_1 = phy_sta_rpt->antidx_antb; - dm->dm_fat_table.antsel_rx_keep_2 = phy_sta_rpt->antidx_antc; - dm->dm_fat_table.antsel_rx_keep_3 = phy_sta_rpt->antidx_antd; -#endif - - /*PHYDM_DBG(dm, DBG_ANT_DIV, "StaID[%d]: antidx_anta = ((%d)), MatchBSSID = ((%d))\n", pktinfo->station_id, phy_sta_rpt->antidx_anta, pktinfo->is_packet_match_bssid);*/ - - - /* dbg_print("phy_sta_rpt->antidx_anta = %d, phy_sta_rpt->antidx_antb = %d\n",*/ - /* phy_sta_rpt->antidx_anta, phy_sta_rpt->antidx_antb);*/ - /* dbg_print("----------------------------\n");*/ - /* dbg_print("pktinfo->station_id=%d, pktinfo->data_rate=0x%x\n",pktinfo->station_id, pktinfo->data_rate);*/ - /* dbg_print("phy_sta_rpt->r_RFMOD = %d\n", phy_sta_rpt->r_RFMOD);*/ - /* dbg_print("phy_sta_rpt->gain_trsw[0]=0x%x, phy_sta_rpt->gain_trsw[1]=0x%x\n",*/ - /* phy_sta_rpt->gain_trsw[0],phy_sta_rpt->gain_trsw[1]);*/ - /* dbg_print("phy_sta_rpt->gain_trsw[2]=0x%x, phy_sta_rpt->gain_trsw[3]=0x%x\n",*/ - /* phy_sta_rpt->gain_trsw_cd[0],phy_sta_rpt->gain_trsw_cd[1]);*/ - /* dbg_print("phy_sta_rpt->pwdb_all = 0x%x, phy_info->rx_pwdb_all = %d\n", phy_sta_rpt->pwdb_all, phy_info->rx_pwdb_all);*/ - /* dbg_print("phy_sta_rpt->cfotail[i] = 0x%x, phy_sta_rpt->CFO_tail[i] = 0x%x\n", phy_sta_rpt->cfotail[0], phy_sta_rpt->cfotail[1]);*/ - /* dbg_print("phy_sta_rpt->rxevm[0] = %d, phy_sta_rpt->rxevm[1] = %d\n", phy_sta_rpt->rxevm[0], phy_sta_rpt->rxevm[1]);*/ - /* dbg_print("phy_sta_rpt->rxevm[2] = %d, phy_sta_rpt->rxevm[3] = %d\n", phy_sta_rpt->rxevm_cd[0], phy_sta_rpt->rxevm_cd[1]);*/ - /* dbg_print("phy_info->rx_mimo_signal_strength[0]=%d, phy_info->rx_mimo_signal_strength[1]=%d, rx_pwdb_all=%d\n",*/ - /* phy_info->rx_mimo_signal_strength[0], phy_info->rx_mimo_signal_strength[1], phy_info->rx_pwdb_all);*/ - /* dbg_print("phy_info->rx_mimo_signal_strength[2]=%d, phy_info->rx_mimo_signal_strength[3]=%d\n",*/ - /* phy_info->rx_mimo_signal_strength[2], phy_info->rx_mimo_signal_strength[3]);*/ - /* dbg_print("ppPhyInfo->rx_mimo_signal_quality[0]=%d, phy_info->rx_mimo_signal_quality[1]=%d\n",*/ - /* phy_info->rx_mimo_signal_quality[0], phy_info->rx_mimo_signal_quality[1]);*/ - /* dbg_print("ppPhyInfo->rx_mimo_signal_quality[2]=%d, phy_info->rx_mimo_signal_quality[3]=%d\n",*/ - /* phy_info->rx_mimo_signal_quality[2], phy_info->rx_mimo_signal_quality[3]);*/ - + #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + fat_tab->hw_antsw_occur = phy_sts->hw_antsw_occur; + dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_anta; + dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_antb; + dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_antc; + dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_antd; + #endif } #endif -void -phydm_reset_rssi_for_dm( - struct dm_struct *dm, - u8 station_id -) +void phydm_reset_rssi_for_dm(struct dm_struct *dm, u8 station_id) { - struct cmn_sta_info *sta; -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); -#endif + struct cmn_sta_info *sta; + sta = dm->phydm_sta_info[station_id]; - if (!is_sta_active(sta)) { - /**/ + if (!is_sta_active(sta)) return; - } - PHYDM_DBG(dm, DBG_RSSI_MNTR, "Reset RSSI for macid = (( %d ))\n", station_id); - + PHYDM_DBG(dm, DBG_RSSI_MNTR, "Reset RSSI for macid = (( %d ))\n", + station_id); sta->rssi_stat.rssi_cck = -1; sta->rssi_stat.rssi_ofdm = -1; @@ -1553,305 +1323,474 @@ phydm_reset_rssi_for_dm( sta->rssi_stat.valid_bit = 0; } -void -phydm_process_rssi_for_dm( - struct dm_struct *dm, - struct phydm_phyinfo_struct *phy_info, - struct phydm_perpkt_info_struct *pktinfo -) +#if (ODM_IC_11N_SERIES_SUPPORT || ODM_IC_11AC_SERIES_SUPPORT) + +s32 phydm_get_rssi_8814_ofdm(struct dm_struct *dm, u8 *rssi_in) { - s32 rssi_ave; - s8 undecorated_smoothed_pwdb, undecorated_smoothed_cck, undecorated_smoothed_ofdm; - u8 i; - u8 rssi_max, rssi_min; - u32 weighting = 0; - u8 send_rssi_2_fw = 0; - struct cmn_sta_info *sta; -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); -#endif + s32 rssi_avg; + u8 rx_count = 0; + u64 rssi_linear = 0; + + if (dm->rx_ant_status & BB_PATH_A) { + rx_count++; + rssi_linear += phydm_db_2_linear(rssi_in[RF_PATH_A]); + } + + if (dm->rx_ant_status & BB_PATH_B) { + rx_count++; + rssi_linear += phydm_db_2_linear(rssi_in[RF_PATH_B]); + } + + if (dm->rx_ant_status & BB_PATH_C) { + rx_count++; + rssi_linear += phydm_db_2_linear(rssi_in[RF_PATH_C]); + } + + if (dm->rx_ant_status & BB_PATH_D) { + rx_count++; + rssi_linear += phydm_db_2_linear(rssi_in[RF_PATH_D]); + } + + /* @Rounding and removing fractional bits */ + rssi_linear = (rssi_linear + (1 << (FRAC_BITS - 1))) >> FRAC_BITS; + + /* @Calculate average RSSI */ + switch (rx_count) { + case 2: + rssi_linear = DIVIDED_2(rssi_linear); + break; + case 3: + rssi_linear = DIVIDED_3(rssi_linear); + break; + case 4: + rssi_linear = DIVIDED_4(rssi_linear); + break; + } + rssi_avg = odm_convert_to_db(rssi_linear); + + return rssi_avg; +} + +void phydm_process_rssi_for_dm(struct dm_struct *dm, + struct phydm_phyinfo_struct *phy_info, + struct phydm_perpkt_info_struct *pktinfo) +{ + s32 rssi_ave = 0; /*@average among all paths*/ + s8 rssi_all = 0; /*@average value of CCK & OFDM*/ + s8 rssi_cck_tmp = 0, rssi_ofdm_tmp = 0; + u8 i = 0; + u8 rssi_max = 0, rssi_min = 0; + u32 w1 = 0, w2 = 0; /*weighting*/ + u8 send_rssi_2_fw = 0; + u8 *rssi_tmp = NULL; + struct cmn_sta_info *sta = NULL; + struct rssi_info *rssi_t = NULL; + #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + #endif + #endif if (pktinfo->station_id >= ODM_ASSOCIATE_ENTRY_NUM) return; -#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY + #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(dm, phy_info, pktinfo); -#endif + #endif + #ifdef ODM_EVM_ENHANCE_ANTDIV + phydm_rx_rate_for_antdiv(dm, pktinfo); + #endif sta = dm->phydm_sta_info[pktinfo->station_id]; - if (!is_sta_active(sta)) { + if (!is_sta_active(sta)) return; - /**/ - } -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) + rssi_t = &sta->rssi_stat; + + #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) if ((dm->support_ability & ODM_BB_ANT_DIV) && - (fat_tab->enable_ctrl_frame_antdiv) - ) { + fat_tab->enable_ctrl_frame_antdiv) { if (pktinfo->is_packet_match_bssid) dm->data_frame_num++; - if ((fat_tab->use_ctrl_frame_antdiv)) { - if (!pktinfo->is_to_self)/*data frame + CTRL frame*/ + if (fat_tab->use_ctrl_frame_antdiv) { + if (!pktinfo->is_to_self) /*@data frame + CTRL frame*/ return; } else { - if ((!pktinfo->is_packet_match_bssid))/*data frame only*/ + /*@data frame only*/ + if (!pktinfo->is_packet_match_bssid) return; } } else -#endif + #endif + #endif { - if ((!pktinfo->is_packet_match_bssid))/*data frame only*/ + if (!pktinfo->is_packet_match_bssid) /*@data frame only*/ return; } - if (pktinfo->is_packet_beacon) + if (pktinfo->is_packet_beacon) { dm->phy_dbg_info.num_qry_beacon_pkt++; - - /* --------------Statistic for antenna/path diversity------------------ */ - if (dm->support_ability & ODM_BB_ANT_DIV) { -#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) - odm_process_rssi_for_ant_div(dm, phy_info, pktinfo); -#endif + dm->phy_dbg_info.beacon_phy_rate = pktinfo->data_rate; } -#if (defined(CONFIG_PATH_DIVERSITY)) - else if (dm->support_ability & ODM_BB_PATH_DIV) + + /* @--------------Statistic for antenna/path diversity--------------- */ + #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) + if (dm->support_ability & ODM_BB_ANT_DIV) + odm_process_rssi_for_ant_div(dm, phy_info, pktinfo); + #endif + + #if (defined(CONFIG_PATH_DIVERSITY)) + if (dm->support_ability & ODM_BB_PATH_DIV) phydm_process_rssi_for_path_div(dm, phy_info, pktinfo); -#endif - /* -----------------Smart Antenna Debug Message------------------ */ + #endif + /* @----------------------------------------------------------------- */ - undecorated_smoothed_cck = sta->rssi_stat.rssi_cck; - undecorated_smoothed_ofdm = sta->rssi_stat.rssi_ofdm; - undecorated_smoothed_pwdb = sta->rssi_stat.rssi; + rssi_cck_tmp = rssi_t->rssi_cck; + rssi_ofdm_tmp = rssi_t->rssi_ofdm; + rssi_all = rssi_t->rssi; - if (pktinfo->is_packet_to_self || pktinfo->is_packet_beacon) { - if (!pktinfo->is_cck_rate) { /* ofdm rate */ -#if (RTL8814A_SUPPORT == 1) - if (dm->support_ic_type & (ODM_RTL8814A)) { - u8 rx_count = 0; - u32 rssi_linear = 0; + if (!(pktinfo->is_packet_to_self || pktinfo->is_packet_beacon)) + return; - if (dm->rx_ant_status & BB_PATH_A) { - rx_count++; - rssi_linear += odm_convert_to_linear(phy_info->rx_mimo_signal_strength[RF_PATH_A]); - } + if (!pktinfo->is_cck_rate) { +/* @=== [ofdm RSSI] ======================================================== */ + rssi_tmp = phy_info->rx_mimo_signal_strength; - if (dm->rx_ant_status & BB_PATH_B) { - rx_count++; - rssi_linear += odm_convert_to_linear(phy_info->rx_mimo_signal_strength[RF_PATH_B]); - } - - if (dm->rx_ant_status & BB_PATH_C) { - rx_count++; - rssi_linear += odm_convert_to_linear(phy_info->rx_mimo_signal_strength[RF_PATH_C]); - } - - if (dm->rx_ant_status & BB_PATH_D) { - rx_count++; - rssi_linear += odm_convert_to_linear(phy_info->rx_mimo_signal_strength[RF_PATH_D]); - } - - /* Calculate average RSSI */ - switch (rx_count) { - case 2: - rssi_linear = (rssi_linear >> 1); - break; - case 3: - rssi_linear = ((rssi_linear) + (rssi_linear << 1) + (rssi_linear << 3)) >> 5; /* rssi_linear/3 ~ rssi_linear*11/32 */ - break; - case 4: - rssi_linear = (rssi_linear >> 2); - break; - } - rssi_ave = odm_convert_to_db(rssi_linear); - } else -#endif - { - if (phy_info->rx_mimo_signal_strength[RF_PATH_B] == 0) { - rssi_ave = phy_info->rx_mimo_signal_strength[RF_PATH_A]; - } else { - /*dbg_print("rfd->status.rx_mimo_signal_strength[0] = %d, rfd->status.rx_mimo_signal_strength[1] = %d\n",*/ - /*rfd->status.rx_mimo_signal_strength[0], rfd->status.rx_mimo_signal_strength[1]);*/ - - if (phy_info->rx_mimo_signal_strength[RF_PATH_A] > phy_info->rx_mimo_signal_strength[RF_PATH_B]) { - rssi_max = phy_info->rx_mimo_signal_strength[RF_PATH_A]; - rssi_min = phy_info->rx_mimo_signal_strength[RF_PATH_B]; - } else { - rssi_max = phy_info->rx_mimo_signal_strength[RF_PATH_B]; - rssi_min = phy_info->rx_mimo_signal_strength[RF_PATH_A]; - } - if ((rssi_max - rssi_min) < 3) - rssi_ave = rssi_max; - else if ((rssi_max - rssi_min) < 6) - rssi_ave = rssi_max - 1; - else if ((rssi_max - rssi_min) < 10) - rssi_ave = rssi_max - 2; - else - rssi_ave = rssi_max - 3; - } - } - - /* 1 Process OFDM RSSI */ - if (undecorated_smoothed_ofdm <= 0) { /* initialize */ - undecorated_smoothed_ofdm = (s8)phy_info->rx_pwdb_all; - PHYDM_DBG(dm, DBG_RSSI_MNTR, "OFDM_INIT: (( %d ))\n", undecorated_smoothed_ofdm); + #if (RTL8814A_SUPPORT == 1) + if (dm->support_ic_type & (ODM_RTL8814A)) { + rssi_ave = phydm_get_rssi_8814_ofdm(dm, rssi_tmp); + } else + #endif + { + if (rssi_tmp[RF_PATH_B] == 0) { + rssi_ave = rssi_tmp[RF_PATH_A]; } else { - if (phy_info->rx_pwdb_all > (u32)undecorated_smoothed_ofdm) { - undecorated_smoothed_ofdm = - (s8)((((undecorated_smoothed_ofdm)*(RX_SMOOTH_FACTOR - 1)) + - (rssi_ave)) / (RX_SMOOTH_FACTOR)); - undecorated_smoothed_ofdm = undecorated_smoothed_ofdm + 1; - PHYDM_DBG(dm, DBG_RSSI_MNTR, "OFDM_1: (( %d ))\n", undecorated_smoothed_ofdm); + if (rssi_tmp[RF_PATH_A] > rssi_tmp[RF_PATH_B]) { + rssi_max = rssi_tmp[RF_PATH_A]; + rssi_min = rssi_tmp[RF_PATH_B]; } else { - undecorated_smoothed_ofdm = - (s8)((((undecorated_smoothed_ofdm)*(RX_SMOOTH_FACTOR - 1)) + - (rssi_ave)) / (RX_SMOOTH_FACTOR)); - PHYDM_DBG(dm, DBG_RSSI_MNTR, "OFDM_2: (( %d ))\n", undecorated_smoothed_ofdm); + rssi_max = rssi_tmp[RF_PATH_B]; + rssi_min = rssi_tmp[RF_PATH_A]; } - } - if (sta->rssi_stat.ofdm_pkt_cnt != 64) { - i = 63; - sta->rssi_stat.ofdm_pkt_cnt -= (u8)(((sta->rssi_stat.packet_map >> i) & BIT(0)) - 1); - } - sta->rssi_stat.packet_map = (sta->rssi_stat.packet_map << 1) | BIT(0); - - } else { - rssi_ave = phy_info->rx_pwdb_all; - - if (sta->rssi_stat.cck_pkt_cnt <= 63) - sta->rssi_stat.cck_pkt_cnt++; - - /* 1 Process CCK RSSI */ - if (undecorated_smoothed_cck <= 0) { /* initialize */ - undecorated_smoothed_cck = (s8)phy_info->rx_pwdb_all; - sta->rssi_stat.cck_sum_power = (u16)phy_info->rx_pwdb_all ; /*reset*/ - sta->rssi_stat.cck_pkt_cnt = 1; /*reset*/ - PHYDM_DBG(dm, DBG_RSSI_MNTR, "CCK_INIT: (( %d ))\n", undecorated_smoothed_cck); - } else if (sta->rssi_stat.cck_pkt_cnt <= CCK_RSSI_INIT_COUNT) { - sta->rssi_stat.cck_sum_power = sta->rssi_stat.cck_sum_power + (u16)phy_info->rx_pwdb_all; - undecorated_smoothed_cck = sta->rssi_stat.cck_sum_power / sta->rssi_stat.cck_pkt_cnt; - - PHYDM_DBG(dm, DBG_RSSI_MNTR, "CCK_0: (( %d )), SumPow = (( %d )), cck_pkt = (( %d ))\n", - undecorated_smoothed_cck, sta->rssi_stat.cck_sum_power, sta->rssi_stat.cck_pkt_cnt); - } else { - if (phy_info->rx_pwdb_all > (u32)undecorated_smoothed_cck) { - undecorated_smoothed_cck = - (s8)((((undecorated_smoothed_cck)*(RX_SMOOTH_FACTOR - 1)) + - (phy_info->rx_pwdb_all)) / (RX_SMOOTH_FACTOR)); - undecorated_smoothed_cck = undecorated_smoothed_cck + 1; - PHYDM_DBG(dm, DBG_RSSI_MNTR, "CCK_1: (( %d ))\n", undecorated_smoothed_cck); - } else { - undecorated_smoothed_cck = - (s8)((((undecorated_smoothed_cck)*(RX_SMOOTH_FACTOR - 1)) + - (phy_info->rx_pwdb_all)) / (RX_SMOOTH_FACTOR)); - PHYDM_DBG(dm, DBG_RSSI_MNTR, "CCK_2: (( %d ))\n", undecorated_smoothed_cck); - } - } - i = 63; - sta->rssi_stat.ofdm_pkt_cnt -= (u8)((sta->rssi_stat.packet_map >> i) & BIT(0)); - sta->rssi_stat.packet_map = sta->rssi_stat.packet_map << 1; - } - - /* if(entry) */ - - /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */ - if (sta->rssi_stat.ofdm_pkt_cnt == 64) { /* speed up when all packets are OFDM*/ - undecorated_smoothed_pwdb = undecorated_smoothed_ofdm; - PHYDM_DBG(dm, DBG_RSSI_MNTR, "PWDB_0[%d] = (( %d ))\n", pktinfo->station_id, undecorated_smoothed_cck); - } else { - if (sta->rssi_stat.valid_bit < 64) - sta->rssi_stat.valid_bit++; - - if (sta->rssi_stat.valid_bit == 64) { - weighting = ((sta->rssi_stat.ofdm_pkt_cnt) > 4) ? 64 : (sta->rssi_stat.ofdm_pkt_cnt << 4); - undecorated_smoothed_pwdb = (s8)((weighting * undecorated_smoothed_ofdm + (64 - weighting) * undecorated_smoothed_cck) >> 6); - PHYDM_DBG(dm, DBG_RSSI_MNTR, "PWDB_1[%d] = (( %d )), W = (( %d ))\n", pktinfo->station_id, undecorated_smoothed_cck, weighting); - } else { - if (sta->rssi_stat.valid_bit != 0) - undecorated_smoothed_pwdb = - (sta->rssi_stat.ofdm_pkt_cnt * undecorated_smoothed_ofdm + (sta->rssi_stat.valid_bit - sta->rssi_stat.ofdm_pkt_cnt) * undecorated_smoothed_cck) / sta->rssi_stat.valid_bit; + if ((rssi_max - rssi_min) < 3) + rssi_ave = rssi_max; + else if ((rssi_max - rssi_min) < 6) + rssi_ave = rssi_max - 1; + else if ((rssi_max - rssi_min) < 10) + rssi_ave = rssi_max - 2; else - undecorated_smoothed_pwdb = 0; - - PHYDM_DBG(dm, DBG_RSSI_MNTR, "PWDB_2[%d] = (( %d )), ofdm_pkt = (( %d )), Valid_Bit = (( %d ))\n", - pktinfo->station_id, undecorated_smoothed_cck, sta->rssi_stat.ofdm_pkt_cnt, sta->rssi_stat.valid_bit); + rssi_ave = rssi_max - 3; } } - - if ((sta->rssi_stat.ofdm_pkt_cnt >= 1 || sta->rssi_stat.cck_pkt_cnt >= 5) && (sta->rssi_stat.is_send_rssi == RA_RSSI_STATE_INIT)) { - send_rssi_2_fw = 1; - sta->rssi_stat.is_send_rssi = RA_RSSI_STATE_SEND; + /* OFDM MA RSSI */ + if (rssi_ofdm_tmp <= 0) { /* @initialize */ + rssi_ofdm_tmp = (s8)phy_info->rx_pwdb_all; + } else { + rssi_ofdm_tmp = (s8)WEIGHTING_AVG(rssi_ofdm_tmp, + (1 << RSSI_MA) - 1, + rssi_ave, 1); + if (phy_info->rx_pwdb_all > (u32)rssi_ofdm_tmp) + rssi_ofdm_tmp++; } - sta->rssi_stat.rssi_cck = undecorated_smoothed_cck; - sta->rssi_stat.rssi_ofdm = undecorated_smoothed_ofdm; - sta->rssi_stat.rssi = undecorated_smoothed_pwdb; + PHYDM_DBG(dm, DBG_RSSI_MNTR, "rssi_ofdm=%d\n", rssi_ofdm_tmp); + } else { +/* @=== [cck RSSI] ========================================================= */ + rssi_ave = phy_info->rx_pwdb_all; + if (rssi_t->cck_pkt_cnt <= 63) + rssi_t->cck_pkt_cnt++; + /* @1 Process CCK RSSI */ + if (rssi_cck_tmp <= 0) { /* @initialize */ + rssi_cck_tmp = (s8)phy_info->rx_pwdb_all; + rssi_t->cck_sum_power = (u16)phy_info->rx_pwdb_all; + rssi_t->cck_pkt_cnt = 1; /*reset*/ + PHYDM_DBG(dm, DBG_RSSI_MNTR, "[1]CCK_INIT\n"); + } else if (rssi_t->cck_pkt_cnt <= CCK_RSSI_INIT_COUNT) { + rssi_t->cck_sum_power = rssi_t->cck_sum_power + + (u16)phy_info->rx_pwdb_all; - if (send_rssi_2_fw) { /* Trigger init rate by RSSI */ - - if (sta->rssi_stat.ofdm_pkt_cnt != 0) - sta->rssi_stat.rssi = undecorated_smoothed_ofdm; + rssi_cck_tmp = rssi_t->cck_sum_power / + rssi_t->cck_pkt_cnt; PHYDM_DBG(dm, DBG_RSSI_MNTR, - "[Send to FW] PWDB = (( %d )), ofdm_pkt = (( %d )), cck_pkt = (( %d ))\n", - undecorated_smoothed_pwdb, sta->rssi_stat.ofdm_pkt_cnt, sta->rssi_stat.cck_pkt_cnt); - + "[2]SumPow=%d, cck_pkt=%d\n", + rssi_t->cck_sum_power, rssi_t->cck_pkt_cnt); + } else { + rssi_cck_tmp = (s8)WEIGHTING_AVG(rssi_cck_tmp, + (1 << RSSI_MA) - 1, + phy_info->rx_pwdb_all, + 1); + if (phy_info->rx_pwdb_all > (u32)rssi_cck_tmp) + rssi_cck_tmp++; } + PHYDM_DBG(dm, DBG_RSSI_MNTR, "rssi_cck=%d\n", rssi_cck_tmp); + } - /* dbg_print("ofdm_pkt=%d, weighting=%d\n", ofdm_pkt_cnt, weighting); */ - /* dbg_print("undecorated_smoothed_ofdm=%d, undecorated_smoothed_pwdb=%d, undecorated_smoothed_cck=%d\n", */ - /* undecorated_smoothed_ofdm, undecorated_smoothed_pwdb, undecorated_smoothed_cck); */ +/* @=== [ofdm + cck weighting RSSI] ========================================= */ + if (!pktinfo->is_cck_rate) { + if (rssi_t->ofdm_pkt_cnt < 8 && !(rssi_t->packet_map & BIT(7))) + rssi_t->ofdm_pkt_cnt++; /*OFDM packet cnt in bitmap*/ + rssi_t->packet_map = (rssi_t->packet_map << 1) | BIT(0); + } else { + if (rssi_t->ofdm_pkt_cnt > 0 && rssi_t->packet_map & BIT(7)) + rssi_t->ofdm_pkt_cnt--; + rssi_t->packet_map = rssi_t->packet_map << 1; + } + + if (rssi_t->ofdm_pkt_cnt == 8) { + rssi_all = rssi_ofdm_tmp; + } else { + if (rssi_t->valid_bit < 8) + rssi_t->valid_bit++; + + if (rssi_t->valid_bit == 8) { + if (rssi_t->ofdm_pkt_cnt > 4) + w1 = 64; + else + w1 = (u32)(rssi_t->ofdm_pkt_cnt << 4); + + w2 = 64 - w1; + + rssi_all = (s8)((w1 * (u32)rssi_ofdm_tmp + + w2 * (u32)rssi_cck_tmp) >> 6); + } else if (rssi_t->valid_bit != 0) { /*@(valid_bit > 8)*/ + w1 = (u32)rssi_t->ofdm_pkt_cnt; + w2 = (u32)(rssi_t->valid_bit - rssi_t->ofdm_pkt_cnt); + rssi_all = (s8)WEIGHTING_AVG((u32)rssi_ofdm_tmp, w1, + (u32)rssi_cck_tmp, w2); + } else { + rssi_all = 0; + } + } + PHYDM_DBG(dm, DBG_RSSI_MNTR, "rssi=%d,w1=%d,w2=%d\n", rssi_all, w1, w2); + + if ((rssi_t->ofdm_pkt_cnt >= 1 || rssi_t->cck_pkt_cnt >= 5) && + rssi_t->is_send_rssi == RA_RSSI_STATE_INIT) { + send_rssi_2_fw = 1; + rssi_t->is_send_rssi = RA_RSSI_STATE_SEND; + } + + rssi_t->rssi_cck = rssi_cck_tmp; + rssi_t->rssi_ofdm = rssi_ofdm_tmp; + rssi_t->rssi = rssi_all; + + if (send_rssi_2_fw) { /* Trigger init rate by RSSI */ + if (rssi_t->ofdm_pkt_cnt != 0) + rssi_t->rssi = rssi_ofdm_tmp; + + PHYDM_DBG(dm, DBG_RSSI_MNTR, + "[Send to FW] PWDB=%d, ofdm_pkt=%d, cck_pkt=%d\n", + rssi_all, rssi_t->ofdm_pkt_cnt, rssi_t->cck_pkt_cnt); + } + +#if 0 + /* @dbg_print("ofdm_pkt=%d, weighting=%d\n", ofdm_pkt_cnt, weighting);*/ + /* @dbg_print("rssi_ofdm_tmp=%d, rssi_all=%d, rssi_cck_tmp=%d\n", */ + /* rssi_ofdm_tmp, rssi_all, rssi_cck_tmp); */ +#endif +} +#endif + +#ifdef PHYSTS_3RD_TYPE_SUPPORT +void phydm_print_phystat_jaguar3(struct dm_struct *dm, u8 *phy_sts, + struct phydm_perpkt_info_struct *pktinfo, + struct phydm_phyinfo_struct *phy_info) +{ + struct phy_sts_rpt_jgr3_type0 *rpt0 = NULL; + struct phy_sts_rpt_jgr3_type1 *rpt1 = NULL; + struct phy_sts_rpt_jgr3_type2_3 *rpt2 = NULL; + struct phy_sts_rpt_jgr3_type4 *rpt3 = NULL; + struct phy_sts_rpt_jgr3_type5 *rpt4 = NULL; + struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; + u8 phy_status_page_num = (*phy_sts & 0xf); + u32 phy_status_tmp[PHY_STATUS_JRGUAR3_DW_LEN] = {0}; + u8 i = 0; + u32 size = PHY_STATUS_JRGUAR3_DW_LEN << 2; + + rpt0 = (struct phy_sts_rpt_jgr3_type0 *)phy_sts; + rpt1 = (struct phy_sts_rpt_jgr3_type1 *)phy_sts; + rpt2 = (struct phy_sts_rpt_jgr3_type2_3 *)phy_sts; + rpt3 = (struct phy_sts_rpt_jgr3_type4 *)phy_sts; + rpt4 = (struct phy_sts_rpt_jgr3_type5 *)phy_sts; + + odm_move_memory(dm, phy_status_tmp, phy_sts, size); + if (!(dm->debug_components & DBG_PHY_STATUS)) + return; + + if (dbg->show_phy_sts_all_pkt == 0) { + if (!pktinfo->is_packet_match_bssid) + return; + } + + dbg->show_phy_sts_cnt++; + + if (dbg->show_phy_sts_max_cnt != SHOW_PHY_STATUS_UNLIMITED) { + if (dbg->show_phy_sts_cnt > dbg->show_phy_sts_max_cnt) + return; + } + + if (phy_status_page_num == 0) + pr_debug("Phy Status Rpt: CCK\n"); + else + pr_debug("Phy Status Rpt: OFDM_%d\n", phy_status_page_num); + + pr_debug("StaID=%d, RxRate = 0x%x match_bssid=%d\n", + pktinfo->station_id, pktinfo->data_rate, + pktinfo->is_packet_match_bssid); + + for (i = 0; i < PHY_STATUS_JRGUAR3_DW_LEN; i++) + pr_debug("Offset[%d:%d] = 0x%x\n", + ((4 * i) + 3), (4 * i), phy_status_tmp[i]); + + if (phy_status_page_num == 0) { /* @CCK(default) */ + pr_debug("[0] Pkt_cnt=%d, Channel_msb=%d, Pwdb_a=%d, Gain_a=%d, TRSW=%d, AGC_table_b=%d, AGC_table_c=%d,\n", + rpt0->pkt_cnt, rpt0->channel_msb, rpt0->pwdb_a, + rpt0->gain_a, rpt0->trsw, rpt0->agc_table_b, + rpt0->agc_table_c); + pr_debug("[4] Path_Sel_o=%d, Gnt_BT_keep_cnt=%d, HW_AntSW_occur_keep_cck=%d,\n Band=%d, Channel=%d, AGC_table_a=%d, l_RXSC=%d, AGC_table_d=%d\n", + rpt0->path_sel_o, rpt0->gnt_bt_keep_cck, + rpt0->hw_antsw_occur_keep_cck, rpt0->band, + rpt0->channel, rpt0->agc_table_a, rpt0->l_rxsc, + rpt0->agc_table_d); + pr_debug("[8] AntIdx={%d, %d, %d, %d}, Length=%d\n", + rpt0->antidx_d, rpt0->antidx_c, rpt0->antidx_b, + rpt0->antidx_a, rpt0->length); + pr_debug("[12] MF_off=%d, SQloss=%d, lockbit=%d, raterr=%d, rxrate=%d, lna_h_a=%d, CCK_BB_power_a=%d, lna_l_a=%d, vga_a=%d, sq=%d\n", + rpt0->mf_off, rpt0->sqloss, rpt0->lockbit, + rpt0->raterr, rpt0->rxrate, rpt0->lna_h_a, + rpt0->bb_power_a, rpt0->lna_l_a, rpt0->vga_a, + rpt0->signal_quality); + pr_debug("[16] Gain_b=%d, lna_h_b=%d, CCK_BB_power_b=%d, lna_l_b=%d, vga_b=%d, Pwdb_b=%d\n", + rpt0->gain_b, rpt0->lna_h_b, rpt0->bb_power_b, + rpt0->lna_l_b, rpt0->vga_b, rpt0->pwdb_b); + pr_debug("[20] Gain_c=%d, lna_h_c=%d, CCK_BB_power_c=%d, lna_l_c=%d, vga_c=%d, Pwdb_c=%d\n", + rpt0->gain_c, rpt0->lna_h_c, rpt0->bb_power_c, + rpt0->lna_l_c, rpt0->vga_c, rpt0->pwdb_c); + pr_debug("[24] Gain_d=%d, lna_h_d=%d, CCK_BB_power_d=%d, lna_l_d=%d, vga_d=%d, Pwdb_d=%d\n", + rpt0->gain_c, rpt0->lna_h_c, rpt0->bb_power_c, + rpt0->lna_l_c, rpt0->vga_c, rpt0->pwdb_c); + } else if (phy_status_page_num == 1) { + pr_debug("[0] pwdb[C:A]={%d, %d, %d}, Channel_pri_msb=%d, Pkt_cnt=%d,\n", + rpt1->pwdb_c, rpt1->pwdb_b, rpt1->pwdb_a, + rpt1->channel_pri_msb, rpt1->pkt_cnt); + pr_debug("[4] BF: %d, stbc=%d, ldpc=%d, gnt_bt=%d, band=%d, Ch_pri_lsb=%d, rxsc[ht, l]={%d, %d}, pwdb[D]=%d\n", + rpt1->beamformed, rpt1->stbc, rpt1->ldpc, rpt1->gnt_bt, + rpt1->band, rpt1->channel_pri_lsb, rpt1->ht_rxsc, + rpt1->l_rxsc, rpt1->pwdb_d); + pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, HW_AntSW_occur[D:A]={%d, %d, %d, %d}, Channel_sec[msb,lsb]={%d, %d}\n", + rpt1->antidx_d, rpt1->antidx_c, + rpt1->antidx_b, rpt1->antidx_a, + rpt1->hw_antsw_occur_d, rpt1->hw_antsw_occur_c, + rpt1->hw_antsw_occur_b, rpt1->hw_antsw_occur_a, + rpt1->channel_sec_msb, rpt1->channel_sec_lsb); + pr_debug("[12] GID=%d, PAID[msb,lsb]={%d,%d}\n", + rpt1->gid, rpt1->paid_msb, rpt1->paid); + pr_debug("[16] RX_EVM[D:A]={%d, %d, %d, %d}\n", + rpt1->rxevm[3], rpt1->rxevm[2], + rpt1->rxevm[1], rpt1->rxevm[0]); + pr_debug("[20] CFO_tail[D:A]={%d, %d, %d, %d}\n", + rpt1->cfo_tail[3], rpt1->cfo_tail[2], + rpt1->cfo_tail[1], rpt1->cfo_tail[0]); + pr_debug("[24] RX_SNR[D:A]={%d, %d, %d, %d}\n\n", + rpt1->rxsnr[3], rpt1->rxsnr[2], + rpt1->rxsnr[1], rpt1->rxsnr[0]); + } else if (phy_status_page_num == 2 || phy_status_page_num == 3) { + pr_debug("[0] pwdb[C:A]={%d, %d, %d}, Channel_mdb=%d, Pkt_cnt=%d\n", + rpt2->pwdb[2], rpt2->pwdb[1], rpt2->pwdb[0], + rpt2->channel_msb, rpt2->pkt_cnt); + pr_debug("[4] BF=%d, STBC=%d, LDPC=%d, Gnt_BT=%d, band=%d, CH_lsb=%d, rxsc[ht, l]={%d, %d}, pwdb_D=%d\n", + rpt2->beamformed, rpt2->stbc, rpt2->ldpc, rpt2->gnt_bt, + rpt2->band, rpt2->channel_lsb, + rpt2->ht_rxsc, rpt2->l_rxsc, rpt2->pwdb[3]); + pr_debug("[8] AgcTab[D:A]={%d, %d, %d, %d}, pwed_th=%d, shift_l_map=%d\n", + rpt2->agc_table_d, rpt2->agc_table_c, + rpt2->agc_table_b, rpt2->agc_table_a, + rpt2->pwed_th, rpt2->shift_l_map); + pr_debug("[12] AvgNoisePowerdB=%d, mp_gain_c[msb, lsb]={%d, %d}, mp_gain_b[msb, lsb]={%d, %d}, mp_gain_a=%d, cnt_cca2agc_rdy=%d\n", + rpt2->avg_noise_pwr_lsb, rpt2->mp_gain_c_msb, + rpt2->mp_gain_c_lsb, rpt2->mp_gain_b_msb, + rpt2->mp_gain_b_lsb, rpt2->mp_gain_a, + rpt2->cnt_cca2agc_rdy); + pr_debug("[16] HT AAGC gain[B:A]={%d, %d}, AAGC step[D:A]={%d, %d, %d, %d}, IsFreqSelectFadimg=%d, mp_gain_d=%d\n", + rpt2->ht_aagc_gain[1], rpt2->ht_aagc_gain[0], + rpt2->aagc_step_d, rpt2->aagc_step_c, + rpt2->aagc_step_b, rpt2->aagc_step_a, + rpt2->is_freq_select_fading, rpt2->mp_gain_d); + pr_debug("[20] DAGC gain ant[B:A]={%d, %d}, HT AAGC gain[D:C]={%d, %d}\n", + rpt2->dagc_gain[1], rpt2->dagc_gain[0], + rpt2->ht_aagc_gain[3], rpt2->ht_aagc_gain[2]); + pr_debug("[24] AvgNoisePwerdB=%d, syn_count[msb, lsb]={%d, %d}, counter=%d, DAGC gain ant[D:C]={%d, %d}\n", + rpt2->avg_noise_pwr_msb, rpt2->syn_count_msb, + rpt2->syn_count_lsb, rpt2->counter, + rpt2->dagc_gain[3], rpt2->dagc_gain[2]); + } else if (phy_status_page_num == 4) { /*type 4*/ + pr_debug("[0] pwdb[C:A]={%d, %d, %d}, Channel_mdb=%d, Pkt_cnt=%d\n", + rpt3->pwdb[2], rpt3->pwdb[1], rpt3->pwdb[0], + rpt3->channel_msb, rpt3->pkt_cnt); + pr_debug("[4] BF=%d, STBC=%d, LDPC=%d, GNT_BT=%d, band=%d, CH_pri=%d, rxsc[ht, l]={%d, %d}, pwdb_D=%d\n", + rpt3->beamformed, rpt3->stbc, rpt3->ldpc, rpt3->gnt_bt, + rpt3->band, rpt3->channel_lsb, rpt3->ht_rxsc, + rpt3->l_rxsc, rpt3->pwdb[3]); + pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, HW_AntSW_occur[D:A]={%d, %d, %d, %d}, Training_done[D:A]={%d, %d, %d, %d},\n BadToneCnt_CN_excess_0=%d, BadToneCnt_min_eign_0=%d\n", + rpt3->antidx_d, rpt3->antidx_c, + rpt3->antidx_b, rpt3->antidx_a, + rpt3->hw_antsw_occur_d, rpt3->hw_antsw_occur_c, + rpt3->hw_antsw_occur_b, rpt3->hw_antsw_occur_a, + rpt3->training_done_d, rpt3->training_done_c, + rpt3->training_done_b, rpt3->training_done_a, + rpt3->bad_tone_cnt_cn_excess_0, + rpt3->bad_tone_cnt_min_eign_0); + pr_debug("[12] avg_cond_num_1_msb=%d, avg_cond_num_1_lsb=%d, avg_cond_num_0=%d, bad_tone_cnt_cn_excess_1=%d,\n bad_tone_cnt_min_eign_1=%d, Tx_pkt_cnt=%d\n", + rpt3->avg_cond_num_1_msb, rpt3->avg_cond_num_1_lsb, + rpt3->avg_cond_num_0, rpt3->bad_tone_cnt_cn_excess_1, + rpt3->bad_tone_cnt_min_eign_1, rpt3->tx_pkt_cnt); + pr_debug("[16] Stream RXEVM[D:A]={%d, %d, %d, %d}\n", + rpt3->rxevm[3], rpt3->rxevm[2], + rpt3->rxevm[1], rpt3->rxevm[0]); + pr_debug("[20] Eigenvalue[D:A]={%d, %d, %d, %d}\n", + rpt3->eigenvalue[3], rpt3->eigenvalue[2], + rpt3->eigenvalue[1], rpt3->eigenvalue[0]); + pr_debug("[24] RX SNR[D:A]={%d, %d, %d, %d}\n", + rpt3->rxsnr[3], rpt3->rxsnr[2], + rpt3->rxsnr[1], rpt3->rxsnr[0]); + } else if (phy_status_page_num == 5) { /*type 5*/ + pr_debug("[0] pwdb[C:A]={%d, %d, %d}, Channel_mdb=%d, Pkt_cnt=%d\n", + rpt4->pwdb[2], rpt4->pwdb[1], rpt4->pwdb[0], + rpt4->channel_msb, rpt4->pkt_cnt); + pr_debug("[4] BF=%d, STBC=%d, LDPC=%d, GNT_BT=%d, band=%d, CH_pri=%d, rxsc[ht, l]={%d, %d}, pwdb_D=%d\n", + rpt4->beamformed, rpt4->stbc, rpt4->ldpc, rpt4->gnt_bt, + rpt4->band, rpt4->channel_lsb, rpt4->ht_rxsc, + rpt4->l_rxsc, rpt4->pwdb[3]); + pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, HW_AntSW_occur[D:A]={%d, %d, %d, %d}\n", + rpt4->antidx_d, rpt4->antidx_c, + rpt4->antidx_b, rpt4->antidx_a, + rpt4->hw_antsw_occur_d, rpt4->hw_antsw_occur_c, + rpt4->hw_antsw_occur_b, rpt4->hw_antsw_occur_a); + pr_debug("[12] Inf_posD[1,0]={%d, %d}, Inf_posC[1,0]={%d, %d}, Inf_posB[1,0]={%d, %d}, Inf_posA[1,0]={%d, %d}, Tx_pkt_cnt=%d\n", + rpt4->inf_pos_1_D_flg, rpt4->inf_pos_0_D_flg, + rpt4->inf_pos_1_C_flg, rpt4->inf_pos_0_C_flg, + rpt4->inf_pos_1_B_flg, rpt4->inf_pos_0_B_flg, + rpt4->inf_pos_1_A_flg, rpt4->inf_pos_0_A_flg, + rpt4->tx_pkt_cnt); + pr_debug("[16] Inf_pos_B[1,0]={%d, %d}, Inf_pos_A[1,0]={%d, %d}\n", + rpt4->inf_pos_1_b, rpt4->inf_pos_0_b, + rpt4->inf_pos_1_a, rpt4->inf_pos_0_a); + pr_debug("[20] Inf_pos_D[1,0]={%d, %d}, Inf_pos_C[1,0]={%d, %d}\n", + rpt4->inf_pos_1_d, rpt4->inf_pos_0_d, + rpt4->inf_pos_1_c, rpt4->inf_pos_0_c); } } -/* - * Endianness before calling this API - * */ - -#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) -/* For 8822B only!! need to move to FW finally */ -/*==============================================*/ - -boolean -phydm_query_is_mu_api( - struct dm_struct *phydm, - u8 ppdu_idx, - u8 *p_data_rate, - u8 *p_gid -) -{ - u8 data_rate = 0, gid = 0; - boolean is_mu = false; - - data_rate = phydm->phy_dbg_info.num_of_ppdu[ppdu_idx]; - gid = phydm->phy_dbg_info.gid_num[ppdu_idx]; - - if (data_rate & BIT(7)) { - is_mu = true; - data_rate = data_rate & ~(BIT(7)); - } else - is_mu = false; - - *p_data_rate = data_rate; - *p_gid = gid; - - return is_mu; - -} - -void -phydm_reset_phy_info( - struct dm_struct *phydm, - struct phydm_phyinfo_struct *phy_info -) +void phydm_reset_phy_info_3rd(struct dm_struct *phydm, + struct phydm_phyinfo_struct *phy_info) { phy_info->rx_pwdb_all = 0; phy_info->signal_quality = 0; @@ -1876,121 +1815,23 @@ phydm_reset_phy_info( odm_memory_set(phydm, phy_info->rx_mimo_evm_dbm, 0, 4); } -void -phydm_print_phy_status_jarguar2( - struct dm_struct *dm, - u8 *phy_status_inf, - struct phydm_perpkt_info_struct *pktinfo, - struct phydm_phyinfo_struct *phy_info, - u8 phy_status_page_num -) +void phydm_per_path_info_3rd(u8 rx_path, s8 pwr, s8 rx_evm, s8 cfo_tail, + s8 rx_snr, struct phydm_phyinfo_struct *phy_info) { - struct phy_status_rpt_jaguar2_type0 *rpt0 = (struct phy_status_rpt_jaguar2_type0 *)phy_status_inf; - struct phy_status_rpt_jaguar2_type1 *rpt = (struct phy_status_rpt_jaguar2_type1 *)phy_status_inf; - struct phy_status_rpt_jaguar2_type2 *rpt2 = (struct phy_status_rpt_jaguar2_type2 *)phy_status_inf; - struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; - u32 phy_status[PHY_STATUS_JRGUAR2_DW_LEN] = {0}; - u8 i; - - odm_move_memory(dm, phy_status, phy_status_inf, (PHY_STATUS_JRGUAR2_DW_LEN<<2)); - - if (!(dm->debug_components & DBG_PHY_STATUS)) - return; - - if (dbg->show_phy_sts_all_pkt == 0) { - if (!pktinfo->is_packet_match_bssid) - { - return; - } - } - - dbg->show_phy_sts_cnt++; - /*dbg_print("cnt=%d, max=%d\n", dbg->show_phy_sts_cnt, dbg->show_phy_sts_max_cnt);*/ - - if (dbg->show_phy_sts_max_cnt != SHOW_PHY_STATUS_UNLIMITED) { - if (dbg->show_phy_sts_cnt > dbg->show_phy_sts_max_cnt) { - return; - } - } - - pr_debug("Phy Status Rpt: OFDM_%d\n", phy_status_page_num); - pr_debug("StaID=%d, RxRate = 0x%x match_bssid=%d\n", pktinfo->station_id, pktinfo->data_rate, pktinfo->is_packet_match_bssid); - - for (i = 0; i < PHY_STATUS_JRGUAR2_DW_LEN; i++) { - pr_debug("Offset[%d:%d] = 0x%x\n", ((4 * i) + 3), (4*i), phy_status[i]); - } - - if (phy_status_page_num == 0) { - pr_debug("[0] TRSW=%d, MP_gain_idx=%d, pwdb=%d\n", rpt0->trsw, rpt0->gain, rpt0->pwdb); - pr_debug("[4] band=%d, CH=%d, agc_table = %d, rxsc = %d\n", rpt0->band, rpt0->channel, rpt0->agc_table, rpt0->rxsc); - pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, LSIG_len=%d\n", - rpt0->antidx_d, rpt0->antidx_c, rpt0->antidx_b, rpt0->antidx_a, rpt0->length); - pr_debug("[12] lna_h=%d, bb_power=%d, lna_l=%d, vga=%d, sq=%d\n", - rpt0->lna_h, rpt0->bb_power, rpt0->lna_l, rpt0->vga, rpt0->signal_quality); - - } else if (phy_status_page_num == 1) { - pr_debug("[0] pwdb[D:A]={%d, %d, %d, %d}\n", - rpt->pwdb[3], rpt->pwdb[2], rpt->pwdb[1], rpt->pwdb[0]); - pr_debug("[4] BF: %d, ldpc=%d, stbc=%d, g_bt=%d, antsw=%d, band=%d, CH=%d, rxsc[ht, l]={%d, %d}\n", - rpt->beamformed, rpt->ldpc, rpt->stbc, rpt->gnt_bt, - rpt->hw_antsw_occu, rpt->band, rpt->channel, rpt->ht_rxsc, rpt->l_rxsc); - pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, LSIG_len=%d\n", - rpt->antidx_d, rpt->antidx_c, rpt->antidx_b, rpt->antidx_a, rpt->lsig_length); - pr_debug("[12] rf_mode=%d, NBI=%d, Intf_pos=%d, GID=%d, PAID=%d\n", - rpt->rf_mode, rpt->nb_intf_flag, - (rpt->intf_pos + (rpt->intf_pos_msb<<8)), rpt->gid, - (rpt->paid + (rpt->paid_msb<<8))); - pr_debug("[16] EVM[D:A]={%d, %d, %d, %d}\n", rpt->rxevm[3], rpt->rxevm[2], rpt->rxevm[1], rpt->rxevm[0]); - pr_debug("[20] CFO[D:A]={%d, %d, %d, %d}\n", rpt->cfo_tail[3], rpt->cfo_tail[2], rpt->cfo_tail[1], rpt->cfo_tail[0]); - pr_debug("[24] SNR[D:A]={%d, %d, %d, %d}\n\n", rpt->rxsnr[3], rpt->rxsnr[2], rpt->rxsnr[1], rpt->rxsnr[0]); - - } else if (phy_status_page_num == 2) { - - pr_debug("[0] pwdb[D:A]={%d, %d, %d, %d}\n", - rpt2->pwdb[3], rpt2->pwdb[2], rpt2->pwdb[1], rpt2->pwdb[0]); - pr_debug("[4] BF: %d, ldpc=%d, stbc=%d, g_bt=%d, antsw=%d, band=%d, CH=%d, rxsc[ht, l]={%d, %d}\n", - rpt2->beamformed, rpt2->ldpc, rpt2->stbc, rpt2->gnt_bt, - rpt2->hw_antsw_occu, rpt2->band, rpt2->channel, rpt2->ht_rxsc, rpt2->l_rxsc); - pr_debug("[8] AgcTab[D:A]={%d, %d, %d, %d}, cnt_pw2cca=%d, shift_l_map=%d\n", - rpt2->agc_table_d, rpt2->agc_table_c, rpt2->agc_table_b, rpt2->agc_table_a, - rpt2->cnt_pw2cca, rpt2->shift_l_map); - pr_debug("[12] (TRSW|Gain)[D:A]={%d %d, %d %d, %d %d, %d %d}, cnt_cca2agc_rdy=%d\n", - rpt2->trsw_d, rpt2->gain_d, rpt2->trsw_c, rpt2->gain_c, - rpt2->trsw_b,rpt2->gain_b, rpt2->trsw_a, rpt2->gain_a, rpt2->cnt_cca2agc_rdy); - pr_debug("[16] AAGC step[D:A]={%d, %d, %d, %d} HT AAGC gain[D:A]={%d, %d, %d, %d}\n", - rpt2->aagc_step_d, rpt2->aagc_step_c, rpt2->aagc_step_b, rpt2->aagc_step_a, - rpt2->ht_aagc_gain[3], rpt2->ht_aagc_gain[2], rpt2->ht_aagc_gain[1], rpt2->ht_aagc_gain[0]); - pr_debug("[20] DAGC gain[D:A]={%d, %d, %d, %d}\n", rpt2->dagc_gain[3], - rpt2->dagc_gain[2], rpt2->dagc_gain[1], rpt2->dagc_gain[0]); - pr_debug("[24] syn_cnt: %d, Cnt=%d\n\n", rpt2->syn_count, rpt2->counter); - } - -} - -void -phydm_set_per_path_phy_info( - u8 rx_path, - s8 rx_pwr, - s8 rx_evm, - s8 cfo_tail, - s8 rx_snr, - struct phydm_phyinfo_struct *phy_info -) -{ - u8 evm_dbm = 0; - u8 evm_percentage = 0; + u8 evm_dbm = 0; + u8 evm_percentage = 0; /* SNR is S(8,1), EVM is S(8,1), CFO is S(8,7) */ if (rx_evm < 0) { - /* Calculate EVM in dBm */ + /* @Calculate EVM in dBm */ evm_dbm = ((u8)(0 - rx_evm) >> 1); if (evm_dbm == 64) - evm_dbm = 0; /*if 1SS rate, evm_dbm [2nd stream] =64*/ + evm_dbm = 0; /*@if 1SS rate, evm_dbm [2nd stream] =64*/ if (evm_dbm != 0) { - /* Convert EVM to 0%~100% percentage */ + /* @Convert EVM to 0%~100% percentage */ if (evm_dbm >= 34) evm_percentage = 100; else @@ -1998,50 +1839,34 @@ phydm_set_per_path_phy_info( } } - phy_info->rx_pwr[rx_path] = rx_pwr; - - phy_info->cfo_tail[rx_path] = (cfo_tail * 5) >> 1; /* CFO(kHz) = CFO_tail * 312.5(kHz) / 2^7 ~= CFO tail * 5/2 (kHz)*/ + phy_info->rx_pwr[rx_path] = pwr; + + /*@CFO(kHz) = CFO_tail * 312.5(kHz) / 2^7 ~= CFO tail * 5/2 (kHz)*/ + phy_info->cfo_tail[rx_path] = (cfo_tail * 5) >> 1; phy_info->rx_mimo_evm_dbm[rx_path] = evm_dbm; - phy_info->rx_mimo_signal_strength[rx_path] = phydm_query_rx_pwr_percentage(rx_pwr); + phy_info->rx_mimo_signal_strength[rx_path] = phydm_pwr_2_percent(pwr); phy_info->rx_mimo_signal_quality[rx_path] = evm_percentage; phy_info->rx_snr[rx_path] = rx_snr >> 1; - -#if 0 - /* if (pktinfo->is_packet_match_bssid) */ - { - dbg_print("path (%d)--------\n", rx_path); - dbg_print("rx_pwr = %d, Signal strength = %d\n", phy_info->rx_pwr[rx_path], phy_info->rx_mimo_signal_strength[rx_path]); - dbg_print("evm_dbm = %d, Signal quality = %d\n", phy_info->rx_mimo_evm_dbm[rx_path], phy_info->rx_mimo_signal_quality[rx_path]); - dbg_print("CFO = %d, SNR = %d\n", phy_info->cfo_tail[rx_path], phy_info->rx_snr[rx_path]); - } -#endif } -void -phydm_set_common_phy_info( - s8 rx_power, - u8 channel, - boolean is_beamformed, - boolean is_mu_packet, - u8 bandwidth, - u8 signal_quality, - u8 rxsc, - struct phydm_phyinfo_struct *phy_info -) +void phydm_common_phy_info_3rd(s8 rx_power, u8 channel, boolean is_beamformed, + boolean is_mu_packet, u8 bandwidth, + u8 signal_quality, u8 rxsc, + struct phydm_phyinfo_struct *phy_info) { - phy_info->rx_power = rx_power; /* RSSI in dB */ - phy_info->recv_signal_power = rx_power; /* RSSI in dB */ - phy_info->channel = channel; /* channel number */ - phy_info->is_beamformed = is_beamformed; /* apply BF */ - phy_info->is_mu_packet = is_mu_packet; /* MU packet */ + phy_info->rx_power = rx_power; /* RSSI in dB */ + phy_info->recv_signal_power = rx_power; /* RSSI in dB */ + phy_info->channel = channel; /* @channel number */ + phy_info->is_beamformed = is_beamformed; /* @apply BF */ + phy_info->is_mu_packet = is_mu_packet; /* @MU packet */ phy_info->rxsc = rxsc; - phy_info->rx_pwdb_all = phydm_query_rx_pwr_percentage(rx_power); /* RSSI in percentage */ - phy_info->signal_quality = signal_quality; /* signal quality */ - phy_info->band_width = bandwidth; /* bandwidth */ + phy_info->rx_pwdb_all = phydm_pwr_2_percent(rx_power); /*percentage */ + phy_info->signal_quality = signal_quality; /* signal quality */ + phy_info->band_width = bandwidth; /* @bandwidth */ #if 0 - /* if (pktinfo->is_packet_match_bssid) */ + /* @if (pktinfo->is_packet_match_bssid) */ { dbg_print("rx_pwdb_all = %d, rx_power = %d, recv_signal_power = %d\n", phy_info->rx_pwdb_all, phy_info->rx_power, phy_info->recv_signal_power); dbg_print("signal_quality = %d\n", phy_info->signal_quality); @@ -2051,202 +1876,1019 @@ phydm_set_common_phy_info( #endif } -void -phydm_get_rx_phy_status_type0( - struct dm_struct *dm, - u8 *phy_status_inf, - struct phydm_perpkt_info_struct *pktinfo, - struct phydm_phyinfo_struct *phy_info -) +void phydm_get_physts_jarguar3_0(struct dm_struct *dm, u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo, + struct phydm_phyinfo_struct *phy_info) { /* type 0 is used for cck packet */ - struct phy_status_rpt_jaguar2_type0 *phy_sta_rpt = (struct phy_status_rpt_jaguar2_type0 *)phy_status_inf; - u8 sq = 0; - s8 rx_power = phy_sta_rpt->pwdb - 110; + struct phy_sts_rpt_jgr3_type0 *phy_sts = NULL; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + u8 sq = 0, i; + s8 rx_power[4]; + s8 rx_pwr_db_max = -120; + phy_sts = (struct phy_sts_rpt_jgr3_type0 *)phy_status_inf; - if (dm->support_ic_type & ODM_RTL8723D) { -#if (RTL8723D_SUPPORT == 1) - rx_power = phy_sta_rpt->pwdb - 97; -#endif - } -/*#if (RTL8710B_SUPPORT == 1)*/ - /*if (dm->support_ic_type & ODM_RTL8710B)*/ - /*rx_power = phy_sta_rpt->pwdb - 97;*/ -/*#endif*/ + rx_power[0] = phy_sts->pwdb_a; + rx_power[1] = phy_sts->pwdb_b; + rx_power[2] = phy_sts->pwdb_c; + rx_power[3] = phy_sts->pwdb_d; -#if (RTL8821C_SUPPORT == 1) - else if (dm->support_ic_type & ODM_RTL8821C) { - if (phy_sta_rpt->pwdb >= -57) - rx_power = phy_sta_rpt->pwdb - 100; - else - rx_power = phy_sta_rpt->pwdb - 102; - } -#endif + #if (RTL8822C_SUPPORT) + if (dm->support_ic_type & ODM_RTL8822C) { + struct phydm_physts *physts_table = &dm->dm_physts_table; + if (phy_sts->gain_a < physts_table->cck_gi_l_bnd) + rx_power[0] += ((physts_table->cck_gi_l_bnd - + phy_sts->gain_a) << 1); + else if (phy_sts->gain_a > physts_table->cck_gi_u_bnd) + rx_power[0] -= ((phy_sts->gain_a - + physts_table->cck_gi_u_bnd) << 1); - if (pktinfo->is_to_self) { - dm->ofdm_agc_idx[0] = phy_sta_rpt->pwdb; - dm->ofdm_agc_idx[1] = 0; - dm->ofdm_agc_idx[2] = 0; - dm->ofdm_agc_idx[3] = 0; - } - - - /* Calculate Signal Quality*/ - if (pktinfo->is_packet_match_bssid) { - if (phy_sta_rpt->signal_quality >= 64) - sq = 0; - else if (phy_sta_rpt->signal_quality <= 20) - sq = 100; - else { - /* mapping to 2~99% */ - sq = 64 - phy_sta_rpt->signal_quality; - sq = ((sq << 3) + sq) >> 2; - } - } - - /* Modify CCK PWDB if old AGC */ - if (dm->cck_new_agc == false) { - #if (RTL8197F_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8197F) - rx_power = phydm_cck_rssi_convert(dm, phy_sta_rpt->lna_l, phy_sta_rpt->vga); - else - #endif - { - u8 lna_idx, vga_idx; - - lna_idx = ((phy_sta_rpt->lna_h << 3) | phy_sta_rpt->lna_l); - vga_idx = phy_sta_rpt->vga; - - #if (RTL8723D_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8723D) - rx_power = odm_cckrssi_8723d(lna_idx, vga_idx); - #endif - - #if (RTL8710B_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8710B) - rx_power = odm_cckrssi_8710b(lna_idx, vga_idx); - #endif - - #if (RTL8822B_SUPPORT == 1) - /* Need to do !! */ - /*if (dm->support_ic_type & ODM_RTL8822B) */ - /*rx_power = odm_CCKRSSI_8822B(LNA_idx, VGA_idx);*/ - #endif - - #if (RTL8821C_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8821C) - rx_power = phydm_cck_rssi_8821c(dm, lna_idx, vga_idx); - #endif - } - - } - - /* Confirm CCK RSSI */ - #if (RTL8197F_SUPPORT == 1) - if (dm->support_ic_type & ODM_RTL8197F) { - u8 bb_pwr_th_l = 5; /* round( 31*0.15 ) */ - u8 bb_pwr_th_h = 27; /* round( 31*0.85 ) */ - - if ((phy_sta_rpt->bb_power < bb_pwr_th_l) || (phy_sta_rpt->bb_power > bb_pwr_th_h)) - rx_power = 0; /* Error RSSI for CCK ; set 100*/ + if (phy_sts->gain_b < physts_table->cck_gi_l_bnd) + rx_power[1] += ((physts_table->cck_gi_l_bnd - + phy_sts->gain_b) << 1); + else if (phy_sts->gain_b > physts_table->cck_gi_u_bnd) + rx_power[1] -= ((phy_sts->gain_b - + physts_table->cck_gi_u_bnd) << 1); } #endif - /*CCK no STBC and LDPC*/ - dm->phy_dbg_info.is_ldpc_pkt = false; - dm->phy_dbg_info.is_stbc_pkt = false; + /* @Setting the RX power: agc_idx -110 dBm*/ + rx_power[0] -= 110; + rx_power[1] -= 110; + rx_power[2] -= 110; + rx_power[3] -= 110; + + for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { + if (rx_power[i] > rx_pwr_db_max) + rx_pwr_db_max = rx_power[i]; + } + if (pktinfo->is_to_self) { + dm->ofdm_agc_idx[0] = phy_sts->pwdb_a; + dm->ofdm_agc_idx[1] = phy_sts->pwdb_b; + dm->ofdm_agc_idx[2] = phy_sts->pwdb_c; + dm->ofdm_agc_idx[3] = phy_sts->pwdb_d; + } + + /* @Calculate Signal Quality*/ + if (phy_sts->signal_quality >= 64) { + sq = 0; + } else if (phy_sts->signal_quality <= 20) { + sq = 100; + } else { + /* @mapping to 2~99% */ + sq = 64 - phy_sts->signal_quality; + sq = ((sq << 3) + sq) >> 2; + } + + /* @Modify CCK PWDB if old AGC */ + if (!dm->cck_new_agc) { + u8 lna_idx[4], vga_idx[4]; + + lna_idx[0] = ((phy_sts->lna_h_a << 3) | phy_sts->lna_l_a); + vga_idx[0] = phy_sts->vga_a; + lna_idx[1] = ((phy_sts->lna_h_b << 3) | phy_sts->lna_l_b); + vga_idx[1] = phy_sts->vga_b; + lna_idx[2] = ((phy_sts->lna_h_c << 3) | phy_sts->lna_l_c); + vga_idx[2] = phy_sts->vga_c; + lna_idx[3] = ((phy_sts->lna_h_d << 3) | phy_sts->lna_l_d); + vga_idx[3] = phy_sts->vga_d; + #if (RTL8198F_SUPPORT) + /*phydm_cck_rssi_8198f*/ + #endif + } + + /*@CCK no STBC and LDPC*/ + dbg_i->is_ldpc_pkt = false; + dbg_i->is_stbc_pkt = false; /* Update Common information */ - phydm_set_common_phy_info(rx_power, phy_sta_rpt->channel, false, - false, CHANNEL_WIDTH_20, sq, phy_sta_rpt->rxsc, phy_info); + phydm_common_phy_info_3rd(rx_pwr_db_max, phy_sts->channel, false, + false, CHANNEL_WIDTH_20, sq, + phy_sts->l_rxsc, phy_info); /* Update CCK pwdb */ - phydm_set_per_path_phy_info(RF_PATH_A, rx_power, 0, 0, 0, phy_info); /* Update per-path information */ + /* Update per-path information */ + for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) + phydm_per_path_info_3rd(i, rx_power[i], 0, 0, 0, phy_info); - dm->dm_fat_table.antsel_rx_keep_0 = phy_sta_rpt->antidx_a; - dm->dm_fat_table.antsel_rx_keep_1 = phy_sta_rpt->antidx_b; - dm->dm_fat_table.antsel_rx_keep_2 = phy_sta_rpt->antidx_c; - dm->dm_fat_table.antsel_rx_keep_3 = phy_sta_rpt->antidx_d; - + #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a; + dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_b; + dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_c; + dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_d; + #endif } -void -phydm_get_rx_phy_status_type1( - struct dm_struct *dm, - u8 *phy_status_inf, - struct phydm_perpkt_info_struct *pktinfo, - struct phydm_phyinfo_struct *phy_info -) +void phydm_get_physts_jarguar3_1(struct dm_struct *dm, u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo, + struct phydm_phyinfo_struct *phy_info) { /* type 1 is used for ofdm packet */ - struct phy_status_rpt_jaguar2_type1 *phy_sta_rpt = (struct phy_status_rpt_jaguar2_type1 *)phy_status_inf; - s8 rx_pwr_db = -120; - s8 rx_path_pwr_db; - u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0; - boolean is_mu; + struct phy_sts_rpt_jgr3_type1 *phy_sts = NULL; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + s8 rx_pwr_db = -120; + s8 rx_path_pwr_db; + u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_cnt = 0; + u8 pwdb[4]; + boolean is_mu; + + phy_sts = (struct phy_sts_rpt_jgr3_type1 *)phy_status_inf; + + pwdb[0] = phy_sts->pwdb_a; + pwdb[1] = phy_sts->pwdb_b; + pwdb[2] = phy_sts->pwdb_c; + pwdb[3] = phy_sts->pwdb_d; /* Update per-path information */ for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { if (dm->rx_ant_status & BIT(i)) { - rx_count++; + rx_cnt++; /* @check the number of the ant */ - if (rx_count > dm->num_rf_path) + if (rx_cnt > dm->num_rf_path) break; - /* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO sq) */ - /* EVM report is reported by stream, not path */ - rx_path_pwr_db = phy_sta_rpt->pwdb[i] - 110; /* per-path pwdb in dB domain */ + /* Update per-path information + * (RSSI_dB RSSI_percentage EVM SNR CFO sq) + */ + /* @EVM report is reported by stream, not path */ + /* @per-path pw (dB)*/ + rx_path_pwr_db = (s8)pwdb[i] - 110; if (pktinfo->is_to_self) - dm->ofdm_agc_idx[i] = phy_sta_rpt->pwdb[i]; + dm->ofdm_agc_idx[i] = pwdb[i]; - phydm_set_per_path_phy_info(i, rx_path_pwr_db, phy_sta_rpt->rxevm[rx_count - 1], - phy_sta_rpt->cfo_tail[i], phy_sta_rpt->rxsnr[i], phy_info); + phydm_per_path_info_3rd(i, rx_path_pwr_db, + phy_sts->rxevm[rx_cnt - 1], + phy_sts->cfo_tail[i], + phy_sts->rxsnr[i], phy_info); + /*@CFO(kHz) = CFO_tail*312.5/2^7 ~= CFO tail*5/2*/ + dbg_i->cfo_tail[i] = (phy_sts->cfo_tail[i] * 5) >> 1; /* search maximum pwdb */ if (rx_path_pwr_db > rx_pwr_db) rx_pwr_db = rx_path_pwr_db; } } - /* mapping RX counter from 1~4 to 0~3 */ + /* @mapping RX counter from 1~4 to 0~3 */ + if (rx_cnt > 0) + phy_info->rx_count = rx_cnt - 1; + + /* @Check if MU packet or not */ + if (phy_sts->gid != 0 && phy_sts->gid != 63) { + is_mu = true; + dbg_i->num_qry_mu_pkt++; + } else { + is_mu = false; + } + + /* @count BF packet */ + dbg_i->num_qry_bf_pkt = dbg_i->num_qry_bf_pkt + phy_sts->beamformed; + + /*STBC or LDPC pkt*/ + dbg_i->is_ldpc_pkt = phy_sts->ldpc; + dbg_i->is_stbc_pkt = phy_sts->stbc; + + /* @Check sub-channel */ + if (pktinfo->data_rate > ODM_RATE11M && + pktinfo->data_rate < ODM_RATEMCS0) + rxsc = phy_sts->l_rxsc; /*@Legacy*/ + else + rxsc = phy_sts->ht_rxsc; /* @HT and VHT */ + + /* @Check RX bandwidth */ + if (rxsc >= 1 && rxsc <= 8) + bw = CHANNEL_WIDTH_20; + else if ((rxsc >= 9) && (rxsc <= 12)) + bw = CHANNEL_WIDTH_40; + else if (rxsc >= 13) + bw = CHANNEL_WIDTH_80; + else + bw = *dm->band_width; + + /* Update packet information */ + /* RX power choose the path with the maximum power */ + phydm_common_phy_info_3rd(rx_pwr_db, phy_sts->channel_pri_lsb, + (boolean)phy_sts->beamformed, is_mu, + bw, phy_info->rx_mimo_signal_quality[0], + rxsc, phy_info); + + phydm_parsing_cfo(dm, pktinfo, phy_sts->cfo_tail, pktinfo->rate_ss); + +#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) + dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a; + dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_b; + dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_c; + dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_d; +#endif +} + +void phydm_get_physts_jarguar3_2_3(struct dm_struct *dm, u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo, + struct phydm_phyinfo_struct *phy_info) +{ + /* type 2 & 3 is used for ofdm packet */ + struct phy_sts_rpt_jgr3_type2_3 *phy_sts = NULL; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + s8 rx_pwr_db_max = -120; + s8 rx_path_pwr_db = 0; + u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0; + + phy_sts = (struct phy_sts_rpt_jgr3_type2_3 *)phy_status_inf; + + /* Update per-path information */ + for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { + if (dm->rx_ant_status & BIT(i)) { + rx_count++; /* @check the number of the ant */ + + if (rx_count > dm->num_rf_path) + break; + + /* Update per-path information + * (RSSI_dB RSSI_percentage EVM SNR CFO sq) + */ + /* @EVM report is reported by stream, not path */ + rx_path_pwr_db = (s8)phy_sts->pwdb[i] - 110; /*@dB*/ + + if (pktinfo->is_to_self) + dm->ofdm_agc_idx[i] = phy_sts->pwdb[i]; + + phydm_per_path_info_3rd(i, rx_path_pwr_db, 0, + 0, 0, phy_info); + + /* search maximum pwdb */ + if (rx_path_pwr_db > rx_pwr_db_max) + rx_pwr_db_max = rx_path_pwr_db; + } + } + + /* @mapping RX counter from 1~4 to 0~3 */ if (rx_count > 0) phy_info->rx_count = rx_count - 1; - /* Check if MU packet or not */ - if ((phy_sta_rpt->gid != 0) && (phy_sta_rpt->gid != 63)) { - is_mu = true; - dm->phy_dbg_info.num_qry_mu_pkt++; - } else - is_mu = false; - - /* count BF packet */ - dm->phy_dbg_info.num_qry_bf_pkt = dm->phy_dbg_info.num_qry_bf_pkt + phy_sta_rpt->beamformed; + /* @count BF packet */ + dbg_i->num_qry_bf_pkt = dm->phy_dbg_info.num_qry_bf_pkt + + phy_sts->beamformed; /*STBC or LDPC pkt*/ - dm->phy_dbg_info.is_ldpc_pkt = phy_sta_rpt->ldpc; - dm->phy_dbg_info.is_stbc_pkt = phy_sta_rpt->stbc; + dbg_i->is_ldpc_pkt = phy_sts->ldpc; + dbg_i->is_stbc_pkt = phy_sts->stbc; - /* Check sub-channel */ - if ((pktinfo->data_rate > ODM_RATE11M) && (pktinfo->data_rate < ODM_RATEMCS0)) - rxsc = phy_sta_rpt->l_rxsc; + /* @Check sub-channel */ + if (pktinfo->data_rate > ODM_RATE11M && + pktinfo->data_rate < ODM_RATEMCS0) + rxsc = phy_sts->l_rxsc; /*@Legacy*/ else - rxsc = phy_sta_rpt->ht_rxsc; + rxsc = phy_sts->ht_rxsc; /* @HT and VHT */ - /* Check RX bandwidth */ + /* @Check RX bandwidth */ + if (rxsc >= 1 && rxsc <= 8) + bw = CHANNEL_WIDTH_20; + else if ((rxsc >= 9) && (rxsc <= 12)) + bw = CHANNEL_WIDTH_40; + else if (rxsc >= 13) + bw = CHANNEL_WIDTH_80; + else + bw = *dm->band_width; + + /* Update packet information */ + /* RX power choose the path with the maximum power */ + phydm_common_phy_info_3rd(rx_pwr_db_max, phy_sts->channel_lsb, + (boolean)phy_sts->beamformed, + false, bw, 0, rxsc, phy_info); +} + +void phydm_get_physts_jarguar3_4(struct dm_struct *dm, u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo, + struct phydm_phyinfo_struct *phy_info) +{ + /* type 4 is used for ofdm packet */ + struct phy_sts_rpt_jgr3_type4 *phy_sts = NULL; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + s8 rx_pwr_db_max = -120; + s8 rx_path_pwr_db = 0; + u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_cnt = 0; + + phy_sts = (struct phy_sts_rpt_jgr3_type4 *)phy_status_inf; + + /* Update per-path information */ + for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { + if (dm->rx_ant_status & BIT(i)) { + rx_cnt++; /* @check the number of the ant */ + + if (rx_cnt > dm->num_rf_path) + break; + + /* Update per-path information + * (RSSI_dB RSSI_percentage EVM SNR CFO sq) + */ + /* @EVM report is reported by stream, not path */ + rx_path_pwr_db = (s8)phy_sts->pwdb[i] - 110; /*@dB*/ + + if (pktinfo->is_to_self) + dm->ofdm_agc_idx[i] = phy_sts->pwdb[i]; + + phydm_per_path_info_3rd(i, rx_path_pwr_db, + phy_sts->rxevm[rx_cnt - 1], + 0, phy_sts->rxsnr[i], + phy_info); + + /* search maximum pwdb */ + if (rx_path_pwr_db > rx_pwr_db_max) + rx_pwr_db_max = rx_path_pwr_db; + } + } + + /* @mapping RX counter from 1~4 to 0~3 */ + if (rx_cnt > 0) + phy_info->rx_count = rx_cnt - 1; + + /* @count BF packet */ + dbg_i->num_qry_bf_pkt = dm->phy_dbg_info.num_qry_bf_pkt + + phy_sts->beamformed; + + /* @STBC or LDPC pkt*/ + dbg_i->is_ldpc_pkt = phy_sts->ldpc; + dbg_i->is_stbc_pkt = phy_sts->stbc; + + /* @Check sub-channel */ + if (pktinfo->data_rate > ODM_RATE11M && + pktinfo->data_rate < ODM_RATEMCS0) + rxsc = phy_sts->l_rxsc; /*@Legacy*/ + else + rxsc = phy_sts->ht_rxsc; /* @HT and VHT */ + + /* @Check RX bandwidth */ + if (rxsc >= 1 && rxsc <= 8) + bw = CHANNEL_WIDTH_20; + else if ((rxsc >= 9) && (rxsc <= 12)) + bw = CHANNEL_WIDTH_40; + else if (rxsc >= 13) + bw = CHANNEL_WIDTH_80; + else + bw = *dm->band_width; + + /* @Conditional number */ + dbg_i->condi_num = (u32)phy_sts->avg_cond_num_0; + + /* Update packet information */ + /* RX power choose the path with the maximum power */ + phydm_common_phy_info_3rd(rx_pwr_db_max, phy_sts->channel_lsb, + (boolean)phy_sts->beamformed, + false, bw, 0, rxsc, phy_info); +} + +void phydm_get_physts_jarguar3_5(struct dm_struct *dm, u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo, + struct phydm_phyinfo_struct *phy_info) +{ + /* type 5 is used for ofdm packet */ + struct phy_sts_rpt_jgr3_type5 *phy_sts = NULL; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + s8 rx_pwr_db_max = -120; + s8 rx_path_pwr_db = 0; + u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0; + + phy_sts = (struct phy_sts_rpt_jgr3_type5 *)phy_status_inf; + + /* Update per-path information */ + for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { + if (dm->rx_ant_status & BIT(i)) { + rx_count++; /* @check the number of the ant */ + + if (rx_count > dm->num_rf_path) + break; + + /* Update per-path information + * (RSSI_dB RSSI_percentage EVM SNR CFO sq) + */ + /* @EVM report is reported by stream, not path */ + rx_path_pwr_db = (s8)phy_sts->pwdb[i] - 110; /*@dB*/ + + if (pktinfo->is_to_self) + dm->ofdm_agc_idx[i] = phy_sts->pwdb[i]; + + phydm_per_path_info_3rd(i, rx_path_pwr_db, + 0, 0, 0, phy_info); + + /* search maximum pwdb */ + if (rx_path_pwr_db > rx_pwr_db_max) + rx_pwr_db_max = rx_path_pwr_db; + } + } + + /* @mapping RX counter from 1~4 to 0~3 */ + if (rx_count > 0) + phy_info->rx_count = rx_count - 1; + + /* @count BF packet */ + dbg_i->num_qry_bf_pkt = dm->phy_dbg_info.num_qry_bf_pkt + + phy_sts->beamformed; + + /*STBC or LDPC pkt*/ + dbg_i->is_ldpc_pkt = phy_sts->ldpc; + dbg_i->is_stbc_pkt = phy_sts->stbc; + + /* @Check sub-channel */ + if (pktinfo->data_rate > ODM_RATE11M && + pktinfo->data_rate < ODM_RATEMCS0) + rxsc = phy_sts->l_rxsc; /*@Legacy*/ + else + rxsc = phy_sts->ht_rxsc; /* @HT and VHT */ + + /* @Check RX bandwidth */ + if (rxsc >= 1 && rxsc <= 8) + bw = CHANNEL_WIDTH_20; + else if ((rxsc >= 9) && (rxsc <= 12)) + bw = CHANNEL_WIDTH_40; + else if (rxsc >= 13) + bw = CHANNEL_WIDTH_80; + else + bw = *dm->band_width; + + /* Update packet information */ + /* RX power choose the path with the maximum power */ + phydm_common_phy_info_3rd(rx_pwr_db_max, phy_sts->channel_lsb, + (boolean)phy_sts->beamformed, + false, bw, 0, rxsc, phy_info); +} + +void phydm_process_dm_rssi_3rd_type(struct dm_struct *dm, + struct phydm_phyinfo_struct *phy_info, + struct phydm_perpkt_info_struct *pktinfo) +{ + struct cmn_sta_info *sta = NULL; + struct rssi_info *rssi_t = NULL; + u8 rssi_tmp = 0; + u64 rssi_linear = 0; + s16 rssi_db = 0; + u8 i = 0; + + /*@[Step4]*/ + + if (pktinfo->station_id >= ODM_ASSOCIATE_ENTRY_NUM) + return; + + sta = dm->phydm_sta_info[pktinfo->station_id]; + + if (!is_sta_active(sta)) + return; + + if (!pktinfo->is_packet_match_bssid) /*@data frame only*/ + return; + + if (!(pktinfo->is_packet_to_self) && !(pktinfo->is_packet_beacon)) + return; + + if (pktinfo->is_packet_beacon) { + dm->phy_dbg_info.num_qry_beacon_pkt++; + dm->phy_dbg_info.beacon_phy_rate = pktinfo->data_rate; + } + + #if (defined(CONFIG_PATH_DIVERSITY)) + if (dm->support_ability & ODM_BB_PATH_DIV) + phydm_process_rssi_for_path_div(dm, phy_info, pktinfo); + #endif + + rssi_t = &sta->rssi_stat; + + if (pktinfo->is_cck_rate) { + rssi_db = phy_info->rx_mimo_signal_strength[0]; /*Path-A*/ + if (rssi_t->rssi_acc == 0) { + rssi_t->rssi_acc = (s16)(rssi_db << RSSI_MA); + rssi_t->rssi = (s8)(rssi_db); + } else { + rssi_t->rssi_acc = MA_ACC(rssi_t->rssi_acc, + rssi_db, RSSI_MA); + rssi_t->rssi = (s8)GET_MA_VAL(rssi_t->rssi_acc, + RSSI_MA); + } + rssi_t->rssi_cck = (s8)rssi_db; + } else { + for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { + rssi_tmp = phy_info->rx_mimo_signal_strength[i]; + if (rssi_tmp != 0) + rssi_linear += phydm_db_2_linear(rssi_tmp); + } + /* @Rounding and removing fractional bits */ + rssi_linear = (rssi_linear + + (1 << (FRAC_BITS - 1))) >> FRAC_BITS; + + switch (phy_info->rx_count + 1) { + case 2: + rssi_linear = DIVIDED_2(rssi_linear); + break; + case 3: + rssi_linear = DIVIDED_3(rssi_linear); + break; + case 4: + rssi_linear = DIVIDED_4(rssi_linear); + break; + } + rssi_db = (s16)odm_convert_to_db(rssi_linear); + + if (rssi_t->rssi_acc == 0) { + rssi_t->rssi_acc = (s16)(rssi_db << RSSI_MA); + rssi_t->rssi = (s8)(rssi_db); + } else { + rssi_t->rssi_acc = MA_ACC(rssi_t->rssi_acc, + rssi_db, RSSI_MA); + rssi_t->rssi = (s8)GET_MA_VAL(rssi_t->rssi_acc, + RSSI_MA); + } + rssi_t->rssi_ofdm = (s8)rssi_db; + } +} + +void phydm_rx_physts_3rd_type(void *dm_void, u8 *phy_sts, + struct phydm_perpkt_info_struct *pktinfo, + struct phydm_phyinfo_struct *phy_info) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; +#ifdef PHYDM_PHYSTAUS_SMP_MODE + struct pkt_process_info *pkt_process = &dm->pkt_proc_struct; +#endif + u8 phy_status_type = (*phy_sts & 0xf); + +#ifdef PHYDM_PHYSTAUS_SMP_MODE + if (pkt_process->phystatus_smp_mode_en && phy_status_type != 0) { + if (pkt_process->pre_ppdu_cnt == pktinfo->ppdu_cnt) + return; + pkt_process->pre_ppdu_cnt = pktinfo->ppdu_cnt; + } +#endif + + /*@[Step 2]*/ + phydm_reset_phy_info_3rd(dm, phy_info); /* @Memory reset */ + + /* Phy status parsing */ + switch (phy_status_type) { + case 0: /*@CCK*/ + phydm_get_physts_jarguar3_0(dm, phy_sts, pktinfo, phy_info); + break; + case 1: + phydm_get_physts_jarguar3_1(dm, phy_sts, pktinfo, phy_info); + break; + case 2: + case 3: + phydm_get_physts_jarguar3_2_3(dm, phy_sts, pktinfo, phy_info); + break; + case 4: + phydm_get_physts_jarguar3_4(dm, phy_sts, pktinfo, phy_info); + break; + case 5: + phydm_get_physts_jarguar3_5(dm, phy_sts, pktinfo, phy_info); + break; + default: + break; + } + + + /*@[Step 1]*/ + phydm_print_phystat_jaguar3(dm, phy_sts, pktinfo, phy_info); +} + +#endif + +#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) +/* @For 8822B only!! need to move to FW finally */ +/*@==============================================*/ + +boolean +phydm_query_is_mu_api(struct dm_struct *phydm, u8 ppdu_idx, u8 *p_data_rate, + u8 *p_gid) +{ + u8 data_rate = 0, gid = 0; + boolean is_mu = false; + + data_rate = phydm->phy_dbg_info.num_of_ppdu[ppdu_idx]; + gid = phydm->phy_dbg_info.gid_num[ppdu_idx]; + + if (data_rate & BIT(7)) { + is_mu = true; + data_rate = data_rate & ~(BIT(7)); + } else { + is_mu = false; + } + + *p_data_rate = data_rate; + *p_gid = gid; + + return is_mu; +} + +void phydm_reset_phy_info(struct dm_struct *phydm, + struct phydm_phyinfo_struct *phy_info) +{ + phy_info->rx_pwdb_all = 0; + phy_info->signal_quality = 0; + phy_info->band_width = 0; + phy_info->rx_count = 0; + odm_memory_set(phydm, phy_info->rx_mimo_signal_quality, 0, 4); + odm_memory_set(phydm, phy_info->rx_mimo_signal_strength, 0, 4); + odm_memory_set(phydm, phy_info->rx_snr, 0, 4); + + phy_info->rx_power = -110; + phy_info->recv_signal_power = -110; + phy_info->bt_rx_rssi_percentage = 0; + phy_info->signal_strength = 0; + phy_info->channel = 0; + phy_info->is_mu_packet = 0; + phy_info->is_beamformed = 0; + phy_info->rxsc = 0; + odm_memory_set(phydm, phy_info->rx_pwr, -110, 4); + odm_memory_set(phydm, phy_info->cfo_short, 0, 8); + odm_memory_set(phydm, phy_info->cfo_tail, 0, 8); + odm_memory_set(phydm, phy_info->ant_idx, 0, 4); + + odm_memory_set(phydm, phy_info->rx_mimo_evm_dbm, 0, 4); +} + +void phydm_print_phy_sts_jgr2(struct dm_struct *dm, u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo, + struct phydm_phyinfo_struct *phy_info) +{ + struct phy_sts_rpt_jgr2_type0 *rpt0 = NULL; + struct phy_sts_rpt_jgr2_type1 *rpt = NULL; + struct phy_sts_rpt_jgr2_type2 *rpt2 = NULL; + struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; + u8 phy_status_page_num = (*phy_status_inf & 0xf); + u32 phy_status[PHY_STATUS_JRGUAR2_DW_LEN] = {0}; + u8 i; + u32 size = PHY_STATUS_JRGUAR2_DW_LEN << 2; + + rpt0 = (struct phy_sts_rpt_jgr2_type0 *)phy_status_inf; + rpt = (struct phy_sts_rpt_jgr2_type1 *)phy_status_inf; + rpt2 = (struct phy_sts_rpt_jgr2_type2 *)phy_status_inf; + + odm_move_memory(dm, phy_status, phy_status_inf, size); + + if (!(dm->debug_components & DBG_PHY_STATUS)) + return; + + if (dbg->show_phy_sts_all_pkt == 0) { + if (!pktinfo->is_packet_match_bssid) + return; + } + + dbg->show_phy_sts_cnt++; + #if 0 + dbg_print("cnt=%d, max=%d\n", + dbg->show_phy_sts_cnt, dbg->show_phy_sts_max_cnt); + #endif + + if (dbg->show_phy_sts_max_cnt != SHOW_PHY_STATUS_UNLIMITED) { + if (dbg->show_phy_sts_cnt > dbg->show_phy_sts_max_cnt) + return; + } + + pr_debug("Phy Status Rpt: OFDM_%d\n", phy_status_page_num); + pr_debug("StaID=%d, RxRate = 0x%x match_bssid=%d\n", + pktinfo->station_id, pktinfo->data_rate, + pktinfo->is_packet_match_bssid); + + for (i = 0; i < PHY_STATUS_JRGUAR2_DW_LEN; i++) + pr_debug("Offset[%d:%d] = 0x%x\n", + ((4 * i) + 3), (4 * i), phy_status[i]); + + if (phy_status_page_num == 0) { + pr_debug("[0] TRSW=%d, MP_gain_idx=%d, pwdb=%d\n", + rpt0->trsw, rpt0->gain, rpt0->pwdb); + pr_debug("[4] band=%d, CH=%d, agc_table = %d, rxsc = %d\n", + rpt0->band, rpt0->channel, + rpt0->agc_table, rpt0->rxsc); + pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, LSIG_len=%d\n", + rpt0->antidx_d, rpt0->antidx_c, rpt0->antidx_b, + rpt0->antidx_a, rpt0->length); + pr_debug("[12] lna_h=%d, bb_pwr=%d, lna_l=%d, vga=%d, sq=%d\n", + rpt0->lna_h, rpt0->bb_power, rpt0->lna_l, + rpt0->vga, rpt0->signal_quality); + + } else if (phy_status_page_num == 1) { + pr_debug("[0] pwdb[D:A]={%d, %d, %d, %d}\n", + rpt->pwdb[3], rpt->pwdb[2], + rpt->pwdb[1], rpt->pwdb[0]); + pr_debug("[4] BF: %d, ldpc=%d, stbc=%d, g_bt=%d, antsw=%d, band=%d, CH=%d, rxsc[ht, l]={%d, %d}\n", + rpt->beamformed, rpt->ldpc, rpt->stbc, rpt->gnt_bt, + rpt->hw_antsw_occu, rpt->band, rpt->channel, + rpt->ht_rxsc, rpt->l_rxsc); + pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, LSIG_len=%d\n", + rpt->antidx_d, rpt->antidx_c, rpt->antidx_b, + rpt->antidx_a, rpt->lsig_length); + pr_debug("[12] rf_mode=%d, NBI=%d, Intf_pos=%d, GID=%d, PAID=%d\n", + rpt->rf_mode, rpt->nb_intf_flag, + (rpt->intf_pos + (rpt->intf_pos_msb << 8)), rpt->gid, + (rpt->paid + (rpt->paid_msb << 8))); + pr_debug("[16] EVM[D:A]={%d, %d, %d, %d}\n", + rpt->rxevm[3], rpt->rxevm[2], + rpt->rxevm[1], rpt->rxevm[0]); + pr_debug("[20] CFO[D:A]={%d, %d, %d, %d}\n", + rpt->cfo_tail[3], rpt->cfo_tail[2], rpt->cfo_tail[1], + rpt->cfo_tail[0]); + pr_debug("[24] SNR[D:A]={%d, %d, %d, %d}\n\n", + rpt->rxsnr[3], rpt->rxsnr[2], rpt->rxsnr[1], + rpt->rxsnr[0]); + + } else if (phy_status_page_num == 2) { + pr_debug("[0] pwdb[D:A]={%d, %d, %d, %d}\n", + rpt2->pwdb[3], rpt2->pwdb[2], rpt2->pwdb[1], + rpt2->pwdb[0]); + pr_debug("[4] BF: %d, ldpc=%d, stbc=%d, g_bt=%d, antsw=%d, band=%d, CH=%d, rxsc[ht,l]={%d, %d}\n", + rpt2->beamformed, rpt2->ldpc, rpt2->stbc, rpt2->gnt_bt, + rpt2->hw_antsw_occu, rpt2->band, rpt2->channel, + rpt2->ht_rxsc, rpt2->l_rxsc); + pr_debug("[8] AgcTab[D:A]={%d, %d, %d, %d}, cnt_pw2cca=%d, shift_l_map=%d\n", + rpt2->agc_table_d, rpt2->agc_table_c, + rpt2->agc_table_b, rpt2->agc_table_a, + rpt2->cnt_pw2cca, rpt2->shift_l_map); + pr_debug("[12] (TRSW|Gain)[D:A]={%d %d, %d %d, %d %d, %d %d}, cnt_cca2agc_rdy=%d\n", + rpt2->trsw_d, rpt2->gain_d, rpt2->trsw_c, rpt2->gain_c, + rpt2->trsw_b, rpt2->gain_b, rpt2->trsw_a, + rpt2->gain_a, rpt2->cnt_cca2agc_rdy); + pr_debug("[16] AAGC step[D:A]={%d, %d, %d, %d} HT AAGC gain[D:A]={%d, %d, %d, %d}\n", + rpt2->aagc_step_d, rpt2->aagc_step_c, + rpt2->aagc_step_b, rpt2->aagc_step_a, + rpt2->ht_aagc_gain[3], rpt2->ht_aagc_gain[2], + rpt2->ht_aagc_gain[1], rpt2->ht_aagc_gain[0]); + pr_debug("[20] DAGC gain[D:A]={%d, %d, %d, %d}\n", + rpt2->dagc_gain[3], + rpt2->dagc_gain[2], rpt2->dagc_gain[1], + rpt2->dagc_gain[0]); + pr_debug("[24] syn_cnt: %d, Cnt=%d\n\n", + rpt2->syn_count, rpt2->counter); + } +} + +void phydm_set_per_path_phy_info(u8 rx_path, s8 pwr, s8 rx_evm, s8 cfo_tail, + s8 rx_snr, u8 ant_idx, + struct phydm_phyinfo_struct *phy_info) +{ + u8 evm_dbm = 0; + u8 evm_percentage = 0; + + /* SNR is S(8,1), EVM is S(8,1), CFO is S(8,7) */ + + if (rx_evm < 0) { + /* @Calculate EVM in dBm */ + evm_dbm = ((u8)(0 - rx_evm) >> 1); + + if (evm_dbm == 64) + evm_dbm = 0; /*@if 1SS rate, evm_dbm [2nd stream] =64*/ + + if (evm_dbm != 0) { + /* @Convert EVM to 0%~100% percentage */ + if (evm_dbm >= 34) + evm_percentage = 100; + else + evm_percentage = (evm_dbm << 1) + (evm_dbm); + } + } + + phy_info->rx_pwr[rx_path] = pwr; + + /*@CFO(kHz) = CFO_tail * 312.5(kHz) / 2^7 ~= CFO tail * 5/2 (kHz)*/ + phy_info->cfo_tail[rx_path] = (cfo_tail * 5) >> 1; + phy_info->rx_mimo_evm_dbm[rx_path] = evm_dbm; + phy_info->rx_mimo_signal_strength[rx_path] = phydm_pwr_2_percent(pwr); + phy_info->rx_mimo_signal_quality[rx_path] = evm_percentage; + phy_info->rx_snr[rx_path] = rx_snr >> 1; + phy_info->ant_idx[rx_path] = ant_idx; + +#if 0 + if (!pktinfo->is_packet_match_bssid) + return; + + dbg_print("path (%d)--------\n", rx_path); + dbg_print("rx_pwr = %d, Signal strength = %d\n", + phy_info->rx_pwr[rx_path], + phy_info->rx_mimo_signal_strength[rx_path]); + dbg_print("evm_dbm = %d, Signal quality = %d\n", + phy_info->rx_mimo_evm_dbm[rx_path], + phy_info->rx_mimo_signal_quality[rx_path]); + dbg_print("CFO = %d, SNR = %d\n", + phy_info->cfo_tail[rx_path], phy_info->rx_snr[rx_path]); + +#endif +} + +void phydm_set_common_phy_info(s8 rx_power, u8 channel, boolean is_beamformed, + boolean is_mu_packet, u8 bandwidth, + u8 signal_quality, u8 rxsc, + struct phydm_phyinfo_struct *phy_info) +{ + phy_info->rx_power = rx_power; /* RSSI in dB */ + phy_info->recv_signal_power = rx_power; /* RSSI in dB */ + phy_info->channel = channel; /* @channel number */ + phy_info->is_beamformed = is_beamformed; /* @apply BF */ + phy_info->is_mu_packet = is_mu_packet; /* @MU packet */ + phy_info->rxsc = rxsc; + + /* RSSI in percentage */ + phy_info->rx_pwdb_all = phydm_pwr_2_percent(rx_power); + phy_info->signal_quality = signal_quality; /* signal quality */ + phy_info->band_width = bandwidth; /* @bandwidth */ + +#if 0 + if (!pktinfo->is_packet_match_bssid) + return; + + dbg_print("rx_pwdb_all = %d, rx_power = %d, recv_signal_power = %d\n", + phy_info->rx_pwdb_all, phy_info->rx_power, + phy_info->recv_signal_power); + dbg_print("signal_quality = %d\n", phy_info->signal_quality); + dbg_print("is_beamformed = %d, is_mu_packet = %d, rx_count = %d\n", + phy_info->is_beamformed, phy_info->is_mu_packet, + phy_info->rx_count + 1); + dbg_print("channel = %d, rxsc = %d, band_width = %d\n", channel, + rxsc, bandwidth); + +#endif +} + +void phydm_get_phy_sts_type0(struct dm_struct *dm, u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo, + struct phydm_phyinfo_struct *phy_info) +{ + /* type 0 is used for cck packet */ + struct phy_sts_rpt_jgr2_type0 *phy_sts = NULL; + u8 sq = 0; + s8 rx_pow = 0; + u8 lna_idx = 0, vga_idx = 0; + u8 ant_idx; + + phy_sts = (struct phy_sts_rpt_jgr2_type0 *)phy_status_inf; + rx_pow = phy_sts->pwdb - 110; + + /* Fill in per-path antenna index */ + ant_idx = phy_sts->antidx_a; + + if (dm->support_ic_type & ODM_RTL8723D) { + #if (RTL8723D_SUPPORT) + rx_pow = phy_sts->pwdb - 97; + #endif + } + #if (RTL8821C_SUPPORT) + else if (dm->support_ic_type & ODM_RTL8821C) { + if (phy_sts->pwdb >= -57) + rx_pow = phy_sts->pwdb - 100; + else + rx_pow = phy_sts->pwdb - 102; + } + #endif + + if (pktinfo->is_to_self) { + dm->ofdm_agc_idx[0] = phy_sts->pwdb; + dm->ofdm_agc_idx[1] = 0; + dm->ofdm_agc_idx[2] = 0; + dm->ofdm_agc_idx[3] = 0; + } + + /* @Calculate Signal Quality*/ + if (phy_sts->signal_quality >= 64) { + sq = 0; + } else if (phy_sts->signal_quality <= 20) { + sq = 100; + } else { + /* @mapping to 2~99% */ + sq = 64 - phy_sts->signal_quality; + sq = ((sq << 3) + sq) >> 2; + } + + /* @Get RSSI for old CCK AGC */ + if (!dm->cck_new_agc) { + vga_idx = phy_sts->vga; + + if (dm->support_ic_type & ODM_RTL8197F) { + /*@3bit LNA*/ + lna_idx = phy_sts->lna_l; + } else { + /*@4bit LNA*/ + lna_idx = (phy_sts->lna_h << 3) | phy_sts->lna_l; + } + rx_pow = phydm_get_cck_rssi(dm, lna_idx, vga_idx); + } + + /* @Confirm CCK RSSI */ + #if (RTL8197F_SUPPORT) + if (dm->support_ic_type & ODM_RTL8197F) { + u8 bb_pwr_th_l = 5; /* round( 31*0.15 ) */ + u8 bb_pwr_th_h = 27; /* round( 31*0.85 ) */ + + if (phy_sts->bb_power < bb_pwr_th_l || + phy_sts->bb_power > bb_pwr_th_h) + rx_pow = 0; /* @Error RSSI for CCK ; set 100*/ + } + #endif + + /*@CCK no STBC and LDPC*/ + dm->phy_dbg_info.is_ldpc_pkt = false; + dm->phy_dbg_info.is_stbc_pkt = false; + + /* Update Common information */ + phydm_set_common_phy_info(rx_pow, phy_sts->channel, false, + false, CHANNEL_WIDTH_20, sq, + phy_sts->rxsc, phy_info); + /* Update CCK pwdb */ + phydm_set_per_path_phy_info(RF_PATH_A, rx_pow, 0, 0, 0, ant_idx, + phy_info); + + #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY + dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a; + dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_b; + dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_c; + dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_d; + #endif +} + +void phydm_get_phy_sts_type1(struct dm_struct *dm, u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo, + struct phydm_phyinfo_struct *phy_info) +{ + /* type 1 is used for ofdm packet */ + struct phy_sts_rpt_jgr2_type1 *phy_sts = NULL; + struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; + s8 rx_pwr_db = -120; + s8 rx_pwr = 0; + u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0; + boolean is_mu; + u8 ant_idx[4]; + + phy_sts = (struct phy_sts_rpt_jgr2_type1 *)phy_status_inf; + + /* Fill in per-path antenna index */ + ant_idx[0] = phy_sts->antidx_a; + ant_idx[1] = phy_sts->antidx_b; + ant_idx[2] = phy_sts->antidx_c; + ant_idx[3] = phy_sts->antidx_d; + + /* Update per-path information */ + for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { + if (!(dm->rx_ant_status & BIT(i))) + continue; + rx_count++; + + if (rx_count > dm->num_rf_path) + break; + + /* Update per-path information + * (RSSI_dB RSSI_percentage EVM SNR CFO sq) + */ + /* @EVM report is reported by stream, not path */ + rx_pwr = phy_sts->pwdb[i] - 110; /* per-path pwdb(dB)*/ + + if (pktinfo->is_to_self) + dm->ofdm_agc_idx[i] = phy_sts->pwdb[i]; + + phydm_set_per_path_phy_info(i, rx_pwr, + phy_sts->rxevm[rx_count - 1], + phy_sts->cfo_tail[i], + phy_sts->rxsnr[i], + ant_idx[i], phy_info); + /* search maximum pwdb */ + if (rx_pwr > rx_pwr_db) + rx_pwr_db = rx_pwr; + } + + /* @mapping RX counter from 1~4 to 0~3 */ + if (rx_count > 0) + phy_info->rx_count = rx_count - 1; + + /* @Check if MU packet or not */ + if (phy_sts->gid != 0 && phy_sts->gid != 63) { + is_mu = true; + dbg_i->num_qry_mu_pkt++; + } else { + is_mu = false; + } + + /* @count BF packet */ + dbg_i->num_qry_bf_pkt = dbg_i->num_qry_bf_pkt + phy_sts->beamformed; + + /*STBC or LDPC pkt*/ + dbg_i->is_ldpc_pkt = phy_sts->ldpc; + dbg_i->is_stbc_pkt = phy_sts->stbc; + + /* @Check sub-channel */ + if (pktinfo->data_rate > ODM_RATE11M && + pktinfo->data_rate < ODM_RATEMCS0) + rxsc = phy_sts->l_rxsc; + else + rxsc = phy_sts->ht_rxsc; + + /* @Check RX bandwidth */ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - if ((rxsc >= 1) && (rxsc <= 8)) + if (rxsc >= 1 && rxsc <= 8) bw = CHANNEL_WIDTH_20; else if ((rxsc >= 9) && (rxsc <= 12)) bw = CHANNEL_WIDTH_40; else if (rxsc >= 13) bw = CHANNEL_WIDTH_80; else - bw = phy_sta_rpt->rf_mode; - + bw = phy_sts->rf_mode; + } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { - if (phy_sta_rpt->rf_mode == 0) + if (phy_sts->rf_mode == 0) bw = CHANNEL_WIDTH_20; else if ((rxsc == 1) || (rxsc == 2)) bw = CHANNEL_WIDTH_20; @@ -2255,81 +2897,89 @@ phydm_get_rx_phy_status_type1( } /* Update packet information */ - phydm_set_common_phy_info(rx_pwr_db, phy_sta_rpt->channel, (boolean)phy_sta_rpt->beamformed, - is_mu, bw, phy_info->rx_mimo_signal_quality[0], rxsc, phy_info); + phydm_set_common_phy_info(rx_pwr_db, phy_sts->channel, + (boolean)phy_sts->beamformed, is_mu, bw, + phy_info->rx_mimo_signal_quality[0], + rxsc, phy_info); - phydm_parsing_cfo(dm, pktinfo, phy_sta_rpt->cfo_tail, pktinfo->rate_ss); + phydm_parsing_cfo(dm, pktinfo, phy_sts->cfo_tail, pktinfo->rate_ss); + #ifdef PHYDM_LNA_SAT_CHK_TYPE2 + phydm_parsing_snr(dm, pktinfo, phy_sts->rxsnr); + #endif #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) - dm->dm_fat_table.antsel_rx_keep_0 = phy_sta_rpt->antidx_a; - dm->dm_fat_table.antsel_rx_keep_1 = phy_sta_rpt->antidx_b; - dm->dm_fat_table.antsel_rx_keep_2 = phy_sta_rpt->antidx_c; - dm->dm_fat_table.antsel_rx_keep_3 = phy_sta_rpt->antidx_d; + dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a; + dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_b; + dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_c; + dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_d; #endif } -void -phydm_get_rx_phy_status_type2( - struct dm_struct *dm, - u8 *phy_status_inf, - struct phydm_perpkt_info_struct *pktinfo, - struct phydm_phyinfo_struct *phy_info -) +void phydm_get_phy_sts_type2(struct dm_struct *dm, u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo, + struct phydm_phyinfo_struct *phy_info) { - struct phy_status_rpt_jaguar2_type2 *phy_sta_rpt = (struct phy_status_rpt_jaguar2_type2 *)phy_status_inf; - s8 rx_pwr_db_max = -120; - s8 rx_path_pwr_db; - u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0; - + struct phy_sts_rpt_jgr2_type2 *phy_sts = NULL; + s8 rx_pwr_db_max = -120; + s8 rx_pwr = 0; + u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0; + + phy_sts = (struct phy_sts_rpt_jgr2_type2 *)phy_status_inf; + for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { - if (dm->rx_ant_status & BIT(i)) { - - rx_count++; - - if (rx_count > dm->num_rf_path) - break; + if (!(dm->rx_ant_status & BIT(i))) + continue; + rx_count++; - /* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO sq) */ - #if (RTL8197F_SUPPORT == 1) - if ((dm->support_ic_type & ODM_RTL8197F) && (phy_sta_rpt->pwdb[i] == 0x7f)) { /*for 97f workaround*/ + if (rx_count > dm->num_rf_path) + break; - if (i == RF_PATH_A) { - rx_path_pwr_db = (phy_sta_rpt->gain_a) << 1; - rx_path_pwr_db = rx_path_pwr_db - 110; - } else if (i == RF_PATH_B) { - rx_path_pwr_db = (phy_sta_rpt->gain_b) << 1; - rx_path_pwr_db = rx_path_pwr_db - 110; - } else - rx_path_pwr_db = 0; - } else - #endif - rx_path_pwr_db = phy_sta_rpt->pwdb[i] - 110; /*unit: (dBm)*/ + /* Update per-path information*/ + /* RSSI_dB, RSSI_percentage, EVM, SNR, CFO, sq */ + #if (RTL8197F_SUPPORT) + if ((dm->support_ic_type & ODM_RTL8197F) && + phy_sts->pwdb[i] == 0x7f) { /*@97f workaround*/ - phydm_set_per_path_phy_info(i, rx_path_pwr_db, 0, 0, 0, phy_info); + if (i == RF_PATH_A) { + rx_pwr = (phy_sts->gain_a) << 1; + rx_pwr = rx_pwr - 110; + } else if (i == RF_PATH_B) { + rx_pwr = (phy_sts->gain_b) << 1; + rx_pwr = rx_pwr - 110; + } else { + rx_pwr = 0; + } + } else + #endif + rx_pwr = phy_sts->pwdb[i] - 110; /*@dBm*/ - if (rx_path_pwr_db > rx_pwr_db_max /* search maximum pwdb */) - rx_pwr_db_max = rx_path_pwr_db; - } + phydm_set_per_path_phy_info(i, rx_pwr, 0, 0, 0, 0, phy_info); + + if (rx_pwr > rx_pwr_db_max) /* search max pwdb */ + rx_pwr_db_max = rx_pwr; } - /* mapping RX counter from 1~4 to 0~3 */ + /* @mapping RX counter from 1~4 to 0~3 */ if (rx_count > 0) phy_info->rx_count = rx_count - 1; - /* Check RX sub-channel */ - if ((pktinfo->data_rate > ODM_RATE11M) && (pktinfo->data_rate < ODM_RATEMCS0)) - rxsc = phy_sta_rpt->l_rxsc; + /* @Check RX sub-channel */ + if (pktinfo->data_rate > ODM_RATE11M && + pktinfo->data_rate < ODM_RATEMCS0) + rxsc = phy_sts->l_rxsc; else - rxsc = phy_sta_rpt->ht_rxsc; + rxsc = phy_sts->ht_rxsc; /*STBC or LDPC pkt*/ - dm->phy_dbg_info.is_ldpc_pkt = phy_sta_rpt->ldpc; - dm->phy_dbg_info.is_stbc_pkt = phy_sta_rpt->stbc; + dm->phy_dbg_info.is_ldpc_pkt = phy_sts->ldpc; + dm->phy_dbg_info.is_stbc_pkt = phy_sts->stbc; - /* Check RX bandwidth */ - /* the BW information of sc=0 is useless, because there is no information of RF mode*/ + /* @Check RX bandwidth */ + /* @BW information of sc=0 is useless, + *because there is no information of RF mode + */ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - if ((rxsc >= 1) && (rxsc <= 8)) + if (rxsc >= 1 && rxsc <= 8) bw = CHANNEL_WIDTH_20; else if ((rxsc >= 9) && (rxsc <= 12)) bw = CHANNEL_WIDTH_40; @@ -2344,22 +2994,22 @@ phydm_get_rx_phy_status_type2( } /* Update packet information */ - phydm_set_common_phy_info(rx_pwr_db_max, phy_sta_rpt->channel, (boolean)phy_sta_rpt->beamformed, + phydm_set_common_phy_info(rx_pwr_db_max, phy_sts->channel, + (boolean)phy_sts->beamformed, false, bw, 0, rxsc, phy_info); } -void -phydm_process_rssi_for_dm_new_type( - struct dm_struct *dm, - struct phydm_phyinfo_struct *phy_info, - struct phydm_perpkt_info_struct *pktinfo -) +void phydm_process_rssi_for_dm_2nd_type(struct dm_struct *dm, + struct phydm_phyinfo_struct *phy_info, + struct phydm_perpkt_info_struct *pktinfo + ) { - s32 rssi_pre; - u32 rssi_linear = 0; - s16 rssi_avg_db = 0; - u8 i; - struct cmn_sta_info *sta; + struct cmn_sta_info *sta = NULL; + struct rssi_info *rssi_t = NULL; + u8 rssi_tmp = 0; + u64 rssi_linear = 0; + s16 rssi_db = 0; + u8 i = 0; if (pktinfo->station_id >= ODM_ASSOCIATE_ENTRY_NUM) return; @@ -2369,201 +3019,217 @@ phydm_process_rssi_for_dm_new_type( if (!is_sta_active(sta)) return; - if ((!pktinfo->is_packet_match_bssid))/*data frame only*/ + if (!pktinfo->is_packet_match_bssid) /*@data frame only*/ return; - if (pktinfo->is_packet_beacon) - dm->phy_dbg_info.num_qry_beacon_pkt++; - #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) if (dm->support_ability & ODM_BB_ANT_DIV) odm_process_rssi_for_ant_div(dm, phy_info, pktinfo); #endif #ifdef CONFIG_ADAPTIVE_SOML -phydm_rx_qam_for_soml(dm, pktinfo); + phydm_rx_qam_for_soml(dm, pktinfo); + phydm_rx_rate_for_soml(dm, pktinfo); #endif -#ifdef CONFIG_DYNAMIC_RX_PATH - phydm_process_phy_status_for_dynamic_rx_path(dm, phy_info, pktinfo); -#endif - - if (pktinfo->is_packet_to_self || pktinfo->is_packet_beacon) { - rssi_pre = sta->rssi_stat.rssi; - - for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { - if (phy_info->rx_mimo_signal_strength[i] != 0) - rssi_linear += odm_convert_to_linear(phy_info->rx_mimo_signal_strength[i]); - } - - switch (phy_info->rx_count + 1) { - case 2: - rssi_linear = (rssi_linear >> 1); - break; - case 3: - rssi_linear = ((rssi_linear) + (rssi_linear << 1) + (rssi_linear << 3)) >> 5; /* rssi_linear/3 ~ rssi_linear*11/32 */ - break; - case 4: - rssi_linear = (rssi_linear >> 2); - break; - } - - rssi_avg_db = (s16)odm_convert_to_db(rssi_linear); - - if (rssi_pre <= 0) { - sta->rssi_stat.rssi_acc = (s16)(phy_info->rx_pwdb_all << RSSI_MA_FACTOR); - sta->rssi_stat.rssi = (s8)(phy_info->rx_pwdb_all); - } else { - sta->rssi_stat.rssi_acc = sta->rssi_stat.rssi_acc - (sta->rssi_stat.rssi_acc >> RSSI_MA_FACTOR) + rssi_avg_db; - sta->rssi_stat.rssi = (s8)((sta->rssi_stat.rssi_acc + (1 << (RSSI_MA_FACTOR - 1))) >> RSSI_MA_FACTOR); - } - - #if 0 - if (pktinfo->is_packet_match_bssid) { - PHYDM_DBG(dm, DBG_TMP, "RSSI[%d]{A,B,Avg}=%d, %d, %d\n", - pktinfo->station_id, phy_info->rx_mimo_signal_strength[0], - phy_info->rx_mimo_signal_strength[1], rssi_ave); - PHYDM_DBG(dm, DBG_TMP, "{new, old}=%d, %d\n", sta->rssi_stat.rssi, rssi_pre); - } - #endif - - if (pktinfo->is_cck_rate) - sta->rssi_stat.rssi_cck = (s8)rssi_avg_db; - else - sta->rssi_stat.rssi_ofdm = (s8)rssi_avg_db; - + if (!(pktinfo->is_packet_to_self) && !(pktinfo->is_packet_beacon)) + return; + if (pktinfo->is_packet_beacon) { + dm->phy_dbg_info.num_qry_beacon_pkt++; + dm->phy_dbg_info.beacon_phy_rate = pktinfo->data_rate; } + + rssi_t = &sta->rssi_stat; + + for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { + rssi_tmp = phy_info->rx_mimo_signal_strength[i]; + if (rssi_tmp != 0) + rssi_linear += phydm_db_2_linear(rssi_tmp); + } + /* @Rounding and removing fractional bits */ + rssi_linear = (rssi_linear + (1 << (FRAC_BITS - 1))) >> FRAC_BITS; + + switch (phy_info->rx_count + 1) { + case 2: + rssi_linear = DIVIDED_2(rssi_linear); + break; + case 3: + rssi_linear = DIVIDED_3(rssi_linear); + break; + case 4: + rssi_linear = DIVIDED_4(rssi_linear); + break; + } + + rssi_db = (s16)odm_convert_to_db(rssi_linear); + + if (rssi_t->rssi_acc == 0) { + rssi_t->rssi_acc = (s16)(rssi_db << RSSI_MA); + rssi_t->rssi = (s8)(rssi_db); + } else { + rssi_t->rssi_acc = MA_ACC(rssi_t->rssi_acc, rssi_db, RSSI_MA); + rssi_t->rssi = (s8)GET_MA_VAL(rssi_t->rssi_acc, RSSI_MA); + } + + #if 0 + PHYDM_DBG(dm, DBG_TMP, "RSSI[%d]{A,B,C,D}={%d, %d, %d, %d} AVG=%d\n", + pktinfo->station_id, + phy_info->rx_mimo_signal_strength[0], + phy_info->rx_mimo_signal_strength[1], + phy_info->rx_mimo_signal_strength[2], + phy_info->rx_mimo_signal_strength[3], rssi_db); + PHYDM_DBG(dm, DBG_TMP, "rssi_acc = %d, rssi=%d\n", + rssi_t->rssi_acc, rssi_t->rssi); + #endif + + if (pktinfo->is_cck_rate) + rssi_t->rssi_cck = (s8)rssi_db; + else + rssi_t->rssi_ofdm = (s8)rssi_db; } -void -phydm_rx_phy_status_new_type( - void *dm_void, - u8 *phy_status_inf, - struct phydm_perpkt_info_struct *pktinfo, - struct phydm_phyinfo_struct *phy_info -) +void phydm_rx_physts_2nd_type(void *dm_void, u8 *phy_sts, + struct phydm_perpkt_info_struct *pktinfo, + struct phydm_phyinfo_struct *phy_info) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #ifdef PHYDM_PHYSTAUS_SMP_MODE - struct pkt_process_info *pkt_process = &dm->pkt_proc_struct; + struct pkt_process_info *pkt_process = &dm->pkt_proc_struct; #endif - u8 phy_status_type = (*phy_status_inf & 0xf); + u8 page = (*phy_sts & 0xf); #ifdef PHYDM_PHYSTAUS_SMP_MODE - if (pkt_process->phystatus_smp_mode_en && phy_status_type != 0) { + if (pkt_process->phystatus_smp_mode_en && page != 0) { if (pkt_process->pre_ppdu_cnt == pktinfo->ppdu_cnt) return; pkt_process->pre_ppdu_cnt = pktinfo->ppdu_cnt; } #endif - - phydm_reset_phy_info(dm, phy_info); /* Memory reset */ - + + phydm_reset_phy_info(dm, phy_info); /* @Memory reset */ + /* Phy status parsing */ - switch (phy_status_type) { - case 0: /*CCK*/ - phydm_get_rx_phy_status_type0(dm, phy_status_inf, pktinfo, phy_info); + switch (page) { + case 0: /*@CCK*/ + phydm_get_phy_sts_type0(dm, phy_sts, pktinfo, phy_info); break; case 1: - phydm_get_rx_phy_status_type1(dm, phy_status_inf, pktinfo, phy_info); + phydm_get_phy_sts_type1(dm, phy_sts, pktinfo, phy_info); break; case 2: - phydm_get_rx_phy_status_type2(dm, phy_status_inf, pktinfo, phy_info); + phydm_get_phy_sts_type2(dm, phy_sts, pktinfo, phy_info); break; default: break; } - - #if (RTL8822B_SUPPORT) - if (dm->support_ic_type & ODM_RTL8822B) - phydm_print_phy_status_jarguar2(dm, phy_status_inf, pktinfo, phy_info, phy_status_type); - #endif - + +#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8195B_SUPPORT) + if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B)) + phydm_print_phy_sts_jgr2(dm, phy_sts, pktinfo, phy_info); +#endif } -/*==============================================*/ + +/*@==============================================*/ #endif -void -odm_phy_status_query( - struct dm_struct *dm, - struct phydm_phyinfo_struct *phy_info, - u8 *phy_status_inf, - struct phydm_perpkt_info_struct *pktinfo -) +void odm_phy_status_query(struct dm_struct *dm, + struct phydm_phyinfo_struct *phy_info, + u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo) { - pktinfo->is_cck_rate = (pktinfo->data_rate <= ODM_RATE11M) ? true : false; - pktinfo->rate_ss = phydm_rate_to_num_ss(dm, pktinfo->data_rate); - dm->rate_ss = pktinfo->rate_ss; /*For AP EVM SW antenna diversity use*/ + u8 rate = pktinfo->data_rate; + + pktinfo->is_cck_rate = (rate <= ODM_RATE11M) ? true : false; + pktinfo->rate_ss = phydm_rate_to_num_ss(dm, rate); + dm->rate_ss = pktinfo->rate_ss; /*@For AP EVM SW antenna diversity use*/ if (pktinfo->is_cck_rate) dm->phy_dbg_info.num_qry_phy_status_cck++; else dm->phy_dbg_info.num_qry_phy_status_ofdm++; - + /*Reset phy_info*/ odm_memory_set(dm, phy_info->rx_mimo_signal_strength, 0, 4); odm_memory_set(dm, phy_info->rx_mimo_signal_quality, 0, 4); - - if (dm->support_ic_type & PHYSTS_2ND_TYPE_IC) { - #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) - phydm_rx_phy_status_new_type(dm, phy_status_inf, pktinfo, phy_info); - phydm_process_rssi_for_dm_new_type(dm, phy_info, pktinfo); + if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) { + #ifdef PHYSTS_3RD_TYPE_SUPPORT + phydm_rx_physts_3rd_type(dm, phy_status_inf, pktinfo, phy_info); + phydm_process_dm_rssi_3rd_type(dm, phy_info, pktinfo); + #endif + } else if (dm->support_ic_type & PHYSTS_2ND_TYPE_IC) { + #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) + phydm_rx_physts_2nd_type(dm, phy_status_inf, pktinfo, phy_info); + phydm_process_rssi_for_dm_2nd_type(dm, phy_info, pktinfo); #endif } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - #if ODM_IC_11AC_SERIES_SUPPORT - phydm_rx_phy_status_jaguar_series_parsing(dm, phy_info, phy_status_inf, pktinfo); + #if ODM_IC_11AC_SERIES_SUPPORT + phydm_rx_physts_1st_type(dm, phy_info, phy_status_inf, pktinfo); phydm_process_rssi_for_dm(dm, phy_info, pktinfo); #endif } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { - #if ODM_IC_11N_SERIES_SUPPORT - phydm_rx_phy_status92c_series_parsing(dm, phy_info, phy_status_inf, pktinfo); + #if ODM_IC_11N_SERIES_SUPPORT + phydm_phy_sts_n_parsing(dm, phy_info, phy_status_inf, pktinfo); phydm_process_rssi_for_dm(dm, phy_info, pktinfo); #endif } - - #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + phy_info->signal_strength = phy_info->rx_pwdb_all; + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) phydm_process_signal_strength(dm, phy_info, pktinfo); #endif - if (pktinfo->is_packet_match_bssid) { - - dm->rx_rate = pktinfo->data_rate; + /*For basic debug message*/ + if (pktinfo->is_packet_match_bssid || pktinfo->is_packet_beacon || + *dm->mp_mode) { + dm->curr_station_id = pktinfo->station_id; + dm->rx_rate = rate; dm->rssi_a = phy_info->rx_mimo_signal_strength[RF_PATH_A]; dm->rssi_b = phy_info->rx_mimo_signal_strength[RF_PATH_B]; dm->rssi_c = phy_info->rx_mimo_signal_strength[RF_PATH_C]; dm->rssi_d = phy_info->rx_mimo_signal_strength[RF_PATH_D]; - + + if (rate >= ODM_RATE6M && rate <= ODM_RATE54M) + dm->rxsc_l = (s8)phy_info->rxsc; + else if (phy_info->band_width == CHANNEL_WIDTH_20) + dm->rxsc_20 = (s8)phy_info->rxsc; + else if (phy_info->band_width == CHANNEL_WIDTH_40) + dm->rxsc_40 = (s8)phy_info->rxsc; + else if (phy_info->band_width == CHANNEL_WIDTH_80) + dm->rxsc_80 = (s8)phy_info->rxsc; + phydm_avg_phystatus_index(dm, phy_info, pktinfo); phydm_rx_statistic_cal(dm, phy_info, phy_status_inf, pktinfo); } } -void -phydm_rx_phy_status_init( - void *dm_void -) +void phydm_rx_phy_status_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; -#ifdef PHYDM_PHYSTAUS_SMP_MODE - struct pkt_process_info *pkt_process = &dm->pkt_proc_struct; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; +#ifdef PHYDM_PHYSTAUS_SMP_MODE + struct pkt_process_info *pkt_process = &dm->pkt_proc_struct; - if (dm->support_ic_type == ODM_RTL8822B) { + if (dm->support_ic_type & ODM_RTL8822B) { pkt_process->phystatus_smp_mode_en = 1; pkt_process->pre_ppdu_cnt = 0xff; - - odm_set_mac_reg(dm, 0x60f, BIT(7), 1); /*phystatus sampling mode enable*/ - - odm_set_bb_reg(dm, 0x9e4, 0x3ff, 0x0); /*First update timming*/ - odm_set_bb_reg(dm, 0x9e4, 0xfc00, 0x0); /*Update Sampling time*/ + /*phystatus sampling mode enable*/ + odm_set_mac_reg(dm, R_0x60f, BIT(7), 1); + /*@First update timming*/ + odm_set_bb_reg(dm, R_0x9e4, 0x3ff, 0x0); + /*Update Sampling time*/ + odm_set_bb_reg(dm, R_0x9e4, 0xfc00, 0x0); + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + /*@First update timming*/ + odm_set_bb_reg(dm, R_0x8c0, 0x3ff0, 0x0); + /*Update Sampling time*/ + odm_set_bb_reg(dm, R_0x8c0, 0xfc000, 0x0); } #endif dbg->show_phy_sts_all_pkt = 0; dbg->show_phy_sts_max_cnt = 1; dbg->show_phy_sts_cnt = 0; - + phydm_avg_phystatus_init(dm); } diff --git a/hal/phydm/phydm_phystatus.h b/hal/phydm/phydm_phystatus.h index 453d75b..333fa89 100644 --- a/hal/phydm/phydm_phystatus.h +++ b/hal/phydm/phydm_phystatus.h @@ -23,36 +23,45 @@ * *****************************************************************************/ +#ifndef __PHYDM_PHYSTATUS_H__ +#define __PHYDM_PHYSTATUS_H__ -#ifndef __PHYDM_PHYSTATUS_H__ -#define __PHYDM_PHYSTATUS_H__ +/*@--------------------------Define ------------------------------------------*/ +#define CCK_RSSI_INIT_COUNT 5 +#define RA_RSSI_STATE_INIT 0 +#define RA_RSSI_STATE_SEND 1 +#define RA_RSSI_STATE_HOLD 2 -/*--------------------------Define -------------------------------------------*/ -#define CCK_RSSI_INIT_COUNT 5 +#if defined(DM_ODM_CE_MAC80211) +#define CFO_HW_RPT_2_KHZ(val) ({ \ + s32 cfo_hw_rpt_2_khz_tmp = (val); \ + (cfo_hw_rpt_2_khz_tmp << 1) + (cfo_hw_rpt_2_khz_tmp >> 1); \ + }) +#else +#define CFO_HW_RPT_2_KHZ(val) ((val << 1) + (val >> 1)) +#endif -#define RA_RSSI_STATE_INIT 0 -#define RA_RSSI_STATE_SEND 1 -#define RA_RSSI_STATE_HOLD 2 +/* @(X* 312.5 Khz)>>7 ~= X*2.5 Khz= (X<<1 + X>>1)Khz */ -#define CFO_HW_RPT_2_KHZ(val) ((val<<1) + (val>>1)) -/* (X* 312.5 Khz)>>7 ~= X*2.5 Khz= (X<<1 + X>>1)Khz */ +#define IGI_2_RSSI(igi) (igi - 10) -#define IGI_2_RSSI(igi) (igi - 10) +#define PHY_STATUS_JRGUAR2_DW_LEN 7 /* @7*4 = 28 Byte */ +#define PHY_STATUS_JRGUAR3_DW_LEN 7 /* @7*4 = 28 Byte */ +#define SHOW_PHY_STATUS_UNLIMITED 0 +#define RSSI_MA 4 /*moving average factor for RSSI: 2^4=16 */ -#define PHY_STATUS_JRGUAR2_DW_LEN 7 /* 7*4 = 28 Byte */ -#define SHOW_PHY_STATUS_UNLIMITED 0 -#define RSSI_MA_FACTOR 4 +#define PHYSTS_PATH_NUM 4 -/* ************************************************************ +/*@************************************************************ * structure and define - * ************************************************************ */ + ************************************************************/ __PACK struct phy_rx_agc_info { #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 gain: 7, trsw: 1; + u8 gain : 7, trsw : 1; #else - u8 trsw: 1, gain: 7; + u8 trsw : 1, gain : 7; #endif }; @@ -62,7 +71,7 @@ __PACK struct phy_status_rpt_8192cd { u8 cck_sig_qual_ofdm_pwdb_all; u8 cck_agc_rpt_ofdm_cfosho_a; u8 cck_rpt_b_ofdm_cfosho_b; - u8 rsvd_1;/*ch_corr_msb;*/ + u8 rsvd_1;/*@ch_corr_msb;*/ u8 noise_power_db_msb; s8 path_cfotail[2]; u8 pcts_mask[2]; @@ -76,612 +85,655 @@ __PACK struct phy_status_rpt_8192cd { u8 rsvd_3; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 antsel_rx_keep_2: 1; /*ex_intf_flg:1;*/ + u8 antsel_rx_keep_2: 1; /*@ex_intf_flg:1;*/ u8 sgi_en: 1; u8 rxsc: 2; u8 idle_long: 1; u8 r_ant_train_en: 1; u8 ant_sel_b: 1; u8 ant_sel: 1; -#else /*_BIG_ENDIAN_ */ +#else /*@_BIG_ENDIAN_ */ u8 ant_sel: 1; u8 ant_sel_b: 1; u8 r_ant_train_en: 1; u8 idle_long: 1; u8 rxsc: 2; u8 sgi_en: 1; - u8 antsel_rx_keep_2: 1;/*ex_intf_flg:1;*/ + u8 antsel_rx_keep_2: 1;/*@ex_intf_flg:1;*/ #endif }; struct phy_status_rpt_8812 { - /* DWORD 0*/ - u8 gain_trsw[2]; /*path-A and path-B {TRSW, gain[6:0] }*/ - u8 chl_num_LSB; /*channel number[7:0]*/ + /* @DWORD 0*/ + u8 gain_trsw[2]; /*path-A and path-B {TRSW, gain[6:0] }*/ + u8 chl_num_LSB; /*@channel number[7:0]*/ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 chl_num_MSB: 2; /*channel number[9:8]*/ - u8 sub_chnl: 4; /*sub-channel location[3:0]*/ - u8 r_RFMOD: 2; /*RF mode[1:0]*/ -#else /*_BIG_ENDIAN_ */ - u8 r_RFMOD: 2; - u8 sub_chnl: 4; - u8 chl_num_MSB: 2; + u8 chl_num_MSB : 2; /*@channel number[9:8]*/ + u8 sub_chnl : 4; /*sub-channel location[3:0]*/ + u8 r_RFMOD : 2; /*RF mode[1:0]*/ +#else /*@_BIG_ENDIAN_ */ + u8 r_RFMOD : 2; + u8 sub_chnl : 4; + u8 chl_num_MSB : 2; #endif - /* DWORD 1*/ - u8 pwdb_all; /*CCK signal quality / OFDM pwdb all*/ - s8 cfosho[2]; /*DW1 byte 1 DW1 byte2 CCK AGC report and CCK_BB_Power / OFDM path-A and path-B short CFO*/ + /* @DWORD 1*/ + u8 pwdb_all; /*@CCK signal quality / OFDM pwdb all*/ + s8 cfosho[2]; /*@CCK AGC report and CCK_BB_Power*/ + /*OFDM path-A and path-B short CFO*/ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - /*this should be checked again because the definition of 8812 and 8814 is different*/ - /* u8 r_cck_rx_enable_pathc:2; cck rx enable pathc[1:0]*/ - /* u8 cck_rx_path:4; cck rx path[3:0]*/ - u8 resvd_0: 6; - u8 bt_RF_ch_MSB: 2; /*8812A:2'b0 8814A: bt rf channel keep[7:6]*/ -#else /*_BIG_ENDIAN_*/ - u8 bt_RF_ch_MSB: 2; - u8 resvd_0: 6; + u8 resvd_0 : 6; + u8 bt_RF_ch_MSB : 2; /*@8812A:2'b0 8814A: bt rf channel keep[7:6]*/ +#else /*@_BIG_ENDIAN_*/ + u8 bt_RF_ch_MSB : 2; + u8 resvd_0 : 6; #endif - /* DWORD 2*/ +/* @DWORD 2*/ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 ant_div_sw_a: 1; /*8812A: ant_div_sw_a 8814A: 1'b0*/ - u8 ant_div_sw_b: 1; /*8812A: ant_div_sw_b 8814A: 1'b0*/ - u8 bt_RF_ch_LSB: 6; /*8812A: 6'b0 8814A: bt rf channel keep[5:0]*/ -#else /*_BIG_ENDIAN_ */ - u8 bt_RF_ch_LSB: 6; - u8 ant_div_sw_b: 1; - u8 ant_div_sw_a: 1; + u8 ant_div_sw_a : 1; /*@8812A: ant_div_sw_a 8814A: 1'b0*/ + u8 ant_div_sw_b : 1; /*@8812A: ant_div_sw_b 8814A: 1'b0*/ + u8 bt_RF_ch_LSB : 6; /*@8812A: 6'b0 8814A: bt rf channel keep[5:0]*/ +#else /*@_BIG_ENDIAN_ */ + u8 bt_RF_ch_LSB : 6; + u8 ant_div_sw_b : 1; + u8 ant_div_sw_a : 1; #endif - s8 cfotail[2]; /*DW2 byte 1 DW2 byte 2 path-A and path-B CFO tail*/ - u8 PCTS_MSK_RPT_0; /*PCTS mask report[7:0]*/ - u8 PCTS_MSK_RPT_1; /*PCTS mask report[15:8]*/ + s8 cfotail[2]; /*@DW2 byte 1 DW2 byte 2 path-A and path-B CFO tail*/ + u8 PCTS_MSK_RPT_0; /*PCTS mask report[7:0]*/ + u8 PCTS_MSK_RPT_1; /*PCTS mask report[15:8]*/ - /* DWORD 3*/ - s8 rxevm[2]; /*DW3 byte 1 DW3 byte 2 stream 1 and stream 2 RX EVM*/ - s8 rxsnr[2]; /*DW3 byte 3 DW4 byte 0 path-A and path-B RX SNR*/ + /* @DWORD 3*/ + s8 rxevm[2]; /*@DW3 byte 1 DW3 byte 2 stream 1 and stream 2 RX EVM*/ + s8 rxsnr[2]; /*@DW3 byte 3 DW4 byte 0 path-A and path-B RX SNR*/ - /* DWORD 4*/ - u8 PCTS_MSK_RPT_2; /*PCTS mask report[23:16]*/ + /* @DWORD 4*/ + u8 PCTS_MSK_RPT_2; /*PCTS mask report[23:16]*/ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 PCTS_MSK_RPT_3: 6; /*PCTS mask report[29:24]*/ - u8 pcts_rpt_valid: 1; /*pcts_rpt_valid*/ - u8 resvd_1: 1; /*1'b0*/ -#else /*_BIG_ENDIAN_*/ - u8 resvd_1: 1; - u8 pcts_rpt_valid: 1; - u8 PCTS_MSK_RPT_3: 6; + u8 PCTS_MSK_RPT_3 : 6; /*PCTS mask report[29:24]*/ + u8 pcts_rpt_valid : 1; /*pcts_rpt_valid*/ + u8 resvd_1 : 1; /*@1'b0*/ +#else /*@_BIG_ENDIAN_*/ + u8 resvd_1 : 1; + u8 pcts_rpt_valid : 1; + u8 PCTS_MSK_RPT_3 : 6; #endif - s8 rxevm_cd[2]; /*DW 4 byte 3 DW5 byte 0 8812A: 16'b0 8814A: stream 3 and stream 4 RX EVM*/ + s8 rxevm_cd[2]; /*@8812A: 16'b0*/ + /*@8814A: stream 3 and stream 4 RX EVM*/ + /* @DWORD 5*/ + u8 csi_current[2]; /*@8812A: stream 1 and 2 CSI*/ + /*@8814A: path-C and path-D RX SNR*/ + u8 gain_trsw_cd[2]; /*path-C and path-D {TRSW, gain[6:0] }*/ - /* DWORD 5*/ - u8 csi_current[2]; /*DW5 byte 1 DW5 byte 2 8812A: stream 1 and 2 CSI 8814A: path-C and path-D RX SNR*/ - u8 gain_trsw_cd[2]; /*DW5 byte 3 DW6 byte 0 path-C and path-D {TRSW, gain[6:0] }*/ - - /* DWORD 6*/ - s8 sigevm; /*signal field EVM*/ + /* @DWORD 6*/ + s8 sigevm; /*signal field EVM*/ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 antidx_antc: 3; /*8812A: 3'b0 8814A: antidx_antc[2:0]*/ - u8 antidx_antd: 3; /*8812A: 3'b0 8814A: antidx_antd[2:0]*/ - u8 dpdt_ctrl_keep: 1; /*8812A: 1'b0 8814A: dpdt_ctrl_keep*/ - u8 GNT_BT_keep: 1; /*8812A: 1'b0 8814A: GNT_BT_keep*/ -#else /*_BIG_ENDIAN_*/ - u8 GNT_BT_keep: 1; - u8 dpdt_ctrl_keep: 1; - u8 antidx_antd: 3; - u8 antidx_antc: 3; + u8 antidx_antc : 3; /*@8812A: 3'b0 8814A: antidx_antc[2:0]*/ + u8 antidx_antd : 3; /*@8812A: 3'b0 8814A: antidx_antd[2:0]*/ + u8 dpdt_ctrl_keep : 1; /*@8812A: 1'b0 8814A: dpdt_ctrl_keep*/ + u8 GNT_BT_keep : 1; /*@8812A: 1'b0 8814A: GNT_BT_keep*/ +#else /*@_BIG_ENDIAN_*/ + u8 GNT_BT_keep : 1; + u8 dpdt_ctrl_keep : 1; + u8 antidx_antd : 3; + u8 antidx_antc : 3; #endif #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 antidx_anta: 3; /*antidx_anta[2:0]*/ - u8 antidx_antb: 3; /*antidx_antb[2:0]*/ - u8 hw_antsw_occur: 2; /*1'b0*/ -#else /*_BIG_ENDIAN_*/ - u8 hw_antsw_occur: 2; - u8 antidx_antb: 3; - u8 antidx_anta: 3; + u8 antidx_anta : 3; /*@antidx_anta[2:0]*/ + u8 antidx_antb : 3; /*@antidx_antb[2:0]*/ + u8 hw_antsw_occur : 2; /*@1'b0*/ +#else /*@_BIG_ENDIAN_*/ + u8 hw_antsw_occur : 2; + u8 antidx_antb : 3; + u8 antidx_anta : 3; #endif }; - #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) -__PACK struct phy_status_rpt_jaguar2_type0 { - /* DW0 */ - u8 page_num; - u8 pwdb; +__PACK struct phy_sts_rpt_jgr2_type0 { + /* @DW0 */ + u8 page_num; + u8 pwdb; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 gain: 6; - u8 rsvd_0: 1; - u8 trsw: 1; + u8 gain : 6; + u8 rsvd_0 : 1; + u8 trsw : 1; #else - u8 trsw: 1; - u8 rsvd_0: 1; - u8 gain: 6; + u8 trsw : 1; + u8 rsvd_0 : 1; + u8 gain : 6; #endif - u8 rsvd_1; + u8 rsvd_1; - /* DW1 */ - u8 rsvd_2; + /* @DW1 */ + u8 rsvd_2; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 rxsc: 4; - u8 agc_table: 4; + u8 rxsc : 4; + u8 agc_table : 4; #else - u8 agc_table: 4; - u8 rxsc: 4; + u8 agc_table : 4; + u8 rxsc : 4; #endif - u8 channel; - u8 band; + u8 channel; + u8 band; - /* DW2 */ - u16 length; + /* @DW2 */ + u16 length; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 antidx_a: 3; - u8 antidx_b: 3; - u8 rsvd_3: 2; - u8 antidx_c: 3; - u8 antidx_d: 3; - u8 rsvd_4:2; + u8 antidx_a : 3; + u8 antidx_b : 3; + u8 rsvd_3 : 2; + u8 antidx_c : 3; + u8 antidx_d : 3; + u8 rsvd_4 : 2; #else - u8 rsvd_3: 2; - u8 antidx_b: 3; - u8 antidx_a: 3; - u8 rsvd_4:2; - u8 antidx_d: 3; - u8 antidx_c: 3; + u8 rsvd_3 : 2; + u8 antidx_b : 3; + u8 antidx_a : 3; + u8 rsvd_4 : 2; + u8 antidx_d : 3; + u8 antidx_c : 3; #endif - /* DW3 */ - u8 signal_quality; + /* @DW3 */ + u8 signal_quality; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 vga:5; - u8 lna_l:3; - u8 bb_power:6; - u8 rsvd_9:1; - u8 lna_h:1; + u8 vga : 5; + u8 lna_l : 3; + u8 bb_power : 6; + u8 rsvd_9 : 1; + u8 lna_h : 1; #else - u8 lna_l:3; - u8 vga:5; - u8 lna_h:1; - u8 rsvd_9:1; - u8 bb_power:6; + u8 lna_l : 3; + u8 vga : 5; + u8 lna_h : 1; + u8 rsvd_9 : 1; + u8 bb_power : 6; #endif - u8 rsvd_5; + u8 rsvd_5; - /* DW4 */ - u32 rsvd_6; + /* @DW4 */ + u32 rsvd_6; - /* DW5 */ - u32 rsvd_7; + /* @DW5 */ + u32 rsvd_7; - /* DW6 */ - u32 rsvd_8; + /* @DW6 */ + u32 rsvd_8; }; -__PACK struct phy_status_rpt_jaguar2_type1 { - /* DW0 and DW1 */ - u8 page_num; - u8 pwdb[4]; +__PACK struct phy_sts_rpt_jgr2_type1 { + /* @DW0 and DW1 */ + u8 page_num; + u8 pwdb[4]; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 l_rxsc: 4; - u8 ht_rxsc: 4; + u8 l_rxsc : 4; + u8 ht_rxsc : 4; #else - u8 ht_rxsc: 4; - u8 l_rxsc: 4; + u8 ht_rxsc : 4; + u8 l_rxsc : 4; #endif - u8 channel; + u8 channel; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 band: 2; - u8 rsvd_0: 1; - u8 hw_antsw_occu: 1; - u8 gnt_bt: 1; - u8 ldpc: 1; - u8 stbc: 1; - u8 beamformed: 1; + u8 band : 2; + u8 rsvd_0 : 1; + u8 hw_antsw_occu : 1; + u8 gnt_bt : 1; + u8 ldpc : 1; + u8 stbc : 1; + u8 beamformed : 1; #else - u8 beamformed: 1; - u8 stbc: 1; - u8 ldpc: 1; - u8 gnt_bt: 1; - u8 hw_antsw_occu: 1; - u8 rsvd_0: 1; - u8 band: 2; + u8 beamformed : 1; + u8 stbc : 1; + u8 ldpc : 1; + u8 gnt_bt : 1; + u8 hw_antsw_occu : 1; + u8 rsvd_0 : 1; + u8 band : 2; #endif - /* DW2 */ - u16 lsig_length; + /* @DW2 */ + u16 lsig_length; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 antidx_a: 3; - u8 antidx_b: 3; - u8 rsvd_1: 2; - u8 antidx_c: 3; - u8 antidx_d: 3; - u8 rsvd_2: 2; + u8 antidx_a : 3; + u8 antidx_b : 3; + u8 rsvd_1 : 2; + u8 antidx_c : 3; + u8 antidx_d : 3; + u8 rsvd_2 : 2; #else - u8 rsvd_1: 2; - u8 antidx_b: 3; - u8 antidx_a: 3; - u8 rsvd_2: 2; - u8 antidx_d: 3; - u8 antidx_c: 3; + u8 rsvd_1 : 2; + u8 antidx_b : 3; + u8 antidx_a : 3; + u8 rsvd_2 : 2; + u8 antidx_d : 3; + u8 antidx_c : 3; #endif - /* DW3 */ - u8 paid; + /* @DW3 */ + u8 paid; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 paid_msb: 1; - u8 gid: 6; - u8 rsvd_3: 1; + u8 paid_msb : 1; + u8 gid : 6; + u8 rsvd_3 : 1; #else - u8 rsvd_3: 1; - u8 gid: 6; - u8 paid_msb: 1; + u8 rsvd_3 : 1; + u8 gid : 6; + u8 paid_msb : 1; #endif - u8 intf_pos; + u8 intf_pos; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 intf_pos_msb: 1; - u8 rsvd_4: 2; - u8 nb_intf_flag: 1; - u8 rf_mode: 2; - u8 rsvd_5: 2; + u8 intf_pos_msb : 1; + u8 rsvd_4 : 2; + u8 nb_intf_flag : 1; + u8 rf_mode : 2; + u8 rsvd_5 : 2; #else - u8 rsvd_5: 2; - u8 rf_mode: 2; - u8 nb_intf_flag: 1; - u8 rsvd_4: 2; - u8 intf_pos_msb: 1; + u8 rsvd_5 : 2; + u8 rf_mode : 2; + u8 nb_intf_flag : 1; + u8 rsvd_4 : 2; + u8 intf_pos_msb : 1; #endif - /* DW4 */ - s8 rxevm[4]; /* s(8,1) */ + /* @DW4 */ + s8 rxevm[4]; /* s(8,1) */ - /* DW5 */ - s8 cfo_tail[4]; /* s(8,7) */ + /* @DW5 */ + s8 cfo_tail[4]; /* s(8,7) */ - /* DW6 */ - s8 rxsnr[4]; /* s(8,1) */ + /* @DW6 */ + s8 rxsnr[4]; /* s(8,1) */ }; -__PACK struct phy_status_rpt_jaguar2_type2 { - /* DW0 ane DW1 */ - u8 page_num; - u8 pwdb[4]; +__PACK struct phy_sts_rpt_jgr2_type2 { + /* @DW0 ane DW1 */ + u8 page_num; + u8 pwdb[4]; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 l_rxsc: 4; - u8 ht_rxsc: 4; + u8 l_rxsc : 4; + u8 ht_rxsc : 4; #else - u8 ht_rxsc: 4; - u8 l_rxsc: 4; + u8 ht_rxsc : 4; + u8 l_rxsc : 4; #endif - u8 channel; + u8 channel; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 band: 2; - u8 rsvd_0: 1; - u8 hw_antsw_occu: 1; - u8 gnt_bt: 1; - u8 ldpc: 1; - u8 stbc: 1; - u8 beamformed: 1; + u8 band : 2; + u8 rsvd_0 : 1; + u8 hw_antsw_occu : 1; + u8 gnt_bt : 1; + u8 ldpc : 1; + u8 stbc : 1; + u8 beamformed : 1; #else - u8 beamformed: 1; - u8 stbc: 1; - u8 ldpc: 1; - u8 gnt_bt: 1; - u8 hw_antsw_occu: 1; - u8 rsvd_0: 1; - u8 band: 2; + u8 beamformed : 1; + u8 stbc : 1; + u8 ldpc : 1; + u8 gnt_bt : 1; + u8 hw_antsw_occu : 1; + u8 rsvd_0 : 1; + u8 band : 2; #endif - /* DW2 */ +/* @DW2 */ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 shift_l_map: 6; - u8 rsvd_1: 2; + u8 shift_l_map : 6; + u8 rsvd_1 : 2; #else - u8 rsvd_1: 2; - u8 shift_l_map: 6; + u8 rsvd_1 : 2; + u8 shift_l_map : 6; #endif - u8 cnt_pw2cca; + u8 cnt_pw2cca; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 agc_table_a: 4; - u8 agc_table_b: 4; - u8 agc_table_c: 4; - u8 agc_table_d: 4; + u8 agc_table_a : 4; + u8 agc_table_b : 4; + u8 agc_table_c : 4; + u8 agc_table_d : 4; #else - u8 agc_table_b: 4; - u8 agc_table_a: 4; - u8 agc_table_d: 4; - u8 agc_table_c: 4; + u8 agc_table_b : 4; + u8 agc_table_a : 4; + u8 agc_table_d : 4; + u8 agc_table_c : 4; #endif - /* DW3 ~ DW6*/ - u8 cnt_cca2agc_rdy; + /* @DW3 ~ DW6*/ + u8 cnt_cca2agc_rdy; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 gain_a: 6; - u8 rsvd_2: 1; - u8 trsw_a: 1; - u8 gain_b: 6; - u8 rsvd_3: 1; - u8 trsw_b: 1; - u8 gain_c: 6; - u8 rsvd_4: 1; - u8 trsw_c: 1; - u8 gain_d: 6; - u8 rsvd_5: 1; - u8 trsw_d: 1; - u8 aagc_step_a: 2; - u8 aagc_step_b: 2; - u8 aagc_step_c: 2; - u8 aagc_step_d: 2; + u8 gain_a : 6; + u8 rsvd_2 : 1; + u8 trsw_a : 1; + u8 gain_b : 6; + u8 rsvd_3 : 1; + u8 trsw_b : 1; + u8 gain_c : 6; + u8 rsvd_4 : 1; + u8 trsw_c : 1; + u8 gain_d : 6; + u8 rsvd_5 : 1; + u8 trsw_d : 1; + u8 aagc_step_a : 2; + u8 aagc_step_b : 2; + u8 aagc_step_c : 2; + u8 aagc_step_d : 2; #else - u8 trsw_a: 1; - u8 rsvd_2: 1; - u8 gain_a: 6; - u8 trsw_b: 1; - u8 rsvd_3: 1; - u8 gain_b: 6; - u8 trsw_c: 1; - u8 rsvd_4: 1; - u8 gain_c: 6; - u8 trsw_d: 1; - u8 rsvd_5: 1; - u8 gain_d: 6; - u8 aagc_step_d: 2; - u8 aagc_step_c: 2; - u8 aagc_step_b: 2; - u8 aagc_step_a: 2; + u8 trsw_a : 1; + u8 rsvd_2 : 1; + u8 gain_a : 6; + u8 trsw_b : 1; + u8 rsvd_3 : 1; + u8 gain_b : 6; + u8 trsw_c : 1; + u8 rsvd_4 : 1; + u8 gain_c : 6; + u8 trsw_d : 1; + u8 rsvd_5 : 1; + u8 gain_d : 6; + u8 aagc_step_d : 2; + u8 aagc_step_c : 2; + u8 aagc_step_b : 2; + u8 aagc_step_a : 2; #endif - u8 ht_aagc_gain[4]; - u8 dagc_gain[4]; + u8 ht_aagc_gain[4]; + u8 dagc_gain[4]; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 counter: 6; - u8 rsvd_6: 2; - u8 syn_count: 5; - u8 rsvd_7:3; + u8 counter : 6; + u8 rsvd_6 : 2; + u8 syn_count : 5; + u8 rsvd_7 : 3; #else - u8 rsvd_6: 2; - u8 counter: 6; - u8 rsvd_7:3; - u8 syn_count: 5; + u8 rsvd_6 : 2; + u8 counter : 6; + u8 rsvd_7 : 3; + u8 syn_count : 5; #endif }; #endif -/*==============================================*/ -#if (CONFIG_PHYSTS_3RD_TYPE) -__PACK struct _phy_status_rpt_jaguar3_type0 { - /* DW0 : Offset 0 */ +/*@==============================================*/ +#ifdef PHYSTS_3RD_TYPE_SUPPORT +__PACK struct phy_sts_rpt_jgr3_type0 { +/* @DW0 : Offset 0 */ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 page_num:4; - u8 pkt_cnt:2; - u8 channel_msb:2; + u8 page_num : 4; + u8 pkt_cnt : 2; + u8 channel_msb : 2; #else - u8 channel_msb:2; - u8 pkt_cnt:2; - u8 page_num:4; + u8 channel_msb : 2; + u8 pkt_cnt : 2; + u8 page_num : 4; #endif - u8 pwdb_a; + u8 pwdb_a; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 gain_a: 6; - u8 rsvd_0: 1; - u8 trsw: 1; + u8 gain_a : 6; + u8 rsvd_0 : 1; + u8 trsw : 1; #else - u8 trsw: 1; - u8 rsvd_0: 1; - u8 gain_a: 6; + u8 trsw : 1; + u8 rsvd_0 : 1; + u8 gain_a : 6; #endif #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 agc_table_b:4; - u8 agc_table_c:4; + u8 agc_table_b : 4; + u8 agc_table_c : 4; #else - u8 agc_table_c:4; - u8 agc_table_b:4; + u8 agc_table_c : 4; + u8 agc_table_b : 4; #endif - /* DW1 : Offset 4 */ +/* @DW1 : Offset 4 */ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 rsvd_1: 4; - u8 agc_table_d: 4; + u8 rsvd_1 : 4; + u8 agc_table_d : 4; #else - u8 agc_table_d: 4; - u8 rsvd_1: 4; + u8 agc_table_d : 4; + u8 rsvd_1 : 4; #endif #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 l_rxsc: 4; - u8 agc_table_a: 4; + u8 l_rxsc : 4; + u8 agc_table_a : 4; #else - u8 agc_table_a: 4; - u8 l_rxsc: 4; + u8 agc_table_a : 4; + u8 l_rxsc : 4; #endif - u8 channel; + u8 channel; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 band:2; - u8 rsvd_2_1: 1; - u8 hw_antsw_occur_keep_cck:1; - u8 gnt_bt_keep_cck:1; - u8 rsvd_2_2:3; + u8 band : 2; + u8 rsvd_2_1 : 1; + u8 hw_antsw_occur_keep_cck : 1; + u8 gnt_bt_keep_cck : 1; + u8 rsvd_2_2 : 1; + u8 path_sel_o : 2; #else - u8 rsvd_2_2:3; - u8 gnt_bt_keep_cck:1; - u8 hw_antsw_occur_keep_cck:1; - u8 rsvd_2_1: 1; - u8 band:2; + u8 path_sel_o : 2; + u8 rsvd_2_2 : 1; + u8 gnt_bt_keep_cck : 1; + u8 hw_antsw_occur_keep_cck : 1; + u8 rsvd_2_1 : 1; + u8 band : 2; #endif - /* DW2 : Offset 8 */ - u16 length; + /* @DW2 : Offset 8 */ + u16 length; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 antidx_a: 4; - u8 antidx_b: 4; - u8 antidx_c: 4; - u8 antidx_d: 4; + u8 antidx_a : 4; + u8 antidx_b : 4; #else - u8 antidx_b: 4; - u8 antidx_a: 4; - u8 antidx_d: 4; - u8 antidx_c: 4; + u8 antidx_b : 4; + u8 antidx_a : 4; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 antidx_c : 4; + u8 antidx_d : 4; +#else + u8 antidx_d : 4; + u8 antidx_c : 4; #endif - /* DW3 : Offset 12 */ - u8 signal_quality; + /* @DW3 : Offset 12 */ + u8 signal_quality; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 vga_a:5; - u8 lna_l_a:3; - u8 bb_power_a:6; - u8 rsvd_3_1:1; - u8 lna_h_a:1; + u8 vga_a : 5; + u8 lna_l_a : 3; #else - u8 lna_l_a:3; - u8 vga_a:5; - u8 lna_h_a:1; - u8 rsvd_3_1:1; - u8 bb_power_a:6; + u8 lna_l_a : 3; + u8 vga_a : 5; #endif - u8 rsvd_3_2; - - /* DW4 : Offset 16 */ - u8 pwdb_b; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 vga_b:5; - u8 lna_l_b:3; - u8 bb_power_b:6; - u8 rsvd_4_1:1; - u8 lna_h_b:1; - u8 gain_b: 6; - u8 rsvd_4_2:2; + u8 bb_power_a : 6; + u8 rsvd_3_1 : 1; + u8 lna_h_a : 1; #else - u8 lna_l_b:3; - u8 vga_b:5; - u8 lna_h_b:1; - u8 rsvd_4_1:1; - u8 bb_power_b:6; - u8 rsvd_4_2:2; - u8 gain_b: 6; + + u8 lna_h_a : 1; + u8 rsvd_3_1 : 1; + u8 bb_power_a : 6; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 rxrate : 2; + u8 raterr : 1; + u8 lockbit : 1; + u8 sqloss : 1; + u8 mf_off : 1; + u8 rsvd_3_2 : 2; +#else + u8 rsvd_3_2 : 2; + u8 mf_off : 1; + u8 sqloss : 1; + u8 lockbit : 1; + u8 raterr : 1; + u8 rxrate : 2; #endif - /* DW5 : Offset 20 */ - u8 pwdb_c; + /* @DW4 : Offset 16 */ + u8 pwdb_b; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 vga_c:5; - u8 lna_l_c:3; - u8 bb_power_c:6; - u8 rsvd_5_1:1; - u8 lna_h_c:1; - u8 gain_c: 6; - u8 rsvd_5_2:2; + u8 vga_b : 5; + u8 lna_l_b : 3; #else - u8 lna_l_c:3; - u8 vga_c:5; - u8 lna_h_c:1; - u8 rsvd_5_1:1; - u8 bb_power_c:6; - u8 rsvd_5_2:2; - u8 gain_c: 6; + u8 lna_l_b : 3; + u8 vga_b : 5; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 bb_power_b : 6; + u8 rsvd_4_1 : 1; + u8 lna_h_b : 1; +#else + u8 lna_h_b : 1; + u8 rsvd_4_1 : 1; + u8 bb_power_b : 6; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 gain_b : 6; + u8 rsvd_4_2 : 2; +#else + u8 rsvd_4_2 : 2; + u8 gain_b : 6; #endif - /* DW6 : Offset 24 */ - u8 pwdb_d; + /* @DW5 : Offset 20 */ + u8 pwdb_c; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 vga_d:5; - u8 lna_l_d:3; - u8 bb_power_d:6; - u8 rsvd_6_1:1; - u8 lna_h_d:1; - u8 gain_d: 6; - u8 rsvd_6_2:2; + u8 vga_c : 5; + u8 lna_l_c : 3; #else - u8 lna_l_d:3; - u8 vga_d:5; - u8 lna_h_d:1; - u8 rsvd_6_1:1; - u8 bb_power_d:6; - u8 rsvd_6_2:2; - u8 gain_d: 6; + u8 lna_l_c : 3; + u8 vga_c : 5; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 bb_power_c : 6; + u8 rsvd_5_1 : 1; + u8 lna_h_c : 1; +#else + u8 lna_h_c : 1; + u8 rsvd_5_1 : 1; + u8 bb_power_c : 6; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 gain_c : 6; + u8 rsvd_5_2 : 2; +#else + u8 rsvd_5_2 : 2; + u8 gain_c : 6; +#endif + + /* @DW6 : Offset 24 */ + u8 pwdb_d; +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 vga_d : 5; + u8 lna_l_d : 3; +#else + u8 lna_l_d : 3; + u8 vga_d : 5; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 bb_power_d : 6; + u8 rsvd_6_1 : 1; + u8 lna_h_d : 1; +#else + u8 lna_h_d : 1; + u8 rsvd_6_1 : 1; + u8 bb_power_d : 6; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 gain_d : 6; + u8 rsvd_6_2 : 2; +#else + u8 rsvd_6_2 : 2; + u8 gain_d : 6; #endif }; -__PACK struct _phy_status_rpt_jaguar3_type1 { - /* DW0 : Offset 0 */ +__PACK struct phy_sts_rpt_jgr3_type1 { +/* @DW0 : Offset 0 */ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 page_num:4; - u8 pkt_cnt:2; - u8 channel_pri_msb:2; + u8 page_num : 4; + u8 pkt_cnt : 2; + u8 channel_pri_msb : 2; #else - u8 channel_pri_msb:2; - u8 pkt_cnt:2; - u8 page_num:4; + u8 channel_pri_msb : 2; + u8 pkt_cnt : 2; + u8 page_num : 4; #endif - u8 pwdb_a; - u8 pwdb_b; - u8 pwdb_c; + u8 pwdb_a; + u8 pwdb_b; + u8 pwdb_c; - /* DW1 : Offset 4 */ - u8 pwdb_d; + /* @DW1 : Offset 4 */ + u8 pwdb_d; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 l_rxsc: 4; - u8 ht_rxsc: 4; + u8 l_rxsc : 4; + u8 ht_rxsc : 4; #else - u8 ht_rxsc: 4; - u8 l_rxsc: 4; + u8 ht_rxsc : 4; + u8 l_rxsc : 4; #endif - u8 channel_pri_lsb; + u8 channel_pri_lsb; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 band: 2; - u8 rsvd_0: 2; - u8 gnt_bt: 1; - u8 ldpc: 1; - u8 stbc: 1; - u8 beamformed: 1; + u8 band : 2; + u8 rsvd_0 : 2; + u8 gnt_bt : 1; + u8 ldpc : 1; + u8 stbc : 1; + u8 beamformed : 1; #else - u8 beamformed: 1; - u8 stbc: 1; - u8 ldpc: 1; - u8 gnt_bt: 1; - u8 rsvd_0: 2; - u8 band: 2; + u8 beamformed : 1; + u8 stbc : 1; + u8 ldpc : 1; + u8 gnt_bt : 1; + u8 rsvd_0 : 2; + u8 band : 2; #endif - /* DW2 : Offset 8 */ - u8 channel_sec_lsb; + /* @DW2 : Offset 8 */ + u8 channel_sec_lsb; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 channel_sec_msb:2; - u8 rsvd_1: 2; - u8 hw_antsw_occur_a:1; - u8 hw_antsw_occur_b:1; - u8 hw_antsw_occur_c:1; - u8 hw_antsw_occur_d:1; + u8 channel_sec_msb : 2; + u8 rsvd_1 : 2; + u8 hw_antsw_occur_a : 1; + u8 hw_antsw_occur_b : 1; + u8 hw_antsw_occur_c : 1; + u8 hw_antsw_occur_d : 1; #else - u8 hw_antsw_occur_d:1; - u8 hw_antsw_occur_c:1; - u8 hw_antsw_occur_b:1; - u8 hw_antsw_occur_a:1; - u8 rsvd_1: 2; - u8 channel_sec_msb:2; + u8 hw_antsw_occur_d : 1; + u8 hw_antsw_occur_c : 1; + u8 hw_antsw_occur_b : 1; + u8 hw_antsw_occur_a : 1; + u8 rsvd_1 : 2; + u8 channel_sec_msb : 2; #endif #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 antidx_a: 4; - u8 antidx_b: 4; - u8 antidx_c: 4; - u8 antidx_d: 4; + u8 antidx_a : 4; + u8 antidx_b : 4; #else - u8 antidx_b: 4; - u8 antidx_a: 4; - u8 antidx_d: 4; - u8 antidx_c: 4; + u8 antidx_b : 4; + u8 antidx_a : 4; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 antidx_c : 4; + u8 antidx_d : 4; +#else + u8 antidx_d : 4; + u8 antidx_c : 4; #endif - /* DW3 : Offset 12 */ - u8 paid; + /* @DW3 : Offset 12 */ + u8 paid; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 paid_msb: 1; - u8 gid: 6; - u8 rsvd_3: 1; + u8 paid_msb : 1; + u8 gid : 6; + u8 rsvd_3 : 1; #else - u8 rsvd_3: 1; - u8 gid: 6; - u8 paid_msb: 1; + u8 rsvd_3 : 1; + u8 gid : 6; + u8 paid_msb : 1; #endif - u16 rsvd_4; -/* + u16 rsvd_4; +#if 0 + /*@ u8 rsvd_4; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) u8 rsvd_5: 6; @@ -691,393 +743,395 @@ __PACK struct _phy_status_rpt_jaguar3_type1 { u8 rsvd_5: 6; #endif */ - /* DW4 */ - s8 rxevm[4]; /* s(8,1) */ +#endif + /* @DW4 : Offset 16 */ + s8 rxevm[4]; /* s(8,1) */ - /* DW5 */ - s8 cfo_tail[4]; /* s(8,7) */ + /* @DW5 : Offset 20 */ + s8 cfo_tail[4]; /* s(8,7) */ - /* DW6 */ - s8 rxsnr[4]; /* s(8,1) */ + /* @DW6 : Offset 24 */ + s8 rxsnr[4]; /* s(8,1) */ }; -__PACK struct _phy_status_rpt_jaguar3_type2_type3 { - /* Type2 is primary channel & type3 is secondary channel */ - /* DW0 ane DW1 */ + +__PACK struct phy_sts_rpt_jgr3_type2_3 { +/* Type2 is primary channel & type3 is secondary channel */ +/* @DW0 and DW1: Offest 0 and Offset 4 */ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 page_num:4; - u8 pkt_cnt:2; - u8 channel_msb:2; + u8 page_num : 4; + u8 pkt_cnt : 2; + u8 channel_msb : 2; #else - u8 channel_msb:2; - u8 pkt_cnt:2; - u8 page_num:4; + u8 channel_msb : 2; + u8 pkt_cnt : 2; + u8 page_num : 4; #endif - u8 pwdb[4]; + u8 pwdb[4]; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 l_rxsc: 4; - u8 ht_rxsc: 4; + u8 l_rxsc : 4; + u8 ht_rxsc : 4; #else - u8 ht_rxsc: 4; - u8 l_rxsc: 4; + u8 ht_rxsc : 4; + u8 l_rxsc : 4; #endif - u8 channel_lsb; + u8 channel_lsb; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 band: 2; - u8 rsvd_0: 1; - u8 hw_antsw_occu: 1; - u8 gnt_bt: 1; - u8 ldpc: 1; - u8 stbc: 1; - u8 beamformed: 1; + u8 band : 2; + u8 rsvd_0 : 2; + u8 gnt_bt : 1; + u8 ldpc : 1; + u8 stbc : 1; + u8 beamformed : 1; #else - u8 beamformed: 1; - u8 stbc: 1; - u8 ldpc: 1; - u8 gnt_bt: 1; - u8 hw_antsw_occu: 1; - u8 rsvd_0: 1; - u8 band: 2; + u8 beamformed : 1; + u8 stbc : 1; + u8 ldpc : 1; + u8 gnt_bt : 1; + u8 rsvd_0 : 2; + u8 band : 2; #endif - /* DW2 */ +/* @DW2 : Offset 8 */ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 shift_l_map: 6; - u8 rsvd_1: 2; + u8 shift_l_map : 6; + u8 rsvd_1 : 2; #else - u8 rsvd_1: 2; - u8 shift_l_map: 6; + u8 rsvd_1 : 2; + u8 shift_l_map : 6; #endif - s8 pwed_th; /* dynamic energy threshold S(8,2) */ + s8 pwed_th; /* @dynamic energy threshold S(8,2) */ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 agc_table_a: 4; - u8 agc_table_b: 4; - u8 agc_table_c: 4; - u8 agc_table_d: 4; + u8 agc_table_a : 4; + u8 agc_table_b : 4; #else - u8 agc_table_b: 4; - u8 agc_table_a: 4; - u8 agc_table_d: 4; - u8 agc_table_c: 4; + u8 agc_table_b : 4; + u8 agc_table_a : 4; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 agc_table_c : 4; + u8 agc_table_d : 4; +#else + u8 agc_table_d : 4; + u8 agc_table_c : 4; #endif - /* DW3 ~ DW6*/ - u8 cnt_cca2agc_rdy; /* Time(ns) = cnt_cca2agc_ready*25 */ + /* @DW3 : Offset 12 */ + u8 cnt_cca2agc_rdy; /* Time(ns) = cnt_cca2agc_ready*25 */ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 mp_gain_a: 6; - u8 mp_gain_b_lsb: 2; - u8 mp_gain_b_msb: 4; - u8 mp_gain_c_lsb: 4; - u8 mp_gain_c_msb: 2; - u8 avg_noise_pwr_lsb: 4; - u8 rsvd_3:2; + u8 mp_gain_a : 6; + u8 mp_gain_b_lsb : 2; +#else + u8 mp_gain_b_lsb : 2; + u8 mp_gain_a : 6; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 mp_gain_b_msb : 4; + u8 mp_gain_c_lsb : 4; +#else + u8 mp_gain_c_lsb : 4; + u8 mp_gain_b_msb : 4; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 mp_gain_c_msb : 2; + u8 avg_noise_pwr_lsb : 4; + u8 rsvd_3 : 2; /* u8 r_rfmod:2; */ - u8 mp_gain_d: 6; - u8 is_freq_select_fading: 1; - u8 rsvd_2: 1; - u8 aagc_step_a: 2; - u8 aagc_step_b: 2; - u8 aagc_step_c: 2; - u8 aagc_step_d: 2; #else - u8 mp_gain_b_lsb: 2; - u8 mp_gain_a: 6; - u8 mp_gain_c_lsb: 4; - u8 mp_gain_b_msb: 4; - u8 rsvd_3:2; /* u8 r_rfmod:2; */ - u8 avg_noise_pwr_lsb: 4; - u8 mp_gain_c_msb: 2; - u8 rsvd_2: 1; - u8 is_freq_select_fading: 1; - u8 mp_gain_d: 6; - u8 aagc_step_d: 2; - u8 aagc_step_c: 2; - u8 aagc_step_b: 2; - u8 aagc_step_a: 2; + u8 rsvd_3 : 2; + u8 avg_noise_pwr_lsb : 4; + u8 mp_gain_c_msb : 2; #endif - u8 ht_aagc_gain[4]; - u8 dagc_gain[4]; + /* @DW4 ~ 5: offset 16 ~20 */ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 counter: 6; - u8 syn_count_lsb: 2; - u8 syn_count_msb: 3; - u8 avg_noise_pwr_msb:5; + u8 mp_gain_d : 6; + u8 is_freq_select_fading : 1; + u8 rsvd_2 : 1; #else - u8 syn_count_lsb: 2; - u8 counter: 6; - u8 avg_noise_pwr_msb:5; - u8 syn_count_msb: 3; + u8 rsvd_2 : 1; + u8 is_freq_select_fading : 1; + u8 mp_gain_d : 6; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 aagc_step_a : 2; + u8 aagc_step_b : 2; + u8 aagc_step_c : 2; + u8 aagc_step_d : 2; +#else + u8 aagc_step_d : 2; + u8 aagc_step_c : 2; + u8 aagc_step_b : 2; + u8 aagc_step_a : 2; +#endif + u8 ht_aagc_gain[4]; + u8 dagc_gain[4]; +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 counter : 6; + u8 syn_count_lsb : 2; +#else + u8 syn_count_lsb : 2; + u8 counter : 6; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 syn_count_msb : 3; + u8 avg_noise_pwr_msb : 5; +#else + u8 avg_noise_pwr_msb : 5; + u8 syn_count_msb : 3; #endif }; -__PACK struct _phy_status_rpt_jaguar3_type4 { - /* smart antenna */ - /* DW0 ane DW1 */ +__PACK struct phy_sts_rpt_jgr3_type4 { +/* smart antenna */ +/* @DW0 and DW1 : offset 0 and 4 */ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 page_num:4; - u8 pkt_cnt:2; - u8 channel_msb:2; + u8 page_num : 4; + u8 pkt_cnt : 2; + u8 channel_msb : 2; #else - u8 channel_msb:2; - u8 pkt_cnt:2; - u8 page_num:4; + u8 channel_msb : 2; + u8 pkt_cnt : 2; + u8 page_num : 4; #endif - u8 pwdb[4]; + u8 pwdb[4]; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 l_rxsc: 4; - u8 ht_rxsc: 4; + u8 l_rxsc : 4; + u8 ht_rxsc : 4; #else - u8 ht_rxsc: 4; - u8 l_rxsc: 4; + u8 ht_rxsc : 4; + u8 l_rxsc : 4; #endif - u8 channel_lsb; + u8 channel_lsb; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 band: 2; - u8 rsvd_0: 1; - u8 hw_antsw_occu: 1; - u8 gnt_bt: 1; - u8 ldpc: 1; - u8 stbc: 1; - u8 beamformed: 1; + u8 band : 2; + u8 rsvd_0 : 2; + u8 gnt_bt : 1; + u8 ldpc : 1; + u8 stbc : 1; + u8 beamformed : 1; #else - u8 beamformed: 1; - u8 stbc: 1; - u8 ldpc: 1; - u8 gnt_bt: 1; - u8 hw_antsw_occu: 1; - u8 rsvd_0: 1; - u8 band: 2; + u8 beamformed : 1; + u8 stbc : 1; + u8 ldpc : 1; + u8 gnt_bt : 1; + u8 rsvd_0 : 1; + u8 band : 2; #endif - /* DW2 ~ DW3 */ +/* @DW2 : offset 8 */ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 bad_tone_cnt_min_eign_0:4; - u8 bad_tone_cnt_cn_excess_0:4; - u8 training_done_a:1; - u8 training_done_b:1; - u8 training_done_c:1; - u8 training_done_d:1; - u8 hw_antsw_occur_a:1; - u8 hw_antsw_occur_b:1; - u8 hw_antsw_occur_c:1; - u8 hw_antsw_occur_d:1; - u8 antidx_a: 4; - u8 antidx_b: 4; - u8 antidx_c: 4; - u8 antidx_d: 4; + u8 bad_tone_cnt_min_eign_0 : 4; + u8 bad_tone_cnt_cn_excess_0 : 4; #else - u8 bad_tone_cnt_cn_excess_0:4; - u8 bad_tone_cnt_min_eign_0:4; - u8 hw_antsw_occur_d:1; - u8 hw_antsw_occur_c:1; - u8 hw_antsw_occur_b:1; - u8 hw_antsw_occur_a:1; - u8 training_done_d:1; - u8 training_done_c:1; - u8 training_done_b:1; - u8 training_done_a:1; - u8 antidx_b: 4; - u8 antidx_a: 4; - u8 antidx_d: 4; - u8 antidx_c: 4; + u8 bad_tone_cnt_cn_excess_0 : 4; + u8 bad_tone_cnt_min_eign_0 : 4; #endif - u8 tx_pkt_cnt; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 bad_tone_cnt_min_eign_1:4; - u8 bad_tone_cnt_cn_excess_1:4; - u8 avg_cond_num_0:7; - u8 avg_cond_num_1_lsb:1; - u8 avg_cond_num_1_msb:6; - u8 rsvd_1:2; + u8 training_done_a : 1; + u8 training_done_b : 1; + u8 training_done_c : 1; + u8 training_done_d : 1; + u8 hw_antsw_occur_a : 1; + u8 hw_antsw_occur_b : 1; + u8 hw_antsw_occur_c : 1; + u8 hw_antsw_occur_d : 1; #else - u8 bad_tone_cnt_cn_excess_1:4; - u8 bad_tone_cnt_min_eign_1:4; - u8 avg_cond_num_1_lsb:1; - u8 avg_cond_num_0:7; - u8 rsvd_1:2; - u8 avg_cond_num_1_msb:6; + u8 hw_antsw_occur_d : 1; + u8 hw_antsw_occur_c : 1; + u8 hw_antsw_occur_b : 1; + u8 hw_antsw_occur_a : 1; + u8 training_done_d : 1; + u8 training_done_c : 1; + u8 training_done_b : 1; + u8 training_done_a : 1; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 antidx_a : 4; + u8 antidx_b : 4; +#else + u8 antidx_b : 4; + u8 antidx_a : 4; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 antidx_c : 4; + u8 antidx_d : 4; +#else + u8 antidx_d : 4; + u8 antidx_c : 4; +#endif +/* @DW3 : offset 12 */ + u8 tx_pkt_cnt; +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 bad_tone_cnt_min_eign_1 : 4; + u8 bad_tone_cnt_cn_excess_1 : 4; +#else + u8 bad_tone_cnt_cn_excess_1 : 4; + u8 bad_tone_cnt_min_eign_1 : 4; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 avg_cond_num_0 : 7; + u8 avg_cond_num_1_lsb : 1; +#else + u8 avg_cond_num_1_lsb : 1; + u8 avg_cond_num_0 : 7; +#endif +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 avg_cond_num_1_msb : 6; + u8 rsvd_1 : 2; +#else + u8 rsvd_1 : 2; + u8 avg_cond_num_1_msb : 6; #endif - /* DW4 */ - s8 rxevm[4]; /* s(8,1) */ + /* @DW4 : offset 16 */ + s8 rxevm[4]; /* s(8,1) */ - /* DW5 */ - u8 eigenvalue[4]; /* eigenvalue or eigenvalue of seg0 (in dB) */ + /* @DW5 : offset 20 */ + u8 eigenvalue[4]; /* @eigenvalue or eigenvalue of seg0 (in dB) */ - /* DW6 */ - s8 rxsnr[4]; /* s(8,1) */ + /* @DW6 : ofset 24 */ + s8 rxsnr[4]; /* s(8,1) */ }; -__PACK struct _phy_status_rpt_jaguar2_type5 { - /* smart antenna */ - /* DW0 ane DW1 */ +__PACK struct phy_sts_rpt_jgr3_type5 { +/* @Debug */ +/* @DW0 ane DW1 : offset 0 and 4 */ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 page_num:4; - u8 pkt_cnt:2; - u8 channel_msb:2; + u8 page_num : 4; + u8 pkt_cnt : 2; + u8 channel_msb : 2; #else - u8 channel_msb:2; - u8 pkt_cnt:2; - u8 page_num:4; + u8 channel_msb : 2; + u8 pkt_cnt : 2; + u8 page_num : 4; #endif - u8 pwdb[4]; + u8 pwdb[4]; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 l_rxsc: 4; - u8 ht_rxsc: 4; + u8 l_rxsc : 4; + u8 ht_rxsc : 4; #else - u8 ht_rxsc: 4; - u8 l_rxsc: 4; + u8 ht_rxsc : 4; + u8 l_rxsc : 4; #endif - u8 channel_lsb; + u8 channel_lsb; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 band: 2; - u8 rsvd_0: 1; - u8 hw_antsw_occu: 1; - u8 gnt_bt: 1; - u8 ldpc: 1; - u8 stbc: 1; - u8 beamformed: 1; + u8 band : 2; + u8 rsvd_0 : 2; + u8 gnt_bt : 1; + u8 ldpc : 1; + u8 stbc : 1; + u8 beamformed : 1; #else - u8 beamformed: 1; - u8 stbc: 1; - u8 ldpc: 1; - u8 gnt_bt: 1; - u8 hw_antsw_occu: 1; - u8 rsvd_0: 1; - u8 band: 2; + u8 beamformed : 1; + u8 stbc : 1; + u8 ldpc : 1; + u8 gnt_bt : 1; + u8 rsvd_0 : 2; + u8 band : 2; #endif - /* DW2 ~ DW5 */ - u8 rsvd_1; + /* @DW2 : offset 8 */ + u8 rsvd_1; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 rsvd_2:4; - u8 hw_antsw_occur_a:1; - u8 hw_antsw_occur_b:1; - u8 hw_antsw_occur_c:1; - u8 hw_antsw_occur_d:1; - u8 antidx_a: 4; - u8 antidx_b: 4; - u8 antidx_c: 4; - u8 antidx_d: 4; + u8 rsvd_2 : 4; + u8 hw_antsw_occur_a : 1; + u8 hw_antsw_occur_b : 1; + u8 hw_antsw_occur_c : 1; + u8 hw_antsw_occur_d : 1; #else - u8 hw_antsw_occur_d:1; - u8 hw_antsw_occur_c:1; - u8 hw_antsw_occur_b:1; - u8 hw_antsw_occur_a:1; - u8 rsvd_2:4; - u8 antidx_b: 4; - u8 antidx_a: 4; - u8 antidx_d: 4; - u8 antidx_c: 4; + u8 hw_antsw_occur_d : 1; + u8 hw_antsw_occur_c : 1; + u8 hw_antsw_occur_b : 1; + u8 hw_antsw_occur_a : 1; + u8 rsvd_2 : 4; #endif - u8 tx_pkt_cnt; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) - u8 inf_pos_0_A_flg:1; - u8 inf_pos_1_A_flg:1; - u8 inf_pos_0_B_flg:1; - u8 inf_pos_1_B_flg:1; - u8 inf_pos_0_C_flg:1; - u8 inf_pos_1_C_flg:1; - u8 inf_pos_0_D_flg:1; - u8 inf_pos_1_D_flg:1; + u8 antidx_a : 4; + u8 antidx_b : 4; #else - u8 inf_pos_1_D_flg:1; - u8 inf_pos_0_D_flg:1; - u8 inf_pos_1_C_flg:1; - u8 inf_pos_0_C_flg:1; - u8 inf_pos_1_B_flg:1; - u8 inf_pos_0_B_flg:1; - u8 inf_pos_1_A_flg:1; - u8 inf_pos_0_A_flg:1; + u8 antidx_b : 4; + u8 antidx_a : 4; #endif - u8 rsvd_3; - u8 rsvd_4; - u8 inf_pos_0_a; - u8 inf_pos_1_a; - u8 inf_pos_0_b; - u8 inf_pos_1_b; - u8 inf_pos_0_c; - u8 inf_pos_1_c; - u8 inf_pos_0_d; - u8 inf_pos_1_d; +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 antidx_c : 4; + u8 antidx_d : 4; +#else + u8 antidx_d : 4; + u8 antidx_c : 4; +#endif + /* @DW3 : offset 12 */ + u8 tx_pkt_cnt; +#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) + u8 inf_pos_0_A_flg : 1; + u8 inf_pos_1_A_flg : 1; + u8 inf_pos_0_B_flg : 1; + u8 inf_pos_1_B_flg : 1; + u8 inf_pos_0_C_flg : 1; + u8 inf_pos_1_C_flg : 1; + u8 inf_pos_0_D_flg : 1; + u8 inf_pos_1_D_flg : 1; +#else + u8 inf_pos_1_D_flg : 1; + u8 inf_pos_0_D_flg : 1; + u8 inf_pos_1_C_flg : 1; + u8 inf_pos_0_C_flg : 1; + u8 inf_pos_1_B_flg : 1; + u8 inf_pos_0_B_flg : 1; + u8 inf_pos_1_A_flg : 1; + u8 inf_pos_0_A_flg : 1; +#endif + u8 rsvd_3; + u8 rsvd_4; + /* @DW4 : offset 16 */ + u8 inf_pos_0_a; + u8 inf_pos_1_a; + u8 inf_pos_0_b; + u8 inf_pos_1_b; + /* @DW5 : offset 20 */ + u8 inf_pos_0_c; + u8 inf_pos_1_c; + u8 inf_pos_0_d; + u8 inf_pos_1_d; }; -#endif /*#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)*/ +#endif /*@#ifdef PHYSTS_3RD_TYPE_SUPPORT*/ #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) - -void -phydm_rx_phy_status_new_type( - void *dm_void, - u8 *phy_status_inf, - struct phydm_perpkt_info_struct *pktinfo, - struct phydm_phyinfo_struct *phy_info -); - boolean -phydm_query_is_mu_api( - struct dm_struct *phydm, - u8 ppdu_idx, - u8 *p_data_rate, - u8 *p_gid -); +phydm_query_is_mu_api(struct dm_struct *phydm, u8 ppdu_idx, u8 *p_data_rate, + u8 *p_gid); #endif -void -phydm_reset_phystatus_avg( - struct dm_struct *dm -); +#ifdef PHYSTS_3RD_TYPE_SUPPORT +void phydm_rx_physts_3rd_type(void *dm_void, u8 *phy_sts, + struct phydm_perpkt_info_struct *pktinfo, + struct phydm_phyinfo_struct *phy_info); +#endif -void -phydm_reset_phystatus_statistic( - struct dm_struct *dm -); +void phydm_reset_phystatus_avg(struct dm_struct *dm); -void -phydm_reset_rssi_for_dm( - struct dm_struct *dm, - u8 station_id -); +void phydm_reset_phystatus_statistic(struct dm_struct *dm); -void -phydm_get_cck_rssi_table_from_reg( - struct dm_struct *dm -); +void phydm_reset_rssi_for_dm(struct dm_struct *dm, u8 station_id); -u8 -phydm_rate_to_num_ss( - struct dm_struct *dm, - u8 data_rate -); +void phydm_get_cck_rssi_table_from_reg(struct dm_struct *dm); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -phydm_normal_driver_rx_sniffer( - struct dm_struct *dm, - u8 *desc, - PRT_RFD_STATUS rt_rfd_status, - u8 *drv_info, - u8 phy_status -); +void phydm_normal_driver_rx_sniffer( + struct dm_struct *dm, + u8 *desc, + PRT_RFD_STATUS rt_rfd_status, + u8 *drv_info, + u8 phy_status); #endif #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -s32 -phydm_signal_scale_mapping( - struct dm_struct *dm, - s32 curr_sig -); +s32 phydm_signal_scale_mapping(struct dm_struct *dm, s32 curr_sig); #endif -void -odm_phy_status_query( - struct dm_struct *dm, - struct phydm_phyinfo_struct *phy_info, - u8 *phy_status_inf, - struct phydm_perpkt_info_struct *pktinfo -); +void odm_phy_status_query(struct dm_struct *dm, + struct phydm_phyinfo_struct *phy_info, + u8 *phy_status_inf, + struct phydm_perpkt_info_struct *pktinfo); -void -phydm_rx_phy_status_init( - void *dm_void -); +void phydm_rx_phy_status_init(void *dm_void); -#endif /*#ifndef __HALHWOUTSRC_H__*/ +#endif /*@#ifndef __HALHWOUTSRC_H__*/ diff --git a/hal/phydm/phydm_pmac_tx_setting.c b/hal/phydm/phydm_pmac_tx_setting.c new file mode 100644 index 0000000..8ce7ba4 --- /dev/null +++ b/hal/phydm/phydm_pmac_tx_setting.c @@ -0,0 +1,550 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +/*@************************************************************ + * include files + ************************************************************/ + +#include "mp_precomp.h" +#include "phydm_precomp.h" + +#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + +void phydm_start_cck_cont_tx_jgr3(void *dm_void, + struct phydm_pmac_info *tx_info) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; + u8 rate = tx_info->tx_rate; /* @HW rate */ + + /* @if CCK block on? */ + if (!odm_get_bb_reg(dm, R_0x1c3c, BIT(1))) + odm_set_bb_reg(dm, R_0x1c3c, BIT(1), 1); + + /* @Turn Off All Test mode */ + odm_set_bb_reg(dm, R_0x1ca4, 0x7, 0x0); + + odm_set_bb_reg(dm, R_0x1a00, 0x3000, rate); + odm_set_bb_reg(dm, R_0x1a00, 0x3, 0x2); /* @transmit mode */ + odm_set_bb_reg(dm, R_0x1a00, 0x8, 0x1); /* @turn on scramble setting */ + + /* @Fix rate selection issue */ + odm_set_bb_reg(dm, R_0x1a70, 0x4000, 0x1); + /* @set RX weighting for path I & Q to 0 */ + odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x3); + /* @set loopback mode */ + odm_set_bb_reg(dm, R_0x1c3c, 0x10, 0x1); + + pmac_tx->cck_cont_tx = true; + pmac_tx->ofdm_cont_tx = false; +} + +void phydm_stop_cck_cont_tx_jgr3(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; + + pmac_tx->cck_cont_tx = false; + pmac_tx->ofdm_cont_tx = false; + + odm_set_bb_reg(dm, R_0x1a00, 0x3, 0x0); /* @normal mode */ + odm_set_bb_reg(dm, R_0x1a00, 0x8, 0x1); /* @turn on scramble setting */ + + /* @back to default */ + odm_set_bb_reg(dm, R_0x1a70, 0x4000, 0x0); + odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x0); + odm_set_bb_reg(dm, R_0x1c3c, 0x10, 0x0); + /* @BB Reset */ + odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x0); + odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x1); +} + +void phydm_start_ofdm_cont_tx_jgr3(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; + + /* @1. if OFDM block on */ + if (!odm_get_bb_reg(dm, R_0x1c3c, BIT(0))) + odm_set_bb_reg(dm, R_0x1c3c, BIT(0), 1); + + /* @2. set CCK test mode off, set to CCK normal mode */ + odm_set_bb_reg(dm, R_0x1a00, 0x3, 0); + + /* @3. turn on scramble setting */ + odm_set_bb_reg(dm, R_0x1a00, 0x8, 1); + + /* @4. Turn On Continue Tx and turn off the other test modes. */ + odm_set_bb_reg(dm, R_0x1ca4, 0x7, 0x1); + + pmac_tx->cck_cont_tx = false; + pmac_tx->ofdm_cont_tx = true; +} + +void phydm_stop_ofdm_cont_tx_jgr3(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; + + pmac_tx->cck_cont_tx = false; + pmac_tx->ofdm_cont_tx = false; + + /* @Turn Off All Test mode */ + odm_set_bb_reg(dm, R_0x1ca4, 0x7, 0x0); + + /* @Delay 10 ms */ + ODM_delay_ms(10); + + /* @BB Reset */ + odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x0); + odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x1); +} + +void phydm_set_single_tone_jgr3(void *dm_void, boolean is_single_tone, + boolean en_pmac_tx, u8 path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; + u8 start = RF_PATH_A, end = RF_PATH_A; + u8 i = 0; + + switch (path) { + case RF_PATH_A: + case RF_PATH_B: + case RF_PATH_C: + case RF_PATH_D: + start = path; + end = path; + break; + case RF_PATH_AB: + start = RF_PATH_A; + end = RF_PATH_B; + break; +#if (RTL8814B_SUPPORT || RTL8198F_SUPPORT) + case RF_PATH_AC: + start = RF_PATH_A; + end = RF_PATH_C; + break; + case RF_PATH_AD: + start = RF_PATH_A; + end = RF_PATH_D; + break; + case RF_PATH_BC: + start = RF_PATH_B; + end = RF_PATH_C; + break; + case RF_PATH_BD: + start = RF_PATH_B; + end = RF_PATH_D; + break; + case RF_PATH_CD: + start = RF_PATH_C; + end = RF_PATH_D; + break; + case RF_PATH_ABC: + start = RF_PATH_A; + end = RF_PATH_C; + break; + case RF_PATH_ABD: + start = RF_PATH_A; + end = RF_PATH_D; + break; + case RF_PATH_ACD: + start = RF_PATH_A; + end = RF_PATH_D; + break; + case RF_PATH_BCD: + start = RF_PATH_B; + end = RF_PATH_D; + break; + case RF_PATH_ABCD: + start = RF_PATH_A; + end = RF_PATH_D; + break; +#endif + } + + if (is_single_tone) { + pmac_tx->tx_scailing = odm_get_bb_reg(dm, R_0x81c, MASKDWORD); + + if (!en_pmac_tx) { + phydm_start_ofdm_cont_tx_jgr3(dm); + /*SendPSPoll(pAdapter);*/ + } + + odm_set_bb_reg(dm, R_0x1c68, BIT(24), 0x1); /* @Disable CCA */ + + for (i = start; i <= end; i++) { + /* @Tx mode: RF0x00[19:16]=4'b0010 */ + /* @odm_set_rf_reg(dm, i, RF_0x0, 0xF0000, 0x2); */ + /* @Lowest RF gain index: RF_0x0[4:0] = 0*/ + odm_set_rf_reg(dm, i, RF_0x0, 0x1F, 0x0); + /* @RF LO enabled */ + odm_set_rf_reg(dm, i, RF_0x58, BIT(1), 0x1); + } + #if (RTL8814B_SUPPORT == 1) + if (dm->support_ic_type & ODM_RTL8814B) { + /* @Tx mode: RF0x00[19:16]=4'b0010 */ + /* config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x0, + * 0xF0000, 0x2); + */ + /* @Lowest RF gain index: RF_0x0[4:0] = 0*/ + config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x0, + 0x1F, 0x0); + /* @RF LO enabled */ + config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x58, + BIT(1), 0x1); + } + #endif + odm_set_bb_reg(dm, R_0x81c, 0x001FC000, 0); + } else { + for (i = start; i <= end; i++) { + /* @RF LO disabled */ + odm_set_rf_reg(dm, i, RF_0x58, BIT(1), 0x0); + } + odm_set_bb_reg(dm, R_0x1c68, BIT(24), 0x0); /* @Enable CCA */ + + if (!en_pmac_tx) + phydm_stop_ofdm_cont_tx_jgr3(dm); + + odm_set_bb_reg(dm, R_0x81c, MASKDWORD, pmac_tx->tx_scailing); + } +} + +void phydm_stop_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; + u32 tmp = 0; + + if (tx_info->mode == CONT_TX) { + odm_set_bb_reg(dm, R_0x1e70, 0xf, 2); /* TX Stop */ + if (pmac_tx->is_cck_rate) + phydm_stop_cck_cont_tx_jgr3(dm); + else + phydm_stop_ofdm_cont_tx_jgr3(dm); + } else { + if (pmac_tx->is_cck_rate) { + tmp = odm_get_bb_reg(dm, R_0x2de4, MASKLWORD); + odm_set_bb_reg(dm, R_0x1e64, MASKLWORD, tmp + 50); + } + odm_set_bb_reg(dm, R_0x1e70, 0xf, 2); /* TX Stop */ + } + + if (tx_info->mode == OFDM_SINGLE_TONE_TX) { + /* Stop HW TX -> Stop Continuous TX -> Stop RF Setting */ + if (pmac_tx->is_cck_rate) + phydm_stop_cck_cont_tx_jgr3(dm); + else + phydm_stop_ofdm_cont_tx_jgr3(dm); + + phydm_set_single_tone_jgr3(dm, false, true, pmac_tx->path); + } +} + +void phydm_set_mac_phy_txinfo_jgr3(void *dm_void, + struct phydm_pmac_info *tx_info) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; + u32 tmp = 0; + + odm_set_bb_reg(dm, R_0xa58, 0x003F8000, tx_info->tx_rate); + + /* @0x900[1] ndp_sound */ + odm_set_bb_reg(dm, R_0x900, 0x2, tx_info->ndp_sound); + + /* @0x900[27:24] txsc [29:28] bw [31:30] m_stbc */ + if (dm->support_ic_type & ODM_RTL8812F) { + tmp = (tx_info->tx_sc) | ((tx_info->bw) << 4) | + ((tx_info->m_stbc) << 6); + } else { + tmp = (tx_info->tx_sc) | ((tx_info->bw) << 4) | + ((tx_info->m_stbc - 1) << 6); + } + odm_set_bb_reg(dm, R_0x900, 0xFF000000, tmp); + + if (pmac_tx->is_ofdm_rate) { + odm_set_bb_reg(dm, R_0x900, 0x1, 0); + odm_set_bb_reg(dm, R_0x900, 0x4, 0); + } else if (pmac_tx->is_ht_rate) { + odm_set_bb_reg(dm, R_0x900, 0x1, 1); + odm_set_bb_reg(dm, R_0x900, 0x4, 0); + } else if (pmac_tx->is_vht_rate) { + odm_set_bb_reg(dm, R_0x900, 0x1, 0); + odm_set_bb_reg(dm, R_0x900, 0x4, 1); + } + + tmp = tx_info->packet_period; /* @for TX interval */ + odm_set_bb_reg(dm, R_0x9b8, 0xffff0000, tmp); +} + +void phydm_set_sig_jgr3(void *dm_void, struct phydm_pmac_info *tx_info) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; + u32 tmp = 0; + + if (pmac_tx->is_cck_rate) + return; + + /* @L-SIG */ + odm_set_bb_reg(dm, R_0x1eb4, 0xfffff, tx_info->packet_count); + + tmp = BYTE_2_DWORD(0, tx_info->lsig[2], tx_info->lsig[1], + tx_info->lsig[0]); + odm_set_bb_reg(dm, R_0x908, 0xffffff, tmp); +#if 0 + /* @0x924[7:0] = Data init octet */ + tmp = tx_info->packet_pattern; + odm_set_bb_reg(dm, R_0x924, 0xff, tmp); + + if (tx_info->packet_pattern == RANDOM_BY_PN32) + tmp = 0x3; + else + tmp = 0x0; + + odm_set_bb_reg(dm, R_0x914, 0x60000000, tmp); +#endif + if (pmac_tx->is_ht_rate) { + /* @HT SIG */ + tmp = BYTE_2_DWORD(0, tx_info->ht_sig[2], tx_info->ht_sig[1], + tx_info->ht_sig[0]); + odm_set_bb_reg(dm, R_0x90c, 0xffffff, tmp); + tmp = BYTE_2_DWORD(0, tx_info->ht_sig[5], tx_info->ht_sig[4], + tx_info->ht_sig[3]); + odm_set_bb_reg(dm, R_0x910, 0xffffff, tmp); + } else if (pmac_tx->is_vht_rate) { + /* @VHT SIG A/B/serv_field/delimiter */ + tmp = BYTE_2_DWORD(0, tx_info->vht_sig_a[2], + tx_info->vht_sig_a[1], + tx_info->vht_sig_a[0]); + odm_set_bb_reg(dm, R_0x90c, 0xffffff, tmp); + tmp = BYTE_2_DWORD(0, tx_info->vht_sig_a[5], + tx_info->vht_sig_a[4], + tx_info->vht_sig_a[3]); + odm_set_bb_reg(dm, R_0x910, 0xffffff, tmp); + tmp = BYTE_2_DWORD(tx_info->vht_sig_b[3], tx_info->vht_sig_b[2], + tx_info->vht_sig_b[1], + tx_info->vht_sig_b[0]); + odm_set_bb_reg(dm, R_0x914, 0x1FFFFFFF, tmp); + + tmp = tx_info->vht_sig_b_crc; + odm_set_bb_reg(dm, R_0x938, 0xff00, tmp); + + tmp = BYTE_2_DWORD(tx_info->vht_delimiter[3], + tx_info->vht_delimiter[2], + tx_info->vht_delimiter[1], + tx_info->vht_delimiter[0]); + odm_set_bb_reg(dm, R_0x940, MASKDWORD, tmp); + } +} + +void phydm_set_cck_preamble_hdr_jgr3(void *dm_void, + struct phydm_pmac_info *tx_info) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; + u32 tmp = 0; + + if (!pmac_tx->is_cck_rate) + return; + + tmp = tx_info->packet_count | (tx_info->sfd << 16); + odm_set_bb_reg(dm, R_0x1e64, MASKDWORD, tmp); + tmp = tx_info->signal_field | (tx_info->service_field << 8) | + (tx_info->length << 16); + odm_set_bb_reg(dm, R_0x1e68, MASKDWORD, tmp); + tmp = BYTE_2_DWORD(0, 0, tx_info->crc16[1], tx_info->crc16[0]); + odm_set_bb_reg(dm, R_0x1e6c, 0xffff, tmp); + + if (tx_info->is_short_preamble) + odm_set_bb_reg(dm, R_0x1e6c, BIT(16), 0); + else + odm_set_bb_reg(dm, R_0x1e6c, BIT(16), 1); +} + +void phydm_set_mode_jgr3(void *dm_void, struct phydm_pmac_info *tx_info, + enum phydm_pmac_mode mode) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; + + if (mode == CONT_TX) { + tx_info->packet_count = 1; + + if (pmac_tx->is_cck_rate) + phydm_start_cck_cont_tx_jgr3(dm, tx_info); + else + phydm_start_ofdm_cont_tx_jgr3(dm); + } else if (mode == OFDM_SINGLE_TONE_TX) { + /* Continuous TX -> HW TX -> RF Setting */ + tx_info->packet_count = 1; + + if (pmac_tx->is_cck_rate) + phydm_start_cck_cont_tx_jgr3(dm, tx_info); + else + phydm_start_ofdm_cont_tx_jgr3(dm); + } else if (mode == PKTS_TX) { + if (pmac_tx->is_cck_rate && tx_info->packet_count == 0) + tx_info->packet_count = 0xffff; + } +} + +void phydm_set_pmac_txon_jgr3(void *dm_void, struct phydm_pmac_info *tx_info) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; + + odm_set_bb_reg(dm, R_0x1d08, BIT(0), 1); /* Turn on PMAC */ + + /* mac scramble seed setting, only in 8198F */ + #if (RTL8198F_SUPPORT) + if (dm->support_ic_type & ODM_RTL8198F) + if (!odm_get_bb_reg(dm, R_0x1d10, BIT(16))) + odm_set_bb_reg(dm, R_0x1d10, BIT(16), 1); + #endif + + if (pmac_tx->is_cck_rate) { + odm_set_bb_reg(dm, R_0x1e70, 0xf, 8); /* TX CCK ON */ + odm_set_bb_reg(dm, R_0x1a84, BIT(31), 0); + } else { + odm_set_bb_reg(dm, R_0x1e70, 0xf, 4); /* TX Ofdm ON */ + } + + if (tx_info->mode == OFDM_SINGLE_TONE_TX) + phydm_set_single_tone_jgr3(dm, true, true, pmac_tx->path); +} + +void phydm_set_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info, + enum rf_path mpt_rf_path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; + + pmac_tx->is_cck_rate = phydm_is_cck_rate(dm, tx_info->tx_rate); + pmac_tx->is_ofdm_rate = phydm_is_ofdm_rate(dm, tx_info->tx_rate); + pmac_tx->is_ht_rate = phydm_is_ht_rate(dm, tx_info->tx_rate); + pmac_tx->is_vht_rate = phydm_is_vht_rate(dm, tx_info->tx_rate); + pmac_tx->path = mpt_rf_path; + + if (!tx_info->en_pmac_tx) { + phydm_stop_pmac_tx_jgr3(dm, tx_info); + return; + } + + phydm_set_mode_jgr3(dm, tx_info, tx_info->mode); + + if (pmac_tx->is_cck_rate) + phydm_set_cck_preamble_hdr_jgr3(dm, tx_info); + else + phydm_set_sig_jgr3(dm, tx_info); + + phydm_set_mac_phy_txinfo_jgr3(dm, tx_info); + phydm_set_pmac_txon_jgr3(dm, tx_info); +} + +void phydm_set_tmac_tx_jgr3(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + /* Turn on TMAC */ + if (odm_get_bb_reg(dm, R_0x1d08, BIT(0))) + odm_set_bb_reg(dm, R_0x1d08, BIT(0), 0); + + /* mac scramble seed setting, only in 8198F */ + #if (RTL8198F_SUPPORT == 1) + if (dm->support_ic_type & ODM_RTL8198F) + if (odm_get_bb_reg(dm, R_0x1d10, BIT(16))) + odm_set_bb_reg(dm, R_0x1d10, BIT(16), 0); + #endif + + /* Turn on TMAC CCK */ + if ((odm_get_bb_reg(dm, R_0x1a84, BIT(31))) == 0) + odm_set_bb_reg(dm, R_0x1a84, BIT(31), 1); +} +#endif + +void phydm_start_cck_cont_tx(void *dm_void, struct phydm_pmac_info *tx_info) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + phydm_start_cck_cont_tx_jgr3(dm, tx_info); +} + +void phydm_stop_cck_cont_tx(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + phydm_stop_cck_cont_tx_jgr3(dm); +} + +void phydm_start_ofdm_cont_tx(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + phydm_start_ofdm_cont_tx_jgr3(dm); +} + +void phydm_stop_ofdm_cont_tx(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + phydm_stop_ofdm_cont_tx_jgr3(dm); +} + +void phydm_set_single_tone(void *dm_void, boolean is_single_tone, + boolean en_pmac_tx, u8 path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + phydm_set_single_tone_jgr3(dm, is_single_tone, + en_pmac_tx, path); +} + +void phydm_set_pmac_tx(void *dm_void, struct phydm_pmac_info *tx_info, + enum rf_path mpt_rf_path) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + phydm_set_pmac_tx_jgr3(dm, tx_info, mpt_rf_path); +} + +void phydm_set_tmac_tx(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + phydm_set_tmac_tx_jgr3(dm); +} + +#endif diff --git a/hal/phydm/phydm_pmac_tx_setting.h b/hal/phydm/phydm_pmac_tx_setting.h new file mode 100644 index 0000000..f84cd6e --- /dev/null +++ b/hal/phydm/phydm_pmac_tx_setting.h @@ -0,0 +1,117 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +#ifndef __PHYDM_PMAC_TX_SETTING_H__ +#define __PHYDM_PMAC_TX_SETTING_H__ + +#define PMAC_TX_SETTING_VERSION "1.3" + +/* @1 ============================================================ + * 1 Definition + * 1 ============================================================ + */ +#define RANDOM_BY_PN32 0x12 +/* @1 ============================================================ + * 1 structure + * 1 ============================================================ + */ +struct phydm_pmac_info { + u8 en_pmac_tx:1; /*@ disable pmac 1: enable pmac */ + u8 mode:3; /*@ 0: Packet TX 3:Continuous TX */ + /* @u8 Ntx:4; */ + u8 tx_rate; /* @should be HW rate*/ + /* @u8 TX_RATE_HEX; */ + u8 tx_sc; + /* @u8 bSGI:1; */ + u8 is_short_preamble:1; + /* @u8 bSTBC:1; */ + /* @u8 bLDPC:1; */ + u8 ndp_sound:1; + u8 bw:3; /* @0:20 1:40 2:80Mhz */ + u8 m_stbc; /* @bSTBC + 1 */ + u16 packet_period; + u32 packet_count; + /* @u32 PacketLength; */ + u8 packet_pattern; + u16 sfd; + u8 signal_field; + u8 service_field; + u16 length; + u8 crc16[2]; + u8 lsig[3]; + u8 ht_sig[6]; + u8 vht_sig_a[6]; + u8 vht_sig_b[4]; + u8 vht_sig_b_crc; + u8 vht_delimiter[4]; + /* @u8 mac_addr[6]; */ +}; + +struct phydm_pmac_tx { + boolean is_cck_rate; + boolean is_ofdm_rate; + boolean is_ht_rate; + boolean is_vht_rate; + boolean cck_cont_tx; + boolean ofdm_cont_tx; + u8 path; + u32 tx_scailing; +}; + +/* @1 ============================================================ + * 1 enumeration + * 1 ============================================================ + */ + +enum phydm_pmac_mode { + NONE_TEST, + PKTS_TX, + PKTS_RX, + CONT_TX, + OFDM_SINGLE_TONE_TX, + CCK_CARRIER_SIPPRESSION_TX +}; + +/* @1 ============================================================ + * 1 function prototype + * 1 ============================================================ + */ +void phydm_start_cck_cont_tx(void *dm_void, struct phydm_pmac_info *tx_info); + +void phydm_stop_cck_cont_tx(void *dm_void); + +void phydm_start_ofdm_cont_tx(void *dm_void); + +void phydm_stop_ofdm_cont_tx(void *dm_void); + +void phydm_set_single_tone(void *dm_void, boolean is_single_tone, + boolean en_pmac_tx, u8 path); + +void phydm_set_pmac_tx(void *dm_void, struct phydm_pmac_info *tx_info, + enum rf_path mpt_rf_path); + +void phydm_set_tmac_tx(void *dm_void); + +#endif diff --git a/hal/phydm/phydm_pow_train.c b/hal/phydm/phydm_pow_train.c index 477f5d1..56bc241 100644 --- a/hal/phydm/phydm_pow_train.c +++ b/hal/phydm/phydm_pow_train.c @@ -23,206 +23,149 @@ * *****************************************************************************/ -/* ************************************************************ +/************************************************************* * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" #ifdef PHYDM_POWER_TRAINING_SUPPORT -void -phydm_reset_pt_para( - void *dm_void -) +void phydm_reset_pt_para(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_pow_train_stuc *pow_train_t = &dm->pow_train_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pow_train_stuc *pt_t = &dm->pow_train_table; - pow_train_t->pow_train_score = 0; - dm->phy_dbg_info.num_qry_phy_status_ofdm = 0; - dm->phy_dbg_info.num_qry_phy_status_cck = 0; + pt_t->pow_train_score = 0; } -void -phydm_update_power_training_state( - void *dm_void -) +void phydm_update_power_training_state(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_pow_train_stuc *pow_train_t = &dm->pow_train_table; - struct phydm_fa_struct *fa_cnt = &dm->false_alm_cnt; - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - u32 pt_score_tmp = 0; - u32 crc_ok_cnt; - u32 cca_all_cnt; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pow_train_stuc *pt_t = &dm->pow_train_table; + struct phydm_fa_struct *fa_cnt = &dm->false_alm_cnt; + struct ccx_info *ccx = &dm->dm_ccx_info; + u32 pt_score_tmp = ENABLE_PT_SCORE; + u32 crc_ok_cnt = 0; + u32 cca_cnt = 0; - - /*is_disable_power_training is the key to H2C to disable/enable power training*/ - /*if is_disable_power_training == 1, it will use largest power*/ - if (!(dm->support_ability & ODM_BB_PWR_TRAIN)) { + /*@is_disable_power_training is the key to H2C to disable/enable PT*/ + /*@if is_disable_power_training == 1, it will use largest power*/ + if (!(dm->support_ability & ODM_BB_PWR_TRAIN) || !dm->is_linked) { dm->is_disable_power_training = true; phydm_reset_pt_para(dm); return; } - PHYDM_DBG(dm, DBG_PWR_TRAIN, "%s ======>\n", __FUNCTION__); + PHYDM_DBG(dm, DBG_PWR_TRAIN, "%s ======>\n", __func__); - if (pow_train_t->force_power_training_state == DISABLE_POW_TRAIN) { - + if (pt_t->pt_state == DISABLE_POW_TRAIN) { dm->is_disable_power_training = true; phydm_reset_pt_para(dm); PHYDM_DBG(dm, DBG_PWR_TRAIN, "Disable PT\n"); return; - } else if (pow_train_t->force_power_training_state == ENABLE_POW_TRAIN) { - + } else if (pt_t->pt_state == ENABLE_POW_TRAIN) { dm->is_disable_power_training = false; phydm_reset_pt_para(dm); PHYDM_DBG(dm, DBG_PWR_TRAIN, "Enable PT\n"); return; - } else if (pow_train_t->force_power_training_state == DYNAMIC_POW_TRAIN) { + } else if (pt_t->pt_state == DYNAMIC_POW_TRAIN) { PHYDM_DBG(dm, DBG_PWR_TRAIN, "Dynamic PT\n"); - if (!dm->is_linked) { + /* @Compute score */ + crc_ok_cnt = dm->phy_dbg_info.num_qry_phy_status_ofdm + + dm->phy_dbg_info.num_qry_phy_status_cck; + cca_cnt = fa_cnt->cnt_cca_all; +#if 0 + if (crc_ok_cnt > cca_cnt) { /*invalid situation*/ + pt_score_tmp = KEEP_PRE_PT_SCORE; + return; + } else if ((crc_ok_cnt + (crc_ok_cnt >> 1)) <= cca_cnt) { + /* @???crc_ok <= (2/3)*cca */ + pt_score_tmp = DISABLE_PT_SCORE; dm->is_disable_power_training = true; - pow_train_t->pow_train_score = 0; - dm->phy_dbg_info.num_qry_phy_status_ofdm = 0; - dm->phy_dbg_info.num_qry_phy_status_cck = 0; - - PHYDM_DBG(dm, DBG_PWR_TRAIN, "PT is disabled due to no link.\n"); - return; - } - - /* First connect */ - if ((dm->is_linked) && (!dig_t->is_media_connect)) { - pow_train_t->pow_train_score = 0; - dm->phy_dbg_info.num_qry_phy_status_ofdm = 0; - dm->phy_dbg_info.num_qry_phy_status_cck = 0; - PHYDM_DBG(dm, DBG_PWR_TRAIN, "(PT)First Connect\n"); - return; - } - - /* Compute score */ - crc_ok_cnt = dm->phy_dbg_info.num_qry_phy_status_ofdm + dm->phy_dbg_info.num_qry_phy_status_cck; - cca_all_cnt = fa_cnt->cnt_cca_all; - - if (crc_ok_cnt < cca_all_cnt) { - /* crc_ok <= (2/3)*cca */ - if ((crc_ok_cnt + (crc_ok_cnt >> 1)) <= cca_all_cnt) - pt_score_tmp = DISABLE_PT_SCORE; - - /* crc_ok <= (4/5)*cca */ - else if ((crc_ok_cnt + (crc_ok_cnt >> 2)) <= cca_all_cnt) - pt_score_tmp = KEEP_PRE_PT_SCORE; - - /* crc_ok > (4/5)*cca */ - else - pt_score_tmp = ENABLE_PT_SCORE; + } else if ((crc_ok_cnt + (crc_ok_cnt >> 2)) <= cca_cnt) { + /* @???crc_ok <= (4/5)*cca */ + pt_score_tmp = KEEP_PRE_PT_SCORE; } else { + /* @???crc_ok > (4/5)*cca */ pt_score_tmp = ENABLE_PT_SCORE; + dm->is_disable_power_training = false; + } +#endif + if (ccx->nhm_ratio > 10) { + pt_score_tmp = DISABLE_PT_SCORE; + dm->is_disable_power_training = true; + } else if (ccx->nhm_ratio < 5) { + pt_score_tmp = ENABLE_PT_SCORE; + dm->is_disable_power_training = false; + } else { + pt_score_tmp = KEEP_PRE_PT_SCORE; } - PHYDM_DBG(dm, DBG_PWR_TRAIN, "crc_ok_cnt = %d, cnt_cca_all = %d\n", - crc_ok_cnt, cca_all_cnt); + PHYDM_DBG(dm, DBG_PWR_TRAIN, + "pkt_cnt{ofdm,cck,all} = {%d, %d, %d}, cnt_cca_all=%d\n", + dm->phy_dbg_info.num_qry_phy_status_ofdm, + dm->phy_dbg_info.num_qry_phy_status_cck, + crc_ok_cnt, cca_cnt); - PHYDM_DBG(dm, DBG_PWR_TRAIN, "num_qry_phy_status_ofdm = %d, num_qry_phy_status_cck = %d\n", - dm->phy_dbg_info.num_qry_phy_status_ofdm, dm->phy_dbg_info.num_qry_phy_status_cck); - - PHYDM_DBG(dm, DBG_PWR_TRAIN, "pt_score_tmp = %d\n", pt_score_tmp); - PHYDM_DBG(dm, DBG_PWR_TRAIN, "pt_score_tmp = 0(DISABLE), 1(KEEP), 2(ENABLE)\n"); + PHYDM_DBG(dm, DBG_PWR_TRAIN, "pt_score_tmp=%d\n", pt_score_tmp); /* smoothing */ - pow_train_t->pow_train_score = (pt_score_tmp << 4) + (pow_train_t->pow_train_score >> 1) + (pow_train_t->pow_train_score >> 2); - pt_score_tmp = (pow_train_t->pow_train_score + 32) >> 6; - PHYDM_DBG(dm, DBG_PWR_TRAIN, "pow_train_score = %d, score after smoothing = %d\n", - pow_train_t->pow_train_score, pt_score_tmp); + pt_t->pow_train_score = (pt_score_tmp << 4) + + (pt_t->pow_train_score >> 1) + + (pt_t->pow_train_score >> 2); - /* mode decision */ - if (pt_score_tmp == ENABLE_PT_SCORE) { - - dm->is_disable_power_training = false; - PHYDM_DBG(dm, DBG_PWR_TRAIN, "Enable power training under dynamic.\n"); - - } else if (pt_score_tmp == DISABLE_PT_SCORE) { - - dm->is_disable_power_training = true; - PHYDM_DBG(dm, DBG_PWR_TRAIN, "Disable PT due to noisy.\n"); - } + pt_score_tmp = (pt_t->pow_train_score + 32) >> 6; - PHYDM_DBG(dm, DBG_PWR_TRAIN, "Final, score = %d, is_disable_power_training = %d\n", - pt_score_tmp, dm->is_disable_power_training); - - dm->phy_dbg_info.num_qry_phy_status_ofdm = 0; - dm->phy_dbg_info.num_qry_phy_status_cck = 0; + PHYDM_DBG(dm, DBG_PWR_TRAIN, + "pow_train_score = %d, score after smoothing = %d, is_disable_PT = %d\n", + pt_t->pow_train_score, pt_score_tmp, + dm->is_disable_power_training); } else { - - dm->is_disable_power_training = true; - phydm_reset_pt_para(dm); - - PHYDM_DBG(dm, DBG_PWR_TRAIN, "PT is disabled due to unknown pt state.\n"); - return; + PHYDM_DBG(dm, DBG_PWR_TRAIN, "[%s]warning\n", __func__); } } -void -phydm_pow_train_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +void phydm_pow_train_debug( + void *dm_void, + char input[][16], + u32 *_used, + char *output, + u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_pow_train_stuc *pow_train_t = &dm->pow_train_table; - char help[] = "-h"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; - u32 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pow_train_stuc *pt_t = &dm->pow_train_table; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + u32 i; if ((strcmp(input[1], help) == 0)) { PDM_SNPF(out_len, used, output + used, out_len - used, - "0: Dynamic state\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "1: Enable PT\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "2: Disable PT\n"); - + "{0: Auto PT, 1:enable, 2: disable}\n"); } else { for (i = 0; i < 10; i++) { - if (input[i + 1]) { + if (input[i + 1]) PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); - } } - if (var1[0] == 0) { - pow_train_t->force_power_training_state = DYNAMIC_POW_TRAIN; - PDM_SNPF(out_len, used, output + used, - out_len - used, "Dynamic state\n"); - } else if (var1[0] == 1) { - pow_train_t->force_power_training_state = ENABLE_POW_TRAIN; - PDM_SNPF(out_len, used, output + used, - out_len - used, "Enable PT\n"); - } else if (var1[0] == 2) { - pow_train_t->force_power_training_state = DISABLE_POW_TRAIN; - PDM_SNPF(out_len, used, output + used, - out_len - used, "Disable PT\n"); - } else { - PDM_SNPF(out_len, used, output + used, - out_len - used, "Set Error\n"); - } + if (var1[0] == 0) + pt_t->pt_state = DYNAMIC_POW_TRAIN; + else if (var1[0] == 1) + pt_t->pt_state = ENABLE_POW_TRAIN; + else if (var1[0] == 2) + pt_t->pt_state = DISABLE_POW_TRAIN; + + PDM_SNPF(out_len, used, output + used, out_len - used, + "PT state = %d\n", pt_t->pt_state); } *_used = used; *_out_len = out_len; } - #endif - - - diff --git a/hal/phydm/phydm_pow_train.h b/hal/phydm/phydm_pow_train.h index 0b4e938..f966607 100644 --- a/hal/phydm/phydm_pow_train.h +++ b/hal/phydm/phydm_pow_train.h @@ -23,33 +23,34 @@ * *****************************************************************************/ +#ifndef __PHYDM_POW_TRAIN_H__ +#define __PHYDM_POW_TRAIN_H__ -#ifndef __PHYDM_POW_TRAIN_H__ -#define __PHYDM_POW_TRAIN_H__ +#define POW_TRAIN_VERSION "1.0" /* @2017.07.0141 Dino, Add phydm_pow_train.h*/ -#define POW_TRAIN_VERSION "1.0" /* 2017.07.0141 Dino, Add phydm_pow_train.h*/ - - -/* 1 ============================================================ +/**************************************************************** + * 1 ============================================================ * 1 Definition - * 1 ============================================================ */ - + * 1 ============================================================ + ***************************************************************/ #ifdef PHYDM_POWER_TRAINING_SUPPORT -/* 1 ============================================================ +/**************************************************************** + * 1 ============================================================ * 1 structure - * 1 ============================================================ */ - + * 1 ============================================================ + ***************************************************************/ struct phydm_pow_train_stuc { - u8 force_power_training_state; - u32 pow_train_score; + u8 pt_state; + u32 pow_train_score; }; -/* 1 ============================================================ +/**************************************************************** + * 1 ============================================================ * 1 enumeration - * 1 ============================================================ */ - + * 1 ============================================================ + ***************************************************************/ enum pow_train_state { DYNAMIC_POW_TRAIN = 0, @@ -63,24 +64,21 @@ enum power_training_score { ENABLE_PT_SCORE = 2 }; -/* 1 ============================================================ +/**************************************************************** + * 1 ============================================================ * 1 function prototype - * 1 ============================================================ */ + * 1 ============================================================ + ***************************************************************/ -void -phydm_update_power_training_state( - void *dm_void -); +void phydm_update_power_training_state( + void *dm_void); -void -phydm_pow_train_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); +void phydm_pow_train_debug( + void *dm_void, + char input[][16], + u32 *_used, + char *output, + u32 *_out_len); #endif #endif diff --git a/hal/phydm/phydm_pre_define.h b/hal/phydm/phydm_pre_define.h index 91dc0c1..3568a6b 100644 --- a/hal/phydm/phydm_pre_define.h +++ b/hal/phydm/phydm_pre_define.h @@ -23,27 +23,28 @@ * *****************************************************************************/ +#ifndef __PHYDMPREDEFINE_H__ +#define __PHYDMPREDEFINE_H__ -#ifndef __PHYDMPREDEFINE_H__ -#define __PHYDMPREDEFINE_H__ - -/* 1 ============================================================ +/**************************************************************** + * 1 ============================================================ * 1 Definition - * 1 ============================================================ */ + * 1 ============================================================ + ***************************************************************/ -#define PHYDM_CODE_BASE "PHYDM_V024" -#define PHYDM_RELEASE_DATE "20171213" +#define PHYDM_CODE_BASE "PHYDM_V35" +#define PHYDM_RELEASE_DATE "20181109.0" /*PHYDM API status*/ -#define PHYDM_SET_FAIL 0 -#define PHYDM_SET_SUCCESS 1 -#define PHYDM_SET_NO_NEED 3 +#define PHYDM_SET_FAIL 0 +#define PHYDM_SET_SUCCESS 1 +#define PHYDM_SET_NO_NEED 3 /*PHYDM Set/Revert*/ -#define PHYDM_SET 1 +#define PHYDM_SET 1 #define PHYDM_REVERT 2 -/* Max path of IC */ +/* @Max path of IC */ /*N-IC*/ #define MAX_PATH_NUM_8188E 1 #define MAX_PATH_NUM_8188F 1 @@ -55,7 +56,9 @@ #define MAX_PATH_NUM_8192F 2 #define MAX_PATH_NUM_8197F 2 #define MAX_PATH_NUM_8198F 4 -/*AC-IC*/ +#define MAX_PATH_NUM_8197G 2 +#define MAX_PATH_NUM_8721D 1 +/*@AC-IC*/ #define MAX_PATH_NUM_8821A 1 #define MAX_PATH_NUM_8881A 1 #define MAX_PATH_NUM_8821C 1 @@ -66,27 +69,45 @@ #define MAX_PATH_NUM_8814A 4 #define MAX_PATH_NUM_8814B 4 #define MAX_PATH_NUM_8814C 4 +#define MAX_PATH_NUM_8195B 1 +#define MAX_PATH_NUM_8812F 2 -/* Max RF path */ -#define PHYDM_MAX_RF_PATH_N 2 /*For old N-series IC*/ -#define PHYDM_MAX_RF_PATH 4 +/* @Max RF path */ +#define PHYDM_MAX_RF_PATH_N 2 /*@For old N-series IC*/ +#define PHYDM_MAX_RF_PATH 4 /* number of entry */ #if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) #ifdef DM_ODM_CE_MAC80211 - /* defined in wifi.h (32+1) */ + /* @defined in wifi.h (32+1) */ #else - #define ASSOCIATE_ENTRY_NUM MACID_NUM_SW_LIMIT /* Max size of asoc_entry[].*/ + #define ASSOCIATE_ENTRY_NUM MACID_NUM_SW_LIMIT /* @Max size of asoc_entry[].*/ #endif - #define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM + #define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM #elif(DM_ODM_SUPPORT_TYPE & (ODM_AP)) - #define ASSOCIATE_ENTRY_NUM NUM_STAT - #define ODM_ASSOCIATE_ENTRY_NUM (ASSOCIATE_ENTRY_NUM+1) + #define ASSOCIATE_ENTRY_NUM NUM_STAT + #define ODM_ASSOCIATE_ENTRY_NUM (ASSOCIATE_ENTRY_NUM + 1) +#elif(DM_ODM_SUPPORT_TYPE & (ODM_IOT)) + #ifdef CONFIG_CONCURRENT_MODE + #define ASSOCIATE_ENTRY_NUM NUM_STA + 2 /*@2 is for station mod*/ + #else + #define ASSOCIATE_ENTRY_NUM NUM_STA /*@8 is for max size of asoc_entry[].*/ + #endif + #define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM #else - #define ODM_ASSOCIATE_ENTRY_NUM ((ASSOCIATE_ENTRY_NUM*3)+1) + #define ODM_ASSOCIATE_ENTRY_NUM (((ASSOCIATE_ENTRY_NUM + 1) * 3) + 1) #endif -/* -----MGN rate--------------------------------- */ +/* @-----MGN rate--------------------------------- */ + +enum PDM_RATE_TYPE { + PDM_1SS = 1, /*VHT/HT 1SS*/ + PDM_2SS = 2, /*VHT/HT 2SS*/ + PDM_3SS = 3, /*VHT/HT 3SS*/ + PDM_4SS = 4, /*VHT/HT 4SS*/ + PDM_CCK = 11, /*@B*/ + PDM_OFDM = 12 /*@G*/ +}; enum ODM_MGN_RATE { ODM_MGN_1M = 0x02, @@ -101,7 +122,7 @@ enum ODM_MGN_RATE { ODM_MGN_36M = 0x48, ODM_MGN_48M = 0x60, ODM_MGN_54M = 0x6C, - ODM_MGN_MCS32 = 0x7F, + ODM_MGN_MCS32 = 0x7F, ODM_MGN_MCS0 = 0x80, ODM_MGN_MCS1, ODM_MGN_MCS2, @@ -118,7 +139,7 @@ enum ODM_MGN_RATE { ODM_MGN_MCS13, ODM_MGN_MCS14, ODM_MGN_MCS15, - ODM_MGN_MCS16 = 0x90, + ODM_MGN_MCS16 = 0x90, ODM_MGN_MCS17, ODM_MGN_MCS18, ODM_MGN_MCS19, @@ -126,7 +147,7 @@ enum ODM_MGN_RATE { ODM_MGN_MCS21, ODM_MGN_MCS22, ODM_MGN_MCS23, - ODM_MGN_MCS24 = 0x98, + ODM_MGN_MCS24 = 0x98, ODM_MGN_MCS25, ODM_MGN_MCS26, ODM_MGN_MCS27, @@ -187,66 +208,65 @@ enum ODM_MGN_RATE { #define ODM_MGN_MCS7_SG 0xc7 #define ODM_MGN_MCS8_SG 0xc8 #define ODM_MGN_MCS9_SG 0xc9 -#define ODM_MGN_MCS10_SG 0xca -#define ODM_MGN_MCS11_SG 0xcb -#define ODM_MGN_MCS12_SG 0xcc -#define ODM_MGN_MCS13_SG 0xcd -#define ODM_MGN_MCS14_SG 0xce -#define ODM_MGN_MCS15_SG 0xcf +#define ODM_MGN_MCS10_SG 0xca +#define ODM_MGN_MCS11_SG 0xcb +#define ODM_MGN_MCS12_SG 0xcc +#define ODM_MGN_MCS13_SG 0xcd +#define ODM_MGN_MCS14_SG 0xce +#define ODM_MGN_MCS15_SG 0xcf -/* -----DESC rate--------------------------------- */ - -#define ODM_RATEMCS15_SG 0x1c -#define ODM_RATEMCS32 0x20 +/* @-----DESC rate--------------------------------- */ +#define ODM_RATEMCS15_SG 0x1c +#define ODM_RATEMCS32 0x20 enum phydm_ctrl_info_rate { - ODM_RATE1M = 0x00, - ODM_RATE2M = 0x01, - ODM_RATE5_5M = 0x02, - ODM_RATE11M = 0x03, + ODM_RATE1M = 0x00, + ODM_RATE2M = 0x01, + ODM_RATE5_5M = 0x02, + ODM_RATE11M = 0x03, /* OFDM Rates, TxHT = 0 */ - ODM_RATE6M = 0x04, - ODM_RATE9M = 0x05, - ODM_RATE12M = 0x06, - ODM_RATE18M = 0x07, - ODM_RATE24M = 0x08, - ODM_RATE36M = 0x09, - ODM_RATE48M = 0x0A, - ODM_RATE54M = 0x0B, -/* MCS Rates, TxHT = 1 */ - ODM_RATEMCS0 = 0x0C, - ODM_RATEMCS1 = 0x0D, - ODM_RATEMCS2 = 0x0E, - ODM_RATEMCS3 = 0x0F, - ODM_RATEMCS4 = 0x10, - ODM_RATEMCS5 = 0x11, - ODM_RATEMCS6 = 0x12, - ODM_RATEMCS7 = 0x13, - ODM_RATEMCS8 = 0x14, - ODM_RATEMCS9 = 0x15, - ODM_RATEMCS10 = 0x16, - ODM_RATEMCS11 = 0x17, - ODM_RATEMCS12 = 0x18, - ODM_RATEMCS13 = 0x19, - ODM_RATEMCS14 = 0x1A, - ODM_RATEMCS15 = 0x1B, - ODM_RATEMCS16 = 0x1C, - ODM_RATEMCS17 = 0x1D, - ODM_RATEMCS18 = 0x1E, - ODM_RATEMCS19 = 0x1F, - ODM_RATEMCS20 = 0x20, - ODM_RATEMCS21 = 0x21, - ODM_RATEMCS22 = 0x22, - ODM_RATEMCS23 = 0x23, - ODM_RATEMCS24 = 0x24, - ODM_RATEMCS25 = 0x25, - ODM_RATEMCS26 = 0x26, - ODM_RATEMCS27 = 0x27, - ODM_RATEMCS28 = 0x28, - ODM_RATEMCS29 = 0x29, - ODM_RATEMCS30 = 0x2A, - ODM_RATEMCS31 = 0x2B, + ODM_RATE6M = 0x04, + ODM_RATE9M = 0x05, + ODM_RATE12M = 0x06, + ODM_RATE18M = 0x07, + ODM_RATE24M = 0x08, + ODM_RATE36M = 0x09, + ODM_RATE48M = 0x0A, + ODM_RATE54M = 0x0B, +/* @MCS Rates, TxHT = 1 */ + ODM_RATEMCS0 = 0x0C, + ODM_RATEMCS1 = 0x0D, + ODM_RATEMCS2 = 0x0E, + ODM_RATEMCS3 = 0x0F, + ODM_RATEMCS4 = 0x10, + ODM_RATEMCS5 = 0x11, + ODM_RATEMCS6 = 0x12, + ODM_RATEMCS7 = 0x13, + ODM_RATEMCS8 = 0x14, + ODM_RATEMCS9 = 0x15, + ODM_RATEMCS10 = 0x16, + ODM_RATEMCS11 = 0x17, + ODM_RATEMCS12 = 0x18, + ODM_RATEMCS13 = 0x19, + ODM_RATEMCS14 = 0x1A, + ODM_RATEMCS15 = 0x1B, + ODM_RATEMCS16 = 0x1C, + ODM_RATEMCS17 = 0x1D, + ODM_RATEMCS18 = 0x1E, + ODM_RATEMCS19 = 0x1F, + ODM_RATEMCS20 = 0x20, + ODM_RATEMCS21 = 0x21, + ODM_RATEMCS22 = 0x22, + ODM_RATEMCS23 = 0x23, + ODM_RATEMCS24 = 0x24, + ODM_RATEMCS25 = 0x25, + ODM_RATEMCS26 = 0x26, + ODM_RATEMCS27 = 0x27, + ODM_RATEMCS28 = 0x28, + ODM_RATEMCS29 = 0x29, + ODM_RATEMCS30 = 0x2A, + ODM_RATEMCS31 = 0x2B, ODM_RATEVHTSS1MCS0 = 0x2C, ODM_RATEVHTSS1MCS1 = 0x2D, ODM_RATEVHTSS1MCS2 = 0x2E, @@ -289,32 +309,55 @@ enum phydm_ctrl_info_rate { ODM_RATEVHTSS4MCS9 = 0x53, }; -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS4MCS9+1) +#define NUM_RATE_AC_4SS (ODM_RATEVHTSS4MCS9 + 1) +#define NUM_RATE_AC_3SS (ODM_RATEVHTSS3MCS9 + 1) +#define NUM_RATE_AC_2SS (ODM_RATEVHTSS2MCS9 + 1) +#define NUM_RATE_AC_1SS (ODM_RATEVHTSS1MCS9 + 1) +#define NUM_RATE_N_4SS (ODM_RATEMCS31 + 1) +#define NUM_RATE_N_3SS (ODM_RATEMCS23 + 1) +#define NUM_RATE_N_2SS (ODM_RATEMCS15 + 1) +#define NUM_RATE_N_1SS (ODM_RATEMCS7 + 1) + +/*Define from larger rate size to small rate size, DO NOT change the position*/ +/*[AC-4SS]*/ +#if (RTL8814B_SUPPORT) + #define PHY_NUM_RATE_IDX NUM_RATE_AC_4SS +/*[AC-3SS]*/ +#elif (RTL8814A_SUPPORT) + #define PHY_NUM_RATE_IDX NUM_RATE_AC_3SS +/*[AC-2SS]*/ +#elif (RTL8812A_SUPPORT || RTL8822B_SUPPORT || RTL8822C_SUPPORT ||\ + RTL8812F_SUPPORT) + #define PHY_NUM_RATE_IDX NUM_RATE_AC_2SS +/*[AC-1SS]*/ +#elif (RTL8881A_SUPPORT || RTL8821A_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8195B_SUPPORT) + #define PHY_NUM_RATE_IDX NUM_RATE_AC_1SS +/*[N-4SS]*/ +#elif (RTL8198F_SUPPORT) + #define PHY_NUM_RATE_IDX NUM_RATE_N_4SS +/*[N-2SS]*/ +#elif (RTL8192E_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT ||\ + RTL8197G_SUPPORT) + #define PHY_NUM_RATE_IDX NUM_RATE_N_2SS +/*[N-1SS]*/ +#elif (RTL8723B_SUPPORT || RTL8703B_SUPPORT || RTL8188E_SUPPORT || \ + RTL8188F_SUPPORT || RTL8723D_SUPPORT || RTL8195A_SUPPORT ||\ + RTL8710B_SUPPORT || RTL8721D_SUPPORT) + #define PHY_NUM_RATE_IDX NUM_RATE_N_1SS #else - #if (RTL8192E_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) - #define ODM_NUM_RATE_IDX (ODM_RATEMCS15+1) - #elif (RTL8723B_SUPPORT == 1) || (RTL8188E_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) - #define ODM_NUM_RATE_IDX (ODM_RATEMCS7+1) - #elif (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) - #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS1MCS9+1) - #elif (RTL8812A_SUPPORT == 1) - #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS2MCS9+1) - #elif (RTL8814A_SUPPORT == 1) - #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS3MCS9+1) - #else - #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS4MCS9+1) - #endif + #define PHY_NUM_RATE_IDX NUM_RATE_AC_4SS #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #define CONFIG_SFW_SUPPORTED #endif -/* 1 ============================================================ +/**************************************************************** + * 1 ============================================================ * 1 enumeration - * 1 ============================================================ */ - + * 1 ============================================================ + ***************************************************************/ /* ODM_CMNINFO_INTERFACE */ enum odm_interface { @@ -324,8 +367,12 @@ enum odm_interface { ODM_ITRF_ALL = 0x7, }; +enum phydm_api_host { + RUN_IN_FW = 0, + RUN_IN_DRIVER = 1, +}; -/*========[Run time IC flag] ===============================================================================]*/ +/*@========[Run time IC flag] ===================================*/ enum phydm_ic { ODM_RTL8188E = BIT(0), @@ -347,113 +394,172 @@ enum phydm_ic { ODM_RTL8710B = BIT(16), ODM_RTL8192F = BIT(17), ODM_RTL8822C = BIT(18), - ODM_RTL8195B = BIT(19) + ODM_RTL8195B = BIT(19), + ODM_RTL8812F = BIT(20), + ODM_RTL8197G = BIT(21), + ODM_RTL8721D = BIT(22) }; -#define ODM_IC_N_1SS (ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8723B | ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8195A | ODM_RTL8710B) -#define ODM_IC_N_2SS (ODM_RTL8192E | ODM_RTL8197F | ODM_RTL8192F) -#define ODM_IC_N_3SS 0 -#define ODM_IC_N_4SS (ODM_RTL8198F) +#define ODM_IC_N_1SS (ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8723B |\ + ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8195A |\ + ODM_RTL8710B | ODM_RTL8721D) +#define ODM_IC_N_2SS (ODM_RTL8192E | ODM_RTL8197F | ODM_RTL8192F) +#define ODM_IC_N_3SS 0 +#define ODM_IC_N_4SS 0 -#define ODM_IC_AC_1SS (ODM_RTL8881A | ODM_RTL8821 | ODM_RTL8821C | ODM_RTL8195B) -#define ODM_IC_AC_2SS (ODM_RTL8812 | ODM_RTL8822B | ODM_RTL8822C) -#define ODM_IC_AC_3SS 0 -#define ODM_IC_AC_4SS (ODM_RTL8814A | ODM_RTL8814B) +#define ODM_IC_AC_1SS (ODM_RTL8881A | ODM_RTL8821 | ODM_RTL8821C |\ + ODM_RTL8195B) +#define ODM_IC_AC_2SS (ODM_RTL8812 | ODM_RTL8822B) +#define ODM_IC_AC_3SS 0 +#define ODM_IC_AC_4SS (ODM_RTL8814A) -/*====the following macro DO NOT need to update when adding a new IC======= */ -#define ODM_IC_1SS (ODM_IC_N_1SS | ODM_IC_AC_1SS) -#define ODM_IC_2SS (ODM_IC_N_2SS | ODM_IC_AC_2SS) -#define ODM_IC_3SS (ODM_IC_N_3SS | ODM_IC_AC_3SS) -#define ODM_IC_4SS (ODM_IC_N_4SS | ODM_IC_AC_4SS) +#define ODM_IC_JGR3_1SS 0 +#define ODM_IC_JGR3_2SS (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G) +#define ODM_IC_JGR3_3SS 0 +#define ODM_IC_JGR3_4SS (ODM_RTL8198F | ODM_RTL8814B) -#define PHYDM_IC_ABOVE_1SS (ODM_IC_1SS | ODM_IC_2SS | ODM_IC_3SS | ODM_IC_4SS) +/*@====the following macro DO NOT need to update when adding a new IC======= */ +#define ODM_IC_1SS (ODM_IC_N_1SS | ODM_IC_AC_1SS | ODM_IC_JGR3_1SS) +#define ODM_IC_2SS (ODM_IC_N_2SS | ODM_IC_AC_2SS | ODM_IC_JGR3_2SS) +#define ODM_IC_3SS (ODM_IC_N_3SS | ODM_IC_AC_3SS | ODM_IC_JGR3_3SS) +#define ODM_IC_4SS (ODM_IC_N_4SS | ODM_IC_AC_4SS | ODM_IC_JGR3_4SS) + +#define PHYDM_IC_ABOVE_1SS (ODM_IC_1SS | ODM_IC_2SS | ODM_IC_3SS |\ + ODM_IC_4SS) #define PHYDM_IC_ABOVE_2SS (ODM_IC_2SS | ODM_IC_3SS | ODM_IC_4SS) #define PHYDM_IC_ABOVE_3SS (ODM_IC_3SS | ODM_IC_4SS) #define PHYDM_IC_ABOVE_4SS ODM_IC_4SS -#define ODM_IC_11N_SERIES (ODM_IC_N_1SS | ODM_IC_N_2SS | ODM_IC_N_3SS | ODM_IC_N_4SS) -#define ODM_IC_11AC_SERIES (ODM_IC_AC_1SS | ODM_IC_AC_2SS | ODM_IC_AC_3SS | ODM_IC_AC_4SS) -/*====================================================*/ +#define ODM_IC_11N_SERIES (ODM_IC_N_1SS | ODM_IC_N_2SS | ODM_IC_N_3SS |\ + ODM_IC_N_4SS) +#define ODM_IC_11AC_SERIES (ODM_IC_AC_1SS | ODM_IC_AC_2SS |\ + ODM_IC_AC_3SS | ODM_IC_AC_4SS) +#define ODM_IC_JGR3_SERIES (ODM_IC_JGR3_1SS | ODM_IC_JGR3_2SS |\ + ODM_IC_JGR3_3SS | ODM_IC_JGR3_4SS) +/*@====================================================*/ -#define ODM_IC_11AC_1_SERIES (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A) -#define ODM_IC_11AC_2_SERIES (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B) -/*[EDCCA]*/ -#define ODM_IC_11N_GAIN_IDX_EDCCA (ODM_RTL8195A | ODM_RTL8703B | ODM_RTL8188F | ODM_RTL8723D | ODM_RTL8197F | ODM_RTL8710B) -#define ODM_IC_11AC_GAIN_IDX_EDCCA (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C) -#define ODM_IC_GAIN_IDX_EDCCA (ODM_IC_11N_GAIN_IDX_EDCCA | ODM_IC_11AC_GAIN_IDX_EDCCA) -/*[Phy status type]*/ -#define PHYSTS_2ND_TYPE_IC (ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8723D | ODM_RTL8821C | ODM_RTL8710B | ODM_RTL8195B) -#define PHYSTS_3RD_TYPE_IC (ODM_RTL8198F | ODM_RTL8814B) -/*[FW Type]*/ -#define PHYDM_IC_8051_SERIES (ODM_RTL8881A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8703B | ODM_RTL8188F) -#define PHYDM_IC_3081_SERIES (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8198F) -/*[LA mode]*/ -#define PHYDM_IC_SUPPORT_LA_MODE (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8198F) -/*[BF]*/ -#define ODM_IC_TXBF_SUPPORT (ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8881A | ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8198F) -#define PHYDM_IC_SUPPORT_MU_BFEE (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8814B | ODM_RTL8195B | ODM_RTL8198F) -#define PHYDM_IC_SUPPORT_MU_BFER (ODM_RTL8822B | ODM_RTL8814B | ODM_RTL8198F) +#define ODM_IC_11AC_1_SERIES (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A) +#define ODM_IC_11AC_2_SERIES (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C |\ + ODM_RTL8195B) +/*@[Phy status type]*/ +#define PHYSTS_2ND_TYPE_IC (ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8723D |\ + ODM_RTL8821C | ODM_RTL8710B | ODM_RTL8195B |\ + ODM_RTL8192F | ODM_RTL8721D) +#define PHYSTS_3RD_TYPE_IC (ODM_RTL8198F | ODM_RTL8814B | ODM_RTL8822C |\ + ODM_RTL8812F | ODM_RTL8197G) +/*@[FW Type]*/ +#define PHYDM_IC_8051_SERIES (ODM_RTL8881A | ODM_RTL8812 | ODM_RTL8821 |\ + ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8703B |\ + ODM_RTL8188F | ODM_RTL8192F | ODM_RTL8721D) +#define PHYDM_IC_3081_SERIES (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8197F |\ + ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8198F |\ + ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8814B |\ + ODM_RTL8197G) +/*@[LA mode]*/ +#define PHYDM_IC_SUPPORT_LA_MODE (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8197F |\ + ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8198F |\ + ODM_RTL8192F | ODM_RTL8822C | ODM_RTL8812F |\ + ODM_RTL8195B | ODM_RTL8814B | ODM_RTL8197G) +/*@[BF]*/ +#define ODM_IC_TXBF_SUPPORT (ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 |\ + ODM_RTL8814A | ODM_RTL8881A | ODM_RTL8822B |\ + ODM_RTL8197F | ODM_RTL8821C | ODM_RTL8195B |\ + ODM_RTL8198F | ODM_RTL8822C | ODM_RTL8812F |\ + ODM_RTL8814B | ODM_RTL8197G) +#define PHYDM_IC_SUPPORT_MU_BFEE (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8814B |\ + ODM_RTL8195B | ODM_RTL8198F | ODM_RTL8822C |\ + ODM_RTL8812F) +#define PHYDM_IC_SUPPORT_MU_BFER (ODM_RTL8822B | ODM_RTL8814B | ODM_RTL8198F |\ + ODM_RTL8822C | ODM_RTL8812F) + +#define PHYDM_IC_SUPPORT_MU (PHYDM_IC_SUPPORT_MU_BFEE |\ + PHYDM_IC_SUPPORT_MU_BFER) +/*@[PHYDM API]*/ +#define CMN_API_SUPPORT_IC (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F |\ + ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8822C |\ + ODM_RTL8198F | ODM_RTL8812F | ODM_RTL8814B |\ + ODM_RTL8197G | ODM_RTL8721D) + +/*@========[Compile time IC flag] ========================*/ +/*@========[AC-3/AC/N Support] ===========================*/ + +#if (RTL8814B_SUPPORT || RTL8198F_SUPPORT || RTL8822C_SUPPORT ||\ + RTL8812F_SUPPORT || RTL8197G_SUPPORT) + #define PHYDM_IC_JGR3_SERIES_SUPPORT + #if (RTL8814B_SUPPORT || RTL8822C_SUPPORT || RTL8812F_SUPPORT) + #define PHYDM_IC_JGR3_80M_SUPPORT + #endif +#endif -/*========[Compile time IC flag] ===============================================================================]*/ -/*========[AC/N Support] ===========================*/ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #ifdef RTK_AC_SUPPORT - #define ODM_IC_11AC_SERIES_SUPPORT 1 + #define ODM_IC_11AC_SERIES_SUPPORT 1 #else - #define ODM_IC_11AC_SERIES_SUPPORT 0 + #define ODM_IC_11AC_SERIES_SUPPORT 0 #endif - #define ODM_IC_11N_SERIES_SUPPORT 1 + #define ODM_IC_11N_SERIES_SUPPORT 1 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) - #define ODM_IC_11AC_SERIES_SUPPORT 1 - #define ODM_IC_11N_SERIES_SUPPORT 1 + #define ODM_IC_11AC_SERIES_SUPPORT 1 + #define ODM_IC_11N_SERIES_SUPPORT 1 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) + #define ODM_IC_11AC_SERIES_SUPPORT 1 + #define ODM_IC_11N_SERIES_SUPPORT 1 + +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) + #define ODM_IC_11AC_SERIES_SUPPORT 1 #define ODM_IC_11N_SERIES_SUPPORT 1 #else /*ODM_CE*/ - #if ((RTL8188E_SUPPORT == 1) || \ - (RTL8723B_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8195A_SUPPORT == 1) || (RTL8703B_SUPPORT == 1) || \ - (RTL8188F_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8710B_SUPPORT == 1)) - #define ODM_IC_11N_SERIES_SUPPORT 1 - #define ODM_IC_11AC_SERIES_SUPPORT 0 + #if (RTL8188E_SUPPORT || RTL8723B_SUPPORT || RTL8192E_SUPPORT ||\ + RTL8195A_SUPPORT || RTL8703B_SUPPORT || RTL8188F_SUPPORT ||\ + RTL8723D_SUPPORT || RTL8197F_SUPPORT || RTL8710B_SUPPORT ||\ + RTL8192F_SUPPORT || RTL8721D_SUPPORT) + #define ODM_IC_11N_SERIES_SUPPORT 1 + #define ODM_IC_11AC_SERIES_SUPPORT 0 #else - #define ODM_IC_11N_SERIES_SUPPORT 0 - #define ODM_IC_11AC_SERIES_SUPPORT 1 + #define ODM_IC_11N_SERIES_SUPPORT 0 + #define ODM_IC_11AC_SERIES_SUPPORT 1 #endif #endif -/*===IC SS Compile Flag, prepare for code size reduction==============*/ -#if ((RTL8188E_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) || (RTL8723B_SUPPORT == 1) || (RTL8703B_SUPPORT == 1) ||\ - (RTL8723D_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) ||\ - (RTL8195A_SUPPORT == 1) || (RTL8710B_SUPPORT == 1) || (RTL8195B_SUPPORT == 1)) - +/*@===IC SS Compile Flag, prepare for code size reduction==============*/ +#if (RTL8188E_SUPPORT || RTL8188F_SUPPORT || RTL8723B_SUPPORT ||\ + RTL8703B_SUPPORT || RTL8723D_SUPPORT || RTL8881A_SUPPORT ||\ + RTL8821A_SUPPORT || RTL8821C_SUPPORT || RTL8195A_SUPPORT ||\ + RTL8710B_SUPPORT || RTL8195B_SUPPORT || RTL8721D_SUPPORT) + #define PHYDM_COMPILE_IC_1SS #endif -#if ((RTL8192E_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) +#if (RTL8192E_SUPPORT || RTL8197F_SUPPORT || RTL8812A_SUPPORT ||\ + RTL8822B_SUPPORT || RTL8192F_SUPPORT || RTL8822C_SUPPORT ||\ + RTL8812F_SUPPORT || RTL8197G_SUPPORT) #define PHYDM_COMPILE_IC_2SS #endif -/*#define PHYDM_COMPILE_IC_3SS*/ +/*@#define PHYDM_COMPILE_IC_3SS*/ -#if ((RTL8814B_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8198F_SUPPORT == 1)) +#if ((RTL8814B_SUPPORT) || (RTL8814A_SUPPORT) || (RTL8198F_SUPPORT)) #define PHYDM_COMPILE_IC_4SS #endif -/*==[ABOVE N-SS COMPILE FLAG]=============================*/ -#if (defined(PHYDM_COMPILE_IC_1SS) || defined(PHYDM_COMPILE_IC_2SS) || defined(PHYDM_COMPILE_IC_3SS) || defined(PHYDM_COMPILE_IC_4SS)) +/*@==[ABOVE N-SS COMPILE FLAG]=================================================*/ +#if (defined(PHYDM_COMPILE_IC_1SS) || defined(PHYDM_COMPILE_IC_2SS) ||\ + defined(PHYDM_COMPILE_IC_3SS) || defined(PHYDM_COMPILE_IC_4SS)) #define PHYDM_COMPILE_ABOVE_1SS #endif -#if (defined(PHYDM_COMPILE_IC_2SS) || defined(PHYDM_COMPILE_IC_3SS) || defined(PHYDM_COMPILE_IC_4SS)) +#if (defined(PHYDM_COMPILE_IC_2SS) || defined(PHYDM_COMPILE_IC_3SS) ||\ + defined(PHYDM_COMPILE_IC_4SS)) #define PHYDM_COMPILE_ABOVE_2SS #endif @@ -465,102 +571,159 @@ enum phydm_ic { #define PHYDM_COMPILE_ABOVE_4SS #endif -/*========[New Phy-Status Support] =========================================================================]*/ -#if (RTL8824B_SUPPORT == 1) - #define CONFIG_PHYSTS_3RD_TYPE 1 +/*@==[Max RF path number among all compiled ICs]==============================*/ +/*@ ex: support 8814B & 8821C => size=4 */ +/*@ ex: support 8822C & 8821C => size=2 */ +#if (defined(PHYDM_COMPILE_IC_4SS)) + #define RF_PATH_MEM_SIZE 4 +#elif (defined(PHYDM_COMPILE_IC_3SS)) + #define RF_PATH_MEM_SIZE 3 +#elif (defined(PHYDM_COMPILE_IC_2SS)) + #define RF_PATH_MEM_SIZE 2 #else - #define CONFIG_PHYSTS_3RD_TYPE 0 + #define RF_PATH_MEM_SIZE 1 #endif - -#if ((RTL8197F_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8710B_SUPPORT == 1) ) + +/*@========[New Phy-Status Support] ========================*/ +#if (RTL8197F_SUPPORT || RTL8723D_SUPPORT || RTL8822B_SUPPORT ||\ + RTL8821C_SUPPORT || RTL8710B_SUPPORT || RTL8195B_SUPPORT ||\ + RTL8192F_SUPPORT || RTL8721D_SUPPORT) #define ODM_PHY_STATUS_NEW_TYPE_SUPPORT 1 #else #define ODM_PHY_STATUS_NEW_TYPE_SUPPORT 0 #endif -/*==================================================================================================]*/ +#if (RTL8198F_SUPPORT) || (RTL8814B_SUPPORT) || (RTL8822C_SUPPORT) ||\ + (RTL8812F_SUPPORT) || (RTL8197G_SUPPORT) + #define PHYSTS_3RD_TYPE_SUPPORT +#endif -#if ((RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8821C_SUPPORT == 1)) +#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8822C_SUPPORT ||\ + RTL8812F_SUPPORT || RTL8197G_SUPPORT) + #define BB_RAM_SUPPORT +#endif + +#if (RTL8821C_SUPPORT || RTL8822B_SUPPORT || RTL8822C_SUPPORT ||\ + RTL8812F_SUPPORT || RTL8814B_SUPPORT || RTL8195B_SUPPORT ||\ + RTL8198F_SUPPORT) + #define PHYDM_COMPILE_MU +#endif + +#if (RTL8822B_SUPPORT) + #define CONFIG_MU_JAGUAR_2 +#endif + +#if (RTL8814B_SUPPORT || RTL8822C_SUPPORT) + #define CONFIG_MU_JAGUAR_3 +#endif + +#if (defined(CONFIG_MU_JAGUAR_2) || defined(CONFIG_MU_JAGUAR_3)) +#if (RTL8814B_SUPPORT) + #define MU_EX_MACID 76 + #elif (RTL8822B_SUPPORT || RTL8822C_SUPPORT) + #define MU_EX_MACID 30 + #endif +#endif +/*@============================================================================*/ + +#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8821C_SUPPORT ||\ + RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8822C_SUPPORT ||\ + RTL8198F_SUPPORT || RTL8812F_SUPPORT || RTL8814B_SUPPORT ||\ + RTL8197G_SUPPORT || RTL8721D_SUPPORT) #define PHYDM_COMMON_API_SUPPORT #endif #define CCK_RATE_NUM 4 -#define OFDM_RATE_NUM 8 +#define OFDM_RATE_NUM 8 -#define LEGACY_RATE_NUM 12 +#define LEGACY_RATE_NUM 12 #define HT_RATE_NUM_4SS 32 -#define VHT_RATE_NUM_4SS 40 +#define VHT_RATE_NUM_4SS 40 #define HT_RATE_NUM_3SS 24 -#define VHT_RATE_NUM_3SS 30 +#define VHT_RATE_NUM_3SS 30 #define HT_RATE_NUM_2SS 16 -#define VHT_RATE_NUM_2SS 20 +#define VHT_RATE_NUM_2SS 20 #define HT_RATE_NUM_1SS 8 -#define VHT_RATE_NUM_1SS 10 - +#define VHT_RATE_NUM_1SS 10 #if (defined(PHYDM_COMPILE_ABOVE_4SS)) - #define HT_RATE_NUM HT_RATE_NUM_4SS - #define VHT_RATE_NUM VHT_RATE_NUM_4SS + #define HT_RATE_NUM HT_RATE_NUM_4SS + #define VHT_RATE_NUM VHT_RATE_NUM_4SS #elif (defined(PHYDM_COMPILE_ABOVE_3SS)) - #define HT_RATE_NUM HT_RATE_NUM_3SS - #define VHT_RATE_NUM VHT_RATE_NUM_3SS + #define HT_RATE_NUM HT_RATE_NUM_3SS + #define VHT_RATE_NUM VHT_RATE_NUM_3SS #elif (defined(PHYDM_COMPILE_ABOVE_2SS)) - #define HT_RATE_NUM HT_RATE_NUM_2SS - #define VHT_RATE_NUM VHT_RATE_NUM_2SS + #define HT_RATE_NUM HT_RATE_NUM_2SS + #define VHT_RATE_NUM VHT_RATE_NUM_2SS #else - #define HT_RATE_NUM HT_RATE_NUM_1SS - #define VHT_RATE_NUM VHT_RATE_NUM_1SS + #define HT_RATE_NUM HT_RATE_NUM_1SS + #define VHT_RATE_NUM VHT_RATE_NUM_1SS #endif -#define LOW_BW_RATE_NUM VHT_RATE_NUM +#define LOW_BW_RATE_NUM VHT_RATE_NUM +enum phydm_ic_ip { + PHYDM_IC_N = 0, + PHYDM_IC_AC = 1, + PHYDM_IC_JGR3 = 2 +}; + +enum phydm_phy_sts_type { + PHYDM_PHYSTS_TYPE_1 = 1, + PHYDM_PHYSTS_TYPE_2 = 2, + PHYDM_PHYSTS_TYPE_3 = 3 +}; /* ODM_CMNINFO_CUT_VER */ enum odm_cut_version { - ODM_CUT_A = 0, - ODM_CUT_B = 1, - ODM_CUT_C = 2, - ODM_CUT_D = 3, - ODM_CUT_E = 4, - ODM_CUT_F = 5, - ODM_CUT_G = 6, - ODM_CUT_H = 7, - ODM_CUT_I = 8, - ODM_CUT_J = 9, - ODM_CUT_K = 10, - ODM_CUT_TEST = 15, + ODM_CUT_A = 0, + ODM_CUT_B = 1, + ODM_CUT_C = 2, + ODM_CUT_D = 3, + ODM_CUT_E = 4, + ODM_CUT_F = 5, + ODM_CUT_G = 6, + ODM_CUT_H = 7, + ODM_CUT_I = 8, + ODM_CUT_J = 9, + ODM_CUT_K = 10, + ODM_CUT_L = 11, + ODM_CUT_M = 12, + ODM_CUT_N = 13, + ODM_CUT_O = 14, + ODM_CUT_TEST = 15, }; /* ODM_CMNINFO_FAB_VER */ enum odm_fab { - ODM_TSMC = 0, - ODM_UMC = 1, + ODM_TSMC = 0, + ODM_UMC = 1, }; /* ODM_CMNINFO_OP_MODE */ enum odm_operation_mode { ODM_NO_LINK = BIT(0), - ODM_LINK = BIT(1), - ODM_SCAN = BIT(2), - ODM_POWERSAVE = BIT(3), + ODM_LINK = BIT(1), + ODM_SCAN = BIT(2), + ODM_POWERSAVE = BIT(3), ODM_AP_MODE = BIT(4), - ODM_CLIENT_MODE = BIT(5), + ODM_CLIENT_MODE = BIT(5), ODM_AD_HOC = BIT(6), - ODM_WIFI_DIRECT = BIT(7), + ODM_WIFI_DIRECT = BIT(7), ODM_WIFI_DISPLAY = BIT(8), }; /* ODM_CMNINFO_WM_MODE */ #if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) enum odm_wireless_mode { - ODM_WM_UNKNOW = 0x0, - ODM_WM_B = BIT(0), - ODM_WM_G = BIT(1), - ODM_WM_A = BIT(2), + ODM_WM_UNKNOW = 0x0, + ODM_WM_B = BIT(0), + ODM_WM_G = BIT(1), + ODM_WM_A = BIT(2), ODM_WM_N24G = BIT(3), ODM_WM_N5G = BIT(4), ODM_WM_AUTO = BIT(5), @@ -568,17 +731,17 @@ enum odm_wireless_mode { }; #else enum odm_wireless_mode { - ODM_WM_UNKNOWN = 0x00,/*0x0*/ - ODM_WM_A = BIT(0), /* 0x1*/ - ODM_WM_B = BIT(1), /* 0x2*/ - ODM_WM_G = BIT(2),/* 0x4*/ - ODM_WM_AUTO = BIT(3),/* 0x8*/ - ODM_WM_N24G = BIT(4),/* 0x10*/ - ODM_WM_N5G = BIT(5),/* 0x20*/ - ODM_WM_AC_5G = BIT(6),/* 0x40*/ - ODM_WM_AC_24G = BIT(7),/* 0x80*/ - ODM_WM_AC_ONLY = BIT(8),/* 0x100*/ - ODM_WM_MAX = BIT(11)/* 0x800*/ + ODM_WM_UNKNOWN = 0x00,/*@0x0*/ + ODM_WM_A = BIT(0), /* @0x1*/ + ODM_WM_B = BIT(1), /* @0x2*/ + ODM_WM_G = BIT(2),/* @0x4*/ + ODM_WM_AUTO = BIT(3),/* @0x8*/ + ODM_WM_N24G = BIT(4),/* @0x10*/ + ODM_WM_N5G = BIT(5),/* @0x20*/ + ODM_WM_AC_5G = BIT(6),/* @0x40*/ + ODM_WM_AC_24G = BIT(7),/* @0x80*/ + ODM_WM_AC_ONLY = BIT(8),/* @0x100*/ + ODM_WM_MAX = BIT(11)/* @0x800*/ }; #endif @@ -586,162 +749,160 @@ enum odm_wireless_mode { /* ODM_CMNINFO_BAND */ enum odm_band_type { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - ODM_BAND_2_4G = BIT(0), + ODM_BAND_2_4G = BIT(0), ODM_BAND_5G = BIT(1), #else - ODM_BAND_2_4G = 0, + ODM_BAND_2_4G = 0, ODM_BAND_5G, ODM_BAND_ON_BOTH, ODM_BANDMAX #endif }; - /* ODM_CMNINFO_SEC_CHNL_OFFSET */ enum phydm_sec_chnl_offset { - PHYDM_DONT_CARE = 0, + PHYDM_DONT_CARE = 0, PHYDM_BELOW = 1, PHYDM_ABOVE = 2 }; /* ODM_CMNINFO_SEC_MODE */ enum odm_security { - ODM_SEC_OPEN = 0, + ODM_SEC_OPEN = 0, ODM_SEC_WEP40 = 1, - ODM_SEC_TKIP = 2, + ODM_SEC_TKIP = 2, ODM_SEC_RESERVE = 3, ODM_SEC_AESCCMP = 4, ODM_SEC_WEP104 = 5, - ODM_WEP_WPA_MIXED = 6, /* WEP + WPA */ - ODM_SEC_SMS4 = 7, + ODM_WEP_WPA_MIXED = 6, /* WEP + WPA */ + ODM_SEC_SMS4 = 7, }; /* ODM_CMNINFO_CHNL */ /* ODM_CMNINFO_BOARD_TYPE */ enum odm_board_type { - ODM_BOARD_DEFAULT = 0, /* The DEFAULT case. */ - ODM_BOARD_MINICARD = BIT(0), /* 0 = non-mini card, 1= mini card. */ - ODM_BOARD_SLIM = BIT(1), /* 0 = non-slim card, 1 = slim card */ - ODM_BOARD_BT = BIT(2), /* 0 = without BT card, 1 = with BT */ - ODM_BOARD_EXT_PA = BIT(3), /* 0 = no 2G ext-PA, 1 = existing 2G ext-PA */ - ODM_BOARD_EXT_LNA = BIT(4), /* 0 = no 2G ext-LNA, 1 = existing 2G ext-LNA */ - ODM_BOARD_EXT_TRSW = BIT(5), /* 0 = no ext-TRSW, 1 = existing ext-TRSW */ - ODM_BOARD_EXT_PA_5G = BIT(6), /* 0 = no 5G ext-PA, 1 = existing 5G ext-PA */ - ODM_BOARD_EXT_LNA_5G = BIT(7), /* 0 = no 5G ext-LNA, 1 = existing 5G ext-LNA */ + ODM_BOARD_DEFAULT = 0, /* The DEFAULT case. */ + ODM_BOARD_MINICARD = BIT(0), /* @0 = non-mini card, 1= mini card. */ + ODM_BOARD_SLIM = BIT(1), /* @0 = non-slim card, 1 = slim card */ + ODM_BOARD_BT = BIT(2), /* @0 = without BT card, 1 = with BT */ + ODM_BOARD_EXT_PA = BIT(3), /* @0 = no 2G ext-PA, 1 = existing 2G ext-PA */ + ODM_BOARD_EXT_LNA = BIT(4), /* @0 = no 2G ext-LNA, 1 = existing 2G ext-LNA */ + ODM_BOARD_EXT_TRSW = BIT(5), /* @0 = no ext-TRSW, 1 = existing ext-TRSW */ + ODM_BOARD_EXT_PA_5G = BIT(6), /* @0 = no 5G ext-PA, 1 = existing 5G ext-PA */ + ODM_BOARD_EXT_LNA_5G = BIT(7), /* @0 = no 5G ext-LNA, 1 = existing 5G ext-LNA */ }; enum odm_package_type { - ODM_PACKAGE_DEFAULT = 0, - ODM_PACKAGE_QFN68 = BIT(0), - ODM_PACKAGE_TFBGA90 = BIT(1), - ODM_PACKAGE_TFBGA79 = BIT(2), + ODM_PACKAGE_DEFAULT = 0, + ODM_PACKAGE_QFN68 = BIT(0), + ODM_PACKAGE_TFBGA90 = BIT(1), + ODM_PACKAGE_TFBGA79 = BIT(2), }; enum odm_type_gpa { - TYPE_GPA0 = 0x0000, - TYPE_GPA1 = 0x0055, - TYPE_GPA2 = 0x00AA, - TYPE_GPA3 = 0x00FF, - TYPE_GPA4 = 0x5500, - TYPE_GPA5 = 0x5555, - TYPE_GPA6 = 0x55AA, - TYPE_GPA7 = 0x55FF, - TYPE_GPA8 = 0xAA00, - TYPE_GPA9 = 0xAA55, - TYPE_GPA10 = 0xAAAA, - TYPE_GPA11 = 0xAAFF, - TYPE_GPA12 = 0xFF00, - TYPE_GPA13 = 0xFF55, - TYPE_GPA14 = 0xFFAA, - TYPE_GPA15 = 0xFFFF, + TYPE_GPA0 = 0x0000, + TYPE_GPA1 = 0x0055, + TYPE_GPA2 = 0x00AA, + TYPE_GPA3 = 0x00FF, + TYPE_GPA4 = 0x5500, + TYPE_GPA5 = 0x5555, + TYPE_GPA6 = 0x55AA, + TYPE_GPA7 = 0x55FF, + TYPE_GPA8 = 0xAA00, + TYPE_GPA9 = 0xAA55, + TYPE_GPA10 = 0xAAAA, + TYPE_GPA11 = 0xAAFF, + TYPE_GPA12 = 0xFF00, + TYPE_GPA13 = 0xFF55, + TYPE_GPA14 = 0xFFAA, + TYPE_GPA15 = 0xFFFF, }; enum odm_type_apa { - TYPE_APA0 = 0x0000, - TYPE_APA1 = 0x0055, - TYPE_APA2 = 0x00AA, - TYPE_APA3 = 0x00FF, - TYPE_APA4 = 0x5500, - TYPE_APA5 = 0x5555, - TYPE_APA6 = 0x55AA, - TYPE_APA7 = 0x55FF, - TYPE_APA8 = 0xAA00, - TYPE_APA9 = 0xAA55, - TYPE_APA10 = 0xAAAA, - TYPE_APA11 = 0xAAFF, - TYPE_APA12 = 0xFF00, - TYPE_APA13 = 0xFF55, - TYPE_APA14 = 0xFFAA, - TYPE_APA15 = 0xFFFF, + TYPE_APA0 = 0x0000, + TYPE_APA1 = 0x0055, + TYPE_APA2 = 0x00AA, + TYPE_APA3 = 0x00FF, + TYPE_APA4 = 0x5500, + TYPE_APA5 = 0x5555, + TYPE_APA6 = 0x55AA, + TYPE_APA7 = 0x55FF, + TYPE_APA8 = 0xAA00, + TYPE_APA9 = 0xAA55, + TYPE_APA10 = 0xAAAA, + TYPE_APA11 = 0xAAFF, + TYPE_APA12 = 0xFF00, + TYPE_APA13 = 0xFF55, + TYPE_APA14 = 0xFFAA, + TYPE_APA15 = 0xFFFF, }; enum odm_type_glna { - TYPE_GLNA0 = 0x0000, - TYPE_GLNA1 = 0x0055, - TYPE_GLNA2 = 0x00AA, - TYPE_GLNA3 = 0x00FF, - TYPE_GLNA4 = 0x5500, - TYPE_GLNA5 = 0x5555, - TYPE_GLNA6 = 0x55AA, - TYPE_GLNA7 = 0x55FF, - TYPE_GLNA8 = 0xAA00, - TYPE_GLNA9 = 0xAA55, - TYPE_GLNA10 = 0xAAAA, - TYPE_GLNA11 = 0xAAFF, - TYPE_GLNA12 = 0xFF00, - TYPE_GLNA13 = 0xFF55, - TYPE_GLNA14 = 0xFFAA, - TYPE_GLNA15 = 0xFFFF, + TYPE_GLNA0 = 0x0000, + TYPE_GLNA1 = 0x0055, + TYPE_GLNA2 = 0x00AA, + TYPE_GLNA3 = 0x00FF, + TYPE_GLNA4 = 0x5500, + TYPE_GLNA5 = 0x5555, + TYPE_GLNA6 = 0x55AA, + TYPE_GLNA7 = 0x55FF, + TYPE_GLNA8 = 0xAA00, + TYPE_GLNA9 = 0xAA55, + TYPE_GLNA10 = 0xAAAA, + TYPE_GLNA11 = 0xAAFF, + TYPE_GLNA12 = 0xFF00, + TYPE_GLNA13 = 0xFF55, + TYPE_GLNA14 = 0xFFAA, + TYPE_GLNA15 = 0xFFFF, }; enum odm_type_alna { - TYPE_ALNA0 = 0x0000, - TYPE_ALNA1 = 0x0055, - TYPE_ALNA2 = 0x00AA, - TYPE_ALNA3 = 0x00FF, - TYPE_ALNA4 = 0x5500, - TYPE_ALNA5 = 0x5555, - TYPE_ALNA6 = 0x55AA, - TYPE_ALNA7 = 0x55FF, - TYPE_ALNA8 = 0xAA00, - TYPE_ALNA9 = 0xAA55, - TYPE_ALNA10 = 0xAAAA, - TYPE_ALNA11 = 0xAAFF, - TYPE_ALNA12 = 0xFF00, - TYPE_ALNA13 = 0xFF55, - TYPE_ALNA14 = 0xFFAA, - TYPE_ALNA15 = 0xFFFF, + TYPE_ALNA0 = 0x0000, + TYPE_ALNA1 = 0x0055, + TYPE_ALNA2 = 0x00AA, + TYPE_ALNA3 = 0x00FF, + TYPE_ALNA4 = 0x5500, + TYPE_ALNA5 = 0x5555, + TYPE_ALNA6 = 0x55AA, + TYPE_ALNA7 = 0x55FF, + TYPE_ALNA8 = 0xAA00, + TYPE_ALNA9 = 0xAA55, + TYPE_ALNA10 = 0xAAAA, + TYPE_ALNA11 = 0xAAFF, + TYPE_ALNA12 = 0xFF00, + TYPE_ALNA13 = 0xFF55, + TYPE_ALNA14 = 0xFFAA, + TYPE_ALNA15 = 0xFFFF, }; #define PAUSE_FAIL 0 -#define PAUSE_SUCCESS 1 +#define PAUSE_SUCCESS 1 enum odm_parameter_init { - ODM_PRE_SETTING = 0, - ODM_POST_SETTING = 1, + ODM_PRE_SETTING = 0, + ODM_POST_SETTING = 1, ODM_INIT_FW_SETTING }; - enum phydm_pause_type { - PHYDM_PAUSE = 1, /*Pause & Set new value*/ - PHYDM_PAUSE_NO_SET = 2, /*Pause & Stay in current value*/ - PHYDM_RESUME = 3 + PHYDM_PAUSE = 1, /*Pause & Set new value*/ + PHYDM_PAUSE_NO_SET = 2, /*Pause & Stay in current value*/ + PHYDM_RESUME = 3 }; enum phydm_pause_level { - PHYDM_PAUSE_RELEASE = -1, - PHYDM_PAUSE_LEVEL_0 = 0, /* Low Priority function */ - PHYDM_PAUSE_LEVEL_1 = 1, /* Middle Priority function */ - PHYDM_PAUSE_LEVEL_2 = 2, /* High priority function (ex: Check hang function) */ - PHYDM_PAUSE_LEVEL_3 = 3, /* Debug function (the highest priority) */ - PHYDM_PAUSE_MAX_NUM = 4 + PHYDM_PAUSE_RELEASE = -1, + PHYDM_PAUSE_LEVEL_0 = 0, /* @Low Priority function */ + PHYDM_PAUSE_LEVEL_1 = 1, /* @Middle Priority function */ + PHYDM_PAUSE_LEVEL_2 = 2, /* @High priority function (ex: Check hang function) */ + PHYDM_PAUSE_LEVEL_3 = 3, /* @Debug function (the highest priority) */ + PHYDM_PAUSE_MAX_NUM = 4 }; enum phydm_dis_hw_fun { - HW_FUN_DIS = 0, /*Disable a cetain HW function & backup the original value*/ - HW_FUN_RESUME = 1 /*Revert */ + HW_FUN_DIS = 0, /*@Disable a cetain HW function & backup the original value*/ + HW_FUN_RESUME = 1 /*Revert */ }; #endif diff --git a/hal/phydm/phydm_precomp.h b/hal/phydm/phydm_precomp.h index 69f8a7a..194e041 100644 --- a/hal/phydm/phydm_precomp.h +++ b/hal/phydm/phydm_precomp.h @@ -23,20 +23,19 @@ * *****************************************************************************/ -#ifndef __ODM_PRECOMP_H__ +#ifndef __ODM_PRECOMP_H__ #define __ODM_PRECOMP_H__ #include "phydm_types.h" -#include "phydm_features.h" #include "halrf/halrf_features.h" #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - #include "Precomp.h" /* We need to include mp_precomp.h due to batch file setting. */ + #include "Precomp.h" /* @We need to include mp_precomp.h due to batch file setting. */ #else #define TEST_FALG___ 1 #endif -/* 2 Config Flags and Structs - defined by each ODM type */ +/* @2 Config Flags and Structs - defined by each ODM type */ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #include "../8192cd_cfg.h" @@ -44,6 +43,7 @@ #include "../8192cd.h" #include "../8192cd_util.h" + #include "../8192cd_hw.h" #ifdef _BIG_ENDIAN_ #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG #else @@ -57,6 +57,10 @@ #ifdef DM_ODM_CE_MAC80211 #include "../wifi.h" #include "rtl_phydm.h" + #elif defined(DM_ODM_CE_MAC80211_V2) + #include "../main.h" + #include "../hw.h" + #include "../fw.h" #endif #define __PACK #define __WLAN_ATTRIB_PACK__ @@ -65,9 +69,14 @@ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE #define __PACK #define __WLAN_ATTRIB_PACK__ +#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) + #include + #include + #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE + #define __PACK #endif -/* 2 OutSrc Header Files */ +/* @2 OutSrc Header Files */ #include "phydm.h" #include "phydm_hwconfig.h" @@ -77,49 +86,41 @@ #include "phydm_regdefine11n.h" #include "phydm_interface.h" #include "phydm_reg.h" +#include "halrf/halrf_debug.h" -#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && !defined(DM_ODM_CE_MAC80211) +#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && \ + (!defined(DM_ODM_CE_MAC80211) && !defined(DM_ODM_CE_MAC80211_V2)) -void -phy_set_tx_power_limit( - struct dm_struct *dm, - u8 *regulation, - u8 *band, - u8 *bandwidth, - u8 *rate_section, - u8 *rf_path, - u8 *channel, - u8 *power_limit -); +void phy_set_tx_power_limit( + struct dm_struct *dm, + u8 *regulation, + u8 *band, + u8 *bandwidth, + u8 *rate_section, + u8 *rf_path, + u8 *channel, + u8 *power_limit); enum hal_status rtw_phydm_fw_iqk( - struct dm_struct *dm, + struct dm_struct *dm, u8 clear, - u8 segment -); + u8 segment); enum hal_status rtw_phydm_cfg_phy_para( - struct dm_struct *dm, + struct dm_struct *dm, enum phydm_halmac_param config_type, u32 offset, u32 data, u32 mask, enum rf_path e_rf_path, - u32 delay_time -); + u32 delay_time); #endif -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - #define RTL8703B_SUPPORT 0 - #define RTL8188F_SUPPORT 0 - #define RTL8723D_SUPPORT 0 -#endif - -/* JJ ADD 20161014 */ -#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP|ODM_IOT)) +/* @Judy ADD 20180125 */ +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_IOT)) #define RTL8710B_SUPPORT 0 #endif @@ -133,12 +134,15 @@ rtw_phydm_cfg_phy_para( #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -#define RTL8195B_SUPPORT 0 /*Just for PHYDM API development*/ -#define RTL8198F_SUPPORT 0 /*Just for PHYDM API development*/ +#define RTL8197F_SUPPORT 0 /*@Just for PHYDM API development*/ +#define RTL8195B_SUPPORT 0 /*@Just for PHYDM API development*/ +#define RTL8198F_SUPPORT 0 /*@Just for PHYDM API development*/ +#define RTL8812F_SUPPORT 0 /*@Just for PHYDM API development*/ +#define RTL8197G_SUPPORT 0 /*@Just for PHYDM API development*/ #endif #if (RTL8188E_SUPPORT == 1) - #include "rtl8188e/hal8188erateadaptive.h" /* for RA,Power training */ + #include "rtl8188e/hal8188erateadaptive.h" /* @for RA,Power training */ #include "rtl8188e/halhwimg8188e_mac.h" #include "rtl8188e/halhwimg8188e_rf.h" #include "rtl8188e/halhwimg8188e_bb.h" @@ -156,19 +160,19 @@ rtw_phydm_cfg_phy_para( #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #include "halrf/rtl8188e/halrf_8188e_ap.h" #endif -#endif /* 88E END */ +#endif /* @88E END */ #if (RTL8192E_SUPPORT == 1) #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - #include "halrf/rtl8192e/halrf_8192e_win.h" /*FOR_8192E_IQK*/ + #include "halrf/rtl8192e/halrf_8192e_win.h" /*@FOR_8192E_IQK*/ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) - #include "halrf/rtl8192e/halrf_8192e_ap.h" /*FOR_8192E_IQK*/ + #include "halrf/rtl8192e/halrf_8192e_ap.h" /*@FOR_8192E_IQK*/ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - #include "halrf/rtl8192e/halrf_8192e_ce.h" /*FOR_8192E_IQK*/ + #include "halrf/rtl8192e/halrf_8192e_ce.h" /*@FOR_8192E_IQK*/ #endif - #include "rtl8192e/phydm_rtl8192e.h" /* FOR_8192E_IQK */ + #include "rtl8192e/phydm_rtl8192e.h" /* @FOR_8192E_IQK */ #include "rtl8192e/version_rtl8192e.h" #if (DM_ODM_SUPPORT_TYPE != ODM_AP) #include "rtl8192e/halhwimg8192e_bb.h" @@ -180,7 +184,7 @@ rtw_phydm_cfg_phy_para( #if (DM_ODM_SUPPORT_TYPE == ODM_CE) #include "rtl8192e_hal.h" #endif -#endif /* 92E END */ +#endif /* @92E END */ #if (RTL8812A_SUPPORT == 1) @@ -192,21 +196,21 @@ rtw_phydm_cfg_phy_para( #include "halrf/rtl8812a/halrf_8812a_ce.h" #endif - /* #include "halrf/rtl8812a/halrf_8812a.h" */ /* FOR_8812_IQK */ + /* @#include "halrf/rtl8812a/halrf_8812a.h" */ /* @FOR_8812_IQK */ #if (DM_ODM_SUPPORT_TYPE != ODM_AP) #include "rtl8812a/halhwimg8812a_bb.h" #include "rtl8812a/halhwimg8812a_mac.h" #include "rtl8812a/halhwimg8812a_rf.h" #include "rtl8812a/phydm_regconfig8812a.h" - #include "rtl8812a/phydm_rtl8812a.h" #endif + #include "rtl8812a/phydm_rtl8812a.h" #if (DM_ODM_SUPPORT_TYPE == ODM_CE) #include "rtl8812a_hal.h" #endif #include "rtl8812a/version_rtl8812a.h" -#endif /* 8812 END */ +#endif /* @8812 END */ #if (RTL8814A_SUPPORT == 1) @@ -227,9 +231,9 @@ rtw_phydm_cfg_phy_para( #include "rtl8814a_hal.h" #include "halrf/rtl8814a/halrf_iqk_8814a.h" #endif -#endif /* 8814 END */ +#endif /* @8814 END */ -#if (RTL8881A_SUPPORT == 1)/* FOR_8881_IQK */ +#if (RTL8881A_SUPPORT == 1)/* @FOR_8881_IQK */ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #include "halrf/rtl8821a/halrf_iqk_8821a_win.h" #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) @@ -237,10 +241,10 @@ rtw_phydm_cfg_phy_para( #else #include "halrf/rtl8821a/halrf_iqk_8821a_ap.h" #endif - /* #include "rtl8881a/HalHWImg8881A_BB.h" */ - /* #include "rtl8881a/HalHWImg8881A_MAC.h" */ - /* #include "rtl8881a/HalHWImg8881A_RF.h" */ - /* #include "rtl8881a/odm_RegConfig8881A.h" */ + /* @#include "rtl8881a/HalHWImg8881A_BB.h" */ + /* @#include "rtl8881a/HalHWImg8881A_MAC.h" */ + /* @#include "rtl8881a/HalHWImg8881A_RF.h" */ + /* @#include "rtl8881a/odm_RegConfig8881A.h" */ #endif #if (RTL8723B_SUPPORT == 1) @@ -273,8 +277,8 @@ rtw_phydm_cfg_phy_para( #include "halrf/rtl8821a/halrf_8821a_win.h" #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #include "halrf/rtl8821a/halrf_8821a_ce.h" - #include "halrf/rtl8821a/halrf_iqk_8821a_ce.h"/*for IQK*/ - #include "halrf/rtl8812a/halrf_8812a_ce.h"/*for IQK,LCK,Power-tracking*/ + #include "halrf/rtl8821a/halrf_iqk_8821a_ce.h"/*@for IQK*/ + #include "halrf/rtl8812a/halrf_8812a_ce.h"/*@for IQK,LCK,Power-tracking*/ #include "rtl8812a_hal.h" #else #endif @@ -282,15 +286,17 @@ rtw_phydm_cfg_phy_para( #if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) #include "../halmac/halmac_reg2.h" +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) +#include "../halmac/halmac_reg2.h" #endif #if (RTL8822B_SUPPORT == 1) #include "rtl8822b/halhwimg8822b_mac.h" - #include "rtl8822b/halhwimg8822b_rf.h" #include "rtl8822b/halhwimg8822b_bb.h" #include "rtl8822b/phydm_regconfig8822b.h" #include "halrf/rtl8822b/halrf_8822b.h" + #include "halrf/rtl8822b/halhwimg8822b_rf.h" #include "rtl8822b/phydm_rtl8822b.h" #include "rtl8822b/phydm_hal_api8822b.h" #include "rtl8822b/version_rtl8822b.h" @@ -299,9 +305,11 @@ rtw_phydm_cfg_phy_para( #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #ifdef DM_ODM_CE_MAC80211 #include "../halmac/halmac_reg_8822b.h" + #elif defined(DM_ODM_CE_MAC80211_V2) + #include "../halmac/halmac_reg_8822b.h" #else - #include /* struct HAL_DATA_TYPE */ - #include /* RX_SMOOTH_FACTOR, reg definition and etc.*/ + #include /* @struct HAL_DATA_TYPE */ + #include /* @RX_SMOOTH_FACTOR, reg definition and etc.*/ #endif #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) #endif @@ -309,6 +317,7 @@ rtw_phydm_cfg_phy_para( #endif #if (RTL8703B_SUPPORT == 1) + #include "rtl8703b/phydm_rtl8703b.h" #include "rtl8703b/phydm_regconfig8703b.h" #include "rtl8703b/halhwimg8703b_mac.h" #include "rtl8703b/halhwimg8703b_rf.h" @@ -327,7 +336,7 @@ rtw_phydm_cfg_phy_para( #include "rtl8188f/hal8188freg.h" #include "rtl8188f/phydm_rtl8188f.h" #include "rtl8188f/phydm_regconfig8188f.h" - #include "halrf/rtl8188f/halrf_8188f.h" /* for IQK,LCK,Power-tracking */ + #include "halrf/rtl8188f/halrf_8188f.h" /*@for IQK,LCK,Power-tracking*/ #include "rtl8188f/version_rtl8188f.h" #if (DM_ODM_SUPPORT_TYPE == ODM_CE) #include "rtl8188f_hal.h" @@ -347,31 +356,32 @@ rtw_phydm_cfg_phy_para( #include "rtl8723d/version_rtl8723d.h" #endif #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + #ifdef DM_ODM_CE_MAC80211 + #else #include "rtl8723d_hal.h" + #endif #endif -#endif /* 8723D End */ +#endif /* @8723D End */ -/* JJ ADD 20161014 */ #if (RTL8710B_SUPPORT == 1) #if (DM_ODM_SUPPORT_TYPE != ODM_AP) #include "rtl8710b/halhwimg8710b_bb.h" #include "rtl8710b/halhwimg8710b_mac.h" - #include "rtl8710b/halhwimg8710b_rf.h" #include "rtl8710b/phydm_regconfig8710b.h" #include "rtl8710b/hal8710breg.h" #include "rtl8710b/phydm_rtl8710b.h" #include "halrf/rtl8710b/halrf_8710b.h" + #include "halrf/rtl8710b/halhwimg8710b_rf.h" #include "rtl8710b/version_rtl8710b.h" #endif #if (DM_ODM_SUPPORT_TYPE == ODM_CE) #include "rtl8710b_hal.h" #endif -#endif /* 8710B End */ +#endif /* @8710B End */ #if (RTL8197F_SUPPORT == 1) #include "rtl8197f/halhwimg8197f_mac.h" - #include "rtl8197f/halhwimg8197f_rf.h" #include "rtl8197f/halhwimg8197f_bb.h" #include "rtl8197f/phydm_hal_api8197f.h" #include "rtl8197f/version_rtl8197f.h" @@ -379,27 +389,133 @@ rtw_phydm_cfg_phy_para( #include "rtl8197f/phydm_regconfig8197f.h" #include "halrf/rtl8197f/halrf_8197f.h" #include "halrf/rtl8197f/halrf_iqk_8197f.h" + #include "halrf/rtl8197f/halrf_dpk_8197f.h" + #include "halrf/rtl8197f/halhwimg8197f_rf.h" #endif #if (RTL8821C_SUPPORT == 1) #include "rtl8821c/phydm_hal_api8821c.h" #include "rtl8821c/halhwimg8821c_mac.h" - #include "rtl8821c/halhwimg8821c_rf.h" #include "rtl8821c/halhwimg8821c_bb.h" #include "rtl8821c/phydm_regconfig8821c.h" #include "halrf/rtl8821c/halrf_8821c.h" + #include "halrf/rtl8821c/halhwimg8821c_rf.h" #include "rtl8821c/version_rtl8821c.h" #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + #ifdef DM_ODM_CE_MAC80211 + #include "../halmac/halmac_reg_8821c.h" + #else #include "rtl8821c_hal.h" + #endif #endif #endif +#if (RTL8192F_SUPPORT == 1) + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + #include "rtl8192f_hal.h"/*need to before rf.h*/ + #endif + #include "rtl8192f/halhwimg8192f_mac.h" + #include "rtl8192f/halhwimg8192f_bb.h" + #include "rtl8192f/phydm_hal_api8192f.h" + #include "rtl8192f/version_rtl8192f.h" + #include "rtl8192f/phydm_rtl8192f.h" + #include "rtl8192f/phydm_regconfig8192f.h" + #include "halrf/rtl8192f/halrf_8192f.h" + #include "halrf/rtl8192f/halhwimg8192f_rf.h" + #if (DM_ODM_SUPPORT_TYPE == ODM_AP) + #include "halrf/rtl8192f/halrf_dpk_8192f.h" + #endif +#endif + +#if (RTL8721D_SUPPORT == 1) + #include "halrf/rtl8721d/halrf_8721d.h" + #include "halrf/rtl8721d/halhwimg8721d_rf.h" + + #include "rtl8721d/phydm_hal_api8721d.h" + #include "rtl8721d/phydm_regconfig8721d.h" + #include "rtl8721d/halhwimg8721d_mac.h" + #include "rtl8721d/halhwimg8721d_bb.h" + #include "rtl8721d/version_rtl8721d.h" + #include "rtl8721d/phydm_rtl8721d.h" + #include "rtl8721d/hal8721dreg.h" + #include + #if 0 + #if (DM_ODM_SUPPORT_TYPE == ODM_AP) + #include "halrf/rtl8721d/halrf_dpk_8721d.h" + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + #include "rtl8721d_hal.h" + #endif + #endif +#endif #if (RTL8195B_SUPPORT == 1) + #include "halrf/rtl8195b/halrf_8195b.h" + #include "halrf/rtl8195b/halhwimg8195b_rf.h" + #include "rtl8195b/phydm_hal_api8195b.h" + #include "rtl8195b/phydm_regconfig8195b.h" + #include "rtl8195b/halhwimg8195b_mac.h" + #include "rtl8195b/halhwimg8195b_bb.h" + #include "rtl8195b/version_rtl8195b.h" + #include /*@HAL_DATA_TYPE*/ #endif #if (RTL8198F_SUPPORT == 1) - #include "rtl8198f/phydm_hal_api8198F.h" + #include "rtl8198f/phydm_regconfig8198f.h" + #include "rtl8198f/phydm_hal_api8198f.h" + #include "rtl8198f/halhwimg8198f_mac.h" + #include "rtl8198f/halhwimg8198f_bb.h" + #include "rtl8198f/version_rtl8198f.h" + #include "halrf/rtl8198f/halrf_8198f.h" + #include "halrf/rtl8198f/halrf_iqk_8198f.h" + #include "halrf/rtl8198f/halhwimg8198f_rf.h" #endif -#endif /* __ODM_PRECOMP_H__ */ +#if (RTL8822C_SUPPORT) + #include "rtl8822c/halhwimg8822c_mac.h" + #include "rtl8822c/halhwimg8822c_bb.h" + #include "rtl8822c/phydm_regconfig8822c.h" + #include "halrf/rtl8822c/halrf_8822c.h" + #include "halrf/rtl8822c/halhwimg8822c_rf.h" + #include "halrf/rtl8822c/version_rtl8822c_rf.h" + #include "rtl8822c/phydm_hal_api8822c.h" + #include "rtl8822c/version_rtl8822c.h" + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + /* @struct HAL_DATA_TYPE */ + #include + /* @RX_SMOOTH_FACTOR, reg definition and etc.*/ + #include + #endif +#endif +#if (RTL8814B_SUPPORT == 1) + #include "rtl8814b/halhwimg8814b_mac.h" + #include "rtl8814b/halhwimg8814b_bb.h" + #include "rtl8814b/phydm_regconfig8814b.h" + #include "halrf/rtl8814b/halrf_8814b.h" + #include "halrf/rtl8814b/halhwimg8814b_rf.h" + #include "rtl8814b/phydm_hal_api8814b.h" + #include "rtl8814b/version_rtl8814b.h" + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + #include /* @struct HAL_DATA_TYPE */ + #include /* @RX_SMOOTH_FACTOR, reg definition and etc.*/ + #endif +#endif +#if (RTL8812F_SUPPORT) + #include "rtl8812f/halhwimg8812f_mac.h" + #include "rtl8812f/halhwimg8812f_bb.h" + #include "rtl8812f/phydm_regconfig8812f.h" + #include "halrf/rtl8812f/halrf_8812f.h" + #include "halrf/rtl8812f/halhwimg8812f_rf.h" + #include "rtl8812f/phydm_hal_api8812f.h" + #include "rtl8812f/version_rtl8812f.h" +#endif +#if (RTL8197G_SUPPORT) + #include "rtl8197g/halhwimg8197g_mac.h" + #include "rtl8197g/halhwimg8197g_bb.h" + #include "rtl8197g/phydm_regconfig8197g.h" + #include "halrf/rtl8197g/halrf_8197g.h" + #include "halrf/rtl8197g/halhwimg8197g_rf.h" + #include "rtl8197g/phydm_hal_api8197g.h" + #include "rtl8197g/version_rtl8197g.h" +#endif +#endif /* @__ODM_PRECOMP_H__ */ diff --git a/hal/phydm/phydm_primary_cca.c b/hal/phydm/phydm_primary_cca.c index 71677be..dec6c53 100644 --- a/hal/phydm/phydm_primary_cca.c +++ b/hal/phydm/phydm_primary_cca.c @@ -23,698 +23,142 @@ * *****************************************************************************/ -/* ************************************************************ +/************************************************************* * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" #ifdef PHYDM_PRIMARY_CCA -void -phydm_write_dynamic_cca( - void *dm_void, - u8 curr_mf_state - -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_pricca_struct *primary_cca = &dm->dm_pri_cca; +void phydm_write_dynamic_cca( + void *dm_void, + u8 curr_mf_state - if (primary_cca->mf_state == curr_mf_state) + ) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca; + + if (pri_cca->mf_state == curr_mf_state) return; if (dm->support_ic_type & ODM_IC_11N_SERIES) { if (curr_mf_state == MF_USC_LSC) { - odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), MF_USC_LSC); - odm_set_bb_reg(dm, 0xc84, 0xf0000000, primary_cca->cca_th_40m_bkp); /*40M OFDM MF CCA threshold*/ + odm_set_bb_reg(dm, R_0xc6c, 0x180, MF_USC_LSC); + /*@40M OFDM MF CCA threshold*/ + odm_set_bb_reg(dm, R_0xc84, 0xf0000000, + pri_cca->cca_th_40m_bkp); } else { - odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), curr_mf_state); - odm_set_bb_reg(dm, 0xc84, 0xf0000000, 0); /*40M OFDM MF CCA threshold*/ + odm_set_bb_reg(dm, R_0xc6c, 0x180, curr_mf_state); + /*@40M OFDM MF CCA threshold*/ + odm_set_bb_reg(dm, R_0xc84, 0xf0000000, 0); } } - primary_cca->mf_state = curr_mf_state; - PHYDM_DBG(dm, DBG_PRI_CCA, - "Set CCA at ((%s SB)), 0xc6c[8:7]=((%d))\n", ((curr_mf_state == MF_USC_LSC)?"D":((curr_mf_state == MF_LSC)?"L":"U")), curr_mf_state); + pri_cca->mf_state = curr_mf_state; + PHYDM_DBG(dm, DBG_PRI_CCA, "Set CCA at ((%s SB)), 0xc6c[8:7]=((%d))\n", + ((curr_mf_state == MF_USC_LSC) ? "D" : + ((curr_mf_state == MF_LSC) ? "L" : "U")), curr_mf_state); } -void -phydm_primary_cca_reset( - void *dm_void -) +void phydm_primary_cca_reset( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_pricca_struct *primary_cca = &dm->dm_pri_cca; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca; PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA] Reset\n"); - primary_cca->mf_state = 0xff; - primary_cca->pre_bw = (enum channel_width)0xff; + pri_cca->mf_state = 0xff; + pri_cca->pre_bw = (enum channel_width)0xff; phydm_write_dynamic_cca(dm, MF_USC_LSC); } -void -phydm_primary_cca_11n( - void *dm_void -) +void phydm_primary_cca_11n( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_pricca_struct *primary_cca = &dm->dm_pri_cca; - enum channel_width curr_bw = (enum channel_width)*dm->band_width; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca; + enum channel_width curr_bw = (enum channel_width)*dm->band_width; if (!(dm->support_ability & ODM_BB_PRIMARY_CCA)) return; - - if (!dm->is_linked) { /* is_linked==False */ + + if (!dm->is_linked) { PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA][No Link!!!]\n"); - if (primary_cca->pri_cca_is_become_linked == true) { + if (pri_cca->pri_cca_is_become_linked) { phydm_primary_cca_reset(dm); - primary_cca->pri_cca_is_become_linked = dm->is_linked; + pri_cca->pri_cca_is_become_linked = dm->is_linked; } return; - } else { - if (primary_cca->pri_cca_is_become_linked == false) { + if (!pri_cca->pri_cca_is_become_linked) { PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA][Linked !!!]\n"); - primary_cca->pri_cca_is_become_linked = dm->is_linked; + pri_cca->pri_cca_is_become_linked = dm->is_linked; } } - - if (curr_bw != primary_cca->pre_bw) { + + if (curr_bw != pri_cca->pre_bw) { PHYDM_DBG(dm, DBG_PRI_CCA, "[Primary CCA] start ==>\n"); - primary_cca->pre_bw = curr_bw; + pri_cca->pre_bw = curr_bw; if (curr_bw == CHANNEL_WIDTH_40) { - - if (*dm->sec_ch_offset == SECOND_CH_AT_LSB) {/* Primary CH @ upper sideband*/ - - PHYDM_DBG(dm, DBG_PRI_CCA, "BW40M, Primary CH at USB\n"); + if (*dm->sec_ch_offset == SECOND_CH_AT_LSB) { + /* Primary CH @ upper sideband*/ + PHYDM_DBG(dm, DBG_PRI_CCA, + "BW40M, Primary CH at USB\n"); phydm_write_dynamic_cca(dm, MF_USC); - - } else { /*Primary CH @ lower sideband*/ - - PHYDM_DBG(dm, DBG_PRI_CCA, "BW40M, Primary CH at LSB\n"); + } else { + /*Primary CH @ lower sideband*/ + PHYDM_DBG(dm, DBG_PRI_CCA, + "BW40M, Primary CH at LSB\n"); phydm_write_dynamic_cca(dm, MF_LSC); } } else { - PHYDM_DBG(dm, DBG_PRI_CCA, "Not BW40M, USB + LSB\n"); phydm_primary_cca_reset(dm); } } } -#if 0 -#if (RTL8188E_SUPPORT == 1) -void -odm_dynamic_primary_cca_8188e( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct sta_info *entry; - struct cmn_sta_info *sta; - struct phydm_fa_struct *false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(dm, PHYDM_FALSEALMCNT); - struct phydm_pricca_struct *primary_cca = &(dm->dm_pri_cca); - boolean client_40mhz = false, client_tmp = false; /* connected client BW */ - boolean is_connected = false; /* connected or not */ - u8 client_40mhz_pre = 0; - u32 counter = 0; - u8 delay = 1; - u64 cur_tx_ok_cnt; - u64 cur_rx_ok_cnt; - u8 sec_ch_offset = *(dm->sec_ch_offset); - u8 i; - - if (!dm->is_linked) - return; - - if (!(dm->support_ability & ODM_BB_PRIMARY_CCA)) - return; - - if (*(dm->band_width) == CHANNEL_WIDTH_20) { /*curr bw*/ - odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 0); - return; - } - - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) || (DM_ODM_SUPPORT_TYPE == ODM_CE) - sec_ch_offset = sec_ch_offset % 2 + 1; /* NIC's definition is reverse to AP 1:secondary below, 2: secondary above */ - #endif - - PHYDM_DBG(dm, DBG_PRI_CCA, "Second CH Offset = %d\n", sec_ch_offset); - - /* 3 Check Current WLAN Traffic */ - cur_tx_ok_cnt = dm->tx_tp; - cur_rx_ok_cnt = dm->rx_tp; - - /* ==================Debug Message==================== */ - PHYDM_DBG(dm, DBG_PRI_CCA, "TP = %llu\n", cur_tx_ok_cnt + cur_rx_ok_cnt); - PHYDM_DBG(dm, DBG_PRI_CCA, "is_BW40 = %d\n", *(dm->band_width)); - PHYDM_DBG(dm, DBG_PRI_CCA, "BW_LSC = %d\n", false_alm_cnt->cnt_bw_lsc); - PHYDM_DBG(dm, DBG_PRI_CCA, "BW_USC = %d\n", false_alm_cnt->cnt_bw_usc); - PHYDM_DBG(dm, DBG_PRI_CCA, "CCA OFDM = %d\n", false_alm_cnt->cnt_ofdm_cca); - PHYDM_DBG(dm, DBG_PRI_CCA, "CCA CCK = %d\n", false_alm_cnt->cnt_cck_cca); - PHYDM_DBG(dm, DBG_PRI_CCA, "OFDM FA = %d\n", false_alm_cnt->cnt_ofdm_fail); - PHYDM_DBG(dm, DBG_PRI_CCA, "CCK FA = %d\n", false_alm_cnt->cnt_cck_fail); - /* ================================================ */ - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - if (ACTING_AS_AP(dm->adapter)) /* primary cca process only do at AP mode */ -#endif - { -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PHYDM_DBG(dm, DBG_PRI_CCA, "ACTING as AP mode=%d\n", ACTING_AS_AP(dm->adapter)); - /* 3 To get entry's connection and BW infomation status. */ - for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) { - if (IsAPModeExist(dm->adapter) && GetFirstExtAdapter(dm->adapter) != NULL) - entry = AsocEntry_EnumStation(GetFirstExtAdapter(dm->adapter), i); - else - entry = AsocEntry_EnumStation(GetDefaultAdapter(dm->adapter), i); - if (entry != NULL) { - client_tmp = entry->BandWidth; /* client BW */ - PHYDM_DBG(dm, DBG_PRI_CCA, "Client_BW=%d\n", client_tmp); - if (client_tmp > client_40mhz) - client_40mhz = client_tmp; /* 40M/20M coexist => 40M priority is High */ - - if (entry->bAssociated) { - is_connected = true; /* client is connected or not */ - break; - } - } else - break; - } -#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) - /* 3 To get entry's connection and BW infomation status. */ - - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - sta = dm->phydm_sta_info[i]; - if (is_sta_active(sta)) { - client_tmp = sta->bw_mode; - if (client_tmp > client_40mhz) - client_40mhz = client_tmp; /* 40M/20M coexist => 40M priority is High */ - - is_connected = true; - } - } -#endif - PHYDM_DBG(dm, DBG_PRI_CCA, "is_connected=%d\n", is_connected); - PHYDM_DBG(dm, DBG_PRI_CCA, "Is Client 40MHz=%d\n", client_40mhz); - /* 1 Monitor whether the interference exists or not */ - if (primary_cca->monitor_flag == 1) { - if (sec_ch_offset == 1) { /* secondary channel is below the primary channel */ - if ((false_alm_cnt->cnt_ofdm_cca > 500) && (false_alm_cnt->cnt_bw_lsc > false_alm_cnt->cnt_bw_usc + 500)) { - if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1) { - primary_cca->intf_type = 1; - primary_cca->pri_cca_flag = 1; - odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT7, 2); /* USC MF */ - if (primary_cca->dup_rts_flag == 1) - primary_cca->dup_rts_flag = 0; - } else { - primary_cca->intf_type = 2; - if (primary_cca->dup_rts_flag == 0) - primary_cca->dup_rts_flag = 1; - } - - } else { /* interferecne disappear */ - primary_cca->dup_rts_flag = 0; - primary_cca->intf_flag = 0; - primary_cca->intf_type = 0; - } - } else if (sec_ch_offset == 2) { /* secondary channel is above the primary channel */ - if ((false_alm_cnt->cnt_ofdm_cca > 500) && (false_alm_cnt->cnt_bw_usc > false_alm_cnt->cnt_bw_lsc + 500)) { - if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1) { - primary_cca->intf_type = 1; - primary_cca->pri_cca_flag = 1; - odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT7, 1); /* LSC MF */ - if (primary_cca->dup_rts_flag == 1) - primary_cca->dup_rts_flag = 0; - } else { - primary_cca->intf_type = 2; - if (primary_cca->dup_rts_flag == 0) - primary_cca->dup_rts_flag = 1; - } - - } else { /* interferecne disappear */ - primary_cca->dup_rts_flag = 0; - primary_cca->intf_flag = 0; - primary_cca->intf_type = 0; - } - - - } - primary_cca->monitor_flag = 0; - } - - /* 1 Dynamic Primary CCA Main Function */ - if (primary_cca->monitor_flag == 0) { - if (*(dm->band_width) == CHANNEL_WIDTH_40) { /* if RFBW==40M mode which require to process primary cca */ - /* 2 STA is NOT Connected */ - if (!is_connected) { - PHYDM_DBG(dm, DBG_PRI_CCA, "STA NOT Connected!!!!\n"); - - if (primary_cca->pri_cca_flag == 1) { /* reset primary cca when STA is disconnected */ - primary_cca->pri_cca_flag = 0; - odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 0); - } - if (primary_cca->dup_rts_flag == 1) /* reset Duplicate RTS when STA is disconnected */ - primary_cca->dup_rts_flag = 0; - - if (sec_ch_offset == 1) { /* secondary channel is below the primary channel */ - if ((false_alm_cnt->cnt_ofdm_cca > 800) && (false_alm_cnt->cnt_bw_lsc * 5 > false_alm_cnt->cnt_bw_usc * 9)) { - primary_cca->intf_flag = 1; /* secondary channel interference is detected!!! */ - if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1) - primary_cca->intf_type = 1; /* interference is shift */ - else - primary_cca->intf_type = 2; /* interference is in-band */ - } else { - primary_cca->intf_flag = 0; - primary_cca->intf_type = 0; - } - } else if (sec_ch_offset == 2) { /* secondary channel is above the primary channel */ - if ((false_alm_cnt->cnt_ofdm_cca > 800) && (false_alm_cnt->cnt_bw_usc * 5 > false_alm_cnt->cnt_bw_lsc * 9)) { - primary_cca->intf_flag = 1; /* secondary channel interference is detected!!! */ - if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1) - primary_cca->intf_type = 1; /* interference is shift */ - else - primary_cca->intf_type = 2; /* interference is in-band */ - } else { - primary_cca->intf_flag = 0; - primary_cca->intf_type = 0; - } - } - PHYDM_DBG(dm, DBG_PRI_CCA, "primary_cca=%d\n", primary_cca->pri_cca_flag); - PHYDM_DBG(dm, DBG_PRI_CCA, "Intf_Type=%d\n", primary_cca->intf_type); - } - /* 2 STA is Connected */ - else { - if (client_40mhz == 0) /* 3 */ { /* client BW = 20MHz */ - if (primary_cca->pri_cca_flag == 0) { - primary_cca->pri_cca_flag = 1; - if (sec_ch_offset == 1) - odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 2); - else if (sec_ch_offset == 2) - odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 1); - } - PHYDM_DBG(dm, DBG_PRI_CCA, "STA Connected 20M!!! primary_cca=%d\n", primary_cca->pri_cca_flag); - } else /* 3 */ { /* client BW = 40MHz */ - if (primary_cca->intf_flag == 1) { /* interference is detected!! */ - if (primary_cca->intf_type == 1) { - if (primary_cca->pri_cca_flag != 1) { - primary_cca->pri_cca_flag = 1; - if (sec_ch_offset == 1) - odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 2); - else if (sec_ch_offset == 2) - odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 1); - } - } else if (primary_cca->intf_type == 2) { - if (primary_cca->dup_rts_flag != 1) - primary_cca->dup_rts_flag = 1; - } - } else { /* if intf_flag==0 */ - if ((cur_tx_ok_cnt + cur_rx_ok_cnt) < 1) { /* idle mode or TP traffic is very low */ - if (sec_ch_offset == 1) { - if ((false_alm_cnt->cnt_ofdm_cca > 800) && (false_alm_cnt->cnt_bw_lsc * 5 > false_alm_cnt->cnt_bw_usc * 9)) { - primary_cca->intf_flag = 1; - if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1) - primary_cca->intf_type = 1; /* interference is shift */ - else - primary_cca->intf_type = 2; /* interference is in-band */ - } - } else if (sec_ch_offset == 2) { - if ((false_alm_cnt->cnt_ofdm_cca > 800) && (false_alm_cnt->cnt_bw_usc * 5 > false_alm_cnt->cnt_bw_lsc * 9)) { - primary_cca->intf_flag = 1; - if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1) - primary_cca->intf_type = 1; /* interference is shift */ - else - primary_cca->intf_type = 2; /* interference is in-band */ - } - - } - } else { /* TP Traffic is High */ - if (sec_ch_offset == 1) { - if (false_alm_cnt->cnt_bw_lsc > (false_alm_cnt->cnt_bw_usc + 500)) { - if (delay == 0) { /* add delay to avoid interference occurring abruptly, jump one time */ - primary_cca->intf_flag = 1; - if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1) - primary_cca->intf_type = 1; /* interference is shift */ - else - primary_cca->intf_type = 2; /* interference is in-band */ - delay = 1; - } else - delay = 0; - } - } else if (sec_ch_offset == 2) { - if (false_alm_cnt->cnt_bw_usc > (false_alm_cnt->cnt_bw_lsc + 500)) { - if (delay == 0) { /* add delay to avoid interference occurring abruptly */ - primary_cca->intf_flag = 1; - if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1) - primary_cca->intf_type = 1; /* interference is shift */ - else - primary_cca->intf_type = 2; /* interference is in-band */ - delay = 1; - } else - delay = 0; - } - } - } - } - PHYDM_DBG(dm, DBG_PRI_CCA, "Primary CCA=%d\n", primary_cca->pri_cca_flag); - PHYDM_DBG(dm, DBG_PRI_CCA, "Duplicate RTS=%d\n", primary_cca->dup_rts_flag); - } - - } /* end of connected */ - } - } - /* 1 Dynamic Primary CCA Monitor counter */ - if ((primary_cca->pri_cca_flag == 1) || (primary_cca->dup_rts_flag == 1)) { - if (client_40mhz == 0) { /* client=20M no need to monitor primary cca flag */ - client_40mhz_pre = client_40mhz; - return; - } - counter++; - PHYDM_DBG(dm, DBG_PRI_CCA, "counter=%d\n", counter); - if ((counter == 30) || ((client_40mhz - client_40mhz_pre) == 1)) { /* Every 60 sec to monitor one time */ - primary_cca->monitor_flag = 1; /* monitor flag is triggered!!!!! */ - if (primary_cca->pri_cca_flag == 1) { - primary_cca->pri_cca_flag = 0; - odm_set_bb_reg(dm, 0xc6c, BIT(8) | BIT(7), 0); - } - counter = 0; - } - } - } - - client_40mhz_pre = client_40mhz; -} -#endif - -#if (RTL8192E_SUPPORT == 1) - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - -void -odm_dynamic_primary_cca_mp_8192e( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - PADAPTER adapter = (PADAPTER)dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); - struct phydm_fa_struct *false_alm_cnt = &(dm->false_alm_cnt); - struct phydm_pricca_struct *primary_cca = &(dm->dm_pri_cca); - u64 OFDM_CCA, OFDM_FA, bw_usc_cnt, bw_lsc_cnt; - u8 sec_ch_offset; - static u8 count_down = PRI_CCA_MONITOR_TIME; - - if (!dm->is_linked) - return; - - if (!(dm->support_ability & ODM_BB_PRIMARY_CCA)) - return; - - OFDM_CCA = false_alm_cnt->cnt_ofdm_cca; - OFDM_FA = false_alm_cnt->cnt_ofdm_fail; - bw_usc_cnt = false_alm_cnt->cnt_bw_usc; - bw_lsc_cnt = false_alm_cnt->cnt_bw_lsc; - PHYDM_DBG(dm, DBG_PRI_CCA, "92E: OFDM CCA=%d\n", OFDM_CCA); - PHYDM_DBG(dm, DBG_PRI_CCA, "92E: OFDM FA=%d\n", OFDM_FA); - PHYDM_DBG(dm, DBG_PRI_CCA, "92E: BW_USC=%d\n", bw_usc_cnt); - PHYDM_DBG(dm, DBG_PRI_CCA, "92E: BW_LSC=%d\n", bw_lsc_cnt); - sec_ch_offset = *(dm->sec_ch_offset); /* NIC: 2: sec is below, 1: sec is above */ - - - if (IsAPModeExist(adapter)) { - phydm_write_dynamic_cca(dm, MF_USC_LSC); - return; - } - - if (*(dm->band_width) != CHANNEL_WIDTH_40) - return; - - PHYDM_DBG(dm, DBG_PRI_CCA, "92E: Cont Down= %d\n", count_down); - PHYDM_DBG(dm, DBG_PRI_CCA, "92E: Primary_CCA_flag=%d\n", primary_cca->pri_cca_flag); - PHYDM_DBG(dm, DBG_PRI_CCA, "92E: Intf_Type=%d\n", primary_cca->intf_type); - PHYDM_DBG(dm, DBG_PRI_CCA, "92E: Intf_flag=%d\n", primary_cca->intf_flag); - PHYDM_DBG(dm, DBG_PRI_CCA, "92E: Duplicate RTS Flag=%d\n", primary_cca->dup_rts_flag); - - if (primary_cca->pri_cca_flag == 0) { - if (sec_ch_offset == SECOND_CH_AT_LSB) { /* Primary channel is above NOTE: duplicate CTS can remove this condition */ - - if ((OFDM_CCA > OFDMCCA_TH) && (bw_lsc_cnt > (bw_usc_cnt + bw_ind_bias)) - && (OFDM_FA > (OFDM_CCA >> 1))) { - primary_cca->intf_type = 1; - primary_cca->intf_flag = 1; - phydm_write_dynamic_cca(dm, MF_USC); - primary_cca->pri_cca_flag = 1; - } else if ((OFDM_CCA > OFDMCCA_TH) && (bw_lsc_cnt > (bw_usc_cnt + bw_ind_bias)) - && (OFDM_FA < (OFDM_CCA >> 1))) { - primary_cca->intf_type = 2; - primary_cca->intf_flag = 1; - phydm_write_dynamic_cca(dm, MF_USC); - primary_cca->pri_cca_flag = 1; - primary_cca->dup_rts_flag = 1; - hal_data->RTSEN = 1; - } else { - primary_cca->intf_type = 0; - primary_cca->intf_flag = 0; - phydm_write_dynamic_cca(dm, MF_USC_LSC); - hal_data->RTSEN = 0; - primary_cca->dup_rts_flag = 0; - } - - } else if (sec_ch_offset == SECOND_CH_AT_USB) { - if ((OFDM_CCA > OFDMCCA_TH) && (bw_usc_cnt > (bw_lsc_cnt + bw_ind_bias)) - && (OFDM_FA > (OFDM_CCA >> 1))) { - primary_cca->intf_type = 1; - primary_cca->intf_flag = 1; - phydm_write_dynamic_cca(dm, MF_LSC); - primary_cca->pri_cca_flag = 1; - } else if ((OFDM_CCA > OFDMCCA_TH) && (bw_usc_cnt > (bw_lsc_cnt + bw_ind_bias)) - && (OFDM_FA < (OFDM_CCA >> 1))) { - primary_cca->intf_type = 2; - primary_cca->intf_flag = 1; - phydm_write_dynamic_cca(dm, MF_LSC); - primary_cca->pri_cca_flag = 1; - primary_cca->dup_rts_flag = 1; - hal_data->RTSEN = 1; - } else { - primary_cca->intf_type = 0; - primary_cca->intf_flag = 0; - phydm_write_dynamic_cca(dm, MF_USC_LSC); - hal_data->RTSEN = 0; - primary_cca->dup_rts_flag = 0; - } - - } - - } else { /* primary_cca->pri_cca_flag==1 */ - - count_down--; - if (count_down == 0) { - count_down = PRI_CCA_MONITOR_TIME; - primary_cca->pri_cca_flag = 0; - phydm_write_dynamic_cca(dm, MF_USC_LSC); /* default */ - hal_data->RTSEN = 0; - primary_cca->dup_rts_flag = 0; - primary_cca->intf_type = 0; - primary_cca->intf_flag = 0; - } - - } -} - -#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) - -void -odm_intf_detection( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fa_struct *false_alm_cnt = &(dm->false_alm_cnt); - struct phydm_pricca_struct *primary_cca = &(dm->dm_pri_cca); - - if ((false_alm_cnt->cnt_ofdm_cca > OFDMCCA_TH) - && (false_alm_cnt->cnt_bw_lsc > (false_alm_cnt->cnt_bw_usc + bw_ind_bias))) { - primary_cca->intf_flag = 1; - primary_cca->ch_offset = 1; /* 1:LSC, 2:USC */ - if (false_alm_cnt->cnt_ofdm_fail > (false_alm_cnt->cnt_ofdm_cca >> 1)) - primary_cca->intf_type = 1; - else - primary_cca->intf_type = 2; - } else if ((false_alm_cnt->cnt_ofdm_cca > OFDMCCA_TH) - && (false_alm_cnt->cnt_bw_usc > (false_alm_cnt->cnt_bw_lsc + bw_ind_bias))) { - primary_cca->intf_flag = 1; - primary_cca->ch_offset = 2; /* 1:LSC, 2:USC */ - if (false_alm_cnt->cnt_ofdm_fail > (false_alm_cnt->cnt_ofdm_cca >> 1)) - primary_cca->intf_type = 1; - else - primary_cca->intf_type = 2; - } else { - primary_cca->intf_flag = 0; - primary_cca->intf_type = 0; - primary_cca->ch_offset = 0; - } - -} - -void -odm_dynamic_primary_cca_ap_8192e( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_pricca_struct *primary_cca = &(dm->dm_pri_cca); - u8 i; - static u32 count_down = PRI_CCA_MONITOR_TIME; - u8 STA_BW = false, STA_BW_pre = false, STA_BW_TMP = false; - boolean is_connected = false; - u8 sec_ch_offset; - u8 cur_mf_state; - struct cmn_sta_info *entry; - - if (!dm->is_linked) - return; - - if (!(dm->support_ability & ODM_BB_PRIMARY_CCA)) - return; - - sec_ch_offset = *(dm->sec_ch_offset); /* AP: 1: sec is below, 2: sec is above */ - - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - entry = dm->phydm_sta_info[i]; - if (is_sta_active(entry)) { - STA_BW_TMP = entry->bw_mode; - if (STA_BW_TMP > STA_BW) - STA_BW = STA_BW_TMP; - is_connected = true; - } - } - - if (*(dm->band_width) == CHANNEL_WIDTH_40) { - - if (primary_cca->pri_cca_flag == 0) { - if (is_connected) { - if (STA_BW == CHANNEL_WIDTH_20) { /* 2 STA BW=20M */ - primary_cca->pri_cca_flag = 1; - if (sec_ch_offset == 1) { - cur_mf_state = MF_USC; - phydm_write_dynamic_cca(dm, cur_mf_state); - } else if (sec_ch_offset == 2) { - cur_mf_state = MF_USC; - phydm_write_dynamic_cca(dm, cur_mf_state); - } - } else { /* 2 STA BW=40M */ - if (primary_cca->intf_flag == 0) - odm_intf_detection(dm); - else { /* intf_flag = 1 */ - if (primary_cca->intf_type == 1) { - if (primary_cca->ch_offset == 1) { - cur_mf_state = MF_USC; - if (sec_ch_offset == 1) /* AP, 1: primary is above 2: primary is below */ - phydm_write_dynamic_cca(dm, cur_mf_state); - } else if (primary_cca->ch_offset == 2) { - cur_mf_state = MF_LSC; - if (sec_ch_offset == 2) - phydm_write_dynamic_cca(dm, cur_mf_state); - } - } else if (primary_cca->intf_type == 2) - PHYDM_DBG(dm, DBG_PRI_CCA, "92E: primary_cca->intf_type = 2\n"); - } - } - - } else /* disconnected interference detection */ - odm_intf_detection(dm); /* end of disconnected */ - - - } else { /* primary_cca->pri_cca_flag == 1 */ - - if (STA_BW == 0) { - STA_BW_pre = STA_BW; - return; - } - - count_down--; - if ((count_down == 0) || ((STA_BW & STA_BW_pre) != 1)) { - count_down = PRI_CCA_MONITOR_TIME; - primary_cca->pri_cca_flag = 0; - primary_cca->intf_type = 0; - primary_cca->intf_flag = 0; - cur_mf_state = MF_USC_LSC; - phydm_write_dynamic_cca(dm, cur_mf_state); /* default */ - } - } - STA_BW_pre = STA_BW; - - } else { - /* 2 Reset */ - phydm_primary_cca_init(dm); - cur_mf_state = MF_USC_LSC; - phydm_write_dynamic_cca(dm, cur_mf_state); - count_down = PRI_CCA_MONITOR_TIME; - } - -} -#endif - - -#endif /* RTL8192E_SUPPORT == 1 */ -#endif - - -#endif - boolean -odm_dynamic_primary_cca_dup_rts( - void *dm_void -) +odm_dynamic_primary_cca_dup_rts(void *dm_void) { -#ifdef PHYDM_PRIMARY_CCA - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_pricca_struct *primary_cca = &dm->dm_pri_cca; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca; - return primary_cca->dup_rts_flag; -#else - return 0; -#endif + return pri_cca->dup_rts_flag; } -void -phydm_primary_cca_init( - void *dm_void -) +void phydm_primary_cca_init(void *dm_void) { -#ifdef PHYDM_PRIMARY_CCA - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_pricca_struct *primary_cca = &dm->dm_pri_cca; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca; if (!(dm->support_ability & ODM_BB_PRIMARY_CCA)) return; + if (!(dm->support_ic_type & ODM_IC_11N_SERIES)) + return; + PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA] Init ==>\n"); - #if (RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) - primary_cca->dup_rts_flag = 0; - primary_cca->intf_flag = 0; - primary_cca->intf_type = 0; - primary_cca->monitor_flag = 0; - primary_cca->pri_cca_flag = 0; - primary_cca->ch_offset = 0; - #endif - primary_cca->mf_state = 0xff; - primary_cca->pre_bw = (enum channel_width)0xff; - - if (dm->support_ic_type & ODM_IC_11N_SERIES) - primary_cca->cca_th_40m_bkp = (u8)odm_get_bb_reg(dm, 0xc84, 0xf0000000); +#if (RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) + pri_cca->dup_rts_flag = 0; + pri_cca->intf_flag = 0; + pri_cca->intf_type = 0; + pri_cca->monitor_flag = 0; + pri_cca->pri_cca_flag = 0; + pri_cca->ch_offset = 0; #endif + pri_cca->mf_state = 0xff; + pri_cca->pre_bw = (enum channel_width)0xff; + pri_cca->cca_th_40m_bkp = (u8)odm_get_bb_reg(dm, R_0xc84, 0xf0000000); } -void -phydm_primary_cca( - void *dm_void -) +void phydm_primary_cca(void *dm_void) { #ifdef PHYDM_PRIMARY_CCA - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (!(dm->support_ic_type & ODM_IC_11N_SERIES)) return; @@ -726,5 +170,4 @@ phydm_primary_cca( #endif } - - +#endif diff --git a/hal/phydm/phydm_primary_cca.h b/hal/phydm/phydm_primary_cca.h index c619de5..9a64750 100644 --- a/hal/phydm/phydm_primary_cca.h +++ b/hal/phydm/phydm_primary_cca.h @@ -23,39 +23,38 @@ * *****************************************************************************/ -#ifndef __PHYDM_PRIMARYCCA_H__ -#define __PHYDM_PRIMARYCCA_H__ +#ifndef __PHYDM_PRIMARYCCA_H__ +#define __PHYDM_PRIMARYCCA_H__ -#define PRIMARYCCA_VERSION "1.0" /*2017.03.23, Dino*/ +#ifdef PHYDM_PRIMARY_CCA +#define PRIMARYCCA_VERSION "2.0" -/*============================================================*/ -/*Definition */ -/*============================================================*/ +/*@============================================================*/ +/*@Definition */ +/*@============================================================*/ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -#define SECOND_CH_AT_LSB 2 /*primary CH @ MSB, SD4: HAL_PRIME_CHNL_OFFSET_UPPER*/ -#define SECOND_CH_AT_USB 1 /*primary CH @ LSB, SD4: HAL_PRIME_CHNL_OFFSET_LOWER*/ +#define SECOND_CH_AT_LSB 2 /*@primary CH @ MSB, SD4: HAL_PRIME_CHNL_OFFSET_UPPER*/ +#define SECOND_CH_AT_USB 1 /*@primary CH @ LSB, SD4: HAL_PRIME_CHNL_OFFSET_LOWER*/ #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -#define SECOND_CH_AT_LSB 2 /*primary CH @ MSB, SD7: HAL_PRIME_CHNL_OFFSET_UPPER*/ -#define SECOND_CH_AT_USB 1 /*primary CH @ LSB, SD7: HAL_PRIME_CHNL_OFFSET_LOWER*/ +#define SECOND_CH_AT_LSB 2 /*@primary CH @ MSB, SD7: HAL_PRIME_CHNL_OFFSET_UPPER*/ +#define SECOND_CH_AT_USB 1 /*@primary CH @ LSB, SD7: HAL_PRIME_CHNL_OFFSET_LOWER*/ #else /*if (DM_ODM_SUPPORT_TYPE == ODM_AP)*/ -#define SECOND_CH_AT_LSB 1 /*primary CH @ MSB, SD8: HT_2NDCH_OFFSET_BELOW*/ -#define SECOND_CH_AT_USB 2 /*primary CH @ LSB, SD8: HT_2NDCH_OFFSET_ABOVE*/ +#define SECOND_CH_AT_LSB 1 /*@primary CH @ MSB, SD8: HT_2NDCH_OFFSET_BELOW*/ +#define SECOND_CH_AT_USB 2 /*@primary CH @ LSB, SD8: HT_2NDCH_OFFSET_ABOVE*/ #endif -#define OFDMCCA_TH 500 +#define OFDMCCA_TH 500 #define bw_ind_bias 500 #define PRI_CCA_MONITOR_TIME 30 -#ifdef PHYDM_PRIMARY_CCA - -/*============================================================*/ +/*@============================================================*/ /*structure and define*/ -/*============================================================*/ -enum primary_cca_ch_position { /*N-series REG0xc6c[8:7]*/ - MF_USC_LSC = 0, - MF_LSC = 1, - MF_USC = 2 +/*@============================================================*/ +enum primary_cca_ch_position { /*N-series REG0xc6c[8:7]*/ + MF_USC_LSC = 0, + MF_LSC = 1, + MF_USC = 2 }; struct phydm_pricca_struct { @@ -67,60 +66,22 @@ struct phydm_pricca_struct { u8 ch_offset; #endif u8 dup_rts_flag; - u8 cca_th_40m_bkp; /*c84[31:28]*/ + u8 cca_th_40m_bkp; /*@c84[31:28]*/ enum channel_width pre_bw; u8 pri_cca_is_become_linked; u8 mf_state; }; -/*============================================================*/ -/*function prototype*/ -/*============================================================*/ +/*@============================================================*/ +/*@function prototype*/ +/*@============================================================*/ +void phydm_write_dynamic_cca(void *dm_void, u8 curr_mf_state); -#if 0 -#if (RTL8192E_SUPPORT == 1) -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +boolean odm_dynamic_primary_cca_dup_rts(void *dm_void); -void -odm_dynamic_primary_cca_mp_8192e( - void *dm_void -); +void phydm_primary_cca_init(void *dm_void); -#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) +void phydm_primary_cca(void *dm_void); +#endif /*@#ifdef PHYDM_PRIMARY_CCA*/ +#endif /*@#ifndef __PHYDM_PRIMARYCCA_H__*/ -void -odm_dynamic_primary_cca_ap_8192e( - void *dm_void -); -#endif -#endif - -#if (RTL8188E_SUPPORT == 1) - -void -odm_dynamic_primary_cca_8188e( - void *dm_void -); -#endif -#endif - -#endif /*#ifdef PHYDM_PRIMARY_CCA*/ - - -boolean -odm_dynamic_primary_cca_dup_rts( - void *dm_void -); - -void -phydm_primary_cca_init( - void *dm_void -); - -void -phydm_primary_cca( - void *dm_void -); - - -#endif /*#ifndef __PHYDM_PRIMARYCCA_H__*/ diff --git a/hal/phydm/phydm_psd.c b/hal/phydm/phydm_psd.c index 8717aca..93560f9 100644 --- a/hal/phydm/phydm_psd.c +++ b/hal/phydm/phydm_psd.c @@ -23,236 +23,279 @@ * *****************************************************************************/ -//============================================================ -// include files -//============================================================ +/****************************************************************************** + * include files + *****************************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" #ifdef CONFIG_PSD_TOOL - -u32 -phydm_get_psd_data( - void *dm_void, - u32 psd_tone_idx, - u32 igi - ) +u32 phydm_get_psd_data(void *dm_void, u32 psd_tone_idx, u32 igi) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct psd_info *dm_psd_table = &dm->dm_psd_table; - u32 psd_report = 0; - - odm_set_bb_reg(dm, dm_psd_table->psd_reg, 0x3ff, psd_tone_idx); - - odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(22), 1); /*PSD trigger start*/ - ODM_delay_us(10); - odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(22), 0); /*PSD trigger stop*/ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct psd_info *dm_psd_table = &dm->dm_psd_table; + u32 psd_report = 0; - psd_report = odm_get_bb_reg(dm, dm_psd_table->psd_report_reg, 0xffff); - psd_report = odm_convert_to_db(psd_report) + igi; + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); + odm_set_bb_reg(dm, R_0x1e88, BIT(27) | BIT(26), + psd_tone_idx >> 10); + /*PSD trigger start*/ + odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(18), 1); + ODM_delay_us(10); + /*PSD trigger stop*/ + odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(18), 0); + } else if (dm->support_ic_type == ODM_RTL8721D) { + odm_set_bb_reg(dm, dm_psd_table->psd_reg, 0xfff, psd_tone_idx); + odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(28), 1); + /*PSD trigger start*/ + ODM_delay_us(10); + odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(28), 0); + /*PSD trigger stop*/ + } else { + odm_set_bb_reg(dm, dm_psd_table->psd_reg, 0x3ff, psd_tone_idx); + /*PSD trigger start*/ + odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(22), 1); + ODM_delay_us(10); + /*PSD trigger stop*/ + odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(22), 0); + } + + /*Get PSD Report*/ + if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8721D)) { + psd_report = odm_get_bb_reg(dm, dm_psd_table->psd_report_reg, + 0xffffff); + psd_report = psd_report >> 5; + } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + psd_report = odm_get_bb_reg(dm, dm_psd_table->psd_report_reg, + 0xffffff); + } else { + psd_report = odm_get_bb_reg(dm, dm_psd_table->psd_report_reg, + 0xffff); + } + psd_report = odm_convert_to_db((u64)psd_report) + igi; return psd_report; } -u8 psd_result_cali_tone_8821[7]= {21, 28, 33, 93, 98, 105, 127}; -u8 psd_result_cali_val_8821[7] = {67,69,71,72,71,69,67}; +u8 psd_result_cali_tone_8821[7] = {21, 28, 33, 93, 98, 105, 127}; +u8 psd_result_cali_val_8821[7] = {67, 69, 71, 72, 71, 69, 67}; -void -phydm_psd( - void *dm_void, - u32 igi, - u16 start_point, - u16 stop_point - ) +u8 phydm_psd(void *dm_void, u32 igi, u16 start_point, u16 stop_point) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct psd_info *dm_psd_table = &dm->dm_psd_table; - u32 i = 0, mod_tone_idx; - u32 t = 0; - u16 fft_max_half_bw; - u32 psd_igi_a_reg; - u32 psd_igi_b_reg; - u16 psd_fc_channel = dm_psd_table->psd_fc_channel; - u8 ag_rf_mode_reg = 0; - u8 rf_reg18_9_8 = 0; - u32 psd_result_tmp = 0; - u8 psd_result = 0; - u8 psd_result_cali_tone[7] = {0}; - u8 psd_result_cali_val[7] = {0}; - u8 noise_table_idx = 0; - u8 set_result; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct psd_info *dm_psd_table = &dm->dm_psd_table; + u32 i = 0, mod_tone_idx = 0; + u32 t = 0; + u16 fft_max_half_bw = 0; + u16 psd_fc_channel = dm_psd_table->psd_fc_channel; + u8 ag_rf_mode_reg = 0; + u8 is_5G = 0; + u32 psd_result_tmp = 0; + u8 psd_result = 0; + u8 psd_result_cali_tone[7] = {0}; + u8 psd_result_cali_val[7] = {0}; + u8 noise_idx = 0; + u8 set_result = 0; + u32 igi_tmp = 0x6e; if (dm->support_ic_type == ODM_RTL8821) { - odm_move_memory(dm, psd_result_cali_tone, psd_result_cali_tone_8821, 7); - odm_move_memory(dm, psd_result_cali_val, psd_result_cali_val_8821, 7); + odm_move_memory(dm, psd_result_cali_tone, + psd_result_cali_tone_8821, 7); + odm_move_memory(dm, psd_result_cali_val, + psd_result_cali_val_8821, 7); } - + dm_psd_table->psd_in_progress = 1; - /*[Stop DIG]*/ - dm->support_ability &= ~(ODM_BB_DIG); - dm->support_ability &= ~(ODM_BB_FA_CNT); - - - PHYDM_DBG(dm, ODM_COMP_API, "PSD Start =>\n"); - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - psd_igi_a_reg = 0xc50; - psd_igi_b_reg = 0xe50; - } else { - psd_igi_a_reg = 0xc50; - psd_igi_b_reg = 0xc58; - } - - /*[back up IGI]*/ - dm_psd_table->initial_gain_backup = odm_get_bb_reg(dm, psd_igi_a_reg, 0xff); - odm_set_bb_reg(dm, psd_igi_a_reg, 0xff, 0x6e); /*IGI target at 0dBm & make it can't CCA*/ - odm_set_bb_reg(dm, psd_igi_b_reg, 0xff, 0x6e); /*IGI target at 0dBm & make it can't CCA*/ - ODM_delay_us(10); - - if (phydm_stop_ic_trx(dm, PHYDM_SET) == PHYDM_SET_FAIL) { - PHYDM_DBG(dm, ODM_COMP_API, "STOP_TRX_FAIL\n"); - return; + /* @[Stop DIG]*/ + /* @IGI target at 0dBm & make it can't CCA*/ + if (phydm_pause_func(dm, F00_DIG, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_3, 1, + &igi_tmp) == PAUSE_FAIL) { + return PHYDM_SET_FAIL; } - /*[Set IGI]*/ - odm_set_bb_reg(dm, psd_igi_a_reg, 0xff, igi); - odm_set_bb_reg(dm, psd_igi_b_reg, 0xff, igi); - - /*[Backup RF Reg]*/ - dm_psd_table->rf_0x18_bkp = odm_get_rf_reg(dm, RF_PATH_A, 0x18, RFREGOFFSETMASK); - dm_psd_table->rf_0x18_bkp_b = odm_get_rf_reg(dm, RF_PATH_B, 0x18, RFREGOFFSETMASK); + ODM_delay_us(10); + + if (phydm_stop_ic_trx(dm, PHYDM_SET) == PHYDM_SET_FAIL) { + phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_3, + 1, &igi_tmp); + return PHYDM_SET_FAIL; + } + + /* @[Set IGI]*/ + phydm_write_dig_reg(dm, (u8)igi); + + /* @[Backup RF Reg]*/ + dm_psd_table->rf_0x18_bkp = odm_get_rf_reg(dm, RF_PATH_A, RF_0x18, + RFREG_MASK); + dm_psd_table->rf_0x18_bkp_b = odm_get_rf_reg(dm, RF_PATH_B, RF_0x18, + RFREG_MASK); if (psd_fc_channel > 14) { - - rf_reg18_9_8 = 1; - - if (36 <= psd_fc_channel && psd_fc_channel <= 64) - ag_rf_mode_reg = 0x1; - else if (100 <= psd_fc_channel && psd_fc_channel <= 140) - ag_rf_mode_reg = 0x3; - else if (140 < psd_fc_channel) - ag_rf_mode_reg = 0x5; + is_5G = 1; + if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F | + ODM_RTL8197G)) { + if (psd_fc_channel < 80) + ag_rf_mode_reg = 0x1; + else if (psd_fc_channel >= 80 && psd_fc_channel <= 140) + ag_rf_mode_reg = 0x3; + else if (psd_fc_channel > 140) + ag_rf_mode_reg = 0x5; + } else if (dm->support_ic_type == ODM_RTL8721D) { + if (psd_fc_channel >= 36 && psd_fc_channel <= 64) + ag_rf_mode_reg = 0x1; + else if (psd_fc_channel >= 100 && psd_fc_channel <= 140) + ag_rf_mode_reg = 0x5; + else if (psd_fc_channel > 140) + ag_rf_mode_reg = 0x9; + } else { + if (psd_fc_channel >= 36 && psd_fc_channel <= 64) + ag_rf_mode_reg = 0x1; + else if (psd_fc_channel >= 100 && psd_fc_channel <= 140) + ag_rf_mode_reg = 0x3; + else if (psd_fc_channel > 140) + ag_rf_mode_reg = 0x5; + } } - /* RF path-a */ - odm_set_rf_reg(dm, RF_PATH_A, 0x18, 0xff, psd_fc_channel); /* Set RF fc*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x18, 0x300, rf_reg18_9_8); - odm_set_rf_reg(dm, RF_PATH_A, 0x18, 0xc00, dm_psd_table->psd_bw_rf_reg); /*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ - odm_set_rf_reg(dm, RF_PATH_A, 0x18, 0xf0000, ag_rf_mode_reg); /* Set RF ag fc mode*/ + /* Set RF fc*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0xff, psd_fc_channel); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0xff, psd_fc_channel); + odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x300, is_5G); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0x300, is_5G); + if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F | + ODM_RTL8197G)) { + /* @2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x3000, + dm_psd_table->psd_bw_rf_reg); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0x3000, + dm_psd_table->psd_bw_rf_reg); + /* Set RF ag fc mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x70000, + ag_rf_mode_reg); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0x70000, + ag_rf_mode_reg); + } else { + /* @2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ + if (dm->support_ic_type == ODM_RTL8721D) { + odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x1c00, + dm_psd_table->psd_bw_rf_reg); + } else { + odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0xc00, + dm_psd_table->psd_bw_rf_reg); + } + odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0xc00, + dm_psd_table->psd_bw_rf_reg); + /* Set RF ag fc mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0xf0000, + ag_rf_mode_reg); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0xf0000, + ag_rf_mode_reg); + } + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + PHYDM_DBG(dm, ODM_COMP_API, "0x1d70=((0x%x))\n", + odm_get_bb_reg(dm, R_0x1d70, MASKDWORD)); + else + PHYDM_DBG(dm, ODM_COMP_API, "0xc50=((0x%x))\n", + odm_get_bb_reg(dm, R_0xc50, MASKDWORD)); - /* RF path-b */ - odm_set_rf_reg(dm, RF_PATH_B, 0x18, 0xff, psd_fc_channel); /* Set RF fc*/ - odm_set_rf_reg(dm, RF_PATH_B, 0x18, 0x300, rf_reg18_9_8); - odm_set_rf_reg(dm, RF_PATH_B, 0x18, 0xc00, dm_psd_table->psd_bw_rf_reg); /*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ - odm_set_rf_reg(dm, RF_PATH_B, 0x18, 0xf0000, ag_rf_mode_reg); /* Set RF ag fc mode*/ + PHYDM_DBG(dm, ODM_COMP_API, "RF0x18=((0x%x))\n", + odm_get_rf_reg(dm, RF_PATH_A, RF_0x18, RFREG_MASK)); - PHYDM_DBG(dm, ODM_COMP_API, "0xc50=((0x%x))\n", odm_get_bb_reg(dm, 0xc50, MASKDWORD)); - /*PHYDM_DBG(dm, ODM_COMP_API, "RF0x0=((0x%x))\n", odm_get_rf_reg(dm, RF_PATH_A, 0x0, RFREGOFFSETMASK));*/ - PHYDM_DBG(dm, ODM_COMP_API, "RF0x18=((0x%x))\n", odm_get_rf_reg(dm, RF_PATH_A, 0x18, RFREGOFFSETMASK)); - - /*[Stop 3-wires]*/ + /* @[Stop 3-wires]*/ phydm_stop_3_wire(dm, PHYDM_SET); - + ODM_delay_us(10); - if (stop_point > (dm_psd_table->fft_smp_point-1)) - stop_point = (dm_psd_table->fft_smp_point-1); + if (stop_point > (dm_psd_table->fft_smp_point - 1)) + stop_point = (dm_psd_table->fft_smp_point - 1); - if (start_point > (dm_psd_table->fft_smp_point-1)) - start_point = (dm_psd_table->fft_smp_point-1); + if (start_point > (dm_psd_table->fft_smp_point - 1)) + start_point = (dm_psd_table->fft_smp_point - 1); if (start_point > stop_point) stop_point = start_point; + for (i = start_point; i <= stop_point; i++) { + fft_max_half_bw = (dm_psd_table->fft_smp_point) >> 1; - for (i = start_point; i <= stop_point; i++ ) { - fft_max_half_bw = (dm_psd_table->fft_smp_point)>>1; - - if (i < fft_max_half_bw) { + if (i < fft_max_half_bw) mod_tone_idx = i + fft_max_half_bw; - } else { + else mod_tone_idx = i - fft_max_half_bw; - } - + psd_result_tmp = 0; - for (t = 0; t < dm_psd_table->sw_avg_time; t++) { - psd_result_tmp += phydm_get_psd_data(dm, mod_tone_idx, igi); - /**/ - } - psd_result = (u8)((psd_result_tmp/dm_psd_table->sw_avg_time)) - dm_psd_table->psd_pwr_common_offset; + for (t = 0; t < dm_psd_table->sw_avg_time; t++) + psd_result_tmp += phydm_get_psd_data(dm, mod_tone_idx, + igi); + psd_result = + (u8)((psd_result_tmp / dm_psd_table->sw_avg_time)) - + dm_psd_table->psd_pwr_common_offset; - if( dm_psd_table->fft_smp_point == 128 && (dm_psd_table->noise_k_en)) { - if (i > psd_result_cali_tone[noise_table_idx]) { - noise_table_idx ++; - } + if (dm_psd_table->fft_smp_point == 128 && + dm_psd_table->noise_k_en) { + if (i > psd_result_cali_tone[noise_idx]) + noise_idx++; - if (noise_table_idx > 6) - noise_table_idx = 6; + if (noise_idx > 6) + noise_idx = 6; - if (psd_result >= psd_result_cali_val[noise_table_idx]) - psd_result = psd_result - psd_result_cali_val[noise_table_idx]; + if (psd_result >= psd_result_cali_val[noise_idx]) + psd_result = psd_result - + psd_result_cali_val[noise_idx]; else psd_result = 0; - dm_psd_table->psd_result[i] = psd_result; } - - PHYDM_DBG(dm, ODM_COMP_API, "[%d] N_cali = %d, PSD = %d\n", mod_tone_idx, psd_result_cali_val[noise_table_idx], psd_result); + PHYDM_DBG(dm, ODM_COMP_API, "[%d] N_cali = %d, PSD = %d\n", + mod_tone_idx, psd_result_cali_val[noise_idx], + psd_result); } - /*[Start 3-wires]*/ + /*@[Start 3-wires]*/ phydm_stop_3_wire(dm, PHYDM_REVERT); - + ODM_delay_us(10); - /*[Revert Reg]*/ + /*@[Revert Reg]*/ set_result = phydm_stop_ic_trx(dm, PHYDM_REVERT); - - odm_set_bb_reg(dm, psd_igi_a_reg, 0xff, dm_psd_table->initial_gain_backup); - odm_set_bb_reg(dm, psd_igi_b_reg, 0xff, dm_psd_table->initial_gain_backup); - - odm_set_rf_reg(dm, RF_PATH_A, 0x18, RFREGOFFSETMASK, dm_psd_table->rf_0x18_bkp); - odm_set_rf_reg(dm, RF_PATH_B, 0x18, RFREGOFFSETMASK, dm_psd_table->rf_0x18_bkp_b); - - PHYDM_DBG(dm, ODM_COMP_API, "PSD finished\n\n"); - - dm->support_ability |= ODM_BB_DIG; - dm->support_ability |= ODM_BB_FA_CNT; - dm_psd_table->psd_in_progress = 0; - + odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, RFREG_MASK, + dm_psd_table->rf_0x18_bkp); + odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, RFREG_MASK, + dm_psd_table->rf_0x18_bkp_b); + + PHYDM_DBG(dm, ODM_COMP_API, "PSD finished\n\n"); + + phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_3, 1, + &igi_tmp); + dm_psd_table->psd_in_progress = 0; + + return PHYDM_SET_SUCCESS; } -void -phydm_psd_para_setting( - void *dm_void, - u8 sw_avg_time, - u8 hw_avg_time, - u8 i_q_setting, - u16 fft_smp_point, - u8 ant_sel, - u8 psd_input, - u8 channel, - u8 noise_k_en - ) +void phydm_psd_para_setting(void *dm_void, u8 sw_avg_time, u8 hw_avg_time, + u8 i_q_setting, u16 fft_smp_point, u8 ant_sel, + u8 psd_input, u8 channel, u8 noise_k_en) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct psd_info *dm_psd_table = &dm->dm_psd_table; - u8 fft_smp_point_idx = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct psd_info *dm_psd_table = &dm->dm_psd_table; + u8 fft_smp_point_idx = 0; dm_psd_table->fft_smp_point = fft_smp_point; if (sw_avg_time == 0) sw_avg_time = 1; - + dm_psd_table->sw_avg_time = sw_avg_time; dm_psd_table->psd_fc_channel = channel; dm_psd_table->noise_k_en = noise_k_en; - + if (fft_smp_point == 128) fft_smp_point_idx = 0; else if (fft_smp_point == 256) @@ -261,90 +304,105 @@ phydm_psd_para_setting( fft_smp_point_idx = 2; else if (fft_smp_point == 1024) fft_smp_point_idx = 3; - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - - odm_set_bb_reg(dm, 0x910, BIT(11) | BIT(10), i_q_setting); - odm_set_bb_reg(dm, 0x910, BIT(13) | BIT(12), hw_avg_time); - odm_set_bb_reg(dm, 0x910, BIT(15) | BIT(14), fft_smp_point_idx); - odm_set_bb_reg(dm, 0x910, BIT(17) | BIT(16), ant_sel); - odm_set_bb_reg(dm, 0x910, BIT(23), psd_input); + + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); + odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); + + if (fft_smp_point == 4096) { + odm_set_bb_reg(dm, R_0x1e88, BIT(31) | BIT(30), 0x2); + } else if (fft_smp_point == 2048) { + odm_set_bb_reg(dm, R_0x1e88, BIT(31) | BIT(30), 0x1); + } else { + odm_set_bb_reg(dm, R_0x1e88, BIT(31) | BIT(30), 0x0); + odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), + fft_smp_point_idx); + } + odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); + odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + odm_set_bb_reg(dm, R_0x910, BIT(11) | BIT(10), i_q_setting); + odm_set_bb_reg(dm, R_0x910, BIT(13) | BIT(12), hw_avg_time); + odm_set_bb_reg(dm, R_0x910, BIT(15) | BIT(14), + fft_smp_point_idx); + odm_set_bb_reg(dm, R_0x910, BIT(17) | BIT(16), ant_sel); + odm_set_bb_reg(dm, R_0x910, BIT(23), psd_input); + } else if (dm->support_ic_type == ODM_RTL8721D) { + odm_set_bb_reg(dm, 0x808, BIT(19) | BIT(18), i_q_setting); + odm_set_bb_reg(dm, 0x808, BIT(21) | BIT(20), hw_avg_time); + odm_set_bb_reg(dm, 0x808, BIT(23) | BIT(22), fft_smp_point_idx); + odm_set_bb_reg(dm, 0x804, BIT(5) | BIT(4), ant_sel); + odm_set_bb_reg(dm, 0x80C, BIT(23), psd_input); + #if 0 } else { /*ODM_IC_11N_SERIES*/ #endif } - - /*bw = (*dm->band_width); //ODM_BW20M */ - /*channel = *(dm->channel);*/ - - - - + /*@bw = (*dm->band_width); //ODM_BW20M */ + /*@channel = *(dm->channel);*/ } -void -phydm_psd_init( - void *dm_void - ) +void phydm_psd_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct psd_info *dm_psd_table = &dm->dm_psd_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct psd_info *dm_psd_table = &dm->dm_psd_table; PHYDM_DBG(dm, ODM_COMP_API, "PSD para init\n"); dm_psd_table->psd_in_progress = false; - - if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - - dm_psd_table->psd_reg = 0x910; - dm_psd_table->psd_report_reg = 0xF44; + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { + dm_psd_table->psd_reg = R_0x1e8c; + dm_psd_table->psd_report_reg = R_0x2d90; + + /*@2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ + dm_psd_table->psd_bw_rf_reg = 1; + } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { + dm_psd_table->psd_reg = R_0x910; + dm_psd_table->psd_report_reg = R_0xf44; + + /*@2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ if (ODM_IC_11AC_2_SERIES) - dm_psd_table->psd_bw_rf_reg = 1; /*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ + dm_psd_table->psd_bw_rf_reg = 1; else - dm_psd_table->psd_bw_rf_reg = 2; /*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ - + dm_psd_table->psd_bw_rf_reg = 2; } else { - dm_psd_table->psd_reg = 0x808; - dm_psd_table->psd_report_reg = 0x8B4; - dm_psd_table->psd_bw_rf_reg = 2; /*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ + dm_psd_table->psd_reg = R_0x808; + dm_psd_table->psd_report_reg = R_0x8b4; + /*@2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ + dm_psd_table->psd_bw_rf_reg = 2; } - if (dm->support_ic_type == ODM_RTL8812) - dm_psd_table->psd_pwr_common_offset = 0; - else if (dm->support_ic_type == ODM_RTL8821) - dm_psd_table->psd_pwr_common_offset = 0; - else - dm_psd_table->psd_pwr_common_offset = 0; + dm_psd_table->psd_pwr_common_offset = 0; phydm_psd_para_setting(dm, 1, 2, 3, 128, 0, 0, 7, 0); - /*phydm_psd(dm, 0x3c, 0, 127);*/ /* target at -50dBm */ - - +#if 0 + /*phydm_psd(dm, 0x3c, 0, 127);*/ /* target at -50dBm */ +#endif } -void -phydm_psd_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +void phydm_psd_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - char help[] = "-h"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + char help[] = "-h"; + u32 var1[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + u8 i = 0; if ((strcmp(input[1], help) == 0)) { + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + if (dm->support_ic_type & ODM_IC_JGR3_SERIES) + PDM_SNPF(out_len, used, output + used, out_len - used, + "{0} {sw_avg} {hw_avg 0:3} {1:I,2:Q,3:IQ} {fft_point: 128*(1:4) 2048 4096}\n{path_sel 0~3} {0:ADC, 1:rxdata_fir_in, 2:rx_nbi_nf_stage2} {CH} {noise_k}\n\n"); + else + #endif + PDM_SNPF(out_len, used, output + used, out_len - used, + "{0} {sw_avg} {hw_avg 0:3} {1:I,2:Q,3:IQ} {fft_point: 128*(1:4)} {path_sel 0~3} {0:ADC, 1:RXIQC} {CH} {noise_k}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, - "{0} {sw_avg} {hw_avg 0:3} {1:I,2:Q,3:IQ} {fft_point: 128*(1:4)} {path_sel 0~3} {0:ADC, 1:RXIQC} {CH} {noise_k}\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "{1} {IGI(hex)} {start_point} {stop_point}\n"); + "{1} {IGI(hex)} {start_point} {stop_point}\n"); goto out; } @@ -352,51 +410,49 @@ phydm_psd_debug( if (var1[0] == 0) { for (i = 1; i < 10; i++) { - if (input[i + 1]) { - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); - } + if (input[i + 1]) + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, + &var1[i]); } - PDM_SNPF(out_len, used, output + used, out_len - used, - "sw_avg_time=((%d)), hw_avg_time=((%d)), IQ=((%d)), fft=((%d)), path=((%d)), input =((%d)) ch=((%d)), noise_k=((%d))\n", - - var1[1], var1[2], var1[3], var1[4], var1[5], var1[6], (u8)var1[7], (u8)var1[8]); - phydm_psd_para_setting(dm, (u8)var1[1], (u8)var1[2], (u8)var1[3], (u16)var1[4], (u8)var1[5], (u8)var1[6], (u8)var1[7], (u8)var1[8]); + "sw_avg_time=((%d)), hw_avg_time=((%d)), IQ=((%d)), fft=((%d)), path=((%d)), input =((%d)) ch=((%d)), noise_k=((%d))\n", + var1[1], var1[2], var1[3], var1[4], var1[5], + var1[6], (u8)var1[7], (u8)var1[8]); + phydm_psd_para_setting(dm, (u8)var1[1], (u8)var1[2], + (u8)var1[3], (u16)var1[4], + (u8)var1[5], (u8)var1[6], + (u8)var1[7], (u8)var1[8]); } else if (var1[0] == 1) { PHYDM_SSCANF(input[2], DCMD_HEX, &var1[1]); PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]); PHYDM_SSCANF(input[4], DCMD_DECIMAL, &var1[3]); PDM_SNPF(out_len, used, output + used, out_len - used, - "IGI=((0x%x)), start_point=((%d)), stop_point=((%d))\n", - var1[1], var1[2], var1[3]); + "IGI=((0x%x)), start_point=((%d)), stop_point=((%d))\n", + var1[1], var1[2], var1[3]); dm->debug_components |= ODM_COMP_API; - phydm_psd(dm, var1[1], (u16)var1[2], (u16)var1[3]); - dm->debug_components &= (~ODM_COMP_API); + if (phydm_psd(dm, var1[1], (u16)var1[2], (u16)var1[3]) == + PHYDM_SET_FAIL) + PDM_SNPF(out_len, used, output + used, out_len - used, + "PSD_SET_FAIL\n"); + dm->debug_components &= ~(ODM_COMP_API); } out: *_used = used; *_out_len = out_len; - } -u8 -phydm_get_psd_result_table( - void *dm_void, - int index - ) +u8 phydm_get_psd_result_table(void *dm_void, int index) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct psd_info *dm_psd_table = &dm->dm_psd_table; - u8 temp_result = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct psd_info *dm_psd_table = &dm->dm_psd_table; + u8 result = 0; - if(index<128) - temp_result = dm_psd_table->psd_result[index]; + if (index < 128) + result = dm_psd_table->psd_result[index]; - return temp_result; - + return result; } #endif - diff --git a/hal/phydm/phydm_psd.h b/hal/phydm/phydm_psd.h index df23278..635a887 100644 --- a/hal/phydm/phydm_psd.h +++ b/hal/phydm/phydm_psd.h @@ -23,11 +23,11 @@ * *****************************************************************************/ -#ifndef __PHYDMPSD_H__ -#define __PHYDMPSD_H__ +#ifndef __PHYDMPSD_H__ +#define __PHYDMPSD_H__ -/*#define PSD_VERSION "1.0"*/ /*2016.09.22 Dino*/ -#define PSD_VERSION "1.1" /*2016.10.07 Dino, Add Option for PSD Tone index Selection */ +/*@#define PSD_VERSION "1.0"*/ /*@2016.09.22 Dino*/ +#define PSD_VERSION "1.1" /*@2016.10.07 Dino, Add Option for PSD Tone index Selection */ #ifdef CONFIG_PSD_TOOL @@ -39,7 +39,6 @@ struct psd_info { u8 psd_pwr_common_offset; u16 sw_avg_time; u16 fft_smp_point; - u32 initial_gain_backup; u32 rf_0x18_bkp; u32 rf_0x18_bkp_b; u16 psd_fc_channel; @@ -48,55 +47,20 @@ struct psd_info { u8 noise_k_en; }; -u32 -phydm_get_psd_data( - void *dm_void, - u32 psd_tone_idx, - u32 igi -); +u32 phydm_get_psd_data(void *dm_void, u32 psd_tone_idx, u32 igi); -void -phydm_psd_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); +void phydm_psd_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); -void -phydm_psd( - void *dm_void, - u32 igi, - u16 start_point, - u16 stop_point -); +u8 phydm_psd(void *dm_void, u32 igi, u16 start_point, u16 stop_point); -void -phydm_psd_para_setting( - void *dm_void, - u8 sw_avg_time, - u8 hw_avg_time, - u8 i_q_setting, - u16 fft_smp_point, - u8 ant_sel, - u8 psd_input, - u8 channel, - u8 noise_k_en -); +void phydm_psd_para_setting(void *dm_void, u8 sw_avg_time, u8 hw_avg_time, + u8 i_q_setting, u16 fft_smp_point, u8 ant_sel, + u8 psd_input, u8 channel, u8 noise_k_en); -void -phydm_psd_init( - void *dm_void -); +void phydm_psd_init(void *dm_void); -u8 -phydm_get_psd_result_table( - void *dm_void, - int index -); +u8 phydm_get_psd_result_table(void *dm_void, int index); #endif #endif - diff --git a/hal/phydm/phydm_rainfo.c b/hal/phydm/phydm_rainfo.c index 73af1a2..818e3f0 100644 --- a/hal/phydm/phydm_rainfo.c +++ b/hal/phydm/phydm_rainfo.c @@ -23,382 +23,448 @@ * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" -void -phydm_h2C_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -) +boolean phydm_is_vht_rate(void *dm_void, u8 rate) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 h2c_parameter[H2C_MAX_LENGTH] = {0}; - u8 phydm_h2c_id = (u8)dm_value[0]; - u8 i; - u32 used = *_used; - u32 out_len = *_out_len; + return ((rate & 0x7f) >= ODM_RATEVHTSS1MCS0) ? true : false; +} + +boolean phydm_is_ht_rate(void *dm_void, u8 rate) +{ + return (((rate & 0x7f) >= ODM_RATEMCS0) && + ((rate & 0x7f) <= ODM_RATEMCS31)) ? true : false; +} + +boolean phydm_is_ofdm_rate(void *dm_void, u8 rate) +{ + return (((rate & 0x7f) >= ODM_RATE6M) && + ((rate & 0x7f) <= ODM_RATE54M)) ? true : false; +} + +boolean phydm_is_cck_rate(void *dm_void, u8 rate) +{ + return ((rate & 0x7f) <= ODM_RATE11M) ? true : false; +} + +u8 phydm_rate_2_rate_digit(void *dm_void, u8 rate) +{ + u8 legacy_table[12] = {1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54}; + u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/ + u8 rate_digit = 0; + + if (rate_idx >= ODM_RATEVHTSS1MCS0) + rate_digit = (rate_idx - ODM_RATEVHTSS1MCS0) % 10; + else if (rate_idx >= ODM_RATEMCS0) + rate_digit = (rate_idx - ODM_RATEMCS0); + else if (rate_idx <= ODM_RATE54M) + rate_digit = legacy_table[rate_idx]; + + return rate_digit; +} + +u8 phydm_rate_type_2_num_ss(void *dm_void, enum PDM_RATE_TYPE type) +{ + u8 num_ss = 1; + + switch (type) { + case PDM_CCK: + case PDM_OFDM: + case PDM_1SS: + num_ss = 1; + break; + case PDM_2SS: + num_ss = 2; + break; + case PDM_3SS: + num_ss = 3; + break; + case PDM_4SS: + num_ss = 4; + break; + default: + break; + } + + return num_ss; +} + +u8 phydm_rate_to_num_ss(void *dm_void, u8 data_rate) +{ + u8 num_ss = 1; + + if (data_rate <= ODM_RATE54M) + num_ss = 1; + else if (data_rate <= ODM_RATEMCS31) + num_ss = ((data_rate - ODM_RATEMCS0) >> 3) + 1; + else if (data_rate <= ODM_RATEVHTSS1MCS9) + num_ss = 1; + else if (data_rate <= ODM_RATEVHTSS2MCS9) + num_ss = 2; + else if (data_rate <= ODM_RATEVHTSS3MCS9) + num_ss = 3; + else if (data_rate <= ODM_RATEVHTSS4MCS9) + num_ss = 4; + + return num_ss; +} + +void phydm_h2C_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 used = *_used; + u32 out_len = *_out_len; + u32 dm_value[10] = {0}; + u8 i = 0, input_idx = 0; + u8 h2c_parameter[H2C_MAX_LENGTH] = {0}; + u8 phydm_h2c_id = 0; + + for (i = 0; i < 8; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]); + input_idx++; + } + } + + if (input_idx == 0) + return; + + phydm_h2c_id = (u8)dm_value[0]; PDM_SNPF(out_len, used, output + used, out_len - used, - "Phydm Send H2C_ID (( 0x%x))\n", phydm_h2c_id); + "Phydm Send H2C_ID (( 0x%x))\n", phydm_h2c_id); + for (i = 0; i < H2C_MAX_LENGTH; i++) { h2c_parameter[i] = (u8)dm_value[i + 1]; PDM_SNPF(out_len, used, output + used, out_len - used, - "H2C: Byte[%d] = ((0x%x))\n", i, - h2c_parameter[i]); + "H2C: Byte[%d] = ((0x%x))\n", i, h2c_parameter[i]); } odm_fill_h2c_cmd(dm, phydm_h2c_id, H2C_MAX_LENGTH, h2c_parameter); - + *_used = used; *_out_len = out_len; } -void -phydm_fw_fix_rate( - void *dm_void, - u8 en, - u8 macid, - u8 bw, - u8 rate - -) +void phydm_fw_fix_rate(void *dm_void, u8 en, u8 macid, u8 bw, u8 rate) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 reg_u32_tmp; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 reg_u32_tmp; if (dm->support_ic_type & PHYDM_IC_8051_SERIES) { - reg_u32_tmp = (bw << 24) | (rate << 16) | (macid << 8) | en; - odm_set_bb_reg(dm, 0x4a0, MASKDWORD, reg_u32_tmp); - + odm_set_bb_reg(dm, R_0x4a0, MASKDWORD, reg_u32_tmp); + } else { - if (en == 1) - reg_u32_tmp = (0x60 << 24) | (macid << 16) | (bw << 8) | rate; + reg_u32_tmp = BYTE_2_DWORD(0x60, macid, bw, rate); else reg_u32_tmp = 0x40000000; - - odm_set_bb_reg(dm, 0x450, MASKDWORD, reg_u32_tmp); + if (dm->support_ic_type & ODM_RTL8814B) + odm_set_bb_reg(dm, R_0x448, MASKDWORD, reg_u32_tmp); + else + odm_set_bb_reg(dm, R_0x450, MASKDWORD, reg_u32_tmp); } if (en == 1) { - PHYDM_DBG(dm, ODM_COMP_API, "FW fix TX rate[id =%d], %dM, Rate(%d)=", macid, (20 << bw), rate); + PHYDM_DBG(dm, ODM_COMP_API, + "FW fix TX rate[id =%d], %dM, Rate(%d)=", macid, + (20 << bw), rate); phydm_print_rate(dm, rate, ODM_COMP_API); } else { PHYDM_DBG(dm, ODM_COMP_API, "Auto Rate\n"); } } -void -phydm_ra_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_ra_debug(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_tab = &dm->dm_ra_table; u32 used = *_used; u32 out_len = *_out_len; - char help[] = "-h"; - u32 var1[5] = {0}; - u8 i = 0; - u32 reg_u32_tmp; + char help[] = "-h"; + u32 var[5] = {0}; + u8 macid = 0, bw = 0, rate = 0; + u8 i = 0; for (i = 0; i < 5; i++) { if (input[i + 1]) - PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var[i]); } - + if ((strcmp(input[1], help) == 0)) { PDM_SNPF(out_len, used, output + used, out_len - used, - "{1} {0:-,1:+} {ofst}: set offset\n"); + "{1} {0:-,1:+} {ofst}: set offset\n"); PDM_SNPF(out_len, used, output + used, out_len - used, - "{1} {100}: show offset\n"); + "{1} {100}: show offset\n"); PDM_SNPF(out_len, used, output + used, out_len - used, - "{2} {en} {macid} {bw} {rate}: fw fix rate\n"); - - } else if (var1[0] == 1) { /*Adjust PCR offset*/ + "{2} {en} {macid} {bw} {rate}: fw fix rate\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "{3} {en}: Dynamic RRSR\n"); - if (var1[1] == 100) { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[Get] RA_ofst=((%s%d))\n", - ((ra_tab->RA_threshold_offset == 0) ? " " : ((ra_tab->RA_offset_direction) ? "+" : "-")), - ra_tab->RA_threshold_offset); + } else if (var[0] == 1) { /*@Adjust PCR offset*/ - } else if (var1[1] == 0) { - ra_tab->RA_offset_direction = 0; - ra_tab->RA_threshold_offset = (u8)var1[2]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[Set] RA_ofst=((-%d))\n", - ra_tab->RA_threshold_offset); - } else if (var1[1] == 1) { - ra_tab->RA_offset_direction = 1; - ra_tab->RA_threshold_offset = (u8)var1[2]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[Set] RA_ofst=((+%d))\n", - ra_tab->RA_threshold_offset); + if (var[1] == 100) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Get] RA_ofst=((%s%d))\n", + ((ra_tab->ra_ofst_direc) ? "+" : "-"), + ra_tab->ra_th_ofst); + + } else if (var[1] == 0) { + ra_tab->ra_ofst_direc = 0; + ra_tab->ra_th_ofst = (u8)var[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Set] RA_ofst=((-%d))\n", ra_tab->ra_th_ofst); + } else if (var[1] == 1) { + ra_tab->ra_ofst_direc = 1; + ra_tab->ra_th_ofst = (u8)var[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Set] RA_ofst=((+%d))\n", ra_tab->ra_th_ofst); } - - } else if (var1[0] == 2) { /*FW fix rate*/ - PDM_SNPF(out_len, used, output + used, out_len - used, - "[FW fix TX Rate] {en, macid,bw,rate}={%d, %d, %d, 0x%x}", - var1[1], var1[2], var1[3], var1[4]); - - phydm_fw_fix_rate(dm, (u8)var1[1], (u8)var1[2], (u8)var1[3], (u8)var1[4]); - + } else if (var[0] == 2) { /*@FW fix rate*/ + macid = (u8)var[2]; + bw = (u8)var[3]; + rate = (u8)var[4]; + + PDM_SNPF(out_len, used, output + used, out_len - used, + "[FW fix TX Rate] {en, macid,bw,rate}={%d, %d, %d, 0x%x}", + var[1], macid, bw, rate); + + phydm_fw_fix_rate(dm, (u8)var[1], macid, bw, rate); + } else if (var[0] == 3) { /*@FW fix rate*/ + ra_tab->dynamic_rrsr_en = (boolean)var[1]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "[Dynamic RRSR] enable=%d", ra_tab->dynamic_rrsr_en); } else { PDM_SNPF(out_len, used, output + used, out_len - used, - "[Set] Error\n"); - /**/ + "[Set] Error\n"); } *_used = used; *_out_len = out_len; } - - -void -odm_c2h_ra_para_report_handler( - void *dm_void, - u8 *cmd_buf, - u8 cmd_len -) +void odm_c2h_ra_para_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; -#if (defined(CONFIG_RA_DBG_CMD)) - struct ra_table *ra_tab = &dm->dm_ra_table; -#endif + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 mode = cmd_buf[0]; /*Retry Penalty, NH, NL*/ + u8 i; - u8 para_idx = cmd_buf[0]; /*Retry Penalty, NH, NL*/ -#if (defined(CONFIG_RA_DBG_CMD)) - u8 rate_type_start = cmd_buf[1]; - u8 rate_type_length = cmd_len - 2; -#endif - u8 i; + PHYDM_DBG(dm, DBG_FW_TRACE, "[%s] [mode: %d]----------------------->\n", + __func__, mode); - - PHYDM_DBG(dm, DBG_RA, "[ From FW C2H RA Para ] cmd_buf[0]= (( %d ))\n", cmd_buf[0]); - -#if (defined(CONFIG_RA_DBG_CMD)) - if (para_idx == RADBG_RTY_PENALTY) { - PHYDM_DBG(dm, DBG_RA, " |rate index| |RTY Penality index|\n"); - - for (i = 0 ; i < (rate_type_length) ; i++) { - if (ra_tab->is_ra_dbg_init) - ra_tab->RTY_P_default[rate_type_start + i] = cmd_buf[2 + i]; - - ra_tab->RTY_P[rate_type_start + i] = cmd_buf[2 + i]; - PHYDM_DBG(dm, DBG_RA, "%8d %15d\n", (rate_type_start + i), ra_tab->RTY_P[rate_type_start + i]); + if (mode == RADBG_DEBUG_MONITOR1) { + if (dm->support_ic_type & PHYDM_IC_3081_SERIES) { + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "RSSI =", + cmd_buf[1]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "rate =", + cmd_buf[2] & 0x7f); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "SGI =", + (cmd_buf[2] & 0x80) >> 7); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "BW =", + cmd_buf[3]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "BW_max =", + cmd_buf[4]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", + "multi_rate0 =", cmd_buf[5]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", + "multi_rate1 =", cmd_buf[6]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "DISRA =", + cmd_buf[7]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "VHT_EN =", + cmd_buf[8]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", + "SGI_support =", cmd_buf[9]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "try_ness =", + cmd_buf[10]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "pre_rate =", + cmd_buf[11]); + } else { + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "RSSI =", + cmd_buf[1]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %x\n", "BW =", + cmd_buf[2]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "DISRA =", + cmd_buf[3]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "VHT_EN =", + cmd_buf[4]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", + "Hightest rate =", cmd_buf[5]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", + "Lowest rate =", cmd_buf[6]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", + "SGI_support =", cmd_buf[7]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "Rate_ID =", + cmd_buf[8]); } + } else if (mode == RADBG_DEBUG_MONITOR2) { + if (dm->support_ic_type & PHYDM_IC_3081_SERIES) { + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "rate_id =", + cmd_buf[1]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", + "highest_rate =", cmd_buf[2]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", + "lowest_rate =", cmd_buf[3]); - } else if (para_idx == RADBG_N_HIGH) { - /**/ - PHYDM_DBG(dm, DBG_RA, " |rate index| |N-High|\n"); - - - } else if (para_idx == RADBG_N_LOW) { - PHYDM_DBG(dm, DBG_RA, " |rate index| |N-Low|\n"); - /**/ - } else if (para_idx == RADBG_RATE_UP_RTY_RATIO) { - PHYDM_DBG(dm, DBG_RA, " |rate index| |rate Up RTY Ratio|\n"); - - for (i = 0; i < (rate_type_length); i++) { - if (ra_tab->is_ra_dbg_init) - ra_tab->RATE_UP_RTY_RATIO_default[rate_type_start + i] = cmd_buf[2 + i]; - - ra_tab->RATE_UP_RTY_RATIO[rate_type_start + i] = cmd_buf[2 + i]; - PHYDM_DBG(dm, DBG_RA, "%8d %15d\n", (rate_type_start + i), ra_tab->RATE_UP_RTY_RATIO[rate_type_start + i]); - } - } else if (para_idx == RADBG_RATE_DOWN_RTY_RATIO) { - PHYDM_DBG(dm, DBG_RA, " |rate index| |rate Down RTY Ratio|\n"); - - for (i = 0; i < (rate_type_length); i++) { - if (ra_tab->is_ra_dbg_init) - ra_tab->RATE_DOWN_RTY_RATIO_default[rate_type_start + i] = cmd_buf[2 + i]; - - ra_tab->RATE_DOWN_RTY_RATIO[rate_type_start + i] = cmd_buf[2 + i]; - PHYDM_DBG(dm, DBG_RA, "%8d %15d\n", (rate_type_start + i), ra_tab->RATE_DOWN_RTY_RATIO[rate_type_start + i]); - } - } else -#endif - if (para_idx == RADBG_DEBUG_MONITOR1) { - PHYDM_DBG(dm, DBG_FW_TRACE, "-------------------------------\n"); - if (dm->support_ic_type & PHYDM_IC_3081_SERIES) { - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "RSSI =", cmd_buf[1]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "rate =", cmd_buf[2] & 0x7f); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "SGI =", (cmd_buf[2] & 0x80) >> 7); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "BW =", cmd_buf[3]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "BW_max =", cmd_buf[4]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "multi_rate0 =", cmd_buf[5]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "multi_rate1 =", cmd_buf[6]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "DISRA =", cmd_buf[7]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "VHT_EN =", cmd_buf[8]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "SGI_support =", cmd_buf[9]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "try_ness =", cmd_buf[10]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "pre_rate =", cmd_buf[11]); - } else { - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "RSSI =", cmd_buf[1]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %x\n", "BW =", cmd_buf[2]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "DISRA =", cmd_buf[3]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "VHT_EN =", cmd_buf[4]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "Hightest rate =", cmd_buf[5]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "Lowest rate =", cmd_buf[6]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "SGI_support =", cmd_buf[7]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "Rate_ID =", cmd_buf[8]); - } - PHYDM_DBG(dm, DBG_FW_TRACE, "-------------------------------\n"); - } else if (para_idx == RADBG_DEBUG_MONITOR2) { - PHYDM_DBG(dm, DBG_FW_TRACE, "-------------------------------\n"); - if (dm->support_ic_type & PHYDM_IC_3081_SERIES) { - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "rate_id =", cmd_buf[1]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "highest_rate =", cmd_buf[2]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "lowest_rate =", cmd_buf[3]); - - for (i = 4; i <= 11; i++) - PHYDM_DBG(dm, DBG_FW_TRACE, "RAMASK = 0x%x\n", cmd_buf[i]); - } else { - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %x%x %x%x %x%x %x%x\n", "RA Mask:", - cmd_buf[8], cmd_buf[7], cmd_buf[6], cmd_buf[5], cmd_buf[4], cmd_buf[3], cmd_buf[2], cmd_buf[1]); - } - PHYDM_DBG(dm, DBG_FW_TRACE, "-------------------------------\n"); - } else if (para_idx == RADBG_DEBUG_MONITOR3) { - for (i = 0; i < (cmd_len - 1); i++) - PHYDM_DBG(dm, DBG_FW_TRACE, "content[%d] = %d\n", i, cmd_buf[1 + i]); - } else if (para_idx == RADBG_DEBUG_MONITOR4) - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s {%d.%d}\n", "RA version =", cmd_buf[1], cmd_buf[2]); - else if (para_idx == RADBG_DEBUG_MONITOR5) { - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "Current rate =", cmd_buf[1]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "Retry ratio =", cmd_buf[2]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "rate down ratio =", cmd_buf[3]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "highest rate =", cmd_buf[4]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s {0x%x 0x%x}\n", "Muti-try =", cmd_buf[5], cmd_buf[6]); - PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x%x%x%x%x\n", "RA mask =", cmd_buf[11], cmd_buf[10], cmd_buf[9], cmd_buf[8], cmd_buf[7]); + for (i = 4; i <= 11; i++) + PHYDM_DBG(dm, DBG_FW_TRACE, "RAMASK = 0x%x\n", + cmd_buf[i]); + } else { + PHYDM_DBG(dm, DBG_FW_TRACE, + "%5s %x%x %x%x %x%x %x%x\n", "RA Mask:", + cmd_buf[8], cmd_buf[7], cmd_buf[6], + cmd_buf[5], cmd_buf[4], cmd_buf[3], + cmd_buf[2], cmd_buf[1]); } + } else if (mode == RADBG_DEBUG_MONITOR3) { + for (i = 0; i < (cmd_len - 1); i++) + PHYDM_DBG(dm, DBG_FW_TRACE, "content[%d] = %d\n", i, + cmd_buf[1 + i]); + } else if (mode == RADBG_DEBUG_MONITOR4) + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s {%d.%d}\n", "RA version =", + cmd_buf[1], cmd_buf[2]); + else if (mode == RADBG_DEBUG_MONITOR5) { + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "Current rate =", + cmd_buf[1]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "Retry ratio =", + cmd_buf[2]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "rate down ratio =", + cmd_buf[3]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "highest rate =", + cmd_buf[4]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s {0x%x 0x%x}\n", "Muti-try =", + cmd_buf[5], cmd_buf[6]); + PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x%x%x%x%x\n", "RA mask =", + cmd_buf[11], cmd_buf[10], cmd_buf[9], cmd_buf[8], + cmd_buf[7]); + } + PHYDM_DBG(dm, DBG_FW_TRACE, "-------------------------------\n"); } -void -phydm_ra_dynamic_retry_count( - void *dm_void -) +void phydm_ra_dynamic_retry_count(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (!(dm->support_ability & ODM_BB_DYNAMIC_ARFR)) return; +#if 0 /*PHYDM_DBG(dm, DBG_RA, "dm->pre_b_noisy = %d\n", dm->pre_b_noisy );*/ +#endif if (dm->pre_b_noisy != dm->noisy_decision) { if (dm->noisy_decision) { PHYDM_DBG(dm, DBG_DYN_ARFR, "Noisy Env. RA fallback\n"); - odm_set_mac_reg(dm, 0x430, MASKDWORD, 0x0); - odm_set_mac_reg(dm, 0x434, MASKDWORD, 0x04030201); + odm_set_mac_reg(dm, R_0x430, MASKDWORD, 0x0); + odm_set_mac_reg(dm, R_0x434, MASKDWORD, 0x04030201); } else { PHYDM_DBG(dm, DBG_DYN_ARFR, "Clean Env. RA fallback\n"); - odm_set_mac_reg(dm, 0x430, MASKDWORD, 0x01000000); - odm_set_mac_reg(dm, 0x434, MASKDWORD, 0x06050402); + odm_set_mac_reg(dm, R_0x430, MASKDWORD, 0x01000000); + odm_set_mac_reg(dm, R_0x434, MASKDWORD, 0x06050402); } dm->pre_b_noisy = dm->noisy_decision; } } -void -phydm_print_rate( - void *dm_void, - u8 rate, - u32 dbg_component -) +void phydm_print_rate(void *dm_void, u8 rate, u32 dbg_component) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 legacy_table[12] = {1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54}; - u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/ - u8 vht_en = (rate_idx >= ODM_RATEVHTSS1MCS0) ? 1 : 0; - u8 b_sgi = (rate & 0x80) >> 7; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/ + boolean vht_en = phydm_is_vht_rate(dm, rate_idx); + u8 b_sgi = (rate & 0x80) >> 7; + u8 rate_ss = phydm_rate_to_num_ss(dm, rate_idx); + u8 rate_digit = phydm_rate_2_rate_digit(dm, rate_idx); - PHYDM_DBG_F(dm, dbg_component, "( %s%s%s%s%d%s%s)\n", - ((rate_idx >= ODM_RATEVHTSS1MCS0) && (rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "", - ((rate_idx >= ODM_RATEVHTSS2MCS0) && (rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "", - ((rate_idx >= ODM_RATEVHTSS3MCS0) && (rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "", - (rate_idx >= ODM_RATEMCS0) ? "MCS " : "", - (vht_en) ? ((rate_idx - ODM_RATEVHTSS1MCS0) % 10) : ((rate_idx >= ODM_RATEMCS0) ? (rate_idx - ODM_RATEMCS0) : ((rate_idx <= ODM_RATE54M) ? legacy_table[rate_idx] : 0)), - (b_sgi) ? "-S" : " ", - (rate_idx >= ODM_RATEMCS0) ? "" : "M"); + PHYDM_DBG_F(dm, dbg_component, "( %s%s%s%s%s%d%s%s)\n", + (vht_en && (rate_ss == 1)) ? "VHT 1ss " : "", + (vht_en && (rate_ss == 2)) ? "VHT 2ss " : "", + (vht_en && (rate_ss == 3)) ? "VHT 3ss " : "", + (vht_en && (rate_ss == 4)) ? "VHT 4ss " : "", + (rate_idx >= ODM_RATEMCS0) ? "MCS " : "", + rate_digit, + (b_sgi) ? "-S" : " ", + (rate_idx >= ODM_RATEMCS0) ? "" : "M"); } -void -phydm_c2h_ra_report_handler( - void *dm_void, - u8 *cmd_buf, - u8 cmd_len -) +void phydm_print_rate_2_buff(void *dm_void, u8 rate, char *buf, u16 buf_size) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; - u8 macid = cmd_buf[1]; - u8 rate = cmd_buf[0]; - u8 curr_ra_ratio = 0xff; - u8 curr_bw = 0xff; - u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/ - u8 rate_order; - struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/ + boolean vht_en = phydm_is_vht_rate(dm, rate_idx); + u8 b_sgi = (rate & 0x80) >> 7; + u8 rate_ss = phydm_rate_to_num_ss(dm, rate_idx); + u8 rate_digit = phydm_rate_2_rate_digit(dm, rate_idx); + + PHYDM_SNPRINTF(buf, buf_size, "( %s%s%s%s%d%s%s)", + (vht_en && (rate_ss == 1)) ? "VHT 1ss " : "", + (vht_en && (rate_ss == 2)) ? "VHT 2ss " : "", + (vht_en && (rate_ss == 3)) ? "VHT 3ss " : "", + (rate_idx >= ODM_RATEMCS0) ? "MCS " : "", + rate_digit, + (b_sgi) ? "-S" : " ", + (rate_idx >= ODM_RATEMCS0) ? "" : "M"); +} + +void phydm_c2h_ra_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_tab = &dm->dm_ra_table; + struct cmn_sta_info *sta = NULL; + u8 macid = cmd_buf[1]; + u8 rate = cmd_buf[0]; + u8 ra_ratio = 0xff; + u8 curr_bw = 0xff; + u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/ + u8 rate_order; + u8 gid_index = 0; + char dbg_buf[PHYDM_SNPRINT_SIZE] = {0}; + + #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + sta = dm->phydm_sta_info[dm->phydm_macid_table[macid]]; + #else + sta = dm->phydm_sta_info[macid]; + #endif if (cmd_len >= 7) { - curr_ra_ratio = cmd_buf[5]; + ra_ratio = cmd_buf[5]; curr_bw = cmd_buf[6]; - PHYDM_DBG(dm, DBG_RA, "RA retry ratio: [%d]:", curr_ra_ratio); - /**/ + PHYDM_DBG(dm, DBG_RA, "[%d] PER=%d\n", macid, ra_ratio); } - + if (cmd_buf[3] != 0) { - if (cmd_buf[3] == 0xff) { - PHYDM_DBG(dm, DBG_RA, "FW Level: Fix rate[%d]:", macid); - /**/ - } else if (cmd_buf[3] == 1) { - PHYDM_DBG(dm, DBG_RA, "Try Success[%d]:", macid); - /**/ - } else if (cmd_buf[3] == 2) { - PHYDM_DBG(dm, DBG_RA, "Try Fail & Try Again[%d]:", macid); - /**/ - } else if (cmd_buf[3] == 3) { - PHYDM_DBG(dm, DBG_RA, "rate Back[%d]:", macid); - /**/ - } else if (cmd_buf[3] == 4) { - PHYDM_DBG(dm, DBG_RA, "start rate by RSSI[%d]:", macid); - /**/ - } else if (cmd_buf[3] == 5) { - PHYDM_DBG(dm, DBG_RA, "Try rate[%d]:", macid); - /**/ - } + if (cmd_buf[3] == 0xff) + PHYDM_DBG(dm, DBG_RA, "FW Fix Rate\n"); + else if (cmd_buf[3] == 1) + PHYDM_DBG(dm, DBG_RA, "Try Success\n"); + else if (cmd_buf[3] == 2) + PHYDM_DBG(dm, DBG_RA, "Try Fail & Again\n"); + else if (cmd_buf[3] == 3) + PHYDM_DBG(dm, DBG_RA, "Rate Back\n"); + else if (cmd_buf[3] == 4) + PHYDM_DBG(dm, DBG_RA, "Start rate by RSSI\n"); + else if (cmd_buf[3] == 5) + PHYDM_DBG(dm, DBG_RA, "Try rate\n"); } - - PHYDM_DBG(dm, DBG_RA, "Tx rate Update[%d]:", macid); - phydm_print_rate(dm, rate, DBG_RA); - - if (macid >= 128) { - u8 gid_index = macid - 128; + phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE); + PHYDM_DBG(dm, DBG_RA, "Tx Rate=%s (%d)", dbg_buf, rate); + +#ifdef MU_EX_MACID + if (macid >= 128 && macid < (128 + MU_EX_MACID)) { + gid_index = macid - 128; ra_tab->mu1_rate[gid_index] = rate; } - - /*ra_tab->link_tx_rate[macid] = rate;*/ - +#endif + + /*@ra_tab->link_tx_rate[macid] = rate;*/ + if (is_sta_active(sta)) { sta->ra_info.curr_tx_rate = rate; sta->ra_info.curr_tx_bw = (enum channel_width)curr_bw; - sta->ra_info.curr_retry_ratio= curr_ra_ratio; - - /*if (sta->ra_info.curr_tx_bw < sta->ra_info.ra_bw_mode)*/ + sta->ra_info.curr_retry_ratio = ra_ratio; } /*trigger power training*/ @@ -406,28 +472,23 @@ phydm_c2h_ra_report_handler( rate_order = phydm_rate_order_compute(dm, rate_idx); - if ((dm->is_one_entry_only) || - ((rate_order > ra_tab->highest_client_tx_order) && (ra_tab->power_tracking_flag == 1)) - ) { + if (dm->is_one_entry_only || + (rate_order > ra_tab->highest_client_tx_order && + ra_tab->power_tracking_flag == 1)) { halrf_update_pwr_track(dm, rate_idx); ra_tab->power_tracking_flag = 0; } #endif - /*trigger dynamic rate ID*/ -/*#if (defined(CONFIG_RA_DYNAMIC_RATE_ID))*/ /*dino will refine here later*/ #if 0 + /*trigger dynamic rate ID*/ if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E)) phydm_update_rate_id(dm, rate, macid); #endif - } -void -odm_ra_post_action_on_assoc( - void *dm_void -) +void odm_ra_post_action_on_assoc(void *dm_void) { #if 0 struct dm_struct *dm = (struct dm_struct *)dm_void; @@ -438,1040 +499,82 @@ odm_ra_post_action_on_assoc( #endif } -void -phydm_modify_RA_PCR_threshold( - void *dm_void, - u8 RA_offset_direction, - u8 RA_threshold_offset - -) +void phydm_modify_RA_PCR_threshold(void *dm_void, u8 ra_ofst_direc, + u8 ra_th_ofst) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_tab = &dm->dm_ra_table; - ra_tab->RA_offset_direction = RA_offset_direction; - ra_tab->RA_threshold_offset = RA_threshold_offset; - PHYDM_DBG(dm, DBG_RA_MASK, "Set RA_threshold_offset = (( %s%d ))\n", ((RA_threshold_offset == 0) ? " " : ((RA_offset_direction) ? "+" : "-")), RA_threshold_offset); + ra_tab->ra_ofst_direc = ra_ofst_direc; + ra_tab->ra_th_ofst = ra_th_ofst; + PHYDM_DBG(dm, DBG_RA_MASK, "Set ra_th_offset=(( %s%d ))\n", + ((ra_ofst_direc) ? "+" : "-"), ra_th_ofst); } -#if 0 /*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ - -void -odm_refresh_rate_adaptive_mask_mp( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; - void *adapter = dm->adapter; - void *target_adapter = NULL; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); - PMGNT_INFO mgnt_info = GetDefaultMgntInfo(adapter); - void *loop_adapter = GetDefaultAdapter(adapter); - PMGNT_INFO p_loop_mgnt_info = &loop_adapter->MgntInfo; - HAL_DATA_TYPE *loop_hal_data = GET_HAL_DATA(loop_adapter); - - u32 i; - struct sta_info *entry; - u8 ratr_state_new; - - PHYDM_DBG(dm, DBG_RA_MASK, "%s ======>\n", __func__); - - if (adapter->bDriverStopped) { - PHYDM_DBG(dm, DBG_RA_MASK, "driver is going to unload\n"); - return; - } - - if (!hal_data->bUseRAMask) { - PHYDM_DBG(dm, DBG_RA_MASK, "driver does not control rate adaptive mask\n"); - return; - } - - /* if default port is connected, update RA table for default port (infrastructure mode only) */ - /* Need to consider other ports for P2P cases*/ - - while(loop_adapter){ - p_loop_mgnt_info = &loop_adapter->MgntInfo; - loop_hal_data = GET_HAL_DATA(loop_adapter); - - if (p_loop_mgnt_info->mAssoc && (!ACTING_AS_AP(loop_adapter))) { - odm_refresh_ldpc_rts_mp(loop_adapter, dm, p_loop_mgnt_info->mMacId, p_loop_mgnt_info->IOTPeer, loop_hal_data->UndecoratedSmoothedPWDB); - /*PHYDM_DBG(dm, DBG_RA_MASK, "Infrasture mode\n");*/ - - ratr_state_new = phydm_rssi_lv_dec(dm, loop_hal_data->UndecoratedSmoothedPWDB, p_loop_mgnt_info->Ratr_State); - - if ((p_loop_mgnt_info->Ratr_State != ratr_state_new) || (ra_tab->up_ramask_cnt >= FORCED_UPDATE_RAMASK_PERIOD)) { - ra_tab->up_ramask_cnt = 0; - PHYDM_PRINT_ADDR(dm, DBG_RA_MASK, ("Target AP addr :"), p_loop_mgnt_info->Bssid); - PHYDM_DBG(dm, DBG_RA_MASK, "Update RA Level: ((%x)) -> ((%x)), RSSI = ((%d))\n\n", - mgnt_info->Ratr_State, ratr_state_new, loop_hal_data->UndecoratedSmoothedPWDB); - - p_loop_mgnt_info->Ratr_State = ratr_state_new; - adapter->HalFunc.UpdateHalRAMaskHandler(loop_adapter, p_loop_mgnt_info->mMacId, NULL); - } else { - PHYDM_DBG(dm, DBG_RA_MASK, "Stay in RA level = (( %d ))\n\n", ratr_state_new); - /**/ - } - } - - loop_adapter = GetNextExtAdapter(loop_adapter); - } - - /* */ - /* The following part configure AP/VWifi/IBSS rate adaptive mask. */ - /* */ - - if (mgnt_info->mIbss) /* Target: AP/IBSS peer. */ - target_adapter = GetDefaultAdapter(adapter); - else - target_adapter = GetFirstAPAdapter(adapter); - - /* if extension port (softap) is started, updaet RA table for more than one clients associate */ - if (target_adapter != NULL) { - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - entry = AsocEntry_EnumStation(target_adapter, i); - - if (is_sta_active((&GET_STA_INFO(entry)))) { - odm_refresh_ldpc_rts_mp(target_adapter, dm, GET_STA_INFO(entry).mac_id, entry->IOTPeer, GET_STA_INFO(entry).rssi_stat.rssi); - - ratr_state_new = phydm_rssi_lv_dec(dm, GET_STA_INFO(entry).rssi_stat.rssi, GET_STA_INFO(entry).ra_info.rssi_level); - - if ((GET_STA_INFO(entry).ra_info.rssi_level != ratr_state_new) || (ra_tab->up_ramask_cnt >= FORCED_UPDATE_RAMASK_PERIOD)) { - ra_tab->up_ramask_cnt = 0; - PHYDM_PRINT_ADDR(dm, DBG_RA_MASK, ("Target AP addr :"), GET_STA_INFO(entry).mac_addr); - PHYDM_DBG(dm, DBG_RA_MASK, "Update Tx RA Level: ((%x)) -> ((%x)), RSSI = ((%d))\n", - GET_STA_INFO(entry).ra_info.rssi_level, ratr_state_new, GET_STA_INFO(entry).rssi_stat.rssi); - - GET_STA_INFO(entry).ra_info.rssi_level = ratr_state_new; - adapter->HalFunc.UpdateHalRAMaskHandler(target_adapter, GET_STA_INFO(entry).mac_id, entry); - } else { - PHYDM_DBG(dm, DBG_RA_MASK, "Stay in RA level = (( %d ))\n\n", ratr_state_new); - /**/ - } - - } - } - } -} - -#endif - #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -void -odm_refresh_rate_adaptive_mask_ap( - void *dm_void -) +void phydm_gen_ramask_h2c_AP( + void *dm_void, + struct rtl8192cd_priv *priv, + struct sta_info *entry, + u8 rssi_level) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; - struct rtl8192cd_priv *priv = dm->priv; - struct aid_obj *aidarray; - u32 i; - struct sta_info *entry; - struct cmn_sta_info *sta; - u8 ratr_state_new; + struct dm_struct *dm = (struct dm_struct *)dm_void; - if (priv->up_time % 2) - return; - - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - entry = dm->odm_sta_info[i]; - sta = dm->phydm_sta_info[i]; - - if (is_sta_active(sta)) { - #if defined(UNIVERSAL_REPEATER) || defined(MBSSID) - aidarray = container_of(entry, struct aid_obj, station); - priv = aidarray->priv; - #endif - - if (!priv->pmib->dot11StationConfigEntry.autoRate) - continue; - - ratr_state_new = phydm_rssi_lv_dec(dm, (u32)sta->rssi_stat.rssi, sta->ra_info.rssi_level); - - if ((sta->ra_info.rssi_level != ratr_state_new) || (ra_tab->up_ramask_cnt >= FORCED_UPDATE_RAMASK_PERIOD)) { - ra_tab->up_ramask_cnt = 0; - PHYDM_PRINT_ADDR(dm, DBG_RA_MASK, "Target AP addr :", sta->mac_addr); - PHYDM_DBG(dm, DBG_RA_MASK, "Update Tx RA Level: ((%x)) -> ((%x)), RSSI = ((%d))\n", sta->ra_info.rssi_level, ratr_state_new, sta->rssi_stat.rssi); - - sta->ra_info.rssi_level = ratr_state_new; - phydm_gen_ramask_h2c_AP(dm, priv, entry, sta->ra_info.rssi_level); - } else { - PHYDM_DBG(dm, DBG_RA_MASK, "Stay in RA level = (( %d ))\n\n", ratr_state_new); - /**/ - } - } - } -} -#endif - -void -phydm_rate_adaptive_mask_init( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_t = &dm->dm_ra_table; - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER adapter = (PADAPTER)dm->adapter; - PMGNT_INFO mgnt_info = &(adapter->MgntInfo); - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); - - - if (mgnt_info->DM_Type == dm_type_by_driver) - hal_data->bUseRAMask = true; - else - hal_data->bUseRAMask = false; - -#endif - - ra_t->ldpc_thres = 35; - ra_t->up_ramask_cnt = 0; - ra_t->up_ramask_cnt_tmp = 0; - -} - -void -phydm_refresh_rate_adaptive_mask( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_t = &dm->dm_ra_table; - - PHYDM_DBG(dm, DBG_RA_MASK, "%s ======>\n", __func__); - - if (!(dm->support_ability & ODM_BB_RA_MASK)) { - PHYDM_DBG(dm, DBG_RA_MASK, "Return: Not support\n"); - return; - } - - if (!dm->is_linked) - return; - - ra_t->up_ramask_cnt++; - /*ra_t->up_ramask_cnt_tmp++;*/ - - -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - - odm_refresh_rate_adaptive_mask_ap(dm); - -#else - - phydm_ra_mask_watchdog(dm); - -#endif - -} - -void -phydm_show_sta_info( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *sta = NULL; - struct ra_sta_info *ra = NULL; - #ifdef CONFIG_BEAMFORMING - struct bf_cmn_info *bf = NULL; - #endif - char help[] = "-h"; - u32 var1[10] = {0}; - u32 used = *_used; - u32 out_len = *_out_len; - u32 i, macid_start, macid_end; - u8 tatal_sta_num = 0; - - PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); - - if ((strcmp(input[1], help) == 0)) { - PDM_SNPF(out_len, used, output + used, out_len - used, - "All STA: {1}\n"); - PDM_SNPF(out_len, used, output + used, out_len - used, - "STA[macid]: {2} {macid}\n"); - return; - } else if (var1[0] == 1) { - macid_start = 0; - macid_end = ODM_ASSOCIATE_ENTRY_NUM; - } else if (var1[0] == 2) { - macid_start = var1[1]; - macid_end = var1[1]; - } else { - PDM_SNPF(out_len, used, output + used, out_len - used, - "Warning input value!\n"); - return; - } - - for (i = macid_start; i < macid_end; i++) { - - sta = dm->phydm_sta_info[i]; - - - if (!is_sta_active(sta)) - continue; - - ra = &sta->ra_info; - #ifdef CONFIG_BEAMFORMING - bf = &sta->bf_info; + if (dm->support_ic_type == ODM_RTL8812) { + #if (RTL8812A_SUPPORT == 1) + UpdateHalRAMask8812(priv, entry, rssi_level); #endif - - tatal_sta_num++; - - PDM_SNPF(out_len, used, output + used, out_len - used, - "==[MACID: %d]============>\n", sta->mac_id); - PDM_SNPF(out_len, used, output + used, out_len - used, - "AID:%d\n", sta->aid); - PDM_SNPF(out_len, used, output + used, out_len - used, - "ADDR:%x-%x-%x-%x-%x-%x\n", - sta->mac_addr[5], sta->mac_addr[4], - sta->mac_addr[3], sta->mac_addr[2], - sta->mac_addr[1], sta->mac_addr[0]); - PDM_SNPF(out_len, used, output + used, out_len - used, - "DM_ctrl:0x%x\n", sta->dm_ctrl); - PDM_SNPF(out_len, used, output + used, out_len - used, - "BW:%d, MIMO_Type:0x%x\n", sta->bw_mode, - sta->mimo_type); - PDM_SNPF(out_len, used, output + used, out_len - used, - "STBC_en:%d, LDPC_en=%d\n", sta->stbc_en, - sta->ldpc_en); - - /*[RSSI Info]*/ - PDM_SNPF(out_len, used, output + used, out_len - used, - "RSSI{All, OFDM, CCK}={%d, %d, %d}\n", - sta->rssi_stat.rssi, sta->rssi_stat.rssi_ofdm, - sta->rssi_stat.rssi_cck); - - /*[RA Info]*/ - PDM_SNPF(out_len, used, output + used, out_len - used, - "Rate_ID:%d, RSSI_LV:%d, ra_bw:%d, SGI_en:%d\n", - - ra->rate_id, ra->rssi_level, ra->ra_bw_mode, - ra->is_support_sgi); - - PDM_SNPF(out_len, used, output + used, out_len - used, - "VHT_en:%d, Wireless_set=0x%x, sm_ps=%d\n", - ra->is_vht_enable, sta->support_wireless_set, - sta->sm_ps); - - PDM_SNPF(out_len, used, output + used, out_len - used, - "Dis{RA, PT}={%d, %d}, TxRx:%d, Noisy:%d\n", - ra->disable_ra, ra->disable_pt, ra->txrx_state, - ra->is_noisy); - - PDM_SNPF(out_len, used, output + used, out_len - used, - "TX{Rate, BW}={0x%x, %d}, RTY:%d\n", - ra->curr_tx_rate, ra->curr_tx_bw, - ra->curr_retry_ratio); - - PDM_SNPF(out_len, used, output + used, out_len - used, - "RA_Mask:0x%llx\n", ra->ramask); - - /*[TP]*/ - PDM_SNPF(out_len, used, output + used, out_len - used, - "TP{TX,RX}={%d, %d}\n", - sta->tx_moving_average_tp, - sta->rx_moving_average_tp); - - #ifdef CONFIG_BEAMFORMING - /*[Beamforming]*/ - PDM_SNPF(out_len, used, output + used, out_len - used, - "BF CAP{HT,VHT}={0x%x, 0x%x}\n", - bf->ht_beamform_cap, bf->vht_beamform_cap); - PDM_SNPF(out_len, used, output + used, out_len - used, - "BF {p_aid,g_id}={0x%x, 0x%x}\n\n", - bf->p_aid, bf->g_id); + } else if (dm->support_ic_type == ODM_RTL8188E) { + #if (RTL8188E_SUPPORT == 1) + #ifdef TXREPORT + add_RATid(priv, entry); + #endif + #endif + } else { + #ifdef CONFIG_WLAN_HAL + GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, entry, rssi_level); #endif } - - if (tatal_sta_num == 0) { - PDM_SNPF(out_len, used, output + used, out_len - used, - "No Linked STA\n"); - } - - *_used = used; - *_out_len = out_len; } -#ifdef PHYDM_3RD_REFORM_RA_MASK - -u8 -phydm_get_tx_stream_num( - void *dm_void, - enum rf_type mimo_type - -) +void phydm_update_hal_ra_mask( + void *dm_void, + u32 wireless_mode, + u8 rf_type, + u8 bw, + u8 mimo_ps_enable, + u8 disable_cck_rate, + u32 *ratr_bitmap_msb_in, + u32 *ratr_bitmap_lsb_in, + u8 tx_rate_level) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 tx_num = 1; - - if (mimo_type == RF_1T1R || mimo_type == RF_1T2R) - tx_num = 1; - else if (mimo_type == RF_2T2R || mimo_type == RF_2T3R || mimo_type == RF_2T4R) - tx_num = 2; - else if (mimo_type == RF_3T3R || mimo_type == RF_3T4R) - tx_num = 3; - else if (mimo_type == RF_4T4R) - tx_num = 4; - else { - PHYDM_DBG(dm, DBG_RA, "[Warrning] no mimo_type is found\n"); - } - return tx_num; -} - -u64 -phydm_get_bb_mod_ra_mask( - void *dm_void, - u8 macid -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; - struct ra_sta_info *ra = NULL; - enum channel_width bw = (enum channel_width)0; - enum wireless_set wireless_mode = (enum wireless_set)0; - u8 tx_stream_num = 1; - u8 rssi_lv = 0; - u64 ra_mask_bitmap = 0; - - if (is_sta_active(sta)) { - - ra = &sta->ra_info; - bw = ra->ra_bw_mode; - wireless_mode = sta->support_wireless_set; - tx_stream_num = phydm_get_tx_stream_num(dm, sta->mimo_type); - rssi_lv = ra->rssi_level; - ra_mask_bitmap = ra->ramask; - } else { - PHYDM_DBG(dm, DBG_RA, "[Warning] %s invalid sta_info\n", __func__); - return 0; - } - - PHYDM_DBG(dm, DBG_RA, "macid=%d ori_RA_Mask= 0x%llx\n", sta->mac_id, ra_mask_bitmap); - PHYDM_DBG(dm, DBG_RA, "wireless_mode=0x%x, tx_stream_num=%d, BW=%d, MimoPs=%d, rssi_lv=%d\n", - wireless_mode, tx_stream_num, bw, sta->sm_ps, rssi_lv); - - if (sta->sm_ps == SM_PS_STATIC) /*mimo_ps_enable*/ - tx_stream_num = 1; - - - /*[Modify RA Mask by Wireless Mode]*/ - - if (wireless_mode == WIRELESS_CCK) /*B mode*/ - ra_mask_bitmap &= 0x0000000f; - else if (wireless_mode == WIRELESS_OFDM) /*G mode*/ - ra_mask_bitmap &= 0x00000ff0; - else if (wireless_mode == (WIRELESS_CCK | WIRELESS_OFDM)) /*BG mode*/ - ra_mask_bitmap &= 0x00000ff5; - else if (wireless_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT)) { - /*N_2G*/ - if (tx_stream_num == 1) { - if (bw == CHANNEL_WIDTH_40) - ra_mask_bitmap &= 0x000ff015; - else - ra_mask_bitmap &= 0x000ff005; - } else if (tx_stream_num == 2) { - if (bw == CHANNEL_WIDTH_40) - ra_mask_bitmap &= 0x0ffff015; - else - ra_mask_bitmap &= 0x0ffff005; - } else if (tx_stream_num == 3) - ra_mask_bitmap &= 0xffffff015; - } else if (wireless_mode == (WIRELESS_OFDM | WIRELESS_HT)) { /*N_5G*/ - - if (tx_stream_num == 1) { - if (bw == CHANNEL_WIDTH_40) - ra_mask_bitmap &= 0x000ff030; - else - ra_mask_bitmap &= 0x000ff010; - } else if (tx_stream_num == 2) { - if (bw == CHANNEL_WIDTH_40) - ra_mask_bitmap &= 0x0ffff030; - else - ra_mask_bitmap &= 0x0ffff010; - } else if (tx_stream_num == 3) - ra_mask_bitmap &= 0xffffff010; - } else if (wireless_mode == (WIRELESS_CCK |WIRELESS_OFDM | WIRELESS_VHT)) { - /*AC_2G*/ - if (tx_stream_num == 1) - ra_mask_bitmap &= 0x003ff015; - else if (tx_stream_num == 2) - ra_mask_bitmap &= 0xfffff015; - else if (tx_stream_num == 3) - ra_mask_bitmap &= 0x3fffffff010; - - - if (bw == CHANNEL_WIDTH_20) {/* AC 20MHz doesn't support MCS9 */ - ra_mask_bitmap &= 0x1ff7fdfffff; - } - } else if (wireless_mode == (WIRELESS_OFDM | WIRELESS_VHT)) { /*AC_5G*/ - - if (tx_stream_num == 1) - ra_mask_bitmap &= 0x003ff010; - else if (tx_stream_num == 2) - ra_mask_bitmap &= 0xfffff010; - else if (tx_stream_num == 3) - ra_mask_bitmap &= 0x3fffffff010; - - if (bw == CHANNEL_WIDTH_20) /* AC 20MHz doesn't support MCS9 */ - ra_mask_bitmap &= 0x1ff7fdfffff; - } else { - PHYDM_DBG(dm, DBG_RA, "[Warrning] No RA mask is found\n"); - /**/ - } - - PHYDM_DBG(dm, DBG_RA, "Mod by mode=0x%llx\n", ra_mask_bitmap); - - - /*[Modify RA Mask by RSSI level]*/ - if (wireless_mode != WIRELESS_CCK) { - if (rssi_lv == 0) - ra_mask_bitmap &= 0xffffffffffffffff; - else if (rssi_lv == 1) - ra_mask_bitmap &= 0xfffffffffffffff0; - else if (rssi_lv == 2) - ra_mask_bitmap &= 0xffffffffffffefe0; - else if (rssi_lv == 3) - ra_mask_bitmap &= 0xffffffffffffcfc0; - else if (rssi_lv == 4) - ra_mask_bitmap &= 0xffffffffffff8f80; - else if (rssi_lv >= 5) - ra_mask_bitmap &= 0xffffffffffff0f00; - - } - PHYDM_DBG(dm, DBG_RA, "Mod by RSSI=0x%llx\n", ra_mask_bitmap); - - return ra_mask_bitmap; -} - -u8 -phydm_get_rate_id( - void *dm_void, - u8 macid -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; - struct ra_sta_info *ra =NULL; - enum channel_width bw = (enum channel_width)0; - enum wireless_set wireless_mode = (enum wireless_set)0; - u8 tx_stream_num = 1; - u8 rate_id_idx = PHYDM_BGN_20M_1SS; - - if (is_sta_active(sta)) { - - ra = &sta->ra_info; - bw = ra->ra_bw_mode; - wireless_mode = sta->support_wireless_set; - tx_stream_num = phydm_get_tx_stream_num(dm, sta->mimo_type); - - } else { - PHYDM_DBG(dm, DBG_RA, "[Warning] %s: invalid sta_info\n", __func__); - return 0; - } - - PHYDM_DBG(dm, DBG_RA, "macid=%d, wireless_set=0x%x, tx_stream_num=%d, BW=0x%x\n", - sta->mac_id, wireless_mode, tx_stream_num, bw); - - if (wireless_mode == WIRELESS_CCK) /*B mode*/ - rate_id_idx = PHYDM_B_20M; - else if (wireless_mode == WIRELESS_OFDM) /*G mode*/ - rate_id_idx = PHYDM_G; - else if (wireless_mode == (WIRELESS_CCK | WIRELESS_OFDM)) /*BG mode*/ - rate_id_idx = PHYDM_BG; - else if (wireless_mode == (WIRELESS_OFDM | WIRELESS_HT)) { /*GN mode*/ - - if (tx_stream_num == 1) - rate_id_idx = PHYDM_GN_N1SS; - else if (tx_stream_num == 2) - rate_id_idx = PHYDM_GN_N2SS; - else if (tx_stream_num == 3) - rate_id_idx = PHYDM_ARFR5_N_3SS; - } else if (wireless_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT)) { /*BGN mode*/ - - - if (bw == CHANNEL_WIDTH_40) { - if (tx_stream_num == 1) - rate_id_idx = PHYDM_BGN_40M_1SS; - else if (tx_stream_num == 2) - rate_id_idx = PHYDM_BGN_40M_2SS; - else if (tx_stream_num == 3) - rate_id_idx = PHYDM_ARFR5_N_3SS; - - } else { - if (tx_stream_num == 1) - rate_id_idx = PHYDM_BGN_20M_1SS; - else if (tx_stream_num == 2) - rate_id_idx = PHYDM_BGN_20M_2SS; - else if (tx_stream_num == 3) - rate_id_idx = PHYDM_ARFR5_N_3SS; - } - } else if (wireless_mode == (WIRELESS_OFDM | WIRELESS_VHT)) { /*AC mode*/ - - if (tx_stream_num == 1) - rate_id_idx = PHYDM_ARFR1_AC_1SS; - else if (tx_stream_num == 2) - rate_id_idx = PHYDM_ARFR0_AC_2SS; - else if (tx_stream_num == 3) - rate_id_idx = PHYDM_ARFR4_AC_3SS; - } else if (wireless_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT)) { /*AC 2.4G mode*/ - - if (bw >= CHANNEL_WIDTH_80) { - if (tx_stream_num == 1) - rate_id_idx = PHYDM_ARFR1_AC_1SS; - else if (tx_stream_num == 2) - rate_id_idx = PHYDM_ARFR0_AC_2SS; - else if (tx_stream_num == 3) - rate_id_idx = PHYDM_ARFR4_AC_3SS; - } else { - if (tx_stream_num == 1) - rate_id_idx = PHYDM_ARFR2_AC_2G_1SS; - else if (tx_stream_num == 2) - rate_id_idx = PHYDM_ARFR3_AC_2G_2SS; - else if (tx_stream_num == 3) - rate_id_idx = PHYDM_ARFR4_AC_3SS; - } - } else { - PHYDM_DBG(dm, DBG_RA, "[Warrning] No rate_id is found\n"); - rate_id_idx = 0; - } - - PHYDM_DBG(dm, DBG_RA, "Rate_ID=((0x%x))\n", rate_id_idx); - - return rate_id_idx; -} - -void -phydm_ra_h2c( - void *dm_void, - u8 macid, - u8 dis_ra, - u8 dis_pt, - u8 no_update_bw, - u8 init_ra_lv, - u64 ra_mask -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; - struct ra_sta_info *ra = NULL; - u8 h2c_val[H2C_MAX_LENGTH] = {0}; - - if (is_sta_active(sta)) { - ra = &sta->ra_info; - } else { - PHYDM_DBG(dm, DBG_RA, "[Warning] %s invalid sta_info\n", __func__); - return; - } - - PHYDM_DBG(dm, DBG_RA, "%s ======>\n", __func__); - PHYDM_DBG(dm, DBG_RA, "MACID=%d\n", sta->mac_id); - - if (dm->is_disable_power_training == true) - dis_pt = true; - else if (dm->is_disable_power_training == false) - dis_pt = false; - - h2c_val[0] = sta->mac_id; - h2c_val[1] = (ra->rate_id & 0x1f) | ((init_ra_lv & 0x3) << 5) | (ra->is_support_sgi << 7); - h2c_val[2] = (u8)((ra->ra_bw_mode) | (((sta->ldpc_en) ? 1 : 0) << 2) | - ((no_update_bw & 0x1) << 3) | (ra->is_vht_enable << 4) | - ((dis_pt & 0x1) << 6) | ((dis_ra & 0x1) << 7)); - - h2c_val[3] = (u8)(ra_mask & 0xff); - h2c_val[4] = (u8)((ra_mask & 0xff00) >> 8); - h2c_val[5] = (u8)((ra_mask & 0xff0000) >> 16); - h2c_val[6] = (u8)((ra_mask & 0xff000000) >> 24); - - PHYDM_DBG(dm, DBG_RA, "PHYDM h2c[0x40]=0x%x %x %x %x %x %x %x\n", - h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2], h2c_val[1], h2c_val[0]); - - odm_fill_h2c_cmd(dm, PHYDM_H2C_RA_MASK, H2C_MAX_LENGTH, h2c_val); - - #if (defined(PHYDM_COMPILE_ABOVE_3SS)) - if (dm->support_ic_type & (PHYDM_IC_ABOVE_3SS)) { - - h2c_val[3] = (u8)((ra_mask >> 32) & 0x000000ff); - h2c_val[4] = (u8)(((ra_mask >> 32) & 0x0000ff00) >> 8); - h2c_val[5] = (u8)(((ra_mask >> 32) & 0x00ff0000) >> 16); - h2c_val[6] = (u8)(((ra_mask >> 32) & 0xff000000) >> 24); - - PHYDM_DBG(dm, DBG_RA, "PHYDM h2c[0x46]=0x%x %x %x %x %x %x %x\n", - h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2], h2c_val[1], h2c_val[0]); - - odm_fill_h2c_cmd(dm, PHYDM_RA_MASK_ABOVE_3SS, 5, h2c_val); - } - #endif -} - -void -phydm_ra_registed( - void *dm_void, - u8 macid, - u8 rssi_from_assoc -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_t = &dm->dm_ra_table; - struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; - struct ra_sta_info *ra = NULL; - u8 init_ra_lv; - u64 ra_mask; - - if (is_sta_active(sta)) { - ra = &sta->ra_info; - } else { - PHYDM_DBG(dm, DBG_RA_MASK, "[Warning] %s invalid sta_info\n", __func__); - PHYDM_DBG(dm, DBG_RA_MASK, "MACID=%d\n", macid); - return; - } - - PHYDM_DBG(dm, DBG_RA_MASK, "%s ======>\n", __func__); - PHYDM_DBG(dm, DBG_RA_MASK, "MACID=%d, rssi_from_assoc=%d\n", - sta->mac_id, rssi_from_assoc); - - #if (RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1) - if (dm->support_ic_type == ODM_RTL8188E) - ra->rate_id = phydm_get_rate_id_88e(dm, macid); - else - #endif - { - ra->rate_id = phydm_get_rate_id(dm, macid); - } - - /*ra->is_vht_enable = (sta->support_wireless_set | WIRELESS_VHT) ? 1 : 0;*/ - /*ra->disable_ra = 0;*/ - /*ra->disable_pt = 0;*/ - ra_mask = phydm_get_bb_mod_ra_mask(dm, macid); - - - if (rssi_from_assoc > 40) - init_ra_lv = 3; - else if (rssi_from_assoc > 20) - init_ra_lv = 2; - else - init_ra_lv = 1; - - if (ra_t->record_ra_info) - ra_t->record_ra_info(dm, macid, sta, ra_mask); - - #if (RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1) - if (dm->support_ic_type == ODM_RTL8188E) - /*Driver RA*/ - odm_ra_update_rate_info_8188e(dm, macid, ra->rate_id, (u32)ra_mask, ra->is_support_sgi); - else - #endif - { - /*FW RA*/ - phydm_ra_h2c(dm, macid, ra->disable_ra, ra->disable_pt, 0, init_ra_lv, ra_mask); - } - - - -} - -void -phydm_ra_offline( - void *dm_void, - u8 macid -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_t = &dm->dm_ra_table; - struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; - struct ra_sta_info *ra = NULL; - - if (is_sta_active(sta)) { - ra = &sta->ra_info; - } else { - PHYDM_DBG(dm, DBG_RA, "[Warning] %s invalid sta_info\n", __func__); - return; - } - - PHYDM_DBG(dm, DBG_RA, "%s ======>\n", __func__); - PHYDM_DBG(dm, DBG_RA, "MACID=%d\n", sta->mac_id); - - odm_memory_set(dm, &ra->rate_id, 0, sizeof(struct ra_sta_info)); - ra->disable_ra = 1; - ra->disable_pt = 1; - - if (ra_t->record_ra_info) - ra_t->record_ra_info(dm, macid, sta, 0); - - if (dm->support_ic_type != ODM_RTL8188E) - phydm_ra_h2c(dm, macid, ra->disable_ra, ra->disable_pt, 0, 0, 0); -} - -void -phydm_ra_mask_watchdog( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_t = &dm->dm_ra_table; - struct cmn_sta_info *sta = NULL; - struct ra_sta_info *ra = NULL; - u8 macid; - u64 ra_mask; - u8 rssi_lv_new; - - if (!(dm->support_ability & ODM_BB_RA_MASK)) - return; - - if (((!dm->is_linked)) || (dm->phydm_sys_up_time % 2) == 1) - return; - - PHYDM_DBG(dm, DBG_RA_MASK, "%s ======>\n", __func__); - - ra_t->up_ramask_cnt++; - - for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) { - - sta = dm->phydm_sta_info[macid]; - - if (!is_sta_active(sta)) - continue; - - ra = &sta->ra_info; - - if (ra->disable_ra) - continue; - - - /*to be modified*/ - #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) - if ((dm->support_ic_type == ODM_RTL8812) || - ((dm->support_ic_type == ODM_RTL8821) && (dm->cut_version == ODM_CUT_A)) - ) { - - if (sta->rssi_stat.rssi < ra_t->ldpc_thres) { - - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - set_ra_ldpc_8812(sta, true); /*LDPC TX enable*/ - #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) - { - MgntSet_TX_LDPC(macid, true); - } - #endif - PHYDM_DBG(dm, DBG_RA_MASK, "RSSI=%d, ldpc_en =TRUE\n", sta->rssi_stat.rssi); - - } else if (sta->rssi_stat.rssi > (ra_t->ldpc_thres + 3)) { - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - set_ra_ldpc_8812(sta, false); /*LDPC TX disable*/ - #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) - { - MgntSet_TX_LDPC(macid, false); - } - #endif - PHYDM_DBG(dm, DBG_RA_MASK, "RSSI=%d, ldpc_en =FALSE\n", sta->rssi_stat.rssi); - } - } - #endif - - rssi_lv_new = phydm_rssi_lv_dec(dm, (u32)sta->rssi_stat.rssi, ra->rssi_level); - - if ((ra->rssi_level != rssi_lv_new) || - (ra_t->up_ramask_cnt >= FORCED_UPDATE_RAMASK_PERIOD)) { - PHYDM_DBG(dm, DBG_RA_MASK, "RSSI LV:((%d))->((%d))\n", ra->rssi_level, rssi_lv_new); - - ra->rssi_level = rssi_lv_new; - ra_t->up_ramask_cnt = 0; - - ra_mask = phydm_get_bb_mod_ra_mask(dm, macid); - - if (ra_t->record_ra_info) - ra_t->record_ra_info(dm, macid, sta, ra_mask); - - #if (RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1) - if (dm->support_ic_type == ODM_RTL8188E) - /*Driver RA*/ - odm_ra_update_rate_info_8188e(dm, macid, ra->rate_id, (u32)ra_mask, ra->is_support_sgi); - else - #endif - { - /*FW RA*/ - phydm_ra_h2c(dm, macid, ra->disable_ra, ra->disable_pt, 1, 0, ra_mask); - } - } - } - -} -#endif - -u8 -phydm_vht_en_mapping( - void *dm_void, - u32 wireless_mode -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 vht_en_out = 0; - - if ((wireless_mode == PHYDM_WIRELESS_MODE_AC_5G) || - (wireless_mode == PHYDM_WIRELESS_MODE_AC_24G) || - (wireless_mode == PHYDM_WIRELESS_MODE_AC_ONLY) - ) { - vht_en_out = 1; - /**/ - } - - PHYDM_DBG(dm, DBG_RA, "wireless_mode= (( 0x%x )), VHT_EN= (( %d ))\n", wireless_mode, vht_en_out); - return vht_en_out; -} - -u8 -phydm_rate_id_mapping( - void *dm_void, - u32 wireless_mode, - u8 rf_type, - u8 bw -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 rate_id_idx = 0; - - PHYDM_DBG(dm, DBG_RA, "wireless_mode= (( 0x%x )), rf_type = (( 0x%x )), BW = (( 0x%x ))\n", - wireless_mode, rf_type, bw); - - - switch (wireless_mode) { - case PHYDM_WIRELESS_MODE_N_24G: - { - if (bw == CHANNEL_WIDTH_40) { - if (rf_type == RF_1T1R) - rate_id_idx = PHYDM_BGN_40M_1SS; - else if (rf_type == RF_2T2R) - rate_id_idx = PHYDM_BGN_40M_2SS; - else - rate_id_idx = PHYDM_ARFR5_N_3SS; - - } else { - if (rf_type == RF_1T1R) - rate_id_idx = PHYDM_BGN_20M_1SS; - else if (rf_type == RF_2T2R) - rate_id_idx = PHYDM_BGN_20M_2SS; - else - rate_id_idx = PHYDM_ARFR5_N_3SS; - } - } - break; - - case PHYDM_WIRELESS_MODE_N_5G: - { - if (rf_type == RF_1T1R) - rate_id_idx = PHYDM_GN_N1SS; - else if (rf_type == RF_2T2R) - rate_id_idx = PHYDM_GN_N2SS; - else - rate_id_idx = PHYDM_ARFR5_N_3SS; - } - - break; - - case PHYDM_WIRELESS_MODE_G: - rate_id_idx = PHYDM_BG; - break; - - case PHYDM_WIRELESS_MODE_A: - rate_id_idx = PHYDM_G; - break; - - case PHYDM_WIRELESS_MODE_B: - rate_id_idx = PHYDM_B_20M; - break; - - - case PHYDM_WIRELESS_MODE_AC_5G: - case PHYDM_WIRELESS_MODE_AC_ONLY: - { - if (rf_type == RF_1T1R) - rate_id_idx = PHYDM_ARFR1_AC_1SS; - else if (rf_type == RF_2T2R) - rate_id_idx = PHYDM_ARFR0_AC_2SS; - else - rate_id_idx = PHYDM_ARFR4_AC_3SS; - } - break; - - case PHYDM_WIRELESS_MODE_AC_24G: - { - /*Becareful to set "Lowest rate" while using PHYDM_ARFR4_AC_3SS in 2.4G/5G*/ - if (bw >= CHANNEL_WIDTH_80) { - if (rf_type == RF_1T1R) - rate_id_idx = PHYDM_ARFR1_AC_1SS; - else if (rf_type == RF_2T2R) - rate_id_idx = PHYDM_ARFR0_AC_2SS; - else - rate_id_idx = PHYDM_ARFR4_AC_3SS; - } else { - if (rf_type == RF_1T1R) - rate_id_idx = PHYDM_ARFR2_AC_2G_1SS; - else if (rf_type == RF_2T2R) - rate_id_idx = PHYDM_ARFR3_AC_2G_2SS; - else - rate_id_idx = PHYDM_ARFR4_AC_3SS; - } - } - break; - - default: - rate_id_idx = 0; - break; - } - - PHYDM_DBG(dm, DBG_RA, "RA rate ID = (( 0x%x ))\n", rate_id_idx); - - return rate_id_idx; -} - -void -phydm_update_hal_ra_mask( - void *dm_void, - u32 wireless_mode, - u8 rf_type, - u8 bw, - u8 mimo_ps_enable, - u8 disable_cck_rate, - u32 *ratr_bitmap_msb_in, - u32 *ratr_bitmap_lsb_in, - u8 tx_rate_level -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 ratr_bitmap = *ratr_bitmap_lsb_in, ratr_bitmap_msb = *ratr_bitmap_msb_in; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 ratr_bitmap = *ratr_bitmap_lsb_in; + u32 ratr_bitmap_msb = *ratr_bitmap_msb_in; +#if 0 /*PHYDM_DBG(dm, DBG_RA_MASK, "phydm_rf_type = (( %x )), rf_type = (( %x ))\n", phydm_rf_type, rf_type);*/ - PHYDM_DBG(dm, DBG_RA_MASK, "Platfoem original RA Mask = (( 0x %x | %x ))\n", ratr_bitmap_msb, ratr_bitmap); +#endif + PHYDM_DBG(dm, DBG_RA_MASK, + "Platfoem original RA Mask = (( 0x %x | %x ))\n", + ratr_bitmap_msb, ratr_bitmap); switch (wireless_mode) { - case PHYDM_WIRELESS_MODE_B: - { + case PHYDM_WIRELESS_MODE_B: { ratr_bitmap &= 0x0000000f; - } - break; + } break; - case PHYDM_WIRELESS_MODE_G: - { + case PHYDM_WIRELESS_MODE_G: { ratr_bitmap &= 0x00000ff5; - } - break; + } break; - case PHYDM_WIRELESS_MODE_A: - { + case PHYDM_WIRELESS_MODE_A: { ratr_bitmap &= 0x00000ff0; - } - break; + } break; case PHYDM_WIRELESS_MODE_N_24G: - case PHYDM_WIRELESS_MODE_N_5G: - { + case PHYDM_WIRELESS_MODE_N_5G: { if (mimo_ps_enable) rf_type = RF_1T1R; @@ -1485,51 +588,46 @@ phydm_update_hal_ra_mask( ratr_bitmap &= 0x0ffff015; else ratr_bitmap &= 0x0ffff005; - } else { /*3T*/ + } else { /*@3T*/ ratr_bitmap &= 0xfffff015; ratr_bitmap_msb &= 0xf; } - } - break; + } break; - case PHYDM_WIRELESS_MODE_AC_24G: - { - if (rf_type == RF_1T1R) + case PHYDM_WIRELESS_MODE_AC_24G: { + if (rf_type == RF_1T1R) { ratr_bitmap &= 0x003ff015; - else if (rf_type == RF_2T2R || rf_type == RF_2T4R || rf_type == RF_2T3R) + } else if (rf_type == RF_2T2R || rf_type == RF_2T4R || rf_type == RF_2T3R) { ratr_bitmap &= 0xfffff015; - else {/*3T*/ + } else { /*@3T*/ ratr_bitmap &= 0xfffff010; ratr_bitmap_msb &= 0x3ff; } - if (bw == CHANNEL_WIDTH_20) {/* AC 20MHz doesn't support MCS9 */ + if (bw == CHANNEL_WIDTH_20) { /*@AC 20MHz not support MCS9*/ ratr_bitmap &= 0x7fdfffff; ratr_bitmap_msb &= 0x1ff; } - } - break; + } break; - case PHYDM_WIRELESS_MODE_AC_5G: - { - if (rf_type == RF_1T1R) + case PHYDM_WIRELESS_MODE_AC_5G: { + if (rf_type == RF_1T1R) { ratr_bitmap &= 0x003ff010; - else if (rf_type == RF_2T2R || rf_type == RF_2T4R || rf_type == RF_2T3R) + } else if (rf_type == RF_2T2R || rf_type == RF_2T4R || rf_type == RF_2T3R) { ratr_bitmap &= 0xfffff010; - else {/*3T*/ + } else { /*@3T*/ ratr_bitmap &= 0xfffff010; ratr_bitmap_msb &= 0x3ff; } - if (bw == CHANNEL_WIDTH_20) {/* AC 20MHz doesn't support MCS9 */ + if (bw == CHANNEL_WIDTH_20) { /*@AC 20MHz not support MCS9*/ ratr_bitmap &= 0x7fdfffff; ratr_bitmap_msb &= 0x1ff; } - } - break; + } break; default: break; @@ -1537,115 +635,1033 @@ phydm_update_hal_ra_mask( if (wireless_mode != PHYDM_WIRELESS_MODE_B) { if (tx_rate_level == 0) - ratr_bitmap &= 0xffffffff; + ratr_bitmap &= 0xffffffff; else if (tx_rate_level == 1) - ratr_bitmap &= 0xfffffff0; + ratr_bitmap &= 0xfffffff0; else if (tx_rate_level == 2) - ratr_bitmap &= 0xffffefe0; + ratr_bitmap &= 0xffffefe0; else if (tx_rate_level == 3) - ratr_bitmap &= 0xffffcfc0; + ratr_bitmap &= 0xffffcfc0; else if (tx_rate_level == 4) - ratr_bitmap &= 0xffff8f80; + ratr_bitmap &= 0xffff8f80; else if (tx_rate_level >= 5) - ratr_bitmap &= 0xffff0f00; - + ratr_bitmap &= 0xffff0f00; } if (disable_cck_rate) ratr_bitmap &= 0xfffffff0; - PHYDM_DBG(dm, DBG_RA_MASK, "wireless_mode= (( 0x%x )), rf_type = (( 0x%x )), BW = (( 0x%x )), MimoPs_en = (( %d )), tx_rate_level= (( 0x%x ))\n", - wireless_mode, rf_type, bw, mimo_ps_enable, tx_rate_level); + PHYDM_DBG(dm, DBG_RA_MASK, + "wireless_mode= (( 0x%x )), rf_type = (( 0x%x )), BW = (( 0x%x )), MimoPs_en = (( %d )), tx_rate_level= (( 0x%x ))\n", + wireless_mode, rf_type, bw, mimo_ps_enable, tx_rate_level); +#if 0 /*PHYDM_DBG(dm, DBG_RA_MASK, "111 Phydm modified RA Mask = (( 0x %x | %x ))\n", ratr_bitmap_msb, ratr_bitmap);*/ +#endif *ratr_bitmap_lsb_in = ratr_bitmap; *ratr_bitmap_msb_in = ratr_bitmap_msb; - PHYDM_DBG(dm, DBG_RA_MASK, "Phydm modified RA Mask = (( 0x %x | %x ))\n", *ratr_bitmap_msb_in, *ratr_bitmap_lsb_in); - + PHYDM_DBG(dm, DBG_RA_MASK, + "Phydm modified RA Mask = (( 0x %x | %x ))\n", + *ratr_bitmap_msb_in, *ratr_bitmap_lsb_in); } -u8 -phydm_rssi_lv_dec( - void *dm_void, - u32 rssi, - u8 ratr_state -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 rssi_lv_table[RA_FLOOR_TABLE_SIZE] = {20, 34, 38, 42, 46, 50, 100}; /*MCS0 ~ MCS4 , VHT1SS MCS0 ~ MCS4 , G 6M~24M*/ - u8 new_rssi_lv = 0; - u8 i; +#endif - PHYDM_DBG(dm, DBG_RA_MASK, "curr RA level=(%d), Table_ori=[%d, %d, %d, %d, %d, %d]\n", - ratr_state, rssi_lv_table[0], rssi_lv_table[1], rssi_lv_table[2], rssi_lv_table[3], rssi_lv_table[4], rssi_lv_table[5]); +void phydm_rate_adaptive_mask_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_t = &dm->dm_ra_table; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PADAPTER adapter = dm->adapter; + PMGNT_INFO mgnt_info = &(adapter->MgntInfo); + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)dm->adapter)); + + if (mgnt_info->DM_Type == dm_type_by_driver) + hal_data->bUseRAMask = true; + else + hal_data->bUseRAMask = false; + +#endif + + ra_t->ldpc_thres = 35; + ra_t->up_ramask_cnt = 0; + ra_t->up_ramask_cnt_tmp = 0; +} + +void phydm_refresh_rate_adaptive_mask(void *dm_void) +{ +/*@Will be removed*/ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + phydm_ra_mask_watchdog(dm); +} + +void phydm_show_sta_info(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta = NULL; + struct ra_sta_info *ra = NULL; +#ifdef CONFIG_BEAMFORMING + struct bf_cmn_info *bf = NULL; +#endif + char help[] = "-h"; + u32 var[10] = {0}; + u32 used = *_used; + u32 out_len = *_out_len; + u32 i, sta_idx_start, sta_idx_end; + u8 tatal_sta_num = 0; + + PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var[0]); + + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "All STA: {1}\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "STA[macid]: {2} {macid}\n"); + return; + } else if (var[0] == 1) { + sta_idx_start = 0; + sta_idx_end = ODM_ASSOCIATE_ENTRY_NUM; + } else if (var[0] == 2) { + sta_idx_start = var[1]; + sta_idx_end = var[1]; + } else { + PDM_SNPF(out_len, used, output + used, out_len - used, + "Warning input value!\n"); + return; + } + + for (i = sta_idx_start; i < sta_idx_end; i++) { + sta = dm->phydm_sta_info[i]; + + if (!is_sta_active(sta)) + continue; + + ra = &sta->ra_info; + #ifdef CONFIG_BEAMFORMING + bf = &sta->bf_info; + #endif + + tatal_sta_num++; + + PDM_SNPF(out_len, used, output + used, out_len - used, + "==[sta_idx: %d][MACID: %d]============>\n", i, + sta->mac_id); + PDM_SNPF(out_len, used, output + used, out_len - used, + "AID:%d\n", sta->aid); + PDM_SNPF(out_len, used, output + used, out_len - used, + "ADDR:%x-%x-%x-%x-%x-%x\n", sta->mac_addr[5], + sta->mac_addr[4], sta->mac_addr[3], sta->mac_addr[2], + sta->mac_addr[1], sta->mac_addr[0]); + PDM_SNPF(out_len, used, output + used, out_len - used, + "DM_ctrl:0x%x\n", sta->dm_ctrl); + PDM_SNPF(out_len, used, output + used, out_len - used, + "BW:%d, MIMO_Type:0x%x\n", sta->bw_mode, + sta->mimo_type); + PDM_SNPF(out_len, used, output + used, out_len - used, + "STBC_en:%d, LDPC_en=%d\n", sta->stbc_en, + sta->ldpc_en); + + /*@[RSSI Info]*/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "RSSI{All, OFDM, CCK}={%d, %d, %d}\n", + sta->rssi_stat.rssi, sta->rssi_stat.rssi_ofdm, + sta->rssi_stat.rssi_cck); + + /*@[RA Info]*/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "Rate_ID:%d, RSSI_LV:%d, ra_bw:%d, SGI_en:%d\n", + ra->rate_id, ra->rssi_level, ra->ra_bw_mode, + ra->is_support_sgi); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "VHT_en:%d, Wireless_set=0x%x, sm_ps=%d\n", + ra->is_vht_enable, sta->support_wireless_set, + sta->sm_ps); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "Dis{RA, PT}={%d, %d}, TxRx:%d, Noisy:%d\n", + ra->disable_ra, ra->disable_pt, ra->txrx_state, + ra->is_noisy); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "TX{Rate, BW}={0x%x, %d}, RTY:%d\n", ra->curr_tx_rate, + ra->curr_tx_bw, ra->curr_retry_ratio); + + PDM_SNPF(out_len, used, output + used, out_len - used, + "RA_Mask:0x%llx\n", ra->ramask); + + /*@[TP]*/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "TP{TX,RX}={%d, %d}\n", sta->tx_moving_average_tp, + sta->rx_moving_average_tp); + +#ifdef CONFIG_BEAMFORMING + /*@[Beamforming]*/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "BF CAP{HT,VHT}={0x%x, 0x%x}\n", bf->ht_beamform_cap, + bf->vht_beamform_cap); + PDM_SNPF(out_len, used, output + used, out_len - used, + "BF {p_aid,g_id}={0x%x, 0x%x}\n\n", bf->p_aid, + bf->g_id); +#endif + } + + if (tatal_sta_num == 0) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "No Linked STA\n"); + } + + *_used = used; + *_out_len = out_len; +} + +u8 phydm_get_rx_stream_num(void *dm_void, enum rf_type type) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 rx_num = 1; + + if (type == RF_1T1R) + rx_num = 1; + else if (type == RF_2T2R || type == RF_1T2R) + rx_num = 2; + else if (type == RF_3T3R || type == RF_2T3R) + rx_num = 3; + else if (type == RF_4T4R || type == RF_3T4R || type == RF_2T4R) + rx_num = 4; + else + pr_debug("[Warrning] %s\n", __func__); + + return rx_num; +} + +u8 phydm_get_tx_stream_num(void *dm_void, enum rf_type type) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 tx_num = 1; + + if (type == RF_1T1R || type == RF_1T2R) + tx_num = 1; + else if (type == RF_2T2R || type == RF_2T3R || type == RF_2T4R) + tx_num = 2; + else if (type == RF_3T3R || type == RF_3T4R) + tx_num = 3; + else if (type == RF_4T4R) + tx_num = 4; + else + PHYDM_DBG(dm, DBG_RA, "[Warrning] no mimo_type is found\n"); + + return tx_num; +} + +u64 phydm_get_bb_mod_ra_mask(void *dm_void, u8 sta_idx) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; + struct ra_sta_info *ra = NULL; + enum channel_width bw = 0; + enum wireless_set wrls_mode = 0; + u8 tx_stream_num = 1; + u8 rssi_lv = 0; + u64 ra_mask_bitmap = 0; + + if (is_sta_active(sta)) { + ra = &sta->ra_info; + bw = ra->ra_bw_mode; + wrls_mode = sta->support_wireless_set; + tx_stream_num = phydm_get_tx_stream_num(dm, sta->mimo_type); + rssi_lv = ra->rssi_level; + ra_mask_bitmap = ra->ramask; + } else { + PHYDM_DBG(dm, DBG_RA, "[Warning] %s invalid STA\n", __func__); + return 0; + } + + PHYDM_DBG(dm, DBG_RA, "macid=%d ori_RA_Mask= 0x%llx\n", sta->mac_id, + ra_mask_bitmap); + PHYDM_DBG(dm, DBG_RA, + "wireless_mode=0x%x, tx_ss=%d, BW=%d, MimoPs=%d, rssi_lv=%d\n", + wrls_mode, tx_stream_num, bw, sta->sm_ps, rssi_lv); + + if (sta->sm_ps == SM_PS_STATIC) /*@mimo_ps_enable*/ + tx_stream_num = 1; + + /*@[Modify RA Mask by Wireless Mode]*/ + + if (wrls_mode == WIRELESS_CCK) { /*@B mode*/ + ra_mask_bitmap &= 0x0000000f; + } else if (wrls_mode == WIRELESS_OFDM) { /*@G mode*/ + ra_mask_bitmap &= 0x00000ff0; + } else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM)) { /*@BG mode*/ + ra_mask_bitmap &= 0x00000ff5; + } else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT)) { + /*N_2G*/ + if (tx_stream_num == 1) { + if (bw == CHANNEL_WIDTH_40) + ra_mask_bitmap &= 0x000ff015; + else + ra_mask_bitmap &= 0x000ff005; + } else if (tx_stream_num == 2) { + if (bw == CHANNEL_WIDTH_40) + ra_mask_bitmap &= 0x0ffff015; + else + ra_mask_bitmap &= 0x0ffff005; + } else if (tx_stream_num == 3) { + ra_mask_bitmap &= 0xffffff015; + } else { + ra_mask_bitmap &= 0xffffffff015; + } + } else if (wrls_mode == (WIRELESS_OFDM | WIRELESS_HT)) { /*N_5G*/ + + if (tx_stream_num == 1) { + if (bw == CHANNEL_WIDTH_40) + ra_mask_bitmap &= 0x000ff030; + else + ra_mask_bitmap &= 0x000ff010; + } else if (tx_stream_num == 2) { + if (bw == CHANNEL_WIDTH_40) + ra_mask_bitmap &= 0x0ffff030; + else + ra_mask_bitmap &= 0x0ffff010; + } else if (tx_stream_num == 3) { + ra_mask_bitmap &= 0xffffff010; + } else { + ra_mask_bitmap &= 0xffffffff010; + } + } else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT)) { + /*@AC_2G*/ + if (tx_stream_num == 1) + ra_mask_bitmap &= 0x003ff015; + else if (tx_stream_num == 2) + ra_mask_bitmap &= 0xfffff015; + else if (tx_stream_num == 3) + ra_mask_bitmap &= 0x3fffffff015; + else /*@AC_4SS 2G*/ + ra_mask_bitmap &= 0x000ffffffffff015; + if (bw == CHANNEL_WIDTH_20) { + /* @AC 20MHz doesn't support MCS9 except 3SS & 6SS*/ + ra_mask_bitmap &= 0x0007ffff7fdff015; + } else if (bw == CHANNEL_WIDTH_80) { + /* @AC 80MHz doesn't support 3SS MCS6*/ + ra_mask_bitmap &= 0x000fffbffffff015; + } + } else if (wrls_mode == (WIRELESS_OFDM | WIRELESS_VHT)) { /*@AC_5G*/ + + if (tx_stream_num == 1) + ra_mask_bitmap &= 0x003ff010; + else if (tx_stream_num == 2) + ra_mask_bitmap &= 0xfffff010; + else if (tx_stream_num == 3) + ra_mask_bitmap &= 0x3fffffff010; + else /*@AC_4SS 5G*/ + ra_mask_bitmap &= 0x000ffffffffff010; + + if (bw == CHANNEL_WIDTH_20) { + /* @AC 20MHz doesn't support MCS9 except 3SS & 6SS*/ + ra_mask_bitmap &= 0x0007ffff7fdff010; + } else if (bw == CHANNEL_WIDTH_80) { + /* @AC 80MHz doesn't support 3SS MCS6*/ + ra_mask_bitmap &= 0x000fffbffffff010; + } + } else { + PHYDM_DBG(dm, DBG_RA, "[Warrning] RA mask is Not found\n"); + } + + PHYDM_DBG(dm, DBG_RA, "Mod by mode=0x%llx\n", ra_mask_bitmap); + + /*@[Modify RA Mask by RSSI level]*/ + if (wrls_mode != WIRELESS_CCK) { + if (rssi_lv == 0) + ra_mask_bitmap &= 0xffffffffffffffff; + else if (rssi_lv == 1) + ra_mask_bitmap &= 0xfffffffffffffff0; + else if (rssi_lv == 2) + ra_mask_bitmap &= 0xffffffffffffefe0; + else if (rssi_lv == 3) + ra_mask_bitmap &= 0xffffffffffffcfc0; + else if (rssi_lv == 4) + ra_mask_bitmap &= 0xffffffffffff8f80; + else if (rssi_lv >= 5) + ra_mask_bitmap &= 0xffffffffffff0f00; + } + PHYDM_DBG(dm, DBG_RA, "Mod by RSSI=0x%llx\n", ra_mask_bitmap); + + return ra_mask_bitmap; +} + +u8 phydm_get_rate_from_rssi_lv(void *dm_void, u8 sta_idx) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; + struct ra_sta_info *ra = NULL; + enum wireless_set wrls_set = 0; + u8 rssi_lv = 0; + u8 rate_idx = 0; + u8 rate_ofst = 0; + + if (is_sta_active(sta)) { + ra = &sta->ra_info; + wrls_set = sta->support_wireless_set; + rssi_lv = ra->rssi_level; + } else { + pr_debug("[Warning] %s: invalid STA\n", __func__); + return 0; + } + + PHYDM_DBG(dm, DBG_RA, "[%s]macid=%d, wireless_set=0x%x, rssi_lv=%d\n", + __func__, sta->mac_id, wrls_set, rssi_lv); + + rate_ofst = (rssi_lv <= 1) ? 0 : (rssi_lv - 1); + + if (wrls_set & WIRELESS_VHT) { + rate_idx = ODM_RATEVHTSS1MCS0 + rate_ofst; + } else if (wrls_set & WIRELESS_HT) { + rate_idx = ODM_RATEMCS0 + rate_ofst; + } else if (wrls_set & WIRELESS_OFDM) { + rate_idx = ODM_RATE6M + rate_ofst; + } else { + rate_idx = ODM_RATE1M + rate_ofst; + + if (rate_idx > ODM_RATE11M) + rate_idx = ODM_RATE11M; + } + return rate_idx; +} + +u8 phydm_get_rate_id(void *dm_void, u8 sta_idx) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; + struct ra_sta_info *ra = NULL; + enum channel_width bw = 0; + enum wireless_set wrls_mode = 0; + u8 tx_stream_num = 1; + u8 rate_id_idx = PHYDM_BGN_20M_1SS; + + if (is_sta_active(sta)) { + ra = &sta->ra_info; + bw = ra->ra_bw_mode; + wrls_mode = sta->support_wireless_set; + tx_stream_num = phydm_get_tx_stream_num(dm, sta->mimo_type); + + } else { + PHYDM_DBG(dm, DBG_RA, "[Warning] %s: invalid STA\n", __func__); + return 0; + } + + PHYDM_DBG(dm, DBG_RA, "macid=%d,wireless_set=0x%x,tx_SS_num=%d,BW=%d\n", + sta->mac_id, wrls_mode, tx_stream_num, bw); + + if (wrls_mode == WIRELESS_CCK) { + /*@B mode*/ + rate_id_idx = PHYDM_B_20M; + } else if (wrls_mode == WIRELESS_OFDM) { + /*@G mode*/ + rate_id_idx = PHYDM_G; + } else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM)) { + /*@BG mode*/ + rate_id_idx = PHYDM_BG; + } else if (wrls_mode == (WIRELESS_OFDM | WIRELESS_HT)) { + /*@GN mode*/ + if (tx_stream_num == 1) + rate_id_idx = PHYDM_GN_N1SS; + else if (tx_stream_num == 2) + rate_id_idx = PHYDM_GN_N2SS; + else if (tx_stream_num == 3) + rate_id_idx = PHYDM_ARFR5_N_3SS; + } else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT)) { + /*@BGN mode*/ + if (bw == CHANNEL_WIDTH_40) { + if (tx_stream_num == 1) + rate_id_idx = PHYDM_BGN_40M_1SS; + else if (tx_stream_num == 2) + rate_id_idx = PHYDM_BGN_40M_2SS; + else if (tx_stream_num == 3) + rate_id_idx = PHYDM_ARFR5_N_3SS; + else if (tx_stream_num == 4) + rate_id_idx = PHYDM_ARFR7_N_4SS; + + } else { + if (tx_stream_num == 1) + rate_id_idx = PHYDM_BGN_20M_1SS; + else if (tx_stream_num == 2) + rate_id_idx = PHYDM_BGN_20M_2SS; + else if (tx_stream_num == 3) + rate_id_idx = PHYDM_ARFR5_N_3SS; + else if (tx_stream_num == 4) + rate_id_idx = PHYDM_ARFR7_N_4SS; + } + } else if (wrls_mode == (WIRELESS_OFDM | WIRELESS_VHT)) { + /*@AC mode*/ + if (tx_stream_num == 1) + rate_id_idx = PHYDM_ARFR1_AC_1SS; + else if (tx_stream_num == 2) + rate_id_idx = PHYDM_ARFR0_AC_2SS; + else if (tx_stream_num == 3) + rate_id_idx = PHYDM_ARFR4_AC_3SS; + else if (tx_stream_num == 4) + rate_id_idx = PHYDM_ARFR6_AC_4SS; + } else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT)) { + /*@AC 2.4G mode*/ + if (bw >= CHANNEL_WIDTH_80) { + if (tx_stream_num == 1) + rate_id_idx = PHYDM_ARFR1_AC_1SS; + else if (tx_stream_num == 2) + rate_id_idx = PHYDM_ARFR0_AC_2SS; + else if (tx_stream_num == 3) + rate_id_idx = PHYDM_ARFR4_AC_3SS; + else if (tx_stream_num == 4) + rate_id_idx = PHYDM_ARFR6_AC_4SS; + } else { + if (tx_stream_num == 1) + rate_id_idx = PHYDM_ARFR2_AC_2G_1SS; + else if (tx_stream_num == 2) + rate_id_idx = PHYDM_ARFR3_AC_2G_2SS; + else if (tx_stream_num == 3) + rate_id_idx = PHYDM_ARFR4_AC_3SS; + else if (tx_stream_num == 4) + rate_id_idx = PHYDM_ARFR6_AC_4SS; + } + } else { + PHYDM_DBG(dm, DBG_RA, "[Warrning] No rate_id is found\n"); + rate_id_idx = 0; + } + + PHYDM_DBG(dm, DBG_RA, "Rate_ID=((0x%x))\n", rate_id_idx); + + return rate_id_idx; +} + +void phydm_ra_h2c(void *dm_void, u8 sta_idx, u8 dis_ra, u8 dis_pt, + u8 no_update_bw, u8 init_ra_lv, u64 ra_mask) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; + struct ra_sta_info *ra = NULL; + u8 h2c_val[H2C_MAX_LENGTH] = {0}; + + if (is_sta_active(sta)) { + ra = &sta->ra_info; + } else { + PHYDM_DBG(dm, DBG_RA, "[Warning] %s invalid sta_info\n", + __func__); + return; + } + + PHYDM_DBG(dm, DBG_RA, "%s ======>\n", __func__); + PHYDM_DBG(dm, DBG_RA, "MACID=%d\n", sta->mac_id); + + if (dm->is_disable_power_training) + dis_pt = true; + else if (!dm->is_disable_power_training) + dis_pt = false; + + h2c_val[0] = sta->mac_id; + h2c_val[1] = (ra->rate_id & 0x1f) | ((init_ra_lv & 0x3) << 5) | + (ra->is_support_sgi << 7); + h2c_val[2] = (u8)((ra->ra_bw_mode) | (((sta->ldpc_en) ? 1 : 0) << 2) | + ((no_update_bw & 0x1) << 3) | + (ra->is_vht_enable << 4) | + ((dis_pt & 0x1) << 6) | ((dis_ra & 0x1) << 7)); + + h2c_val[3] = (u8)(ra_mask & 0xff); + h2c_val[4] = (u8)((ra_mask & 0xff00) >> 8); + h2c_val[5] = (u8)((ra_mask & 0xff0000) >> 16); + h2c_val[6] = (u8)((ra_mask & 0xff000000) >> 24); + + PHYDM_DBG(dm, DBG_RA, "PHYDM h2c[0x40]=0x%x %x %x %x %x %x %x\n", + h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2], + h2c_val[1], h2c_val[0]); + + odm_fill_h2c_cmd(dm, PHYDM_H2C_RA_MASK, H2C_MAX_LENGTH, h2c_val); + + #if (defined(PHYDM_COMPILE_ABOVE_3SS)) + if (dm->support_ic_type & (PHYDM_IC_ABOVE_3SS)) { + h2c_val[3] = (u8)((ra_mask >> 32) & 0x000000ff); + h2c_val[4] = (u8)(((ra_mask >> 32) & 0x0000ff00) >> 8); + h2c_val[5] = (u8)(((ra_mask >> 32) & 0x00ff0000) >> 16); + h2c_val[6] = (u8)(((ra_mask >> 32) & 0xff000000) >> 24); + + PHYDM_DBG(dm, DBG_RA, "h2c[0x46]=0x%x %x %x %x %x %x %x\n", + h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], + h2c_val[2], h2c_val[1], h2c_val[0]); + + odm_fill_h2c_cmd(dm, PHYDM_RA_MASK_ABOVE_3SS, + H2C_MAX_LENGTH, h2c_val); + } + #endif +} + +void phydm_ra_registed(void *dm_void, u8 sta_idx, + /*@index of sta_info array, not MACID*/ + u8 rssi_from_assoc) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_t = &dm->dm_ra_table; + struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; + struct ra_sta_info *ra = NULL; + u8 init_ra_lv = 0; + u64 ra_mask = 0; + /*@SD7 STA_idx != macid*/ + /*@SD4,8 STA_idx == macid, */ + + PHYDM_DBG(dm, DBG_RA_MASK, "%s ======>\n", __func__); + + if (is_sta_active(sta)) { + ra = &sta->ra_info; + PHYDM_DBG(dm, DBG_RA_MASK, "sta_idx=%d, macid=%d\n", sta_idx, + sta->mac_id); + } else { + PHYDM_DBG(dm, DBG_RA_MASK, "[Warning] %s invalid STA\n", + __func__); + PHYDM_DBG(dm, DBG_RA_MASK, "sta_idx=%d\n", sta_idx); + return; + } + + #if (RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8188E) + ra->rate_id = phydm_get_rate_id_88e(dm, sta_idx); + else + #endif + { + ra->rate_id = phydm_get_rate_id(dm, sta_idx); + } + + ra_mask = phydm_get_bb_mod_ra_mask(dm, sta_idx); + + PHYDM_DBG(dm, DBG_RA_MASK, "rssi_assoc=%d\n", rssi_from_assoc); + + if (rssi_from_assoc > 40) + init_ra_lv = 1; + else if (rssi_from_assoc > 20) + init_ra_lv = 2; + else if (rssi_from_assoc > 1) + init_ra_lv = 3; + else + init_ra_lv = 0; + + if (ra_t->record_ra_info) + ra_t->record_ra_info(dm, sta_idx, sta, ra_mask); + + #if (RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8188E) + /*@Driver RA*/ + phydm_ra_update_8188e(dm, sta_idx, ra->rate_id, + (u32)ra_mask, ra->is_support_sgi); + else + #endif + { + /*@FW RA*/ + phydm_ra_h2c(dm, sta_idx, ra->disable_ra, ra->disable_pt, 0, + init_ra_lv, ra_mask); + } +} + +void phydm_ra_offline(void *dm_void, u8 sta_idx) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_t = &dm->dm_ra_table; + struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; + struct ra_sta_info *ra = NULL; + + if (is_sta_active(sta)) { + ra = &sta->ra_info; + } else { + PHYDM_DBG(dm, DBG_RA, "[Warning] %s invalid STA\n", __func__); + return; + } + + PHYDM_DBG(dm, DBG_RA, "%s ======>\n", __func__); + PHYDM_DBG(dm, DBG_RA, "MACID=%d\n", sta->mac_id); + + odm_memory_set(dm, &ra->rate_id, 0, sizeof(struct ra_sta_info)); + ra->disable_ra = 1; + ra->disable_pt = 1; + + if (ra_t->record_ra_info) + ra_t->record_ra_info(dm, sta->mac_id, sta, 0); + + if (dm->support_ic_type != ODM_RTL8188E) + phydm_ra_h2c(dm, sta->mac_id, 1, 1, 0, 0, 0); +} + +void phydm_ra_mask_watchdog(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_t = &dm->dm_ra_table; + struct cmn_sta_info *sta = NULL; + struct ra_sta_info *ra = NULL; + boolean force_ra_mask_en = false; + u8 sta_idx; + u64 ra_mask; + u8 rssi_lv_new; + u8 rssi = 0; + + if (!(dm->support_ability & ODM_BB_RA_MASK)) + return; + + if (!dm->is_linked || (dm->phydm_sys_up_time % 2) == 1) + return; + + PHYDM_DBG(dm, DBG_RA_MASK, "%s ======>\n", __func__); + + ra_t->up_ramask_cnt++; + + if (ra_t->up_ramask_cnt >= FORCED_UPDATE_RAMASK_PERIOD) { + ra_t->up_ramask_cnt = 0; + force_ra_mask_en = true; + } + + for (sta_idx = 0; sta_idx < ODM_ASSOCIATE_ENTRY_NUM; sta_idx++) { + sta = dm->phydm_sta_info[sta_idx]; + + if (!is_sta_active(sta)) + continue; + + ra = &sta->ra_info; + + if (ra->disable_ra) + continue; + + PHYDM_DBG(dm, DBG_RA_MASK, "sta_idx=%d, macid=%d\n", sta_idx, + sta->mac_id); + + rssi = (u8)(sta->rssi_stat.rssi); + + /*@to be modified*/ + #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) + if (dm->support_ic_type == ODM_RTL8812 || + (dm->support_ic_type == ODM_RTL8821 && + dm->cut_version == ODM_CUT_A) + ) { + if (rssi < ra_t->ldpc_thres) { + /*@LDPC TX enable*/ + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + set_ra_ldpc_8812(sta, true); + #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) + MgntSet_TX_LDPC(dm->adapter, sta->mac_id, true); + #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) + /*to be added*/ + #endif + PHYDM_DBG(dm, DBG_RA_MASK, + "RSSI=%d, ldpc_en =TRUE\n", rssi); + + } else if (rssi > (ra_t->ldpc_thres + 3)) { + /*@LDPC TX disable*/ + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + set_ra_ldpc_8812(sta, false); + #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) + MgntSet_TX_LDPC(dm->adapter, sta->mac_id, false); + #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) + /*to be added*/ + #endif + PHYDM_DBG(dm, DBG_RA_MASK, + "RSSI=%d, ldpc_en =FALSE\n", rssi); + } + } + #endif + + rssi_lv_new = phydm_rssi_lv_dec(dm, (u32)rssi, ra->rssi_level); + + if (ra->rssi_level != rssi_lv_new || force_ra_mask_en) { + PHYDM_DBG(dm, DBG_RA_MASK, "RSSI LV:((%d))->((%d))\n", + ra->rssi_level, rssi_lv_new); + + ra->rssi_level = rssi_lv_new; + + ra_mask = phydm_get_bb_mod_ra_mask(dm, sta_idx); + + if (ra_t->record_ra_info) + ra_t->record_ra_info(dm, sta_idx, sta, ra_mask); + + #if (RTL8188E_SUPPORT) && (RATE_ADAPTIVE_SUPPORT) + if (dm->support_ic_type == ODM_RTL8188E) + /*@Driver RA*/ + phydm_ra_update_8188e(dm, sta_idx, ra->rate_id, + (u32)ra_mask, + ra->is_support_sgi); + else + #endif + { + /*@FW RA*/ + phydm_ra_h2c(dm, sta_idx, ra->disable_ra, + ra->disable_pt, 1, 0, ra_mask); + } + } + } +} + +u8 phydm_vht_en_mapping(void *dm_void, u32 wireless_mode) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 vht_en_out = 0; + + if (wireless_mode == PHYDM_WIRELESS_MODE_AC_5G || + wireless_mode == PHYDM_WIRELESS_MODE_AC_24G || + wireless_mode == PHYDM_WIRELESS_MODE_AC_ONLY) + vht_en_out = 1; + + PHYDM_DBG(dm, DBG_RA, "wireless_mode= (( 0x%x )), VHT_EN= (( %d ))\n", + wireless_mode, vht_en_out); + return vht_en_out; +} + +u8 phydm_rftype2rateid_2g_n20(void *dm_void, u8 rf_type) +{ + u8 rate_id_idx = 0; + + if (rf_type == RF_1T1R) + rate_id_idx = PHYDM_BGN_20M_1SS; + else if (rf_type == RF_2T2R) + rate_id_idx = PHYDM_BGN_20M_2SS; + else if (rf_type == RF_3T3R) + rate_id_idx = PHYDM_ARFR5_N_3SS; + else + rate_id_idx = PHYDM_ARFR7_N_4SS; + return rate_id_idx; +} + +u8 phydm_rftype2rateid_2g_n40(void *dm_void, u8 rf_type) +{ + u8 rate_id_idx = 0; + + if (rf_type == RF_1T1R) + rate_id_idx = PHYDM_BGN_40M_1SS; + else if (rf_type == RF_2T2R) + rate_id_idx = PHYDM_BGN_40M_2SS; + else if (rf_type == RF_3T3R) + rate_id_idx = PHYDM_ARFR5_N_3SS; + else + rate_id_idx = PHYDM_ARFR7_N_4SS; + return rate_id_idx; +} + +u8 phydm_rftype2rateid_5g_n(void *dm_void, u8 rf_type) +{ + u8 rate_id_idx = 0; + + if (rf_type == RF_1T1R) + rate_id_idx = PHYDM_GN_N1SS; + else if (rf_type == RF_2T2R) + rate_id_idx = PHYDM_GN_N2SS; + else if (rf_type == RF_3T3R) + rate_id_idx = PHYDM_ARFR5_N_3SS; + else + rate_id_idx = PHYDM_ARFR7_N_4SS; + return rate_id_idx; +} + +u8 phydm_rftype2rateid_ac80(void *dm_void, u8 rf_type) +{ + u8 rate_id_idx = 0; + + if (rf_type == RF_1T1R) + rate_id_idx = PHYDM_ARFR1_AC_1SS; + else if (rf_type == RF_2T2R) + rate_id_idx = PHYDM_ARFR0_AC_2SS; + else if (rf_type == RF_3T3R) + rate_id_idx = PHYDM_ARFR4_AC_3SS; + else + rate_id_idx = PHYDM_ARFR6_AC_4SS; + return rate_id_idx; +} + +u8 phydm_rftype2rateid_ac40(void *dm_void, u8 rf_type) +{ + u8 rate_id_idx = 0; + + if (rf_type == RF_1T1R) + rate_id_idx = PHYDM_ARFR2_AC_2G_1SS; + else if (rf_type == RF_2T2R) + rate_id_idx = PHYDM_ARFR3_AC_2G_2SS; + else if (rf_type == RF_3T3R) + rate_id_idx = PHYDM_ARFR4_AC_3SS; + else + rate_id_idx = PHYDM_ARFR6_AC_4SS; + return rate_id_idx; +} + +u8 phydm_rate_id_mapping(void *dm_void, u32 wireless_mode, u8 rf_type, u8 bw) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 rate_id_idx = 0; + + PHYDM_DBG(dm, DBG_RA, + "wireless_mode= (( 0x%x )), rf_type = (( 0x%x )), BW = (( 0x%x ))\n", + wireless_mode, rf_type, bw); + + switch (wireless_mode) { + case PHYDM_WIRELESS_MODE_N_24G: + if (bw == CHANNEL_WIDTH_40) + rate_id_idx = phydm_rftype2rateid_2g_n40(dm, rf_type); + else + rate_id_idx = phydm_rftype2rateid_2g_n20(dm, rf_type); + break; + + case PHYDM_WIRELESS_MODE_N_5G: + rate_id_idx = phydm_rftype2rateid_5g_n(dm, rf_type); + break; + + case PHYDM_WIRELESS_MODE_G: + rate_id_idx = PHYDM_BG; + break; + + case PHYDM_WIRELESS_MODE_A: + rate_id_idx = PHYDM_G; + break; + + case PHYDM_WIRELESS_MODE_B: + rate_id_idx = PHYDM_B_20M; + break; + + case PHYDM_WIRELESS_MODE_AC_5G: + case PHYDM_WIRELESS_MODE_AC_ONLY: + rate_id_idx = phydm_rftype2rateid_ac80(dm, rf_type); + break; + + case PHYDM_WIRELESS_MODE_AC_24G: +/*@Becareful to set "Lowest rate" while using PHYDM_ARFR4_AC_3SS in 2.4G/5G*/ + if (bw >= CHANNEL_WIDTH_80) + rate_id_idx = phydm_rftype2rateid_ac80(dm, rf_type); + else + rate_id_idx = phydm_rftype2rateid_ac40(dm, rf_type); + break; + + default: + rate_id_idx = 0; + break; + } + + PHYDM_DBG(dm, DBG_RA, "RA rate ID = (( 0x%x ))\n", rate_id_idx); + + return rate_id_idx; +} + +u8 phydm_rssi_lv_dec(void *dm_void, u32 rssi, u8 ratr_state) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + /*@MCS0 ~ MCS4 , VHT1SS MCS0 ~ MCS4 , G 6M~24M*/ + u8 rssi_lv_t[RA_FLOOR_TABLE_SIZE] = {20, 34, 38, 42, 46, 50, 100}; + u8 new_rssi_lv = 0; + u8 i; + + PHYDM_DBG(dm, DBG_RA_MASK, + "curr RA level=(%d), Table_ori=[%d, %d, %d, %d, %d, %d]\n", + ratr_state, rssi_lv_t[0], rssi_lv_t[1], rssi_lv_t[2], + rssi_lv_t[3], rssi_lv_t[4], rssi_lv_t[5]); for (i = 0; i < RA_FLOOR_TABLE_SIZE; i++) { if (i >= (ratr_state)) - rssi_lv_table[i] += RA_FLOOR_UP_GAP; + rssi_lv_t[i] += RA_FLOOR_UP_GAP; } - PHYDM_DBG(dm, DBG_RA_MASK, "RSSI=(%d), Table_mod=[%d, %d, %d, %d, %d, %d]\n", - rssi, rssi_lv_table[0], rssi_lv_table[1], rssi_lv_table[2], rssi_lv_table[3], rssi_lv_table[4], rssi_lv_table[5]); + PHYDM_DBG(dm, DBG_RA_MASK, + "RSSI=(%d), Table_mod=[%d, %d, %d, %d, %d, %d]\n", rssi, + rssi_lv_t[0], rssi_lv_t[1], rssi_lv_t[2], rssi_lv_t[3], + rssi_lv_t[4], rssi_lv_t[5]); for (i = 0; i < RA_FLOOR_TABLE_SIZE; i++) { - if (rssi < rssi_lv_table[i]) { + if (rssi < rssi_lv_t[i]) { new_rssi_lv = i; break; } } - return new_rssi_lv; + return new_rssi_lv; } -u8 -phydm_rate_order_compute( - void *dm_void, - u8 rate_idx -) +enum phydm_qam_order phydm_get_ofdm_qam_order(void *dm_void, u8 rate_idx) { - u8 rate_order = 0; + u8 tmp_idx = 0; + enum phydm_qam_order qam_order = PHYDM_QAM_BPSK; + enum phydm_qam_order qam[10] = {PHYDM_QAM_BPSK, PHYDM_QAM_QPSK, + PHYDM_QAM_QPSK, PHYDM_QAM_16QAM, + PHYDM_QAM_16QAM, PHYDM_QAM_64QAM, + PHYDM_QAM_64QAM, PHYDM_QAM_64QAM, + PHYDM_QAM_256QAM, PHYDM_QAM_256QAM}; - if (rate_idx >= ODM_RATEVHTSS4MCS0) { - rate_idx -= ODM_RATEVHTSS4MCS0; - /**/ - } else if (rate_idx >= ODM_RATEVHTSS3MCS0) { - rate_idx -= ODM_RATEVHTSS3MCS0; - /**/ - } else if (rate_idx >= ODM_RATEVHTSS2MCS0) { - rate_idx -= ODM_RATEVHTSS2MCS0; - /**/ - } else if (rate_idx >= ODM_RATEVHTSS1MCS0) { - rate_idx -= ODM_RATEVHTSS1MCS0; - /**/ - } else if (rate_idx >= ODM_RATEMCS24) { - rate_idx -= ODM_RATEMCS24; - /**/ - } else if (rate_idx >= ODM_RATEMCS16) { - rate_idx -= ODM_RATEMCS16; - /**/ - } else if (rate_idx >= ODM_RATEMCS8) { - rate_idx -= ODM_RATEMCS8; - /**/ + if (rate_idx <= ODM_RATE11M) + return PHYDM_QAM_CCK; + + if (rate_idx >= ODM_RATEVHTSS1MCS0) { + if (rate_idx >= ODM_RATEVHTSS4MCS0) + tmp_idx -= ODM_RATEVHTSS4MCS0; + else if (rate_idx >= ODM_RATEVHTSS3MCS0) + tmp_idx -= ODM_RATEVHTSS3MCS0; + else if (rate_idx >= ODM_RATEVHTSS2MCS0) + tmp_idx -= ODM_RATEVHTSS2MCS0; + else + tmp_idx -= ODM_RATEVHTSS1MCS0; + + qam_order = qam[tmp_idx]; + } else if (rate_idx >= ODM_RATEMCS0) { + if (rate_idx >= ODM_RATEMCS24) + tmp_idx -= ODM_RATEMCS24; + else if (rate_idx >= ODM_RATEMCS16) + tmp_idx -= ODM_RATEMCS16; + else if (rate_idx >= ODM_RATEMCS8) + tmp_idx -= ODM_RATEMCS8; + else + tmp_idx -= ODM_RATEMCS0; + + qam_order = qam[tmp_idx]; + } else { + if (rate_idx > ODM_RATE6M) { + tmp_idx -= ODM_RATE6M; + qam_order = qam[tmp_idx - 1]; + } else { + qam_order = PHYDM_QAM_BPSK; + } } - rate_order = rate_idx; + + return qam_order; +} + +u8 phydm_rate_order_compute(void *dm_void, u8 rate_idx) +{ + u8 rate_order = rate_idx & 0x7f; + + rate_idx &= 0x7f; + + if (rate_idx >= ODM_RATEVHTSS4MCS0) + rate_order -= ODM_RATEVHTSS4MCS0; + else if (rate_idx >= ODM_RATEVHTSS3MCS0) + rate_order -= ODM_RATEVHTSS3MCS0; + else if (rate_idx >= ODM_RATEVHTSS2MCS0) + rate_order -= ODM_RATEVHTSS2MCS0; + else if (rate_idx >= ODM_RATEVHTSS1MCS0) + rate_order -= ODM_RATEVHTSS1MCS0; + else if (rate_idx >= ODM_RATEMCS24) + rate_order -= ODM_RATEMCS24; + else if (rate_idx >= ODM_RATEMCS16) + rate_order -= ODM_RATEMCS16; + else if (rate_idx >= ODM_RATEMCS8) + rate_order -= ODM_RATEMCS8; + else if (rate_idx >= ODM_RATEMCS0) + rate_order -= ODM_RATEMCS0; + else if (rate_idx >= ODM_RATE6M) + rate_order -= ODM_RATE6M; + else + rate_order -= ODM_RATE1M; + + if (rate_idx >= ODM_RATEMCS0) + rate_order++; return rate_order; - } -u8 -phydm_rate2ss( - void *dm_void, - u8 rate_idx -) +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) +u8 phydm_rate2ss(void *dm_void, u8 rate_idx) { - u8 ret = 0xff; - u8 i,j; - u8 search_idx; - u32 ss_mapping_tab[4][3] = {{0x00000000, 0x003ff000, 0x000ff000}, - {0x00000000, 0xffc00000, 0x0ff00000}, - {0x000003ff, 0x0000000f, 0xf0000000}, - {0x000ffc00, 0x00000ff0, 0x00000000}}; + u8 ret = 0xff; + u8 i, j; + u8 search_idx; + u32 ss_mapping_tab[4][3] = {{0x00000000, 0x003ff000, 0x000ff000}, + {0x00000000, 0xffc00000, 0x0ff00000}, + {0x000003ff, 0x0000000f, 0xf0000000}, + {0x000ffc00, 0x00000ff0, 0x00000000} }; if (rate_idx < 32) { search_idx = rate_idx; j = 0; @@ -1653,79 +1669,68 @@ phydm_rate2ss( search_idx = rate_idx - 32; j = 1; } else { - search_idx = rate_idx -64; + search_idx = rate_idx - 64; j = 2; } - for (i = 0; i<4; i++) + for (i = 0; i < 4; i++) if (ss_mapping_tab[i][j] & BIT(search_idx)) ret = i; return ret; } -u8 -phydm_rate2plcp( - void *dm_void, - u8 rate_idx -) +u8 phydm_rate2plcp(void *dm_void, u8 rate_idx) { - u8 rate2ss = 0; - u8 vht_en = 0; - u8 ltftime = 0; - u8 plcptime = 0xff; + u8 rate2ss = 0; + u8 ltftime = 0; + u8 plcptime = 0xff; if (rate_idx < ODM_RATE6M) { plcptime = 192; - /* CCK PLCP = 192us (long preamble) */ + /* @CCK PLCP = 192us (long preamble) */ } else if (rate_idx < ODM_RATEMCS0) { plcptime = 20; - /* LegOFDM PLCP = 20us */ + /* @LegOFDM PLCP = 20us */ } else { if (rate_idx < ODM_RATEVHTSS1MCS0) plcptime = 32; - /* HT mode PLCP = 20us + 12us + 4us x Nss */ + /* @HT mode PLCP = 20us + 12us + 4us x Nss */ else plcptime = 36; - /* VHT mode PLCP = 20us + 16us + 4us x Nss */ + /* VHT mode PLCP = 20us + 16us + 4us x Nss */ rate2ss = phydm_rate2ss(dm_void, rate_idx); - if (rate2ss == 0xff) - return 0xff; - else + if (rate2ss != 0xff) ltftime = (rate2ss + 1) * 4; + else + return 0xff; + plcptime += ltftime; - /**/ } return plcptime; - } -u8 -phydm_get_plcp( - void *dm_void, - u16 macid -) +u8 phydm_get_plcp(void *dm_void, u16 macid) { - u8 plcp_time = 0; - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *sta = NULL; - struct ra_sta_info *ra = NULL; + u8 plcp_time = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta = NULL; + struct ra_sta_info *ra = NULL; + sta = dm->phydm_sta_info[macid]; ra = &sta->ra_info; plcp_time = phydm_rate2plcp(dm, ra->curr_tx_rate); return plcp_time; } +#endif - -void -phydm_ra_common_info_update( - void *dm_void -) +void phydm_ra_common_info_update(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; - struct cmn_sta_info *sta = NULL; - u16 macid; - u8 rate_order_tmp; - u8 cnt = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_tab = &dm->dm_ra_table; + struct cmn_sta_info *sta = NULL; + u16 macid; + u8 rate_order_tmp; + u8 rate_idx = 0; + u8 cnt = 0; ra_tab->highest_client_tx_order = 0; ra_tab->power_tracking_flag = 1; @@ -1736,94 +1741,179 @@ phydm_ra_common_info_update( for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) { sta = dm->phydm_sta_info[macid]; - if (is_sta_active(sta)) { - rate_order_tmp = phydm_rate_order_compute(dm, (sta->ra_info.curr_tx_rate & 0x7f)); + if (!is_sta_active(sta)) + continue; - if (rate_order_tmp >= (ra_tab->highest_client_tx_order)) { - ra_tab->highest_client_tx_order = rate_order_tmp; - ra_tab->highest_client_tx_rate_order = macid; - } + rate_idx = sta->ra_info.curr_tx_rate & 0x7f; + rate_order_tmp = phydm_rate_order_compute(dm, rate_idx); - cnt++; - - if (cnt == dm->number_linked_client) - break; + if (rate_order_tmp >= ra_tab->highest_client_tx_order) { + ra_tab->highest_client_tx_order = rate_order_tmp; + ra_tab->highest_client_tx_rate_order = macid; } + + cnt++; + + if (cnt == dm->number_linked_client) + break; } - PHYDM_DBG(dm, DBG_RA, "MACID[%d], Highest Tx order Update for power traking: %d\n", (ra_tab->highest_client_tx_rate_order), (ra_tab->highest_client_tx_order)); + PHYDM_DBG(dm, DBG_RA, + "MACID[%d], Highest Tx order Update for power traking: %d\n", + ra_tab->highest_client_tx_rate_order, + ra_tab->highest_client_tx_order); } -void -phydm_ra_info_watchdog( - void *dm_void -) +void phydm_rrsr_set_register(void *dm_void, u32 rrsr_val) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + + odm_set_mac_reg(dm, R_0x440, 0xfffff, rrsr_val); +} + +void phydm_masked_rrsr_set_register(void *dm_void, u32 rrsr_val) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_tab = &dm->dm_ra_table; + + if (ra_tab->rrsr_val_curr == rrsr_val) + return; + + ra_tab->rrsr_val_curr = rrsr_val; + odm_set_mac_reg(dm, R_0x440, 0xfffff, rrsr_val); +} + +void phydm_rrsr_mask(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra = &dm->dm_ra_table; + struct cmn_sta_info *sta = NULL; + u8 rate_order = 0; + u8 rate_order_min = 0xff; + u32 rrsr_mask = 0, rrsr_mask_ofdm = 0; + u8 tx_rate_idx = 0; + u8 i = 0, sta_cnt = 0; + + if (!ra->dynamic_rrsr_en) + return; + + if (!dm->is_linked) { + phydm_masked_rrsr_set_register(dm, ra->rrsr_val_init); + return; + } + +#if 1 + for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { + sta = dm->phydm_sta_info[i]; + if (!is_sta_active(sta)) + continue; + + sta_cnt++; + tx_rate_idx = sta->ra_info.curr_tx_rate & 0x7f; + rate_order = phydm_rate_order_compute(dm, tx_rate_idx); + if (rate_order < rate_order_min) + rate_order_min = rate_order; + + if (sta_cnt == dm->number_linked_client) + break; + } +#else + sta = dm->phydm_sta_info[dm->rssi_min_macid]; + + if (!is_sta_active(sta)) { + PHYDM_DBG(dm, DBG_DYN_ARFR, "[Warning] %s invalid STA\n", + __func__); + return; + } + + rate_order = phydm_rate_order_compute(dm, sta->ra_info.curr_tx_rate); +#endif + if (rate_order_min == 0) { + rrsr_mask = 0x1f; + } else { + rrsr_mask_ofdm = (u32)phydm_gen_bitmask(rate_order_min); + rrsr_mask = (rrsr_mask_ofdm << 4) | 0xf; + } + + /*ra->rrsr_val_init = 0x15d;*/ + + phydm_masked_rrsr_set_register(dm, ra->rrsr_val_init & rrsr_mask); + + PHYDM_DBG(dm, DBG_DYN_ARFR, + "tx{rate, rate_order_min}={0x%x, %d}, rrsr_init=0x%x, ofdm_rrsr_mask=0x%x, rrsr_val=0x%x\n", + tx_rate_idx, rate_order_min, ra->rrsr_val_init, + rrsr_mask, ra->rrsr_val_curr); +} + +void phydm_ra_info_watchdog(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; phydm_ra_common_info_update(dm); - #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT)) - phydm_ra_dynamic_retry_limit(dm); - #endif phydm_ra_dynamic_retry_count(dm); - phydm_refresh_rate_adaptive_mask(dm); + phydm_rrsr_mask(dm); + phydm_ra_mask_watchdog(dm); - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) odm_refresh_basic_rate_mask(dm); - #endif +#endif } -void -phydm_ra_info_init( - void *dm_void -) +void phydm_rrsr_en(void *dm_void, boolean en_rrsr) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_tab = &dm->dm_ra_table; + + ra_tab->dynamic_rrsr_en = en_rrsr; +} + +void phydm_ra_info_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_tab = &dm->dm_ra_table; ra_tab->highest_client_tx_rate_order = 0; ra_tab->highest_client_tx_order = 0; - ra_tab->RA_threshold_offset = 0; - ra_tab->RA_offset_direction = 0; - + ra_tab->ra_th_ofst = 0; + ra_tab->ra_ofst_direc = 0; + ra_tab->rrsr_val_init = odm_get_mac_reg(dm, R_0x440, MASKDWORD); + ra_tab->dynamic_rrsr_en = true; + #if (RTL8822B_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8822B) { - u32 ret_value; + u32 ret_value; - ret_value = odm_get_bb_reg(dm, 0x4c8, MASKBYTE2); - odm_set_bb_reg(dm, 0x4cc, MASKBYTE3, (ret_value - 1)); + ret_value = odm_get_bb_reg(dm, R_0x4c8, MASKBYTE2); + odm_set_bb_reg(dm, R_0x4cc, MASKBYTE3, (ret_value - 1)); } #endif - - #ifdef CONFIG_RA_DYNAMIC_RTY_LIMIT + + #if 0 /*@CONFIG_RA_DYNAMIC_RTY_LIMIT*/ phydm_ra_dynamic_retry_limit_init(dm); #endif - #ifdef CONFIG_RA_DYNAMIC_RATE_ID + #if 0 /*@CONFIG_RA_DYNAMIC_RATE_ID*/ phydm_ra_dynamic_rate_id_init(dm); #endif - #ifdef CONFIG_RA_DBG_CMD - odm_ra_para_adjust_init(dm); - #endif - phydm_rate_adaptive_mask_init(dm); - } -u8 -odm_find_rts_rate( - void *dm_void, - u8 tx_rate, - boolean is_erp_protect -) +u8 odm_find_rts_rate(void *dm_void, u8 tx_rate, boolean is_erp_protect) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 rts_ini_rate = ODM_RATE6M; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 rts_ini_rate = ODM_RATE6M; - if (is_erp_protect) /* use CCK rate as RTS*/ + if (is_erp_protect) { /* use CCK rate as RTS*/ rts_ini_rate = ODM_RATE1M; - else { + } else { switch (tx_rate) { + case ODM_RATEVHTSS4MCS9: + case ODM_RATEVHTSS4MCS8: + case ODM_RATEVHTSS4MCS7: + case ODM_RATEVHTSS4MCS6: + case ODM_RATEVHTSS4MCS5: + case ODM_RATEVHTSS4MCS4: + case ODM_RATEVHTSS4MCS3: case ODM_RATEVHTSS3MCS9: case ODM_RATEVHTSS3MCS8: case ODM_RATEVHTSS3MCS7: @@ -1845,6 +1935,16 @@ odm_find_rts_rate( case ODM_RATEVHTSS1MCS5: case ODM_RATEVHTSS1MCS4: case ODM_RATEVHTSS1MCS3: + case ODM_RATEMCS31: + case ODM_RATEMCS30: + case ODM_RATEMCS29: + case ODM_RATEMCS28: + case ODM_RATEMCS27: + case ODM_RATEMCS23: + case ODM_RATEMCS22: + case ODM_RATEMCS21: + case ODM_RATEMCS20: + case ODM_RATEMCS19: case ODM_RATEMCS15: case ODM_RATEMCS14: case ODM_RATEMCS13: @@ -1861,12 +1961,18 @@ odm_find_rts_rate( case ODM_RATE24M: rts_ini_rate = ODM_RATE24M; break; + case ODM_RATEVHTSS4MCS2: + case ODM_RATEVHTSS4MCS1: case ODM_RATEVHTSS3MCS2: case ODM_RATEVHTSS3MCS1: case ODM_RATEVHTSS2MCS2: case ODM_RATEVHTSS2MCS1: case ODM_RATEVHTSS1MCS2: case ODM_RATEVHTSS1MCS1: + case ODM_RATEMCS26: + case ODM_RATEMCS25: + case ODM_RATEMCS18: + case ODM_RATEMCS17: case ODM_RATEMCS10: case ODM_RATEMCS9: case ODM_RATEMCS2: @@ -1875,9 +1981,12 @@ odm_find_rts_rate( case ODM_RATE12M: rts_ini_rate = ODM_RATE12M; break; + case ODM_RATEVHTSS4MCS0: case ODM_RATEVHTSS3MCS0: case ODM_RATEVHTSS2MCS0: case ODM_RATEVHTSS1MCS0: + case ODM_RATEMCS24: + case ODM_RATEMCS16: case ODM_RATEMCS8: case ODM_RATEMCS0: case ODM_RATE9M: @@ -1901,35 +2010,32 @@ odm_find_rts_rate( rts_ini_rate = ODM_RATE6M; } return rts_ini_rate; - } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -odm_refresh_basic_rate_mask( - void *dm_void -) +void odm_refresh_basic_rate_mask( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - void *adapter = dm->adapter; - static u8 stage = 0; - u8 cur_stage = 0; - OCTET_STRING os_rate_set; - PMGNT_INFO mgnt_info = GetDefaultMgntInfo(((PADAPTER)adapter)); - u8 rate_set[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M}; + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *adapter = dm->adapter; + static u8 stage = 0; + u8 cur_stage = 0; + OCTET_STRING os_rate_set; + PMGNT_INFO mgnt_info = GetDefaultMgntInfo(((PADAPTER)adapter)); + u8 rate_set[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M}; if (dm->support_ic_type != ODM_RTL8812 && dm->support_ic_type != ODM_RTL8821) return; - if (dm->is_linked == false) /* unlink Default port information */ + if (dm->is_linked == false) /* unlink Default port information */ cur_stage = 0; - else if (dm->rssi_min < 40) /* link RSSI < 40% */ + else if (dm->rssi_min < 40) /* @link RSSI < 40% */ cur_stage = 1; - else if (dm->rssi_min > 45) /* link RSSI > 45% */ + else if (dm->rssi_min > 45) /* @link RSSI > 45% */ cur_stage = 3; else - cur_stage = 2; /* link 25% <= RSSI <= 30% */ + cur_stage = 2; /* @link 25% <= RSSI <= 30% */ if (cur_stage != stage) { if (cur_stage == 1) { @@ -1943,83 +2049,19 @@ odm_refresh_basic_rate_mask( stage = cur_stage; } -#if 0 -void -odm_refresh_ldpc_rts_mp( - void *adapter, - struct dm_struct *dm, - u8 m_mac_id, - u8 iot_peer, - s32 undecorated_smoothed_pwdb -) -{ - boolean is_ctl_ldpc = false; - struct ra_table *ra_t = &dm->dm_ra_table; - - if (dm->support_ic_type != ODM_RTL8821 && dm->support_ic_type != ODM_RTL8812) - return; - - if ((dm->support_ic_type == ODM_RTL8821) && (dm->cut_version == ODM_CUT_A)) - is_ctl_ldpc = true; - else if (dm->support_ic_type == ODM_RTL8812 && - iot_peer == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP) - is_ctl_ldpc = true; - - if (is_ctl_ldpc) { - if (undecorated_smoothed_pwdb < (ra_t->ldpc_thres - 5)) - MgntSet_TX_LDPC(m_mac_id, true); - else if (undecorated_smoothed_pwdb > ra_t->ldpc_thres) - MgntSet_TX_LDPC(m_mac_id, false); - } -} #endif -#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) +#if 0 /*@CONFIG_RA_DYNAMIC_RTY_LIMIT*/ -void -phydm_gen_ramask_h2c_AP( - void *dm_void, - struct rtl8192cd_priv *priv, - struct sta_info *entry, - u8 rssi_level -) +void phydm_retry_limit_table_bound( + void *dm_void, + u8 *retry_limit, + u8 offset) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_tab = &dm->dm_ra_table; - if (dm->support_ic_type == ODM_RTL8812) { - #if (RTL8812A_SUPPORT == 1) - UpdateHalRAMask8812(priv, entry, rssi_level); - /**/ - #endif - } else if (dm->support_ic_type == ODM_RTL8188E) { - #if (RTL8188E_SUPPORT == 1) - #ifdef TXREPORT - add_RATid(priv, entry); - /**/ - #endif - #endif - } else { - #ifdef CONFIG_WLAN_HAL - GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, entry, rssi_level); - #endif - } -} - -#endif - -#if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT)) - -void -phydm_retry_limit_table_bound( - void *dm_void, - u8 *retry_limit, - u8 offset -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; - - if (*retry_limit > offset) { + if (*retry_limit > offset) { *retry_limit -= offset; if (*retry_limit < ra_tab->retrylimit_low) @@ -2030,82 +2072,76 @@ phydm_retry_limit_table_bound( *retry_limit = ra_tab->retrylimit_low; } -void -phydm_reset_retry_limit_table( - void *dm_void -) +void phydm_reset_retry_limit_table( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_t = &dm->dm_ra_table; + u8 i; u8 per_rate_retrylimit_table_20M[ODM_RATEMCS15 + 1] = { - 1, 1, 2, 4, /*CCK*/ - 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/ - 2, 4, 6, 8, 12, 18, 20, 22, /*20M HT-1SS*/ - 2, 4, 6, 8, 12, 18, 20, 22 /*20M HT-2SS*/ + 1, 1, 2, 4, /*@CCK*/ + 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/ + 2, 4, 6, 8, 12, 18, 20, 22, /*@20M HT-1SS*/ + 2, 4, 6, 8, 12, 18, 20, 22 /*@20M HT-2SS*/ }; u8 per_rate_retrylimit_table_40M[ODM_RATEMCS15 + 1] = { - 1, 1, 2, 4, /*CCK*/ - 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/ - 4, 8, 12, 16, 24, 32, 32, 32, /*40M HT-1SS*/ - 4, 8, 12, 16, 24, 32, 32, 32 /*40M HT-2SS*/ + 1, 1, 2, 4, /*@CCK*/ + 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/ + 4, 8, 12, 16, 24, 32, 32, 32, /*@40M HT-1SS*/ + 4, 8, 12, 16, 24, 32, 32, 32 /*@40M HT-2SS*/ }; - memcpy(&ra_tab->per_rate_retrylimit_20M[0], - &per_rate_retrylimit_table_20M[0], ODM_NUM_RATE_IDX); - memcpy(&ra_tab->per_rate_retrylimit_40M[0], - &per_rate_retrylimit_table_40M[0], ODM_NUM_RATE_IDX); + memcpy(&ra_t->per_rate_retrylimit_20M[0], + &per_rate_retrylimit_table_20M[0], PHY_NUM_RATE_IDX); + memcpy(&ra_t->per_rate_retrylimit_40M[0], + &per_rate_retrylimit_table_40M[0], PHY_NUM_RATE_IDX); - for (i = 0; i < ODM_NUM_RATE_IDX; i++) { + for (i = 0; i < PHY_NUM_RATE_IDX; i++) { phydm_retry_limit_table_bound(dm, - &ra_tab->per_rate_retrylimit_20M[i], + &ra_t->per_rate_retrylimit_20M[i], 0); phydm_retry_limit_table_bound(dm, - &ra_tab->per_rate_retrylimit_40M[i], + &ra_t->per_rate_retrylimit_40M[i], 0); } } -void -phydm_ra_dynamic_retry_limit_init( - void *dm_void -) +void phydm_ra_dynamic_retry_limit_init( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_tab = &dm->dm_ra_table; ra_tab->retry_descend_num = RA_RETRY_DESCEND_NUM; ra_tab->retrylimit_low = RA_RETRY_LIMIT_LOW; ra_tab->retrylimit_high = RA_RETRY_LIMIT_HIGH; phydm_reset_retry_limit_table(dm); - } -void -phydm_ra_dynamic_retry_limit( - void *dm_void -) +void phydm_ra_dynamic_retry_limit( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; - u8 i, retry_offset; - u32 ma_rx_tp; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_tab = &dm->dm_ra_table; + u8 i, retry_offset; + u32 ma_rx_tp; if (dm->pre_number_active_client == dm->number_active_client) { - PHYDM_DBG(dm, DBG_RA, " pre_number_active_client == number_active_client\n"); + PHYDM_DBG(dm, DBG_RA, + "pre_number_active_client == number_active_client\n"); return; } else { if (dm->number_active_client == 1) { phydm_reset_retry_limit_table(dm); - PHYDM_DBG(dm, DBG_RA, "one client only->reset to default value\n"); + PHYDM_DBG(dm, DBG_RA, + "one client only->reset to default value\n"); } else { retry_offset = dm->number_active_client * ra_tab->retry_descend_num; - for (i = 0; i < ODM_NUM_RATE_IDX; i++) { + for (i = 0; i < PHY_NUM_RATE_IDX; i++) { phydm_retry_limit_table_bound(dm, &ra_tab->per_rate_retrylimit_20M[i], retry_offset); @@ -2118,58 +2154,53 @@ phydm_ra_dynamic_retry_limit( } #endif -#if (defined(CONFIG_RA_DYNAMIC_RATE_ID)) -void -phydm_ra_dynamic_rate_id_on_assoc( - void *dm_void, - u8 wireless_mode, - u8 init_rate_id -) +#if 0 /*@CONFIG_RA_DYNAMIC_RATE_ID*/ +void phydm_ra_dynamic_rate_id_on_assoc( + void *dm_void, + u8 wireless_mode, + u8 init_rate_id) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - PHYDM_DBG(dm, DBG_RA, "[ON ASSOC] rf_mode = ((0x%x)), wireless_mode = ((0x%x)), init_rate_id = ((0x%x))\n", dm->rf_type, wireless_mode, init_rate_id); + PHYDM_DBG(dm, DBG_RA, + "[ON ASSOC] rf_mode = ((0x%x)), wireless_mode = ((0x%x)), init_rate_id = ((0x%x))\n", + dm->rf_type, wireless_mode, init_rate_id); - if ((dm->rf_type == RF_2T2R) || (dm->rf_type == RF_2T3R) || (dm->rf_type == RF_2T4R)) { + if (dm->rf_type == RF_2T2R || dm->rf_type == RF_2T3R || dm->rf_type == RF_2T4R) { if ((dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E)) && - (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G)) - ) { - PHYDM_DBG(dm, DBG_RA, "[ON ASSOC] set N-2SS ARFR5 table\n"); - odm_set_mac_reg(dm, 0x4a4, MASKDWORD, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/ - odm_set_mac_reg(dm, 0x4a8, MASKDWORD, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/ + (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G))) { + PHYDM_DBG(dm, DBG_RA, + "[ON ASSOC] set N-2SS ARFR5 table\n"); + odm_set_mac_reg(dm, R_0x4a4, MASKDWORD, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/ + odm_set_mac_reg(dm, R_0x4a8, MASKDWORD, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/ } else if ((dm->support_ic_type & (ODM_RTL8812)) && - (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY)) - ) { - PHYDM_DBG(dm, DBG_RA, "[ON ASSOC] set AC-2SS ARFR0 table\n"); - odm_set_mac_reg(dm, 0x444, MASKDWORD, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/ - odm_set_mac_reg(dm, 0x448, MASKDWORD, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/ + (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY))) { + PHYDM_DBG(dm, DBG_RA, + "[ON ASSOC] set AC-2SS ARFR0 table\n"); + odm_set_mac_reg(dm, R_0x444, MASKDWORD, 0x0fff); /*@AC-2SS, ARFR0, rate_id = 0x9*/ + odm_set_mac_reg(dm, R_0x448, MASKDWORD, 0xff01f000); /*@AC-2SS, ARFR0, rate_id = 0x9*/ } } - } -void -phydm_ra_dynamic_rate_id_init( - void *dm_void -) +void phydm_ra_dynamic_rate_id_init( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E)) { - odm_set_mac_reg(dm, 0x4a4, MASKDWORD, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/ - odm_set_mac_reg(dm, 0x4a8, MASKDWORD, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/ + odm_set_mac_reg(dm, R_0x4a4, MASKDWORD, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/ + odm_set_mac_reg(dm, R_0x4a8, MASKDWORD, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/ - odm_set_mac_reg(dm, 0x444, MASKDWORD, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/ - odm_set_mac_reg(dm, 0x448, MASKDWORD, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/ + odm_set_mac_reg(dm, R_0x444, MASKDWORD, 0x0fff); /*@AC-2SS, ARFR0, rate_id = 0x9*/ + odm_set_mac_reg(dm, R_0x448, MASKDWORD, 0xff01f000); /*@AC-2SS, ARFR0, rate_id = 0x9*/ } } -void -phydm_update_rate_id( - void *dm_void, - u8 rate, - u8 platform_macid -) +void phydm_update_rate_id( + void *dm_void, + u8 rate, + u8 platform_macid) { #if 0 @@ -2177,44 +2208,45 @@ phydm_update_rate_id( struct ra_table *ra_tab = &dm->dm_ra_table; u8 current_tx_ss; u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/ - u8 wireless_mode; + enum wireless_set wireless_set; u8 phydm_macid; - struct sta_info *entry; struct cmn_sta_info *sta; - -#if 0 +#if 0 if (rate_idx >= ODM_RATEVHTSS2MCS0) { - PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( VHT2SS-MCS%d ))\n", platform_macid, (rate_idx - ODM_RATEVHTSS2MCS0)); - /*dummy for SD4 check patch*/ + PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( VHT2SS-MCS%d ))\n", + platform_macid, (rate_idx - ODM_RATEVHTSS2MCS0)); + /*@dummy for SD4 check patch*/ } else if (rate_idx >= ODM_RATEVHTSS1MCS0) { - PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( VHT1SS-MCS%d ))\n", platform_macid, (rate_idx - ODM_RATEVHTSS1MCS0)); - /*dummy for SD4 check patch*/ + PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( VHT1SS-MCS%d ))\n", + platform_macid, (rate_idx - ODM_RATEVHTSS1MCS0)); + /*@dummy for SD4 check patch*/ } else if (rate_idx >= ODM_RATEMCS0) { - PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( HT-MCS%d ))\n", platform_macid, (rate_idx - ODM_RATEMCS0)); - /*dummy for SD4 check patch*/ + PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( HT-MCS%d ))\n", + platform_macid, (rate_idx - ODM_RATEMCS0)); + /*@dummy for SD4 check patch*/ } else { - PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( HT-MCS%d ))\n", platform_macid, rate_idx); - /*dummy for SD4 check patch*/ + PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( HT-MCS%d ))\n", + platform_macid, rate_idx); + /*@dummy for SD4 check patch*/ } #endif phydm_macid = dm->phydm_macid_table[platform_macid]; - entry = dm->odm_sta_info[phydm_macid]; sta = dm->phydm_sta_info[phydm_macid]; if (is_sta_active(sta)) { - wireless_mode = entry->wireless_mode; + wireless_set = sta->support_wireless_set; - if ((dm->rf_type == RF_2T2R) || (dm->rf_type == RF_2T3R) || (dm->rf_type == RF_2T4R)) { - if (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G)) { /*N mode*/ - if (rate_idx >= ODM_RATEMCS8 && rate_idx <= ODM_RATEMCS15) { /*2SS mode*/ + if (dm->rf_type == RF_2T2R || dm->rf_type == RF_2T3R || dm->rf_type == RF_2T4R) { + if (wireless_set & WIRELESS_HT) { /*N mode*/ + if (rate_idx >= ODM_RATEMCS8 && rate_idx <= ODM_RATEMCS15) { /*@2SS mode*/ sta->ra_info.rate_id = ARFR_5_RATE_ID; PHYDM_DBG(dm, DBG_RA, "ARFR_5\n"); } - } else if (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY)) {/*AC mode*/ - if (rate_idx >= ODM_RATEVHTSS2MCS0 && rate_idx <= ODM_RATEVHTSS2MCS9) {/*2SS mode*/ + } else if (wireless_set & WIRELESS_VHT) {/*@AC mode*/ + if (rate_idx >= ODM_RATEVHTSS2MCS0 && rate_idx <= ODM_RATEVHTSS2MCS9) {/*@2SS mode*/ sta->ra_info.rate_id = ARFR_0_RATE_ID; PHYDM_DBG(dm, DBG_RA, "ARFR_0\n"); @@ -2222,220 +2254,11 @@ phydm_update_rate_id( } else sta->ra_info.rate_id = ARFR_0_RATE_ID; - PHYDM_DBG(dm, DBG_RA, "UPdate_RateID[%d]: (( 0x%x ))\n", platform_macid, sta->ra_info.rate_id); + PHYDM_DBG(dm, DBG_RA, "UPdate_RateID[%d]: (( 0x%x ))\n", + platform_macid, sta->ra_info.rate_id); } } #endif } #endif - -#if (defined(CONFIG_RA_DBG_CMD)) -void -odm_ra_para_adjust_send_h2c( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; - u8 h2c_parameter[6] = {0}; - - h2c_parameter[0] = RA_FIRST_MACID; - - if (ra_tab->ra_para_feedback_req) { /*h2c_parameter[5]=1 ; ask FW for all RA parameters*/ - PHYDM_DBG(dm, DBG_RA, "[H2C] Ask FW for RA parameter\n"); - h2c_parameter[5] |= BIT(1); /*ask FW to report RA parameters*/ - h2c_parameter[1] = ra_tab->para_idx; /*ra_tab->para_idx;*/ - ra_tab->ra_para_feedback_req = 0; - } else { - PHYDM_DBG(dm, DBG_RA, "[H2C] Send H2C to FW for modifying RA parameter\n"); - - h2c_parameter[1] = ra_tab->para_idx; - h2c_parameter[2] = ra_tab->rate_idx; - /* [8 bit]*/ - if (ra_tab->para_idx == RADBG_RTY_PENALTY || ra_tab->para_idx == RADBG_RATE_UP_RTY_RATIO || ra_tab->para_idx == RADBG_RATE_DOWN_RTY_RATIO) { - h2c_parameter[3] = ra_tab->value; - h2c_parameter[4] = 0; - } - /* [16 bit]*/ - else { - h2c_parameter[3] = (u8)(((ra_tab->value_16) & 0xf0) >> 4); /*byte1*/ - h2c_parameter[4] = (u8)((ra_tab->value_16) & 0x0f); /*byte0*/ - } - } - PHYDM_DBG(dm, DBG_RA, " h2c_parameter[1] = 0x%x\n", h2c_parameter[1]); - PHYDM_DBG(dm, DBG_RA, " h2c_parameter[2] = 0x%x\n", h2c_parameter[2]); - PHYDM_DBG(dm, DBG_RA, " h2c_parameter[3] = 0x%x\n", h2c_parameter[3]); - PHYDM_DBG(dm, DBG_RA, " h2c_parameter[4] = 0x%x\n", h2c_parameter[4]); - PHYDM_DBG(dm, DBG_RA, " h2c_parameter[5] = 0x%x\n", h2c_parameter[5]); - - odm_fill_h2c_cmd(dm, ODM_H2C_RA_PARA_ADJUST, 6, h2c_parameter); - -} - - -void -odm_ra_para_adjust( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; - u8 rate_idx = ra_tab->rate_idx; - u8 value = ra_tab->value; - u8 pre_value = 0xff; - - if (ra_tab->para_idx == RADBG_RTY_PENALTY) { - pre_value = ra_tab->RTY_P[rate_idx]; - ra_tab->RTY_P[rate_idx] = value; - ra_tab->RTY_P_modify_note[rate_idx] = 1; - } else if (ra_tab->para_idx == RADBG_N_HIGH) { - } else if (ra_tab->para_idx == RADBG_N_LOW) { - } else if (ra_tab->para_idx == RADBG_RATE_UP_RTY_RATIO) { - pre_value = ra_tab->RATE_UP_RTY_RATIO[rate_idx]; - ra_tab->RATE_UP_RTY_RATIO[rate_idx] = value; - ra_tab->RATE_UP_RTY_RATIO_modify_note[rate_idx] = 1; - } else if (ra_tab->para_idx == RADBG_RATE_DOWN_RTY_RATIO) { - pre_value = ra_tab->RATE_DOWN_RTY_RATIO[rate_idx]; - ra_tab->RATE_DOWN_RTY_RATIO[rate_idx] = value; - ra_tab->RATE_DOWN_RTY_RATIO_modify_note[rate_idx] = 1; - } - PHYDM_DBG(dm, DBG_RA, "Change RA Papa[%d], rate[ %d ], ((%d)) -> ((%d))\n", ra_tab->para_idx, rate_idx, pre_value, value); - odm_ra_para_adjust_send_h2c(dm); -} - -void -phydm_ra_print_msg( - void *dm_void, - u8 *value, - u8 *value_default, - u8 *modify_note -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; - u32 i; - - PHYDM_DBG(dm, DBG_RA, " |rate index| |Current-value| |Default-value| |Modify?|\n"); - for (i = 0 ; i <= (ra_tab->rate_length); i++) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) - PHYDM_DBG(dm, DBG_RA, " [ %d ] %20d %25d %20s\n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . ")); -#else - PHYDM_DBG(dm, DBG_RA, " [ %d ] %10d %14d %14s\n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . ")); -#endif - } - -} - -void -odm_RA_debug( - void *dm_void, - u32 *const dm_value -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; - - ra_tab->is_ra_dbg_init = false; - - if (dm_value[0] == 100) { /*1 Print RA Parameters*/ - u8 default_pointer_value; - u8 *pvalue; - u8 *pvalue_default; - u8 *pmodify_note; - - pvalue = pvalue_default = pmodify_note = &default_pointer_value; - - PHYDM_DBG(dm, DBG_RA, "\n------------------------------------------------------------------------------------\n"); - - if (dm_value[1] == RADBG_RTY_PENALTY) { /* [1]*/ - PHYDM_DBG(dm, DBG_RA, " [1] RTY_PENALTY\n"); - pvalue = &ra_tab->RTY_P[0]; - pvalue_default = &ra_tab->RTY_P_default[0]; - pmodify_note = (u8 *)&ra_tab->RTY_P_modify_note[0]; - } else if (dm_value[1] == RADBG_N_HIGH) /* [2]*/ - PHYDM_DBG(dm, DBG_RA, " [2] N_HIGH\n"); - - else if (dm_value[1] == RADBG_N_LOW) /*[3]*/ - PHYDM_DBG(dm, DBG_RA, " [3] N_LOW\n"); - - else if (dm_value[1] == RADBG_RATE_UP_RTY_RATIO) { /* [8]*/ - PHYDM_DBG(dm, DBG_RA, " [8] RATE_UP_RTY_RATIO\n"); - pvalue = &ra_tab->RATE_UP_RTY_RATIO[0]; - pvalue_default = &ra_tab->RATE_UP_RTY_RATIO_default[0]; - pmodify_note = (u8 *)&ra_tab->RATE_UP_RTY_RATIO_modify_note[0]; - } else if (dm_value[1] == RADBG_RATE_DOWN_RTY_RATIO) { /* [9]*/ - PHYDM_DBG(dm, DBG_RA, " [9] RATE_DOWN_RTY_RATIO\n"); - pvalue = &ra_tab->RATE_DOWN_RTY_RATIO[0]; - pvalue_default = &ra_tab->RATE_DOWN_RTY_RATIO_default[0]; - pmodify_note = (u8 *)&ra_tab->RATE_DOWN_RTY_RATIO_modify_note[0]; - } - - phydm_ra_print_msg(dm, pvalue, pvalue_default, pmodify_note); - PHYDM_DBG(dm, DBG_RA, "\n------------------------------------------------------------------------------------\n\n"); - - } else if (dm_value[0] == 101) { - ra_tab->para_idx = (u8)dm_value[1]; - - ra_tab->ra_para_feedback_req = 1; - odm_ra_para_adjust_send_h2c(dm); - } else { - ra_tab->para_idx = (u8)dm_value[0]; - ra_tab->rate_idx = (u8)dm_value[1]; - ra_tab->value = (u8)dm_value[2]; - - odm_ra_para_adjust(dm); - } -} - -void -odm_ra_para_adjust_init( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; - u8 i; - u8 ra_para_pool_u8[3] = { RADBG_RTY_PENALTY, RADBG_RATE_UP_RTY_RATIO, RADBG_RATE_DOWN_RTY_RATIO}; - u8 rate_size_ht_1ss = 20, rate_size_ht_2ss = 28, rate_size_ht_3ss = 36; /*4+8+8+8+8 =36*/ - u8 rate_size_vht_1ss = 10, rate_size_vht_2ss = 20, rate_size_vht_3ss = 30; /*10 + 10 +10 =30*/ -#if 0 - /* RTY_PENALTY = 1, u8 */ - /* N_HIGH = 2, */ - /* N_LOW = 3, */ - /* RATE_UP_TABLE = 4, */ - /* RATE_DOWN_TABLE = 5, */ - /* TRYING_NECESSARY = 6, */ - /* DROPING_NECESSARY = 7, */ - /* RATE_UP_RTY_RATIO = 8, u8 */ - /* RATE_DOWN_RTY_RATIO= 9, u8 */ - /* ALL_PARA = 0xff */ - -#endif - PHYDM_DBG(dm, DBG_RA, "odm_ra_para_adjust_init\n"); - -/* JJ ADD 20161014 */ - if (dm->support_ic_type & (ODM_RTL8188F | ODM_RTL8195A | ODM_RTL8703B | ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8723D | ODM_RTL8710B)) - ra_tab->rate_length = rate_size_ht_1ss; - else if (dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8197F)) - ra_tab->rate_length = rate_size_ht_2ss; - else if (dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8821C)) - ra_tab->rate_length = rate_size_ht_1ss + rate_size_vht_1ss; - else if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8822B)) - ra_tab->rate_length = rate_size_ht_2ss + rate_size_vht_2ss; - else if (dm->support_ic_type == ODM_RTL8814A) - ra_tab->rate_length = rate_size_ht_3ss + rate_size_vht_3ss; - else - ra_tab->rate_length = rate_size_ht_1ss; - - ra_tab->is_ra_dbg_init = true; - for (i = 0; i < 3; i++) { - ra_tab->ra_para_feedback_req = 1; - ra_tab->para_idx = ra_para_pool_u8[i]; - odm_ra_para_adjust_send_h2c(dm); - } -} - -#endif /*#if (defined(CONFIG_RA_DBG_CMD))*/ - - diff --git a/hal/phydm/phydm_rainfo.h b/hal/phydm/phydm_rainfo.h index 8c26012..78f6277 100644 --- a/hal/phydm/phydm_rainfo.h +++ b/hal/phydm/phydm_rainfo.h @@ -23,23 +23,14 @@ * *****************************************************************************/ -#ifndef __PHYDMRAINFO_H__ -#define __PHYDMRAINFO_H__ +#ifndef __PHYDMRAINFO_H__ +#define __PHYDMRAINFO_H__ -/*#define RAINFO_VERSION "2.0"*/ /*2014.11.04*/ -/*#define RAINFO_VERSION "3.0"*/ /*2015.01.13 Dino*/ -/*#define RAINFO_VERSION "3.1"*/ /*2015.01.14 Dino*/ -/*#define RAINFO_VERSION "3.3"*/ /*2015.07.29 YuChen*/ -/*#define RAINFO_VERSION "3.4"*/ /*2015.12.15 Stanley*/ -/*#define RAINFO_VERSION "4.0"*/ /*2016.03.24 Dino, Add more RA mask state and Phydm-lize partial ra mask function */ -/*#define RAINFO_VERSION "4.1"*/ /*2016.04.20 Dino, Add new function to adjust PCR RA threshold */ -/*#define RAINFO_VERSION "4.2"*/ /*2016.05.17 Dino, Add H2C debug cmd */ -/*#define RAINFO_VERSION "4.3"*/ /*2016.07.11 Dino, Fix RA hang in CCK 1M problem */ -#define RAINFO_VERSION "5.0" /*2017.04.20 Dino, the 3rd PHYDM reform*/ +#define RAINFO_VERSION "8.0" #define FORCED_UPDATE_RAMASK_PERIOD 5 -#define H2C_MAX_LENGTH 7 +#define H2C_MAX_LENGTH 7 #define RA_FLOOR_UP_GAP 3 #define RA_FLOOR_TABLE_SIZE 7 @@ -50,38 +41,38 @@ #define RA_RETRY_LIMIT_HIGH 32 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) - #define RA_FIRST_MACID 1 -#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) - #define RA_FIRST_MACID 0 - #define WIN_DEFAULT_PORT_MACID 0 - #define WIN_BT_PORT_MACID 2 -#else /*if (DM_ODM_SUPPORT_TYPE == ODM_CE)*/ - #define RA_FIRST_MACID 0 + #define FIRST_MACID 1 +#else + #define FIRST_MACID 0 #endif +/* @1 ============================================================ + * 1 enumrate + * 1 ============================================================ + */ enum phydm_ra_dbg_para { - RADBG_PCR_TH_OFFSET = 0, - RADBG_RTY_PENALTY = 1, - RADBG_N_HIGH = 2, - RADBG_N_LOW = 3, - RADBG_TRATE_UP_TABLE = 4, - RADBG_TRATE_DOWN_TABLE = 5, - RADBG_TRYING_NECESSARY = 6, - RADBG_TDROPING_NECESSARY = 7, - RADBG_RATE_UP_RTY_RATIO = 8, - RADBG_RATE_DOWN_RTY_RATIO = 9, /* u8 */ + RADBG_PCR_TH_OFFSET = 0, + RADBG_RTY_PENALTY = 1, + RADBG_N_HIGH = 2, + RADBG_N_LOW = 3, + RADBG_TRATE_UP_TABLE = 4, + RADBG_TRATE_DOWN_TABLE = 5, + RADBG_TRYING_NECESSARY = 6, + RADBG_TDROPING_NECESSARY = 7, + RADBG_RATE_UP_RTY_RATIO = 8, + RADBG_RATE_DOWN_RTY_RATIO = 9, /* u8 */ - RADBG_DEBUG_MONITOR1 = 0xc, - RADBG_DEBUG_MONITOR2 = 0xd, - RADBG_DEBUG_MONITOR3 = 0xe, - RADBG_DEBUG_MONITOR4 = 0xf, - RADBG_DEBUG_MONITOR5 = 0x10, + RADBG_DEBUG_MONITOR1 = 0xc, + RADBG_DEBUG_MONITOR2 = 0xd, + RADBG_DEBUG_MONITOR3 = 0xe, + RADBG_DEBUG_MONITOR4 = 0xf, + RADBG_DEBUG_MONITOR5 = 0x10, NUM_RA_PARA }; enum phydm_wireless_mode { - PHYDM_WIRELESS_MODE_UNKNOWN = 0x00, + PHYDM_WIRELESS_MODE_UNKNOWN = 0x00, PHYDM_WIRELESS_MODE_A = 0x01, PHYDM_WIRELESS_MODE_B = 0x02, PHYDM_WIRELESS_MODE_G = 0x04, @@ -100,354 +91,206 @@ enum phydm_rateid_idx { PHYDM_BGN_40M_1SS = 1, PHYDM_BGN_20M_2SS = 2, PHYDM_BGN_20M_1SS = 3, - PHYDM_GN_N2SS = 4, - PHYDM_GN_N1SS = 5, - PHYDM_BG = 6, - PHYDM_G = 7, - PHYDM_B_20M = 8, + PHYDM_GN_N2SS = 4, + PHYDM_GN_N1SS = 5, + PHYDM_BG = 6, + PHYDM_G = 7, + PHYDM_B_20M = 8, PHYDM_ARFR0_AC_2SS = 9, PHYDM_ARFR1_AC_1SS = 10, PHYDM_ARFR2_AC_2G_1SS = 11, PHYDM_ARFR3_AC_2G_2SS = 12, PHYDM_ARFR4_AC_3SS = 13, - PHYDM_ARFR5_N_3SS = 14 + PHYDM_ARFR5_N_3SS = 14, + PHYDM_ARFR7_N_4SS = 15, + PHYDM_ARFR6_AC_4SS = 16 }; -#if (RATE_ADAPTIVE_SUPPORT == 1)/* 88E RA */ +enum phydm_qam_order { + PHYDM_QAM_CCK = 0, + PHYDM_QAM_BPSK = 1, + PHYDM_QAM_QPSK = 2, + PHYDM_QAM_16QAM = 3, + PHYDM_QAM_64QAM = 4, + PHYDM_QAM_256QAM = 5 +}; + +#if (RATE_ADAPTIVE_SUPPORT == 1)/* @88E RA */ + +struct _phydm_txstatistic_ { + u32 hw_total_tx; + u32 hw_tx_success; + u32 hw_tx_rty; + u32 hw_tx_drop; +}; + +/* @1 ============================================================ + * 1 structure + * 1 ============================================================ + */ struct _odm_ra_info_ { - u8 rate_id; - u32 rate_mask; - u32 ra_use_rate; - u8 rate_sgi; - u8 rssi_sta_ra; - u8 pre_rssi_sta_ra; - u8 sgi_enable; - u8 decision_rate; - u8 pre_rate; - u8 highest_rate; - u8 lowest_rate; - u32 nsc_up; - u32 nsc_down; - u16 RTY[5]; - u32 TOTAL; - u16 DROP; - u8 active; - u16 rpt_time; - u8 ra_waiting_counter; - u8 ra_pending_counter; - u8 ra_drop_after_down; + u8 rate_id; + u32 rate_mask; + u32 ra_use_rate; + u8 rate_sgi; + u8 rssi_sta_ra; + u8 pre_rssi_sta_ra; + u8 sgi_enable; + u8 decision_rate; + u8 pre_rate; + u8 highest_rate; + u8 lowest_rate; + u32 nsc_up; + u32 nsc_down; + u16 RTY[5]; + u32 TOTAL; + u16 DROP; + u8 active; + u16 rpt_time; + u8 ra_waiting_counter; + u8 ra_pending_counter; + u8 ra_drop_after_down; #if 1 /* POWER_TRAINING_ACTIVE == 1 */ /* For compile pass only~! */ - u8 pt_active; /* on or off */ - u8 pt_try_state; /* 0 trying state, 1 for decision state */ - u8 pt_stage; /* 0~6 */ - u8 pt_stop_count; /* Stop PT counter */ - u8 pt_pre_rate; /* if rate change do PT */ - u8 pt_pre_rssi; /* if RSSI change 5% do PT */ - u8 pt_mode_ss; /* decide whitch rate should do PT */ - u8 ra_stage; /* StageRA, decide how many times RA will be done between PT */ - u8 pt_smooth_factor; + u8 pt_active; /* on or off */ + u8 pt_try_state; /* @0 trying state, 1 for decision state */ + u8 pt_stage; /* @0~6 */ + u8 pt_stop_count; /* Stop PT counter */ + u8 pt_pre_rate; /* @if rate change do PT */ + u8 pt_pre_rssi; /* @if RSSI change 5% do PT */ + u8 pt_mode_ss; /* @decide whitch rate should do PT */ + u8 ra_stage; /* @StageRA, decide how many times RA will be done between PT */ + u8 pt_smooth_factor; #endif #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) - u8 rate_down_counter; - u8 rate_up_counter; - u8 rate_direction; - u8 bounding_type; - u8 bounding_counter; - u8 bounding_learning_time; - u8 rate_down_start_time; + u8 rate_down_counter; + u8 rate_up_counter; + u8 rate_direction; + u8 bounding_type; + u8 bounding_counter; + u8 bounding_learning_time; + u8 rate_down_start_time; #endif }; #endif struct ra_table { - u8 firstconnect; -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - boolean PT_collision_pre; -#endif - -#if (defined(CONFIG_RA_DBG_CMD)) - boolean is_ra_dbg_init; - - u8 RTY_P[ODM_NUM_RATE_IDX]; - u8 RTY_P_default[ODM_NUM_RATE_IDX]; - boolean RTY_P_modify_note[ODM_NUM_RATE_IDX]; - - u8 RATE_UP_RTY_RATIO[ODM_NUM_RATE_IDX]; - u8 RATE_UP_RTY_RATIO_default[ODM_NUM_RATE_IDX]; - boolean RATE_UP_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX]; - - u8 RATE_DOWN_RTY_RATIO[ODM_NUM_RATE_IDX]; - u8 RATE_DOWN_RTY_RATIO_default[ODM_NUM_RATE_IDX]; - boolean RATE_DOWN_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX]; - - boolean ra_para_feedback_req; - - u8 para_idx; - u8 rate_idx; - u8 value; - u16 value_16; - u8 rate_length; -#endif - /*u8 link_tx_rate[ODM_ASSOCIATE_ENTRY_NUM];*/ - u8 mu1_rate[30]; + u8 firstconnect; + /*@u8 link_tx_rate[ODM_ASSOCIATE_ENTRY_NUM];*/ + #ifdef MU_EX_MACID + u8 mu1_rate[MU_EX_MACID]; + #endif u8 highest_client_tx_order; u16 highest_client_tx_rate_order; u8 power_tracking_flag; - u8 RA_threshold_offset; - u8 RA_offset_direction; - u8 up_ramask_cnt; /*force update_ra_mask counter*/ - u8 up_ramask_cnt_tmp; /*Just for debug, should be removed latter*/ - -#if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT)) - u8 per_rate_retrylimit_20M[ODM_NUM_RATE_IDX]; - u8 per_rate_retrylimit_40M[ODM_NUM_RATE_IDX]; + u8 ra_th_ofst; /*RA_threshold_offset*/ + u8 ra_ofst_direc; /*RA_offset_direction*/ + u8 up_ramask_cnt; /*@force update_ra_mask counter*/ + u8 up_ramask_cnt_tmp; /*@Just for debug, should be removed latter*/ + u32 rrsr_val_init; /*0x440*/ + u32 rrsr_val_curr; /*0x440*/ + boolean dynamic_rrsr_en; +#if 0 /*@CONFIG_RA_DYNAMIC_RTY_LIMIT*/ + u8 per_rate_retrylimit_20M[PHY_NUM_RATE_IDX]; + u8 per_rate_retrylimit_40M[PHY_NUM_RATE_IDX]; u8 retry_descend_num; u8 retrylimit_low; u8 retrylimit_high; #endif - u8 ldpc_thres; /* if RSSI > ldpc_thres => switch from LPDC to BCC */ - - void (*record_ra_info)(void *dm_void, u8 macid, struct cmn_sta_info *sta, u64 ra_mask); + u8 ldpc_thres; /* @if RSSI > ldpc_th => switch from LPDC to BCC */ + void (*record_ra_info)(void *dm_void, u8 macid, + struct cmn_sta_info *sta, u64 ra_mask); }; -void -phydm_h2C_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -); +/* @1 ============================================================ + * 1 Function Prototype + * 1 ============================================================ + */ +boolean phydm_is_cck_rate(void *dm_void, u8 rate); -#if (defined(CONFIG_RA_DBG_CMD)) +boolean phydm_is_ofdm_rate(void *dm_void, u8 rate); -void -odm_RA_debug( - void *dm_void, - u32 *const dm_value -); +boolean phydm_is_ht_rate(void *dm_void, u8 rate); -void -odm_ra_para_adjust_init( - void *dm_void -); +boolean phydm_is_vht_rate(void *dm_void, u8 rate); +u8 phydm_rate_type_2_num_ss(void *dm_void, enum PDM_RATE_TYPE type); + +u8 phydm_rate_to_num_ss(void *dm_void, u8 data_rate); + +void phydm_h2C_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); + +void phydm_ra_debug(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len); + +void odm_c2h_ra_para_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len); + +void phydm_ra_dynamic_retry_count(void *dm_void); + + +void phydm_print_rate(void *dm_void, u8 rate, u32 dbg_component); + +void phydm_print_rate_2_buff(void *dm_void, u8 rate, char *buf, u16 buf_size); + +void phydm_c2h_ra_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len); + +u8 phydm_rate_order_compute(void *dm_void, u8 rate_idx); + +void phydm_rrsr_set_register(void *dm_void, u32 rrsr_val); + +void phydm_ra_info_watchdog(void *dm_void); + +void phydm_rrsr_en(void *dm_void, boolean en_rrsr); + +void phydm_ra_info_init(void *dm_void); + +void phydm_modify_RA_PCR_threshold(void *dm_void, u8 ra_ofst_direc, + u8 ra_th_ofst); + +u8 phydm_vht_en_mapping(void *dm_void, u32 wireless_mode); + +u8 phydm_rate_id_mapping(void *dm_void, u32 wireless_mode, u8 rf_type, u8 bw); +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) +void phydm_update_hal_ra_mask( + void *dm_void, + u32 wireless_mode, + u8 rf_type, + u8 BW, + u8 mimo_ps_enable, + u8 disable_cck_rate, + u32 *ratr_bitmap_msb_in, + u32 *ratr_bitmap_in, + u8 tx_rate_level); #endif -void -phydm_ra_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len -); - -void -odm_c2h_ra_para_report_handler( - void *dm_void, - u8 *cmd_buf, - u8 cmd_len -); - -void -odm_ra_para_adjust( - void *dm_void -); - -void -phydm_ra_dynamic_retry_count( - void *dm_void -); - -void -phydm_ra_dynamic_retry_limit( - void *dm_void -); - -void -phydm_print_rate( - void *dm_void, - u8 rate, - u32 dbg_component -); - -void -phydm_c2h_ra_report_handler( - void *dm_void, - u8 *cmd_buf, - u8 cmd_len -); - -u8 -phydm_rate_order_compute( - void *dm_void, - u8 rate_idx -); - -void -phydm_ra_info_watchdog( - void *dm_void -); - -void -phydm_ra_info_init( - void *dm_void -); - -void -phydm_modify_RA_PCR_threshold( - void *dm_void, - u8 RA_offset_direction, - u8 RA_threshold_offset -); - -u8 -phydm_vht_en_mapping( - void *dm_void, - u32 wireless_mode -); - -u8 -phydm_rate_id_mapping( - void *dm_void, - u32 wireless_mode, - u8 rf_type, - u8 bw -); - -void -phydm_update_hal_ra_mask( - void *dm_void, - u32 wireless_mode, - u8 rf_type, - u8 BW, - u8 mimo_ps_enable, - u8 disable_cck_rate, - u32 *ratr_bitmap_msb_in, - u32 *ratr_bitmap_in, - u8 tx_rate_level -); - -void -phydm_refresh_rate_adaptive_mask( - void *dm_void -); - -u8 -phydm_rssi_lv_dec( - void *dm_void, - u32 rssi, - u8 ratr_state -); - -void -odm_ra_post_action_on_assoc( - void *dm -); - -u8 -odm_find_rts_rate( - void *dm_void, - u8 tx_rate, - boolean is_erp_protect -); - -void -phydm_show_sta_info( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); - -u8 -phydm_get_plcp( - void *dm_void, - u16 macid -); - -#ifdef PHYDM_3RD_REFORM_RA_MASK - -void -phydm_ra_registed( - void *dm_void, - u8 macid, - u8 rssi_from_assoc -); - -void -phydm_ra_offline( - void *dm_void, - u8 macid -); - - -void -phydm_ra_mask_watchdog( - void *dm_void -); - +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) +u8 phydm_get_plcp(void *dm_void, u16 macid); #endif +void phydm_refresh_rate_adaptive_mask(void *dm_void); + +u8 phydm_get_rx_stream_num(void *dm_void, enum rf_type type); + +u8 phydm_rssi_lv_dec(void *dm_void, u32 rssi, u8 ratr_state); + +void odm_ra_post_action_on_assoc(void *dm); + +u8 odm_find_rts_rate(void *dm_void, u8 tx_rate, boolean is_erp_protect); + +void phydm_show_sta_info(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); + +u8 phydm_get_rate_from_rssi_lv(void *dm_void, u8 sta_idx); + +void phydm_ra_registed(void *dm_void, u8 macid, u8 rssi_from_assoc); + +void phydm_ra_offline(void *dm_void, u8 macid); + +void phydm_ra_mask_watchdog(void *dm_void); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - -void -odm_refresh_basic_rate_mask( - void *dm_void -); - -void -odm_update_init_rate_work_item_callback( - void *context -); - -void -odm_refresh_ldpc_rts_mp( - void *adapter, - struct dm_struct *dm, - u8 m_mac_id, - u8 iot_peer, - s32 undecorated_smoothed_pwdb -); - -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - -void -phydm_gen_ramask_h2c_AP( - void *dm_void, - struct rtl8192cd_priv *priv, - struct sta_info *entry, - u8 rssi_level -); - -#endif/*#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))*/ - - -#if (defined(CONFIG_RA_DYNAMIC_RATE_ID)) -void -phydm_ra_dynamic_rate_id_on_assoc( - void *dm_void, - u8 wireless_mode, - u8 init_rate_id -); - -void -phydm_ra_dynamic_rate_id_init( - void *dm_void -); - -void -phydm_update_rate_id( - void *dm_void, - u8 rate, - u8 platform_macid -); - +void odm_refresh_basic_rate_mask( + void *dm_void); #endif - -#endif /*#ifndef __ODMRAINFO_H__*/ +#endif /*@#ifndef __PHYDMRAINFO_H__*/ diff --git a/hal/phydm/phydm_reg.h b/hal/phydm/phydm_reg.h index e6302eb..e1bf62d 100644 --- a/hal/phydm/phydm_reg.h +++ b/hal/phydm/phydm_reg.h @@ -22,7 +22,7 @@ * Larry Finger * *****************************************************************************/ -/* ************************************************************ +/************************************************************* * File Name: odm_reg.h * * Description: @@ -30,17 +30,18 @@ * This file is for general register definition. * * - * ************************************************************ */ -#ifndef __HAL_ODM_REG_H__ + ************************************************************/ +#ifndef __HAL_ODM_REG_H__ #define __HAL_ODM_REG_H__ -/* +/*@ * Register Definition - * */ + * + */ -/* MAC REG */ -#define ODM_BB_RESET 0x002 -#define ODM_DUMMY 0x4fe +/* @MAC REG */ +#define ODM_BB_RESET 0x002 +#define ODM_DUMMY 0x4fe #define RF_T_METER_OLD 0x24 #define RF_T_METER_NEW 0x42 @@ -48,159 +49,159 @@ #define ODM_EDCA_VI_PARAM 0x504 #define ODM_EDCA_BE_PARAM 0x508 #define ODM_EDCA_BK_PARAM 0x50C -#define ODM_TXPAUSE 0x522 +#define ODM_TXPAUSE 0x522 -/* LTE_COEX */ +/* @LTE_COEX */ #define REG_LTECOEX_CTRL 0x07C0 -#define REG_LTECOEX_WRITE_DATA 0x07C4 -#define REG_LTECOEX_READ_DATA 0x07C8 -#define REG_LTECOEX_PATH_CONTROL 0x70 +#define REG_LTECOEX_WRITE_DATA 0x07C4 +#define REG_LTECOEX_READ_DATA 0x07C8 +#define REG_LTECOEX_PATH_CONTROL 0x70 -/* BB REG */ +/* @BB REG */ #define ODM_FPGA_PHY0_PAGE8 0x800 #define ODM_PSD_SETTING 0x808 #define ODM_AFE_SETTING 0x818 -#define ODM_TXAGC_B_6_18 0x830 +#define ODM_TXAGC_B_6_18 0x830 #define ODM_TXAGC_B_24_54 0x834 #define ODM_TXAGC_B_MCS32_5 0x838 -#define ODM_TXAGC_B_MCS0_MCS3 0x83c -#define ODM_TXAGC_B_MCS4_MCS7 0x848 -#define ODM_TXAGC_B_MCS8_MCS11 0x84c +#define ODM_TXAGC_B_MCS0_MCS3 0x83c +#define ODM_TXAGC_B_MCS4_MCS7 0x848 +#define ODM_TXAGC_B_MCS8_MCS11 0x84c #define ODM_ANALOG_REGISTER 0x85c -#define ODM_RF_INTERFACE_OUTPUT 0x860 -#define ODM_TXAGC_B_MCS12_MCS15 0x868 -#define ODM_TXAGC_B_11_A_2_11 0x86c +#define ODM_RF_INTERFACE_OUTPUT 0x860 +#define ODM_TXAGC_B_MCS12_MCS15 0x868 +#define ODM_TXAGC_B_11_A_2_11 0x86c #define ODM_AD_DA_LSB_MASK 0x874 #define ODM_ENABLE_3_WIRE 0x88c #define ODM_PSD_REPORT 0x8b4 -#define ODM_R_ANT_SELECT 0x90c +#define ODM_R_ANT_SELECT 0x90c #define ODM_CCK_ANT_SELECT 0xa07 #define ODM_CCK_PD_THRESH 0xa0a #define ODM_CCK_RF_REG1 0xa11 #define ODM_CCK_MATCH_FILTER 0xa20 -#define ODM_CCK_RAKE_MAC 0xa2e +#define ODM_CCK_RAKE_MAC 0xa2e #define ODM_CCK_CNT_RESET 0xa2d #define ODM_CCK_TX_DIVERSITY 0xa2f #define ODM_CCK_FA_CNT_MSB 0xa5b #define ODM_CCK_FA_CNT_LSB 0xa5c -#define ODM_CCK_NEW_FUNCTION 0xa75 -#define ODM_OFDM_PHY0_PAGE_C 0xc00 +#define ODM_CCK_NEW_FUNCTION 0xa75 +#define ODM_OFDM_PHY0_PAGE_C 0xc00 #define ODM_OFDM_RX_ANT 0xc04 -#define ODM_R_A_RXIQI 0xc14 +#define ODM_R_A_RXIQI 0xc14 #define ODM_R_A_AGC_CORE1 0xc50 #define ODM_R_A_AGC_CORE2 0xc54 #define ODM_R_B_AGC_CORE1 0xc58 -#define ODM_R_AGC_PAR 0xc70 +#define ODM_R_AGC_PAR 0xc70 #define ODM_R_HTSTF_AGC_PAR 0xc7c -#define ODM_TX_PWR_TRAINING_A 0xc90 -#define ODM_TX_PWR_TRAINING_B 0xc98 -#define ODM_OFDM_FA_CNT1 0xcf0 -#define ODM_OFDM_PHY0_PAGE_D 0xd00 -#define ODM_OFDM_FA_CNT2 0xda0 -#define ODM_OFDM_FA_CNT3 0xda4 -#define ODM_OFDM_FA_CNT4 0xda8 -#define ODM_TXAGC_A_6_18 0xe00 +#define ODM_TX_PWR_TRAINING_A 0xc90 +#define ODM_TX_PWR_TRAINING_B 0xc98 +#define ODM_OFDM_FA_CNT1 0xcf0 +#define ODM_OFDM_PHY0_PAGE_D 0xd00 +#define ODM_OFDM_FA_CNT2 0xda0 +#define ODM_OFDM_FA_CNT3 0xda4 +#define ODM_OFDM_FA_CNT4 0xda8 +#define ODM_TXAGC_A_6_18 0xe00 #define ODM_TXAGC_A_24_54 0xe04 #define ODM_TXAGC_A_1_MCS32 0xe08 -#define ODM_TXAGC_A_MCS0_MCS3 0xe10 -#define ODM_TXAGC_A_MCS4_MCS7 0xe14 -#define ODM_TXAGC_A_MCS8_MCS11 0xe18 -#define ODM_TXAGC_A_MCS12_MCS15 0xe1c +#define ODM_TXAGC_A_MCS0_MCS3 0xe10 +#define ODM_TXAGC_A_MCS4_MCS7 0xe14 +#define ODM_TXAGC_A_MCS8_MCS11 0xe18 +#define ODM_TXAGC_A_MCS12_MCS15 0xe1c /* RF REG */ -#define ODM_GAIN_SETTING 0x00 -#define ODM_CHANNEL 0x18 +#define ODM_GAIN_SETTING 0x00 +#define ODM_CHANNEL 0x18 #define ODM_RF_T_METER 0x24 #define ODM_RF_T_METER_92D 0x42 #define ODM_RF_T_METER_88E 0x42 #define ODM_RF_T_METER_92E 0x42 #define ODM_RF_T_METER_8812 0x42 -#define REG_RF_TX_GAIN_OFFSET 0x55 +#define REG_RF_TX_GAIN_OFFSET 0x55 -/* ant Detect Reg */ -#define ODM_DPDT 0x300 +/* @ant Detect Reg */ +#define ODM_DPDT 0x300 /* PSD Init */ -#define ODM_PSDREG 0x808 +#define ODM_PSDREG 0x808 -/* 92D path Div */ -#define PATHDIV_REG 0xB30 -#define PATHDIV_TRI 0xBA0 +/* @92D path Div */ +#define PATHDIV_REG 0xB30 +#define PATHDIV_TRI 0xBA0 -/* +/*@ * Bitmap Definition - * */ + */ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) /* TX AGC */ - #define REG_TX_AGC_A_CCK_11_CCK_1_JAGUAR 0xc20 - #define REG_TX_AGC_A_OFDM18_OFDM6_JAGUAR 0xc24 - #define REG_TX_AGC_A_OFDM54_OFDM24_JAGUAR 0xc28 - #define REG_TX_AGC_A_MCS3_MCS0_JAGUAR 0xc2c - #define REG_TX_AGC_A_MCS7_MCS4_JAGUAR 0xc30 - #define REG_TX_AGC_A_MCS11_MCS8_JAGUAR 0xc34 - #define REG_TX_AGC_A_MCS15_MCS12_JAGUAR 0xc38 + #define REG_TX_AGC_A_CCK_11_CCK_1_JAGUAR 0xc20 + #define REG_TX_AGC_A_OFDM18_OFDM6_JAGUAR 0xc24 + #define REG_TX_AGC_A_OFDM54_OFDM24_JAGUAR 0xc28 + #define REG_TX_AGC_A_MCS3_MCS0_JAGUAR 0xc2c + #define REG_TX_AGC_A_MCS7_MCS4_JAGUAR 0xc30 + #define REG_TX_AGC_A_MCS11_MCS8_JAGUAR 0xc34 + #define REG_TX_AGC_A_MCS15_MCS12_JAGUAR 0xc38 #define REG_TX_AGC_A_NSS1_INDEX3_NSS1_INDEX0_JAGUAR 0xc3c #define REG_TX_AGC_A_NSS1_INDEX7_NSS1_INDEX4_JAGUAR 0xc40 #define REG_TX_AGC_A_NSS2_INDEX1_NSS1_INDEX8_JAGUAR 0xc44 #define REG_TX_AGC_A_NSS2_INDEX5_NSS2_INDEX2_JAGUAR 0xc48 #define REG_TX_AGC_A_NSS2_INDEX9_NSS2_INDEX6_JAGUAR 0xc4c #if defined(CONFIG_WLAN_HAL_8814AE) - #define REG_TX_AGC_A_MCS19_MCS16_JAGUAR 0xcd8 - #define REG_TX_AGC_A_MCS23_MCS20_JAGUAR 0xcdc + #define REG_TX_AGC_A_MCS19_MCS16_JAGUAR 0xcd8 + #define REG_TX_AGC_A_MCS23_MCS20_JAGUAR 0xcdc #define REG_TX_AGC_A_NSS3_INDEX3_NSS3_INDEX0_JAGUAR 0xce0 #define REG_TX_AGC_A_NSS3_INDEX7_NSS3_INDEX4_JAGUAR 0xce4 #define REG_TX_AGC_A_NSS3_INDEX9_NSS3_INDEX8_JAGUAR 0xce8 #endif - #define REG_TX_AGC_B_CCK_11_CCK_1_JAGUAR 0xe20 - #define REG_TX_AGC_B_OFDM18_OFDM6_JAGUAR 0xe24 - #define REG_TX_AGC_B_OFDM54_OFDM24_JAGUAR 0xe28 - #define REG_TX_AGC_B_MCS3_MCS0_JAGUAR 0xe2c - #define REG_TX_AGC_B_MCS7_MCS4_JAGUAR 0xe30 - #define REG_TX_AGC_B_MCS11_MCS8_JAGUAR 0xe34 - #define REG_TX_AGC_B_MCS15_MCS12_JAGUAR 0xe38 + #define REG_TX_AGC_B_CCK_11_CCK_1_JAGUAR 0xe20 + #define REG_TX_AGC_B_OFDM18_OFDM6_JAGUAR 0xe24 + #define REG_TX_AGC_B_OFDM54_OFDM24_JAGUAR 0xe28 + #define REG_TX_AGC_B_MCS3_MCS0_JAGUAR 0xe2c + #define REG_TX_AGC_B_MCS7_MCS4_JAGUAR 0xe30 + #define REG_TX_AGC_B_MCS11_MCS8_JAGUAR 0xe34 + #define REG_TX_AGC_B_MCS15_MCS12_JAGUAR 0xe38 #define REG_TX_AGC_B_NSS1_INDEX3_NSS1_INDEX0_JAGUAR 0xe3c #define REG_TX_AGC_B_NSS1_INDEX7_NSS1_INDEX4_JAGUAR 0xe40 #define REG_TX_AGC_B_NSS2_INDEX1_NSS1_INDEX8_JAGUAR 0xe44 #define REG_TX_AGC_B_NSS2_INDEX5_NSS2_INDEX2_JAGUAR 0xe48 #define REG_TX_AGC_B_NSS2_INDEX9_NSS2_INDEX6_JAGUAR 0xe4c #if defined(CONFIG_WLAN_HAL_8814AE) - #define REG_TX_AGC_B_MCS19_MCS16_JAGUAR 0xed8 - #define REG_TX_AGC_B_MCS23_MCS20_JAGUAR 0xedc + #define REG_TX_AGC_B_MCS19_MCS16_JAGUAR 0xed8 + #define REG_TX_AGC_B_MCS23_MCS20_JAGUAR 0xedc #define REG_TX_AGC_B_NSS3_INDEX3_NSS3_INDEX0_JAGUAR 0xee0 #define REG_TX_AGC_B_NSS3_INDEX7_NSS3_INDEX4_JAGUAR 0xee4 #define REG_TX_AGC_B_NSS3_INDEX9_NSS3_INDEX8_JAGUAR 0xee8 #define REG_TX_AGC_C_CCK_11_CCK_1_JAGUAR 0x1820 #define REG_TX_AGC_C_OFDM18_OFDM6_JAGUAR 0x1824 #define REG_TX_AGC_C_OFDM54_OFDM24_JAGUAR 0x1828 - #define REG_TX_AGC_C_MCS3_MCS0_JAGUAR 0x182c - #define REG_TX_AGC_C_MCS7_MCS4_JAGUAR 0x1830 - #define REG_TX_AGC_C_MCS11_MCS8_JAGUAR 0x1834 - #define REG_TX_AGC_C_MCS15_MCS12_JAGUAR 0x1838 + #define REG_TX_AGC_C_MCS3_MCS0_JAGUAR 0x182c + #define REG_TX_AGC_C_MCS7_MCS4_JAGUAR 0x1830 + #define REG_TX_AGC_C_MCS11_MCS8_JAGUAR 0x1834 + #define REG_TX_AGC_C_MCS15_MCS12_JAGUAR 0x1838 #define REG_TX_AGC_C_NSS1_INDEX3_NSS1_INDEX0_JAGUAR 0x183c #define REG_TX_AGC_C_NSS1_INDEX7_NSS1_INDEX4_JAGUAR 0x1840 #define REG_TX_AGC_C_NSS2_INDEX1_NSS1_INDEX8_JAGUAR 0x1844 #define REG_TX_AGC_C_NSS2_INDEX5_NSS2_INDEX2_JAGUAR 0x1848 #define REG_TX_AGC_C_NSS2_INDEX9_NSS2_INDEX6_JAGUAR 0x184c - #define REG_TX_AGC_C_MCS19_MCS16_JAGUAR 0x18d8 - #define REG_TX_AGC_C_MCS23_MCS20_JAGUAR 0x18dc + #define REG_TX_AGC_C_MCS19_MCS16_JAGUAR 0x18d8 + #define REG_TX_AGC_C_MCS23_MCS20_JAGUAR 0x18dc #define REG_TX_AGC_C_NSS3_INDEX3_NSS3_INDEX0_JAGUAR 0x18e0 #define REG_TX_AGC_C_NSS3_INDEX7_NSS3_INDEX4_JAGUAR 0x18e4 #define REG_TX_AGC_C_NSS3_INDEX9_NSS3_INDEX8_JAGUAR 0x18e8 #define REG_TX_AGC_D_CCK_11_CCK_1_JAGUAR 0x1a20 #define REG_TX_AGC_D_OFDM18_OFDM6_JAGUAR 0x1a24 #define REG_TX_AGC_D_OFDM54_OFDM24_JAGUAR 0x1a28 - #define REG_TX_AGC_D_MCS3_MCS0_JAGUAR 0x1a2c - #define REG_TX_AGC_D_MCS7_MCS4_JAGUAR 0x1a30 - #define REG_TX_AGC_D_MCS11_MCS8_JAGUAR 0x1a34 - #define REG_TX_AGC_D_MCS15_MCS12_JAGUAR 0x1a38 + #define REG_TX_AGC_D_MCS3_MCS0_JAGUAR 0x1a2c + #define REG_TX_AGC_D_MCS7_MCS4_JAGUAR 0x1a30 + #define REG_TX_AGC_D_MCS11_MCS8_JAGUAR 0x1a34 + #define REG_TX_AGC_D_MCS15_MCS12_JAGUAR 0x1a38 #define REG_TX_AGC_D_NSS1_INDEX3_NSS1_INDEX0_JAGUAR 0x1a3c #define REG_TX_AGC_D_NSS1_INDEX7_NSS1_INDEX4_JAGUAR 0x1a40 #define REG_TX_AGC_D_NSS2_INDEX1_NSS1_INDEX8_JAGUAR 0x1a44 #define REG_TX_AGC_D_NSS2_INDEX5_NSS2_INDEX2_JAGUAR 0x1a48 #define REG_TX_AGC_D_NSS2_INDEX9_NSS2_INDEX6_JAGUAR 0x1a4c - #define REG_TX_AGC_D_MCS19_MCS16_JAGUAR 0x1ad8 - #define REG_TX_AGC_D_MCS23_MCS20_JAGUAR 0x1adc + #define REG_TX_AGC_D_MCS19_MCS16_JAGUAR 0x1ad8 + #define REG_TX_AGC_D_MCS23_MCS20_JAGUAR 0x1adc #define REG_TX_AGC_D_NSS3_INDEX3_NSS3_INDEX0_JAGUAR 0x1ae0 #define REG_TX_AGC_D_NSS3_INDEX7_NSS3_INDEX4_JAGUAR 0x1ae4 #define REG_TX_AGC_D_NSS3_INDEX9_NSS3_INDEX8_JAGUAR 0x1ae8 @@ -210,6 +211,30 @@ #define is_tx_agc_byte1_jaguar 0xff00 #define is_tx_agc_byte2_jaguar 0xff0000 #define is_tx_agc_byte3_jaguar 0xff000000 +#if defined(CONFIG_WLAN_HAL_8198F) || defined(CONFIG_WLAN_HAL_8822CE) ||\ +defined(CONFIG_WLAN_HAL_8814BE) || defined(CONFIG_WLAN_HAL_8812FE) + #define REG_TX_AGC_CCK_11_CCK_1_JAGUAR3 0x3a00 + #define REG_TX_AGC_OFDM_18_CCK_6_JAGUAR3 0x3a04 + #define REG_TX_AGC_OFDM_54_CCK_24_JAGUAR3 0x3a08 + #define REG_TX_AGC_MCS3_0_JAGUAR3 0x3a0c + #define REG_TX_AGC_MCS7_4_JAGUAR3 0x3a10 + #define REG_TX_AGC_MCS11_8_JAGUAR3 0x3a14 + #define REG_TX_AGC_MCS15_12_JAGUAR3 0x3a18 + #define REG_TX_AGC_MCS19_16_JAGUAR3 0x3a1c + #define REG_TX_AGC_MCS23_20_JAGUAR3 0x3a20 + #define REG_TX_AGC_MCS27_24_JAGUAR3 0x3a24 + #define REG_TX_AGC_MCS31_28_JAGUAR3 0x3a28 + #define REG_TX_AGC_VHT_Nss1_MCS3_0_JAGUAR3 0x3a2c + #define REG_TX_AGC_VHT_Nss1_MCS7_4_JAGUAR3 0x3a30 + #define REG_TX_AGC_VHT_NSS2_MCS1_NSS1_MCS8_JAGUAR3 0x3a34 + #define REG_TX_AGC_VHT_Nss2_MCS5_2_JAGUAR3 0x3a38 + #define REG_TX_AGC_VHT_Nss2_MCS9_6_JAGUAR3 0x3a3c + #define REG_TX_AGC_VHT_Nss3_MCS3_0_JAGUAR3 0x3a40 + #define REG_TX_AGC_VHT_Nss3_MCS7_4_JAGUAR3 0x3a44 + #define REG_TX_AGC_VHT_Nss4_MCS1_Nss3_MCS8_JAGUAR3 0x3a48 + #define REG_TX_AGC_VHT_Nss4_MCS5_2_JAGUAR3 0x3a4c + #define REG_TX_AGC_VHT_Nss4_MCS9_6_JAGUAR3 0x3a50 +#endif #endif #define BIT_FA_RESET BIT(0) diff --git a/hal/phydm/phydm_regdefine11ac.h b/hal/phydm/phydm_regdefine11ac.h index 6a213e2..7824ac2 100644 --- a/hal/phydm/phydm_regdefine11ac.h +++ b/hal/phydm/phydm_regdefine11ac.h @@ -23,52 +23,52 @@ * *****************************************************************************/ -#ifndef __ODM_REGDEFINE11AC_H__ +#ifndef __ODM_REGDEFINE11AC_H__ #define __ODM_REGDEFINE11AC_H__ -/* 2 RF REG LIST */ +/* @2 RF REG LIST */ -/* 2 BB REG LIST - * PAGE 8 */ -#define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 +/* @2 BB REG LIST */ +/* PAGE 8 */ +#define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 #define ODM_REG_BB_RX_PATH_11AC 0x808 #define ODM_REG_BB_TX_PATH_11AC 0x80c -#define ODM_REG_BB_ATC_11AC 0x860 -#define ODM_REG_EDCCA_POWER_CAL 0x8dc +#define ODM_REG_BB_ATC_11AC 0x860 +#define ODM_REG_EDCCA_POWER_CAL 0x8dc #define ODM_REG_DBG_RPT_11AC 0x8fc /* PAGE 9 */ #define ODM_REG_EDCCA_DOWN_OPT 0x900 #define ODM_REG_ACBB_EDCCA_ENHANCE 0x944 -#define odm_adc_trigger_jaguar2 0x95C /*ADC sample mode*/ +#define odm_adc_trigger_jaguar2 0x95C /*@ADC sample mode*/ #define ODM_REG_OFDM_FA_RST_11AC 0x9A4 #define ODM_REG_CCX_PERIOD_11AC 0x990 #define ODM_REG_NHM_TH9_TH10_11AC 0x994 -#define ODM_REG_CLM_11AC 0x994 -#define ODM_REG_NHM_TH3_TO_TH0_11AC 0x998 -#define ODM_REG_NHM_TH7_TO_TH4_11AC 0x99c +#define ODM_REG_CLM_11AC 0x994 +#define ODM_REG_NHM_TH3_TO_TH0_11AC 0x998 +#define ODM_REG_NHM_TH7_TO_TH4_11AC 0x99c #define ODM_REG_NHM_TH8_11AC 0x9a0 #define ODM_REG_NHM_9E8_11AC 0x9e8 #define ODM_REG_CSI_CONTENT_VALUE 0x9b4 /* PAGE A */ #define ODM_REG_CCK_CCA_11AC 0xA0A #define ODM_REG_CCK_FA_RST_11AC 0xA2C -#define ODM_REG_CCK_FA_11AC 0xA5C +#define ODM_REG_CCK_FA_11AC 0xA5C /* PAGE B */ -#define ODM_REG_RST_RPT_11AC 0xB58 +#define ODM_REG_RST_RPT_11AC 0xB58 /* PAGE C */ -#define ODM_REG_TRMUX_11AC 0xC08 -#define ODM_REG_IGI_A_11AC 0xC50 +#define ODM_REG_TRMUX_11AC 0xC08 +#define ODM_REG_IGI_A_11AC 0xC50 /* PAGE E */ -#define ODM_REG_IGI_B_11AC 0xE50 -#define ODM_REG_TRMUX_11AC_B 0xE08 +#define ODM_REG_IGI_B_11AC 0xE50 +#define ODM_REG_ANT_11AC_B 0xE08 /* PAGE F */ #define ODM_REG_CCK_CRC32_CNT_11AC 0xF04 #define ODM_REG_CCK_CCA_CNT_11AC 0xF08 #define ODM_REG_VHT_CRC32_CNT_11AC 0xF0c #define ODM_REG_HT_CRC32_CNT_11AC 0xF10 -#define ODM_REG_OFDM_CRC32_CNT_11AC 0xF14 +#define ODM_REG_OFDM_CRC32_CNT_11AC 0xF14 #define ODM_REG_OFDM_FA_11AC 0xF48 #define ODM_REG_OFDM_FA_TYPE1_11AC 0xFCC #define ODM_REG_OFDM_FA_TYPE2_11AC 0xFD0 @@ -76,28 +76,34 @@ #define ODM_REG_OFDM_FA_TYPE4_11AC 0xFC0 #define ODM_REG_OFDM_FA_TYPE5_11AC 0xFC4 #define ODM_REG_OFDM_FA_TYPE6_11AC 0xFC8 -#define ODM_REG_RPT_11AC 0xfa0 +#define ODM_REG_RPT_11AC 0xfa0 #define ODM_REG_CLM_RESULT_11AC 0xfa4 #define ODM_REG_NHM_CNT_11AC 0xfa8 -#define ODM_REG_NHM_DUR_READY_11AC 0xfb4 +#define ODM_REG_NHM_DUR_READY_11AC 0xfb4 -#define ODM_REG_NHM_CNT7_TO_CNT4_11AC 0xfac -#define ODM_REG_NHM_CNT11_TO_CNT8_11AC 0xfb0 +#define ODM_REG_NHM_CNT7_TO_CNT4_11AC 0xfac +#define ODM_REG_NHM_CNT11_TO_CNT8_11AC 0xfb0 /* PAGE 18 */ -#define ODM_REG_IGI_C_11AC 0x1850 +#define ODM_REG_IGI_C_11AC 0x1850 /* PAGE 1A */ -#define ODM_REG_IGI_D_11AC 0x1A50 +#define ODM_REG_IGI_D_11AC 0x1A50 -/* 2 MAC REG LIST */ -#define ODM_REG_RESP_TX_11AC 0x6D8 +/* PAGE 1D */ +#define ODM_REG_IGI_11AC3 0x1D70 + +/* @2 MAC REG LIST */ +#define ODM_REG_RESP_TX_11AC 0x6D8 -/* DIG Related */ -#define ODM_BIT_IGI_11AC 0x0000007F +/* @DIG Related */ +#define ODM_BIT_IGI_11AC 0x0000007F +#define ODM_BIT_IGI_B_11AC3 0x00007F00 +#define ODM_BIT_IGI_C_11AC3 0x007F0000 +#define ODM_BIT_IGI_D_11AC3 0x7F000000 #define ODM_BIT_CCK_RPT_FORMAT_11AC BIT(16) #define ODM_BIT_BB_RX_PATH_11AC 0xF #define ODM_BIT_BB_TX_PATH_11AC 0xF -#define ODM_BIT_BB_ATC_11AC BIT(14) +#define ODM_BIT_BB_ATC_11AC BIT(14) #endif diff --git a/hal/phydm/phydm_regdefine11n.h b/hal/phydm/phydm_regdefine11n.h index 1d8326d..e36f37d 100644 --- a/hal/phydm/phydm_regdefine11n.h +++ b/hal/phydm/phydm_regdefine11n.h @@ -23,86 +23,86 @@ * *****************************************************************************/ -#ifndef __ODM_REGDEFINE11N_H__ +#ifndef __ODM_REGDEFINE11N_H__ #define __ODM_REGDEFINE11N_H__ - -/* 2 RF REG LIST */ -#define ODM_REG_RF_MODE_11N 0x00 -#define ODM_REG_RF_0B_11N 0x0B -#define ODM_REG_CHNBW_11N 0x18 -#define ODM_REG_T_METER_11N 0x24 -#define ODM_REG_RF_25_11N 0x25 -#define ODM_REG_RF_26_11N 0x26 -#define ODM_REG_RF_27_11N 0x27 -#define ODM_REG_RF_2B_11N 0x2B -#define ODM_REG_RF_2C_11N 0x2C -#define ODM_REG_RXRF_A3_11N 0x3C +/* @2 RF REG LIST */ +#define ODM_REG_RF_MODE_11N 0x00 +#define ODM_REG_RF_0B_11N 0x0B +#define ODM_REG_CHNBW_11N 0x18 +#define ODM_REG_T_METER_11N 0x24 +#define ODM_REG_RF_25_11N 0x25 +#define ODM_REG_RF_26_11N 0x26 +#define ODM_REG_RF_27_11N 0x27 +#define ODM_REG_RF_2B_11N 0x2B +#define ODM_REG_RF_2C_11N 0x2C +#define ODM_REG_RXRF_A3_11N 0x3C #define ODM_REG_T_METER_92D_11N 0x42 #define ODM_REG_T_METER_88E_11N 0x42 -/* 2 BB REG LIST - * PAGE 8 */ -#define ODM_REG_BB_CTRL_11N 0x800 -#define ODM_REG_RF_PIN_11N 0x804 -#define ODM_REG_PSD_CTRL_11N 0x808 +/* @2 BB REG LIST + * PAGE 8 + */ +#define ODM_REG_BB_CTRL_11N 0x800 +#define ODM_REG_RF_PIN_11N 0x804 +#define ODM_REG_PSD_CTRL_11N 0x808 #define ODM_REG_TX_ANT_CTRL_11N 0x80C #define ODM_REG_BB_PWR_SAV5_11N 0x818 #define ODM_REG_CCK_RPT_FORMAT_11N 0x824 -#define ODM_REG_CCK_RPT_FORMAT_11N_B 0x82C +#define ODM_REG_CCK_RPT_FORMAT_11N_B 0x82C #define ODM_REG_RX_DEFAULT_A_11N 0x858 #define ODM_REG_RX_DEFAULT_B_11N 0x85A #define ODM_REG_BB_PWR_SAV3_11N 0x85C #define ODM_REG_ANTSEL_CTRL_11N 0x860 #define ODM_REG_RX_ANT_CTRL_11N 0x864 -#define ODM_REG_PIN_CTRL_11N 0x870 +#define ODM_REG_PIN_CTRL_11N 0x870 #define ODM_REG_BB_PWR_SAV1_11N 0x874 #define ODM_REG_ANTSEL_PATH_11N 0x878 #define ODM_REG_BB_3WIRE_11N 0x88C -#define ODM_REG_SC_CNT_11N 0x8C4 -#define ODM_REG_PSD_DATA_11N 0x8B4 +#define ODM_REG_SC_CNT_11N 0x8C4 +#define ODM_REG_PSD_DATA_11N 0x8B4 #define ODM_REG_CCX_PERIOD_11N 0x894 #define ODM_REG_NHM_TH9_TH10_11N 0x890 -#define ODM_REG_CLM_11N 0x890 +#define ODM_REG_CLM_11N 0x890 #define ODM_REG_NHM_TH3_TO_TH0_11N 0x898 #define ODM_REG_NHM_TH7_TO_TH4_11N 0x89c -#define ODM_REG_NHM_TH8_11N 0xe28 +#define ODM_REG_NHM_TH8_11N 0xe28 #define ODM_REG_CLM_READY_11N 0x8b4 #define ODM_REG_CLM_RESULT_11N 0x8d0 -#define ODM_REG_NHM_CNT_11N 0x8d8 +#define ODM_REG_NHM_CNT_11N 0x8d8 -/* For struct acs_info, Jeffery, 2014-12-26 */ +/* @For struct acs_info, Jeffery, 2014-12-26 */ #define ODM_REG_NHM_CNT7_TO_CNT4_11N 0x8dc #define ODM_REG_NHM_CNT9_TO_CNT8_11N 0x8d0 -#define ODM_REG_NHM_CNT10_TO_CNT11_11N 0x8d4 +#define ODM_REG_NHM_CNT10_TO_CNT11_11N 0x8d4 /* PAGE 9 */ #define ODM_REG_BB_CTRL_PAGE9_11N 0x900 -#define ODM_REG_DBG_RPT_11N 0x908 +#define ODM_REG_DBG_RPT_11N 0x908 #define ODM_REG_BB_TX_PATH_11N 0x90c #define ODM_REG_ANT_MAPPING1_11N 0x914 #define ODM_REG_ANT_MAPPING2_11N 0x918 -#define ODM_REG_EDCCA_DOWN_OPT_11N 0x948 +#define ODM_REG_EDCCA_DOWN_OPT_11N 0x948 #define ODM_REG_RX_DFIR_MOD_97F 0x948 -#define ODM_REG_SOML_97F 0x998 +#define ODM_REG_SOML_97F 0x998 /* PAGE A */ -#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00 +#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00 #define ODM_REG_CCK_ANT_SEL_11N 0xA04 -#define ODM_REG_CCK_CCA_11N 0xA0A -#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C -#define ODM_REG_CCK_ANTDIV_PARA3_11N 0xA10 -#define ODM_REG_CCK_ANTDIV_PARA4_11N 0xA14 -#define ODM_REG_CCK_FILTER_PARA1_11N 0xA22 -#define ODM_REG_CCK_FILTER_PARA2_11N 0xA23 -#define ODM_REG_CCK_FILTER_PARA3_11N 0xA24 -#define ODM_REG_CCK_FILTER_PARA4_11N 0xA25 -#define ODM_REG_CCK_FILTER_PARA5_11N 0xA26 -#define ODM_REG_CCK_FILTER_PARA6_11N 0xA27 -#define ODM_REG_CCK_FILTER_PARA7_11N 0xA28 -#define ODM_REG_CCK_FILTER_PARA8_11N 0xA29 +#define ODM_REG_CCK_CCA_11N 0xA0A +#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C +#define ODM_REG_CCK_ANTDIV_PARA3_11N 0xA10 +#define ODM_REG_CCK_ANTDIV_PARA4_11N 0xA14 +#define ODM_REG_CCK_FILTER_PARA1_11N 0xA22 +#define ODM_REG_CCK_FILTER_PARA2_11N 0xA23 +#define ODM_REG_CCK_FILTER_PARA3_11N 0xA24 +#define ODM_REG_CCK_FILTER_PARA4_11N 0xA25 +#define ODM_REG_CCK_FILTER_PARA5_11N 0xA26 +#define ODM_REG_CCK_FILTER_PARA6_11N 0xA27 +#define ODM_REG_CCK_FILTER_PARA7_11N 0xA28 +#define ODM_REG_CCK_FILTER_PARA8_11N 0xA29 #define ODM_REG_CCK_FA_RST_11N 0xA2C #define ODM_REG_CCK_FA_MSB_11N 0xA58 #define ODM_REG_CCK_FA_LSB_11N 0xA5C @@ -113,60 +113,60 @@ #define ODM_REG_PATH_SWITCH_11N 0xB30 #define ODM_REG_RSSI_CTRL_11N 0xB38 #define ODM_REG_CONFIG_ANTA_11N 0xB68 -#define ODM_REG_RSSI_BT_11N 0xB9C -#define ODM_REG_RXCK_RFMOD 0xBB0 +#define ODM_REG_RSSI_BT_11N 0xB9C +#define ODM_REG_RXCK_RFMOD 0xBB0 #define ODM_REG_EDCCA_DCNF_97F 0xBC0 /* PAGE C */ #define ODM_REG_OFDM_FA_HOLDC_11N 0xC00 #define ODM_REG_BB_RX_PATH_11N 0xC04 -#define ODM_REG_TRMUX_11N 0xC08 +#define ODM_REG_TRMUX_11N 0xC08 #define ODM_REG_OFDM_FA_RSTC_11N 0xC0C -#define ODM_REG_DOWNSAM_FACTOR_11N 0xC10 +#define ODM_REG_DOWNSAM_FACTOR_11N 0xC10 #define ODM_REG_RXIQI_MATRIX_11N 0xC14 -#define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C -#define ODM_REG_IGI_A_11N 0xC50 +#define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C +#define ODM_REG_IGI_A_11N 0xC50 #define ODM_REG_ANTDIV_PARA2_11N 0xC54 -#define ODM_REG_IGI_B_11N 0xC58 +#define ODM_REG_IGI_B_11N 0xC58 #define ODM_REG_ANTDIV_PARA3_11N 0xC5C -#define ODM_REG_L1SBD_PD_CH_11N 0XC6C -#define ODM_REG_BB_PWR_SAV2_11N 0xC70 +#define ODM_REG_L1SBD_PD_CH_11N 0XC6C +#define ODM_REG_BB_PWR_SAV2_11N 0xC70 #define ODM_REG_BB_AGC_SET_2_11N 0xc74 -#define ODM_REG_RX_OFF_11N 0xC7C +#define ODM_REG_RX_OFF_11N 0xC7C #define ODM_REG_TXIQK_MATRIXA_11N 0xC80 #define ODM_REG_TXIQK_MATRIXB_11N 0xC88 -#define ODM_REG_TXIQK_MATRIXA_LSB2_11N 0xC94 -#define ODM_REG_TXIQK_MATRIXB_LSB2_11N 0xC9C -#define ODM_REG_RXIQK_MATRIX_LSB_11N 0xCA0 +#define ODM_REG_TXIQK_MATRIXA_LSB2_11N 0xC94 +#define ODM_REG_TXIQK_MATRIXB_LSB2_11N 0xC9C +#define ODM_REG_RXIQK_MATRIX_LSB_11N 0xCA0 #define ODM_REG_ANTDIV_PARA1_11N 0xCA4 -#define ODM_REG_SMALL_BANDWIDTH_11N 0xCE4 +#define ODM_REG_SMALL_BANDWIDTH_11N 0xCE4 #define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0 /* PAGE D */ #define ODM_REG_OFDM_FA_RSTD_11N 0xD00 #define ODM_REG_BB_RX_ANT_11N 0xD04 -#define ODM_REG_BB_ATC_11N 0xD2C +#define ODM_REG_BB_ATC_11N 0xD2C #define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0 #define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4 #define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8 -#define ODM_REG_RPT_11N 0xDF4 +#define ODM_REG_RPT_11N 0xDF4 /* PAGE E */ #define ODM_REG_TXAGC_A_6_18_11N 0xE00 #define ODM_REG_TXAGC_A_24_54_11N 0xE04 -#define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08 +#define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08 #define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10 #define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14 -#define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18 -#define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C +#define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18 +#define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C #define ODM_REG_EDCCA_DCNF_11N 0xE24 -#define ODM_REG_TAP_UPD_97F 0xE24 +#define ODM_REG_TAP_UPD_97F 0xE24 #define ODM_REG_FPGA0_IQK_11N 0xE28 -#define ODM_REG_PAGE_B1_97F 0xE28 +#define ODM_REG_PAGE_B1_97F 0xE28 #define ODM_REG_TXIQK_TONE_A_11N 0xE30 #define ODM_REG_RXIQK_TONE_A_11N 0xE34 #define ODM_REG_TXIQK_PI_A_11N 0xE38 #define ODM_REG_RXIQK_PI_A_11N 0xE3C -#define ODM_REG_TXIQK_11N 0xE40 -#define ODM_REG_RXIQK_11N 0xE44 +#define ODM_REG_TXIQK_11N 0xE40 +#define ODM_REG_RXIQK_11N 0xE44 #define ODM_REG_IQK_AGC_PTS_11N 0xE48 #define ODM_REG_IQK_AGC_RSP_11N 0xE4C #define ODM_REG_BLUETOOTH_11N 0xE6C @@ -175,45 +175,45 @@ #define ODM_REG_TX_CCK_BBON_11N 0xE78 #define ODM_REG_OFDM_RFON_11N 0xE7C #define ODM_REG_OFDM_BBON_11N 0xE80 -#define ODM_REG_TX2RX_11N 0xE84 -#define ODM_REG_TX2TX_11N 0xE88 -#define ODM_REG_RX_CCK_11N 0xE8C -#define ODM_REG_RX_OFDM_11N 0xED0 +#define ODM_REG_TX2RX_11N 0xE84 +#define ODM_REG_TX2TX_11N 0xE88 +#define ODM_REG_RX_CCK_11N 0xE8C +#define ODM_REG_RX_OFDM_11N 0xED0 #define ODM_REG_RX_WAIT_RIFS_11N 0xED4 -#define ODM_REG_RX2RX_11N 0xED8 -#define ODM_REG_STANDBY_11N 0xEDC -#define ODM_REG_SLEEP_11N 0xEE0 +#define ODM_REG_RX2RX_11N 0xED8 +#define ODM_REG_STANDBY_11N 0xEDC +#define ODM_REG_SLEEP_11N 0xEE0 #define ODM_REG_PMPD_ANAEN_11N 0xEEC /* PAGE F */ #define ODM_REG_PAGE_F_RST_11N 0xF14 -#define ODM_REG_IGI_C_11N 0xF84 -#define ODM_REG_IGI_D_11N 0xF88 -#define ODM_REG_CCK_CRC32_ERROR_CNT_11N 0xF84 +#define ODM_REG_IGI_C_11N 0xF84 +#define ODM_REG_IGI_D_11N 0xF88 +#define ODM_REG_CCK_CRC32_ERROR_CNT_11N 0xF84 #define ODM_REG_CCK_CRC32_OK_CNT_11N 0xF88 #define ODM_REG_HT_CRC32_CNT_11N 0xF90 #define ODM_REG_OFDM_CRC32_CNT_11N 0xF94 -#define ODM_REG_HT_CRC32_CNT_11N_AGG 0xFB8 +#define ODM_REG_HT_CRC32_CNT_11N_AGG 0xFB8 -/* 2 MAC REG LIST */ -#define ODM_REG_BB_RST_11N 0x02 +/* @2 MAC REG LIST */ +#define ODM_REG_BB_RST_11N 0x02 #define ODM_REG_ANTSEL_PIN_11N 0x4C #define ODM_REG_EARLY_MODE_11N 0x4D0 #define ODM_REG_RSSI_MONITOR_11N 0x4FE -#define ODM_REG_EDCA_VO_11N 0x500 -#define ODM_REG_EDCA_VI_11N 0x504 -#define ODM_REG_EDCA_BE_11N 0x508 -#define ODM_REG_EDCA_BK_11N 0x50C -#define ODM_REG_TXPAUSE_11N 0x522 -#define ODM_REG_RESP_TX_11N 0x6D8 -#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0 -#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4 +#define ODM_REG_EDCA_VO_11N 0x500 +#define ODM_REG_EDCA_VI_11N 0x504 +#define ODM_REG_EDCA_BE_11N 0x508 +#define ODM_REG_EDCA_BK_11N 0x50C +#define ODM_REG_TXPAUSE_11N 0x522 +#define ODM_REG_RESP_TX_11N 0x6D8 +#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0 +#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4 -/* DIG Related */ -#define ODM_BIT_IGI_11N 0x0000007F +/* @DIG Related */ +#define ODM_BIT_IGI_11N 0x0000007F #define ODM_BIT_CCK_RPT_FORMAT_11N BIT(9) #define ODM_BIT_BB_RX_PATH_11N 0xF #define ODM_BIT_BB_TX_PATH_11N 0xF -#define ODM_BIT_BB_ATC_11N BIT(11) - +#define ODM_BIT_BB_ATC_11N BIT(11) #endif + diff --git a/hal/phydm/phydm_regtable.h b/hal/phydm/phydm_regtable.h index 70be071..f8bcda9 100644 --- a/hal/phydm/phydm_regtable.h +++ b/hal/phydm/phydm_regtable.h @@ -1,8 +1,16 @@ #define R_0x0 0x0 #define R_0x00 0x00 +#define R_0x0106 0x0106 #define R_0x0140 0x0140 +#define R_0x0144 0x0144 +#define R_0x0148 0x0148 #define R_0x040 0x040 #define R_0x10 0x10 +#define R_0x100 0x100 +#define R_0x1038 0x1038 +#define R_0x103c 0x103c +#define R_0x1040 0x1040 +#define R_0x1048 0x1048 #define R_0x1080 0x1080 #define R_0x14c0 0x14c0 #define R_0x14c4 0x14c4 @@ -15,22 +23,52 @@ #define R_0x1700 0x1700 #define R_0x1704 0x1704 #define R_0x1800 0x1800 +#define R_0x1804 0x1804 +#define R_0x1808 0x1808 +#define R_0x180c 0x180c +#define R_0x1810 0x1810 +#define R_0x1814 0x1814 +#define R_0x1818 0x1818 +#define R_0x181c 0x181c +#define R_0x1830 0x1830 +#define R_0x1834 0x1834 +#define R_0x1838 0x1838 #define R_0x183c 0x183c #define R_0x1840 0x1840 #define R_0x1844 0x1844 #define R_0x1848 0x1848 +#define R_0x1860 0x1860 +#define R_0x1864 0x1864 +#define R_0x186c 0x186c +#define R_0x1870 0x1870 +#define R_0x1880 0x1880 +#define R_0x1884 0x1884 #define R_0x188c 0x188c #define R_0x1894 0x1894 +#define R_0x189c 0x189c +#define R_0x18a0 0x18a0 +#define R_0x18a4 0x18a4 +#define R_0x18a8 0x18a8 #define R_0x18ac 0x18ac +#define R_0x18e0 0x18e0 +#define R_0x18e8 0x18e8 +#define R_0x18ec 0x18ec +#define R_0x18f0 0x18f0 +#define R_0x18f8 0x18f8 +#define R_0x18fc 0x18fc #define R_0x1900 0x1900 #define R_0x1904 0x1904 #define R_0x1908 0x1908 +#define R_0x1910 0x1910 #define R_0x1918 0x1918 #define R_0x191c 0x191c #define R_0x1928 0x1928 +#define R_0x1940 0x1940 +#define R_0x1944 0x1944 #define R_0x1950 0x1950 #define R_0x1954 0x1954 #define R_0x195c 0x195c +#define R_0x1970 0x1970 #define R_0x1984 0x1984 #define R_0x1988 0x1988 #define R_0x198c 0x198c @@ -38,6 +76,7 @@ #define R_0x1991 0x1991 #define R_0x1998 0x1998 #define R_0x19a8 0x19a8 +#define R_0x19b8 0x19b8 #define R_0x19d4 0x19d4 #define R_0x19d8 0x19d8 #define R_0x19e0 0x19e0 @@ -45,75 +84,305 @@ #define R_0x19f8 0x19f8 #define R_0x1a00 0x1a00 #define R_0x1a04 0x1a04 +#define R_0x1a14 0x1a14 +#define R_0x1a20 0x1a20 #define R_0x1a24 0x1a24 #define R_0x1a28 0x1a28 #define R_0x1a2c 0x1a2c #define R_0x1a5c 0x1a5c +#define R_0x1a70 0x1a70 +#define R_0x1a74 0x1a74 +#define R_0x1a80 0x1a80 #define R_0x1a84 0x1a84 #define R_0x1a8c 0x1a8c #define R_0x1a94 0x1a94 +#define R_0x1a98 0x1a98 +#define R_0x1a9c 0x1a9c +#define R_0x1aa0 0x1aa0 +#define R_0x1aa8 0x1aa8 #define R_0x1aac 0x1aac +#define R_0x1ab0 0x1ab0 #define R_0x1abc 0x1abc #define R_0x1ac0 0x1ac0 +#define R_0x1ac8 0x1ac8 +#define R_0x1acc 0x1acc +#define R_0x1ad0 0x1ad0 +#define R_0x1ad4 0x1ad4 +#define R_0x1ae8 0x1ae8 +#define R_0x1aec 0x1aec #define R_0x1b00 0x1b00 +#define R_0x1b04 0x1b04 #define R_0x1b08 0x1b08 #define R_0x1b0c 0x1b0c +#define R_0x1b10 0x1b10 +#define R_0x1b14 0x1b14 +#define R_0x1b18 0x1b18 +#define R_0x1b1c 0x1b1c +#define R_0x1b20 0x1b20 +#define R_0x1b23 0x1b23 +#define R_0x1b24 0x1b24 +#define R_0x1b28 0x1b28 #define R_0x1b2c 0x1b2c +#define R_0x1b30 0x1b30 +#define R_0x1b34 0x1b34 #define R_0x1b38 0x1b38 #define R_0x1b3c 0x1b3c +#define R_0x1b40 0x1b40 +#define R_0x1b44 0x1b44 +#define R_0x1b48 0x1b48 +#define R_0x1b4c 0x1b4c +#define R_0x1b50 0x1b50 +#define R_0x1b54 0x1b54 +#define R_0x1b58 0x1b58 +#define R_0x1b5c 0x1b5c +#define R_0x1b60 0x1b60 +#define R_0x1b64 0x1b64 +#define R_0x1b67 0x1b67 +#define R_0x1b68 0x1b68 +#define R_0x1b6c 0x1b6c +#define R_0x1b70 0x1b70 +#define R_0x1b74 0x1b74 +#define R_0x1b78 0x1b78 +#define R_0x1b7c 0x1b7c +#define R_0x1b80 0x1b80 +#define R_0x1b83 0x1b83 +#define R_0x1b84 0x1b84 +#define R_0x1b88 0x1b88 #define R_0x1b8c 0x1b8c +#define R_0x1b90 0x1b90 +#define R_0x1b92 0x1b92 +#define R_0x1b94 0x1b94 +#define R_0x1b97 0x1b97 #define R_0x1b98 0x1b98 +#define R_0x1b9c 0x1b9c +#define R_0x1ba0 0x1ba0 +#define R_0x1ba4 0x1ba4 +#define R_0x1ba8 0x1ba8 +#define R_0x1bac 0x1bac +#define R_0x1bb0 0x1bb0 +#define R_0x1bb4 0x1bb4 +#define R_0x1bb8 0x1bb8 +#define R_0x1bbc 0x1bbc +#define R_0x1bc0 0x1bc0 #define R_0x1bc8 0x1bc8 +#define R_0x1bca 0x1bca +#define R_0x1bcb 0x1bcb #define R_0x1bcc 0x1bcc +#define R_0x1bce 0x1bce #define R_0x1bd0 0x1bd0 #define R_0x1bd4 0x1bd4 +#define R_0x1bd6 0x1bd6 #define R_0x1bd8 0x1bd8 +#define R_0x1bdc 0x1bdc +#define R_0x1be4 0x1be4 +#define R_0x1be8 0x1be8 +#define R_0x1beb 0x1beb +#define R_0x1bec 0x1bec +#define R_0x1bef 0x1bef #define R_0x1bf0 0x1bf0 +#define R_0x1bf4 0x1bf4 +#define R_0x1bf8 0x1bf8 #define R_0x1bfc 0x1bfc +#define R_0x1c 0x1c +#define R_0x1c20 0x1c20 +#define R_0x1c24 0x1c24 #define R_0x1c28 0x1c28 +#define R_0x1c2c 0x1c2c +#define R_0x1c30 0x1c30 +#define R_0x1c34 0x1c34 #define R_0x1c38 0x1c38 #define R_0x1c3c 0x1c3c +#define R_0x1c64 0x1c64 #define R_0x1c68 0x1c68 #define R_0x1c74 0x1c74 #define R_0x1c78 0x1c78 #define R_0x1c7c 0x1c7c +#define R_0x1c80 0x1c80 #define R_0x1c90 0x1c90 #define R_0x1c94 0x1c94 #define R_0x1c98 0x1c98 #define R_0x1c9c 0x1c9c #define R_0x1ca0 0x1ca0 +#define R_0x1ca4 0x1ca4 +#define R_0x1cb0 0x1cb0 #define R_0x1cb8 0x1cb8 +#define R_0x1cc0 0x1cc0 +#define R_0x1cd0 0x1cd0 +#define R_0x1ce4 0x1ce4 +#define R_0x1ce8 0x1ce8 +#define R_0x1cec 0x1cec +#define R_0x1cf0 0x1cf0 +#define R_0x1cf4 0x1cf4 #define R_0x1cf8 0x1cf8 +#define R_0x1d04 0x1d04 +#define R_0x1d08 0x1d08 +#define R_0x1d0c 0x1d0c +#define R_0x1d10 0x1d10 +#define R_0x1d2c 0x1d2c +#define R_0x1d30 0x1d30 +#define R_0x1d3c 0x1d3c +#define R_0x1d44 0x1d44 +#define R_0x1d48 0x1d48 +#define R_0x1d58 0x1d58 +#define R_0x1d60 0x1d60 +#define R_0x1d6c 0x1d6c #define R_0x1d70 0x1d70 +#define R_0x1d90 0x1d90 +#define R_0x1d94 0x1d94 +#define R_0x1d9c 0x1d9c +#define R_0x1da4 0x1da4 +#define R_0x1da8 0x1da8 +#define R_0x1e14 0x1e14 +#define R_0x1e18 0x1e18 +#define R_0x1e1c 0x1e1c +#define R_0x1e24 0x1e24 +#define R_0x1e28 0x1e28 #define R_0x1e2c 0x1e2c +#define R_0x1e28 0x1e28 +#define R_0x1e30 0x1e30 +#define R_0x1e40 0x1e40 +#define R_0x1e44 0x1e44 +#define R_0x1e48 0x1e48 #define R_0x1e5c 0x1e5c +#define R_0x1e60 0x1e60 +#define R_0x1e64 0x1e64 +#define R_0x1e68 0x1e68 +#define R_0x1e6c 0x1e6c +#define R_0x1e70 0x1e70 +#define R_0x1e7c 0x1e7c +#define R_0x1e84 0x1e84 +#define R_0x1e88 0x1e88 +#define R_0x1e8c 0x1e8c +#define R_0x1ea4 0x1ea4 #define R_0x1eb4 0x1eb4 +#define R_0x1ee8 0x1ee8 +#define R_0x1eec 0x1eec +#define R_0x1ef0 0x1ef0 +#define R_0x1ef4 0x1ef4 +#define R_0x1efc 0x1efc +#define R_0x24 0x24 +#define R_0x28 0x28 +#define R_0x2c 0x2c +#define R_0x28a4 0x28a4 #define R_0x2c04 0x2c04 #define R_0x2c08 0x2c08 +#define R_0x2c0c 0x2c0c #define R_0x2c10 0x2c10 #define R_0x2c14 0x2c14 +#define R_0x2c20 0x2c20 +#define R_0x2c2c 0x2c2c +#define R_0x2c30 0x2c30 +#define R_0x2c34 0x2c34 #define R_0x2d00 0x2d00 #define R_0x2d04 0x2d04 #define R_0x2d08 0x2d08 +#define R_0x2d0c 0x2d0c #define R_0x2d10 0x2d10 #define R_0x2d20 0x2d20 +#define R_0x2d38 0x2d38 +#define R_0x2d40 0x2d40 +#define R_0x2d44 0x2d44 +#define R_0x2d48 0x2d48 +#define R_0x2d4c 0x2d4c +#define R_0x2d88 0x2d88 +#define R_0x2d90 0x2d90 +#define R_0x2d9c 0x2d9c +#define R_0x2db4 0x2db4 +#define R_0x2db8 0x2db8 +#define R_0x2dbc 0x2dbc +#define R_0x2de0 0x2de0 +#define R_0x2de4 0x2de4 #define R_0x2de8 0x2de8 +#define R_0x2e00 0x2e00 +#define R_0x2e20 0x2e20 #define R_0x300 0x300 #define R_0x38 0x38 +#define R_0x3a00 0x3a00 +#define R_0x3a04 0x3a04 +#define R_0x3a08 0x3a08 +#define R_0x3a0c 0x3a0c +#define R_0x3a10 0x3a10 +#define R_0x3a14 0x3a14 +#define R_0x3a18 0x3a18 +#define R_0x3a1c 0x3a1c +#define R_0x3a20 0x3a20 +#define R_0x3a24 0x3a24 +#define R_0x3a28 0x3a28 +#define R_0x3a2c 0x3a2c +#define R_0x3a30 0x3a30 +#define R_0x3a34 0x3a34 +#define R_0x3a38 0x3a38 +#define R_0x3a3c 0x3a3c +#define R_0x3a40 0x3a40 +#define R_0x3a44 0x3a44 +#define R_0x3a48 0x3a48 +#define R_0x3a4c 0x3a4c +#define R_0x3a50 0x3a50 +#define R_0x3a54 0x3a54 +#define R_0x3a58 0x3a58 +#define R_0x3a5c 0x3a5c +#define R_0x3a60 0x3a60 +#define R_0x3a64 0x3a64 +#define R_0x3a68 0x3a68 +#define R_0x3a6c 0x3a6c +#define R_0x3a70 0x3a70 +#define R_0x3a74 0x3a74 +#define R_0x3a78 0x3a78 +#define R_0x3a7c 0x3a7c +#define R_0x3a80 0x3a80 +#define R_0x3a84 0x3a84 +#define R_0x3a88 0x3a88 +#define R_0x3a8c 0x3a8c +#define R_0x3a90 0x3a90 +#define R_0x3a94 0x3a94 +#define R_0x3a98 0x3a98 +#define R_0x3a9c 0x3a9c +#define R_0x3aa0 0x3aa0 +#define R_0x3aa4 0x3aa4 +#define R_0x3c00 0x3c00 #define R_0x40 0x40 #define R_0x4000 0x4000 #define R_0x4008 0x4008 #define R_0x4018 0x4018 #define R_0x401c 0x401c #define R_0x4028 0x4028 +#define R_0x4040 0x4040 +#define R_0x4044 0x4044 #define R_0x4100 0x4100 +#define R_0x4104 0x4104 +#define R_0x4108 0x4108 +#define R_0x410c 0x410c +#define R_0x4110 0x4110 +#define R_0x4114 0x4114 +#define R_0x4118 0x4118 +#define R_0x411c 0x411c +#define R_0x4130 0x4130 +#define R_0x4134 0x4134 +#define R_0x4138 0x4138 #define R_0x413c 0x413c #define R_0x4140 0x4140 #define R_0x4144 0x4144 #define R_0x4148 0x4148 +#define R_0x4160 0x4160 +#define R_0x4164 0x4164 +#define R_0x416c 0x416c +#define R_0x4180 0x4180 +#define R_0x419c 0x419c +#define R_0x41a0 0x41a0 +#define R_0x41a4 0x41a4 +#define R_0x41a8 0x41a8 +#define R_0x41ac 0x41ac +#define R_0x41e0 0x41e0 +#define R_0x41e8 0x41e8 +#define R_0x41ec 0x41ec +#define R_0x41f0 0x41f0 +#define R_0x41f8 0x41f8 +#define R_0x41fc 0x41fc +#define R_0x42 0x42 #define R_0x430 0x430 #define R_0x434 0x434 #define R_0x44 0x44 +#define R_0x440 0x440 #define R_0x444 0x444 #define R_0x448 0x448 #define R_0x450 0x450 @@ -125,32 +394,56 @@ #define R_0x4c 0x4c #define R_0x4c8 0x4c8 #define R_0x4cc 0x4cc +#define R_0x45a4 0x45a4 +#define R_0x4c00 0x4c00 #define R_0x5000 0x5000 #define R_0x5008 0x5008 #define R_0x5018 0x5018 #define R_0x501c 0x501c #define R_0x5028 0x5028 +#define R_0x5040 0x5040 +#define R_0x5044 0x5044 #define R_0x5100 0x5100 #define R_0x5108 0x5108 #define R_0x5118 0x5118 #define R_0x511c 0x511c #define R_0x5128 0x5128 +#define R_0x5140 0x5140 +#define R_0x5144 0x5144 #define R_0x520 0x520 #define R_0x5200 0x5200 +#define R_0x520c 0x520c #define R_0x522 0x522 +#define R_0x524 0x524 +#define R_0x5230 0x5230 +#define R_0x5234 0x5234 +#define R_0x5238 0x5238 #define R_0x523c 0x523c #define R_0x5240 0x5240 #define R_0x5244 0x5244 #define R_0x5248 0x5248 +#define R_0x526c 0x526c +#define R_0x52a0 0x52a0 +#define R_0x52a4 0x52a4 +#define R_0x52ac 0x52ac #define R_0x5300 0x5300 +#define R_0x530c 0x530c +#define R_0x5330 0x5330 +#define R_0x5334 0x5334 +#define R_0x5338 0x5338 #define R_0x533c 0x533c #define R_0x5340 0x5340 #define R_0x5344 0x5344 #define R_0x5348 0x5348 +#define R_0x536c 0x536c +#define R_0x53a0 0x53a0 +#define R_0x53a4 0x53a4 +#define R_0x53ac 0x53ac #define R_0x550 0x550 #define R_0x551 0x551 #define R_0x568 0x568 #define R_0x588 0x588 +#define R_0x60 0x60 #define R_0x604 0x604 #define R_0x608 0x608 #define R_0x60f 0x60f @@ -164,6 +457,9 @@ #define R_0x6dc 0x6dc #define R_0x70 0x70 #define R_0x74 0x74 +#define R_0x700 0x700 +#define R_0x71c 0x71c +#define R_0x72c 0x72c #define R_0x764 0x764 #define R_0x7b0 0x7b0 #define R_0x7b4 0x7b4 @@ -176,12 +472,14 @@ #define R_0x7f8 0x7f8 #define R_0x7fc 0x7fc #define R_0x800 0x800 +#define R_0x8000 0x8000 #define R_0x804 0x804 #define R_0x808 0x808 #define R_0x80c 0x80c #define R_0x810 0x810 #define R_0x814 0x814 #define R_0x818 0x818 +#define R_0x81c 0x81c #define R_0x820 0x820 #define R_0x824 0x824 #define R_0x828 0x828 @@ -191,12 +489,16 @@ #define R_0x838 0x838 #define R_0x83c 0x83c #define R_0x840 0x840 +#define R_0x844 0x840 #define R_0x848 0x848 +#define R_0x84c 0x84c #define R_0x850 0x850 #define R_0x854 0x854 #define R_0x858 0x858 +#define R_0x85c 0x85c #define R_0x860 0x860 #define R_0x864 0x864 +#define R_0x868 0x868 #define R_0x86c 0x86c #define R_0x870 0x870 #define R_0x874 0x874 @@ -214,6 +516,8 @@ #define R_0x8a4 0x8a4 #define R_0x8ac 0x8ac #define R_0x8b4 0x8b4 +#define R_0x8b8 0x8b8 +#define R_0x8c0 0x8c0 #define R_0x8c4 0x8c4 #define R_0x8c8 0x8c8 #define R_0x8cc 0x8cc @@ -243,8 +547,12 @@ #define R_0x948 0x948 #define R_0x94c 0x94c #define R_0x950 0x950 +#define R_0x954 0x954 #define R_0x958 0x958 #define R_0x95c 0x95c +#define R_0x960 0x960 +#define R_0x964 0x964 +#define R_0x968 0x968 #define R_0x970 0x970 #define R_0x974 0x974 #define R_0x978 0x978 @@ -253,18 +561,23 @@ #define R_0x990 0x990 #define R_0x994 0x994 #define R_0x998 0x998 +#define R_0x99c 0x99c #define R_0x9a0 0x9a0 #define R_0x9a4 0x9a4 #define R_0x9ac 0x9ac #define R_0x9b0 0x9b0 #define R_0x9b4 0x9b4 +#define R_0x9b8 0x9b8 #define R_0x9cc 0x9cc #define R_0x9d0 0x9d0 #define R_0x9e4 0x9e4 +#define R_0x9e8 0x9e8 +#define R_0x9f0 0x9f0 #define R_0xa0 0xa0 #define R_0xa00 0xa00 #define R_0xa04 0xa04 #define R_0xa08 0xa08 +#define R_0xa0a 0xa0a #define R_0xa0c 0xa0c #define R_0xa10 0xa10 #define R_0xa14 0xa14 @@ -272,12 +585,22 @@ #define R_0xa24 0xa24 #define R_0xa28 0xa28 #define R_0xa2c 0xa2c +#define R_0xa40 0xa40 +#define R_0xa44 0xa44 +#define R_0xa48 0xa48 +#define R_0xa4c 0xa4c +#define R_0xa50 0xa50 +#define R_0xa54 0xa54 +#define R_0xa58 0xa58 +#define R_0xa68 0xa68 +#define R_0xa6c 0xa6c #define R_0xa70 0xa70 #define R_0xa74 0xa74 #define R_0xa78 0xa78 #define R_0xa8 0xa8 #define R_0xa80 0xa80 #define R_0xa84 0xa84 +#define R_0xa98 0xa98 #define R_0xa9c 0xa9c #define R_0xaa8 0xaa8 #define R_0xaac 0xaac @@ -354,6 +677,7 @@ #define R_0xc0c 0xc0c #define R_0xc10 0xc10 #define R_0xc14 0xc14 +#define R_0xc18 0xc18 #define R_0xc1c 0xc1c #define R_0xc20 0xc20 #define R_0xc24 0xc24 @@ -389,6 +713,7 @@ #define R_0xcbc 0xcbc #define R_0xcbd 0xcbd #define R_0xcbe 0xcbe +#define R_0xcc0 0xcc0 #define R_0xcc4 0xcc4 #define R_0xcc8 0xcc8 #define R_0xccc 0xccc @@ -400,6 +725,7 @@ #define R_0xce8 0xce8 #define R_0xd00 0xd00 #define R_0xd04 0xd04 +#define R_0xd08 0xd08 #define R_0xd0c 0xd0c #define R_0xd10 0xd10 #define R_0xd14 0xd14 @@ -436,6 +762,7 @@ #define R_0xe08 0xe08 #define R_0xe10 0xe10 #define R_0xe14 0xe14 +#define R_0xe18 0xe18 #define R_0xe1c 0xe1c #define R_0xe20 0xe20 #define R_0xe24 0xe24 @@ -452,9 +779,14 @@ #define R_0xe54 0xe54 #define R_0xe5c 0xe5c #define R_0xe64 0xe64 +#define R_0xe6c 0xe6c #define R_0xe70 0xe70 +#define R_0xe74 0xe74 +#define R_0xe78 0xe78 +#define R_0xe7c 0xe7c #define R_0xe80 0xe80 #define R_0xe84 0xe84 +#define R_0xe88 0xe88 #define R_0xe8c 0xe8c #define R_0xe90 0xe90 #define R_0xe94 0xe94 @@ -468,13 +800,21 @@ #define R_0xeb4 0xeb4 #define R_0xeb8 0xeb8 #define R_0xebc 0xebc +#define R_0xec 0xec #define R_0xec0 0xec0 #define R_0xec4 0xec4 #define R_0xec8 0xec8 #define R_0xecc 0xecc +#define R_0xed0 0xed0 #define R_0xed4 0xed4 +#define R_0xed8 0xed8 +#define R_0xedc 0xedc +#define R_0xee0 0xee0 #define R_0xee8 0xee8 +#define R_0xeec 0xeec #define R_0xf0 0xf0 +#define R_0xf00 0xf00 +#define R_0xf04 0xf04 #define R_0xf08 0xf08 #define R_0xf0c 0xf0c #define R_0xf10 0xf10 @@ -487,8 +827,15 @@ #define R_0xf44 0xf44 #define R_0xf48 0xf48 #define R_0xf4c 0xf4c +#define R_0xf50 0xf50 +#define R_0xf54 0xf54 +#define R_0xf58 0xf58 +#define R_0xf5c 0xf5c +#define R_0xf70 0xf70 +#define R_0xf74 0xf74 #define R_0xf80 0xf80 #define R_0xf84 0xf84 +#define R_0xf87 0xf87 #define R_0xf88 0xf88 #define R_0xf8c 0xf8c #define R_0xf90 0xf90 @@ -496,6 +843,11 @@ #define R_0xf98 0xf98 #define R_0xfa0 0xfa0 #define R_0xfa4 0xfa4 +#define R_0xfa8 0xfa8 +#define R_0xfac 0xfac +#define R_0xfb0 0xfb0 +#define R_0xfb4 0xfb4 +#define R_0xfb8 0xfb8 #define R_0xfbc 0xfbc #define R_0xfc0 0xfc0 #define R_0xfc4 0xfc4 @@ -510,6 +862,8 @@ #define RF_0x0d 0x0d #define RF_0x1 0x1 #define RF_0x18 0x18 +#define RF_0x19 0x19 +#define RF_0x1a 0x1a #define RF_0x1bf0 0x1bf0 #define RF_0x2 0x2 #define RF_0x3 0x3 @@ -531,9 +885,13 @@ #define RF_0x58 0x58 #define RF_0x5c 0x5c #define RF_0x61 0x61 +#define RF_0x63 0x63 #define RF_0x64 0x64 #define RF_0x65 0x65 #define RF_0x66 0x66 +#define RF_0x67 0x67 +#define RF_0x6e 0x6e +#define RF_0x6f 0x6f #define RF_0x75 0x75 #define RF_0x76 0x76 #define RF_0x78 0x78 @@ -541,11 +899,20 @@ #define RF_0x8 0x8 #define RF_0x80 0x80 #define RF_0x81 0x81 +#define RF_0x82 0x82 +#define RF_0x83 0x83 +#define RF_0x85 0x85 #define RF_0x86 0x86 +#define RF_0x87 0x87 +#define RF_0x8a 0x8a #define RF_0x8d 0x8d #define RF_0x8f 0x8f +#define RF_0x93 0x93 +#define RF_0xa9 0xa9 #define RF_0xae 0xae #define RF_0xb0 0xb0 +#define RF_0xb3 0xb3 +#define RF_0xb4 0xb4 #define RF_0xb8 0xb8 #define RF_0xbc 0xbc #define RF_0xbe 0xbe diff --git a/hal/phydm/phydm_rssi_monitor.c b/hal/phydm/phydm_rssi_monitor.c index d6bcb02..0d5e417 100644 --- a/hal/phydm/phydm_rssi_monitor.c +++ b/hal/phydm/phydm_rssi_monitor.c @@ -23,38 +23,36 @@ * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" - + #ifdef PHYDM_SUPPORT_RSSI_MONITOR -#ifdef PHYDM_3RD_REFORM_RSSI_MONOTOR -void -phydm_rssi_monitor_h2c( - void *dm_void, - u8 macid -) +void phydm_rssi_monitor_h2c(void *dm_void, u8 macid) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_t = &dm->dm_ra_table; - struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; - struct ra_sta_info *ra = NULL; - u8 h2c_val[H2C_MAX_LENGTH] = {0}; - u8 stbc_en, ldpc_en; - u8 bf_en = 0; - u8 is_rx, is_tx; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_t = &dm->dm_ra_table; + struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; + struct ra_sta_info *ra = NULL; + #ifdef CONFIG_BEAMFORMING + struct bf_cmn_info *bf = NULL; + #endif + u8 h2c[H2C_MAX_LENGTH] = {0}; + u8 stbc_en, ldpc_en; + u8 bf_en = 0; + u8 is_rx, is_tx; if (is_sta_active(sta)) { ra = &sta->ra_info; } else { - PHYDM_DBG(dm, DBG_RSSI_MNTR, "[Warning] %s invalid sta_info\n", __func__); + PHYDM_DBG(dm, DBG_RSSI_MNTR, "[Warning] %s\n", __func__); return; } - + PHYDM_DBG(dm, DBG_RSSI_MNTR, "%s ======>\n", __func__); PHYDM_DBG(dm, DBG_RSSI_MNTR, "MACID=%d\n", sta->mac_id); @@ -64,48 +62,46 @@ phydm_rssi_monitor_h2c( ldpc_en = (sta->ldpc_en) ? 1 : 0; #ifdef CONFIG_BEAMFORMING - if ((sta->bf_info.ht_beamform_cap & BEAMFORMING_HT_BEAMFORMEE_ENABLE) || - (sta->bf_info.vht_beamform_cap & BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) { + bf = &sta->bf_info; + + if ((bf->ht_beamform_cap & BEAMFORMING_HT_BEAMFORMEE_ENABLE) || + (bf->vht_beamform_cap & BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) bf_en = 1; - } #endif - if (ra_t->RA_threshold_offset != 0) { - PHYDM_DBG(dm, DBG_RSSI_MNTR, "RA_th_ofst = (( %s%d ))\n", - ((ra_t->RA_offset_direction) ? "+" : "-"), ra_t->RA_threshold_offset); - } + PHYDM_DBG(dm, DBG_RSSI_MNTR, "RA_th_ofst=(( %s%d ))\n", + ((ra_t->ra_ofst_direc) ? "+" : "-"), ra_t->ra_th_ofst); - h2c_val[0] = sta->mac_id; - h2c_val[1] = 0; - h2c_val[2] = sta->rssi_stat.rssi; - h2c_val[3] = is_rx | (stbc_en << 1) | ((dm->noisy_decision & 0x1) << 2) | (bf_en << 6); - h2c_val[4] = (ra_t->RA_threshold_offset & 0x7f) | ((ra_t->RA_offset_direction & 0x1) << 7); - h2c_val[5] = 0; - h2c_val[6] = 0; + h2c[0] = sta->mac_id; + h2c[1] = 0; + h2c[2] = sta->rssi_stat.rssi; + h2c[3] = is_rx | (stbc_en << 1) | + ((dm->noisy_decision & 0x1) << 2) | (bf_en << 6); + h2c[4] = (ra_t->ra_th_ofst & 0x7f) | + ((ra_t->ra_ofst_direc & 0x1) << 7); + h2c[5] = 0; + h2c[6] = 0; PHYDM_DBG(dm, DBG_RSSI_MNTR, "PHYDM h2c[0x42]=0x%x %x %x %x %x %x %x\n", - h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2], h2c_val[1], h2c_val[0]); + h2c[6], h2c[5], h2c[4], h2c[3], h2c[2], h2c[1], h2c[0]); - #if (RTL8188E_SUPPORT == 1) + #if (RTL8188E_SUPPORT) if (dm->support_ic_type == ODM_RTL8188E) - odm_ra_set_rssi_8188e(dm, (u8)(sta->mac_id & 0xFF), sta->rssi_stat.rssi & 0x7F); + odm_ra_set_rssi_8188e(dm, sta->mac_id, sta->rssi_stat.rssi); else - #endif + #endif { - odm_fill_h2c_cmd(dm, ODM_H2C_RSSI_REPORT, H2C_MAX_LENGTH, h2c_val); + odm_fill_h2c_cmd(dm, ODM_H2C_RSSI_REPORT, H2C_MAX_LENGTH, h2c); } } -void -phydm_calculate_rssi_min_max( - void *dm_void -) +void phydm_calculate_rssi_min_max(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *sta; - s8 rssi_max_tmp = 0, rssi_min_tmp = 100; - u8 i; - u8 sta_cnt = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta; + s8 rssi_max_tmp = 0, rssi_min_tmp = 100; + u8 i; + u8 sta_cnt = 0; if (!dm->is_linked) return; @@ -117,334 +113,58 @@ phydm_calculate_rssi_min_max( if (is_sta_active(sta)) { sta_cnt++; - if (sta->rssi_stat.rssi < rssi_min_tmp) + if (sta->rssi_stat.rssi < rssi_min_tmp) { rssi_min_tmp = sta->rssi_stat.rssi; + dm->rssi_min_macid = i; + } - if (sta->rssi_stat.rssi > rssi_max_tmp) + if (sta->rssi_stat.rssi > rssi_max_tmp) { rssi_max_tmp = sta->rssi_stat.rssi; + dm->rssi_max_macid = i; + } - /*[Send RSSI to FW]*/ - if (sta->ra_info.disable_ra == false) + /*@[Send RSSI to FW]*/ + if (!sta->ra_info.disable_ra) phydm_rssi_monitor_h2c(dm, i); if (sta_cnt == dm->number_linked_client) break; } } + dm->pre_rssi_min = dm->rssi_min; dm->rssi_max = (u8)rssi_max_tmp; dm->rssi_min = (u8)rssi_min_tmp; - -} -#endif - - -#if 0/*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ - -s32 -phydm_find_minimum_rssi( - struct dm_struct *dm, - void *adapter, - boolean *is_link_temp - -) -{ - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); - PMGNT_INFO mgnt_info = &adapter->MgntInfo; - boolean act_as_ap = ACTING_AS_AP(adapter); - - /* 1.Determine the minimum RSSI */ - if ((!mgnt_info->bMediaConnect) || - (act_as_ap && (hal_data->EntryMinUndecoratedSmoothedPWDB == 0))) {/* We should check AP mode and Entry info.into consideration, revised by Roger, 2013.10.18*/ - - hal_data->MinUndecoratedPWDBForDM = 0; - *is_link_temp = false; - - } else - *is_link_temp = true; - - - if (mgnt_info->bMediaConnect) { /* Default port*/ - - if (act_as_ap || mgnt_info->mIbss) { - hal_data->MinUndecoratedPWDBForDM = hal_data->EntryMinUndecoratedSmoothedPWDB; - /**/ - } else { - hal_data->MinUndecoratedPWDBForDM = GET_DEFAULT_RSSI(mgnt_info); - /**/ - } - } else { /* associated entry pwdb*/ - hal_data->MinUndecoratedPWDBForDM = hal_data->EntryMinUndecoratedSmoothedPWDB; - /**/ - } - - return hal_data->MinUndecoratedPWDBForDM; } -void -odm_rssi_monitor_check_mp( - void *dm_void -) +void phydm_rssi_monitor_check(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; - u8 h2c_parameter[H2C_0X42_LENGTH] = {0}; - u32 i; - boolean is_ext_ra_info = true; - u8 cmdlen = H2C_0X42_LENGTH; - u8 tx_bf_en = 0, stbc_en = 0; - - void *adapter = dm->adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); - struct sta_info *entry = NULL; - s32 tmp_entry_max_pwdb = 0, tmp_entry_min_pwdb = 0xff; - PMGNT_INFO mgnt_info = &adapter->MgntInfo; - PMGNT_INFO p_default_mgnt_info = &adapter->MgntInfo; - u64 cur_tx_ok_cnt = 0, cur_rx_ok_cnt = 0; -#if (BEAMFORMING_SUPPORT == 1) -#ifndef BEAMFORMING_VERSION_1 - enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE; -#endif -#endif - void *loop_adapter = GetDefaultAdapter(adapter); - - if (dm->support_ic_type == ODM_RTL8188E) { - is_ext_ra_info = false; - cmdlen = 3; - } - - while (loop_adapter) { - if (loop_adapter != NULL) { - mgnt_info = &loop_adapter->MgntInfo; - cur_tx_ok_cnt = loop_adapter->TxStats.NumTxBytesUnicast - mgnt_info->lastTxOkCnt; - cur_rx_ok_cnt = loop_adapter->RxStats.NumRxBytesUnicast - mgnt_info->lastRxOkCnt; - mgnt_info->lastTxOkCnt = cur_tx_ok_cnt; - mgnt_info->lastRxOkCnt = cur_rx_ok_cnt; - } - - for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) { - if (IsAPModeExist(loop_adapter)) { - if (GetFirstExtAdapter(loop_adapter) != NULL && - GetFirstExtAdapter(loop_adapter) == loop_adapter) - entry = AsocEntry_EnumStation(loop_adapter, i); - else if (GetFirstGOPort(loop_adapter) != NULL && - IsFirstGoAdapter(loop_adapter)) - entry = AsocEntry_EnumStation(loop_adapter, i); - } else { - if (GetDefaultAdapter(loop_adapter) == loop_adapter) - entry = AsocEntry_EnumStation(loop_adapter, i); - } - - if (entry != NULL) { - if (entry->bAssociated) { - RT_DISP_ADDR(FDM, DM_PWDB, ("entry->mac_addr ="), GET_STA_INFO(entry).mac_addr); - RT_DISP(FDM, DM_PWDB, ("entry->rssi = 0x%x(%d)\n", - GET_STA_INFO(entry).rssi_stat.rssi, GET_STA_INFO(entry).rssi_stat.rssi)); - - /* 2 BF_en */ -#if (BEAMFORMING_SUPPORT == 1) -#ifndef BEAMFORMING_VERSION_1 - beamform_cap = phydm_beamforming_get_entry_beam_cap_by_mac_id(dm, GET_STA_INFO(entry).mac_id); - if (beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) - tx_bf_en = 1; -#else - if (Beamform_GetSupportBeamformerCap(GetDefaultAdapter(adapter), entry)) - tx_bf_en = 1; -#endif -#endif - /* 2 STBC_en */ - if ((IS_WIRELESS_MODE_AC(adapter) && TEST_FLAG(entry->VHTInfo.STBC, STBC_VHT_ENABLE_TX)) || - TEST_FLAG(entry->HTInfo.STBC, STBC_HT_ENABLE_TX)) - stbc_en = 1; - - if (GET_STA_INFO(entry).rssi_stat.rssi < tmp_entry_min_pwdb) - tmp_entry_min_pwdb = GET_STA_INFO(entry).rssi_stat.rssi; - if (GET_STA_INFO(entry).rssi_stat.rssi > tmp_entry_max_pwdb) - tmp_entry_max_pwdb = GET_STA_INFO(entry).rssi_stat.rssi; - - h2c_parameter[4] = (ra_tab->RA_threshold_offset & 0x7f) | (ra_tab->RA_offset_direction << 7); - PHYDM_DBG(dm, DBG_RSSI_MNTR, "RA_threshold_offset = (( %s%d ))\n", ((ra_tab->RA_threshold_offset == 0) ? " " : ((ra_tab->RA_offset_direction) ? "+" : "-")), ra_tab->RA_threshold_offset); - - if (is_ext_ra_info) { - if (cur_rx_ok_cnt > (cur_tx_ok_cnt * 6)) - h2c_parameter[3] |= RAINFO_BE_RX_STATE; - - if (tx_bf_en) - h2c_parameter[3] |= RAINFO_BF_STATE; - else { - if (stbc_en) - h2c_parameter[3] |= RAINFO_STBC_STATE; - } - - if (dm->noisy_decision) - h2c_parameter[3] |= RAINFO_NOISY_STATE; - else - h2c_parameter[3] &= (~RAINFO_NOISY_STATE); - - if (dm->h2c_rarpt_connect) { - h2c_parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; - PHYDM_DBG(dm, DBG_RSSI_MNTR, "h2c_rarpt_connect = (( %d ))\n", dm->h2c_rarpt_connect); - } - - } - - h2c_parameter[2] = (u8)(GET_STA_INFO(entry).rssi_stat.rssi & 0xFF); - /* h2c_parameter[1] = 0x20;*/ /* fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 */ - h2c_parameter[0] = (GET_STA_INFO(entry).mac_id); - - odm_fill_h2c_cmd(dm, ODM_H2C_RSSI_REPORT, cmdlen, h2c_parameter); - } - } else - break; - } - - loop_adapter = GetNextExtAdapter(loop_adapter); - } - - - /*Default port*/ - if (tmp_entry_max_pwdb != 0) { /* If associated entry is found */ - hal_data->EntryMaxUndecoratedSmoothedPWDB = tmp_entry_max_pwdb; - RT_DISP(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n", tmp_entry_max_pwdb, tmp_entry_max_pwdb)); - } else - hal_data->EntryMaxUndecoratedSmoothedPWDB = 0; - - if (tmp_entry_min_pwdb != 0xff) { /* If associated entry is found */ - hal_data->EntryMinUndecoratedSmoothedPWDB = tmp_entry_min_pwdb; - RT_DISP(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", tmp_entry_min_pwdb, tmp_entry_min_pwdb)); - - } else - hal_data->EntryMinUndecoratedSmoothedPWDB = 0; - - /* Default porti sent RSSI to FW */ - if (hal_data->bUseRAMask) { - PHYDM_DBG(dm, DBG_RSSI_MNTR, "1 RA First Link, RSSI[%d] = ((%d)) , ra_rpt_linked = ((%d))\n", - WIN_DEFAULT_PORT_MACID, GET_DEFAULT_RSSI(mgnt_info), hal_data->ra_rpt_linked); - if (GET_DEFAULT_RSSI(mgnt_info) > 0) { - PRT_HIGH_THROUGHPUT p_ht_info = GET_HT_INFO(p_default_mgnt_info); - PRT_VERY_HIGH_THROUGHPUT p_vht_info = GET_VHT_INFO(p_default_mgnt_info); - - /* BF_en*/ -#if (BEAMFORMING_SUPPORT == 1) -#ifndef BEAMFORMING_VERSION_1 - beamform_cap = phydm_beamforming_get_entry_beam_cap_by_mac_id(dm, p_default_mgnt_info->m_mac_id); - - if (beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) - tx_bf_en = 1; -#else - if (Beamform_GetSupportBeamformerCap(GetDefaultAdapter(adapter), NULL)) - tx_bf_en = 1; -#endif -#endif - - /* STBC_en*/ - if ((IS_WIRELESS_MODE_AC(adapter) && TEST_FLAG(p_vht_info->VhtCurStbc, STBC_VHT_ENABLE_TX)) || - TEST_FLAG(p_ht_info->HtCurStbc, STBC_HT_ENABLE_TX)) - stbc_en = 1; - - h2c_parameter[4] = (ra_tab->RA_threshold_offset & 0x7f) | (ra_tab->RA_offset_direction << 7); - PHYDM_DBG(dm, DBG_RSSI_MNTR, "RA_threshold_offset = (( %s%d ))\n", ((ra_tab->RA_threshold_offset == 0) ? " " : ((ra_tab->RA_offset_direction) ? "+" : "-")), ra_tab->RA_threshold_offset); - - if (is_ext_ra_info) { - if (tx_bf_en) - h2c_parameter[3] |= RAINFO_BF_STATE; - else { - if (stbc_en) - h2c_parameter[3] |= RAINFO_STBC_STATE; - } - - if (dm->h2c_rarpt_connect) { - h2c_parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; - PHYDM_DBG(dm, DBG_RSSI_MNTR, "h2c_rarpt_connect = (( %d ))\n", dm->h2c_rarpt_connect); - } - - - if (dm->noisy_decision == 1) { - h2c_parameter[3] |= RAINFO_NOISY_STATE; - PHYDM_DBG(dm, DBG_RSSI_MNTR, "[RSSIMonitorCheckMP] Send H2C to FW\n"); - } else - h2c_parameter[3] &= (~RAINFO_NOISY_STATE); - - PHYDM_DBG(dm, DBG_RSSI_MNTR, "[RSSIMonitorCheckMP] h2c_parameter=%x\n", h2c_parameter[3]); - } - - h2c_parameter[2] = (u8)(GET_DEFAULT_RSSI(mgnt_info) & 0xFF); - /*h2c_parameter[1] = 0x20;*/ /* fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1*/ - h2c_parameter[0] = WIN_DEFAULT_PORT_MACID; /* fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1*/ - - odm_fill_h2c_cmd(dm, ODM_H2C_RSSI_REPORT, cmdlen, h2c_parameter); - } - - } else - PlatformEFIOWrite1Byte(adapter, 0x4fe, (u8)GET_DEFAULT_RSSI(mgnt_info)); - - { - void *loop_adapter = GetDefaultAdapter(adapter); - boolean default_pointer_value, *is_link_temp = &default_pointer_value; - s32 global_rssi_min = 0xFF, local_rssi_min; - boolean is_link = false; - - while (loop_adapter) { - local_rssi_min = phydm_find_minimum_rssi(dm, loop_adapter, is_link_temp); - /* dbg_print("hal_data->is_linked=%d, local_rssi_min=%d\n", hal_data->is_linked, local_rssi_min); */ - - if (*is_link_temp) - is_link = true; - - if ((local_rssi_min < global_rssi_min) && (*is_link_temp)) - global_rssi_min = local_rssi_min; - - loop_adapter = GetNextExtAdapter(loop_adapter); - } - - hal_data->bLinked = is_link; - - dm->is_linked = is_link; - dm->rssi_min = (u8)((is_link) ? global_rssi_min : 0); - - } - - -} - -#endif - -void -phydm_rssi_monitor_check( - void *dm_void -) -{ - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (!(dm->support_ability & ODM_BB_RSSI_MONITOR)) return; - if ((dm->phydm_sys_up_time % 2) == 1) /*for AP watchdog period = 1 sec*/ + /*@for AP watchdog period = 1 sec*/ + if ((dm->phydm_sys_up_time % 2) == 1) return; PHYDM_DBG(dm, DBG_RSSI_MNTR, "%s ======>\n", __func__); - phydm_calculate_rssi_min_max(dm); - PHYDM_DBG(dm, DBG_RSSI_MNTR, "RSSI {max, min} = {%d, %d}\n", - dm->rssi_max, dm->rssi_min); - + dm->rssi_max, dm->rssi_min); } -void -phydm_rssi_monitor_init( - void *dm_void -) +void phydm_rssi_monitor_init(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct ra_table *ra_tab = &dm->dm_ra_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct ra_table *ra_tab = &dm->dm_ra_table; ra_tab->firstconnect = false; + dm->pre_rssi_min = 0; dm->rssi_max = 0; dm->rssi_min = 0; - } #endif diff --git a/hal/phydm/phydm_rssi_monitor.h b/hal/phydm/phydm_rssi_monitor.h index 15c9e0a..ac997e3 100644 --- a/hal/phydm/phydm_rssi_monitor.h +++ b/hal/phydm/phydm_rssi_monitor.h @@ -23,53 +23,33 @@ * *****************************************************************************/ +#ifndef __PHYDM_RSSI_MONITOR_H__ +#define __PHYDM_RSSI_MONITOR_H__ -#ifndef __PHYDM_RSSI_MONITOR_H__ -#define __PHYDM_RSSI_MONITOR_H__ +#define RSSI_MONITOR_VERSION "2.0" -#define RSSI_MONITOR_VERSION "1.0" /* 2017.05.011 Dino, Add phydm_rssi_monitor.h*/ - - -/* 1 ============================================================ +/* @1 ============================================================ * 1 Definition - * 1 ============================================================ */ + * 1 ============================================================ + */ -#define H2C_0X42_LENGTH 5 - -#define RAINFO_BE_RX_STATE BIT(0) /* 1:RX*/ /* ULDL */ -#define RAINFO_STBC_STATE BIT(1) -#define RAINFO_NOISY_STATE BIT(2) /* set by Noisy_Detection */ -/*#define RAINFO_SHURTCUT_STATE BIT(3)*/ -/*#define RAINFO_SHURTCUT_FLAG BIT(4)*/ -#define RAINFO_INIT_RSSI_RATE_STATE BIT(5) -#define RAINFO_BF_STATE BIT(6) -#define RAINFO_BE_TX_STATE BIT(7) /* 1:TX */ - -/* 1 ============================================================ +/* @1 ============================================================ * 1 structure - * 1 ============================================================ */ + * 1 ============================================================ + */ - - - -/* 1 ============================================================ +/* @1 ============================================================ * 1 enumeration - * 1 ============================================================ */ + * 1 ============================================================ + */ - - -/* 1 ============================================================ +/* @1 ============================================================ * 1 function prototype - * 1 ============================================================ */ + * 1 ============================================================ + */ -void -phydm_rssi_monitor_check( - void *dm_void -); +void phydm_rssi_monitor_check(void *dm_void); -void -phydm_rssi_monitor_init( - void *dm_void -); +void phydm_rssi_monitor_init(void *dm_void); #endif diff --git a/hal/phydm/phydm_smt_ant.c b/hal/phydm/phydm_smt_ant.c index 323a953..8e805b3 100644 --- a/hal/phydm/phydm_smt_ant.c +++ b/hal/phydm/phydm_smt_ant.c @@ -30,280 +30,293 @@ #include "mp_precomp.h" #include "phydm_precomp.h" -/* ****************************************************** +/******************************************************* * when antenna test utility is on or some testing need to disable antenna diversity * call this function to disable all ODM related mechanisms which will switch antenna. - * ****************************************************** */ + ******************************************************/ #if (defined(CONFIG_SMART_ANTENNA)) -#if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) -void -phydm_cumitek_smt_ant_mapping_table_8822b( - void *dm_void, - u8 *table_path_a, - u8 *table_path_b -) + +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT +#if (RTL8198F_SUPPORT == 1) +void phydm_smt_ant_init_98f(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 path_a_0to3_idx = 0; - u32 path_b_0to3_idx = 0; - u32 path_a_4to7_idx = 0; - u32 path_b_4to7_idx = 0; - - path_a_0to3_idx = ((table_path_a[3] & 0xf) << 24) | ((table_path_a[2] & 0xf) << 16) - | ((table_path_a[1] & 0xf) << 8) | (table_path_a[0] & 0xf); + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 val = 0; - path_b_0to3_idx = ((table_path_b[3] & 0xf) << 28) | ((table_path_b[2] & 0xf) << 20) - | ((table_path_b[1] & 0xf) << 12) | ((table_path_b[0] & 0xf) << 4); + #if 0 + odm_set_bb_reg(dm, R_0x1da4, 0x3c, 4); /*6.25*4 = 25ms*/ + odm_set_bb_reg(dm, R_0x1da4, BIT(6), 1); + odm_set_bb_reg(dm, R_0x1da4, BIT(7), 1); + #endif +} +#endif +#endif - path_a_4to7_idx = ((table_path_a[7] & 0xf) << 24) | ((table_path_a[6] & 0xf) << 16) - | ((table_path_a[5] & 0xf) << 8) | (table_path_a[4] & 0xf); +#if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) +void phydm_cumitek_smt_ant_mapping_table_8822b( + void *dm_void, + u8 *table_path_a, + u8 *table_path_b) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 path_a_0to3_idx = 0; + u32 path_b_0to3_idx = 0; + u32 path_a_4to7_idx = 0; + u32 path_b_4to7_idx = 0; - path_b_4to7_idx = ((table_path_b[7] & 0xf) << 28) | ((table_path_b[6] & 0xf) << 20) - | ((table_path_b[5] & 0xf) << 12) | ((table_path_b[4] & 0xf) << 4); + path_a_0to3_idx = ((table_path_a[3] & 0xf) << 24) | ((table_path_a[2] & 0xf) << 16) | ((table_path_a[1] & 0xf) << 8) | (table_path_a[0] & 0xf); + path_b_0to3_idx = ((table_path_b[3] & 0xf) << 28) | ((table_path_b[2] & 0xf) << 20) | ((table_path_b[1] & 0xf) << 12) | ((table_path_b[0] & 0xf) << 4); + path_a_4to7_idx = ((table_path_a[7] & 0xf) << 24) | ((table_path_a[6] & 0xf) << 16) | ((table_path_a[5] & 0xf) << 8) | (table_path_a[4] & 0xf); + + path_b_4to7_idx = ((table_path_b[7] & 0xf) << 28) | ((table_path_b[6] & 0xf) << 20) | ((table_path_b[5] & 0xf) << 12) | ((table_path_b[4] & 0xf) << 4); + +#if 0 /*PHYDM_DBG(dm, DBG_SMT_ANT, "mapping table{A, B} = {0x%x, 0x%x}\n", path_a_0to3_idx, path_b_0to3_idx);*/ +#endif /*pathA*/ - odm_set_bb_reg(dm, 0xca4, MASKDWORD, path_a_0to3_idx); /*ant map 1*/ - odm_set_bb_reg(dm, 0xca8, MASKDWORD, path_a_4to7_idx); /*ant map 2*/ + odm_set_bb_reg(dm, R_0xca4, MASKDWORD, path_a_0to3_idx); /*@ant map 1*/ + odm_set_bb_reg(dm, R_0xca8, MASKDWORD, path_a_4to7_idx); /*@ant map 2*/ /*pathB*/ - odm_set_bb_reg(dm, 0xea4, MASKDWORD, path_b_0to3_idx); /*ant map 1*/ - odm_set_bb_reg(dm, 0xea8, MASKDWORD, path_b_4to7_idx); /*ant map 2*/ - + odm_set_bb_reg(dm, R_0xea4, MASKDWORD, path_b_0to3_idx); /*@ant map 1*/ + odm_set_bb_reg(dm, R_0xea8, MASKDWORD, path_b_4to7_idx); /*@ant map 2*/ } - -void -phydm_cumitek_smt_ant_init_8822b( - void *dm_void -) +void phydm_cumitek_smt_ant_init_8822b( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant *smtant_table = &dm->smtant_table; - struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; - u32 value32; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant *smtant_table = &dm->smtant_table; + struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; + u32 value32; PHYDM_DBG(dm, DBG_SMT_ANT, "[8822B Cumitek SmtAnt Int]\n"); - /*========= MAC GPIO setting =================================*/ - + /*@========= MAC GPIO setting =================================*/ + /* Pin, pin_name, RFE_CTRL_NUM*/ - - /* A0, 55, 5G_TRSW, 3*/ - /* A1, 52, 5G_TRSW, 0*/ - /* A2, 25, 5G_TRSW, 8*/ - - /* B0, 16, 5G_TRSW, 4*/ - /* B1, 13, 5G_TRSW, 11*/ - /* B2, 24, 5G_TRSW, 9*/ - /*for RFE_CTRL 8 & 9*/ - odm_set_mac_reg(dm, 0x4c, BIT(24) | BIT(23), 2); - odm_set_mac_reg(dm, 0x44, BIT(27) | BIT(26), 0); + /* @A0, 55, 5G_TRSW, 3*/ + /* @A1, 52, 5G_TRSW, 0*/ + /* @A2, 25, 5G_TRSW, 8*/ - /*for RFE_CTRL 0*/ - odm_set_mac_reg(dm, 0x4c, BIT(25), 0); - odm_set_mac_reg(dm, 0x64, BIT(29), 1); + /* @B0, 16, 5G_TRSW, 4*/ + /* @B1, 13, 5G_TRSW, 11*/ + /* @B2, 24, 5G_TRSW, 9*/ - /*for RFE_CTRL 2 & 3*/ - odm_set_mac_reg(dm, 0x4c, BIT(26), 0); - odm_set_mac_reg(dm, 0x64, BIT(28), 1); + /*@for RFE_CTRL 8 & 9*/ + odm_set_mac_reg(dm, R_0x4c, BIT(24) | BIT(23), 2); + odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); - /*for RFE_CTRL 11*/ - odm_set_mac_reg(dm, 0x40, BIT(3), 1); + /*@for RFE_CTRL 0*/ + odm_set_mac_reg(dm, R_0x4c, BIT(25), 0); + odm_set_mac_reg(dm, R_0x64, BIT(29), 1); + /*@for RFE_CTRL 2 & 3*/ + odm_set_mac_reg(dm, R_0x4c, BIT(26), 0); + odm_set_mac_reg(dm, R_0x64, BIT(28), 1); - /*0x604[25]=1 : 2bit mode for pathA&B&C&D*/ - /*0x604[25]=0 : 3bit mode for pathA&B*/ + /*@for RFE_CTRL 11*/ + odm_set_mac_reg(dm, R_0x40, BIT(3), 1); + + /*@0x604[25]=1 : 2bit mode for pathA&B&C&D*/ + /*@0x604[25]=0 : 3bit mode for pathA&B*/ smtant_table->tx_desc_mode = 0; - odm_set_mac_reg(dm, 0x604, BIT(25), (u32)smtant_table->tx_desc_mode); + odm_set_mac_reg(dm, R_0x604, BIT(25), (u32)smtant_table->tx_desc_mode); - /*========= BB RFE setting =================================*/ - #if 0 + /*@========= BB RFE setting =================================*/ +#if 0 /*path A*/ - odm_set_bb_reg(dm, 0x1990, BIT(3), 0); /*RFE_CTRL_3*/ /*A_0*/ - odm_set_bb_reg(dm, 0xcbc, BIT(3), 0); /*inv*/ - odm_set_bb_reg(dm, 0xcb0, 0xf000, 8); + odm_set_bb_reg(dm, R_0x1990, BIT(3), 0); /*RFE_CTRL_3*/ /*A_0*/ + odm_set_bb_reg(dm, R_0xcbc, BIT(3), 0); /*@inv*/ + odm_set_bb_reg(dm, R_0xcb0, 0xf000, 8); + + odm_set_bb_reg(dm, R_0x1990, BIT(0), 0); /*RFE_CTRL_0*/ /*A_1*/ + odm_set_bb_reg(dm, R_0xcbc, BIT(0), 0); /*@inv*/ + odm_set_bb_reg(dm, R_0xcb0, 0xf, 0x9); + + odm_set_bb_reg(dm, R_0x1990, BIT(8), 0); /*RFE_CTRL_8*/ /*A_2*/ + odm_set_bb_reg(dm, R_0xcbc, BIT(8), 0); /*@inv*/ + odm_set_bb_reg(dm, R_0xcb4, 0xf, 0xa); - odm_set_bb_reg(dm, 0x1990, BIT(0), 0); /*RFE_CTRL_0*/ /*A_1*/ - odm_set_bb_reg(dm, 0xcbc, BIT(0), 0); /*inv*/ - odm_set_bb_reg(dm, 0xcb0, 0xf, 0x9); - - odm_set_bb_reg(dm, 0x1990, BIT(8), 0); /*RFE_CTRL_8*/ /*A_2*/ - odm_set_bb_reg(dm, 0xcbc, BIT(8), 0); /*inv*/ - odm_set_bb_reg(dm, 0xcb4, 0xf, 0xa); - /*path B*/ - odm_set_bb_reg(dm, 0x1990, BIT(4), 1); /*RFE_CTRL_4*/ /*B_0*/ - odm_set_bb_reg(dm, 0xdbc, BIT(4), 0); /*inv*/ - odm_set_bb_reg(dm, 0xdb0, 0xf0000, 0xb); - - odm_set_bb_reg(dm, 0x1990, BIT(11), 1); /*RFE_CTRL_11*/ /*B_1*/ - odm_set_bb_reg(dm, 0xdbc, BIT(11), 0); /*inv*/ - odm_set_bb_reg(dm, 0xdb4, 0xf000, 0xc); - - odm_set_bb_reg(dm, 0x1990, BIT(9), 1); /*RFE_CTRL_9*/ /*B_2*/ - odm_set_bb_reg(dm, 0xdbc, BIT(9), 0); /*inv*/ - odm_set_bb_reg(dm, 0xdb4, 0xf0, 0xd); - #endif - /*========= BB SmtAnt setting =================================*/ - odm_set_mac_reg(dm, 0x6d8, BIT(22) | BIT(21), 2); /*resp tx by register*/ - odm_set_mac_reg(dm, 0x668, BIT(3), 1); - odm_set_bb_reg(dm, 0x804, BIT(4), 0); /*lathch antsel*/ - odm_set_bb_reg(dm, 0x818, 0xf00000, 0); /*keep tx by rx*/ - odm_set_bb_reg(dm, 0x900, BIT(19), 0); /*fast train*/ - odm_set_bb_reg(dm, 0x900, BIT(18), 1); /*1: by TXDESC*/ + odm_set_bb_reg(dm, R_0x1990, BIT(4), 1); /*RFE_CTRL_4*/ /*B_0*/ + odm_set_bb_reg(dm, R_0xdbc, BIT(4), 0); /*@inv*/ + odm_set_bb_reg(dm, R_0xdb0, 0xf0000, 0xb); + + odm_set_bb_reg(dm, R_0x1990, BIT(11), 1); /*RFE_CTRL_11*/ /*B_1*/ + odm_set_bb_reg(dm, R_0xdbc, BIT(11), 0); /*@inv*/ + odm_set_bb_reg(dm, R_0xdb4, 0xf000, 0xc); + + odm_set_bb_reg(dm, R_0x1990, BIT(9), 1); /*RFE_CTRL_9*/ /*B_2*/ + odm_set_bb_reg(dm, R_0xdbc, BIT(9), 0); /*@inv*/ + odm_set_bb_reg(dm, R_0xdb4, 0xf0, 0xd); +#endif + /*@========= BB SmtAnt setting =================================*/ + odm_set_mac_reg(dm, R_0x6d8, BIT(22) | BIT(21), 2); /*resp tx by register*/ + odm_set_mac_reg(dm, R_0x668, BIT(3), 1); + odm_set_bb_reg(dm, R_0x804, BIT(4), 0); /*@lathch antsel*/ + odm_set_bb_reg(dm, R_0x818, 0xf00000, 0); /*@keep tx by rx*/ + odm_set_bb_reg(dm, R_0x900, BIT(19), 0); /*@fast train*/ + odm_set_bb_reg(dm, R_0x900, BIT(18), 1); /*@1: by TXDESC*/ /*pathA*/ - odm_set_bb_reg(dm, 0xca4, MASKDWORD, 0x03020100); /*ant map 1*/ - odm_set_bb_reg(dm, 0xca8, MASKDWORD, 0x07060504); /*ant map 2*/ - odm_set_bb_reg(dm, 0xcac, BIT(9), 0); /*keep antsel map by GNT_BT*/ + odm_set_bb_reg(dm, R_0xca4, MASKDWORD, 0x03020100); /*@ant map 1*/ + odm_set_bb_reg(dm, R_0xca8, MASKDWORD, 0x07060504); /*@ant map 2*/ + odm_set_bb_reg(dm, R_0xcac, BIT(9), 0); /*@keep antsel map by GNT_BT*/ /*pathB*/ - odm_set_bb_reg(dm, 0xea4, MASKDWORD, 0x30201000); /*ant map 1*/ - odm_set_bb_reg(dm, 0xea8, MASKDWORD, 0x70605040); /*ant map 2*/ - odm_set_bb_reg(dm, 0xeac, BIT(9), 0); /*keep antsel map by GNT_BT*/ + odm_set_bb_reg(dm, R_0xea4, MASKDWORD, 0x30201000); /*@ant map 1*/ + odm_set_bb_reg(dm, R_0xea8, MASKDWORD, 0x70605040); /*@ant map 2*/ + odm_set_bb_reg(dm, R_0xeac, BIT(9), 0); /*@keep antsel map by GNT_BT*/ } -void -phydm_cumitek_smt_ant_init_8197f( - void *dm_void -) +void phydm_cumitek_smt_ant_init_8197f( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant *smtant_table = &dm->smtant_table; - struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; - u32 value32; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant *smtant_table = &dm->smtant_table; + struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; + u32 value32; PHYDM_DBG(dm, DBG_SMT_ANT, "[8197F Cumitek SmtAnt Int]\n"); - /*GPIO setting*/ - - + /*@GPIO setting*/ } -void -phydm_cumitek_smt_tx_ant_update( - void *dm_void, - u8 tx_ant_idx_path_a, - u8 tx_ant_idx_path_b, - u32 mac_id -) +void phydm_cumitek_smt_ant_init_8192f( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant *smtant_table = &dm->smtant_table; - struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant *smtant_table = &dm->smtant_table; + struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; + u32 value32; + PHYDM_DBG(dm, DBG_SMT_ANT, "[8192F Cumitek SmtAnt Int]\n"); - PHYDM_DBG(dm, DBG_ANT_DIV, "[Cumitek] Set TX-ANT[%d] = (( A:0x%x , B:0x%x ))\n", - mac_id, tx_ant_idx_path_a, tx_ant_idx_path_b); + /*@GPIO setting*/ +} + +void phydm_cumitek_smt_tx_ant_update( + void *dm_void, + u8 tx_ant_idx_path_a, + u8 tx_ant_idx_path_b, + u32 mac_id) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant *smtant_table = &dm->smtant_table; + struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; + + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Cumitek] Set TX-ANT[%d] = (( A:0x%x , B:0x%x ))\n", mac_id, + tx_ant_idx_path_a, tx_ant_idx_path_b); /*path-A*/ - cumi_smtant_table->tx_ant_idx[0][mac_id] = tx_ant_idx_path_a; /*fill this value into TXDESC*/ - - /*path-B*/ - cumi_smtant_table->tx_ant_idx[1][mac_id] = tx_ant_idx_path_b; /*fill this value into TXDESC*/ + cumi_smtant_table->tx_ant_idx[0][mac_id] = tx_ant_idx_path_a; /*@fill this value into TXDESC*/ + + /*path-B*/ + cumi_smtant_table->tx_ant_idx[1][mac_id] = tx_ant_idx_path_b; /*@fill this value into TXDESC*/ } -void -phydm_cumitek_smt_rx_default_ant_update( - void *dm_void, - u8 rx_ant_idx_path_a, - u8 rx_ant_idx_path_b -) +void phydm_cumitek_smt_rx_default_ant_update( + void *dm_void, + u8 rx_ant_idx_path_a, + u8 rx_ant_idx_path_b) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant *smtant_table = &dm->smtant_table; - struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant *smtant_table = &dm->smtant_table; + struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; - PHYDM_DBG(dm, DBG_ANT_DIV, "[Cumitek] Set RX-ANT = (( A:0x%x, B:0x%x ))\n", - rx_ant_idx_path_a, rx_ant_idx_path_b); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Cumitek] Set RX-ANT = (( A:0x%x, B:0x%x ))\n", + rx_ant_idx_path_a, rx_ant_idx_path_b); /*path-A*/ if (cumi_smtant_table->rx_default_ant_idx[0] != rx_ant_idx_path_a) { - #if (RTL8822B_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8822B) { - - odm_set_bb_reg(dm, 0xc08, BIT(21) | BIT(20) | BIT(19), rx_ant_idx_path_a); /*default RX antenna*/ - odm_set_mac_reg(dm, 0x6d8, BIT(2) | BIT(1) | BIT(0), rx_ant_idx_path_a); /*default response TX antenna*/ + odm_set_bb_reg(dm, R_0xc08, BIT(21) | BIT(20) | BIT(19), rx_ant_idx_path_a); /*@default RX antenna*/ + odm_set_mac_reg(dm, R_0x6d8, BIT(2) | BIT(1) | BIT(0), rx_ant_idx_path_a); /*@default response TX antenna*/ } #endif - + #if (RTL8197F_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8197F) { } #endif + /*@jj add 20170822*/ + #if (RTL8192F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8192F) { + } + #endif cumi_smtant_table->rx_default_ant_idx[0] = rx_ant_idx_path_a; } /*path-B*/ if (cumi_smtant_table->rx_default_ant_idx[1] != rx_ant_idx_path_b) { - #if (RTL8822B_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8822B) { - - odm_set_bb_reg(dm, 0xe08, BIT(21) | BIT(20) | BIT(19), rx_ant_idx_path_b); /*default antenna*/ - odm_set_mac_reg(dm, 0x6d8, BIT(5) | BIT(4) | BIT(3), rx_ant_idx_path_b); /*default response TX antenna*/ + odm_set_bb_reg(dm, R_0xe08, BIT(21) | BIT(20) | BIT(19), rx_ant_idx_path_b); /*@default antenna*/ + odm_set_mac_reg(dm, R_0x6d8, BIT(5) | BIT(4) | BIT(3), rx_ant_idx_path_b); /*@default response TX antenna*/ } #endif - + #if (RTL8197F_SUPPORT == 1) if (dm->support_ic_type == ODM_RTL8197F) { } #endif + /*@jj add 20170822*/ + #if (RTL8192F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8192F) { + } + #endif cumi_smtant_table->rx_default_ant_idx[1] = rx_ant_idx_path_b; } - } -void -phydm_cumitek_smt_ant_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +void phydm_cumitek_smt_ant_debug( + void *dm_void, + char input[][16], + u32 *_used, + char *output, + u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant *smtant_table = &dm->smtant_table; - struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; - u32 used = *_used; - u32 out_len = *_out_len; - char help[] = "-h"; - u32 dm_value[10] = {0}; - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant *smtant_table = &dm->smtant_table; + struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; + u32 used = *_used; + u32 out_len = *_out_len; + char help[] = "-h"; + u32 dm_value[10] = {0}; + u8 i; PHYDM_SSCANF(input[1], DCMD_DECIMAL, &dm_value[0]); if (strcmp(input[1], help) == 0) { PDM_SNPF(out_len, used, output + used, out_len - used, - "{1} {PathA rx_ant_idx} {pathB rx_ant_idx}\n"); + "{1} {PathA rx_ant_idx} {pathB rx_ant_idx}\n"); PDM_SNPF(out_len, used, output + used, out_len - used, - "{2} {PathA tx_ant_idx} {pathB tx_ant_idx} {macid}\n"); + "{2} {PathA tx_ant_idx} {pathB tx_ant_idx} {macid}\n"); PDM_SNPF(out_len, used, output + used, out_len - used, - "{3} {PathA mapping table} {PathB mapping table}\n"); + "{3} {PathA mapping table} {PathB mapping table}\n"); PDM_SNPF(out_len, used, output + used, out_len - used, - "{4} {txdesc_mode 0:3bit, 1:2bit}\n"); + "{4} {txdesc_mode 0:3bit, 1:2bit}\n"); + + } else if (dm_value[0] == 1) { /*@fix rx_idle pattern*/ - } else if (dm_value[0] == 1) { /*fix rx_idle pattern*/ - PHYDM_SSCANF(input[2], DCMD_DECIMAL, &dm_value[1]); PHYDM_SSCANF(input[3], DCMD_DECIMAL, &dm_value[2]); phydm_cumitek_smt_rx_default_ant_update(dm, (u8)dm_value[1], (u8)dm_value[2]); PDM_SNPF(out_len, used, output + used, out_len - used, - "RX Ant{A, B}={%d, %d}\n", dm_value[1], - dm_value[2]); - - } else if (dm_value[0] == 2) { /*fix tx pattern*/ + "RX Ant{A, B}={%d, %d}\n", dm_value[1], dm_value[2]); + } else if (dm_value[0] == 2) { /*@fix tx pattern*/ for (i = 1; i < 4; i++) { if (input[i + 1]) @@ -311,8 +324,8 @@ phydm_cumitek_smt_ant_debug( } PDM_SNPF(out_len, used, output + used, out_len - used, - "STA[%d] TX Ant{A, B}={%d, %d}\n",dm_value[3], - dm_value[1], dm_value[2]); + "STA[%d] TX Ant{A, B}={%d, %d}\n", dm_value[3], + dm_value[1], dm_value[2]); phydm_cumitek_smt_tx_ant_update(dm, (u8)dm_value[1], (u8)dm_value[2], (u8)dm_value[3]); } else if (dm_value[0] == 3) { @@ -325,35 +338,30 @@ phydm_cumitek_smt_ant_debug( } PDM_SNPF(out_len, used, output + used, out_len - used, - "Set Path-AB mapping table={%d, %d}\n", - dm_value[1], dm_value[2]); + "Set Path-AB mapping table={%d, %d}\n", dm_value[1], + dm_value[2]); - for (i = 0; i <8; i++) { + for (i = 0; i < 8; i++) { table_path_a[i] = (u8)((dm_value[1] >> (4 * i)) & 0xf); table_path_b[i] = (u8)((dm_value[2] >> (4 * i)) & 0xf); } PDM_SNPF(out_len, used, output + used, out_len - used, - "Ant_Table_A[7:0]={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x}\n", - - table_path_a[7], table_path_a[6], - table_path_a[5], table_path_a[4], - table_path_a[3], table_path_a[2], - table_path_a[1], table_path_a[0]); + "Ant_Table_A[7:0]={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x}\n", + table_path_a[7], table_path_a[6], table_path_a[5], + table_path_a[4], table_path_a[3], table_path_a[2], + table_path_a[1], table_path_a[0]); PDM_SNPF(out_len, used, output + used, out_len - used, - "Ant_Table_B[7:0]={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x}\n", - - table_path_b[7], table_path_b[6], - table_path_b[5], table_path_b[4], - table_path_b[3], table_path_b[2], - table_path_b[1], table_path_b[0]); + "Ant_Table_B[7:0]={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x}\n", + table_path_b[7], table_path_b[6], table_path_b[5], + table_path_b[4], table_path_b[3], table_path_b[2], + table_path_b[1], table_path_b[0]); - phydm_cumitek_smt_ant_mapping_table_8822b(dm, - &table_path_a[0], - &table_path_b[0]); - }else if (dm_value[0] == 4) { + phydm_cumitek_smt_ant_mapping_table_8822b(dm, &table_path_a[0], &table_path_b[0]); + + } else if (dm_value[0] == 4) { smtant_table->tx_desc_mode = (u8)dm_value[1]; - odm_set_mac_reg(dm, 0x604, BIT(25), (u32)smtant_table->tx_desc_mode); + odm_set_mac_reg(dm, R_0x604, BIT(25), (u32)smtant_table->tx_desc_mode); } *_used = used; *_out_len = out_len; @@ -365,107 +373,110 @@ phydm_cumitek_smt_ant_debug( #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 #if (RTL8822B_SUPPORT == 1) -void -phydm_hl_smart_ant_type2_init_8822b( - void *dm_void -) +void phydm_hl_smart_ant_type2_init_8822b( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - u8 j; - u8 rfu_codeword_table_init_2g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] = { - {1, 1},/*0*/ - {1, 2}, - {2, 1}, - {2, 2}, - {4, 0}, - {5, 0}, - {6, 0}, - {7, 0}, - {8, 0},/*8*/ - {9, 0}, - {0xa, 0}, - {0xb, 0}, - {0xc, 0}, - {0xd, 0}, - {0xe, 0}, - {0xf, 0} - }; - u8 rfu_codeword_table_init_5g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] ={ - #if 1 - {9, 1},/*0*/ - {9, 9}, - {1, 9}, - {9, 6}, - {2, 1}, - {2, 9}, - {9, 2}, - {2, 2},/*8*/ - {6, 1}, - {6, 9}, - {2, 9}, - {2, 2}, - {6, 2}, - {6, 6}, - {2, 6}, - {1, 1} - #else - {1, 1},/*0*/ - {9, 1}, - {9, 9}, - {1, 9}, - {1, 2}, - {9, 2}, - {9, 6}, - {1, 6}, - {2, 1},/*8*/ - {6, 1}, - {6, 9}, - {2, 9}, - {2, 2}, - {6, 2}, - {6, 6}, - {2, 6} - #endif - }; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u8 j; + u8 rfu_codeword_table_init_2g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] = { + {1, 1}, /*@0*/ + {1, 2}, + {2, 1}, + {2, 2}, + {4, 0}, + {5, 0}, + {6, 0}, + {7, 0}, + {8, 0}, /*@8*/ + {9, 0}, + {0xa, 0}, + {0xb, 0}, + {0xc, 0}, + {0xd, 0}, + {0xe, 0}, + {0xf, 0}}; + u8 rfu_codeword_table_init_5g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] = { +#if 1 + {9, 1}, /*@0*/ + {9, 9}, + {1, 9}, + {9, 6}, + {2, 1}, + {2, 9}, + {9, 2}, + {2, 2}, /*@8*/ + {6, 1}, + {6, 9}, + {2, 9}, + {2, 2}, + {6, 2}, + {6, 6}, + {2, 6}, + {1, 1} +#else + {1, 1}, /*@0*/ + {9, 1}, + {9, 9}, + {1, 9}, + {1, 2}, + {9, 2}, + {9, 6}, + {1, 6}, + {2, 1}, /*@8*/ + {6, 1}, + {6, 9}, + {2, 9}, + {2, 2}, + {6, 2}, + {6, 6}, + {2, 6} +#endif + }; - PHYDM_DBG(dm, DBG_ANT_DIV, "***RTK 8822B SmartAnt_Init: Hong-Bo SmrtAnt Type2]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "***RTK 8822B SmartAnt_Init: Hong-Bo SmrtAnt Type2]\n"); - /* ---------------------------------------- */ - /* GPIO 0-1 for Beam control */ + /* @---------------------------------------- */ + /* @GPIO 0-1 for Beam control */ /* reg0x66[2:0]=0 */ /* reg0x44[25:24] = 0 */ /* reg0x44[23:16] enable_output for P_GPIO[7:0] */ /* reg0x44[15:8] output_value for P_GPIO[7:0] */ /* reg0x40[1:0] = 0 GPIO function */ - /* ------------------------------------------ */ + /* @------------------------------------------ */ odm_move_memory(dm, sat_tab->rfu_codeword_table_2g, rfu_codeword_table_init_2g, (SUPPORT_BEAM_SET_PATTERN_NUM * MAX_PATH_NUM_8822B)); odm_move_memory(dm, sat_tab->rfu_codeword_table_5g, rfu_codeword_table_init_5g, (SUPPORT_BEAM_SET_PATTERN_NUM * MAX_PATH_NUM_8822B)); - /*GPIO setting*/ - odm_set_mac_reg(dm, 0x64, (BIT(18) | BIT(17) | BIT(16)), 0); - odm_set_mac_reg(dm, 0x44, BIT(25) | BIT(24), 0); /*config P_GPIO[3:2] to data port*/ - odm_set_mac_reg(dm, 0x44, BIT(17) | BIT(16), 0x3); /*enable_output for P_GPIO[3:2]*/ - /*odm_set_mac_reg(dm, 0x44, BIT(9)|BIT(8), 0);*/ /*P_GPIO[3:2] output value*/ - odm_set_mac_reg(dm, 0x40, BIT(1) | BIT(0), 0); /*GPIO function*/ + /*@GPIO setting*/ + odm_set_mac_reg(dm, R_0x64, (BIT(18) | BIT(17) | BIT(16)), 0); + odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ + odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ +#if 0 + /*odm_set_mac_reg(dm, R_0x44, BIT(9)|BIT(8), 0);*/ /*P_GPIO[3:2] output value*/ +#endif + odm_set_mac_reg(dm, R_0x40, BIT(1) | BIT(0), 0); /*@GPIO function*/ - /*Hong_lin smart antenna HW setting*/ + /*@Hong_lin smart antenna HW setting*/ sat_tab->rfu_protocol_type = 2; sat_tab->rfu_protocol_delay_time = 45; - - sat_tab->rfu_codeword_total_bit_num = 16;/*max=32bit*/ + + sat_tab->rfu_codeword_total_bit_num = 16; /*@max=32bit*/ sat_tab->rfu_each_ant_bit_num = 4; - + sat_tab->total_beam_set_num = 4; sat_tab->total_beam_set_num_2g = 4; sat_tab->total_beam_set_num_5g = 8; #if DEV_BUS_TYPE == RT_SDIO_INTERFACE - sat_tab->latch_time = 100; /*mu sec*/ -#elif DEV_BUS_TYPE == RT_USB_INTERFACE - sat_tab->latch_time = 100; /*mu sec*/ + if (dm->support_interface == ODM_ITRF_SDIO) + sat_tab->latch_time = 100; /*@mu sec*/ +#endif +#if DEV_BUS_TYPE == RT_USB_INTERFACE + if (dm->support_interface == ODM_ITRF_USB) + sat_tab->latch_time = 100; /*@mu sec*/ #endif sat_tab->pkt_skip_statistic_en = 0; @@ -473,12 +484,10 @@ phydm_hl_smart_ant_type2_init_8822b( sat_tab->ant_num_total = MAX_PATH_NUM_8822B; sat_tab->first_train_ant = MAIN_ANT; - - - sat_tab->fix_beam_pattern_en = 0; + sat_tab->fix_beam_pattern_en = 0; sat_tab->decision_holding_period = 0; - /*beam training setting*/ + /*@beam training setting*/ sat_tab->pkt_counter = 0; sat_tab->per_beam_training_pkt_num = 10; @@ -487,122 +496,117 @@ phydm_hl_smart_ant_type2_init_8822b( sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num; for (j = 0; j < SUPPORT_BEAM_SET_PATTERN_NUM; j++) { - sat_tab->beam_set_avg_rssi_pre[j] = 0; sat_tab->beam_set_train_val_diff[j] = 0; sat_tab->beam_set_train_cnt[j] = 0; } phydm_set_rfu_beam_pattern_type2(dm); fat_tab->fat_state = FAT_BEFORE_LINK_STATE; - } #endif - -u32 -phydm_construct_hb_rfu_codeword_type2( - void *dm_void, - u32 beam_set_idx -) +u32 phydm_construct_hb_rfu_codeword_type2( + void *dm_void, + u32 beam_set_idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - u32 sync_codeword = 0x7f; - u32 codeword = 0; - u32 data_tmp = 0; - u32 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + u32 sync_codeword = 0x7f; + u32 codeword = 0; + u32 data_tmp = 0; + u32 i; for (i = 0; i < sat_tab->ant_num_total; i++) { if (*dm->band_type == ODM_BAND_5G) data_tmp = sat_tab->rfu_codeword_table_5g[beam_set_idx][i]; else data_tmp = sat_tab->rfu_codeword_table_2g[beam_set_idx][i]; - + codeword |= (data_tmp << (i * sat_tab->rfu_each_ant_bit_num)); } - codeword = (codeword<<8) | sync_codeword; - + codeword = (codeword << 8) | sync_codeword; + return codeword; } -void -phydm_update_beam_pattern_type2( - void *dm_void, - u32 codeword, - u32 codeword_length -) +void phydm_update_beam_pattern_type2( + void *dm_void, + u32 codeword, + u32 codeword_length) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - u8 i; - boolean beam_ctrl_signal; - u32 one = 0x1; - u32 reg44_tmp_p, reg44_tmp_n, reg44_ori; - u8 devide_num = 4; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + u8 i; + boolean beam_ctrl_signal; + u32 one = 0x1; + u32 reg44_tmp_p, reg44_tmp_n, reg44_ori; + u8 devide_num = 4; PHYDM_DBG(dm, DBG_ANT_DIV, "Set codeword = ((0x%x))\n", codeword); - reg44_ori = odm_get_mac_reg(dm, 0x44, MASKDWORD); + reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); reg44_tmp_p = reg44_ori; +#if 0 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_ori =0x%x\n", reg44_ori);*/ +#endif - /*devide_num = (sat_tab->rfu_protocol_type == 2) ? 8 : 4;*/ + /*@devide_num = (sat_tab->rfu_protocol_type == 2) ? 8 : 4;*/ for (i = 0; i <= (codeword_length - 1); i++) { beam_ctrl_signal = (boolean)((codeword & BIT(i)) >> i); - + #if 1 if (dm->debug_components & DBG_ANT_DIV) { - if (i == (codeword_length - 1)) { + if (i == (codeword_length - 1)) pr_debug("%d ]\n", beam_ctrl_signal); - /**/ - } else if (i == 0) { + else if (i == 0) pr_debug("Start sending codeword[1:%d] ---> [ %d ", codeword_length, beam_ctrl_signal); - /**/ - } else if ((i % devide_num) == (devide_num-1)) { + else if ((i % devide_num) == (devide_num - 1)) pr_debug("%d | ", beam_ctrl_signal); - /**/ - } else { + else pr_debug("%d ", beam_ctrl_signal); - /**/ - } } #endif - + if (dm->support_ic_type == ODM_RTL8821) { #if (RTL8821A_SUPPORT == 1) - reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT(10))); /*clean bit 10 & 11*/ + reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT(10))); /*@clean bit 10 & 11*/ reg44_tmp_p |= ((1 << 11) | (beam_ctrl_signal << 10)); reg44_tmp_n = reg44_ori & (~(BIT(11) | BIT(10))); +#if 0 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n);*/ - odm_set_mac_reg(dm, 0x44, MASKDWORD, reg44_tmp_p); - odm_set_mac_reg(dm, 0x44, MASKDWORD, reg44_tmp_n); +#endif + odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); + odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); #endif } #if (RTL8822B_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8822B) { if (sat_tab->rfu_protocol_type == 2) { - reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*clean bit 8*/ - reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*get new clk high/low, exclusive-or*/ + reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*@clean bit 8*/ + reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*@get new clk high/low, exclusive-or*/ - reg44_tmp_p |= (beam_ctrl_signal << 8); - - odm_set_mac_reg(dm, 0x44, MASKDWORD, reg44_tmp_p); + + odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); ODM_delay_us(sat_tab->rfu_protocol_delay_time); +#if 0 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44 =(( 0x%x )), reg44[9:8] = ((%x)), beam_ctrl_signal =((%x))\n", reg44_tmp_p, ((reg44_tmp_p & 0x300)>>8), beam_ctrl_signal);*/ - +#endif + } else { - reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT(8))); /*clean bit 9 & 8*/ + reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT(8))); /*@clean bit 9 & 8*/ reg44_tmp_p |= ((1 << 9) | (beam_ctrl_signal << 8)); reg44_tmp_n = reg44_ori & (~(BIT(9) | BIT(8))); +#if 0 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n); */ - odm_set_mac_reg(dm, 0x44, MASKDWORD, reg44_tmp_p); +#endif + odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); ODM_delay_us(10); - odm_set_mac_reg(dm, 0x44, MASKDWORD, reg44_tmp_n); + odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); ODM_delay_us(10); } } @@ -610,50 +614,52 @@ phydm_update_beam_pattern_type2( } } -void -phydm_update_rx_idle_beam_type2( - void *dm_void -) +void phydm_update_rx_idle_beam_type2( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - u32 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + u32 i; sat_tab->update_beam_codeword = phydm_construct_hb_rfu_codeword_type2(dm, sat_tab->rx_idle_beam_set_idx); - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Update Rx-Idle-Beam ] BeamSet idx = ((%d))\n", sat_tab->rx_idle_beam_set_idx); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Update Rx-Idle-Beam ] BeamSet idx = ((%d))\n", + sat_tab->rx_idle_beam_set_idx); #if DEV_BUS_TYPE == RT_PCI_INTERFACE - phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); -#else - odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); + if (dm->support_interface == ODM_ITRF_PCIE) + phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); +#endif +#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE + if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) + odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); +#if 0 /*odm_stall_execution(1);*/ +#endif #endif sat_tab->pre_codeword = sat_tab->update_beam_codeword; } - -void -phydm_hl_smart_ant_debug_type2( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num +void phydm_hl_smt_ant_dbg_type2( + void *dm_void, + char input[][16], + u32 *_used, + char *output, + u32 *_out_len ) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - u32 used = *_used; - u32 out_len = *_out_len; - u32 one = 0x1; - u32 codeword_length = sat_tab->rfu_codeword_total_bit_num; - u32 beam_ctrl_signal, i; - u8 devide_num = 4; - char help[] = "-h"; - u32 dm_value[10] = {0}; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + u32 used = *_used; + u32 out_len = *_out_len; + u32 one = 0x1; + u32 codeword_length = sat_tab->rfu_codeword_total_bit_num; + u32 beam_ctrl_signal, i; + u8 devide_num = 4; + char help[] = "-h"; + u32 dm_value[10] = {0}; PHYDM_SSCANF(input[1], DCMD_DECIMAL, &dm_value[0]); PHYDM_SSCANF(input[2], DCMD_DECIMAL, &dm_value[1]); @@ -661,20 +667,19 @@ phydm_hl_smart_ant_debug_type2( PHYDM_SSCANF(input[4], DCMD_DECIMAL, &dm_value[3]); PHYDM_SSCANF(input[5], DCMD_DECIMAL, &dm_value[4]); - if (strcmp(input[1], help) == 0) { PDM_SNPF(out_len, used, output + used, out_len - used, - " 1 {fix_en} {codeword(Hex)}\n"); + " 1 {fix_en} {codeword(Hex)}\n"); PDM_SNPF(out_len, used, output + used, out_len - used, - " 3 {Fix_training_num_en} {Per_beam_training_pkt_num} {Decision_holding_period}\n"); + " 3 {Fix_training_num_en} {Per_beam_training_pkt_num} {Decision_holding_period}\n"); PDM_SNPF(out_len, used, output + used, out_len - used, - " 5 {0:show, 1:2G, 2:5G} {beam_num} {idxA(Hex)} {idxB(Hex)}\n"); + " 5 {0:show, 1:2G, 2:5G} {beam_num} {idxA(Hex)} {idxB(Hex)}\n"); PDM_SNPF(out_len, used, output + used, out_len - used, - " 7 {0:show, 1:2G, 2:5G} {total_beam_set_num}\n"); + " 7 {0:show, 1:2G, 2:5G} {total_beam_set_num}\n"); PDM_SNPF(out_len, used, output + used, out_len - used, - " 8 {0:show, 1:set} {RFU delay time(us)}\n"); + " 8 {0:show, 1:set} {RFU delay time(us)}\n"); - } else if (dm_value[0] == 1) { /*fix beam pattern*/ + } else if (dm_value[0] == 1) { /*@fix beam pattern*/ sat_tab->fix_beam_pattern_en = dm_value[1]; @@ -682,73 +687,76 @@ phydm_hl_smart_ant_debug_type2( PHYDM_SSCANF(input[3], DCMD_HEX, &dm_value[2]); sat_tab->fix_beam_pattern_codeword = dm_value[2]; - if (sat_tab->fix_beam_pattern_codeword > (one << codeword_length)) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n", - sat_tab->fix_beam_pattern_codeword, codeword_length); - + if (sat_tab->fix_beam_pattern_codeword > (one << codeword_length)) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n", + sat_tab->fix_beam_pattern_codeword, + codeword_length); + (sat_tab->fix_beam_pattern_codeword) &= 0xffffff; - - PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Auto modify to (0x%x)\n", sat_tab->fix_beam_pattern_codeword); + + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ SmartAnt ] Auto modify to (0x%x)\n", + sat_tab->fix_beam_pattern_codeword); } sat_tab->update_beam_codeword = sat_tab->fix_beam_pattern_codeword; - /*---------------------------------------------------------*/ - PDM_SNPF(out_len, used, output + used, - out_len - used, "Fix Beam Pattern\n"); - - /*devide_num = (sat_tab->rfu_protocol_type == 2) ? 8 : 4;*/ - + /*@---------------------------------------------------------*/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "Fix Beam Pattern\n"); + + /*@devide_num = (sat_tab->rfu_protocol_type == 2) ? 8 : 4;*/ + for (i = 0; i <= (codeword_length - 1); i++) { beam_ctrl_signal = (boolean)((sat_tab->update_beam_codeword & BIT(i)) >> i); - if (i == (codeword_length - 1)) { + if (i == (codeword_length - 1)) PDM_SNPF(out_len, used, - output + used, - out_len - used, - "%d]\n", - beam_ctrl_signal); - /**/ - } else if (i == 0) { + output + used, + out_len - used, + "%d]\n", + beam_ctrl_signal); + else if (i == 0) PDM_SNPF(out_len, used, - output + used, - out_len - used, - "Send Codeword[1:%d] to RFU -> [%d", - sat_tab->rfu_codeword_total_bit_num, - beam_ctrl_signal); - /**/ - } else if ((i % devide_num) == (devide_num-1)) { + output + used, + out_len - used, + "Send Codeword[1:%d] to RFU -> [%d", + sat_tab->rfu_codeword_total_bit_num, + beam_ctrl_signal); + else if ((i % devide_num) == (devide_num - 1)) PDM_SNPF(out_len, used, - output + used, - out_len - used, "%d|", - beam_ctrl_signal); - /**/ - } else { + output + used, + out_len - used, "%d|", + beam_ctrl_signal); + else PDM_SNPF(out_len, used, - output + used, - out_len - used, "%d", - beam_ctrl_signal); - /**/ - } + output + used, + out_len - used, "%d", + beam_ctrl_signal); } - /*---------------------------------------------------------*/ +/*@---------------------------------------------------------*/ - - #if DEV_BUS_TYPE == RT_PCI_INTERFACE - phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); - #else +#if DEV_BUS_TYPE == RT_PCI_INTERFACE + if (dm->support_interface == ODM_ITRF_PCIE) + phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); +#endif +#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE + if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); +#if 0 /*odm_stall_execution(1);*/ - #endif +#endif +#endif } else if (sat_tab->fix_beam_pattern_en == 0) - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[ SmartAnt ] Smart Antenna: Enable\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[ SmartAnt ] Smart Antenna: Enable\n"); } else if (dm_value[0] == 2) { /*set latch time*/ sat_tab->latch_time = dm_value[1]; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] latch_time =0x%x\n", sat_tab->latch_time); + PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] latch_time =0x%x\n", + sat_tab->latch_time); } else if (dm_value[0] == 3) { sat_tab->fix_training_num_en = dm_value[1]; @@ -756,18 +764,15 @@ phydm_hl_smart_ant_debug_type2( sat_tab->per_beam_training_pkt_num = (u8)dm_value[2]; sat_tab->decision_holding_period = (u8)dm_value[3]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[SmtAnt] Fix_train_en = (( %d )), train_pkt_num = (( %d )), holding_period = (( %d )),\n", - sat_tab->fix_training_num_en, - sat_tab->per_beam_training_pkt_num, - sat_tab->decision_holding_period); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[SmtAnt] Fix_train_en = (( %d )), train_pkt_num = (( %d )), holding_period = (( %d )),\n", + sat_tab->fix_training_num_en, + sat_tab->per_beam_training_pkt_num, + sat_tab->decision_holding_period); } else if (sat_tab->fix_training_num_en == 0) { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[ SmartAnt ] AUTO per_beam_training_pkt_num\n"); - /**/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "[ SmartAnt ] AUTO per_beam_training_pkt_num\n"); } } else if (dm_value[0] == 4) { #if 0 @@ -784,163 +789,160 @@ phydm_hl_smart_ant_debug_type2( sat_tab->first_train_ant = MAIN_ANT; } - PDM_SNPF((output + used, out_len - used, "[ SmartAnt ] Set ant Num = (( %d )), first_train_ant = (( %d ))\n", - sat_tab->ant_num, (sat_tab->first_train_ant - 1))); + PDM_SNPF((output + used, out_len - used, + "[ SmartAnt ] Set ant Num = (( %d )), first_train_ant = (( %d ))\n", + sat_tab->ant_num, (sat_tab->first_train_ant - 1))); #endif - } else if (dm_value[0] == 5) { /*set beam set table*/ + } else if (dm_value[0] == 5) { /*set beam set table*/ PHYDM_SSCANF(input[4], DCMD_HEX, &dm_value[3]); PHYDM_SSCANF(input[5], DCMD_HEX, &dm_value[4]); - if (dm_value[1] == 1) { /*2G*/ + if (dm_value[1] == 1) { /*@2G*/ if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) { - sat_tab->rfu_codeword_table_2g[dm_value[2] ][0] = (u8)dm_value[3]; - sat_tab->rfu_codeword_table_2g[dm_value[2] ][1] = (u8)dm_value[4]; + sat_tab->rfu_codeword_table_2g[dm_value[2]][0] = (u8)dm_value[3]; + sat_tab->rfu_codeword_table_2g[dm_value[2]][1] = (u8)dm_value[4]; PDM_SNPF(out_len, used, output + used, - out_len - used, - "[SmtAnt] Set 2G Table[%d] = [A:0x%x, B:0x%x]\n", - dm_value[2], dm_value[3], - dm_value[4]); + out_len - used, + "[SmtAnt] Set 2G Table[%d] = [A:0x%x, B:0x%x]\n", + dm_value[2], dm_value[3], dm_value[4]); } - - } else if (dm_value[1] == 2) { /*5G*/ + + } else if (dm_value[1] == 2) { /*@5G*/ if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) { - sat_tab->rfu_codeword_table_5g[dm_value[2] ][0] = (u8)dm_value[3]; - sat_tab->rfu_codeword_table_5g[dm_value[2] ][1] = (u8)dm_value[4]; + sat_tab->rfu_codeword_table_5g[dm_value[2]][0] = (u8)dm_value[3]; + sat_tab->rfu_codeword_table_5g[dm_value[2]][1] = (u8)dm_value[4]; PDM_SNPF(out_len, used, output + used, - out_len - used, - "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n", - dm_value[2], dm_value[3], - dm_value[4]); + out_len - used, + "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n", + dm_value[2], dm_value[3], dm_value[4]); } - } else if (dm_value[1] == 0) { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[SmtAnt] 2G Beam Table==============>\n"); + } else if (dm_value[1] == 0) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[SmtAnt] 2G Beam Table==============>\n"); for (i = 0; i < sat_tab->total_beam_set_num_2g; i++) { PDM_SNPF(out_len, used, output + used, - out_len - used, - "2G Table[%d] = [A:0x%x, B:0x%x]\n", - i, - sat_tab->rfu_codeword_table_2g[i][0], - sat_tab->rfu_codeword_table_2g[i][1]); + out_len - used, + "2G Table[%d] = [A:0x%x, B:0x%x]\n", i, + sat_tab->rfu_codeword_table_2g[i][0], + sat_tab->rfu_codeword_table_2g[i][1]); } - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[SmtAnt] 5G Beam Table==============>\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[SmtAnt] 5G Beam Table==============>\n"); for (i = 0; i < sat_tab->total_beam_set_num_5g; i++) { PDM_SNPF(out_len, used, output + used, - out_len - used, - "5G Table[%d] = [A:0x%x, B:0x%x]\n", - i, - sat_tab->rfu_codeword_table_5g[i][0], - sat_tab->rfu_codeword_table_5g[i][1]); + out_len - used, + "5G Table[%d] = [A:0x%x, B:0x%x]\n", i, + sat_tab->rfu_codeword_table_5g[i][0], + sat_tab->rfu_codeword_table_5g[i][1]); } } } else if (dm_value[0] == 6) { - #if 0 +#if 0 if (dm_value[1] == 0) { if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) { sat_tab->rfu_codeword_table_5g[dm_value[2] ][0] = (u8)dm_value[3]; sat_tab->rfu_codeword_table_5g[dm_value[2] ][1] = (u8)dm_value[4]; - PDM_SNPF((output + used, out_len - used, "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n",dm_value[2], dm_value[3], dm_value[4])); + PDM_SNPF((output + used, out_len - used, + "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n", + dm_value[2], dm_value[3], + dm_value[4])); } } else { for (i = 0; i < sat_tab->total_beam_set_num_5g; i++) { - PDM_SNPF((output + used, out_len - used, "[SmtAnt] Read 5G Table[%d] = [A:0x%x, B:0x%x]\n", - i, sat_tab->rfu_codeword_table_5g[i][0], sat_tab->rfu_codeword_table_5g[i][1])); + PDM_SNPF((output + used, out_len - used, + "[SmtAnt] Read 5G Table[%d] = [A:0x%x, B:0x%x]\n", + i, + sat_tab->rfu_codeword_table_5g[i][0], + sat_tab->rfu_codeword_table_5g[i][1])); } } - #endif +#endif } else if (dm_value[0] == 7) { if (dm_value[1] == 1) { sat_tab->total_beam_set_num_2g = (u8)(dm_value[2]); - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[ SmartAnt ] total_beam_set_num_2g = ((%d))\n", - sat_tab->total_beam_set_num_2g); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[ SmartAnt ] total_beam_set_num_2g = ((%d))\n", + sat_tab->total_beam_set_num_2g); } else if (dm_value[1] == 2) { sat_tab->total_beam_set_num_5g = (u8)(dm_value[2]); - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[ SmartAnt ] total_beam_set_num_5g = ((%d))\n", - sat_tab->total_beam_set_num_5g); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[ SmartAnt ] total_beam_set_num_5g = ((%d))\n", + sat_tab->total_beam_set_num_5g); } else if (dm_value[1] == 0) { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[ SmartAnt ] Show total_beam_set_num{2g,5g} = {%d,%d}\n", - - sat_tab->total_beam_set_num_2g, - sat_tab->total_beam_set_num_5g); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[ SmartAnt ] Show total_beam_set_num{2g,5g} = {%d,%d}\n", + sat_tab->total_beam_set_num_2g, + sat_tab->total_beam_set_num_5g); } } else if (dm_value[0] == 8) { - if (dm_value[1] == 1) { - sat_tab->rfu_protocol_delay_time = (u16)(dm_value[2]); - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[SmtAnt] Set rfu_protocol_delay_time = ((%d))\n", - sat_tab->rfu_protocol_delay_time); - } else if (dm_value[1] == 0) { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[SmtAnt] Read rfu_protocol_delay_time = ((%d))\n", - sat_tab->rfu_protocol_delay_time); - } + if (dm_value[1] == 1) { + sat_tab->rfu_protocol_delay_time = (u16)(dm_value[2]); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[SmtAnt] Set rfu_protocol_delay_time = ((%d))\n", + sat_tab->rfu_protocol_delay_time); + } else if (dm_value[1] == 0) { + PDM_SNPF(out_len, used, output + used, out_len - used, + "[SmtAnt] Read rfu_protocol_delay_time = ((%d))\n", + sat_tab->rfu_protocol_delay_time); + } } *_used = used; *_out_len = out_len; } -void -phydm_set_rfu_beam_pattern_type2( - void *dm_void -) +void phydm_set_rfu_beam_pattern_type2( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; if (dm->ant_div_type != HL_SW_SMART_ANT_TYPE2) return; - PHYDM_DBG(dm, DBG_ANT_DIV, "Training beam_set index = (( 0x%x ))\n", sat_tab->fast_training_beam_num); + PHYDM_DBG(dm, DBG_ANT_DIV, "Training beam_set index = (( 0x%x ))\n", + sat_tab->fast_training_beam_num); sat_tab->update_beam_codeword = phydm_construct_hb_rfu_codeword_type2(dm, sat_tab->fast_training_beam_num); #if DEV_BUS_TYPE == RT_PCI_INTERFACE - phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); - #else - odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); + if (dm->support_interface == ODM_ITRF_PCIE) + phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); + #endif + #if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE + if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) + odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); +#if 0 /*odm_stall_execution(1);*/ +#endif #endif } -void -phydm_fast_ant_training_hl_smart_antenna_type2( - void *dm_void -) +void phydm_fast_ant_training_hl_smart_antenna_type2( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - u32 codeword = 0; - u8 i = 0, j=0; - u8 avg_rssi_tmp; - u8 avg_rssi_tmp_ma; - u8 max_beam_ant_rssi = 0; - u8 rssi_target_beam = 0, target_beam_max_rssi = 0; - u8 evm1ss_target_beam = 0, evm2ss_target_beam = 0; - u32 target_beam_max_evm1ss = 0, target_beam_max_evm2ss = 0; - u32 beam_tmp; - u8 per_beam_val_diff_tmp = 0, training_pkt_num_offset; - u32 avg_evm2ss[2] = {0}, avg_evm2ss_sum = 0; - u32 avg_evm1ss = 0; - u32 beam_path_evm_2ss_cnt_all = 0; /*sum of all 2SS-pattern cnt*/ - u32 beam_path_evm_1ss_cnt_all = 0; /*sum of all 1SS-pattern cnt*/ - u8 decision_type; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; + u32 codeword = 0; + u8 i = 0, j = 0; + u8 avg_rssi_tmp; + u8 avg_rssi_tmp_ma; + u8 max_beam_ant_rssi = 0; + u8 rssi_target_beam = 0, target_beam_max_rssi = 0; + u8 evm1ss_target_beam = 0, evm2ss_target_beam = 0; + u32 target_beam_max_evm1ss = 0, target_beam_max_evm2ss = 0; + u32 beam_tmp; + u8 per_beam_val_diff_tmp = 0, training_pkt_num_offset; + u32 avg_evm2ss[2] = {0}, avg_evm2ss_sum = 0; + u32 avg_evm1ss = 0; + u32 beam_path_evm_2ss_cnt_all = 0; /*sum of all 2SS-pattern cnt*/ + u32 beam_path_evm_1ss_cnt_all = 0; /*sum of all 1SS-pattern cnt*/ + u8 decision_type; if (!dm->is_linked) { PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n"); @@ -949,7 +951,9 @@ phydm_fast_ant_training_hl_smart_antenna_type2( sat_tab->decision_holding_period = 0; PHYDM_DBG(dm, DBG_ANT_DIV, "Link->no Link\n"); fat_tab->fat_state = FAT_BEFORE_LINK_STATE; - PHYDM_DBG(dm, DBG_ANT_DIV, "change to (( %d )) FAT_state\n", fat_tab->fat_state); + PHYDM_DBG(dm, DBG_ANT_DIV, + "change to (( %d )) FAT_state\n", + fat_tab->fat_state); fat_tab->is_become_linked = dm->is_linked; } return; @@ -959,7 +963,9 @@ phydm_fast_ant_training_hl_smart_antenna_type2( PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n"); fat_tab->fat_state = FAT_PREPARE_STATE; - PHYDM_DBG(dm, DBG_ANT_DIV, "change to (( %d )) FAT_state\n", fat_tab->fat_state); + PHYDM_DBG(dm, DBG_ANT_DIV, + "change to (( %d )) FAT_state\n", + fat_tab->fat_state); /*sat_tab->fast_training_beam_num = 0;*/ /*phydm_set_rfu_beam_pattern_type2(dm);*/ @@ -968,19 +974,20 @@ phydm_fast_ant_training_hl_smart_antenna_type2( } } - +#if 0 /*PHYDM_DBG(dm, DBG_ANT_DIV, "HL Smart ant Training: state (( %d ))\n", fat_tab->fat_state);*/ +#endif - /* [DECISION STATE] */ - /*=======================================================================================*/ + /* @[DECISION STATE] */ + /*@=======================================================================================*/ if (fat_tab->fat_state == FAT_DECISION_STATE) { PHYDM_DBG(dm, DBG_ANT_DIV, "[ 3. In Decision state]\n"); - /*compute target beam in each antenna*/ + /*@compute target beam in each antenna*/ for (j = 0; j < (sat_tab->total_beam_set_num); j++) { - /*[Decision1: RSSI]-------------------------------------------------------------------*/ - if (sat_tab->statistic_pkt_cnt[j] == 0) { /*if new RSSI = 0 -> MA_RSSI-=2*/ + /*@[Decision1: RSSI]-------------------------------------------------------------------*/ + if (sat_tab->statistic_pkt_cnt[j] == 0) { /*@if new RSSI = 0 -> MA_RSSI-=2*/ avg_rssi_tmp = sat_tab->beam_set_avg_rssi_pre[j]; avg_rssi_tmp = (avg_rssi_tmp >= 2) ? (avg_rssi_tmp - 2) : avg_rssi_tmp; avg_rssi_tmp_ma = avg_rssi_tmp; @@ -996,10 +1003,10 @@ phydm_fast_ant_training_hl_smart_antenna_type2( target_beam_max_rssi = avg_rssi_tmp; } - /*[Decision2: EVM 2ss]-------------------------------------------------------------------*/ + /*@[Decision2: EVM 2ss]-------------------------------------------------------------------*/ if (sat_tab->beam_path_evm_2ss_cnt[j] != 0) { - avg_evm2ss[0] = sat_tab->beam_path_evm_2ss_sum[j][0] / sat_tab->beam_path_evm_2ss_cnt[j]; - avg_evm2ss[1] = sat_tab->beam_path_evm_2ss_sum[j][1] / sat_tab->beam_path_evm_2ss_cnt[j]; + avg_evm2ss[0] = sat_tab->beam_path_evm_2ss_sum[j][0] / sat_tab->beam_path_evm_2ss_cnt[j]; + avg_evm2ss[1] = sat_tab->beam_path_evm_2ss_sum[j][1] / sat_tab->beam_path_evm_2ss_cnt[j]; avg_evm2ss_sum = avg_evm2ss[0] + avg_evm2ss[1]; beam_path_evm_2ss_cnt_all += sat_tab->beam_path_evm_2ss_cnt[j]; @@ -1011,40 +1018,49 @@ phydm_fast_ant_training_hl_smart_antenna_type2( target_beam_max_evm2ss = avg_evm2ss_sum; } - /*[Decision3: EVM 1ss]-------------------------------------------------------------------*/ + /*@[Decision3: EVM 1ss]-------------------------------------------------------------------*/ if (sat_tab->beam_path_evm_1ss_cnt[j] != 0) { - avg_evm1ss = sat_tab->beam_path_evm_1ss_sum[j] / sat_tab->beam_path_evm_1ss_cnt[j]; + avg_evm1ss = sat_tab->beam_path_evm_1ss_sum[j] / sat_tab->beam_path_evm_1ss_cnt[j]; beam_path_evm_1ss_cnt_all += sat_tab->beam_path_evm_1ss_cnt[j]; sat_tab->beam_set_avg_evm_1ss_pre[j] = (u8)avg_evm1ss; } - + if (avg_evm1ss > target_beam_max_evm1ss) { evm1ss_target_beam = j; target_beam_max_evm1ss = avg_evm1ss; } - PHYDM_DBG(dm, DBG_ANT_DIV, "Beam[%d] Pkt_cnt=(( %d )), avg{MA,rssi}={%d, %d}, EVM1={%d}, EVM2={%d, %d, %d}\n", - j, sat_tab->statistic_pkt_cnt[j], avg_rssi_tmp_ma, avg_rssi_tmp, avg_evm1ss, avg_evm2ss[0], avg_evm2ss[1], avg_evm2ss_sum); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Beam[%d] Pkt_cnt=(( %d )), avg{MA,rssi}={%d, %d}, EVM1={%d}, EVM2={%d, %d, %d}\n", + j, sat_tab->statistic_pkt_cnt[j], + avg_rssi_tmp_ma, avg_rssi_tmp, avg_evm1ss, + avg_evm2ss[0], avg_evm2ss[1], avg_evm2ss_sum); /*reset counter value*/ sat_tab->beam_set_rssi_avg_sum[j] = 0; sat_tab->beam_path_rssi_sum[j][0] = 0; sat_tab->beam_path_rssi_sum[j][1] = 0; sat_tab->statistic_pkt_cnt[j] = 0; - + sat_tab->beam_path_evm_2ss_sum[j][0] = 0; sat_tab->beam_path_evm_2ss_sum[j][1] = 0; sat_tab->beam_path_evm_2ss_cnt[j] = 0; - + sat_tab->beam_path_evm_1ss_sum[j] = 0; sat_tab->beam_path_evm_1ss_cnt[j] = 0; } - - /*[Joint Decision]-------------------------------------------------------------------*/ - PHYDM_DBG(dm, DBG_ANT_DIV, "--->1.[RSSI] Target Beam(( %d )) RSSI_max=((%d))\n", rssi_target_beam, target_beam_max_rssi); - PHYDM_DBG(dm, DBG_ANT_DIV, "--->2.[Evm2SS] Target Beam(( %d )) EVM2SS_max=((%d))\n", evm2ss_target_beam, target_beam_max_evm2ss); - PHYDM_DBG(dm, DBG_ANT_DIV, "--->3.[Evm1SS] Target Beam(( %d )) EVM1SS_max=((%d))\n", evm1ss_target_beam, target_beam_max_evm1ss); + + /*@[Joint Decision]-------------------------------------------------------------------*/ + PHYDM_DBG(dm, DBG_ANT_DIV, + "--->1.[RSSI] Target Beam(( %d )) RSSI_max=((%d))\n", + rssi_target_beam, target_beam_max_rssi); + PHYDM_DBG(dm, DBG_ANT_DIV, + "--->2.[Evm2SS] Target Beam(( %d )) EVM2SS_max=((%d))\n", + evm2ss_target_beam, target_beam_max_evm2ss); + PHYDM_DBG(dm, DBG_ANT_DIV, + "--->3.[Evm1SS] Target Beam(( %d )) EVM1SS_max=((%d))\n", + evm1ss_target_beam, target_beam_max_evm1ss); if (target_beam_max_rssi <= 10) { sat_tab->rx_idle_beam_set_idx = rssi_target_beam; @@ -1062,33 +1078,38 @@ phydm_fast_ant_training_hl_smart_antenna_type2( } } - PHYDM_DBG(dm, DBG_ANT_DIV, "---> Decision_type=((%d)), Final Target Beam(( %d ))\n", decision_type, sat_tab->rx_idle_beam_set_idx); + PHYDM_DBG(dm, DBG_ANT_DIV, + "---> Decision_type=((%d)), Final Target Beam(( %d ))\n", + decision_type, sat_tab->rx_idle_beam_set_idx); - /*Calculate packet counter offset*/ + /*@Calculate packet counter offset*/ for (j = 0; j < (sat_tab->total_beam_set_num); j++) { if (decision_type == 1) { per_beam_val_diff_tmp = target_beam_max_rssi - sat_tab->beam_set_avg_rssi_pre[j]; - + } else if (decision_type == 2) { per_beam_val_diff_tmp = ((u8)target_beam_max_evm2ss - sat_tab->beam_set_avg_evm_2ss_pre[j]) >> 1; } else if (decision_type == 3) { per_beam_val_diff_tmp = (u8)target_beam_max_evm1ss - sat_tab->beam_set_avg_evm_1ss_pre[j]; } sat_tab->beam_set_train_val_diff[j] = per_beam_val_diff_tmp; - PHYDM_DBG(dm, DBG_ANT_DIV, "Beam_Set[%d]: diff= ((%d))\n", j, per_beam_val_diff_tmp); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Beam_Set[%d]: diff= ((%d))\n", j, + per_beam_val_diff_tmp); } /*set beam in each antenna*/ phydm_update_rx_idle_beam_type2(dm); fat_tab->fat_state = FAT_PREPARE_STATE; - } - /* [TRAINING STATE] */ + /* @[TRAINING STATE] */ else if (fat_tab->fat_state == FAT_TRAINING_STATE) { PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2. In Training state]\n"); - PHYDM_DBG(dm, DBG_ANT_DIV, "curr_beam_idx = (( %d )), pre_beam_idx = (( %d ))\n", - sat_tab->fast_training_beam_num, sat_tab->pre_fast_training_beam_num); + PHYDM_DBG(dm, DBG_ANT_DIV, + "curr_beam_idx = (( %d )), pre_beam_idx = (( %d ))\n", + sat_tab->fast_training_beam_num, + sat_tab->pre_fast_training_beam_num); if (sat_tab->fast_training_beam_num > sat_tab->pre_fast_training_beam_num) @@ -1100,30 +1121,37 @@ phydm_fast_ant_training_hl_smart_antenna_type2( sat_tab->pkt_counter = 0; beam_tmp = sat_tab->fast_training_beam_num; if (sat_tab->fast_training_beam_num >= ((u32)sat_tab->total_beam_set_num - 1)) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Timeout Update] Beam_num (( %d )) -> (( decision ))\n", sat_tab->fast_training_beam_num); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Timeout Update] Beam_num (( %d )) -> (( decision ))\n", + sat_tab->fast_training_beam_num); fat_tab->fat_state = FAT_DECISION_STATE; phydm_fast_ant_training_hl_smart_antenna_type2(dm); } else { sat_tab->fast_training_beam_num++; - PHYDM_DBG(dm, DBG_ANT_DIV, "[Timeout Update] Beam_num (( %d )) -> (( %d ))\n", beam_tmp, sat_tab->fast_training_beam_num); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Timeout Update] Beam_num (( %d )) -> (( %d ))\n", + beam_tmp, + sat_tab->fast_training_beam_num); phydm_set_rfu_beam_pattern_type2(dm); fat_tab->fat_state = FAT_TRAINING_STATE; - } } sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num; - PHYDM_DBG(dm, DBG_ANT_DIV, "Update Pre_Beam =(( %d ))\n", sat_tab->pre_fast_training_beam_num); + PHYDM_DBG(dm, DBG_ANT_DIV, "Update Pre_Beam =(( %d ))\n", + sat_tab->pre_fast_training_beam_num); } - /* [Prepare state] */ - /*=======================================================================================*/ + /* @[Prepare state] */ + /*@=======================================================================================*/ else if (fat_tab->fat_state == FAT_PREPARE_STATE) { PHYDM_DBG(dm, DBG_ANT_DIV, "\n\n[ 1. In Prepare state]\n"); - if (dm->pre_traffic_load == (dm->traffic_load)) { + if (dm->pre_traffic_load == dm->traffic_load) { if (sat_tab->decision_holding_period != 0) { - PHYDM_DBG(dm, DBG_ANT_DIV, "Holding_period = (( %d )), return!!!\n", sat_tab->decision_holding_period); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Holding_period = (( %d )), return!!!\n", + sat_tab->decision_holding_period); sat_tab->decision_holding_period--; return; } @@ -1152,132 +1180,148 @@ phydm_fast_ant_training_hl_smart_antenna_type2( break; } } - - PHYDM_DBG(dm, DBG_ANT_DIV, "TrafficLoad = (( %d )), Fix_beam = (( %d )), per_beam_training_pkt_num = (( %d )), decision_holding_period = ((%d))\n", - dm->traffic_load, sat_tab->fix_training_num_en, sat_tab->per_beam_training_pkt_num, sat_tab->decision_holding_period); - /*Beam_set number*/ + PHYDM_DBG(dm, DBG_ANT_DIV, + "TrafficLoad = (( %d )), Fix_beam = (( %d )), per_beam_training_pkt_num = (( %d )), decision_holding_period = ((%d))\n", + dm->traffic_load, sat_tab->fix_training_num_en, + sat_tab->per_beam_training_pkt_num, + sat_tab->decision_holding_period); + + /*@Beam_set number*/ if (*dm->band_type == ODM_BAND_5G) { sat_tab->total_beam_set_num = sat_tab->total_beam_set_num_5g; - PHYDM_DBG(dm, DBG_ANT_DIV, "5G beam_set num = ((%d))\n", sat_tab->total_beam_set_num); + PHYDM_DBG(dm, DBG_ANT_DIV, "5G beam_set num = ((%d))\n", + sat_tab->total_beam_set_num); } else { sat_tab->total_beam_set_num = sat_tab->total_beam_set_num_2g; - PHYDM_DBG(dm, DBG_ANT_DIV, "2G beam_set num = ((%d))\n", sat_tab->total_beam_set_num); + PHYDM_DBG(dm, DBG_ANT_DIV, "2G beam_set num = ((%d))\n", + sat_tab->total_beam_set_num); } for (j = 0; j < (sat_tab->total_beam_set_num); j++) { training_pkt_num_offset = sat_tab->beam_set_train_val_diff[j]; - if ((sat_tab->per_beam_training_pkt_num) > training_pkt_num_offset) + if (sat_tab->per_beam_training_pkt_num > training_pkt_num_offset) sat_tab->beam_set_train_cnt[j] = sat_tab->per_beam_training_pkt_num - training_pkt_num_offset; else sat_tab->beam_set_train_cnt[j] = 1; - PHYDM_DBG(dm, DBG_ANT_DIV, "Beam_Set[ %d ] training_pkt_offset = ((%d)), training_pkt_num = ((%d))\n", - j, sat_tab->beam_set_train_val_diff[j], sat_tab->beam_set_train_cnt[j]); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Beam_Set[ %d ] training_pkt_offset = ((%d)), training_pkt_num = ((%d))\n", + j, sat_tab->beam_set_train_val_diff[j], + sat_tab->beam_set_train_cnt[j]); } - + sat_tab->pre_beacon_counter = sat_tab->beacon_counter; sat_tab->update_beam_idx = 0; sat_tab->pkt_counter = 0; - + sat_tab->fast_training_beam_num = 0; phydm_set_rfu_beam_pattern_type2(dm); sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num; fat_tab->fat_state = FAT_TRAINING_STATE; } - } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -phydm_beam_switch_workitem_callback( - void *context -) +void phydm_beam_switch_workitem_callback( + void *context) { - void *adapter = (void *)context; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + void *adapter = (void *)context; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; #if DEV_BUS_TYPE != RT_PCI_INTERFACE sat_tab->pkt_skip_statistic_en = 1; #endif - PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n", sat_tab->pkt_skip_statistic_en); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n", + sat_tab->pkt_skip_statistic_en); phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); #if DEV_BUS_TYPE != RT_PCI_INTERFACE +#if 0 /*odm_stall_execution(sat_tab->latch_time);*/ +#endif sat_tab->pkt_skip_statistic_en = 0; #endif - PHYDM_DBG(dm, DBG_ANT_DIV, "pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n", sat_tab->pkt_skip_statistic_en, sat_tab->latch_time); + PHYDM_DBG(dm, DBG_ANT_DIV, + "pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n", + sat_tab->pkt_skip_statistic_en, sat_tab->latch_time); } -void -phydm_beam_decision_workitem_callback( - void *context -) +void phydm_beam_decision_workitem_callback( + void *context) { - void *adapter = (void *)context; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; + void *adapter = (void *)context; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Beam decision Workitem Callback\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ SmartAnt ] Beam decision Workitem Callback\n"); phydm_fast_ant_training_hl_smart_antenna_type2(dm); } #endif -void -phydm_process_rssi_for_hb_smtant_type2( - void *dm_void, - void *phy_info_void, - void *pkt_info_void, - u8 rssi_avg -) +void phydm_process_rssi_for_hb_smtant_type2( + void *dm_void, + void *phy_info_void, + void *pkt_info_void, + u8 rssi_avg) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_phyinfo_struct *phy_info = (struct phydm_phyinfo_struct *)phy_info_void; - struct phydm_perpkt_info_struct *pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - u8 train_pkt_number; - u32 beam_tmp; - u8 rx_power_ant0 = phy_info->rx_mimo_signal_strength[0]; - u8 rx_power_ant1 = phy_info->rx_mimo_signal_strength[1]; - u8 rx_evm_ant0 = phy_info->rx_mimo_evm_dbm[0]; - u8 rx_evm_ant1 = phy_info->rx_mimo_evm_dbm[1]; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_phyinfo_struct *phy_info = (struct phydm_phyinfo_struct *)phy_info_void; + struct phydm_perpkt_info_struct *pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + u8 train_pkt_number; + u32 beam_tmp; + u8 rx_power_ant0 = phy_info->rx_mimo_signal_strength[0]; + u8 rx_power_ant1 = phy_info->rx_mimo_signal_strength[1]; + u8 rx_evm_ant0 = phy_info->rx_mimo_evm_dbm[0]; + u8 rx_evm_ant1 = phy_info->rx_mimo_evm_dbm[1]; - /*[Beacon]*/ + /*@[Beacon]*/ if (pktinfo->is_packet_beacon) { sat_tab->beacon_counter++; - PHYDM_DBG(dm, DBG_ANT_DIV, "MatchBSSID_beacon_counter = ((%d))\n", sat_tab->beacon_counter); + PHYDM_DBG(dm, DBG_ANT_DIV, + "MatchBSSID_beacon_counter = ((%d))\n", + sat_tab->beacon_counter); if (sat_tab->beacon_counter >= sat_tab->pre_beacon_counter + 2) { sat_tab->update_beam_idx++; - PHYDM_DBG(dm, DBG_ANT_DIV, "pre_beacon_counter = ((%d)), pkt_counter = ((%d)), update_beam_idx = ((%d))\n", - sat_tab->pre_beacon_counter, sat_tab->pkt_counter, sat_tab->update_beam_idx); - + PHYDM_DBG(dm, DBG_ANT_DIV, + "pre_beacon_counter = ((%d)), pkt_counter = ((%d)), update_beam_idx = ((%d))\n", + sat_tab->pre_beacon_counter, + sat_tab->pkt_counter, + sat_tab->update_beam_idx); + sat_tab->pre_beacon_counter = sat_tab->beacon_counter; sat_tab->pkt_counter = 0; } } - /*[data]*/ + /*@[data]*/ else if (pktinfo->is_packet_to_self) { if (sat_tab->pkt_skip_statistic_en == 0) { - PHYDM_DBG(dm, DBG_ANT_DIV, "ID[%d] pkt_cnt=((%d)): Beam_set = ((%d)), RSSI{A,B,avg} = {%d, %d, %d}\n", - pktinfo->station_id, sat_tab->pkt_counter, sat_tab->fast_training_beam_num, rx_power_ant0, rx_power_ant1, rssi_avg); + PHYDM_DBG(dm, DBG_ANT_DIV, + "ID[%d] pkt_cnt=((%d)): Beam_set = ((%d)), RSSI{A,B,avg} = {%d, %d, %d}\n", + pktinfo->station_id, sat_tab->pkt_counter, + sat_tab->fast_training_beam_num, + rx_power_ant0, rx_power_ant1, rssi_avg); - PHYDM_DBG(dm, DBG_ANT_DIV, "Rate_ss = ((%d)), EVM{A,B} = {%d, %d}, RX Rate =", pktinfo->rate_ss, rx_evm_ant0, rx_evm_ant1); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Rate_ss = ((%d)), EVM{A,B} = {%d, %d}, RX Rate =", + pktinfo->rate_ss, rx_evm_ant0, rx_evm_ant1); phydm_print_rate(dm, dm->rx_rate, DBG_ANT_DIV); - - if (sat_tab->pkt_counter >= 1) /*packet skip count*/ + if (sat_tab->pkt_counter >= 1) /*packet skip count*/ { sat_tab->beam_set_rssi_avg_sum[sat_tab->fast_training_beam_num] += rssi_avg; sat_tab->statistic_pkt_cnt[sat_tab->fast_training_beam_num]++; - + sat_tab->beam_path_rssi_sum[sat_tab->fast_training_beam_num][0] += rx_power_ant0; sat_tab->beam_path_rssi_sum[sat_tab->fast_training_beam_num][1] += rx_power_ant1; @@ -1290,16 +1334,18 @@ phydm_process_rssi_for_hb_smtant_type2( sat_tab->beam_path_evm_1ss_cnt[sat_tab->fast_training_beam_num]++; } } - + sat_tab->pkt_counter++; train_pkt_number = sat_tab->beam_set_train_cnt[sat_tab->fast_training_beam_num]; if (sat_tab->pkt_counter >= train_pkt_number) { sat_tab->update_beam_idx++; - PHYDM_DBG(dm, DBG_ANT_DIV, "pre_beacon_counter = ((%d)), Update_new_beam = ((%d))\n", - sat_tab->pre_beacon_counter, sat_tab->update_beam_idx); - + PHYDM_DBG(dm, DBG_ANT_DIV, + "pre_beacon_counter = ((%d)), Update_new_beam = ((%d))\n", + sat_tab->pre_beacon_counter, + sat_tab->update_beam_idx); + sat_tab->pre_beacon_counter = sat_tab->beacon_counter; sat_tab->pkt_counter = 0; } @@ -1307,78 +1353,81 @@ phydm_process_rssi_for_hb_smtant_type2( } if (sat_tab->update_beam_idx > 0) { - sat_tab->update_beam_idx = 0; if (sat_tab->fast_training_beam_num >= ((u32)sat_tab->total_beam_set_num - 1)) { fat_tab->fat_state = FAT_DECISION_STATE; #if DEV_BUS_TYPE == RT_PCI_INTERFACE - phydm_fast_ant_training_hl_smart_antenna_type2(dm); /*go to make decision*/ - #else - odm_schedule_work_item(&sat_tab->hl_smart_antenna_decision_workitem); + if (dm->support_interface == ODM_ITRF_PCIE) + phydm_fast_ant_training_hl_smart_antenna_type2(dm); /*@go to make decision*/ + #endif + #if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE + if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) + odm_schedule_work_item(&sat_tab->hl_smart_antenna_decision_workitem); #endif - } else { beam_tmp = sat_tab->fast_training_beam_num; sat_tab->fast_training_beam_num++; - PHYDM_DBG(dm, DBG_ANT_DIV, "Update Beam_num (( %d )) -> (( %d ))\n", beam_tmp, sat_tab->fast_training_beam_num); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Update Beam_num (( %d )) -> (( %d ))\n", + beam_tmp, sat_tab->fast_training_beam_num); phydm_set_rfu_beam_pattern_type2(dm); sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num; fat_tab->fat_state = FAT_TRAINING_STATE; } } - } #endif #if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) -void -phydm_hl_smart_ant_type1_init_8821a( - void *dm_void -) +void phydm_hl_smart_ant_type1_init_8821a( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - u32 value32; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + u32 value32; - PHYDM_DBG(dm, DBG_ANT_DIV, "***8821A SmartAnt_Init => ant_div_type=[Hong-Lin Smart ant Type1]\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "***8821A SmartAnt_Init => ant_div_type=[Hong-Lin Smart ant Type1]\n"); #if 0 - /* ---------------------------------------- */ - /* GPIO 2-3 for Beam control */ + /* @---------------------------------------- */ + /* @GPIO 2-3 for Beam control */ /* reg0x66[2]=0 */ /* reg0x44[27:26] = 0 */ /* reg0x44[23:16] enable_output for P_GPIO[7:0] */ /* reg0x44[15:8] output_value for P_GPIO[7:0] */ /* reg0x40[1:0] = 0 GPIO function */ - /* ------------------------------------------ */ + /* @------------------------------------------ */ #endif - /*GPIO setting*/ - odm_set_mac_reg(dm, 0x64, BIT(18), 0); - odm_set_mac_reg(dm, 0x44, BIT(27) | BIT(26), 0); - odm_set_mac_reg(dm, 0x44, BIT(19) | BIT(18), 0x3); /*enable_output for P_GPIO[3:2]*/ - /*odm_set_mac_reg(dm, 0x44, BIT(11)|BIT(10), 0);*/ /*output value*/ - odm_set_mac_reg(dm, 0x40, BIT(1) | BIT(0), 0); /*GPIO function*/ + /*@GPIO setting*/ + odm_set_mac_reg(dm, R_0x64, BIT(18), 0); + odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); + odm_set_mac_reg(dm, R_0x44, BIT(19) | BIT(18), 0x3); /*@enable_output for P_GPIO[3:2]*/ +#if 0 + /*odm_set_mac_reg(dm, R_0x44, BIT(11)|BIT(10), 0);*/ /*output value*/ +#endif + odm_set_mac_reg(dm, R_0x40, BIT(1) | BIT(0), 0); /*@GPIO function*/ - /*Hong_lin smart antenna HW setting*/ - sat_tab->rfu_codeword_total_bit_num = 24;/*max=32*/ + /*@Hong_lin smart antenna HW setting*/ + sat_tab->rfu_codeword_total_bit_num = 24; /*@max=32*/ sat_tab->rfu_each_ant_bit_num = 4; sat_tab->beam_patten_num_each_ant = 4; #if DEV_BUS_TYPE == RT_SDIO_INTERFACE - sat_tab->latch_time = 100; /*mu sec*/ + sat_tab->latch_time = 100; /*@mu sec*/ #elif DEV_BUS_TYPE == RT_USB_INTERFACE - sat_tab->latch_time = 100; /*mu sec*/ + sat_tab->latch_time = 100; /*@mu sec*/ #endif sat_tab->pkt_skip_statistic_en = 0; - sat_tab->ant_num = 1;/*max=8*/ + sat_tab->ant_num = 1; /*@max=8*/ sat_tab->ant_num_total = NUM_ANTENNA_8821A; sat_tab->first_train_ant = MAIN_ANT; @@ -1392,10 +1441,10 @@ phydm_hl_smart_ant_type1_init_8821a( sat_tab->rfu_codeword_table_5g[2] = 0x4; sat_tab->rfu_codeword_table_5g[3] = 0x8; - sat_tab->fix_beam_pattern_en = 0; + sat_tab->fix_beam_pattern_en = 0; sat_tab->decision_holding_period = 0; - /*beam training setting*/ + /*@beam training setting*/ sat_tab->pkt_counter = 0; sat_tab->per_beam_training_pkt_num = 10; @@ -1406,43 +1455,41 @@ phydm_hl_smart_ant_type1_init_8821a( fat_tab->fat_state = FAT_BEFORE_LINK_STATE; - odm_set_bb_reg(dm, 0xCA4, MASKDWORD, 0x01000100); - odm_set_bb_reg(dm, 0xCA8, MASKDWORD, 0x01000100); + odm_set_bb_reg(dm, R_0xca4, MASKDWORD, 0x01000100); + odm_set_bb_reg(dm, R_0xca8, MASKDWORD, 0x01000100); - /*[BB] FAT setting*/ - odm_set_bb_reg(dm, 0xc08, BIT(18) | BIT(17) | BIT(16), sat_tab->ant_num); - odm_set_bb_reg(dm, 0xc08, BIT(31), 0); /*increase ant num every FAT period 0:+1, 1+2*/ - odm_set_bb_reg(dm, 0x8c4, BIT(2) | BIT(1), 1); /*change cca antenna timming threshold if no CCA occurred: 0:200ms / 1:100ms / 2:no use / 3: 300*/ - odm_set_bb_reg(dm, 0x8c4, BIT(0), 1); /*FAT_watchdog_en*/ + /*@[BB] FAT setting*/ + odm_set_bb_reg(dm, R_0xc08, BIT(18) | BIT(17) | BIT(16), sat_tab->ant_num); + odm_set_bb_reg(dm, R_0xc08, BIT(31), 0); /*@increase ant num every FAT period 0:+1, 1+2*/ + odm_set_bb_reg(dm, R_0x8c4, BIT(2) | BIT(1), 1); /*@change cca antenna timming threshold if no CCA occurred: 0:200ms / 1:100ms / 2:no use / 3: 300*/ + odm_set_bb_reg(dm, R_0x8c4, BIT(0), 1); /*@FAT_watchdog_en*/ - value32 = odm_get_mac_reg(dm, 0x7B4, MASKDWORD); - odm_set_mac_reg(dm, 0x7b4, MASKDWORD, value32 | (BIT(16) | BIT(17))); /*Reg7B4[16]=1 enable antenna training */ + value32 = odm_get_mac_reg(dm, R_0x7b4, MASKDWORD); + odm_set_mac_reg(dm, R_0x7b4, MASKDWORD, value32 | (BIT(16) | BIT(17))); /*Reg7B4[16]=1 enable antenna training */ /*Reg7B4[17]=1 enable match MAC addr*/ - odm_set_mac_reg(dm, 0x7b4, 0xFFFF, 0);/*Match MAC ADDR*/ - odm_set_mac_reg(dm, 0x7b0, MASKDWORD, 0); - + odm_set_mac_reg(dm, R_0x7b4, 0xFFFF, 0); /*@Match MAC ADDR*/ + odm_set_mac_reg(dm, R_0x7b0, MASKDWORD, 0); } -u32 -phydm_construct_hl_beam_codeword( - void *dm_void, - u32 *beam_pattern_idx, - u32 ant_num -) +u32 phydm_construct_hl_beam_codeword( + void *dm_void, + u32 *beam_pattern_idx, + u32 ant_num) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - u32 codeword = 0; - u32 data_tmp; - u32 i; - u32 break_counter = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + u32 codeword = 0; + u32 data_tmp; + u32 i; + u32 break_counter = 0; if (ant_num < 8) { for (i = 0; i < (sat_tab->ant_num_total); i++) { +#if 0 /*PHYDM_DBG(dm,DBG_ANT_DIV, "beam_pattern_num[%x] = %x\n",i,beam_pattern_num[i] );*/ - if ((i < (sat_tab->first_train_ant - 1)) || (break_counter >= (sat_tab->ant_num))) { +#endif + if ((i < (sat_tab->first_train_ant - 1)) || break_counter >= sat_tab->ant_num) { data_tmp = 0; - /**/ } else { break_counter++; @@ -1472,35 +1519,34 @@ phydm_construct_hl_beam_codeword( } } - codeword |= (data_tmp << (i * 4)); - } } return codeword; } -void -phydm_update_beam_pattern( - void *dm_void, - u32 codeword, - u32 codeword_length -) +void phydm_update_beam_pattern( + void *dm_void, + u32 codeword, + u32 codeword_length) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - u8 i; - boolean beam_ctrl_signal; - u32 one = 0x1; - u32 reg44_tmp_p, reg44_tmp_n, reg44_ori; - u8 devide_num = 4; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + u8 i; + boolean beam_ctrl_signal; + u32 one = 0x1; + u32 reg44_tmp_p, reg44_tmp_n, reg44_ori; + u8 devide_num = 4; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Set Beam Pattern =0x%x\n", codeword); + PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Set Beam Pattern =0x%x\n", + codeword); - reg44_ori = odm_get_mac_reg(dm, 0x44, MASKDWORD); + reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); reg44_tmp_p = reg44_ori; +#if 0 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_ori =0x%x\n", reg44_ori);*/ +#endif devide_num = (sat_tab->rfu_protocol_type == 2) ? 6 : 4; @@ -1508,54 +1554,54 @@ phydm_update_beam_pattern( beam_ctrl_signal = (boolean)((codeword & BIT(i)) >> i); if (dm->debug_components & DBG_ANT_DIV) { - if (i == (codeword_length - 1)) { + if (i == (codeword_length - 1)) pr_debug("%d ]\n", beam_ctrl_signal); - /**/ - } else if (i == 0) { + else if (i == 0) pr_debug("Send codeword[1:%d] ---> [ %d ", codeword_length, beam_ctrl_signal); - /**/ - } else if ((i % devide_num) == (devide_num-1)) { + else if ((i % devide_num) == (devide_num - 1)) pr_debug("%d | ", beam_ctrl_signal); - /**/ - } else { + else pr_debug("%d ", beam_ctrl_signal); - /**/ - } } if (dm->support_ic_type == ODM_RTL8821) { #if (RTL8821A_SUPPORT == 1) - reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT(10))); /*clean bit 10 & 11*/ + reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT(10))); /*@clean bit 10 & 11*/ reg44_tmp_p |= ((1 << 11) | (beam_ctrl_signal << 10)); reg44_tmp_n = reg44_ori & (~(BIT(11) | BIT(10))); +#if 0 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n);*/ - odm_set_mac_reg(dm, 0x44, MASKDWORD, reg44_tmp_p); - odm_set_mac_reg(dm, 0x44, MASKDWORD, reg44_tmp_n); +#endif + odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); + odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); #endif } #if (RTL8822B_SUPPORT == 1) else if (dm->support_ic_type == ODM_RTL8822B) { if (sat_tab->rfu_protocol_type == 2) { - reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*clean bit 8*/ - reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*get new clk high/low, exclusive-or*/ + reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*@clean bit 8*/ + reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*@get new clk high/low, exclusive-or*/ - reg44_tmp_p |= (beam_ctrl_signal << 8); - - odm_set_mac_reg(dm, 0x44, MASKDWORD, reg44_tmp_p); + + odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); ODM_delay_us(10); +#if 0 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44 =(( 0x%x )), reg44[9:8] = ((%x)), beam_ctrl_signal =((%x))\n", reg44_tmp_p, ((reg44_tmp_p & 0x300)>>8), beam_ctrl_signal);*/ - +#endif + } else { - reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT(8))); /*clean bit 9 & 8*/ + reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT(8))); /*@clean bit 9 & 8*/ reg44_tmp_p |= ((1 << 9) | (beam_ctrl_signal << 8)); reg44_tmp_n = reg44_ori & (~(BIT(9) | BIT(8))); +#if 0 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n); */ - odm_set_mac_reg(dm, 0x44, MASKDWORD, reg44_tmp_p); +#endif + odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); ODM_delay_us(10); - odm_set_mac_reg(dm, 0x44, MASKDWORD, reg44_tmp_n); + odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); ODM_delay_us(10); } } @@ -1563,128 +1609,133 @@ phydm_update_beam_pattern( } } -void -phydm_update_rx_idle_beam( - void *dm_void -) +void phydm_update_rx_idle_beam( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - u32 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + u32 i; sat_tab->update_beam_codeword = phydm_construct_hl_beam_codeword(dm, - &sat_tab->rx_idle_beam[0], - sat_tab->ant_num); - PHYDM_DBG(dm, DBG_ANT_DIV, "Set target beam_pattern codeword = (( 0x%x ))\n", sat_tab->update_beam_codeword); + &sat_tab->rx_idle_beam[0], + sat_tab->ant_num); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Set target beam_pattern codeword = (( 0x%x ))\n", + sat_tab->update_beam_codeword); - for (i = 0; i < (sat_tab->ant_num); i++) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[ Update Rx-Idle-Beam ] RxIdleBeam[%d] =%d\n", i, sat_tab->rx_idle_beam[i]); - /**/ - } + for (i = 0; i < (sat_tab->ant_num); i++) + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ Update Rx-Idle-Beam ] RxIdleBeam[%d] =%d\n", i, + sat_tab->rx_idle_beam[i]); #if DEV_BUS_TYPE == RT_PCI_INTERFACE - phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); -#else - odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); + if (dm->support_interface == ODM_ITRF_PCIE) + phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); +#endif +#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE + if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) + odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); +#if 0 /*odm_stall_execution(1);*/ +#endif #endif sat_tab->pre_codeword = sat_tab->update_beam_codeword; } -void -phydm_hl_smart_ant_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -) +void phydm_hl_smart_ant_debug( + void *dm_void, + char input[][16], + u32 *_used, + char *output, + u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - u32 used = *_used; - u32 out_len = *_out_len; - u32 one = 0x1; - u32 codeword_length = sat_tab->rfu_codeword_total_bit_num; - u32 beam_ctrl_signal, i; - u8 devide_num = 4; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + u32 used = *_used; + u32 out_len = *_out_len; + u32 one = 0x1; + u32 codeword_length = sat_tab->rfu_codeword_total_bit_num; + u32 beam_ctrl_signal, i; + u8 devide_num = 4; - if (dm_value[0] == 1) { /*fix beam pattern*/ + if (dm_value[0] == 1) { /*@fix beam pattern*/ sat_tab->fix_beam_pattern_en = dm_value[1]; if (sat_tab->fix_beam_pattern_en == 1) { sat_tab->fix_beam_pattern_codeword = dm_value[2]; - if (sat_tab->fix_beam_pattern_codeword > (one << codeword_length)) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n", - sat_tab->fix_beam_pattern_codeword, codeword_length); - + if (sat_tab->fix_beam_pattern_codeword > (one << codeword_length)) { + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n", + sat_tab->fix_beam_pattern_codeword, + codeword_length); + (sat_tab->fix_beam_pattern_codeword) &= 0xffffff; - - PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Auto modify to (0x%x)\n", sat_tab->fix_beam_pattern_codeword); + + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ SmartAnt ] Auto modify to (0x%x)\n", + sat_tab->fix_beam_pattern_codeword); } sat_tab->update_beam_codeword = sat_tab->fix_beam_pattern_codeword; - /*---------------------------------------------------------*/ - PDM_SNPF(out_len, used, output + used, - out_len - used, "Fix Beam Pattern\n"); - + /*@---------------------------------------------------------*/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "Fix Beam Pattern\n"); + devide_num = (sat_tab->rfu_protocol_type == 2) ? 6 : 4; - + for (i = 0; i <= (codeword_length - 1); i++) { beam_ctrl_signal = (boolean)((sat_tab->update_beam_codeword & BIT(i)) >> i); - if (i == (codeword_length - 1)) { + if (i == (codeword_length - 1)) PDM_SNPF(out_len, used, - output + used, - out_len - used, - "%d]\n", - beam_ctrl_signal); - /**/ - } else if (i == 0) { + output + used, + out_len - used, + "%d]\n", + beam_ctrl_signal); + else if (i == 0) PDM_SNPF(out_len, used, - output + used, - out_len - used, - "Send Codeword[1:24] to RFU -> [%d", - beam_ctrl_signal); - /**/ - } else if ((i % devide_num) == (devide_num-1)) { + output + used, + out_len - used, + "Send Codeword[1:24] to RFU -> [%d", + beam_ctrl_signal); + else if ((i % devide_num) == (devide_num - 1)) PDM_SNPF(out_len, used, - output + used, - out_len - used, "%d|", - beam_ctrl_signal); - /**/ - } else { + output + used, + out_len - used, "%d|", + beam_ctrl_signal); + else PDM_SNPF(out_len, used, - output + used, - out_len - used, "%d", - beam_ctrl_signal); - /**/ - } + output + used, + out_len - used, "%d", + beam_ctrl_signal); } - /*---------------------------------------------------------*/ +/*@---------------------------------------------------------*/ - -#if DEV_BUS_TYPE == RT_PCI_INTERFACE - phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); -#else - odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); + #if DEV_BUS_TYPE == RT_PCI_INTERFACE + if (dm->support_interface == ODM_ITRF_PCIE) + phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); + #endif + #if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE + if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) + odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); +#if 0 /*odm_stall_execution(1);*/ #endif + #endif } else if (sat_tab->fix_beam_pattern_en == 0) - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[ SmartAnt ] Smart Antenna: Enable\n"); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[ SmartAnt ] Smart Antenna: Enable\n"); } else if (dm_value[0] == 2) { /*set latch time*/ sat_tab->latch_time = dm_value[1]; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] latch_time =0x%x\n", sat_tab->latch_time); + PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] latch_time =0x%x\n", + sat_tab->latch_time); } else if (dm_value[0] == 3) { sat_tab->fix_training_num_en = dm_value[1]; @@ -1692,18 +1743,15 @@ phydm_hl_smart_ant_debug( sat_tab->per_beam_training_pkt_num = (u8)dm_value[2]; sat_tab->decision_holding_period = (u8)dm_value[3]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[SmartAnt][Dbg] Fix_train_en = (( %d )), train_pkt_num = (( %d )), holding_period = (( %d )),\n", - sat_tab->fix_training_num_en, - sat_tab->per_beam_training_pkt_num, - sat_tab->decision_holding_period); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[SmartAnt][Dbg] Fix_train_en = (( %d )), train_pkt_num = (( %d )), holding_period = (( %d )),\n", + sat_tab->fix_training_num_en, + sat_tab->per_beam_training_pkt_num, + sat_tab->decision_holding_period); } else if (sat_tab->fix_training_num_en == 0) { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[ SmartAnt ] AUTO per_beam_training_pkt_num\n"); - /**/ + PDM_SNPF(out_len, used, output + used, out_len - used, + "[ SmartAnt ] AUTO per_beam_training_pkt_num\n"); } } else if (dm_value[0] == 4) { if (dm_value[1] == 1) { @@ -1720,112 +1768,104 @@ phydm_hl_smart_ant_debug( } PDM_SNPF(out_len, used, output + used, out_len - used, - "[ SmartAnt ] Set ant Num = (( %d )), first_train_ant = (( %d ))\n", - sat_tab->ant_num, - (sat_tab->first_train_ant - 1)); + "[ SmartAnt ] Set ant Num = (( %d )), first_train_ant = (( %d ))\n", + sat_tab->ant_num, (sat_tab->first_train_ant - 1)); } else if (dm_value[0] == 5) { if (dm_value[1] <= 3) { sat_tab->rfu_codeword_table[dm_value[1]] = dm_value[2]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[ SmartAnt ] Set Beam_2G: (( %d )), RFU codeword table = (( 0x%x ))\n", - dm_value[1], dm_value[2]); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[ SmartAnt ] Set Beam_2G: (( %d )), RFU codeword table = (( 0x%x ))\n", + dm_value[1], dm_value[2]); } else { for (i = 0; i < 4; i++) { PDM_SNPF(out_len, used, output + used, - out_len - used, - "[ SmartAnt ] Show Beam_2G: (( %d )), RFU codeword table = (( 0x%x ))\n", - i, - sat_tab->rfu_codeword_table[i]); + out_len - used, + "[ SmartAnt ] Show Beam_2G: (( %d )), RFU codeword table = (( 0x%x ))\n", + i, sat_tab->rfu_codeword_table[i]); } } } else if (dm_value[0] == 6) { if (dm_value[1] <= 3) { sat_tab->rfu_codeword_table_5g[dm_value[1]] = dm_value[2]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[ SmartAnt ] Set Beam_5G: (( %d )), RFU codeword table = (( 0x%x ))\n", - dm_value[1], dm_value[2]); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[ SmartAnt ] Set Beam_5G: (( %d )), RFU codeword table = (( 0x%x ))\n", + dm_value[1], dm_value[2]); } else { for (i = 0; i < 4; i++) { PDM_SNPF(out_len, used, output + used, - out_len - used, - "[ SmartAnt ] Show Beam_5G: (( %d )), RFU codeword table = (( 0x%x ))\n", - i, - sat_tab->rfu_codeword_table_5g[i]); + out_len - used, + "[ SmartAnt ] Show Beam_5G: (( %d )), RFU codeword table = (( 0x%x ))\n", + i, sat_tab->rfu_codeword_table_5g[i]); } } } else if (dm_value[0] == 7) { if (dm_value[1] <= 4) { sat_tab->beam_patten_num_each_ant = dm_value[1]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[ SmartAnt ] Set Beam number = (( %d ))\n", - sat_tab->beam_patten_num_each_ant); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[ SmartAnt ] Set Beam number = (( %d ))\n", + sat_tab->beam_patten_num_each_ant); } else { - PDM_SNPF(out_len, used, output + used, - out_len - used, - "[ SmartAnt ] Show Beam number = (( %d ))\n", - sat_tab->beam_patten_num_each_ant); + PDM_SNPF(out_len, used, output + used, out_len - used, + "[ SmartAnt ] Show Beam number = (( %d ))\n", + sat_tab->beam_patten_num_each_ant); } } *_used = used; *_out_len = out_len; } - -void -phydm_set_all_ant_same_beam_num( - void *dm_void -) +void phydm_set_all_ant_same_beam_num( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { /*2ant for 8821A*/ + if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { /*@2ant for 8821A*/ sat_tab->rx_idle_beam[0] = sat_tab->fast_training_beam_num; sat_tab->rx_idle_beam[1] = sat_tab->fast_training_beam_num; } sat_tab->update_beam_codeword = phydm_construct_hl_beam_codeword(dm, - &sat_tab->rx_idle_beam[0], - sat_tab->ant_num); + &sat_tab->rx_idle_beam[0], + sat_tab->ant_num); - PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Set all ant beam_pattern: codeword = (( 0x%x ))\n", sat_tab->update_beam_codeword); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ SmartAnt ] Set all ant beam_pattern: codeword = (( 0x%x ))\n", + sat_tab->update_beam_codeword); #if DEV_BUS_TYPE == RT_PCI_INTERFACE - phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); -#else - odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); - /*odm_stall_execution(1);*/ + if (dm->support_interface == ODM_ITRF_PCIE) + phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); +#endif +#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE + if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) + odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); +/*odm_stall_execution(1);*/ #endif } -void -odm_fast_ant_training_hl_smart_antenna_type1( - void *dm_void -) +void odm_fast_ant_training_hl_smart_antenna_type1( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; - struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - u32 codeword = 0, i, j; - u32 target_ant; - u32 avg_rssi_tmp, avg_rssi_tmp_ma; - u32 target_ant_beam_max_rssi[SUPPORT_RF_PATH_NUM] = {0}; - u32 max_beam_ant_rssi = 0; - u32 target_ant_beam[SUPPORT_RF_PATH_NUM] = {0}; - u32 beam_tmp; - u8 next_ant; - u32 rssi_sorting_seq[SUPPORT_BEAM_PATTERN_NUM] = {0}; - u32 rank_idx_seq[SUPPORT_BEAM_PATTERN_NUM] = {0}; - u32 rank_idx_out[SUPPORT_BEAM_PATTERN_NUM] = {0}; - u8 per_beam_rssi_diff_tmp = 0, training_pkt_num_offset; - u32 break_counter = 0; - u32 used_ant; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; + struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; + u32 codeword = 0, i, j; + u32 target_ant; + u32 avg_rssi_tmp, avg_rssi_tmp_ma; + u32 target_ant_beam_max_rssi[SUPPORT_RF_PATH_NUM] = {0}; + u32 max_beam_ant_rssi = 0; + u32 target_ant_beam[SUPPORT_RF_PATH_NUM] = {0}; + u32 beam_tmp; + u8 next_ant; + u32 rssi_sorting_seq[SUPPORT_BEAM_PATTERN_NUM] = {0}; + u32 rank_idx_seq[SUPPORT_BEAM_PATTERN_NUM] = {0}; + u32 rank_idx_out[SUPPORT_BEAM_PATTERN_NUM] = {0}; + u8 per_beam_rssi_diff_tmp = 0, training_pkt_num_offset; + u32 break_counter = 0; + u32 used_ant; if (!dm->is_linked) { PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n"); @@ -1833,9 +1873,11 @@ odm_fast_ant_training_hl_smart_antenna_type1( if (fat_tab->is_become_linked == true) { PHYDM_DBG(dm, DBG_ANT_DIV, "Link->no Link\n"); fat_tab->fat_state = FAT_BEFORE_LINK_STATE; - odm_ant_div_on_off(dm, ANTDIV_OFF); + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); - PHYDM_DBG(dm, DBG_ANT_DIV, "change to (( %d )) FAT_state\n", fat_tab->fat_state); + PHYDM_DBG(dm, DBG_ANT_DIV, + "change to (( %d )) FAT_state\n", + fat_tab->fat_state); fat_tab->is_become_linked = dm->is_linked; } @@ -1846,32 +1888,38 @@ odm_fast_ant_training_hl_smart_antenna_type1( PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n"); fat_tab->fat_state = FAT_PREPARE_STATE; - PHYDM_DBG(dm, DBG_ANT_DIV, "change to (( %d )) FAT_state\n", fat_tab->fat_state); + PHYDM_DBG(dm, DBG_ANT_DIV, + "change to (( %d )) FAT_state\n", + fat_tab->fat_state); +#if 0 /*sat_tab->fast_training_beam_num = 0;*/ /*phydm_set_all_ant_same_beam_num(dm);*/ +#endif fat_tab->is_become_linked = dm->is_linked; } } - if (*fat_tab->p_force_tx_ant_by_desc == false) { + if (!(*fat_tab->p_force_tx_by_desc)) { if (dm->is_one_entry_only == true) odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); else odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); } +#if 0 /*PHYDM_DBG(dm, DBG_ANT_DIV, "HL Smart ant Training: state (( %d ))\n", fat_tab->fat_state);*/ +#endif - /* [DECISION STATE] */ - /*=======================================================================================*/ + /* @[DECISION STATE] */ + /*@=======================================================================================*/ if (fat_tab->fat_state == FAT_DECISION_STATE) { PHYDM_DBG(dm, DBG_ANT_DIV, "[ 3. In Decision state]\n"); phydm_fast_training_enable(dm, FAT_OFF); break_counter = 0; - /*compute target beam in each antenna*/ + /*@compute target beam in each antenna*/ for (i = (sat_tab->first_train_ant - 1); i < sat_tab->ant_num_total; i++) { for (j = 0; j < (sat_tab->beam_patten_num_each_ant); j++) { if (sat_tab->pkt_rssi_cnt[i][j] == 0) { @@ -1886,8 +1934,10 @@ odm_fast_ant_training_hl_smart_antenna_type1( rssi_sorting_seq[j] = avg_rssi_tmp; sat_tab->pkt_rssi_pre[i][j] = avg_rssi_tmp; - PHYDM_DBG(dm, DBG_ANT_DIV, "ant[%d], Beam[%d]: pkt_cnt=(( %d )), avg_rssi_MA=(( %d )), avg_rssi=(( %d ))\n", - i, j, sat_tab->pkt_rssi_cnt[i][j], avg_rssi_tmp_ma, avg_rssi_tmp); + PHYDM_DBG(dm, DBG_ANT_DIV, + "ant[%d], Beam[%d]: pkt_cnt=(( %d )), avg_rssi_MA=(( %d )), avg_rssi=(( %d ))\n", + i, j, sat_tab->pkt_rssi_cnt[i][j], + avg_rssi_tmp_ma, avg_rssi_tmp); if (avg_rssi_tmp > target_ant_beam_max_rssi[i]) { target_ant_beam[i] = j; @@ -1897,33 +1947,38 @@ odm_fast_ant_training_hl_smart_antenna_type1( /*reset counter value*/ sat_tab->pkt_rssi_sum[i][j] = 0; sat_tab->pkt_rssi_cnt[i][j] = 0; - } sat_tab->rx_idle_beam[i] = target_ant_beam[i]; - PHYDM_DBG(dm, DBG_ANT_DIV, "---------> Target of ant[%d]: Beam_num-(( %d )) RSSI= ((%d))\n", - i, target_ant_beam[i], target_ant_beam_max_rssi[i]); + PHYDM_DBG(dm, DBG_ANT_DIV, + "---------> Target of ant[%d]: Beam_num-(( %d )) RSSI= ((%d))\n", + i, target_ant_beam[i], + target_ant_beam_max_rssi[i]); +#if 0 /*sorting*/ - /* + /*@ PHYDM_DBG(dm, DBG_ANT_DIV, "[Pre]rssi_sorting_seq = [%d, %d, %d, %d]\n", rssi_sorting_seq[0], rssi_sorting_seq[1], rssi_sorting_seq[2], rssi_sorting_seq[3]); */ /*phydm_seq_sorting(dm, &rssi_sorting_seq[0], &rank_idx_seq[0], &rank_idx_out[0], SUPPORT_BEAM_PATTERN_NUM);*/ - /* + /*@ PHYDM_DBG(dm, DBG_ANT_DIV, "[Post]rssi_sorting_seq = [%d, %d, %d, %d]\n", rssi_sorting_seq[0], rssi_sorting_seq[1], rssi_sorting_seq[2], rssi_sorting_seq[3]); PHYDM_DBG(dm, DBG_ANT_DIV, "[Post]rank_idx_seq = [%d, %d, %d, %d]\n", rank_idx_seq[0], rank_idx_seq[1], rank_idx_seq[2], rank_idx_seq[3]); PHYDM_DBG(dm, DBG_ANT_DIV, "[Post]rank_idx_out = [%d, %d, %d, %d]\n", rank_idx_out[0], rank_idx_out[1], rank_idx_out[2], rank_idx_out[3]); */ +#endif if (target_ant_beam_max_rssi[i] > max_beam_ant_rssi) { target_ant = i; max_beam_ant_rssi = target_ant_beam_max_rssi[i]; +#if /*PHYDM_DBG(dm, DBG_ANT_DIV, "Target of ant = (( %d )) max_beam_ant_rssi = (( %d ))\n", target_ant, max_beam_ant_rssi);*/ +#endif } break_counter++; - if (break_counter >= (sat_tab->ant_num)) + if (break_counter >= sat_tab->ant_num) break; } @@ -1934,11 +1989,12 @@ odm_fast_ant_training_hl_smart_antenna_type1( per_beam_rssi_diff_tmp = (u8)(max_beam_ant_rssi - sat_tab->pkt_rssi_pre[i][j]); sat_tab->beam_train_rssi_diff[i][j] = per_beam_rssi_diff_tmp; - PHYDM_DBG(dm, DBG_ANT_DIV, "ant[%d], Beam[%d]: RSSI_diff= ((%d))\n", - i, j, per_beam_rssi_diff_tmp); + PHYDM_DBG(dm, DBG_ANT_DIV, + "ant[%d], Beam[%d]: RSSI_diff= ((%d))\n", + i, j, per_beam_rssi_diff_tmp); } break_counter++; - if (break_counter >= (sat_tab->ant_num)) + if (break_counter >= sat_tab->ant_num) break; } #endif @@ -1949,27 +2005,28 @@ odm_fast_ant_training_hl_smart_antenna_type1( target_ant = AUX_ANT; if (sat_tab->ant_num > 1) { - /* [ update RX ant ]*/ + /* @[ update RX ant ]*/ odm_update_rx_idle_ant(dm, (u8)target_ant); - /* [ update TX ant ]*/ + /* @[ update TX ant ]*/ odm_update_tx_ant(dm, (u8)target_ant, (fat_tab->train_idx)); } /*set beam in each antenna*/ phydm_update_rx_idle_beam(dm); - odm_ant_div_on_off(dm, ANTDIV_ON); + odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); fat_tab->fat_state = FAT_PREPARE_STATE; return; - } - /* [TRAINING STATE] */ + /* @[TRAINING STATE] */ else if (fat_tab->fat_state == FAT_TRAINING_STATE) { PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2. In Training state]\n"); - PHYDM_DBG(dm, DBG_ANT_DIV, "fat_beam_n = (( %d )), pre_fat_beam_n = (( %d ))\n", - sat_tab->fast_training_beam_num, sat_tab->pre_fast_training_beam_num); + PHYDM_DBG(dm, DBG_ANT_DIV, + "fat_beam_n = (( %d )), pre_fat_beam_n = (( %d ))\n", + sat_tab->fast_training_beam_num, + sat_tab->pre_fast_training_beam_num); if (sat_tab->fast_training_beam_num > sat_tab->pre_fast_training_beam_num) @@ -1981,36 +2038,43 @@ odm_fast_ant_training_hl_smart_antenna_type1( sat_tab->pkt_counter = 0; beam_tmp = sat_tab->fast_training_beam_num; if (sat_tab->fast_training_beam_num >= (sat_tab->beam_patten_num_each_ant - 1)) { - PHYDM_DBG(dm, DBG_ANT_DIV, "[Timeout Update] Beam_num (( %d )) -> (( decision ))\n", sat_tab->fast_training_beam_num); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Timeout Update] Beam_num (( %d )) -> (( decision ))\n", + sat_tab->fast_training_beam_num); fat_tab->fat_state = FAT_DECISION_STATE; odm_fast_ant_training_hl_smart_antenna_type1(dm); } else { sat_tab->fast_training_beam_num++; - PHYDM_DBG(dm, DBG_ANT_DIV, "[Timeout Update] Beam_num (( %d )) -> (( %d ))\n", beam_tmp, sat_tab->fast_training_beam_num); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[Timeout Update] Beam_num (( %d )) -> (( %d ))\n", + beam_tmp, + sat_tab->fast_training_beam_num); phydm_set_all_ant_same_beam_num(dm); fat_tab->fat_state = FAT_TRAINING_STATE; - } } sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num; - PHYDM_DBG(dm, DBG_ANT_DIV, "[prepare state] Update Pre_Beam =(( %d ))\n", sat_tab->pre_fast_training_beam_num); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[prepare state] Update Pre_Beam =(( %d ))\n", + sat_tab->pre_fast_training_beam_num); } - /* [Prepare state] */ - /*=======================================================================================*/ + /* @[Prepare state] */ + /*@=======================================================================================*/ else if (fat_tab->fat_state == FAT_PREPARE_STATE) { PHYDM_DBG(dm, DBG_ANT_DIV, "\n\n[ 1. In Prepare state]\n"); - if (dm->pre_traffic_load == (dm->traffic_load)) { + if (dm->pre_traffic_load == dm->traffic_load) { if (sat_tab->decision_holding_period != 0) { - PHYDM_DBG(dm, DBG_ANT_DIV, "Holding_period = (( %d )), return!!!\n", sat_tab->decision_holding_period); + PHYDM_DBG(dm, DBG_ANT_DIV, + "Holding_period = (( %d )), return!!!\n", + sat_tab->decision_holding_period); sat_tab->decision_holding_period--; return; } } - /* Set training packet number*/ if (sat_tab->fix_training_num_en == 0) { switch (dm->traffic_load) { @@ -2034,9 +2098,11 @@ odm_fast_ant_training_hl_smart_antenna_type1( break; } } - PHYDM_DBG(dm, DBG_ANT_DIV, "Fix_training_en = (( %d )), training_pkt_num_base = (( %d )), holding_period = ((%d))\n", - sat_tab->fix_training_num_en, sat_tab->per_beam_training_pkt_num, sat_tab->decision_holding_period); - + PHYDM_DBG(dm, DBG_ANT_DIV, + "Fix_training_en = (( %d )), training_pkt_num_base = (( %d )), holding_period = ((%d))\n", + sat_tab->fix_training_num_en, + sat_tab->per_beam_training_pkt_num, + sat_tab->decision_holding_period); #ifdef CONFIG_FAT_PATCH break_counter = 0; @@ -2045,21 +2111,20 @@ odm_fast_ant_training_hl_smart_antenna_type1( per_beam_rssi_diff_tmp = sat_tab->beam_train_rssi_diff[i][j]; training_pkt_num_offset = per_beam_rssi_diff_tmp; - if ((sat_tab->per_beam_training_pkt_num) > training_pkt_num_offset) + if (sat_tab->per_beam_training_pkt_num > training_pkt_num_offset) sat_tab->beam_train_cnt[i][j] = sat_tab->per_beam_training_pkt_num - training_pkt_num_offset; else sat_tab->beam_train_cnt[i][j] = 1; - - PHYDM_DBG(dm, DBG_ANT_DIV, "ant[%d]: Beam_num-(( %d )) training_pkt_num = ((%d))\n", - i, j, sat_tab->beam_train_cnt[i][j]); + PHYDM_DBG(dm, DBG_ANT_DIV, + "ant[%d]: Beam_num-(( %d )) training_pkt_num = ((%d))\n", + i, j, sat_tab->beam_train_cnt[i][j]); } break_counter++; - if (break_counter >= (sat_tab->ant_num)) + if (break_counter >= sat_tab->ant_num) break; } - phydm_fast_training_enable(dm, FAT_OFF); sat_tab->pre_beacon_counter = sat_tab->beacon_counter; sat_tab->update_beam_idx = 0; @@ -2081,148 +2146,132 @@ odm_fast_ant_training_hl_smart_antenna_type1( phydm_fast_training_enable(dm, FAT_ON); #endif - odm_ant_div_on_off(dm, ANTDIV_OFF); + odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); sat_tab->pkt_counter = 0; sat_tab->fast_training_beam_num = 0; phydm_set_all_ant_same_beam_num(dm); sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num; fat_tab->fat_state = FAT_TRAINING_STATE; } - } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -phydm_beam_switch_workitem_callback( - void *context -) +void phydm_beam_switch_workitem_callback( + void *context) { - void *adapter = (void *)context; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; - struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; + void *adapter = (void *)context; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; + struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; #if DEV_BUS_TYPE != RT_PCI_INTERFACE sat_tab->pkt_skip_statistic_en = 1; #endif - PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n", sat_tab->pkt_skip_statistic_en); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n", + sat_tab->pkt_skip_statistic_en); phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); #if DEV_BUS_TYPE != RT_PCI_INTERFACE +#if 0 /*odm_stall_execution(sat_tab->latch_time);*/ +#endif sat_tab->pkt_skip_statistic_en = 0; #endif - PHYDM_DBG(dm, DBG_ANT_DIV, "pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n", sat_tab->pkt_skip_statistic_en, sat_tab->latch_time); + PHYDM_DBG(dm, DBG_ANT_DIV, + "pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n", + sat_tab->pkt_skip_statistic_en, sat_tab->latch_time); } -void -phydm_beam_decision_workitem_callback( - void *context -) +void phydm_beam_decision_workitem_callback( + void *context) { - void *adapter = (void *)context; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; + void *adapter = (void *)context; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; - PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Beam decision Workitem Callback\n"); + PHYDM_DBG(dm, DBG_ANT_DIV, + "[ SmartAnt ] Beam decision Workitem Callback\n"); odm_fast_ant_training_hl_smart_antenna_type1(dm); } #endif +#endif /*@#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/ -#endif /*#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/ +#endif /*@#ifdef CONFIG_HL_SMART_ANTENNA*/ - -#endif/*#ifdef CONFIG_HL_SMART_ANTENNA*/ - - - -void -phydm_smt_ant_config( - void *dm_void -) +void phydm_smt_ant_config( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant *smtant_table = &dm->smtant_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant *smtant_table = &dm->smtant_table; - #if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) - - dm->support_ability |= ODM_BB_SMT_ANT; - smtant_table->smt_ant_vendor = SMTANT_CUMITEK; - smtant_table->smt_ant_type = 1; - #if (RTL8822B_SUPPORT == 1) - dm->rfe_type = SMTANT_TMP_RFE_TYPE; - #endif - #elif (defined(CONFIG_HL_SMART_ANTENNA)) - - dm->support_ability |= ODM_BB_SMT_ANT; - smtant_table->smt_ant_vendor = SMTANT_HON_BO; - - #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 - smtant_table->smt_ant_type = 1; - #endif - - #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 - smtant_table->smt_ant_type = 2; - #endif - #endif +#if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) - PHYDM_DBG(dm, DBG_SMT_ANT, "[SmtAnt Config] Vendor=((%d)), Smt_ant_type =((%d))\n", - smtant_table->smt_ant_vendor, smtant_table->smt_ant_type); -} + dm->support_ability |= ODM_BB_SMT_ANT; + smtant_table->smt_ant_vendor = SMTANT_CUMITEK; + smtant_table->smt_ant_type = 1; +#if (RTL8822B_SUPPORT == 1) + dm->rfe_type = SMTANT_TMP_RFE_TYPE; +#endif +#elif (defined(CONFIG_HL_SMART_ANTENNA)) + + dm->support_ability |= ODM_BB_SMT_ANT; + smtant_table->smt_ant_vendor = SMTANT_HON_BO; + +#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 + smtant_table->smt_ant_type = 1; #endif +#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 + smtant_table->smt_ant_type = 2; +#endif +#endif -void -phydm_smt_ant_init( - void *dm_void -) -{ -#if (defined(CONFIG_SMART_ANTENNA)) - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct smt_ant *smtant_table = &dm->smtant_table; - - phydm_smt_ant_config(dm); - - - if (smtant_table->smt_ant_vendor == SMTANT_CUMITEK) { - - #if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) - #if (RTL8822B_SUPPORT == 1) - if (dm->support_ic_type == ODM_RTL8822B) { - phydm_cumitek_smt_ant_init_8822b(dm); - /**/ - } - #endif - - #if (RTL8197F_SUPPORT == 1) - if (dm->support_ic_type == ODM_RTL8197F) { - phydm_cumitek_smt_ant_init_8197f(dm); - /**/ - } - #endif - #endif /*#if (defined(CONFIG_CUMITEK_SMART_ANTENNA))*/ - - } else if (smtant_table->smt_ant_vendor == SMTANT_HON_BO) { - #if (defined(CONFIG_HL_SMART_ANTENNA)) - #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 - if (dm->support_ic_type == ODM_RTL8821) { - phydm_hl_smart_ant_type1_init_8821a(dm); - /**/ - } - #endif - - #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 - if (dm->support_ic_type == ODM_RTL8822B) { - phydm_hl_smart_ant_type2_init_8822b(dm); - /**/ - } - #endif - #endif/*#if (defined(CONFIG_HL_SMART_ANTENNA))*/ - } -#endif + PHYDM_DBG(dm, DBG_SMT_ANT, + "[SmtAnt Config] Vendor=((%d)), Smt_ant_type =((%d))\n", + smtant_table->smt_ant_vendor, smtant_table->smt_ant_type); } +void phydm_smt_ant_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct smt_ant *smtant_table = &dm->smtant_table; + phydm_smt_ant_config(dm); + + if (smtant_table->smt_ant_vendor == SMTANT_CUMITEK) { +#if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) +#if (RTL8822B_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8822B) + phydm_cumitek_smt_ant_init_8822b(dm); +#endif + +#if (RTL8197F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8197F) + phydm_cumitek_smt_ant_init_8197f(dm); +#endif +/*@jj add 20170822*/ +#if (RTL8192F_SUPPORT == 1) + if (dm->support_ic_type == ODM_RTL8192F) + phydm_cumitek_smt_ant_init_8192f(dm); +#endif +#endif /*@#if (defined(CONFIG_CUMITEK_SMART_ANTENNA))*/ + + } else if (smtant_table->smt_ant_vendor == SMTANT_HON_BO) { +#if (defined(CONFIG_HL_SMART_ANTENNA)) +#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 + if (dm->support_ic_type == ODM_RTL8821) + phydm_hl_smart_ant_type1_init_8821a(dm); +#endif + +#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 + if (dm->support_ic_type == ODM_RTL8822B) + phydm_hl_smart_ant_type2_init_8822b(dm); +#endif +#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA))*/ + } +} +#endif diff --git a/hal/phydm/phydm_smt_ant.h b/hal/phydm/phydm_smt_ant.h index d2f88e1..4f15c6b 100644 --- a/hal/phydm/phydm_smt_ant.h +++ b/hal/phydm/phydm_smt_ant.h @@ -23,12 +23,12 @@ * *****************************************************************************/ -#ifndef __PHYDMSMTANT_H__ -#define __PHYDMSMTANT_H__ +#ifndef __PHYDMSMTANT_H__ +#define __PHYDMSMTANT_H__ -/*#define SMT_ANT_VERSION "1.1"*/ /*2017.03.13*/ -/*#define SMT_ANT_VERSION "1.2"*/ /*2017.03.28*/ -#define SMT_ANT_VERSION "2.0" /* Add Cumitek SmtAnt 2017.05.25*/ +/*@#define SMT_ANT_VERSION "1.1"*/ /*@2017.03.13*/ +/*@#define SMT_ANT_VERSION "1.2"*/ /*@2017.03.28*/ +#define SMT_ANT_VERSION "2.0" /* @Add Cumitek SmtAnt 2017.05.25*/ #define SMTANT_RTK 1 #define SMTANT_HON_BO 2 @@ -36,11 +36,10 @@ #if (defined(CONFIG_SMART_ANTENNA)) - #if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) struct smt_ant_cumitek { - u8 tx_ant_idx[2][ODM_ASSOCIATE_ENTRY_NUM]; /*[pathA~B] [MACID 0~128]*/ - u8 rx_default_ant_idx[2]; /*[pathA~B]*/ + u8 tx_ant_idx[2][ODM_ASSOCIATE_ENTRY_NUM]; /*@[pathA~B] [MACID 0~128]*/ + u8 rx_default_ant_idx[2]; /*@[pathA~B]*/ }; #endif @@ -54,34 +53,34 @@ struct smt_ant_honbo { u32 update_beam_codeword; u32 ant_num; /*number of "used" smart beam antenna*/ u32 ant_num_total;/*number of "total" smart beam antenna*/ - u32 first_train_ant; /*decide witch antenna to train first*/ + u32 first_train_ant; /*@decide witch antenna to train first*/ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 - u32 pkt_rssi_pre[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];/*rssi of each path with a certain beam pattern*/ + u32 pkt_rssi_pre[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];/*@rssi of each path with a certain beam pattern*/ u8 beam_train_rssi_diff[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM]; u8 beam_train_cnt[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM]; - u32 rfu_codeword_table[4]; /*2G beam truth table*/ - u32 rfu_codeword_table_5g[4]; /*5G beam truth table*/ - u32 beam_patten_num_each_ant;/*number of beam can be switched in each antenna*/ + u32 rfu_codeword_table[4]; /*@2G beam truth table*/ + u32 rfu_codeword_table_5g[4]; /*@5G beam truth table*/ + u32 beam_patten_num_each_ant;/*@number of beam can be switched in each antenna*/ u32 rx_idle_beam[SUPPORT_RF_PATH_NUM]; u32 pkt_rssi_sum[8][SUPPORT_BEAM_PATTERN_NUM]; u32 pkt_rssi_cnt[8][SUPPORT_BEAM_PATTERN_NUM]; #endif - - u32 fast_training_beam_num;/*current training beam_set index*/ + + u32 fast_training_beam_num;/*@current training beam_set index*/ u32 pre_fast_training_beam_num;/*pre training beam_set index*/ - u32 rfu_codeword_total_bit_num; /* total bit number of RFU protocol*/ - u32 rfu_each_ant_bit_num; /* bit number of RFU protocol for each ant*/ + u32 rfu_codeword_total_bit_num; /* @total bit number of RFU protocol*/ + u32 rfu_each_ant_bit_num; /* @bit number of RFU protocol for each ant*/ u8 per_beam_training_pkt_num; u8 decision_holding_period; - - + + u32 pre_codeword; boolean force_update_beam_en; u32 beacon_counter; u32 pre_beacon_counter; - u8 pkt_counter; /*packet number that each beam-set should be colected in training state*/ - u8 update_beam_idx; /*the index announce that the beam can be updated*/ + u8 pkt_counter; /*@packet number that each beam-set should be colected in training state*/ + u8 update_beam_idx; /*@the index announce that the beam can be updated*/ u8 rfu_protocol_type; u16 rfu_protocol_delay_time; @@ -92,158 +91,120 @@ struct smt_ant_honbo { #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 - u8 beam_set_avg_rssi_pre[SUPPORT_BEAM_SET_PATTERN_NUM]; /*avg pre_rssi of each beam set*/ - u8 beam_set_train_val_diff[SUPPORT_BEAM_SET_PATTERN_NUM]; /*rssi of a beam pattern set, ex: a set = {ant1_beam=1, ant2_beam=3}*/ - u8 beam_set_train_cnt[SUPPORT_BEAM_SET_PATTERN_NUM]; /*training pkt num of each beam set*/ - u32 beam_set_rssi_avg_sum[SUPPORT_BEAM_SET_PATTERN_NUM]; /*RSSI_sum of avg(pathA,pathB) for each beam-set)*/ - u32 beam_path_rssi_sum[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B];/*RSSI_sum of each path for each beam-set)*/ + u8 beam_set_avg_rssi_pre[SUPPORT_BEAM_SET_PATTERN_NUM]; /*@avg pre_rssi of each beam set*/ + u8 beam_set_train_val_diff[SUPPORT_BEAM_SET_PATTERN_NUM]; /*@rssi of a beam pattern set, ex: a set = {ant1_beam=1, ant2_beam=3}*/ + u8 beam_set_train_cnt[SUPPORT_BEAM_SET_PATTERN_NUM]; /*@training pkt num of each beam set*/ + u32 beam_set_rssi_avg_sum[SUPPORT_BEAM_SET_PATTERN_NUM]; /*@RSSI_sum of avg(pathA,pathB) for each beam-set)*/ + u32 beam_path_rssi_sum[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B];/*@RSSI_sum of each path for each beam-set)*/ - u8 beam_set_avg_evm_2ss_pre[SUPPORT_BEAM_SET_PATTERN_NUM]; - u32 beam_path_evm_2ss_sum[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B];/*2SS evm_sum of each path for each beam-set)*/ + u8 beam_set_avg_evm_2ss_pre[SUPPORT_BEAM_SET_PATTERN_NUM]; + u32 beam_path_evm_2ss_sum[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B];/*@2SS evm_sum of each path for each beam-set)*/ u32 beam_path_evm_2ss_cnt[SUPPORT_BEAM_SET_PATTERN_NUM]; u8 beam_set_avg_evm_1ss_pre[SUPPORT_BEAM_SET_PATTERN_NUM]; - u32 beam_path_evm_1ss_sum[SUPPORT_BEAM_SET_PATTERN_NUM];/*1SS evm_sum of each path for each beam-set)*/ + u32 beam_path_evm_1ss_sum[SUPPORT_BEAM_SET_PATTERN_NUM];/*@1SS evm_sum of each path for each beam-set)*/ u32 beam_path_evm_1ss_cnt[SUPPORT_BEAM_SET_PATTERN_NUM]; - - u32 statistic_pkt_cnt[SUPPORT_BEAM_SET_PATTERN_NUM]; /*statistic_pkt_cnt for SmtAnt make decision*/ - - u8 total_beam_set_num; /*number of beam set can be switched*/ - u8 total_beam_set_num_2g;/*number of beam set can be switched in 2G*/ - u8 total_beam_set_num_5g;/*number of beam set can be switched in 5G*/ - u8 rfu_codeword_table_2g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B]; /*2G beam truth table*/ - u8 rfu_codeword_table_5g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B]; /*5G beam truth table*/ + u32 statistic_pkt_cnt[SUPPORT_BEAM_SET_PATTERN_NUM]; /*@statistic_pkt_cnt for SmtAnt make decision*/ + + u8 total_beam_set_num; /*@number of beam set can be switched*/ + u8 total_beam_set_num_2g;/*@number of beam set can be switched in 2G*/ + u8 total_beam_set_num_5g;/*@number of beam set can be switched in 5G*/ + + u8 rfu_codeword_table_2g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B]; /*@2G beam truth table*/ + u8 rfu_codeword_table_5g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B]; /*@5G beam truth table*/ u8 rx_idle_beam_set_idx; /*the filanl decsion result*/ #endif - + }; -#endif /*#if (defined(CONFIG_HL_SMART_ANTENNA))*/ +#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA))*/ struct smt_ant { u8 smt_ant_vendor; u8 smt_ant_type; - u8 tx_desc_mode; /*0:3 bit mode, 1:2 bit mode*/ + u8 tx_desc_mode; /*@0:3 bit mode, 1:2 bit mode*/ #if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) struct smt_ant_cumitek cumi_smtant_table; #endif }; #if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) -void -phydm_cumitek_smt_tx_ant_update( - void *dm_void, - u8 tx_ant_idx_path_a, - u8 tx_ant_idx_path_b, - u32 mac_id -); +void phydm_cumitek_smt_tx_ant_update( + void *dm_void, + u8 tx_ant_idx_path_a, + u8 tx_ant_idx_path_b, + u32 mac_id); -void -phydm_cumitek_smt_rx_default_ant_update( - void *dm_void, - u8 rx_ant_idx_path_a, - u8 rx_ant_idx_path_b -); +void phydm_cumitek_smt_rx_default_ant_update( + void *dm_void, + u8 rx_ant_idx_path_a, + u8 rx_ant_idx_path_b); -void -phydm_cumitek_smt_ant_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); +void phydm_cumitek_smt_ant_debug( + void *dm_void, + char input[][16], + u32 *_used, + char *output, + u32 *_out_len); #endif - #if (defined(CONFIG_HL_SMART_ANTENNA)) #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -phydm_beam_switch_workitem_callback( - void *context -); - -void -phydm_beam_decision_workitem_callback( - void *context -); -#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ - +void phydm_beam_switch_workitem_callback( + void *context); +void phydm_beam_decision_workitem_callback( + void *context); +#endif /*@#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 -void -phydm_hl_smart_ant_type2_init_8822b( - void *dm_void -); +void phydm_hl_smart_ant_type2_init_8822b( + void *dm_void); -void -phydm_update_beam_pattern_type2( - void *dm_void, - u32 codeword, - u32 codeword_length -); +void phydm_update_beam_pattern_type2( + void *dm_void, + u32 codeword, + u32 codeword_length); -void -phydm_set_rfu_beam_pattern_type2( - void *dm_void -); +void phydm_set_rfu_beam_pattern_type2( + void *dm_void); -void -phydm_hl_smart_ant_debug_type2( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); +void phydm_hl_smt_ant_dbg_type2( + void *dm_void, + char input[][16], + u32 *_used, + char *output, + u32 *_out_len); -void -phydm_process_rssi_for_hb_smtant_type2( - void *dm_void, - void *phy_info_void, - void *pkt_info_void, - u8 rssi_avg -); - -#endif/*#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE2))*/ +void phydm_process_rssi_for_hb_smtant_type2( + void *dm_void, + void *phy_info_void, + void *pkt_info_void, + u8 rssi_avg); +#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE2))*/ #if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) -void -phydm_update_beam_pattern( - void *dm_void, - u32 codeword, - u32 codeword_length -); +void phydm_update_beam_pattern( + void *dm_void, + u32 codeword, + u32 codeword_length); -void -phydm_set_all_ant_same_beam_num( - void *dm_void -); +void phydm_set_all_ant_same_beam_num( + void *dm_void); -void -phydm_hl_smart_ant_debug( - void *dm_void, - char input[][16], - u32 *_used, - char *output, - u32 *_out_len, - u32 input_num -); +void phydm_hl_smart_ant_debug( + void *dm_void, + char input[][16], + u32 *_used, + char *output, + u32 *_out_len); -#endif/*#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))*/ -#endif/*#if (defined(CONFIG_HL_SMART_ANTENNA))*/ -#endif/*#if (defined(CONFIG_SMART_ANTENNA))*/ - -void -phydm_smt_ant_init( - void *dm_void -); - -#endif \ No newline at end of file +#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))*/ +#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA))*/ +void phydm_smt_ant_init(void *dm_void); +#endif /*@#if (defined(CONFIG_SMART_ANTENNA))*/ +#endif diff --git a/hal/phydm/phydm_soml.c b/hal/phydm/phydm_soml.c index d4706ec..d1d26de 100644 --- a/hal/phydm/phydm_soml.c +++ b/hal/phydm/phydm_soml.c @@ -23,840 +23,1424 @@ * *****************************************************************************/ -/* ************************************************************ +/************************************************************* * include files - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "phydm_precomp.h" -void -phydm_dynamicsoftmletting( - void *dm_void -) +#ifdef CONFIG_ADAPTIVE_SOML + +void phydm_dynamicsoftmletting(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; u32 ret_val; #if (RTL8822B_SUPPORT == 1) - if (*dm->mp_mode == false) { + if (!*dm->mp_mode) { if (dm->support_ic_type & ODM_RTL8822B) { - if ((!dm->is_linked)|(dm->iot_table.is_linked_cmw500)) + if (!dm->is_linked | dm->iot_table.is_linked_cmw500) return; - if (true == dm->bsomlenabled) { - PHYDM_DBG(dm, ODM_COMP_API, "PHYDM_DynamicSoftMLSetting(): SoML has been enable, skip dynamic SoML switch\n"); - return; + if (dm->bsomlenabled) { + PHYDM_DBG(dm, ODM_COMP_API, + "PHYDM_DynamicSoftMLSetting(): SoML has been enable, skip dynamic SoML switch\n"); + return; } - ret_val = odm_get_bb_reg(dm, 0xf8c, MASKBYTE0); - PHYDM_DBG(dm, ODM_COMP_API, "PHYDM_DynamicSoftMLSetting(): Read 0xF8C = 0x%08X\n", ret_val); + ret_val = odm_get_bb_reg(dm, R_0xf8c, MASKBYTE0); + PHYDM_DBG(dm, ODM_COMP_API, + "PHYDM_DynamicSoftMLSetting(): Read 0xF8C = 0x%08X\n", + ret_val); if (ret_val < 0x16) { - PHYDM_DBG(dm, ODM_COMP_API, "PHYDM_DynamicSoftMLSetting(): 0xF8C(== 0x%08X) < 0x16, enable SoML\n", ret_val); + PHYDM_DBG(dm, ODM_COMP_API, + "PHYDM_DynamicSoftMLSetting(): 0xF8C(== 0x%08X) < 0x16, enable SoML\n", + ret_val); phydm_somlrxhp_setting(dm, true); - /*odm_set_bb_reg(dm, 0x19a8, MASKDWORD, 0xc10a0000);*/ +#if 0 + /*odm_set_bb_reg(dm, R_0x19a8, MASKDWORD, 0xc10a0000);*/ +#endif dm->bsomlenabled = true; } } } #endif - } -#ifdef CONFIG_ADAPTIVE_SOML -void -phydm_soml_on_off( - void *dm_void, - u8 swch -) +void phydm_soml_on_off(void *dm_void, u8 swch) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; if (swch == SOML_ON) { PHYDM_DBG(dm, DBG_ADPTV_SOML, "(( Turn on )) SOML\n"); - if (dm->support_ic_type == ODM_RTL8822B) + if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) + odm_set_bb_reg(dm, R_0x998, BIT(6), swch); +#if (RTL8822B_SUPPORT == 1) + else if (dm->support_ic_type == ODM_RTL8822B) phydm_somlrxhp_setting(dm, true); - else if (dm->support_ic_type == ODM_RTL8197F) - odm_set_bb_reg(dm, 0x998, BIT(6), swch); +#endif } else if (swch == SOML_OFF) { PHYDM_DBG(dm, DBG_ADPTV_SOML, "(( Turn off )) SOML\n"); - if (dm->support_ic_type == ODM_RTL8822B) + if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) + odm_set_bb_reg(dm, R_0x998, BIT(6), swch); +#if (RTL8822B_SUPPORT == 1) + else if (dm->support_ic_type == ODM_RTL8822B) phydm_somlrxhp_setting(dm, false); - else if (dm->support_ic_type == ODM_RTL8197F) - odm_set_bb_reg(dm, 0x998, BIT(6), swch); +#endif } - dm_soml_table->soml_on_off = swch; + soml_tab->soml_on_off = swch; } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -phydm_adaptive_soml_callback( - struct phydm_timer_list *timer -) +void phydm_adaptive_soml_callback(struct phydm_timer_list *timer) { - void *adapter = (void *)timer->Adapter; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; + void *adapter = (void *)timer->Adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; -#if DEV_BUS_TYPE == RT_PCI_INTERFACE -#if USE_WORKITEM - odm_schedule_work_item(&dm_soml_table->phydm_adaptive_soml_workitem); -#else + #if DEV_BUS_TYPE == RT_PCI_INTERFACE + #if USE_WORKITEM + odm_schedule_work_item(&soml_tab->phydm_adaptive_soml_workitem); + #else { - /*dbg_print("phydm_adaptive_soml-phydm_adaptive_soml_callback\n");*/ +#if 0 + /*@dbg_print("%s\n",__func__);*/ +#endif phydm_adsl(dm); } -#endif -#else - odm_schedule_work_item(&dm_soml_table->phydm_adaptive_soml_workitem); -#endif + #endif + #else + odm_schedule_work_item(&soml_tab->phydm_adaptive_soml_workitem); + #endif } -void -phydm_adaptive_soml_workitem_callback( - void *context -) +void phydm_adaptive_soml_workitem_callback(void *context) { #ifdef CONFIG_ADAPTIVE_SOML - void *adapter = (void *)context; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; + void *adapter = (void *)context; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; - /*dbg_print("phydm_adaptive_soml-phydm_adaptive_soml_workitem_callback\n");*/ +#if 0 + /*@dbg_print("%s\n",__func__);*/ +#endif phydm_adsl(dm); #endif } #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -void -phydm_adaptive_soml_callback( - void *dm_void -) +void phydm_adaptive_soml_callback(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - void *padapter = dm->adapter; - if (*(dm->is_net_closed) == true) + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *padapter = dm->adapter; + + if (*dm->is_net_closed == true) return; if (dm->support_interface == ODM_ITRF_PCIE) phydm_adsl(dm); else { - /* Can't do I/O in timer callback*/ - rtw_run_in_thread_cmd(padapter, phydm_adaptive_soml_workitem_callback, padapter); + /* @Can't do I/O in timer callback*/ + phydm_run_in_thread_cmd(dm, + phydm_adaptive_soml_workitem_callback, + dm); } } -void -phydm_adaptive_soml_workitem_callback( - void *context -) +void phydm_adaptive_soml_workitem_callback(void *context) { - void * adapter = (void *)context; - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->odmpriv; + struct dm_struct *dm = (void *)context; - /*dbg_print("phydm_adaptive_soml-phydm_adaptive_soml_workitem_callback\n");*/ +#if 0 + /*@dbg_print("%s\n",__func__);*/ +#endif phydm_adsl(dm); } #else - -void -phydm_adaptive_soml_callback( - void *dm_void -) +void phydm_adaptive_soml_callback(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; PHYDM_DBG(dm, DBG_ADPTV_SOML, "******SOML_Callback******\n"); phydm_adsl(dm); - } #endif -void -phydm_rx_qam_for_soml( - void *dm_void, - void *pkt_info_void -) +void phydm_rx_rate_for_soml(void *dm_void, void *pkt_info_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; - struct phydm_perpkt_info_struct *pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; - u8 date_rate = (pktinfo->data_rate & 0x7f); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + struct phydm_perpkt_info_struct *pktinfo = NULL; + u8 data_rate; - if (dm_soml_table->soml_state_cnt < ((dm_soml_table->soml_train_num)<<1)) { - if (dm_soml_table->soml_on_off == SOML_ON) + pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; + data_rate = (pktinfo->data_rate & 0x7f); + + if (pktinfo->data_rate >= ODM_RATEMCS0 && + pktinfo->data_rate <= ODM_RATEMCS31) + soml_tab->ht_cnt[data_rate - ODM_RATEMCS0]++; + else if ((pktinfo->data_rate >= ODM_RATEVHTSS1MCS0) && + (pktinfo->data_rate <= ODM_RATEVHTSS4MCS9)) + soml_tab->vht_cnt[data_rate - ODM_RATEVHTSS1MCS0]++; +} + +void phydm_rx_qam_for_soml(void *dm_void, void *pkt_info_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + struct phydm_perpkt_info_struct *pktinfo = NULL; + u8 date_rate; + + pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; + date_rate = (pktinfo->data_rate & 0x7f); + if (soml_tab->soml_state_cnt < (soml_tab->soml_train_num << 1)) { + if (soml_tab->soml_on_off == SOML_ON) { return; - else if (dm_soml_table->soml_on_off == SOML_OFF) { - if ((date_rate >= ODM_RATEMCS8) && (date_rate <= ODM_RATEMCS10)) - dm_soml_table->num_ht_qam[BPSK_QPSK]++; + } else if (soml_tab->soml_on_off == SOML_OFF) { + if (date_rate >= ODM_RATEMCS8 && + date_rate <= ODM_RATEMCS10) + soml_tab->num_ht_qam[BPSK_QPSK]++; - else if ((date_rate >= ODM_RATEMCS11) && (date_rate <= ODM_RATEMCS12)) - dm_soml_table->num_ht_qam[QAM16]++; + else if ((date_rate >= ODM_RATEMCS11) && + (date_rate <= ODM_RATEMCS12)) + soml_tab->num_ht_qam[QAM16]++; - else if ((date_rate >= ODM_RATEMCS13) && (date_rate <= ODM_RATEMCS15)) - dm_soml_table->num_ht_qam[QAM64]++; + else if ((date_rate >= ODM_RATEMCS13) && + (date_rate <= ODM_RATEMCS15)) + soml_tab->num_ht_qam[QAM64]++; - else if ((date_rate >= ODM_RATEVHTSS2MCS0) && (date_rate <= ODM_RATEVHTSS2MCS2)) - dm_soml_table->num_vht_qam[BPSK_QPSK]++; + else if ((date_rate >= ODM_RATEVHTSS2MCS0) && + (date_rate <= ODM_RATEVHTSS2MCS2)) + soml_tab->num_vht_qam[BPSK_QPSK]++; - else if ((date_rate >= ODM_RATEVHTSS2MCS3) && (date_rate <= ODM_RATEVHTSS2MCS4)) - dm_soml_table->num_vht_qam[QAM16]++; + else if ((date_rate >= ODM_RATEVHTSS2MCS3) && + (date_rate <= ODM_RATEVHTSS2MCS4)) + soml_tab->num_vht_qam[QAM16]++; - else if ((date_rate >= ODM_RATEVHTSS2MCS5) && (date_rate <= ODM_RATEVHTSS2MCS5)) - dm_soml_table->num_vht_qam[QAM64]++; + else if ((date_rate >= ODM_RATEVHTSS2MCS5) && + (date_rate <= ODM_RATEVHTSS2MCS5)) + soml_tab->num_vht_qam[QAM64]++; - else if ((date_rate >= ODM_RATEVHTSS2MCS8) && (date_rate <= ODM_RATEVHTSS2MCS9)) - dm_soml_table->num_vht_qam[QAM256]++; + else if ((date_rate >= ODM_RATEVHTSS2MCS8) && + (date_rate <= ODM_RATEVHTSS2MCS9)) + soml_tab->num_vht_qam[QAM256]++; } } } -void -phydm_soml_reset_rx_rate( - void *dm_void -) +void phydm_soml_reset_rx_rate(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; - u8 order; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + u8 order; - for (order = 0; order < HT_ORDER_TYPE; order++) - dm_soml_table->num_ht_qam[order] = 0; + for (order = 0; order < HT_RATE_IDX; order++) { + soml_tab->ht_cnt[order] = 0; + soml_tab->pre_ht_cnt[order] = 0; + soml_tab->ht_cnt_on[order] = 0; + soml_tab->ht_cnt_off[order] = 0; + soml_tab->ht_crc_ok_cnt_on[order] = 0; + soml_tab->ht_crc_fail_cnt_on[order] = 0; + soml_tab->ht_crc_ok_cnt_off[order] = 0; + soml_tab->ht_crc_fail_cnt_off[order] = 0; + } - for (order = 0; order < VHT_ORDER_TYPE; order++) - dm_soml_table->num_vht_qam[order] = 0; + for (order = 0; order < VHT_RATE_IDX; order++) { + soml_tab->vht_cnt[order] = 0; + soml_tab->pre_vht_cnt[order] = 0; + soml_tab->vht_cnt_on[order] = 0; + soml_tab->vht_cnt_off[order] = 0; + soml_tab->vht_crc_ok_cnt_on[order] = 0; + soml_tab->vht_crc_fail_cnt_on[order] = 0; + soml_tab->vht_crc_ok_cnt_off[order] = 0; + soml_tab->vht_crc_fail_cnt_off[order] = 0; + } } -void -phydm_soml_cfo_process( - void *dm_void, - s32 *diff_a, - s32 *diff_b -) +void phydm_soml_reset_qam(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; - u32 value32, value32_1, value32_2, value32_3; - s32 cfo_acq_a, cfo_acq_b, cfo_end_a, cfo_end_b; - s32 cfo_diff_a, cfo_diff_b; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + u8 order; - value32 = odm_get_bb_reg(dm, 0xd10, MASKDWORD); - value32_1 = odm_get_bb_reg(dm, 0xd14, MASKDWORD); - value32_2 = odm_get_bb_reg(dm, 0xd50, MASKDWORD); - value32_3 = odm_get_bb_reg(dm, 0xd54, MASKDWORD); + for (order = 0; order < HT_ORDER_TYPE; order++) + soml_tab->num_ht_qam[order] = 0; + + for (order = 0; order < VHT_ORDER_TYPE; order++) + soml_tab->num_vht_qam[order] = 0; +} + +void phydm_soml_cfo_process(void *dm_void, s32 *diff_a, s32 *diff_b) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 value32, value32_1, value32_2, value32_3; + s32 cfo_acq_a, cfo_acq_b, cfo_end_a, cfo_end_b; + + value32 = odm_get_bb_reg(dm, R_0xd10, MASKDWORD); + value32_1 = odm_get_bb_reg(dm, R_0xd14, MASKDWORD); + value32_2 = odm_get_bb_reg(dm, R_0xd50, MASKDWORD); + value32_3 = odm_get_bb_reg(dm, R_0xd54, MASKDWORD); cfo_acq_a = (s32)((value32 & 0x1fff0000) >> 16); cfo_end_a = (s32)((value32_1 & 0x1fff0000) >> 16); cfo_acq_b = (s32)((value32_2 & 0x1fff0000) >> 16); cfo_end_b = (s32)((value32_3 & 0x1fff0000) >> 16); - *diff_a = ((cfo_acq_a >= cfo_end_a) ? (cfo_acq_a - cfo_end_a) : (cfo_end_a - cfo_acq_a)); - *diff_b = ((cfo_acq_b >= cfo_end_b) ? (cfo_acq_b - cfo_end_b) : (cfo_end_b - cfo_acq_b)); - - *diff_a = ((*diff_a * 312) + (*diff_a >> 1)) >> 12; /* 312.5/2^12 */ - *diff_b = ((*diff_b * 312) + (*diff_b >> 1)) >> 12; /* 312.5/2^12 */ + *diff_a = ((cfo_acq_a >= cfo_end_a) ? (cfo_acq_a - cfo_end_a) : + (cfo_end_a - cfo_acq_a)); + *diff_b = ((cfo_acq_b >= cfo_end_b) ? (cfo_acq_b - cfo_end_b) : + (cfo_end_b - cfo_acq_b)); + *diff_a = ((*diff_a * 312) + (*diff_a >> 1)) >> 12; /* @312.5/2^12 */ + *diff_b = ((*diff_b * 312) + (*diff_b >> 1)) >> 12; /* @312.5/2^12 */ } -void -phydm_soml_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -) +void phydm_soml_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; u32 used = *_used; u32 out_len = *_out_len; + u32 dm_value[10] = {0}; + u8 i = 0, input_idx = 0; + + for (i = 0; i < 5; i++) { + if (input[i + 1]) { + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &dm_value[i]); + input_idx++; + } + } + + if (input_idx == 0) + return; if (dm_value[0] == 1) { /*Turn on/off SOML*/ - dm_soml_table->soml_select = (u8)dm_value[1]; + soml_tab->soml_select = (u8)dm_value[1]; } else if (dm_value[0] == 2) { /*training number for SOML*/ - dm_soml_table->soml_train_num = (u8)dm_value[1]; + soml_tab->soml_train_num = (u8)dm_value[1]; PDM_SNPF(out_len, used, output + used, out_len - used, - "soml_train_num = ((%d))\n", - dm_soml_table->soml_train_num); + "soml_train_num = ((%d))\n", + soml_tab->soml_train_num); } else if (dm_value[0] == 3) { /*training interval for SOML*/ - dm_soml_table->soml_intvl = (u8)dm_value[1]; + soml_tab->soml_intvl = (u8)dm_value[1]; PDM_SNPF(out_len, used, output + used, out_len - used, - "soml_intvl = ((%d))\n", - dm_soml_table->soml_intvl); - } else if (dm_value[0] == 4) { /*function period for SOML*/ + "soml_intvl = ((%d))\n", soml_tab->soml_intvl); + } else if (dm_value[0] == 4) { /*@function period for SOML*/ - dm_soml_table->soml_period = (u8)dm_value[1]; + soml_tab->soml_period = (u8)dm_value[1]; PDM_SNPF(out_len, used, output + used, out_len - used, - "soml_period = ((%d))\n", - dm_soml_table->soml_period); - } else if (dm_value[0] == 5) { /*delay_time for SOML*/ + "soml_period = ((%d))\n", soml_tab->soml_period); + } else if (dm_value[0] == 5) { /*@delay_time for SOML*/ - dm_soml_table->soml_delay_time = (u8)dm_value[1]; + soml_tab->soml_delay_time = (u8)dm_value[1]; PDM_SNPF(out_len, used, output + used, out_len - used, - "soml_delay_time = ((%d))\n", - dm_soml_table->soml_delay_time); - } else if (dm_value[0] == 6) { /* for SOML Rx QAM distribution th*/ + "soml_delay_time = ((%d))\n", + soml_tab->soml_delay_time); + } else if (dm_value[0] == 6) { /* @for SOML Rx QAM distribution th*/ if (dm_value[1] == 256) { - dm_soml_table->qam256_dist_th = (u8)dm_value[2]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "qam256_dist_th = ((%d))\n", - dm_soml_table->qam256_dist_th); + soml_tab->qam256_dist_th = (u8)dm_value[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "qam256_dist_th = ((%d))\n", + soml_tab->qam256_dist_th); } else if (dm_value[1] == 64) { - dm_soml_table->qam64_dist_th = (u8)dm_value[2]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "qam64_dist_th = ((%d))\n", - dm_soml_table->qam64_dist_th); + soml_tab->qam64_dist_th = (u8)dm_value[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "qam64_dist_th = ((%d))\n", + soml_tab->qam64_dist_th); } else if (dm_value[1] == 16) { - dm_soml_table->qam16_dist_th = (u8)dm_value[2]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "qam16_dist_th = ((%d))\n", - dm_soml_table->qam16_dist_th); + soml_tab->qam16_dist_th = (u8)dm_value[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "qam16_dist_th = ((%d))\n", + soml_tab->qam16_dist_th); } else if (dm_value[1] == 4) { - dm_soml_table->bpsk_qpsk_dist_th = (u8)dm_value[2]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "bpsk_qpsk_dist_th = ((%d))\n", - dm_soml_table->bpsk_qpsk_dist_th); + soml_tab->bpsk_qpsk_dist_th = (u8)dm_value[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "bpsk_qpsk_dist_th = ((%d))\n", + soml_tab->bpsk_qpsk_dist_th); } - } else if (dm_value[0] == 7) { /* for SOML cfo th*/ + } else if (dm_value[0] == 7) { /* @for SOML cfo th*/ if (dm_value[1] == 256) { - dm_soml_table->cfo_qam256_th = (u8)dm_value[2]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "cfo_qam256_th = ((%d KHz))\n", - dm_soml_table->cfo_qam256_th); + soml_tab->cfo_qam256_th = (u8)dm_value[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "cfo_qam256_th = ((%d KHz))\n", + soml_tab->cfo_qam256_th); } else if (dm_value[1] == 64) { - dm_soml_table->cfo_qam64_th = (u8)dm_value[2]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "cfo_qam64_th = ((%d KHz))\n", - dm_soml_table->cfo_qam64_th); + soml_tab->cfo_qam64_th = (u8)dm_value[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "cfo_qam64_th = ((%d KHz))\n", + soml_tab->cfo_qam64_th); } else if (dm_value[1] == 16) { - dm_soml_table->cfo_qam16_th = (u8)dm_value[2]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "cfo_qam16_th = ((%d KHz))\n", - dm_soml_table->cfo_qam16_th); + soml_tab->cfo_qam16_th = (u8)dm_value[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "cfo_qam16_th = ((%d KHz))\n", + soml_tab->cfo_qam16_th); } else if (dm_value[1] == 4) { - dm_soml_table->cfo_qpsk_th = (u8)dm_value[2]; - PDM_SNPF(out_len, used, output + used, - out_len - used, - "cfo_qpsk_th = ((%d KHz))\n", - dm_soml_table->cfo_qpsk_th); + soml_tab->cfo_qpsk_th = (u8)dm_value[2]; + PDM_SNPF(out_len, used, output + used, out_len - used, + "cfo_qpsk_th = ((%d KHz))\n", + soml_tab->cfo_qpsk_th); } - } else if (dm_value[0] == 100) { /*show parameters*/ + } else if (dm_value[0] == 100) { + /*show parameters*/ PDM_SNPF(out_len, used, output + used, out_len - used, - "soml_select = ((%d))\n", - dm_soml_table->soml_select); + "soml_select = ((%d))\n", soml_tab->soml_select); PDM_SNPF(out_len, used, output + used, out_len - used, - "soml_train_num = ((%d))\n", - dm_soml_table->soml_train_num); + "soml_train_num = ((%d))\n", + soml_tab->soml_train_num); PDM_SNPF(out_len, used, output + used, out_len - used, - "soml_intvl = ((%d))\n", - dm_soml_table->soml_intvl); + "soml_intvl = ((%d))\n", soml_tab->soml_intvl); PDM_SNPF(out_len, used, output + used, out_len - used, - "soml_period = ((%d))\n", - dm_soml_table->soml_period); + "soml_period = ((%d))\n", soml_tab->soml_period); PDM_SNPF(out_len, used, output + used, out_len - used, - "soml_delay_time = ((%d))\n\n", - dm_soml_table->soml_delay_time); + "soml_delay_time = ((%d))\n\n", + soml_tab->soml_delay_time); PDM_SNPF(out_len, used, output + used, out_len - used, - "qam256_dist_th = ((%d)), qam64_dist_th = ((%d)), ", - dm_soml_table->qam256_dist_th, - dm_soml_table->qam64_dist_th); + "qam256_dist_th = ((%d)), qam64_dist_th = ((%d)), ", + soml_tab->qam256_dist_th, + soml_tab->qam64_dist_th); PDM_SNPF(out_len, used, output + used, out_len - used, - "qam16_dist_th = ((%d)), bpsk_qpsk_dist_th = ((%d))\n", - dm_soml_table->qam16_dist_th, - dm_soml_table->bpsk_qpsk_dist_th); + "qam16_dist_th = ((%d)), bpsk_qpsk_dist_th = ((%d))\n", + soml_tab->qam16_dist_th, + soml_tab->bpsk_qpsk_dist_th); PDM_SNPF(out_len, used, output + used, out_len - used, - "cfo_qam256_th = ((%d KHz)), cfo_qam64_th = ((%d KHz)), ", - dm_soml_table->cfo_qam256_th, - dm_soml_table->cfo_qam64_th); + "cfo_qam256_th = ((%d KHz)), cfo_qam64_th = ((%d KHz)), ", + soml_tab->cfo_qam256_th, + soml_tab->cfo_qam64_th); PDM_SNPF(out_len, used, output + used, out_len - used, - "cfo_qam16_th = ((%d KHz)), cfo_qpsk_th = ((%d KHz))\n", - dm_soml_table->cfo_qam16_th, - dm_soml_table->cfo_qpsk_th); + "cfo_qam16_th = ((%d KHz)), cfo_qpsk_th = ((%d KHz))\n", + soml_tab->cfo_qam16_th, + soml_tab->cfo_qpsk_th); } *_used = used; *_out_len = out_len; } -void -phydm_soml_statistics( - void *dm_void, - u8 on_off_state - -) +void phydm_soml_stats_ht_on(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + u8 i, mcs0; + u16 num_bytes_diff, num_rate_diff; - u8 i; - u32 num_bytes_diff; - - if (dm->support_ic_type == ODM_RTL8197F) { - if (on_off_state == SOML_ON) { - for (i = 0; i < HT_RATE_IDX; i++) { - num_bytes_diff = dm_soml_table->num_ht_bytes[i] - dm_soml_table->pre_num_ht_bytes[i]; - dm_soml_table->num_ht_bytes_on[i] += num_bytes_diff; - dm_soml_table->pre_num_ht_bytes[i] = dm_soml_table->num_ht_bytes[i]; - } - } else if (on_off_state == SOML_OFF) { - for (i = 0; i < HT_RATE_IDX; i++) { - num_bytes_diff = dm_soml_table->num_ht_bytes[i] - dm_soml_table->pre_num_ht_bytes[i]; - dm_soml_table->num_ht_bytes_off[i] += num_bytes_diff; - dm_soml_table->pre_num_ht_bytes[i] = dm_soml_table->num_ht_bytes[i]; - } - } - } else if (dm->support_ic_type == ODM_RTL8822B) { - if (on_off_state == SOML_ON) { - for (i = 0; i < VHT_RATE_IDX; i++) { - num_bytes_diff = dm_soml_table->num_vht_bytes[i] - dm_soml_table->pre_num_vht_bytes[i]; - dm_soml_table->num_vht_bytes_on[i] += num_bytes_diff; - dm_soml_table->pre_num_vht_bytes[i] = dm_soml_table->num_vht_bytes[i]; - } - } else if (on_off_state == SOML_OFF) { - for (i = 0; i < VHT_RATE_IDX; i++) { - num_bytes_diff = dm_soml_table->num_vht_bytes[i] - dm_soml_table->pre_num_vht_bytes[i]; - dm_soml_table->num_vht_bytes_off[i] += num_bytes_diff; - dm_soml_table->pre_num_vht_bytes[i] = dm_soml_table->num_vht_bytes[i]; - } - } + mcs0 = ODM_RATEMCS0; + for (i = mcs0; i <= ODM_RATEMCS15; i++) { + num_rate_diff = soml_tab->ht_cnt[i - mcs0] - + soml_tab->pre_ht_cnt[i - mcs0]; + soml_tab->ht_cnt_on[i - mcs0] += num_rate_diff; + soml_tab->pre_ht_cnt[i - mcs0] = soml_tab->ht_cnt[i - mcs0]; + num_bytes_diff = soml_tab->ht_byte[i - mcs0] - + soml_tab->pre_ht_byte[i - mcs0]; + soml_tab->ht_byte_on[i - mcs0] += num_bytes_diff; + soml_tab->pre_ht_byte[i - mcs0] = soml_tab->ht_byte[i - mcs0]; } } -void -phydm_adsl( - void *dm_void -) +void phydm_soml_stats_ht_off(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + u8 i, mcs0; + u16 num_bytes_diff, num_rate_diff; - u8 i; - u8 next_on_off; - u8 rate_num = 1, rate_ss_shift = 0; - u32 byte_total_on = 0, byte_total_off = 0, num_total_qam = 0; - u32 ht_reset[HT_RATE_IDX] = {0}, vht_reset[VHT_RATE_IDX] = {0}; - u8 size = sizeof(ht_reset[0]); + mcs0 = ODM_RATEMCS0; + for (i = mcs0; i <= ODM_RATEMCS15; i++) { + num_rate_diff = soml_tab->ht_cnt[i - mcs0] - + soml_tab->pre_ht_cnt[i - mcs0]; + soml_tab->ht_cnt_off[i - mcs0] += num_rate_diff; + soml_tab->pre_ht_cnt[i - mcs0] = soml_tab->ht_cnt[i - mcs0]; + num_bytes_diff = soml_tab->ht_byte[i - mcs0] - + soml_tab->pre_ht_byte[i - mcs0]; + soml_tab->ht_byte_off[i - mcs0] += num_bytes_diff; + soml_tab->pre_ht_byte[i - mcs0] = soml_tab->ht_byte[i - mcs0]; + } +} - if (dm->support_ic_type & ODM_IC_4SS) - rate_num = 4; - else if (dm->support_ic_type & ODM_IC_3SS) - rate_num = 3; +void phydm_soml_stats_vht_on(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + u8 j, vht0; + u16 num_bytes_diff, num_rate_diff; + + vht0 = ODM_RATEVHTSS1MCS0; + for (j = vht0; j <= ODM_RATEVHTSS2MCS9; j++) { + num_rate_diff = soml_tab->vht_cnt[j - vht0] - + soml_tab->pre_vht_cnt[j - vht0]; + soml_tab->vht_cnt_on[j - vht0] += num_rate_diff; + soml_tab->pre_vht_cnt[j - vht0] = soml_tab->vht_cnt[j - vht0]; + num_bytes_diff = soml_tab->vht_byte[j - vht0] - + soml_tab->pre_vht_byte[j - vht0]; + soml_tab->vht_byte_on[j - vht0] += num_bytes_diff; + soml_tab->pre_vht_byte[j - vht0] = soml_tab->vht_byte[j - vht0]; + } +} + +void phydm_soml_stats_vht_off(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + u8 j, vht0; + u16 num_bytes_diff, num_rate_diff; + + vht0 = ODM_RATEVHTSS1MCS0; + for (j = vht0; j <= ODM_RATEVHTSS2MCS9; j++) { + num_rate_diff = soml_tab->vht_cnt[j - vht0] - + soml_tab->pre_vht_cnt[j - vht0]; + soml_tab->vht_cnt_off[j - vht0] += num_rate_diff; + soml_tab->pre_vht_cnt[j - vht0] = soml_tab->vht_cnt[j - vht0]; + num_bytes_diff = soml_tab->vht_byte[j - vht0] - + soml_tab->pre_vht_byte[j - vht0]; + soml_tab->vht_byte_off[j - vht0] += num_bytes_diff; + soml_tab->pre_vht_byte[j - vht0] = soml_tab->vht_byte[j - vht0]; + } +} + +void phydm_soml_statistics(void *dm_void, u8 on_off_state) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + + if (on_off_state == SOML_ON) { + if (*dm->channel <= 14) + phydm_soml_stats_ht_on(dm); + if (dm->support_ic_type == ODM_RTL8822B) + phydm_soml_stats_vht_on(dm); + } else if (on_off_state == SOML_OFF) { + if (*dm->channel <= 14) + phydm_soml_stats_ht_off(dm); + if (dm->support_ic_type == ODM_RTL8822B) + phydm_soml_stats_vht_off(dm); + } +} + +void phydm_adsl_init_state(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + + u8 next_on_off; + u16 ht_reset[HT_RATE_IDX] = {0}, vht_reset[VHT_RATE_IDX] = {0}; + u8 size = sizeof(ht_reset[0]); + + phydm_soml_reset_rx_rate(dm); + odm_move_memory(dm, soml_tab->ht_byte, ht_reset, + HT_RATE_IDX * size); + odm_move_memory(dm, soml_tab->ht_byte_on, ht_reset, + HT_RATE_IDX * size); + odm_move_memory(dm, soml_tab->ht_byte_off, ht_reset, + HT_RATE_IDX * size); + odm_move_memory(dm, soml_tab->vht_byte, vht_reset, + VHT_RATE_IDX * size); + odm_move_memory(dm, soml_tab->vht_byte_on, vht_reset, + VHT_RATE_IDX * size); + odm_move_memory(dm, soml_tab->vht_byte_off, vht_reset, + VHT_RATE_IDX * size); + if (dm->support_ic_type == ODM_RTL8822B) { + soml_tab->cfo_cnt++; + phydm_soml_cfo_process(dm, + &soml_tab->cfo_diff_a, + &soml_tab->cfo_diff_b); + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ (%d) cfo_diff_a = %d KHz; cfo_diff_b = %d KHz ]\n", + soml_tab->cfo_cnt, soml_tab->cfo_diff_a, + soml_tab->cfo_diff_b); + soml_tab->cfo_diff_sum_a += soml_tab->cfo_diff_a; + soml_tab->cfo_diff_sum_b += soml_tab->cfo_diff_b; + } + + soml_tab->is_soml_method_enable = 1; + #if (DM_ODM_SUPPORT_TYPE == ODM_AP) + odm_set_mac_reg(dm, R_0x608, BIT(8), 1); + /*RCR accepts CRC32-Error packets*/ + #endif + soml_tab->get_stats = false; + soml_tab->soml_state_cnt++; + next_on_off = (soml_tab->soml_on_off == SOML_ON) ? SOML_ON : SOML_OFF; + phydm_soml_on_off(dm, next_on_off); + odm_set_timer(dm, &soml_tab->phydm_adaptive_soml_timer, + soml_tab->soml_delay_time); /*@ms*/ +} + +void phydm_adsl_odd_state(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + u16 ht_reset[HT_RATE_IDX] = {0}, vht_reset[VHT_RATE_IDX] = {0}; + u8 size = sizeof(ht_reset[0]); + + soml_tab->get_stats = true; + soml_tab->soml_state_cnt++; + odm_move_memory(dm, soml_tab->pre_ht_cnt, soml_tab->ht_cnt, + HT_RATE_IDX * size); + odm_move_memory(dm, soml_tab->pre_vht_cnt, soml_tab->vht_cnt, + VHT_RATE_IDX * size); + odm_move_memory(dm, soml_tab->pre_ht_byte, soml_tab->ht_byte, + HT_RATE_IDX * size); + odm_move_memory(dm, soml_tab->pre_vht_byte, soml_tab->vht_byte, + VHT_RATE_IDX * size); + + if (dm->support_ic_type == ODM_RTL8822B) { + soml_tab->cfo_cnt++; + phydm_soml_cfo_process(dm, + &soml_tab->cfo_diff_a, + &soml_tab->cfo_diff_b); + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ (%d) cfo_diff_a = %d KHz; cfo_diff_b = %d KHz ]\n", + soml_tab->cfo_cnt, soml_tab->cfo_diff_a, + soml_tab->cfo_diff_b); + soml_tab->cfo_diff_sum_a += soml_tab->cfo_diff_a; + soml_tab->cfo_diff_sum_b += soml_tab->cfo_diff_b; + } + odm_set_timer(dm, &soml_tab->phydm_adaptive_soml_timer, + soml_tab->soml_intvl); /*@ms*/ +} + +void phydm_adsl_even_state(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + u8 next_on_off; + + soml_tab->get_stats = false; + if (dm->support_ic_type == ODM_RTL8822B) { + soml_tab->cfo_cnt++; + phydm_soml_cfo_process(dm, + &soml_tab->cfo_diff_a, + &soml_tab->cfo_diff_b); + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ (%d) cfo_diff_a = %d KHz; cfo_diff_b = %d KHz ]\n", + soml_tab->cfo_cnt, soml_tab->cfo_diff_a, + soml_tab->cfo_diff_b); + soml_tab->cfo_diff_sum_a += soml_tab->cfo_diff_a; + soml_tab->cfo_diff_sum_b += soml_tab->cfo_diff_b; + } + soml_tab->soml_state_cnt++; + phydm_soml_statistics(dm, soml_tab->soml_on_off); + next_on_off = (soml_tab->soml_on_off == SOML_ON) ? SOML_OFF : SOML_ON; + phydm_soml_on_off(dm, next_on_off); + odm_set_timer(dm, &soml_tab->phydm_adaptive_soml_timer, + soml_tab->soml_delay_time); /*@ms*/ +} + +void phydm_adsl_decision_state(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + boolean on_above = false, off_above = false; + u8 i, max_idx_on = 0, max_idx_off = 0; + u8 next_on_off = soml_tab->soml_last_state; + u8 mcs0 = ODM_RATEMCS0, vht0 = ODM_RATEVHTSS1MCS0; + u8 crc_taget = soml_tab->soml_last_state; + u8 rate_num = 1, ss_shift = 0; + u16 ht_ok_max_on = 0, ht_fail_max_on = 0, utility_on = 0; + u16 ht_ok_max_off = 0, ht_fail_max_off = 0, utility_off = 0; + u16 vht_ok_max_on = 0, vht_fail_max_on = 0; + u16 vht_ok_max_off = 0, vht_fail_max_off = 0; + u16 num_total_qam = 0; + u16 cnt_max_on = 0, cnt_max_off = 0; + u32 ht_total_cnt_on = 0, ht_total_cnt_off = 0; + u32 total_ht_rate_on = 0, total_ht_rate_off = 0; + u32 vht_total_cnt_on = 0, vht_total_cnt_off = 0; + u32 total_vht_rate_on = 0, total_vht_rate_off = 0; + u32 rate_per_pkt_on = 0, rate_per_pkt_off = 0; + s32 cfo_diff_avg_a, cfo_diff_avg_b; + u16 vht_phy_rate_table[] = { + /*@20M*/ + 6, 13, 19, 26, 39, 52, 58, 65, 78, 90, /*@1SS MCS0~9*/ + 13, 26, 39, 52, 78, 104, 117, 130, 156, 180 /*@2SSMCS0~9*/ + }; + + if (dm->support_ic_type & ODM_IC_1SS) + rate_num = 1; + #ifdef PHYDM_COMPILE_ABOVE_2SS else if (dm->support_ic_type & ODM_IC_2SS) rate_num = 2; + #endif + #ifdef PHYDM_COMPILE_ABOVE_3SS + else if (dm->support_ic_type & ODM_IC_3SS) + rate_num = 3; + #endif + #ifdef PHYDM_COMPILE_ABOVE_4SS + else if (dm->support_ic_type & ODM_IC_4SS) + rate_num = 4; + #endif + else + pr_debug("%s: mismatch IC type %x\n", __func__, + dm->support_ic_type); + soml_tab->get_stats = false; + #if (DM_ODM_SUPPORT_TYPE == ODM_AP) + odm_set_mac_reg(dm, R_0x608, BIT(8), 0); + /* NOT Accept CRC32 Error packets. */ + #endif + PHYDM_DBG(dm, DBG_ADPTV_SOML, "[Decisoin state ]\n"); + phydm_soml_statistics(dm, soml_tab->soml_on_off); + if (*dm->channel <= 14) { + /* @[Search 1st and 2nd rate by counter] */ + for (i = 0; i < rate_num; i++) { + ss_shift = (i << 3); + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "*ht_cnt_on HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", + (ss_shift), (ss_shift + 7), + soml_tab->ht_cnt_on[ss_shift + 0], + soml_tab->ht_cnt_on[ss_shift + 1], + soml_tab->ht_cnt_on[ss_shift + 2], + soml_tab->ht_cnt_on[ss_shift + 3], + soml_tab->ht_cnt_on[ss_shift + 4], + soml_tab->ht_cnt_on[ss_shift + 5], + soml_tab->ht_cnt_on[ss_shift + 6], + soml_tab->ht_cnt_on[ss_shift + 7]); + } - if ((dm->support_ic_type & ODM_ADAPTIVE_SOML_SUPPORT_IC)) { - if (TRUE) { - if ((dm->rssi_min >= SOML_RSSI_TH_HIGH) || (dm_soml_table->is_soml_method_enable == 1)) { - PHYDM_DBG(dm, DBG_ADPTV_SOML, "> TH_H || is_soml_method_enable==1\n"); - PHYDM_DBG(dm, DBG_ADPTV_SOML, "soml_state_cnt =((%d)), soml_on_off =((%s))\n", dm_soml_table->soml_state_cnt, (dm_soml_table->soml_on_off == SOML_ON) ? "SOML_ON" : "SOML_OFF"); - /*Traning state: 0(alt) 1(ori) 2(alt) 3(ori)============================================================*/ - if (dm_soml_table->soml_state_cnt < ((dm_soml_table->soml_train_num)<<1)) { - if (dm_soml_table->soml_state_cnt == 0) { - if (dm->support_ic_type == ODM_RTL8197F) { - odm_move_memory(dm, dm_soml_table->num_ht_bytes, ht_reset, HT_RATE_IDX*size); - odm_move_memory(dm, dm_soml_table->num_ht_bytes_on, ht_reset, HT_RATE_IDX*size); - odm_move_memory(dm, dm_soml_table->num_ht_bytes_off, ht_reset, HT_RATE_IDX*size); - } else if (dm->support_ic_type == ODM_RTL8822B) { - odm_move_memory(dm, dm_soml_table->num_vht_bytes, vht_reset, VHT_RATE_IDX*size); - odm_move_memory(dm, dm_soml_table->num_vht_bytes_on, vht_reset, VHT_RATE_IDX*size); - odm_move_memory(dm, dm_soml_table->num_vht_bytes_off, vht_reset, VHT_RATE_IDX*size); - dm_soml_table->cfo_counter++; - phydm_soml_cfo_process(dm, - &dm_soml_table->cfo_diff_a, - &dm_soml_table->cfo_diff_b); - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ (%d) cfo_diff_a = %d KHz; cfo_diff_b = %d KHz ]\n", dm_soml_table->cfo_counter, dm_soml_table->cfo_diff_a, dm_soml_table->cfo_diff_b); - dm_soml_table->cfo_diff_sum_a += dm_soml_table->cfo_diff_a; - dm_soml_table->cfo_diff_sum_b += dm_soml_table->cfo_diff_b; - } + for (i = 0; i < rate_num; i++) { + ss_shift = (i << 3); + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "*ht_cnt_off HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", + (ss_shift), (ss_shift + 7), + soml_tab->ht_cnt_off[ss_shift + 0], + soml_tab->ht_cnt_off[ss_shift + 1], + soml_tab->ht_cnt_off[ss_shift + 2], + soml_tab->ht_cnt_off[ss_shift + 3], + soml_tab->ht_cnt_off[ss_shift + 4], + soml_tab->ht_cnt_off[ss_shift + 5], + soml_tab->ht_cnt_off[ss_shift + 6], + soml_tab->ht_cnt_off[ss_shift + 7]); + } - dm_soml_table->is_soml_method_enable = 1; - dm_soml_table->soml_state_cnt++; - next_on_off = (dm_soml_table->soml_on_off == SOML_ON) ? SOML_ON : SOML_OFF; - phydm_soml_on_off(dm, next_on_off); - odm_set_timer(dm, &dm_soml_table->phydm_adaptive_soml_timer, dm_soml_table->soml_delay_time); /*ms*/ - } else if ((dm_soml_table->soml_state_cnt % 2) != 0) { - dm_soml_table->soml_state_cnt++; - if (dm->support_ic_type == ODM_RTL8197F) - odm_move_memory(dm, dm_soml_table->pre_num_ht_bytes, dm_soml_table->num_ht_bytes, HT_RATE_IDX*size); - else if (dm->support_ic_type == ODM_RTL8822B) { - odm_move_memory(dm, dm_soml_table->pre_num_vht_bytes, dm_soml_table->num_vht_bytes, VHT_RATE_IDX*size); - dm_soml_table->cfo_counter++; - phydm_soml_cfo_process(dm, - &dm_soml_table->cfo_diff_a, - &dm_soml_table->cfo_diff_b); - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ (%d) cfo_diff_a = %d KHz; cfo_diff_b = %d KHz ]\n", dm_soml_table->cfo_counter, dm_soml_table->cfo_diff_a, dm_soml_table->cfo_diff_b); - dm_soml_table->cfo_diff_sum_a += dm_soml_table->cfo_diff_a; - dm_soml_table->cfo_diff_sum_b += dm_soml_table->cfo_diff_b; - } - odm_set_timer(dm, &dm_soml_table->phydm_adaptive_soml_timer, dm_soml_table->soml_intvl); /*ms*/ - } else if ((dm_soml_table->soml_state_cnt % 2) == 0) { - if (dm->support_ic_type == ODM_RTL8822B) { - dm_soml_table->cfo_counter++; - phydm_soml_cfo_process(dm, - &dm_soml_table->cfo_diff_a, - &dm_soml_table->cfo_diff_b); - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ (%d) cfo_diff_a = %d KHz; cfo_diff_b = %d KHz ]\n", dm_soml_table->cfo_counter, dm_soml_table->cfo_diff_a, dm_soml_table->cfo_diff_b); - dm_soml_table->cfo_diff_sum_a += dm_soml_table->cfo_diff_a; - dm_soml_table->cfo_diff_sum_b += dm_soml_table->cfo_diff_b; - } - dm_soml_table->soml_state_cnt++; - phydm_soml_statistics(dm, dm_soml_table->soml_on_off); - next_on_off = (dm_soml_table->soml_on_off == SOML_ON) ? SOML_OFF : SOML_ON; - phydm_soml_on_off(dm, next_on_off); - odm_set_timer(dm, &dm_soml_table->phydm_adaptive_soml_timer, dm_soml_table->soml_delay_time); /*ms*/ - } - } - /*Decision state: ==============================================================*/ - else { - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[Decisoin state ]\n"); - phydm_soml_statistics(dm, dm_soml_table->soml_on_off); - dm_soml_table->cfo_diff_avg_a = (dm_soml_table->cfo_counter != 0) ? (dm_soml_table->cfo_diff_sum_a / dm_soml_table->cfo_counter) : 0; - dm_soml_table->cfo_diff_avg_b = (dm_soml_table->cfo_counter != 0) ? (dm_soml_table->cfo_diff_sum_b / dm_soml_table->cfo_counter) : 0; - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ cfo_diff_avg_a = %d KHz; cfo_diff_avg_b = %d KHz]\n", dm_soml_table->cfo_diff_avg_a, dm_soml_table->cfo_diff_avg_b); + for (i = 0; i < rate_num; i++) { + ss_shift = (i << 3); + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "*ht_crc_ok_cnt_on HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", + (ss_shift), (ss_shift + 7), + soml_tab->ht_crc_ok_cnt_on[ss_shift + 0], + soml_tab->ht_crc_ok_cnt_on[ss_shift + 1], + soml_tab->ht_crc_ok_cnt_on[ss_shift + 2], + soml_tab->ht_crc_ok_cnt_on[ss_shift + 3], + soml_tab->ht_crc_ok_cnt_on[ss_shift + 4], + soml_tab->ht_crc_ok_cnt_on[ss_shift + 5], + soml_tab->ht_crc_ok_cnt_on[ss_shift + 6], + soml_tab->ht_crc_ok_cnt_on[ss_shift + 7]); + } - /* [Search 1st and 2ed rate by counter] */ - if (dm->support_ic_type == ODM_RTL8197F) { - for (i = 0; i < rate_num; i++) { - rate_ss_shift = (i << 3); - PHYDM_DBG(dm, DBG_ADPTV_SOML, "*num_ht_bytes_on HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", - (rate_ss_shift), (rate_ss_shift+7), - dm_soml_table->num_ht_bytes_on[rate_ss_shift + 0], dm_soml_table->num_ht_bytes_on[rate_ss_shift + 1], - dm_soml_table->num_ht_bytes_on[rate_ss_shift + 2], dm_soml_table->num_ht_bytes_on[rate_ss_shift + 3], - dm_soml_table->num_ht_bytes_on[rate_ss_shift + 4], dm_soml_table->num_ht_bytes_on[rate_ss_shift + 5], - dm_soml_table->num_ht_bytes_on[rate_ss_shift + 6], dm_soml_table->num_ht_bytes_on[rate_ss_shift + 7]); - } + for (i = 0; i < rate_num; i++) { + ss_shift = (i << 3); + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "*ht_crc_fail_cnt_on HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", + (ss_shift), (ss_shift + 7), + soml_tab->ht_crc_fail_cnt_on[ss_shift + 0], + soml_tab->ht_crc_fail_cnt_on[ss_shift + 1], + soml_tab->ht_crc_fail_cnt_on[ss_shift + 2], + soml_tab->ht_crc_fail_cnt_on[ss_shift + 3], + soml_tab->ht_crc_fail_cnt_on[ss_shift + 4], + soml_tab->ht_crc_fail_cnt_on[ss_shift + 5], + soml_tab->ht_crc_fail_cnt_on[ss_shift + 6], + soml_tab->ht_crc_fail_cnt_on[ss_shift + 7]); + } - for (i = 0; i < rate_num; i++) { - rate_ss_shift = (i << 3); - PHYDM_DBG(dm, DBG_ADPTV_SOML, "*num_ht_bytes_off HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", - (rate_ss_shift), (rate_ss_shift+7), - dm_soml_table->num_ht_bytes_off[rate_ss_shift + 0], dm_soml_table->num_ht_bytes_off[rate_ss_shift + 1], - dm_soml_table->num_ht_bytes_off[rate_ss_shift + 2], dm_soml_table->num_ht_bytes_off[rate_ss_shift + 3], - dm_soml_table->num_ht_bytes_off[rate_ss_shift + 4], dm_soml_table->num_ht_bytes_off[rate_ss_shift + 5], - dm_soml_table->num_ht_bytes_off[rate_ss_shift + 6], dm_soml_table->num_ht_bytes_off[rate_ss_shift + 7]); - } + for (i = 0; i < rate_num; i++) { + ss_shift = (i << 3); + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "*ht_crc_ok_cnt_off HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", + (ss_shift), (ss_shift + 7), + soml_tab->ht_crc_ok_cnt_off[ss_shift + 0], + soml_tab->ht_crc_ok_cnt_off[ss_shift + 1], + soml_tab->ht_crc_ok_cnt_off[ss_shift + 2], + soml_tab->ht_crc_ok_cnt_off[ss_shift + 3], + soml_tab->ht_crc_ok_cnt_off[ss_shift + 4], + soml_tab->ht_crc_ok_cnt_off[ss_shift + 5], + soml_tab->ht_crc_ok_cnt_off[ss_shift + 6], + soml_tab->ht_crc_ok_cnt_off[ss_shift + 7]); + } - for (i = 0; i < HT_RATE_IDX; i++) { - byte_total_on += dm_soml_table->num_ht_bytes_on[i]; - byte_total_off += dm_soml_table->num_ht_bytes_off[i]; - } - - } else if (dm->support_ic_type == ODM_RTL8822B) { - for (i = 0; i < VHT_ORDER_TYPE; i++) - num_total_qam += dm_soml_table->num_vht_qam[i]; - - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ ((2SS)) BPSK_QPSK_count = %d ; 16QAM_count = %d ; 64QAM_count = %d ; 256QAM_count = %d ; num_total_qam = %d]\n", dm_soml_table->num_vht_qam[BPSK_QPSK], dm_soml_table->num_vht_qam[QAM16], dm_soml_table->num_vht_qam[QAM64], dm_soml_table->num_vht_qam[QAM256], num_total_qam); - if (((dm_soml_table->num_vht_qam[QAM256] * 100) > (num_total_qam * dm_soml_table->qam256_dist_th)) && (dm_soml_table->cfo_diff_avg_a > dm_soml_table->cfo_qam256_th) && (dm_soml_table->cfo_diff_avg_b > dm_soml_table->cfo_qam256_th)) { - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ QAM256_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n", dm_soml_table->qam256_dist_th, dm_soml_table->cfo_qam256_th); - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); - phydm_soml_on_off(dm, SOML_OFF); - return; - } else if (((dm_soml_table->num_vht_qam[QAM64] * 100) > (num_total_qam * dm_soml_table->qam64_dist_th)) && (dm_soml_table->cfo_diff_avg_a > dm_soml_table->cfo_qam64_th) && (dm_soml_table->cfo_diff_avg_b > dm_soml_table->cfo_qam64_th)) { - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ QAM64_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n", dm_soml_table->qam64_dist_th, dm_soml_table->cfo_qam64_th); - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); - phydm_soml_on_off(dm, SOML_OFF); - return; - } else if (((dm_soml_table->num_vht_qam[QAM16] * 100) > (num_total_qam * dm_soml_table->qam16_dist_th)) && (dm_soml_table->cfo_diff_avg_a > dm_soml_table->cfo_qam16_th) && (dm_soml_table->cfo_diff_avg_b > dm_soml_table->cfo_qam16_th)) { - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ QAM16_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n", dm_soml_table->qam16_dist_th, dm_soml_table->cfo_qam16_th); - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); - phydm_soml_on_off(dm, SOML_OFF); - return; - } else if (((dm_soml_table->num_vht_qam[BPSK_QPSK] * 100) > (num_total_qam * dm_soml_table->bpsk_qpsk_dist_th)) && (dm_soml_table->cfo_diff_avg_a > dm_soml_table->cfo_qpsk_th) && (dm_soml_table->cfo_diff_avg_b > dm_soml_table->cfo_qpsk_th)) { - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ BPSK_QPSK_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n", dm_soml_table->bpsk_qpsk_dist_th, dm_soml_table->cfo_qpsk_th); - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); - phydm_soml_on_off(dm, SOML_OFF); - return; - } - - for (i = 0; i < rate_num; i++) { - rate_ss_shift = 10 * i; - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ num_vht_bytes_on VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d} ]\n", - (i + 1), - dm_soml_table->num_vht_bytes_on[rate_ss_shift + 0], dm_soml_table->num_vht_bytes_on[rate_ss_shift + 1], - dm_soml_table->num_vht_bytes_on[rate_ss_shift + 2], dm_soml_table->num_vht_bytes_on[rate_ss_shift + 3], - dm_soml_table->num_vht_bytes_on[rate_ss_shift + 4], dm_soml_table->num_vht_bytes_on[rate_ss_shift + 5], - dm_soml_table->num_vht_bytes_on[rate_ss_shift + 6], dm_soml_table->num_vht_bytes_on[rate_ss_shift + 7], - dm_soml_table->num_vht_bytes_on[rate_ss_shift + 8], dm_soml_table->num_vht_bytes_on[rate_ss_shift + 9]); - } - - for (i = 0; i < rate_num; i++) { - rate_ss_shift = 10 * i; - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ num_vht_bytes_off VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d} ]\n", - (i + 1), - dm_soml_table->num_vht_bytes_off[rate_ss_shift + 0], dm_soml_table->num_vht_bytes_off[rate_ss_shift + 1], - dm_soml_table->num_vht_bytes_off[rate_ss_shift + 2], dm_soml_table->num_vht_bytes_off[rate_ss_shift + 3], - dm_soml_table->num_vht_bytes_off[rate_ss_shift + 4], dm_soml_table->num_vht_bytes_off[rate_ss_shift + 5], - dm_soml_table->num_vht_bytes_off[rate_ss_shift + 6], dm_soml_table->num_vht_bytes_off[rate_ss_shift + 7], - dm_soml_table->num_vht_bytes_off[rate_ss_shift + 8], dm_soml_table->num_vht_bytes_off[rate_ss_shift + 9]); - } - - for (i = 0; i < VHT_RATE_IDX; i++) { - byte_total_on += dm_soml_table->num_vht_bytes_on[i]; - byte_total_off += dm_soml_table->num_vht_bytes_off[i]; - } - - } - - /* [Decision] */ - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ byte_total_on = %d ; byte_total_off = %d ]\n", byte_total_on, byte_total_off); - if (byte_total_on > byte_total_off) { - next_on_off = SOML_ON; - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ byte_total_on > byte_total_off ==> SOML_ON ]\n"); - } else if (byte_total_on < byte_total_off) { - next_on_off = SOML_OFF; - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ byte_total_on < byte_total_off ==> SOML_OFF ]\n"); - } else { - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ stay at soml_last_state ]\n"); - next_on_off = dm_soml_table->soml_last_state; - } - - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); - phydm_soml_on_off(dm, next_on_off); - dm_soml_table->soml_last_state = next_on_off; - } - } else { - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[escape from > TH_H || is_soml_method_enable==1]\n"); - phydm_adaptive_soml_reset(dm); - phydm_soml_on_off(dm, SOML_ON); + for (i = 0; i < rate_num; i++) { + ss_shift = (i << 3); + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "*ht_crc_fail_cnt_off HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", + (ss_shift), (ss_shift + 7), + soml_tab->ht_crc_fail_cnt_off[ss_shift + 0], + soml_tab->ht_crc_fail_cnt_off[ss_shift + 1], + soml_tab->ht_crc_fail_cnt_off[ss_shift + 2], + soml_tab->ht_crc_fail_cnt_off[ss_shift + 3], + soml_tab->ht_crc_fail_cnt_off[ss_shift + 4], + soml_tab->ht_crc_fail_cnt_off[ss_shift + 5], + soml_tab->ht_crc_fail_cnt_off[ss_shift + 6], + soml_tab->ht_crc_fail_cnt_off[ss_shift + 7]); + } + for (i = ODM_RATEMCS0; i <= ODM_RATEMCS15; i++) { + ht_total_cnt_on += soml_tab->ht_cnt_on[i - mcs0]; + ht_total_cnt_off += soml_tab->ht_cnt_off[i - mcs0]; + total_ht_rate_on += (soml_tab->ht_cnt_on[i - mcs0] * + phy_rate_table[i]); + total_ht_rate_off += (soml_tab->ht_cnt_off[i - mcs0] * + phy_rate_table[i]); + if (soml_tab->ht_cnt_on[i - mcs0] > cnt_max_on) { + cnt_max_on = soml_tab->ht_cnt_on[i - mcs0]; + max_idx_on = i - mcs0; } - } else { - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[number_active_client != 1]\n"); - phydm_adaptive_soml_reset(dm); + + if (soml_tab->ht_cnt_off[i - mcs0] > cnt_max_off) { + cnt_max_off = soml_tab->ht_cnt_off[i - mcs0]; + max_idx_off = i - mcs0; + } + } + total_ht_rate_on = total_ht_rate_on << 3; + total_ht_rate_off = total_ht_rate_off << 3; + rate_per_pkt_on = (ht_total_cnt_on != 0) ? + (total_ht_rate_on / ht_total_cnt_on) : 0; + rate_per_pkt_off = (ht_total_cnt_off != 0) ? + (total_ht_rate_off / ht_total_cnt_off) : 0; + #if (DM_ODM_SUPPORT_TYPE == ODM_AP) + ht_ok_max_on = soml_tab->ht_crc_ok_cnt_on[max_idx_on]; + ht_fail_max_on = soml_tab->ht_crc_fail_cnt_on[max_idx_on]; + ht_ok_max_off = soml_tab->ht_crc_ok_cnt_off[max_idx_off]; + ht_fail_max_off = soml_tab->ht_crc_fail_cnt_off[max_idx_off]; + + if (ht_fail_max_on == 0) + ht_fail_max_on = 1; + + if (ht_fail_max_off == 0) + ht_fail_max_off = 1; + + if (ht_ok_max_on > ht_fail_max_on) + on_above = true; + + if (ht_ok_max_off > ht_fail_max_off) + off_above = true; + + if (on_above && !off_above) { + crc_taget = SOML_ON; + } else if (!on_above && off_above) { + crc_taget = SOML_OFF; + } else if (on_above && off_above) { + utility_on = (ht_ok_max_on << 7) / ht_fail_max_on; + utility_off = (ht_ok_max_off << 7) / ht_fail_max_off; + crc_taget = (utility_on == utility_off) ? + (soml_tab->soml_last_state) : + ((utility_on > utility_off) ? SOML_ON : + SOML_OFF); + + } else if (!on_above && !off_above) { + if (ht_ok_max_on == 0) + ht_ok_max_on = 1; + if (ht_ok_max_off == 0) + ht_ok_max_off = 1; + utility_on = (ht_fail_max_on << 7) / ht_ok_max_on; + utility_off = (ht_fail_max_off << 7) / ht_ok_max_off; + crc_taget = (utility_on == utility_off) ? + (soml_tab->soml_last_state) : + ((utility_on < utility_off) ? SOML_ON : + SOML_OFF); + } + #endif + } else if (dm->support_ic_type == ODM_RTL8822B) { + cfo_diff_avg_a = soml_tab->cfo_diff_sum_a / soml_tab->cfo_cnt; + cfo_diff_avg_b = soml_tab->cfo_diff_sum_b / soml_tab->cfo_cnt; + soml_tab->cfo_diff_avg_a = (soml_tab->cfo_cnt != 0) ? + cfo_diff_avg_a : 0; + soml_tab->cfo_diff_avg_b = (soml_tab->cfo_cnt != 0) ? + cfo_diff_avg_b : 0; + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ cfo_diff_avg_a = %d KHz; cfo_diff_avg_b = %d KHz]\n", + soml_tab->cfo_diff_avg_a, + soml_tab->cfo_diff_avg_b); + for (i = 0; i < VHT_ORDER_TYPE; i++) + num_total_qam += soml_tab->num_vht_qam[i]; + + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ ((2SS)) BPSK_QPSK_count = %d ; 16QAM_count = %d ; 64QAM_count = %d ; 256QAM_count = %d ; num_total_qam = %d]\n", + soml_tab->num_vht_qam[BPSK_QPSK], + soml_tab->num_vht_qam[QAM16], + soml_tab->num_vht_qam[QAM64], + soml_tab->num_vht_qam[QAM256], + num_total_qam); + if (((soml_tab->num_vht_qam[QAM256] * 100) > + (num_total_qam * soml_tab->qam256_dist_th)) && + cfo_diff_avg_a > soml_tab->cfo_qam256_th && + cfo_diff_avg_b > soml_tab->cfo_qam256_th) { + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ QAM256_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n", + soml_tab->qam256_dist_th, + soml_tab->cfo_qam256_th); + PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); phydm_soml_on_off(dm, SOML_OFF); + return; + } else if (((soml_tab->num_vht_qam[QAM64] * 100) > + (num_total_qam * soml_tab->qam64_dist_th)) && + (cfo_diff_avg_a > soml_tab->cfo_qam64_th) && + (cfo_diff_avg_b > soml_tab->cfo_qam64_th)) { + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ QAM64_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n", + soml_tab->qam64_dist_th, + soml_tab->cfo_qam64_th); + PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); + phydm_soml_on_off(dm, SOML_OFF); + return; + } else if (((soml_tab->num_vht_qam[QAM16] * 100) > + (num_total_qam * soml_tab->qam16_dist_th)) && + (cfo_diff_avg_a > soml_tab->cfo_qam16_th) && + (cfo_diff_avg_b > soml_tab->cfo_qam16_th)) { + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ QAM16_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n", + soml_tab->qam16_dist_th, + soml_tab->cfo_qam16_th); + PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); + phydm_soml_on_off(dm, SOML_OFF); + return; + } else if (((soml_tab->num_vht_qam[BPSK_QPSK] * 100) > + (num_total_qam * soml_tab->bpsk_qpsk_dist_th)) && + (cfo_diff_avg_a > soml_tab->cfo_qpsk_th) && + (cfo_diff_avg_b > soml_tab->cfo_qpsk_th)) { + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ BPSK_QPSK_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n", + soml_tab->bpsk_qpsk_dist_th, + soml_tab->cfo_qpsk_th); + PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); + phydm_soml_on_off(dm, SOML_OFF); + return; + } + + for (i = 0; i < rate_num; i++) { + ss_shift = 10 * i; + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ vht_cnt_on VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d} ]\n", + (i + 1), + soml_tab->vht_cnt_on[ss_shift + 0], + soml_tab->vht_cnt_on[ss_shift + 1], + soml_tab->vht_cnt_on[ss_shift + 2], + soml_tab->vht_cnt_on[ss_shift + 3], + soml_tab->vht_cnt_on[ss_shift + 4], + soml_tab->vht_cnt_on[ss_shift + 5], + soml_tab->vht_cnt_on[ss_shift + 6], + soml_tab->vht_cnt_on[ss_shift + 7], + soml_tab->vht_cnt_on[ss_shift + 8], + soml_tab->vht_cnt_on[ss_shift + 9]); + } + + for (i = 0; i < rate_num; i++) { + ss_shift = 10 * i; + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ vht_cnt_off VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d} ]\n", + (i + 1), + soml_tab->vht_cnt_off[ss_shift + 0], + soml_tab->vht_cnt_off[ss_shift + 1], + soml_tab->vht_cnt_off[ss_shift + 2], + soml_tab->vht_cnt_off[ss_shift + 3], + soml_tab->vht_cnt_off[ss_shift + 4], + soml_tab->vht_cnt_off[ss_shift + 5], + soml_tab->vht_cnt_off[ss_shift + 6], + soml_tab->vht_cnt_off[ss_shift + 7], + soml_tab->vht_cnt_off[ss_shift + 8], + soml_tab->vht_cnt_off[ss_shift + 9]); + } + + for (i = 0; i < rate_num; i++) { + ss_shift = 10 * i; + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "*vht_crc_ok_cnt_on VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", + (i + 1), + soml_tab->vht_crc_ok_cnt_on[ss_shift + 0], + soml_tab->vht_crc_ok_cnt_on[ss_shift + 1], + soml_tab->vht_crc_ok_cnt_on[ss_shift + 2], + soml_tab->vht_crc_ok_cnt_on[ss_shift + 3], + soml_tab->vht_crc_ok_cnt_on[ss_shift + 4], + soml_tab->vht_crc_ok_cnt_on[ss_shift + 5], + soml_tab->vht_crc_ok_cnt_on[ss_shift + 6], + soml_tab->vht_crc_ok_cnt_on[ss_shift + 7], + soml_tab->vht_crc_ok_cnt_on[ss_shift + 8], + soml_tab->vht_crc_ok_cnt_on[ss_shift + 9]); + } + for (i = 0; i < rate_num; i++) { + ss_shift = 10 * i; + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "*vht_crc_fail_cnt_on VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", + (i + 1), + soml_tab->vht_crc_fail_cnt_on[ss_shift + 0], + soml_tab->vht_crc_fail_cnt_on[ss_shift + 1], + soml_tab->vht_crc_fail_cnt_on[ss_shift + 2], + soml_tab->vht_crc_fail_cnt_on[ss_shift + 3], + soml_tab->vht_crc_fail_cnt_on[ss_shift + 4], + soml_tab->vht_crc_fail_cnt_on[ss_shift + 5], + soml_tab->vht_crc_fail_cnt_on[ss_shift + 6], + soml_tab->vht_crc_fail_cnt_on[ss_shift + 7], + soml_tab->vht_crc_fail_cnt_on[ss_shift + 8], + soml_tab->vht_crc_fail_cnt_on[ss_shift + 9]); + } + for (i = 0; i < rate_num; i++) { + ss_shift = 10 * i; + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "*vht_crc_ok_cnt_off VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", + (i + 1), + soml_tab->vht_crc_ok_cnt_off[ss_shift + 0], + soml_tab->vht_crc_ok_cnt_off[ss_shift + 1], + soml_tab->vht_crc_ok_cnt_off[ss_shift + 2], + soml_tab->vht_crc_ok_cnt_off[ss_shift + 3], + soml_tab->vht_crc_ok_cnt_off[ss_shift + 4], + soml_tab->vht_crc_ok_cnt_off[ss_shift + 5], + soml_tab->vht_crc_ok_cnt_off[ss_shift + 6], + soml_tab->vht_crc_ok_cnt_off[ss_shift + 7], + soml_tab->vht_crc_ok_cnt_off[ss_shift + 8], + soml_tab->vht_crc_ok_cnt_off[ss_shift + 9]); + } + for (i = 0; i < rate_num; i++) { + ss_shift = 10 * i; + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "*vht_crc_fail_cnt_off VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", + (i + 1), + soml_tab->vht_crc_fail_cnt_off[ss_shift + 0], + soml_tab->vht_crc_fail_cnt_off[ss_shift + 1], + soml_tab->vht_crc_fail_cnt_off[ss_shift + 2], + soml_tab->vht_crc_fail_cnt_off[ss_shift + 3], + soml_tab->vht_crc_fail_cnt_off[ss_shift + 4], + soml_tab->vht_crc_fail_cnt_off[ss_shift + 5], + soml_tab->vht_crc_fail_cnt_off[ss_shift + 6], + soml_tab->vht_crc_fail_cnt_off[ss_shift + 7], + soml_tab->vht_crc_fail_cnt_off[ss_shift + 8], + soml_tab->vht_crc_fail_cnt_off[ss_shift + 9]); + } + + for (i = ODM_RATEVHTSS2MCS0; i <= ODM_RATEVHTSS2MCS9; i++) { + vht_total_cnt_on += soml_tab->vht_cnt_on[i - vht0]; + vht_total_cnt_off += soml_tab->vht_cnt_off[i - vht0]; + total_vht_rate_on += (soml_tab->vht_cnt_on[i - vht0] * + vht_phy_rate_table[i - vht0]); + total_vht_rate_off += (soml_tab->vht_cnt_off[i - vht0] * + vht_phy_rate_table[i - vht0]); + + if (soml_tab->vht_cnt_on[i - vht0] > cnt_max_on) { + cnt_max_on = soml_tab->vht_cnt_on[i - vht0]; + max_idx_on = i - vht0; + } + + if (soml_tab->vht_cnt_off[i - vht0] > cnt_max_off) { + cnt_max_off = soml_tab->vht_cnt_off[i - vht0]; + max_idx_off = i - vht0; + } + } + total_vht_rate_on = total_vht_rate_on << 3; + total_vht_rate_off = total_vht_rate_off << 3; + rate_per_pkt_on = (vht_total_cnt_on != 0) ? + (total_vht_rate_on / vht_total_cnt_on) : 0; + rate_per_pkt_off = (vht_total_cnt_off != 0) ? + (total_vht_rate_off / vht_total_cnt_off) : 0; + #if (DM_ODM_SUPPORT_TYPE == ODM_AP) + vht_ok_max_on = soml_tab->vht_crc_ok_cnt_on[max_idx_on]; + vht_fail_max_on = soml_tab->vht_crc_fail_cnt_on[max_idx_on]; + vht_ok_max_off = soml_tab->vht_crc_ok_cnt_off[max_idx_off]; + vht_fail_max_off = soml_tab->vht_crc_fail_cnt_off[max_idx_off]; + + if (vht_fail_max_on == 0) + vht_fail_max_on = 1; + + if (vht_fail_max_off == 0) + vht_fail_max_off = 1; + + if (vht_ok_max_on > vht_fail_max_on) + on_above = true; + + if (vht_ok_max_off > vht_fail_max_off) + off_above = true; + + if (on_above && !off_above) { + crc_taget = SOML_ON; + } else if (!on_above && off_above) { + crc_taget = SOML_OFF; + } else if (on_above && off_above) { + utility_on = (vht_ok_max_on << 7) / vht_fail_max_on; + utility_off = (vht_ok_max_off << 7) / vht_fail_max_off; + crc_taget = (utility_on == utility_off) ? + (soml_tab->soml_last_state) : + ((utility_on > utility_off) ? SOML_ON : + SOML_OFF); + + } else if (!on_above && !off_above) { + if (vht_ok_max_on == 0) + vht_ok_max_on = 1; + if (vht_ok_max_off == 0) + vht_ok_max_off = 1; + utility_on = (vht_fail_max_on << 7) / vht_ok_max_on; + utility_off = (vht_fail_max_off << 7) / vht_ok_max_off; + crc_taget = (utility_on == utility_off) ? + (soml_tab->soml_last_state) : + ((utility_on < utility_off) ? SOML_ON : + SOML_OFF); + } + #endif + + } + + /* @[Decision] */ + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ rate_per_pkt_on = %d ; rate_per_pkt_off = %d ]\n", + rate_per_pkt_on, rate_per_pkt_off); + #if (DM_ODM_SUPPORT_TYPE == ODM_AP) + if (max_idx_on == max_idx_off && max_idx_on != 0) { + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ max_idx_on == max_idx_off ]\n"); + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ max_idx = %d, crc_utility_on = %d, crc_utility_off = %d, crc_target = %d]\n", + max_idx_on, utility_on, utility_off, + crc_taget); + next_on_off = crc_taget; + } else + #endif + if (rate_per_pkt_on > rate_per_pkt_off) { + next_on_off = SOML_ON; + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ rate_per_pkt_on > rate_per_pkt_off ==> SOML_ON ]\n"); + } else if (rate_per_pkt_on < rate_per_pkt_off) { + next_on_off = SOML_OFF; + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ rate_per_pkt_on < rate_per_pkt_off ==> SOML_OFF ]\n"); + } else { + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ stay at soml_last_state ]\n"); + next_on_off = soml_tab->soml_last_state; + } + + PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); + phydm_soml_on_off(dm, next_on_off); + soml_tab->soml_last_state = next_on_off; +} + +void phydm_adsl(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + + if (dm->support_ic_type & PHYDM_ADAPTIVE_SOML_IC) { + PHYDM_DBG(dm, DBG_ADPTV_SOML, "soml_state_cnt =((%d))\n", + soml_tab->soml_state_cnt); + /*Traning state: 0(alt) 1(ori) 2(alt) 3(ori)===============*/ + if (soml_tab->soml_state_cnt < + (soml_tab->soml_train_num << 1)) { + if (soml_tab->soml_state_cnt == 0) + phydm_adsl_init_state(dm); + else if ((soml_tab->soml_state_cnt % 2) != 0) + phydm_adsl_odd_state(dm); + else if ((soml_tab->soml_state_cnt % 2) == 0) + phydm_adsl_even_state(dm); + } else { + phydm_adsl_decision_state(dm); } } } -void -phydm_adaptive_soml_reset( - void *dm_void -) +void phydm_adaptive_soml_reset(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; - dm_soml_table->soml_state_cnt = 0; - dm_soml_table->is_soml_method_enable = 0; - dm_soml_table->soml_counter = 0; + soml_tab->soml_state_cnt = 0; + soml_tab->is_soml_method_enable = 0; + soml_tab->soml_counter = 0; } -#endif /* end of CONFIG_ADAPTIVE_SOML*/ - -void -phydm_soml_bytes_acq( - void *dm_void, - u8 rate_id, - u32 length -) +void phydm_set_adsl_val(void *dm_void, u32 *val_buf, u8 val_len) { -#ifdef CONFIG_ADAPTIVE_SOML - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; - if ((rate_id >= ODM_RATEMCS0) && (rate_id <= ODM_RATEMCS31)) - dm_soml_table->num_ht_bytes[rate_id - ODM_RATEMCS0] += length; - else if ((rate_id >= ODM_RATEVHTSS1MCS0) && (rate_id <= ODM_RATEVHTSS4MCS9)) - dm_soml_table->num_vht_bytes[rate_id - ODM_RATEVHTSS1MCS0] += length; + if (val_len != 1) { + PHYDM_DBG(dm, ODM_COMP_API, "[Error][ADSL]Need val_len=1\n"); + return; + } -#endif + phydm_soml_on_off(dm, (u8)val_buf[1]); } -void -phydm_adaptive_soml_timers( - void *dm_void, - u8 state -) +void phydm_soml_crc_acq(void *dm_void, u8 rate_id, boolean crc32, u32 length) { -#ifdef CONFIG_ADAPTIVE_SOML - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + u8 offset = 0; + + if (!soml_tab->get_stats) + return; + if (length < 1400) + return; + + if (soml_tab->soml_on_off == SOML_ON) { + if (rate_id >= ODM_RATEMCS0 && rate_id <= ODM_RATEMCS15) { + offset = rate_id - ODM_RATEMCS0; + if (crc32 == CRC_OK) + soml_tab->ht_crc_ok_cnt_on[offset]++; + else if (crc32 == CRC_FAIL) + soml_tab->ht_crc_fail_cnt_on[offset]++; + } else if (rate_id >= ODM_RATEVHTSS1MCS0 && + rate_id <= ODM_RATEVHTSS2MCS9) { + offset = rate_id - ODM_RATEVHTSS1MCS0; + if (crc32 == CRC_OK) + soml_tab->vht_crc_ok_cnt_on[offset]++; + else if (crc32 == CRC_FAIL) + soml_tab->vht_crc_fail_cnt_on[offset]++; + } + } else if (soml_tab->soml_on_off == SOML_OFF) { + if (rate_id >= ODM_RATEMCS0 && rate_id <= ODM_RATEMCS15) { + offset = rate_id - ODM_RATEMCS0; + if (crc32 == CRC_OK) + soml_tab->ht_crc_ok_cnt_off[offset]++; + else if (crc32 == CRC_FAIL) + soml_tab->ht_crc_fail_cnt_off[offset]++; + } else if (rate_id >= ODM_RATEVHTSS1MCS0 && + rate_id <= ODM_RATEVHTSS2MCS9) { + offset = rate_id - ODM_RATEVHTSS1MCS0; + if (crc32 == CRC_OK) + soml_tab->vht_crc_ok_cnt_off[offset]++; + else if (crc32 == CRC_FAIL) + soml_tab->vht_crc_fail_cnt_off[offset]++; + } + } +} + +void phydm_soml_bytes_acq(void *dm_void, u8 rate_id, u32 length) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + u8 offset = 0; + + + if (rate_id >= ODM_RATEMCS0 && rate_id <= ODM_RATEMCS31) { + offset = rate_id - ODM_RATEMCS0; + if (offset > (HT_RATE_IDX - 1)) + offset = HT_RATE_IDX - 1; + + soml_tab->ht_byte[offset] += (u16)length; + } else if (rate_id >= ODM_RATEVHTSS1MCS0 && + rate_id <= ODM_RATEVHTSS4MCS9) { + offset = rate_id - ODM_RATEVHTSS1MCS0; + if (offset > (VHT_RATE_IDX - 1)) + offset = VHT_RATE_IDX - 1; + + soml_tab->vht_byte[offset] += (u16)length; + } +} + +#if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) +#define INIT_TIMER_EVENT_ENTRY(_entry, _func, _data) \ + do { \ + _rtw_init_listhead(&(_entry)->list); \ + (_entry)->data = (_data); \ + (_entry)->function = (_func); \ + } while (0) + +static void pre_phydm_adaptive_soml_callback(unsigned long task_dm) +{ + struct dm_struct *dm = (struct dm_struct *)task_dm; + struct rtl8192cd_priv *priv = dm->priv; + struct priv_shared_info *pshare = priv->pshare; + + if (pshare->bDriverStopped || pshare->bSurpriseRemoved) { + printk("[%s] bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", + __FUNCTION__, pshare->bDriverStopped, + pshare->bSurpriseRemoved); + return; + } + + rtw_enqueue_timer_event(priv, &pshare->adaptive_soml_event, + ENQUEUE_TO_TAIL); +} + +void phydm_adaptive_soml_timers_usb(void *dm_void, u8 state) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + struct rtl8192cd_priv *priv = dm->priv; if (state == INIT_SOML_TIMMER) { - odm_initialize_timer(dm, &dm_soml_table->phydm_adaptive_soml_timer, - (void *)phydm_adaptive_soml_callback, NULL, "phydm_adaptive_soml_timer"); + init_timer(&soml_tab->phydm_adaptive_soml_timer); + soml_tab->phydm_adaptive_soml_timer.data = (unsigned long)dm; + soml_tab->phydm_adaptive_soml_timer.function = pre_phydm_adaptive_soml_callback; + INIT_TIMER_EVENT_ENTRY(&priv->pshare->adaptive_soml_event, + phydm_adaptive_soml_callback, + (unsigned long)dm); } else if (state == CANCEL_SOML_TIMMER) { - odm_cancel_timer(dm, &dm_soml_table->phydm_adaptive_soml_timer); + odm_cancel_timer(dm, &soml_tab->phydm_adaptive_soml_timer); } else if (state == RELEASE_SOML_TIMMER) { - odm_release_timer(dm, &dm_soml_table->phydm_adaptive_soml_timer); + odm_release_timer(dm, &soml_tab->phydm_adaptive_soml_timer); + } +} +#endif /* defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) */ + +void phydm_adaptive_soml_timers(void *dm_void, u8 state) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; + +#if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) + struct rtl8192cd_priv *priv = dm->priv; + + if (priv->hci_type == RTL_HCI_USB) { + phydm_adaptive_soml_timers_usb(dm_void, state); + } else +#endif /* defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) */ + { + if (state == INIT_SOML_TIMMER) { + odm_initialize_timer(dm, &soml_tab->phydm_adaptive_soml_timer, + (void *)phydm_adaptive_soml_callback, NULL, + "phydm_adaptive_soml_timer"); + } else if (state == CANCEL_SOML_TIMMER) { + odm_cancel_timer(dm, &soml_tab->phydm_adaptive_soml_timer); + } else if (state == RELEASE_SOML_TIMMER) { + odm_release_timer(dm, &soml_tab->phydm_adaptive_soml_timer); + } } -#endif } -void -phydm_adaptive_soml_init( - void *dm_void -) +void phydm_adaptive_soml_init(void *dm_void) { -#ifdef CONFIG_ADAPTIVE_SOML - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; #if 0 if (!(dm->support_ability & ODM_BB_ADAPTIVE_SOML)) { - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[Return] Not Support Adaptive SOML\n"); + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[Return] Not Support Adaptive SOML\n"); return; } #endif - PHYDM_DBG(dm, DBG_ADPTV_SOML, "phydm_adaptive_soml_init\n"); + PHYDM_DBG(dm, DBG_ADPTV_SOML, "%s\n", __func__); - dm_soml_table->soml_state_cnt = 0; - dm_soml_table->soml_delay_time = 40; - dm_soml_table->soml_intvl = 150; - dm_soml_table->soml_train_num = 4; - dm_soml_table->is_soml_method_enable = 0; - dm_soml_table->soml_counter = 0; - dm_soml_table->soml_period = 1; - dm_soml_table->soml_select = 0; - dm_soml_table->cfo_counter = 0; - dm_soml_table->cfo_diff_sum_a = 0; - dm_soml_table->cfo_diff_sum_b = 0; - - dm_soml_table->cfo_qpsk_th = 94; - dm_soml_table->cfo_qam16_th = 38; - dm_soml_table->cfo_qam64_th = 17; - dm_soml_table->cfo_qam256_th = 7; - - dm_soml_table->bpsk_qpsk_dist_th = 20; - dm_soml_table->qam16_dist_th = 20; - dm_soml_table->qam64_dist_th = 20; - dm_soml_table->qam256_dist_th = 20; - - if (dm->support_ic_type == ODM_RTL8197F) - odm_set_bb_reg(dm, 0x998, BIT(25), 1); + soml_tab->soml_state_cnt = 0; + soml_tab->soml_delay_time = 40; + soml_tab->soml_intvl = 150; + soml_tab->soml_train_num = 4; + soml_tab->is_soml_method_enable = 0; + soml_tab->soml_counter = 0; +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + soml_tab->soml_period = 1; +#else + soml_tab->soml_period = 4; #endif + soml_tab->soml_select = 0; + soml_tab->cfo_cnt = 0; + soml_tab->cfo_diff_sum_a = 0; + soml_tab->cfo_diff_sum_b = 0; + + soml_tab->cfo_qpsk_th = 94; + soml_tab->cfo_qam16_th = 38; + soml_tab->cfo_qam64_th = 17; + soml_tab->cfo_qam256_th = 7; + + soml_tab->bpsk_qpsk_dist_th = 20; + soml_tab->qam16_dist_th = 20; + soml_tab->qam64_dist_th = 20; + soml_tab->qam256_dist_th = 20; + + if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) + odm_set_bb_reg(dm, 0x988, BIT(25), 1); } -void -phydm_adaptive_soml( - void *dm_void -) +void phydm_adaptive_soml(void *dm_void) { -#ifdef CONFIG_ADAPTIVE_SOML - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; if (!(dm->support_ability & ODM_BB_ADAPTIVE_SOML)) { PHYDM_DBG(dm, DBG_ADPTV_SOML, - "[Return!!!] Not Support Adaptive SOML Function\n"); + "[Return!!!] Not Support Adaptive SOML Function\n"); return; } - if (dm_soml_table->soml_counter < dm_soml_table->soml_period) { - dm_soml_table->soml_counter++; + if (dm->pause_ability & ODM_BB_ADAPTIVE_SOML) { + PHYDM_DBG(dm, DBG_ADPTV_SOML, "Return: Pause ADSL in LV=%d\n", + dm->pause_lv_table.lv_adsl); return; } - dm_soml_table->soml_counter = 0; - dm_soml_table->soml_state_cnt = 0; - dm_soml_table->cfo_counter = 0; - dm_soml_table->cfo_diff_sum_a = 0; - dm_soml_table->cfo_diff_sum_b = 0; - phydm_soml_reset_rx_rate(dm); + if (soml_tab->soml_counter < soml_tab->soml_period) { + soml_tab->soml_counter++; + return; + } + soml_tab->soml_counter = 0; + soml_tab->soml_state_cnt = 0; + soml_tab->cfo_cnt = 0; + soml_tab->cfo_diff_sum_a = 0; + soml_tab->cfo_diff_sum_b = 0; - if (dm_soml_table->soml_select == 0) { - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Adaptive SOML Training !!!]\n"); - } else if (dm_soml_table->soml_select == 1) { + phydm_soml_reset_qam(dm); + + if (soml_tab->soml_select == 0) { + PHYDM_DBG(dm, DBG_ADPTV_SOML, + "[ Adaptive SOML Training !!!]\n"); + } else if (soml_tab->soml_select == 1) { PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Stop Adaptive SOML !!!]\n"); phydm_soml_on_off(dm, SOML_ON); return; - } else if (dm_soml_table->soml_select == 2) { + } else if (soml_tab->soml_select == 2) { PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Stop Adaptive SOML !!!]\n"); phydm_soml_on_off(dm, SOML_OFF); return; } - phydm_adsl(dm); - -#endif + if (dm->support_ic_type & PHYDM_ADAPTIVE_SOML_IC) + phydm_adsl(dm); } -void -phydm_enable_adaptive_soml( - void *dm_void -) +void phydm_enable_adaptive_soml(void *dm_void) { -#ifdef CONFIG_ADAPTIVE_SOML - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[%s][Return!!!] enable Adaptive SOML\n", __func__); + PHYDM_DBG(dm, DBG_ADPTV_SOML, "[%s]\n", __func__); dm->support_ability |= ODM_BB_ADAPTIVE_SOML; phydm_soml_on_off(dm, SOML_ON); -#endif } -void -phydm_stop_adaptive_soml( - void *dm_void -) +void phydm_stop_adaptive_soml(void *dm_void) { -#ifdef CONFIG_ADAPTIVE_SOML - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; - PHYDM_DBG(dm, DBG_ADPTV_SOML, "[%s][Return!!!] Stop Adaptive SOML\n", __func__); + PHYDM_DBG(dm, DBG_ADPTV_SOML, "[%s]\n", __func__); dm->support_ability &= ~ODM_BB_ADAPTIVE_SOML; phydm_soml_on_off(dm, SOML_ON); - -#endif } -void -phydm_adaptive_soml_para_set( - void *dm_void, - u8 train_num, - u8 intvl, - u8 period, - u8 delay_time - -) +void phydm_adaptive_soml_para_set(void *dm_void, u8 train_num, u8 intvl, + u8 period, u8 delay_time) { -#ifdef CONFIG_ADAPTIVE_SOML - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct adaptive_soml *dm_soml_table = &dm->dm_soml_table; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct adaptive_soml *soml_tab = &dm->dm_soml_table; - dm_soml_table->soml_train_num = train_num; - dm_soml_table->soml_intvl = intvl; - dm_soml_table->soml_period = period; - dm_soml_table->soml_delay_time = delay_time; -#endif + soml_tab->soml_train_num = train_num; + soml_tab->soml_intvl = intvl; + soml_tab->soml_period = period; + soml_tab->soml_delay_time = delay_time; } +#endif /* @end of CONFIG_ADAPTIVE_SOML*/ -void -phydm_init_soft_ml_setting( - void *dm_void -) +void phydm_init_soft_ml_setting(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 soml_mask = BIT(31) | BIT(30) | BIT(29) | BIT(28); + #if (RTL8822B_SUPPORT == 1) - if (*dm->mp_mode == false) { + if (!*dm->mp_mode) { if (dm->support_ic_type & ODM_RTL8822B) { - /*odm_set_bb_reg(dm, 0x19a8, MASKDWORD, 0xd10a0000);*/ +#if 0 + /*odm_set_bb_reg(dm, R_0x19a8, MASKDWORD, 0xd10a0000);*/ +#endif phydm_somlrxhp_setting(dm, true); dm->bsomlenabled = true; } } #endif #if (RTL8821C_SUPPORT == 1) - if (*dm->mp_mode == false) { + if (!*dm->mp_mode) { if (dm->support_ic_type & ODM_RTL8821C) - odm_set_bb_reg(dm, 0x19a8, BIT(31)|BIT(30)|BIT(29)|BIT(28), 0xd); + odm_set_bb_reg(dm, R_0x19a8, soml_mask, 0xd); + } +#endif +#if (RTL8195B_SUPPORT == 1) + if (!*dm->mp_mode) { + if (dm->support_ic_type & ODM_RTL8195B) + odm_set_bb_reg(dm, R_0x19a8, soml_mask, 0xd); } #endif } - diff --git a/hal/phydm/phydm_soml.h b/hal/phydm/phydm_soml.h index 7f3c1fb..285fbfd 100644 --- a/hal/phydm/phydm_soml.h +++ b/hal/phydm/phydm_soml.h @@ -22,12 +22,14 @@ * Larry Finger * *****************************************************************************/ -#ifndef __PHYDMSOML_H__ -#define __PHYDMSOML_H__ +#ifndef __PHYDMSOML_H__ +#define __PHYDMSOML_H__ -#define ADAPTIVE_SOML_VERSION "1.0" +/*@#define ADAPTIVE_SOML_VERSION "1.0" Byte counter version*/ +#define ADAPTIVE_SOML_VERSION "2.0" /*@add avg. phy rate decision 20180126*/ -#define ODM_ADAPTIVE_SOML_SUPPORT_IC (ODM_RTL8822B | ODM_RTL8197F) +#define PHYDM_ADAPTIVE_SOML_IC (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F) +/*@jj add 20170822*/ #define INIT_SOML_TIMMER 0 #define CANCEL_SOML_TIMMER 1 @@ -36,13 +38,16 @@ #define SOML_RSSI_TH_HIGH 25 #define SOML_RSSI_TH_LOW 20 -#define HT_RATE_IDX 32 -#define VHT_RATE_IDX 40 +#define HT_RATE_IDX 16 +#define VHT_RATE_IDX 20 #define HT_ORDER_TYPE 3 #define VHT_ORDER_TYPE 4 -/* +#define CRC_FAIL 1 +#define CRC_OK 0 + +#if 0 #define CFO_QPSK_TH 20 #define CFO_QAM16_TH 20 #define CFO_QAM64_TH 20 @@ -52,7 +57,7 @@ #define QAM16_DIST 30 #define QAM64_DIST 30 #define QAM256_DIST 20 -*/ +#endif #define HT_TYPE 1 #define VHT_TYPE 2 @@ -62,7 +67,9 @@ #ifdef CONFIG_ADAPTIVE_SOML struct adaptive_soml { - boolean is_soml_method_enable; + u8 rvrt_val; + boolean is_soml_method_enable; + boolean get_stats; u8 soml_on_off; u8 soml_state_cnt; u8 soml_delay_time; @@ -80,26 +87,41 @@ struct adaptive_soml { u8 qam16_dist_th; u8 qam64_dist_th; u8 qam256_dist_th; - u8 cfo_counter; + u8 cfo_cnt; s32 cfo_diff_a; s32 cfo_diff_b; s32 cfo_diff_sum_a; s32 cfo_diff_sum_b; s32 cfo_diff_avg_a; s32 cfo_diff_avg_b; - u32 num_ht_qam[HT_ORDER_TYPE]; - u32 num_ht_bytes[HT_RATE_IDX]; - u32 pre_num_ht_bytes[HT_RATE_IDX]; - u32 num_ht_bytes_on[HT_RATE_IDX]; - u32 num_ht_bytes_off[HT_RATE_IDX]; - #if ODM_IC_11AC_SERIES_SUPPORT - u32 num_vht_qam[VHT_ORDER_TYPE]; - u32 num_qry_mu_vht_pkt[VHT_RATE_IDX]; - u32 num_vht_bytes[VHT_RATE_IDX]; - u32 pre_num_vht_bytes[VHT_RATE_IDX]; - u32 num_vht_bytes_on[VHT_RATE_IDX]; - u32 num_vht_bytes_off[VHT_RATE_IDX]; - #endif + u16 ht_cnt[HT_RATE_IDX]; + u16 pre_ht_cnt[HT_RATE_IDX]; + u16 ht_cnt_on[HT_RATE_IDX]; + u16 ht_cnt_off[HT_RATE_IDX]; + u16 ht_crc_ok_cnt_on[HT_RATE_IDX]; + u16 ht_crc_fail_cnt_on[HT_RATE_IDX]; + u16 ht_crc_ok_cnt_off[HT_RATE_IDX]; + u16 ht_crc_fail_cnt_off[HT_RATE_IDX]; + u16 vht_crc_ok_cnt_on[VHT_RATE_IDX]; + u16 vht_crc_fail_cnt_on[VHT_RATE_IDX]; + u16 vht_crc_ok_cnt_off[VHT_RATE_IDX]; + u16 vht_crc_fail_cnt_off[VHT_RATE_IDX]; + + u16 vht_cnt[VHT_RATE_IDX]; + u16 pre_vht_cnt[VHT_RATE_IDX]; + u16 vht_cnt_on[VHT_RATE_IDX]; + u16 vht_cnt_off[VHT_RATE_IDX]; + + u16 num_ht_qam[HT_ORDER_TYPE]; + u16 ht_byte[HT_RATE_IDX]; + u16 pre_ht_byte[HT_RATE_IDX]; + u16 ht_byte_on[HT_RATE_IDX]; + u16 ht_byte_off[HT_RATE_IDX]; + u16 num_vht_qam[VHT_ORDER_TYPE]; + u16 vht_byte[VHT_RATE_IDX]; + u16 pre_vht_byte[VHT_RATE_IDX]; + u16 vht_byte_on[VHT_RATE_IDX]; + u16 vht_byte_off[VHT_RATE_IDX]; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #if USE_WORKITEM @@ -117,138 +139,61 @@ enum qam_order { QAM256 = 3 }; -void -phydm_dynamicsoftmletting( - void *dm_void -); +void phydm_dynamicsoftmletting(void *dm_void); -void -phydm_soml_on_off( - void *dm_void, - u8 swch -); +void phydm_soml_on_off(void *dm_void, u8 swch); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -phydm_adaptive_soml_callback( - struct phydm_timer_list *timer -); +void phydm_adaptive_soml_callback(struct phydm_timer_list *timer); -void -phydm_adaptive_soml_workitem_callback( - void *context -); +void phydm_adaptive_soml_workitem_callback(void *context); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -void -phydm_adaptive_soml_callback( - void *dm_void -); +void phydm_adaptive_soml_callback(void *dm_void); -void -phydm_adaptive_soml_workitem_callback( - void *context -); +void phydm_adaptive_soml_workitem_callback(void *context); #else -void -phydm_adaptive_soml_callback( - void *dm_void -); - +void phydm_adaptive_soml_callback(void *dm_void); #endif -void -phydm_rx_qam_for_soml( - void *dm_void, - void *pkt_info_void -); +void phydm_rx_rate_for_soml(void *dm_void, void *pkt_info_void); -void -phydm_soml_reset_rx_rate( - void *dm_void -); +void phydm_rx_qam_for_soml(void *dm_void, void *pkt_info_void); -void -phydm_soml_cfo_process( - void *dm_void, - s32 *diff_a, - s32 *diff_b -); +void phydm_soml_reset_rx_rate(void *dm_void); -void -phydm_soml_debug( - void *dm_void, - u32 *const dm_value, - u32 *_used, - char *output, - u32 *_out_len -); +void phydm_soml_reset_qam(void *dm_void); -void -phydm_soml_statistics( - void *dm_void, - u8 on_off_state +void phydm_soml_cfo_process(void *dm_void, s32 *diff_a, s32 *diff_b); -); +void phydm_soml_debug(void *dm_void, char input[][16], u32 *_used, + char *output, u32 *_out_len); -void -phydm_adsl( - void *dm_void -); +void phydm_soml_statistics(void *dm_void, u8 on_off_state); -void -phydm_adaptive_soml_reset( - void *dm_void -); +void phydm_adsl(void *dm_void); +void phydm_adaptive_soml_reset(void *dm_void); + +void phydm_set_adsl_val(void *dm_void, u32 *val_buf, u8 val_len); + +void phydm_soml_crc_acq(void *dm_void, u8 rate_id, boolean crc32, u32 length); + +void phydm_soml_bytes_acq(void *dm_void, u8 rate_id, u32 length); + +void phydm_adaptive_soml_timers(void *dm_void, u8 state); + +void phydm_adaptive_soml_init(void *dm_void); + +void phydm_adaptive_soml(void *dm_void); + +void phydm_enable_adaptive_soml(void *dm_void); + +void phydm_stop_adaptive_soml(void *dm_void); + +void phydm_adaptive_soml_para_set(void *dm_void, u8 train_num, u8 intvl, + u8 period, u8 delay_time); #endif -void -phydm_soml_bytes_acq( - void *dm_void, - u8 rate_id, - u32 length -); - -void -phydm_adaptive_soml_timers( - void *dm_void, - u8 state -); - -void -phydm_adaptive_soml_init( - void *dm_void -); - -void -phydm_adaptive_soml( - void *dm_void -); - -void -phydm_enable_adaptive_soml( - void *dm_void -); - -void -phydm_stop_adaptive_soml( - void *dm_void -); - -void -phydm_adaptive_soml_para_set( - void *dm_void, - u8 train_num, - u8 intvl, - u8 period, - u8 delay_time - -); - -void -phydm_init_soft_ml_setting( - void *dm_void -); - -#endif /*#ifndef __PHYDMSOML_H__*/ +void phydm_init_soft_ml_setting(void *dm_void); +#endif /*@#ifndef __PHYDMSOML_H__*/ diff --git a/hal/phydm/phydm_types.h b/hal/phydm/phydm_types.h index d1248e4..ccb3ec8 100644 --- a/hal/phydm/phydm_types.h +++ b/hal/phydm/phydm_types.h @@ -30,11 +30,14 @@ #define ODM_AP 0x01 /*BIT(0)*/ #define ODM_CE 0x04 /*BIT(2)*/ #define ODM_WIN 0x08 /*BIT(3)*/ -#define ODM_ADSL 0x10 /*BIT(4)*/ /*already combine with ODM_AP, and is nouse now*/ +#define ODM_ADSL 0x10 +/*BIT(4)*/ /*already combine with ODM_AP, and is nouse now*/ #define ODM_IOT 0x20 /*BIT(5)*/ /*For FW API*/ #define __iram_odm_func__ +#define __odm_func__ +#define __odm_func_aon__ /*Deifne HW endian support*/ #define ODM_ENDIAN_BIG 0 @@ -43,26 +46,36 @@ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #define GET_PDM_ODM(__padapter) ((struct dm_struct*)(&(GET_HAL_DATA(__padapter))->DM_OutSrc)) #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - #define GET_PDM_ODM(__padapter) ((struct dm_struct*)(&(GET_HAL_DATA(__padapter))->odmpriv)) + #define GET_PDM_ODM(__padapter) ((struct dm_struct *)(&(GET_HAL_DATA(__padapter))->odmpriv)) #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) #define GET_PDM_ODM(__padapter) ((struct dm_struct*)(&__padapter->pshare->_dmODM)) #endif #if (DM_ODM_SUPPORT_TYPE != ODM_WIN) - #define RT_PCI_INTERFACE 1 - #define RT_USB_INTERFACE 2 - #define RT_SDIO_INTERFACE 3 + #if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) + /* enable PCI & USB HCI at the same time */ + #define RT_PCI_USB_INTERFACE 1 + #define RT_PCI_INTERFACE RT_PCI_USB_INTERFACE + #define RT_USB_INTERFACE RT_PCI_USB_INTERFACE + #define RT_SDIO_INTERFACE 3 + #else + #define RT_PCI_INTERFACE 1 + #define RT_USB_INTERFACE 2 + #define RT_SDIO_INTERFACE 3 + #endif #endif enum hal_status { HAL_STATUS_SUCCESS, HAL_STATUS_FAILURE, - /*RT_STATUS_PENDING, +#if 0 + RT_STATUS_PENDING, RT_STATUS_RESOURCE, RT_STATUS_INVALID_CONTEXT, RT_STATUS_INVALID_PARAMETER, RT_STATUS_NOT_SUPPORT, - RT_STATUS_OS_API_FAILED,*/ + RT_STATUS_OS_API_FAILED, +#endif }; #if (DM_ODM_SUPPORT_TYPE != ODM_WIN) @@ -70,8 +83,8 @@ enum hal_status { #define VISTA_USB_RX_REVISE 0 /* - * Declare for ODM spin lock defintion temporarily fro compile pass. - * */ + * Declare for ODM spin lock definition temporarily fro compile pass. + */ enum rt_spinlock_type { RT_TX_SPINLOCK = 1, RT_RX_SPINLOCK = 2, @@ -83,16 +96,19 @@ enum rt_spinlock_type { RT_CHNLOP_SPINLOCK = 9, RT_RF_OPERATE_SPINLOCK = 10, RT_INITIAL_SPINLOCK = 11, - RT_RF_STATE_SPINLOCK = 12, /* For RF state. Added by Bruce, 2007-10-30. */ + RT_RF_STATE_SPINLOCK = 12, + /* For RF state. Added by Bruce, 2007-10-30. */ #if VISTA_USB_RX_REVISE RT_USBRX_CONTEXT_SPINLOCK = 13, - RT_USBRX_POSTPROC_SPINLOCK = 14, /* protect data of adapter->IndicateW/ IndicateR */ + RT_USBRX_POSTPROC_SPINLOCK = 14, + /* protect data of adapter->IndicateW/ IndicateR */ #endif /* Shall we define Ndis 6.2 SpinLock Here ? */ RT_PORT_SPINLOCK = 16, RT_VNIC_SPINLOCK = 17, RT_HVL_SPINLOCK = 18, - RT_H2C_SPINLOCK = 20, /* For H2C cmd. Added by tynli. 2009.11.09. */ + RT_H2C_SPINLOCK = 20, + /* For H2C cmd. Added by tynli. 2009.11.09. */ rt_bt_data_spinlock = 25, @@ -142,14 +158,18 @@ enum rt_spinlock_type { #define s64 s8Byte #define phydm_timer_list _RT_TIMER - + #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) #include "../typedef.h" #ifdef CONFIG_PCI_HCI + #if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) + #define DEV_BUS_TYPE RT_PCI_USB_INTERFACE + #else #define DEV_BUS_TYPE RT_PCI_INTERFACE #endif + #endif #if (defined(TESTCHIP_SUPPORT)) #define PHYDM_TESTCHIP_SUPPORT 1 @@ -189,7 +209,8 @@ enum rt_spinlock_type { #define sta_info rtl_sta_info #define boolean bool - #define phydm_timer_list rtw_timer_list + + #define phydm_timer_list timer_list #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #include @@ -207,15 +228,15 @@ enum rt_spinlock_type { #if defined(CONFIG_LITTLE_ENDIAN) #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE - #elif defined (CONFIG_BIG_ENDIAN) + #elif defined(CONFIG_BIG_ENDIAN) #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG #endif #define boolean bool - #define SET_TX_DESC_ANTSEL_A_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc+8, 24, 1, __value) - #define SET_TX_DESC_ANTSEL_B_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc+8, 25, 1, __value) - #define SET_TX_DESC_ANTSEL_C_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc+28, 29, 1, __value) + #define SET_TX_DESC_ANTSEL_A_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc + 8, 24, 1, __value) + #define SET_TX_DESC_ANTSEL_B_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc + 8, 25, 1, __value) + #define SET_TX_DESC_ANTSEL_C_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc + 28, 29, 1, __value) /* define useless flag to avoid compile warning */ #define USE_WORKITEM 0 @@ -230,9 +251,55 @@ enum rt_spinlock_type { #endif #define phydm_timer_list rtw_timer_list + +#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) + #define boolean bool + #define true _TRUE + #define false _FALSE + + // for power limit table + enum odm_pw_lmt_regulation_type { + PW_LMT_REGU_NULL = 0, + PW_LMT_REGU_FCC = 1, + PW_LMT_REGU_ETSI = 2, + PW_LMT_REGU_MKK = 3, + PW_LMT_REGU_WW13 = 4 + }; + + enum odm_pw_lmt_band_type { + PW_LMT_BAND_NULL = 0, + PW_LMT_BAND_2_4G = 1, + PW_LMT_BAND_5G = 2 + }; + + enum odm_pw_lmt_bandwidth_type { + PW_LMT_BW_NULL = 0, + PW_LMT_BW_20M = 1, + PW_LMT_BW_40M = 2, + PW_LMT_BW_80M = 3 + }; + + enum odm_pw_lmt_ratesection_type { + PW_LMT_RS_NULL = 0, + PW_LMT_RS_CCK = 1, + PW_LMT_RS_OFDM = 2, + PW_LMT_RS_HT = 3, + PW_LMT_RS_VHT = 4 + }; + + enum odm_pw_lmt_rfpath_type { + PW_LMT_PH_NULL = 0, + PW_LMT_PH_1T = 1, + PW_LMT_PH_2T = 2, + PW_LMT_PH_3T = 3, + PW_LMT_PH_4T = 4 + }; + + #define phydm_timer_list timer_list + #endif -#define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= array_len) break; i += 2; v1 = array[i]; v2 = array[i+1]; } while (0) +#define READ_NEXT_PAIR(v1, v2, i) do { if (i + 2 >= array_len) break; i += 2; v1 = array[i]; v2 = array[i + 1]; } while (0) #define COND_ELSE 2 #define COND_ENDIF 3 @@ -243,18 +310,22 @@ enum rt_spinlock_type { #define MASKHWORD 0xffff0000 #define MASKLWORD 0x0000ffff #define MASKDWORD 0xffffffff + #define MASK7BITS 0x7f #define MASK12BITS 0xfff #define MASKH4BITS 0xf0000000 #define MASK20BITS 0xfffff +#define MASK24BITS 0xffffff #define MASKOFDM_D 0xffc00000 #define MASKCCK 0x3f3f3f3f -#define RFREGOFFSETMASK 0xfffff + +#define RFREGOFFSETMASK 0xfffff +#define RFREG_MASK 0xfffff + #define MASKH3BYTES 0xffffff00 #define MASKL3BYTES 0x00ffffff -#define MASKBYTE2HIGHNIBBLE 0x00f00000 -#define MASKBYTE3LOWNIBBLE 0x0f000000 -#define MASKL3BYTES 0x00ffffff -#define RFREGOFFSETMASK 0xfffff +#define MASKBYTE2HIGHNIBBLE 0x00f00000 +#define MASKBYTE3LOWNIBBLE 0x0f000000 +#define MASKL3BYTES 0x00ffffff #endif /* __ODM_TYPES_H__ */ diff --git a/hal/phydm/rtl8188e/hal8188erateadaptive.c b/hal/phydm/rtl8188e/hal8188erateadaptive.c index 5da95c4..5fabc5a 100644 --- a/hal/phydm/rtl8188e/hal8188erateadaptive.c +++ b/hal/phydm/rtl8188e/hal8188erateadaptive.c @@ -16,58 +16,56 @@ #include "../phydm_precomp.h" - #if (RATE_ADAPTIVE_SUPPORT == 1) /* rate adaptive parameters */ - static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE + 1] = {{5, 4, 3, 2, 0, 3}, /* 92 , idx=0 */ - {6, 5, 4, 3, 0, 4}, /* 86 , idx=1 */ - {6, 5, 4, 2, 0, 4}, /* 81 , idx=2 */ - {8, 7, 6, 4, 0, 6}, /* 75 , idx=3 */ + {6, 5, 4, 3, 0, 4}, /* 86 , idx=1 */ + {6, 5, 4, 2, 0, 4}, /* 81 , idx=2 */ + {8, 7, 6, 4, 0, 6}, /* 75 , idx=3 */ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \ ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) - {10, 9, 7, 6, 0, 8},/*71 , idx=4*/ - {10, 9, 7, 4, 0, 8},/*66 , idx=5*/ + {10, 9, 7, 6, 0, 8}, /*71 , idx=4*/ + {10, 9, 7, 4, 0, 8}, /*66 , idx=5*/ #else - {10, 9, 8, 6, 0, 8}, /* 71 , idx=4 */ - {10, 9, 8, 4, 0, 8}, /* 66 , idx=5 */ + {10, 9, 8, 6, 0, 8}, /* 71 , idx=4 */ + {10, 9, 8, 4, 0, 8}, /* 66 , idx=5 */ #endif - {10, 9, 8, 2, 0, 8}, /* 62 , idx=6 */ - {10, 9, 8, 0, 0, 8}, /* 59 , idx=7 */ - {18, 17, 16, 8, 0, 16}, /* 53 , idx=8 */ - {26, 25, 24, 16, 0, 24}, /* 50 , idx=9 */ - {34, 33, 32, 24, 0, 32}, /* 47 , idx=0x0a */ - /* {34,33,32,16,0,32}, */ /* 43 , idx=0x0b */ - /* {34,33,32,8,0,32}, */ /* 40 , idx=0x0c */ - /* {34,33,28,8,0,32}, */ /* 37 , idx=0x0d */ - /* {34,33,20,8,0,32}, */ /* 32 , idx=0x0e */ - /* {34,32,24,8,0,32}, */ /* 26 , idx=0x0f */ - /* {49,48,32,16,0,48}, */ /* 20 , idx=0x10 */ - /* {49,48,24,0,0,48}, */ /* 17 , idx=0x11 */ - /* {49,47,16,16,0,48}, */ /* 15 , idx=0x12 */ - /* {49,44,16,16,0,48}, */ /* 12 , idx=0x13 */ - /* {49,40,16,0,0,48}, */ /* 9 , idx=0x14 */ - {34, 31, 28, 20, 0, 32}, /* 43 , idx=0x0b */ - {34, 31, 27, 18, 0, 32}, /* 40 , idx=0x0c */ - {34, 31, 26, 16, 0, 32}, /* 37 , idx=0x0d */ - {34, 30, 22, 16, 0, 32}, /* 32 , idx=0x0e */ - {34, 30, 24, 16, 0, 32}, /* 26 , idx=0x0f */ - {49, 46, 40, 16, 0, 48}, /* 20 , idx=0x10 */ - {49, 45, 32, 0, 0, 48}, /* 17 , idx=0x11 */ - {49, 45, 22, 18, 0, 48}, /* 15 , idx=0x12 */ + {10, 9, 8, 2, 0, 8}, /* 62 , idx=6 */ + {10, 9, 8, 0, 0, 8}, /* 59 , idx=7 */ + {18, 17, 16, 8, 0, 16}, /* 53 , idx=8 */ + {26, 25, 24, 16, 0, 24}, /* 50 , idx=9 */ + {34, 33, 32, 24, 0, 32}, /* 47 , idx=0x0a */ + /* {34,33,32,16,0,32}, */ /* 43 , idx=0x0b */ + /* {34,33,32,8,0,32}, */ /* 40 , idx=0x0c */ + /* {34,33,28,8,0,32}, */ /* 37 , idx=0x0d */ + /* {34,33,20,8,0,32}, */ /* 32 , idx=0x0e */ + /* {34,32,24,8,0,32}, */ /* 26 , idx=0x0f */ + /* {49,48,32,16,0,48}, */ /* 20 , idx=0x10 */ + /* {49,48,24,0,0,48}, */ /* 17 , idx=0x11 */ + /* {49,47,16,16,0,48}, */ /* 15 , idx=0x12 */ + /* {49,44,16,16,0,48}, */ /* 12 , idx=0x13 */ + /* {49,40,16,0,0,48}, */ /* 9 , idx=0x14 */ + {34, 31, 28, 20, 0, 32}, /* 43 , idx=0x0b */ + {34, 31, 27, 18, 0, 32}, /* 40 , idx=0x0c */ + {34, 31, 26, 16, 0, 32}, /* 37 , idx=0x0d */ + {34, 30, 22, 16, 0, 32}, /* 32 , idx=0x0e */ + {34, 30, 24, 16, 0, 32}, /* 26 , idx=0x0f */ + {49, 46, 40, 16, 0, 48}, /* 20 , idx=0x10 */ + {49, 45, 32, 0, 0, 48}, /* 17 , idx=0x11 */ + {49, 45, 22, 18, 0, 48}, /* 15 , idx=0x12 */ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) - {49, 40, 28, 18, 0, 48}, /* 12 , idx=0x13 */ - {49, 34, 20, 16, 0, 48}, /* 9 , idx=0x14 */ + {49, 40, 28, 18, 0, 48}, /* 12 , idx=0x13 */ + {49, 34, 20, 16, 0, 48}, /* 9 , idx=0x14 */ #else - {49, 40, 24, 16, 0, 48}, /* 12 , idx=0x13 */ - {49, 32, 18, 12, 0, 48}, /* 9 , idx=0x14 */ + {49, 40, 24, 16, 0, 48}, /* 12 , idx=0x13 */ + {49, 32, 18, 12, 0, 48}, /* 9 , idx=0x14 */ #endif - {49, 22, 18, 14, 0, 48}, /* 6 , idx=0x15 */ - {49, 16, 16, 0, 0, 48} -};/* 3 */ /* 3, idx=0x16 */ + {49, 22, 18, 14, 0, 48}, /* 6 , idx=0x15 */ + {49, 16, 16, 0, 0, 48}}; + /* 3 */ /* 3, idx=0x16 */ -static u8 RETRY_PENALTY_UP[RETRYSIZE + 1] = {49, 44, 16, 16, 0, 48}; /* 12% for rate up */ +static u8 RETRY_PENALTY_UP[RETRYSIZE + 1] = {49, 44, 16, 16, 0, 48}; /* 12% for rate up */ static u8 PT_PENALTY[RETRYSIZE + 1] = {34, 31, 30, 24, 0, 32}; @@ -85,34 +83,27 @@ static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{ }; #endif - #if (DM_ODM_SUPPORT_TYPE & ODM_AP) -static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{ - 4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */ +static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */ #if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE) - 4, 4, 4, 4, 0x0d, 0x0d, 0x0f, 0x0f, + 4, 4, 4, 4, 0x0d, 0x0d, 0x0f, 0x0f, #else - 4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d, + 4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d, #endif - 5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f - }, /* 0329 R01 */ - { - 0x0a, 0x0a, 0x0a, 0x0a, 0x0c, 0x0c, 0x0e, 0x10, 0x11, 0x12, 0x12, 0x13, /* SSTH */ - 0x13, 0x13, 0x14, 0x14, 0x15, 0x15, 0x15, 0x15, - 0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15 - }; +static u8 RETRY_PENALTY_UP_IDX[RATESIZE] = {0x10, 0x10, 0x10, 0x10, 0x11, 0x11, 0x12, 0x12, 0x12, 0x13, 0x13, 0x14, /* SS>TH */ + 0x13, 0x13, 0x14, 0x14, 0x15, 0x15, 0x15, 0x15, + 0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15}; -static u8 RSSI_THRESHOLD[RATESIZE] = {0, 0, 0, 0, - 0, 0, 0, 0, 0, 0x24, 0x26, 0x2a, - 0x17, 0x1a, 0x1c, 0x1f, 0x23, 0x28, 0x2a, 0x2c, - 0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c - }; +static u8 RSSI_THRESHOLD[RATESIZE] = {0, 0, 0, 0, + 0, 0, 0, 0, 0, 0x24, 0x26, 0x2a, + 0x17, 0x1a, 0x1c, 0x1f, 0x23, 0x28, 0x2a, 0x2c, + 0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c}; #else /* wilson modify */ @@ -130,28 +121,22 @@ static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{ }; #endif -static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{ - 4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */ - 4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d, - 5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f - }, /* 0329 R01 */ - { - 0x0a, 0x0a, 0x0b, 0x0c, 0x0a, 0x0a, 0x0b, 0x0c, 0x0d, 0x10, 0x13, 0x13, /* SSTH */ + 4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d, + 5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f}, /* 0329 R01 */ + { + 0x0a, 0x0a, 0x0b, 0x0c, 0x0a, 0x0a, 0x0b, 0x0c, 0x0d, 0x10, 0x13, 0x13, /* SSTH */ - 0x0f, 0x10, 0x10, 0x12, 0x12, 0x13, 0x14, 0x15, - 0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15 - }; +static u8 RETRY_PENALTY_UP_IDX[RATESIZE] = {0x0c, 0x0d, 0x0d, 0x0f, 0x0d, 0x0e, 0x0f, 0x0f, 0x10, 0x12, 0x13, 0x14, /* SS>TH */ + 0x0f, 0x10, 0x10, 0x12, 0x12, 0x13, 0x14, 0x15, + 0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15}; -static u8 RSSI_THRESHOLD[RATESIZE] = {0, 0, 0, 0, - 0, 0, 0, 0, 0, 0x24, 0x26, 0x2a, - 0x18, 0x1a, 0x1d, 0x1f, 0x21, 0x27, 0x29, 0x2a, - 0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c - }; +static u8 RSSI_THRESHOLD[RATESIZE] = {0, 0, 0, 0, + 0, 0, 0, 0, 0, 0x24, 0x26, 0x2a, + 0x18, 0x1a, 0x1d, 0x1f, 0x21, 0x27, 0x29, 0x2a, + 0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c}; #endif @@ -167,21 +152,19 @@ static u16 N_THRESHOLD_LOW[RATESIZE] = {2,2,4,8, 12,18,24,36,48,72,96,108, 30,40,50,80,120,200,280,320, 150,160,240,360,500,600,800,1000};*/ -static u16 N_THRESHOLD_HIGH[RATESIZE] = {4, 4, 8, 16, - 24, 36, 48, 72, 96, 144, 192, 216, - 60, 80, 100, 160, 240, 400, 600, 800, - 300, 320, 480, 720, 1000, 1200, 1600, 2000 - }; -static u16 N_THRESHOLD_LOW[RATESIZE] = {2, 2, 4, 8, - 12, 18, 24, 36, 48, 72, 96, 108, - 30, 40, 50, 80, 120, 200, 300, 400, - 150, 160, 240, 360, 500, 600, 800, 1000 - }; -static u8 TRYING_NECESSARY[RATESIZE] = {2, 2, 2, 2, - 2, 2, 3, 3, 4, 4, 5, 7, - 4, 4, 7, 10, 10, 12, 12, 18, - 5, 7, 7, 8, 11, 18, 36, 60 - }; /* 0329 */ /* 1207 */ +static u16 N_THRESHOLD_HIGH[RATESIZE] = {4, 4, 8, 16, + 24, 36, 48, 72, 96, 144, 192, 216, + 60, 80, 100, 160, 240, 400, 600, 800, + 300, 320, 480, 720, 1000, 1200, 1600, 2000}; +static u16 N_THRESHOLD_LOW[RATESIZE] = {2, 2, 4, 8, + 12, 18, 24, 36, 48, 72, 96, 108, + 30, 40, 50, 80, 120, 200, 300, 400, + 150, 160, 240, 360, 500, 600, 800, 1000}; +static u8 TRYING_NECESSARY[RATESIZE] = {2, 2, 2, 2, + 2, 2, 3, 3, 4, 4, 5, 7, + 4, 4, 7, 10, 10, 12, 12, 18, + 5, 7, 7, 8, 11, 18, 36, 60}; + /* 0329 */ /* 1207 */ #if 0 static u8 POOL_RETRY_TH[RATESIZE] = {30, 30, 30, 30, 30, 30, 25, 25, 20, 15, 15, 10, @@ -190,33 +173,32 @@ static u8 POOL_RETRY_TH[RATESIZE] = {30, 30, 30, 30, }; #endif -static u8 DROPING_NECESSARY[RATESIZE] = {1, 1, 1, 1, - 1, 2, 3, 4, 5, 6, 7, 8, - 1, 2, 3, 4, 5, 6, 7, 8, - 5, 6, 7, 8, 9, 10, 11, 12 - }; +static u8 DROPING_NECESSARY[RATESIZE] = {1, 1, 1, 1, + 1, 2, 3, 4, 5, 6, 7, 8, + 1, 2, 3, 4, 5, 6, 7, 8, + 5, 6, 7, 8, 9, 10, 11, 12}; +static u32 INIT_RATE_FALLBACK_TABLE[16] = { + 0x0f8ff015, /* 0: 40M BGN mode */ + 0x0f8ff010, /* 1: 40M GN mode */ + 0x0f8ff005, /* 2: BN mode/ 40M BGN mode */ + 0x0f8ff000, /* 3: N mode */ + 0x00000ff5, /* 4: BG mode */ + 0x00000ff0, /* 5: G mode */ + 0x0000000d, /* 6: B mode */ + 0, /* 7: */ + 0, /* 8: */ + 0, /* 9: */ + 0, /* 10: */ + 0, /* 11: */ + 0, /* 12: */ + 0, /* 13: */ + 0, /* 14: */ + 0, /* 15: */ -static u32 INIT_RATE_FALLBACK_TABLE[16] = {0x0f8ff015, /* 0: 40M BGN mode */ - 0x0f8ff010, /* 1: 40M GN mode */ - 0x0f8ff005, /* 2: BN mode/ 40M BGN mode */ - 0x0f8ff000, /* 3: N mode */ - 0x00000ff5, /* 4: BG mode */ - 0x00000ff0, /* 5: G mode */ - 0x0000000d, /* 6: B mode */ - 0, /* 7: */ - 0, /* 8: */ - 0, /* 9: */ - 0, /* 10: */ - 0, /* 11: */ - 0, /* 12: */ - 0, /* 13: */ - 0, /* 14: */ - 0, /* 15: */ - - }; +}; static u8 pending_for_rate_up_fail[5] = {2, 10, 24, 40, 60}; -static u16 dynamic_tx_rpt_timing[6] = {0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12, 0x927c}; /*200ms-1200ms*/ +static u16 dynamic_tx_rpt_timing[6] = {0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12, 0x927c}; /*200ms-1200ms*/ /* End rate adaptive parameters */ @@ -224,32 +206,27 @@ static u16 dynamic_tx_rpt_timing[6] = {0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12, 0 ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) static int odm_ra_learn_bounding( - struct dm_struct *dm, - struct _odm_ra_info_ *p_ra_info -) + struct dm_struct *dm, + struct _odm_ra_info_ *p_ra_info) { - PHYDM_DBG(dm, DBG_RA, " odm_ra_learn_bounding\n"); + PHYDM_DBG(dm, DBG_RA, " %s\n", __func__); if (DM_RA_RATE_UP != p_ra_info->rate_direction) { /* Check if previous RA adjustment trend as +++--- or ++++----*/ - if (((3 == p_ra_info->rate_up_counter && p_ra_info->bounding_learning_time <= 10) - || (4 == p_ra_info->rate_up_counter && p_ra_info->bounding_learning_time <= 16)) - && (p_ra_info->rate_up_counter == p_ra_info->rate_down_counter)) { + if (((3 == p_ra_info->rate_up_counter && p_ra_info->bounding_learning_time <= 10) || (4 == p_ra_info->rate_up_counter && p_ra_info->bounding_learning_time <= 16)) && p_ra_info->rate_up_counter == p_ra_info->rate_down_counter) { if (1 != p_ra_info->bounding_type) { p_ra_info->bounding_type = 1; p_ra_info->bounding_counter = 0; } p_ra_info->bounding_counter++; /* Check if previous RA adjustment trend as ++--*/ - } else if ((2 == p_ra_info->rate_up_counter) && (p_ra_info->bounding_learning_time <= 7) - && (p_ra_info->rate_up_counter == p_ra_info->rate_down_counter)) { + } else if ((2 == p_ra_info->rate_up_counter) && (p_ra_info->bounding_learning_time <= 7) && (p_ra_info->rate_up_counter == p_ra_info->rate_down_counter)) { if (2 != p_ra_info->bounding_type) { p_ra_info->bounding_type = 2; p_ra_info->bounding_counter = 0; } p_ra_info->bounding_counter++; /* Check if previous RA adjustment trend as +++++-----*/ - } else if ((5 == p_ra_info->rate_up_counter) && (p_ra_info->bounding_learning_time <= 17) - && (p_ra_info->rate_up_counter == p_ra_info->rate_down_counter)) { + } else if ((5 == p_ra_info->rate_up_counter) && (p_ra_info->bounding_learning_time <= 17) && (p_ra_info->rate_up_counter == p_ra_info->rate_down_counter)) { if (3 != p_ra_info->bounding_type) { p_ra_info->bounding_type = 3; p_ra_info->bounding_counter = 0; @@ -263,20 +240,17 @@ odm_ra_learn_bounding( p_ra_info->bounding_learning_time = 1; } else if (p_ra_info->bounding_type) { /* Check if RA adjustment trend as +++---++(+) or ++++----++(+)*/ - if ((1 == p_ra_info->bounding_type) && (1 == p_ra_info->bounding_counter) - && (2 == p_ra_info->rate_up_counter)) { + if ((1 == p_ra_info->bounding_type) && (1 == p_ra_info->bounding_counter) && (2 == p_ra_info->rate_up_counter)) { p_ra_info->bounding_type = 0; if (p_ra_info->bounding_learning_time <= 5) return 1; /* Check if RA adjustment trend as ++--++--+(+)*/ - } else if ((2 == p_ra_info->bounding_type) && (2 == p_ra_info->bounding_counter) - && (1 == p_ra_info->rate_up_counter)) { + } else if ((2 == p_ra_info->bounding_type) && (2 == p_ra_info->bounding_counter) && (1 == p_ra_info->rate_up_counter)) { p_ra_info->bounding_type = 0; if (p_ra_info->bounding_learning_time <= 2) return 1; /* Check if RA adjustment trend as +++++-----++(+)*/ - } else if ((3 == p_ra_info->bounding_type) && (1 == p_ra_info->bounding_counter) - && (2 == p_ra_info->rate_up_counter)) { + } else if ((3 == p_ra_info->bounding_type) && (1 == p_ra_info->bounding_counter) && (2 == p_ra_info->rate_up_counter)) { p_ra_info->bounding_type = 0; if (p_ra_info->bounding_learning_time <= 4) return 1; @@ -289,10 +263,9 @@ odm_ra_learn_bounding( static void odm_set_tx_rpt_timing_8188e( - struct dm_struct *dm, - struct _odm_ra_info_ *p_ra_info, - u8 extend -) + struct dm_struct *dm, + struct _odm_ra_info_ *p_ra_info, + u8 extend) { u8 idx = 0; @@ -312,21 +285,21 @@ odm_set_tx_rpt_timing_8188e( } p_ra_info->rpt_time = dynamic_tx_rpt_timing[idx]; - PHYDM_DBG(dm, DBG_RA, "p_ra_info->rpt_time=0x%x\n", p_ra_info->rpt_time); + PHYDM_DBG(dm, DBG_RA, "p_ra_info->rpt_time=0x%x\n", + p_ra_info->rpt_time); } static int odm_rate_down_8188e( - struct dm_struct *dm, - struct _odm_ra_info_ *p_ra_info -) + struct dm_struct *dm, + struct _odm_ra_info_ *p_ra_info) { u8 rate_id, lowest_rate, highest_rate; s8 i; - PHYDM_DBG(dm, DBG_RA, "=====>odm_rate_down_8188e()\n"); + PHYDM_DBG(dm, DBG_RA, "=====>%s\n", __func__); if (NULL == p_ra_info) { - PHYDM_DBG(dm, DBG_RA, "odm_rate_down_8188e(): p_ra_info is NULL\n"); + PHYDM_DBG(dm, DBG_RA, "%s: p_ra_info is NULL\n", __func__); return -1; } rate_id = p_ra_info->pre_rate; @@ -334,8 +307,8 @@ odm_rate_down_8188e( highest_rate = p_ra_info->highest_rate; PHYDM_DBG(dm, DBG_RA, - " rate_id=%d lowest_rate=%d highest_rate=%d rate_sgi=%d\n", - rate_id, lowest_rate, highest_rate, p_ra_info->rate_sgi); + " rate_id=%d lowest_rate=%d highest_rate=%d rate_sgi=%d\n", + rate_id, lowest_rate, highest_rate, p_ra_info->rate_sgi); if (rate_id > highest_rate) rate_id = highest_rate; else if (p_ra_info->rate_sgi) @@ -359,7 +332,6 @@ odm_rate_down_8188e( #endif rate_id = i; goto rate_down_finish; - } } } @@ -371,10 +343,9 @@ rate_down_finish: /*if (p_ra_info->RTY[2] >= 100) { p_ra_info->ra_waiting_counter = 2; p_ra_info->ra_pending_counter += 1; - } else */if ((0 != p_ra_info->rate_down_start_time) && (0xFF != p_ra_info->rate_down_start_time)) { + } else */ if ((0 != p_ra_info->rate_down_start_time) && (0xFF != p_ra_info->rate_down_start_time)) { /* Learning +(0)-(-)(-)+ and ++(0)--(-)(-)(0)+ after the persistence of learned TX rate expire*/ if (p_ra_info->rate_down_counter < p_ra_info->rate_up_counter) { - } else if (p_ra_info->rate_down_counter == p_ra_info->rate_up_counter) { p_ra_info->ra_waiting_counter = 2; p_ra_info->ra_pending_counter += 1; @@ -388,13 +359,13 @@ rate_down_finish: } else #endif if (p_ra_info->ra_waiting_counter == 1) { - p_ra_info->ra_waiting_counter += 1; - p_ra_info->ra_pending_counter += 1; - } else if (p_ra_info->ra_waiting_counter == 0) { - } else { - p_ra_info->ra_waiting_counter = 0; - p_ra_info->ra_pending_counter = 0; - } + p_ra_info->ra_waiting_counter += 1; + p_ra_info->ra_pending_counter += 1; + } else if (p_ra_info->ra_waiting_counter == 0) { + } else { + p_ra_info->ra_waiting_counter = 0; + p_ra_info->ra_pending_counter = 0; + } if (p_ra_info->ra_pending_counter >= 4) p_ra_info->ra_pending_counter = 4; @@ -402,31 +373,33 @@ rate_down_finish: p_ra_info->decision_rate = rate_id; odm_set_tx_rpt_timing_8188e(dm, p_ra_info, 2); PHYDM_DBG(dm, DBG_RA, "rate down, Decrease RPT Timing\n"); - PHYDM_DBG(dm, DBG_RA, "ra_waiting_counter %d, ra_pending_counter %d RADrop %d", p_ra_info->ra_waiting_counter, p_ra_info->ra_pending_counter, p_ra_info->ra_drop_after_down); - PHYDM_DBG(dm, DBG_RA, "rate down to rate_id %d rate_sgi %d\n", rate_id, p_ra_info->rate_sgi); - PHYDM_DBG(dm, DBG_RA, "<=====odm_rate_down_8188e()\n"); + PHYDM_DBG(dm, DBG_RA, + "ra_waiting_counter %d, ra_pending_counter %d RADrop %d", + p_ra_info->ra_waiting_counter, p_ra_info->ra_pending_counter, + p_ra_info->ra_drop_after_down); + PHYDM_DBG(dm, DBG_RA, "rate down to rate_id %d rate_sgi %d\n", rate_id, + p_ra_info->rate_sgi); + PHYDM_DBG(dm, DBG_RA, "<=====%s\n", __func__); return 0; } static int odm_rate_up_8188e( - struct dm_struct *dm, - struct _odm_ra_info_ *p_ra_info -) + struct dm_struct *dm, + struct _odm_ra_info_ *p_ra_info) { u8 rate_id, highest_rate; u8 i; - PHYDM_DBG(dm, DBG_RA, "=====>odm_rate_up_8188e()\n"); + PHYDM_DBG(dm, DBG_RA, "=====>%s\n", __func__); if (NULL == p_ra_info) { - PHYDM_DBG(dm, DBG_RA, "odm_rate_up_8188e(): p_ra_info is NULL\n"); + PHYDM_DBG(dm, DBG_RA, "%s: p_ra_info is NULL\n", __func__); return -1; } rate_id = p_ra_info->pre_rate; highest_rate = p_ra_info->highest_rate; - PHYDM_DBG(dm, DBG_RA, - " rate_id=%d highest_rate=%d\n", - rate_id, highest_rate); + PHYDM_DBG(dm, DBG_RA, " rate_id=%d highest_rate=%d\n", rate_id, + highest_rate); if (p_ra_info->ra_waiting_counter == 1) { p_ra_info->ra_waiting_counter = 0; p_ra_info->ra_pending_counter = 0; @@ -439,7 +412,7 @@ odm_rate_up_8188e( goto rate_up_finish; } odm_set_tx_rpt_timing_8188e(dm, p_ra_info, 0); - PHYDM_DBG(dm, DBG_RA, "odm_rate_up_8188e(): default RPT Timing\n"); + PHYDM_DBG(dm, DBG_RA, "%s: default RPT Timing\n", __func__); if (rate_id < highest_rate) { for (i = rate_id + 1; i <= highest_rate; i++) { @@ -459,7 +432,7 @@ odm_rate_up_8188e( } } } else if (rate_id == highest_rate) { - if (p_ra_info->sgi_enable && (p_ra_info->rate_sgi != 1)) + if (p_ra_info->sgi_enable && p_ra_info->rate_sgi != 1) p_ra_info->rate_sgi = 1; else if ((p_ra_info->sgi_enable) != 1) p_ra_info->rate_sgi = 0; @@ -484,12 +457,13 @@ rate_up_finish: p_ra_info->decision_rate = rate_id; PHYDM_DBG(dm, DBG_RA, "rate up to rate_id %d\n", rate_id); - PHYDM_DBG(dm, DBG_RA, "ra_waiting_counter %d, ra_pending_counter %d", p_ra_info->ra_waiting_counter, p_ra_info->ra_pending_counter); - PHYDM_DBG(dm, DBG_RA, "<=====odm_rate_up_8188e()\n"); + PHYDM_DBG(dm, DBG_RA, "ra_waiting_counter %d, ra_pending_counter %d", + p_ra_info->ra_waiting_counter, p_ra_info->ra_pending_counter); + PHYDM_DBG(dm, DBG_RA, "<=====%s\n", __func__); return 0; } -static void odm_reset_ra_counter_8188e(struct _odm_ra_info_ *p_ra_info) +static void odm_reset_ra_counter_8188e(struct _odm_ra_info_ *p_ra_info) { u8 rate_id; rate_id = p_ra_info->decision_rate; @@ -499,70 +473,69 @@ static void odm_reset_ra_counter_8188e(struct _odm_ra_info_ *p_ra_info) static void odm_rate_decision_8188e( - struct dm_struct *dm, - struct _odm_ra_info_ *p_ra_info, - u8 mac_id -) + struct dm_struct *dm, + struct _odm_ra_info_ *p_ra_info, + u8 mac_id) { u8 rate_id = 0, rty_pt_id = 0, penalty_id1 = 0, penalty_id2 = 0; static u8 dynamic_tx_rpt_timing_counter = 0; - u8 cmd_buf[3]; + u8 cmd_buf[3]; PHYDM_DBG(dm, DBG_RA, "%s ======>\n", __func__); - if (p_ra_info->active && (p_ra_info->TOTAL > 0)) { /* STA used and data packet exits */ - - #if AP_USB_SDIO - if (((p_ra_info->rssi_sta_ra <= 17) && (p_ra_info->rssi_sta_ra > p_ra_info->pre_rssi_sta_ra)) - || ((p_ra_info->pre_rssi_sta_ra <= 17) && (p_ra_info->pre_rssi_sta_ra > p_ra_info->rssi_sta_ra))) { + if (p_ra_info->active && p_ra_info->TOTAL > 0) { /* STA used and data packet exits */ + +#if AP_USB_SDIO + if ((p_ra_info->rssi_sta_ra <= 17 && p_ra_info->rssi_sta_ra > p_ra_info->pre_rssi_sta_ra) || (p_ra_info->pre_rssi_sta_ra <= 17 && p_ra_info->pre_rssi_sta_ra > p_ra_info->rssi_sta_ra)) { /* don't reset state in low signal due to the power different between CCK and MCS is large.*/ } else - #endif +#endif if (p_ra_info->ra_drop_after_down) { - p_ra_info->ra_drop_after_down--; - odm_reset_ra_counter_8188e(p_ra_info); - return; - } + p_ra_info->ra_drop_after_down--; + odm_reset_ra_counter_8188e(p_ra_info); + return; + } if ((p_ra_info->rssi_sta_ra < (p_ra_info->pre_rssi_sta_ra - 3)) || (p_ra_info->rssi_sta_ra > (p_ra_info->pre_rssi_sta_ra + 3))) { p_ra_info->pre_rssi_sta_ra = p_ra_info->rssi_sta_ra; p_ra_info->ra_waiting_counter = 0; p_ra_info->ra_pending_counter = 0; - #if AP_USB_SDIO +#if AP_USB_SDIO p_ra_info->bounding_type = 0; - #endif +#endif } - #if (DM_ODM_SUPPORT_TYPE & ODM_AP) +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) if (dm->priv->pshare->rf_ft_var.txforce != 0xff) { p_ra_info->pre_rate = dm->priv->pshare->rf_ft_var.txforce; odm_reset_ra_counter_8188e(p_ra_info); } - #endif +#endif /* Start RA decision */ if (p_ra_info->pre_rate > p_ra_info->highest_rate) rate_id = p_ra_info->highest_rate; else rate_id = p_ra_info->pre_rate; - + if (p_ra_info->rssi_sta_ra > RSSI_THRESHOLD[rate_id]) rty_pt_id = 0; else rty_pt_id = 1; - + penalty_id1 = RETRY_PENALTY_IDX[rty_pt_id][rate_id]; /* TODO by page */ PHYDM_DBG(dm, DBG_RA, "nsc_down=%d\n", p_ra_info->nsc_down); - + p_ra_info->nsc_down += p_ra_info->RTY[0] * RETRY_PENALTY[penalty_id1][0]; p_ra_info->nsc_down += p_ra_info->RTY[1] * RETRY_PENALTY[penalty_id1][1]; p_ra_info->nsc_down += p_ra_info->RTY[2] * RETRY_PENALTY[penalty_id1][2]; p_ra_info->nsc_down += p_ra_info->RTY[3] * RETRY_PENALTY[penalty_id1][3]; p_ra_info->nsc_down += p_ra_info->RTY[4] * RETRY_PENALTY[penalty_id1][4]; - + PHYDM_DBG(dm, DBG_RA, " nsc_down=%d, total*penalty[5]=%d\n", - p_ra_info->nsc_down, (p_ra_info->TOTAL * RETRY_PENALTY[penalty_id1][5])); - + p_ra_info->nsc_down, + (p_ra_info->TOTAL * RETRY_PENALTY[penalty_id1][5])); + if (p_ra_info->nsc_down > (p_ra_info->TOTAL * RETRY_PENALTY[penalty_id1][5])) p_ra_info->nsc_down -= p_ra_info->TOTAL * RETRY_PENALTY[penalty_id1][5]; else @@ -570,62 +543,69 @@ odm_rate_decision_8188e( /* rate up */ penalty_id2 = RETRY_PENALTY_UP_IDX[rate_id]; - + PHYDM_DBG(dm, DBG_RA, " nsc_up=%d\n", p_ra_info->nsc_up); - + p_ra_info->nsc_up += p_ra_info->RTY[0] * RETRY_PENALTY[penalty_id2][0]; p_ra_info->nsc_up += p_ra_info->RTY[1] * RETRY_PENALTY[penalty_id2][1]; p_ra_info->nsc_up += p_ra_info->RTY[2] * RETRY_PENALTY[penalty_id2][2]; p_ra_info->nsc_up += p_ra_info->RTY[3] * RETRY_PENALTY[penalty_id2][3]; p_ra_info->nsc_up += p_ra_info->RTY[4] * RETRY_PENALTY[penalty_id2][4]; - + PHYDM_DBG(dm, DBG_RA, "nsc_up=%d, total*up[5]=%d\n", - p_ra_info->nsc_up, (p_ra_info->TOTAL * RETRY_PENALTY[penalty_id2][5])); - + p_ra_info->nsc_up, + (p_ra_info->TOTAL * RETRY_PENALTY[penalty_id2][5])); + if (p_ra_info->nsc_up > (p_ra_info->TOTAL * RETRY_PENALTY[penalty_id2][5])) p_ra_info->nsc_up -= p_ra_info->TOTAL * RETRY_PENALTY[penalty_id2][5]; else p_ra_info->nsc_up = 0; PHYDM_DBG(dm, DBG_RA | ODM_COMP_INIT, - " RssiStaRa= %d rty_pt_id=%d penalty_id1=0x%x penalty_id2=0x%x rate_id=%d nsc_down=%d nsc_up=%d SGI=%d\n", - p_ra_info->rssi_sta_ra, rty_pt_id, penalty_id1, penalty_id2, rate_id, p_ra_info->nsc_down, p_ra_info->nsc_up, p_ra_info->rate_sgi); - - #if AP_USB_SDIO + " RssiStaRa= %d rty_pt_id=%d penalty_id1=0x%x penalty_id2=0x%x rate_id=%d nsc_down=%d nsc_up=%d SGI=%d\n", + p_ra_info->rssi_sta_ra, rty_pt_id, penalty_id1, + penalty_id2, rate_id, p_ra_info->nsc_down, + p_ra_info->nsc_up, p_ra_info->rate_sgi); + +#if AP_USB_SDIO if (0xFF != p_ra_info->bounding_learning_time) p_ra_info->bounding_learning_time++; - #endif +#endif if ((p_ra_info->nsc_down < N_THRESHOLD_LOW[rate_id]) || (p_ra_info->DROP > DROPING_NECESSARY[rate_id])) odm_rate_down_8188e(dm, p_ra_info); /* else if ((p_ra_info->nsc_up > N_THRESHOLD_HIGH[rate_id])&&(pool_retrynsc_up > N_THRESHOLD_HIGH[rate_id]) odm_rate_up_8188e(dm, p_ra_info); - - #if AP_USB_SDIO + +#if AP_USB_SDIO else if ((p_ra_info->RTY[2] >= 100) && (*dm->band_width == CHANNEL_WIDTH_20)) odm_rate_down_8188e(dm, p_ra_info); - #endif +#endif - if ((p_ra_info->decision_rate) == (p_ra_info->pre_rate)) { - - PHYDM_DBG(dm, DBG_RA, "[Rate stay] macid=%d, dec_rate=0x%x, pre_rate=0x%x\n", mac_id, p_ra_info->decision_rate, p_ra_info->pre_rate); + if (p_ra_info->decision_rate == p_ra_info->pre_rate) { + PHYDM_DBG(dm, DBG_RA, + "[Rate stay] macid=%d, dec_rate=0x%x, pre_rate=0x%x\n", + mac_id, p_ra_info->decision_rate, + p_ra_info->pre_rate); dynamic_tx_rpt_timing_counter += 1; - /**/ } else { /*rate update*/ - - PHYDM_DBG(dm, DBG_RA, "[Rate update] macid=%d, dec_rate=0x%x, pre_rate=0x%x\n", mac_id, p_ra_info->decision_rate, p_ra_info->pre_rate); + + PHYDM_DBG(dm, DBG_RA, + "[Rate update] macid=%d, dec_rate=0x%x, pre_rate=0x%x\n", + mac_id, p_ra_info->decision_rate, + p_ra_info->pre_rate); dynamic_tx_rpt_timing_counter = 0; /*update rate information*/ cmd_buf[0] = (p_ra_info->rate_sgi << 7) | (p_ra_info->decision_rate & 0x7f); cmd_buf[1] = mac_id; phydm_c2h_ra_report_handler(dm, &(cmd_buf[0]), 3); - } if (dynamic_tx_rpt_timing_counter >= 4) { odm_set_tx_rpt_timing_8188e(dm, p_ra_info, 1); - PHYDM_DBG(dm, DBG_RA, "<=====rate don't change 4 times, Extend RPT Timing\n"); + PHYDM_DBG(dm, DBG_RA, + "<=====rate don't change 4 times, Extend RPT Timing\n"); dynamic_tx_rpt_timing_counter = 0; } @@ -638,9 +618,8 @@ odm_rate_decision_8188e( static int odm_arfb_refresh_8188e( - struct dm_struct *dm, - struct _odm_ra_info_ *p_ra_info -) + struct dm_struct *dm, + struct _odm_ra_info_ *p_ra_info) { /* Wilson 2011/10/26 */ u32 mask_from_reg; @@ -691,8 +670,8 @@ odm_arfb_refresh_8188e( } /* Highest rate */ if (p_ra_info->ra_use_rate) - for (i = RATESIZE ; i >= 0 ; i--) { - if ((p_ra_info->ra_use_rate) & BIT(i)) { + for (i = RATESIZE; i >= 0; i--) { + if (p_ra_info->ra_use_rate & BIT(i)) { p_ra_info->highest_rate = i; break; } @@ -702,7 +681,7 @@ odm_arfb_refresh_8188e( /* Lowest rate */ if (p_ra_info->ra_use_rate) for (i = 0; i < RATESIZE; i++) { - if ((p_ra_info->ra_use_rate) & BIT(i)) { + if (p_ra_info->ra_use_rate & BIT(i)) { p_ra_info->lowest_rate = i; break; } @@ -719,22 +698,22 @@ odm_arfb_refresh_8188e( p_ra_info->pt_mode_ss = 1; else p_ra_info->pt_mode_ss = 0; - PHYDM_DBG(dm, DBG_RA, - "ODM_ARFBRefresh_8188E(): pt_mode_ss=%d\n", p_ra_info->pt_mode_ss); + PHYDM_DBG(dm, DBG_RA, "ODM_ARFBRefresh_8188E(): pt_mode_ss=%d\n", + p_ra_info->pt_mode_ss); #endif PHYDM_DBG(dm, DBG_RA, - "ODM_ARFBRefresh_8188E(): rate_id=%d rate_mask=%8.8x ra_use_rate=%8.8x highest_rate=%d\n", - p_ra_info->rate_id, p_ra_info->rate_mask, p_ra_info->ra_use_rate, p_ra_info->highest_rate); + "ODM_ARFBRefresh_8188E(): rate_id=%d rate_mask=%8.8x ra_use_rate=%8.8x highest_rate=%d\n", + p_ra_info->rate_id, p_ra_info->rate_mask, + p_ra_info->ra_use_rate, p_ra_info->highest_rate); return 0; } #if POWER_TRAINING_ACTIVE == 1 static void odm_pt_try_state_8188e( - struct dm_struct *dm, - struct _odm_ra_info_ *p_ra_info -) + struct dm_struct *dm, + struct _odm_ra_info_ *p_ra_info) { p_ra_info->pt_try_state = 0; switch (p_ra_info->pt_mode_ss) { @@ -761,8 +740,7 @@ odm_pt_try_state_8188e( if (p_ra_info->rssi_sta_ra < 48) p_ra_info->pt_stage = 0; else if (p_ra_info->pt_try_state == 1) { - if ((p_ra_info->pt_stop_count >= 10) || (p_ra_info->pt_pre_rssi > p_ra_info->rssi_sta_ra + 5) - || (p_ra_info->pt_pre_rssi < p_ra_info->rssi_sta_ra - 5) || (p_ra_info->decision_rate != p_ra_info->pt_pre_rate)) { + if (p_ra_info->pt_stop_count >= 10 || (p_ra_info->pt_pre_rssi > p_ra_info->rssi_sta_ra + 5) || (p_ra_info->pt_pre_rssi < p_ra_info->rssi_sta_ra - 5) || p_ra_info->decision_rate != p_ra_info->pt_pre_rate) { if (p_ra_info->pt_stage == 0) p_ra_info->pt_stage = 1; else if (p_ra_info->pt_stage == 1) @@ -796,8 +774,7 @@ odm_pt_try_state_8188e( static void odm_pt_decision_8188e( - struct _odm_ra_info_ *p_ra_info -) + struct _odm_ra_info_ *p_ra_info) { u8 stage_BUF; u8 j; @@ -807,7 +784,7 @@ odm_pt_decision_8188e( u8 stage_id; stage_BUF = p_ra_info->pt_stage; - numsc = 0; + numsc = 0; num_total = p_ra_info->TOTAL * PT_PENALTY[5]; for (j = 0; j <= 4; j++) { numsc += p_ra_info->RTY[j] * PT_PENALTY[j]; @@ -832,22 +809,20 @@ odm_pt_decision_8188e( if (p_ra_info->DROP > 3) temp_stage = 0; p_ra_info->pt_stage = temp_stage; - } #endif static void odm_ra_tx_rpt_timer_setting( - struct dm_struct *dm, - u16 min_rpt_time -) + struct dm_struct *dm, + u16 min_rpt_time) { - PHYDM_DBG(dm, DBG_RA, " =====>odm_ra_tx_rpt_timer_setting()\n"); - + PHYDM_DBG(dm, DBG_RA, " =====>%s\n", __func__); if (dm->currmin_rpt_time != min_rpt_time) { PHYDM_DBG(dm, DBG_RA, - " currmin_rpt_time =0x%04x min_rpt_time=0x%04x\n", dm->currmin_rpt_time, min_rpt_time); + " currmin_rpt_time =0x%04x min_rpt_time=0x%04x\n", + dm->currmin_rpt_time, min_rpt_time); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP)) odm_ra_set_tx_rpt_time(dm, min_rpt_time); #else @@ -855,30 +830,29 @@ odm_ra_tx_rpt_timer_setting( #endif dm->currmin_rpt_time = min_rpt_time; } - PHYDM_DBG(dm, DBG_RA, " <=====odm_ra_tx_rpt_timer_setting()\n"); + PHYDM_DBG(dm, DBG_RA, " <=====%s\n", __func__); } - -void -odm_ra_support_init( - struct dm_struct *dm -) +void odm_ra_support_init(struct dm_struct *dm) { - PHYDM_DBG(dm, DBG_RA, "=====>odm_ra_support_init()\n"); + PHYDM_DBG(dm, DBG_RA, "=====>%s\n", __func__); /* 2012/02/14 MH Be noticed, the init must be after IC type is recognized!!!!! */ if (dm->support_ic_type == ODM_RTL8188E) dm->ra_support88e = true; - } +void phydm_tx_stats_rst(struct dm_struct *dm) +{ + struct _phydm_txstatistic_ *tx_stats = NULL; + tx_stats = &(dm->hw_stats); + tx_stats->hw_total_tx = 0; + tx_stats->hw_tx_drop = 0; + tx_stats->hw_tx_rty = 0; + tx_stats->hw_tx_success = 0; +} - -int -odm_ra_info_init( - struct dm_struct *dm, - u32 mac_id -) +int odm_ra_info_init(struct dm_struct *dm, u32 mac_id) { struct _odm_ra_info_ *p_ra_info = &dm->ra_info[mac_id]; @@ -895,7 +869,7 @@ odm_ra_info_init( p_ra_info->nsc_down = (N_THRESHOLD_HIGH[0x13] + N_THRESHOLD_LOW[0x13]) / 2; p_ra_info->nsc_up = (N_THRESHOLD_HIGH[0x13] + N_THRESHOLD_LOW[0x13]) / 2; p_ra_info->rate_sgi = 0; - p_ra_info->active = 1; /* active is not used at present. by page, 110819 */ + p_ra_info->active = 1; /* active is not used at present. by page, 110819 */ p_ra_info->rpt_time = 0x927c; p_ra_info->DROP = 0; p_ra_info->RTY[0] = 0; @@ -930,10 +904,7 @@ odm_ra_info_init( return 0; } -void -odm_ra_info_init_all( - struct dm_struct *dm -) +void odm_ra_info_init_all(struct dm_struct *dm) { u32 mac_id = 0; @@ -946,30 +917,28 @@ odm_ra_info_init_all( for (mac_id = 0; mac_id < ODM_ASSOCIATE_ENTRY_NUM; mac_id++) odm_ra_info_init(dm, mac_id); + /* Init Tx stats*/ + phydm_tx_stats_rst(dm); + /* Redifine arrays for I-cut NIC */ if (dm->cut_version == ODM_CUT_I) { #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) u8 i; - u8 RETRY_PENALTY_IDX_S[2][RATESIZE] = {{ - 4, 4, 4, 5, - 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */ - 4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d, - 5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f - }, /* 0329 R01 */ - { - 0x0a, 0x0a, 0x0b, 0x0c, - 0x0a, 0x0a, 0x0b, 0x0c, 0x0d, 0x10, 0x13, 0x13, /* SSTH */ + 4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d, + 5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f}, /* 0329 R01 */ + { + 0x0a, 0x0a, 0x0b, 0x0c, + 0x0a, 0x0a, 0x0b, 0x0c, 0x0d, 0x10, 0x13, 0x13, /* SSTH */ - 0x0b, 0x0b, 0x11, 0x11, 0x12, 0x12, 0x12, 0x12, - 0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15 - }; + 0x0d, 0x0e, 0x0f, 0x0f, 0x10, 0x12, 0x13, 0x14, /* SS>TH */ + 0x0b, 0x0b, 0x11, 0x11, 0x12, 0x12, 0x12, 0x12, + 0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15}; for (i = 0; i < RATESIZE; i++) { RETRY_PENALTY_IDX[0][i] = RETRY_PENALTY_IDX_S[0][i]; @@ -981,18 +950,15 @@ odm_ra_info_init_all( #endif } - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)/* This is for non-I-cut */ +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) /* This is for non-I-cut */ { - void *adapter = dm->adapter; + void *adapter = dm->adapter; /* dbg_print("adapter->mgnt_info.reg_ra_lvl = %d\n", adapter->mgnt_info.reg_ra_lvl); */ - /* */ /* 2012/09/14 MH Add for different Ra pattern init. For TPLINK case, we */ /* need to to adjust different RA pattern for middle range RA. 20-30dB degarde */ /* 88E rate adptve will raise too slow. */ - /* */ if (((PADAPTER)adapter)->MgntInfo.RegRALvl == 0) { RETRY_PENALTY_UP_IDX[11] = 0x14; @@ -1018,7 +984,7 @@ odm_ra_info_init_all( } else if (((PADAPTER)adapter)->MgntInfo.RegRALvl == 2) { /* Compile flag default is lvl2, we need not to update. */ } else if (((PADAPTER)adapter)->MgntInfo.RegRALvl >= 0x80) { - u8 index = 0, offset = ((PADAPTER)adapter)->MgntInfo.RegRALvl - 0x80; + u8 index = 0, offset = ((PADAPTER)adapter)->MgntInfo.RegRALvl - 0x80; /* Reset to default rate adaptive value. */ RETRY_PENALTY_UP_IDX[11] = 0x14; @@ -1043,124 +1009,98 @@ odm_ra_info_init_all( for (index = 0; index < 28; index++) RETRY_PENALTY_UP_IDX[index] -= (offset); } - } } #endif return; } - -u8 -odm_ra_get_sgi_8188e( - struct dm_struct *dm, - u8 mac_id -) +u8 odm_ra_get_sgi_8188e(struct dm_struct *dm, u8 mac_id) { - if ((dm == NULL) || (mac_id >= ASSOCIATE_ENTRY_NUM)) + if (dm == NULL || mac_id >= ASSOCIATE_ENTRY_NUM) return 0; - PHYDM_DBG(dm, DBG_RA, - "mac_id=%d SGI=%d\n", mac_id, dm->ra_info[mac_id].rate_sgi); + PHYDM_DBG(dm, DBG_RA, "mac_id=%d SGI=%d\n", mac_id, + dm->ra_info[mac_id].rate_sgi); return dm->ra_info[mac_id].rate_sgi; } -u8 -odm_ra_get_decision_rate_8188e( - struct dm_struct *dm, - u8 mac_id -) +u8 odm_ra_get_decision_rate_8188e(struct dm_struct *dm, u8 mac_id) { u8 rate = 0; - if ((dm == NULL) || (mac_id >= ASSOCIATE_ENTRY_NUM)) + if (dm == NULL || mac_id >= ASSOCIATE_ENTRY_NUM) return 0; - + rate = (dm->ra_info[mac_id].decision_rate); /*PHYDM_DBG(dm, DBG_RA, "Rate[%d]=0x%x\n", mac_id, rate);*/ return rate; } -u8 -odm_ra_get_hw_pwr_status_8188e( - struct dm_struct *dm, - u8 mac_id -) +u8 odm_ra_get_hw_pwr_status_8188e(struct dm_struct *dm, u8 mac_id) { u8 pt_stage = 5; - if ((dm == NULL) || (mac_id >= ASSOCIATE_ENTRY_NUM)) + if (dm == NULL || mac_id >= ASSOCIATE_ENTRY_NUM) return 0; pt_stage = (dm->ra_info[mac_id].pt_stage); - PHYDM_DBG(dm, DBG_RA, - "mac_id=%d pt_stage=0x%x\n", mac_id, pt_stage); + PHYDM_DBG(dm, DBG_RA, "mac_id=%d pt_stage=0x%x\n", mac_id, pt_stage); return pt_stage; } -u8 -phydm_get_rate_id_88e( - void *dm_void, - u8 macid -) +u8 phydm_get_rate_id_88e(void *dm_void, u8 sta_idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; - struct ra_sta_info *ra =NULL; - enum channel_width bw = (enum channel_width)0; - enum wireless_set wireless_mode = WIRELESS_HT; - u8 rate_id_idx = PHYDM_BGN_20M_1SS; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; + struct ra_sta_info *ra = NULL; + enum channel_width bw = (enum channel_width)0; + enum wireless_set wireless_mode = WIRELESS_HT; + u8 rate_id_idx = PHYDM_BGN_20M_1SS; if (is_sta_active(sta)) { - ra = &(sta->ra_info); bw = sta->bw_mode; wireless_mode = sta->support_wireless_set; } else { - PHYDM_DBG(dm, DBG_RA, "[Warning] %s: invalid sta_info\n", __func__); + PHYDM_DBG(dm, DBG_RA, "[Warning] %s: invalid sta_info\n", + __func__); return 0; } PHYDM_DBG(dm, DBG_RA, "[88E] macid=%d, wireless_set=0x%x, BW=0x%x\n", - sta->mac_id, wireless_mode, bw); + sta->mac_id, wireless_mode, bw); - if (wireless_mode == WIRELESS_CCK) /*B mode*/ + if (wireless_mode == WIRELESS_CCK) /*B mode*/ rate_id_idx = PHYDM_RAID_88E_B; - else if (wireless_mode == WIRELESS_OFDM) /*G mode*/ + else if (wireless_mode == WIRELESS_OFDM) /*G mode*/ rate_id_idx = PHYDM_RAID_88E_G; - else if (wireless_mode == (WIRELESS_CCK | WIRELESS_OFDM)) /*BG mode*/ + else if (wireless_mode == (WIRELESS_CCK | WIRELESS_OFDM)) /*BG mode*/ rate_id_idx = PHYDM_RAID_88E_GB; - else if (wireless_mode == WIRELESS_HT) /*N mode*/ - rate_id_idx = PHYDM_RAID_88E_N; - else if (wireless_mode == (WIRELESS_OFDM | WIRELESS_HT)) /*GN mode*/ + else if (wireless_mode == WIRELESS_HT) /*N mode*/ + rate_id_idx = PHYDM_RAID_88E_N; + else if (wireless_mode == (WIRELESS_OFDM | WIRELESS_HT)) /*GN mode*/ rate_id_idx = PHYDM_RAID_88E_NG; - else if (wireless_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT)) /*BGN mode*/ + else if (wireless_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT)) /*BGN mode*/ rate_id_idx = PHYDM_RAID_88E_NGB; - else { + else { PHYDM_DBG(dm, DBG_RA, "[Warrning] No rate_id is found\n"); rate_id_idx = RATR_INX_WIRELESS_GB; } - + PHYDM_DBG(dm, DBG_RA, "88E Rate_ID=((0x%x))\n", rate_id_idx); return rate_id_idx; - } -void -odm_ra_update_rate_info_8188e( - struct dm_struct *dm, - u8 mac_id, - u8 rate_id, - u32 rate_mask, - u8 sgi_enable -) +void phydm_ra_update_8188e(struct dm_struct *dm, u8 sta_idx, u8 rate_id, + u32 rate_mask, u8 sgi_enable) { - struct _odm_ra_info_ *p_ra_info = NULL; - struct cmn_sta_info *sta = dm->phydm_sta_info[mac_id]; + struct _odm_ra_info_ *p_ra_info = NULL; + struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; PHYDM_DBG(dm, DBG_RA, - "mac_id=%d rate_id=0x%x rate_mask=0x%x sgi_enable=%d\n", - sta->mac_id, rate_id, rate_mask, sgi_enable); - if ((dm == NULL) || (sta->mac_id >= ASSOCIATE_ENTRY_NUM)) + "mac_id=%d rate_id=0x%x rate_mask=0x%x sgi_enable=%d\n", + sta->mac_id, rate_id, rate_mask, sgi_enable); + if (dm == NULL || sta->mac_id >= ASSOCIATE_ENTRY_NUM) return; p_ra_info = &(dm->ra_info[sta->mac_id]); @@ -1170,29 +1110,19 @@ odm_ra_update_rate_info_8188e( odm_arfb_refresh_8188e(dm, p_ra_info); } -void -odm_ra_set_rssi_8188e( - struct dm_struct *dm, - u8 mac_id, - u8 rssi -) +void odm_ra_set_rssi_8188e(struct dm_struct *dm, u8 mac_id, u8 rssi) { struct _odm_ra_info_ *p_ra_info = NULL; - PHYDM_DBG(dm, DBG_RA, - " mac_id=%d rssi=%d\n", mac_id, rssi); - if ((dm == NULL) || (mac_id >= ASSOCIATE_ENTRY_NUM)) + PHYDM_DBG(dm, DBG_RA, " mac_id=%d rssi=%d\n", mac_id, rssi); + if (dm == NULL || mac_id >= ASSOCIATE_ENTRY_NUM) return; p_ra_info = &(dm->ra_info[mac_id]); p_ra_info->rssi_sta_ra = rssi; } -void -odm_ra_set_tx_rpt_time( - struct dm_struct *dm, - u16 min_rpt_time -) +void odm_ra_set_tx_rpt_time(struct dm_struct *dm, u16 min_rpt_time) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) if (min_rpt_time != 0xffff) { @@ -1205,27 +1135,22 @@ odm_ra_set_tx_rpt_time( #else odm_write_2byte(dm, REG_TX_RPT_TIME, min_rpt_time); #endif - } - -void -odm_ra_tx_rpt2_handle_8188e( - struct dm_struct *dm, - u8 *tx_rpt_buf, - u16 tx_rpt_len, - u32 mac_id_valid_entry0, - u32 mac_id_valid_entry1 -) +void odm_ra_tx_rpt2_handle_8188e(struct dm_struct *dm, u8 *tx_rpt_buf, + u16 tx_rpt_len, u32 mac_id_valid_entry0, + u32 mac_id_valid_entry1) { struct _odm_ra_info_ *p_ra_info = NULL; - u8 mac_id = 0; - u8 *p_buffer = NULL; - u32 valid = 0, item_num = 0; - u16 min_rpt_time = 0x927c; + struct _phydm_txstatistic_ *tx_stats = NULL; + u8 mac_id = 0; + u8 *p_buffer = NULL; + u32 valid = 0, item_num = 0; + u16 min_rpt_time = 0x927c; - PHYDM_DBG(dm, DBG_RA, "=====>odm_ra_tx_rpt2_handle_8188e(): valid0=%d valid1=%d BufferLength=%d\n", - mac_id_valid_entry0, mac_id_valid_entry1, tx_rpt_len); + PHYDM_DBG(dm, DBG_RA, "=====>%s: valid0=%d valid1=%d BufferLength=%d\n", + __func__, mac_id_valid_entry0, mac_id_valid_entry1, + tx_rpt_len); item_num = tx_rpt_len >> 3; p_buffer = tx_rpt_buf; @@ -1238,9 +1163,9 @@ odm_ra_tx_rpt2_handle_8188e( /* valid = (1 << (mac_id - 32)) & mac_id_valid_entry1;*/ p_ra_info = &(dm->ra_info[mac_id]); + tx_stats = &(dm->hw_stats); + if (valid) { - - p_ra_info->RTY[0] = (u16)GET_TX_REPORT_TYPE1_RERTY_0(p_buffer); p_ra_info->RTY[1] = (u16)GET_TX_REPORT_TYPE1_RERTY_1(p_buffer); p_ra_info->RTY[2] = (u16)GET_TX_REPORT_TYPE1_RERTY_2(p_buffer); @@ -1248,14 +1173,18 @@ odm_ra_tx_rpt2_handle_8188e( p_ra_info->RTY[4] = (u16)GET_TX_REPORT_TYPE1_RERTY_4(p_buffer); p_ra_info->DROP = (u16)GET_TX_REPORT_TYPE1_DROP_0(p_buffer); - p_ra_info->TOTAL = p_ra_info->RTY[0] + \ - p_ra_info->RTY[1] + \ - p_ra_info->RTY[2] + \ - p_ra_info->RTY[3] + \ - p_ra_info->RTY[4] + \ + p_ra_info->TOTAL = p_ra_info->RTY[0] + + p_ra_info->RTY[1] + + p_ra_info->RTY[2] + + p_ra_info->RTY[3] + + p_ra_info->RTY[4] + p_ra_info->DROP; + tx_stats->hw_total_tx += p_ra_info->TOTAL; + tx_stats->hw_tx_success += p_ra_info->TOTAL - p_ra_info->DROP; + tx_stats->hw_tx_drop += p_ra_info->DROP; + tx_stats->hw_tx_rty += p_ra_info->RTY[1] + p_ra_info->RTY[2] * 2 + p_ra_info->RTY[3] * 3 + p_ra_info->RTY[4] * 4; #if defined(TXRETRY_CNT) - extern struct stat_info *get_macidinfo(struct rtl8192cd_priv *priv, unsigned int aid); + extern struct stat_info *get_macidinfo(struct rtl8192cd_priv * priv, unsigned int aid); { struct stat_info *pstat = get_macidinfo(dm->priv, mac_id); @@ -1271,24 +1200,20 @@ odm_ra_tx_rpt2_handle_8188e( #endif if (p_ra_info->TOTAL != 0) { PHYDM_DBG(dm, DBG_RA, - "macid=%d Total=%d R0=%d R1=%d R2=%d R3=%d R4=%d D0=%d valid0=%x valid1=%x\n", - mac_id, - p_ra_info->TOTAL, - p_ra_info->RTY[0], - p_ra_info->RTY[1], - p_ra_info->RTY[2], - p_ra_info->RTY[3], - p_ra_info->RTY[4], - p_ra_info->DROP, - mac_id_valid_entry0, - mac_id_valid_entry1); + "macid=%d Total=%d R0=%d R1=%d R2=%d R3=%d R4=%d D0=%d valid0=%x valid1=%x\n", + mac_id, p_ra_info->TOTAL, + p_ra_info->RTY[0], p_ra_info->RTY[1], + p_ra_info->RTY[2], p_ra_info->RTY[3], + p_ra_info->RTY[4], p_ra_info->DROP, + mac_id_valid_entry0, + mac_id_valid_entry1); #if POWER_TRAINING_ACTIVE == 1 if (p_ra_info->pt_active) { if (p_ra_info->ra_stage < 5) odm_rate_decision_8188e(dm, p_ra_info, mac_id); else if (p_ra_info->ra_stage == 5) /* Power training try state */ odm_pt_try_state_8188e(dm, p_ra_info); - else /* ra_stage==6 */ + else /* ra_stage==6 */ odm_pt_decision_8188e(p_ra_info); /* Stage_RA counter */ @@ -1305,147 +1230,97 @@ odm_ra_tx_rpt2_handle_8188e( #if (DM_ODM_SUPPORT_TYPE & ODM_AP) extern void rtl8188e_set_station_tx_rate_info(struct dm_struct *, struct _odm_ra_info_ *, int); rtl8188e_set_station_tx_rate_info(dm, p_ra_info, mac_id); - #if 0 +#if 0 void rtl8188e_detect_sta_existance(struct dm_struct *dm, struct _odm_ra_info_ *p_ra_info, int mac_id); rtl8188e_detect_sta_existance(dm, p_ra_info, mac_id); - #endif +#endif #endif PHYDM_DBG(dm, DBG_RA, - "macid=%d R0=%d R1=%d R2=%d R3=%d R4=%d drop=%d valid0=%x rate_id=%d SGI=%d\n", - mac_id, - p_ra_info->RTY[0], - p_ra_info->RTY[1], - p_ra_info->RTY[2], - p_ra_info->RTY[3], - p_ra_info->RTY[4], - p_ra_info->DROP, - mac_id_valid_entry0, - p_ra_info->decision_rate, - p_ra_info->rate_sgi); + "macid=%d R0=%d R1=%d R2=%d R3=%d R4=%d drop=%d valid0=%x rate_id=%d SGI=%d\n", + mac_id, p_ra_info->RTY[0], + p_ra_info->RTY[1], p_ra_info->RTY[2], + p_ra_info->RTY[3], p_ra_info->RTY[4], + p_ra_info->DROP, mac_id_valid_entry0, + p_ra_info->decision_rate, + p_ra_info->rate_sgi); } else PHYDM_DBG(dm, DBG_RA, " TOTAL=0!!!!\n"); + + if (min_rpt_time > p_ra_info->rpt_time) + min_rpt_time = p_ra_info->rpt_time; } - if (min_rpt_time > p_ra_info->rpt_time) - min_rpt_time = p_ra_info->rpt_time; - p_buffer += TX_RPT2_ITEM_SIZE; - + mac_id++; } while (mac_id < item_num); odm_ra_tx_rpt_timer_setting(dm, min_rpt_time); - - PHYDM_DBG(dm, DBG_RA, "<===== odm_ra_tx_rpt2_handle_8188e()\n"); + PHYDM_DBG(dm, DBG_RA, "<===== %s\n", __func__); } #else static void odm_ra_tx_rpt_timer_setting( - struct dm_struct *dm, - u16 min_rpt_time -) -{ - return; -} - - -void -odm_ra_support_init( - struct dm_struct *dm -) -{ - return; -} - -int -odm_ra_info_init( - struct dm_struct *dm, - u32 mac_id -) -{ - return 0; -} - -void -odm_ra_info_init_all( - struct dm_struct *dm -) -{ - return; -} - -u8 -odm_ra_get_sgi_8188e( - struct dm_struct *dm, - u8 mac_id -) -{ - return 0; -} - -u8 -odm_ra_get_decision_rate_8188e( - struct dm_struct *dm, - u8 mac_id -) -{ - return 0; -} -u8 -odm_ra_get_hw_pwr_status_8188e( - struct dm_struct *dm, - u8 mac_id -) -{ - return 0; -} - -void -odm_ra_update_rate_info_8188e( struct dm_struct *dm, - u8 mac_id, - u8 rate_id, - u32 rate_mask, - u8 sgi_enable -) + u16 min_rpt_time) { return; } -void -odm_ra_set_rssi_8188e( - struct dm_struct *dm, - u8 mac_id, - u8 rssi -) +void odm_ra_support_init(struct dm_struct *dm) { return; } -void -odm_ra_set_tx_rpt_time( - struct dm_struct *dm, - u16 min_rpt_time -) +int odm_ra_info_init(struct dm_struct *dm, u32 mac_id) +{ + return 0; +} + +void odm_ra_info_init_all(struct dm_struct *dm) { return; } -void -odm_ra_tx_rpt2_handle_8188e( - struct dm_struct *dm, - u8 *tx_rpt_buf, - u16 tx_rpt_len, - u32 mac_id_valid_entry0, - u32 mac_id_valid_entry1 -) +u8 odm_ra_get_sgi_8188e(struct dm_struct *dm, u8 mac_id) +{ + return 0; +} + +u8 odm_ra_get_decision_rate_8188e(struct dm_struct *dm, u8 mac_id) +{ + return 0; +} +u8 odm_ra_get_hw_pwr_status_8188e(struct dm_struct *dm, u8 mac_id) +{ + return 0; +} + +void phydm_ra_update_8188e(struct dm_struct *dm, u8 mac_id, u8 rate_id, + u32 rate_mask, u8 sgi_enable) { return; } +void odm_ra_set_rssi_8188e(struct dm_struct *dm, u8 mac_id, u8 rssi) +{ + return; +} + +void odm_ra_set_tx_rpt_time(struct dm_struct *dm, u16 min_rpt_time) +{ + return; +} + +void odm_ra_tx_rpt2_handle_8188e(struct dm_struct *dm, u8 *tx_rpt_buf, + u16 tx_rpt_len, u32 mac_id_valid_entry0, + u32 mac_id_valid_entry1) +{ + return; +} #endif diff --git a/hal/phydm/rtl8188e/hal8188erateadaptive.h b/hal/phydm/rtl8188e/hal8188erateadaptive.h index ba5f32a..979e464 100644 --- a/hal/phydm/rtl8188e/hal8188erateadaptive.h +++ b/hal/phydm/rtl8188e/hal8188erateadaptive.h @@ -16,117 +16,71 @@ #define __INC_RA_H /* rate adaptive define */ -#define PERENTRY 23 -#define RETRYSIZE 5 -#define RATESIZE 28 -#define TX_RPT2_ITEM_SIZE 8 +#define PERENTRY 23 +#define RETRYSIZE 5 +#define RATESIZE 28 +#define TX_RPT2_ITEM_SIZE 8 -#define DM_RA_RATE_UP 1 -#define DM_RA_RATE_DOWN 2 +#define DM_RA_RATE_UP 1 +#define DM_RA_RATE_DOWN 2 -#define AP_USB_SDIO ((DM_ODM_SUPPORT_TYPE == ODM_AP) && ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))) +#define AP_USB_SDIO ((DM_ODM_SUPPORT_TYPE == ODM_AP) && ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))) #if (DM_ODM_SUPPORT_TYPE != ODM_WIN) - /* +/* * TX report 2 format in Rx desc * */ - #define GET_TX_RPT2_DESC_PKT_LEN_88E(__prx_status_desc) LE_BITS_TO_4BYTE(__prx_status_desc, 0, 9) - #define GET_TX_RPT2_DESC_MACID_VALID_1_88E(__prx_status_desc) LE_BITS_TO_4BYTE(__prx_status_desc+16, 0, 32) - #define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__prx_status_desc) LE_BITS_TO_4BYTE(__prx_status_desc+20, 0, 32) +#define GET_TX_RPT2_DESC_PKT_LEN_88E(__prx_status_desc) LE_BITS_TO_4BYTE(__prx_status_desc, 0, 9) +#define GET_TX_RPT2_DESC_MACID_VALID_1_88E(__prx_status_desc) LE_BITS_TO_4BYTE(__prx_status_desc + 16, 0, 32) +#define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__prx_status_desc) LE_BITS_TO_4BYTE(__prx_status_desc + 20, 0, 32) - #define GET_TX_REPORT_TYPE1_RERTY_0(__paddr) LE_BITS_TO_4BYTE(__paddr, 0, 16) - #define GET_TX_REPORT_TYPE1_RERTY_1(__paddr) LE_BITS_TO_1BYTE(__paddr+2, 0, 8) - #define GET_TX_REPORT_TYPE1_RERTY_2(__paddr) LE_BITS_TO_1BYTE(__paddr+3, 0, 8) - #define GET_TX_REPORT_TYPE1_RERTY_3(__paddr) LE_BITS_TO_1BYTE(__paddr+4, 0, 8) - #define GET_TX_REPORT_TYPE1_RERTY_4(__paddr) LE_BITS_TO_1BYTE(__paddr+4+1, 0, 8) - #define GET_TX_REPORT_TYPE1_DROP_0(__paddr) LE_BITS_TO_1BYTE(__paddr+4+2, 0, 8) - #define GET_TX_REPORT_TYPE1_DROP_1(__paddr) LE_BITS_TO_1BYTE(__paddr+4+3, 0, 8) +#define GET_TX_REPORT_TYPE1_RERTY_0(__paddr) LE_BITS_TO_4BYTE(__paddr, 0, 16) +#define GET_TX_REPORT_TYPE1_RERTY_1(__paddr) LE_BITS_TO_1BYTE(__paddr + 2, 0, 8) +#define GET_TX_REPORT_TYPE1_RERTY_2(__paddr) LE_BITS_TO_1BYTE(__paddr + 3, 0, 8) +#define GET_TX_REPORT_TYPE1_RERTY_3(__paddr) LE_BITS_TO_1BYTE(__paddr + 4, 0, 8) +#define GET_TX_REPORT_TYPE1_RERTY_4(__paddr) LE_BITS_TO_1BYTE(__paddr + 4 + 1, 0, 8) +#define GET_TX_REPORT_TYPE1_DROP_0(__paddr) LE_BITS_TO_1BYTE(__paddr + 4 + 2, 0, 8) +#define GET_TX_REPORT_TYPE1_DROP_1(__paddr) LE_BITS_TO_1BYTE(__paddr + 4 + 3, 0, 8) #endif enum phydm_rateid_idx_88e_e { /*Copy From SD4 _RATR_TABLE_MODE*/ - PHYDM_RAID_88E_NGB = 0, /* BGN 40 Mhz 2SS 1SS */ - PHYDM_RAID_88E_NG = 1, /* GN or N */ - PHYDM_RAID_88E_NB = 2, /* BGN 20 Mhz 2SS 1SS or BN */ - PHYDM_RAID_88E_N = 3, - PHYDM_RAID_88E_GB = 4, - PHYDM_RAID_88E_G = 5, - PHYDM_RAID_88E_B = 6, - PHYDM_RAID_88E_MC = 7, - PHYDM_RAID_88E_AC_N = 8 + PHYDM_RAID_88E_NGB = 0, /* BGN 40 Mhz 2SS 1SS */ + PHYDM_RAID_88E_NG = 1, /* GN or N */ + PHYDM_RAID_88E_NB = 2, /* BGN 20 Mhz 2SS 1SS or BN */ + PHYDM_RAID_88E_N = 3, + PHYDM_RAID_88E_GB = 4, + PHYDM_RAID_88E_G = 5, + PHYDM_RAID_88E_B = 6, + PHYDM_RAID_88E_MC = 7, + PHYDM_RAID_88E_AC_N = 8 }; - /* End rate adaptive define */ -void -odm_ra_support_init( - struct dm_struct *dm -); +extern void phydm_tx_stats_rst(struct dm_struct *dm); -void -odm_ra_info_init_all( - struct dm_struct *dm -); +void odm_ra_support_init(struct dm_struct *dm); -int -odm_ra_info_init( - struct dm_struct *dm, - u32 mac_id -); +void odm_ra_info_init_all(struct dm_struct *dm); -u8 -odm_ra_get_sgi_8188e( - struct dm_struct *dm, - u8 mac_id -); +int odm_ra_info_init(struct dm_struct *dm, u32 mac_id); -u8 -odm_ra_get_decision_rate_8188e( - struct dm_struct *dm, - u8 mac_id -); +u8 odm_ra_get_sgi_8188e(struct dm_struct *dm, u8 mac_id); -u8 -odm_ra_get_hw_pwr_status_8188e( - struct dm_struct *dm, - u8 mac_id -); +u8 odm_ra_get_decision_rate_8188e(struct dm_struct *dm, u8 mac_id); -u8 -phydm_get_rate_id_88e( - void *dm_void, - u8 macid -); +u8 odm_ra_get_hw_pwr_status_8188e(struct dm_struct *dm, u8 mac_id); -void -odm_ra_update_rate_info_8188e( - struct dm_struct *dm, - u8 mac_id, - u8 rate_id, - u32 rate_mask, - u8 sgi_enable -); +u8 phydm_get_rate_id_88e(void *dm_void, u8 macid); -void -odm_ra_set_rssi_8188e( - struct dm_struct *dm, - u8 mac_id, - u8 rssi -); +void phydm_ra_update_8188e(struct dm_struct *dm, u8 mac_id, u8 rate_id, + u32 rate_mask, u8 sgi_enable); -void -odm_ra_tx_rpt2_handle_8188e( - struct dm_struct *dm, - u8 *tx_rpt_buf, - u16 tx_rpt_len, - u32 mac_id_valid_entry0, - u32 mac_id_valid_entry1 -); +void odm_ra_set_rssi_8188e(struct dm_struct *dm, u8 mac_id, u8 rssi); +void odm_ra_tx_rpt2_handle_8188e(struct dm_struct *dm, u8 *tx_rpt_buf, + u16 tx_rpt_len, u32 mac_id_valid_entry0, + u32 mac_id_valid_entry1); -void -odm_ra_set_tx_rpt_time( - struct dm_struct *dm, - u16 min_rpt_time -); +void odm_ra_set_tx_rpt_time(struct dm_struct *dm, u16 min_rpt_time); #endif diff --git a/hal/phydm/rtl8188e/hal8188ereg.h b/hal/phydm/rtl8188e/hal8188ereg.h index 8bcbaf2..1479fd6 100644 --- a/hal/phydm/rtl8188e/hal8188ereg.h +++ b/hal/phydm/rtl8188e/hal8188ereg.h @@ -21,39 +21,38 @@ * * * ************************************************************ */ -#ifndef __HAL_8188E_REG_H__ +#ifndef __HAL_8188E_REG_H__ #define __HAL_8188E_REG_H__ /* * Register Definition * */ -#define TRX_ANTDIV_PATH 0x860 -#define RX_ANTDIV_PATH 0xb2c -#define ODM_R_A_AGC_CORE1_8188E 0xc50 +#define TRX_ANTDIV_PATH 0x860 +#define RX_ANTDIV_PATH 0xb2c +#define ODM_R_A_AGC_CORE1_8188E 0xc50 -#define REG_GPIO_EXT_CTRL 0x0060 +#define REG_GPIO_EXT_CTRL 0x0060 -#define REG_MCUFWDL_8188E 0x0080 -#define REG_FW_DBG_STATUS_8188E 0x0088 -#define REG_FW_DBG_CTRL_8188E 0x008F - -#define REG_CR_8188E 0x0100 +#define REG_MCUFWDL_8188E 0x0080 +#define REG_FW_DBG_STATUS_8188E 0x0088 +#define REG_FW_DBG_CTRL_8188E 0x008F +#define REG_CR_8188E 0x0100 /* * Bitmap Definition * */ -#define BIT_FA_RESET_8188E BIT(0) -#define REG_ADAPTIVE_DATA_RATE_0 0x2B0 -#define REG_DBI_WDATA_8188 0x0348 /* DBI Write data */ -#define REG_DBI_RDATA_8188 0x034C /* DBI Read data */ -#define REG_DBI_ADDR_8188 0x0350 /* DBI Address */ -#define REG_DBI_FLAG_8188 0x0352 /* DBI Read/Write Flag */ -#define REG_MDIO_WDATA_8188E 0x0354 /* MDIO for Write PCIE PHY */ -#define REG_MDIO_RDATA_8188E 0x0356 /* MDIO for Reads PCIE PHY */ -#define REG_MDIO_CTL_8188E 0x0358 /* MDIO for Control */ +#define BIT_FA_RESET_8188E BIT(0) +#define REG_ADAPTIVE_DATA_RATE_0 0x2B0 +#define REG_DBI_WDATA_8188 0x0348 /* DBI Write data */ +#define REG_DBI_RDATA_8188 0x034C /* DBI Read data */ +#define REG_DBI_ADDR_8188 0x0350 /* DBI Address */ +#define REG_DBI_FLAG_8188 0x0352 /* DBI Read/Write Flag */ +#define REG_MDIO_WDATA_8188E 0x0354 /* MDIO for Write PCIE PHY */ +#define REG_MDIO_RDATA_8188E 0x0356 /* MDIO for Reads PCIE PHY */ +#define REG_MDIO_CTL_8188E 0x0358 /* MDIO for Control */ /* [0-63] */ -#define REG_MACID_NO_LINK 0x484 /* No Link register (bit[x] enabled means dropping packets for MACID in HW queue) */ +#define REG_MACID_NO_LINK 0x484 /* No Link register (bit[x] enabled means dropping packets for MACID in HW queue) */ #endif diff --git a/hal/phydm/rtl8188e/halhwimg8188e_bb.c b/hal/phydm/rtl8188e/halhwimg8188e_bb.c index b56eb6b..be47b39 100644 --- a/hal/phydm/rtl8188e/halhwimg8188e_bb.c +++ b/hal/phydm/rtl8188e/halhwimg8188e_bb.c @@ -13,55 +13,65 @@ * *****************************************************************************/ -/*Image2HeaderVersion: 2.18*/ +/*Image2HeaderVersion: 3.5.2*/ #include "mp_precomp.h" #include "../phydm_precomp.h" #if (RTL8188E_SUPPORT == 1) static boolean check_positive( - struct dm_struct *dm, - const u32 condition1, - const u32 condition2, - const u32 condition3, - const u32 condition4 + struct dm_struct *dm, + const u32 condition1, + const u32 condition2, + const u32 condition3, + const u32 condition4 ) { - u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ - ((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/ - ((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/ - ((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */ - ((dm->board_type & BIT(2)) >> 2) << 4; /* _BT*/ + u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ + ((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/ + ((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/ + ((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */ + ((dm->board_type & BIT(2)) >> 2) << 4 | /* _BT*/ + ((dm->board_type & BIT(1)) >> 1) << 5 | /* _NGFF*/ + ((dm->board_type & BIT(5)) >> 5) << 6; /* _TRSWT*/ - u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4; - u32 driver1 = dm->cut_version << 24 | - (dm->support_interface & 0xF0) << 16 | - dm->support_platform << 16 | - dm->package_type << 12 | - (dm->support_interface & 0x0F) << 8 | - _board_type; + u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4; - u32 driver2 = (dm->type_glna & 0xFF) << 0 | - (dm->type_gpa & 0xFF) << 8 | - (dm->type_alna & 0xFF) << 16 | - (dm->type_apa & 0xFF) << 24; + u8 cut_version_for_para = (dm->cut_version == ODM_CUT_A) ? 15 : dm->cut_version; + u8 pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type; - u32 driver3 = 0; + u32 driver1 = cut_version_for_para << 24 | + (dm->support_interface & 0xF0) << 16 | + dm->support_platform << 16 | + pkg_type_for_para << 12 | + (dm->support_interface & 0x0F) << 8 | + _board_type; - u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | - (dm->type_gpa & 0xFF00) | - (dm->type_alna & 0xFF00) << 8 | - (dm->type_apa & 0xFF00) << 16; + u32 driver2 = (dm->type_glna & 0xFF) << 0 | + (dm->type_gpa & 0xFF) << 8 | + (dm->type_alna & 0xFF) << 16 | + (dm->type_apa & 0xFF) << 24; + + u32 driver3 = 0; + + u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | + (dm->type_gpa & 0xFF00) | + (dm->type_alna & 0xFF00) << 8 | + (dm->type_apa & 0xFF00) << 16; PHYDM_DBG(dm, ODM_COMP_INIT, - "===> check_positive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4); + "===> %s (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", + __func__, cond1, cond2, cond3, cond4); PHYDM_DBG(dm, ODM_COMP_INIT, - "===> check_positive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4); + "===> %s (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", + __func__, driver1, driver2, driver3, driver4); PHYDM_DBG(dm, ODM_COMP_INIT, - " (Platform, Interface) = (0x%X, 0x%X)\n", dm->support_platform, dm->support_interface); + " (Platform, Interface) = (0x%X, 0x%X)\n", + dm->support_platform, dm->support_interface); PHYDM_DBG(dm, ODM_COMP_INIT, - " (Board, Package) = (0x%X, 0x%X)\n", dm->board_type, dm->package_type); + " (Board, Package) = (0x%X, 0x%X)\n", dm->board_type, + dm->package_type); /*============== value Defined Check ===============*/ @@ -75,11 +85,11 @@ check_positive( /*=============== Bit Defined Check ================*/ /* We don't care [31:28] */ - cond1 &= 0x00FF0FFF; + cond1 &= 0x00FF0FFF; driver1 &= 0x00FF0FFF; if ((cond1 & driver1) == cond1) { - u32 bit_mask = 0; + u32 bit_mask = 0; if ((cond1 & 0x0F) == 0) /* board_type is DONTCARE*/ return true; @@ -100,974 +110,963 @@ check_positive( } else return false; } -static boolean -check_negative( - struct dm_struct *dm, - const u32 condition1, - const u32 condition2 -) -{ - return true; -} /****************************************************************************** -* AGC_TAB.TXT +* agc_tab.TXT ******************************************************************************/ u32 array_mp_8188e_agc_tab[] = { 0x88000001, 0x00000000, 0x40000000, 0x00000000, - 0xC78, 0xF6000001, - 0xC78, 0xF5010001, - 0xC78, 0xF4020001, - 0xC78, 0xF3030001, - 0xC78, 0xF2040001, + 0xC78, 0xF6000001, + 0xC78, 0xF5010001, + 0xC78, 0xF4020001, + 0xC78, 0xF3030001, + 0xC78, 0xF2040001, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xC78, 0xF7000001, - 0xC78, 0xF6010001, - 0xC78, 0xF5020001, - 0xC78, 0xF4030001, - 0xC78, 0xF3040001, + 0xC78, 0xF7000001, + 0xC78, 0xF6010001, + 0xC78, 0xF5020001, + 0xC78, 0xF4030001, + 0xC78, 0xF3040001, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xC78, 0xF9000001, - 0xC78, 0xF8010001, - 0xC78, 0xF7020001, - 0xC78, 0xF6030001, - 0xC78, 0xF5040001, + 0xC78, 0xF9000001, + 0xC78, 0xF8010001, + 0xC78, 0xF7020001, + 0xC78, 0xF6030001, + 0xC78, 0xF5040001, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xC78, 0xFB000001, - 0xC78, 0xFB010001, - 0xC78, 0xFA020001, - 0xC78, 0xF9030001, - 0xC78, 0xF8040001, + 0xC78, 0xFB000001, + 0xC78, 0xFB010001, + 0xC78, 0xFA020001, + 0xC78, 0xF9030001, + 0xC78, 0xF8040001, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xC78, 0xFF000001, - 0xC78, 0xFF010001, - 0xC78, 0xFE020001, - 0xC78, 0xFD030001, - 0xC78, 0xFC040001, + 0xC78, 0xFF000001, + 0xC78, 0xFF010001, + 0xC78, 0xFE020001, + 0xC78, 0xFD030001, + 0xC78, 0xFC040001, 0xA0000000, 0x00000000, - 0xC78, 0xFB000001, - 0xC78, 0xFB010001, - 0xC78, 0xFB020001, - 0xC78, 0xFB030001, - 0xC78, 0xFB040001, + 0xC78, 0xFB000001, + 0xC78, 0xFB010001, + 0xC78, 0xFB020001, + 0xC78, 0xFB030001, + 0xC78, 0xFB040001, 0xB0000000, 0x00000000, 0x88000001, 0x00000000, 0x40000000, 0x00000000, - 0xC78, 0xF1050001, - 0xC78, 0xF0060001, - 0xC78, 0xEF070001, - 0xC78, 0xEE080001, - 0xC78, 0xED090001, - 0xC78, 0xEC0A0001, - 0xC78, 0xEB0B0001, - 0xC78, 0xEA0C0001, - 0xC78, 0xE90D0001, - 0xC78, 0xE80E0001, - 0xC78, 0xE70F0001, - 0xC78, 0xE6100001, - 0xC78, 0xE5110001, - 0xC78, 0xE4120001, - 0xC78, 0xE3130001, - 0xC78, 0xE2140001, - 0xC78, 0xC5150001, - 0xC78, 0xC4160001, - 0xC78, 0xC3170001, - 0xC78, 0xC2180001, - 0xC78, 0x88190001, - 0xC78, 0x871A0001, - 0xC78, 0x861B0001, - 0xC78, 0x851C0001, - 0xC78, 0x841D0001, - 0xC78, 0x831E0001, - 0xC78, 0x821F0001, - 0xC78, 0x81200001, - 0xC78, 0x80210001, + 0xC78, 0xF1050001, + 0xC78, 0xF0060001, + 0xC78, 0xEF070001, + 0xC78, 0xEE080001, + 0xC78, 0xED090001, + 0xC78, 0xEC0A0001, + 0xC78, 0xEB0B0001, + 0xC78, 0xEA0C0001, + 0xC78, 0xE90D0001, + 0xC78, 0xE80E0001, + 0xC78, 0xE70F0001, + 0xC78, 0xE6100001, + 0xC78, 0xE5110001, + 0xC78, 0xE4120001, + 0xC78, 0xE3130001, + 0xC78, 0xE2140001, + 0xC78, 0xC5150001, + 0xC78, 0xC4160001, + 0xC78, 0xC3170001, + 0xC78, 0xC2180001, + 0xC78, 0x88190001, + 0xC78, 0x871A0001, + 0xC78, 0x861B0001, + 0xC78, 0x851C0001, + 0xC78, 0x841D0001, + 0xC78, 0x831E0001, + 0xC78, 0x821F0001, + 0xC78, 0x81200001, + 0xC78, 0x80210001, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xC78, 0xF2050001, - 0xC78, 0xF1060001, - 0xC78, 0xF0070001, - 0xC78, 0xEF080001, - 0xC78, 0xEE090001, - 0xC78, 0xED0A0001, - 0xC78, 0xEC0B0001, - 0xC78, 0xEB0C0001, - 0xC78, 0xEA0D0001, - 0xC78, 0xE90E0001, - 0xC78, 0xE80F0001, - 0xC78, 0xE7100001, - 0xC78, 0xE6110001, - 0xC78, 0xE5120001, - 0xC78, 0xE4130001, - 0xC78, 0xE3140001, - 0xC78, 0xE2150001, - 0xC78, 0xE1160001, - 0xC78, 0x89170001, - 0xC78, 0x88180001, - 0xC78, 0x87190001, - 0xC78, 0x861A0001, - 0xC78, 0x851B0001, - 0xC78, 0x841C0001, - 0xC78, 0x831D0001, - 0xC78, 0x821E0001, - 0xC78, 0x811F0001, - 0xC78, 0x6B200001, - 0xC78, 0x6A210001, + 0xC78, 0xF2050001, + 0xC78, 0xF1060001, + 0xC78, 0xF0070001, + 0xC78, 0xEF080001, + 0xC78, 0xEE090001, + 0xC78, 0xED0A0001, + 0xC78, 0xEC0B0001, + 0xC78, 0xEB0C0001, + 0xC78, 0xEA0D0001, + 0xC78, 0xE90E0001, + 0xC78, 0xE80F0001, + 0xC78, 0xE7100001, + 0xC78, 0xE6110001, + 0xC78, 0xE5120001, + 0xC78, 0xE4130001, + 0xC78, 0xE3140001, + 0xC78, 0xE2150001, + 0xC78, 0xE1160001, + 0xC78, 0x89170001, + 0xC78, 0x88180001, + 0xC78, 0x87190001, + 0xC78, 0x861A0001, + 0xC78, 0x851B0001, + 0xC78, 0x841C0001, + 0xC78, 0x831D0001, + 0xC78, 0x821E0001, + 0xC78, 0x811F0001, + 0xC78, 0x6B200001, + 0xC78, 0x6A210001, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xC78, 0xF4050001, - 0xC78, 0xF3060001, - 0xC78, 0xF2070001, - 0xC78, 0xF1080001, - 0xC78, 0xF0090001, - 0xC78, 0xEF0A0001, - 0xC78, 0xEE0B0001, - 0xC78, 0xED0C0001, - 0xC78, 0xEC0D0001, - 0xC78, 0xEB0E0001, - 0xC78, 0xEA0F0001, - 0xC78, 0xE9100001, - 0xC78, 0xE8110001, - 0xC78, 0xE7120001, - 0xC78, 0xE6130001, - 0xC78, 0xE5140001, - 0xC78, 0xE4150001, - 0xC78, 0xE3160001, - 0xC78, 0xE2170001, - 0xC78, 0xE1180001, - 0xC78, 0x8A190001, - 0xC78, 0x891A0001, - 0xC78, 0x881B0001, - 0xC78, 0x871C0001, - 0xC78, 0x861D0001, - 0xC78, 0x851E0001, - 0xC78, 0x841F0001, - 0xC78, 0x83200001, - 0xC78, 0x82210001, + 0xC78, 0xF4050001, + 0xC78, 0xF3060001, + 0xC78, 0xF2070001, + 0xC78, 0xF1080001, + 0xC78, 0xF0090001, + 0xC78, 0xEF0A0001, + 0xC78, 0xEE0B0001, + 0xC78, 0xED0C0001, + 0xC78, 0xEC0D0001, + 0xC78, 0xEB0E0001, + 0xC78, 0xEA0F0001, + 0xC78, 0xE9100001, + 0xC78, 0xE8110001, + 0xC78, 0xE7120001, + 0xC78, 0xE6130001, + 0xC78, 0xE5140001, + 0xC78, 0xE4150001, + 0xC78, 0xE3160001, + 0xC78, 0xE2170001, + 0xC78, 0xE1180001, + 0xC78, 0x8A190001, + 0xC78, 0x891A0001, + 0xC78, 0x881B0001, + 0xC78, 0x871C0001, + 0xC78, 0x861D0001, + 0xC78, 0x851E0001, + 0xC78, 0x841F0001, + 0xC78, 0x83200001, + 0xC78, 0x82210001, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xC78, 0xF7050001, - 0xC78, 0xF6060001, - 0xC78, 0xF5070001, - 0xC78, 0xF4080001, - 0xC78, 0xF3090001, - 0xC78, 0xF20A0001, - 0xC78, 0xF10B0001, - 0xC78, 0xF00C0001, - 0xC78, 0xEF0D0001, - 0xC78, 0xEE0E0001, - 0xC78, 0xED0F0001, - 0xC78, 0xEC100001, - 0xC78, 0xEB110001, - 0xC78, 0xEA120001, - 0xC78, 0xE9130001, - 0xC78, 0xE8140001, - 0xC78, 0xE7150001, - 0xC78, 0xE6160001, - 0xC78, 0xE5170001, - 0xC78, 0xE4180001, - 0xC78, 0xC7190001, - 0xC78, 0xC61A0001, - 0xC78, 0xC51B0001, - 0xC78, 0xC41C0001, - 0xC78, 0xC31D0001, - 0xC78, 0xC21E0001, - 0xC78, 0x871F0001, - 0xC78, 0x86200001, - 0xC78, 0x85210001, + 0xC78, 0xF7050001, + 0xC78, 0xF6060001, + 0xC78, 0xF5070001, + 0xC78, 0xF4080001, + 0xC78, 0xF3090001, + 0xC78, 0xF20A0001, + 0xC78, 0xF10B0001, + 0xC78, 0xF00C0001, + 0xC78, 0xEF0D0001, + 0xC78, 0xEE0E0001, + 0xC78, 0xED0F0001, + 0xC78, 0xEC100001, + 0xC78, 0xEB110001, + 0xC78, 0xEA120001, + 0xC78, 0xE9130001, + 0xC78, 0xE8140001, + 0xC78, 0xE7150001, + 0xC78, 0xE6160001, + 0xC78, 0xE5170001, + 0xC78, 0xE4180001, + 0xC78, 0xC7190001, + 0xC78, 0xC61A0001, + 0xC78, 0xC51B0001, + 0xC78, 0xC41C0001, + 0xC78, 0xC31D0001, + 0xC78, 0xC21E0001, + 0xC78, 0x871F0001, + 0xC78, 0x86200001, + 0xC78, 0x85210001, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xC78, 0xFB050001, - 0xC78, 0xFA060001, - 0xC78, 0xF9070001, - 0xC78, 0xF8080001, - 0xC78, 0xF7090001, - 0xC78, 0xF60A0001, - 0xC78, 0xF50B0001, - 0xC78, 0xF40C0001, - 0xC78, 0xF30D0001, - 0xC78, 0xF20E0001, - 0xC78, 0xF10F0001, - 0xC78, 0xF0100001, - 0xC78, 0xEF110001, - 0xC78, 0xEE120001, - 0xC78, 0xED130001, - 0xC78, 0xEC140001, - 0xC78, 0xEB150001, - 0xC78, 0xEA160001, - 0xC78, 0xE9170001, - 0xC78, 0xE8180001, - 0xC78, 0xE7190001, - 0xC78, 0xE61A0001, - 0xC78, 0xC51B0001, - 0xC78, 0xC41C0001, - 0xC78, 0xC31D0001, - 0xC78, 0xC21E0001, - 0xC78, 0x881F0001, - 0xC78, 0x87200001, - 0xC78, 0x86210001, + 0xC78, 0xFB050001, + 0xC78, 0xFA060001, + 0xC78, 0xF9070001, + 0xC78, 0xF8080001, + 0xC78, 0xF7090001, + 0xC78, 0xF60A0001, + 0xC78, 0xF50B0001, + 0xC78, 0xF40C0001, + 0xC78, 0xF30D0001, + 0xC78, 0xF20E0001, + 0xC78, 0xF10F0001, + 0xC78, 0xF0100001, + 0xC78, 0xEF110001, + 0xC78, 0xEE120001, + 0xC78, 0xED130001, + 0xC78, 0xEC140001, + 0xC78, 0xEB150001, + 0xC78, 0xEA160001, + 0xC78, 0xE9170001, + 0xC78, 0xE8180001, + 0xC78, 0xE7190001, + 0xC78, 0xE61A0001, + 0xC78, 0xC51B0001, + 0xC78, 0xC41C0001, + 0xC78, 0xC31D0001, + 0xC78, 0xC21E0001, + 0xC78, 0x881F0001, + 0xC78, 0x87200001, + 0xC78, 0x86210001, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0xC78, 0xFA050001, - 0xC78, 0xF9060001, - 0xC78, 0xF8070001, - 0xC78, 0xF7080001, - 0xC78, 0xF6090001, - 0xC78, 0xF50A0001, - 0xC78, 0xF40B0001, - 0xC78, 0xF30C0001, - 0xC78, 0xF20D0001, - 0xC78, 0xF10E0001, - 0xC78, 0xF00F0001, - 0xC78, 0xEF100001, - 0xC78, 0xEE110001, - 0xC78, 0xED120001, - 0xC78, 0xEC130001, - 0xC78, 0xEB140001, - 0xC78, 0xEA150001, - 0xC78, 0xE9160001, - 0xC78, 0xE8170001, - 0xC78, 0xE7180001, - 0xC78, 0xE6190001, - 0xC78, 0xE51A0001, - 0xC78, 0xE41B0001, - 0xC78, 0xC71C0001, - 0xC78, 0xC61D0001, - 0xC78, 0xC51E0001, - 0xC78, 0xC41F0001, - 0xC78, 0xC3200001, - 0xC78, 0xC2210001, + 0xC78, 0xFA050001, + 0xC78, 0xF9060001, + 0xC78, 0xF8070001, + 0xC78, 0xF7080001, + 0xC78, 0xF6090001, + 0xC78, 0xF50A0001, + 0xC78, 0xF40B0001, + 0xC78, 0xF30C0001, + 0xC78, 0xF20D0001, + 0xC78, 0xF10E0001, + 0xC78, 0xF00F0001, + 0xC78, 0xEF100001, + 0xC78, 0xEE110001, + 0xC78, 0xED120001, + 0xC78, 0xEC130001, + 0xC78, 0xEB140001, + 0xC78, 0xEA150001, + 0xC78, 0xE9160001, + 0xC78, 0xE8170001, + 0xC78, 0xE7180001, + 0xC78, 0xE6190001, + 0xC78, 0xE51A0001, + 0xC78, 0xE41B0001, + 0xC78, 0xC71C0001, + 0xC78, 0xC61D0001, + 0xC78, 0xC51E0001, + 0xC78, 0xC41F0001, + 0xC78, 0xC3200001, + 0xC78, 0xC2210001, 0xA0000000, 0x00000000, - 0xC78, 0xFB050001, - 0xC78, 0xFA060001, - 0xC78, 0xF9070001, - 0xC78, 0xF8080001, - 0xC78, 0xF7090001, - 0xC78, 0xF60A0001, - 0xC78, 0xF50B0001, - 0xC78, 0xF40C0001, - 0xC78, 0xF30D0001, - 0xC78, 0xF20E0001, - 0xC78, 0xF10F0001, - 0xC78, 0xF0100001, - 0xC78, 0xEF110001, - 0xC78, 0xEE120001, - 0xC78, 0xED130001, - 0xC78, 0xEC140001, - 0xC78, 0xEB150001, - 0xC78, 0xEA160001, - 0xC78, 0xE9170001, - 0xC78, 0xE8180001, - 0xC78, 0xE7190001, - 0xC78, 0xE61A0001, - 0xC78, 0xE51B0001, - 0xC78, 0xE41C0001, - 0xC78, 0xE31D0001, - 0xC78, 0xE21E0001, - 0xC78, 0xE11F0001, - 0xC78, 0x8A200001, - 0xC78, 0x89210001, + 0xC78, 0xFB050001, + 0xC78, 0xFA060001, + 0xC78, 0xF9070001, + 0xC78, 0xF8080001, + 0xC78, 0xF7090001, + 0xC78, 0xF60A0001, + 0xC78, 0xF50B0001, + 0xC78, 0xF40C0001, + 0xC78, 0xF30D0001, + 0xC78, 0xF20E0001, + 0xC78, 0xF10F0001, + 0xC78, 0xF0100001, + 0xC78, 0xEF110001, + 0xC78, 0xEE120001, + 0xC78, 0xED130001, + 0xC78, 0xEC140001, + 0xC78, 0xEB150001, + 0xC78, 0xEA160001, + 0xC78, 0xE9170001, + 0xC78, 0xE8180001, + 0xC78, 0xE7190001, + 0xC78, 0xE61A0001, + 0xC78, 0xE51B0001, + 0xC78, 0xE41C0001, + 0xC78, 0xE31D0001, + 0xC78, 0xE21E0001, + 0xC78, 0xE11F0001, + 0xC78, 0x8A200001, + 0xC78, 0x89210001, 0xB0000000, 0x00000000, 0x88000001, 0x00000000, 0x40000000, 0x00000000, - 0xC78, 0x66220001, - 0xC78, 0x65230001, - 0xC78, 0x64240001, - 0xC78, 0x63250001, - 0xC78, 0x62260001, - 0xC78, 0x61270001, - 0xC78, 0x60280001, + 0xC78, 0x66220001, + 0xC78, 0x65230001, + 0xC78, 0x64240001, + 0xC78, 0x63250001, + 0xC78, 0x62260001, + 0xC78, 0x61270001, + 0xC78, 0x60280001, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xC78, 0x69220001, - 0xC78, 0x68230001, - 0xC78, 0x67240001, - 0xC78, 0x66250001, - 0xC78, 0x65260001, - 0xC78, 0x64270001, - 0xC78, 0x63280001, + 0xC78, 0x69220001, + 0xC78, 0x68230001, + 0xC78, 0x67240001, + 0xC78, 0x66250001, + 0xC78, 0x65260001, + 0xC78, 0x64270001, + 0xC78, 0x63280001, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xC78, 0x6B220001, - 0xC78, 0x6A230001, - 0xC78, 0x69240001, - 0xC78, 0x68250001, - 0xC78, 0x67260001, - 0xC78, 0x66270001, - 0xC78, 0x65280001, + 0xC78, 0x6B220001, + 0xC78, 0x6A230001, + 0xC78, 0x69240001, + 0xC78, 0x68250001, + 0xC78, 0x67260001, + 0xC78, 0x66270001, + 0xC78, 0x65280001, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xC78, 0x84220001, - 0xC78, 0x83230001, - 0xC78, 0x82240001, - 0xC78, 0x81250001, - 0xC78, 0x67260001, - 0xC78, 0x66270001, - 0xC78, 0x65280001, + 0xC78, 0x84220001, + 0xC78, 0x83230001, + 0xC78, 0x82240001, + 0xC78, 0x81250001, + 0xC78, 0x67260001, + 0xC78, 0x66270001, + 0xC78, 0x65280001, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xC78, 0x85220001, - 0xC78, 0x84230001, - 0xC78, 0x83240001, - 0xC78, 0x82250001, - 0xC78, 0x6A260001, - 0xC78, 0x69270001, - 0xC78, 0x68280001, + 0xC78, 0x85220001, + 0xC78, 0x84230001, + 0xC78, 0x83240001, + 0xC78, 0x82250001, + 0xC78, 0x6A260001, + 0xC78, 0x69270001, + 0xC78, 0x68280001, 0xA0000000, 0x00000000, - 0xC78, 0x88220001, - 0xC78, 0x87230001, - 0xC78, 0x86240001, - 0xC78, 0x85250001, - 0xC78, 0x84260001, - 0xC78, 0x83270001, - 0xC78, 0x82280001, + 0xC78, 0x88220001, + 0xC78, 0x87230001, + 0xC78, 0x86240001, + 0xC78, 0x85250001, + 0xC78, 0x84260001, + 0xC78, 0x83270001, + 0xC78, 0x82280001, 0xB0000000, 0x00000000, 0x88000001, 0x00000000, 0x40000000, 0x00000000, - 0xC78, 0x4A290001, - 0xC78, 0x492A0001, - 0xC78, 0x482B0001, - 0xC78, 0x472C0001, + 0xC78, 0x4A290001, + 0xC78, 0x492A0001, + 0xC78, 0x482B0001, + 0xC78, 0x472C0001, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xC78, 0x62290001, - 0xC78, 0x612A0001, - 0xC78, 0x462B0001, - 0xC78, 0x452C0001, + 0xC78, 0x62290001, + 0xC78, 0x612A0001, + 0xC78, 0x462B0001, + 0xC78, 0x452C0001, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xC78, 0x64290001, - 0xC78, 0x632A0001, - 0xC78, 0x622B0001, - 0xC78, 0x612C0001, + 0xC78, 0x64290001, + 0xC78, 0x632A0001, + 0xC78, 0x622B0001, + 0xC78, 0x612C0001, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xC78, 0x64290001, - 0xC78, 0x632A0001, - 0xC78, 0x622B0001, - 0xC78, 0x612C0001, + 0xC78, 0x64290001, + 0xC78, 0x632A0001, + 0xC78, 0x622B0001, + 0xC78, 0x612C0001, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xC78, 0x67290001, - 0xC78, 0x662A0001, - 0xC78, 0x652B0001, - 0xC78, 0x642C0001, + 0xC78, 0x67290001, + 0xC78, 0x662A0001, + 0xC78, 0x652B0001, + 0xC78, 0x642C0001, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0xC78, 0x81290001, - 0xC78, 0x242A0001, - 0xC78, 0x232B0001, - 0xC78, 0x222C0001, + 0xC78, 0x81290001, + 0xC78, 0x242A0001, + 0xC78, 0x232B0001, + 0xC78, 0x222C0001, 0xA0000000, 0x00000000, - 0xC78, 0x6B290001, - 0xC78, 0x6A2A0001, - 0xC78, 0x692B0001, - 0xC78, 0x682C0001, + 0xC78, 0x6B290001, + 0xC78, 0x6A2A0001, + 0xC78, 0x692B0001, + 0xC78, 0x682C0001, 0xB0000000, 0x00000000, 0x88000001, 0x00000000, 0x40000000, 0x00000000, - 0xC78, 0x462D0001, - 0xC78, 0x452E0001, - 0xC78, 0x442F0001, - 0xC78, 0x43300001, - 0xC78, 0x42310001, - 0xC78, 0x41320001, - 0xC78, 0x40330001, + 0xC78, 0x462D0001, + 0xC78, 0x452E0001, + 0xC78, 0x442F0001, + 0xC78, 0x43300001, + 0xC78, 0x42310001, + 0xC78, 0x41320001, + 0xC78, 0x40330001, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xC78, 0x442D0001, - 0xC78, 0x432E0001, - 0xC78, 0x422F0001, - 0xC78, 0x41300001, - 0xC78, 0x40310001, - 0xC78, 0x40320001, - 0xC78, 0x40330001, + 0xC78, 0x442D0001, + 0xC78, 0x432E0001, + 0xC78, 0x422F0001, + 0xC78, 0x41300001, + 0xC78, 0x40310001, + 0xC78, 0x40320001, + 0xC78, 0x40330001, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xC78, 0x462D0001, - 0xC78, 0x452E0001, - 0xC78, 0x442F0001, - 0xC78, 0x43300001, - 0xC78, 0x42310001, - 0xC78, 0x41320001, - 0xC78, 0x40330001, + 0xC78, 0x462D0001, + 0xC78, 0x452E0001, + 0xC78, 0x442F0001, + 0xC78, 0x43300001, + 0xC78, 0x42310001, + 0xC78, 0x41320001, + 0xC78, 0x40330001, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xC78, 0x4B2D0001, - 0xC78, 0x4A2E0001, - 0xC78, 0x492F0001, - 0xC78, 0x48300001, - 0xC78, 0x47310001, - 0xC78, 0x46320001, - 0xC78, 0x45330001, + 0xC78, 0x4B2D0001, + 0xC78, 0x4A2E0001, + 0xC78, 0x492F0001, + 0xC78, 0x48300001, + 0xC78, 0x47310001, + 0xC78, 0x46320001, + 0xC78, 0x45330001, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xC78, 0x4A2D0001, - 0xC78, 0x492E0001, - 0xC78, 0x482F0001, - 0xC78, 0x47300001, - 0xC78, 0x46310001, - 0xC78, 0x45320001, - 0xC78, 0x44330001, + 0xC78, 0x4A2D0001, + 0xC78, 0x492E0001, + 0xC78, 0x482F0001, + 0xC78, 0x47300001, + 0xC78, 0x46310001, + 0xC78, 0x45320001, + 0xC78, 0x44330001, 0xA0000000, 0x00000000, - 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0xC78, 0x64700001, - 0xC78, 0x63710001, - 0xC78, 0x62720001, - 0xC78, 0x61730001, - 0xC78, 0x60740001, - 0xC78, 0x46750001, - 0xC78, 0x45760001, - 0xC78, 0x44770001, - 0xC78, 0x43780001, - 0xC78, 0x42790001, - 0xC78, 0x417A0001, - 0xC78, 0x407B0001, - 0xC78, 0x407C0001, + 0xC78, 0xFB400001, + 0xC78, 0xFB410001, + 0xC78, 0xFB420001, + 0xC78, 0xFB430001, + 0xC78, 0xFB440001, + 0xC78, 0xFB450001, + 0xC78, 0xFB460001, + 0xC78, 0xFB470001, + 0xC78, 0xFB480001, + 0xC78, 0xFA490001, + 0xC78, 0xF94A0001, + 0xC78, 0xF84B0001, + 0xC78, 0xF74C0001, + 0xC78, 0xF64D0001, + 0xC78, 0xF54E0001, + 0xC78, 0xF44F0001, + 0xC78, 0xF3500001, + 0xC78, 0xF2510001, + 0xC78, 0xF1520001, + 0xC78, 0xF0530001, + 0xC78, 0xEF540001, + 0xC78, 0xEE550001, + 0xC78, 0xED560001, + 0xC78, 0xEC570001, + 0xC78, 0xEB580001, + 0xC78, 0xEA590001, + 0xC78, 0xE95A0001, + 0xC78, 0xE85B0001, + 0xC78, 0xE75C0001, + 0xC78, 0xE65D0001, + 0xC78, 0xE55E0001, + 0xC78, 0xE45F0001, + 0xC78, 0xE3600001, + 0xC78, 0xE2610001, + 0xC78, 0xC3620001, + 0xC78, 0xC2630001, + 0xC78, 0xC1640001, + 0xC78, 0x8B650001, + 0xC78, 0x8A660001, + 0xC78, 0x89670001, + 0xC78, 0x88680001, + 0xC78, 0x87690001, + 0xC78, 0x866A0001, + 0xC78, 0x856B0001, + 0xC78, 0x846C0001, + 0xC78, 0x676D0001, + 0xC78, 0x666E0001, + 0xC78, 0x656F0001, + 0xC78, 0x64700001, + 0xC78, 0x63710001, + 0xC78, 0x62720001, + 0xC78, 0x61730001, + 0xC78, 0x60740001, + 0xC78, 0x46750001, + 0xC78, 0x45760001, + 0xC78, 0x44770001, + 0xC78, 0x43780001, + 0xC78, 0x42790001, + 0xC78, 0x417A0001, + 0xC78, 0x407B0001, + 0xC78, 0x407C0001, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xC78, 0xFB400001, - 0xC78, 0xFB410001, - 0xC78, 0xFB420001, - 0xC78, 0xFB430001, - 0xC78, 0xFB440001, - 0xC78, 0xFB450001, - 0xC78, 0xFB460001, - 0xC78, 0xFB470001, - 0xC78, 0xFB480001, - 0xC78, 0xFA490001, - 0xC78, 0xF94A0001, - 0xC78, 0xF84B0001, - 0xC78, 0xF74C0001, - 0xC78, 0xF64D0001, - 0xC78, 0xF54E0001, - 0xC78, 0xF44F0001, - 0xC78, 0xF3500001, - 0xC78, 0xF2510001, - 0xC78, 0xF1520001, - 0xC78, 0xF0530001, - 0xC78, 0xEF540001, - 0xC78, 0xEE550001, - 0xC78, 0xED560001, - 0xC78, 0xEC570001, - 0xC78, 0xEB580001, - 0xC78, 0xEA590001, - 0xC78, 0xE95A0001, - 0xC78, 0xE85B0001, - 0xC78, 0xE75C0001, - 0xC78, 0xE65D0001, - 0xC78, 0xE55E0001, - 0xC78, 0xE45F0001, - 0xC78, 0xE3600001, - 0xC78, 0xE2610001, - 0xC78, 0xC3620001, - 0xC78, 0xC2630001, - 0xC78, 0xC1640001, - 0xC78, 0x8B650001, - 0xC78, 0x8A660001, - 0xC78, 0x89670001, - 0xC78, 0x88680001, - 0xC78, 0x87690001, - 0xC78, 0x866A0001, - 0xC78, 0x856B0001, - 0xC78, 0x846C0001, - 0xC78, 0x676D0001, - 0xC78, 0x666E0001, - 0xC78, 0x656F0001, - 0xC78, 0x64700001, - 0xC78, 0x63710001, - 0xC78, 0x62720001, - 0xC78, 0x61730001, - 0xC78, 0x60740001, - 0xC78, 0x46750001, - 0xC78, 0x45760001, - 0xC78, 0x44770001, - 0xC78, 0x43780001, - 0xC78, 0x42790001, - 0xC78, 0x417A0001, - 0xC78, 0x407B0001, - 0xC78, 0x407C0001, + 0xC78, 0xFB400001, + 0xC78, 0xFB410001, + 0xC78, 0xFB420001, + 0xC78, 0xFB430001, + 0xC78, 0xFB440001, + 0xC78, 0xFB450001, + 0xC78, 0xFB460001, + 0xC78, 0xFB470001, + 0xC78, 0xFB480001, + 0xC78, 0xFA490001, + 0xC78, 0xF94A0001, + 0xC78, 0xF84B0001, + 0xC78, 0xF74C0001, + 0xC78, 0xF64D0001, + 0xC78, 0xF54E0001, + 0xC78, 0xF44F0001, + 0xC78, 0xF3500001, + 0xC78, 0xF2510001, + 0xC78, 0xF1520001, + 0xC78, 0xF0530001, + 0xC78, 0xEF540001, + 0xC78, 0xEE550001, + 0xC78, 0xED560001, + 0xC78, 0xEC570001, + 0xC78, 0xEB580001, + 0xC78, 0xEA590001, + 0xC78, 0xE95A0001, + 0xC78, 0xE85B0001, + 0xC78, 0xE75C0001, + 0xC78, 0xE65D0001, + 0xC78, 0xE55E0001, + 0xC78, 0xE45F0001, + 0xC78, 0xE3600001, + 0xC78, 0xE2610001, + 0xC78, 0xC3620001, + 0xC78, 0xC2630001, + 0xC78, 0xC1640001, + 0xC78, 0x8B650001, + 0xC78, 0x8A660001, + 0xC78, 0x89670001, + 0xC78, 0x88680001, + 0xC78, 0x87690001, + 0xC78, 0x866A0001, + 0xC78, 0x856B0001, + 0xC78, 0x846C0001, + 0xC78, 0x676D0001, + 0xC78, 0x666E0001, + 0xC78, 0x656F0001, + 0xC78, 0x64700001, + 0xC78, 0x63710001, + 0xC78, 0x62720001, + 0xC78, 0x61730001, + 0xC78, 0x60740001, + 0xC78, 0x46750001, + 0xC78, 0x45760001, + 0xC78, 0x44770001, + 0xC78, 0x43780001, + 0xC78, 0x42790001, + 0xC78, 0x417A0001, + 0xC78, 0x407B0001, + 0xC78, 0x407C0001, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0xC78, 0xFF400001, - 0xC78, 0xFF410001, - 0xC78, 0xFE420001, - 0xC78, 0xFD430001, - 0xC78, 0xFC440001, - 0xC78, 0xFB450001, - 0xC78, 0xFA460001, - 0xC78, 0xF9470001, - 0xC78, 0xF8480001, - 0xC78, 0xF7490001, - 0xC78, 0xF64A0001, - 0xC78, 0xF54B0001, - 0xC78, 0xF44C0001, - 0xC78, 0xF34D0001, - 0xC78, 0xF24E0001, - 0xC78, 0xF14F0001, - 0xC78, 0xF0500001, - 0xC78, 0xEF510001, - 0xC78, 0xEE520001, - 0xC78, 0xED530001, - 0xC78, 0xEC540001, - 0xC78, 0xEB550001, - 0xC78, 0xEA560001, - 0xC78, 0xE9570001, - 0xC78, 0xE8580001, - 0xC78, 0xE7590001, - 0xC78, 0xE65A0001, - 0xC78, 0xE55B0001, - 0xC78, 0xE45C0001, - 0xC78, 0xA85D0001, - 0xC78, 0xA75E0001, - 0xC78, 0xA65F0001, - 0xC78, 0xA5600001, - 0xC78, 0xA4610001, - 0xC78, 0xA3620001, - 0xC78, 0xA2630001, - 0xC78, 0xA1640001, - 0xC78, 0x28650001, - 0xC78, 0x27660001, - 0xC78, 0x26670001, - 0xC78, 0x07680001, - 0xC78, 0x06690001, - 0xC78, 0x056A0001, - 0xC78, 0x046B0001, - 0xC78, 0x036C0001, - 0xC78, 0x026D0001, - 0xC78, 0x016E0001, - 0xC78, 0x646F0001, - 0xC78, 0x63700001, - 0xC78, 0x62710001, - 0xC78, 0x61720001, - 0xC78, 0x47730001, - 0xC78, 0x46740001, - 0xC78, 0x45750001, - 0xC78, 0x44760001, - 0xC78, 0x43770001, - 0xC78, 0x42780001, - 0xC78, 0x41790001, - 0xC78, 0x407A0001, - 0xC78, 0x407B0001, - 0xC78, 0x407C0001, + 0xC78, 0xFF400001, + 0xC78, 0xFF410001, + 0xC78, 0xFE420001, + 0xC78, 0xFD430001, + 0xC78, 0xFC440001, + 0xC78, 0xFB450001, + 0xC78, 0xFA460001, + 0xC78, 0xF9470001, + 0xC78, 0xF8480001, + 0xC78, 0xF7490001, + 0xC78, 0xF64A0001, + 0xC78, 0xF54B0001, + 0xC78, 0xF44C0001, + 0xC78, 0xF34D0001, + 0xC78, 0xF24E0001, + 0xC78, 0xF14F0001, + 0xC78, 0xF0500001, + 0xC78, 0xEF510001, + 0xC78, 0xEE520001, + 0xC78, 0xED530001, + 0xC78, 0xEC540001, + 0xC78, 0xEB550001, + 0xC78, 0xEA560001, + 0xC78, 0xE9570001, + 0xC78, 0xE8580001, + 0xC78, 0xE7590001, + 0xC78, 0xE65A0001, + 0xC78, 0xE55B0001, + 0xC78, 0xE45C0001, + 0xC78, 0xA85D0001, + 0xC78, 0xA75E0001, + 0xC78, 0xA65F0001, + 0xC78, 0xA5600001, + 0xC78, 0xA4610001, + 0xC78, 0xA3620001, + 0xC78, 0xA2630001, + 0xC78, 0xA1640001, + 0xC78, 0x28650001, + 0xC78, 0x27660001, + 0xC78, 0x26670001, + 0xC78, 0x07680001, + 0xC78, 0x06690001, + 0xC78, 0x056A0001, + 0xC78, 0x046B0001, + 0xC78, 0x036C0001, + 0xC78, 0x026D0001, + 0xC78, 0x016E0001, + 0xC78, 0x646F0001, + 0xC78, 0x63700001, + 0xC78, 0x62710001, + 0xC78, 0x61720001, + 0xC78, 0x47730001, + 0xC78, 0x46740001, + 0xC78, 0x45750001, + 0xC78, 0x44760001, + 0xC78, 0x43770001, + 0xC78, 0x42780001, + 0xC78, 0x41790001, + 0xC78, 0x407A0001, + 0xC78, 0x407B0001, + 0xC78, 0x407C0001, 0xA0000000, 0x00000000, - 0xC78, 0xFB400001, - 0xC78, 0xFB410001, - 0xC78, 0xFB420001, - 0xC78, 0xFB430001, - 0xC78, 0xFB440001, - 0xC78, 0xFB450001, - 0xC78, 0xFB460001, - 0xC78, 0xFB470001, - 0xC78, 0xFB480001, - 0xC78, 0xFA490001, - 0xC78, 0xF94A0001, - 0xC78, 0xF84B0001, - 0xC78, 0xF74C0001, - 0xC78, 0xF64D0001, - 0xC78, 0xF54E0001, - 0xC78, 0xF44F0001, - 0xC78, 0xF3500001, - 0xC78, 0xF2510001, - 0xC78, 0xF1520001, - 0xC78, 0xF0530001, - 0xC78, 0xEF540001, - 0xC78, 0xEE550001, - 0xC78, 0xED560001, - 0xC78, 0xEC570001, - 0xC78, 0xEB580001, - 0xC78, 0xEA590001, - 0xC78, 0xE95A0001, - 0xC78, 0xE85B0001, - 0xC78, 0xE75C0001, - 0xC78, 0xE65D0001, - 0xC78, 0xE55E0001, - 0xC78, 0xE45F0001, - 0xC78, 0xE3600001, - 0xC78, 0xE2610001, - 0xC78, 0xC3620001, - 0xC78, 0xC2630001, - 0xC78, 0xC1640001, - 0xC78, 0x8B650001, - 0xC78, 0x8A660001, - 0xC78, 0x89670001, - 0xC78, 0x88680001, - 0xC78, 0x87690001, - 0xC78, 0x866A0001, - 0xC78, 0x856B0001, - 0xC78, 0x846C0001, - 0xC78, 0x676D0001, - 0xC78, 0x666E0001, - 0xC78, 0x656F0001, - 0xC78, 0x64700001, - 0xC78, 0x63710001, - 0xC78, 0x62720001, - 0xC78, 0x61730001, - 0xC78, 0x60740001, - 0xC78, 0x46750001, - 0xC78, 0x45760001, - 0xC78, 0x44770001, - 0xC78, 0x43780001, - 0xC78, 0x42790001, - 0xC78, 0x417A0001, - 0xC78, 0x407B0001, - 0xC78, 0x407C0001, + 0xC78, 0xFB400001, + 0xC78, 0xFB410001, + 0xC78, 0xFB420001, + 0xC78, 0xFB430001, + 0xC78, 0xFB440001, + 0xC78, 0xFB450001, + 0xC78, 0xFB460001, + 0xC78, 0xFB470001, + 0xC78, 0xFB480001, + 0xC78, 0xFA490001, + 0xC78, 0xF94A0001, + 0xC78, 0xF84B0001, + 0xC78, 0xF74C0001, + 0xC78, 0xF64D0001, + 0xC78, 0xF54E0001, + 0xC78, 0xF44F0001, + 0xC78, 0xF3500001, + 0xC78, 0xF2510001, + 0xC78, 0xF1520001, + 0xC78, 0xF0530001, + 0xC78, 0xEF540001, + 0xC78, 0xEE550001, + 0xC78, 0xED560001, + 0xC78, 0xEC570001, + 0xC78, 0xEB580001, + 0xC78, 0xEA590001, + 0xC78, 0xE95A0001, + 0xC78, 0xE85B0001, + 0xC78, 0xE75C0001, + 0xC78, 0xE65D0001, + 0xC78, 0xE55E0001, + 0xC78, 0xE45F0001, + 0xC78, 0xE3600001, + 0xC78, 0xE2610001, + 0xC78, 0xC3620001, + 0xC78, 0xC2630001, + 0xC78, 0xC1640001, + 0xC78, 0x8B650001, + 0xC78, 0x8A660001, + 0xC78, 0x89670001, + 0xC78, 0x88680001, + 0xC78, 0x87690001, + 0xC78, 0x866A0001, + 0xC78, 0x856B0001, + 0xC78, 0x846C0001, + 0xC78, 0x676D0001, + 0xC78, 0x666E0001, + 0xC78, 0x656F0001, + 0xC78, 0x64700001, + 0xC78, 0x63710001, + 0xC78, 0x62720001, + 0xC78, 0x61730001, + 0xC78, 0x60740001, + 0xC78, 0x46750001, + 0xC78, 0x45760001, + 0xC78, 0x44770001, + 0xC78, 0x43780001, + 0xC78, 0x42790001, + 0xC78, 0x417A0001, + 0xC78, 0x407B0001, + 0xC78, 0x407C0001, 0xB0000000, 0x00000000, 0x80000001, 0x00000001, 0x40000000, 0x00000000, - 0xC78, 0x407D0001, - 0xC78, 0x407E0001, - 0xC78, 0x407F0001, + 0xC78, 0x407D0001, + 0xC78, 0x407E0001, + 0xC78, 0x407F0001, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xC78, 0x407D0001, - 0xC78, 0x407E0001, - 0xC78, 0x407F0001, + 0xC78, 0x407D0001, + 0xC78, 0x407E0001, + 0xC78, 0x407F0001, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xC78, 0x407D0001, - 0xC78, 0x407E0001, - 0xC78, 0x407F0001, + 0xC78, 0x407D0001, + 0xC78, 0x407E0001, + 0xC78, 0x407F0001, 0xA0000000, 0x00000000, - 0xC78, 0x407D0001, - 0xC78, 0x407E0001, - 0xC78, 0x407F0001, + 0xC78, 0x407D0001, + 0xC78, 0x407E0001, + 0xC78, 0x407F0001, 0xB0000000, 0x00000000, - 0xC50, 0x69553422, - 0xC50, 0x69553420, + 0xC50, 0x69553422, + 0xC50, 0x69553420, }; void -odm_read_and_config_mp_8188e_agc_tab( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_agc_tab(struct dm_struct *dm) { - u32 i = 0; - u8 c_cond; - boolean is_matched = true, is_skipped = false; - u32 array_len = sizeof(array_mp_8188e_agc_tab) / sizeof(u32); - u32 *array = array_mp_8188e_agc_tab; + u32 i = 0; + u8 c_cond; + boolean is_matched = true, is_skipped = false; + u32 array_len = sizeof(array_mp_8188e_agc_tab) / sizeof(u32); + u32 *array = array_mp_8188e_agc_tab; u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; - PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8188e_agc_tab\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__); while ((i + 1) < array_len) { v1 = array[i]; v2 = array[i + 1]; - if (v1 & (BIT(31) | BIT30)) {/*positive & negative condition*/ + if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/ if (v1 & BIT(31)) {/* positive condition*/ c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); if (c_cond == COND_ENDIF) {/*end*/ @@ -1105,563 +1104,585 @@ odm_read_and_config_mp_8188e_agc_tab( u32 odm_get_version_mp_8188e_agc_tab(void) { - return 70; + return 71; } /****************************************************************************** -* PHY_REG.TXT +* phy_reg.TXT ******************************************************************************/ u32 array_mp_8188e_phy_reg[] = { - 0x800, 0x80040000, - 0x804, 0x00000003, - 0x808, 0x0000FC00, - 0x80C, 0x0000000A, - 0x810, 0x10001331, - 0x814, 0x020C3D10, - 0x818, 0x02200385, - 0x81C, 0x00000000, - 0x820, 0x01000100, + 0x800, 0x80040000, + 0x804, 0x00000003, + 0x808, 0x0000FC00, + 0x80C, 0x0000000A, + 0x810, 0x10001331, + 0x814, 0x020C3D10, + 0x818, 0x02200385, + 0x81C, 0x00000000, + 0x820, 0x01000100, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 0x824, 0x00390204, + 0x824, 0x00390204, 0x98000003, 0x00000001, 0x40000000, 0x00000000, - 0x824, 0x00390204, + 0x824, 0x00390204, 0x98000003, 0x00000002, 0x40000000, 0x00000000, - 0x824, 0x00390204, + 0x824, 0x00390204, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0x824, 0x00390204, + 0x824, 0x00390204, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0x824, 0x00390204, + 0x824, 0x00390204, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0x824, 0x00390204, + 0x824, 0x00390204, 0x90000003, 0x00000002, 0x40000000, 0x00000000, - 0x824, 0x00390004, + 0x824, 0x00390004, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0x824, 0x00390204, 0x90000002, 0x00000000, 0x40000000, 0x00000000, - 0x824, 0x00390204, + 0x824, 0x00390204, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0x824, 0x00390204, + 0x824, 0x00390204, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0x824, 0x00390204, + 0x824, 0x00390204, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0x824, 0x00390004, + 0x824, 0x00390004, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0x824, 0x00390204, + 0x824, 0x00390204, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0x824, 0x00390004, + 0x824, 0x00390004, 0xA0000000, 0x00000000, - 0x824, 0x00390204, + 0x824, 0x00390204, 0xB0000000, 0x00000000, - 0x828, 0x00000000, - 0x82C, 0x00000000, - 0x830, 0x00000000, - 0x834, 0x00000000, - 0x838, 0x00000000, - 0x83C, 0x00000000, - 0x840, 0x00010000, - 0x844, 0x00000000, - 0x848, 0x00000000, - 0x84C, 0x00000000, - 0x850, 0x00000000, - 0x854, 0x00000000, - 0x858, 0x569A11A9, - 0x85C, 0x01000014, - 0x860, 0x66F60110, - 0x864, 0x061F0649, - 0x868, 0x00000000, - 0x86C, 0x27272700, + 0x828, 0x00000000, + 0x82C, 0x00000000, + 0x830, 0x00000000, + 0x834, 0x00000000, + 0x838, 0x00000000, + 0x83C, 0x00000000, + 0x840, 0x00010000, + 0x844, 0x00000000, + 0x848, 0x00000000, + 0x84C, 0x00000000, + 0x850, 0x00000000, + 0x854, 0x00000000, + 0x858, 0x569A11A9, + 0x85C, 0x01000014, + 0x860, 0x66F60110, + 0x864, 0x061F0649, + 0x868, 0x00000000, + 0x86C, 0x27272700, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 0x870, 0x07000300, + 0x870, 0x07000300, 0x98000003, 0x00000001, 0x40000000, 0x00000000, - 0x870, 0x07000300, + 0x870, 0x07000300, 0x98000003, 0x00000002, 0x40000000, 0x00000000, - 0x870, 0x07000300, + 0x870, 0x07000300, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0x870, 0x07000300, + 0x870, 0x07000300, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0x870, 0x07000300, + 0x870, 0x07000300, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0x870, 0x07000300, + 0x870, 0x07000300, 0x90000003, 0x00000002, 0x40000000, 0x00000000, - 0x870, 0x07000300, + 0x870, 0x07000300, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0x870, 0x07000300, 0x90000002, 0x00000000, 0x40000000, 0x00000000, - 0x870, 0x07000300, + 0x870, 0x07000300, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0x870, 0x07000300, + 0x870, 0x07000300, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0x870, 0x07000300, + 0x870, 0x07000300, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0x870, 0x07000300, + 0x870, 0x07000300, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0x870, 0x07000760, + 0x870, 0x07000760, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0x870, 0x07000760, + 0x870, 0x07000760, 0xA0000000, 0x00000000, - 0x870, 0x07000760, + 0x870, 0x07000760, 0xB0000000, 0x00000000, - 0x874, 0x25004000, - 0x878, 0x00000808, - 0x87C, 0x00000000, - 0x880, 0xB0000C1C, - 0x884, 0x00000001, - 0x888, 0x00000000, - 0x88C, 0xCCC000C0, - 0x890, 0x00000800, - 0x894, 0xFFFFFFFE, - 0x898, 0x40302010, - 0x89C, 0x00706050, - 0x900, 0x00000000, - 0x904, 0x00000023, - 0x908, 0x00000000, - 0x90C, 0x81121111, - 0x910, 0x00000002, - 0x914, 0x00000201, - 0xA00, 0x00D047C8, - 0xA04, 0x80FF800C, - 0xA08, 0x8C838300, + 0x874, 0x25004000, + 0x878, 0x00000808, + 0x87C, 0x00000000, + 0x880, 0xB0000C1C, + 0x884, 0x00000001, + 0x888, 0x00000000, + 0x88C, 0xCCC000C0, + 0x890, 0x00000800, + 0x894, 0xFFFFFFFE, + 0x898, 0x40302010, + 0x89C, 0x00706050, + 0x900, 0x00000000, + 0x904, 0x00000023, + 0x908, 0x00000000, + 0x90C, 0x81121111, + 0x910, 0x00000002, + 0x914, 0x00000201, + 0xA00, 0x00D047C8, + 0xA04, 0x80FF800C, + 0xA08, 0x8C838300, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 0xA0C, 0x2E7F120F, + 0xA0C, 0x2E7F120F, 0x98000003, 0x00000001, 0x40000000, 0x00000000, - 0xA0C, 0x2E7F120F, + 0xA0C, 0x2E7F120F, 0x98000003, 0x00000002, 0x40000000, 0x00000000, - 0xA0C, 0x2E7F120F, + 0xA0C, 0x2E7F120F, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0xA0C, 0x2E7F120F, + 0xA0C, 0x2E7F120F, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0xA0C, 0x2E7F120F, + 0xA0C, 0x2E7F120F, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xA0C, 0x2E7F120F, + 0xA0C, 0x2E7F120F, 0x90000003, 0x00000002, 0x40000000, 0x00000000, - 0xA0C, 0x2D38120F, + 0xA0C, 0x2D38120F, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0xA0C, 0x2E7F120F, 0x90000002, 0x00000000, 0x40000000, 0x00000000, - 0xA0C, 0x2E7F120F, + 0xA0C, 0x2E7F120F, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xA0C, 0x2E7F120F, + 0xA0C, 0x2E7F120F, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xA0C, 0x2E7F120F, + 0xA0C, 0x2E7F120F, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xA0C, 0x2D38120F, + 0xA0C, 0x2D38120F, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0xA0C, 0x2E7F120F, + 0xA0C, 0x2E7F120F, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0xA0C, 0x2E34120F, + 0xA0C, 0x2E34120F, 0xA0000000, 0x00000000, - 0xA0C, 0x2E7F120F, + 0xA0C, 0x2E7F120F, 0xB0000000, 0x00000000, - 0xA10, 0x9500BB7E, - 0xA14, 0x1114D028, - 0xA18, 0x00881117, - 0xA1C, 0x89140F00, + 0xA10, 0x9500BB7E, + 0xA14, 0x1114D028, + 0xA18, 0x00881117, + 0xA1C, 0x89140F00, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 0xA20, 0x13130000, - 0xA24, 0x060A0D10, - 0xA28, 0x00000103, + 0xA20, 0x13130000, + 0xA24, 0x060A0D10, + 0xA28, 0x00000103, 0x98000003, 0x00000001, 0x40000000, 0x00000000, - 0xA20, 0x13130000, - 0xA24, 0x060A0D10, - 0xA28, 0x00000103, + 0xA20, 0x13130000, + 0xA24, 0x060A0D10, + 0xA28, 0x00000103, 0x98000003, 0x00000002, 0x40000000, 0x00000000, - 0xA20, 0x13130000, - 0xA24, 0x060A0D10, - 0xA28, 0x00000103, + 0xA20, 0x13130000, + 0xA24, 0x060A0D10, + 0xA28, 0x00000103, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0xA20, 0x1A1B0000, - 0xA24, 0x090E1317, - 0xA28, 0x00000204, + 0xA20, 0x1A1B0000, + 0xA24, 0x090E1317, + 0xA28, 0x00000204, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0xA20, 0x1A1B0000, - 0xA24, 0x090E1317, - 0xA28, 0x00000204, + 0xA20, 0x1A1B0000, + 0xA24, 0x090E1317, + 0xA28, 0x00000204, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xA20, 0x1A1B0000, - 0xA24, 0x090E1317, - 0xA28, 0x00000204, + 0xA20, 0x1A1B0000, + 0xA24, 0x090E1317, + 0xA28, 0x00000204, 0x90000003, 0x00000002, 0x40000000, 0x00000000, - 0xA20, 0x13130000, - 0xA24, 0x060A0D10, - 0xA28, 0x00000103, + 0xA20, 0x13130000, + 0xA24, 0x060A0D10, + 0xA28, 0x00000103, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0xA20, 0x13130000, + 0xA24, 0x060A0D10, + 0xA28, 0x00000103, 0x90000002, 0x00000000, 0x40000000, 0x00000000, - 0xA20, 0x13130000, - 0xA24, 0x060A0D10, - 0xA28, 0x00000103, + 0xA20, 0x13130000, + 0xA24, 0x060A0D10, + 0xA28, 0x00000103, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xA20, 0x1A1B0000, - 0xA24, 0x090E1317, - 0xA28, 0x00000204, + 0xA20, 0x1A1B0000, + 0xA24, 0x090E1317, + 0xA28, 0x00000204, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xA20, 0x1A1B0000, - 0xA24, 0x090E1317, - 0xA28, 0x00000204, + 0xA20, 0x1A1B0000, + 0xA24, 0x090E1317, + 0xA28, 0x00000204, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xA20, 0x1A1B0000, - 0xA24, 0x090E1317, - 0xA28, 0x00000204, + 0xA20, 0x1A1B0000, + 0xA24, 0x090E1317, + 0xA28, 0x00000204, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0xA20, 0x1A1B0000, - 0xA24, 0x090E1317, - 0xA28, 0x00000204, + 0xA20, 0x1A1B0000, + 0xA24, 0x090E1317, + 0xA28, 0x00000204, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0xA20, 0x1A1B0000, - 0xA24, 0x090E1317, - 0xA28, 0x00000204, + 0xA20, 0x1A1B0000, + 0xA24, 0x090E1317, + 0xA28, 0x00000204, 0xA0000000, 0x00000000, - 0xA20, 0x1A1B0000, - 0xA24, 0x090E1317, - 0xA28, 0x00000204, + 0xA20, 0x1A1B0000, + 0xA24, 0x090E1317, + 0xA28, 0x00000204, 0xB0000000, 0x00000000, - 0xA2C, 0x00D30000, - 0xA70, 0x101FBF00, - 0xA74, 0x00000007, - 0xA78, 0x00000900, - 0xA7C, 0x225B0606, + 0xA2C, 0x00D30000, + 0xA70, 0x101FBF00, + 0xA74, 0x00000007, + 0xA78, 0x00000900, + 0xA7C, 0x225B0606, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 0xA80, 0x218075B1, + 0xA80, 0x218075B1, 0x98000003, 0x00000001, 0x40000000, 0x00000000, - 0xA80, 0x218075B1, + 0xA80, 0x218075B1, 0x98000003, 0x00000002, 0x40000000, 0x00000000, - 0xA80, 0x218075B1, + 0xA80, 0x218075B1, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0xA80, 0x218075B1, + 0xA80, 0x218075B1, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0xA80, 0x218075B1, + 0xA80, 0x218075B1, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xA80, 0x218075B1, + 0xA80, 0x218075B1, 0x90000003, 0x00000002, 0x40000000, 0x00000000, - 0xA80, 0x21807530, + 0xA80, 0x21807530, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0xA80, 0x218075B1, 0x90000002, 0x00000000, 0x40000000, 0x00000000, - 0xA80, 0x218075B1, + 0xA80, 0x218075B1, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xA80, 0x218075B1, + 0xA80, 0x218075B1, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xA80, 0x218075B1, + 0xA80, 0x218075B1, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xA80, 0x21807530, + 0xA80, 0x21807530, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0xA80, 0x218075B1, + 0xA80, 0x218075B1, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0xA80, 0x21807531, + 0xA80, 0x21807531, 0xA0000000, 0x00000000, - 0xA80, 0x218075B1, + 0xA80, 0x218075B1, 0xB0000000, 0x00000000, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 0xB2C, 0x00000000, + 0xB2C, 0x00000000, 0x98000003, 0x00000001, 0x40000000, 0x00000000, - 0xB2C, 0x00000000, + 0xB2C, 0x00000000, 0x98000003, 0x00000002, 0x40000000, 0x00000000, - 0xB2C, 0x00000000, + 0xB2C, 0x00000000, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0xB2C, 0x00000000, + 0xB2C, 0x00000000, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0xB2C, 0x00000000, + 0xB2C, 0x00000000, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xB2C, 0x00000000, + 0xB2C, 0x00000000, 0x90000003, 0x00000002, 0x40000000, 0x00000000, - 0xB2C, 0x00000000, + 0xB2C, 0x00000000, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0xB2C, 0x00000000, 0x90000002, 0x00000000, 0x40000000, 0x00000000, - 0xB2C, 0x00000000, + 0xB2C, 0x00000000, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xB2C, 0x00000000, + 0xB2C, 0x00000000, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xB2C, 0x00000000, + 0xB2C, 0x00000000, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xB2C, 0x00000000, + 0xB2C, 0x00000000, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0xB2C, 0x80000000, + 0xB2C, 0x80000000, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0xB2C, 0x80000000, + 0xB2C, 0x80000000, 0xA0000000, 0x00000000, - 0xB2C, 0x80000000, + 0xB2C, 0x80000000, 0xB0000000, 0x00000000, - 0xC00, 0x48071D40, - 0xC04, 0x03A05611, - 0xC08, 0x000000E4, - 0xC0C, 0x6C6C6C6C, - 0xC10, 0x08800000, - 0xC14, 0x40000100, - 0xC18, 0x08800000, - 0xC1C, 0x40000100, - 0xC20, 0x00000000, - 0xC24, 0x00000000, - 0xC28, 0x00000000, - 0xC2C, 0x00000000, - 0xC30, 0x69E9AC47, - 0xC34, 0x469652AF, - 0xC38, 0x49795994, - 0xC3C, 0x0A97971C, - 0xC40, 0x1F7C403F, - 0xC44, 0x000100B7, - 0xC48, 0xEC020107, - 0xC4C, 0x007F037F, - 0xC50, 0x69553420, - 0xC54, 0x43BC0094, + 0xC00, 0x48071D40, + 0xC04, 0x03A05611, + 0xC08, 0x000000E4, + 0xC0C, 0x6C6C6C6C, + 0xC10, 0x08800000, + 0xC14, 0x40000100, + 0xC18, 0x08800000, + 0xC1C, 0x40000100, + 0xC20, 0x00000000, + 0xC24, 0x00000000, + 0xC28, 0x00000000, + 0xC2C, 0x00000000, + 0xC30, 0x69E9AC47, + 0xC34, 0x469652AF, + 0xC38, 0x49795994, + 0xC3C, 0x0A97971C, + 0xC40, 0x1F7C403F, + 0xC44, 0x000100B7, + 0xC48, 0xEC020107, + 0xC4C, 0x007F037F, + 0xC50, 0x69553420, + 0xC54, 0x43BC0094, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 0xC58, 0x00013159, + 0xC58, 0x00013159, 0x98000003, 0x00000001, 0x40000000, 0x00000000, - 0xC58, 0x00013159, + 0xC58, 0x00013159, 0x98000003, 0x00000002, 0x40000000, 0x00000000, - 0xC58, 0x00013959, + 0xC58, 0x00013959, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0xC58, 0x00013159, + 0xC58, 0x00013159, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0xC58, 0x00013159, + 0xC58, 0x00013159, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xC58, 0x00013959, + 0xC58, 0x00013959, 0x90000003, 0x00000002, 0x40000000, 0x00000000, - 0xC58, 0x00013169, + 0xC58, 0x00013169, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0xC58, 0x00013159, 0x90000002, 0x00000000, 0x40000000, 0x00000000, - 0xC58, 0x00013169, + 0xC58, 0x00013169, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xC58, 0x00013169, + 0xC58, 0x00013169, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xC58, 0x00013169, + 0xC58, 0x00013169, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xC58, 0x00013169, + 0xC58, 0x00013169, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0xC58, 0x00013159, + 0xC58, 0x00013159, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0xC58, 0x00013159, + 0xC58, 0x00013159, 0xA0000000, 0x00000000, - 0xC58, 0x00013169, + 0xC58, 0x00013169, 0xB0000000, 0x00000000, - 0xC5C, 0x00250492, - 0xC60, 0x00000000, - 0xC64, 0x7112848B, - 0xC68, 0x47C00BFF, - 0xC6C, 0x00000036, - 0xC70, 0x2C7F000D, + 0xC5C, 0x00250492, + 0xC60, 0x00000000, + 0xC64, 0x7112848B, + 0xC68, 0x47C00BFF, + 0xC6C, 0x00000036, + 0xC70, 0x2C7F000D, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 0xC74, 0x028610DB, + 0xC74, 0x028610DB, 0x98000003, 0x00000001, 0x40000000, 0x00000000, - 0xC74, 0x028610DB, + 0xC74, 0x028610DB, 0x98000003, 0x00000002, 0x40000000, 0x00000000, - 0xC74, 0x028610DB, + 0xC74, 0x028610DB, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0xC74, 0x028610DB, + 0xC74, 0x028610DB, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0xC74, 0x028610DB, + 0xC74, 0x028610DB, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xC74, 0x028610DB, + 0xC74, 0x028610DB, 0x90000003, 0x00000002, 0x40000000, 0x00000000, - 0xC74, 0x020610DB, + 0xC74, 0x020610DB, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0xC74, 0x028610DB, 0x90000002, 0x00000000, 0x40000000, 0x00000000, - 0xC74, 0x020610DB, + 0xC74, 0x020610DB, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xC74, 0x020610DB, + 0xC74, 0x020610DB, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xC74, 0x020610DB, + 0xC74, 0x020610DB, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xC74, 0x020610DB, + 0xC74, 0x020610DB, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0xC74, 0x028610DB, + 0xC74, 0x028610DB, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0xC74, 0x028610DB, + 0xC74, 0x028610DB, 0xA0000000, 0x00000000, - 0xC74, 0x020610DB, + 0xC74, 0x020610DB, 0xB0000000, 0x00000000, - 0xC78, 0x0000001F, - 0xC7C, 0x00B91612, + 0xC78, 0x0000001F, + 0xC7C, 0x00B91612, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 0xC80, 0x2D4000B5, + 0xC80, 0x2D4000B5, 0x98000003, 0x00000001, 0x40000000, 0x00000000, - 0xC80, 0x2D4000B5, + 0xC80, 0x2D4000B5, 0x98000003, 0x00000002, 0x40000000, 0x00000000, - 0xC80, 0x2D4000B5, + 0xC80, 0x2D4000B5, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0xC80, 0x390000E4, + 0xC80, 0x390000E4, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0xC80, 0x390000E4, + 0xC80, 0x390000E4, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xC80, 0x390000E4, + 0xC80, 0x390000E4, 0x90000003, 0x00000002, 0x40000000, 0x00000000, - 0xC80, 0x2D4000B5, + 0xC80, 0x2D4000B5, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0xC80, 0x2D4000B5, 0x90000002, 0x00000000, 0x40000000, 0x00000000, - 0xC80, 0x2D4000B5, + 0xC80, 0x2D4000B5, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xC80, 0x390000E4, + 0xC80, 0x390000E4, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xC80, 0x390000E4, + 0xC80, 0x390000E4, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xC80, 0x390000E4, + 0xC80, 0x390000E4, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0xC80, 0x390000E4, + 0xC80, 0x390000E4, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0xC80, 0x390000E4, + 0xC80, 0x390000E4, 0xA0000000, 0x00000000, - 0xC80, 0x390000E4, + 0xC80, 0x390000E4, 0xB0000000, 0x00000000, - 0xC84, 0x21F60000, - 0xC88, 0x40000100, - 0xC8C, 0x20200000, - 0xC90, 0x00091521, - 0xC94, 0x00000000, - 0xC98, 0x00121820, - 0xC9C, 0x00007F7F, - 0xCA0, 0x00000000, - 0xCA4, 0x000300A0, + 0xC84, 0x21F60000, + 0xC88, 0x40000100, + 0xC8C, 0x20200000, + 0xC90, 0x00091521, + 0xC94, 0x00000000, + 0xC98, 0x00121820, + 0xC9C, 0x00007F7F, + 0xCA0, 0x00000000, + 0xCA4, 0x000300A0, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 0xCA8, 0xFFFF0000, + 0xCA8, 0xFFFF0000, 0x98000003, 0x00000001, 0x40000000, 0x00000000, - 0xCA8, 0xFFFF0000, + 0xCA8, 0xFFFF0000, 0x98000003, 0x00000002, 0x40000000, 0x00000000, - 0xCA8, 0xFFFF0000, + 0xCA8, 0xFFFF0000, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0xCA8, 0xFFFF0000, + 0xCA8, 0xFFFF0000, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0xCA8, 0xFFFF0000, + 0xCA8, 0xFFFF0000, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xCA8, 0xFFFF0000, + 0xCA8, 0xFFFF0000, 0x90000003, 0x00000002, 0x40000000, 0x00000000, - 0xCA8, 0x00000000, + 0xCA8, 0x00000000, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0xCA8, 0xFFFF0000, 0x90000002, 0x00000000, 0x40000000, 0x00000000, - 0xCA8, 0x00000000, + 0xCA8, 0x00000000, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xCA8, 0x00000000, + 0xCA8, 0x00000000, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xCA8, 0x00000000, + 0xCA8, 0x00000000, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xCA8, 0x00000000, + 0xCA8, 0x00000000, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0xCA8, 0xFFFF0000, + 0xCA8, 0xFFFF0000, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0xCA8, 0xFFFF0000, + 0xCA8, 0xFFFF0000, 0xA0000000, 0x00000000, - 0xCA8, 0x00000000, + 0xCA8, 0x00000000, 0xB0000000, 0x00000000, - 0xCAC, 0x00000000, - 0xCB0, 0x00000000, - 0xCB4, 0x00000000, - 0xCB8, 0x00000000, - 0xCBC, 0x28000000, - 0xCC0, 0x00000000, - 0xCC4, 0x00000000, - 0xCC8, 0x00000000, - 0xCCC, 0x00000000, - 0xCD0, 0x00000000, - 0xCD4, 0x00000000, - 0xCD8, 0x64B22427, - 0xCDC, 0x00766932, - 0xCE0, 0x00222222, - 0xCE4, 0x00000000, - 0xCE8, 0x37644302, - 0xCEC, 0x2F97D40C, - 0xD00, 0x00000740, - 0xD04, 0x00020401, - 0xD08, 0x0000907F, - 0xD0C, 0x20010201, - 0xD10, 0xA0633333, - 0xD14, 0x3333BC43, - 0xD18, 0x7A8F5B6F, - 0xD2C, 0xCC979975, - 0xD30, 0x00000000, - 0xD34, 0x80608000, - 0xD38, 0x00000000, - 0xD3C, 0x00127353, - 0xD40, 0x00000000, - 0xD44, 0x00000000, - 0xD48, 0x00000000, - 0xD4C, 0x00000000, - 0xD50, 0x6437140A, - 0xD54, 0x00000000, - 0xD58, 0x00000282, - 0xD5C, 0x30032064, - 0xD60, 0x4653DE68, - 0xD64, 0x04518A3C, - 0xD68, 0x00002101, - 0xD6C, 0x2A201C16, - 0xD70, 0x1812362E, - 0xD74, 0x322C2220, - 0xD78, 0x000E3C24, - 0xE00, 0x2D2D2D2D, - 0xE04, 0x2D2D2D2D, - 0xE08, 0x0390272D, - 0xE10, 0x2D2D2D2D, - 0xE14, 0x2D2D2D2D, - 0xE18, 0x2D2D2D2D, - 0xE1C, 0x2D2D2D2D, - 0xE28, 0x00000000, - 0xE30, 0x1000DC1F, - 0xE34, 0x10008C1F, - 0xE38, 0x02140102, - 0xE3C, 0x681604C2, - 0xE40, 0x01007C00, - 0xE44, 0x01004800, - 0xE48, 0xFB000000, - 0xE4C, 0x000028D1, - 0xE50, 0x1000DC1F, - 0xE54, 0x10008C1F, - 0xE58, 0x02140102, - 0xE5C, 0x28160D05, - 0xE60, 0x00000048, - 0xE68, 0x001B25A4, - 0xE6C, 0x00C00014, - 0xE70, 0x00C00014, - 0xE74, 0x01000014, - 0xE78, 0x01000014, - 0xE7C, 0x01000014, - 0xE80, 0x01000014, - 0xE84, 0x00C00014, - 0xE88, 0x01000014, - 0xE8C, 0x00C00014, - 0xED0, 0x00C00014, - 0xED4, 0x00C00014, - 0xED8, 0x00C00014, - 0xEDC, 0x00000014, - 0xEE0, 0x00000014, + 0xCAC, 0x00000000, + 0xCB0, 0x00000000, + 0xCB4, 0x00000000, + 0xCB8, 0x00000000, + 0xCBC, 0x28000000, + 0xCC0, 0x00000000, + 0xCC4, 0x00000000, + 0xCC8, 0x00000000, + 0xCCC, 0x00000000, + 0xCD0, 0x00000000, + 0xCD4, 0x00000000, + 0xCD8, 0x64B22427, + 0xCDC, 0x00766932, + 0xCE0, 0x00222222, + 0xCE4, 0x00000000, + 0xCE8, 0x37644302, + 0xCEC, 0x2F97D40C, + 0xD00, 0x00000740, + 0xD04, 0x00020401, + 0xD08, 0x0000907F, + 0xD0C, 0x20010201, + 0xD10, 0xA0633333, + 0xD14, 0x3333BC43, + 0xD18, 0x7A8F5B6F, + 0xD2C, 0xCC979975, + 0xD30, 0x00000000, + 0xD34, 0x80608000, + 0xD38, 0x00000000, + 0xD3C, 0x00127353, + 0xD40, 0x00000000, + 0xD44, 0x00000000, + 0xD48, 0x00000000, + 0xD4C, 0x00000000, + 0xD50, 0x6437140A, + 0xD54, 0x00000000, + 0xD58, 0x00000282, + 0xD5C, 0x30032064, + 0xD60, 0x4653DE68, + 0xD64, 0x04518A3C, + 0xD68, 0x00002101, + 0xD6C, 0x2A201C16, + 0xD70, 0x1812362E, + 0xD74, 0x322C2220, + 0xD78, 0x000E3C24, + 0xE00, 0x2D2D2D2D, + 0xE04, 0x2D2D2D2D, + 0xE08, 0x0390272D, + 0xE10, 0x2D2D2D2D, + 0xE14, 0x2D2D2D2D, + 0xE18, 0x2D2D2D2D, + 0xE1C, 0x2D2D2D2D, + 0xE28, 0x00000000, + 0xE30, 0x1000DC1F, + 0xE34, 0x10008C1F, + 0xE38, 0x02140102, + 0xE3C, 0x681604C2, + 0xE40, 0x01007C00, + 0xE44, 0x01004800, + 0xE48, 0xFB000000, + 0xE4C, 0x000028D1, + 0xE50, 0x1000DC1F, + 0xE54, 0x10008C1F, + 0xE58, 0x02140102, + 0xE5C, 0x28160D05, + 0xE60, 0x00000048, + 0xE68, 0x001B25A4, + 0xE6C, 0x00C00014, + 0xE70, 0x00C00014, + 0xE74, 0x01000014, + 0xE78, 0x01000014, + 0xE7C, 0x01000014, + 0xE80, 0x01000014, + 0xE84, 0x00C00014, + 0xE88, 0x01000014, + 0xE8C, 0x00C00014, + 0xED0, 0x00C00014, + 0xED4, 0x00C00014, + 0xED8, 0x00C00014, + 0xEDC, 0x00000014, + 0xEE0, 0x00000014, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 0xEE8, 0x32555448, + 0xEE8, 0x32555448, 0x98000003, 0x00000001, 0x40000000, 0x00000000, - 0xEE8, 0x32555448, + 0xEE8, 0x32555448, 0x98000003, 0x00000002, 0x40000000, 0x00000000, - 0xEE8, 0x32555448, + 0xEE8, 0x32555448, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0xEE8, 0x32555448, + 0xEE8, 0x32555448, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0xEE8, 0x32555448, + 0xEE8, 0x32555448, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0xEE8, 0x32555448, + 0xEE8, 0x32555448, 0x90000003, 0x00000002, 0x40000000, 0x00000000, - 0xEE8, 0x32555448, + 0xEE8, 0x32555448, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0xEE8, 0x32555448, 0x90000002, 0x00000000, 0x40000000, 0x00000000, - 0xEE8, 0x32555448, + 0xEE8, 0x32555448, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0xEE8, 0x32555448, + 0xEE8, 0x32555448, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0xEE8, 0x32555448, + 0xEE8, 0x32555448, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0xEE8, 0x32555448, + 0xEE8, 0x32555448, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0xEE8, 0x21555448, + 0xEE8, 0x21555448, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0xEE8, 0x21555448, + 0xEE8, 0x21555448, 0xA0000000, 0x00000000, - 0xEE8, 0x21555448, + 0xEE8, 0x21555448, 0xB0000000, 0x00000000, - 0xEEC, 0x01C00014, - 0xF14, 0x00000003, - 0xF4C, 0x00000000, - 0xF00, 0x00000300, + 0xEEC, 0x01C00014, + 0xF14, 0x00000003, + 0xF4C, 0x00000000, + 0xF00, 0x00000300, }; void -odm_read_and_config_mp_8188e_phy_reg( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_phy_reg(struct dm_struct *dm) { - u32 i = 0; - u8 c_cond; - boolean is_matched = true, is_skipped = false; - u32 array_len = sizeof(array_mp_8188e_phy_reg) / sizeof(u32); - u32 *array = array_mp_8188e_phy_reg; + u32 i = 0; + u8 c_cond; + boolean is_matched = true, is_skipped = false; + u32 array_len = sizeof(array_mp_8188e_phy_reg) / sizeof(u32); + u32 *array = array_mp_8188e_phy_reg; u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; - PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8188e_phy_reg\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__); while ((i + 1) < array_len) { v1 = array[i]; v2 = array[i + 1]; - if (v1 & (BIT(31) | BIT30)) {/*positive & negative condition*/ + if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/ if (v1 & BIT(31)) {/* positive condition*/ c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); if (c_cond == COND_ENDIF) {/*end*/ @@ -1699,11 +1720,11 @@ odm_read_and_config_mp_8188e_phy_reg( u32 odm_get_version_mp_8188e_phy_reg(void) { - return 70; + return 71; } /****************************************************************************** -* PHY_REG_PG.TXT +* phy_reg_pg.TXT ******************************************************************************/ u32 array_mp_8188e_phy_reg_pg[] = { @@ -1716,40 +1737,38 @@ u32 array_mp_8188e_phy_reg_pg[] = { }; void -odm_read_and_config_mp_8188e_phy_reg_pg( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_phy_reg_pg(struct dm_struct *dm) { - u32 i = 0; - u32 array_len = sizeof(array_mp_8188e_phy_reg_pg) / sizeof(u32); - u32 *array = array_mp_8188e_phy_reg_pg; + u32 i = 0; + u32 array_len = sizeof(array_mp_8188e_phy_reg_pg) / sizeof(u32); + u32 *array = array_mp_8188e_phy_reg_pg; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter = dm->adapter; + void *adapter = dm->adapter; HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); hal_data->nLinesReadPwrByRate = array_len / 6; #endif - PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8188e_phy_reg_pg\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__); dm->phy_reg_pg_version = 1; dm->phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE; for (i = 0; i < array_len; i += 6) { - u32 v1 = array[i]; - u32 v2 = array[i + 1]; - u32 v3 = array[i + 2]; - u32 v4 = array[i + 3]; - u32 v5 = array[i + 4]; - u32 v6 = array[i + 5]; + u32 v1 = array[i]; + u32 v2 = array[i + 1]; + u32 v3 = array[i + 2]; + u32 v4 = array[i + 3]; + u32 v5 = array[i + 4]; + u32 v6 = array[i + 5]; odm_config_bb_phy_reg_pg_8188e(dm, v1, v2, v3, v4, v5, v6); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", - (v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6); + rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", + (v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6); #endif } } @@ -1757,3 +1776,4 @@ odm_read_and_config_mp_8188e_phy_reg_pg( #endif /* end of HWIMG_SUPPORT*/ + diff --git a/hal/phydm/rtl8188e/halhwimg8188e_bb.h b/hal/phydm/rtl8188e/halhwimg8188e_bb.h index 5b3c5cb..707c32f 100644 --- a/hal/phydm/rtl8188e/halhwimg8188e_bb.h +++ b/hal/phydm/rtl8188e/halhwimg8188e_bb.h @@ -13,41 +13,38 @@ * *****************************************************************************/ -/*Image2HeaderVersion: 2.18*/ +/*Image2HeaderVersion: 3.5.2*/ #if (RTL8188E_SUPPORT == 1) #ifndef __INC_MP_BB_HW_IMG_8188E_H #define __INC_MP_BB_HW_IMG_8188E_H /****************************************************************************** -* AGC_TAB.TXT +* agc_tab.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_agc_tab(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); +odm_read_and_config_mp_8188e_agc_tab( /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); u32 odm_get_version_mp_8188e_agc_tab(void); /****************************************************************************** -* PHY_REG.TXT +* phy_reg.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_phy_reg(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); +odm_read_and_config_mp_8188e_phy_reg( /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); u32 odm_get_version_mp_8188e_phy_reg(void); /****************************************************************************** -* PHY_REG_PG.TXT +* phy_reg_pg.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_phy_reg_pg(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); -u32 odm_get_version_mp_8188e_phy_reg_pg(void); +odm_read_and_config_mp_8188e_phy_reg_pg( /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); +u32 odm_get_version_mp_8188e_phy_reg_pg(void); #endif #endif /* end of HWIMG_SUPPORT*/ diff --git a/hal/phydm/rtl8188e/halhwimg8188e_mac.c b/hal/phydm/rtl8188e/halhwimg8188e_mac.c index 296d4d4..2045e36 100644 --- a/hal/phydm/rtl8188e/halhwimg8188e_mac.c +++ b/hal/phydm/rtl8188e/halhwimg8188e_mac.c @@ -13,55 +13,65 @@ * *****************************************************************************/ -/*Image2HeaderVersion: 2.18*/ +/*Image2HeaderVersion: 3.5.2*/ #include "mp_precomp.h" #include "../phydm_precomp.h" #if (RTL8188E_SUPPORT == 1) static boolean check_positive( - struct dm_struct *dm, - const u32 condition1, - const u32 condition2, - const u32 condition3, - const u32 condition4 + struct dm_struct *dm, + const u32 condition1, + const u32 condition2, + const u32 condition3, + const u32 condition4 ) { - u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ - ((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/ - ((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/ - ((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */ - ((dm->board_type & BIT(2)) >> 2) << 4; /* _BT*/ + u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ + ((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/ + ((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/ + ((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */ + ((dm->board_type & BIT(2)) >> 2) << 4 | /* _BT*/ + ((dm->board_type & BIT(1)) >> 1) << 5 | /* _NGFF*/ + ((dm->board_type & BIT(5)) >> 5) << 6; /* _TRSWT*/ - u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4; - u32 driver1 = dm->cut_version << 24 | - (dm->support_interface & 0xF0) << 16 | - dm->support_platform << 16 | - dm->package_type << 12 | - (dm->support_interface & 0x0F) << 8 | - _board_type; + u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4; - u32 driver2 = (dm->type_glna & 0xFF) << 0 | - (dm->type_gpa & 0xFF) << 8 | - (dm->type_alna & 0xFF) << 16 | - (dm->type_apa & 0xFF) << 24; + u8 cut_version_for_para = (dm->cut_version == ODM_CUT_A) ? 15 : dm->cut_version; + u8 pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type; - u32 driver3 = 0; + u32 driver1 = cut_version_for_para << 24 | + (dm->support_interface & 0xF0) << 16 | + dm->support_platform << 16 | + pkg_type_for_para << 12 | + (dm->support_interface & 0x0F) << 8 | + _board_type; - u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | - (dm->type_gpa & 0xFF00) | - (dm->type_alna & 0xFF00) << 8 | - (dm->type_apa & 0xFF00) << 16; + u32 driver2 = (dm->type_glna & 0xFF) << 0 | + (dm->type_gpa & 0xFF) << 8 | + (dm->type_alna & 0xFF) << 16 | + (dm->type_apa & 0xFF) << 24; + + u32 driver3 = 0; + + u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | + (dm->type_gpa & 0xFF00) | + (dm->type_alna & 0xFF00) << 8 | + (dm->type_apa & 0xFF00) << 16; PHYDM_DBG(dm, ODM_COMP_INIT, - "===> check_positive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4); + "===> %s (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", + __func__, cond1, cond2, cond3, cond4); PHYDM_DBG(dm, ODM_COMP_INIT, - "===> check_positive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4); + "===> %s (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", + __func__, driver1, driver2, driver3, driver4); PHYDM_DBG(dm, ODM_COMP_INIT, - " (Platform, Interface) = (0x%X, 0x%X)\n", dm->support_platform, dm->support_interface); + " (Platform, Interface) = (0x%X, 0x%X)\n", + dm->support_platform, dm->support_interface); PHYDM_DBG(dm, ODM_COMP_INIT, - " (Board, Package) = (0x%X, 0x%X)\n", dm->board_type, dm->package_type); + " (Board, Package) = (0x%X, 0x%X)\n", dm->board_type, + dm->package_type); /*============== value Defined Check ===============*/ @@ -75,11 +85,11 @@ check_positive( /*=============== Bit Defined Check ================*/ /* We don't care [31:28] */ - cond1 &= 0x00FF0FFF; + cond1 &= 0x00FF0FFF; driver1 &= 0x00FF0FFF; if ((cond1 & driver1) == cond1) { - u32 bit_mask = 0; + u32 bit_mask = 0; if ((cond1 & 0x0F) == 0) /* board_type is DONTCARE*/ return true; @@ -100,146 +110,135 @@ check_positive( } else return false; } -static boolean -check_negative( - struct dm_struct *dm, - const u32 condition1, - const u32 condition2 -) -{ - return true; -} /****************************************************************************** -* MAC_REG.TXT +* mac_reg.TXT ******************************************************************************/ u32 array_mp_8188e_mac_reg[] = { - 0x026, 0x00000041, - 0x027, 0x00000035, + 0x026, 0x00000041, + 0x027, 0x00000035, 0x80000002, 0x00000000, 0x40000000, 0x00000000, - 0x040, 0x0000000C, + 0x040, 0x0000000C, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0x040, 0x0000000C, + 0x040, 0x0000000C, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0x040, 0x0000000C, + 0x040, 0x0000000C, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0x040, 0x0000000C, + 0x040, 0x0000000C, 0xA0000000, 0x00000000, - 0x040, 0x00000000, + 0x040, 0x00000000, 0xB0000000, 0x00000000, - 0x421, 0x0000000F, - 0x428, 0x0000000A, - 0x429, 0x00000010, - 0x430, 0x00000000, - 0x431, 0x00000001, - 0x432, 0x00000002, - 0x433, 0x00000004, - 0x434, 0x00000005, - 0x435, 0x00000006, - 0x436, 0x00000007, - 0x437, 0x00000008, - 0x438, 0x00000000, - 0x439, 0x00000000, - 0x43A, 0x00000001, - 0x43B, 0x00000002, - 0x43C, 0x00000004, - 0x43D, 0x00000005, - 0x43E, 0x00000006, - 0x43F, 0x00000007, - 0x440, 0x0000005D, - 0x441, 0x00000001, - 0x442, 0x00000000, - 0x444, 0x00000015, - 0x445, 0x000000F0, - 0x446, 0x0000000F, - 0x447, 0x00000000, - 0x458, 0x00000041, - 0x459, 0x000000A8, - 0x45A, 0x00000072, - 0x45B, 0x000000B9, - 0x460, 0x00000066, - 0x461, 0x00000066, - 0x480, 0x00000008, - 0x4C8, 0x000000FF, - 0x4C9, 0x00000008, - 0x4CC, 0x000000FF, - 0x4CD, 0x000000FF, - 0x4CE, 0x00000001, - 0x4D3, 0x00000001, - 0x500, 0x00000026, - 0x501, 0x000000A2, - 0x502, 0x0000002F, - 0x503, 0x00000000, - 0x504, 0x00000028, - 0x505, 0x000000A3, - 0x506, 0x0000005E, - 0x507, 0x00000000, - 0x508, 0x0000002B, - 0x509, 0x000000A4, - 0x50A, 0x0000005E, - 0x50B, 0x00000000, - 0x50C, 0x0000004F, - 0x50D, 0x000000A4, - 0x50E, 0x00000000, - 0x50F, 0x00000000, - 0x512, 0x0000001C, - 0x514, 0x0000000A, - 0x516, 0x0000000A, - 0x525, 0x0000004F, - 0x550, 0x00000010, - 0x551, 0x00000010, - 0x559, 0x00000002, - 0x55D, 0x000000FF, - 0x605, 0x00000030, - 0x608, 0x0000000E, - 0x609, 0x0000002A, - 0x620, 0x000000FF, - 0x621, 0x000000FF, - 0x622, 0x000000FF, - 0x623, 0x000000FF, - 0x624, 0x000000FF, - 0x625, 0x000000FF, - 0x626, 0x000000FF, - 0x627, 0x000000FF, - 0x63C, 0x00000008, - 0x63D, 0x00000008, - 0x63E, 0x0000000C, - 0x63F, 0x0000000C, - 0x640, 0x00000040, - 0x652, 0x00000020, - 0x66E, 0x00000005, - 0x700, 0x00000021, - 0x701, 0x00000043, - 0x702, 0x00000065, - 0x703, 0x00000087, - 0x708, 0x00000021, - 0x709, 0x00000043, - 0x70A, 0x00000065, - 0x70B, 0x00000087, + 0x421, 0x0000000F, + 0x428, 0x0000000A, + 0x429, 0x00000010, + 0x430, 0x00000000, + 0x431, 0x00000001, + 0x432, 0x00000002, + 0x433, 0x00000004, + 0x434, 0x00000005, + 0x435, 0x00000006, + 0x436, 0x00000007, + 0x437, 0x00000008, + 0x438, 0x00000000, + 0x439, 0x00000000, + 0x43A, 0x00000001, + 0x43B, 0x00000002, + 0x43C, 0x00000004, + 0x43D, 0x00000005, + 0x43E, 0x00000006, + 0x43F, 0x00000007, + 0x440, 0x0000005D, + 0x441, 0x00000001, + 0x442, 0x00000000, + 0x444, 0x00000015, + 0x445, 0x000000F0, + 0x446, 0x0000000F, + 0x447, 0x00000000, + 0x458, 0x00000041, + 0x459, 0x000000A8, + 0x45A, 0x00000072, + 0x45B, 0x000000B9, + 0x460, 0x00000066, + 0x461, 0x00000066, + 0x480, 0x00000008, + 0x4C8, 0x000000FF, + 0x4C9, 0x00000008, + 0x4CC, 0x000000FF, + 0x4CD, 0x000000FF, + 0x4CE, 0x00000001, + 0x4D3, 0x00000001, + 0x500, 0x00000026, + 0x501, 0x000000A2, + 0x502, 0x0000002F, + 0x503, 0x00000000, + 0x504, 0x00000028, + 0x505, 0x000000A3, + 0x506, 0x0000005E, + 0x507, 0x00000000, + 0x508, 0x0000002B, + 0x509, 0x000000A4, + 0x50A, 0x0000005E, + 0x50B, 0x00000000, + 0x50C, 0x0000004F, + 0x50D, 0x000000A4, + 0x50E, 0x00000000, + 0x50F, 0x00000000, + 0x512, 0x0000001C, + 0x514, 0x0000000A, + 0x516, 0x0000000A, + 0x525, 0x0000004F, + 0x550, 0x00000010, + 0x551, 0x00000010, + 0x559, 0x00000002, + 0x55D, 0x000000FF, + 0x605, 0x00000030, + 0x608, 0x0000000E, + 0x609, 0x0000002A, + 0x620, 0x000000FF, + 0x621, 0x000000FF, + 0x622, 0x000000FF, + 0x623, 0x000000FF, + 0x624, 0x000000FF, + 0x625, 0x000000FF, + 0x626, 0x000000FF, + 0x627, 0x000000FF, + 0x63C, 0x00000008, + 0x63D, 0x00000008, + 0x63E, 0x0000000C, + 0x63F, 0x0000000C, + 0x640, 0x00000040, + 0x652, 0x00000020, + 0x66E, 0x00000005, + 0x700, 0x00000021, + 0x701, 0x00000043, + 0x702, 0x00000065, + 0x703, 0x00000087, + 0x708, 0x00000021, + 0x709, 0x00000043, + 0x70A, 0x00000065, + 0x70B, 0x00000087, }; void -odm_read_and_config_mp_8188e_mac_reg( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_mac_reg(struct dm_struct *dm) { - u32 i = 0; - u8 c_cond; - boolean is_matched = true, is_skipped = false; - u32 array_len = sizeof(array_mp_8188e_mac_reg) / sizeof(u32); - u32 *array = array_mp_8188e_mac_reg; + u32 i = 0; + u8 c_cond; + boolean is_matched = true, is_skipped = false; + u32 array_len = sizeof(array_mp_8188e_mac_reg) / sizeof(u32); + u32 *array = array_mp_8188e_mac_reg; u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; - PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8188e_mac_reg\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__); while ((i + 1) < array_len) { v1 = array[i]; v2 = array[i + 1]; - if (v1 & (BIT(31) | BIT30)) {/*positive & negative condition*/ + if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/ if (v1 & BIT(31)) {/* positive condition*/ c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); if (c_cond == COND_ENDIF) {/*end*/ @@ -277,7 +276,7 @@ odm_read_and_config_mp_8188e_mac_reg( u32 odm_get_version_mp_8188e_mac_reg(void) { - return 70; + return 71; } #endif /* end of HWIMG_SUPPORT*/ diff --git a/hal/phydm/rtl8188e/halhwimg8188e_mac.h b/hal/phydm/rtl8188e/halhwimg8188e_mac.h index 0aec1f0..028a480 100644 --- a/hal/phydm/rtl8188e/halhwimg8188e_mac.h +++ b/hal/phydm/rtl8188e/halhwimg8188e_mac.h @@ -13,20 +13,19 @@ * *****************************************************************************/ -/*Image2HeaderVersion: 2.18*/ +/*Image2HeaderVersion: 3.5.2*/ #if (RTL8188E_SUPPORT == 1) #ifndef __INC_MP_MAC_HW_IMG_8188E_H #define __INC_MP_MAC_HW_IMG_8188E_H /****************************************************************************** -* MAC_REG.TXT +* mac_reg.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_mac_reg(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); +odm_read_and_config_mp_8188e_mac_reg( /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); u32 odm_get_version_mp_8188e_mac_reg(void); #endif diff --git a/hal/phydm/rtl8188e/halhwimg8188e_rf.c b/hal/phydm/rtl8188e/halhwimg8188e_rf.c index 2906689..632c80c 100644 --- a/hal/phydm/rtl8188e/halhwimg8188e_rf.c +++ b/hal/phydm/rtl8188e/halhwimg8188e_rf.c @@ -13,55 +13,65 @@ * *****************************************************************************/ -/*Image2HeaderVersion: 2.18*/ +/*Image2HeaderVersion: 3.5.2*/ #include "mp_precomp.h" #include "../phydm_precomp.h" #if (RTL8188E_SUPPORT == 1) static boolean check_positive( - struct dm_struct *dm, - const u32 condition1, - const u32 condition2, - const u32 condition3, - const u32 condition4 + struct dm_struct *dm, + const u32 condition1, + const u32 condition2, + const u32 condition3, + const u32 condition4 ) { - u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ - ((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/ - ((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/ - ((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */ - ((dm->board_type & BIT(2)) >> 2) << 4; /* _BT*/ + u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ + ((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/ + ((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/ + ((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */ + ((dm->board_type & BIT(2)) >> 2) << 4 | /* _BT*/ + ((dm->board_type & BIT(1)) >> 1) << 5 | /* _NGFF*/ + ((dm->board_type & BIT(5)) >> 5) << 6; /* _TRSWT*/ - u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4; - u32 driver1 = dm->cut_version << 24 | - (dm->support_interface & 0xF0) << 16 | - dm->support_platform << 16 | - dm->package_type << 12 | - (dm->support_interface & 0x0F) << 8 | - _board_type; + u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4; - u32 driver2 = (dm->type_glna & 0xFF) << 0 | - (dm->type_gpa & 0xFF) << 8 | - (dm->type_alna & 0xFF) << 16 | - (dm->type_apa & 0xFF) << 24; + u8 cut_version_for_para = (dm->cut_version == ODM_CUT_A) ? 15 : dm->cut_version; + u8 pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type; - u32 driver3 = 0; + u32 driver1 = cut_version_for_para << 24 | + (dm->support_interface & 0xF0) << 16 | + dm->support_platform << 16 | + pkg_type_for_para << 12 | + (dm->support_interface & 0x0F) << 8 | + _board_type; - u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | - (dm->type_gpa & 0xFF00) | - (dm->type_alna & 0xFF00) << 8 | - (dm->type_apa & 0xFF00) << 16; + u32 driver2 = (dm->type_glna & 0xFF) << 0 | + (dm->type_gpa & 0xFF) << 8 | + (dm->type_alna & 0xFF) << 16 | + (dm->type_apa & 0xFF) << 24; + + u32 driver3 = 0; + + u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | + (dm->type_gpa & 0xFF00) | + (dm->type_alna & 0xFF00) << 8 | + (dm->type_apa & 0xFF00) << 16; PHYDM_DBG(dm, ODM_COMP_INIT, - "===> check_positive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4); + "===> %s (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", + __func__, cond1, cond2, cond3, cond4); PHYDM_DBG(dm, ODM_COMP_INIT, - "===> check_positive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4); + "===> %s (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", + __func__, driver1, driver2, driver3, driver4); PHYDM_DBG(dm, ODM_COMP_INIT, - " (Platform, Interface) = (0x%X, 0x%X)\n", dm->support_platform, dm->support_interface); + " (Platform, Interface) = (0x%X, 0x%X)\n", + dm->support_platform, dm->support_interface); PHYDM_DBG(dm, ODM_COMP_INIT, - " (Board, Package) = (0x%X, 0x%X)\n", dm->board_type, dm->package_type); + " (Board, Package) = (0x%X, 0x%X)\n", dm->board_type, + dm->package_type); /*============== value Defined Check ===============*/ @@ -75,11 +85,11 @@ check_positive( /*=============== Bit Defined Check ================*/ /* We don't care [31:28] */ - cond1 &= 0x00FF0FFF; + cond1 &= 0x00FF0FFF; driver1 &= 0x00FF0FFF; if ((cond1 & driver1) == cond1) { - u32 bit_mask = 0; + u32 bit_mask = 0; if ((cond1 & 0x0F) == 0) /* board_type is DONTCARE*/ return true; @@ -100,583 +110,611 @@ check_positive( } else return false; } -static boolean -check_negative( - struct dm_struct *dm, - const u32 condition1, - const u32 condition2 -) -{ - return true; -} /****************************************************************************** -* RadioA.TXT +* radioa.TXT ******************************************************************************/ u32 array_mp_8188e_radioa[] = { - 0x000, 0x00030000, - 0x008, 0x00084000, - 0x018, 0x00000407, - 0x019, 0x00000012, + 0x000, 0x00030000, + 0x008, 0x00084000, + 0x018, 0x00000407, + 0x019, 0x00000012, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 0x01B, 0x00000084, + 0x01B, 0x00000084, 0x98000003, 0x00000001, 0x40000000, 0x00000000, - 0x01B, 0x00000084, + 0x01B, 0x00000084, 0x98000003, 0x00000002, 0x40000000, 0x00000000, - 0x01B, 0x00000084, + 0x01B, 0x00000084, 0x90000003, 0x00000002, 0x40000000, 0x00000000, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0x01B, 0x00000084, + 0x01B, 0x00000084, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0x01B, 0x00000084, + 0x01B, 0x00000084, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0x01B, 0x00000084, + 0x01B, 0x00000084, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0x01B, 0x00000084, + 0x01B, 0x00000084, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0x01B, 0x00000084, 0x90000002, 0x00000000, 0x40000000, 0x00000000, 0x90000001, 0x00000000, 0x40000000, 0x00000000, 0x90000001, 0x00000001, 0x40000000, 0x00000000, 0x90000001, 0x00000002, 0x40000000, 0x00000000, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0x01B, 0x00000084, + 0x01B, 0x00000084, 0x90000400, 0x00000000, 0x40000000, 0x00000000, 0xA0000000, 0x00000000, 0xB0000000, 0x00000000, - 0x01E, 0x00080009, - 0x01F, 0x00000880, - 0x02F, 0x0001A060, + 0x01E, 0x00080009, + 0x01F, 0x00000880, + 0x02F, 0x0001A060, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000C0000, + 0x03F, 0x000C0000, 0x98000003, 0x00000001, 0x40000000, 0x00000000, - 0x03F, 0x000C0000, + 0x03F, 0x000C0000, 0x98000003, 0x00000002, 0x40000000, 0x00000000, - 0x03F, 0x000C0000, + 0x03F, 0x000C0000, 0x90000003, 0x00000002, 0x40000000, 0x00000000, - 0x03F, 0x00000000, + 0x03F, 0x00000000, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000C0000, + 0x03F, 0x000C0000, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0x03F, 0x000C0000, + 0x03F, 0x000C0000, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0x03F, 0x000C0000, + 0x03F, 0x000C0000, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000C0000, + 0x03F, 0x000C0000, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000C0000, 0x90000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00000000, + 0x03F, 0x00000000, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00000000, + 0x03F, 0x00000000, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0x03F, 0x00000000, + 0x03F, 0x00000000, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0x03F, 0x00000000, + 0x03F, 0x00000000, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000C0000, + 0x03F, 0x000C0000, 0x90000400, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00000000, + 0x03F, 0x00000000, 0xA0000000, 0x00000000, - 0x03F, 0x00000000, + 0x03F, 0x00000000, 0xB0000000, 0x00000000, - 0x042, 0x000060C0, - 0x057, 0x000D0000, - 0x058, 0x000BE180, - 0x067, 0x00001552, - 0x083, 0x00000000, - 0x0B0, 0x000FF8FC, - 0x0B1, 0x00054400, - 0x0B2, 0x000CCC19, - 0x0B4, 0x00043003, - 0x0B6, 0x0004953E, - 0x0B7, 0x0001C718, - 0x0B8, 0x000060FF, - 0x0B9, 0x00080001, - 0x0BA, 0x00040000, - 0x0BB, 0x00000400, - 0x0BF, 0x000C0000, - 0x0C2, 0x00002400, - 0x0C3, 0x00000009, - 0x0C4, 0x00040C91, - 0x0C5, 0x00099999, - 0x0C6, 0x000000A3, - 0x0C7, 0x00088820, - 0x0C8, 0x00076C06, - 0x0C9, 0x00000000, - 0x0CA, 0x00080000, - 0x0DF, 0x00000180, - 0x0EF, 0x000001A0, - 0x051, 0x0006B27D, + 0x042, 0x000060C0, + 0x057, 0x000D0000, + 0x058, 0x000BE180, + 0x067, 0x00001552, + 0x083, 0x00000000, + 0x0B0, 0x000FF8FC, + 0x0B1, 0x00054400, + 0x0B2, 0x000CCC19, + 0x0B4, 0x00043003, + 0x0B6, 0x0004953E, + 0x0B7, 0x0001C718, + 0x0B8, 0x000060FF, + 0x0B9, 0x00080001, + 0x0BA, 0x00040000, + 0x0BB, 0x00000400, + 0x0BF, 0x000C0000, + 0x0C2, 0x00002400, + 0x0C3, 0x00000009, + 0x0C4, 0x00040C91, + 0x0C5, 0x00099999, + 0x0C6, 0x000000A3, + 0x0C7, 0x00088820, + 0x0C8, 0x00076C06, + 0x0C9, 0x00000000, + 0x0CA, 0x00080000, + 0x0DF, 0x00000180, + 0x0EF, 0x000001A0, + 0x051, 0x0006B27D, 0x88000003, 0x00000000, 0x40000000, 0x00000000, - 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0x03B, 0x000F07B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D0020, - 0x03B, 0x000CF060, - 0x03B, 0x000B07E0, - 0x03B, 0x000A0010, - 0x03B, 0x00090000, - 0x03B, 0x0008F780, - 0x03B, 0x000727B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, + 0x03B, 0x000F07B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D0020, + 0x03B, 0x000CF060, + 0x03B, 0x000B07E0, + 0x03B, 0x000A0010, + 0x03B, 0x00090000, + 0x03B, 0x0008F780, + 0x03B, 0x000727B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, 0x98000001, 0x00000000, 0x40000000, 0x00000000, - 0x03B, 0x000F02B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D4FB0, - 0x03B, 0x000CF060, - 0x03B, 0x000B0090, - 0x03B, 0x000A0080, - 0x03B, 0x00090080, - 0x03B, 0x0008F780, - 0x03B, 0x000722B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, + 0x03B, 0x000F02B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D4FB0, + 0x03B, 0x000CF060, + 0x03B, 0x000B0090, + 0x03B, 0x000A0080, + 0x03B, 0x00090080, + 0x03B, 0x0008F780, + 0x03B, 0x000722B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, 0x98000001, 0x00000001, 0x40000000, 0x00000000, - 0x03B, 0x000F02B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D4FB0, - 0x03B, 0x000CF060, - 0x03B, 0x000B0090, - 0x03B, 0x000A0080, - 0x03B, 0x00090080, - 0x03B, 0x0008F780, - 0x03B, 0x000722B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, + 0x03B, 0x000F02B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D4FB0, + 0x03B, 0x000CF060, + 0x03B, 0x000B0090, + 0x03B, 0x000A0080, + 0x03B, 0x00090080, + 0x03B, 0x0008F780, + 0x03B, 0x000722B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, 0x98000001, 0x00000002, 0x40000000, 0x00000000, - 0x03B, 0x000F02B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D4FB0, - 0x03B, 0x000CF060, - 0x03B, 0x000B0090, - 0x03B, 0x000A0080, - 0x03B, 0x00090080, - 0x03B, 0x0008F780, - 0x03B, 0x000722B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, + 0x03B, 0x000F02B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D4FB0, + 0x03B, 0x000CF060, + 0x03B, 0x000B0090, + 0x03B, 0x000A0080, + 0x03B, 0x00090080, + 0x03B, 0x0008F780, + 0x03B, 0x000722B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, 0x98000400, 0x00000000, 0x40000000, 0x00000000, - 0x03B, 0x000F02B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D4FB0, - 0x03B, 0x000CF060, - 0x03B, 0x000B0090, - 0x03B, 0x000A0080, - 0x03B, 0x00090080, - 0x03B, 0x0008F780, - 0x03B, 0x000722B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, + 0x03B, 0x000F02B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D4FB0, + 0x03B, 0x000CF060, + 0x03B, 0x000B0090, + 0x03B, 0x000A0080, + 0x03B, 0x00090080, + 0x03B, 0x0008F780, + 0x03B, 0x000722B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, + 0x98000002, 0x00000000, 0x40000000, 0x00000000, + 0x03B, 0x000F02B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D4FB0, + 0x03B, 0x000CF060, + 0x03B, 0x000B0090, + 0x03B, 0x000A0080, + 0x03B, 0x00090080, + 0x03B, 0x0008F780, + 0x03B, 0x000722B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, 0x90000002, 0x00000000, 0x40000000, 0x00000000, - 0x03B, 0x000F02B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D4FB0, - 0x03B, 0x000CF060, - 0x03B, 0x000B0090, - 0x03B, 0x000A0080, - 0x03B, 0x00090080, - 0x03B, 0x0008F780, - 0x03B, 0x000722B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, + 0x03B, 0x000F02B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D4FB0, + 0x03B, 0x000CF060, + 0x03B, 0x000B0090, + 0x03B, 0x000A0080, + 0x03B, 0x00090080, + 0x03B, 0x0008F780, + 0x03B, 0x000722B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, 0x90000001, 0x00000000, 0x40000000, 0x00000000, - 0x03B, 0x000F02B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D4FB0, - 0x03B, 0x000CF060, - 0x03B, 0x000B0090, - 0x03B, 0x000A0080, - 0x03B, 0x00090080, - 0x03B, 0x0008F780, - 0x03B, 0x000722B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, + 0x03B, 0x000F02B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D4FB0, + 0x03B, 0x000CF060, + 0x03B, 0x000B0090, + 0x03B, 0x000A0080, + 0x03B, 0x00090080, + 0x03B, 0x0008F780, + 0x03B, 0x000722B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, 0x90000001, 0x00000001, 0x40000000, 0x00000000, - 0x03B, 0x000F02B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D4FB0, - 0x03B, 0x000CF060, - 0x03B, 0x000B0090, - 0x03B, 0x000A0080, - 0x03B, 0x00090080, - 0x03B, 0x0008F780, - 0x03B, 0x000722B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, + 0x03B, 0x000F02B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D4FB0, + 0x03B, 0x000CF060, + 0x03B, 0x000B0090, + 0x03B, 0x000A0080, + 0x03B, 0x00090080, + 0x03B, 0x0008F780, + 0x03B, 0x000722B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, 0x90000001, 0x00000002, 0x40000000, 0x00000000, - 0x03B, 0x000F07B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D0020, - 0x03B, 0x000CF060, - 0x03B, 0x000B07E0, - 0x03B, 0x000A0010, - 0x03B, 0x00090000, - 0x03B, 0x0008F780, - 0x03B, 0x000727B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, + 0x03B, 0x000F07B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D0020, + 0x03B, 0x000CF060, + 0x03B, 0x000B07E0, + 0x03B, 0x000A0010, + 0x03B, 0x00090000, + 0x03B, 0x0008F780, + 0x03B, 0x000727B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, 0x98000000, 0x00000000, 0x40000000, 0x00000000, - 0x03B, 0x000F6030, - 0x03B, 0x000E6030, - 0x03B, 0x000D6030, - 0x03B, 0x000C6030, - 0x03B, 0x000BF030, - 0x03B, 0x000A0020, - 0x03B, 0x00090090, - 0x03B, 0x0008F080, - 0x03B, 0x0007A730, - 0x03B, 0x000607B0, - 0x03B, 0x0005F770, - 0x03B, 0x00040060, - 0x03B, 0x00030090, - 0x03B, 0x00020780, - 0x03B, 0x000107A0, - 0x03B, 0x0000F760, - 0x0EF, 0x000000A0, + 0x03B, 0x000F6030, + 0x03B, 0x000E6030, + 0x03B, 0x000D6030, + 0x03B, 0x000C6030, + 0x03B, 0x000BF030, + 0x03B, 0x000A0020, + 0x03B, 0x00090090, + 0x03B, 0x0008F080, + 0x03B, 0x0007A730, + 0x03B, 0x000607B0, + 0x03B, 0x0005F770, + 0x03B, 0x00040060, + 0x03B, 0x00030090, + 0x03B, 0x00020780, + 0x03B, 0x000107A0, + 0x03B, 0x0000F760, + 0x0EF, 0x000000A0, 0x90000400, 0x00000000, 0x40000000, 0x00000000, - 0x03B, 0x000F02B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D4FB0, - 0x03B, 0x000CF060, - 0x03B, 0x000B0090, - 0x03B, 0x000A0080, - 0x03B, 0x00090080, - 0x03B, 0x0008F780, - 0x03B, 0x000722B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, + 0x03B, 0x000F02B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D4FB0, + 0x03B, 0x000CF060, + 0x03B, 0x000B0090, + 0x03B, 0x000A0080, + 0x03B, 0x00090080, + 0x03B, 0x0008F780, + 0x03B, 0x000722B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, 0xA0000000, 0x00000000, - 0x03B, 0x000F02B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D4FB0, - 0x03B, 0x000CF060, - 0x03B, 0x000B0090, - 0x03B, 0x000A0080, - 0x03B, 0x00090080, - 0x03B, 0x0008F780, - 0x03B, 0x000722B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, + 0x03B, 0x000F02B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D4FB0, + 0x03B, 0x000CF060, + 0x03B, 0x000B0090, + 0x03B, 0x000A0080, + 0x03B, 0x00090080, + 0x03B, 0x0008F780, + 0x03B, 0x000722B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, 0xB0000000, 0x00000000, - 0x000, 0x00010159, - 0x018, 0x0000F407, - 0xFFE, 0x00000000, - 0xFFE, 0x00000000, - 0x01F, 0x00080003, - 0xFFE, 0x00000000, - 0xFFE, 0x00000000, - 0x01E, 0x00000001, - 0x01F, 0x00080000, - 0x000, 0x00033E60, + 0x000, 0x00010159, + 0x018, 0x0000F407, + 0xFFE, 0x00000000, + 0xFFE, 0x00000000, + 0x01F, 0x00080003, + 0xFFE, 0x00000000, + 0xFFE, 0x00000000, + 0x01E, 0x00000001, + 0x01F, 0x00080000, + 0x000, 0x00033E60, }; void -odm_read_and_config_mp_8188e_radioa( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_radioa(struct dm_struct *dm) { - u32 i = 0; - u8 c_cond; - boolean is_matched = true, is_skipped = false; - u32 array_len = sizeof(array_mp_8188e_radioa) / sizeof(u32); - u32 *array = array_mp_8188e_radioa; + u32 i = 0; + u8 c_cond; + boolean is_matched = true, is_skipped = false; + u32 array_len = sizeof(array_mp_8188e_radioa) / sizeof(u32); + u32 *array = array_mp_8188e_radioa; u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; - PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8188e_radioa\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__); while ((i + 1) < array_len) { v1 = array[i]; v2 = array[i + 1]; - if (v1 & (BIT(31) | BIT30)) {/*positive & negative condition*/ + if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/ if (v1 & BIT(31)) {/* positive condition*/ c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); if (c_cond == COND_ENDIF) {/*end*/ @@ -714,11 +752,11 @@ odm_read_and_config_mp_8188e_radioa( u32 odm_get_version_mp_8188e_radioa(void) { - return 70; + return 71; } /****************************************************************************** -* TxPowerTrack_AP.TXT +* txpowertrack_ap.TXT ******************************************************************************/ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) @@ -753,14 +791,12 @@ u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_ap_8188e[] = {0, 0, 1, 1, #endif void -odm_read_and_config_mp_8188e_txpowertrack_ap( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_txpowertrack_ap(struct dm_struct *dm) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); - PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8188E\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8188e\n"); odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_ap_8188e, DELTA_SWINGIDX_SIZE); @@ -781,7 +817,7 @@ odm_read_and_config_mp_8188e_txpowertrack_ap( } /****************************************************************************** -* TxPowerTrack_PCIE.TXT +* txpowertrack_pcie.TXT ******************************************************************************/ #if DEV_BUS_TYPE == RT_PCI_INTERFACE @@ -816,14 +852,12 @@ u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_pcie_8188e[] = {0, 0, 0, 0 #endif void -odm_read_and_config_mp_8188e_txpowertrack_pcie( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_txpowertrack_pcie(struct dm_struct *dm) { #if DEV_BUS_TYPE == RT_PCI_INTERFACE struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); - PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8188E\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8188e\n"); odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_pcie_8188e, DELTA_SWINGIDX_SIZE); @@ -844,7 +878,7 @@ odm_read_and_config_mp_8188e_txpowertrack_pcie( } /****************************************************************************** -* TxPowerTrack_PCIE_ICUT.TXT +* txpowertrack_pcie_icut.TXT ******************************************************************************/ u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_pcie_icut_8188e[][DELTA_SWINGIDX_SIZE] = { @@ -877,13 +911,11 @@ u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_pcie_icut_8188e[] = {0, 1, u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_pcie_icut_8188e[] = {0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9, 10, 10, 11, 12, 12, 12, 12}; void -odm_read_and_config_mp_8188e_txpowertrack_pcie_icut( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_txpowertrack_pcie_icut(struct dm_struct *dm) { struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); - PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8188E\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8188e\n"); odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_pcie_icut_8188e, DELTA_SWINGIDX_SIZE); @@ -903,7 +935,7 @@ odm_read_and_config_mp_8188e_txpowertrack_pcie_icut( } /****************************************************************************** -* TxPowerTrack_SDIO.TXT +* txpowertrack_sdio.TXT ******************************************************************************/ #if DEV_BUS_TYPE == RT_SDIO_INTERFACE @@ -938,14 +970,12 @@ u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_sdio_8188e[] = {0, 0, 0, 0 #endif void -odm_read_and_config_mp_8188e_txpowertrack_sdio( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_txpowertrack_sdio(struct dm_struct *dm) { #if DEV_BUS_TYPE == RT_SDIO_INTERFACE struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); - PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8188E\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8188e\n"); odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_sdio_8188e, DELTA_SWINGIDX_SIZE); @@ -966,7 +996,7 @@ odm_read_and_config_mp_8188e_txpowertrack_sdio( } /****************************************************************************** -* TxPowerTrack_SDIO_ICUT.TXT +* txpowertrack_sdio_icut.TXT ******************************************************************************/ u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_sdio_icut_8188e[][DELTA_SWINGIDX_SIZE] = { @@ -999,13 +1029,11 @@ u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_sdio_icut_8188e[] = {0, 1, u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_sdio_icut_8188e[] = {0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9, 10, 10, 11, 12, 12, 12, 12}; void -odm_read_and_config_mp_8188e_txpowertrack_sdio_icut( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_txpowertrack_sdio_icut(struct dm_struct *dm) { struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); - PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8188E\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8188e\n"); odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_sdio_icut_8188e, DELTA_SWINGIDX_SIZE); @@ -1025,7 +1053,7 @@ odm_read_and_config_mp_8188e_txpowertrack_sdio_icut( } /****************************************************************************** -* TxPowerTrack_USB.TXT +* txpowertrack_usb.TXT ******************************************************************************/ #if DEV_BUS_TYPE == RT_USB_INTERFACE @@ -1060,14 +1088,12 @@ u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_usb_8188e[] = {0, 0, 0, 0, #endif void -odm_read_and_config_mp_8188e_txpowertrack_usb( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_txpowertrack_usb(struct dm_struct *dm) { #if DEV_BUS_TYPE == RT_USB_INTERFACE struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); - PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8188E\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8188e\n"); odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_usb_8188e, DELTA_SWINGIDX_SIZE); @@ -1088,7 +1114,7 @@ odm_read_and_config_mp_8188e_txpowertrack_usb( } /****************************************************************************** -* TxPowerTrack_USB_ICUT.TXT +* txpowertrack_usb_icut.TXT ******************************************************************************/ u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_usb_icut_8188e[][DELTA_SWINGIDX_SIZE] = { @@ -1121,13 +1147,11 @@ u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_usb_icut_8188e[] = {0, 1, u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_usb_icut_8188e[] = {0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9, 10, 10, 11, 12, 12, 12, 12}; void -odm_read_and_config_mp_8188e_txpowertrack_usb_icut( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_txpowertrack_usb_icut(struct dm_struct *dm) { struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); - PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8188E\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8188e\n"); odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_usb_icut_8188e, DELTA_SWINGIDX_SIZE); @@ -1147,7 +1171,7 @@ odm_read_and_config_mp_8188e_txpowertrack_usb_icut( } /****************************************************************************** -* TXPWR_LMT.TXT +* txpwr_lmt.TXT ******************************************************************************/ const char *array_mp_8188e_txpwr_lmt[] = { @@ -1718,44 +1742,56 @@ const char *array_mp_8188e_txpwr_lmt[] = { }; void -odm_read_and_config_mp_8188e_txpwr_lmt( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_txpwr_lmt(struct dm_struct *dm) { - u32 i = 0; - u32 array_len = sizeof(array_mp_8188e_txpwr_lmt) / sizeof(u8 *); - u8 **array = (u8 **)array_mp_8188e_txpwr_lmt; + u32 i = 0; +#if (DM_ODM_SUPPORT_TYPE == ODM_IOT) + u32 array_len = sizeof(array_mp_8188e_txpwr_lmt) / sizeof(u8); + u8 *array = (u8 *)array_mp_8188e_txpwr_lmt; +#else + u32 array_len = sizeof(array_mp_8188e_txpwr_lmt) / sizeof(u8 *); + u8 **array = (u8 **)array_mp_8188e_txpwr_lmt; +#endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter = dm->adapter; + void *adapter = dm->adapter; HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); PlatformZeroMemory(hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); hal_data->nLinesReadPwrLmt = array_len / 7; #endif - PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8188e_txpwr_lmt\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__); for (i = 0; i < array_len; i += 7) { - u8 *regulation = array[i]; - u8 *band = array[i + 1]; - u8 *bandwidth = array[i + 2]; - u8 *rate = array[i + 3]; - u8 *rf_path = array[i + 4]; - u8 *chnl = array[i + 5]; - u8 *val = array[i + 6]; +#if (DM_ODM_SUPPORT_TYPE == ODM_IOT) + u8 regulation = array[i]; + u8 band = array[i + 1]; + u8 bandwidth = array[i + 2]; + u8 rate = array[i + 3]; + u8 rf_path = array[i + 4]; + u8 chnl = array[i + 5]; + u8 val = array[i + 6]; +#else + u8 *regulation = array[i]; + u8 *band = array[i + 1]; + u8 *bandwidth = array[i + 2]; + u8 *rate = array[i + 3]; + u8 *rf_path = array[i + 4]; + u8 *chnl = array[i + 5]; + u8 *val = array[i + 6]; +#endif odm_config_bb_txpwr_lmt_8188e(dm, regulation, band, bandwidth, rate, rf_path, chnl, val); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) rsprintf((char *)hal_data->BufOfLinesPwrLmt[i / 7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", - regulation, band, bandwidth, rate, rf_path, chnl, val); + regulation, band, bandwidth, rate, rf_path, chnl, val); #endif } - } /****************************************************************************** -* TXPWR_LMT_88EE_M2_for_MSI.TXT +* txpwr_lmt_88ee_m2_for_msi.TXT ******************************************************************************/ const char *array_mp_8188e_txpwr_lmt_88ee_m2_for_msi[] = { @@ -2326,40 +2362,53 @@ const char *array_mp_8188e_txpwr_lmt_88ee_m2_for_msi[] = { }; void -odm_read_and_config_mp_8188e_txpwr_lmt_88e_e_m2_for_msi( - struct dm_struct *dm -) +odm_read_and_config_mp_8188e_txpwr_lmt_88ee_m2_for_msi(struct dm_struct *dm) { - u32 i = 0; - u32 array_len = sizeof(array_mp_8188e_txpwr_lmt_88ee_m2_for_msi) / sizeof(u8 *); - u8 **array = (u8 **)array_mp_8188e_txpwr_lmt_88ee_m2_for_msi; + u32 i = 0; +#if (DM_ODM_SUPPORT_TYPE == ODM_IOT) + u32 array_len = sizeof(array_mp_8188e_txpwr_lmt_88ee_m2_for_msi) / sizeof(u8); + u8 *array = (u8 *)array_mp_8188e_txpwr_lmt_88ee_m2_for_msi; +#else + u32 array_len = sizeof(array_mp_8188e_txpwr_lmt_88ee_m2_for_msi) / sizeof(u8 *); + u8 **array = (u8 **)array_mp_8188e_txpwr_lmt_88ee_m2_for_msi; +#endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter = dm->adapter; + void *adapter = dm->adapter; HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); PlatformZeroMemory(hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); hal_data->nLinesReadPwrLmt = array_len / 7; #endif - PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8188e_txpwr_lmt_88e_e_m2_for_msi\n"); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__); for (i = 0; i < array_len; i += 7) { - u8 *regulation = array[i]; - u8 *band = array[i + 1]; - u8 *bandwidth = array[i + 2]; - u8 *rate = array[i + 3]; - u8 *rf_path = array[i + 4]; - u8 *chnl = array[i + 5]; - u8 *val = array[i + 6]; +#if (DM_ODM_SUPPORT_TYPE == ODM_IOT) + u8 regulation = array[i]; + u8 band = array[i + 1]; + u8 bandwidth = array[i + 2]; + u8 rate = array[i + 3]; + u8 rf_path = array[i + 4]; + u8 chnl = array[i + 5]; + u8 val = array[i + 6]; +#else + u8 *regulation = array[i]; + u8 *band = array[i + 1]; + u8 *bandwidth = array[i + 2]; + u8 *rate = array[i + 3]; + u8 *rf_path = array[i + 4]; + u8 *chnl = array[i + 5]; + u8 *val = array[i + 6]; +#endif odm_config_bb_txpwr_lmt_8188e(dm, regulation, band, bandwidth, rate, rf_path, chnl, val); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) rsprintf((char *)hal_data->BufOfLinesPwrLmt[i / 7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", - regulation, band, bandwidth, rate, rf_path, chnl, val); + regulation, band, bandwidth, rate, rf_path, chnl, val); #endif } - } #endif /* end of HWIMG_SUPPORT*/ + diff --git a/hal/phydm/rtl8188e/halhwimg8188e_rf.h b/hal/phydm/rtl8188e/halhwimg8188e_rf.h index 484d033..3e5a6f5 100644 --- a/hal/phydm/rtl8188e/halhwimg8188e_rf.h +++ b/hal/phydm/rtl8188e/halhwimg8188e_rf.h @@ -13,111 +13,105 @@ * *****************************************************************************/ -/*Image2HeaderVersion: 2.18*/ +/*Image2HeaderVersion: 3.5.2*/ #if (RTL8188E_SUPPORT == 1) #ifndef __INC_MP_RF_HW_IMG_8188E_H #define __INC_MP_RF_HW_IMG_8188E_H /****************************************************************************** -* RadioA.TXT +* radioa.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_radioa(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); +odm_read_and_config_mp_8188e_radioa( /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); u32 odm_get_version_mp_8188e_radioa(void); /****************************************************************************** -* TxPowerTrack_AP.TXT +* txpowertrack_ap.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_txpowertrack_ap(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); -u32 odm_get_version_mp_8188e_txpowertrack_ap(void); +odm_read_and_config_mp_8188e_txpowertrack_ap( /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); +u32 odm_get_version_mp_8188e_txpowertrack_ap(void); /****************************************************************************** -* TxPowerTrack_PCIE.TXT +* txpowertrack_pcie.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_txpowertrack_pcie(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); -u32 odm_get_version_mp_8188e_txpowertrack_pcie(void); +odm_read_and_config_mp_8188e_txpowertrack_pcie( /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); +u32 odm_get_version_mp_8188e_txpowertrack_pcie(void); /****************************************************************************** -* TxPowerTrack_PCIE_ICUT.TXT +* txpowertrack_pcie_icut.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_txpowertrack_pcie_icut(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); -u32 odm_get_version_mp_8188e_txpowertrack_pcie_icut(void); +odm_read_and_config_mp_8188e_txpowertrack_pcie_icut( + /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); +u32 odm_get_version_mp_8188e_txpowertrack_pcie_icut(void); /****************************************************************************** -* TxPowerTrack_SDIO.TXT +* txpowertrack_sdio.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_txpowertrack_sdio(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); -u32 odm_get_version_mp_8188e_txpowertrack_sdio(void); +odm_read_and_config_mp_8188e_txpowertrack_sdio( /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); +u32 odm_get_version_mp_8188e_txpowertrack_sdio(void); /****************************************************************************** -* TxPowerTrack_SDIO_ICUT.TXT +* txpowertrack_sdio_icut.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_txpowertrack_sdio_icut(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); -u32 odm_get_version_mp_8188e_txpowertrack_sdio_icut(void); +odm_read_and_config_mp_8188e_txpowertrack_sdio_icut( + /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); +u32 odm_get_version_mp_8188e_txpowertrack_sdio_icut(void); /****************************************************************************** -* TxPowerTrack_USB.TXT +* txpowertrack_usb.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_txpowertrack_usb(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); -u32 odm_get_version_mp_8188e_txpowertrack_usb(void); +odm_read_and_config_mp_8188e_txpowertrack_usb( /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); +u32 odm_get_version_mp_8188e_txpowertrack_usb(void); /****************************************************************************** -* TxPowerTrack_USB_ICUT.TXT +* txpowertrack_usb_icut.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_txpowertrack_usb_icut(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); -u32 odm_get_version_mp_8188e_txpowertrack_usb_icut(void); +odm_read_and_config_mp_8188e_txpowertrack_usb_icut( + /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); +u32 odm_get_version_mp_8188e_txpowertrack_usb_icut(void); /****************************************************************************** -* TXPWR_LMT.TXT +* txpwr_lmt.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_txpwr_lmt(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); -u32 odm_get_version_mp_8188e_txpwr_lmt(void); +odm_read_and_config_mp_8188e_txpwr_lmt( /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); +u32 odm_get_version_mp_8188e_txpwr_lmt(void); /****************************************************************************** -* TXPWR_LMT_88EE_M2_for_MSI.TXT +* txpwr_lmt_88ee_m2_for_msi.TXT ******************************************************************************/ void -odm_read_and_config_mp_8188e_txpwr_lmt_88e_e_m2_for_msi(/* TC: Test Chip, MP: MP Chip*/ - struct dm_struct *dm -); -u32 odm_get_version_mp_8188e_txpwr_lmt_88ee_m2_for_msi(void); +odm_read_and_config_mp_8188e_txpwr_lmt_88ee_m2_for_msi( + /* tc: Test Chip, mp: mp Chip*/ + struct dm_struct *dm); +u32 odm_get_version_mp_8188e_txpwr_lmt_88ee_m2_for_msi(void); #endif #endif /* end of HWIMG_SUPPORT*/ diff --git a/hal/phydm/rtl8188e/phydm_regconfig8188e.c b/hal/phydm/rtl8188e/phydm_regconfig8188e.c index f5719c9..530556e 100644 --- a/hal/phydm/rtl8188e/phydm_regconfig8188e.c +++ b/hal/phydm/rtl8188e/phydm_regconfig8188e.c @@ -19,14 +19,8 @@ #if (RTL8188E_SUPPORT == 1) -void -odm_config_rf_reg_8188e( - struct dm_struct *dm, - u32 addr, - u32 data, - enum rf_path RF_PATH, - u32 reg_addr -) +void odm_config_rf_reg_8188e(struct dm_struct *dm, u32 addr, u32 data, + enum rf_path RF_PATH, u32 reg_addr) { #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #ifndef SMP_SYNC @@ -52,7 +46,6 @@ odm_config_rf_reg_8188e( else if (addr == 0xf9) ODM_delay_us(1); else { - #if (DM_ODM_SUPPORT_TYPE == ODM_AP) SAVE_INT_AND_CLI(x); odm_set_rf_reg(dm, RF_PATH, reg_addr, RFREGOFFSETMASK, data); @@ -65,74 +58,52 @@ odm_config_rf_reg_8188e( } } - -void -odm_config_rf_radio_a_8188e( - struct dm_struct *dm, - u32 addr, - u32 data -) +void odm_config_rf_radio_a_8188e(struct dm_struct *dm, u32 addr, u32 data) { - u32 content = 0x1000; /* RF_Content: radioa_txt */ - u32 maskfor_phy_set = (u32)(content & 0xE000); + u32 content = 0x1000; /* RF_Content: radioa_txt */ + u32 maskfor_phy_set = (u32)(content & 0xE000); odm_config_rf_reg_8188e(dm, addr, data, RF_PATH_A, addr | maskfor_phy_set); - PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_config_rf_with_header_file: [RadioA] %08X %08X\n", addr, data); + PHYDM_DBG(dm, ODM_COMP_INIT, + "===> odm_config_rf_with_header_file: [RadioA] %08X %08X\n", + addr, data); } -void -odm_config_rf_radio_b_8188e( - struct dm_struct *dm, - u32 addr, - u32 data -) +void odm_config_rf_radio_b_8188e(struct dm_struct *dm, u32 addr, u32 data) { - u32 content = 0x1001; /* RF_Content: radiob_txt */ - u32 maskfor_phy_set = (u32)(content & 0xE000); + u32 content = 0x1001; /* RF_Content: radiob_txt */ + u32 maskfor_phy_set = (u32)(content & 0xE000); odm_config_rf_reg_8188e(dm, addr, data, RF_PATH_B, addr | maskfor_phy_set); - PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_config_rf_with_header_file: [RadioB] %08X %08X\n", addr, data); - + PHYDM_DBG(dm, ODM_COMP_INIT, + "===> odm_config_rf_with_header_file: [RadioB] %08X %08X\n", + addr, data); } -void -odm_config_mac_8188e( - struct dm_struct *dm, - u32 addr, - u8 data -) +void odm_config_mac_8188e(struct dm_struct *dm, u32 addr, u8 data) { odm_write_1byte(dm, addr, data); - PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_config_mac_with_header_file: [MAC_REG] %08X %08X\n", addr, data); + PHYDM_DBG(dm, ODM_COMP_INIT, + "===> odm_config_mac_with_header_file: [MAC_REG] %08X %08X\n", + addr, data); } -void -odm_config_bb_agc_8188e( - struct dm_struct *dm, - u32 addr, - u32 bitmask, - u32 data -) +void odm_config_bb_agc_8188e(struct dm_struct *dm, u32 addr, u32 bitmask, + u32 data) { odm_set_bb_reg(dm, addr, bitmask, data); /* Add 1us delay between BB/RF register setting. */ ODM_delay_us(1); - PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_config_bb_with_header_file: [AGC_TAB] %08X %08X\n", addr, data); + PHYDM_DBG(dm, ODM_COMP_INIT, + "===> odm_config_bb_with_header_file: [AGC_TAB] %08X %08X\n", + addr, data); } -void -odm_config_bb_phy_reg_pg_8188e( - struct dm_struct *dm, - u32 band, - u32 rf_path, - u32 tx_num, - u32 addr, - u32 bitmask, - u32 data -) +void odm_config_bb_phy_reg_pg_8188e(struct dm_struct *dm, u32 band, u32 rf_path, + u32 tx_num, u32 addr, u32 bitmask, u32 data) { if (addr == 0xfe) { #ifdef CONFIG_LONG_DELAY_ISSUE @@ -151,44 +122,33 @@ odm_config_bb_phy_reg_pg_8188e( else if (addr == 0xf9) ODM_delay_us(1); else { - PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X %08X\n", addr, bitmask, data); + PHYDM_DBG(dm, ODM_COMP_INIT, + "===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X %08X\n", + addr, bitmask, data); #if (DM_ODM_SUPPORT_TYPE & ODM_CE) phy_store_tx_power_by_rate(dm->adapter, band, rf_path, tx_num, addr, bitmask, data); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) - PHY_StoreTxPowerByRate((PADAPTER)dm->adapter, band, rf_path, tx_num, addr, bitmask, data); + PHY_StoreTxPowerByRate(dm->adapter, band, rf_path, tx_num, addr, bitmask, data); #endif } } -void -odm_config_bb_txpwr_lmt_8188e( - struct dm_struct *dm, - u8 *regulation, - u8 *band, - u8 *bandwidth, - u8 *rate_section, - u8 *rf_path, - u8 *channel, - u8 *power_limit -) +void odm_config_bb_txpwr_lmt_8188e(struct dm_struct *dm, u8 *regulation, + u8 *band, u8 *bandwidth, u8 *rate_section, + u8 *rf_path, u8 *channel, u8 *power_limit) { #if (DM_ODM_SUPPORT_TYPE & ODM_CE) phy_set_tx_power_limit(dm, regulation, band, - bandwidth, rate_section, rf_path, channel, power_limit); + bandwidth, rate_section, rf_path, channel, power_limit); #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) PHY_SetTxPowerLimit(dm, regulation, band, - bandwidth, rate_section, rf_path, channel, power_limit); + bandwidth, rate_section, rf_path, channel, power_limit); #endif } -void -odm_config_bb_phy_8188e( - struct dm_struct *dm, - u32 addr, - u32 bitmask, - u32 data -) +void odm_config_bb_phy_8188e(struct dm_struct *dm, u32 addr, u32 bitmask, + u32 data) { if (addr == 0xfe) { #ifdef CONFIG_LONG_DELAY_ISSUE @@ -213,7 +173,9 @@ odm_config_bb_phy_8188e( /* Add 1us delay between BB/RF register setting. */ ODM_delay_us(1); - PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X\n", addr, data); + PHYDM_DBG(dm, ODM_COMP_INIT, + "===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X\n", + addr, data); } } #endif diff --git a/hal/phydm/rtl8188e/phydm_regconfig8188e.h b/hal/phydm/rtl8188e/phydm_regconfig8188e.h index 2ffdd2d..83afba8 100644 --- a/hal/phydm/rtl8188e/phydm_regconfig8188e.h +++ b/hal/phydm/rtl8188e/phydm_regconfig8188e.h @@ -17,74 +17,28 @@ #if (RTL8188E_SUPPORT == 1) -void -odm_config_rf_reg_8188e( - struct dm_struct *dm, - u32 addr, - u32 data, - enum rf_path RF_PATH, - u32 reg_addr -); +void odm_config_rf_reg_8188e(struct dm_struct *dm, u32 addr, u32 data, + enum rf_path RF_PATH, u32 reg_addr); -void -odm_config_rf_radio_a_8188e( - struct dm_struct *dm, - u32 addr, - u32 data -); +void odm_config_rf_radio_a_8188e(struct dm_struct *dm, u32 addr, u32 data); -void -odm_config_rf_radio_b_8188e( - struct dm_struct *dm, - u32 addr, - u32 data -); +void odm_config_rf_radio_b_8188e(struct dm_struct *dm, u32 addr, u32 data); -void -odm_config_mac_8188e( - struct dm_struct *dm, - u32 addr, - u8 data -); +void odm_config_mac_8188e(struct dm_struct *dm, u32 addr, u8 data); -void -odm_config_bb_agc_8188e( - struct dm_struct *dm, - u32 addr, - u32 bitmask, - u32 data -); +void odm_config_bb_agc_8188e(struct dm_struct *dm, u32 addr, u32 bitmask, + u32 data); -void -odm_config_bb_phy_reg_pg_8188e( - struct dm_struct *dm, - u32 band, - u32 rf_path, - u32 tx_num, - u32 addr, - u32 bitmask, - u32 data -); +void odm_config_bb_phy_reg_pg_8188e(struct dm_struct *dm, u32 band, u32 rf_path, + u32 tx_num, u32 addr, u32 bitmask, + u32 data); -void -odm_config_bb_phy_8188e( - struct dm_struct *dm, - u32 addr, - u32 bitmask, - u32 data -); +void odm_config_bb_phy_8188e(struct dm_struct *dm, u32 addr, u32 bitmask, + u32 data); -void -odm_config_bb_txpwr_lmt_8188e( - struct dm_struct *dm, - u8 *regulation, - u8 *band, - u8 *bandwidth, - u8 *rate_section, - u8 *rf_path, - u8 *channel, - u8 *power_limit -); +void odm_config_bb_txpwr_lmt_8188e(struct dm_struct *dm, u8 *regulation, + u8 *band, u8 *bandwidth, u8 *rate_section, + u8 *rf_path, u8 *channel, u8 *power_limit); #endif #endif /* end of SUPPORT */ diff --git a/hal/phydm/rtl8188e/phydm_rtl8188e.c b/hal/phydm/rtl8188e/phydm_rtl8188e.c index c4f6dcf..9e666d3 100644 --- a/hal/phydm/rtl8188e/phydm_rtl8188e.c +++ b/hal/phydm/rtl8188e/phydm_rtl8188e.c @@ -23,33 +23,36 @@ #if (RTL8188E_SUPPORT == 1) -void -odm_dig_lower_bound_88e( - struct dm_struct *dm -) +s8 phydm_cck_rssi_8188e(struct dm_struct *dm, u16 lna_idx, u8 vga_idx) { - struct phydm_dig_struct *dig_t = &dm->dm_dig_table; - - if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { - dig_t->rx_gain_range_min = (u8) dig_t->ant_div_rssi_max; - PHYDM_DBG(dm, DBG_ANT_DIV, "odm_dig_lower_bound_88e(): dig_t->ant_div_rssi_max=%d\n", dig_t->ant_div_rssi_max); + s8 rx_pwr_all = 0; + s8 lna_gain = 0; + /*only use lna0/1/2/3/7*/ + s8 lna_gain_table_0[8] = {17, -1, -13, -29, -32, -35, -38, -41}; + /*only use lna3 /7*/ + s8 lna_gain_table_1[8] = {29, 20, 12, 3, -6, -15, -24, -33}; + /*only use lna1/3/5/7*/ + s8 lna_gain_table_2[8] = {17, -1, -13, -17, -32, -43, -38, -47}; + + if (dm->cut_version >= ODM_CUT_I) { /*SMIC*/ + if (dm->ext_lna == 0x1) { + switch (dm->type_glna) { + case 0x2: /*eLNA 14dB*/ + lna_gain = lna_gain_table_2[lna_idx]; + break; + default: + lna_gain = lna_gain_table_0[lna_idx]; + break; + } + } else { + lna_gain = lna_gain_table_0[lna_idx]; + } + } else { /*TSMC*/ + lna_gain = lna_gain_table_1[lna_idx]; } - /* If only one Entry connected */ + + rx_pwr_all = lna_gain - (2 * vga_idx); + + return rx_pwr_all; } - -/*============================================================= -* AntDiv Before Link -===============================================================*/ -void -odm_sw_ant_div_reset_before_link( - struct dm_struct *dm -) -{ - - struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; - - dm_swat_table->swas_no_link_state = 0; - -} - #endif diff --git a/hal/phydm/rtl8188e/phydm_rtl8188e.h b/hal/phydm/rtl8188e/phydm_rtl8188e.h index f1b2ac4..bb981df 100644 --- a/hal/phydm/rtl8188e/phydm_rtl8188e.h +++ b/hal/phydm/rtl8188e/phydm_rtl8188e.h @@ -12,22 +12,10 @@ * more details. * *****************************************************************************/ -#ifndef __ODM_RTL8188E_H__ +#ifndef __ODM_RTL8188E_H__ #define __ODM_RTL8188E_H__ #if (RTL8188E_SUPPORT == 1) - -void -odm_dig_lower_bound_88e( - struct dm_struct *dm -); - -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - -#define sw_ant_div_reset_before_link odm_sw_ant_div_reset_before_link - -void odm_sw_ant_div_reset_before_link(struct dm_struct *dm); - +s8 phydm_cck_rssi_8188e(struct dm_struct *dm, u16 lna_idx, u8 vga_idx); #endif #endif -#endif \ No newline at end of file diff --git a/hal/phydm/rtl8188e/version_rtl8188e.h b/hal/phydm/rtl8188e/version_rtl8188e.h index b81294e..84df3d9 100644 --- a/hal/phydm/rtl8188e/version_rtl8188e.h +++ b/hal/phydm/rtl8188e/version_rtl8188e.h @@ -1,6 +1,6 @@ /****************************************************************************** * - * Copyright(c) 2016 - 2017 Realtek Corporation. + * Copyright(c) 2007 - 2017 Realtek Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as @@ -8,9 +8,19 @@ * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * + * The full GNU General Public License is included in this distribution in the + * file called LICENSE. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * *****************************************************************************/ /*RTL8188E PHY Parameters*/ /* @@ -19,6 +29,6 @@ You do not need to fill up the version.h anymore, only the maintenance supervisor fills it before formal release. */ -#define RELEASE_DATE_8188E 20160517 +#define RELEASE_DATE_8188E 20171218 #define COMMIT_BY_8188E "RF_Eason" -#define RELEASE_VERSION_8188E 70 +#define RELEASE_VERSION_8188E 71 diff --git a/hal/phydm/sd4_phydm_2_kernel.mk b/hal/phydm/sd4_phydm_2_kernel.mk new file mode 100644 index 0000000..f11c6ac --- /dev/null +++ b/hal/phydm/sd4_phydm_2_kernel.mk @@ -0,0 +1,188 @@ +EXTRA_CFLAGS += -I$(src)/hal/phydm + +_PHYDM_FILES := hal/phydm/phydm_debug.o \ + hal/phydm/phydm_interface.o\ + hal/phydm/phydm_phystatus.o\ + hal/phydm/phydm_hwconfig.o\ + hal/phydm/phydm.o\ + hal/phydm/phydm_dig.o\ + hal/phydm/phydm_rainfo.o\ + hal/phydm/phydm_adaptivity.o\ + hal/phydm/phydm_cfotracking.o\ + hal/phydm/phydm_noisemonitor.o\ + hal/phydm/phydm_beamforming.o\ + hal/phydm/phydm_dfs.o\ + hal/phydm/txbf/halcomtxbf.o\ + hal/phydm/txbf/haltxbfinterface.o\ + hal/phydm/txbf/phydm_hal_txbf_api.o\ + hal/phydm/phydm_ccx.o\ + hal/phydm/phydm_cck_pd.o\ + hal/phydm/phydm_rssi_monitor.o\ + hal/phydm/phydm_math_lib.o\ + hal/phydm/phydm_api.o\ + hal/phydm/halrf/halrf.o\ + hal/phydm/halrf/halrf_debug.o\ + hal/phydm/halrf/halphyrf_ce.o\ + hal/phydm/halrf/halrf_powertracking_ce.o\ + hal/phydm/halrf/halrf_powertracking.o\ + hal/phydm/halrf/halrf_kfree.o + +ifeq ($(CONFIG_RTL8188E), y) +RTL871X = rtl8188e +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8188e_mac.o\ + hal/phydm/$(RTL871X)/halhwimg8188e_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8188e_rf.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8188e_ce.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8188e.o\ + hal/phydm/$(RTL871X)/hal8188erateadaptive.o\ + hal/phydm/$(RTL871X)/phydm_rtl8188e.o +endif + +ifeq ($(CONFIG_RTL8192E), y) +RTL871X = rtl8192e +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8192e_mac.o\ + hal/phydm/$(RTL871X)/halhwimg8192e_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8192e_rf.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8192e_ce.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8192e.o\ + hal/phydm/$(RTL871X)/phydm_rtl8192e.o +endif + + +ifeq ($(CONFIG_RTL8812A), y) +RTL871X = rtl8812a +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8812a_mac.o\ + hal/phydm/$(RTL871X)/halhwimg8812a_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8812a_rf.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8812a_ce.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8812a.o\ + hal/phydm/$(RTL871X)/phydm_rtl8812a.o\ + hal/phydm/txbf/haltxbfjaguar.o +endif + +ifeq ($(CONFIG_RTL8821A), y) +RTL871X = rtl8821a +_PHYDM_FILES += hal/phydm/rtl8821a/halhwimg8821a_mac.o\ + hal/phydm/rtl8821a/halhwimg8821a_bb.o\ + hal/phydm/rtl8821a/halhwimg8821a_rf.o\ + hal/phydm/halrf/rtl8812a/halrf_8812a_ce.o\ + hal/phydm/halrf/rtl8821a/halrf_8821a_ce.o\ + hal/phydm/rtl8821a/phydm_regconfig8821a.o\ + hal/phydm/rtl8821a/phydm_rtl8821a.o\ + hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.o\ + hal/phydm/txbf/haltxbfjaguar.o +endif + + +ifeq ($(CONFIG_RTL8723B), y) +RTL871X = rtl8723b +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8723b_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8723b_mac.o\ + hal/phydm/$(RTL871X)/halhwimg8723b_rf.o\ + hal/phydm/$(RTL871X)/halhwimg8723b_mp.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8723b.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8723b_ce.o\ + hal/phydm/$(RTL871X)/phydm_rtl8723b.o +endif + + +ifeq ($(CONFIG_RTL8814A), y) +RTL871X = rtl8814a +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8814a_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8814a_mac.o\ + hal/phydm/$(RTL871X)/halhwimg8814a_rf.o\ + hal/phydm/halrf/$(RTL871X)/halrf_iqk_8814a.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8814a.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8814a_ce.o\ + hal/phydm/$(RTL871X)/phydm_rtl8814a.o\ + hal/phydm/txbf/haltxbf8814a.o +endif + + +ifeq ($(CONFIG_RTL8723C), y) +RTL871X = rtl8703b +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8703b_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8703b_mac.o\ + hal/phydm/$(RTL871X)/halhwimg8703b_rf.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8703b.o\ + hal/phydm/$(RTL871X)/phydm_rtl8703b.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8703b.o +endif + +ifeq ($(CONFIG_RTL8723D), y) +RTL871X = rtl8723d +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8723d_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8723d_mac.o\ + hal/phydm/$(RTL871X)/halhwimg8723d_rf.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8723d.o\ + hal/phydm/$(RTL871X)/phydm_rtl8723d.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8723d.o +endif + + +ifeq ($(CONFIG_RTL8710B), y) +RTL871X = rtl8710b +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8710b_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8710b_mac.o\ + hal/phydm/$(RTL871X)/halhwimg8710b_rf.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8710b.o\ + hal/phydm/$(RTL871X)/phydm_rtl8710b.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8710b.o +endif + + +ifeq ($(CONFIG_RTL8188F), y) +RTL871X = rtl8188f +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8188f_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8188f_mac.o\ + hal/phydm/$(RTL871X)/halhwimg8188f_rf.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8188f.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8188f.o \ + hal/phydm/$(RTL871X)/phydm_rtl8188f.o +endif + +ifeq ($(CONFIG_RTL8822B), y) +RTL871X = rtl8822b +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8822b_bb.o \ + hal/phydm/$(RTL871X)/halhwimg8822b_mac.o \ + hal/phydm/$(RTL871X)/halhwimg8822b_rf.o \ + hal/phydm/halrf/$(RTL871X)/halrf_8822b.o \ + hal/phydm/$(RTL871X)/phydm_hal_api8822b.o \ + hal/phydm/halrf/$(RTL871X)/halrf_iqk_8822b.o \ + hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8822b.o \ + hal/phydm/$(RTL871X)/phydm_regconfig8822b.o \ + hal/phydm/$(RTL871X)/phydm_rtl8822b.o + +_PHYDM_FILES += hal/phydm/txbf/haltxbf8822b.o +endif + + +ifeq ($(CONFIG_RTL8821C), y) +RTL871X = rtl8821c +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8821c_bb.o \ + hal/phydm/$(RTL871X)/halhwimg8821c_mac.o \ + hal/phydm/$(RTL871X)/halhwimg8821c_rf.o \ + hal/phydm/$(RTL871X)/phydm_hal_api8821c.o \ + hal/phydm/$(RTL871X)/phydm_regconfig8821c.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8821c.o\ + hal/phydm/halrf/$(RTL871X)/halrf_iqk_8821c.o +endif +ifeq ($(CONFIG_RTL8192F), y) +RTL871X = rtl8192f +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8192f_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8192f_mac.o\ + hal/phydm/$(RTL871X)/halhwimg8192f_rf.o\ + hal/phydm/$(RTL871X)/phydm_hal_api8192f.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8192f.o\ + hal/phydm/$(RTL871X)/phydm_rtl8192f.o\ + hal/phydm/halrf/$(RTL871X)/halrf_8192f.o +endif + +ifeq ($(CONFIG_RTL8198F), y) +RTL871X = rtl8198f +_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8198f_bb.o\ + hal/phydm/$(RTL871X)/halhwimg8198f_mac.o\ + hal/phydm/$(RTL871X)/halhwimg8198f_rf.o\ + hal/phydm/$(RTL871X)/phydm_hal_api8198f.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8198f.o +endif diff --git a/hal/phydm/txbf/halcomtxbf.c b/hal/phydm/txbf/halcomtxbf.c index 8de20bb..ae45a5b 100644 --- a/hal/phydm/txbf/halcomtxbf.c +++ b/hal/phydm/txbf/halcomtxbf.c @@ -12,195 +12,175 @@ * more details. * *****************************************************************************/ -/* ************************************************************ +/*@************************************************************ * Description: * * This file is for TXBF mechanism * - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "../phydm_precomp.h" -#if (BEAMFORMING_SUPPORT == 1) -/*Beamforming halcomtxbf API create by YuChen 2015/05*/ +#ifdef PHYDM_BEAMFORMING_SUPPORT +/*@Beamforming halcomtxbf API create by YuChen 2015/05*/ -void -hal_com_txbf_beamform_init( - void *dm_void -) +void hal_com_txbf_beamform_init( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - boolean is_iqgen_setting_ok = false; + struct dm_struct *dm = (struct dm_struct *)dm_void; + boolean is_iqgen_setting_ok = false; if (dm->support_ic_type & ODM_RTL8814A) { is_iqgen_setting_ok = phydm_beamforming_set_iqgen_8814A(dm); - PHYDM_DBG(dm, DBG_TXBF, "[%s] is_iqgen_setting_ok = %d\n", __func__, is_iqgen_setting_ok); + PHYDM_DBG(dm, DBG_TXBF, "[%s] is_iqgen_setting_ok = %d\n", + __func__, is_iqgen_setting_ok); } } -/*Only used for MU BFer Entry when get GID management frame (self is as MU STA)*/ -void -hal_com_txbf_config_gtab( - void *dm_void -) +/*Only used for MU BFer Entry when get GID management frame (self as MU STA)*/ +void hal_com_txbf_config_gtab( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (dm->support_ic_type & ODM_RTL8822B) hal_txbf_8822b_config_gtab(dm); } -void -phydm_beamform_set_sounding_enter( - void *dm_void -) +void phydm_beamform_set_sounding_enter( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; - if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_enter_work_item)) == false) - odm_schedule_work_item(&(p_txbf_info->txbf_enter_work_item)); + if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_enter_work_item)) + odm_schedule_work_item(&p_txbf_info->txbf_enter_work_item); #else hal_com_txbf_enter_work_item_callback(dm); #endif } -void -phydm_beamform_set_sounding_leave( - void *dm_void -) +void phydm_beamform_set_sounding_leave( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; - if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_leave_work_item)) == false) - odm_schedule_work_item(&(p_txbf_info->txbf_leave_work_item)); + if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_leave_work_item)) + odm_schedule_work_item(&p_txbf_info->txbf_leave_work_item); #else hal_com_txbf_leave_work_item_callback(dm); #endif } -void -phydm_beamform_set_sounding_rate( - void *dm_void -) +void phydm_beamform_set_sounding_rate( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; - if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_rate_work_item)) == false) - odm_schedule_work_item(&(p_txbf_info->txbf_rate_work_item)); + if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_rate_work_item)) + odm_schedule_work_item(&p_txbf_info->txbf_rate_work_item); #else hal_com_txbf_rate_work_item_callback(dm); #endif } -void -phydm_beamform_set_sounding_status( - void *dm_void -) +void phydm_beamform_set_sounding_status( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; - if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_status_work_item)) == false) - odm_schedule_work_item(&(p_txbf_info->txbf_status_work_item)); + if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_status_work_item)) + odm_schedule_work_item(&p_txbf_info->txbf_status_work_item); #else hal_com_txbf_status_work_item_callback(dm); #endif } -void -phydm_beamform_set_sounding_fw_ndpa( - void *dm_void -) +void phydm_beamform_set_sounding_fw_ndpa( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; if (*dm->is_fw_dw_rsvd_page_in_progress) - odm_set_timer(dm, &(p_txbf_info->txbf_fw_ndpa_timer), 5); + odm_set_timer(dm, &p_txbf_info->txbf_fw_ndpa_timer, 5); else - odm_schedule_work_item(&(p_txbf_info->txbf_fw_ndpa_work_item)); + odm_schedule_work_item(&p_txbf_info->txbf_fw_ndpa_work_item); #else hal_com_txbf_fw_ndpa_work_item_callback(dm); #endif } -void -phydm_beamform_set_sounding_clk( - void *dm_void -) +void phydm_beamform_set_sounding_clk( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; - if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_clk_work_item)) == false) - odm_schedule_work_item(&(p_txbf_info->txbf_clk_work_item)); + if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_clk_work_item)) + odm_schedule_work_item(&p_txbf_info->txbf_clk_work_item); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - void *padapter = dm->adapter; - - rtw_run_in_thread_cmd(padapter, hal_com_txbf_clk_work_item_callback, dm); + phydm_run_in_thread_cmd(dm, hal_com_txbf_clk_work_item_callback, dm); #else hal_com_txbf_clk_work_item_callback(dm); #endif } -void -phydm_beamform_set_reset_tx_path( - void *dm_void -) +void phydm_beamform_set_reset_tx_path( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct _RT_WORK_ITEM *pwi = &p_txbf_info->txbf_reset_tx_path_work_item; - if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_reset_tx_path_work_item)) == false) - odm_schedule_work_item(&(p_txbf_info->txbf_reset_tx_path_work_item)); + if (!odm_is_work_item_scheduled(pwi)) + odm_schedule_work_item(pwi); #else hal_com_txbf_reset_tx_path_work_item_callback(dm); #endif } -void -phydm_beamform_set_get_tx_rate( - void *dm_void -) +void phydm_beamform_set_get_tx_rate( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct _RT_WORK_ITEM *pwi = &p_txbf_info->txbf_get_tx_rate_work_item; - if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_get_tx_rate_work_item)) == false) - odm_schedule_work_item(&(p_txbf_info->txbf_get_tx_rate_work_item)); + if (!odm_is_work_item_scheduled(pwi)) + odm_schedule_work_item(pwi); #else hal_com_txbf_get_tx_rate_work_item_callback(dm); #endif } -void -hal_com_txbf_enter_work_item_callback( +void hal_com_txbf_enter_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -) + ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; #else - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #endif - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; - u8 idx = p_txbf_info->txbf_idx; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + u8 idx = p_txbf_info->txbf_idx; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -214,24 +194,23 @@ hal_com_txbf_enter_work_item_callback( hal_txbf_8822b_enter(dm, idx); } -void -hal_com_txbf_leave_work_item_callback( +void hal_com_txbf_leave_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -) + ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; #else - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #endif - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; - u8 idx = p_txbf_info->txbf_idx; + u8 idx = p_txbf_info->txbf_idx; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -245,24 +224,22 @@ hal_com_txbf_leave_work_item_callback( hal_txbf_8822b_leave(dm, idx); } - -void -hal_com_txbf_fw_ndpa_work_item_callback( +void hal_com_txbf_fw_ndpa_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -) + ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; #else - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #endif - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; - u8 idx = p_txbf_info->ndpa_idx; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + u8 idx = p_txbf_info->ndpa_idx; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -276,20 +253,19 @@ hal_com_txbf_fw_ndpa_work_item_callback( hal_txbf_8822b_fw_txbf(dm, idx); } -void -hal_com_txbf_clk_work_item_callback( +void hal_com_txbf_clk_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -) + ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; #else - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #endif PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -298,26 +274,23 @@ hal_com_txbf_clk_work_item_callback( hal_txbf_jaguar_clk_8812a(dm); } - - -void -hal_com_txbf_rate_work_item_callback( +void hal_com_txbf_rate_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -) + ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; #else - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #endif - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; - u8 BW = p_txbf_info->BW; - u8 rate = p_txbf_info->rate; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + u8 BW = p_txbf_info->BW; + u8 rate = p_txbf_info->rate; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -327,23 +300,17 @@ hal_com_txbf_rate_work_item_callback( hal_txbf_8192e_set_ndpa_rate(dm, BW, rate); else if (dm->support_ic_type & ODM_RTL8814A) hal_txbf_8814a_set_ndpa_rate(dm, BW, rate); - } - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -hal_com_txbf_fw_ndpa_timer_callback( - struct phydm_timer_list *timer -) +void hal_com_txbf_fw_ndpa_timer_callback( + struct phydm_timer_list *timer) { + void *adapter = (void *)timer->Adapter; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; - void *adapter = (void *)timer->Adapter; - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; - - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; - + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -354,25 +321,23 @@ hal_com_txbf_fw_ndpa_timer_callback( } #endif - -void -hal_com_txbf_status_work_item_callback( +void hal_com_txbf_status_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -) + ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; #else - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #endif - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; - u8 idx = p_txbf_info->txbf_idx; + u8 idx = p_txbf_info->txbf_idx; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -386,61 +351,56 @@ hal_com_txbf_status_work_item_callback( hal_txbf_8822b_status(dm, idx); } -void -hal_com_txbf_reset_tx_path_work_item_callback( +void hal_com_txbf_reset_tx_path_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -) + ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; #else - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #endif - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; - u8 idx = p_txbf_info->txbf_idx; + u8 idx = p_txbf_info->txbf_idx; if (dm->support_ic_type & ODM_RTL8814A) hal_txbf_8814a_reset_tx_path(dm, idx); - } -void -hal_com_txbf_get_tx_rate_work_item_callback( +void hal_com_txbf_get_tx_rate_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -) + ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; #else - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #endif if (dm->support_ic_type & ODM_RTL8814A) hal_txbf_8814a_get_tx_rate(dm); } - boolean hal_com_txbf_set( - void *dm_void, - u8 set_type, - void *p_in_buf -) + void *dm_void, + u8 set_type, + void *p_in_buf) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 *p_u1_tmp = (u8 *)p_in_buf; - struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 *p_u1_tmp = (u8 *)p_in_buf; + struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; PHYDM_DBG(dm, DBG_TXBF, "[%s] set_type = 0x%X\n", __func__, set_type); @@ -483,7 +443,6 @@ hal_com_txbf_set( case TXBF_SET_GET_TX_RATE: phydm_beamform_set_get_tx_rate(dm); break; - } return true; @@ -492,52 +451,62 @@ hal_com_txbf_set( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) boolean hal_com_txbf_get( - void *adapter, - u8 get_type, - void *p_out_buf -) + void *adapter, + u8 get_type, + void *p_out_buf) { - PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; - boolean *p_boolean = (boolean *)p_out_buf; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; + boolean *p_boolean = (boolean *)p_out_buf; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); if (get_type == TXBF_GET_EXPLICIT_BEAMFORMEE) { if (IS_HARDWARE_TYPE_OLDER_THAN_8812A(adapter)) *p_boolean = false; - else if (/*IS_HARDWARE_TYPE_8822B(adapter) ||*/ - IS_HARDWARE_TYPE_8821B(adapter) || - IS_HARDWARE_TYPE_8192E(adapter) || - IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) + else if (/*@IS_HARDWARE_TYPE_8822B(adapter) ||*/ + IS_HARDWARE_TYPE_8821B(adapter) || + IS_HARDWARE_TYPE_8192E(adapter) || + IS_HARDWARE_TYPE_8192F(adapter) || + IS_HARDWARE_TYPE_JAGUAR(adapter) || + IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter) || + IS_HARDWARE_TYPE_JAGUAR3(adapter)) *p_boolean = true; else *p_boolean = false; } else if (get_type == TXBF_GET_EXPLICIT_BEAMFORMER) { if (IS_HARDWARE_TYPE_OLDER_THAN_8812A(adapter)) *p_boolean = false; - else if (/*IS_HARDWARE_TYPE_8822B(adapter) ||*/ - IS_HARDWARE_TYPE_8821B(adapter) || - IS_HARDWARE_TYPE_8192E(adapter) || - IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) { - if (hal_data->RF_Type == RF_2T2R || hal_data->RF_Type == RF_3T3R) + else if (/*@IS_HARDWARE_TYPE_8822B(adapter) ||*/ + IS_HARDWARE_TYPE_8821B(adapter) || + IS_HARDWARE_TYPE_8192E(adapter) || + IS_HARDWARE_TYPE_8192F(adapter) || + IS_HARDWARE_TYPE_JAGUAR(adapter) || + IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter) || + IS_HARDWARE_TYPE_JAGUAR3(adapter)) { + if (hal_data->RF_Type == RF_2T2R || + hal_data->RF_Type == RF_3T3R || + hal_data->RF_Type == RF_4T4R) *p_boolean = true; else *p_boolean = false; } else *p_boolean = false; } else if (get_type == TXBF_GET_MU_MIMO_STA) { -#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1)) - if (IS_HARDWARE_TYPE_8822B(adapter) || IS_HARDWARE_TYPE_8821C(adapter)) +#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) ||\ + (RTL8822C_SUPPORT == 1)) + if (IS_HARDWARE_TYPE_8822B(adapter) || + IS_HARDWARE_TYPE_8821C(adapter) || + IS_HARDWARE_TYPE_JAGUAR3(adapter)) *p_boolean = true; else #endif *p_boolean = false; - } else if (get_type == TXBF_GET_MU_MIMO_AP) { -#if (RTL8822B_SUPPORT == 1) - if (IS_HARDWARE_TYPE_8822B(adapter)) +#if ((RTL8822B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) + if (IS_HARDWARE_TYPE_8822B(adapter) || + IS_HARDWARE_TYPE_JAGUAR3(adapter)) *p_boolean = true; else #endif @@ -548,5 +517,4 @@ hal_com_txbf_get( } #endif - #endif diff --git a/hal/phydm/txbf/halcomtxbf.h b/hal/phydm/txbf/halcomtxbf.h index 2e9e5a0..5ad3033 100644 --- a/hal/phydm/txbf/halcomtxbf.h +++ b/hal/phydm/txbf/halcomtxbf.h @@ -25,7 +25,7 @@ #ifndef __HAL_COM_TXBF_H__ #define __HAL_COM_TXBF_H__ -/* +#if 0 typedef bool (*TXBF_GET)( void* adapter, @@ -39,7 +39,7 @@ typedef bool u8 set_type, void* p_in_buf ); -*/ +#endif enum txbf_set_type { TXBF_SET_SOUNDING_ENTER, @@ -52,7 +52,6 @@ enum txbf_set_type { TXBF_SET_GET_TX_RATE }; - enum txbf_get_type { TXBF_GET_EXPLICIT_BEAMFORMEE, TXBF_GET_EXPLICIT_BEAMFORMER, @@ -60,144 +59,125 @@ enum txbf_get_type { TXBF_GET_MU_MIMO_AP }; - - -/* 2 HAL TXBF related */ +/* @2 HAL TXBF related */ struct _HAL_TXBF_INFO { - u8 txbf_idx; - u8 ndpa_idx; - u8 BW; - u8 rate; + u8 txbf_idx; + u8 ndpa_idx; + u8 BW; + u8 rate; - struct phydm_timer_list txbf_fw_ndpa_timer; + struct phydm_timer_list txbf_fw_ndpa_timer; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - RT_WORK_ITEM txbf_enter_work_item; - RT_WORK_ITEM txbf_leave_work_item; - RT_WORK_ITEM txbf_fw_ndpa_work_item; - RT_WORK_ITEM txbf_clk_work_item; - RT_WORK_ITEM txbf_status_work_item; - RT_WORK_ITEM txbf_rate_work_item; - RT_WORK_ITEM txbf_reset_tx_path_work_item; - RT_WORK_ITEM txbf_get_tx_rate_work_item; + RT_WORK_ITEM txbf_enter_work_item; + RT_WORK_ITEM txbf_leave_work_item; + RT_WORK_ITEM txbf_fw_ndpa_work_item; + RT_WORK_ITEM txbf_clk_work_item; + RT_WORK_ITEM txbf_status_work_item; + RT_WORK_ITEM txbf_rate_work_item; + RT_WORK_ITEM txbf_reset_tx_path_work_item; + RT_WORK_ITEM txbf_get_tx_rate_work_item; #endif - }; -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT -void -hal_com_txbf_beamform_init( - void *dm_void -); +void hal_com_txbf_beamform_init( + void *dm_void); -void -hal_com_txbf_config_gtab( - void *dm_void -); +void hal_com_txbf_config_gtab( + void *dm_void); -void -hal_com_txbf_enter_work_item_callback( +void hal_com_txbf_enter_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -); + ); -void -hal_com_txbf_leave_work_item_callback( +void hal_com_txbf_leave_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -); + ); -void -hal_com_txbf_fw_ndpa_work_item_callback( +void hal_com_txbf_fw_ndpa_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -); + ); -void -hal_com_txbf_clk_work_item_callback( +void hal_com_txbf_clk_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -); + ); -void -hal_com_txbf_reset_tx_path_work_item_callback( +void hal_com_txbf_reset_tx_path_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -); + ); -void -hal_com_txbf_get_tx_rate_work_item_callback( +void hal_com_txbf_get_tx_rate_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -); + ); -void -hal_com_txbf_rate_work_item_callback( +void hal_com_txbf_rate_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -); + ); -void -hal_com_txbf_fw_ndpa_timer_callback( - struct phydm_timer_list *timer -); +void hal_com_txbf_fw_ndpa_timer_callback( + struct phydm_timer_list *timer); -void -hal_com_txbf_status_work_item_callback( +void hal_com_txbf_status_work_item_callback( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - void *adapter + void *adapter #else - void *dm_void + void *dm_void #endif -); + ); boolean hal_com_txbf_set( - void *dm_void, - u8 set_type, - void *p_in_buf -); + void *dm_void, + u8 set_type, + void *p_in_buf); boolean hal_com_txbf_get( - void *adapter, - u8 get_type, - void *p_out_buf -); + void *adapter, + u8 get_type, + void *p_out_buf); #else -#define hal_com_txbf_beamform_init(dm_void) NULL -#define hal_com_txbf_config_gtab(dm_void) NULL -#define hal_com_txbf_enter_work_item_callback(_adapter) NULL -#define hal_com_txbf_leave_work_item_callback(_adapter) NULL -#define hal_com_txbf_fw_ndpa_work_item_callback(_adapter) NULL -#define hal_com_txbf_clk_work_item_callback(_adapter) NULL -#define hal_com_txbf_rate_work_item_callback(_adapter) NULL -#define hal_com_txbf_fw_ndpa_timer_callback(_adapter) NULL -#define hal_com_txbf_status_work_item_callback(_adapter) NULL +#define hal_com_txbf_beamform_init(dm_void) NULL +#define hal_com_txbf_config_gtab(dm_void) NULL +#define hal_com_txbf_enter_work_item_callback(_adapter) NULL +#define hal_com_txbf_leave_work_item_callback(_adapter) NULL +#define hal_com_txbf_fw_ndpa_work_item_callback(_adapter) NULL +#define hal_com_txbf_clk_work_item_callback(_adapter) NULL +#define hal_com_txbf_rate_work_item_callback(_adapter) NULL +#define hal_com_txbf_fw_ndpa_timer_callback(_adapter) NULL +#define hal_com_txbf_status_work_item_callback(_adapter) NULL #define hal_com_txbf_get(_adapter, _get_type, _pout_buf) #endif -#endif /* #ifndef __HAL_COM_TXBF_H__ */ +#endif /* @#ifndef __HAL_COM_TXBF_H__ */ diff --git a/hal/phydm/txbf/haltxbf8192e.c b/hal/phydm/txbf/haltxbf8192e.c index cec2559..daac3e5 100644 --- a/hal/phydm/txbf/haltxbf8192e.c +++ b/hal/phydm/txbf/haltxbf8192e.c @@ -12,38 +12,33 @@ * more details. * *****************************************************************************/ -/* ************************************************************ +/************************************************************* * Description: * * This file is for 8192E TXBF mechanism * - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "../phydm_precomp.h" -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT #if (RTL8192E_SUPPORT == 1) -void -hal_txbf_8192e_set_ndpa_rate( - void *dm_void, - u8 BW, - u8 rate -) +void hal_txbf_8192e_set_ndpa_rate( + void *dm_void, + u8 BW, + u8 rate) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8192E, (rate << 2 | BW)); - } -void -hal_txbf_8192e_rf_mode( - void *dm_void, - struct _RT_BEAMFORMING_INFO *beam_info -) +void hal_txbf_8192e_rf_mode( + void *dm_void, + struct _RT_BEAMFORMING_INFO *beam_info) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -55,46 +50,42 @@ hal_txbf_8192e_rf_mode( if (beam_info->beamformee_su_cnt > 0) { /*Path_A*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*Select RX mode 0x30=0x18000*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f); /*Set Table data*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); /*Select RX mode 0x30=0x18000*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0000f); /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x77fc2); /*@Enable TXIQGEN in RX mode*/ /*Path_B*/ - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0xfffff, 0x18000); /*Select RX mode*/ - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f); /*Set Table data*/ - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); /*Select RX mode*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x0000f); /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x77fc2); /*@Enable TXIQGEN in RX mode*/ } else { /*Path_A*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*Select RX mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f); /*Set Table data*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); /*Select RX mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0000f); /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x77f82); /*@Disable TXIQGEN in RX mode*/ /*Path_B*/ - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0xfffff, 0x18000); /*Select RX mode*/ - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f); /*Set Table data*/ - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); /*Select RX mode*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x0000f); /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x77f82); /*@Disable TXIQGEN in RX mode*/ } - odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/ - odm_set_rf_reg(dm, RF_PATH_B, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/ if (beam_info->beamformee_su_cnt > 0) { - odm_set_bb_reg(dm, 0x90c, MASKDWORD, 0x83321333); - odm_set_bb_reg(dm, 0xa04, MASKBYTE3, 0xc1); + odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x83321333); + odm_set_bb_reg(dm, R_0xa04, MASKBYTE3, 0xc1); } else - odm_set_bb_reg(dm, 0x90c, MASKDWORD, 0x81121313); + odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x81121313); } - - -void -hal_txbf_8192e_fw_txbf_cmd( - void *dm_void -) +void hal_txbf_8192e_fw_txbf_cmd( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 idx, period0 = 0, period1 = 0; - u8 PageNum0 = 0xFF, PageNum1 = 0xFF; - u8 u1_tx_bf_parm[3] = {0}; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 idx, period0 = 0, period1 = 0; + u8 PageNum0 = 0xFF, PageNum1 = 0xFF; + u8 u1_tx_bf_parm[3] = {0}; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { if (beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { @@ -120,24 +111,22 @@ hal_txbf_8192e_fw_txbf_cmd( odm_fill_h2c_cmd(dm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm); PHYDM_DBG(dm, DBG_TXBF, - "[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n", __func__, PageNum0, period0, PageNum1, period1); + "[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n", + __func__, PageNum0, period0, PageNum1, period1); } - -void -hal_txbf_8192e_download_ndpa( - void *dm_void, - u8 idx -) +void hal_txbf_8192e_download_ndpa( + void *dm_void, + u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 u1b_tmp = 0, tmp_reg422 = 0, head_page; - u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0; - boolean is_send_beacon = false; - u8 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; - /*default reseved 1 page for the IC type which is undefined.*/ - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 u1b_tmp = 0, tmp_reg422 = 0, head_page; + u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0; + boolean is_send_beacon = false; + u8 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; + /*@default reseved 1 page for the IC type which is undefined.*/ + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) @@ -151,69 +140,74 @@ hal_txbf_8192e_download_ndpa( phydm_get_hal_def_var_handler_interface(dm, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy); /*Set REG_CR bit 8. DMA beacon by SW.*/ - u1b_tmp = odm_read_1byte(dm, REG_CR_8192E+1); - odm_write_1byte(dm, REG_CR_8192E+1, (u1b_tmp | BIT(0))); + u1b_tmp = odm_read_1byte(dm, REG_CR_8192E + 1); + odm_write_1byte(dm, REG_CR_8192E + 1, (u1b_tmp | BIT(0))); /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ - tmp_reg422 = odm_read_1byte(dm, REG_FWHW_TXQ_CTRL_8192E+2); - odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8192E+2, tmp_reg422 & (~BIT(6))); + tmp_reg422 = odm_read_1byte(dm, REG_FWHW_TXQ_CTRL_8192E + 2); + odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8192E + 2, tmp_reg422 & (~BIT(6))); if (tmp_reg422 & BIT(6)) { - PHYDM_DBG(dm, DBG_TXBF, "%s There is an adapter is sending beacon.\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, + "%s There is an adapter is sending beacon.\n", + __func__); is_send_beacon = true; } /*TDECTRL[15:8] 0x209[7:0] = 0xFE/0xFD NDPA Head for TXDMA*/ - odm_write_1byte(dm, REG_DWBCN0_CTRL_8192E+1, head_page); + odm_write_1byte(dm, REG_DWBCN0_CTRL_8192E + 1, head_page); do { - /*Clear beacon valid check bit.*/ - bcn_valid_reg = odm_read_1byte(dm, REG_DWBCN0_CTRL_8192E+2); - odm_write_1byte(dm, REG_DWBCN0_CTRL_8192E+2, (bcn_valid_reg | BIT(0))); + /*@Clear beacon valid check bit.*/ + bcn_valid_reg = odm_read_1byte(dm, REG_DWBCN0_CTRL_8192E + 2); + odm_write_1byte(dm, REG_DWBCN0_CTRL_8192E + 2, (bcn_valid_reg | BIT(0))); - /* download NDPA rsvd page. */ + /* @download NDPA rsvd page. */ beamforming_send_ht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE); #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) - u1b_tmp = odm_read_1byte(dm, REG_MGQ_TXBD_NUM_8192E+3); - count = 0; - while ((count < 20) && (u1b_tmp & BIT(4))) { - count++; - ODM_delay_us(10); - u1b_tmp = odm_read_1byte(dm, REG_MGQ_TXBD_NUM_8192E+3); + if (dm->support_interface == ODM_ITRF_PCIE) { + u1b_tmp = odm_read_1byte(dm, REG_MGQ_TXBD_NUM_8192E + 3); + count = 0; + while ((count < 20) && (u1b_tmp & BIT(4))) { + count++; + ODM_delay_us(10); + u1b_tmp = odm_read_1byte(dm, REG_MGQ_TXBD_NUM_8192E + 3); + } + odm_write_1byte(dm, REG_MGQ_TXBD_NUM_8192E + 3, u1b_tmp | BIT(4)); } - odm_write_1byte(dm, REG_MGQ_TXBD_NUM_8192E+3, u1b_tmp | BIT(4)); #endif - /*check rsvd page download OK.*/ - bcn_valid_reg = odm_read_1byte(dm, REG_DWBCN0_CTRL_8192E+2); + /*@check rsvd page download OK.*/ + bcn_valid_reg = odm_read_1byte(dm, REG_DWBCN0_CTRL_8192E + 2); count = 0; while (!(bcn_valid_reg & BIT(0)) && count < 20) { count++; ODM_delay_us(10); - bcn_valid_reg = odm_read_1byte(dm, REG_DWBCN0_CTRL_8192E+2); + bcn_valid_reg = odm_read_1byte(dm, REG_DWBCN0_CTRL_8192E + 2); } dl_bcn_count++; } while (!(bcn_valid_reg & BIT(0)) && dl_bcn_count < 5); if (!(bcn_valid_reg & BIT(0))) - PHYDM_DBG(dm, DBG_TXBF, "%s Download RSVD page failed!\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s Download RSVD page failed!\n", + __func__); /*TDECTRL[15:8] 0x209[7:0] = 0xF9 Beacon Head for TXDMA*/ - odm_write_1byte(dm, REG_DWBCN0_CTRL_8192E+1, tx_page_bndy); + odm_write_1byte(dm, REG_DWBCN0_CTRL_8192E + 1, tx_page_bndy); /*To make sure that if there exists an adapter which would like to send beacon.*/ - /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ + /*@If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/ /*the beacon cannot be sent by HW.*/ - /*2010.06.23. Added by tynli.*/ + /*@2010.06.23. Added by tynli.*/ if (is_send_beacon) - odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8192E+2, tmp_reg422); + odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8192E + 2, tmp_reg422); - /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ - /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ - u1b_tmp = odm_read_1byte(dm, REG_CR_8192E+1); - odm_write_1byte(dm, REG_CR_8192E+1, (u1b_tmp & (~BIT(0)))); + /*@Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ + /*@Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ + u1b_tmp = odm_read_1byte(dm, REG_CR_8192E + 1); + odm_write_1byte(dm, REG_CR_8192E + 1, (u1b_tmp & (~BIT(0)))); p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) @@ -221,46 +215,43 @@ hal_txbf_8192e_download_ndpa( #endif } - -void -hal_txbf_8192e_enter( - void *dm_void, - u8 bfer_bfee_idx -) +void hal_txbf_8192e_enter( + void *dm_void, + u8 bfer_bfee_idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i = 0; - u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4; - u8 bfee_idx = (bfer_bfee_idx & 0xF); - u32 csi_param; - struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY beamformee_entry; - struct _RT_BEAMFORMER_ENTRY beamformer_entry; - u16 sta_id = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i = 0; + u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4; + u8 bfee_idx = (bfer_bfee_idx & 0xF); + u32 csi_param; + struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY beamformee_entry; + struct _RT_BEAMFORMER_ENTRY beamformer_entry; + u16 sta_id = 0; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); hal_txbf_8192e_rf_mode(dm, beamforming_info); if (dm->rf_type == RF_2T2R) - odm_write_4byte(dm, 0xd80, 0x00000000); /*nc =2*/ + odm_write_4byte(dm, 0xd80, 0x00000000); /*nc =2*/ - if ((beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) { + if (beamforming_info->beamformer_su_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) { beamformer_entry = beamforming_info->beamformer_entry[bfer_idx]; /*Sounding protocol control*/ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8192E, 0xCB); - /*MAC address/Partial AID of Beamformer*/ + /*@MAC address/Partial AID of Beamformer*/ if (bfer_idx == 0) { - for (i = 0; i < 6 ; i++) - odm_write_1byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8192E+i), beamformer_entry.mac_addr[i]); + for (i = 0; i < 6; i++) + odm_write_1byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8192E + i), beamformer_entry.mac_addr[i]); } else { - for (i = 0; i < 6 ; i++) - odm_write_1byte(dm, (REG_ASSOCIATED_BFMER1_INFO_8192E+i), beamformer_entry.mac_addr[i]); + for (i = 0; i < 6; i++) + odm_write_1byte(dm, (REG_ASSOCIATED_BFMER1_INFO_8192E + i), beamformer_entry.mac_addr[i]); } - /*CSI report parameters of Beamformer Default use nc = 2*/ + /*@CSI report parameters of Beamformer Default use nc = 2*/ csi_param = 0x03090309; odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW20_8192E, csi_param); @@ -268,11 +259,10 @@ hal_txbf_8192e_enter( odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW80_8192E, csi_param); /*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/ - odm_write_1byte(dm, REG_SND_PTCL_CTRL_8192E+3, 0x50); - + odm_write_1byte(dm, REG_SND_PTCL_CTRL_8192E + 3, 0x50); } - if ((beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) { + if (beamforming_info->beamformee_su_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) { beamformee_entry = beamforming_info->beamformee_entry[bfee_idx]; if (phydm_acting_determine(dm, phydm_acting_as_ibss)) @@ -280,44 +270,41 @@ hal_txbf_8192e_enter( else sta_id = beamformee_entry.p_aid; - PHYDM_DBG(dm, DBG_TXBF, "[%s], sta_id=0x%X\n", __func__, sta_id); + PHYDM_DBG(dm, DBG_TXBF, "[%s], sta_id=0x%X\n", __func__, + sta_id); /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ if (bfee_idx == 0) { odm_write_2byte(dm, REG_TXBF_CTRL_8192E, sta_id); - odm_write_1byte(dm, REG_TXBF_CTRL_8192E+3, odm_read_1byte(dm, REG_TXBF_CTRL_8192E+3) | BIT(4) | BIT(6) | BIT(7)); + odm_write_1byte(dm, REG_TXBF_CTRL_8192E + 3, odm_read_1byte(dm, REG_TXBF_CTRL_8192E + 3) | BIT(4) | BIT(6) | BIT(7)); } else - odm_write_2byte(dm, REG_TXBF_CTRL_8192E+2, sta_id | BIT(12) | BIT(14) | BIT(15)); + odm_write_2byte(dm, REG_TXBF_CTRL_8192E + 2, sta_id | BIT(12) | BIT(14) | BIT(15)); - /*CSI report parameters of Beamformee*/ + /*@CSI report parameters of Beamformee*/ if (bfee_idx == 0) { - /*Get BIT24 & BIT25*/ - u8 tmp = odm_read_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E+3) & 0x3; + /*@Get BIT24 & BIT25*/ + u8 tmp = odm_read_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 3) & 0x3; - odm_write_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E+3, tmp | 0x60); + odm_write_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 3, tmp | 0x60); odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E, sta_id | BIT(9)); } else { /*Set BIT25*/ - odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, sta_id | 0xE200); + odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 2, sta_id | 0xE200); } phydm_beamforming_notify(dm); - } } - -void -hal_txbf_8192e_leave( - void *dm_void, - u8 idx -) +void hal_txbf_8192e_leave( + void *dm_void, + u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; hal_txbf_8192e_rf_mode(dm, beam_info); - /* Clear P_AID of Beamformee + /* @Clear P_AID of Beamformee * Clear MAC addresss of Beamformer * Clear Associated Bfmee Sel */ @@ -327,30 +314,27 @@ hal_txbf_8192e_leave( if (idx == 0) { odm_write_2byte(dm, REG_TXBF_CTRL_8192E, 0); odm_write_4byte(dm, REG_ASSOCIATED_BFMER0_INFO_8192E, 0); - odm_write_2byte(dm, REG_ASSOCIATED_BFMER0_INFO_8192E+4, 0); + odm_write_2byte(dm, REG_ASSOCIATED_BFMER0_INFO_8192E + 4, 0); odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E, 0); } else { - odm_write_2byte(dm, REG_TXBF_CTRL_8192E+2, odm_read_1byte(dm, REG_TXBF_CTRL_8192E+2) & 0xF000); + odm_write_2byte(dm, REG_TXBF_CTRL_8192E + 2, odm_read_1byte(dm, REG_TXBF_CTRL_8192E + 2) & 0xF000); odm_write_4byte(dm, REG_ASSOCIATED_BFMER1_INFO_8192E, 0); - odm_write_2byte(dm, REG_ASSOCIATED_BFMER1_INFO_8192E+4, 0); - odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, odm_read_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E+2) & 0x60); + odm_write_2byte(dm, REG_ASSOCIATED_BFMER1_INFO_8192E + 4, 0); + odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 2, odm_read_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 2) & 0x60); } PHYDM_DBG(dm, DBG_TXBF, "[%s] idx %d\n", __func__, idx); } - -void -hal_txbf_8192e_status( - void *dm_void, - u8 idx -) +void hal_txbf_8192e_status( + void *dm_void, + u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u16 beam_ctrl_val; - u32 beam_ctrl_reg; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY beamform_entry = beam_info->beamformee_entry[idx]; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u16 beam_ctrl_val; + u32 beam_ctrl_reg; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY beamform_entry = beam_info->beamformee_entry[idx]; if (phydm_acting_determine(dm, phydm_acting_as_ibss)) beam_ctrl_val = beamform_entry.mac_id; @@ -360,11 +344,11 @@ hal_txbf_8192e_status( if (idx == 0) beam_ctrl_reg = REG_TXBF_CTRL_8192E; else { - beam_ctrl_reg = REG_TXBF_CTRL_8192E+2; + beam_ctrl_reg = REG_TXBF_CTRL_8192E + 2; beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15); } - if ((beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) && (beam_info->apply_v_matrix == true)) { + if (beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED && beam_info->apply_v_matrix == true) { if (beamform_entry.sound_bw == CHANNEL_WIDTH_20) beam_ctrl_val |= BIT(9); else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40) @@ -374,19 +358,18 @@ hal_txbf_8192e_status( odm_write_2byte(dm, beam_ctrl_reg, beam_ctrl_val); - PHYDM_DBG(dm, DBG_TXBF, "[%s] idx %d beam_ctrl_reg %x beam_ctrl_val %x\n", __func__, idx, beam_ctrl_reg, beam_ctrl_val); + PHYDM_DBG(dm, DBG_TXBF, + "[%s] idx %d beam_ctrl_reg %x beam_ctrl_val %x\n", __func__, + idx, beam_ctrl_reg, beam_ctrl_val); } - -void -hal_txbf_8192e_fw_tx_bf( - void *dm_void, - u8 idx -) +void hal_txbf_8192e_fw_tx_bf( + void *dm_void, + u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -396,6 +379,6 @@ hal_txbf_8192e_fw_tx_bf( hal_txbf_8192e_fw_txbf_cmd(dm); } -#endif /* #if (RTL8192E_SUPPORT == 1)*/ +#endif /* @#if (RTL8192E_SUPPORT == 1)*/ #endif diff --git a/hal/phydm/txbf/haltxbf8192e.h b/hal/phydm/txbf/haltxbf8192e.h index 360cbf7..9b0c832 100644 --- a/hal/phydm/txbf/haltxbf8192e.h +++ b/hal/phydm/txbf/haltxbf8192e.h @@ -26,41 +26,28 @@ #define __HAL_TXBF_8192E_H__ #if (RTL8192E_SUPPORT == 1) -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT -void -hal_txbf_8192e_set_ndpa_rate( - void *dm_void, - u8 BW, - u8 rate -); +void hal_txbf_8192e_set_ndpa_rate( + void *dm_void, + u8 BW, + u8 rate); -void -hal_txbf_8192e_enter( - void *dm_void, - u8 idx -); +void hal_txbf_8192e_enter( + void *dm_void, + u8 idx); +void hal_txbf_8192e_leave( + void *dm_void, + u8 idx); -void -hal_txbf_8192e_leave( - void *dm_void, - u8 idx -); +void hal_txbf_8192e_status( + void *dm_void, + u8 idx); - -void -hal_txbf_8192e_status( - void *dm_void, - u8 idx -); - - -void -hal_txbf_8192e_fw_tx_bf( - void *dm_void, - u8 idx -); +void hal_txbf_8192e_fw_tx_bf( + void *dm_void, + u8 idx); #else #define hal_txbf_8192e_set_ndpa_rate(dm_void, BW, rate) diff --git a/hal/phydm/txbf/haltxbf8814a.c b/hal/phydm/txbf/haltxbf8814a.c index 7a4eafb..7ad6ca9 100644 --- a/hal/phydm/txbf/haltxbf8814a.c +++ b/hal/phydm/txbf/haltxbf8814a.c @@ -22,33 +22,31 @@ #include "mp_precomp.h" #include "../phydm_precomp.h" -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT #if (RTL8814A_SUPPORT == 1) boolean -phydm_beamforming_set_iqgen_8814A( - void *dm_void -) +phydm_beamforming_set_iqgen_8814A(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; u8 i = 0; u16 counter = 0; u32 rf_mode[4]; - for (i = RF_PATH_A ; i < MAX_RF_PATH ; i++) - odm_set_rf_reg(dm, i, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/ + for (i = RF_PATH_A; i < MAX_RF_PATH; i++) + odm_set_rf_reg(dm, i, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/ while (1) { counter++; for (i = RF_PATH_A; i < MAX_RF_PATH; i++) - odm_set_rf_reg(dm, i, RF_RCK_OS, 0xfffff, 0x18000); /*Select Rx mode*/ + odm_set_rf_reg(dm, i, RF_RCK_OS, 0xfffff, 0x18000); /*Select Rx mode*/ ODM_delay_us(2); for (i = RF_PATH_A; i < MAX_RF_PATH; i++) rf_mode[i] = odm_get_rf_reg(dm, i, RF_RCK_OS, 0xfffff); - if ((rf_mode[0] == 0x18000) && (rf_mode[1] == 0x18000) && (rf_mode[2] == 0x18000) && (rf_mode[3] == 0x18000)) + if (rf_mode[0] == 0x18000 && rf_mode[1] == 0x18000 && rf_mode[2] == 0x18000 && rf_mode[3] == 0x18000) break; else if (counter == 100) { PHYDM_DBG(dm, DBG_TXBF, "iqgen setting fail:8814A\n"); @@ -56,37 +54,28 @@ phydm_beamforming_set_iqgen_8814A( } } - for (i = RF_PATH_A ; i < MAX_RF_PATH ; i++) { + for (i = RF_PATH_A; i < MAX_RF_PATH; i++) { odm_set_rf_reg(dm, i, RF_TXPA_G1, 0xfffff, 0xBE77F); /*Set Table data*/ - odm_set_rf_reg(dm, i, RF_TXPA_G2, 0xfffff, 0x226BF); /*Enable TXIQGEN in Rx mode*/ + odm_set_rf_reg(dm, i, RF_TXPA_G2, 0xfffff, 0x226BF); /*@Enable TXIQGEN in Rx mode*/ } - odm_set_rf_reg(dm, RF_PATH_A, RF_TXPA_G2, 0xfffff, 0xE26BF); /*Enable TXIQGEN in Rx mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_TXPA_G2, 0xfffff, 0xE26BF); /*@Enable TXIQGEN in Rx mode*/ for (i = RF_PATH_A; i < MAX_RF_PATH; i++) - odm_set_rf_reg(dm, i, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/ + odm_set_rf_reg(dm, i, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/ return true; - } - - -void -hal_txbf_8814a_set_ndpa_rate( - void *dm_void, - u8 BW, - u8 rate -) +void hal_txbf_8814a_set_ndpa_rate(void *dm_void, u8 BW, u8 rate) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8814A, BW); - odm_write_1byte(dm, REG_NDPA_RATE_8814A, (u8) rate); - + odm_write_1byte(dm, REG_NDPA_RATE_8814A, (u8)rate); } #if 0 -#define PHYDM_MEMORY_MAP_BUF_READ 0x8000 -#define PHYDM_CTRL_INFO_PAGE 0x660 +#define PHYDM_MEMORY_MAP_BUF_READ 0x8000 +#define PHYDM_CTRL_INFO_PAGE 0x660 void phydm_data_rate_8814a( @@ -100,65 +89,59 @@ phydm_data_rate_8814a( u16 x_read_data_addr = 0; odm_write_2byte(dm, REG_PKTBUF_DBG_CTRL_8814A, PHYDM_CTRL_INFO_PAGE); - x_read_data_addr = PHYDM_MEMORY_MAP_BUF_READ + mac_id * 32; /*Ctrl Info: 32Bytes for each macid(n)*/ + x_read_data_addr = PHYDM_MEMORY_MAP_BUF_READ + mac_id * 32; /*@Ctrl Info: 32Bytes for each macid(n)*/ - if ((x_read_data_addr < PHYDM_MEMORY_MAP_BUF_READ) || (x_read_data_addr > 0x8FFF)) { - PHYDM_DBG(dm, DBG_TXBF, "x_read_data_addr(0x%x) is not correct!\n", x_read_data_addr); + if (x_read_data_addr < PHYDM_MEMORY_MAP_BUF_READ || x_read_data_addr > 0x8FFF) { + PHYDM_DBG(dm, DBG_TXBF, + "x_read_data_addr(0x%x) is not correct!\n", + x_read_data_addr); return; } /* Read data */ for (i = 0; i < data_len; i++) *(data + i) = odm_read_2byte(dm, x_read_data_addr + i); - } #endif -void -hal_txbf_8814a_get_tx_rate( - void *dm_void -) +void hal_txbf_8814a_get_tx_rate(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY *entry; - struct ra_table *ra_tab = &dm->dm_ra_table; - struct cmn_sta_info *sta = NULL; - u8 data_rate = 0xFF; - u8 macid = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY *entry; + struct ra_table *ra_tab = &dm->dm_ra_table; + struct cmn_sta_info *sta = NULL; + u8 data_rate = 0xFF; + u8 macid = 0; entry = &(beam_info->beamformee_entry[beam_info->beamformee_cur_idx]); macid = (u8)entry->mac_id; sta = dm->phydm_sta_info[macid]; - + if (is_sta_active(sta)) { - - data_rate = (sta->ra_info.curr_tx_rate) & 0x7f; /*Bit7 indicates SGI*/ + data_rate = (sta->ra_info.curr_tx_rate) & 0x7f; /*@Bit7 indicates SGI*/ beam_info->tx_bf_data_rate = data_rate; } - PHYDM_DBG(dm, DBG_TXBF, "[%s] dm->tx_bf_data_rate = 0x%x\n", __func__, beam_info->tx_bf_data_rate); + PHYDM_DBG(dm, DBG_TXBF, "[%s] dm->tx_bf_data_rate = 0x%x\n", __func__, + beam_info->tx_bf_data_rate); } -void -hal_txbf_8814a_reset_tx_path( - void *dm_void, - u8 idx -) +void hal_txbf_8814a_reset_tx_path(void *dm_void, u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; #if DEV_BUS_TYPE == RT_USB_INTERFACE - struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY beamformee_entry; - u8 nr_index = 0, tx_ss = 0; + struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY beamformee_entry; + u8 nr_index = 0, tx_ss = 0; if (idx < BEAMFORMEE_ENTRY_NUM) beamformee_entry = beamforming_info->beamformee_entry[idx]; else return; - if ((beamforming_info->last_usb_hub) != (*dm->hub_usb_mode)) { + if (beamforming_info->last_usb_hub != (*dm->hub_usb_mode)) { nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(dm), beamformee_entry.comp_steering_num_of_bfer); if (*dm->hub_usb_mode == 2) { @@ -168,7 +151,7 @@ hal_txbf_8814a_reset_tx_path( tx_ss = 0xe; else tx_ss = 0x6; - } else if (*dm->hub_usb_mode == 1) /*USB 2.0 always 2Tx*/ + } else if (*dm->hub_usb_mode == 1) /*USB 2.0 always 2Tx*/ tx_ss = 0x6; else tx_ss = 0x6; @@ -189,33 +172,33 @@ hal_txbf_8814a_reset_tx_path( case 0: break; - case 1: /*Nsts = 2 BC*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/ + case 1: /*Nsts = 2 BC*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/ break; - case 2: /*Nsts = 3 BCD*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/ + case 2: /*Nsts = 3 BCD*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/ break; - default: /*nr>3, same as Case 3*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/ + default: /*nr>3, same as Case 3*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/ break; } - } else { + } else { switch (nr_index) { case 0: break; - case 1: /*Nsts = 2 BC*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/ + case 1: /*Nsts = 2 BC*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/ break; - case 2: /*Nsts = 3 BCD*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/ + case 2: /*Nsts = 3 BCD*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/ break; - default: /*nr>3, same as Case 3*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/ + default: /*nr>3, same as Case 3*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/ break; } } @@ -226,14 +209,10 @@ hal_txbf_8814a_reset_tx_path( #endif } - -u8 -hal_txbf_8814a_get_ntx( - void *dm_void -) +u8 hal_txbf_8814a_get_ntx(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 ntx = 0, tx_ss = 3; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 ntx = 0, tx_ss = 3; #if DEV_BUS_TYPE == RT_USB_INTERFACE tx_ss = *dm->hub_usb_mode; @@ -245,7 +224,7 @@ hal_txbf_8814a_get_ntx( ntx = 2; else ntx = 1; - } else if (tx_ss == 1) /*USB 2.0 always 2Tx*/ + } else if (tx_ss == 1) /*USB 2.0 always 2Tx*/ ntx = 1; else ntx = 1; @@ -254,13 +233,10 @@ hal_txbf_8814a_get_ntx( return ntx; } -u8 -hal_txbf_8814a_get_nrx( - void *dm_void -) +u8 hal_txbf_8814a_get_nrx(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 nrx = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 nrx = 0; if (dm->rf_type == RF_4T4R) nrx = 3; @@ -283,17 +259,14 @@ hal_txbf_8814a_get_nrx( return nrx; } -void -hal_txbf_8814a_rf_mode( - void *dm_void, - struct _RT_BEAMFORMING_INFO *beamforming_info, - u8 idx -) +void hal_txbf_8814a_rf_mode(void *dm_void, + struct _RT_BEAMFORMING_INFO *beamforming_info, + u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 nr_index = 0; - u8 tx_ss = 3; /*default use 3 Tx*/ - struct _RT_BEAMFORMEE_ENTRY beamformee_entry; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 nr_index = 0; + u8 tx_ss = 3; /*@default use 3 Tx*/ + struct _RT_BEAMFORMEE_ENTRY beamformee_entry; if (idx < BEAMFORMEE_ENTRY_NUM) beamformee_entry = beamforming_info->beamformee_entry[idx]; @@ -317,7 +290,7 @@ hal_txbf_8814a_rf_mode( tx_ss = 0xe; else tx_ss = 0x6; - } else if (tx_ss == 1) /*USB 2.0 always 2Tx*/ + } else if (tx_ss == 1) /*USB 2.0 always 2Tx*/ tx_ss = 0x6; else tx_ss = 0x6; @@ -333,25 +306,25 @@ hal_txbf_8814a_rf_mode( odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8814A, MASKLWORD, 0x9360); } - /*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT(28) | BIT29, 0x2); /*enable BB TxBF ant mapping register*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT30, 0x1); /*if Nsts > Nc don't apply V matrix*/ + /*@for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT(28) | BIT29, 0x2); /*@enable BB TxBF ant mapping register*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT30, 0x1); /*@if Nsts > Nc don't apply V matrix*/ if (idx == 0) { switch (nr_index) { case 0: break; - case 1: /*Nsts = 2 BC*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/ + case 1: /*Nsts = 2 BC*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/ break; - case 2: /*Nsts = 3 BCD*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/ + case 2: /*Nsts = 3 BCD*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/ break; - default: /*nr>3, same as Case 3*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/ + default: /*nr>3, same as Case 3*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/ break; } @@ -360,23 +333,23 @@ hal_txbf_8814a_rf_mode( case 0: break; - case 1: /*Nsts = 2 BC*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/ + case 1: /*Nsts = 2 BC*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/ break; - case 2: /*Nsts = 3 BCD*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/ + case 2: /*Nsts = 3 BCD*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/ break; - default: /*nr>3, same as Case 3*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/ + default: /*nr>3, same as Case 3*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/ break; } } } - if ((beamforming_info->beamformee_su_cnt == 0) && (beamforming_info->beamformer_su_cnt == 0)) { - odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x932); /*set tx_path selection for 8814a BFer bug refine*/ + if (beamforming_info->beamformee_su_cnt == 0 && beamforming_info->beamformer_su_cnt == 0) { + odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x932); /*set tx_path selection for 8814a BFer bug refine*/ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e9360); } } @@ -392,7 +365,7 @@ hal_txbf_8814a_download_ndpa( u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0; u16 head_page = 0x7FE; boolean is_send_beacon = false; - u16 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/ + u16 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*@default reseved 1 page for the IC type which is undefined.*/ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; void *adapter = dm->adapter; @@ -414,25 +387,27 @@ hal_txbf_8814a_download_ndpa( odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422 & (~BIT(6))); if (tmp_reg422 & BIT(6)) { - PHYDM_DBG(dm, DBG_TXBF, "%s: There is an adapter is sending beacon.\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, + "%s: There is an adapter is sending beacon.\n", + __func__); is_send_beacon = true; } - /*0x204[11:0] Beacon Head for TXDMA*/ + /*@0x204[11:0] Beacon Head for TXDMA*/ odm_write_2byte(dm, REG_FIFOPAGE_CTRL_2_8814A, head_page); do { - /*Clear beacon valid check bit.*/ + /*@Clear beacon valid check bit.*/ bcn_valid_reg = odm_read_1byte(dm, REG_FIFOPAGE_CTRL_2_8814A + 1); odm_write_1byte(dm, REG_FIFOPAGE_CTRL_2_8814A + 1, (bcn_valid_reg | BIT(7))); - /*download NDPA rsvd page.*/ + /*@download NDPA rsvd page.*/ if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU) beamforming_send_vht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->AID, p_beam_entry->sound_bw, BEACON_QUEUE); else beamforming_send_ht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE); - /*check rsvd page download OK.*/ + /*@check rsvd page download OK.*/ bcn_valid_reg = odm_read_1byte(dm, REG_FIFOPAGE_CTRL_2_8814A + 1); count = 0; while (!(bcn_valid_reg & BIT(7)) && count < 20) { @@ -444,21 +419,22 @@ hal_txbf_8814a_download_ndpa( } while (!(bcn_valid_reg & BIT(7)) && dl_bcn_count < 5); if (!(bcn_valid_reg & BIT(7))) - PHYDM_DBG(dm, DBG_TXBF, "%s Download RSVD page failed!\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s Download RSVD page failed!\n", + __func__); - /*0x204[11:0] Beacon Head for TXDMA*/ + /*@0x204[11:0] Beacon Head for TXDMA*/ odm_write_2byte(dm, REG_FIFOPAGE_CTRL_2_8814A, tx_page_bndy); /*To make sure that if there exists an adapter which would like to send beacon.*/ - /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ + /*@If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ /*the beacon cannot be sent by HW.*/ - /*2010.06.23. Added by tynli.*/ + /*@2010.06.23. Added by tynli.*/ if (is_send_beacon) odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422); - /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ - /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ + /*@Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ + /*@Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ u1b_tmp = odm_read_1byte(dm, REG_CR_8814A + 1); odm_write_1byte(dm, REG_CR_8814A + 1, (u1b_tmp & (~BIT(0)))); @@ -499,49 +475,47 @@ hal_txbf_8814a_fw_txbf_cmd( odm_fill_h2c_cmd(dm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm); PHYDM_DBG(dm, DBG_TXBF, - "[%s] PageNum0 = %d, PageNum1 = %d period = %d\n", __func__, PageNum0, PageNum1, period); + "[%s] PageNum0 = %d, PageNum1 = %d period = %d\n", __func__, + PageNum0, PageNum1, period); } #endif -void -hal_txbf_8814a_enter( - void *dm_void, - u8 bfer_bfee_idx -) +void hal_txbf_8814a_enter(void *dm_void, u8 bfer_bfee_idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i = 0; - u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4; - u8 bfee_idx = (bfer_bfee_idx & 0xF); - struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY beamformee_entry; - struct _RT_BEAMFORMER_ENTRY beamformer_entry; - u16 sta_id = 0, csi_param = 0; - u8 nc_index = 0, nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i = 0; + u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4; + u8 bfee_idx = (bfer_bfee_idx & 0xF); + struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY beamformee_entry; + struct _RT_BEAMFORMER_ENTRY beamformer_entry; + u16 sta_id = 0, csi_param = 0; + u8 nc_index = 0, nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0; - PHYDM_DBG(dm, DBG_TXBF, "[%s] bfer_idx=%d, bfee_idx=%d\n", __func__, bfer_idx, bfee_idx); + PHYDM_DBG(dm, DBG_TXBF, "[%s] bfer_idx=%d, bfee_idx=%d\n", __func__, + bfer_idx, bfee_idx); odm_set_mac_reg(dm, REG_SND_PTCL_CTRL_8814A, MASKBYTE1 | MASKBYTE2, 0x0202); - if ((beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) { + if (beamforming_info->beamformer_su_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) { beamformer_entry = beamforming_info->beamformer_entry[bfer_idx]; /*Sounding protocol control*/ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8814A, 0xDB); - /*MAC address/Partial AID of Beamformer*/ + /*@MAC address/Partial AID of Beamformer*/ if (bfer_idx == 0) { - for (i = 0; i < 6 ; i++) + for (i = 0; i < 6; i++) odm_write_1byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8814A + i), beamformer_entry.mac_addr[i]); } else { - for (i = 0; i < 6 ; i++) + for (i = 0; i < 6; i++) odm_write_1byte(dm, (REG_ASSOCIATED_BFMER1_INFO_8814A + i), beamformer_entry.mac_addr[i]); } - /*CSI report parameters of Beamformer*/ - nc_index = hal_txbf_8814a_get_nrx(dm); /*for 8814A nrx = 3(4 ant), min=0(1 ant)*/ - nr_index = beamformer_entry.num_of_sounding_dim; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/ + /*@CSI report parameters of Beamformer*/ + nc_index = hal_txbf_8814a_get_nrx(dm); /*@for 8814A nrx = 3(4 ant), min=0(1 ant)*/ + nr_index = beamformer_entry.num_of_sounding_dim; /*@0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/ grouping = 0; - /*for ac = 1, for n = 3*/ + /*@for ac = 1, for n = 3*/ if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU) codebookinfo = 1; else if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT) @@ -557,10 +531,9 @@ hal_txbf_8814a_enter( odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW20_8814A + 2, csi_param); /*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8814A + 3, 0x40); - } - if ((beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) { + if (beamforming_info->beamformee_su_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) { beamformee_entry = beamforming_info->beamformee_entry[bfee_idx]; hal_txbf_8814a_rf_mode(dm, beamforming_info, bfee_idx); @@ -577,32 +550,26 @@ hal_txbf_8814a_enter( } else odm_write_2byte(dm, REG_TXBF_CTRL_8814A + 2, sta_id | BIT(14) | BIT(15) | BIT(12)); - /*CSI report parameters of Beamformee*/ + /*@CSI report parameters of Beamformee*/ if (bfee_idx == 0) { - /*Get BIT24 & BIT25*/ - u8 tmp = odm_read_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3) & 0x3; + /*@Get BIT24 & BIT25*/ + u8 tmp = odm_read_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3) & 0x3; odm_write_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3, tmp | 0x60); odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A, sta_id | BIT(9)); } else - odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, sta_id | 0xE200); /*Set BIT25*/ + odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, sta_id | 0xE200); /*Set BIT25*/ phydm_beamforming_notify(dm); } - } - -void -hal_txbf_8814a_leave( - void *dm_void, - u8 idx -) +void hal_txbf_8814a_leave(void *dm_void, u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; - struct _RT_BEAMFORMER_ENTRY beamformer_entry; - struct _RT_BEAMFORMEE_ENTRY beamformee_entry; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; + struct _RT_BEAMFORMER_ENTRY beamformer_entry; + struct _RT_BEAMFORMEE_ENTRY beamformee_entry; if (idx < BEAMFORMER_ENTRY_NUM) { beamformer_entry = beamforming_info->beamformer_entry[idx]; @@ -610,9 +577,9 @@ hal_txbf_8814a_leave( } else return; - /*Clear P_AID of Beamformee*/ - /*Clear MAC address of Beamformer*/ - /*Clear Associated Bfmee Sel*/ + /*@Clear P_AID of Beamformee*/ + /*@Clear MAC address of Beamformer*/ + /*@Clear Associated Bfmee Sel*/ if (beamformer_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) { odm_write_1byte(dm, REG_SND_PTCL_CTRL_8814A, 0xD8); @@ -641,17 +608,13 @@ hal_txbf_8814a_leave( } } -void -hal_txbf_8814a_status( - void *dm_void, - u8 idx -) +void hal_txbf_8814a_status(void *dm_void, u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u16 beam_ctrl_val, tmp_val; - u32 beam_ctrl_reg; - struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY beamform_entry; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u16 beam_ctrl_val, tmp_val; + u32 beam_ctrl_reg; + struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY beamform_entry; if (idx < BEAMFORMEE_ENTRY_NUM) beamform_entry = beamforming_info->beamformee_entry[idx]; @@ -663,7 +626,8 @@ hal_txbf_8814a_status( else beam_ctrl_val = beamform_entry.p_aid; - PHYDM_DBG(dm, DBG_TXBF, "@%s, beamform_entry.beamform_entry_state = %d", __func__, beamform_entry.beamform_entry_state); + PHYDM_DBG(dm, DBG_TXBF, "@%s, beamform_entry.beamform_entry_state = %d", + __func__, beamform_entry.beamform_entry_state); if (idx == 0) beam_ctrl_reg = REG_TXBF_CTRL_8814A; @@ -672,7 +636,7 @@ hal_txbf_8814a_status( beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15); } - if ((beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) && (beamforming_info->apply_v_matrix == true)) { + if (beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED && beamforming_info->apply_v_matrix == true) { if (beamform_entry.sound_bw == CHANNEL_WIDTH_20) beam_ctrl_val |= BIT(9); else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40) @@ -680,26 +644,17 @@ hal_txbf_8814a_status( else if (beamform_entry.sound_bw == CHANNEL_WIDTH_80) beam_ctrl_val |= (BIT(9) | BIT(10) | BIT(11)); } else { - PHYDM_DBG(dm, DBG_TXBF, "@%s, Don't apply Vmatrix", __func__); + PHYDM_DBG(dm, DBG_TXBF, "@%s, Don't apply Vmatrix", __func__); beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11)); } odm_write_2byte(dm, beam_ctrl_reg, beam_ctrl_val); - /*disable NDP packet use beamforming */ + /*@disable NDP packet use beamforming */ tmp_val = odm_read_2byte(dm, REG_TXBF_CTRL_8814A); odm_write_2byte(dm, REG_TXBF_CTRL_8814A, tmp_val | BIT(15)); - } - - - - -void -hal_txbf_8814a_fw_txbf( - void *dm_void, - u8 idx -) +void hal_txbf_8814a_fw_txbf(void *dm_void, u8 idx) { #if 0 struct dm_struct *dm = (struct dm_struct *)dm_void; @@ -715,6 +670,6 @@ hal_txbf_8814a_fw_txbf( #endif } -#endif /* (RTL8814A_SUPPORT == 1)*/ +#endif /* @(RTL8814A_SUPPORT == 1)*/ #endif diff --git a/hal/phydm/txbf/haltxbf8814a.h b/hal/phydm/txbf/haltxbf8814a.h index 2612ad2..61b33bb 100644 --- a/hal/phydm/txbf/haltxbf8814a.h +++ b/hal/phydm/txbf/haltxbf8814a.h @@ -26,88 +26,52 @@ #define __HAL_TXBF_8814A_H__ #if (RTL8814A_SUPPORT == 1) -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT boolean -phydm_beamforming_set_iqgen_8814A( - void *dm_void -); +phydm_beamforming_set_iqgen_8814A(void *dm_void); -void -hal_txbf_8814a_set_ndpa_rate( - void *dm_void, - u8 BW, - u8 rate -); +void hal_txbf_8814a_set_ndpa_rate(void *dm_void, u8 BW, u8 rate); -u8 -hal_txbf_8814a_get_ntx( - void *dm_void -); +u8 hal_txbf_8814a_get_ntx(void *dm_void); -void -hal_txbf_8814a_enter( - void *dm_void, - u8 idx -); +void hal_txbf_8814a_enter(void *dm_void, u8 idx); +void hal_txbf_8814a_leave(void *dm_void, u8 idx); -void -hal_txbf_8814a_leave( - void *dm_void, - u8 idx -); +void hal_txbf_8814a_status(void *dm_void, u8 idx); +void hal_txbf_8814a_reset_tx_path(void *dm_void, u8 idx); -void -hal_txbf_8814a_status( - void *dm_void, - u8 idx -); +void hal_txbf_8814a_get_tx_rate(void *dm_void); -void -hal_txbf_8814a_reset_tx_path( - void *dm_void, - u8 idx -); - - -void -hal_txbf_8814a_get_tx_rate( - void *dm_void -); - -void -hal_txbf_8814a_fw_txbf( - void *dm_void, - u8 idx -); +void hal_txbf_8814a_fw_txbf(void *dm_void, u8 idx); #else -#define hal_txbf_8814a_set_ndpa_rate(dm_void, BW, rate) +#define hal_txbf_8814a_set_ndpa_rate(dm_void, BW, rate) #define hal_txbf_8814a_get_ntx(dm_void) 0 #define hal_txbf_8814a_enter(dm_void, idx) #define hal_txbf_8814a_leave(dm_void, idx) #define hal_txbf_8814a_status(dm_void, idx) -#define hal_txbf_8814a_reset_tx_path(dm_void, idx) +#define hal_txbf_8814a_reset_tx_path(dm_void, idx) #define hal_txbf_8814a_get_tx_rate(dm_void) -#define hal_txbf_8814a_fw_txbf(dm_void, idx) -#define phydm_beamforming_set_iqgen_8814A(dm_void) 0 +#define hal_txbf_8814a_fw_txbf(dm_void, idx) +#define phydm_beamforming_set_iqgen_8814A(dm_void) 0 #endif #else -#define hal_txbf_8814a_set_ndpa_rate(dm_void, BW, rate) +#define hal_txbf_8814a_set_ndpa_rate(dm_void, BW, rate) #define hal_txbf_8814a_get_ntx(dm_void) 0 #define hal_txbf_8814a_enter(dm_void, idx) #define hal_txbf_8814a_leave(dm_void, idx) #define hal_txbf_8814a_status(dm_void, idx) -#define hal_txbf_8814a_reset_tx_path(dm_void, idx) +#define hal_txbf_8814a_reset_tx_path(dm_void, idx) #define hal_txbf_8814a_get_tx_rate(dm_void) -#define hal_txbf_8814a_fw_txbf(dm_void, idx) -#define phydm_beamforming_set_iqgen_8814A(dm_void) 0 +#define hal_txbf_8814a_fw_txbf(dm_void, idx) +#define phydm_beamforming_set_iqgen_8814A(dm_void) 0 #endif #endif diff --git a/hal/phydm/txbf/haltxbf8822b.c b/hal/phydm/txbf/haltxbf8822b.c index 75e08b5..f25912a 100644 --- a/hal/phydm/txbf/haltxbf8822b.c +++ b/hal/phydm/txbf/haltxbf8822b.c @@ -12,37 +12,35 @@ * more details. * *****************************************************************************/ -/*============================================================*/ -/* Description: */ -/* */ +/*@============================================================*/ +/* @Description: */ +/* @*/ /* This file is for 8814A TXBF mechanism */ -/* */ -/*============================================================*/ +/* @*/ +/*@============================================================*/ #include "mp_precomp.h" #include "phydm_precomp.h" #if (RTL8822B_SUPPORT == 1) -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT -u8 -hal_txbf_8822b_get_ntx( - void *dm_void -) +u8 hal_txbf_8822b_get_ntx( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 ntx = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 ntx = 0; #if DEV_BUS_TYPE == RT_USB_INTERFACE if (dm->support_interface == ODM_ITRF_USB) { - if (*dm->hub_usb_mode == 2) {/*USB3.0*/ + if (*dm->hub_usb_mode == 2) { /*USB3.0*/ if (dm->rf_type == RF_4T4R) ntx = 3; else if (dm->rf_type == RF_3T3R) ntx = 2; else ntx = 1; - } else if (*dm->hub_usb_mode == 1) /*USB 2.0 always 2Tx*/ + } else if (*dm->hub_usb_mode == 1) /*USB 2.0 always 2Tx*/ ntx = 1; else ntx = 1; @@ -58,16 +56,13 @@ hal_txbf_8822b_get_ntx( } return ntx; - } -u8 -hal_txbf_8822b_get_nrx( - void *dm_void -) +u8 hal_txbf_8822b_get_nrx( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 nrx = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 nrx = 0; if (dm->rf_type == RF_4T4R) nrx = 3; @@ -87,16 +82,13 @@ hal_txbf_8822b_get_nrx( nrx = 0; return nrx; - } /***************SU & MU BFee Entry********************/ -void -hal_txbf_8822b_rf_mode( - void *dm_void, - struct _RT_BEAMFORMING_INFO *beamforming_info, - u8 idx -) +void hal_txbf_8822b_rf_mode( + void *dm_void, + struct _RT_BEAMFORMING_INFO *beamforming_info, + u8 idx) { #if 0 struct dm_struct *dm = (struct dm_struct *)dm_void; @@ -118,17 +110,17 @@ hal_txbf_8822b_rf_mode( /*RF mode table write enable*/ } - if ((beamforming_info->beamformee_su_cnt > 0) || (beamforming_info->beamformee_mu_cnt > 0)) { + if (beamforming_info->beamformee_su_cnt > 0 || beamforming_info->beamformee_mu_cnt > 0) { for (i = RF_PATH_A; i < RF_PATH_B; i++) { odm_set_rf_reg(dm, (enum rf_path)i, rf_mode_table_addr, 0xfffff, 0x18000); /*Select RX mode*/ odm_set_rf_reg(dm, (enum rf_path)i, rf_mode_table_data0, 0xfffff, 0xBE77F); /*Set Table data*/ odm_set_rf_reg(dm, (enum rf_path)i, rf_mode_table_data1, 0xfffff, 0x226BF); - /*Enable TXIQGEN in RX mode*/ + /*@Enable TXIQGEN in RX mode*/ } odm_set_rf_reg(dm, RF_PATH_A, rf_mode_table_data1, 0xfffff, 0xE26BF); - /*Enable TXIQGEN in RX mode*/ + /*@Enable TXIQGEN in RX mode*/ } for (i = RF_PATH_A; i < RF_PATH_B; i++) { @@ -137,9 +129,8 @@ hal_txbf_8822b_rf_mode( } if (beamforming_info->beamformee_su_cnt > 0) { - - /*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x2); /*enable BB TxBF ant mapping register*/ + /*@for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x2); /*@enable BB TxBF ant mapping register*/ if (idx == 0) { /*Nsts = 2 AB*/ @@ -147,18 +138,18 @@ hal_txbf_8822b_rf_mode( odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043); /*odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2, MASKLWORD, 0x430);*/ - } else {/*IDX =1*/ + } else {/*@IDX =1*/ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433); odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043); /*odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2, MASKLWORD, 0x430;*/ } } else { - odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x1); /*1SS by path-A*/ - odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8822B, MASKLWORD, 0x430); /*2SS by path-A,B*/ + odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x1); /*@1SS by path-A*/ + odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8822B, MASKLWORD, 0x430); /*@2SS by path-A,B*/ } if (beamforming_info->beamformee_mu_cnt > 0) { - /*MU STAs share the common setting*/ + /*@MU STAs share the common setting*/ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 1); odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433); odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043); @@ -177,7 +168,7 @@ hal_txbf_8822b_download_ndpa( u16 head_page = 0x7FE; boolean is_send_beacon = false; HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); - u16 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/ + u16 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*@default reseved 1 page for the IC type which is undefined.*/ struct _RT_BEAMFORMING_INFO *beam_info = GET_BEAMFORM_INFO(adapter); struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; @@ -198,21 +189,21 @@ hal_txbf_8822b_download_ndpa( is_send_beacon = true; } - /*0x204[11:0] Beacon Head for TXDMA*/ + /*@0x204[11:0] Beacon Head for TXDMA*/ platform_efio_write_2byte(adapter, REG_FIFOPAGE_CTRL_2_8814A, head_page); do { - /*Clear beacon valid check bit.*/ + /*@Clear beacon valid check bit.*/ bcn_valid_reg = platform_efio_read_1byte(adapter, REG_FIFOPAGE_CTRL_2_8814A + 1); platform_efio_write_1byte(adapter, REG_FIFOPAGE_CTRL_2_8814A + 1, (bcn_valid_reg | BIT(7))); - /*download NDPA rsvd page.*/ + /*@download NDPA rsvd page.*/ if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU) beamforming_send_vht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->AID, p_beam_entry->sound_bw, BEACON_QUEUE); else beamforming_send_ht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE); - /*check rsvd page download OK.*/ + /*@check rsvd page download OK.*/ bcn_valid_reg = platform_efio_read_1byte(adapter, REG_FIFOPAGE_CTRL_2_8814A + 1); count = 0; while (!(bcn_valid_reg & BIT(7)) && count < 20) { @@ -226,19 +217,19 @@ hal_txbf_8822b_download_ndpa( if (!(bcn_valid_reg & BIT(0))) RT_DISP(FBEAM, FBEAM_ERROR, ("%s Download RSVD page failed!\n", __func__)); - /*0x204[11:0] Beacon Head for TXDMA*/ + /*@0x204[11:0] Beacon Head for TXDMA*/ platform_efio_write_2byte(adapter, REG_FIFOPAGE_CTRL_2_8814A, tx_page_bndy); /*To make sure that if there exists an adapter which would like to send beacon.*/ - /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ + /*@If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ /*the beacon cannot be sent by HW.*/ - /*2010.06.23. Added by tynli.*/ + /*@2010.06.23. Added by tynli.*/ if (is_send_beacon) platform_efio_write_1byte(adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422); - /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ - /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ + /*@Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ + /*@Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ u1b_tmp = platform_efio_read_1byte(adapter, REG_CR_8814A + 1); platform_efio_write_1byte(adapter, REG_CR_8814A + 1, (u1b_tmp & (~BIT(0)))); @@ -292,73 +283,72 @@ hal_txbf_8822b_init( struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; void *adapter = dm->adapter; - odm_set_bb_reg(dm, 0x14c0, BIT(16), 1); /*Enable P1 aggr new packet according to P0 transfer time*/ - odm_set_bb_reg(dm, 0x14c0, BIT(15) | BIT14 | BIT13 | BIT12, 10); /*MU Retry Limit*/ - odm_set_bb_reg(dm, 0x14c0, BIT(7), 0); /*Disable Tx MU-MIMO until sounding done*/ - odm_set_bb_reg(dm, 0x14c0, 0x3F, 0); /* Clear validity of MU STAs */ - odm_write_1byte(dm, 0x167c, 0x70); /*MU-MIMO Option as default value*/ - odm_write_2byte(dm, 0x1680, 0); /*MU-MIMO Control as default value*/ + odm_set_bb_reg(dm, R_0x14c0, BIT(16), 1); /*@Enable P1 aggr new packet according to P0 transfer time*/ + odm_set_bb_reg(dm, R_0x14c0, BIT(15) | BIT14 | BIT13 | BIT12, 10); /*@MU Retry Limit*/ + odm_set_bb_reg(dm, R_0x14c0, BIT(7), 0); /*@Disable Tx MU-MIMO until sounding done*/ + odm_set_bb_reg(dm, R_0x14c0, 0x3F, 0); /* @Clear validity of MU STAs */ + odm_write_1byte(dm, 0x167c, 0x70); /*@MU-MIMO Option as default value*/ + odm_write_2byte(dm, 0x1680, 0); /*@MU-MIMO Control as default value*/ /* Set MU NDPA rate & BW source */ - /* 0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */ + /* @0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */ u1b_tmp = odm_read_1byte(dm, 0x42C); odm_write_1byte(dm, REG_TXBF_CTRL_8822B, (u1b_tmp | BIT(6))); - /* 0x45F[7:0] = 0x10 (rate=OFDM_6M, BW20) */ + /* @0x45F[7:0] = 0x10 (rate=OFDM_6M, BW20) */ odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8822B, 0x10); /*Temp Settings*/ - odm_set_bb_reg(dm, 0x6DC, 0x3F000000, 4); /*STA2's CSI rate is fixed at 6M*/ - odm_set_bb_reg(dm, 0x1C94, MASKDWORD, 0xAFFFAFFF); /*Grouping bitmap parameters*/ + odm_set_bb_reg(dm, R_0x6dc, 0x3F000000, 4); /*STA2's CSI rate is fixed at 6M*/ + odm_set_bb_reg(dm, R_0x1c94, MASKDWORD, 0xAFFFAFFF); /*@Grouping bitmap parameters*/ - /* Init HW variable */ + /* @Init HW variable */ beamforming_info->reg_mu_tx_ctrl = odm_read_4byte(dm, 0x14c0); - if (dm->rf_type == RF_2T2R) { /*2T2R*/ + if (dm->rf_type == RF_2T2R) { /*@2T2R*/ PHYDM_DBG(dm, DBG_TXBF, "%s: rf_type is 2T2R\n", __func__); config_phydm_trx_mode_8822b(dm, (enum bb_path)3, (enum bb_path)3, true);/*Tx2path*/ } #if (OMNIPEEK_SNIFFER_ENABLED == 1) - /* Config HW to receive packet on the user position from registry for sniffer mode. */ - /* odm_set_bb_reg(dm, 0xB00, BIT(9), 1);*/ /* For A-cut only. RegB00[9] = 1 (enable PMAC Rx) */ - odm_set_bb_reg(dm, 0xB54, BIT(30), 1); /* RegB54[30] = 1 (force user position) */ - odm_set_bb_reg(dm, 0xB54, (BIT(29) | BIT28), adapter->MgntInfo.sniff_user_position); /* RegB54[29:28] = user position (0~3) */ - PHYDM_DBG(dm, DBG_TXBF, "Set adapter->MgntInfo.sniff_user_position=%#X\n", adapter->MgntInfo.sniff_user_position); + /* @Config HW to receive packet on the user position from registry for sniffer mode. */ + /* odm_set_bb_reg(dm, R_0xb00, BIT(9), 1);*/ /* For A-cut only. RegB00[9] = 1 (enable PMAC Rx) */ + odm_set_bb_reg(dm, R_0xb54, BIT(30), 1); /* RegB54[30] = 1 (force user position) */ + odm_set_bb_reg(dm, R_0xb54, (BIT(29) | BIT28), adapter->MgntInfo.sniff_user_position); /* RegB54[29:28] = user position (0~3) */ + PHYDM_DBG(dm, DBG_TXBF, + "Set adapter->MgntInfo.sniff_user_position=%#X\n", + adapter->MgntInfo.sniff_user_position); #endif } #endif -void -hal_txbf_8822b_enter( - void *dm_void, - u8 bfer_bfee_idx -) +void hal_txbf_8822b_enter( + void *dm_void, + u8 bfer_bfee_idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i = 0; - u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4; - u8 bfee_idx = (bfer_bfee_idx & 0xF); - u16 csi_param = 0; - struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY *p_beamformee_entry; - struct _RT_BEAMFORMER_ENTRY *beamformer_entry; - u16 value16, sta_id = 0; - u8 nc_index = 0, nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0; - u32 gid_valid, user_position_l, user_position_h; - u32 mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e}; - u8 u1b_tmp; - u32 u4b_tmp; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i = 0; + u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4; + u8 bfee_idx = (bfer_bfee_idx & 0xF); + u16 csi_param = 0; + struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY *p_beamformee_entry; + struct _RT_BEAMFORMER_ENTRY *beamformer_entry; + u16 value16, sta_id = 0; + u8 nc_index = 0, nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0; + u32 gid_valid, user_position_l, user_position_h; + u32 mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e}; + u8 u1b_tmp; + u32 u4b_tmp; RT_DISP(FBEAM, FBEAM_FUN, ("%s: bfer_bfee_idx=%d, bfer_idx=%d, bfee_idx=%d\n", __func__, bfer_bfee_idx, bfer_idx, bfee_idx)); /*************SU BFer Entry Init*************/ - if ((beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) { + if (beamforming_info->beamformer_su_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) { beamformer_entry = &beamforming_info->beamformer_entry[bfer_idx]; beamformer_entry->is_mu_ap = false; /*Sounding protocol control*/ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B, 0xDB); - for (i = 0; i < MAX_BEAMFORMER_SU; i++) { if ((beamforming_info->beamformer_su_reg_maping & BIT(i)) == 0) { beamforming_info->beamformer_su_reg_maping |= BIT(i); @@ -367,22 +357,22 @@ hal_txbf_8822b_enter( } } - /*MAC address/Partial AID of Beamformer*/ + /*@MAC address/Partial AID of Beamformer*/ if (beamformer_entry->su_reg_index == 0) { - for (i = 0; i < 6 ; i++) + for (i = 0; i < 6; i++) odm_write_1byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8822B + i), beamformer_entry->mac_addr[i]); } else { - for (i = 0; i < 6 ; i++) + for (i = 0; i < 6; i++) odm_write_1byte(dm, (REG_ASSOCIATED_BFMER1_INFO_8822B + i), beamformer_entry->mac_addr[i]); } - /*CSI report parameters of Beamformer*/ - nc_index = hal_txbf_8822b_get_nrx(dm); /*for 8814A nrx = 3(4 ant), min=0(1 ant)*/ - nr_index = beamformer_entry->num_of_sounding_dim; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/ + /*@CSI report parameters of Beamformer*/ + nc_index = hal_txbf_8822b_get_nrx(dm); /*@for 8814A nrx = 3(4 ant), min=0(1 ant)*/ + nr_index = beamformer_entry->num_of_sounding_dim; /*@0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/ grouping = 0; - /*for ac = 1, for n = 3*/ + /*@for ac = 1, for n = 3*/ if (beamformer_entry->beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU) codebookinfo = 1; else if (beamformer_entry->beamform_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT) @@ -398,11 +388,10 @@ hal_txbf_8822b_enter( odm_write_2byte(dm, REG_TX_CSI_RPT_PARAM_BW20_8822B + 2, csi_param); /*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B + 3, 0x70); - } /*************SU BFee Entry Init*************/ - if ((beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) { + if (beamforming_info->beamformee_su_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) { p_beamformee_entry = &beamforming_info->beamformee_entry[bfee_idx]; p_beamformee_entry->is_mu_sta = false; hal_txbf_8822b_rf_mode(dm, beamforming_info, bfee_idx); @@ -427,21 +416,21 @@ hal_txbf_8822b_enter( } else odm_write_2byte(dm, REG_TXBF_CTRL_8822B + 2, sta_id | BIT(14) | BIT(15) | BIT(12)); - /*CSI report parameters of Beamformee*/ + /*@CSI report parameters of Beamformee*/ if (p_beamformee_entry->su_reg_index == 0) { - /*Get BIT24 & BIT25*/ - u8 tmp = odm_read_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 3) & 0x3; + /*@Get BIT24 & BIT25*/ + u8 tmp = odm_read_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 3) & 0x3; odm_write_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 3, tmp | 0x60); odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B, sta_id | BIT(9)); } else - odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2, sta_id | 0xE200); /*Set BIT25*/ + odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2, sta_id | 0xE200); /*Set BIT25*/ phydm_beamforming_notify(dm); } /*************MU BFer Entry Init*************/ - if ((beamforming_info->beamformer_mu_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) { + if (beamforming_info->beamformer_mu_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) { beamformer_entry = &beamforming_info->beamformer_entry[bfer_idx]; beamforming_info->mu_ap_index = bfer_idx; beamformer_entry->is_mu_ap = true; @@ -453,14 +442,14 @@ hal_txbf_8822b_enter( /*Sounding protocol control*/ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B, 0xDB); - /* MAC address */ - for (i = 0; i < 6 ; i++) + /* @MAC address */ + for (i = 0; i < 6; i++) odm_write_1byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8822B + i), beamformer_entry->mac_addr[i]); /* Set partial AID */ odm_write_2byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8822B + 6), beamformer_entry->p_aid); - /* Fill our AID to 0x1680[11:0] and [13:12] = 2b'00, BF report segment select to 3895 bytes*/ + /* @Fill our AID to 0x1680[11:0] and [13:12] = 2b'00, BF report segment select to 3895 bytes*/ u1b_tmp = odm_read_1byte(dm, 0x1680); u1b_tmp = (beamformer_entry->p_aid) & 0xFFF; odm_write_1byte(dm, 0x1680, u1b_tmp); @@ -477,23 +466,22 @@ hal_txbf_8822b_enter( u1b_tmp |= 0x30; odm_write_1byte(dm, REG_RXFLTMAP1_8822B, u1b_tmp); - /*CSI report parameters of Beamformer*/ - nc_index = hal_txbf_8822b_get_nrx(dm); /* Depend on RF type */ - nr_index = 1; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/ + /*@CSI report parameters of Beamformer*/ + nc_index = hal_txbf_8822b_get_nrx(dm); /* @Depend on RF type */ + nr_index = 1; /*@0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/ grouping = 0; /*no grouping*/ - codebookinfo = 1; /*7 bit for psi, 9 bit for phi*/ + codebookinfo = 1; /*@7 bit for psi, 9 bit for phi*/ coefficientsize = 0; /*This is nothing really matter*/ csi_param = (u16)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (nr_index << 3) | (nc_index)); odm_write_2byte(dm, 0x6F4, csi_param); - /*for B-cut*/ - odm_set_bb_reg(dm, 0x6A0, BIT(20), 0); - odm_set_bb_reg(dm, 0x688, BIT(20), 0); - + /*@for B-cut*/ + odm_set_bb_reg(dm, R_0x6a0, BIT(20), 0); + odm_set_bb_reg(dm, R_0x688, BIT(20), 0); } /*************MU BFee Entry Init*************/ - if ((beamforming_info->beamformee_mu_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) { + if (beamforming_info->beamformee_mu_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) { p_beamformee_entry = &beamforming_info->beamformee_entry[bfee_idx]; p_beamformee_entry->is_mu_sta = true; for (i = 0; i < MAX_BEAMFORMEE_MU; i++) { @@ -568,25 +556,27 @@ hal_txbf_8822b_enter( beamforming_info->reg_mu_tx_ctrl |= (p_beamformee_entry->mu_reg_index << 8) & (BIT(8) | BIT(9) | BIT(10)); odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); - odm_set_bb_reg(dm, 0x14c4, MASKDWORD, 0); /*Reset gid_valid table*/ - odm_set_bb_reg(dm, 0x14c8, MASKDWORD, user_position_l); - odm_set_bb_reg(dm, 0x14cc, MASKDWORD, user_position_h); + odm_set_bb_reg(dm, R_0x14c4, MASKDWORD, 0); /*Reset gid_valid table*/ + odm_set_bb_reg(dm, R_0x14c8, MASKDWORD, user_position_l); + odm_set_bb_reg(dm, R_0x14cc, MASKDWORD, user_position_h); /*set validity of MU STAs*/ beamforming_info->reg_mu_tx_ctrl &= 0xFFFFFFC0; beamforming_info->reg_mu_tx_ctrl |= beamforming_info->beamformee_mu_reg_maping & 0x3F; odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); - PHYDM_DBG(dm, DBG_TXBF, "@%s, reg_mu_tx_ctrl = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", - __func__, beamforming_info->reg_mu_tx_ctrl, user_position_l, user_position_h); + PHYDM_DBG(dm, DBG_TXBF, + "@%s, reg_mu_tx_ctrl = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", + __func__, beamforming_info->reg_mu_tx_ctrl, + user_position_l, user_position_h); value16 = odm_read_2byte(dm, mu_reg[p_beamformee_entry->mu_reg_index]); - value16 &= 0xFE00; /*Clear PAID*/ - value16 |= BIT(9); /*Enable MU BFee*/ + value16 &= 0xFE00; /*@Clear PAID*/ + value16 |= BIT(9); /*@Enable MU BFee*/ value16 |= p_beamformee_entry->p_aid; odm_write_2byte(dm, mu_reg[p_beamformee_entry->mu_reg_index], value16); - /* 0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */ + /* @0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */ u1b_tmp = odm_read_1byte(dm, REG_TXBF_CTRL_8822B + 3); u1b_tmp |= 0xD0; /* Set bit 28, 30, 31 to 3b'111*/ odm_write_1byte(dm, REG_TXBF_CTRL_8822B + 3, u1b_tmp); @@ -594,7 +584,7 @@ hal_txbf_8822b_enter( odm_write_1byte(dm, REG_NDPA_RATE_8822B, 0x4); u1b_tmp = odm_read_1byte(dm, REG_NDPA_OPT_CTRL_8822B); - u1b_tmp &= 0xFC; /* Clear bit 0, 1*/ + u1b_tmp &= 0xFC; /* @Clear bit 0, 1*/ odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8822B, u1b_tmp); u4b_tmp = odm_read_4byte(dm, REG_SND_PTCL_CTRL_8822B); @@ -605,7 +595,7 @@ hal_txbf_8822b_enter( u1b_tmp = odm_read_1byte(dm, REG_RXFLTMAP0_8822B + 1); u1b_tmp |= 0x40; odm_write_1byte(dm, REG_RXFLTMAP0_8822B + 1, u1b_tmp); - /* End of MAC registers setting */ + /* @End of MAC registers setting */ hal_txbf_8822b_rf_mode(dm, beamforming_info, bfee_idx); #if (SUPPORT_MU_BF == 1) @@ -628,26 +618,25 @@ hal_txbf_8822b_enter( odm_write_4byte(dm, ctrl_info_offset, (p_beamformee_entry->mu_reg_index + 1) << 16); odm_write_1byte(dm, 0x81, 0x80); /*RPTBUF ready*/ - PHYDM_DBG(dm, DBG_TXBF, "@%s, mac_id = %d, ctrl_info_offset = 0x%x, mu_reg_index = %x\n", - __func__, p_beamformee_entry->mac_id, ctrl_info_offset, p_beamformee_entry->mu_reg_index); + PHYDM_DBG(dm, DBG_TXBF, + "@%s, mac_id = %d, ctrl_info_offset = 0x%x, mu_reg_index = %x\n", + __func__, p_beamformee_entry->mac_id, + ctrl_info_offset, + p_beamformee_entry->mu_reg_index); } #endif } - } - -void -hal_txbf_8822b_leave( - void *dm_void, - u8 idx -) +void hal_txbf_8822b_leave( + void *dm_void, + u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; - struct _RT_BEAMFORMER_ENTRY *beamformer_entry; - struct _RT_BEAMFORMEE_ENTRY *p_beamformee_entry; - u32 mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e}; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; + struct _RT_BEAMFORMER_ENTRY *beamformer_entry; + struct _RT_BEAMFORMEE_ENTRY *p_beamformee_entry; + u32 mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e}; if (idx < BEAMFORMER_ENTRY_NUM) { beamformer_entry = &beamforming_info->beamformer_entry[idx]; @@ -655,9 +644,9 @@ hal_txbf_8822b_leave( } else return; - /*Clear P_AID of Beamformee*/ - /*Clear MAC address of Beamformer*/ - /*Clear Associated Bfmee Sel*/ + /*@Clear P_AID of Beamformee*/ + /*@Clear MAC address of Beamformer*/ + /*@Clear Associated Bfmee Sel*/ if (beamformer_entry->beamform_entry_cap == BEAMFORMING_CAP_NONE) { odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B, 0xD8); @@ -673,7 +662,7 @@ hal_txbf_8822b_leave( } beamforming_info->beamformer_su_reg_maping &= ~(BIT(beamformer_entry->su_reg_index)); beamformer_entry->su_reg_index = 0xFF; - } else { /*MU BFer */ + } else { /*@MU BFer */ /*set validity of MU STA0 and MU STA1*/ beamforming_info->reg_mu_tx_ctrl &= 0xFFFFFFC0; odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); @@ -695,18 +684,17 @@ hal_txbf_8822b_leave( odm_write_2byte(dm, REG_TXBF_CTRL_8822B + 2, 0x0 | BIT(14) | BIT(15) | BIT(12)); odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2, - odm_read_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2) & 0x60); + odm_read_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2) & 0x60); } beamforming_info->beamformee_su_reg_maping &= ~(BIT(p_beamformee_entry->su_reg_index)); p_beamformee_entry->su_reg_index = 0xFF; - } else { /*MU BFee */ - /*Disable sending NDPA & BF-rpt-poll to this BFee*/ + } else { /*@MU BFee */ + /*@Disable sending NDPA & BF-rpt-poll to this BFee*/ odm_write_2byte(dm, mu_reg[p_beamformee_entry->mu_reg_index], 0); /*set validity of MU STA*/ beamforming_info->reg_mu_tx_ctrl &= ~(BIT(p_beamformee_entry->mu_reg_index)); odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); - p_beamformee_entry->is_mu_sta = false; beamforming_info->beamformee_mu_reg_maping &= ~(BIT(p_beamformee_entry->mu_reg_index)); p_beamformee_entry->mu_reg_index = 0xFF; @@ -714,20 +702,17 @@ hal_txbf_8822b_leave( } } - /***********SU & MU BFee Entry Only when souding done****************/ -void -hal_txbf_8822b_status( - void *dm_void, - u8 beamform_idx -) +void hal_txbf_8822b_status( + void *dm_void, + u8 beamform_idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u16 beam_ctrl_val, tmp_val; - u32 beam_ctrl_reg; - struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY *beamform_entry; - boolean is_mu_sounding = beamforming_info->is_mu_sounding, is_bitmap_ready = false; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u16 beam_ctrl_val, tmp_val; + u32 beam_ctrl_reg; + struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY *beamform_entry; + boolean is_mu_sounding = beamforming_info->is_mu_sounding, is_bitmap_ready = false; u16 bitmap; u8 idx, gid, i; u8 id1, id0; @@ -742,13 +727,14 @@ hal_txbf_8822b_status( /*SU sounding done */ if (is_mu_sounding == false) { - if (phydm_acting_determine(dm, phydm_acting_as_ibss)) beam_ctrl_val = beamform_entry->mac_id; else beam_ctrl_val = beamform_entry->p_aid; - PHYDM_DBG(dm, DBG_TXBF, "@%s, beamform_entry.beamform_entry_state = %d", __func__, beamform_entry->beamform_entry_state); + PHYDM_DBG(dm, DBG_TXBF, + "@%s, beamform_entry.beamform_entry_state = %d", + __func__, beamform_entry->beamform_entry_state); if (beamform_entry->su_reg_index == 0) beam_ctrl_reg = REG_TXBF_CTRL_8822B; @@ -765,53 +751,62 @@ hal_txbf_8822b_status( else if (beamform_entry->sound_bw == CHANNEL_WIDTH_80) beam_ctrl_val |= (BIT(9) | BIT(10) | BIT(11)); } else { - PHYDM_DBG(dm, DBG_TXBF, "@%s, Don't apply Vmatrix", __func__); + PHYDM_DBG(dm, DBG_TXBF, "@%s, Don't apply Vmatrix", + __func__); beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11)); } odm_write_2byte(dm, beam_ctrl_reg, beam_ctrl_val); - /*disable NDP packet use beamforming */ + /*@disable NDP packet use beamforming */ tmp_val = odm_read_2byte(dm, REG_TXBF_CTRL_8822B); odm_write_2byte(dm, REG_TXBF_CTRL_8822B, tmp_val | BIT(15)); } else { - PHYDM_DBG(dm, DBG_TXBF, "@%s, MU Sounding Done\n", __func__); - /*MU sounding done */ - if (1) { /* (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { */ - PHYDM_DBG(dm, DBG_TXBF, "@%s, BEAMFORMING_ENTRY_STATE_PROGRESSED\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "@%s, MU Sounding Done\n", __func__); + /*@MU sounding done */ + if (1) { /* @(beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { */ + PHYDM_DBG(dm, DBG_TXBF, + "@%s, BEAMFORMING_ENTRY_STATE_PROGRESSED\n", + __func__); - value32 = odm_get_bb_reg(dm, 0x1684, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0x1684, MASKDWORD); is_sounding_success[0] = (value32 & BIT(10)) ? 1 : 0; is_sounding_success[1] = (value32 & BIT(26)) ? 1 : 0; - value32 = odm_get_bb_reg(dm, 0x1688, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0x1688, MASKDWORD); is_sounding_success[2] = (value32 & BIT(10)) ? 1 : 0; is_sounding_success[3] = (value32 & BIT(26)) ? 1 : 0; - value32 = odm_get_bb_reg(dm, 0x168C, MASKDWORD); + value32 = odm_get_bb_reg(dm, R_0x168c, MASKDWORD); is_sounding_success[4] = (value32 & BIT(10)) ? 1 : 0; is_sounding_success[5] = (value32 & BIT(26)) ? 1 : 0; - PHYDM_DBG(dm, DBG_TXBF, "@%s, is_sounding_success STA1:%d, STA2:%d, STA3:%d, STA4:%d, STA5:%d, STA6:%d\n", - __func__, is_sounding_success[0], is_sounding_success[1], is_sounding_success[2], is_sounding_success[3], is_sounding_success[4], is_sounding_success[5]); + PHYDM_DBG(dm, DBG_TXBF, + "@%s, is_sounding_success STA1:%d, STA2:%d, STA3:%d, STA4:%d, STA5:%d, STA6:%d\n", + __func__, is_sounding_success[0], + is_sounding_success[1], + is_sounding_success[2], + is_sounding_success[3], + is_sounding_success[4], + is_sounding_success[5]); - value32 = odm_get_bb_reg(dm, 0xF4C, 0xFFFF0000); - /* odm_set_bb_reg(dm, 0x19E0, MASKHWORD, 0xFFFF);Let MAC ignore bitmap */ + value32 = odm_get_bb_reg(dm, R_0xf4c, 0xFFFF0000); + /* odm_set_bb_reg(dm, R_0x19e0, MASKHWORD, 0xFFFF);Let MAC ignore bitmap */ is_bitmap_ready = (boolean)((value32 & BIT(15)) >> 15); bitmap = (u16)(value32 & 0x3FFF); for (idx = 0; idx < 15; idx++) { - if (idx < 5) {/*bit0~4*/ + if (idx < 5) { /*@bit0~4*/ id0 = 0; id1 = (u8)(idx + 1); - } else if (idx < 9) { /*bit5~8*/ + } else if (idx < 9) { /*@bit5~8*/ id0 = 1; id1 = (u8)(idx - 3); - } else if (idx < 12) { /*bit9~11*/ + } else if (idx < 12) { /*@bit9~11*/ id0 = 2; id1 = (u8)(idx - 6); - } else if (idx < 14) { /*bit12~13*/ + } else if (idx < 14) { /*@bit12~13*/ id0 = 3; id1 = (u8)(idx - 8); - } else { /*bit14*/ + } else { /*@bit14*/ id0 = 4; id1 = (u8)(idx - 9); } @@ -838,7 +833,7 @@ hal_txbf_8822b_status( for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { beamform_entry = &beamforming_info->beamformee_entry[i]; - if ((beamform_entry->is_mu_sta) && (beamform_entry->mu_reg_index < 6)) { + if (beamform_entry->is_mu_sta && beamform_entry->mu_reg_index < 6) { value32 = gid_valid[beamform_entry->mu_reg_index]; for (idx = 0; idx < 4; idx++) { beamform_entry->gid_valid[idx] = (u8)(value32 & 0xFF); @@ -851,10 +846,10 @@ hal_txbf_8822b_status( beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10)); beamforming_info->reg_mu_tx_ctrl |= ((idx << 8) & (BIT(8) | BIT(9) | BIT(10))); odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); - odm_set_mac_reg(dm, 0x14C4, MASKDWORD, gid_valid[idx]); /*set MU STA gid valid table*/ + odm_set_mac_reg(dm, R_0x14c4, MASKDWORD, gid_valid[idx]); /*set MU STA gid valid table*/ } - /*Enable TxMU PPDU*/ + /*@Enable TxMU PPDU*/ if (beamforming_info->dbg_disable_mu_tx == false) beamforming_info->reg_mu_tx_ctrl |= BIT(7); else @@ -865,15 +860,13 @@ hal_txbf_8822b_status( } /*Only used for MU BFer Entry when get GID management frame (self is as MU STA)*/ -void -hal_txbf_8822b_config_gtab( - void *dm_void -) +void hal_txbf_8822b_config_gtab( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; - struct _RT_BEAMFORMER_ENTRY *beamformer_entry = NULL; - u32 gid_valid = 0, user_position_l = 0, user_position_h = 0, i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; + struct _RT_BEAMFORMER_ENTRY *beamformer_entry = NULL; + u32 gid_valid = 0, user_position_l = 0, user_position_h = 0, i; if (beamforming_info->mu_ap_index < BEAMFORMER_ENTRY_NUM) beamformer_entry = &beamforming_info->beamformer_entry[beamforming_info->mu_ap_index]; @@ -882,7 +875,7 @@ hal_txbf_8822b_config_gtab( PHYDM_DBG(dm, DBG_TXBF, "%s==>\n", __func__); - /*For GID 0~31*/ + /*@For GID 0~31*/ for (i = 0; i < 4; i++) gid_valid |= (beamformer_entry->gid_valid[i] << (i << 3)); for (i = 0; i < 8; i++) { @@ -894,18 +887,19 @@ hal_txbf_8822b_config_gtab( /*select MU STA0 table*/ beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10)); odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); - odm_set_bb_reg(dm, 0x14c4, MASKDWORD, gid_valid); - odm_set_bb_reg(dm, 0x14c8, MASKDWORD, user_position_l); - odm_set_bb_reg(dm, 0x14cc, MASKDWORD, user_position_h); + odm_set_bb_reg(dm, R_0x14c4, MASKDWORD, gid_valid); + odm_set_bb_reg(dm, R_0x14c8, MASKDWORD, user_position_l); + odm_set_bb_reg(dm, R_0x14cc, MASKDWORD, user_position_h); - PHYDM_DBG(dm, DBG_TXBF, "%s: STA0: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", - __func__, gid_valid, user_position_l, user_position_h); + PHYDM_DBG(dm, DBG_TXBF, + "%s: STA0: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", + __func__, gid_valid, user_position_l, user_position_h); gid_valid = 0; user_position_l = 0; user_position_h = 0; - /*For GID 32~64*/ + /*@For GID 32~64*/ for (i = 4; i < 8; i++) gid_valid |= (beamformer_entry->gid_valid[i] << ((i - 4) << 3)); for (i = 8; i < 16; i++) { @@ -918,22 +912,20 @@ hal_txbf_8822b_config_gtab( beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10)); beamforming_info->reg_mu_tx_ctrl |= BIT(8); odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); - odm_set_bb_reg(dm, 0x14c4, MASKDWORD, gid_valid); - odm_set_bb_reg(dm, 0x14c8, MASKDWORD, user_position_l); - odm_set_bb_reg(dm, 0x14cc, MASKDWORD, user_position_h); + odm_set_bb_reg(dm, R_0x14c4, MASKDWORD, gid_valid); + odm_set_bb_reg(dm, R_0x14c8, MASKDWORD, user_position_l); + odm_set_bb_reg(dm, R_0x14cc, MASKDWORD, user_position_h); - PHYDM_DBG(dm, DBG_TXBF, "%s: STA1: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", - __func__, gid_valid, user_position_l, user_position_h); + PHYDM_DBG(dm, DBG_TXBF, + "%s: STA1: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", + __func__, gid_valid, user_position_l, user_position_h); /* Set validity of MU STA0 and MU STA1*/ beamforming_info->reg_mu_tx_ctrl &= 0xFFFFFFC0; beamforming_info->reg_mu_tx_ctrl |= 0x3; /* STA0, STA1*/ odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); - } - - #if 0 /*This function translate the bitmap to GTAB*/ void @@ -948,19 +940,19 @@ haltxbf8822b_gtab_translation( u32 user_position_msb[6] = {0}; for (idx = 0; idx < 15; idx++) { - if (idx < 5) {/*bit0~4*/ + if (idx < 5) {/*@bit0~4*/ id0 = 0; id1 = (u8)(idx + 1); - } else if (idx < 9) { /*bit5~8*/ + } else if (idx < 9) { /*@bit5~8*/ id0 = 1; id1 = (u8)(idx - 3); - } else if (idx < 12) { /*bit9~11*/ + } else if (idx < 12) { /*@bit9~11*/ id0 = 2; id1 = (u8)(idx - 6); - } else if (idx < 14) { /*bit12~13*/ + } else if (idx < 14) { /*@bit12~13*/ id0 = 3; id1 = (u8)(idx - 8); - } else { /*bit14*/ + } else { /*@bit14*/ id0 = 4; id1 = (u8)(idx - 9); } @@ -988,22 +980,19 @@ haltxbf8822b_gtab_translation( user_position_msb[id0] |= (1 << ((gid - 16) << 1)); /*user_position_msb[id1] |= (0 << ((gid - 16) << 1));*/ } - } for (idx = 0; idx < 6; idx++) { - /*dbg_print("gid_valid[%d] = 0x%x\n", idx, gid_valid[idx]); + /*@dbg_print("gid_valid[%d] = 0x%x\n", idx, gid_valid[idx]); dbg_print("user_position[%d] = 0x%x %x\n", idx, user_position_msb[idx], user_position_lsb[idx]);*/ } } #endif -void -hal_txbf_8822b_fw_txbf( - void *dm_void, - u8 idx -) +void hal_txbf_8822b_fw_txbf( + void *dm_void, + u8 idx) { #if 0 struct _RT_BEAMFORMING_INFO *beam_info = GET_BEAMFORM_INFO(adapter); @@ -1020,93 +1009,79 @@ hal_txbf_8822b_fw_txbf( #if (defined(CONFIG_BB_TXBF_API)) /*this function is only used for BFer*/ -void -phydm_8822btxbf_rfmode( - void *dm_void, - u8 su_bfee_cnt, - u8 mu_bfee_cnt -) +void phydm_8822btxbf_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i; if (dm->rf_type == RF_1T1R) return; - if ((su_bfee_cnt > 0) || (mu_bfee_cnt > 0)) { + if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { for (i = RF_PATH_A; i <= RF_PATH_B; i++) { - odm_set_rf_reg(dm, (enum rf_path)i, 0xEF, BIT(19), 0x1); /*RF mode table write enable*/ - odm_set_rf_reg(dm, (enum rf_path)i, 0x33, 0xF, 3); /*Select RX mode*/ - odm_set_rf_reg(dm, (enum rf_path)i, 0x3E, 0xfffff, 0x00036); /*Set Table data*/ - odm_set_rf_reg(dm, (enum rf_path)i, 0x3F, 0xfffff, 0x5AFCE); /*Set Table data*/ - odm_set_rf_reg(dm, (enum rf_path)i, 0xEF, BIT(19), 0x0); /*RF mode table write disable*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), 0x1); /*RF mode table write enable*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 3); /*Select RX mode*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, 0xfffff, 0x00036); /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff, 0x5AFCE); /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), 0x0); /*RF mode table write disable*/ } } - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(30), 1); /*if Nsts > Nc, don't apply V matrix*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(30), 1); /*@if Nsts > Nc, don't apply V matrix*/ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { - /*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x2); /*enable BB TxBF ant mapping register*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 1); /*ignore user since 8822B only 2Tx*/ - + /*@for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x2); /*@enable BB TxBF ant mapping register*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 1); /*@ignore user since 8822B only 2Tx*/ /*Nsts = 2 AB*/ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433); odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043); } else { - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x0); /*enable BB TxBF ant mapping register*/ - odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 0); /*ignore user since 8822B only 2Tx*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x0); /*@enable BB TxBF ant mapping register*/ + odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 0); /*@ignore user since 8822B only 2Tx*/ - odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x1); /*1SS by path-A*/ - odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8822B, MASKLWORD, 0x430); /*2SS by path-A,B*/ + odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x1); /*@1SS by path-A*/ + odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8822B, MASKLWORD, 0x430); /*@2SS by path-A,B*/ } - } - /*this function is for BFer bug workaround*/ -void -phydm_8822b_sutxbfer_workaroud( - void *dm_void, - boolean enable_su_bfer, - u8 nc, - u8 nr, - u8 ng, - u8 CB, - u8 BW, - boolean is_vht -) +void phydm_8822b_sutxbfer_workaroud(void *dm_void, boolean enable_su_bfer, + u8 nc, u8 nr, u8 ng, u8 CB, u8 BW, + boolean is_vht) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (enable_su_bfer) { - odm_set_bb_reg(dm, 0x19f8, BIT(22) | BIT(21) | BIT(20), 0x1); - odm_set_bb_reg(dm, 0x19f8, BIT(25) | BIT(24) | BIT(23), 0x0); - odm_set_bb_reg(dm, 0x19f8, BIT(16), 0x1); + odm_set_bb_reg(dm, R_0x19f8, BIT(22) | BIT(21) | BIT(20), 0x1); + odm_set_bb_reg(dm, R_0x19f8, BIT(25) | BIT(24) | BIT(23), 0x0); + odm_set_bb_reg(dm, R_0x19f8, BIT(16), 0x1); if (is_vht) - odm_set_bb_reg(dm, 0x19f0, BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0), 0x1f); + odm_set_bb_reg(dm, R_0x19f0, BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0), 0x1f); else - odm_set_bb_reg(dm, 0x19f0, BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0), 0x22); + odm_set_bb_reg(dm, R_0x19f0, BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0), 0x22); - odm_set_bb_reg(dm, 0x19f0, BIT(7) | BIT(6), nc); - odm_set_bb_reg(dm, 0x19f0, BIT(9) | BIT(8), nr); - odm_set_bb_reg(dm, 0x19f0, BIT(11) | BIT(10), ng); - odm_set_bb_reg(dm, 0x19f0, BIT(13) | BIT(12), CB); - - odm_set_bb_reg(dm, 0xb58, BIT(3) | BIT(2), BW); - odm_set_bb_reg(dm, 0xb58, BIT(7) | BIT(6) | BIT(5) | BIT(4), 0x0); - odm_set_bb_reg(dm, 0xb58, BIT(9) | BIT(8), BW); - odm_set_bb_reg(dm, 0xb58, BIT(13) | BIT(12) | BIT(11) | BIT(10), 0x0); - } else - odm_set_bb_reg(dm, 0x19f8, BIT(16), 0x0); - - PHYDM_DBG(dm, DBG_TXBF, "[%s] enable_su_bfer = %d, is_vht = %d\n", __func__, enable_su_bfer, is_vht); - PHYDM_DBG(dm, DBG_TXBF, "[%s] nc = %d, nr = %d, ng = %d, CB = %d, BW = %d\n", __func__, nc, nr, ng, CB, BW); + odm_set_bb_reg(dm, R_0x19f0, BIT(7) | BIT(6), nc); + odm_set_bb_reg(dm, R_0x19f0, BIT(9) | BIT(8), nr); + odm_set_bb_reg(dm, R_0x19f0, BIT(11) | BIT(10), ng); + odm_set_bb_reg(dm, R_0x19f0, BIT(13) | BIT(12), CB); + odm_set_bb_reg(dm, R_0xb58, BIT(3) | BIT(2), BW); + odm_set_bb_reg(dm, R_0xb58, BIT(7) | BIT(6) | BIT(5) | BIT(4), 0x0); + odm_set_bb_reg(dm, R_0xb58, BIT(9) | BIT(8), BW); + odm_set_bb_reg(dm, R_0xb58, BIT(13) | BIT(12) | BIT(11) | BIT(10), 0x0); + } else { + odm_set_bb_reg(dm, R_0x19f8, BIT(16), 0x0); + } + PHYDM_DBG(dm, DBG_TXBF, "[%s] enable_su_bfer = %d, is_vht = %d\n", + __func__, enable_su_bfer, is_vht); + PHYDM_DBG(dm, DBG_TXBF, + "[%s] nc = %d, nr = %d, ng = %d, CB = %d, BW = %d\n", + __func__, nc, nr, ng, CB, BW); } #endif -#endif /* (RTL8822B_SUPPORT == 1)*/ +#endif /* @(RTL8822B_SUPPORT == 1)*/ diff --git a/hal/phydm/txbf/haltxbf8822b.h b/hal/phydm/txbf/haltxbf8822b.h index ba33162..552fba2 100644 --- a/hal/phydm/txbf/haltxbf8822b.h +++ b/hal/phydm/txbf/haltxbf8822b.h @@ -26,38 +26,26 @@ #define __HAL_TXBF_8822B_H__ #if (RTL8822B_SUPPORT == 1) -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT -void -hal_txbf_8822b_enter( - void *dm_void, - u8 idx -); +void hal_txbf_8822b_enter( + void *dm_void, + u8 idx); +void hal_txbf_8822b_leave( + void *dm_void, + u8 idx); -void -hal_txbf_8822b_leave( - void *dm_void, - u8 idx -); +void hal_txbf_8822b_status( + void *dm_void, + u8 beamform_idx); +void hal_txbf_8822b_config_gtab( + void *dm_void); -void -hal_txbf_8822b_status( - void *dm_void, - u8 beamform_idx -); - -void -hal_txbf_8822b_config_gtab( - void *dm_void -); - -void -hal_txbf_8822b_fw_txbf( - void *dm_void, - u8 idx -); +void hal_txbf_8822b_fw_txbf( + void *dm_void, + u8 idx); #else #define hal_txbf_8822b_enter(dm_void, idx) #define hal_txbf_8822b_leave(dm_void, idx) @@ -68,24 +56,11 @@ hal_txbf_8822b_fw_txbf( #endif #if (defined(CONFIG_BB_TXBF_API)) -void -phydm_8822btxbf_rfmode( - void *dm_void, - u8 su_bfee_cnt, - u8 mu_bfee_cnt -); +void phydm_8822btxbf_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt); -void -phydm_8822b_sutxbfer_workaroud( - void *dm_void, - boolean enable_su_bfer, - u8 nc, - u8 nr, - u8 ng, - u8 CB, - u8 BW, - boolean is_vht -); +void phydm_8822b_sutxbfer_workaroud(void *dm_void, boolean enable_su_bfer, + u8 nc, u8 nr, u8 ng, u8 CB, u8 BW, + boolean is_vht); #else #define phydm_8822btxbf_rfmode(dm_void, su_bfee_cnt, mu_bfee_cnt) diff --git a/hal/phydm/txbf/haltxbfinterface.c b/hal/phydm/txbf/haltxbfinterface.c index dbaeb04..c125fec 100644 --- a/hal/phydm/txbf/haltxbfinterface.c +++ b/hal/phydm/txbf/haltxbfinterface.c @@ -12,28 +12,26 @@ * more details. * *****************************************************************************/ -/* ************************************************************ +/************************************************************* * Description: * * This file is for TXBF interface mechanism * - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "../phydm_precomp.h" -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -beamforming_gid_paid( - void *adapter, - PRT_TCB tcb -) +void beamforming_gid_paid( + void *adapter, + PRT_TCB tcb) { - u8 RA[6] = {0}; - u8 *p_header = GET_FRAME_OF_FIRST_FRAG((PADAPTER)adapter, tcb); - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + u8 RA[6] = {0}; + u8 *p_header = GET_FRAME_OF_FIRST_FRAG(adapter, tcb); + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); if (((PADAPTER)adapter)->HardwareType < HARDWARE_TYPE_RTL8192EE) return; @@ -41,11 +39,11 @@ beamforming_gid_paid( return; #if (SUPPORT_MU_BF == 1) - if (tcb->tx_bf_pkt_type == RT_BF_PKT_TYPE_BROADCAST_NDPA) { /* MU NDPA */ + if (tcb->tx_bf_pkt_type == RT_BF_PKT_TYPE_BROADCAST_NDPA) { /* @MU NDPA */ #else if (0) { #endif - /* Fill G_ID and P_AID */ + /* @Fill G_ID and P_AID */ tcb->G_ID = 63; if (beam_info->first_mu_bfee_index < BEAMFORMEE_ENTRY_NUM) { tcb->P_AID = beam_info->beamformee_entry[beam_info->first_mu_bfee_index].p_aid; @@ -56,31 +54,31 @@ beamforming_gid_paid( /* VHT SU PPDU carrying one or more group addressed MPDUs or */ /* Transmitting a VHT NDP intended for multiple recipients */ - if (MacAddr_isBcst(RA) || MacAddr_isMulticast(RA) || tcb->macId == MAC_ID_STATIC_FOR_BROADCAST_MULTICAST) { + if (MacAddr_isBcst(RA) || MacAddr_isMulticast(RA) || tcb->macId == MAC_ID_STATIC_FOR_BROADCAST_MULTICAST) { tcb->G_ID = 63; tcb->P_AID = 0; - } else if (ACTING_AS_AP((PADAPTER)adapter)) { - u16 AID = (u16)(MacIdGetOwnerAssociatedClientAID((PADAPTER)adapter, tcb->macId) & 0x1ff); /*AID[0:8]*/ + } else if (ACTING_AS_AP(adapter)) { + u16 AID = (u16)(MacIdGetOwnerAssociatedClientAID(adapter, tcb->macId) & 0x1ff); /*@AID[0:8]*/ /*RT_DISP(FBEAM, FBEAM_FUN, ("@%s tcb->mac_id=0x%X, AID=0x%X\n", __func__, tcb->mac_id, AID));*/ tcb->G_ID = 63; - if (AID == 0) /*A PPDU sent by an AP to a non associated STA*/ + if (AID == 0) /*@A PPDU sent by an AP to a non associated STA*/ tcb->P_AID = 0; - else { /*Sent by an AP and addressed to a STA associated with that AP*/ - u16 BSSID = 0; + else { /*Sent by an AP and addressed to a STA associated with that AP*/ + u16 BSSID = 0; GET_80211_HDR_ADDRESS2(p_header, &RA); - BSSID = ((RA[5] & 0xf0) >> 4) ^ (RA[5] & 0xf); /*BSSID[44:47] xor BSSID[40:43]*/ - tcb->P_AID = (AID + BSSID * 32) & 0x1ff; /*(dec(A) + dec(B)*32) mod 512*/ + BSSID = ((RA[5] & 0xf0) >> 4) ^ (RA[5] & 0xf); /*@BSSID[44:47] xor BSSID[40:43]*/ + tcb->P_AID = (AID + BSSID * 32) & 0x1ff; /*@(dec(A) + dec(B)*32) mod 512*/ } } else if (ACTING_AS_IBSS(((PADAPTER)adapter))) { tcb->G_ID = 63; /*P_AID for infrasturcture mode; MACID for ad-hoc mode. */ tcb->P_AID = tcb->macId; - } else if (MgntLinkStatusQuery((PADAPTER)adapter)) { /*Addressed to AP*/ + } else if (MgntLinkStatusQuery(adapter)) { /*@Addressed to AP*/ tcb->G_ID = 0; GET_80211_HDR_ADDRESS1(p_header, &RA); - tcb->P_AID = RA[5]; /*RA[39:47]*/ + tcb->P_AID = RA[5]; /*RA[39:47]*/ tcb->P_AID = (tcb->P_AID << 1) | (RA[4] >> 7); } else { tcb->G_ID = 63; @@ -90,75 +88,73 @@ beamforming_gid_paid( } } - enum rt_status beamforming_get_report_frame( - void *adapter, - PRT_RFD rfd, - POCTET_STRING p_pdu_os -) + void *adapter, + PRT_RFD rfd, + POCTET_STRING p_pdu_os) { - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); - struct dm_struct *dm = &hal_data->DM_OutSrc; - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; - u8 *p_mimo_ctrl_field, p_csi_matrix; - u8 idx, nc, nr, CH_W; - u16 csi_matrix_len = 0; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); + struct dm_struct *dm = &hal_data->DM_OutSrc; + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; + u8 *p_mimo_ctrl_field, p_csi_matrix; + u8 idx, nc, nr, CH_W; + u16 csi_matrix_len = 0; - ACT_PKT_TYPE pkt_type = ACT_PKT_TYPE_UNKNOWN; + ACT_PKT_TYPE pkt_type = ACT_PKT_TYPE_UNKNOWN; - /* Memory comparison to see if CSI report is the same with previous one */ + /* @Memory comparison to see if CSI report is the same with previous one */ beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, Frame_Addr2(*p_pdu_os), &idx); if (beamform_entry == NULL) { - PHYDM_DBG(dm, DBG_TXBF, "beamforming_get_report_frame: Cannot find entry by addr\n"); + PHYDM_DBG(dm, DBG_TXBF, "%s: Cannot find entry by addr\n", + __func__); return RT_STATUS_FAILURE; } pkt_type = PacketGetActionFrameType(p_pdu_os); - /* -@ Modified by David */ + /* @-@ Modified by David */ if (pkt_type == ACT_PKT_VHT_COMPRESSED_BEAMFORMING) { p_mimo_ctrl_field = p_pdu_os->Octet + 26; nc = ((*p_mimo_ctrl_field) & 0x7) + 1; nr = (((*p_mimo_ctrl_field) & 0x38) >> 3) + 1; CH_W = (((*p_mimo_ctrl_field) & 0xC0) >> 6); /*p_csi_matrix = p_mimo_ctrl_field + 3 + nc;*/ /* 24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField) +SNR(nc=2) */ - csi_matrix_len = p_pdu_os->Length - 26 - 3 - nc; + csi_matrix_len = p_pdu_os->Length - 26 - 3 - nc; } else if (pkt_type == ACT_PKT_HT_COMPRESSED_BEAMFORMING) { p_mimo_ctrl_field = p_pdu_os->Octet + 26; nc = ((*p_mimo_ctrl_field) & 0x3) + 1; nr = (((*p_mimo_ctrl_field) & 0xC) >> 2) + 1; CH_W = (((*p_mimo_ctrl_field) & 0x10) >> 4); - /*p_csi_matrix = p_mimo_ctrl_field + 6 + nr;*/ /* 24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField) +SNR(nc=2) */ - csi_matrix_len = p_pdu_os->Length - 26 - 6 - nr; + /*p_csi_matrix = p_mimo_ctrl_field + 6 + nr;*/ /* 24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField) +SNR(nc=2) */ + csi_matrix_len = p_pdu_os->Length - 26 - 6 - nr; } else return RT_STATUS_SUCCESS; - PHYDM_DBG(dm, DBG_TXBF, "[%s] idx=%d, pkt type=%d, nc=%d, nr=%d, CH_W=%d\n", __func__, idx, pkt_type, nc, nr, CH_W); + PHYDM_DBG(dm, DBG_TXBF, + "[%s] idx=%d, pkt type=%d, nc=%d, nr=%d, CH_W=%d\n", __func__, + idx, pkt_type, nc, nr, CH_W); return RT_STATUS_SUCCESS; } - -void -construct_ht_ndpa_packet( - // 2017/11 MH PHYDM compile. But why need to use windows maco? +void construct_ht_ndpa_packet( + // 2017/11 MH PHYDM compile. But why need to use windows maco? // For all linux code, it should be useless? //void *adapter = dm->adapter; - ADAPTER *adapter, + ADAPTER * adapter, //void *adapter, - u8 *RA, - u8 *buffer, - u32 *p_length, - enum channel_width BW -) + u8 *RA, + u8 *buffer, + u32 *p_length, + enum channel_width BW) { - u16 duration = 0; - PMGNT_INFO mgnt_info = &(((PADAPTER)adapter)->MgntInfo); + u16 duration = 0; + PMGNT_INFO mgnt_info = &(((PADAPTER)adapter)->MgntInfo); //PMGNT_INFO mgnt_info = &((MGNT_INFO)(((PADAPTER)adapter)->MgntInfo)); - OCTET_STRING p_ndpa_frame, action_content; - u8 action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; + OCTET_STRING p_ndpa_frame, action_content; + u8 action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; PlatformZeroMemory(buffer, 32); @@ -180,7 +176,7 @@ construct_ht_ndpa_packet( SET_80211_HDR_DURATION(buffer, duration); - /* HT control field */ + /* @HT control field */ SET_HT_CTRL_CSI_STEERING(buffer + sMacHdrLng, 3); SET_HT_CTRL_NDP_ANNOUNCEMENT(buffer + sMacHdrLng, 1); @@ -192,27 +188,23 @@ construct_ht_ndpa_packet( *p_length = 32; } - - - boolean send_fw_ht_ndpa_packet( - void *dm_void, - u8 *RA, - enum channel_width BW -) + void *dm_void, + u8 *RA, + enum channel_width BW) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - PADAPTER adapter = (PADAPTER)dm->adapter; - PRT_TCB tcb; - PRT_TX_LOCAL_BUFFER p_buf; - boolean ret = true; - u32 buf_len; - u8 *buf_addr; - u8 desc_len = 0, idx = 0, ndp_tx_rate; - void *p_def_adapter = GetDefaultAdapter((adapter)); - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((adapter)); - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *adapter = dm->adapter; + PRT_TCB tcb; + PRT_TX_LOCAL_BUFFER p_buf; + boolean ret = true; + u32 buf_len; + u8 *buf_addr; + u8 desc_len = 0, idx = 0, ndp_tx_rate; + void *p_def_adapter = GetDefaultAdapter(((PADAPTER)adapter)); + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -220,10 +212,11 @@ send_fw_ht_ndpa_packet( return false; ndp_tx_rate = beamforming_get_htndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); - PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate); + PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, + ndp_tx_rate); PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); - if (MgntGetFWBuffer((PADAPTER)p_def_adapter, &tcb, &p_buf)) { + if (MgntGetFWBuffer(p_def_adapter, &tcb, &p_buf)) { #if (DEV_BUS_TYPE != RT_PCI_INTERFACE) desc_len = ((PADAPTER)adapter)->HWDescHeadLength - hal_data->USBALLDummyLength; #endif @@ -234,8 +227,7 @@ send_fw_ht_ndpa_packet( RA, buf_addr, &buf_len, - BW - ); + BW); tcb->PacketLength = buf_len + desc_len; @@ -243,13 +235,13 @@ send_fw_ht_ndpa_packet( tcb->BWOfPacket = BW; - if (ACTING_AS_IBSS((adapter)) || ACTING_AS_AP((adapter))) + if (ACTING_AS_IBSS(((PADAPTER)adapter)) || ACTING_AS_AP(((PADAPTER)adapter))) tcb->G_ID = 63; tcb->P_AID = beamform_entry->p_aid; - tcb->DataRate = ndp_tx_rate; /*rate of NDP decide by nr*/ + tcb->DataRate = ndp_tx_rate; /*rate of NDP decide by nr*/ - adapter->HalFunc.CmdSendPacketHandler(adapter, tcb, p_buf, tcb->PacketLength, DESC_PACKET_TYPE_NORMAL, false); + ((PADAPTER)adapter)->HalFunc.CmdSendPacketHandler(((PADAPTER)adapter), tcb, p_buf, tcb->PacketLength, DESC_PACKET_TYPE_NORMAL, false); } else ret = false; @@ -261,26 +253,25 @@ send_fw_ht_ndpa_packet( return ret; } - boolean send_sw_ht_ndpa_packet( - void *dm_void, - u8 *RA, - enum channel_width BW -) + void *dm_void, + u8 *RA, + enum channel_width BW) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - PADAPTER adapter = (PADAPTER)dm->adapter; - PRT_TCB tcb; - PRT_TX_LOCAL_BUFFER p_buf; - boolean ret = true; - u8 idx = 0, ndp_tx_rate = 0; - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *adapter = dm->adapter; + PRT_TCB tcb; + PRT_TX_LOCAL_BUFFER p_buf; + boolean ret = true; + u8 idx = 0, ndp_tx_rate = 0; + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); ndp_tx_rate = beamforming_get_htndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); - PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate); + PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, + ndp_tx_rate); PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); @@ -290,8 +281,7 @@ send_sw_ht_ndpa_packet( RA, p_buf->Buffer.VirtualAddress, &tcb->PacketLength, - BW - ); + BW); tcb->bTxEnableSwCalcDur = true; @@ -309,37 +299,33 @@ send_sw_ht_ndpa_packet( return ret; } - - -void -construct_vht_ndpa_packet( - struct dm_struct *dm, - u8 *RA, - u16 AID, - u8 *buffer, - u32 *p_length, - enum channel_width BW -) +void construct_vht_ndpa_packet( + struct dm_struct *dm, + u8 *RA, + u16 AID, + u8 *buffer, + u32 *p_length, + enum channel_width BW) { - u16 duration = 0; - u8 sequence = 0; - u8 *p_ndpa_frame = buffer; - struct _RT_NDPA_STA_INFO sta_info; - // 2017/11 MH PHYDM compile. But why need to use windows maco? + u16 duration = 0; + u8 sequence = 0; + u8 *p_ndpa_frame = buffer; + struct _RT_NDPA_STA_INFO sta_info; + // 2017/11 MH PHYDM compile. But why need to use windows maco? // For all linux code, it should be useless? //void *adapter = dm->adapter; - ADAPTER *adapter = (PADAPTER)(dm->adapter); - u8 idx = 0; - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); - /* Frame control. */ + ADAPTER * adapter = (PADAPTER)(dm->adapter); + u8 idx = 0; + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); + /* @Frame control. */ SET_80211_HDR_FRAME_CONTROL(p_ndpa_frame, 0); SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, Type_NDPA); SET_80211_HDR_ADDRESS1(p_ndpa_frame, RA); SET_80211_HDR_ADDRESS2(p_ndpa_frame, beamform_entry->my_mac_addr); - // 2017/11 MH PHYDM compile. But why need to use windows maco? - // For all linux code, it should be useless? + // 2017/11 MH PHYDM compile. But why need to use windows maco? + // For all linux code, it should be useless? duration = 2 * a_SifsTime + 44; if (BW == CHANNEL_WIDTH_80) @@ -366,26 +352,24 @@ construct_vht_ndpa_packet( *p_length = 19; } - boolean send_fw_vht_ndpa_packet( - void *dm_void, - u8 *RA, - u16 AID, - enum channel_width BW -) + void *dm_void, + u8 *RA, + u16 AID, + enum channel_width BW) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - PADAPTER adapter = (PADAPTER)dm->adapter; - PRT_TCB tcb; - PRT_TX_LOCAL_BUFFER p_buf; - boolean ret = true; - u32 buf_len; - u8 *buf_addr; - u8 desc_len = 0, idx = 0, ndp_tx_rate = 0; - void *p_def_adapter = GetDefaultAdapter((adapter)); - HAL_DATA_TYPE *hal_data = GET_HAL_DATA((adapter)); - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *adapter = dm->adapter; + PRT_TCB tcb; + PRT_TX_LOCAL_BUFFER p_buf; + boolean ret = true; + u32 buf_len; + u8 *buf_addr; + u8 desc_len = 0, idx = 0, ndp_tx_rate = 0; + void *p_def_adapter = GetDefaultAdapter(((PADAPTER)adapter)); + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -393,13 +377,14 @@ send_fw_vht_ndpa_packet( return false; ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); - PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate); + PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, + ndp_tx_rate); PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); - if (MgntGetFWBuffer((PADAPTER)p_def_adapter, &tcb, &p_buf)) { + if (MgntGetFWBuffer(p_def_adapter, &tcb, &p_buf)) { #if (DEV_BUS_TYPE != RT_PCI_INTERFACE) - desc_len = adapter->HWDescHeadLength - hal_data->USBALLDummyLength; + desc_len = ((PADAPTER)adapter)->HWDescHeadLength - hal_data->USBALLDummyLength; #endif buf_addr = p_buf->Buffer.VirtualAddress + desc_len; @@ -409,8 +394,7 @@ send_fw_vht_ndpa_packet( AID, buf_addr, &buf_len, - BW - ); + BW); tcb->PacketLength = buf_len + desc_len; @@ -422,9 +406,9 @@ send_fw_vht_ndpa_packet( tcb->G_ID = 63; tcb->P_AID = beamform_entry->p_aid; - tcb->DataRate = ndp_tx_rate; /*decide by nr*/ + tcb->DataRate = ndp_tx_rate; /*@decide by nr*/ - adapter->HalFunc.CmdSendPacketHandler(adapter, tcb, p_buf, tcb->PacketLength, DESC_PACKET_TYPE_NORMAL, false); + ((PADAPTER)adapter)->HalFunc.CmdSendPacketHandler(adapter, tcb, p_buf, tcb->PacketLength, DESC_PACKET_TYPE_NORMAL, false); } else ret = false; @@ -438,26 +422,24 @@ send_fw_vht_ndpa_packet( return ret; } - - boolean send_sw_vht_ndpa_packet( - void *dm_void, - u8 *RA, - u16 AID, - enum channel_width BW -) + void *dm_void, + u8 *RA, + u16 AID, + enum channel_width BW) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - PADAPTER adapter = (PADAPTER)dm->adapter; - PRT_TCB tcb; - PRT_TX_LOCAL_BUFFER p_buf; - boolean ret = true; - u8 idx = 0, ndp_tx_rate = 0; - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); + struct dm_struct *dm = (struct dm_struct *)dm_void; + void *adapter = dm->adapter; + PRT_TCB tcb; + PRT_TX_LOCAL_BUFFER p_buf; + boolean ret = true; + u8 idx = 0, ndp_tx_rate = 0; + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); - PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate); + PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, + ndp_tx_rate); PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); @@ -468,8 +450,7 @@ send_sw_vht_ndpa_packet( AID, p_buf->Buffer.VirtualAddress, &tcb->PacketLength, - BW - ); + BW); tcb->bTxEnableSwCalcDur = true; tcb->BWOfPacket = BW; @@ -489,40 +470,41 @@ send_sw_vht_ndpa_packet( #ifdef SUPPORT_MU_BF #if (SUPPORT_MU_BF == 1) -/* +/*@ * Description: On VHT GID management frame by an MU beamformee. * * 2015.05.20. Created by tynli. */ enum rt_status beamforming_get_vht_gid_mgnt_frame( - void *adapter, - PRT_RFD rfd, - POCTET_STRING p_pdu_os -) + void *adapter, + PRT_RFD rfd, + POCTET_STRING p_pdu_os) { - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); - struct dm_struct *dm = &hal_data->DM_OutSrc; - enum rt_status rt_status = RT_STATUS_SUCCESS; - u8 *p_buffer = NULL; - u8 *p_raddr = NULL; - u8 mem_status[8] = {0}, user_pos[16] = {0}; - u8 idx; - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - struct _RT_BEAMFORMER_ENTRY *beamform_entry = &beam_info->beamformer_entry[beam_info->mu_ap_index]; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + struct dm_struct *dm = &hal_data->DM_OutSrc; + enum rt_status rt_status = RT_STATUS_SUCCESS; + u8 *p_buffer = NULL; + u8 *p_raddr = NULL; + u8 mem_status[8] = {0}, user_pos[16] = {0}; + u8 idx; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + struct _RT_BEAMFORMER_ENTRY *beamform_entry = &beam_info->beamformer_entry[beam_info->mu_ap_index]; PHYDM_DBG(dm, DBG_TXBF, "[%s] On VHT GID mgnt frame!\n", __func__); - /* Check length*/ + /* @Check length*/ if (p_pdu_os->length < (FRAME_OFFSET_VHT_GID_MGNT_USER_POSITION_ARRAY + 16)) { - PHYDM_DBG(dm, DBG_TXBF, "beamforming_get_vht_gid_mgnt_frame(): Invalid length (%d)\n", p_pdu_os->length); + PHYDM_DBG(dm, DBG_TXBF, "%s: Invalid length (%d)\n", __func__, + p_pdu_os->length); return RT_STATUS_INVALID_LENGTH; } - /* Check RA*/ + /* @Check RA*/ p_raddr = (u8 *)(p_pdu_os->Octet) + 4; if (!eq_mac_addr(p_raddr, adapter->CurrentAddress)) { - PHYDM_DBG(dm, DBG_TXBF, "beamforming_get_vht_gid_mgnt_frame(): Drop because of RA error.\n"); + PHYDM_DBG(dm, DBG_TXBF, "%s: Drop because of RA error.\n", + __func__); return RT_STATUS_PKT_DROP; } @@ -546,11 +528,11 @@ beamforming_get_vht_gid_mgnt_frame( RT_DISP_DATA(FBEAM, FBEAM_DATA, "user_pos: ", user_pos, 16); - /* Group ID detail printed*/ + /* @Group ID detail printed*/ { - u8 i, j; - u8 tmp_val; - u16 tmp_val2; + u8 i, j; + u8 tmp_val; + u16 tmp_val2; for (i = 0; i < 8; i++) { tmp_val = mem_status[i]; @@ -558,16 +540,16 @@ beamforming_get_vht_gid_mgnt_frame( for (j = 0; j < 8; j++) { if ((tmp_val >> j) & BIT(0)) { PHYDM_DBG(dm, DBG_TXBF, "Use Group ID (%d), User Position (%d)\n", - (i * 8 + j), (tmp_val2 >> 2 * j) & 0x3); + (i * 8 + j), (tmp_val2 >> 2 * j) & 0x3); } } } } - /* Indicate GID frame to IHV service. */ + /* @Indicate GID frame to IHV service. */ { - u8 indibuffer[24] = {0}; - u8 indioffset = 0; + u8 indibuffer[24] = {0}; + u8 indioffset = 0; PlatformMoveMemory(indibuffer + indioffset, beamform_entry->gid_valid, 8); indioffset += 8; @@ -582,30 +564,29 @@ beamforming_get_vht_gid_mgnt_frame( indioffset); } - /* Config HW GID table */ + /* @Config HW GID table */ hal_com_txbf_config_gtab(dm); return rt_status; } -/* +/*@ * Description: Construct VHT Group ID (GID) management frame. * * 2015.05.20. Created by tynli. */ -void -construct_vht_gid_mgnt_frame( - struct dm_struct *dm, - u8 *RA, - struct _RT_BEAMFORMEE_ENTRY *beamform_entry, - u8 *buffer, - u32 *p_length +void construct_vht_gid_mgnt_frame( + struct dm_struct *dm, + u8 *RA, + struct _RT_BEAMFORMEE_ENTRY *beamform_entry, + u8 *buffer, + u32 *p_length -) + ) { - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - void *adapter = beam_info->source_adapter; - OCTET_STRING os_ftm_frame, tmp; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + void *adapter = beam_info->source_adapter; + OCTET_STRING os_ftm_frame, tmp; FillOctetString(os_ftm_frame, buffer, 0); *p_length = 0; @@ -617,7 +598,7 @@ construct_vht_gid_mgnt_frame( ACT_VHT_GROUPID_MANAGEMENT, &os_ftm_frame); - /* Membership status array*/ + /* @Membership status array*/ FillOctetString(tmp, beamform_entry->gid_valid, 8); PacketAppendData(&os_ftm_frame, tmp); @@ -632,19 +613,18 @@ construct_vht_gid_mgnt_frame( boolean send_sw_vht_gid_mgnt_frame( - void *dm_void, - u8 *RA, - u8 idx -) + void *dm_void, + u8 *RA, + u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - PRT_TCB tcb; - PRT_TX_LOCAL_BUFFER p_buf; - boolean ret = true; - u8 data_rate = 0; - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = &beam_info->beamformee_entry[idx]; - void *adapter = beam_info->source_adapter; + struct dm_struct *dm = (struct dm_struct *)dm_void; + PRT_TCB tcb; + PRT_TX_LOCAL_BUFFER p_buf; + boolean ret = true; + u8 data_rate = 0; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = &beam_info->beamformee_entry[idx]; + void *adapter = beam_info->source_adapter; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -656,8 +636,7 @@ send_sw_vht_gid_mgnt_frame( RA, beamform_entry, p_buf->Buffer.VirtualAddress, - &tcb->PacketLength - ); + &tcb->PacketLength); tcb->bw_of_packet = CHANNEL_WIDTH_20; data_rate = MGN_6M; @@ -673,29 +652,26 @@ send_sw_vht_gid_mgnt_frame( return ret; } - -/* +/*@ * Description: Construct VHT beamforming report poll. * * 2015.05.20. Created by tynli. */ -void -construct_vht_bf_report_poll( - struct dm_struct *dm, - u8 *RA, - u8 *buffer, - u32 *p_length -) +void construct_vht_bf_report_poll( + struct dm_struct *dm, + u8 *RA, + u8 *buffer, + u32 *p_length) { - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - void *adapter = beam_info->source_adapter; - u8 *p_bf_rpt_poll = buffer; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + void *adapter = beam_info->source_adapter; + u8 *p_bf_rpt_poll = buffer; - /* Frame control*/ + /* @Frame control*/ SET_80211_HDR_FRAME_CONTROL(p_bf_rpt_poll, 0); SET_80211_HDR_TYPE_AND_SUBTYPE(p_bf_rpt_poll, Type_Beamforming_Report_Poll); - /* duration*/ + /* @duration*/ SET_80211_HDR_DURATION(p_bf_rpt_poll, 100); /* RA*/ @@ -704,30 +680,28 @@ construct_vht_bf_report_poll( /* TA*/ SET_VHT_BF_REPORT_POLL_TA(p_bf_rpt_poll, adapter->CurrentAddress); - /* Feedback Segment Retransmission Bitmap*/ + /* @Feedback Segment Retransmission Bitmap*/ SET_VHT_BF_REPORT_POLL_FEEDBACK_SEG_RETRAN_BITMAP(p_bf_rpt_poll, 0xFF); *p_length = 17; RT_DISP_DATA(FBEAM, FBEAM_DATA, "construct_vht_bf_report_poll():\n", buffer, *p_length); - } boolean send_sw_vht_bf_report_poll( - void *dm_void, - u8 *RA, - boolean is_final_poll -) + void *dm_void, + u8 *RA, + boolean is_final_poll) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - PRT_TCB tcb; - PRT_TX_LOCAL_BUFFER p_buf; - boolean ret = true; - u8 idx = 0, data_rate = 0; - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); - void *adapter = beam_info->source_adapter; + struct dm_struct *dm = (struct dm_struct *)dm_void; + PRT_TCB tcb; + PRT_TX_LOCAL_BUFFER p_buf; + boolean ret = true; + u8 idx = 0, data_rate = 0; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); + void *adapter = beam_info->source_adapter; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -738,10 +712,9 @@ send_sw_vht_bf_report_poll( dm, RA, p_buf->Buffer.VirtualAddress, - &tcb->PacketLength - ); + &tcb->PacketLength); - tcb->bTxEnableSwCalcDur = true; /* need?*/ + tcb->bTxEnableSwCalcDur = true; /* @ need?*/ tcb->BWOfPacket = CHANNEL_WIDTH_20; if (is_final_poll) @@ -749,7 +722,7 @@ send_sw_vht_bf_report_poll( else tcb->TxBFPktType = RT_BF_PKT_TYPE_BF_REPORT_POLL; - data_rate = MGN_6M; /* Legacy OFDM rate*/ + data_rate = MGN_6M; /* @Legacy OFDM rate*/ MgntSendPacket(adapter, tcb, p_buf, tcb->PacketLength, NORMAL_QUEUE, data_rate); } else ret = false; @@ -757,38 +730,35 @@ send_sw_vht_bf_report_poll( PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK); if (ret) - RT_DISP_DATA(FBEAM, FBEAM_DATA, "send_sw_vht_bf_report_poll():\n", p_buf->Buffer.VirtualAddress, tcb->PacketLength); + RT_DISP_DATA(FBEAM, FBEAM_DATA, "send_sw_vht_bf_report_poll:\n", + p_buf->Buffer.VirtualAddress, tcb->PacketLength); return ret; - } - -/* +/*@ * Description: Construct VHT MU NDPA packet. * We should combine this function with construct_vht_ndpa_packet() in the future. * * 2015.05.21. Created by tynli. */ -void -construct_vht_mu_ndpa_packet( - struct dm_struct *dm, - enum channel_width BW, - u8 *buffer, - u32 *p_length -) +void construct_vht_mu_ndpa_packet( + struct dm_struct *dm, + enum channel_width BW, + u8 *buffer, + u32 *p_length) { - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - void *adapter = beam_info->source_adapter; - u16 duration = 0; - u8 sequence = 0; - u8 *p_ndpa_frame = buffer; - struct _RT_NDPA_STA_INFO sta_info; - u8 idx; - u8 dest_addr[6] = {0}; - struct _RT_BEAMFORMEE_ENTRY *entry = NULL; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + void *adapter = beam_info->source_adapter; + u16 duration = 0; + u8 sequence = 0; + u8 *p_ndpa_frame = buffer; + struct _RT_NDPA_STA_INFO sta_info; + u8 idx; + u8 dest_addr[6] = {0}; + struct _RT_BEAMFORMEE_ENTRY *entry = NULL; - /* Fill the first MU BFee entry (STA1) MAC addr to destination address then + /* @Fill the first MU BFee entry (STA1) MAC addr to destination address then HW will change A1 to broadcast addr. 2015.05.28. Suggested by SD1 Chunchu. */ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { entry = &(beam_info->beamformee_entry[idx]); @@ -800,15 +770,15 @@ construct_vht_mu_ndpa_packet( if (entry == NULL) return; - /* Frame control.*/ + /* @Frame control.*/ SET_80211_HDR_FRAME_CONTROL(p_ndpa_frame, 0); SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, Type_NDPA); SET_80211_HDR_ADDRESS1(p_ndpa_frame, dest_addr); SET_80211_HDR_ADDRESS2(p_ndpa_frame, entry->my_mac_addr); - /*--------------------------------------------*/ - /* Need to modify "duration" to MU consideration. */ + /*@--------------------------------------------*/ + /* @ Need to modify "duration" to MU consideration. */ duration = 2 * a_SifsTime + 44; if (BW == CHANNEL_WIDTH_80) @@ -817,7 +787,7 @@ construct_vht_mu_ndpa_packet( duration += 87; else duration += 180; - /*--------------------------------------------*/ + /*@--------------------------------------------*/ SET_80211_HDR_DURATION(p_ndpa_frame, duration); @@ -826,39 +796,40 @@ construct_vht_mu_ndpa_packet( *p_length = 17; - /* Construct STA info. for multiple STAs*/ + /* @Construct STA info. for multiple STAs*/ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { entry = &(beam_info->beamformee_entry[idx]); if (entry->is_mu_sta) { sta_info.aid = entry->AID; - sta_info.feedback_type = 1; /* 1'b1: MU*/ + sta_info.feedback_type = 1; /* @1'b1: MU*/ sta_info.nc_index = 0; - PHYDM_DBG(dm, DBG_TXBF, "[%s] Get beamformee_entry idx(%d), AID =%d\n", __func__, idx, entry->AID); + PHYDM_DBG(dm, DBG_TXBF, + "[%s] Get beamformee_entry idx(%d), AID =%d\n", + __func__, idx, entry->AID); odm_move_memory(dm, p_ndpa_frame + (*p_length), (u8 *)&sta_info, 2); *p_length += 2; } } - } boolean send_sw_vht_mu_ndpa_packet( - void *dm_void, - enum channel_width BW -) + void *dm_void, + enum channel_width BW) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - PRT_TCB tcb; - PRT_TX_LOCAL_BUFFER p_buf; - boolean ret = true; - u8 ndp_tx_rate = 0; - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - void *adapter = beam_info->source_adapter; + struct dm_struct *dm = (struct dm_struct *)dm_void; + PRT_TCB tcb; + PRT_TX_LOCAL_BUFFER p_buf; + boolean ret = true; + u8 ndp_tx_rate = 0; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + void *adapter = beam_info->source_adapter; ndp_tx_rate = MGN_VHT2SS_MCS0; - PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate); + PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, + ndp_tx_rate); PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); @@ -867,8 +838,7 @@ send_sw_vht_mu_ndpa_packet( dm, BW, p_buf->Buffer.VirtualAddress, - &tcb->PacketLength - ); + &tcb->PacketLength); tcb->bTxEnableSwCalcDur = true; tcb->BWOfPacket = BW; @@ -887,29 +857,25 @@ send_sw_vht_mu_ndpa_packet( return ret; } - -void -dbg_construct_vht_mundpa_packet( - struct dm_struct *dm, - enum channel_width BW, - u8 *buffer, - u32 *p_length -) +void dbg_construct_vht_mundpa_packet( + struct dm_struct *dm, + enum channel_width BW, + u8 *buffer, + u32 *p_length) { - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - void *adapter = beam_info->source_adapter; - u16 duration = 0; - u8 sequence = 0; - u8 *p_ndpa_frame = buffer; - struct _RT_NDPA_STA_INFO sta_info; - u8 idx; - u8 dest_addr[6] = {0}; - struct _RT_BEAMFORMEE_ENTRY *entry = NULL; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + void *adapter = beam_info->source_adapter; + u16 duration = 0; + u8 sequence = 0; + u8 *p_ndpa_frame = buffer; + struct _RT_NDPA_STA_INFO sta_info; + u8 idx; + u8 dest_addr[6] = {0}; + struct _RT_BEAMFORMEE_ENTRY *entry = NULL; - boolean is_STA1 = false; + boolean is_STA1 = false; - - /* Fill the first MU BFee entry (STA1) MAC addr to destination address then + /* @Fill the first MU BFee entry (STA1) MAC addr to destination address then HW will change A1 to broadcast addr. 2015.05.28. Suggested by SD1 Chunchu. */ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { entry = &(beam_info->beamformee_entry[idx]); @@ -924,15 +890,15 @@ dbg_construct_vht_mundpa_packet( } } - /* Frame control.*/ + /* @Frame control.*/ SET_80211_HDR_FRAME_CONTROL(p_ndpa_frame, 0); SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, Type_NDPA); SET_80211_HDR_ADDRESS1(p_ndpa_frame, dest_addr); SET_80211_HDR_ADDRESS2(p_ndpa_frame, dm->CurrentAddress); - /*--------------------------------------------*/ - /* Need to modify "duration" to MU consideration. */ + /*@--------------------------------------------*/ + /* @ Need to modify "duration" to MU consideration. */ duration = 2 * a_SifsTime + 44; if (BW == CHANNEL_WIDTH_80) @@ -941,7 +907,7 @@ dbg_construct_vht_mundpa_packet( duration += 87; else duration += 180; - /*--------------------------------------------*/ + /*@--------------------------------------------*/ SET_80211_HDR_DURATION(p_ndpa_frame, duration); @@ -952,32 +918,32 @@ dbg_construct_vht_mundpa_packet( /*STA2's STA Info*/ sta_info.aid = entry->aid; - sta_info.feedback_type = 1; /* 1'b1: MU */ + sta_info.feedback_type = 1; /* @1'b1: MU */ sta_info.nc_index = 0; - PHYDM_DBG(dm, DBG_TXBF, "[%s] Get beamformee_entry idx(%d), AID =%d\n", __func__, idx, entry->aid); + PHYDM_DBG(dm, DBG_TXBF, "[%s] Get beamformee_entry idx(%d), AID =%d\n", + __func__, idx, entry->aid); odm_move_memory(dm, p_ndpa_frame + (*p_length), (u8 *)&sta_info, 2); *p_length += 2; - } boolean dbg_send_sw_vht_mundpa_packet( - void *dm_void, - enum channel_width BW -) + void *dm_void, + enum channel_width BW) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - PRT_TCB tcb; - PRT_TX_LOCAL_BUFFER p_buf; - boolean ret = true; - u8 ndp_tx_rate = 0; - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - void *adapter = beam_info->source_adapter; + struct dm_struct *dm = (struct dm_struct *)dm_void; + PRT_TCB tcb; + PRT_TX_LOCAL_BUFFER p_buf; + boolean ret = true; + u8 ndp_tx_rate = 0; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + void *adapter = beam_info->source_adapter; ndp_tx_rate = MGN_VHT2SS_MCS0; - PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate); + PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, + ndp_tx_rate); PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); @@ -986,8 +952,7 @@ dbg_send_sw_vht_mundpa_packet( dm, BW, p_buf->Buffer.VirtualAddress, - &tcb->PacketLength - ); + &tcb->PacketLength); tcb->bTxEnableSwCalcDur = true; tcb->BWOfPacket = BW; @@ -1006,70 +971,63 @@ dbg_send_sw_vht_mundpa_packet( return ret; } - -#endif /*#if (SUPPORT_MU_BF == 1)*/ -#endif /*#ifdef SUPPORT_MU_BF*/ - +#endif /*@#if (SUPPORT_MU_BF == 1)*/ +#endif /*@#ifdef SUPPORT_MU_BF*/ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -u32 -beamforming_get_report_frame( - void *dm_void, - union recv_frame *precv_frame -) +u32 beamforming_get_report_frame( + void *dm_void, + union recv_frame *precv_frame) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u32 ret = _SUCCESS; - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; - u8 *pframe = precv_frame->u.hdr.rx_data; - u32 frame_len = precv_frame->u.hdr.len; - u8 *TA; - u8 idx, offset; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 ret = _SUCCESS; + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; + u8 *pframe = precv_frame->u.hdr.rx_data; + u32 frame_len = precv_frame->u.hdr.len; + u8 *TA; + u8 idx, offset; - - /*Memory comparison to see if CSI report is the same with previous one*/ + /*@Memory comparison to see if CSI report is the same with previous one*/ TA = get_addr2_ptr(pframe); beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, TA, &idx); if (beamform_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU) - offset = 31; /*24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(nc=2)*/ + offset = 31; /*@24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(nc=2)*/ else if (beamform_entry->beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) - offset = 34; /*24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(nc=2)*/ + offset = 34; /*@24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(nc=2)*/ else return ret; - return ret; } - boolean send_fw_ht_ndpa_packet( - void *dm_void, - u8 *RA, - enum channel_width BW -) + void *dm_void, + u8 *RA, + enum channel_width BW) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _ADAPTER *adapter = dm->adapter; - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - struct rtw_ieee80211_hdr *pwlanhdr; - struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u8 action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; - u8 *pframe; - u16 *fctrl; - u16 duration = 0; - u8 a_sifs_time = 0, ndp_tx_rate = 0, idx = 0; - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ADAPTER *adapter = dm->adapter; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + struct rtw_ieee80211_hdr *pwlanhdr; + struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u8 action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; + u8 *pframe; + u16 *fctrl; + u16 duration = 0; + u8 a_sifs_time = 0, ndp_tx_rate = 0, idx = 0; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); pmgntframe = alloc_mgtxmitframe(pxmitpriv); if (pmgntframe == NULL) { - PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n", + __func__); return false; } @@ -1079,7 +1037,8 @@ send_fw_ht_ndpa_packet( pattrib->qsel = QSLT_BEACON; ndp_tx_rate = beamforming_get_htndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); - PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate); + PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, + ndp_tx_rate); pattrib->rate = ndp_tx_rate; pattrib->bwmode = BW; pattrib->order = 1; @@ -1115,7 +1074,7 @@ send_fw_ht_ndpa_packet( set_duration(pframe, duration); - /* HT control field */ + /* @HT control field */ SET_HT_CTRL_CSI_STEERING(pframe + 24, 3); SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe + 24, 1); @@ -1130,36 +1089,35 @@ send_fw_ht_ndpa_packet( return true; } - boolean send_sw_ht_ndpa_packet( - void *dm_void, - u8 *RA, - enum channel_width BW -) + void *dm_void, + u8 *RA, + enum channel_width BW) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _ADAPTER *adapter = dm->adapter; - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - struct rtw_ieee80211_hdr *pwlanhdr; - struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u8 action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; - u8 *pframe; - u16 *fctrl; - u16 duration = 0; - u8 a_sifs_time = 0, ndp_tx_rate = 0, idx = 0; - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ADAPTER *adapter = dm->adapter; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + struct rtw_ieee80211_hdr *pwlanhdr; + struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u8 action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; + u8 *pframe; + u16 *fctrl; + u16 duration = 0; + u8 a_sifs_time = 0, ndp_tx_rate = 0, idx = 0; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); ndp_tx_rate = beamforming_get_htndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); pmgntframe = alloc_mgtxmitframe(pxmitpriv); if (pmgntframe == NULL) { - PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n", + __func__); return false; } @@ -1202,7 +1160,7 @@ send_sw_ht_ndpa_packet( set_duration(pframe, duration); - /*HT control field*/ + /*@HT control field*/ SET_HT_CTRL_CSI_STEERING(pframe + 24, 3); SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe + 24, 1); @@ -1217,36 +1175,35 @@ send_sw_ht_ndpa_packet( return true; } - boolean send_fw_vht_ndpa_packet( - void *dm_void, - u8 *RA, - u16 AID, - enum channel_width BW -) + void *dm_void, + u8 *RA, + u16 AID, + enum channel_width BW) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _ADAPTER *adapter = dm->adapter; - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - struct rtw_ieee80211_hdr *pwlanhdr; - struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - u8 *pframe; - u16 *fctrl; - u16 duration = 0; - u8 sequence = 0, a_sifs_time = 0, ndp_tx_rate = 0, idx = 0; - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); - struct _RT_NDPA_STA_INFO sta_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ADAPTER *adapter = dm->adapter; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + struct rtw_ieee80211_hdr *pwlanhdr; + struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); + u8 *pframe; + u16 *fctrl; + u16 duration = 0; + u8 sequence = 0, a_sifs_time = 0, ndp_tx_rate = 0, idx = 0; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); + struct _RT_NDPA_STA_INFO sta_info; pmgntframe = alloc_mgtxmitframe(pxmitpriv); if (pmgntframe == NULL) { - PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n", + __func__); return false; } @@ -1257,7 +1214,8 @@ send_fw_vht_ndpa_packet( pattrib->qsel = QSLT_BEACON; ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); - PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate); + PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, + ndp_tx_rate); pattrib->rate = ndp_tx_rate; pattrib->bwmode = BW; pattrib->subtype = WIFI_NDPA; @@ -1318,40 +1276,39 @@ send_fw_vht_ndpa_packet( return true; } - - boolean send_sw_vht_ndpa_packet( - void *dm_void, - u8 *RA, - u16 AID, - enum channel_width BW -) + void *dm_void, + u8 *RA, + u16 AID, + enum channel_width BW) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _ADAPTER *adapter = dm->adapter; - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - struct rtw_ieee80211_hdr *pwlanhdr; - struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct _RT_NDPA_STA_INFO ndpa_sta_info; - u8 ndp_tx_rate = 0, sequence = 0, a_sifs_time = 0, idx = 0; - u8 *pframe; - u16 *fctrl; - u16 duration = 0; - struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); - struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ADAPTER *adapter = dm->adapter; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + struct rtw_ieee80211_hdr *pwlanhdr; + struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); + struct _RT_NDPA_STA_INFO ndpa_sta_info; + u8 ndp_tx_rate = 0, sequence = 0, a_sifs_time = 0, idx = 0; + u8 *pframe; + u16 *fctrl; + u16 duration = 0; + struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); + struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); - PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate); + PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, + ndp_tx_rate); pmgntframe = alloc_mgtxmitframe(pxmitpriv); if (pmgntframe == NULL) { - PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n", + __func__); return false; } @@ -1420,40 +1377,38 @@ send_sw_vht_ndpa_packet( return true; } - #endif - -void -beamforming_get_ndpa_frame( - void *dm_void, +void beamforming_get_ndpa_frame( + void *dm_void, #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - OCTET_STRING pdu_os + OCTET_STRING pdu_os #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) union recv_frame *precv_frame #endif -) + ) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 *TA ; - u8 idx, sequence; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 *TA; + u8 idx, sequence; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - u8 *p_ndpa_frame = pdu_os.Octet; + u8 *p_ndpa_frame = pdu_os.Octet; #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - u8 *p_ndpa_frame = precv_frame->u.hdr.rx_data; + u8 *p_ndpa_frame = precv_frame->u.hdr.rx_data; #endif - struct _RT_BEAMFORMER_ENTRY *beamformer_entry = NULL; /*Modified By Jeffery @2014-10-29*/ - + struct _RT_BEAMFORMER_ENTRY *beamformer_entry = NULL; /*@Modified By Jeffery @2014-10-29*/ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - RT_DISP_DATA(FBEAM, FBEAM_DATA, "beamforming_get_ndpa_frame\n", pdu_os.Octet, pdu_os.Length); + RT_DISP_DATA(FBEAM, FBEAM_DATA, "beamforming_get_ndpa_frame\n", + pdu_os.Octet, pdu_os.Length); if (IsCtrlNDPA(p_ndpa_frame) == false) #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) if (get_frame_sub_type(p_ndpa_frame) != WIFI_NDPA) #endif return; else if (!(dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821))) { - PHYDM_DBG(dm, DBG_TXBF, "[%s] not 8812 or 8821A, return\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "[%s] not 8812 or 8821A, return\n", + __func__); return; } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) @@ -1464,44 +1419,56 @@ beamforming_get_ndpa_frame( /*Remove signaling TA. */ TA[0] = TA[0] & 0xFE; - beamformer_entry = phydm_beamforming_get_bfer_entry_by_addr(dm, TA, &idx); /* Modified By Jeffery @2014-10-29 */ + beamformer_entry = phydm_beamforming_get_bfer_entry_by_addr(dm, TA, &idx); /* @Modified By Jeffery @2014-10-29 */ - /*Break options for Clock Reset*/ + /*@Break options for Clock Reset*/ if (beamformer_entry == NULL) return; else if (!(beamformer_entry->beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU)) return; - /*log_success: As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is NO LONGER needed !2015-04-10, Jeffery*/ - /*clock_reset_times: While BFer entry always doesn't receive our CSI, clock will reset again and again.So clock_reset_times is limited to 5 times.2015-04-13, Jeffery*/ + /*@log_success: As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is NO LONGER needed !2015-04-10, Jeffery*/ + /*@clock_reset_times: While BFer entry always doesn't receive our CSI, clock will reset again and again.So clock_reset_times is limited to 5 times.2015-04-13, Jeffery*/ else if ((beamformer_entry->log_success == 1) || (beamformer_entry->clock_reset_times == 5)) { - PHYDM_DBG(dm, DBG_TXBF, "[%s] log_seq=%d, pre_log_seq=%d, log_retry_cnt=%d, log_success=%d, clock_reset_times=%d, clock reset is no longer needed.\n", - __func__, beamformer_entry->log_seq, beamformer_entry->pre_log_seq, beamformer_entry->log_retry_cnt, beamformer_entry->log_success, beamformer_entry->clock_reset_times); + PHYDM_DBG(dm, DBG_TXBF, + "[%s] log_seq=%d, pre_log_seq=%d, log_retry_cnt=%d, log_success=%d, clock_reset_times=%d, clock reset is no longer needed.\n", + __func__, beamformer_entry->log_seq, + beamformer_entry->pre_log_seq, + beamformer_entry->log_retry_cnt, + beamformer_entry->log_success, + beamformer_entry->clock_reset_times); return; } sequence = (p_ndpa_frame[16]) >> 2; - PHYDM_DBG(dm, DBG_TXBF, "[%s] Start, sequence=%d, log_seq=%d, pre_log_seq=%d, log_retry_cnt=%d, clock_reset_times=%d, log_success=%d\n", - __func__, sequence, beamformer_entry->log_seq, beamformer_entry->pre_log_seq, beamformer_entry->log_retry_cnt, beamformer_entry->clock_reset_times, beamformer_entry->log_success); + PHYDM_DBG(dm, DBG_TXBF, + "[%s] Start, sequence=%d, log_seq=%d, pre_log_seq=%d, log_retry_cnt=%d, clock_reset_times=%d, log_success=%d\n", + __func__, sequence, beamformer_entry->log_seq, + beamformer_entry->pre_log_seq, + beamformer_entry->log_retry_cnt, + beamformer_entry->clock_reset_times, + beamformer_entry->log_success); - if ((beamformer_entry->log_seq != 0) && (beamformer_entry->pre_log_seq != 0)) { + if (beamformer_entry->log_seq != 0 && beamformer_entry->pre_log_seq != 0) { /*Success condition*/ - if ((beamformer_entry->log_seq != sequence) && (beamformer_entry->pre_log_seq != beamformer_entry->log_seq)) { - /* break option for clcok reset, 2015-03-30, Jeffery */ + if (beamformer_entry->log_seq != sequence && beamformer_entry->pre_log_seq != beamformer_entry->log_seq) { + /* @break option for clcok reset, 2015-03-30, Jeffery */ beamformer_entry->log_retry_cnt = 0; - /*As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is no longer needed.*/ + /*@As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is no longer needed.*/ /*That is, log_success is NOT needed to be reset to zero, 2015-04-13, Jeffery*/ beamformer_entry->log_success = 1; - } else {/*Fail condition*/ + } else { /*@Fail condition*/ if (beamformer_entry->log_retry_cnt == 5) { beamformer_entry->clock_reset_times++; beamformer_entry->log_retry_cnt = 0; - PHYDM_DBG(dm, DBG_TXBF, "[%s] Clock Reset!!! clock_reset_times=%d\n", - __func__, beamformer_entry->clock_reset_times); + PHYDM_DBG(dm, DBG_TXBF, + "[%s] Clock Reset!!! clock_reset_times=%d\n", + __func__, + beamformer_entry->clock_reset_times); hal_com_txbf_set(dm, TXBF_SET_SOUNDING_CLK, NULL); } else @@ -1512,9 +1479,6 @@ beamforming_get_ndpa_frame( /*Update log_seq & pre_log_seq*/ beamformer_entry->pre_log_seq = beamformer_entry->log_seq; beamformer_entry->log_seq = sequence; - } - - #endif diff --git a/hal/phydm/txbf/haltxbfinterface.h b/hal/phydm/txbf/haltxbfinterface.h index 7482ae4..b97aa34 100644 --- a/hal/phydm/txbf/haltxbfinterface.h +++ b/hal/phydm/txbf/haltxbfinterface.h @@ -25,87 +25,74 @@ #ifndef __HAL_TXBF_INTERFACE_H__ #define __HAL_TXBF_INTERFACE_H__ -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -#define a_SifsTime ((IS_WIRELESS_MODE_5G(adapter)|| IS_WIRELESS_MODE_N_24G(adapter))? 16 : 10) +#define a_SifsTime ((IS_WIRELESS_MODE_5G(adapter) || IS_WIRELESS_MODE_N_24G(adapter)) ? 16 : 10) -void -beamforming_gid_paid( - void *adapter, - PRT_TCB tcb -); +void beamforming_gid_paid( + void *adapter, + PRT_TCB tcb); enum rt_status beamforming_get_report_frame( - void *adapter, - PRT_RFD rfd, - POCTET_STRING p_pdu_os -); + void *adapter, + PRT_RFD rfd, + POCTET_STRING p_pdu_os); -void -beamforming_get_ndpa_frame( - void *dm_void, - OCTET_STRING pdu_os -); +void beamforming_get_ndpa_frame( + void *dm_void, + OCTET_STRING pdu_os); boolean send_fw_ht_ndpa_packet( - void *dm_void, - u8 *RA, - enum channel_width BW -); + void *dm_void, + u8 *RA, + enum channel_width BW); boolean send_fw_vht_ndpa_packet( - void *dm_void, - u8 *RA, - u16 AID, - enum channel_width BW -); + void *dm_void, + u8 *RA, + u16 AID, + enum channel_width BW); boolean send_sw_vht_ndpa_packet( - void *dm_void, - u8 *RA, - u16 AID, - enum channel_width BW -); + void *dm_void, + u8 *RA, + u16 AID, + enum channel_width BW); boolean send_sw_ht_ndpa_packet( - void *dm_void, - u8 *RA, - enum channel_width BW -); + void *dm_void, + u8 *RA, + enum channel_width BW); #if (SUPPORT_MU_BF == 1) enum rt_status beamforming_get_vht_gid_mgnt_frame( - void *adapter, - PRT_RFD rfd, - POCTET_STRING p_pdu_os -); + void *adapter, + PRT_RFD rfd, + POCTET_STRING p_pdu_os); boolean send_sw_vht_gid_mgnt_frame( - void *dm_void, - u8 *RA, - u8 idx -); + void *dm_void, + u8 *RA, + u8 idx); boolean send_sw_vht_bf_report_poll( - void *dm_void, - u8 *RA, - boolean is_final_poll -); + void *dm_void, + u8 *RA, + boolean is_final_poll); boolean send_sw_vht_mu_ndpa_packet( - void *dm_void, - enum channel_width BW -); + void *dm_void, + enum channel_width BW); #else #define beamforming_get_vht_gid_mgnt_frame(adapter, rfd, p_pdu_os) RT_STATUS_FAILURE #define send_sw_vht_gid_mgnt_frame(dm_void, RA) @@ -113,74 +100,65 @@ send_sw_vht_mu_ndpa_packet( #define send_sw_vht_mu_ndpa_packet(dm_void, BW) #endif - #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -u32 -beamforming_get_report_frame( - void *dm_void, - union recv_frame *precv_frame -); +u32 beamforming_get_report_frame( + void *dm_void, + union recv_frame *precv_frame); boolean send_fw_ht_ndpa_packet( - void *dm_void, - u8 *RA, - enum channel_width BW -); + void *dm_void, + u8 *RA, + enum channel_width BW); boolean send_sw_ht_ndpa_packet( - void *dm_void, - u8 *RA, - enum channel_width BW -); + void *dm_void, + u8 *RA, + enum channel_width BW); boolean send_fw_vht_ndpa_packet( - void *dm_void, - u8 *RA, - u16 AID, - enum channel_width BW -); + void *dm_void, + u8 *RA, + u16 AID, + enum channel_width BW); boolean send_sw_vht_ndpa_packet( - void *dm_void, - u8 *RA, - u16 AID, - enum channel_width BW -); + void *dm_void, + u8 *RA, + u16 AID, + enum channel_width BW); #endif -void -beamforming_get_ndpa_frame( - void *dm_void, +void beamforming_get_ndpa_frame( + void *dm_void, #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - OCTET_STRING pdu_os + OCTET_STRING pdu_os #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) union recv_frame *precv_frame #endif -); + ); boolean dbg_send_sw_vht_mundpa_packet( - void *dm_void, - enum channel_width BW -); + void *dm_void, + enum channel_width BW); #else #define beamforming_get_ndpa_frame(dm, _pdu_os) #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - #define beamforming_get_report_frame(adapter, precv_frame) RT_STATUS_FAILURE +#define beamforming_get_report_frame(adapter, precv_frame) RT_STATUS_FAILURE #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) - #define beamforming_get_report_frame(adapter, rfd, p_pdu_os) RT_STATUS_FAILURE - #define beamforming_get_vht_gid_mgnt_frame(adapter, rfd, p_pdu_os) RT_STATUS_FAILURE +#define beamforming_get_report_frame(adapter, rfd, p_pdu_os) RT_STATUS_FAILURE +#define beamforming_get_vht_gid_mgnt_frame(adapter, rfd, p_pdu_os) RT_STATUS_FAILURE #endif #define send_fw_ht_ndpa_packet(dm_void, RA, BW) #define send_sw_ht_ndpa_packet(dm_void, RA, BW) #define send_fw_vht_ndpa_packet(dm_void, RA, AID, BW) -#define send_sw_vht_ndpa_packet(dm_void, RA, AID, BW) +#define send_sw_vht_ndpa_packet(dm_void, RA, AID, BW) #define send_sw_vht_gid_mgnt_frame(dm_void, RA, idx) #define send_sw_vht_bf_report_poll(dm_void, RA, is_final_poll) #define send_sw_vht_mu_ndpa_packet(dm_void, BW) diff --git a/hal/phydm/txbf/haltxbfjaguar.c b/hal/phydm/txbf/haltxbfjaguar.c index 85eac44..18a47d4 100644 --- a/hal/phydm/txbf/haltxbfjaguar.c +++ b/hal/phydm/txbf/haltxbfjaguar.c @@ -12,90 +12,82 @@ * more details. * *****************************************************************************/ -/* ************************************************************ +/************************************************************* * Description: * * This file is for 8812/8821/8811 TXBF mechanism * - * ************************************************************ */ + ************************************************************/ #include "mp_precomp.h" #include "../phydm_precomp.h" -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) -void -hal_txbf_8812a_set_ndpa_rate( - void *dm_void, - u8 BW, - u8 rate -) +void hal_txbf_8812a_set_ndpa_rate( + void *dm_void, + u8 BW, + u8 rate) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8812A, (rate << 2 | BW)); - } -void -hal_txbf_jaguar_rf_mode( - void *dm_void, - struct _RT_BEAMFORMING_INFO *beam_info -) +void hal_txbf_jaguar_rf_mode( + void *dm_void, + struct _RT_BEAMFORMING_INFO *beam_info) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; if (dm->rf_type == RF_1T1R) return; PHYDM_DBG(dm, DBG_TXBF, "[%s] set TxIQGen\n", __func__); - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); /*RF mode table write enable*/ - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x1); /*RF mode table write enable*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1); /*RF mode table write enable*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x1); /*RF mode table write enable*/ if (beam_info->beamformee_su_cnt > 0) { /* Paath_A */ - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0x78000, 0x3); /*Select RX mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x3F7FF); /*Set Table data*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0x78000, 0x3); /*Select RX mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x3F7FF); /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0xE26BF); /*@Enable TXIQGEN in RX mode*/ /* Path_B */ - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0x78000, 0x3); /*Select RX mode*/ - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x3F7FF); /*Set Table data*/ - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0x78000, 0x3); /*Select RX mode*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x3F7FF); /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0xE26BF); /*@Enable TXIQGEN in RX mode*/ } else { /* Paath_A */ - odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0x78000, 0x3); /*Select RX mode*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x3F7FF); /*Set Table data*/ - odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0x78000, 0x3); /*Select RX mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x3F7FF); /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0xC26BF); /*@Disable TXIQGEN in RX mode*/ /* Path_B */ - odm_set_rf_reg(dm, RF_PATH_B, 0x30, 0x78000, 0x3); /*Select RX mode*/ - odm_set_rf_reg(dm, RF_PATH_B, 0x31, 0xfffff, 0x3F7FF); /*Set Table data*/ - odm_set_rf_reg(dm, RF_PATH_B, 0x32, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0x78000, 0x3); /*Select RX mode*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x3F7FF); /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0xC26BF); /*@Disable TXIQGEN in RX mode*/ } - odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); /*RF mode table write disable*/ - odm_set_rf_reg(dm, RF_PATH_B, 0xef, 0x80000, 0x0); /*RF mode table write disable*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x0); /*RF mode table write disable*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x0); /*RF mode table write disable*/ if (beam_info->beamformee_su_cnt > 0) - odm_set_bb_reg(dm, 0x80c, MASKBYTE1, 0x33); + odm_set_bb_reg(dm, R_0x80c, MASKBYTE1, 0x33); else - odm_set_bb_reg(dm, 0x80c, MASKBYTE1, 0x11); + odm_set_bb_reg(dm, R_0x80c, MASKBYTE1, 0x11); } - -void -hal_txbf_jaguar_download_ndpa( - void *dm_void, - u8 idx -) +void hal_txbf_jaguar_download_ndpa( + void *dm_void, + u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 u1b_tmp = 0, tmp_reg422 = 0, head_page; - u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0; - boolean is_send_beacon = false; - u8 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*default reseved 1 page for the IC type which is undefined.*/ - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; - void *adapter = dm->adapter; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 u1b_tmp = 0, tmp_reg422 = 0, head_page; + u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0; + boolean is_send_beacon = false; + u8 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*@default reseved 1 page for the IC type which is undefined.*/ + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; + void *adapter = dm->adapter; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) *dm->is_fw_dw_rsvd_page_in_progress = true; #endif @@ -110,15 +102,15 @@ hal_txbf_jaguar_download_ndpa( /*Set REG_CR bit 8. DMA beacon by SW.*/ u1b_tmp = odm_read_1byte(dm, REG_CR_8812A + 1); - odm_write_1byte(dm, REG_CR_8812A + 1, (u1b_tmp | BIT(0))); - + odm_write_1byte(dm, REG_CR_8812A + 1, (u1b_tmp | BIT(0))); /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ tmp_reg422 = odm_read_1byte(dm, REG_FWHW_TXQ_CTRL_8812A + 2); - odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8812A + 2, tmp_reg422 & (~BIT(6))); + odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8812A + 2, tmp_reg422 & (~BIT(6))); if (tmp_reg422 & BIT(6)) { - PHYDM_DBG(dm, DBG_TXBF, "SetBeamformDownloadNDPA_8812(): There is an adapter is sending beacon.\n"); + PHYDM_DBG(dm, DBG_TXBF, + "SetBeamformDownloadNDPA_8812(): There is an adapter is sending beacon.\n"); is_send_beacon = true; } @@ -126,17 +118,17 @@ hal_txbf_jaguar_download_ndpa( odm_write_1byte(dm, REG_TDECTRL_8812A + 1, head_page); do { - /*Clear beacon valid check bit.*/ + /*@Clear beacon valid check bit.*/ bcn_valid_reg = odm_read_1byte(dm, REG_TDECTRL_8812A + 2); odm_write_1byte(dm, REG_TDECTRL_8812A + 2, (bcn_valid_reg | BIT(0))); - /*download NDPA rsvd page.*/ + /*@download NDPA rsvd page.*/ if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU) beamforming_send_vht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->aid, p_beam_entry->sound_bw, BEACON_QUEUE); else beamforming_send_ht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE); - /*check rsvd page download OK.*/ + /*@check rsvd page download OK.*/ bcn_valid_reg = odm_read_1byte(dm, REG_TDECTRL_8812A + 2); count = 0; while (!(bcn_valid_reg & BIT(0)) && count < 20) { @@ -148,21 +140,22 @@ hal_txbf_jaguar_download_ndpa( } while (!(bcn_valid_reg & BIT(0)) && dl_bcn_count < 5); if (!(bcn_valid_reg & BIT(0))) - PHYDM_DBG(dm, DBG_TXBF, "%s Download RSVD page failed!\n", __func__); + PHYDM_DBG(dm, DBG_TXBF, "%s Download RSVD page failed!\n", + __func__); /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ odm_write_1byte(dm, REG_TDECTRL_8812A + 1, tx_page_bndy); /*To make sure that if there exists an adapter which would like to send beacon.*/ - /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ + /*@If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/ /*the beacon cannot be sent by HW.*/ - /*2010.06.23. Added by tynli.*/ + /*@2010.06.23. Added by tynli.*/ if (is_send_beacon) odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8812A + 2, tmp_reg422); - /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ - /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ + /*@Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ + /*@Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ u1b_tmp = odm_read_1byte(dm, REG_CR_8812A + 1); odm_write_1byte(dm, REG_CR_8812A + 1, (u1b_tmp & (~BIT(0)))); @@ -172,20 +165,17 @@ hal_txbf_jaguar_download_ndpa( #endif } - -void -hal_txbf_jaguar_fw_txbf_cmd( - void *dm_void -) +void hal_txbf_jaguar_fw_txbf_cmd( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 idx, period0 = 0, period1 = 0; - u8 PageNum0 = 0xFF, PageNum1 = 0xFF; - u8 u1_tx_bf_parm[3] = {0}; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 idx, period0 = 0, period1 = 0; + u8 PageNum0 = 0xFF, PageNum1 = 0xFF; + u8 u1_tx_bf_parm[3] = {0}; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { - /*Modified by David*/ + /*@Modified by David*/ if (beam_info->beamformee_entry[idx].is_used && beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { if (idx == 0) { if (beam_info->beamformee_entry[idx].is_sound) @@ -209,55 +199,53 @@ hal_txbf_jaguar_fw_txbf_cmd( odm_fill_h2c_cmd(dm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm); PHYDM_DBG(dm, DBG_TXBF, - "[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n", __func__, PageNum0, period0, PageNum1, period1); + "[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n", + __func__, PageNum0, period0, PageNum1, period1); } - -void -hal_txbf_jaguar_enter( - void *dm_void, - u8 bfer_bfee_idx -) +void hal_txbf_jaguar_enter( + void *dm_void, + u8 bfer_bfee_idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 i = 0; - u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4; - u8 bfee_idx = (bfer_bfee_idx & 0xF); - u32 csi_param; - struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY beamformee_entry; - struct _RT_BEAMFORMER_ENTRY beamformer_entry; - u16 sta_id = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i = 0; + u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4; + u8 bfee_idx = (bfer_bfee_idx & 0xF); + u32 csi_param; + struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY beamformee_entry; + struct _RT_BEAMFORMER_ENTRY beamformer_entry; + u16 sta_id = 0; PHYDM_DBG(dm, DBG_TXBF, "[%s]Start!\n", __func__); hal_txbf_jaguar_rf_mode(dm, beamforming_info); if (dm->rf_type == RF_2T2R) - odm_set_bb_reg(dm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x00000000); /*nc =2*/ + odm_set_bb_reg(dm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x00000000); /*nc =2*/ else - odm_set_bb_reg(dm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x01081008); /*nc =1*/ + odm_set_bb_reg(dm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x01081008); /*nc =1*/ - if ((beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) { + if (beamforming_info->beamformer_su_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) { beamformer_entry = beamforming_info->beamformer_entry[bfer_idx]; /*Sounding protocol control*/ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8812A, 0xCB); - /*MAC address/Partial AID of Beamformer*/ + /*@MAC address/Partial AID of Beamformer*/ if (bfer_idx == 0) { - for (i = 0; i < 6 ; i++) + for (i = 0; i < 6; i++) odm_write_1byte(dm, (REG_BFMER0_INFO_8812A + i), beamformer_entry.mac_addr[i]); - /*CSI report use legacy ofdm so don't need to fill P_AID. */ + /*@CSI report use legacy ofdm so don't need to fill P_AID. */ /*platform_efio_write_2byte(adapter, REG_BFMER0_INFO_8812A+6, beamform_entry.P_AID); */ } else { - for (i = 0; i < 6 ; i++) + for (i = 0; i < 6; i++) odm_write_1byte(dm, (REG_BFMER1_INFO_8812A + i), beamformer_entry.mac_addr[i]); - /*CSI report use legacy ofdm so don't need to fill P_AID.*/ + /*@CSI report use legacy ofdm so don't need to fill P_AID.*/ /*platform_efio_write_2byte(adapter, REG_BFMER1_INFO_8812A+6, beamform_entry.P_AID);*/ } - /*CSI report parameters of Beamformee*/ + /*@CSI report parameters of Beamformee*/ if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU) { if (dm->rf_type == RF_2T2R) csi_param = 0x01090109; @@ -278,8 +266,7 @@ hal_txbf_jaguar_enter( odm_write_1byte(dm, REG_SND_PTCL_CTRL_8812A + 3, 0x50); } - - if ((beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) { + if (beamforming_info->beamformee_su_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) { beamformee_entry = beamforming_info->beamformee_entry[bfee_idx]; if (phydm_acting_determine(dm, phydm_acting_as_ibss)) @@ -294,10 +281,10 @@ hal_txbf_jaguar_enter( } else odm_write_2byte(dm, REG_TXBF_CTRL_8812A + 2, sta_id | BIT(12) | BIT(14) | BIT(15)); - /*CSI report parameters of Beamformee*/ + /*@CSI report parameters of Beamformee*/ if (bfee_idx == 0) { - /*Get BIT24 & BIT25*/ - u8 tmp = odm_read_1byte(dm, REG_BFMEE_SEL_8812A + 3) & 0x3; + /*@Get BIT24 & BIT25*/ + u8 tmp = odm_read_1byte(dm, REG_BFMEE_SEL_8812A + 3) & 0x3; odm_write_1byte(dm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60); odm_write_2byte(dm, REG_BFMEE_SEL_8812A, sta_id | BIT(9)); @@ -309,17 +296,14 @@ hal_txbf_jaguar_enter( } } - -void -hal_txbf_jaguar_leave( - void *dm_void, - u8 idx -) +void hal_txbf_jaguar_leave( + void *dm_void, + u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; - struct _RT_BEAMFORMER_ENTRY beamformer_entry; - struct _RT_BEAMFORMEE_ENTRY beamformee_entry; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; + struct _RT_BEAMFORMER_ENTRY beamformer_entry; + struct _RT_BEAMFORMEE_ENTRY beamformee_entry; if (idx < BEAMFORMER_ENTRY_NUM) { beamformer_entry = beamforming_info->beamformer_entry[idx]; @@ -329,9 +313,9 @@ hal_txbf_jaguar_leave( PHYDM_DBG(dm, DBG_TXBF, "[%s]Start!, IDx = %d\n", __func__, idx); - /*Clear P_AID of Beamformee*/ - /*Clear MAC address of Beamformer*/ - /*Clear Associated Bfmee Sel*/ + /*@Clear P_AID of Beamformee*/ + /*@Clear MAC address of Beamformer*/ + /*@Clear Associated Bfmee Sel*/ if (beamformer_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) { odm_write_1byte(dm, REG_SND_PTCL_CTRL_8812A, 0xC8); @@ -360,21 +344,17 @@ hal_txbf_jaguar_leave( odm_write_2byte(dm, REG_BFMEE_SEL_8812A + 2, odm_read_2byte(dm, REG_BFMEE_SEL_8812A + 2) & 0x60); } } - } - -void -hal_txbf_jaguar_status( - void *dm_void, - u8 idx -) +void hal_txbf_jaguar_status( + void *dm_void, + u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u16 beam_ctrl_val; - u32 beam_ctrl_reg; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY beamform_entry = beam_info->beamformee_entry[idx]; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u16 beam_ctrl_val; + u32 beam_ctrl_reg; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY beamform_entry = beam_info->beamformee_entry[idx]; if (phydm_acting_determine(dm, phydm_acting_as_ibss)) beam_ctrl_val = beamform_entry.mac_id; @@ -388,7 +368,7 @@ hal_txbf_jaguar_status( beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15); } - if ((beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) && (beam_info->apply_v_matrix == true)) { + if (beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED && beam_info->apply_v_matrix == true) { if (beamform_entry.sound_bw == CHANNEL_WIDTH_20) beam_ctrl_val |= BIT(9); else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40) @@ -398,22 +378,19 @@ hal_txbf_jaguar_status( } else beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11)); - PHYDM_DBG(dm, DBG_TXBF, "[%s] beam_ctrl_val = 0x%x!\n", __func__, beam_ctrl_val); + PHYDM_DBG(dm, DBG_TXBF, "[%s] beam_ctrl_val = 0x%x!\n", __func__, + beam_ctrl_val); odm_write_2byte(dm, beam_ctrl_reg, beam_ctrl_val); } - - -void -hal_txbf_jaguar_fw_txbf( - void *dm_void, - u8 idx -) +void hal_txbf_jaguar_fw_txbf( + void *dm_void, + u8 idx) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; - struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -423,15 +400,12 @@ hal_txbf_jaguar_fw_txbf( hal_txbf_jaguar_fw_txbf_cmd(dm); } - -void -hal_txbf_jaguar_patch( - void *dm_void, - u8 operation -) +void hal_txbf_jaguar_patch( + void *dm_void, + u8 operation) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); @@ -445,31 +419,30 @@ hal_txbf_jaguar_patch( #endif } -void -hal_txbf_jaguar_clk_8812a( - void *dm_void -) +void hal_txbf_jaguar_clk_8812a( + void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u16 u2btmp; - u8 count = 0, u1btmp; - void *adapter = dm->adapter; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u16 u2btmp; + u8 count = 0, u1btmp; + void *adapter = dm->adapter; PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); - if (*(dm->is_scan_in_process)) { + if (*dm->is_scan_in_process) { PHYDM_DBG(dm, DBG_TXBF, "[%s] return by Scan\n", __func__); return; } #if DEV_BUS_TYPE == RT_PCI_INTERFACE /*Stop PCIe TxDMA*/ - odm_write_1byte(dm, REG_PCIE_CTRL_REG_8812A + 1, 0xFE); + if (dm->support_interface == ODM_ITRF_PCIE) + odm_write_1byte(dm, REG_PCIE_CTRL_REG_8812A + 1, 0xFE); #endif - /*Stop Usb TxDMA*/ +/*Stop Usb TxDMA*/ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) RT_DISABLE_FUNC((PADAPTER)adapter, DF_TX_BIT); - PlatformReturnAllPendingTxPackets((PADAPTER)adapter); + PlatformReturnAllPendingTxPackets(adapter); #else rtw_write_port_cancel(adapter); #endif @@ -496,7 +469,6 @@ hal_txbf_jaguar_clk_8812a( break; } - /*Stop RX DMA path*/ u1btmp = odm_read_1byte(dm, REG_RXDMA_CONTROL_8812A); odm_write_1byte(dm, REG_RXDMA_CONTROL_8812A, u1btmp | BIT(2)); @@ -509,25 +481,25 @@ hal_txbf_jaguar_clk_8812a( ODM_delay_ms(10); } - /*Disable clock*/ + /*@Disable clock*/ odm_write_1byte(dm, REG_SYS_CLKR_8812A + 1, 0xf0); - /*Disable 320M*/ + /*@Disable 320M*/ odm_write_1byte(dm, REG_AFE_PLL_CTRL_8812A + 3, 0x8); - /*Enable 320M*/ + /*@Enable 320M*/ odm_write_1byte(dm, REG_AFE_PLL_CTRL_8812A + 3, 0xa); - /*Enable clock*/ + /*@Enable clock*/ odm_write_1byte(dm, REG_SYS_CLKR_8812A + 1, 0xfc); - /*Release Tx pause*/ odm_write_1byte(dm, REG_TXPAUSE_8812A, 0); - /*Enable RX DMA path*/ + /*@Enable RX DMA path*/ u1btmp = odm_read_1byte(dm, REG_RXDMA_CONTROL_8812A); odm_write_1byte(dm, REG_RXDMA_CONTROL_8812A, u1btmp & (~BIT(2))); #if DEV_BUS_TYPE == RT_PCI_INTERFACE - /*Enable PCIe TxDMA*/ - odm_write_1byte(dm, REG_PCIE_CTRL_REG_8812A + 1, 0); + /*@Enable PCIe TxDMA*/ + if (dm->support_interface == ODM_ITRF_PCIE) + odm_write_1byte(dm, REG_PCIE_CTRL_REG_8812A + 1, 0); #endif /*Start Usb TxDMA*/ RT_ENABLE_FUNC((PADAPTER)adapter, DF_TX_BIT); @@ -535,6 +507,4 @@ hal_txbf_jaguar_clk_8812a( #endif - - #endif diff --git a/hal/phydm/txbf/haltxbfjaguar.h b/hal/phydm/txbf/haltxbfjaguar.h index 1b89675..2c9a623 100644 --- a/hal/phydm/txbf/haltxbfjaguar.h +++ b/hal/phydm/txbf/haltxbfjaguar.h @@ -25,74 +25,54 @@ #ifndef __HAL_TXBF_JAGUAR_H__ #define __HAL_TXBF_JAGUAR_H__ #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) -#if (BEAMFORMING_SUPPORT == 1) +#ifdef PHYDM_BEAMFORMING_SUPPORT -void -hal_txbf_8812a_set_ndpa_rate( - void *dm_void, - u8 BW, - u8 rate -); +void hal_txbf_8812a_set_ndpa_rate( + void *dm_void, + u8 BW, + u8 rate); +void hal_txbf_jaguar_enter( + void *dm_void, + u8 idx); -void -hal_txbf_jaguar_enter( - void *dm_void, - u8 idx -); +void hal_txbf_jaguar_leave( + void *dm_void, + u8 idx); +void hal_txbf_jaguar_status( + void *dm_void, + u8 idx); -void -hal_txbf_jaguar_leave( - void *dm_void, - u8 idx -); +void hal_txbf_jaguar_fw_txbf( + void *dm_void, + u8 idx); +void hal_txbf_jaguar_patch( + void *dm_void, + u8 operation); -void -hal_txbf_jaguar_status( - void *dm_void, - u8 idx -); - - -void -hal_txbf_jaguar_fw_txbf( - void *dm_void, - u8 idx -); - - -void -hal_txbf_jaguar_patch( - void *dm_void, - u8 operation -); - - -void -hal_txbf_jaguar_clk_8812a( - void *dm_void -); +void hal_txbf_jaguar_clk_8812a( + void *dm_void); #else -#define hal_txbf_8812a_set_ndpa_rate(dm_void, BW, rate) +#define hal_txbf_8812a_set_ndpa_rate(dm_void, BW, rate) #define hal_txbf_jaguar_enter(dm_void, idx) #define hal_txbf_jaguar_leave(dm_void, idx) #define hal_txbf_jaguar_status(dm_void, idx) -#define hal_txbf_jaguar_fw_txbf(dm_void, idx) +#define hal_txbf_jaguar_fw_txbf(dm_void, idx) #define hal_txbf_jaguar_patch(dm_void, operation) #define hal_txbf_jaguar_clk_8812a(dm_void) #endif #else -#define hal_txbf_8812a_set_ndpa_rate(dm_void, BW, rate) +#define hal_txbf_8812a_set_ndpa_rate(dm_void, BW, rate) #define hal_txbf_jaguar_enter(dm_void, idx) #define hal_txbf_jaguar_leave(dm_void, idx) #define hal_txbf_jaguar_status(dm_void, idx) -#define hal_txbf_jaguar_fw_txbf(dm_void, idx) +#define hal_txbf_jaguar_fw_txbf(dm_void, idx) #define hal_txbf_jaguar_patch(dm_void, operation) #define hal_txbf_jaguar_clk_8812a(dm_void) #endif -#endif /* #ifndef __HAL_TXBF_JAGUAR_H__ */ +#endif /* @#ifndef __HAL_TXBF_JAGUAR_H__ */ diff --git a/hal/phydm/txbf/phydm_hal_txbf_api.c b/hal/phydm/txbf/phydm_hal_txbf_api.c index 6e9be14..bc65b6a 100644 --- a/hal/phydm/txbf/phydm_hal_txbf_api.c +++ b/hal/phydm/txbf/phydm_hal_txbf_api.c @@ -17,19 +17,17 @@ #include "phydm_precomp.h" #if (defined(CONFIG_BB_TXBF_API)) -#if (RTL8822B_SUPPORT == 1) -/*Add by YuChen for 8822B MU-MIMO API*/ +#if (RTL8822B_SUPPORT == 1 || RTL8192F_SUPPORT == 1 ||\ + RTL8822C_SUPPORT == 1 || RTL8198F_SUPPORT == 1 || RTL8814B_SUPPORT == 1) +/*@Add by YuChen for 8822B MU-MIMO API*/ /*this function is only used for BFer*/ -u8 -phydm_get_ndpa_rate( - void *dm_void -) +u8 phydm_get_ndpa_rate(void *dm_void) { - struct dm_struct *dm = (struct dm_struct *)dm_void; - u8 ndpa_rate = ODM_RATE6M; + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 ndpa_rate = ODM_RATE6M; - if (dm->rssi_min >= 30) /*link RSSI > 30%*/ + if (dm->rssi_min >= 30) /*@link RSSI > 30%*/ ndpa_rate = ODM_RATE24M; else if (dm->rssi_min <= 25) ndpa_rate = ODM_RATE6M; @@ -37,55 +35,49 @@ phydm_get_ndpa_rate( PHYDM_DBG(dm, DBG_TXBF, "[%s] ndpa_rate = 0x%x\n", __func__, ndpa_rate); return ndpa_rate; - } /*this function is only used for BFer*/ -u8 -phydm_get_beamforming_sounding_info( - void *dm_void, - u16 *troughput, - u8 total_bfee_num, - u8 *tx_rate -) +u8 phydm_get_beamforming_sounding_info(void *dm_void, u16 *throughput, + u8 total_bfee_num, u8 *tx_rate) { - u8 idx = 0; - u8 soundingdecision = 0xff; - struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 idx = 0; + u8 snddecision = 0xff; + struct dm_struct *dm = (struct dm_struct *)dm_void; for (idx = 0; idx < total_bfee_num; idx++) { if (dm->support_ic_type & (ODM_RTL8814A)) { - if (((tx_rate[idx] >= ODM_RATEVHTSS3MCS7) && (tx_rate[idx] <= ODM_RATEVHTSS3MCS9))) - soundingdecision = soundingdecision & ~(1 << idx); - } else if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8822C | ODM_RTL8812)) { - if (((tx_rate[idx] >= ODM_RATEVHTSS2MCS7) && (tx_rate[idx] <= ODM_RATEVHTSS2MCS9))) - soundingdecision = soundingdecision & ~(1 << idx); + if ((tx_rate[idx] >= ODM_RATEVHTSS3MCS7 && + tx_rate[idx] <= ODM_RATEVHTSS3MCS9)) + snddecision = snddecision & ~(1 << idx); + } else if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8822C | + ODM_RTL8812 | ODM_RTL8192F)) { + if ((tx_rate[idx] >= ODM_RATEVHTSS2MCS7 && + tx_rate[idx] <= ODM_RATEVHTSS2MCS9)) + snddecision = snddecision & ~(1 << idx); } else if (dm->support_ic_type & (ODM_RTL8814B)) { - if (((tx_rate[idx] >= ODM_RATEVHTSS4MCS7) && (tx_rate[idx] <= ODM_RATEVHTSS4MCS9))) - soundingdecision = soundingdecision & ~(1 << idx); + if ((tx_rate[idx] >= ODM_RATEVHTSS4MCS7 && + tx_rate[idx] <= ODM_RATEVHTSS4MCS9)) + snddecision = snddecision & ~(1 << idx); } } for (idx = 0; idx < total_bfee_num; idx++) { - if (troughput[idx] <= 10) - soundingdecision = soundingdecision & ~(1 << idx); + if (throughput[idx] <= 10) + snddecision = snddecision & ~(1 << idx); } - PHYDM_DBG(dm, DBG_TXBF, "[%s] soundingdecision = 0x%x\n", __func__, soundingdecision); - - return soundingdecision; + PHYDM_DBG(dm, DBG_TXBF, "[%s] soundingdecision = 0x%x\n", __func__, + snddecision); + return snddecision; } /*this function is only used for BFer*/ -u8 -phydm_get_mu_bfee_snding_decision( - void *dm_void, - u16 throughput -) +u8 phydm_get_mu_bfee_snding_decision(void *dm_void, u16 throughput) { - u8 snding_score = 0; - struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 snding_score = 0; + struct dm_struct *dm = (struct dm_struct *)dm_void; /*throughput unit is Mbps*/ if (throughput >= 500) @@ -111,31 +103,26 @@ phydm_get_mu_bfee_snding_decision( else snding_score = 0; - PHYDM_DBG(dm, DBG_TXBF, "[%s] snding_score = 0x%x\n", __func__, snding_score); + PHYDM_DBG(dm, DBG_TXBF, "[%s] snding_score = 0x%x\n", __func__, + snding_score); return snding_score; - } - #endif #if (DM_ODM_SUPPORT_TYPE != ODM_AP) -u8 -beamforming_get_htndp_tx_rate( - void *dm_void, - u8 comp_steering_num_of_bfer -) +u8 beamforming_get_htndp_tx_rate(void *dm_void, u8 bfer_str_num) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; u8 nr_index = 0; u8 ndp_tx_rate; - /*Find nr*/ +/*@Find nr*/ #if (RTL8814A_SUPPORT == 1) if (dm->support_ic_type & ODM_RTL8814A) - nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(dm), comp_steering_num_of_bfer); + nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(dm), bfer_str_num); else #endif - nr_index = tx_bf_nr(1, comp_steering_num_of_bfer); + nr_index = tx_bf_nr(1, bfer_str_num); switch (nr_index) { case 1: @@ -156,25 +143,20 @@ beamforming_get_htndp_tx_rate( } return ndp_tx_rate; - } -u8 -beamforming_get_vht_ndp_tx_rate( - void *dm_void, - u8 comp_steering_num_of_bfer -) +u8 beamforming_get_vht_ndp_tx_rate(void *dm_void, u8 bfer_str_num) { - struct dm_struct *dm = (struct dm_struct *)dm_void; + struct dm_struct *dm = (struct dm_struct *)dm_void; u8 nr_index = 0; u8 ndp_tx_rate; - /*Find nr*/ +/*@Find nr*/ #if (RTL8814A_SUPPORT == 1) if (dm->support_ic_type & ODM_RTL8814A) - nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(dm), comp_steering_num_of_bfer); + nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(dm), bfer_str_num); else #endif - nr_index = tx_bf_nr(1, comp_steering_num_of_bfer); + nr_index = tx_bf_nr(1, bfer_str_num); switch (nr_index) { case 1: @@ -195,8 +177,452 @@ beamforming_get_vht_ndp_tx_rate( } return ndp_tx_rate; - } #endif +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT +/*this function is only used for BFer*/ +void phydm_txbf_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i; + + if (dm->rf_type == RF_1T1R) + return; +#if (RTL8822C_SUPPORT) + if (dm->support_ic_type == ODM_RTL8822C) { + if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { + /*Path A ==================*/ + /*RF mode table write enable*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, BIT(19), 0x1); + /*Select RX mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, 0xF, 3); + /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x3e, 0x3, 0x2); + /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0xfffff, + 0x65AFF); + /*RF mode table write disable*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, BIT(19), 0x0); + + /*Path B ==================*/ + /*RF mode table write enable*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, BIT(19), 0x1); + /*Select RX mode*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x33, 0xF, 3); + /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x3f, 0xfffff, + 0x996BF); + /*Select Standby mode*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x33, 0xF, 1); + /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x3f, 0xfffff, + 0x99230); + /*RF mode table write disable*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, BIT(19), 0x0); + } + + /*@if Nsts > Nc, don't apply V matrix*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1); + + if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { + /*@enable BB TxBF ant mapping register*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2); + odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1); + + /* logic mapping */ + /* TX BF logic map and TX path en for Nsts = 1~2 */ + odm_set_bb_reg(dm, R_0x820, 0xff, 0x33); + odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0x404); + odm_set_bb_reg(dm, R_0x820, 0xffff0000, 0x33); + odm_set_bb_reg(dm, R_0x1e30, 0xffff, 0x404); + } else { + /*@Disable BB TxBF ant mapping register*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0); + odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0); + /*@1SS~2ss A, AB*/ + odm_set_bb_reg(dm, R_0x820, 0xff, 0x31); + odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0x400); + } + } #endif +#if (RTL8812F_SUPPORT) + if (dm->support_ic_type == ODM_RTL8812F) { + if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { + /*Path A ==================*/ + /*RF mode table write enable*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, BIT(19), 0x1); + /*Select RX mode*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, 0xF, 3); + /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x3e, 0x3, 0x3); + /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0xfffff, + 0x61AFE); + /*RF mode table write disable*/ + odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, BIT(19), 0x0); + + /*Path B ==================*/ + /*RF mode table write enable*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, BIT(19), 0x1); + /*Select RX mode*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x33, 0xF, 3); + /*Set Table data*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0x3f, 0xfffff, + 0xD86BF); + /*RF mode table write disable*/ + odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, BIT(19), 0x0); + } + + /*@if Nsts > Nc, don't apply V matrix*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1); + + if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { + /*@enable BB TxBF ant mapping register*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2); + odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1); + + /* logic mapping */ + /* TX BF logic map and TX path en for Nsts = 1~2 */ + odm_set_bb_reg(dm, R_0x820, 0xff, 0x33); + odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0x404); + odm_set_bb_reg(dm, R_0x820, 0xffff0000, 0x33); + odm_set_bb_reg(dm, R_0x1e30, 0xffff, 0x404); + } else { + /*@Disable BB TxBF ant mapping register*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0); + odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0); + /*@1SS~2ss A, AB*/ + odm_set_bb_reg(dm, R_0x820, 0xff, 0x31); + odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0x400); + } + } +#endif +#if (RTL8814B_SUPPORT) + if (dm->support_ic_type == ODM_RTL8814B) { + if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { + for (i = RF_PATH_A; i <= RF_PATH_D; i++) { + /*RF mode table write enable*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, + BIT(19), 0x1); + /*Select RX mode*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, + 0xF, 2); + /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, + 0xfffff, 0x3fc); + /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, + 0xfffff, 0x280f7); + /*Select RX mode*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, + 0xF, 3); + /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, + 0xfffff, 0x365); + /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, + 0xfffff, 0xafcf7); + /*RF mode table write disable*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, + BIT(19), 0x0); + } + } + /*@if Nsts > Nc, don't apply V matrix*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1); + + if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { + /*@enable BB TxBF ant mapping register*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2); + odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1); + + /* logic mapping */ + /* TX BF logic map and TX path en for Nsts = 1~4 */ + odm_set_bb_reg(dm, R_0x820, 0xffff0000, 0xffff); + /*verification path-AC*/ + odm_set_bb_reg(dm, R_0x1e30, 0xffffffff, 0xe4e4e4e4); + } else { + /*@Disable BB TxBF ant mapping register*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0); + odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0); + /*@1SS~4ss A, AB, ABC, ABCD*/ + odm_set_bb_reg(dm, R_0x820, 0xffff, 0xf731); + odm_set_bb_reg(dm, R_0x1e2c, 0xffffffff, 0xe4240400); + } + } +#endif +#if (RTL8198F_SUPPORT) + if (dm->support_ic_type == ODM_RTL8198F) { + if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { + for (i = RF_PATH_A; i <= RF_PATH_D; i++) { + /*RF mode table write enable*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, + BIT(19), 0x1); + /*Select RX mode*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x30, + 0xfffff, 0x18000); + /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x31, + 0xfffff, 0x4f); + /*Select RX mode*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x32, + 0xfffff, 0x71fc0); + /*RF mode table write disable*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, + BIT(19), 0x0); + } + } + /*@if Nsts > Nc, don't apply V matrix*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1); + + if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { + /*@enable BB TxBF ant mapping register*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2); + odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1); + + /* logic mapping */ + /* TX BF logic map and TX path en for Nsts = 1~4 */ + odm_set_bb_reg(dm, R_0x820, 0xffff0000, 0xffff); + odm_set_bb_reg(dm, R_0x1e30, 0xffffffff, 0xe4e4e4e4); + } else { + /*@Disable BB TxBF ant mapping register*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0); + odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0); + /*@1SS~4ss A, AB, ABC, ABCD*/ + odm_set_bb_reg(dm, R_0x820, 0xffff, 0xf731); + odm_set_bb_reg(dm, R_0x1e2c, 0xffffffff, 0xe4240400); + } + } +#endif +} + +void phydm_mu_rsoml_reset(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_bf_rate_info_jgr3 *rateinfo = &dm->bf_rate_info_jgr3; + + PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s cnt reset\n", __func__); + + odm_memory_set(dm, &rateinfo->num_mu_vht_pkt[0], 0, VHT_RATE_NUM * 2); + odm_memory_set(dm, &rateinfo->num_qry_vht_pkt[0], 0, VHT_RATE_NUM * 2); +} + +void phydm_mu_rsoml_init(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_bf_rate_info_jgr3 *rateinfo = &dm->bf_rate_info_jgr3; + + PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s - cnt init\n", __func__); + + rateinfo->enable = 1; + rateinfo->mu_ratio_th = 30; + rateinfo->pre_mu_ratio = 0; + phydm_mu_rsoml_reset(dm); +} + +void phydm_mu_rsoml_decision(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_bf_rate_info_jgr3 *rateinfo = &dm->bf_rate_info_jgr3; + u8 offset = 0; + u32 mu_ratio = 0; + u32 su_pkt = 0; + u32 mu_pkt = 0; + u32 total_pkt = 0; + + PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML Decision eanble: %d\n", + rateinfo->enable); + + if (!rateinfo->enable) + return; + + for (offset = 0; offset < VHT_RATE_NUM; offset++) { + mu_pkt += rateinfo->num_mu_vht_pkt[offset]; + su_pkt += rateinfo->num_qry_vht_pkt[offset]; + } + total_pkt = su_pkt + mu_pkt; + + if (total_pkt == 0) + mu_ratio = 0; + else + mu_ratio = (mu_pkt * 100) / total_pkt; // unit:% + + PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] MU rx ratio: %d, total pkt: %d\n", + mu_ratio, total_pkt); + + if (mu_ratio > rateinfo->mu_ratio_th && + rateinfo->pre_mu_ratio > rateinfo->mu_ratio_th) + PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); + else if (mu_ratio <= rateinfo->mu_ratio_th && + rateinfo->pre_mu_ratio <= rateinfo->mu_ratio_th) + PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); + else if (mu_ratio > rateinfo->mu_ratio_th) + odm_set_bb_reg(dm, R_0xc00, BIT(26), 0); + else + odm_set_bb_reg(dm, R_0xc00, BIT(26), 1); + + rateinfo->pre_mu_ratio = mu_ratio; + + phydm_mu_rsoml_reset(dm); +} + +void phydm_txbf_avoid_hang(void *dm_void) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + /* avoid CCK CCA hang when the BF mode */ + odm_set_bb_reg(dm, R_0x1e6c, 0x100000, 0x1); +} + +#if (RTL8814B_SUPPORT == 1) +void phydm_txbf_80p80_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u8 i; + + if (dm->rf_type == RF_1T1R) + return; + + if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { + for (i = RF_PATH_A; i <= RF_PATH_D; i += 3) { + /*RF mode table write enable*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), + 0x1); + /*Select RX mode*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 2); + /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, 0xfffff, + 0x3fc); + /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff, + 0x280f7); + /*Select RX mode*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 3); + /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, 0xfffff, + 0x365); + /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff, + 0xafcf7); + /*RF mode table write disable*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), + 0x0); + } + for (i = RF_PATH_B; i <= RF_PATH_C; i++) { + /*RF mode table write enable*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), + 0x1); + /*Select RX mode*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 2); + /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff, + 0x280c7); + /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff, + 0x280c7); + /*Select RX mode*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 3); + /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, 0xfffff, + 0x365); + /*Set Table data*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff, + 0xafcc7); + /*RF mode table write disable*/ + odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), + 0x0); + } + } + /*@if Nsts > Nc, don't apply V matrix*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1); + + if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { + /*@enable BB TxBF ant mapping register*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2); + odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1); + + /* logic mapping */ + /* TX BF logic map and TX path en for Nsts = 1~2 */ + odm_set_bb_reg(dm, R_0x820, 0xff0000, 0x33); /*seg0*/ + odm_set_bb_reg(dm, R_0x824, 0xff00, 0xcc); /*seg1*/ + odm_set_bb_reg(dm, R_0x1e30, 0xffff, 0xe4e4); + + } else { + /*@Disable BB TxBF ant mapping register*/ + odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0); + odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0); + /*@1SS~2ss A, AB*/ + odm_set_bb_reg(dm, R_0x820, 0xff, 0x31); /*seg0*/ + odm_set_bb_reg(dm, R_0x824, 0xff, 0xc8); /*seg1*/ + odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0xe420); + } +} +#endif +#endif /*PHYSTS_3RD_TYPE_IC*/ + +void phydm_bf_debug(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + char help[] = "-h"; + u32 var1[3] = {0}; + u32 i; + + if ((strcmp(input[1], help) == 0)) { + PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, + "{BF ver1 :0}, {NO applyV:0; applyV:1; default:2}\n"); + PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, + "{MU RSOML:1}, {MU enable:1/0}, {MU Ratio:40}\n"); + return; + } + for (i = 0; i < 3; i++) { + if (input[i + 1]) + PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); + } + if (var1[0] == 0) { + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + #ifdef PHYDM_BEAMFORMING_SUPPORT + struct _RT_BEAMFORMING_INFO *beamforming_info = NULL; + + beamforming_info = &dm->beamforming_info; + + if (var1[1] == 0) { + beamforming_info->apply_v_matrix = false; + beamforming_info->snding3ss = true; + PDM_SNPF(*_out_len, *_used, output + *_used, + *_out_len - *_used, + "\r\n dont apply V matrix and 3SS 789 snding\n"); + } else if (var1[1] == 1) { + beamforming_info->apply_v_matrix = true; + beamforming_info->snding3ss = true; + PDM_SNPF(*_out_len, *_used, output + *_used, + *_out_len - *_used, + "\r\n apply V matrix and 3SS 789 snding\n"); + } else if (var1[1] == 2) { + beamforming_info->apply_v_matrix = true; + beamforming_info->snding3ss = false; + PDM_SNPF(*_out_len, *_used, output + *_used, + *_out_len - *_used, + "\r\n default txbf setting\n"); + } else { + PDM_SNPF(*_out_len, *_used, output + *_used, + *_out_len - *_used, + "\r\n unknown cmd!!\n"); + } + #endif + #endif + } else if (var1[0] == 1) { + #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct phydm_bf_rate_info_jgr3 *bfinfo = &dm->bf_rate_info_jgr3; + + bfinfo->enable = (u8)var1[1]; + bfinfo->mu_ratio_th = (u8)var1[2]; + PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, + "[MU RSOML] enable= %d, MU ratio TH= %d\n", + bfinfo->enable, bfinfo->mu_ratio_th); + #endif + } +} + +#endif /*CONFIG_BB_TXBF_API*/ diff --git a/hal/phydm/txbf/phydm_hal_txbf_api.h b/hal/phydm/txbf/phydm_hal_txbf_api.h index e31dab6..ee1788c 100644 --- a/hal/phydm/txbf/phydm_hal_txbf_api.h +++ b/hal/phydm/txbf/phydm_hal_txbf_api.h @@ -22,54 +22,64 @@ * Larry Finger * *****************************************************************************/ -#ifndef __PHYDM_HAL_TXBF_API_H__ +#ifndef __PHYDM_HAL_TXBF_API_H__ #define __PHYDM_HAL_TXBF_API_H__ #if (defined(CONFIG_BB_TXBF_API)) #if (DM_ODM_SUPPORT_TYPE != ODM_AP) +#if defined(DM_ODM_CE_MAC80211) +#define tx_bf_nr(a, b) ({ \ + u8 __tx_bf_nr_a = (a); \ + u8 __tx_bf_nr_b = (b); \ + ((__tx_bf_nr_a > __tx_bf_nr_b) ? (__tx_bf_nr_b) : (__tx_bf_nr_a)); }) +#else #define tx_bf_nr(a, b) ((a > b) ? (b) : (a)) +#endif -u8 -beamforming_get_htndp_tx_rate( - void *dm_void, - u8 comp_steering_num_of_bfer -); +u8 beamforming_get_htndp_tx_rate(void *dm_void, u8 bfer_str_num); -u8 -beamforming_get_vht_ndp_tx_rate( - void *dm_void, - u8 comp_steering_num_of_bfer -); +u8 beamforming_get_vht_ndp_tx_rate(void *dm_void, u8 bfer_str_num); #endif -#if (RTL8822B_SUPPORT == 1) -u8 -phydm_get_beamforming_sounding_info( - void *dm_void, - u16 *troughput, - u8 total_bfee_num, - u8 *tx_rate -); +#if (RTL8822B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8192F_SUPPORT == 1 ||\ + RTL8814B_SUPPORT == 1 || RTL8198F_SUPPORT == 1) -u8 -phydm_get_ndpa_rate( - void *dm_void -); +u8 phydm_get_beamforming_sounding_info(void *dm_void, u16 *throughput, + u8 total_bfee_num, u8 *tx_rate); +u8 phydm_get_ndpa_rate(void *dm_void); -u8 -phydm_get_mu_bfee_snding_decision( - void *dm_void, - u16 throughput -); +u8 phydm_get_mu_bfee_snding_decision(void *dm_void, u16 throughput); #else -#define phydm_get_beamforming_sounding_info(dm_void, troughput, total_bfee_num, tx_rate) 0 -#define phydm_get_ndpa_rate(dm_void) -#define phydm_get_mu_bfee_snding_decision(dm_void, troughput) +#define phydm_get_beamforming_sounding_info(dm, tp, bfee_num, rate) 0 +#define phydm_get_ndpa_rate(dm) +#define phydm_get_mu_bfee_snding_decision(dm, tp) #endif +#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT +struct phydm_bf_rate_info_jgr3 { + u8 enable; + u8 mu_ratio_th; + u32 pre_mu_ratio; + u16 num_mu_vht_pkt[VHT_RATE_NUM]; + u16 num_qry_vht_pkt[VHT_RATE_NUM]; +}; + +/*this function is only used for BFer*/ +void phydm_txbf_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt); +void phydm_txbf_avoid_hang(void *dm_void); +void phydm_mu_rsoml_init(void *dm_void); +void phydm_mu_rsoml_decision(void *dm_void); + +#if (RTL8814B_SUPPORT == 1) +void phydm_txbf_80p80_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt); +#endif + +#endif /*#PHYDM_IC_JGR3_SERIES_SUPPORT*/ +void phydm_bf_debug(void *dm_void, char input[][16], u32 *_used, char *output, + u32 *_out_len); #endif #endif diff --git a/hal/rtl8188e/rtl8188e_cmd.c b/hal/rtl8188e/rtl8188e_cmd.c index 5b38828..be0a747 100644 --- a/hal/rtl8188e/rtl8188e_cmd.c +++ b/hal/rtl8188e/rtl8188e_cmd.c @@ -174,22 +174,6 @@ u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter *padapter , u8 bfwpoll, u16 period) } #endif /* CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED */ #endif -u8 rtl8188e_set_rssi_cmd(_adapter *padapter, u8 *param) -{ - u8 res = _SUCCESS; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - if (pHalData->fw_ractrl == _FALSE) { - RTW_INFO("==>%s fw dont support RA\n", __FUNCTION__); - return _FAIL; - } - - *((u32 *) param) = cpu_to_le32(*((u32 *) param)); - FillH2CCmd_88E(padapter, H2C_RSSI_REPORT, 3, param); - - - return res; -} void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode) { @@ -245,29 +229,6 @@ void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode) } -void rtl8188e_set_FwRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) -{ - u8 u1H2CRsvdPageParm[H2C_RSVDPAGE_LOC_LEN] = {0}; - u8 u1H2CAoacRsvdPageParm[H2C_AOAC_RSVDPAGE_LOC_LEN] = {0}; - - /* RTW_INFO("8188RsvdPageLoc: PsPoll=%d Null=%d QoSNull=%d\n", */ - /* rsvdpageloc->LocPsPoll, rsvdpageloc->LocNullData, rsvdpageloc->LocQosNull); */ - - SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1H2CRsvdPageParm, rsvdpageloc->LocPsPoll); - SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocNullData); - SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocQosNull); - - FillH2CCmd_88E(padapter, H2C_COM_RSVD_PAGE, H2C_RSVDPAGE_LOC_LEN, u1H2CRsvdPageParm); - -#ifdef CONFIG_WOWLAN - /* RTW_INFO("8188E_AOACRsvdPageLoc: RWC=%d ArpRsp=%d\n", rsvdpageloc->LocRemoteCtrlInfo, rsvdpageloc->LocArpRsp); */ - SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocRemoteCtrlInfo); - SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocArpRsp); - - FillH2CCmd_88E(padapter, H2C_COM_AOAC_RSVD_PAGE, H2C_AOAC_RSVDPAGE_LOC_LEN, u1H2CAoacRsvdPageParm); -#endif -} - /* * Description: Get the reserved page number in Tx packet buffer. * Retrun value: the page number. @@ -307,11 +268,11 @@ void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus) RTW_INFO("%s mstatus(%x)\n", __FUNCTION__, mstatus); if (mstatus == 1) { + u8 bcn_ctrl = rtw_read8(padapter, REG_BCN_CTRL); + /* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */ /* Suggested by filen. Added by tynli. */ rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000 | pmlmeinfo->aid)); - /* Do not set TSF again here or vWiFi beacon DMA INT will not work. */ - /* correct_TSF(padapter, pmlmeext); */ /* Hw sequende enable by dedault. 2010.06.23. by tynli. */ /* rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); */ /* rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); */ @@ -323,12 +284,9 @@ void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus) /* Disable Hw protection for a time which revserd for Hw sending beacon. */ /* Fix download reserved page packet fail that access collision with the protection time. */ /* 2010.05.11. Added by tynli. */ - /* SetBcnCtrlReg(padapter, 0, BIT3); */ - /* SetBcnCtrlReg(padapter, BIT4, 0); */ - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) & (~BIT(3))); - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) | BIT(4)); - RegFwHwTxQCtrl = rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2); + rtw_write8(padapter, REG_BCN_CTRL, (bcn_ctrl & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT); + RegFwHwTxQCtrl = rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2); if (RegFwHwTxQCtrl & BIT6) { RTW_INFO("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n"); bSendBeacon = _TRUE; @@ -360,20 +318,19 @@ void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus) if (RTW_CANNOT_RUN(padapter)) ; else if (!bcn_valid) - RTW_INFO(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n", + RTW_ERR(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n", ADPT_ARG(padapter) , DLBcnCount, poll); else { struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); + pwrctl->fw_psmode_iface_id = padapter->iface_id; + rtw_hal_set_fw_rsvd_page(padapter, _TRUE); RTW_INFO(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n", ADPT_ARG(padapter), DLBcnCount, poll); } - /* Enable Bcn */ - /* SetBcnCtrlReg(padapter, BIT3, 0); */ - /* SetBcnCtrlReg(padapter, 0, BIT4); */ - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) | BIT(3)); - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) & (~BIT(4))); + /* restore bcn_ctrl */ + rtw_write8(padapter, REG_BCN_CTRL, bcn_ctrl); /* To make sure that if there exists an adapter which would like to send beacon. */ /* If exists, the origianl value of 0x422[6] will be 1, we should check this to */ @@ -396,11 +353,13 @@ void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus) /* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */ /* if(!padapter->bEnterPnpSleep) */ +#ifndef CONFIG_PCI_HCI { /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */ rtw_write8(padapter, REG_CR + 1, rtw_read8(padapter, REG_CR + 1) & (~BIT0)); } +#endif /* !CONFIG_PCI_HCI */ } } diff --git a/hal/rtl8188e/rtl8188e_dm.c b/hal/rtl8188e/rtl8188e_dm.c index fe66db1..4bf28a8 100644 --- a/hal/rtl8188e/rtl8188e_dm.c +++ b/hal/rtl8188e/rtl8188e_dm.c @@ -30,32 +30,6 @@ /* ************************************************************ * Global var * ************************************************************ */ - - -static VOID -dm_CheckProtection( - IN PADAPTER Adapter -) -{ -#if 0 - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - u1Byte CurRate, RateThreshold; - - if (pMgntInfo->pHTInfo->bCurBW40MHz) - RateThreshold = MGN_MCS1; - else - RateThreshold = MGN_MCS3; - - if (Adapter->TxStats.CurrentInitTxRate <= RateThreshold) { - pMgntInfo->bDmDisableProtect = TRUE; - dbg_print("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); - } else { - pMgntInfo->bDmDisableProtect = FALSE; - dbg_print("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); - } -#endif -} - #ifdef CONFIG_SUPPORT_HW_WPS_PBC static void dm_CheckPbcGPIO(_adapter *padapter) { @@ -113,9 +87,9 @@ static void dm_CheckPbcGPIO(_adapter *padapter) * * Created by Roger, 2010.03.05. * */ -VOID +void dm_InterruptMigration( - IN PADAPTER Adapter + PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -186,9 +160,10 @@ dm_InterruptMigration( /* * Initialize GPIO setting registers * */ +#ifdef CONFIG_USB_HCI static void dm_InitGPIOSetting( - IN PADAPTER Adapter + PADAPTER Adapter ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); @@ -201,7 +176,7 @@ dm_InitGPIOSetting( rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); } - +#endif /* ************************************************************ * functions * ************************************************************ */ @@ -225,7 +200,7 @@ static void Init_ODM_ComInfo_88E(PADAPTER Adapter) void rtl8188e_InitHalDm( - IN PADAPTER Adapter + PADAPTER Adapter ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); @@ -238,16 +213,17 @@ rtl8188e_InitHalDm( } -VOID +void rtl8188e_HalDmWatchDog( - IN PADAPTER Adapter + PADAPTER Adapter ) { BOOLEAN bFwCurrentInPSMode = _FALSE; u8 bFwPSAwake = _TRUE; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); struct dm_struct *pDM_Odm = &(pHalData->odmpriv); - + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter); + u8 in_lps = _FALSE; if (!rtw_is_hw_init_completed(Adapter)) goto skip_dm; @@ -270,7 +246,6 @@ rtl8188e_HalDmWatchDog( /* */ /* Dynamically switch RTS/CTS protection. */ /* */ - /* dm_CheckProtection(Adapter); */ #ifdef CONFIG_PCI_HCI /* 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. */ @@ -286,7 +261,12 @@ rtl8188e_HalDmWatchDog( #ifdef CONFIG_DISABLE_ODM goto skip_dm; #endif - rtw_phydm_watchdog(Adapter); +#ifdef CONFIG_LPS + if (pwrpriv->bLeisurePs && bFwCurrentInPSMode && pwrpriv->pwr_mode != PS_MODE_ACTIVE) + in_lps = _TRUE; +#endif + + rtw_phydm_watchdog(Adapter, in_lps); skip_dm: @@ -297,7 +277,7 @@ skip_dm: return; } -void rtl8188e_init_dm_priv(IN PADAPTER Adapter) +void rtl8188e_init_dm_priv(PADAPTER Adapter) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); struct dm_struct *podmpriv = &pHalData->odmpriv; @@ -305,12 +285,13 @@ void rtl8188e_init_dm_priv(IN PADAPTER Adapter) /* _rtw_spinlock_init(&(pHalData->odm_stainfo_lock)); */ Init_ODM_ComInfo_88E(Adapter); odm_init_all_timers(podmpriv); - pHalData->CurrentTxPwrIdx = 13; + } -void rtl8188e_deinit_dm_priv(IN PADAPTER Adapter) +void rtl8188e_deinit_dm_priv(PADAPTER Adapter) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); struct dm_struct *podmpriv = &pHalData->odmpriv; + /* _rtw_spinlock_free(&pHalData->odm_stainfo_lock); */ odm_cancel_all_timers(podmpriv); } diff --git a/hal/rtl8188e/rtl8188e_hal_init.c b/hal/rtl8188e/rtl8188e_hal_init.c index a63c378..83e7777 100644 --- a/hal/rtl8188e/rtl8188e_hal_init.c +++ b/hal/rtl8188e/rtl8188e_hal_init.c @@ -80,6 +80,7 @@ static s32 iol_execute(PADAPTER padapter, u8 control) return status; } +#ifdef CONFIG_IOL_LLT static s32 iol_InitLLTTable( PADAPTER padapter, u8 txpktbuf_bndy @@ -93,8 +94,9 @@ static s32 iol_InitLLTTable( iol_mode_enable(padapter, 0); return rst; } +#endif /*CONFIG_IOL_LLT*/ -static VOID +static void efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf) { u8 *efuseTbl = NULL; @@ -198,7 +200,7 @@ efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf) /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); */ efuse_utilized++; - eFuseWord[offset][i] |= (((u2Byte)rtemp8 << 8) & 0xff00); + eFuseWord[offset][i] |= (((u16)rtemp8 << 8) & 0xff00); if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) break; @@ -239,7 +241,7 @@ efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf) /* */ /* 5. Calculate Efuse utilization. */ /* */ - efuse_usage = (u1Byte)((efuse_utilized * 100) / EFUSE_REAL_CONTENT_LEN_88E); + efuse_usage = (u8)((efuse_utilized * 100) / EFUSE_REAL_CONTENT_LEN_88E); /* rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized); */ exit: @@ -535,10 +537,10 @@ void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter, int data_len) #endif /* defined(CONFIG_IOL) */ -static VOID +static void _FWDownloadEnable_8188E( - IN PADAPTER padapter, - IN BOOLEAN enable + PADAPTER padapter, + BOOLEAN enable ) { u8 tmp; @@ -564,9 +566,9 @@ _FWDownloadEnable_8188E( #define MAX_REG_BOLCK_SIZE 196 static int _BlockWrite( - IN PADAPTER padapter, - IN PVOID buffer, - IN u32 buffSize + PADAPTER padapter, + void *buffer, + u32 buffSize ) { int ret = _SUCCESS; @@ -663,10 +665,10 @@ exit: static int _PageWrite( - IN PADAPTER padapter, - IN u32 page, - IN PVOID buffer, - IN u32 size + PADAPTER padapter, + u32 page, + void *buffer, + u32 size ) { u8 value8; @@ -677,8 +679,9 @@ _PageWrite( return _BlockWrite(padapter, buffer, size); } - -static VOID +/* +#ifdef CONFIG_PCI_HCI +static void _FillDummy( u8 *pFwBuf, u32 *pFwLen @@ -696,12 +699,13 @@ _FillDummy( *pFwLen = FwLen; } - +#endif +*/ static int _WriteFW( - IN PADAPTER padapter, - IN PVOID buffer, - IN u32 size + PADAPTER padapter, + void *buffer, + u32 size ) { /* Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. */ @@ -1056,31 +1060,31 @@ enum { static BOOLEAN hal_EfusePgPacketWrite2ByteHeader( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest); + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest); static BOOLEAN hal_EfusePgPacketWrite1ByteHeader( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest); + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest); static BOOLEAN hal_EfusePgPacketWriteData( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest); + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest); -static VOID +static void hal_EfusePowerSwitch_RTL8188E( - IN PADAPTER pAdapter, - IN u8 bWrite, - IN u8 PwrState) + PADAPTER pAdapter, + u8 bWrite, + u8 PwrState) { u8 tempval; u16 tmpV16; @@ -1132,61 +1136,22 @@ hal_EfusePowerSwitch_RTL8188E( } } -static VOID +static void rtl8188e_EfusePowerSwitch( - IN PADAPTER pAdapter, - IN u8 bWrite, - IN u8 PwrState) + PADAPTER pAdapter, + u8 bWrite, + u8 PwrState) { hal_EfusePowerSwitch_RTL8188E(pAdapter, bWrite, PwrState); } - - -static bool efuse_read_phymap( - PADAPTER Adapter, - u8 *pbuf, /* buffer to store efuse physical map */ - u16 *size /* the max byte to read. will update to byte read */ -) -{ - u8 *pos = pbuf; - u16 limit = *size; - u16 addr = 0; - bool reach_end = _FALSE; - - /* */ - /* Refresh efuse init map as all 0xFF. */ - /* */ - _rtw_memset(pbuf, 0xFF, limit); - - - /* */ - /* Read physical efuse content. */ - /* */ - while (addr < limit) { - ReadEFuseByte(Adapter, addr, pos, _FALSE); - if (*pos != 0xFF) { - pos++; - addr++; - } else { - reach_end = _TRUE; - break; - } - } - - *size = addr; - - return reach_end; - -} - -static VOID +static void Hal_EfuseReadEFuse88E( PADAPTER Adapter, u16 _offset, u16 _size_byte, u8 *pbuf, - IN BOOLEAN bPseudoTest + BOOLEAN bPseudoTest ) { /* u8 efuseTbl[EFUSE_MAP_LEN_88E]; */ @@ -1300,7 +1265,7 @@ Hal_EfuseReadEFuse88E( /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); */ efuse_utilized++; - eFuseWord[offset][i] |= (((u2Byte)*rtemp8 << 8) & 0xff00); + eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00); if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) break; @@ -1355,7 +1320,7 @@ Hal_EfuseReadEFuse88E( /* */ /* 5. Calculate Efuse utilization. */ /* */ - efuse_usage = (u1Byte)((eFuse_Addr * 100) / EFUSE_REAL_CONTENT_LEN_88E); + efuse_usage = (u8)((eFuse_Addr * 100) / EFUSE_REAL_CONTENT_LEN_88E); rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr); exit: @@ -1366,36 +1331,14 @@ exit: rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); } - -static BOOLEAN -Hal_EfuseSwitchToBank( - IN PADAPTER pAdapter, - IN u8 bank, - IN BOOLEAN bPseudoTest -) -{ - BOOLEAN bRet = _FALSE; - u32 value32 = 0; - - /* RTPRINT(FEEPROM, EFUSE_PG, ("Efuse switch bank to %d\n", bank)); */ - if (bPseudoTest) { - fakeEfuseBank = bank; - bRet = _TRUE; - } else - bRet = _TRUE; - return bRet; -} - - - -static VOID +static void ReadEFuseByIC( PADAPTER Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, - IN BOOLEAN bPseudoTest + BOOLEAN bPseudoTest ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); @@ -1404,7 +1347,7 @@ ReadEFuseByIC( #endif #ifdef CONFIG_IOL_READ_EFUSE_MAP - if (!bPseudoTest) { /* && rtw_IOL_applied(Adapter)) */ + if (!bPseudoTest && Adapter->registrypriv.mp_mode == 0) { /* && rtw_IOL_applied(Adapter)) */ int ret = _FAIL; if (rtw_IOL_applied(Adapter)) { rtw_hal_power_on(Adapter); @@ -1444,27 +1387,27 @@ exit: return; } -static VOID +static void ReadEFuse_Pseudo( PADAPTER Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, - IN BOOLEAN bPseudoTest + BOOLEAN bPseudoTest ) { Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest); } -static VOID +static void rtl8188e_ReadEFuse( PADAPTER Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, - IN BOOLEAN bPseudoTest + BOOLEAN bPseudoTest ) { if (bPseudoTest) @@ -1474,12 +1417,12 @@ rtl8188e_ReadEFuse( } /* Do not support BT */ -VOID +void Hal_EFUSEGetEfuseDefinition88E( - IN PADAPTER pAdapter, - IN u1Byte efuseType, - IN u1Byte type, - OUT PVOID pOut + PADAPTER pAdapter, + u8 efuseType, + u8 type, + void *pOut ) { switch (type) { @@ -1533,49 +1476,49 @@ Hal_EFUSEGetEfuseDefinition88E( break; } } -VOID +void Hal_EFUSEGetEfuseDefinition_Pseudo88E( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u8 type, - OUT PVOID pOut + PADAPTER pAdapter, + u8 efuseType, + u8 type, + void *pOut ) { switch (type) { case TYPE_EFUSE_MAX_SECTION: { u8 *pMax_section; - pMax_section = (pu1Byte)pOut; + pMax_section = (u8 *)pOut; *pMax_section = EFUSE_MAX_SECTION_88E; } break; case TYPE_EFUSE_REAL_CONTENT_LEN: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; + pu2Tmp = (u16 *)pOut; *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; } break; case TYPE_EFUSE_CONTENT_LEN_BANK: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; + pu2Tmp = (u16 *)pOut; *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; } break; case TYPE_AVAILABLE_EFUSE_BYTES_BANK: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); } break; case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); } break; case TYPE_EFUSE_MAP_LEN: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = (u2Byte)EFUSE_MAP_LEN_88E; + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)EFUSE_MAP_LEN_88E; } break; case TYPE_EFUSE_PROTECT_BYTES_BANK: { @@ -1594,13 +1537,13 @@ Hal_EFUSEGetEfuseDefinition_Pseudo88E( } -static VOID +static void rtl8188e_EFUSE_GetEfuseDefinition( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u8 type, - OUT void *pOut, - IN BOOLEAN bPseudoTest + PADAPTER pAdapter, + u8 efuseType, + u8 type, + void *pOut, + BOOLEAN bPseudoTest ) { if (bPseudoTest) @@ -1610,18 +1553,18 @@ rtl8188e_EFUSE_GetEfuseDefinition( } static u8 -Hal_EfuseWordEnableDataWrite(IN PADAPTER pAdapter, - IN u16 efuse_addr, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) +Hal_EfuseWordEnableDataWrite(PADAPTER pAdapter, + u16 efuse_addr, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) { u16 tmpaddr = 0; u16 start_addr = efuse_addr; u8 badworden = 0x0F; u8 tmpdata[8]; - _rtw_memset((PVOID)tmpdata, 0xff, PGPKT_DATA_SIZE); + _rtw_memset((void *)tmpdata, 0xff, PGPKT_DATA_SIZE); if (!(word_en & BIT0)) { tmpaddr = start_addr; @@ -1679,11 +1622,11 @@ Hal_EfuseWordEnableDataWrite(IN PADAPTER pAdapter, } static u8 -Hal_EfuseWordEnableDataWrite_Pseudo(IN PADAPTER pAdapter, - IN u16 efuse_addr, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) +Hal_EfuseWordEnableDataWrite_Pseudo(PADAPTER pAdapter, + u16 efuse_addr, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) { u8 ret = 0; @@ -1693,11 +1636,11 @@ Hal_EfuseWordEnableDataWrite_Pseudo(IN PADAPTER pAdapter, } static u8 -rtl8188e_Efuse_WordEnableDataWrite(IN PADAPTER pAdapter, - IN u16 efuse_addr, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) +rtl8188e_Efuse_WordEnableDataWrite(PADAPTER pAdapter, + u16 efuse_addr, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) { u8 ret = 0; @@ -1711,8 +1654,8 @@ rtl8188e_Efuse_WordEnableDataWrite(IN PADAPTER pAdapter, static u16 -hal_EfuseGetCurrentSize_8188e(IN PADAPTER pAdapter, - IN BOOLEAN bPseudoTest) +hal_EfuseGetCurrentSize_8188e(PADAPTER pAdapter, + BOOLEAN bPseudoTest) { int bContinual = _TRUE; @@ -1764,8 +1707,8 @@ hal_EfuseGetCurrentSize_8188e(IN PADAPTER pAdapter, } static u16 -Hal_EfuseGetCurrentSize_Pseudo(IN PADAPTER pAdapter, - IN BOOLEAN bPseudoTest) +Hal_EfuseGetCurrentSize_Pseudo(PADAPTER pAdapter, + BOOLEAN bPseudoTest) { u16 ret = 0; @@ -1777,9 +1720,9 @@ Hal_EfuseGetCurrentSize_Pseudo(IN PADAPTER pAdapter, static u16 rtl8188e_EfuseGetCurrentSize( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN BOOLEAN bPseudoTest) + PADAPTER pAdapter, + u8 efuseType, + BOOLEAN bPseudoTest) { u16 ret = 0; @@ -1795,10 +1738,10 @@ rtl8188e_EfuseGetCurrentSize( static int hal_EfusePgPacketRead_8188e( - IN PADAPTER pAdapter, - IN u8 offset, - IN u8 *data, - IN BOOLEAN bPseudoTest) + PADAPTER pAdapter, + u8 offset, + u8 *data, + BOOLEAN bPseudoTest) { u8 ReadState = PG_STATE_HEADER; @@ -1813,15 +1756,15 @@ hal_EfusePgPacketRead_8188e( u8 max_section = 0; u8 tmp_header = 0; - EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (PVOID)&max_section, bPseudoTest); + EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest); if (data == NULL) return _FALSE; if (offset > max_section) return _FALSE; - _rtw_memset((PVOID)data, 0xff, sizeof(u8) * PGPKT_DATA_SIZE); - _rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8) * PGPKT_DATA_SIZE); + _rtw_memset((void *)data, 0xff, sizeof(u8) * PGPKT_DATA_SIZE); + _rtw_memset((void *)tmpdata, 0xff, sizeof(u8) * PGPKT_DATA_SIZE); /* */ @@ -1892,10 +1835,10 @@ hal_EfusePgPacketRead_8188e( } static int -Hal_EfusePgPacketRead(IN PADAPTER pAdapter, - IN u8 offset, - IN u8 *data, - IN BOOLEAN bPseudoTest) +Hal_EfusePgPacketRead(PADAPTER pAdapter, + u8 offset, + u8 *data, + BOOLEAN bPseudoTest) { int ret = 0; @@ -1906,10 +1849,10 @@ Hal_EfusePgPacketRead(IN PADAPTER pAdapter, } static int -Hal_EfusePgPacketRead_Pseudo(IN PADAPTER pAdapter, - IN u8 offset, - IN u8 *data, - IN BOOLEAN bPseudoTest) +Hal_EfusePgPacketRead_Pseudo(PADAPTER pAdapter, + u8 offset, + u8 *data, + BOOLEAN bPseudoTest) { int ret = 0; @@ -1919,10 +1862,10 @@ Hal_EfusePgPacketRead_Pseudo(IN PADAPTER pAdapter, } static int -rtl8188e_Efuse_PgPacketRead(IN PADAPTER pAdapter, - IN u8 offset, - IN u8 *data, - IN BOOLEAN bPseudoTest) +rtl8188e_Efuse_PgPacketRead(PADAPTER pAdapter, + u8 offset, + u8 *data, + BOOLEAN bPseudoTest) { int ret = 0; @@ -1936,18 +1879,18 @@ rtl8188e_Efuse_PgPacketRead(IN PADAPTER pAdapter, static BOOLEAN hal_EfuseFixHeaderProcess( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN PPGPKT_STRUCT pFixPkt, - IN u16 *pAddr, - IN BOOLEAN bPseudoTest + PADAPTER pAdapter, + u8 efuseType, + PPGPKT_STRUCT pFixPkt, + u16 *pAddr, + BOOLEAN bPseudoTest ) { u8 originaldata[8], badworden = 0; u16 efuse_addr = *pAddr; u32 PgWriteSuccess = 0; - _rtw_memset((PVOID)originaldata, 0xff, 8); + _rtw_memset((void *)originaldata, 0xff, 8); if (Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) { /* check if data exist */ @@ -1970,11 +1913,11 @@ hal_EfuseFixHeaderProcess( static BOOLEAN hal_EfusePgPacketWrite2ByteHeader( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest) + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest) { BOOLEAN bRet = _FALSE, bContinual = _TRUE; u16 efuse_addr = *pAddr, efuse_max_available_len = 0; @@ -1982,7 +1925,7 @@ hal_EfusePgPacketWrite2ByteHeader( u8 repeatcnt = 0; /* RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 2byte header\n")); */ - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest); + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest); while (efuse_addr < efuse_max_available_len) { pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; @@ -2053,11 +1996,11 @@ hal_EfusePgPacketWrite2ByteHeader( static BOOLEAN hal_EfusePgPacketWrite1ByteHeader( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest) + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest) { BOOLEAN bRet = _FALSE; u8 pg_header = 0, tmp_header = 0; @@ -2099,11 +2042,11 @@ hal_EfusePgPacketWrite1ByteHeader( static BOOLEAN hal_EfusePgPacketWriteData( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest) + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest) { BOOLEAN bRet = _FALSE; u16 efuse_addr = *pAddr; @@ -2133,11 +2076,11 @@ hal_EfusePgPacketWriteData( static BOOLEAN hal_EfusePgPacketWriteHeader( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest) + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest) { BOOLEAN bRet = _FALSE; @@ -2151,9 +2094,9 @@ hal_EfusePgPacketWriteHeader( static BOOLEAN wordEnMatched( - IN PPGPKT_STRUCT pTargetPkt, - IN PPGPKT_STRUCT pCurPkt, - IN u8 *pWden + PPGPKT_STRUCT pTargetPkt, + PPGPKT_STRUCT pCurPkt, + u8 *pWden ) { u8 match_word_en = 0x0F; /* default all words are disabled */ @@ -2187,10 +2130,10 @@ wordEnMatched( static BOOLEAN hal_EfuseCheckIfDatafollowed( - IN PADAPTER pAdapter, - IN u8 word_cnts, - IN u16 startAddr, - IN BOOLEAN bPseudoTest + PADAPTER pAdapter, + u8 word_cnts, + u16 startAddr, + BOOLEAN bPseudoTest ) { BOOLEAN bRet = _FALSE; @@ -2206,11 +2149,11 @@ hal_EfuseCheckIfDatafollowed( static BOOLEAN hal_EfusePartialWriteCheck( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest ) { BOOLEAN bRet = _FALSE; @@ -2219,8 +2162,8 @@ hal_EfusePartialWriteCheck( u16 startAddr = 0, efuse_max_available_len = 0, efuse_max = 0; PGPKT_STRUCT curPkt; - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest); - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&efuse_max, bPseudoTest); + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest); + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&efuse_max, bPseudoTest); if (efuseType == EFUSE_WIFI) { if (bPseudoTest) @@ -2305,17 +2248,17 @@ hal_EfusePartialWriteCheck( static BOOLEAN hal_EfusePgCheckAvailableAddr( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN BOOLEAN bPseudoTest + PADAPTER pAdapter, + u8 efuseType, + BOOLEAN bPseudoTest ) { u16 efuse_max_available_len = 0; /* Change to check TYPE_EFUSE_MAP_LEN ,beacuse 8188E raw 256,logic map over 256. */ - EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&efuse_max_available_len, _FALSE); + EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&efuse_max_available_len, _FALSE); - /* EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&efuse_max_available_len, bPseudoTest); */ + /* EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&efuse_max_available_len, bPseudoTest); */ /* RTPRINT(FEEPROM, EFUSE_PG, ("efuse_max_available_len = %d\n", efuse_max_available_len)); */ if (Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len) { @@ -2325,16 +2268,16 @@ hal_EfusePgCheckAvailableAddr( return _TRUE; } -static VOID +static void hal_EfuseConstructPGPkt( - IN u8 offset, - IN u8 word_en, - IN u8 *pData, - IN PPGPKT_STRUCT pTargetPkt + u8 offset, + u8 word_en, + u8 *pData, + PPGPKT_STRUCT pTargetPkt ) { - _rtw_memset((PVOID)pTargetPkt->data, 0xFF, sizeof(u8) * 8); + _rtw_memset((void *)pTargetPkt->data, 0xFF, sizeof(u8) * 8); pTargetPkt->offset = offset; pTargetPkt->word_en = word_en; efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data); @@ -2343,43 +2286,15 @@ hal_EfuseConstructPGPkt( /* RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseConstructPGPkt(), targetPkt, offset=%d, word_en=0x%x, word_cnts=%d\n", pTargetPkt->offset, pTargetPkt->word_en, pTargetPkt->word_cnts)); */ } -static BOOLEAN -hal_EfusePgPacketWrite_BT( - IN PADAPTER pAdapter, - IN u8 offset, - IN u8 word_en, - IN u8 *pData, - IN BOOLEAN bPseudoTest -) -{ - PGPKT_STRUCT targetPkt; - u16 startAddr = 0; - u8 efuseType = EFUSE_BT; - if (!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) - return _FALSE; - - hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); - - if (!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return _FALSE; - - if (!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return _FALSE; - - if (!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return _FALSE; - - return _TRUE; -} static BOOLEAN hal_EfusePgPacketWrite_8188e( - IN PADAPTER pAdapter, - IN u8 offset, - IN u8 word_en, - IN u8 *pData, - IN BOOLEAN bPseudoTest + PADAPTER pAdapter, + u8 offset, + u8 word_en, + u8 *pData, + BOOLEAN bPseudoTest ) { PGPKT_STRUCT targetPkt; @@ -2405,11 +2320,11 @@ hal_EfusePgPacketWrite_8188e( static int -Hal_EfusePgPacketWrite_Pseudo(IN PADAPTER pAdapter, - IN u8 offset, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) +Hal_EfusePgPacketWrite_Pseudo(PADAPTER pAdapter, + u8 offset, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) { int ret; @@ -2419,11 +2334,11 @@ Hal_EfusePgPacketWrite_Pseudo(IN PADAPTER pAdapter, } static int -Hal_EfusePgPacketWrite(IN PADAPTER pAdapter, - IN u8 offset, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) +Hal_EfusePgPacketWrite(PADAPTER pAdapter, + u8 offset, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) { int ret = 0; ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest); @@ -2433,11 +2348,11 @@ Hal_EfusePgPacketWrite(IN PADAPTER pAdapter, } static int -rtl8188e_Efuse_PgPacketWrite(IN PADAPTER pAdapter, - IN u8 offset, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) +rtl8188e_Efuse_PgPacketWrite(PADAPTER pAdapter, + u8 offset, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) { int ret; @@ -2531,6 +2446,8 @@ void init_hal_spec_8188e(_adapter *adapter) hal_spec->sec_cap = 0; hal_spec->rfpath_num_2g = 1; hal_spec->rfpath_num_5g = 0; + hal_spec->txgi_max = 63; + hal_spec->txgi_pdbm = 2; hal_spec->max_tx_cnt = 1; hal_spec->tx_nss_num = 1; hal_spec->rx_nss_num = 1; @@ -2544,7 +2461,12 @@ void init_hal_spec_8188e(_adapter *adapter) | WL_FUNC_TDLS ; +#if CONFIG_TX_AC_LIFETIME + hal_spec->tx_aclt_unit_factor = 1; +#endif + hal_spec->pg_txpwr_saddr = 0x10; + hal_spec->pg_txgi_diff_factor = 1; rtw_macid_ctl_init_sleep_reg(adapter_to_macidctl(adapter) , REG_MACID_PAUSE_0 @@ -2575,18 +2497,12 @@ bool rtl8188e_gpio_radio_on_off_check(_adapter *adapter, u8 *valid) } #endif -void rtl8188e_init_default_value(_adapter *adapter) -{ - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); - - adapter->registrypriv.wireless_mode = WIRELESS_11BG_24N; -} void InitBeaconParameters_8188e(_adapter *adapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); - rtw_write16(adapter, REG_BCN_CTRL, 0x1010); + rtw_write16(adapter, REG_BCN_CTRL, (DIS_TSF_UDT << 8) | DIS_TSF_UDT); /* TBTT setup time */ rtw_write8(adapter, REG_TBTT_PROHIBIT, TBTT_PROHIBIT_SETUP_TIME); @@ -2601,18 +2517,18 @@ void InitBeaconParameters_8188e(_adapter *adapter) /* Suggested by designer timchen. Change beacon AIFS to the largest number */ /* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */ - rtw_write16(adapter, REG_BCNTCFG, 0x660F); + rtw_write16(adapter, REG_BCNTCFG, 0x4413); } -static VOID +static void _BeaconFunctionEnable( - IN PADAPTER padapter, - IN BOOLEAN Enable, - IN BOOLEAN Linked + PADAPTER padapter, + BOOLEAN Enable, + BOOLEAN Linked ) { - rtw_write8(padapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1)); + rtw_write8(padapter, REG_BCN_CTRL, (DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB)); rtw_write8(padapter, REG_RD_CTRL + 1, 0x6F); } @@ -2626,7 +2542,7 @@ void SetBeaconRelatedRegisters8188E(PADAPTER padapter) u32 bcn_ctrl_reg = REG_BCN_CTRL; /* reset TSF, enable update TSF, correcting TSF On Beacon */ - /* REG_BCN_INTERVAL */ + /* REG_MBSSID_BCN_SPACE */ /* REG_BCNDMATIM */ /* REG_ATIMWND */ /* REG_TBTT_PROHIBIT */ @@ -2649,7 +2565,7 @@ void SetBeaconRelatedRegisters8188E(PADAPTER padapter) /* */ /* Beacon interval (in unit of TU). */ /* */ - rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval); + rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)&pmlmeinfo->bcn_interval); InitBeaconParameters_8188e(padapter); @@ -2680,7 +2596,7 @@ void SetBeaconRelatedRegisters8188E(PADAPTER padapter) _BeaconFunctionEnable(padapter, _TRUE, _TRUE); ResumeTxBeacon(padapter); - rtw_write8(padapter, bcn_ctrl_reg, rtw_read8(padapter, bcn_ctrl_reg) | BIT(1)); + rtw_write8(padapter, bcn_ctrl_reg, rtw_read8(padapter, bcn_ctrl_reg) | DIS_BCNQ_SUB); } void rtl8188e_read_wmmedca_reg(PADAPTER adapter, u16 *vo_params, u16 *vi_params, u16 *be_params, u16 *bk_params) @@ -2735,8 +2651,6 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc) pHalFunc->set_chnl_bw_handler = &PHY_SetSwChnlBWMode8188E; pHalFunc->set_tx_power_level_handler = &PHY_SetTxPowerLevel8188E; - pHalFunc->get_tx_power_level_handler = &PHY_GetTxPowerLevel8188E; - pHalFunc->set_tx_power_index_handler = PHY_SetTxPowerIndex_8188E; pHalFunc->get_tx_power_index_handler = &PHY_GetTxPowerIndex_8188E; @@ -2914,7 +2828,7 @@ Hal_InitPGData88E(PADAPTER padapter) if (is_boot_from_eeprom(padapter)) { /* Read all Content from EEPROM or EFUSE. */ for (i = 0; i < HWSET_MAX_SIZE; i += 2) { - /* value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1))); + /* value16 = EF2Byte(ReadEEprom(pAdapter, (u16) (i>>1))); * *((u16*)(&PROMContent[i])) = value16; */ } } else { @@ -2939,8 +2853,8 @@ Hal_InitPGData88E(PADAPTER padapter) void Hal_EfuseParseIDCode88E( - IN PADAPTER padapter, - IN u8 *hwinfo + PADAPTER padapter, + u8 *hwinfo ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); @@ -2960,8 +2874,8 @@ Hal_EfuseParseIDCode88E( void Hal_ReadPowerSavingMode88E( PADAPTER padapter, - IN u8 *hwinfo, - IN BOOLEAN AutoLoadFail + u8 *hwinfo, + BOOLEAN AutoLoadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); @@ -2997,9 +2911,9 @@ void Hal_ReadPowerSavingMode88E( void Hal_ReadTxPowerInfo88E( - IN PADAPTER padapter, - IN u8 *PROMContent, - IN BOOLEAN AutoLoadFail + PADAPTER padapter, + u8 *PROMContent, + BOOLEAN AutoLoadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); @@ -3023,11 +2937,11 @@ Hal_ReadTxPowerInfo88E( } -VOID +void Hal_EfuseParseXtal_8188E( - IN PADAPTER pAdapter, - IN u8 *hwinfo, - IN BOOLEAN AutoLoadFail + PADAPTER pAdapter, + u8 *hwinfo, + BOOLEAN AutoLoadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -3041,11 +2955,11 @@ Hal_EfuseParseXtal_8188E( RTW_INFO("crystal_cap: 0x%2x\n", pHalData->crystal_cap); } -VOID +void Hal_ReadPAType_8188E( - IN PADAPTER Adapter, - IN u8 *PROMContent, - IN BOOLEAN AutoloadFail + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -3119,11 +3033,11 @@ Hal_ReadPAType_8188E( RTW_INFO("pHalData->ExternalPA_2G = %d , pHalData->ExternalLNA_2G = %d\n", pHalData->ExternalPA_2G, pHalData->ExternalLNA_2G); } -VOID +void Hal_ReadAmplifierType_8188E( - IN PADAPTER Adapter, - IN pu1Byte PROMContent, - IN BOOLEAN AutoloadFail + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -3157,11 +3071,11 @@ Hal_ReadAmplifierType_8188E( RTW_INFO("pHalData->TypeGLNA is 0x%x\n", pHalData->TypeGLNA); } -VOID +void Hal_ReadRFEType_8188E( - IN PADAPTER Adapter, - IN pu1Byte PROMContent, - IN BOOLEAN AutoloadFail + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -3205,9 +3119,9 @@ Hal_ReadRFEType_8188E( void Hal_EfuseParseBoardType88E( - IN PADAPTER pAdapter, - IN u8 *hwinfo, - IN BOOLEAN AutoLoadFail + PADAPTER pAdapter, + u8 *hwinfo, + BOOLEAN AutoLoadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -3223,9 +3137,9 @@ Hal_EfuseParseBoardType88E( void Hal_EfuseParseEEPROMVer88E( - IN PADAPTER padapter, - IN u8 *hwinfo, - IN BOOLEAN AutoLoadFail + PADAPTER padapter, + u8 *hwinfo, + BOOLEAN AutoLoadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); @@ -3240,9 +3154,9 @@ Hal_EfuseParseEEPROMVer88E( void rtl8188e_EfuseParseChnlPlan( - IN PADAPTER padapter, - IN u8 *hwinfo, - IN BOOLEAN AutoLoadFail + PADAPTER padapter, + u8 *hwinfo, + BOOLEAN AutoLoadFail ) { hal_com_config_channel_plan( @@ -3258,9 +3172,9 @@ rtl8188e_EfuseParseChnlPlan( void Hal_EfuseParseCustomerID88E( - IN PADAPTER padapter, - IN u8 *hwinfo, - IN BOOLEAN AutoLoadFail + PADAPTER padapter, + u8 *hwinfo, + BOOLEAN AutoLoadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); @@ -3279,11 +3193,12 @@ Hal_EfuseParseCustomerID88E( void Hal_ReadAntennaDiversity88E( - IN PADAPTER pAdapter, - IN u8 *PROMContent, - IN BOOLEAN AutoLoadFail + PADAPTER pAdapter, + u8 *PROMContent, + BOOLEAN AutoLoadFail ) { +#ifdef CONFIG_ANTENNA_DIVERSITY HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); struct registry_priv *registry_par = &pAdapter->registrypriv; @@ -3310,19 +3225,18 @@ Hal_ReadAntennaDiversity88E( pHalData->AntDivCfg = 0; RTW_INFO("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType); - - +#endif } void Hal_ReadThermalMeter_88E( - IN PADAPTER Adapter, - IN u8 *PROMContent, - IN BOOLEAN AutoloadFail + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u1Byte tempval; + u8 tempval; /* */ /* ThermalMeter from EEPROM */ @@ -3345,9 +3259,9 @@ Hal_ReadThermalMeter_88E( #ifdef CONFIG_RF_POWER_TRIM void Hal_ReadRFGainOffset( - IN PADAPTER Adapter, - IN u8 *PROMContent, - IN BOOLEAN AutoloadFail) + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 thermal_offset = 0; @@ -3431,38 +3345,6 @@ void Hal_DetectWoWMode(PADAPTER pAdapter) } #endif -/* ************************************************************************************ - * - * 20100209 Joseph: - * This function is used only for 92C to set REG_BCN_CTRL(0x550) register. - * We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate - * the value of the register via atomic operation. - * This prevents from race condition when setting this register. - * The value of pHalData->RegBcnCtrlVal is initialized in HwConfigureRTL8192CE() function. - * */ -void SetBcnCtrlReg( - PADAPTER padapter, - u8 SetBits, - u8 ClearBits) -{ - PHAL_DATA_TYPE pHalData; - u8 RegBcnCtrlVal = 0; - - pHalData = GET_HAL_DATA(padapter); - RegBcnCtrlVal = rtw_read8(padapter, REG_BCN_CTRL); - - RegBcnCtrlVal |= SetBits; - RegBcnCtrlVal &= ~ClearBits; - -#if 0 - /* #ifdef CONFIG_SDIO_HCI */ - if (pHalData->sdio_himr & (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK)) - RegBcnCtrlVal |= EN_TXBCN_RPT; -#endif - - rtw_write8(padapter, REG_BCN_CTRL, RegBcnCtrlVal); -} - void _InitTransferPageSize(PADAPTER padapter) { /* Tx page size is always 128. */ @@ -3481,13 +3363,15 @@ static void hw_var_set_monitor(PADAPTER Adapter, u8 variable, u8 *val) struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); if (*((u8 *)val) == _HW_STATE_MONITOR_) { - +#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL + rcr_bits = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_APWRMGT | RCR_ADF | RCR_AMF | RCR_APP_PHYST_RXFF; +#else /* Receive all type */ rcr_bits = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_APWRMGT | RCR_ADF | RCR_ACF | RCR_AMF | RCR_APP_PHYST_RXFF; /* Append FCS */ rcr_bits |= RCR_APPFCS; - +#endif #if 0 /* CRC and ICV packet will drop in recvbuf2recvframe() @@ -3545,7 +3429,7 @@ static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val) #ifdef CONFIG_CONCURRENT_MODE if (Adapter->hw_port == HW_PORT1) { /* disable Port1 TSF update */ - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1) | BIT(4)); + rtw_iface_disable_tsf_update(Adapter); /* set net_type */ Set_MSR(Adapter, mode); @@ -3580,14 +3464,14 @@ static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val) #endif } - rtw_write8(Adapter, REG_BCN_CTRL_1, 0x11); /* disable atim wnd and disable beacon function */ - /* rtw_write8(Adapter,REG_BCN_CTRL_1, 0x18); */ + rtw_write8(Adapter, REG_BCN_CTRL_1, DIS_TSF_UDT | DIS_ATIM); /* disable atim wnd and disable beacon function */ + /* rtw_write8(Adapter,REG_BCN_CTRL_1, DIS_TSF_UDT | EN_BCN_FUNCTION); */ } else if (mode == _HW_STATE_ADHOC_) { /* Beacon is polled to TXBUF */ rtw_write32(Adapter, REG_CR, rtw_read32(Adapter, REG_CR) | BIT(8)); ResumeTxBeacon(Adapter); - rtw_write8(Adapter, REG_BCN_CTRL_1, 0x1a); + rtw_write8(Adapter, REG_BCN_CTRL_1, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB); /* BIT4 - If set 0, hw will clr bcnq when tx becon ok/fail or port 1 */ rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4)); } else if (mode == _HW_STATE_AP_) { @@ -3610,9 +3494,7 @@ static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val) #endif /* CONFIG_INTERRUPT_BASED_TXBCN */ - ResumeTxBeacon(Adapter); - - rtw_write8(Adapter, REG_BCN_CTRL_1, 0x12); + rtw_write8(Adapter, REG_BCN_CTRL_1, DIS_TSF_UDT | DIS_BCNQ_SUB); /* Beacon is polled to TXBUF */ rtw_write32(Adapter, REG_CR, rtw_read32(Adapter, REG_CR) | BIT(8)); @@ -3627,7 +3509,6 @@ static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val) rtw_write8(Adapter, REG_DRVERLYINT, 0x05);/* 5ms */ /* rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); */ rtw_write8(Adapter, REG_ATIMWND_1, 0x0c); /* 13ms for port1 */ - rtw_write16(Adapter, REG_BCNTCFG, 0x00); rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */ @@ -3639,9 +3520,9 @@ static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val) rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4)); /* enable BCN1 Function for if2 */ /* don't enable update TSF1 for if2 (due to TSF update when beacon/probe rsp are received) */ - rtw_write8(Adapter, REG_BCN_CTRL_1, (DIS_TSF_UDT0_NORMAL_CHIP | EN_BCN_FUNCTION | EN_TXBCN_RPT | BIT(1))); + rtw_write8(Adapter, REG_BCN_CTRL_1, (DIS_TSF_UDT| EN_BCN_FUNCTION | EN_TXBCN_RPT | DIS_BCNQ_SUB)); - if (!rtw_mi_buddy_check_fwstate(Adapter, WIFI_FW_ASSOC_SUCCESS)) + if (!rtw_mi_buddy_check_mlmeinfo_state(Adapter, WIFI_FW_ASSOC_SUCCESS)) rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) & ~EN_BCN_FUNCTION); @@ -3650,11 +3531,11 @@ static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val) /* rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(3)); */ /* dis BCN0 ATIM WND if if1 is station */ - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) | BIT(0)); + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) | DIS_ATIM); #ifdef CONFIG_TSF_RESET_OFFLOAD /* Reset TSF for STA+AP concurrent mode */ - if (rtw_mi_buddy_check_fwstate(Adapter, (WIFI_STATION_STATE | WIFI_ASOC_STATE))) { + if (DEV_STA_LD_NUM(adapter_to_dvobj(Adapter))) { if (rtw_hal_reset_tsf(Adapter, HW_PORT1) == _FAIL) RTW_INFO("ERROR! %s()-%d: Reset port1 TSF fail\n", __FUNCTION__, __LINE__); @@ -3671,7 +3552,7 @@ static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val) hw_var_set_opmode_mbid(Adapter, mode); #else /* disable Port0 TSF update */ - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) | BIT(4)); + rtw_iface_disable_tsf_update(Adapter); /* set net_type */ Set_MSR(Adapter, mode); @@ -3706,14 +3587,14 @@ static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val) #endif } - rtw_write8(Adapter, REG_BCN_CTRL, 0x19); /* disable atim wnd */ - /* rtw_write8(Adapter,REG_BCN_CTRL, 0x18); */ + rtw_write8(Adapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_ATIM); /* disable atim wnd */ + /* rtw_write8(Adapter,REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION); */ } else if (mode == _HW_STATE_ADHOC_) { /* Beacon is polled to TXBUF */ rtw_write16(Adapter, REG_CR, rtw_read16(Adapter, REG_CR) | BIT(8)); ResumeTxBeacon(Adapter); - rtw_write8(Adapter, REG_BCN_CTRL, 0x1a); + rtw_write8(Adapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB); /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */ rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4)); } else if (mode == _HW_STATE_AP_) { @@ -3736,9 +3617,7 @@ static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val) #endif /* CONFIG_INTERRUPT_BASED_TXBCN */ - ResumeTxBeacon(Adapter); - - rtw_write8(Adapter, REG_BCN_CTRL, 0x12); + rtw_write8(Adapter, REG_BCN_CTRL, DIS_TSF_UDT | DIS_BCNQ_SUB); /* Beacon is polled to TXBUF */ rtw_write32(Adapter, REG_CR, rtw_read32(Adapter, REG_CR) | BIT(8)); @@ -3753,7 +3632,6 @@ static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val) rtw_write8(Adapter, REG_DRVERLYINT, 0x05);/* 5ms */ /* rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); */ rtw_write8(Adapter, REG_ATIMWND, 0x0c); /* 13ms */ - rtw_write16(Adapter, REG_BCNTCFG, 0x00); rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */ @@ -3766,22 +3644,22 @@ static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val) /* enable BCN0 Function for if1 */ /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */ #if defined(CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR) - rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP | EN_BCN_FUNCTION | EN_TXBCN_RPT | BIT(1))); + rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT| EN_BCN_FUNCTION | EN_TXBCN_RPT | DIS_BCNQ_SUB)); #else - rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP | EN_BCN_FUNCTION | BIT(1))); + rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB)); #endif #ifdef CONFIG_CONCURRENT_MODE - if (!rtw_mi_buddy_check_fwstate(Adapter, WIFI_FW_ASSOC_SUCCESS)) + if (!rtw_mi_buddy_check_mlmeinfo_state(Adapter, WIFI_FW_ASSOC_SUCCESS)) rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1) & ~EN_BCN_FUNCTION); #endif /* dis BCN1 ATIM WND if if2 is station */ - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1) | BIT(0)); + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1) | DIS_ATIM); #ifdef CONFIG_TSF_RESET_OFFLOAD /* Reset TSF for STA+AP concurrent mode */ - if (rtw_mi_buddy_check_fwstate(Adapter, (WIFI_STATION_STATE | WIFI_ASOC_STATE))) { + if (DEV_STA_LD_NUM(adapter_to_dvobj(Adapter))) { if (rtw_hal_reset_tsf(Adapter, HW_PORT0) == _FAIL) RTW_INFO("ERROR! %s()-%d: Reset port0 TSF fail\n", __FUNCTION__, __LINE__); @@ -3795,121 +3673,6 @@ static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val) } } -static void hw_var_set_bcn_func(PADAPTER Adapter, u8 variable, u8 *val) -{ - u32 bcn_ctrl_reg; - -#ifdef CONFIG_CONCURRENT_MODE - if (Adapter->hw_port == HW_PORT1) - bcn_ctrl_reg = REG_BCN_CTRL_1; - else -#endif - bcn_ctrl_reg = REG_BCN_CTRL; - - - if (*((u8 *)val)) - rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); - else - rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg) & (~(EN_BCN_FUNCTION | EN_TXBCN_RPT))); - - -} - -static void hw_var_set_mlme_disconnect(PADAPTER Adapter, u8 variable, u8 *val) -{ - /* reject all data frames */ -#ifdef CONFIG_CONCURRENT_MODE - if (rtw_mi_check_status(Adapter, MI_LINKED) == _FALSE) -#endif - rtw_write16(Adapter, REG_RXFLTMAP2, 0x00); - -#ifdef CONFIG_CONCURRENT_MODE - if (Adapter->hw_port == HW_PORT1) { - /*reset TSF1*/ - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); - - /*disable update TSF1*/ - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1) | DIS_TSF_UDT); - - /* disable Port1's beacon function*/ - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1) & (~BIT(3))); - } else -#endif - { - /*reset TSF*/ - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); - - /*disable update TSF*/ - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) | DIS_TSF_UDT); - } - -} - -static void hw_var_set_mlme_join(PADAPTER Adapter, u8 variable, u8 *val) -{ -#ifdef CONFIG_CONCURRENT_MODE - u8 RetryLimit = RL_VAL_STA; - u8 type = *((u8 *)val); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - - if (type == 0) { /* prepare to join */ - if (rtw_mi_get_ap_num(Adapter) || rtw_mi_get_mesh_num(Adapter)) - StopTxBeacon(Adapter); - - /* enable to rx data frame.Accept all data frame */ - rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); - - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) - RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA; - else /* Ad-hoc Mode */ - RetryLimit = RL_VAL_AP; - } else if (type == 1) { /* joinbss_event call back when join res < 0 */ - if (rtw_mi_check_status(Adapter, MI_LINKED) == _FALSE) - rtw_write16(Adapter, REG_RXFLTMAP2, 0x00); - - if (rtw_mi_get_ap_num(Adapter) || rtw_mi_get_mesh_num(Adapter)) { - ResumeTxBeacon(Adapter); - - /* reset TSF 1/2 after ResumeTxBeacon */ - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1) | BIT(0)); - - } - } else if (type == 2) { /* sta add event call back */ -#ifdef CONFIG_MI_WITH_MBSSID_CAM - /*if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && (rtw_mi_get_assoced_sta_num(Adapter) == 1)) - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~DIS_TSF_UDT));*/ -#else - /* enable update TSF */ - if (Adapter->hw_port == HW_PORT1) - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1) & (~DIS_TSF_UDT)); - else - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) & (~DIS_TSF_UDT)); - -#endif - if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) { - /* fixed beacon issue for 8191su........... */ - rtw_write8(Adapter, 0x542 , 0x02); - RetryLimit = RL_VAL_AP; - } - - - if (rtw_mi_get_ap_num(Adapter) || rtw_mi_get_mesh_num(Adapter)) { - ResumeTxBeacon(Adapter); - - /* reset TSF 1/2 after ResumeTxBeacon */ - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1) | BIT(0)); - } - - } - - rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); - -#endif -} - - - u8 SetHwReg8188E(_adapter *adapter, u8 variable, u8 *val) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); @@ -3921,104 +3684,13 @@ u8 SetHwReg8188E(_adapter *adapter, u8 variable, u8 *val) case HW_VAR_SET_OPMODE: hw_var_set_opmode(adapter, variable, val); break; - case HW_VAR_BASIC_RATE: { - struct mlme_ext_info *mlmext_info = &adapter->mlmeextpriv.mlmext_info; - u16 input_b = 0, masked = 0, ioted = 0, BrateCfg = 0; - u16 rrsr_2g_force_mask = RRSR_CCK_RATES; - u16 rrsr_2g_allow_mask = (RRSR_24M | RRSR_12M | RRSR_6M | RRSR_CCK_RATES); - - HalSetBrateCfg(adapter, val, &BrateCfg); - input_b = BrateCfg; - - /* apply force and allow mask */ - BrateCfg |= rrsr_2g_force_mask; - BrateCfg &= rrsr_2g_allow_mask; - masked = BrateCfg; - - /* IOT consideration */ - if (mlmext_info->assoc_AP_vendor == HT_IOT_PEER_CISCO) { - /* if peer is cisco and didn't use ofdm rate, we enable 6M ack */ - if ((BrateCfg & (RRSR_24M | RRSR_12M | RRSR_6M)) == 0) - BrateCfg |= RRSR_6M; - } - ioted = BrateCfg; - - pHalData->BasicRateSet = BrateCfg; - - RTW_INFO("HW_VAR_BASIC_RATE: %#x->%#x->%#x\n", input_b, masked, ioted); - - /* Set RRSR rate table. */ - rtw_write16(adapter, REG_RRSR, BrateCfg); - rtw_write8(adapter, REG_RRSR + 2, rtw_read8(adapter, REG_RRSR + 2) & 0xf0); - - rtw_hal_set_hwreg(adapter, HW_VAR_INIT_RTS_RATE, (u8 *)&BrateCfg); - } + case HW_VAR_BASIC_RATE: + rtw_var_set_basic_rate(adapter, val); break; case HW_VAR_TXPAUSE: rtw_write8(adapter, REG_TXPAUSE, *((u8 *)val)); break; - case HW_VAR_BCN_FUNC: - hw_var_set_bcn_func(adapter, variable, val); - break; - case HW_VAR_MLME_DISCONNECT: - hw_var_set_mlme_disconnect(adapter, variable, val); - break; - - case HW_VAR_MLME_JOIN: -#ifdef CONFIG_CONCURRENT_MODE - hw_var_set_mlme_join(adapter, variable, val); -#else - { - u8 RetryLimit = RL_VAL_STA; - u8 type = *((u8 *)val); - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; - - if (type == 0) { /* prepare to join */ - /* enable to rx data frame.Accept all data frame */ - rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF); - - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) - RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA; - else /* Ad-hoc Mode */ - RetryLimit = RL_VAL_AP; - } else if (type == 1) /* joinbss_event call back when join res < 0 */ - rtw_write16(adapter, REG_RXFLTMAP2, 0x00); - else if (type == 2) { /* sta add event call back */ - /* enable update TSF */ - rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL) & (~BIT(4))); - - if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) - RetryLimit = RL_VAL_AP; - } - - rtw_write16(adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); - } -#endif - break; - - case HW_VAR_BEACON_INTERVAL: - { - u16 bcn_interval = *((u16 *)val); - - #ifdef CONFIG_SWTIMER_BASED_TXBCN - bcn_interval = rtw_hal_bcn_interval_adjust(adapter, bcn_interval); - #endif - - rtw_write16(adapter, REG_BCN_INTERVAL, bcn_interval); - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - { - struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { - RTW_INFO("%s==> bcn_interval:%d, eraly_int:%d\n", __func__, bcn_interval, bcn_interval >> 1); - rtw_write8(adapter, REG_DRVERLYINT, bcn_interval >> 1); - } - } - #endif/* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */ - } - break; case HW_VAR_SLOT_TIME: { rtw_write8(adapter, REG_SLOT, val[0]); } @@ -4038,31 +3710,8 @@ u8 SetHwReg8188E(_adapter *adapter, u8 variable, u8 *val) rtw_write8(adapter, REG_WMAC_TRXPTCL_CTL + 2, regTmp); } break; - case HW_VAR_CAM_EMPTY_ENTRY: { - u8 ucIndex = *((u8 *)val); - u8 i; - u32 ulCommand = 0; - u32 ulContent = 0; - u32 ulEncAlgo = CAM_AES; - - for (i = 0; i < CAM_CONTENT_COUNT; i++) { - /* filled id in CAM config 2 byte */ - if (i == 0) { - ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo) << 2); - /* ulContent |= CAM_VALID; */ - } else - ulContent = 0; - /* polling bit, and No Write enable, and address */ - ulCommand = CAM_CONTENT_COUNT * ucIndex + i; - ulCommand = ulCommand | CAM_POLLINIG | CAM_WRITE; - /* write content 0 is equall to mark invalid */ - rtw_write32(adapter, WCAMI, ulContent); /* delay_ms(40); */ - rtw_write32(adapter, RWCAM, ulCommand); /* delay_ms(40); */ - } - } - break; case HW_VAR_CAM_INVALID_ALL: - rtw_write32(adapter, RWCAM, BIT(31) | BIT(30)); + rtw_write32(adapter, REG_CAMCMD, BIT(31) | BIT(30)); break; case HW_VAR_AC_PARAM_VO: rtw_write32(adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]); @@ -4103,6 +3752,7 @@ u8 SetHwReg8188E(_adapter *adapter, u8 variable, u8 *val) rtw_write8(adapter, REG_ACMHWCTRL, AcmCtrl); } break; +#ifdef CONFIG_80211N_HT case HW_VAR_AMPDU_FACTOR: { u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9}; u8 RegToSet_BT[4] = {0x31, 0x74, 0x42, 0x97}; @@ -4137,6 +3787,7 @@ u8 SetHwReg8188E(_adapter *adapter, u8 variable, u8 *val) } } break; +#endif /* CONFIG_80211N_HT */ case HW_VAR_H2C_FW_PWRMODE: { u8 psmode = (*(u8 *)val); @@ -4239,8 +3890,8 @@ u8 SetHwReg8188E(_adapter *adapter, u8 variable, u8 *val) retry_limit = 0x01; - val16 = retry_limit << RETRY_LIMIT_SHORT_SHIFT | retry_limit << RETRY_LIMIT_LONG_SHIFT; - rtw_write16(adapter, REG_RL, val16); + val16 = BIT_SRL(retry_limit) | BIT_LRL(retry_limit); + rtw_write16(adapter, REG_RETRY_LIMIT, val16); while (rtw_get_passing_time_ms(start) < 2000 && !RTW_CANNOT_RUN(adapter) @@ -4274,8 +3925,8 @@ u8 SetHwReg8188E(_adapter *adapter, u8 variable, u8 *val) RTW_INFO("%s:(HW_VAR_CHECK_TXBUF)TXBUF Empty(%d) in %d ms\n", __FUNCTION__, i, pass_ms); retry_limit = RL_VAL_STA; - val16 = retry_limit << RETRY_LIMIT_SHORT_SHIFT | retry_limit << RETRY_LIMIT_LONG_SHIFT; - rtw_write16(adapter, REG_RL, val16); + val16 = BIT_SRL(retry_limit) | BIT_LRL(retry_limit); + rtw_write16(adapter, REG_RETRY_LIMIT, val16); } break; case HW_VAR_RESP_SIFS: { @@ -4563,8 +4214,8 @@ void hal_ra_info_dump(_adapter *padapter , void *sel) #if (RATE_ADAPTIVE_SUPPORT == 1) RTW_PRINT_SEL(sel , "Mac_id:%d ,RSSI:%d(%%)\n", mac_id, pHalData->odmpriv.ra_info[mac_id].rssi_sta_ra); - RTW_PRINT_SEL(sel , "rate_sgi = %d, decision_rate = %s\n", pHalData->odmpriv.ra_info[mac_id].rate_sgi, - HDATA_RATE(pHalData->odmpriv.ra_info[mac_id].decision_rate)); + RTW_PRINT_SEL(sel , "rate_sgi = %d, decision_rate = %s\n", rtw_get_current_tx_sgi(padapter, macid_ctl->sta[mac_id]), + HDATA_RATE(rtw_get_current_tx_rate(padapter, macid_ctl->sta[mac_id]))); RTW_PRINT_SEL(sel , "pt_stage = %d\n", pHalData->odmpriv.ra_info[mac_id].pt_stage); @@ -4572,11 +4223,17 @@ void hal_ra_info_dump(_adapter *padapter , void *sel) #endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/ } else { - u8 cur_rate = rtw_read8(padapter, REG_ADAPTIVE_DATA_RATE_0 + mac_id); - u8 sgi = (cur_rate & BIT7) ? _TRUE : _FALSE; - - cur_rate &= 0x7f; - + u8 cur_rate = 0; + u8 sgi = 0; + + if (padapter->fix_rate == 0xff) { + cur_rate = rtw_read8(padapter, REG_ADAPTIVE_DATA_RATE_0 + mac_id) & 0x7f; + sgi = (cur_rate & BIT7) ? _TRUE : _FALSE; + } else { + cur_rate = padapter->fix_rate & 0x7f; + sgi = ((padapter->fix_rate) & 0x80) >> 7; + } + RTW_PRINT_SEL(sel , "Mac_id:%d ,SGI:%d ,Rate:%s\n", mac_id, sgi, HDATA_RATE(cur_rate)); } } @@ -4586,9 +4243,9 @@ void hal_ra_info_dump(_adapter *padapter , void *sel) u8 GetHalDefVar8188E( - IN PADAPTER Adapter, - IN HAL_DEF_VARIABLE eVariable, - IN PVOID pValue + PADAPTER Adapter, + HAL_DEF_VARIABLE eVariable, + void *pValue ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); diff --git a/hal/rtl8188e/rtl8188e_phycfg.c b/hal/rtl8188e/rtl8188e_phycfg.c index 959491d..f638915 100644 --- a/hal/rtl8188e/rtl8188e_phycfg.c +++ b/hal/rtl8188e/rtl8188e_phycfg.c @@ -46,7 +46,7 @@ #if (SIC_ENABLE == 1) static BOOLEAN sic_IsSICReady( - IN PADAPTER Adapter + PADAPTER Adapter ) { BOOLEAN bRet = _FALSE; @@ -99,7 +99,7 @@ sic_CalculateBitShift( static u32 sic_Read4Byte( - PVOID Adapter, + void *Adapter, u32 offset ) { @@ -117,11 +117,11 @@ sic_Read4Byte( /* RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_PREREAD)); */ #endif rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset & 0xff)); - /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u1Byte)(offset&0xff)); */ - /* RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG, (u1Byte)(offset&0xff))); */ + /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u8)(offset&0xff)); */ + /* RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG, (u8)(offset&0xff))); */ rtw_write8(Adapter, SIC_ADDR_REG + 1, (u8)((offset & 0xff00) >> 8)); - /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8)); */ - /* RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8))); */ + /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8)); */ + /* RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8))); */ rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_READ); /* PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_READ); */ /* RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_READ)); */ @@ -148,9 +148,9 @@ sic_Read4Byte( return u4ret; } -static VOID +static void sic_Write4Byte( - PVOID Adapter, + void *Adapter, u32 offset, u32 data ) @@ -167,13 +167,13 @@ sic_Write4Byte( /* RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_PREWRITE)); */ #endif rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset & 0xff)); - /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u1Byte)(offset&0xff)); */ - /* RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", SIC_ADDR_REG, (u1Byte)(offset&0xff))); */ + /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u8)(offset&0xff)); */ + /* RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", SIC_ADDR_REG, (u8)(offset&0xff))); */ rtw_write8(Adapter, SIC_ADDR_REG + 1, (u8)((offset & 0xff00) >> 8)); - /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8)); */ - /* RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", (SIC_ADDR_REG+1), (u1Byte)((offset&0xff00)>>8))); */ + /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8)); */ + /* RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", (SIC_ADDR_REG+1), (u8)((offset&0xff00)>>8))); */ rtw_write32(Adapter, SIC_DATA_REG, (u32)data); - /* PlatformEFIOWrite4Byte(Adapter, SIC_DATA_REG, (u4Byte)data); */ + /* PlatformEFIOWrite4Byte(Adapter, SIC_DATA_REG, (u32)data); */ /* RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_DATA_REG, data)); */ rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_WRITE); /* PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_WRITE); */ @@ -193,12 +193,12 @@ sic_Write4Byte( /* ************************************************************ * extern function * ************************************************************ */ -static VOID +static void SIC_SetBBReg( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -239,9 +239,9 @@ SIC_SetBBReg( static u32 SIC_QueryBBReg( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -274,9 +274,9 @@ SIC_QueryBBReg( return ReturnValue; } -VOID +void SIC_Init( - IN PADAPTER Adapter + PADAPTER Adapter ) { /* Here we need to write 0x1b8~0x1bf = 0 after fw is downloaded */ @@ -302,7 +302,7 @@ SIC_Init( static BOOLEAN SIC_LedOff( - IN PADAPTER Adapter + PADAPTER Adapter ) { /* When SIC is enabled, led pin will be used as debug pin, */ @@ -318,18 +318,18 @@ SIC_LedOff( * * Input: * PADAPTER Adapter, -* u4Byte RegAddr, //The target address to be readback -* u4Byte BitMask //The target bit position in the target address +* u32 RegAddr, //The target address to be readback +* u32 BitMask //The target bit position in the target address * //to be readback * Output: None -* Return: u4Byte Data //The readback register value +* Return: u32 Data //The readback register value * Note: This function is equal to "GetRegSetting" in PHY programming guide */ u32 PHY_QueryBBReg8188E( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask ) { u32 ReturnValue = 0, OriginalValue, BitShift; @@ -362,10 +362,10 @@ PHY_QueryBBReg8188E( * * Input: * PADAPTER Adapter, -* u4Byte RegAddr, //The target address to be modified -* u4Byte BitMask //The target bit position in the target address +* u32 RegAddr, //The target address to be modified +* u32 BitMask //The target bit position in the target address * //to be modified -* u4Byte Data //The new register value in the target bit position +* u32 Data //The new register value in the target bit position * //of the target address * * Output: None @@ -373,12 +373,12 @@ PHY_QueryBBReg8188E( * Note: This function is equal to "PutRegSetting" in PHY programming guide */ -VOID +void PHY_SetBBReg8188E( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -419,10 +419,10 @@ PHY_SetBBReg8188E( * Input: * PADAPTER Adapter, enum rf_path eRFPath, //Radio path of A/B/C/D -* u4Byte Offset, //The target address to be read +* u32 Offset, //The target address to be read * * Output: None -* Return: u4Byte reback value +* Return: u32 reback value * Note: Threre are three types of serial operations: * 1. Software serial write * 2. Hardware LSSI-Low Speed Serial Interface @@ -432,9 +432,9 @@ PHY_SetBBReg8188E( */ static u32 phy_RFSerialRead( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset ) { u32 retValue = 0; @@ -518,8 +518,8 @@ phy_RFSerialRead( * Input: * PADAPTER Adapter, enum rf_path eRFPath, //Radio path of A/B/C/D -* u4Byte Offset, //The target address to be read -* u4Byte Data //The new register Data in the target bit position +* u32 Offset, //The target address to be read +* u32 Data //The new register Data in the target bit position * //of the target to be read * * Output: None @@ -553,12 +553,12 @@ phy_RFSerialRead( * * */ -static VOID +static void phy_RFSerialWrite( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset, - IN u32 Data + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset, + u32 Data ) { u32 DataAndAddr = 0; @@ -616,20 +616,20 @@ phy_RFSerialWrite( * Input: * PADAPTER Adapter, enum rf_path eRFPath, //Radio path of A/B/C/D -* u4Byte RegAddr, //The target address to be read -* u4Byte BitMask //The target bit position in the target address +* u32 RegAddr, //The target address to be read +* u32 BitMask //The target bit position in the target address * //to be read * * Output: None -* Return: u4Byte Readback value +* Return: u32 Readback value * Note: This function is equal to "GetRFRegSetting" in PHY programming guide */ u32 PHY_QueryRFReg8188E( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask ) { u32 Original_Value, Readback_Value, BitShift; @@ -674,28 +674,28 @@ PHY_QueryRFReg8188E( * Input: * PADAPTER Adapter, enum rf_path eRFPath, //Radio path of A/B/C/D -* u4Byte RegAddr, //The target address to be modified -* u4Byte BitMask //The target bit position in the target address +* u32 RegAddr, //The target address to be modified +* u32 BitMask //The target bit position in the target address * //to be modified -* u4Byte Data //The new register Data in the target bit position +* u32 Data //The new register Data in the target bit position * //of the target address * * Output: None * Return: None * Note: This function is equal to "PutRFRegSetting" in PHY programming guide */ -VOID +void PHY_SetRFReg8188E( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask, + u32 Data ) { /* HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); */ - /* u1Byte RFWaitCounter = 0; */ + /* u8 RFWaitCounter = 0; */ u32 Original_Value, BitShift; /* _irqL irqL; */ @@ -800,9 +800,9 @@ s32 PHY_MACConfig8188E(PADAPTER Adapter) * Return: None * Note: The initialization value is constant and it should never be changes -----------------------------------------------------------------------------*/ -static VOID +static void phy_InitBBRFRegisterDefinition( - IN PADAPTER Adapter + PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -843,54 +843,9 @@ phy_InitBBRFRegisterDefinition( } -static VOID -phy_BB8192C_Config_1T( - IN PADAPTER Adapter -) -{ -#if 0 - /* for path - A */ - phy_set_bb_reg(Adapter, rFPGA0_TxInfo, 0x3, 0x1); - phy_set_bb_reg(Adapter, rFPGA1_TxInfo, 0x0303, 0x0101); - phy_set_bb_reg(Adapter, 0xe74, 0x0c000000, 0x1); - phy_set_bb_reg(Adapter, 0xe78, 0x0c000000, 0x1); - phy_set_bb_reg(Adapter, 0xe7c, 0x0c000000, 0x1); - phy_set_bb_reg(Adapter, 0xe80, 0x0c000000, 0x1); - phy_set_bb_reg(Adapter, 0xe88, 0x0c000000, 0x1); -#endif - /* for path - B */ - phy_set_bb_reg(Adapter, rFPGA0_TxInfo, 0x3, 0x2); - phy_set_bb_reg(Adapter, rFPGA1_TxInfo, 0x300033, 0x200022); - - /* 20100519 Joseph: Add for 1T2R config. Suggested by Kevin, Jenyu and Yunan. */ - phy_set_bb_reg(Adapter, rCCK0_AFESetting, bMaskByte3, 0x45); - phy_set_bb_reg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x23); - phy_set_bb_reg(Adapter, rOFDM0_AGCParameter1, 0x30, 0x1); /* B path first AGC */ - - phy_set_bb_reg(Adapter, 0xe74, 0x0c000000, 0x2); - phy_set_bb_reg(Adapter, 0xe78, 0x0c000000, 0x2); - phy_set_bb_reg(Adapter, 0xe7c, 0x0c000000, 0x2); - phy_set_bb_reg(Adapter, 0xe80, 0x0c000000, 0x2); - phy_set_bb_reg(Adapter, 0xe88, 0x0c000000, 0x2); - - -} - -/* Joseph test: new initialize order!! - * Test only!! This part need to be re-organized. - * Now it is just for 8256. */ -static int -phy_BB8190_Config_HardCode( - IN PADAPTER Adapter -) -{ - /* RT_ASSERT(FALSE, ("This function is not implement yet!!\n")); */ - return _SUCCESS; -} - static int phy_BB8188E_Config_ParaFile( - IN PADAPTER Adapter + PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -962,7 +917,7 @@ phy_BB8190_Config_ParaFile_Fail: int PHY_BBConfig8188E( - IN PADAPTER Adapter + PADAPTER Adapter ) { int rtStatus = _SUCCESS; @@ -1020,7 +975,11 @@ PHY_BBConfig8188E( /* */ rtStatus = phy_BB8188E_Config_ParaFile(Adapter); - hal_set_crystal_cap(Adapter, pHalData->crystal_cap); + if (rtw_phydm_set_crystal_cap(Adapter, pHalData->crystal_cap) == _FALSE) { + RTW_ERR("Init crystal_cap failed\n"); + rtw_warn_on(1); + rtStatus = _FAIL; + } return rtStatus; @@ -1029,7 +988,7 @@ PHY_BBConfig8188E( int PHY_RFConfig8188E( - IN PADAPTER Adapter + PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -1080,9 +1039,9 @@ PHY_RFConfig8188E( *---------------------------------------------------------------------------*/ int rtl8188e_PHY_ConfigRFWithParaFile( - IN PADAPTER Adapter, - IN u8 *pFileName, - IN enum rf_path eRFPath + PADAPTER Adapter, + u8 *pFileName, + enum rf_path eRFPath ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -1113,38 +1072,6 @@ u32 Rtl8192S_HighPower_RadioA_Array[HighPowerRadioAArrayLen] = { 0x013, 0x00000240, }; -/* **************************************** - *----------------------------------------------------------------------------- - * Function: GetTxPowerLevel8190() - * - * Overview: This function is export to "common" moudule - * - * Input: PADAPTER Adapter - * psByte Power Level - * - * Output: NONE - * - * Return: NONE - * - *---------------------------------------------------------------------------*/ -VOID -PHY_GetTxPowerLevel8188E( - IN PADAPTER Adapter, - OUT s32 *powerlevel -) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - s4Byte TxPwrDbm = 13; - - if (pMgntInfo->ClientConfigPwrInDbm != UNSPECIFIED_PWR_DBM) - *powerlevel = pMgntInfo->ClientConfigPwrInDbm; - else - *powerlevel = TxPwrDbm; -#endif -} - /*----------------------------------------------------------------------------- * Function: SetTxPowerLevel8190() * @@ -1152,7 +1079,7 @@ PHY_GetTxPowerLevel8188E( * We must consider RF path later!!!!!!! * * Input: PADAPTER Adapter - * u1Byte channel + * u8 channel * * Output: NONE * @@ -1162,25 +1089,21 @@ PHY_GetTxPowerLevel8188E( * 2009/01/21 MHC Support new EEPROM format from SD3 requirement. * *---------------------------------------------------------------------------*/ -VOID +void PHY_SetTxPowerLevel8188E( - IN PADAPTER Adapter, - IN u8 Channel + PADAPTER Adapter, + u8 Channel ) { - /* RTW_INFO("==>PHY_SetTxPowerLevel8188E()\n"); */ - phy_set_tx_power_level_by_path(Adapter, Channel, RF_PATH_A); - - /* RTW_INFO("<==PHY_SetTxPowerLevel8188E()\n"); */ } -VOID +void PHY_SetTxPowerIndex_8188E( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate + PADAPTER Adapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate ) { if (RFPath == RF_PATH_A) { @@ -1382,10 +1305,10 @@ PHY_SetTxPowerIndex_8188E( } s8 tx_power_extra_bias( - IN enum rf_path RFPath, - IN u8 Rate, - IN enum channel_width BandWidth, - IN u8 Channel + enum rf_path RFPath, + u8 Rate, + enum channel_width BandWidth, + u8 Channel ) { s8 bias = 0; @@ -1398,21 +1321,22 @@ s8 tx_power_extra_bias( u8 PHY_GetTxPowerIndex_8188E( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, + u8 BandWidth, + u8 Channel, struct txpwr_idx_comp *tic ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(pAdapter); s16 power_idx; - u8 base_idx = 0; + u8 pg = 0; s8 by_rate_diff = 0, limit = 0, tpt_offset = 0, extra_bias = 0; BOOLEAN bIn24G = _FALSE; - base_idx = PHY_GetTxPowerIndexBase(pAdapter, RFPath, Rate, RF_1TX, BandWidth, Channel, &bIn24G); + pg = phy_get_pg_txpwr_idx(pAdapter, RFPath, Rate, RF_1TX, BandWidth, Channel, &bIn24G); by_rate_diff = PHY_GetTxPowerByRate(pAdapter, BAND_ON_2_4G, RFPath, Rate); limit = PHY_GetTxPowerLimit(pAdapter, NULL, (u8)(!bIn24G), pHalData->current_channel_bw, RFPath, Rate, RF_1TX, pHalData->current_channel); @@ -1422,47 +1346,24 @@ PHY_GetTxPowerIndex_8188E( if (pAdapter->registrypriv.mp_mode != 1) extra_bias = tx_power_extra_bias(RFPath, Rate, BandWidth, Channel); - if (tic) { - tic->ntx_idx = RF_1TX; - tic->base = base_idx; - tic->by_rate = by_rate_diff; - tic->limit = limit; - tic->tpt = tpt_offset; - tic->ebias = extra_bias; - } + if (tic) + txpwr_idx_comp_set(tic, RF_1TX, pg, by_rate_diff, limit, tpt_offset, extra_bias, 0, 0); by_rate_diff = by_rate_diff > limit ? limit : by_rate_diff; - power_idx = base_idx + by_rate_diff + tpt_offset + extra_bias; + power_idx = pg + by_rate_diff + tpt_offset + extra_bias; if (power_idx < 0) power_idx = 0; - else if (power_idx > MAX_POWER_INDEX) - power_idx = MAX_POWER_INDEX; + else if (power_idx > hal_spec->txgi_max) + power_idx = hal_spec->txgi_max; return power_idx; } -/* - * Description: - * Update transmit power level of all channel supported. - * - * TODO: - * A mode. - * By Bruce, 2008-02-04. - * */ -BOOLEAN -PHY_UpdateTxPowerDbm8188E( - IN PADAPTER Adapter, - IN int powerInDbm -) -{ - return _TRUE; -} - -VOID +void PHY_ScanOperationBackup8188E( - IN PADAPTER Adapter, - IN u8 Operation + PADAPTER Adapter, + u8 Operation ) { #if 0 @@ -1472,13 +1373,13 @@ PHY_ScanOperationBackup8188E( switch (Operation) { case SCAN_OPT_BACKUP: IoType = IO_CMD_PAUSE_DM_BY_SCAN; - rtw_hal_set_hwreg(Adapter, HW_VAR_IO_CMD, (pu1Byte)&IoType); + rtw_hal_set_hwreg(Adapter, HW_VAR_IO_CMD, (u8 *)&IoType); break; case SCAN_OPT_RESTORE: IoType = IO_CMD_RESUME_DM_BY_SCAN; - rtw_hal_set_hwreg(Adapter, HW_VAR_IO_CMD, (pu1Byte)&IoType); + rtw_hal_set_hwreg(Adapter, HW_VAR_IO_CMD, (u8 *)&IoType); break; default: @@ -1489,7 +1390,7 @@ PHY_ScanOperationBackup8188E( } void phy_SpurCalibration_8188E( - IN PADAPTER Adapter + PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -1500,12 +1401,12 @@ phy_SpurCalibration_8188E( phy_set_bb_reg(Adapter, rOFDM0_RxDSP, BIT(9), 0x1);/* enable notch filter */ phy_set_bb_reg(Adapter, rOFDM1_IntfDet, BIT(8) | BIT(7) | BIT(6), 0x2); /* intf_TH */ phy_set_bb_reg(Adapter, rOFDM0_RxDSP, BIT(28) | BIT(27) | BIT(26) | BIT(25) | BIT(24), 0x1f); - p_dm_odm->is_receiver_blocking_en = false; + p_dm_odm->is_rx_blocking_en = false; } else if (pHalData->current_channel_bw == CHANNEL_WIDTH_40 && pHalData->current_channel == 11) { phy_set_bb_reg(Adapter, rOFDM0_RxDSP, BIT(9), 0x1);/* enable notch filter */ phy_set_bb_reg(Adapter, rOFDM1_IntfDet, BIT(8) | BIT(7) | BIT(6), 0x2); /* intf_TH */ phy_set_bb_reg(Adapter, rOFDM0_RxDSP, BIT(28) | BIT(27) | BIT(26) | BIT(25) | BIT(24), 0x1f); - p_dm_odm->is_receiver_blocking_en = false; + p_dm_odm->is_rx_blocking_en = false; } else { if (Adapter->registrypriv.notch_filter == 0) phy_set_bb_reg(Adapter, rOFDM0_RxDSP, BIT(9), 0x0);/* disable notch filter */ @@ -1527,9 +1428,9 @@ phy_SpurCalibration_8188E( * (2) Will two workitem of "switch channel" and "switch channel bandwidth" run * concurrently? *---------------------------------------------------------------------------*/ -static VOID +static void _PHY_SetBWMode88E( - IN PADAPTER Adapter + PADAPTER Adapter ) { /* PADAPTER Adapter = (PADAPTER)pTimer->Adapter; */ @@ -1540,8 +1441,8 @@ _PHY_SetBWMode88E( /* return; */ /* Added it for 20/40 mhz switch time evaluation by guangan 070531 */ - /* u4Byte NowL, NowH; */ - /* u8Byte BeginTime, EndTime; */ + /* u32 NowL, NowH; */ + /* u64 BeginTime, EndTime; */ if (pHalData->rf_chip == RF_PSEUDO_11N) { /* pHalData->SetBWModeInProgress= _FALSE; */ @@ -1558,7 +1459,7 @@ _PHY_SetBWMode88E( /* Added it for 20/40 mhz switch time evaluation by guangan 070531 */ /* NowL = PlatformEFIORead4Byte(Adapter, TSFR); */ /* NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); */ - /* BeginTime = ((u8Byte)NowH << 32) + NowL; */ + /* BeginTime = ((u64)NowH << 32) + NowL; */ /* 3 */ /* 3 */ /* <1>Set MAC register */ @@ -1567,7 +1468,7 @@ _PHY_SetBWMode88E( regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE); regRRSR_RSC = rtw_read8(Adapter, REG_RRSR + 2); - /* regBwOpMode = rtw_hal_get_hwreg(Adapter,HW_VAR_BWMODE,(pu1Byte)®BwOpMode); */ + /* regBwOpMode = rtw_hal_get_hwreg(Adapter,HW_VAR_BWMODE,(u8 *)®BwOpMode); */ switch (pHalData->current_channel_bw) { case CHANNEL_WIDTH_20: @@ -1627,7 +1528,7 @@ _PHY_SetBWMode88E( /* Added it for 20/40 mhz switch time evaluation by guangan 070531 */ /* NowL = PlatformEFIORead4Byte(Adapter, TSFR); */ /* NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); */ - /* EndTime = ((u8Byte)NowH << 32) + NowL; */ + /* EndTime = ((u64)NowH << 32) + NowL; */ /* 3<3>Set RF related register */ switch (pHalData->rf_chip) { @@ -1679,11 +1580,11 @@ _PHY_SetBWMode88E( * * Note: We do not take j mode into consideration now * *--------------------------------------------------------------------------- */ #endif -VOID +void PHY_SetBWMode8188E( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth, /* 20M or 40M */ - IN unsigned char Offset /* Upper, Lower, or Don't care */ + PADAPTER Adapter, + enum channel_width Bandwidth, /* 20M or 40M */ + unsigned char Offset /* Upper, Lower, or Don't care */ ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -1752,7 +1653,7 @@ static void _PHY_SwChnl8188E(PADAPTER Adapter, u8 channel) RTW_INFO("[%s] ch = %d\n", __FUNCTION__, channel); /* s1. pre common command - CmdID_SetTxPowerLevel */ - PHY_SetTxPowerLevel8188E(Adapter, channel); + rtw_hal_set_tx_power_level(Adapter, channel); /* s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel */ param1 = RF_CHNLBW; @@ -1766,10 +1667,10 @@ static void _PHY_SwChnl8188E(PADAPTER Adapter, u8 channel) /* s3. post common command - CmdID_End, None */ } -VOID +void PHY_SwChnl8188E(/* Call after initialization */ - IN PADAPTER Adapter, - IN u8 channel + PADAPTER Adapter, + u8 channel ) { /* PADAPTER Adapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, _TRUE); */ @@ -1853,13 +1754,13 @@ PHY_SwChnl8188E(/* Call after initialization */ } } -VOID +void PHY_SetSwChnlBWMode8188E( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 + PADAPTER Adapter, + u8 channel, + enum channel_width Bandwidth, + u8 Offset40, + u8 Offset80 ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -1879,119 +1780,10 @@ PHY_SetSwChnlBWMode8188E( /* RTW_INFO("<==%s()\n",__FUNCTION__); */ } -static VOID _PHY_SetRFPathSwitch( - IN PADAPTER pAdapter, - IN BOOLEAN bMain, - IN BOOLEAN is2T -) -{ - u8 u1bTmp; - if (!rtw_is_hw_init_completed(pAdapter)) { - u1bTmp = rtw_read8(pAdapter, REG_LEDCFG2) | BIT7; - rtw_write8(pAdapter, REG_LEDCFG2, u1bTmp); - /* phy_set_bb_reg(pAdapter, REG_LEDCFG0, BIT23, 0x01); */ - phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); - } - - if (is2T) { - if (bMain) - phy_set_bb_reg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5 | BIT6, 0x1); /* 92C_Path_A */ - else - phy_set_bb_reg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5 | BIT6, 0x2); /* BT */ - } else { - - if (bMain) - phy_set_bb_reg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2); /* Main */ - else - phy_set_bb_reg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1); /* Aux */ - } - -} - -/* return value TRUE => Main; FALSE => Aux */ - -static BOOLEAN _PHY_QueryRFPathSwitch( - IN PADAPTER pAdapter, - IN BOOLEAN is2T -) -{ - /* if(is2T) - * return _TRUE; */ - - if (!rtw_is_hw_init_completed(pAdapter)) { - phy_set_bb_reg(pAdapter, REG_LEDCFG0, BIT23, 0x01); - phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); - } - - if (is2T) { - if (phy_query_bb_reg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5 | BIT6) == 0x01) - return _TRUE; - else - return _FALSE; - } else { - if (phy_query_bb_reg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300) == 0x02) - return _TRUE; - else - return _FALSE; - } -} - - -static VOID -_PHY_DumpRFReg(IN PADAPTER pAdapter) -{ - u32 rfRegValue, rfRegOffset; - - /* RTPRINT(FINIT, INIT_RF, ("PHY_DumpRFReg()====>\n")); */ - - for (rfRegOffset = 0x00; rfRegOffset <= 0x30; rfRegOffset++) { - rfRegValue = phy_query_rf_reg(pAdapter, RF_PATH_A, rfRegOffset, bMaskDWord); - /* RTPRINT(FINIT, INIT_RF, (" 0x%02x = 0x%08x\n",rfRegOffset,rfRegValue)); */ - } - /* RTPRINT(FINIT, INIT_RF, ("<===== PHY_DumpRFReg()\n")); */ -} - - -/* - * Move from phycfg.c to gen.c to be code independent later - * - * -------------------------Move to other DIR later---------------------------- */ -#ifdef CONFIG_USB_HCI - -/* - * Description: - * To dump all Tx FIFO LLT related link-list table. - * Added by Roger, 2009.03.10. - * */ -VOID -DumpBBDbgPort_92CU( - IN PADAPTER Adapter -) -{ - - - phy_set_bb_reg(Adapter, 0x0908, 0xffff, 0x0000); - - phy_set_bb_reg(Adapter, 0x0908, 0xffff, 0x0803); - - phy_set_bb_reg(Adapter, 0x0908, 0xffff, 0x0a06); - - phy_set_bb_reg(Adapter, 0x0908, 0xffff, 0x0007); - - phy_set_bb_reg(Adapter, 0x0908, 0xffff, 0x0100); - phy_set_bb_reg(Adapter, 0x0a28, 0x00ff0000, 0x000f0000); - - phy_set_bb_reg(Adapter, 0x0908, 0xffff, 0x0100); - phy_set_bb_reg(Adapter, 0x0a28, 0x00ff0000, 0x00150000); - - -} -#endif - -VOID +void PHY_SetRFEReg_8188E( - IN PADAPTER Adapter + PADAPTER Adapter ) { u8 u1tmp = 0; diff --git a/hal/rtl8188e/rtl8188e_rf6052.c b/hal/rtl8188e/rtl8188e_rf6052.c index 96fe091..3e2fc29 100644 --- a/hal/rtl8188e/rtl8188e_rf6052.c +++ b/hal/rtl8188e/rtl8188e_rf6052.c @@ -58,7 +58,7 @@ * * Overview: For RL6052, we must change some RF settign for 1T or 2T. * - * Input: u2Byte DataRate // 0x80-8f, 0x90-9f + * Input: u16 DataRate // 0x80-8f, 0x90-9f * * Output: NONE * @@ -70,17 +70,17 @@ * Firmwaer support the utility later. * *---------------------------------------------------------------------------*/ -void rtl8188e_RF_ChangeTxPath(IN PADAPTER Adapter, - IN u16 DataRate) +void rtl8188e_RF_ChangeTxPath(PADAPTER Adapter, + u16 DataRate) { /* We do not support gain table change inACUT now !!!! Delete later !!! */ #if 0/* (RTL92SE_FPGA_VERIFY == 0) */ - static u1Byte RF_Path_Type = 2; /* 1 = 1T 2= 2T */ - static u4Byte tx_gain_tbl1[6] + static u8 RF_Path_Type = 2; /* 1 = 1T 2= 2T */ + static u32 tx_gain_tbl1[6] = {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100}; - static u4Byte tx_gain_tbl2[6] + static u32 tx_gain_tbl2[6] = {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030}; - u1Byte i; + u8 i; if (RF_Path_Type == 2 && (DataRate & 0xF) <= 0x7) { /* Set TX SYNC power G2G3 loop filter */ @@ -132,10 +132,10 @@ void rtl8188e_RF_ChangeTxPath(IN PADAPTER Adapter, * * Note: For RF type 0222D *---------------------------------------------------------------------------*/ -VOID +void rtl8188e_PHY_RF6052SetBandwidth( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth) /* 20M or 40M */ + PADAPTER Adapter, + enum channel_width Bandwidth) /* 20M or 40M */ { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -158,7 +158,7 @@ rtl8188e_PHY_RF6052SetBandwidth( static int phy_RF6052_Config_ParaFile( - IN PADAPTER Adapter + PADAPTER Adapter ) { u32 u4RegValue = 0; @@ -283,7 +283,7 @@ phy_RF6052_Config_ParaFile_Fail: int PHY_RF6052_Config8188E( - IN PADAPTER Adapter) + PADAPTER Adapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); int rtStatus = _SUCCESS; @@ -301,27 +301,6 @@ PHY_RF6052_Config8188E( /* Config BB and RF */ /* */ rtStatus = phy_RF6052_Config_ParaFile(Adapter); -#if 0 - switch (Adapter->MgntInfo.bRegHwParaFile) { - case 0: - phy_RF6052_Config_HardCode(Adapter); - break; - - case 1: - rtStatus = phy_RF6052_Config_ParaFile(Adapter); - break; - - case 2: - /* Partial Modify. */ - phy_RF6052_Config_HardCode(Adapter); - phy_RF6052_Config_ParaFile(Adapter); - break; - - default: - phy_RF6052_Config_HardCode(Adapter); - break; - } -#endif return rtStatus; } diff --git a/hal/rtl8188e/rtl8188e_xmit.c b/hal/rtl8188e/rtl8188e_xmit.c index b679b23..4e66614 100644 --- a/hal/rtl8188e/rtl8188e_xmit.c +++ b/hal/rtl8188e/rtl8188e_xmit.c @@ -119,12 +119,12 @@ struct EMInfo { void InsertEMContent_8188E( struct EMInfo *pEMInfo, - IN pu1Byte VirtualAddress) + u8 *VirtualAddress) { #if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 - u1Byte index = 0; - u4Byte dwtmp = 0; + u8 index = 0; + u32 dwtmp = 0; #endif _rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE); diff --git a/hal/rtl8188e/usb/rtl8188eu_xmit.c b/hal/rtl8188e/usb/rtl8188eu_xmit.c index 858334d..5030ab4 100644 --- a/hal/rtl8188e/usb/rtl8188eu_xmit.c +++ b/hal/rtl8188e/usb/rtl8188eu_xmit.c @@ -382,7 +382,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz , u8 ba if (pattrib->ht_en) sgi = 1; - data_rate = 0x13; /* default rate: MCS7 */ + data_rate = DESC_RATEMCS7; /* default rate: MCS7 */ } if (bmcst) { data_rate = MRateToHwRate(pattrib->rate); @@ -413,20 +413,19 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz , u8 ba if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) ptxdesc->txdw4 |= cpu_to_le32(BIT(24));/* DATA_SHORT */ - - ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); +#ifdef CONFIG_IP_R_MONITOR + if((pattrib->ether_type == ETH_P_ARP) && + (IsSupportedTxOFDM(padapter->registrypriv.wireless_mode))) { + ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(IEEE80211_OFDM_RATE_6MB)); + #ifdef DBG_IP_R_MONITOR + RTW_INFO(FUNC_ADPT_FMT ": SP Packet(0x%04X) rate=0x%x SeqNum = %d\n", + FUNC_ADPT_ARG(padapter), pattrib->ether_type, MRateToHwRate(pmlmeext->tx_rate), pattrib->seqnum); + #endif/*DBG_IP_R_MONITOR*/ + } else +#endif/*CONFIG_IP_R_MONITOR*/ + ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); } -#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX - /* offset 24 */ - if (pattrib->hw_tcp_csum == 1) { - /* ptxdesc->txdw6 = 0; */ /* clear TCP_CHECKSUM and IP_CHECKSUM. It's zero already!! */ - u8 ip_hdr_offset = 32 + pattrib->hdrlen + pattrib->iv_len + 8; - ptxdesc->txdw7 = (1 << 31) | (ip_hdr_offset << 16); - RTW_INFO("ptxdesc->txdw7 = %08x\n", ptxdesc->txdw7); - } -#endif - #ifdef CONFIG_TDLS #ifdef CONFIG_XMIT_ACK /* CCX-TXRPT ack for xmit mgmt frames. */ @@ -550,6 +549,7 @@ s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter) /* PHAL_DATA_TYPE phal; */ struct xmit_priv *pxmitpriv; struct xmit_buf *pxmitbuf; + struct xmit_frame *pxmitframe; s32 ret; @@ -582,8 +582,9 @@ s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter) pxmitbuf = dequeue_pending_xmitbuf(pxmitpriv); if (pxmitbuf == NULL) break; - + pxmitframe = (struct xmit_frame *) pxmitbuf->priv_data; rtw_write_port(padapter, pxmitbuf->ff_hwaddr, pxmitbuf->len, (unsigned char *)pxmitbuf); + rtw_free_xmitframe(pxmitpriv, pxmitframe); } while (1); @@ -651,7 +652,12 @@ static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe) #ifdef CONFIG_XMIT_THREAD_MODE pxmitbuf->len = w_sz; pxmitbuf->ff_hwaddr = ff_hwaddr; - enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); + + if (pxmitframe->attrib.qsel == QSLT_BEACON) + /* download rsvd page*/ + rtw_write_port(padapter, ff_hwaddr, w_sz, (u8 *)pxmitbuf); + else + enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); #else /* RTW_INFO("%s: rtw_write_port size =%d\n", __func__,w_sz); */ inner_ret = rtw_write_port(padapter, ff_hwaddr, w_sz, (unsigned char *)pxmitbuf); @@ -667,6 +673,9 @@ static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe) } +#ifdef CONFIG_XMIT_THREAD_MODE + if (pxmitframe->attrib.qsel == QSLT_BEACON) +#endif rtw_free_xmitframe(pxmitpriv, pxmitframe); if (ret != _SUCCESS) @@ -851,9 +860,7 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv len = rtw_wlan_pkt_size(pxmitframe) + TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ); - if (_RND8(pbuf + len) > MAX_XMITBUF_SZ) - /* if (_RND8(pbuf + len) > (MAX_XMITBUF_SZ/2))//to do : for TX TP finial tune , Georgia 2012-0323 */ - { + if (_RND8(pbuf + len) > MAX_XMITBUF_SZ) { /* RTW_INFO("%s....len> MAX_XMITBUF_SZ\n",__FUNCTION__); */ pxmitframe->agg_num = 1; pxmitframe->pkt_offset = 1; @@ -963,7 +970,19 @@ agg_end: ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe); /* RTW_INFO("%s ===================================== write port,buf_size(%d)\n",__FUNCTION__,pbuf_tail); */ /* xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr */ + +#ifdef CONFIG_XMIT_THREAD_MODE + pxmitbuf->len = pbuf_tail; + pxmitbuf->ff_hwaddr = ff_hwaddr; + + if (pfirstframe->attrib.qsel == QSLT_BEACON) + /* download rsvd page*/ + rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8 *)pxmitbuf); + else + enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); +#else rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8 *)pxmitbuf); +#endif /* 3 5. update statisitc */ @@ -973,6 +992,9 @@ agg_end: rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail); +#ifdef CONFIG_XMIT_THREAD_MODE + if (pfirstframe->attrib.qsel == QSLT_BEACON) +#endif rtw_free_xmitframe(pxmitpriv, pfirstframe); return _TRUE; diff --git a/hal/rtl8188e/usb/usb_halinit.c b/hal/rtl8188e/usb/usb_halinit.c index dae91ab..743b4c3 100644 --- a/hal/rtl8188e/usb/usb_halinit.c +++ b/hal/rtl8188e/usb/usb_halinit.c @@ -25,10 +25,10 @@ #endif -static VOID +static void _ConfigNormalChipOutEP_8188E( - IN PADAPTER pAdapter, - IN u8 NumOutPipe + PADAPTER pAdapter, + u8 NumOutPipe ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -55,9 +55,9 @@ _ConfigNormalChipOutEP_8188E( } static BOOLEAN HalUsbSetQueuePipeMapping8188EUsb( - IN PADAPTER pAdapter, - IN u8 NumInPipe, - IN u8 NumOutPipe + PADAPTER pAdapter, + u8 NumInPipe, + u8 NumOutPipe ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -157,44 +157,6 @@ static u32 _InitPowerOn_8188EU(_adapter *padapter) } - -static void _dbg_dump_macreg(_adapter *padapter) -{ - u32 offset = 0; - u32 val32 = 0; - u32 index = 0 ; - for (index = 0; index < 64; index++) { - offset = index * 4; - val32 = rtw_read32(padapter, offset); - RTW_INFO("offset : 0x%02x ,val:0x%08x\n", offset, val32); - } -} - - -static void _InitPABias(_adapter *padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - u8 pa_setting; - - /* FIXED PA current issue */ - /* efuse_one_byte_read(padapter, 0x1FA, &pa_setting); */ - efuse_OneByteRead(padapter, 0x1FA, &pa_setting, _FALSE); - - - if (!(pa_setting & BIT0)) { - phy_set_rf_reg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x0F406); - phy_set_rf_reg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x4F406); - phy_set_rf_reg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x8F406); - phy_set_rf_reg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0xCF406); - } - - if (!(pa_setting & BIT4)) { - pa_setting = rtw_read8(padapter, 0x16); - pa_setting &= 0x0F; - rtw_write8(padapter, 0x16, pa_setting | 0x80); - rtw_write8(padapter, 0x16, pa_setting | 0x90); - } -} #ifdef CONFIG_BT_COEXIST static void _InitBTCoexist(_adapter *padapter) { @@ -254,9 +216,9 @@ static void _InitBTCoexist(_adapter *padapter) * --------------------------------------------------------------- */ /* Shall USB interface init this? */ -static VOID +static void _InitInterrupt( - IN PADAPTER Adapter + PADAPTER Adapter ) { u32 imr, imr_ex; @@ -300,9 +262,9 @@ _InitInterrupt( } -static VOID +static void _InitQueueReservedPage( - IN PADAPTER Adapter + PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -348,10 +310,10 @@ _InitQueueReservedPage( rtw_write32(Adapter, REG_RQPN, value32); } -static VOID +static void _InitTxBufferBoundary( - IN PADAPTER Adapter, - IN u8 txpktbuf_bndy + PADAPTER Adapter, + u8 txpktbuf_bndy ) { struct registry_priv *pregistrypriv = &Adapter->registrypriv; @@ -367,9 +329,9 @@ _InitTxBufferBoundary( } -static VOID +static void _InitPageBoundary( - IN PADAPTER Adapter + PADAPTER Adapter ) { /* RX Page Boundary */ @@ -392,15 +354,15 @@ _InitPageBoundary( } -static VOID +static void _InitNormalChipRegPriority( - IN PADAPTER Adapter, - IN u16 beQ, - IN u16 bkQ, - IN u16 viQ, - IN u16 voQ, - IN u16 mgtQ, - IN u16 hiQ + PADAPTER Adapter, + u16 beQ, + u16 bkQ, + u16 viQ, + u16 voQ, + u16 mgtQ, + u16 hiQ ) { u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); @@ -412,9 +374,9 @@ _InitNormalChipRegPriority( rtw_write16(Adapter, REG_TRXDMA_CTRL, value16); } -static VOID +static void _InitNormalChipOneOutEpPriority( - IN PADAPTER Adapter + PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -446,9 +408,9 @@ _InitNormalChipOneOutEpPriority( } -static VOID +static void _InitNormalChipTwoOutEpPriority( - IN PADAPTER Adapter + PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -497,9 +459,9 @@ _InitNormalChipTwoOutEpPriority( } -static VOID +static void _InitNormalChipThreeOutEpPriority( - IN PADAPTER Adapter + PADAPTER Adapter ) { struct registry_priv *pregistrypriv = &Adapter->registrypriv; @@ -523,9 +485,9 @@ _InitNormalChipThreeOutEpPriority( _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ); } -static VOID +static void _InitQueuePriority( - IN PADAPTER Adapter + PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -550,9 +512,9 @@ _InitQueuePriority( -static VOID +static void _InitHardwareDropIncorrectBulkOut( - IN PADAPTER Adapter + PADAPTER Adapter ) { #ifdef ENABLE_USB_DROP_INCORRECT_OUT @@ -562,9 +524,9 @@ _InitHardwareDropIncorrectBulkOut( #endif } -static VOID +static void _InitNetworkType( - IN PADAPTER Adapter + PADAPTER Adapter ) { u32 value32; @@ -578,21 +540,21 @@ _InitNetworkType( } -static VOID +static void _InitDriverInfoSize( - IN PADAPTER Adapter, - IN u8 drvInfoSize + PADAPTER Adapter, + u8 drvInfoSize ) { rtw_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize); } -static VOID +static void _InitWMACSetting( - IN PADAPTER Adapter + PADAPTER Adapter ) { - /* u4Byte value32; */ + /* u32 value32; */ /* u16 value16; */ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u32 rcr; @@ -632,9 +594,9 @@ _InitWMACSetting( } -static VOID +static void _InitAdaptiveCtrl( - IN PADAPTER Adapter + PADAPTER Adapter ) { u16 value16; @@ -644,7 +606,12 @@ _InitAdaptiveCtrl( value32 = rtw_read32(Adapter, REG_RRSR); value32 &= ~RATE_BITMAP_ALL; value32 |= RATE_RRSR_CCK_ONLY_1M; - rtw_write32(Adapter, REG_RRSR, value32); + + #ifdef RTW_DYNAMIC_RRSR + rtw_phydm_set_rrsr(Adapter, value32, TRUE); + #else + rtw_write32(Adapter, REG_RRSR, value32); + #endif /* CF-END Threshold */ /* m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); */ @@ -654,14 +621,14 @@ _InitAdaptiveCtrl( rtw_write16(Adapter, REG_SPEC_SIFS, value16); /* Retry Limit */ - value16 = _LRL(RL_VAL_STA) | _SRL(RL_VAL_STA); - rtw_write16(Adapter, REG_RL, value16); + value16 = BIT_LRL(RL_VAL_STA) | BIT_SRL(RL_VAL_STA); + rtw_write16(Adapter, REG_RETRY_LIMIT, value16); } -static VOID +static void _InitEDCA( - IN PADAPTER Adapter + PADAPTER Adapter ) { /* Set Spec SIFS (used in NAV) */ @@ -682,10 +649,10 @@ _InitEDCA( } -static VOID +static void _InitBeaconMaxError( - IN PADAPTER Adapter, - IN BOOLEAN InfraMode + PADAPTER Adapter, + BOOLEAN InfraMode ) { @@ -707,9 +674,9 @@ static void _InitHWLed(PADAPTER Adapter) } #endif /* CONFIG_RTW_LED */ -static VOID +static void _InitRDGSetting( - IN PADAPTER Adapter + PADAPTER Adapter ) { rtw_write8(Adapter, REG_RD_CTRL, 0xFF); @@ -717,9 +684,9 @@ _InitRDGSetting( rtw_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05); } -static VOID +static void _InitRetryFunction( - IN PADAPTER Adapter + PADAPTER Adapter ) { u8 value8; @@ -747,9 +714,9 @@ _InitRetryFunction( * 12/10/2010 MHC Seperate to smaller function. * *---------------------------------------------------------------------------*/ -static VOID +static void usb_AggSettingTxUpdate( - IN PADAPTER Adapter + PADAPTER Adapter ) { #ifdef CONFIG_USB_TX_AGGREGATION @@ -787,9 +754,9 @@ usb_AggSettingTxUpdate( * 12/10/2010 MHC Seperate to smaller function. * *---------------------------------------------------------------------------*/ -static VOID +static void usb_AggSettingRxUpdate( - IN PADAPTER Adapter + PADAPTER Adapter ) { #ifdef CONFIG_USB_RX_AGGREGATION @@ -870,9 +837,9 @@ usb_AggSettingRxUpdate( #endif } /* usb_AggSettingRxUpdate */ -static VOID +static void InitUsbAggregationSetting( - IN PADAPTER Adapter + PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -886,19 +853,19 @@ InitUsbAggregationSetting( /* 201/12/10 MH Add for USB agg mode dynamic switch. */ pHalData->UsbRxHighSpeedMode = _FALSE; } -VOID +void HalRxAggr8188EUsb( - IN PADAPTER Adapter, - IN BOOLEAN Value + PADAPTER Adapter, + BOOLEAN Value ) { #if 0/* USB_RX_AGGREGATION_92C */ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - u1Byte valueDMATimeout; - u1Byte valueDMAPageCount; - u1Byte valueUSBTimeout; - u1Byte valueUSBBlockCount; + u8 valueDMATimeout; + u8 valueDMAPageCount; + u8 valueUSBTimeout; + u8 valueUSBBlockCount; /* selection to prevent bad TP. */ if (IS_WIRELESS_MODE_B(Adapter) || IS_WIRELESS_MODE_G(Adapter) || IS_WIRELESS_MODE_A(Adapter) || pMgntInfo->bWiFiConfg) { @@ -909,13 +876,13 @@ HalRxAggr8188EUsb( valueDMAPageCount = 0x01; valueUSBTimeout = 0x0f; valueUSBBlockCount = 0x01; - rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_PGTO, (pu1Byte)&valueDMATimeout); - rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_PGTH, (pu1Byte)&valueDMAPageCount); - rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTO, (pu1Byte)&valueUSBTimeout); - rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTH, (pu1Byte)&valueUSBBlockCount); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_PGTO, (u8 *)&valueDMATimeout); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_PGTH, (u8 *)&valueDMAPageCount); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTO, (u8 *)&valueUSBTimeout); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTH, (u8 *)&valueUSBBlockCount); } else { - rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTO, (pu1Byte)&pMgntInfo->RegRxAggBlockTimeout); - rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTH, (pu1Byte)&pMgntInfo->RegRxAggBlockCount); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTO, (u8 *)&pMgntInfo->RegRxAggBlockTimeout); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTH, (u8 *)&pMgntInfo->RegRxAggBlockCount); } #endif @@ -940,9 +907,9 @@ HalRxAggr8188EUsb( * 12/10/2010 MHC Create Version 0. * *---------------------------------------------------------------------------*/ -VOID +void USB_AggModeSwitch( - IN PADAPTER Adapter + PADAPTER Adapter ) { #if 0 @@ -1014,9 +981,9 @@ USB_AggModeSwitch( #endif } /* USB_AggModeSwitch */ -static VOID +static void _InitRFType( - IN PADAPTER Adapter + PADAPTER Adapter ) { struct registry_priv *pregpriv = &Adapter->registrypriv; @@ -1036,8 +1003,8 @@ _InitRFType( } /* Set CCK and OFDM Block "ON" */ -static VOID _BBTurnOnBlock( - IN PADAPTER Adapter +static void _BBTurnOnBlock( + PADAPTER Adapter ) { #if (DISABLE_BB_RF) @@ -1048,42 +1015,8 @@ static VOID _BBTurnOnBlock( phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); } -static VOID _RfPowerSave( - IN PADAPTER Adapter -) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - enum rf_path eRFPath; - -#if (DISABLE_BB_RF) - return; -#endif - - if (pMgntInfo->RegRfOff == TRUE) { /* User disable RF via registry. */ - MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW); - /* Those action will be discard in MgntActSet_RF_State because off the same state */ - for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) - phy_set_rf_reg(Adapter, eRFPath, 0x4, 0xC00, 0x0); - } else if (pMgntInfo->RfOffReason > RF_CHANGE_BY_PS) { /* H/W or S/W RF OFF before sleep. */ - MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason); - } else { - pHalData->eRFPowerState = eRfOn; - pMgntInfo->RfOffReason = 0; - if (Adapter->bInSetPower || Adapter->bResetInProgress) - PlatformUsbEnableInPipes(Adapter); - } -#endif -} - -enum { - Antenna_Lfet = 1, - Antenna_Right = 2, -}; - -static VOID -_InitAntenna_Selection(IN PADAPTER Adapter) +static void +_InitAntenna_Selection(PADAPTER Adapter) { #ifdef CONFIG_ANTENNA_DIVERSITY HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -1102,12 +1035,12 @@ _InitAntenna_Selection(IN PADAPTER Adapter) * If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and * slim card. * */ -static VOID +#if 0 +static void HalDetectSelectiveSuspendMode( - IN PADAPTER Adapter + PADAPTER Adapter ) { -#if 0 u8 tmpvalue; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); @@ -1134,63 +1067,10 @@ HalDetectSelectiveSuspendMode( pdvobjpriv->RegUsbSS = _FALSE; /* } */ } -#endif } /* HalDetectSelectiveSuspendMode */ -#if 0 -/*----------------------------------------------------------------------------- - * Function: HwSuspendModeEnable92Cu() - * - * Overview: HW suspend mode switch. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 08/23/2010 MHC HW suspend mode switch test.. - *---------------------------------------------------------------------------*/ -static VOID -HwSuspendModeEnable_88eu( - IN PADAPTER pAdapter, - IN u8 Type -) -{ - /* PRT_USB_DEVICE pDevice = GET_RT_USB_DEVICE(pAdapter); */ - u16 reg = rtw_read16(pAdapter, REG_GPIO_MUXCFG); - - /* if (!pDevice->RegUsbSS) */ - { - return; - } - - /* */ - /* 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW */ - /* to enter suspend mode automatically. Otherwise, it will shut down major power */ - /* domain and 8051 will stop. When we try to enter selective suspend mode, we */ - /* need to prevent HW to enter D2 mode aumotmatically. Another way, Host will */ - /* issue a S10 signal to power domain. Then it will cleat SIC setting(from Yngli). */ - /* We need to enable HW suspend mode when enter S3/S4 or disable. We need */ - /* to disable HW suspend mode for IPS/radio_off. */ - /* */ - if (Type == _FALSE) { - reg |= BIT14; - rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); - reg |= BIT12; - rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); - } else { - reg &= (~BIT12); - rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); - reg &= (~BIT14); - rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); - } - -} /* HwSuspendModeEnable92Cu */ #endif -rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter) +rt_rf_power_state RfOnOffDetect(PADAPTER pAdapter) { struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(pAdapter); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -1511,22 +1391,6 @@ u32 rtl8188eu_hal_init(PADAPTER Adapter) rtw_write32(Adapter, REG_MACID_NO_LINK_0, 0xFFFFFFFF); rtw_write32(Adapter, REG_MACID_NO_LINK_1, 0xFFFFFFFF); -#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI) - -#ifdef CONFIG_CHECK_AC_LIFETIME - /* Enable lifetime check for the four ACs */ - rtw_write8(Adapter, REG_LIFETIME_CTRL, rtw_read8(Adapter, REG_LIFETIME_CTRL) | 0x0f); -#endif /* CONFIG_CHECK_AC_LIFETIME */ - -#ifdef CONFIG_TX_MCAST2UNI - rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */ - rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */ -#else /* CONFIG_TX_MCAST2UNI */ - rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000); /* unit: 256us. 3s */ - rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000); /* unit: 256us. 3s */ -#endif /* CONFIG_TX_MCAST2UNI */ -#endif /* CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI */ - #ifdef CONFIG_RTW_LED _InitHWLed(Adapter); @@ -1548,10 +1412,7 @@ u32 rtl8188eu_hal_init(PADAPTER Adapter) HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); /* 2010/12/17 MH We need to set TX power according to EFUSE content at first. */ - PHY_SetTxPowerLevel8188E(Adapter, pHalData->current_channel); - - /* Move by Neo for USB SS to below setp - * _RfPowerSave(Adapter); */ + rtw_hal_set_tx_power_level(Adapter, pHalData->current_channel); _InitAntenna_Selection(Adapter); @@ -1624,8 +1485,6 @@ u32 rtl8188eu_hal_init(PADAPTER Adapter) } } - /* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); - * _InitPABias(Adapter); */ rtw_write8(Adapter, REG_USB_HRPWM, 0); #ifdef CONFIG_XMIT_ACK @@ -1642,7 +1501,7 @@ exit: hal_init_stages_timestamp[HAL_INIT_STAGES_END] = rtw_get_current_time(); for (hal_init_profiling_i = 0; hal_init_profiling_i < HAL_INIT_STAGES_NUM - 1; hal_init_profiling_i++) { - RTW_INFO("DBG_HAL_INIT_PROFILING: %35s, %u, %5u, %5u\n" + RTW_INFO("DBG_HAL_INIT_PROFILING: %35s, %lu, %5lu, %5u\n" , hal_init_stages_str[hal_init_profiling_i] , hal_init_stages_timestamp[hal_init_profiling_i] , (hal_init_stages_timestamp[hal_init_profiling_i + 1] - hal_init_stages_timestamp[hal_init_profiling_i]) @@ -1669,9 +1528,9 @@ void _ps_close_RF(_adapter *padapter) } -VOID +void hal_poweroff_8188eu( - IN PADAPTER Adapter + PADAPTER Adapter ) { @@ -1874,11 +1733,11 @@ unsigned int rtl8188eu_inirp_deinit(PADAPTER Adapter) * * ------------------------------------------------------------------- */ -static VOID +static void _ReadLEDSetting( - IN PADAPTER Adapter, - IN u8 *PROMContent, - IN BOOLEAN AutoloadFail + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail ) { #ifdef CONFIG_RTW_LED @@ -1899,54 +1758,11 @@ _ReadLEDSetting( #endif } -static VOID -_ReadRFSetting( - IN PADAPTER Adapter, - IN u8 *PROMContent, - IN BOOLEAN AutoloadFail -) -{ -} - -static VOID -hal_InitPGData( - IN PADAPTER pAdapter, - IN OUT u8 *PROMContent -) -{ -#if 0 - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u32 i; - u16 value16; - - if (_FALSE == pHalData->bautoload_fail_flag) { - /* autoload OK. */ - if (_TRUE == pHalData->EepromOrEfuse) { - /* Read all Content from EEPROM or EFUSE. */ - for (i = 0; i < HWSET_MAX_SIZE_88E; i += 2) { - /* value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1))); */ - /* *((u16 *)(&PROMContent[i])) = value16; */ - } - } else { - /* Read EFUSE real map to shadow. */ - EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE); - _rtw_memcpy((void *)PROMContent, (void *)pHalData->efuse_eeprom_data, HWSET_MAX_SIZE_88E); - } - } else { - /* autoload fail */ - pHalData->bautoload_fail_flag = _TRUE; - /* update to default value 0xFF */ - if (_FALSE == pHalData->EepromOrEfuse) - EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE); - } -#endif -} static void Hal_EfuseParsePIDVID_8188EU( - IN PADAPTER pAdapter, - IN u8 *hwinfo, - IN BOOLEAN AutoLoadFail + PADAPTER pAdapter, + u8 *hwinfo, + BOOLEAN AutoLoadFail ) { @@ -1977,7 +1793,7 @@ Hal_EfuseParsePIDVID_8188EU( static void Hal_CustomizeByCustomerID_8188EU( - IN PADAPTER padapter + PADAPTER padapter ) { #if 0 @@ -2022,12 +1838,11 @@ Hal_CustomizeByCustomerID_8188EU( #endif } -static VOID +static void readAdapterInfo_8188EU( - IN PADAPTER padapter + PADAPTER padapter ) { -#if 1 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); /* parse the eeprom/efuse content */ @@ -2061,25 +1876,10 @@ readAdapterInfo_8188EU( Hal_CustomizeByCustomerID_8188EU(padapter); _ReadLEDSetting(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); - -#else - -#ifdef CONFIG_INTEL_PROXIM - /* for intel proximity */ - if (pHalData->rf_type == RF_1T1R) - Adapter->proximity.proxim_support = _TRUE; - else if (pHalData->rf_type == RF_2T2R) { - if ((pHalData->EEPROMPID == 0x8186) && - (pHalData->EEPROMVID == 0x0bda)) - Adapter->proximity.proxim_support = _TRUE; - } else - Adapter->proximity.proxim_support = _FALSE; -#endif /* CONFIG_INTEL_PROXIM */ -#endif } static void _ReadPROMContent( - IN PADAPTER Adapter + PADAPTER Adapter ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); @@ -2102,9 +1902,9 @@ static void _ReadPROMContent( -static VOID +static void _ReadRFType( - IN PADAPTER Adapter + PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -2121,8 +1921,6 @@ static u8 ReadAdapterInfo8188EU(PADAPTER Adapter) /* Read EEPROM size before call any EEPROM function */ Adapter->EepromAddressSize = GetEEPROMSize8188E(Adapter); - /* Efuse_InitSomeVar(Adapter); */ - _ReadRFType(Adapter);/* rf_chip->_InitRFType() */ _ReadPROMContent(Adapter); @@ -2165,12 +1963,46 @@ u8 SetHwReg8188EU(PADAPTER Adapter, u8 variable, u8 *val) case HW_VAR_RXDMA_AGG_PG_TH: #ifdef CONFIG_USB_RX_AGGREGATION { + /* threshold == 1 , Disable Rx-agg when AP is B/G mode or wifi_spec=1 to prevent bad TP. */ + u8 threshold = *((u8 *)val); - if (threshold == 0) - threshold = pHalData->rxagg_dma_size; + + if (threshold == 0) { + switch (pHalData->rxagg_mode) { + case RX_AGG_DMA: + threshold = (pHalData->rxagg_dma_size & 0x0F); + break; + case RX_AGG_USB: + case RX_AGG_MIX: + threshold = (pHalData->rxagg_usb_size & 0x0F); + break; + case RX_AGG_DISABLE: + default: + break; + } + } + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold); + +#ifdef CONFIG_80211N_HT + { + /* 2014-07-24 Fix WIFI Logo -5.2.4/5.2.9 - DT3 low TP issue */ + /* Adjust RxAggrTimeout to close to zero disable RxAggr for RxAgg-USB mode, suggested by designer */ + /* Timeout value is calculated by 34 / (2^n) */ + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + struct ht_priv *phtpriv = &pmlmepriv->htpriv; + + if (pHalData->rxagg_mode == RX_AGG_USB) { + /* BG mode || (wifi_spec=1 && BG mode Testbed) */ + if ((threshold == 1) && (phtpriv->ht_option == _FALSE)) + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, 0); + else + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, pHalData->rxagg_usb_timeout); + } + } +#endif/* CONFIG_80211N_HT */ } -#endif +#endif/* CONFIG_USB_RX_AGGREGATION */ break; case HW_VAR_SET_RPWM: #ifdef CONFIG_LPS_LCLK @@ -2213,9 +2045,9 @@ void GetHwReg8188EU(PADAPTER Adapter, u8 variable, u8 *val) * */ u8 GetHalDefVar8188EUsb( - IN PADAPTER Adapter, - IN HAL_DEF_VARIABLE eVariable, - IN PVOID pValue + PADAPTER Adapter, + HAL_DEF_VARIABLE eVariable, + void *pValue ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -2253,9 +2085,9 @@ GetHalDefVar8188EUsb( * */ u8 SetHalDefVar8188EUsb( - IN PADAPTER Adapter, - IN HAL_DEF_VARIABLE eVariable, - IN PVOID pValue + PADAPTER Adapter, + HAL_DEF_VARIABLE eVariable, + void *pValue ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -2296,20 +2128,6 @@ u32 _update_92cu_basic_rate(_adapter *padapter, unsigned int mask) return BrateCfg; } #endif -void _update_response_rate(_adapter *padapter, unsigned int mask) -{ - u8 RateIndex = 0; - /* Set RRSR rate table. */ - rtw_write8(padapter, REG_RRSR, mask & 0xff); - rtw_write8(padapter, REG_RRSR + 1, (mask >> 8) & 0xff); - - /* Set RTS initial rate */ - while (mask > 0x1) { - mask = (mask >> 1); - RateIndex++; - } - rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex); -} static void rtl8188eu_init_default_value(_adapter *padapter) { @@ -2320,7 +2138,6 @@ static void rtl8188eu_init_default_value(_adapter *padapter) pHalData = GET_HAL_DATA(padapter); pwrctrlpriv = adapter_to_pwrctl(padapter); - rtl8188e_init_default_value(padapter); /* init default value */ pHalData->fw_ractrl = _FALSE; diff --git a/include/Hal8188EPhyCfg.h b/include/Hal8188EPhyCfg.h index 3fc0b11..9df1850 100644 --- a/include/Hal8188EPhyCfg.h +++ b/include/Hal8188EPhyCfg.h @@ -55,129 +55,125 @@ /* * BB and RF register read/write * */ -u32 PHY_QueryBBReg8188E(IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask); -void PHY_SetBBReg8188E(IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data); -u32 PHY_QueryRFReg8188E(IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask); -void PHY_SetRFReg8188E(IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data); +u32 PHY_QueryBBReg8188E(PADAPTER Adapter, + u32 RegAddr, + u32 BitMask); +void PHY_SetBBReg8188E(PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data); +u32 PHY_QueryRFReg8188E(PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask); +void PHY_SetRFReg8188E(PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask, + u32 Data); /* * Initialization related function */ /* MAC/BB/RF HAL config */ -int PHY_MACConfig8188E(IN PADAPTER Adapter); -int PHY_BBConfig8188E(IN PADAPTER Adapter); -int PHY_RFConfig8188E(IN PADAPTER Adapter); +int PHY_MACConfig8188E(PADAPTER Adapter); +int PHY_BBConfig8188E(PADAPTER Adapter); +int PHY_RFConfig8188E(PADAPTER Adapter); /* RF config */ -int rtl8188e_PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN u8 *pFileName, enum rf_path eRFPath); +int rtl8188e_PHY_ConfigRFWithParaFile( PADAPTER Adapter, u8 *pFileName, enum rf_path eRFPath); /* * RF Power setting */ -/* extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, - * IN RT_RF_POWER_STATE eRFPowerState); */ +/* extern BOOLEAN PHY_SetRFPowerState(PADAPTER Adapter, + * RT_RF_POWER_STATE eRFPowerState); */ /* * BB TX Power R/W * */ -void PHY_GetTxPowerLevel8188E(IN PADAPTER Adapter, - OUT s32 *powerlevel); -void PHY_SetTxPowerLevel8188E(IN PADAPTER Adapter, - IN u8 channel); -BOOLEAN PHY_UpdateTxPowerDbm8188E(IN PADAPTER Adapter, - IN int powerInDbm); +void PHY_SetTxPowerLevel8188E(PADAPTER Adapter, + u8 channel); -VOID +void PHY_SetTxPowerIndex_8188E( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate + PADAPTER Adapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate ); u8 PHY_GetTxPowerIndex_8188E( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, + u8 BandWidth, + u8 Channel, struct txpwr_idx_comp *tic ); /* * Switch bandwidth for 8192S */ -/* extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); */ -void PHY_SetBWMode8188E(IN PADAPTER pAdapter, - IN enum channel_width ChnlWidth, - IN unsigned char Offset); +/* extern void PHY_SetBWModeCallback8192C(PRT_TIMER pTimer ); */ +void PHY_SetBWMode8188E(PADAPTER pAdapter, + enum channel_width ChnlWidth, + unsigned char Offset); /* * Set FW CMD IO for 8192S. */ -/* extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, - * IN IO_TYPE IOType); */ +/* extern BOOLEAN HalSetIO8192C(PADAPTER Adapter, + * IO_TYPE IOType); */ /* * Set A2 entry to fw for 8192S * */ -extern void FillA2Entry8192C(IN PADAPTER Adapter, - IN u8 index, - IN u8 *val); +extern void FillA2Entry8192C(PADAPTER Adapter, + u8 index, + u8 *val); /* * channel switch related funciton */ -/* extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); */ -void PHY_SwChnl8188E(IN PADAPTER pAdapter, - IN u8 channel); +/* extern void PHY_SwChnlCallback8192C(PRT_TIMER pTimer ); */ +void PHY_SwChnl8188E(PADAPTER pAdapter, + u8 channel); -VOID +void PHY_SetSwChnlBWMode8188E( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 + PADAPTER Adapter, + u8 channel, + enum channel_width Bandwidth, + u8 Offset40, + u8 Offset80 ); -VOID +void PHY_SetRFEReg_8188E( - IN PADAPTER Adapter + PADAPTER Adapter ); /* * BB/MAC/RF other monitor API * */ -VOID phy_set_rf_path_switch_8188e(IN struct dm_struct *phydm, IN bool bMain); +void phy_set_rf_path_switch_8188e(struct dm_struct *phydm, bool bMain); -extern VOID +extern void PHY_SwitchEphyParameter( - IN PADAPTER Adapter + PADAPTER Adapter ); -extern VOID +extern void PHY_EnableHostClkReq( - IN PADAPTER Adapter + PADAPTER Adapter ); BOOLEAN SetAntennaConfig92C( - IN PADAPTER Adapter, - IN u8 DefaultAnt + PADAPTER Adapter, + u8 DefaultAnt ); /*--------------------------Exported Function prototype---------------------*/ @@ -253,7 +249,7 @@ SetAntennaConfig92C( #endif #if (SIC_ENABLE == 1) - VOID SIC_Init(IN PADAPTER Adapter); + void SIC_Init( PADAPTER Adapter); #endif diff --git a/include/Hal8188FPhyCfg.h b/include/Hal8188FPhyCfg.h index 1f03a33..e5854db 100644 --- a/include/Hal8188FPhyCfg.h +++ b/include/Hal8188FPhyCfg.h @@ -39,34 +39,34 @@ /*--------------------------Exported Function prototype---------------------*/ u32 PHY_QueryBBReg_8188F( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask ); -VOID +void PHY_SetBBReg_8188F( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data ); u32 PHY_QueryRFReg_8188F( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask ); -VOID +void PHY_SetRFReg_8188F( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask, + u32 Data ); /* MAC/BB/RF HAL config */ @@ -78,53 +78,47 @@ s32 PHY_MACConfig8188F(PADAPTER padapter); int PHY_ConfigRFWithParaFile_8188F( - IN PADAPTER Adapter, - IN u8 *pFileName, + PADAPTER Adapter, + u8 *pFileName, enum rf_path eRFPath ); -VOID +void PHY_SetTxPowerIndex_8188F( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate + PADAPTER Adapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate ); u8 PHY_GetTxPowerIndex_8188F( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, + u8 BandWidth, + u8 Channel, struct txpwr_idx_comp *tic ); -VOID -PHY_GetTxPowerLevel8188F( - IN PADAPTER Adapter, - OUT s32 *powerlevel -); - -VOID +void PHY_SetTxPowerLevel8188F( - IN PADAPTER Adapter, - IN u8 channel + PADAPTER Adapter, + u8 channel ); -VOID +void PHY_SetSwChnlBWMode8188F( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 + PADAPTER Adapter, + u8 channel, + enum channel_width Bandwidth, + u8 Offset40, + u8 Offset80 ); -VOID phy_set_rf_path_switch_8188f( - IN struct dm_struct *phydm, - IN bool bMain +void phy_set_rf_path_switch_8188f( + struct dm_struct *phydm, + bool bMain ); void BBTurnOnBlock_8188F(_adapter *adapter); diff --git a/include/Hal8192EPhyCfg.h b/include/Hal8192EPhyCfg.h index d6394c6..cce2c83 100644 --- a/include/Hal8192EPhyCfg.h +++ b/include/Hal8192EPhyCfg.h @@ -51,30 +51,30 @@ /* * BB and RF register read/write * */ -u32 PHY_QueryBBReg8192E(IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask); -void PHY_SetBBReg8192E(IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data); -u32 PHY_QueryRFReg8192E(IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask); -void PHY_SetRFReg8192E(IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data); +u32 PHY_QueryBBReg8192E(PADAPTER Adapter, + u32 RegAddr, + u32 BitMask); +void PHY_SetBBReg8192E(PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data); +u32 PHY_QueryRFReg8192E(PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask); +void PHY_SetRFReg8192E(PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask, + u32 Data); /* * Initialization related function * * MAC/BB/RF HAL config */ -int PHY_MACConfig8192E(IN PADAPTER Adapter); -int PHY_BBConfig8192E(IN PADAPTER Adapter); -int PHY_RFConfig8192E(IN PADAPTER Adapter); +int PHY_MACConfig8192E(PADAPTER Adapter); +int PHY_BBConfig8192E(PADAPTER Adapter); +int PHY_RFConfig8192E(PADAPTER Adapter); /* RF config */ @@ -82,66 +82,64 @@ int PHY_RFConfig8192E(IN PADAPTER Adapter); /* * BB TX Power R/W * */ -void PHY_GetTxPowerLevel8192E(IN PADAPTER Adapter, OUT s32 *powerlevel); -void PHY_SetTxPowerLevel8192E(IN PADAPTER Adapter, IN u8 channel); -BOOLEAN PHY_UpdateTxPowerDbm8192E(IN PADAPTER Adapter, IN int powerInDbm); +void PHY_SetTxPowerLevel8192E(PADAPTER Adapter, u8 channel); -VOID +void PHY_SetTxPowerIndex_8192E( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate + PADAPTER Adapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate ); u8 PHY_GetTxPowerIndex_8192E( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, + u8 BandWidth, + u8 Channel, struct txpwr_idx_comp *tic ); /* * channel switch related funciton * */ -VOID +void PHY_SetSwChnlBWMode8192E( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 + PADAPTER Adapter, + u8 channel, + enum channel_width Bandwidth, + u8 Offset40, + u8 Offset80 ); -VOID +void PHY_SetRFEReg_8192E( - IN PADAPTER Adapter + PADAPTER Adapter ); void phy_SpurCalibration_8192E( - IN PADAPTER Adapter, - IN enum spur_cal_method method + PADAPTER Adapter, + enum spur_cal_method method ); -void PHY_SpurCalibration_8192E(IN PADAPTER Adapter); +void PHY_SpurCalibration_8192E( PADAPTER Adapter); #ifdef CONFIG_SPUR_CAL_NBI void phy_SpurCalibration_8192E_NBI( - IN PADAPTER Adapter + PADAPTER Adapter ); #endif /* * BB/MAC/RF other monitor API * */ -VOID +void phy_set_rf_path_switch_8192e( - IN struct dm_struct *phydm, - IN bool bMain + struct dm_struct *phydm, + bool bMain ); /*--------------------------Exported Function prototype---------------------*/ diff --git a/include/Hal8192FPhyCfg.h b/include/Hal8192FPhyCfg.h new file mode 100644 index 0000000..021e85c --- /dev/null +++ b/include/Hal8192FPhyCfg.h @@ -0,0 +1,125 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __INC_HAL8192FPHYCFG_H__ +#define __INC_HAL8192FPHYCFG_H__ + +/*--------------------------Define Parameters-------------------------------*/ +#define LOOP_LIMIT 5 +#define MAX_STALL_TIME 50 /* us */ +#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ +#define MAX_TXPWR_IDX_NMODE_92S 63 +#define Reset_Cnt_Limit 3 + +#ifdef CONFIG_PCI_HCI + #define MAX_AGGR_NUM 0x0B +#else + #define MAX_AGGR_NUM 0x07 +#endif /* CONFIG_PCI_HCI */ + + +/*--------------------------Define Parameters End-------------------------------*/ + + +/*------------------------------Define structure----------------------------*/ + +/*------------------------------Define structure End----------------------------*/ + +/*--------------------------Exported Function prototype---------------------*/ +u32 +PHY_QueryBBReg_8192F( + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask +); + +void +PHY_SetBBReg_8192F( + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data +); + +u32 +PHY_QueryRFReg_8192F( + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask +); + +void +PHY_SetRFReg_8192F( + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask, + u32 Data +); + +/* MAC/BB/RF HAL config */ +int PHY_BBConfig8192F(PADAPTER Adapter ); + +int PHY_RFConfig8192F(PADAPTER Adapter); + +s32 PHY_MACConfig8192F(PADAPTER padapter); + +int +PHY_ConfigRFWithParaFile_8192F( + PADAPTER Adapter, + u8 *pFileName, + enum rf_path eRFPath +); + +void +PHY_SetTxPowerIndex_8192F( + PADAPTER Adapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate +); + +u8 +PHY_GetTxPowerIndex_8192F( + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, + u8 BandWidth, + u8 Channel, + struct txpwr_idx_comp *tic +); + +void +PHY_SetTxPowerLevel8192F( + PADAPTER Adapter, + u8 channel +); + +void +PHY_SetSwChnlBWMode8192F( + PADAPTER Adapter, + u8 channel, + enum channel_width Bandwidth, + u8 Offset40, + u8 Offset80 +); + +void phy_set_rf_path_switch_8192f( + PADAPTER pAdapter, + bool bMain +); +/*--------------------------Exported Function prototype End---------------------*/ + +#endif diff --git a/include/Hal8192FPhyReg.h b/include/Hal8192FPhyReg.h new file mode 100644 index 0000000..b82f7f9 --- /dev/null +++ b/include/Hal8192FPhyReg.h @@ -0,0 +1,1134 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __INC_HAL8192FPHYREG_H__ +#define __INC_HAL8192FPHYREG_H__ + +#define rSYM_WLBT_PAPE_SEL 0x64 +/* + * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF + * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF + * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 + * 3. RF register 0x00-2E + * 4. Bit Mask for BB/RF register + * 5. Other definition for BB/RF R/W + * */ + + +/* + * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF + * 1. Page1(0x100) + * */ +#define rPMAC_Reset 0x100 +#define rPMAC_TxStart 0x104 +#define rPMAC_TxLegacySIG 0x108 +#define rPMAC_TxHTSIG1 0x10c +#define rPMAC_TxHTSIG2 0x110 +#define rPMAC_PHYDebug 0x114 +#define rPMAC_TxPacketNum 0x118 +#define rPMAC_TxIdle 0x11c +#define rPMAC_TxMACHeader0 0x120 +#define rPMAC_TxMACHeader1 0x124 +#define rPMAC_TxMACHeader2 0x128 +#define rPMAC_TxMACHeader3 0x12c +#define rPMAC_TxMACHeader4 0x130 +#define rPMAC_TxMACHeader5 0x134 +#define rPMAC_TxDataType 0x138 +#define rPMAC_TxRandomSeed 0x13c +#define rPMAC_CCKPLCPPreamble 0x140 +#define rPMAC_CCKPLCPHeader 0x144 +#define rPMAC_CCKCRC16 0x148 +#define rPMAC_OFDMRxCRC32OK 0x170 +#define rPMAC_OFDMRxCRC32Er 0x174 +#define rPMAC_OFDMRxParityEr 0x178 +#define rPMAC_OFDMRxCRC8Er 0x17c +#define rPMAC_CCKCRxRC16Er 0x180 +#define rPMAC_CCKCRxRC32Er 0x184 +#define rPMAC_CCKCRxRC32OK 0x188 +#define rPMAC_TxStatus 0x18c + +/* + * 2. Page2(0x200) + * + * The following two definition are only used for USB interface. */ +#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ +#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ + +/* + * 3. Page8(0x800) + * */ +#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC // RF BW Setting?? */ + +#define rFPGA0_TxInfo 0x804 /* Status report?? */ +#define rFPGA0_PSDFunction 0x808 + +#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ + +#define rFPGA0_RFTiming1 0x810 /* Useless now */ +#define rFPGA0_RFTiming2 0x814 + +#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ +#define rFPGA0_XA_HSSIParameter2 0x824 +#define rFPGA0_XB_HSSIParameter1 0x828 +#define rFPGA0_XB_HSSIParameter2 0x82c +#define rTxAGC_B_Rate18_06 0x830 +#define rTxAGC_B_Rate54_24 0x834 +#define rTxAGC_B_CCK1_55_Mcs32 0x838 +#define rTxAGC_B_Mcs03_Mcs00 0x83c + +#define rTxAGC_B_Mcs07_Mcs04 0x848 +#define rTxAGC_B_Mcs11_Mcs08 0x84c + +#define rFPGA0_XA_LSSIParameter 0x840 +#define rFPGA0_XB_LSSIParameter 0x844 + +#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ +#define rFPGA0_RFSleepUpParameter 0x854 + +#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ +#define rFPGA0_XCD_SwitchControl 0x85c + +#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ +#define rFPGA0_XB_RFInterfaceOE 0x864 + +#define rTxAGC_B_Mcs15_Mcs12 0x868 +#define rTxAGC_B_CCK11_A_CCK2_11 0x86c + +#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ +#define rFPGA0_XCD_RFInterfaceSW 0x874 + +#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ +#define rFPGA0_XCD_RFParameter 0x87c + +#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ +#define rFPGA0_AnalogParameter2 0x884 +#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ +#define rFPGA0_AnalogParameter4 0x88c + +#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ +#define rFPGA0_XB_LSSIReadBack 0x8a4 +#define rFPGA0_XC_LSSIReadBack 0x8a8 +#define rFPGA0_XD_LSSIReadBack 0x8ac + +#define rFPGA0_PSDReport 0x8b4 /* Useless now */ +#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ +#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ +#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now // RF Interface Readback Value */ +#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ + +/* + * 4. Page9(0x900) + * */ +#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC // RF BW Setting?? */ +#define rFPGA1_TxBlock 0x904 /* Useless now */ +#define rFPGA1_DebugSelect 0x908 /* Useless now */ +#define rFPGA1_TxInfo 0x90c /* Useless now // Status report?? */ +#define rDPDT_control 0x92c +#define rfe_ctrl_anta_src 0x930 +#define rS0S1_PathSwitch 0x948 +#define rBBrx_DFIR 0x954 + +/* + * 5. PageA(0xA00) + * + * Set Control channel to upper or lower. These settings are required only for 40MHz */ +#define rCCK0_System 0xa00 + +#define rCCK0_AFESetting 0xa04 /* Disable init gain now // Select RX path by RSSI */ +#define rCCK0_CCA 0xa08 /* Disable init gain now // Init gain */ + +#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ +#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ + +#define rCCK0_RxHP 0xa14 + +#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ +#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ + +#define rCCK0_TxFilter1 0xa20 +#define rCCK0_TxFilter2 0xa24 +#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ +#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ +#define rCCK0_TRSSIReport 0xa50 +#define rCCK0_RxReport 0xa54 /* 0xa57 */ +#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ +#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ + +/* + * PageB(0xB00) + * */ +#define rPdp_AntA 0xb00 +#define rPdp_AntA_4 0xb04 +#define rPdp_AntA_8 0xb08 +#define rPdp_AntA_C 0xb0c +#define rPdp_AntA_10 0xb10 +#define rPdp_AntA_14 0xb14 +#define rPdp_AntA_18 0xb18 +#define rPdp_AntA_1C 0xb1c +#define rPdp_AntA_20 0xb20 +#define rPdp_AntA_24 0xb24 + +#define rConfig_Pmpd_AntA 0xb28 +#define rConfig_ram64x16 0xb2c + +#define rBndA 0xb30 +#define rHssiPar 0xb34 + +#define rConfig_AntA 0xb68 +#define rConfig_AntB 0xb6c + +#define rPdp_AntB 0xb70 +#define rPdp_AntB_4 0xb74 +#define rPdp_AntB_8 0xb78 +#define rPdp_AntB_C 0xb7c +#define rPdp_AntB_10 0xb80 +#define rPdp_AntB_14 0xb84 +#define rPdp_AntB_18 0xb88 +#define rPdp_AntB_1C 0xb8c +#define rPdp_AntB_20 0xb90 +#define rPdp_AntB_24 0xb94 + +#define rConfig_Pmpd_AntB 0xb98 + +#define rBndB 0xba0 + +#define rAPK 0xbd8 +#define rPm_Rx0_AntA 0xbdc +#define rPm_Rx1_AntA 0xbe0 +#define rPm_Rx2_AntA 0xbe4 +#define rPm_Rx3_AntA 0xbe8 +#define rPm_Rx0_AntB 0xbec +#define rPm_Rx1_AntB 0xbf0 +#define rPm_Rx2_AntB 0xbf4 +#define rPm_Rx3_AntB 0xbf8 +/* + * 6. PageC(0xC00) + * */ +#define rOFDM0_LSTF 0xc00 + +#define rOFDM0_TRxPathEnable 0xc04 +#define rOFDM0_TRMuxPar 0xc08 +#define rOFDM0_TRSWIsolation 0xc0c + +#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ +#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */ +#define rOFDM0_XBRxAFE 0xc18 +#define rOFDM0_XBRxIQImbalance 0xc1c +#define rOFDM0_XCRxAFE 0xc20 +#define rOFDM0_XCRxIQImbalance 0xc24 +#define rOFDM0_XDRxAFE 0xc28 +#define rOFDM0_XDRxIQImbalance 0xc2c + +#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD // DM tune init gain */ +#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ +#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ +#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ + +#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ +#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ +#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ +#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ + +#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ +#define rOFDM0_XAAGCCore2 0xc54 +#define rOFDM0_XBAGCCore1 0xc58 +#define rOFDM0_XBAGCCore2 0xc5c +#define rOFDM0_XCAGCCore1 0xc60 +#define rOFDM0_XCAGCCore2 0xc64 +#define rOFDM0_XDAGCCore1 0xc68 +#define rOFDM0_XDAGCCore2 0xc6c + +#define rOFDM0_AGCParameter1 0xc70 +#define rOFDM0_AGCParameter2 0xc74 +#define rOFDM0_AGCRSSITable 0xc78 +#define rOFDM0_HTSTFAGC 0xc7c + +#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ +#define rOFDM0_XATxAFE 0xc84 +#define rOFDM0_XBTxIQImbalance 0xc88 +#define rOFDM0_XBTxAFE 0xc8c +#define rOFDM0_XCTxIQImbalance 0xc90 +#define rOFDM0_XCTxAFE 0xc94 +#define rOFDM0_XDTxIQImbalance 0xc98 +#define rOFDM0_XDTxAFE 0xc9c + +#define rOFDM0_RxIQExtAnta 0xca0 +#define rOFDM0_TxCoeff1 0xca4 +#define rOFDM0_TxCoeff2 0xca8 +#define rOFDM0_TxCoeff3 0xcac +#define rOFDM0_TxCoeff4 0xcb0 +#define rOFDM0_TxCoeff5 0xcb4 +#define rOFDM0_TxCoeff6 0xcb8 +#define rOFDM0_RxHPParameter 0xce0 +#define rOFDM0_TxPseudoNoiseWgt 0xce4 +#define rOFDM0_FrameSync 0xcf0 +#define rOFDM0_DFSReport 0xcf4 + +/* + * 7. PageD(0xD00) + * */ +#define rOFDM1_LSTF 0xd00 +#define rOFDM1_TRxPathEnable 0xd04 + +#define rOFDM1_CFO 0xd08 /* No setting now */ +#define rOFDM1_CSI1 0xd10 +#define rOFDM1_SBD 0xd14 +#define rOFDM1_CSI2 0xd18 +#define rOFDM1_CFOTracking 0xd2c +#define rOFDM1_TRxMesaure1 0xd34 +#define rOFDM1_IntfDet 0xd3c +#define rOFDM1_PseudoNoiseStateAB 0xd50 +#define rOFDM1_PseudoNoiseStateCD 0xd54 +#define rOFDM1_RxPseudoNoiseWgt 0xd58 + +#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ +#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ +#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ + +#define rOFDM_ShortCFOAB 0xdac /* No setting now */ +#define rOFDM_ShortCFOCD 0xdb0 +#define rOFDM_LongCFOAB 0xdb4 +#define rOFDM_LongCFOCD 0xdb8 +#define rOFDM_TailCFOAB 0xdbc +#define rOFDM_TailCFOCD 0xdc0 +#define rOFDM_PWMeasure1 0xdc4 +#define rOFDM_PWMeasure2 0xdc8 +#define rOFDM_BWReport 0xdcc +#define rOFDM_AGCReport 0xdd0 +#define rOFDM_RxSNR 0xdd4 +#define rOFDM_RxEVMCSI 0xdd8 +#define rOFDM_SIGReport 0xddc + + +/* + * 8. PageE(0xE00) + * */ +#define rTxAGC_A_Rate18_06 0xe00 +#define rTxAGC_A_Rate54_24 0xe04 +#define rTxAGC_A_CCK1_Mcs32 0xe08 +#define rTxAGC_A_Mcs03_Mcs00 0xe10 +#define rTxAGC_A_Mcs07_Mcs04 0xe14 +#define rTxAGC_A_Mcs11_Mcs08 0xe18 +#define rTxAGC_A_Mcs15_Mcs12 0xe1c + +#define rFPGA0_IQK 0xe28 +#define rTx_IQK_Tone_A 0xe30 +#define rRx_IQK_Tone_A 0xe34 +#define rTx_IQK_PI_A 0xe38 +#define rRx_IQK_PI_A 0xe3c + +#define rTx_IQK 0xe40 +#define rRx_IQK 0xe44 +#define rIQK_AGC_Pts 0xe48 +#define rIQK_AGC_Rsp 0xe4c +#define rTx_IQK_Tone_B 0xe50 +#define rRx_IQK_Tone_B 0xe54 +#define rTx_IQK_PI_B 0xe58 +#define rRx_IQK_PI_B 0xe5c +#define rIQK_AGC_Cont 0xe60 + +#define rBlue_Tooth 0xe6c +#define rRx_Wait_CCA 0xe70 +#define rTx_CCK_RFON 0xe74 +#define rTx_CCK_BBON 0xe78 +#define rTx_OFDM_RFON 0xe7c +#define rTx_OFDM_BBON 0xe80 +#define rTx_To_Rx 0xe84 +#define rTx_To_Tx 0xe88 +#define rRx_CCK 0xe8c + +#define rTx_Power_Before_IQK_A 0xe94 +#define rTx_Power_After_IQK_A 0xe9c + +#define rRx_Power_Before_IQK_A 0xea0 +#define rRx_Power_Before_IQK_A_2 0xea4 +#define rRx_Power_After_IQK_A 0xea8 +#define rRx_Power_After_IQK_A_2 0xeac + +#define rTx_Power_Before_IQK_B 0xeb4 +#define rTx_Power_After_IQK_B 0xebc + +#define rRx_Power_Before_IQK_B 0xec0 +#define rRx_Power_Before_IQK_B_2 0xec4 +#define rRx_Power_After_IQK_B 0xec8 +#define rRx_Power_After_IQK_B_2 0xecc + +#define rRx_OFDM 0xed0 +#define rRx_Wait_RIFS 0xed4 +#define rRx_TO_Rx 0xed8 +#define rStandby 0xedc +#define rSleep 0xee0 +#define rPMPD_ANAEN 0xeec + +/* + * 7. RF Register 0x00-0x2E (RF 8256) + * RF-0222D 0x00-3F + * + * Zebra1 */ +#define rZebra1_HSSIEnable 0x0 /* Useless now */ +#define rZebra1_TRxEnable1 0x1 +#define rZebra1_TRxEnable2 0x2 +#define rZebra1_AGC 0x4 +#define rZebra1_ChargePump 0x5 +#define rZebra1_Channel 0x7 /* RF channel switch */ + +/* #endif */ +#define rZebra1_TxGain 0x8 /* Useless now */ +#define rZebra1_TxLPF 0x9 +#define rZebra1_RxLPF 0xb +#define rZebra1_RxHPFCorner 0xc + +/* Zebra4 */ +#define rGlobalCtrl 0 /* Useless now */ +#define rRTL8256_TxLPF 19 +#define rRTL8256_RxLPF 11 + +/* RTL8258 */ +#define rRTL8258_TxLPF 0x11 /* Useless now */ +#define rRTL8258_RxLPF 0x13 +#define rRTL8258_RSSILPF 0xa + +/* + * RL6052 Register definition + * */ +#define RF_AC 0x00 /* */ + +#define RF_IQADJ_G1 0x01 /* */ +#define RF_IQADJ_G2 0x02 /* */ +#define RF_BS_PA_APSET_G1_G4 0x03 +#define RF_BS_PA_APSET_G5_G8 0x04 +#define RF_POW_TRSW 0x05 /* */ + +#define RF_GAIN_RX 0x06 /* */ +#define RF_GAIN_TX 0x07 /* */ + +#define RF_TXM_IDAC 0x08 /* */ +#define RF_IPA_G 0x09 /* */ +#define RF_TXBIAS_G 0x0A +#define RF_TXPA_AG 0x0B +#define RF_IPA_A 0x0C /* */ +#define RF_TXBIAS_A 0x0D +#define RF_BS_PA_APSET_G9_G11 0x0E +#define RF_BS_IQGEN 0x0F /* */ + +#define RF_MODE1 0x10 /* */ +#define RF_MODE2 0x11 /* */ + +#define RF_RX_AGC_HP 0x12 /* */ +#define RF_TX_AGC 0x13 /* */ +#define RF_BIAS 0x14 /* */ +#define RF_IPA 0x15 /* */ +#define RF_TXBIAS 0x16 +#define RF_POW_ABILITY 0x17 /* */ +#define RF_MODE_AG 0x18 /* */ +#define rRfChannel 0x18 /* RF channel and BW switch */ +#define RF_CHNLBW 0x18 /* RF channel and BW switch */ +#define RF_TOP 0x19 /* */ + +#define RF_RX_G1 0x1A /* */ +#define RF_RX_G2 0x1B /* */ + +#define RF_RX_BB2 0x1C /* */ +#define RF_RX_BB1 0x1D /* */ + +#define RF_RCK1 0x1E /* */ +#define RF_RCK2 0x1F /* */ + +#define RF_TX_G1 0x20 /* */ +#define RF_TX_G2 0x21 /* */ +#define RF_TX_G3 0x22 /* */ + +#define RF_TX_BB1 0x23 /* */ + +#define RF_T_METER 0x24 /* */ + +#define RF_SYN_G1 0x25 /* RF TX Power control */ +#define RF_SYN_G2 0x26 /* RF TX Power control */ +#define RF_SYN_G3 0x27 /* RF TX Power control */ +#define RF_SYN_G4 0x28 /* RF TX Power control */ +#define RF_SYN_G5 0x29 /* RF TX Power control */ +#define RF_SYN_G6 0x2A /* RF TX Power control */ +#define RF_SYN_G7 0x2B /* RF TX Power control */ +#define RF_SYN_G8 0x2C /* RF TX Power control */ + +#define RF_RCK_OS 0x30 /* RF TX PA control */ + +#define RF_TXPA_G1 0x31 /* RF TX PA control */ +#define RF_TXPA_G2 0x32 /* RF TX PA control */ +#define RF_TXPA_G3 0x33 /* RF TX PA control */ +#define RF_TX_BIAS_A 0x35 +#define RF_TX_BIAS_D 0x36 +#define RF_LOBF_9 0x38 +#define RF_RXRF_A3 0x3C /* */ +#define RF_TRSW 0x3F + +#define RF_TXRF_A2 0x41 +#define RF_T_METER_88E 0x42 +#define RF_TXPA_G4 0x46 +#define RF_TXPA_A4 0x4B +#define RF_0x52 0x52 +#define RF_WE_LUT 0xEF +#define RF_S0S1 0xB0 + +/* + * Bit Mask + * + * 1. Page1(0x100) */ +#define bBBResetB 0x100 /* Useless now? */ +#define bGlobalResetB 0x200 +#define bOFDMTxStart 0x4 +#define bCCKTxStart 0x8 +#define bCRC32Debug 0x100 +#define bPMACLoopback 0x10 +#define bTxLSIG 0xffffff +#define bOFDMTxRate 0xf +#define bOFDMTxReserved 0x10 +#define bOFDMTxLength 0x1ffe0 +#define bOFDMTxParity 0x20000 +#define bTxHTSIG1 0xffffff +#define bTxHTMCSRate 0x7f +#define bTxHTBW 0x80 +#define bTxHTLength 0xffff00 +#define bTxHTSIG2 0xffffff +#define bTxHTSmoothing 0x1 +#define bTxHTSounding 0x2 +#define bTxHTReserved 0x4 +#define bTxHTAggreation 0x8 +#define bTxHTSTBC 0x30 +#define bTxHTAdvanceCoding 0x40 +#define bTxHTShortGI 0x80 +#define bTxHTNumberHT_LTF 0x300 +#define bTxHTCRC8 0x3fc00 +#define bCounterReset 0x10000 +#define bNumOfOFDMTx 0xffff +#define bNumOfCCKTx 0xffff0000 +#define bTxIdleInterval 0xffff +#define bOFDMService 0xffff0000 +#define bTxMACHeader 0xffffffff +#define bTxDataInit 0xff +#define bTxHTMode 0x100 +#define bTxDataType 0x30000 +#define bTxRandomSeed 0xffffffff +#define bCCKTxPreamble 0x1 +#define bCCKTxSFD 0xffff0000 +#define bCCKTxSIG 0xff +#define bCCKTxService 0xff00 +#define bCCKLengthExt 0x8000 +#define bCCKTxLength 0xffff0000 +#define bCCKTxCRC16 0xffff +#define bCCKTxStatus 0x1 +#define bOFDMTxStatus 0x2 + +#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) +#define RF_TX_GAIN_OFFSET_8192F(_val) (abs((_val)) | (((_val) > 0) ? BIT(4) : 0)) + +/* 2. Page8(0x800) */ +#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ +#define bJapanMode 0x2 +#define bCCKTxSC 0x30 +#define bCCKEn 0x1000000 +#define bOFDMEn 0x2000000 + +#define bOFDMRxADCPhase 0x10000 /* Useless now */ +#define bOFDMTxDACPhase 0x40000 +#define bXATxAGC 0x3f + +#define bAntennaSelect 0x0300 + +#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ +#define bXCTxAGC 0xf000 +#define bXDTxAGC 0xf0000 + +#define bPAStart 0xf0000000 /* Useless now */ +#define bTRStart 0x00f00000 +#define bRFStart 0x0000f000 +#define bBBStart 0x000000f0 +#define bBBCCKStart 0x0000000f +#define bPAEnd 0xf /* Reg0x814 */ +#define bTREnd 0x0f000000 +#define bRFEnd 0x000f0000 +#define bCCAMask 0x000000f0 /* T2R */ +#define bR2RCCAMask 0x00000f00 +#define bHSSI_R2TDelay 0xf8000000 +#define bHSSI_T2RDelay 0xf80000 +#define bContTxHSSI 0x400 /* chane gain at continue Tx */ +#define bIGFromCCK 0x200 +#define bAGCAddress 0x3f +#define bRxHPTx 0x7000 +#define bRxHPT2R 0x38000 +#define bRxHPCCKIni 0xc0000 +#define bAGCTxCode 0xc00000 +#define bAGCRxCode 0x300000 + +#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ +#define b3WireAddressLength 0x400 + +#define b3WireRFPowerDown 0x1 /* Useless now + * #define bHWSISelect 0x8 */ +#define b5GPAPEPolarity 0x40000000 +#define b2GPAPEPolarity 0x80000000 +#define bRFSW_TxDefaultAnt 0x3 +#define bRFSW_TxOptionAnt 0x30 +#define bRFSW_RxDefaultAnt 0x300 +#define bRFSW_RxOptionAnt 0x3000 +#define bRFSI_3WireData 0x1 +#define bRFSI_3WireClock 0x2 +#define bRFSI_3WireLoad 0x4 +#define bRFSI_3WireRW 0x8 +#define bRFSI_3Wire 0xf + +#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ + +#define bRFSI_TRSW 0x20 /* Useless now */ +#define bRFSI_TRSWB 0x40 +#define bRFSI_ANTSW 0x100 +#define bRFSI_ANTSWB 0x200 +#define bRFSI_PAPE 0x400 +#define bRFSI_PAPE5G 0x800 +#define bBandSelect 0x1 +#define bHTSIG2_GI 0x80 +#define bHTSIG2_Smoothing 0x01 +#define bHTSIG2_Sounding 0x02 +#define bHTSIG2_Aggreaton 0x08 +#define bHTSIG2_STBC 0x30 +#define bHTSIG2_AdvCoding 0x40 +#define bHTSIG2_NumOfHTLTF 0x300 +#define bHTSIG2_CRC8 0x3fc +#define bHTSIG1_MCS 0x7f +#define bHTSIG1_BandWidth 0x80 +#define bHTSIG1_HTLength 0xffff +#define bLSIG_Rate 0xf +#define bLSIG_Reserved 0x10 +#define bLSIG_Length 0x1fffe +#define bLSIG_Parity 0x20 +#define bCCKRxPhase 0x4 + +#define bLSSIReadAddress 0x7f800000 /* T65 RF */ + +#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ + +#define bLSSIReadBackData 0xfffff /* T65 RF */ + +#define bLSSIReadOKFlag 0x1000 /* Useless now */ +#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ +#define bRegulator0Standby 0x1 +#define bRegulatorPLLStandby 0x2 +#define bRegulator1Standby 0x4 +#define bPLLPowerUp 0x8 +#define bDPLLPowerUp 0x10 +#define bDA10PowerUp 0x20 +#define bAD7PowerUp 0x200 +#define bDA6PowerUp 0x2000 +#define bXtalPowerUp 0x4000 +#define b40MDClkPowerUP 0x8000 +#define bDA6DebugMode 0x20000 +#define bDA6Swing 0x380000 + +#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ + +#define b80MClkDelay 0x18000000 /* Useless */ +#define bAFEWatchDogEnable 0x20000000 + +#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ +#define bXtalCap23 0x3 +#define bXtalCap92x 0x0f000000 +#define bXtalCap 0x0f000000 + +#define bIntDifClkEnable 0x400 /* Useless */ +#define bExtSigClkEnable 0x800 +#define bBandgapMbiasPowerUp 0x10000 +#define bAD11SHGain 0xc0000 +#define bAD11InputRange 0x700000 +#define bAD11OPCurrent 0x3800000 +#define bIPathLoopback 0x4000000 +#define bQPathLoopback 0x8000000 +#define bAFELoopback 0x10000000 +#define bDA10Swing 0x7e0 +#define bDA10Reverse 0x800 +#define bDAClkSource 0x1000 +#define bAD7InputRange 0x6000 +#define bAD7Gain 0x38000 +#define bAD7OutputCMMode 0x40000 +#define bAD7InputCMMode 0x380000 +#define bAD7Current 0xc00000 +#define bRegulatorAdjust 0x7000000 +#define bAD11PowerUpAtTx 0x1 +#define bDA10PSAtTx 0x10 +#define bAD11PowerUpAtRx 0x100 +#define bDA10PSAtRx 0x1000 +#define bCCKRxAGCFormat 0x200 +#define bPSDFFTSamplepPoint 0xc000 +#define bPSDAverageNum 0x3000 +#define bIQPathControl 0xc00 +#define bPSDFreq 0x3ff +#define bPSDAntennaPath 0x30 +#define bPSDIQSwitch 0x40 +#define bPSDRxTrigger 0x400000 +#define bPSDTxTrigger 0x80000000 +#define bPSDSineToneScale 0x7f000000 +#define bPSDReport 0xffff + +/* 3. Page9(0x900) */ +#define bOFDMTxSC 0x30000000 /* Useless */ +#define bCCKTxOn 0x1 +#define bOFDMTxOn 0x2 +#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ +#define bDebugItem 0xff /* reset debug page and LWord */ +#define bAntL 0x10 +#define bAntNonHT 0x100 +#define bAntHT1 0x1000 +#define bAntHT2 0x10000 +#define bAntHT1S1 0x100000 +#define bAntNonHTS1 0x1000000 + +/* 4. PageA(0xA00) */ +#define bCCKBBMode 0x3 /* Useless */ +#define bCCKTxPowerSaving 0x80 +#define bCCKRxPowerSaving 0x40 + +#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ + +#define bCCKScramble 0x8 /* Useless */ +#define bCCKAntDiversity 0x8000 +#define bCCKCarrierRecovery 0x4000 +#define bCCKTxRate 0x3000 +#define bCCKDCCancel 0x0800 +#define bCCKISICancel 0x0400 +#define bCCKMatchFilter 0x0200 +#define bCCKEqualizer 0x0100 +#define bCCKPreambleDetect 0x800000 +#define bCCKFastFalseCCA 0x400000 +#define bCCKChEstStart 0x300000 +#define bCCKCCACount 0x080000 +#define bCCKcs_lim 0x070000 +#define bCCKBistMode 0x80000000 +#define bCCKCCAMask 0x40000000 +#define bCCKTxDACPhase 0x4 +#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ +#define bCCKr_cp_mode0 0x0100 +#define bCCKTxDCOffset 0xf0 +#define bCCKRxDCOffset 0xf +#define bCCKCCAMode 0xc000 +#define bCCKFalseCS_lim 0x3f00 +#define bCCKCS_ratio 0xc00000 +#define bCCKCorgBit_sel 0x300000 +#define bCCKPD_lim 0x0f0000 +#define bCCKNewCCA 0x80000000 +#define bCCKRxHPofIG 0x8000 +#define bCCKRxIG 0x7f00 +#define bCCKLNAPolarity 0x800000 +#define bCCKRx1stGain 0x7f0000 +#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ +#define bCCKRxAGCSatLevel 0x1f000000 +#define bCCKRxAGCSatCount 0xe0 +#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ +#define bCCKFixedRxAGC 0x8000 +/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ +#define bCCKAntennaPolarity 0x2000 +#define bCCKTxFilterType 0x0c00 +#define bCCKRxAGCReportType 0x0300 +#define bCCKRxDAGCEn 0x80000000 +#define bCCKRxDAGCPeriod 0x20000000 +#define bCCKRxDAGCSatLevel 0x1f000000 +#define bCCKTimingRecovery 0x800000 +#define bCCKTxC0 0x3f0000 +#define bCCKTxC1 0x3f000000 +#define bCCKTxC2 0x3f +#define bCCKTxC3 0x3f00 +#define bCCKTxC4 0x3f0000 +#define bCCKTxC5 0x3f000000 +#define bCCKTxC6 0x3f +#define bCCKTxC7 0x3f00 +#define bCCKDebugPort 0xff0000 +#define bCCKDACDebug 0x0f000000 +#define bCCKFalseAlarmEnable 0x8000 +#define bCCKFalseAlarmRead 0x4000 +#define bCCKTRSSI 0x7f +#define bCCKRxAGCReport 0xfe +#define bCCKRxReport_AntSel 0x80000000 +#define bCCKRxReport_MFOff 0x40000000 +#define bCCKRxRxReport_SQLoss 0x20000000 +#define bCCKRxReport_Pktloss 0x10000000 +#define bCCKRxReport_Lockedbit 0x08000000 +#define bCCKRxReport_RateError 0x04000000 +#define bCCKRxReport_RxRate 0x03000000 +#define bCCKRxFACounterLower 0xff +#define bCCKRxFACounterUpper 0xff000000 +#define bCCKRxHPAGCStart 0xe000 +#define bCCKRxHPAGCFinal 0x1c00 +#define bCCKRxFalseAlarmEnable 0x8000 +#define bCCKFACounterFreeze 0x4000 +#define bCCKTxPathSel 0x10000000 +#define bCCKDefaultRxPath 0xc000000 +#define bCCKOptionRxPath 0x3000000 + +/* 5. PageC(0xC00) */ +#define bNumOfSTF 0x3 /* Useless */ +#define bShift_L 0xc0 +#define bGI_TH 0xc +#define bRxPathA 0x1 +#define bRxPathB 0x2 +#define bRxPathC 0x4 +#define bRxPathD 0x8 +#define bTxPathA 0x1 +#define bTxPathB 0x2 +#define bTxPathC 0x4 +#define bTxPathD 0x8 +#define bTRSSIFreq 0x200 +#define bADCBackoff 0x3000 +#define bDFIRBackoff 0xc000 +#define bTRSSILatchPhase 0x10000 +#define bRxIDCOffset 0xff +#define bRxQDCOffset 0xff00 +#define bRxDFIRMode 0x1800000 +#define bRxDCNFType 0xe000000 +#define bRXIQImb_A 0x3ff +#define bRXIQImb_B 0xfc00 +#define bRXIQImb_C 0x3f0000 +#define bRXIQImb_D 0xffc00000 +#define bDC_dc_Notch 0x60000 +#define bRxNBINotch 0x1f000000 +#define bPD_TH 0xf +#define bPD_TH_Opt2 0xc000 +#define bPWED_TH 0x700 +#define bIfMF_Win_L 0x800 +#define bPD_Option 0x1000 +#define bMF_Win_L 0xe000 +#define bBW_Search_L 0x30000 +#define bwin_enh_L 0xc0000 +#define bBW_TH 0x700000 +#define bED_TH2 0x3800000 +#define bBW_option 0x4000000 +#define bRatio_TH 0x18000000 +#define bWindow_L 0xe0000000 +#define bSBD_Option 0x1 +#define bFrame_TH 0x1c +#define bFS_Option 0x60 +#define bDC_Slope_check 0x80 +#define bFGuard_Counter_DC_L 0xe00 +#define bFrame_Weight_Short 0x7000 +#define bSub_Tune 0xe00000 +#define bFrame_DC_Length 0xe000000 +#define bSBD_start_offset 0x30000000 +#define bFrame_TH_2 0x7 +#define bFrame_GI2_TH 0x38 +#define bGI2_Sync_en 0x40 +#define bSarch_Short_Early 0x300 +#define bSarch_Short_Late 0xc00 +#define bSarch_GI2_Late 0x70000 +#define bCFOAntSum 0x1 +#define bCFOAcc 0x2 +#define bCFOStartOffset 0xc +#define bCFOLookBack 0x70 +#define bCFOSumWeight 0x80 +#define bDAGCEnable 0x10000 +#define bTXIQImb_A 0x3ff +#define bTXIQImb_B 0xfc00 +#define bTXIQImb_C 0x3f0000 +#define bTXIQImb_D 0xffc00000 +#define bTxIDCOffset 0xff +#define bTxQDCOffset 0xff00 +#define bTxDFIRMode 0x10000 +#define bTxPesudoNoiseOn 0x4000000 +#define bTxPesudoNoise_A 0xff +#define bTxPesudoNoise_B 0xff00 +#define bTxPesudoNoise_C 0xff0000 +#define bTxPesudoNoise_D 0xff000000 +#define bCCADropOption 0x20000 +#define bCCADropThres 0xfff00000 +#define bEDCCA_H 0xf +#define bEDCCA_L 0xf0 +#define bLambda_ED 0x300 +#define bRxInitialGain 0x7f +#define bRxAntDivEn 0x80 +#define bRxAGCAddressForLNA 0x7f00 +#define bRxHighPowerFlow 0x8000 +#define bRxAGCFreezeThres 0xc0000 +#define bRxFreezeStep_AGC1 0x300000 +#define bRxFreezeStep_AGC2 0xc00000 +#define bRxFreezeStep_AGC3 0x3000000 +#define bRxFreezeStep_AGC0 0xc000000 +#define bRxRssi_Cmp_En 0x10000000 +#define bRxQuickAGCEn 0x20000000 +#define bRxAGCFreezeThresMode 0x40000000 +#define bRxOverFlowCheckType 0x80000000 +#define bRxAGCShift 0x7f +#define bTRSW_Tri_Only 0x80 +#define bPowerThres 0x300 +#define bRxAGCEn 0x1 +#define bRxAGCTogetherEn 0x2 +#define bRxAGCMin 0x4 +#define bRxHP_Ini 0x7 +#define bRxHP_TRLNA 0x70 +#define bRxHP_RSSI 0x700 +#define bRxHP_BBP1 0x7000 +#define bRxHP_BBP2 0x70000 +#define bRxHP_BBP3 0x700000 +#define bRSSI_H 0x7f0000 /* the threshold for high power */ +#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ +#define bRxSettle_TRSW 0x7 +#define bRxSettle_LNA 0x38 +#define bRxSettle_RSSI 0x1c0 +#define bRxSettle_BBP 0xe00 +#define bRxSettle_RxHP 0x7000 +#define bRxSettle_AntSW_RSSI 0x38000 +#define bRxSettle_AntSW 0xc0000 +#define bRxProcessTime_DAGC 0x300000 +#define bRxSettle_HSSI 0x400000 +#define bRxProcessTime_BBPPW 0x800000 +#define bRxAntennaPowerShift 0x3000000 +#define bRSSITableSelect 0xc000000 +#define bRxHP_Final 0x7000000 +#define bRxHTSettle_BBP 0x7 +#define bRxHTSettle_HSSI 0x8 +#define bRxHTSettle_RxHP 0x70 +#define bRxHTSettle_BBPPW 0x80 +#define bRxHTSettle_Idle 0x300 +#define bRxHTSettle_Reserved 0x1c00 +#define bRxHTRxHPEn 0x8000 +#define bRxHTAGCFreezeThres 0x30000 +#define bRxHTAGCTogetherEn 0x40000 +#define bRxHTAGCMin 0x80000 +#define bRxHTAGCEn 0x100000 +#define bRxHTDAGCEn 0x200000 +#define bRxHTRxHP_BBP 0x1c00000 +#define bRxHTRxHP_Final 0xe0000000 +#define bRxPWRatioTH 0x3 +#define bRxPWRatioEn 0x4 +#define bRxMFHold 0x3800 +#define bRxPD_Delay_TH1 0x38 +#define bRxPD_Delay_TH2 0x1c0 +#define bRxPD_DC_COUNT_MAX 0x600 +/* #define bRxMF_Hold 0x3800 */ +#define bRxPD_Delay_TH 0x8000 +#define bRxProcess_Delay 0xf0000 +#define bRxSearchrange_GI2_Early 0x700000 +#define bRxFrame_Guard_Counter_L 0x3800000 +#define bRxSGI_Guard_L 0xc000000 +#define bRxSGI_Search_L 0x30000000 +#define bRxSGI_TH 0xc0000000 +#define bDFSCnt0 0xff +#define bDFSCnt1 0xff00 +#define bDFSFlag 0xf0000 +#define bMFWeightSum 0x300000 +#define bMinIdxTH 0x7f000000 +#define bDAFormat 0x40000 +#define bTxChEmuEnable 0x01000000 +#define bTRSWIsolation_A 0x7f +#define bTRSWIsolation_B 0x7f00 +#define bTRSWIsolation_C 0x7f0000 +#define bTRSWIsolation_D 0x7f000000 +#define bExtLNAGain 0x7c00 + +/* 6. PageE(0xE00) */ +#define bSTBCEn 0x4 /* Useless */ +#define bAntennaMapping 0x10 +#define bNss 0x20 +#define bCFOAntSumD 0x200 +#define bPHYCounterReset 0x8000000 +#define bCFOReportGet 0x4000000 +#define bOFDMContinueTx 0x10000000 +#define bOFDMSingleCarrier 0x20000000 +#define bOFDMSingleTone 0x40000000 +/* #define bRxPath1 0x01 */ +/* #define bRxPath2 0x02 */ +/* #define bRxPath3 0x04 */ +/* #define bRxPath4 0x08 */ +/* #define bTxPath1 0x10 */ +/* #define bTxPath2 0x20 */ +#define bHTDetect 0x100 +#define bCFOEn 0x10000 +#define bCFOValue 0xfff00000 +#define bSigTone_Re 0x3f +#define bSigTone_Im 0x7f00 +#define bCounter_CCA 0xffff +#define bCounter_ParityFail 0xffff0000 +#define bCounter_RateIllegal 0xffff +#define bCounter_CRC8Fail 0xffff0000 +#define bCounter_MCSNoSupport 0xffff +#define bCounter_FastSync 0xffff +#define bShortCFO 0xfff +#define bShortCFOTLength 12 /* total */ +#define bShortCFOFLength 11 /* fraction */ +#define bLongCFO 0x7ff +#define bLongCFOTLength 11 +#define bLongCFOFLength 11 +#define bTailCFO 0x1fff +#define bTailCFOTLength 13 +#define bTailCFOFLength 12 +#define bmax_en_pwdB 0xffff +#define bCC_power_dB 0xffff0000 +#define bnoise_pwdB 0xffff +#define bPowerMeasTLength 10 +#define bPowerMeasFLength 3 +#define bRx_HT_BW 0x1 +#define bRxSC 0x6 +#define bRx_HT 0x8 +#define bNB_intf_det_on 0x1 +#define bIntf_win_len_cfg 0x30 +#define bNB_Intf_TH_cfg 0x1c0 +#define bRFGain 0x3f +#define bTableSel 0x40 +#define bTRSW 0x80 +#define bRxSNR_A 0xff +#define bRxSNR_B 0xff00 +#define bRxSNR_C 0xff0000 +#define bRxSNR_D 0xff000000 +#define bSNREVMTLength 8 +#define bSNREVMFLength 1 +#define bCSI1st 0xff +#define bCSI2nd 0xff00 +#define bRxEVM1st 0xff0000 +#define bRxEVM2nd 0xff000000 +#define bSIGEVM 0xff +#define bPWDB 0xff00 +#define bSGIEN 0x10000 + +#define bSFactorQAM1 0xf /* Useless */ +#define bSFactorQAM2 0xf0 +#define bSFactorQAM3 0xf00 +#define bSFactorQAM4 0xf000 +#define bSFactorQAM5 0xf0000 +#define bSFactorQAM6 0xf0000 +#define bSFactorQAM7 0xf00000 +#define bSFactorQAM8 0xf000000 +#define bSFactorQAM9 0xf0000000 +#define bCSIScheme 0x100000 + +#define bNoiseLvlTopSet 0x3 /* Useless */ +#define bChSmooth 0x4 +#define bChSmoothCfg1 0x38 +#define bChSmoothCfg2 0x1c0 +#define bChSmoothCfg3 0xe00 +#define bChSmoothCfg4 0x7000 +#define bMRCMode 0x800000 +#define bTHEVMCfg 0x7000000 + +#define bLoopFitType 0x1 /* Useless */ +#define bUpdCFO 0x40 +#define bUpdCFOOffData 0x80 +#define bAdvUpdCFO 0x100 +#define bAdvTimeCtrl 0x800 +#define bUpdClko 0x1000 +#define bFC 0x6000 +#define bTrackingMode 0x8000 +#define bPhCmpEnable 0x10000 +#define bUpdClkoLTF 0x20000 +#define bComChCFO 0x40000 +#define bCSIEstiMode 0x80000 +#define bAdvUpdEqz 0x100000 +#define bUChCfg 0x7000000 +#define bUpdEqz 0x8000000 + +/* Rx Pseduo noise */ +#define bRxPesudoNoiseOn 0x20000000 /* Useless */ +#define bRxPesudoNoise_A 0xff +#define bRxPesudoNoise_B 0xff00 +#define bRxPesudoNoise_C 0xff0000 +#define bRxPesudoNoise_D 0xff000000 +#define bPesudoNoiseState_A 0xffff +#define bPesudoNoiseState_B 0xffff0000 +#define bPesudoNoiseState_C 0xffff +#define bPesudoNoiseState_D 0xffff0000 + +/* 7. RF Register + * Zebra1 */ +#define bZebra1_HSSIEnable 0x8 /* Useless */ +#define bZebra1_TRxControl 0xc00 +#define bZebra1_TRxGainSetting 0x07f +#define bZebra1_RxCorner 0xc00 +#define bZebra1_TxChargePump 0x38 +#define bZebra1_RxChargePump 0x7 +#define bZebra1_ChannelNum 0xf80 +#define bZebra1_TxLPFBW 0x400 +#define bZebra1_RxLPFBW 0x600 + +/* Zebra4 */ +#define bRTL8256RegModeCtrl1 0x100 /* Useless */ +#define bRTL8256RegModeCtrl0 0x40 +#define bRTL8256_TxLPFBW 0x18 +#define bRTL8256_RxLPFBW 0x600 + +/* RTL8258 */ +#define bRTL8258_TxLPFBW 0xc /* Useless */ +#define bRTL8258_RxLPFBW 0xc00 +#define bRTL8258_RSSILPFBW 0xc0 + + +/* + * Other Definition + * */ + +/* byte endable for sb_write */ +#define bByte0 0x1 /* Useless */ +#define bByte1 0x2 +#define bByte2 0x4 +#define bByte3 0x8 +#define bWord0 0x3 +#define bWord1 0xc +#define bDWord 0xf + +/* for PutRegsetting & GetRegSetting BitMask */ +#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ +#define bMaskByte1 0xff00 +#define bMaskByte2 0xff0000 +#define bMaskByte3 0xff000000 +#define bMaskHWord 0xffff0000 +#define bMaskLWord 0x0000ffff +#define bMaskDWord 0xffffffff +#define bMaskH3Bytes 0xffffff00 +#define bMask12Bits 0xfff +#define bMaskH4Bits 0xf0000000 +#define bMaskOFDM_D 0xffc00000 +#define bMaskCCK 0x3f3f3f3f + + +#define bEnable 0x1 /* Useless */ +#define bDisable 0x0 + +#define LeftAntenna 0x0 /* Useless */ +#define RightAntenna 0x1 + +#define tCheckTxStatus 500 /* 500ms // Useless */ +#define tUpdateRxCounter 100 /* 100ms */ + +#define rateCCK 0 /* Useless */ +#define rateOFDM 1 +#define rateHT 2 + +/* define Register-End */ +#define bPMAC_End 0x1ff /* Useless */ +#define bFPGAPHY0_End 0x8ff +#define bFPGAPHY1_End 0x9ff +#define bCCKPHY0_End 0xaff +#define bOFDMPHY0_End 0xcff +#define bOFDMPHY1_End 0xdff + +/* define max debug item in each debug page + * #define bMaxItem_FPGA_PHY0 0x9 + * #define bMaxItem_FPGA_PHY1 0x3 + * #define bMaxItem_PHY_11B 0x16 + * #define bMaxItem_OFDM_PHY0 0x29 + * #define bMaxItem_OFDM_PHY1 0x0 */ + +#define bPMACControl 0x0 /* Useless */ +#define bWMACControl 0x1 +#define bWNICControl 0x2 + +#define PathA 0x0 /* Useless */ +#define PathB 0x1 +#define PathC 0x2 +#define PathD 0x3 + +#endif diff --git a/include/Hal8192FPwrSeq.h b/include/Hal8192FPwrSeq.h new file mode 100644 index 0000000..2b0bdc7 --- /dev/null +++ b/include/Hal8192FPwrSeq.h @@ -0,0 +1,220 @@ +/****************************************************************************** + * + * Copyright(c) 2016 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef REALTEK_POWER_SEQUENCE_8192F +#define REALTEK_POWER_SEQUENCE_8192F +#define POWER_SEQUENCE_8192F_VER 04 +/* #include "PwrSeqCmd.h" */ +#include "HalPwrSeqCmd.h" + +/* + Check document WM-20110607-Paul-RTL8192e_Power_Architecture-R02.vsd + There are 6 HW Power States: + 0: POFF--Power Off + 1: PDN--Power Down + 2: CARDEMU--Card Emulation + 3: ACT--Active Mode + 4: LPS--Low Power State + 5: SUS--Suspend + + The transition from different states are defined below + TRANS_CARDEMU_TO_ACT + TRANS_ACT_TO_CARDEMU + TRANS_CARDEMU_TO_SUS + TRANS_SUS_TO_CARDEMU + TRANS_CARDEMU_TO_PDN + TRANS_ACT_TO_LPS + TRANS_LPS_TO_ACT + + TRANS_END +*/ +#define RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS 38 +#define RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS 8 +#define RTL8192F_TRANS_CARDEMU_TO_SUS_STEPS 7 +#define RTL8192F_TRANS_SUS_TO_CARDEMU_STEPS 5 +#define RTL8192F_TRANS_CARDEMU_TO_CARDDIS_STEPS 8 +#define RTL8192F_TRANS_CARDDIS_TO_CARDEMU_STEPS 8 +#define RTL8192F_TRANS_CARDEMU_TO_PDN_STEPS 4 +#define RTL8192F_TRANS_PDN_TO_CARDEMU_STEPS 1 +#define RTL8192F_TRANS_ACT_TO_LPS_STEPS 13 +#define RTL8192F_TRANS_LPS_TO_ACT_STEPS 11 +#define RTL8192F_TRANS_END_STEPS 1 + + +#define RTL8192F_TRANS_CARDEMU_TO_ACT \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ + {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ + {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ + {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ + {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ + {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ + {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ + {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, (BIT1|BIT0), 0}, \ + {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2},/* SWR OCP enable 0x10[18]=1*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ + {0x007f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x7c[31]=1,LDO has max output capability*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ + {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ + {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ + {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 data mode*/\ + {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ + {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ + {0x0068, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0},/*RF HW ON/OFF Enable*/\ + {0x001C, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/*Register Lock Disable*/\ + {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ + {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*reset RF path S1*/\ + {0x007B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*reset RF path S0*/\ + {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/*enable RF path S1*/\ + {0x007B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/*enalbe RF path S0*/\ + {0x0097, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*AFE_Ctrl*/\ + {0x00DC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xCC},/*AFE_Ctrl*/\ + {0x0024, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x18, 0x00},/*AFE_Ctrl 0x24[4:3]=00 for xtal gmn*/\ + {0x1050, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[7:0] Pull down software register*/\ + {0x1051, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[15:8] Pull down software register*/\ + {0x1052, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[23:16] Pull down software register*/\ + {0x1053, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[31:24] Pull down software register*/\ + {0x105B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_B[7:0] Pull down software register*/\ + {0x001C, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*Register Lock Enable*/\ + {0x0077, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT7|BIT6), 0x3},/*set HCI Power sequence state delay time:0*/ + + +#define RTL8192F_TRANS_ACT_TO_CARDEMU \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, */ /*0x1F[7:0] = 0 turn off RF*/ \ + {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x2[0]=0 Reset BB,RF enter Power Down mode*/ \ + {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ + {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ + {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0}, /*0x10[18] = 0 to disable ocp*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ + {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ + {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ + + +#define RTL8192F_TRANS_CARDEMU_TO_SUS \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ + {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ + {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 USB|SDIO SOP option to disable BG/MB/ACK/SWR*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ + {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ + {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ + +#define RTL8192F_TRANS_SUS_TO_CARDEMU \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ + {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ + {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ + {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ + + +#define RTL8192F_TRANS_CARDEMU_TO_CARDDIS \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend*/ \ + {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ + {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ + {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ + {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ + +#define RTL8192F_TRANS_CARDDIS_TO_CARDEMU \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ + {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ + {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ + {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ + {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x10[18] = 1 to enable ocp*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ + {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ + {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ + + +#define RTL8192F_TRANS_CARDEMU_TO_PDN \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ + {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ + {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ + +#define RTL8192F_TRANS_PDN_TO_CARDEMU \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ + +#define RTL8192F_TRANS_ACT_TO_LPS \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ + {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ + {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ + {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ + {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ + {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ + {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ + {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ + {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ + {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ + {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ + {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ + {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ + + +#define RTL8192F_TRANS_LPS_TO_ACT \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ + {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ + {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ + {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ + {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ + {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ + {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ + {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ + {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ + {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ + {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ + +#define RTL8192F_TRANS_END \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // + + +extern WLAN_PWR_CFG rtl8192F_power_on_flow[RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8192F_radio_off_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8192F_card_disable_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_CARDDIS_STEPS+RTL8192F_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8192F_card_enable_flow[RTL8192F_TRANS_CARDDIS_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8192F_suspend_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192F_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8192F_resume_flow[RTL8192F_TRANS_SUS_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8192F_hwpdn_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192F_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8192F_enter_lps_flow[RTL8192F_TRANS_ACT_TO_LPS_STEPS+RTL8192F_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8192F_leave_lps_flow[RTL8192F_TRANS_LPS_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS]; + +#endif diff --git a/include/Hal8703BPhyCfg.h b/include/Hal8703BPhyCfg.h index f5b995c..3348320 100644 --- a/include/Hal8703BPhyCfg.h +++ b/include/Hal8703BPhyCfg.h @@ -39,34 +39,34 @@ /*--------------------------Exported Function prototype---------------------*/ u32 PHY_QueryBBReg_8703B( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask ); -VOID +void PHY_SetBBReg_8703B( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data ); u32 PHY_QueryRFReg_8703B( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask ); -VOID +void PHY_SetRFReg_8703B( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask, + u32 Data ); /* MAC/BB/RF HAL config */ @@ -78,53 +78,47 @@ s32 PHY_MACConfig8703B(PADAPTER padapter); int PHY_ConfigRFWithParaFile_8703B( - IN PADAPTER Adapter, - IN u8 *pFileName, + PADAPTER Adapter, + u8 *pFileName, enum rf_path eRFPath ); -VOID +void PHY_SetTxPowerIndex_8703B( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate + PADAPTER Adapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate ); u8 PHY_GetTxPowerIndex_8703B( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, + u8 BandWidth, + u8 Channel, struct txpwr_idx_comp *tic ); -VOID -PHY_GetTxPowerLevel8703B( - IN PADAPTER Adapter, - OUT s32 *powerlevel -); - -VOID +void PHY_SetTxPowerLevel8703B( - IN PADAPTER Adapter, - IN u8 channel + PADAPTER Adapter, + u8 channel ); -VOID +void PHY_SetSwChnlBWMode8703B( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 + PADAPTER Adapter, + u8 channel, + enum channel_width Bandwidth, + u8 Offset40, + u8 Offset80 ); -VOID phy_set_rf_path_switch_8703b( - IN struct dm_struct *phydm, - IN bool bMain +void phy_set_rf_path_switch_8703b( + struct dm_struct *phydm, + bool bMain ); /*--------------------------Exported Function prototype End---------------------*/ diff --git a/include/Hal8710BPhyCfg.h b/include/Hal8710BPhyCfg.h new file mode 100644 index 0000000..9cd7aac --- /dev/null +++ b/include/Hal8710BPhyCfg.h @@ -0,0 +1,121 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __INC_HAL8710BPHYCFG_H__ +#define __INC_HAL8710BPHYCFG_H__ + +/*--------------------------Define Parameters-------------------------------*/ +#define LOOP_LIMIT 5 +#define MAX_STALL_TIME 50 /* us */ +#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ +#define MAX_TXPWR_IDX_NMODE_92S 63 +#define Reset_Cnt_Limit 3 + +#ifdef CONFIG_PCI_HCI + #define MAX_AGGR_NUM 0x0B +#else + #define MAX_AGGR_NUM 0x07 +#endif /* CONFIG_PCI_HCI */ + + +/*--------------------------Define Parameters End-------------------------------*/ + + +/*------------------------------Define structure----------------------------*/ + +/*------------------------------Define structure End----------------------------*/ + +/*--------------------------Exported Function prototype---------------------*/ +u32 +PHY_QueryBBReg_8710B( + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask +); + +void +PHY_SetBBReg_8710B( + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data +); + +u32 +PHY_QueryRFReg_8710B( + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask +); + +void +PHY_SetRFReg_8710B( + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask, + u32 Data +); + +/* MAC/BB/RF HAL config */ +int PHY_BBConfig8710B(PADAPTER Adapter); + +int PHY_RFConfig8710B(PADAPTER Adapter); + +s32 PHY_MACConfig8710B(PADAPTER padapter); + +int +PHY_ConfigRFWithParaFile_8710B( + PADAPTER Adapter, + u8 *pFileName, + enum rf_path eRFPath +); + +void +PHY_SetTxPowerIndex_8710B( + PADAPTER Adapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate +); + +u8 +PHY_GetTxPowerIndex_8710B( + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, + u8 BandWidth, + u8 Channel, + struct txpwr_idx_comp *tic +); + +void +PHY_SetTxPowerLevel8710B( + PADAPTER Adapter, + u8 channel +); + +void +PHY_SetSwChnlBWMode8710B( + PADAPTER Adapter, + u8 channel, + enum channel_width Bandwidth, + u8 Offset40, + u8 Offset80 +); + +/*--------------------------Exported Function prototype End---------------------*/ + +#endif diff --git a/include/Hal8710BPhyReg.h b/include/Hal8710BPhyReg.h new file mode 100644 index 0000000..337e032 --- /dev/null +++ b/include/Hal8710BPhyReg.h @@ -0,0 +1,1134 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __INC_HAL8710BPHYREG_H__ +#define __INC_HAL8710BPHYREG_H__ + +#define rSYM_WLBT_PAPE_SEL 0x64 +/* + * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF + * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF + * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 + * 3. RF register 0x00-2E + * 4. Bit Mask for BB/RF register + * 5. Other definition for BB/RF R/W + * */ + + +/* + * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF + * 1. Page1(0x100) + * */ +#define rPMAC_Reset 0x100 +#define rPMAC_TxStart 0x104 +#define rPMAC_TxLegacySIG 0x108 +#define rPMAC_TxHTSIG1 0x10c +#define rPMAC_TxHTSIG2 0x110 +#define rPMAC_PHYDebug 0x114 +#define rPMAC_TxPacketNum 0x118 +#define rPMAC_TxIdle 0x11c +#define rPMAC_TxMACHeader0 0x120 +#define rPMAC_TxMACHeader1 0x124 +#define rPMAC_TxMACHeader2 0x128 +#define rPMAC_TxMACHeader3 0x12c +#define rPMAC_TxMACHeader4 0x130 +#define rPMAC_TxMACHeader5 0x134 +#define rPMAC_TxDataType 0x138 +#define rPMAC_TxRandomSeed 0x13c +#define rPMAC_CCKPLCPPreamble 0x140 +#define rPMAC_CCKPLCPHeader 0x144 +#define rPMAC_CCKCRC16 0x148 +#define rPMAC_OFDMRxCRC32OK 0x170 +#define rPMAC_OFDMRxCRC32Er 0x174 +#define rPMAC_OFDMRxParityEr 0x178 +#define rPMAC_OFDMRxCRC8Er 0x17c +#define rPMAC_CCKCRxRC16Er 0x180 +#define rPMAC_CCKCRxRC32Er 0x184 +#define rPMAC_CCKCRxRC32OK 0x188 +#define rPMAC_TxStatus 0x18c + +/* + * 2. Page2(0x200) + * + * The following two definition are only used for USB interface. */ +#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ +#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ + +/* + * 3. Page8(0x800) + * */ +#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC // RF BW Setting?? */ + +#define rFPGA0_TxInfo 0x804 /* Status report?? */ +#define rFPGA0_PSDFunction 0x808 + +#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ + +#define rFPGA0_RFTiming1 0x810 /* Useless now */ +#define rFPGA0_RFTiming2 0x814 + +#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ +#define rFPGA0_XA_HSSIParameter2 0x824 +#define rFPGA0_XB_HSSIParameter1 0x828 +#define rFPGA0_XB_HSSIParameter2 0x82c +#define rTxAGC_B_Rate18_06 0x830 +#define rTxAGC_B_Rate54_24 0x834 +#define rTxAGC_B_CCK1_55_Mcs32 0x838 +#define rTxAGC_B_Mcs03_Mcs00 0x83c + +#define rTxAGC_B_Mcs07_Mcs04 0x848 +#define rTxAGC_B_Mcs11_Mcs08 0x84c + +#define rFPGA0_XA_LSSIParameter 0x840 +#define rFPGA0_XB_LSSIParameter 0x844 + +#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ +#define rFPGA0_RFSleepUpParameter 0x854 + +#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ +#define rFPGA0_XCD_SwitchControl 0x85c + +#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ +#define rFPGA0_XB_RFInterfaceOE 0x864 + +#define rTxAGC_B_Mcs15_Mcs12 0x868 +#define rTxAGC_B_CCK11_A_CCK2_11 0x86c + +#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ +#define rFPGA0_XCD_RFInterfaceSW 0x874 + +#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ +#define rFPGA0_XCD_RFParameter 0x87c + +#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ +#define rFPGA0_AnalogParameter2 0x884 +#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ +#define rFPGA0_AnalogParameter4 0x88c + +#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ +#define rFPGA0_XB_LSSIReadBack 0x8a4 +#define rFPGA0_XC_LSSIReadBack 0x8a8 +#define rFPGA0_XD_LSSIReadBack 0x8ac + +#define rFPGA0_PSDReport 0x8b4 /* Useless now */ +#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ +#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ +#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now // RF Interface Readback Value */ +#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ + +/* + * 4. Page9(0x900) + * */ +#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC // RF BW Setting?? */ +#define rFPGA1_TxBlock 0x904 /* Useless now */ +#define rFPGA1_DebugSelect 0x908 /* Useless now */ +#define rFPGA1_TxInfo 0x90c /* Useless now // Status report?? */ +#define rDPDT_control 0x92c +#define rfe_ctrl_anta_src 0x930 +#define rS0S1_PathSwitch 0x948 +#define rBBrx_DFIR 0x954 + +/* + * 5. PageA(0xA00) + * + * Set Control channel to upper or lower. These settings are required only for 40MHz */ +#define rCCK0_System 0xa00 + +#define rCCK0_AFESetting 0xa04 /* Disable init gain now // Select RX path by RSSI */ +#define rCCK0_CCA 0xa08 /* Disable init gain now // Init gain */ + +#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ +#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ + +#define rCCK0_RxHP 0xa14 + +#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ +#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ + +#define rCCK0_TxFilter1 0xa20 +#define rCCK0_TxFilter2 0xa24 +#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ +#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ +#define rCCK0_TRSSIReport 0xa50 +#define rCCK0_RxReport 0xa54 /* 0xa57 */ +#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ +#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ + +/* + * PageB(0xB00) + * */ +#define rPdp_AntA 0xb00 +#define rPdp_AntA_4 0xb04 +#define rPdp_AntA_8 0xb08 +#define rPdp_AntA_C 0xb0c +#define rPdp_AntA_10 0xb10 +#define rPdp_AntA_14 0xb14 +#define rPdp_AntA_18 0xb18 +#define rPdp_AntA_1C 0xb1c +#define rPdp_AntA_20 0xb20 +#define rPdp_AntA_24 0xb24 + +#define rConfig_Pmpd_AntA 0xb28 +#define rConfig_ram64x16 0xb2c + +#define rBndA 0xb30 +#define rHssiPar 0xb34 + +#define rConfig_AntA 0xb68 +#define rConfig_AntB 0xb6c + +#define rPdp_AntB 0xb70 +#define rPdp_AntB_4 0xb74 +#define rPdp_AntB_8 0xb78 +#define rPdp_AntB_C 0xb7c +#define rPdp_AntB_10 0xb80 +#define rPdp_AntB_14 0xb84 +#define rPdp_AntB_18 0xb88 +#define rPdp_AntB_1C 0xb8c +#define rPdp_AntB_20 0xb90 +#define rPdp_AntB_24 0xb94 + +#define rConfig_Pmpd_AntB 0xb98 + +#define rBndB 0xba0 + +#define rAPK 0xbd8 +#define rPm_Rx0_AntA 0xbdc +#define rPm_Rx1_AntA 0xbe0 +#define rPm_Rx2_AntA 0xbe4 +#define rPm_Rx3_AntA 0xbe8 +#define rPm_Rx0_AntB 0xbec +#define rPm_Rx1_AntB 0xbf0 +#define rPm_Rx2_AntB 0xbf4 +#define rPm_Rx3_AntB 0xbf8 +/* + * 6. PageC(0xC00) + * */ +#define rOFDM0_LSTF 0xc00 + +#define rOFDM0_TRxPathEnable 0xc04 +#define rOFDM0_TRMuxPar 0xc08 +#define rOFDM0_TRSWIsolation 0xc0c + +#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ +#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */ +#define rOFDM0_XBRxAFE 0xc18 +#define rOFDM0_XBRxIQImbalance 0xc1c +#define rOFDM0_XCRxAFE 0xc20 +#define rOFDM0_XCRxIQImbalance 0xc24 +#define rOFDM0_XDRxAFE 0xc28 +#define rOFDM0_XDRxIQImbalance 0xc2c + +#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD // DM tune init gain */ +#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ +#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ +#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ + +#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ +#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ +#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ +#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ + +#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ +#define rOFDM0_XAAGCCore2 0xc54 +#define rOFDM0_XBAGCCore1 0xc58 +#define rOFDM0_XBAGCCore2 0xc5c +#define rOFDM0_XCAGCCore1 0xc60 +#define rOFDM0_XCAGCCore2 0xc64 +#define rOFDM0_XDAGCCore1 0xc68 +#define rOFDM0_XDAGCCore2 0xc6c + +#define rOFDM0_AGCParameter1 0xc70 +#define rOFDM0_AGCParameter2 0xc74 +#define rOFDM0_AGCRSSITable 0xc78 +#define rOFDM0_HTSTFAGC 0xc7c + +#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ +#define rOFDM0_XATxAFE 0xc84 +#define rOFDM0_XBTxIQImbalance 0xc88 +#define rOFDM0_XBTxAFE 0xc8c +#define rOFDM0_XCTxIQImbalance 0xc90 +#define rOFDM0_XCTxAFE 0xc94 +#define rOFDM0_XDTxIQImbalance 0xc98 +#define rOFDM0_XDTxAFE 0xc9c + +#define rOFDM0_RxIQExtAnta 0xca0 +#define rOFDM0_TxCoeff1 0xca4 +#define rOFDM0_TxCoeff2 0xca8 +#define rOFDM0_TxCoeff3 0xcac +#define rOFDM0_TxCoeff4 0xcb0 +#define rOFDM0_TxCoeff5 0xcb4 +#define rOFDM0_TxCoeff6 0xcb8 +#define rOFDM0_RxHPParameter 0xce0 +#define rOFDM0_TxPseudoNoiseWgt 0xce4 +#define rOFDM0_FrameSync 0xcf0 +#define rOFDM0_DFSReport 0xcf4 + +/* + * 7. PageD(0xD00) + * */ +#define rOFDM1_LSTF 0xd00 +#define rOFDM1_TRxPathEnable 0xd04 + +#define rOFDM1_CFO 0xd08 /* No setting now */ +#define rOFDM1_CSI1 0xd10 +#define rOFDM1_SBD 0xd14 +#define rOFDM1_CSI2 0xd18 +#define rOFDM1_CFOTracking 0xd2c +#define rOFDM1_TRxMesaure1 0xd34 +#define rOFDM1_IntfDet 0xd3c +#define rOFDM1_PseudoNoiseStateAB 0xd50 +#define rOFDM1_PseudoNoiseStateCD 0xd54 +#define rOFDM1_RxPseudoNoiseWgt 0xd58 + +#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ +#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ +#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ + +#define rOFDM_ShortCFOAB 0xdac /* No setting now */ +#define rOFDM_ShortCFOCD 0xdb0 +#define rOFDM_LongCFOAB 0xdb4 +#define rOFDM_LongCFOCD 0xdb8 +#define rOFDM_TailCFOAB 0xdbc +#define rOFDM_TailCFOCD 0xdc0 +#define rOFDM_PWMeasure1 0xdc4 +#define rOFDM_PWMeasure2 0xdc8 +#define rOFDM_BWReport 0xdcc +#define rOFDM_AGCReport 0xdd0 +#define rOFDM_RxSNR 0xdd4 +#define rOFDM_RxEVMCSI 0xdd8 +#define rOFDM_SIGReport 0xddc + + +/* + * 8. PageE(0xE00) + * */ +#define rTxAGC_A_Rate18_06 0xe00 +#define rTxAGC_A_Rate54_24 0xe04 +#define rTxAGC_A_CCK1_Mcs32 0xe08 +#define rTxAGC_A_Mcs03_Mcs00 0xe10 +#define rTxAGC_A_Mcs07_Mcs04 0xe14 +#define rTxAGC_A_Mcs11_Mcs08 0xe18 +#define rTxAGC_A_Mcs15_Mcs12 0xe1c + +#define rFPGA0_IQK 0xe28 +#define rTx_IQK_Tone_A 0xe30 +#define rRx_IQK_Tone_A 0xe34 +#define rTx_IQK_PI_A 0xe38 +#define rRx_IQK_PI_A 0xe3c + +#define rTx_IQK 0xe40 +#define rRx_IQK 0xe44 +#define rIQK_AGC_Pts 0xe48 +#define rIQK_AGC_Rsp 0xe4c +#define rTx_IQK_Tone_B 0xe50 +#define rRx_IQK_Tone_B 0xe54 +#define rTx_IQK_PI_B 0xe58 +#define rRx_IQK_PI_B 0xe5c +#define rIQK_AGC_Cont 0xe60 + +#define rBlue_Tooth 0xe6c +#define rRx_Wait_CCA 0xe70 +#define rTx_CCK_RFON 0xe74 +#define rTx_CCK_BBON 0xe78 +#define rTx_OFDM_RFON 0xe7c +#define rTx_OFDM_BBON 0xe80 +#define rTx_To_Rx 0xe84 +#define rTx_To_Tx 0xe88 +#define rRx_CCK 0xe8c + +#define rTx_Power_Before_IQK_A 0xe94 +#define rTx_Power_After_IQK_A 0xe9c + +#define rRx_Power_Before_IQK_A 0xea0 +#define rRx_Power_Before_IQK_A_2 0xea4 +#define rRx_Power_After_IQK_A 0xea8 +#define rRx_Power_After_IQK_A_2 0xeac + +#define rTx_Power_Before_IQK_B 0xeb4 +#define rTx_Power_After_IQK_B 0xebc + +#define rRx_Power_Before_IQK_B 0xec0 +#define rRx_Power_Before_IQK_B_2 0xec4 +#define rRx_Power_After_IQK_B 0xec8 +#define rRx_Power_After_IQK_B_2 0xecc + +#define rRx_OFDM 0xed0 +#define rRx_Wait_RIFS 0xed4 +#define rRx_TO_Rx 0xed8 +#define rStandby 0xedc +#define rSleep 0xee0 +#define rPMPD_ANAEN 0xeec + +/* + * 7. RF Register 0x00-0x2E (RF 8256) + * RF-0222D 0x00-3F + * + * Zebra1 */ +#define rZebra1_HSSIEnable 0x0 /* Useless now */ +#define rZebra1_TRxEnable1 0x1 +#define rZebra1_TRxEnable2 0x2 +#define rZebra1_AGC 0x4 +#define rZebra1_ChargePump 0x5 +#define rZebra1_Channel 0x7 /* RF channel switch */ + +/* #endif */ +#define rZebra1_TxGain 0x8 /* Useless now */ +#define rZebra1_TxLPF 0x9 +#define rZebra1_RxLPF 0xb +#define rZebra1_RxHPFCorner 0xc + +/* Zebra4 */ +#define rGlobalCtrl 0 /* Useless now */ +#define rRTL8256_TxLPF 19 +#define rRTL8256_RxLPF 11 + +/* RTL8258 */ +#define rRTL8258_TxLPF 0x11 /* Useless now */ +#define rRTL8258_RxLPF 0x13 +#define rRTL8258_RSSILPF 0xa + +/* + * RL6052 Register definition + * */ +#define RF_AC 0x00 /* */ + +#define RF_IQADJ_G1 0x01 /* */ +#define RF_IQADJ_G2 0x02 /* */ +#define RF_BS_PA_APSET_G1_G4 0x03 +#define RF_BS_PA_APSET_G5_G8 0x04 +#define RF_POW_TRSW 0x05 /* */ + +#define RF_GAIN_RX 0x06 /* */ +#define RF_GAIN_TX 0x07 /* */ + +#define RF_TXM_IDAC 0x08 /* */ +#define RF_IPA_G 0x09 /* */ +#define RF_TXBIAS_G 0x0A +#define RF_TXPA_AG 0x0B +#define RF_IPA_A 0x0C /* */ +#define RF_TXBIAS_A 0x0D +#define RF_BS_PA_APSET_G9_G11 0x0E +#define RF_BS_IQGEN 0x0F /* */ + +#define RF_MODE1 0x10 /* */ +#define RF_MODE2 0x11 /* */ + +#define RF_RX_AGC_HP 0x12 /* */ +#define RF_TX_AGC 0x13 /* */ +#define RF_BIAS 0x14 /* */ +#define RF_IPA 0x15 /* */ +#define RF_TXBIAS 0x16 +#define RF_POW_ABILITY 0x17 /* */ +#define RF_MODE_AG 0x18 /* */ +#define rRfChannel 0x18 /* RF channel and BW switch */ +#define RF_CHNLBW 0x18 /* RF channel and BW switch */ +#define RF_TOP 0x19 /* */ + +#define RF_RX_G1 0x1A /* */ +#define RF_RX_G2 0x1B /* */ + +#define RF_RX_BB2 0x1C /* */ +#define RF_RX_BB1 0x1D /* */ + +#define RF_RCK1 0x1E /* */ +#define RF_RCK2 0x1F /* */ + +#define RF_TX_G1 0x20 /* */ +#define RF_TX_G2 0x21 /* */ +#define RF_TX_G3 0x22 /* */ + +#define RF_TX_BB1 0x23 /* */ + +#define RF_T_METER 0x24 /* */ + +#define RF_SYN_G1 0x25 /* RF TX Power control */ +#define RF_SYN_G2 0x26 /* RF TX Power control */ +#define RF_SYN_G3 0x27 /* RF TX Power control */ +#define RF_SYN_G4 0x28 /* RF TX Power control */ +#define RF_SYN_G5 0x29 /* RF TX Power control */ +#define RF_SYN_G6 0x2A /* RF TX Power control */ +#define RF_SYN_G7 0x2B /* RF TX Power control */ +#define RF_SYN_G8 0x2C /* RF TX Power control */ + +#define RF_RCK_OS 0x30 /* RF TX PA control */ + +#define RF_TXPA_G1 0x31 /* RF TX PA control */ +#define RF_TXPA_G2 0x32 /* RF TX PA control */ +#define RF_TXPA_G3 0x33 /* RF TX PA control */ +#define RF_TX_BIAS_A 0x35 +#define RF_TX_BIAS_D 0x36 +#define RF_LOBF_9 0x38 +#define RF_RXRF_A3 0x3C /* */ +#define RF_TRSW 0x3F + +#define RF_TXRF_A2 0x41 +#define RF_T_METER_88E 0x42 +#define RF_TXPA_G4 0x46 +#define RF_TXPA_A4 0x4B +#define RF_0x52 0x52 +#define RF_WE_LUT 0xEF +#define RF_S0S1 0xB0 + +/* + * Bit Mask + * + * 1. Page1(0x100) */ +#define bBBResetB 0x100 /* Useless now? */ +#define bGlobalResetB 0x200 +#define bOFDMTxStart 0x4 +#define bCCKTxStart 0x8 +#define bCRC32Debug 0x100 +#define bPMACLoopback 0x10 +#define bTxLSIG 0xffffff +#define bOFDMTxRate 0xf +#define bOFDMTxReserved 0x10 +#define bOFDMTxLength 0x1ffe0 +#define bOFDMTxParity 0x20000 +#define bTxHTSIG1 0xffffff +#define bTxHTMCSRate 0x7f +#define bTxHTBW 0x80 +#define bTxHTLength 0xffff00 +#define bTxHTSIG2 0xffffff +#define bTxHTSmoothing 0x1 +#define bTxHTSounding 0x2 +#define bTxHTReserved 0x4 +#define bTxHTAggreation 0x8 +#define bTxHTSTBC 0x30 +#define bTxHTAdvanceCoding 0x40 +#define bTxHTShortGI 0x80 +#define bTxHTNumberHT_LTF 0x300 +#define bTxHTCRC8 0x3fc00 +#define bCounterReset 0x10000 +#define bNumOfOFDMTx 0xffff +#define bNumOfCCKTx 0xffff0000 +#define bTxIdleInterval 0xffff +#define bOFDMService 0xffff0000 +#define bTxMACHeader 0xffffffff +#define bTxDataInit 0xff +#define bTxHTMode 0x100 +#define bTxDataType 0x30000 +#define bTxRandomSeed 0xffffffff +#define bCCKTxPreamble 0x1 +#define bCCKTxSFD 0xffff0000 +#define bCCKTxSIG 0xff +#define bCCKTxService 0xff00 +#define bCCKLengthExt 0x8000 +#define bCCKTxLength 0xffff0000 +#define bCCKTxCRC16 0xffff +#define bCCKTxStatus 0x1 +#define bOFDMTxStatus 0x2 + +#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) +#define RF_TX_GAIN_OFFSET_8710B(_val) (abs((_val)) | (((_val) > 0) ? BIT(4) : 0)) + +/* 2. Page8(0x800) */ +#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ +#define bJapanMode 0x2 +#define bCCKTxSC 0x30 +#define bCCKEn 0x1000000 +#define bOFDMEn 0x2000000 + +#define bOFDMRxADCPhase 0x10000 /* Useless now */ +#define bOFDMTxDACPhase 0x40000 +#define bXATxAGC 0x3f + +#define bAntennaSelect 0x0300 + +#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ +#define bXCTxAGC 0xf000 +#define bXDTxAGC 0xf0000 + +#define bPAStart 0xf0000000 /* Useless now */ +#define bTRStart 0x00f00000 +#define bRFStart 0x0000f000 +#define bBBStart 0x000000f0 +#define bBBCCKStart 0x0000000f +#define bPAEnd 0xf /* Reg0x814 */ +#define bTREnd 0x0f000000 +#define bRFEnd 0x000f0000 +#define bCCAMask 0x000000f0 /* T2R */ +#define bR2RCCAMask 0x00000f00 +#define bHSSI_R2TDelay 0xf8000000 +#define bHSSI_T2RDelay 0xf80000 +#define bContTxHSSI 0x400 /* chane gain at continue Tx */ +#define bIGFromCCK 0x200 +#define bAGCAddress 0x3f +#define bRxHPTx 0x7000 +#define bRxHPT2R 0x38000 +#define bRxHPCCKIni 0xc0000 +#define bAGCTxCode 0xc00000 +#define bAGCRxCode 0x300000 + +#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ +#define b3WireAddressLength 0x400 + +#define b3WireRFPowerDown 0x1 /* Useless now + * #define bHWSISelect 0x8 */ +#define b5GPAPEPolarity 0x40000000 +#define b2GPAPEPolarity 0x80000000 +#define bRFSW_TxDefaultAnt 0x3 +#define bRFSW_TxOptionAnt 0x30 +#define bRFSW_RxDefaultAnt 0x300 +#define bRFSW_RxOptionAnt 0x3000 +#define bRFSI_3WireData 0x1 +#define bRFSI_3WireClock 0x2 +#define bRFSI_3WireLoad 0x4 +#define bRFSI_3WireRW 0x8 +#define bRFSI_3Wire 0xf + +#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ + +#define bRFSI_TRSW 0x20 /* Useless now */ +#define bRFSI_TRSWB 0x40 +#define bRFSI_ANTSW 0x100 +#define bRFSI_ANTSWB 0x200 +#define bRFSI_PAPE 0x400 +#define bRFSI_PAPE5G 0x800 +#define bBandSelect 0x1 +#define bHTSIG2_GI 0x80 +#define bHTSIG2_Smoothing 0x01 +#define bHTSIG2_Sounding 0x02 +#define bHTSIG2_Aggreaton 0x08 +#define bHTSIG2_STBC 0x30 +#define bHTSIG2_AdvCoding 0x40 +#define bHTSIG2_NumOfHTLTF 0x300 +#define bHTSIG2_CRC8 0x3fc +#define bHTSIG1_MCS 0x7f +#define bHTSIG1_BandWidth 0x80 +#define bHTSIG1_HTLength 0xffff +#define bLSIG_Rate 0xf +#define bLSIG_Reserved 0x10 +#define bLSIG_Length 0x1fffe +#define bLSIG_Parity 0x20 +#define bCCKRxPhase 0x4 + +#define bLSSIReadAddress 0x7f800000 /* T65 RF */ + +#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ + +#define bLSSIReadBackData 0xfffff /* T65 RF */ + +#define bLSSIReadOKFlag 0x1000 /* Useless now */ +#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ +#define bRegulator0Standby 0x1 +#define bRegulatorPLLStandby 0x2 +#define bRegulator1Standby 0x4 +#define bPLLPowerUp 0x8 +#define bDPLLPowerUp 0x10 +#define bDA10PowerUp 0x20 +#define bAD7PowerUp 0x200 +#define bDA6PowerUp 0x2000 +#define bXtalPowerUp 0x4000 +#define b40MDClkPowerUP 0x8000 +#define bDA6DebugMode 0x20000 +#define bDA6Swing 0x380000 + +#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ + +#define b80MClkDelay 0x18000000 /* Useless */ +#define bAFEWatchDogEnable 0x20000000 + +#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ +#define bXtalCap23 0x3 +#define bXtalCap92x 0x0f000000 +#define bXtalCap 0x0f000000 + +#define bIntDifClkEnable 0x400 /* Useless */ +#define bExtSigClkEnable 0x800 +#define bBandgapMbiasPowerUp 0x10000 +#define bAD11SHGain 0xc0000 +#define bAD11InputRange 0x700000 +#define bAD11OPCurrent 0x3800000 +#define bIPathLoopback 0x4000000 +#define bQPathLoopback 0x8000000 +#define bAFELoopback 0x10000000 +#define bDA10Swing 0x7e0 +#define bDA10Reverse 0x800 +#define bDAClkSource 0x1000 +#define bAD7InputRange 0x6000 +#define bAD7Gain 0x38000 +#define bAD7OutputCMMode 0x40000 +#define bAD7InputCMMode 0x380000 +#define bAD7Current 0xc00000 +#define bRegulatorAdjust 0x7000000 +#define bAD11PowerUpAtTx 0x1 +#define bDA10PSAtTx 0x10 +#define bAD11PowerUpAtRx 0x100 +#define bDA10PSAtRx 0x1000 +#define bCCKRxAGCFormat 0x200 +#define bPSDFFTSamplepPoint 0xc000 +#define bPSDAverageNum 0x3000 +#define bIQPathControl 0xc00 +#define bPSDFreq 0x3ff +#define bPSDAntennaPath 0x30 +#define bPSDIQSwitch 0x40 +#define bPSDRxTrigger 0x400000 +#define bPSDTxTrigger 0x80000000 +#define bPSDSineToneScale 0x7f000000 +#define bPSDReport 0xffff + +/* 3. Page9(0x900) */ +#define bOFDMTxSC 0x30000000 /* Useless */ +#define bCCKTxOn 0x1 +#define bOFDMTxOn 0x2 +#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ +#define bDebugItem 0xff /* reset debug page and LWord */ +#define bAntL 0x10 +#define bAntNonHT 0x100 +#define bAntHT1 0x1000 +#define bAntHT2 0x10000 +#define bAntHT1S1 0x100000 +#define bAntNonHTS1 0x1000000 + +/* 4. PageA(0xA00) */ +#define bCCKBBMode 0x3 /* Useless */ +#define bCCKTxPowerSaving 0x80 +#define bCCKRxPowerSaving 0x40 + +#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ + +#define bCCKScramble 0x8 /* Useless */ +#define bCCKAntDiversity 0x8000 +#define bCCKCarrierRecovery 0x4000 +#define bCCKTxRate 0x3000 +#define bCCKDCCancel 0x0800 +#define bCCKISICancel 0x0400 +#define bCCKMatchFilter 0x0200 +#define bCCKEqualizer 0x0100 +#define bCCKPreambleDetect 0x800000 +#define bCCKFastFalseCCA 0x400000 +#define bCCKChEstStart 0x300000 +#define bCCKCCACount 0x080000 +#define bCCKcs_lim 0x070000 +#define bCCKBistMode 0x80000000 +#define bCCKCCAMask 0x40000000 +#define bCCKTxDACPhase 0x4 +#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ +#define bCCKr_cp_mode0 0x0100 +#define bCCKTxDCOffset 0xf0 +#define bCCKRxDCOffset 0xf +#define bCCKCCAMode 0xc000 +#define bCCKFalseCS_lim 0x3f00 +#define bCCKCS_ratio 0xc00000 +#define bCCKCorgBit_sel 0x300000 +#define bCCKPD_lim 0x0f0000 +#define bCCKNewCCA 0x80000000 +#define bCCKRxHPofIG 0x8000 +#define bCCKRxIG 0x7f00 +#define bCCKLNAPolarity 0x800000 +#define bCCKRx1stGain 0x7f0000 +#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ +#define bCCKRxAGCSatLevel 0x1f000000 +#define bCCKRxAGCSatCount 0xe0 +#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ +#define bCCKFixedRxAGC 0x8000 +/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ +#define bCCKAntennaPolarity 0x2000 +#define bCCKTxFilterType 0x0c00 +#define bCCKRxAGCReportType 0x0300 +#define bCCKRxDAGCEn 0x80000000 +#define bCCKRxDAGCPeriod 0x20000000 +#define bCCKRxDAGCSatLevel 0x1f000000 +#define bCCKTimingRecovery 0x800000 +#define bCCKTxC0 0x3f0000 +#define bCCKTxC1 0x3f000000 +#define bCCKTxC2 0x3f +#define bCCKTxC3 0x3f00 +#define bCCKTxC4 0x3f0000 +#define bCCKTxC5 0x3f000000 +#define bCCKTxC6 0x3f +#define bCCKTxC7 0x3f00 +#define bCCKDebugPort 0xff0000 +#define bCCKDACDebug 0x0f000000 +#define bCCKFalseAlarmEnable 0x8000 +#define bCCKFalseAlarmRead 0x4000 +#define bCCKTRSSI 0x7f +#define bCCKRxAGCReport 0xfe +#define bCCKRxReport_AntSel 0x80000000 +#define bCCKRxReport_MFOff 0x40000000 +#define bCCKRxRxReport_SQLoss 0x20000000 +#define bCCKRxReport_Pktloss 0x10000000 +#define bCCKRxReport_Lockedbit 0x08000000 +#define bCCKRxReport_RateError 0x04000000 +#define bCCKRxReport_RxRate 0x03000000 +#define bCCKRxFACounterLower 0xff +#define bCCKRxFACounterUpper 0xff000000 +#define bCCKRxHPAGCStart 0xe000 +#define bCCKRxHPAGCFinal 0x1c00 +#define bCCKRxFalseAlarmEnable 0x8000 +#define bCCKFACounterFreeze 0x4000 +#define bCCKTxPathSel 0x10000000 +#define bCCKDefaultRxPath 0xc000000 +#define bCCKOptionRxPath 0x3000000 + +/* 5. PageC(0xC00) */ +#define bNumOfSTF 0x3 /* Useless */ +#define bShift_L 0xc0 +#define bGI_TH 0xc +#define bRxPathA 0x1 +#define bRxPathB 0x2 +#define bRxPathC 0x4 +#define bRxPathD 0x8 +#define bTxPathA 0x1 +#define bTxPathB 0x2 +#define bTxPathC 0x4 +#define bTxPathD 0x8 +#define bTRSSIFreq 0x200 +#define bADCBackoff 0x3000 +#define bDFIRBackoff 0xc000 +#define bTRSSILatchPhase 0x10000 +#define bRxIDCOffset 0xff +#define bRxQDCOffset 0xff00 +#define bRxDFIRMode 0x1800000 +#define bRxDCNFType 0xe000000 +#define bRXIQImb_A 0x3ff +#define bRXIQImb_B 0xfc00 +#define bRXIQImb_C 0x3f0000 +#define bRXIQImb_D 0xffc00000 +#define bDC_dc_Notch 0x60000 +#define bRxNBINotch 0x1f000000 +#define bPD_TH 0xf +#define bPD_TH_Opt2 0xc000 +#define bPWED_TH 0x700 +#define bIfMF_Win_L 0x800 +#define bPD_Option 0x1000 +#define bMF_Win_L 0xe000 +#define bBW_Search_L 0x30000 +#define bwin_enh_L 0xc0000 +#define bBW_TH 0x700000 +#define bED_TH2 0x3800000 +#define bBW_option 0x4000000 +#define bRatio_TH 0x18000000 +#define bWindow_L 0xe0000000 +#define bSBD_Option 0x1 +#define bFrame_TH 0x1c +#define bFS_Option 0x60 +#define bDC_Slope_check 0x80 +#define bFGuard_Counter_DC_L 0xe00 +#define bFrame_Weight_Short 0x7000 +#define bSub_Tune 0xe00000 +#define bFrame_DC_Length 0xe000000 +#define bSBD_start_offset 0x30000000 +#define bFrame_TH_2 0x7 +#define bFrame_GI2_TH 0x38 +#define bGI2_Sync_en 0x40 +#define bSarch_Short_Early 0x300 +#define bSarch_Short_Late 0xc00 +#define bSarch_GI2_Late 0x70000 +#define bCFOAntSum 0x1 +#define bCFOAcc 0x2 +#define bCFOStartOffset 0xc +#define bCFOLookBack 0x70 +#define bCFOSumWeight 0x80 +#define bDAGCEnable 0x10000 +#define bTXIQImb_A 0x3ff +#define bTXIQImb_B 0xfc00 +#define bTXIQImb_C 0x3f0000 +#define bTXIQImb_D 0xffc00000 +#define bTxIDCOffset 0xff +#define bTxQDCOffset 0xff00 +#define bTxDFIRMode 0x10000 +#define bTxPesudoNoiseOn 0x4000000 +#define bTxPesudoNoise_A 0xff +#define bTxPesudoNoise_B 0xff00 +#define bTxPesudoNoise_C 0xff0000 +#define bTxPesudoNoise_D 0xff000000 +#define bCCADropOption 0x20000 +#define bCCADropThres 0xfff00000 +#define bEDCCA_H 0xf +#define bEDCCA_L 0xf0 +#define bLambda_ED 0x300 +#define bRxInitialGain 0x7f +#define bRxAntDivEn 0x80 +#define bRxAGCAddressForLNA 0x7f00 +#define bRxHighPowerFlow 0x8000 +#define bRxAGCFreezeThres 0xc0000 +#define bRxFreezeStep_AGC1 0x300000 +#define bRxFreezeStep_AGC2 0xc00000 +#define bRxFreezeStep_AGC3 0x3000000 +#define bRxFreezeStep_AGC0 0xc000000 +#define bRxRssi_Cmp_En 0x10000000 +#define bRxQuickAGCEn 0x20000000 +#define bRxAGCFreezeThresMode 0x40000000 +#define bRxOverFlowCheckType 0x80000000 +#define bRxAGCShift 0x7f +#define bTRSW_Tri_Only 0x80 +#define bPowerThres 0x300 +#define bRxAGCEn 0x1 +#define bRxAGCTogetherEn 0x2 +#define bRxAGCMin 0x4 +#define bRxHP_Ini 0x7 +#define bRxHP_TRLNA 0x70 +#define bRxHP_RSSI 0x700 +#define bRxHP_BBP1 0x7000 +#define bRxHP_BBP2 0x70000 +#define bRxHP_BBP3 0x700000 +#define bRSSI_H 0x7f0000 /* the threshold for high power */ +#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ +#define bRxSettle_TRSW 0x7 +#define bRxSettle_LNA 0x38 +#define bRxSettle_RSSI 0x1c0 +#define bRxSettle_BBP 0xe00 +#define bRxSettle_RxHP 0x7000 +#define bRxSettle_AntSW_RSSI 0x38000 +#define bRxSettle_AntSW 0xc0000 +#define bRxProcessTime_DAGC 0x300000 +#define bRxSettle_HSSI 0x400000 +#define bRxProcessTime_BBPPW 0x800000 +#define bRxAntennaPowerShift 0x3000000 +#define bRSSITableSelect 0xc000000 +#define bRxHP_Final 0x7000000 +#define bRxHTSettle_BBP 0x7 +#define bRxHTSettle_HSSI 0x8 +#define bRxHTSettle_RxHP 0x70 +#define bRxHTSettle_BBPPW 0x80 +#define bRxHTSettle_Idle 0x300 +#define bRxHTSettle_Reserved 0x1c00 +#define bRxHTRxHPEn 0x8000 +#define bRxHTAGCFreezeThres 0x30000 +#define bRxHTAGCTogetherEn 0x40000 +#define bRxHTAGCMin 0x80000 +#define bRxHTAGCEn 0x100000 +#define bRxHTDAGCEn 0x200000 +#define bRxHTRxHP_BBP 0x1c00000 +#define bRxHTRxHP_Final 0xe0000000 +#define bRxPWRatioTH 0x3 +#define bRxPWRatioEn 0x4 +#define bRxMFHold 0x3800 +#define bRxPD_Delay_TH1 0x38 +#define bRxPD_Delay_TH2 0x1c0 +#define bRxPD_DC_COUNT_MAX 0x600 +/* #define bRxMF_Hold 0x3800 */ +#define bRxPD_Delay_TH 0x8000 +#define bRxProcess_Delay 0xf0000 +#define bRxSearchrange_GI2_Early 0x700000 +#define bRxFrame_Guard_Counter_L 0x3800000 +#define bRxSGI_Guard_L 0xc000000 +#define bRxSGI_Search_L 0x30000000 +#define bRxSGI_TH 0xc0000000 +#define bDFSCnt0 0xff +#define bDFSCnt1 0xff00 +#define bDFSFlag 0xf0000 +#define bMFWeightSum 0x300000 +#define bMinIdxTH 0x7f000000 +#define bDAFormat 0x40000 +#define bTxChEmuEnable 0x01000000 +#define bTRSWIsolation_A 0x7f +#define bTRSWIsolation_B 0x7f00 +#define bTRSWIsolation_C 0x7f0000 +#define bTRSWIsolation_D 0x7f000000 +#define bExtLNAGain 0x7c00 + +/* 6. PageE(0xE00) */ +#define bSTBCEn 0x4 /* Useless */ +#define bAntennaMapping 0x10 +#define bNss 0x20 +#define bCFOAntSumD 0x200 +#define bPHYCounterReset 0x8000000 +#define bCFOReportGet 0x4000000 +#define bOFDMContinueTx 0x10000000 +#define bOFDMSingleCarrier 0x20000000 +#define bOFDMSingleTone 0x40000000 +/* #define bRxPath1 0x01 */ +/* #define bRxPath2 0x02 */ +/* #define bRxPath3 0x04 */ +/* #define bRxPath4 0x08 */ +/* #define bTxPath1 0x10 */ +/* #define bTxPath2 0x20 */ +#define bHTDetect 0x100 +#define bCFOEn 0x10000 +#define bCFOValue 0xfff00000 +#define bSigTone_Re 0x3f +#define bSigTone_Im 0x7f00 +#define bCounter_CCA 0xffff +#define bCounter_ParityFail 0xffff0000 +#define bCounter_RateIllegal 0xffff +#define bCounter_CRC8Fail 0xffff0000 +#define bCounter_MCSNoSupport 0xffff +#define bCounter_FastSync 0xffff +#define bShortCFO 0xfff +#define bShortCFOTLength 12 /* total */ +#define bShortCFOFLength 11 /* fraction */ +#define bLongCFO 0x7ff +#define bLongCFOTLength 11 +#define bLongCFOFLength 11 +#define bTailCFO 0x1fff +#define bTailCFOTLength 13 +#define bTailCFOFLength 12 +#define bmax_en_pwdB 0xffff +#define bCC_power_dB 0xffff0000 +#define bnoise_pwdB 0xffff +#define bPowerMeasTLength 10 +#define bPowerMeasFLength 3 +#define bRx_HT_BW 0x1 +#define bRxSC 0x6 +#define bRx_HT 0x8 +#define bNB_intf_det_on 0x1 +#define bIntf_win_len_cfg 0x30 +#define bNB_Intf_TH_cfg 0x1c0 +#define bRFGain 0x3f +#define bTableSel 0x40 +#define bTRSW 0x80 +#define bRxSNR_A 0xff +#define bRxSNR_B 0xff00 +#define bRxSNR_C 0xff0000 +#define bRxSNR_D 0xff000000 +#define bSNREVMTLength 8 +#define bSNREVMFLength 1 +#define bCSI1st 0xff +#define bCSI2nd 0xff00 +#define bRxEVM1st 0xff0000 +#define bRxEVM2nd 0xff000000 +#define bSIGEVM 0xff +#define bPWDB 0xff00 +#define bSGIEN 0x10000 + +#define bSFactorQAM1 0xf /* Useless */ +#define bSFactorQAM2 0xf0 +#define bSFactorQAM3 0xf00 +#define bSFactorQAM4 0xf000 +#define bSFactorQAM5 0xf0000 +#define bSFactorQAM6 0xf0000 +#define bSFactorQAM7 0xf00000 +#define bSFactorQAM8 0xf000000 +#define bSFactorQAM9 0xf0000000 +#define bCSIScheme 0x100000 + +#define bNoiseLvlTopSet 0x3 /* Useless */ +#define bChSmooth 0x4 +#define bChSmoothCfg1 0x38 +#define bChSmoothCfg2 0x1c0 +#define bChSmoothCfg3 0xe00 +#define bChSmoothCfg4 0x7000 +#define bMRCMode 0x800000 +#define bTHEVMCfg 0x7000000 + +#define bLoopFitType 0x1 /* Useless */ +#define bUpdCFO 0x40 +#define bUpdCFOOffData 0x80 +#define bAdvUpdCFO 0x100 +#define bAdvTimeCtrl 0x800 +#define bUpdClko 0x1000 +#define bFC 0x6000 +#define bTrackingMode 0x8000 +#define bPhCmpEnable 0x10000 +#define bUpdClkoLTF 0x20000 +#define bComChCFO 0x40000 +#define bCSIEstiMode 0x80000 +#define bAdvUpdEqz 0x100000 +#define bUChCfg 0x7000000 +#define bUpdEqz 0x8000000 + +/* Rx Pseduo noise */ +#define bRxPesudoNoiseOn 0x20000000 /* Useless */ +#define bRxPesudoNoise_A 0xff +#define bRxPesudoNoise_B 0xff00 +#define bRxPesudoNoise_C 0xff0000 +#define bRxPesudoNoise_D 0xff000000 +#define bPesudoNoiseState_A 0xffff +#define bPesudoNoiseState_B 0xffff0000 +#define bPesudoNoiseState_C 0xffff +#define bPesudoNoiseState_D 0xffff0000 + +/* 7. RF Register + * Zebra1 */ +#define bZebra1_HSSIEnable 0x8 /* Useless */ +#define bZebra1_TRxControl 0xc00 +#define bZebra1_TRxGainSetting 0x07f +#define bZebra1_RxCorner 0xc00 +#define bZebra1_TxChargePump 0x38 +#define bZebra1_RxChargePump 0x7 +#define bZebra1_ChannelNum 0xf80 +#define bZebra1_TxLPFBW 0x400 +#define bZebra1_RxLPFBW 0x600 + +/* Zebra4 */ +#define bRTL8256RegModeCtrl1 0x100 /* Useless */ +#define bRTL8256RegModeCtrl0 0x40 +#define bRTL8256_TxLPFBW 0x18 +#define bRTL8256_RxLPFBW 0x600 + +/* RTL8258 */ +#define bRTL8258_TxLPFBW 0xc /* Useless */ +#define bRTL8258_RxLPFBW 0xc00 +#define bRTL8258_RSSILPFBW 0xc0 + + +/* + * Other Definition + * */ + +/* byte endable for sb_write */ +#define bByte0 0x1 /* Useless */ +#define bByte1 0x2 +#define bByte2 0x4 +#define bByte3 0x8 +#define bWord0 0x3 +#define bWord1 0xc +#define bDWord 0xf + +/* for PutRegsetting & GetRegSetting BitMask */ +#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ +#define bMaskByte1 0xff00 +#define bMaskByte2 0xff0000 +#define bMaskByte3 0xff000000 +#define bMaskHWord 0xffff0000 +#define bMaskLWord 0x0000ffff +#define bMaskDWord 0xffffffff +#define bMaskH3Bytes 0xffffff00 +#define bMask12Bits 0xfff +#define bMaskH4Bits 0xf0000000 +#define bMaskOFDM_D 0xffc00000 +#define bMaskCCK 0x3f3f3f3f + + +#define bEnable 0x1 /* Useless */ +#define bDisable 0x0 + +#define LeftAntenna 0x0 /* Useless */ +#define RightAntenna 0x1 + +#define tCheckTxStatus 500 /* 500ms // Useless */ +#define tUpdateRxCounter 100 /* 100ms */ + +#define rateCCK 0 /* Useless */ +#define rateOFDM 1 +#define rateHT 2 + +/* define Register-End */ +#define bPMAC_End 0x1ff /* Useless */ +#define bFPGAPHY0_End 0x8ff +#define bFPGAPHY1_End 0x9ff +#define bCCKPHY0_End 0xaff +#define bOFDMPHY0_End 0xcff +#define bOFDMPHY1_End 0xdff + +/* define max debug item in each debug page + * #define bMaxItem_FPGA_PHY0 0x9 + * #define bMaxItem_FPGA_PHY1 0x3 + * #define bMaxItem_PHY_11B 0x16 + * #define bMaxItem_OFDM_PHY0 0x29 + * #define bMaxItem_OFDM_PHY1 0x0 */ + +#define bPMACControl 0x0 /* Useless */ +#define bWMACControl 0x1 +#define bWNICControl 0x2 + +#define PathA 0x0 /* Useless */ +#define PathB 0x1 +#define PathC 0x2 +#define PathD 0x3 + +#endif diff --git a/include/Hal8710BPwrSeq.h b/include/Hal8710BPwrSeq.h new file mode 100644 index 0000000..31ad29c --- /dev/null +++ b/include/Hal8710BPwrSeq.h @@ -0,0 +1,167 @@ +/****************************************************************************** + * + * Copyright(c) 2016 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef REALTEK_POWER_SEQUENCE_8710B +#define REALTEK_POWER_SEQUENCE_8710B + +/* #include "PwrSeqCmd.h" */ +#include "HalPwrSeqCmd.h" + +/* + Check document WM-20110607-Paul-RTL8192e_Power_Architecture-R02.vsd + There are 6 HW Power States: + 0: POFF--Power Off + 1: PDN--Power Down + 2: CARDEMU--Card Emulation + 3: ACT--Active Mode + 4: LPS--Low Power State + 5: SUS--Suspend + + The transition from different states are defined below + TRANS_CARDEMU_TO_ACT + TRANS_ACT_TO_CARDEMU + TRANS_CARDEMU_TO_SUS + TRANS_SUS_TO_CARDEMU + TRANS_CARDEMU_TO_PDN + TRANS_ACT_TO_LPS + TRANS_LPS_TO_ACT + + TRANS_END +*/ +#define RTL8710B_TRANS_CARDEMU_TO_ACT_STEPS 5 +#define RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS 4 +#define RTL8710B_TRANS_CARDEMU_TO_SUS_STEPS 7 +#define RTL8710B_TRANS_SUS_TO_CARDEMU_STEPS 15 +#define RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS 15 +#define RTL8710B_TRANS_PDN_TO_CARDEMU_STEPS 15 +#define RTL8710B_TRANS_ACT_TO_LPS_STEPS 15 +#define RTL8710B_TRANS_LPS_TO_ACT_STEPS 15 +#define RTL8710B_TRANS_ACT_TO_SWLPS_STEPS 22 +#define RTL8710B_TRANS_SWLPS_TO_ACT_STEPS 15 +#define RTL8710B_TRANS_END_STEPS 1 + + +#define RTL8710B_TRANS_CARDEMU_TO_ACT \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x005D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*AFE power mode selection:1: LDO mode ,0: Power-cut mode*/\ + {0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},\ + {0x0056, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x0E},\ + {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},\ + {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ + + +#define RTL8710B_TRANS_ACT_TO_CARDEMU \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, */ /*0x1F[7:0] = 0 turn off RF*/ \ + {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT0|BIT1|BIT2), 0},/*0x04[24:26] = 0 turn off RF*/ \ + {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT0|BIT1), 0},/*0x04[16:17] = 0 BB reset*/ \ + {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x20[1] = 1 turn off MAC by HW state machine*/ \ + {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x20[1] = 0 polling until return 0 to disable*/ \ + + +#define RTL8710B_TRANS_CARDEMU_TO_SUS \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ + {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ + {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ + {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ + {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ + +#define RTL8710B_TRANS_SUS_TO_CARDEMU \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ + {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ + {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ + {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ + + +#define RTL8710B_TRANS_CARDEMU_TO_CARDDIS \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + +#define RTL8710B_TRANS_CARDDIS_TO_CARDEMU \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + + +#define RTL8710B_TRANS_CARDEMU_TO_PDN \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ + {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ + {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ + +#define RTL8710B_TRANS_PDN_TO_CARDEMU \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ + +#define RTL8710B_TRANS_ACT_TO_LPS \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ + {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ + {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ + {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ + {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ + {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ + {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ + {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ + {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ + {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ + {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ + {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ + {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ + + +#define RTL8710B_TRANS_LPS_TO_ACT \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ + {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ + {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ + {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ + {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ + {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ + {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ + {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ + {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ + {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ + {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ + +#define RTL8710B_TRANS_END \ + /* format */ \ + /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ + {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // + + +extern WLAN_PWR_CFG rtl8710B_power_on_flow[RTL8710B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8710B_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8710B_radio_off_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8710B_card_disable_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8710B_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8710B_card_enable_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8710B_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8710B_suspend_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8710B_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8710B_resume_flow[RTL8710B_TRANS_SUS_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8710B_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8710B_hwpdn_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8710B_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8710B_enter_lps_flow[RTL8710B_TRANS_ACT_TO_LPS_STEPS+RTL8710B_TRANS_END_STEPS]; +extern WLAN_PWR_CFG rtl8710B_leave_lps_flow[RTL8710B_TRANS_LPS_TO_ACT_STEPS+RTL8710B_TRANS_END_STEPS]; + +#endif diff --git a/include/Hal8723BPhyCfg.h b/include/Hal8723BPhyCfg.h index 18c0a78..a9ee4bc 100644 --- a/include/Hal8723BPhyCfg.h +++ b/include/Hal8723BPhyCfg.h @@ -39,34 +39,34 @@ /*--------------------------Exported Function prototype---------------------*/ u32 PHY_QueryBBReg_8723B( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask ); -VOID +void PHY_SetBBReg_8723B( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data ); u32 PHY_QueryRFReg_8723B( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask ); -VOID +void PHY_SetRFReg_8723B( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask, + u32 Data ); /* MAC/BB/RF HAL config */ @@ -78,53 +78,47 @@ s32 PHY_MACConfig8723B(PADAPTER padapter); int PHY_ConfigRFWithParaFile_8723B( - IN PADAPTER Adapter, - IN u8 *pFileName, + PADAPTER Adapter, + u8 *pFileName, enum rf_path eRFPath ); -VOID +void PHY_SetTxPowerIndex_8723B( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate + PADAPTER Adapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate ); u8 PHY_GetTxPowerIndex_8723B( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, + u8 BandWidth, + u8 Channel, struct txpwr_idx_comp *tic ); -VOID -PHY_GetTxPowerLevel8723B( - IN PADAPTER Adapter, - OUT s32 *powerlevel -); - -VOID +void PHY_SetTxPowerLevel8723B( - IN PADAPTER Adapter, - IN u8 channel + PADAPTER Adapter, + u8 channel ); -VOID +void PHY_SetSwChnlBWMode8723B( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 + PADAPTER Adapter, + u8 channel, + enum channel_width Bandwidth, + u8 Offset40, + u8 Offset80 ); -VOID phy_set_rf_path_switch_8723b( - IN struct dm_struct *phydm, - IN bool bMain +void phy_set_rf_path_switch_8723b( + struct dm_struct *phydm, + bool bMain ); /*--------------------------Exported Function prototype End---------------------*/ diff --git a/include/Hal8723DPhyCfg.h b/include/Hal8723DPhyCfg.h index 8dd4819..6071185 100644 --- a/include/Hal8723DPhyCfg.h +++ b/include/Hal8723DPhyCfg.h @@ -39,34 +39,34 @@ /*--------------------------Exported Function prototype---------------------*/ u32 PHY_QueryBBReg_8723D( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask ); -VOID +void PHY_SetBBReg_8723D( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data ); u32 PHY_QueryRFReg_8723D( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask ); -VOID +void PHY_SetRFReg_8723D( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask, + u32 Data ); /* MAC/BB/RF HAL config */ @@ -78,53 +78,47 @@ s32 PHY_MACConfig8723D(PADAPTER padapter); int PHY_ConfigRFWithParaFile_8723D( - IN PADAPTER Adapter, - IN u8 *pFileName, + PADAPTER Adapter, + u8 *pFileName, enum rf_path eRFPath ); -VOID +void PHY_SetTxPowerIndex_8723D( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate + PADAPTER Adapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate ); u8 PHY_GetTxPowerIndex_8723D( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, + u8 BandWidth, + u8 Channel, struct txpwr_idx_comp *tic ); -VOID -PHY_GetTxPowerLevel8723D( - IN PADAPTER Adapter, - OUT s32 *powerlevel -); - -VOID +void PHY_SetTxPowerLevel8723D( - IN PADAPTER Adapter, - IN u8 channel + PADAPTER Adapter, + u8 channel ); -VOID +void PHY_SetSwChnlBWMode8723D( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 + PADAPTER Adapter, + u8 channel, + enum channel_width Bandwidth, + u8 Offset40, + u8 Offset80 ); -VOID phy_set_rf_path_switch_8723d( - IN struct dm_struct *phydm, - IN bool bMain +void phy_set_rf_path_switch_8723d( + struct dm_struct *phydm, + bool bMain ); /*--------------------------Exported Function prototype End---------------------*/ diff --git a/include/Hal8812PhyCfg.h b/include/Hal8812PhyCfg.h index 0d5282a..083d5f3 100644 --- a/include/Hal8812PhyCfg.h +++ b/include/Hal8812PhyCfg.h @@ -53,90 +53,88 @@ /* * BB and RF register read/write * */ -u32 PHY_QueryBBReg8812(IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask); -void PHY_SetBBReg8812(IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data); -u32 PHY_QueryRFReg8812(IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask); -void PHY_SetRFReg8812(IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data); +u32 PHY_QueryBBReg8812(PADAPTER Adapter, + u32 RegAddr, + u32 BitMask); +void PHY_SetBBReg8812(PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data); +u32 PHY_QueryRFReg8812(PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask); +void PHY_SetRFReg8812(PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask, + u32 Data); /* * Initialization related function * * MAC/BB/RF HAL config */ -int PHY_MACConfig8812(IN PADAPTER Adapter); -int PHY_BBConfig8812(IN PADAPTER Adapter); -void PHY_BB8812_Config_1T(IN PADAPTER Adapter); -int PHY_RFConfig8812(IN PADAPTER Adapter); +int PHY_MACConfig8812(PADAPTER Adapter); +int PHY_BBConfig8812(PADAPTER Adapter); +void PHY_BB8812_Config_1T(PADAPTER Adapter); +int PHY_RFConfig8812(PADAPTER Adapter); /* RF config */ s32 PHY_SwitchWirelessBand8812( - IN PADAPTER Adapter, - IN u8 Band + PADAPTER Adapter, + u8 Band ); /* * BB TX Power R/W * */ -void PHY_GetTxPowerLevel8812(IN PADAPTER Adapter, OUT s32 *powerlevel); -void PHY_SetTxPowerLevel8812(IN PADAPTER Adapter, IN u8 Channel); +void PHY_SetTxPowerLevel8812(PADAPTER Adapter, u8 Channel); -BOOLEAN PHY_UpdateTxPowerDbm8812(IN PADAPTER Adapter, IN int powerInDbm); u8 PHY_GetTxPowerIndex_8812A( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, + u8 BandWidth, + u8 Channel, struct txpwr_idx_comp *tic ); u32 phy_get_tx_bb_swing_8812a( - IN PADAPTER Adapter, - IN BAND_TYPE Band, - IN enum rf_path RFPath + PADAPTER Adapter, + BAND_TYPE Band, + enum rf_path RFPath ); -VOID +void PHY_SetTxPowerIndex_8812A( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate + PADAPTER Adapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate ); /* * channel switch related funciton * */ -VOID +void PHY_SetSwChnlBWMode8812( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 + PADAPTER Adapter, + u8 channel, + enum channel_width Bandwidth, + u8 Offset40, + u8 Offset80 ); /* * BB/MAC/RF other monitor API * */ -VOID +void phy_set_rf_path_switch_8812a( - IN struct dm_struct *phydm, - IN bool bMain + struct dm_struct *phydm, + bool bMain ); /*--------------------------Exported Function prototype---------------------*/ diff --git a/include/Hal8814PhyCfg.h b/include/Hal8814PhyCfg.h index 96f0794..f81fe49 100644 --- a/include/Hal8814PhyCfg.h +++ b/include/Hal8814PhyCfg.h @@ -55,52 +55,52 @@ /* 1. BB register R/W API */ extern u32 -PHY_QueryBBReg8814A(IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask); - - -VOID -PHY_SetBBReg8814A(IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data); - - -extern u32 -PHY_QueryRFReg8814A(IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask); +PHY_QueryBBReg8814A(PADAPTER Adapter, + u32 RegAddr, + u32 BitMask); void -PHY_SetRFReg8814A(IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data); +PHY_SetBBReg8814A(PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data); + + +extern u32 +PHY_QueryRFReg8814A(PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask); + + +void +PHY_SetRFReg8814A(PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask, + u32 Data); /* 1 3. Initial BB/RF config by reading MAC/BB/RF txt. */ s32 phy_BB8814A_Config_ParaFile( - IN PADAPTER Adapter + PADAPTER Adapter ); -VOID +void PHY_ConfigBB_8814A( - IN PADAPTER Adapter + PADAPTER Adapter ); -VOID +void phy_ADC_CLK_8814A( - IN PADAPTER Adapter + PADAPTER Adapter ); s32 PHY_RFConfig8814A( - IN PADAPTER Adapter + PADAPTER Adapter ); /* @@ -110,151 +110,137 @@ PHY_RFConfig8814A( /* 1 5. Tx Power setting API */ -VOID -PHY_GetTxPowerLevel8814( - IN PADAPTER Adapter, - OUT ps4Byte powerlevel -); - -VOID +void PHY_SetTxPowerLevel8814( - IN PADAPTER Adapter, - IN u8 Channel + PADAPTER Adapter, + u8 Channel ); u8 phy_get_tx_power_index_8814a( - IN PADAPTER Adapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN enum channel_width BandWidth, - IN u8 Channel + PADAPTER Adapter, + enum rf_path RFPath, + u8 Rate, + enum channel_width BandWidth, + u8 Channel ); u8 PHY_GetTxPowerIndex8814A( - IN PADAPTER Adapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, + PADAPTER Adapter, + enum rf_path RFPath, + u8 Rate, + u8 BandWidth, + u8 Channel, struct txpwr_idx_comp *tic ); -VOID +void PHY_SetTxPowerIndex_8814A( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate + PADAPTER Adapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate ); - -BOOLEAN -PHY_UpdateTxPowerDbm8814A( - IN PADAPTER Adapter, - IN s4Byte powerInDbm -); - - u32 PHY_GetTxBBSwing_8814A( - IN PADAPTER Adapter, - IN BAND_TYPE Band, - IN enum rf_path RFPath + PADAPTER Adapter, + BAND_TYPE Band, + enum rf_path RFPath ); /* 1 6. Channel setting API */ #if 0 -VOID +void PHY_SwChnlTimerCallback8814A( - IN struct timer_list *p_timer + struct timer_list *p_timer ); #endif -VOID +void PHY_SwChnlWorkItemCallback8814A( - IN PVOID pContext + void *pContext ); -VOID +void HAL_HandleSwChnl8814A( - IN PADAPTER pAdapter, - IN u8 channel + PADAPTER pAdapter, + u8 channel ); -VOID -PHY_SwChnlSynchronously8814A(IN PADAPTER pAdapter, - IN u8 channel); +void +PHY_SwChnlSynchronously8814A(PADAPTER pAdapter, + u8 channel); -VOID -PHY_SwChnlAndSetBWModeCallback8814A(IN PVOID pContext); +void +PHY_SwChnlAndSetBWModeCallback8814A(void *pContext); -VOID +void PHY_HandleSwChnlAndSetBW8814A( - IN PADAPTER Adapter, - IN BOOLEAN bSwitchChannel, - IN BOOLEAN bSetBandWidth, - IN u8 ChannelNum, - IN enum channel_width ChnlWidth, - IN u8 ChnlOffsetOf40MHz, - IN u8 ChnlOffsetOf80MHz, - IN u8 CenterFrequencyIndex1 + PADAPTER Adapter, + BOOLEAN bSwitchChannel, + BOOLEAN bSetBandWidth, + u8 ChannelNum, + enum channel_width ChnlWidth, + u8 ChnlOffsetOf40MHz, + u8 ChnlOffsetOf80MHz, + u8 CenterFrequencyIndex1 ); BOOLEAN -PHY_QueryRFPathSwitch_8814A(IN PADAPTER pAdapter); +PHY_QueryRFPathSwitch_8814A(PADAPTER pAdapter); #if (USE_WORKITEM) -VOID +void RtCheckForHangWorkItemCallback8814A( - IN PVOID pContext + void *pContext ); #endif BOOLEAN SetAntennaConfig8814A( - IN PADAPTER Adapter, - IN u8 DefaultAnt + PADAPTER Adapter, + u8 DefaultAnt ); -VOID +void PHY_SetRFEReg8814A( - IN PADAPTER Adapter, - IN BOOLEAN bInit, - IN u8 Band + PADAPTER Adapter, + BOOLEAN bInit, + u8 Band ); s32 PHY_SwitchWirelessBand8814A( - IN PADAPTER Adapter, - IN u8 Band + PADAPTER Adapter, + u8 Band ); -VOID +void PHY_SetIO_8814A( PADAPTER pAdapter ); -VOID +void PHY_SetSwChnlBWMode8814( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 + PADAPTER Adapter, + u8 channel, + enum channel_width Bandwidth, + u8 Offset40, + u8 Offset80 ); s32 PHY_MACConfig8814(PADAPTER Adapter); int PHY_BBConfig8814(PADAPTER Adapter); -VOID PHY_Set_SecCCATH_by_RXANT_8814A(PADAPTER pAdapter, u4Byte ulAntennaRx); +void PHY_Set_SecCCATH_by_RXANT_8814A(PADAPTER pAdapter, u32 ulAntennaRx); diff --git a/include/Hal8814PwrSeq.h b/include/Hal8814PwrSeq.h index 5f4097d..0138850 100644 --- a/include/Hal8814PwrSeq.h +++ b/include/Hal8814PwrSeq.h @@ -76,9 +76,9 @@ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ - {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ - {0x0002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ - {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ + {0x1002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ + {0x0002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ + {0x1002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*0x1F[7:0] = 0 turn off RF*/ \ /*{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},*/ /*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x28}, /* 0x07[7:0] = 0x28 sps pwm mode 0x2a for BT coex*/ \ @@ -188,9 +188,9 @@ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated, and RF closed*/ \ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ - {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated, and RF closed*/ \ - {0x0002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ - {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ + {0x1002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated, and RF closed*/ \ + {0x0002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ + {0x1002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ {0x05F1, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Respond TxOK to scheduler*/ @@ -209,7 +209,7 @@ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/ \ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/ \ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/ \ - {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x1002[1:0] = 2b'11 enable BB macro*/ \ + {0x1002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x1002[1:0] = 2b'11 enable BB macro*/ \ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ #define RTL8814A_TRANS_END \ diff --git a/include/HalVerDef.h b/include/HalVerDef.h index 1909da7..98972ff 100644 --- a/include/HalVerDef.h +++ b/include/HalVerDef.h @@ -35,7 +35,11 @@ typedef enum tag_HAL_IC_Type_Definition { CHIP_8188F = 12, CHIP_8822B = 13, CHIP_8723D = 14, - CHIP_8821C = 15 + CHIP_8821C = 15, + CHIP_8710B = 16, + CHIP_8192F = 17, + CHIP_8188GTV = 18, + CHIP_8822C = 19, } HAL_IC_TYPE_E; /* HAL_CHIP_TYPE_E */ @@ -112,6 +116,7 @@ typedef struct tag_HAL_VERSION { #define IS_8188E(version) ((GET_CVID_IC_TYPE(version) == CHIP_8188E) ? TRUE : FALSE) #define IS_8188F(version) ((GET_CVID_IC_TYPE(version) == CHIP_8188F) ? TRUE : FALSE) +#define IS_8188GTV(version) ((GET_CVID_IC_TYPE(version) == CHIP_8188GTV) ? TRUE : FALSE) #define IS_8192E(version) ((GET_CVID_IC_TYPE(version) == CHIP_8192E) ? TRUE : FALSE) #define IS_8812_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8812) ? TRUE : FALSE) #define IS_8821_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8821) ? TRUE : FALSE) @@ -120,8 +125,12 @@ typedef struct tag_HAL_VERSION { #define IS_8703B_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8703B) ? TRUE : FALSE) #define IS_8822B_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8822B) ? TRUE : FALSE) #define IS_8821C_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8821C) ? TRUE : FALSE) -#define IS_8723D_SERIES(version)\ - ((GET_CVID_IC_TYPE(version) == CHIP_8723D) ? TRUE : FALSE) +#define IS_8723D_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723D) ? TRUE : FALSE) +#define IS_8710B_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8710B) ? TRUE : FALSE) +#define IS_8822C_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8822C) ? TRUE : FALSE) + +#define IS_8192F_SERIES(version)\ + ((GET_CVID_IC_TYPE(version) == CHIP_8192F) ? TRUE : FALSE) /* HAL_CHIP_TYPE_E */ #define IS_TEST_CHIP(version) ((GET_CVID_CHIP_TYPE(version) == TEST_CHIP) ? TRUE : FALSE) #define IS_NORMAL_CHIP(version) ((GET_CVID_CHIP_TYPE(version) == NORMAL_CHIP) ? TRUE : FALSE) diff --git a/include/autoconf.h b/include/autoconf.h index d5de692..eb06853 100644 --- a/include/autoconf.h +++ b/include/autoconf.h @@ -55,6 +55,7 @@ #define CONFIG_EMBEDDED_FWIMG + #ifdef CONFIG_EMBEDDED_FWIMG #define LOAD_FW_HEADER_FROM_DRIVER #endif @@ -83,20 +84,23 @@ #define CONFIG_LPS #if defined(CONFIG_LPS) && defined(CONFIG_SUPPORT_USB_INT) + /* #define CONFIG_LPS_LCLK */ #endif #ifdef CONFIG_LPS_LCLK - #define CONFIG_XMIT_THREAD_MODE + /* #define CONFIG_XMIT_THREAD_MODE */ #endif #endif /* CONFIG_POWER_SAVING */ /*#define CONFIG_ANTENNA_DIVERSITY*/ - //#define CONFIG_CONCURRENT_MODE + + + /* #define CONFIG_CONCURRENT_MODE */ #ifdef CONFIG_CONCURRENT_MODE #define CONFIG_RUNTIME_PORT_SWITCH - #define CONFIG_SCAN_BACKOP + #define CONFIG_TSF_RESET_OFFLOAD /* For 2 PORT TSF SYNC. */ #endif @@ -150,6 +154,7 @@ /* #define CONFIG_TDLS_CH_SW */ /* Enable this flag only when we confirm that TDLS CH SW is supported in FW */ #endif + #define CONFIG_SKB_COPY /* for amsdu */ /* #define CONFIG_RTW_LED */ @@ -170,6 +175,7 @@ /* #define CONFIG_IOL_IOREG_CFG_DBG */ #endif + #define CONFIG_GLOBAL_UI_PID #define CONFIG_LAYER2_ROAMING @@ -185,9 +191,6 @@ #endif #define RTW_NOTCH_FILTER 0 /* 0:Disable, 1:Enable, */ -#define CONFIG_TX_MCAST2UNI /* Support IP multicast->unicast */ -/* #define CONFIG_CHECK_AC_LIFETIME */ /* Check packet lifetime of 4 ACs. */ - /* * Interface Related Config */ @@ -226,6 +229,7 @@ /* #define CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */ + /* * HAL Related Config */ @@ -234,12 +238,14 @@ #define SUPPORTED_BLOCK_IO + /* #define CONFIG_ONLY_ONE_OUT_EP_TO_LOW 0 */ #define CONFIG_OUT_EP_WIFI_MODE 0 #define ENABLE_USB_DROP_INCORRECT_OUT + #define DISABLE_BB_RF 0 /* #define RTL8191C_FPGA_NETWORKTYPE_ADHOC 0 */ @@ -253,6 +259,7 @@ #define MP_DRIVER 0 #endif + /* * Platform Related Config */ @@ -268,6 +275,7 @@ #endif #endif + #ifdef CONFIG_USB_TX_AGGREGATION /* #define CONFIG_TX_EARLY_MODE */ #endif @@ -284,8 +292,6 @@ #endif #endif -#define CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR - /* * Debug Related Config */ @@ -312,6 +318,8 @@ /* #define DBG_RX_SIGNAL_DISPLAY_PROCESSING */ /* #define DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED "jeff-ap" */ + + /* #define DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE */ /* #define DBG_ROAMING_TEST */ diff --git a/include/basic_types.h b/include/basic_types.h index c0737f5..45e5131 100644 --- a/include/basic_types.h +++ b/include/basic_types.h @@ -77,24 +77,9 @@ #include #include #include - #define IN - #define OUT - #define VOID void - #define NDIS_OID uint - #define NDIS_STATUS uint typedef signed int sint; - #ifndef PVOID - typedef void *PVOID; - /* #define PVOID (void *) */ - #endif - - #define UCHAR u8 - #define USHORT u16 - #define UINT u32 - #define ULONG u32 - #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)) typedef _Bool bool; @@ -110,37 +95,8 @@ enum { typedef __kernel_ssize_t SSIZE_T; #define FIELD_OFFSET(s, field) ((SSIZE_T)&((s *)(0))->field) -#define u1Byte u8 -#define pu1Byte u8* - -#define u2Byte u16 -#define pu2Byte u16* - -#define u4Byte u32 -#define pu4Byte u32* - -#define u8Byte u64 -#define pu8Byte u64* - -#define s1Byte s8 -#define ps1Byte s8* - -#define s2Byte s16 -#define ps2Byte s16* - -#define s4Byte s32 -#define ps4Byte s32* - -#define s8Byte s64 -#define ps8Byte s64* - -#define UCHAR u8 -#define USHORT u16 -#define UINT u32 -#define ULONG u32 -#define PULONG u32* - -#endif +#define NDIS_OID uint +#endif /*PLATFORM_LINUX*/ #ifdef PLATFORM_FREEBSD @@ -160,21 +116,8 @@ enum { typedef signed long long s64; typedef unsigned long long u64; - #define IN - #define OUT - #define VOID void - #define NDIS_OID uint - #define NDIS_STATUS uint - #ifndef PVOID - typedef void *PVOID; - /* #define PVOID (void *) */ - #endif typedef u32 dma_addr_t; - #define UCHAR u8 - #define USHORT u16 - #define UINT u32 - #define ULONG u32 typedef void (*proc_t)(void *); diff --git a/include/cmn_info/rtw_sta_info.h b/include/cmn_info/rtw_sta_info.h index afc07aa..d356737 100644 --- a/include/cmn_info/rtw_sta_info.h +++ b/include/cmn_info/rtw_sta_info.h @@ -89,6 +89,7 @@ enum rf_type { }; enum bb_path { + BB_PATH_NON = 0, BB_PATH_A = 0x00000001, BB_PATH_B = 0x00000002, BB_PATH_C = 0x00000004, @@ -107,6 +108,7 @@ enum bb_path { BB_PATH_BCD = (BB_PATH_B | BB_PATH_C | BB_PATH_D), BB_PATH_ABCD = (BB_PATH_A | BB_PATH_B | BB_PATH_C | BB_PATH_D), + BB_PATH_AUTO = 0xff /*for path diversity*/ }; enum rf_path { @@ -121,11 +123,22 @@ enum rf_path { RF_PATH_BD, RF_PATH_CD, RF_PATH_ABC, + RF_PATH_ABD, RF_PATH_ACD, RF_PATH_BCD, RF_PATH_ABCD, }; +enum rf_syn { + RF_SYN0 = 0, + RF_SYN1 = 1, +}; + +enum rfc_mode { + rfc_4x4 = 0, + rfc_2x2 = 1, +}; + enum wireless_set { WIRELESS_CCK = 0x00000001, WIRELESS_OFDM = 0x00000002, @@ -159,55 +172,56 @@ struct rssi_info { }; struct ra_sta_info { - u8 rate_id; /*ratr_idx*/ - u8 rssi_level; - - /*New*/ - u8 is_first_connect:1; /*CE: ra_rpt_linked, AP: H2C_rssi_rpt*/ - u8 is_support_sgi:1; /*driver*/ - u8 is_vht_enable:2; /*driver*/ - u8 disable_ra:1; /*driver*/ - u8 disable_pt:1; /*driver*/ /*remove is_disable_power_training*/ - u8 txrx_state:2; /*0: Tx, 1:Rx, 2:bi-direction*/ - u8 is_noisy:1; - - u8 curr_tx_rate; /*FW->Driver*/ - enum channel_width ra_bw_mode; /*max bandwidth, for RA only*/ - enum channel_width curr_tx_bw; /*FW->Driver*/ - u8 curr_retry_ratio; /*FW->Driver*/ - + u8 rate_id; /*[PHYDM] ratr_idx*/ + u8 rssi_level; /*[PHYDM]*/ + u8 is_first_connect:1; /*[PHYDM] CE: ra_rpt_linked, AP: H2C_rssi_rpt*/ + u8 is_support_sgi:1; /*[driver]*/ + u8 is_vht_enable:2; /*[driver]*/ + u8 disable_ra:1; /*[driver]*/ + u8 disable_pt:1; /*[driver] remove is_disable_power_training*/ + u8 txrx_state:2; /*[PHYDM] 0: Tx, 1:Rx, 2:bi-direction*/ + u8 is_noisy:1; /*[PHYDM]*/ + u8 curr_tx_rate; /*[PHYDM] FW->Driver*/ + enum channel_width ra_bw_mode; /*[Driver] max bandwidth, for RA only*/ + enum channel_width curr_tx_bw; /*[PHYDM] FW->Driver*/ + u8 curr_retry_ratio; /*[PHYDM] FW->Driver*/ u64 ramask; }; struct dtp_info { u8 dyn_tx_power; /*Dynamic Tx power offset*/ + u8 last_tx_power; u8 sta_tx_high_power_lvl:4; u8 sta_last_dtp_lvl:4; }; struct cmn_sta_info { - u16 dm_ctrl; - enum channel_width bw_mode; /*max bandwidth*/ - u8 mac_id; - u8 mac_addr[6]; - u16 aid; - enum rf_type mimo_type; /*sta XTXR*/ - struct rssi_info rssi_stat; - struct ra_sta_info ra_info; - u16 tx_moving_average_tp; /*tx average MBps*/ - u16 rx_moving_average_tp; /*rx average MBps*/ - u8 stbc_en:2; /*Driver : really use stbc!!*/ - u8 ldpc_en:2; - enum wireless_set support_wireless_set; + u16 dm_ctrl; /*[Driver]*/ + enum channel_width bw_mode; /*[Driver] max support BW*/ + u8 mac_id; /*[Driver]*/ + u8 mac_addr[6]; /*[Driver]*/ + u16 aid; /*[Driver]*/ + enum rf_type mimo_type; /*[Driver] sta XTXR*/ + struct rssi_info rssi_stat; /*[PHYDM]*/ + struct ra_sta_info ra_info; /*[Driver&PHYDM]*/ + u16 tx_moving_average_tp; /*[Driver] tx average MBps*/ + u16 rx_moving_average_tp; /*[Driver] rx average MBps*/ + u8 stbc_en:2; /*[Driver] really transmitt STBC*/ + u8 ldpc_en:2; /*[Driver] really transmitt LDPC*/ + enum wireless_set support_wireless_set;/*[Driver]*/ #ifdef CONFIG_BEAMFORMING - struct bf_cmn_info bf_info; + struct bf_cmn_info bf_info; /*[Driver]*/ #endif - u8 sm_ps:2; - struct dtp_info dtp_stat; /*Dynamic Tx power offset*/ + u8 sm_ps:2; /*[Driver]*/ + struct dtp_info dtp_stat; /*[PHYDM] Dynamic Tx power offset*/ /*u8 pw2cca_over_TH_cnt;*/ /*u8 total_pw2cca_cnt;*/ }; +struct phydm_phyinfo_fw_struct { + u8 rx_rssi[4]; /* RSSI in 0~100 index */ +}; + struct phydm_phyinfo_struct { u8 rx_pwdb_all; u8 signal_quality; /* OFDM: signal_quality=rx_mimo_signal_quality[0], CCK: signal qualityin 0-100 index. */ @@ -222,9 +236,10 @@ struct phydm_phyinfo_struct { u8 signal_strength; /* in 0-100 index. */ s8 rx_pwr[4]; /* per-path's pwdb */ s8 rx_snr[4]; /* per-path's SNR */ + u8 ant_idx[4]; /*per-path's antenna index*/ /*ODM_PHY_STATUS_NEW_TYPE_SUPPORT*/ u8 rx_count:2; /* RX path counter---*/ - u8 band_width:2; + u8 band_width:3; u8 rxsc:4; /* sub-channel---*/ u8 channel; /* channel number---*/ u8 is_mu_packet:1; /* is MU packet or not---boolean*/ diff --git a/include/custom_gpio.h b/include/custom_gpio.h index 49411b6..3c67735 100644 --- a/include/custom_gpio.h +++ b/include/custom_gpio.h @@ -18,18 +18,6 @@ #include #include -#ifdef PLATFORM_OS_XP - #include -#endif - -#ifdef PLATFORM_OS_CE - #include -#endif - -#ifdef PLATFORM_LINUX - #include -#endif - typedef enum cust_gpio_modes { WLAN_PWDN_ON, WLAN_PWDN_OFF, diff --git a/include/drv_conf.h b/include/drv_conf.h index be5e62a..b5b6848 100644 --- a/include/drv_conf.h +++ b/include/drv_conf.h @@ -17,11 +17,6 @@ #include "autoconf.h" #include "hal_ic_cfg.h" -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) - - #error "Shall be Linux or Windows, but not both!\n" - -#endif #define CONFIG_RSSI_PRIORITY #ifdef CONFIG_RTW_REPEATER_SON #ifndef CONFIG_AP @@ -115,12 +110,48 @@ #define CONFIG_USB_VENDOR_REQ_MUTEX #endif +#if defined(CONFIG_DFS_SLAVE_WITH_RADAR_DETECT) && !defined(CONFIG_DFS_MASTER) + #define CONFIG_DFS_MASTER +#endif + #if !defined(CONFIG_AP_MODE) && defined(CONFIG_DFS_MASTER) - #warning "undef CONFIG_DFS_MASTER because CONFIG_AP_MODE is not defined" - #undef CONFIG_DFS_MASTER + #error "enable CONFIG_DFS_MASTER without CONFIG_AP_MODE" +#endif + +#ifdef CONFIG_WIFI_MONITOR + /* #define CONFIG_MONITOR_MODE_XMIT */ +#endif + +#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL + #ifndef CONFIG_WIFI_MONITOR + #define CONFIG_WIFI_MONITOR + #endif + #ifndef CONFIG_MONITOR_MODE_XMIT + #define CONFIG_MONITOR_MODE_XMIT + #endif + #ifdef CONFIG_POWER_SAVING + #undef CONFIG_POWER_SAVING + #endif +#endif + +#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA + #ifdef CONFIG_POWER_SAVING + #undef CONFIG_POWER_SAVING + #endif + #ifdef CONFIG_BEAMFORMING + #undef CONFIG_BEAMFORMING + #endif +#endif + +#ifdef CONFIG_AP_MODE + #define CONFIG_TX_MCAST2UNI /* AP mode support IP multicast->unicast */ #endif #ifdef CONFIG_RTW_MESH + #ifndef CONFIG_RTW_MESH_ACNODE_PREVENT + #define CONFIG_RTW_MESH_ACNODE_PREVENT 1 + #endif + #ifndef CONFIG_RTW_MESH_OFFCH_CAND #define CONFIG_RTW_MESH_OFFCH_CAND 1 #endif @@ -132,6 +163,9 @@ #ifndef CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST #define CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST 1 #endif + #ifndef CONFIG_RTW_MESH_CTO_MGATE_CARRIER + #define CONFIG_RTW_MESH_CTO_MGATE_CARRIER CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST + #endif #ifndef CONFIG_RTW_MPM_TX_IES_SYNC_BSS #define CONFIG_RTW_MPM_TX_IES_SYNC_BSS 1 @@ -155,6 +189,22 @@ #define RTW_SCAN_SPARSE_BG 0 #define RTW_SCAN_SPARSE_ROAMING_ACTIVE 1 +#ifndef CONFIG_TX_AC_LIFETIME +#define CONFIG_TX_AC_LIFETIME 1 +#endif +#ifndef CONFIG_TX_ACLT_FLAGS +#define CONFIG_TX_ACLT_FLAGS 0x00 +#endif +#ifndef CONFIG_TX_ACLT_CONF_DEFAULT +#define CONFIG_TX_ACLT_CONF_DEFAULT {0x0, 1024 * 1000, 1024 * 1000} +#endif +#ifndef CONFIG_TX_ACLT_CONF_AP_M2U +#define CONFIG_TX_ACLT_CONF_AP_M2U {0xF, 256 * 1000, 256 * 1000} +#endif +#ifndef CONFIG_TX_ACLT_CONF_MESH +#define CONFIG_TX_ACLT_CONF_MESH {0xF, 256 * 1000, 256 * 1000} +#endif + #ifndef CONFIG_RTW_HIQ_FILTER #define CONFIG_RTW_HIQ_FILTER 1 #endif @@ -167,14 +217,6 @@ #define CONFIG_RTW_ADAPTIVITY_MODE 0 #endif -#ifndef CONFIG_RTW_ADAPTIVITY_DML - #define CONFIG_RTW_ADAPTIVITY_DML 0 -#endif - -#ifndef CONFIG_RTW_ADAPTIVITY_DC_BACKOFF - #define CONFIG_RTW_ADAPTIVITY_DC_BACKOFF 2 -#endif - #ifndef CONFIG_RTW_ADAPTIVITY_TH_L2H_INI #define CONFIG_RTW_ADAPTIVITY_TH_L2H_INI 0 #endif @@ -227,8 +269,9 @@ #define CONFIG_TXPWR_LIMIT_EN 1 #endif -#if !defined(CONFIG_TXPWR_LIMIT) && CONFIG_TXPWR_LIMIT_EN - #define CONFIG_TXPWR_LIMIT +#if !CONFIG_TXPWR_LIMIT && CONFIG_TXPWR_LIMIT_EN + #undef CONFIG_TXPWR_LIMIT + #define CONFIG_TXPWR_LIMIT 1 #endif #ifdef CONFIG_RTW_IPCAM_APPLICATION @@ -237,8 +280,11 @@ #define CONFIG_RTW_CUSTOMIZE_BEEDCA 0x0000431C #define CONFIG_RTW_CUSTOMIZE_BWMODE 0x00 #define CONFIG_RTW_CUSTOMIZE_RLSTA 0x7 +#if defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8822B) + #define CONFIG_RTW_TX_2PATH_EN /* mutually incompatible with STBC_TX & Beamformer */ #endif - +#endif +/*#define CONFIG_EXTEND_LOWRATE_TXOP */ #ifndef CONFIG_RTW_RX_AMPDU_SZ_LIMIT_1SS #define CONFIG_RTW_RX_AMPDU_SZ_LIMIT_1SS {0xFF, 0xFF, 0xFF, 0xFF} @@ -320,11 +366,11 @@ #endif #if (CONFIG_IFACE_NUMBER == 0) - #error "CONFIG_IFACE_NUMBER cound not equel to 0 !!" + #error "CONFIG_IFACE_NUMBER cound not be 0 !!" #endif -#if (CONFIG_IFACE_NUMBER > 3) - #error "Not support over 3 interfaces yet !!" +#if (CONFIG_IFACE_NUMBER > 4) + #error "Not support over 4 interfaces yet !!" #endif #if (CONFIG_IFACE_NUMBER > 8) /*IFACE_ID_MAX*/ @@ -342,10 +388,29 @@ #endif #ifdef CONFIG_AP_MODE + #define CONFIG_SUPPORT_MULTI_BCN + #define CONFIG_SWTIMER_BASED_TXBCN - /*#define CONFIG_FW_BASED_BCN*/ - #endif -#endif + + #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) /* || defined(CONFIG_RTL8822C)*/ + #define CONFIG_FW_HANDLE_TXBCN + + #ifdef CONFIG_FW_HANDLE_TXBCN + #ifdef CONFIG_SWTIMER_BASED_TXBCN + #undef CONFIG_SWTIMER_BASED_TXBCN + #endif + + #define CONFIG_LIMITED_AP_NUM 4 + #endif + #endif /*defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) */ /*|| defined(CONFIG_RTL8822C)*/ + #endif /*CONFIG_AP_MODE*/ + + #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) + #define CONFIG_CLIENT_PORT_CFG + #define CONFIG_NEW_NETDEV_HDL + #endif/*defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)*/ + +#endif/*(CONFIG_IFACE_NUMBER > 2)*/ #define MACID_NUM_SW_LIMIT 32 #define SEC_CAM_ENT_NUM_SW_LIMIT 32 @@ -354,10 +419,18 @@ #define CONFIG_IEEE80211_BAND_5GHZ #endif -#if defined(CONFIG_WOWLAN) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)) +#if defined(CONFIG_WOWLAN) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822C)) #define CONFIG_WOW_PATTERN_HW_CAM #endif +#ifndef CONFIG_TSF_UPDATE_PAUSE_FACTOR +#define CONFIG_TSF_UPDATE_PAUSE_FACTOR 200 +#endif + +#ifndef CONFIG_TSF_UPDATE_RESTORE_FACTOR +#define CONFIG_TSF_UPDATE_RESTORE_FACTOR 5 +#endif + /* Mark CONFIG_DEAUTH_BEFORE_CONNECT by Arvin 2015/07/20 If the failure of Wi-Fi connection is due to some irregular disconnection behavior (like unplug dongle, @@ -412,4 +485,71 @@ #define CONFIG_IPS #endif #endif + +/* IPS */ +#ifndef RTW_IPS_MODE + #if defined(CONFIG_IPS) + #define RTW_IPS_MODE 1 + #else + #define RTW_IPS_MODE 0 + #endif +#endif /* !RTW_IPS_MODE */ + +#if (RTW_IPS_MODE > 1 || RTW_IPS_MODE < 0) + #error "The CONFIG_IPS_MODE value is wrong. Please follow HowTo_enable_the_power_saving_functionality.pdf.\n" +#endif + +/* LPS */ +#ifndef RTW_LPS_MODE + #if defined(CONFIG_LPS_PG) || defined(CONFIG_LPS_PG_DDMA) + #define RTW_LPS_MODE 3 + #elif defined(CONFIG_LPS_LCLK) + #define RTW_LPS_MODE 2 + #elif defined(CONFIG_LPS) + #define RTW_LPS_MODE 1 + #else + #define RTW_LPS_MODE 0 + #endif +#endif /* !RTW_LPS_MODE */ + +#if (RTW_LPS_MODE > 3 || RTW_LPS_MODE < 0) + #error "The CONFIG_LPS_MODE value is wrong. Please follow HowTo_enable_the_power_saving_functionality.pdf.\n" +#endif + +/* WOW LPS */ +#ifndef RTW_WOW_LPS_MODE + #if defined(CONFIG_LPS_PG) || defined(CONFIG_LPS_PG_DDMA) + #define RTW_WOW_LPS_MODE 3 + #elif defined(CONFIG_LPS_LCLK) + #define RTW_WOW_LPS_MODE 2 + #elif defined(CONFIG_LPS) + #define RTW_WOW_LPS_MODE 1 + #else + #define RTW_WOW_LPS_MODE 0 + #endif +#endif /* !RTW_WOW_LPS_MODE */ + +#if (RTW_WOW_LPS_MODE > 3 || RTW_WOW_LPS_MODE < 0) + #error "The RTW_WOW_LPS_MODE value is wrong. Please follow HowTo_enable_the_power_saving_functionality.pdf.\n" +#endif + +#ifdef RTW_REDUCE_SCAN_SWITCH_CH_TIME +#ifndef CONFIG_RTL8822B + #error "Only 8822B support RTW_REDUCE_SCAN_SWITCH_CH_TIME" +#endif + #ifndef RTW_CHANNEL_SWITCH_OFFLOAD + #define RTW_CHANNEL_SWITCH_OFFLOAD + #endif +#endif + +#define CONFIG_RTW_TPT_MODE + +#ifdef CONFIG_PCI_BCN_POLLING +#define CONFIG_BCN_ICF +#endif + +#ifndef CONFIG_PCI_MSI +#define CONFIG_RTW_PCI_MSI_DISABLE +#endif + #endif /* __DRV_CONF_H__ */ diff --git a/include/drv_types.h b/include/drv_types.h index e902be8..780033b 100644 --- a/include/drv_types.h +++ b/include/drv_types.h @@ -18,6 +18,7 @@ --------------------------------------------------------------------------------*/ + #ifndef __DRV_TYPES_H__ #define __DRV_TYPES_H__ @@ -59,6 +60,7 @@ typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER; #include #include #include +#include "../core/rtw_chplan.h" #ifdef CONFIG_80211N_HT #include @@ -68,10 +70,6 @@ typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER; #include #endif -#ifdef CONFIG_INTEL_WIDI - #include -#endif - #include #include #include @@ -89,7 +87,7 @@ typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER; #include #include #include -#include +#include #include #include "../hal/hal_dm.h" #include @@ -100,7 +98,6 @@ typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER; #include #include #include -#include #include #include #include @@ -196,6 +193,11 @@ struct registry_priv { u8 power_mgnt; u8 ips_mode; u8 lps_level; + u8 lps_chk_by_tp; +#ifdef CONFIG_WOWLAN + u8 wow_power_mgnt; + u8 wow_lps_level; +#endif /* CONFIG_WOWLAN */ u8 smart_ps; #ifdef CONFIG_WMMPS_STA u8 wmm_smart_ps; @@ -229,6 +231,11 @@ struct registry_priv { WLAN_BSSID_EX dev_network; +#if CONFIG_TX_AC_LIFETIME + u8 tx_aclt_flags; + struct tx_aclt_conf_t tx_aclt_confs[TX_ACLT_CONF_NUM]; +#endif + u8 tx_bw_mode; #ifdef CONFIG_AP_MODE u8 bmc_tx_rate; @@ -332,7 +339,7 @@ struct registry_priv { u8 pll_ref_clk_sel; /* define for tx power adjust */ -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT u8 RegEnableTxPowerLimit; #endif u8 RegEnableTxPowerByRate; @@ -343,6 +350,9 @@ struct registry_priv { s8 target_tx_pwr_5g[RF_PATH_MAX][RATE_SECTION_NUM - 1]; #endif + u8 tsf_update_pause_factor; + u8 tsf_update_restore_factor; + s8 TxBBSwing_2G; s8 TxBBSwing_5G; u8 AmplifierType_2G; @@ -366,8 +376,6 @@ struct registry_priv { u8 hiq_filter; u8 adaptivity_en; u8 adaptivity_mode; - u8 adaptivity_dml; - u8 adaptivity_dc_backoff; s8 adaptivity_th_l2h_ini; s8 adaptivity_th_edcca_hl_diff; @@ -402,6 +410,7 @@ struct registry_priv { s8 rtw_mcc_policy_table_idx; u8 rtw_mcc_duration; u8 rtw_mcc_enable_runtime_duration; + u8 rtw_mcc_phydm_offload; #endif /* CONFIG_MCC_MODE */ #ifdef CONFIG_RTW_NAPI @@ -416,13 +425,14 @@ struct registry_priv { #ifdef CONFIG_WOWLAN u8 wakeup_event; + u8 suspend_type; #endif #ifdef CONFIG_SUPPORT_TRX_SHARED u8 trx_share_mode; #endif u8 check_hw_status; - + u8 wowlan_sta_mix_mode; u32 pci_aspm_config; u8 iqk_fw_offload; @@ -446,10 +456,27 @@ struct registry_priv { u8 dyn_soml_period; u8 dyn_soml_delay; #endif +#ifdef CONFIG_FW_HANDLE_TXBCN + u8 fw_tbtt_rpt; +#endif + +#ifdef DBG_LA_MODE + u8 la_mode_en; +#endif + u32 phydm_ability; + u32 halrf_ability; +#ifdef CONFIG_TDMADIG + u8 tdmadig_en; + u8 tdmadig_mode; + u8 tdmadig_dynamic; +#endif/*CONFIG_TDMADIG*/ +#ifdef CONFIG_RTW_MESH + u8 peer_alive_based_preq; +#endif }; /* For registry parameters */ -#define RGTRY_OFT(field) ((ULONG)FIELD_OFFSET(struct registry_priv, field)) +#define RGTRY_OFT(field) ((u32)FIELD_OFFSET(struct registry_priv, field)) #define RGTRY_SZ(field) sizeof(((struct registry_priv *) 0)->field) #define GetRegAmplifierType2G(_Adapter) (_Adapter->registrypriv.AmplifierType_2G) @@ -463,13 +490,19 @@ struct registry_priv { #define GetRegGLNAType(_Adapter) (_Adapter->registrypriv.GLNA_Type) #define GetRegPowerTrackingType(_Adapter) (_Adapter->registrypriv.PowerTracking_Type) -#define BSSID_OFT(field) ((ULONG)FIELD_OFFSET(WLAN_BSSID_EX, field)) +#define WOWLAN_IS_STA_MIX_MODE(_Adapter) (_Adapter->registrypriv.wowlan_sta_mix_mode) +#define BSSID_OFT(field) ((u32)FIELD_OFFSET(WLAN_BSSID_EX, field)) #define BSSID_SZ(field) sizeof(((PWLAN_BSSID_EX) 0)->field) #define BW_MODE_2G(bw_mode) ((bw_mode) & 0x0F) #define BW_MODE_5G(bw_mode) ((bw_mode) >> 4) +#ifdef CONFIG_80211N_HT #define REGSTY_BW_2G(regsty) BW_MODE_2G((regsty)->bw_mode) #define REGSTY_BW_5G(regsty) BW_MODE_5G((regsty)->bw_mode) +#else +#define REGSTY_BW_2G(regsty) CHANNEL_WIDTH_20 +#define REGSTY_BW_5G(regsty) CHANNEL_WIDTH_20 +#endif #define REGSTY_IS_BW_2G_SUPPORT(regsty, bw) (REGSTY_BW_2G((regsty)) >= (bw)) #define REGSTY_IS_BW_5G_SUPPORT(regsty, bw) (REGSTY_BW_5G((regsty)) >= (bw)) @@ -691,7 +724,7 @@ struct rtw_traffic_statistics { u64 tx_drop; u64 cur_tx_bytes; u64 last_tx_bytes; - u32 cur_tx_tp; /* Tx throughput in MBps. */ + u32 cur_tx_tp; /* Tx throughput in Mbps. */ /* rx statistics */ u64 rx_bytes; @@ -699,7 +732,7 @@ struct rtw_traffic_statistics { u64 rx_drop; u64 cur_rx_bytes; u64 last_rx_bytes; - u32 cur_rx_tp; /* Rx throughput in MBps. */ + u32 cur_rx_tp; /* Rx throughput in Mbps. */ }; #define SEC_CAP_CHK_BMC BIT0 @@ -757,6 +790,15 @@ struct macid_bmp { #endif }; +#ifdef CONFIG_CLIENT_PORT_CFG +struct clt_port_t{ + _lock lock; + u8 bmp; + s8 num; +}; +#define get_clt_num(adapter) (adapter_to_dvobj(adapter)->clt_port.num) +#endif + struct macid_ctl_t { _lock lock; u8 num; @@ -772,6 +814,7 @@ struct macid_ctl_t { u8 vht_en[MACID_NUM_SW_LIMIT]; u32 rate_bmp0[MACID_NUM_SW_LIMIT]; u32 rate_bmp1[MACID_NUM_SW_LIMIT]; + u8 op_num[H2C_MSR_ROLE_MAX]; /* number of macid having h2c_msr's OPMODE = 1 for specific ROLE */ struct sta_info *sta[MACID_NUM_SW_LIMIT]; /* corresponding stainfo when macid is not shared */ @@ -857,7 +900,7 @@ struct rf_ctl_t { u8 highest_ht_rate_bw_bmp; u8 highest_vht_rate_bw_bmp; -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT _mutex txpwr_lmt_mutex; _list reg_exc_list; u8 regd_exc_num; @@ -874,9 +917,13 @@ struct rf_ctl_t { u8 ch_sel_same_band_prefer; +#ifdef CONFIG_DFS + u8 csa_ch; + #ifdef CONFIG_DFS_MASTER + _timer radar_detect_timer; bool radar_detect_by_others; - u8 dfs_master_enabled; + u8 radar_detect_enabled; bool radar_detected; u8 radar_detect_ch; @@ -887,12 +934,16 @@ struct rf_ctl_t { systime cac_end_time; u8 cac_force_stop; +#ifdef CONFIG_DFS_SLAVE_WITH_RADAR_DETECT + u8 dfs_slave_with_rd; +#endif u8 dfs_ch_sel_d_flags; - u8 dbg_dfs_master_fake_radar_detect_cnt; - u8 dbg_dfs_master_radar_detect_trigger_non; - u8 dbg_dfs_master_choose_dfs_ch_first; -#endif + u8 dbg_dfs_fake_radar_detect_cnt; + u8 dbg_dfs_radar_detect_trigger_non; + u8 dbg_dfs_choose_dfs_ch_first; +#endif /* CONFIG_DFS_MASTER */ +#endif /* CONFIG_DFS */ }; #define RTW_CAC_STOPPED 0 @@ -900,12 +951,20 @@ struct rf_ctl_t { #define IS_CAC_STOPPED(rfctl) ((rfctl)->cac_end_time == RTW_CAC_STOPPED) #define IS_CH_WAITING(rfctl) (!IS_CAC_STOPPED(rfctl) && rtw_time_after((rfctl)->cac_end_time, rtw_get_current_time())) #define IS_UNDER_CAC(rfctl) (IS_CH_WAITING(rfctl) && rtw_time_after(rtw_get_current_time(), (rfctl)->cac_start_time)) +#define IS_RADAR_DETECTED(rfctl) ((rfctl)->radar_detected) #else #define IS_CAC_STOPPED(rfctl) 1 #define IS_CH_WAITING(rfctl) 0 #define IS_UNDER_CAC(rfctl) 0 +#define IS_RADAR_DETECTED(rfctl) 0 #endif /* CONFIG_DFS_MASTER */ +#ifdef CONFIG_DFS_SLAVE_WITH_RADAR_DETECT +#define IS_DFS_SLAVE_WITH_RD(rfctl) ((rfctl)->dfs_slave_with_rd) +#else +#define IS_DFS_SLAVE_WITH_RD(rfctl) 0 +#endif + #ifdef CONFIG_MBSSID_CAM #define TOTAL_MBID_CAM_NUM 8 #define INVALID_CAM_ID 0xFF @@ -944,6 +1003,21 @@ struct halmacpriv { }; #endif /* RTW_HALMAC */ +#ifdef CONFIG_FW_MULTI_PORT_SUPPORT +/*info for H2C-0x2C*/ +struct dft_info { + u8 port_id; + u8 mac_id; +}; +#endif + +#ifdef CONFIG_HW_P0_TSF_SYNC +struct tsf_info { + u8 sync_port;/*port_x's tsf sync to port_0*/ + u8 offset; /*tsf timer offset*/ +}; +#endif + struct dvobj_priv { /*-------- below is common data --------*/ u8 chip_type; @@ -960,6 +1034,8 @@ struct dvobj_priv { _mutex hw_init_mutex; _mutex h2c_fwcmd_mutex; + _mutex ioctrl_mutex; + #ifdef CONFIG_RTW_CUSTOMER_STR _mutex customer_str_mutex; struct submit_ctx *customer_str_sctx; @@ -973,6 +1049,10 @@ struct dvobj_priv { _mutex sd_indirect_access_mutex; #endif +#ifdef CONFIG_SYSON_INDIRECT_ACCESS + _mutex syson_indirect_access_mutex; /* System On Reg R/W */ +#endif + unsigned char oper_channel; /* saved channel info when call set_channel_bw */ unsigned char oper_bwmode; unsigned char oper_ch_offset;/* PRIME_CHNL_OFFSET */ @@ -983,14 +1063,27 @@ struct dvobj_priv { struct mi_state iface_state; #ifdef CONFIG_AP_MODE - u8 nr_ap_if; /* total interface s number of ap/go mode. */ - u16 inter_bcn_space; /* unit:ms */ + #ifdef CONFIG_SUPPORT_MULTI_BCN + u8 nr_ap_if; /* total interface number of ap /go /mesh / nan mode. */ + u16 inter_bcn_space; /* unit:ms */ _queue ap_if_q; -#ifdef CONFIG_RTW_REPEATER_SON + u8 vap_map; + u8 fw_bcn_offload; + u8 vap_tbtt_rpt_map; + #endif /*CONFIG_SUPPORT_MULTI_BCN*/ + #ifdef CONFIG_RTW_REPEATER_SON struct rtw_rson_struct rson_data; + #endif +#endif +#ifdef CONFIG_CLIENT_PORT_CFG + struct clt_port_t clt_port; #endif +#ifdef CONFIG_HW_P0_TSF_SYNC + struct tsf_info p0_tsf; #endif + systime periodic_tsf_update_etime; + _timer periodic_tsf_update_end_timer; struct macid_ctl_t macid_ctl; @@ -1004,6 +1097,12 @@ struct dvobj_priv { struct rf_ctl_t rf_ctl; +#if CONFIG_TX_AC_LIFETIME + struct tx_aclt_conf_t tx_aclt_force_val; + u8 tx_aclt_flags; + struct tx_aclt_conf_t tx_aclt_confs[TX_ACLT_CONF_NUM]; +#endif + /* For 92D, DMDP have 2 interface. */ u8 InterfaceNumber; u8 NumInterfaces; @@ -1037,7 +1136,7 @@ struct dvobj_priv { _timer txbcn_timer; #endif _timer dynamic_chk_timer; /* dynamic/periodic check timer */ - + #ifdef CONFIG_RTW_NAPI_DYNAMIC u8 en_napi_dynamic; #endif /* CONFIG_RTW_NAPI_DYNAMIC */ @@ -1048,8 +1147,14 @@ struct dvobj_priv { #endif /* RTW_HALMAC */ #ifdef CONFIG_FW_MULTI_PORT_SUPPORT - u8 default_port_id; + /*info for H2C-0x2C*/ + struct dft_info dft; #endif + +#ifdef CONFIG_RTW_WIFI_HAL + u32 nodfs; +#endif + /*-------- below is for SDIO INTERFACE --------*/ #ifdef INTF_DATA @@ -1082,31 +1187,6 @@ struct dvobj_priv { u8 *usb_vendor_req_buf; #endif -#ifdef PLATFORM_WINDOWS - /* related device objects */ - PDEVICE_OBJECT pphysdevobj;/* pPhysDevObj; */ - PDEVICE_OBJECT pfuncdevobj;/* pFuncDevObj; */ - PDEVICE_OBJECT pnextdevobj;/* pNextDevObj; */ - - u8 nextdevstacksz;/* unsigned char NextDeviceStackSize; */ /* = (CHAR)CEdevice->pUsbDevObj->StackSize + 1; */ - - /* urb for control diescriptor request */ - -#ifdef PLATFORM_OS_XP - struct _URB_CONTROL_DESCRIPTOR_REQUEST descriptor_urb; - PUSB_CONFIGURATION_DESCRIPTOR pconfig_descriptor;/* UsbConfigurationDescriptor; */ -#endif - -#ifdef PLATFORM_OS_CE - WCHAR active_path[MAX_ACTIVE_REG_PATH]; /* adapter regpath */ - USB_EXTENSION usb_extension; - - _nic_hdl pipehdls_r8192c[0x10]; -#endif - - u32 config_descriptor_len;/* ULONG UsbConfigurationDescriptorLength; */ -#endif/* PLATFORM_WINDOWS */ - #ifdef PLATFORM_LINUX struct usb_interface *pusbintf; struct usb_device *pusbdev; @@ -1172,6 +1252,15 @@ struct dvobj_priv { #ifdef CONFIG_MCC_MODE struct mcc_obj_priv mcc_objpriv; #endif /*CONFIG_MCC_MODE */ + +#ifdef CONFIG_RTW_TPT_MODE + u8 tpt_mode; /* RTK T/P Testing Mode, 0:default mode */ + u32 edca_be_ul; + u32 edca_be_dl; +#endif + /* also for RTK T/P Testing Mode */ + u8 scan_deny; + }; #define DEV_STA_NUM(_dvobj) MSTATE_STA_NUM(&((_dvobj)->iface_state)) @@ -1185,6 +1274,9 @@ struct dvobj_priv { #define DEV_ADHOC_LD_NUM(_dvobj) MSTATE_ADHOC_LD_NUM(&((_dvobj)->iface_state)) #define DEV_MESH_NUM(_dvobj) MSTATE_MESH_NUM(&((_dvobj)->iface_state)) #define DEV_MESH_LD_NUM(_dvobj) MSTATE_MESH_LD_NUM(&((_dvobj)->iface_state)) +#define DEV_P2P_DV_NUM(_dvobj) MSTATE_P2P_DV_NUM(&((_dvobj)->iface_state)) +#define DEV_P2P_GC_NUM(_dvobj) MSTATE_P2P_GC_NUM(&((_dvobj)->iface_state)) +#define DEV_P2P_GO_NUM(_dvobj) MSTATE_P2P_GO_NUM(&((_dvobj)->iface_state)) #define DEV_SCAN_NUM(_dvobj) MSTATE_SCAN_NUM(&((_dvobj)->iface_state)) #define DEV_WPS_NUM(_dvobj) MSTATE_WPS_NUM(&((_dvobj)->iface_state)) #define DEV_ROCH_NUM(_dvobj) MSTATE_ROCH_NUM(&((_dvobj)->iface_state)) @@ -1224,7 +1316,7 @@ static inline void dev_clr_drv_stopped(struct dvobj_priv *dvobj) #define dev_is_drv_stopped(dvobj) (ATOMIC_READ(&dvobj->bDriverStopped) == _TRUE) #ifdef PLATFORM_LINUX -static struct device *dvobj_to_dev(struct dvobj_priv *dvobj) +static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj) { /* todo: get interface type from dvobj and the return the dev accordingly */ #ifdef RTW_DVOBJ_CHIP_HW_TYPE @@ -1259,6 +1351,19 @@ enum _hw_port { MAX_HW_PORT, }; +#ifdef CONFIG_CLIENT_PORT_CFG +enum _client_port { + CLT_PORT0 = HW_PORT1, + CLT_PORT1 = HW_PORT2, + CLT_PORT2 = HW_PORT3, + CLT_PORT3 = HW_PORT4, + CLT_PORT_INVALID = HW_PORT0, +}; + +#define MAX_CLIENT_PORT_NUM 4 +#define get_clt_port(adapter) (adapter->client_port) +#endif + enum _ADAPTER_TYPE { PRIMARY_ADAPTER, VIRTUAL_ADAPTER, @@ -1278,18 +1383,6 @@ enum _NAPI_STATE { }; #endif -#ifdef CONFIG_INTEL_PROXIM -struct proxim { - bool proxim_support; - bool proxim_on; - - void *proximity_priv; - int (*proxim_rx)(_adapter *padapter, - union recv_frame *precv_frame); - u8(*proxim_get_var)(_adapter *padapter, u8 type); -}; -#endif /* CONFIG_INTEL_PROXIM */ - #ifdef CONFIG_MAC_LOOPBACK_DRIVER typedef struct loopbackdata { _sema sema; @@ -1306,11 +1399,6 @@ typedef struct loopbackdata { } LOOPBACKDATA, *PLOOPBACKDATA; #endif -struct tsf_info { - u8 sync_port;/*tsf sync from portx*/ - u8 offset; /*tsf timer offset*/ -}; - #define ADAPTER_TX_BW_2G(adapter) BW_MODE_2G((adapter)->driver_tx_bw_mode) #define ADAPTER_TX_BW_5G(adapter) BW_MODE_5G((adapter)->driver_tx_bw_mode) @@ -1319,8 +1407,10 @@ struct _ADAPTER { int pid[3];/* process id from UI, 0:wps, 1:hostapd, 2:dhcpcd */ int bDongle;/* build-in module or external dongle */ + #if defined(CONFIG_AP_MODE) && defined(CONFIG_SUPPORT_MULTI_BCN) _list list; - + u8 vap_id; + #endif struct dvobj_priv *dvobj; struct mlme_priv mlmepriv; struct mlme_ext_priv mlmeextpriv; @@ -1387,7 +1477,7 @@ struct _ADAPTER { ERROR_CODE LastError; /* <20130613, Kordan> Only the functions associated with MP records the error code by now. */ - PVOID HalData; + void *HalData; u32 hal_data_sz; struct hal_ops hal_func; @@ -1417,24 +1507,10 @@ struct _ADAPTER { _thread_hdl_ recvThread; #endif u8 registered; -#ifndef PLATFORM_LINUX - NDIS_STATUS(*dvobj_init)(struct dvobj_priv *dvobj); - void (*dvobj_deinit)(struct dvobj_priv *dvobj); -#endif void (*intf_start)(_adapter *adapter); void (*intf_stop)(_adapter *adapter); -#ifdef PLATFORM_WINDOWS - _nic_hdl hndis_adapter;/* hNdisAdapter(NDISMiniportAdapterHandle); */ - _nic_hdl hndis_config;/* hNdisConfiguration; */ - NDIS_STRING fw_img; - - u32 NdisPacketFilter; - u8 MCList[MAX_MCAST_LIST_NUM][6]; - u32 MCAddrCount; -#endif /* end of PLATFORM_WINDOWS */ - #ifdef PLATFORM_LINUX _nic_hdl pnetdev; char old_ifname[IFNAMSIZ]; @@ -1501,12 +1577,14 @@ struct _ADAPTER { ** refer to iface_id if iface_nums>2 and isprimary is false and the adapter_type value is 0xff.*/ u8 adapter_type;/*be used in Multi-interface to recognize whether is PRIMARY_ADAPTER or not(PRIMARY_ADAPTER/VIRTUAL_ADAPTER) .*/ u8 hw_port; /*interface port type, it depends on HW port */ - struct tsf_info tsf; + #ifdef CONFIG_CLIENT_PORT_CFG + u8 client_id; + u8 client_port; + #endif + /*struct tsf_info tsf;*//*reserve define for 8814B*/ /*extend to support multi interface*/ - /*IFACE_ID0 is equals to PRIMARY_ADAPTER - IFACE_ID1 is equals to VIRTUAL_ADAPTER*/ u8 iface_id; #ifdef CONFIG_BR_EXT @@ -1524,13 +1602,6 @@ struct _ADAPTER { struct br_ext_info ethBrExtInfo; #endif /* CONFIG_BR_EXT */ -#ifdef CONFIG_INTEL_PROXIM - /* intel Proximity, should be alloc mem - * in intel Proximity module and can only - * be used in intel Proximity mode */ - struct proxim proximity; -#endif /* CONFIG_INTEL_PROXIM */ - #ifdef CONFIG_MAC_LOOPBACK_DRIVER PLOOPBACKDATA ploopback; #endif @@ -1606,6 +1677,11 @@ struct _ADAPTER { #define adapter_to_macidctl(adapter) dvobj_to_macidctl(adapter_to_dvobj((adapter))) #define adapter_mac_addr(adapter) (adapter->mac_addr) +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI +#define adapter_pno_mac_addr(adapter) \ + ((adapter_wdev_data(adapter))->pno_mac_addr) +#endif + #define adapter_to_chset(adapter) (adapter_to_rfctl((adapter))->channel_set) #define mlme_to_adapter(mlme) container_of((mlme), struct _ADAPTER, mlmepriv) diff --git a/include/drv_types_linux.h b/include/drv_types_linux.h index 88e1c85..91ca68b 100644 --- a/include/drv_types_linux.h +++ b/include/drv_types_linux.h @@ -15,4 +15,5 @@ #ifndef __DRV_TYPES_LINUX_H__ #define __DRV_TYPES_LINUX_H__ + #endif diff --git a/include/drv_types_pci.h b/include/drv_types_pci.h index a3a4927..396234b 100644 --- a/include/drv_types_pci.h +++ b/include/drv_types_pci.h @@ -119,70 +119,70 @@ typedef struct _PCI_COMMON_CONFIG { } type0; #if 0 struct _PCI_HEADER_TYPE_1 { - ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; - UCHAR PrimaryBusNumber; - UCHAR SecondaryBusNumber; - UCHAR SubordinateBusNumber; - UCHAR SecondaryLatencyTimer; - UCHAR IOBase; - UCHAR IOLimit; - USHORT SecondaryStatus; - USHORT MemoryBase; - USHORT MemoryLimit; - USHORT PrefetchableMemoryBase; - USHORT PrefetchableMemoryLimit; - ULONG PrefetchableMemoryBaseUpper32; - ULONG PrefetchableMemoryLimitUpper32; - USHORT IOBaseUpper; - USHORT IOLimitUpper; - ULONG Reserved2; - ULONG ExpansionROMBase; - UCHAR InterruptLine; - UCHAR InterruptPin; - USHORT BridgeControl; + u32 BaseAddresses[PCI_TYPE1_ADDRESSES]; + u8 PrimaryBusNumber; + u8 SecondaryBusNumber; + u8 SubordinateBusNumber; + u8 SecondaryLatencyTimer; + u8 IOBase; + u8 IOLimit; + u16 SecondaryStatus; + u16 MemoryBase; + u16 MemoryLimit; + u16 PrefetchableMemoryBase; + u16 PrefetchableMemoryLimit; + u32 PrefetchableMemoryBaseUpper32; + u32 PrefetchableMemoryLimitUpper32; + u16 IOBaseUpper; + u16 IOLimitUpper; + u32 Reserved2; + u32 ExpansionROMBase; + u8 InterruptLine; + u8 InterruptPin; + u16 BridgeControl; } type1; struct _PCI_HEADER_TYPE_2 { - ULONG BaseAddress; - UCHAR CapabilitiesPtr; - UCHAR Reserved2; - USHORT SecondaryStatus; - UCHAR PrimaryBusNumber; - UCHAR CardbusBusNumber; - UCHAR SubordinateBusNumber; - UCHAR CardbusLatencyTimer; - ULONG MemoryBase0; - ULONG MemoryLimit0; - ULONG MemoryBase1; - ULONG MemoryLimit1; - USHORT IOBase0_LO; - USHORT IOBase0_HI; - USHORT IOLimit0_LO; - USHORT IOLimit0_HI; - USHORT IOBase1_LO; - USHORT IOBase1_HI; - USHORT IOLimit1_LO; - USHORT IOLimit1_HI; - UCHAR InterruptLine; - UCHAR InterruptPin; - USHORT BridgeControl; - USHORT SubVendorID; - USHORT SubSystemID; - ULONG LegacyBaseAddress; - UCHAR Reserved3[56]; - ULONG SystemControl; - UCHAR MultiMediaControl; - UCHAR GeneralStatus; - UCHAR Reserved4[2]; - UCHAR GPIO0Control; - UCHAR GPIO1Control; - UCHAR GPIO2Control; - UCHAR GPIO3Control; - ULONG IRQMuxRouting; - UCHAR RetryStatus; - UCHAR CardControl; - UCHAR DeviceControl; - UCHAR Diagnostic; + u32 BaseAddress; + u8 CapabilitiesPtr; + u8 Reserved2; + u16 SecondaryStatus; + u8 PrimaryBusNumber; + u8 CardbusBusNumber; + u8 SubordinateBusNumber; + u8 CardbusLatencyTimer; + u32 MemoryBase0; + u32 MemoryLimit0; + u32 MemoryBase1; + u32 MemoryLimit1; + u16 IOBase0_LO; + u16 IOBase0_HI; + u16 IOLimit0_LO; + u16 IOLimit0_HI; + u16 IOBase1_LO; + u16 IOBase1_HI; + u16 IOLimit1_LO; + u16 IOLimit1_HI; + u8 InterruptLine; + u8 InterruptPin; + u16 BridgeControl; + u16 SubVendorID; + u16 SubSystemID; + u32 LegacyBaseAddress; + u8 Reserved3[56]; + u32 SystemControl; + u8 MultiMediaControl; + u8 GeneralStatus; + u8 Reserved4[2]; + u8 GPIO0Control; + u8 GPIO1Control; + u8 GPIO2Control; + u8 GPIO3Control; + u32 IRQMuxRouting; + u8 RetryStatus; + u8 CardControl; + u8 DeviceControl; + u8 Diagnostic; } type2; #endif } u; diff --git a/include/drv_types_sdio.h b/include/drv_types_sdio.h index 9feca12..94a5824 100644 --- a/include/drv_types_sdio.h +++ b/include/drv_types_sdio.h @@ -28,15 +28,6 @@ #endif /* CONFIG_PLATFORM_SPRD */ #endif -#ifdef PLATFORM_OS_XP - #include - #include -#endif - -#ifdef PLATFORM_OS_CE - #include -#endif - #define RTW_SDIO_CLK_33M 33000000 #define RTW_SDIO_CLK_40M 40000000 #define RTW_SDIO_CLK_80M 80000000 @@ -50,29 +41,13 @@ typedef struct sdio_data { u32 block_transfer_len; #ifdef PLATFORM_LINUX + struct mmc_card *card; struct sdio_func *func; _thread_hdl_ sys_sdio_irq_thd; unsigned int clock; unsigned int timing; u8 sd3_bus_mode; #endif - -#ifdef PLATFORM_OS_XP - PDEVICE_OBJECT pphysdevobj; - PDEVICE_OBJECT pfuncdevobj; - PDEVICE_OBJECT pnextdevobj; - SDBUS_INTERFACE_STANDARD sdbusinft; - u8 nextdevstacksz; -#endif - -#ifdef PLATFORM_OS_CE - SD_DEVICE_HANDLE hDevice; - SD_CARD_RCA sd_rca; - SD_CARD_INTERFACE card_intf; - BOOLEAN enableIsarWithStatus; - WCHAR active_path[MAX_ACTIVE_REG_PATH]; - SD_HOST_BLOCK_CAPABILITY sd_host_blk_cap; -#endif } SDIO_DATA, *PSDIO_DATA; #define dvobj_to_sdio_func(d) ((d)->intf_data.func) diff --git a/include/ethernet.h b/include/ethernet.h index 2bafa4d..ef518cc 100644 --- a/include/ethernet.h +++ b/include/ethernet.h @@ -23,14 +23,14 @@ #define MINIMUM_ETHERNET_PACKET_SIZE 60 /* !< Minimum Ethernet Packet Size */ #define MAXIMUM_ETHERNET_PACKET_SIZE 1514 /* !< Maximum Ethernet Packet Size */ -#define RT_ETH_IS_MULTICAST(_pAddr) ((((UCHAR *)(_pAddr))[0]&0x01) != 0) /* !< Is Multicast Address? */ +#define RT_ETH_IS_MULTICAST(_pAddr) ((((u8 *)(_pAddr))[0]&0x01) != 0) /* !< Is Multicast Address? */ #define RT_ETH_IS_BROADCAST(_pAddr) (\ - ((UCHAR *)(_pAddr))[0] == 0xff && \ - ((UCHAR *)(_pAddr))[1] == 0xff && \ - ((UCHAR *)(_pAddr))[2] == 0xff && \ - ((UCHAR *)(_pAddr))[3] == 0xff && \ - ((UCHAR *)(_pAddr))[4] == 0xff && \ - ((UCHAR *)(_pAddr))[5] == 0xff) /* !< Is Broadcast Address? */ + ((u8 *)(_pAddr))[0] == 0xff && \ + ((u8 *)(_pAddr))[1] == 0xff && \ + ((u8 *)(_pAddr))[2] == 0xff && \ + ((u8 *)(_pAddr))[3] == 0xff && \ + ((u8 *)(_pAddr))[4] == 0xff && \ + ((u8 *)(_pAddr))[5] == 0xff) /* !< Is Broadcast Address? */ #endif /* #ifndef __INC_ETHERNET_H */ diff --git a/include/gspi_osintf.h b/include/gspi_osintf.h index 6393f77..a94e656 100644 --- a/include/gspi_osintf.h +++ b/include/gspi_osintf.h @@ -16,10 +16,4 @@ #define __SDIO_OSINTF_H__ -#ifdef PLATFORM_OS_CE - extern NDIS_STATUS ce_sd_get_dev_hdl(PADAPTER padapter); - SD_API_STATUS ce_sd_int_callback(SD_DEVICE_HANDLE hDevice, PADAPTER padapter); - extern void sd_setup_irs(PADAPTER padapter); -#endif - #endif diff --git a/include/h2clbk.h b/include/h2clbk.h index 4e22afc..4df14b9 100644 --- a/include/h2clbk.h +++ b/include/h2clbk.h @@ -21,6 +21,6 @@ void _lbk_cmd(PADAPTER Adapter); void _lbk_rsp(PADAPTER Adapter); -void _lbk_evt(IN PADAPTER Adapter); +void _lbk_evt(PADAPTER Adapter); void h2c_event_callback(unsigned char *dev, unsigned char *pbuf); diff --git a/include/hal_btcoex.h b/include/hal_btcoex.h index 03021fe..40ddafb 100644 --- a/include/hal_btcoex.h +++ b/include/hal_btcoex.h @@ -67,6 +67,9 @@ u8 hal_btcoex_IsLpsOn(PADAPTER); u8 hal_btcoex_RpwmVal(PADAPTER); u8 hal_btcoex_LpsVal(PADAPTER); u32 hal_btcoex_GetRaMask(PADAPTER); +u8 hal_btcoex_query_reduced_wl_pwr_lvl(PADAPTER padapter); +void hal_btcoex_set_reduced_wl_pwr_lvl(PADAPTER padapter, u8 val); +void hal_btcoex_do_reduce_wl_pwr_lvl(PADAPTER padapter); void hal_btcoex_RecordPwrMode(PADAPTER padapter, u8 *pCmdBuf, u8 cmdLen); void hal_btcoex_DisplayBtCoexInfo(PADAPTER, u8 *pbuf, u32 bufsize); void hal_btcoex_SetDBG(PADAPTER, u32 *pDbgModule); @@ -80,7 +83,7 @@ void hal_btcoex_StackUpdateProfileInfo(void); void hal_btcoex_pta_off_on_notify(PADAPTER padapter, u8 bBTON); void hal_btcoex_SetAntIsolationType(PADAPTER padapter, u8 anttype); #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE - int hal_btcoex_AntIsolationConfig_ParaFile(IN PADAPTER Adapter, IN char *pFileName); + int hal_btcoex_AntIsolationConfig_ParaFile(PADAPTER Adapter, char *pFileName); int hal_btcoex_ParseAntIsolationConfigFile(PADAPTER Adapter, char *buffer); #endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */ u16 hal_btcoex_btreg_read(PADAPTER padapter, u8 type, u16 addr, u32 *data); @@ -89,9 +92,15 @@ void hal_btcoex_set_rfe_type(u8 type); void hal_btcoex_switchband_notify(u8 under_scan, u8 band_type); void hal_btcoex_WlFwDbgInfoNotify(PADAPTER padapter, u8* tmpBuf, u8 length); void hal_btcoex_rx_rate_change_notify(PADAPTER padapter, u8 is_data_frame, u8 rate_id); +u16 hal_btcoex_btset_testode(PADAPTER padapter, u8 type); #ifdef CONFIG_RF4CE_COEXIST void hal_btcoex_set_rf4ce_link_state(u8 state); u8 hal_btcoex_get_rf4ce_link_state(void); #endif + +#ifdef CONFIG_SDIO_HCI +#include /* sdio multi coex */ +#endif + #endif /* !__HAL_BTCOEX_H__ */ diff --git a/include/hal_btcoex_wifionly.h b/include/hal_btcoex_wifionly.h index b41bc36..c98820b 100644 --- a/include/hal_btcoex_wifionly.h +++ b/include/hal_btcoex_wifionly.h @@ -19,12 +19,19 @@ #include /* Define the ICs that support wifi only cfg in coex. codes */ -#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) +#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) #define CONFIG_BTCOEX_SUPPORT_WIFI_ONLY_CFG 1 #else #define CONFIG_BTCOEX_SUPPORT_WIFI_ONLY_CFG 0 #endif +/* Define the ICs that support hal btc common file structure */ +#if defined(CONFIG_RTL8822C) +#define CONFIG_BTCOEX_SUPPORT_BTC_CMN 1 +#else +#define CONFIG_BTCOEX_SUPPORT_BTC_CMN 0 +#endif + #if (CONFIG_BTCOEX_SUPPORT_WIFI_ONLY_CFG == 1) typedef enum _WIFIONLY_CHIP_INTERFACE { @@ -49,28 +56,30 @@ struct wifi_only_haldata { }; struct wifi_only_cfg { - PVOID Adapter; - struct wifi_only_haldata haldata_info; + void *Adapter; + struct wifi_only_haldata haldata_info; WIFIONLY_CHIP_INTERFACE chip_interface; }; -void halwifionly_write1byte(PVOID pwifionlyContext, u32 RegAddr, u8 Data); -void halwifionly_write2byte(PVOID pwifionlyContext, u32 RegAddr, u16 Data); -void halwifionly_write4byte(PVOID pwifionlyContext, u32 RegAddr, u32 Data); -u8 halwifionly_read1byte(PVOID pwifionlyContext, u32 RegAddr); -u16 halwifionly_read2byte(PVOID pwifionlyContext, u32 RegAddr); -u32 halwifionly_read4byte(PVOID pwifionlyContext, u32 RegAddr); -void halwifionly_bitmaskwrite1byte(PVOID pwifionlyContext, u32 regAddr, u8 bitMask, u8 data); -void halwifionly_phy_set_rf_reg(PVOID pwifionlyContext, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data); -void halwifionly_phy_set_bb_reg(PVOID pwifionlyContext, u32 RegAddr, u32 BitMask, u32 Data); +void halwifionly_write1byte(void *pwifionlyContext, u32 RegAddr, u8 Data); +void halwifionly_write2byte(void *pwifionlyContext, u32 RegAddr, u16 Data); +void halwifionly_write4byte(void *pwifionlyContext, u32 RegAddr, u32 Data); +u8 halwifionly_read1byte(void *pwifionlyContext, u32 RegAddr); +u16 halwifionly_read2byte(void *pwifionlyContext, u32 RegAddr); +u32 halwifionly_read4byte(void *pwifionlyContext, u32 RegAddr); +void halwifionly_bitmaskwrite1byte(void *pwifionlyContext, u32 regAddr, u8 bitMask, u8 data); +void halwifionly_phy_set_rf_reg(void *pwifionlyContext, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data); +void halwifionly_phy_set_bb_reg(void *pwifionlyContext, u32 RegAddr, u32 BitMask, u32 Data); void hal_btcoex_wifionly_switchband_notify(PADAPTER padapter); void hal_btcoex_wifionly_scan_notify(PADAPTER padapter); +void hal_btcoex_wifionly_connect_notify(PADAPTER padapter); void hal_btcoex_wifionly_hw_config(PADAPTER padapter); void hal_btcoex_wifionly_initlizevariables(PADAPTER padapter); void hal_btcoex_wifionly_AntInfoSetting(PADAPTER padapter); #else #define hal_btcoex_wifionly_switchband_notify(padapter) #define hal_btcoex_wifionly_scan_notify(padapter) +#define hal_btcoex_wifionly_connect_notify(padapter) #define hal_btcoex_wifionly_hw_config(padapter) #define hal_btcoex_wifionly_initlizevariables(padapter) #define hal_btcoex_wifionly_AntInfoSetting(padapter) diff --git a/include/hal_com.h b/include/hal_com.h index bdfeb6e..a611065 100644 --- a/include/hal_com.h +++ b/include/hal_com.h @@ -265,6 +265,8 @@ struct dbg_rx_counter { u32 rx_ht_fa; }; +u8 rtw_hal_get_port(_adapter *adapter); + #ifdef CONFIG_MBSSID_CAM #define DBG_MBID_CAM_DUMP @@ -275,7 +277,10 @@ struct dbg_rx_counter { u8 rtw_get_mbid_cam_entry_num(_adapter *adapter); int rtw_mbid_cam_cache_dump(void *sel, const char *fun_name , _adapter *adapter); int rtw_mbid_cam_dump(void *sel, const char *fun_name, _adapter *adapter); - void rtw_mbid_cam_restore(_adapter *adapter); + void rtw_mi_set_mbid_cam(_adapter *adapter); + u8 rtw_mbid_camid_alloc(_adapter *adapter, u8 *mac_addr); + void rtw_ap_set_mbid_num(_adapter *adapter, u8 ap_num); + void rtw_mbid_cam_enable(_adapter *adapter); #endif #ifdef CONFIG_MI_WITH_MBSSID_CAM @@ -284,6 +289,7 @@ struct dbg_rx_counter { #ifdef CONFIG_SWTIMER_BASED_TXBCN u16 rtw_hal_bcn_interval_adjust(_adapter *adapter, u16 bcn_interval); #endif + void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode); #endif void rtw_dump_mac_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter); @@ -343,26 +349,31 @@ bool hal_chk_proto_cap(_adapter *adapter, u8 cap); bool hal_is_band_support(_adapter *adapter, u8 band); bool hal_is_bw_support(_adapter *adapter, u8 bw); bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode); +bool hal_is_mimo_support(_adapter *adapter); u8 hal_largest_bw(_adapter *adapter, u8 in_bw); bool hal_chk_wl_func(_adapter *adapter, u8 func); void hal_com_config_channel_plan( - IN PADAPTER padapter, - IN char *hw_alpha2, - IN u8 hw_chplan, - IN char *sw_alpha2, - IN u8 sw_chplan, - IN u8 def_chplan, - IN BOOLEAN AutoLoadFail + PADAPTER padapter, + char *hw_alpha2, + u8 hw_chplan, + char *sw_alpha2, + u8 sw_chplan, + u8 def_chplan, + BOOLEAN AutoLoadFail ); int hal_config_macaddr(_adapter *adapter, bool autoload_fail); +#ifdef RTW_HALMAC +void rtw_hal_hw_port_enable(_adapter *adapter); +void rtw_hal_hw_port_disable(_adapter *adapter); +#endif BOOLEAN HAL_IsLegalChannel( - IN PADAPTER Adapter, - IN u32 Channel + PADAPTER Adapter, + u32 Channel ); u8 MRateToHwRate(u8 rate); @@ -370,19 +381,19 @@ u8 MRateToHwRate(u8 rate); u8 hw_rate_to_m_rate(u8 rate); void HalSetBrateCfg( - IN PADAPTER Adapter, - IN u8 *mBratesOS, - OUT u16 *pBrateCfg); + PADAPTER Adapter, + u8 *mBratesOS, + u16 *pBrateCfg); BOOLEAN Hal_MappingOutPipe( - IN PADAPTER pAdapter, - IN u8 NumOutPipe + PADAPTER pAdapter, + u8 NumOutPipe ); void rtw_dump_fw_info(void *sel, _adapter *adapter); void rtw_restore_hw_port_cfg(_adapter *adapter); -void rtw_restore_mac_addr(_adapter *adapter);/*set mac addr when hal_init for all iface*/ +void rtw_mi_set_mac_addr(_adapter *adapter);/*set mac addr when hal_init for all iface*/ void rtw_hal_dump_macaddr(void *sel, _adapter *adapter); void rtw_init_hal_com_default_value(PADAPTER Adapter); @@ -418,8 +429,35 @@ u8 rtw_hal_rcr_add(_adapter *adapter, u32 add); u8 rtw_hal_rcr_clear(_adapter *adapter, u32 clear); void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action); -void hw_var_port_switch(_adapter *adapter); +void rtw_iface_enable_tsf_update(_adapter *adapter); +void rtw_iface_disable_tsf_update(_adapter *adapter); +void rtw_hal_periodic_tsf_update_chk(_adapter *adapter); +void rtw_hal_periodic_tsf_update_end_timer_hdl(void *ctx); +#if CONFIG_TX_AC_LIFETIME +#define TX_ACLT_CONF_DEFAULT 0 +#define TX_ACLT_CONF_AP_M2U 1 +#define TX_ACLT_CONF_MESH 2 +#define TX_ACLT_CONF_NUM 3 + +extern const char *const _tx_aclt_conf_str[]; +#define tx_aclt_conf_str(conf) (((conf) >= TX_ACLT_CONF_NUM) ? _tx_aclt_conf_str[TX_ACLT_CONF_NUM] : _tx_aclt_conf_str[(conf)]) + +struct tx_aclt_conf_t { + u8 en; + u32 vo_vi; + u32 be_bk; +}; + +void dump_tx_aclt_force_val(void *sel, struct dvobj_priv *dvobj); +void rtw_hal_set_tx_aclt_force_val(_adapter *adapter, struct tx_aclt_conf_t *input, u8 arg_num); +void dump_tx_aclt_confs(void *sel, struct dvobj_priv *dvobj); +void rtw_hal_set_tx_aclt_conf(_adapter *adapter, u8 conf_idx, struct tx_aclt_conf_t *input, u8 arg_num); +void rtw_hal_update_tx_aclt(_adapter *adapter); +#endif + +void hw_var_port_switch(_adapter *adapter); +void rtw_var_set_basic_rate(PADAPTER padapter, u8 *val); u8 SetHwReg(PADAPTER padapter, u8 variable, u8 *val); void GetHwReg(PADAPTER padapter, u8 variable, u8 *val); void rtw_hal_check_rxfifo_full(_adapter *adapter); @@ -437,42 +475,42 @@ eqNByte( u32 MapCharToHexDigit( - IN char chTmp + char chTmp ); BOOLEAN GetHexValueFromString( - IN char *szStr, - IN OUT u32 *pu4bVal, - IN OUT u32 *pu4bMove + char *szStr, + u32 *pu4bVal, + u32 *pu4bMove ); BOOLEAN GetFractionValueFromString( - IN char *szStr, - IN OUT u8 *pInteger, - IN OUT u8 *pFraction, - IN OUT u32 *pu4bMove + char *szStr, + u8 *pInteger, + u8 *pFraction, + u32 *pu4bMove ); BOOLEAN IsCommentString( - IN char *szStr + char *szStr ); BOOLEAN ParseQualifiedString( - IN char *In, - IN OUT u32 *Start, - OUT char *Out, - IN char LeftQualifier, - IN char RightQualifier + char *In, + u32 *Start, + char *Out, + char LeftQualifier, + char RightQualifier ); BOOLEAN GetU1ByteIntegerFromStringInDecimal( - IN char *Str, - IN OUT u8 *pInt + char *Str, + u8 *pInt ); BOOLEAN @@ -511,13 +549,16 @@ u8 rtw_hal_busagg_qsel_check(_adapter *padapter, u8 pre_qsel, u8 next_qsel); u8 rtw_get_current_tx_rate(_adapter *padapter, struct sta_info *psta); u8 rtw_get_current_tx_sgi(_adapter *padapter, struct sta_info *psta); - +#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA +void rtw_hal_set_pathb_phase(_adapter *adapter, u8 phase_idx); +#endif void rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished); u8 rtw_hal_get_rsvd_page_num(struct _ADAPTER *adapter); #ifdef CONFIG_TSF_RESET_OFFLOAD int rtw_hal_reset_tsf(_adapter *adapter, u8 reset_port); #endif +u64 rtw_hal_get_tsftr_by_port(_adapter *adapter, u8 port); #ifdef CONFIG_TDLS #ifdef CONFIG_TDLS_CH_SW @@ -525,7 +566,7 @@ int rtw_hal_reset_tsf(_adapter *adapter, u8 reset_port); #endif #endif #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT) -s32 rtw_hal_set_wifi_port_id_cmd(_adapter *adapter); +s32 rtw_hal_set_wifi_btc_port_id_cmd(_adapter *adapter); #endif #ifdef CONFIG_GPIO_API @@ -553,16 +594,12 @@ void rtw_hal_ch_sw_iqk_info_restore(_adapter *padapter, u8 ch_sw_use_case); #endif void update_IOT_info(_adapter *padapter); - -void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap); -void rtw_hal_correct_tsf(_adapter *padapter, u8 hw_port, u64 tsf); +#ifdef CONFIG_RTS_FULL_BW +void rtw_set_rts_bw(_adapter *padapter); +#endif/*CONFIG_RTS_FULL_BW*/ void ResumeTxBeacon(_adapter *padapter); void StopTxBeacon(_adapter *padapter); -#ifdef CONFIG_MI_WITH_MBSSID_CAM /*HW port0 - MBSS*/ - void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode); - u8 rtw_mbid_camid_alloc(_adapter *adapter, u8 *mac_addr); -#endif #ifdef CONFIG_ANTENNA_DIVERSITY u8 rtw_hal_antdiv_before_linked(_adapter *padapter); @@ -592,16 +629,17 @@ void StopTxBeacon(_adapter *padapter); enum lps_pg_hdl_id { LPS_PG_INFO_CFG = 0, LPS_PG_REDLEMEM, - LPS_PG_RESEND_H2C, + LPS_PG_PHYDM_DIS, + LPS_PG_PHYDM_EN, }; - u8 rtw_hal_set_lps_pg_info(_adapter *adapter); +u8 rtw_hal_set_lps_pg_info(_adapter *adapter); #endif int rtw_hal_get_rsvd_page(_adapter *adapter, u32 page_offset, u32 page_num, u8 *buffer, u32 buffer_size); void rtw_hal_construct_beacon(_adapter *padapter, u8 *pframe, u32 *pLength); void rtw_hal_construct_NullFunctionData(PADAPTER, u8 *pframe, u32 *pLength, - u8 *StaAddr, u8 bQoS, u8 AC, u8 bEosp, u8 bForcePowerSave); + u8 bQoS, u8 AC, u8 bEosp, u8 bForcePowerSave); #ifdef CONFIG_WOWLAN struct rtl_wow_pattern { @@ -645,6 +683,11 @@ void rtw_dump_fifo(void *sel, _adapter *adapter, u8 fifo_sel, u32 fifo_addr, u32 s32 rtw_hal_set_default_port_id_cmd(_adapter *adapter, u8 mac_id); s32 rtw_set_default_port_id(_adapter *adapter); s32 rtw_set_ps_rsvd_page(_adapter *adapter); + +#define get_dft_portid(adapter) (adapter_to_dvobj(adapter)->dft.port_id) +#define get_dft_macid(adapter) (adapter_to_dvobj(adapter)->dft.mac_id) + +/*void rtw_search_default_port(_adapter *adapter);*/ #endif #ifdef CONFIG_P2P_PS @@ -659,6 +702,10 @@ void rtw_hal_switch_chnl_and_set_bw_offload(_adapter *adapter, u8 central_ch, u8 s16 translate_dbm_to_percentage(s16 signal); +#ifdef CONFIG_SUPPORT_MULTI_BCN +void rtw_ap_multi_bcn_cfg(_adapter *adapter); +#endif + #ifdef CONFIG_SWTIMER_BASED_TXBCN #ifdef CONFIG_BCN_RECOVERY u8 rtw_ap_bcn_recovery(_adapter *padapter); @@ -668,6 +715,11 @@ u8 rtw_ap_bcn_queue_empty_check(_adapter *padapter, u32 txbcn_timer_ms); #endif #endif /*CONFIG_SWTIMER_BASED_TXBCN*/ +#ifdef CONFIG_FW_HANDLE_TXBCN +void rtw_ap_mbid_bcn_en(_adapter *adapter, u8 mbcn_id); +void rtw_ap_mbid_bcn_dis(_adapter *adapter, u8 mbcn_id); +#endif + void rtw_hal_get_rf_path(struct dvobj_priv *d, enum rf_type *type, enum bb_path *tx, enum bb_path *rx); #ifdef CONFIG_BEAMFORMING @@ -675,4 +727,15 @@ void rtw_hal_get_rf_path(struct dvobj_priv *d, enum rf_type *type, void rtw_hal_beamforming_config_csirate(PADAPTER adapter); #endif #endif +#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8812A) ||\ + defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8192E) ||\ + defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821A) || \ + defined(CONFIG_RTL8822C) +u8 phy_get_current_tx_num(PADAPTER pAdapter, u8 Rate); +#endif + +#ifdef CONFIG_RTL8812A +u8 * rtw_hal_set_8812a_vendor_ie(_adapter *padapter , u8 *pframe ,uint *frlen ); +#endif + #endif /* __HAL_COMMON_H__ */ diff --git a/include/hal_com_h2c.h b/include/hal_com_h2c.h index 06cd273..3b833bb 100644 --- a/include/hal_com_h2c.h +++ b/include/hal_com_h2c.h @@ -110,9 +110,13 @@ enum h2c_cmd { H2C_AOAC_RSVDPAGE3 = 0x88, H2C_P2P_OFFLOAD_RSVD_PAGE = 0x8A, H2C_P2P_OFFLOAD = 0x8B, - +#ifdef CONFIG_FW_HANDLE_TXBCN + H2C_FW_BCN_OFFLOAD = 0xBA, +#endif H2C_RESET_TSF = 0xC0, +#ifdef CONFIG_FW_CORRECT_BCN H2C_BCNHWSEQ = 0xC5, +#endif H2C_CUSTOMER_STR_W1 = 0xC6, H2C_CUSTOMER_STR_W2 = 0xC7, H2C_CUSTOMER_STR_W3 = 0xC8, @@ -122,7 +126,7 @@ enum h2c_cmd { H2C_MAXID, }; -#define H2C_INACTIVE_PS_LEN 3 +#define H2C_INACTIVE_PS_LEN 4 #define H2C_RSVDPAGE_LOC_LEN 5 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT #define H2C_DEFAULT_PORT_ID_LEN 2 @@ -139,7 +143,7 @@ enum h2c_cmd { #define H2C_PSTUNEPARAM_LEN 4 #define H2C_MACID_CFG_LEN 7 #define H2C_BTMP_OPER_LEN 5 -#define H2C_WOWLAN_LEN 6 +#define H2C_WOWLAN_LEN 7 #define H2C_REMOTE_WAKE_CTRL_LEN 3 #define H2C_AOAC_GLOBAL_INFO_LEN 2 #define H2C_AOAC_RSVDPAGE_LOC_LEN 7 @@ -165,7 +169,11 @@ enum h2c_cmd { #define H2C_MCC_IQK_PARAM_LEN 7 #endif /* CONFIG_MCC_MODE */ #ifdef CONFIG_LPS_PG +#ifdef CONFIG_RTL8822C + #define H2C_LPS_PG_INFO_LEN 4 +#else #define H2C_LPS_PG_INFO_LEN 2 +#endif #define H2C_LPSPG_LEN 16 #endif #ifdef CONFIG_LPS_POFF @@ -189,29 +197,6 @@ enum h2c_cmd { #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -/* -* ARP packet -* -* LLC Header */ -#define GET_ARP_PKT_LLC_TYPE(__pHeader) ReadLE2Byte(((u8 *)(__pHeader)) + 6) - -/* ARP element */ -#define GET_ARP_PKT_OPERATION(__pHeader) ReadLE2Byte(((u8 *)(__pHeader)) + 6) -#define GET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cp_mac_addr((u8 *)(_val), ((u8 *)(__pHeader))+8) -#define GET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr((u8 *)(_val), ((u8 *)(__pHeader))+14) -#define GET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cp_mac_addr((u8 *)(_val), ((u8 *)(__pHeader))+18) -#define GET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val) cpIpAddr((u8 *)(_val), ((u8 *)(__pHeader))+24) - -#define SET_ARP_PKT_HW(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 0, __Value) -#define SET_ARP_PKT_PROTOCOL(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 2, __Value) -#define SET_ARP_PKT_HW_ADDR_LEN(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 4, __Value) -#define SET_ARP_PKT_PROTOCOL_ADDR_LEN(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 5, __Value) -#define SET_ARP_PKT_OPERATION(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 6, __Value) -#define SET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cp_mac_addr(((u8 *)(__pHeader))+8, (u8 *)(_val)) -#define SET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr(((u8 *)(__pHeader))+14, (u8 *)(_val)) -#define SET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cp_mac_addr(((u8 *)(__pHeader))+18, (u8 *)(_val)) -#define SET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val) cpIpAddr(((u8 *)(__pHeader))+24, (u8 *)(_val)) - #define FW_WOWLAN_FUN_EN BIT(0) #define FW_WOWLAN_PATTERN_MATCH BIT(1) #define FW_WOWLAN_MAGIC_PKT BIT(2) @@ -236,6 +221,9 @@ enum h2c_cmd { #define FW_REALWOWLAN_EN BIT(5) #define FW_WOW_FW_UNICAST_EN BIT(7) +#define FW_IPS_DISABLE_BBRF BIT(0) +#define FW_IPS_WRC BIT(1) + #endif /* CONFIG_WOWLAN */ /* _RSVDPAGE_LOC_CMD_0x00 */ @@ -293,9 +281,12 @@ s32 rtw_hal_set_FwMediaStatusRpt_range_cmd(_adapter *adapter, bool opmode, bool /* _DISCONNECT_DECISION_CMD_0x04 */ #define SET_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) +#define SET_H2CCMD_DISCONDECISION_PARM_TRY_BCN_FAIL_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) +#define SET_H2CCMD_DISCONDECISION_PARM_DISCONNECT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) #define SET_H2CCMD_DISCONDECISION_PORT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 3, __Value) #define SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) #define SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) +#define SET_H2CCMD_DISCONDECISION_PARM_TRY_OK_BCN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) #ifdef CONFIG_RTW_CUSTOMER_STR #define RTW_CUSTOMER_STR_LEN 16 @@ -348,6 +339,22 @@ s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs); #define SET_H2CCMD_AP_WOW_PS_RF(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) #define SET_H2CCMD_AP_WOW_PS_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) +/* INACTIVE_PS 0x27, duration unit is TBTT */ +#define SET_H2CCMD_INACTIVE_PS_EN(__pH2CCmd, __Value) \ + SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) +#define SET_H2CCMD_INACTIVE_IGNORE_PS(__pH2CCmd, __Value) \ + SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) +#define SET_H2CCMD_INACTIVE_PERIOD_SCAN_EN(__pH2CCmd, __Value) \ + SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) +#define SET_H2CCMD_INACTIVE_DISBBRF(__pH2CCmd, __Value) \ + SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) +#define SET_H2CCMD_INACTIVE_PS_FREQ(__pH2CCmd, __Value) \ + SET_BITS_TO_LE_1BYTE(__pH2CCmd + 1, 0, 8, __Value) +#define SET_H2CCMD_INACTIVE_PS_DURATION(__pH2CCmd, __Value) \ + SET_BITS_TO_LE_1BYTE(__pH2CCmd + 2, 0, 8, __Value) +#define SET_H2CCMD_INACTIVE_PS_PERIOD_SCAN_TIME(__pH2CCmd, __Value) \ + SET_BITS_TO_LE_1BYTE(__pH2CCmd + 3, 0, 8, __Value) + #ifdef CONFIG_LPS_POFF /*PARTIAL OFF Control 0x29*/ #define SET_H2CCMD_LPS_POFF_CTRL_EN(__pH2CCmd, __Value) \ @@ -485,6 +492,9 @@ s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs); #define SET_H2CCMD_WOWLAN_UNIT_FOR_UPHY_DISABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 3, 1, __Value) #define SET_H2CCMD_WOWLAN_TAKE_PDN_UPHY_DIS_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 4, 1, __Value) #define SET_H2CCMD_WOWLAN_GPIO_INPUT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 5, 1, __Value) +#define SET_H2CCMD_WOWLAN_DEV2HST_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 7, 1, __Value) +#define SET_H2CCMD_WOWLAN_TIME_FOR_UPHY_DISABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) +#define SET_H2CCMD_WOWLAN_RISE_HST2DEV(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 2, 1, __Value) /* _REMOTE_WAKEUP_CMD_0x81 */ #define SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) @@ -551,7 +561,9 @@ s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs); #define SET_H2CCMD_LPSPG_MACID_SEARCH_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value)/*MACIDSearch_En*/ #define SET_H2CCMD_LPSPG_TXSC_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value)/*TXSC_En*/ #define SET_H2CCMD_LPSPG_MU_RATE_TB_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value)/*MURateTable_En*/ -#define SET_H2CCMD_LPSPG_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)/*Loc_LPS_PG*/ +#define SET_H2CCMD_LPSPG_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)/*Loc_LPS_PG*/ +#define SET_H2CCMD_LPSPG_DPK_INFO_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)/*Loc_LPS_PG_DPK_info*/ +#define SET_H2CCMD_LPSPG_IQK_INFO_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 3, 0, 8, __Value)/*Loc_IQK_result*/ #endif #ifdef DBG_FW_DEBUG_MSG_PKT @@ -559,6 +571,14 @@ s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs); #define SET_H2CCMD_RSVDPAGE_LOC_FW_DBG_MSG_PKT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) /*loc_debug_packet*/ #endif /*DBG_FW_DEBUG_MSG_PKT*/ +#ifdef DBG_RSVD_PAGE_CFG +#define RSVD_PAGE_CFG(ops, v1, v2, v3) \ + RTW_INFO("=== [RSVD][%s]-NeedPage:%d, TotalPageNum:%d TotalPacketLen:%d ===\n", \ + ops, v1, v2, v3) +#else +#define RSVD_PAGE_CFG(ops, v1, v2, v3) do {} while (0) +#endif + /* --------------------------------------------------------------------------------------------------------- * ------------------------------------------- Structure -------------------------------------------------- * --------------------------------------------------------------------------------------------------------- */ @@ -601,6 +621,21 @@ typedef struct _RSVDPAGE_LOC { #endif /*DBG_FW_DEBUG_MSG_PKT*/ } RSVDPAGE_LOC, *PRSVDPAGE_LOC; +struct rsvd_page_cache_t { + char *name; + u8 loc; + u8 page_num; + u8 *data; + u32 size; +}; + +bool rsvd_page_cache_update_all(struct rsvd_page_cache_t *cache, u8 loc + , u8 txdesc_len, u32 page_size, u8 *info, u32 info_len); +bool rsvd_page_cache_update_data(struct rsvd_page_cache_t *cache, u8 *info + , u32 info_len); +void rsvd_page_cache_free_data(struct rsvd_page_cache_t *cache); +void rsvd_page_cache_free(struct rsvd_page_cache_t *cache); + #endif void dump_TX_FIFO(PADAPTER padapter, u8 page_num, u16 page_size); u8 rtw_hal_set_fw_media_status_cmd(_adapter *adapter, u8 mstatus, u8 macid); diff --git a/include/hal_com_led.h b/include/hal_com_led.h index d88556d..379c4fd 100644 --- a/include/hal_com_led.h +++ b/include/hal_com_led.h @@ -199,15 +199,15 @@ typedef struct _LED_PCIE { typedef struct _LED_PCIE LED_DATA, *PLED_DATA; typedef enum _LED_STRATEGY_PCIE LED_STRATEGY, *PLED_STRATEGY; -VOID +void LedControlPCIE( - IN PADAPTER Adapter, - IN LED_CTL_MODE LedAction + PADAPTER Adapter, + LED_CTL_MODE LedAction ); -VOID +void gen_RefreshLedState( - IN PADAPTER Adapter); + PADAPTER Adapter); /* ******************************************************************************** * USB LED Definition. @@ -274,10 +274,10 @@ typedef struct _LED_USB { typedef struct _LED_USB LED_DATA, *PLED_DATA; typedef enum _LED_STRATEGY_USB LED_STRATEGY, *PLED_STRATEGY; #ifdef CONFIG_RTW_SW_LED -VOID +void LedControlUSB( - IN PADAPTER Adapter, - IN LED_CTL_MODE LedAction + PADAPTER Adapter, + LED_CTL_MODE LedAction ); #endif @@ -336,10 +336,10 @@ typedef struct _LED_SDIO { typedef struct _LED_SDIO LED_DATA, *PLED_DATA; typedef enum _LED_STRATEGY_SDIO LED_STRATEGY, *PLED_STRATEGY; -VOID +void LedControlSDIO( - IN PADAPTER Adapter, - IN LED_CTL_MODE LedAction + PADAPTER Adapter, + LED_CTL_MODE LedAction ); #endif diff --git a/include/hal_com_phycfg.h b/include/hal_com_phycfg.h index 581bca4..bfecab5 100644 --- a/include/hal_com_phycfg.h +++ b/include/hal_com_phycfg.h @@ -29,8 +29,6 @@ typedef enum _RF_TX_NUM { RF_TX_NUM_NONIMPLEMENT, } RF_TX_NUM; -#define MAX_POWER_INDEX 0x3F - /*------------------------------Define structure----------------------------*/ typedef struct _BB_REGISTER_DEFINITION { u32 rfintfs; /* set software control: */ @@ -59,111 +57,110 @@ typedef struct _BB_REGISTER_DEFINITION { /* ---------------------------------------------------------------------- */ u8 PHY_GetTxPowerByRateBase( - IN PADAPTER Adapter, - IN u8 Band, - IN u8 RfPath, - IN RATE_SECTION RateSection + PADAPTER Adapter, + u8 Band, + u8 RfPath, + RATE_SECTION RateSection ); -VOID +void PHY_GetRateValuesOfTxPowerByRate( - IN PADAPTER pAdapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Value, - OUT u8 *Rate, - OUT s8 *PwrByRateVal, - OUT u8 *RateNum + PADAPTER pAdapter, + u32 RegAddr, + u32 BitMask, + u32 Value, + u8 *Rate, + s8 *PwrByRateVal, + u8 *RateNum ); u8 PHY_GetRateIndexOfTxPowerByRate( - IN u8 Rate + u8 Rate ); -VOID +void phy_set_tx_power_index_by_rate_section( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Channel, - IN u8 RateSection + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Channel, + u8 RateSection ); s8 _PHY_GetTxPowerByRate( - IN PADAPTER pAdapter, - IN u8 Band, - IN enum rf_path RFPath, - IN u8 RateIndex + PADAPTER pAdapter, + u8 Band, + enum rf_path RFPath, + u8 RateIndex ); s8 PHY_GetTxPowerByRate( - IN PADAPTER pAdapter, - IN u8 Band, - IN enum rf_path RFPath, - IN u8 RateIndex + PADAPTER pAdapter, + u8 Band, + enum rf_path RFPath, + u8 RateIndex ); -VOID +void PHY_SetTxPowerByRate( - IN PADAPTER pAdapter, - IN u8 Band, - IN enum rf_path RFPath, - IN u8 Rate, - IN s8 Value + PADAPTER pAdapter, + u8 Band, + enum rf_path RFPath, + u8 Rate, + s8 Value ); -VOID +void phy_set_tx_power_level_by_path( - IN PADAPTER Adapter, - IN u8 channel, - IN u8 path + PADAPTER Adapter, + u8 channel, + u8 path ); -VOID +void PHY_SetTxPowerIndexByRateArray( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN enum channel_width BandWidth, - IN u8 Channel, - IN u8 *Rates, - IN u8 RateArraySize + PADAPTER pAdapter, + enum rf_path RFPath, + enum channel_width BandWidth, + u8 Channel, + u8 *Rates, + u8 RateArraySize ); -VOID +void PHY_InitTxPowerByRate( - IN PADAPTER pAdapter + PADAPTER pAdapter ); -VOID +void phy_store_tx_power_by_rate( - IN PADAPTER pAdapter, - IN u32 Band, - IN u32 RfPath, - IN u32 TxNum, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data + PADAPTER pAdapter, + u32 Band, + u32 RfPath, + u32 TxNum, + u32 RegAddr, + u32 BitMask, + u32 Data ); -VOID +void PHY_TxPowerByRateConfiguration( - IN PADAPTER pAdapter + PADAPTER pAdapter ); -u8 -PHY_GetTxPowerIndexBase( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, +u8 phy_get_pg_txpwr_idx( + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, u8 ntx_idx, - IN enum channel_width BandWidth, - IN u8 Channel, - OUT PBOOLEAN bIn24G + enum channel_width BandWidth, + u8 Channel, + PBOOLEAN bIn24G ); -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT s8 phy_get_txpwr_lmt_abs(_adapter *adapter , const char *regd_name , BAND_TYPE band, enum channel_width bw @@ -182,9 +179,9 @@ s8 PHY_GetTxPowerLimit(_adapter *adapter , u8 rfpath, u8 rate, u8 ntx_idx, u8 cch ); #else -#define phy_get_txpwr_lmt_abs(adapter, regd_name, band, bw, tlrs, ntx_idx, cch, lock) MAX_POWER_INDEX -#define phy_get_txpwr_lmt(adapter, regd_name, band, bw, rfpath, rs, ntx_idx, cch, lock) MAX_POWER_INDEX -#define PHY_GetTxPowerLimit(adapter, regd_name, band, bw, rfpath, rate, ntx_idx, cch) MAX_POWER_INDEX +#define phy_get_txpwr_lmt_abs(adapter, regd_name, band, bw, tlrs, ntx_idx, cch, lock) (GET_HAL_SPEC(adapter)->txgi_max) +#define phy_get_txpwr_lmt(adapter, regd_name, band, bw, rfpath, rs, ntx_idx, cch, lock) (GET_HAL_SPEC(adapter)->txgi_max) +#define PHY_GetTxPowerLimit(adapter, regd_name, band, bw, rfpath, rate, ntx_idx, cch) (GET_HAL_SPEC(adapter)->txgi_max) #endif /* CONFIG_TXPWR_LIMIT */ s8 @@ -196,28 +193,42 @@ PHY_GetTxPowerTrackingOffset( struct txpwr_idx_comp { u8 ntx_idx; - u8 base; + u8 pg; s8 by_rate; s8 limit; s8 tpt; s8 ebias; + s8 btc; + s8 dpd; }; +#define txpwr_idx_comp_set(_tic, _ntx_idx, _pg, _by_rate, _limit, _tpt, _ebias, _btc, _dpd) \ + do { \ + (_tic)->ntx_idx = _ntx_idx; \ + (_tic)->pg = _pg; \ + (_tic)->by_rate = _by_rate; \ + (_tic)->limit = _limit; \ + (_tic)->tpt = _tpt; \ + (_tic)->ebias = _ebias; \ + (_tic)->btc = _btc; \ + (_tic)->dpd = _dpd; \ + } while (0) + u8 phy_get_tx_power_index( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN enum channel_width BandWidth, - IN u8 Channel + PADAPTER pAdapter, + enum rf_path RFPath, + u8 Rate, + enum channel_width BandWidth, + u8 Channel ); -VOID +void PHY_SetTxPowerIndex( - IN PADAPTER pAdapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate + PADAPTER pAdapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate ); void dump_tx_power_idx_title(void *sel, _adapter *adapter); @@ -227,7 +238,7 @@ void dump_tx_power_idx(void *sel, _adapter *adapter); bool phy_is_tx_power_limit_needed(_adapter *adapter); bool phy_is_tx_power_by_rate_needed(_adapter *adapter); int phy_load_tx_power_by_rate(_adapter *adapter, u8 chk_file); -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT int phy_load_tx_power_limit(_adapter *adapter, u8 chk_file); #endif void phy_load_tx_power_ext_info(_adapter *adapter, u8 chk_file); @@ -275,7 +286,7 @@ int rtw_get_phy_file_path(_adapter *adapter, const char *file_name); #define PHY_FILE_WIFI_ANT_ISOLATION "wifi_ant_isolation.txt" -#define MAX_PARA_FILE_BUF_LEN 25600 +#define MAX_PARA_FILE_BUF_LEN 32768 /* 32k */ #define LOAD_MAC_PARA_FILE BIT0 #define LOAD_BB_PARA_FILE BIT1 @@ -285,17 +296,17 @@ int rtw_get_phy_file_path(_adapter *adapter, const char *file_name); #define LOAD_RF_TXPWR_TRACK_PARA_FILE BIT5 #define LOAD_RF_TXPWR_LMT_PARA_FILE BIT6 -int phy_ConfigMACWithParaFile(IN PADAPTER Adapter, IN char *pFileName); -int phy_ConfigBBWithParaFile(IN PADAPTER Adapter, IN char *pFileName, IN u32 ConfigType); -int phy_ConfigBBWithPgParaFile(IN PADAPTER Adapter, IN const char *pFileName); -int phy_ConfigBBWithMpParaFile(IN PADAPTER Adapter, IN char *pFileName); -int PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN char *pFileName, IN enum rf_path eRFPath); -int PHY_ConfigRFWithTxPwrTrackParaFile(IN PADAPTER Adapter, IN char *pFileName); -#ifdef CONFIG_TXPWR_LIMIT -int PHY_ConfigRFWithPowerLimitTableParaFile(IN PADAPTER Adapter, IN const char *pFileName); +int phy_ConfigMACWithParaFile(PADAPTER Adapter, char *pFileName); +int phy_ConfigBBWithParaFile(PADAPTER Adapter, char *pFileName, u32 ConfigType); +int phy_ConfigBBWithPgParaFile(PADAPTER Adapter, const char *pFileName); +int phy_ConfigBBWithMpParaFile(PADAPTER Adapter, char *pFileName); +int PHY_ConfigRFWithParaFile(PADAPTER Adapter, char *pFileName, enum rf_path eRFPath); +int PHY_ConfigRFWithTxPwrTrackParaFile(PADAPTER Adapter, char *pFileName); +#if CONFIG_TXPWR_LIMIT +int PHY_ConfigRFWithPowerLimitTableParaFile(PADAPTER Adapter, const char *pFileName); #endif void phy_free_filebuf_mask(_adapter *padapter, u8 mask); void phy_free_filebuf(_adapter *padapter); #endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */ - +u8 phy_check_under_survey_ch(_adapter *adapter); #endif /* __HAL_COMMON_H__ */ diff --git a/include/hal_com_reg.h b/include/hal_com_reg.h index 862164f..11b7cc7 100644 --- a/include/hal_com_reg.h +++ b/include/hal_com_reg.h @@ -254,10 +254,10 @@ #define REG_HWSEQ_CTRL 0x0423 #define REG_BCNQ_BDNY 0x0424 #define REG_MGQ_BDNY 0x0425 -#define REG_LIFETIME_CTRL 0x0426 +#define REG_LIFETIME_EN 0x0426 #define REG_MULTI_BCNQ_OFFSET 0x0427 #define REG_SPEC_SIFS 0x0428 -#define REG_RL 0x042A +#define REG_RETRY_LIMIT 0x042A #define REG_DARFRC 0x0430 #define REG_RARFRC 0x0438 #define REG_RRSR 0x0440 @@ -289,8 +289,9 @@ #define REG_POWER_STAGE1 0x04B4 #define REG_POWER_STAGE2 0x04B8 -#define REG_PKT_VO_VI_LIFE_TIME 0x04C0 -#define REG_PKT_BE_BK_LIFE_TIME 0x04C2 +#define REG_PKT_LIFE_TIME 0x04C0 +#define REG_PKT_LIFE_TIME_VO_VI 0x04C0 +#define REG_PKT_LIFE_TIME_BE_BK 0x04C2 #define REG_STBC_SETTING 0x04C4 #define REG_QUEUE_CTRL 0x04C6 #define REG_SINGLE_AMPDU_CTRL 0x04c7 @@ -369,7 +370,7 @@ #define REG_BCN_CTRL_1 0x0551 #define REG_MBID_NUM 0x0552 #define REG_DUAL_TSF_RST 0x0553 -#define REG_BCN_INTERVAL 0x0554 /* The same as REG_MBSSID_BCN_SPACE */ +#define REG_MBSSID_BCN_SPACE 0x0554 #define REG_DRVERLYINT 0x0558 #define REG_BCNDMATIM 0x0559 #define REG_ATIMWND 0x055A @@ -429,6 +430,8 @@ #define REG_CTS2TO 0x0641 #define REG_EIFS 0x0642 +/*REG_TCR*/ +#define BIT_PWRBIT_OW_EN BIT(7) /* RXERR_RPT */ #define RXERR_TYPE_OFDM_PPDU 0 @@ -490,9 +493,25 @@ #define REG_BCN_PSR_RPT 0x06A8 #define REG_BT_COEX_TABLE 0x06C0 +#define BIT_WKFCAM_WE BIT(16) +#define BIT_WKFCAM_POLLING_V1 BIT(31) +#define BIT_WKFCAM_CLR_V1 BIT(30) +#define BIT_SHIFT_WKFCAM_ADDR_V2 8 +#define BIT_MASK_WKFCAM_ADDR_V2 0xff +#define BIT_WKFCAM_ADDR_V2(x) (((x) & BIT_MASK_WKFCAM_ADDR_V2) << BIT_SHIFT_WKFCAM_ADDR_V2) + /* Hardware Port 1 */ #define REG_MACID1 0x0700 #define REG_BSSID1 0x0708 + +/* Enable/Disable Port 0 and Port 1 for Specific ICs (ex. 8192F)*/ +#define REG_WLAN_ACT_MASK_CTRL_1 0x076C + +/* GPIO Control */ +#define REG_SW_GPIO_SHARE_CTRL 0x1038 +#define REG_SW_GPIO_A_OUT 0x1040 +#define REG_SW_GPIO_A_OEN 0x1044 + /* Hardware Port 2 */ #define REG_MACID2 0x1620 #define REG_BSSID2 0x1628 @@ -573,16 +592,6 @@ #define IDR0 REG_MACID /* MAC ID Register, Offset 0x0050-0x0053 */ #define IDR4 (REG_MACID + 4) /* MAC ID Register, Offset 0x0054-0x0055 */ - -/* -* 9. Security Control Registers (Offset: ) -* */ -#define RWCAM REG_CAMCMD /* IN 8190 Data Sheet is called CAMcmd */ -#define WCAMI REG_CAMWRITE /* Software write CAM input content */ -#define RCAMO REG_CAMREAD /* Software read/write CAM config */ -#define CAMDBG REG_CAMDBG -#define SECR REG_SECCFG /* Security Configuration Register */ - /* Unused register */ #define UnusedRegister 0x1BF #define DCAM UnusedRegister @@ -671,6 +680,22 @@ Default: 00b. #define USB_INTR_CONTENT_HISRE_OFFSET 52 #define USB_INTR_CONTENT_LENGTH 56 +/* WOL bit information */ +#define HAL92C_WOL_PTK_UPDATE_EVENT BIT(0) +#define HAL92C_WOL_GTK_UPDATE_EVENT BIT(1) +#define HAL92C_WOL_DISASSOC_EVENT BIT(2) +#define HAL92C_WOL_DEAUTH_EVENT BIT(3) +#define HAL92C_WOL_FW_DISCONNECT_EVENT BIT(4) + + +/*---------------------------------------------------------------------------- +** REG_CCK_CHECK (offset 0x454) +------------------------------------------------------------------------------*/ +#define BIT_BCN_PORT_SEL BIT(5) +#define BIT_EN_BCN_PKT_REL BIT(6) + +#endif /* RTW_HALMAC */ + /* ---------------------------------------------------------------------------- * Response Rate Set Register (offset 0x440, 24bits) * ---------------------------------------------------------------------------- */ @@ -698,21 +723,6 @@ Default: 00b. #define RRSR_CCK_RATES (RRSR_11M | RRSR_5_5M | RRSR_2M | RRSR_1M) #define RRSR_OFDM_RATES (RRSR_54M | RRSR_48M | RRSR_36M | RRSR_24M | RRSR_18M | RRSR_12M | RRSR_9M | RRSR_6M) -/* WOL bit information */ -#define HAL92C_WOL_PTK_UPDATE_EVENT BIT(0) -#define HAL92C_WOL_GTK_UPDATE_EVENT BIT(1) -#define HAL92C_WOL_DISASSOC_EVENT BIT(2) -#define HAL92C_WOL_DEAUTH_EVENT BIT(3) -#define HAL92C_WOL_FW_DISCONNECT_EVENT BIT(4) - - -/*---------------------------------------------------------------------------- -** REG_CCK_CHECK (offset 0x454) -------------------------------------------------------------------------------*/ -#define BIT_BCN_PORT_SEL BIT(5) -#define BIT_EN_BCN_PKT_REL BIT(6) - -#endif /* RTW_HALMAC */ /* ---------------------------------------------------------------------------- * Rate Definition @@ -1234,6 +1244,15 @@ Current IOREG MAP #define EFUSE_BT_SEL_1 0x2 #define EFUSE_BT_SEL_2 0x3 +/* 2 REG_GPIO_INTM (Offset 0x0048) */ +#define BIT_EXTWOL_EN BIT(16) + +/* 2 REG_LED_CFG (Offset 0x004C) */ +#define BIT_SW_SPDT_SEL BIT(22) + +/* 2 REG_SW_GPIO_SHARE_CTRL (Offset 0x1038) */ +#define BIT_BTGP_WAKE_LOC (BIT(10) | BIT(11)) +#define BIT_SW_GPIO_FUNC BIT(0) /* 2 8051FWDL * 2 MCUFWDL */ @@ -1379,7 +1398,8 @@ Current IOREG MAP #define QUEUE_LOW 1 #define QUEUE_NORMAL 2 #define QUEUE_HIGH 3 - +#define QUEUE_EXTRA_1 4 +#define QUEUE_EXTRA_2 5 /* 2 TRXFF_BNDY */ @@ -1481,8 +1501,13 @@ Current IOREG MAP #define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) /* 2 RL */ -#define RETRY_LIMIT_SHORT_SHIFT 8 -#define RETRY_LIMIT_LONG_SHIFT 0 +#define BIT_SHIFT_SRL 8 +#define BIT_MASK_SRL 0x3f +#define BIT_SRL(x) (((x) & BIT_MASK_SRL) << BIT_SHIFT_SRL) + +#define BIT_SHIFT_LRL 0 +#define BIT_MASK_LRL 0x3f +#define BIT_LRL(x) (((x) & BIT_MASK_LRL) << BIT_SHIFT_LRL) #define RL_VAL_AP 7 #ifdef CONFIG_RTW_CUSTOMIZE_RLSTA @@ -1502,11 +1527,6 @@ Current IOREG MAP #define AC_PARAM_ECW_MIN_OFFSET 8 #define AC_PARAM_AIFS_OFFSET 0 - -#define _LRL(x) ((x) & 0x3F) -#define _SRL(x) (((x) & 0x3F) << 8) - - /* 2 BCN_CTRL */ #define EN_TXBCN_RPT BIT(2) #define EN_BCN_FUNCTION BIT(3) @@ -1517,11 +1537,6 @@ Current IOREG MAP #define DIS_BCNQ_SUB BIT(1) #define DIS_TSF_UDT BIT(4) -/* The same function but different bit field. */ -#define DIS_TSF_UDT0_NORMAL_CHIP BIT(4) -#define DIS_TSF_UDT0_TEST_CHIP BIT(5) - - /* 2 ACMHWCTRL */ #define AcmHw_HwEn BIT(0) #define AcmHw_VoqEn BIT(1) @@ -1610,6 +1625,13 @@ Current IOREG MAP #define BIT_LSIC_TXOP_EN BIT(17) #define BIT_CTS_EN BIT(16) +/*REG_RXFLTMAP1 (Offset 0x6A2)*/ +#define BIT_CTRLFLT10EN BIT(10) /*PS-POLL*/ + +/*REG_WLAN_ACT_MASK_CTRL_1 (Offset 0x76C)*/ +#define EN_PORT_0_FUNCTION BIT(12) +#define EN_PORT_1_FUNCTION BIT(13) + /* ----------------------------------------------------- * * SDIO Bus Specification @@ -1651,6 +1673,7 @@ Current IOREG MAP #define SDIO_MAX_RX_QUEUE 1 #define SDIO_REG_TX_CTRL 0x0000 /* SDIO Tx Control */ +#define SDIO_REG_TIMEOUT 0x0002/*SDIO status timeout*/ #define SDIO_REG_HIMR 0x0014 /* SDIO Host Interrupt Mask */ #define SDIO_REG_HISR 0x0018 /* SDIO Host Interrupt Service Routine */ #define SDIO_REG_HCPWM 0x0019 /* HCI Current Power Mode */ @@ -1745,6 +1768,19 @@ Current IOREG MAP #define SDIO_TX_FREE_PG_QUEUE 4 /* The number of Tx FIFO free page */ #define SDIO_TX_FIFO_PAGE_SZ 128 +/* indirect access */ +#ifdef CONFIG_SDIO_INDIRECT_ACCESS +#define SDIO_REG_INDIRECT_REG_CFG 0x40 +#define SDIO_REG_INDIRECT_REG_DATA 0x44 +#define SET_INDIRECT_REG_ADDR(_cmd, _addr) SET_BITS_TO_LE_2BYTE(((u8 *)(_cmd)) + 0, 0, 16, (_addr)) +#define SET_INDIRECT_REG_SIZE_1BYTE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 0) +#define SET_INDIRECT_REG_SIZE_2BYTE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 1) +#define SET_INDIRECT_REG_SIZE_4BYTE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 2) +#define SET_INDIRECT_REG_WRITE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 2, 1, 1) +#define SET_INDIRECT_REG_READ(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 3, 1, 1) +#define GET_INDIRECT_REG_RDY(_cmd) LE_BITS_TO_1BYTE(((u8 *)(_cmd)) + 2, 4, 1) +#endif/*CONFIG_SDIO_INDIRECT_ACCESS*/ + #ifdef CONFIG_SDIO_HCI #define MAX_TX_AGG_PACKET_NUMBER 0x8 #else @@ -1822,8 +1858,10 @@ Current IOREG MAP #define LAST_ENTRY_OF_TX_PKT_BUFFER_8703B 255 #define LAST_ENTRY_OF_TX_PKT_BUFFER_DUAL_MAC 127 #define LAST_ENTRY_OF_TX_PKT_BUFFER_8188F 255 +#define LAST_ENTRY_OF_TX_PKT_BUFFER_8188GTV 255 #define LAST_ENTRY_OF_TX_PKT_BUFFER_8723D 255 - +#define LAST_ENTRY_OF_TX_PKT_BUFFER_8710B 255 +#define LAST_ENTRY_OF_TX_PKT_BUFFER_8192F 255 #define POLLING_LLT_THRESHOLD 20 #if defined(CONFIG_RTL8723B) && defined(CONFIG_PCI_HCI) #define POLLING_READY_TIMEOUT_COUNT 6000 diff --git a/include/hal_data.h b/include/hal_data.h index 35d7c2d..bdbff7a 100644 --- a/include/hal_data.h +++ b/include/hal_data.h @@ -21,6 +21,7 @@ #ifdef CONFIG_BT_COEXIST #include #endif + #include #ifdef CONFIG_SDIO_HCI #include @@ -133,10 +134,19 @@ typedef enum _RX_AGG_MODE { #ifdef CONFIG_RTL8188F #define EFUSE_MAP_SIZE 512 #endif +#ifdef CONFIG_RTL8188GTV + #define EFUSE_MAP_SIZE 512 +#endif +#ifdef CONFIG_RTL8710B + #define EFUSE_MAP_SIZE 512 +#endif +#ifdef CONFIG_RTL8192F + #define EFUSE_MAP_SIZE 512 +#endif #if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) #define EFUSE_MAX_SIZE 1024 -#elif defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8703B) +#elif defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8710B) #define EFUSE_MAX_SIZE 256 #else #define EFUSE_MAX_SIZE 512 @@ -217,6 +227,8 @@ struct hal_spec_t { u8 rfpath_num_2g:4; /* used for tx power index path */ u8 rfpath_num_5g:4; /* used for tx power index path */ + u8 txgi_max; /* maximum tx power gain index */ + u8 txgi_pdbm; /* tx power gain index per dBm */ u8 max_tx_cnt; u8 tx_nss_num:4; @@ -227,7 +239,14 @@ struct hal_spec_t { u8 proto_cap; /* value of PROTO_CAP_XXX */ u8 wl_func; /* value of WL_FUNC_XXX */ +#if CONFIG_TX_AC_LIFETIME + u8 tx_aclt_unit_factor; /* how many 32us */ +#endif + + u8 rx_tsf_filter:1; + u8 pg_txpwr_saddr; /* starting address of PG tx power info */ + u8 pg_txgi_diff_factor; /* PG tx power gain index diff to tx power gain index */ u8 hci_type; /* value of HCI Type */ }; @@ -265,7 +284,7 @@ typedef struct hal_p2p_ps_para { u8 noa_sel:1; u8 all_sta_sleep:1; u8 discovery:1; - u8 rsvd2:1; + u8 disable_close_rf:1; u8 p2p_port_id; u8 p2p_group; u8 p2p_macid; @@ -298,7 +317,7 @@ typedef struct hal_p2p_ps_para { #define TXPWR_LMT_RS_NUM_2G 4 /* CCK, OFDM, HT, VHT */ #define TXPWR_LMT_RS_NUM_5G 3 /* OFDM, HT, VHT */ -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT extern const char *const _txpwr_lmt_rs_str[]; #define txpwr_lmt_rs_str(rs) (((rs) >= TXPWR_LMT_RS_NUM) ? _txpwr_lmt_rs_str[TXPWR_LMT_RS_NUM] : _txpwr_lmt_rs_str[(rs)]) @@ -382,8 +401,9 @@ typedef struct hal_com_data { u16 ForcedDataRate; /* Force Data Rate. 0: Auto, 0x02: 1M ~ 0x6C: 54M. */ u8 bDumpRxPkt; u8 bDumpTxPkt; - u8 dis_turboedca; - + u8 dis_turboedca; /* 1: disable turboedca, + 2: disable turboedca and setting EDCA parameter based on the input parameter*/ + u32 edca_param_mode; /****** EEPROM setting.******/ u8 bautoload_fail_flag; @@ -429,7 +449,9 @@ typedef struct hal_com_data { #endif /*CONFIG_RF_POWER_TRIM*/ #if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || \ - defined(CONFIG_RTL8723D) + defined(CONFIG_RTL8723D) || \ + defined(CONFIG_RTL8192F) + u8 adjuseVoltageVal; u8 need_restore; #endif @@ -470,12 +492,15 @@ typedef struct hal_com_data { u8 TxPwrByRateBase5G[TX_PWR_BY_RATE_NUM_RF] [MAX_BASE_NUM_IN_PHY_REG_PG_5G]; +#if defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) + u32 txagc_set_buf; +#endif + u8 txpwr_by_rate_loaded:1; u8 txpwr_by_rate_from_file:1; u8 txpwr_limit_loaded:1; u8 txpwr_limit_from_file:1; u8 rf_power_tracking_type; - u8 CurrentTxPwrIdx; /* Read/write are allow for following hardware information variables */ u8 crystal_cap; @@ -505,7 +530,10 @@ typedef struct hal_com_data { /* RDG enable */ BOOLEAN bRDGEnable; - u16 RegRRSR; + #if defined (CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) + u32 RegRRSR; + #endif + /****** antenna diversity ******/ u8 AntDivCfg; u8 with_extenal_ant_switch; @@ -539,7 +567,11 @@ typedef struct hal_com_data { u32 interfaceIndex; #ifdef CONFIG_P2P +#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP + u16 p2p_ps_offload; +#else u8 p2p_ps_offload; +#endif #endif /* Auto FSM to Turn On, include clock, isolation, power control for MAC only */ u8 bMacPwrCtrlOn; @@ -581,7 +613,11 @@ typedef struct hal_com_data { /* SDIO Tx FIFO related. */ /* */ /* HIQ, MID, LOW, PUB free pages; padapter->xmitpriv.free_txpg */ +#ifdef CONFIG_RTL8192F + u16 SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE]; +#else u8 SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE]; +#endif/*CONFIG_RTL8192F*/ _lock SdioTxFIFOFreePageLock; u8 SdioTxOQTMaxFreeSpace; u8 SdioTxOQTFreeSpace; @@ -593,7 +629,11 @@ typedef struct hal_com_data { /* SDIO Rx FIFO related. */ /* */ u8 SdioRxFIFOCnt; +#ifdef CONFIG_RTL8822C + u32 SdioRxFIFOSize; +#else u16 SdioRxFIFOSize; +#endif #ifndef RTW_HALMAC u32 sdio_tx_max_len[SDIO_MAX_TX_QUEUE];/* H, N, L, used for sdio tx aggregation max length per queue */ @@ -685,7 +725,7 @@ typedef struct hal_com_data { #endif /* CONFIG_BT_COEXIST */ #if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) \ - || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8723D) + || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D)|| defined(CONFIG_RTL8192F) #ifndef CONFIG_PCI_HCI /* mutual exclusive with PCI -- so they're SDIO and GSPI */ /* Interrupt relatd register information. */ u32 SysIntrStatus; @@ -737,7 +777,7 @@ typedef struct hal_com_data { struct hal_iqk_reg_backup iqk_reg_backup[MAX_IQK_INFO_BACKUP_CHNL_NUM]; #ifdef RTW_HALMAC - u8 drv_rsvd_page_number; + u16 drv_rsvd_page_number; #endif #ifdef CONFIG_BEAMFORMING @@ -755,6 +795,9 @@ typedef struct hal_com_data { #ifdef CONFIG_RTW_LED struct led_priv led; #endif + /* for multi channel case (ex: MCC/TDLS) */ + u8 multi_ch_switch_mode; + } HAL_DATA_COMMON, *PHAL_DATA_COMMON; typedef struct hal_com_data HAL_DATA_TYPE, *PHAL_DATA_TYPE; @@ -782,260 +825,4 @@ typedef struct hal_com_data HAL_DATA_TYPE, *PHAL_DATA_TYPE; int rtw_halmac_deinit_adapter(struct dvobj_priv *); #endif /* RTW_HALMAC */ -/* alias for phydm coding style */ -#define REG_OFDM_0_XA_TX_IQ_IMBALANCE rOFDM0_XATxIQImbalance -#define REG_OFDM_0_ECCA_THRESHOLD rOFDM0_ECCAThreshold -#define REG_FPGA0_XB_LSSI_READ_BACK rFPGA0_XB_LSSIReadBack -#define REG_FPGA0_TX_GAIN_STAGE rFPGA0_TxGainStage -#define REG_OFDM_0_XA_AGC_CORE1 rOFDM0_XAAGCCore1 -#define REG_OFDM_0_XB_AGC_CORE1 rOFDM0_XBAGCCore1 -#define REG_A_TX_SCALE_JAGUAR rA_TxScale_Jaguar -#define REG_B_TX_SCALE_JAGUAR rB_TxScale_Jaguar - -#define REG_FPGA0_XAB_RF_INTERFACE_SW rFPGA0_XAB_RFInterfaceSW -#define REG_FPGA0_XAB_RF_PARAMETER rFPGA0_XAB_RFParameter -#define REG_FPGA0_XA_HSSI_PARAMETER1 rFPGA0_XA_HSSIParameter1 -#define REG_FPGA0_XA_LSSI_PARAMETER rFPGA0_XA_LSSIParameter -#define REG_FPGA0_XA_RF_INTERFACE_OE rFPGA0_XA_RFInterfaceOE -#define REG_FPGA0_XB_HSSI_PARAMETER1 rFPGA0_XB_HSSIParameter1 -#define REG_FPGA0_XB_LSSI_PARAMETER rFPGA0_XB_LSSIParameter -#define REG_FPGA0_XB_LSSI_READ_BACK rFPGA0_XB_LSSIReadBack -#define REG_FPGA0_XB_RF_INTERFACE_OE rFPGA0_XB_RFInterfaceOE -#define REG_FPGA0_XCD_RF_INTERFACE_SW rFPGA0_XCD_RFInterfaceSW -#define REG_FPGA0_XCD_SWITCH_CONTROL rFPGA0_XCD_SwitchControl -#define REG_FPGA1_TX_BLOCK rFPGA1_TxBlock -#define REG_FPGA1_TX_INFO rFPGA1_TxInfo -#define REG_IQK_AGC_CONT rIQK_AGC_Cont -#define REG_IQK_AGC_PTS rIQK_AGC_Pts -#define REG_IQK_AGC_RSP rIQK_AGC_Rsp -#define REG_OFDM_0_AGC_RSSI_TABLE rOFDM0_AGCRSSITable -#define REG_OFDM_0_ECCA_THRESHOLD rOFDM0_ECCAThreshold -#define REG_OFDM_0_RX_IQ_EXT_ANTA rOFDM0_RxIQExtAnta -#define REG_OFDM_0_TR_MUX_PAR rOFDM0_TRMuxPar -#define REG_OFDM_0_TRX_PATH_ENABLE rOFDM0_TRxPathEnable -#define REG_OFDM_0_XA_AGC_CORE1 rOFDM0_XAAGCCore1 -#define REG_OFDM_0_XA_RX_IQ_IMBALANCE rOFDM0_XARxIQImbalance -#define REG_OFDM_0_XA_TX_IQ_IMBALANCE rOFDM0_XATxIQImbalance -#define REG_OFDM_0_XB_AGC_CORE1 rOFDM0_XBAGCCore1 -#define REG_OFDM_0_XB_RX_IQ_IMBALANCE rOFDM0_XBRxIQImbalance -#define REG_OFDM_0_XB_TX_IQ_IMBALANCE rOFDM0_XBTxIQImbalance -#define REG_OFDM_0_XC_TX_AFE rOFDM0_XCTxAFE -#define REG_OFDM_0_XD_TX_AFE rOFDM0_XDTxAFE - -/*#define REG_A_CFO_LONG_DUMP_92E rA_CfoLongDump_92E*/ -#define REG_A_CFO_LONG_DUMP_JAGUAR rA_CfoLongDump_Jaguar -/*#define REG_A_CFO_SHORT_DUMP_92E rA_CfoShortDump_92E*/ -#define REG_A_CFO_SHORT_DUMP_JAGUAR rA_CfoShortDump_Jaguar -#define REG_A_RFE_PINMUX_JAGUAR rA_RFE_Pinmux_Jaguar -/*#define REG_A_RSSI_DUMP_92E rA_RSSIDump_92E*/ -#define REG_A_RSSI_DUMP_JAGUAR rA_RSSIDump_Jaguar -/*#define REG_A_RX_SNR_DUMP_92E rA_RXsnrDump_92E*/ -#define REG_A_RX_SNR_DUMP_JAGUAR rA_RXsnrDump_Jaguar -/*#define REG_A_TX_AGC rA_TXAGC*/ -#define REG_A_TX_SCALE_JAGUAR rA_TxScale_Jaguar -#define REG_BW_INDICATION_JAGUAR rBWIndication_Jaguar -/*#define REG_B_BBSWING rB_BBSWING*/ -/*#define REG_B_CFO_LONG_DUMP_92E rB_CfoLongDump_92E*/ -#define REG_B_CFO_LONG_DUMP_JAGUAR rB_CfoLongDump_Jaguar -/*#define REG_B_CFO_SHORT_DUMP_92E rB_CfoShortDump_92E*/ -#define REG_B_CFO_SHORT_DUMP_JAGUAR rB_CfoShortDump_Jaguar -/*#define REG_B_RSSI_DUMP_92E rB_RSSIDump_92E*/ -#define REG_B_RSSI_DUMP_JAGUAR rB_RSSIDump_Jaguar -/*#define REG_B_RX_SNR_DUMP_92E rB_RXsnrDump_92E*/ -#define REG_B_RX_SNR_DUMP_JAGUAR rB_RXsnrDump_Jaguar -/*#define REG_B_TX_AGC rB_TXAGC*/ -#define REG_B_TX_SCALE_JAGUAR rB_TxScale_Jaguar -#define REG_BLUE_TOOTH rBlue_Tooth -#define REG_CCK_0_AFE_SETTING rCCK0_AFESetting -/*#define REG_C_BBSWING rC_BBSWING*/ -/*#define REG_C_TX_AGC rC_TXAGC*/ -#define REG_C_TX_SCALE_JAGUAR2 rC_TxScale_Jaguar2 -#define REG_CONFIG_ANT_A rConfig_AntA -#define REG_CONFIG_ANT_B rConfig_AntB -#define REG_CONFIG_PMPD_ANT_A rConfig_Pmpd_AntA -#define REG_CONFIG_PMPD_ANT_B rConfig_Pmpd_AntB -#define REG_DPDT_CONTROL rDPDT_control -/*#define REG_D_BBSWING rD_BBSWING*/ -/*#define REG_D_TX_AGC rD_TXAGC*/ -#define REG_D_TX_SCALE_JAGUAR2 rD_TxScale_Jaguar2 -#define REG_FPGA0_ANALOG_PARAMETER4 rFPGA0_AnalogParameter4 -#define REG_FPGA0_IQK rFPGA0_IQK -#define REG_FPGA0_PSD_FUNCTION rFPGA0_PSDFunction -#define REG_FPGA0_PSD_REPORT rFPGA0_PSDReport -#define REG_FPGA0_RFMOD rFPGA0_RFMOD -#define REG_FPGA0_TX_GAIN_STAGE rFPGA0_TxGainStage -#define REG_FPGA0_XAB_RF_INTERFACE_SW rFPGA0_XAB_RFInterfaceSW -#define REG_FPGA0_XAB_RF_PARAMETER rFPGA0_XAB_RFParameter -#define REG_FPGA0_XA_HSSI_PARAMETER1 rFPGA0_XA_HSSIParameter1 -#define REG_FPGA0_XA_LSSI_PARAMETER rFPGA0_XA_LSSIParameter -#define REG_FPGA0_XA_RF_INTERFACE_OE rFPGA0_XA_RFInterfaceOE -#define REG_FPGA0_XB_HSSI_PARAMETER1 rFPGA0_XB_HSSIParameter1 -#define REG_FPGA0_XB_LSSI_PARAMETER rFPGA0_XB_LSSIParameter -#define REG_FPGA0_XB_LSSI_READ_BACK rFPGA0_XB_LSSIReadBack -#define REG_FPGA0_XB_RF_INTERFACE_OE rFPGA0_XB_RFInterfaceOE -#define REG_FPGA0_XCD_RF_INTERFACE_SW rFPGA0_XCD_RFInterfaceSW -#define REG_FPGA0_XCD_SWITCH_CONTROL rFPGA0_XCD_SwitchControl -#define REG_FPGA1_TX_BLOCK rFPGA1_TxBlock -#define REG_FPGA1_TX_INFO rFPGA1_TxInfo -#define REG_IQK_AGC_CONT rIQK_AGC_Cont -#define REG_IQK_AGC_PTS rIQK_AGC_Pts -#define REG_IQK_AGC_RSP rIQK_AGC_Rsp -#define REG_OFDM_0_AGC_RSSI_TABLE rOFDM0_AGCRSSITable -#define REG_OFDM_0_ECCA_THRESHOLD rOFDM0_ECCAThreshold -#define REG_OFDM_0_RX_IQ_EXT_ANTA rOFDM0_RxIQExtAnta -#define REG_OFDM_0_TR_MUX_PAR rOFDM0_TRMuxPar -#define REG_OFDM_0_TRX_PATH_ENABLE rOFDM0_TRxPathEnable -#define REG_OFDM_0_XA_AGC_CORE1 rOFDM0_XAAGCCore1 -#define REG_OFDM_0_XA_RX_IQ_IMBALANCE rOFDM0_XARxIQImbalance -#define REG_OFDM_0_XA_TX_IQ_IMBALANCE rOFDM0_XATxIQImbalance -#define REG_OFDM_0_XB_AGC_CORE1 rOFDM0_XBAGCCore1 -#define REG_OFDM_0_XB_RX_IQ_IMBALANCE rOFDM0_XBRxIQImbalance -#define REG_OFDM_0_XB_TX_IQ_IMBALANCE rOFDM0_XBTxIQImbalance -#define REG_OFDM_0_XC_TX_AFE rOFDM0_XCTxAFE -#define REG_OFDM_0_XD_TX_AFE rOFDM0_XDTxAFE -#define REG_PMPD_ANAEN rPMPD_ANAEN -#define REG_PDP_ANT_A rPdp_AntA -#define REG_PDP_ANT_A_4 rPdp_AntA_4 -#define REG_PDP_ANT_B rPdp_AntB -#define REG_PDP_ANT_B_4 rPdp_AntB_4 -#define REG_PWED_TH_JAGUAR rPwed_TH_Jaguar -#define REG_RX_CCK rRx_CCK -#define REG_RX_IQK rRx_IQK -#define REG_RX_IQK_PI_A rRx_IQK_PI_A -#define REG_RX_IQK_PI_B rRx_IQK_PI_B -#define REG_RX_IQK_TONE_A rRx_IQK_Tone_A -#define REG_RX_IQK_TONE_B rRx_IQK_Tone_B -#define REG_RX_OFDM rRx_OFDM -#define REG_RX_POWER_AFTER_IQK_A_2 rRx_Power_After_IQK_A_2 -#define REG_RX_POWER_AFTER_IQK_B_2 rRx_Power_After_IQK_B_2 -#define REG_RX_POWER_BEFORE_IQK_A_2 rRx_Power_Before_IQK_A_2 -#define REG_RX_POWER_BEFORE_IQK_B_2 rRx_Power_Before_IQK_B_2 -#define REG_RX_TO_RX rRx_TO_Rx -#define REG_RX_WAIT_CCA rRx_Wait_CCA -#define REG_RX_WAIT_RIFS rRx_Wait_RIFS -#define REG_S0_S1_PATH_SWITCH rS0S1_PathSwitch -/*#define REG_S1_RXEVM_DUMP_92E rS1_RXevmDump_92E*/ -#define REG_S1_RXEVM_DUMP_JAGUAR rS1_RXevmDump_Jaguar -/*#define REG_S2_RXEVM_DUMP_92E rS2_RXevmDump_92E*/ -#define REG_S2_RXEVM_DUMP_JAGUAR rS2_RXevmDump_Jaguar -#define REG_SYM_WLBT_PAPE_SEL rSYM_WLBT_PAPE_SEL -#define REG_SINGLE_TONE_CONT_TX_JAGUAR rSingleTone_ContTx_Jaguar -#define REG_SLEEP rSleep -#define REG_STANDBY rStandby -#define REG_TX_AGC_A_CCK_11_CCK_1_JAGUAR rTxAGC_A_CCK11_CCK1_JAguar -#define REG_TX_AGC_A_CCK_1_MCS32 rTxAGC_A_CCK1_Mcs32 -#define REG_TX_AGC_A_MCS11_MCS8_JAGUAR rTxAGC_A_MCS11_MCS8_JAguar -#define REG_TX_AGC_A_MCS15_MCS12_JAGUAR rTxAGC_A_MCS15_MCS12_JAguar -#define REG_TX_AGC_A_MCS19_MCS16_JAGUAR rTxAGC_A_MCS19_MCS16_JAguar -#define REG_TX_AGC_A_MCS23_MCS20_JAGUAR rTxAGC_A_MCS23_MCS20_JAguar -#define REG_TX_AGC_A_MCS3_MCS0_JAGUAR rTxAGC_A_MCS3_MCS0_JAguar -#define REG_TX_AGC_A_MCS7_MCS4_JAGUAR rTxAGC_A_MCS7_MCS4_JAguar -#define REG_TX_AGC_A_MCS03_MCS00 rTxAGC_A_Mcs03_Mcs00 -#define REG_TX_AGC_A_MCS07_MCS04 rTxAGC_A_Mcs07_Mcs04 -#define REG_TX_AGC_A_MCS11_MCS08 rTxAGC_A_Mcs11_Mcs08 -#define REG_TX_AGC_A_MCS15_MCS12 rTxAGC_A_Mcs15_Mcs12 -#define REG_TX_AGC_A_NSS1_INDEX3_NSS1_INDEX0_JAGUAR rTxAGC_A_Nss1Index3_Nss1Index0_JAguar -#define REG_TX_AGC_A_NSS1_INDEX7_NSS1_INDEX4_JAGUAR rTxAGC_A_Nss1Index7_Nss1Index4_JAguar -#define REG_TX_AGC_A_NSS2_INDEX1_NSS1_INDEX8_JAGUAR rTxAGC_A_Nss2Index1_Nss1Index8_JAguar -#define REG_TX_AGC_A_NSS2_INDEX5_NSS2_INDEX2_JAGUAR rTxAGC_A_Nss2Index5_Nss2Index2_JAguar -#define REG_TX_AGC_A_NSS2_INDEX9_NSS2_INDEX6_JAGUAR rTxAGC_A_Nss2Index9_Nss2Index6_JAguar -#define REG_TX_AGC_A_NSS3_INDEX3_NSS3_INDEX0_JAGUAR rTxAGC_A_Nss3Index3_Nss3Index0_JAguar -#define REG_TX_AGC_A_NSS3_INDEX7_NSS3_INDEX4_JAGUAR rTxAGC_A_Nss3Index7_Nss3Index4_JAguar -#define REG_TX_AGC_A_NSS3_INDEX9_NSS3_INDEX8_JAGUAR rTxAGC_A_Nss3Index9_Nss3Index8_JAguar -#define REG_TX_AGC_A_OFDM18_OFDM6_JAGUAR rTxAGC_A_Ofdm18_Ofdm6_JAguar -#define REG_TX_AGC_A_OFDM54_OFDM24_JAGUAR rTxAGC_A_Ofdm54_Ofdm24_JAguar -#define REG_TX_AGC_A_RATE18_06 rTxAGC_A_Rate18_06 -#define REG_TX_AGC_A_RATE54_24 rTxAGC_A_Rate54_24 -#define REG_TX_AGC_B_CCK_11_A_CCK_2_11 rTxAGC_B_CCK11_A_CCK2_11 -#define REG_TX_AGC_B_CCK_11_CCK_1_JAGUAR rTxAGC_B_CCK11_CCK1_JAguar -#define REG_TX_AGC_B_CCK_1_55_MCS32 rTxAGC_B_CCK1_55_Mcs32 -#define REG_TX_AGC_B_MCS11_MCS8_JAGUAR rTxAGC_B_MCS11_MCS8_JAguar -#define REG_TX_AGC_B_MCS15_MCS12_JAGUAR rTxAGC_B_MCS15_MCS12_JAguar -#define REG_TX_AGC_B_MCS19_MCS16_JAGUAR rTxAGC_B_MCS19_MCS16_JAguar -#define REG_TX_AGC_B_MCS23_MCS20_JAGUAR rTxAGC_B_MCS23_MCS20_JAguar -#define REG_TX_AGC_B_MCS3_MCS0_JAGUAR rTxAGC_B_MCS3_MCS0_JAguar -#define REG_TX_AGC_B_MCS7_MCS4_JAGUAR rTxAGC_B_MCS7_MCS4_JAguar -#define REG_TX_AGC_B_MCS03_MCS00 rTxAGC_B_Mcs03_Mcs00 -#define REG_TX_AGC_B_MCS07_MCS04 rTxAGC_B_Mcs07_Mcs04 -#define REG_TX_AGC_B_MCS11_MCS08 rTxAGC_B_Mcs11_Mcs08 -#define REG_TX_AGC_B_MCS15_MCS12 rTxAGC_B_Mcs15_Mcs12 -#define REG_TX_AGC_B_NSS1_INDEX3_NSS1_INDEX0_JAGUAR rTxAGC_B_Nss1Index3_Nss1Index0_JAguar -#define REG_TX_AGC_B_NSS1_INDEX7_NSS1_INDEX4_JAGUAR rTxAGC_B_Nss1Index7_Nss1Index4_JAguar -#define REG_TX_AGC_B_NSS2_INDEX1_NSS1_INDEX8_JAGUAR rTxAGC_B_Nss2Index1_Nss1Index8_JAguar -#define REG_TX_AGC_B_NSS2_INDEX5_NSS2_INDEX2_JAGUAR rTxAGC_B_Nss2Index5_Nss2Index2_JAguar -#define REG_TX_AGC_B_NSS2_INDEX9_NSS2_INDEX6_JAGUAR rTxAGC_B_Nss2Index9_Nss2Index6_JAguar -#define REG_TX_AGC_B_NSS3_INDEX3_NSS3_INDEX0_JAGUAR rTxAGC_B_Nss3Index3_Nss3Index0_JAguar -#define REG_TX_AGC_B_NSS3_INDEX7_NSS3_INDEX4_JAGUAR rTxAGC_B_Nss3Index7_Nss3Index4_JAguar -#define REG_TX_AGC_B_NSS3_INDEX9_NSS3_INDEX8_JAGUAR rTxAGC_B_Nss3Index9_Nss3Index8_JAguar -#define REG_TX_AGC_B_OFDM18_OFDM6_JAGUAR rTxAGC_B_Ofdm18_Ofdm6_JAguar -#define REG_TX_AGC_B_OFDM54_OFDM24_JAGUAR rTxAGC_B_Ofdm54_Ofdm24_JAguar -#define REG_TX_AGC_B_RATE18_06 rTxAGC_B_Rate18_06 -#define REG_TX_AGC_B_RATE54_24 rTxAGC_B_Rate54_24 -#define REG_TX_AGC_C_CCK_11_CCK_1_JAGUAR rTxAGC_C_CCK11_CCK1_JAguar -#define REG_TX_AGC_C_MCS11_MCS8_JAGUAR rTxAGC_C_MCS11_MCS8_JAguar -#define REG_TX_AGC_C_MCS15_MCS12_JAGUAR rTxAGC_C_MCS15_MCS12_JAguar -#define REG_TX_AGC_C_MCS19_MCS16_JAGUAR rTxAGC_C_MCS19_MCS16_JAguar -#define REG_TX_AGC_C_MCS23_MCS20_JAGUAR rTxAGC_C_MCS23_MCS20_JAguar -#define REG_TX_AGC_C_MCS3_MCS0_JAGUAR rTxAGC_C_MCS3_MCS0_JAguar -#define REG_TX_AGC_C_MCS7_MCS4_JAGUAR rTxAGC_C_MCS7_MCS4_JAguar -#define REG_TX_AGC_C_NSS1_INDEX3_NSS1_INDEX0_JAGUAR rTxAGC_C_Nss1Index3_Nss1Index0_JAguar -#define REG_TX_AGC_C_NSS1_INDEX7_NSS1_INDEX4_JAGUAR rTxAGC_C_Nss1Index7_Nss1Index4_JAguar -#define REG_TX_AGC_C_NSS2_INDEX1_NSS1_INDEX8_JAGUAR rTxAGC_C_Nss2Index1_Nss1Index8_JAguar -#define REG_TX_AGC_C_NSS2_INDEX5_NSS2_INDEX2_JAGUAR rTxAGC_C_Nss2Index5_Nss2Index2_JAguar -#define REG_TX_AGC_C_NSS2_INDEX9_NSS2_INDEX6_JAGUAR rTxAGC_C_Nss2Index9_Nss2Index6_JAguar -#define REG_TX_AGC_C_NSS3_INDEX3_NSS3_INDEX0_JAGUAR rTxAGC_C_Nss3Index3_Nss3Index0_JAguar -#define REG_TX_AGC_C_NSS3_INDEX7_NSS3_INDEX4_JAGUAR rTxAGC_C_Nss3Index7_Nss3Index4_JAguar -#define REG_TX_AGC_C_NSS3_INDEX9_NSS3_INDEX8_JAGUAR rTxAGC_C_Nss3Index9_Nss3Index8_JAguar -#define REG_TX_AGC_C_OFDM18_OFDM6_JAGUAR rTxAGC_C_Ofdm18_Ofdm6_JAguar -#define REG_TX_AGC_C_OFDM54_OFDM24_JAGUAR rTxAGC_C_Ofdm54_Ofdm24_JAguar -#define REG_TX_AGC_D_CCK_11_CCK_1_JAGUAR rTxAGC_D_CCK11_CCK1_JAguar -#define REG_TX_AGC_D_MCS11_MCS8_JAGUAR rTxAGC_D_MCS11_MCS8_JAguar -#define REG_TX_AGC_D_MCS15_MCS12_JAGUAR rTxAGC_D_MCS15_MCS12_JAguar -#define REG_TX_AGC_D_MCS19_MCS16_JAGUAR rTxAGC_D_MCS19_MCS16_JAguar -#define REG_TX_AGC_D_MCS23_MCS20_JAGUAR rTxAGC_D_MCS23_MCS20_JAguar -#define REG_TX_AGC_D_MCS3_MCS0_JAGUAR rTxAGC_D_MCS3_MCS0_JAguar -#define REG_TX_AGC_D_MCS7_MCS4_JAGUAR rTxAGC_D_MCS7_MCS4_JAguar -#define REG_TX_AGC_D_NSS1_INDEX3_NSS1_INDEX0_JAGUAR rTxAGC_D_Nss1Index3_Nss1Index0_JAguar -#define REG_TX_AGC_D_NSS1_INDEX7_NSS1_INDEX4_JAGUAR rTxAGC_D_Nss1Index7_Nss1Index4_JAguar -#define REG_TX_AGC_D_NSS2_INDEX1_NSS1_INDEX8_JAGUAR rTxAGC_D_Nss2Index1_Nss1Index8_JAguar -#define REG_TX_AGC_D_NSS2_INDEX5_NSS2_INDEX2_JAGUAR rTxAGC_D_Nss2Index5_Nss2Index2_JAguar -#define REG_TX_AGC_D_NSS2_INDEX9_NSS2_INDEX6_JAGUAR rTxAGC_D_Nss2Index9_Nss2Index6_JAguar -#define REG_TX_AGC_D_NSS3_INDEX3_NSS3_INDEX0_JAGUAR rTxAGC_D_Nss3Index3_Nss3Index0_JAguar -#define REG_TX_AGC_D_NSS3_INDEX7_NSS3_INDEX4_JAGUAR rTxAGC_D_Nss3Index7_Nss3Index4_JAguar -#define REG_TX_AGC_D_NSS3_INDEX9_NSS3_INDEX8_JAGUAR rTxAGC_D_Nss3Index9_Nss3Index8_JAguar -#define REG_TX_AGC_D_OFDM18_OFDM6_JAGUAR rTxAGC_D_Ofdm18_Ofdm6_JAguar -#define REG_TX_AGC_D_OFDM54_OFDM24_JAGUAR rTxAGC_D_Ofdm54_Ofdm24_JAguar -#define REG_TX_PATH_JAGUAR rTxPath_Jaguar -#define REG_TX_CCK_BBON rTx_CCK_BBON -#define REG_TX_CCK_RFON rTx_CCK_RFON -#define REG_TX_IQK rTx_IQK -#define REG_TX_IQK_PI_A rTx_IQK_PI_A -#define REG_TX_IQK_PI_B rTx_IQK_PI_B -#define REG_TX_IQK_TONE_A rTx_IQK_Tone_A -#define REG_TX_IQK_TONE_B rTx_IQK_Tone_B -#define REG_TX_OFDM_BBON rTx_OFDM_BBON -#define REG_TX_OFDM_RFON rTx_OFDM_RFON -#define REG_TX_POWER_AFTER_IQK_A rTx_Power_After_IQK_A -#define REG_TX_POWER_AFTER_IQK_B rTx_Power_After_IQK_B -#define REG_TX_POWER_BEFORE_IQK_A rTx_Power_Before_IQK_A -#define REG_TX_POWER_BEFORE_IQK_B rTx_Power_Before_IQK_B -#define REG_TX_TO_RX rTx_To_Rx -#define REG_TX_TO_TX rTx_To_Tx -#define REG_APK rAPK -#define REG_ANTSEL_SW_JAGUAR r_ANTSEL_SW_Jaguar - - - -#define rf_welut_jaguar RF_WeLut_Jaguar -#define rf_mode_table_addr RF_ModeTableAddr -#define rf_mode_table_data0 RF_ModeTableData0 -#define rf_mode_table_data1 RF_ModeTableData1 - - - - - - -#define RX_SMOOTH_FACTOR Rx_Smooth_Factor - #endif /* __HAL_DATA_H__ */ diff --git a/include/hal_ic_cfg.h b/include/hal_ic_cfg.h index bd88df3..08e31d8 100644 --- a/include/hal_ic_cfg.h +++ b/include/hal_ic_cfg.h @@ -21,6 +21,7 @@ #define RTL8723B_SUPPORT 0 #define RTL8723D_SUPPORT 0 #define RTL8192E_SUPPORT 0 +#define RTL8192F_SUPPORT 0 #define RTL8814A_SUPPORT 0 #define RTL8195A_SUPPORT 0 #define RTL8197F_SUPPORT 0 @@ -32,9 +33,14 @@ #define RTL8710B_SUPPORT 0 #define RTL8814B_SUPPORT 0 #define RTL8824B_SUPPORT 0 -#define RTL8192F_SUPPORT 0 #define RTL8198F_SUPPORT 0 #define RTL8195B_SUPPORT 0 +#define RTL8822C_SUPPORT 0 +#define RTL8721D_SUPPORT 0 +#define RTL8812F_SUPPORT 0 +#define RTL8197G_SUPPORT 0 +#define RTL8721D_SUPPORT 0 + /*#if (RTL8188E_SUPPORT==1)*/ #define RATE_ADAPTIVE_SUPPORT 0 #define POWER_TRAINING_ACTIVE 0 @@ -42,6 +48,9 @@ #ifdef CONFIG_MULTIDRV #endif +/*feature for all IC*/ +#define RTW_DYNAMIC_RRSR + #ifdef CONFIG_RTL8188E #undef RTL8188E_SUPPORT #undef RATE_ADAPTIVE_SUPPORT @@ -58,6 +67,12 @@ #ifndef CONFIG_FW_C2H_PKT #define CONFIG_FW_C2H_PKT #endif + #ifdef CONFIG_BEAMFORMING + #define CONFIG_BEAMFORMER_FW_NDPA + #define BEAMFORMING_SUPPORT 1 /*for phydm beamforming*/ + #define SUPPORT_MU_BF 0 + #endif /*CONFIG_BEAMFORMING*/ + #define CONFIG_RTS_FULL_BW #endif #ifdef CONFIG_RTL8821A @@ -66,6 +81,12 @@ #ifndef CONFIG_FW_C2H_PKT #define CONFIG_FW_C2H_PKT #endif + #ifdef CONFIG_BEAMFORMING + #define CONFIG_BEAMFORMER_FW_NDPA + #define BEAMFORMING_SUPPORT 1 /*for phydm beamforming*/ + #define SUPPORT_MU_BF 0 + #endif + #define CONFIG_RTS_FULL_BW #endif #ifdef CONFIG_RTL8192E @@ -74,6 +95,24 @@ #ifndef CONFIG_FW_C2H_PKT #define CONFIG_FW_C2H_PKT #endif + #define CONFIG_RTS_FULL_BW +#endif + +#ifdef CONFIG_RTL8192F + #undef RTL8192F_SUPPORT + #define RTL8192F_SUPPORT 1 + #ifndef CONFIG_FW_C2H_PKT + #define CONFIG_FW_C2H_PKT + #endif + #ifndef CONFIG_RTW_MAC_HIDDEN_RPT + #define CONFIG_RTW_MAC_HIDDEN_RPT + #endif + /*#define CONFIG_AMPDU_PRETX_CD*/ + /*#define DBG_LA_MODE*/ + #ifdef CONFIG_P2P_PS + #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP + #endif + #define CONFIG_RTS_FULL_BW #endif #ifdef CONFIG_RTL8723B @@ -82,6 +121,7 @@ #ifndef CONFIG_FW_C2H_PKT #define CONFIG_FW_C2H_PKT #endif + #define CONFIG_RTS_FULL_BW #endif #ifdef CONFIG_RTL8723D @@ -96,6 +136,7 @@ #ifndef CONFIG_RTW_CUSTOMER_STR #define CONFIG_RTW_CUSTOMER_STR #endif + #define CONFIG_RTS_FULL_BW #endif #ifdef CONFIG_RTL8814A @@ -104,6 +145,12 @@ #ifndef CONFIG_FW_C2H_PKT #define CONFIG_FW_C2H_PKT #endif + #define CONFIG_FW_CORRECT_BCN + #ifdef CONFIG_BEAMFORMING + #define BEAMFORMING_SUPPORT 1 /*for phydm beamforming*/ + #define SUPPORT_MU_BF 0 + #endif + #define CONFIG_RTS_FULL_BW #endif #ifdef CONFIG_RTL8703B @@ -115,6 +162,7 @@ #ifndef CONFIG_RTW_MAC_HIDDEN_RPT #define CONFIG_RTW_MAC_HIDDEN_RPT #endif + #define CONFIG_RTS_FULL_BW #endif #ifdef CONFIG_RTL8188F @@ -129,6 +177,22 @@ #ifndef CONFIG_RTW_CUSTOMER_STR #define CONFIG_RTW_CUSTOMER_STR #endif + #define CONFIG_RTS_FULL_BW +#endif + +#ifdef CONFIG_RTL8188GTV + #undef RTL8188F_SUPPORT + #define RTL8188F_SUPPORT 1 + #ifndef CONFIG_FW_C2H_PKT + #define CONFIG_FW_C2H_PKT + #endif + #ifndef CONFIG_RTW_MAC_HIDDEN_RPT + #define CONFIG_RTW_MAC_HIDDEN_RPT + #endif + #ifndef CONFIG_RTW_CUSTOMER_STR + #define CONFIG_RTW_CUSTOMER_STR + #endif + #define CONFIG_RTS_FULL_BW #endif #ifdef CONFIG_RTL8822B @@ -139,6 +203,87 @@ #endif /* CONFIG_FW_C2H_PKT */ #define RTW_TX_PA_BIAS /* Adjust TX PA Bias from eFuse */ #define CONFIG_DFS /* Enable 5G band 2&3 channel */ + #define RTW_AMPDU_AGG_RETRY_AND_NEW + + #ifdef CONFIG_WOWLAN + #define CONFIG_GTK_OL + /*#define CONFIG_ARP_KEEP_ALIVE*/ + + #ifdef CONFIG_GPIO_WAKEUP + #ifndef WAKEUP_GPIO_IDX + #define WAKEUP_GPIO_IDX 6 /* WIFI Chip Side */ + #endif /* !WAKEUP_GPIO_IDX */ + #endif /* CONFIG_GPIO_WAKEUP */ + #endif /* CONFIG_WOWLAN */ + + #ifdef CONFIG_CONCURRENT_MODE + #define CONFIG_AP_PORT_SWAP + #define CONFIG_FW_MULTI_PORT_SUPPORT + #endif /* CONFIG_CONCURRENT_MODE */ + + /* + * Beamforming related definition + */ + /* Only support new beamforming mechanism */ + #ifdef CONFIG_BEAMFORMING + #define RTW_BEAMFORMING_VERSION_2 + #endif /* CONFIG_BEAMFORMING */ + + #ifndef CONFIG_RTW_MAC_HIDDEN_RPT + #define CONFIG_RTW_MAC_HIDDEN_RPT + #endif /* CONFIG_RTW_MAC_HIDDEN_RPT */ + + #ifndef DBG_RX_DFRAME_RAW_DATA + #define DBG_RX_DFRAME_RAW_DATA + #endif /* DBG_RX_DFRAME_RAW_DATA */ + + #ifndef RTW_IQK_FW_OFFLOAD + #define RTW_IQK_FW_OFFLOAD + #endif /* RTW_IQK_FW_OFFLOAD */ + + /* Checksum offload feature */ + /*#define CONFIG_TCP_CSUM_OFFLOAD_TX*/ /* not ready */ + #define CONFIG_TCP_CSUM_OFFLOAD_RX + + #define CONFIG_ADVANCE_OTA + + #ifdef CONFIG_MCC_MODE + #define CONFIG_MCC_MODE_V2 + #define CONFIG_MCC_PHYDM_OFFLOAD + #endif /* CONFIG_MCC_MODE */ + + #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) + #define CONFIG_TDLS_CH_SW_V2 + #endif + + #ifndef RTW_CHANNEL_SWITCH_OFFLOAD + #ifdef CONFIG_TDLS_CH_SW_V2 + #define RTW_CHANNEL_SWITCH_OFFLOAD + #endif + #endif /* RTW_CHANNEL_SWITCH_OFFLOAD */ + + #if defined(CONFIG_RTW_MESH) && !defined(RTW_PER_CMD_SUPPORT_FW) + /* Supported since fw v22.1 */ + #define RTW_PER_CMD_SUPPORT_FW + #endif /* RTW_PER_CMD_SUPPORT_FW */ + #define CONFIG_SUPPORT_FIFO_DUMP + #define CONFIG_HW_P0_TSF_SYNC + #define CONFIG_BCN_RECV_TIME + #ifdef CONFIG_P2P_PS + #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP + #endif + #define CONFIG_RTS_FULL_BW +#endif /* CONFIG_RTL8822B */ + +#ifdef CONFIG_RTL8822C + #undef RTL8822C_SUPPORT + #define RTL8822C_SUPPORT 1 + #define DBG_LA_MODE + #ifndef CONFIG_FW_C2H_PKT + #define CONFIG_FW_C2H_PKT + #endif /* CONFIG_FW_C2H_PKT */ + #define RTW_TX_PA_BIAS /* Adjust TX PA Bias from eFuse */ + #define CONFIG_DFS /* Enable 5G band 2&3 channel */ #ifdef CONFIG_WOWLAN #define CONFIG_GTK_OL @@ -159,8 +304,6 @@ /* * Beamforming related definition */ - /* Beamforming mechanism is on driver not phydm, always disable it */ - #define BEAMFORMING_SUPPORT 0 /* Only support new beamforming mechanism */ #ifdef CONFIG_BEAMFORMING #define RTW_BEAMFORMING_VERSION_2 @@ -175,8 +318,16 @@ #endif /* DBG_RX_DFRAME_RAW_DATA */ #ifndef RTW_IQK_FW_OFFLOAD - #define RTW_IQK_FW_OFFLOAD + /* #define RTW_IQK_FW_OFFLOAD */ #endif /* RTW_IQK_FW_OFFLOAD */ + + /* Checksum offload feature */ + /* #define CONFIG_TX_CSUM_OFFLOAD */ + #if defined(CONFIG_TX_CSUM_OFFLOAD) && !defined(CONFIG_RTW_NETIF_SG) + #define CONFIG_RTW_NETIF_SG + #endif + #define CONFIG_TCP_CSUM_OFFLOAD_RX + #define CONFIG_ADVANCE_OTA #ifdef CONFIG_MCC_MODE @@ -197,11 +348,15 @@ /* Supported since fw v22.1 */ #define RTW_PER_CMD_SUPPORT_FW #endif /* RTW_PER_CMD_SUPPORT_FW */ - - #ifndef CONFIG_DYNAMIC_SOML - #define CONFIG_DYNAMIC_SOML - #endif /* CONFIG_DYNAMIC_SOML */ -#endif /* CONFIG_RTL8822B */ + #define CONFIG_SUPPORT_FIFO_DUMP + #define CONFIG_HW_P0_TSF_SYNC + #define CONFIG_BCN_RECV_TIME + + #ifdef CONFIG_P2P_PS + #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP + #endif + #define CONFIG_RTS_FULL_BW +#endif /* CONFIG_RTL8822C */ #ifdef CONFIG_RTL8821C #undef RTL8821C_SUPPORT @@ -230,15 +385,27 @@ #endif /* RTW_IQK_FW_OFFLOAD */ /*#define CONFIG_AMPDU_PRETX_CD*/ /*#define DBG_PRE_TX_HANG*/ - /* - * Beamforming related definition - */ - /* Beamforming mechanism is on driver not phydm, always disable it */ - #define BEAMFORMING_SUPPORT 0 + + /* Beamforming related definition */ /* Only support new beamforming mechanism */ #ifdef CONFIG_BEAMFORMING #define RTW_BEAMFORMING_VERSION_2 #endif /* CONFIG_BEAMFORMING */ + #define CONFIG_HW_P0_TSF_SYNC + #define CONFIG_BCN_RECV_TIME + #ifdef CONFIG_P2P_PS + #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP + #endif + #define CONFIG_RTS_FULL_BW +#endif /*CONFIG_RTL8821C*/ + +#ifdef CONFIG_RTL8710B + #undef RTL8710B_SUPPORT + #define RTL8710B_SUPPORT 1 + #ifndef CONFIG_FW_C2H_PKT + #define CONFIG_FW_C2H_PKT + #endif + #define CONFIG_RTS_FULL_BW #endif #endif /*__HAL_IC_CFG_H__*/ diff --git a/include/hal_intf.h b/include/hal_intf.h index bf6ce00..ded71b7 100644 --- a/include/hal_intf.h +++ b/include/hal_intf.h @@ -34,9 +34,13 @@ enum _CHIP_TYPE { RTL8814A, RTL8703B, RTL8188F, + RTL8188GTV, RTL8822B, RTL8723D, RTL8821C, + RTL8710B, + RTL8192F, + RTL8822C, MAX_CHIP_TYPE }; @@ -67,6 +71,7 @@ typedef enum _HW_VARIABLES { HW_VAR_BASIC_RATE, HW_VAR_TXPAUSE, HW_VAR_BCN_FUNC, + HW_VAR_BCN_CTRL_ADDR, HW_VAR_CORRECT_TSF, HW_VAR_RCR, HW_VAR_MLME_DISCONNECT, @@ -82,7 +87,6 @@ typedef enum _HW_VARIABLES { HW_VAR_SEC_DK_CFG, HW_VAR_BCN_VALID, HW_VAR_RF_TYPE, - HW_VAR_TSF, HW_VAR_FREECNT, /* PHYDM odm->SupportAbility */ @@ -97,11 +101,14 @@ typedef enum _HW_VARIABLES { HW_VAR_UAPSD_TID, #endif /* CONFIG_WMMPS_STA */ HW_VAR_AMPDU_MIN_SPACE, +#ifdef CONFIG_80211N_HT HW_VAR_AMPDU_FACTOR, +#endif /* CONFIG_80211N_HT */ HW_VAR_RXDMA_AGG_PG_TH, HW_VAR_SET_RPWM, HW_VAR_CPWM, HW_VAR_H2C_FW_PWRMODE, + HW_VAR_H2C_INACTIVE_IPS, HW_VAR_H2C_PS_TUNE_PARAM, HW_VAR_H2C_FW_JOINBSSRPT, HW_VAR_FWLPS_RF_ON, @@ -137,6 +144,8 @@ typedef enum _HW_VARIABLES { #endif HW_VAR_RPWM_TOG, #ifdef CONFIG_GPIO_WAKEUP + HW_VAR_WOW_OUTPUT_GPIO, + HW_VAR_WOW_INPUT_GPIO, HW_SET_GPIO_WL_CTRL, #endif HW_VAR_SYS_CLKR, @@ -195,9 +204,19 @@ typedef enum _HW_VARIABLES { #endif HW_VAR_DUMP_MAC_TXFIFO, HW_VAR_PWR_CMD, +#ifdef CONFIG_FW_HANDLE_TXBCN + HW_VAR_BCN_HEAD_SEL, +#endif HW_VAR_SET_SOML_PARAM, HW_VAR_ENABLE_RX_BAR, HW_VAR_TSF_AUTO_SYNC, + HW_VAR_LPS_STATE_CHK, + #ifdef CONFIG_RTS_FULL_BW + HW_VAR_SET_RTS_BW, + #endif +#if defined(CONFIG_PCI_HCI) + HW_VAR_ENSWBCN, +#endif } HW_VARIABLES; typedef enum _HAL_DEF_VARIABLE { @@ -305,6 +324,7 @@ struct hal_ops { u8(*check_ips_status)(_adapter *padapter); #if defined(CONFIG_PCI_HCI) s32(*interrupt_handler)(_adapter *padapter); + void (*unmap_beacon_icf)(_adapter *padapter); #endif #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT) @@ -322,11 +342,10 @@ struct hal_ops { #endif void (*set_chnl_bw_handler)(_adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Offset40, u8 Offset80); - void (*set_tx_power_level_handler)(_adapter *padapter, u8 channel); - void (*get_tx_power_level_handler)(_adapter *padapter, s32 *powerlevel); - - void (*set_tx_power_index_handler)(_adapter *padapter, u32 powerindex, enum rf_path rfpath, u8 rate); - u8 (*get_tx_power_index_handler)(_adapter *padapter, enum rf_path rfpath, u8 rate, u8 bandwidth, u8 channel, struct txpwr_idx_comp *tic); + void (*set_tx_power_level_handler)(_adapter *adapter, u8 channel); + void (*set_txpwr_done)(_adapter *adapter); + void (*set_tx_power_index_handler)(_adapter *adapter, u32 powerindex, enum rf_path rfpath, u8 rate); + u8 (*get_tx_power_index_handler)(_adapter *adapter, enum rf_path rfpath, u8 rate, u8 bandwidth, u8 channel, struct txpwr_idx_comp *tic); void (*hal_dm_watchdog)(_adapter *padapter); @@ -336,12 +355,12 @@ struct hal_ops { - u8 (*get_hal_def_var_handler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); + u8 (*get_hal_def_var_handler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue); - u8(*SetHalDefVarHandler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); + u8(*SetHalDefVarHandler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue); - void (*GetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, PVOID pValue2); - void (*SetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, BOOLEAN bSet); + void (*GetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, void *pValue2); + void (*SetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, BOOLEAN bSet); void (*SetBeaconRelatedRegistersHandler)(_adapter *padapter); @@ -351,7 +370,10 @@ struct hal_ops { void (*write_bbreg)(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); u32 (*read_rfreg)(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask); void (*write_rfreg)(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data); - +#ifdef CONFIG_SYSON_INDIRECT_ACCESS + u32 (*read_syson_reg)(_adapter *padapter, u32 RegAddr, u32 BitMask); + void (*write_syson_reg)(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); +#endif void (*read_wmmedca_reg)(_adapter *padapter, u16 *vo_params, u16 *vi_params, u16 *be_params, u16 *bk_params); #ifdef CONFIG_HOSTAPD_MLME @@ -367,6 +389,9 @@ struct hal_ops { int (*Efuse_PgPacketWrite)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); u8(*Efuse_WordEnableDataWrite)(_adapter *padapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest); BOOLEAN(*Efuse_PgPacketWrite_BT)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); +#if defined(CONFIG_RTL8710B) + BOOLEAN(*efuse_indirect_read4)(_adapter *padapter, u16 regaddr, u8 *value); +#endif #ifdef DBG_CONFIG_ERROR_DETECT void (*sreset_init_value)(_adapter *padapter); @@ -406,7 +431,9 @@ struct hal_ops { int (*hal_gpio_func_check)(_adapter *padapter, u8 gpio_num); void (*hal_gpio_multi_func_reset)(_adapter *padapter, u8 gpio_num); #endif +#ifdef CONFIG_FW_CORRECT_BCN void (*fw_correct_bcn)(PADAPTER padapter); +#endif #ifdef RTW_HALMAC u8(*init_mac_register)(PADAPTER); @@ -420,7 +447,9 @@ struct hal_ops { #ifdef CONFIG_RFKILL_POLL bool (*hal_radio_onoff_check)(_adapter *adapter, u8 *valid); #endif - +#ifdef CONFIG_PCI_TX_POLLING + void (*tx_poll_handler)(_adapter *adapter); +#endif }; typedef enum _RT_EEPROM_TYPE { @@ -469,12 +498,24 @@ typedef enum _HARDWARE_TYPE { HARDWARE_TYPE_RTL8188FE, HARDWARE_TYPE_RTL8188FU, HARDWARE_TYPE_RTL8188FS, + HARDWARE_TYPE_RTL8188GTVU, + HARDWARE_TYPE_RTL8188GTVS, HARDWARE_TYPE_RTL8723DE, HARDWARE_TYPE_RTL8723DU, HARDWARE_TYPE_RTL8723DS, HARDWARE_TYPE_RTL8821CE, HARDWARE_TYPE_RTL8821CU, HARDWARE_TYPE_RTL8821CS, + HARDWARE_TYPE_RTL8710BU, + HARDWARE_TYPE_RTL8192FS, + HARDWARE_TYPE_RTL8192FU, + HARDWARE_TYPE_RTL8192FE, + HARDWARE_TYPE_RTL8822CE, + HARDWARE_TYPE_RTL8822CU, + HARDWARE_TYPE_RTL8822CS, + HARDWARE_TYPE_RTL8814BE, + HARDWARE_TYPE_RTL8814BU, + HARDWARE_TYPE_RTL8814BS, HARDWARE_TYPE_MAX, } HARDWARE_TYPE; @@ -548,6 +589,18 @@ typedef enum _HARDWARE_TYPE { IS_HARDWARE_TYPE_8723DU(_Adapter) || \ IS_HARDWARE_TYPE_8723DS(_Adapter)) +/* RTL8192F Series */ +#define IS_HARDWARE_TYPE_8192FS(_Adapter)\ + (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FS) +#define IS_HARDWARE_TYPE_8192FU(_Adapter)\ + (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FU) +#define IS_HARDWARE_TYPE_8192FE(_Adapter)\ + (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FE) +#define IS_HARDWARE_TYPE_8192F(_Adapter)\ + (IS_HARDWARE_TYPE_8192FS(_Adapter) ||\ + IS_HARDWARE_TYPE_8192FU(_Adapter) ||\ + IS_HARDWARE_TYPE_8192FE(_Adapter)) + /* RTL8188F Series */ #define IS_HARDWARE_TYPE_8188FE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FE) #define IS_HARDWARE_TYPE_8188FS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FS) @@ -555,6 +608,15 @@ typedef enum _HARDWARE_TYPE { #define IS_HARDWARE_TYPE_8188F(_Adapter) \ (IS_HARDWARE_TYPE_8188FE(_Adapter) || IS_HARDWARE_TYPE_8188FU(_Adapter) || IS_HARDWARE_TYPE_8188FS(_Adapter)) +#define IS_HARDWARE_TYPE_8188GTVU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188GTVU) +#define IS_HARDWARE_TYPE_8188GTVS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188GTVS) +#define IS_HARDWARE_TYPE_8188GTV(_Adapter) \ + (IS_HARDWARE_TYPE_8188GTVU(_Adapter) || IS_HARDWARE_TYPE_8188GTVS(_Adapter)) + +/* RTL8710B Series */ +#define IS_HARDWARE_TYPE_8710BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8710BU) +#define IS_HARDWARE_TYPE_8710B(_Adapter) (IS_HARDWARE_TYPE_8710BU(_Adapter)) + #define IS_HARDWARE_TYPE_8821BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BE) #define IS_HARDWARE_TYPE_8821BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BU) #define IS_HARDWARE_TYPE_8821BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BS) @@ -574,12 +636,29 @@ typedef enum _HARDWARE_TYPE { #define IS_HARDWARE_TYPE_8821C(_Adapter) \ (IS_HARDWARE_TYPE_8821CE(_Adapter) || IS_HARDWARE_TYPE_8821CU(_Adapter) || IS_HARDWARE_TYPE_8821CS(_Adapter)) +#define IS_HARDWARE_TYPE_8822CE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822CE) +#define IS_HARDWARE_TYPE_8822CU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822CU) +#define IS_HARDWARE_TYPE_8822CS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822CS) +#define IS_HARDWARE_TYPE_8822C(_Adapter) \ + (IS_HARDWARE_TYPE_8822CE(_Adapter) || IS_HARDWARE_TYPE_8822CU(_Adapter) || IS_HARDWARE_TYPE_8822CS(_Adapter)) + +#define IS_HARDWARE_TYPE_8814BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814BE) +#define IS_HARDWARE_TYPE_8814BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814BU) +#define IS_HARDWARE_TYPE_8814BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814BS) +#define IS_HARDWARE_TYPE_8814B(_Adapter) \ + (IS_HARDWARE_TYPE_8814BE(_Adapter) || IS_HARDWARE_TYPE_8814BU(_Adapter) || IS_HARDWARE_TYPE_8814BS(_Adapter)) + #define IS_HARDWARE_TYPE_JAGUAR2(_Adapter) \ (IS_HARDWARE_TYPE_8814A(_Adapter) || IS_HARDWARE_TYPE_8821B(_Adapter) || IS_HARDWARE_TYPE_8822B(_Adapter) || IS_HARDWARE_TYPE_8821C(_Adapter)) #define IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(_Adapter) \ (IS_HARDWARE_TYPE_JAGUAR(_Adapter) || IS_HARDWARE_TYPE_JAGUAR2(_Adapter)) +#define IS_HARDWARE_TYPE_JAGUAR3(_Adapter) \ + (IS_HARDWARE_TYPE_8814B(_Adapter) || IS_HARDWARE_TYPE_8822C(_Adapter)) + +#define IS_HARDWARE_TYPE_JAGUAR_ALL(_Adapter) \ + (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(_Adapter) || IS_HARDWARE_TYPE_JAGUAR3(_Adapter)) typedef enum _wowlan_subcode { @@ -613,6 +692,9 @@ u32 rtw_hal_power_on(_adapter *padapter); void rtw_hal_power_off(_adapter *padapter); uint rtw_hal_init(_adapter *padapter); +#ifdef CONFIG_NEW_NETDEV_HDL +uint rtw_hal_iface_init(_adapter *adapter); +#endif uint rtw_hal_deinit(_adapter *padapter); void rtw_hal_stop(_adapter *padapter); u8 rtw_hal_set_hwreg(PADAPTER padapter, u8 variable, u8 *val); @@ -622,11 +704,11 @@ void rtw_hal_chip_configure(_adapter *padapter); u8 rtw_hal_read_chip_info(_adapter *padapter); void rtw_hal_read_chip_version(_adapter *padapter); -u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); -u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); +u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue); +u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue); -void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, BOOLEAN bSet); -void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, PVOID pValue2); +void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, BOOLEAN bSet); +void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, void *pValue2); void rtw_hal_enable_interrupt(_adapter *padapter); void rtw_hal_disable_interrupt(_adapter *padapter); @@ -678,12 +760,19 @@ void rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, #define phy_query_rf_reg(Adapter, eRFPath, RegAddr, BitMask) rtw_hal_read_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask)) #define phy_set_rf_reg(Adapter, eRFPath, RegAddr, BitMask, Data) rtw_hal_write_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data)) +#ifdef CONFIG_SYSON_INDIRECT_ACCESS +u32 rtw_hal_read_syson_reg(PADAPTER padapter, u32 RegAddr, u32 BitMask); +void rtw_hal_write_syson_reg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); +#define hal_query_syson_reg(Adapter, RegAddr, BitMask) rtw_hal_read_syson_reg((Adapter), (RegAddr), (BitMask)) +#define hal_set_syson_reg(Adapter, RegAddr, BitMask, Data) rtw_hal_write_syson_reg((Adapter), (RegAddr), (BitMask), (Data)) +#endif + #define phy_set_mac_reg phy_set_bb_reg #define phy_query_mac_reg phy_query_bb_reg - #if defined(CONFIG_PCI_HCI) s32 rtw_hal_interrupt_handler(_adapter *padapter); + void rtw_hal_unmap_beacon_icf(_adapter *padapter); #endif #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT) void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf); @@ -693,9 +782,6 @@ void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, enum channel_width Band void rtw_hal_dm_watchdog(_adapter *padapter); void rtw_hal_dm_watchdog_in_lps(_adapter *padapter); -void rtw_hal_set_tx_power_level(_adapter *padapter, u8 channel); -void rtw_hal_get_tx_power_level(_adapter *padapter, s32 *powerlevel); - #ifdef CONFIG_HOSTAPD_MLME s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); #endif @@ -757,17 +843,21 @@ void rtw_hal_update_hisr_hsisr_ind(_adapter *padapter, u32 flag); int rtw_hal_gpio_func_check(_adapter *padapter, u8 gpio_num); void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num); #endif - +#ifdef CONFIG_FW_CORRECT_BCN void rtw_hal_fw_correct_bcn(_adapter *padapter); +#endif s32 rtw_hal_fw_dl(_adapter *padapter, u8 wowlan); #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) void rtw_hal_clear_interrupt(_adapter *padapter); #endif -void rtw_hal_set_tx_power_index(PADAPTER adapter, u32 powerindex, enum rf_path rfpath, u8 rate); -u8 rtw_hal_get_tx_power_index(PADAPTER adapter, enum rf_path - rfpath, u8 rate, u8 bandwidth, u8 channel, struct txpwr_idx_comp *tic); +void rtw_hal_set_tx_power_level(_adapter *adapter, u8 channel); +void rtw_hal_set_txpwr_done(_adapter *adapter); +void rtw_hal_set_tx_power_index(_adapter *adapter, u32 powerindex + , enum rf_path rfpath, u8 rate); +u8 rtw_hal_get_tx_power_index(_adapter *adapter, enum rf_path rfpath, u8 rate + , u8 bandwidth, u8 channel, struct txpwr_idx_comp *tic); u8 rtw_hal_ops_check(_adapter *padapter); diff --git a/include/hal_pg.h b/include/hal_pg.h index ad6a557..31fc54d 100644 --- a/include/hal_pg.h +++ b/include/hal_pg.h @@ -320,6 +320,50 @@ #define EEPROM_MAC_ADDR_8188FS 0x11A #define EEPROM_Voltage_ADDR_8188F 0x8 +/* ==================================================== + EEPROM/Efuse PG Offset for 8188GTV/8188GTVS + ==================================================== + */ + +#define GET_PG_KFREE_ON_8188GTV(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) +#define GET_PG_KFREE_THERMAL_K_ON_8188GTV(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) + +#define PPG_BB_GAIN_2G_TXA_OFFSET_8188GTV 0xEE +#define PPG_THERMAL_OFFSET_8188GTV 0xEF + +#define EEPROM_ChannelPlan_8188GTV 0xB8 +#define EEPROM_XTAL_8188GTV 0xB9 +#define EEPROM_THERMAL_METER_8188GTV 0xBA +#define EEPROM_IQK_LCK_8188GTV 0xBB +#define EEPROM_2G_5G_PA_TYPE_8188GTV 0xBC +#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8188GTV 0xBD +#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8188GTV 0xBF + +#define EEPROM_RF_BOARD_OPTION_8188GTV 0xC1 +#define EEPROM_FEATURE_OPTION_8188GTV 0xC2 +#define EEPROM_RF_BT_SETTING_8188GTV 0xC3 +#define EEPROM_VERSION_8188GTV 0xC4 +#define EEPROM_CustomID_8188GTV 0xC5 +#define EEPROM_TX_BBSWING_2G_8188GTV 0xC6 +#define EEPROM_TX_PWR_CALIBRATE_RATE_8188GTV 0xC8 +#define EEPROM_RF_ANTENNA_OPT_8188GTV 0xC9 +#define EEPROM_RFE_OPTION_8188GTV 0xCA +#define EEPROM_COUNTRY_CODE_8188GTV 0xCB +#define EEPROM_CUSTOMER_ID_8188GTV 0x7F +#define EEPROM_SUBCUSTOMER_ID_8188GTV 0x59 + +/* RTL8188GTVU */ +#define EEPROM_MAC_ADDR_8188GTVU 0xD7 +#define EEPROM_VID_8188GTVU 0xD0 +#define EEPROM_PID_8188GTVU 0xD2 +#define EEPROM_PA_TYPE_8188GTVU 0xBC +#define EEPROM_LNA_TYPE_2G_8188GTVU 0xBD +#define EEPROM_USB_OPTIONAL_FUNCTION0_8188GTVU 0xD4 + +/* RTL8188GTVS */ +#define EEPROM_MAC_ADDR_8188GTVS 0x11A +#define EEPROM_Voltage_ADDR_8188GTV 0x8 + /* **************************************************** * EEPROM/Efuse PG Offset for 8723BE/8723BU/8723BS * *****************************************************/ @@ -537,10 +581,126 @@ #define EEPROM_MAC_ADDR_8723DS 0x11A #define EEPROM_Voltage_ADDR_8723D 0x8 +/* + * ==================================================== + * EEPROM/Efuse PG Offset for 8822C + * ==================================================== + */ +#define EEPROM_TX_PWR_INX_8822C 0x10 +#define EEPROM_ChannelPlan_8822C 0xB8 +#define EEPROM_XTAL_8822C 0xB9 +#define EEPROM_IQK_LCK_8822C 0xBB +#define EEPROM_2G_5G_PA_TYPE_8822C 0xBC +/* PATH A & PATH B */ +#define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822C 0xBD +/* PATH C & PATH D */ +#define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8822C 0xBE +/* PATH A & PATH B */ +#define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822C 0xBF +/* PATH C & PATH D */ +#define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8822C 0xC0 + +#define EEPROM_RF_BOARD_OPTION_8822C 0xC1 +#define EEPROM_FEATURE_OPTION_8822C 0xC2 +#define EEPROM_RF_BT_SETTING_8822C 0xC3 +#define EEPROM_VERSION_8822C 0xC4 +#define EEPROM_CustomID_8822C 0xC5 +#define EEPROM_TX_BBSWING_2G_8822C 0xC6 +#define EEPROM_TX_PWR_CALIBRATE_RATE_8822C 0xC8 +#define EEPROM_RF_ANTENNA_OPT_8822C 0xC9 +#define EEPROM_RFE_OPTION_8822C 0xCA +#define EEPROM_COUNTRY_CODE_8822C 0xCB +#define EEPROM_THERMAL_METER_A_8822C 0xD0 +#define EEPROM_THERMAL_METER_B_8822C 0xD1 +/* RTL8822CU */ +#define EEPROM_MAC_ADDR_8822CU 0x157 +#define EEPROM_VID_8822CU 0x100 +#define EEPROM_PID_8822CU 0x102 +#define EEPROM_USB_OPTIONAL_FUNCTION0_8822CU 0x104 +#define EEPROM_USB_MODE_8822CU 0x06 + +/* RTL8822CS */ +#define EEPROM_MAC_ADDR_8822CS 0x16A + +/* RTL8822CE */ +#define EEPROM_MAC_ADDR_8822CE 0x120 + +/* **************************************************** + * EEPROM/Efuse PG Offset for 8192F + * **************************************************** */ +#define EEPROM_ChannelPlan_8192F 0xB8 +#define EEPROM_XTAL_8192F 0xB9 +#define EEPROM_THERMAL_METER_8192F 0xBA +#define EEPROM_IQK_LCK_8192F 0xBB +#define EEPROM_2G_5G_PA_TYPE_8192F 0xBC +#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192F 0xBD +#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192F 0xBF + +#define EEPROM_RF_BOARD_OPTION_8192F 0xC1 +#define EEPROM_FEATURE_OPTION_8192F 0xC2 +#define EEPROM_RF_BT_SETTING_8192F 0xC3 +#define EEPROM_VERSION_8192F 0xC4 +#define EEPROM_CustomID_8192F 0xC5 +#define EEPROM_TX_BBSWING_2G_8192F 0xC6 +#define EEPROM_TX_BBSWING_5G_8192F 0xC7 +#define EEPROM_TX_PWR_CALIBRATE_RATE_8192F 0xC8 +#define EEPROM_RF_ANTENNA_OPT_8192F 0xC9 +#define EEPROM_RFE_OPTION_8192F 0xCA +#define EEPROM_COUNTRY_CODE_8192F 0xCB +/*RTL8192FS*/ +#define EEPROM_MAC_ADDR_8192FS 0x11A +#define EEPROM_Voltage_ADDR_8192F 0x8 +/* RTL8192FU */ +#define EEPROM_MAC_ADDR_8192FU 0x107 +#define EEPROM_VID_8192FU 0x100 +#define EEPROM_PID_8192FU 0x102 +#define EEPROM_USB_OPTIONAL_FUNCTION0_8192FU 0x104 +/* RTL8192FE */ +#define EEPROM_MAC_ADDR_8192FE 0xD0 +#define EEPROM_VID_8192FE 0xD6 +#define EEPROM_DID_8192FE 0xD8 +#define EEPROM_SVID_8192FE 0xDA +#define EEPROM_SMID_8192FE 0xDC + +/* **************************************************** + * EEPROM/Efuse PG Offset for 8710B + * **************************************************** */ +#define RTL_EEPROM_ID_8710B 0x8195 +#define EEPROM_Default_ThermalMeter_8710B 0x1A + +#define EEPROM_CHANNEL_PLAN_8710B 0xC8 +#define EEPROM_XTAL_8710B 0xC9 +#define EEPROM_THERMAL_METER_8710B 0xCA +#define EEPROM_IQK_LCK_8710B 0xCB +#define EEPROM_2G_5G_PA_TYPE_8710B 0xCC +#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8710B 0xCD +#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8710B 0xCF +#define EEPROM_TX_KFREE_8710B 0xEE //Physical Efuse Address +#define EEPROM_THERMAL_8710B 0xEF //Physical Efuse Address +#define EEPROM_PACKAGE_TYPE_8710B 0xF8 //Physical Efuse Address + +#define EEPROM_RF_BOARD_OPTION_8710B 0x131 +#define EEPROM_RF_FEATURE_OPTION_8710B 0x132 +#define EEPROM_RF_BT_SETTING_8710B 0x133 +#define EEPROM_VERSION_8710B 0x134 +#define EEPROM_CUSTOM_ID_8710B 0x135 +#define EEPROM_TX_BBSWING_2G_8710B 0x136 +#define EEPROM_TX_BBSWING_5G_8710B 0x137 +#define EEPROM_TX_PWR_CALIBRATE_RATE_8710B 0x138 +#define EEPROM_RF_ANTENNA_OPT_8710B 0x139 +#define EEPROM_RFE_OPTION_8710B 0x13A +#define EEPROM_COUNTRY_CODE_8710B 0x13B +#define EEPROM_COUNTRY_CODE_2_8710B 0x13C + +#define EEPROM_MAC_ADDR_8710B 0x11A +#define EEPROM_VID_8710BU 0x1C0 +#define EEPROM_PID_8710BU 0x1C2 + /* **************************************************** * EEPROM/Efuse Value Type * **************************************************** */ #define EETYPE_TX_PWR 0x0 +#define EETYPE_MAX_RFE_8192F 0x31 /* **************************************************** * EEPROM/Efuse Default Value * **************************************************** */ @@ -588,8 +748,9 @@ #define EEPROM_Default_ThermalMeter_8703B 0x18 #define EEPROM_Default_ThermalMeter_8723D 0x18 #define EEPROM_Default_ThermalMeter_8188F 0x18 +#define EEPROM_Default_ThermalMeter_8188GTV 0x18 #define EEPROM_Default_ThermalMeter_8814A 0x18 - +#define EEPROM_Default_ThermalMeter_8192F 0x1A #define EEPROM_Default_CrystalCap 0x0 #define EEPROM_Default_CrystalCap_8723A 0x20 @@ -601,6 +762,9 @@ #define EEPROM_Default_CrystalCap_8703B 0x20 #define EEPROM_Default_CrystalCap_8723D 0x20 #define EEPROM_Default_CrystalCap_8188F 0x20 +#define EEPROM_Default_CrystalCap_8188GTV 0x20 +#define EEPROM_Default_CrystalCap_8192F 0x20 +#define EEPROM_Default_CrystalCap_8822C 0x3F #define EEPROM_Default_CrystalFreq 0x0 #define EEPROM_Default_TxPowerLevel_92C 0x22 #define EEPROM_Default_TxPowerLevel_2G 0x2C @@ -748,7 +912,9 @@ typedef enum _BT_CoType { BT_RTL8703B = 12, BT_RTL8822B = 13, BT_RTL8723D = 14, - BT_RTL8821C = 15 + BT_RTL8821C = 15, + BT_RTL8192F = 16, + BT_RTL8822C = 17 } BT_CoType, *PBT_CoType; typedef enum _BT_RadioShared { diff --git a/include/hal_phy.h b/include/hal_phy.h index 342613b..35f901a 100644 --- a/include/hal_phy.h +++ b/include/hal_phy.h @@ -174,61 +174,61 @@ typedef struct RF_Shadow_Compare_Map { u32 PHY_RFShadowRead( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset); + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset); -VOID +void PHY_RFShadowWrite( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset, - IN u32 Data); + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset, + u32 Data); BOOLEAN PHY_RFShadowCompare( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset); + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset); -VOID +void PHY_RFShadowRecorver( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset); + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset); -VOID +void PHY_RFShadowCompareAll( - IN PADAPTER Adapter); + PADAPTER Adapter); -VOID +void PHY_RFShadowRecorverAll( - IN PADAPTER Adapter); + PADAPTER Adapter); -VOID +void PHY_RFShadowCompareFlagSet( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset, - IN u8 Type); + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset, + u8 Type); -VOID +void PHY_RFShadowRecorverFlagSet( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 Offset, - IN u8 Type); + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset, + u8 Type); -VOID +void PHY_RFShadowCompareFlagSetAll( - IN PADAPTER Adapter); + PADAPTER Adapter); -VOID +void PHY_RFShadowRecorverFlagSetAll( - IN PADAPTER Adapter); + PADAPTER Adapter); -VOID +void PHY_RFShadowRefresh( - IN PADAPTER Adapter); + PADAPTER Adapter); #endif /*#CONFIG_RF_SHADOW_RW*/ #endif /* __HAL_COMMON_H__ */ diff --git a/include/hal_phy_reg.h b/include/hal_phy_reg.h index 6e6a99e..13d77ab 100644 --- a/include/hal_phy_reg.h +++ b/include/hal_phy_reg.h @@ -15,11 +15,256 @@ #ifndef __HAL_PHY_REG_H__ #define __HAL_PHY_REG_H__ -/* for PutRFRegsetting & GetRFRegSetting BitMask - * #if (RTL92SE_FPGA_VERIFY == 1) - * #define bRFRegOffsetMask 0xfff - * #else */ +/* for PutRFRegsetting & GetRFRegSetting BitMask*/ #define bRFRegOffsetMask 0xfffff -/* #endif */ + +/* alias for phydm coding style */ +#define REG_OFDM_0_XA_TX_IQ_IMBALANCE rOFDM0_XATxIQImbalance +#define REG_OFDM_0_ECCA_THRESHOLD rOFDM0_ECCAThreshold +#define REG_FPGA0_XB_LSSI_READ_BACK rFPGA0_XB_LSSIReadBack +#define REG_FPGA0_TX_GAIN_STAGE rFPGA0_TxGainStage +#define REG_OFDM_0_XA_AGC_CORE1 rOFDM0_XAAGCCore1 +#define REG_OFDM_0_XB_AGC_CORE1 rOFDM0_XBAGCCore1 +#define REG_A_TX_SCALE_JAGUAR rA_TxScale_Jaguar +#define REG_B_TX_SCALE_JAGUAR rB_TxScale_Jaguar + +#define REG_FPGA0_XAB_RF_INTERFACE_SW rFPGA0_XAB_RFInterfaceSW +#define REG_FPGA0_XAB_RF_PARAMETER rFPGA0_XAB_RFParameter +#define REG_FPGA0_XA_HSSI_PARAMETER1 rFPGA0_XA_HSSIParameter1 +#define REG_FPGA0_XA_LSSI_PARAMETER rFPGA0_XA_LSSIParameter +#define REG_FPGA0_XA_RF_INTERFACE_OE rFPGA0_XA_RFInterfaceOE +#define REG_FPGA0_XB_HSSI_PARAMETER1 rFPGA0_XB_HSSIParameter1 +#define REG_FPGA0_XB_LSSI_PARAMETER rFPGA0_XB_LSSIParameter +#define REG_FPGA0_XB_LSSI_READ_BACK rFPGA0_XB_LSSIReadBack +#define REG_FPGA0_XB_RF_INTERFACE_OE rFPGA0_XB_RFInterfaceOE +#define REG_FPGA0_XCD_RF_INTERFACE_SW rFPGA0_XCD_RFInterfaceSW +#define REG_FPGA0_XCD_SWITCH_CONTROL rFPGA0_XCD_SwitchControl +#define REG_FPGA1_TX_BLOCK rFPGA1_TxBlock +#define REG_FPGA1_TX_INFO rFPGA1_TxInfo +#define REG_IQK_AGC_CONT rIQK_AGC_Cont +#define REG_IQK_AGC_PTS rIQK_AGC_Pts +#define REG_IQK_AGC_RSP rIQK_AGC_Rsp +#define REG_OFDM_0_AGC_RSSI_TABLE rOFDM0_AGCRSSITable +#define REG_OFDM_0_ECCA_THRESHOLD rOFDM0_ECCAThreshold +#define REG_OFDM_0_RX_IQ_EXT_ANTA rOFDM0_RxIQExtAnta +#define REG_OFDM_0_TR_MUX_PAR rOFDM0_TRMuxPar +#define REG_OFDM_0_TRX_PATH_ENABLE rOFDM0_TRxPathEnable +#define REG_OFDM_0_XA_AGC_CORE1 rOFDM0_XAAGCCore1 +#define REG_OFDM_0_XA_RX_IQ_IMBALANCE rOFDM0_XARxIQImbalance +#define REG_OFDM_0_XA_TX_IQ_IMBALANCE rOFDM0_XATxIQImbalance +#define REG_OFDM_0_XB_AGC_CORE1 rOFDM0_XBAGCCore1 +#define REG_OFDM_0_XB_RX_IQ_IMBALANCE rOFDM0_XBRxIQImbalance +#define REG_OFDM_0_XB_TX_IQ_IMBALANCE rOFDM0_XBTxIQImbalance +#define REG_OFDM_0_XC_TX_AFE rOFDM0_XCTxAFE +#define REG_OFDM_0_XD_TX_AFE rOFDM0_XDTxAFE + +/*#define REG_A_CFO_LONG_DUMP_92E rA_CfoLongDump_92E*/ +#define REG_A_CFO_LONG_DUMP_JAGUAR rA_CfoLongDump_Jaguar +/*#define REG_A_CFO_SHORT_DUMP_92E rA_CfoShortDump_92E*/ +#define REG_A_CFO_SHORT_DUMP_JAGUAR rA_CfoShortDump_Jaguar +#define REG_A_RFE_PINMUX_JAGUAR rA_RFE_Pinmux_Jaguar +/*#define REG_A_RSSI_DUMP_92E rA_RSSIDump_92E*/ +#define REG_A_RSSI_DUMP_JAGUAR rA_RSSIDump_Jaguar +/*#define REG_A_RX_SNR_DUMP_92E rA_RXsnrDump_92E*/ +#define REG_A_RX_SNR_DUMP_JAGUAR rA_RXsnrDump_Jaguar +/*#define REG_A_TX_AGC rA_TXAGC*/ +#define REG_A_TX_SCALE_JAGUAR rA_TxScale_Jaguar +#define REG_BW_INDICATION_JAGUAR rBWIndication_Jaguar +/*#define REG_B_BBSWING rB_BBSWING*/ +/*#define REG_B_CFO_LONG_DUMP_92E rB_CfoLongDump_92E*/ +#define REG_B_CFO_LONG_DUMP_JAGUAR rB_CfoLongDump_Jaguar +/*#define REG_B_CFO_SHORT_DUMP_92E rB_CfoShortDump_92E*/ +#define REG_B_CFO_SHORT_DUMP_JAGUAR rB_CfoShortDump_Jaguar +/*#define REG_B_RSSI_DUMP_92E rB_RSSIDump_92E*/ +#define REG_B_RSSI_DUMP_JAGUAR rB_RSSIDump_Jaguar +/*#define REG_B_RX_SNR_DUMP_92E rB_RXsnrDump_92E*/ +#define REG_B_RX_SNR_DUMP_JAGUAR rB_RXsnrDump_Jaguar +/*#define REG_B_TX_AGC rB_TXAGC*/ +#define REG_B_TX_SCALE_JAGUAR rB_TxScale_Jaguar +#define REG_BLUE_TOOTH rBlue_Tooth +#define REG_CCK_0_AFE_SETTING rCCK0_AFESetting +/*#define REG_C_BBSWING rC_BBSWING*/ +/*#define REG_C_TX_AGC rC_TXAGC*/ +#define REG_C_TX_SCALE_JAGUAR2 rC_TxScale_Jaguar2 +#define REG_CONFIG_ANT_A rConfig_AntA +#define REG_CONFIG_ANT_B rConfig_AntB +#define REG_CONFIG_PMPD_ANT_A rConfig_Pmpd_AntA +#define REG_CONFIG_PMPD_ANT_B rConfig_Pmpd_AntB +#define REG_DPDT_CONTROL rDPDT_control +/*#define REG_D_BBSWING rD_BBSWING*/ +/*#define REG_D_TX_AGC rD_TXAGC*/ +#define REG_D_TX_SCALE_JAGUAR2 rD_TxScale_Jaguar2 +#define REG_FPGA0_ANALOG_PARAMETER4 rFPGA0_AnalogParameter4 +#define REG_FPGA0_IQK rFPGA0_IQK +#define REG_FPGA0_PSD_FUNCTION rFPGA0_PSDFunction +#define REG_FPGA0_PSD_REPORT rFPGA0_PSDReport +#define REG_FPGA0_RFMOD rFPGA0_RFMOD +#define REG_FPGA0_TX_GAIN_STAGE rFPGA0_TxGainStage +#define REG_FPGA0_XAB_RF_INTERFACE_SW rFPGA0_XAB_RFInterfaceSW +#define REG_FPGA0_XAB_RF_PARAMETER rFPGA0_XAB_RFParameter +#define REG_FPGA0_XA_HSSI_PARAMETER1 rFPGA0_XA_HSSIParameter1 +#define REG_FPGA0_XA_LSSI_PARAMETER rFPGA0_XA_LSSIParameter +#define REG_FPGA0_XA_RF_INTERFACE_OE rFPGA0_XA_RFInterfaceOE +#define REG_FPGA0_XB_HSSI_PARAMETER1 rFPGA0_XB_HSSIParameter1 +#define REG_FPGA0_XB_LSSI_PARAMETER rFPGA0_XB_LSSIParameter +#define REG_FPGA0_XB_LSSI_READ_BACK rFPGA0_XB_LSSIReadBack +#define REG_FPGA0_XB_RF_INTERFACE_OE rFPGA0_XB_RFInterfaceOE +#define REG_FPGA0_XCD_RF_INTERFACE_SW rFPGA0_XCD_RFInterfaceSW +#define REG_FPGA0_XCD_SWITCH_CONTROL rFPGA0_XCD_SwitchControl +#define REG_FPGA1_TX_BLOCK rFPGA1_TxBlock +#define REG_FPGA1_TX_INFO rFPGA1_TxInfo +#define REG_IQK_AGC_CONT rIQK_AGC_Cont +#define REG_IQK_AGC_PTS rIQK_AGC_Pts +#define REG_IQK_AGC_RSP rIQK_AGC_Rsp +#define REG_OFDM_0_AGC_RSSI_TABLE rOFDM0_AGCRSSITable +#define REG_OFDM_0_ECCA_THRESHOLD rOFDM0_ECCAThreshold +#define REG_OFDM_0_RX_IQ_EXT_ANTA rOFDM0_RxIQExtAnta +#define REG_OFDM_0_TR_MUX_PAR rOFDM0_TRMuxPar +#define REG_OFDM_0_TRX_PATH_ENABLE rOFDM0_TRxPathEnable +#define REG_OFDM_0_XA_AGC_CORE1 rOFDM0_XAAGCCore1 +#define REG_OFDM_0_XA_RX_IQ_IMBALANCE rOFDM0_XARxIQImbalance +#define REG_OFDM_0_XA_TX_IQ_IMBALANCE rOFDM0_XATxIQImbalance +#define REG_OFDM_0_XB_AGC_CORE1 rOFDM0_XBAGCCore1 +#define REG_OFDM_0_XB_RX_IQ_IMBALANCE rOFDM0_XBRxIQImbalance +#define REG_OFDM_0_XB_TX_IQ_IMBALANCE rOFDM0_XBTxIQImbalance +#define REG_OFDM_0_XC_TX_AFE rOFDM0_XCTxAFE +#define REG_OFDM_0_XD_TX_AFE rOFDM0_XDTxAFE +#define REG_PMPD_ANAEN rPMPD_ANAEN +#define REG_PDP_ANT_A rPdp_AntA +#define REG_PDP_ANT_A_4 rPdp_AntA_4 +#define REG_PDP_ANT_B rPdp_AntB +#define REG_PDP_ANT_B_4 rPdp_AntB_4 +#define REG_PWED_TH_JAGUAR rPwed_TH_Jaguar +#define REG_RX_CCK rRx_CCK +#define REG_RX_IQK rRx_IQK +#define REG_RX_IQK_PI_A rRx_IQK_PI_A +#define REG_RX_IQK_PI_B rRx_IQK_PI_B +#define REG_RX_IQK_TONE_A rRx_IQK_Tone_A +#define REG_RX_IQK_TONE_B rRx_IQK_Tone_B +#define REG_RX_OFDM rRx_OFDM +#define REG_RX_POWER_AFTER_IQK_A_2 rRx_Power_After_IQK_A_2 +#define REG_RX_POWER_AFTER_IQK_B_2 rRx_Power_After_IQK_B_2 +#define REG_RX_POWER_BEFORE_IQK_A_2 rRx_Power_Before_IQK_A_2 +#define REG_RX_POWER_BEFORE_IQK_B_2 rRx_Power_Before_IQK_B_2 +#define REG_RX_TO_RX rRx_TO_Rx +#define REG_RX_WAIT_CCA rRx_Wait_CCA +#define REG_RX_WAIT_RIFS rRx_Wait_RIFS +#define REG_S0_S1_PATH_SWITCH rS0S1_PathSwitch +/*#define REG_S1_RXEVM_DUMP_92E rS1_RXevmDump_92E*/ +#define REG_S1_RXEVM_DUMP_JAGUAR rS1_RXevmDump_Jaguar +/*#define REG_S2_RXEVM_DUMP_92E rS2_RXevmDump_92E*/ +#define REG_S2_RXEVM_DUMP_JAGUAR rS2_RXevmDump_Jaguar +#define REG_SYM_WLBT_PAPE_SEL rSYM_WLBT_PAPE_SEL +#define REG_SINGLE_TONE_CONT_TX_JAGUAR rSingleTone_ContTx_Jaguar +#define REG_SLEEP rSleep +#define REG_STANDBY rStandby +#define REG_TX_AGC_A_CCK_11_CCK_1_JAGUAR rTxAGC_A_CCK11_CCK1_JAguar +#define REG_TX_AGC_A_CCK_1_MCS32 rTxAGC_A_CCK1_Mcs32 +#define REG_TX_AGC_A_MCS11_MCS8_JAGUAR rTxAGC_A_MCS11_MCS8_JAguar +#define REG_TX_AGC_A_MCS15_MCS12_JAGUAR rTxAGC_A_MCS15_MCS12_JAguar +#define REG_TX_AGC_A_MCS19_MCS16_JAGUAR rTxAGC_A_MCS19_MCS16_JAguar +#define REG_TX_AGC_A_MCS23_MCS20_JAGUAR rTxAGC_A_MCS23_MCS20_JAguar +#define REG_TX_AGC_A_MCS3_MCS0_JAGUAR rTxAGC_A_MCS3_MCS0_JAguar +#define REG_TX_AGC_A_MCS7_MCS4_JAGUAR rTxAGC_A_MCS7_MCS4_JAguar +#define REG_TX_AGC_A_MCS03_MCS00 rTxAGC_A_Mcs03_Mcs00 +#define REG_TX_AGC_A_MCS07_MCS04 rTxAGC_A_Mcs07_Mcs04 +#define REG_TX_AGC_A_MCS11_MCS08 rTxAGC_A_Mcs11_Mcs08 +#define REG_TX_AGC_A_MCS15_MCS12 rTxAGC_A_Mcs15_Mcs12 +#define REG_TX_AGC_A_NSS1_INDEX3_NSS1_INDEX0_JAGUAR rTxAGC_A_Nss1Index3_Nss1Index0_JAguar +#define REG_TX_AGC_A_NSS1_INDEX7_NSS1_INDEX4_JAGUAR rTxAGC_A_Nss1Index7_Nss1Index4_JAguar +#define REG_TX_AGC_A_NSS2_INDEX1_NSS1_INDEX8_JAGUAR rTxAGC_A_Nss2Index1_Nss1Index8_JAguar +#define REG_TX_AGC_A_NSS2_INDEX5_NSS2_INDEX2_JAGUAR rTxAGC_A_Nss2Index5_Nss2Index2_JAguar +#define REG_TX_AGC_A_NSS2_INDEX9_NSS2_INDEX6_JAGUAR rTxAGC_A_Nss2Index9_Nss2Index6_JAguar +#define REG_TX_AGC_A_NSS3_INDEX3_NSS3_INDEX0_JAGUAR rTxAGC_A_Nss3Index3_Nss3Index0_JAguar +#define REG_TX_AGC_A_NSS3_INDEX7_NSS3_INDEX4_JAGUAR rTxAGC_A_Nss3Index7_Nss3Index4_JAguar +#define REG_TX_AGC_A_NSS3_INDEX9_NSS3_INDEX8_JAGUAR rTxAGC_A_Nss3Index9_Nss3Index8_JAguar +#define REG_TX_AGC_A_OFDM18_OFDM6_JAGUAR rTxAGC_A_Ofdm18_Ofdm6_JAguar +#define REG_TX_AGC_A_OFDM54_OFDM24_JAGUAR rTxAGC_A_Ofdm54_Ofdm24_JAguar +#define REG_TX_AGC_A_RATE18_06 rTxAGC_A_Rate18_06 +#define REG_TX_AGC_A_RATE54_24 rTxAGC_A_Rate54_24 +#define REG_TX_AGC_B_CCK_11_A_CCK_2_11 rTxAGC_B_CCK11_A_CCK2_11 +#define REG_TX_AGC_B_CCK_11_CCK_1_JAGUAR rTxAGC_B_CCK11_CCK1_JAguar +#define REG_TX_AGC_B_CCK_1_55_MCS32 rTxAGC_B_CCK1_55_Mcs32 +#define REG_TX_AGC_B_MCS11_MCS8_JAGUAR rTxAGC_B_MCS11_MCS8_JAguar +#define REG_TX_AGC_B_MCS15_MCS12_JAGUAR rTxAGC_B_MCS15_MCS12_JAguar +#define REG_TX_AGC_B_MCS19_MCS16_JAGUAR rTxAGC_B_MCS19_MCS16_JAguar +#define REG_TX_AGC_B_MCS23_MCS20_JAGUAR rTxAGC_B_MCS23_MCS20_JAguar +#define REG_TX_AGC_B_MCS3_MCS0_JAGUAR rTxAGC_B_MCS3_MCS0_JAguar +#define REG_TX_AGC_B_MCS7_MCS4_JAGUAR rTxAGC_B_MCS7_MCS4_JAguar +#define REG_TX_AGC_B_MCS03_MCS00 rTxAGC_B_Mcs03_Mcs00 +#define REG_TX_AGC_B_MCS07_MCS04 rTxAGC_B_Mcs07_Mcs04 +#define REG_TX_AGC_B_MCS11_MCS08 rTxAGC_B_Mcs11_Mcs08 +#define REG_TX_AGC_B_MCS15_MCS12 rTxAGC_B_Mcs15_Mcs12 +#define REG_TX_AGC_B_NSS1_INDEX3_NSS1_INDEX0_JAGUAR rTxAGC_B_Nss1Index3_Nss1Index0_JAguar +#define REG_TX_AGC_B_NSS1_INDEX7_NSS1_INDEX4_JAGUAR rTxAGC_B_Nss1Index7_Nss1Index4_JAguar +#define REG_TX_AGC_B_NSS2_INDEX1_NSS1_INDEX8_JAGUAR rTxAGC_B_Nss2Index1_Nss1Index8_JAguar +#define REG_TX_AGC_B_NSS2_INDEX5_NSS2_INDEX2_JAGUAR rTxAGC_B_Nss2Index5_Nss2Index2_JAguar +#define REG_TX_AGC_B_NSS2_INDEX9_NSS2_INDEX6_JAGUAR rTxAGC_B_Nss2Index9_Nss2Index6_JAguar +#define REG_TX_AGC_B_NSS3_INDEX3_NSS3_INDEX0_JAGUAR rTxAGC_B_Nss3Index3_Nss3Index0_JAguar +#define REG_TX_AGC_B_NSS3_INDEX7_NSS3_INDEX4_JAGUAR rTxAGC_B_Nss3Index7_Nss3Index4_JAguar +#define REG_TX_AGC_B_NSS3_INDEX9_NSS3_INDEX8_JAGUAR rTxAGC_B_Nss3Index9_Nss3Index8_JAguar +#define REG_TX_AGC_B_OFDM18_OFDM6_JAGUAR rTxAGC_B_Ofdm18_Ofdm6_JAguar +#define REG_TX_AGC_B_OFDM54_OFDM24_JAGUAR rTxAGC_B_Ofdm54_Ofdm24_JAguar +#define REG_TX_AGC_B_RATE18_06 rTxAGC_B_Rate18_06 +#define REG_TX_AGC_B_RATE54_24 rTxAGC_B_Rate54_24 +#define REG_TX_AGC_C_CCK_11_CCK_1_JAGUAR rTxAGC_C_CCK11_CCK1_JAguar +#define REG_TX_AGC_C_MCS11_MCS8_JAGUAR rTxAGC_C_MCS11_MCS8_JAguar +#define REG_TX_AGC_C_MCS15_MCS12_JAGUAR rTxAGC_C_MCS15_MCS12_JAguar +#define REG_TX_AGC_C_MCS19_MCS16_JAGUAR rTxAGC_C_MCS19_MCS16_JAguar +#define REG_TX_AGC_C_MCS23_MCS20_JAGUAR rTxAGC_C_MCS23_MCS20_JAguar +#define REG_TX_AGC_C_MCS3_MCS0_JAGUAR rTxAGC_C_MCS3_MCS0_JAguar +#define REG_TX_AGC_C_MCS7_MCS4_JAGUAR rTxAGC_C_MCS7_MCS4_JAguar +#define REG_TX_AGC_C_NSS1_INDEX3_NSS1_INDEX0_JAGUAR rTxAGC_C_Nss1Index3_Nss1Index0_JAguar +#define REG_TX_AGC_C_NSS1_INDEX7_NSS1_INDEX4_JAGUAR rTxAGC_C_Nss1Index7_Nss1Index4_JAguar +#define REG_TX_AGC_C_NSS2_INDEX1_NSS1_INDEX8_JAGUAR rTxAGC_C_Nss2Index1_Nss1Index8_JAguar +#define REG_TX_AGC_C_NSS2_INDEX5_NSS2_INDEX2_JAGUAR rTxAGC_C_Nss2Index5_Nss2Index2_JAguar +#define REG_TX_AGC_C_NSS2_INDEX9_NSS2_INDEX6_JAGUAR rTxAGC_C_Nss2Index9_Nss2Index6_JAguar +#define REG_TX_AGC_C_NSS3_INDEX3_NSS3_INDEX0_JAGUAR rTxAGC_C_Nss3Index3_Nss3Index0_JAguar +#define REG_TX_AGC_C_NSS3_INDEX7_NSS3_INDEX4_JAGUAR rTxAGC_C_Nss3Index7_Nss3Index4_JAguar +#define REG_TX_AGC_C_NSS3_INDEX9_NSS3_INDEX8_JAGUAR rTxAGC_C_Nss3Index9_Nss3Index8_JAguar +#define REG_TX_AGC_C_OFDM18_OFDM6_JAGUAR rTxAGC_C_Ofdm18_Ofdm6_JAguar +#define REG_TX_AGC_C_OFDM54_OFDM24_JAGUAR rTxAGC_C_Ofdm54_Ofdm24_JAguar +#define REG_TX_AGC_D_CCK_11_CCK_1_JAGUAR rTxAGC_D_CCK11_CCK1_JAguar +#define REG_TX_AGC_D_MCS11_MCS8_JAGUAR rTxAGC_D_MCS11_MCS8_JAguar +#define REG_TX_AGC_D_MCS15_MCS12_JAGUAR rTxAGC_D_MCS15_MCS12_JAguar +#define REG_TX_AGC_D_MCS19_MCS16_JAGUAR rTxAGC_D_MCS19_MCS16_JAguar +#define REG_TX_AGC_D_MCS23_MCS20_JAGUAR rTxAGC_D_MCS23_MCS20_JAguar +#define REG_TX_AGC_D_MCS3_MCS0_JAGUAR rTxAGC_D_MCS3_MCS0_JAguar +#define REG_TX_AGC_D_MCS7_MCS4_JAGUAR rTxAGC_D_MCS7_MCS4_JAguar +#define REG_TX_AGC_D_NSS1_INDEX3_NSS1_INDEX0_JAGUAR rTxAGC_D_Nss1Index3_Nss1Index0_JAguar +#define REG_TX_AGC_D_NSS1_INDEX7_NSS1_INDEX4_JAGUAR rTxAGC_D_Nss1Index7_Nss1Index4_JAguar +#define REG_TX_AGC_D_NSS2_INDEX1_NSS1_INDEX8_JAGUAR rTxAGC_D_Nss2Index1_Nss1Index8_JAguar +#define REG_TX_AGC_D_NSS2_INDEX5_NSS2_INDEX2_JAGUAR rTxAGC_D_Nss2Index5_Nss2Index2_JAguar +#define REG_TX_AGC_D_NSS2_INDEX9_NSS2_INDEX6_JAGUAR rTxAGC_D_Nss2Index9_Nss2Index6_JAguar +#define REG_TX_AGC_D_NSS3_INDEX3_NSS3_INDEX0_JAGUAR rTxAGC_D_Nss3Index3_Nss3Index0_JAguar +#define REG_TX_AGC_D_NSS3_INDEX7_NSS3_INDEX4_JAGUAR rTxAGC_D_Nss3Index7_Nss3Index4_JAguar +#define REG_TX_AGC_D_NSS3_INDEX9_NSS3_INDEX8_JAGUAR rTxAGC_D_Nss3Index9_Nss3Index8_JAguar +#define REG_TX_AGC_D_OFDM18_OFDM6_JAGUAR rTxAGC_D_Ofdm18_Ofdm6_JAguar +#define REG_TX_AGC_D_OFDM54_OFDM24_JAGUAR rTxAGC_D_Ofdm54_Ofdm24_JAguar +#define REG_TX_PATH_JAGUAR rTxPath_Jaguar +#define REG_TX_CCK_BBON rTx_CCK_BBON +#define REG_TX_CCK_RFON rTx_CCK_RFON +#define REG_TX_IQK rTx_IQK +#define REG_TX_IQK_PI_A rTx_IQK_PI_A +#define REG_TX_IQK_PI_B rTx_IQK_PI_B +#define REG_TX_IQK_TONE_A rTx_IQK_Tone_A +#define REG_TX_IQK_TONE_B rTx_IQK_Tone_B +#define REG_TX_OFDM_BBON rTx_OFDM_BBON +#define REG_TX_OFDM_RFON rTx_OFDM_RFON +#define REG_TX_POWER_AFTER_IQK_A rTx_Power_After_IQK_A +#define REG_TX_POWER_AFTER_IQK_B rTx_Power_After_IQK_B +#define REG_TX_POWER_BEFORE_IQK_A rTx_Power_Before_IQK_A +#define REG_TX_POWER_BEFORE_IQK_B rTx_Power_Before_IQK_B +#define REG_TX_TO_RX rTx_To_Rx +#define REG_TX_TO_TX rTx_To_Tx +#define REG_APK rAPK +#define REG_ANTSEL_SW_JAGUAR r_ANTSEL_SW_Jaguar + +#define rf_welut_jaguar RF_WeLut_Jaguar +#define rf_mode_table_addr RF_ModeTableAddr +#define rf_mode_table_data0 RF_ModeTableData0 +#define rf_mode_table_data1 RF_ModeTableData1 + +#define RX_SMOOTH_FACTOR Rx_Smooth_Factor #endif /* __HAL_PHY_REG_H__ */ diff --git a/include/hal_sdio.h b/include/hal_sdio.h index 3c22eb9..c3578e2 100644 --- a/include/hal_sdio.h +++ b/include/hal_sdio.h @@ -20,7 +20,7 @@ u8 rtw_hal_sdio_max_txoqt_free_space(_adapter *padapter); u8 rtw_hal_sdio_query_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum); void rtw_hal_sdio_update_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum); -void rtw_hal_set_sdio_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ); +void rtw_hal_set_sdio_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ, u8 div_num); u32 rtw_hal_get_sdio_tx_max_length(PADAPTER padapter, u8 queue_idx); bool sdio_power_on_check(PADAPTER padapter); @@ -28,4 +28,29 @@ bool sdio_power_on_check(PADAPTER padapter); void sd_c2h_hisr_hdl(_adapter *adapter); #endif +#if defined(CONFIG_RTL8188F) || defined (CONFIG_RTL8188GTV) || defined (CONFIG_RTL8192F) +#define SDIO_LOCAL_CMD_ADDR(addr) ((SDIO_LOCAL_DEVICE_ID << 13) | ((addr) & SDIO_LOCAL_MSK)) +#endif + +#ifdef CONFIG_SDIO_CHK_HCI_RESUME +bool sdio_chk_hci_resume(struct intf_hdl *pintfhdl); +void sdio_chk_hci_suspend(struct intf_hdl *pintfhdl); +#else +#define sdio_chk_hci_resume(pintfhdl) _FALSE +#define sdio_chk_hci_suspend(pintfhdl) do {} while (0) +#endif /* CONFIG_SDIO_CHK_HCI_RESUME */ + +#ifdef CONFIG_SDIO_INDIRECT_ACCESS +/* program indirect access register in sdio local to read/write page0 registers */ +s32 sdio_iread(PADAPTER padapter, u32 addr, u8 size, u8 *v); +s32 sdio_iwrite(PADAPTER padapter, u32 addr, u8 size, u8 *v); +u8 sdio_iread8(struct intf_hdl *pintfhdl, u32 addr); +u16 sdio_iread16(struct intf_hdl *pintfhdl, u32 addr); +u32 sdio_iread32(struct intf_hdl *pintfhdl, u32 addr); +s32 sdio_iwrite8(struct intf_hdl *pintfhdl, u32 addr, u8 val); +s32 sdio_iwrite16(struct intf_hdl *pintfhdl, u32 addr, u16 val); +s32 sdio_iwrite32(struct intf_hdl *pintfhdl, u32 addr, u32 val); +#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ +u32 cmd53_4byte_alignment(struct intf_hdl *pintfhdl, u32 addr); + #endif /* __HAL_SDIO_H_ */ diff --git a/include/hal_sdio_coex.h b/include/hal_sdio_coex.h new file mode 100644 index 0000000..d95813a --- /dev/null +++ b/include/hal_sdio_coex.h @@ -0,0 +1,41 @@ +/****************************************************************************** + * + * Copyright(c) 2013 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __HAL_SDIO_COEX_H__ +#define __HAL_SDIO_COEX_H__ + +#include + +#ifdef CONFIG_SDIO_MULTI_FUNCTION_COEX + +enum { /* for sdio multi-func. coex */ + SDIO_MULTI_WIFI = 0, + SDIO_MULTI_BT, + SDIO_MULTI_NUM +}; + +bool ex_hal_sdio_multi_if_bus_available(PADAPTER adapter); + +#else + +#define ex_hal_sdio_multi_if_bus_available(adapter) TRUE + +#endif /* CONFIG_SDIO_MULTI_FUNCTION_COEX */ +#endif /* !__HAL_SDIO_COEX_H__ */ + diff --git a/include/ieee80211.h b/include/ieee80211.h index 5ba92b5..9b93bd0 100644 --- a/include/ieee80211.h +++ b/include/ieee80211.h @@ -15,16 +15,6 @@ #ifndef __IEEE80211_H #define __IEEE80211_H - -#ifndef CONFIG_RTL8711FW - - #if defined PLATFORM_OS_XP - #include - #endif -#else - -#endif - #define MGMT_QUEUE_NUM 5 #define ETH_ALEN 6 @@ -142,8 +132,6 @@ extern u8 WPA_CIPHER_SUITE_WEP104[]; #define RSN_SELECTOR_LEN 4 extern u16 RSN_VERSION_BSD; -extern u8 RSN_AUTH_KEY_MGMT_UNSPEC_802_1X[]; -extern u8 RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X[]; extern u8 RSN_CIPHER_SUITE_NONE[]; extern u8 RSN_CIPHER_SUITE_WEP40[]; extern u8 RSN_CIPHER_SUITE_TKIP[]; @@ -151,6 +139,91 @@ extern u8 RSN_CIPHER_SUITE_WRAP[]; extern u8 RSN_CIPHER_SUITE_CCMP[]; extern u8 RSN_CIPHER_SUITE_WEP104[]; +/* AKM suite type */ +extern u8 WLAN_AKM_8021X[]; +extern u8 WLAN_AKM_PSK[]; +extern u8 WLAN_AKM_FT_8021X[]; +extern u8 WLAN_AKM_FT_PSK[]; +extern u8 WLAN_AKM_8021X_SHA256[]; +extern u8 WLAN_AKM_PSK_SHA256[]; +extern u8 WLAN_AKM_TDLS[]; +extern u8 WLAN_AKM_SAE[]; +extern u8 WLAN_AKM_FT_OVER_SAE[]; +extern u8 WLAN_AKM_8021X_SUITE_B[]; +extern u8 WLAN_AKM_8021X_SUITE_B_192[]; +extern u8 WLAN_AKM_FILS_SHA256[]; +extern u8 WLAN_AKM_FILS_SHA384[]; +extern u8 WLAN_AKM_FT_FILS_SHA256[]; +extern u8 WLAN_AKM_FT_FILS_SHA384[]; + +#define WLAN_AKM_TYPE_8021X BIT(0) +#define WLAN_AKM_TYPE_PSK BIT(1) +#define WLAN_AKM_TYPE_FT_8021X BIT(2) +#define WLAN_AKM_TYPE_FT_PSK BIT(3) +#define WLAN_AKM_TYPE_8021X_SHA256 BIT(4) +#define WLAN_AKM_TYPE_PSK_SHA256 BIT(5) +#define WLAN_AKM_TYPE_TDLS BIT(6) +#define WLAN_AKM_TYPE_SAE BIT(7) +#define WLAN_AKM_TYPE_FT_OVER_SAE BIT(8) +#define WLAN_AKM_TYPE_8021X_SUITE_B BIT(9) +#define WLAN_AKM_TYPE_8021X_SUITE_B_192 BIT(10) +#define WLAN_AKM_TYPE_FILS_SHA256 BIT(11) +#define WLAN_AKM_TYPE_FILS_SHA384 BIT(12) +#define WLAN_AKM_TYPE_FT_FILS_SHA256 BIT(13) +#define WLAN_AKM_TYPE_FT_FILS_SHA384 BIT(14) + +/* IEEE 802.11i */ +#define PMKID_LEN 16 +#define PMK_LEN 32 +#define PMK_LEN_SUITE_B_192 48 +#define PMK_LEN_MAX 48 +#define WPA_REPLAY_COUNTER_LEN 8 +#define WPA_NONCE_LEN 32 +#define WPA_KEY_RSC_LEN 8 +#define WPA_GMK_LEN 32 +#define WPA_GTK_MAX_LEN 32 + +/* IEEE 802.11, 8.5.2 EAPOL-Key frames */ +#define WPA_KEY_INFO_TYPE_MASK ((u16) (BIT(0) | BIT(1) | BIT(2))) +#define WPA_KEY_INFO_TYPE_AKM_DEFINED 0 +#define WPA_KEY_INFO_TYPE_HMAC_MD5_RC4 BIT(0) +#define WPA_KEY_INFO_TYPE_HMAC_SHA1_AES BIT(1) +#define WPA_KEY_INFO_TYPE_AES_128_CMAC 3 +#define WPA_KEY_INFO_KEY_TYPE BIT(3) /* 1 = Pairwise, 0 = Group key */ +/* bit4..5 is used in WPA, but is reserved in IEEE 802.11i/RSN */ +#define WPA_KEY_INFO_KEY_INDEX_MASK (BIT(4) | BIT(5)) +#define WPA_KEY_INFO_KEY_INDEX_SHIFT 4 +#define WPA_KEY_INFO_INSTALL BIT(6) /* pairwise */ +#define WPA_KEY_INFO_TXRX BIT(6) /* group */ +#define WPA_KEY_INFO_ACK BIT(7) +#define WPA_KEY_INFO_MIC BIT(8) +#define WPA_KEY_INFO_SECURE BIT(9) +#define WPA_KEY_INFO_ERROR BIT(10) +#define WPA_KEY_INFO_REQUEST BIT(11) +#define WPA_KEY_INFO_ENCR_KEY_DATA BIT(12) /* IEEE 802.11i/RSN only */ +#define WPA_KEY_INFO_SMK_MESSAGE BIT(13) + +struct ieee802_1x_hdr { + u8 version; + u8 type; + u16 length; + /* followed by length octets of data */ +}; + +struct wpa_eapol_key { + u8 type; + /* Note: key_info, key_length, and key_data_length are unaligned */ + u8 key_info[2]; /* big endian */ + u8 key_length[2]; /* big endian */ + u8 replay_counter[WPA_REPLAY_COUNTER_LEN]; + u8 key_nonce[WPA_NONCE_LEN]; + u8 key_iv[16]; + u8 key_rsc[WPA_KEY_RSC_LEN]; + u8 key_id[8]; /* Reserved in IEEE 802.11i/RSN */ + u8 key_mic[16]; + u8 key_data_length[2]; /* big endian */ + /* followed by key_data_length bytes of key_data */ +}; typedef enum _RATEID_IDX_ { RATEID_IDX_BGN_40M_2SS = 0, @@ -340,7 +413,7 @@ struct ieee_ibss_seq { _list list; }; -#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) || defined(PLATFORM_FREEBSD) +#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) struct rtw_ieee80211_hdr { u16 frame_ctl; @@ -415,54 +488,6 @@ struct rtw_ieee80211s_hdr { } __attribute__((packed)); #endif - - -#ifdef PLATFORM_WINDOWS - -#pragma pack(1) -struct rtw_ieee80211_hdr { - u16 frame_ctl; - u16 duration_id; - u8 addr1[ETH_ALEN]; - u8 addr2[ETH_ALEN]; - u8 addr3[ETH_ALEN]; - u16 seq_ctl; - u8 addr4[ETH_ALEN]; -}; - -struct rtw_ieee80211_hdr_3addr { - u16 frame_ctl; - u16 duration_id; - u8 addr1[ETH_ALEN]; - u8 addr2[ETH_ALEN]; - u8 addr3[ETH_ALEN]; - u16 seq_ctl; -}; - - -struct rtw_ieee80211_hdr_qos { - struct rtw_ieee80211_hdr wlan_hdr; - u16 qc; -}; - -struct rtw_ieee80211_hdr_3addr_qos { - struct rtw_ieee80211_hdr_3addr wlan_hdr; - u16 qc; -}; - -struct eapol { - u8 snap[6]; - u16 ethertype; - u8 version; - u8 type; - u16 length; -}; -#pragma pack() - -#endif - - - enum eap_type { EAP_PACKET = 0, EAPOL_START, @@ -571,7 +596,7 @@ enum eap_type { #define P80211_OUI_LEN 3 -#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) || defined(PLATFORM_FREEBSD) +#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) struct ieee80211_snap_hdr { @@ -584,22 +609,6 @@ struct ieee80211_snap_hdr { #endif -#ifdef PLATFORM_WINDOWS - -#pragma pack(1) -struct ieee80211_snap_hdr { - - u8 dsap; /* always 0xAA */ - u8 ssap; /* always 0xAA */ - u8 ctrl; /* always 0x03 */ - u8 oui[P80211_OUI_LEN]; /* organizational universal id */ - -}; -#pragma pack() - -#endif - - #define SNAP_SIZE sizeof(struct ieee80211_snap_hdr) #define WLAN_FC_GET_TYPE(fc) ((fc) & RTW_IEEE80211_FCTL_FTYPE) @@ -613,6 +622,7 @@ struct ieee80211_snap_hdr { /* Authentication algorithms */ #define WLAN_AUTH_OPEN 0 #define WLAN_AUTH_SHARED_KEY 1 +#define WLAN_AUTH_SAE 3 #define WLAN_AUTH_CHALLENGE_LEN 128 @@ -1156,8 +1166,7 @@ struct ieee80211_softmac_stats { #define BIP_MAX_KEYID 5 #define BIP_AAD_SIZE 20 -#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) - +#if defined(PLATFORM_LINUX) struct ieee80211_security { u16 active_key:2, enabled:1, @@ -1172,24 +1181,6 @@ struct ieee80211_security { #endif -#ifdef PLATFORM_WINDOWS - -#pragma pack(1) -struct ieee80211_security { - u16 active_key:2, - enabled:1, - auth_mode:2, - auth_algo:4, - unicast_uses_group:1; - u8 key_sizes[WEP_KEYS]; - u8 keys[WEP_KEYS][WEP_KEY_LEN]; - u8 level; - u16 flags; -} ; -#pragma pack() - -#endif - /* 802.11 data frame from AP @@ -1230,8 +1221,7 @@ struct ieee80211_header_data { #define MFIE_TYPE_RATES_EX 50 #define MFIE_TYPE_GENERIC 221 -#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) - +#if defined(PLATFORM_LINUX) struct ieee80211_info_element_hdr { u8 id; u8 len; @@ -1244,23 +1234,6 @@ struct ieee80211_info_element { } __attribute__((packed)); #endif -#ifdef PLATFORM_WINDOWS - -#pragma pack(1) -struct ieee80211_info_element_hdr { - u8 id; - u8 len; -} ; - -struct ieee80211_info_element { - u8 id; - u8 len; - u8 data[0]; -} ; -#pragma pack() - -#endif - /* * These are the data types that can make up management packets @@ -1283,9 +1256,7 @@ struct ieee80211_info_element { #define IEEE80211_DEFAULT_BASIC_RATE 10 -#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) - - +#if defined(PLATFORM_LINUX) struct ieee80211_authentication { struct ieee80211_header_data header; u16 algorithm; @@ -1325,57 +1296,6 @@ struct ieee80211_assoc_response_frame { } __attribute__((packed)); #endif - - -#ifdef PLATFORM_WINDOWS - -#pragma pack(1) - -struct ieee80211_authentication { - struct ieee80211_header_data header; - u16 algorithm; - u16 transaction; - u16 status; - /* struct ieee80211_info_element_hdr info_element; */ -} ; - - -struct ieee80211_probe_response { - struct ieee80211_header_data header; - u32 time_stamp[2]; - u16 beacon_interval; - u16 capability; - struct ieee80211_info_element info_element; -} ; - -struct ieee80211_probe_request { - struct ieee80211_header_data header; - /*struct ieee80211_info_element info_element;*/ -} ; - -struct ieee80211_assoc_request_frame { - struct rtw_ieee80211_hdr_3addr header; - u16 capability; - u16 listen_interval; - /* u8 current_ap[ETH_ALEN]; */ - struct ieee80211_info_element_hdr info_element; -} ; - -struct ieee80211_assoc_response_frame { - struct rtw_ieee80211_hdr_3addr header; - u16 capability; - u16 status; - u16 aid; - /* struct ieee80211_info_element info_element; supported rates */ -}; - -#pragma pack() - -#endif - - - - struct ieee80211_txb { u8 nr_frags; u8 encrypted; @@ -1985,6 +1905,8 @@ u8 *rtw_set_ie_secondary_ch_offset(u8 *buf, u32 *buf_len, u8 secondary_ch_offset u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl, u8 flags, u16 reason, u16 precedence); u8 *rtw_get_ie(const u8 *pbuf, sint index, sint *len, sint limit); +u8 rtw_update_rate_bymode(WLAN_BSSID_EX *pbss_network, u32 mode); + u8 *rtw_get_ie_ex(const u8 *in_ie, uint in_len, u8 eid, const u8 *oui, u8 oui_len, u8 *ie, uint *ielen); int rtw_ies_remove_ie(u8 *ies, uint *ies_len, uint offset, u8 eid, u8 *oui, u8 oui_len); @@ -2017,8 +1939,8 @@ unsigned char *rtw_get_wpa2_ie(unsigned char *pie, int *rsn_ie_len, int limit); int rtw_get_wpa_cipher_suite(u8 *s); int rtw_get_wpa2_cipher_suite(u8 *s); int rtw_get_wapi_ie(u8 *in_ie, uint in_len, u8 *wapi_ie, u16 *wapi_len); -int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x); -int rtw_parse_wpa2_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x, u8 *mfp_opt); +int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, u32 *akm); +int rtw_parse_wpa2_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, u32 *akm, u8 *mfp_opt); int rtw_get_sec_ie(u8 *in_ie, uint in_len, u8 *rsn_ie, u16 *rsn_len, u8 *wpa_ie, u16 *wpa_len); @@ -2091,7 +2013,7 @@ int rtw_get_bit_value_from_ieee_value(u8 val); uint rtw_is_cckrates_included(u8 *rate); uint rtw_is_cckratesonly_included(u8 *rate); - +uint rtw_get_cckrate_size(u8 *rate,u32 rate_length); int rtw_check_network_type(unsigned char *rate, int ratelen, int channel); void rtw_get_bcn_info(struct wlan_network *pnetwork); diff --git a/include/ieee80211_ext.h b/include/ieee80211_ext.h index 94a8e58..4965863 100644 --- a/include/ieee80211_ext.h +++ b/include/ieee80211_ext.h @@ -100,27 +100,6 @@ struct wme_parameter_element { #endif -#ifdef PLATFORM_WINDOWS - -#pragma pack(1) - -struct wpa_ie_hdr { - u8 elem_id; - u8 len; - u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ - u8 version[2]; /* little endian */ -}; - -struct rsn_ie_hdr { - u8 elem_id; /* WLAN_EID_RSN */ - u8 len; - u8 version[2]; /* little endian */ -}; - -#pragma pack() - -#endif - #define WPA_PUT_LE16(a, val) \ do { \ (a)[1] = ((u16) (val)) >> 8; \ @@ -325,144 +304,6 @@ struct ieee80211_mgmt { #endif - -#ifdef PLATFORM_WINDOWS - -#pragma pack(1) - -struct ieee80211_mgmt { - u16 frame_control; - u16 duration; - u8 da[6]; - u8 sa[6]; - u8 bssid[6]; - u16 seq_ctrl; - union { - struct { - u16 auth_alg; - u16 auth_transaction; - u16 status_code; - /* possibly followed by Challenge text */ - u8 variable[0]; - } auth; - struct { - u16 reason_code; - } deauth; - struct { - u16 capab_info; - u16 listen_interval; - /* followed by SSID and Supported rates */ - u8 variable[0]; - } assoc_req; - struct { - u16 capab_info; - u16 status_code; - u16 aid; - /* followed by Supported rates */ - u8 variable[0]; - } assoc_resp, reassoc_resp; - struct { - u16 capab_info; - u16 listen_interval; - u8 current_ap[6]; - /* followed by SSID and Supported rates */ - u8 variable[0]; - } reassoc_req; - struct { - u16 reason_code; - } disassoc; -#if 0 - struct { - __le64 timestamp; - u16 beacon_int; - u16 capab_info; - /* followed by some of SSID, Supported rates, - * FH Params, DS Params, CF Params, IBSS Params, TIM */ - u8 variable[0]; - } beacon; - struct { - /* only variable items: SSID, Supported rates */ - u8 variable[0]; - } probe_req; - - struct { - __le64 timestamp; - u16 beacon_int; - u16 capab_info; - /* followed by some of SSID, Supported rates, - * FH Params, DS Params, CF Params, IBSS Params */ - u8 variable[0]; - } probe_resp; -#endif - struct { - u8 category; - union { - struct { - u8 action_code; - u8 dialog_token; - u8 status_code; - u8 variable[0]; - } wme_action; - #if 0 - struct{ - u8 action_code; - u8 element_id; - u8 length; - struct ieee80211_channel_sw_ie sw_elem; - } chan_switch; - struct{ - u8 action_code; - u8 dialog_token; - u8 element_id; - u8 length; - struct ieee80211_msrment_ie msr_elem; - } measurement; - #endif - struct { - u8 action_code; - u8 dialog_token; - u16 capab; - u16 timeout; - u16 start_seq_num; - } addba_req; - struct { - u8 action_code; - u8 dialog_token; - u16 status; - u16 capab; - u16 timeout; - } addba_resp; - struct { - u8 action_code; - u16 params; - u16 reason_code; - } delba; - struct { - u8 action_code; - /* capab_info for open and confirm, - * reason for close - */ - u16 aux; - /* Followed in plink_confirm by status - * code, AID and supported rates, - * and directly by supported rates in - * plink_open and plink_close - */ - u8 variable[0]; - } plink_action; - struct { - u8 action_code; - u8 variable[0]; - } mesh_action; - } u; - } action; - } u; -} ; - -#pragma pack() - -#endif - /* mgmt header + 1 byte category code */ #define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u) diff --git a/include/mp_custom_oid.h b/include/mp_custom_oid.h deleted file mode 100644 index 8ed1441..0000000 --- a/include/mp_custom_oid.h +++ /dev/null @@ -1,348 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __CUSTOM_OID_H -#define __CUSTOM_OID_H - -/* by Owen - * 0xFF818000 - 0xFF81802F RTL8180 Mass Production Kit - * 0xFF818500 - 0xFF81850F RTL8185 Setup Utility - * 0xFF818580 - 0xFF81858F RTL8185 Phy Status Utility */ - -/* */ - -/* by Owen for Production Kit - * For Production Kit with Agilent Equipments - * in order to make our custom oids hopefully somewhat unique - * we will use 0xFF (indicating implementation specific OID) - * 81(first byte of non zero Realtek unique identifier) - * 80 (second byte of non zero Realtek unique identifier) - * XX (the custom OID number - providing 255 possible custom oids) */ - -#define OID_RT_PRO_RESET_DUT 0xFF818000 -#define OID_RT_PRO_SET_DATA_RATE 0xFF818001 -#define OID_RT_PRO_START_TEST 0xFF818002 -#define OID_RT_PRO_STOP_TEST 0xFF818003 -#define OID_RT_PRO_SET_PREAMBLE 0xFF818004 -#define OID_RT_PRO_SET_SCRAMBLER 0xFF818005 -#define OID_RT_PRO_SET_FILTER_BB 0xFF818006 -#define OID_RT_PRO_SET_MANUAL_DIVERSITY_BB 0xFF818007 -#define OID_RT_PRO_SET_CHANNEL_DIRECT_CALL 0xFF818008 -#define OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL 0xFF818009 -#define OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL 0xFF81800A - -#define OID_RT_PRO_SET_TX_ANTENNA_BB 0xFF81800D -#define OID_RT_PRO_SET_ANTENNA_BB 0xFF81800E -#define OID_RT_PRO_SET_CR_SCRAMBLER 0xFF81800F -#define OID_RT_PRO_SET_CR_NEW_FILTER 0xFF818010 -#define OID_RT_PRO_SET_TX_POWER_CONTROL 0xFF818011 -#define OID_RT_PRO_SET_CR_TX_CONFIG 0xFF818012 -#define OID_RT_PRO_GET_TX_POWER_CONTROL 0xFF818013 -#define OID_RT_PRO_GET_CR_SIGNAL_QUALITY 0xFF818014 -#define OID_RT_PRO_SET_CR_SETPOINT 0xFF818015 -#define OID_RT_PRO_SET_INTEGRATOR 0xFF818016 -#define OID_RT_PRO_SET_SIGNAL_QUALITY 0xFF818017 -#define OID_RT_PRO_GET_INTEGRATOR 0xFF818018 -#define OID_RT_PRO_GET_SIGNAL_QUALITY 0xFF818019 -#define OID_RT_PRO_QUERY_EEPROM_TYPE 0xFF81801A -#define OID_RT_PRO_WRITE_MAC_ADDRESS 0xFF81801B -#define OID_RT_PRO_READ_MAC_ADDRESS 0xFF81801C -#define OID_RT_PRO_WRITE_CIS_DATA 0xFF81801D -#define OID_RT_PRO_READ_CIS_DATA 0xFF81801E -#define OID_RT_PRO_WRITE_POWER_CONTROL 0xFF81801F -#define OID_RT_PRO_READ_POWER_CONTROL 0xFF818020 -#define OID_RT_PRO_WRITE_EEPROM 0xFF818021 -#define OID_RT_PRO_READ_EEPROM 0xFF818022 -#define OID_RT_PRO_RESET_TX_PACKET_SENT 0xFF818023 -#define OID_RT_PRO_QUERY_TX_PACKET_SENT 0xFF818024 -#define OID_RT_PRO_RESET_RX_PACKET_RECEIVED 0xFF818025 -#define OID_RT_PRO_QUERY_RX_PACKET_RECEIVED 0xFF818026 -#define OID_RT_PRO_QUERY_RX_PACKET_CRC32_ERROR 0xFF818027 -#define OID_RT_PRO_QUERY_CURRENT_ADDRESS 0xFF818028 -#define OID_RT_PRO_QUERY_PERMANENT_ADDRESS 0xFF818029 -#define OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS 0xFF81802A -#define OID_RT_PRO_RECEIVE_PACKET 0xFF81802C -/* added by Owen on 04/08/03 for Cameo's request */ -#define OID_RT_PRO_WRITE_EEPROM_BYTE 0xFF81802D -#define OID_RT_PRO_READ_EEPROM_BYTE 0xFF81802E -#define OID_RT_PRO_SET_MODULATION 0xFF81802F -/* */ - -/* Sean */ -#define OID_RT_DRIVER_OPTION 0xFF818080 -#define OID_RT_RF_OFF 0xFF818081 -#define OID_RT_AUTH_STATUS 0xFF818082 - -/* ************************************************************************ */ -#define OID_RT_PRO_SET_CONTINUOUS_TX 0xFF81800B -#define OID_RT_PRO_SET_SINGLE_CARRIER_TX 0xFF81800C -#define OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX 0xFF81802B -#define OID_RT_PRO_SET_SINGLE_TONE_TX 0xFF818043 -/* ************************************************************************ */ - - -/* by Owen for RTL8185 Phy Status Report Utility */ -#define OID_RT_UTILITY_FALSE_ALARM_COUNTERS 0xFF818580 -#define OID_RT_UTILITY_SELECT_DEBUG_MODE 0xFF818581 -#define OID_RT_UTILITY_SELECT_SUBCARRIER_NUMBER 0xFF818582 -#define OID_RT_UTILITY_GET_RSSI_STATUS 0xFF818583 -#define OID_RT_UTILITY_GET_FRAME_DETECTION_STATUS 0xFF818584 -#define OID_RT_UTILITY_GET_AGC_AND_FREQUENCY_OFFSET_ESTIMATION_STATUS 0xFF818585 -#define OID_RT_UTILITY_GET_CHANNEL_ESTIMATION_STATUS 0xFF818586 -/* */ - -/* by Owen on 03/09/19-03/09/22 for RTL8185 */ -#define OID_RT_WIRELESS_MODE 0xFF818500 -#define OID_RT_SUPPORTED_RATES 0xFF818501 -#define OID_RT_DESIRED_RATES 0xFF818502 -#define OID_RT_WIRELESS_MODE_STARTING_ADHOC 0xFF818503 -/* */ - -#define OID_RT_GET_CONNECT_STATE 0xFF030001 -#define OID_RT_RESCAN 0xFF030002 -#define OID_RT_SET_KEY_LENGTH 0xFF030003 -#define OID_RT_SET_DEFAULT_KEY_ID 0xFF030004 - -#define OID_RT_SET_CHANNEL 0xFF010182 -#define OID_RT_SET_SNIFFER_MODE 0xFF010183 -#define OID_RT_GET_SIGNAL_QUALITY 0xFF010184 -#define OID_RT_GET_SMALL_PACKET_CRC 0xFF010185 -#define OID_RT_GET_MIDDLE_PACKET_CRC 0xFF010186 -#define OID_RT_GET_LARGE_PACKET_CRC 0xFF010187 -#define OID_RT_GET_TX_RETRY 0xFF010188 -#define OID_RT_GET_RX_RETRY 0xFF010189 -#define OID_RT_PRO_SET_FW_DIG_STATE 0xFF01018A/* S */ -#define OID_RT_PRO_SET_FW_RA_STATE 0xFF01018B/* S */ - -#define OID_RT_GET_RX_TOTAL_PACKET 0xFF010190 -#define OID_RT_GET_TX_BEACON_OK 0xFF010191 -#define OID_RT_GET_TX_BEACON_ERR 0xFF010192 -#define OID_RT_GET_RX_ICV_ERR 0xFF010193 -#define OID_RT_SET_ENCRYPTION_ALGORITHM 0xFF010194 -#define OID_RT_SET_NO_AUTO_RESCAN 0xFF010195 -#define OID_RT_GET_PREAMBLE_MODE 0xFF010196 -#define OID_RT_GET_DRIVER_UP_DELTA_TIME 0xFF010197 -#define OID_RT_GET_AP_IP 0xFF010198 -#define OID_RT_GET_CHANNELPLAN 0xFF010199 -#define OID_RT_SET_PREAMBLE_MODE 0xFF01019A -#define OID_RT_SET_BCN_INTVL 0xFF01019B -#define OID_RT_GET_RF_VENDER 0xFF01019C -#define OID_RT_DEDICATE_PROBE 0xFF01019D -#define OID_RT_PRO_RX_FILTER_PATTERN 0xFF01019E - -#define OID_RT_GET_DCST_CURRENT_THRESHOLD 0xFF01019F - -#define OID_RT_GET_CCA_ERR 0xFF0101A0 -#define OID_RT_GET_CCA_UPGRADE_THRESHOLD 0xFF0101A1 -#define OID_RT_GET_CCA_FALLBACK_THRESHOLD 0xFF0101A2 - -#define OID_RT_GET_CCA_UPGRADE_EVALUATE_TIMES 0xFF0101A3 -#define OID_RT_GET_CCA_FALLBACK_EVALUATE_TIMES 0xFF0101A4 - -/* by Owen on 03/31/03 for Cameo's request */ -#define OID_RT_SET_RATE_ADAPTIVE 0xFF0101A5 -/* */ -#define OID_RT_GET_DCST_EVALUATE_PERIOD 0xFF0101A5 -#define OID_RT_GET_DCST_TIME_UNIT_INDEX 0xFF0101A6 -#define OID_RT_GET_TOTAL_TX_BYTES 0xFF0101A7 -#define OID_RT_GET_TOTAL_RX_BYTES 0xFF0101A8 -#define OID_RT_CURRENT_TX_POWER_LEVEL 0xFF0101A9 -#define OID_RT_GET_ENC_KEY_MISMATCH_COUNT 0xFF0101AA -#define OID_RT_GET_ENC_KEY_MATCH_COUNT 0xFF0101AB -#define OID_RT_GET_CHANNEL 0xFF0101AC - -#define OID_RT_SET_CHANNELPLAN 0xFF0101AD -#define OID_RT_GET_HARDWARE_RADIO_OFF 0xFF0101AE -#define OID_RT_CHANNELPLAN_BY_COUNTRY 0xFF0101AF -#define OID_RT_SCAN_AVAILABLE_BSSID 0xFF0101B0 -#define OID_RT_GET_HARDWARE_VERSION 0xFF0101B1 -#define OID_RT_GET_IS_ROAMING 0xFF0101B2 -#define OID_RT_GET_IS_PRIVACY 0xFF0101B3 -#define OID_RT_GET_KEY_MISMATCH 0xFF0101B4 -#define OID_RT_SET_RSSI_ROAM_TRAFFIC_TH 0xFF0101B5 -#define OID_RT_SET_RSSI_ROAM_SIGNAL_TH 0xFF0101B6 -#define OID_RT_RESET_LOG 0xFF0101B7 -#define OID_RT_GET_LOG 0xFF0101B8 -#define OID_RT_SET_INDICATE_HIDDEN_AP 0xFF0101B9 -#define OID_RT_GET_HEADER_FAIL 0xFF0101BA -#define OID_RT_SUPPORTED_WIRELESS_MODE 0xFF0101BB -#define OID_RT_GET_CHANNEL_LIST 0xFF0101BC -#define OID_RT_GET_SCAN_IN_PROGRESS 0xFF0101BD -#define OID_RT_GET_TX_INFO 0xFF0101BE -#define OID_RT_RF_READ_WRITE_OFFSET 0xFF0101BF -#define OID_RT_RF_READ_WRITE 0xFF0101C0 - -/* For Netgear request. 2005.01.13, by rcnjko. */ -#define OID_RT_FORCED_DATA_RATE 0xFF0101C1 -#define OID_RT_WIRELESS_MODE_FOR_SCAN_LIST 0xFF0101C2 -/* For Netgear request. 2005.02.17, by rcnjko. */ -#define OID_RT_GET_BSS_WIRELESS_MODE 0xFF0101C3 -/* For AZ project. 2005.06.27, by rcnjko. */ -#define OID_RT_SCAN_WITH_MAGIC_PACKET 0xFF0101C4 - -/* Vincent 8185MP */ -#define OID_RT_PRO_RX_FILTER 0xFF0111C0 - -/* Andy TEST - * #define OID_RT_PRO_WRITE_REGISTRY 0xFF0111C1 - * #define OID_RT_PRO_READ_REGISTRY 0xFF0111C2 */ -#define OID_CE_USB_WRITE_REGISTRY 0xFF0111C1 -#define OID_CE_USB_READ_REGISTRY 0xFF0111C2 - - -#define OID_RT_PRO_SET_INITIAL_GAIN 0xFF0111C3 -#define OID_RT_PRO_SET_BB_RF_STANDBY_MODE 0xFF0111C4 -#define OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE 0xFF0111C5 -#define OID_RT_PRO_SET_TX_CHARGE_PUMP 0xFF0111C6 -#define OID_RT_PRO_SET_RX_CHARGE_PUMP 0xFF0111C7 -#define OID_RT_PRO_RF_WRITE_REGISTRY 0xFF0111C8 -#define OID_RT_PRO_RF_READ_REGISTRY 0xFF0111C9 -#define OID_RT_PRO_QUERY_RF_TYPE 0xFF0111CA - -/* AP OID */ -#define OID_RT_AP_GET_ASSOCIATED_STATION_LIST 0xFF010300 -#define OID_RT_AP_GET_CURRENT_TIME_STAMP 0xFF010301 -#define OID_RT_AP_SWITCH_INTO_AP_MODE 0xFF010302 -#define OID_RT_AP_SET_DTIM_PERIOD 0xFF010303 -#define OID_RT_AP_SUPPORTED 0xFF010304 /* Determine if driver supports AP mode. 2004.08.27, by rcnjko. */ -#define OID_RT_AP_SET_PASSPHRASE 0xFF010305 /* Set WPA-PSK passphrase into authenticator. 2005.07.08, byrcnjko. */ - -/* 8187MP. 2004.09.06, by rcnjko. */ -#define OID_RT_PRO8187_WI_POLL 0xFF818780 -#define OID_RT_PRO_WRITE_BB_REG 0xFF818781 -#define OID_RT_PRO_READ_BB_REG 0xFF818782 -#define OID_RT_PRO_WRITE_RF_REG 0xFF818783 -#define OID_RT_PRO_READ_RF_REG 0xFF818784 - -/* Meeting House. added by Annie, 2005-07-20. */ -#define OID_RT_MH_VENDER_ID 0xFFEDC100 - -/* 8711 MP OID added 20051230. */ -#define OID_RT_PRO8711_JOIN_BSS 0xFF871100/* S */ - -#define OID_RT_PRO_READ_REGISTER 0xFF871101 /* Q */ -#define OID_RT_PRO_WRITE_REGISTER 0xFF871102 /* S */ - -#define OID_RT_PRO_BURST_READ_REGISTER 0xFF871103 /* Q */ -#define OID_RT_PRO_BURST_WRITE_REGISTER 0xFF871104 /* S */ - -#define OID_RT_PRO_WRITE_TXCMD 0xFF871105 /* S */ - -#define OID_RT_PRO_READ16_EEPROM 0xFF871106 /* Q */ -#define OID_RT_PRO_WRITE16_EEPROM 0xFF871107 /* S */ - -#define OID_RT_PRO_H2C_SET_COMMAND 0xFF871108 /* S */ -#define OID_RT_PRO_H2C_QUERY_RESULT 0xFF871109 /* Q */ - -#define OID_RT_PRO8711_WI_POLL 0xFF87110A /* Q */ -#define OID_RT_PRO8711_PKT_LOSS 0xFF87110B /* Q */ -#define OID_RT_RD_ATTRIB_MEM 0xFF87110C/* Q */ -#define OID_RT_WR_ATTRIB_MEM 0xFF87110D/* S */ - - -/* Method 2 for H2C/C2H */ -#define OID_RT_PRO_H2C_CMD_MODE 0xFF871110 /* S */ -#define OID_RT_PRO_H2C_CMD_RSP_MODE 0xFF871111 /* Q */ -#define OID_RT_PRO_H2C_CMD_EVENT_MODE 0xFF871112 /* S */ -#define OID_RT_PRO_WAIT_C2H_EVENT 0xFF871113 /* Q */ -#define OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST 0xFF871114/* Q */ - -#define OID_RT_PRO_SCSI_ACCESS_TEST 0xFF871115 /* Q, S */ - -#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT 0xFF871116 /* S */ -#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN 0xFF871117 /* Q, S */ -#define OID_RT_RRO_RX_PKT_VIA_IOCTRL 0xFF871118 /* Q */ -#define OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL 0xFF871119 /* Q */ - -#define OID_RT_RPO_SET_PWRMGT_TEST 0xFF87111A /* S */ -#define OID_RT_PRO_QRY_PWRMGT_TEST 0XFF87111B /* Q */ -#define OID_RT_RPO_ASYNC_RWIO_TEST 0xFF87111C /* S */ -#define OID_RT_RPO_ASYNC_RWIO_POLL 0xFF87111D /* Q */ -#define OID_RT_PRO_SET_RF_INTFS 0xFF87111E /* S */ -#define OID_RT_POLL_RX_STATUS 0xFF87111F /* Q */ - -#define OID_RT_PRO_CFG_DEBUG_MESSAGE 0xFF871120 /* Q, S */ -#define OID_RT_PRO_SET_DATA_RATE_EX 0xFF871121/* S */ -#define OID_RT_PRO_SET_BASIC_RATE 0xFF871122/* S */ -#define OID_RT_PRO_READ_TSSI 0xFF871123/* S */ -#define OID_RT_PRO_SET_POWER_TRACKING 0xFF871124/* S */ - - -#define OID_RT_PRO_QRY_PWRSTATE 0xFF871150 /* Q */ -#define OID_RT_PRO_SET_PWRSTATE 0xFF871151 /* S */ - -/* Method 2 , using workitem */ -#define OID_RT_SET_READ_REG 0xFF871181 /* S */ -#define OID_RT_SET_WRITE_REG 0xFF871182 /* S */ -#define OID_RT_SET_BURST_READ_REG 0xFF871183 /* S */ -#define OID_RT_SET_BURST_WRITE_REG 0xFF871184 /* S */ -#define OID_RT_SET_WRITE_TXCMD 0xFF871185 /* S */ -#define OID_RT_SET_READ16_EEPROM 0xFF871186 /* S */ -#define OID_RT_SET_WRITE16_EEPROM 0xFF871187 /* S */ -#define OID_RT_QRY_POLL_WKITEM 0xFF871188 /* Q */ - -/* For SDIO INTERFACE only */ -#define OID_RT_PRO_SYNCPAGERW_SRAM 0xFF8711A0 /* Q, S */ -#define OID_RT_PRO_871X_DRV_EXT 0xFF8711A1 - -/* For USB INTERFACE only */ -#define OID_RT_PRO_USB_VENDOR_REQ 0xFF8711B0 /* Q, S */ -#define OID_RT_PRO_SCSI_AUTO_TEST 0xFF8711B1 /* S */ -#define OID_RT_PRO_USB_MAC_AC_FIFO_WRITE 0xFF8711B2 /* S */ -#define OID_RT_PRO_USB_MAC_RX_FIFO_READ 0xFF8711B3 /* Q */ -#define OID_RT_PRO_USB_MAC_RX_FIFO_POLLING 0xFF8711B4 /* Q */ - -#define OID_RT_PRO_H2C_SET_RATE_TABLE 0xFF8711FB /* S */ -#define OID_RT_PRO_H2C_GET_RATE_TABLE 0xFF8711FC /* S */ -#define OID_RT_PRO_H2C_C2H_LBK_TEST 0xFF8711FE - -#define OID_RT_PRO_ENCRYPTION_CTRL 0xFF871200 /* Q, S */ -#define OID_RT_PRO_ADD_STA_INFO 0xFF871201 /* S */ -#define OID_RT_PRO_DELE_STA_INFO 0xFF871202 /* S */ -#define OID_RT_PRO_QUERY_DR_VARIABLE 0xFF871203 /* Q */ - -#define OID_RT_PRO_RX_PACKET_TYPE 0xFF871204 /* Q, S */ - -#define OID_RT_PRO_READ_EFUSE 0xFF871205 /* Q */ -#define OID_RT_PRO_WRITE_EFUSE 0xFF871206 /* S */ -#define OID_RT_PRO_RW_EFUSE_PGPKT 0xFF871207 /* Q, S */ -#define OID_RT_GET_EFUSE_CURRENT_SIZE 0xFF871208 /* Q */ - -#define OID_RT_SET_BANDWIDTH 0xFF871209 /* S */ -#define OID_RT_SET_CRYSTAL_CAP 0xFF87120A /* S */ - -#define OID_RT_SET_RX_PACKET_TYPE 0xFF87120B /* S */ - -#define OID_RT_GET_EFUSE_MAX_SIZE 0xFF87120C /* Q */ - -#define OID_RT_PRO_SET_TX_AGC_OFFSET 0xFF87120D /* S */ - -#define OID_RT_PRO_SET_PKT_TEST_MODE 0xFF87120E /* S */ - -#define OID_RT_PRO_FOR_EVM_TEST_SETTING 0xFF87120F /* S */ - -#define OID_RT_PRO_GET_THERMAL_METER 0xFF871210 /* Q */ - -#define OID_RT_RESET_PHY_RX_PACKET_COUNT 0xFF871211 /* S */ -#define OID_RT_GET_PHY_RX_PACKET_RECEIVED 0xFF871212 /* Q */ -#define OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR 0xFF871213 /* Q */ - -#define OID_RT_SET_POWER_DOWN 0xFF871214 /* S */ - -#define OID_RT_GET_POWER_MODE 0xFF871215 /* Q */ - -#define OID_RT_PRO_EFUSE 0xFF871216 /* Q, S */ -#define OID_RT_PRO_EFUSE_MAP 0xFF871217 /* Q, S */ - -#endif /* #ifndef __CUSTOM_OID_H */ diff --git a/include/osdep_intf.h b/include/osdep_intf.h index 7be0880..ed0ebd4 100644 --- a/include/osdep_intf.h +++ b/include/osdep_intf.h @@ -57,34 +57,8 @@ struct intf_priv { #endif #endif -#ifdef PLATFORM_OS_XP -#ifdef CONFIG_SDIO_HCI - /* below is for io_rwmem... */ - PMDL pmdl; - PSDBUS_REQUEST_PACKET sdrp; - PSDBUS_REQUEST_PACKET recv_sdrp; - PSDBUS_REQUEST_PACKET xmit_sdrp; - - PIRP piorw_irp; - -#endif -#ifdef CONFIG_USB_HCI - PURB piorw_urb; - PIRP piorw_irp; - u8 io_irp_cnt; - u8 bio_irp_pending; - _sema io_retevt; -#endif -#endif - }; - -#ifdef CONFIG_R871X_TEST - int rtw_start_pseudo_adhoc(_adapter *padapter); - int rtw_stop_pseudo_adhoc(_adapter *padapter); -#endif - struct dvobj_priv *devobj_init(void); void devobj_deinit(struct dvobj_priv *pdvobj); diff --git a/include/osdep_service.h b/include/osdep_service.h index b9b1154..85d94e2 100644 --- a/include/osdep_service.h +++ b/include/osdep_service.h @@ -48,14 +48,17 @@ #include #endif #include + #include #endif #ifdef PLATFORM_OS_XP #include + #include #endif #ifdef PLATFORM_OS_CE #include + #include #endif /* #include */ @@ -64,6 +67,8 @@ #define BIT(x) (1 << (x)) #endif +#define CHECK_BIT(a, b) (!!((a) & (b))) + #define BIT0 0x00000001 #define BIT1 0x00000002 #define BIT2 0x00000004 @@ -166,18 +171,21 @@ void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dm #endif /* CONFIG_USB_HCI */ #ifdef CONFIG_USE_VMALLOC +#define rtw_vmalloc(sz) dbg_rtw_vmalloc((sz), MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) #define rtw_zvmalloc(sz) dbg_rtw_zvmalloc((sz), MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) #define rtw_vmfree(pbuf, sz) dbg_rtw_vmfree((pbuf), (sz), MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) #define rtw_vmalloc_f(sz, mstat_f) dbg_rtw_vmalloc((sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) #define rtw_zvmalloc_f(sz, mstat_f) dbg_rtw_zvmalloc((sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) #define rtw_vmfree_f(pbuf, sz, mstat_f) dbg_rtw_vmfree((pbuf), (sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) #else /* CONFIG_USE_VMALLOC */ +#define rtw_vmalloc(sz) dbg_rtw_malloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_zvmalloc(sz) dbg_rtw_zmalloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_vmfree(pbuf, sz) dbg_rtw_mfree((pbuf), (sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_vmalloc_f(sz, mstat_f) dbg_rtw_malloc((sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_zvmalloc_f(sz, mstat_f) dbg_rtw_zmalloc((sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_vmfree_f(pbuf, sz, mstat_f) dbg_rtw_mfree((pbuf), (sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #endif /* CONFIG_USE_VMALLOC */ +#define rtw_malloc(sz) dbg_rtw_malloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_zmalloc(sz) dbg_rtw_zmalloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_mfree(pbuf, sz) dbg_rtw_mfree((pbuf), (sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_malloc_f(sz, mstat_f) dbg_rtw_malloc((sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) @@ -211,6 +219,7 @@ void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dm #define rtw_mstat_update(flag, status, sz) do {} while (0) #define rtw_mstat_dump(sel) do {} while (0) #define match_mstat_sniff_rules(flags, size) _FALSE +void *_rtw_vmalloc(u32 sz); void *_rtw_zvmalloc(u32 sz); void _rtw_vmfree(void *pbuf, u32 sz); void *_rtw_zmalloc(u32 sz); @@ -321,6 +330,7 @@ extern void _rtw_mutex_free(_mutex *pmutex); #ifndef PLATFORM_FREEBSD extern void _rtw_spinlock_init(_lock *plock); #endif /* PLATFORM_FREEBSD */ +extern void _rtw_spinlock_free(_lock *plock); extern void _rtw_spinlock(_lock *plock); extern void _rtw_spinunlock(_lock *plock); extern void _rtw_spinlock_ex(_lock *plock); @@ -573,6 +583,7 @@ static inline int largest_bit(u32 bitmask) return i; } +#define rtw_abs(a) (a < 0 ? -a : a) #define rtw_min(a, b) ((a > b) ? b : a) #define rtw_is_range_a_in_b(hi_a, lo_a, hi_b, lo_b) (((hi_a) <= (hi_b)) && ((lo_a) >= (lo_b))) #define rtw_is_range_overlap(hi_a, lo_a, hi_b, lo_b) (((hi_a) > (lo_b)) && ((lo_a) < (hi_b))) @@ -584,6 +595,7 @@ static inline int largest_bit(u32 bitmask) #define MAC_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5] #endif +bool rtw_macaddr_is_larger(const u8 *a, const u8 *b); extern void rtw_suspend_lock_init(void); extern void rtw_suspend_lock_uninit(void); @@ -617,6 +629,7 @@ extern bool ATOMIC_INC_UNLESS(ATOMIC_T *v, int u); /* File operation APIs, just for linux now */ extern int rtw_is_file_readable(const char *path); extern int rtw_is_file_readable_with_size(const char *path, u32 *sz); +extern int rtw_readable_file_sz_chk(const char *path, u32 sz); extern int rtw_retrieve_from_file(const char *path, u8 *buf, u32 sz); extern int rtw_store_to_file(const char *path, u8 *buf, u32 sz); diff --git a/include/osdep_service_bsd.h b/include/osdep_service_bsd.h index 4412963..f8f15d6 100644 --- a/include/osdep_service_bsd.h +++ b/include/osdep_service_bsd.h @@ -104,6 +104,7 @@ typedef void timer_hdl_return; typedef void* timer_hdl_context; typedef struct work_struct _workitem; + typedef struct task _tasklet; #define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) /* emulate a modern version */ diff --git a/include/osdep_service_linux.h b/include/osdep_service_linux.h index 769d6e4..75fbd79 100644 --- a/include/osdep_service_linux.h +++ b/include/osdep_service_linux.h @@ -93,10 +93,6 @@ #include #endif /* CONFIG_IOCTL_CFG80211 */ -#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX - #include - #include -#endif #ifdef CONFIG_HAS_EARLYSUSPEND #include @@ -221,6 +217,7 @@ typedef void *timer_hdl_context; #endif typedef unsigned long systime; +typedef struct tasklet_struct _tasklet; #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 22)) /* Porting from linux kernel, for compatible with old kernel. */ @@ -537,7 +534,21 @@ struct rtw_netdev_priv_indicator { struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv); extern struct net_device *rtw_alloc_etherdev(int sizeof_priv); +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) +#define rtw_get_same_net_ndev_by_name(ndev, name) dev_get_by_name(name) +#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)) +#define rtw_get_same_net_ndev_by_name(ndev, name) dev_get_by_name(ndev->nd_net, name) +#else +#define rtw_get_same_net_ndev_by_name(ndev, name) dev_get_by_name(dev_net(ndev), name) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) +#define rtw_get_bridge_ndev_by_name(name) dev_get_by_name(name) +#else +#define rtw_get_bridge_ndev_by_name(name) dev_get_by_name(&init_net, name) +#endif + #define STRUCT_PACKED __attribute__ ((packed)) -#endif +#endif /* __OSDEP_LINUX_SERVICE_H_ */ diff --git a/include/pci_hal.h b/include/pci_hal.h index 16eac21..9f88d80 100644 --- a/include/pci_hal.h +++ b/include/pci_hal.h @@ -27,6 +27,10 @@ void rtl8192ee_set_hal_ops(_adapter *padapter); #endif +#if defined(CONFIG_RTL8192F) + void rtl8192fe_set_hal_ops(_adapter *padapter); +#endif + #ifdef CONFIG_RTL8723B void rtl8723be_set_hal_ops(_adapter *padapter); #endif @@ -43,6 +47,10 @@ void rtl8822be_set_hal_ops(PADAPTER padapter); #endif +#ifdef CONFIG_RTL8822C + void rtl8822ce_set_hal_ops(PADAPTER padapter); +#endif + u8 rtw_set_hal_ops(_adapter *padapter); #endif /* __PCIE_HAL_H__ */ diff --git a/include/pci_ops.h b/include/pci_ops.h index f195f5b..d67a8e1 100644 --- a/include/pci_ops.h +++ b/include/pci_ops.h @@ -25,6 +25,7 @@ void rtl8188ee_recv_tasklet(void *priv); void rtl8188ee_prepare_bcn_tasklet(void *priv); void rtl8188ee_set_intf_ops(struct _io_ops *pops); + void rtw8188ee_unmap_beacon_icf(_adapter *padapter); #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) @@ -36,6 +37,7 @@ void rtl8812ae_recv_tasklet(void *priv); void rtl8812ae_prepare_bcn_tasklet(void *priv); void rtl8812ae_set_intf_ops(struct _io_ops *pops); + void rtw8812ae_unmap_beacon_icf(_adapter *padapter); #endif #ifdef CONFIG_RTL8192E @@ -46,6 +48,19 @@ void rtl8192ee_prepare_bcn_tasklet(void *priv); int rtl8192ee_interrupt(PADAPTER Adapter); void rtl8192ee_set_intf_ops(struct _io_ops *pops); + void rtw8192ee_unmap_beacon_icf(_adapter *padapter); +#endif + +#ifdef CONFIG_RTL8192F + u32 rtl8192fe_init_desc_ring(_adapter *padapter); + u32 rtl8192fe_free_desc_ring(_adapter *padapter); + void rtl8192fe_reset_desc_ring(_adapter *padapter); + int rtl8192fe_interrupt(PADAPTER Adapter); + void rtl8192fe_recv_tasklet(void *priv); + void rtl8192fe_prepare_bcn_tasklet(void *priv); + void rtl8192fe_set_intf_ops(struct _io_ops *pops); + u8 check_tx_desc_resource(_adapter *padapter, int prio); + void rtl8192fe_unmap_beacon_icf(PADAPTER Adapter); #endif #ifdef CONFIG_RTL8723B @@ -56,6 +71,7 @@ void rtl8723be_recv_tasklet(void *priv); void rtl8723be_prepare_bcn_tasklet(void *priv); void rtl8723be_set_intf_ops(struct _io_ops *pops); + void rtl8723be_unmap_beacon_icf(PADAPTER Adapter); #endif #ifdef CONFIG_RTL8723D @@ -67,6 +83,7 @@ void rtl8723de_prepare_bcn_tasklet(void *priv); void rtl8723de_set_intf_ops(struct _io_ops *pops); u8 check_tx_desc_resource(_adapter *padapter, int prio); + void rtl8723de_unmap_beacon_icf(PADAPTER Adapter); #endif #ifdef CONFIG_RTL8814A @@ -78,6 +95,7 @@ void rtl8814ae_recv_tasklet(void *priv); void rtl8814ae_prepare_bcn_tasklet(void *priv); void rtl8814ae_set_intf_ops(struct _io_ops *pops); + void rtl8814ae_unmap_beacon_icf(PADAPTER Adapter); #endif #ifdef CONFIG_RTL8822B @@ -88,4 +106,8 @@ void rtl8821ce_set_intf_ops(struct _io_ops *pops); #endif +#ifdef CONFIG_RTL8822C + void rtl8822ce_set_intf_ops(struct _io_ops *pops); +#endif + #endif diff --git a/include/recv_osdep.h b/include/recv_osdep.h index 8c569b6..733a3e7 100644 --- a/include/recv_osdep.h +++ b/include/recv_osdep.h @@ -23,7 +23,7 @@ extern void _rtw_free_recv_priv(struct recv_priv *precvpriv); extern s32 rtw_recv_entry(union recv_frame *precv_frame); void rtw_rframe_set_os_pkt(union recv_frame *rframe); extern int rtw_recv_indicatepkt(_adapter *adapter, union recv_frame *precv_frame); -extern void rtw_recv_returnpacket(IN _nic_hdl cnxt, IN _pkt *preturnedpkt); +extern void rtw_recv_returnpacket(_nic_hdl cnxt, _pkt *preturnedpkt); extern int rtw_recv_monitor(_adapter *padapter, union recv_frame *precv_frame); diff --git a/include/rtl8188e_cmd.h b/include/rtl8188e_cmd.h index 99a9cba..aba0bec 100644 --- a/include/rtl8188e_cmd.h +++ b/include/rtl8188e_cmd.h @@ -135,7 +135,6 @@ typedef struct _RSVDPAGE_LOC_88E { /* host message to firmware cmd */ void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); -u8 rtl8188e_set_rssi_cmd(PADAPTER padapter, u8 *param); s32 FillH2CCmd_88E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); /* u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); */ u8 GetTxBufferRsvdPageNum8188E(_adapter *padapter, bool wowlan); diff --git a/include/rtl8188e_dm.h b/include/rtl8188e_dm.h index 501d3a9..457ae9b 100644 --- a/include/rtl8188e_dm.h +++ b/include/rtl8188e_dm.h @@ -15,13 +15,13 @@ #ifndef __RTL8188E_DM_H__ #define __RTL8188E_DM_H__ -void rtl8188e_init_dm_priv(IN PADAPTER Adapter); -void rtl8188e_deinit_dm_priv(IN PADAPTER Adapter); -void rtl8188e_InitHalDm(IN PADAPTER Adapter); -void rtl8188e_HalDmWatchDog(IN PADAPTER Adapter); +void rtl8188e_init_dm_priv(PADAPTER Adapter); +void rtl8188e_deinit_dm_priv(PADAPTER Adapter); +void rtl8188e_InitHalDm(PADAPTER Adapter); +void rtl8188e_HalDmWatchDog(PADAPTER Adapter); -/* VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); */ +/* void rtl8192c_dm_CheckTXPowerTracking(PADAPTER Adapter); */ -/* void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); */ +/* void rtl8192c_dm_RF_Saving(PADAPTER pAdapter, u8 bForceInNormal); */ #endif diff --git a/include/rtl8188e_hal.h b/include/rtl8188e_hal.h index d589583..611cc73 100644 --- a/include/rtl8188e_hal.h +++ b/include/rtl8188e_hal.h @@ -128,16 +128,17 @@ typedef struct _RT_8188E_FIRMWARE_HDR { #define MAX_TX_REPORT_BUFFER_SIZE 0x0400 /* 1k */ +#define PAGE_SIZE_TX_88E PAGE_SIZE_128 /* Note: We will divide number of page equally for each queue other than public queue! * 22k = 22528 bytes = 176 pages (@page = 128 bytes) - * At leat 4 BCN pages for GO - * 4 BCN + 1 ps-poll + 1 null-data + 1 prob_rsp + 1 QOS null-data = 8 pages */ + * BCN rsvd_page_num = MAX_BEACON_LEN / PAGE_SIZE_TX_88E + * 1 ps-poll / 1 null-data /1 prob_rsp /1 QOS null-data = 4 pages */ -#define BCNQ_PAGE_NUM_88E 0x08 +#define BCNQ_PAGE_NUM_88E (MAX_BEACON_LEN / PAGE_SIZE_TX_88E + 4) /*0x09*/ /* For WoWLan , more reserved page */ #ifdef CONFIG_WOWLAN - /* 1 ArpRsp + 2 NbrAdv + 2 NDPInfo + 1 RCI + 1 AOAC = 7 pages*/ + /* 1 ArpRsp + 2 NbrAdv + 2 NDPInfo + 1 RCI + 1 AOAC = 7 pages */ #define WOWLAN_PAGE_NUM_88E 0x07 #else #define WOWLAN_PAGE_NUM_88E 0x00 @@ -284,7 +285,6 @@ BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter); void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); #endif /*CONFIG_RF_POWER_TRIM*/ -void rtl8188e_init_default_value(_adapter *adapter); void InitBeaconParameters_8188e(_adapter *adapter); void SetBeaconRelatedRegisters8188E(PADAPTER padapter); @@ -292,9 +292,6 @@ void SetBeaconRelatedRegisters8188E(PADAPTER padapter); void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc); void init_hal_spec_8188e(_adapter *adapter); -/* register */ -void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); - void rtl8188e_start_thread(_adapter *padapter); void rtl8188e_stop_thread(_adapter *padapter); @@ -309,9 +306,9 @@ void GetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); u8 GetHalDefVar8188E( - IN PADAPTER Adapter, - IN HAL_DEF_VARIABLE eVariable, - IN PVOID pValue + PADAPTER Adapter, + HAL_DEF_VARIABLE eVariable, + void *pValue ); #ifdef CONFIG_GPIO_API int rtl8188e_GpioFuncCheck(PADAPTER adapter, u8 gpio_num); diff --git a/include/rtl8188e_recv.h b/include/rtl8188e_recv.h index 92425a8..31058c1 100644 --- a/include/rtl8188e_recv.h +++ b/include/rtl8188e_recv.h @@ -20,20 +20,15 @@ #define RECV_BLK_TH RECV_BLK_CNT #if defined(CONFIG_USB_HCI) - #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ + /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ + /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ + #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ + /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ #else - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ - #else - #define MAX_RECVBUF_SZ (4000) /* about 4K */ - #endif + #define MAX_RECVBUF_SZ (4000) /* about 4K */ #endif #endif /* !MAX_RECVBUF_SZ */ diff --git a/include/rtl8188e_rf.h b/include/rtl8188e_rf.h index f5c5fbd..8dc413e 100644 --- a/include/rtl8188e_rf.h +++ b/include/rtl8188e_rf.h @@ -17,11 +17,11 @@ -int PHY_RF6052_Config8188E(IN PADAPTER Adapter); -void rtl8188e_RF_ChangeTxPath(IN PADAPTER Adapter, - IN u16 DataRate); +int PHY_RF6052_Config8188E(PADAPTER Adapter); +void rtl8188e_RF_ChangeTxPath(PADAPTER Adapter, + u16 DataRate); void rtl8188e_PHY_RF6052SetBandwidth( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth); + PADAPTER Adapter, + enum channel_width Bandwidth); #endif/* __RTL8188E_RF_H__ */ diff --git a/include/rtl8188f_cmd.h b/include/rtl8188f_cmd.h index a198e33..a90a630 100644 --- a/include/rtl8188f_cmd.h +++ b/include/rtl8188f_cmd.h @@ -113,7 +113,6 @@ enum h2c_cmd_8188F { #define SET_8188F_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_8188F_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) #define SET_8188F_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define SET_8188F_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) #define GET_8188F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) @@ -159,7 +158,7 @@ enum h2c_cmd_8188F { #define SET_8188F_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) /* _BT_FW_PATCH_0x6A */ -#define SET_8188F_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) +#define SET_8188F_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) #define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) #define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) @@ -178,7 +177,6 @@ enum h2c_cmd_8188F { /* host message to firmware cmd */ void rtl8188f_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); void rtl8188f_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -void rtl8188f_set_rssi_cmd(PADAPTER padapter, u8 *param); void rtl8188f_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); /* s32 rtl8188f_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ void rtl8188f_set_FwPsTuneParam_cmd(PADAPTER padapter); diff --git a/include/rtl8188f_hal.h b/include/rtl8188f_hal.h index 7aaead7..5db99a4 100644 --- a/include/rtl8188f_hal.h +++ b/include/rtl8188f_hal.h @@ -104,18 +104,10 @@ typedef struct _RT_8188F_FIRMWARE_HDR { /* Note: We will divide number of page equally for each queue other than public queue! */ /* For General Reserved Page Number(Beacon Queue is reserved page) - * Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 */ -#define BCNQ_PAGE_NUM_8188F 0x08 -#ifdef CONFIG_CONCURRENT_MODE - #define BCNQ1_PAGE_NUM_8188F 0x08 /* 0x04 */ -#else - #define BCNQ1_PAGE_NUM_8188F 0x00 -#endif + * BCN rsvd_page_num = MAX_BEACON_LEN / PAGE_SIZE_TX_8188F, + * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1, CTS-2-SELF / LTE QoS Null */ -#ifdef CONFIG_PNO_SUPPORT -#undef BCNQ1_PAGE_NUM_8188F -#define BCNQ1_PAGE_NUM_8188F 0x00 /* 0x04 */ -#endif +#define BCNQ_PAGE_NUM_8188F (MAX_BEACON_LEN / PAGE_SIZE_TX_8188F + 6) /*0x08*/ /* For WoWLan , more reserved page * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt:1 ,PNO: 6 @@ -136,7 +128,7 @@ typedef struct _RT_8188F_FIRMWARE_HDR { #define AP_WOWLAN_PAGE_NUM_8188F 0x02 #endif -#define TX_TOTAL_PAGE_NUMBER_8188F (0xFF - BCNQ_PAGE_NUM_8188F - BCNQ1_PAGE_NUM_8188F - WOWLAN_PAGE_NUM_8188F) +#define TX_TOTAL_PAGE_NUMBER_8188F (0xFF - BCNQ_PAGE_NUM_8188F - WOWLAN_PAGE_NUM_8188F) #define TX_PAGE_BOUNDARY_8188F (TX_TOTAL_PAGE_NUMBER_8188F + 1) #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8188F TX_TOTAL_PAGE_NUMBER_8188F @@ -216,7 +208,7 @@ void Hal_EfuseParseThermalMeter_8188F(PADAPTER padapter, u8 *hwinfo, u8 AutoLoad void Hal_EfuseParseKFreeData_8188F(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); #if 0 /* Do not need for rtl8188f */ -VOID Hal_EfuseParseVoltage_8188F(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParseVoltage_8188F(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); #endif void rtl8188f_set_pll_ref_clk_sel(_adapter *adapter, u8 sel); @@ -252,7 +244,7 @@ void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); #endif #ifdef CONFIG_MP_INCLUDED -int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); +int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); #endif void CCX_FwC2HTxRpt_8188f(PADAPTER padapter, u8 *pdata, u8 len); @@ -262,7 +254,7 @@ u8 HwRateToMRate8188F(u8 rate); #ifdef CONFIG_PCI_HCI BOOLEAN InterruptRecognized8188FE(PADAPTER Adapter); -VOID UpdateInterruptMask8188FE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); +void UpdateInterruptMask8188FE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); #endif #endif diff --git a/include/rtl8188f_recv.h b/include/rtl8188f_recv.h index 6366b81..ca06598 100644 --- a/include/rtl8188f_recv.h +++ b/include/rtl8188f_recv.h @@ -17,24 +17,21 @@ #if defined(CONFIG_USB_HCI) #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ + + #ifdef CONFIG_MINIMAL_MEMORY_USAGE + #define MAX_RECVBUF_SZ (4000) /* about 4K */ #else - #ifdef CONFIG_MINIMAL_MEMORY_USAGE - #define MAX_RECVBUF_SZ (4000) /* about 4K */ + #ifdef CONFIG_PLATFORM_MSTAR + #define MAX_RECVBUF_SZ (8192) /* 8K */ + #elif defined(CONFIG_PLATFORM_HISILICON) + #define MAX_RECVBUF_SZ (16384) /* 16k */ #else - #ifdef CONFIG_PLATFORM_MSTAR - #define MAX_RECVBUF_SZ (8192) /* 8K */ - #elif defined(CONFIG_PLATFORM_HISILICON) - #define MAX_RECVBUF_SZ (16384) /* 16k */ - #else - #define MAX_RECVBUF_SZ (32768) /* 32k */ - #endif - /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */ - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ + #define MAX_RECVBUF_SZ (32768) /* 32k */ #endif + /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ + /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ + /* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */ + /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ #endif #endif /* !MAX_RECVBUF_SZ */ #elif defined(CONFIG_PCI_HCI) diff --git a/include/rtl8188f_rf.h b/include/rtl8188f_rf.h index bf4f591..a033831 100644 --- a/include/rtl8188f_rf.h +++ b/include/rtl8188f_rf.h @@ -15,11 +15,11 @@ #ifndef __RTL8188F_RF_H__ #define __RTL8188F_RF_H__ -int PHY_RF6052_Config8188F(IN PADAPTER Adapter); +int PHY_RF6052_Config8188F(PADAPTER Adapter); -VOID +void PHY_RF6052SetBandwidth8188F( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth); + PADAPTER Adapter, + enum channel_width Bandwidth); #endif diff --git a/include/rtl8188f_spec.h b/include/rtl8188f_spec.h index 6e99acf..d947ba8 100644 --- a/include/rtl8188f_spec.h +++ b/include/rtl8188f_spec.h @@ -150,18 +150,6 @@ #define SDIO_REG_HCPWM1_8188F 0x0038 -/* indirect access */ -#define SDIO_REG_INDIRECT_REG_CFG_8188F 0x40 -#define SET_INDIRECT_REG_ADDR(_cmd, _addr) SET_BITS_TO_LE_2BYTE(((u8 *)(_cmd)) + 0, 0, 16, (_addr)) -#define SET_INDIRECT_REG_SIZE_1BYTE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 0) -#define SET_INDIRECT_REG_SIZE_2BYTE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 1) -#define SET_INDIRECT_REG_SIZE_4BYTE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 2) -#define SET_INDIRECT_REG_WRITE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 2, 1, 1) -#define SET_INDIRECT_REG_READ(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 3, 1, 1) -#define GET_INDIRECT_REG_RDY(_cmd) LE_BITS_TO_1BYTE(((u8 *)(_cmd)) + 2, 4, 1) - -#define SDIO_REG_INDIRECT_REG_DATA_8188F 0x44 - /* **************************************************************************** * 8188 Regsiter Bit and Content definition * **************************************************************************** */ diff --git a/include/rtl8188f_xmit.h b/include/rtl8188f_xmit.h index cf75fce..40493ce 100644 --- a/include/rtl8188f_xmit.h +++ b/include/rtl8188f_xmit.h @@ -184,13 +184,15 @@ #define SET_TX_DESC_ANTSEL_D_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) /* Dword 7 */ -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) +#ifdef CONFIG_PCI_HCI #define SET_TX_DESC_TX_BUFFER_SIZE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#else +#endif + +#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) #define SET_TX_DESC_TX_DESC_CHECKSUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) #endif #define SET_TX_DESC_USB_TXAGG_NUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -#if (DEV_BUS_TYPE == RT_SDIO_INTERFACE) +#ifdef CONFIG_SDIO_HCI #define SET_TX_DESC_SDIO_TXSEQ_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) #endif diff --git a/include/rtl8192e_cmd.h b/include/rtl8192e_cmd.h index 6aff7ea..5efdf99 100644 --- a/include/rtl8192e_cmd.h +++ b/include/rtl8192e_cmd.h @@ -101,7 +101,6 @@ typedef struct _RSVDPAGE_LOC_92E { #define SET_8192E_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_8192E_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) #define SET_8192E_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define SET_8192E_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) #define GET_8192E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) /* _P2P_PS_OFFLOAD */ @@ -116,7 +115,6 @@ typedef struct _RSVDPAGE_LOC_92E { /* host message to firmware cmd */ void rtl8192e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); void rtl8192e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); -u8 rtl8192e_set_rssi_cmd(PADAPTER padapter, u8 *param); s32 FillH2CCmd_8192E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); u8 GetTxBufferRsvdPageNum8192E(_adapter *padapter, bool wowlan); /* u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); */ diff --git a/include/rtl8192e_dm.h b/include/rtl8192e_dm.h index 5f6ee4b..0a65a1b 100644 --- a/include/rtl8192e_dm.h +++ b/include/rtl8192e_dm.h @@ -16,13 +16,13 @@ #define __RTL8192E_DM_H__ -void rtl8192e_init_dm_priv(IN PADAPTER Adapter); -void rtl8192e_deinit_dm_priv(IN PADAPTER Adapter); -void rtl8192e_InitHalDm(IN PADAPTER Adapter); -void rtl8192e_HalDmWatchDog(IN PADAPTER Adapter); +void rtl8192e_init_dm_priv(PADAPTER Adapter); +void rtl8192e_deinit_dm_priv(PADAPTER Adapter); +void rtl8192e_InitHalDm(PADAPTER Adapter); +void rtl8192e_HalDmWatchDog(PADAPTER Adapter); -/* VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); */ +/* void rtl8192c_dm_CheckTXPowerTracking(PADAPTER Adapter); */ -/* void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); */ +/* void rtl8192c_dm_RF_Saving(PADAPTER pAdapter, u8 bForceInNormal); */ #endif diff --git a/include/rtl8192e_hal.h b/include/rtl8192e_hal.h index edd4040..417147d 100644 --- a/include/rtl8192e_hal.h +++ b/include/rtl8192e_hal.h @@ -121,10 +121,15 @@ typedef struct _RT_FIRMWARE_8192E { #endif #define MAX_RX_DMA_BUFFER_SIZE_8192E (RX_DMA_SIZE_8192E-RX_DMA_RESERVED_SIZE_8192E) /*RX 16K*/ + +#define PAGE_SIZE_TX_92E PAGE_SIZE_256 + /* For General Reserved Page Number(Beacon Queue is reserved page) * if (CONFIG_2BCN_EN) Beacon:4, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 - * Beacon:2, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 */ -#define RSVD_PAGE_NUM_8192E 0x08 + * Beacon: MAX_BEACON_LEN / PAGE_SIZE_TX_92E + * PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1,CTS-2-SELF / LTE QoS Null*/ + +#define RSVD_PAGE_NUM_8192E (MAX_BEACON_LEN / PAGE_SIZE_TX_92E + 6) /*0x08*/ /* For WoWLan , more reserved page * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1,PNO: 6 * NS offload: 2 NDP info: 1 @@ -154,7 +159,6 @@ Total page numbers : 256(0x100) #define TX_PAGE_BOUNDARY_8192E (TX_TOTAL_PAGE_NUMBER_8192E) /* beacon header start address */ -#define PAGE_SIZE_TX_92E PAGE_SIZE_256 #define RSVD_PKT_LEN_92E (TOTAL_RSVD_PAGE_NUMBER_8192E * PAGE_SIZE_TX_92E) #define TX_PAGE_LOAD_FW_BOUNDARY_8192E 0x47 /* 0xA5 */ @@ -262,27 +266,27 @@ BOOLEAN HalDetectPwrDownMode8192E(PADAPTER Adapter); /***********************************************************/ /* RTL8192E-MAC Setting */ -VOID _InitQueueReservedPage_8192E(IN PADAPTER Adapter); -VOID _InitQueuePriority_8192E(IN PADAPTER Adapter); -VOID _InitTxBufferBoundary_8192E(IN PADAPTER Adapter, IN u8 txpktbuf_bndy); -VOID _InitPageBoundary_8192E(IN PADAPTER Adapter); -/* VOID _InitTransferPageSize_8192E(IN PADAPTER Adapter); */ -VOID _InitDriverInfoSize_8192E(IN PADAPTER Adapter, IN u8 drvInfoSize); -VOID _InitRDGSetting_8192E(PADAPTER Adapter); -void _InitID_8192E(IN PADAPTER Adapter); -VOID _InitNetworkType_8192E(IN PADAPTER Adapter); -VOID _InitWMACSetting_8192E(IN PADAPTER Adapter); -VOID _InitAdaptiveCtrl_8192E(IN PADAPTER Adapter); -VOID _InitEDCA_8192E(IN PADAPTER Adapter); -VOID _InitRetryFunction_8192E(IN PADAPTER Adapter); -VOID _BBTurnOnBlock_8192E(IN PADAPTER Adapter); -VOID _InitBeaconParameters_8192E(IN PADAPTER Adapter); -VOID _InitBeaconMaxError_8192E( - IN PADAPTER Adapter, - IN BOOLEAN InfraMode +void _InitQueueReservedPage_8192E(PADAPTER Adapter); +void _InitQueuePriority_8192E(PADAPTER Adapter); +void _InitTxBufferBoundary_8192E(PADAPTER Adapter, u8 txpktbuf_bndy); +void _InitPageBoundary_8192E(PADAPTER Adapter); +/* void _InitTransferPageSize_8192E(PADAPTER Adapter); */ +void _InitDriverInfoSize_8192E(PADAPTER Adapter, u8 drvInfoSize); +void _InitRDGSetting_8192E(PADAPTER Adapter); +void _InitID_8192E(PADAPTER Adapter); +void _InitNetworkType_8192E(PADAPTER Adapter); +void _InitWMACSetting_8192E(PADAPTER Adapter); +void _InitAdaptiveCtrl_8192E(PADAPTER Adapter); +void _InitEDCA_8192E(PADAPTER Adapter); +void _InitRetryFunction_8192E(PADAPTER Adapter); +void _BBTurnOnBlock_8192E(PADAPTER Adapter); +void _InitBeaconParameters_8192E(PADAPTER Adapter); +void _InitBeaconMaxError_8192E( + PADAPTER Adapter, + BOOLEAN InfraMode ); void SetBeaconRelatedRegisters8192E(PADAPTER padapter); -VOID hal_ReadRFType_8192E(PADAPTER Adapter); +void hal_ReadRFType_8192E(PADAPTER Adapter); /* RTL8192E-MAC Setting ***********************************************************/ @@ -290,22 +294,20 @@ u8 SetHwReg8192E(PADAPTER Adapter, u8 variable, u8 *val); void GetHwReg8192E(PADAPTER Adapter, u8 variable, u8 *val); u8 SetHalDefVar8192E( - IN PADAPTER Adapter, - IN HAL_DEF_VARIABLE eVariable, - IN PVOID pValue + PADAPTER Adapter, + HAL_DEF_VARIABLE eVariable, + void *pValue ); u8 GetHalDefVar8192E( - IN PADAPTER Adapter, - IN HAL_DEF_VARIABLE eVariable, - IN PVOID pValue + PADAPTER Adapter, + HAL_DEF_VARIABLE eVariable, + void *pValue ); void rtl8192e_set_hal_ops(struct hal_ops *pHalFunc); void init_hal_spec_8192e(_adapter *adapter); void rtl8192e_init_default_value(_adapter *padapter); -/* register */ -void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); void rtl8192e_start_thread(_adapter *padapter); void rtl8192e_stop_thread(_adapter *padapter); diff --git a/include/rtl8192e_recv.h b/include/rtl8192e_recv.h index 6ccb8e9..c19a980 100644 --- a/include/rtl8192e_recv.h +++ b/include/rtl8192e_recv.h @@ -18,28 +18,24 @@ #if defined(CONFIG_USB_HCI) #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ + #ifdef CONFIG_MINIMAL_MEMORY_USAGE + #define MAX_RECVBUF_SZ (4000) /* about 4K */ #else - #ifdef CONFIG_MINIMAL_MEMORY_USAGE - #define MAX_RECVBUF_SZ (4000) /* about 4K */ + #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER + #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ + #elif defined(CONFIG_PLATFORM_HISILICON) + #define MAX_RECVBUF_SZ (16384) /* 16k */ #else - #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER - #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ - #elif defined(CONFIG_PLATFORM_HISILICON) - #define MAX_RECVBUF_SZ (16384) /* 16k */ - #else - #define MAX_RECVBUF_SZ (32768) /* 32k */ - #endif - /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */ - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ - #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 - #undef MAX_RECVBUF_SZ - #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ - #endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */ + #define MAX_RECVBUF_SZ (32768) /* 32k */ #endif + /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ + /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ + /* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */ + /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ + #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 + #undef MAX_RECVBUF_SZ + #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ + #endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */ #endif #endif /* !MAX_RECVBUF_SZ */ diff --git a/include/rtl8192e_rf.h b/include/rtl8192e_rf.h index f15e070..77dca74 100644 --- a/include/rtl8192e_rf.h +++ b/include/rtl8192e_rf.h @@ -15,14 +15,14 @@ #ifndef __RTL8192E_RF_H__ #define __RTL8192E_RF_H__ -VOID +void PHY_RF6052SetBandwidth8192E( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth); + PADAPTER Adapter, + enum channel_width Bandwidth); int PHY_RF6052_Config_8192E( - IN PADAPTER Adapter); + PADAPTER Adapter); #endif/* __RTL8192E_RF_H__ */ diff --git a/include/rtl8192e_xmit.h b/include/rtl8192e_xmit.h index 0202302..559eefe 100644 --- a/include/rtl8192e_xmit.h +++ b/include/rtl8192e_xmit.h @@ -317,9 +317,11 @@ typedef struct txdescriptor_8192e { #define SET_TX_DESC_ANTSEL_D_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) /* Dword 7 */ -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) +#ifdef CONFIG_PCI_HCI #define SET_TX_DESC_TX_BUFFER_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#else +#endif + +#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) #define SET_TX_DESC_TX_DESC_CHECKSUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) #endif #define SET_TX_DESC_USB_TXAGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) diff --git a/include/rtl8192f_cmd.h b/include/rtl8192f_cmd.h new file mode 100644 index 0000000..38d4f85 --- /dev/null +++ b/include/rtl8192f_cmd.h @@ -0,0 +1,194 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8192F_CMD_H__ +#define __RTL8192F_CMD_H__ + +/* --------------------------------------------------------------------------------------------------------- + * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ + * --------------------------------------------------------------------------------------------------------- */ + +enum h2c_cmd_8192F { + /* Common Class: 000 */ + H2C_8192F_RSVD_PAGE = 0x00, + H2C_8192F_MEDIA_STATUS_RPT = 0x01, + H2C_8192F_SCAN_ENABLE = 0x02, + H2C_8192F_KEEP_ALIVE = 0x03, + H2C_8192F_DISCON_DECISION = 0x04, + H2C_8192F_PSD_OFFLOAD = 0x05, + H2C_8192F_AP_OFFLOAD = 0x08, + H2C_8192F_BCN_RSVDPAGE = 0x09, + H2C_8192F_PROBERSP_RSVDPAGE = 0x0A, + H2C_8192F_FCS_RSVDPAGE = 0x10, + H2C_8192F_FCS_INFO = 0x11, + H2C_8192F_AP_WOW_GPIO_CTRL = 0x13, + + /* PoweSave Class: 001 */ + H2C_8192F_SET_PWR_MODE = 0x20, + H2C_8192F_PS_TUNING_PARA = 0x21, + H2C_8192F_PS_TUNING_PARA2 = 0x22, + H2C_8192F_P2P_LPS_PARAM = 0x23, + H2C_8192F_P2P_PS_OFFLOAD = 0x24, + H2C_8192F_PS_SCAN_ENABLE = 0x25, + H2C_8192F_SAP_PS_ = 0x26, + H2C_8192F_INACTIVE_PS_ = 0x27,/* Inactive_PS */ + H2C_8192F_FWLPS_IN_IPS_ = 0x28, + + /* Dynamic Mechanism Class: 010 */ + H2C_8192F_MACID_CFG = 0x40, + H2C_8192F_TXBF = 0x41, + H2C_8192F_RSSI_SETTING = 0x42, + H2C_8192F_AP_REQ_TXRPT = 0x43, + H2C_8192F_INIT_RATE_COLLECT = 0x44, + H2C_8192F_RA_PARA_ADJUST = 0x46, + + /* BT Class: 011 */ + H2C_8192F_B_TYPE_TDMA = 0x60, + H2C_8192F_BT_INFO = 0x61, + H2C_8192F_FORCE_BT_TXPWR = 0x62, + H2C_8192F_BT_IGNORE_WLANACT = 0x63, + H2C_8192F_DAC_SWING_VALUE = 0x64, + H2C_8192F_ANT_SEL_RSV = 0x65, + H2C_8192F_WL_OPMODE = 0x66, + H2C_8192F_BT_MP_OPER = 0x67, + H2C_8192F_BT_CONTROL = 0x68, + H2C_8192F_BT_WIFI_CTRL = 0x69, + H2C_8192F_BT_FW_PATCH = 0x6A, + H2C_8192F_BT_WLAN_CALIBRATION = 0x6D, + + /* WOWLAN Class: 100 */ + H2C_8192F_WOWLAN = 0x80, + H2C_8192F_REMOTE_WAKE_CTRL = 0x81, + H2C_8192F_AOAC_GLOBAL_INFO = 0x82, + H2C_8192F_AOAC_RSVD_PAGE = 0x83, + H2C_8192F_AOAC_RSVD_PAGE2 = 0x84, + H2C_8192F_D0_SCAN_OFFLOAD_CTRL = 0x85, + H2C_8192F_D0_SCAN_OFFLOAD_INFO = 0x86, + H2C_8192F_CHNL_SWITCH_OFFLOAD = 0x87, + H2C_8192F_P2P_OFFLOAD_RSVD_PAGE = 0x8A, + H2C_8192F_P2P_OFFLOAD = 0x8B, + + H2C_8192F_RESET_TSF = 0xC0, + H2C_8192F_MAXID, +}; + +/* --------------------------------------------------------------------------------------------------------- + * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- + * --------------------------------------------------------------------------------------------------------- + * _RSVDPAGE_LOC_CMD_0x00 */ +#define SET_8192F_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_8192F_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) +#define SET_8192F_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) +#define SET_8192F_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) +#define SET_8192F_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) + +/*_MEDIA_STATUS_RPT_PARM_CMD_0x01*/ +#define SET_8192F_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) +#define SET_8192F_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) +#define SET_8192F_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) +#define SET_8192F_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) +/* _PWR_MOD_CMD_0x20 */ +#define SET_8192F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_8192F_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) +#define SET_8192F_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) +#define SET_8192F_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) +#define SET_8192F_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) +#define SET_8192F_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) +#define SET_8192F_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) + +#define GET_8192F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) + +/* _PS_TUNE_PARAM_CMD_0x21 */ +#define SET_8192F_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_8192F_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) +#define SET_8192F_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) +#define SET_8192F_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) +#define SET_8192F_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) + +/* _MACID_CFG_CMD_0x40 */ +#define SET_8192F_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_8192F_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) +#define SET_8192F_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) +#define SET_8192F_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) +#define SET_8192F_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) +#define SET_8192F_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) +#define SET_8192F_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) +#define SET_8192F_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) +#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) +#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) +#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) +#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) + +/* _RSSI_SETTING_CMD_0x42 */ +#define SET_8192F_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_8192F_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) +#define SET_8192F_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) + +/* _AP_REQ_TXRPT_CMD_0x43 */ +#define SET_8192F_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_8192F_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) + +/* _FORCE_BT_TXPWR_CMD_0x62 */ +#define SET_8192F_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) + +/* _FORCE_BT_MP_OPER_CMD_0x67 */ +#define SET_8192F_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) +#define SET_8192F_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) +#define SET_8192F_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) +#define SET_8192F_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) +#define SET_8192F_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) +#define SET_8192F_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) + +/* _BT_FW_PATCH_0x6A */ +#define SET_8192F_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) +#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) +#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) +#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) +#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) + +/* --------------------------------------------------------------------------------------------------------- + * ------------------------------------------- Structure -------------------------------------------------- + * --------------------------------------------------------------------------------------------------------- */ + + +/* --------------------------------------------------------------------------------------------------------- + * ---------------------------------- Function Statement -------------------------------------------------- + * --------------------------------------------------------------------------------------------------------- */ + +/* host message to firmware cmd */ +void rtl8192f_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); +void rtl8192f_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); +/* s32 rtl8192f__set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ +void rtl8192f_set_FwPsTuneParam_cmd(PADAPTER padapter); +void rtl8192f_download_rsvd_page(PADAPTER padapter, u8 mstatus); +#ifdef CONFIG_BT_COEXIST + void rtl8192f__download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); +#endif /* CONFIG_BT_COEXIST */ +#ifdef CONFIG_P2P + void rtl8192f_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); +#endif /* CONFIG_P2P */ + +#ifdef CONFIG_TDLS +#ifdef CONFIG_TDLS_CH_SW +void rtl8192f_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); +#endif +#endif + +#ifdef CONFIG_P2P_WOWLAN + void rtl8192f_set_p2p_wowlan_offload_cmd(PADAPTER padapter); +#endif + +s32 FillH2CCmd8192F(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); +u8 GetTxBufferRsvdPageNum8192F(_adapter *padapter, bool wowlan); +#endif diff --git a/include/rtl8192f_dm.h b/include/rtl8192f_dm.h new file mode 100644 index 0000000..43e6396 --- /dev/null +++ b/include/rtl8192f_dm.h @@ -0,0 +1,27 @@ +/****************************************************************************** + * + * Copyright(c) 2012 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8192F_DM_H__ +#define __RTL8192F_DM_H__ + +void rtl8192f_init_dm_priv(PADAPTER Adapter); +void rtl8192f_deinit_dm_priv(PADAPTER Adapter); +void rtl8192f_InitHalDm(PADAPTER Adapter); +void rtl8192f_HalDmWatchDog(PADAPTER Adapter); + +/* void rtl8192c_dm_CheckTXPowerTracking(PADAPTER Adapter); */ + +/* void rtl8192c_dm_RF_Saving(PADAPTER pAdapter, u8 bForceInNormal); */ + +#endif diff --git a/include/rtl8192f_hal.h b/include/rtl8192f_hal.h new file mode 100644 index 0000000..e865f43 --- /dev/null +++ b/include/rtl8192f_hal.h @@ -0,0 +1,315 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8192F_HAL_H__ +#define __RTL8192F_HAL_H__ + +#include "hal_data.h" + +#include "rtl8192f_spec.h" +#include "rtl8192f_rf.h" +#include "rtl8192f_dm.h" +#include "rtl8192f_recv.h" +#include "rtl8192f_xmit.h" +#include "rtl8192f_cmd.h" +#include "rtl8192f_led.h" +#include "Hal8192FPwrSeq.h" +#include "Hal8192FPhyReg.h" +#include "Hal8192FPhyCfg.h" +#ifdef DBG_CONFIG_ERROR_DETECT +#include "rtl8192f_sreset.h" +#endif +#ifdef CONFIG_LPS_POFF + #include "rtl8192f_lps_poff.h" +#endif + +#define FW_8192F_SIZE 0x8000 +#define FW_8192F_START_ADDRESS 0x4000 +#define FW_8192F_END_ADDRESS 0x5000 /* brian_zhang@realsil.com.cn */ + +#define IS_FW_HEADER_EXIST_8192F(_pFwHdr)\ + ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x92F0) + +typedef struct _RT_FIRMWARE { + FIRMWARE_SOURCE eFWSource; +#ifdef CONFIG_EMBEDDED_FWIMG + u8 *szFwBuffer; +#else + u8 szFwBuffer[FW_8192F_SIZE]; +#endif + u32 ulFwLength; +} RT_FIRMWARE_8192F, *PRT_FIRMWARE_8192F; + +/* + * This structure must be cared byte-ordering + * + * Added by tynli. 2009.12.04. */ +typedef struct _RT_8192F_FIRMWARE_HDR { + /* 8-byte alinment required */ + + /* --- LONG WORD 0 ---- */ + u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ + u8 Category; /* AP/NIC and USB/PCI */ + u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ + u16 Version; /* FW Version */ + u16 Subversion; /* FW Subversion, default 0x00 */ + + /* --- LONG WORD 1 ---- */ + u8 Month; /* Release time Month field */ + u8 Date; /* Release time Date field */ + u8 Hour; /* Release time Hour field */ + u8 Minute; /* Release time Minute field */ + u16 RamCodeSize; /* The size of RAM code */ + u16 Rsvd2; + + /* --- LONG WORD 2 ---- */ + u32 SvnIdx; /* The SVN entry index */ + u32 Rsvd3; + + /* --- LONG WORD 3 ---- */ + u32 Rsvd4; + u32 Rsvd5; +} RT_8192F_FIRMWARE_HDR, *PRT_8192F_FIRMWARE_HDR; +#define DRIVER_EARLY_INT_TIME_8192F 0x05 +#define BCN_DMA_ATIME_INT_TIME_8192F 0x02 +/* for 8192F + * TX 64K, RX 16K, Page size 256B for TX*/ +#define PAGE_SIZE_TX_8192F 256 +#define PAGE_SIZE_RX_8192F 8 +#define TX_DMA_SIZE_8192F 0x10000/* 64K(TX) */ +#define RX_DMA_SIZE_8192F 0x4000/* 16K(RX) */ +#ifdef CONFIG_WOWLAN + #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ +#else + #define RESV_FMWF 0 +#endif + +#ifdef CONFIG_FW_C2H_DEBUG + #define RX_DMA_RESERVED_SIZE_8192F 0x100 /* 256B, reserved for c2h debug message */ +#else + #define RX_DMA_RESERVED_SIZE_8192F 0xc0 /* 192B, reserved for tx report 24*8=192*/ +#endif +#define RX_DMA_BOUNDARY_8192F\ + (RX_DMA_SIZE_8192F - RX_DMA_RESERVED_SIZE_8192F - 1) + + +/* Note: We will divide number of page equally for each queue other than public queue! */ + +/* For General Reserved Page Number(Beacon Queue is reserved page) + * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8192F + * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ +#define BCNQ_PAGE_NUM_8192F (MAX_BEACON_LEN/PAGE_SIZE_TX_8192F + 6) /*0x08*/ + + +/* For WoWLan , more reserved page + * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6 + * NS offload: 2 NDP info: 1 + */ +#ifdef CONFIG_WOWLAN + #define WOWLAN_PAGE_NUM_8192F 0x07 +#else + #define WOWLAN_PAGE_NUM_8192F 0x00 +#endif + +#ifdef CONFIG_PNO_SUPPORT + #undef WOWLAN_PAGE_NUM_8192F + #define WOWLAN_PAGE_NUM_8192F 0x15 +#endif + +#ifdef CONFIG_AP_WOWLAN + #define AP_WOWLAN_PAGE_NUM_8192F 0x02 +#endif + +#ifdef DBG_LA_MODE + #define LA_MODE_PAGE_NUM 0xE0 +#endif + +#define MAX_RX_DMA_BUFFER_SIZE_8192F (RX_DMA_SIZE_8192F - RX_DMA_RESERVED_SIZE_8192F) + +#ifdef DBG_LA_MODE + #define TX_TOTAL_PAGE_NUMBER_8192F (0xFF - LA_MODE_PAGE_NUM) +#else + #define TX_TOTAL_PAGE_NUMBER_8192F (0xFF - BCNQ_PAGE_NUM_8192F - WOWLAN_PAGE_NUM_8192F) +#endif + +#define TX_PAGE_BOUNDARY_8192F (TX_TOTAL_PAGE_NUMBER_8192F + 1) + +#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8192F \ + TX_TOTAL_PAGE_NUMBER_8192F +#define WMM_NORMAL_TX_PAGE_BOUNDARY_8192F \ + (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8192F + 1) + +/* For Normal Chip Setting + * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8192F */ +#define NORMAL_PAGE_NUM_HPQ_8192F 0x8 +#define NORMAL_PAGE_NUM_LPQ_8192F 0x8 +#define NORMAL_PAGE_NUM_NPQ_8192F 0x8 +#define NORMAL_PAGE_NUM_EPQ_8192F 0x00 + +/* Note: For Normal Chip Setting, modify later */ +#define WMM_NORMAL_PAGE_NUM_HPQ_8192F 0x30 +#define WMM_NORMAL_PAGE_NUM_LPQ_8192F 0x20 +#define WMM_NORMAL_PAGE_NUM_NPQ_8192F 0x20 +#define WMM_NORMAL_PAGE_NUM_EPQ_8192F 0x00 + + +#include "HalVerDef.h" +#include "hal_com.h" + +#define EFUSE_OOB_PROTECT_BYTES 56 /*0x1C8~0x1FF*/ + +#define HAL_EFUSE_MEMORY +#define HWSET_MAX_SIZE_8192F 512 +#define EFUSE_REAL_CONTENT_LEN_8192F 512 +#define EFUSE_MAP_LEN_8192F 512 +#define EFUSE_MAX_SECTION_8192F 64 + +/* For some inferiority IC purpose. added by Roger, 2009.09.02.*/ +#define EFUSE_IC_ID_OFFSET 506 +#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192F) + +#define EFUSE_ACCESS_ON 0x69 +#define EFUSE_ACCESS_OFF 0x00 + +/* ******************************************************** + * EFUSE for BT definition + * ******************************************************** */ +#define BANK_NUM 1 +#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 +#define EFUSE_BT_REAL_CONTENT_LEN 1536/*512 * 3 */ +/* (EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM)*/ +#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ +#define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */ +#define EFUSE_PROTECT_BYTES_BANK 16 + +typedef enum tag_Package_Definition { + PACKAGE_DEFAULT, + PACKAGE_QFN32, + PACKAGE_QFN40, + PACKAGE_QFN46 +} PACKAGE_TYPE_E; + +#define INCLUDE_MULTI_FUNC_BT(_Adapter) \ + (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) +#define INCLUDE_MULTI_FUNC_GPS(_Adapter) \ + (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) + +#ifdef CONFIG_FILE_FWIMG + extern char *rtw_fw_file_path; + extern char *rtw_fw_wow_file_path; + #ifdef CONFIG_MP_INCLUDED + extern char *rtw_fw_mp_bt_file_path; + #endif /* CONFIG_MP_INCLUDED */ +#endif /* CONFIG_FILE_FWIMG */ + +/* rtl8192f_hal_init.c */ +s32 rtl8192f_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); +void rtl8192f_FirmwareSelfReset(PADAPTER padapter); +void rtl8192f_InitializeFirmwareVars(PADAPTER padapter); + +void rtl8192f_InitAntenna_Selection(PADAPTER padapter); +void rtl8192f_DeinitAntenna_Selection(PADAPTER padapter); +void rtl8192f_CheckAntenna_Selection(PADAPTER padapter); +void rtl8192f_init_default_value(PADAPTER padapter); + +s32 rtl8192f_InitLLTTable(PADAPTER padapter); + +s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); +s32 CardDisableWithoutHWSM(PADAPTER padapter); + +/* EFuse */ +u8 GetEEPROMSize8192F(PADAPTER padapter); +void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); +void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); +void Hal_EfuseParseTxPowerInfo_8192F(PADAPTER padapter, + u8 *PROMContent, BOOLEAN AutoLoadFail); +/* +void Hal_EfuseParseBTCoexistInfo_8192F(PADAPTER padapter, + u8 *hwinfo, BOOLEAN AutoLoadFail); +*/ +void Hal_EfuseParseEEPROMVer_8192F(PADAPTER padapter, + u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParseChnlPlan_8192F(PADAPTER padapter, + u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParseCustomerID_8192F(PADAPTER padapter, + u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParseAntennaDiversity_8192F(PADAPTER padapter, + u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParseXtal_8192F(PADAPTER pAdapter, + u8 *hwinfo, u8 AutoLoadFail); +void Hal_EfuseParseThermalMeter_8192F(PADAPTER padapter, + u8 *hwinfo, u8 AutoLoadFail); +void Hal_EfuseParseVoltage_8192F(PADAPTER pAdapter, + u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParseBoardType_8192F(PADAPTER Adapter, + u8 *PROMContent, BOOLEAN AutoloadFail); +u8 Hal_ReadRFEType_8192F(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); +void rtl8192f_set_hal_ops(struct hal_ops *pHalFunc); +void init_hal_spec_8192f(_adapter *adapter); +u8 SetHwReg8192F(PADAPTER padapter, u8 variable, u8 *val); +void GetHwReg8192F(PADAPTER padapter, u8 variable, u8 *val); +u8 SetHalDefVar8192F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); +u8 GetHalDefVar8192F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); + +/* register */ +void rtl8192f_InitBeaconParameters(PADAPTER padapter); +void rtl8192f_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); + +void _InitMacAPLLSetting_8192F(PADAPTER Adapter); +void _8051Reset8192F(PADAPTER padapter); +#ifdef CONFIG_WOWLAN + void Hal_DetectWoWMode(PADAPTER pAdapter); +#endif /* CONFIG_WOWLAN */ + +void rtl8192f_start_thread(_adapter *padapter); +void rtl8192f_stop_thread(_adapter *padapter); + +#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) + void rtl8192fs_init_checkbthang_workqueue(_adapter *adapter); + void rtl8192fs_free_checkbthang_workqueue(_adapter *adapter); + void rtl8192fs_cancle_checkbthang_workqueue(_adapter *adapter); + void rtl8192fs_hal_check_bt_hang(_adapter *adapter); +#endif + +#ifdef CONFIG_GPIO_WAKEUP + void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); +#endif +#ifdef CONFIG_MP_INCLUDED +int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); +#endif +void CCX_FwC2HTxRpt_8192f(PADAPTER padapter, u8 *pdata, u8 len); + +u8 MRateToHwRate8192F(u8 rate); +u8 HwRateToMRate8192F(u8 rate); + +#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) + void check_bt_status_work(void *data); +#endif + + +void rtl8192f_cal_txdesc_chksum(struct tx_desc *ptxdesc); + +#ifdef CONFIG_AMPDU_PRETX_CD +void rtl8192f_pretx_cd_config(_adapter *adapter); +#endif + +#ifdef CONFIG_PCI_HCI + BOOLEAN InterruptRecognized8192FE(PADAPTER Adapter); + void UpdateInterruptMask8192FE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); + void InitMAC_TRXBD_8192FE(PADAPTER Adapter); + + u16 get_txbd_rw_reg(u16 ff_hwaddr); +#endif + +#endif diff --git a/include/rtl8192f_led.h b/include/rtl8192f_led.h new file mode 100644 index 0000000..22530b4 --- /dev/null +++ b/include/rtl8192f_led.h @@ -0,0 +1,42 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8192F_LED_H__ +#define __RTL8192F_LED_H__ + +#include +#include +#include + +#ifdef CONFIG_RTW_SW_LED +/* ******************************************************************************** + * Interface to manipulate LED objects. + * ******************************************************************************** */ +#ifdef CONFIG_USB_HCI +void rtl8192fu_InitSwLeds(PADAPTER padapter); +void rtl8192fu_DeInitSwLeds(PADAPTER padapter); +#endif + +#ifdef CONFIG_SDIO_HCI +void rtl8192fs_InitSwLeds(PADAPTER padapter); +void rtl8192fs_DeInitSwLeds(PADAPTER padapter); +#endif + +#ifdef CONFIG_PCI_HCI +void rtl8192fe_InitSwLeds(PADAPTER padapter); +void rtl8192fe_DeInitSwLeds(PADAPTER padapter); +#endif +#endif /*#ifdef CONFIG_RTW_SW_LED*/ + +#endif diff --git a/include/rtl8192f_recv.h b/include/rtl8192f_recv.h new file mode 100644 index 0000000..9fb931a --- /dev/null +++ b/include/rtl8192f_recv.h @@ -0,0 +1,107 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8192F_RECV_H__ +#define __RTL8192F_RECV_H__ + +#define RECV_BLK_SZ 512 +#define RECV_BLK_CNT 16 +#define RECV_BLK_TH RECV_BLK_CNT + +#if defined(CONFIG_USB_HCI) + + #ifndef MAX_RECVBUF_SZ + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ + /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ + /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ + #ifdef CONFIG_PLATFORM_MSTAR + #define MAX_RECVBUF_SZ (8192) /* 8K */ + #else + #define MAX_RECVBUF_SZ (32768) /* 32k */ + #endif + /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ + #else + #define MAX_RECVBUF_SZ (4000) /* about 4K */ + #endif + #endif /* !MAX_RECVBUF_SZ */ + +#elif defined(CONFIG_PCI_HCI) + #define MAX_RECVBUF_SZ (4000) /* about 4K */ + +#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) + + #define MAX_RECVBUF_SZ (RX_DMA_BOUNDARY_8192F + 1) + +#endif + +/* Rx smooth factor */ +#define Rx_Smooth_Factor (20) + +#ifdef CONFIG_SDIO_HCI + #ifndef CONFIG_SDIO_RX_COPY + #undef MAX_RECVBUF_SZ + #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8192F - RX_DMA_RESERVED_SIZE_8192F) + #endif /* !CONFIG_SDIO_RX_COPY */ +#endif /* CONFIG_SDIO_HCI */ + +/*-----------------------------------------------------------------*/ +/* RTL8192F RX BUFFER DESC */ +/*-----------------------------------------------------------------*/ +/*DWORD 0*/ +#define SET_RX_BUFFER_DESC_DATA_LENGTH_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) +#define SET_RX_BUFFER_DESC_LS_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) +#define SET_RX_BUFFER_DESC_FS_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 1, __Value) +#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 15, __Value) + +#define GET_RX_BUFFER_DESC_OWN_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) +#define GET_RX_BUFFER_DESC_LS_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) +#define GET_RX_BUFFER_DESC_FS_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 1) +#ifdef USING_RX_TAG + #define GET_RX_BUFFER_DESC_RX_TAG_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 13) +#else + #define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) +#endif + +/*DWORD 1*/ +#define SET_RX_BUFFER_PHYSICAL_LOW_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) + +/*DWORD 2*/ +#ifdef CONFIG_64BIT_DMA + #define SET_RX_BUFFER_PHYSICAL_HIGH_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) +#else + #define SET_RX_BUFFER_PHYSICAL_HIGH_8192F(__pRxStatusDesc, __Value) +#endif + + +#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) + s32 rtl8192fs_init_recv_priv(PADAPTER padapter); + void rtl8192fs_free_recv_priv(PADAPTER padapter); + s32 rtl8192fs_recv_hdl(_adapter *padapter); +#endif + +#ifdef CONFIG_USB_HCI + int rtl8192fu_init_recv_priv(_adapter *padapter); + void rtl8192fu_free_recv_priv(_adapter *padapter); + void rtl8192fu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); +#endif + +#ifdef CONFIG_PCI_HCI + s32 rtl8192fe_init_recv_priv(_adapter *padapter); + void rtl8192fe_free_recv_priv(_adapter *padapter); +#endif + +void rtl8192f_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); + +#endif /* __RTL8192F_RECV_H__ */ diff --git a/include/rtl8192f_rf.h b/include/rtl8192f_rf.h new file mode 100644 index 0000000..95212e4 --- /dev/null +++ b/include/rtl8192f_rf.h @@ -0,0 +1,22 @@ +/****************************************************************************** + * + * Copyright(c) 2012 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8192F_RF_H__ +#define __RTL8192F_RF_H__ + +int PHY_RF6052_Config8192F(PADAPTER pdapter); + +void PHY_RF6052SetBandwidth8192F(PADAPTER Adapter, enum channel_width Bandwidth); + +#endif/* __RTL8192F_RF_H__ */ diff --git a/include/rtl8192f_spec.h b/include/rtl8192f_spec.h new file mode 100644 index 0000000..6e67195 --- /dev/null +++ b/include/rtl8192f_spec.h @@ -0,0 +1,538 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8192F_SPEC_H__ +#define __RTL8192F_SPEC_H__ + +#include + + +#define HAL_NAV_UPPER_UNIT_8192F 128 /* micro-second */ + +/* ----------------------------------------------------- + * + * 0x0000h ~ 0x00FFh System Configuration + * + * ----------------------------------------------------- */ +#define REG_SYS_ISO_CTRL_8192F 0x0000 /* 2 Byte */ +#define REG_SYS_FUNC_EN_8192F 0x0002 /* 2 Byte */ +#define REG_APS_FSMCO_8192F 0x0004 /* 4 Byte */ +#define REG_SYS_CLKR_8192F 0x0008 /* 2 Byte */ +#define REG_9346CR_8192F 0x000A /* 2 Byte */ +#define REG_EE_VPD_8192F 0x000C /* 2 Byte */ +#define REG_AFE_MISC_8192F 0x0010 /* 1 Byte */ +#define REG_SPS0_CTRL_8192F 0x0011 /* 7 Byte */ +#define REG_SPS_OCP_CFG_8192F 0x0018 /* 4 Byte */ +#define REG_RSV_CTRL_8192F 0x001C /* 3 Byte */ +#define REG_RF_CTRL_8192F 0x001F /* 1 Byte */ +#define REG_LPLDO_CTRL_8192F 0x0023 /* 1 Byte */ +#define REG_AFE_XTAL_CTRL_8192F 0x0024 /* 4 Byte */ +#define REG_AFE_PLL_CTRL_8192F 0x0028 /* 4 Byte */ +#define REG_MAC_PLL_CTRL_EXT_8192F 0x002c /* 4 Byte */ +#define REG_EFUSE_CTRL_8192F 0x0030 +#define REG_EFUSE_TEST_8192F 0x0034 +#define REG_PWR_DATA_8192F 0x0038 +#define REG_CAL_TIMER_8192F 0x003C +#define REG_ACLK_MON_8192F 0x003E +#define REG_GPIO_MUXCFG_8192F 0x0040 +#define REG_GPIO_IO_SEL_8192F 0x0042 +#define REG_MAC_PINMUX_CFG_8192F 0x0043 +#define REG_GPIO_PIN_CTRL_8192F 0x0044 +#define REG_GPIO_INTM_8192F 0x0048 +#define REG_LEDCFG0_8192F 0x004C +#define REG_LEDCFG1_8192F 0x004D +#define REG_LEDCFG2_8192F 0x004E +#define REG_LEDCFG3_8192F 0x004F +#define REG_FSIMR_8192F 0x0050 +#define REG_FSISR_8192F 0x0054 +#define REG_HSIMR_8192F 0x0058 +#define REG_HSISR_8192F 0x005c +#define REG_GPIO_EXT_CTRL 0x0060 +#define REG_PAD_CTRL1_8192F 0x0064 +#define REG_MULTI_FUNC_CTRL_8192F 0x0068 +#define REG_GPIO_STATUS_8192F 0x006C +#define REG_SDIO_CTRL_8192F 0x0070 +#define REG_OPT_CTRL_8192F 0x0074 +#define REG_AFE_CTRL_4_8192F 0x0078 +#define REG_MCUFWDL_8192F 0x0080 +#define REG_8051FW_CTRL_8192F 0x0080 +#define REG_HMEBOX_DBG_0_8192F 0x0088 +#define REG_HMEBOX_DBG_1_8192F 0x008A +#define REG_HMEBOX_DBG_2_8192F 0x008C +#define REG_HMEBOX_DBG_3_8192F 0x008E +#define REG_WLLPS_CTRL 0x0090 +#define REG_HIMR0_8192F 0x00B0 +#define REG_HISR0_8192F 0x00B4 +#define REG_HIMR1_8192F 0x00B8 +#define REG_HISR1_8192F 0x00BC +#define REG_PMC_DBG_CTRL2_8192F 0x00CC +#define REG_EFUSE_BURN_GNT_8192F 0x00CF +#define REG_HPON_FSM_8192F 0x00EC +#define REG_SYS_CFG1_8192F 0x00F0 +#define REG_SYS_CFG2_8192F 0x00FC +#define REG_ROM_VERSION 0x00FD + +/* ----------------------------------------------------- + * + * 0x0100h ~ 0x01FFh MACTOP General Configuration + * + * ----------------------------------------------------- */ +#define REG_CR_8192F 0x0100 +#define REG_PBP_8192F 0x0104 +#define REG_PKT_BUFF_ACCESS_CTRL_8192F 0x0106 +#define REG_TRXDMA_CTRL_8192F 0x010C +#define REG_TRXFF_BNDY_8192F 0x0114 +#define REG_TRXFF_STATUS_8192F 0x0118 +#define REG_RXFF_PTR_8192F 0x011C +#define REG_CPWM_8192F 0x012C +#define REG_FWIMR_8192F 0x0130 +#define REG_FWISR_8192F 0x0134 +#define REG_FTIMR_8192F 0x0138 +#define REG_PKTBUF_DBG_CTRL_8192F 0x0140 +#define REG_RXPKTBUF_CTRL_8192F 0x0142 +#define REG_PKTBUF_DBG_DATA_L_8192F 0x0144 +#define REG_PKTBUF_DBG_DATA_H_8192F 0x0148 + +#define REG_TC0_CTRL_8192F 0x0150 +#define REG_TC1_CTRL_8192F 0x0154 +#define REG_TC2_CTRL_8192F 0x0158 +#define REG_TC3_CTRL_8192F 0x015C +#define REG_TC4_CTRL_8192F 0x0160 +#define REG_TCUNIT_BASE_8192F 0x0164 +#define REG_RSVD3_8192F 0x0168 +#define REG_C2HEVT_CMD_ID_8192F 0x01A0 +#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 +#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 +#define REG_C2HEVT_CMD_LEN_8192F 0x01AE +#define REG_C2HEVT_CLEAR_8192F 0x01AF +#define REG_MCUTST_1_8192F 0x01C0 +#define REG_WOWLAN_WAKE_REASON 0x01C7 +#define REG_FMETHR_8192F 0x01C8 +#define REG_HMETFR_8192F 0x01CC +#define REG_HMEBOX_0_8192F 0x01D0 +#define REG_HMEBOX_1_8192F 0x01D4 +#define REG_HMEBOX_2_8192F 0x01D8 +#define REG_HMEBOX_3_8192F 0x01DC +#define REG_LLT_INIT_8192F 0x01E0 +#define REG_HMEBOX_EXT0_8192F 0x01F0 +#define REG_HMEBOX_EXT1_8192F 0x01F4 +#define REG_HMEBOX_EXT2_8192F 0x01F8 +#define REG_HMEBOX_EXT3_8192F 0x01FC + +/* ----------------------------------------------------- + * + * 0x0200h ~ 0x027Fh TXDMA Configuration + * + * ----------------------------------------------------- */ +#define REG_RQPN_8192F 0x0200 +#define REG_FIFOPAGE_8192F 0x0204 +#define REG_DWBCN0_CTRL_8192F REG_TDECTRL +#define REG_TXDMA_OFFSET_CHK_8192F 0x020C +#define REG_TXDMA_STATUS_8192F 0x0210 +#define REG_RQPN_NPQ_8192F 0x0214 +#define REG_DWBCN1_CTRL_8192F 0x0228 +#define REG_RQPN_EXQ1_EXQ2 0x0230 + +/* ----------------------------------------------------- + * + * 0x0280h ~ 0x02FFh RXDMA Configuration + * + * ----------------------------------------------------- */ +#define REG_RXDMA_AGG_PG_TH_8192F 0x0280 +#define REG_FW_UPD_RDPTR_8192F 0x0284 /* FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 */ +#define REG_RXDMA_CONTROL_8192F 0x0286 /* Control the RX DMA. */ +#define REG_RXDMA_STATUS_8192F 0x0288 +#define REG_RXDMA_MODE_CTRL_8192F 0x0290 +#define REG_EARLY_MODE_CONTROL_8192F 0x02BC +#define REG_RSVD5_8192F 0x02F0 +#define REG_RSVD6_8192F 0x02F4 + +/* ----------------------------------------------------- + * + * 0x0300h ~ 0x03FFh PCIe + * + * ----------------------------------------------------- */ +#define REG_PCIE_CTRL_REG_8192F 0x0300 +#define REG_INT_MIG_8192F 0x0304 /* Interrupt Migration */ +#define REG_BCNQ_TXBD_DESA_8192F 0x0308 /* TX Beacon Descriptor Address */ +#define REG_MGQ_TXBD_DESA_8192F 0x0310 /* TX Manage Queue Descriptor Address */ +#define REG_VOQ_TXBD_DESA_8192F 0x0318 /* TX VO Queue Descriptor Address */ +#define REG_VIQ_TXBD_DESA_8192F 0x0320 /* TX VI Queue Descriptor Address */ +#define REG_BEQ_TXBD_DESA_8192F 0x0328 /* TX BE Queue Descriptor Address */ +#define REG_BKQ_TXBD_DESA_8192F 0x0330 /* TX BK Queue Descriptor Address */ +#define REG_RXQ_RXBD_DESA_8192F 0x0338 /* RX Queue Descriptor Address */ +#define REG_HI0Q_TXBD_DESA_8192F 0x0340 +#define REG_HI1Q_TXBD_DESA_8192F 0x0348 +#define REG_HI2Q_TXBD_DESA_8192F 0x0350 +#define REG_HI3Q_TXBD_DESA_8192F 0x0358 +#define REG_HI4Q_TXBD_DESA_8192F 0x0360 +#define REG_HI5Q_TXBD_DESA_8192F 0x0368 +#define REG_HI6Q_TXBD_DESA_8192F 0x0370 +#define REG_HI7Q_TXBD_DESA_8192F 0x0378 +#define REG_MGQ_TXBD_NUM_8192F 0x0380 +#define REG_RX_RXBD_NUM_8192F 0x0382 +#define REG_VOQ_TXBD_NUM_8192F 0x0384 +#define REG_VIQ_TXBD_NUM_8192F 0x0386 +#define REG_BEQ_TXBD_NUM_8192F 0x0388 +#define REG_BKQ_TXBD_NUM_8192F 0x038A +#define REG_HI0Q_TXBD_NUM_8192F 0x038C +#define REG_HI1Q_TXBD_NUM_8192F 0x038E +#define REG_HI2Q_TXBD_NUM_8192F 0x0390 +#define REG_HI3Q_TXBD_NUM_8192F 0x0392 +#define REG_HI4Q_TXBD_NUM_8192F 0x0394 +#define REG_HI5Q_TXBD_NUM_8192F 0x0396 +#define REG_HI6Q_TXBD_NUM_8192F 0x0398 +#define REG_HI7Q_TXBD_NUM_8192F 0x039A +#define REG_TSFTIMER_HCI_8192F 0x039C +#define REG_BD_RW_PTR_CLR_8192F 0x039C + +/* Read Write Point */ +#define REG_VOQ_TXBD_IDX_8192F 0x03A0 +#define REG_VIQ_TXBD_IDX_8192F 0x03A4 +#define REG_BEQ_TXBD_IDX_8192F 0x03A8 +#define REG_BKQ_TXBD_IDX_8192F 0x03AC +#define REG_MGQ_TXBD_IDX_8192F 0x03B0 +#define REG_RXQ_TXBD_IDX_8192F 0x03B4 +#define REG_HI0Q_TXBD_IDX_8192F 0x03B8 +#define REG_HI1Q_TXBD_IDX_8192F 0x03BC +#define REG_HI2Q_TXBD_IDX_8192F 0x03C0 +#define REG_HI3Q_TXBD_IDX_8192F 0x03C4 +#define REG_HI4Q_TXBD_IDX_8192F 0x03C8 +#define REG_HI5Q_TXBD_IDX_8192F 0x03CC +#define REG_HI6Q_TXBD_IDX_8192F 0x03D0 +#define REG_HI7Q_TXBD_IDX_8192F 0x03D4 +#define REG_DBI_WDATA_V1_8192F 0x03E8 +#define REG_DBI_RDATA_V1_8192F 0x03EC +#define REG_DBI_FLAG_V1_8192F 0x03F0 +#define REG_MDIO_V1_8192F 0x03F4 +#define REG_HCI_MIX_CFG_8192F 0x03FC +#define REG_PCIE_HCPWM_8192FE 0x03D8 +#define REG_PCIE_HRPWM_8192FE 0x03DC +#define REG_PCIE_MIX_CFG_8192F 0x03F8 + +/* ----------------------------------------------------- + * + * 0x0400h ~ 0x047Fh Protocol Configuration + * + * ----------------------------------------------------- */ +#define REG_QUEUELIST_INFO0_8192F 0x0400 +#define REG_QUEUELIST_INFO1_8192F 0x0404 +#define REG_QUEUELIST_INFO2_8192F 0x0414 +#define REG_TXPKT_EMPTY_8192F 0x0418 + +#define REG_FWHW_TXQ_CTRL_8192F 0x0420 +#define REG_HWSEQ_CTRL_8192F 0x0423 +#define REG_TXPKTBUF_BCNQ_BDNY_8192F 0x0424 +#define REG_TXPKTBUF_MGQ_BDNY_8192F 0x0425 +#define REG_LIFECTRL_CTRL_8192F 0x0426 +#define REG_MULTI_BCNQ_OFFSET_8192F 0x0427 +#define REG_SPEC_SIFS_8192F 0x0428 +#define REG_RL_8192F 0x042A +#define REG_TXBF_CTRL_8192F 0x042C +#define REG_DARFRC_8192F 0x0430 +#define REG_RARFRC_8192F 0x0438 +#define REG_RRSR_8192F 0x0440 +#define REG_ARFR0_8192F 0x0444 +#define REG_ARFR1_8192F 0x044C +#define REG_CCK_CHECK_8192F 0x0454 +#define REG_AMPDU_MAX_TIME_8192F 0x0456 +#define REG_TXPKTBUF_BCNQ_BDNY1_8192F 0x0457 + +#define REG_AMPDU_MAX_LENGTH_8192F 0x0458 +#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8192F 0x045D +#define REG_NDPA_OPT_CTRL_8192F 0x045F +#define REG_FAST_EDCA_CTRL_8192F 0x0460 +#define REG_RD_RESP_PKT_TH_8192F 0x0463 +#define REG_DATA_SC_8192F 0x0483 +#define REG_TXRPT_START_OFFSET 0x04AC +#define REG_POWER_STAGE1_8192F 0x04B4 +#define REG_POWER_STAGE2_8192F 0x04B8 +#define REG_AMPDU_BURST_MODE_8192F 0x04BC +#define REG_PKT_VO_VI_LIFE_TIME_8192F 0x04C0 +#define REG_PKT_BE_BK_LIFE_TIME_8192F 0x04C2 +#define REG_STBC_SETTING_8192F 0x04C4 +#define REG_HT_SINGLE_AMPDU_8192F 0x04C7 +#define REG_PROT_MODE_CTRL_8192F 0x04C8 +#define REG_MAX_AGGR_NUM_8192F 0x04CA +#define REG_RTS_MAX_AGGR_NUM_8192F 0x04CB +#define REG_BAR_MODE_CTRL_8192F 0x04CC +#define REG_RA_TRY_RATE_AGG_LMT_8192F 0x04CF +#define REG_MACID_PKT_DROP0_8192F 0x04D0 +#define REG_MACID_PKT_SLEEP_8192F 0x04D4 +#define REG_PRECNT_CTRL_8192F 0x04E5 +/* ----------------------------------------------------- + * + * 0x0500h ~ 0x05FFh EDCA Configuration + * + * ----------------------------------------------------- */ +#define REG_EDCA_VO_PARAM_8192F 0x0500 +#define REG_EDCA_VI_PARAM_8192F 0x0504 +#define REG_EDCA_BE_PARAM_8192F 0x0508 +#define REG_EDCA_BK_PARAM_8192F 0x050C +#define REG_BCNTCFG_8192F 0x0510 +#define REG_PIFS_8192F 0x0512 +#define REG_RDG_PIFS_8192F 0x0513 +#define REG_SIFS_CTX_8192F 0x0514 +#define REG_SIFS_TRX_8192F 0x0516 +#define REG_AGGR_BREAK_TIME_8192F 0x051A +#define REG_SLOT_8192F 0x051B +#define REG_TX_PTCL_CTRL_8192F 0x0520 +#define REG_TXPAUSE_8192F 0x0522 +#define REG_DIS_TXREQ_CLR_8192F 0x0523 +#define REG_RD_CTRL_8192F 0x0524 +/* + * Format for offset 540h-542h: + * [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. + * [7:4]: Reserved. + * [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. + * [23:20]: Reserved + * Description: + * | + * |<--Setup--|--Hold------------>| + * --------------|---------------------- + * | + * TBTT + * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. + * Described by Designer Tim and Bruce, 2011-01-14. + * */ +#define REG_TBTT_PROHIBIT_8192F 0x0540 +#define REG_RD_NAV_NXT_8192F 0x0544 +#define REG_NAV_PROT_LEN_8192F 0x0546 +#define REG_BCN_CTRL_8192F 0x0550 +#define REG_BCN_CTRL_1_8192F 0x0551 +#define REG_MBID_NUM_8192F 0x0552 +#define REG_DUAL_TSF_RST_8192F 0x0553 +#define REG_BCN_INTERVAL_8192F 0x0554 +#define REG_DRVERLYINT_8192F 0x0558 +#define REG_BCNDMATIM_8192F 0x0559 +#define REG_ATIMWND_8192F 0x055A +#define REG_USTIME_TSF_8192F 0x055C +#define REG_BCN_MAX_ERR_8192F 0x055D +#define REG_RXTSF_OFFSET_CCK_8192F 0x055E +#define REG_RXTSF_OFFSET_OFDM_8192F 0x055F +#define REG_TSFTR_8192F 0x0560 +#define REG_CTWND_8192F 0x0572 +#define REG_SECONDARY_CCA_CTRL_8192F 0x0577 +#define REG_PSTIMER_8192F 0x0580 +#define REG_TIMER0_8192F 0x0584 +#define REG_TIMER1_8192F 0x0588 +#define REG_ACMHWCTRL_8192F 0x05C0 +#define REG_SCH_TXCMD_8192F 0x05F8 + +/* ----------------------------------------------------- + * + * 0x0600h ~ 0x07FFh WMAC Configuration + * + * ----------------------------------------------------- */ +#define REG_MAC_CR_8192F 0x0600 +#define REG_TCR_8192F 0x0604 +#define REG_RCR_8192F 0x0608 +#define REG_RX_PKT_LIMIT_8192F 0x060C +#define REG_RX_DLK_TIME_8192F 0x060D +#define REG_RX_DRVINFO_SZ_8192F 0x060F + +#define REG_MACID_8192F 0x0610 +#define REG_BSSID_8192F 0x0618 +#define REG_MAR_8192F 0x0620 +#define REG_MBIDCAMCFG_8192F 0x0628 + + +#define REG_USTIME_EDCA_8192F 0x0638 +#define REG_MAC_SPEC_SIFS_8192F 0x063A +#define REG_RESP_SIFP_CCK_8192F 0x063C +#define REG_RESP_SIFS_OFDM_8192F 0x063E +#define REG_ACKTO_8192F 0x0640 +#define REG_CTS2TO_8192F 0x0641 +#define REG_EIFS_8192F 0x0642 + +#define REG_NAV_UPPER_8192F 0x0652 /* unit of 128*/ +#define REG_TRXPTCL_CTL_8192F 0x0668 + +/* Security*/ +#define REG_CAMCMD_8192F 0x0670 +#define REG_CAMWRITE_8192F 0x0674 +#define REG_CAMREAD_8192F 0x0678 +#define REG_CAMDBG_8192F 0x067C +#define REG_SECCFG_8192F 0x0680 + +/* Power */ +#define REG_WOW_CTRL_8192F 0x0690 +#define REG_PS_RX_INFO_8192F 0x0692 +#define REG_UAPSD_TID_8192F 0x0693 +#define REG_WKFMCAM_CMD_8192F 0x0698 +#define REG_WKFMCAM_NUM_8192F 0x0698 +#define REG_WKFMCAM_RWD_8192F 0x069C +#define REG_RXFLTMAP0_8192F 0x06A0 +#define REG_RXFLTMAP1_8192F 0x06A2 +#define REG_RXFLTMAP2_8192F 0x06A4 +#define REG_BCN_PSR_RPT_8192F 0x06A8 +#define REG_BT_COEX_TABLE_8192F 0x06C0 +#define REG_BFMER0_INFO_8192F 0x06E4 +#define REG_BFMER1_INFO_8192F 0x06EC +#define REG_CSI_RPT_PARAM_BW20_8192F 0x06F4 +#define REG_CSI_RPT_PARAM_BW40_8192F 0x06F8 +#define REG_CSI_RPT_PARAM_BW80_8192F 0x06FC + +/* Hardware Port 2 */ +#define REG_MACID1_8192F 0x0700 +#define REG_BSSID1_8192F 0x0708 +#define REG_BFMEE_SEL_8192F 0x0714 +#define REG_SND_PTCL_CTRL_8192F 0x0718 + +/* LTR */ +#define REG_LTR_CTRL_BASIC_8192F 0x07A4 +#define REG_LTR_IDLE_LATENCY_V1_8192F 0x0798 +#define REG_LTR_ACTIVE_LATENCY_V1_8192F 0x079C + +/* GPIO Control */ +#define REG_SW_GPIO_SHARE_CTRL_8192F 0x1038 +#define REG_SW_GPIO_A_OUT_8192F 0x1040 +#define REG_SW_GPIO_A_OEN_8192F 0x1044 + +/* ************************************************************ + * SDIO Bus Specification + * ************************************************************ */ + +/* ----------------------------------------------------- + * SDIO CMD Address Mapping + * ----------------------------------------------------- */ + +/* ----------------------------------------------------- + * I/O bus domain (Host) + * ----------------------------------------------------- */ +/*SDIO Host Interrupt Mask Register */ +#define SDIO_HIMR_CRCERR_MSK BIT(31) +/* SDIO Host Interrupt Service Routine */ +#define SDIO_HISR_HEISR_IND_INT BIT(28) +#define SDIO_HISR_HSISR2_IND_INT BIT(29) +#define SDIO_HISR_HSISR3_IND_INT BIT(30) +#define SDIO_HISR_SDIO_CRCERR BIT(31) +/* ----------------------------------------------------- + * SDIO register + * ----------------------------------------------------- */ +#define SDIO_REG_HCPWM1_8192F 0x038/* HCI Current Power Mode 1 */ +#define SDIO_REG_FREE_TXPG1_8192F 0x0020 /* Free Tx Buffer Page1*/ +#define SDIO_REG_FREE_TXPG2_8192F 0x0024 /* Free Tx Buffer Page1*/ +#define SDIO_REG_FREE_TXPG3_8192F 0x0028 +#define SDIO_REG_AC_OQT_FREEPG_8192F 0x002A +#define SDIO_REG_NOAC_OQT_FREEPG_8192F 0x002B +/* **************************************************************************** + * 8192F Regsiter Bit and Content definition + * **************************************************************************** */ + +#define BIT_USB_RXDMA_AGG_EN BIT(31) +#define RXDMA_AGG_MODE_EN BIT(1) + +#ifdef CONFIG_WOWLAN + #define RXPKT_RELEASE_POLL BIT(16) + #define RXDMA_IDLE BIT(17) + #define RW_RELEASE_EN BIT(18) +#endif + +#ifdef CONFIG_AMPDU_PRETX_CD +/*#define BIT_ERRORHDL_INT BIT(2)*/ +/*#define BIT_MACTX_ERR_3 BIT(4)*/ +#define BIT_PRE_TX_CMD_8192F BIT(6) +#define BIT_EN_PRECNT_8192F BIT(11) +#endif +/* SDIO Host Interrupt Service Routine */ +#define SDIO_HISR_HEISR_IND_INT BIT(28) +#define SDIO_HISR_HSISR2_IND_INT BIT(29) +#define SDIO_HISR_HSISR3_IND_INT BIT(30) +#define SDIO_HISR_SDIO_CRCERR BIT(31) + +/* PCIE Host Interrupt Mask Register (HIMR) */ +#ifdef CONFIG_PCI_HCI +/* ---------------------------------------------------------------------------- + * * 8192F IMR/ISR bits (offset 0xB0, 8bits) + * * ---------------------------------------------------------------------------- */ + +#define IMR_DISABLED_8192F 0 +/* IMR DW0(0x00B0-00B3) Bit 0-31 */ +#define IMR_TIMER2_8192F BIT(31) /* Timeout interrupt 2 */ +#define IMR_TIMER1_8192F BIT(30) /* Timeout interrupt 1 */ +#define IMR_PSTIMEOUT_8192F BIT(29) /* Power Save Time Out Interrupt */ +#define IMR_GTINT4_8192F BIT(28) /* When GTIMER4 expires, this bit is set to 1 */ +#define IMR_GTINT3_8192F BIT(27) /* When GTIMER3 expires, this bit is set to 1 */ +#define IMR_TXBCN0ERR_8192F BIT(26) /* Transmit Beacon0 Error */ +#define IMR_TXBCN0OK_8192F BIT(25) /* Transmit Beacon0 OK */ +#define IMR_TSF_BIT32_TOGGLE_8192F BIT(24) /* TSF Timer BIT32 toggle indication interrupt */ +#define IMR_BCNDMAINT0_8192F BIT(20) /* Beacon DMA Interrupt 0 */ +#define IMR_BCNDERR0_8192F BIT(16) /* Beacon Queue DMA OK0 */ +#define IMR_HSISR_IND_ON_INT_8192F BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ +#define IMR_BCNDMAINT_E_8192F BIT(14) /* Beacon DMA Interrupt Extension for Win7 */ +#define IMR_ATIMEND_8192F BIT(12) /* CTWidnow End or ATIM Window End */ +#define IMR_C2HCMD_8192F BIT(10) /* CPU to Host Command INT status, Write 1 clear */ +#define IMR_CPWM2_8192F BIT(9) /* CPU power mode exchange INT status, Write 1 clear */ +#define IMR_CPWM_8192F BIT(8) /* CPU power mode exchange INT status, Write 1 clear */ +#define IMR_HIGHDOK_8192F BIT(7) /* High Queue DMA OK */ +#define IMR_MGNTDOK_8192F BIT(6) /* Management Queue DMA OK */ +#define IMR_BKDOK_8192F BIT(5) /* AC_BK DMA OK */ +#define IMR_BEDOK_8192F BIT(4) /* AC_BE DMA OK */ +#define IMR_VIDOK_8192F BIT(3) /* AC_VI DMA OK */ +#define IMR_VODOK_8192F BIT(2) /* AC_VO DMA OK */ +#define IMR_RDU_8192F BIT(1) /* Rx Descriptor Unavailable */ +#define IMR_ROK_8192F BIT(0) /* Receive DMA OK */ + +/* IMR DW1(0x00B4-00B7) Bit 0-31 */ +#define IMR_MCUERR_8192F BIT(28) +#define IMR_BCNDMAINT7_8192F BIT(27) /* Beacon DMA Interrupt 7 */ +#define IMR_BCNDMAINT6_8192F BIT(26) /* Beacon DMA Interrupt 6 */ +#define IMR_BCNDMAINT5_8192F BIT(25) /* Beacon DMA Interrupt 5 */ +#define IMR_BCNDMAINT4_8192F BIT(24) /* Beacon DMA Interrupt 4 */ +#define IMR_BCNDMAINT3_8192F BIT(23) /* Beacon DMA Interrupt 3 */ +#define IMR_BCNDMAINT2_8192F BIT(22) /* Beacon DMA Interrupt 2 */ +#define IMR_BCNDMAINT1_8192F BIT(21) /* Beacon DMA Interrupt 1 */ +#define IMR_BCNDOK7_8192F BIT(20) /* Beacon Queue DMA OK Interrup 7 */ +#define IMR_BCNDOK6_8192F BIT(19) /* Beacon Queue DMA OK Interrup 6 */ +#define IMR_BCNDOK5_8192F BIT(18) /* Beacon Queue DMA OK Interrup 5 */ +#define IMR_BCNDOK4_8192F BIT(17) /* Beacon Queue DMA OK Interrup 4 */ +#define IMR_BCNDOK3_8192F BIT(16) /* Beacon Queue DMA OK Interrup 3 */ +#define IMR_BCNDOK2_8192F BIT(15) /* Beacon Queue DMA OK Interrup 2 */ +#define IMR_BCNDOK1_8192F BIT(14) /* Beacon Queue DMA OK Interrup 1 */ +#define IMR_ATIMEND_E_8192F BIT(13) /* ATIM Window End Extension for Win7 */ +#define IMR_TXERR_8192F BIT(11) /* Tx Error Flag Interrupt status, write 1 clear. */ +#define IMR_RXERR_8192F BIT(10) /* Rx Error Flag INT status, Write 1 clear */ +#define IMR_TXFOVW_8192F BIT(9) /* Transmit FIFO Overflow */ +#define IMR_RXFOVW_8192F BIT(8) /* Receive FIFO Overflow */ + +/* #define IMR_RX_MASK (IMR_ROK_8192F|IMR_RDU_8192F|IMR_RXFOVW_8192F) */ +#define IMR_TX_MASK (IMR_VODOK_8192F | IMR_VIDOK_8192F | IMR_BEDOK_8192F | IMR_BKDOK_8192F | IMR_MGNTDOK_8192F | IMR_HIGHDOK_8192F) +#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8192F | IMR_TXBCN0OK_8192F | IMR_TXBCN0ERR_8192F | IMR_BCNDERR0_8192F) +#define RT_AC_INT_MASKS (IMR_VIDOK_8192F | IMR_VODOK_8192F | IMR_BEDOK_8192F | IMR_BKDOK_8192F) +#endif /* CONFIG_PCI_HCI */ + +/* 2 HSISR + * interrupt mask which needs to clear */ +#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ + HSISR_SPS_OCP_INT |\ + HSISR_RON_INT |\ + HSISR_PDNINT |\ + HSISR_GPIO9_INT) + +#define _TXDMA_HIQ_MAP_8192F(x) (((x) & 0x7) << 19) +#define _TXDMA_MGQ_MAP_8192F(x) (((x) & 0x7) << 16) +#define _TXDMA_BKQ_MAP_8192F(x) (((x) & 0x7) << 13) +#define _TXDMA_BEQ_MAP_8192F(x) (((x) & 0x7) << 10) +#define _TXDMA_VIQ_MAP_8192F(x) (((x) & 0x7) << 7) +#define _TXDMA_VOQ_MAP_8192F(x) (((x) & 0x7) << 4) + +/*mac queue info*/ +#define QUEUE_TOTAL_NUM 20/*reg414h : 0~f ac queue 0x10~0x13MGQ HIQ BCNQ CMDQ*/ +#define QUEUE_ACQ_NUM 16 +#define QUEUE_INDEX_MGQ 0x10 +#define QUEUE_INDEX_HIQ 0x11 +#define QUEUE_INDEX_BCNQ 0x12 +#define QUEUE_INDEX_CMDQ 0x13 +#endif /* __RTL8192F_SPEC_H__ */ diff --git a/include/rtl8192f_sreset.h b/include/rtl8192f_sreset.h new file mode 100644 index 0000000..cf881c4 --- /dev/null +++ b/include/rtl8192f_sreset.h @@ -0,0 +1,24 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef _RTL8192F_SRESET_H_ +#define _RTL8192F_SRESET_H_ + +#include + +#ifdef DBG_CONFIG_ERROR_DETECT + extern void rtl8192f_sreset_xmit_status_check(_adapter *padapter); + extern void rtl8192f_sreset_linked_status_check(_adapter *padapter); +#endif /* DBG_CONFIG_ERROR_DETECT */ +#endif /* _RTL8192F_SRESET_H_ */ \ No newline at end of file diff --git a/include/rtl8192f_xmit.h b/include/rtl8192f_xmit.h new file mode 100644 index 0000000..6e0f1ea --- /dev/null +++ b/include/rtl8192f_xmit.h @@ -0,0 +1,531 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8192F_XMIT_H__ +#define __RTL8192F_XMIT_H__ + + +#define MAX_TID (15) + + +#ifndef __INC_HAL8192FDESC_H +#define __INC_HAL8192FDESC_H + +#define RX_STATUS_DESC_SIZE_8192F 24 +#define RX_DRV_INFO_SIZE_UNIT_8192F 8 + + +/* DWORD 0 */ +#define SET_RX_STATUS_DESC_PKT_LEN_8192F(__pRxStatusDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) +#define SET_RX_STATUS_DESC_EOR_8192F(__pRxStatusDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) +#define SET_RX_STATUS_DESC_OWN_8192F(__pRxStatusDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) + +#define GET_RX_STATUS_DESC_PKT_LEN_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) +#define GET_RX_STATUS_DESC_CRC32_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) +#define GET_RX_STATUS_DESC_ICV_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) +#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) +#define GET_RX_STATUS_DESC_SECURITY_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) +#define GET_RX_STATUS_DESC_QOS_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) +#define GET_RX_STATUS_DESC_SHIFT_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) +#define GET_RX_STATUS_DESC_PHY_STATUS_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) +#define GET_RX_STATUS_DESC_SWDEC_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) +#define GET_RX_STATUS_DESC_EOR_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) +#define GET_RX_STATUS_DESC_OWN_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) + +/* DWORD 1 */ +#define GET_RX_STATUS_DESC_MACID_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) +#define GET_RX_STATUS_DESC_TID_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) +#define GET_RX_STATUS_DESC_AMSDU_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) +#define GET_RX_STATUS_DESC_RXID_MATCH_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) +#define GET_RX_STATUS_DESC_PAGGR_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) +#define GET_RX_STATUS_DESC_A1_FIT_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) +#define GET_RX_STATUS_DESC_CHKERR_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) +#define GET_RX_STATUS_DESC_IPVER_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) +#define GET_RX_STATUS_DESC_IS_TCPUDP__8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) +#define GET_RX_STATUS_DESC_CHK_VLD_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) +#define GET_RX_STATUS_DESC_PAM_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) +#define GET_RX_STATUS_DESC_PWR_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) +#define GET_RX_STATUS_DESC_MORE_DATA_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) +#define GET_RX_STATUS_DESC_MORE_FRAG_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) +#define GET_RX_STATUS_DESC_TYPE_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) +#define GET_RX_STATUS_DESC_MC_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) +#define GET_RX_STATUS_DESC_BC_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) + +/* DWORD 2 */ +#define GET_RX_STATUS_DESC_SEQ_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) +#define GET_RX_STATUS_DESC_FRAG_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) +#define GET_RX_STATUS_DESC_RX_IS_QOS_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) +#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) +#define GET_RX_STATUS_DESC_RPT_SEL_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) +#define GET_RX_STATUS_DESC_FCS_OK_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1) + +/* DWORD 3 */ +#define GET_RX_STATUS_DESC_RX_RATE_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) +#define GET_RX_STATUS_DESC_HTC_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) +#define GET_RX_STATUS_DESC_EOSP_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) +#define GET_RX_STATUS_DESC_BSSID_FIT_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) +#ifdef CONFIG_USB_RX_AGGREGATION +#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) +#endif +#define GET_RX_STATUS_DESC_PATTERN_MATCH_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) +#define GET_RX_STATUS_DESC_UNICAST_MATCH_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) +#define GET_RX_STATUS_DESC_MAGIC_MATCH_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) + +/* DWORD 6 */ +#define GET_RX_STATUS_DESC_MATCH_ID_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 7) + +/* DWORD 5 */ +#define GET_RX_STATUS_DESC_TSFL_8192F(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) + +#define GET_RX_STATUS_DESC_BUFF_ADDR64_8192F(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) + + + +/* Dword 0, rsvd: bit26, bit28 */ +#define GET_TX_DESC_OWN_8192F(__pTxDesc)\ + LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) + +#define SET_TX_DESC_PKT_SIZE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) +#define SET_TX_DESC_OFFSET_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) +#define SET_TX_DESC_BMC_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) +#define SET_TX_DESC_HTC_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) +#define SET_TX_DESC_AMSDU_PAD_EN_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) +#define SET_TX_DESC_NO_ACM_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) +#define SET_TX_DESC_GF_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) + +/* Dword 1 */ +#define SET_TX_DESC_MACID_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) +#define SET_TX_DESC_QUEUE_SEL_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) +#define SET_TX_DESC_RDG_NAV_EXT_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) +#define SET_TX_DESC_LSIG_TXOP_EN_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) +#define SET_TX_DESC_PIFS_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) +#define SET_TX_DESC_RATE_ID_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) +#define SET_TX_DESC_EN_DESC_ID_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) +#define SET_TX_DESC_SEC_TYPE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) +#define SET_TX_DESC_PKT_OFFSET_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) +#define SET_TX_DESC_MORE_DATA_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) + +/* Dword 2 ADD HW_DIG*/ +#define SET_TX_DESC_PAID_92F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) +#define SET_TX_DESC_CCA_RTS_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) +#define SET_TX_DESC_AGG_ENABLE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) +#define SET_TX_DESC_RDG_ENABLE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) +#define SET_TX_DESC_NULL0_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) +#define SET_TX_DESC_NULL1_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) +#define SET_TX_DESC_BK_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) +#define SET_TX_DESC_MORE_FRAG_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) +#define SET_TX_DESC_RAW_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) +#define SET_TX_DESC_CCX_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) +#define SET_TX_DESC_AMPDU_DENSITY_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) +#define SET_TX_DESC_BT_INT_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) +#define SET_TX_DESC_HW_DIG_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 7, __Value) + +/* Dword 3 */ +#define SET_TX_DESC_HWSEQ_SEL_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) +#define SET_TX_DESC_USE_RATE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) +#define SET_TX_DESC_DISABLE_RTS_FB_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) +#define SET_TX_DESC_DISABLE_FB_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) +#define SET_TX_DESC_CTS2SELF_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) +#define SET_TX_DESC_RTS_ENABLE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) +#define SET_TX_DESC_HW_RTS_ENABLE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) +#define SET_TX_DESC_CHK_EN_92F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) +#define SET_TX_DESC_NAV_USE_HDR_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) +#define SET_TX_DESC_USE_MAX_LEN_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) +#define SET_TX_DESC_MAX_AGG_NUM_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) +#define SET_TX_DESC_NDPA_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) +#define SET_TX_DESC_AMPDU_MAX_TIME_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) + +/* Dword 4 */ +#define SET_TX_DESC_TX_RATE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) +#define SET_TX_DESC_TX_TRY_RATE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) +#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) +#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) +#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) +#define SET_TX_DESC_DATA_RETRY_LIMIT_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) +#define SET_TX_DESC_RTS_RATE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) +#define SET_TX_DESC_PCTS_EN_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) +#define SET_TX_DESC_PCTS_MASK_IDX_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) + +/* Dword 5 */ +#define SET_TX_DESC_DATA_SC_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) +#define SET_TX_DESC_DATA_SHORT_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) +#define SET_TX_DESC_DATA_BW_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) +#define SET_TX_DESC_DATA_LDPC_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) +#define SET_TX_DESC_DATA_STBC_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) +#define SET_TX_DESC_RTS_STBC_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) +#define SET_TX_DESC_RTS_SHORT_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) +#define SET_TX_DESC_RTS_SC_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) +#define SET_TX_DESC_PORT_ID_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 21, 1, __Value) +#define SET_TX_DESC_DROP_ID_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 22, 2, __Value) +#define SET_TX_DESC_PATH_A_EN_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 1, __Value) +#define SET_TX_DESC_PATH_B_EN_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 25, 1, __Value) +#define SET_TX_DESC_TXPWR_OF_SET_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) + +/* Dword 6 */ +#define SET_TX_DESC_SW_DEFINE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) +#define SET_TX_DESC_MBSSID_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) +#define SET_TX_DESC_RF_SEL_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) + +/* Dword 7 */ +#ifdef CONFIG_PCI_HCI +#define SET_TX_DESC_TX_BUFFER_SIZE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) +#endif + +#ifdef CONFIG_USB_HCI +#define SET_TX_DESC_TX_DESC_CHECKSUM_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) +#endif + +#ifdef CONFIG_SDIO_HCI +#define SET_TX_DESC_TX_TIMESTAMP_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value) +#endif + +#define SET_TX_DESC_USB_TXAGG_NUM_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) + +/* Dword 8 */ +#define SET_TX_DESC_RTS_RC_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) +#define SET_TX_DESC_BAR_RC_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) +#define SET_TX_DESC_DATA_RC_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) +#define SET_TX_DESC_HWSEQ_EN_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) +#define SET_TX_DESC_NEXTHEADPAGE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) +#define SET_TX_DESC_TAILPAGE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) + +/* Dword 9 */ +#define SET_TX_DESC_PADDING_LEN_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) +#define SET_TX_DESC_SEQ_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) +#define SET_TX_DESC_FINAL_DATA_RATE_8192F(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) + + +#define SET_EARLYMODE_PKTNUM_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) +#define SET_EARLYMODE_LEN0_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) +#define SET_EARLYMODE_LEN1_1_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) +#define SET_EARLYMODE_LEN1_2_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) +#define SET_EARLYMODE_LEN2_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) +#define SET_EARLYMODE_LEN3_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) + + +/*-----------------------------------------------------------------*/ +/* RTL8192F TX BUFFER DESC */ +/*-----------------------------------------------------------------*/ +#ifdef CONFIG_64BIT_DMA + #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu) + #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu) + #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu) + #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu) +#else + #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) + #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) + #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) + #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) /* 64 BIT mode only */ +#endif +/* ********************************************************* */ + +/* 64 bits -- 32 bits */ +/* ======= ======= */ +/* Dword 0 0 */ +#define SET_TX_BUFF_DESC_LEN_0_8192F(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) +#define SET_TX_BUFF_DESC_PSB_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) +#define SET_TX_BUFF_DESC_OWN_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) + +/* Dword 1 1 */ +#define SET_TX_BUFF_DESC_ADDR_LOW_0_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) +#define GET_TX_BUFF_DESC_ADDR_LOW_0_8192F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) +/* Dword 2 NA */ +#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 0, __Value) +#ifdef CONFIG_64BIT_DMA + #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32) +#else + #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc) 0 +#endif +/* Dword 3 NA */ +/* RESERVED 0 */ +/* Dword 4 2 */ +#define SET_TX_BUFF_DESC_LEN_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 1, __Value) +#define SET_TX_BUFF_DESC_AMSDU_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 1, __Value) +/* Dword 5 3 */ +#define SET_TX_BUFF_DESC_ADDR_LOW_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 1, __Value) +/* Dword 6 NA */ +#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 1, __Value) +/* Dword 7 NA */ +/*RESERVED 0 */ +/* Dword 8 4 */ +#define SET_TX_BUFF_DESC_LEN_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 2, __Value) +#define SET_TX_BUFF_DESC_AMSDU_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 2, __Value) +/* Dword 9 5 */ +#define SET_TX_BUFF_DESC_ADDR_LOW_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 2, __Value) +/* Dword 10 NA */ +#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 2, __Value) +/* Dword 11 NA */ +/*RESERVED 0 */ +/* Dword 12 6 */ +#define SET_TX_BUFF_DESC_LEN_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 3, __Value) +#define SET_TX_BUFF_DESC_AMSDU_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 3, __Value) +/* Dword 13 7 */ +#define SET_TX_BUFF_DESC_ADDR_LOW_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 3, __Value) +/* Dword 14 NA */ +#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 3, __Value) +/* Dword 15 NA */ +/*RESERVED 0 */ + + +#endif +/* ----------------------------------------------------------- + * + * Rate + * + * ----------------------------------------------------------- + * CCK Rates, TxHT = 0 */ +#define DESC8192F_RATE1M 0x00 +#define DESC8192F_RATE2M 0x01 +#define DESC8192F_RATE5_5M 0x02 +#define DESC8192F_RATE11M 0x03 + +/* OFDM Rates, TxHT = 0 */ +#define DESC8192F_RATE6M 0x04 +#define DESC8192F_RATE9M 0x05 +#define DESC8192F_RATE12M 0x06 +#define DESC8192F_RATE18M 0x07 +#define DESC8192F_RATE24M 0x08 +#define DESC8192F_RATE36M 0x09 +#define DESC8192F_RATE48M 0x0a +#define DESC8192F_RATE54M 0x0b + +/* MCS Rates, TxHT = 1 */ +#define DESC8192F_RATEMCS0 0x0c +#define DESC8192F_RATEMCS1 0x0d +#define DESC8192F_RATEMCS2 0x0e +#define DESC8192F_RATEMCS3 0x0f +#define DESC8192F_RATEMCS4 0x10 +#define DESC8192F_RATEMCS5 0x11 +#define DESC8192F_RATEMCS6 0x12 +#define DESC8192F_RATEMCS7 0x13 +#define DESC8192F_RATEMCS8 0x14 +#define DESC8192F_RATEMCS9 0x15 +#define DESC8192F_RATEMCS10 0x16 +#define DESC8192F_RATEMCS11 0x17 +#define DESC8192F_RATEMCS12 0x18 +#define DESC8192F_RATEMCS13 0x19 +#define DESC8192F_RATEMCS14 0x1a +#define DESC8192F_RATEMCS15 0x1b +#define DESC8192F_RATEVHTSS1MCS0 0x2c +#define DESC8192F_RATEVHTSS1MCS1 0x2d +#define DESC8192F_RATEVHTSS1MCS2 0x2e +#define DESC8192F_RATEVHTSS1MCS3 0x2f +#define DESC8192F_RATEVHTSS1MCS4 0x30 +#define DESC8192F_RATEVHTSS1MCS5 0x31 +#define DESC8192F_RATEVHTSS1MCS6 0x32 +#define DESC8192F_RATEVHTSS1MCS7 0x33 +#define DESC8192F_RATEVHTSS1MCS8 0x34 +#define DESC8192F_RATEVHTSS1MCS9 0x35 +#define DESC8192F_RATEVHTSS2MCS0 0x36 +#define DESC8192F_RATEVHTSS2MCS1 0x37 +#define DESC8192F_RATEVHTSS2MCS2 0x38 +#define DESC8192F_RATEVHTSS2MCS3 0x39 +#define DESC8192F_RATEVHTSS2MCS4 0x3a +#define DESC8192F_RATEVHTSS2MCS5 0x3b +#define DESC8192F_RATEVHTSS2MCS6 0x3c +#define DESC8192F_RATEVHTSS2MCS7 0x3d +#define DESC8192F_RATEVHTSS2MCS8 0x3e +#define DESC8192F_RATEVHTSS2MCS9 0x3f + + +#define RX_HAL_IS_CCK_RATE_8192F(pDesc)\ + (GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE1M || \ + GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE2M || \ + GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE5_5M || \ + GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE11M) + +#ifdef CONFIG_TRX_BD_ARCH + struct tx_desc; +#endif + +void rtl8192f_cal_txdesc_chksum(struct tx_desc *ptxdesc); +void rtl8192f_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); +void rtl8192f_fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); +void rtl8192f_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); +void rtl8192f_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); +void rtl8192f_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); + +#if defined(CONFIG_CONCURRENT_MODE) + void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); +#endif +void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); + +#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) + s32 rtl8192fs_init_xmit_priv(PADAPTER padapter); + void rtl8192fs_free_xmit_priv(PADAPTER padapter); + s32 rtl8192fs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); + s32 rtl8192fs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); + s32 rtl8192fs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); + s32 rtl8192fs_xmit_buf_handler(PADAPTER padapter); + thread_return rtl8192fs_xmit_thread(thread_context context); + #define hal_xmit_handler rtl8192fs_xmit_buf_handler +#endif + +#ifdef CONFIG_USB_HCI + s32 rtl8192fu_init_xmit_priv(PADAPTER padapter); + void rtl8192fu_free_xmit_priv(PADAPTER padapter); + s32 rtl8192fu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); + s32 rtl8192fu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); + s32 rtl8192fu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); + s32 rtl8192fu_xmit_buf_handler(PADAPTER padapter); + #define hal_xmit_handler rtl8192fu_xmit_buf_handler + void rtl8192fu_xmit_tasklet(void *priv); + s32 rtl8192fu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); + void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); +#endif + +#ifdef CONFIG_PCI_HCI + s32 rtl8192fe_init_xmit_priv(PADAPTER padapter); + void rtl8192fe_free_xmit_priv(PADAPTER padapter); + struct xmit_buf *rtl8192fe_dequeue_xmitbuf(struct rtw_tx_ring *ring); + void rtl8192fe_xmitframe_resume(_adapter *padapter); + s32 rtl8192fe_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); + s32 rtl8192fe_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); + s32 rtl8192fe_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); + void rtl8192fe_xmit_tasklet(void *priv); +#endif + +u8 BWMapping_8192F(PADAPTER Adapter, struct pkt_attrib *pattrib); +u8 SCMapping_8192F(PADAPTER Adapter, struct pkt_attrib *pattrib); + +#endif diff --git a/include/rtl8703b_cmd.h b/include/rtl8703b_cmd.h index 43f7a88..0b2bd83 100644 --- a/include/rtl8703b_cmd.h +++ b/include/rtl8703b_cmd.h @@ -113,7 +113,6 @@ enum h2c_cmd_8703B { #define SET_8703B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_8703B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) #define SET_8703B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define SET_8703B_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) #define GET_8703B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) @@ -159,7 +158,7 @@ enum h2c_cmd_8703B { #define SET_8703B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) /* _BT_FW_PATCH_0x6A */ -#define SET_8703B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) +#define SET_8703B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) #define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) #define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) @@ -177,7 +176,6 @@ enum h2c_cmd_8703B { /* host message to firmware cmd */ void rtl8703b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); void rtl8703b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -void rtl8703b_set_rssi_cmd(PADAPTER padapter, u8 *param); void rtl8703b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); /* s32 rtl8703b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ void rtl8703b_set_FwPsTuneParam_cmd(PADAPTER padapter); diff --git a/include/rtl8703b_hal.h b/include/rtl8703b_hal.h index dfc9b6d..4a83abf 100644 --- a/include/rtl8703b_hal.h +++ b/include/rtl8703b_hal.h @@ -106,18 +106,10 @@ typedef struct _RT_8703B_FIRMWARE_HDR { /* Note: We will divide number of page equally for each queue other than public queue! */ /* For General Reserved Page Number(Beacon Queue is reserved page) - * Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 */ -#define BCNQ_PAGE_NUM_8703B 0x08 -#ifdef CONFIG_CONCURRENT_MODE - #define BCNQ1_PAGE_NUM_8703B 0x08 /* 0x04 */ -#else - #define BCNQ1_PAGE_NUM_8703B 0x00 -#endif + * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8703B + * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ -#ifdef CONFIG_PNO_SUPPORT - #undef BCNQ1_PAGE_NUM_8703B - #define BCNQ1_PAGE_NUM_8703B 0x00 /* 0x04 */ -#endif +#define BCNQ_PAGE_NUM_8703B (MAX_BEACON_LEN/PAGE_SIZE_TX_8703B + 6) /*0x08*/ /* For WoWLan , more reserved page * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1 PNO: 6 @@ -138,7 +130,7 @@ typedef struct _RT_8703B_FIRMWARE_HDR { #define AP_WOWLAN_PAGE_NUM_8703B 0x02 #endif -#define TX_TOTAL_PAGE_NUMBER_8703B (0xFF - BCNQ_PAGE_NUM_8703B - BCNQ1_PAGE_NUM_8703B - WOWLAN_PAGE_NUM_8703B) +#define TX_TOTAL_PAGE_NUMBER_8703B (0xFF - BCNQ_PAGE_NUM_8703B - WOWLAN_PAGE_NUM_8703B) #define TX_PAGE_BOUNDARY_8703B (TX_TOTAL_PAGE_NUMBER_8703B + 1) #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8703B TX_TOTAL_PAGE_NUMBER_8703B @@ -222,8 +214,8 @@ void Hal_EfuseParseCustomerID_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoL void Hal_EfuseParseAntennaDiversity_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseXtal_8703B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); void Hal_EfuseParseThermalMeter_8703B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); -VOID Hal_EfuseParseVoltage_8703B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -VOID Hal_EfuseParseBoardType_8703B(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); +void Hal_EfuseParseVoltage_8703B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParseBoardType_8703B(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); void rtl8703b_set_hal_ops(struct hal_ops *pHalFunc); void init_hal_spec_8703b(_adapter *adapter); @@ -257,7 +249,7 @@ void rtl8703b_stop_thread(_adapter *padapter); void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); #endif #ifdef CONFIG_MP_INCLUDED -int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); +int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); #endif void CCX_FwC2HTxRpt_8703b(PADAPTER padapter, u8 *pdata, u8 len); @@ -268,7 +260,7 @@ void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); #ifdef CONFIG_PCI_HCI BOOLEAN InterruptRecognized8703BE(PADAPTER Adapter); - VOID UpdateInterruptMask8703BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); + void UpdateInterruptMask8703BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); #endif #endif diff --git a/include/rtl8703b_recv.h b/include/rtl8703b_recv.h index e796e6e..09672d2 100644 --- a/include/rtl8703b_recv.h +++ b/include/rtl8703b_recv.h @@ -22,22 +22,18 @@ #if defined(CONFIG_USB_HCI) #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ - #else - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - #ifdef CONFIG_PLATFORM_MSTAR - #define MAX_RECVBUF_SZ (8192) /* 8K */ - #else - #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ - #endif - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ + /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ + /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ + #ifdef CONFIG_PLATFORM_MSTAR + #define MAX_RECVBUF_SZ (8192) /* 8K */ #else - #define MAX_RECVBUF_SZ (4000) /* about 4K */ + #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ #endif + /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ + #else + #define MAX_RECVBUF_SZ (4000) /* about 4K */ #endif #endif /* !MAX_RECVBUF_SZ */ diff --git a/include/rtl8703b_rf.h b/include/rtl8703b_rf.h index 8d980a8..4148276 100644 --- a/include/rtl8703b_rf.h +++ b/include/rtl8703b_rf.h @@ -15,11 +15,11 @@ #ifndef __RTL8703B_RF_H__ #define __RTL8703B_RF_H__ -int PHY_RF6052_Config8703B(IN PADAPTER Adapter); +int PHY_RF6052_Config8703B(PADAPTER Adapter); -VOID +void PHY_RF6052SetBandwidth8703B( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth); + PADAPTER Adapter, + enum channel_width Bandwidth); #endif diff --git a/include/rtl8703b_xmit.h b/include/rtl8703b_xmit.h index 2bcd5a7..40c7bb2 100644 --- a/include/rtl8703b_xmit.h +++ b/include/rtl8703b_xmit.h @@ -184,13 +184,14 @@ #define SET_TX_DESC_ANTSEL_D_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) /* Dword 7 */ - #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) + #ifdef CONFIG_PCI_HCI #define SET_TX_DESC_TX_BUFFER_SIZE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) - #else + #endif /*CONFIG_PCI_HCI*/ + #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) #define SET_TX_DESC_TX_DESC_CHECKSUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) #endif #define SET_TX_DESC_USB_TXAGG_NUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) - #if (DEV_BUS_TYPE == RT_SDIO_INTERFACE) + #ifdef CONFIG_SDIO_HCI #define SET_TX_DESC_SDIO_TXSEQ_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) #endif diff --git a/include/rtl8710b_cmd.h b/include/rtl8710b_cmd.h new file mode 100644 index 0000000..20d4ff9 --- /dev/null +++ b/include/rtl8710b_cmd.h @@ -0,0 +1,175 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8710B_CMD_H__ +#define __RTL8710B_CMD_H__ + +/* --------------------------------------------------------------------------------------------------------- + * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ + * --------------------------------------------------------------------------------------------------------- */ + +enum h2c_cmd_8710B { + /* Common Class: 000 */ + H2C_8710B_RSVD_PAGE = 0x00, + H2C_8710B_MEDIA_STATUS_RPT = 0x01, + H2C_8710B_SCAN_ENABLE = 0x02, + H2C_8710B_KEEP_ALIVE = 0x03, + H2C_8710B_DISCON_DECISION = 0x04, + H2C_8710B_PSD_OFFLOAD = 0x05, + H2C_8710B_AP_OFFLOAD = 0x08, + H2C_8710B_BCN_RSVDPAGE = 0x09, + H2C_8710B_PROBERSP_RSVDPAGE = 0x0A, + H2C_8710B_FCS_RSVDPAGE = 0x10, + H2C_8710B_FCS_INFO = 0x11, + H2C_8710B_AP_WOW_GPIO_CTRL = 0x13, + + /* PoweSave Class: 001 */ + H2C_8710B_SET_PWR_MODE = 0x20, + H2C_8710B_PS_TUNING_PARA = 0x21, + H2C_8710B_PS_TUNING_PARA2 = 0x22, + H2C_8710B_P2P_LPS_PARAM = 0x23, + H2C_8710B_P2P_PS_OFFLOAD = 0x24, + H2C_8710B_PS_SCAN_ENABLE = 0x25, + H2C_8710B_SAP_PS_ = 0x26, + H2C_8710B_INACTIVE_PS_ = 0x27, /* Inactive_PS */ + H2C_8710B_FWLPS_IN_IPS_ = 0x28, + + /* Dynamic Mechanism Class: 010 */ + H2C_8710B_MACID_CFG = 0x40, + H2C_8710B_TXBF = 0x41, + H2C_8710B_RSSI_SETTING = 0x42, + H2C_8710B_AP_REQ_TXRPT = 0x43, + H2C_8710B_INIT_RATE_COLLECT = 0x44, + H2C_8710B_RA_PARA_ADJUST = 0x46, + + /* WOWLAN Class: 100 */ + H2C_8710B_WOWLAN = 0x80, + H2C_8710B_REMOTE_WAKE_CTRL = 0x81, + H2C_8710B_AOAC_GLOBAL_INFO = 0x82, + H2C_8710B_AOAC_RSVD_PAGE = 0x83, + H2C_8710B_AOAC_RSVD_PAGE2 = 0x84, + H2C_8710B_D0_SCAN_OFFLOAD_CTRL = 0x85, + H2C_8710B_D0_SCAN_OFFLOAD_INFO = 0x86, + H2C_8710B_CHNL_SWITCH_OFFLOAD = 0x87, + H2C_8710B_P2P_OFFLOAD_RSVD_PAGE = 0x8A, + H2C_8710B_P2P_OFFLOAD = 0x8B, + + H2C_8710B_RESET_TSF = 0xC0, + H2C_8710B_MAXID, +}; + +/* --------------------------------------------------------------------------------------------------------- + * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- + * --------------------------------------------------------------------------------------------------------- + * _RSVDPAGE_LOC_CMD_0x00 */ +#define SET_8710B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_8710B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) +#define SET_8710B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) +#define SET_8710B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) +#define SET_8710B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) + +/* _PWR_MOD_CMD_0x20 */ +#define SET_8710B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_8710B_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) +#define SET_8710B_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) +#define SET_8710B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) +#define SET_8710B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) +#define SET_8710B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) +#define SET_8710B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) + +#define GET_8710B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) + +/* _PS_TUNE_PARAM_CMD_0x21 */ +#define SET_8710B_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_8710B_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) +#define SET_8710B_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) +#define SET_8710B_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) +#define SET_8710B_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) + +/* _MACID_CFG_CMD_0x40 */ +#define SET_8710B_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_8710B_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) +#define SET_8710B_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) +#define SET_8710B_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) +#define SET_8710B_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) +#define SET_8710B_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) +#define SET_8710B_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) +#define SET_8710B_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) +#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) +#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) +#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) +#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) + +/* _RSSI_SETTING_CMD_0x42 */ +#define SET_8710B_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_8710B_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) +#define SET_8710B_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) + +/* _AP_REQ_TXRPT_CMD_0x43 */ +#define SET_8710B_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_8710B_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) + +/* _FORCE_BT_TXPWR_CMD_0x62 */ +#define SET_8710B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) + +/* _FORCE_BT_MP_OPER_CMD_0x67 */ +#define SET_8710B_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) +#define SET_8710B_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) +#define SET_8710B_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) +#define SET_8710B_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) +#define SET_8710B_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) +#define SET_8710B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) + +/* _BT_FW_PATCH_0x6A */ +#define SET_8710B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) +#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) +#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) +#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) +#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) + +/* --------------------------------------------------------------------------------------------------------- + * ------------------------------------------- Structure -------------------------------------------------- + * --------------------------------------------------------------------------------------------------------- */ + + +/* --------------------------------------------------------------------------------------------------------- + * ---------------------------------- Function Statement -------------------------------------------------- + * --------------------------------------------------------------------------------------------------------- */ + +/* host message to firmware cmd */ +void rtl8710b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); +void rtl8710b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); +/* s32 rtl8710b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ +void rtl8710b_set_FwPsTuneParam_cmd(PADAPTER padapter); +void rtl8710b_download_rsvd_page(PADAPTER padapter, u8 mstatus); +#ifdef CONFIG_BT_COEXIST + void rtl8710b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); +#endif /* CONFIG_BT_COEXIST */ +#ifdef CONFIG_P2P + void rtl8710b_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); +#endif /* CONFIG_P2P */ + +#ifdef CONFIG_TDLS +#ifdef CONFIG_TDLS_CH_SW +void rtl8710b_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); +#endif +#endif + +#ifdef CONFIG_P2P_WOWLAN + void rtl8710b_set_p2p_wowlan_offload_cmd(PADAPTER padapter); +#endif + +s32 FillH2CCmd8710B(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); +u8 GetTxBufferRsvdPageNum8710B(_adapter *padapter, bool wowlan); +#endif diff --git a/include/rtl8710b_dm.h b/include/rtl8710b_dm.h new file mode 100644 index 0000000..9a131ba --- /dev/null +++ b/include/rtl8710b_dm.h @@ -0,0 +1,39 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8710B_DM_H__ +#define __RTL8710B_DM_H__ +/* ************************************************************ + * Description: + * + * This file is for 8710B dynamic mechanism only + * + * + * ************************************************************ */ + +/* ************************************************************ + * structure and define + * ************************************************************ */ + +/* ************************************************************ + * function prototype + * ************************************************************ */ + +void rtl8710b_init_dm_priv(PADAPTER padapter); +void rtl8710b_deinit_dm_priv(PADAPTER padapter); + +void rtl8710b_InitHalDm(PADAPTER padapter); +void rtl8710b_HalDmWatchDog(PADAPTER padapter); + +#endif diff --git a/include/rtl8710b_hal.h b/include/rtl8710b_hal.h new file mode 100644 index 0000000..332112b --- /dev/null +++ b/include/rtl8710b_hal.h @@ -0,0 +1,277 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8710B_HAL_H__ +#define __RTL8710B_HAL_H__ + +#include "hal_data.h" + +#include "rtl8710b_spec.h" +#include "rtl8710b_rf.h" +#include "rtl8710b_dm.h" +#include "rtl8710b_recv.h" +#include "rtl8710b_xmit.h" +#include "rtl8710b_cmd.h" +#include "rtl8710b_led.h" +#include "Hal8710BPwrSeq.h" +#include "Hal8710BPhyReg.h" +#include "Hal8710BPhyCfg.h" +#ifdef DBG_CONFIG_ERROR_DETECT + #include "rtl8710b_sreset.h" +#endif +#ifdef CONFIG_LPS_POFF + #include "rtl8710b_lps_poff.h" +#endif + +#define FW_8710B_SIZE 0x8000 +#define FW_8710B_START_ADDRESS 0x1000 +#define FW_8710B_END_ADDRESS 0x1FFF /* 0x5FFF */ + +typedef struct _RT_FIRMWARE { + FIRMWARE_SOURCE eFWSource; +#ifdef CONFIG_EMBEDDED_FWIMG + u8 *szFwBuffer; +#else + u8 szFwBuffer[FW_8710B_SIZE]; +#endif + u32 ulFwLength; +} RT_FIRMWARE_8710B, *PRT_FIRMWARE_8710B; + +/* + * This structure must be cared byte-ordering + * + * Added by tynli. 2009.12.04. */ +typedef struct _RT_8710B_FIRMWARE_HDR { + /* 8-byte alinment required */ + + /* --- LONG WORD 0 ---- */ + u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ + u8 Category; /* AP/NIC and USB/PCI */ + u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ + u16 Version; /* FW Version */ + u16 Subversion; /* FW Subversion, default 0x00 */ + + /* --- LONG WORD 1 ---- */ + u8 Month; /* Release time Month field */ + u8 Date; /* Release time Date field */ + u8 Hour; /* Release time Hour field */ + u8 Minute; /* Release time Minute field */ + u16 RamCodeSize; /* The size of RAM code */ + u16 Rsvd2; + + /* --- LONG WORD 2 ---- */ + u32 SvnIdx; /* The SVN entry index */ + u32 Rsvd3; + + /* --- LONG WORD 3 ---- */ + u32 Rsvd4; + u32 Rsvd5; +} RT_8710B_FIRMWARE_HDR, *PRT_8710B_FIRMWARE_HDR; + +#define DRIVER_EARLY_INT_TIME_8710B 0x05 +#define BCN_DMA_ATIME_INT_TIME_8710B 0x02 + +/* for 8710B + * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */ +#define PAGE_SIZE_TX_8710B 128 +#define PAGE_SIZE_RX_8710B 8 + +#define TX_DMA_SIZE_8710B 0x8000 /* 32K(TX) */ +#define RX_DMA_SIZE_8710B 0x4000 /* 16K(RX) */ + +#ifdef CONFIG_WOWLAN + #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ +#else + #define RESV_FMWF 0 +#endif + +#ifdef CONFIG_FW_C2H_DEBUG + #define RX_DMA_RESERVED_SIZE_8710B 0x100 /* 256B, reserved for c2h debug message */ +#else + #define RX_DMA_RESERVED_SIZE_8710B 0x80 /* 128B, reserved for tx report */ +#endif +#define RX_DMA_BOUNDARY_8710B\ + (RX_DMA_SIZE_8710B - RX_DMA_RESERVED_SIZE_8710B - 1) + + +/* Note: We will divide number of page equally for each queue other than public queue! */ + +/* For General Reserved Page Number(Beacon Queue is reserved page) + * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8710B + * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ +#define BCNQ_PAGE_NUM_8710B (MAX_BEACON_LEN/PAGE_SIZE_TX_8710B + 6) /*0x08*/ + + +/* For WoWLan , more reserved page + * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6 + * NS offload: 2 NDP info: 1 + */ +#ifdef CONFIG_WOWLAN + #define WOWLAN_PAGE_NUM_8710B 0x0b +#else + #define WOWLAN_PAGE_NUM_8710B 0x00 +#endif + +#ifdef CONFIG_PNO_SUPPORT + #undef WOWLAN_PAGE_NUM_8710B + #define WOWLAN_PAGE_NUM_8710B 0x15 +#endif + +#ifdef CONFIG_AP_WOWLAN + #define AP_WOWLAN_PAGE_NUM_8710B 0x02 +#endif + +#define TX_TOTAL_PAGE_NUMBER_8710B\ + (0xFF - BCNQ_PAGE_NUM_8710B -WOWLAN_PAGE_NUM_8710B) +#define TX_PAGE_BOUNDARY_8710B (TX_TOTAL_PAGE_NUMBER_8710B + 1) + +#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8710B TX_TOTAL_PAGE_NUMBER_8710B +#define WMM_NORMAL_TX_PAGE_BOUNDARY_8710B\ + (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8710B + 1) + +/* For Normal Chip Setting + * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8710B */ +#define NORMAL_PAGE_NUM_HPQ_8710B 0x0C +#define NORMAL_PAGE_NUM_LPQ_8710B 0x02 +#define NORMAL_PAGE_NUM_NPQ_8710B 0x02 +#define NORMAL_PAGE_NUM_EPQ_8710B 0x04 + +/* Note: For Normal Chip Setting, modify later */ +#define WMM_NORMAL_PAGE_NUM_HPQ_8710B 0x30 +#define WMM_NORMAL_PAGE_NUM_LPQ_8710B 0x20 +#define WMM_NORMAL_PAGE_NUM_NPQ_8710B 0x20 +#define WMM_NORMAL_PAGE_NUM_EPQ_8710B 0x00 + + +#include "HalVerDef.h" +#include "hal_com.h" + +#define EFUSE_OOB_PROTECT_BYTES (96 + 1) + +#define HAL_EFUSE_MEMORY +#define HWSET_MAX_SIZE_8710B 512 +#define EFUSE_REAL_CONTENT_LEN_8710B 512 +#define EFUSE_MAP_LEN_8710B 512 +#define EFUSE_MAX_SECTION_8710B 64 + +/* For some inferiority IC purpose. added by Roger, 2009.09.02.*/ +#define EFUSE_IC_ID_OFFSET 506 +#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8710B) + +#define EFUSE_ACCESS_ON 0x69 +#define EFUSE_ACCESS_OFF 0x00 + +#define PACKAGE_QFN32_S 0 +#define PACKAGE_QFN48M_S 1 //definiton 8188GU Dongle Package, Efuse Physical Address 0xF8 = 0xFE +#define PACKAGE_QFN48_S 2 +#define PACKAGE_QFN64_S 3 +#define PACKAGE_QFN32_U 4 +#define PACKAGE_QFN48M_U 5 //definiton 8188GU Dongle Package, Efuse Physical Address 0xF8 = 0xEE +#define PACKAGE_QFN48_U 6 +#define PACKAGE_QFN68_U 7 + +typedef enum _PACKAGE_TYPE_E +{ + PACKAGE_DEFAULT, + PACKAGE_QFN68, + PACKAGE_TFBGA90, + PACKAGE_TFBGA80, + PACKAGE_TFBGA79 +}PACKAGE_TYPE_E; + +#define INCLUDE_MULTI_FUNC_GPS(_Adapter) \ + (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) + +#ifdef CONFIG_FILE_FWIMG + extern char *rtw_fw_file_path; + extern char *rtw_fw_wow_file_path; + #ifdef CONFIG_MP_INCLUDED + extern char *rtw_fw_mp_bt_file_path; + #endif /* CONFIG_MP_INCLUDED */ +#endif /* CONFIG_FILE_FWIMG */ + +/* rtl8710b_hal_init.c */ +s32 rtl8710b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); +void rtl8710b_FirmwareSelfReset(PADAPTER padapter); +void rtl8710b_InitializeFirmwareVars(PADAPTER padapter); + +void rtl8710b_InitAntenna_Selection(PADAPTER padapter); +void rtl8710b_DeinitAntenna_Selection(PADAPTER padapter); +void rtl8710b_CheckAntenna_Selection(PADAPTER padapter); +void rtl8710b_init_default_value(PADAPTER padapter); + + +u32 indirect_read32_8710b(PADAPTER padapter, u32 regaddr); +void indirect_write32_8710b(PADAPTER padapter, u32 regaddr, u32 data); +u32 hal_query_syson_reg_8710b(PADAPTER padapter, u32 regaddr, u32 bitmask); +void hal_set_syson_reg_8710b(PADAPTER padapter, u32 regaddr, u32 bitmask, u32 data); +#define HAL_SetSYSOnReg hal_set_syson_reg_8710b + + +/* EFuse */ +u8 GetEEPROMSize8710B(PADAPTER padapter); + +#if 0 +void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); +void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); +void Hal_EfuseParseTxPowerInfo_8710B(PADAPTER padapter, + u8 *PROMContent, BOOLEAN AutoLoadFail); +void Hal_EfuseParseEEPROMVer_8710B(PADAPTER padapter, + u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParsePackageType_8710B(PADAPTER pAdapter, + u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParseChnlPlan_8710B(PADAPTER padapter, + u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParseCustomerID_8710B(PADAPTER padapter, + u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParseAntennaDiversity_8710B(PADAPTER padapter, + u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParseXtal_8710B(PADAPTER pAdapter, + u8 *hwinfo, u8 AutoLoadFail); +void Hal_EfuseParseThermalMeter_8710B(PADAPTER padapter, + u8 *hwinfo, u8 AutoLoadFail); +void Hal_EfuseParseBoardType_8710B(PADAPTER Adapter, + u8 *PROMContent, BOOLEAN AutoloadFail); +#endif + +void rtl8710b_set_hal_ops(struct hal_ops *pHalFunc); +void init_hal_spec_8710b(_adapter *adapter); +u8 SetHwReg8710B(PADAPTER padapter, u8 variable, u8 *val); +void GetHwReg8710B(PADAPTER padapter, u8 variable, u8 *val); +u8 SetHalDefVar8710B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); +u8 GetHalDefVar8710B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); + +/* register */ +void rtl8710b_InitBeaconParameters(PADAPTER padapter); +void rtl8710b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); +void _8051Reset8710(PADAPTER padapter); + +void rtl8710b_start_thread(_adapter *padapter); +void rtl8710b_stop_thread(_adapter *padapter); + +#ifdef CONFIG_GPIO_WAKEUP + void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); +#endif + +void CCX_FwC2HTxRpt_8710b(PADAPTER padapter, u8 *pdata, u8 len); + +u8 MRateToHwRate8710B(u8 rate); +u8 HwRateToMRate8710B(u8 rate); + +#ifdef CONFIG_USB_HCI + void rtl8710b_cal_txdesc_chksum(struct tx_desc *ptxdesc); +#endif + + +#endif diff --git a/include/rtl8710b_led.h b/include/rtl8710b_led.h new file mode 100644 index 0000000..8ca346d --- /dev/null +++ b/include/rtl8710b_led.h @@ -0,0 +1,44 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8710B_LED_H__ +#define __RTL8710B_LED_H__ + +#include +#include +#include + +#ifdef CONFIG_RTW_SW_LED +/* ******************************************************************************** + * Interface to manipulate LED objects. + * ******************************************************************************** */ +#ifdef CONFIG_USB_HCI + void rtl8710bu_InitSwLeds(PADAPTER padapter); + void rtl8710bu_DeInitSwLeds(PADAPTER padapter); +#endif +#ifdef CONFIG_SDIO_HCI + void rtl8710bs_InitSwLeds(PADAPTER padapter); + void rtl8710bs_DeInitSwLeds(PADAPTER padapter); +#endif +#ifdef CONFIG_GSPI_HCI + void rtl8710bs_InitSwLeds(PADAPTER padapter); + void rtl8710bs_DeInitSwLeds(PADAPTER padapter); +#endif +#ifdef CONFIG_PCI_HCI + void rtl8710be_InitSwLeds(PADAPTER padapter); + void rtl8710be_DeInitSwLeds(PADAPTER padapter); +#endif + +#endif /*#ifdef CONFIG_RTW_SW_LED*/ +#endif diff --git a/include/rtl8710b_lps_poff.h b/include/rtl8710b_lps_poff.h new file mode 100644 index 0000000..ea9c60e --- /dev/null +++ b/include/rtl8710b_lps_poff.h @@ -0,0 +1,56 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/******************************************** CONST ************************/ +#define NUM_OF_REGISTER_BANK 13 +#define NUM_OF_TOTAL_DWORD (NUM_OF_REGISTER_BANK * 64) +#define TOTAL_LEN_FOR_HIOE ((NUM_OF_TOTAL_DWORD + 1) * 8) +#define LPS_POFF_STATIC_FILE_LEN (TOTAL_LEN_FOR_HIOE + TXDESC_SIZE) +#define LPS_POFF_DYNAMIC_FILE_LEN (512 + TXDESC_SIZE) +/******************************************** CONST ************************/ + +/******************************************** MACRO ************************/ +/* HOIE Entry Definition */ +#define SET_HOIE_ENTRY_LOW_DATA(__pHOIE, __Value) \ + SET_BITS_TO_LE_4BYTE((__pHOIE), 0, 16, __Value) +#define SET_HOIE_ENTRY_HIGH_DATA(__pHOIE, __Value) \ + SET_BITS_TO_LE_4BYTE((__pHOIE), 16, 16, __Value) +#define SET_HOIE_ENTRY_MODE_SELECT(__pHOIE, __Value) \ + SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 0, 1, __Value) +#define SET_HOIE_ENTRY_ADDRESS(__pHOIE, __Value) \ + SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 1, 14, __Value) +#define SET_HOIE_ENTRY_BYTE_MASK(__pHOIE, __Value) \ + SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 15, 4, __Value) +#define SET_HOIE_ENTRY_IO_LOCK(__pHOIE, __Value) \ + SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 19, 1, __Value) +#define SET_HOIE_ENTRY_RD_EN(__pHOIE, __Value) \ + SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 20, 1, __Value) +#define SET_HOIE_ENTRY_WR_EN(__pHOIE, __Value) \ + SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 21, 1, __Value) +#define SET_HOIE_ENTRY_RAW_RW(__pHOIE, __Value) \ + SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 22, 1, __Value) +#define SET_HOIE_ENTRY_RAW(__pHOIE, __Value) \ + SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 23, 1, __Value) +#define SET_HOIE_ENTRY_IO_DELAY(__pHOIE, __Value) \ + SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 24, 8, __Value) + +/*********************Function Definition*******************************************/ +void rtl8710b_lps_poff_init(PADAPTER padapter); +void rtl8710b_lps_poff_deinit(PADAPTER padapter); +bool rtl8710b_lps_poff_get_txbndy_status(PADAPTER padapter); +void rtl8710b_lps_poff_h2c_ctrl(PADAPTER padapter, u8 enable); +void rtl8710b_lps_poff_set_ps_mode(PADAPTER padapter, bool bEnterLPS); +bool rtl8710b_lps_poff_get_status(PADAPTER padapter); +void rtl8710b_lps_poff_wow(PADAPTER padapter); diff --git a/include/rtl8710b_recv.h b/include/rtl8710b_recv.h new file mode 100644 index 0000000..ca0b8f8 --- /dev/null +++ b/include/rtl8710b_recv.h @@ -0,0 +1,81 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8710B_RECV_H__ +#define __RTL8710B_RECV_H__ + +#define RECV_BLK_SZ 512 +#define RECV_BLK_CNT 16 +#define RECV_BLK_TH RECV_BLK_CNT + +#if defined(CONFIG_USB_HCI) + #ifndef MAX_RECVBUF_SZ + #ifdef CONFIG_MINIMAL_MEMORY_USAGE + #define MAX_RECVBUF_SZ (4000) /* about 4K */ + #else + #ifdef CONFIG_PLATFORM_MSTAR + #define MAX_RECVBUF_SZ (8192) /* 8K */ + #elif defined(CONFIG_PLATFORM_HISILICON) + #define MAX_RECVBUF_SZ (16384) /* 16k */ + #else + #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ + /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ + /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ + /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ + /* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */ + #endif + #endif + #endif /* !MAX_RECVBUF_SZ */ +#endif + +/* Rx smooth factor */ +#define Rx_Smooth_Factor (20) + +/*-----------------------------------------------------------------*/ +/* RTL8710B RX BUFFER DESC */ +/*-----------------------------------------------------------------*/ +/*DWORD 0*/ +#define SET_RX_BUFFER_DESC_DATA_LENGTH_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) +#define SET_RX_BUFFER_DESC_LS_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) +#define SET_RX_BUFFER_DESC_FS_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 1, __Value) +#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 15, __Value) + +#define GET_RX_BUFFER_DESC_OWN_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) +#define GET_RX_BUFFER_DESC_LS_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) +#define GET_RX_BUFFER_DESC_FS_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 1) +#ifdef USING_RX_TAG + #define GET_RX_BUFFER_DESC_RX_TAG_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 13) +#else + #define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) +#endif + +/*DWORD 1*/ +#define SET_RX_BUFFER_PHYSICAL_LOW_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) + +/*DWORD 2*/ +#ifdef CONFIG_64BIT_DMA + #define SET_RX_BUFFER_PHYSICAL_HIGH_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) +#else + #define SET_RX_BUFFER_PHYSICAL_HIGH_8710B(__pRxStatusDesc, __Value) +#endif + +#ifdef CONFIG_USB_HCI + int rtl8710bu_init_recv_priv(_adapter *padapter); + void rtl8710bu_free_recv_priv(_adapter *padapter); + void rtl8710bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); +#endif + +void rtl8710b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); + +#endif /* __RTL8710B_RECV_H__ */ diff --git a/include/rtl8710b_rf.h b/include/rtl8710b_rf.h new file mode 100644 index 0000000..0b5cee6 --- /dev/null +++ b/include/rtl8710b_rf.h @@ -0,0 +1,20 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8710B_RF_H__ +#define __RTL8710B_RF_H__ + +int PHY_RF6052_Config8710B(PADAPTER pdapter); + +#endif diff --git a/include/rtl8710b_spec.h b/include/rtl8710b_spec.h new file mode 100644 index 0000000..309c3ee --- /dev/null +++ b/include/rtl8710b_spec.h @@ -0,0 +1,481 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8710B_SPEC_H__ +#define __RTL8710B_SPEC_H__ + +#include + + +#define HAL_NAV_UPPER_UNIT_8710B 128 /* micro-second */ + +/* ----------------------------------------------------- + * + * 0x0000h ~ 0x00FFh System Configuration + * + * ----------------------------------------------------- */ +#define REG_SYS_ISO_CTRL_8710B 0x0000 /* 2 Byte */ +#define REG_APS_FSMCO_8710B 0x0004 /* 4 Byte */ +#define REG_SYS_CLKR_8710B 0x0008 /* 2 Byte */ +#define REG_9346CR_8710B 0x000A /* 2 Byte */ +#define REG_EE_VPD_8710B 0x000C /* 2 Byte */ +#define REG_AFE_MISC_8710B 0x0010 /* 1 Byte */ +#define REG_SPS0_CTRL_8710B 0x0011 /* 7 Byte */ +#define REG_SPS_OCP_CFG_8710B 0x0018 /* 4 Byte */ +#define REG_RSV_CTRL_8710B 0x001C /* 3 Byte */ +#define REG_RF_CTRL_8710B 0x001F /* 1 Byte */ +#define REG_LPLDO_CTRL_8710B 0x0023 /* 1 Byte */ +#define REG_AFE_XTAL_CTRL_8710B 0x0024 /* 4 Byte */ +#define REG_AFE_PLL_CTRL_8710B 0x0028 /* 4 Byte */ +#define REG_MAC_PLL_CTRL_EXT_8710B 0x002c /* 4 Byte */ +#define REG_EFUSE_CTRL_8710B 0x0030 +#define REG_EFUSE_TEST_8710B 0x0034 +#define REG_PWR_DATA_8710B 0x0038 +#define REG_CAL_TIMER_8710B 0x003C +#define REG_ACLK_MON_8710B 0x003E +#define REG_GPIO_MUXCFG_8710B 0x0040 +#define REG_GPIO_IO_SEL_8710B 0x0042 +#define REG_MAC_PINMUX_CFG_8710B 0x0043 +#define REG_GPIO_PIN_CTRL_8710B 0x0044 +#define REG_GPIO_INTM_8710B 0x0048 +#define REG_LEDCFG0_8710B 0x004C +#define REG_LEDCFG1_8710B 0x004D +#define REG_LEDCFG2_8710B 0x004E +#define REG_LEDCFG3_8710B 0x004F +#define REG_FSIMR_8710B 0x0050 +#define REG_FSISR_8710B 0x0054 +#define REG_HSIMR_8710B 0x0058 +#define REG_HSISR_8710B 0x005c +#define REG_GPIO_EXT_CTRL 0x0060 +#define REG_PAD_CTRL1_8710B 0x0064 +#define REG_MULTI_FUNC_CTRL_8710B 0x0068 +#define REG_GPIO_STATUS_8710B 0x006C +#define REG_SDIO_CTRL_8710B 0x0070 +#define REG_OPT_CTRL_8710B 0x0074 +#define REG_AFE_CTRL_4_8710B 0x0078 +#define REG_MCUFWDL_8710B 0x0080 +#define REG_8051FW_CTRL_8710B 0x0080 +#define REG_HMEBOX_DBG_0_8710B 0x0088 +#define REG_HMEBOX_DBG_1_8710B 0x008A +#define REG_HMEBOX_DBG_2_8710B 0x008C +#define REG_HMEBOX_DBG_3_8710B 0x008E +#define REG_WLLPS_CTRL 0x0090 + +#define REG_PMC_DBG_CTRL2_8710B 0x00CC +#define REG_EFUSE_BURN_GNT_8710B 0x00CF +#define REG_HPON_FSM_8710B 0x00EC +#define REG_SYS_CFG1_8710B 0x00F0 +#define REG_SYS_CFG_8710B 0x00FC +#define REG_ROM_VERSION 0x00FD + +/* ----------------------------------------------------- + * + * 0x0100h ~ 0x01FFh MACTOP General Configuration + * + * ----------------------------------------------------- */ +#define REG_C2HEVT_CMD_ID_8710B 0x01A0 +#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 +#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 +#define REG_C2HEVT_CMD_LEN_8710B 0x01AE +#define REG_C2HEVT_CLEAR_8710B 0x01AF +#define REG_MCUTST_1_8710B 0x01C0 +#define REG_WOWLAN_WAKE_REASON 0x01C7 +#define REG_FMETHR_8710B 0x01C8 +#define REG_HMETFR_8710B 0x01CC +#define REG_HMEBOX_0_8710B 0x01D0 +#define REG_HMEBOX_1_8710B 0x01D4 +#define REG_HMEBOX_2_8710B 0x01D8 +#define REG_HMEBOX_3_8710B 0x01DC +#define REG_LLT_INIT_8710B 0x01E0 +#define REG_HMEBOX_EXT0_8710B 0x01F0 +#define REG_HMEBOX_EXT1_8710B 0x01F4 +#define REG_HMEBOX_EXT2_8710B 0x01F8 +#define REG_HMEBOX_EXT3_8710B 0x01FC + +/* ----------------------------------------------------- + * + * 0x0200h ~ 0x027Fh TXDMA Configuration + * + * ----------------------------------------------------- */ +#define REG_RQPN_8710B 0x0200 +#define REG_FIFOPAGE_8710B 0x0204 +#define REG_DWBCN0_CTRL_8710B REG_TDECTRL +#define REG_TXDMA_OFFSET_CHK_8710B 0x020C +#define REG_TXDMA_STATUS_8710B 0x0210 +#define REG_RQPN_NPQ_8710B 0x0214 +#define REG_DWBCN1_CTRL_8710B 0x0228 + + +/* ----------------------------------------------------- + * + * 0x0280h ~ 0x02FFh RXDMA Configuration + * + * ----------------------------------------------------- */ +#define REG_RXDMA_AGG_PG_TH_8710B 0x0280 +#define REG_FW_UPD_RDPTR_8710B 0x0284 /* FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 */ +#define REG_RXDMA_CONTROL_8710B 0x0286 /* Control the RX DMA. */ +#define REG_RXDMA_STATUS_8710B 0x0288 +#define REG_RXDMA_MODE_CTRL_8710B 0x0290 +#define REG_EARLY_MODE_CONTROL_8710B 0x02BC +#define REG_RSVD5_8710B 0x02F0 +#define REG_RSVD6_8710B 0x02F4 + +/* ----------------------------------------------------- + * + * 0x0300h ~ 0x03FFh PCIe + * + * ----------------------------------------------------- */ +#define REG_PCIE_CTRL_REG_8710B 0x0300 +#define REG_INT_MIG_8710B 0x0304 /* Interrupt Migration */ +#define REG_BCNQ_TXBD_DESA_8710B 0x0308 /* TX Beacon Descriptor Address */ +#define REG_MGQ_TXBD_DESA_8710B 0x0310 /* TX Manage Queue Descriptor Address */ +#define REG_VOQ_TXBD_DESA_8710B 0x0318 /* TX VO Queue Descriptor Address */ +#define REG_VIQ_TXBD_DESA_8710B 0x0320 /* TX VI Queue Descriptor Address */ +#define REG_BEQ_TXBD_DESA_8710B 0x0328 /* TX BE Queue Descriptor Address */ +#define REG_BKQ_TXBD_DESA_8710B 0x0330 /* TX BK Queue Descriptor Address */ +#define REG_RXQ_RXBD_DESA_8710B 0x0338 /* RX Queue Descriptor Address */ +#define REG_HI0Q_TXBD_DESA_8710B 0x0340 +#define REG_HI1Q_TXBD_DESA_8710B 0x0348 +#define REG_HI2Q_TXBD_DESA_8710B 0x0350 +#define REG_HI3Q_TXBD_DESA_8710B 0x0358 +#define REG_HI4Q_TXBD_DESA_8710B 0x0360 +#define REG_HI5Q_TXBD_DESA_8710B 0x0368 +#define REG_HI6Q_TXBD_DESA_8710B 0x0370 +#define REG_HI7Q_TXBD_DESA_8710B 0x0378 +#define REG_MGQ_TXBD_NUM_8710B 0x0380 +#define REG_RX_RXBD_NUM_8710B 0x0382 +#define REG_VOQ_TXBD_NUM_8710B 0x0384 +#define REG_VIQ_TXBD_NUM_8710B 0x0386 +#define REG_BEQ_TXBD_NUM_8710B 0x0388 +#define REG_BKQ_TXBD_NUM_8710B 0x038A +#define REG_HI0Q_TXBD_NUM_8710B 0x038C +#define REG_HI1Q_TXBD_NUM_8710B 0x038E +#define REG_HI2Q_TXBD_NUM_8710B 0x0390 +#define REG_HI3Q_TXBD_NUM_8710B 0x0392 +#define REG_HI4Q_TXBD_NUM_8710B 0x0394 +#define REG_HI5Q_TXBD_NUM_8710B 0x0396 +#define REG_HI6Q_TXBD_NUM_8710B 0x0398 +#define REG_HI7Q_TXBD_NUM_8710B 0x039A +#define REG_TSFTIMER_HCI_8710B 0x039C +#define REG_BD_RW_PTR_CLR_8710B 0x039C + +/* Read Write Point */ +#define REG_VOQ_TXBD_IDX_8710B 0x03A0 +#define REG_VIQ_TXBD_IDX_8710B 0x03A4 +#define REG_BEQ_TXBD_IDX_8710B 0x03A8 +#define REG_BKQ_TXBD_IDX_8710B 0x03AC +#define REG_MGQ_TXBD_IDX_8710B 0x03B0 +#define REG_RXQ_TXBD_IDX_8710B 0x03B4 +#define REG_HI0Q_TXBD_IDX_8710B 0x03B8 +#define REG_HI1Q_TXBD_IDX_8710B 0x03BC +#define REG_HI2Q_TXBD_IDX_8710B 0x03C0 +#define REG_HI3Q_TXBD_IDX_8710B 0x03C4 +#define REG_HI4Q_TXBD_IDX_8710B 0x03C8 +#define REG_HI5Q_TXBD_IDX_8710B 0x03CC +#define REG_HI6Q_TXBD_IDX_8710B 0x03D0 +#define REG_HI7Q_TXBD_IDX_8710B 0x03D4 + +#define REG_PCIE_HCPWM_8710BE 0x03D8 /* ?????? */ +#define REG_PCIE_HRPWM_8710BE 0x03DC /* PCIe RPWM ?????? */ +#define REG_DBI_WDATA_V1_8710B 0x03E8 +#define REG_DBI_RDATA_V1_8710B 0x03EC +#define REG_DBI_FLAG_V1_8710B 0x03F0 +#define REG_MDIO_V1_8710B 0x03F4 +#define REG_PCIE_MIX_CFG_8710B 0x03F8 +#define REG_HCI_MIX_CFG_8710B 0x03FC + +/* ----------------------------------------------------- + * + * 0x0400h ~ 0x047Fh Protocol Configuration + * + * ----------------------------------------------------- */ +#define REG_VOQ_INFORMATION_8710B 0x0400 +#define REG_VIQ_INFORMATION_8710B 0x0404 +#define REG_BEQ_INFORMATION_8710B 0x0408 +#define REG_BKQ_INFORMATION_8710B 0x040C +#define REG_MGQ_INFORMATION_8710B 0x0410 +#define REG_HGQ_INFORMATION_8710B 0x0414 +#define REG_BCNQ_INFORMATION_8710B 0x0418 +#define REG_TXPKT_EMPTY_8710B 0x041A + +#define REG_FWHW_TXQ_CTRL_8710B 0x0420 +#define REG_HWSEQ_CTRL_8710B 0x0423 +#define REG_TXPKTBUF_BCNQ_BDNY_8710B 0x0424 +#define REG_TXPKTBUF_MGQ_BDNY_8710B 0x0425 +#define REG_LIFECTRL_CTRL_8710B 0x0426 +#define REG_MULTI_BCNQ_OFFSET_8710B 0x0427 +#define REG_SPEC_SIFS_8710B 0x0428 +#define REG_RL_8710B 0x042A +#define REG_TXBF_CTRL_8710B 0x042C +#define REG_DARFRC_8710B 0x0430 +#define REG_RARFRC_8710B 0x0438 +#define REG_RRSR_8710B 0x0440 +#define REG_ARFR0_8710B 0x0444 +#define REG_ARFR1_8710B 0x044C +#define REG_CCK_CHECK_8710B 0x0454 +#define REG_AMPDU_MAX_TIME_8710B 0x0456 +#define REG_TXPKTBUF_BCNQ_BDNY1_8710B 0x0457 + +#define REG_AMPDU_MAX_LENGTH_8710B 0x0458 +#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8710B 0x045D +#define REG_NDPA_OPT_CTRL_8710B 0x045F +#define REG_FAST_EDCA_CTRL_8710B 0x0460 +#define REG_RD_RESP_PKT_TH_8710B 0x0463 +#define REG_DATA_SC_8710B 0x0483 +#ifdef CONFIG_WOWLAN + #define REG_TXPKTBUF_IV_LOW 0x0484 + #define REG_TXPKTBUF_IV_HIGH 0x0488 +#endif +#define REG_TXRPT_START_OFFSET 0x04AC +#define REG_POWER_STAGE1_8710B 0x04B4 +#define REG_POWER_STAGE2_8710B 0x04B8 +#define REG_AMPDU_BURST_MODE_8710B 0x04BC +#define REG_PKT_VO_VI_LIFE_TIME_8710B 0x04C0 +#define REG_PKT_BE_BK_LIFE_TIME_8710B 0x04C2 +#define REG_STBC_SETTING_8710B 0x04C4 +#define REG_HT_SINGLE_AMPDU_8710B 0x04C7 +#define REG_PROT_MODE_CTRL_8710B 0x04C8 +#define REG_MAX_AGGR_NUM_8710B 0x04CA +#define REG_RTS_MAX_AGGR_NUM_8710B 0x04CB +#define REG_BAR_MODE_CTRL_8710B 0x04CC +#define REG_RA_TRY_RATE_AGG_LMT_8710B 0x04CF +#define REG_MACID_PKT_DROP0_8710B 0x04D0 +#define REG_MACID_PKT_SLEEP_8710B 0x04D4 + +/* ----------------------------------------------------- + * + * 0x0500h ~ 0x05FFh EDCA Configuration + * + * ----------------------------------------------------- */ +#define REG_EDCA_VO_PARAM_8710B 0x0500 +#define REG_EDCA_VI_PARAM_8710B 0x0504 +#define REG_EDCA_BE_PARAM_8710B 0x0508 +#define REG_EDCA_BK_PARAM_8710B 0x050C +#define REG_BCNTCFG_8710B 0x0510 +#define REG_PIFS_8710B 0x0512 +#define REG_RDG_PIFS_8710B 0x0513 +#define REG_SIFS_CTX_8710B 0x0514 +#define REG_SIFS_TRX_8710B 0x0516 +#define REG_AGGR_BREAK_TIME_8710B 0x051A +#define REG_SLOT_8710B 0x051B +#define REG_TX_PTCL_CTRL_8710B 0x0520 +#define REG_TXPAUSE_8710B 0x0522 +#define REG_DIS_TXREQ_CLR_8710B 0x0523 +#define REG_RD_CTRL_8710B 0x0524 +/* + * Format for offset 540h-542h: + * [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. + * [7:4]: Reserved. + * [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. + * [23:20]: Reserved + * Description: + * | + * |<--Setup--|--Hold------------>| + * --------------|---------------------- + * | + * TBTT + * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. + * Described by Designer Tim and Bruce, 2011-01-14. + * */ +#define REG_TBTT_PROHIBIT_8710B 0x0540 +#define REG_RD_NAV_NXT_8710B 0x0544 +#define REG_NAV_PROT_LEN_8710B 0x0546 +#define REG_BCN_CTRL_8710B 0x0550 +#define REG_BCN_CTRL_1_8710B 0x0551 +#define REG_MBID_NUM_8710B 0x0552 +#define REG_DUAL_TSF_RST_8710B 0x0553 +#define REG_BCN_INTERVAL_8710B 0x0554 +#define REG_DRVERLYINT_8710B 0x0558 +#define REG_BCNDMATIM_8710B 0x0559 +#define REG_ATIMWND_8710B 0x055A +#define REG_USTIME_TSF_8710B 0x055C +#define REG_BCN_MAX_ERR_8710B 0x055D +#define REG_RXTSF_OFFSET_CCK_8710B 0x055E +#define REG_RXTSF_OFFSET_OFDM_8710B 0x055F +#define REG_TSFTR_8710B 0x0560 +#define REG_CTWND_8710B 0x0572 +#define REG_SECONDARY_CCA_CTRL_8710B 0x0577 +#define REG_PSTIMER_8710B 0x0580 +#define REG_TIMER0_8710B 0x0584 +#define REG_TIMER1_8710B 0x0588 +#define REG_ACMHWCTRL_8710B 0x05C0 +#define REG_SCH_TXCMD_8710B 0x05F8 + +/* ----------------------------------------------------- + * + * 0x0600h ~ 0x07FFh WMAC Configuration + * + * ----------------------------------------------------- */ +#define REG_MAC_CR_8710B 0x0600 +#define REG_TCR_8710B 0x0604 +#define REG_RCR_8710B 0x0608 +#define REG_RX_PKT_LIMIT_8710B 0x060C +#define REG_RX_DLK_TIME_8710B 0x060D +#define REG_RX_DRVINFO_SZ_8710B 0x060F + +#define REG_MACID_8710B 0x0610 +#define REG_BSSID_8710B 0x0618 +#define REG_MAR_8710B 0x0620 +#define REG_MBIDCAMCFG_8710B 0x0628 +#define REG_WOWLAN_GTK_DBG1 0x630 +#define REG_WOWLAN_GTK_DBG2 0x634 + +#define REG_USTIME_EDCA_8710B 0x0638 +#define REG_MAC_SPEC_SIFS_8710B 0x063A +#define REG_RESP_SIFP_CCK_8710B 0x063C +#define REG_RESP_SIFS_OFDM_8710B 0x063E +#define REG_ACKTO_8710B 0x0640 +#define REG_CTS2TO_8710B 0x0641 +#define REG_EIFS_8710B 0x0642 + +#define REG_NAV_UPPER_8710B 0x0652 /* unit of 128 */ +#define REG_TRXPTCL_CTL_8710B 0x0668 + +/* Security */ +#define REG_CAMCMD_8710B 0x0670 +#define REG_CAMWRITE_8710B 0x0674 +#define REG_CAMREAD_8710B 0x0678 +#define REG_CAMDBG_8710B 0x067C +#define REG_SECCFG_8710B 0x0680 + +/* Power */ +#define REG_WOW_CTRL_8710B 0x0690 +#define REG_PS_RX_INFO_8710B 0x0692 +#define REG_UAPSD_TID_8710B 0x0693 +#define REG_WKFMCAM_CMD_8710B 0x0698 +#define REG_WKFMCAM_NUM_8710B 0x0698 +#define REG_WKFMCAM_RWD_8710B 0x069C +#define REG_RXFLTMAP0_8710B 0x06A0 +#define REG_RXFLTMAP1_8710B 0x06A2 +#define REG_RXFLTMAP2_8710B 0x06A4 +#define REG_BCN_PSR_RPT_8710B 0x06A8 +#define REG_BT_COEX_TABLE_8710B 0x06C0 +#define REG_BFMER0_INFO_8710B 0x06E4 +#define REG_BFMER1_INFO_8710B 0x06EC +#define REG_CSI_RPT_PARAM_BW20_8710B 0x06F4 +#define REG_CSI_RPT_PARAM_BW40_8710B 0x06F8 +#define REG_CSI_RPT_PARAM_BW80_8710B 0x06FC + +/* Hardware Port 2 */ +#define REG_MACID1_8710B 0x0700 +#define REG_BSSID1_8710B 0x0708 +#define REG_BFMEE_SEL_8710B 0x0714 +#define REG_SND_PTCL_CTRL_8710B 0x0718 + +/* LTR */ +#define REG_LTR_CTRL_BASIC_8710B 0x07A4 +#define REG_LTR_IDLE_LATENCY_V1_8710B 0x0798 +#define REG_LTR_ACTIVE_LATENCY_V1_8710B 0x079C + +/* LTE_COEX */ +#define REG_LTECOEX_CTRL 0x07C0 +#define REG_LTECOEX_WRITE_DATA 0x07C4 +#define REG_LTECOEX_READ_DATA 0x07C8 +#define REG_LTECOEX_PATH_CONTROL 0x70 + +/* Other */ +#define REG_USB_ACCESS_TIMEOUT 0xFE4C + +/* ----------------------------------------------------- + * SYSON_REG_SPEC + * ----------------------------------------------------- */ +#define SYSON_REG_BASE_ADDR_8710B 0x40000000 +#define REG_SYS_XTAL_CTRL0 0x0060 +#define REG_SYS_SYSTEM_CFG0 0x1F0 +#define REG_SYS_SYSTEM_CFG1 0x1F4 +#define REG_SYS_SYSTEM_CFG2 0x1F8 +#define REG_SYS_EEPROM_CTRL0 0x0E0 + + +/* ----------------------------------------------------- + * Indirect_R/W_SPEC + * ----------------------------------------------------- */ +#define NORMAL_REG_READ_OFFSET 0x83000000 +#define NORMAL_REG_WRITE_OFFSET 0x84000000 +#define EFUSE_READ_OFFSET 0x85000000 +#define EFUSE_WRITE_OFFSET 0x86000000 + + +/* ----------------------------------------------------- + * PAGE0_WLANON_REG_SPEC + * ----------------------------------------------------- */ +#define PAGE0_OFFSET 0x0 // WLANON_PAGE0_REG needs to add an offset. + + + +/* **************************************************************************** + * 8723 Regsiter Bit and Content definition + * **************************************************************************** */ + + /* ----------------------------------------------------- + * REG_SYS_SYSTEM_CFG0 + * ----------------------------------------------------- */ +#define BIT_RTL_ID_8710B BIT(16) + +#define BIT_MASK_CHIP_VER_8710B 0xf +#define BIT_GET_CHIP_VER_8710B(x) ((x) & BIT_MASK_CHIP_VER_8710B) + +#define BIT_SHIFT_VENDOR_ID_8710B 4 +#define BIT_MASK_VENDOR_ID_8710B 0xf +#define BIT_GET_VENDOR_ID_8710B(x) (((x) >> BIT_SHIFT_VENDOR_ID_8710B) & BIT_MASK_VENDOR_ID_8710B) + + /* ----------------------------------------------------- + * REG_SYS_SYSTEM_CFG1 + * ----------------------------------------------------- */ +#define BIT_SPSLDO_SEL_8710B BIT(25) + + /* ----------------------------------------------------- + * REG_SYS_SYSTEM_CFG2 + * ----------------------------------------------------- */ +#define BIT_MASK_RF_RL_ID_8710B 0xf +#define BIT_GET_RF_RL_ID_8710B(x) ((x) & BIT_MASK_RF_RL_ID_8710B) + + /* ----------------------------------------------------- + * REG_SYS_SYSTEM_CFG2 + * ----------------------------------------------------- */ +#define BIT_EERPOMSEL_8710B BIT(4) +#define BIT_AUTOLOAD_SUS_8710B BIT(5) + + + /* ----------------------------------------------------- + * Other + * ----------------------------------------------------- */ + + +#define BIT_USB_RXDMA_AGG_EN BIT(31) +#define RXDMA_AGG_MODE_EN BIT(1) + +#ifdef CONFIG_WOWLAN + #define RXPKT_RELEASE_POLL BIT(16) + #define RXDMA_IDLE BIT(17) + #define RW_RELEASE_EN BIT(18) +#endif + +/* 2 HSISR + * interrupt mask which needs to clear */ +#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ + HSISR_SPS_OCP_INT |\ + HSISR_RON_INT |\ + HSISR_PDNINT |\ + HSISR_GPIO9_INT) + +#ifdef CONFIG_RF_POWER_TRIM + #ifdef CONFIG_RTL8710B + #define EEPROM_RF_GAIN_OFFSET 0xC1 + #endif + + #define EEPROM_RF_GAIN_VAL 0x1F6 +#endif /*CONFIG_RF_POWER_TRIM*/ + +#endif /* __RTL8710B_SPEC_H__ */ diff --git a/include/rtl8710b_sreset.h b/include/rtl8710b_sreset.h new file mode 100644 index 0000000..ac5c64e --- /dev/null +++ b/include/rtl8710b_sreset.h @@ -0,0 +1,24 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef _RTL8710B_SRESET_H_ +#define _RTL8710B_SRESET_H_ + +#include + +#ifdef DBG_CONFIG_ERROR_DETECT + extern void rtl8710b_sreset_xmit_status_check(_adapter *padapter); + extern void rtl8710b_sreset_linked_status_check(_adapter *padapter); +#endif +#endif diff --git a/include/rtl8710b_xmit.h b/include/rtl8710b_xmit.h new file mode 100644 index 0000000..a6b49cd --- /dev/null +++ b/include/rtl8710b_xmit.h @@ -0,0 +1,522 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTL8710B_XMIT_H__ +#define __RTL8710B_XMIT_H__ + + +#define MAX_TID (15) + + +#ifndef __INC_HAL8710BDESC_H +#define __INC_HAL8710BDESC_H + +#define RX_STATUS_DESC_SIZE_8710B 24 +#define RX_DRV_INFO_SIZE_UNIT_8710B 8 + + +/* DWORD 0 */ +#define SET_RX_STATUS_DESC_PKT_LEN_8710B(__pRxStatusDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) +#define SET_RX_STATUS_DESC_EOR_8710B(__pRxStatusDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) +#define SET_RX_STATUS_DESC_OWN_8710B(__pRxStatusDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) + +#define GET_RX_STATUS_DESC_PKT_LEN_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) +#define GET_RX_STATUS_DESC_CRC32_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) +#define GET_RX_STATUS_DESC_ICV_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) +#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) +#define GET_RX_STATUS_DESC_SECURITY_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) +#define GET_RX_STATUS_DESC_QOS_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) +#define GET_RX_STATUS_DESC_SHIFT_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) +#define GET_RX_STATUS_DESC_PHY_STATUS_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) +#define GET_RX_STATUS_DESC_SWDEC_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) +#define GET_RX_STATUS_DESC_EOR_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) +#define GET_RX_STATUS_DESC_OWN_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) + +/* DWORD 1 */ +#define GET_RX_STATUS_DESC_MACID_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) +#define GET_RX_STATUS_DESC_TID_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) +#define GET_RX_STATUS_DESC_AMSDU_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) +#define GET_RX_STATUS_DESC_RXID_MATCH_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) +#define GET_RX_STATUS_DESC_PAGGR_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) +#define GET_RX_STATUS_DESC_A1_FIT_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) +#define GET_RX_STATUS_DESC_CHKERR_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) +#define GET_RX_STATUS_DESC_IPVER_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) +#define GET_RX_STATUS_DESC_IS_TCPUDP__8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) +#define GET_RX_STATUS_DESC_CHK_VLD_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) +#define GET_RX_STATUS_DESC_PAM_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) +#define GET_RX_STATUS_DESC_PWR_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) +#define GET_RX_STATUS_DESC_MORE_DATA_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) +#define GET_RX_STATUS_DESC_MORE_FRAG_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) +#define GET_RX_STATUS_DESC_TYPE_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) +#define GET_RX_STATUS_DESC_MC_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) +#define GET_RX_STATUS_DESC_BC_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) + +/* DWORD 2 */ +#define GET_RX_STATUS_DESC_SEQ_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) +#define GET_RX_STATUS_DESC_FRAG_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) +#define GET_RX_STATUS_DESC_RX_IS_QOS_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) +#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) +#define GET_RX_STATUS_DESC_RPT_SEL_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) +#define GET_RX_STATUS_DESC_FCS_OK_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1) + +/* DWORD 3 */ +#define GET_RX_STATUS_DESC_RX_RATE_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) +#define GET_RX_STATUS_DESC_HTC_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) +#define GET_RX_STATUS_DESC_EOSP_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) +#define GET_RX_STATUS_DESC_BSSID_FIT_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) +#ifdef CONFIG_USB_RX_AGGREGATION +#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) +#endif +#define GET_RX_STATUS_DESC_PATTERN_MATCH_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) +#define GET_RX_STATUS_DESC_UNICAST_MATCH_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) +#define GET_RX_STATUS_DESC_MAGIC_MATCH_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) + +/* DWORD 6 */ +#define GET_RX_STATUS_DESC_MATCH_ID_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 7) + +/* DWORD 5 */ +#define GET_RX_STATUS_DESC_TSFL_8710B(__pRxStatusDesc) \ + LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) + +#define GET_RX_STATUS_DESC_BUFF_ADDR_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) +#define GET_RX_STATUS_DESC_BUFF_ADDR64_8710B(__pRxDesc) \ + LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) + +#define SET_RX_STATUS_DESC_BUFF_ADDR_8710B(__pRxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) + + +/* Dword 0, rsvd: bit26, bit28 */ +#define GET_TX_DESC_OWN_8710B(__pTxDesc)\ + LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) + +#define SET_TX_DESC_PKT_SIZE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) +#define SET_TX_DESC_OFFSET_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) +#define SET_TX_DESC_BMC_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) +#define SET_TX_DESC_HTC_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) +#define SET_TX_DESC_AMSDU_PAD_EN_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) +#define SET_TX_DESC_NO_ACM_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) +#define SET_TX_DESC_GF_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) + +/* Dword 1 */ +#define SET_TX_DESC_MACID_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) +#define SET_TX_DESC_QUEUE_SEL_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) +#define SET_TX_DESC_RDG_NAV_EXT_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) +#define SET_TX_DESC_LSIG_TXOP_EN_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) +#define SET_TX_DESC_PIFS_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) +#define SET_TX_DESC_RATE_ID_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) +#define SET_TX_DESC_EN_DESC_ID_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) +#define SET_TX_DESC_SEC_TYPE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) +#define SET_TX_DESC_PKT_OFFSET_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) +#define SET_TX_DESC_MORE_DATA_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) + +/* Dword 2 remove P_AID, G_ID field*/ +#define SET_TX_DESC_CCA_RTS_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) +#define SET_TX_DESC_AGG_ENABLE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) +#define SET_TX_DESC_RDG_ENABLE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) +#define SET_TX_DESC_NULL0_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) +#define SET_TX_DESC_NULL1_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) +#define SET_TX_DESC_BK_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) +#define SET_TX_DESC_MORE_FRAG_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) +#define SET_TX_DESC_RAW_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) +#define SET_TX_DESC_CCX_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) +#define SET_TX_DESC_AMPDU_DENSITY_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) +#define SET_TX_DESC_BT_INT_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) +#define SET_TX_DESC_FTM_EN_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 30, 1, __Value) + +/* Dword 3 */ +#define SET_TX_DESC_NAV_USE_HDR_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) +#define SET_TX_DESC_HWSEQ_SEL_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) +#define SET_TX_DESC_USE_RATE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) +#define SET_TX_DESC_DISABLE_RTS_FB_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) +#define SET_TX_DESC_DISABLE_FB_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) +#define SET_TX_DESC_CTS2SELF_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) +#define SET_TX_DESC_RTS_ENABLE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) +#define SET_TX_DESC_HW_RTS_ENABLE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) +#define SET_TX_DESC_PORT_ID_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 2, __Value) +#define SET_TX_DESC_USE_MAX_LEN_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) +#define SET_TX_DESC_MAX_AGG_NUM_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) +#define SET_TX_DESC_AMPDU_MAX_TIME_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) + +/* Dword 4 */ +#define SET_TX_DESC_TX_RATE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) +#define SET_TX_DESC_TX_TRY_RATE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) +#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) +#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) +#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) +#define SET_TX_DESC_DATA_RETRY_LIMIT_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) +#define SET_TX_DESC_RTS_RATE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) +#define SET_TX_DESC_PCTS_EN_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) +#define SET_TX_DESC_PCTS_MASK_IDX_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) + +/* Dword 5 */ +#define SET_TX_DESC_DATA_SC_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) +#define SET_TX_DESC_DATA_SHORT_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) +#define SET_TX_DESC_DATA_BW_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) +#define SET_TX_DESC_DATA_STBC_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) +#define SET_TX_DESC_RTS_STBC_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) +#define SET_TX_DESC_RTS_SHORT_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) +#define SET_TX_DESC_RTS_SC_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) +#define SET_TX_DESC_PATH_A_EN_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 1, __Value) +#define SET_TX_DESC_TXPWR_OF_SET_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) + +/* Dword 6 */ +#define SET_TX_DESC_SW_DEFINE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) +#define SET_TX_DESC_MBSSID_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) +#define SET_TX_DESC_RF_SEL_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) + +/* Dword 7 */ +#ifdef CONFIG_PCI_HCI +#define SET_TX_DESC_TX_BUFFER_SIZE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) +#endif + +#ifdef CONFIG_USB_HCI +#define SET_TX_DESC_TX_DESC_CHECKSUM_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) +#endif + +#ifdef CONFIG_SDIO_HCI +#define SET_TX_DESC_TX_TIMESTAMP_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value) +#endif + +#define SET_TX_DESC_USB_TXAGG_NUM_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) + +/* Dword 8 */ +#define SET_TX_DESC_RTS_RC_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) +#define SET_TX_DESC_BAR_RC_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) +#define SET_TX_DESC_DATA_RC_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) +#define SET_TX_DESC_HWSEQ_EN_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) +#define SET_TX_DESC_NEXTHEADPAGE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) +#define SET_TX_DESC_TAILPAGE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) + +/* Dword 9 */ +#define SET_TX_DESC_PADDING_LEN_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) +#define SET_TX_DESC_SEQ_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) +#define SET_TX_DESC_FINAL_DATA_RATE_8710B(__pTxDesc, __Value) \ + SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) + + +#define SET_EARLYMODE_PKTNUM_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) +#define SET_EARLYMODE_LEN0_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) +#define SET_EARLYMODE_LEN1_1_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) +#define SET_EARLYMODE_LEN1_2_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) +#define SET_EARLYMODE_LEN2_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) +#define SET_EARLYMODE_LEN3_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) + + +/*-----------------------------------------------------------------*/ +/* RTL8710B TX BUFFER DESC */ +/*-----------------------------------------------------------------*/ +#ifdef CONFIG_64BIT_DMA + #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu) + #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu) + #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu) + #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu) +#else + #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) + #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) + #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) + #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) /* 64 BIT mode only */ +#endif +/* ********************************************************* */ + +/* 64 bits -- 32 bits */ +/* ======= ======= */ +/* Dword 0 0 */ +#define SET_TX_BUFF_DESC_LEN_0_8710B(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) +#define SET_TX_BUFF_DESC_PSB_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) +#define SET_TX_BUFF_DESC_OWN_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) + +/* Dword 1 1 */ +#define SET_TX_BUFF_DESC_ADDR_LOW_0_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) +#define GET_TX_BUFF_DESC_ADDR_LOW_0_8710B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) +/* Dword 2 NA */ +#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 0, __Value) +#ifdef CONFIG_64BIT_DMA + #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8710B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32) +#else + #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8710B(__pTxDesc) 0 +#endif +/* Dword 3 NA */ +/* RESERVED 0 */ +/* Dword 4 2 */ +#define SET_TX_BUFF_DESC_LEN_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 1, __Value) +#define SET_TX_BUFF_DESC_AMSDU_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 1, __Value) +/* Dword 5 3 */ +#define SET_TX_BUFF_DESC_ADDR_LOW_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 1, __Value) +/* Dword 6 NA */ +#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 1, __Value) +/* Dword 7 NA */ +/*RESERVED 0 */ +/* Dword 8 4 */ +#define SET_TX_BUFF_DESC_LEN_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 2, __Value) +#define SET_TX_BUFF_DESC_AMSDU_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 2, __Value) +/* Dword 9 5 */ +#define SET_TX_BUFF_DESC_ADDR_LOW_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 2, __Value) +/* Dword 10 NA */ +#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 2, __Value) +/* Dword 11 NA */ +/*RESERVED 0 */ +/* Dword 12 6 */ +#define SET_TX_BUFF_DESC_LEN_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 3, __Value) +#define SET_TX_BUFF_DESC_AMSDU_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 3, __Value) +/* Dword 13 7 */ +#define SET_TX_BUFF_DESC_ADDR_LOW_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 3, __Value) +/* Dword 14 NA */ +#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 3, __Value) +/* Dword 15 NA */ +/*RESERVED 0 */ + + +#endif +/* ----------------------------------------------------------- + * + * Rate + * + * ----------------------------------------------------------- + * CCK Rates, TxHT = 0 */ +#define DESC8710B_RATE1M 0x00 +#define DESC8710B_RATE2M 0x01 +#define DESC8710B_RATE5_5M 0x02 +#define DESC8710B_RATE11M 0x03 + +/* OFDM Rates, TxHT = 0 */ +#define DESC8710B_RATE6M 0x04 +#define DESC8710B_RATE9M 0x05 +#define DESC8710B_RATE12M 0x06 +#define DESC8710B_RATE18M 0x07 +#define DESC8710B_RATE24M 0x08 +#define DESC8710B_RATE36M 0x09 +#define DESC8710B_RATE48M 0x0a +#define DESC8710B_RATE54M 0x0b + +/* MCS Rates, TxHT = 1 */ +#define DESC8710B_RATEMCS0 0x0c +#define DESC8710B_RATEMCS1 0x0d +#define DESC8710B_RATEMCS2 0x0e +#define DESC8710B_RATEMCS3 0x0f +#define DESC8710B_RATEMCS4 0x10 +#define DESC8710B_RATEMCS5 0x11 +#define DESC8710B_RATEMCS6 0x12 +#define DESC8710B_RATEMCS7 0x13 +#define DESC8710B_RATEMCS8 0x14 +#define DESC8710B_RATEMCS9 0x15 +#define DESC8710B_RATEMCS10 0x16 +#define DESC8710B_RATEMCS11 0x17 +#define DESC8710B_RATEMCS12 0x18 +#define DESC8710B_RATEMCS13 0x19 +#define DESC8710B_RATEMCS14 0x1a +#define DESC8710B_RATEMCS15 0x1b +#define DESC8710B_RATEVHTSS1MCS0 0x2c +#define DESC8710B_RATEVHTSS1MCS1 0x2d +#define DESC8710B_RATEVHTSS1MCS2 0x2e +#define DESC8710B_RATEVHTSS1MCS3 0x2f +#define DESC8710B_RATEVHTSS1MCS4 0x30 +#define DESC8710B_RATEVHTSS1MCS5 0x31 +#define DESC8710B_RATEVHTSS1MCS6 0x32 +#define DESC8710B_RATEVHTSS1MCS7 0x33 +#define DESC8710B_RATEVHTSS1MCS8 0x34 +#define DESC8710B_RATEVHTSS1MCS9 0x35 +#define DESC8710B_RATEVHTSS2MCS0 0x36 +#define DESC8710B_RATEVHTSS2MCS1 0x37 +#define DESC8710B_RATEVHTSS2MCS2 0x38 +#define DESC8710B_RATEVHTSS2MCS3 0x39 +#define DESC8710B_RATEVHTSS2MCS4 0x3a +#define DESC8710B_RATEVHTSS2MCS5 0x3b +#define DESC8710B_RATEVHTSS2MCS6 0x3c +#define DESC8710B_RATEVHTSS2MCS7 0x3d +#define DESC8710B_RATEVHTSS2MCS8 0x3e +#define DESC8710B_RATEVHTSS2MCS9 0x3f + + +#define RX_HAL_IS_CCK_RATE_8710B(pDesc)\ + (GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE1M || \ + GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE2M || \ + GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE5_5M || \ + GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE11M) + +#ifdef CONFIG_TRX_BD_ARCH + struct tx_desc; +#endif + +void rtl8710b_cal_txdesc_chksum(struct tx_desc *ptxdesc); +void rtl8710b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); +void rtl8710b_fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); +void rtl8710b_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); +void rtl8710b_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); +void rtl8710b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); + +#if defined(CONFIG_CONCURRENT_MODE) + void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); +#endif +void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); + +#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) + s32 rtl8710bs_init_xmit_priv(PADAPTER padapter); + void rtl8710bs_free_xmit_priv(PADAPTER padapter); + s32 rtl8710bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); + s32 rtl8710bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); + s32 rtl8710bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); + s32 rtl8710bs_xmit_buf_handler(PADAPTER padapter); + thread_return rtl8710bs_xmit_thread(thread_context context); + #define hal_xmit_handler rtl8710bs_xmit_buf_handler +#endif + +#ifdef CONFIG_USB_HCI + s32 rtl8710bu_xmit_buf_handler(PADAPTER padapter); + #define hal_xmit_handler rtl8710bu_xmit_buf_handler + s32 rtl8710bu_init_xmit_priv(PADAPTER padapter); + void rtl8710bu_free_xmit_priv(PADAPTER padapter); + s32 rtl8710bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); + s32 rtl8710bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); + s32 rtl8710bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); + void rtl8710bu_xmit_tasklet(void *priv); + s32 rtl8710bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); + void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); +#endif + +#ifdef CONFIG_PCI_HCI + s32 rtl8710be_init_xmit_priv(PADAPTER padapter); + void rtl8710be_free_xmit_priv(PADAPTER padapter); + struct xmit_buf *rtl8710be_dequeue_xmitbuf(struct rtw_tx_ring *ring); + void rtl8710be_xmitframe_resume(_adapter *padapter); + s32 rtl8710be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); + s32 rtl8710be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); + s32 rtl8710be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); + void rtl8710be_xmit_tasklet(void *priv); +#endif + +u8 BWMapping_8710B(PADAPTER Adapter, struct pkt_attrib *pattrib); +u8 SCMapping_8710B(PADAPTER Adapter, struct pkt_attrib *pattrib); + +#endif diff --git a/include/rtl8723b_cmd.h b/include/rtl8723b_cmd.h index f284a05..9da5633 100644 --- a/include/rtl8723b_cmd.h +++ b/include/rtl8723b_cmd.h @@ -113,7 +113,6 @@ enum h2c_cmd_8723B { #define SET_8723B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_8723B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) #define SET_8723B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define SET_8723B_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) #define GET_8723B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) @@ -159,7 +158,7 @@ enum h2c_cmd_8723B { #define SET_8723B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) /* _BT_FW_PATCH_0x6A */ -#define SET_8723B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) +#define SET_8723B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) @@ -177,7 +176,6 @@ enum h2c_cmd_8723B { /* host message to firmware cmd */ void rtl8723b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); void rtl8723b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -void rtl8723b_set_rssi_cmd(PADAPTER padapter, u8 *param); void rtl8723b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); /* s32 rtl8723b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ void rtl8723b_set_FwPsTuneParam_cmd(PADAPTER padapter); diff --git a/include/rtl8723b_hal.h b/include/rtl8723b_hal.h index 6e9ac57..8483502 100644 --- a/include/rtl8723b_hal.h +++ b/include/rtl8723b_hal.h @@ -106,18 +106,10 @@ typedef struct _RT_8723B_FIRMWARE_HDR { /* Note: We will divide number of page equally for each queue other than public queue! */ /* For General Reserved Page Number(Beacon Queue is reserved page) - * Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 */ -#define BCNQ_PAGE_NUM_8723B 0x08 -#ifdef CONFIG_CONCURRENT_MODE - #define BCNQ1_PAGE_NUM_8723B 0x08 /* 0x04 */ -#else - #define BCNQ1_PAGE_NUM_8723B 0x00 -#endif + * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8723B + * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ +#define BCNQ_PAGE_NUM_8723B (MAX_BEACON_LEN / PAGE_SIZE_TX_8723B + 6) /*0x08*/ -#ifdef CONFIG_PNO_SUPPORT - #undef BCNQ1_PAGE_NUM_8723B - #define BCNQ1_PAGE_NUM_8723B 0x00 /* 0x04 */ -#endif /* For WoWLan , more reserved page * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1,PNO: 6 @@ -138,7 +130,7 @@ typedef struct _RT_8723B_FIRMWARE_HDR { #define AP_WOWLAN_PAGE_NUM_8723B 0x02 #endif -#define TX_TOTAL_PAGE_NUMBER_8723B (0xFF - BCNQ_PAGE_NUM_8723B - BCNQ1_PAGE_NUM_8723B - WOWLAN_PAGE_NUM_8723B) +#define TX_TOTAL_PAGE_NUMBER_8723B (0xFF - BCNQ_PAGE_NUM_8723B - WOWLAN_PAGE_NUM_8723B) #define TX_PAGE_BOUNDARY_8723B (TX_TOTAL_PAGE_NUMBER_8723B + 1) #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B TX_TOTAL_PAGE_NUMBER_8723B @@ -224,9 +216,9 @@ void Hal_EfuseParseCustomerID_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoL void Hal_EfuseParseAntennaDiversity_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseXtal_8723B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); void Hal_EfuseParseThermalMeter_8723B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); -VOID Hal_EfuseParsePackageType_8723B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -VOID Hal_EfuseParseVoltage_8723B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -VOID Hal_EfuseParseBoardType_8723B(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); +void Hal_EfuseParsePackageType_8723B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParseVoltage_8723B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +void Hal_EfuseParseBoardType_8723B(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc); void init_hal_spec_8723b(_adapter *adapter); @@ -258,7 +250,7 @@ void rtl8723b_stop_thread(_adapter *padapter); void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); #endif #ifdef CONFIG_MP_INCLUDED -int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); +int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); #endif void CCX_FwC2HTxRpt_8723b(PADAPTER padapter, u8 *pdata, u8 len); @@ -271,12 +263,12 @@ u8 HwRateToMRate8723B(u8 rate); #ifdef CONFIG_PCI_HCI BOOLEAN InterruptRecognized8723BE(PADAPTER Adapter); - VOID UpdateInterruptMask8723BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); + void UpdateInterruptMask8723BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); #endif #ifdef CONFIG_GPIO_API int rtl8723b_GpioFuncCheck(PADAPTER adapter, u8 gpio_num); -VOID rtl8723b_GpioMultiFuncReset(PADAPTER adapter, u8 gpio_num); +void rtl8723b_GpioMultiFuncReset(PADAPTER adapter, u8 gpio_num); #endif #endif diff --git a/include/rtl8723b_recv.h b/include/rtl8723b_recv.h index cf5e18b..5e92713 100644 --- a/include/rtl8723b_recv.h +++ b/include/rtl8723b_recv.h @@ -22,22 +22,18 @@ #if defined(CONFIG_USB_HCI) #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ - #else - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - #ifdef CONFIG_PLATFORM_MSTAR - #define MAX_RECVBUF_SZ (8192) /* 8K */ - #else - #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ - #endif - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ + /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ + /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ + #ifdef CONFIG_PLATFORM_MSTAR + #define MAX_RECVBUF_SZ (8192) /* 8K */ #else - #define MAX_RECVBUF_SZ (4000) /* about 4K */ + #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ #endif + /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ + #else + #define MAX_RECVBUF_SZ (4000) /* about 4K */ #endif #endif /* !MAX_RECVBUF_SZ */ diff --git a/include/rtl8723b_rf.h b/include/rtl8723b_rf.h index 6325ad5..040c166 100644 --- a/include/rtl8723b_rf.h +++ b/include/rtl8723b_rf.h @@ -15,11 +15,11 @@ #ifndef __RTL8723B_RF_H__ #define __RTL8723B_RF_H__ -int PHY_RF6052_Config8723B(IN PADAPTER Adapter); +int PHY_RF6052_Config8723B(PADAPTER Adapter); -VOID +void PHY_RF6052SetBandwidth8723B( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth); + PADAPTER Adapter, + enum channel_width Bandwidth); #endif diff --git a/include/rtl8723b_xmit.h b/include/rtl8723b_xmit.h index 1364951..22b3bac 100644 --- a/include/rtl8723b_xmit.h +++ b/include/rtl8723b_xmit.h @@ -184,13 +184,14 @@ #define SET_TX_DESC_ANTSEL_D_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) /* Dword 7 */ - #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) + #ifdef CONFIG_PCI_HCI #define SET_TX_DESC_TX_BUFFER_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) - #else + #endif + #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) #define SET_TX_DESC_TX_DESC_CHECKSUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) #endif #define SET_TX_DESC_USB_TXAGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) - #if (DEV_BUS_TYPE == RT_SDIO_INTERFACE) + #ifdef CONFIG_SDIO_HCI #define SET_TX_DESC_SDIO_TXSEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) #endif diff --git a/include/rtl8723d_cmd.h b/include/rtl8723d_cmd.h index c90b8ea..41c6cb9 100644 --- a/include/rtl8723d_cmd.h +++ b/include/rtl8723d_cmd.h @@ -101,7 +101,6 @@ enum h2c_cmd_8723D { #define SET_8723D_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_8723D_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) #define SET_8723D_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define SET_8723D_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) #define GET_8723D_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) @@ -147,7 +146,7 @@ enum h2c_cmd_8723D { #define SET_8723D_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) /* _BT_FW_PATCH_0x6A */ -#define SET_8723D_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) +#define SET_8723D_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) #define SET_8723D_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) #define SET_8723D_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_8723D_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) diff --git a/include/rtl8723d_hal.h b/include/rtl8723d_hal.h index 7ebf666..d18e9ab 100644 --- a/include/rtl8723d_hal.h +++ b/include/rtl8723d_hal.h @@ -111,18 +111,10 @@ typedef struct _RT_8723D_FIRMWARE_HDR { /* Note: We will divide number of page equally for each queue other than public queue! */ /* For General Reserved Page Number(Beacon Queue is reserved page) - * Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 */ -#define BCNQ_PAGE_NUM_8723D 0x08 -#ifdef CONFIG_CONCURRENT_MODE - #define BCNQ1_PAGE_NUM_8723D 0x08 /* 0x04 */ -#else - #define BCNQ1_PAGE_NUM_8723D 0x00 -#endif + * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8723D + * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ -#ifdef CONFIG_PNO_SUPPORT - #undef BCNQ1_PAGE_NUM_8723D - #define BCNQ1_PAGE_NUM_8723D 0x00 /* 0x04 */ -#endif +#define BCNQ_PAGE_NUM_8723D (MAX_BEACON_LEN/PAGE_SIZE_TX_8723D + 6) /*0x08*/ /* For WoWLan , more reserved page * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6 @@ -144,7 +136,7 @@ typedef struct _RT_8723D_FIRMWARE_HDR { #endif #define TX_TOTAL_PAGE_NUMBER_8723D\ - (0xFF - BCNQ_PAGE_NUM_8723D - BCNQ1_PAGE_NUM_8723D - WOWLAN_PAGE_NUM_8723D) + (0xFF - BCNQ_PAGE_NUM_8723D - WOWLAN_PAGE_NUM_8723D) #define TX_PAGE_BOUNDARY_8723D (TX_TOTAL_PAGE_NUMBER_8723D + 1) #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723D TX_TOTAL_PAGE_NUMBER_8723D @@ -240,8 +232,6 @@ void Hal_EfuseParseBTCoexistInfo_8723D(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseEEPROMVer_8723D(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParsePackageType_8723D(PADAPTER pAdapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseChnlPlan_8723D(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseCustomerID_8723D(PADAPTER padapter, @@ -252,9 +242,9 @@ void Hal_EfuseParseXtal_8723D(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); void Hal_EfuseParseThermalMeter_8723D(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); -VOID Hal_EfuseParseVoltage_8723D(PADAPTER pAdapter, +void Hal_EfuseParseVoltage_8723D(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -VOID Hal_EfuseParseBoardType_8723D(PADAPTER Adapter, +void Hal_EfuseParseBoardType_8723D(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); void rtl8723d_set_hal_ops(struct hal_ops *pHalFunc); @@ -287,7 +277,7 @@ void rtl8723d_stop_thread(_adapter *padapter); void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); #endif #ifdef CONFIG_MP_INCLUDED -int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); +int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); #endif void CCX_FwC2HTxRpt_8723d(PADAPTER padapter, u8 *pdata, u8 len); @@ -306,7 +296,7 @@ void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); #ifdef CONFIG_PCI_HCI BOOLEAN InterruptRecognized8723DE(PADAPTER Adapter); - VOID UpdateInterruptMask8723DE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); + void UpdateInterruptMask8723DE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); u16 get_txbd_rw_reg(u16 ff_hwaddr); #endif diff --git a/include/rtl8723d_recv.h b/include/rtl8723d_recv.h index 03539a8..f19ad69 100644 --- a/include/rtl8723d_recv.h +++ b/include/rtl8723d_recv.h @@ -22,22 +22,18 @@ #if defined(CONFIG_USB_HCI) #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ - #else - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - #ifdef CONFIG_PLATFORM_MSTAR - #define MAX_RECVBUF_SZ (8192) /* 8K */ - #else - #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ - #endif - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ + /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ + /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ + #ifdef CONFIG_PLATFORM_MSTAR + #define MAX_RECVBUF_SZ (8192) /* 8K */ #else - #define MAX_RECVBUF_SZ (4000) /* about 4K */ + #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ #endif + /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ + #else + #define MAX_RECVBUF_SZ (4000) /* about 4K */ #endif #endif /* !MAX_RECVBUF_SZ */ diff --git a/include/rtl8723d_rf.h b/include/rtl8723d_rf.h index 733eb0a..4a0a7cf 100644 --- a/include/rtl8723d_rf.h +++ b/include/rtl8723d_rf.h @@ -15,7 +15,7 @@ #ifndef __RTL8723D_RF_H__ #define __RTL8723D_RF_H__ -int PHY_RF6052_Config8723D(IN PADAPTER pdapter); +int PHY_RF6052_Config8723D(PADAPTER pdapter); -void PHY_RF6052SetBandwidth8723D(IN PADAPTER Adapter, IN enum channel_width Bandwidth); +void PHY_RF6052SetBandwidth8723D(PADAPTER Adapter, enum channel_width Bandwidth); #endif diff --git a/include/rtl8723d_xmit.h b/include/rtl8723d_xmit.h index b825c83..b1636ad 100644 --- a/include/rtl8723d_xmit.h +++ b/include/rtl8723d_xmit.h @@ -286,13 +286,17 @@ SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) /* Dword 7 */ -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) +#ifdef CONFIG_PCI_HCI #define SET_TX_DESC_TX_BUFFER_SIZE_8723D(__pTxDesc, __Value) \ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#elif(DEV_BUS_TYPE == RT_USB_INTERFACE) +#endif + +#ifdef CONFIG_USB_HCI #define SET_TX_DESC_TX_DESC_CHECKSUM_8723D(__pTxDesc, __Value) \ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#else +#endif + +#ifdef CONFIG_SDIO_HCI #define SET_TX_DESC_TX_TIMESTAMP_8723D(__pTxDesc, __Value) \ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value) #endif diff --git a/include/rtl8812a_cmd.h b/include/rtl8812a_cmd.h index 17dd2dd..a89a628 100644 --- a/include/rtl8812a_cmd.h +++ b/include/rtl8812a_cmd.h @@ -84,7 +84,6 @@ struct H2C_SS_RFOFF_PARAM { #define SET_8812_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_8812_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) #define SET_8812_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define SET_8812_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) #define GET_8812_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) @@ -148,11 +147,11 @@ void rtl8812_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); #define GET_8812_C2H_TX_RPT_FINAL_DATA_RATE(_Header) LE_BITS_TO_1BYTE((_Header + 5), 0, 8) /* BT_FW_PATCH */ -#define SET_8812_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) -#define SET_8812_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((pu1Byte)(__pH2CCmd)+2, 0, 8, __Value) -#define SET_8812_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((pu1Byte)(__pH2CCmd)+3, 0, 8, __Value) -#define SET_8812_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((pu1Byte)(__pH2CCmd)+4, 0, 8, __Value) -#define SET_8812_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((pu1Byte)(__pH2CCmd)+5, 0, 8, __Value) +#define SET_8812_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) +#define SET_8812_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((u8 *)(__pH2CCmd)+2, 0, 8, __Value) +#define SET_8812_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((u8 *)(__pH2CCmd)+3, 0, 8, __Value) +#define SET_8812_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((u8 *)(__pH2CCmd)+4, 0, 8, __Value) +#define SET_8812_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((u8 *)(__pH2CCmd)+5, 0, 8, __Value) s32 c2h_handler_8812a(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); diff --git a/include/rtl8812a_dm.h b/include/rtl8812a_dm.h index 584f6d3..21a9aba 100644 --- a/include/rtl8812a_dm.h +++ b/include/rtl8812a_dm.h @@ -15,13 +15,13 @@ #ifndef __RTL8812A_DM_H__ #define __RTL8812A_DM_H__ -void rtl8812_init_dm_priv(IN PADAPTER Adapter); -void rtl8812_deinit_dm_priv(IN PADAPTER Adapter); -void rtl8812_InitHalDm(IN PADAPTER Adapter); -void rtl8812_HalDmWatchDog(IN PADAPTER Adapter); +void rtl8812_init_dm_priv(PADAPTER Adapter); +void rtl8812_deinit_dm_priv(PADAPTER Adapter); +void rtl8812_InitHalDm(PADAPTER Adapter); +void rtl8812_HalDmWatchDog(PADAPTER Adapter); -/* VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); */ +/* void rtl8192c_dm_CheckTXPowerTracking(PADAPTER Adapter); */ -/* void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); */ +/* void rtl8192c_dm_RF_Saving(PADAPTER pAdapter, u8 bForceInNormal); */ #endif diff --git a/include/rtl8812a_hal.h b/include/rtl8812a_hal.h index 77ffe4b..3082c67 100644 --- a/include/rtl8812a_hal.h +++ b/include/rtl8812a_hal.h @@ -135,7 +135,11 @@ typedef struct _RT_FIRMWARE_8812 { #endif #define RX_DMA_BOUNDARY_8812 (MAX_RX_DMA_BUFFER_SIZE_8812 - RX_DMA_RESERVED_SIZE_8812 - 1) -#define BCNQ_PAGE_NUM_8812 0x07 +#define PAGE_SIZE_TX_8812A PAGE_SIZE_512 + +/* Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8812A + * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ +#define BCNQ_PAGE_NUM_8812 (MAX_BEACON_LEN / PAGE_SIZE_TX_8812A + 6) /*0x07*/ /* For WoWLan , more reserved page * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, AOAC rpt: 1,PNO: 6 @@ -193,12 +197,11 @@ typedef struct _RT_FIRMWARE_8812 { #endif #define RX_DMA_BOUNDARY_8821 (MAX_RX_DMA_BUFFER_SIZE_8821 - RX_DMA_RESERVED_SIZE_8821 - 1) -#define BCNQ_PAGE_NUM_8821 0x08 -#ifdef CONFIG_CONCURRENT_MODE - #define BCNQ1_PAGE_NUM_8821 0x04 -#else - #define BCNQ1_PAGE_NUM_8821 0x00 -#endif +/* Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8821A + * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ + +#define BCNQ_PAGE_NUM_8821 (MAX_BEACON_LEN / PAGE_SIZE_TX_8821A + 6) /*0x08*/ + /* For WoWLan , more reserved page * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 */ @@ -208,7 +211,7 @@ typedef struct _RT_FIRMWARE_8812 { #define WOWLAN_PAGE_NUM_8821 0x00 #endif -#define TX_TOTAL_PAGE_NUMBER_8821 (0xFF - BCNQ_PAGE_NUM_8821 - BCNQ1_PAGE_NUM_8821 - WOWLAN_PAGE_NUM_8821) +#define TX_TOTAL_PAGE_NUMBER_8821 (0xFF - BCNQ_PAGE_NUM_8821 - WOWLAN_PAGE_NUM_8821) #define TX_PAGE_BOUNDARY_8821 (TX_TOTAL_PAGE_NUMBER_8821 + 1) /* #define TX_PAGE_BOUNDARY_WOWLAN_8821 0xE0 */ @@ -344,26 +347,23 @@ void init_hal_spec_8821a(_adapter *adapter); u32 upload_txpktbuf_8812au(_adapter *adapter, u8 *buf, u32 buflen); -/* register */ -void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); - void rtl8812_start_thread(PADAPTER padapter); void rtl8812_stop_thread(PADAPTER padapter); #ifdef CONFIG_PCI_HCI BOOLEAN InterruptRecognized8812AE(PADAPTER Adapter); -VOID UpdateInterruptMask8812AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -VOID InitTRXDescHwAddress8812AE(PADAPTER Adapter); +void UpdateInterruptMask8812AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); +void InitTRXDescHwAddress8812AE(PADAPTER Adapter); #endif #ifdef CONFIG_BT_COEXIST void rtl8812a_combo_card_WifiOnlyHwInit(PADAPTER Adapter); #endif -VOID +void Hal_PatchwithJaguar_8812( - IN PADAPTER Adapter, - IN RT_MEDIA_STATUS MediaStatus + PADAPTER Adapter, + RT_MEDIA_STATUS MediaStatus ); #endif /* __RTL8188E_HAL_H__ */ diff --git a/include/rtl8812a_recv.h b/include/rtl8812a_recv.h index bf1d4b6..5fa06e5 100644 --- a/include/rtl8812a_recv.h +++ b/include/rtl8812a_recv.h @@ -18,27 +18,23 @@ #if defined(CONFIG_USB_HCI) #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ - #else - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER - #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ - #else - #define MAX_RECVBUF_SZ (32768) /*32k*/ - #endif - /* #define MAX_RECVBUF_SZ (24576) */ /* 24k */ - /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - /* #define MAX_RECVBUF_SZ (15360) */ /* 15k < 16k */ - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ - #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 - #undef MAX_RECVBUF_SZ - #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ - #endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */ + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER + #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ #else - #define MAX_RECVBUF_SZ (4000) /* about 4K */ + #define MAX_RECVBUF_SZ (32768) /*32k*/ #endif + /* #define MAX_RECVBUF_SZ (24576) */ /* 24k */ + /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ + /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ + /* #define MAX_RECVBUF_SZ (15360) */ /* 15k < 16k */ + /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ + #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 + #undef MAX_RECVBUF_SZ + #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ + #endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */ + #else + #define MAX_RECVBUF_SZ (4000) /* about 4K */ #endif #endif /* !MAX_RECVBUF_SZ */ diff --git a/include/rtl8812a_rf.h b/include/rtl8812a_rf.h index 9a7b60e..c5d9aae 100644 --- a/include/rtl8812a_rf.h +++ b/include/rtl8812a_rf.h @@ -15,14 +15,14 @@ #ifndef __RTL8812A_RF_H__ #define __RTL8812A_RF_H__ -VOID +void PHY_RF6052SetBandwidth8812( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth); + PADAPTER Adapter, + enum channel_width Bandwidth); int PHY_RF6052_Config_8812( - IN PADAPTER Adapter); + PADAPTER Adapter); #endif/* __RTL8188E_RF_H__ */ diff --git a/include/rtl8814a_cmd.h b/include/rtl8814a_cmd.h index 53c2828..67813fb 100644 --- a/include/rtl8814a_cmd.h +++ b/include/rtl8814a_cmd.h @@ -31,7 +31,6 @@ #define SET_8814A_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_8814A_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) #define SET_8814A_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define SET_8814A_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) #define GET_8814A_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) @@ -140,7 +139,6 @@ void rtl8814_set_wowlan_cmd(_adapter *padapter, u8 enable); void rtl8814_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); void rtl8814_set_FwPwrMode_cmd(PADAPTER padapter, u8 PSMode); u8 GetTxBufferRsvdPageNum8814(_adapter *padapter, bool wowlan); -u8 rtl8814_set_rssi_cmd(_adapter *padapter, u8 *param); void rtl8814_req_txrpt_cmd(PADAPTER padapter, u8 macid); #ifdef CONFIG_TDLS @@ -157,6 +155,9 @@ Set_RA_LDPC_8814( s32 c2h_handler_8814a(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); +#ifdef CONFIG_BT_COEXIST +void rtl8814a_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); +#endif /* CONFIG_BT_COEXIST */ #ifdef CONFIG_P2P_PS void rtl8814_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); #endif /* CONFIG_P2P */ diff --git a/include/rtl8814a_dm.h b/include/rtl8814a_dm.h index afbc8be..9762c1b 100644 --- a/include/rtl8814a_dm.h +++ b/include/rtl8814a_dm.h @@ -15,9 +15,9 @@ #ifndef __RTL8814A_DM_H__ #define __RTL8814A_DM_H__ -void rtl8814_init_dm_priv(IN PADAPTER Adapter); -void rtl8814_deinit_dm_priv(IN PADAPTER Adapter); -void rtl8814_InitHalDm(IN PADAPTER Adapter); -void rtl8814_HalDmWatchDog(IN PADAPTER Adapter); +void rtl8814_init_dm_priv(PADAPTER Adapter); +void rtl8814_deinit_dm_priv(PADAPTER Adapter); +void rtl8814_InitHalDm(PADAPTER Adapter); +void rtl8814_HalDmWatchDog(PADAPTER Adapter); #endif diff --git a/include/rtl8814a_hal.h b/include/rtl8814a_hal.h index e8b0876..1bc518d 100644 --- a/include/rtl8814a_hal.h +++ b/include/rtl8814a_hal.h @@ -51,7 +51,10 @@ typedef struct _RT_FIRMWARE_8814 { } RT_FIRMWARE_8814, *PRT_FIRMWARE_8814; #define PAGE_SIZE_TX_8814 PAGE_SIZE_128 -#define BCNQ_PAGE_NUM_8814 0x08 +/* BCN rsvd_page_num = MAX_BEACON_LEN / PAGE_SIZE_TX_8814 + * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ + +#define BCNQ_PAGE_NUM_8814 (MAX_BEACON_LEN / PAGE_SIZE_TX_8814 + 6) /*0x08*/ #define Rtl8814A_NIC_PWR_ON_FLOW rtl8814A_power_on_flow #define Rtl8814A_NIC_RF_OFF_FLOW rtl8814A_radio_off_flow @@ -231,13 +234,13 @@ extern char *rtw_fw_mp_bt_file_path; s32 FirmwareDownload8814A(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); void InitializeFirmwareVars8814(PADAPTER padapter); -VOID +void Hal_InitEfuseVars_8814A( - IN PADAPTER Adapter + PADAPTER Adapter ); s32 InitLLTTable8814A( - IN PADAPTER Adapter + PADAPTER Adapter ); @@ -247,9 +250,9 @@ void InitRDGSetting8814A(PADAPTER padapter); /* EFuse */ u8 GetEEPROMSize8814A(PADAPTER padapter); -VOID hal_InitPGData_8814A( - IN PADAPTER padapter, - IN OUT u8 *PROMContent +void hal_InitPGData_8814A( + PADAPTER padapter, + u8 *PROMContent ); void hal_ReadPROMVersion8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); @@ -260,28 +263,28 @@ void hal_ReadChannelPlan8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFai void hal_EfuseParseXtal_8814A(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void hal_ReadAntennaDiversity8814A(PADAPTER pAdapter, u8 *PROMContent, BOOLEAN AutoLoadFail); void hal_Read_TRX_antenna_8814A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -VOID hal_ReadAmplifierType_8814A( - IN PADAPTER Adapter +void hal_ReadAmplifierType_8814A( + PADAPTER Adapter ); -VOID hal_ReadPAType_8814A( - IN PADAPTER Adapter, - IN u8 *PROMContent, - IN BOOLEAN AutoloadFail, - OUT u8 *pPAType, - OUT u8 *pLNAType +void hal_ReadPAType_8814A( + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail, + u8 *pPAType, + u8 *pLNAType ); void hal_ReadPowerTrackingType_8814A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); void hal_GetRxGainOffset_8814A( PADAPTER Adapter, - pu1Byte PROMContent, + u8 *PROMContent, BOOLEAN AutoloadFail ); void Hal_EfuseParseKFreeData_8814A( - IN PADAPTER Adapter, - IN u8 *PROMContent, - IN BOOLEAN AutoloadFail); + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail); void hal_ReadRFEType_8814A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); void hal_EfuseParseBTCoexistInfo8814A(PADAPTER Adapter, u8 *hwinfo, BOOLEAN AutoLoadFail); @@ -309,22 +312,19 @@ u8 GetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); void rtl8814_set_hal_ops(struct hal_ops *pHalFunc); void init_hal_spec_8814a(_adapter *adapter); -/* register */ -void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); -void SetBcnCtrlReg(PADAPTER Adapter, u8 SetBits, u8 ClearBits); void rtl8814_start_thread(PADAPTER padapter); void rtl8814_stop_thread(PADAPTER padapter); #ifdef CONFIG_PCI_HCI BOOLEAN InterruptRecognized8814AE(PADAPTER Adapter); - VOID UpdateInterruptMask8814AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); - VOID InitMAC_TRXBD_8814AE(PADAPTER Adapter); + void UpdateInterruptMask8814AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); + void InitMAC_TRXBD_8814AE(PADAPTER Adapter); u16 get_txbd_rw_reg(u16 ff_hwaddr); #endif #ifdef CONFIG_BT_COEXIST - void rtl8812a_combo_card_WifiOnlyHwInit(PADAPTER Adapter); + void rtl8814a_combo_card_WifiOnlyHwInit(PADAPTER Adapter); #endif #endif /* __RTL8188E_HAL_H__ */ diff --git a/include/rtl8814a_recv.h b/include/rtl8814a_recv.h index c6792d8..68da633 100644 --- a/include/rtl8814a_recv.h +++ b/include/rtl8814a_recv.h @@ -18,23 +18,19 @@ #if defined(CONFIG_USB_HCI) #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ - #else - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - #ifdef CONFIG_PLATFORM_MSTAR - #define MAX_RECVBUF_SZ (8192) /* 8K */ - #else - #define MAX_RECVBUF_SZ (32768) /* 32k */ - #endif - /* #define MAX_RECVBUF_SZ (24576) */ /* 24k */ - /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - /* #define MAX_RECVBUF_SZ (15360) */ /* 15k < 16k */ - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + #ifdef CONFIG_PLATFORM_MSTAR + #define MAX_RECVBUF_SZ (8192) /* 8K */ #else - #define MAX_RECVBUF_SZ (4000) /* about 4K */ + #define MAX_RECVBUF_SZ (32768) /* 32k */ #endif + /* #define MAX_RECVBUF_SZ (24576) */ /* 24k */ + /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ + /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ + /* #define MAX_RECVBUF_SZ (15360) */ /* 15k < 16k */ + /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ + #else + #define MAX_RECVBUF_SZ (4000) /* about 4K */ #endif #endif /* !MAX_RECVBUF_SZ */ diff --git a/include/rtl8814a_rf.h b/include/rtl8814a_rf.h index e374439..9bb099c 100644 --- a/include/rtl8814a_rf.h +++ b/include/rtl8814a_rf.h @@ -15,14 +15,14 @@ #ifndef __RTL8814A_RF_H__ #define __RTL8814A_RF_H__ -VOID +void PHY_RF6052SetBandwidth8814A( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth); + PADAPTER Adapter, + enum channel_width Bandwidth); int PHY_RF6052_Config_8814A( - IN PADAPTER Adapter); + PADAPTER Adapter); #endif/* __RTL8188E_RF_H__ */ diff --git a/include/rtl8814a_spec.h b/include/rtl8814a_spec.h index 917b961..616f5fd 100644 --- a/include/rtl8814a_spec.h +++ b/include/rtl8814a_spec.h @@ -555,7 +555,7 @@ /* * 9. Security Control Registers (Offset: ) * */ -#define RWCAM_8814A REG_CAMCMD_8814A /* IN 8190 Data Sheet is called CAMcmd */ +#define RWCAM_8814A REG_CAMCMD_8814A /* 8190 Data Sheet is called CAMcmd */ #define WCAMI_8814A REG_CAMWRITE_8814A /* Software write CAM input content */ #define RCAMO_8814A REG_CAMREAD_8814A /* Software read/write CAM config */ #define CAMDBG_8814A REG_CAMDBG_8814A diff --git a/include/rtl8814a_xmit.h b/include/rtl8814a_xmit.h index 5b1e966..f1fcc65 100644 --- a/include/rtl8814a_xmit.h +++ b/include/rtl8814a_xmit.h @@ -218,9 +218,10 @@ typedef struct txdescriptor_8814 { /* Dword 7 */ -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) +#ifdef CONFIG_PCI_HCI #define SET_TX_DESC_TX_BUFFER_SIZE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#else +#endif +#if defined(CONFIG_SDIO_HCI)|| defined(CONFIG_USB_HCI) #define SET_TX_DESC_TX_DESC_CHECKSUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) #endif #define SET_TX_DESC_NTX_MAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 20, 4, __Value) @@ -233,9 +234,10 @@ typedef struct txdescriptor_8814 { #define SET_TX_DESC_DATA_RC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) #define SET_TX_DESC_EN_HWEXSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 14, 1, __Value) #define SET_TX_DESC_HWSEQ_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -#if (DEV_BUS_TYPE != RT_SDIO_INTERFACE) +#if defined(CONFIG_PCI_HCI)|| defined(CONFIG_USB_HCI) #define SET_TX_DESC_NEXT_HEAD_PAGE_L_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) -#else +#endif +#ifdef CONFIG_SDIO_HCI #define SET_TX_DESC_SDIO_SEQ_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) /* 20130415 KaiYuan add for 8814AS */ #endif #define SET_TX_DESC_TAIL_PAGE_L_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) @@ -295,14 +297,14 @@ void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, u8 *ptxdesc); u8 SCMapping_8814( - IN PADAPTER Adapter, - IN struct pkt_attrib *pattrib + PADAPTER Adapter, + struct pkt_attrib *pattrib ); u8 BWMapping_8814( - IN PADAPTER Adapter, - IN struct pkt_attrib *pattrib + PADAPTER Adapter, + struct pkt_attrib *pattrib ); diff --git a/include/rtl8821c_hal.h b/include/rtl8821c_hal.h index 75d8750..41d222e 100644 --- a/include/rtl8821c_hal.h +++ b/include/rtl8821c_hal.h @@ -75,6 +75,7 @@ void init_hal_spec_rtl8821c(PADAPTER); void rtl8821c_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */ void rtl8821c_mp_config_rfpath(PADAPTER); /* hal_mp.c */ #endif +void rtl8821c_dl_rsvd_page(PADAPTER adapter, u8 mstatus); #ifdef CONFIG_PCI_HCI u16 get_txbd_rw_reg(u16 q_idx); diff --git a/include/rtl8821c_spec.h b/include/rtl8821c_spec.h index 26218df..949f349 100644 --- a/include/rtl8821c_spec.h +++ b/include/rtl8821c_spec.h @@ -29,7 +29,7 @@ #define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */ #define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */ #define REG_BCN_CTRL_1 REG_BCN_CTRL_CLINT0_8821C/* hal_com.c */ -#define REG_TSFTR1 REG_FREERUN_CNT_8821C /* hal_com.c */ + #define REG_WOWLAN_WAKE_REASON 0x01C7 #define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8821C @@ -187,8 +187,8 @@ struct hw_port_reg { u32 net_type; /*reg_offset*/ u8 net_type_shift; - u32 macaddr; /*reg_offset*/ - u32 bssid; /*reg_offset*/ + u32 macaddr; /*reg_offset*/ + u32 bssid; /*reg_offset*/ u32 bcn_ctl; /*reg_offset*/ u32 tsf_rst; /*reg_offset*/ u8 tsf_rst_bit; @@ -196,6 +196,7 @@ struct hw_port_reg { u8 bcn_space_shift; u16 bcn_space_mask; u32 ps_aid; /*reg_offset*/ + u32 ta; /*reg_offset*/ }; #endif /* __RTL8192E_SPEC_H__ */ diff --git a/include/rtl8822b_hal.h b/include/rtl8822b_hal.h index 3cf482e..076f824 100644 --- a/include/rtl8822b_hal.h +++ b/include/rtl8822b_hal.h @@ -38,7 +38,7 @@ #define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */ #define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */ #define REG_BCN_CTRL_1 REG_BCN_CTRL_CLINT0_8822B /* hal_com.c */ -#define REG_TSFTR1 REG_FREERUN_CNT_8822B /* hal_com.c */ + #define REG_WOWLAN_WAKE_REASON 0x01C7 /* hal_com.c */ #define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8822B /* hal_com.c */ @@ -217,6 +217,7 @@ void rtl8822b_init_hal_spec(PADAPTER); /* hal/hal_com.c */ void rtl8822b_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */ void rtl8822b_mp_config_rfpath(PADAPTER); /* hal_mp.c */ #endif +void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus); #ifdef CONFIG_USB_HCI #include diff --git a/include/rtl8822bu_hal.h b/include/rtl8822bu_hal.h index 39618c9..a35773f 100644 --- a/include/rtl8822bu_hal.h +++ b/include/rtl8822bu_hal.h @@ -34,22 +34,18 @@ /* recv_buffer must be large than usb agg size */ #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) - #else /* !PLATFORM_OS_CE */ - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 #define MAX_RECVBUF_SZ (15360) /* 15k */ #elif defined(CONFIG_PLATFORM_HISILICON) /* use 16k to workaround for HISILICON platform */ #define MAX_RECVBUF_SZ (16384) - #else - #define MAX_RECVBUF_SZ (32768) - #endif #else - #define MAX_RECVBUF_SZ (4000) + #define MAX_RECVBUF_SZ (32768) #endif - #endif /* PLATFORM_OS_CE */ + #else + #define MAX_RECVBUF_SZ (4000) + #endif #endif /* !MAX_RECVBUF_SZ */ /* rtl8822bu_ops.c */ diff --git a/include/rtl8822c_hal.h b/include/rtl8822c_hal.h new file mode 100755 index 0000000..2231b21 --- /dev/null +++ b/include/rtl8822c_hal.h @@ -0,0 +1,242 @@ +/****************************************************************************** + * + * Copyright(c) 2015 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef _RTL8822C_HAL_H_ +#define _RTL8822C_HAL_H_ + +#include /* BIT(x) */ +#include /* PADAPTER */ +#include "../hal/halmac/halmac_api.h" /* MAC REG definition */ + +#ifdef CONFIG_SUPPORT_TRX_SHARED +#define DEF_RECVBUF_SZ 24576 /* RX 24K */ +#if (DFT_TRX_SHARE_MODE == 1) +#define RX_FIFO_EXPANDING 40960 /* RX= 24K+40K=64K , TX=256K-40K=216K */ +#elif (DFT_TRX_SHARE_MODE == 2) +#define RX_FIFO_EXPANDING 65536 /* RX= 24K+40K+24=88K , TX=256K-40K-24K=192K */ +#elif (DFT_TRX_SHARE_MODE ==3) +#define RX_FIFO_EXPANDING 106496 /* RX= 24K+40K+24+40K=128K , TX=256K-40K-24K-40K=152K */ +#elif (DFT_TRX_SHARE_MODE ==4) +#define RX_FIFO_EXPANDING 131072 /* RX= 24K+40K+24+40K+24K=128K , TX=256K-40K-24K-40K-24K=128K */ +#else +#define RX_FIFO_EXPANDING 0 +#endif +#define MAX_RECVBUF_SZ (DEF_RECVBUF_SZ + RX_FIFO_EXPANDING) +#else /* !CONFIG_SUPPORT_TRX_SHARED */ +#define MAX_RECVBUF_SZ 24576 /* 24KB, TX: 256KB */ +#endif /* !CONFIG_SUPPORT_TRX_SHARED */ + +/* + * MAC Register definition + */ +#define REG_AFE_XTAL_CTRL REG_AFE_CTRL1_8822C /* hal_com.c & phydm */ +#define REG_LEDCFG0 REG_LED_CFG_8822C /* rtw_mp.c */ +#define MSR (REG_CR_8822C + 2) /* rtw_mp.c & hal_com.c */ +#define MSR1 REG_CR_EXT_8822C /* rtw_mp.c & hal_com.c */ +#define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */ +#define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */ +#define REG_BCN_CTRL_1 REG_BCN_CTRL_CLINT0_8822C /* hal_com.c */ + +#define REG_WOWLAN_WAKE_REASON 0x01C7 /* hal_com.c */ +#define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8822C /* hal_com.c */ + +/* RXERR_RPT, for rtw_mp.c */ +#define RXERR_TYPE_OFDM_PPDU 0 +#define RXERR_TYPE_OFDM_FALSE_ALARM 2 +#define RXERR_TYPE_OFDM_MPDU_OK 0 +#define RXERR_TYPE_OFDM_MPDU_FAIL 1 +#define RXERR_TYPE_CCK_PPDU 3 +#define RXERR_TYPE_CCK_FALSE_ALARM 5 +#define RXERR_TYPE_CCK_MPDU_OK 3 +#define RXERR_TYPE_CCK_MPDU_FAIL 4 +#define RXERR_TYPE_HT_PPDU 8 +#define RXERR_TYPE_HT_FALSE_ALARM 9 +#define RXERR_TYPE_HT_MPDU_TOTAL 6 +#define RXERR_TYPE_HT_MPDU_OK 6 +#define RXERR_TYPE_HT_MPDU_FAIL 7 +#define RXERR_TYPE_RX_FULL_DROP 10 + +#define RXERR_COUNTER_MASK BIT_MASK_RPT_COUNTER_8822C +#define RXERR_RPT_RST BIT_RXERR_RPT_RST_8822C +#define _RXERR_RPT_SEL(type) (BIT_RXERR_RPT_SEL_V1_3_0_8822C(type) \ + | ((type & 0x10) ? BIT_RXERR_RPT_SEL_V1_4_8822C : 0)) + +/* + * BB Register definition + */ +#define rPMAC_Reset 0x100 /* hal_mp.c */ + +#define rFPGA0_RFMOD 0x800 +#define rFPGA0_TxInfo 0x804 +#define rOFDMCCKEN_Jaguar 0x808 /* hal_mp.c */ +#define rFPGA0_TxGainStage 0x80C /* phydm only */ +#define rFPGA0_XA_HSSIParameter1 0x820 /* hal_mp.c */ +#define rFPGA0_XA_HSSIParameter2 0x824 /* hal_mp.c */ +#define rFPGA0_XB_HSSIParameter1 0x828 /* hal_mp.c */ +#define rFPGA0_XB_HSSIParameter2 0x82C /* hal_mp.c */ +#define rTxAGC_B_Rate18_06 0x830 +#define rTxAGC_B_Rate54_24 0x834 +#define rTxAGC_B_CCK1_55_Mcs32 0x838 +#define rCCAonSec_Jaguar 0x838 /* hal_mp.c */ +#define rTxAGC_B_Mcs03_Mcs00 0x83C +#define rTxAGC_B_Mcs07_Mcs04 0x848 +#define rTxAGC_B_Mcs11_Mcs08 0x84C +#define rFPGA0_XA_RFInterfaceOE 0x860 +#define rFPGA0_XB_RFInterfaceOE 0x864 +#define rTxAGC_B_Mcs15_Mcs12 0x868 +#define rTxAGC_B_CCK11_A_CCK2_11 0x86C +#define rFPGA0_XAB_RFInterfaceSW 0x870 +#define rFPGA0_XAB_RFParameter 0x878 +#define rFPGA0_AnalogParameter4 0x88C /* hal_mp.c & phydm */ +#define rFPGA0_XB_LSSIReadBack 0x8A4 /* phydm */ +#define rHSSIRead_Jaguar 0x8B0 /* RF read addr (rtl8822c_phy.c) */ + +#define rC_TxScale_Jaguar2 0x181C /* Pah_C TX scaling factor (hal_mp.c) */ +#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C (hal_mp.c) */ + +#define rFPGA1_TxInfo 0x90C /* hal_mp.c */ +#define rSingleTone_ContTx_Jaguar 0x914 /* hal_mp.c */ +/* TX BeamForming */ +#define REG_BB_TX_PATH_SEL_1_8822C 0x93C /* rtl8822c_phy.c */ +#define REG_BB_TX_PATH_SEL_2_8822C 0x940 /* rtl8822c_phy.c */ + +/* TX BeamForming */ +#define REG_BB_TXBF_ANT_SET_BF1_8822C 0x19AC /* rtl8822c_phy.c */ +#define REG_BB_TXBF_ANT_SET_BF0_8822C 0x19B4 /* rtl8822c_phy.c */ + +#define rCCK0_System 0xA00 +#define rCCK0_AFESetting 0xA04 + +#define rCCK0_DSPParameter2 0xA1C +#define rCCK0_TxFilter1 0xA20 +#define rCCK0_TxFilter2 0xA24 +#define rCCK0_DebugPort 0xA28 +#define rCCK0_FalseAlarmReport 0xA2C + +#define rD_TxScale_Jaguar2 0x1A1C /* Path_D TX scaling factor (hal_mp.c) */ +#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D (hal_mp.c) */ + +#define rOFDM0_TRxPathEnable 0xC04 +#define rOFDM0_TRMuxPar 0xC08 +#define rA_TxScale_Jaguar 0xC1C /* Pah_A TX scaling factor (hal_mp.c) */ +#define rOFDM0_RxDetector1 0xC30 /* rtw_mp.c */ +#define rOFDM0_ECCAThreshold 0xC4C /* phydm only */ +#define rOFDM0_XAAGCCore1 0xC50 /* phydm only */ +#define rA_IGI_Jaguar 0xC50 /* Initial Gain for path-A (hal_mp.c) */ +#define rOFDM0_XBAGCCore1 0xC58 /* phydm only */ +#define rOFDM0_XATxIQImbalance 0xC80 /* phydm only */ +#define rA_LSSIWrite_Jaguar 0xC90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */ + +#define rOFDM1_LSTF 0xD00 +#define rOFDM1_TRxPathEnable 0xD04 /* hal_mp.c */ +#define rA_PIRead_Jaguar 0xD04 /* RF readback with PI (rtl8822c_phy.c) */ +#define rA_SIRead_Jaguar 0xD08 /* RF readback with SI (rtl8822c_phy.c) */ +#define rB_PIRead_Jaguar 0xD44 /* RF readback with PI (rtl8822c_phy.c) */ +#define rB_SIRead_Jaguar 0xD48 /* RF readback with SI (rtl8822c_phy.c) */ + +#define rTxAGC_A_Rate18_06 0xE00 +#define rTxAGC_A_Rate54_24 0xE04 +#define rTxAGC_A_CCK1_Mcs32 0xE08 +#define rTxAGC_A_Mcs03_Mcs00 0xE10 +#define rTxAGC_A_Mcs07_Mcs04 0xE14 +#define rTxAGC_A_Mcs11_Mcs08 0xE18 +#define rTxAGC_A_Mcs15_Mcs12 0xE1C +#define rB_TxScale_Jaguar 0xE1C /* Path_B TX scaling factor (hal_mp.c) */ +#define rB_IGI_Jaguar 0xE50 /* Initial Gain for path-B (hal_mp.c) */ +#define rB_LSSIWrite_Jaguar 0xE90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */ +/* RFE */ +#define rA_RFE_Pinmux_Jaguar 0xCB0 /* hal_mp.c */ +#define rB_RFE_Pinmux_Jaguar 0xEB0 /* Path_B RFE control pinmux */ +#define rA_RFE_Inv_Jaguar 0xCB4 /* Path_A RFE cotrol */ +#define rB_RFE_Inv_Jaguar 0xEB4 /* Path_B RFE control */ +#define rA_RFE_Jaguar 0xCB8 /* Path_A RFE cotrol */ +#define rB_RFE_Jaguar 0xEB8 /* Path_B RFE control */ +#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */ +#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */ +#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */ +#define bMask_RFEInv_Jaguar 0x3FF00000 +#define bMask_AntselPathFollow_Jaguar 0x00030000 + +#define rC_RFE_Pinmux_Jaguar 0x18B4 /* Path_C RFE cotrol pinmux*/ +#define rD_RFE_Pinmux_Jaguar 0x1AB4 /* Path_D RFE cotrol pinmux*/ +#define rA_RFE_Sel_Jaguar2 0x1990 + +/* Page1(0x100) */ +#define bBBResetB 0x100 + +/* Page8(0x800) */ +#define bCCKEn 0x1000000 +#define bOFDMEn 0x2000000 +/* Reg 0x80C rFPGA0_TxGainStage */ +#define bXBTxAGC 0xF00 +#define bXCTxAGC 0xF000 +#define bXDTxAGC 0xF0000 + +/* PageA(0xA00) */ +#define bCCKBBMode 0x3 + +#define bCCKScramble 0x8 +#define bCCKTxRate 0x3000 + +/* General */ +#define bMaskByte0 0xFF /* mp, rtw_odm.c & phydm */ +#define bMaskByte1 0xFF00 /* hal_mp.c & phydm */ +#define bMaskByte2 0xFF0000 /* hal_mp.c & phydm */ +#define bMaskByte3 0xFF000000 /* hal_mp.c & phydm */ +#define bMaskHWord 0xFFFF0000 /* hal_com.c, rtw_mp.c */ +#define bMaskLWord 0x0000FFFF /* mp, hal_com.c & phydm */ +#define bMaskDWord 0xFFFFFFFF /* mp, hal, rtw_odm.c & phydm */ + +#define bEnable 0x1 /* hal_mp.c, rtw_mp.c */ +#define bDisable 0x0 /* rtw_mp.c */ + +#define MAX_STALL_TIME 50 /* unit: us, hal_com_phycfg.c */ + +#define Rx_Smooth_Factor 20 /* phydm only */ + +/* + * RF Register definition + */ +#define RF_AC 0x00 +#define RF_AC_Jaguar 0x00 /* hal_mp.c */ +#define RF_CHNLBW 0x18 /* rtl8822c_phy.c */ +#define RF_ModeTableAddr 0x30 /* rtl8822c_phy.c */ +#define RF_ModeTableData0 0x31 /* rtl8822c_phy.c */ +#define RF_ModeTableData1 0x32 /* rtl8822c_phy.c */ +#define RF_0x52 0x52 +#define RF_WeLut_Jaguar 0xEF /* rtl8822c_phy.c */ + +/* rtw_lps_state_chk()@hal_com.c */ +#define BIT_PWRBIT_OW_EN BIT_WMAC_TCRPWRMGT_HWDATA_EN_8822C + +/* General Functions */ +void rtl8822c_init_hal_spec(PADAPTER); /* hal/hal_com.c */ + +#ifdef CONFIG_MP_INCLUDED +/* MP Functions */ +#include /* struct mp_priv */ +void rtl8822c_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */ +void rtl8822c_mp_config_rfpath(PADAPTER); /* hal_mp.c */ +#endif +void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus); + +#ifdef CONFIG_USB_HCI +#include +#elif defined(CONFIG_SDIO_HCI) +#include +#elif defined(CONFIG_PCI_HCI) +#include +#endif + +#endif /* _RTL8822C_HAL_H_ */ diff --git a/include/rtl8822ce_hal.h b/include/rtl8822ce_hal.h new file mode 100755 index 0000000..f56566e --- /dev/null +++ b/include/rtl8822ce_hal.h @@ -0,0 +1,27 @@ +/****************************************************************************** + * + * Copyright(c) 2015 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef _RTL8822CE_HAL_H_ +#define _RTL8822CE_HAL_H_ + +#include /* PADAPTER */ + +#define RT_BCN_INT_MASKS (BIT20 | BIT25 | BIT26 | BIT16) + +/* rtl8822ce_ops.c */ +void UpdateInterruptMask8822CE(PADAPTER, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); +u16 get_txbd_rw_reg(u16 q_idx); + + +#endif /* _RTL8822CE_HAL_H_ */ diff --git a/include/rtl8822cs_hal.h b/include/rtl8822cs_hal.h new file mode 100755 index 0000000..3e54b2a --- /dev/null +++ b/include/rtl8822cs_hal.h @@ -0,0 +1,31 @@ +/****************************************************************************** + * + * Copyright(c) 2015 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef _RTL8822CS_HAL_H_ +#define _RTL8822CS_HAL_H_ + +#include /* PADAPTER */ + +/* rtl8822cs_ops.c */ +void rtl8822cs_set_hal_ops(PADAPTER); + +#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) +void rtl8822cs_disable_interrupt_but_cpwm2(PADAPTER adapter); +#endif + +/* rtl8822cs_xmit.c */ +s32 rtl8822cs_dequeue_writeport(PADAPTER); +#define _dequeue_writeport(a) rtl8822cs_dequeue_writeport(a) + +#endif /* _RTL8822CS_HAL_H_ */ diff --git a/include/rtl8822cu_hal.h b/include/rtl8822cu_hal.h new file mode 100755 index 0000000..ba2e36e --- /dev/null +++ b/include/rtl8822cu_hal.h @@ -0,0 +1,61 @@ +/****************************************************************************** + * + * Copyright(c) 2015 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef _RTL8822CU_HAL_H_ +#define _RTL8822CU_HAL_H_ + +#ifdef CONFIG_USB_HCI + #include /* PADAPTER */ + + #ifdef CONFIG_USB_HCI + #ifdef USB_PACKET_OFFSET_SZ + #define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ) + #else + #define PACKET_OFFSET_SZ (8) + #endif + #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) + #endif + + /* undefine MAX_RECVBUF_SZ from rtl8822c_hal.h */ + #ifdef MAX_RECVBUF_SZ + #undef MAX_RECVBUF_SZ + #endif + + /* recv_buffer must be large than usb agg size */ + #ifndef MAX_RECVBUF_SZ + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 + #define MAX_RECVBUF_SZ (15360) /* 15k */ + #elif defined(CONFIG_PLATFORM_HISILICON) + /* use 16k to workaround for HISILICON platform */ + #define MAX_RECVBUF_SZ (16384) + #else + #define MAX_RECVBUF_SZ (32768) + #endif + #else + #define MAX_RECVBUF_SZ (4000) + #endif + #endif /* !MAX_RECVBUF_SZ */ + + /* rtl8822cu_ops.c */ + void rtl8822cu_set_hal_ops(PADAPTER padapter); + void rtl8822cu_set_hw_type(struct dvobj_priv *pdvobj); + + /* rtl8822cu_io.c */ + void rtl8822cu_set_intf_ops(struct _io_ops *pops); + +#endif /* CONFIG_USB_HCI */ + + +#endif /* _RTL8822CU_HAL_H_ */ diff --git a/include/rtw_android.h b/include/rtw_android.h index 253ee9a..f9d6b49 100644 --- a/include/rtw_android.h +++ b/include/rtw_android.h @@ -30,6 +30,7 @@ enum ANDROID_WIFI_CMD { ANDROID_WIFI_CMD_BTCOEXSCAN_START, ANDROID_WIFI_CMD_BTCOEXSCAN_STOP, ANDROID_WIFI_CMD_BTCOEXMODE, + ANDROID_WIFI_CMD_SETSUSPENDMODE, ANDROID_WIFI_CMD_SETSUSPENDOPT, ANDROID_WIFI_CMD_P2P_DEV_ADDR, ANDROID_WIFI_CMD_SETFWPATH, @@ -70,6 +71,7 @@ enum ANDROID_WIFI_CMD { #endif /* CONFIG_GTK_OL */ ANDROID_WIFI_CMD_P2P_DISABLE, ANDROID_WIFI_CMD_SET_AEK, + ANDROID_WIFI_CMD_EXT_AUTH_STATUS, ANDROID_WIFI_CMD_DRIVERVERSION, ANDROID_WIFI_CMD_MAX }; @@ -93,11 +95,11 @@ int wifi_set_power(int on, unsigned long msec); int wifi_get_mac_addr(unsigned char *buf); void *wifi_get_country_code(char *ccode); #else -static int rtw_android_wifictrl_func_add(void) +static inline int rtw_android_wifictrl_func_add(void) { return 0; } -static void rtw_android_wifictrl_func_del(void) {} +static inline void rtw_android_wifictrl_func_del(void) {} #endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */ #ifdef CONFIG_GPIO_WAKEUP diff --git a/include/rtw_ap.h b/include/rtw_ap.h index 8822015..7ad94d6 100644 --- a/include/rtw_ap.h +++ b/include/rtw_ap.h @@ -70,7 +70,8 @@ void stop_ap_mode(_adapter *padapter); #endif void rtw_ap_update_bss_chbw(_adapter *adapter, WLAN_BSSID_EX *bss, u8 ch, u8 bw, u8 offset); -bool rtw_ap_chbw_decision(_adapter *adapter, s16 req_ch, s8 req_bw, s8 req_offset, u8 *ch, u8 *bw, u8 *offset, u8 *chbw_allow); +u8 rtw_ap_chbw_decision(_adapter *adapter, u8 ifbmp, u8 excl_ifbmp + , s16 req_ch, s8 req_bw, s8 req_offset, u8 *ch, u8 *bw, u8 *offset, u8 *chbw_allow); #ifdef CONFIG_AUTO_AP_MODE void rtw_auto_ap_rx_msg_dump(_adapter *padapter, union recv_frame *precv_frame, u8 *ehdr_pos); @@ -92,8 +93,15 @@ void rtw_update_bmc_sta_tx_rate(_adapter *adapter); void rtw_process_ht_action_smps(_adapter *padapter, u8 *ta, u8 ctrl_field); void rtw_process_public_act_bsscoex(_adapter *padapter, u8 *pframe, uint frame_len); +#ifdef CONFIG_80211N_HT int rtw_ht_operation_update(_adapter *padapter); -u8 rtw_ap_sta_linking_state_check(_adapter *adapter); +#endif /* CONFIG_80211N_HT */ +u8 rtw_ap_sta_states_check(_adapter *adapter); + +#ifdef CONFIG_FW_HANDLE_TXBCN +#define rtw_ap_get_nums(adapter) (adapter_to_dvobj(adapter)->nr_ap_if) +bool rtw_ap_nums_check(_adapter *adapter); +#endif #ifdef CONFIG_SWTIMER_BASED_TXBCN void tx_beacon_handlder(struct dvobj_priv *pdvobj); diff --git a/include/rtw_beamforming.h b/include/rtw_beamforming.h index b5875d4..4c7f006 100644 --- a/include/rtw_beamforming.h +++ b/include/rtw_beamforming.h @@ -274,111 +274,7 @@ void rtw_bf_update_traffic(PADAPTER); IS_VHT_BEAMFORMEE(adapter)) #else /* !RTW_BEAMFORMING_VERSION_2 */ - -#if (BEAMFORMING_SUPPORT == 0) /*for diver defined beamforming*/ -#define BEAMFORMING_ENTRY_NUM 2 -#define GET_BEAMFORM_INFO(_pmlmepriv) ((struct beamforming_info *)(&(_pmlmepriv)->beamforming_info)) - - -typedef enum _BEAMFORMING_ENTRY_STATE { - BEAMFORMING_ENTRY_STATE_UNINITIALIZE, - BEAMFORMING_ENTRY_STATE_INITIALIZEING, - BEAMFORMING_ENTRY_STATE_INITIALIZED, - BEAMFORMING_ENTRY_STATE_PROGRESSING, - BEAMFORMING_ENTRY_STATE_PROGRESSED, -} BEAMFORMING_ENTRY_STATE, *PBEAMFORMING_ENTRY_STATE; - - -typedef enum _BEAMFORMING_STATE { - BEAMFORMING_STATE_IDLE, - BEAMFORMING_STATE_START, - BEAMFORMING_STATE_END, -} BEAMFORMING_STATE, *PBEAMFORMING_STATE; - - -typedef enum _BEAMFORMING_CAP { - BEAMFORMING_CAP_NONE = 0x0, - BEAMFORMER_CAP_HT_EXPLICIT = 0x1, - BEAMFORMEE_CAP_HT_EXPLICIT = 0x2, - BEAMFORMER_CAP_VHT_SU = 0x4, /* Self has er Cap, because Reg er & peer ee */ - BEAMFORMEE_CAP_VHT_SU = 0x8, /* Self has ee Cap, because Reg ee & peer er */ - BEAMFORMER_CAP = 0x10, - BEAMFORMEE_CAP = 0x20, -} BEAMFORMING_CAP, *PBEAMFORMING_CAP; - - -typedef enum _SOUNDING_MODE { - SOUNDING_SW_VHT_TIMER = 0x0, - SOUNDING_SW_HT_TIMER = 0x1, - SOUNDING_STOP_All_TIMER = 0x2, - SOUNDING_HW_VHT_TIMER = 0x3, - SOUNDING_HW_HT_TIMER = 0x4, - SOUNDING_STOP_OID_TIMER = 0x5, - SOUNDING_AUTO_VHT_TIMER = 0x6, - SOUNDING_AUTO_HT_TIMER = 0x7, - SOUNDING_FW_VHT_TIMER = 0x8, - SOUNDING_FW_HT_TIMER = 0x9, -} SOUNDING_MODE, *PSOUNDING_MODE; - -struct beamforming_entry { - BOOLEAN bUsed; - BOOLEAN bSound; - u16 aid; /* Used to construct AID field of NDPA packet. */ - u16 mac_id; /* Used to Set Reg42C in IBSS mode. */ - u16 p_aid; /* Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ - u16 g_id; - u8 mac_addr[6];/* Used to fill Reg6E4 to fill Mac address of CSI report frame. */ - enum channel_width sound_bw; /* Sounding BandWidth */ - u16 sound_period; - BEAMFORMING_CAP beamforming_entry_cap; - BEAMFORMING_ENTRY_STATE beamforming_entry_state; - u8 ClockResetTimes; /*Modified by Jeffery @2015-04-10*/ - u8 PreLogSeq; /*Modified by Jeffery @2015-03-30*/ - u8 LogSeq; /*Modified by Jeffery @2014-10-29*/ - u16 LogRetryCnt:3; /*Modified by Jeffery @2014-10-29*/ - u16 LogSuccess:2; /*Modified by Jeffery @2014-10-29*/ - - u8 LogStatusFailCnt; - u8 PreCsiReport[327]; - u8 DefaultCsiCnt; - BOOLEAN bDefaultCSI; -}; - -struct sounding_info { - u8 sound_idx; - enum channel_width sound_bw; - SOUNDING_MODE sound_mode; - u16 sound_period; -}; - -struct beamforming_info { - BEAMFORMING_CAP beamforming_cap; - BEAMFORMING_STATE beamforming_state; - struct beamforming_entry beamforming_entry[BEAMFORMING_ENTRY_NUM]; - u8 beamforming_cur_idx; - u8 beamforming_in_progress; - u8 sounding_sequence; - struct sounding_info sounding_info; -}; - -struct rtw_ndpa_sta_info { - u16 aid:12; - u16 feedback_type:1; - u16 nc_index:3; -}; - -BEAMFORMING_CAP beamforming_get_entry_beam_cap_by_mac_id(PVOID pmlmepriv , u8 mac_id); -void beamforming_notify(PADAPTER adapter); -BEAMFORMING_CAP beamforming_get_beamform_cap(struct beamforming_info *pBeamInfo); - -BOOLEAN beamforming_send_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, enum channel_width bw, u8 qidx); -BOOLEAN beamforming_send_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, enum channel_width bw, u8 qidx); - -void beamforming_check_sounding_success(PADAPTER Adapter, BOOLEAN status); - -void beamforming_watchdog(PADAPTER Adapter); -#endif /*#if (BEAMFORMING_SUPPORT ==0)- for diver defined beamforming*/ - +/*PHYDM_BF - (BEAMFORMING_SUPPORT == 1)*/ enum BEAMFORMING_CTRL_TYPE { BEAMFORMING_CTRL_ENTER = 0, BEAMFORMING_CTRL_LEAVE = 1, diff --git a/include/rtw_bt_mp.h b/include/rtw_bt_mp.h index a152d18..93af3c8 100644 --- a/include/rtw_bt_mp.h +++ b/include/rtw_bt_mp.h @@ -37,16 +37,16 @@ typedef enum _MP_BT_MODE { /* definition for BT_UP_OP_BT_SET_TX_RX_PARAMETER */ typedef struct _BT_TXRX_PARAMETERS { - u1Byte txrxChannel; - u4Byte txrxTxPktCnt; - u1Byte txrxTxPktInterval; - u1Byte txrxPayloadType; - u1Byte txrxPktType; - u2Byte txrxPayloadLen; - u4Byte txrxPktHeader; - u1Byte txrxWhitenCoeff; - u1Byte txrxBdaddr[6]; - u1Byte txrxTxGainIndex; + u8 txrxChannel; + u32 txrxTxPktCnt; + u8 txrxTxPktInterval; + u8 txrxPayloadType; + u8 txrxPktType; + u16 txrxPayloadLen; + u32 txrxPktHeader; + u8 txrxWhitenCoeff; + u8 txrxBdaddr[6]; + u8 txrxTxGainIndex; } BT_TXRX_PARAMETERS, *PBT_TXRX_PARAMETERS; /* txrxPktType */ @@ -160,71 +160,71 @@ typedef enum _BT_REPORT_TYPE { BT_REPORT_MAX } BT_REPORT_TYPE, *PBT_REPORT_TYPE; -VOID +void MPTBT_Test( - IN PADAPTER Adapter, - IN u1Byte opCode, - IN u1Byte byte1, - IN u1Byte byte2, - IN u1Byte byte3 + PADAPTER Adapter, + u8 opCode, + u8 byte1, + u8 byte2, + u8 byte3 ); -NDIS_STATUS +uint MPTBT_SendOidBT( - IN PADAPTER pAdapter, - IN PVOID InformationBuffer, - IN ULONG InformationBufferLength, - OUT PULONG BytesRead, - OUT PULONG BytesNeeded + PADAPTER pAdapter, + void *InformationBuffer, + u32 InformationBufferLength, + u32 *BytesRead, + u32 *BytesNeeded ); -VOID +void MPTBT_FwC2hBtMpCtrl( PADAPTER Adapter, - pu1Byte tmpBuf, - u1Byte length + u8 *tmpBuf, + u8 length ); void MPh2c_timeout_handle(void *FunctionContext); -VOID mptbt_BtControlProcess( +void mptbt_BtControlProcess( PADAPTER Adapter, - PVOID pInBuf + void *pInBuf ); #define BT_H2C_MAX_RETRY 1 #define BT_MAX_C2H_LEN 20 typedef struct _BT_REQ_CMD { - UCHAR opCodeVer; - UCHAR OpCode; - USHORT paraLength; - UCHAR pParamStart[100]; + u8 opCodeVer; + u8 OpCode; + u16 paraLength; + u8 pParamStart[100]; } BT_REQ_CMD, *PBT_REQ_CMD; typedef struct _BT_RSP_CMD { - USHORT status; - USHORT paraLength; - UCHAR pParamStart[100]; + u16 status; + u16 paraLength; + u8 pParamStart[100]; } BT_RSP_CMD, *PBT_RSP_CMD; typedef struct _BT_H2C { - u1Byte opCodeVer:4; - u1Byte reqNum:4; - u1Byte opCode; - u1Byte buf[100]; + u8 opCodeVer:4; + u8 reqNum:4; + u8 opCode; + u8 buf[100]; } BT_H2C, *PBT_H2C; typedef struct _BT_EXT_C2H { - u1Byte extendId; - u1Byte statusCode:4; - u1Byte retLen:4; - u1Byte opCodeVer:4; - u1Byte reqNum:4; - u1Byte buf[100]; + u8 extendId; + u8 statusCode:4; + u8 retLen:4; + u8 opCodeVer:4; + u8 reqNum:4; + u8 buf[100]; } BT_EXT_C2H, *PBT_EXT_C2H; diff --git a/include/rtw_btcoex.h b/include/rtw_btcoex.h index fd42248..9fc1790 100644 --- a/include/rtw_btcoex.h +++ b/include/rtw_btcoex.h @@ -90,35 +90,35 @@ typedef enum _BTCOEX_SUSPEND_STATE { #define BT_INFO_LEN 8 typedef struct _HCI_LINK_INFO { - u2Byte ConnectHandle; - u1Byte IncomingTrafficMode; - u1Byte OutgoingTrafficMode; - u1Byte BTProfile; - u1Byte BTCoreSpec; - s1Byte BT_RSSI; - u1Byte TrafficProfile; - u1Byte linkRole; + u16 ConnectHandle; + u8 IncomingTrafficMode; + u8 OutgoingTrafficMode; + u8 BTProfile; + u8 BTCoreSpec; + s8 BT_RSSI; + u8 TrafficProfile; + u8 linkRole; } HCI_LINK_INFO, *PHCI_LINK_INFO; #define MAX_BT_ACL_LINK_NUM 8 typedef struct _HCI_EXT_CONFIG { HCI_LINK_INFO aclLink[MAX_BT_ACL_LINK_NUM]; - u1Byte btOperationCode; - u2Byte CurrentConnectHandle; - u1Byte CurrentIncomingTrafficMode; - u1Byte CurrentOutgoingTrafficMode; + u8 btOperationCode; + u16 CurrentConnectHandle; + u8 CurrentIncomingTrafficMode; + u8 CurrentOutgoingTrafficMode; - u1Byte NumberOfACL; - u1Byte NumberOfSCO; - u1Byte CurrentBTStatus; - u2Byte HCIExtensionVer; + u8 NumberOfACL; + u8 NumberOfSCO; + u8 CurrentBTStatus; + u16 HCIExtensionVer; BOOLEAN bEnableWifiScanNotify; } HCI_EXT_CONFIG, *PHCI_EXT_CONFIG; typedef struct _HCI_PHY_LINK_BSS_INFO { - u2Byte bdCap; /* capability information */ + u16 bdCap; /* capability information */ /* Qos related. Added by Annie, 2005-11-01. */ /* BSS_QOS BssQos; */ @@ -315,15 +315,15 @@ typedef struct _BT_MGNT { BOOLEAN bLogLinkInProgress; BOOLEAN bPhyLinkInProgress; BOOLEAN bPhyLinkInProgressStartLL; - u1Byte BtCurrentPhyLinkhandle; - u2Byte BtCurrentLogLinkhandle; - u1Byte CurrentConnectEntryNum; - u1Byte DisconnectEntryNum; - u1Byte CurrentBTConnectionCnt; + u8 BtCurrentPhyLinkhandle; + u16 BtCurrentLogLinkhandle; + u8 CurrentConnectEntryNum; + u8 DisconnectEntryNum; + u8 CurrentBTConnectionCnt; BT_CONNECT_TYPE BTCurrentConnectType; BT_CONNECT_TYPE BTReceiveConnectPkt; - u1Byte BTAuthCount; - u1Byte BTAsocCount; + u8 BTAuthCount; + u8 BTAsocCount; BOOLEAN bStartSendSupervisionPkt; BOOLEAN BtOperationOn; BOOLEAN BTNeedAMPStatusChg; @@ -333,7 +333,7 @@ typedef struct _BT_MGNT { BOOLEAN bNeedNotifyAMPNoCap; BOOLEAN bCreateSpportQos; BOOLEAN bSupportProfile; - u1Byte BTChannel; + u8 BTChannel; BOOLEAN CheckChnlIsSuit; BOOLEAN bBtScan; BOOLEAN btLogoTest; @@ -398,6 +398,9 @@ u8 rtw_btcoex_IsLpsOn(PADAPTER); u8 rtw_btcoex_RpwmVal(PADAPTER); u8 rtw_btcoex_LpsVal(PADAPTER); u32 rtw_btcoex_GetRaMask(PADAPTER); +u8 rtw_btcoex_query_reduced_wl_pwr_lvl(PADAPTER padapter); +void rtw_btcoex_set_reduced_wl_pwr_lvl(PADAPTER padapter, u8 val); +void rtw_btcoex_do_reduce_wl_pwr_lvl(PADAPTER padapter); void rtw_btcoex_RecordPwrMode(PADAPTER, u8 *pCmdBuf, u8 cmdLen); void rtw_btcoex_DisplayBtCoexInfo(PADAPTER, u8 *pbuf, u32 bufsize); void rtw_btcoex_SetDBG(PADAPTER, u32 *pDbgModule); @@ -433,6 +436,7 @@ void rtw_btcoex_SendScanNotify(PADAPTER padapter, u8 scanType); #endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ u16 rtw_btcoex_btreg_read(PADAPTER padapter, u8 type, u16 addr, u32 *data); u16 rtw_btcoex_btreg_write(PADAPTER padapter, u8 type, u16 addr, u16 val); +u8 rtw_btcoex_get_reduce_wl_txpwr(PADAPTER padapter); u8 rtw_btcoex_get_bt_coexist(PADAPTER padapter); u8 rtw_btcoex_get_chip_type(PADAPTER padapter); u8 rtw_btcoex_get_pg_ant_num(PADAPTER padapter); @@ -440,6 +444,7 @@ u8 rtw_btcoex_get_pg_single_ant_path(PADAPTER padapter); u8 rtw_btcoex_get_pg_rfe_type(PADAPTER padapter); u8 rtw_btcoex_is_tfbga_package_type(PADAPTER padapter); u8 rtw_btcoex_get_ant_div_cfg(PADAPTER padapter); +u16 rtw_btcoex_btset_testmode(PADAPTER padapter, u8 type); /* ================================================== * Below Functions are called by BT-Coex diff --git a/include/rtw_btcoex_wifionly.h b/include/rtw_btcoex_wifionly.h index c5a0740..93087eb 100644 --- a/include/rtw_btcoex_wifionly.h +++ b/include/rtw_btcoex_wifionly.h @@ -17,6 +17,7 @@ void rtw_btcoex_wifionly_switchband_notify(PADAPTER padapter); void rtw_btcoex_wifionly_scan_notify(PADAPTER padapter); +void rtw_btcoex_wifionly_connect_notify(PADAPTER padapter); void rtw_btcoex_wifionly_hw_config(PADAPTER padapter); void rtw_btcoex_wifionly_initialize(PADAPTER padapter); void rtw_btcoex_wifionly_AntInfoSetting(PADAPTER padapter); diff --git a/include/rtw_cmd.h b/include/rtw_cmd.h index 337d2da..274d0af 100644 --- a/include/rtw_cmd.h +++ b/include/rtw_cmd.h @@ -18,19 +18,13 @@ #define C2H_MEM_SZ (16*1024) -#ifndef CONFIG_RTL8711FW - #define FREE_CMDOBJ_SZ 128 #define MAX_CMDSZ 1024 #define MAX_RSPSZ 512 #define MAX_EVTSZ 1024 -#ifdef PLATFORM_OS_CE - #define CMDBUFF_ALIGN_SZ 4 -#else - #define CMDBUFF_ALIGN_SZ 512 -#endif +#define CMDBUFF_ALIGN_SZ 512 struct cmd_obj { _adapter *padapter; @@ -114,9 +108,6 @@ struct evt_priv { #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) u8 *c2h_mem; u8 *allocated_c2h_mem; -#ifdef PLATFORM_OS_XP - PMDL pc2h_mdl; -#endif #endif }; @@ -150,6 +141,10 @@ struct P2P_PS_Offload_t { u8 AllStaSleep:1; /* Only valid in Owner */ u8 discovery:1; u8 rsvd:1; +#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP + u8 p2p_macid:7; + u8 disable_close_rf:1; /*1: not close RF but just pause p2p_macid when NoA duration*/ +#endif /* CONFIG_P2P_PS_NOA_USE_MACID_SLEEP */ }; struct P2P_PS_CTWPeriod_t { @@ -220,10 +215,6 @@ struct mgnt_tx_parm { }; #endif -#else -/* #include */ -#endif /* CONFIG_RTL8711FW */ - enum rtw_drvextra_cmd_id { NONE_WK_CID, STA_MSTATUS_RPT_WK_CID, @@ -236,7 +227,6 @@ enum rtw_drvextra_cmd_id { P2P_PS_WK_CID, P2P_PROTO_WK_CID, CHECK_HIQ_WK_CID,/* for softap mode, check hi queue if empty */ - INTEl_WIDI_WK_CID, C2H_WK_CID, RTP_TIMER_CFG_WK_CID, RESET_SECURITYPRIV, /* add for CONFIG_IEEE80211W, none 11w also can use */ @@ -246,9 +236,12 @@ enum rtw_drvextra_cmd_id { BEAMFORMING_WK_CID, LPS_CHANGE_DTIM_CID, BTINFO_WK_CID, - DFS_MASTER_WK_CID, + BTC_REDUCE_WL_TXPWR_CID, + DFS_RADAR_DETECT_WK_CID, + DFS_RADAR_DETECT_EN_DEC_WK_CID, SESSION_TRACKER_WK_CID, EN_HW_UPDATE_TSF_WK_CID, + PERIOD_TSF_UPDATE_END_WK_CID, TEST_H2C_CID, MP_CMD_WK_CID, CUSTOMER_STR_WK_CID, @@ -256,10 +249,11 @@ enum rtw_drvextra_cmd_id { RSON_SCAN_WK_CID, #endif MGNT_TX_WK_CID, -#ifdef CONFIG_MCC_MODE - MCC_SET_DURATION_WK_CID, -#endif /* CONFIG_MCC_MODE */ REQ_PER_CMD_WK_CID, + SSMPS_WK_CID, +#ifdef CONFIG_CTRL_TXSS_BY_TP + TXSS_WK_CID, +#endif MAX_WK_CID }; @@ -275,6 +269,7 @@ enum LPS_CTRL_TYPE { LPS_CTRL_RX_TRAFFIC_LEAVE = 8, LPS_CTRL_ENTER = 9, LPS_CTRL_LEAVE_CFG80211_PWRMGMT = 10, + LPS_CTRL_LEAVE_SET_LEVEL = 11, }; enum STAKEY_TYPE { @@ -344,7 +339,9 @@ Command Mode struct createbss_parm { bool adhoc; - /* used by AP mode now */ + /* used by AP/Mesh mode now */ + u8 ifbmp; + u8 excl_ifbmp; s16 req_ch; s8 req_bw; s8 req_offset; @@ -958,12 +955,7 @@ struct SetChannelPlan_param { /*H2C Handler index: 60 */ struct LedBlink_param { - PVOID pLed; -}; - -/*H2C Handler index: 61 */ -struct SetChannelSwitch_param { - u8 new_ch_no; + void *pLed; }; /*H2C Handler index: 62 */ @@ -1016,9 +1008,11 @@ u8 rtw_startbss_cmd(_adapter *adapter, int flags); #define REQ_CH_NONE -1 #define REQ_BW_NONE -1 +#define REQ_BW_ORI -2 #define REQ_OFFSET_NONE -1 -u8 rtw_change_bss_chbw_cmd(_adapter *adapter, int flags, s16 req_ch, s8 req_bw, s8 req_offset); +u8 rtw_change_bss_chbw_cmd(_adapter *adapter, int flags + , u8 ifbmp, u8 excl_ifbmp, s16 req_ch, s8 req_bw, s8 req_offset); extern u8 rtw_setphy_cmd(_adapter *padapter, u8 modem, u8 ch); @@ -1049,10 +1043,11 @@ extern u8 rtw_addbareq_cmd(_adapter *padapter, u8 tid, u8 *addr); extern u8 rtw_addbarsp_cmd(_adapter *padapter, u8 *addr, u16 tid, u8 status, u8 size, u16 start_seq); /* add for CONFIG_IEEE80211W, none 11w also can use */ extern u8 rtw_reset_securitypriv_cmd(_adapter *padapter); -extern u8 rtw_free_assoc_resources_cmd(_adapter *padapter, u8 lock_scanned_queue); +extern u8 rtw_free_assoc_resources_cmd(_adapter *padapter, u8 lock_scanned_queue, int flags); extern u8 rtw_dynamic_chk_wk_cmd(_adapter *adapter); -u8 rtw_lps_ctrl_wk_cmd(_adapter *padapter, u8 lps_ctrl_type, u8 enqueue); +u8 rtw_lps_ctrl_wk_cmd(_adapter *padapter, u8 lps_ctrl_type, u8 flags); +u8 rtw_lps_ctrl_leave_set_level_cmd(_adapter *adapter, u8 lps_level, u8 flags); u8 rtw_dm_in_lps_wk_cmd(_adapter *padapter); u8 rtw_lps_change_dtim_cmd(_adapter *padapter, u8 dtim); @@ -1068,32 +1063,37 @@ u8 rtw_dm_ra_mask_wk_cmd(_adapter *padapter, u8 *psta); extern u8 rtw_ps_cmd(_adapter *padapter); +#ifdef CONFIG_DFS +void rtw_dfs_ch_switch_hdl(struct dvobj_priv *dvobj); +#endif + #ifdef CONFIG_AP_MODE u8 rtw_chk_hi_queue_cmd(_adapter *padapter); #ifdef CONFIG_DFS_MASTER -u8 rtw_dfs_master_cmd(_adapter *adapter, bool enqueue); -void rtw_dfs_master_timer_hdl(void *ctx); -void rtw_dfs_master_enable(_adapter *adapter, u8 ch, u8 bw, u8 offset); -void rtw_dfs_master_disable(_adapter *adapter, u8 ch, u8 bw, u8 offset, bool by_others); -void rtw_dfs_master_status_apply(_adapter *adapter, u8 self_action); +u8 rtw_dfs_rd_cmd(_adapter *adapter, bool enqueue); +void rtw_dfs_rd_timer_hdl(void *ctx); +void rtw_dfs_rd_en_decision(_adapter *adapter, u8 mlme_act, u8 excl_ifbmp); +u8 rtw_dfs_rd_en_decision_cmd(_adapter *adapter); #endif /* CONFIG_DFS_MASTER */ #endif /* CONFIG_AP_MODE */ #ifdef CONFIG_BT_COEXIST u8 rtw_btinfo_cmd(PADAPTER padapter, u8 *pbuf, u16 length); +u8 rtw_btc_reduce_wl_txpwr_cmd(_adapter *adapter, u32 val); #endif u8 rtw_test_h2c_cmd(_adapter *adapter, u8 *buf, u8 len); u8 rtw_enable_hw_update_tsf_cmd(_adapter *padapter); +u8 rtw_periodic_tsf_update_end_cmd(_adapter *adapter); u8 rtw_set_chbw_cmd(_adapter *padapter, u8 ch, u8 bw, u8 ch_offset, u8 flags); u8 rtw_set_chplan_cmd(_adapter *adapter, int flags, u8 chplan, u8 swconfig); u8 rtw_set_country_cmd(_adapter *adapter, int flags, const char *country_code, u8 swconfig); -extern u8 rtw_led_blink_cmd(_adapter *padapter, PVOID pLed); -extern u8 rtw_set_csa_cmd(_adapter *padapter, u8 new_ch_no); +extern u8 rtw_led_blink_cmd(_adapter *padapter, void *pLed); +extern u8 rtw_set_csa_cmd(_adapter *adapter); extern u8 rtw_tdls_cmd(_adapter *padapter, u8 *addr, u8 option); u8 rtw_mp_cmd(_adapter *adapter, u8 mp_cmd_id, u8 flags); @@ -1118,6 +1118,12 @@ u8 rtw_rson_scan_wk_cmd(_adapter *adapter, int op); u8 rtw_run_in_thread_cmd(PADAPTER padapter, void (*func)(void *), void *context); +struct ssmps_cmd_parm { + struct sta_info *sta; + u8 smps; +}; +u8 rtw_ssmps_wk_cmd(_adapter *adapter, struct sta_info *sta, u8 smps, u8 enqueue); + u8 session_tracker_chk_cmd(_adapter *adapter, struct sta_info *sta); u8 session_tracker_add_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port); u8 session_tracker_del_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port); @@ -1126,6 +1132,21 @@ u8 session_tracker_del_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_na u8 rtw_req_per_cmd(_adapter * adapter); #endif +#ifdef CONFIG_CTRL_TXSS_BY_TP +struct txss_cmd_parm { + struct sta_info *sta; + bool tx_1ss; +}; + +void rtw_ctrl_txss_update_mimo_type(_adapter *adapter, struct sta_info *sta); +u8 rtw_ctrl_txss(_adapter *adapter, struct sta_info *sta, bool tx_1ss); +void rtw_ctrl_tx_ss_by_tp(_adapter *adapter, u8 from_timer); + +#ifdef DBG_CTRL_TXSS +void dbg_ctrl_txss(_adapter *adapter, bool tx_1ss); +#endif +#endif + u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf); extern void rtw_survey_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); diff --git a/include/rtw_debug.h b/include/rtw_debug.h index f0dfab0..2531b57 100644 --- a/include/rtw_debug.h +++ b/include/rtw_debug.h @@ -28,6 +28,24 @@ enum { #define DRIVER_PREFIX "RTW: " +#ifdef PLATFORM_OS_CE +extern void rtl871x_cedbg(const char *fmt, ...); +#endif + +#ifdef PLATFORM_WINDOWS + #define RTW_PRINT do {} while (0) + #define RTW_ERR do {} while (0) + #define RTW_WARN do {} while (0) + #define RTW_INFO do {} while (0) + #define RTW_DBG do {} while (0) + #define RTW_PRINT_SEL do {} while (0) + #define _RTW_PRINT do {} while (0) + #define _RTW_ERR do {} while (0) + #define _RTW_WARN do {} while (0) + #define _RTW_INFO do {} while (0) + #define _RTW_DBG do {} while (0) + #define _RTW_PRINT_SEL do {} while (0) +#else #define RTW_PRINT(x, ...) do {} while (0) #define RTW_ERR(x, ...) do {} while (0) #define RTW_WARN(x,...) do {} while (0) @@ -40,6 +58,7 @@ enum { #define _RTW_INFO(x,...) do {} while (0) #define _RTW_DBG(x,...) do {} while (0) #define _RTW_PRINT_SEL(x,...) do {} while (0) +#endif #define RTW_INFO_DUMP(_TitleString, _HexData, _HexDataLen) do {} while (0) #define RTW_DBG_DUMP(_TitleString, _HexData, _HexDataLen) do {} while (0) @@ -49,14 +68,32 @@ enum { #define RTW_DBGDUMP 0 /* 'stream' for _dbgdump */ + + #undef _dbgdump #undef _seqdump +#if defined(PLATFORM_WINDOWS) && defined(PLATFORM_OS_XP) + #define _dbgdump DbgPrint + #define KERN_CONT + #define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg) +#elif defined(PLATFORM_WINDOWS) && defined(PLATFORM_OS_CE) + #define _dbgdump rtl871x_cedbg + #define KERN_CONT + #define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg) +#elif defined PLATFORM_LINUX #define _dbgdump printk #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) #define KERN_CONT #endif #define _seqdump seq_printf +#elif defined PLATFORM_FREEBSD + #define _dbgdump printf + #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) + #define KERN_CONT + #endif + #define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg) +#endif void RTW_BUF_DUMP_SEL(uint _loglevel, void *sel, u8 *_titlestring, bool _idx_show, const u8 *_hexdata, int _hexdatalen); @@ -276,6 +313,9 @@ ssize_t proc_set_rson_data(struct file *file, const char __user *buffer, size_t int proc_get_survey_info(struct seq_file *m, void *v); ssize_t proc_set_survey_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_ap_info(struct seq_file *m, void *v); +#ifdef ROKU_PRIVATE +int proc_get_infra_ap(struct seq_file *m, void *v); +#endif /* ROKU_PRIVATE */ ssize_t proc_reset_trx_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_trx_info(struct seq_file *m, void *v); ssize_t proc_set_tx_power_offset(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); @@ -309,6 +349,11 @@ void rtw_sta_linking_test_set_start(void); bool rtw_sta_linking_test_wait_done(void); bool rtw_sta_linking_test_force_fail(void); ssize_t proc_set_sta_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +#ifdef CONFIG_AP_MODE +u16 rtw_ap_linking_test_force_auth_fail(void); +u16 rtw_ap_linking_test_force_asoc_fail(void); +ssize_t proc_set_ap_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +#endif int proc_get_rx_stat(struct seq_file *m, void *v); int proc_get_tx_stat(struct seq_file *m, void *v); @@ -327,10 +372,15 @@ ssize_t proc_set_best_channel(struct file *file, const char __user *buffer, size int proc_get_trx_info_debug(struct seq_file *m, void *v); +#ifdef CONFIG_HUAWEI_PROC +int proc_get_huawei_trx_info(struct seq_file *m, void *v); +#endif + int proc_get_rx_signal(struct seq_file *m, void *v); ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_hw_status(struct seq_file *m, void *v); ssize_t proc_set_hw_status(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +int proc_get_mac_rptbuf(struct seq_file *m, void *v); #ifdef CONFIG_80211N_HT int proc_get_ht_enable(struct seq_file *m, void *v); @@ -342,8 +392,6 @@ ssize_t proc_set_bw_mode(struct file *file, const char __user *buffer, size_t co int proc_get_ampdu_enable(struct seq_file *m, void *v); ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -int proc_get_mac_rptbuf(struct seq_file *m, void *v); - void dump_regsty_rx_ampdu_size_limit(void *sel, _adapter *adapter); int proc_get_rx_ampdu(struct seq_file *m, void *v); ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); @@ -419,6 +467,13 @@ int proc_get_int_logs(struct seq_file *m, void *v); int proc_get_rx_ring(struct seq_file *m, void *v); int proc_get_tx_ring(struct seq_file *m, void *v); int proc_get_pci_aspm(struct seq_file *m, void *v); +int proc_get_pci_conf_space(struct seq_file *m, void *v); +ssize_t proc_set_pci_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); + +int proc_get_pci_bridge_conf_space(struct seq_file *m, void *v); +ssize_t proc_set_pci_bridge_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); + + #ifdef DBG_TXBD_DESC_DUMP int proc_get_tx_ring_ext(struct seq_file *m, void *v); ssize_t proc_set_tx_ring_ext(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); @@ -450,6 +505,7 @@ ssize_t proc_set_new_bcn_max(struct file *file, const char __user *buffer, size_ #ifdef CONFIG_POWER_SAVING int proc_get_ps_info(struct seq_file *m, void *v); +ssize_t proc_set_ps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); #ifdef CONFIG_WMMPS_STA int proc_get_wmmps_info(struct seq_file *m, void *v); ssize_t proc_set_wmmps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); @@ -488,10 +544,18 @@ int proc_get_tx_auth(struct seq_file *m, void *v); int proc_get_efuse_map(struct seq_file *m, void *v); ssize_t proc_set_efuse_map(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA +int proc_get_pathb_phase(struct seq_file *m, void *v); +ssize_t proc_set_pathb_phase(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +#endif + #ifdef CONFIG_MCC_MODE int proc_get_mcc_info(struct seq_file *m, void *v); ssize_t proc_set_mcc_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ssize_t proc_set_mcc_duration(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +#ifdef CONFIG_MCC_PHYDM_OFFLOAD +ssize_t proc_set_mcc_phydm_offload_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +#endif ssize_t proc_set_mcc_single_tx_criteria(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ssize_t proc_set_mcc_ap_bw20_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ssize_t proc_set_mcc_ap_bw40_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); @@ -508,6 +572,11 @@ ssize_t proc_set_ack_timeout(struct file *file, const char __user *buffer, size_ int proc_get_fw_offload(struct seq_file *m, void *v); ssize_t proc_set_fw_offload(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +#ifdef CONFIG_FW_HANDLE_TXBCN +ssize_t proc_set_fw_tbtt_rpt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +int proc_get_fw_tbtt_rpt(struct seq_file *m, void *v); +#endif + #ifdef CONFIG_DBG_RF_CAL int proc_get_iqk_info(struct seq_file *m, void *v); ssize_t proc_set_iqk(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); @@ -515,6 +584,25 @@ int proc_get_lck_info(struct seq_file *m, void *v); ssize_t proc_set_lck(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); #endif /*CONFIG_DBG_RF_CAL*/ +#ifdef CONFIG_CTRL_TXSS_BY_TP +ssize_t proc_set_txss_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +int proc_get_txss_tp(struct seq_file *m, void *v); +#ifdef DBG_CTRL_TXSS +ssize_t proc_set_txss_ctrl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +int proc_get_txss_ctrl(struct seq_file *m, void *v); +#endif +#endif + +#ifdef CONFIG_LPS_CHK_BY_TP +ssize_t proc_set_lps_chk_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +int proc_get_lps_chk_tp(struct seq_file *m, void *v); +#endif + +#ifdef CONFIG_SUPPORT_STATIC_SMPS +ssize_t proc_set_smps(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +int proc_get_smps(struct seq_file *m, void *v); +#endif + #define _drv_always_ 1 #define _drv_emerg_ 2 #define _drv_alert_ 3 diff --git a/include/rtw_efuse.h b/include/rtw_efuse.h index 82cc658..f417a57 100644 --- a/include/rtw_efuse.h +++ b/include/rtw_efuse.h @@ -179,13 +179,6 @@ extern u8 fakeBTEfuseModifiedMap[]; #define MAX_SEGMENT_NUM 200 #define MAX_BUF_SIZE (MAX_SEGMENT_SIZE*MAX_SEGMENT_NUM) #define TMP_BUF_SIZE 100 - -static u8 dcmd_Return_Buffer[MAX_BUF_SIZE] = {0}; -static u32 dcmd_Buf_Idx = 0; -static u32 dcmd_Finifh_Flag = 0; - -static char dcmd_Buf[TMP_BUF_SIZE]; - #define rtprintf dcmd_Store_Return_Buf u8 efuse_bt_GetCurrentSize(PADAPTER padapter, u16 *size); @@ -225,7 +218,7 @@ void EFUSE_ShadowRead(PADAPTER pAdapter, u8 Type, u16 Offset, u32 *Value); BOOLEAN rtw_file_efuse_IsMasked(PADAPTER pAdapter, u16 Offset); BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset); -VOID hal_ReadEFuse_BT_logic_map( +void hal_ReadEFuse_BT_logic_map( PADAPTER padapter, u16 _offset, u16 _size_byte, diff --git a/include/rtw_ht.h b/include/rtw_ht.h index 2c7aa2f..8237bbe 100644 --- a/include/rtw_ht.h +++ b/include/rtw_ht.h @@ -51,6 +51,21 @@ struct ht_priv { }; +#ifdef ROKU_PRIVATE +struct ht_priv_infra_ap { + + /*Infra mode, only store AP's info , not intersection of STA and AP*/ + u8 channel_width_infra_ap; + u8 sgi_20m_infra_ap; + u8 sgi_40m_infra_ap; + u8 ldpc_cap_infra_ap; + u8 stbc_cap_infra_ap; + u8 MCS_set_infra_ap[16]; + u8 Rx_ss_infra_ap; + u16 rx_highest_data_rate_infra_ap; +}; +#endif /* ROKU_PRIVATE */ + typedef enum AGGRE_SIZE { HT_AGG_SIZE_8K = 0, HT_AGG_SIZE_16K = 1, @@ -62,23 +77,6 @@ typedef enum AGGRE_SIZE { VHT_AGG_SIZE_1024K = 7, } AGGRE_SIZE_E, *PAGGRE_SIZE_E; -typedef enum _RT_HT_INF0_CAP { - RT_HT_CAP_USE_TURBO_AGGR = 0x01, - RT_HT_CAP_USE_LONG_PREAMBLE = 0x02, - RT_HT_CAP_USE_AMPDU = 0x04, - RT_HT_CAP_USE_WOW = 0x8, - RT_HT_CAP_USE_SOFTAP = 0x10, - RT_HT_CAP_USE_92SE = 0x20, - RT_HT_CAP_USE_88C_92C = 0x40, - RT_HT_CAP_USE_AP_CLIENT_MODE = 0x80, /* AP team request to reserve this bit, by Emily */ -} RT_HT_INF0_CAPBILITY, *PRT_HT_INF0_CAPBILITY; - -typedef enum _RT_HT_INF1_CAP { - RT_HT_CAP_USE_VIDEO_CLIENT = 0x01, - RT_HT_CAP_USE_JAGUAR_BCUT = 0x02, - RT_HT_CAP_USE_JAGUAR_CCUT = 0x04, -} RT_HT_INF1_CAPBILITY, *PRT_HT_INF1_CAPBILITY; - #define LDPC_HT_ENABLE_RX BIT0 #define LDPC_HT_ENABLE_TX BIT1 #define LDPC_HT_TEST_TX_ENABLE BIT2 diff --git a/include/rtw_io.h b/include/rtw_io.h index 28430d8..e313132 100644 --- a/include/rtw_io.h +++ b/include/rtw_io.h @@ -18,9 +18,6 @@ #define NUM_IOREQ 8 -#ifdef PLATFORM_WINDOWS - #define MAX_PROT_SZ 64 -#endif #ifdef PLATFORM_LINUX #define MAX_PROT_SZ (64-16) #endif @@ -140,54 +137,14 @@ struct io_req { u32 status; u8 *pbuf; _sema sema; - -#ifdef PLATFORM_OS_CE -#ifdef CONFIG_USB_HCI - /* URB handler for rtw_write_mem */ - USB_TRANSFER usb_transfer_write_mem; -#endif -#endif - void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt); u8 *cnxt; - -#ifdef PLATFORM_OS_XP - PMDL pmdl; - PIRP pirp; - -#ifdef CONFIG_SDIO_HCI - PSDBUS_REQUEST_PACKET sdrp; -#endif - -#endif - - }; struct intf_hdl { - -#if 0 - u32 intf_option; - u32 bus_status; - u32 do_flush; - u8 *adapter; - u8 *intf_dev; - struct intf_priv *pintfpriv; - u8 cnt; - void (*intf_hdl_init)(u8 *priv); - void (*intf_hdl_unload)(u8 *priv); - void (*intf_hdl_open)(u8 *priv); - void (*intf_hdl_close)(u8 *priv); - struct _io_ops io_ops; - /* u8 intf_status;//moved to struct intf_priv */ - u16 len; - u16 done_len; -#endif _adapter *padapter; struct dvobj_priv *pintf_dev;/* pointer to &(padapter->dvobjpriv); */ - struct _io_ops io_ops; - }; struct reg_protocol_rd { @@ -395,10 +352,10 @@ u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int extern void _rtw_write_port_cancel(_adapter *adapter); #ifdef DBG_IO -bool match_read_sniff_ranges(u32 addr, u16 len); -bool match_write_sniff_ranges(u32 addr, u16 len); -bool match_rf_read_sniff_ranges(u8 path, u32 addr, u32 mask); -bool match_rf_write_sniff_ranges(u8 path, u32 addr, u32 mask); +u32 match_read_sniff(_adapter *adapter, u32 addr, u16 len, u32 val); +u32 match_write_sniff(_adapter *adapter, u32 addr, u16 len, u32 val); +bool match_rf_read_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask); +bool match_rf_write_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask); extern u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line); extern u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line); @@ -455,10 +412,6 @@ int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller #endif /* CONFIG_SDIO_HCI */ #else /* DBG_IO */ -#define match_read_sniff_ranges(addr, len) _FALSE -#define match_write_sniff_ranges(addr, len) _FALSE -#define match_rf_read_sniff_ranges(path, addr, mask) _FALSE -#define match_rf_write_sniff_ranges(path, addr, mask) _FALSE #define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr)) #define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr)) #define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr)) @@ -534,7 +487,6 @@ extern void free_io_queue(_adapter *adapter); extern void async_bus_io(struct io_queue *pio_q); extern void bus_sync_io(struct io_queue *pio_q); extern u32 _ioreq2rwmem(struct io_queue *pio_q); -extern void dev_power_down(_adapter *Adapter, u8 bpwrup); /* #define RTL_R8(reg) rtw_read8(padapter, reg) diff --git a/include/rtw_ioctl.h b/include/rtw_ioctl.h index 4924751..1143d97 100644 --- a/include/rtw_ioctl.h +++ b/include/rtw_ioctl.h @@ -15,122 +15,11 @@ #ifndef _RTW_IOCTL_H_ #define _RTW_IOCTL_H_ -#ifndef PLATFORM_WINDOWS -/* 00 - Success -* 11 - Error */ -#define STATUS_SUCCESS (0x00000000L) -#define STATUS_PENDING (0x00000103L) - -#define STATUS_UNSUCCESSFUL (0xC0000001L) -#define STATUS_INSUFFICIENT_RESOURCES (0xC000009AL) -#define STATUS_NOT_SUPPORTED (0xC00000BBL) - -#define NDIS_STATUS_SUCCESS ((NDIS_STATUS)STATUS_SUCCESS) -#define NDIS_STATUS_PENDING ((NDIS_STATUS)STATUS_PENDING) -#define NDIS_STATUS_NOT_RECOGNIZED ((NDIS_STATUS)0x00010001L) -#define NDIS_STATUS_NOT_COPIED ((NDIS_STATUS)0x00010002L) -#define NDIS_STATUS_NOT_ACCEPTED ((NDIS_STATUS)0x00010003L) -#define NDIS_STATUS_CALL_ACTIVE ((NDIS_STATUS)0x00010007L) - -#define NDIS_STATUS_FAILURE ((NDIS_STATUS)STATUS_UNSUCCESSFUL) -#define NDIS_STATUS_RESOURCES ((NDIS_STATUS)STATUS_INSUFFICIENT_RESOURCES) -#define NDIS_STATUS_CLOSING ((NDIS_STATUS)0xC0010002L) -#define NDIS_STATUS_BAD_VERSION ((NDIS_STATUS)0xC0010004L) -#define NDIS_STATUS_BAD_CHARACTERISTICS ((NDIS_STATUS)0xC0010005L) -#define NDIS_STATUS_ADAPTER_NOT_FOUND ((NDIS_STATUS)0xC0010006L) -#define NDIS_STATUS_OPEN_FAILED ((NDIS_STATUS)0xC0010007L) -#define NDIS_STATUS_DEVICE_FAILED ((NDIS_STATUS)0xC0010008L) -#define NDIS_STATUS_MULTICAST_FULL ((NDIS_STATUS)0xC0010009L) -#define NDIS_STATUS_MULTICAST_EXISTS ((NDIS_STATUS)0xC001000AL) -#define NDIS_STATUS_MULTICAST_NOT_FOUND ((NDIS_STATUS)0xC001000BL) -#define NDIS_STATUS_REQUEST_ABORTED ((NDIS_STATUS)0xC001000CL) -#define NDIS_STATUS_RESET_IN_PROGRESS ((NDIS_STATUS)0xC001000DL) -#define NDIS_STATUS_CLOSING_INDICATING ((NDIS_STATUS)0xC001000EL) -#define NDIS_STATUS_NOT_SUPPORTED ((NDIS_STATUS)STATUS_NOT_SUPPORTED) -#define NDIS_STATUS_INVALID_PACKET ((NDIS_STATUS)0xC001000FL) -#define NDIS_STATUS_OPEN_LIST_FULL ((NDIS_STATUS)0xC0010010L) -#define NDIS_STATUS_ADAPTER_NOT_READY ((NDIS_STATUS)0xC0010011L) -#define NDIS_STATUS_ADAPTER_NOT_OPEN ((NDIS_STATUS)0xC0010012L) -#define NDIS_STATUS_NOT_INDICATING ((NDIS_STATUS)0xC0010013L) -#define NDIS_STATUS_INVALID_LENGTH ((NDIS_STATUS)0xC0010014L) -#define NDIS_STATUS_INVALID_DATA ((NDIS_STATUS)0xC0010015L) -#define NDIS_STATUS_BUFFER_TOO_SHORT ((NDIS_STATUS)0xC0010016L) -#define NDIS_STATUS_INVALID_OID ((NDIS_STATUS)0xC0010017L) -#define NDIS_STATUS_ADAPTER_REMOVED ((NDIS_STATUS)0xC0010018L) -#define NDIS_STATUS_UNSUPPORTED_MEDIA ((NDIS_STATUS)0xC0010019L) -#define NDIS_STATUS_GROUP_ADDRESS_IN_USE ((NDIS_STATUS)0xC001001AL) -#define NDIS_STATUS_FILE_NOT_FOUND ((NDIS_STATUS)0xC001001BL) -#define NDIS_STATUS_ERROR_READING_FILE ((NDIS_STATUS)0xC001001CL) -#define NDIS_STATUS_ALREADY_MAPPED ((NDIS_STATUS)0xC001001DL) -#define NDIS_STATUS_RESOURCE_CONFLICT ((NDIS_STATUS)0xC001001EL) -#define NDIS_STATUS_NO_CABLE ((NDIS_STATUS)0xC001001FL) - -#define NDIS_STATUS_INVALID_SAP ((NDIS_STATUS)0xC0010020L) -#define NDIS_STATUS_SAP_IN_USE ((NDIS_STATUS)0xC0010021L) -#define NDIS_STATUS_INVALID_ADDRESS ((NDIS_STATUS)0xC0010022L) -#define NDIS_STATUS_VC_NOT_ACTIVATED ((NDIS_STATUS)0xC0010023L) -#define NDIS_STATUS_DEST_OUT_OF_ORDER ((NDIS_STATUS)0xC0010024L) /* cause 27 */ -#define NDIS_STATUS_VC_NOT_AVAILABLE ((NDIS_STATUS)0xC0010025L) /* cause 35, 45 */ -#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((NDIS_STATUS)0xC0010026L) /* cause 37 */ -#define NDIS_STATUS_INCOMPATABLE_QOS ((NDIS_STATUS)0xC0010027L) /* cause 49 */ -#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((NDIS_STATUS)0xC0010028L) /* cause 93 */ -#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((NDIS_STATUS)0xC0010029L) /* cause 3 */ -#endif /* #ifndef PLATFORM_WINDOWS */ - - -#ifndef OID_802_11_CAPABILITY - #define OID_802_11_CAPABILITY 0x0d010122 -#endif - -#ifndef OID_802_11_PMKID - #define OID_802_11_PMKID 0x0d010123 -#endif - - -/* For DDK-defined OIDs */ -#define OID_NDIS_SEG1 0x00010100 -#define OID_NDIS_SEG2 0x00010200 -#define OID_NDIS_SEG3 0x00020100 -#define OID_NDIS_SEG4 0x01010100 -#define OID_NDIS_SEG5 0x01020100 -#define OID_NDIS_SEG6 0x01020200 -#define OID_NDIS_SEG7 0xFD010100 -#define OID_NDIS_SEG8 0x0D010100 -#define OID_NDIS_SEG9 0x0D010200 -#define OID_NDIS_SEG10 0x0D020200 - -#define SZ_OID_NDIS_SEG1 23 -#define SZ_OID_NDIS_SEG2 3 -#define SZ_OID_NDIS_SEG3 6 -#define SZ_OID_NDIS_SEG4 6 -#define SZ_OID_NDIS_SEG5 4 -#define SZ_OID_NDIS_SEG6 8 -#define SZ_OID_NDIS_SEG7 7 -#define SZ_OID_NDIS_SEG8 36 -#define SZ_OID_NDIS_SEG9 24 -#define SZ_OID_NDIS_SEG10 19 - -/* For Realtek-defined OIDs */ -#define OID_MP_SEG1 0xFF871100 -#define OID_MP_SEG2 0xFF818000 - -#define OID_MP_SEG3 0xFF818700 -#define OID_MP_SEG4 0xFF011100 - enum oid_type { QUERY_OID, SET_OID }; -struct oid_funs_node { - unsigned int oid_start; /* the starting number for OID */ - unsigned int oid_end; /* the ending number for OID */ - struct oid_obj_priv *node_array; - unsigned int array_sz; /* the size of node_array */ - int query_counter; /* count the number of query hits for this segment */ - int set_counter; /* count the number of set hits for this segment */ -}; - struct oid_par_priv { void *adapter_context; NDIS_OID oid; @@ -142,173 +31,12 @@ struct oid_par_priv { u32 dbg; }; -struct oid_obj_priv { - unsigned char dbg; /* 0: without OID debug message 1: with OID debug message */ - NDIS_STATUS(*oidfuns)(struct oid_par_priv *poid_par_priv); -}; - -#if (defined(CONFIG_MP_INCLUDED) && defined(_RTW_MP_IOCTL_C_)) || \ - (defined(PLATFORM_WINDOWS) && defined(_RTW_IOCTL_RTL_C_)) -static NDIS_STATUS oid_null_function(struct oid_par_priv *poid_par_priv) -{ - return NDIS_STATUS_SUCCESS; -} -#endif - -#ifdef PLATFORM_WINDOWS - -int TranslateNdisPsToRtPs(IN NDIS_802_11_POWER_MODE ndisPsMode); - -/* OID Handler for Segment 1 */ -NDIS_STATUS oid_gen_supported_list_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_hardware_status_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_media_supported_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_media_in_use_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_maximum_lookahead_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_maximum_frame_size_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_link_speed_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_transmit_buffer_space_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_receive_buffer_space_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_transmit_block_size_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_receive_block_size_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_vendor_id_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_vendor_description_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_current_packet_filter_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_current_lookahead_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_driver_version_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_maximum_total_size_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_protocol_options_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_mac_options_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_media_connect_status_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_maximum_send_packets_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_vendor_driver_version_hdl(struct oid_par_priv *poid_par_priv); - - -/* OID Handler for Segment 2 */ -NDIS_STATUS oid_gen_physical_medium_hdl(struct oid_par_priv *poid_par_priv); - -/* OID Handler for Segment 3 */ -NDIS_STATUS oid_gen_xmit_ok_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_rcv_ok_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_xmit_error_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_rcv_error_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_gen_rcv_no_buffer_hdl(struct oid_par_priv *poid_par_priv); - - -/* OID Handler for Segment 4 */ -NDIS_STATUS oid_802_3_permanent_address_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_3_current_address_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_3_multicast_list_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_3_maximum_list_size_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_3_mac_options_hdl(struct oid_par_priv *poid_par_priv); - - - -/* OID Handler for Segment 5 */ -NDIS_STATUS oid_802_3_rcv_error_alignment_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_3_xmit_one_collision_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_3_xmit_more_collisions_hdl(struct oid_par_priv *poid_par_priv); - - -/* OID Handler for Segment 6 */ -NDIS_STATUS oid_802_3_xmit_deferred_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_3_xmit_max_collisions_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_3_rcv_overrun_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_3_xmit_underrun_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_3_xmit_heartbeat_failure_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_3_xmit_times_crs_lost_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_3_xmit_late_collisions_hdl(struct oid_par_priv *poid_par_priv); - - - -/* OID Handler for Segment 7 */ -NDIS_STATUS oid_pnp_capabilities_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_pnp_set_power_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_pnp_query_power_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_pnp_add_wake_up_pattern_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_pnp_remove_wake_up_pattern_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_pnp_wake_up_pattern_list_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_pnp_enable_wake_up_hdl(struct oid_par_priv *poid_par_priv); - - - -/* OID Handler for Segment 8 */ -NDIS_STATUS oid_802_11_bssid_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_ssid_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_infrastructure_mode_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_add_wep_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_remove_wep_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_disassociate_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_authentication_mode_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_privacy_filter_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_bssid_list_scan_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_encryption_status_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_reload_defaults_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_add_key_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_remove_key_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_association_information_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_test_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_media_stream_mode_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_capability_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_pmkid_hdl(struct oid_par_priv *poid_par_priv); - - - - - -/* OID Handler for Segment 9 */ -NDIS_STATUS oid_802_11_network_types_supported_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_network_type_in_use_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_tx_power_level_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_rssi_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_rssi_trigger_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_fragmentation_threshold_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_rts_threshold_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_number_of_antennas_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_rx_antenna_selected_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_tx_antenna_selected_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_supported_rates_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_desired_rates_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_configuration_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_power_mode_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_802_11_bssid_list_hdl(struct oid_par_priv *poid_par_priv); - - -/* OID Handler for Segment 10 */ -NDIS_STATUS oid_802_11_statistics_hdl(struct oid_par_priv *poid_par_priv); - - -/* OID Handler for Segment ED */ -NDIS_STATUS oid_rt_mh_vender_id_hdl(struct oid_par_priv *poid_par_priv); - -void Set_802_3_MULTICAST_LIST(ADAPTER *pAdapter, UCHAR *MCListbuf, ULONG MCListlen, BOOLEAN bAcceptAllMulticast); - -#endif/* end of PLATFORM_WINDOWS */ - #if defined(PLATFORM_LINUX) && defined(CONFIG_WIRELESS_EXT) extern struct iw_handler_def rtw_handlers_def; #endif extern void rtw_request_wps_pbc_event(_adapter *padapter); -extern NDIS_STATUS drv_query_info( - IN _nic_hdl MiniportAdapterContext, - IN NDIS_OID Oid, - IN void *InformationBuffer, - IN u32 InformationBufferLength, - OUT u32 *BytesWritten, - OUT u32 *BytesNeeded -); - -extern NDIS_STATUS drv_set_info( - IN _nic_hdl MiniportAdapterContext, - IN NDIS_OID Oid, - IN void *InformationBuffer, - IN u32 InformationBufferLength, - OUT u32 *BytesRead, - OUT u32 *BytesNeeded -); - #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE extern int rtw_vendor_ie_get_raw_data(struct net_device *, u32, char *, u32); extern int rtw_vendor_ie_get_data(struct net_device*, int , char*); diff --git a/include/rtw_ioctl_query.h b/include/rtw_ioctl_query.h index cc7b557..7badcdd 100644 --- a/include/rtw_ioctl_query.h +++ b/include/rtw_ioctl_query.h @@ -16,10 +16,4 @@ #define _RTW_IOCTL_QUERY_H_ -#ifdef PLATFORM_WINDOWS -u8 query_802_11_capability(_adapter *padapter, u8 *pucBuf, u32 *pulOutLen); -u8 query_802_11_association_information(_adapter *padapter, PNDIS_802_11_ASSOCIATION_INFORMATION pAssocInfo); -#endif - - #endif diff --git a/include/rtw_ioctl_rtl.h b/include/rtw_ioctl_rtl.h deleted file mode 100644 index 2df8713..0000000 --- a/include/rtw_ioctl_rtl.h +++ /dev/null @@ -1,75 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTW_IOCTL_RTL_H_ -#define _RTW_IOCTL_RTL_H_ - - -/* ************** oid_rtl_seg_01_01 ************** */ -NDIS_STATUS oid_rt_get_signal_quality_hdl(struct oid_par_priv *poid_par_priv);/* 84 */ -NDIS_STATUS oid_rt_get_small_packet_crc_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_middle_packet_crc_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_large_packet_crc_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_tx_retry_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_rx_retry_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_rx_total_packet_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_tx_beacon_ok_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_tx_beacon_err_hdl(struct oid_par_priv *poid_par_priv); - -NDIS_STATUS oid_rt_pro_set_fw_dig_state_hdl(struct oid_par_priv *poid_par_priv); /* 8a */ -NDIS_STATUS oid_rt_pro_set_fw_ra_state_hdl(struct oid_par_priv *poid_par_priv); /* 8b */ - -NDIS_STATUS oid_rt_get_rx_icv_err_hdl(struct oid_par_priv *poid_par_priv);/* 93 */ -NDIS_STATUS oid_rt_set_encryption_algorithm_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_preamble_mode_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_ap_ip_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_set_preamble_mode_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_set_bcn_intvl_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_dedicate_probe_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_total_tx_bytes_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_total_rx_bytes_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_current_tx_power_level_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_enc_key_mismatch_count_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_enc_key_match_count_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_channel_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_hardware_radio_off_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_key_mismatch_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_supported_wireless_mode_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_channel_list_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_scan_in_progress_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_forced_data_rate_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_wireless_mode_for_scan_list_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_bss_wireless_mode_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_scan_with_magic_packet_hdl(struct oid_par_priv *poid_par_priv); - -/* ************** oid_rtl_seg_01_03 section start ************** */ -NDIS_STATUS oid_rt_ap_get_associated_station_list_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_ap_switch_into_ap_mode_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_ap_supported_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_ap_set_passphrase_hdl(struct oid_par_priv *poid_par_priv); - -/* oid_rtl_seg_01_11 */ -NDIS_STATUS oid_rt_pro_rf_write_registry_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_rf_read_registry_hdl(struct oid_par_priv *poid_par_priv); - -/* ************** oid_rtl_seg_03_00 section start ************** */ -NDIS_STATUS oid_rt_get_connect_state_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_set_default_key_id_hdl(struct oid_par_priv *poid_par_priv); - - - - -#endif diff --git a/include/rtw_ioctl_set.h b/include/rtw_ioctl_set.h index 2bfe570..fdf602e 100644 --- a/include/rtw_ioctl_set.h +++ b/include/rtw_ioctl_set.h @@ -15,37 +15,6 @@ #ifndef __RTW_IOCTL_SET_H_ #define __RTW_IOCTL_SET_H_ - -typedef u8 NDIS_802_11_PMKID_VALUE[16]; - -typedef struct _BSSIDInfo { - NDIS_802_11_MAC_ADDRESS BSSID; - NDIS_802_11_PMKID_VALUE PMKID; -} BSSIDInfo, *PBSSIDInfo; - - -#ifdef PLATFORM_OS_XP -typedef struct _NDIS_802_11_PMKID { - u32 Length; - u32 BSSIDInfoCount; - BSSIDInfo BSSIDInfo[1]; -} NDIS_802_11_PMKID, *PNDIS_802_11_PMKID; -#endif - - -#ifdef PLATFORM_WINDOWS -u8 rtw_set_802_11_reload_defaults(_adapter *padapter, NDIS_802_11_RELOAD_DEFAULTS reloadDefaults); -u8 rtw_set_802_11_test(_adapter *padapter, NDIS_802_11_TEST *test); -u8 rtw_set_802_11_pmkid(_adapter *pdapter, NDIS_802_11_PMKID *pmkid); - -u8 rtw_pnp_set_power_sleep(_adapter *padapter); -u8 rtw_pnp_set_power_wakeup(_adapter *padapter); - -void rtw_pnp_resume_wk(void *context); -void rtw_pnp_sleep_wk(void *context); - -#endif - u8 rtw_set_802_11_authentication_mode(_adapter *pdapter, NDIS_802_11_AUTHENTICATION_MODE authmode); u8 rtw_set_802_11_bssid(_adapter *padapter, u8 *bssid); u8 rtw_set_802_11_add_wep(_adapter *padapter, NDIS_802_11_WEP *wep); diff --git a/include/rtw_mcc.h b/include/rtw_mcc.h index 62e880e..11598e9 100644 --- a/include/rtw_mcc.h +++ b/include/rtw_mcc.h @@ -54,9 +54,12 @@ #define MCC_SINGLE_TX_CRITERIA 5 /* Mbps */ #define MAX_MCC_NUM 2 +#define DBG_MCC_REG_NUM 4 +#define DBG_MCC_RF_REG_NUM 1 #define MCC_STOP(adapter) (adapter->mcc_adapterpriv.mcc_tx_stop) #define MCC_EN(adapter) (adapter_to_dvobj(adapter)->mcc_objpriv.en_mcc) +#define adapter_to_mccobjpriv(adapter) (&(adapter_to_dvobj(adapter)->mcc_objpriv)) #define SET_MCC_EN_FLAG(adapter, flag)\ do { \ adapter_to_dvobj(adapter)->mcc_objpriv.en_mcc = (flag); \ @@ -69,6 +72,34 @@ do { \ adapter_to_dvobj(adapter)->mcc_objpriv.enable_runtime_duration = (flag); \ } while (0) + +#define SET_MCC_PHYDM_OFFLOAD(adapter, flag)\ + do { \ + adapter_to_dvobj(adapter)->mcc_objpriv.mcc_phydm_offload = (flag); \ + } while (0) + +#ifdef CONFIG_MCC_PHYDM_OFFLOAD +enum mcc_cfg_phydm_ops { + MCC_CFG_PHYDM_OFFLOAD = 0, + MCC_CFG_PHYDM_RF_CH, + MCC_CFG_PHYDM_ADD_CLIENT, + MCC_CFG_PHYDM_REMOVE_CLIENT, + MCC_CFG_PHYDM_START, + MCC_CFG_PHYDM_STOP, + MCC_CFG_PHYDM_DUMP, + MCC_CFG_PHYDM_MAX, +}; +#endif + +enum rtw_mcc_cmd_id { + MCC_CMD_WK_CID = 0, + MCC_SET_DURATION_WK_CID, + MCC_GET_DBG_REG_WK_CID, + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + MCC_SET_PHYDM_OFFLOAD_WK_CID, + #endif +}; + /* Represent Channel Tx Null setting */ enum mcc_channel_tx_null { MCC_ENABLE_TX_NULL = 0, @@ -100,7 +131,7 @@ enum mcc_status_rpt { MCC_RPT_MAX, }; -enum MCC_ROLE { +enum mcc_role { MCC_ROLE_STA = 0, MCC_ROLE_AP = 1, MCC_ROLE_GC = 2, @@ -115,21 +146,21 @@ struct mcc_iqk_backup { u16 RX_Y; }; -enum MCC_DURATION_SETTING { +enum mcc_duration_setting { MCC_DURATION_MAPPING = 0, MCC_DURATION_DIRECET = 1, }; -enum MCC_SCHED_MODE { +enum mcc_sched_mode { MCC_FAIR_SCHEDULE = 0, - MCC_FAVOE_STA = 1, - MCC_FAVOE_P2P = 2, + MCC_FAVOR_STA = 1, + MCC_FAVOR_P2P = 2, }; /* mcc data for adapter */ struct mcc_adapter_priv { u8 order; /* FW document, softap/AP must be 0 */ - u8 role; /* MCC role(AP,STA,GO,GC) */ + enum mcc_role role; /* MCC role(AP,STA,GO,GC) */ u8 mcc_duration; /* channel stay period, UNIT:1TU */ /* flow control */ @@ -182,20 +213,28 @@ struct mcc_obj_priv { u8 mcc_stop_threshold; u8 current_order; u8 last_tsfdiff; - u32 mcc_launch_time; /* mcc launch time, used for starting detect mcc switch channel success */ + systime mcc_launch_time; /* mcc launch time, used for starting detect mcc switch channel success */ _mutex mcc_mutex; _lock mcc_lock; PADAPTER iface[MAX_MCC_NUM]; /* by order, use for mcc parameter cmd */ struct submit_ctx mcc_sctx; struct submit_ctx mcc_tsf_req_sctx; + _mutex mcc_tsf_req_mutex; + u8 mcc_tsf_req_sctx_order; /* record current order for mcc_tsf_req_sctx */ #ifdef CONFIG_MCC_MODE_V2 u8 mcc_iqk_value_rsvd_page[3]; #endif /* CONFIG_MCC_MODE_V2 */ u8 mcc_pwr_idx_rsvd_page[MAX_MCC_NUM]; u8 enable_runtime_duration; - u32 backup_phydm_ability; /* for LG */ u8 mchan_sched_mode; + + _mutex mcc_dbg_reg_mutex; + u32 dbg_reg[DBG_MCC_REG_NUM]; + u32 dbg_reg_val[DBG_MCC_REG_NUM]; + u32 dbg_rf_reg[DBG_MCC_RF_REG_NUM]; + u32 dbg_rf_reg_val[DBG_MCC_RF_REG_NUM][MAX_RF_PATH]; + u8 mcc_phydm_offload; }; /* backup IQK val */ @@ -262,8 +301,11 @@ void rtw_hal_mcc_process_noa(PADAPTER padapter); void rtw_hal_mcc_parameter_init(PADAPTER padapter); -u8 rtw_set_mcc_duration_hdl(PADAPTER adapter, u8 type, const u8 *val); +u8 rtw_mcc_cmd_hdl(PADAPTER adapter, u8 type, const u8 *val); u8 rtw_set_mcc_duration_cmd(_adapter *adapter, u8 type, u8 val); +#ifdef CONFIG_MCC_PHYDM_OFFLOAD +u8 rtw_set_mcc_phydm_offload_enable_cmd(PADAPTER adapter, u8 enable, u8 enqueue); +#endif /* CONFIG_MCC_PHYDM_OFFLOAD */ #endif /* _RTW_MCC_H_ */ #endif /* CONFIG_MCC_MODE */ diff --git a/include/rtw_mi.h b/include/rtw_mi.h index 95d6889..c5cdf5d 100644 --- a/include/rtw_mi.h +++ b/include/rtw_mi.h @@ -18,6 +18,8 @@ void rtw_mi_update_union_chan_inf(_adapter *adapter, u8 ch, u8 offset , u8 bw); u8 rtw_mi_stayin_union_ch_chk(_adapter *adapter); u8 rtw_mi_stayin_union_band_chk(_adapter *adapter); + +int rtw_mi_get_ch_setting_union_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, u8 *ch, u8 *bw, u8 *offset); int rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset); int rtw_mi_get_ch_setting_union_no_self(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset); @@ -48,7 +50,11 @@ struct mi_state { #endif u8 mgmt_tx_num; #endif - +#ifdef CONFIG_P2P + u8 p2p_device_num; + u8 p2p_gc; + u8 p2p_go; +#endif u8 union_ch; u8 union_bw; u8 union_offset; @@ -95,6 +101,16 @@ struct mi_state { #define MSTATE_ROCH_NUM(_mstate) 0 #endif +#ifdef CONFIG_P2P +#define MSTATE_P2P_DV_NUM(_mstate) ((_mstate)->p2p_device_num) +#define MSTATE_P2P_GC_NUM(_mstate) ((_mstate)->p2p_gc) +#define MSTATE_P2P_GO_NUM(_mstate) ((_mstate)->p2p_go) +#else +#define MSTATE_P2P_DV_NUM(_mstate) 0 +#define MSTATE_P2P_GC_NUM(_mstate) 0 +#define MSTATE_P2P_GO_NUM(_mstate) 0 +#endif + #if defined(CONFIG_IOCTL_CFG80211) #define MSTATE_MGMT_TX_NUM(_mstate) ((_mstate)->mgmt_tx_num) #else @@ -112,8 +128,10 @@ struct mi_state { #define rtw_mi_get_assoced_sta_num(adapter) DEV_STA_LD_NUM(adapter_to_dvobj(adapter)) #define rtw_mi_get_ap_num(adapter) DEV_AP_NUM(adapter_to_dvobj(adapter)) #define rtw_mi_get_mesh_num(adapter) DEV_MESH_NUM(adapter_to_dvobj(adapter)) +u8 rtw_mi_get_assoc_if_num(_adapter *adapter); /* For now, not return union_ch/bw/offset */ +void rtw_mi_status_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, struct mi_state *mstate); void rtw_mi_status(_adapter *adapter, struct mi_state *mstate); void rtw_mi_status_no_self(_adapter *adapter, struct mi_state *mstate); void rtw_mi_status_no_others(_adapter *adapter, struct mi_state *mstate); @@ -157,6 +175,9 @@ void rtw_mi_buddy_intf_start(_adapter *adapter); void rtw_mi_intf_stop(_adapter *adapter); void rtw_mi_buddy_intf_stop(_adapter *adapter); +#ifdef CONFIG_NEW_NETDEV_HDL +u8 rtw_mi_hal_iface_init(_adapter *padapter); +#endif void rtw_mi_suspend_free_assoc_resource(_adapter *adapter); void rtw_mi_buddy_suspend_free_assoc_resource(_adapter *adapter); @@ -223,6 +244,8 @@ u8 rtw_mi_buddy_check_pending_xmitbuf(_adapter *padapter); #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) #ifdef CONFIG_RTL8822B #include +#elif defined(CONFIG_RTL8822C) + #include #else extern s32 _dequeue_writeport(PADAPTER padapter); #endif @@ -236,9 +259,6 @@ void rtw_mi_buddy_adapter_reset(_adapter *padapter); u8 rtw_mi_dynamic_check_timer_handlder(_adapter *padapter); u8 rtw_mi_buddy_dynamic_check_timer_handlder(_adapter *padapter); -u8 rtw_mi_dev_unload(_adapter *padapter); -u8 rtw_mi_buddy_dev_unload(_adapter *padapter); - extern void rtw_iface_dynamic_chk_wk_hdl(_adapter *padapter); u8 rtw_mi_dynamic_chk_wk_hdl(_adapter *padapter); u8 rtw_mi_buddy_dynamic_chk_wk_hdl(_adapter *padapter); @@ -278,6 +298,8 @@ void rtw_mi_buddy_clone_bcmc_packet(_adapter *padapter, union recv_frame *precvf _adapter *rtw_mi_get_ap_adapter(_adapter *padapter); #endif +u8 rtw_mi_get_ld_sta_ifbmp(_adapter *adapter); +u8 rtw_mi_get_ap_mesh_ifbmp(_adapter *adapter); void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b); #endif /*__RTW_MI_H_*/ diff --git a/include/rtw_mlme.h b/include/rtw_mlme.h index 13a39fb..e9f662a 100644 --- a/include/rtw_mlme.h +++ b/include/rtw_mlme.h @@ -56,7 +56,7 @@ #define WIFI_MP_CTX_CCK_CS 0x00200000 /* in continuous tx with carrier suppression */ #define WIFI_MP_LPBK_STATE 0x00400000 #define WIFI_OP_CH_SWITCHING 0x00800000 -/*#define WIFI_UNDEFINED_STATE 0x01000000*/ +#define WIFI_UNDER_KEY_HANDSHAKE 0x01000000 /*#define WIFI_UNDEFINED_STATE 0x02000000*/ /*#define WIFI_UNDEFINED_STATE 0x04000000*/ /*#define WIFI_UNDEFINED_STATE 0x08000000*/ @@ -158,6 +158,7 @@ enum { MLME_ADHOC_STOPPED, MLME_MESH_STARTED, MLME_MESH_STOPPED, + MLME_OPCH_SWITCH, }; #define _FW_UNDER_LINKING WIFI_UNDER_LINKING @@ -534,7 +535,7 @@ struct beacon_keys { int encryp_protocol; int pairwise_cipher; int group_cipher; - int is_8021x; + u32 akm; }; #ifdef CONFIG_RTW_80211R #define RTW_FT_ACTION_REQ_LMT 4 @@ -694,7 +695,7 @@ struct nb_rpt_hdr { u8 phy_type; }; -/*IEEE Std 80211v, Figure 7-95e2¡XBSS Termination Duration subelement field format */ +/*IEEE Std 80211v, Figure 7-95e2\A1XBSS Termination Duration subelement field format */ struct btm_term_duration { u8 id; u8 len; @@ -702,7 +703,7 @@ struct btm_term_duration { u16 duration; }; -/*IEEE Std 80211v, Figure 7-101n8¡XBSS Transition Management Request frame body format */ +/*IEEE Std 80211v, Figure 7-101n8\A1XBSS Transition Management Request frame body format */ struct btm_req_hdr { u8 req_mode; u16 disassoc_timer; @@ -755,10 +756,11 @@ struct mlme_priv { struct wlan_network *roam_network; /* the target of active roam */ u8 roam_flags; u8 roam_rssi_diff_th; /* rssi difference threshold for active scan candidate selection */ - u32 roam_scan_int_ms; /* scan interval for active roam */ + u32 roam_scan_int; /* scan interval for active roam (Unit:2 second)*/ u32 roam_scanr_exp_ms; /* scan result expire time in ms for roam */ u8 roam_tgt_addr[ETH_ALEN]; /* request to roam to speicific target without other consideration */ u8 roam_rssi_threshold; + systime last_roaming; bool need_to_roam; #endif @@ -778,14 +780,16 @@ struct mlme_priv { /* bcn check info */ struct beacon_keys cur_beacon_keys; /* save current beacon keys */ +#ifdef CONFIG_BCN_CNT_CONFIRM_HDL struct beacon_keys new_beacon_keys; /* save new beacon keys */ u8 new_beacon_cnts; /* if new_beacon_cnts >= threshold, ap beacon is changed */ +#endif #ifdef CONFIG_ARP_KEEP_ALIVE /* for arp offload keep alive */ u8 bGetGateway; u8 GetGatewayTryCnt; - u8 gw_mac_addr[6]; + u8 gw_mac_addr[ETH_ALEN]; u8 gw_ip[4]; #endif @@ -805,6 +809,7 @@ struct mlme_priv { _timer set_scan_deny_timer; ATOMIC_T set_scan_deny; /* 0: allowed, 1: deny */ #endif + u8 wpa_phase;/*wpa_phase after wps finished*/ struct qos_priv qospriv; @@ -825,22 +830,16 @@ struct mlme_priv { #ifdef CONFIG_80211AC_VHT struct vht_priv vhtpriv; -#endif -#ifdef CONFIG_BEAMFORMING -#ifndef RTW_BEAMFORMING_VERSION_2 -#if (BEAMFORMING_SUPPORT == 0)/*for driver beamforming*/ - struct beamforming_info beamforming_info; -#endif -#endif /* !RTW_BEAMFORMING_VERSION_2 */ +#ifdef ROKU_PRIVATE + /*infra mode, used to store AP's info*/ + struct vht_priv_infra_ap vhtpriv_infra_ap; +#endif /* ROKU_PRIVATE */ #endif -#ifdef CONFIG_DFS - u8 handle_dfs; -#endif -#ifdef CONFIG_DFS_MASTER - /* TODO: move to rfctl */ - _timer dfs_master_timer; -#endif +#ifdef ROKU_PRIVATE + struct ht_priv_infra_ap htpriv_infra_ap; +#endif /* ROKU_PRIVATE */ + #ifdef CONFIG_RTW_80211R struct ft_roam_info ft_roam; #endif @@ -971,43 +970,11 @@ struct mlme_priv { _workitem Linkup_workitem; _workitem Linkdown_workitem; #endif - -#ifdef CONFIG_INTEL_WIDI - int widi_state; - int listen_state; - _timer listen_timer; - ATOMIC_T rx_probe_rsp; /* 1:receive probe respone from RDS source. */ - u8 *l2sdTaBuffer; - u8 channel_idx; - u8 group_cnt; /* In WiDi 3.5, they specified another scan algo. for WFD/RDS co-existed */ - u8 sa_ext[L2SDTA_SERVICE_VE_LEN]; - - u8 widi_enable; - /** - * For WiDi 4; upper layer would set - * p2p_primary_device_type_category_id - * p2p_primary_device_type_sub_category_id - * p2p_secondary_device_type_category_id - * p2p_secondary_device_type_sub_category_id - */ - u16 p2p_pdt_cid; - u16 p2p_pdt_scid; - u8 num_p2p_sdt; - u16 p2p_sdt_cid[MAX_NUM_P2P_SDT]; - u16 p2p_sdt_scid[MAX_NUM_P2P_SDT]; - u8 p2p_reject_disable; /* When starting NL80211 wpa_supplicant/hostapd, it will call netdev_close */ - /* such that it will cause p2p disabled. Use this flag to reject. */ -#endif /* CONFIG_INTEL_WIDI */ systime lastscantime; #ifdef CONFIG_CONCURRENT_MODE u8 scanning_via_buddy_intf; #endif -#if 0 - u8 NumOfBcnInfoChkFail; - u32 timeBcnInfoChkStart; -#endif - #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE u32 vendor_ie_mask[WLAN_MAX_VENDOR_IE_NUM]; u8 vendor_ie[WLAN_MAX_VENDOR_IE_NUM][WLAN_MAX_VENDOR_IE_LEN]; @@ -1201,6 +1168,9 @@ void rtw_scan_abort_no_wait(_adapter *adapter); void rtw_scan_abort(_adapter *adapter); u32 rtw_join_abort_timeout(_adapter *adapter, u32 timeout_ms); +int rtw_cached_pmkid(_adapter *Adapter, u8 *bssid); +int rtw_rsn_sync_pmkid(_adapter *adapter, u8 *ie, uint ie_len, int i_ent); + extern int rtw_restruct_sec_ie(_adapter *adapter, u8 *out_ie); #ifdef CONFIG_WMMPS_STA void rtw_uapsd_use_default_setting(_adapter *padapter); @@ -1219,6 +1189,29 @@ extern void rtw_scan_timeout_handler(void *ctx); extern void rtw_dynamic_check_timer_handlder(void *ctx); extern void rtw_iface_dynamic_check_timer_handlder(_adapter *adapter); +enum { + SS_DENY_MP_MODE, + SS_DENY_RSON_SCANING, + SS_DENY_BLOCK_SCAN, + SS_DENY_BY_DRV, + SS_DENY_SELF_AP_UNDER_WPS, + SS_DENY_SELF_AP_UNDER_LINKING, + SS_DENY_SELF_AP_UNDER_SURVEY, + /*SS_DENY_SELF_STA_UNDER_WPS,*/ + SS_DENY_SELF_STA_UNDER_LINKING, + SS_DENY_SELF_STA_UNDER_SURVEY, + SS_DENY_BUDDY_UNDER_LINK_WPS, + SS_DENY_BUDDY_UNDER_SURVEY, + SS_DENY_BUSY_TRAFFIC, + SS_ALLOW, +#ifdef DBG_LA_MODE + SS_DENY_LA_MODE, +#endif +}; + +u8 _rtw_sitesurvey_condition_check(const char *caller, _adapter *adapter, bool check_sc_interval); +#define rtw_sitesurvey_condition_check(adapter, check_sc_interval) _rtw_sitesurvey_condition_check(__func__, adapter, check_sc_interval) + #ifdef CONFIG_SET_SCAN_DENY_TIMER bool rtw_is_scan_deny(_adapter *adapter); void rtw_clear_scan_deny(_adapter *adapter); @@ -1327,11 +1320,39 @@ u8 rtw_sta_media_status_rpt_cmd(_adapter *adapter, struct sta_info *sta, bool co void rtw_sta_media_status_rpt_cmd_hdl(_adapter *adapter, struct sta_media_status_rpt_cmd_parm *parm); void rtw_sta_traffic_info(void *sel, _adapter *adapter); -#ifdef CONFIG_INTEL_PROXIM -void rtw_proxim_enable(_adapter *padapter); -void rtw_proxim_disable(_adapter *padapter); -void rtw_proxim_send_packet(_adapter *padapter, u8 *pbuf, u16 len, u8 m_rate); -#endif /* CONFIG_INTEL_PROXIM */ +#define GET_ARP_HTYPE(_arp) BE_BITS_TO_2BYTE(((u8 *)(_arp)) + 0, 0, 16) +#define GET_ARP_PTYPE(_arp) BE_BITS_TO_2BYTE(((u8 *)(_arp)) + 2, 0, 16) +#define GET_ARP_HLEN(_arp) BE_BITS_TO_1BYTE(((u8 *)(_arp)) + 4, 0, 8) +#define GET_ARP_PLEN(_arp) BE_BITS_TO_1BYTE(((u8 *)(_arp)) + 5, 0, 8) +#define GET_ARP_OPER(_arp) BE_BITS_TO_2BYTE(((u8 *)(_arp)) + 6, 0, 16) + +#define SET_ARP_HTYPE(_arp, _val) SET_BITS_TO_BE_2BYTE(((u8 *)(_arp)) + 0, 0, 16, _val) +#define SET_ARP_PTYPE(_arp, _val) SET_BITS_TO_BE_2BYTE(((u8 *)(_arp)) + 2, 0, 16, _val) +#define SET_ARP_HLEN(_arp, _val) SET_BITS_TO_BE_1BYTE(((u8 *)(_arp)) + 4, 0, 8, _val) +#define SET_ARP_PLEN(_arp, _val) SET_BITS_TO_BE_1BYTE(((u8 *)(_arp)) + 5, 0, 8, _val) +#define SET_ARP_OPER(_arp, _val) SET_BITS_TO_BE_2BYTE(((u8 *)(_arp)) + 6, 0, 16, _val) + +#define ARP_SHA(_arp, _hlen, _plen) (((u8 *)(_arp)) + 8) +#define ARP_SPA(_arp, _hlen, _plen) (((u8 *)(_arp)) + 8 + (_hlen)) +#define ARP_THA(_arp, _hlen, _plen) (((u8 *)(_arp)) + 8 + (_hlen) + (_plen)) +#define ARP_TPA(_arp, _hlen, _plen) (((u8 *)(_arp)) + 8 + 2 * (_hlen) + (_plen)) + +#define ARP_SENDER_MAC_ADDR(_arp) ARP_SHA(_arp, ETH_ALEN, RTW_IP_ADDR_LEN) +#define ARP_SENDER_IP_ADDR(_arp) ARP_SPA(_arp, ETH_ALEN, RTW_IP_ADDR_LEN) +#define ARP_TARGET_MAC_ADDR(_arp) ARP_THA(_arp, ETH_ALEN, RTW_IP_ADDR_LEN) +#define ARP_TARGET_IP_ADDR(_arp) ARP_TPA(_arp, ETH_ALEN, RTW_IP_ADDR_LEN) + +#define GET_ARP_SENDER_MAC_ADDR(_arp, _val) _rtw_memcpy(_val, ARP_SENDER_MAC_ADDR(_arp), ETH_ALEN) +#define GET_ARP_SENDER_IP_ADDR(_arp, _val) _rtw_memcpy(_val, ARP_SENDER_IP_ADDR(_arp), RTW_IP_ADDR_LEN) +#define GET_ARP_TARGET_MAC_ADDR(_arp, _val) _rtw_memcpy(_val, ARP_TARGET_MAC_ADDR(_arp), ETH_ALEN) +#define GET_ARP_TARGET_IP_ADDR(_arp, _val) _rtw_memcpy(_val, ARP_TARGET_IP_ADDR(_arp), RTW_IP_ADDR_LEN) + +#define SET_ARP_SENDER_MAC_ADDR(_arp, _val) _rtw_memcpy(ARP_SENDER_MAC_ADDR(_arp), _val, ETH_ALEN) +#define SET_ARP_SENDER_IP_ADDR(_arp, _val) _rtw_memcpy(ARP_SENDER_IP_ADDR(_arp), _val, RTW_IP_ADDR_LEN) +#define SET_ARP_TARGET_MAC_ADDR(_arp, _val) _rtw_memcpy(ARP_TARGET_MAC_ADDR(_arp), _val, ETH_ALEN) +#define SET_ARP_TARGET_IP_ADDR(_arp, _val) _rtw_memcpy(ARP_TARGET_IP_ADDR(_arp), _val, RTW_IP_ADDR_LEN) + +void dump_arp_pkt(void *sel, u8 *da, u8 *sa, u8 *arp, bool tx); #define IPV4_SRC(_iphdr) (((u8 *)(_iphdr)) + 12) #define IPV4_DST(_iphdr) (((u8 *)(_iphdr)) + 16) diff --git a/include/rtw_mlme_ext.h b/include/rtw_mlme_ext.h index 2f3bb70..2f0f468 100644 --- a/include/rtw_mlme_ext.h +++ b/include/rtw_mlme_ext.h @@ -88,146 +88,11 @@ extern unsigned char P2P_OUI[]; extern unsigned char WMM_INFO_OUI[]; extern unsigned char WMM_PARA_OUI[]; -typedef enum _RT_CHANNEL_DOMAIN { - /* ===== 0x00 ~ 0x1F, legacy channel plan ===== */ - RTW_CHPLAN_FCC = 0x00, - RTW_CHPLAN_IC = 0x01, - RTW_CHPLAN_ETSI = 0x02, - RTW_CHPLAN_SPAIN = 0x03, - RTW_CHPLAN_FRANCE = 0x04, - RTW_CHPLAN_MKK = 0x05, - RTW_CHPLAN_MKK1 = 0x06, - RTW_CHPLAN_ISRAEL = 0x07, - RTW_CHPLAN_TELEC = 0x08, - RTW_CHPLAN_GLOBAL_DOAMIN = 0x09, - RTW_CHPLAN_WORLD_WIDE_13 = 0x0A, - RTW_CHPLAN_TAIWAN = 0x0B, - RTW_CHPLAN_CHINA = 0x0C, - RTW_CHPLAN_SINGAPORE_INDIA_MEXICO = 0x0D, - RTW_CHPLAN_KOREA = 0x0E, - RTW_CHPLAN_TURKEY = 0x0F, - RTW_CHPLAN_JAPAN = 0x10, - RTW_CHPLAN_FCC_NO_DFS = 0x11, - RTW_CHPLAN_JAPAN_NO_DFS = 0x12, - RTW_CHPLAN_WORLD_WIDE_5G = 0x13, - RTW_CHPLAN_TAIWAN_NO_DFS = 0x14, - - /* ===== 0x20 ~ 0x7F, new channel plan ===== */ - RTW_CHPLAN_WORLD_NULL = 0x20, - RTW_CHPLAN_ETSI1_NULL = 0x21, - RTW_CHPLAN_FCC1_NULL = 0x22, - RTW_CHPLAN_MKK1_NULL = 0x23, - RTW_CHPLAN_ETSI2_NULL = 0x24, - RTW_CHPLAN_FCC1_FCC1 = 0x25, - RTW_CHPLAN_WORLD_ETSI1 = 0x26, - RTW_CHPLAN_MKK1_MKK1 = 0x27, - RTW_CHPLAN_WORLD_KCC1 = 0x28, - RTW_CHPLAN_WORLD_FCC2 = 0x29, - RTW_CHPLAN_FCC2_NULL = 0x2A, - RTW_CHPLAN_IC1_IC2 = 0x2B, - RTW_CHPLAN_MKK2_NULL = 0x2C, - RTW_CHPLAN_WORLD_CHILE1= 0x2D, - RTW_CHPLAN_WORLD1_WORLD1 = 0x2E, - RTW_CHPLAN_WORLD_CHILE2 = 0x2F, - RTW_CHPLAN_WORLD_FCC3 = 0x30, - RTW_CHPLAN_WORLD_FCC4 = 0x31, - RTW_CHPLAN_WORLD_FCC5 = 0x32, - RTW_CHPLAN_WORLD_FCC6 = 0x33, - RTW_CHPLAN_FCC1_FCC7 = 0x34, - RTW_CHPLAN_WORLD_ETSI2 = 0x35, - RTW_CHPLAN_WORLD_ETSI3 = 0x36, - RTW_CHPLAN_MKK1_MKK2 = 0x37, - RTW_CHPLAN_MKK1_MKK3 = 0x38, - RTW_CHPLAN_FCC1_NCC1 = 0x39, - RTW_CHPLAN_ETSI1_ETSI1 = 0x3A, - RTW_CHPLAN_ETSI1_ACMA1 = 0x3B, - RTW_CHPLAN_ETSI1_ETSI6 = 0x3C, - RTW_CHPLAN_ETSI1_ETSI12 = 0x3D, - RTW_CHPLAN_FCC1_NCC2 = 0x40, - RTW_CHPLAN_GLOBAL_NULL = 0x41, - RTW_CHPLAN_ETSI1_ETSI4 = 0x42, - RTW_CHPLAN_FCC1_FCC2 = 0x43, - RTW_CHPLAN_FCC1_NCC3 = 0x44, - RTW_CHPLAN_WORLD_ACMA1 = 0x45, - RTW_CHPLAN_FCC1_FCC8 = 0x46, - RTW_CHPLAN_WORLD_ETSI6 = 0x47, - RTW_CHPLAN_WORLD_ETSI7 = 0x48, - RTW_CHPLAN_WORLD_ETSI8 = 0x49, - RTW_CHPLAN_WORLD_ETSI9 = 0x50, - RTW_CHPLAN_WORLD_ETSI10 = 0x51, - RTW_CHPLAN_WORLD_ETSI11 = 0x52, - RTW_CHPLAN_FCC1_NCC4 = 0x53, - RTW_CHPLAN_WORLD_ETSI12 = 0x54, - RTW_CHPLAN_FCC1_FCC9 = 0x55, - RTW_CHPLAN_WORLD_ETSI13 = 0x56, - RTW_CHPLAN_FCC1_FCC10 = 0x57, - RTW_CHPLAN_MKK2_MKK4 = 0x58, - RTW_CHPLAN_WORLD_ETSI14 = 0x59, - RTW_CHPLAN_FCC1_FCC5 = 0x60, - RTW_CHPLAN_FCC2_FCC7 = 0x61, - RTW_CHPLAN_FCC2_FCC1 = 0x62, - RTW_CHPLAN_WORLD_ETSI15 = 0x63, - RTW_CHPLAN_MKK2_MKK5 = 0x64, - RTW_CHPLAN_ETSI1_ETSI16 = 0x65, - RTW_CHPLAN_FCC1_FCC14 = 0x66, - RTW_CHPLAN_FCC1_FCC12 = 0x67, - RTW_CHPLAN_FCC2_FCC14 = 0x68, - RTW_CHPLAN_FCC2_FCC12 = 0x69, - RTW_CHPLAN_ETSI1_ETSI17 = 0x6A, - RTW_CHPLAN_WORLD_FCC16 = 0x6B, - RTW_CHPLAN_WORLD_FCC13 = 0x6C, - RTW_CHPLAN_FCC2_FCC15 = 0x6D, - RTW_CHPLAN_WORLD_FCC12 = 0x6E, - RTW_CHPLAN_NULL_ETSI8 = 0x6F, - RTW_CHPLAN_NULL_ETSI18 = 0x70, - RTW_CHPLAN_NULL_ETSI17 = 0x71, - RTW_CHPLAN_NULL_ETSI19 = 0x72, - RTW_CHPLAN_WORLD_FCC7 = 0x73, - RTW_CHPLAN_FCC2_FCC17 = 0x74, - RTW_CHPLAN_WORLD_ETSI20 = 0x75, - RTW_CHPLAN_FCC2_FCC11 = 0x76, - RTW_CHPLAN_WORLD_ETSI21 = 0x77, - RTW_CHPLAN_FCC1_FCC18 = 0x78, - RTW_CHPLAN_MKK2_MKK1 = 0x79, - - RTW_CHPLAN_MAX, - RTW_CHPLAN_REALTEK_DEFINE = 0x7F, - RTW_CHPLAN_UNSPECIFIED = 0xFF, -} RT_CHANNEL_DOMAIN, *PRT_CHANNEL_DOMAIN; - -bool rtw_chplan_is_empty(u8 id); -#define rtw_is_channel_plan_valid(chplan) (((chplan) < RTW_CHPLAN_MAX || (chplan) == RTW_CHPLAN_REALTEK_DEFINE) && !rtw_chplan_is_empty(chplan)) -#define rtw_is_legacy_channel_plan(chplan) ((chplan) < 0x20) - typedef struct _RT_CHANNEL_PLAN { unsigned char Channel[MAX_CHANNEL_NUM]; unsigned char Len; } RT_CHANNEL_PLAN, *PRT_CHANNEL_PLAN; -struct ch_list_t { - u8 *len_ch; -}; - -#define CH_LIST_ENT(_len, arg...) \ - {.len_ch = (u8[_len + 1]) {_len, ##arg}, } - -#define CH_LIST_LEN(_ch_list) (_ch_list.len_ch[0]) -#define CH_LIST_CH(_ch_list, _i) (_ch_list.len_ch[_i + 1]) - -typedef struct _RT_CHANNEL_PLAN_MAP { - u8 Index2G; -#ifdef CONFIG_IEEE80211_BAND_5GHZ - u8 Index5G; -#endif - u8 regd; /* value of REGULATION_TXPWR_LMT */ -} RT_CHANNEL_PLAN_MAP, *PRT_CHANNEL_PLAN_MAP; - -#ifdef CONFIG_IEEE80211_BAND_5GHZ -#define CHPLAN_ENT(i2g, i5g, regd) {i2g, i5g, regd} -#else -#define CHPLAN_ENT(i2g, i5g, regd) {i2g, regd} -#endif - enum Associated_AP { atherosAP = 0, broadcomAP = 1, @@ -262,6 +127,24 @@ typedef enum _HT_IOT_PEER { HT_IOT_PEER_MAX = 18 } HT_IOT_PEER_E, *PHTIOT_PEER_E; + +typedef enum _RT_HT_INF0_CAP { + RT_HT_CAP_USE_TURBO_AGGR = 0x01, + RT_HT_CAP_USE_LONG_PREAMBLE = 0x02, + RT_HT_CAP_USE_AMPDU = 0x04, + RT_HT_CAP_USE_WOW = 0x8, + RT_HT_CAP_USE_SOFTAP = 0x10, + RT_HT_CAP_USE_92SE = 0x20, + RT_HT_CAP_USE_88C_92C = 0x40, + RT_HT_CAP_USE_AP_CLIENT_MODE = 0x80, /* AP team request to reserve this bit, by Emily */ +} RT_HT_INF0_CAPBILITY, *PRT_HT_INF0_CAPBILITY; + +typedef enum _RT_HT_INF1_CAP { + RT_HT_CAP_USE_VIDEO_CLIENT = 0x01, + RT_HT_CAP_USE_JAGUAR_BCUT = 0x02, + RT_HT_CAP_USE_JAGUAR_CCUT = 0x04, +} RT_HT_INF1_CAPBILITY, *PRT_HT_INF1_CAPBILITY; + struct mlme_handler { unsigned int num; char *str; @@ -393,6 +276,10 @@ enum TDLS_option { #endif /* CONFIG_TDLS */ +#if (KERNEL_VERSION(3, 8, 0) > LINUX_VERSION_CODE) +#define NL80211_AUTHTYPE_SAE (__NL80211_AUTHTYPE_NUM + 1) +#endif + /* * Usage: * When one iface acted as AP mode and the other iface is STA mode and scanning, @@ -472,6 +359,11 @@ struct mlme_ext_info { struct HT_caps_element HT_caps; struct HT_info_element HT_info; WLAN_BSSID_EX network;/* join network or bss_network, if in ap mode, it is the same to cur_network.network */ +#ifdef ROKU_PRIVATE + /*infra mode, store supported rates from AssocRsp*/ + NDIS_802_11_RATES_EX SupportedRates_infra_ap; + u8 ht_vht_received;/*ht_vht_received used to show debug msg BIT(0):HT BIT(1):VHT */ +#endif /* ROKU_PRIVATE */ }; /* The channel information about this channel including joining, scanning, and power constraints. */ @@ -490,20 +382,13 @@ typedef struct _RT_CHANNEL_INFO { #endif u8 hidden_bss_cnt; /* per scan count */ #endif - -#ifdef CONFIG_RTW_MESH - #if CONFIG_RTW_MESH_OFFCH_CAND - u8 mesh_candidate_cnt; /* update at scan done for specific mesh iface */ - #endif -#endif /* CONFIG_RTW_MESH */ } RT_CHANNEL_INFO, *PRT_CHANNEL_INFO; -#define DFS_MASTER_TIMER_MS 100 #define CAC_TIME_MS (60*1000) #define CAC_TIME_CE_MS (10*60*1000) #define NON_OCP_TIME_MS (30*60*1000) -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT void rtw_txpwr_init_regd(struct rf_ctl_t *rfctl); #endif void rtw_rfctl_init(_adapter *adapter); @@ -512,19 +397,21 @@ void rtw_rfctl_deinit(_adapter *adapter); #ifdef CONFIG_DFS_MASTER struct rf_ctl_t; #define CH_IS_NON_OCP(rt_ch_info) (rtw_time_after((rt_ch_info)->non_ocp_end_time, rtw_get_current_time())) -bool rtw_is_cac_reset_needed(_adapter *adapter, u8 ch, u8 bw, u8 offset); +bool rtw_is_cac_reset_needed(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset); bool _rtw_rfctl_overlap_radar_detect_ch(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset); bool rtw_rfctl_overlap_radar_detect_ch(struct rf_ctl_t *rfctl); bool rtw_rfctl_is_tx_blocked_by_ch_waiting(struct rf_ctl_t *rfctl); -bool rtw_chset_is_ch_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset); +bool rtw_chset_is_chbw_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset); +bool rtw_chset_is_ch_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch); void rtw_chset_update_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset); void rtw_chset_update_non_ocp_ms(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset, int ms); -u32 rtw_get_ch_waiting_ms(_adapter *adapter, u8 ch, u8 bw, u8 offset, u32 *r_non_ocp_ms, u32 *r_cac_ms); -void rtw_reset_cac(_adapter *adapter, u8 ch, u8 bw, u8 offset); -u32 rtw_force_stop_cac(_adapter *adapter, u32 timeout_ms); +u32 rtw_get_ch_waiting_ms(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, u32 *r_non_ocp_ms, u32 *r_cac_ms); +void rtw_reset_cac(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset); +u32 rtw_force_stop_cac(struct rf_ctl_t *rfctl, u32 timeout_ms); #else #define CH_IS_NON_OCP(rt_ch_info) 0 -#define rtw_chset_is_ch_non_ocp(ch_set, ch, bw, offset) _FALSE +#define rtw_chset_is_chbw_non_ocp(ch_set, ch, bw, offset) _FALSE +#define rtw_chset_is_ch_non_ocp(ch_set, ch) _FALSE #define rtw_rfctl_is_tx_blocked_by_ch_waiting(rfctl) _FALSE #endif @@ -538,16 +425,12 @@ enum { RTW_CHF_NON_OCP = BIT6, }; -bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 sel_ch, u8 max_bw +bool rtw_choose_shortest_waiting_ch(struct rf_ctl_t *rfctl, u8 sel_ch, u8 max_bw , u8 *dec_ch, u8 *dec_bw, u8 *dec_offset - , u8 d_flags, u8 cur_ch, u8 same_band_prefer); + , u8 d_flags, u8 cur_ch, u8 same_band_prefer, u8 mesh_only); -void dump_country_chplan(void *sel, const struct country_chplan *ent); -void dump_country_chplan_map(void *sel); -void dump_chplan_id_list(void *sel); -void dump_chplan_test(void *sel); void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set); -void dump_cur_chset(void *sel, _adapter *adapter); +void dump_cur_chset(void *sel, struct rf_ctl_t *rfctl); int rtw_chset_search_ch(RT_CHANNEL_INFO *ch_set, const u32 ch); u8 rtw_chset_is_chbw_valid(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset); @@ -643,15 +526,16 @@ struct mlme_ext_priv { u32 retry; /* retry for issue probereq */ u64 TSFValue; - - /* for LPS-32K to adaptive bcn early and timeout */ - u8 adaptive_tsf_done; - u32 bcn_delay_cnt[9]; - u32 bcn_delay_ratio[9]; u32 bcn_cnt; - u8 DrvBcnEarly; - u8 DrvBcnTimeOut; - + u32 last_bcn_cnt; + u8 cur_bcn_cnt;/*2s*/ + u8 dtim;/*DTIM Period*/ +#ifdef DBG_RX_BCN + u8 tim[4]; +#endif +#ifdef CONFIG_BCN_RECV_TIME + u16 bcn_rx_time; +#endif #ifdef CONFIG_AP_MODE unsigned char bstart_bss; #endif @@ -669,8 +553,34 @@ struct mlme_ext_priv { #ifdef DBG_FIXED_CHAN u8 fixed_chan; #endif - /* set hw sync bcn tsf register or not */ - u8 en_hw_update_tsf; + + u8 tsf_update_required:1; + u8 en_hw_update_tsf:1; /* set hw sync bcn tsf register or not */ + systime tsf_update_pause_stime; + u8 tsf_update_pause_factor; /* num of bcn intervals to stay TSF update pause status */ + u8 tsf_update_restore_factor; /* num of bcn interval to stay TSF update restore status */ +#ifdef CONFIG_SUPPORT_STATIC_SMPS + u8 ssmps_en; + u16 ssmps_tx_tp_th;/*Mbps*/ + u16 ssmps_rx_tp_th;/*Mbps*/ + #ifdef DBG_STATIC_SMPS + u8 ssmps_test; + u8 ssmps_test_en; + #endif +#endif +#ifdef CONFIG_CTRL_TXSS_BY_TP + u8 txss_ctrl_en; + u16 txss_tp_th;/*Mbps*/ + u8 txss_tp_chk_cnt;/*unit 2s*/ + bool txss_1ss; + u8 txss_momi_type_bk; +#endif +}; + +struct support_rate_handler { + u8 rate; + bool basic; + bool existence; }; static inline u8 check_mlmeinfo_state(struct mlme_ext_priv *plmeext, sint state) @@ -773,6 +683,8 @@ void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 ch); void Set_MSR(_adapter *padapter, u8 type); +void rtw_set_external_auth_status(_adapter *padapter, const void *data, int len); + u8 rtw_get_oper_ch(_adapter *adapter); void rtw_set_oper_ch(_adapter *adapter, u8 ch); u8 rtw_get_oper_bw(_adapter *adapter); @@ -804,7 +716,6 @@ void write_cam_cache(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key); void clear_cam_cache(_adapter *adapter, u8 id); void invalidate_cam_all(_adapter *padapter); -void CAM_empty_entry(PADAPTER Adapter, u8 ucIndex); void flush_all_cam_entry(_adapter *padapter); @@ -822,6 +733,10 @@ int is_client_associated_to_ibss(_adapter *padapter); int is_IBSS_empty(_adapter *padapter); unsigned char check_assoc_AP(u8 *pframe, uint len); +void get_assoc_AP_Vendor(char *vendor, u8 assoc_AP_vendor); +#ifdef CONFIG_RTS_FULL_BW +void rtw_parse_sta_vendor_ie_8812(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len); +#endif/*CONFIG_RTS_FULL_BW*/ #ifdef CONFIG_80211AC_VHT unsigned char get_vht_mu_bfer_cap(u8 *pframe, uint len); #endif @@ -834,13 +749,24 @@ void rtw_process_wfd_ies(_adapter *adapter, u8 *ies, u8 ies_len, const char *tag void WMMOnAssocRsp(_adapter *padapter); void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); +#ifdef ROKU_PRIVATE +void HT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); +#endif void HT_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); void HTOnAssocRsp(_adapter *padapter); +#ifdef ROKU_PRIVATE +void Supported_rate_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); +void Extended_Supported_rate_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); +#endif + void ERP_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); void VCS_update(_adapter *padapter, struct sta_info *psta); void update_ldpc_stbc_cap(struct sta_info *psta); +bool rtw_validate_value(u16 EID, u8 *p, u16 len); +bool hidden_ssid_ap(WLAN_BSSID_EX *snetwork); +void rtw_absorb_ssid_ifneed(_adapter *padapter, WLAN_BSSID_EX *bssid, u8 *pframe); int rtw_get_bcn_keys(ADAPTER *Adapter, u8 *pframe, u32 packet_len, struct beacon_keys *recv_beacon); int validate_beacon_len(u8 *pframe, uint len); @@ -874,6 +800,8 @@ unsigned int is_ap_in_tkip(_adapter *padapter); unsigned int is_ap_in_wep(_adapter *padapter); unsigned int should_forbid_n_rate(_adapter *padapter); +void parsing_eapol_packet(_adapter *padapter, u8 *key_payload, struct sta_info *psta, u8 trx_type); + bool _rtw_camctl_chk_cap(_adapter *adapter, u8 cap); void _rtw_camctl_set_flags(_adapter *adapter, u32 flags); void rtw_camctl_set_flags(_adapter *adapter, u32 flags); @@ -906,7 +834,7 @@ s8 rtw_macid_get_ch_g(struct macid_ctl_t *macid_ctl, u8 id); void rtw_alloc_macid(_adapter *padapter, struct sta_info *psta); void rtw_release_macid(_adapter *padapter, struct sta_info *psta); u8 rtw_search_max_mac_id(_adapter *padapter); -void rtw_macid_ctl_set_h2c_msr(struct macid_ctl_t *macid_ctl, u8 id, u8 h2c_msr); +u8 rtw_macid_ctl_set_h2c_msr(struct macid_ctl_t *macid_ctl, u8 id, u8 h2c_msr); void rtw_macid_ctl_set_bw(struct macid_ctl_t *macid_ctl, u8 id, u8 bw); void rtw_macid_ctl_set_vht_en(struct macid_ctl_t *macid_ctl, u8 id, u8 en); void rtw_macid_ctl_set_rate_bmp0(struct macid_ctl_t *macid_ctl, u8 id, u32 bmp); @@ -1082,8 +1010,14 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res); void mlmeext_sta_del_event_callback(_adapter *padapter); void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta); +int rtw_get_rx_chk_limit(_adapter *adapter); +void rtw_set_rx_chk_limit(_adapter *adapter, int limit); void linked_status_chk(_adapter *padapter, u8 from_timer); +#define rtw_get_bcn_cnt(adapter) (adapter->mlmeextpriv.cur_bcn_cnt) +#define rtw_get_bcn_dtim_period(adapter) (adapter->mlmeextpriv.dtim) +void rtw_collect_bcn_info(_adapter *adapter); + void _linked_info_dump(_adapter *padapter); void survey_timer_hdl(void *ctx); @@ -1112,6 +1046,8 @@ void reassoc_timer_hdl(_adapter *padapter); _set_timer(&(mlmeext)->link_timer, (ms)); \ } while (0) +bool rtw_is_cck_rate(u8 rate); +bool rtw_is_ofdm_rate(u8 rate); bool rtw_is_basic_rate_cck(u8 rate); bool rtw_is_basic_rate_ofdm(u8 rate); bool rtw_is_basic_rate_mix(u8 rate); @@ -1122,8 +1058,10 @@ extern int cckratesonly_included(unsigned char *rate, int ratelen); extern void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr); extern void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len); -extern void correct_TSF(_adapter *padapter, struct mlme_ext_priv *pmlmeext); -extern void adaptive_early_32k(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len); +extern void correct_TSF(_adapter *padapter, u8 mlme_state); +#ifdef CONFIG_BCN_RECV_TIME +void rtw_rx_bcn_time_update(_adapter *adapter, uint bcn_len, u8 data_rate); +#endif extern u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer); void rtw_process_bar_frame(_adapter *padapter, union recv_frame *precv_frame); @@ -1181,6 +1119,8 @@ u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf); u8 run_in_thread_hdl(_adapter *padapter, u8 *pbuf); u8 rtw_getmacreg_hdl(_adapter *padapter, u8 *pbuf); +int rtw_sae_preprocess(_adapter *adapter, const u8 *buf, u32 len, u8 tx); + #define GEN_DRV_CMD_HANDLER(size, cmd) {size, &cmd ## _hdl}, #define GEN_MLME_EXT_HANDLER(size, cmd) {size, cmd}, @@ -1251,7 +1191,7 @@ struct cmd_hdl wlancmds[] = { GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelPlan_param), set_chplan_hdl) /*59*/ GEN_MLME_EXT_HANDLER(sizeof(struct LedBlink_param), led_blink_hdl) /*60*/ - GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelSwitch_param), set_csa_hdl) /*61*/ + GEN_MLME_EXT_HANDLER(0, set_csa_hdl) /*61*/ GEN_MLME_EXT_HANDLER(sizeof(struct TDLSoption_param), tdls_hdl) /*62*/ GEN_MLME_EXT_HANDLER(0, chk_bmc_sleepq_hdl) /*63*/ GEN_MLME_EXT_HANDLER(sizeof(struct RunInThread_param), run_in_thread_hdl) /*64*/ diff --git a/include/rtw_mp.h b/include/rtw_mp.h index 5d19e5c..3b2a40f 100644 --- a/include/rtw_mp.h +++ b/include/rtw_mp.h @@ -19,6 +19,7 @@ #define MAX_MP_XMITBUF_SZ 2048 #define NR_MP_XMITFRAME 8 +#define MP_READ_REG_MAX_OFFSET 0x4FFF struct mp_xmit_frame { _list list; @@ -35,18 +36,8 @@ struct mp_xmit_frame { /* insert urb, irp, and irpcnt info below... */ /* max frag_cnt = 8 */ - u8 *mem_addr; u32 sz[8]; - -#if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX) - PURB pxmit_urb[8]; -#endif - -#ifdef PLATFORM_OS_XP - PIRP pxmit_irp[8]; -#endif - u8 bpending[8]; sint ac_tag[8]; sint last[8]; @@ -66,21 +57,6 @@ struct mp_wiparam { typedef void(*wi_act_func)(void *padapter); -#ifdef PLATFORM_WINDOWS -struct mp_wi_cntx { - u8 bmpdrv_unload; - - /* Work Item */ - NDIS_WORK_ITEM mp_wi; - NDIS_EVENT mp_wi_evt; - _lock mp_wi_lock; - u8 bmp_wi_progress; - wi_act_func curractfunc; - /* Variable needed in each implementation of CurrActFunc. */ - struct mp_wiparam param; -}; -#endif - struct mp_tx { u8 stop; u32 count, sended; @@ -100,11 +76,11 @@ struct mp_tx { typedef struct _RT_PMAC_PKT_INFO { - UCHAR MCS; - UCHAR Nss; - UCHAR Nsts; - UINT N_sym; - UCHAR SIGA2B3; + u8 MCS; + u8 Nss; + u8 Nsts; + u32 N_sym; + u8 SIGA2B3; } RT_PMAC_PKT_INFO, *PRT_PMAC_PKT_INFO; typedef struct _RT_PMAC_TX_INFO { @@ -121,14 +97,14 @@ typedef struct _RT_PMAC_TX_INFO { u8 NDP_sound:1; u8 BandWidth:3; /* 0: 20 1:40 2:80Mhz */ u8 m_STBC; /* bSTBC + 1 */ - USHORT PacketPeriod; - UINT PacketCount; - UINT PacketLength; + u16 PacketPeriod; + u32 PacketCount; + u32 PacketLength; u8 PacketPattern; - USHORT SFD; + u16 SFD; u8 SignalField; u8 ServiceField; - USHORT LENGTH; + u16 LENGTH; u8 CRC16[2]; u8 LSIG[3]; u8 HT_SIG[6]; @@ -140,7 +116,7 @@ typedef struct _RT_PMAC_TX_INFO { } RT_PMAC_TX_INFO, *PRT_PMAC_TX_INFO; -typedef VOID (*MPT_WORK_ITEM_HANDLER)(IN PVOID Adapter); +typedef void (*MPT_WORK_ITEM_HANDLER)(void *Adapter); typedef struct _MPT_CONTEXT { /* Indicate if we have started Mass Production Test. */ BOOLEAN bMassProdTest; @@ -170,27 +146,27 @@ typedef struct _MPT_CONTEXT { MPT_WORK_ITEM_HANDLER CurrMptAct; /* 1=Start, 0=Stop from UI. */ - ULONG MptTestStart; + u32 MptTestStart; /* _TEST_MODE, defined in MPT_Req2.h */ - ULONG MptTestItem; + u32 MptTestItem; /* Variable needed in each implementation of CurrMptAct. */ - ULONG MptActType; /* Type of action performed in CurrMptAct. */ + u32 MptActType; /* Type of action performed in CurrMptAct. */ /* The Offset of IO operation is depend of MptActType. */ - ULONG MptIoOffset; + u32 MptIoOffset; /* The Value of IO operation is depend of MptActType. */ - ULONG MptIoValue; + u32 MptIoValue; /* The RfPath of IO operation is depend of MptActType. */ - ULONG mpt_rf_path; + u32 mpt_rf_path; WIRELESS_MODE MptWirelessModeToSw; /* Wireless mode to switch. */ u8 MptChannelToSw; /* Channel to switch. */ u8 MptInitGainToSet; /* Initial gain to set. */ - /* ULONG bMptAntennaA; */ /* TRUE if we want to use antenna A. */ - ULONG MptBandWidth; /* bandwidth to switch. */ + /* u32 bMptAntennaA; */ /* TRUE if we want to use antenna A. */ + u32 MptBandWidth; /* bandwidth to switch. */ - ULONG mpt_rate_index;/* rate index. */ + u32 mpt_rate_index;/* rate index. */ /* Register value kept for Single Carrier Tx test. */ u8 btMpCckTxPower; @@ -200,13 +176,13 @@ typedef struct _MPT_CONTEXT { u8 TxPwrLevel[4]; /* rf-A, rf-B*/ u32 RegTxPwrLimit; /* Content of RCR Regsiter for Mass Production Test. */ - ULONG MptRCR; + u32 MptRCR; /* TRUE if we only receive packets with specific pattern. */ BOOLEAN bMptFilterPattern; /* Rx OK count, statistics used in Mass Production Test. */ - ULONG MptRxOkCnt; + u32 MptRxOkCnt; /* Rx CRC32 error count, statistics used in Mass Production Test. */ - ULONG MptRxCrcErrCnt; + u32 MptRxCrcErrCnt; BOOLEAN bCckContTx; /* TRUE if we are in CCK Continuous Tx test. */ BOOLEAN bOfdmContTx; /* TRUE if we are in OFDM Continuous Tx test. */ @@ -226,12 +202,12 @@ typedef struct _MPT_CONTEXT { /* ACK counter asked by K.Y.. */ BOOLEAN bMptEnableAckCounter; - ULONG MptAckCounter; + u32 MptAckCounter; /* SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~! */ - /* s1Byte BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; */ - /* s1Byte BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; */ - /* s4Byte RfReadLine[2]; */ + /* s8 BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; */ + /* s8 BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; */ + /* s32 RfReadLine[2]; */ u8 APK_bound[2]; /* for APK path A/path B */ BOOLEAN bMptIndexEven; @@ -242,15 +218,15 @@ typedef struct _MPT_CONTEXT { u8 backup0x52_RF_A; u8 backup0x52_RF_B; - u4Byte backup0x58_RF_A; - u4Byte backup0x58_RF_B; + u32 backup0x58_RF_A; + u32 backup0x58_RF_B; - u1Byte h2cReqNum; - u1Byte c2hBuf[32]; + u8 h2cReqNum; + u8 c2hBuf[32]; - u1Byte btInBuf[100]; - ULONG mptOutLen; - u1Byte mptOutBuf[100]; + u8 btInBuf[100]; + u32 mptOutLen; + u8 mptOutBuf[100]; RT_PMAC_TX_INFO PMacTxInfo; RT_PMAC_PKT_INFO PMacPktInfo; u8 HWTxmode; @@ -309,6 +285,9 @@ enum { BT_EFUSE_FILE, MP_SetBT, MP_SWRFPath, + MP_LINK, + MP_DPK_TRK, + MP_DPK, MP_NULL, #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE VENDOR_IE_SET , @@ -352,6 +331,7 @@ struct mp_priv { u32 rx_pktloss; BOOLEAN rx_bindicatePkt; struct recv_stat rxstat; + BOOLEAN brx_filter_beacon; /* RF/BB relative */ u8 channel; @@ -382,31 +362,6 @@ struct mp_priv { struct wlan_network mp_network; NDIS_802_11_MAC_ADDRESS network_macaddr; -#ifdef PLATFORM_WINDOWS - u32 rx_testcnt; - u32 rx_testcnt1; - u32 rx_testcnt2; - u32 tx_testcnt; - u32 tx_testcnt1; - - struct mp_wi_cntx wi_cntx; - - u8 h2c_result; - u8 h2c_seqnum; - u16 h2c_cmdcode; - u8 h2c_resp_parambuf[512]; - _lock h2c_lock; - _lock wkitm_lock; - u32 h2c_cmdcnt; - NDIS_EVENT h2c_cmd_evt; - NDIS_EVENT c2h_set; - NDIS_EVENT h2c_clr; - NDIS_EVENT cpwm_int; - - NDIS_EVENT scsir_full_evt; - NDIS_EVENT scsiw_empty_evt; -#endif - u8 *pallocated_mp_xmitframe_buf; u8 *pmp_xmtframe_buf; _queue free_mp_xmitqueue; @@ -417,11 +372,17 @@ struct mp_priv { BOOLEAN bloopback; BOOLEAN bloadefusemap; BOOLEAN bloadBTefusemap; + BOOLEAN bprocess_mp_mode; MPT_CONTEXT mpt_ctx; - u8 *TXradomBuffer; + u8 CureFuseBTCoex; + u8 mplink_buf[2048]; + u32 mplink_rx_len; + BOOLEAN mplink_brx; + BOOLEAN mplink_btx; + }; typedef struct _IOCMD_STRUCT_ { @@ -688,7 +649,7 @@ extern struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv); extern int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe); #endif -void init_mp_priv(PADAPTER padapter); +extern s32 init_mp_priv(PADAPTER padapter); extern void free_mp_priv(struct mp_priv *pmp_priv); extern s32 MPT_InitializeAdapter(PADAPTER padapter, u8 Channel); extern void MPT_DeInitAdapter(PADAPTER padapter); @@ -714,7 +675,7 @@ void SetAntenna(PADAPTER pAdapter); void SetDataRate(PADAPTER pAdapter); void SetAntenna(PADAPTER pAdapter); s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther); -void GetThermalMeter(PADAPTER pAdapter, u8 *value); +void GetThermalMeter(PADAPTER pAdapter, u8 rfpath ,u8 *value); void SetContinuousTx(PADAPTER pAdapter, u8 bStart); void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart); void SetSingleToneTx(PADAPTER pAdapter, u8 bStart); @@ -731,6 +692,7 @@ void GetPowerTracking(PADAPTER padapter, u8 *enable); u32 mp_query_psd(PADAPTER pAdapter, u8 *data); void rtw_mp_trigger_iqk(PADAPTER padapter); void rtw_mp_trigger_lck(PADAPTER padapter); +void rtw_mp_trigger_dpk(PADAPTER padapter); u8 rtw_mp_mode_check(PADAPTER padapter); @@ -745,8 +707,8 @@ void hal_mpt_SetDataRate(PADAPTER pAdapter); void hal_mpt_SetAntenna(PADAPTER pAdapter); s32 hal_mpt_SetThermalMeter(PADAPTER pAdapter, u8 target_ther); void hal_mpt_TriggerRFThermalMeter(PADAPTER pAdapter); -u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter); -void hal_mpt_GetThermalMeter(PADAPTER pAdapter, u8 *value); +u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter, u8 rf_path); +void hal_mpt_GetThermalMeter(PADAPTER pAdapter, u8 rfpath, u8 *value); void hal_mpt_SetContinuousTx(PADAPTER pAdapter, u8 bStart); void hal_mpt_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart); void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart); @@ -755,7 +717,7 @@ void mpt_ProSetPMacTx(PADAPTER Adapter); void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter , BOOLEAN bMain); void mp_phy_switch_rf_path_set(PADAPTER pAdapter , u8 *pstate); u8 MP_PHY_QueryRFPathSwitch(PADAPTER pAdapter); -ULONG mpt_ProQueryCalTxPower(PADAPTER pAdapter, u8 RfPath); +u32 mpt_ProQueryCalTxPower(PADAPTER pAdapter, u8 RfPath); void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart); u8 mpt_to_mgnt_rate(u32 MptRateIdx); u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr); @@ -779,7 +741,7 @@ PMAC_Nsym_generator( ); void L_SIG_generator( - UINT N_SYM, /* Max: 750*/ + u32 N_SYM, /* Max: 750*/ PRT_PMAC_TX_INFO pPMacTxInfo, PRT_PMAC_PKT_INFO pPMacPktInfo ); @@ -886,6 +848,9 @@ int rtw_mp_SetRFPath(struct net_device *dev, int rtw_mp_switch_rf_path(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra); +int rtw_mp_link(struct net_device *dev, + struct iw_request_info *info, + struct iw_point *wrqu, char *extra); int rtw_mp_QueryDrv(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra); @@ -904,6 +869,12 @@ int rtw_mp_pwrlmt(struct net_device *dev, int rtw_mp_pwrbyrate(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra); +int rtw_mp_dpk_track(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra); +int rtw_mp_dpk(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra); int rtw_efuse_mask_file(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra); diff --git a/include/rtw_mp_ioctl.h b/include/rtw_mp_ioctl.h deleted file mode 100644 index a9dabfc..0000000 --- a/include/rtw_mp_ioctl.h +++ /dev/null @@ -1,570 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTW_MP_IOCTL_H_ -#define _RTW_MP_IOCTL_H_ - -#include -#include - -#if 0 -#define TESTFWCMDNUMBER 1000000 -#define TEST_H2CINT_WAIT_TIME 500 -#define TEST_C2HINT_WAIT_TIME 500 -#define HCI_TEST_SYSCFG_HWMASK 1 -#define _BUSCLK_40M (4 << 2) -#endif -/* ------------------------------------------------------------------------------ */ -typedef struct CFG_DBG_MSG_STRUCT { - u32 DebugLevel; - u32 DebugComponent_H32; - u32 DebugComponent_L32; -} CFG_DBG_MSG_STRUCT, *PCFG_DBG_MSG_STRUCT; - -typedef struct _RW_REG { - u32 offset; - u32 width; - u32 value; -} mp_rw_reg, RW_Reg, *pRW_Reg; - -/* for OID_RT_PRO_READ16_EEPROM & OID_RT_PRO_WRITE16_EEPROM */ -typedef struct _EEPROM_RW_PARAM { - u32 offset; - u16 value; -} eeprom_rw_param, EEPROM_RWParam, *pEEPROM_RWParam; - -typedef struct _EFUSE_ACCESS_STRUCT_ { - u16 start_addr; - u16 cnts; - u8 data[0]; -} EFUSE_ACCESS_STRUCT, *PEFUSE_ACCESS_STRUCT; - -typedef struct _BURST_RW_REG { - u32 offset; - u32 len; - u8 Data[256]; -} burst_rw_reg, Burst_RW_Reg, *pBurst_RW_Reg; - -typedef struct _USB_VendorReq { - u8 bRequest; - u16 wValue; - u16 wIndex; - u16 wLength; - u8 u8Dir;/* 0:OUT, 1:IN */ - u8 u8InData; -} usb_vendor_req, USB_VendorReq, *pUSB_VendorReq; - -typedef struct _DR_VARIABLE_STRUCT_ { - u8 offset; - u32 variable; -} DR_VARIABLE_STRUCT; - -/* int mp_start_joinbss(_adapter *padapter, NDIS_802_11_SSID *pssid); */ - -/* void _irqlevel_changed_(_irqL *irqlevel, BOOLEANunsigned char bLower); */ -#ifdef PLATFORM_OS_XP -static void _irqlevel_changed_(_irqL *irqlevel, u8 bLower) -{ - - if (bLower == LOWER) { - *irqlevel = KeGetCurrentIrql(); - - if (*irqlevel > PASSIVE_LEVEL) - KeLowerIrql(PASSIVE_LEVEL); - } else { - if (KeGetCurrentIrql() == PASSIVE_LEVEL) - KeRaiseIrql(DISPATCH_LEVEL, irqlevel); - } - -} -#else -#define _irqlevel_changed_(a, b) -#endif - -/* oid_rtl_seg_81_80_00 */ -NDIS_STATUS oid_rt_pro_set_data_rate_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_start_test_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_stop_test_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_set_channel_direct_call_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_set_antenna_bb_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_set_tx_power_control_hdl(struct oid_par_priv *poid_par_priv); -/* oid_rtl_seg_81_80_20 */ -NDIS_STATUS oid_rt_pro_query_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_query_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_query_rx_packet_crc32_error_hdl(struct oid_par_priv *poid_par_priv); - -NDIS_STATUS oid_rt_pro_reset_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_reset_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_set_modulation_hdl(struct oid_par_priv *poid_par_priv); - -NDIS_STATUS oid_rt_pro_set_continuous_tx_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_set_single_carrier_tx_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_set_carrier_suppression_tx_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_set_single_tone_tx_hdl(struct oid_par_priv *poid_par_priv); - - -/* oid_rtl_seg_81_87 */ -NDIS_STATUS oid_rt_pro_write_bb_reg_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_read_bb_reg_hdl(struct oid_par_priv *poid_par_priv); - -NDIS_STATUS oid_rt_pro_write_rf_reg_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_read_rf_reg_hdl(struct oid_par_priv *poid_par_priv); - - -/* oid_rtl_seg_81_85 */ -NDIS_STATUS oid_rt_wireless_mode_hdl(struct oid_par_priv *poid_par_priv); - - -/* oid_rtl_seg_87_11_00 */ -NDIS_STATUS oid_rt_pro8711_join_bss_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_read_register_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_write_register_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_burst_read_register_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_burst_write_register_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_write_txcmd_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_read16_eeprom_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_write16_eeprom_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro8711_wi_poll_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro8711_pkt_loss_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_rd_attrib_mem_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_wr_attrib_mem_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_set_rf_intfs_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_poll_rx_status_hdl(struct oid_par_priv *poid_par_priv); -/* oid_rtl_seg_87_11_20 */ -NDIS_STATUS oid_rt_pro_cfg_debug_message_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_set_data_rate_ex_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_set_basic_rate_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_read_tssi_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_set_power_tracking_hdl(struct oid_par_priv *poid_par_priv); -/* oid_rtl_seg_87_11_50 */ -NDIS_STATUS oid_rt_pro_qry_pwrstate_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_set_pwrstate_hdl(struct oid_par_priv *poid_par_priv); -/* oid_rtl_seg_87_11_F0 */ -NDIS_STATUS oid_rt_pro_h2c_set_rate_table_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_h2c_get_rate_table_hdl(struct oid_par_priv *poid_par_priv); - - -/* oid_rtl_seg_87_12_00 */ -NDIS_STATUS oid_rt_pro_encryption_ctrl_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_add_sta_info_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_dele_sta_info_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_query_dr_variable_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv); - -NDIS_STATUS oid_rt_pro_read_efuse_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_write_efuse_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_rw_efuse_pgpkt_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_efuse_current_size_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_efuse_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_efuse_map_hdl(struct oid_par_priv *poid_par_priv); - -NDIS_STATUS oid_rt_set_bandwidth_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_set_crystal_cap_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_set_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_efuse_max_size_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_pro_set_tx_agc_offset_hdl(struct oid_par_priv *poid_par_priv); - -NDIS_STATUS oid_rt_pro_set_pkt_test_mode_hdl(struct oid_par_priv *poid_par_priv); - -NDIS_STATUS oid_rt_get_thermal_meter_hdl(struct oid_par_priv *poid_par_priv); - -NDIS_STATUS oid_rt_reset_phy_rx_packet_count_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_phy_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv); -NDIS_STATUS oid_rt_get_phy_rx_packet_crc32_error_hdl(struct oid_par_priv *poid_par_priv); - -NDIS_STATUS oid_rt_set_power_down_hdl(struct oid_par_priv *poid_par_priv); - -NDIS_STATUS oid_rt_get_power_mode_hdl(struct oid_par_priv *poid_par_priv); - -NDIS_STATUS oid_rt_pro_trigger_gpio_hdl(struct oid_par_priv *poid_par_priv); - -#ifdef _RTW_MP_IOCTL_C_ - -const struct oid_obj_priv oid_rtl_seg_81_80_00[] = { - {1, &oid_null_function}, /* 0x00 OID_RT_PRO_RESET_DUT */ - {1, &oid_rt_pro_set_data_rate_hdl}, /* 0x01 */ - {1, &oid_rt_pro_start_test_hdl}, /* 0x02 */ - {1, &oid_rt_pro_stop_test_hdl}, /* 0x03 */ - {1, &oid_null_function}, /* 0x04 OID_RT_PRO_SET_PREAMBLE */ - {1, &oid_null_function}, /* 0x05 OID_RT_PRO_SET_SCRAMBLER */ - {1, &oid_null_function}, /* 0x06 OID_RT_PRO_SET_FILTER_BB */ - {1, &oid_null_function}, /* 0x07 OID_RT_PRO_SET_MANUAL_DIVERSITY_BB */ - {1, &oid_rt_pro_set_channel_direct_call_hdl}, /* 0x08 */ - {1, &oid_null_function}, /* 0x09 OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL */ - {1, &oid_null_function}, /* 0x0A OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL */ - {1, &oid_rt_pro_set_continuous_tx_hdl}, /* 0x0B OID_RT_PRO_SET_TX_CONTINUOUS_DIRECT_CALL */ - {1, &oid_rt_pro_set_single_carrier_tx_hdl}, /* 0x0C OID_RT_PRO_SET_SINGLE_CARRIER_TX_CONTINUOUS */ - {1, &oid_null_function}, /* 0x0D OID_RT_PRO_SET_TX_ANTENNA_BB */ - {1, &oid_rt_pro_set_antenna_bb_hdl}, /* 0x0E */ - {1, &oid_null_function}, /* 0x0F OID_RT_PRO_SET_CR_SCRAMBLER */ - {1, &oid_null_function}, /* 0x10 OID_RT_PRO_SET_CR_NEW_FILTER */ - {1, &oid_rt_pro_set_tx_power_control_hdl}, /* 0x11 OID_RT_PRO_SET_TX_POWER_CONTROL */ - {1, &oid_null_function}, /* 0x12 OID_RT_PRO_SET_CR_TX_CONFIG */ - {1, &oid_null_function}, /* 0x13 OID_RT_PRO_GET_TX_POWER_CONTROL */ - {1, &oid_null_function}, /* 0x14 OID_RT_PRO_GET_CR_SIGNAL_QUALITY */ - {1, &oid_null_function}, /* 0x15 OID_RT_PRO_SET_CR_SETPOINT */ - {1, &oid_null_function}, /* 0x16 OID_RT_PRO_SET_INTEGRATOR */ - {1, &oid_null_function}, /* 0x17 OID_RT_PRO_SET_SIGNAL_QUALITY */ - {1, &oid_null_function}, /* 0x18 OID_RT_PRO_GET_INTEGRATOR */ - {1, &oid_null_function}, /* 0x19 OID_RT_PRO_GET_SIGNAL_QUALITY */ - {1, &oid_null_function}, /* 0x1A OID_RT_PRO_QUERY_EEPROM_TYPE */ - {1, &oid_null_function}, /* 0x1B OID_RT_PRO_WRITE_MAC_ADDRESS */ - {1, &oid_null_function}, /* 0x1C OID_RT_PRO_READ_MAC_ADDRESS */ - {1, &oid_null_function}, /* 0x1D OID_RT_PRO_WRITE_CIS_DATA */ - {1, &oid_null_function}, /* 0x1E OID_RT_PRO_READ_CIS_DATA */ - {1, &oid_null_function} /* 0x1F OID_RT_PRO_WRITE_POWER_CONTROL */ - -}; - -const struct oid_obj_priv oid_rtl_seg_81_80_20[] = { - {1, &oid_null_function}, /* 0x20 OID_RT_PRO_READ_POWER_CONTROL */ - {1, &oid_null_function}, /* 0x21 OID_RT_PRO_WRITE_EEPROM */ - {1, &oid_null_function}, /* 0x22 OID_RT_PRO_READ_EEPROM */ - {1, &oid_rt_pro_reset_tx_packet_sent_hdl}, /* 0x23 */ - {1, &oid_rt_pro_query_tx_packet_sent_hdl}, /* 0x24 */ - {1, &oid_rt_pro_reset_rx_packet_received_hdl}, /* 0x25 */ - {1, &oid_rt_pro_query_rx_packet_received_hdl}, /* 0x26 */ - {1, &oid_rt_pro_query_rx_packet_crc32_error_hdl}, /* 0x27 */ - {1, &oid_null_function}, /* 0x28 OID_RT_PRO_QUERY_CURRENT_ADDRESS */ - {1, &oid_null_function}, /* 0x29 OID_RT_PRO_QUERY_PERMANENT_ADDRESS */ - {1, &oid_null_function}, /* 0x2A OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS */ - {1, &oid_rt_pro_set_carrier_suppression_tx_hdl},/* 0x2B OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX */ - {1, &oid_null_function}, /* 0x2C OID_RT_PRO_RECEIVE_PACKET */ - {1, &oid_null_function}, /* 0x2D OID_RT_PRO_WRITE_EEPROM_BYTE */ - {1, &oid_null_function}, /* 0x2E OID_RT_PRO_READ_EEPROM_BYTE */ - {1, &oid_rt_pro_set_modulation_hdl} /* 0x2F */ - -}; - -const struct oid_obj_priv oid_rtl_seg_81_80_40[] = { - {1, &oid_null_function}, /* 0x40 */ - {1, &oid_null_function}, /* 0x41 */ - {1, &oid_null_function}, /* 0x42 */ - {1, &oid_rt_pro_set_single_tone_tx_hdl}, /* 0x43 */ - {1, &oid_null_function}, /* 0x44 */ - {1, &oid_null_function} /* 0x45 */ -}; - -const struct oid_obj_priv oid_rtl_seg_81_80_80[] = { - {1, &oid_null_function}, /* 0x80 OID_RT_DRIVER_OPTION */ - {1, &oid_null_function}, /* 0x81 OID_RT_RF_OFF */ - {1, &oid_null_function} /* 0x82 OID_RT_AUTH_STATUS */ - -}; - -const struct oid_obj_priv oid_rtl_seg_81_85[] = { - {1, &oid_rt_wireless_mode_hdl} /* 0x00 OID_RT_WIRELESS_MODE */ -}; - -struct oid_obj_priv oid_rtl_seg_81_87[] = { - {1, &oid_null_function}, /* 0x80 OID_RT_PRO8187_WI_POLL */ - {1, &oid_rt_pro_write_bb_reg_hdl}, /* 0x81 */ - {1, &oid_rt_pro_read_bb_reg_hdl}, /* 0x82 */ - {1, &oid_rt_pro_write_rf_reg_hdl}, /* 0x82 */ - {1, &oid_rt_pro_read_rf_reg_hdl} /* 0x83 */ -}; - -struct oid_obj_priv oid_rtl_seg_87_11_00[] = { - {1, &oid_rt_pro8711_join_bss_hdl}, /* 0x00 */ /* S */ - {1, &oid_rt_pro_read_register_hdl}, /* 0x01 */ - {1, &oid_rt_pro_write_register_hdl}, /* 0x02 */ - {1, &oid_rt_pro_burst_read_register_hdl}, /* 0x03 */ - {1, &oid_rt_pro_burst_write_register_hdl}, /* 0x04 */ - {1, &oid_rt_pro_write_txcmd_hdl}, /* 0x05 */ - {1, &oid_rt_pro_read16_eeprom_hdl}, /* 0x06 */ - {1, &oid_rt_pro_write16_eeprom_hdl}, /* 0x07 */ - {1, &oid_null_function}, /* 0x08 OID_RT_PRO_H2C_SET_COMMAND */ - {1, &oid_null_function}, /* 0x09 OID_RT_PRO_H2C_QUERY_RESULT */ - {1, &oid_rt_pro8711_wi_poll_hdl}, /* 0x0A */ - {1, &oid_rt_pro8711_pkt_loss_hdl}, /* 0x0B */ - {1, &oid_rt_rd_attrib_mem_hdl}, /* 0x0C */ - {1, &oid_rt_wr_attrib_mem_hdl}, /* 0x0D */ - {1, &oid_null_function}, /* 0x0E */ - {1, &oid_null_function}, /* 0x0F */ - {1, &oid_null_function}, /* 0x10 OID_RT_PRO_H2C_CMD_MODE */ - {1, &oid_null_function}, /* 0x11 OID_RT_PRO_H2C_CMD_RSP_MODE */ - {1, &oid_null_function}, /* 0X12 OID_RT_PRO_WAIT_C2H_EVENT */ - {1, &oid_null_function}, /* 0X13 OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST */ - {1, &oid_null_function}, /* 0X14 OID_RT_PRO_SCSI_ACCESS_TEST */ - {1, &oid_null_function}, /* 0X15 OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT */ - {1, &oid_null_function}, /* 0X16 OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN */ - {1, &oid_null_function}, /* 0X17 OID_RT_RRO_RX_PKT_VIA_IOCTRL */ - {1, &oid_null_function}, /* 0X18 OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL */ - {1, &oid_null_function}, /* 0X19 OID_RT_RPO_SET_PWRMGT_TEST */ - {1, &oid_null_function}, /* 0X1A */ - {1, &oid_null_function}, /* 0X1B OID_RT_PRO_QRY_PWRMGT_TEST */ - {1, &oid_null_function}, /* 0X1C OID_RT_RPO_ASYNC_RWIO_TEST */ - {1, &oid_null_function}, /* 0X1D OID_RT_RPO_ASYNC_RWIO_POLL */ - {1, &oid_rt_pro_set_rf_intfs_hdl}, /* 0X1E */ - {1, &oid_rt_poll_rx_status_hdl} /* 0X1F */ -}; - -struct oid_obj_priv oid_rtl_seg_87_11_20[] = { - {1, &oid_rt_pro_cfg_debug_message_hdl}, /* 0x20 */ - {1, &oid_rt_pro_set_data_rate_ex_hdl}, /* 0x21 */ - {1, &oid_rt_pro_set_basic_rate_hdl}, /* 0x22 */ - {1, &oid_rt_pro_read_tssi_hdl}, /* 0x23 */ - {1, &oid_rt_pro_set_power_tracking_hdl} /* 0x24 */ -}; - - -struct oid_obj_priv oid_rtl_seg_87_11_50[] = { - {1, &oid_rt_pro_qry_pwrstate_hdl}, /* 0x50 */ - {1, &oid_rt_pro_set_pwrstate_hdl} /* 0x51 */ -}; - -struct oid_obj_priv oid_rtl_seg_87_11_80[] = { - {1, &oid_null_function} /* 0x80 */ -}; - -struct oid_obj_priv oid_rtl_seg_87_11_B0[] = { - {1, &oid_null_function} /* 0xB0 */ -}; - -struct oid_obj_priv oid_rtl_seg_87_11_F0[] = { - {1, &oid_null_function}, /* 0xF0 */ - {1, &oid_null_function}, /* 0xF1 */ - {1, &oid_null_function}, /* 0xF2 */ - {1, &oid_null_function}, /* 0xF3 */ - {1, &oid_null_function}, /* 0xF4 */ - {1, &oid_null_function}, /* 0xF5 */ - {1, &oid_null_function}, /* 0xF6 */ - {1, &oid_null_function}, /* 0xF7 */ - {1, &oid_null_function}, /* 0xF8 */ - {1, &oid_null_function}, /* 0xF9 */ - {1, &oid_null_function}, /* 0xFA */ - {1, &oid_rt_pro_h2c_set_rate_table_hdl}, /* 0xFB */ - {1, &oid_rt_pro_h2c_get_rate_table_hdl}, /* 0xFC */ - {1, &oid_null_function}, /* 0xFD */ - {1, &oid_null_function}, /* 0xFE OID_RT_PRO_H2C_C2H_LBK_TEST */ - {1, &oid_null_function} /* 0xFF */ - -}; - -struct oid_obj_priv oid_rtl_seg_87_12_00[] = { - {1, &oid_rt_pro_encryption_ctrl_hdl}, /* 0x00 Q&S */ - {1, &oid_rt_pro_add_sta_info_hdl}, /* 0x01 S */ - {1, &oid_rt_pro_dele_sta_info_hdl}, /* 0x02 S */ - {1, &oid_rt_pro_query_dr_variable_hdl}, /* 0x03 Q */ - {1, &oid_rt_pro_rx_packet_type_hdl}, /* 0x04 Q,S */ - {1, &oid_rt_pro_read_efuse_hdl}, /* 0x05 Q OID_RT_PRO_READ_EFUSE */ - {1, &oid_rt_pro_write_efuse_hdl}, /* 0x06 S OID_RT_PRO_WRITE_EFUSE */ - {1, &oid_rt_pro_rw_efuse_pgpkt_hdl}, /* 0x07 Q,S */ - {1, &oid_rt_get_efuse_current_size_hdl}, /* 0x08 Q */ - {1, &oid_rt_set_bandwidth_hdl}, /* 0x09 */ - {1, &oid_rt_set_crystal_cap_hdl}, /* 0x0a */ - {1, &oid_rt_set_rx_packet_type_hdl}, /* 0x0b S */ - {1, &oid_rt_get_efuse_max_size_hdl}, /* 0x0c */ - {1, &oid_rt_pro_set_tx_agc_offset_hdl}, /* 0x0d */ - {1, &oid_rt_pro_set_pkt_test_mode_hdl}, /* 0x0e */ - {1, &oid_null_function}, /* 0x0f OID_RT_PRO_FOR_EVM_TEST_SETTING */ - {1, &oid_rt_get_thermal_meter_hdl}, /* 0x10 Q OID_RT_PRO_GET_THERMAL_METER */ - {1, &oid_rt_reset_phy_rx_packet_count_hdl}, /* 0x11 S OID_RT_RESET_PHY_RX_PACKET_COUNT */ - {1, &oid_rt_get_phy_rx_packet_received_hdl}, /* 0x12 Q OID_RT_GET_PHY_RX_PACKET_RECEIVED */ - {1, &oid_rt_get_phy_rx_packet_crc32_error_hdl}, /* 0x13 Q OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR */ - {1, &oid_rt_set_power_down_hdl}, /* 0x14 Q OID_RT_SET_POWER_DOWN */ - {1, &oid_rt_get_power_mode_hdl} /* 0x15 Q OID_RT_GET_POWER_MODE */ -}; - -#else /* _RTL871X_MP_IOCTL_C_ */ - -extern struct oid_obj_priv oid_rtl_seg_81_80_00[32]; -extern struct oid_obj_priv oid_rtl_seg_81_80_20[16]; -extern struct oid_obj_priv oid_rtl_seg_81_80_40[6]; -extern struct oid_obj_priv oid_rtl_seg_81_80_80[3]; - -extern struct oid_obj_priv oid_rtl_seg_81_85[1]; -extern struct oid_obj_priv oid_rtl_seg_81_87[5]; - -extern struct oid_obj_priv oid_rtl_seg_87_11_00[32]; -extern struct oid_obj_priv oid_rtl_seg_87_11_20[5]; -extern struct oid_obj_priv oid_rtl_seg_87_11_50[2]; -extern struct oid_obj_priv oid_rtl_seg_87_11_80[1]; -extern struct oid_obj_priv oid_rtl_seg_87_11_B0[1]; -extern struct oid_obj_priv oid_rtl_seg_87_11_F0[16]; - -extern struct oid_obj_priv oid_rtl_seg_87_12_00[32]; - -#endif /* _RTL871X_MP_IOCTL_C_ */ - -struct rwreg_param { - u32 offset; - u32 width; - u32 value; -}; - -struct bbreg_param { - u32 offset; - u32 phymask; - u32 value; -}; -/* -struct rfchannel_param{ - u32 ch; - u32 modem; -}; -*/ -struct txpower_param { - u32 pwr_index; -}; - - -struct datarate_param { - u32 rate_index; -}; - - -struct rfintfs_parm { - u32 rfintfs; -}; - -typedef struct _mp_xmit_parm_ { - u8 enable; - u32 count; - u16 length; - u8 payload_type; - u8 da[ETH_ALEN]; -} MP_XMIT_PARM, *PMP_XMIT_PARM; - -struct mp_xmit_packet { - u32 len; - u32 mem[MAX_MP_XMITBUF_SZ >> 2]; -}; - -struct psmode_param { - u32 ps_mode; - u32 smart_ps; -}; - -/* for OID_RT_PRO_READ16_EEPROM & OID_RT_PRO_WRITE16_EEPROM */ -struct eeprom_rw_param { - u32 offset; - u16 value; -}; - -struct mp_ioctl_handler { - u32 paramsize; - u32(*handler)(struct oid_par_priv *poid_par_priv); - u32 oid; -}; - -struct mp_ioctl_param { - u32 subcode; - u32 len; - u8 data[0]; -}; - -#define GEN_MP_IOCTL_SUBCODE(code) _MP_IOCTL_ ## code ## _CMD_ - -enum RTL871X_MP_IOCTL_SUBCODE { - GEN_MP_IOCTL_SUBCODE(MP_START), /*0*/ - GEN_MP_IOCTL_SUBCODE(MP_STOP), - GEN_MP_IOCTL_SUBCODE(READ_REG), - GEN_MP_IOCTL_SUBCODE(WRITE_REG), - GEN_MP_IOCTL_SUBCODE(READ_BB_REG), - GEN_MP_IOCTL_SUBCODE(WRITE_BB_REG), /*5*/ - GEN_MP_IOCTL_SUBCODE(READ_RF_REG), - GEN_MP_IOCTL_SUBCODE(WRITE_RF_REG), - GEN_MP_IOCTL_SUBCODE(SET_CHANNEL), - GEN_MP_IOCTL_SUBCODE(SET_TXPOWER), - GEN_MP_IOCTL_SUBCODE(SET_DATARATE), /*10*/ - GEN_MP_IOCTL_SUBCODE(SET_BANDWIDTH), - GEN_MP_IOCTL_SUBCODE(SET_ANTENNA), - GEN_MP_IOCTL_SUBCODE(CNTU_TX), - GEN_MP_IOCTL_SUBCODE(SC_TX), - GEN_MP_IOCTL_SUBCODE(CS_TX), /*15*/ - GEN_MP_IOCTL_SUBCODE(ST_TX), - GEN_MP_IOCTL_SUBCODE(IOCTL_XMIT_PACKET), - GEN_MP_IOCTL_SUBCODE(SET_RX_PKT_TYPE), - GEN_MP_IOCTL_SUBCODE(RESET_PHY_RX_PKT_CNT), - GEN_MP_IOCTL_SUBCODE(GET_PHY_RX_PKT_RECV), /*20*/ - GEN_MP_IOCTL_SUBCODE(GET_PHY_RX_PKT_ERROR), - GEN_MP_IOCTL_SUBCODE(READ16_EEPROM), - GEN_MP_IOCTL_SUBCODE(WRITE16_EEPROM), - GEN_MP_IOCTL_SUBCODE(EFUSE), - GEN_MP_IOCTL_SUBCODE(EFUSE_MAP), /*25*/ - GEN_MP_IOCTL_SUBCODE(GET_EFUSE_MAX_SIZE), - GEN_MP_IOCTL_SUBCODE(GET_EFUSE_CURRENT_SIZE), - GEN_MP_IOCTL_SUBCODE(GET_THERMAL_METER), - GEN_MP_IOCTL_SUBCODE(SET_PTM), - GEN_MP_IOCTL_SUBCODE(SET_POWER_DOWN), /*30*/ - GEN_MP_IOCTL_SUBCODE(TRIGGER_GPIO), - GEN_MP_IOCTL_SUBCODE(SET_DM_BT), /*32*/ - GEN_MP_IOCTL_SUBCODE(DEL_BA), /*33*/ - GEN_MP_IOCTL_SUBCODE(GET_WIFI_STATUS), /*34*/ - MAX_MP_IOCTL_SUBCODE, -}; - -u32 mp_ioctl_xmit_packet_hdl(struct oid_par_priv *poid_par_priv); - -#ifdef _RTW_MP_IOCTL_C_ - -#define GEN_MP_IOCTL_HANDLER(sz, hdl, oid) {sz, hdl, oid}, - -#define EXT_MP_IOCTL_HANDLER(sz, subcode, oid) {sz, mp_ioctl_ ## subcode ## _hdl, oid}, - - -struct mp_ioctl_handler mp_ioctl_hdl[] = { - - /*0*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_start_test_hdl, OID_RT_PRO_START_TEST) - GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_stop_test_hdl, OID_RT_PRO_STOP_TEST) - - GEN_MP_IOCTL_HANDLER(sizeof(struct rwreg_param), oid_rt_pro_read_register_hdl, OID_RT_PRO_READ_REGISTER) - GEN_MP_IOCTL_HANDLER(sizeof(struct rwreg_param), oid_rt_pro_write_register_hdl, OID_RT_PRO_WRITE_REGISTER) - GEN_MP_IOCTL_HANDLER(sizeof(struct bb_reg_param), oid_rt_pro_read_bb_reg_hdl, OID_RT_PRO_READ_BB_REG) - /*5*/ GEN_MP_IOCTL_HANDLER(sizeof(struct bb_reg_param), oid_rt_pro_write_bb_reg_hdl, OID_RT_PRO_WRITE_BB_REG) - GEN_MP_IOCTL_HANDLER(sizeof(struct rf_reg_param), oid_rt_pro_read_rf_reg_hdl, OID_RT_PRO_RF_READ_REGISTRY) - GEN_MP_IOCTL_HANDLER(sizeof(struct rf_reg_param), oid_rt_pro_write_rf_reg_hdl, OID_RT_PRO_RF_WRITE_REGISTRY) - - GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_channel_direct_call_hdl, OID_RT_PRO_SET_CHANNEL_DIRECT_CALL) - GEN_MP_IOCTL_HANDLER(sizeof(struct txpower_param), oid_rt_pro_set_tx_power_control_hdl, OID_RT_PRO_SET_TX_POWER_CONTROL) - /*10*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_data_rate_hdl, OID_RT_PRO_SET_DATA_RATE) - GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_set_bandwidth_hdl, OID_RT_SET_BANDWIDTH) - GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_antenna_bb_hdl, OID_RT_PRO_SET_ANTENNA_BB) - - GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_continuous_tx_hdl, OID_RT_PRO_SET_CONTINUOUS_TX) - GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_single_carrier_tx_hdl, OID_RT_PRO_SET_SINGLE_CARRIER_TX) - /*15*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_carrier_suppression_tx_hdl, OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX) - GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_single_tone_tx_hdl, OID_RT_PRO_SET_SINGLE_TONE_TX) - - EXT_MP_IOCTL_HANDLER(0, xmit_packet, 0) - - GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_set_rx_packet_type_hdl, OID_RT_SET_RX_PACKET_TYPE) - GEN_MP_IOCTL_HANDLER(0, oid_rt_reset_phy_rx_packet_count_hdl, OID_RT_RESET_PHY_RX_PACKET_COUNT) - /*20*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_phy_rx_packet_received_hdl, OID_RT_GET_PHY_RX_PACKET_RECEIVED) - GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_phy_rx_packet_crc32_error_hdl, OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR) - - GEN_MP_IOCTL_HANDLER(sizeof(struct eeprom_rw_param), NULL, 0) - GEN_MP_IOCTL_HANDLER(sizeof(struct eeprom_rw_param), NULL, 0) - GEN_MP_IOCTL_HANDLER(sizeof(EFUSE_ACCESS_STRUCT), oid_rt_pro_efuse_hdl, OID_RT_PRO_EFUSE) - /*25*/ GEN_MP_IOCTL_HANDLER(0, oid_rt_pro_efuse_map_hdl, OID_RT_PRO_EFUSE_MAP) - GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_efuse_max_size_hdl, OID_RT_GET_EFUSE_MAX_SIZE) - GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_efuse_current_size_hdl, OID_RT_GET_EFUSE_CURRENT_SIZE) - - GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_thermal_meter_hdl, OID_RT_PRO_GET_THERMAL_METER) - GEN_MP_IOCTL_HANDLER(sizeof(u8), oid_rt_pro_set_power_tracking_hdl, OID_RT_PRO_SET_POWER_TRACKING) - /*30*/ GEN_MP_IOCTL_HANDLER(sizeof(u8), oid_rt_set_power_down_hdl, OID_RT_SET_POWER_DOWN) - /*31*/ GEN_MP_IOCTL_HANDLER(0, oid_rt_pro_trigger_gpio_hdl, 0) - GEN_MP_IOCTL_HANDLER(0, NULL, 0) - GEN_MP_IOCTL_HANDLER(0, NULL, 0) - GEN_MP_IOCTL_HANDLER(0, NULL, 0) -}; - -#else /* _RTW_MP_IOCTL_C_ */ - -extern struct mp_ioctl_handler mp_ioctl_hdl[]; - -#endif /* _RTW_MP_IOCTL_C_ */ - -#endif diff --git a/include/rtw_odm.h b/include/rtw_odm.h index 4ce6fe1..cb7830e 100644 --- a/include/rtw_odm.h +++ b/include/rtw_odm.h @@ -77,20 +77,26 @@ void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter); bool rtw_odm_adaptivity_needed(_adapter *adapter); void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter); -void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff, s8 th_l2h_ini_mode2, s8 th_edcca_hl_diff_mode2, u8 edcca_enable); +void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff); void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter); void rtw_odm_acquirespinlock(_adapter *adapter, enum rt_spinlock_type type); void rtw_odm_releasespinlock(_adapter *adapter, enum rt_spinlock_type type); -u8 rtw_odm_get_dfs_domain(_adapter *adapter); -u8 rtw_odm_dfs_domain_unknown(_adapter *adapter); +u8 rtw_odm_get_dfs_domain(struct dvobj_priv *dvobj); +u8 rtw_odm_dfs_domain_unknown(struct dvobj_priv *dvobj); #ifdef CONFIG_DFS_MASTER -VOID rtw_odm_radar_detect_reset(_adapter *adapter); -VOID rtw_odm_radar_detect_disable(_adapter *adapter); -VOID rtw_odm_radar_detect_enable(_adapter *adapter); +void rtw_odm_radar_detect_reset(_adapter *adapter); +void rtw_odm_radar_detect_disable(_adapter *adapter); +void rtw_odm_radar_detect_enable(_adapter *adapter); BOOLEAN rtw_odm_radar_detect(_adapter *adapter); +u8 rtw_odm_radar_detect_polling_int_ms(struct dvobj_priv *dvobj); #endif /* CONFIG_DFS_MASTER */ void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys); +#if defined(CONFIG_RTL8822C) && defined(CONFIG_LPS_PG) +void odm_iqk_get_cfir2fw_8822c(void *dm_void, u8 *buf, u32 *buf_size); +void odm_lps_pg_debug_8822c(void *dm_void); +#endif + #endif /* __RTW_ODM_H__ */ diff --git a/include/rtw_p2p.h b/include/rtw_p2p.h index 203886b..1f985ad 100644 --- a/include/rtw_p2p.h +++ b/include/rtw_p2p.h @@ -102,11 +102,8 @@ static inline void _rtw_p2p_restore_state(struct wifidirect_info *wdinfo) } } #endif -static inline void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) -{ - if (wdinfo->role != role) - wdinfo->role = role; -} +void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role); + static inline int _rtw_p2p_state(struct wifidirect_info *wdinfo) { return wdinfo->p2p_state; diff --git a/include/rtw_pwrctrl.h b/include/rtw_pwrctrl.h index 696ff70..0436407 100644 --- a/include/rtw_pwrctrl.h +++ b/include/rtw_pwrctrl.h @@ -305,11 +305,15 @@ struct aoac_report { u8 security_type; u8 wow_pattern_idx; u8 version_info; - u8 reserved[4]; + u8 rekey_ok:1; + u8 dummy:7; + u8 reserved[3]; u8 rxptk_iv[8]; u8 rxgtk_iv[4][8]; }; +struct rsvd_page_cache_t; + struct pwrctrl_priv { _pwrlock lock; _pwrlock check_32k_lock; @@ -317,11 +321,23 @@ struct pwrctrl_priv { volatile u8 cpwm; /* fw current power state. updated when 1. read from HCPWM 2. driver lowers power level */ volatile u8 tog; /* toggling */ volatile u8 cpwm_tog; /* toggling */ + u8 rpwm_retry; u8 pwr_mode; u8 smart_ps; u8 bcn_ant_mode; u8 dtim; +#ifdef CONFIG_LPS_CHK_BY_TP + u8 lps_chk_by_tp; + u16 lps_tx_tp_th;/*Mbps*/ + u16 lps_rx_tp_th;/*Mbps*/ + u16 lps_bi_tp_th;/*Mbps*//*TRX TP*/ + int lps_chk_cnt_th; + int lps_chk_cnt; + u32 lps_tx_pkts; + u32 lps_rx_pkts; + +#endif #ifdef CONFIG_WMMPS_STA u8 wmm_smart_ps; @@ -397,6 +413,7 @@ struct pwrctrl_priv { #ifdef CONFIG_GPIO_WAKEUP u8 is_high_active; #endif /* CONFIG_GPIO_WAKEUP */ + u8 hst2dev_high_active; #ifdef CONFIG_WOWLAN bool default_patterns_en; #ifdef CONFIG_IPV6 @@ -417,7 +434,8 @@ struct pwrctrl_priv { #endif u8 wowlan_aoac_rpt_loc; struct aoac_report wowlan_aoac_rpt; - u8 wowlan_dis_lps;/*for debug purpose*/ + u8 wowlan_power_mgmt; + u8 wowlan_lps_level; #endif /* CONFIG_WOWLAN */ _timer pwr_state_check_timer; int pwr_state_check_interval; @@ -449,18 +467,17 @@ struct pwrctrl_priv { u8 do_late_resume; #endif -#ifdef CONFIG_INTEL_PROXIM - u8 stored_power_mgnt; -#endif - #ifdef CONFIG_LPS_POFF lps_poff_info_t *plps_poff_info; #endif u8 lps_level_bk; u8 lps_level; /*LPS_NORMAL,LPA_CG,LPS_PG*/ #ifdef CONFIG_LPS_PG - u8 lpspg_rsvd_page_locate; - u8 blpspg_info_up; + struct rsvd_page_cache_t lpspg_info; +#ifdef CONFIG_RTL8822C + struct rsvd_page_cache_t lpspg_dpk_info; + struct rsvd_page_cache_t lpspg_iqk_info; +#endif #endif u8 current_lps_hw_port_id; @@ -525,20 +542,26 @@ void rtw_ps_processor(_adapter *padapter); int autoresume_enter(_adapter *padapter); #endif #ifdef SUPPORT_HW_RFOFF_DETECTED -rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter); +rt_rf_power_state RfOnOffDetect(PADAPTER pAdapter); #endif +#ifdef DBG_CHECK_FW_PS_STATE int rtw_fw_ps_state(PADAPTER padapter); +#endif #ifdef CONFIG_LPS -s32 LPS_RF_ON_check(PADAPTER padapter, u32 delay_ms); void LPS_Enter(PADAPTER padapter, const char *msg); void LPS_Leave(PADAPTER padapter, const char *msg); +#ifdef CONFIG_CHECK_LEAVE_LPS +#ifdef CONFIG_LPS_CHK_BY_TP +void traffic_check_for_leave_lps_by_tp(PADAPTER padapter, u8 tx, struct sta_info *sta); +#endif void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets); +#endif /*CONFIG_CHECK_LEAVE_LPS*/ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg); void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable); -void rtw_set_rpwm(_adapter *padapter, u8 val8); +u8 rtw_set_rpwm(_adapter *padapter, u8 val8); void rtw_wow_lps_level_decide(_adapter *adapter, u8 wow_en); #endif @@ -568,6 +591,10 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller); int rtw_pm_set_ips(_adapter *padapter, u8 mode); int rtw_pm_set_lps(_adapter *padapter, u8 mode); int rtw_pm_set_lps_level(_adapter *padapter, u8 level); +#ifdef CONFIG_WOWLAN +int rtw_pm_set_wow_lps(_adapter *padapter, u8 mode); +int rtw_pm_set_wow_lps_level(_adapter *padapter, u8 level); +#endif /* CONFIG_WOWLAN */ void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason); void rtw_ps_deny_cancel(PADAPTER padapter, PS_DENY_REASON reason); @@ -583,4 +610,6 @@ void rtw_wow_pattern_sw_reset(_adapter *adapter); u8 rtw_set_default_pattern(_adapter *adapter); void rtw_wow_pattern_sw_dump(_adapter *adapter); #endif /* CONFIG_WOWLAN */ +void rtw_ssmps_enter(_adapter *adapter, struct sta_info *sta); +void rtw_ssmps_leave(_adapter *adapter, struct sta_info *sta); #endif /* __RTL871X_PWRCTRL_H_ */ diff --git a/include/rtw_recv.h b/include/rtw_recv.h index 2a51ec0..8acfd29 100644 --- a/include/rtw_recv.h +++ b/include/rtw_recv.h @@ -19,42 +19,28 @@ #define RTW_RX_MSDU_ACT_INDICATE BIT0 #define RTW_RX_MSDU_ACT_FORWARD BIT1 -#ifdef PLATFORM_OS_XP - #ifdef CONFIG_SDIO_HCI - #define NR_RECVBUFF 1024/* 512 */ /* 128 */ +#ifdef CONFIG_SINGLE_RECV_BUF + #define NR_RECVBUFF (1) +#else + #if defined(CONFIG_GSPI_HCI) + #define NR_RECVBUFF (32) + #elif defined(CONFIG_SDIO_HCI) + #define NR_RECVBUFF (8) #else - #define NR_RECVBUFF (16) + #define NR_RECVBUFF (8) #endif -#elif defined(PLATFORM_OS_CE) - #ifdef CONFIG_SDIO_HCI - #define NR_RECVBUFF (128) - #else - #define NR_RECVBUFF (4) - #endif -#else /* PLATFORM_LINUX /PLATFORM_BSD */ +#endif /* CONFIG_SINGLE_RECV_BUF */ +#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER + #define NR_PREALLOC_RECV_SKB (rtw_rtkm_get_nr_recv_skb()>>1) +#else /*!CONFIG_PREALLOC_RX_SKB_BUFFER */ + #define NR_PREALLOC_RECV_SKB 8 +#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ - #ifdef CONFIG_SINGLE_RECV_BUF - #define NR_RECVBUFF (1) - #else - #if defined(CONFIG_GSPI_HCI) - #define NR_RECVBUFF (32) - #elif defined(CONFIG_SDIO_HCI) - #define NR_RECVBUFF (8) - #else - #define NR_RECVBUFF (8) - #endif - #endif /* CONFIG_SINGLE_RECV_BUF */ - #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER - #define NR_PREALLOC_RECV_SKB (rtw_rtkm_get_nr_recv_skb()>>1) - #else /*!CONFIG_PREALLOC_RX_SKB_BUFFER */ - #define NR_PREALLOC_RECV_SKB 8 - #endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ - - #ifdef CONFIG_RTW_NAPI - #define RTL_NAPI_WEIGHT (32) - #endif +#ifdef CONFIG_RTW_NAPI + #define RTL_NAPI_WEIGHT (32) #endif + #if defined(CONFIG_RTL8821C) && defined(CONFIG_SDIO_HCI) && defined(CONFIG_RECV_THREAD_MODE) #ifdef NR_RECVBUFF #undef NR_RECVBUFF @@ -84,20 +70,10 @@ #define RX_CMD_QUEUE 1 #define RX_MAX_QUEUE 2 -static u8 SNAP_ETH_TYPE_IPX[2] = {0x81, 0x37}; - -static u8 SNAP_ETH_TYPE_APPLETALK_AARP[2] = {0x80, 0xf3}; -static u8 SNAP_ETH_TYPE_APPLETALK_DDP[2] = {0x80, 0x9b}; -static u8 SNAP_ETH_TYPE_TDLS[2] = {0x89, 0x0d}; -static u8 SNAP_HDR_APPLETALK_DDP[3] = {0x08, 0x00, 0x07}; /* Datagram Delivery Protocol */ - -static u8 oui_8021h[] = {0x00, 0x00, 0xf8}; -static u8 oui_rfc1042[] = {0x00, 0x00, 0x00}; - #define MAX_SUBFRAME_COUNT 64 -static u8 rtw_rfc1042_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 }; /* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */ -static u8 rtw_bridge_tunnel_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 }; +extern u8 rtw_bridge_tunnel_header[]; +extern u8 rtw_rfc1042_header[]; /* for Rx reordering buffer control */ struct recv_reorder_ctrl { @@ -221,6 +197,12 @@ struct rx_pkt_attrib { u8 ppdu_cnt; u32 free_cnt; /* free run counter */ struct phydm_phyinfo_struct phy_info; + +#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX + /* checksum offload realted varaiables */ + u8 csum_valid; /* Checksum valid, 0: not check, 1: checked */ + u8 csum_err; /* Checksum Error occurs */ +#endif /* CONFIG_TCP_CSUM_OFFLOAD_RX */ }; #ifdef CONFIG_RTW_MESH @@ -270,7 +252,7 @@ struct recv_stat { unsigned int rxdw1; -#if !((defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)) && defined(CONFIG_PCI_HCI)) /* exclude 8192ee, 8814ae, 8822be, 8821ce */ +#if !((defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)) && defined(CONFIG_PCI_HCI)) /* exclude 8192ee, 8814ae, 8822be, 8821ce */ unsigned int rxdw2; unsigned int rxdw3; @@ -356,18 +338,6 @@ struct recv_priv { _adapter *adapter; -#ifdef PLATFORM_WINDOWS - _nic_hdl RxPktPoolHdl; - _nic_hdl RxBufPoolHdl; - -#ifdef PLATFORM_OS_XP - PMDL pbytecnt_mdl; -#endif - uint counter; /* record the number that up-layer will return to drv; only when counter==0 can we release recv_priv */ - NDIS_EVENT recv_resource_evt ; -#endif - - u32 is_any_non_be_pkts; u64 rx_bytes; @@ -403,20 +373,16 @@ struct recv_priv { #endif #if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) -#ifdef PLATFORM_FREEBSD - struct task irq_prepare_beacon_tasklet; - struct task recv_tasklet; -#else /* PLATFORM_FREEBSD */ - struct tasklet_struct irq_prepare_beacon_tasklet; - struct tasklet_struct recv_tasklet; -#endif /* PLATFORM_FREEBSD */ + _tasklet irq_prepare_beacon_tasklet; + _tasklet recv_tasklet; + struct sk_buff_head free_recv_skb_queue; struct sk_buff_head rx_skb_queue; #ifdef CONFIG_RTW_NAPI struct sk_buff_head rx_napi_skb_queue; #endif #ifdef CONFIG_RX_INDICATE_QUEUE - struct task rx_indicate_tasklet; + _tasklet rx_indicate_tasklet; struct ifqueue rx_indicate_queue; #endif /* CONFIG_RX_INDICATE_QUEUE */ @@ -435,7 +401,7 @@ struct recv_priv { /* Rx */ struct rtw_rx_ring rx_ring[PCI_MAX_RX_QUEUE]; int rxringcount; /* size should be PCI_MAX_RX_QUEUE */ - u16 rxbuffersize; + u32 rxbuffersize; #endif /* For display the phy informatiom */ @@ -505,6 +471,8 @@ struct sta_recv_priv { struct stainfo_rxcache rxcache; u16 bmc_tid_rxseq[16]; + u16 nonqos_rxseq; + u16 nonqos_bmc_rxseq; /* uint sta_rx_bytes; */ /* uint sta_rx_pkts; */ @@ -532,24 +500,12 @@ struct recv_buf { u8 *pend; #ifdef CONFIG_USB_HCI - -#if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) PURB purb; dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ u32 alloc_sz; -#endif - -#ifdef PLATFORM_OS_XP - PIRP pirp; -#endif - -#ifdef PLATFORM_OS_CE - USB_TRANSFER usb_transfer_read_port; -#endif u8 irp_pending; int transfer_len; - #endif #if defined(PLATFORM_LINUX) @@ -794,22 +750,6 @@ __inline static u8 *recvframe_pull_tail(union recv_frame *precvframe, sint sz) } - - -__inline static _buffer *get_rxbuf_desc(union recv_frame *precvframe) -{ - _buffer *buf_desc; - - if (precvframe == NULL) - return NULL; -#ifdef PLATFORM_WINDOWS - NdisQueryPacket(precvframe->u.hdr.pkt, NULL, NULL, &buf_desc, NULL); -#endif - - return buf_desc; -} - - __inline static union recv_frame *rxmem_to_recvframe(u8 *rxmem) { /* due to the design of 2048 bytes alignment of recv_frame, we can reference the union recv_frame */ @@ -825,13 +765,6 @@ __inline static union recv_frame *pkt_to_recvframe(_pkt *pkt) u8 *buf_star; union recv_frame *precv_frame; -#ifdef PLATFORM_WINDOWS - _buffer *buf_desc; - uint len; - - NdisQueryPacket(pkt, NULL, NULL, &buf_desc, &len); - NdisQueryBufferSafe(buf_desc, &buf_star, &len, HighPagePriority); -#endif precv_frame = rxmem_to_recvframe((unsigned char *)buf_star); return precv_frame; @@ -868,15 +801,8 @@ __inline static s32 translate_percentage_to_dbm(u32 SignalStrengthIndex) { s32 SignalPower; /* in dBm. */ -#ifdef CONFIG_SIGNAL_SCALE_MAPPING - /* Translate to dBm (x=0.5y-95). */ - SignalPower = (s32)((SignalStrengthIndex + 1) >> 1); - SignalPower -= 95; -#else /* Translate to dBm (x=y-100) */ SignalPower = SignalStrengthIndex - 100; -#endif - return SignalPower; } diff --git a/include/rtw_rf.h b/include/rtw_rf.h index e4c80b9..5733894 100644 --- a/include/rtw_rf.h +++ b/include/rtw_rf.h @@ -16,7 +16,9 @@ #define __RTW_RF_H_ #define NumRates (13) - +#define B_MODE_RATE_NUM (4) +#define G_MODE_RATE_NUM (8) +#define G_MODE_BASIC_RATE_NUM (3) /* slot time for 11g */ #define SHORT_SLOT_TIME 9 #define NON_SHORT_SLOT_TIME 20 @@ -149,45 +151,6 @@ int rtw_ch2freq(int chan); int rtw_freq2ch(int freq); bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo); -#define RTW_MODULE_RTL8821AE_HMC_M2 BIT0 /* RTL8821AE(HMC + M.2) */ -#define RTW_MODULE_RTL8821AU BIT1 /* RTL8821AU */ -#define RTW_MODULE_RTL8812AENF_NGFF BIT2 /* RTL8812AENF(8812AE+8761)_NGFF */ -#define RTW_MODULE_RTL8812AEBT_HMC BIT3 /* RTL8812AEBT(8812AE+8761)_HMC */ -#define RTW_MODULE_RTL8188EE_HMC_M2 BIT4 /* RTL8188EE(HMC + M.2) */ -#define RTW_MODULE_RTL8723BE_HMC_M2 BIT5 /* RTL8723BE(HMC + M.2) */ -#define RTW_MODULE_RTL8723BS_NGFF1216 BIT6 /* RTL8723BS(NGFF1216) */ -#define RTW_MODULE_RTL8192EEBT_HMC_M2 BIT7 /* RTL8192EEBT(8192EE+8761AU)_(HMC + M.2) */ -#define RTW_MODULE_RTL8723DE_NGFF1630 BIT8 /* RTL8723DE(NGFF1630) */ -#define RTW_MODULE_RTL8822BE BIT9 /* RTL8822BE */ -#define RTW_MODULE_RTL8821CE BIT10 /* RTL8821CE */ - -#define IS_ALPHA2_NO_SPECIFIED(_alpha2) ((*((u16 *)(_alpha2))) == 0xFFFF) - -struct country_chplan { - char alpha2[2]; - u8 chplan; -#ifdef CONFIG_80211AC_VHT - u8 en_11ac; -#endif -#if RTW_DEF_MODULE_REGULATORY_CERT - u16 def_module_flags; /* RTW_MODULE_RTLXXX */ -#endif -}; - -#ifdef CONFIG_80211AC_VHT -#define COUNTRY_CHPLAN_EN_11AC(_ent) ((_ent)->en_11ac) -#else -#define COUNTRY_CHPLAN_EN_11AC(_ent) 0 -#endif - -#if RTW_DEF_MODULE_REGULATORY_CERT -#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) ((_ent)->def_module_flags) -#else -#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) 0 -#endif - -const struct country_chplan *rtw_get_chplan_from_country(const char *country_code); - struct rf_ctl_t; typedef enum _REGULATION_TXPWR_LMT { @@ -205,7 +168,7 @@ typedef enum _REGULATION_TXPWR_LMT { extern const char *const _regd_str[]; #define regd_str(regd) (((regd) > TXPWR_LMT_WW) ? _regd_str[TXPWR_LMT_WW] : _regd_str[(regd)]) -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT struct regd_exc_ent { _list list; char country[2]; diff --git a/include/rtw_security.h b/include/rtw_security.h index ac8432e..0adc700 100644 --- a/include/rtw_security.h +++ b/include/rtw_security.h @@ -176,6 +176,9 @@ struct security_priv { u8 bcheck_grpkey; u8 bgrpkey_handshake; + u8 auth_alg; + u8 auth_type; + u8 extauth_status; /* u8 packet_cnt; */ /* unused, removed */ s32 sw_encrypt;/* from registry_priv */ @@ -189,9 +192,6 @@ struct security_priv { u32 ndisencryptstatus; /* NDIS_802_11_ENCRYPTION_STATUS */ NDIS_802_11_WEP ndiswep; -#ifdef PLATFORM_WINDOWS - u8 KeyMaterial[16];/* variable length depending on above field. */ -#endif u8 assoc_info[600]; u8 szofcapability[256]; /* for wpa2 usage */ @@ -477,7 +477,7 @@ u32 rtw_BIP_verify(_adapter *padapter, u8 *whdr_pos, sint flen , const u8 *key, u16 id, u64* ipn); #endif #ifdef CONFIG_TDLS -void wpa_tdls_generate_tpk(_adapter *padapter, PVOID sta); +void wpa_tdls_generate_tpk(_adapter *padapter, void *sta); int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq, u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie, u8 *mic); @@ -494,4 +494,10 @@ u8 rtw_handle_tkip_countermeasure(_adapter *adapter, const char *caller); u16 rtw_calc_crc(u8 *pdata, int length); #endif /*CONFIG_WOWLAN*/ +#define rtw_sec_chk_auth_alg(a, s) \ + ((a)->securitypriv.auth_alg == (s)) + +#define rtw_sec_chk_auth_type(a, s) \ + ((a)->securitypriv.auth_type == (s)) + #endif /* __RTL871X_SECURITY_H_ */ diff --git a/include/rtw_version.h b/include/rtw_version.h index 6daceb0..daea889 100644 --- a/include/rtw_version.h +++ b/include/rtw_version.h @@ -1 +1 @@ -#define DRIVERVERSION "v5.3.9_28540.20180627" +#define DRIVERVERSION "v5.7.6.1_35670.20191106" diff --git a/include/rtw_vht.h b/include/rtw_vht.h index 86b8f3e..587366d 100644 --- a/include/rtw_vht.h +++ b/include/rtw_vht.h @@ -137,6 +137,20 @@ struct vht_priv { u8 vht_op_mode_notify; }; +#ifdef ROKU_PRIVATE +struct vht_priv_infra_ap { + + /* Infra mode, only store for AP's info, not intersection of STA and AP*/ + u8 ldpc_cap_infra_ap; + u8 stbc_cap_infra_ap; + u16 beamform_cap_infra_ap; + u8 vht_mcs_map_infra_ap[2]; + u8 vht_mcs_map_tx_infra_ap[2]; + u8 channel_width_infra_ap; + u8 number_of_streams_infra_ap; +}; +#endif /* ROKU_PRIVATE */ + u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map); u16 rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate); u64 rtw_vht_mcs_map_to_bitmap(u8 *mcs_map, u8 nss); @@ -144,11 +158,14 @@ void rtw_vht_use_default_setting(_adapter *padapter); u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel); u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw); u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf); -void update_sta_vht_info_apmode(_adapter *padapter, PVOID psta); +void update_sta_vht_info_apmode(_adapter *padapter, void *psta); void update_hw_vht_param(_adapter *padapter); void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); +#ifdef ROKU_PRIVATE +void VHT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); +#endif /* ROKU_PRIVATE */ void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta); +void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, void *sta); u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len); void VHTOnAssocRsp(_adapter *padapter); u8 rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map); diff --git a/include/rtw_xmit.h b/include/rtw_xmit.h index f612888..f079190 100644 --- a/include/rtw_xmit.h +++ b/include/rtw_xmit.h @@ -1,6 +1,6 @@ /****************************************************************************** * - * Copyright(c) 2007 - 2017 Realtek Corporation. + * Copyright(c) 2007 - 2019 Realtek Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as @@ -18,7 +18,15 @@ #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) #ifdef CONFIG_TX_AGGREGATION - #define MAX_XMITBUF_SZ (20480) /* 20k */ + #ifdef CONFIG_RTL8822C + #ifdef CONFIG_SDIO_TX_FORMAT_DUMMY_AUTO + #define MAX_XMITBUF_SZ (51200) + #else + #define MAX_XMITBUF_SZ (32764) + #endif + #else + #define MAX_XMITBUF_SZ (20480) /* 20k */ + #endif /* #define SDIO_TX_AGG_MAX 5 */ #else #define MAX_XMITBUF_SZ (1664) @@ -27,6 +35,7 @@ #if defined CONFIG_SDIO_HCI #define NR_XMITBUFF (16) + #define SDIO_TX_DIV_NUM (2) #endif #if defined(CONFIG_GSPI_HCI) #define NR_XMITBUFF (128) @@ -57,23 +66,25 @@ #else #define MAX_XMITBUF_SZ (1664) #endif +#ifdef CONFIG_PCI_TX_POLLING + #define NR_XMITBUFF (256) +#else #define NR_XMITBUFF (128) #endif +#endif -#ifdef PLATFORM_OS_CE + +#ifdef CONFIG_PCI_HCI #define XMITBUF_ALIGN_SZ 4 #else - #ifdef CONFIG_PCI_HCI - #define XMITBUF_ALIGN_SZ 4 + #ifdef USB_XMITBUF_ALIGN_SZ + #define XMITBUF_ALIGN_SZ (USB_XMITBUF_ALIGN_SZ) #else - #ifdef USB_XMITBUF_ALIGN_SZ - #define XMITBUF_ALIGN_SZ (USB_XMITBUF_ALIGN_SZ) - #else - #define XMITBUF_ALIGN_SZ 512 - #endif + #define XMITBUF_ALIGN_SZ 512 #endif #endif + /* xmit extension buff defination */ #define MAX_XMIT_EXTBUF_SZ (1536) @@ -91,6 +102,8 @@ #define MAX_CMDBUF_SZ (5120) /* (4096) */ #endif +#define MAX_BEACON_LEN 512 + #define MAX_NUMBLKS (1) #define XMIT_VO_QUEUE (0) @@ -182,9 +195,10 @@ #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ||\ defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8192E) ||\ defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8703B) ||\ - defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8723D) + defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D) ||\ + defined(CONFIG_RTL8710B) || defined(CONFIG_RTL8192F) #define TXDESC_SIZE 40 -#elif defined(CONFIG_RTL8822B) +#elif defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) #define TXDESC_SIZE 48 /* HALMAC_TX_DESC_SIZE_8822B */ #elif defined(CONFIG_RTL8821C) #define TXDESC_SIZE 48 /* HALMAC_TX_DESC_SIZE_8821C */ @@ -211,7 +225,7 @@ #endif #ifdef CONFIG_PCI_HCI - #if defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_TRX_BD_ARCH) + #if defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || defined(CONFIG_TRX_BD_ARCH) /* this section is defined for buffer descriptor ring architecture */ #define TX_WIFI_INFO_SIZE (TXDESC_SIZE) /* it may add 802.11 hdr or others... */ /* tx desc and payload are in the same buf */ @@ -236,7 +250,8 @@ enum TXDESC_SC { #define TXDESC_64_BYTES #endif #elif defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8723B) \ - || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8723D) + || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D) \ + || defined(CONFIG_RTL8192F) #define TXDESC_40_BYTES #endif @@ -249,7 +264,7 @@ struct tx_buf_desc { #endif unsigned int dword[TX_BUFFER_SEG_SIZE * (2 << TX_BUFFER_SEG_NUM)]; } __packed; -#elif (defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)) && defined(CONFIG_PCI_HCI) /* 8192ee or 8814ae */ +#elif (defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C)) && defined(CONFIG_PCI_HCI) /* 8192ee or 8814ae */ /* 8192EE_TODO */ struct tx_desc { unsigned int txdw0; @@ -390,9 +405,6 @@ struct pkt_attrib { u16 seqnum; struct sta_info *psta; -#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX - u8 hw_tcp_csum; -#endif }; #else /* reduce size */ @@ -435,6 +447,9 @@ struct pkt_attrib { #endif u8 mfwd_ttl; u32 mseq; +#endif +#ifdef CONFIG_TX_CSUM_OFFLOAD + u8 hw_csum; #endif u8 key_idx; u8 qos_en; @@ -464,9 +479,6 @@ struct pkt_attrib { #endif /* CONFIG_WMMPS_STA */ struct sta_info *psta; -#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX - u8 hw_tcp_csum; -#endif u8 rtsen; u8 cts2self; @@ -595,18 +607,8 @@ struct xmit_buf { u8 bulkout_id; /* for halmac */ #endif /* RTW_HALMAC */ -#if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) PURB pxmit_urb[8]; dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ -#endif - -#ifdef PLATFORM_OS_XP - PIRP pxmit_irp[8]; -#endif - -#ifdef PLATFORM_OS_CE - USB_TRANSFER usb_transfer_write_port; -#endif u8 bpending[8]; @@ -622,11 +624,6 @@ struct xmit_buf { u32 ff_hwaddr; u8 pg_num; u8 agg_num; -#ifdef PLATFORM_OS_XP - PMDL pxmitbuf_mdl; - PIRP pxmitbuf_irp; - PSDBUS_REQUEST_PACKET pxmitbuf_sdrp; -#endif #endif #ifdef CONFIG_PCI_HCI @@ -793,16 +790,8 @@ struct xmit_priv { _sema tx_retevt;/* all tx return event; */ u8 txirp_cnt; -#ifdef PLATFORM_OS_CE - USB_TRANSFER usb_transfer_write_port; - /* USB_TRANSFER usb_transfer_write_mem; */ -#endif -#ifdef PLATFORM_LINUX - struct tasklet_struct xmit_tasklet; -#endif -#ifdef PLATFORM_FREEBSD - struct task xmit_tasklet; -#endif + _tasklet xmit_tasklet; + /* per AC pending irp */ int beq_cnt; int bkq_cnt; @@ -816,16 +805,12 @@ struct xmit_priv { struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT]; int txringcount[PCI_MAX_TX_QUEUE_COUNT]; u8 beaconDMAing; /* flag of indicating beacon is transmiting to HW by DMA */ -#ifdef PLATFORM_LINUX - struct tasklet_struct xmit_tasklet; -#endif + _tasklet xmit_tasklet; #endif #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) #ifdef CONFIG_SDIO_TX_TASKLET -#ifdef PLATFORM_LINUX - struct tasklet_struct xmit_tasklet; -#endif /* PLATFORM_LINUX */ + _tasklet xmit_tasklet; #else _thread_hdl_ SdioXmitThread; _sema SdioXmitSema; @@ -885,6 +870,9 @@ struct xmit_priv { #endif #ifdef DBG_TXBD_DESC_DUMP BOOLEAN dump_txbd_desc; +#endif +#ifdef CONFIG_PCI_TX_POLLING + _timer tx_poll_timer; #endif _lock lock_sctx; @@ -901,10 +889,34 @@ extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8192ee(struct xmit_priv *pxmi extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8822be(struct xmit_priv *pxmitpriv, enum cmdbuf_type buf_type); #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8822be(p, CMDBUF_BEACON) +#elif defined(CONFIG_RTL8822C) && defined(CONFIG_PCI_HCI) +extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8822ce(struct xmit_priv *pxmitpriv, + enum cmdbuf_type buf_type); +#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8822ce(p, CMDBUF_BEACON) #elif defined(CONFIG_RTL8821C) && defined(CONFIG_PCI_HCI) extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8821ce(struct xmit_priv *pxmitpriv, enum cmdbuf_type buf_type); #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8821ce(p, CMDBUF_BEACON) +#elif defined(CONFIG_RTL8192F) && defined(CONFIG_PCI_HCI) +extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8192fe(struct xmit_priv *pxmitpriv, + enum cmdbuf_type buf_type); +#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8192fe(p, CMDBUF_BEACON) +#elif defined(CONFIG_RTL8812A) && defined(CONFIG_PCI_HCI) +extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8812ae(struct xmit_priv *pxmitpriv, + enum cmdbuf_type buf_type); +#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8812ae(p, CMDBUF_BEACON) +#elif defined(CONFIG_RTL8723D) && defined(CONFIG_PCI_HCI) +extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8723de(struct xmit_priv *pxmitpriv, + enum cmdbuf_type buf_type); +#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8723de(p, CMDBUF_BEACON) +#elif defined(CONFIG_RTL8723B) && defined(CONFIG_PCI_HCI) +extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8723be(struct xmit_priv *pxmitpriv, + enum cmdbuf_type buf_type); +#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8723be(p, CMDBUF_BEACON) +#elif defined(CONFIG_RTL8814A) && defined(CONFIG_PCI_HCI) +extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8814ae(struct xmit_priv *pxmitpriv, + enum cmdbuf_type buf_type); +#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8814ae(p, CMDBUF_BEACON) #else #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_BEACON) #endif @@ -917,12 +929,6 @@ extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitb void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz); extern void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len); -static s32 update_attrib_sec_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta); -static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta); - -#ifdef CONFIG_WMMPS_STA -static void update_attrib_trigger_frame_info(_adapter *padapter, struct pkt_attrib *pattrib); -#endif /* CONFIG_WMMPS_STA */ extern s32 rtw_make_wlanhdr(_adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib); extern s32 rtw_put_snap(u8 *data, u16 h_proto); @@ -966,6 +972,9 @@ void rtw_free_hwxmits(_adapter *padapter); #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev); #endif +void rtw_xmit_dequeue_callback(_workitem *work); +void rtw_xmit_queue_set(struct sta_info *sta); +void rtw_xmit_queue_clear(struct sta_info *sta); s32 rtw_xmit_posthandle(_adapter *padapter, struct xmit_frame *pxmitframe, _pkt *pkt); s32 rtw_xmit(_adapter *padapter, _pkt **pkt); bool xmitframe_hiq_filter(struct xmit_frame *xmitframe); @@ -1022,7 +1031,13 @@ void rtw_tx_desc_backup_reset(void); u8 rtw_get_tx_desc_backup(_adapter *padapter, u8 hwq, struct rtw_tx_desc_backup **pbak); #endif -static void do_queue_select(_adapter *padapter, struct pkt_attrib *pattrib); +#ifdef CONFIG_PCI_TX_POLLING +void rtw_tx_poll_init(_adapter *padapter); +void rtw_tx_poll_timeout_handler(void *FunctionContext); +void rtw_tx_poll_timer_set(_adapter *padapter, u32 delay); +void rtw_tx_poll_timer_cancel(_adapter *padapter); +#endif + u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe); #ifdef CONFIG_XMIT_ACK diff --git a/include/sdio_hal.h b/include/sdio_hal.h index 62e7f79..6e49835 100644 --- a/include/sdio_hal.h +++ b/include/sdio_hal.h @@ -46,4 +46,12 @@ void rtl8723ds_set_hal_ops(PADAPTER padapter); void rtl8188fs_set_hal_ops(PADAPTER padapter); #endif +#ifdef CONFIG_RTL8188GTV +void rtl8188gtvs_set_hal_ops(PADAPTER padapter); +#endif + +#ifdef CONFIG_RTL8192F +void rtl8192fs_set_hal_ops(PADAPTER padapter); +#endif + #endif /* __SDIO_HAL_H__ */ diff --git a/include/sdio_ops.h b/include/sdio_ops.h index 9fc20da..29f795d 100644 --- a/include/sdio_ops.h +++ b/include/sdio_ops.h @@ -25,25 +25,6 @@ #include #endif -#ifdef PLATFORM_WINDOWS - -#ifdef PLATFORM_OS_XP -#include -struct async_context { - PMDL pmdl; - PSDBUS_REQUEST_PACKET sdrp; - unsigned char *r_buf; - unsigned char *padapter; -}; -#endif - -#ifdef PLATFORM_OS_CE -#include -#endif - -#endif /* PLATFORM_WINDOWS */ - - extern void sdio_set_intf_ops(_adapter *padapter, struct _io_ops *pops); void dump_sdio_card_info(void *sel, struct dvobj_priv *dvobj); @@ -51,6 +32,7 @@ u32 sdio_init(struct dvobj_priv *dvobj); void sdio_deinit(struct dvobj_priv *dvobj); int sdio_alloc_irq(struct dvobj_priv *dvobj); void sdio_free_irq(struct dvobj_priv *dvobj); +u8 sdio_get_num_of_func(struct dvobj_priv *dvobj); #if 0 extern void sdio_func1cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem); @@ -91,7 +73,7 @@ void ClearInterrupt8821AS(PADAPTER padapter); #endif /* CONFIG_RTL8821A */ #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -#if defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B) +#if defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) u8 rtw_hal_enable_cpwm2(_adapter *adapter); #endif extern u8 RecvOnePkt(PADAPTER padapter); @@ -146,6 +128,20 @@ extern void ClearInterrupt8723DSdio(PADAPTER padapter); #endif /* CONFIG_WOWLAN */ #endif +#ifdef CONFIG_RTL8192F +extern void InitInterrupt8192FSdio(PADAPTER padapter); +extern void InitSysInterrupt8192FSdio(PADAPTER padapter); +extern void EnableInterrupt8192FSdio(PADAPTER padapter); +extern void DisableInterrupt8192FSdio(PADAPTER padapter); +extern void UpdateInterruptMask8192FSdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR); +extern u8 HalQueryTxBufferStatus8192FSdio(PADAPTER padapter); +extern u8 HalQueryTxOQTBufferStatus8192FSdio(PADAPTER padapter); +#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) +extern void DisableInterruptButCpwm2192fSdio(PADAPTER padapter); +extern void ClearInterrupt8192FSdio(PADAPTER padapter); +#endif /* CONFIG_WOWLAN */ +#endif + #ifdef CONFIG_RTL8188F extern void InitInterrupt8188FSdio(PADAPTER padapter); extern void InitSysInterrupt8188FSdio(PADAPTER padapter); @@ -159,6 +155,19 @@ extern void ClearInterrupt8188FSdio(PADAPTER padapter); #endif /* defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) */ #endif +#ifdef CONFIG_RTL8188GTV +extern void InitInterrupt8188GTVSdio(PADAPTER padapter); +extern void InitSysInterrupt8188GTVSdio(PADAPTER padapter); +extern void EnableInterrupt8188GTVSdio(PADAPTER padapter); +extern void DisableInterrupt8188GTVSdio(PADAPTER padapter); +extern u8 HalQueryTxBufferStatus8188GTVSdio(PADAPTER padapter); +extern u8 HalQueryTxOQTBufferStatus8188GTVSdio(PADAPTER padapter); +#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) +extern void DisableInterruptButCpwm28188GTVSdio(PADAPTER padapter); +extern void ClearInterrupt8188GTVSdio(PADAPTER padapter); +#endif /* defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) */ +#endif + /** * rtw_sdio_get_block_size() - Get block size of SDIO transfer * @d struct dvobj_priv* diff --git a/include/sdio_osintf.h b/include/sdio_osintf.h index 7c2abd1..a94e656 100644 --- a/include/sdio_osintf.h +++ b/include/sdio_osintf.h @@ -16,10 +16,4 @@ #define __SDIO_OSINTF_H__ -#ifdef PLATFORM_OS_CE -extern NDIS_STATUS ce_sd_get_dev_hdl(PADAPTER padapter); -SD_API_STATUS ce_sd_int_callback(SD_DEVICE_HANDLE hDevice, PADAPTER padapter); -extern void sd_setup_irs(PADAPTER padapter); -#endif - #endif diff --git a/include/sta_info.h b/include/sta_info.h index f7de301..351125d 100644 --- a/include/sta_info.h +++ b/include/sta_info.h @@ -1,6 +1,6 @@ /****************************************************************************** * - * Copyright(c) 2007 - 2017 Realtek Corporation. + * Copyright(c) 2007 - 2019 Realtek Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as @@ -99,27 +99,27 @@ struct stainfo_stats { systime last_rx_time; u64 rx_mgnt_pkts; - u64 rx_beacon_pkts; - u64 rx_probereq_pkts; - u64 rx_probersp_pkts; /* unicast to self */ - u64 rx_probersp_bm_pkts; - u64 rx_probersp_uo_pkts; /* unicast to others */ + u64 rx_beacon_pkts; + u64 rx_probereq_pkts; + u64 rx_probersp_pkts; /* unicast to self */ + u64 rx_probersp_bm_pkts; + u64 rx_probersp_uo_pkts; /* unicast to others */ u64 rx_ctrl_pkts; u64 rx_data_pkts; - u64 rx_data_bc_pkts; - u64 rx_data_mc_pkts; + u64 rx_data_bc_pkts; + u64 rx_data_mc_pkts; u64 rx_data_qos_pkts[TID_NUM]; /* unicast only */ u64 last_rx_mgnt_pkts; - u64 last_rx_beacon_pkts; - u64 last_rx_probereq_pkts; - u64 last_rx_probersp_pkts; /* unicast to self */ - u64 last_rx_probersp_bm_pkts; - u64 last_rx_probersp_uo_pkts; /* unicast to others */ + u64 last_rx_beacon_pkts; + u64 last_rx_probereq_pkts; + u64 last_rx_probersp_pkts; /* unicast to self */ + u64 last_rx_probersp_bm_pkts; + u64 last_rx_probersp_uo_pkts; /* unicast to others */ u64 last_rx_ctrl_pkts; u64 last_rx_data_pkts; - u64 last_rx_data_bc_pkts; - u64 last_rx_data_mc_pkts; + u64 last_rx_data_bc_pkts; + u64 last_rx_data_mc_pkts; u64 last_rx_data_qos_pkts[TID_NUM]; /* unicast only */ #ifdef CONFIG_TDLS @@ -128,13 +128,14 @@ struct stainfo_stats { #endif u64 rx_bytes; - u64 rx_bc_bytes; - u64 rx_mc_bytes; + u64 rx_bc_bytes; + u64 rx_mc_bytes; u64 last_rx_bytes; - u64 last_rx_bc_bytes; - u64 last_rx_mc_bytes; + u64 last_rx_bc_bytes; + u64 last_rx_mc_bytes; u64 rx_drops; /* TBD */ - u16 rx_tp_mbytes; + u32 rx_tp_kbits; + u32 smooth_rx_tp_kbits; u64 tx_pkts; u64 last_tx_pkts; @@ -142,7 +143,13 @@ struct stainfo_stats { u64 tx_bytes; u64 last_tx_bytes; u64 tx_drops; /* TBD */ - u16 tx_tp_mbytes; + u32 tx_tp_kbits; + u32 smooth_tx_tp_kbits; + +#ifdef CONFIG_LPS_CHK_BY_TP + u64 acc_tx_bytes; + u64 acc_rx_bytes; +#endif /* unicast only */ u64 last_rx_data_uc_pkts; /* For Read & Clear requirement in proc_get_rx_stat() */ @@ -394,6 +401,8 @@ struct sta_info { int wpa_pairwise_cipher; int wpa2_pairwise_cipher; + u32 akm_suite_type; + u8 bpairwise_key_installed; #ifdef CONFIG_RTW_80211R u8 ft_pairwise_key_installed; @@ -468,9 +477,13 @@ struct sta_info { u8 nonpeer_mps; struct rtw_atlm_param metrics; + /* The reference for nexthop_lookup */ + BOOLEAN alive; #endif #ifdef CONFIG_IOCTL_CFG80211 + u8 *pauth_frame; + u32 auth_len; u8 *passoc_req; u32 assoc_req_len; #endif @@ -487,6 +500,17 @@ struct sta_info { u8 max_agg_num_minimal_record; /*keep minimal tx desc max_agg_num setting*/ u8 curr_rx_rate; u8 curr_rx_rate_bmc; +#ifdef CONFIG_RTS_FULL_BW + bool vendor_8812; +#endif + + /* + * Vaiables for queuing TX pkt a short period of time + * to wait something ready. + */ + u8 tx_q_enable; + struct __queue tx_queue; + _workitem tx_q_work; }; #ifdef CONFIG_RTW_MESH @@ -634,6 +658,8 @@ struct sta_priv { u32 adhoc_expire_to; + int rx_chk_limit; + #ifdef CONFIG_AP_MODE _list asoc_list; _list auth_list; diff --git a/include/usb_hal.h b/include/usb_hal.h index a5af048..2d7776f 100644 --- a/include/usb_hal.h +++ b/include/usb_hal.h @@ -48,6 +48,10 @@ void rtl8814au_set_hal_ops(_adapter *padapter); void rtl8188fu_set_hal_ops(_adapter *padapter); #endif +#ifdef CONFIG_RTL8188GTV +void rtl8188gtvu_set_hal_ops(_adapter *padapter); +#endif + #ifdef CONFIG_RTL8703B void rtl8703bu_set_hal_ops(_adapter *padapter); #endif @@ -56,7 +60,12 @@ void rtl8703bu_set_hal_ops(_adapter *padapter); void rtl8723du_set_hal_ops(_adapter *padapter); #endif -#ifdef CONFIG_INTEL_PROXIM -extern _adapter *rtw_usb_get_sw_pointer(void); -#endif /* CONFIG_INTEL_PROXIM */ +#ifdef CONFIG_RTL8710B +void rtl8710bu_set_hal_ops(_adapter *padapter); +#endif + +#ifdef CONFIG_RTL8192F +void rtl8192fu_set_hal_ops(_adapter *padapter); +#endif /* CONFIG_RTL8192F */ + #endif /* __USB_HAL_H__ */ diff --git a/include/usb_ops.h b/include/usb_ops.h index a0238f1..6d5435d 100644 --- a/include/usb_ops.h +++ b/include/usb_ops.h @@ -70,6 +70,13 @@ void interrupt_handler_8188fu(_adapter *padapter, u16 pkt_len, u8 *pbuf); #endif #endif +#ifdef CONFIG_RTL8188GTV +void rtl8188gtvu_set_hw_type(struct dvobj_priv *pdvobj); +#ifdef CONFIG_SUPPORT_USB_INT +void interrupt_handler_8188gtvu(_adapter *padapter, u16 pkt_len, u8 *pbuf); +#endif +#endif + #ifdef CONFIG_RTL8723B void rtl8723bu_set_hw_type(struct dvobj_priv *pdvobj); #ifdef CONFIG_SUPPORT_USB_INT @@ -96,6 +103,24 @@ void interrupt_handler_8723du(_adapter *padapter, u16 pkt_len, u8 *pbuf); #endif /* CONFIG_SUPPORT_USB_INT */ #endif /* CONFIG_RTL8723D */ +#ifdef CONFIG_RTL8710B +void rtl8710bu_set_hw_type(struct dvobj_priv *pdvobj); +void rtl8710bu_set_intf_ops(struct _io_ops *pops); +void rtl8710bu_recv_tasklet(void *priv); +void rtl8710bu_xmit_tasklet(void *priv); +#ifdef CONFIG_SUPPORT_USB_INT +void interrupt_handler_8710bu(_adapter *padapter, u16 pkt_len, u8 *pbuf); +#endif /* CONFIG_SUPPORT_USB_INT */ +#endif /* CONFIG_RTL8710B */ + +#ifdef CONFIG_RTL8192F +void rtl8192fu_set_hw_type(struct dvobj_priv *pdvobj); +void rtl8192fu_xmit_tasklet(void *priv); +#ifdef CONFIG_SUPPORT_USB_INT +void rtl8192fu_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf); +#endif /* CONFIG_SUPPORT_USB_INT */ +#endif /* CONFIG_RTL8192F */ + enum RTW_USB_SPEED { RTW_USB_SPEED_UNKNOWN = 0, RTW_USB_SPEED_1_1 = 1, diff --git a/include/usb_osintf.h b/include/usb_osintf.h index 7e5feed..48495b4 100644 --- a/include/usb_osintf.h +++ b/include/usb_osintf.h @@ -17,7 +17,7 @@ #include -#define USBD_HALTED(Status) ((ULONG)(Status) >> 30 == 3) +#define USBD_HALTED(Status) ((u32)(Status) >> 30 == 3) u8 usbvendorrequest(struct dvobj_priv *pdvobjpriv, RT_USB_BREQUEST brequest, RT_USB_WVALUE wvalue, u8 windex, void *data, u8 datalen, u8 isdirectionin); diff --git a/include/usb_vendor_req.h b/include/usb_vendor_req.h index a003bfb..3e25878 100644 --- a/include/usb_vendor_req.h +++ b/include/usb_vendor_req.h @@ -47,10 +47,10 @@ typedef enum _RT_USB_WVALUE { #if 0 -BOOLEAN usbvendorrequest(PCE_USB_DEVICE CEdevice, RT_USB_BREQUEST bRequest, RT_USB_WVALUE wValue, UCHAR wIndex, PVOID Data, UCHAR DataLength, BOOLEAN isDirectionIn); -BOOLEAN CEusbGetStatusRequest(PCE_USB_DEVICE CEdevice, IN USHORT Op, IN USHORT Index, PVOID Data); -BOOLEAN CEusbFeatureRequest(PCE_USB_DEVICE CEdevice, IN USHORT Op, IN USHORT FeatureSelector, IN USHORT Index); -BOOLEAN CEusbGetDescriptorRequest(PCE_USB_DEVICE CEdevice, IN short urbLength, IN UCHAR DescriptorType, IN UCHAR Index, IN USHORT LanguageId, IN PVOID TransferBuffer, IN ULONG TransferBufferLength); +BOOLEAN usbvendorrequest(PCE_USB_DEVICE CEdevice, RT_USB_BREQUEST bRequest, RT_USB_WVALUE wValue, u8 wIndex, void *Data, u8 DataLength, BOOLEAN isDirectionIn); +BOOLEAN CEusbGetStatusRequest(PCE_USB_DEVICE CEdevice, u16 Op, u16 Index, void *Data); +BOOLEAN CEusbFeatureRequest(PCE_USB_DEVICE CEdevice, u16 Op, u16 FeatureSelector, u16 Index); +BOOLEAN CEusbGetDescriptorRequest(PCE_USB_DEVICE CEdevice, short urbLength, u8 DescriptorType, u8 Index, u16 LanguageId, void *TransferBuffer, u32 TransferBufferLength); #endif #endif diff --git a/include/wifi.h b/include/wifi.h index 979860d..8fe9207 100644 --- a/include/wifi.h +++ b/include/wifi.h @@ -16,11 +16,9 @@ #define _WIFI_H_ -#ifdef BIT -/* #error "BIT define occurred earlier elsewhere!\n" */ -#undef BIT -#endif +#ifndef BIT #define BIT(x) (1 << (x)) +#endif #define WLAN_ETHHDR_LEN 14 @@ -44,6 +42,7 @@ #define WLAN_MAX_ETHFRM_LEN 1514 #define WLAN_ETHHDR_LEN 14 #define WLAN_WMM_LEN 24 +#define VENDOR_NAME_LEN 20 #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE #define WLAN_MAX_VENDOR_IE_LEN 255 @@ -53,6 +52,13 @@ #define WIFI_PROBERESP_VENDOR_IE_BIT BIT(2) #define WIFI_ASSOCREQ_VENDOR_IE_BIT BIT(3) #define WIFI_ASSOCRESP_VENDOR_IE_BIT BIT(4) +#ifdef CONFIG_P2P +#define WIFI_P2P_PROBEREQ_VENDOR_IE_BIT BIT(5) +#define WIFI_P2P_PROBERESP_VENDOR_IE_BIT BIT(6) +#define WLAN_MAX_VENDOR_IE_MASK_MAX 7 +#else +#define WLAN_MAX_VENDOR_IE_MASK_MAX 5 +#endif #endif #define P80211CAPTURE_VERSION 0x80211001 @@ -760,7 +766,6 @@ typedef enum _ELEMENT_ID { Below is the definition for WMM ------------------------------------------------------------------------------*/ #define _WMM_IE_Length_ 7 /* for WMM STA */ -#define _WMM_Para_Element_Length_ 24 /*----------------------------------------------------------------------------- @@ -786,7 +791,7 @@ typedef enum _ELEMENT_ID { * This structure refers to "HT BlockAckReq" as * described in 802.11n draft section 7.2.1.7.1 */ -#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8712FW) +#if defined(PLATFORM_LINUX) struct rtw_ieee80211_bar { unsigned short frame_control; unsigned short duration; @@ -802,7 +807,7 @@ struct rtw_ieee80211_bar { #define IEEE80211_BAR_CTRL_CBMTID_COMPRESSED_BA 0x0004 -#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8712FW) || defined(PLATFORM_FREEBSD) +#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) @@ -882,72 +887,6 @@ struct ADDBA_request { #endif -#ifdef PLATFORM_WINDOWS - -#pragma pack(1) - -struct rtw_ieee80211_ht_cap { - unsigned short cap_info; - unsigned char ampdu_params_info; - unsigned char supp_mcs_set[16]; - unsigned short extended_ht_cap_info; - unsigned int tx_BF_cap_info; - unsigned char antenna_selection_info; -}; - - -struct ieee80211_ht_addt_info { - unsigned char control_chan; - unsigned char ht_param; - unsigned short operation_mode; - unsigned short stbc_param; - unsigned char basic_set[16]; -}; - -struct HT_caps_element { - union { - struct { - unsigned short HT_caps_info; - unsigned char AMPDU_para; - unsigned char MCS_rate[16]; - unsigned short HT_ext_caps; - unsigned int Beamforming_caps; - unsigned char ASEL_caps; - } HT_cap_element; - unsigned char HT_cap[26]; - }; -}; - -struct HT_info_element { - unsigned char primary_channel; - unsigned char infos[5]; - unsigned char MCS_rate[16]; -}; - -struct AC_param { - unsigned char ACI_AIFSN; - unsigned char CW; - unsigned short TXOP_limit; -}; - -struct WMM_para_element { - unsigned char QoS_info; - unsigned char reserved; - struct AC_param ac_param[4]; -}; - -struct ADDBA_request { - unsigned char dialog_token; - unsigned short BA_para_set; - unsigned short BA_timeout_value; - unsigned short BA_starting_seqctrl; -}; - - -#pragma pack() - -#endif - typedef enum _HT_CAP_AMPDU_FACTOR { MAX_AMPDU_FACTOR_8K = 0, MAX_AMPDU_FACTOR_16K = 1, @@ -1028,7 +967,7 @@ typedef enum _HT_CAP_AMPDU_DENSITY { * According to IEEE802.11n spec size varies from 8K to 64K (in powers of 2) */ //#define IEEE80211_MIN_AMPDU_BUF 0x8 -//#define IEEE80211_MAX_AMPDU_BUF 0x40 +//#define IEEE80211_MAX_AMPDU_BUF_HT 0x40 /* Spatial Multiplexing Power Save Modes */ diff --git a/include/wlan_bssdef.h b/include/wlan_bssdef.h index e7ae359..fa923f5 100644 --- a/include/wlan_bssdef.h +++ b/include/wlan_bssdef.h @@ -25,51 +25,27 @@ #define NDIS_802_11_LENGTH_RATES 8 #define NDIS_802_11_LENGTH_RATES_EX 16 -typedef unsigned char NDIS_802_11_MAC_ADDRESS[6]; +typedef unsigned char NDIS_802_11_MAC_ADDRESS[ETH_ALEN]; typedef long NDIS_802_11_RSSI; /* in dBm */ typedef unsigned char NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; /* Set of 8 data rates */ typedef unsigned char NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; /* Set of 16 data rates */ - -typedef ULONG NDIS_802_11_KEY_INDEX; -typedef unsigned long long NDIS_802_11_KEY_RSC; - - typedef struct _NDIS_802_11_SSID { - ULONG SsidLength; - UCHAR Ssid[32]; + u32 SsidLength; + u8 Ssid[32]; } NDIS_802_11_SSID, *PNDIS_802_11_SSID; -typedef enum _NDIS_802_11_NETWORK_TYPE { - Ndis802_11FH, - Ndis802_11DS, - Ndis802_11OFDM5, - Ndis802_11OFDM24, - Ndis802_11NetworkTypeMax /* not a real type, defined as an upper bound */ -} NDIS_802_11_NETWORK_TYPE, *PNDIS_802_11_NETWORK_TYPE; - -typedef struct _NDIS_802_11_CONFIGURATION_FH { - ULONG Length; /* Length of structure */ - ULONG HopPattern; /* As defined by 802.11, MSB set */ - ULONG HopSet; /* to one if non-802.11 */ - ULONG DwellTime; /* units are Kusec */ -} NDIS_802_11_CONFIGURATION_FH, *PNDIS_802_11_CONFIGURATION_FH; - - /* FW will only save the channel number in DSConfig. ODI Handler will convert the channel number to freq. number. */ typedef struct _NDIS_802_11_CONFIGURATION { - ULONG Length; /* Length of structure */ - ULONG BeaconPeriod; /* units are Kusec */ - ULONG ATIMWindow; /* units are Kusec */ - ULONG DSConfig; /* channel number */ - NDIS_802_11_CONFIGURATION_FH FHConfig; + u32 Length; /* Length of structure */ + u32 BeaconPeriod; /* units are Kusec */ + u32 ATIMWindow; /* units are Kusec */ + u32 DSConfig; /* channel number */ } NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION; - - typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE { Ndis802_11IBSS, Ndis802_11Infrastructure, @@ -80,62 +56,18 @@ typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE { Ndis802_11_mesh, } NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE; - - - - typedef struct _NDIS_802_11_FIXED_IEs { - UCHAR Timestamp[8]; - USHORT BeaconInterval; - USHORT Capabilities; + u8 Timestamp[8]; + u16 BeaconInterval; + u16 Capabilities; } NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs; - - typedef struct _NDIS_802_11_VARIABLE_IEs { - UCHAR ElementID; - UCHAR Length; - UCHAR data[1]; + u8 ElementID; + u8 Length; + u8 data[1]; } NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs; - - -/* - - - -Length is the 4 bytes multiples of the sume of - sizeof (NDIS_802_11_MAC_ADDRESS) + 2 + sizeof (NDIS_802_11_SSID) + sizeof (ULONG) -+ sizeof (NDIS_802_11_RSSI) + sizeof (NDIS_802_11_NETWORK_TYPE) + sizeof (NDIS_802_11_CONFIGURATION) -+ sizeof (NDIS_802_11_RATES_EX) + IELength - -Except the IELength, all other fields are fixed length. Therefore, we can define a marco to present the -partial sum. - -*/ -#if 0 -typedef struct _NDIS_WLAN_BSSID_EX { - ULONG Length; - NDIS_802_11_MAC_ADDRESS MacAddress; - UCHAR Reserved[2];/* [0]: IS beacon frame, [1]:optimum_antenna=>For antenna diversity; */ - NDIS_802_11_SSID Ssid; - ULONG Privacy; - NDIS_802_11_RSSI Rssi; - NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; - NDIS_802_11_CONFIGURATION Configuration; - NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode; - NDIS_802_11_RATES_EX SupportedRates; - ULONG IELength; - UCHAR IEs[MAX_IE_SZ]; /* (timestamp, beacon interval, and capability information) */ -} NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX; - - -typedef struct _NDIS_802_11_BSSID_LIST_EX { - ULONG NumberOfItems; - NDIS_WLAN_BSSID_EX Bssid[1]; -} NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX; -#endif - typedef enum _NDIS_802_11_AUTHENTICATION_MODE { Ndis802_11AuthModeOpen, Ndis802_11AuthModeShared, @@ -164,109 +96,13 @@ typedef enum _NDIS_802_11_WEP_STATUS { } NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS, NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS; - -#define NDIS_802_11_AI_REQFI_CAPABILITIES 1 -#define NDIS_802_11_AI_REQFI_LISTENINTERVAL 2 -#define NDIS_802_11_AI_REQFI_CURRENTAPADDRESS 4 - -#define NDIS_802_11_AI_RESFI_CAPABILITIES 1 -#define NDIS_802_11_AI_RESFI_STATUSCODE 2 -#define NDIS_802_11_AI_RESFI_ASSOCIATIONID 4 - -typedef struct _NDIS_802_11_AI_REQFI { - USHORT Capabilities; - USHORT ListenInterval; - NDIS_802_11_MAC_ADDRESS CurrentAPAddress; -} NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI; - -typedef struct _NDIS_802_11_AI_RESFI { - USHORT Capabilities; - USHORT StatusCode; - USHORT AssociationId; -} NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI; - -typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION { - ULONG Length; - USHORT AvailableRequestFixedIEs; - NDIS_802_11_AI_REQFI RequestFixedIEs; - ULONG RequestIELength; - ULONG OffsetRequestIEs; - USHORT AvailableResponseFixedIEs; - NDIS_802_11_AI_RESFI ResponseFixedIEs; - ULONG ResponseIELength; - ULONG OffsetResponseIEs; -} NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION; - -typedef enum _NDIS_802_11_RELOAD_DEFAULTS { - Ndis802_11ReloadWEPKeys -} NDIS_802_11_RELOAD_DEFAULTS, *PNDIS_802_11_RELOAD_DEFAULTS; - - -/* Key mapping keys require a BSSID */ -typedef struct _NDIS_802_11_KEY { - ULONG Length; /* Length of this structure */ - ULONG KeyIndex; - ULONG KeyLength; /* length of key in bytes */ - NDIS_802_11_MAC_ADDRESS BSSID; - NDIS_802_11_KEY_RSC KeyRSC; - UCHAR KeyMaterial[32]; /* variable length depending on above field */ -} NDIS_802_11_KEY, *PNDIS_802_11_KEY; - -typedef struct _NDIS_802_11_REMOVE_KEY { - ULONG Length; /* Length of this structure */ - ULONG KeyIndex; - NDIS_802_11_MAC_ADDRESS BSSID; -} NDIS_802_11_REMOVE_KEY, *PNDIS_802_11_REMOVE_KEY; - typedef struct _NDIS_802_11_WEP { - ULONG Length; /* Length of this structure */ - ULONG KeyIndex; /* 0 is the per-client key, 1-N are the global keys */ - ULONG KeyLength; /* length of key in bytes */ - UCHAR KeyMaterial[16];/* variable length depending on above field */ + u32 Length; /* Length of this structure */ + u32 KeyIndex; /* 0 is the per-client key, 1-N are the global keys */ + u32 KeyLength; /* length of key in bytes */ + u8 KeyMaterial[16];/* variable length depending on above field */ } NDIS_802_11_WEP, *PNDIS_802_11_WEP; -typedef struct _NDIS_802_11_AUTHENTICATION_REQUEST { - ULONG Length; /* Length of structure */ - NDIS_802_11_MAC_ADDRESS Bssid; - ULONG Flags; -} NDIS_802_11_AUTHENTICATION_REQUEST, *PNDIS_802_11_AUTHENTICATION_REQUEST; - -typedef enum _NDIS_802_11_STATUS_TYPE { - Ndis802_11StatusType_Authentication, - Ndis802_11StatusType_MediaStreamMode, - Ndis802_11StatusType_PMKID_CandidateList, - Ndis802_11StatusTypeMax /* not a real type, defined as an upper bound */ -} NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE; - -typedef struct _NDIS_802_11_STATUS_INDICATION { - NDIS_802_11_STATUS_TYPE StatusType; -} NDIS_802_11_STATUS_INDICATION, *PNDIS_802_11_STATUS_INDICATION; - -/* mask for authentication/integrity fields */ -#define NDIS_802_11_AUTH_REQUEST_AUTH_FIELDS 0x0f -#define NDIS_802_11_AUTH_REQUEST_REAUTH 0x01 -#define NDIS_802_11_AUTH_REQUEST_KEYUPDATE 0x02 -#define NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR 0x06 -#define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR 0x0E - -/* MIC check time, 60 seconds. */ -#define MIC_CHECK_TIME 60000000 - -typedef struct _NDIS_802_11_AUTHENTICATION_EVENT { - NDIS_802_11_STATUS_INDICATION Status; - NDIS_802_11_AUTHENTICATION_REQUEST Request[1]; -} NDIS_802_11_AUTHENTICATION_EVENT, *PNDIS_802_11_AUTHENTICATION_EVENT; - -typedef struct _NDIS_802_11_TEST { - ULONG Length; - ULONG Type; - union { - NDIS_802_11_AUTHENTICATION_EVENT AuthenticationEvent; - NDIS_802_11_RSSI RssiTrigger; - } tt; -} NDIS_802_11_TEST, *PNDIS_802_11_TEST; - - #endif /* end of #ifdef PLATFORM_LINUX */ #ifdef PLATFORM_FREEBSD @@ -275,51 +111,28 @@ typedef struct _NDIS_802_11_TEST { #define NDIS_802_11_LENGTH_RATES 8 #define NDIS_802_11_LENGTH_RATES_EX 16 -typedef unsigned char NDIS_802_11_MAC_ADDRESS[6]; +typedef unsigned char NDIS_802_11_MAC_ADDRESS[ETH_ALEN]; typedef long NDIS_802_11_RSSI; /* in dBm */ typedef unsigned char NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; /* Set of 8 data rates */ typedef unsigned char NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; /* Set of 16 data rates */ -typedef ULONG NDIS_802_11_KEY_INDEX; -typedef unsigned long long NDIS_802_11_KEY_RSC; - - typedef struct _NDIS_802_11_SSID { - ULONG SsidLength; - UCHAR Ssid[32]; + u32 SsidLength; + u8 Ssid[32]; } NDIS_802_11_SSID, *PNDIS_802_11_SSID; -typedef enum _NDIS_802_11_NETWORK_TYPE { - Ndis802_11FH, - Ndis802_11DS, - Ndis802_11OFDM5, - Ndis802_11OFDM24, - Ndis802_11NetworkTypeMax /* not a real type, defined as an upper bound */ -} NDIS_802_11_NETWORK_TYPE, *PNDIS_802_11_NETWORK_TYPE; - -typedef struct _NDIS_802_11_CONFIGURATION_FH { - ULONG Length; /* Length of structure */ - ULONG HopPattern; /* As defined by 802.11, MSB set */ - ULONG HopSet; /* to one if non-802.11 */ - ULONG DwellTime; /* units are Kusec */ -} NDIS_802_11_CONFIGURATION_FH, *PNDIS_802_11_CONFIGURATION_FH; - - /* FW will only save the channel number in DSConfig. ODI Handler will convert the channel number to freq. number. */ typedef struct _NDIS_802_11_CONFIGURATION { - ULONG Length; /* Length of structure */ - ULONG BeaconPeriod; /* units are Kusec */ - ULONG ATIMWindow; /* units are Kusec */ - ULONG DSConfig; /* channel number */ - NDIS_802_11_CONFIGURATION_FH FHConfig; + u32 Length; /* Length of structure */ + u32 BeaconPeriod; /* units are Kusec */ + u32 ATIMWindow; /* units are Kusec */ + u32 DSConfig; /* channel number */ } NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION; - - typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE { Ndis802_11IBSS, Ndis802_11Infrastructure, @@ -328,62 +141,18 @@ typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE { Ndis802_11APMode } NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE; - - - - typedef struct _NDIS_802_11_FIXED_IEs { - UCHAR Timestamp[8]; - USHORT BeaconInterval; - USHORT Capabilities; + u8 Timestamp[8]; + u16 BeaconInterval; + u16 Capabilities; } NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs; - - typedef struct _NDIS_802_11_VARIABLE_IEs { - UCHAR ElementID; - UCHAR Length; - UCHAR data[1]; + u8 ElementID; + u8 Length; + u8 data[1]; } NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs; - - -/* - - - -Length is the 4 bytes multiples of the sume of - sizeof (NDIS_802_11_MAC_ADDRESS) + 2 + sizeof (NDIS_802_11_SSID) + sizeof (ULONG) -+ sizeof (NDIS_802_11_RSSI) + sizeof (NDIS_802_11_NETWORK_TYPE) + sizeof (NDIS_802_11_CONFIGURATION) -+ sizeof (NDIS_802_11_RATES_EX) + IELength - -Except the IELength, all other fields are fixed length. Therefore, we can define a marco to present the -partial sum. - -*/ -#if 0 -typedef struct _NDIS_WLAN_BSSID_EX { - ULONG Length; - NDIS_802_11_MAC_ADDRESS MacAddress; - UCHAR Reserved[2];/* [0]: IS beacon frame, [1]:optimum_antenna=>For antenna diversity; */ - NDIS_802_11_SSID Ssid; - ULONG Privacy; - NDIS_802_11_RSSI Rssi; - NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; - NDIS_802_11_CONFIGURATION Configuration; - NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode; - NDIS_802_11_RATES_EX SupportedRates; - ULONG IELength; - UCHAR IEs[MAX_IE_SZ]; /* (timestamp, beacon interval, and capability information) */ -} NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX; - - -typedef struct _NDIS_802_11_BSSID_LIST_EX { - ULONG NumberOfItems; - NDIS_WLAN_BSSID_EX Bssid[1]; -} NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX; -#endif - typedef enum _NDIS_802_11_AUTHENTICATION_MODE { Ndis802_11AuthModeOpen, Ndis802_11AuthModeShared, @@ -411,109 +180,15 @@ typedef enum _NDIS_802_11_WEP_STATUS { NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS; -#define NDIS_802_11_AI_REQFI_CAPABILITIES 1 -#define NDIS_802_11_AI_REQFI_LISTENINTERVAL 2 -#define NDIS_802_11_AI_REQFI_CURRENTAPADDRESS 4 - -#define NDIS_802_11_AI_RESFI_CAPABILITIES 1 -#define NDIS_802_11_AI_RESFI_STATUSCODE 2 -#define NDIS_802_11_AI_RESFI_ASSOCIATIONID 4 - -typedef struct _NDIS_802_11_AI_REQFI { - USHORT Capabilities; - USHORT ListenInterval; - NDIS_802_11_MAC_ADDRESS CurrentAPAddress; -} NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI; - -typedef struct _NDIS_802_11_AI_RESFI { - USHORT Capabilities; - USHORT StatusCode; - USHORT AssociationId; -} NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI; - -typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION { - ULONG Length; - USHORT AvailableRequestFixedIEs; - NDIS_802_11_AI_REQFI RequestFixedIEs; - ULONG RequestIELength; - ULONG OffsetRequestIEs; - USHORT AvailableResponseFixedIEs; - NDIS_802_11_AI_RESFI ResponseFixedIEs; - ULONG ResponseIELength; - ULONG OffsetResponseIEs; -} NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION; - -typedef enum _NDIS_802_11_RELOAD_DEFAULTS { - Ndis802_11ReloadWEPKeys -} NDIS_802_11_RELOAD_DEFAULTS, *PNDIS_802_11_RELOAD_DEFAULTS; - - -/* Key mapping keys require a BSSID */ -typedef struct _NDIS_802_11_KEY { - ULONG Length; /* Length of this structure */ - ULONG KeyIndex; - ULONG KeyLength; /* length of key in bytes */ - NDIS_802_11_MAC_ADDRESS BSSID; - NDIS_802_11_KEY_RSC KeyRSC; - UCHAR KeyMaterial[32]; /* variable length depending on above field */ -} NDIS_802_11_KEY, *PNDIS_802_11_KEY; - -typedef struct _NDIS_802_11_REMOVE_KEY { - ULONG Length; /* Length of this structure */ - ULONG KeyIndex; - NDIS_802_11_MAC_ADDRESS BSSID; -} NDIS_802_11_REMOVE_KEY, *PNDIS_802_11_REMOVE_KEY; - typedef struct _NDIS_802_11_WEP { - ULONG Length; /* Length of this structure */ - ULONG KeyIndex; /* 0 is the per-client key, 1-N are the global keys */ - ULONG KeyLength; /* length of key in bytes */ - UCHAR KeyMaterial[16];/* variable length depending on above field */ + u32 Length; /* Length of this structure */ + u32 KeyIndex; /* 0 is the per-client key, 1-N are the global keys */ + u32 KeyLength; /* length of key in bytes */ + u8 KeyMaterial[16];/* variable length depending on above field */ } NDIS_802_11_WEP, *PNDIS_802_11_WEP; -typedef struct _NDIS_802_11_AUTHENTICATION_REQUEST { - ULONG Length; /* Length of structure */ - NDIS_802_11_MAC_ADDRESS Bssid; - ULONG Flags; -} NDIS_802_11_AUTHENTICATION_REQUEST, *PNDIS_802_11_AUTHENTICATION_REQUEST; - -typedef enum _NDIS_802_11_STATUS_TYPE { - Ndis802_11StatusType_Authentication, - Ndis802_11StatusType_MediaStreamMode, - Ndis802_11StatusType_PMKID_CandidateList, - Ndis802_11StatusTypeMax /* not a real type, defined as an upper bound */ -} NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE; - -typedef struct _NDIS_802_11_STATUS_INDICATION { - NDIS_802_11_STATUS_TYPE StatusType; -} NDIS_802_11_STATUS_INDICATION, *PNDIS_802_11_STATUS_INDICATION; - -/* mask for authentication/integrity fields */ -#define NDIS_802_11_AUTH_REQUEST_AUTH_FIELDS 0x0f -#define NDIS_802_11_AUTH_REQUEST_REAUTH 0x01 -#define NDIS_802_11_AUTH_REQUEST_KEYUPDATE 0x02 -#define NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR 0x06 -#define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR 0x0E - -/* MIC check time, 60 seconds. */ -#define MIC_CHECK_TIME 60000000 - -typedef struct _NDIS_802_11_AUTHENTICATION_EVENT { - NDIS_802_11_STATUS_INDICATION Status; - NDIS_802_11_AUTHENTICATION_REQUEST Request[1]; -} NDIS_802_11_AUTHENTICATION_EVENT, *PNDIS_802_11_AUTHENTICATION_EVENT; - -typedef struct _NDIS_802_11_TEST { - ULONG Length; - ULONG Type; - union { - NDIS_802_11_AUTHENTICATION_EVENT AuthenticationEvent; - NDIS_802_11_RSSI RssiTrigger; - } tt; -} NDIS_802_11_TEST, *PNDIS_802_11_TEST; - - #endif /* PLATFORM_FREEBSD */ + #ifndef Ndis802_11APMode #define Ndis802_11APMode (Ndis802_11InfrastructureMax+1) #endif @@ -553,33 +228,22 @@ enum bss_type { /* temporally add #pragma pack for structure alignment issue of * WLAN_BSSID_EX and get_WLAN_BSSID_EX_sz() */ -#ifdef PLATFORM_WINDOWS -#pragma pack(push) -#pragma pack(1) -#endif typedef struct _WLAN_BSSID_EX { - ULONG Length; + u32 Length; NDIS_802_11_MAC_ADDRESS MacAddress; - UCHAR Reserved[2];/* [0]: IS beacon frame , bss_type*/ + u8 Reserved[2];/* [0]: IS beacon frame , bss_type*/ NDIS_802_11_SSID Ssid; NDIS_802_11_SSID mesh_id; - ULONG Privacy; + u32 Privacy; NDIS_802_11_RSSI Rssi;/* (in dBM,raw data ,get from PHY) */ - NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; NDIS_802_11_CONFIGURATION Configuration; NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode; NDIS_802_11_RATES_EX SupportedRates; WLAN_PHY_INFO PhyInfo; - ULONG IELength; - UCHAR IEs[MAX_IE_SZ]; /* (timestamp, beacon interval, and capability information) */ + u32 IELength; + u8 IEs[MAX_IE_SZ]; /* (timestamp, beacon interval, and capability information) */ } -#ifndef PLATFORM_WINDOWS -__attribute__((packed)) -#endif -WLAN_BSSID_EX, *PWLAN_BSSID_EX; -#ifdef PLATFORM_WINDOWS -#pragma pack(pop) -#endif +__attribute__((packed)) WLAN_BSSID_EX, *PWLAN_BSSID_EX; #define BSS_EX_IES(bss_ex) ((bss_ex)->IEs) #define BSS_EX_IES_LEN(bss_ex) ((bss_ex)->IELength) @@ -589,28 +253,7 @@ WLAN_BSSID_EX, *PWLAN_BSSID_EX; __inline static uint get_WLAN_BSSID_EX_sz(WLAN_BSSID_EX *bss) { -#if 0 - uint t_len; - - t_len = sizeof(ULONG) - + sizeof(NDIS_802_11_MAC_ADDRESS) - + 2 - + sizeof(NDIS_802_11_SSID) - + sizeof(ULONG) - + sizeof(NDIS_802_11_RSSI) - + sizeof(NDIS_802_11_NETWORK_TYPE) - + sizeof(NDIS_802_11_CONFIGURATION) - + sizeof(NDIS_802_11_NETWORK_INFRASTRUCTURE) - + sizeof(NDIS_802_11_RATES_EX) - /* all new member add here */ - + sizeof(WLAN_PHY_INFO) - /* all new member add here */ - + sizeof(ULONG) - + bss->IELength; - return t_len; -#else return sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + bss->IELength; -#endif } struct wlan_network { @@ -618,14 +261,16 @@ struct wlan_network { int network_type; /* refer to ieee80211.h for WIRELESS_11A/B/G */ int fixed; /* set to fixed when not to be removed as site-surveying */ systime last_scanned; /* timestamp for the network */ +#ifdef CONFIG_RTW_MESH +#if CONFIG_RTW_MESH_ACNODE_PREVENT + systime acnode_stime; + systime acnode_notify_etime; +#endif +#endif int aid; /* will only be valid when a BSS is joinned. */ int join_res; WLAN_BSSID_EX network; /* must be the last item */ WLAN_BCN_INFO BcnInfo; -#ifdef PLATFORM_WINDOWS - unsigned char iebuf[MAX_IE_SZ]; -#endif - }; enum VRTL_CARRIER_SENSE { @@ -641,8 +286,6 @@ enum VCS_TYPE { }; - - #define PWR_CAM 0 #define PWR_MINPS 1 #define PWR_MAXPS 2 @@ -662,38 +305,4 @@ enum UAPSD_MAX_SP { #define NUM_PRE_AUTH_KEY 16 #define NUM_PMKID_CACHE NUM_PRE_AUTH_KEY -/* -* WPA2 -*/ - -#ifndef PLATFORM_OS_CE -typedef struct _PMKID_CANDIDATE { - NDIS_802_11_MAC_ADDRESS BSSID; - ULONG Flags; -} PMKID_CANDIDATE, *PPMKID_CANDIDATE; - -typedef struct _NDIS_802_11_PMKID_CANDIDATE_LIST { - ULONG Version; /* Version of the structure */ - ULONG NumCandidates; /* No. of pmkid candidates */ - PMKID_CANDIDATE CandidateList[1]; -} NDIS_802_11_PMKID_CANDIDATE_LIST, *PNDIS_802_11_PMKID_CANDIDATE_LIST; - - -typedef struct _NDIS_802_11_AUTHENTICATION_ENCRYPTION { - NDIS_802_11_AUTHENTICATION_MODE AuthModeSupported; - NDIS_802_11_ENCRYPTION_STATUS EncryptStatusSupported; - -} NDIS_802_11_AUTHENTICATION_ENCRYPTION, *PNDIS_802_11_AUTHENTICATION_ENCRYPTION; - -typedef struct _NDIS_802_11_CAPABILITY { - ULONG Length; - ULONG Version; - ULONG NoOfPMKIDs; - ULONG NoOfAuthEncryptPairsSupported; - NDIS_802_11_AUTHENTICATION_ENCRYPTION AuthenticationEncryptionSupported[1]; - -} NDIS_802_11_CAPABILITY, *PNDIS_802_11_CAPABILITY; -#endif - - #endif /* #ifndef WLAN_BSSDEF_H_ */ diff --git a/include/xmit_osdep.h b/include/xmit_osdep.h index 70070a8..e6f6f28 100644 --- a/include/xmit_osdep.h +++ b/include/xmit_osdep.h @@ -44,9 +44,9 @@ struct pkt_file { #define ETH_ALEN 6 extern NDIS_STATUS rtw_xmit_entry( - IN _nic_hdl cnxt, - IN NDIS_PACKET *pkt, - IN UINT flags + _nic_hdl cnxt, + NDIS_PACKET *pkt, + u32 flags ); #endif /* PLATFORM_WINDOWS */ diff --git a/os_dep/linux/ioctl_cfg80211.c b/os_dep/linux/ioctl_cfg80211.c index 50ffdf9..721723e 100644 --- a/os_dep/linux/ioctl_cfg80211.c +++ b/os_dep/linux/ioctl_cfg80211.c @@ -74,10 +74,12 @@ #endif /* CONFIG_WAPI_SUPPORT */ +#if (LINUX_VERSION_CODE <= KERNEL_VERSION(4, 11, 12)) #ifdef CONFIG_RTW_80211R #define WLAN_AKM_SUITE_FT_8021X 0x000FAC03 #define WLAN_AKM_SUITE_FT_PSK 0x000FAC04 #endif +#endif /* * In the current design of Wi-Fi driver, it will return success to the system (e.g. supplicant) @@ -195,7 +197,138 @@ static struct ieee80211_channel rtw_5ghz_a_channels[MAX_CHANNEL_NUM_5G] = { CHAN5G(165, 0), CHAN5G(169, 0), CHAN5G(173, 0), CHAN5G(177, 0), }; -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) +static u8 rtw_chbw_to_cfg80211_chan_def(struct wiphy *wiphy, struct cfg80211_chan_def *chdef, u8 ch, u8 bw, u8 offset, u8 ht) +{ + int freq, cfreq; + struct ieee80211_channel *chan; + u8 ret = _FAIL; + + freq = rtw_ch2freq(ch); + if (!freq) + goto exit; + + cfreq = rtw_get_center_ch(ch, bw, offset); + if (!cfreq) + goto exit; + cfreq = rtw_ch2freq(cfreq); + if (!cfreq) + goto exit; + + chan = ieee80211_get_channel(wiphy, freq); + if (!chan) + goto exit; + + if (bw == CHANNEL_WIDTH_20) + chdef->width = ht ? NL80211_CHAN_WIDTH_20 : NL80211_CHAN_WIDTH_20_NOHT; + else if (bw == CHANNEL_WIDTH_40) + chdef->width = NL80211_CHAN_WIDTH_40; + else if (bw == CHANNEL_WIDTH_80) + chdef->width = NL80211_CHAN_WIDTH_80; + else if (bw == CHANNEL_WIDTH_160) + chdef->width = NL80211_CHAN_WIDTH_160; + else { + rtw_warn_on(1); + goto exit; + } + + chdef->chan = chan; + chdef->center_freq1 = cfreq; + chdef->center_freq2 = 0; + + ret = _SUCCESS; + +exit: + return ret; +} + +#ifdef CONFIG_RTW_MESH +static const char *nl80211_chan_width_str(enum nl80211_chan_width cwidth) +{ + switch (cwidth) { + case NL80211_CHAN_WIDTH_20_NOHT: + return "20_NOHT"; + case NL80211_CHAN_WIDTH_20: + return "20"; + case NL80211_CHAN_WIDTH_40: + return "40"; + case NL80211_CHAN_WIDTH_80: + return "80"; + case NL80211_CHAN_WIDTH_80P80: + return "80+80"; + case NL80211_CHAN_WIDTH_160: + return "160"; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) + case NL80211_CHAN_WIDTH_5: + return "5"; + case NL80211_CHAN_WIDTH_10: + return "10"; +#endif + default: + return "INVALID"; + }; +} + +static void rtw_get_chbw_from_cfg80211_chan_def(struct cfg80211_chan_def *chdef, u8 *ht, u8 *ch, u8 *bw, u8 *offset) +{ + int pri_freq; + struct ieee80211_channel *chan = chdef->chan; + + pri_freq = rtw_ch2freq(chan->hw_value); + if (!pri_freq) { + RTW_INFO("invalid channel:%d\n", chan->hw_value); + rtw_warn_on(1); + *ch = 0; + return; + } + + switch (chdef->width) { + case NL80211_CHAN_WIDTH_20_NOHT: + *ht = 0; + *bw = CHANNEL_WIDTH_20; + *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + *ch = chan->hw_value; + break; + case NL80211_CHAN_WIDTH_20: + *ht = 1; + *bw = CHANNEL_WIDTH_20; + *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + *ch = chan->hw_value; + break; + case NL80211_CHAN_WIDTH_40: + *ht = 1; + *bw = CHANNEL_WIDTH_40; + *offset = pri_freq > chdef->center_freq1 ? HAL_PRIME_CHNL_OFFSET_UPPER : HAL_PRIME_CHNL_OFFSET_LOWER; + if (rtw_get_offset_by_chbw(chan->hw_value, *bw, offset)) + *ch = chan->hw_value; + break; + case NL80211_CHAN_WIDTH_80: + *ht = 1; + *bw = CHANNEL_WIDTH_80; + if (rtw_get_offset_by_chbw(chan->hw_value, *bw, offset)) + *ch = chan->hw_value; + break; + case NL80211_CHAN_WIDTH_160: + *ht = 1; + *bw = CHANNEL_WIDTH_160; + if (rtw_get_offset_by_chbw(chan->hw_value, *bw, offset)) + *ch = chan->hw_value; + break; + case NL80211_CHAN_WIDTH_80P80: + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) + case NL80211_CHAN_WIDTH_5: + case NL80211_CHAN_WIDTH_10: + #endif + default: + *ht = 0; + *bw = CHANNEL_WIDTH_20; + *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + RTW_INFO("unsupported cwidth:%s\n", nl80211_chan_width_str(chdef->width)); + rtw_warn_on(1); + }; +} +#endif /* CONFIG_RTW_MESH */ +#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) static const char *nl80211_channel_type_str(enum nl80211_channel_type ctype) { switch (ctype) { @@ -273,138 +406,24 @@ static void rtw_get_chbw_from_nl80211_channel_type(struct ieee80211_channel *cha } #endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) */ -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -static const char *nl80211_chan_width_str(enum nl80211_chan_width cwidth) -{ - switch (cwidth) { - case NL80211_CHAN_WIDTH_20_NOHT: - return "20_NOHT"; - case NL80211_CHAN_WIDTH_20: - return "20"; - case NL80211_CHAN_WIDTH_40: - return "40"; - case NL80211_CHAN_WIDTH_80: - return "80"; - case NL80211_CHAN_WIDTH_80P80: - return "80+80"; - case NL80211_CHAN_WIDTH_160: - return "160"; -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) - case NL80211_CHAN_WIDTH_5: - return "5"; - case NL80211_CHAN_WIDTH_10: - return "10"; -#endif - default: - return "INVALID"; - }; -} - -static u8 rtw_chbw_to_cfg80211_chan_def(struct wiphy *wiphy, struct cfg80211_chan_def *chdef, u8 ch, u8 bw, u8 offset, u8 ht) -{ - int freq, cfreq; - struct ieee80211_channel *chan; - u8 ret = _FAIL; - - freq = rtw_ch2freq(ch); - if (!freq) - goto exit; - - cfreq = rtw_get_center_ch(ch, bw, offset); - if (!cfreq) - goto exit; - cfreq = rtw_ch2freq(cfreq); - if (!cfreq) - goto exit; - - chan = ieee80211_get_channel(wiphy, freq); - if (!chan) - goto exit; - - if (bw == CHANNEL_WIDTH_20) - chdef->width = ht ? NL80211_CHAN_WIDTH_20 : NL80211_CHAN_WIDTH_20_NOHT; - else if (bw == CHANNEL_WIDTH_40) - chdef->width = NL80211_CHAN_WIDTH_40; - else if (bw == CHANNEL_WIDTH_80) - chdef->width = NL80211_CHAN_WIDTH_80; - else if (bw == CHANNEL_WIDTH_160) - chdef->width = NL80211_CHAN_WIDTH_160; - else { - rtw_warn_on(1); - goto exit; - } - - chdef->chan = chan; - chdef->center_freq1 = cfreq; - chdef->center_freq2 = 0; - - ret = _SUCCESS; - -exit: - return ret; -} - -static void rtw_get_chbw_from_cfg80211_chan_def(struct cfg80211_chan_def *chdef, u8 *ht, u8 *ch, u8 *bw, u8 *offset) -{ - int pri_freq; - struct ieee80211_channel *chan = chdef->chan; - - pri_freq = rtw_ch2freq(chan->hw_value); - if (!pri_freq) { - RTW_INFO("invalid channel:%d\n", chan->hw_value); - rtw_warn_on(1); - *ch = 0; - return; - } - - switch (chdef->width) { - case NL80211_CHAN_WIDTH_20_NOHT: - *ht = 0; - *bw = CHANNEL_WIDTH_20; - *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; - *ch = chan->hw_value; - break; - case NL80211_CHAN_WIDTH_20: - *ht = 1; - *bw = CHANNEL_WIDTH_20; - *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; - *ch = chan->hw_value; - break; - case NL80211_CHAN_WIDTH_40: - *ht = 1; - *bw = CHANNEL_WIDTH_40; - *offset = pri_freq > chdef->center_freq1 ? HAL_PRIME_CHNL_OFFSET_UPPER : HAL_PRIME_CHNL_OFFSET_LOWER; - if (rtw_get_offset_by_chbw(chan->hw_value, *bw, offset)) - *ch = chan->hw_value; - break; - case NL80211_CHAN_WIDTH_80: - *ht = 1; - *bw = CHANNEL_WIDTH_80; - if (rtw_get_offset_by_chbw(chan->hw_value, *bw, offset)) - *ch = chan->hw_value; - break; - case NL80211_CHAN_WIDTH_160: - *ht = 1; - *bw = CHANNEL_WIDTH_160; - if (rtw_get_offset_by_chbw(chan->hw_value, *bw, offset)) - *ch = chan->hw_value; - break; - case NL80211_CHAN_WIDTH_80P80: - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) - case NL80211_CHAN_WIDTH_5: - case NL80211_CHAN_WIDTH_10: - #endif - default: - *ht = 0; - *bw = CHANNEL_WIDTH_20; - *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; - RTW_INFO("unsupported cwidth:%s\n", nl80211_chan_width_str(chdef->width)); - rtw_warn_on(1); - }; -} -#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) */ - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) +bool rtw_cfg80211_allow_ch_switch_notify(_adapter *adapter) +{ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)) + if ((!MLME_IS_AP(adapter)) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0)) + && (!MLME_IS_ADHOC(adapter)) + && (!MLME_IS_ADHOC_MASTER(adapter)) + && (!MLME_IS_MESH(adapter)) +#elif defined(CONFIG_RTW_MESH) + && (!MLME_IS_MESH(adapter)) +#endif + ) + return 0; +#endif + return 1; +} + u8 rtw_cfg80211_ch_switch_notify(_adapter *adapter, u8 ch, u8 bw, u8 offset, u8 ht) { struct wiphy *wiphy = adapter_to_wiphy(adapter); @@ -413,6 +432,9 @@ u8 rtw_cfg80211_ch_switch_notify(_adapter *adapter, u8 ch, u8 bw, u8 offset, u8 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) struct cfg80211_chan_def chdef; + if (!rtw_cfg80211_allow_ch_switch_notify(adapter)) + goto exit; + ret = rtw_chbw_to_cfg80211_chan_def(wiphy, &chdef, ch, bw, offset, ht); if (ret != _SUCCESS) goto exit; @@ -423,6 +445,9 @@ u8 rtw_cfg80211_ch_switch_notify(_adapter *adapter, u8 ch, u8 bw, u8 offset, u8 int freq = rtw_ch2freq(ch); enum nl80211_channel_type ctype; + if (!rtw_cfg80211_allow_ch_switch_notify(adapter)) + goto exit; + if (!freq) { ret = _FAIL; goto exit; @@ -535,6 +560,7 @@ static const struct ieee80211_txrx_stypes [NL80211_IFTYPE_STATION] = { .tx = 0xffff, .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | + BIT(IEEE80211_STYPE_AUTH >> 4) | BIT(IEEE80211_STYPE_PROBE_REQ >> 4) }, [NL80211_IFTYPE_AP] = { @@ -686,13 +712,11 @@ static int rtw_cfg80211_sync_iftype(_adapter *adapter) static u64 rtw_get_systime_us(void) { -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)) - struct timespec ts; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0)) - getboottime(&ts); -#else + return ktime_to_us(ktime_get_boottime()); +#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)) + struct timespec ts; get_monotonic_boottime(&ts); -#endif return ((u64)ts.tv_sec * 1000000) + ts.tv_nsec / 1000; #else struct timeval tv; @@ -704,7 +728,6 @@ static u64 rtw_get_systime_us(void) /* Try to remove non target BSS's SR to reduce PBC overlap rate */ static int rtw_cfg80211_clear_wps_sr_of_non_target_bss(_adapter *padapter, struct wlan_network *pnetwork, struct cfg80211_ssid *req_ssid) { - struct rtw_wdev_priv *wdev_data = adapter_wdev_data(padapter); int ret = 0; u8 *psr = NULL, sr = 0; NDIS_802_11_SSID *pssid = &pnetwork->network.Ssid; @@ -761,7 +784,7 @@ struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_net pbuf = rtw_zmalloc(buf_size); if (pbuf == NULL) { - RTW_INFO("%s pbuf allocate failed !!\n", __func__); + RTW_INFO("%s pbuf allocate failed !!\n", __FUNCTION__); return bss; } @@ -769,7 +792,7 @@ struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_net bssinf_len = pnetwork->network.IELength + sizeof(struct rtw_ieee80211_hdr_3addr); if (bssinf_len > buf_size) { - RTW_INFO("%s IE Length too long > %zu byte\n", __func__, buf_size); + RTW_INFO("%s IE Length too long > %zu byte\n", __FUNCTION__, buf_size); goto exit; } @@ -779,7 +802,7 @@ struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_net if (rtw_get_wapi_ie(pnetwork->network.IEs, pnetwork->network.IELength, NULL, &wapi_len) > 0) { if (wapi_len > 0) { - RTW_INFO("%s, no support wapi!\n", __func__); + RTW_INFO("%s, no support wapi!\n", __FUNCTION__); goto exit; } } @@ -945,7 +968,6 @@ void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter) struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *cur_network = &(pmlmepriv->cur_network); struct wireless_dev *pwdev = padapter->rtw_wdev; - struct cfg80211_bss *bss = NULL; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) struct wiphy *wiphy = pwdev->wiphy; int freq = 2412; @@ -954,13 +976,6 @@ void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter) RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) - freq = rtw_ch2freq(cur_network->network.Configuration.DSConfig); - - if (0) - RTW_INFO("chan: %d, freq: %d\n", cur_network->network.Configuration.DSConfig, freq); -#endif - if (pwdev->iftype != NL80211_IFTYPE_ADHOC) return; @@ -981,10 +996,8 @@ void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter) return ; } } else { - if (scanned == NULL) { + if (scanned == NULL) rtw_warn_on(1); - return; - } if (_rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE && _rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE @@ -1005,6 +1018,9 @@ void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter) } /* notify cfg80211 that device joined an IBSS */ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) + freq = rtw_ch2freq(cur_network->network.Configuration.DSConfig); + if (1) + RTW_INFO("chan: %d, freq: %d\n", cur_network->network.Configuration.DSConfig, freq); notify_channel = ieee80211_get_channel(wiphy, freq); cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, notify_channel, GFP_ATOMIC); #else @@ -1022,8 +1038,6 @@ void rtw_cfg80211_indicate_connect(_adapter *padapter) #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); #endif - struct cfg80211_bss *bss = NULL; - #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) struct cfg80211_roam_info roam_info ={}; #endif @@ -1092,9 +1106,6 @@ check_bss: struct ieee80211_channel *notify_channel; u32 freq; u16 channel = cur_network->network.Configuration.DSConfig; -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0)) - struct cfg80211_roam_info roam_info; -#endif freq = rtw_ch2freq(channel); notify_channel = ieee80211_get_channel(wiphy, freq); @@ -1151,7 +1162,6 @@ check_bss: void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally_generated) { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wireless_dev *pwdev = padapter->rtw_wdev; struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); _irqL irqL; @@ -1230,14 +1240,14 @@ void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_param *param) { int ret = 0; - u32 wep_key_idx, wep_key_len, wep_total_len; + u32 wep_key_idx, wep_key_len; struct sta_info *psta = NULL, *pbcmc_sta = NULL; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &(padapter->securitypriv); struct sta_priv *pstapriv = &padapter->stapriv; - RTW_INFO("%s\n", __func__); + RTW_INFO("%s\n", __FUNCTION__); param->u.crypt.err = 0; param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; @@ -1245,7 +1255,7 @@ static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_pa if (is_broadcast_mac_addr(param->sta_addr)) { if (param->u.crypt.idx >= WEP_KEYS #ifdef CONFIG_IEEE80211W - || param->u.crypt.idx > BIP_MAX_KEYID + && param->u.crypt.idx > BIP_MAX_KEYID #endif ) { ret = -EINVAL; @@ -1419,9 +1429,16 @@ static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_pa psta->dot11txpn.val = RTW_GET_LE64(param->u.crypt.seq); psta->dot11rxpn.val = RTW_GET_LE64(param->u.crypt.seq); psta->ieee8021x_blocked = _FALSE; - psta->bpairwise_key_installed = _TRUE; - rtw_ap_set_pairwise_key(padapter, psta); + if (psta->dot118021XPrivacy != _NO_PRIVACY_) { + psta->bpairwise_key_installed = _TRUE; + + /* WPA2 key-handshake has completed */ + if (psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) + psta->state &= (~WIFI_UNDER_KEY_HANDSHAKE); + } + + rtw_ap_set_pairwise_key(padapter, psta); } else { /* peer's group key, RX only */ #ifdef CONFIG_RTW_MESH @@ -1476,7 +1493,7 @@ exit: static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param *param) { int ret = 0; - u32 wep_key_idx, wep_key_len, wep_total_len; + u32 wep_key_idx, wep_key_len; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; @@ -1492,7 +1509,7 @@ static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param if (is_broadcast_mac_addr(param->sta_addr)) { if (param->u.crypt.idx >= WEP_KEYS #ifdef CONFIG_IEEE80211W - || param->u.crypt.idx > BIP_MAX_KEYID + && param->u.crypt.idx > BIP_MAX_KEYID #endif ) { ret = -EINVAL; @@ -1596,8 +1613,8 @@ static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); padapter->securitypriv.binstallGrpkey = _TRUE; - if (param->u.crypt.idx < 4) - _rtw_memcpy(padapter->securitypriv.iv_seq[param->u.crypt.idx], param->u.crypt.seq, 8); + if (param->u.crypt.idx < 4) + _rtw_memcpy(padapter->securitypriv.iv_seq[param->u.crypt.idx], param->u.crypt.seq, 8); padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; rtw_set_key(padapter, &padapter->securitypriv, param->u.crypt.idx, 1, _TRUE); @@ -1621,6 +1638,9 @@ static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param } #endif /* CONFIG_P2P */ + /* WPA/WPA2 key-handshake has completed */ + clr_fwstate(pmlmepriv, WIFI_UNDER_KEY_HANDSHAKE); + } } @@ -1842,7 +1862,7 @@ static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) || (MLME_IS_STA(adapter) && !pairwise) #endif - ) { + ) { /* WEP key, TX GTK/IGTK, RX GTK/IGTK(for STA mode) */ if (is_wep_enc(sec->dot118021XGrpPrivacy)) { if (keyid >= WEP_KEYS) @@ -1931,7 +1951,7 @@ static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev } ret = 0; - + exit: RTW_INFO(FUNC_NDEV_FMT GET_KEY_PARAM_FMT_S @@ -2205,16 +2225,16 @@ static int cfg80211_rtw_get_station(struct wiphy *wiphy, psta = rtw_get_stainfo(pstapriv, mac); #ifdef CONFIG_RTW_MESH if (MLME_IS_MESH(padapter)) { - if (!psta) - plink = rtw_mesh_plink_get(padapter, mac); - else + if (psta) plink = psta->plink; + if (!plink) + plink = rtw_mesh_plink_get(padapter, mac); } #endif /* CONFIG_RTW_MESH */ - if (!psta + if ((!MLME_IS_MESH(padapter) && !psta) #ifdef CONFIG_RTW_MESH - && !plink + || (MLME_IS_MESH(padapter) && !plink) #endif ) { RTW_INFO(FUNC_NDEV_FMT" no sta info for mac="MAC_FMT"\n" @@ -2307,6 +2327,9 @@ static int cfg80211_rtw_change_iface(struct wiphy *wiphy, #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); u8 is_p2p = _FALSE; +#endif +#ifdef CONFIG_MONITOR_MODE_XMIT + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); #endif int ret = 0; u8 change = _FALSE; @@ -2438,7 +2461,10 @@ static int cfg80211_rtw_change_iface(struct wiphy *wiphy, } rtw_setopmode_cmd(padapter, networkType, RTW_CMDF_WAIT_ACK); - +#ifdef CONFIG_MONITOR_MODE_XMIT + if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) == _TRUE) + rtw_indicate_connect(padapter); +#endif exit: RTW_INFO(FUNC_NDEV_FMT" ret:%d\n", FUNC_NDEV_ARG(ndev), ret); @@ -2460,7 +2486,7 @@ void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted) _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); if (pwdev_priv->scan_request != NULL) { #ifdef CONFIG_DEBUG_CFG80211 - RTW_INFO("%s with scan req\n", __func__); + RTW_INFO("%s with scan req\n", __FUNCTION__); #endif /* avoid WARN_ON(request != wiphy_to_dev(request->wiphy)->scan_req); */ @@ -2476,7 +2502,7 @@ void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted) pwdev_priv->scan_request = NULL; } else { #ifdef CONFIG_DEBUG_CFG80211 - RTW_INFO("%s without scan req\n", __func__); + RTW_INFO("%s without scan req\n", __FUNCTION__); #endif } _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); @@ -2564,17 +2590,17 @@ exit: static void _rtw_cfg80211_surveydone_event_callback(_adapter *padapter, struct cfg80211_scan_request *scan_req) { + struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); + RT_CHANNEL_INFO *chset = rfctl->channel_set; _irqL irqL; _list *plist, *phead; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; - u32 cnt = 0; - u32 wait_for_surveydone; - sint wait_status; struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); struct cfg80211_ssid target_ssid; u8 target_wps_scan = 0; + u8 ch; #ifdef CONFIG_DEBUG_CFG80211 RTW_INFO("%s\n", __func__); @@ -2599,11 +2625,15 @@ static void _rtw_cfg80211_surveydone_event_callback(_adapter *padapter, struct c break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); + ch = pnetwork->network.Configuration.DSConfig; /* report network only if the current channel set contains the channel to which this network belongs */ - if (rtw_chset_search_ch(adapter_to_chset(padapter), pnetwork->network.Configuration.DSConfig) >= 0 - && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE + if (rtw_chset_search_ch(chset, ch) >= 0 + && rtw_mlme_band_check(padapter, ch) == _TRUE && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) + && (!IS_DFS_SLAVE_WITH_RD(rfctl) + || rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl)) + || !rtw_chset_is_ch_non_ocp(chset, ch)) ) { if (target_wps_scan) rtw_cfg80211_clear_wps_sr_of_non_target_bss(padapter, pnetwork, &target_ssid); @@ -2663,7 +2693,7 @@ static int rtw_cfg80211_set_probe_req_wpsp2pie(_adapter *padapter, char *buf, in pmlmepriv->wps_probe_req_ie = rtw_malloc(wps_ielen); if (pmlmepriv->wps_probe_req_ie == NULL) { - RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __func__, __LINE__); + RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } @@ -2694,7 +2724,7 @@ static int rtw_cfg80211_set_probe_req_wpsp2pie(_adapter *padapter, char *buf, in pmlmepriv->p2p_probe_req_ie = rtw_malloc(p2p_ielen); if (pmlmepriv->p2p_probe_req_ie == NULL) { - RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __func__, __LINE__); + RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } @@ -2804,10 +2834,11 @@ void rtw_cfg80211_indicate_scan_done_for_buddy(_adapter *padapter, bool bscan_ab indicate_buddy_scan = _FALSE; _enter_critical_bh(&wdev_priv->scan_req_lock, &irqL); - if (wdev_priv->scan_request && mlmepriv->scanning_via_buddy_intf == _TRUE) { + if (mlmepriv->scanning_via_buddy_intf == _TRUE) { mlmepriv->scanning_via_buddy_intf = _FALSE; clr_fwstate(mlmepriv, _FW_UNDER_SURVEY); - indicate_buddy_scan = _TRUE; + if (wdev_priv->scan_request) + indicate_buddy_scan = _TRUE; } _exit_critical_bh(&wdev_priv->scan_req_lock, &irqL); @@ -2827,26 +2858,22 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy #endif , struct cfg80211_scan_request *request) { - int i, chan_num = 0; + int i; u8 _status = _FALSE; int ret = 0; struct sitesurvey_parm parm; _irqL irqL; - u8 *wps_ie = NULL; - uint wps_ielen = 0; - u8 *p2p_ie = NULL; - uint p2p_ielen = 0; u8 survey_times = 3; u8 survey_times_for_one_ch = 6; struct cfg80211_ssid *ssids = request->ssids; int social_channel = 0, j = 0; bool need_indicate_scan_done = _FALSE; bool ps_denied = _FALSE; - + u8 ssc_chk; _adapter *padapter; struct wireless_dev *wdev; struct rtw_wdev_priv *pwdev_priv; - struct mlme_priv *pmlmepriv; + struct mlme_priv *pmlmepriv = NULL; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo; #endif /* CONFIG_P2P */ @@ -2882,26 +2909,103 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy RTW_INFO(FUNC_ADPT_FMT"%s\n", FUNC_ADPT_ARG(padapter) , wdev == wiphy_to_pd_wdev(wiphy) ? " PD" : ""); -#ifdef CONFIG_MP_INCLUDED - if (rtw_mp_mode_check(padapter)) { - RTW_INFO("MP mode block Scan request\n"); - ret = -EPERM; - goto exit; - } -#endif +#if 1 + ssc_chk = rtw_sitesurvey_condition_check(padapter, _TRUE); -#ifdef CONFIG_RTW_REPEATER_SON - if (padapter->rtw_rson_scanstage == RSON_SCAN_PROCESS) { - RTW_INFO(FUNC_ADPT_FMT" blocking scan for under rson scanning process\n", FUNC_ADPT_ARG(padapter)); - need_indicate_scan_done = _TRUE; - goto check_need_indicate_scan_done; - } + if (ssc_chk == SS_DENY_MP_MODE) + goto bypass_p2p_chk; +#ifdef DBG_LA_MODE + if (ssc_chk == SS_DENY_LA_MODE) + goto bypass_p2p_chk; #endif +#ifdef CONFIG_P2P + if (pwdinfo->driver_interface == DRIVER_CFG80211) { + if (ssids->ssid != NULL + && _rtw_memcmp(ssids->ssid, "DIRECT-", 7) + && rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL) + ) { + if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); + else { + rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); + #ifdef CONFIG_DEBUG_CFG80211 + RTW_INFO("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); + #endif + } + rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); - if (adapter_wdev_data(padapter)->block_scan == _TRUE) { - RTW_INFO(FUNC_ADPT_FMT" wdev_priv.block_scan is set\n", FUNC_ADPT_ARG(padapter)); - need_indicate_scan_done = _TRUE; - goto check_need_indicate_scan_done; + if (request->n_channels == 3 && + request->channels[0]->hw_value == 1 && + request->channels[1]->hw_value == 6 && + request->channels[2]->hw_value == 11 + ) + social_channel = 1; + } + } +#endif /*CONFIG_P2P*/ + + if (request->ie && request->ie_len > 0) + rtw_cfg80211_set_probe_req_wpsp2pie(padapter, (u8 *)request->ie, request->ie_len); + +bypass_p2p_chk: + + switch (ssc_chk) { + case SS_ALLOW : + break; + + case SS_DENY_MP_MODE: + ret = -EPERM; + goto exit; + #ifdef DBG_LA_MODE + case SS_DENY_LA_MODE: + ret = -EPERM; + goto exit; + #endif + #ifdef CONFIG_RTW_REPEATER_SON + case SS_DENY_RSON_SCANING : + #endif + case SS_DENY_BLOCK_SCAN : + case SS_DENY_SELF_AP_UNDER_WPS : + case SS_DENY_SELF_AP_UNDER_LINKING : + case SS_DENY_SELF_AP_UNDER_SURVEY : + case SS_DENY_SELF_STA_UNDER_SURVEY : + #ifdef CONFIG_CONCURRENT_MODE + case SS_DENY_BUDDY_UNDER_LINK_WPS : + #endif + case SS_DENY_BUSY_TRAFFIC : + need_indicate_scan_done = _TRUE; + goto check_need_indicate_scan_done; + + case SS_DENY_BY_DRV : + #if CONFIG_NOTIFY_SCAN_ABORT_WITH_BUSY + ret = -EBUSY; + goto exit; + #else + need_indicate_scan_done = _TRUE; + goto check_need_indicate_scan_done; + #endif + break; + + case SS_DENY_SELF_STA_UNDER_LINKING : + ret = -EBUSY; + goto check_need_indicate_scan_done; + + #ifdef CONFIG_CONCURRENT_MODE + case SS_DENY_BUDDY_UNDER_SURVEY : + { + bool scan_via_buddy = rtw_cfg80211_scan_via_buddy(padapter, request); + + if (scan_via_buddy == _FALSE) + need_indicate_scan_done = _TRUE; + + goto check_need_indicate_scan_done; + } + #endif + + default : + RTW_ERR("site survey check code (%d) unknown\n", ssc_chk); + need_indicate_scan_done = _TRUE; + goto check_need_indicate_scan_done; } rtw_ps_deny(padapter, PS_DENY_SCAN); @@ -2911,6 +3015,17 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy goto check_need_indicate_scan_done; } +#else + + +#ifdef CONFIG_MP_INCLUDED + if (rtw_mp_mode_check(padapter)) { + RTW_INFO("MP mode block Scan request\n"); + ret = -EPERM; + goto exit; + } +#endif + #ifdef CONFIG_P2P if (pwdinfo->driver_interface == DRIVER_CFG80211) { if (ssids->ssid != NULL @@ -2940,6 +3055,27 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy if (request->ie && request->ie_len > 0) rtw_cfg80211_set_probe_req_wpsp2pie(padapter, (u8 *)request->ie, request->ie_len); +#ifdef CONFIG_RTW_REPEATER_SON + if (padapter->rtw_rson_scanstage == RSON_SCAN_PROCESS) { + RTW_INFO(FUNC_ADPT_FMT" blocking scan for under rson scanning process\n", FUNC_ADPT_ARG(padapter)); + need_indicate_scan_done = _TRUE; + goto check_need_indicate_scan_done; + } +#endif + + if (adapter_wdev_data(padapter)->block_scan == _TRUE) { + RTW_INFO(FUNC_ADPT_FMT" wdev_priv.block_scan is set\n", FUNC_ADPT_ARG(padapter)); + need_indicate_scan_done = _TRUE; + goto check_need_indicate_scan_done; + } + + rtw_ps_deny(padapter, PS_DENY_SCAN); + ps_denied = _TRUE; + if (_FAIL == rtw_pwr_wakeup(padapter)) { + need_indicate_scan_done = _TRUE; + goto check_need_indicate_scan_done; + } + if (rtw_is_scan_deny(padapter)) { RTW_INFO(FUNC_ADPT_FMT ": scan deny\n", FUNC_ADPT_ARG(padapter)); #if CONFIG_NOTIFY_SCAN_ABORT_WITH_BUSY @@ -3000,6 +3136,7 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy need_indicate_scan_done = _TRUE; goto check_need_indicate_scan_done; } +#endif #ifdef CONFIG_P2P if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) { @@ -3072,13 +3209,14 @@ check_need_indicate_scan_done: #endif } -cancel_ps_deny: if (ps_denied == _TRUE) rtw_ps_deny_cancel(padapter, PS_DENY_SCAN); exit: - return ret; + if (pmlmepriv) + pmlmepriv->lastscantime = rtw_get_current_time(); + return ret; } static int cfg80211_rtw_set_wiphy_params(struct wiphy *wiphy, u32 changed) @@ -3150,6 +3288,12 @@ static int rtw_cfg80211_set_auth_type(struct security_priv *psecuritypriv, { RTW_INFO("%s, nl80211_auth_type=%d\n", __func__, sme_auth_type); + psecuritypriv->auth_type = sme_auth_type; + + if (sme_auth_type == NL80211_AUTHTYPE_SAE) { + psecuritypriv->auth_alg = WLAN_AUTH_SAE; + return 0; + } switch (sme_auth_type) { case NL80211_AUTHTYPE_AUTOMATIC: @@ -3287,7 +3431,6 @@ static int rtw_cfg80211_set_key_mgt(struct security_priv *psecuritypriv, u32 key static int rtw_cfg80211_set_wpa_ie(_adapter *padapter, u8 *pie, size_t ielen) { u8 *buf = NULL, *pos = NULL; - u32 left; int group_cipher = 0, pairwise_cipher = 0; u8 mfp_opt = MFP_NO; int ret = 0; @@ -3313,7 +3456,7 @@ static int rtw_cfg80211_set_wpa_ie(_adapter *padapter, u8 *pie, size_t ielen) goto exit; } - _rtw_memcpy(buf, pie, ielen); + _rtw_memcpy(buf, pie , ielen); RTW_INFO("set wpa_ie(length:%zu):\n", ielen); RTW_INFO_DUMP(NULL, buf, ielen); @@ -3490,10 +3633,7 @@ static int cfg80211_rtw_join_ibss(struct wiphy *wiphy, struct net_device *ndev, _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); NDIS_802_11_SSID ndis_ssid; struct security_priv *psecuritypriv = &padapter->securitypriv; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) struct cfg80211_chan_def *pch_def; #endif @@ -3614,24 +3754,85 @@ bool rtw_cfg80211_is_connect_requested(_adapter *adapter) return requested; } +static int _rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev) +{ + _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); + + + /* if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) */ + { + rtw_scan_abort(padapter); + rtw_join_abort_timeout(padapter, 300); + LeaveAllPowerSaveMode(padapter); + rtw_disassoc_cmd(padapter, 500, RTW_CMDF_WAIT_ACK); +#ifdef CONFIG_RTW_REPEATER_SON + rtw_rson_do_disconnect(padapter); +#endif + RTW_INFO("%s...call rtw_indicate_disconnect\n", __func__); + + rtw_free_assoc_resources_cmd(padapter, _TRUE, RTW_CMDF_WAIT_ACK); + + /* indicate locally_generated = 0 when suspend */ + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0)) + rtw_indicate_disconnect(padapter, 0, wiphy->dev.power.is_prepared ? _FALSE : _TRUE); + #else + /* + * for kernel < 4.2, DISCONNECT event is hardcoded with + * NL80211_ATTR_DISCONNECTED_BY_AP=1 in NL80211 layer + * no need to judge if under suspend + */ + rtw_indicate_disconnect(padapter, 0, _TRUE); + #endif + + rtw_pwr_wakeup(padapter); + } + return 0; +} + +#if (KERNEL_VERSION(4, 17, 0) > LINUX_VERSION_CODE) +static bool rtw_check_connect_sae_compat(struct cfg80211_connect_params *sme) +{ + struct rtw_ieee802_11_elems elems; + struct rsne_info info; + u8 AKM_SUITE_SAE[] = { 0x00, 0x0f, 0xac, 8 }; + int i; + + if (sme->auth_type != 1) + return false; + + if (rtw_ieee802_11_parse_elems((u8 *)sme->ie, sme->ie_len, &elems, 0) + == ParseFailed) + return false; + + if (!elems.rsn_ie) + return false; + + if (rtw_rsne_info_parse(elems.rsn_ie - 2, elems.rsn_ie_len + 2, &info) == _FAIL) + return false; + + for (i = 0; i < info.akm_cnt; i++) + if (memcmp(info.akm_list + i * RSN_SELECTOR_LEN, + AKM_SUITE_SAE, RSN_SELECTOR_LEN) == 0) + return true; + + return false; +} +#else +#define rtw_check_connect_sae_compat(sme) false +#endif + static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev, struct cfg80211_connect_params *sme) { int ret = 0; - struct wlan_network *pnetwork = NULL; NDIS_802_11_AUTHENTICATION_MODE authmode; NDIS_802_11_SSID ndis_ssid; - u8 *dst_ssid, *src_ssid; - u8 *dst_bssid, *src_bssid; /* u8 matched_by_bssid=_FALSE; */ /* u8 matched_by_ssid=_FALSE; */ - u8 matched = _FALSE; _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; - _queue *queue = &pmlmepriv->scanned_queue; - struct wireless_dev *pwdev = padapter->rtw_wdev; struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); _irqL irqL; #if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_CONNECT) @@ -3642,17 +3843,23 @@ static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev, RTW_INFO("privacy=%d, key=%p, key_len=%d, key_idx=%d, auth_type=%d\n", sme->privacy, sme->key, sme->key_len, sme->key_idx, sme->auth_type); + if (rtw_check_connect_sae_compat(sme)) { + sme->auth_type = NL80211_AUTHTYPE_SAE; + RTW_INFO("%s set sme->auth_type=%d for SAE compat\n", __FUNCTION__, + NL80211_AUTHTYPE_SAE); + } + if (pwdev_priv->block == _TRUE) { ret = -EBUSY; RTW_INFO("%s wdev_priv.block is set\n", __FUNCTION__); goto exit; } - if (check_fwstate(pmlmepriv, _FW_LINKED | _FW_UNDER_LINKING) == _TRUE) { - ret = -EALREADY; - RTW_INFO("%s skip connect! fw_state=0x%x\n", + if (check_fwstate(pmlmepriv, _FW_LINKED | _FW_UNDER_LINKING) == _TRUE) { + + _rtw_disconnect(wiphy, ndev); + RTW_INFO("%s disconnect before connecting! fw_state=0x%x\n", __FUNCTION__, pmlmepriv->fw_state); - goto exit; } #ifdef CONFIG_PLATFORM_MSTAR_SCAN_BEFORE_CONNECT @@ -3712,6 +3919,8 @@ static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev, psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; /* open system */ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; + psecuritypriv->auth_alg = WLAN_AUTH_OPEN; + psecuritypriv->extauth_status = WLAN_STATUS_UNSPECIFIED_FAILURE; #ifdef CONFIG_WAPI_SUPPORT padapter->wapiInfo.bWapiEnable = false; @@ -3888,30 +4097,7 @@ static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev, /* if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) */ { - rtw_scan_abort(padapter); - rtw_join_abort_timeout(padapter, 300); - LeaveAllPowerSaveMode(padapter); - rtw_disassoc_cmd(padapter, 500, RTW_CMDF_WAIT_ACK); -#ifdef CONFIG_RTW_REPEATER_SON - rtw_rson_do_disconnect(padapter); -#endif - RTW_INFO("%s...call rtw_indicate_disconnect\n", __func__); - - rtw_free_assoc_resources_cmd(padapter, _TRUE); - - /* indicate locally_generated = 0 when suspend */ - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0)) - rtw_indicate_disconnect(padapter, 0, wiphy->dev.power.is_prepared ? _FALSE : _TRUE); - #else - /* - * for kernel < 4.2, DISCONNECT event is hardcoded with - * NL80211_ATTR_DISCONNECTED_BY_AP=1 in NL80211 layer - * no need to judge if under suspend - */ - rtw_indicate_disconnect(padapter, 0, _TRUE); - #endif - - rtw_pwr_wakeup(padapter); + _rtw_disconnect(wiphy, ndev); } #if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_DISCONNECT) @@ -3932,26 +4118,6 @@ static int cfg80211_rtw_set_txpower(struct wiphy *wiphy, enum tx_power_setting type, int dbm) #endif { - -_adapter *padapter = wiphy_to_adapter(wiphy); -HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -int value; -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) || defined(COMPAT_KERNEL_RELEASE) - value = mbm/100; -#else - value = dbm; -#endif - -if(value < 0) - value = 0; -if(value > 40) - value = 40; - -if(type == NL80211_TX_POWER_FIXED) { - pHalData->CurrentTxPwrIdx = value; - rtw_hal_set_tx_power_level(padapter, pHalData->current_channel); -} else - return -EOPNOTSUPP; #if 0 struct iwm_priv *iwm = wiphy_to_iwm(wiphy); int ret; @@ -3988,13 +4154,9 @@ static int cfg80211_rtw_get_txpower(struct wiphy *wiphy, #endif int *dbm) { - _adapter *padapter = wiphy_to_adapter(wiphy); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - RTW_INFO("%s\n", __func__); - // *dbm = (12); - *dbm = pHalData->CurrentTxPwrIdx; + *dbm = (12); return 0; } @@ -4019,12 +4181,48 @@ static int cfg80211_rtw_set_power_mgmt(struct wiphy *wiphy, #ifdef CONFIG_LPS if (!enabled) - rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE_CFG80211_PWRMGMT, 1); + rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE_CFG80211_PWRMGMT, 0); #endif return 0; } +static void _rtw_set_pmksa(struct net_device *ndev, + u8 *bssid, u8 *pmkid) +{ + _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); + struct security_priv *psecuritypriv = &padapter->securitypriv; + u8 index, blInserted = _FALSE; + + /* overwrite PMKID */ + for (index = 0 ; index < NUM_PMKID_CACHE; index++) { + if (_rtw_memcmp(psecuritypriv->PMKIDList[index].Bssid, bssid, ETH_ALEN) == _TRUE) { + /* BSSID is matched, the same AP => rewrite with new PMKID. */ + RTW_INFO("BSSID("MAC_FMT") exists in the PMKList.\n", MAC_ARG(bssid)); + + _rtw_memcpy(psecuritypriv->PMKIDList[index].PMKID, pmkid, WLAN_PMKID_LEN); + psecuritypriv->PMKIDList[index].bUsed = _TRUE; + psecuritypriv->PMKIDIndex = index + 1; + blInserted = _TRUE; + break; + } + } + + if (!blInserted) { + /* Find a new entry */ + RTW_INFO("Use the new entry index = %d for this PMKID.\n", + psecuritypriv->PMKIDIndex); + + _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, bssid, ETH_ALEN); + _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, pmkid, WLAN_PMKID_LEN); + + psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].bUsed = _TRUE; + psecuritypriv->PMKIDIndex++ ; + if (psecuritypriv->PMKIDIndex == 16) + psecuritypriv->PMKIDIndex = 0; + } +} + static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, struct net_device *ndev, struct cfg80211_pmksa *pmksa) @@ -4034,6 +4232,7 @@ static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, struct mlme_priv *mlme = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; u8 strZeroMacAddress[ETH_ALEN] = { 0x00 }; + bool sae_auth = rtw_sec_chk_auth_type(padapter, NL80211_AUTHTYPE_SAE); RTW_INFO(FUNC_NDEV_FMT" "MAC_FMT" "KEY_FMT"\n", FUNC_NDEV_ARG(ndev) , MAC_ARG(pmksa->bssid), KEY_ARG(pmksa->pmkid)); @@ -4041,39 +4240,17 @@ static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, if (_rtw_memcmp((u8 *)pmksa->bssid, strZeroMacAddress, ETH_ALEN) == _TRUE) return -EINVAL; - if (check_fwstate(mlme, _FW_LINKED) == _FALSE) { + if (check_fwstate(mlme, _FW_LINKED) == _FALSE && !sae_auth) { RTW_INFO(FUNC_NDEV_FMT" not set pmksa cause not in linked state\n", FUNC_NDEV_ARG(ndev)); return -EINVAL; } - blInserted = _FALSE; + _rtw_set_pmksa(ndev, (u8 *)pmksa->bssid, (u8 *)pmksa->pmkid); - /* overwrite PMKID */ - for (index = 0 ; index < NUM_PMKID_CACHE; index++) { - if (_rtw_memcmp(psecuritypriv->PMKIDList[index].Bssid, (u8 *)pmksa->bssid, ETH_ALEN) == _TRUE) { - /* BSSID is matched, the same AP => rewrite with new PMKID. */ - RTW_INFO(FUNC_NDEV_FMT" BSSID exists in the PMKList.\n", FUNC_NDEV_ARG(ndev)); - - _rtw_memcpy(psecuritypriv->PMKIDList[index].PMKID, (u8 *)pmksa->pmkid, WLAN_PMKID_LEN); - psecuritypriv->PMKIDList[index].bUsed = _TRUE; - psecuritypriv->PMKIDIndex = index + 1; - blInserted = _TRUE; - break; - } - } - - if (!blInserted) { - /* Find a new entry */ - RTW_INFO(FUNC_NDEV_FMT" Use the new entry index = %d for this PMKID.\n", - FUNC_NDEV_ARG(ndev), psecuritypriv->PMKIDIndex); - - _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, (u8 *)pmksa->bssid, ETH_ALEN); - _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, (u8 *)pmksa->pmkid, WLAN_PMKID_LEN); - - psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].bUsed = _TRUE; - psecuritypriv->PMKIDIndex++ ; - if (psecuritypriv->PMKIDIndex == 16) - psecuritypriv->PMKIDIndex = 0; + if (sae_auth && + (psecuritypriv->extauth_status == WLAN_STATUS_SUCCESS)) { + RTW_PRINT("SAE: auth success, start assoc\n"); + start_clnt_assoc(padapter); } return 0; @@ -4128,11 +4305,12 @@ static int cfg80211_rtw_flush_pmksa(struct wiphy *wiphy, #ifdef CONFIG_AP_MODE void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) { - u8 ie_offset; +#if !defined(RTW_USE_CFG80211_STA_EVENT) && !defined(COMPAT_KERNEL_RELEASE) s32 freq; int channel; struct wireless_dev *pwdev = padapter->rtw_wdev; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +#endif struct net_device *ndev = padapter->pnetdev; RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); @@ -4140,8 +4318,7 @@ void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint f #if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) { struct station_info sinfo; - _rtw_memset(&sinfo, 0, sizeof(struct station_info)); - + u8 ie_offset; if (get_frame_sub_type(pmgmt_frame) == WIFI_ASSOCREQ) ie_offset = _ASOCREQ_IE_OFFSET_; else /* WIFI_REASSOCREQ */ @@ -4180,6 +4357,7 @@ void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint f void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, const u8 *da, unsigned short reason) { +#if !defined(RTW_USE_CFG80211_STA_EVENT) && !defined(COMPAT_KERNEL_RELEASE) s32 freq; int channel; u8 *pmgmt_frame; @@ -4190,6 +4368,7 @@ void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, const u8 *da, unsign struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wireless_dev *wdev = padapter->rtw_wdev; +#endif struct net_device *ndev = padapter->pnetdev; RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); @@ -4218,7 +4397,7 @@ void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, const u8 *da, unsign frame_len = sizeof(struct rtw_ieee80211_hdr_3addr); reason = cpu_to_le16(reason); - pmgmt_frame = rtw_set_fixed_ie(pmgmt_frame, _RSON_CODE_, (unsigned char *)&reason, &frame_len); + pmgmt_frame = rtw_set_fixed_ie(pmgmt_frame, _RSON_CODE_ , (unsigned char *)&reason, &frame_len); #ifdef COMPAT_KERNEL_RELEASE rtw_cfg80211_rx_mgmt(wdev, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); @@ -4258,19 +4437,19 @@ static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_de int snap_len = 6; unsigned char *pdata; u16 frame_ctl; - unsigned char src_mac_addr[6]; - unsigned char dst_mac_addr[6]; + unsigned char src_mac_addr[ETH_ALEN]; + unsigned char dst_mac_addr[ETH_ALEN]; struct rtw_ieee80211_hdr *dot11_hdr; struct ieee80211_radiotap_header *rtap_hdr; _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +#ifdef CONFIG_DFS_MASTER struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); +#endif RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); - if (!skb) - goto fail; - - rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); + if (skb) + rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); if (IS_CH_WAITING(rfctl)) { #ifdef CONFIG_DFS_MASTER @@ -4290,6 +4469,11 @@ static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_de if (unlikely(skb->len < rtap_len)) goto fail; + if (rtap_len != 14) { + RTW_INFO("radiotap len (should be 14): %d\n", rtap_len); + goto fail; + } + /* Skip the ratio tap header */ skb_pull(skb, rtap_len); @@ -4404,11 +4588,12 @@ fail: } +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 2, 0)) static void rtw_cfg80211_monitor_if_set_multicast_list(struct net_device *ndev) { RTW_INFO("%s\n", __func__); } - +#endif static int rtw_cfg80211_monitor_if_set_mac_address(struct net_device *ndev, void *addr) { int ret = 0; @@ -4430,11 +4615,7 @@ static const struct net_device_ops rtw_cfg80211_monitor_if_ops = { }; #endif -static int rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name, -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) - unsigned char name_assign_type, -#endif - struct net_device **ndev) +static int rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name, struct net_device **ndev) { int ret = 0; struct net_device *mon_ndev = NULL; @@ -4465,9 +4646,6 @@ static int rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name, mon_ndev->type = ARPHRD_IEEE80211_RADIOTAP; strncpy(mon_ndev->name, name, IFNAMSIZ); mon_ndev->name[IFNAMSIZ - 1] = 0; -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) - mon_ndev->name_assign_type = name_assign_type; -#endif #if (LINUX_VERSION_CODE > KERNEL_VERSION(4, 11, 8)) mon_ndev->priv_destructor = rtw_ndev_destructor; #else @@ -4557,11 +4735,7 @@ static int switch (type) { case NL80211_IFTYPE_MONITOR: padapter = wiphy_to_adapter(wiphy); /* TODO: get ap iface ? */ - ret = rtw_cfg80211_add_monitor_if(padapter, (char *)name, -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) - name_assign_type, -#endif - &ndev); + ret = rtw_cfg80211_add_monitor_if(padapter, (char *)name, &ndev); if (ret == 0) wdev = ndev->ieee80211_ptr; break; @@ -4683,7 +4857,6 @@ static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, co u8 *pbuf = NULL; uint len, wps_ielen = 0; uint p2p_ielen = 0; - u8 *p2p_ie; u8 got_p2p_ie = _FALSE; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); /* struct sta_priv *pstapriv = &padapter->stapriv; */ @@ -4698,6 +4871,12 @@ static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, co if (head_len < 24) return -EINVAL; + #ifdef CONFIG_FW_HANDLE_TXBCN + if (!rtw_ap_nums_check(adapter)) { + RTW_ERR(FUNC_ADPT_FMT"failed, con't support over %d BCN\n", FUNC_ADPT_ARG(adapter), CONFIG_LIMITED_AP_NUM); + return -EINVAL; + } + #endif /*CONFIG_FW_HANDLE_TXBCN*/ pbuf = rtw_zmalloc(head_len + tail_len); if (!pbuf) @@ -4723,7 +4902,6 @@ static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, co if (adapter->wdinfo.driver_interface == DRIVER_CFG80211) { /* check p2p if enable */ if (rtw_get_p2p_ie(pbuf + _FIXED_IE_LENGTH_, len - _FIXED_IE_LENGTH_, NULL, &p2p_ielen)) { - struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; struct wifidirect_info *pwdinfo = &(adapter->wdinfo); RTW_INFO("got p2p_ie, len=%d\n", p2p_ielen); @@ -4782,7 +4960,8 @@ static int cfg80211_rtw_add_beacon(struct wiphy *wiphy, struct net_device *ndev, ret = -ENOTSUPP; goto exit; } - + rtw_mi_scan_abort(adapter, _TRUE); + rtw_mi_buddy_set_scan_deny(adapter, 300); ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); exit: @@ -4830,6 +5009,15 @@ static int cfg80211_rtw_start_ap(struct wiphy *wiphy, struct net_device *ndev, goto exit; } + /* + Kernel < v5.1, the auth_type set as NL80211_AUTHTYPE_AUTOMATIC. + if the AKM SAE in the RSN IE, we have to update the auth_type for SAE + in rtw_check_beacon_data(). + */ + rtw_cfg80211_set_auth_type(&adapter->securitypriv, settings->auth_type); + + rtw_mi_scan_abort(adapter, _TRUE); + rtw_mi_buddy_set_scan_deny(adapter, 300); ret = rtw_add_beacon(adapter, settings->beacon.head, settings->beacon.head_len, settings->beacon.tail, settings->beacon.tail_len); @@ -5011,7 +5199,7 @@ void dump_station_parameters(void *sel, struct wiphy *wiphy, const struct statio for (i = 1; i <= NL80211_STA_FLAG_MAX; i++) { if (params->sta_flags_mask & BIT(i)) { cnt += snprintf(sta_flags_buf + cnt, STA_FLAGS_BUF_LEN - cnt -1, "%s=%u " - , nl80211_sta_flags_str(i), (params->sta_flags_set & BIT(i)) >> i); + , nl80211_sta_flags_str(i), (params->sta_flags_set & BIT(i)) ? 1 : 0); if (cnt >= STA_FLAGS_BUF_LEN - 1) break; } @@ -5109,7 +5297,9 @@ static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +#if defined(CONFIG_TDLS) || defined(CONFIG_RTW_MESH) struct sta_priv *pstapriv = &padapter->stapriv; +#endif #ifdef CONFIG_TDLS struct sta_info *psta; #endif /* CONFIG_TDLS */ @@ -5133,6 +5323,7 @@ static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; struct mesh_plink_ent *plink = NULL; struct wlan_network *scanned = NULL; + bool acnode = 0; u8 add_new_sta = 0, probe_req = 0; _irqL irqL; @@ -5162,14 +5353,6 @@ static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev } #endif - /* wpa_supplicant's auto peer will initiate peering when candidate peer is reported without max_peer_links consideration */ - if (plink_ctl->num >= mcfg->max_peer_links) { - RTW_INFO(FUNC_NDEV_FMT" exceed max_peer_links:%u\n" - , FUNC_NDEV_ARG(ndev), mcfg->max_peer_links); - ret = -EINVAL; - goto release_plink_ctl; - } - scanned = rtw_find_network(&padapter->mlmepriv.scanned_queue, mac); if (!scanned || rtw_get_passing_time_ms(scanned->last_scanned) >= mcfg->peer_sel_policy.scanr_exp_ms @@ -5186,7 +5369,20 @@ static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev goto release_plink_ctl; } - if (!rtw_bss_is_candidate_mesh_peer(&padapter->mlmepriv.cur_network.network, &scanned->network, 1, 1)){ + #if CONFIG_RTW_MESH_ACNODE_PREVENT + if (plink_ctl->acnode_rsvd) + acnode = rtw_mesh_scanned_is_acnode_confirmed(padapter, scanned); + #endif + + /* wpa_supplicant's auto peer will initiate peering when candidate peer is reported without max_peer_links consideration */ + if (plink_ctl->num >= mcfg->max_peer_links + acnode ? 1 : 0) { + RTW_INFO(FUNC_NDEV_FMT" exceed max_peer_links:%u%s\n" + , FUNC_NDEV_ARG(ndev), mcfg->max_peer_links, acnode ? " acn" : ""); + ret = -EINVAL; + goto release_plink_ctl; + } + + if (!rtw_bss_is_candidate_mesh_peer(&padapter->mlmepriv.cur_network.network, &scanned->network, 1, 1)) { RTW_WARN(FUNC_NDEV_FMT" corresponding network is not candidate with same ch\n" , FUNC_NDEV_ARG(ndev)); ret = -EINVAL; @@ -5208,6 +5404,13 @@ static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev plink->aid = params->aid; plink->scanned = scanned; + #if CONFIG_RTW_MESH_ACNODE_PREVENT + if (acnode) { + RTW_INFO(FUNC_ADPT_FMT" acnode "MAC_FMT"\n" + , FUNC_ADPT_ARG(padapter), MAC_ARG(scanned->network.MacAddress)); + } + #endif + add_new_sta = 1; } else { RTW_WARN(FUNC_NDEV_FMT" rtw_mesh_plink_add not success\n" @@ -5225,7 +5428,7 @@ release_plink_ctl: #ifdef CONFIG_DFS_MASTER if (IS_UNDER_CAC(adapter_to_rfctl(padapter))) - rtw_force_stop_cac(padapter, 300); + rtw_force_stop_cac(adapter_to_rfctl(padapter), 300); #endif /* indicate new sta */ @@ -5366,10 +5569,12 @@ static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *n #endif struct station_parameters *params) { +#ifdef CONFIG_RTW_MESH _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); struct sta_priv *stapriv = &adapter->stapriv; struct sta_info *sta = NULL; _irqL irqL; +#endif int ret = 0; RTW_INFO(FUNC_NDEV_FMT" mac:"MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(mac)); @@ -5383,6 +5588,7 @@ static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *n struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; struct mesh_plink_ent *plink = NULL; _irqL irqL2; + struct sta_info *del_sta = NULL; ret = cfg80211_check_station_change(wiphy, params, sta_type); if (ret) { @@ -5400,6 +5606,32 @@ static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *n plink->plink_state = nl80211_plink_state_to_rtw_plink_state(params->plink_state); + #if CONFIG_RTW_MESH_ACNODE_PREVENT + if (params->plink_state == NL80211_PLINK_OPN_SNT + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) + && (params->sta_modify_mask & STATION_PARAM_APPLY_PLINK_STATE) + #endif + ) { + if (rtw_mesh_scanned_is_acnode_confirmed(adapter, plink->scanned) + && rtw_mesh_acnode_prevent_allow_sacrifice(adapter) + ) { + struct sta_info *sac = rtw_mesh_acnode_prevent_pick_sacrifice(adapter); + + if (sac) { + del_sta = sac; + _enter_critical_bh(&stapriv->asoc_list_lock, &irqL); + if (!rtw_is_list_empty(&del_sta->asoc_list)) { + rtw_list_delete(&del_sta->asoc_list); + stapriv->asoc_list_cnt--; + STA_SET_MESH_PLINK(del_sta, NULL); + } + _exit_critical_bh(&stapriv->asoc_list_lock, &irqL); + RTW_INFO(FUNC_ADPT_FMT" sacrifice "MAC_FMT" for acnode\n" + , FUNC_ADPT_ARG(adapter), MAC_ARG(del_sta->cmn.mac_addr)); + } + } + } else + #endif if ((params->plink_state == NL80211_PLINK_OPN_RCVD || params->plink_state == NL80211_PLINK_CNF_RCVD || params->plink_state == NL80211_PLINK_ESTAB) @@ -5421,34 +5653,43 @@ static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *n goto release_plink_ctl; } } - } else if (params->plink_state == NL80211_PLINK_HOLDING + } + else if (params->plink_state == NL80211_PLINK_HOLDING #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) && (params->sta_modify_mask & STATION_PARAM_APPLY_PLINK_STATE) #endif ) { - u8 updated = _FALSE; - - sta = rtw_get_stainfo(stapriv, mac); - if (!sta) + del_sta = rtw_get_stainfo(stapriv, mac); + if (!del_sta) goto release_plink_ctl; _enter_critical_bh(&stapriv->asoc_list_lock, &irqL); - if (!rtw_is_list_empty(&sta->asoc_list)) { - rtw_list_delete(&sta->asoc_list); + if (!rtw_is_list_empty(&del_sta->asoc_list)) { + rtw_list_delete(&del_sta->asoc_list); stapriv->asoc_list_cnt--; - STA_SET_MESH_PLINK(sta, NULL); + STA_SET_MESH_PLINK(del_sta, NULL); } _exit_critical_bh(&stapriv->asoc_list_lock, &irqL); - updated = ap_free_sta(adapter, sta, 0, 0, 1); - associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL); } release_plink_ctl: _exit_critical_bh(&(plink_ctl->lock), &irqL2); + + if (del_sta) { + u8 sta_addr[ETH_ALEN]; + u8 updated = _FALSE; + + _rtw_memcpy(sta_addr, del_sta->cmn.mac_addr, ETH_ALEN); + updated = ap_free_sta(adapter, del_sta, 0, 0, 1); + rtw_mesh_expire_peer(stapriv->padapter, sta_addr); + + associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL); + } } -#endif /* CONFIG_RTW_MESH */ exit: +#endif /* CONFIG_RTW_MESH */ + return ret; } @@ -5499,16 +5740,16 @@ static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *nde #ifdef CONFIG_RTW_MESH if (MLME_IS_MESH(padapter)) { - if (!psta) - plink = rtw_mesh_plink_get_no_estab_by_idx(padapter, idx - asoc_list_num); - else + if (psta) plink = psta->plink; + if (!plink) + plink = rtw_mesh_plink_get_no_estab_by_idx(padapter, idx - asoc_list_num); } #endif /* CONFIG_RTW_MESH */ - if (!psta + if ((!MLME_IS_MESH(padapter) && !psta) #ifdef CONFIG_RTW_MESH - && !plink + || (MLME_IS_MESH(padapter) && !plink) #endif ) { if (DBG_DUMP_STATION) @@ -5523,7 +5764,7 @@ static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *nde else _rtw_memcpy(mac, plink->addr, ETH_ALEN); #endif - + sinfo->filled = 0; if (psta) { @@ -5545,8 +5786,6 @@ exit: static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *ndev, struct bss_parameters *params) { - u8 i; - RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); /* RTW_INFO("use_cts_prot=%d\n", params->use_cts_prot); @@ -5562,6 +5801,98 @@ static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *ndev, } +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) +static int cfg80211_rtw_set_txq_params(struct wiphy *wiphy +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) + , struct net_device *ndev +#endif + , struct ieee80211_txq_params *params) +{ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) + _adapter *padapter = rtw_netdev_priv(ndev); +#else + _adapter *padapter = wiphy_to_adapter(wiphy); +#endif + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u8 ac, AIFS, ECWMin, ECWMax, aSifsTime; + u16 TXOP; + u8 shift_count = 0; + u32 acParm; + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) + ac = params->ac; +#else + ac = params->queue; +#endif + +#if 0 + RTW_INFO("ac=%d\n", ac); + RTW_INFO("txop=%u\n", params->txop); + RTW_INFO("cwmin=%u\n", params->cwmin); + RTW_INFO("cwmax=%u\n", params->cwmax); + RTW_INFO("aifs=%u\n", params->aifs); +#endif + + if (is_supported_5g(pmlmeext->cur_wireless_mode) || + (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) + aSifsTime = 16; + else + aSifsTime = 10; + + AIFS = params->aifs * pmlmeinfo->slotTime + aSifsTime; + + while ((params->cwmin + 1) >> shift_count != 1) { + shift_count++; + if (shift_count == 15) + break; + } + + ECWMin = shift_count; + + shift_count = 0; + while ((params->cwmax + 1) >> shift_count != 1) { + shift_count++; + if (shift_count == 15) + break; + } + + ECWMax = shift_count; + + TXOP = le16_to_cpu(params->txop); + + acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); + + switch (ac) { + case NL80211_TXQ_Q_VO: + RTW_INFO(FUNC_NDEV_FMT" AC_VO = 0x%08x\n", FUNC_ADPT_ARG(padapter), acParm); + rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); + break; + + case NL80211_TXQ_Q_VI: + RTW_INFO(FUNC_NDEV_FMT" AC_VI = 0x%08x\n", FUNC_ADPT_ARG(padapter), acParm); + rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); + break; + + case NL80211_TXQ_Q_BE: + RTW_INFO(FUNC_NDEV_FMT" AC_BE = 0x%08x\n", FUNC_ADPT_ARG(padapter), acParm); + rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); + break; + + case NL80211_TXQ_Q_BK: + RTW_INFO(FUNC_NDEV_FMT" AC_BK = 0x%08x\n", FUNC_ADPT_ARG(padapter), acParm); + rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); + break; + + default: + break; + } + + return 0; +} +#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) */ + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) static int cfg80211_rtw_set_channel(struct wiphy *wiphy #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) , struct net_device *ndev @@ -5608,6 +5939,7 @@ static int cfg80211_rtw_set_channel(struct wiphy *wiphy return 0; } +#endif /*#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0))*/ static int cfg80211_rtw_set_monitor_channel(struct wiphy *wiphy #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) @@ -5707,7 +6039,7 @@ static int cfg80211_rtw_set_monitor_channel(struct wiphy *wiphy return 0; } - +/* static int cfg80211_rtw_auth(struct wiphy *wiphy, struct net_device *ndev, struct cfg80211_auth_request *req) { @@ -5723,12 +6055,12 @@ static int cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *ndev, return 0; } +*/ #endif /* CONFIG_AP_MODE */ void rtw_cfg80211_rx_probe_request(_adapter *adapter, union recv_frame *rframe) { struct wireless_dev *wdev = adapter->rtw_wdev; - struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); u8 *frame = get_recvframe_data(rframe); uint frame_len = rframe->u.hdr.len; s32 freq; @@ -5742,7 +6074,7 @@ void rtw_cfg80211_rx_probe_request(_adapter *adapter, union recv_frame *rframe) , ch, sch, MAC_ARG(get_addr2_ptr(frame))); #endif -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC); #else cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC); @@ -5825,6 +6157,7 @@ void rtw_cfg80211_rx_p2p_action_public(_adapter *adapter, union recv_frame *rfra break; case P2P_PROVISION_DISC_RESP: case P2P_INVIT_RESP: + rtw_clear_scan_deny(adapter); #if !RTW_P2P_GROUP_INTERFACE rtw_mi_buddy_set_scan_deny(adapter, 2000); #endif @@ -5853,7 +6186,6 @@ indicate: void rtw_cfg80211_rx_action(_adapter *adapter, union recv_frame *rframe, const char *msg) { struct wireless_dev *wdev = adapter->rtw_wdev; - struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); u8 *frame = get_recvframe_data(rframe); uint frame_len = rframe->u.hdr.len; s32 freq; @@ -5881,8 +6213,10 @@ void rtw_cfg80211_rx_action(_adapter *adapter, union recv_frame *rframe, const c rtw_mi_scan_abort(adapter, _FALSE); /*rtw_scan_abort_no_wait*/ } } - +#ifdef CONFIG_RTW_MESH indicate: +#endif + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC); #else @@ -5922,7 +6256,6 @@ void rtw_cfg80211_rx_rrm_action(_adapter *adapter, union recv_frame *rframe) void rtw_cfg80211_rx_mframe(_adapter *adapter, union recv_frame *rframe, const char *msg) { struct wireless_dev *wdev = adapter->rtw_wdev; - struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); u8 *frame = get_recvframe_data(rframe); uint frame_len = rframe->u.hdr.len; s32 freq; @@ -5938,10 +6271,7 @@ void rtw_cfg80211_rx_mframe(_adapter *adapter, union recv_frame *rframe, const c #endif RTW_INFO("RTW_Rx:ch=%d(%d), ta="MAC_FMT"\n", ch, sch, MAC_ARG(get_addr2_ptr(frame))); - #ifdef CONFIG_RTW_MESH - if (!rtw_sae_check_frames(adapter, frame, frame_len, _FALSE)) - #endif - { + if (!rtw_sae_preprocess(adapter, frame, frame_len, _FALSE)) { if (msg) RTW_INFO("RTW_Rx:%s\n", msg); else @@ -5979,7 +6309,6 @@ void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &(padapter->wdinfo); u8 *frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); @@ -6165,7 +6494,7 @@ void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, RTW_INFO("%s, ack to\n", __func__); #if 0 - if (wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) { + if(wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) { RTW_INFO("waiting for p2p peer key-in PIN CODE\n"); rtw_msleep_os(15000); /* 15 sec for key in PIN CODE, workaround for GS2 before issuing Nego Req. */ } @@ -6214,6 +6543,54 @@ static s32 cfg80211_rtw_update_ft_ies(struct wiphy *wiphy, } #endif +void rtw_cfg80211_external_auth_request(_adapter *padapter, union recv_frame *rframe) +{ + struct rtw_external_auth_params params; + struct wireless_dev *wdev = padapter->rtw_wdev; + struct net_device *netdev = wdev_to_ndev(wdev); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + u8 frame[256] = { 0 }; + uint frame_len = 24; + s32 freq = 0; + + /* rframe, in this case is null point */ + + freq = rtw_ch2freq(pmlmeext->cur_channel); + +#ifdef CONFIG_DEBUG_CFG80211 + RTW_INFO(FUNC_ADPT_FMT": freq(%d, %d)\n", FUNC_ADPT_ARG(padapter), freq); +#endif + +#if (KERNEL_VERSION(4, 17, 0) <= LINUX_VERSION_CODE) + params.action = EXTERNAL_AUTH_START; + _rtw_memcpy(params.bssid, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); + params.ssid.ssid_len = pmlmeinfo->network.Ssid.SsidLength; + _rtw_memcpy(params.ssid.ssid, pmlmeinfo->network.Ssid.Ssid, + pmlmeinfo->network.Ssid.SsidLength); + params.key_mgmt_suite = 0x8ac0f00; + + cfg80211_external_auth_request(netdev, + (struct cfg80211_external_auth_params *)¶ms, GFP_ATOMIC); +#elif (KERNEL_VERSION(2, 6, 37) <= LINUX_VERSION_CODE) + set_frame_sub_type(frame, WIFI_AUTH); + + _rtw_memcpy(frame + 4, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); + _rtw_memcpy(frame + 10, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(frame + 16, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); + RTW_PUT_LE32((frame + 18), 0x8ac0f00); + + if (pmlmeinfo->network.Ssid.SsidLength) { + *(frame + 23) = pmlmeinfo->network.Ssid.SsidLength; + _rtw_memcpy(frame + 24, pmlmeinfo->network.Ssid.Ssid, + pmlmeinfo->network.Ssid.SsidLength); + frame_len = 24 + pmlmeinfo->network.Ssid.SsidLength; + } + rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC); +#endif +} + inline void rtw_cfg80211_set_is_roch(_adapter *adapter, bool val) { adapter->cfg80211_wdinfo.is_ro_ch = val; @@ -6257,13 +6634,13 @@ static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy, { s32 err = 0; u8 remain_ch = (u8) ieee80211_frequency_to_channel(channel->center_freq); - u8 union_ch = 0, union_bw = 0, union_offset = 0; - u8 i; _adapter *padapter = NULL; struct rtw_wdev_priv *pwdev_priv; struct wifidirect_info *pwdinfo; struct cfg80211_wifidirect_info *pcfg80211_wdinfo; +#ifdef CONFIG_CONCURRENT_MODE u8 is_p2p_find = _FALSE; +#endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) #if defined(RTW_DEDICATED_P2P_DEVICE) @@ -6338,7 +6715,7 @@ static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy, padapter->wdinfo.listen_channel = remain_ch; RTW_INFO(FUNC_ADPT_FMT" init listen_channel %u\n" , FUNC_ADPT_ARG(padapter), padapter->wdinfo.listen_channel); - } else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN) + } else if (rtw_p2p_chk_state(pwdinfo , P2P_STATE_LISTEN) && (time_after_eq(rtw_get_current_time(), pwdev_priv->probe_resp_ie_update_time) && rtw_get_passing_time_ms(pwdev_priv->probe_resp_ie_update_time) < 50) ) { @@ -6444,9 +6821,6 @@ exit: inline int rtw_cfg80211_iface_has_p2p_group_cap(_adapter *adapter) { - struct wiphy *wiphy = adapter_to_wiphy(adapter); - struct rtw_wdev_priv *wdev_data = adapter_wdev_data(adapter); - #if RTW_P2P_GROUP_INTERFACE if (is_primary_adapter(adapter)) return 0; @@ -6643,15 +7017,18 @@ static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, u8 no_cck, const int ret = _FAIL; bool ack = _TRUE; struct rtw_ieee80211_hdr *pwlanhdr; +#if defined(RTW_ROCH_BACK_OP) && defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE) struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); +#endif struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); u8 u_ch = rtw_mi_get_union_chan(padapter); u8 leave_op = 0; #ifdef CONFIG_P2P struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; + #ifdef CONFIG_CONCURRENT_MODE struct wifidirect_info *pwdinfo = &padapter->wdinfo; + #endif #endif rtw_cfg80211_set_is_mgmt_tx(padapter, 1); @@ -6704,8 +7081,9 @@ static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, u8 no_cck, const if (tx_ch != rtw_get_oper_ch(padapter)) set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); - +#ifdef CONFIG_MCC_MODE issue_mgmt_frame: +#endif /* starting alloc mgmt frame to dump it */ pmgntframe = alloc_mgtxmitframe(pxmitpriv); if (pmgntframe == NULL) { @@ -6851,12 +7229,9 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(COMPAT_KERNEL_RELEASE) struct ieee80211_channel *chan = params->chan; - bool offchan = params->offchan; - unsigned int wait = params->wait; const u8 *buf = params->buf; size_t len = params->len; bool no_cck = params->no_cck; - bool dont_wait_for_ack = params->dont_wait_for_ack; #endif #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 2, 0)) bool no_cck = 0; @@ -6963,15 +7338,19 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, wait_ack = 0; goto dump; } -#ifdef CONFIG_RTW_MESH else if (frame_styp == RTW_IEEE80211_STYPE_AUTH) { + int retval = 0; + RTW_INFO("RTW_Tx:tx_ch=%d, no_cck=%u, da="MAC_FMT"\n", tx_ch, no_cck, MAC_ARG(GetAddr1Ptr(buf))); - if (!rtw_sae_check_frames(padapter, buf, len, _TRUE)) + + retval = rtw_sae_preprocess(padapter, buf, len, _TRUE); + if (retval == 2) + goto exit; + if (retval == 0) RTW_INFO("RTW_Tx:AUTH\n"); dump_limit = 1; goto dump; } -#endif if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { RTW_INFO(FUNC_ADPT_FMT" frame_control:0x%02x\n", FUNC_ADPT_ARG(padapter), @@ -7069,6 +7448,7 @@ dump: if (pwdev_priv->invit_info.flags & BIT(0) && pwdev_priv->invit_info.status == 0 ) { + rtw_clear_scan_deny(padapter); RTW_INFO(FUNC_ADPT_FMT" agree with invitation of persistent group\n", FUNC_ADPT_ARG(padapter)); #if !RTW_P2P_GROUP_INTERFACE @@ -7116,16 +7496,27 @@ static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, frame_type, reg); #endif - /* Wait QC Verify */ - return; - switch (frame_type) { + case IEEE80211_STYPE_AUTH: /* 0x00B0 */ + if (reg > 0) + SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_AUTH, reg); + else + CLR_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_AUTH, reg); + break; +#ifdef not_yet case IEEE80211_STYPE_PROBE_REQ: /* 0x0040 */ - SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_PROBE_REQ, reg); + if (reg > 0) + SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_PROBE_REQ, reg); + else + CLR_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_PROBE_REQ, reg); break; case IEEE80211_STYPE_ACTION: /* 0x00D0 */ - SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_ACTION, reg); + if (reg > 0) + SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_ACTION, reg); + else + CLR_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_ACTION, reg); break; +#endif default: break; } @@ -7190,7 +7581,7 @@ static int cfg80211_rtw_tdls_mgmt(struct wiphy *wiphy, /* Debug purpose */ #if 1 - RTW_INFO("%s %d\n", __func__, __LINE__); + RTW_INFO("%s %d\n", __FUNCTION__, __LINE__); RTW_INFO("peer:"MAC_FMT", action code:%d, dialog:%d, status code:%d\n", MAC_ARG(txmgmt.peer), txmgmt.action_code, txmgmt.dialog_token, txmgmt.status_code); @@ -7258,7 +7649,7 @@ static int cfg80211_rtw_tdls_oper(struct wiphy *wiphy, } #ifdef CONFIG_LPS - rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); + rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 0); #endif /* CONFIG_LPS */ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); @@ -7471,7 +7862,7 @@ void dump_mesh_config(void *sel, const struct mesh_config *conf) RTW_PRINT_SEL(sel, "path_refresh_time:%u\n", conf->path_refresh_time); RTW_PRINT_SEL(sel, "min_discovery_timeout:%u\n", conf->min_discovery_timeout); RTW_PRINT_SEL(sel, "dot11MeshHWMPactivePathTimeout:%u\n", conf->dot11MeshHWMPactivePathTimeout); - RTW_PRINT_SEL(sel, "dot11MeshHWMPpreqMinInterval:%u\n", conf->dot11MeshHWMPpreqMinInterval); + RTW_PRINT_SEL(sel, "dot11MeshHWMPpreqMinInterval:%u\n", conf->dot11MeshHWMPpreqMinInterval); #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) RTW_PRINT_SEL(sel, "dot11MeshHWMPperrMinInterval:%u\n", conf->dot11MeshHWMPperrMinInterval); #endif @@ -7486,11 +7877,11 @@ void dump_mesh_config(void *sel, const struct mesh_config *conf) RTW_PRINT_SEL(sel, "dot11MeshForwarding:%d\n", conf->dot11MeshForwarding); RTW_PRINT_SEL(sel, "rssi_threshold:%d\n", conf->rssi_threshold); #endif - + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) RTW_PRINT_SEL(sel, "ht_opmode:0x%04x\n", conf->ht_opmode); #endif - + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) RTW_PRINT_SEL(sel, "dot11MeshHWMPactivePathToRootTimeout:%u\n", conf->dot11MeshHWMPactivePathToRootTimeout); RTW_PRINT_SEL(sel, "dot11MeshHWMProotInterval:%u\n", conf->dot11MeshHWMProotInterval); @@ -7501,7 +7892,7 @@ void dump_mesh_config(void *sel, const struct mesh_config *conf) RTW_PRINT_SEL(sel, "power_mode:%s\n", nl80211_mesh_power_mode_str(conf->power_mode)); RTW_PRINT_SEL(sel, "dot11MeshAwakeWindowDuration:%u\n", conf->dot11MeshAwakeWindowDuration); #endif - + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) RTW_PRINT_SEL(sel, "plink_timeout:%u\n", conf->plink_timeout); #endif @@ -7637,14 +8028,14 @@ static void rtw_cfg80211_mesh_cfg_set(_adapter *adapter, const struct mesh_confi if (chk_mesh_attr(NL80211_MESHCONF_HT_OPMODE, mask)); #endif #endif - + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) if (chk_mesh_attr(NL80211_MESHCONF_HWMP_PATH_TO_ROOT_TIMEOUT, mask)) mcfg->dot11MeshHWMPactivePathToRootTimeout = conf->dot11MeshHWMPactivePathToRootTimeout; if (chk_mesh_attr(NL80211_MESHCONF_HWMP_ROOT_INTERVAL, mask)) mcfg->dot11MeshHWMProotInterval = conf->dot11MeshHWMProotInterval; if (chk_mesh_attr(NL80211_MESHCONF_HWMP_CONFIRMATION_INTERVAL, mask)) - mcfg->dot11MeshHWMPconfirmationInterval = conf->dot11MeshHWMPconfirmationInterval; + mcfg->dot11MeshHWMPconfirmationInterval = conf->dot11MeshHWMPconfirmationInterval; #endif #if 0 /* TBD */ @@ -7702,7 +8093,7 @@ u8 *rtw_cfg80211_construct_mesh_beacon_ies(struct wiphy *wiphy, _adapter *adapte #endif if (!ch) goto exit; - + #if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) vht = ht && ch > 14 && bw >= CHANNEL_WIDTH_80; /* VHT40/VHT20? */ #endif @@ -7742,7 +8133,7 @@ u8 *rtw_cfg80211_construct_mesh_beacon_ies(struct wiphy *wiphy, _adapter *adapte c = ies + 8; /* beacon interval */ - RTW_PUT_LE16(c, setup->beacon_interval); + RTW_PUT_LE16(c , setup->beacon_interval); c += 2; /* capability */ @@ -7972,6 +8363,12 @@ static int cfg80211_rtw_update_mesh_config(struct wiphy *wiphy, struct net_devic rtw_cfg80211_mesh_cfg_set(adapter, nconf, mask); update_beacon(adapter, WLAN_EID_MESH_CONFIG, NULL, _TRUE); +#if CONFIG_RTW_MESH_CTO_MGATE_CARRIER + if (rtw_mesh_cto_mgate_required(adapter)) + rtw_netif_carrier_off(adapter->pnetdev); + else + rtw_netif_carrier_on(adapter->pnetdev); +#endif need_work = rtw_ieee80211_mesh_root_setup(adapter); rtw_mbss_info_change_notify(adapter, minfo_changed, need_work); @@ -8027,7 +8424,7 @@ static int cfg80211_rtw_join_mesh(struct wiphy *wiphy, struct net_device *dev, ret = -EINVAL; goto exit; } - + rtw_mesh_work(&adapter->mesh_work); exit: @@ -8108,7 +8505,7 @@ static int cfg80211_rtw_del_mpath(struct wiphy *wiphy, struct net_device *dev } } else { rtw_mesh_path_flush_by_iface(adapter); - } + } exit: return ret; @@ -8325,17 +8722,22 @@ static int cfg80211_rtw_sched_scan_start(struct wiphy *wiphy, return -EINVAL; } #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0) + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0) + interval = request->scan_plans->interval; +#else interval = request->interval; +#endif n_ssids = request->n_match_sets; ssids = (struct cfg80211_ssid *)rtw_zmalloc(n_ssids * sizeof(struct cfg80211_ssid)); - if (ssids == NULL) { + if(ssids == NULL) { RTW_ERR("Fail to allocate ssids for PNO\n"); return -ENOMEM; } - for (i = 0; i < request -> n_match_sets; i++) { + for (i=0;in_match_sets;i++) { ssids[i].ssid_len = request->match_sets[i].ssid.ssid_len; memcpy(ssids[i].ssid, request->match_sets[i].ssid.ssid, - request->match_sets[i].ssid.ssid_len); + request->match_sets[i].ssid.ssid_len); } #else interval = request->interval; @@ -8365,8 +8767,8 @@ static int cfg80211_rtw_sched_scan_stop(struct wiphy *wiphy, } int cfg80211_rtw_suspend(struct wiphy *wiphy, struct cfg80211_wowlan *wow) { - RTW_DBG("==> %s\n", __func__); - RTW_DBG("<== %s\n", __func__); + RTW_DBG("==> %s\n",__func__); + RTW_DBG("<== %s\n",__func__); return 0; } @@ -8376,14 +8778,13 @@ int cfg80211_rtw_resume(struct wiphy *wiphy) { struct pwrctrl_priv *pwrpriv; struct mlme_priv *pmlmepriv; padapter = wiphy_to_adapter(wiphy); - pwrpriv = adapter_to_pwrctl(padapter); pmlmepriv = &padapter->mlmepriv; struct sitesurvey_parm parm; int i, len; - RTW_DBG("==> %s\n", __func__); + RTW_DBG("==> %s\n",__func__); if (pwrpriv->wowlan_last_wake_reason == RX_PNO) { struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); @@ -8393,35 +8794,33 @@ int cfg80211_rtw_resume(struct wiphy *wiphy) { rtw_cfg80211_disconnected(padapter->rtw_wdev, 0, NULL, 0, 1, GFP_ATOMIC); rtw_init_sitesurvey_parm(padapter, &parm); - for (i = 0; i < pwrpriv -> pnlo_info -> ssid_num && i < RTW_SSID_SCAN_AMOUNT; i++) { + for (i=0;ipnlo_info->ssid_num && i < RTW_SSID_SCAN_AMOUNT; i++) { len = pwrpriv->pno_ssid_list->node[i].SSID_len; _rtw_memcpy(&parm.ssid[i].Ssid, pwrpriv->pno_ssid_list->node[i].SSID, len); - parm->ssid[i].SsidLength = len; + parm.ssid[i].SsidLength = len; } - prm->ssid_num = pwrpriv->pnlo_info->ssid_num; + parm.ssid_num = pwrpriv->pnlo_info->ssid_num; _enter_critical_bh(&pmlmepriv->lock, &irqL); //This modification fix PNO wakeup reconnect issue with hidden SSID AP. //rtw_sitesurvey_cmd(padapter, NULL); rtw_sitesurvey_cmd(padapter, &parm); _exit_critical_bh(&pmlmepriv->lock, &irqL); - + for (PNOWakeupScanWaitCnt = 0; PNOWakeupScanWaitCnt < 10; PNOWakeupScanWaitCnt++) { - if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _FALSE) + if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _FALSE) break; - rtw_msleep_os(1000); } - + _enter_critical_bh(&pmlmepriv->lock, &irqL); cfg80211_sched_scan_results(padapter->rtw_wdev->wiphy); _exit_critical_bh(&pmlmepriv->lock, &irqL); } - - RTW_DBG("<== %s\n", __func__); + RTW_DBG("<== %s\n",__func__); return 0; - + } #endif /* CONFIG_PNO_SUPPORT */ @@ -8457,13 +8856,13 @@ static int rtw_cfg80211_set_beacon_wpsp2pie(struct net_device *ndev, char *buf, pmlmepriv->wps_beacon_ie = rtw_malloc(wps_ielen); if (pmlmepriv->wps_beacon_ie == NULL) { - RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __func__, __LINE__); + RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } - _rtw_memcpy(pmlmepriv -> wps_beacon_ie, wps_ie, wps_ielen); - pmlmepriv -> wps_beacon_ie_len = wps_ielen; + _rtw_memcpy(pmlmepriv->wps_beacon_ie, wps_ie, wps_ielen); + pmlmepriv->wps_beacon_ie_len = wps_ielen; update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE); @@ -8480,15 +8879,15 @@ static int rtw_cfg80211_set_beacon_wpsp2pie(struct net_device *ndev, char *buf, #endif if (pmlmepriv->p2p_beacon_ie) { - u32 free_len = pmlmepriv -> p2p_beacon_ie_len; - pmlmepriv -> p2p_beacon_ie_len = 0; - rtw_mfree(pmlmepriv -> p2p_beacon_ie, free_len); - pmlmepriv -> p2p_beacon_ie = NULL; + u32 free_len = pmlmepriv->p2p_beacon_ie_len; + pmlmepriv->p2p_beacon_ie_len = 0; + rtw_mfree(pmlmepriv->p2p_beacon_ie, free_len); + pmlmepriv->p2p_beacon_ie = NULL; } - pmlmepriv -> p2p_beacon_ie = rtw_malloc(p2p_ielen); - if (pmlmepriv -> p2p_beacon_ie == NULL) { - RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __func__, __LINE__); + pmlmepriv->p2p_beacon_ie = rtw_malloc(p2p_ielen); + if (pmlmepriv->p2p_beacon_ie == NULL) { + RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } @@ -8567,13 +8966,13 @@ static int rtw_cfg80211_set_probe_resp_wpsp2pie(struct net_device *net, char *bu pmlmepriv->wps_probe_resp_ie = rtw_malloc(wps_ielen); if (pmlmepriv->wps_probe_resp_ie == NULL) { - RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __func__, __LINE__); + RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } /* add PUSH_BUTTON config_method by driver self in wpsie of probe_resp at GO Mode */ - puconfig_method = (u16 *)rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_CONF_METHOD, NULL, &attr_contentlen); + puconfig_method = (u16 *)rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_CONF_METHOD , NULL, &attr_contentlen); if (puconfig_method != NULL) { /* struct registry_priv *pregistrypriv = &padapter->registrypriv; */ struct wireless_dev *wdev = padapter->rtw_wdev; @@ -8636,7 +9035,7 @@ static int rtw_cfg80211_set_probe_resp_wpsp2pie(struct net_device *net, char *bu pmlmepriv->p2p_probe_resp_ie = rtw_malloc(p2p_ielen); if (pmlmepriv->p2p_probe_resp_ie == NULL) { - RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __func__, __LINE__); + RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } @@ -8648,12 +9047,11 @@ static int rtw_cfg80211_set_probe_resp_wpsp2pie(struct net_device *net, char *bu pmlmepriv->p2p_go_probe_resp_ie_len = 0; rtw_mfree(pmlmepriv->p2p_go_probe_resp_ie, free_len); pmlmepriv->p2p_go_probe_resp_ie = NULL; - } pmlmepriv->p2p_go_probe_resp_ie = rtw_malloc(p2p_ielen); if (pmlmepriv->p2p_go_probe_resp_ie == NULL) { - RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __func__, __LINE__); + RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } @@ -8708,7 +9106,7 @@ static int rtw_cfg80211_set_assoc_resp_wpsp2pie(struct net_device *net, char *bu pmlmepriv->wps_assoc_resp_ie = rtw_malloc(ie_len); if (pmlmepriv->wps_assoc_resp_ie == NULL) { - RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __func__, __LINE__); + RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, ie, ie_len); @@ -8727,7 +9125,7 @@ static int rtw_cfg80211_set_assoc_resp_wpsp2pie(struct net_device *net, char *bu pmlmepriv->p2p_assoc_resp_ie = rtw_malloc(ie_len); if (pmlmepriv->p2p_assoc_resp_ie == NULL) { - RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __func__, __LINE__); + RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } _rtw_memcpy(pmlmepriv->p2p_assoc_resp_ie, ie, ie_len); @@ -8836,18 +9234,16 @@ static void rtw_cfg80211_init_ht_capab_ex(_adapter *padapter static void rtw_cfg80211_init_ht_capab(_adapter *padapter , struct ieee80211_sta_ht_cap *ht_cap, BAND_TYPE band, u8 rf_type) { + struct registry_priv *regsty = &padapter->registrypriv; struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); u8 rx_nss = 0; - ht_cap->ht_supported = _TRUE; + if (!regsty->ht_enable || !is_supported_ht(regsty->wireless_mode)) + return; - /* According to the comment in rtw_ap.c: - * "Note: currently we switch to the MIXED op mode if HT non-greenfield - * station is associated. Probably it's a theoretical case, since - * it looks like all known HT STAs support greenfield." - * Therefore Greenfield is added to ht_cap - */ - ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | IEEE80211_HT_CAP_GRN_FLD | + ht_cap->ht_supported = 1; + + ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_DSSSCCK40 | IEEE80211_HT_CAP_MAX_AMSDU; rtw_cfg80211_init_ht_capab_ex(padapter, ht_cap, band, rf_type); @@ -8900,18 +9296,11 @@ static void rtw_cfg80211_init_ht_capab(_adapter *padapter static void rtw_cfg80211_init_vht_capab(_adapter *padapter , struct ieee80211_sta_vht_cap *sta_vht_cap, BAND_TYPE band, u8 rf_type) { - struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); struct registry_priv *regsty = &padapter->registrypriv; - struct vht_priv *vhtpriv = &padapter->mlmepriv.vhtpriv; u8 vht_cap_ie[2 + 12] = {0}; - u8 bw; - if (!REGSTY_IS_11AC_ENABLE(regsty) - || !hal_chk_proto_cap(padapter, PROTO_CAP_11AC) - ) { - sta_vht_cap->vht_supported = 0; + if (!REGSTY_IS_11AC_ENABLE(regsty) || !is_supported_vht(regsty->wireless_mode)) return; - } rtw_vht_use_default_setting(padapter); rtw_build_vht_cap_ie(padapter, vht_cap_ie); @@ -8923,23 +9312,6 @@ static void rtw_cfg80211_init_vht_capab(_adapter *padapter } #endif /* defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) */ -static void rtw_cfg80211_create_vht_cap(struct ieee80211_sta_vht_cap *vht_cap) -{ - u16 mcs_map; - int i; - - vht_cap->vht_supported = 1; - vht_cap->cap = IEEE80211_VHT_CAP_RXLDPC; - - mcs_map = 0; - for (i = 0; i < 8; i++) { - mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i*2); - } - - vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map); - vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map); -} - void rtw_cfg80211_init_wdev_data(_adapter *padapter) { #ifdef CONFIG_CONCURRENT_MODE @@ -8955,7 +9327,6 @@ void rtw_cfg80211_init_wiphy(_adapter *padapter) struct ieee80211_supported_band *band; struct wireless_dev *pwdev = padapter->rtw_wdev; struct wiphy *wiphy = pwdev->wiphy; - struct ieee80211_sta_vht_cap *vht_cap; rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); @@ -8966,7 +9337,6 @@ void rtw_cfg80211_init_wiphy(_adapter *padapter) if (band) { #if defined(CONFIG_80211N_HT) rtw_cfg80211_init_ht_capab(padapter, &band->ht_cap, BAND_ON_2_4G, rf_type); - rtw_cfg80211_create_vht_cap(&band->vht_cap); #endif } } @@ -9074,6 +9444,13 @@ static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy) #endif ; +#if defined(CONFIG_ANDROID) && !defined(RTW_SINGLE_WIPHY) + if (is_primary_adapter(adapter)) { + wiphy->interface_modes &= ~(BIT(NL80211_IFTYPE_P2P_GO) | BIT(NL80211_IFTYPE_P2P_CLIENT)); + RTW_INFO("%s primary- don't set p2p capability\n", __func__); + } +#endif + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) #ifdef CONFIG_AP_MODE wiphy->mgmt_stypes = rtw_cfg80211_default_mgmt_stypes; @@ -9103,9 +9480,6 @@ static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy) #endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38) && LINUX_VERSION_CODE < KERNEL_VERSION(3, 0, 0)) -#if defined(CONFIG_NET_NS) - wiphy->flags |= WIPHY_FLAG_NETNS_OK; -#endif //CONFIG_NET_NS wiphy->flags |= WIPHY_FLAG_SUPPORTS_SEPARATE_DEFAULT_KEYS; #endif @@ -9170,6 +9544,10 @@ static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy) ; #endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) */ #endif /* CONFIG_RTW_MESH */ + +#if (KERNEL_VERSION(3, 8, 0) <= LINUX_VERSION_CODE) + wiphy->features |= NL80211_FEATURE_SAE; +#endif } #ifdef CONFIG_RFKILL_POLL @@ -9336,13 +9714,101 @@ int rtw_hostapd_acs_dump_survey(struct wiphy *wiphy, struct net_device *netdev, #elif defined(CONFIG_RTW_ACS) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) rtw_cfg80211_set_survey_info_with_clm(padapter, idx, info); #else - RTW_ERR("%s: unknown acs operation!\n", __func__); + RTW_ERR("%s: unknown acs operation!\n", __func__); #endif return ret; } #endif /* defined(CONFIG_RTW_HOSTAPD_ACS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 33)) */ +#if (KERNEL_VERSION(4, 17, 0) <= LINUX_VERSION_CODE) +int cfg80211_rtw_external_auth(struct wiphy *wiphy, struct net_device *dev, + struct cfg80211_external_auth_params *params) +{ + PADAPTER padapter = (_adapter *)rtw_netdev_priv(dev); + + RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(dev)); + + rtw_cfg80211_external_auth_status(wiphy, dev, + (struct rtw_external_auth_params *)params); + + return 0; +} +#endif + +void rtw_cfg80211_external_auth_status(struct wiphy *wiphy, struct net_device *dev, + struct rtw_external_auth_params *params) +{ + PADAPTER padapter = (_adapter *)rtw_netdev_priv(dev); + struct security_priv *psecuritypriv = &padapter->securitypriv; + struct sta_priv *pstapriv = &padapter->stapriv; + struct sta_info *psta = NULL; + u8 *buf = NULL; + u32 len = 0; + _irqL irqL; + + RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(dev)); + + RTW_INFO("SAE: action: %u, status: %u\n", params->action, params->status); + if (params->status == WLAN_STATUS_SUCCESS) { + RTW_INFO("bssid: "MAC_FMT"\n", MAC_ARG(params->bssid)); + RTW_INFO("SSID: [%s]\n", + ((params->ssid.ssid_len == 0) ? "" : (char *)params->ssid.ssid)); + RTW_INFO("suite: 0x%08x\n", params->key_mgmt_suite); + } + + psta = rtw_get_stainfo(pstapriv, params->bssid); + if (psta && (params->status == WLAN_STATUS_SUCCESS)) { + /* AP mode */ + RTW_INFO("station match\n"); + + psta->state &= ~WIFI_FW_AUTH_NULL; + psta->state |= WIFI_FW_AUTH_SUCCESS; + psta->expire_to = padapter->stapriv.assoc_to; + + if (params->pmkid != NULL) { + /* RTW_INFO_DUMP("PMKID:", params->pmkid, PMKID_LEN); */ + _rtw_set_pmksa(dev, params->bssid, params->pmkid); + } + + _enter_critical_bh(&psta->lock, &irqL); + if ((psta->auth_len != 0) && (psta->pauth_frame != NULL)) { + buf = rtw_zmalloc(psta->auth_len); + if (buf) { + _rtw_memcpy(buf, psta->pauth_frame, psta->auth_len); + len = psta->auth_len; + } + + rtw_mfree(psta->pauth_frame, psta->auth_len); + psta->pauth_frame = NULL; + psta->auth_len = 0; + } + _exit_critical_bh(&psta->lock, &irqL); + + if (buf) { + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + /* send the SAE auth Confirm */ + + rtw_ps_deny(padapter, PS_DENY_MGNT_TX); + if (_SUCCESS == rtw_pwr_wakeup(padapter)) { + rtw_mi_set_scan_deny(padapter, 1000); + rtw_mi_scan_abort(padapter, _TRUE); + + RTW_INFO("SAE: Tx auth Confirm\n"); + rtw_mgnt_tx_cmd(padapter, pmlmeext->cur_channel, 1, buf, len, 0, RTW_CMDF_DIRECTLY); + + rtw_mfree(buf, len); + buf = NULL; + len = 0; + } + rtw_ps_deny_cancel(padapter, PS_DENY_MGNT_TX); + } + } else { + /* STA mode */ + psecuritypriv->extauth_status = params->status; + } +} + static struct cfg80211_ops rtw_cfg80211_ops = { .change_virtual_intf = cfg80211_rtw_change_iface, .add_key = cfg80211_rtw_add_key, @@ -9392,6 +9858,9 @@ static struct cfg80211_ops rtw_cfg80211_ops = { .change_station = cfg80211_rtw_change_station, .dump_station = cfg80211_rtw_dump_station, .change_bss = cfg80211_rtw_change_bss, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) + .set_txq_params = cfg80211_rtw_set_txq_params, +#endif #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) .set_channel = cfg80211_rtw_set_channel, #endif @@ -9456,6 +9925,9 @@ static struct cfg80211_ops rtw_cfg80211_ops = { #if defined(CONFIG_RTW_HOSTAPD_ACS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 33)) .dump_survey = rtw_hostapd_acs_dump_survey, #endif +#if (KERNEL_VERSION(4, 17, 0) <= LINUX_VERSION_CODE) + .external_auth = cfg80211_rtw_external_auth, +#endif }; struct wiphy *rtw_wiphy_alloc(_adapter *padapter, struct device *dev) @@ -9551,9 +10023,7 @@ int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy) } wdev->wiphy = wiphy; wdev->netdev = pnetdev; - wdev->iftype = NL80211_IFTYPE_STATION; /* will be init in rtw_hal_init() */ - - /* wdev->iftype = NL80211_IFTYPE_MONITOR; */ /* for rtw_setopmode_cmd() in cfg80211_rtw_change_iface() */ + wdev->iftype = NL80211_IFTYPE_STATION; padapter->rtw_wdev = wdev; pnetdev->ieee80211_ptr = wdev; @@ -9587,6 +10057,13 @@ int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy) ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); #endif +#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR + pwdev_priv->rssi_monitor_enable = 0; + pwdev_priv->rssi_monitor_max = 0; + pwdev_priv->rssi_monitor_min = 0; +#endif + + exit: return ret; } @@ -9603,9 +10080,12 @@ void rtw_wdev_free(struct wireless_dev *wdev) struct rtw_wdev_priv *wdev_priv = adapter_wdev_data(adapter); _irqL irqL; + _rtw_spinlock_free(&wdev_priv->scan_req_lock); + _enter_critical_bh(&wdev_priv->connect_req_lock, &irqL); rtw_wdev_free_connect_req(wdev_priv); _exit_critical_bh(&wdev_priv->connect_req_lock, &irqL); + _rtw_spinlock_free(&wdev_priv->connect_req_lock); _rtw_mutex_free(&wdev_priv->roch_mutex); } @@ -9721,14 +10201,12 @@ int rtw_cfg80211_dev_res_alloc(struct dvobj_priv *dvobj) wiphy = rtw_wiphy_alloc(dvobj_get_primary_adapter(dvobj), dev); if (wiphy == NULL) - goto exit; + return ret; dvobj->wiphy = wiphy; #endif ret = _SUCCESS; - -exit: return ret; } @@ -9746,7 +10224,7 @@ int rtw_cfg80211_dev_res_register(struct dvobj_priv *dvobj) #if defined(RTW_SINGLE_WIPHY) if (rtw_wiphy_register(dvobj_to_wiphy(dvobj)) != 0) - goto exit; + return ret; #ifdef CONFIG_RFKILL_POLL rtw_cfg80211_init_rfkill(dvobj_to_wiphy(dvobj)); @@ -9755,7 +10233,6 @@ int rtw_cfg80211_dev_res_register(struct dvobj_priv *dvobj) ret = _SUCCESS; -exit: return ret; } diff --git a/os_dep/linux/ioctl_cfg80211.h b/os_dep/linux/ioctl_cfg80211.h index 14684a4..cfbe9cd 100644 --- a/os_dep/linux/ioctl_cfg80211.h +++ b/os_dep/linux/ioctl_cfg80211.h @@ -180,6 +180,31 @@ struct rtw_wdev_priv { ATOMIC_T switch_ch_to; #endif +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + u8 pno_mac_addr[ETH_ALEN]; + u16 pno_scan_seq_num; +#endif + +#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR + s8 rssi_monitor_max; + s8 rssi_monitor_min; + u8 rssi_monitor_enable; +#endif + +}; + +enum external_auth_action { + EXTERNAL_AUTH_START, + EXTERNAL_AUTH_ABORT, +}; + +struct rtw_external_auth_params { + enum external_auth_action action; + u8 bssid[ETH_ALEN]__aligned(2); + struct cfg80211_ssid ssid; + unsigned int key_mgmt_suite; + u16 status; + u8 pmkid[PMKID_LEN]; }; bool rtw_cfg80211_is_connect_requested(_adapter *adapter); @@ -235,7 +260,8 @@ struct rtw_wiphy_data { #define FUNC_WIPHY_FMT "%s("WIPHY_FMT")" #define FUNC_WIPHY_ARG(wiphy) __func__, WIPHY_ARG(wiphy) -#define SET_CFG80211_REPORT_MGMT(w, t, v) (w->report_mgmt |= (v ? BIT(t >> 4) : 0)) +#define SET_CFG80211_REPORT_MGMT(w, t, v) (w->report_mgmt |= BIT(t >> 4)) +#define CLR_CFG80211_REPORT_MGMT(w, t, v) (w->report_mgmt &= (~BIT(t >> 4))) #define GET_CFG80211_REPORT_MGMT(w, t) ((w->report_mgmt & BIT(t >> 4)) > 0) struct wiphy *rtw_wiphy_alloc(_adapter *padapter, struct device *dev); @@ -309,6 +335,10 @@ void rtw_cfg80211_rx_action(_adapter *adapter, union recv_frame *rframe, const c void rtw_cfg80211_rx_mframe(_adapter *adapter, union recv_frame *rframe, const char *msg); void rtw_cfg80211_rx_probe_request(_adapter *padapter, union recv_frame *rframe); +void rtw_cfg80211_external_auth_request(_adapter *padapter, union recv_frame *rframe); +void rtw_cfg80211_external_auth_status(struct wiphy *wiphy, struct net_device *dev, + struct rtw_external_auth_params *params); + int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type); bool rtw_cfg80211_pwr_mgmt(_adapter *adapter); @@ -372,8 +402,10 @@ void rtw_cfg80211_deinit_rfkill(struct wiphy *wiphy); #endif #endif -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -#define rtw_cfg80211_notify_new_peer_candidate(wdev, addr, ie, ie_len, gfp) cfg80211_notify_new_peer_candidate(wdev_to_ndev(wdev), addr, ie, ie_len, gfp) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)) +#define rtw_cfg80211_notify_new_peer_candidate(wdev, addr, ie, ie_len, sig_dbm, gfp) cfg80211_notify_new_peer_candidate(wdev_to_ndev(wdev), addr, ie, ie_len, sig_dbm, gfp) +#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) +#define rtw_cfg80211_notify_new_peer_candidate(wdev, addr, ie, ie_len, sig_dbm, gfp) cfg80211_notify_new_peer_candidate(wdev_to_ndev(wdev), addr, ie, ie_len, gfp) #endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) diff --git a/os_dep/linux/ioctl_linux.c b/os_dep/linux/ioctl_linux.c index 35421a7..fd8939b 100644 --- a/os_dep/linux/ioctl_linux.c +++ b/os_dep/linux/ioctl_linux.c @@ -16,7 +16,6 @@ #include #include -#include #include "../../hal/phydm/phydm_precomp.h" #ifdef RTW_HALMAC #include "../../hal/hal_halmac.h" @@ -37,6 +36,7 @@ extern int rtw_ht_enable; #define SCAN_ITEM_SIZE 768 #define MAX_CUSTOM_LEN 64 #define RATE_COUNT 4 +#define MAX_SCAN_BUFFER_LEN 65535 #ifdef CONFIG_GLOBAL_UI_PID extern int ui_pid[3]; @@ -94,10 +94,10 @@ static int hwaddr_aton_i(const char *txt, u8 *addr) return 0; } - +#ifdef CONFIG_ANDROID static void indicate_wx_custom_event(_adapter *padapter, char *msg) { - u8 *buff, *p; + u8 *buff; union iwreq_data wrqu; if (strlen(msg) > IW_CUSTOM_MAX) { @@ -122,8 +122,9 @@ static void indicate_wx_custom_event(_adapter *padapter, char *msg) rtw_mfree(buff, IW_CUSTOM_MAX + 1); } +#endif - +#if 0 static void request_wps_pbc_event(_adapter *padapter) { u8 *buff, *p; @@ -156,6 +157,7 @@ static void request_wps_pbc_event(_adapter *padapter) rtw_mfree(buff, IW_CUSTOM_MAX); } +#endif #ifdef CONFIG_SUPPORT_HW_WPS_PBC void rtw_request_wps_pbc_event(_adapter *padapter) @@ -184,7 +186,6 @@ void rtw_request_wps_pbc_event(_adapter *padapter) void indicate_wx_scan_complete_event(_adapter *padapter) { union iwreq_data wrqu; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _rtw_memset(&wrqu, 0, sizeof(union iwreq_data)); @@ -420,16 +421,22 @@ static inline char *iwe_stream_protocol_process(_adapter *padapter, char *p; u8 ie_offset = (pnetwork->network.Reserved[0] == BSS_TYPE_PROB_REQ ? 0 : 12); /* Probe Request */ +#ifdef CONFIG_80211N_HT /* parsing HT_CAP_IE */ - p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength - ie_offset); - if (p && ht_ielen > 0) - ht_cap = _TRUE; + if(padapter->registrypriv.ht_enable && is_supported_ht(padapter->registrypriv.wireless_mode)) { + p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength - ie_offset); + if (p && ht_ielen > 0) + ht_cap = _TRUE; + } +#endif #ifdef CONFIG_80211AC_VHT /* parsing VHT_CAP_IE */ - p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], EID_VHTCapability, &vht_ielen, pnetwork->network.IELength - ie_offset); - if (p && vht_ielen > 0) - vht_cap = _TRUE; + if(padapter->registrypriv.wireless_mode & WIRELESS_11AC) { + p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], EID_VHTCapability, &vht_ielen, pnetwork->network.IELength - ie_offset); + if (p && vht_ielen > 0) + vht_cap = _TRUE; + } #endif /* Add the protocol name */ iwe->cmd = SIOCGIWNAME; @@ -481,33 +488,36 @@ static inline char *iwe_stream_rate_process(_adapter *padapter, u8 ie_offset = (pnetwork->network.Reserved[0] == BSS_TYPE_PROB_REQ ? 0 : 12); /* Probe Request */ /* parsing HT_CAP_IE */ - p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength - ie_offset); - if (p && ht_ielen > 0) { - struct rtw_ieee80211_ht_cap *pht_capie; - ht_cap = _TRUE; - pht_capie = (struct rtw_ieee80211_ht_cap *)(p + 2); - _rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2); - bw_40MHz = (pht_capie->cap_info & IEEE80211_HT_CAP_SUP_WIDTH) ? 1 : 0; - short_GI = (pht_capie->cap_info & (IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_SGI_40)) ? 1 : 0; + if(is_supported_ht(padapter->registrypriv.wireless_mode)) { + p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength - ie_offset); + if (p && ht_ielen > 0) { + struct rtw_ieee80211_ht_cap *pht_capie; + ht_cap = _TRUE; + pht_capie = (struct rtw_ieee80211_ht_cap *)(p + 2); + _rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2); + bw_40MHz = (pht_capie->cap_info & IEEE80211_HT_CAP_SUP_WIDTH) ? 1 : 0; + short_GI = (pht_capie->cap_info & (IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_SGI_40)) ? 1 : 0; + } } - #ifdef CONFIG_80211AC_VHT /* parsing VHT_CAP_IE */ - p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], EID_VHTCapability, &vht_ielen, pnetwork->network.IELength - ie_offset); - if (p && vht_ielen > 0) { - u8 mcs_map[2]; + if(padapter->registrypriv.wireless_mode & WIRELESS_11AC){ + p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], EID_VHTCapability, &vht_ielen, pnetwork->network.IELength - ie_offset); + if (p && vht_ielen > 0) { + u8 mcs_map[2]; - vht_cap = _TRUE; - bw_160MHz = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(p + 2); - if (bw_160MHz) - short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI160M(p + 2); - else - short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI80M(p + 2); + vht_cap = _TRUE; + bw_160MHz = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(p + 2); + if (bw_160MHz) + short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI160M(p + 2); + else + short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI80M(p + 2); - _rtw_memcpy(mcs_map, GET_VHT_CAPABILITY_ELE_TX_MCS(p + 2), 2); + _rtw_memcpy(mcs_map, GET_VHT_CAPABILITY_ELE_TX_MCS(p + 2), 2); - vht_highest_rate = rtw_get_vht_highest_rate(mcs_map); - vht_data_rate = rtw_vht_mcs_to_data_rate(CHANNEL_WIDTH_80, short_GI, vht_highest_rate); + vht_highest_rate = rtw_get_vht_highest_rate(mcs_map); + vht_data_rate = rtw_vht_mcs_to_data_rate(CHANNEL_WIDTH_80, short_GI, vht_highest_rate); + } } #endif @@ -697,8 +707,10 @@ static inline char *iwe_stream_rssi_process(_adapter *padapter, char *start, char *stop, struct iw_event *iwe) { u8 ss, sq; - s16 noise = 0; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +#ifdef CONFIG_BACKGROUND_NOISE_MONITOR + s16 noise = 0; +#endif /* Add quality statistics */ iwe->cmd = IWEVQUAL; @@ -726,17 +738,7 @@ static inline char *iwe_stream_rssi_process(_adapter *padapter, #ifdef CONFIG_SIGNAL_DISPLAY_DBM iwe->u.qual.level = (u8) translate_percentage_to_dbm(ss); /* dbm */ #else -#ifdef CONFIG_SIGNAL_SCALE_MAPPING iwe->u.qual.level = (u8)ss; /* % */ -#else - { - /* Do signal scale mapping when using percentage as the unit of signal strength, since the scale mapping is skipped in odm */ - - HAL_DATA_TYPE *pHal = GET_HAL_DATA(padapter); - - iwe->u.qual.level = (u8)phydm_signal_scale_mapping(&pHal->odmpriv, ss); - } -#endif #endif iwe->u.qual.qual = (u8)sq; /* signal quality */ @@ -769,7 +771,6 @@ static inline char *iwe_stream_net_rsv_process(_adapter *padapter, { u8 buf[32] = {0}; u8 *p, *pos; - int len; p = buf; pos = pnetwork->network.Reserved; @@ -863,7 +864,7 @@ static int wpa_set_auth_algs(struct net_device *dev, u32 value) static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) { int ret = 0; - u32 wep_key_idx, wep_key_len, wep_total_len; + u32 wep_key_idx, wep_key_len; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; @@ -1006,6 +1007,8 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); #endif /* CONFIG_P2P */ + /* WPA/WPA2 key-handshake has completed */ + clr_fwstate(pmlmepriv, WIFI_UNDER_KEY_HANDSHAKE); } } @@ -1039,7 +1042,6 @@ exit: static int rtw_set_wpa_ie(_adapter *padapter, char *pie, unsigned short ielen) { u8 *buf = NULL, *pos = NULL; - u32 left; int group_cipher = 0, pairwise_cipher = 0; u8 mfp_opt = MFP_NO; int ret = 0; @@ -1202,7 +1204,6 @@ static int rtw_wx_get_name(struct net_device *dev, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - u16 cap; u32 ht_ielen = 0; char *p; u8 ht_cap = _FALSE, vht_cap = _FALSE; @@ -1214,17 +1215,18 @@ static int rtw_wx_get_name(struct net_device *dev, if (check_fwstate(pmlmepriv, _FW_LINKED | WIFI_ADHOC_MASTER_STATE) == _TRUE) { /* parsing HT_CAP_IE */ - p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength - 12); - if (p && ht_ielen > 0) - ht_cap = _TRUE; - + if( is_supported_ht(padapter->registrypriv.wireless_mode)&&(padapter->registrypriv.ht_enable)) { + p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength - 12); + if (p && ht_ielen > 0 ) + ht_cap = _TRUE; + } #ifdef CONFIG_80211AC_VHT - if (pmlmepriv->vhtpriv.vht_option == _TRUE) + if ((padapter->registrypriv.wireless_mode & WIRELESS_11AC) && + (pmlmepriv->vhtpriv.vht_option == _TRUE)) vht_cap = _TRUE; #endif prates = &pcur_bss->SupportedRates; - if (rtw_is_cckratesonly_included((u8 *)prates) == _TRUE) { if (ht_cap == _TRUE) snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bn"); @@ -1233,8 +1235,12 @@ static int rtw_wx_get_name(struct net_device *dev, } else if ((rtw_is_cckrates_included((u8 *)prates)) == _TRUE) { if (ht_cap == _TRUE) snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bgn"); - else - snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bg"); + else { + if(padapter->registrypriv.wireless_mode & WIRELESS_11G) + snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bg"); + else + snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11b"); + } } else { if (pcur_bss->Configuration.DSConfig > 14) { #ifdef CONFIG_80211AC_VHT @@ -1271,12 +1277,8 @@ static int rtw_wx_set_freq(struct net_device *dev, { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct wlan_network *cur_network = &(pmlmepriv->cur_network); int exp = 1, freq = 0, div = 0; - rtw_ps_deny(padapter, PS_DENY_IOCTL); if (rtw_pwr_wakeup(padapter) == _FALSE) goto exit; @@ -1469,7 +1471,6 @@ static int rtw_wx_set_pmkid(struct net_device *dev, _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u8 j, blInserted = _FALSE; int intReturn = _FALSE; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; struct iw_pmksa *pPMK = (struct iw_pmksa *) extra; u8 strZeroMacAddress[ETH_ALEN] = { 0x00 }; @@ -1578,8 +1579,6 @@ static int rtw_wx_get_range(struct net_device *dev, struct iw_range *range = (struct iw_range *)extra; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - u16 val; int i; @@ -1620,7 +1619,6 @@ static int rtw_wx_get_range(struct net_device *dev, * If percentage range is 0~100 * Signal strength dbm range logical is -100 ~ 0 * but usually value is -90 ~ -20 - * When CONFIG_SIGNAL_SCALE_MAPPING is defined, dbm range is -95 ~ -45 */ range->max_qual.qual = 100; #ifdef CONFIG_SIGNAL_DISPLAY_DBM @@ -1841,7 +1839,9 @@ static int rtw_wx_set_wap(struct net_device *dev, cancel_ps_deny: rtw_ps_deny_cancel(padapter, PS_DENY_JOIN); +#ifdef CONFIG_CONCURRENT_MODE exit: +#endif return ret; } @@ -1930,18 +1930,53 @@ static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a, u8 _status = _FALSE; int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + /*struct mlme_priv *pmlmepriv = &padapter->mlmepriv;*/ struct sitesurvey_parm parm; - + u8 ssc_chk; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); #endif /* CONFIG_P2P */ - #ifdef DBG_IOCTL RTW_INFO("DBG_IOCTL %s:%d\n", __FUNCTION__, __LINE__); #endif +#if 1 + ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE); + + #ifdef CONFIG_DOSCAN_IN_BUSYTRAFFIC + if ((ssc_chk != SS_ALLOW) && (ssc_chk != SS_DENY_BUSY_TRAFFIC)) + #else + /* When Busy Traffic, driver do not site survey. So driver return success. */ + /* wpa_supplicant will not issue SIOCSIWSCAN cmd again after scan timeout. */ + /* modify by thomas 2011-02-22. */ + if (ssc_chk != SS_ALLOW) + #endif + { + if (ssc_chk == SS_DENY_MP_MODE) + ret = -EPERM; + #ifdef DBG_LA_MODE + else if (ssc_chk == SS_DENY_LA_MODE) + ret = -EPERM; + #endif + else + indicate_wx_scan_complete_event(padapter); + + goto exit; + } else + RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); + + rtw_ps_deny(padapter, PS_DENY_SCAN); + if (_FAIL == rtw_pwr_wakeup(padapter)) { + ret = -1; + goto cancel_ps_deny; + } + if (!rtw_is_adapter_up(padapter)) { + ret = -1; + goto cancel_ps_deny; + } +#else + #ifdef CONFIG_MP_INCLUDED if (rtw_mp_mode_check(padapter)) { RTW_INFO("MP mode block Scan request\n"); @@ -2000,6 +2035,7 @@ static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a, goto cancel_ps_deny; } #endif +#endif #ifdef CONFIG_P2P if (pwdinfo->p2p_state != P2P_STATE_NONE) { @@ -2141,15 +2177,17 @@ static int rtw_wx_get_scan(struct net_device *dev, struct iw_request_info *a, _irqL irqL; _list *plist, *phead; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); + RT_CHANNEL_INFO *chset = rfctl->channel_set; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; char *ev = extra; char *stop = ev + wrqu->data.length; u32 ret = 0; - u32 cnt = 0; u32 wait_for_surveydone; sint wait_status; + u8 ch; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &padapter->wdinfo; @@ -2211,17 +2249,26 @@ static int rtw_wx_get_scan(struct net_device *dev, struct iw_request_info *a, break; if ((stop - ev) < SCAN_ITEM_SIZE) { + if(wrqu->data.length == MAX_SCAN_BUFFER_LEN){ /*max buffer len defined by iwlist*/ + ret = 0; + RTW_INFO("%s: Scan results incomplete\n", __FUNCTION__); + break; + } ret = -E2BIG; break; } pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); + ch = pnetwork->network.Configuration.DSConfig; /* report network only if the current channel set contains the channel to which this network belongs */ - if (rtw_chset_search_ch(adapter_to_chset(padapter), pnetwork->network.Configuration.DSConfig) >= 0 - && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE - && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) - ) + if (rtw_chset_search_ch(chset, ch) >= 0 + && rtw_mlme_band_check(padapter, ch) == _TRUE + && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) + && (!IS_DFS_SLAVE_WITH_RD(rfctl) + || rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl)) + || !rtw_chset_is_ch_non_ocp(chset, ch)) + ) ev = translate_scan(padapter, a, pnetwork, ev, stop); plist = get_next(plist); @@ -2258,7 +2305,6 @@ static int rtw_wx_set_essid(struct net_device *dev, struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _queue *queue = &pmlmepriv->scanned_queue; _list *phead; - s8 status = _TRUE; struct wlan_network *pnetwork = NULL; NDIS_802_11_AUTHENTICATION_MODE authmode; NDIS_802_11_SSID ndis_ssid; @@ -2899,11 +2945,14 @@ static int rtw_wx_set_auth(struct net_device *dev, { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_param *param = (struct iw_param *)&(wrqu->param); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct security_priv *psecuritypriv = &padapter->securitypriv; +#ifdef CONFIG_WAPI_SUPPORT +#ifndef CONFIG_IOCTL_CFG80211 struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct security_priv *psecuritypriv = &padapter->securitypriv; u32 value = param->value; +#endif +#endif int ret = 0; switch (param->flags & IW_AUTH_INDEX) { @@ -2996,7 +3045,7 @@ static int rtw_wx_set_auth(struct net_device *dev, rtw_disassoc_cmd(padapter, 500, RTW_CMDF_WAIT_ACK); RTW_INFO("%s...call rtw_indicate_disconnect\n ", __FUNCTION__); rtw_indicate_disconnect(padapter, 0, _FALSE); - rtw_free_assoc_resources_cmd(padapter, _TRUE); + rtw_free_assoc_resources_cmd(padapter, _TRUE, RTW_CMDF_WAIT_ACK); } #endif @@ -3401,7 +3450,6 @@ static int rtw_wx_set_channel_plan(struct net_device *dev, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; u8 channel_plan_req = (u8)(*((int *)wrqu)); if (_SUCCESS != rtw_set_channel_plan(padapter, channel_plan_req)) @@ -3450,6 +3498,7 @@ static int rtw_wx_set_mtk_wps_ie(struct net_device *dev, #endif } +#ifdef MP_IOCTL_HDL static void rtw_dbg_mode_hdl(_adapter *padapter, u32 id, u8 *pdata, u32 len) { pRW_Reg RegRWStruct; @@ -3546,7 +3595,6 @@ static void rtw_dbg_mode_hdl(_adapter *padapter, u32 id, u8 *pdata, u32 len) } } -#ifdef MP_IOCTL_HDL static int rtw_mp_ioctl_hdl(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { @@ -3655,12 +3703,12 @@ _rtw_mp_ioctl_hdl_exit: return ret; } -#endif +#endif /*MP_IOCTL_HDL*/ static int rtw_get_ap_info(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { - int bssid_match, ret = 0; + int ret = 0; u32 cnt = 0, wpa_ielen; _irqL irqL; _list *plist, *phead; @@ -3816,10 +3864,6 @@ static int rtw_wps_start(struct net_device *dev, else if (u32wps_start == 3) /* WPS Stop because of wps fail */ rtw_led_control(padapter, LED_CTL_STOP_WPS_FAIL); -#ifdef CONFIG_INTEL_WIDI - process_intel_widi_wps_status(padapter, u32wps_start); -#endif /* CONFIG_INTEL_WIDI */ - exit: return ret; @@ -3834,8 +3878,6 @@ static int rtw_wext_p2p_enable(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; enum P2P_ROLE init_role = P2P_ROLE_DISABLE; @@ -3901,8 +3943,6 @@ static int rtw_p2p_set_go_nego_ssid(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); RTW_INFO("[%s] ssid = %s, len = %zu\n", __FUNCTION__, extra, strlen(extra)); @@ -4067,7 +4107,6 @@ static int rtw_p2p_get_status(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); if (padapter->bShowGetP2PState) { @@ -4098,7 +4137,6 @@ static int rtw_p2p_get_req_cm(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); sprintf(extra, "\n\nCM=%s\n", pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req); @@ -4115,10 +4153,8 @@ static int rtw_p2p_get_role(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); - RTW_INFO("[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), pwdinfo->p2p_peer_interface_addr[0], pwdinfo->p2p_peer_interface_addr[1], pwdinfo->p2p_peer_interface_addr[2], pwdinfo->p2p_peer_interface_addr[3], pwdinfo->p2p_peer_interface_addr[4], pwdinfo->p2p_peer_interface_addr[5]); @@ -4137,7 +4173,6 @@ static int rtw_p2p_get_peer_ifaddr(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); @@ -4161,7 +4196,6 @@ static int rtw_p2p_get_peer_devaddr(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); RTW_INFO("[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), @@ -4185,7 +4219,6 @@ static int rtw_p2p_get_peer_devaddr_by_invitation(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); RTW_INFO("[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), @@ -4209,7 +4242,6 @@ static int rtw_p2p_get_groupid(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); sprintf(extra, "\n%.2X:%.2X:%.2X:%.2X:%.2X:%.2X %s", @@ -4230,7 +4262,6 @@ static int rtw_p2p_get_op_ch(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); @@ -4322,7 +4353,6 @@ static int rtw_p2p_get_peer_wfd_port(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); RTW_INFO("[%s] p2p_state = %d\n", __FUNCTION__, rtw_p2p_state(pwdinfo)); @@ -4342,7 +4372,6 @@ static int rtw_p2p_get_peer_wfd_preferred_connection(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); sprintf(extra, "\n\nwfd_pc=%d\n", pwdinfo->wfd_info->wfd_pc); @@ -4361,7 +4390,6 @@ static int rtw_p2p_get_peer_wfd_session_available(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); sprintf(extra, "\n\nwfd_sa=%d\n", pwdinfo->wfd_info->peer_session_avail); @@ -4695,7 +4723,6 @@ static int rtw_p2p_connect(struct net_device *dev, struct wifidirect_info *pwdinfo = &(padapter->wdinfo); u8 peerMAC[ETH_ALEN] = { 0x00 }; int jj, kk; - u8 peerMACStr[ETH_ALEN * 2] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _irqL irqL; _list *plist, *phead; @@ -4717,13 +4744,6 @@ static int rtw_p2p_connect(struct net_device *dev, return ret; } -#ifdef CONFIG_INTEL_WIDI - if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { - RTW_INFO("[%s] WiFi is under survey!\n", __FUNCTION__); - return ret; - } -#endif /* CONFIG_INTEL_WIDI */ - if (pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO) return -1; @@ -4805,22 +4825,9 @@ static int rtw_p2p_connect(struct net_device *dev, } else { RTW_INFO("[%s] Not Found in Scanning Queue~\n", __FUNCTION__); -#ifdef CONFIG_INTEL_WIDI - _cancel_timer_ex(&pwdinfo->restore_p2p_state_timer); - rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); - rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); - rtw_free_network_queue(padapter, _TRUE); - /** - * For WiDi, if we can't find candidate device in scanning queue, - * driver will do scanning itself - */ - _enter_critical_bh(&pmlmepriv->lock, &irqL); - rtw_sitesurvey_cmd(padapter, NULL); - _exit_critical_bh(&pmlmepriv->lock, &irqL); -#endif /* CONFIG_INTEL_WIDI */ ret = -1; } -exit: + return ret; } @@ -4831,16 +4838,14 @@ static int rtw_p2p_invite_req(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); int jj, kk; - u8 peerMACStr[ETH_ALEN * 2] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _list *plist, *phead; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; uint uintPeerChannel = 0; - u8 attr_content[50] = { 0x00 }, _status = 0; + u8 attr_content[50] = { 0x00 }; u8 *p2pie; uint p2pielen = 0, attr_contentlen = 0; _irqL irqL; @@ -5014,20 +5019,7 @@ static int rtw_p2p_set_persistent(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); - int jj, kk; - u8 peerMACStr[ETH_ALEN * 2] = { 0x00 }; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - _list *plist, *phead; - _queue *queue = &(pmlmepriv->scanned_queue); - struct wlan_network *pnetwork = NULL; - uint uintPeerChannel = 0; - u8 attr_content[50] = { 0x00 }, _status = 0; - u8 *p2pie; - uint p2pielen = 0, attr_contentlen = 0; - _irqL irqL; - struct tx_invite_req_info *pinvite_req_info = &pwdinfo->invitereq_info; /* Commented by Albert 20120328 */ /* The input data is 0 or 1 */ @@ -5049,8 +5041,6 @@ static int rtw_p2p_set_persistent(struct net_device *dev, } printk("[%s] persistent_supported = %d\n", __FUNCTION__, pwdinfo->persistent_supported); -exit: - return ret; } @@ -5118,16 +5108,14 @@ static int rtw_p2p_set_pc(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); u8 peerMAC[ETH_ALEN] = { 0x00 }; int jj, kk; - u8 peerMACStr[ETH_ALEN * 2] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _list *plist, *phead; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; - u8 attr_content[50] = { 0x00 }, _status = 0; + u8 attr_content[50] = { 0x00 }; u8 *p2pie; uint p2pielen = 0, attr_contentlen = 0; _irqL irqL; @@ -5221,8 +5209,6 @@ static int rtw_p2p_set_pc(struct net_device *dev, } else RTW_INFO("[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__); -exit: - return ret; } @@ -5234,7 +5220,6 @@ static int rtw_p2p_set_wfd_device_type(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); struct wifi_display_info *pwfd_info = pwdinfo->wfd_info; @@ -5250,8 +5235,6 @@ static int rtw_p2p_set_wfd_device_type(struct net_device *dev, else /* Set to Miracast sink device. */ pwfd_info->wfd_device_type = WFD_DEVINFO_PSINK; -exit: - return ret; } @@ -5308,9 +5291,7 @@ static int rtw_p2p_set_sa(struct net_device *dev, int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); - struct wifi_display_info *pwfd_info = pwdinfo->wfd_info; RTW_INFO("[%s] data = %s\n", __FUNCTION__, extra); @@ -5327,8 +5308,6 @@ static int rtw_p2p_set_sa(struct net_device *dev, } printk("[%s] session available = %d\n", __FUNCTION__, pwdinfo->session_available); -exit: - return ret; } @@ -5343,13 +5322,12 @@ static int rtw_p2p_prov_disc(struct net_device *dev, struct wifidirect_info *pwdinfo = &(padapter->wdinfo); u8 peerMAC[ETH_ALEN] = { 0x00 }; int jj, kk; - u8 peerMACStr[ETH_ALEN * 2] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _list *plist, *phead; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; uint uintPeerChannel = 0; - u8 attr_content[100] = { 0x00 }, _status = 0; + u8 attr_content[100] = { 0x00 }; u8 *p2pie; uint p2pielen = 0, attr_contentlen = 0; _irqL irqL; @@ -5369,13 +5347,6 @@ static int rtw_p2p_prov_disc(struct net_device *dev, RTW_INFO("[%s] WiFi Direct is disable!\n", __FUNCTION__); return ret; } else { -#ifdef CONFIG_INTEL_WIDI - if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { - RTW_INFO("[%s] WiFi is under survey!\n", __FUNCTION__); - return ret; - } -#endif /* CONFIG_INTEL_WIDI */ - /* Reset the content of struct tx_provdisc_req_info excluded the wps_config_method_request. */ _rtw_memset(pwdinfo->tx_prov_disc_info.peerDevAddr, 0x00, ETH_ALEN); _rtw_memset(pwdinfo->tx_prov_disc_info.peerIFAddr, 0x00, ETH_ALEN); @@ -5445,18 +5416,6 @@ static int rtw_p2p_prov_disc(struct net_device *dev, } -#ifdef CONFIG_INTEL_WIDI - /* Some Intel WiDi source may not provide P2P IE, */ - /* so we could only compare mac addr by 802.11 Source Address */ - if (pmlmepriv->widi_state == INTEL_WIDI_STATE_WFD_CONNECTION - && uintPeerChannel == 0) { - if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) { - uintPeerChannel = pnetwork->network.Configuration.DSConfig; - break; - } - } -#endif /* CONFIG_INTEL_WIDI */ - plist = get_next(plist); } @@ -5545,15 +5504,6 @@ static int rtw_p2p_prov_disc(struct net_device *dev, } else { RTW_INFO("[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__); -#ifdef CONFIG_INTEL_WIDI - _cancel_timer_ex(&pwdinfo->restore_p2p_state_timer); - rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); - rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); - rtw_free_network_queue(padapter, _TRUE); - _enter_critical_bh(&pmlmepriv->lock, &irqL); - rtw_sitesurvey_cmd(padapter, NULL); - _exit_critical_bh(&pmlmepriv->lock, &irqL); -#endif /* CONFIG_INTEL_WIDI */ } exit: @@ -5603,15 +5553,9 @@ static int rtw_p2p_set(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { - int ret = 0; #ifdef CONFIG_P2P - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct iw_point *pdata = &wrqu->data; - struct wifidirect_info *pwdinfo = &(padapter->wdinfo); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; RTW_INFO("[%s] extra = %s\n", __FUNCTION__, extra); @@ -5697,16 +5641,9 @@ static int rtw_p2p_get(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { - int ret = 0; - #ifdef CONFIG_P2P - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct iw_point *pdata = &wrqu->data; - struct wifidirect_info *pwdinfo = &(padapter->wdinfo); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if (padapter->bShowGetP2PState) RTW_INFO("[%s] extra = %s\n", __FUNCTION__, (char *) wrqu->data.pointer); @@ -5887,11 +5824,7 @@ exit: #ifdef DBG_CMD_QUEUE u8 dump_cmd_id = 0; #endif -/* -#ifdef DBG_DUMP_TSF_BY_PORT -extern void get_tsf_by_port(_adapter *adapter, u8 *tsftr, u8 hw_port); -#endif -*/ + static int rtw_dbg_port(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) @@ -6175,11 +6108,6 @@ static int rtw_dbg_port(struct net_device *dev, psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus); break; - case 0x02: - RTW_INFO("pmlmeinfo->state=0x%x\n", pmlmeinfo->state); - RTW_INFO("DrvBcnEarly=%d\n", pmlmeext->DrvBcnEarly); - RTW_INFO("DrvBcnTimeOut=%d\n", pmlmeext->DrvBcnTimeOut); - break; case 0x03: RTW_INFO("qos_option=%d\n", pmlmepriv->qospriv.qos_option); #ifdef CONFIG_80211N_HT @@ -6218,12 +6146,10 @@ static int rtw_dbg_port(struct net_device *dev, RTW_INFO("can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress)); break; case 0x06: { - #ifdef DBG_DUMP_TSF_BY_PORT u64 tsf = 0; - get_tsf_by_port(padapter, (u8 *)&tsf, extra_arg); - RTW_INFO(" PORT-%d TSF :%lld\n", extra_arg, tsf); - #endif + tsf = rtw_hal_get_tsftr_by_port(padapter, extra_arg); + RTW_INFO(" PORT-%d TSF :%21lld\n", extra_arg, tsf); } break; case 0x07: @@ -6580,9 +6506,6 @@ static int rtw_dbg_port(struct net_device *dev, { if (arg == 0xAA) { u8 page_offset, page_num; - u32 page_size = 0; - u8 *buffer = NULL; - u32 buf_size = 0; page_offset = (u8)(extra_arg >> 16); page_num = (u8)(extra_arg & 0xFF); @@ -6735,7 +6658,6 @@ static int rtw_dbg_port(struct net_device *dev, static int wpa_set_param(struct net_device *dev, u8 name, u32 value) { uint ret = 0; - u32 flags; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); switch (name) { @@ -7177,9 +7099,16 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, psta->dot11txpn.val = RTW_GET_LE64(param->u.crypt.seq); psta->dot11rxpn.val = RTW_GET_LE64(param->u.crypt.seq); psta->ieee8021x_blocked = _FALSE; - psta->bpairwise_key_installed = _TRUE; - rtw_ap_set_pairwise_key(padapter, psta); + if (psta->dot118021XPrivacy != _NO_PRIVACY_) { + psta->bpairwise_key_installed = _TRUE; + + /* WPA2 key-handshake has completed */ + if (psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) + psta->state &= (~WIFI_UNDER_KEY_HANDSHAKE); + } + + rtw_ap_set_pairwise_key(padapter, psta); } else { RTW_WARN(FUNC_ADPT_FMT" set group key of "MAC_FMT", not support\n" , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)); @@ -7250,7 +7179,6 @@ static int rtw_hostapd_sta_flush(struct net_device *dev) static int rtw_add_sta(struct net_device *dev, struct ieee_param *param) { - _irqL irqL; int ret = 0; struct sta_info *psta = NULL; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); @@ -7302,7 +7230,9 @@ static int rtw_add_sta(struct net_device *dev, struct ieee_param *param) #ifdef CONFIG_80211N_HT /* chec 802.11n ht cap. */ - if (WLAN_STA_HT & flags) { + if (padapter->registrypriv.ht_enable && + is_supported_ht(padapter->registrypriv.wireless_mode) && + (WLAN_STA_HT & flags)) { psta->htpriv.ht_option = _TRUE; psta->qos_option = 1; _rtw_memcpy((void *)&psta->htpriv.ht_cap, (void *)¶m->u.add_sta.ht_cap, sizeof(struct rtw_ieee80211_ht_cap)); @@ -7311,6 +7241,7 @@ static int rtw_add_sta(struct net_device *dev, struct ieee_param *param) if (pmlmepriv->htpriv.ht_option == _FALSE) psta->htpriv.ht_option = _FALSE; + #endif @@ -7435,7 +7366,8 @@ static int rtw_ioctl_get_sta_data(struct net_device *dev, struct ieee_param *par psta_data->tx_supp_rates_len = psta->bssratelen; _rtw_memcpy(psta_data->tx_supp_rates, psta->bssrateset, psta->bssratelen); #ifdef CONFIG_80211N_HT - _rtw_memcpy(&psta_data->ht_cap, &psta->htpriv.ht_cap, sizeof(struct rtw_ieee80211_ht_cap)); + if(padapter->registrypriv.ht_enable && is_supported_ht(padapter->registrypriv.wireless_mode)) + _rtw_memcpy(&psta_data->ht_cap, &psta->htpriv.ht_cap, sizeof(struct rtw_ieee80211_ht_cap)); #endif /* CONFIG_80211N_HT */ psta_data->rx_pkts = psta->sta_stats.rx_data_pkts; psta_data->rx_bytes = psta->sta_stats.rx_bytes; @@ -7502,7 +7434,6 @@ static int rtw_set_wps_beacon(struct net_device *dev, struct ieee_param *param, _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); int ie_len; RTW_INFO("%s, len=%d\n", __FUNCTION__, len); @@ -7871,7 +7802,9 @@ static int rtw_wx_set_priv(struct net_device *dev, int ret = 0; int len = 0; char *ext; +#ifdef CONFIG_ANDROID int i; +#endif _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *dwrq = (struct iw_point *)awrq; @@ -7880,7 +7813,7 @@ static int rtw_wx_set_priv(struct net_device *dev, return -EFAULT; len = dwrq->length; - ext = vmalloc(len); + ext = rtw_vmalloc(len); if (!ext) return -ENOMEM; @@ -7892,7 +7825,7 @@ static int rtw_wx_set_priv(struct net_device *dev, #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV - ext_dbg = vmalloc(len); + ext_dbg = rtw_vmalloc(len); if (!ext_dbg) { rtw_vmfree(ext, len); return -ENOMEM; @@ -8042,7 +7975,8 @@ static int rtw_wowlan_ctrl(struct net_device *dev, RTW_INFO("+rtw_wowlan_ctrl: %s\n", extra); if (!check_fwstate(pmlmepriv, _FW_LINKED) && - check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { + check_fwstate(pmlmepriv, WIFI_STATION_STATE) && + !WOWLAN_IS_STA_MIX_MODE(padapter)) { #ifdef CONFIG_PNO_SUPPORT pwrctrlpriv->wowlan_pno_enable = _TRUE; #else @@ -8079,7 +8013,6 @@ _rtw_wowlan_ctrl_exit_free: RTW_INFO("-rtw_wowlan_ctrl( subcode = %d)\n", poidparam.subcode); RTW_PRINT("%s in %d ms\n", __func__, rtw_get_passing_time_ms(start_time)); -_rtw_wowlan_ctrl_exit: return ret; } @@ -8232,7 +8165,17 @@ static int rtw_pm_set(struct net_device *dev, } else if (_rtw_memcmp(extra, "lps_level=", 10)) { if (sscanf(extra + 10, "%u", &mode) > 0) ret = rtw_pm_set_lps_level(padapter, mode); - } else + } +#ifdef CONFIG_WOWLAN + else if (_rtw_memcmp(extra, "wow_lps=", 8)) { + sscanf(extra + 8, "%u", &mode); + ret = rtw_pm_set_wow_lps(padapter, mode); + } else if (_rtw_memcmp(extra, "wow_lps_level=", 14)) { + if (sscanf(extra + 14, "%u", &mode) > 0) + ret = rtw_pm_set_wow_lps_level(padapter, mode); + } +#endif /* CONFIG_WOWLAN */ + else ret = -EINVAL; return ret; @@ -8301,6 +8244,12 @@ int rtw_vendor_ie_get_data(struct net_device *dev, int vendor_ie_num, char *extr pstring += sprintf(pstring , "[Assoc Req]"); if (vendor_ie_mask & WIFI_ASSOCRESP_VENDOR_IE_BIT) pstring += sprintf(pstring , "[Assoc Resp]"); +#ifdef CONFIG_P2P + if (vendor_ie_mask & WIFI_P2P_PROBEREQ_VENDOR_IE_BIT) + pstring += sprintf(pstring , "[P2P_Probe Req]"); + if (vendor_ie_mask & WIFI_P2P_PROBERESP_VENDOR_IE_BIT) + pstring += sprintf(pstring , "[P2P_Probe Resp]"); +#endif pstring += sprintf(pstring , "\nVendor IE:\n"); for (j = 0 ; j < pmlmepriv->vendor_ielen[vendor_ie_num] ; j++) @@ -8351,6 +8300,7 @@ int rtw_vendor_ie_set(struct net_device *dev, struct iw_request_info *info, unio struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); u32 vendor_ie_mask = 0; u32 vendor_ie_num = 0; + u32 vendor_ie_mask_max = BIT(WLAN_MAX_VENDOR_IE_MASK_MAX) - 1; u32 id, elen; ret = sscanf(extra, "%d,%x,%*s", &vendor_ie_num , &vendor_ie_mask); @@ -8359,10 +8309,10 @@ int rtw_vendor_ie_set(struct net_device *dev, struct iw_request_info *info, unio else return -EINVAL; totoal_ie_len = strlen(extra); - RTW_INFO("[%s] vendor_ie_num = %d , vendor_ie_mask = %x , vendor_ie = %s , len = %d\n", __func__ , vendor_ie_num , vendor_ie_mask , extra , totoal_ie_len); + RTW_INFO("[%s] vendor_ie_num = %d , vendor_ie_mask = 0x%x , vendor_ie = %s , len = %d\n", __func__ , vendor_ie_num , vendor_ie_mask , extra , totoal_ie_len); if (vendor_ie_num > WLAN_MAX_VENDOR_IE_NUM - 1) { - RTW_INFO("[%s] only support %d vendor ie\n", __func__ , WLAN_MAX_VENDOR_IE_NUM); + RTW_INFO("[%s] Fail, only support %d vendor ie\n", __func__ , WLAN_MAX_VENDOR_IE_NUM); return -EFAULT; } @@ -8371,6 +8321,11 @@ int rtw_vendor_ie_set(struct net_device *dev, struct iw_request_info *info, unio return -EFAULT; } + if (vendor_ie_mask > vendor_ie_mask_max) { + RTW_INFO("[%s] Fail, not support vendor_ie_mask more than 0x%x\n", __func__ , vendor_ie_mask_max); + return -EFAULT; + } + if (vendor_ie_mask == 0) { RTW_INFO("[%s] Clear vendor_ie_num %d group\n", __func__ , vendor_ie_num); goto _clear_path; @@ -8412,11 +8367,17 @@ int rtw_vendor_ie_set(struct net_device *dev, struct iw_request_info *info, unio if (vendor_ie_mask & WIFI_PROBEREQ_VENDOR_IE_BIT) RTW_INFO("[%s] Probe Req append vendor ie\n", __func__); if (vendor_ie_mask & WIFI_PROBERESP_VENDOR_IE_BIT) - RTW_INFO("[%s] Probe Resp append vendor ie\n", __func__); + RTW_INFO("[%s] Probe Resp append vendor ie\n", __func__); if (vendor_ie_mask & WIFI_ASSOCREQ_VENDOR_IE_BIT) RTW_INFO("[%s] Assoc Req append vendor ie\n", __func__); if (vendor_ie_mask & WIFI_ASSOCRESP_VENDOR_IE_BIT) RTW_INFO("[%s] Assoc Resp append vendor ie\n", __func__); +#ifdef CONFIG_P2P + if (vendor_ie_mask & WIFI_P2P_PROBEREQ_VENDOR_IE_BIT) + RTW_INFO("[%s] P2P Probe Req append vendor ie\n", __func__); + if (vendor_ie_mask & WIFI_P2P_PROBERESP_VENDOR_IE_BIT) + RTW_INFO("[%s] P2P Probe Resp append vendor ie\n", __func__); +#endif pmlmepriv->vendor_ie_mask[vendor_ie_num] = vendor_ie_mask; @@ -8440,7 +8401,6 @@ static int rtw_mp_efuse_get(struct net_device *dev, PEFUSE_HAL pEfuseHal; struct iw_point *wrqu; - u8 *PROMContent = pHalData->efuse_eeprom_data; u8 ips_mode = IPS_NUM; /* init invalid value */ u8 lps_mode = PS_MODE_NUM; /* init invalid value */ struct pwrctrl_priv *pwrctrlpriv ; @@ -8613,7 +8573,7 @@ static int rtw_mp_efuse_get(struct net_device *dev, } RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN , (PVOID)&max_available_len, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN , (void *)&max_available_len, _FALSE); if ((addr + cnts) > max_available_len) { RTW_INFO("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EINVAL; @@ -8640,7 +8600,7 @@ static int rtw_mp_efuse_get(struct net_device *dev, u32 blksz = 0x200; /* The size of one time show, default 512 */ addr = 0; - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN , (PVOID)&mapLen, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN , (void *)&mapLen, _FALSE); RTW_INFO("Real content len = %d\n",mapLen ); if (rtw_efuse_access(padapter, _FALSE, addr, mapLen, rawdata) == _FAIL) { @@ -8680,7 +8640,7 @@ static int rtw_mp_efuse_get(struct net_device *dev, u32 blksz = 0x200; /* The size of one time show, default 512 */ addr = 0; - EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&mapLen, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&mapLen, _FALSE); RTW_INFO("Real content len = %d\n", mapLen); #ifdef RTW_HALMAC if (rtw_efuse_bt_access(padapter, _FALSE, 0, mapLen, rawdata) == _FAIL) { @@ -8731,7 +8691,7 @@ static int rtw_mp_efuse_get(struct net_device *dev, addr = hal_efuse_macaddr_offset(padapter); cnts = 6; - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); if ((addr + cnts) > max_available_len) { RTW_INFO("%s: addr(0x%02x)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EFAULT; @@ -8782,6 +8742,10 @@ static int rtw_mp_efuse_get(struct net_device *dev, addr = EEPROM_VID_8188FU; #endif /* CONFIG_RTL8188F */ +#ifdef CONFIG_RTL8188GTV + addr = EEPROM_VID_8188GTVU; +#endif + #ifdef CONFIG_RTL8703B #ifdef CONFIG_USB_HCI addr = EEPROM_VID_8703BU; @@ -8796,7 +8760,7 @@ static int rtw_mp_efuse_get(struct net_device *dev, cnts = 4; - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); if ((addr + cnts) > max_available_len) { RTW_INFO("%s: addr(0x%02x)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EFAULT; @@ -8924,7 +8888,7 @@ static int rtw_mp_efuse_get(struct net_device *dev, } RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); #ifndef RTW_HALMAC - EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); if ((addr + cnts) > max_available_len) { RTW_INFO("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EFAULT; @@ -9238,7 +9202,7 @@ static int rtw_mp_efuse_set(struct net_device *dev, for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) setdata[jj] = key_2char2num(tmp[2][kk], tmp[2][kk + 1]); - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); if ((addr + cnts) > max_available_len) { RTW_INFO("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); @@ -9377,7 +9341,7 @@ static int rtw_mp_efuse_set(struct net_device *dev, for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]); - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); if ((addr + cnts) > max_available_len) { RTW_INFO("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); @@ -9423,6 +9387,10 @@ static int rtw_mp_efuse_set(struct net_device *dev, addr = EEPROM_VID_8188FU; #endif +#ifdef CONFIG_RTL8188GTV + addr = EEPROM_VID_8188GTVU; +#endif + #ifdef CONFIG_RTL8703B #ifdef CONFIG_USB_HCI addr = EEPROM_VID_8703BU; @@ -9453,7 +9421,7 @@ static int rtw_mp_efuse_set(struct net_device *dev, for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]); - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); if ((addr + cnts) > max_available_len) { RTW_INFO("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EFAULT; @@ -9524,7 +9492,7 @@ static int rtw_mp_efuse_set(struct net_device *dev, for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) setdata[jj] = key_2char2num(tmp[2][kk], tmp[2][kk + 1]); #ifndef RTW_HALMAC - EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); + EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); if ((addr + cnts) > max_available_len) { RTW_INFO("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EFAULT; @@ -9556,7 +9524,12 @@ static int rtw_mp_efuse_set(struct net_device *dev, err = -EINVAL; goto exit; } - + if (pmp_priv->bprocess_mp_mode != _TRUE) { + RTW_INFO("%s: btwfake not to be exec, please first to mp_start\n", __FUNCTION__); + sprintf(extra, "Error, btwfake cant to be exec, please first to mp_start !!!!\n"); + err = 0; + goto exit; + } addr = simple_strtoul(tmp[1], &ptmp, 16); addr &= 0xFFF; @@ -9592,6 +9565,12 @@ static int rtw_mp_efuse_set(struct net_device *dev, sprintf(extra, "BT Status not Active Write FAIL\n"); goto exit; } + if (pmp_priv->bprocess_mp_mode != _TRUE) { + RTW_INFO("%s: btfk2map not to be exec, please first to mp_start\n", __FUNCTION__); + sprintf(extra, "Error, btfk2map cant to be exec, please first to mp_start !!!!\n"); + err = 0; + goto exit; + } #ifndef RTW_HALMAC BTEfuse_PowerSwitch(padapter, 1, _TRUE); addr = 0x1ff; @@ -9669,6 +9648,12 @@ static int rtw_mp_efuse_set(struct net_device *dev, goto exit; } + if (pmp_priv->bprocess_mp_mode != _TRUE) { + RTW_INFO("%s: wlfk2map not to be exec, please first to mp_start\n", __FUNCTION__); + sprintf(extra, "Error, wlfk2map cant to be exec, please first to mp_start !!!!\n"); + err = 0; + goto exit; + } if (wifimaplen > EFUSE_MAX_MAP_LEN) cnts = EFUSE_MAX_MAP_LEN; else @@ -9721,7 +9706,12 @@ static int rtw_mp_efuse_set(struct net_device *dev, err = -EINVAL; goto exit; } - + if (pmp_priv->bprocess_mp_mode != _TRUE) { + RTW_INFO("%s: wlwfake not to be exec, please first to mp_start\n", __FUNCTION__); + sprintf(extra, "Error, wlwfake cant to be exec, please first to mp_start !!!!\n"); + err = 0; + goto exit; + } addr = simple_strtoul(tmp[1], &ptmp, 16); addr &= 0xFFF; @@ -9751,6 +9741,12 @@ static int rtw_mp_efuse_set(struct net_device *dev, err = -EINVAL; goto exit; } + if (pmp_priv->bprocess_mp_mode != _TRUE) { + RTW_INFO("%s: wfakemac not to be exec, please first to mp_start\n", __FUNCTION__); + sprintf(extra, "Error, wfakemac cant to be exec, please first to mp_start !!!!\n"); + err = 0; + goto exit; + } /* wfakemac,00e04c871200 */ if (hal_efuse_macaddr_offset(padapter) == -1) { err = -EFAULT; @@ -9859,7 +9855,7 @@ static int rtw_mp_customer_str( || !adapter->registrypriv.mp_customer_str) return -EFAULT; - len = wrqu->data.length; + len = wrqu->data.length + 1; pbuf = (u8 *)rtw_zmalloc(len); if (pbuf == NULL) { @@ -9867,7 +9863,7 @@ static int rtw_mp_customer_str( return -ENOMEM; } - if (copy_from_user(pbuf, wrqu->data.pointer, len)) { + if (copy_from_user(pbuf, wrqu->data.pointer, wrqu->data.length)) { rtw_mfree(pbuf, len); RTW_WARN("%s: copy from user fail!\n", __func__); return -EFAULT; @@ -9930,7 +9926,6 @@ static int rtw_mp_customer_str( wrqu->data.length = strlen(extra) + 1; -free_buf: rtw_mfree(pbuf, len); return 0; } @@ -9944,35 +9939,42 @@ static int rtw_priv_mp_set(struct net_device *dev, struct iw_point *wrqu = (struct iw_point *)wdata; u32 subcmd = wrqu->flags; PADAPTER padapter = rtw_netdev_priv(dev); + int status = 0; +#ifdef CONFIG_CONCURRENT_MODE if (!is_primary_adapter(padapter)) { RTW_INFO("MP mode only primary Adapter support\n"); return -EIO; } +#endif + RTW_INFO("%s mutx in %d\n", __func__, subcmd); + _enter_critical_mutex(&(adapter_to_dvobj(padapter)->ioctrl_mutex), NULL); switch (subcmd) { case CTA_TEST: RTW_INFO("set CTA_TEST\n"); - rtw_cta_test_start(dev, info, wdata, extra); + status = rtw_cta_test_start(dev, info, wdata, extra); break; case MP_DISABLE_BT_COEXIST: RTW_INFO("set case MP_DISABLE_BT_COEXIST\n"); - rtw_mp_disable_bt_coexist(dev, info, wdata, extra); + status = rtw_mp_disable_bt_coexist(dev, info, wdata, extra); break; case MP_IQK: RTW_INFO("set MP_IQK\n"); - rtw_mp_iqk(dev, info, wrqu, extra); + status = rtw_mp_iqk(dev, info, wrqu, extra); break; case MP_LCK: RTW_INFO("set MP_LCK\n"); - rtw_mp_lck(dev, info, wrqu, extra); + status = rtw_mp_lck(dev, info, wrqu, extra); break; default: - return -EIO; + status = -EIO; } + _exit_critical_mutex(&(adapter_to_dvobj(padapter)->ioctrl_mutex), NULL); + RTW_INFO("%s mutx done %d\n", __func__, subcmd); - return 0; + return status; } static int rtw_priv_mp_get(struct net_device *dev, @@ -9983,179 +9985,200 @@ static int rtw_priv_mp_get(struct net_device *dev, struct iw_point *wrqu = (struct iw_point *)wdata; u32 subcmd = wrqu->flags; PADAPTER padapter = rtw_netdev_priv(dev); + int status = 0; +#ifdef CONFIG_CONCURRENT_MODE if (!is_primary_adapter(padapter)) { RTW_INFO("MP mode only primary Adapter support\n"); return -EIO; } +#endif + + RTW_INFO("%s mutx in %d\n", __func__, subcmd); + _enter_critical_mutex(&(adapter_to_dvobj(padapter)->ioctrl_mutex), NULL); switch (subcmd) { case MP_START: RTW_INFO("set case mp_start\n"); - rtw_mp_start(dev, info, wrqu, extra); + status = rtw_mp_start(dev, info, wrqu, extra); break; case MP_STOP: RTW_INFO("set case mp_stop\n"); - rtw_mp_stop(dev, info, wrqu, extra); + status = rtw_mp_stop(dev, info, wrqu, extra); break; case MP_BANDWIDTH: RTW_INFO("set case mp_bandwidth\n"); - rtw_mp_bandwidth(dev, info, wrqu, extra); + status = rtw_mp_bandwidth(dev, info, wrqu, extra); break; case MP_RESET_STATS: RTW_INFO("set case MP_RESET_STATS\n"); - rtw_mp_reset_stats(dev, info, wrqu, extra); + status = rtw_mp_reset_stats(dev, info, wrqu, extra); break; case MP_SetRFPathSwh: RTW_INFO("set MP_SetRFPathSwitch\n"); - rtw_mp_SetRFPath(dev, info, wrqu, extra); + status = rtw_mp_SetRFPath(dev, info, wrqu, extra); break; case WRITE_REG: - rtw_mp_write_reg(dev, info, wrqu, extra); + status = rtw_mp_write_reg(dev, info, wrqu, extra); break; case WRITE_RF: - rtw_mp_write_rf(dev, info, wrqu, extra); + status = rtw_mp_write_rf(dev, info, wrqu, extra); break; case MP_PHYPARA: RTW_INFO("mp_get MP_PHYPARA\n"); - rtw_mp_phypara(dev, info, wrqu, extra); + status = rtw_mp_phypara(dev, info, wrqu, extra); break; case MP_CHANNEL: RTW_INFO("set case mp_channel\n"); - rtw_mp_channel(dev , info, wrqu, extra); + status = rtw_mp_channel(dev , info, wrqu, extra); + break; + case MP_CHL_OFFSET: + RTW_INFO("set case mp_ch_offset\n"); + status = rtw_mp_ch_offset(dev , info, wrqu, extra); break; - case MP_CHL_OFFSET: - RTW_INFO("set case mp_ch_offset\n"); - rtw_mp_ch_offset(dev , info, wrqu, extra); - break; case READ_REG: RTW_INFO("mp_get READ_REG\n"); - rtw_mp_read_reg(dev, info, wrqu, extra); + status = rtw_mp_read_reg(dev, info, wrqu, extra); break; case READ_RF: RTW_INFO("mp_get READ_RF\n"); - rtw_mp_read_rf(dev, info, wrqu, extra); + status = rtw_mp_read_rf(dev, info, wrqu, extra); break; case MP_RATE: RTW_INFO("set case mp_rate\n"); - rtw_mp_rate(dev, info, wrqu, extra); + status = rtw_mp_rate(dev, info, wrqu, extra); break; case MP_TXPOWER: RTW_INFO("set case MP_TXPOWER\n"); - rtw_mp_txpower(dev, info, wrqu, extra); + status = rtw_mp_txpower(dev, info, wrqu, extra); break; case MP_ANT_TX: RTW_INFO("set case MP_ANT_TX\n"); - rtw_mp_ant_tx(dev, info, wrqu, extra); + status = rtw_mp_ant_tx(dev, info, wrqu, extra); break; case MP_ANT_RX: RTW_INFO("set case MP_ANT_RX\n"); - rtw_mp_ant_rx(dev, info, wrqu, extra); + status = rtw_mp_ant_rx(dev, info, wrqu, extra); break; case MP_QUERY: - rtw_mp_trx_query(dev, info, wrqu, extra); + status = rtw_mp_trx_query(dev, info, wrqu, extra); break; case MP_CTX: RTW_INFO("set case MP_CTX\n"); - rtw_mp_ctx(dev, info, wrqu, extra); + status = rtw_mp_ctx(dev, info, wrqu, extra); break; case MP_ARX: RTW_INFO("set case MP_ARX\n"); - rtw_mp_arx(dev, info, wrqu, extra); + status = rtw_mp_arx(dev, info, wrqu, extra); break; case MP_DUMP: RTW_INFO("set case MP_DUMP\n"); - rtw_mp_dump(dev, info, wrqu, extra); + status = rtw_mp_dump(dev, info, wrqu, extra); break; case MP_PSD: RTW_INFO("set case MP_PSD\n"); - rtw_mp_psd(dev, info, wrqu, extra); + status = rtw_mp_psd(dev, info, wrqu, extra); break; case MP_THER: RTW_INFO("set case MP_THER\n"); - rtw_mp_thermal(dev, info, wrqu, extra); + status = rtw_mp_thermal(dev, info, wrqu, extra); break; case MP_PwrCtlDM: RTW_INFO("set MP_PwrCtlDM\n"); - rtw_mp_PwrCtlDM(dev, info, wrqu, extra); + status = rtw_mp_PwrCtlDM(dev, info, wrqu, extra); break; case MP_QueryDrvStats: RTW_INFO("mp_get MP_QueryDrvStats\n"); - rtw_mp_QueryDrv(dev, info, wdata, extra); + status = rtw_mp_QueryDrv(dev, info, wdata, extra); break; case MP_PWRTRK: RTW_INFO("set case MP_PWRTRK\n"); - rtw_mp_pwrtrk(dev, info, wrqu, extra); + status = rtw_mp_pwrtrk(dev, info, wrqu, extra); break; #ifdef CONFIG_MP_INCLUDED case EFUSE_SET: RTW_INFO("set case efuse set\n"); - rtw_mp_efuse_set(dev, info, wdata, extra); + status = rtw_mp_efuse_set(dev, info, wdata, extra); break; #endif case EFUSE_GET: RTW_INFO("efuse get EFUSE_GET\n"); - rtw_mp_efuse_get(dev, info, wdata, extra); + status = rtw_mp_efuse_get(dev, info, wdata, extra); break; case MP_GET_TXPOWER_INX: RTW_INFO("mp_get MP_GET_TXPOWER_INX\n"); - rtw_mp_txpower_index(dev, info, wrqu, extra); + status = rtw_mp_txpower_index(dev, info, wrqu, extra); break; case MP_GETVER: RTW_INFO("mp_get MP_GETVER\n"); - rtw_mp_getver(dev, info, wdata, extra); + status = rtw_mp_getver(dev, info, wdata, extra); break; case MP_MON: RTW_INFO("mp_get MP_MON\n"); - rtw_mp_mon(dev, info, wdata, extra); + status = rtw_mp_mon(dev, info, wdata, extra); break; case EFUSE_MASK: RTW_INFO("mp_get EFUSE_MASK\n"); - rtw_efuse_mask_file(dev, info, wdata, extra); + status = rtw_efuse_mask_file(dev, info, wdata, extra); break; case EFUSE_FILE: RTW_INFO("mp_get EFUSE_FILE\n"); - rtw_efuse_file_map(dev, info, wdata, extra); + status = rtw_efuse_file_map(dev, info, wdata, extra); break; case MP_TX: RTW_INFO("mp_get MP_TX\n"); - rtw_mp_tx(dev, info, wdata, extra); + status = rtw_mp_tx(dev, info, wdata, extra); break; case MP_RX: RTW_INFO("mp_get MP_RX\n"); - rtw_mp_rx(dev, info, wdata, extra); + status = rtw_mp_rx(dev, info, wdata, extra); break; case MP_HW_TX_MODE: RTW_INFO("mp_get MP_HW_TX_MODE\n"); - rtw_mp_hwtx(dev, info, wdata, extra); + status = rtw_mp_hwtx(dev, info, wdata, extra); break; #ifdef CONFIG_RTW_CUSTOMER_STR case MP_CUSTOMER_STR: RTW_INFO("customer str\n"); - rtw_mp_customer_str(dev, info, wdata, extra); + status = rtw_mp_customer_str(dev, info, wdata, extra); break; #endif case MP_PWRLMT: RTW_INFO("mp_get MP_SETPWRLMT\n"); - rtw_mp_pwrlmt(dev, info, wdata, extra); + status = rtw_mp_pwrlmt(dev, info, wdata, extra); break; case MP_PWRBYRATE: RTW_INFO("mp_get MP_SETPWRBYRATE\n"); - rtw_mp_pwrbyrate(dev, info, wdata, extra); + status = rtw_mp_pwrbyrate(dev, info, wdata, extra); break; case BT_EFUSE_FILE: RTW_INFO("mp_get BT EFUSE_FILE\n"); - rtw_bt_efuse_file_map(dev, info, wdata, extra); + status = rtw_bt_efuse_file_map(dev, info, wdata, extra); break; - case MP_SWRFPath: + case MP_SWRFPath: RTW_INFO("mp_get MP_SWRFPath\n"); - rtw_mp_switch_rf_path(dev, info, wrqu, extra); + status = rtw_mp_switch_rf_path(dev, info, wrqu, extra); break; + case MP_LINK: + RTW_INFO("mp_get MP_LINK\n"); + status = rtw_mp_link(dev, info, wrqu, extra); + break; + case MP_DPK_TRK: + RTW_INFO("mp_get MP_DPK_TRK\n"); + status = rtw_mp_dpk_track(dev, info, wdata, extra); + break; + case MP_DPK: + RTW_INFO("set MP_DPK\n"); + status = rtw_mp_dpk(dev, info, wdata, extra); + __attribute__ ((__fallthrough__)); default: - return -EIO; + status = -EIO; } - return 0; + _exit_critical_mutex(&(adapter_to_dvobj(padapter)->ioctrl_mutex), NULL); + RTW_INFO("%s mutx done_%d\n", __func__, subcmd); + + return status; } #endif /*#if defined(CONFIG_MP_INCLUDED)*/ @@ -10423,14 +10446,13 @@ static int rtw_priv_get(struct net_device *dev, } - +#ifdef CONFIG_TDLS static int rtw_wx_tdls_wfd_enable(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; -#ifdef CONFIG_TDLS #ifdef CONFIG_WFD _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); @@ -10443,7 +10465,6 @@ static int rtw_wx_tdls_wfd_enable(struct net_device *dev, rtw_tdls_wfd_enable(padapter, 1); #endif /* CONFIG_WFD */ -#endif /* CONFIG_TDLS */ return ret; } @@ -11075,8 +11096,8 @@ static int rtw_tdls_getsta(struct net_device *dev, } wrqu->data.length = strlen(extra); -#endif /* CONFIG_TDLS */ exit: +#endif /* CONFIG_TDLS */ return ret; } @@ -11088,7 +11109,6 @@ static int rtw_tdls_get_best_ch(struct net_device *dev, #ifdef CONFIG_FIND_BEST_CHANNEL _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0; for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++) { @@ -11149,7 +11169,7 @@ static int rtw_tdls_get_best_ch(struct net_device *dev, return 0; } - +#endif /*#ifdef CONFIG_TDLS*/ static int rtw_tdls(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) @@ -11268,46 +11288,6 @@ static int rtw_tdls_get(struct net_device *dev, return ret; } - - - - -#ifdef CONFIG_INTEL_WIDI -static int rtw_widi_set(struct net_device *dev, - struct iw_request_info *info, - union iwreq_data *wrqu, char *extra) -{ - int ret = 0; - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - - process_intel_widi_cmd(padapter, extra); - - return ret; -} - -static int rtw_widi_set_probe_request(struct net_device *dev, - struct iw_request_info *info, - union iwreq_data *wrqu, char *extra) -{ - int ret = 0; - u8 *pbuf = NULL; - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - - pbuf = rtw_malloc(sizeof(l2_msg_t)); - if (pbuf) { - if (copy_from_user(pbuf, wrqu->data.pointer, wrqu->data.length)) - ret = -EFAULT; - /* _rtw_memcpy(pbuf, wrqu->data.pointer, wrqu->data.length); */ - - if (wrqu->data.flags == 0) - intel_widi_wk_cmd(padapter, INTEL_WIDI_ISSUE_PROB_WK, pbuf, sizeof(l2_msg_t)); - else if (wrqu->data.flags == 1) - rtw_set_wfd_rds_sink_info(padapter, (l2_msg_t *)pbuf); - } - return ret; -} -#endif /* CONFIG_INTEL_WIDI */ - #ifdef CONFIG_MAC_LOOPBACK_DRIVER #if defined(CONFIG_RTL8188E) @@ -11340,6 +11320,11 @@ extern void rtl8723b_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf #define fill_default_txdesc rtl8723d_fill_default_txdesc #endif /* CONFIG_RTL8723D */ +#if defined(CONFIG_RTL8710B) +#define cal_txdesc_chksum rtl8710b_cal_txdesc_chksum +#define fill_default_txdesc rtl8710b_fill_default_txdesc +#endif /* CONFIG_RTL8710B */ + #if defined(CONFIG_RTL8192E) extern void rtl8192e_cal_txdesc_chksum(struct tx_desc *ptxdesc); #define cal_txdesc_chksum rtl8192e_cal_txdesc_chksum @@ -11349,6 +11334,13 @@ extern void rtl8192es_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbu #endif /* CONFIG_SDIO_HCI */ #endif /* CONFIG_RTL8192E */ +#if defined(CONFIG_RTL8192F) +/* extern void rtl8192f_cal_txdesc_chksum(struct tx_desc *ptxdesc); */ +#define cal_txdesc_chksum rtl8192f_cal_txdesc_chksum +/* extern void rtl8192f_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); */ +#define fill_default_txdesc rtl8192f_fill_default_txdesc +#endif /* CONFIG_RTL8192F */ + static s32 initLoopback(PADAPTER padapter) { PLOOPBACKDATA ploopback; @@ -12148,6 +12140,8 @@ static const struct iw_priv_args rtw_private_args[] = { SIOCIWFIRSTPRIV + 0x17, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | 1024 , "rrm" }, +#else + {SIOCIWFIRSTPRIV + 0x17, IW_PRIV_TYPE_CHAR | 1024 , 0 , "NULL"}, #endif {SIOCIWFIRSTPRIV + 0x18, IW_PRIV_TYPE_CHAR | IFNAMSIZ , 0 , "rereg_nd_name"}, #ifdef CONFIG_MP_INCLUDED @@ -12162,17 +12156,6 @@ static const struct iw_priv_args rtw_private_args[] = { IW_PRIV_TYPE_CHAR | 40, IW_PRIV_TYPE_CHAR | 0x7FF, "test" }, -#ifdef CONFIG_INTEL_WIDI - { - SIOCIWFIRSTPRIV + 0x1E, - IW_PRIV_TYPE_CHAR | 1024, 0, "widi_set" - }, - { - SIOCIWFIRSTPRIV + 0x1F, - IW_PRIV_TYPE_CHAR | 128, 0, "widi_prob_req" - }, -#endif /* CONFIG_INTEL_WIDI */ - { SIOCIWFIRSTPRIV + 0x0E, IW_PRIV_TYPE_CHAR | 1024, 0 , ""}, /* set */ { SIOCIWFIRSTPRIV + 0x0F, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , ""},/* get * --- sub-ioctls definitions --- */ @@ -12246,6 +12229,9 @@ static const struct iw_priv_args rtw_mp_private_args[] = { { MP_LCK, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_lck"}, { BT_EFUSE_FILE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "bt_efuse_file" }, { MP_SWRFPath, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_swrfpath" }, + { MP_LINK, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_link" }, + { MP_DPK, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_dpk"}, + { MP_DPK_TRK, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_dpk_trk" }, #ifdef CONFIG_RTW_CUSTOMER_STR { MP_CUSTOMER_STR, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "customer_str" }, #endif @@ -12309,10 +12295,6 @@ static iw_handler rtw_private_handler[] = { #endif NULL, /* 0x1C is reserved for hostapd */ rtw_test, /* 0x1D */ -#ifdef CONFIG_INTEL_WIDI - rtw_widi_set, /* 0x1E */ - rtw_widi_set_probe_request, /* 0x1F */ -#endif /* CONFIG_INTEL_WIDI */ }; #if WIRELESS_EXT >= 17 @@ -12333,17 +12315,7 @@ static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev) #ifdef CONFIG_SIGNAL_DISPLAY_DBM tmp_level = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); #else -#ifdef CONFIG_SIGNAL_SCALE_MAPPING tmp_level = padapter->recvpriv.signal_strength; -#else - { - /* Do signal scale mapping when using percentage as the unit of signal strength, since the scale mapping is skipped in odm */ - - HAL_DATA_TYPE *pHal = GET_HAL_DATA(padapter); - - tmp_level = (u8)phydm_signal_scale_mapping(&pHal->odmpriv, padapter->recvpriv.signal_strength); - } -#endif #endif tmp_qual = padapter->recvpriv.signal_qual; @@ -12480,14 +12452,14 @@ static int _rtw_ioctl_wext_private(struct net_device *dev, union iwreq_data *wrq sscanf(ptr, "%16s", cmdname); cmdlen = strlen(cmdname); - RTW_INFO("%s: cmd=%s\n", __func__, cmdname); + RTW_DBG("%s: cmd=%s\n", __func__, cmdname); /* skip command string */ if (cmdlen > 0) cmdlen += 1; /* skip one space */ ptr += cmdlen; len -= cmdlen; - RTW_INFO("%s: parameters=%s\n", __func__, ptr); + RTW_DBG("%s: parameters=%s\n", __func__, ptr); priv = rtw_private_handler; priv_args = rtw_private_args; @@ -12780,7 +12752,7 @@ static int rtw_ioctl_compat_wext_private(struct net_device *dev, struct ifreq *r struct compat_iw_point iwp_compat; union iwreq_data wrq_data; int err = 0; - RTW_INFO("%s:...\n", __func__); + RTW_DBG("%s:...\n", __func__); if (copy_from_user(&iwp_compat, rq->ifr_ifru.ifru_data, sizeof(struct compat_iw_point))) return -EFAULT; @@ -12803,11 +12775,10 @@ static int rtw_ioctl_compat_wext_private(struct net_device *dev, struct ifreq *r static int rtw_ioctl_standard_wext_private(struct net_device *dev, struct ifreq *rq) { struct iw_point *iwp; - struct ifreq ifrq; union iwreq_data wrq_data; int err = 0; iwp = &wrq_data.data; - RTW_INFO("%s:...\n", __func__); + RTW_DBG("%s:...\n", __func__); if (copy_from_user(iwp, rq->ifr_ifru.ifru_data, sizeof(struct iw_point))) return -EFAULT; diff --git a/os_dep/linux/ioctl_mp.c b/os_dep/linux/ioctl_mp.c index 6f1ebd2..2fb2f55 100644 --- a/os_dep/linux/ioctl_mp.c +++ b/os_dep/linux/ioctl_mp.c @@ -16,7 +16,6 @@ #include #include -#include #include "../../hal/phydm/phydm_precomp.h" @@ -37,9 +36,9 @@ int rtw_mp_write_reg(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { - char *pch, *pnext, *ptmp; + char *pch, *pnext; char *width_str; - char width, buf[5]; + char width; u32 addr, data; int ret; PADAPTER padapter = rtw_netdev_priv(dev); @@ -72,7 +71,7 @@ int rtw_mp_write_reg(struct net_device *dev, _rtw_memcpy(buf, pch, pnext-pch); ret = kstrtoul(buf, 16, &addr);*/ ret = sscanf(pch, "%x", &addr); - if (addr > 0x3FFF) + if (addr > MP_READ_REG_MAX_OFFSET) return -EINVAL; pch = pnext + 1; @@ -130,10 +129,10 @@ int rtw_mp_read_reg(struct net_device *dev, struct iw_point *wrqu, char *extra) { char input[wrqu->length + 1]; - char *pch, *pnext, *ptmp; + char *pch, *pnext; char *width_str; char width; - char data[20], tmp[20], buf[3]; + char data[20], tmp[20]; u32 addr = 0, strtout = 0; u32 i = 0, j = 0, ret = 0, data32 = 0; PADAPTER padapter = rtw_netdev_priv(dev); @@ -160,7 +159,7 @@ int rtw_mp_read_reg(struct net_device *dev, pch = pnext + 1; ret = sscanf(pch, "%x", &addr); - if (addr > 0x3FFF) + if (addr > MP_READ_REG_MAX_OFFSET) return -EINVAL; ret = 0; @@ -306,8 +305,8 @@ int rtw_mp_read_rf(struct net_device *dev, struct iw_point *wrqu, char *extra) { char input[wrqu->length]; - char *pch, *pnext, *ptmp; - char data[20], tmp[20], buf[3]; + char *pch, *pnext; + char data[20], tmp[20]; u32 path, addr, strtou; u32 ret, i = 0 , j = 0; PADAPTER padapter = rtw_netdev_priv(dev); @@ -367,16 +366,18 @@ int rtw_mp_start(struct net_device *dev, struct iw_point *wrqu, char *extra) { int ret = 0; - u8 val8; PADAPTER padapter = rtw_netdev_priv(dev); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct hal_ops *pHalFunc = &padapter->hal_func; + struct mp_priv *pmppriv = &padapter->mppriv; rtw_pm_set_ips(padapter, IPS_NONE); LeaveAllPowerSaveMode(padapter); - if (rtw_mi_check_fwstate(padapter, _FW_UNDER_SURVEY)) - rtw_mi_scan_abort(padapter, _FALSE); + pmppriv->bprocess_mp_mode = _TRUE; + + if (rtw_mi_check_fwstate(padapter, _FW_UNDER_SURVEY)) { + rtw_mi_buddy_set_scan_deny(padapter, 5000); + rtw_mi_scan_abort(padapter, _TRUE); + } if (rtw_mp_cmd(padapter, MP_START, RTW_CMDF_WAIT_ACK) != _SUCCESS) ret = -EPERM; @@ -396,11 +397,15 @@ int rtw_mp_stop(struct net_device *dev, { int ret = 0; PADAPTER padapter = rtw_netdev_priv(dev); - struct hal_ops *pHalFunc = &padapter->hal_func; + struct mp_priv *pmppriv = &padapter->mppriv; if (rtw_mp_cmd(padapter, MP_STOP, RTW_CMDF_WAIT_ACK) != _SUCCESS) ret = -EPERM; + if (pmppriv->mode != MP_ON) + return -EPERM; + + pmppriv->bprocess_mp_mode = _FALSE; _rtw_memset(extra, 0, wrqu->length); sprintf(extra, "mp_stop %s\n", ret == 0 ? "ok" : "fail"); wrqu->length = strlen(extra); @@ -466,7 +471,6 @@ int rtw_mp_channel(struct net_device *dev, HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); u8 input[wrqu->length + 1]; u32 channel = 1; - int cur_ch_offset; _rtw_memset(input, 0, sizeof(input)); if (copy_from_user(input, wrqu->pointer, wrqu->length)) @@ -492,7 +496,6 @@ int rtw_mp_ch_offset(struct net_device *dev, { PADAPTER padapter = rtw_netdev_priv(dev); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); u8 input[wrqu->length + 1]; u32 ch_offset = 0; @@ -518,7 +521,6 @@ int rtw_mp_bandwidth(struct net_device *dev, struct iw_point *wrqu, char *extra) { u32 bandwidth = 0, sg = 0; - int cur_ch_offset; PADAPTER padapter = rtw_netdev_priv(dev); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); u8 input[wrqu->length]; @@ -553,6 +555,7 @@ int rtw_mp_txpower_index(struct net_device *dev, struct iw_point *wrqu, char *extra) { PADAPTER padapter = rtw_netdev_priv(dev); + HAL_DATA_TYPE *phal_data = GET_HAL_DATA(padapter); char input[wrqu->length + 1]; u32 rfpath; u32 txpower_inx; @@ -567,9 +570,26 @@ int rtw_mp_txpower_index(struct net_device *dev, input[wrqu->length] = '\0'; - rfpath = rtw_atoi(input); - txpower_inx = mpt_ProQueryCalTxPower(padapter, rfpath); - sprintf(extra, " %d", txpower_inx); + if (wrqu->length == 2) { + rfpath = rtw_atoi(input); + txpower_inx = mpt_ProQueryCalTxPower(padapter, rfpath); + sprintf(extra, " %d", txpower_inx); + } else { + txpower_inx = mpt_ProQueryCalTxPower(padapter, 0); + sprintf(extra, "patha=%d", txpower_inx); + if (phal_data->rf_type > RF_1T2R) { + txpower_inx = mpt_ProQueryCalTxPower(padapter, 1); + sprintf(extra, "%s,pathb=%d", extra, txpower_inx); + } + if (phal_data->rf_type > RF_2T4R) { + txpower_inx = mpt_ProQueryCalTxPower(padapter, 2); + sprintf(extra, "%s,pathc=%d", extra, txpower_inx); + } + if (phal_data->rf_type > RF_3T4R) { + txpower_inx = mpt_ProQueryCalTxPower(padapter, 3); + sprintf(extra, "%s,pathd=%d", extra, txpower_inx); + } + } wrqu->length = strlen(extra); return 0; @@ -580,7 +600,7 @@ int rtw_mp_txpower(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { - u32 idx_a = 0, idx_b = 0, idx_c = 0, idx_d = 0, status = 0; + u32 idx_a = 0, idx_b = 0, idx_c = 0, idx_d = 0; int MsetPower = 1; u8 input[wrqu->length]; @@ -651,10 +671,16 @@ int rtw_mp_ant_tx(struct net_device *dev, /*antenna |= BIT(extra[i]-'a');*/ RTW_INFO("%s: antenna=0x%x\n", __func__, antenna); padapter->mppriv.antenna_tx = antenna; - padapter->mppriv.antenna_rx = antenna; + /*RTW_INFO("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_tx);*/ pHalData->antenna_tx_path = antenna; - + if (IS_HARDWARE_TYPE_8822C(padapter) && padapter->mppriv.antenna_tx == ANTENNA_B) { + if (padapter->mppriv.antenna_rx == ANTENNA_A || padapter->mppriv.antenna_rx == ANTENNA_B) { + padapter->mppriv.antenna_rx = ANTENNA_AB; + pHalData->AntennaRxPath = ANTENNA_AB; + RTW_INFO("%s:8822C Tx-B Rx Ant to AB\n", __func__); + } + } SetAntenna(padapter); wrqu->length = strlen(extra); @@ -700,7 +726,7 @@ int rtw_mp_ant_rx(struct net_device *dev, } RTW_INFO("%s: antenna=0x%x\n", __func__, antenna); - padapter->mppriv.antenna_tx = antenna; + padapter->mppriv.antenna_rx = antenna; pHalData->AntennaRxPath = antenna; /*RTW_INFO("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_rx);*/ @@ -753,6 +779,12 @@ int rtw_mp_ctx(struct net_device *dev, pmp_priv = &padapter->mppriv; pattrib = &pmp_priv->tx.attrib; + + if (padapter->registrypriv.mp_mode != 1 ) { + sprintf(extra, "Error: can't tx ,not in MP mode. \n"); + wrqu->length = strlen(extra); + return 0; + } if (copy_from_user(extra, wrqu->pointer, wrqu->length)) return -EFAULT; @@ -811,9 +843,17 @@ int rtw_mp_ctx(struct net_device *dev, } else { bStartTest = 1; odm_write_dig(&pHalData->odmpriv, 0x7f); + if (IS_HARDWARE_TYPE_8822C(padapter) && pmp_priv->antenna_tx == ANTENNA_B) { + if (pmp_priv->antenna_rx == ANTENNA_A || pmp_priv->antenna_rx == ANTENNA_B) { + pmp_priv->antenna_rx = ANTENNA_AB; + pHalData->AntennaRxPath = ANTENNA_AB; + RTW_INFO("%s:8822C Tx-B Rx Ant to AB\n", __func__); + SetAntenna(padapter); + } + } if (pmp_priv->mode != MP_ON) { if (pmp_priv->tx.stop != 1) { - RTW_INFO("%s: MP_MODE != ON %d\n", __func__, pmp_priv->mode); + RTW_INFO("%s:Error MP_MODE %d != ON\n", __func__, pmp_priv->mode); return -EFAULT; } } @@ -834,6 +874,9 @@ int rtw_mp_ctx(struct net_device *dev, status = rtw_mp_pretx_proc(padapter, bStartTest, extra); + if (stop == 0) + pmp_priv->mode = MP_ON; + wrqu->length = strlen(extra); return status; } @@ -844,10 +887,10 @@ int rtw_mp_disable_bt_coexist(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { +#ifdef CONFIG_BT_COEXIST PADAPTER padapter = (PADAPTER)rtw_netdev_priv(dev); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct hal_ops *pHalFunc = &padapter->hal_func; +#endif u8 input[wrqu->data.length + 1]; u32 bt_coexist; @@ -884,11 +927,11 @@ int rtw_mp_arx(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { - int bStartRx = 0, bStopRx = 0, bQueryPhy = 0, bQueryMac = 0, bSetBssid = 0; - int bmac_filter = 0, bfilter_init = 0, bmon = 0, bSmpCfg = 0, bloopbk = 0; + int bStartRx = 0, bStopRx = 0, bQueryPhy = 0, bQueryMac = 0, bSetBssid = 0, bSetRxframe = 0; + int bmac_filter = 0, bmon = 0, bSmpCfg = 0; u8 input[wrqu->length]; - char *pch, *ptmp, *token, *tmp[2] = {0x00, 0x00}; - u32 i = 0, ii = 0, jj = 0, kk = 0, cnts = 0, ret; + char *pch, *token, *tmp[2] = {0x00, 0x00}; + u32 i = 0, jj = 0, kk = 0, cnts = 0, ret; PADAPTER padapter = rtw_netdev_priv(dev); struct mp_priv *pmppriv = &padapter->mppriv; struct dbg_rx_counter rx_counter; @@ -909,6 +952,7 @@ int rtw_mp_arx(struct net_device *dev, bQueryPhy = (strncmp(input, "phy", 3) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ bQueryMac = (strncmp(input, "mac", 3) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ bSetBssid = (strncmp(input, "setbssid=", 8) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ + bSetRxframe = (strncmp(input, "frametype", 9) == 0) ? 1 : 0; /*bfilter_init = (strncmp(input, "filter_init",11)==0)?1:0;*/ bmac_filter = (strncmp(input, "accept_mac", 10) == 0) ? 1 : 0; bmon = (strncmp(input, "mon=", 4) == 0) ? 1 : 0; @@ -938,6 +982,12 @@ int rtw_mp_arx(struct net_device *dev, pmppriv->bSetRxBssid = _TRUE; } + if (bSetRxframe) { + if (strncmp(input, "frametype beacon", 16) == 0) + pmppriv->brx_filter_beacon = _TRUE; + else + pmppriv->brx_filter_beacon = _FALSE; + } if (bmac_filter) { pmppriv->bmac_filter = bmac_filter; @@ -1064,7 +1114,6 @@ int rtw_mp_pwrtrk(struct net_device *dev, u32 thermal; s32 ret; PADAPTER padapter = rtw_netdev_priv(dev); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); u8 input[wrqu->length]; if (copy_from_user(input, wrqu->pointer, wrqu->length)) @@ -1122,61 +1171,102 @@ int rtw_mp_thermal(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { - u8 val; - int bwrite = 1; - -#ifdef CONFIG_RTL8188E - u16 addr = EEPROM_THERMAL_METER_88E; -#endif -#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) - u16 addr = EEPROM_THERMAL_METER_8812; -#endif -#ifdef CONFIG_RTL8192E - u16 addr = EEPROM_THERMAL_METER_8192E; -#endif -#ifdef CONFIG_RTL8723B - u16 addr = EEPROM_THERMAL_METER_8723B; -#endif -#ifdef CONFIG_RTL8703B - u16 addr = EEPROM_THERMAL_METER_8703B; -#endif -#ifdef CONFIG_RTL8723D - u16 addr = EEPROM_THERMAL_METER_8723D; -#endif -#ifdef CONFIG_RTL8188F - u16 addr = EEPROM_THERMAL_METER_8188F; -#endif -#ifdef CONFIG_RTL8822B - u16 addr = EEPROM_THERMAL_METER_8822B; -#endif -#ifdef CONFIG_RTL8821C - u16 addr = EEPROM_THERMAL_METER_8821C; -#endif + u8 val[4] = {0}; + u8 ret = 0; + u16 ther_path_addr[4] = {0}; u16 cnt = 1; u16 max_available_size = 0; PADAPTER padapter = rtw_netdev_priv(dev); + int rfpath = RF_PATH_A; + +#ifdef CONFIG_RTL8188E + ther_path_addr[0] = EEPROM_THERMAL_METER_88E; +#endif +#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) + ther_path_addr[0] = EEPROM_THERMAL_METER_8812; +#endif +#ifdef CONFIG_RTL8192E + ther_path_addr[0] = EEPROM_THERMAL_METER_8192E; +#endif +#ifdef CONFIG_RTL8192F + ther_path_addr[0] = EEPROM_THERMAL_METER_8192F; +#endif +#ifdef CONFIG_RTL8723B + ther_path_addr[0] = EEPROM_THERMAL_METER_8723B; +#endif +#ifdef CONFIG_RTL8703B + ther_path_addr[0] = EEPROM_THERMAL_METER_8703B; +#endif +#ifdef CONFIG_RTL8723D + ther_path_addr[0] = EEPROM_THERMAL_METER_8723D; +#endif +#ifdef CONFIG_RTL8188F + ther_path_addr[0] = EEPROM_THERMAL_METER_8188F; +#endif +#ifdef CONFIG_RTL8188GTV + ther_path_addr[0] = EEPROM_THERMAL_METER_8188GTV; +#endif +#ifdef CONFIG_RTL8822B + ther_path_addr[0] = EEPROM_THERMAL_METER_8822B; +#endif +#ifdef CONFIG_RTL8821C + ther_path_addr[0] = EEPROM_THERMAL_METER_8821C; +#endif +#ifdef CONFIG_RTL8710B + ther_path_addr[0] = EEPROM_THERMAL_METER_8710B; +#endif +#ifdef CONFIG_RTL8822C + ther_path_addr[0] = EEPROM_THERMAL_METER_A_8822C; + ther_path_addr[1] = EEPROM_THERMAL_METER_B_8822C; +#endif if (copy_from_user(extra, wrqu->pointer, wrqu->length)) return -EFAULT; - bwrite = strncmp(extra, "write", 6);/* strncmp TRUE is 0*/ - - GetThermalMeter(padapter, &val); - - if (bwrite == 0) { - /*RTW_INFO("to write val:%d",val);*/ - EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); - if (2 > max_available_size) { + if ((strncmp(extra, "write", 6) == 0)) { + int i; + u16 raw_cursize = 0, raw_maxsize = 0; +#ifdef RTW_HALMAC + raw_maxsize = efuse_GetavailableSize(padapter); +#else + efuse_GetCurrentSize(padapter, &raw_cursize); + raw_maxsize = efuse_GetMaxSize(padapter); +#endif + RTW_INFO("[eFuse available raw size]= %d bytes\n", raw_maxsize - raw_cursize); + if (2 > raw_maxsize - raw_cursize) { RTW_INFO("no available efuse!\n"); return -EFAULT; } - if (rtw_efuse_map_write(padapter, addr, cnt, &val) == _FAIL) { - RTW_INFO("rtw_efuse_map_write error\n"); - return -EFAULT; + + for (i = 0; i < GET_HAL_RFPATH_NUM(padapter); i++) { + GetThermalMeter(padapter, i , &val[i]); + if (ther_path_addr[i] != 0 && val[i] != 0) { + if (rtw_efuse_map_write(padapter, ther_path_addr[i], cnt, &val[i]) == _FAIL) { + RTW_INFO("Error efuse write thermal addr 0x%x ,val = 0x%x\n", ther_path_addr[i], val[i]); + return -EFAULT; + } + } else { + RTW_INFO("Error efuse write thermal Null addr,val \n"); + return -EFAULT; + } } - sprintf(extra, " efuse write ok :%d", val); - } else - sprintf(extra, "%d", val); + _rtw_memset(extra, 0, wrqu->length); + sprintf(extra, " efuse write ok :%d", val[0]); + } else { + ret = sscanf(extra, "%d", &rfpath); + if (ret < 1) { + rfpath = RF_PATH_A; + RTW_INFO("default thermal of path(%d)\n", rfpath); + } + if (rfpath >= GET_HAL_RFPATH_NUM(padapter)) + return -EINVAL; + + RTW_INFO("read thermal of path(%d)\n", rfpath); + GetThermalMeter(padapter, rfpath, &val[0]); + + _rtw_memset(extra, 0, wrqu->length); + sprintf(extra, "%d", val[0]); + } wrqu->length = strlen(extra); return 0; @@ -1189,7 +1279,6 @@ int rtw_mp_reset_stats(struct net_device *dev, struct iw_point *wrqu, char *extra) { struct mp_priv *pmp_priv; - struct pkt_attrib *pattrib; PADAPTER padapter = rtw_netdev_priv(dev); pmp_priv = &padapter->mppriv; @@ -1216,11 +1305,7 @@ int rtw_mp_dump(struct net_device *dev, struct iw_point *wrqu, char *extra) { struct mp_priv *pmp_priv; - struct pkt_attrib *pattrib; - u32 value; u8 input[wrqu->length]; - u8 rf_type, path_nums = 0; - u32 i, j = 1, path; PADAPTER padapter = rtw_netdev_priv(dev); pmp_priv = &padapter->mppriv; @@ -1245,23 +1330,52 @@ int rtw_mp_phypara(struct net_device *dev, PADAPTER padapter = rtw_netdev_priv(dev); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); char input[wrqu->length]; - u32 valxcap, ret; + u32 invalxcap = 0, ret = 0, bwrite_xcap = 0, hwxtaladdr = 0; + u16 pgval; + if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; - RTW_INFO("%s:iwpriv in=%s\n", __func__, input); + RTW_INFO("%s:priv in=%s\n", __func__, input); + bwrite_xcap = (strncmp(input, "write_xcap=", 11) == 0) ? 1 : 0; - ret = sscanf(input, "xcap=%d", &valxcap); + if (bwrite_xcap == 1) { + ret = sscanf(input, "write_xcap=%d", &invalxcap); + invalxcap = invalxcap & 0x7f; /* xtal bit 0 ~6 */ + RTW_INFO("get crystal_cap %d\n", invalxcap); - pHalData->crystal_cap = (u8)valxcap; - hal_set_crystal_cap(padapter , valxcap); + if (IS_HARDWARE_TYPE_8822C(padapter) && ret == 1) { + hwxtaladdr = 0x110; + pgval = invalxcap | 0x80; /* reserved default bit7 on */ + pgval = pgval | pgval << 8; /* xtal xi/xo efuse 0x110 0x111 */ + + RTW_INFO("Get crystal_cap 0x%x\n", pgval); + if (rtw_efuse_map_write(padapter, hwxtaladdr, 2, (u8*)&pgval) == _FAIL) { + RTW_INFO("%s: rtw_efuse_map_write xcap error!!\n", __func__); + sprintf(extra, "write xcap pgdata fail"); + ret = -EFAULT; + } else + sprintf(extra, "write xcap pgdata ok"); + + } + } else { + ret = sscanf(input, "xcap=%d", &invalxcap); + + if (ret == 1) { + pHalData->crystal_cap = (u8)invalxcap; + RTW_INFO("%s:crystal_cap=%d\n", __func__, pHalData->crystal_cap); + + if (rtw_phydm_set_crystal_cap(padapter, pHalData->crystal_cap) == _FALSE) { + RTW_ERR("set crystal_cap failed\n"); + rtw_warn_on(1); + } + sprintf(extra, "Set xcap=%d", invalxcap); + } + } - sprintf(extra, "Set xcap=%d", valxcap); wrqu->length = strlen(extra) + 1; - - return 0; - + return ret; } @@ -1272,7 +1386,9 @@ int rtw_mp_SetRFPath(struct net_device *dev, PADAPTER padapter = rtw_netdev_priv(dev); char input[wrqu->length]; int bMain = 1, bTurnoff = 1; +#ifdef CONFIG_ANTENNA_DIVERSITY u8 ret = _TRUE; +#endif RTW_INFO("%s:iwpriv in=%s\n", __func__, input); @@ -1438,6 +1554,60 @@ int rtw_mp_lck(struct net_device *dev, return 0; } +int rtw_mp_dpk(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + PADAPTER padapter = rtw_netdev_priv(dev); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_struct *pDM_Odm = &pHalData->odmpriv; + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); + + u8 bdpk = 0; + u8 ips_mode = IPS_NUM; /* init invalid value */ + u8 lps_mode = PS_MODE_NUM; /* init invalid value */ + + if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) + return -EFAULT; + + *(extra + wrqu->data.length) = '\0'; + + if (strncmp(extra, "off", 3) == 0 && strlen(extra) < 4) { + pDM_Odm->dpk_info.is_dpk_enable = 0; + halrf_dpk_enable_disable(pDM_Odm); + sprintf(extra, "set dpk off\n"); + + } else if (strncmp(extra, "on", 2) == 0 && strlen(extra) < 3) { + pDM_Odm->dpk_info.is_dpk_enable = 1; + halrf_dpk_enable_disable(pDM_Odm); + sprintf(extra, "set dpk on\n"); + } else { +#ifdef CONFIG_LPS + lps_mode = pwrctrlpriv->power_mgnt;/* keep org value */ + rtw_pm_set_lps(padapter, PS_MODE_ACTIVE); +#endif +#ifdef CONFIG_IPS + ips_mode = pwrctrlpriv->ips_mode;/* keep org value */ + rtw_pm_set_ips(padapter, IPS_NONE); +#endif + rtw_mp_trigger_dpk(padapter); + if (padapter->registrypriv.mp_mode == 0) { +#ifdef CONFIG_IPS + rtw_pm_set_ips(padapter, ips_mode); +#endif /* CONFIG_IPS */ + +#ifdef CONFIG_LPS + rtw_pm_set_lps(padapter, lps_mode); +#endif /* CONFIG_LPS */ + } + sprintf(extra, "set dpk trigger\n"); + } + + wrqu->data.length = strlen(extra); + + return 0; +} + int rtw_mp_getver(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) @@ -1476,6 +1646,8 @@ int rtw_mp_mon(struct net_device *dev, LeaveAllPowerSaveMode(padapter); #ifdef CONFIG_MP_INCLUDED + if (init_mp_priv(padapter) == _FAIL) + RTW_INFO("%s: initialize MP private data Fail!\n", __func__); padapter->mppriv.channel = 6; bstart = strncmp(extra, "start", 5); /* strncmp TRUE is 0*/ @@ -1499,7 +1671,7 @@ int rtw_mp_mon(struct net_device *dev, if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { rtw_disassoc_cmd(padapter, 500, 0); rtw_indicate_disconnect(padapter, 0, _FALSE); - /*rtw_free_assoc_resources_cmd(padapter, _TRUE);*/ + /*rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);*/ } rtw_pm_set_ips(padapter, IPS_NORMAL); sprintf(extra, "monitor mode Stop\n"); @@ -1511,9 +1683,7 @@ int rtw_mp_mon(struct net_device *dev, int rtw_mp_pretx_proc(PADAPTER padapter, u8 bStartTest, char *extra) { - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct mp_priv *pmp_priv = &padapter->mppriv; - PMPT_CONTEXT pMptCtx = &(padapter->mppriv.mpt_ctx); char *pextra = extra; switch (pmp_priv->mode) { @@ -1569,7 +1739,9 @@ int rtw_mp_pretx_proc(PADAPTER padapter, u8 bStartTest, char *extra) rtw_msleep_os(5); } #ifdef CONFIG_80211N_HT - pmp_priv->tx.attrib.ht_en = 1; + if(padapter->registrypriv.ht_enable && + is_supported_ht(padapter->registrypriv.wireless_mode)) + pmp_priv->tx.attrib.ht_en = 1; #endif pmp_priv->tx.stop = 0; pmp_priv->tx.count = 1; @@ -1599,10 +1771,12 @@ int rtw_mp_tx(struct net_device *dev, HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct mp_priv *pmp_priv = &padapter->mppriv; PMPT_CONTEXT pMptCtx = &(padapter->mppriv.mpt_ctx); - struct registry_priv *pregistrypriv = &padapter->registrypriv; char *pextra = extra; u32 bandwidth = 0, sg = 0, channel = 6, txpower = 40, rate = 108, ant = 0, txmode = 1, count = 0; - u8 i = 0, j = 0, bStartTest = 1, status = 0, Idx = 0, tmpU1B = 0; + u8 bStartTest = 1, status = 0; +#ifdef CONFIG_MP_VHT_HW_TX_MODE + u8 Idx = 0, tmpU1B; +#endif u16 antenna = 0; if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) @@ -1919,7 +2093,6 @@ int rtw_mp_rx(struct net_device *dev, PADAPTER padapter = rtw_netdev_priv(dev); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct mp_priv *pmp_priv = &padapter->mppriv; - PMPT_CONTEXT pMptCtx = &(padapter->mppriv.mpt_ctx); char *pextra = extra; u32 bandwidth = 0, sg = 0, channel = 6, ant = 0; u16 antenna = 0; @@ -2040,19 +2213,17 @@ int rtw_mp_hwtx(struct net_device *dev, union iwreq_data *wrqu, char *extra) { PADAPTER padapter = rtw_netdev_priv(dev); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct mp_priv *pmp_priv = &padapter->mppriv; PMPT_CONTEXT pMptCtx = &(padapter->mppriv.mpt_ctx); -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8821B) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) - u8 input[wrqu->data.length]; - - if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) +#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8821B) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) + if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) return -EFAULT; + *(extra + wrqu->data.length) = '\0'; _rtw_memset(&pMptCtx->PMacTxInfo, 0, sizeof(RT_PMAC_TX_INFO)); - _rtw_memcpy((void *)&pMptCtx->PMacTxInfo, (void *)input, sizeof(RT_PMAC_TX_INFO)); - _rtw_memset(wrqu->data.pointer, 0, wrqu->data.length); + _rtw_memcpy((void *)&pMptCtx->PMacTxInfo, (void *)extra, sizeof(RT_PMAC_TX_INFO)); + _rtw_memset(extra, 0, wrqu->data.length); if (pMptCtx->PMacTxInfo.bEnPMacTx == 1 && pmp_priv->mode != MP_ON) { sprintf(extra, "MP Tx Running, Please Set PMac Tx Mode Stop\n"); @@ -2080,7 +2251,7 @@ int rtw_mp_pwrlmt(struct net_device *dev, return -EFAULT; *(extra + wrqu->data.length) = '\0'; -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT pwrlimtstat = registry_par->RegEnableTxPowerLimit; if (strncmp(extra, "off", 3) == 0 && strlen(extra) < 4) { padapter->registrypriv.RegEnableTxPowerLimit = 0; @@ -2125,6 +2296,35 @@ int rtw_mp_pwrbyrate(struct net_device *dev, return 0; } + +int rtw_mp_dpk_track(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + PADAPTER padapter = rtw_netdev_priv(dev); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_struct *pDM_Odm = &pHalData->odmpriv; + + u8 dpk_track_state = 0; + + if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) + return -EFAULT; + + *(extra + wrqu->data.length) = '\0'; + + if (strncmp(extra, "off", 3) == 0 && strlen(extra) < 4) { + halrf_set_dpk_track(pDM_Odm, FALSE); + sprintf(extra, "set dpk track off\n"); + + } else if (strncmp(extra, "on", 2) == 0 && strlen(extra) < 3) { + halrf_set_dpk_track(pDM_Odm, TRUE); + sprintf(extra, "set dpk track on\n"); + } + + wrqu->data.length = strlen(extra); + return 0; +} + int rtw_efuse_mask_file(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) @@ -2152,11 +2352,10 @@ int rtw_efuse_mask_file(struct net_device *dev, return 0; } if (strncmp(extra, "data,", 5) == 0) { - u8 *pch, *pdata; + u8 *pch; char *ptmp, tmp; u8 count = 0; u8 i = 0; - u32 datalen = 0; ptmp = extra; pch = strsep(&ptmp, ","); @@ -2288,6 +2487,200 @@ int rtw_bt_efuse_file_map(struct net_device *dev, return 0; } + +static inline void dump_buf(u8 *buf, u32 len) +{ + u32 i; + + RTW_INFO("-----------------Len %d----------------\n", len); + for (i = 0; i < len; i++) + RTW_INFO("%2.2x-", *(buf + i)); + RTW_INFO("\n"); +} + +int rtw_mp_link(struct net_device *dev, + struct iw_request_info *info, + struct iw_point *wrqu, char *extra) +{ + PADAPTER padapter = rtw_netdev_priv(dev); + struct mp_priv *pmp_priv; + char input[wrqu->length]; + int bgetrxdata = 0, btxdata = 0, bsetbt = 0; + u8 err = 0 , num; + u32 i = 0, datalen = 0, j = 0, jj, kk, waittime = 0, n = 0, btdata; + u16 addr = 0xff, cnts = 0, bttypen = 0, val = 0x00, ret = 0; + char *pextra = NULL; + u8 *setdata = NULL; + char *pch, *ptmp, *token, *tmp[4] = {0x00, 0x00, 0x00}; + + pmp_priv = &padapter->mppriv; + + if (copy_from_user(input, wrqu->pointer, wrqu->length)) + return -EFAULT; + + _rtw_memset(extra, 0, wrqu->length); + + RTW_INFO("%s: in=%s\n", __func__, input); + + bgetrxdata = (strncmp(input, "rxdata", 6) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ + btxdata = (strncmp(input, "txdata", 6) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ + bsetbt = (strncmp(input, "setbt", 5) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ + + if (bgetrxdata) { + RTW_INFO("%s: in= 1 \n", __func__); + if (pmp_priv->mplink_brx == _TRUE) { + + while (waittime < 100 && pmp_priv->mplink_brx == _FALSE) { + if (pmp_priv->mplink_brx == _FALSE) + rtw_msleep_os(10); + else + break; + waittime++; + } + if (pmp_priv->mplink_brx == _TRUE) { + sprintf(extra, "\n"); + pextra = extra + strlen(extra); + for (i = 0; i < pmp_priv->mplink_rx_len; i ++) { + pextra += sprintf(pextra, "%02x:", pmp_priv->mplink_buf[i]); + } + _rtw_memset(pmp_priv->mplink_buf, '\0' , sizeof(pmp_priv->mplink_buf)); + pmp_priv->mplink_brx = _FALSE; + } + } + } else if (btxdata) { + struct pkt_attrib *pattrib; + + pch = input; + setdata = rtw_zmalloc(1024); + if (setdata == NULL) { + err = -ENOMEM; + goto exit; + } + + i = 0; + while ((token = strsep(&pch, ",")) != NULL) { + if (i > 2) + break; + tmp[i] = token; + i++; + } + + /* tmp[0],[1],[2] */ + /* txdata,00e04c871200........... */ + if (strcmp(tmp[0], "txdata") == 0) { + if ((tmp[1] == NULL)) { + err = -EINVAL; + goto exit; + } + } + + datalen = strlen(tmp[1]); + if (datalen % 2) { + err = -EINVAL; + goto exit; + } + datalen /= 2; + if (datalen == 0) { + err = -EINVAL; + goto exit; + } + + RTW_INFO("%s: data len=%d\n", __FUNCTION__, datalen); + RTW_INFO("%s: tx data=%s\n", __FUNCTION__, tmp[1]); + + for (jj = 0, kk = 0; jj < datalen; jj++, kk += 2) + setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]); + + dump_buf(setdata, datalen); + _rtw_memset(pmp_priv->mplink_buf, '\0' , sizeof(pmp_priv->mplink_buf)); + _rtw_memcpy(pmp_priv->mplink_buf, setdata, datalen); + + pattrib = &pmp_priv->tx.attrib; + pattrib->pktlen = datalen; + pmp_priv->tx.count = 1; + pmp_priv->tx.stop = 0; + pmp_priv->mplink_btx = _TRUE; + SetPacketTx(padapter); + pmp_priv->mode = MP_PACKET_TX; + + } else if (bsetbt) { + +#ifdef CONFIG_BT_COEXIST + pch = input; + i = 0; + + while ((token = strsep(&pch, ",")) != NULL) { + if (i > 3) + break; + tmp[i] = token; + i++; + } + + if (tmp[1] == NULL) { + err = -EINVAL; + goto exit; + } + + if (strcmp(tmp[1], "scbd") == 0) { + u16 org_val = 0x8002, pre_val, read_score_board_val; + u8 state; + + pre_val = (rtw_read16(padapter,(0xaa))) & 0x7fff; + + if (tmp[2] != NULL) { + state = simple_strtoul(tmp[2], &ptmp, 10); + + if (state) + org_val = org_val | BIT6; + else + org_val = org_val & (~BIT6); + + if (org_val != pre_val) { + pre_val = org_val; + rtw_write16(padapter, 0xaa, org_val); + RTW_INFO("%s,setbt scbd write org_val = 0x%x , pre_val = 0x%x\n", __func__, org_val, pre_val); + } else { + RTW_INFO("%s,setbt scbd org_val = 0x%x ,pre_val = 0x%x\n", __func__, org_val, pre_val); + } + } else { + read_score_board_val = (rtw_read16(padapter,(0xaa))) & 0x7fff; + RTW_INFO("%s,read_score_board_val = 0x%x\n", __func__, read_score_board_val); + } + goto exit; + + } else if (strcmp(tmp[1], "testmode") == 0) { + + if (tmp[2] == NULL) { + err = -EINVAL; + goto exit; + } + + val = simple_strtoul(tmp[2], &ptmp, 16); + RTW_INFO("get tmp, type %s, val =0x%x!\n", tmp[1], val); + + if (tmp[2] != NULL) { + _rtw_memset(extra, 0, wrqu->length); + ret = rtw_btcoex_btset_testmode(padapter, val); + if (!CHECK_STATUS_CODE_FROM_BT_MP_OPER_RET(ret, BT_STATUS_BT_OP_SUCCESS)) { + RTW_INFO("%s: BT_OP fail = 0x%x!\n", __FUNCTION__, val); + sprintf(extra, "BT_OP fail 0x%x!\n", val); + } else + sprintf(extra, "Set BT_OP 0x%x done!\n", val); + } + + } +#endif /* CONFIG_BT_COEXIST */ + } + +exit: + if (setdata) + rtw_mfree(setdata, 1024); + + wrqu->length = strlen(extra); + return err; + +} + #if defined(CONFIG_RTL8723B) int rtw_mp_SetBT(struct net_device *dev, struct iw_request_info *info, diff --git a/os_dep/linux/mlme_linux.c b/os_dep/linux/mlme_linux.c index 418fd69..247e45e 100644 --- a/os_dep/linux/mlme_linux.c +++ b/os_dep/linux/mlme_linux.c @@ -67,7 +67,13 @@ void rtw_os_indicate_connect(_adapter *adapter) #endif /* CONFIG_IOCTL_CFG80211 */ rtw_indicate_wx_assoc_event(adapter); - rtw_netif_carrier_on(adapter->pnetdev); + +#ifdef CONFIG_RTW_MESH +#if CONFIG_RTW_MESH_CTO_MGATE_CARRIER + if (!rtw_mesh_cto_mgate_required(adapter)) +#endif +#endif + rtw_netif_carrier_on(adapter->pnetdev); if (adapter->pid[2] != 0) rtw_signal_process(adapter->pid[2], SIGALRM); @@ -96,7 +102,6 @@ void rtw_reset_securitypriv(_adapter *adapter) u32 backupTKIPcountermeasure_time = 0; /* add for CONFIG_IEEE80211W, none 11w also can use */ _irqL irqL; - struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; _enter_critical_bh(&adapter->security_key_mutex, &irqL); @@ -125,6 +130,8 @@ void rtw_reset_securitypriv(_adapter *adapter) adapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; adapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; + adapter->securitypriv.extauth_status = WLAN_STATUS_UNSPECIFIED_FAILURE; + } else { /* reset values in securitypriv */ /* if(adapter->mlmepriv.fw_state & WIFI_STATION_STATE) */ /* { */ @@ -140,6 +147,8 @@ void rtw_reset_securitypriv(_adapter *adapter) psec_priv->ndisauthtype = Ndis802_11AuthModeOpen; psec_priv->ndisencryptstatus = Ndis802_11WEPDisabled; /* } */ + + psec_priv->extauth_status = WLAN_STATUS_UNSPECIFIED_FAILURE; } /* add for CONFIG_IEEE80211W, none 11w also can use */ _exit_critical_bh(&adapter->security_key_mutex, &irqL); @@ -378,9 +387,6 @@ int hostapd_mode_init(_adapter *padapter) /* pnetdev->wireless_handlers = NULL; */ -#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX - pnetdev->features |= NETIF_F_IP_CSUM; -#endif diff --git a/os_dep/linux/os_intfs.c b/os_dep/linux/os_intfs.c index d01b91b..adc1963 100644 --- a/os_dep/linux/os_intfs.c +++ b/os_dep/linux/os_intfs.c @@ -17,12 +17,6 @@ #include #include -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) - - #error "Shall be Linux or Windows, but not both!\n" - -#endif - MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("Realtek Wireless Lan Driver"); MODULE_AUTHOR("Realtek Semiconductor Corp."); @@ -32,11 +26,15 @@ MODULE_VERSION(DRIVERVERSION); int rtw_chip_version = 0x00; int rtw_rfintfs = HWPI; int rtw_lbkmode = 0;/* RTL8712_AIR_TRX; */ - +#ifdef DBG_LA_MODE +int rtw_la_mode_en=0; +module_param(rtw_la_mode_en, int, 0644); +#endif int rtw_network_mode = Ndis802_11IBSS;/* Ndis802_11Infrastructure; */ /* infra, ad-hoc, auto */ /* NDIS_802_11_SSID ssid; */ int rtw_channel = 1;/* ad-hoc support requirement */ int rtw_wireless_mode = WIRELESS_MODE_MAX; +module_param(rtw_wireless_mode, int, 0644); int rtw_vrtl_carrier_sense = AUTO_VCS; int rtw_vcs_type = RTS_CTS; int rtw_rts_thresh = 2347; @@ -45,38 +43,66 @@ int rtw_preamble = PREAMBLE_LONG;/* long, short, auto */ int rtw_scan_mode = 1;/* active, passive */ /* int smart_ps = 1; */ #ifdef CONFIG_POWER_SAVING + /* IPS configuration */ + int rtw_ips_mode = RTW_IPS_MODE; + + /* LPS configuration */ +/* RTW_LPS_MODE=0:disable, 1:LPS , 2:LPS with clock gating, 3: power gating */ +#if (RTW_LPS_MODE > 0) int rtw_power_mgnt = PS_MODE_MAX; - #ifdef CONFIG_IPS_LEVEL_2 - int rtw_ips_mode = IPS_LEVEL_2; - #else - int rtw_ips_mode = IPS_NORMAL; - #endif /*CONFIG_IPS_LEVEL_2*/ #ifdef CONFIG_USB_HCI int rtw_lps_level = LPS_NORMAL; /*USB default LPS level*/ #else /*SDIO,PCIE*/ - #if defined(CONFIG_LPS_PG) - /*int rtw_lps_level = LPS_PG;*//*FW not support yet*/ - int rtw_lps_level = LPS_LCLK; - #elif defined(CONFIG_LPS_LCLK) - int rtw_lps_level = LPS_LCLK; - #else - int rtw_lps_level = LPS_NORMAL; - #endif + int rtw_lps_level = (RTW_LPS_MODE - 1); #endif/*CONFIG_USB_HCI*/ -#else /* !CONFIG_POWER_SAVING */ +#else int rtw_power_mgnt = PS_MODE_ACTIVE; - int rtw_ips_mode = IPS_NONE; int rtw_lps_level = LPS_NORMAL; +#endif + + int rtw_lps_chk_by_tp = 1; + + /* WOW LPS configuration */ +#ifdef CONFIG_WOWLAN +/* RTW_WOW_LPS_MODE=0:disable, 1:LPS , 2:LPS with clock gating, 3: power gating */ +#if (RTW_WOW_LPS_MODE > 0) + int rtw_wow_power_mgnt = PS_MODE_MAX; + int rtw_wow_lps_level = (RTW_WOW_LPS_MODE - 1); +#else + int rtw_wow_power_mgnt = PS_MODE_ACTIVE; + int rtw_wow_lps_level = LPS_NORMAL; +#endif +#endif /* CONFIG_WOWLAN */ + +#else /* !CONFIG_POWER_SAVING */ + int rtw_ips_mode = IPS_NONE; + int rtw_power_mgnt = PS_MODE_ACTIVE; + int rtw_lps_level = LPS_NORMAL; + int rtw_lps_chk_by_tp = 0; +#ifdef CONFIG_WOWLAN + int rtw_wow_power_mgnt = PS_MODE_ACTIVE; + int rtw_wow_lps_level = LPS_NORMAL; +#endif /* CONFIG_WOWLAN */ #endif /* CONFIG_POWER_SAVING */ + module_param(rtw_ips_mode, int, 0644); MODULE_PARM_DESC(rtw_ips_mode, "The default IPS mode"); module_param(rtw_lps_level, int, 0644); MODULE_PARM_DESC(rtw_lps_level, "The default LPS level"); -/* LPS: +module_param(rtw_lps_chk_by_tp, int, 0644); + +#ifdef CONFIG_WOWLAN +module_param(rtw_wow_power_mgnt, int, 0644); +MODULE_PARM_DESC(rtw_wow_power_mgnt, "The default WOW LPS mode"); +module_param(rtw_wow_lps_level, int, 0644); +MODULE_PARM_DESC(rtw_wow_lps_level, "The default WOW LPS level"); +#endif /* CONFIG_WOWLAN */ + +/* LPS: * rtw_smart_ps = 0 => TX: pwr bit = 1, RX: PS_Poll * rtw_smart_ps = 1 => TX: pwr bit = 0, RX: PS_Poll * rtw_smart_ps = 2 => TX: pwr bit = 0, RX: NullData with pwr bit = 0 @@ -85,8 +111,8 @@ int rtw_smart_ps = 2; int rtw_max_bss_cnt = 0; module_param(rtw_max_bss_cnt, int, 0644); -#ifdef CONFIG_WMMPS_STA -/* WMMPS: +#ifdef CONFIG_WMMPS_STA +/* WMMPS: * rtw_smart_ps = 0 => Only for fw test * rtw_smart_ps = 1 => Refer to Beacon's TIM Bitmap * rtw_smart_ps = 2 => Don't refer to Beacon's TIM Bitmap @@ -109,6 +135,7 @@ module_param(rtw_dynamic_agg_enable, int, 0644); /* set log level when inserting driver module, default log level is _DRV_INFO_ = 4, * please refer to "How_to_set_driver_debug_log_level.doc" to set the available level. */ +#ifdef CONFIG_RTW_DEBUG #ifdef RTW_LOG_LEVEL uint rtw_drv_log_level = (uint)RTW_LOG_LEVEL; /* from Makefile */ #else @@ -116,7 +143,7 @@ module_param(rtw_dynamic_agg_enable, int, 0644); #endif module_param(rtw_drv_log_level, uint, 0644); MODULE_PARM_DESC(rtw_drv_log_level, "set log level when insert driver module, default log level is _DRV_INFO_ = 4"); - +#endif int rtw_radio_enable = 1; int rtw_long_retry_lmt = 7; int rtw_short_retry_lmt = 7; @@ -149,17 +176,47 @@ int rtw_uapsd_ac_enable = 0x0; #if defined(CONFIG_RTL8814A) int rtw_pwrtrim_enable = 2; /* disable kfree , rename to power trim disable */ -#elif defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B) +#elif defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) /*PHYDM API, must enable by default*/ int rtw_pwrtrim_enable = 1; #else int rtw_pwrtrim_enable = 0; /* Default Enalbe power trim by efuse config */ #endif +#if CONFIG_TX_AC_LIFETIME +uint rtw_tx_aclt_flags = CONFIG_TX_ACLT_FLAGS; +module_param(rtw_tx_aclt_flags, uint, 0644); +MODULE_PARM_DESC(rtw_tx_aclt_flags, "device TX AC queue packet lifetime control flags"); + +static uint rtw_tx_aclt_conf_default[3] = CONFIG_TX_ACLT_CONF_DEFAULT; +static uint rtw_tx_aclt_conf_default_num = 0; +module_param_array(rtw_tx_aclt_conf_default, uint, &rtw_tx_aclt_conf_default_num, 0644); +MODULE_PARM_DESC(rtw_tx_aclt_conf_default, "device TX AC queue lifetime config for default status"); + +#ifdef CONFIG_TX_MCAST2UNI +static uint rtw_tx_aclt_conf_ap_m2u[3] = CONFIG_TX_ACLT_CONF_AP_M2U; +static uint rtw_tx_aclt_conf_ap_m2u_num = 0; +module_param_array(rtw_tx_aclt_conf_ap_m2u, uint, &rtw_tx_aclt_conf_ap_m2u_num, 0644); +MODULE_PARM_DESC(rtw_tx_aclt_conf_ap_m2u, "device TX AC queue lifetime config for AP mode M2U status"); +#endif + +#ifdef CONFIG_RTW_MESH +static uint rtw_tx_aclt_conf_mesh[3] = CONFIG_TX_ACLT_CONF_MESH; +static uint rtw_tx_aclt_conf_mesh_num = 0; +module_param_array(rtw_tx_aclt_conf_mesh, uint, &rtw_tx_aclt_conf_mesh_num, 0644); +MODULE_PARM_DESC(rtw_tx_aclt_conf_mesh, "device TX AC queue lifetime config for MESH status"); +#endif +#endif /* CONFIG_TX_AC_LIFETIME */ + uint rtw_tx_bw_mode = 0x21; module_param(rtw_tx_bw_mode, uint, 0644); MODULE_PARM_DESC(rtw_tx_bw_mode, "The max tx bw for 2.4G and 5G. format is the same as rtw_bw_mode"); +#ifdef CONFIG_FW_HANDLE_TXBCN +uint rtw_tbtt_rpt = 0; /*ROOT AP - BIT0, VAP1 - BIT1, VAP2 - BIT2, VAP3 - VAP3, FW report TBTT INT by C2H*/ +module_param(rtw_tbtt_rpt, uint, 0644); +#endif + #ifdef CONFIG_80211N_HT int rtw_ht_enable = 1; /* 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160MHz, 4: 80+80MHz @@ -172,8 +229,10 @@ int rtw_bw_mode = 0x21; #endif int rtw_ampdu_enable = 1;/* for enable tx_ampdu , */ /* 0: disable, 0x1:enable */ int rtw_rx_stbc = 1;/* 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ */ -#if (defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)) && defined(CONFIG_PCI_HCI) +#if (defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C)) && defined(CONFIG_PCI_HCI) int rtw_rx_ampdu_amsdu = 2;/* 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on */ +#elif ((defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C)) && defined(CONFIG_SDIO_HCI)) +int rtw_rx_ampdu_amsdu = 1; #else int rtw_rx_ampdu_amsdu;/* 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on */ #endif @@ -214,6 +273,7 @@ int rtw_short_gi = 0xf; int rtw_ldpc_cap = 0x33; /* BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx */ int rtw_stbc_cap = 0x13; + /* * BIT0: Enable VHT SU Beamformer * BIT1: Enable VHT SU Beamformee @@ -248,11 +308,7 @@ module_param(rtw_rf_config, int, 0644); int rtw_check_hw_status = 0; int rtw_low_power = 0; -#ifdef CONFIG_WIFI_TEST - int rtw_wifi_spec = 1;/* for wifi test */ -#else - int rtw_wifi_spec = 0; -#endif +int rtw_wifi_spec = 0; int rtw_special_rf_path = 0; /* 0: 2T2R ,1: only turn on path A 1T1R */ @@ -387,6 +443,12 @@ char *rtw_initmac = 0; /* temp mac address if users want to use instead of the #ifdef CONFIG_AP_MODE u8 rtw_bmc_tx_rate = MGN_UNKNOWN; #endif +#ifdef RTW_WOW_STA_MIX +int rtw_wowlan_sta_mix_mode = 1; +#else +int rtw_wowlan_sta_mix_mode = 0; +#endif +module_param(rtw_wowlan_sta_mix_mode, int, 0644); module_param(rtw_pwrtrim_enable, int, 0644); module_param(rtw_initmac, charp, 0644); module_param(rtw_special_rf_path, int, 0644); @@ -515,14 +577,6 @@ uint rtw_adaptivity_mode = CONFIG_RTW_ADAPTIVITY_MODE; module_param(rtw_adaptivity_mode, uint, 0644); MODULE_PARM_DESC(rtw_adaptivity_mode, "0:normal, 1:carrier sense"); -uint rtw_adaptivity_dml = CONFIG_RTW_ADAPTIVITY_DML; -module_param(rtw_adaptivity_dml, uint, 0644); -MODULE_PARM_DESC(rtw_adaptivity_dml, "0:disable, 1:enable"); - -uint rtw_adaptivity_dc_backoff = CONFIG_RTW_ADAPTIVITY_DC_BACKOFF; -module_param(rtw_adaptivity_dc_backoff, uint, 0644); -MODULE_PARM_DESC(rtw_adaptivity_dc_backoff, "DC backoff for Adaptivity"); - int rtw_adaptivity_th_l2h_ini = CONFIG_RTW_ADAPTIVITY_TH_L2H_INI; module_param(rtw_adaptivity_th_l2h_ini, int, 0644); MODULE_PARM_DESC(rtw_adaptivity_th_l2h_ini, "th_l2h_ini for Adaptivity"); @@ -597,7 +651,7 @@ int rtw_tx_pwr_by_rate = CONFIG_TXPWR_BY_RATE_EN; module_param(rtw_tx_pwr_by_rate, int, 0644); MODULE_PARM_DESC(rtw_tx_pwr_by_rate, "0:Disable, 1:Enable, 2: Depend on efuse"); -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT int rtw_tx_pwr_lmt_enable = CONFIG_TXPWR_LIMIT_EN; module_param(rtw_tx_pwr_lmt_enable, int, 0644); MODULE_PARM_DESC(rtw_tx_pwr_lmt_enable, "0:Disable, 1:Enable, 2: Depend on efuse"); @@ -645,6 +699,14 @@ module_param_array(rtw_target_tx_pwr_5g_d, int, &rtw_target_tx_pwr_5g_d_num, 064 MODULE_PARM_DESC(rtw_target_tx_pwr_5g_d, "5G target tx power (unit:dBm) of RF path D for each rate section, should match the real calibrate power, -1: undefined"); #endif /* CONFIG_IEEE80211_BAND_5GHZ */ +int rtw_tsf_update_pause_factor = CONFIG_TSF_UPDATE_PAUSE_FACTOR; +module_param(rtw_tsf_update_pause_factor, int, 0644); +MODULE_PARM_DESC(rtw_tsf_update_pause_factor, "num of bcn intervals to stay TSF update pause status"); + +int rtw_tsf_update_restore_factor = CONFIG_TSF_UPDATE_RESTORE_FACTOR; +module_param(rtw_tsf_update_restore_factor, int, 0644); +MODULE_PARM_DESC(rtw_tsf_update_restore_factor, "num of bcn intervals to stay TSF update restore status"); + #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE char *rtw_phy_file_path = REALTEK_CONFIG_PATH; module_param(rtw_phy_file_path, charp, 0644); @@ -697,6 +759,19 @@ module_param(rtw_dynamic_soml_delay, int, 0644); MODULE_PARM_DESC(rtw_dynamic_soml_delay, "SOML training delay"); #endif +uint rtw_phydm_ability = 0xffffffff; +module_param(rtw_phydm_ability, uint, 0644); + +uint rtw_halrf_ability = 0xffffffff; +module_param(rtw_halrf_ability, uint, 0644); + +#ifdef CONFIG_RTW_MESH +uint rtw_peer_alive_based_preq = 1; +module_param(rtw_peer_alive_based_preq, uint, 0644); +MODULE_PARM_DESC(rtw_peer_alive_based_preq, + "On demand PREQ will reference peer alive status. 0: Off, 1: On"); +#endif + int _netdev_open(struct net_device *pnetdev); int netdev_open(struct net_device *pnetdev); static int netdev_close(struct net_device *pnetdev); @@ -718,6 +793,11 @@ int rtw_mcc_single_tx_cri = MCC_SINGLE_TX_CRITERIA; int rtw_mcc_policy_table_idx = 0; int rtw_mcc_duration = 0; int rtw_mcc_enable_runtime_duration = 1; +#ifdef CONFIG_MCC_PHYDM_OFFLOAD +int rtw_mcc_phydm_offload = 1; +#else +int rtw_mcc_phydm_offload = 0; +#endif module_param(rtw_en_mcc, int, 0644); module_param(rtw_mcc_single_tx_cri, int, 0644); module_param(rtw_mcc_ap_bw20_target_tx_tp, int, 0644); @@ -728,6 +808,7 @@ module_param(rtw_mcc_sta_bw40_target_tx_tp, int, 0644); module_param(rtw_mcc_sta_bw80_target_tx_tp, int, 0644); module_param(rtw_mcc_policy_table_idx, int, 0644); module_param(rtw_mcc_duration, int, 0644); +module_param(rtw_mcc_phydm_offload, int, 0644); #endif /*CONFIG_MCC_MODE */ #ifdef CONFIG_RTW_NAPI @@ -771,6 +852,19 @@ int rtw_fw_param_init = 1; module_param(rtw_fw_param_init, int, 0644); #endif +#ifdef CONFIG_TDMADIG +int rtw_tdmadig_en = 1; +/* +1:MODE_PERFORMANCE +2:MODE_COVERAGE +*/ +int rtw_tdmadig_mode = 1; +int rtw_dynamic_tdmadig = 0; +module_param(rtw_tdmadig_en, int, 0644); +module_param(rtw_tdmadig_mode, int, 0644); +module_param(rtw_dynamic_tdmadig, int, 0644); +#endif/*CONFIG_TDMADIG*/ + #ifdef CONFIG_WOWLAN /* * bit[0]: magic packet wake up @@ -779,6 +873,46 @@ module_param(rtw_fw_param_init, int, 0644); */ uint rtw_wakeup_event = RTW_WAKEUP_EVENT; module_param(rtw_wakeup_event, uint, 0644); +/* + * 0: common WOWLAN + * bit[0]: disable BB RF + * bit[1]: For wireless remote controller with or without connection + */ +uint rtw_suspend_type = RTW_SUSPEND_TYPE; +module_param(rtw_suspend_type, uint, 0644); +#endif + +#if CONFIG_TX_AC_LIFETIME +static void rtw_regsty_load_tx_ac_lifetime(struct registry_priv *regsty) +{ + int i, j; + struct tx_aclt_conf_t *conf; + uint *parm; + + regsty->tx_aclt_flags = (u8)rtw_tx_aclt_flags; + + for (i = 0; i < TX_ACLT_CONF_NUM; i++) { + conf = ®sty->tx_aclt_confs[i]; + if (i == TX_ACLT_CONF_DEFAULT) + parm = rtw_tx_aclt_conf_default; + #ifdef CONFIG_TX_MCAST2UNI + else if (i == TX_ACLT_CONF_AP_M2U) + parm = rtw_tx_aclt_conf_ap_m2u; + #endif + #ifdef CONFIG_RTW_MESH + else if (i == TX_ACLT_CONF_MESH) + parm = rtw_tx_aclt_conf_mesh; + #endif + else + parm = NULL; + + if (parm) { + conf->en = parm[0] & 0xF; + conf->vo_vi = parm[1]; + conf->be_bk = parm[2]; + } + } +} #endif void rtw_regsty_load_target_tx_power(struct registry_priv *regsty) @@ -890,9 +1024,22 @@ uint loadparam(_adapter *padapter) registry_par->scan_mode = (u8)rtw_scan_mode; registry_par->smart_ps = (u8)rtw_smart_ps; registry_par->check_fw_ps = (u8)rtw_check_fw_ps; - registry_par->power_mgnt = (u8)rtw_power_mgnt; - registry_par->ips_mode = (u8)rtw_ips_mode; + #ifdef CONFIG_TDMADIG + registry_par->tdmadig_en = (u8)rtw_tdmadig_en; + registry_par->tdmadig_mode = (u8)rtw_tdmadig_mode; + registry_par->tdmadig_dynamic = (u8) rtw_dynamic_tdmadig; + registry_par->power_mgnt = PS_MODE_ACTIVE; + registry_par->ips_mode = IPS_NONE; + #else + registry_par->power_mgnt = (u8)rtw_power_mgnt; + registry_par->ips_mode = (u8)rtw_ips_mode; + #endif/*CONFIG_TDMADIG*/ registry_par->lps_level = (u8)rtw_lps_level; + registry_par->lps_chk_by_tp = (u8)rtw_lps_chk_by_tp; +#ifdef CONFIG_WOWLAN + registry_par->wow_power_mgnt = (u8)rtw_wow_power_mgnt; + registry_par->wow_lps_level = (u8)rtw_wow_lps_level; +#endif /* CONFIG_WOWLAN */ registry_par->radio_enable = (u8)rtw_radio_enable; registry_par->long_retry_lmt = (u8)rtw_long_retry_lmt; registry_par->short_retry_lmt = (u8)rtw_short_retry_lmt; @@ -923,24 +1070,40 @@ uint loadparam(_adapter *padapter) registry_par->RegPwrTrimEnable = (u8)rtw_pwrtrim_enable; +#if CONFIG_TX_AC_LIFETIME + rtw_regsty_load_tx_ac_lifetime(registry_par); +#endif + registry_par->tx_bw_mode = (u8)rtw_tx_bw_mode; #ifdef CONFIG_80211N_HT registry_par->ht_enable = (u8)rtw_ht_enable; - registry_par->bw_mode = (u8)rtw_bw_mode; - registry_par->ampdu_enable = (u8)rtw_ampdu_enable; - registry_par->rx_stbc = (u8)rtw_rx_stbc; - registry_par->rx_ampdu_amsdu = (u8)rtw_rx_ampdu_amsdu; - registry_par->tx_ampdu_amsdu = (u8)rtw_tx_ampdu_amsdu; - registry_par->short_gi = (u8)rtw_short_gi; - registry_par->ldpc_cap = (u8)rtw_ldpc_cap; - registry_par->stbc_cap = (u8)rtw_stbc_cap; - registry_par->beamform_cap = (u8)rtw_beamform_cap; - registry_par->beamformer_rf_num = (u8)rtw_bfer_rf_number; - registry_par->beamformee_rf_num = (u8)rtw_bfee_rf_number; - rtw_regsty_init_rx_ampdu_sz_limit(registry_par); + if (registry_par->ht_enable && is_supported_ht(registry_par->wireless_mode)) { + registry_par->bw_mode = (u8)rtw_bw_mode; + registry_par->ampdu_enable = (u8)rtw_ampdu_enable; + registry_par->rx_stbc = (u8)rtw_rx_stbc; + registry_par->rx_ampdu_amsdu = (u8)rtw_rx_ampdu_amsdu; + registry_par->tx_ampdu_amsdu = (u8)rtw_tx_ampdu_amsdu; + registry_par->short_gi = (u8)rtw_short_gi; + registry_par->ldpc_cap = (u8)rtw_ldpc_cap; +#if defined(CONFIG_CUSTOMER01_SMART_ANTENNA) + rtw_stbc_cap = 0x0; +#elif defined(CONFIG_RTW_TX_2PATH_EN) + rtw_stbc_cap &= ~(BIT1|BIT5); +#endif + registry_par->stbc_cap = (u8)rtw_stbc_cap; +#if defined(CONFIG_RTW_TX_2PATH_EN) + rtw_beamform_cap &= ~(BIT0|BIT2|BIT4); +#endif + registry_par->beamform_cap = (u8)rtw_beamform_cap; + registry_par->beamformer_rf_num = (u8)rtw_bfer_rf_number; + registry_par->beamformee_rf_num = (u8)rtw_bfee_rf_number; + rtw_regsty_init_rx_ampdu_sz_limit(registry_par); + } +#endif +#ifdef DBG_LA_MODE + registry_par->la_mode_en = (u8)rtw_la_mode_en; #endif - #ifdef CONFIG_80211AC_VHT registry_par->vht_enable = (u8)rtw_vht_enable; registry_par->ampdu_factor = (u8)rtw_ampdu_factor; @@ -1010,9 +1173,6 @@ uint loadparam(_adapter *padapter) #ifdef CONFIG_LAYER2_ROAMING registry_par->max_roaming_times = (u8)rtw_max_roaming_times; -#ifdef CONFIG_INTEL_WIDI - registry_par->max_roaming_times = (u8)rtw_max_roaming_times + 2; -#endif /* CONFIG_INTEL_WIDI */ #endif #ifdef CONFIG_IOL @@ -1033,13 +1193,16 @@ uint loadparam(_adapter *padapter) #endif registry_par->pll_ref_clk_sel = (u8)rtw_pll_ref_clk_sel; -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT registry_par->RegEnableTxPowerLimit = (u8)rtw_tx_pwr_lmt_enable; #endif registry_par->RegEnableTxPowerByRate = (u8)rtw_tx_pwr_by_rate; rtw_regsty_load_target_tx_power(registry_par); + registry_par->tsf_update_pause_factor = (u8)rtw_tsf_update_pause_factor; + registry_par->tsf_update_restore_factor = (u8)rtw_tsf_update_restore_factor; + registry_par->TxBBSwing_2G = (s8)rtw_TxBBSwing_2G; registry_par->TxBBSwing_5G = (s8)rtw_TxBBSwing_5G; registry_par->bEn_RFE = 1; @@ -1058,8 +1221,6 @@ uint loadparam(_adapter *padapter) registry_par->adaptivity_en = (u8)rtw_adaptivity_en; registry_par->adaptivity_mode = (u8)rtw_adaptivity_mode; - registry_par->adaptivity_dml = (u8)rtw_adaptivity_dml; - registry_par->adaptivity_dc_backoff = (u8)rtw_adaptivity_dc_backoff; registry_par->adaptivity_th_l2h_ini = (s8)rtw_adaptivity_th_l2h_ini; registry_par->adaptivity_th_edcca_hl_diff = (s8)rtw_adaptivity_th_edcca_hl_diff; @@ -1102,15 +1263,18 @@ uint loadparam(_adapter *padapter) registry_par->rtw_mcc_policy_table_idx = rtw_mcc_policy_table_idx; registry_par->rtw_mcc_duration = (u8)rtw_mcc_duration; registry_par->rtw_mcc_enable_runtime_duration = rtw_mcc_enable_runtime_duration; + registry_par->rtw_mcc_phydm_offload = rtw_mcc_phydm_offload; #endif /*CONFIG_MCC_MODE */ #ifdef CONFIG_WOWLAN registry_par->wakeup_event = rtw_wakeup_event; + registry_par->suspend_type = rtw_suspend_type; #endif #ifdef CONFIG_SUPPORT_TRX_SHARED registry_par->trx_share_mode = rtw_trx_share_mode; #endif + registry_par->wowlan_sta_mix_mode = rtw_wowlan_sta_mix_mode; #ifdef CONFIG_PCI_HCI registry_par->pci_aspm_config = rtw_pci_aspm_enable; @@ -1145,6 +1309,14 @@ uint loadparam(_adapter *padapter) #endif #ifdef CONFIG_AP_MODE registry_par->bmc_tx_rate = rtw_bmc_tx_rate; +#endif +#ifdef CONFIG_FW_HANDLE_TXBCN + registry_par->fw_tbtt_rpt = rtw_tbtt_rpt; +#endif + registry_par->phydm_ability = rtw_phydm_ability; + registry_par->halrf_ability = rtw_halrf_ability; +#ifdef CONFIG_RTW_MESH + registry_par->peer_alive_based_preq = rtw_peer_alive_based_preq; #endif return status; } @@ -1284,16 +1456,17 @@ unsigned int rtw_classify8021d(struct sk_buff *skb) return dscp >> 5; } + static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0) - #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0) - , void *accel_priv - #else - , struct net_device *sb_dev - #endif - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0) && LINUX_VERSION_CODE < KERNEL_VERSION(5, 2, 0)) - , select_queue_fallback_t fallback - #endif + #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 19, 0) + , struct net_device *sb_dev + #else + , void *accel_priv + #endif + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0) && LINUX_VERSION_CODE < KERNEL_VERSION(5, 2, 0)) + , select_queue_fallback_t fallback + #endif #endif ) { @@ -1302,10 +1475,8 @@ static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb skb->priority = rtw_classify8021d(skb); - if(pmlmepriv->acm_mask != 0) - { + if (pmlmepriv->acm_mask != 0) skb->priority = qos_acm(pmlmepriv->acm_mask, skb->priority); - } return rtw_1d_to_queue[skb->priority]; } @@ -1377,6 +1548,15 @@ static int rtw_ndev_notifier_call(struct notifier_block *nb, unsigned long state case NETDEV_CHANGENAME: rtw_adapter_proc_replace(ndev); break; + #ifdef CONFIG_NEW_NETDEV_HDL + case NETDEV_PRE_UP : + { + _adapter *adapter = rtw_netdev_priv(ndev); + + rtw_pwr_wakeup(adapter); + } + break; + #endif } return NOTIFY_DONE; @@ -1436,24 +1616,13 @@ static const struct net_device_ops rtw_netdev_ops = { int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname) { - _adapter *padapter = rtw_netdev_priv(pnetdev); - #ifdef CONFIG_EASY_REPLACEMENT + _adapter *padapter = rtw_netdev_priv(pnetdev); struct net_device *TargetNetdev = NULL; _adapter *TargetAdapter = NULL; - struct net *devnet = NULL; if (padapter->bDongle == 1) { -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) - TargetNetdev = dev_get_by_name("wlan0"); -#else -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)) - devnet = pnetdev->nd_net; -#else - devnet = dev_net(pnetdev); -#endif - TargetNetdev = dev_get_by_name(devnet, "wlan0"); -#endif + TargetNetdev = rtw_get_same_net_ndev_by_name(pnetdev, "wlan0"); if (TargetNetdev) { RTW_INFO("Force onboard module driver disappear !!!\n"); TargetAdapter = rtw_netdev_priv(TargetNetdev); @@ -1526,17 +1695,27 @@ struct net_device *rtw_init_netdev(_adapter *old_padapter) rtw_hook_vir_if_ops(pnetdev); #endif /* CONFIG_CONCURRENT_MODE */ -#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX - pnetdev->features |= NETIF_F_IP_CSUM; + +#ifdef CONFIG_TX_CSUM_OFFLOAD + pnetdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39) + pnetdev->hw_features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); +#endif #endif #ifdef CONFIG_RTW_NETIF_SG - pnetdev->features |= NETIF_F_SG; + pnetdev->features |= NETIF_F_SG; #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39) - pnetdev->hw_features |= NETIF_F_SG; + pnetdev->hw_features |= NETIF_F_SG; #endif #endif + if ((pnetdev->features & NETIF_F_SG) && (pnetdev->features & NETIF_F_IP_CSUM)) { + pnetdev->features |= (NETIF_F_TSO | NETIF_F_GSO); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39) + pnetdev->hw_features |= (NETIF_F_TSO | NETIF_F_GSO); +#endif + } /* pnetdev->tx_timeout = NULL; */ pnetdev->watchdog_timeo = HZ * 3; /* 3 second timeout */ @@ -1594,6 +1773,12 @@ void rtw_os_ndev_free(_adapter *adapter) rtw_cfg80211_ndev_res_free(adapter); #endif + /* free the old_pnetdev */ + if (adapter->rereg_nd_name_priv.old_pnetdev) { + rtw_free_netdev(adapter->rereg_nd_name_priv.old_pnetdev); + adapter->rereg_nd_name_priv.old_pnetdev = NULL; + } + if (adapter->pnetdev) { rtw_free_netdev(adapter->pnetdev); adapter->pnetdev = NULL; @@ -1618,14 +1803,13 @@ int rtw_os_ndev_register(_adapter *adapter, const char *name) goto exit; } #endif - +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) && defined(CONFIG_PCI_HCI) + ndev->gro_flush_timeout = 100000; +#endif /* alloc netdev name */ rtw_init_netdev_name(ndev, name); _rtw_memcpy(ndev->dev_addr, adapter_mac_addr(adapter), ETH_ALEN); -#if defined(CONFIG_NET_NS) - dev_net_set(ndev, wiphy_net(adapter_to_wiphy(adapter))); -#endif //defined(CONFIG_NET_NS) /* Tell the network stack we exist */ @@ -1821,6 +2005,7 @@ u32 rtw_start_drv_threads(_adapter *padapter) { u32 _status = _SUCCESS; + RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(padapter)); #ifdef CONFIG_XMIT_THREAD_MODE #if defined(CONFIG_SDIO_HCI) @@ -1883,7 +2068,7 @@ u32 rtw_start_drv_threads(_adapter *padapter) void rtw_stop_drv_threads(_adapter *padapter) { - + RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(padapter)); if (is_primary_adapter(padapter)) rtw_stop_cmd_thread(padapter); @@ -1922,13 +2107,11 @@ void rtw_stop_drv_threads(_adapter *padapter) rtw_hal_stop_thread(padapter); } -u8 rtw_init_default_value(_adapter *padapter); u8 rtw_init_default_value(_adapter *padapter) { u8 ret = _SUCCESS; struct registry_priv *pregistrypriv = &padapter->registrypriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; /* xmit_priv */ @@ -2018,8 +2201,6 @@ u8 rtw_init_default_value(_adapter *padapter) #ifdef CONFIG_RTW_NAPI padapter->napi_state = NAPI_DISABLE; #endif - padapter->tsf.sync_port = MAX_HW_PORT; - padapter->tsf.offset = 0; #ifdef CONFIG_RTW_ACS if (pregistrypriv->acs_mode) @@ -2035,6 +2216,10 @@ u8 rtw_init_default_value(_adapter *padapter) #endif return ret; } +#ifdef CONFIG_CLIENT_PORT_CFG +extern void rtw_clt_port_init(struct clt_port_t *cltp); +extern void rtw_clt_port_deinit(struct clt_port_t *cltp); +#endif struct dvobj_priv *devobj_init(void) { @@ -2049,10 +2234,13 @@ struct dvobj_priv *devobj_init(void) _rtw_mutex_init(&pdvobj->setch_mutex); _rtw_mutex_init(&pdvobj->setbw_mutex); _rtw_mutex_init(&pdvobj->rf_read_reg_mutex); + _rtw_mutex_init(&pdvobj->ioctrl_mutex); #ifdef CONFIG_SDIO_INDIRECT_ACCESS _rtw_mutex_init(&pdvobj->sd_indirect_access_mutex); #endif - +#ifdef CONFIG_SYSON_INDIRECT_ACCESS + _rtw_mutex_init(&pdvobj->syson_indirect_access_mutex); +#endif #ifdef CONFIG_RTW_CUSTOMER_STR _rtw_mutex_init(&pdvobj->customer_str_mutex); _rtw_memset(pdvobj->customer_str, 0xFF, RTW_CUSTOMER_STR_LEN); @@ -2063,6 +2251,9 @@ struct dvobj_priv *devobj_init(void) ATOMIC_SET(&pdvobj->disable_func, 0); rtw_macid_ctl_init(&pdvobj->macid_ctl); +#ifdef CONFIG_CLIENT_PORT_CFG + rtw_clt_port_init(&pdvobj->clt_port); +#endif _rtw_spinlock_init(&pdvobj->cam_ctl.lock); _rtw_mutex_init(&pdvobj->cam_ctl.sec_cam_access_mutex); #if defined(RTK_129X_PLATFORM) && defined(CONFIG_PCI_HCI) @@ -2073,18 +2264,24 @@ struct dvobj_priv *devobj_init(void) #endif #ifdef CONFIG_AP_MODE + #ifdef CONFIG_SUPPORT_MULTI_BCN pdvobj->nr_ap_if = 0; pdvobj->inter_bcn_space = DEFAULT_BCN_INTERVAL; /* default value is equal to the default beacon_interval (100ms) */ _rtw_init_queue(&pdvobj->ap_if_q); -#ifdef CONFIG_SWTIMER_BASED_TXBCN + pdvobj->vap_map = 0; + #endif /*CONFIG_SUPPORT_MULTI_BCN*/ + #ifdef CONFIG_SWTIMER_BASED_TXBCN rtw_init_timer(&(pdvobj->txbcn_timer), NULL, tx_beacon_timer_handlder, pdvobj); -#endif + #endif #endif rtw_init_timer(&(pdvobj->dynamic_chk_timer), NULL, rtw_dynamic_check_timer_handlder, pdvobj); + rtw_init_timer(&(pdvobj->periodic_tsf_update_end_timer), NULL, rtw_hal_periodic_tsf_update_end_timer_hdl, pdvobj); #ifdef CONFIG_MCC_MODE _rtw_mutex_init(&(pdvobj->mcc_objpriv.mcc_mutex)); + _rtw_mutex_init(&(pdvobj->mcc_objpriv.mcc_tsf_req_mutex)); + _rtw_mutex_init(&(pdvobj->mcc_objpriv.mcc_dbg_reg_mutex)); _rtw_spinlock_init(&pdvobj->mcc_objpriv.mcc_lock); #endif /* CONFIG_MCC_MODE */ @@ -2093,6 +2290,13 @@ struct dvobj_priv *devobj_init(void) #endif /* CONFIG_RTW_NAPI_DYNAMIC */ +#ifdef CONFIG_RTW_TPT_MODE + pdvobj->tpt_mode = 0; + pdvobj->edca_be_ul = 0x5ea42b; + pdvobj->edca_be_dl = 0x00a42b; +#endif + pdvobj->scan_deny = _FALSE; + return pdvobj; } @@ -2109,6 +2313,9 @@ void devobj_deinit(struct dvobj_priv *pdvobj) #ifdef CONFIG_MCC_MODE _rtw_mutex_free(&(pdvobj->mcc_objpriv.mcc_mutex)); + _rtw_mutex_free(&(pdvobj->mcc_objpriv.mcc_tsf_req_mutex)); + _rtw_mutex_free(&(pdvobj->mcc_objpriv.mcc_dbg_reg_mutex)); + _rtw_spinlock_free(&pdvobj->mcc_objpriv.mcc_lock); #endif /* CONFIG_MCC_MODE */ _rtw_mutex_free(&pdvobj->hw_init_mutex); @@ -2121,11 +2328,20 @@ void devobj_deinit(struct dvobj_priv *pdvobj) _rtw_mutex_free(&pdvobj->setch_mutex); _rtw_mutex_free(&pdvobj->setbw_mutex); _rtw_mutex_free(&pdvobj->rf_read_reg_mutex); + _rtw_mutex_free(&pdvobj->ioctrl_mutex); #ifdef CONFIG_SDIO_INDIRECT_ACCESS _rtw_mutex_free(&pdvobj->sd_indirect_access_mutex); #endif +#ifdef CONFIG_SYSON_INDIRECT_ACCESS + _rtw_mutex_free(&pdvobj->syson_indirect_access_mutex); +#endif rtw_macid_ctl_deinit(&pdvobj->macid_ctl); +#ifdef CONFIG_CLIENT_PORT_CFG + rtw_clt_port_deinit(&pdvobj->clt_port); +#endif + + _rtw_spinlock_free(&pdvobj->cam_ctl.lock); _rtw_mutex_free(&pdvobj->cam_ctl.sec_cam_access_mutex); #if defined(RTK_129X_PLATFORM) && defined(CONFIG_PCI_HCI) @@ -2134,7 +2350,9 @@ void devobj_deinit(struct dvobj_priv *pdvobj) #ifdef CONFIG_MBSSID_CAM rtw_mbid_cam_deinit(pdvobj); #endif - +#ifdef CONFIG_SUPPORT_MULTI_BCN + _rtw_spinlock_free(&(pdvobj->ap_if_q.lock)); +#endif rtw_mfree((u8 *)pdvobj, sizeof(*pdvobj)); } @@ -2179,15 +2397,11 @@ u8 rtw_reset_drv_sw(_adapter *padapter) struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); /* hal_priv */ - if (is_primary_adapter(padapter)) - rtw_hal_def_value_init(padapter); + rtw_hal_def_value_init(padapter); RTW_ENABLE_FUNC(padapter, DF_RX_BIT); RTW_ENABLE_FUNC(padapter, DF_TX_BIT); - padapter->tsf.sync_port = MAX_HW_PORT; - padapter->tsf.offset = 0; - padapter->bLinkInfoDump = 0; padapter->xmitpriv.tx_pkts = 0; @@ -2226,12 +2440,57 @@ u8 rtw_reset_drv_sw(_adapter *padapter) u8 rtw_init_drv_sw(_adapter *padapter) { - u8 ret8 = _SUCCESS; +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); +#endif - + #if defined(CONFIG_AP_MODE) && defined(CONFIG_SUPPORT_MULTI_BCN) _rtw_init_listhead(&padapter->list); + #ifdef CONFIG_FW_HANDLE_TXBCN + padapter->vap_id = CONFIG_LIMITED_AP_NUM; + if (is_primary_adapter(padapter)) + adapter_to_dvobj(padapter)->vap_tbtt_rpt_map = adapter_to_regsty(padapter)->fw_tbtt_rpt; + #endif + #endif + + #ifdef CONFIG_CLIENT_PORT_CFG + padapter->client_id = MAX_CLIENT_PORT_NUM; + padapter->client_port = CLT_PORT_INVALID; + #endif + + if (is_primary_adapter(padapter)) { + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); + + dvobj->macid_ctl.num = rtw_min(hal_spec->macid_num, MACID_NUM_SW_LIMIT); + + dvobj->cam_ctl.sec_cap = hal_spec->sec_cap; + dvobj->cam_ctl.num = rtw_min(hal_spec->sec_cam_ent_num, SEC_CAM_ENT_NUM_SW_LIMIT); + + #if CONFIG_TX_AC_LIFETIME + { + struct registry_priv *regsty = adapter_to_regsty(padapter); + int i; + + dvobj->tx_aclt_flags = regsty->tx_aclt_flags; + for (i = 0; i < TX_ACLT_CONF_NUM; i++) { + dvobj->tx_aclt_confs[i].en = regsty->tx_aclt_confs[i].en; + dvobj->tx_aclt_confs[i].vo_vi + = regsty->tx_aclt_confs[i].vo_vi / (hal_spec->tx_aclt_unit_factor * 32); + if (dvobj->tx_aclt_confs[i].vo_vi > 0xFFFF) + dvobj->tx_aclt_confs[i].vo_vi = 0xFFFF; + dvobj->tx_aclt_confs[i].be_bk + = regsty->tx_aclt_confs[i].be_bk / (hal_spec->tx_aclt_unit_factor * 32); + if (dvobj->tx_aclt_confs[i].be_bk > 0xFFFF) + dvobj->tx_aclt_confs[i].be_bk = 0xFFFF; + } + + dvobj->tx_aclt_force_val.en = 0xFF; + } + #endif + } ret8 = rtw_init_default_value(padapter); @@ -2299,6 +2558,9 @@ u8 rtw_init_drv_sw(_adapter *padapter) /* add for CONFIG_IEEE80211W, none 11w also can use */ _rtw_spinlock_init(&padapter->security_key_mutex); + /* We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). */ + /* _rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv)); */ + if (_rtw_init_sta_priv(&padapter->stapriv) == _FAIL) { RTW_INFO("Can't _rtw_init_sta_priv\n"); ret8 = _FAIL; @@ -2327,7 +2589,8 @@ u8 rtw_init_drv_sw(_adapter *padapter) /* _rtw_memset((u8 *)&padapter->qospriv, 0, sizeof (struct qos_priv)); */ /* move to mlme_priv */ #ifdef CONFIG_MP_INCLUDED - init_mp_priv(padapter); + if (init_mp_priv(padapter) == _FAIL) + RTW_INFO("%s: initialize MP private data Fail!\n", __func__); #endif rtw_hal_dm_init(padapter); @@ -2338,14 +2601,6 @@ u8 rtw_init_drv_sw(_adapter *padapter) rtw_hal_sreset_init(padapter); #endif -#ifdef CONFIG_INTEL_WIDI - if (rtw_init_intel_widi(padapter) == _FAIL) { - RTW_INFO("Can't rtw_init_intel_widi\n"); - ret8 = _FAIL; - goto exit; - } -#endif /* CONFIG_INTEL_WIDI */ - #ifdef CONFIG_WAPI_SUPPORT padapter->WapiSupport = true; /* set true temp, will revise according to Efuse or Registry value later. */ rtw_wapi_init(padapter); @@ -2369,6 +2624,10 @@ u8 rtw_init_drv_sw(_adapter *padapter) rtw_init_rm(padapter); #endif +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + memset(pwdev_priv->pno_mac_addr, 0xFF, ETH_ALEN); +#endif + exit: @@ -2386,18 +2645,17 @@ void rtw_cancel_dynamic_chk_timer(_adapter *padapter) void rtw_cancel_all_timer(_adapter *padapter) { - struct wifidirect_info *pwdinfo = &padapter->wdinfo; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; _cancel_timer_ex(&padapter->mlmepriv.assoc_timer); _cancel_timer_ex(&padapter->mlmepriv.scan_to_timer); #ifdef CONFIG_DFS_MASTER - _cancel_timer_ex(&padapter->mlmepriv.dfs_master_timer); + _cancel_timer_ex(&adapter_to_rfctl(padapter)->radar_detect_timer); #endif _cancel_timer_ex(&adapter_to_dvobj(padapter)->dynamic_chk_timer); + _cancel_timer_ex(&adapter_to_dvobj(padapter)->periodic_tsf_update_end_timer); #ifdef CONFIG_RTW_SW_LED /* cancel sw led timer */ rtw_hal_sw_led_deinit(padapter); @@ -2430,17 +2688,7 @@ void rtw_cancel_all_timer(_adapter *padapter) _cancel_timer_ex(&(adapter_to_pwrctl(padapter)->pwr_rpwm_timer)); #endif /* CONFIG_LPS_RPWM_TIMER */ - _cancel_timer_ex(&pwdinfo->find_phase_timer); - _cancel_timer_ex(&pwdinfo->restore_p2p_state_timer); - _cancel_timer_ex(&pwdinfo->pre_tx_scan_timer); - _cancel_timer_ex(&pwdinfo->reset_ch_sitesurvey); - _cancel_timer_ex(&pmlmeext->survey_timer); - _cancel_timer_ex(&pmlmeext->link_timer); -#ifdef CONFIG_IEEE80211W - _cancel_timer_ex(&pmlmeext->sa_query_timer); /* cancel dm timer */ -#endif - rtw_hal_dm_deinit(padapter); #ifdef CONFIG_PLATFORM_FS_MX61 @@ -2472,10 +2720,12 @@ u8 rtw_free_drv_sw(_adapter *padapter) } } #endif + /* add for CONFIG_IEEE80211W, none 11w also can use */ + _rtw_spinlock_free(&padapter->security_key_mutex); -#ifdef CONFIG_INTEL_WIDI - rtw_free_intel_widi(padapter); -#endif /* CONFIG_INTEL_WIDI */ +#ifdef CONFIG_BR_EXT + _rtw_spinlock_free(&padapter->br_ext_lock); +#endif /* CONFIG_BR_EXT */ free_mlme_ext_priv(&padapter->mlmeextpriv); @@ -2510,13 +2760,6 @@ u8 rtw_free_drv_sw(_adapter *padapter) rtw_hal_free_data(padapter); - - /* free the old_pnetdev */ - if (padapter->rereg_nd_name_priv.old_pnetdev) { - free_netdev(padapter->rereg_nd_name_priv.old_pnetdev); - padapter->rereg_nd_name_priv.old_pnetdev = NULL; - } - return _SUCCESS; } @@ -2532,6 +2775,7 @@ void rtw_intf_stop(_adapter *adapter) } #ifdef CONFIG_CONCURRENT_MODE +#ifndef CONFIG_NEW_NETDEV_HDL int _netdev_vir_if_open(struct net_device *pnetdev) { _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); @@ -2662,18 +2906,23 @@ static int netdev_vir_if_close(struct net_device *pnetdev) rtw_scan_abort(padapter); rtw_cfg80211_wait_scan_req_empty(padapter, 200); adapter_wdev_data(padapter)->bandroid_scan = _FALSE; - pnetdev->reg_state = NETREG_REGISTERED; #endif return 0; } +#endif /*#ifndef CONFIG_NEW_NETDEV_HDL*/ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) static const struct net_device_ops rtw_netdev_vir_if_ops = { .ndo_init = rtw_ndev_init, .ndo_uninit = rtw_ndev_uninit, + #ifdef CONFIG_NEW_NETDEV_HDL + .ndo_open = netdev_open, + .ndo_stop = netdev_close, + #else .ndo_open = netdev_vir_if_open, .ndo_stop = netdev_vir_if_close, + #endif .ndo_start_xmit = rtw_xmit_entry, .ndo_set_mac_address = rtw_net_set_mac_address, .ndo_get_stats = rtw_net_get_stats, @@ -2691,8 +2940,14 @@ static void rtw_hook_vir_if_ops(struct net_device *ndev) #else ndev->init = rtw_ndev_init; ndev->uninit = rtw_ndev_uninit; + #ifdef CONFIG_NEW_NETDEV_HDL + ndev->open = netdev_open; + ndev->stop = netdev_close; + #else ndev->open = netdev_vir_if_open; ndev->stop = netdev_vir_if_close; + #endif + ndev->set_mac_address = rtw_net_set_mac_address; #endif } @@ -2794,6 +3049,7 @@ void rtw_drv_stop_vir_if(_adapter *padapter) if (padapter == NULL) return; + RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(padapter)); pnetdev = padapter->pnetdev; @@ -2816,11 +3072,14 @@ void rtw_drv_stop_vir_if(_adapter *padapter) #endif rtw_intf_stop(padapter); - + #ifndef CONFIG_NEW_NETDEV_HDL rtw_stop_drv_threads(padapter); - + #endif padapter->bup = _FALSE; } + #ifdef CONFIG_NEW_NETDEV_HDL + rtw_stop_drv_threads(padapter); + #endif /* cancel timer after thread stop */ rtw_cancel_all_timer(padapter); } @@ -2856,25 +3115,6 @@ void rtw_drv_free_vir_ifaces(struct dvobj_priv *dvobj) rtw_drv_free_vir_if(dvobj->padapters[i]); } -void rtw_drv_del_vir_if(_adapter *padapter) -{ - struct dvobj_priv *pdvobjpriv; - - rtw_drv_stop_vir_if(padapter); - rtw_drv_free_vir_if(padapter); - pdvobjpriv = adapter_to_dvobj(padapter); - --pdvobjpriv->iface_nums; -} - -void rtw_drv_del_vir_ifaces(_adapter *primary_padapter) -{ - int i; - struct dvobj_priv *dvobj = primary_padapter->dvobj; - - for (i = VIF_START_ID; i < dvobj->iface_nums; i++) - rtw_drv_del_vir_if(dvobj->padapters[i]); - -} #endif /*end of CONFIG_CONCURRENT_MODE*/ @@ -2929,7 +3169,6 @@ static int rtw_inet6addr_notifier_call(struct notifier_block *nb, { struct inet6_ifaddr *inet6_ifa = data; struct net_device *ndev; - struct ipv6_addr *_ipv6_addr = NULL; struct pwrctrl_priv *pwrctl = NULL; struct mlme_ext_priv *pmlmeext = NULL; struct mlme_ext_info *pmlmeinfo = NULL; @@ -3134,37 +3373,29 @@ void netdev_br_init(struct net_device *netdev) #if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) rcu_read_lock(); -#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) */ +#endif /* if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) */ { /* struct net_bridge *br = netdev->br_port->br; */ /* ->dev->dev_addr; */ -#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) + #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) if (netdev->br_port) -#else /* (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) */ + #else if (rcu_dereference(adapter->pnetdev->rx_handler_data)) -#endif /* (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) */ + #endif { struct net_device *br_netdev; -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) - br_netdev = dev_get_by_name(CONFIG_BR_EXT_BRNAME); -#else /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) */ - struct net *devnet = NULL; - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)) - devnet = netdev->nd_net; -#else /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)) */ - devnet = dev_net(netdev); -#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)) */ - - br_netdev = dev_get_by_name(devnet, CONFIG_BR_EXT_BRNAME); -#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) */ + br_netdev = rtw_get_bridge_ndev_by_name(CONFIG_BR_EXT_BRNAME); if (br_netdev) { memcpy(adapter->br_mac, br_netdev->dev_addr, ETH_ALEN); dev_put(br_netdev); - } else - printk("%s()-%d: dev_get_by_name(%s) failed!", __FUNCTION__, __LINE__, CONFIG_BR_EXT_BRNAME); + RTW_INFO(FUNC_NDEV_FMT" bind bridge dev "NDEV_FMT"("MAC_FMT")\n" + , FUNC_NDEV_ARG(netdev), NDEV_ARG(br_netdev), MAC_ARG(br_netdev->dev_addr)); + } else { + RTW_INFO(FUNC_NDEV_FMT" can't get bridge dev by name \"%s\"\n" + , FUNC_NDEV_ARG(netdev), CONFIG_BR_EXT_BRNAME); + } } adapter->ethBrExtInfo.addPPPoETag = 1; @@ -3172,17 +3403,125 @@ void netdev_br_init(struct net_device *netdev) #if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) rcu_read_unlock(); -#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) */ +#endif } #endif /* CONFIG_BR_EXT */ +#ifdef CONFIG_NEW_NETDEV_HDL int _netdev_open(struct net_device *pnetdev) { uint status; _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -#ifdef CONFIG_IOCTL_CFG80211 - struct wireless_dev *wdev = padapter->rtw_wdev; + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); + + RTW_INFO(FUNC_NDEV_FMT" start\n", FUNC_NDEV_ARG(pnetdev)); + + #ifdef CONFIG_AUTOSUSPEND + if (pwrctrlpriv->ps_flag == _TRUE) { + padapter->net_closed = _FALSE; + goto netdev_open_normal_process; + } + #endif /*CONFIG_AUTOSUSPEND*/ + + if (!rtw_is_hw_init_completed(padapter)) { // ips + rtw_clr_surprise_removed(padapter); + rtw_clr_drv_stopped(padapter); + RTW_ENABLE_FUNC(padapter, DF_RX_BIT); + RTW_ENABLE_FUNC(padapter, DF_TX_BIT); + status = rtw_hal_init(padapter); + if (status == _FAIL) + goto netdev_open_error; + rtw_led_control(padapter, LED_CTL_NO_LINK); + #ifndef RTW_HALMAC + status = rtw_mi_start_drv_threads(padapter); + if (status == _FAIL) { + RTW_ERR(FUNC_NDEV_FMT "Initialize driver thread failed!\n", FUNC_NDEV_ARG(pnetdev)); + goto netdev_open_error; + } + + rtw_intf_start(GET_PRIMARY_ADAPTER(padapter)); + #endif /* !RTW_HALMAC */ + + { + #ifdef CONFIG_BT_COEXIST_SOCKET_TRX + _adapter *prim_adpt = GET_PRIMARY_ADAPTER(padapter); + + if (prim_adpt && (_TRUE == prim_adpt->EEPROMBluetoothCoexist)) { + rtw_btcoex_init_socket(prim_adpt); + prim_adpt->coex_info.BtMgnt.ExtConfig.HCIExtensionVer = 0x04; + rtw_btcoex_SetHciVersion(prim_adpt, 0x04); + } + #endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ + + _set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000); + + #ifndef CONFIG_IPS_CHECK_IN_WD + rtw_set_pwr_state_check_timer(pwrctrlpriv); + #endif /*CONFIG_IPS_CHECK_IN_WD*/ + } + + } + + /*if (padapter->bup == _FALSE) */ + { + rtw_hal_iface_init(padapter); + + #ifdef CONFIG_RTW_NAPI + if(padapter->napi_state == NAPI_DISABLE) { + napi_enable(&padapter->napi); + padapter->napi_state = NAPI_ENABLE; + } + #endif + + #ifdef CONFIG_IOCTL_CFG80211 + rtw_cfg80211_init_wiphy(padapter); + rtw_cfg80211_init_wdev_data(padapter); + #endif + /* rtw_netif_carrier_on(pnetdev); */ /* call this func when rtw_joinbss_event_callback return success */ + rtw_netif_wake_queue(pnetdev); + + #ifdef CONFIG_BR_EXT + if (is_primary_adapter(padapter)) + netdev_br_init(pnetdev); + #endif /* CONFIG_BR_EXT */ + + + padapter->bup = _TRUE; + padapter->net_closed = _FALSE; + padapter->netif_up = _TRUE; + pwrctrlpriv->bips_processing = _FALSE; + } + +#ifdef CONFIG_AUTOSUSPEND +netdev_open_normal_process: #endif + RTW_INFO(FUNC_NDEV_FMT" Success (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); + return 0; + +netdev_open_error: + padapter->bup = _FALSE; + + #ifdef CONFIG_RTW_NAPI + if(padapter->napi_state == NAPI_ENABLE) { + napi_disable(&padapter->napi); + padapter->napi_state = NAPI_DISABLE; + } + #endif + + rtw_netif_carrier_off(pnetdev); + rtw_netif_stop_queue(pnetdev); + + RTW_ERR(FUNC_NDEV_FMT" Failed!! (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); + + return -1; + +} + +#else +int _netdev_open(struct net_device *pnetdev) +{ + uint status; + _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); #ifdef CONFIG_BT_COEXIST_SOCKET_TRX HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); @@ -3270,7 +3609,7 @@ int _netdev_open(struct net_device *pnetdev) rtw_set_pwr_state_check_timer(pwrctrlpriv); #endif - rtw_netif_carrier_on(pnetdev); /* call this func when rtw_joinbss_event_callback return success */ + /* rtw_netif_carrier_on(pnetdev); */ /* call this func when rtw_joinbss_event_callback return success */ rtw_netif_wake_queue(pnetdev); #ifdef CONFIG_BR_EXT @@ -3286,8 +3625,9 @@ int _netdev_open(struct net_device *pnetdev) RTW_INFO("CONFIG_BT_COEXIST: VIRTUAL_ADAPTER\n"); #endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ - +#ifdef CONFIG_AUTOSUSPEND netdev_open_normal_process: +#endif #ifdef CONFIG_CONCURRENT_MODE { @@ -3332,7 +3672,7 @@ netdev_open_error: return -1; } - +#endif int netdev_open(struct net_device *pnetdev) { int ret = _FALSE; @@ -3345,11 +3685,15 @@ int netdev_open(struct net_device *pnetdev) } _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); +#ifdef CONFIG_NEW_NETDEV_HDL + ret = _netdev_open(pnetdev); +#else if (is_primary_adapter(padapter)) ret = _netdev_open(pnetdev); #ifdef CONFIG_CONCURRENT_MODE else ret = _netdev_vir_if_open(pnetdev); +#endif #endif _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); @@ -3375,13 +3719,22 @@ int ips_netdrv_open(_adapter *padapter) rtw_clr_drv_stopped(padapter); /* padapter->bup = _TRUE; */ - +#ifdef CONFIG_NEW_NETDEV_HDL + if (!rtw_is_hw_init_completed(padapter)) { + status = rtw_hal_init(padapter); + if (status == _FAIL) { + goto netdev_open_error; + } + rtw_mi_hal_iface_init(padapter); + } +#else status = rtw_hal_init(padapter); if (status == _FAIL) { goto netdev_open_error; } +#endif #if 0 - rtw_restore_mac_addr(padapter); + rtw_mi_set_mac_addr(padapter); #endif #ifndef RTW_HALMAC rtw_intf_start(padapter); @@ -3404,10 +3757,12 @@ netdev_open_error: int rtw_ips_pwr_up(_adapter *padapter) { int result; - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +#if defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) #ifdef DBG_CONFIG_ERROR_DETECT + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); struct sreset_priv *psrtpriv = &pHalData->srestpriv; #endif/* #ifdef DBG_CONFIG_ERROR_DETECT */ +#endif /* defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) */ systime start_time = rtw_get_current_time(); RTW_INFO("===> rtw_ips_pwr_up..............\n"); @@ -3440,12 +3795,12 @@ void rtw_ips_pwr_down(_adapter *padapter) #endif void rtw_ips_dev_unload(_adapter *padapter) { - struct net_device *pnetdev = (struct net_device *)padapter->pnetdev; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +#if defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) #ifdef DBG_CONFIG_ERROR_DETECT + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); struct sreset_priv *psrtpriv = &pHalData->srestpriv; #endif/* #ifdef DBG_CONFIG_ERROR_DETECT */ +#endif /* defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) */ RTW_INFO("====> %s...\n", __FUNCTION__); @@ -3463,7 +3818,98 @@ void rtw_ips_dev_unload(_adapter *padapter) rtw_hal_deinit(padapter); } +#ifdef CONFIG_NEW_NETDEV_HDL +int _pm_netdev_open(_adapter *padapter) +{ + uint status; + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); + struct net_device *pnetdev = padapter->pnetdev; + RTW_INFO(FUNC_NDEV_FMT" start\n", FUNC_NDEV_ARG(pnetdev)); + + #ifdef CONFIG_AUTOSUSPEND + if (pwrctrlpriv->ps_flag == _TRUE) { + padapter->net_closed = _FALSE; + goto netdev_open_normal_process; + } + #endif /*CONFIG_AUTOSUSPEND*/ + + if (!rtw_is_hw_init_completed(padapter)) { // ips + rtw_clr_surprise_removed(padapter); + rtw_clr_drv_stopped(padapter); + status = rtw_hal_init(padapter); + if (status == _FAIL) + goto netdev_open_error; + rtw_led_control(padapter, LED_CTL_NO_LINK); + #ifndef RTW_HALMAC + status = rtw_mi_start_drv_threads(padapter); + if (status == _FAIL) { + RTW_ERR(FUNC_NDEV_FMT "Initialize driver thread failed!\n", FUNC_NDEV_ARG(pnetdev)); + goto netdev_open_error; + } + + rtw_intf_start(GET_PRIMARY_ADAPTER(padapter)); + #endif /* !RTW_HALMAC */ + + { + _set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000); + + #ifndef CONFIG_IPS_CHECK_IN_WD + rtw_set_pwr_state_check_timer(pwrctrlpriv); + #endif /*CONFIG_IPS_CHECK_IN_WD*/ + } + + } + + /*if (padapter->bup == _FALSE) */ + { + rtw_hal_iface_init(padapter); + + padapter->bup = _TRUE; + padapter->net_closed = _FALSE; + padapter->netif_up = _TRUE; + pwrctrlpriv->bips_processing = _FALSE; + } + +#ifdef CONFIG_AUTOSUSPEND +netdev_open_normal_process: +#endif + RTW_INFO(FUNC_NDEV_FMT" Success (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); + return 0; + +netdev_open_error: + padapter->bup = _FALSE; + + rtw_netif_carrier_off(pnetdev); + rtw_netif_stop_queue(pnetdev); + + RTW_ERR(FUNC_NDEV_FMT" Failed!! (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); + + return -1; + +} +int _mi_pm_netdev_open(struct net_device *pnetdev) +{ + int i; + int status = 0; + _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); + _adapter *iface; + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (iface->netif_up) { + status = _pm_netdev_open(iface); + if (status == -1) { + RTW_ERR("%s failled\n", __func__); + break; + } + } + } + + return status; +} +#endif /*CONFIG_NEW_NETDEV_HDL*/ int pm_netdev_open(struct net_device *pnetdev, u8 bnormal) { int status = 0; @@ -3472,10 +3918,11 @@ int pm_netdev_open(struct net_device *pnetdev, u8 bnormal) if (_TRUE == bnormal) { _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); + #ifdef CONFIG_NEW_NETDEV_HDL + status = _mi_pm_netdev_open(pnetdev); + #else status = _netdev_open(pnetdev); -#if 0 - rtw_restore_mac_addr(padapter); -#endif + #endif _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); } #ifdef CONFIG_IPS @@ -3485,7 +3932,9 @@ int pm_netdev_open(struct net_device *pnetdev, u8 bnormal) return status; } - +#ifdef CONFIG_CLIENT_PORT_CFG +extern void rtw_hw_client_port_release(_adapter *adapter); +#endif static int netdev_close(struct net_device *pnetdev) { _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); @@ -3508,6 +3957,10 @@ static int netdev_close(struct net_device *pnetdev) padapter->netif_up = _FALSE; pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; +#ifdef CONFIG_CLIENT_PORT_CFG + if (MLME_IS_STA(padapter)) + rtw_hw_client_port_release(padapter); +#endif /* if (!rtw_is_hw_init_completed(padapter)) { RTW_INFO("(1)871x_drv - drv_close, bup=%d, hw_init_completed=%s\n", padapter->bup, rtw_is_hw_init_completed(padapter)?"_TRUE":"_FALSE"); @@ -3530,7 +3983,7 @@ static int netdev_close(struct net_device *pnetdev) /* s2-2. indicate disconnect to os */ rtw_indicate_disconnect(padapter, 0, _FALSE); /* s2-3. */ - rtw_free_assoc_resources_cmd(padapter, _TRUE); + rtw_free_assoc_resources_cmd(padapter, _TRUE, RTW_CMDF_WAIT_ACK); /* s2-4. */ rtw_free_network_queue(padapter, _TRUE); #endif @@ -3549,12 +4002,11 @@ static int netdev_close(struct net_device *pnetdev) rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); #endif /* CONFIG_P2P */ + rtw_scan_abort(padapter); /* stop scanning process before wifi is going to down */ #ifdef CONFIG_IOCTL_CFG80211 - //wdev->iftype = NL80211_IFTYPE_STATION; - rtw_scan_abort(padapter); rtw_cfg80211_wait_scan_req_empty(padapter, 200); adapter_wdev_data(padapter)->bandroid_scan = _FALSE; - //padapter->rtw_wdev->iftype = NL80211_IFTYPE_STATION; /* set this at the end */ + /* padapter->rtw_wdev->iftype = NL80211_IFTYPE_MONITOR; */ /* set this at the end */ #endif /* CONFIG_IOCTL_CFG80211 */ #ifdef CONFIG_WAPI_SUPPORT @@ -3610,9 +4062,7 @@ void rtw_ndev_destructor(struct net_device *ndev) if (ndev->ieee80211_ptr) rtw_mfree((u8 *)ndev->ieee80211_ptr, sizeof(struct wireless_dev)); #endif -#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 8)) free_netdev(ndev); -#endif } #ifdef CONFIG_ARP_KEEP_ALIVE @@ -3900,7 +4350,7 @@ int rtw_gw_addr_query(_adapter *padapter) pmlmepriv->gw_ip[1] = (gw_addr & 0xff00) >> 8; pmlmepriv->gw_ip[2] = (gw_addr & 0xff0000) >> 16; pmlmepriv->gw_ip[3] = (gw_addr & 0xff000000) >> 24; - _rtw_memcpy(pmlmepriv->gw_mac_addr, gw_mac, 6); + _rtw_memcpy(pmlmepriv->gw_mac_addr, gw_mac, ETH_ALEN); RTW_INFO("%s Gateway Mac:\t" MAC_FMT "\n", __FUNCTION__, MAC_ARG(pmlmepriv->gw_mac_addr)); RTW_INFO("%s Gateway IP:\t" IP_FMT "\n", __FUNCTION__, IP_ARG(pmlmepriv->gw_ip)); } else @@ -3912,13 +4362,10 @@ int rtw_gw_addr_query(_adapter *padapter) void rtw_dev_unload(PADAPTER padapter) { - struct net_device *pnetdev = (struct net_device *)padapter->pnetdev; struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); struct dvobj_priv *pobjpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &pobjpriv->drv_dbg; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; - u8 cnt = 0; - if (padapter->bup == _TRUE) { RTW_INFO("==> "FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); @@ -3986,7 +4433,6 @@ void rtw_dev_unload(PADAPTER padapter) int rtw_suspend_free_assoc_resource(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct net_device *pnetdev = padapter->pnetdev; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &padapter->wdinfo; #endif /* CONFIG_P2P */ @@ -4107,6 +4553,7 @@ int rtw_suspend_wow(_adapter *padapter) } #endif + rtw_wow_lps_level_decide(padapter, _TRUE); poidparam.subcode = WOWLAN_ENABLE; rtw_hal_set_hwreg(padapter, HW_VAR_WOWLAN, (u8 *)&poidparam); if (rtw_chk_roam_flags(padapter, RTW_ROAM_ON_RESUME)) { @@ -4164,9 +4611,8 @@ int rtw_suspend_wow(_adapter *padapter) } #ifdef CONFIG_LPS else { - if (!(pwrpriv->wowlan_dis_lps)) { - rtw_wow_lps_level_decide(padapter, _TRUE); - rtw_set_ps_mode(padapter, PS_MODE_MAX, 0, 0, "WOWLAN"); + if(pwrpriv->wowlan_power_mgmt != PS_MODE_ACTIVE) { + rtw_set_ps_mode(padapter, pwrpriv->wowlan_power_mgmt, 0, 0, "WOWLAN"); } } #endif /* #ifdef CONFIG_LPS */ @@ -4225,6 +4671,7 @@ int rtw_suspend_ap_wow(_adapter *padapter) } #endif + rtw_wow_lps_level_decide(padapter, _TRUE); poidparam.subcode = WOWLAN_AP_ENABLE; rtw_hal_set_hwreg(padapter, HW_VAR_WOWLAN, (u8 *)&poidparam); @@ -4266,9 +4713,8 @@ int rtw_suspend_ap_wow(_adapter *padapter) #endif #ifdef CONFIG_LPS - if (!(pwrpriv->wowlan_dis_lps)) { - rtw_wow_lps_level_decide(padapter, _TRUE); - rtw_set_ps_mode(padapter, PS_MODE_MIN, 0, 0, "AP-WOWLAN"); + if(pwrpriv->wowlan_power_mgmt != PS_MODE_ACTIVE) { + rtw_set_ps_mode(padapter, pwrpriv->wowlan_power_mgmt, 0, 0, "AP-WOWLAN"); } #endif @@ -4280,8 +4726,6 @@ int rtw_suspend_ap_wow(_adapter *padapter) int rtw_suspend_normal(_adapter *padapter) { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); int ret = _SUCCESS; RTW_INFO("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); @@ -4324,7 +4768,9 @@ int rtw_suspend_common(_adapter *padapter) struct dvobj_priv *dvobj = padapter->dvobj; struct debug_priv *pdbgpriv = &dvobj->drv_dbg; struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); +#ifdef CONFIG_WOWLAN struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +#endif int ret = 0; systime start_time = rtw_get_current_time(); @@ -4365,7 +4811,7 @@ int rtw_suspend_common(_adapter *padapter) if (rtw_mi_check_status(padapter, MI_AP_MODE) == _FALSE) { #ifdef CONFIG_WOWLAN - if (check_fwstate(pmlmepriv, _FW_LINKED)) + if (check_fwstate(pmlmepriv, _FW_LINKED) || WOWLAN_IS_STA_MIX_MODE(padapter)) pwrpriv->wowlan_mode = _TRUE; else if (pwrpriv->wowlan_pno_enable == _TRUE) pwrpriv->wowlan_mode |= pwrpriv->wowlan_pno_enable; @@ -4412,6 +4858,7 @@ int rtw_resume_process_wow(_adapter *padapter) struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; struct wowlan_ioctl_param poidparam; struct sta_info *psta = NULL; + struct registry_priv *registry_par = &padapter->registrypriv; int ret = _SUCCESS; RTW_INFO("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); @@ -4442,7 +4889,7 @@ int rtw_resume_process_wow(_adapter *padapter) if (pwrpriv->wowlan_mode == _TRUE) { #ifdef CONFIG_LPS - if (!(pwrpriv->wowlan_dis_lps)) { + if(pwrpriv->wowlan_power_mgmt != PS_MODE_ACTIVE) { rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN"); rtw_wow_lps_level_decide(padapter, _FALSE); } @@ -4483,6 +4930,14 @@ int rtw_resume_process_wow(_adapter *padapter) rtw_mi_start_drv_threads(padapter); rtw_mi_intf_start(padapter); + + if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && !check_fwstate(pmlmepriv, _FW_LINKED)) { + if (!rtw_is_surprise_removed(padapter)) { + rtw_hal_deinit(padapter); + rtw_hal_init(padapter); + } + RTW_INFO("FW_IPS_DISABLE_BBRF hal deinit, hal init \n"); + } #ifdef CONFIG_CONCURRENT_MODE rtw_mi_buddy_netif_carrier_on(padapter); @@ -4581,7 +5036,7 @@ int rtw_resume_process_ap_wow(_adapter *padapter) #ifdef CONFIG_LPS - if (!(pwrpriv->wowlan_dis_lps)) { + if(pwrpriv->wowlan_power_mgmt != PS_MODE_ACTIVE) { rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "AP-WOWLAN"); rtw_wow_lps_level_decide(padapter, _FALSE); } @@ -4787,8 +5242,6 @@ int rtw_resume_common(_adapter *padapter) int ret = 0; systime start_time = rtw_get_current_time(); struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - if (pwrpriv->bInSuspend == _FALSE) return 0; @@ -4796,7 +5249,7 @@ int rtw_resume_common(_adapter *padapter) RTW_PRINT("resume start\n"); RTW_INFO("==> %s (%s:%d)\n", __FUNCTION__, current->comm, current->pid); - if (rtw_mi_check_status(padapter, WIFI_AP_STATE) == _FALSE) { + if (rtw_mi_check_status(padapter, MI_AP_MODE) == _FALSE) { #ifdef CONFIG_WOWLAN if (pwrpriv->wowlan_mode == _TRUE) rtw_resume_process_wow(padapter); @@ -4804,7 +5257,7 @@ int rtw_resume_common(_adapter *padapter) #endif rtw_resume_process_normal(padapter); - } else if (rtw_mi_check_status(padapter, WIFI_AP_STATE)) { + } else if (rtw_mi_check_status(padapter, MI_AP_MODE)) { #ifdef CONFIG_AP_WOWLAN rtw_resume_process_ap_wow(padapter); #else diff --git a/os_dep/linux/recv_linux.c b/os_dep/linux/recv_linux.c index 89f3bba..0d8dc6d 100644 --- a/os_dep/linux/recv_linux.c +++ b/os_dep/linux/recv_linux.c @@ -20,7 +20,6 @@ int rtw_os_recvframe_duplicate_skb(_adapter *padapter, union recv_frame *pclonef { int res = _SUCCESS; _pkt *pkt_copy = NULL; - struct rx_pkt_attrib *pattrib = &pcloneframe->u.hdr.attrib; if (pskb == NULL) { RTW_INFO("%s [WARN] skb == NULL, drop frag frame\n", __func__); @@ -127,7 +126,7 @@ int rtw_os_alloc_recvframe(_adapter *padapter, union recv_frame *precvframe, u8 res = _FAIL; #else if ((pattrib->mfrag == 1) && (pattrib->frag_num == 0)) { - RTW_INFO("%s: alloc_skb fail , drop frag frame\n", __func__); + RTW_INFO("%s: alloc_skb fail , drop frag frame\n", __FUNCTION__); /* rtw_free_recvframe(precvframe, pfree_recv_queue); */ res = _FAIL; goto exit_rtw_os_recv_resource_alloc; @@ -144,7 +143,7 @@ int rtw_os_alloc_recvframe(_adapter *padapter, union recv_frame *precvframe, u8 precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pdata; precvframe->u.hdr.rx_end = pdata + alloc_sz; } else { - RTW_INFO("%s: rtw_skb_clone fail\n", __func__); + RTW_INFO("%s: rtw_skb_clone fail\n", __FUNCTION__); /* rtw_free_recvframe(precvframe, pfree_recv_queue); */ /*exit_rtw_os_recv_resource_alloc;*/ res = _FAIL; @@ -215,8 +214,10 @@ int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf) int res = _SUCCESS; #ifdef CONFIG_USB_HCI +#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); struct usb_device *pusbd = pdvobjpriv->pusbdev; +#endif precvbuf->irp_pending = _FALSE; precvbuf->purb = usb_alloc_urb(0, GFP_KERNEL); @@ -281,7 +282,7 @@ int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf) } -_pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, const u8 *da, const u8 *sa, u8 *msdu, u16 msdu_len) +_pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, const u8 *da, const u8 *sa, u8 *msdu ,u16 msdu_len) { u16 eth_type; u8 *data_ptr; @@ -305,7 +306,7 @@ _pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, const u8 *da, const u8 *s sub_skb->len = msdu_len; skb_set_tail_pointer(sub_skb, msdu_len); } else { - RTW_INFO("%s(): rtw_skb_clone() Fail!!!\n", __func__); + RTW_INFO("%s(): rtw_skb_clone() Fail!!!\n", __FUNCTION__); return NULL; } } @@ -384,7 +385,11 @@ int rtw_recv_napi_poll(struct napi_struct *napi, int budget) work_done = napi_recv(padapter, budget); if (work_done < budget) { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) && defined(CONFIG_PCI_HCI) + napi_complete_done(napi, work_done); +#else napi_complete(napi); +#endif if (!skb_queue_empty(&precvpriv->rx_napi_skb_queue)) napi_schedule(napi); } @@ -399,7 +404,7 @@ void dynamic_napi_th_chk (_adapter *adapter) if (adapter->registrypriv.en_napi) { struct dvobj_priv *dvobj; struct registry_priv *registry; - + dvobj = adapter_to_dvobj(adapter); registry = &adapter->registrypriv; if (dvobj->traffic_stat.cur_rx_tp > registry->napi_threshold) @@ -506,11 +511,16 @@ void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, union recv_frame *r pkt->protocol = eth_type_trans(pkt, padapter->pnetdev); pkt->dev = padapter->pnetdev; pkt->ip_summed = CHECKSUM_NONE; /* CONFIG_TCP_CSUM_OFFLOAD_RX */ +#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX + if ((rframe->u.hdr.attrib.csum_valid == 1) + && (rframe->u.hdr.attrib.csum_err == 0)) + pkt->ip_summed = CHECKSUM_UNNECESSARY; +#endif /* CONFIG_TCP_CSUM_OFFLOAD_RX */ #ifdef CONFIG_RTW_NAPI #ifdef CONFIG_RTW_NAPI_DYNAMIC if (!skb_queue_empty(&precvpriv->rx_napi_skb_queue) - && !adapter_to_dvobj(padapter)->en_napi_dynamic + && !adapter_to_dvobj(padapter)->en_napi_dynamic ) napi_recv(padapter, RTL_NAPI_WEIGHT); #endif @@ -543,7 +553,6 @@ void rtw_handle_tkip_mic_err(_adapter *padapter, struct sta_info *sta, u8 bgroup #endif union iwreq_data wrqu; struct iw_michaelmicfailure ev; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; systime cur_time = 0; @@ -604,13 +613,13 @@ void rtw_hostapd_mlme_rx(_adapter *padapter, union recv_frame *precv_frame) skb->len = precv_frame->u.hdr.len; /* pskb_copy = rtw_skb_copy(skb); - if(skb == NULL) goto _exit; */ + * if(skb == NULL) goto _exit; */ skb->dev = pmgnt_netdev; skb->ip_summed = CHECKSUM_NONE; skb->pkt_type = PACKET_OTHERHOST; /* skb->protocol = __constant_htons(0x0019); ETH_P_80211_RAW */ - skb->protocol = htons(0x0003); /*ETH_P_80211_RAW*/ + skb->protocol = __constant_htons(0x0003); /*ETH_P_80211_RAW*/ /* RTW_INFO("(1)data=0x%x, head=0x%x, tail=0x%x, mac_header=0x%x, len=%d\n", skb->data, skb->head, skb->tail, skb->mac_header, skb->len); */ @@ -632,7 +641,6 @@ int rtw_recv_monitor(_adapter *padapter, union recv_frame *precv_frame) struct recv_priv *precvpriv; _queue *pfree_recv_queue; _pkt *skb; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct rx_pkt_attrib *pattrib; if (NULL == precv_frame) @@ -685,7 +693,6 @@ int rtw_recv_indicatepkt(_adapter *padapter, union recv_frame *precv_frame) { struct recv_priv *precvpriv; _queue *pfree_recv_queue; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; precvpriv = &(padapter->recvpriv); pfree_recv_queue = &(precvpriv->free_recv_queue); @@ -695,7 +702,6 @@ int rtw_recv_indicatepkt(_adapter *padapter, union recv_frame *precv_frame) rtw_os_recv_indicate_pkt(padapter, precv_frame->u.hdr.pkt, precv_frame); -_recv_indicatepkt_end: precv_frame->u.hdr.pkt = NULL; rtw_free_recvframe(precv_frame, pfree_recv_queue); return _SUCCESS; diff --git a/os_dep/linux/rtw_android.c b/os_dep/linux/rtw_android.c index 8cde93c..4f80715 100644 --- a/os_dep/linux/rtw_android.c +++ b/os_dep/linux/rtw_android.c @@ -55,6 +55,7 @@ const char *android_wifi_cmd_str[ANDROID_WIFI_CMD_MAX] = { "BTCOEXSCAN-START", "BTCOEXSCAN-STOP", "BTCOEXMODE", + "SETSUSPENDMODE", "SETSUSPENDOPT", "P2P_DEV_ADDR", "SETFWPATH", @@ -94,6 +95,7 @@ const char *android_wifi_cmd_str[ANDROID_WIFI_CMD_MAX] = { /* Private command for P2P disable*/ "P2P_DISABLE", "SET_AEK", + "EXT_AUTH_STATUS", "DRIVER_VERSION" }; @@ -380,8 +382,6 @@ int rtw_android_get_rssi(struct net_device *net, char *command, int total_len) int rtw_android_get_link_speed(struct net_device *net, char *command, int total_len) { _adapter *padapter = (_adapter *)rtw_netdev_priv(net); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct wlan_network *pcur_network = &pmlmepriv->cur_network; int bytes_written = 0; u16 link_speed = 0; @@ -393,7 +393,6 @@ int rtw_android_get_link_speed(struct net_device *net, char *command, int total_ int rtw_android_get_macaddr(struct net_device *net, char *command, int total_len) { - _adapter *adapter = (_adapter *)rtw_netdev_priv(net); int bytes_written = 0; bytes_written = snprintf(command, total_len, "Macaddr = "MAC_FMT, MAC_ARG(net->dev_addr)); @@ -599,6 +598,7 @@ exit: int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) { + #define PRIVATE_COMMAND_MAX_LEN 8192 int ret = 0; char *command = NULL; int cmd_num; @@ -650,18 +650,24 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) goto exit; } /*RTW_INFO("%s priv_cmd.buf=%p priv_cmd.total_len=%d priv_cmd.used_len=%d\n",__func__,priv_cmd.buf,priv_cmd.total_len,priv_cmd.used_len);*/ - command = rtw_zmalloc(priv_cmd.total_len); + if (priv_cmd.total_len > PRIVATE_COMMAND_MAX_LEN || priv_cmd.total_len < 0) { + RTW_WARN("%s: invalid private command (%d)\n", __FUNCTION__, + priv_cmd.total_len); + ret = -EFAULT; + goto exit; + } + + command = rtw_zmalloc(priv_cmd.total_len+1); if (!command) { RTW_INFO("%s: failed to allocate memory\n", __FUNCTION__); ret = -ENOMEM; goto exit; } - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)) + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)) if (!access_ok(priv_cmd.buf, priv_cmd.total_len)) { -#else + #else if (!access_ok(VERIFY_READ, priv_cmd.buf, priv_cmd.total_len)) { -#endif + #endif RTW_INFO("%s: failed to access memory\n", __FUNCTION__); ret = -EFAULT; goto exit; @@ -670,7 +676,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) ret = -EFAULT; goto exit; } - + command[priv_cmd.total_len] = '\0'; RTW_INFO("%s: Android private cmd \"%s\" on %s\n" , __FUNCTION__, command, ifr->ifr_name); @@ -773,6 +779,9 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) #endif break; + case ANDROID_WIFI_CMD_SETSUSPENDMODE: + break; + case ANDROID_WIFI_CMD_SETSUSPENDOPT: /* bytes_written = wl_android_set_suspendopt(net, command, priv_cmd.total_len); */ break; @@ -857,7 +866,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) /* wpa_cli driver wfd-set-tcpport = 554 */ if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) - rtw_wfd_set_ctrl_port(padapter, (u16)get_int_from_command(priv_cmd.buf)); + rtw_wfd_set_ctrl_port(padapter, (u16)get_int_from_command(command)); break; } case ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT: { @@ -869,7 +878,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) pwfd_info = &padapter->wfd_info; if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) { - pwfd_info->wfd_device_type = (u8) get_int_from_command(priv_cmd.buf); + pwfd_info->wfd_device_type = (u8) get_int_from_command(command); pwfd_info->wfd_device_type &= WFD_DEVINFO_DUAL; } break; @@ -878,7 +887,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) case ANDROID_WIFI_CMD_CHANGE_DTIM: { #ifdef CONFIG_LPS u8 dtim; - u8 *ptr = (u8 *) &priv_cmd.buf; + u8 *ptr = (u8 *) command; ptr += 9;/* string command length of "SET_DTIM"; */ @@ -916,10 +925,6 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) #endif /* CONFIG_GTK_OL */ case ANDROID_WIFI_CMD_P2P_DISABLE: { #ifdef CONFIG_P2P - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - u8 channel, ch_offset; - u16 bwmode; - rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); #endif /* CONFIG_P2P */ break; @@ -931,6 +936,12 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) break; #endif + case ANDROID_WIFI_CMD_EXT_AUTH_STATUS: { + rtw_set_external_auth_status(padapter, + command + strlen("EXT_AUTH_STATUS "), + priv_cmd.total_len - strlen("EXT_AUTH_STATUS ")); + break; + } case ANDROID_WIFI_CMD_DRIVERVERSION: { bytes_written = strlen(DRIVERVERSION); snprintf(command, bytes_written + 1, DRIVERVERSION); @@ -962,7 +973,7 @@ response: exit: rtw_unlock_suspend(); if (command) - rtw_mfree(command, priv_cmd.total_len); + rtw_mfree(command, priv_cmd.total_len + 1); return ret; } diff --git a/os_dep/linux/rtw_cfgvendor.c b/os_dep/linux/rtw_cfgvendor.c index 40d5d39..01d71f8 100644 --- a/os_dep/linux/rtw_cfgvendor.c +++ b/os_dep/linux/rtw_cfgvendor.c @@ -252,8 +252,7 @@ int rtw_dev_get_feature_set(struct net_device *dev) feature_set |= WIFI_FEATURE_INFRA; #ifdef CONFIG_IEEE80211_BAND_5GHZ - if (is_supported_5g(adapter_to_regsty(adapter)->wireless_mode) - && hal_chk_band_cap(adapter, BAND_CAP_5G)) /* v5.3 has no rtw_init_wireless_mode(), need checking hal spec here */ + if (is_supported_5g(adapter_to_regsty(adapter)->wireless_mode)) feature_set |= WIFI_FEATURE_INFRA_5G; #endif @@ -265,6 +264,19 @@ int rtw_dev_get_feature_set(struct net_device *dev) feature_set |= WIFI_FEATURE_LINK_LAYER_STATS; #endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */ +#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR + feature_set |= WIFI_FEATURE_RSSI_MONITOR; +#endif + +#ifdef CONFIG_RTW_CFGVENDOR_WIFI_LOGGER + feature_set |= WIFI_FEATURE_LOGGER; +#endif + +#ifdef CONFIG_RTW_WIFI_HAL + feature_set |= WIFI_FEATURE_CONFIG_NDO; + feature_set |= WIFI_FEATURE_SCAN_RAND; +#endif + return feature_set; } @@ -1179,7 +1191,7 @@ static void LinkLayerStats(_adapter *padapter) trx_total_bytes = tx_bytes + rx_bytes; trx_total_time = pwrpriv->on_time - ps_time; - + if ( trx_total_bytes == 0) { pwrpriv->tx_time = 0; pwrpriv->rx_time = 0; @@ -1187,7 +1199,7 @@ static void LinkLayerStats(_adapter *padapter) /* tx_time = (trx_total_time * tx_total_bytes) / trx_total_bytes; */ /* rx_time = (trx_total_time * rx_total_bytes) / trx_total_bytes; */ - + tmp = (tx_bytes * trx_total_time); tmp = rtw_division64(tmp, trx_total_bytes); pwrpriv->tx_time = tmp; @@ -1197,7 +1209,7 @@ static void LinkLayerStats(_adapter *padapter) pwrpriv->rx_time = tmp; } - + } else { pwrpriv->on_time = 0; @@ -1206,12 +1218,12 @@ static void LinkLayerStats(_adapter *padapter) } #ifdef CONFIG_RTW_WIFI_HAL_DEBUG - RTW_INFO("- tx_bytes : %llu rx_bytes : %llu total bytes : %llu\n", tx_bytes, rx_bytes, trx_total_bytes); - RTW_INFO("- netif_up=%s, on_time : %u ms\n", padapter->netif_up ? "1":"0", pwrpriv->on_time); - RTW_INFO("- pwr_saving_time : %u (%u) ms\n", pwrpriv->pwr_saving_time, ps_time); - RTW_INFO("- trx_total_time : %u ms\n", trx_total_time); - RTW_INFO("- tx_time : %u ms\n", pwrpriv->tx_time); - RTW_INFO("- rx_time : %u ms\n", pwrpriv->rx_time); + RTW_INFO("- tx_bytes : %llu rx_bytes : %llu total bytes : %llu\n", tx_bytes, rx_bytes, trx_total_bytes); + RTW_INFO("- netif_up = %s, on_time : %u ms\n", padapter->netif_up ? "1":"0", pwrpriv->on_time); + RTW_INFO("- pwr_saving_time : %u (%u) ms\n", pwrpriv->pwr_saving_time, ps_time); + RTW_INFO("- trx_total_time : %u ms\n", trx_total_time); + RTW_INFO("- tx_time : %u ms\n", pwrpriv->tx_time); + RTW_INFO("- rx_time : %u ms\n", pwrpriv->rx_time); #endif /* CONFIG_RTW_WIFI_HAL_DEBUG */ } @@ -1223,16 +1235,16 @@ static int rtw_cfgvendor_lstats_get_info(struct wiphy *wiphy, int err = 0; _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); - wifi_radio_stat *radio; + wifi_radio_stat_internal *radio; wifi_iface_stat *iface; char *output; - output = rtw_malloc(sizeof(wifi_radio_stat) + sizeof(wifi_iface_stat)+1); + output = rtw_malloc(sizeof(wifi_radio_stat_internal) + sizeof(wifi_iface_stat)); if (output == NULL) { RTW_DBG("Allocate lstats info buffer fail!\n"); -} + } - radio = (wifi_radio_stat *)output; + radio = (wifi_radio_stat_internal *)output; radio->num_channels = 0; radio->radio = 1; @@ -1243,12 +1255,6 @@ static int rtw_cfgvendor_lstats_get_info(struct wiphy *wiphy, radio->on_time = pwrpriv->on_time; radio->tx_time = pwrpriv->tx_time; radio->rx_time = pwrpriv->rx_time; - - radio->num_tx_levels = 1; - radio->tx_time_per_levels = NULL; - radio->tx_time_per_levels = (u32*)(output+sizeof(wifi_radio_stat) + sizeof(wifi_iface_stat)); - *(radio->tx_time_per_levels) = DUMMY_TIME_STATICS; - radio->on_time_scan = 0; radio->on_time_nbd = 0; radio->on_time_gscan = 0; @@ -1263,16 +1269,15 @@ static int rtw_cfgvendor_lstats_get_info(struct wiphy *wiphy, RTW_INFO("radio->on_time : %u ms\n", (radio->on_time)); RTW_INFO("radio->tx_time : %u ms\n", (radio->tx_time)); RTW_INFO("radio->rx_time : %u ms\n", (radio->rx_time)); - RTW_INFO("radio->tx_time_per_levels value : %u ms\n", *(radio->tx_time_per_levels)); #endif /* CONFIG_RTW_WIFI_HAL_DEBUG */ RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); err = rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), - output, sizeof(wifi_iface_stat) + sizeof(wifi_radio_stat)+1); + output, sizeof(wifi_iface_stat) + sizeof(wifi_radio_stat_internal)); if (unlikely(err)) RTW_ERR(FUNC_NDEV_FMT"Vendor Command reply failed ret:%d \n" , FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err); - rtw_mfree(output, sizeof(wifi_iface_stat) + sizeof(wifi_radio_stat)+1); + rtw_mfree(output, sizeof(wifi_iface_stat) + sizeof(wifi_radio_stat_internal)); return err; } static int rtw_cfgvendor_lstats_set_info(struct wiphy *wiphy, @@ -1290,6 +1295,450 @@ static int rtw_cfgvendor_lstats_clear_info(struct wiphy *wiphy, return err; } #endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */ +#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR +static int rtw_cfgvendor_set_rssi_monitor(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ + _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); + struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); + + struct recv_priv *precvpriv = &padapter->recvpriv; + int err = 0, rem, type; + const struct nlattr *iter; + + RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); + + nla_for_each_attr(iter, data, len, rem) { + type = nla_type(iter); + + switch (type) { + case RSSI_MONITOR_ATTRIBUTE_MAX_RSSI: + pwdev_priv->rssi_monitor_max = (s8)nla_get_u32(iter);; + break; + case RSSI_MONITOR_ATTRIBUTE_MIN_RSSI: + pwdev_priv->rssi_monitor_min = (s8)nla_get_u32(iter); + break; + case RSSI_MONITOR_ATTRIBUTE_START: + pwdev_priv->rssi_monitor_enable = (u8)nla_get_u32(iter); + break; + } + } + + return err; +} + +void rtw_cfgvendor_rssi_monitor_evt(_adapter *padapter) { + struct wireless_dev *wdev = padapter->rtw_wdev; + struct wiphy *wiphy= wdev->wiphy; + struct recv_priv *precvpriv = &padapter->recvpriv; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct wlan_network *pcur_network = &pmlmepriv->cur_network; + struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); + struct sk_buff *skb; + u32 tot_len = NLMSG_DEFAULT_SIZE; + gfp_t kflags; + rssi_monitor_evt data ; + s8 rssi = precvpriv->rssi; + + if (pwdev_priv->rssi_monitor_enable == 0 || check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) + return; + + if (rssi < pwdev_priv->rssi_monitor_max || rssi > pwdev_priv->rssi_monitor_min) + return; + + kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; + + /* Alloc the SKB for vendor_event */ + skb = rtw_cfg80211_vendor_event_alloc(wiphy, wdev, tot_len, GOOGLE_RSSI_MONITOR_EVENT, kflags); + if (!skb) { + goto exit; + } + + _rtw_memset(&data, 0, sizeof(data)); + + data.version = RSSI_MONITOR_EVT_VERSION; + data.cur_rssi = rssi; + _rtw_memcpy(data.BSSID, pcur_network->network.MacAddress, sizeof(mac_addr)); + + nla_append(skb, sizeof(data), &data); + + rtw_cfg80211_vendor_event(skb, kflags); +exit: + return; +} +#endif /* CONFIG_RTW_CFGVEDNOR_RSSIMONITR */ + +#ifdef CONFIG_RTW_CFGVENDOR_WIFI_LOGGER +static int rtw_cfgvendor_logger_start_logging(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ + int ret = 0, rem, type; + char ring_name[32] = {0}; + int log_level = 0, flags = 0, time_intval = 0, threshold = 0; + const struct nlattr *iter; + + nla_for_each_attr(iter, data, len, rem) { + type = nla_type(iter); + switch (type) { + case LOGGER_ATTRIBUTE_RING_NAME: + strncpy(ring_name, nla_data(iter), + MIN(sizeof(ring_name) -1, nla_len(iter))); + break; + case LOGGER_ATTRIBUTE_LOG_LEVEL: + log_level = nla_get_u32(iter); + break; + case LOGGER_ATTRIBUTE_RING_FLAGS: + flags = nla_get_u32(iter); + break; + case LOGGER_ATTRIBUTE_LOG_TIME_INTVAL: + time_intval = nla_get_u32(iter); + break; + case LOGGER_ATTRIBUTE_LOG_MIN_DATA_SIZE: + threshold = nla_get_u32(iter); + break; + default: + RTW_ERR("Unknown type: %d\n", type); + ret = WIFI_ERROR_INVALID_ARGS; + goto exit; + } + } + +exit: + return ret; +} +static int rtw_cfgvendor_logger_get_feature(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ + int err = 0; + u32 supported_features = 0; + + err = rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), &supported_features, sizeof(supported_features)); + + if (unlikely(err)) + RTW_ERR(FUNC_NDEV_FMT" Vendor Command reply failed ret:%d\n" + , FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err); + + return err; +} +static int rtw_cfgvendor_logger_get_version(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ + _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); + HAL_DATA_TYPE *hal = GET_HAL_DATA(padapter); + int ret = 0, rem, type; + int buf_len = 1024; + char *buf_ptr; + const struct nlattr *iter; + gfp_t kflags; + + kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; + buf_ptr = kzalloc(buf_len, kflags); + if (!buf_ptr) { + RTW_ERR("failed to allocate the buffer for version n"); + ret = -ENOMEM; + goto exit; + } + nla_for_each_attr(iter, data, len, rem) { + type = nla_type(iter); + switch (type) { + case LOGGER_ATTRIBUTE_GET_DRIVER: + memcpy(buf_ptr, DRIVERVERSION, strlen(DRIVERVERSION)+1); + break; + case LOGGER_ATTRIBUTE_GET_FW: + sprintf(buf_ptr, "v%d.%d", hal->firmware_version, hal->firmware_sub_version); + break; + default: + RTW_ERR("Unknown type: %d\n", type); + ret = -EINVAL; + goto exit; + } + } + if (ret < 0) { + RTW_ERR("failed to get the version %d\n", ret); + goto exit; + } + + + ret = rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), buf_ptr, strlen(buf_ptr)); +exit: + kfree(buf_ptr); + return ret; +} + +static int rtw_cfgvendor_logger_get_ring_status(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ + int ret = 0; + int ring_id; + char ring_buf_name[] = "RTW_RING_BUFFER"; + + struct sk_buff *skb; + wifi_ring_buffer_status ring_status; + + + _rtw_memcpy(ring_status.name, ring_buf_name, strlen(ring_buf_name)+1); + ring_status.ring_id = 1; + /* Alloc the SKB for vendor_event */ + skb = cfg80211_vendor_cmd_alloc_reply_skb(wiphy, + sizeof(wifi_ring_buffer_status)); + if (!skb) { + RTW_ERR("skb allocation is failed\n"); + ret = FAIL; + goto exit; + } + + nla_put_u32(skb, LOGGER_ATTRIBUTE_RING_NUM, 1); + nla_put(skb, LOGGER_ATTRIBUTE_RING_STATUS, sizeof(wifi_ring_buffer_status), + &ring_status); + ret = cfg80211_vendor_cmd_reply(skb); + + if (ret) { + RTW_ERR("Vendor Command reply failed ret:%d \n", ret); + } +exit: + return ret; +} + +static int rtw_cfgvendor_logger_get_ring_data(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ + int ret = 0, rem, type; + char ring_name[32] = {0}; + const struct nlattr *iter; + + nla_for_each_attr(iter, data, len, rem) { + type = nla_type(iter); + switch (type) { + case LOGGER_ATTRIBUTE_RING_NAME: + strncpy(ring_name, nla_data(iter), + MIN(sizeof(ring_name) -1, nla_len(iter))); + RTW_INFO(" %s LOGGER_ATTRIBUTE_RING_NAME : %s\n", __func__, ring_name); + break; + default: + RTW_ERR("Unknown type: %d\n", type); + return ret; + } + } + + + return ret; +} + +static int rtw_cfgvendor_logger_get_firmware_memory_dump(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ + int ret = WIFI_ERROR_NOT_SUPPORTED; + + return ret; +} + +static int rtw_cfgvendor_logger_start_pkt_fate_monitoring(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ + int ret = WIFI_SUCCESS; + + return ret; +} + +static int rtw_cfgvendor_logger_get_tx_pkt_fates(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ + int ret = WIFI_SUCCESS; + + return ret; +} + +static int rtw_cfgvendor_logger_get_rx_pkt_fates(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ + int ret = WIFI_SUCCESS; + + return ret; +} + +#endif /* CONFIG_RTW_CFGVENDOR_WIFI_LOGGER */ +#ifdef CONFIG_RTW_WIFI_HAL +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + +#ifndef ETHER_ISMULTI +#define ETHER_ISMULTI(ea) (((const u8 *)(ea))[0] & 1) +#endif + + +static u8 null_addr[ETH_ALEN] = {0}; +static void rtw_hal_random_gen_mac_addr(u8 *mac_addr) +{ + do { + get_random_bytes(&mac_addr[3], ETH_ALEN-3); + if (memcmp(mac_addr, null_addr, ETH_ALEN) != 0) + break; + } while(1); +} + +void rtw_hal_pno_random_gen_mac_addr(PADAPTER adapter) +{ + u8 mac_addr[ETH_ALEN]; + struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); + + memcpy(mac_addr, pwdev_priv->pno_mac_addr, ETH_ALEN); + if (mac_addr[0] == 0xFF) return; + rtw_hal_random_gen_mac_addr(mac_addr); + memcpy(pwdev_priv->pno_mac_addr, mac_addr, ETH_ALEN); +#ifdef CONFIG_RTW_DEBUG + print_hex_dump(KERN_DEBUG, "pno_mac_addr: ", + DUMP_PREFIX_OFFSET, 16, 1, pwdev_priv->pno_mac_addr, + ETH_ALEN, 1); +#endif +} + +void rtw_hal_set_hw_mac_addr(PADAPTER adapter, u8 *mac_addr) +{ + rtw_ps_deny(adapter, PS_DENY_IOCTL); + LeaveAllPowerSaveModeDirect(adapter); + + rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, mac_addr); +#ifdef CONFIG_RTW_DEBUG + rtw_hal_dump_macaddr(RTW_DBGDUMP, adapter); +#endif + rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); +} + +static int rtw_cfgvendor_set_rand_mac_oui(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ + int err = 0; + PADAPTER adapter; + void *devaddr; + struct net_device *netdev; + int type, mac_len; + u8 pno_random_mac_oui[3]; + u8 mac_addr[ETH_ALEN] = {0}; + struct pwrctrl_priv *pwrctl; + struct rtw_wdev_priv *pwdev_priv; + + type = nla_type(data); + mac_len = nla_len(data); + if (mac_len != 3) { + RTW_ERR("%s oui len error %d != 3\n", __func__, mac_len); + return -1; + } + + if (type == ANDR_WIFI_ATTRIBUTE_RANDOM_MAC_OUI) { + memcpy(pno_random_mac_oui, nla_data(data), 3); + print_hex_dump(KERN_DEBUG, "pno_random_mac_oui: ", + DUMP_PREFIX_OFFSET, 16, 1, pno_random_mac_oui, + 3, 1); + + if (ETHER_ISMULTI(pno_random_mac_oui)) { + pr_err("%s: oui is multicast address\n", __func__); + return -1; + } + + adapter = wiphy_to_adapter(wiphy); + if (adapter == NULL) { + pr_err("%s: wiphy_to_adapter == NULL\n", __func__); + return -1; + } + + pwdev_priv = adapter_wdev_data(adapter); + + memcpy(mac_addr, pno_random_mac_oui, 3); + rtw_hal_random_gen_mac_addr(mac_addr); + memcpy(pwdev_priv->pno_mac_addr, mac_addr, ETH_ALEN); +#ifdef CONFIG_RTW_DEBUG + print_hex_dump(KERN_DEBUG, "pno_mac_addr: ", + DUMP_PREFIX_OFFSET, 16, 1, pwdev_priv->pno_mac_addr, + ETH_ALEN, 1); +#endif + } else { + RTW_ERR("%s oui type error %x != 0x2\n", __func__, type); + err = -1; + } + + + return err; +} + +#endif + + +static int rtw_cfgvendor_set_nodfs_flag(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ + int err = 0; + int type; + u32 nodfs = 0; + _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); + + RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); + + type = nla_type(data); + if (type == ANDR_WIFI_ATTRIBUTE_NODFS_SET) { + nodfs = nla_get_u32(data); + adapter_to_dvobj(padapter)->nodfs = nodfs; + } else { + err = -EINVAL; + } + + RTW_INFO("%s nodfs=%d, err=%d\n", __func__, nodfs, err); + + return err; +} + +static int rtw_cfgvendor_set_country(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ +#define CNTRY_BUF_SZ 4 /* Country string is 3 bytes + NUL */ + int err = 0, rem, type; + char country_code[CNTRY_BUF_SZ] = {0}; + const struct nlattr *iter; + _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); + + RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); + + nla_for_each_attr(iter, data, len, rem) { + type = nla_type(iter); + switch (type) { + case ANDR_WIFI_ATTRIBUTE_COUNTRY: + _rtw_memcpy(country_code, nla_data(iter), + MIN(nla_len(iter), CNTRY_BUF_SZ)); + break; + default: + RTW_ERR("Unknown type: %d\n", type); + return -EINVAL; + } + } + + RTW_INFO("%s country_code:\"%c%c\" \n", __func__, country_code[0], country_code[1]); + + rtw_set_country(padapter, country_code); + + return err; +} + +static int rtw_cfgvendor_set_nd_offload(struct wiphy *wiphy, + struct wireless_dev *wdev, const void *data, int len) +{ + int err = 0; + int type; + u8 nd_en = 0; + _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); + + RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); + + type = nla_type(data); + if (type == ANDR_WIFI_ATTRIBUTE_ND_OFFLOAD_VALUE) { + nd_en = nla_get_u8(data); + /* ND has been enabled when wow is enabled */ + } else { + err = -EINVAL; + } + + RTW_INFO("%s nd_en=%d, err=%d\n", __func__, nd_en, err); + + return err; +} +#endif /* CONFIG_RTW_WIFI_HAL */ static const struct wiphy_vendor_command rtw_vendor_cmds[] = { #if defined(GSCAN_SUPPORT) && 0 @@ -1493,6 +1942,127 @@ static const struct wiphy_vendor_command rtw_vendor_cmds[] = { #endif }, #endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */ +#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = WIFI_SUBCMD_SET_RSSI_MONITOR + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_set_rssi_monitor + }, +#endif /* CONFIG_RTW_CFGVEDNOR_RSSIMONITOR */ +#ifdef CONFIG_RTW_CFGVENDOR_WIFI_LOGGER + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = LOGGER_START_LOGGING + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_logger_start_logging + }, + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = LOGGER_GET_FEATURE + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_logger_get_feature + }, + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = LOGGER_GET_VER + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_logger_get_version + }, + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = LOGGER_GET_RING_STATUS + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_logger_get_ring_status + }, + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = LOGGER_GET_RING_DATA + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_logger_get_ring_data + }, + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = LOGGER_TRIGGER_MEM_DUMP + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_logger_get_firmware_memory_dump + }, + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = LOGGER_START_PKT_FATE_MONITORING + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_logger_start_pkt_fate_monitoring + }, + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = LOGGER_GET_TX_PKT_FATES + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_logger_get_tx_pkt_fates + }, + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = LOGGER_GET_RX_PKT_FATES + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_logger_get_rx_pkt_fates + }, +#endif /* CONFIG_RTW_CFGVENDOR_WIFI_LOGGER */ +#ifdef CONFIG_RTW_WIFI_HAL +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = WIFI_SUBCMD_SET_PNO_RANDOM_MAC_OUI + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_set_rand_mac_oui + }, +#endif + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = WIFI_SUBCMD_NODFS_SET + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_set_nodfs_flag + + }, + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = WIFI_SUBCMD_SET_COUNTRY_CODE + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_set_country + }, + { + { + .vendor_id = OUI_GOOGLE, + .subcmd = WIFI_SUBCMD_CONFIG_ND_OFFLOAD + }, + .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, + .doit = rtw_cfgvendor_set_nd_offload + }, +#endif /* CONFIG_RTW_WIFI_HAL */ { { .vendor_id = OUI_GOOGLE, @@ -1531,6 +2101,11 @@ static const struct nl80211_vendor_cmd_info rtw_vendor_events[] = { #if defined(RTT_SUPPORT) && 0 { OUI_GOOGLE, RTT_EVENT_COMPLETE }, #endif /* RTT_SUPPORT */ + +#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR + { OUI_GOOGLE, GOOGLE_RSSI_MONITOR_EVENT }, +#endif /* RTW_CFGVEDNOR_RSSIMONITR */ + #if defined(GSCAN_SUPPORT) && 0 { OUI_GOOGLE, GSCAN_EVENT_COMPLETE_SCAN }, { OUI_GOOGLE, GSCAN_EVENT_HOTLIST_RESULTS_LOST } diff --git a/os_dep/linux/rtw_cfgvendor.h b/os_dep/linux/rtw_cfgvendor.h index d5157b3..af423fc 100644 --- a/os_dep/linux/rtw_cfgvendor.h +++ b/os_dep/linux/rtw_cfgvendor.h @@ -122,6 +122,22 @@ enum rtw_vendor_subcmd { APF_SUBCMD_GET_CAPABILITIES = ANDROID_NL80211_SUBCMD_PKT_FILTER_RANGE_START, APF_SUBCMD_SET_FILTER, + + LOGGER_START_LOGGING = ANDROID_NL80211_SUBCMD_DEBUG_RANGE_START, + LOGGER_TRIGGER_MEM_DUMP, + LOGGER_GET_MEM_DUMP, + LOGGER_GET_VER, + LOGGER_GET_RING_STATUS, + LOGGER_GET_RING_DATA, + LOGGER_GET_FEATURE, + LOGGER_RESET_LOGGING, + LOGGER_TRIGGER_DRIVER_MEM_DUMP, + LOGGER_GET_DRIVER_MEM_DUMP, + LOGGER_START_PKT_FATE_MONITORING, + LOGGER_GET_TX_PKT_FATES, + LOGGER_GET_RX_PKT_FATES, + + VENDOR_SUBCMD_MAX }; enum gscan_attributes { @@ -199,6 +215,13 @@ enum gscan_ch_attributes { GSCAN_ATTRIBUTE_CH_ID_7 }; +enum wifi_rssi_monitor_attr { + RSSI_MONITOR_ATTRIBUTE_MAX_RSSI, + RSSI_MONITOR_ATTRIBUTE_MIN_RSSI, + RSSI_MONITOR_ATTRIBUTE_START, +}; + + enum rtt_attributes { RTT_ATTRIBUTE_TARGET_CNT, RTT_ATTRIBUTE_TARGET_INFO, @@ -213,6 +236,21 @@ enum rtt_attributes { RTT_ATTRIBUTE_TARGET_NUM_RETRY }; +enum logger_attributes { + LOGGER_ATTRIBUTE_GET_DRIVER, + LOGGER_ATTRIBUTE_GET_FW, + LOGGER_ATTRIBUTE_RING_ID, + LOGGER_ATTRIBUTE_RING_NAME, + LOGGER_ATTRIBUTE_RING_FLAGS, + LOGGER_ATTRIBUTE_LOG_LEVEL, + LOGGER_ATTRIBUTE_LOG_TIME_INTVAL, + LOGGER_ATTRIBUTE_LOG_MIN_DATA_SIZE, + LOGGER_ATTRIBUTE_FW_DUMP_LEN, + LOGGER_ATTRIBUTE_FW_DUMP_DATA, + LOGGERG_ATTRIBUTE_RING_DATA, + LOGGER_ATTRIBUTE_RING_STATUS, + LOGGER_ATTRIBUTE_RING_NUM +}; typedef enum rtw_vendor_event { RTK_RESERVED1, RTK_RESERVED2, @@ -232,7 +270,12 @@ typedef enum rtw_vendor_event { enum andr_wifi_feature_set_attr { ANDR_WIFI_ATTRIBUTE_NUM_FEATURE_SET, - ANDR_WIFI_ATTRIBUTE_FEATURE_SET + ANDR_WIFI_ATTRIBUTE_FEATURE_SET, + ANDR_WIFI_ATTRIBUTE_RANDOM_MAC_OUI, + ANDR_WIFI_ATTRIBUTE_NODFS_SET, + ANDR_WIFI_ATTRIBUTE_COUNTRY, + ANDR_WIFI_ATTRIBUTE_ND_OFFLOAD_VALUE + // Add more attribute here }; typedef enum rtw_vendor_gscan_attribute { @@ -314,6 +357,29 @@ typedef enum { WIFI_ERROR_BUSY = -10, } wifi_error; +typedef int wifi_ring_buffer_id; +/* ring buffer params */ +/** + * written_bytes and read_bytes implement a producer consumer API + * hence written_bytes >= read_bytes + * a modulo arithmetic of the buffer size has to be applied to those counters: + * actual offset into ring buffer = written_bytes % ring_buffer_byte_size + * + */ +typedef struct { + u8 name[32]; + u32 flags; + wifi_ring_buffer_id ring_id; // unique integer representing the ring + u32 ring_buffer_byte_size; // total memory size allocated for the buffer + u32 verbose_level; // verbose level for ring buffer + u32 written_bytes; // number of bytes that was written to the buffer by driver, + // monotonously increasing integer + u32 read_bytes; // number of bytes that was read from the buffer by user land, + // monotonously increasing integer + u32 written_records; // number of records that was written to the buffer by driver, + // monotonously increasing integer +} wifi_ring_buffer_status; + #ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS #define STATS_MAJOR_VERSION 1 #define STATS_MINOR_VERSION 0 @@ -392,14 +458,11 @@ typedef struct { // Max number of tx power levels. The actual number vary per device and is specified by |num_tx_levels| #define RADIO_STAT_MAX_TX_LEVELS 256 -/* radio statistics */ +/* Internal radio statistics structure in the driver */ typedef struct { wifi_radio radio; // wifi radio (if multiple radio supported) u32 on_time; // msecs the radio is awake (32 bits number accruing over time) u32 tx_time; // msecs the radio is transmitting (32 bits number accruing over time) - u32 num_tx_levels; // number of radio transmit power levels - u32* tx_time_per_levels; // pointer to an array of radio transmit per power levels in - // msecs accured over time u32 rx_time; // msecs the radio is in active receive (32 bits number accruing over time) u32 on_time_scan; // msecs the radio is awake due to all scan (32 bits number accruing over time) u32 on_time_nbd; // msecs the radio is awake due to NAN (32 bits number accruing over time) @@ -409,7 +472,7 @@ typedef struct { u32 on_time_hs20; // msecs the radio is awake due to HS2.0 scans and GAS exchange (32 bits number accruing over time) u32 num_channels; // number of channels wifi_channel_stat channels[]; // channel statistics -} wifi_radio_stat; +} wifi_radio_stat_internal; /** * Packet statistics reporting by firmware is performed on MPDU basi (i.e. counters increase by 1 for each MPDU) @@ -525,11 +588,12 @@ typedef struct { u32 aggressive_statistics_gathering; // set for field debug mode. Driver should collect all statistics regardless of performance impact. } wifi_link_layer_params; -/* callback for reporting link layer stats */ +#define RSSI_MONITOR_EVT_VERSION 1 typedef struct { - void (*on_link_stats_results) (wifi_request_id id, wifi_iface_stat *iface_stat, - int num_radios, wifi_radio_stat *radio_stat); -} wifi_stats_result_handler; + u8 version; + s8 cur_rssi; + mac_addr BSSID; +} rssi_monitor_evt; /* wifi statistics bitmap */ @@ -556,4 +620,14 @@ extern int rtw_cfgvendor_send_hotlist_event(struct wiphy *wiphy, #endif #endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) */ +#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR +void rtw_cfgvendor_rssi_monitor_evt(_adapter *padapter); +#endif + +#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI +void rtw_hal_pno_random_gen_mac_addr(PADAPTER adapter); +void rtw_hal_set_hw_mac_addr(PADAPTER adapter, u8 *mac_addr); +#endif + + #endif /* _RTW_CFGVENDOR_H_ */ diff --git a/os_dep/linux/rtw_proc.c b/os_dep/linux/rtw_proc.c index 6ed0288..f39080a 100644 --- a/os_dep/linux/rtw_proc.c +++ b/os_dep/linux/rtw_proc.c @@ -120,7 +120,8 @@ static ssize_t proc_set_log_level(struct file *file, const char __user *buffer, int num = sscanf(tmp, "%d ", &log_level); - if (log_level >= _DRV_NONE_ && log_level <= _DRV_MAX_) { + if (num == 1 && + log_level >= _DRV_NONE_ && log_level <= _DRV_MAX_) { rtw_drv_log_level = log_level; printk("rtw_drv_log_level:%d\n", rtw_drv_log_level); } @@ -159,6 +160,12 @@ static int proc_get_chplan_test(struct seq_file *m, void *v) return 0; } +static int proc_get_chplan_ver(struct seq_file *m, void *v) +{ + dump_chplan_ver(m); + return 0; +} + #ifdef RTW_HALMAC extern void rtw_halmac_get_version(char *str, u32 len); @@ -188,6 +195,7 @@ const struct rtw_proc_hdl drv_proc_hdls[] = { RTW_PROC_HDL_SSEQ("country_chplan_map", proc_get_country_chplan_map, NULL), RTW_PROC_HDL_SSEQ("chplan_id_list", proc_get_chplan_id_list, NULL), RTW_PROC_HDL_SSEQ("chplan_test", proc_get_chplan_test, NULL), + RTW_PROC_HDL_SSEQ("chplan_ver", proc_get_chplan_ver, NULL), #ifdef RTW_HALMAC RTW_PROC_HDL_SSEQ("halmac_info", proc_get_halmac_info, NULL), #endif /* RTW_HALMAC */ @@ -694,6 +702,19 @@ static ssize_t proc_set_backop_flags_mesh(struct file *file, const char __user * #endif /* CONFIG_SCAN_BACKOP */ +#if defined(CONFIG_LPS_PG) && defined(CONFIG_RTL8822C) +static int proc_get_lps_pg_debug(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = rtw_netdev_priv(dev); + struct dm_struct *dm = adapter_to_phydm(adapter); + + rtw_run_in_thread_cmd(adapter, ((void *)(odm_lps_pg_debug_8822c)), dm); + + return 0; +} +#endif + /* gpio setting */ #ifdef CONFIG_GPIO_API static ssize_t proc_set_config_gpio(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) @@ -811,7 +832,8 @@ static ssize_t proc_set_rx_info_msg(struct file *file, const char __user *buffer if (buffer && !copy_from_user(tmp, buffer, count)) { int num = sscanf(tmp, "%d", &phy_info_flag); - precvpriv->store_law_data_flag = (BOOLEAN) phy_info_flag; + if (num == 1) + precvpriv->store_law_data_flag = (BOOLEAN) phy_info_flag; /*RTW_INFO("precvpriv->store_law_data_flag = %d\n",( BOOLEAN )(precvpriv->store_law_data_flag));*/ } @@ -830,11 +852,9 @@ static int proc_get_tx_info_msg(struct seq_file *m, void *v) _irqL irqL; struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); - struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); - struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); struct sta_info *psta; - u8 bc_addr[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; - u8 null_addr[6] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; + u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + u8 null_addr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct sta_priv *pstapriv = &padapter->stapriv; int i; @@ -864,9 +884,9 @@ static int proc_get_tx_info_msg(struct seq_file *m, void *v) plist = get_next(plist); - if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, 6) != _TRUE) - && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, 6) != _TRUE) - && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(padapter), 6) != _TRUE)) { + if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) != _TRUE) + && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) != _TRUE) + && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(padapter), ETH_ALEN) != _TRUE)) { switch (psta->cmn.bw_mode) { @@ -1021,8 +1041,21 @@ static int proc_get_turboedca_ctrl(struct seq_file *m, void *v) _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); - if (hal_data) - RTW_PRINT_SEL(m, "Turbo-EDCA :%s\n", (hal_data->dis_turboedca) ? "Disable" : "Enable"); + if (hal_data) { + + u32 edca_param; + + if (hal_data->dis_turboedca == 0) + RTW_PRINT_SEL(m, "Turbo-EDCA : %s\n", "Enable"); + else + RTW_PRINT_SEL(m, "Turbo-EDCA : %s, mode=%d, edca_param_mode=0x%x\n", "Disable", hal_data->dis_turboedca, hal_data->edca_param_mode); + + + rtw_hal_get_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param)); + + _RTW_PRINT_SEL(m, "PARAM_BE:0x%x\n", edca_param); + + } return 0; } @@ -1032,9 +1065,9 @@ static ssize_t proc_set_turboedca_ctrl(struct file *file, const char __user *buf struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); - char tmp[32] = {0}; int mode = 0, num = 0; + u32 param_mode = 0; if (count < 1) return -EFAULT; @@ -1044,58 +1077,39 @@ static ssize_t proc_set_turboedca_ctrl(struct file *file, const char __user *buf if (buffer && !copy_from_user(tmp, buffer, count)) { - num = sscanf(tmp, "%d ", &mode); + num = sscanf(tmp, "%d %x", &mode, ¶m_mode); - if (num != 1) { + if (num < 1 || num > 2) { RTW_INFO("argument number is wrong\n"); return -EFAULT; } + + /* 0: enable turboedca, + 1: disable turboedca, + 2: disable turboedca and setting EDCA parameter based on the input parameter + > 2 : currently reset to 0 */ + + if (mode > 2) + mode = 0; + hal_data->dis_turboedca = mode; - } - return count; -} -#ifdef CONFIG_WOWLAN -static int proc_get_wow_lps_ctrl(struct seq_file *m, void *v) -{ - struct net_device *dev = m->private; - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); + + hal_data->edca_param_mode = 0; /* init. value */ - if (pwrctl) - RTW_PRINT_SEL(m, "WOW lps :%s\n", (pwrctl->wowlan_dis_lps) ? "Disable" : "Enable"); + RTW_INFO("dis_turboedca mode = 0x%x\n", hal_data->dis_turboedca); + + if (num == 2) { - return 0; -} + hal_data->edca_param_mode = param_mode; -static ssize_t proc_set_wow_lps_ctrl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -{ - struct net_device *dev = data; - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); - - char tmp[32] = {0}; - int mode = 0, num = 0; - - if (count < 1) - return -EFAULT; - - if (count > sizeof(tmp)) - return -EFAULT; - - if (buffer && !copy_from_user(tmp, buffer, count)) { - - num = sscanf(tmp, "%d ", &mode); - - if (num != 1) { - RTW_INFO("argument number is wrong\n"); - return -EFAULT; + RTW_INFO("param_mode = 0x%x\n", param_mode); } - pwrctl->wowlan_dis_lps = mode; - RTW_INFO("WOW lps :%s\n", (pwrctl->wowlan_dis_lps) ? "Disable" : "Enable"); + } + return count; + } -#endif static int proc_get_mac_qinfo(struct seq_file *m, void *v) { @@ -1122,7 +1136,7 @@ static int proc_get_chan_plan(struct seq_file *m, void *v) struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); - dump_cur_chset(m, adapter); + dump_cur_chset(m, adapter_to_rfctl(adapter)); return 0; } @@ -1215,8 +1229,6 @@ ssize_t proc_set_macaddr_acl(struct file *file, const char __user *buffer, size_ { struct net_device *dev = data; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *mlme = &adapter->mlmepriv; - struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; char tmp[17 * NUM_ACL + 32] = {0}; u8 period; char cmd[32]; @@ -1470,7 +1482,7 @@ exit: } #ifdef CONFIG_DFS_MASTER -int proc_get_dfs_master_test_case(struct seq_file *m, void *v) +static int proc_get_dfs_test_case(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); @@ -1478,14 +1490,14 @@ int proc_get_dfs_master_test_case(struct seq_file *m, void *v) RTW_PRINT_SEL(m, "%-24s %-19s\n", "radar_detect_trigger_non", "choose_dfs_ch_first"); RTW_PRINT_SEL(m, "%24hhu %19hhu\n" - , rfctl->dbg_dfs_master_radar_detect_trigger_non - , rfctl->dbg_dfs_master_choose_dfs_ch_first + , rfctl->dbg_dfs_radar_detect_trigger_non + , rfctl->dbg_dfs_choose_dfs_ch_first ); return 0; } -ssize_t proc_set_dfs_master_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +static ssize_t proc_set_dfs_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); @@ -1506,9 +1518,9 @@ ssize_t proc_set_dfs_master_test_case(struct file *file, const char __user *buff int num = sscanf(tmp, "%hhu %hhu", &radar_detect_trigger_non, &choose_dfs_ch_first); if (num >= 1) - rfctl->dbg_dfs_master_radar_detect_trigger_non = radar_detect_trigger_non; + rfctl->dbg_dfs_radar_detect_trigger_non = radar_detect_trigger_non; if (num >= 2) - rfctl->dbg_dfs_master_choose_dfs_ch_first = choose_dfs_ch_first; + rfctl->dbg_dfs_choose_dfs_ch_first = choose_dfs_ch_first; } return count; @@ -1573,7 +1585,7 @@ ssize_t proc_set_radar_detect(struct file *file, const char __user *buffer, size if (num < 1) goto exit; - rfctl->dbg_dfs_master_fake_radar_detect_cnt = fake_radar_detect_cnt; + rfctl->dbg_dfs_fake_radar_detect_cnt = fake_radar_detect_cnt; } exit: @@ -1612,7 +1624,7 @@ static ssize_t proc_set_dfs_ch_sel_d_flags(struct file *file, const char __user goto exit; num = sscanf(tmp, "%hhx", &d_flags); - if (num != 1) + if (num != 1) goto exit; rfctl->dfs_ch_sel_d_flags = d_flags; @@ -1620,6 +1632,54 @@ static ssize_t proc_set_dfs_ch_sel_d_flags(struct file *file, const char __user exit: return count; } + +#ifdef CONFIG_DFS_SLAVE_WITH_RADAR_DETECT +static int proc_get_dfs_slave_with_rd(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); + + RTW_PRINT_SEL(m, "%u\n", rfctl->dfs_slave_with_rd); + + return 0; +} + +static ssize_t proc_set_dfs_slave_with_rd(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); + char tmp[32]; + u8 rd; + int num; + + if (count < 1) + return -EFAULT; + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (!buffer || copy_from_user(tmp, buffer, count)) + goto exit; + + num = sscanf(tmp, "%hhu", &rd); + if (num != 1) + goto exit; + + rd = rd ? 1 : 0; + + if (rfctl->dfs_slave_with_rd != rd) { + rfctl->dfs_slave_with_rd = rd; + rtw_dfs_rd_en_decision_cmd(adapter); + } + +exit: + return count; +} +#endif /* CONFIG_DFS_SLAVE_WITH_RADAR_DETECT */ #endif /* CONFIG_DFS_MASTER */ #ifdef CONFIG_80211N_HT @@ -1671,6 +1731,42 @@ exit: } #endif /* CONFIG_80211N_HT */ +static int proc_get_rx_chk_limit(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + + RTW_PRINT_SEL(m, "Rx chk limit : %d\n", rtw_get_rx_chk_limit(padapter)); + + return 0; +} + +static ssize_t proc_set_rx_chk_limit(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + char tmp[32]; + struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + int rx_chk_limit; + + if (count < 1) { + RTW_INFO("argument size is less than 1\n"); + return -EFAULT; + } + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + int num = sscanf(tmp, "%d", &rx_chk_limit); + + rtw_set_rx_chk_limit(padapter, rx_chk_limit); + } + + return count; +} + static int proc_get_udpport(struct seq_file *m, void *v) { struct net_device *dev = m->private; @@ -1786,6 +1882,14 @@ static int proc_get_macid_info(struct seq_file *m, void *v) ); } } + RTW_PRINT_SEL(m, "\n"); + + for (i = 0; i < H2C_MSR_ROLE_MAX; i++) { + if (macid_ctl->op_num[i]) { + RTW_PRINT_SEL(m, "%-5s op_num:%u\n" + , h2c_msr_role_str(i), macid_ctl->op_num[i]); + } + } return 0; } @@ -1878,11 +1982,12 @@ static ssize_t proc_set_change_bss_chbw(struct file *file, const char __user *bu { struct net_device *dev = data; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *mlme = &(adapter->mlmepriv); - struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + int i; char tmp[32]; s16 ch; - s8 bw = -1, offset = -1; + s8 bw = REQ_BW_NONE, offset = REQ_OFFSET_NONE; + u8 ifbmp = 0; if (count < 1) return -EFAULT; @@ -1894,20 +1999,152 @@ static ssize_t proc_set_change_bss_chbw(struct file *file, const char __user *bu if (buffer && !copy_from_user(tmp, buffer, count)) { - int num = sscanf(tmp, "%hd %hhd %hhd", &ch, &bw, &offset); + int num = sscanf(tmp, "%hd %hhd %hhd %hhx", &ch, &bw, &offset, &ifbmp); if (num < 1 || (bw != CHANNEL_WIDTH_20 && num < 3)) goto exit; - if ((MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)) - && check_fwstate(mlme, WIFI_ASOC_STATE)) - rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_WAIT_ACK, ch, bw, offset); + if (num < 4) + ifbmp = BIT(adapter->iface_id); + else + ifbmp &= (1 << dvobj->iface_nums) - 1; + + for (i = 0; i < dvobj->iface_nums; i++) { + if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) + continue; + + if (!CHK_MLME_STATE(dvobj->padapters[i], WIFI_AP_STATE | WIFI_MESH_STATE) + || !MLME_IS_ASOC(dvobj->padapters[i])) + ifbmp &= ~BIT(i); + } + + if (ifbmp) + rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_WAIT_ACK, ifbmp, 0, ch, bw, offset); } exit: return count; } +#if CONFIG_TX_AC_LIFETIME +static int proc_get_tx_aclt_force_val(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = rtw_netdev_priv(dev); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + + dump_tx_aclt_force_val(m, dvobj); + + return 0; +} + +static ssize_t proc_set_tx_aclt_force_val(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *adapter = rtw_netdev_priv(dev); + char tmp[32] = {0}; + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct tx_aclt_conf_t input; + int num = sscanf(tmp, "%hhx %u %u", &input.en, &input.vo_vi, &input.be_bk); + + if (num < 1) + return count; + + rtw_hal_set_tx_aclt_force_val(adapter, &input, num); + rtw_run_in_thread_cmd(adapter, ((void *)(rtw_hal_update_tx_aclt)), adapter); + } + + return count; +} + +static int proc_get_tx_aclt_flags(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = rtw_netdev_priv(dev); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + + RTW_PRINT_SEL(m, "0x%02x\n", dvobj->tx_aclt_flags); + + return 0; +} + +static ssize_t proc_set_tx_aclt_flags(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *adapter = rtw_netdev_priv(dev); + char tmp[32] = {0}; + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + u8 flags; + int num = sscanf(tmp, "%hhx", &flags); + + if (num < 1) + return count; + + if (dvobj->tx_aclt_flags == flags) + return count; + + dvobj->tx_aclt_flags = flags; + + rtw_run_in_thread_cmd(adapter, ((void *)(rtw_hal_update_tx_aclt)), adapter); + } + + return count; +} + +static int proc_get_tx_aclt_confs(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = rtw_netdev_priv(dev); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + + RTW_PRINT_SEL(m, "flags:0x%02x\n", dvobj->tx_aclt_flags); + dump_tx_aclt_confs(m, dvobj); + + return 0; +} + +static ssize_t proc_set_tx_aclt_confs(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *adapter = rtw_netdev_priv(dev); + char tmp[32] = {0}; + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + u8 id; + struct tx_aclt_conf_t input; + int num = sscanf(tmp, "%hhu %hhx %u %u", &id, &input.en, &input.vo_vi, &input.be_bk); + + if (num < 2) + return count; + + rtw_hal_set_tx_aclt_conf(adapter, id, &input, num - 1); + rtw_run_in_thread_cmd(adapter, ((void *)(rtw_hal_update_tx_aclt)), adapter); + } + + return count; +} +#endif /* CONFIG_TX_AC_LIFETIME */ + static int proc_get_tx_bw_mode(struct seq_file *m, void *v) { struct net_device *dev = m->private; @@ -1920,13 +2157,38 @@ static int proc_get_tx_bw_mode(struct seq_file *m, void *v) return 0; } +static void rtw_set_tx_bw_mode(struct _ADAPTER *adapter, u8 bw_mode) +{ + struct mlme_priv *mlme = &(adapter->mlmepriv); + struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); + struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl; + u8 update = _FALSE; + + if ((MLME_STATE(adapter) & WIFI_ASOC_STATE) + && ((mlmeext->cur_channel <= 14 && BW_MODE_2G(bw_mode) != ADAPTER_TX_BW_2G(adapter)) + || (mlmeext->cur_channel >= 36 && BW_MODE_5G(bw_mode) != ADAPTER_TX_BW_5G(adapter))) + ) { + /* RA mask update needed */ + update = _TRUE; + } + adapter->driver_tx_bw_mode = bw_mode; + + if (update == _TRUE) { + struct sta_info *sta; + int i; + + for (i = 0; i < MACID_NUM_SW_LIMIT; i++) { + sta = macid_ctl->sta[i]; + if (sta && !is_broadcast_mac_addr(sta->cmn.mac_addr)) + rtw_dm_ra_mask_wk_cmd(adapter, (u8 *)sta); + } + } +} + static ssize_t proc_set_tx_bw_mode(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); - struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl; - struct mlme_priv *mlme = &(adapter->mlmepriv); - struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); char tmp[32]; u8 bw_mode; @@ -1940,31 +2202,12 @@ static ssize_t proc_set_tx_bw_mode(struct file *file, const char __user *buffer, if (buffer && !copy_from_user(tmp, buffer, count)) { - u8 update = _FALSE; int num = sscanf(tmp, "%hhx", &bw_mode); if (num < 1 || bw_mode == adapter->driver_tx_bw_mode) goto exit; - if ((MLME_STATE(adapter) & WIFI_ASOC_STATE) - && ((mlmeext->cur_channel <= 14 && BW_MODE_2G(bw_mode) != ADAPTER_TX_BW_2G(adapter)) - || (mlmeext->cur_channel >= 36 && BW_MODE_5G(bw_mode) != ADAPTER_TX_BW_5G(adapter))) - ) { - /* RA mask update needed */ - update = _TRUE; - } - adapter->driver_tx_bw_mode = bw_mode; - - if (update == _TRUE) { - struct sta_info *sta; - int i; - - for (i = 0; i < MACID_NUM_SW_LIMIT; i++) { - sta = macid_ctl->sta[i]; - if (sta && !is_broadcast_mac_addr(sta->cmn.mac_addr)) - rtw_dm_ra_mask_wk_cmd(adapter, (u8 *)sta); - } - } + rtw_set_tx_bw_mode(adapter, bw_mode); } exit: @@ -2008,7 +2251,7 @@ static int proc_get_tx_power_by_rate(struct seq_file *m, void *v) return 0; } -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT static int proc_get_tx_power_limit(struct seq_file *m, void *v) { struct net_device *dev = m->private; @@ -2072,10 +2315,7 @@ clear_ps_deny: static void *proc_start_tx_power_idx(struct seq_file *m, loff_t *pos) { - struct net_device *dev = m->private; - _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); u8 path = ((*pos) & 0xFF00) >> 8; - u8 rs = *pos & 0xFF; if (path >= RF_PATH_MAX) return NULL; @@ -2084,14 +2324,10 @@ static void *proc_start_tx_power_idx(struct seq_file *m, loff_t *pos) } static void proc_stop_tx_power_idx(struct seq_file *m, void *v) { - struct net_device *dev = m->private; - _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); } static void *proc_next_tx_power_idx(struct seq_file *m, void *v, loff_t *pos) { - struct net_device *dev = m->private; - _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); u8 path = ((*pos) & 0xFF00) >> 8; u8 rs = *pos & 0xFF; @@ -2206,10 +2442,9 @@ static ssize_t proc_set_kfree_bb_gain(struct file *file, const char __user *buff { struct net_device *dev = data; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); - HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter); char tmp[BB_GAIN_NUM * RF_PATH_MAX] = {0}; - u8 path, chidx; + u8 chidx; s8 bb_gain[BB_GAIN_NUM]; char ch_band_Group[6]; @@ -2321,7 +2556,6 @@ static ssize_t proc_set_tx_gain_offset(struct file *file, const char __user *buf } if (buffer && !copy_from_user(tmp, buffer, count)) { - u8 write_value; int num = sscanf(tmp, "%hhu %hhd", &rf_path, &offset); if (num < 2) @@ -2618,6 +2852,69 @@ exit: return count; } + +int proc_get_btc_reduce_wl_txpwr(struct seq_file *m, void *v) +{ + struct net_device *dev; + PADAPTER padapter; + u8 data; + + dev = m->private; + padapter = (PADAPTER)rtw_netdev_priv(dev); + + data = rtw_btcoex_get_reduce_wl_txpwr(padapter); + RTW_PRINT_SEL(m, "BTC reduce WL TxPwr = %d dB\n", data); + + return 0; +} + +ssize_t proc_set_btc_reduce_wl_txpwr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + PADAPTER padapter; + HAL_DATA_TYPE *hal_data; + u8 tmp[80] = {0}; + u32 val = 0; + u32 num; + + padapter = (PADAPTER)rtw_netdev_priv(dev); + hal_data = GET_HAL_DATA(padapter); + + /* RTW_INFO("+" FUNC_ADPT_FMT "\n", FUNC_ADPT_ARG(padapter)); */ + + if (NULL == buffer) { + RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", + FUNC_ADPT_ARG(padapter)); + + return -EFAULT; + } + + if (count < 1) { + RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", + FUNC_ADPT_ARG(padapter)); + + return -EFAULT; + } + + num = count; + if (num > (sizeof(tmp) - 1)) + num = (sizeof(tmp) - 1); + + if (copy_from_user(tmp, buffer, num)) { + RTW_INFO(FUNC_ADPT_FMT ": copy buffer from user space FAIL!\n", + FUNC_ADPT_ARG(padapter)); + + return -EFAULT; + } + + num = sscanf(tmp, "%d", &val); + + if ((IS_HARDWARE_TYPE_8822C(padapter)) && (hal_data->EEPROMBluetoothCoexist == _TRUE)) + rtw_btc_reduce_wl_txpwr_cmd(padapter, val); + + return count; +} + #endif /* CONFIG_BT_COEXIST */ #ifdef CONFIG_MBSSID_CAM @@ -2813,8 +3110,10 @@ static int proc_get_phy_cap(struct seq_file *m, void *v) _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); rtw_dump_phy_cap(m, adapter); +#ifdef CONFIG_80211N_HT rtw_dump_drv_phy_cap(m, adapter); rtw_get_dft_phy_cap(m, adapter); +#endif /* CONFIG_80211N_HT */ return 0; } @@ -3070,6 +3369,93 @@ static int proc_get_mesh_peer_sel_policy(struct seq_file *m, void *v) return 0; } +#if CONFIG_RTW_MESH_ACNODE_PREVENT +static int proc_get_mesh_acnode_prevent(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + + if (MLME_IS_MESH(adapter)) + dump_mesh_acnode_prevent_settings(m, adapter); + + return 0; +} + +static ssize_t proc_set_mesh_acnode_prevent(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + char tmp[32]; + + if (count < 1) + return -EFAULT; + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; + u8 enable; + u32 conf_timeout_ms; + u32 notify_timeout_ms; + int num = sscanf(tmp, "%hhu %u %u", &enable, &conf_timeout_ms, ¬ify_timeout_ms); + + if (num >= 1) + peer_sel_policy->acnode_prevent = enable; + if (num >= 2) + peer_sel_policy->acnode_conf_timeout_ms = conf_timeout_ms; + if (num >= 3) + peer_sel_policy->acnode_notify_timeout_ms = notify_timeout_ms; + } + + return count; +} +#endif /* CONFIG_RTW_MESH_ACNODE_PREVENT */ + +#if CONFIG_RTW_MESH_OFFCH_CAND +static int proc_get_mesh_offch_cand(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + + if (MLME_IS_MESH(adapter)) + dump_mesh_offch_cand_settings(m, adapter); + + return 0; +} + +static ssize_t proc_set_mesh_offch_cand(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + char tmp[32]; + + if (count < 1) + return -EFAULT; + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; + u8 enable; + u32 find_int_ms; + int num = sscanf(tmp, "%hhu %u", &enable, &find_int_ms); + + if (num >= 1) + peer_sel_policy->offch_cand = enable; + if (num >= 2) + peer_sel_policy->offch_find_int_ms = find_int_ms; + } + + return count; +} +#endif /* CONFIG_RTW_MESH_OFFCH_CAND */ + #if CONFIG_RTW_MESH_PEER_BLACKLIST static int proc_get_mesh_peer_blacklist(struct seq_file *m, void *v) { @@ -3111,7 +3497,6 @@ static ssize_t proc_set_mesh_peer_blacklist(struct file *file, const char __user peer_sel_policy->peer_blacklist_timeout_ms = blacklist_timeout_ms; } -exit: return count; } #endif /* CONFIG_RTW_MESH_PEER_BLACKLIST */ @@ -3147,11 +3532,17 @@ static ssize_t proc_set_mesh_cto_mgate_require(struct file *file, const char __u u8 require; int num = sscanf(tmp, "%hhu", &require); - if (num >= 1) + if (num >= 1) { peer_sel_policy->cto_mgate_require = require; + #if CONFIG_RTW_MESH_CTO_MGATE_CARRIER + if (rtw_mesh_cto_mgate_required(adapter)) + rtw_netif_carrier_off(adapter->pnetdev); + else + rtw_netif_carrier_on(adapter->pnetdev); + #endif + } } -exit: return count; } @@ -3195,7 +3586,6 @@ static ssize_t proc_set_mesh_cto_mgate_blacklist(struct file *file, const char _ peer_sel_policy->cto_mgate_blacklist_timeout_ms = blacklist_timeout_ms; } -exit: return count; } #endif /* CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST */ @@ -3221,6 +3611,39 @@ static int proc_get_mesh_plink_ctl(struct seq_file *m, void *v) return 0; } +static int proc_get_mesh_mpath(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + + if (MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter)) + dump_mpath(m, adapter); + + return 0; +} + +static int proc_get_mesh_mpp(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + + if (MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter)) + dump_mpp(m, adapter); + + return 0; +} + +static int proc_get_mesh_known_gates(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + + if (MLME_IS_MESH(adapter)) + dump_known_gates(m, adapter); + + return 0; +} + #if CONFIG_RTW_MESH_DATA_BMC_TO_UC static int proc_get_mesh_b2u_flags(struct seq_file *m, void *v) { @@ -3258,7 +3681,6 @@ static ssize_t proc_set_mesh_b2u_flags(struct file *file, const char __user *buf mcfg->b2u_flags_mfwd = mfwd; } -exit: return count; } #endif /* CONFIG_RTW_MESH_DATA_BMC_TO_UC */ @@ -3315,7 +3737,7 @@ exit: return count; } -static int proc_get_cto_mgate_state(struct seq_file *m, void *v) +static int proc_get_mesh_gate_state(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); @@ -3323,17 +3745,240 @@ static int proc_get_cto_mgate_state(struct seq_file *m, void *v) u8 cto_mgate = 0; if (MLME_IS_MESH(adapter)) { - if (rtw_mesh_gate_num(adapter) || mcfg->dot11MeshGateAnnouncementProtocol) - cto_mgate = 1; - - RTW_PRINT_SEL(m, "%hhu\n", cto_mgate); + if (rtw_mesh_is_primary_gate(adapter)) + RTW_PRINT_SEL(m, "PG\n"); + else if (mcfg->dot11MeshGateAnnouncementProtocol) + RTW_PRINT_SEL(m, "G\n"); + else if (rtw_mesh_gate_num(adapter)) + RTW_PRINT_SEL(m, "C\n"); + else + RTW_PRINT_SEL(m, "N\n"); } return 0; } +static int proc_get_peer_alive_based_preq(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + struct _ADAPTER *adapter= (_adapter *)rtw_netdev_priv(dev); + struct registry_priv *rp = &adapter->registrypriv; + + RTW_PRINT_SEL(m, "peer_alive_based_preq = %u\n", + rp->peer_alive_based_preq); + + return 0; +} + +static ssize_t +proc_set_peer_alive_based_preq(struct file *file, const char __user *buffer, + size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + struct _ADAPTER *adapter = (_adapter *)rtw_netdev_priv(dev); + struct registry_priv *rp = &adapter->registrypriv; + char tmp[8]; + int num = 0; + u8 enable = 0; + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (!buffer || copy_from_user(tmp, buffer, count)) + goto exit; + + num = sscanf(tmp, "%hhu", &enable); + if (num != 1) { + RTW_ERR("%s: invalid parameter!\n", __FUNCTION__); + goto exit; + } + + if (enable > 1) { + RTW_ERR("%s: invalid value!\n", __FUNCTION__); + goto exit; + } + rp->peer_alive_based_preq = enable; + +exit: + return count; +} #endif /* CONFIG_RTW_MESH */ +static int proc_get_scan_deny(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + struct _ADAPTER *adapter= (_adapter *)rtw_netdev_priv(dev); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + + RTW_PRINT_SEL(m, "scan_deny is %s\n", (dvobj->scan_deny == _TRUE) ? "enable":"disable"); + + return 0; +} + +static ssize_t proc_set_scan_deny(struct file *file, const char __user *buffer, + size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + struct _ADAPTER *adapter = (_adapter *)rtw_netdev_priv(dev); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + char tmp[8]; + int num = 0; + int enable = 0; + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (!buffer || copy_from_user(tmp, buffer, count)) + goto exit; + + num = sscanf(tmp, "%d", &enable); + if (num != 1) { + RTW_ERR("%s: invalid parameter!\n", __FUNCTION__); + goto exit; + } + + dvobj->scan_deny = enable ? _TRUE : _FALSE; + + RTW_PRINT("%s: scan_deny is %s\n", + __FUNCTION__, (dvobj->scan_deny == _TRUE) ? "enable":"disable"); + +exit: + return count; +} + +#ifdef CONFIG_RTW_TPT_MODE +static int proc_get_tpt_mode(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + struct _ADAPTER *adapter= (_adapter *)rtw_netdev_priv(dev); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + + RTW_PRINT_SEL(m, "current tpt_mode = %d\n", dvobj->tpt_mode); + + return 0; +} + +static void tpt_mode_default(struct _ADAPTER *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + + /* 1. disable scan deny */ + dvobj->scan_deny = _FALSE; + + /* 2. back to original LPS mode */ +#ifdef CONFIG_LPS + rtw_pm_set_lps(adapter, adapter->registrypriv.power_mgnt); +#endif + + /* 3. back to original 2.4 tx bw mode */ + rtw_set_tx_bw_mode(adapter, adapter->registrypriv.tx_bw_mode); +} + +static void rtw_tpt_mode(struct _ADAPTER *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(adapter); + + if (dvobj->tpt_mode > 0) { + + /* when enable each tpt mode + 1. scan deny + 2. disable LPS */ + + dvobj->scan_deny = _TRUE; + +#ifdef CONFIG_LPS + rtw_pm_set_lps(adapter, PS_MODE_ACTIVE); +#endif + + } + + switch (dvobj->tpt_mode) { + case 0: /* default mode */ + tpt_mode_default(adapter); + break; + case 1: /* High TP*/ + /*tpt_mode1(adapter);*/ + dvobj->edca_be_ul = 0x5e431c; + dvobj->edca_be_dl = 0x00431c; + break; + case 2: /* noise */ + /* tpt_mode2(adapter); */ + dvobj->edca_be_ul = 0x00431c; + dvobj->edca_be_dl = 0x00431c; + + rtw_set_tx_bw_mode(adapter, 0x20); /* for 2.4g, fixed tx_bw_mode to 20Mhz */ + break; + case 3: /* long distance */ + /* tpt_mode3(adapter); */ + dvobj->edca_be_ul = 0x00431c; + dvobj->edca_be_dl = 0x00431c; + + rtw_set_tx_bw_mode(adapter, 0x20); /* for 2.4g, fixed tx_bw_mode to 20Mhz */ + break; + case 4: /* noise + long distance */ + /* tpt_mode4(adapter); */ + dvobj->edca_be_ul = 0x00431c; + dvobj->edca_be_dl = 0x00431c; + + rtw_set_tx_bw_mode(adapter, 0x20); /* for 2.4g, fixed tx_bw_mode to 20Mhz */ + break; + default: /* default mode */ + tpt_mode_default(adapter); + break; + } + +} + +static ssize_t proc_set_tpt_mode(struct file *file, const char __user *buffer, + size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + struct _ADAPTER *adapter = (_adapter *)rtw_netdev_priv(dev); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + char tmp[32]; + int num = 0; + int mode = 0; + +#define MAX_TPT_MODE_NUM 4 + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (!buffer || copy_from_user(tmp, buffer, count)) + goto exit; + + num = sscanf(tmp, "%d", &mode); + if (num != 1) { + RTW_ERR("%s: invalid parameter!\n", __FUNCTION__); + goto exit; + } + + if (mode > MAX_TPT_MODE_NUM ) + mode = 0; + + RTW_PRINT("%s: previous mode = %d\n", + __FUNCTION__, dvobj->tpt_mode); + + RTW_PRINT("%s: enabled mode = %d\n", + __FUNCTION__, mode); + + dvobj->tpt_mode = mode; + + rtw_tpt_mode(adapter); + +exit: + return count; + +} +#endif /* CONFIG_RTW_TPT_MODE */ + /* * rtw_adapter_proc: * init/deinit when register/unregister net_device @@ -3371,6 +4016,9 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { #endif RTW_PROC_HDL_SSEQ("survey_info", proc_get_survey_info, proc_set_survey_info), RTW_PROC_HDL_SSEQ("ap_info", proc_get_ap_info, NULL), +#ifdef ROKU_PRIVATE + RTW_PROC_HDL_SSEQ("infra_ap", proc_get_infra_ap, NULL), +#endif /* ROKU_PRIVATE */ RTW_PROC_HDL_SSEQ("trx_info", proc_get_trx_info, proc_reset_trx_info), RTW_PROC_HDL_SSEQ("tx_power_offset", proc_get_tx_power_offset, proc_set_tx_power_offset), RTW_PROC_HDL_SSEQ("rate_ctl", proc_get_rate_ctl, proc_set_rate_ctl), @@ -3402,6 +4050,9 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { RTW_PROC_HDL_SSEQ("del_rx_ampdu_test_case", NULL, proc_set_del_rx_ampdu_test_case), RTW_PROC_HDL_SSEQ("wait_hiq_empty", NULL, proc_set_wait_hiq_empty), RTW_PROC_HDL_SSEQ("sta_linking_test", NULL, proc_set_sta_linking_test), +#ifdef CONFIG_AP_MODE + RTW_PROC_HDL_SSEQ("ap_linking_test", NULL, proc_set_ap_linking_test), +#endif RTW_PROC_HDL_SSEQ("mac_reg_dump", proc_get_mac_reg_dump, NULL), RTW_PROC_HDL_SSEQ("bb_reg_dump", proc_get_bb_reg_dump, NULL), @@ -3427,8 +4078,9 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { #endif RTW_PROC_HDL_SSEQ("rx_signal", proc_get_rx_signal, proc_set_rx_signal), + RTW_PROC_HDL_SSEQ("rx_chk_limit", proc_get_rx_chk_limit, proc_set_rx_chk_limit), RTW_PROC_HDL_SSEQ("hw_info", proc_get_hw_status, proc_set_hw_status), - + RTW_PROC_HDL_SSEQ("mac_rptbuf", proc_get_mac_rptbuf, NULL), #ifdef CONFIG_80211N_HT RTW_PROC_HDL_SSEQ("ht_enable", proc_get_ht_enable, proc_set_ht_enable), RTW_PROC_HDL_SSEQ("bw_mode", proc_get_bw_mode, proc_set_bw_mode), @@ -3438,15 +4090,14 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { RTW_PROC_HDL_SSEQ("rx_ampdu_factor", proc_get_rx_ampdu_factor, proc_set_rx_ampdu_factor), RTW_PROC_HDL_SSEQ("rx_ampdu_density", proc_get_rx_ampdu_density, proc_set_rx_ampdu_density), RTW_PROC_HDL_SSEQ("tx_ampdu_density", proc_get_tx_ampdu_density, proc_set_tx_ampdu_density), + RTW_PROC_HDL_SSEQ("tx_max_agg_num", proc_get_tx_max_agg_num, proc_set_tx_max_agg_num), #ifdef CONFIG_TX_AMSDU RTW_PROC_HDL_SSEQ("tx_amsdu", proc_get_tx_amsdu, proc_set_tx_amsdu), RTW_PROC_HDL_SSEQ("tx_amsdu_rate", proc_get_tx_amsdu_rate, proc_set_tx_amsdu_rate), #endif #endif /* CONFIG_80211N_HT */ - RTW_PROC_HDL_SSEQ("tx_max_agg_num", proc_get_tx_max_agg_num, proc_set_tx_max_agg_num), RTW_PROC_HDL_SSEQ("en_fwps", proc_get_en_fwps, proc_set_en_fwps), - RTW_PROC_HDL_SSEQ("mac_rptbuf", proc_get_mac_rptbuf, NULL), /* RTW_PROC_HDL_SSEQ("path_rssi", proc_get_two_path_rssi, NULL), * RTW_PROC_HDL_SSEQ("rssi_disp",proc_get_rssi_disp, proc_set_rssi_disp), */ @@ -3457,6 +4108,7 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { RTW_PROC_HDL_SSEQ("btinfo_evt", NULL, proc_set_btinfo_evt), RTW_PROC_HDL_SSEQ("btreg_read", proc_get_btreg_read, proc_set_btreg_read), RTW_PROC_HDL_SSEQ("btreg_write", proc_get_btreg_write, proc_set_btreg_write), + RTW_PROC_HDL_SSEQ("btc_reduce_wl_txpwr", proc_get_btc_reduce_wl_txpwr, proc_set_btc_reduce_wl_txpwr), #ifdef CONFIG_RF4CE_COEXIST RTW_PROC_HDL_SSEQ("rf4ce_state", proc_get_rf4ce_state, proc_set_rf4ce_state), #endif @@ -3466,6 +4118,10 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { RTW_PROC_HDL_SSEQ("sreset", proc_get_sreset, proc_set_sreset), #endif /* DBG_CONFIG_ERROR_DETECT */ RTW_PROC_HDL_SSEQ("trx_info_debug", proc_get_trx_info_debug, NULL), + +#ifdef CONFIG_HUAWEI_PROC + RTW_PROC_HDL_SSEQ("huawei_trx_info", proc_get_huawei_trx_info, NULL), +#endif RTW_PROC_HDL_SSEQ("linked_info_dump", proc_get_linked_info_dump, proc_set_linked_info_dump), RTW_PROC_HDL_SSEQ("sta_tp_dump", proc_get_sta_tp_dump, proc_set_sta_tp_dump), RTW_PROC_HDL_SSEQ("sta_tp_info", proc_get_sta_tp_info, NULL), @@ -3473,6 +4129,10 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { RTW_PROC_HDL_SSEQ("tx_info_msg", proc_get_tx_info_msg, NULL), RTW_PROC_HDL_SSEQ("rx_info_msg", proc_get_rx_info_msg, proc_set_rx_info_msg), +#if defined(CONFIG_LPS_PG) && defined(CONFIG_RTL8822C) + RTW_PROC_HDL_SSEQ("lps_pg_debug", proc_get_lps_pg_debug, NULL), +#endif + #ifdef CONFIG_GPIO_API RTW_PROC_HDL_SSEQ("gpio_info", proc_get_gpio, proc_set_gpio), RTW_PROC_HDL_SSEQ("gpio_set_output_value", NULL, proc_set_gpio_output_value), @@ -3497,6 +4157,11 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { RTW_PROC_HDL_SSEQ("tx_ring_ext", proc_get_tx_ring_ext, proc_set_tx_ring_ext), #endif RTW_PROC_HDL_SSEQ("pci_aspm", proc_get_pci_aspm, NULL), + + RTW_PROC_HDL_SSEQ("pci_conf_space", proc_get_pci_conf_space, proc_set_pci_conf_space), + + RTW_PROC_HDL_SSEQ("pci_bridge_conf_space", proc_get_pci_bridge_conf_space, proc_set_pci_bridge_conf_space), + #endif #ifdef CONFIG_WOWLAN @@ -3507,7 +4172,6 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { #ifdef CONFIG_WOW_PATTERN_HW_CAM RTW_PROC_HDL_SSEQ("wow_pattern_cam", proc_dump_pattern_cam, NULL), #endif - RTW_PROC_HDL_SSEQ("dis_wow_lps", proc_get_wow_lps_ctrl, proc_set_wow_lps_ctrl), #endif #ifdef CONFIG_GPIO_WAKEUP @@ -3526,22 +4190,32 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { #endif RTW_PROC_HDL_SSEQ("ch_sel_policy", proc_get_ch_sel_policy, proc_set_ch_sel_policy), #ifdef CONFIG_DFS_MASTER - RTW_PROC_HDL_SSEQ("dfs_master_test_case", proc_get_dfs_master_test_case, proc_set_dfs_master_test_case), + RTW_PROC_HDL_SSEQ("dfs_test_case", proc_get_dfs_test_case, proc_set_dfs_test_case), RTW_PROC_HDL_SSEQ("update_non_ocp", NULL, proc_set_update_non_ocp), RTW_PROC_HDL_SSEQ("radar_detect", NULL, proc_set_radar_detect), RTW_PROC_HDL_SSEQ("dfs_ch_sel_d_flags", proc_get_dfs_ch_sel_d_flags, proc_set_dfs_ch_sel_d_flags), + #ifdef CONFIG_DFS_SLAVE_WITH_RADAR_DETECT + RTW_PROC_HDL_SSEQ("dfs_slave_with_rd", proc_get_dfs_slave_with_rd, proc_set_dfs_slave_with_rd), + #endif #endif +#ifdef CONFIG_BCN_CNT_CONFIRM_HDL RTW_PROC_HDL_SSEQ("new_bcn_max", proc_get_new_bcn_max, proc_set_new_bcn_max), +#endif RTW_PROC_HDL_SSEQ("sink_udpport", proc_get_udpport, proc_set_udpport), #ifdef DBG_RX_COUNTER_DUMP RTW_PROC_HDL_SSEQ("dump_rx_cnt_mode", proc_get_rx_cnt_dump, proc_set_rx_cnt_dump), #endif RTW_PROC_HDL_SSEQ("change_bss_chbw", NULL, proc_set_change_bss_chbw), +#if CONFIG_TX_AC_LIFETIME + RTW_PROC_HDL_SSEQ("tx_aclt_force_val", proc_get_tx_aclt_force_val, proc_set_tx_aclt_force_val), + RTW_PROC_HDL_SSEQ("tx_aclt_flags", proc_get_tx_aclt_flags, proc_set_tx_aclt_flags), + RTW_PROC_HDL_SSEQ("tx_aclt_confs", proc_get_tx_aclt_confs, proc_set_tx_aclt_confs), +#endif RTW_PROC_HDL_SSEQ("tx_bw_mode", proc_get_tx_bw_mode, proc_set_tx_bw_mode), RTW_PROC_HDL_SSEQ("hal_txpwr_info", proc_get_hal_txpwr_info, NULL), RTW_PROC_HDL_SSEQ("target_tx_power", proc_get_target_tx_power, NULL), RTW_PROC_HDL_SSEQ("tx_power_by_rate", proc_get_tx_power_by_rate, NULL), -#ifdef CONFIG_TXPWR_LIMIT +#if CONFIG_TXPWR_LIMIT RTW_PROC_HDL_SSEQ("tx_power_limit", proc_get_tx_power_limit, NULL), #endif RTW_PROC_HDL_SSEQ("tx_power_ext_info", proc_get_tx_power_ext_info, proc_set_tx_power_ext_info), @@ -3553,7 +4227,7 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { RTW_PROC_HDL_SSEQ("kfree_thermal", proc_get_kfree_thermal, proc_set_kfree_thermal), #endif #ifdef CONFIG_POWER_SAVING - RTW_PROC_HDL_SSEQ("ps_info", proc_get_ps_info, NULL), + RTW_PROC_HDL_SSEQ("ps_info", proc_get_ps_info, proc_set_ps_info), #ifdef CONFIG_WMMPS_STA RTW_PROC_HDL_SSEQ("wmmps_info", proc_get_wmmps_info, proc_set_wmmps_info), #endif /* CONFIG_WMMPS_STA */ @@ -3583,6 +4257,10 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { RTW_PROC_HDL_SSEQ("11w_tx_auth", proc_get_tx_auth, proc_set_tx_auth), #endif /* CONFIG_IEEE80211W */ +#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA + RTW_PROC_HDL_SSEQ("pathb_phase", proc_get_pathb_phase, proc_set_pathb_phase), +#endif + #ifdef CONFIG_MBSSID_CAM RTW_PROC_HDL_SSEQ("mbid_cam", proc_get_mbid_cam_cache, NULL), #endif @@ -3595,10 +4273,11 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { RTW_PROC_HDL_SSEQ("tx_stat", proc_get_tx_stat, NULL), /**** PHY Capability ****/ RTW_PROC_HDL_SSEQ("phy_cap", proc_get_phy_cap, NULL), - +#ifdef CONFIG_80211N_HT RTW_PROC_HDL_SSEQ("rx_stbc", proc_get_rx_stbc, proc_set_rx_stbc), RTW_PROC_HDL_SSEQ("stbc_cap", proc_get_stbc_cap, proc_set_stbc_cap), RTW_PROC_HDL_SSEQ("ldpc_cap", proc_get_ldpc_cap, proc_set_ldpc_cap), +#endif /* CONFIG_80211N_HT */ #ifdef CONFIG_BEAMFORMING RTW_PROC_HDL_SSEQ("txbf_cap", proc_get_txbf_cap, proc_set_txbf_cap), #endif @@ -3628,6 +4307,12 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { RTW_PROC_HDL_SSEQ("fw_offload", proc_get_fw_offload, proc_set_fw_offload), #ifdef CONFIG_RTW_MESH + #if CONFIG_RTW_MESH_ACNODE_PREVENT + RTW_PROC_HDL_SSEQ("mesh_acnode_prevent", proc_get_mesh_acnode_prevent, proc_set_mesh_acnode_prevent), + #endif + #if CONFIG_RTW_MESH_OFFCH_CAND + RTW_PROC_HDL_SSEQ("mesh_offch_cand", proc_get_mesh_offch_cand, proc_set_mesh_offch_cand), + #endif #if CONFIG_RTW_MESH_PEER_BLACKLIST RTW_PROC_HDL_SSEQ("mesh_peer_blacklist", proc_get_mesh_peer_blacklist, proc_set_mesh_peer_blacklist), #endif @@ -3638,13 +4323,39 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { RTW_PROC_HDL_SSEQ("mesh_peer_sel_policy", proc_get_mesh_peer_sel_policy, NULL), RTW_PROC_HDL_SSEQ("mesh_networks", proc_get_mesh_networks, NULL), RTW_PROC_HDL_SSEQ("mesh_plink_ctl", proc_get_mesh_plink_ctl, NULL), + RTW_PROC_HDL_SSEQ("mesh_mpath", proc_get_mesh_mpath, NULL), + RTW_PROC_HDL_SSEQ("mesh_mpp", proc_get_mesh_mpp, NULL), + RTW_PROC_HDL_SSEQ("mesh_known_gates", proc_get_mesh_known_gates, NULL), #if CONFIG_RTW_MESH_DATA_BMC_TO_UC RTW_PROC_HDL_SSEQ("mesh_b2u_flags", proc_get_mesh_b2u_flags, proc_set_mesh_b2u_flags), #endif RTW_PROC_HDL_SSEQ("mesh_stats", proc_get_mesh_stats, NULL), RTW_PROC_HDL_SSEQ("mesh_gate_timeout_factor", proc_get_mesh_gate_timeout, proc_set_mesh_gate_timeout), - RTW_PROC_HDL_SSEQ("mesh_cto_mgate_state", proc_get_cto_mgate_state, NULL), + RTW_PROC_HDL_SSEQ("mesh_gate_state", proc_get_mesh_gate_state, NULL), + RTW_PROC_HDL_SSEQ("mesh_peer_alive_based_preq", proc_get_peer_alive_based_preq, proc_set_peer_alive_based_preq), #endif +#ifdef CONFIG_FW_HANDLE_TXBCN + RTW_PROC_HDL_SSEQ("fw_tbtt_rpt", proc_get_fw_tbtt_rpt, proc_set_fw_tbtt_rpt), +#endif +#ifdef CONFIG_LPS_CHK_BY_TP + RTW_PROC_HDL_SSEQ("lps_chk_tp", proc_get_lps_chk_tp, proc_set_lps_chk_tp), +#endif +#ifdef CONFIG_SUPPORT_STATIC_SMPS + RTW_PROC_HDL_SSEQ("smps", proc_get_smps, proc_set_smps), +#endif + + RTW_PROC_HDL_SSEQ("scan_deny", proc_get_scan_deny, proc_set_scan_deny), +#ifdef CONFIG_RTW_TPT_MODE + RTW_PROC_HDL_SSEQ("tpt_mode", proc_get_tpt_mode, proc_set_tpt_mode), +#endif + +#ifdef CONFIG_CTRL_TXSS_BY_TP + RTW_PROC_HDL_SSEQ("txss_tp", proc_get_txss_tp, proc_set_txss_tp), + #ifdef DBG_CTRL_TXSS + RTW_PROC_HDL_SSEQ("txss_ctrl", proc_get_txss_ctrl, proc_set_txss_ctrl), + #endif +#endif + }; const int adapter_proc_hdls_num = sizeof(adapter_proc_hdls) / sizeof(struct rtw_proc_hdl); @@ -3717,10 +4428,7 @@ ssize_t proc_set_odm_adaptivity(struct file *file, const char __user *buffer, si _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u32 th_l2h_ini; - u32 th_l2h_ini_mode2; s8 th_edcca_hl_diff; - s8 th_edcca_hl_diff_mode2; - u8 edcca_enable; if (count < 1) return -EFAULT; @@ -3732,12 +4440,12 @@ ssize_t proc_set_odm_adaptivity(struct file *file, const char __user *buffer, si if (buffer && !copy_from_user(tmp, buffer, count)) { - int num = sscanf(tmp, "%x %hhd %x %hhd %hhu", &th_l2h_ini, &th_edcca_hl_diff, &th_l2h_ini_mode2, &th_edcca_hl_diff_mode2, &edcca_enable); + int num = sscanf(tmp, "%x %hhd", &th_l2h_ini, &th_edcca_hl_diff); - if (num != 5) + if (num != 2) return count; - rtw_odm_adaptivity_parm_set(padapter, (s8)th_l2h_ini, th_edcca_hl_diff, (s8)th_l2h_ini_mode2, th_edcca_hl_diff_mode2, edcca_enable); + rtw_odm_adaptivity_parm_set(padapter, (s8)th_l2h_ini, th_edcca_hl_diff); } return count; @@ -3950,6 +4658,9 @@ const struct rtw_proc_hdl mcc_proc_hdls[] = { RTW_PROC_HDL_SSEQ("mcc_info", proc_get_mcc_info, NULL), RTW_PROC_HDL_SSEQ("mcc_enable", proc_get_mcc_info, proc_set_mcc_enable), RTW_PROC_HDL_SSEQ("mcc_duration", proc_get_mcc_info, proc_set_mcc_duration), + #ifdef CONFIG_MCC_PHYDM_OFFLOAD + RTW_PROC_HDL_SSEQ("mcc_phydm_offload", proc_get_mcc_info, proc_set_mcc_phydm_offload_enable), + #endif RTW_PROC_HDL_SSEQ("mcc_single_tx_criteria", proc_get_mcc_info, proc_set_mcc_single_tx_criteria), RTW_PROC_HDL_SSEQ("mcc_ap_bw20_target_tp", proc_get_mcc_info, proc_set_mcc_ap_bw20_target_tp), RTW_PROC_HDL_SSEQ("mcc_ap_bw40_target_tp", proc_get_mcc_info, proc_set_mcc_ap_bw40_target_tp), @@ -4084,7 +4795,6 @@ struct proc_dir_entry *rtw_adapter_proc_init(struct net_device *dev) struct proc_dir_entry *dir_dev = NULL; struct proc_dir_entry *entry = NULL; _adapter *adapter = rtw_netdev_priv(dev); - u8 rf_type; ssize_t i; if (drv_proc == NULL) { diff --git a/os_dep/linux/rtw_rhashtable.c b/os_dep/linux/rtw_rhashtable.c index 4d51f04..2820e7b 100644 --- a/os_dep/linux/rtw_rhashtable.c +++ b/os_dep/linux/rtw_rhashtable.c @@ -19,7 +19,10 @@ int rtw_rhashtable_walk_enter(rtw_rhashtable *ht, rtw_rhashtable_iter *iter) { -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0)) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 9, 0)) + rhashtable_walk_enter((ht), (iter)); + return 0; +#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0)) return rhashtable_walk_init((ht), (iter), GFP_ATOMIC); #else /* kernel >= 4.4.0 rhashtable_walk_init use GFP_KERNEL to alloc, spin_lock for assignment */ diff --git a/os_dep/linux/rtw_rhashtable.h b/os_dep/linux/rtw_rhashtable.h index 567ab39..699d5a2 100644 --- a/os_dep/linux/rtw_rhashtable.h +++ b/os_dep/linux/rtw_rhashtable.h @@ -40,7 +40,11 @@ typedef struct rhashtable_iter rtw_rhashtable_iter; int rtw_rhashtable_walk_enter(rtw_rhashtable *ht, rtw_rhashtable_iter *iter); #define rtw_rhashtable_walk_exit(iter) rhashtable_walk_exit(iter) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 16, 0)) +#define rtw_rhashtable_walk_start(iter) rhashtable_walk_start_check(iter) +#else #define rtw_rhashtable_walk_start(iter) rhashtable_walk_start(iter) +#endif #define rtw_rhashtable_walk_next(iter) rhashtable_walk_next(iter) #define rtw_rhashtable_walk_stop(iter) rhashtable_walk_stop(iter) diff --git a/os_dep/linux/usb_intf.c b/os_dep/linux/usb_intf.c index e3c2632..39da285 100644 --- a/os_dep/linux/usb_intf.c +++ b/os_dep/linux/usb_intf.c @@ -12,7 +12,6 @@ * more details. * *****************************************************************************/ - #define _HCI_INTF_C_ #include @@ -24,10 +23,6 @@ #error "CONFIG_USB_HCI shall be on!\n" #endif -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) -#error "Shall be Linux or Windows, but not both!\n" -#endif - #ifdef CONFIG_80211N_HT extern int rtw_ht_enable; extern int rtw_bw_mode; @@ -52,7 +47,6 @@ static void rtw_dev_shutdown(struct device *dev) struct usb_interface *usb_intf = container_of(dev, struct usb_interface, dev); struct dvobj_priv *dvobj = NULL; _adapter *adapter = NULL; - int i; RTW_INFO("%s\n", __func__); @@ -62,16 +56,17 @@ static void rtw_dev_shutdown(struct device *dev) adapter = dvobj_get_primary_adapter(dvobj); if (adapter) { if (!rtw_is_surprise_removed(adapter)) { - struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); #ifdef CONFIG_WOWLAN + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); + #ifdef CONFIG_GPIO_WAKEUP /*default wake up pin change to BT*/ - RTW_INFO("%s:default wake up pin change to BT\n", __func__); + RTW_INFO("%s:default wake up pin change to BT\n", __FUNCTION__); rtw_hal_switch_gpio_wl_ctrl(adapter, WAKEUP_GPIO_IDX, _FALSE); #endif /* CONFIG_GPIO_WAKEUP */ if (pwrctl->wowlan_mode == _TRUE) - RTW_PRINT("%s wowlan_mode ==_TRUE do not run rtw_hal_deinit()\n", __func__); + RTW_PRINT("%s wowlan_mode ==_TRUE do not run rtw_hal_deinit()\n", __FUNCTION__); else #endif { @@ -151,14 +146,8 @@ static struct usb_device_id rtw_usb_id_tbl[] = { {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x0179), .driver_info = RTL8188E}, /* 8188ETV */ /*=== Customer ID ===*/ /****** 8188EUS ********/ - {USB_DEVICE(0x07B8, 0x8179), .driver_info = RTL8188E}, /* TP-Link */ - {USB_DEVICE(0x0BDA, 0x8179), .driver_info = RTL8188E}, /* Abocom - Abocom */ - {USB_DEVICE(0x2357, 0x010c), .driver_info = RTL8188E}, /* TP-WL722n v2/v3/v4 */ - {USB_DEVICE(0x0DF6, 0x0076), .driver_info = RTL8188E}, /* Sitecom N150 v2 */ - {USB_DEVICE(0x2001, 0x330F), .driver_info = RTL8188E}, /* DLink DWA-125 REV D1 */ - {USB_DEVICE(0x2001, 0x3310), .driver_info = RTL8188E}, /* Dlink DWA-123 REV D1 */ - {USB_DEVICE(0x2001, 0x3311), .driver_info = RTL8188E}, /* DLink GO-USB-N150 REV B1 */ - {USB_DEVICE(0x056E, 0x4008), .driver_info = RTL8188E}, /* Elecom WDC-150SU2M */ + {USB_DEVICE(0x07B8, 0x8179), .driver_info = RTL8188E}, /* Abocom - Abocom */ + {USB_DEVICE(0x2357, 0x0111), .driver_info = RTL8188E}, /* TP-Link TL-WN727N v5.21 */ #endif #ifdef CONFIG_RTL8812A @@ -203,6 +192,7 @@ static struct usb_device_id rtw_usb_id_tbl[] = { {USB_DEVICE(0x0E66, 0x0023), .driver_info = RTL8821}, /* HAWKING - Edimax */ {USB_DEVICE(0x056E, 0x400E) , .driver_info = RTL8821}, /* ELECOM - ELECOM */ {USB_DEVICE(0x056E, 0x400F) , .driver_info = RTL8821}, /* ELECOM - ELECOM */ + {USB_DEVICE(0x20f4, 0x804b), .driver_info = RTL8821}, /* TRENDnet */ #endif #ifdef CONFIG_RTL8192E @@ -238,6 +228,11 @@ static struct usb_device_id rtw_usb_id_tbl[] = { {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xF179, 0xff, 0xff, 0xff), .driver_info = RTL8188F}, /* 8188FU 1*1 */ #endif +#ifdef CONFIG_RTL8188GTV + /*=== Realtek demoboard ===*/ + {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x018C, 0xff, 0xff, 0xff), .driver_info = RTL8188GTV}, /* 8188GTV 1*1 */ +#endif + #ifdef CONFIG_RTL8822B /*=== Realtek demoboard ===*/ {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xB82C, 0xff, 0xff, 0xff), .driver_info = RTL8822B}, /* Default ID for USB multi-function */ @@ -251,6 +246,11 @@ static struct usb_device_id rtw_usb_id_tbl[] = { {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xD723, 0xff, 0xff, 0xff), .driver_info = RTL8723D}, /* 8723DU 1*1 */ #endif +#ifdef CONFIG_RTL8192F + /*=== Realtek demoboard ===*/ + {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xF192, 0xff, 0xff, 0xff), .driver_info = RTL8192F}, /* 8192FU 2*2 */ +#endif + #ifdef CONFIG_RTL8821C /*=== Realtek demoboard ===*/ {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xb82b, 0xff, 0xff, 0xff), .driver_info = RTL8821C}, /* 8821CU */ @@ -264,6 +264,19 @@ static struct usb_device_id rtw_usb_id_tbl[] = { /*=== Customer ID ===*/ #endif +#ifdef CONFIG_RTL8710B + /*=== Realtek dongle ===*/ + {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xB711, 0xff, 0xff, 0xff), .driver_info = RTL8710B}, /* 8710B = 8188GU 1*1 */ +#endif + +#ifdef CONFIG_RTL8822C + /*=== Realtek demoboard ===*/ + {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xC82C, 0xff, 0xff, 0xff), .driver_info = RTL8822C}, /* Default ID for USB multi-function */ + {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xC812, 0xff, 0xff, 0xff), .driver_info = RTL8822C}, /* Default ID for USB Single-function, WiFi only */ + /*=== Customer ID ===*/ + {USB_DEVICE_AND_INTERFACE_INFO(0x13b1, 0x0043, 0xff, 0xff, 0xff), .driver_info = RTL8822C}, /* Alpha - Alpha*/ +#endif /* CONFIG_RTL8822C */ + {} /* Terminating entry */ }; @@ -425,6 +438,11 @@ static void rtw_decide_chip_type_by_usb_info(struct dvobj_priv *pdvobjpriv, cons rtl8188fu_set_hw_type(pdvobjpriv); #endif +#ifdef CONFIG_RTL8188GTV + if (pdvobjpriv->chip_type == RTL8188GTV) + rtl8188gtvu_set_hw_type(pdvobjpriv); +#endif + #ifdef CONFIG_RTL8703B if (pdvobjpriv->chip_type == RTL8703B) rtl8703bu_set_hw_type(pdvobjpriv); @@ -444,12 +462,26 @@ static void rtw_decide_chip_type_by_usb_info(struct dvobj_priv *pdvobjpriv, cons if (pdvobjpriv->chip_type == RTL8821C) rtl8821cu_set_hw_type(pdvobjpriv); #endif /* CONFIG_RTL8821C */ + +#ifdef CONFIG_RTL8710B + if (pdvobjpriv->chip_type == RTL8710B) + rtl8710bu_set_hw_type(pdvobjpriv); +#endif /* CONFIG_RTL8710B */ + +#ifdef CONFIG_RTL8192F + if (pdvobjpriv->chip_type == RTL8192F) + rtl8192fu_set_hw_type(pdvobjpriv); +#endif /* CONFIG_RTL8192F */ + +#ifdef CONFIG_RTL8822C + if (pdvobjpriv->chip_type == RTL8822C) + rtl8822cu_set_hw_type(pdvobjpriv); +#endif /* CONFIG_RTL8822C */ } static struct dvobj_priv *usb_dvobj_init(struct usb_interface *usb_intf, const struct usb_device_id *pdid) { int i; - u8 val8; int status = _FAIL; struct dvobj_priv *pdvobjpriv; struct usb_device_descriptor *pdev_desc; @@ -711,6 +743,11 @@ u8 rtw_set_hal_ops(_adapter *padapter) rtl8188fu_set_hal_ops(padapter); #endif +#ifdef CONFIG_RTL8188GTV + if (rtw_get_chip_type(padapter) == RTL8188GTV) + rtl8188gtvu_set_hal_ops(padapter); +#endif + #ifdef CONFIG_RTL8703B if (rtw_get_chip_type(padapter) == RTL8703B) rtl8703bu_set_hal_ops(padapter); @@ -734,6 +771,22 @@ u8 rtw_set_hal_ops(_adapter *padapter) } #endif +#ifdef CONFIG_RTL8710B + if (rtw_get_chip_type(padapter) == RTL8710B) + rtl8710bu_set_hal_ops(padapter); +#endif /* CONFIG_RTL8710B */ + + +#ifdef CONFIG_RTL8192F + if (rtw_get_chip_type(padapter) == RTL8192F) + rtl8192fu_set_hal_ops(padapter); +#endif + +#ifdef CONFIG_RTL8822C + if (rtw_get_chip_type(padapter) == RTL8822C) + rtl8822cu_set_hal_ops(padapter); +#endif /* CONFIG_RTL8822C */ + if (_FAIL == rtw_hal_ops_check(padapter)) return _FAIL; @@ -857,7 +910,7 @@ int rtw_hw_suspend(_adapter *padapter) #ifdef CONFIG_LPS /* donnot enqueue cmd */ - rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 0); + rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, RTW_CMDF_DIRECTLY); #endif } } @@ -876,7 +929,7 @@ int rtw_hw_suspend(_adapter *padapter) return 0; error_exit: - RTW_INFO("%s, failed\n", __func__); + RTW_INFO("%s, failed\n", __FUNCTION__); return -1; } @@ -911,7 +964,7 @@ int rtw_hw_resume(_adapter *padapter) return 0; error_exit: - RTW_INFO("%s, Open net dev failed\n", __func__); + RTW_INFO("%s, Open net dev failed\n", __FUNCTION__); return -1; } #endif @@ -931,7 +984,7 @@ static int rtw_suspend(struct usb_interface *pusb_intf, pm_message_t message) padapter = dvobj_get_primary_adapter(dvobj); if (pwrpriv->bInSuspend == _TRUE) { - RTW_INFO("%s bInSuspend = %d\n", __func__, pwrpriv->bInSuspend); + RTW_INFO("%s bInSuspend = %d\n", __FUNCTION__, pwrpriv->bInSuspend); pdbgpriv->dbg_suspend_error_cnt++; goto exit; } @@ -959,7 +1012,10 @@ exit: int rtw_resume_process(_adapter *padapter) { - int ret, pm_cnt = 0; + int ret; +#if defined(CONFIG_BT_COEXIST) && defined(CONFIG_AUTOSUSPEND) + int pm_cnt = 0; +#endif struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct dvobj_priv *pdvobj = padapter->dvobj; struct debug_priv *pdbgpriv = &pdvobj->drv_dbg; @@ -967,7 +1023,7 @@ int rtw_resume_process(_adapter *padapter) if (pwrpriv->bInSuspend == _FALSE) { pdbgpriv->dbg_resume_error_cnt++; - RTW_INFO("%s bInSuspend = %d\n", __func__, pwrpriv->bInSuspend); + RTW_INFO("%s bInSuspend = %d\n", __FUNCTION__, pwrpriv->bInSuspend); return -1; } @@ -1044,7 +1100,7 @@ static int rtw_resume(struct usb_interface *pusb_intf) padapter = dvobj_get_primary_adapter(dvobj); pmlmeext = &padapter->mlmeextpriv; - RTW_INFO("==> %s (%s:%d)\n", __func__, current->comm, current->pid); + RTW_INFO("==> %s (%s:%d)\n", __FUNCTION__, current->comm, current->pid); pdbgpriv->dbg_resume_cnt++; #ifdef CONFIG_AUTOSUSPEND @@ -1074,7 +1130,7 @@ static int rtw_resume(struct usb_interface *pusb_intf) } pmlmeext->last_scan_time = rtw_get_current_time(); - RTW_INFO("<======== %s return %d\n", __func__, ret); + RTW_INFO("<======== %s return %d\n", __FUNCTION__, ret); return ret; } @@ -1208,9 +1264,6 @@ extern void rtd2885_wlan_netlink_sendMsg(char *action_string, char *name); * notes: drv_init() is called when the bus driver has located a card for us to support. * We accept the new device by returning 0. */ - -_adapter *rtw_sw_export = NULL; - _adapter *rtw_usb_primary_adapter_init(struct dvobj_priv *dvobj, struct usb_interface *pusb_intf) { @@ -1343,6 +1396,9 @@ free_hal_data: rtw_hal_free_data(padapter); free_adapter: if (status != _SUCCESS && padapter) { + #ifdef RTW_HALMAC + rtw_halmac_deinit_adapter(dvobj); + #endif rtw_vmfree((u8 *)padapter, sizeof(*padapter)); padapter = NULL; } @@ -1352,7 +1408,9 @@ exit: static void rtw_usb_primary_adapter_deinit(_adapter *padapter) { +#if defined(CONFIG_WOWLAN) || defined(CONFIG_BT_COEXIST) struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); +#endif struct mlme_priv *pmlmepriv = &padapter->mlmepriv; RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); @@ -1451,10 +1509,6 @@ static int rtw_drv_init(struct usb_interface *pusb_intf, const struct usb_device } #endif -#ifdef CONFIG_INTEL_PROXIM - rtw_sw_export = padapter; -#endif - #ifdef CONFIG_GLOBAL_UI_PID if (ui_pid[1] != 0) { RTW_INFO("ui_pid[1]:%d\n", ui_pid[1]); @@ -1499,8 +1553,6 @@ free_dvobj: if (status != _SUCCESS) usb_dvobj_deinit(pusb_intf); exit: - if (!status) - pr_info("In %s return -ENODEV\n", __func__); return status == _SUCCESS ? 0 : -ENODEV; } @@ -1511,11 +1563,10 @@ exit: static void rtw_dev_remove(struct usb_interface *pusb_intf) { struct dvobj_priv *dvobj = usb_get_intfdata(pusb_intf); +#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(dvobj); +#endif _adapter *padapter = dvobj_get_primary_adapter(dvobj); - struct net_device *pnetdev = padapter->pnetdev; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - RTW_INFO("+rtw_dev_remove\n"); @@ -1569,12 +1620,6 @@ static void rtw_dev_remove(struct usb_interface *pusb_intf) RTW_INFO("-r871xu_dev_remove, done\n"); - -#ifdef CONFIG_INTEL_PROXIM - rtw_sw_export = NULL; -#endif - - return; } @@ -1644,14 +1689,5 @@ static void __exit rtw_drv_halt(void) rtw_mstat_dump(RTW_DBGDUMP); } - module_init(rtw_drv_entry); module_exit(rtw_drv_halt); - -#ifdef CONFIG_INTEL_PROXIM -_adapter *rtw_usb_get_sw_pointer(void) -{ - return rtw_sw_export; -} -EXPORT_SYMBOL(rtw_usb_get_sw_pointer); -#endif /* CONFIG_INTEL_PROXIM */ diff --git a/os_dep/linux/usb_ops_linux.c b/os_dep/linux/usb_ops_linux.c index 20af2be..226d53e 100644 --- a/os_dep/linux/usb_ops_linux.c +++ b/os_dep/linux/usb_ops_linux.c @@ -27,17 +27,18 @@ int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 inde { _adapter *padapter = pintfhdl->padapter; struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); - struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(pdvobjpriv); struct usb_device *udev = pdvobjpriv->pusbdev; unsigned int pipe; int status = 0; +#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE u32 tmp_buflen = 0; +#endif u8 reqtype; u8 *pIo_buf; int vendorreq_times = 0; -#if (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)) +#if (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)) || defined(CONFIG_RTL8822C) #define REG_ON_SEC 0x00 #define REG_OFF_SEC 0x01 #define REG_LOCAL_SEC 0x02 @@ -47,7 +48,9 @@ int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 inde #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE u8 *tmp_buf; #else /* use stack memory */ + #ifndef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC u8 tmp_buf[MAX_USB_IO_CTL_SIZE]; + #endif #endif /* RTW_INFO("%s %s:%d\n",__FUNCTION__, current->comm, current->pid); */ @@ -148,7 +151,7 @@ int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 inde } -#if (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)) +#if (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)) || defined(CONFIG_RTL8822C) if (value < 0xFE00) { if (0x00 <= value && value <= 0xff) current_reg_sec = REG_ON_SEC; @@ -273,15 +276,19 @@ unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr) else if (addr == RECV_INT_IN_ADDR) pipe = usb_rcvintpipe(pusbd, pdvobj->RtInPipe[1]); - else if (addr < HW_QUEUE_ENTRY) { #ifdef RTW_HALMAC - /* halmac already translate queue id to bulk out id */ - ep_num = pdvobj->RtOutPipe[addr]; + /* halmac already translate queue id to bulk out id (addr 0~3) */ + else if (addr < 4) { + ep_num = pdvobj->RtOutPipe[addr]; + pipe = usb_sndbulkpipe(pusbd, ep_num); + } #else - ep_num = pdvobj->Queue2Pipe[addr]; + else if (addr < HW_QUEUE_ENTRY) { + ep_num = pdvobj->Queue2Pipe[addr]; + pipe = usb_sndbulkpipe(pusbd, ep_num); + } #endif - pipe = usb_sndbulkpipe(pusbd, ep_num); - } + return pipe; } @@ -292,7 +299,7 @@ struct zero_bulkout_context { void *pirp; void *padapter; }; - +#if 0 static void usb_bulkout_zero_complete(struct urb *purb, struct pt_regs *regs) { struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)purb->context; @@ -322,7 +329,6 @@ static u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr) PURB purb = NULL; _adapter *padapter = (_adapter *)pintfhdl->padapter; struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); - struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(pdvobj); struct usb_device *pusbd = pdvobj->pusbdev; /* RTW_INFO("%s\n", __func__); */ @@ -369,7 +375,7 @@ static u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr) return _SUCCESS; } - +#endif void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) { @@ -407,7 +413,6 @@ void usb_read_port_cancel(struct intf_hdl *pintfhdl) static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs) { _irqL irqL; - int i; struct xmit_buf *pxmitbuf = (struct xmit_buf *)purb->context; /* struct xmit_frame *pxmitframe = (struct xmit_frame *)pxmitbuf->priv_data; */ /* _adapter *padapter = pxmitframe->padapter; */ @@ -545,18 +550,14 @@ u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) _irqL irqL; unsigned int pipe; int status; - u32 ret = _FAIL, bwritezero = _FALSE; + u32 ret = _FAIL; PURB purb = NULL; _adapter *padapter = (_adapter *)pintfhdl->padapter; struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); - struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(pdvobj); struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct xmit_buf *pxmitbuf = (struct xmit_buf *)wmem; struct xmit_frame *pxmitframe = (struct xmit_frame *)pxmitbuf->priv_data; struct usb_device *pusbd = pdvobj->pusbdev; - struct pkt_attrib *pattrib = &pxmitframe->attrib; - - if (RTW_CANNOT_TX(padapter)) { #ifdef DBG_TX @@ -985,7 +986,6 @@ u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) struct recv_buf *precvbuf = (struct recv_buf *)rmem; _adapter *adapter = pintfhdl->padapter; struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); - struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(pdvobj); struct recv_priv *precvpriv = &adapter->recvpriv; struct usb_device *pusbd = pdvobj->pusbdev; diff --git a/os_dep/linux/wifi_regd.c b/os_dep/linux/wifi_regd.c index 73ccf28..1ed088d 100644 --- a/os_dep/linux/wifi_regd.c +++ b/os_dep/linux/wifi_regd.c @@ -254,9 +254,8 @@ static void _rtw_reg_apply_active_scan_flags(struct wiphy *wiphy, void rtw_regd_apply_flags(struct wiphy *wiphy) { - _adapter *padapter = wiphy_to_adapter(wiphy); - struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); - u8 channel_plan = rfctl->ChannelPlan; + struct dvobj_priv *dvobj = wiphy_to_dvobj(wiphy); + struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj); RT_CHANNEL_INFO *channel_set = rfctl->channel_set; u8 max_chan_nums = rfctl->max_chan_nums; @@ -291,7 +290,7 @@ void rtw_regd_apply_flags(struct wiphy *wiphy) if (channel_set[i].ScanType == SCAN_PASSIVE #if defined(CONFIG_DFS_MASTER) - && rtw_odm_dfs_domain_unknown(padapter) + && rtw_odm_dfs_domain_unknown(dvobj) #endif ) { #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0)) @@ -305,7 +304,7 @@ void rtw_regd_apply_flags(struct wiphy *wiphy) #ifdef CONFIG_DFS if (rtw_is_dfs_ch(ch->hw_value) #if defined(CONFIG_DFS_MASTER) - && rtw_odm_dfs_domain_unknown(padapter) + && rtw_odm_dfs_domain_unknown(dvobj) #endif ) { ch->flags |= IEEE80211_CHAN_RADAR; @@ -390,17 +389,6 @@ static void _rtw_regd_init_wiphy(struct rtw_regulatory *reg, struct wiphy *wiphy rtw_regd_apply_flags(wiphy); } -static struct country_code_to_enum_rd *_rtw_regd_find_country(u16 countrycode) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(allCountries); i++) { - if (allCountries[i].countrycode == countrycode) - return &allCountries[i]; - } - return NULL; -} - int rtw_regd_init(struct wiphy *wiphy) { #if 0 diff --git a/os_dep/linux/xmit_linux.c b/os_dep/linux/xmit_linux.c index 6ddb0fe..3c42eb5 100644 --- a/os_dep/linux/xmit_linux.c +++ b/os_dep/linux/xmit_linux.c @@ -65,36 +65,48 @@ sint rtw_endofpktfile(struct pkt_file *pfile) void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib) { - -#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX +#ifdef CONFIG_TX_CSUM_OFFLOAD struct sk_buff *skb = (struct sk_buff *)pkt; - pattrib->hw_tcp_csum = 0; + struct iphdr *iph = NULL; + struct ipv6hdr *i6ph = NULL; + struct udphdr *uh = NULL; + struct tcphdr *th = NULL; + u8 protocol = 0xFF; - if (skb->ip_summed == CHECKSUM_PARTIAL) { - if (skb_shinfo(skb)->nr_frags == 0) { - const struct iphdr *ip = ip_hdr(skb); - if (ip->protocol == IPPROTO_TCP) { - /* TCP checksum offload by HW */ - RTW_INFO("CHECKSUM_PARTIAL TCP\n"); - pattrib->hw_tcp_csum = 1; - /* skb_checksum_help(skb); */ - } else if (ip->protocol == IPPROTO_UDP) { - /* RTW_INFO("CHECKSUM_PARTIAL UDP\n"); */ -#if 1 - skb_checksum_help(skb); -#else - /* Set UDP checksum = 0 to skip checksum check */ - struct udphdr *udp = skb_transport_header(skb); - udp->check = 0; -#endif - } else { - RTW_INFO("%s-%d TCP CSUM offload Error!!\n", __FUNCTION__, __LINE__); - WARN_ON(1); /* we need a WARN() */ - } - } else { /* IP fragmentation case */ - RTW_INFO("%s-%d nr_frags != 0, using skb_checksum_help(skb);!!\n", __FUNCTION__, __LINE__); + if (skb->protocol == htons(ETH_P_IP)) { + iph = (struct iphdr *)skb_network_header(skb); + protocol = iph->protocol; + } else if (skb->protocol == htons(ETH_P_IPV6)) { + i6ph = (struct ipv6hdr *)skb_network_header(skb); + protocol = i6ph->nexthdr; + } else + {} + + /* HW unable to compute CSUM if header & payload was be encrypted by SW(cause TXDMA error) */ + if (pattrib->bswenc == _TRUE) { + if (skb->ip_summed == CHECKSUM_PARTIAL) skb_checksum_help(skb); - } + return; + } + + /* For HW rule, clear ipv4_csum & UDP/TCP_csum if it is UDP/TCP packet */ + switch (protocol) { + case IPPROTO_UDP: + uh = (struct udphdr *)skb_transport_header(skb); + uh->check = 0; + if (iph) + iph->check = 0; + pattrib->hw_csum = _TRUE; + break; + case IPPROTO_TCP: + th = (struct tcphdr *)skb_transport_header(skb); + th->check = 0; + if (iph) + iph->check = 0; + pattrib->hw_csum = _TRUE; + break; + default: + break; } #endif @@ -313,7 +325,6 @@ void rtw_os_xmit_schedule(_adapter *padapter) static bool rtw_check_xmit_resource(_adapter *padapter, _pkt *pkt) { bool busy = _FALSE; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) u16 qidx; @@ -404,9 +415,9 @@ int rtw_mlcst2unicst(_adapter *padapter, struct sk_buff *skb) } /* avoid come from STA1 and send back STA1 */ - if (_rtw_memcmp(psta->cmn.mac_addr, &skb->data[6], 6) == _TRUE - || _rtw_memcmp(psta->cmn.mac_addr, null_addr, 6) == _TRUE - || _rtw_memcmp(psta->cmn.mac_addr, bc_addr, 6) == _TRUE + if (_rtw_memcmp(psta->cmn.mac_addr, &skb->data[6], ETH_ALEN) == _TRUE + || _rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) == _TRUE + || _rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) == _TRUE ) { DBG_COUNTER(padapter->tx_logs.os_tx_m2u_ignore_self); continue; @@ -417,7 +428,7 @@ int rtw_mlcst2unicst(_adapter *padapter, struct sk_buff *skb) newskb = rtw_skb_copy(skb); if (newskb) { - _rtw_memcpy(newskb->data, psta->cmn.mac_addr, 6); + _rtw_memcpy(newskb->data, psta->cmn.mac_addr, ETH_ALEN); res = rtw_xmit(padapter, &newskb); if (res < 0) { DBG_COUNTER(padapter->tx_logs.os_tx_m2u_entry_err_xmit); @@ -445,14 +456,14 @@ int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); struct xmit_priv *pxmitpriv = &padapter->xmitpriv; #ifdef CONFIG_TX_MCAST2UNI - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; extern int rtw_mc2u_disable; #endif /* CONFIG_TX_MCAST2UNI */ - s32 res = 0; -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) - u16 queue; +#ifdef CONFIG_TX_CSUM_OFFLOAD + struct sk_buff *skb = pkt; + struct sk_buff *segs, *nskb; + netdev_features_t features = padapter->pnetdev->features; #endif - + s32 res = 0; if (padapter->registrypriv.mp_mode) { RTW_INFO("MP_TX_DROP_OS_FRAME\n"); @@ -493,6 +504,33 @@ int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) } #endif /* CONFIG_TX_MCAST2UNI */ +#ifdef CONFIG_TX_CSUM_OFFLOAD + if (skb_shinfo(skb)->gso_size) { + /* split a big(65k) skb into several small(1.5k) skbs */ + features &= ~(NETIF_F_TSO | NETIF_F_TSO6); + segs = skb_gso_segment(skb, features); + if (IS_ERR(segs) || !segs) + goto drop_packet; + + do { + nskb = segs; + segs = segs->next; + nskb->next = NULL; + rtw_mstat_update( MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, nskb->truesize); + res = rtw_xmit(padapter, &nskb); + if (res < 0) { + #ifdef DBG_TX_DROP_FRAME + RTW_INFO("DBG_TX_DROP_FRAME %s rtw_xmit fail\n", __FUNCTION__); + #endif + pxmitpriv->tx_drop++; + rtw_os_pkt_complete(padapter, nskb); + } + } while (segs); + rtw_os_pkt_complete(padapter, skb); + goto exit; + } +#endif + res = rtw_xmit(padapter, &pkt); if (res < 0) { #ifdef DBG_TX_DROP_FRAME diff --git a/os_dep/osdep_service.c b/os_dep/osdep_service.c index e5323f1..84093c8 100644 --- a/os_dep/osdep_service.c +++ b/os_dep/osdep_service.c @@ -73,11 +73,37 @@ u32 rtw_atoi(u8 *s) } -inline void *_rtw_zvmalloc(u32 sz) +inline void *_rtw_vmalloc(u32 sz) { void *pbuf; #ifdef PLATFORM_LINUX pbuf = vmalloc(sz); +#endif +#ifdef PLATFORM_FREEBSD + pbuf = malloc(sz, M_DEVBUF, M_NOWAIT); +#endif + +#ifdef PLATFORM_WINDOWS + NdisAllocateMemoryWithTag(&pbuf, sz, RT_TAG); +#endif + +#ifdef DBG_MEMORY_LEAK +#ifdef PLATFORM_LINUX + if (pbuf != NULL) { + atomic_inc(&_malloc_cnt); + atomic_add(sz, &_malloc_size); + } +#endif +#endif /* DBG_MEMORY_LEAK */ + + return pbuf; +} + +inline void *_rtw_zvmalloc(u32 sz) +{ + void *pbuf; +#ifdef PLATFORM_LINUX + pbuf = _rtw_vmalloc(sz); if (pbuf != NULL) memset(pbuf, 0, sz); #endif @@ -549,7 +575,7 @@ inline void *dbg_rtw_vmalloc(u32 sz, const enum mstat_f flags, const char *func, if (match_mstat_sniff_rules(flags, sz)) RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); - p = vmalloc((sz)); + p = _rtw_vmalloc((sz)); rtw_mstat_update( flags @@ -1372,6 +1398,19 @@ void _rtw_spinlock_init(_lock *plock) } +void _rtw_spinlock_free(_lock *plock) +{ +#ifdef PLATFORM_FREEBSD + mtx_destroy(plock); +#endif + +#ifdef PLATFORM_WINDOWS + + NdisFreeSpinLock(plock); + +#endif + +} #ifdef PLATFORM_FREEBSD extern PADAPTER prtw_lock; @@ -1478,6 +1517,7 @@ void _rtw_init_queue(_queue *pqueue) void _rtw_deinit_queue(_queue *pqueue) { + _rtw_spinlock_free(&(pqueue->lock)); } u32 _rtw_queue_empty(_queue *pqueue) @@ -1768,6 +1808,20 @@ void rtw_yield_os(void) #endif } +bool rtw_macaddr_is_larger(const u8 *a, const u8 *b) +{ + u32 va, vb; + + va = be32_to_cpu(*((u32 *)a)); + vb = be32_to_cpu(*((u32 *)b)); + if (va > vb) + return 1; + else if (va < vb) + return 0; + + return be16_to_cpu(*((u16 *)(a + 4))) > be16_to_cpu(*((u16 *)(b + 4))); +} + #define RTW_SUSPEND_LOCK_NAME "rtw_wifi" #define RTW_SUSPEND_TRAFFIC_LOCK_NAME "rtw_wifi_traffic" #define RTW_SUSPEND_RESUME_LOCK_NAME "rtw_wifi_resume" @@ -2147,7 +2201,11 @@ static int isFileReadable(const char *path, u32 *sz) ret = PTR_ERR(fp); else { oldfs = get_fs(); + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 1, 0)) set_fs(KERNEL_DS); + #else + set_fs(get_ds()); + #endif if (1 != readFile(fp, &buf, 1)) ret = PTR_ERR(fp); @@ -2185,7 +2243,11 @@ static int retriveFromFile(const char *path, u8 *buf, u32 sz) RTW_INFO("%s openFile path:%s fp=%p\n", __FUNCTION__, path , fp); oldfs = get_fs(); + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 1, 0)) set_fs(KERNEL_DS); + #else + set_fs(get_ds()); + #endif ret = readFile(fp, buf, sz); set_fs(oldfs); closeFile(fp); @@ -2220,7 +2282,11 @@ static int storeToFile(const char *path, u8 *buf, u32 sz) RTW_INFO("%s openFile path:%s fp=%p\n", __FUNCTION__, path , fp); oldfs = get_fs(); + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 1, 0)) set_fs(KERNEL_DS); + #else + set_fs(get_ds()); + #endif ret = writeFile(fp, buf, sz); set_fs(oldfs); closeFile(fp); @@ -2274,6 +2340,25 @@ int rtw_is_file_readable_with_size(const char *path, u32 *sz) #endif } +/* +* Test if the specifi @param path is a readable file with valid size. +* If readable, @param sz is got +* @param path the path of the file to test +* @return _TRUE or _FALSE +*/ +int rtw_readable_file_sz_chk(const char *path, u32 sz) +{ + u32 fsz; + + if (rtw_is_file_readable_with_size(path, &fsz) == _FALSE) + return _FALSE; + + if (fsz > sz) + return _FALSE; + + return _TRUE; +} + /* * Open the file with @param path and retrive the file content into memory starting from @param buf for @param sz at most * @param path the path of the file to open and read @@ -2831,7 +2916,6 @@ int rtw_blacklist_add(_queue *blist, const u8 *addr, u32 timeout_ms) exit_critical_bh(&blist->lock); -exit: return (exist == _TRUE && timeout == _FALSE) ? RTW_ALREADY : (ent ? _SUCCESS : _FAIL); } @@ -2863,7 +2947,6 @@ int rtw_blacklist_del(_queue *blist, const u8 *addr) exit_critical_bh(&blist->lock); -exit: return exist == _TRUE ? _SUCCESS : RTW_ALREADY; } @@ -2897,7 +2980,6 @@ int rtw_blacklist_search(_queue *blist, const u8 *addr) exit_critical_bh(&blist->lock); -exit: return exist; }