mirror of
https://github.com/sinseman44/PyCNC.git
synced 2026-07-16 08:37:09 +00:00
reorganise project
This commit is contained in:
Nikolay Khabarov
Executable
@@ -0,0 +1,152 @@
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import logging
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import time
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import rpgpio
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from cnc.pulses import PulseGeneratorLinear
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from cnc.coordinates import Coordinates
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from cnc.config import *
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# Stepper motors channel for RPIO
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STEPPER_CHANNEL = 0
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# Since there is no way to add pulses and then start cycle in RPIO,
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# use this delay to start adding pulses to cycle. It can be easily
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# solved by modifying RPIO in a way of adding method to start cycle
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# explicitly.
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RPIO_START_DELAY_US = 200000
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# Since RPIO generate cycles in loop, use this delay to stop RPIO
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# It can be removed if RPIO would allow to run single shot cycle.
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RPIO_STOP_DELAY_US = 5000000
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US_IN_SECONDS = 1000000
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gpio = rpgpio.GPIO()
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dma = rpgpio.DMAGPIO()
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STEP_PIN_MASK_X = 1 << STEPPER_STEP_PIN_X
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STEP_PIN_MASK_Y = 1 << STEPPER_STEP_PIN_Y
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STEP_PIN_MASK_Z = 1 << STEPPER_STEP_PIN_Z
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def init():
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""" Initialize GPIO pins and machine itself, including callibration if
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needed. Do not return till all procedure is completed.
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"""
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gpio.init(STEPPER_STEP_PIN_X, rpgpio.GPIO.MODE_OUTPUT)
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gpio.init(STEPPER_STEP_PIN_Y, rpgpio.GPIO.MODE_OUTPUT)
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gpio.init(STEPPER_STEP_PIN_Z, rpgpio.GPIO.MODE_OUTPUT)
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gpio.init(STEPPER_DIR_PIN_X, rpgpio.GPIO.MODE_OUTPUT)
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gpio.init(STEPPER_DIR_PIN_Y, rpgpio.GPIO.MODE_OUTPUT)
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gpio.init(STEPPER_DIR_PIN_Z, rpgpio.GPIO.MODE_OUTPUT)
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gpio.init(ENDSTOP_PIN_X, rpgpio.GPIO.MODE_INPUT_PULLUP)
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gpio.init(ENDSTOP_PIN_X, rpgpio.GPIO.MODE_INPUT_PULLUP)
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gpio.init(ENDSTOP_PIN_X, rpgpio.GPIO.MODE_INPUT_PULLUP)
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# calibration
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gpio.set(STEPPER_DIR_PIN_X)
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gpio.set(STEPPER_DIR_PIN_Y)
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gpio.set(STEPPER_DIR_PIN_Z)
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pins = STEP_PIN_MASK_X | STEP_PIN_MASK_Y | STEP_PIN_MASK_Z
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dma.clear()
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dma.add_pulse(pins, STEPPER_PULSE_LINGTH_US)
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while True:
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if (STEP_PIN_MASK_X & pins) != 0 and gpio.read(ENDSTOP_PIN_X) == 0:
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pins &= ~STEP_PIN_MASK_X
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dma.clear()
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dma.add_pulse(pins, STEPPER_PULSE_LINGTH_US)
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if (STEP_PIN_MASK_Y & pins) != 0 and gpio.read(ENDSTOP_PIN_Y) == 0:
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pins &= ~STEP_PIN_MASK_Y
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dma.clear()
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dma.add_pulse(pins, STEPPER_PULSE_LINGTH_US)
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if (STEP_PIN_MASK_Z & pins) != 0 and gpio.read(ENDSTOP_PIN_Z) == 0:
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pins &= ~STEP_PIN_MASK_Z
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dma.clear()
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dma.add_pulse(pins, STEPPER_PULSE_LINGTH_US)
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if pins == 0:
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break
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dma.run(False)
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# limit velocity at ~10% of top velocity
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time.sleep((1 / 0.10) / (STEPPER_MAX_VELOCITY_MM_PER_MIN
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/ 60 * STEPPER_PULSES_PER_MM))
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def spindle_control(percent):
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""" Spindle control implementation.
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:param percent: Spindle speed in percent.
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"""
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# TODO spindle control.
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logging.info("TODO spindle control: {}%".format(percent))
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def move_linear(delta, velocity):
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""" Move head to specified position
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:param delta: Coordinated object, delta position in mm
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:param velocity: velocity in mm per min
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"""
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logging.info("move {} with velocity {}".format(delta, velocity))
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# initialize generator
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generator = PulseGeneratorLinear(delta, velocity)
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# wait if previous command still works
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while dma.is_active():
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time.sleep(0.001)
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# set direction pins
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if delta.x > 0.0:
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gpio.clear(STEPPER_DIR_PIN_X)
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else:
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gpio.set(STEPPER_DIR_PIN_X)
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if delta.y > 0.0:
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gpio.clear(STEPPER_DIR_PIN_Y)
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else:
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gpio.set(STEPPER_DIR_PIN_Y)
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if delta.z > 0.0:
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gpio.clear(STEPPER_DIR_PIN_Z)
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else:
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gpio.set(STEPPER_DIR_PIN_Z)
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# prepare and run dma
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dma.clear()
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prev = 0
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is_ran = False
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st = time.time()
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for tx, ty, tz in generator:
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pins = 0
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k = int(round(min(x for x in (tx, ty, tz) if x is not None)
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* US_IN_SECONDS))
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if tx is not None:
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pins |= STEP_PIN_MASK_X
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if ty is not None:
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pins |= STEP_PIN_MASK_Y
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if tz is not None:
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pins |= STEP_PIN_MASK_Z
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if k - prev > 0:
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dma.add_delay(k - prev)
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dma.add_pulse(pins, STEPPER_PULSE_LINGTH_US)
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# TODO not a precise way! pulses will set in queue, instead of crossing
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# if next pulse start during pulse length. Though it almost doesn't
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# matter for pulses with 1-2us length.
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prev = k + STEPPER_PULSE_LINGTH_US
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# instant run handling
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if not is_ran and INSTANT_RUN:
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if k > 500000: # wait at least 500 ms is uploaded
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if time.time() - st > 0.5:
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# may be instant run should be canceled here?
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logging.warn("Buffer preparing for instant run took more "
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"time then buffer time")
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dma.run_stream()
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is_ran = True
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pt = time.time()
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if not is_ran:
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dma.run(False)
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else:
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dma.finalize_stream()
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logging.info("prepared in " + str(round(pt - st, 2)) + "s, estimated in "
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+ str(round(generator.total_time_s(), 2)) + "s")
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def join():
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""" Wait till motors work.
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"""
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# wait till dma works
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while dma.is_active():
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time.sleep(0.01)
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Executable
+289
@@ -0,0 +1,289 @@
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#!/usr/bin/env python
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from rpgpio_private import *
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import time
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import logging
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import sys
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import struct
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class GPIO(object):
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MODE_OUTPUT = 1
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MODE_INPUT_NOPULL = 2
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MODE_INPUT_PULLUP = 3
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MODE_INPUT_PULLDOWN = 4
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def __init__(self):
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""" Create object which can control GPIO.
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This class writes directly to CPU registers and doesn't use any libs
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or kernel modules.
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"""
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self._mem = PhysicalMemory(PERI_BASE + GPIO_REGISTER_BASE)
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def _pullupdn(self, pin, mode):
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p = self._mem.read_int(GPIO_PULLUPDN_OFFSET)
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p &= ~3
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if mode == self.MODE_INPUT_PULLUP:
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p |= 2
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elif mode == self.MODE_INPUT_PULLDOWN:
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p |= 1
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self._mem.write_int(GPIO_PULLUPDN_OFFSET, p)
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addr = 4 * int(pin / 32) + GPIO_PULLUPDNCLK_OFFSET
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self._mem.write_int(addr, 1 << (pin % 32))
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p = self._mem.read_int(GPIO_PULLUPDN_OFFSET)
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p &= ~3
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self._mem.write_int(GPIO_PULLUPDN_OFFSET, p)
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self._mem.write_int(addr, 0)
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def init(self, pin, mode):
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""" Initialize or re-initialize GPIO pin.
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:param pin: pin number.
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:param mode: one of MODE_* variables in this class.
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"""
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addr = 4 * int(pin / 10) + GPIO_FSEL_OFFSET
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v = self._mem.read_int(addr)
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v &= ~(7 << ((pin % 10) * 3)) # input value
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if mode == self.MODE_OUTPUT:
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v |= (1 << ((pin % 10) * 3)) # output value, base on input
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self._mem.write_int(addr, v)
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else:
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self._mem.write_int(addr, v)
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self._pullupdn(pin, mode)
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def set(self, pin):
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""" Set pin to HIGH state.
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:param pin: pin number.
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"""
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addr = 4 * int(pin / 32) + GPIO_SET_OFFSET
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self._mem.write_int(addr, 1 << (pin % 32))
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def clear(self, pin):
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""" Set pin to LOW state.
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:param pin: pin number.
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"""
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addr = 4 * int(pin / 32) + GPIO_CLEAR_OFFSET
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self._mem.write_int(addr, 1 << (pin % 32))
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def read(self, pin):
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""" Read pin current value.
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:param pin: pin number.
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:return: integer value 0 or 1.
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"""
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addr = 4 * int(pin / 32) + GPIO_INPUT_OFFSET
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v = self._mem.read_int(addr)
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v &= 1 << (pin % 32)
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if v == 0:
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return 0
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return 1
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class DMAGPIO(object):
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_DMA_CONTROL_BLOCK_SIZE = 32
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_DMA_CHANNEL = 5
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def __init__(self):
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""" Create object which control GPIO pins via DMA(Direct Memory
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Access).
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This object allows to add arbitrary sequence of pulses to any GPIO
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outputs and run this sequence in background without using CPU since
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DMA is a separated hardware module.
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Note: keep this object out of garbage collector until it stops,
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otherwise memory will be unlocked and it could be overwritten by
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operating system.
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"""
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# allocate buffer for control blocks, always 32 MB
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self._physmem = CMAPhysicalMemory(32 * 1024 * 1024)
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self.__current_address = 0
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# prepare dma registers memory map
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self._dma = PhysicalMemory(PERI_BASE + DMA_BASE)
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self._pwm = PhysicalMemory(PERI_BASE + PWM_BASE)
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self._clock = PhysicalMemory(PERI_BASE + CM_BASE)
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# pre calculated variables for control blocks
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self._delay_info = DMA_TI_NO_WIDE_BURSTS | DMA_SRC_IGNORE \
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| DMA_TI_PER_MAP(DMA_TI_PER_MAP_PWM) \
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| DMA_TI_DEST_DREQ
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self._delay_destination = PHYSICAL_PWM_BUS + 0x18
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self._delay_stride = 0
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self._pulse_info = DMA_TI_NO_WIDE_BURSTS | DMA_TI_TDMODE \
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| DMA_TI_WAIT_RESP
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self._pulse_destination = PHYSICAL_GPIO_BUS + GPIO_SET_OFFSET
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# YLENGTH is transfers count and XLENGTH size of each transfer
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self._pulse_length = DMA_TI_TXFR_LEN_YLENGTH(2) \
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| DMA_TI_TXFR_LEN_XLENGTH(4)
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self._pulse_stride = DMA_TI_STRIDE_D_STRIDE(12) \
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| DMA_TI_STRIDE_S_STRIDE(4)
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def add_pulse(self, pins_mask, length_us):
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""" Add single pulse at the current position.
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:param pins_mask: bitwise mask of GPIO pins to trigger. Only for first 32 pins.
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:param length_us: length in us.
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"""
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next_cb = self.__current_address + 3 * self._DMA_CONTROL_BLOCK_SIZE
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if next_cb > self._physmem.get_size():
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raise MemoryError("Out of allocated memory.")
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next3 = next_cb + self._physmem.get_bus_address()
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next2 = next3 - self._DMA_CONTROL_BLOCK_SIZE
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next1 = next2 - self._DMA_CONTROL_BLOCK_SIZE
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source1 = next1 - 8 # last 8 bytes are padding, use it to store data
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length2 = 16 * length_us
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source3 = next3 - 8
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data = (
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self._pulse_info, source1, self._pulse_destination,
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self._pulse_length,
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self._pulse_stride, next1, pins_mask, 0,
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self._delay_info, 0, self._delay_destination, length2,
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self._delay_stride, next2, 0, 0,
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self._pulse_info, source3, self._pulse_destination,
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self._pulse_length,
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self._pulse_stride, next3, 0, pins_mask
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)
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self._physmem.write(self.__current_address, data)
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self.__current_address = next_cb
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def add_delay(self, delay_us):
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""" Add delay at the current position.
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:param delay_us: delay in us.
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"""
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next_cb = self.__current_address + self._DMA_CONTROL_BLOCK_SIZE
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if next_cb > self._physmem.get_size():
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raise MemoryError("Out of allocated memory.")
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next = self._physmem.get_bus_address() + next_cb
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source = next - 8 # last 8 bytes are padding, use it to store data
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length = 16 * delay_us
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data = (
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self._delay_info, source, self._delay_destination, length,
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self._delay_stride, next, 0, 0
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)
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self._physmem.write(self.__current_address, data)
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self.__current_address = next_cb
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def finalize_stream(self):
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""" Mark last added block as the last one.
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"""
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self._physmem.write_int(self.__current_address + 20
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- self._DMA_CONTROL_BLOCK_SIZE, 0)
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logging.info("DMA took {}MB of memory".
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format(round(self.__current_address / 1024.0 / 1024.0, 2)))
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def run_stream(self):
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""" Run DMA module in stream mode, i.e. does'n finalize last block
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and do not check if there is anything to do.
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"""
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# configure PWM hardware module which will clocks DMA
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self._pwm.write_int(PWM_CTL, 0)
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self._clock.write_int(CM_CNTL, CM_PASSWORD | CM_SRC_PLLD) # disable
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while (self._clock.read_int(CM_CNTL) & (1 << 7)) != 0:
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time.sleep(0.00001) # 10 us, wait until BUSY bit is clear
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self._clock.write_int(CM_DIV, CM_PASSWORD | CM_DIV_VALUE(50)) # 10MHz
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self._clock.write_int(CM_CNTL, CM_PASSWORD | CM_SRC_PLLD | CM_ENABLE)
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self._pwm.write_int(PWM_RNG1, 100)
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self._pwm.write_int(PWM_DMAC, PWM_DMAC_ENAB
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| PWM_DMAC_PANIC(15) | PWM_DMAC_DREQ(15))
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self._pwm.write_int(PWM_CTL, PWM_CTL_CLRF)
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self._pwm.write_int(PWM_CTL, PWM_CTL_USEF1 | PWM_CTL_PWEN1)
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# configure DMA
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addr = 0x100 * self._DMA_CHANNEL
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cs = self._dma.read_int(addr)
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cs |= DMA_CS_END
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self._dma.write_int(addr, cs)
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self._dma.write_int(addr + 4, self._physmem.get_bus_address())
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cs = DMA_CS_PRIORITY(7) | DMA_CS_PANIC_PRIORITY(7) | DMA_CS_DISDEBUG
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self._dma.write_int(addr, cs)
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cs |= DMA_CS_ACTIVE
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self._dma.write_int(addr, cs)
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def run(self, loop=False):
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""" Run DMA module and start sending specified pulses.
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:param loop: If true, run pulse sequence in infinite loop. Otherwise
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"""
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if self.__current_address == 0:
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raise RuntimeError("Nothing was added.")
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# fix 'next' field in previous control block
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if loop:
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self._physmem.write_int(self.__current_address + 20
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- self._DMA_CONTROL_BLOCK_SIZE,
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self._physmem.get_bus_address())
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else:
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self.finalize_stream()
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self.run_stream()
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def stop(self):
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""" Stop any DMA activities.
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"""
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self._pwm.write_int(PWM_CTL, 0)
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addr = 0x100 * self._DMA_CHANNEL
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cs = self._dma.read_int(addr)
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cs |= DMA_CS_ABORT
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self._dma.write_int(addr, cs)
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cs &= ~DMA_CS_ACTIVE
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self._dma.write_int(addr, cs)
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cs |= DMA_CS_RESET
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self._dma.write_int(addr, cs)
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def is_active(self):
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""" Check if DMA is working. Method can check if single sent sequence
|
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still active.
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:return: boolean value
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"""
|
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addr = 0x100 * self._DMA_CHANNEL
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cs = self._dma.read_int(addr)
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if cs & DMA_CS_ACTIVE == DMA_CS_ACTIVE:
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return True
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return False
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def clear(self):
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""" Remove any specified pulses.
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"""
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self.__current_address = 0
|
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# for testing purpose
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def main():
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pin = 21
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g = GPIO()
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g.init(pin, GPIO.MODE_INPUT_NOPULL)
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print("nopull " + str(g.read(pin)))
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g.init(pin, GPIO.MODE_INPUT_PULLDOWN)
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print("pulldown " + str(g.read(pin)))
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g.init(pin, GPIO.MODE_INPUT_PULLUP)
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print("pullup " + str(g.read(pin)))
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time.sleep(1)
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g.init(pin, GPIO.MODE_OUTPUT)
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g.set(pin)
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print("set " + str(g.read(pin)))
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time.sleep(1)
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g.clear(pin)
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print("clear " + str(g.read(pin)))
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time.sleep(1)
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cma = CMAPhysicalMemory(1*1024*1024)
|
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print(str(cma.get_size() / 1024 / 1024) + "MB of memory allocated at " \
|
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+ hex(cma.get_phys_address()))
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a = cma.read_int(0)
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print("was " + hex(a))
|
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cma.write_int(0, 0x12345678)
|
||||
a = cma.read_int(0)
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assert a == 0x12345678, "Memory isn't written or read correctly"
|
||||
print("now " + hex(a))
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del cma
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||||
dg = DMAGPIO()
|
||||
dg.add_pulse(1 << pin, 4000)
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||||
dg.add_delay(12000)
|
||||
dg.run(True)
|
||||
print("dmagpio is started")
|
||||
try:
|
||||
print("press enter to stop...")
|
||||
sys.stdin.readline()
|
||||
except KeyboardInterrupt:
|
||||
pass
|
||||
dg.stop()
|
||||
g.clear(pin)
|
||||
print("dma stopped")
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
@@ -0,0 +1,198 @@
|
||||
import os
|
||||
import mmap
|
||||
import struct
|
||||
import re
|
||||
import fcntl
|
||||
import array
|
||||
import atexit
|
||||
import ctypes
|
||||
|
||||
# Raspberry Pi registers
|
||||
# https://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
|
||||
RPI1_PERI_BASE = 0x20000000
|
||||
RPI2_3_PERI_BASE = 0x3F000000
|
||||
# detect board version
|
||||
with open("/proc/cpuinfo", "r") as f:
|
||||
d = f.read()
|
||||
r = re.search("^Revision\s+:\s+(.+)$", d, flags=re.MULTILINE)
|
||||
h = re.search("^Hardware\s+:\s+(.+)$", d, flags=re.MULTILINE)
|
||||
RPI_1_REVISIONS = ['0002', '0003', '0004', '0005', '0006', '0007', '0008',
|
||||
'0009', '000d', '000e', '000f', '0010', '0011', '0012',
|
||||
'0013', '0014', '0015', '900021', '900032']
|
||||
if h is None:
|
||||
raise ImportError("This is not raspberry pi board.")
|
||||
elif r.group(1) in RPI_1_REVISIONS:
|
||||
PERI_BASE = RPI1_PERI_BASE
|
||||
elif "BCM2" in h.group(1):
|
||||
PERI_BASE = RPI2_3_PERI_BASE
|
||||
else:
|
||||
raise ImportError("Unknown board.")
|
||||
PAGE_SIZE = 4096
|
||||
GPIO_REGISTER_BASE = 0x200000
|
||||
GPIO_INPUT_OFFSET = 0x34
|
||||
GPIO_SET_OFFSET = 0x1C
|
||||
GPIO_CLEAR_OFFSET = 0x28
|
||||
GPIO_FSEL_OFFSET = 0x0
|
||||
GPIO_PULLUPDN_OFFSET = 0x94
|
||||
GPIO_PULLUPDNCLK_OFFSET = 0x98
|
||||
PHYSICAL_GPIO_BUS = 0x7E000000 + GPIO_REGISTER_BASE
|
||||
|
||||
# registers and values for DMA
|
||||
DMA_BASE = 0x007000
|
||||
DMA_TI_NO_WIDE_BURSTS = 1 << 26
|
||||
DMA_TI_SRC_INC = 1 << 8
|
||||
DMA_TI_DEST_INC = 1 << 4
|
||||
DMA_SRC_IGNORE = 1 << 11
|
||||
DMA_DEST_IGNORE = 1 << 7
|
||||
DMA_TI_TDMODE = 1 << 1
|
||||
DMA_TI_WAIT_RESP = 1 << 3
|
||||
DMA_TI_SRC_DREQ = 1 << 10
|
||||
DMA_TI_DEST_DREQ = 1 << 6
|
||||
DMA_CS_RESET = 1 << 31
|
||||
DMA_CS_ABORT = 1 << 30
|
||||
DMA_CS_DISDEBUG = 1 << 28
|
||||
DMA_CS_END = 1 << 1
|
||||
DMA_CS_ACTIVE = 1 << 0
|
||||
DMA_TI_PER_MAP_PWM = 5
|
||||
DMA_TI_PER_MAP_PCM = 2
|
||||
|
||||
def DMA_TI_PER_MAP(x):
|
||||
return x << 16
|
||||
|
||||
def DMA_TI_TXFR_LEN_YLENGTH(y):
|
||||
return (y & 0x3fff) << 16
|
||||
|
||||
def DMA_TI_TXFR_LEN_XLENGTH(x):
|
||||
return x & 0xffff
|
||||
|
||||
def DMA_TI_STRIDE_D_STRIDE(x):
|
||||
return (x & 0xffff) << 16
|
||||
|
||||
def DMA_TI_STRIDE_S_STRIDE(x):
|
||||
return x & 0xffff
|
||||
|
||||
def DMA_CS_PRIORITY(x):
|
||||
return (x & 0xf) << 16
|
||||
|
||||
def DMA_CS_PANIC_PRIORITY(x):
|
||||
return (x & 0xf) << 20
|
||||
|
||||
# hardware PWM controller registers
|
||||
PWM_BASE = 0x0020C000
|
||||
PWM_CTL= 0x00
|
||||
PWM_DMAC = 0x08
|
||||
PWM_RNG1 = 0x10
|
||||
PWM_FIFO = 0x18
|
||||
PWM_CTL_MODE1 = 1 << 1
|
||||
PWM_CTL_PWEN1 = 1 << 0
|
||||
PWM_CTL_CLRF = 1 << 6
|
||||
PWM_CTL_USEF1 = 1 << 5
|
||||
PWM_DMAC_ENAB = 1 << 31
|
||||
PHYSICAL_PWM_BUS = 0x7E000000 + PWM_BASE
|
||||
|
||||
def PWM_DMAC_PANIC(x):
|
||||
return x << 8
|
||||
|
||||
def PWM_DMAC_DREQ(x):
|
||||
return x
|
||||
|
||||
# clock manager module
|
||||
CM_BASE = 0x00101000
|
||||
CM_CNTL = 40
|
||||
CM_DIV = 41
|
||||
CM_PASSWORD = 0x5A << 24
|
||||
CM_ENABLE = 1 << 4
|
||||
CM_SRC_OSC = 1 # 19.2 MHz
|
||||
CM_SRC_PLLC = 5 # 1000 MHz
|
||||
CM_SRC_PLLD = 6 # 500 MHz
|
||||
CM_SRC_HDMI = 7 # 216 MHz
|
||||
|
||||
def CM_DIV_VALUE(x):
|
||||
return x << 12
|
||||
|
||||
|
||||
class PhysicalMemory(object):
|
||||
def __init__(self, phys_address, size=PAGE_SIZE):
|
||||
""" Create object which maps physical memory to Python's mmap object.
|
||||
:param phys_address: based address of physical memory
|
||||
"""
|
||||
self._size = size
|
||||
phys_address -= phys_address % PAGE_SIZE
|
||||
fd = self._open_dev("/dev/mem")
|
||||
self._rmap = mmap.mmap(fd, size, flags=mmap.MAP_SHARED,
|
||||
prot=mmap.PROT_READ | mmap.PROT_WRITE,
|
||||
offset=phys_address)
|
||||
atexit.register(self.cleanup)
|
||||
|
||||
def cleanup(self):
|
||||
self._rmap.close()
|
||||
|
||||
@staticmethod
|
||||
def _open_dev(name):
|
||||
fd = os.open(name, os.O_SYNC | os.O_RDWR | os.O_LARGEFILE)
|
||||
if fd < 0:
|
||||
raise IOError("Failed to open " + name)
|
||||
return fd
|
||||
|
||||
@staticmethod
|
||||
def _close_dev(fd):
|
||||
os.close(fd)
|
||||
|
||||
def write_int(self, address, int_value):
|
||||
self._rmap[address:address + 4] = struct.pack("I", int_value)
|
||||
|
||||
def write(self, address, data):
|
||||
self._rmap.seek(address)
|
||||
self._rmap.write(struct.pack(str(len(data)) + "I", *data))
|
||||
|
||||
def read_int(self, address):
|
||||
return struct.unpack("I", self._rmap[address:address + 4])[0]
|
||||
|
||||
def get_size(self):
|
||||
return self._size
|
||||
|
||||
|
||||
class CMAPhysicalMemory(PhysicalMemory):
|
||||
IOCTL_MBOX_PROPERTY = ctypes.c_long(0xc0046400).value
|
||||
def __init__(self, size):
|
||||
""" This class allocates continuous memory with specified size, lock it
|
||||
and provide access to it with Python's mmap. It uses RPi video
|
||||
buffers to allocate it (/dev/vcio).
|
||||
:param size: number of bytes to allocate
|
||||
"""
|
||||
size = (size + PAGE_SIZE - 1) // PAGE_SIZE * PAGE_SIZE
|
||||
self._vcio_fd = self._open_dev("/dev/vcio")
|
||||
self._handle = self._send_data(0x3000c, [size, PAGE_SIZE, 0xC]) # allocate memory
|
||||
if self._handle == 0:
|
||||
raise OSError("No memory to allocate with /dev/vcio")
|
||||
self._busmem = self._send_data(0x3000d, [self._handle]) # lock memory
|
||||
if self._busmem == 0:
|
||||
# memory should be freed in __del__
|
||||
raise OSError("Failed to lock memory with /dev/vcio")
|
||||
# print("allocate {} at {} (bus {})".format(size,
|
||||
# hex(self.get_phys_address()), hex(self.get_bus_address())))
|
||||
super(CMAPhysicalMemory, self).__init__(self.get_phys_address(), size)
|
||||
atexit.register(self.free)
|
||||
|
||||
def free(self):
|
||||
self._send_data(0x3000e, [self._handle]) # unlock memory
|
||||
self._send_data(0x3000f, [self._handle]) # free memory
|
||||
self._close_dev(self._vcio_fd)
|
||||
|
||||
def _send_data(self, request, args):
|
||||
data = array.array('I')
|
||||
data.append(24 + 4 * len(args)) # total size
|
||||
data.append(0) # process request
|
||||
data.append(request) # request id
|
||||
data.append(4 * len(args)) # size of the buffer
|
||||
data.append(4 * len(args)) # size of the data
|
||||
data.extend(args) # arguments
|
||||
data.append(0) # end mark
|
||||
fcntl.ioctl(self._vcio_fd, self.IOCTL_MBOX_PROPERTY, data, True)
|
||||
return data[5]
|
||||
|
||||
def get_bus_address(self):
|
||||
return self._busmem
|
||||
|
||||
def get_phys_address(self):
|
||||
return self._busmem & ~0xc0000000
|
||||
Reference in New Issue
Block a user