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fix PWM usage
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78804a438a
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3b73d7dcc4
3 files changed
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-29
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@@ -39,6 +39,8 @@ PHYSICAL_GPIO_BUS = 0x7E000000 + GPIO_REGISTER_BASE
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# registers and values for DMA
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DMA_BASE = 0x007000
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DMA_CS = 0x00
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DMA_CONBLK_AD = 0x04
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DMA_TI_NO_WIDE_BURSTS = 1 << 26
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DMA_TI_SRC_INC = 1 << 8
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DMA_TI_DEST_INC = 1 << 4
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@@ -79,16 +81,20 @@ def DMA_CS_PANIC_PRIORITY(x):
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# hardware PWM controller registers
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PWM_BASE = 0x0020C000
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PHYSICAL_PWM_BUS = 0x7E000000 + PWM_BASE
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PWM_CTL= 0x00
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PWM_DMAC = 0x08
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PWM_RNG1 = 0x10
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PWM_RNG2 = 0x20
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PWM_FIFO = 0x18
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PWM_CTL_MODE1 = 1 << 1
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PWM_CTL_MODE2 = 1 << 9
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PWM_CTL_PWEN1 = 1 << 0
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PWM_CTL_PWEN2 = 1 << 8
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PWM_CTL_CLRF = 1 << 6
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PWM_CTL_USEF1 = 1 << 5
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PWM_CTL_USEF2 = 1 << 13
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PWM_DMAC_ENAB = 1 << 31
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PHYSICAL_PWM_BUS = 0x7E000000 + PWM_BASE
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def PWM_DMAC_PANIC(x):
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return x << 8
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@@ -98,10 +104,13 @@ def PWM_DMAC_DREQ(x):
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# clock manager module
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CM_BASE = 0x00101000
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CM_CNTL = 40
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CM_DIV = 41
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CM_PCM_CNTL = 0x98
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CM_PCM_DIV = 0x9C
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CM_PWM_CNTL = 0xA0
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CM_PWM_DIV = 0xA4
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CM_PASSWORD = 0x5A << 24
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CM_ENABLE = 1 << 4
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CM_CNTL_ENABLE = 1 << 4
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CM_CNTL_BUSY = 1 << 7
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CM_SRC_OSC = 1 # 19.2 MHz
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CM_SRC_PLLC = 5 # 1000 MHz
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CM_SRC_PLLD = 6 # 500 MHz
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@@ -218,26 +227,24 @@ class DMAProto(object):
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""" Run DMA module from created buffer.
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"""
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address = 0x100 * self._DMA_CHANNEL
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cs = self._dma.read_int(address)
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cs |= DMA_CS_END
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self._dma.write_int(address, cs)
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self._dma.write_int(address + 4, self._physmem.get_bus_address())
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self._dma.write_int(address + DMA_CS, DMA_CS_END)
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self._dma.write_int(address + DMA_CONBLK_AD, self._physmem.get_bus_address())
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cs = DMA_CS_PRIORITY(7) | DMA_CS_PANIC_PRIORITY(7) | DMA_CS_DISDEBUG
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self._dma.write_int(address, cs)
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self._dma.write_int(address + DMA_CS, cs)
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cs |= DMA_CS_ACTIVE
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self._dma.write_int(address, cs)
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self._dma.write_int(address + DMA_CS, cs)
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def _stop_dma(self):
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""" Stop DMA
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"""
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address = 0x100 * self._DMA_CHANNEL
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cs = self._dma.read_int(address)
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cs = self._dma.read_int(address + DMA_CS)
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cs |= DMA_CS_ABORT
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self._dma.write_int(address, cs)
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self._dma.write_int(address + DMA_CS, cs)
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cs &= ~DMA_CS_ACTIVE
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self._dma.write_int(address, cs)
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self._dma.write_int(address + DMA_CS, cs)
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cs |= DMA_CS_RESET
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self._dma.write_int(address, cs)
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self._dma.write_int(address + DMA_CS, cs)
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def is_active(self):
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""" Check if DMA is working. Method can check if single sequence
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@@ -245,7 +252,7 @@ class DMAProto(object):
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:return: boolean value
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"""
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address = 0x100 * self._DMA_CHANNEL
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cs = self._dma.read_int(address)
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cs = self._dma.read_int(address + DMA_CS)
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if cs & DMA_CS_ACTIVE == DMA_CS_ACTIVE:
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return True
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return False
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