ajout des recettes et conf
This commit is contained in:
@@ -0,0 +1,10 @@
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--- a/arch/arm/boot/dts/Makefile 2023-01-13 09:27:51.367753591 +0000
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+++ b/arch/arm/boot/dts/Makefile 2023-01-13 09:39:42.321184641 +0000
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@@ -826,6 +826,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
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am335x-sbc-t335.dtb \
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am335x-sl50.dtb \
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am335x-wega-rdk.dtb \
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+ am335x-pengwyn.dtb \
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am335x-osd3358-sm-red.dtb
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dtb-$(CONFIG_ARCH_OMAP4) += \
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omap4-droid-bionic-xt875.dtb \
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@@ -0,0 +1,606 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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model = "Silica AM335x Pengwyn";
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compatible = "ti,am335x-pengwyn", "ti,am33xx";
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cpus {
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cpu@0 {
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cpu0-supply = <&vdd1_reg>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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chosen {
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stdout-path = &uart0;
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};
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vbat: fixedregulator0 {
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compatible = "regulator-fixed";
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regulator-name = "vbat";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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};
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lis3_reg: fixedregulator1 {
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compatible = "regulator-fixed";
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regulator-name = "lis3_reg";
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regulator-boot-on;
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};
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/* TPS79501 */
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v1_8d_reg: fixedregulator-v1_8d {
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compatible = "regulator-fixed";
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regulator-name = "v1_8d";
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vin-supply = <&vbat>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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/* TPS79501 */
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v3_3d_reg: fixedregulator-v3_3d {
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compatible = "regulator-fixed";
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regulator-name = "v3_3d";
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vin-supply = <&vbat>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&am33xx_pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
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i2c0_pins: pinmux_i2c0_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_sda.i2c0_sda */
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AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_scl.i2c0_scl */
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>;
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};
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i2c1_pins: pinmux_i2c1_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE2) /* spi0_d1.i2c1_sda */
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AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE2) /* spi0_cs0.i2c1_scl */
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>;
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};
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uart0_pins: pinmux_uart0_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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>;
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};
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uart1_pins: pinmux_uart1_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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>;
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};
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clkout2_pin: pinmux_clkout2_pin {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
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>;
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};
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nandflash_pins_s0: nandflash_pins_s0 {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_30 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
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>;
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};
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ecap0_pins: backlight_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, 0x0, MUX_MODE0)
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>;
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};
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
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>;
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};
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cpsw_sleep: cpsw_sleep {
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pinctrl-single,pins = <
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/* Slave 1 reset value */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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/* MDIO */
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
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>;
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};
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davinci_mdio_sleep: davinci_mdio_sleep {
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pinctrl-single,pins = <
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/* MDIO reset value */
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* spi0_cs1.gpio0_6 */
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AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT, MUX_MODE4) /* mcasp0_aclkr.mmc0_sdwp */
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>;
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};
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mmc3_pins: pinmux_mmc3_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_a1.mmc2_dat0, INPUT_PULLUP | MODE3 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_a2.mmc2_dat1, INPUT_PULLUP | MODE3 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_a3.mmc2_dat2, INPUT_PULLUP | MODE3 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ben1.mmc2_dat3, INPUT_PULLUP | MODE3 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_csn3.mmc2_cmd, INPUT_PULLUP | MODE3 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_clk.mmc2_clk, INPUT_PULLUP | MODE3 */
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>;
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};
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mcasp1_pins: mcasp1_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
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AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_OUTPUT_PULLDOWN, MUX_MODE4) /* mii1_col.mcasp1_axr2 */
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AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
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>;
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};
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mcasp1_pins_sleep: mcasp1_pins_sleep {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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dcan1_pins_default: dcan1_pins_default {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2) /* uart0_ctsn.d_can1_tx */
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AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE2) /* uart0_rtsn.d_can1_rx */
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>;
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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clock-frequency = <400000>;
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tps: tps@2d {
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reg = <0x2d>;
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};
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};
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&usb1 {
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dr_mode = "host";
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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status = "okay";
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clock-frequency = <100000>;
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lis331dlh: lis331dlh@18 {
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compatible = "st,lis331dlh", "st,lis3lv02d";
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reg = <0x18>;
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Vdd-supply = <&lis3_reg>;
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Vdd_IO-supply = <&lis3_reg>;
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st,click-single-x;
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st,click-single-y;
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st,click-single-z;
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st,click-thresh-x = <10>;
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st,click-thresh-y = <10>;
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st,click-thresh-z = <10>;
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st,irq1-click;
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st,irq2-click;
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st,wakeup-x-lo;
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st,wakeup-x-hi;
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st,wakeup-y-lo;
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st,wakeup-y-hi;
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st,wakeup-z-lo;
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st,wakeup-z-hi;
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st,min-limit-x = <120>;
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st,min-limit-y = <120>;
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st,min-limit-z = <140>;
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st,max-limit-x = <550>;
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st,max-limit-y = <550>;
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st,max-limit-z = <750>;
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};
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tsl2550: tsl2550@39 {
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compatible = "taos,tsl2550";
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reg = <0x39>;
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||||
};
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||||
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tmp275: tmp275@48 {
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compatible = "ti,tmp275";
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reg = <0x48>;
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};
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tlv320aic3106: tlv320aic3106@1b {
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#sound-dai-cells = <0>;
|
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compatible = "ti,tlv320aic3106";
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reg = <0x1b>;
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status = "okay";
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/* Regulators */
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AVDD-supply = <&v3_3d_reg>;
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IOVDD-supply = <&v3_3d_reg>;
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DRVDD-supply = <&v3_3d_reg>;
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DVDD-supply = <&v1_8d_reg>;
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};
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};
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|
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&elm {
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status = "okay";
|
||||
};
|
||||
|
||||
&epwmss0 {
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||||
status = "okay";
|
||||
|
||||
ecap0: ecap@100 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ecap0_pins>;
|
||||
};
|
||||
};
|
||||
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||||
&gpmc {
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status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&nandflash_pins_s0>;
|
||||
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
|
||||
nand@0,0 {
|
||||
compatible = "ti,omap2-nand";
|
||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
||||
interrupt-parent = <&gpmc>;
|
||||
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
|
||||
<1 IRQ_TYPE_NONE>; /* termcount */
|
||||
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
|
||||
ti,nand-xfer-type = "prefetch-dma";
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
ti,elm-id = <&elm>;
|
||||
nand-bus-width = <8>;
|
||||
gpmc,device-width = <1>;
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <44>;
|
||||
gpmc,cs-wr-off-ns = <44>;
|
||||
gpmc,adv-on-ns = <6>;
|
||||
gpmc,adv-rd-off-ns = <34>;
|
||||
gpmc,adv-wr-off-ns = <44>;
|
||||
gpmc,we-on-ns = <0>;
|
||||
gpmc,we-off-ns = <40>;
|
||||
gpmc,oe-on-ns = <0>;
|
||||
gpmc,oe-off-ns = <54>;
|
||||
gpmc,access-ns = <64>;
|
||||
gpmc,rd-cycle-ns = <82>;
|
||||
gpmc,wr-cycle-ns = <82>;
|
||||
gpmc,bus-turnaround-ns = <0>;
|
||||
gpmc,cycle2cycle-delay-ns = <0>;
|
||||
gpmc,clk-activation-ns = <0>;
|
||||
gpmc,wr-access-ns = <40>;
|
||||
gpmc,wr-data-mux-bus-ns = <0>;
|
||||
/* MTD partition table */
|
||||
/* All SPL-* partitions are sized to minimal length
|
||||
* which can be independently programmable. For
|
||||
* NAND flash this is equal to size of erase-block */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "NAND.SPL";
|
||||
reg = <0x00000000 0x000020000>;
|
||||
};
|
||||
partition@1 {
|
||||
label = "NAND.SPL.backup1";
|
||||
reg = <0x00020000 0x00020000>;
|
||||
};
|
||||
partition@2 {
|
||||
label = "NAND.SPL.backup2";
|
||||
reg = <0x00040000 0x00020000>;
|
||||
};
|
||||
partition@3 {
|
||||
label = "NAND.SPL.backup3";
|
||||
reg = <0x00060000 0x00020000>;
|
||||
};
|
||||
partition@4 {
|
||||
label = "NAND.u-boot-spl-os";
|
||||
reg = <0x00080000 0x00040000>;
|
||||
};
|
||||
partition@5 {
|
||||
label = "NAND.u-boot";
|
||||
reg = <0x000C0000 0x00100000>;
|
||||
};
|
||||
partition@6 {
|
||||
label = "NAND.u-boot-env";
|
||||
reg = <0x001C0000 0x00020000>;
|
||||
};
|
||||
partition@7 {
|
||||
label = "NAND.u-boot-env.backup1";
|
||||
reg = <0x001E0000 0x00020000>;
|
||||
};
|
||||
partition@8 {
|
||||
label = "NAND.kernel";
|
||||
reg = <0x00200000 0x00800000>;
|
||||
};
|
||||
partition@9 {
|
||||
label = "NAND.file-system";
|
||||
reg = <0x00A00000 0x0F600000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
#include "tps65910.dtsi"
|
||||
|
||||
&mcasp1 {
|
||||
#sound-dai-cells = <0>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&mcasp1_pins>;
|
||||
pinctrl-1 = <&mcasp1_pins_sleep>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
op-mode = <0>; /* MCASP_IIS_MODE */
|
||||
tdm-slots = <2>;
|
||||
/* 4 serializers */
|
||||
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
||||
0 0 1 2
|
||||
>;
|
||||
tx-num-evt = <32>;
|
||||
rx-num-evt = <32>;
|
||||
};
|
||||
|
||||
&tps {
|
||||
vcc1-supply = <&vbat>;
|
||||
vcc2-supply = <&vbat>;
|
||||
vcc3-supply = <&vbat>;
|
||||
vcc4-supply = <&vbat>;
|
||||
vcc5-supply = <&vbat>;
|
||||
vcc6-supply = <&vbat>;
|
||||
vcc7-supply = <&vbat>;
|
||||
vccio-supply = <&vbat>;
|
||||
|
||||
regulators {
|
||||
vrtc_reg: regulator@0 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vio_reg: regulator@1 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd1_reg: regulator@2 {
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <912500>;
|
||||
regulator-max-microvolt = <1351500>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd2_reg: regulator@3 {
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <912500>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd3_reg: regulator@4 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdig1_reg: regulator@5 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdig2_reg: regulator@6 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vpll_reg: regulator@7 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdac_reg: regulator@8 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux1_reg: regulator@9 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux2_reg: regulator@10 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux33_reg: regulator@11 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vmmc_reg: regulator@12 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mac {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
pinctrl-1 = <&cpsw_sleep>;
|
||||
status = "okay";
|
||||
slaves = <1>;
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_default>;
|
||||
pinctrl-1 = <&davinci_mdio_sleep>;
|
||||
status = "okay";
|
||||
|
||||
ethphy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy-handle = <ðphy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
|
||||
&tscadc {
|
||||
status = "okay";
|
||||
tsc {
|
||||
ti,wires = <4>;
|
||||
ti,x-plate-resistance = <200>;
|
||||
ti,coordinate-readouts = <5>;
|
||||
ti,wire-config = <0x00 0x11 0x22 0x33>;
|
||||
ti,charge-delay = <0x400>;
|
||||
};
|
||||
|
||||
adc {
|
||||
ti,adc-channels = <4 5 6 7>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&vmmc_reg>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
/* these are on the crossbar and are outlined in the
|
||||
xbar-event-map element */
|
||||
dmas = <&edma_xbar 12 0 1
|
||||
&edma_xbar 13 0 2>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "okay";
|
||||
vmmc-supply = <&wlan_en_reg>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc3_pins &wlan_pins>;
|
||||
non-removable;
|
||||
cap-power-off-card;
|
||||
keep-power-in-suspend;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
wlcore: wlcore@0 {
|
||||
compatible = "ti,wl1835";
|
||||
reg = <2>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <17 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
};
|
||||
|
||||
&sham {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&aes {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dcan1 {
|
||||
status = "disabled"; /* Enable only if Profile 1 is selected */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dcan1_pins_default>;
|
||||
};
|
||||
|
||||
&rtc {
|
||||
clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
|
||||
clock-names = "ext-clk", "int-clk";
|
||||
};
|
||||
|
||||
@@ -0,0 +1,590 @@
|
||||
CONFIG_KERNEL_LZMA=y
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_AUDIT=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_LOG_BUF_SHIFT=16
|
||||
CONFIG_CGROUPS=y
|
||||
CONFIG_MEMCG=y
|
||||
CONFIG_MEMCG_SWAP=y
|
||||
CONFIG_BLK_CGROUP=y
|
||||
CONFIG_CGROUP_SCHED=y
|
||||
CONFIG_CFS_BANDWIDTH=y
|
||||
CONFIG_RT_GROUP_SCHED=y
|
||||
CONFIG_CGROUP_FREEZER=y
|
||||
CONFIG_CPUSETS=y
|
||||
CONFIG_CGROUP_DEVICE=y
|
||||
CONFIG_CGROUP_CPUACCT=y
|
||||
CONFIG_CGROUP_PERF=y
|
||||
CONFIG_NAMESPACES=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_EXPERT=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_ARCH_MULTI_V6=y
|
||||
CONFIG_POWER_AVS_OMAP=y
|
||||
CONFIG_POWER_AVS_OMAP_CLASS3=y
|
||||
CONFIG_OMAP_RESET_CLOCKS=y
|
||||
CONFIG_ARCH_OMAP2=y
|
||||
CONFIG_ARCH_OMAP3=y
|
||||
CONFIG_ARCH_OMAP4=y
|
||||
CONFIG_SOC_OMAP5=y
|
||||
CONFIG_SOC_AM33XX=y
|
||||
CONFIG_SOC_AM43XX=y
|
||||
CONFIG_SOC_DRA7XX=y
|
||||
CONFIG_ARM_THUMBEE=y
|
||||
CONFIG_ARM_ERRATA_411920=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_NR_CPUS=2
|
||||
CONFIG_SECCOMP=y
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
CONFIG_ARM_ATAG_DTB_COMPAT=y
|
||||
CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200"
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPUFREQ_DT=m
|
||||
# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
|
||||
CONFIG_ARM_TI_CPUFREQ=y
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_ARM_CPUIDLE=y
|
||||
CONFIG_DT_IDLE_STATES=y
|
||||
CONFIG_KERNEL_MODE_NEON=y
|
||||
CONFIG_PM_DEBUG=y
|
||||
CONFIG_ARM_CRYPTO=y
|
||||
CONFIG_CRYPTO_SHA1_ARM_NEON=m
|
||||
CONFIG_CRYPTO_SHA256_ARM=m
|
||||
CONFIG_CRYPTO_SHA512_ARM=m
|
||||
CONFIG_CRYPTO_AES_ARM=m
|
||||
CONFIG_CRYPTO_AES_ARM_BS=m
|
||||
CONFIG_CRYPTO_GHASH_ARM_CE=m
|
||||
CONFIG_CRYPTO_CHACHA20_NEON=m
|
||||
CONFIG_OPROFILE=y
|
||||
CONFIG_KPROBES=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_FORCE_LOAD=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
CONFIG_MODVERSIONS=y
|
||||
CONFIG_MODULE_SRCVERSION_ALL=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
CONFIG_BINFMT_MISC=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_ZSMALLOC=m
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_NET_KEY_MIGRATE=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
CONFIG_IP_PNP_RARP=y
|
||||
CONFIG_NETFILTER=y
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_BRIDGE_VLAN_FILTERING=y
|
||||
CONFIG_VLAN_8021Q=m
|
||||
CONFIG_PHONET=m
|
||||
CONFIG_NET_SCHED=y
|
||||
CONFIG_NET_SCH_INGRESS=m
|
||||
CONFIG_NET_CLS_U32=m
|
||||
CONFIG_NET_CLS_FLOWER=m
|
||||
CONFIG_NET_CLS_MATCHALL=m
|
||||
CONFIG_NET_CLS_ACT=y
|
||||
CONFIG_NET_ACT_POLICE=m
|
||||
CONFIG_NET_ACT_GACT=m
|
||||
CONFIG_NET_SWITCHDEV=y
|
||||
CONFIG_CAN=m
|
||||
CONFIG_CAN_C_CAN=m
|
||||
CONFIG_CAN_C_CAN_PLATFORM=m
|
||||
CONFIG_BT=m
|
||||
CONFIG_BT_RFCOMM=m
|
||||
CONFIG_BT_RFCOMM_TTY=y
|
||||
CONFIG_BT_BNEP=m
|
||||
CONFIG_BT_BNEP_MC_FILTER=y
|
||||
CONFIG_BT_BNEP_PROTO_FILTER=y
|
||||
CONFIG_BT_HIDP=m
|
||||
CONFIG_BT_HCIBTUSB=m
|
||||
CONFIG_BT_HCIBTSDIO=m
|
||||
CONFIG_BT_HCIUART=m
|
||||
CONFIG_BT_HCIUART_NOKIA=m
|
||||
CONFIG_BT_HCIUART_BCSP=y
|
||||
CONFIG_BT_HCIUART_LL=y
|
||||
CONFIG_BT_HCIUART_3WIRE=y
|
||||
CONFIG_BT_HCIUART_BCM=y
|
||||
CONFIG_BT_HCIBCM203X=m
|
||||
CONFIG_BT_HCIBPA10X=m
|
||||
CONFIG_BT_HCIBFUSB=m
|
||||
CONFIG_BT_HCIVHCI=m
|
||||
CONFIG_BT_MRVL=m
|
||||
CONFIG_BT_MRVL_SDIO=m
|
||||
CONFIG_AF_RXRPC=m
|
||||
CONFIG_RXKAD=y
|
||||
CONFIG_CFG80211=m
|
||||
CONFIG_MAC80211=m
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_DRA7XX_EP=y
|
||||
CONFIG_PCI_ENDPOINT=y
|
||||
CONFIG_PCI_ENDPOINT_CONFIGFS=y
|
||||
CONFIG_PCI_EPF_TEST=m
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_OMAP_OCP2SCP=y
|
||||
CONFIG_SIMPLE_PM_BUS=y
|
||||
CONFIG_CONNECTOR=m
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_OOPS=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_PHYSMAP_OF=y
|
||||
CONFIG_MTD_ONENAND=y
|
||||
CONFIG_MTD_ONENAND_VERIFY_WRITE=y
|
||||
CONFIG_MTD_ONENAND_OMAP2=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_MTD_NAND_ECC_SW_BCH=y
|
||||
CONFIG_MTD_NAND_OMAP2=y
|
||||
CONFIG_MTD_NAND_OMAP_BCH=y
|
||||
CONFIG_MTD_SPI_NOR=m
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_ZRAM=m
|
||||
CONFIG_ZRAM_WRITEBACK=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_SIZE=16384
|
||||
CONFIG_SENSORS_TSL2550=m
|
||||
CONFIG_SRAM=y
|
||||
CONFIG_PCI_ENDPOINT_TEST=m
|
||||
CONFIG_EEPROM_AT24=m
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_SCSI_SCAN_ASYNC=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_SATA_AHCI_PLATFORM=y
|
||||
CONFIG_AHCI_DM816=m
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
# CONFIG_NET_VENDOR_CIRRUS is not set
|
||||
CONFIG_DM9000=y
|
||||
# CONFIG_NET_VENDOR_FARADAY is not set
|
||||
# CONFIG_NET_VENDOR_HISILICON is not set
|
||||
# CONFIG_NET_VENDOR_INTEL is not set
|
||||
# CONFIG_NET_VENDOR_MARVELL is not set
|
||||
CONFIG_KS8851=y
|
||||
CONFIG_KS8851_MLL=y
|
||||
# CONFIG_NET_VENDOR_MICROCHIP is not set
|
||||
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
# CONFIG_NET_VENDOR_QUALCOMM is not set
|
||||
# CONFIG_NET_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
CONFIG_SMC91X=y
|
||||
CONFIG_SMSC911X=y
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
CONFIG_TI_DAVINCI_EMAC=y
|
||||
CONFIG_TI_CPSW=y
|
||||
CONFIG_TI_CPSW_SWITCHDEV=y
|
||||
CONFIG_TI_CPTS=y
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_DP83848_PHY=y
|
||||
CONFIG_DP83867_PHY=y
|
||||
CONFIG_MICREL_PHY=y
|
||||
CONFIG_AT803X_PHY=y
|
||||
CONFIG_SMSC_PHY=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_FILTER=y
|
||||
CONFIG_PPP_MPPE=m
|
||||
CONFIG_PPP_MULTILINK=y
|
||||
CONFIG_PPPOE=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
CONFIG_PPP_SYNC_TTY=m
|
||||
CONFIG_USB_USBNET=m
|
||||
CONFIG_USB_NET_SMSC75XX=m
|
||||
CONFIG_USB_NET_SMSC95XX=m
|
||||
CONFIG_USB_ALI_M5632=y
|
||||
CONFIG_USB_AN2720=y
|
||||
CONFIG_USB_EPSON2888=y
|
||||
CONFIG_USB_KC2190=y
|
||||
CONFIG_USB_NET_QMI_WWAN=m
|
||||
CONFIG_USB_CDC_PHONET=m
|
||||
CONFIG_LIBERTAS=m
|
||||
CONFIG_LIBERTAS_USB=m
|
||||
CONFIG_LIBERTAS_SDIO=m
|
||||
CONFIG_LIBERTAS_DEBUG=y
|
||||
CONFIG_MWIFIEX=m
|
||||
CONFIG_MWIFIEX_SDIO=m
|
||||
CONFIG_MWIFIEX_USB=m
|
||||
CONFIG_WL12XX=m
|
||||
CONFIG_WL18XX=m
|
||||
CONFIG_WLCORE_SPI=m
|
||||
CONFIG_WLCORE_SDIO=m
|
||||
CONFIG_INPUT_MOUSEDEV=m
|
||||
CONFIG_INPUT_JOYDEV=m
|
||||
CONFIG_INPUT_EVDEV=m
|
||||
CONFIG_KEYBOARD_ATKBD=m
|
||||
CONFIG_KEYBOARD_GPIO=m
|
||||
CONFIG_KEYBOARD_MATRIX=m
|
||||
CONFIG_KEYBOARD_OMAP4=m
|
||||
CONFIG_KEYBOARD_TWL4030=m
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_ADS7846=m
|
||||
CONFIG_TOUCHSCREEN_ATMEL_MXT=m
|
||||
CONFIG_TOUCHSCREEN_EDT_FT5X06=m
|
||||
CONFIG_TOUCHSCREEN_TI_AM335X_TSC=m
|
||||
CONFIG_TOUCHSCREEN_PIXCIR=m
|
||||
CONFIG_TOUCHSCREEN_TSC2004=m
|
||||
CONFIG_TOUCHSCREEN_TSC2005=m
|
||||
CONFIG_TOUCHSCREEN_TSC2007=m
|
||||
CONFIG_INPUT_MISC=y
|
||||
CONFIG_INPUT_CPCAP_PWRBUTTON=m
|
||||
CONFIG_INPUT_TPS65218_PWRBUTTON=m
|
||||
CONFIG_INPUT_TWL4030_PWRBUTTON=m
|
||||
CONFIG_INPUT_UINPUT=m
|
||||
CONFIG_INPUT_PALMAS_PWRBUTTON=m
|
||||
CONFIG_INPUT_PWM_VIBRA=m
|
||||
CONFIG_SERIO=m
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=32
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=6
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_MANY_PORTS=y
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_8250_DETECT_IRQ=y
|
||||
CONFIG_SERIAL_8250_RSA=y
|
||||
CONFIG_SERIAL_8250_OMAP=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SERIAL_OMAP=y
|
||||
CONFIG_SERIAL_OMAP_CONSOLE=y
|
||||
CONFIG_SERIAL_DEV_BUS=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_GPIO=m
|
||||
CONFIG_SPI_OMAP24XX=y
|
||||
CONFIG_SPI_TI_QSPI=m
|
||||
CONFIG_HSI=m
|
||||
CONFIG_OMAP_SSI=m
|
||||
CONFIG_SSI_PROTOCOL=m
|
||||
CONFIG_PTP_1588_CLOCK=y
|
||||
CONFIG_PINCTRL_SINGLE=y
|
||||
CONFIG_DEBUG_GPIO=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_PCA953X=m
|
||||
CONFIG_GPIO_PCF857X=y
|
||||
CONFIG_GPIO_LP87565=y
|
||||
CONFIG_GPIO_PALMAS=y
|
||||
CONFIG_GPIO_TWL4030=y
|
||||
CONFIG_W1=m
|
||||
CONFIG_HDQ_MASTER_OMAP=m
|
||||
CONFIG_W1_SLAVE_DS250X=m
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_GPIO=y
|
||||
CONFIG_BATTERY_BQ27XXX=m
|
||||
CONFIG_CHARGER_ISP1704=m
|
||||
CONFIG_CHARGER_TWL4030=m
|
||||
CONFIG_CHARGER_BQ2415X=m
|
||||
CONFIG_CHARGER_BQ24190=m
|
||||
CONFIG_CHARGER_BQ24735=m
|
||||
CONFIG_HWMON=m
|
||||
CONFIG_SENSORS_GPIO_FAN=m
|
||||
CONFIG_SENSORS_LM75=m
|
||||
CONFIG_SENSORS_TMP102=m
|
||||
CONFIG_THERMAL_GOV_FAIR_SHARE=y
|
||||
CONFIG_THERMAL_GOV_USER_SPACE=y
|
||||
CONFIG_CPU_THERMAL=y
|
||||
CONFIG_TI_THERMAL=y
|
||||
CONFIG_OMAP3_THERMAL=y
|
||||
CONFIG_OMAP4_THERMAL=y
|
||||
CONFIG_OMAP5_THERMAL=y
|
||||
CONFIG_DRA752_THERMAL=y
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_OMAP_WATCHDOG=m
|
||||
CONFIG_TWL4030_WATCHDOG=m
|
||||
CONFIG_MFD_CPCAP=y
|
||||
CONFIG_MFD_TI_AM335X_TSCADC=m
|
||||
CONFIG_MFD_TI_LMU=m
|
||||
CONFIG_MFD_PALMAS=y
|
||||
CONFIG_MFD_TPS65217=y
|
||||
CONFIG_MFD_TI_LP873X=y
|
||||
CONFIG_MFD_TI_LP87565=y
|
||||
CONFIG_MFD_TPS65218=y
|
||||
CONFIG_MFD_TPS65910=y
|
||||
CONFIG_TWL6040_CORE=y
|
||||
CONFIG_REGULATOR_CPCAP=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_LM363X=m
|
||||
CONFIG_REGULATOR_LP872X=y
|
||||
CONFIG_REGULATOR_LP873X=y
|
||||
CONFIG_REGULATOR_LP87565=y
|
||||
CONFIG_REGULATOR_PALMAS=y
|
||||
CONFIG_REGULATOR_PBIAS=y
|
||||
CONFIG_REGULATOR_TI_ABB=y
|
||||
CONFIG_REGULATOR_TPS62360=m
|
||||
CONFIG_REGULATOR_TPS65023=y
|
||||
CONFIG_REGULATOR_TPS6507X=y
|
||||
CONFIG_REGULATOR_TPS65217=y
|
||||
CONFIG_REGULATOR_TPS65218=y
|
||||
CONFIG_REGULATOR_TPS65910=y
|
||||
CONFIG_REGULATOR_TWL4030=y
|
||||
CONFIG_RC_CORE=m
|
||||
CONFIG_LIRC=y
|
||||
CONFIG_RC_DEVICES=y
|
||||
CONFIG_IR_SPI=m
|
||||
CONFIG_IR_RX51=m
|
||||
CONFIG_IR_GPIO_TX=m
|
||||
CONFIG_IR_PWM_TX=m
|
||||
CONFIG_MEDIA_SUPPORT=m
|
||||
CONFIG_MEDIA_CAMERA_SUPPORT=y
|
||||
CONFIG_MEDIA_CEC_SUPPORT=y
|
||||
CONFIG_MEDIA_CONTROLLER=y
|
||||
CONFIG_VIDEO_V4L2_SUBDEV_API=y
|
||||
CONFIG_V4L_PLATFORM_DRIVERS=y
|
||||
CONFIG_VIDEO_OMAP3=m
|
||||
CONFIG_CEC_PLATFORM_DRIVERS=y
|
||||
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
|
||||
CONFIG_VIDEO_TVP5150=m
|
||||
CONFIG_VIDEO_MT9P031=m
|
||||
CONFIG_DRM=m
|
||||
CONFIG_DRM_OMAP=m
|
||||
CONFIG_OMAP5_DSS_HDMI=y
|
||||
CONFIG_OMAP2_DSS_SDI=y
|
||||
CONFIG_OMAP2_DSS_DSI=y
|
||||
CONFIG_DRM_OMAP_PANEL_DSI_CM=m
|
||||
CONFIG_DRM_TILCDC=m
|
||||
CONFIG_DRM_PANEL_SIMPLE=m
|
||||
CONFIG_DRM_PANEL_LG_LB035Q02=m
|
||||
CONFIG_DRM_PANEL_NEC_NL8048HL11=m
|
||||
CONFIG_DRM_PANEL_SHARP_LS037V7DW01=m
|
||||
CONFIG_DRM_PANEL_SONY_ACX565AKM=m
|
||||
CONFIG_DRM_PANEL_TPO_TD028TTEC1=m
|
||||
CONFIG_DRM_PANEL_TPO_TD043MTEA1=m
|
||||
CONFIG_DRM_DISPLAY_CONNECTOR=m
|
||||
CONFIG_DRM_SIMPLE_BRIDGE=m
|
||||
CONFIG_DRM_TI_TFP410=m
|
||||
CONFIG_DRM_TI_TPD12S015=m
|
||||
CONFIG_FB=y
|
||||
CONFIG_FIRMWARE_EDID=y
|
||||
CONFIG_FB_MODE_HELPERS=y
|
||||
CONFIG_FB_TILEBLITTING=y
|
||||
CONFIG_LCD_CLASS_DEVICE=y
|
||||
CONFIG_LCD_PLATFORM=y
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
CONFIG_BACKLIGHT_GENERIC=m
|
||||
CONFIG_BACKLIGHT_PWM=m
|
||||
CONFIG_BACKLIGHT_PANDORA=m
|
||||
CONFIG_BACKLIGHT_GPIO=m
|
||||
CONFIG_BACKLIGHT_LED=m
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_SOUND=m
|
||||
CONFIG_SND=m
|
||||
CONFIG_SND_OSSEMUL=y
|
||||
CONFIG_SND_MIXER_OSS=m
|
||||
CONFIG_SND_PCM_OSS=m
|
||||
CONFIG_SND_VERBOSE_PRINTK=y
|
||||
CONFIG_SND_DEBUG=y
|
||||
CONFIG_SND_USB_AUDIO=m
|
||||
CONFIG_SND_SOC=m
|
||||
CONFIG_SND_SOC_DAVINCI_MCASP=m
|
||||
CONFIG_SND_SOC_NOKIA_RX51=m
|
||||
CONFIG_SND_SOC_OMAP3_PANDORA=m
|
||||
CONFIG_SND_SOC_OMAP3_TWL4030=m
|
||||
CONFIG_SND_SOC_OMAP_ABE_TWL6040=m
|
||||
CONFIG_SND_SOC_OMAP_HDMI=m
|
||||
CONFIG_SND_SOC_CPCAP=m
|
||||
CONFIG_SND_SOC_TLV320AIC23_I2C=m
|
||||
CONFIG_SND_SIMPLE_CARD=m
|
||||
CONFIG_SND_AUDIO_GRAPH_CARD=m
|
||||
CONFIG_HID_GENERIC=m
|
||||
CONFIG_USB_HIDDEV=y
|
||||
CONFIG_USB_KBD=m
|
||||
CONFIG_USB_MOUSE=m
|
||||
CONFIG_USB=m
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
CONFIG_USB_MON=m
|
||||
CONFIG_USB_XHCI_HCD=m
|
||||
CONFIG_USB_EHCI_HCD=m
|
||||
CONFIG_USB_OHCI_HCD=m
|
||||
CONFIG_USB_ACM=m
|
||||
CONFIG_USB_STORAGE=m
|
||||
CONFIG_USB_MUSB_HDRC=m
|
||||
CONFIG_USB_MUSB_TUSB6010=m
|
||||
CONFIG_USB_MUSB_OMAP2PLUS=m
|
||||
CONFIG_USB_MUSB_AM35X=m
|
||||
CONFIG_USB_MUSB_DSPS=m
|
||||
CONFIG_USB_INVENTRA_DMA=y
|
||||
CONFIG_USB_TI_CPPI41_DMA=y
|
||||
CONFIG_USB_TUSB_OMAP_DMA=y
|
||||
CONFIG_USB_DWC3=m
|
||||
CONFIG_USB_SERIAL=m
|
||||
CONFIG_USB_SERIAL_GENERIC=y
|
||||
CONFIG_USB_SERIAL_SIMPLE=m
|
||||
CONFIG_USB_SERIAL_FTDI_SIO=m
|
||||
CONFIG_USB_SERIAL_PL2303=m
|
||||
CONFIG_USB_SERIAL_OPTION=m
|
||||
CONFIG_USB_TEST=m
|
||||
CONFIG_NOP_USB_XCEIV=m
|
||||
CONFIG_AM335X_PHY_USB=m
|
||||
CONFIG_TWL6030_USB=m
|
||||
CONFIG_USB_GADGET=m
|
||||
CONFIG_USB_GADGET_DEBUG=y
|
||||
CONFIG_USB_GADGET_DEBUG_FILES=y
|
||||
CONFIG_USB_GADGET_DEBUG_FS=y
|
||||
CONFIG_USB_CONFIGFS=m
|
||||
CONFIG_USB_CONFIGFS_SERIAL=y
|
||||
CONFIG_USB_CONFIGFS_ACM=y
|
||||
CONFIG_USB_CONFIGFS_OBEX=y
|
||||
CONFIG_USB_CONFIGFS_NCM=y
|
||||
CONFIG_USB_CONFIGFS_ECM=y
|
||||
CONFIG_USB_CONFIGFS_ECM_SUBSET=y
|
||||
CONFIG_USB_CONFIGFS_RNDIS=y
|
||||
CONFIG_USB_CONFIGFS_EEM=y
|
||||
CONFIG_USB_CONFIGFS_PHONET=y
|
||||
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
|
||||
CONFIG_USB_CONFIGFS_F_LB_SS=y
|
||||
CONFIG_USB_CONFIGFS_F_FS=y
|
||||
CONFIG_USB_CONFIGFS_F_UAC1=y
|
||||
CONFIG_USB_CONFIGFS_F_UAC2=y
|
||||
CONFIG_USB_CONFIGFS_F_MIDI=y
|
||||
CONFIG_USB_CONFIGFS_F_HID=y
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_G_NOKIA=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_SDIO_UART=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MMC_OMAP=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_MMC_SDHCI_OMAP=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=m
|
||||
CONFIG_LEDS_CPCAP=m
|
||||
CONFIG_LEDS_LM3532=m
|
||||
CONFIG_LEDS_GPIO=m
|
||||
CONFIG_LEDS_PCA963X=m
|
||||
CONFIG_LEDS_PWM=m
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=m
|
||||
CONFIG_LEDS_TRIGGER_ONESHOT=m
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=m
|
||||
CONFIG_LEDS_TRIGGER_BACKLIGHT=m
|
||||
CONFIG_LEDS_TRIGGER_CPU=y
|
||||
CONFIG_LEDS_TRIGGER_GPIO=m
|
||||
CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_DS1307=m
|
||||
CONFIG_RTC_DRV_M41T80=m
|
||||
CONFIG_RTC_DRV_TWL92330=y
|
||||
CONFIG_RTC_DRV_TWL4030=m
|
||||
CONFIG_RTC_DRV_PALMAS=m
|
||||
CONFIG_RTC_DRV_OMAP=m
|
||||
CONFIG_RTC_DRV_CPCAP=m
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_CLK_TWL6040=m
|
||||
CONFIG_COMMON_CLK_PALMAS=m
|
||||
CONFIG_OMAP_IOMMU=y
|
||||
CONFIG_REMOTEPROC=y
|
||||
CONFIG_OMAP_REMOTEPROC=m
|
||||
CONFIG_WKUP_M3_RPROC=m
|
||||
CONFIG_SOC_TI=y
|
||||
CONFIG_AMX3_PM=m
|
||||
CONFIG_WKUP_M3_IPC=m
|
||||
CONFIG_EXTCON_PALMAS=m
|
||||
CONFIG_EXTCON_USB_GPIO=m
|
||||
CONFIG_TI_EMIF=m
|
||||
CONFIG_TI_EMIF_SRAM=m
|
||||
CONFIG_IIO=m
|
||||
CONFIG_IIO_SW_DEVICE=m
|
||||
CONFIG_IIO_SW_TRIGGER=m
|
||||
CONFIG_IIO_ST_ACCEL_3AXIS=m
|
||||
CONFIG_CPCAP_ADC=m
|
||||
CONFIG_INA2XX_ADC=m
|
||||
CONFIG_TI_AM335X_ADC=m
|
||||
CONFIG_TWL4030_MADC=m
|
||||
CONFIG_SENSORS_ISL29028=m
|
||||
CONFIG_BMP280=m
|
||||
CONFIG_KXCJK1013=m
|
||||
CONFIG_AK8975=m
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_OMAP_DMTIMER=m
|
||||
CONFIG_PWM_TIECAP=m
|
||||
CONFIG_PWM_TIEHRPWM=m
|
||||
CONFIG_PWM_TWL=m
|
||||
CONFIG_PWM_TWL_LED=m
|
||||
CONFIG_PHY_CPCAP_USB=m
|
||||
CONFIG_PHY_MAPPHONE_MDM6600=m
|
||||
CONFIG_PHY_DM816X_USB=m
|
||||
CONFIG_OMAP_USB2=m
|
||||
CONFIG_TI_PIPE3=y
|
||||
CONFIG_TWL4030_USB=m
|
||||
CONFIG_COUNTER=m
|
||||
CONFIG_TI_EQEP=m
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT4_FS_SECURITY=y
|
||||
CONFIG_FANOTIFY=y
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_QFMT_V2=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_JFFS2_SUMMARY=y
|
||||
CONFIG_JFFS2_FS_XATTR=y
|
||||
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
|
||||
CONFIG_JFFS2_LZO=y
|
||||
CONFIG_JFFS2_RUBIN=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_CRAMFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NFS_V4=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_SECURITY=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=y
|
||||
CONFIG_CRYPTO_DEV_OMAP=m
|
||||
CONFIG_CRYPTO_DEV_OMAP_SHAM=m
|
||||
CONFIG_CRYPTO_DEV_OMAP_AES=m
|
||||
CONFIG_CRYPTO_DEV_OMAP_DES=m
|
||||
CONFIG_CRC_CCITT=y
|
||||
CONFIG_CRC_T10DIF=y
|
||||
CONFIG_CRC_ITU_T=y
|
||||
CONFIG_CRC7=y
|
||||
CONFIG_LIBCRC32C=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_FONTS=y
|
||||
CONFIG_FONT_8x8=y
|
||||
CONFIG_FONT_8x16=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_INFO_SPLIT=y
|
||||
CONFIG_DEBUG_INFO_DWARF4=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_SCHEDSTATS=y
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,12 @@
|
||||
# Copyright (C) 2023 Vincent BENOIT <vincent.benoit@scle.fr>
|
||||
# Release under the MIT license (see COPYING.MIT for the terms)
|
||||
FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
|
||||
|
||||
#SRC_URI += " \
|
||||
# file://am335x-pengwyn.dts \
|
||||
# file://0001-dts-makefile.patch \
|
||||
# "
|
||||
#
|
||||
#do_configure:append() {
|
||||
# cp ${WORKDIR}/am335x-pengwyn.dts ${S}/arch/arm/boot/dts/
|
||||
#}
|
||||
Reference in New Issue
Block a user