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arm-bsp/u-boot: introducing corstone1000 FVP machine

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Add support for corstone1000-fvp machine which have a cortex-a35
aarch64, this will boot till u-boot prompt.

Remove kernel devicetree configuration and add the devicetree here and
enable it in the diphda defconfig.

Adds the build options required to support an RTC emulator which in
turn is required to support the UEFI functions GetTime()
and SetTime().

Change-Id: I0d66ece1193494bd2f59a9800d802dff1c4a0db6
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
Signed-off-by: Rui Miguel Silva <rui.silva@arm.com>
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Signed-off-by: Jon Mason <jon.mason@arm.com>
This commit is contained in:
Rui Miguel Silva
2021-10-29 12:27:43 +01:00
committed by Jon Mason
parent f4c7e11d78
commit 2afa936eea
11 changed files with 5156 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
meta-arm-bsp/conf/machine/include/corstone1000.inc
+12
View File
@@ -7,6 +7,18 @@ PREFERRED_VERSION_trusted-firmware-m ?= "1.4%"
TFM_PLATFORM = "arm/corstone1000"
EXTRA_IMAGEDEPENDS += "virtual/trusted-firmware-m"
# u-boot
PREFERRED_VERSION_u-boot ?= "2021.07"
EXTRA_IMAGEDEPENDS += "u-boot"
UBOOT_CONFIG ??= "EFI"
UBOOT_CONFIG[EFI] = "corstone1000_defconfig"
UBOOT_ENTRYPOINT = "0x80000000"
UBOOT_LOADADDRESS = "0x80000000"
UBOOT_BOOTARGS = "earlycon=pl011,0x1a510000 console=ttyAMA0 loglevel=9"
UBOOT_ARCH = "arm"
UBOOT_EXTLINUX = "0"
# Linux kernel
PREFERRED_PROVIDER_virtual/kernel:forcevariable = "linux-yocto"
PREFERRED_VERSION_linux-yocto = "5.10%"
meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0001-arm-add-corstone1000-platform.patch
+330
View File
@@ -0,0 +1,330 @@
Upstream-Status: Pending [Not submitted to upstream yet]
Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
From 3feb071c77bb6297165c7b671b5c92d6ba306238 Mon Sep 17 00:00:00 2001
From: Rui Miguel Silva <rui.silva@linaro.org>
Date: Fri, 4 Jun 2021 10:58:24 +0100
Subject: [PATCH 01/16] arm: add corstone1000 platform
Add support for new corstone1000 platform.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Rui Miguel Silva <rui.silva@arm.com>
---
arch/arm/Kconfig | 9 ++++
board/armltd/corstone1000/Kconfig | 12 +++++
board/armltd/corstone1000/MAINTAINERS | 6 +++
board/armltd/corstone1000/Makefile | 7 +++
board/armltd/corstone1000/corstone1000.c | 92 +++++++++++++++++++++++++++++++++
configs/corstone1000_defconfig | 39 ++++++++++++++
include/configs/corstone1000.h | 80 ++++++++++++++++++++++++++++
7 files changed, 245 insertions(+)
create mode 100644 board/armltd/corstone1000/Kconfig
create mode 100644 board/armltd/corstone1000/MAINTAINERS
create mode 100644 board/armltd/corstone1000/Makefile
create mode 100644 board/armltd/corstone1000/corstone1000.c
create mode 100644 configs/corstone1000_defconfig
create mode 100644 include/configs/corstone1000.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0448787b8b..25d2a707be 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1173,6 +1173,13 @@ config TARGET_VEXPRESS64_JUNO
select USB
select DM_USB
+config TARGET_CORSTONE1000
+ bool "Support Corstone1000 Platform"
+ select ARM64
+ select PL01X_SERIAL
+ select DM
+ select OF_BOARD
+
config TARGET_TOTAL_COMPUTE
bool "Support Total Compute Platform"
select ARM64
@@ -1985,6 +1992,8 @@ source "arch/arm/mach-nexell/Kconfig"
source "board/armltd/total_compute/Kconfig"
+source "board/armltd/corstone1000/Kconfig"
+
source "board/bosch/shc/Kconfig"
source "board/bosch/guardian/Kconfig"
source "board/CarMediaLab/flea3/Kconfig"
diff --git a/board/armltd/corstone1000/Kconfig b/board/armltd/corstone1000/Kconfig
new file mode 100644
index 000000000000..90e6b7af59cb
--- /dev/null
+++ b/board/armltd/corstone1000/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_CORSTONE1000
+
+config SYS_BOARD
+ default "corstone1000"
+
+config SYS_VENDOR
+ default "armltd"
+
+config SYS_CONFIG_NAME
+ default "corstone1000"
+
+endif
diff --git a/board/armltd/corstone1000/MAINTAINERS b/board/armltd/corstone1000/MAINTAINERS
new file mode 100644
index 000000000000..601cff17b666
--- /dev/null
+++ b/board/armltd/corstone1000/MAINTAINERS
@@ -0,0 +1,6 @@
+CORSTONE1000 BOARD
+M: Rui Miguel Silva <rui.silva@linaro.org>
+S: Maintained
+F: board/armltd/corstone1000/
+F: include/configs/corstone1000.h
+F: configs/corstone1000_defconfig
diff --git a/board/armltd/corstone1000/Makefile b/board/armltd/corstone1000/Makefile
new file mode 100644
index 000000000000..7bad6f57f1ce
--- /dev/null
+++ b/board/armltd/corstone1000/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2021 Arm Limited
+# (C) Copyright 2021 Linaro
+# Rui Miguel Silva <rui.silva@linaro.org>
+
+obj-y := corstone1000.o
diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c
new file mode 100644
index 000000000000..fe986ceba1c5
--- /dev/null
+++ b/board/armltd/corstone1000/corstone1000.c
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021 ARM Limited
+ * (C) Copyright 2021 Linaro
+ * Rui Miguel Silva <rui.silva@linaro.org>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/platform_data/serial_pl01x.h>
+#include <asm/armv8/mmu.h>
+#include <asm/global_data.h>
+
+
+static const struct pl01x_serial_plat serial_plat = {
+ .base = V2M_UART0,
+ .type = TYPE_PL011,
+ .clock = CONFIG_PL011_CLOCK,
+};
+
+U_BOOT_DRVINFO(corstone1000_serials) = {
+ .name = "serial_pl01x",
+ .plat = &serial_plat,
+};
+
+static struct mm_region corstone1000_mem_map[] = {
+ {
+ /* CVM */
+ .virt = 0x02000000UL,
+ .phys = 0x02000000UL,
+ .size = 0x02000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ /* QSPI */
+ .virt = 0x08000000UL,
+ .phys = 0x08000000UL,
+ .size = 0x08000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ /* Host Peripherals */
+ .virt = 0x1A000000UL,
+ .phys = 0x1A000000UL,
+ .size = 0x26000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* OCVM */
+ .virt = 0x80000000UL,
+ .phys = 0x80000000UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = corstone1000_mem_map;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = PHYS_SDRAM_1_SIZE;
+
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+#ifdef PHYS_SDRAM_2
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+#endif
+
+
+ return 0;
+}
+
+void reset_cpu(ulong addr)
+{
+}
diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
new file mode 100644
index 000000000000..47d4bf3771e0
--- /dev/null
+++ b/configs/corstone1000_defconfig
@@ -0,0 +1,39 @@
+CONFIG_ARM=y
+CONFIG_ARM64=y
+CONFIG_TARGET_CORSTONE1000=y
+CONFIG_SYS_TEXT_BASE=0x02100000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_IDENT_STRING=" corstone1000 aarch64 "
+CONFIG_BOOTDELAY=3
+CONFIG_OF_BOARD=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0 loglevel=9"
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="corstone1000# "
+# CONFIG_CMD_CONSOLE is not set
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_BOOTM=y
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_ARMFLASH=y
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_FIT=y
+# CONFIG_CMD_MISC is not set
+CONFIG_CMD_FAT=y
+CONFIG_DM=y
+# CONFIG_MMC is not set
+# CONFIG_MTD_NOR_FLASH=y
+CONFIG_DM_ETH=y
+CONFIG_DM_SERIAL=y
+CONFIG_OF_LIBFDT=y
diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
new file mode 100644
index 000000000000..c8e630c5d857
--- /dev/null
+++ b/include/configs/corstone1000.h
@@ -0,0 +1,80 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2020 ARM Limited
+ * (C) Copyright 2020 Linaro
+ * Rui Miguel Silva <rui.silva@linaro.org>
+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ *
+ * Configuration for Corstone1000. Parts were derived from other ARM
+ * configurations.
+ */
+
+#ifndef __CORSTONE1000_H
+#define __CORSTONE1000_H
+
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define CONFIG_SYS_HZ 1000
+
+#define V2M_SRAM0 0x02000000
+#define V2M_QSPI 0x08000000
+
+#define V2M_DEBUG 0x10000000
+#define V2M_BASE_PERIPH 0x1A000000
+
+#define V2M_BASE 0x80000000
+
+#define V2M_PERIPH_OFFSET(x) (x << 16)
+
+#define V2M_SYSID (V2M_BASE_PERIPH)
+#define V2M_SYSCTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(1))
+
+#define V2M_COUNTER_CTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(32))
+#define V2M_COUNTER_READ (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(33))
+
+#define V2M_TIMER_CTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(34))
+#define V2M_TIMER_BASE0 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(35))
+
+#define V2M_UART0 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(81))
+#define V2M_UART1 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(82))
+
+#define CONFIG_PL011_CLOCK 50000000
+
+/* Physical Memory Map */
+#define PHYS_SDRAM_1 (V2M_BASE)
+#define PHYS_SDRAM_2 (V2M_QSPI)
+
+/* Top 16MB reserved for secure world use (maybe not needed) */
+#define DRAM_SEC_SIZE 0x01000000
+#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
+
+#define PHYS_SDRAM_2_SIZE 0x02000000
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
+#define CONFIG_SYS_MAXARGS 64 /* max command args */
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "fdt_addr=0x08330000\0" \
+ "fdt_addr_r=0x82000000\0" \
+ "kernel_addr=0x08430000\0" \
+ "kernel_addr_r=0x82100000\0" \
+ "fdt_high=0xffffffff\0"
+
+#define CONFIG_BOOTCOMMAND \
+ "echo Copying devicetree to memory ... ;" \
+ "cp.b $fdt_addr $fdt_addr_r 0x100000;" \
+ "echo Copying Kernel to memory ... ;" \
+ "cp.b $kernel_addr $kernel_addr_r 0xa00000;" \
+ "bootm $kernel_addr_r - $fdt_addr_r; "
+
+#endif
--
2.33.0
meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0002-arm-corstone1000-enable-devicetree-in-defconfig.patch
+59
View File
@@ -0,0 +1,59 @@
Upstream-Status: Pending [Not submitted to upstream yet]
Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
From 1a034bd9397f96939d58a86e9cf8cd9c206db647 Mon Sep 17 00:00:00 2001
From: Rui Miguel Silva <rui.silva@linaro.org>
Date: Tue, 22 Jun 2021 17:00:24 +0100
Subject: [PATCH 02/16] arm: corstone1000: enable devicetree in defconfig
Add support and setup the default device tree for corstone1000.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Rui Miguel Silva <rui.silva@arm.com>
---
configs/corstone1000_defconfig | 3 ++-
include/configs/corstone1000.h | 10 +++-------
2 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
index bc983e6555..54c746d829 100644
--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
@@ -6,7 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_IDENT_STRING=" corstone1000 aarch64 "
CONFIG_BOOTDELAY=3
-CONFIG_OF_BOARD=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="corstone1000-mps3"
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0 loglevel=9"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
index 1fe909463f..389ac45a58 100644
--- a/include/configs/corstone1000.h
+++ b/include/configs/corstone1000.h
@@ -64,17 +64,13 @@
#define CONFIG_SYS_MAXARGS 64 /* max command args */
#define CONFIG_EXTRA_ENV_SETTINGS \
- "fdt_addr=0x08330000\0" \
"fdt_addr_r=0x82000000\0" \
- "kernel_addr=0x08430000\0" \
+ "kernel_addr=0x08330000\0" \
"kernel_addr_r=0x82100000\0" \
"fdt_high=0xffffffff\0"
#define CONFIG_BOOTCOMMAND \
- "echo Copying devicetree to memory ... ;" \
- "cp.b $fdt_addr $fdt_addr_r 0x100000;" \
"echo Copying Kernel to memory ... ;" \
- "cp.b $kernel_addr $kernel_addr_r 0xa00000;" \
- "bootm $kernel_addr_r - $fdt_addr_r; "
-
+ "cp.b $kernel_addr $kernel_addr_r 0xc00000;" \
+ "booti $kernel_addr_r - $fdtcontroladdr; "
#endif
--
2.33.0
meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0003-usb-common-move-urb-code-to-common.patch
+508
View File
@@ -0,0 +1,508 @@
Upstream-Status: Pending [Not submitted to upstream yet]
Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
From 84b3b8f2443d0b4f6ac8ef95c941b27d734afbde Mon Sep 17 00:00:00 2001
From: Rui Miguel Silva <rui.silva@linaro.org>
Date: Mon, 28 Jun 2021 23:20:55 +0100
Subject: [PATCH 03/16] usb: common: move urb code to common
Move urb code from musb only use to a more common scope, so other
drivers in the future can use the handling of urb in usb.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
drivers/usb/common/Makefile | 2 +
drivers/usb/common/usb_urb.c | 160 ++++++++++++++++++
drivers/usb/host/r8a66597-hcd.c | 30 +---
drivers/usb/musb-new/musb_core.c | 2 +-
drivers/usb/musb-new/musb_host.c | 2 +-
drivers/usb/musb-new/musb_host.h | 2 +-
drivers/usb/musb-new/musb_uboot.c | 38 +----
drivers/usb/musb-new/musb_uboot.h | 2 +-
.../linux/usb/usb_urb_compat.h | 52 ++++--
include/usb_defs.h | 32 ++++
10 files changed, 240 insertions(+), 82 deletions(-)
create mode 100644 drivers/usb/common/usb_urb.c
rename drivers/usb/musb-new/usb-compat.h => include/linux/usb/usb_urb_compat.h (57%)
diff --git a/drivers/usb/common/Makefile b/drivers/usb/common/Makefile
index 3bedbf213f..dc05cb0a50 100644
--- a/drivers/usb/common/Makefile
+++ b/drivers/usb/common/Makefile
@@ -4,5 +4,7 @@
#
obj-$(CONFIG_$(SPL_)DM_USB) += common.o
+obj-$(CONFIG_USB_MUSB_HCD) += usb_urb.o
+obj-$(CONFIG_USB_MUSB_UDC) += usb_urb.o
obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o fsl-errata.o
obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o fsl-errata.o
diff --git a/drivers/usb/common/usb_urb.c b/drivers/usb/common/usb_urb.c
new file mode 100644
index 0000000000..be3b6b9f32
--- /dev/null
+++ b/drivers/usb/common/usb_urb.c
@@ -0,0 +1,160 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Common code for usb urb handling, based on the musb-new code
+ *
+ * Copyright 2021 Linaro, Rui Miguel Silva <rui.silva@linaro.org>
+ *
+ */
+
+#include <dm/device.h>
+#include <dm/device_compat.h>
+#include <linux/usb/usb_urb_compat.h>
+
+#include <time.h>
+#include <usb.h>
+
+#if CONFIG_IS_ENABLED(DM_USB)
+struct usb_device *usb_dev_get_parent(struct usb_device *udev)
+{
+ struct udevice *parent = udev->dev->parent;
+
+ /*
+ * When called from usb-uclass.c: usb_scan_device() udev->dev points
+ * to the parent udevice, not the actual udevice belonging to the
+ * udev as the device is not instantiated yet.
+ *
+ * If dev is an usb-bus, then we are called from usb_scan_device() for
+ * an usb-device plugged directly into the root port, return NULL.
+ */
+ if (device_get_uclass_id(udev->dev) == UCLASS_USB)
+ return NULL;
+
+ /*
+ * If these 2 are not the same we are being called from
+ * usb_scan_device() and udev itself is the parent.
+ */
+ if (dev_get_parent_priv(udev->dev) != udev)
+ return udev;
+
+ /* We are being called normally, use the parent pointer */
+ if (device_get_uclass_id(parent) == UCLASS_USB_HUB)
+ return dev_get_parent_priv(parent);
+
+ return NULL;
+}
+#else
+struct usb_device *usb_dev_get_parent(struct usb_device *udev)
+{
+ return udev->parent;
+}
+#endif
+
+static void usb_urb_complete(struct urb *urb)
+{
+ urb->dev->status &= ~USB_ST_NOT_PROC;
+ urb->dev->act_len = urb->actual_length;
+
+ if (urb->status == -EINPROGRESS)
+ urb->status = 0;
+}
+
+void usb_urb_fill(struct urb *urb, struct usb_host_endpoint *hep,
+ struct usb_device *dev, int endpoint_type,
+ unsigned long pipe, void *buffer, int len,
+ struct devrequest *setup, int interval)
+{
+ int epnum = usb_pipeendpoint(pipe);
+ int is_in = usb_pipein(pipe);
+ u16 maxpacketsize = is_in ? dev->epmaxpacketin[epnum] :
+ dev->epmaxpacketout[epnum];
+
+ memset(urb, 0, sizeof(struct urb));
+ memset(hep, 0, sizeof(struct usb_host_endpoint));
+ INIT_LIST_HEAD(&hep->urb_list);
+ INIT_LIST_HEAD(&urb->urb_list);
+ urb->ep = hep;
+ urb->complete = usb_urb_complete;
+ urb->status = -EINPROGRESS;
+ urb->dev = dev;
+ urb->pipe = pipe;
+ urb->transfer_buffer = buffer;
+ urb->transfer_dma = (unsigned long)buffer;
+ urb->transfer_buffer_length = len;
+ urb->setup_packet = (unsigned char *)setup;
+
+ urb->ep->desc.wMaxPacketSize = __cpu_to_le16(maxpacketsize);
+ urb->ep->desc.bmAttributes = endpoint_type;
+ urb->ep->desc.bEndpointAddress = ((is_in ? USB_DIR_IN : USB_DIR_OUT) |
+ epnum);
+ urb->ep->desc.bInterval = interval;
+}
+
+int usb_urb_submit(struct usb_hcd *hcd, struct urb *urb)
+{
+ const struct usb_urb_ops *ops = hcd->urb_ops;
+ unsigned long timeout;
+ int ret;
+
+ if (!ops)
+ return -EINVAL;
+
+ ret = ops->urb_enqueue(hcd, urb, 0);
+ if (ret < 0) {
+ printf("Failed to enqueue URB to controller\n");
+ return ret;
+ }
+
+ timeout = get_timer(0) + USB_TIMEOUT_MS(urb->pipe);
+ do {
+ if (ctrlc())
+ return -EIO;
+ ops->isr(0, hcd);
+ } while (urb->status == -EINPROGRESS && get_timer(0) < timeout);
+
+ if (urb->status == -EINPROGRESS)
+ ops->urb_dequeue(hcd, urb, -ETIME);
+
+ return urb->status;
+}
+
+int usb_urb_submit_control(struct usb_hcd *hcd, struct urb *urb,
+ struct usb_host_endpoint *hep,
+ struct usb_device *dev, unsigned long pipe,
+ void *buffer, int len, struct devrequest *setup,
+ int interval, enum usb_device_speed speed)
+{
+ const struct usb_urb_ops *ops = hcd->urb_ops;
+
+ usb_urb_fill(urb, hep, dev, USB_ENDPOINT_XFER_CONTROL, pipe, buffer,
+ len, setup, 0);
+
+ /* Fix speed for non hub-attached devices */
+ if (!usb_dev_get_parent(dev)) {
+ dev->speed = speed;
+ if (ops->hub_control)
+ return ops->hub_control(hcd, dev, pipe, buffer, len,
+ setup);
+ }
+
+ return usb_urb_submit(hcd, urb);
+}
+
+int usb_urb_submit_bulk(struct usb_hcd *hcd, struct urb *urb,
+ struct usb_host_endpoint *hep, struct usb_device *dev,
+ unsigned long pipe, void *buffer, int len)
+{
+ usb_urb_fill(urb, hep, dev, USB_ENDPOINT_XFER_BULK, pipe, buffer, len,
+ NULL, 0);
+
+ return usb_urb_submit(hcd, urb);
+}
+
+int usb_urb_submit_irq(struct usb_hcd *hcd, struct urb *urb,
+ struct usb_host_endpoint *hep, struct usb_device *dev,
+ unsigned long pipe, void *buffer, int len, int interval)
+{
+ usb_urb_fill(urb, hep, dev, USB_ENDPOINT_XFER_INT, pipe, buffer, len,
+ NULL, interval);
+
+ return usb_urb_submit(hcd, urb);
+}
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index f1fc93f3d4..3ccbc16da3 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -14,6 +14,7 @@
#include <dm/device_compat.h>
#include <linux/delay.h>
#include <linux/iopoll.h>
+#include <linux/usb/usb_urb_compat.h>
#include <power/regulator.h>
#include "r8a66597.h"
@@ -24,35 +25,6 @@
#define R8A66597_DPRINT(...)
#endif
-static inline struct usb_device *usb_dev_get_parent(struct usb_device *udev)
-{
- struct udevice *parent = udev->dev->parent;
-
- /*
- * When called from usb-uclass.c: usb_scan_device() udev->dev points
- * to the parent udevice, not the actual udevice belonging to the
- * udev as the device is not instantiated yet.
- *
- * If dev is an usb-bus, then we are called from usb_scan_device() for
- * an usb-device plugged directly into the root port, return NULL.
- */
- if (device_get_uclass_id(udev->dev) == UCLASS_USB)
- return NULL;
-
- /*
- * If these 2 are not the same we are being called from
- * usb_scan_device() and udev itself is the parent.
- */
- if (dev_get_parent_priv(udev->dev) != udev)
- return udev;
-
- /* We are being called normally, use the parent pointer */
- if (device_get_uclass_id(parent) == UCLASS_USB_HUB)
- return dev_get_parent_priv(parent);
-
- return NULL;
-}
-
static void get_hub_data(struct usb_device *dev, u16 *hub_devnum, u16 *hubport)
{
struct usb_device *parent = usb_dev_get_parent(dev);
diff --git a/drivers/usb/musb-new/musb_core.c b/drivers/usb/musb-new/musb_core.c
index 22811a5efb..d1d4ee2da3 100644
--- a/drivers/usb/musb-new/musb_core.c
+++ b/drivers/usb/musb-new/musb_core.c
@@ -89,9 +89,9 @@
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/musb.h>
+#include <linux/usb/usb_urb_compat.h>
#include <asm/io.h>
#include "linux-compat.h"
-#include "usb-compat.h"
#endif
#include "musb_core.h"
diff --git a/drivers/usb/musb-new/musb_host.c b/drivers/usb/musb-new/musb_host.c
index acb2d40f3b..e5905d90d6 100644
--- a/drivers/usb/musb-new/musb_host.c
+++ b/drivers/usb/musb-new/musb_host.c
@@ -26,8 +26,8 @@
#include <dm/device_compat.h>
#include <usb.h>
#include <linux/bug.h>
+#include <linux/usb/usb_urb_compat.h>
#include "linux-compat.h"
-#include "usb-compat.h"
#endif
#include "musb_core.h"
diff --git a/drivers/usb/musb-new/musb_host.h b/drivers/usb/musb-new/musb_host.h
index afc8fa35a7..5a604bdb0c 100644
--- a/drivers/usb/musb-new/musb_host.h
+++ b/drivers/usb/musb-new/musb_host.h
@@ -10,7 +10,7 @@
#ifndef _MUSB_HOST_H
#define _MUSB_HOST_H
#ifdef __UBOOT__
-#include "usb-compat.h"
+#include <linux/usb/usb_urb_compat.h>
#endif
static inline struct usb_hcd *musb_to_hcd(struct musb *musb)
diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c
index 8ac2f0a78a..85794356b0 100644
--- a/drivers/usb/musb-new/musb_uboot.c
+++ b/drivers/usb/musb-new/musb_uboot.c
@@ -8,10 +8,10 @@
#include <linux/errno.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
+#include <linux/usb/usb_urb_compat.h>
#include <usb.h>
#include "linux-compat.h"
-#include "usb-compat.h"
#include "musb_core.h"
#include "musb_host.h"
#include "musb_gadget.h"
@@ -453,39 +453,3 @@ struct musb *musb_register(struct musb_hdrc_platform_data *plat, void *bdata,
return *musbp;
}
-
-#if CONFIG_IS_ENABLED(DM_USB)
-struct usb_device *usb_dev_get_parent(struct usb_device *udev)
-{
- struct udevice *parent = udev->dev->parent;
-
- /*
- * When called from usb-uclass.c: usb_scan_device() udev->dev points
- * to the parent udevice, not the actual udevice belonging to the
- * udev as the device is not instantiated yet.
- *
- * If dev is an usb-bus, then we are called from usb_scan_device() for
- * an usb-device plugged directly into the root port, return NULL.
- */
- if (device_get_uclass_id(udev->dev) == UCLASS_USB)
- return NULL;
-
- /*
- * If these 2 are not the same we are being called from
- * usb_scan_device() and udev itself is the parent.
- */
- if (dev_get_parent_priv(udev->dev) != udev)
- return udev;
-
- /* We are being called normally, use the parent pointer */
- if (device_get_uclass_id(parent) == UCLASS_USB_HUB)
- return dev_get_parent_priv(parent);
-
- return NULL;
-}
-#else
-struct usb_device *usb_dev_get_parent(struct usb_device *udev)
-{
- return udev->parent;
-}
-#endif
diff --git a/drivers/usb/musb-new/musb_uboot.h b/drivers/usb/musb-new/musb_uboot.h
index 18282efccc..6b162f03b1 100644
--- a/drivers/usb/musb-new/musb_uboot.h
+++ b/drivers/usb/musb-new/musb_uboot.h
@@ -8,8 +8,8 @@
#define __MUSB_UBOOT_H__
#include <usb.h>
+#include <linux/usb/usb_urb_compat.h>
#include "linux-compat.h"
-#include "usb-compat.h"
#include "musb_core.h"
struct musb_host_data {
diff --git a/drivers/usb/musb-new/usb-compat.h b/include/linux/usb/usb_urb_compat.h
similarity index 57%
rename from drivers/usb/musb-new/usb-compat.h
rename to include/linux/usb/usb_urb_compat.h
index 1c66c4fe36..438e70b56a 100644
--- a/drivers/usb/musb-new/usb-compat.h
+++ b/include/linux/usb/usb_urb_compat.h
@@ -1,16 +1,31 @@
-#ifndef __USB_COMPAT_H__
-#define __USB_COMPAT_H__
+#ifndef __USB_URB_COMPAT_H__
+#define __USB_URB_COMPAT_H__
-#include "usb.h"
+#include <linux/compat.h>
+#include <usb.h>
struct udevice;
+struct urb;
+struct usb_hcd;
+
+
+struct usb_urb_ops {
+ int (*urb_enqueue)(struct usb_hcd *hcd, struct urb *urb,
+ gfp_t mem_flags);
+ int (*urb_dequeue)(struct usb_hcd *hcd, struct urb *urb, int status);
+ int (*hub_control)(struct usb_hcd *hcd, struct usb_device *dev,
+ unsigned long pipe, void *buffer, int len,
+ struct devrequest *setup);
+ irqreturn_t (*isr)(int irq, void *priv);
+};
struct usb_hcd {
void *hcd_priv;
+ const struct usb_urb_ops *urb_ops;
};
struct usb_host_endpoint {
- struct usb_endpoint_descriptor desc;
+ struct usb_endpoint_descriptor desc;
struct list_head urb_list;
void *hcpriv;
};
@@ -23,8 +38,6 @@ struct usb_host_endpoint {
#define URB_SHORT_NOT_OK 0x0001 /* report short reads as errors */
#define URB_ZERO_PACKET 0x0040 /* Finish bulk OUT with short packet */
-struct urb;
-
typedef void (*usb_complete_t)(struct urb *);
struct urb {
@@ -68,12 +81,27 @@ static inline int usb_hcd_unmap_urb_for_dma(struct usb_hcd *hcd,
return 0;
}
-/**
- * usb_dev_get_parent() - Get the parent of a USB device
- *
- * @udev: USB struct containing information about the device
- * @return associated device for which udev == dev_get_parent_priv(dev)
- */
struct usb_device *usb_dev_get_parent(struct usb_device *udev);
+int usb_urb_submit_control(struct usb_hcd *hcd, struct urb *urb,
+ struct usb_host_endpoint *hep,
+ struct usb_device *dev, unsigned long pipe,
+ void *buffer, int len, struct devrequest *setup,
+ int interval, enum usb_device_speed speed);
+
+int usb_urb_submit_bulk(struct usb_hcd *hcd, struct urb *urb,
+ struct usb_host_endpoint *hep, struct usb_device *dev,
+ unsigned long pipe, void *buffer, int len);
+
+int usb_urb_submit_irq(struct usb_hcd *hcd, struct urb *urb,
+ struct usb_host_endpoint *hep, struct usb_device *dev,
+ unsigned long pipe, void *buffer, int len, int interval);
+
+void usb_urb_fill(struct urb *urb, struct usb_host_endpoint *hep,
+ struct usb_device *dev, int endpoint_type,
+ unsigned long pipe, void *buffer, int len,
+ struct devrequest *setup, int interval);
+
+int usb_urb_submit(struct usb_hcd *hcd, struct urb *urb);
+
#endif /* __USB_COMPAT_H__ */
diff --git a/include/usb_defs.h b/include/usb_defs.h
index 6dd2c997f9..ec00161710 100644
--- a/include/usb_defs.h
+++ b/include/usb_defs.h
@@ -81,6 +81,32 @@
#define EndpointOutRequest \
((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
+/* class requests from the USB 2.0 hub spec, table 11-15 */
+#define HUB_CLASS_REQ(dir, type, request) ((((dir) | (type)) << 8) | (request))
+/* GetBusState and SetHubDescriptor are optional, omitted */
+#define ClearHubFeature HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_HUB, \
+ USB_REQ_CLEAR_FEATURE)
+#define ClearPortFeature HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_PORT, \
+ USB_REQ_CLEAR_FEATURE)
+#define GetHubDescriptor HUB_CLASS_REQ(USB_DIR_IN, USB_RT_HUB, \
+ USB_REQ_GET_DESCRIPTOR)
+#define GetHubStatus HUB_CLASS_REQ(USB_DIR_IN, USB_RT_HUB, \
+ USB_REQ_GET_STATUS)
+#define GetPortStatus HUB_CLASS_REQ(USB_DIR_IN, USB_RT_PORT, \
+ USB_REQ_GET_STATUS)
+#define SetHubFeature HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_HUB, \
+ USB_REQ_SET_FEATURE)
+#define SetPortFeature HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_PORT, \
+ USB_REQ_SET_FEATURE)
+#define ClearTTBuffer HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_PORT, \
+ HUB_CLEAR_TT_BUFFER)
+#define ResetTT HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_PORT, \
+ HUB_RESET_TT)
+#define GetTTState HUB_CLASS_REQ(USB_DIR_IN, USB_RT_PORT, \
+ HUB_GET_TT_STATE)
+#define StopTT HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_PORT, \
+ HUB_STOP_TT)
+
/* Descriptor types */
#define USB_DT_DEVICE 0x01
#define USB_DT_CONFIG 0x02
@@ -289,10 +315,16 @@
#define USB_SS_PORT_STAT_C_CONFIG_ERROR 0x0080
/* wHubCharacteristics (masks) */
+#define HUB_CHAR_COMMON_OCPM 0x0000 /* All ports Over-Current reporting */
+#define HUB_CHAR_INDV_PORT_LPSM 0x0001 /* per-port power control */
+#define HUB_CHAR_NO_LPSM 0x0002 /* no power switching */
#define HUB_CHAR_LPSM 0x0003
#define HUB_CHAR_COMPOUND 0x0004
+#define HUB_CHAR_INDV_PORT_OCPM 0x0008 /* per-port Over-current reporting */
+#define HUB_CHAR_NO_OCPM 0x0010 /* No Over-current Protection support */
#define HUB_CHAR_OCPM 0x0018
#define HUB_CHAR_TTTT 0x0060 /* TT Think Time mask */
+#define HUB_CHAR_PORTIND 0x0080 /* per-port indicators (LEDs) */
/*
* Hub Status & Hub Change bit masks
--
2.33.0
meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0004-usb-add-isp1760-family-driver.patch
+3797
View File
File diff suppressed because it is too large Load Diff
meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0005-corstone1000-enable-isp1763-and-usb-stack.patch
+92
View File
@@ -0,0 +1,92 @@
Upstream-Status: Pending [Not submitted to upstream yet]
Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
From 663bfde59a56d65c031526f75f0e08126f02d845 Mon Sep 17 00:00:00 2001
From: Rui Miguel Silva <rui.silva@linaro.org>
Date: Tue, 27 Jul 2021 23:34:57 +0100
Subject: [PATCH 05/16] corstone1000: enable isp1763 and usb stack
MPS3 board have a ISP1763 usb controller, add the correspondent mmio
area and enable it to be used for mass storage access for example.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
board/armltd/corstone1000/corstone1000.c | 8 ++++++++
configs/corstone1000_defconfig | 19 +++++++++----------
2 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c
index ab98fa87fb..a51f5ddfa0 100644
--- a/board/armltd/corstone1000/corstone1000.c
+++ b/board/armltd/corstone1000/corstone1000.c
@@ -46,6 +46,14 @@ static struct mm_region corstone1000_mem_map[] = {
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* USB */
+ .virt = 0x40200000UL,
+ .phys = 0x40200000UL,
+ .size = 0x00100000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* OCVM */
.virt = 0x80000000UL,
diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
index 54c746d829..fed2b16c93 100644
--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
@@ -1,13 +1,12 @@
CONFIG_ARM=y
-CONFIG_ARM64=y
CONFIG_TARGET_CORSTONE1000=y
CONFIG_SYS_TEXT_BASE=0x02100000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_IDENT_STRING=" corstone1000 aarch64 "
-CONFIG_BOOTDELAY=3
-CONFIG_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="corstone1000-mps3"
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0 loglevel=9"
# CONFIG_DISPLAY_CPUINFO is not set
@@ -16,12 +15,11 @@ CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="corstone1000# "
# CONFIG_CMD_CONSOLE is not set
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_BOOTM=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_USB=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -29,12 +27,13 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_FIT=y
-# CONFIG_CMD_MISC is not set
CONFIG_CMD_FAT=y
-CONFIG_DM=y
+CONFIG_OF_CONTROL=y
+CONFIG_REGMAP=y
# CONFIG_MMC is not set
-# CONFIG_MTD_NOR_FLASH=y
CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
-CONFIG_OF_LIBFDT=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_ISP1760=y
+CONFIG_USB_STORAGE=y
--
2.33.0
meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0006-corstone1000-enable-support-for-FVP.patch
+240
View File
@@ -0,0 +1,240 @@
Upstream-Status: Pending [Not submitted to upstream yet]
Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
From 8244c266643d7fe77e360d2927adcd123a691dd1 Mon Sep 17 00:00:00 2001
From: "Arpita S.K" <Arpita.S.K@arm.com>
Date: Mon, 11 Oct 2021 11:41:25 +0530
Subject: [PATCH 06/16] corstone1000: enable support for FVP
Introduces a new device tree for the FVP.
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/corstone1000-fvp.dts | 28 ++++++
arch/arm/dts/corstone1000.dtsi | 152 ++++++++++++++++++++++++++++++
configs/corstone1000_defconfig | 1 -
4 files changed, 182 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/corstone1000-fvp.dts
create mode 100644 arch/arm/dts/corstone1000.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9fb38682e6..c70c20b9a5 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1112,6 +1112,8 @@ dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb
dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += imx8mm-cl-iot-gate.dtb
+dtb-$(CONFIG_TARGET_CORSTONE1000) += $(DEVICE_TREE).dtb
+
targets += $(dtb-y)
# Add any required device tree compiler flags here
diff --git a/arch/arm/dts/corstone1000-fvp.dts b/arch/arm/dts/corstone1000-fvp.dts
new file mode 100644
index 0000000000..2188ca5e0e
--- /dev/null
+++ b/arch/arm/dts/corstone1000-fvp.dts
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/dts-v1/;
+
+#include "corstone1000.dtsi"
+
+/ {
+ model = "corstone1000-fvp";
+
+ ethernet: eth@4010000 {
+ compatible = "smsc,lan91c111";
+ reg = <0x40100000 0x10000>;
+ phy-mode = "mii";
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 116 0xf04>;
+ reg-io-width = <2>;
+ smsc,irq-push-pull;
+ };
+
+};
+
+&refclk {
+ clock-frequency = <50000000>;
+};
diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
new file mode 100644
index 0000000000..b863193fb6
--- /dev/null
+++ b/arch/arm/dts/corstone1000.dtsi
@@ -0,0 +1,152 @@
+/*
+ * Copyright (c) 2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "arm,corstone1000";
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen { };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0>;
+ next-level-cache = <&L2_0>;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x80000000>;
+ };
+
+ gic: interrupt-controller@1c000000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x1c010000 0x1000>,
+ <0x1c02f000 0x2000>,
+ <0x1c04f000 0x1000>,
+ <0x1c06f000 0x2000>;
+ interrupts = <1 9 0xf08>;
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+
+ refclk100mhz: refclk100mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "apb_pclk";
+ };
+
+ smbclk: refclk24mhzx2 {
+ /* Reference 24MHz clock x 2 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ clock-output-names = "smclk";
+ };
+
+ uartclk: uartclk {
+ /* UART clock - 50MHz */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ clock-output-names = "uartclk";
+ };
+
+ serial0: uart@1a510000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x1a510000 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 19 4>;
+ clocks = <&uartclk>, <&refclk100mhz>;
+ clock-names = "uartclk", "apb_pclk";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <1 13 0xf08>,
+ <1 14 0xf08>,
+ <1 11 0xf08>,
+ <1 10 0xf08>;
+ };
+
+ refclk: refclk@1a220000 {
+ compatible = "arm,armv7-timer-mem";
+ reg = <0x1a220000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ frame@1a230000 {
+ frame-number = <0>;
+ interrupts = <0 2 0xf04>;
+ reg = <0x1a230000 0x1000>;
+ };
+ };
+
+ mbox_es0mhu0: mhu@1b000000 {
+ compatible = "arm,mhuv2","arm,primecell";
+ reg = <0x1b000000 0x1000>,
+ <0x1b010000 0x1000>;
+ clocks = <&refclk100mhz>;
+ clock-names = "apb_pclk";
+ interrupts = <0 12 4>;
+ interrupt-names = "mhu_rx";
+ #mbox-cells = <1>;
+ mbox-name = "arm-es0-mhu0";
+ };
+
+ mbox_es0mhu1: mhu@1b020000 {
+ compatible = "arm,mhuv2","arm,primecell";
+ reg = <0x1b020000 0x1000>,
+ <0x1b030000 0x1000>;
+ clocks = <&refclk100mhz>;
+ clock-names = "apb_pclk";
+ interrupts = <0 47 4>;
+ interrupt-names = "mhu_rx";
+ #mbox-cells = <1>;
+ mbox-name = "arm-es0-mhu1";
+ };
+
+ mbox_semhu1: mhu@1b820000 {
+ compatible = "arm,mhuv2","arm,primecell";
+ reg = <0x1b820000 0x1000>,
+ <0x1b830000 0x1000>;
+ clocks = <&refclk100mhz>;
+ clock-names = "apb_pclk";
+ interrupts = <0 45 4>;
+ interrupt-names = "mhu_rx";
+ #mbox-cells = <1>;
+ mbox-name = "arm-se-mhu1";
+ };
+
+ client {
+ compatible = "arm,client";
+ mboxes = <&mbox_es0mhu0 0>, <&mbox_es0mhu1 0>, <&mbox_semhu1 0>;
+ mbox-names = "es0mhu0", "es0mhu1", "semhu1";
+ };
+
+ extsys0: extsys@1A010310 {
+ compatible = "arm,extsys_ctrl";
+ reg = <0x1A010310 0x4>,
+ <0x1A010314 0x4>;
+ reg-names = "rstreg", "streg";
+ };
+};
diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
index fed2b16c93..c7f291efb6 100644
--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
@@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x02100000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_IDENT_STRING=" corstone1000 aarch64 "
-CONFIG_DEFAULT_DEVICE_TREE="corstone1000-mps3"
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
--
2.33.0
meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0007-arm-corstone1000-sharing-PSCI-DTS-node-between-FVP-a.patch
+34
View File
@@ -0,0 +1,34 @@
Upstream-Status: Pending [Not submitted to upstream yet]
Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
From b50c1457fcd05cddf633bff074fc5edecff22e7e Mon Sep 17 00:00:00 2001
From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Date: Wed, 25 Aug 2021 16:50:40 +0100
Subject: [PATCH 07/16] arm: corstone1000: sharing PSCI DTS node between FVP
and MPS3
At this level of development PSCI is needed to initialize the SMCCC.
SMCCC is needed by FF-A and it is relevant to the MPS3 and FVP.
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
---
arch/arm/dts/corstone1000.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
index b863193fb6..da1725e01f 100644
--- a/arch/arm/dts/corstone1000.dtsi
+++ b/arch/arm/dts/corstone1000.dtsi
@@ -149,4 +149,8 @@
<0x1A010314 0x4>;
reg-names = "rstreg", "streg";
};
+ psci {
+ compatible = "arm,psci-1.0", "arm,psci-0.2";
+ method = "smc";
+ };
};
--
2.33.0
meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0008-arm-corstone1000-Emulated-RTC-Support.patch
+32
View File
@@ -0,0 +1,32 @@
Upstream-Status: Pending [Not submitted to upstream yet]
Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
From 9a045bf04210bf9a00803fc47016e1af59d31e8f Mon Sep 17 00:00:00 2001
From: "Arpita S.K" <Arpita.S.K@arm.com>
Date: Mon, 11 Oct 2021 11:45:41 +0530
Subject: [PATCH 08/16] arm: corstone1000: Emulated RTC Support
This patch adds the options that should be
enabled to turn on emulated RTC support.
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
---
configs/corstone1000_defconfig | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
index c7f291efb6..dbe3c9e3f3 100644
--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
@@ -36,3 +36,8 @@ CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_ISP1760=y
CONFIG_USB_STORAGE=y
+CONFIG_DM_RTC=y
+CONFIG_CMD_RTC=y
+CONFIG_EFI_GET_TIME=y
+CONFIG_EFI_SET_TIME=y
+CONFIG_RTC_EMULATION=y
--
2.33.0
meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0009-arm-corstone1000-execute-uboot-from-DDR.patch
+31
View File
@@ -0,0 +1,31 @@
Upstream-Status: Pending [Not submitted to upstream yet]
Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
From b720b166364407ceb05385f5e72cb238195622ad Mon Sep 17 00:00:00 2001
From: Vishnu Banavath <vishnu.banavath@arm.com>
Date: Wed, 1 Sep 2021 18:33:32 +0100
Subject: [PATCH 09/16] arm: corstone1000: execute uboot from DDR
Previously uboot was executing from CVM. With the addition of
secure partitions in optee, uboot has been moved to DDR.
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
---
configs/corstone1000_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
index dbe3c9e3f3..af1c5ecd89 100644
--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_CORSTONE1000=y
-CONFIG_SYS_TEXT_BASE=0x02100000
+CONFIG_SYS_TEXT_BASE=0x80000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_IDENT_STRING=" corstone1000 aarch64 "
--
2.33.0
meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend
+21
View File
@@ -2,6 +2,27 @@
FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
#
# Corstone1000 64-bit machines
#
CORSTONE1000_DEVICE_TREE:corstone1000-fvp = "corstone1000-fvp"
EXTRA_OEMAKE:append:corstone1000 = ' DEVICE_TREE=${CORSTONE1000_DEVICE_TREE}'
SYSROOT_DIRS:append:corstone1000 = " /boot"
SRC_URI:append:corstone1000 = " \
file://0001-arm-add-corstone1000-platform.patch \
file://0002-arm-corstone1000-enable-devicetree-in-defconfig.patch \
file://0003-usb-common-move-urb-code-to-common.patch \
file://0004-usb-add-isp1760-family-driver.patch \
file://0005-corstone1000-enable-isp1763-and-usb-stack.patch \
file://0006-corstone1000-enable-support-for-FVP.patch \
file://0007-arm-corstone1000-sharing-PSCI-DTS-node-between-FVP-a.patch \
file://0008-arm-corstone1000-Emulated-RTC-Support.patch \
file://0009-arm-corstone1000-execute-uboot-from-DDR.patch \
"
#
# FVP BASE
#