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Add support for arm FVP Base simulator

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Add recipes and configuration files to add Yocto support
for FVP Base simulator from arm.
The following components are supported:
- trusted-firmware-a
- linux kernel (with specific kernel configuration and dts)
- xen (with meta-virtualization layer)
- unpacking and starting the generated image directly in Foundation
simulator (package must be download from www.arm.com website and put in
the directory downloads/licensed/silver.arm.com).

After building, the following command can be used to start a generated
image in fvp:
./tmp/deploy/tools/start-fvp-base.sh

Change-Id: I1759aecf32e84e25e813d7b0305f49616d4b47ef
Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
This commit is contained in:
Bertrand Marquis
2019-12-04 17:07:16 +00:00
parent ad73752f4b
commit 3ae02d723f
10 changed files with 894 additions and 0 deletions
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10
meta-arm-bsp/conf/machine/fvp-base.conf Normal file
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# Configuration for Armv8-A Base Platform FVP
#@TYPE: Machine
#@NAME: Armv8-A Base Platform FVP machine
#@DESCRIPTION: Machine configuration for Armv8-A Base Platform FVP model
require conf/machine/fvp-common/fvp.inc
KERNEL_DEVICETREE = "arm/fvp-base-gicv3-psci-custom.dtb"
EXTRA_IMAGEDEPENDS += "fvp-base-native"

36
meta-arm-bsp/documentation/fvp-base.md Normal file
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# Armv8-A Base Platform FVP Support in meta-arm-platforms
## Howto Build and Run
### Configuration:
In the local.conf file, MACHINE should be set as follow:
MACHINE ?= "fvp-base"
### Build:
```bash$ bitbake core-image-minimal```
### Run:
The layer provides a recipe to install the Fixed Virtual Platform in your
environment. You must download Armv8-A Base Platform FVP from Arm developer
(This might require the user to register) from this address:
https://developer.arm.com/tools-and-software/simulation-models/fixed-virtual-platforms
and put the downloaded tar file in 'downloads/licensed/silver.arm.com/'
directory of your project (or of your Pre-Mirror if you have one).
Once done, do the following to build and run an image:
```bash$ bitbake core-image-minimal```
```bash$ ./tmp/deploy/tools/start-fvp-base.sh```
If you have built a configuration without a ramdisk, you can use the following
command in U-boot to start Linux:
```VExpress64# booti 0x80080000 - 0x83000000```
## Devices supported in the kernel
- serial
- virtio disk
- network
- watchdog
- rtc
## Devices not supported or not functional
None

1
meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.%.bbappend
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@@ -3,5 +3,6 @@
MACHINE_TFA_REQUIRE ?= ""
MACHINE_TFA_REQUIRE_foundation-armv8 = "trusted-firmware-a-fvp.inc"
MACHINE_TFA_REQUIRE_fvp-base = "trusted-firmware-a-fvp.inc"
require ${MACHINE_TFA_REQUIRE}

231
meta-arm-bsp/recipes-devtools/fvp-common/files/start-fvp-base.sh Executable file
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#!/bin/bash
# Script to start a build image using FVP Base Platform
#
set -u
set -e
# Get parameters from bitbake configuration
source <(bitbake -e fvp-base-native | grep \
-e "^STAGING_.*_NATIVE=" \
-e "^DEPLOY_DIR.*=")
# Bitbake image to run
IMAGE_NAME="$(cd $DEPLOY_DIR_IMAGE; ls *-fvp-base.manifest | \
sed -e "s/-fvp-base\.manifest//")"
# BL1 and FIP files
BL1_FILE="bl1-fvp.bin"
FIP_FILE="fip-fvp.bin"
# Linux kernel file in deploy_dir and load address
KERNEL_FILE="Image"
KERNEL_ADDR="0x80080000"
# DTB file in deploy_dir and load address
DTB_FILE="fvp-base-gicv3-psci-custom.dtb"
DTB_ADDR="0x83000000"
# Xen file in deploy_dir and load address
XEN_FILE="xen-fvp-base"
XEN_ADDR="0x84000000"
# Disk file in deploy_dir
DISK_FILE=""
# Armv8-A Base Platform FVP Executable (Extracted from
# FM000-KT-00173-r11p7-30rel0.tgz from silver.arm.com)
FVPEXEC="FVP_Base_RevC-2xAEMv8A"
# FVP arguments
FVPARGS=" \
-C bp.virtio_net.enabled=1 \
-C pctl.startup=0.0.0.0 \
-C bp.secure_memory=1 \
-C bp.tzc_400.diagnostics=1 \
-C cluster0.NUM_CORES=4 \
-C cluster1.NUM_CORES=4"
# FVP user arguments
EXTRA_ARGS=""
# Help function
usage() {
cat <<EOF
Usage $0 [OPTION] [IMAGE_NAME] [FVP_ARGS]
Start a generated Yocto Image using Arm Fixed Virtual Platform.
This script will execute FVP_Base_RevC-2xAEMv8A from the PATH.
IMAGE_NAME should be the name of the image to start, this is what you did
build with bitbake, default is 'core-image-minimal' if none is auto-detected.
All extra arguments are passed to FVP after the IMAGE_NAME.
OPTIONs:
-h, --help displays this help message
--deploy=[DIR] use DIR as deploy directory, default is:
$DEPLOY_DIR_IMAGE
--no-bl1 Don't load a BL1
--bl1=[NAME] File name in DEPLOY_DIR_IMAGE to be used for BL1,
default is $BL1_FILE.
This adds the following argument to FVP:
-C bp.secureflashloader.fname=DEPLOY_DIR_IMAGE/NAME
--no-fip Don't load a FIP
--fip=[NAME] File name in DEPLOY_DIR_IMAGE to be used for FIP,
default is $FIP_FILE.
This adds the following argument to FVP:
-C bp.flashloader0.fname=DEPLOY_DIR_IMAGE/NAME
--linux=[NAME] File name in DEPLOY_DIR_IMAGE to be used as Linux kernel
default is $KERNEL_FILE
--linux-addr=[ADDR] Address at which Linux kernel should be loaded
default is $KERNEL_ADDR
--dtb=[NAME] File name in DEPLOY_DIR_IMAGE to be used as DTB
default is $DTB_FILE
--dtb-addr=[ADDR] Address at which DTB should be loaded
default is $DTB_ADDR
--xen=[NAME] File name in DEPLOY_DIR_IMAGE to be used as Xen
It is only loaded if the file actually exists.
default is $XEN_FILE
--xen-addr=[ADDR] Address at which Xen should be loaded
default is $XEN_ADDR
--disk=[NAME] File name in DEPLOY_DIR_IMAGE to be used as disk.
It is only loaded if the file actually exists.
default is IMAGE_NAME-fvp.disk.img
EOF
}
# Process command line arguments
for arg in "$@"; do
case $arg in
--*=*)
optarg=$(echo $arg | sed -e "s/.*=//")
;;
*)
optarg=""
;;
esac
case $arg in
-h|-?|--help)
usage
exit 0
;;
--deploy=*)
if [ ! -f $optarg/Image ]
then
echo "Invalid argument" >&2
echo "$optarg is not a valid deploy directory" >&2
exit 1
fi
DEPLOY_DIR_IMAGE=$optarg
;;
--no-bl1)
BL1_FILE=""
;;
--bl1=*)
BL1_FILE="$optarg"
;;
--no-fip)
FIP_FILE=""
;;
--fip=*)
FIP_FILE="$optarg"
;;
--linux=*)
LINUX_FILE="$optarg"
;;
--linux-addr=*)
LINUX_ADDR="$optarg"
;;
--dtb=*)
DTB_FILE="$optarg"
;;
--dtb-addr=*)
DTB_ADDR="$optarg"
;;
--xen=*)
XEN_FILE="$optarg"
;;
--xen-addr=*)
XEN_ADDR="$optarg"
;;
--disk=*)
DISK_FILE="$optarg"
;;
*)
if [ -z "$IMAGE_NAME" ]
then
IMAGE_NAME="$arg"
else
EXTRA_ARGS="$EXTRA_ARGS $arg"
fi
;;
esac
done
if [ -z "${BUILDDIR:-}" ]; then
echo "We are not in a Yocto build project." >&2
echo "Please source oe-init-build-env first." >&2
exit 1
fi
if [ -z "${IMAGE_NAME:-}" ]; then
IMAGE_NAME="core-image-minimal"
fi
if [ -z "${DISK_FILE:-}" ]; then
DISK_FILE="${IMAGE_NAME}-fvp-base.disk.img"
fi
# Add bl1 arg
if [ -n "$BL1_FILE" ]; then
if [ ! -f $DEPLOY_DIR_IMAGE/$BL1_FILE ]; then
echo "Could not find bl1 ($BL1_FILE) in $DEPLOY_DIR_IMAGE" >&2
exit 1
fi
FVPARGS="$FVPARGS -C bp.secureflashloader.fname=$DEPLOY_DIR_IMAGE/$BL1_FILE"
fi
# Add fip arg
if [ -n "$FIP_FILE" ]; then
if [ ! -f $DEPLOY_DIR_IMAGE/$FIP_FILE ]; then
echo "Could not find fip ($FIP_FILE) in $DEPLOY_DIR_IMAGE" >&2
exit 1
fi
FVPARGS="$FVPARGS -C bp.flashloader0.fname=$DEPLOY_DIR_IMAGE/$FIP_FILE"
fi
# Add Linux kernel
if [ -n "$KERNEL_FILE" ]; then
if [ ! -f $DEPLOY_DIR_IMAGE/$KERNEL_FILE ]; then
echo "Could not find Linux kernel ($KERNEL_FILE) in $DEPLOY_DIR_IMAGE" >&2
exit 1
fi
FVPARGS="$FVPARGS \
--data cluster0.cpu0=$DEPLOY_DIR_IMAGE/$KERNEL_FILE@$KERNEL_ADDR"
fi
# Add DTB
if [ -n "$DTB_FILE" ]; then
if [ ! -f $DEPLOY_DIR_IMAGE/$DTB_FILE ]; then
echo "Could not find the DTB ($DTB_FILE) in $DEPLOY_DIR_IMAGE" >&2
exit 1
fi
FVPARGS="$FVPARGS \
--data cluster0.cpu0=$DEPLOY_DIR_IMAGE/$DTB_FILE@$DTB_ADDR"
fi
# Add xen if present
if [ -n "$XEN_FILE" -a -f $DEPLOY_DIR_IMAGE/$XEN_FILE ]; then
FVPARGS="$FVPARGS \
--data cluster0.cpu0=$DEPLOY_DIR_IMAGE/$XEN_FILE@$XEN_ADDR"
fi
# Add disk if present
if [ -n "$DISK_FILE" -a -f $DEPLOY_DIR_IMAGE/$DISK_FILE ]; then
FVPARGS="$FVPARGS \
-C bp.virtioblockdevice.image_path=$DEPLOY_DIR_IMAGE/$DISK_FILE"
fi
FVPEXEC="${STAGING_BINDIR_NATIVE}/${FVPEXEC}"
echo "$FVPEXEC $FVPARGS $EXTRA_ARGS"
$FVPEXEC $FVPARGS $EXTRA_ARGS

45
meta-arm-bsp/recipes-devtools/fvp-common/fvp-base-native_r11p7-30rel0.bb Normal file
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# Armv8-A Base Platform FVP build recipe
#
# Download and install recipe specific for Armv8-A Base Platform FVP build are
# captured in the file.
#
# The tar file required to build this package must be downloaded from
# https://developer.arm.com/tools-and-software/simulation-models/fixed-virtual-platforms
# and put in the sub-directory 'licensed/silver.arm.com' of one of the
# following locations:
# - in the directory 'files' of this file directory
# - in your Yocto project download directory (DL_DIR parameter of local.conf)
# - in your Download mirror if you have one
SRC_URI = "file://licensed/silver.arm.com/FM000-KT-00173-${PV}.tgz"
SRC_URI += "file://start-fvp-base.sh"
S = "${WORKDIR}/Base_RevC_AEMv8A_pkg"
# Checksums to compare against downloaded package files' checksums
LIC_FILES_CHKSUM = " \
file://license_terms/license_agreement.txt;md5=ae7b47c67a033995c6b4510476a50f03 \
file://license_terms/redistributables.txt;md5=f9fafcaf37ce6c9427568b9dbdbaabe5 \
file://license_terms/supplementary_terms.txt;md5=26e4b214f639a22c8e7e207abc10eccb \
file://license_terms/third_party_licenses.txt;md5=1aa4ab9ee0642b1bc92063d29426c25f \
"
require fvp-native.inc
do_install_append() {
cp -a --no-preserve=ownership -rf bin doc fmtplib license_terms models \
plugins scripts ${D}/${datadir}/fvp/.
cat <<EOF > ${D}${bindir}/FVP_Base_RevC-2xAEMv8A
#!/bin/bash
basedir=\$(cd \$(dirname \$0)/../../; pwd)
export LD_LIBRARY_PATH="\$basedir/lib:\$basedir/usr/lib"
\$basedir/usr/share/fvp/models/Linux64_GCC-4.9/FVP_Base_RevC-2xAEMv8A "\$@"
EOF
chmod 755 ${D}${bindir}/FVP_Base_RevC-2xAEMv8A
}
do_deploy_append() {
install -m 755 ${WORKDIR}/start-fvp-base.sh ${DEPLOYDIR}/.
}

5
meta-arm-bsp/recipes-extended/xen/xen_4.%.bbappend
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@@ -16,3 +16,8 @@ EXTRA_OEMAKE += "${@bb.utils.contains('XEN_CONFIG_EARLY_PRINTK', 'disable', \
COMPATIBLE_MACHINE_foundation-armv8 = "foundation-armv8"
SRC_URI_append_foundation-armv8 = " file://fvp/defconfig"
# FVP Base support
COMPATIBLE_MACHINE_fvp-base = "fvp-base"
SRC_URI_append_fvp-base = " file://fvp/defconfig"

264
meta-arm-bsp/recipes-kernel/linux/files/dts/arm/fvp-base-gicv3-psci-common-custom.dtsi Normal file
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/*
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/memreserve/ 0x80000000 0x00010000;
/include/ "rtsm_ve-motherboard-nomap.dtsi"
/ {
model = "FVP Base";
compatible = "arm,vfp-base", "arm,vexpress";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
aliases {
serial0 = &v2m_serial0;
serial1 = &v2m_serial1;
serial2 = &v2m_serial2;
serial3 = &v2m_serial3;
};
psci {
compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
method = "smc";
cpu_suspend = <0xc4000001>;
cpu_off = <0x84000002>;
cpu_on = <0xc4000003>;
sys_poweroff = <0x84000008>;
sys_reset = <0x84000009>;
};
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&CPU0>;
};
core1 {
cpu = <&CPU1>;
};
core2 {
cpu = <&CPU2>;
};
core3 {
cpu = <&CPU3>;
};
};
cluster1 {
core0 {
cpu = <&CPU4>;
};
core1 {
cpu = <&CPU5>;
};
core2 {
cpu = <&CPU6>;
};
core3 {
cpu = <&CPU7>;
};
};
};
idle-states {
entry-method = "arm,psci";
CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
local-timer-stop;
arm,psci-suspend-param = <0x0010000>;
entry-latency-us = <40>;
exit-latency-us = <100>;
min-residency-us = <150>;
};
CLUSTER_SLEEP_0: cluster-sleep-0 {
compatible = "arm,idle-state";
local-timer-stop;
arm,psci-suspend-param = <0x1010000>;
entry-latency-us = <500>;
exit-latency-us = <1000>;
min-residency-us = <2500>;
};
};
CPU0:cpu@0 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_0>;
};
CPU1:cpu@1 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_0>;
};
CPU2:cpu@2 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_0>;
};
CPU3:cpu@3 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_0>;
};
CPU4:cpu@100 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x100>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_0>;
};
CPU5:cpu@101 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x101>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_0>;
};
CPU6:cpu@102 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x102>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_0>;
};
CPU7:cpu@103 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x103>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_0>;
};
L2_0: l2-cache0 {
compatible = "cache";
};
};
memory@80000000 {
device_type = "memory";
reg = <0x00000000 0x80000000 0 0x7F000000>,
<0x00000008 0x80000000 0 0x80000000>;
};
gic: interrupt-controller@2f000000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
interrupt-controller;
reg = <0x0 0x2f000000 0 0x10000>, // GICD
<0x0 0x2f100000 0 0x200000>, // GICR
<0x0 0x2c000000 0 0x2000>, // GICC
<0x0 0x2c010000 0 0x2000>, // GICH
<0x0 0x2c02f000 0 0x2000>; // GICV
interrupts = <1 9 4>;
its: its@2f020000 {
compatible = "arm,gic-v3-its";
msi-controller;
reg = <0x0 0x2f020000 0x0 0x20000>; // GITS
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0xff01>,
<1 14 0xff01>,
<1 11 0xff01>,
<1 10 0xff01>;
clock-frequency = <100000000>;
};
timer@2a810000 {
compatible = "arm,armv7-timer-mem";
reg = <0x0 0x2a810000 0x0 0x10000>;
clock-frequency = <100000000>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
frame@2a830000 {
frame-number = <1>;
interrupts = <0 26 4>;
reg = <0x0 0x2a830000 0x0 0x10000>;
};
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <0 60 4>,
<0 61 4>,
<0 62 4>,
<0 63 4>;
};
smb@8000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0 0x08000000 0x04000000>,
<1 0 0 0x14000000 0x04000000>,
<2 0 0 0x18000000 0x04000000>,
<3 0 0 0x1c000000 0x04000000>,
<4 0 0 0x0c000000 0x04000000>,
<5 0 0 0x10000000 0x04000000>;
};
panels {
panel {
compatible = "panel";
mode = "XVGA";
refresh = <60>;
xres = <1024>;
yres = <768>;
pixclock = <15748>;
left_margin = <152>;
right_margin = <48>;
upper_margin = <23>;
lower_margin = <3>;
hsync_len = <104>;
vsync_len = <4>;
sync = <0>;
vmode = "FB_VMODE_NONINTERLACED";
tim2 = "TIM2_BCD", "TIM2_IPC";
cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";
bpp = <16>;
};
};
};

9
meta-arm-bsp/recipes-kernel/linux/files/dts/arm/fvp-base-gicv3-psci-custom.dts Normal file
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@@ -0,0 +1,9 @@
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/dts-v1/;
/include/ "fvp-base-gicv3-psci-common-custom.dtsi"

282
meta-arm-bsp/recipes-kernel/linux/files/dts/arm/rtsm_ve-motherboard-nomap.dtsi Normal file
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@@ -0,0 +1,282 @@
// SPDX-License-Identifier: GPL-2.0
/*
* ARM Ltd. Fast Models
*
* Versatile Express (VE) system model
* Motherboard component
*
* VEMotherBoard.lisa
*
* This is a duplicate of rtsm_ve-motherboard.dtsi but not
* using interrupt-map as this is not properly supported in
* xen right now
*/
/ {
smb@8000000 {
motherboard {
arm,v2m-memory-map = "rs1";
compatible = "arm,vexpress,v2m-p1", "simple-bus";
#address-cells = <2>; /* SMB chipselect number and offset */
#size-cells = <1>;
ranges;
flash@0,00000000 {
compatible = "arm,vexpress-flash", "cfi-flash";
reg = <0 0x00000000 0x04000000>,
<4 0x00000000 0x04000000>;
bank-width = <4>;
};
v2m_video_ram: vram@2,00000000 {
compatible = "arm,vexpress-vram";
reg = <2 0x00000000 0x00800000>;
};
ethernet@2,02000000 {
compatible = "smsc,lan91c111";
reg = <2 0x02000000 0x10000>;
interrupts = <0 15 4>;
};
v2m_clk24mhz: clk24mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "v2m:clk24mhz";
};
v2m_refclk1mhz: refclk1mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1000000>;
clock-output-names = "v2m:refclk1mhz";
};
v2m_refclk32khz: refclk32khz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "v2m:refclk32khz";
};
iofpga@3,00000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 3 0 0x200000>;
v2m_sysreg: sysreg@10000 {
compatible = "arm,vexpress-sysreg";
reg = <0x010000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
};
v2m_sysctl: sysctl@20000 {
compatible = "arm,sp810", "arm,primecell";
reg = <0x020000 0x1000>;
clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>;
clock-names = "refclk", "timclk", "apb_pclk";
#clock-cells = <1>;
clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
};
aaci@40000 {
compatible = "arm,pl041", "arm,primecell";
reg = <0x040000 0x1000>;
interrupts = <0 11 4>;
clocks = <&v2m_clk24mhz>;
clock-names = "apb_pclk";
};
mmci@50000 {
compatible = "arm,pl180", "arm,primecell";
reg = <0x050000 0x1000>;
interrupts = <0 9 4 0 10 4>;
cd-gpios = <&v2m_sysreg 0 0>;
wp-gpios = <&v2m_sysreg 1 0>;
max-frequency = <12000000>;
vmmc-supply = <&v2m_fixed_3v3>;
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
clock-names = "mclk", "apb_pclk";
};
kmi@60000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x060000 0x1000>;
interrupts = <0 12 4>;
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
clock-names = "KMIREFCLK", "apb_pclk";
};
kmi@70000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x070000 0x1000>;
interrupts = <0 13 4>;
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
clock-names = "KMIREFCLK", "apb_pclk";
};
v2m_serial0: uart@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <0 5 4>;
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
clock-names = "uartclk", "apb_pclk";
};
v2m_serial1: uart@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <0 6 4>;
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
clock-names = "uartclk", "apb_pclk";
};
v2m_serial2: uart@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <0 7 4>;
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
clock-names = "uartclk", "apb_pclk";
};
v2m_serial3: uart@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <0 8 4>;
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
clock-names = "uartclk", "apb_pclk";
};
wdt@f0000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x0f0000 0x1000>;
interrupts = <0 0 4>;
clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;
clock-names = "wdogclk", "apb_pclk";
};
v2m_timer01: timer@110000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x110000 0x1000>;
interrupts = <0 2 4>;
clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>;
clock-names = "timclken1", "timclken2", "apb_pclk";
};
v2m_timer23: timer@120000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x120000 0x1000>;
interrupts = <0 3 4>;
clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>;
clock-names = "timclken1", "timclken2", "apb_pclk";
};
rtc@170000 {
compatible = "arm,pl031", "arm,primecell";
reg = <0x170000 0x1000>;
interrupts = <0 4 4>;
clocks = <&v2m_clk24mhz>;
clock-names = "apb_pclk";
};
clcd@1f0000 {
compatible = "arm,pl111", "arm,primecell";
reg = <0x1f0000 0x1000>;
interrupt-names = "combined";
interrupts = <0 14 4>;
clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
clock-names = "clcdclk", "apb_pclk";
arm,pl11x,framebuffer = <0x18000000 0x00180000>;
memory-region = <&v2m_video_ram>;
max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */
port {
v2m_clcd_pads: endpoint {
remote-endpoint = <&v2m_clcd_panel>;
arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
};
};
panel {
compatible = "panel-dpi";
port {
v2m_clcd_panel: endpoint {
remote-endpoint = <&v2m_clcd_pads>;
};
};
panel-timing {
clock-frequency = <63500127>;
hactive = <1024>;
hback-porch = <152>;
hfront-porch = <48>;
hsync-len = <104>;
vactive = <768>;
vback-porch = <23>;
vfront-porch = <3>;
vsync-len = <4>;
};
};
};
virtio-block@130000 {
compatible = "virtio,mmio";
reg = <0x130000 0x200>;
interrupts = <0 42 4>;
};
};
v2m_fixed_3v3: v2m-3v3 {
compatible = "regulator-fixed";
regulator-name = "3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
mcc {
compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>;
v2m_oscclk1: oscclk1 {
/* CLCD clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 1>;
freq-range = <23750000 63500000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk1";
};
reset {
compatible = "arm,vexpress-reset";
arm,vexpress-sysreg,func = <5 0>;
};
muxfpga {
compatible = "arm,vexpress-muxfpga";
arm,vexpress-sysreg,func = <7 0>;
};
shutdown {
compatible = "arm,vexpress-shutdown";
arm,vexpress-sysreg,func = <8 0>;
};
reboot {
compatible = "arm,vexpress-reboot";
arm,vexpress-sysreg,func = <9 0>;
};
dvimode {
compatible = "arm,vexpress-dvimode";
arm,vexpress-sysreg,func = <11 0>;
};
};
};
};
};

11
meta-arm-bsp/recipes-kernel/linux/linux-yocto-arm-platforms.inc
View File

@@ -16,3 +16,14 @@ SRC_URI_append = " file://arm-platforms-kmeta;type=kmeta;name=arm-platforms-kmet
COMPATIBLE_MACHINE_foundation-armv8 = "foundation-armv8"
KMACHINE_foundation-armv8 = "fvp"
#
# FVP BASE KMACHINE
#
COMPATIBLE_MACHINE_fvp-base = "fvp-base"
KMACHINE_fvp-base = "fvp"
SRC_URI_append_fvp-base = " file://dts/arm;subdir=add-files"
do_patch_append_fvp-base() {
tar -C ${WORKDIR}/add-files/dts -cf - arm | \
tar -C arch/arm64/boot/dts -xf -
}