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arm-bsp/n1sdp: use edk2-firmware 202211 version

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The upstream official N1SDP software currently supports edk2-firmware
202211 version. This patch is to align N1SDP Yocto build with upstream
N1SDP software.

Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
This commit is contained in:
Xueliang Zhong
2023-03-23 11:27:06 +00:00
parent 1f2e4e7ff5
commit 5da8393712
12 changed files with 3091 additions and 48 deletions
Download Patch File Download Diff File Expand all files Collapse all files
meta-arm-bsp/conf/machine/n1sdp.conf
+1
View File
@@ -29,6 +29,7 @@ EXTRA_IMAGEDEPENDS += "virtual/control-processor-firmware"
#UEFI EDK2 firmware
EXTRA_IMAGEDEPENDS += "edk2-firmware"
PREFERRED_VERSION_edk2-firmware ?= "202211"
#optee
PREFERRED_VERSION_optee-os ?= "3.20.%"
meta-arm-bsp/recipes-bsp/uefi/edk2-firmware-n1sdp.inc
+7 -6
View File
@@ -1,8 +1,3 @@
# Align with N1SDP-2022.06.22 release
SRCREV_edk2 = "b24306f15daa2ff8510b06702114724b33895d3c"
SRCREV_edk2-platforms = "fdaf4eb69a8b6839aecf6d3bdd938aa5c34a8a17"
PV .= "+git${SRCPV}"
# N1SDP specific EDK2 configurations
EDK2_BUILD_RELEASE = "0"
EDK2_PLATFORM = "n1sdp"
@@ -20,8 +15,14 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files/edk2-platforms:"
SRC_URI:append = "\
file://0001-Platform-ARM-N1sdp-Add-support-to-parse-NT_FW_CONFIG.patch;patchdir=edk2-platforms \
file://0002-Platform-ARM-N1Sdp-Fix-RemoteDdrSize-cast.patch;patchdir=edk2-platforms \
file://0002-Platform-ARM-N1Sdp-Fix-RemoteDdrSize-cast.patch;patchdir=edk2-platforms \
file://0003-Platform-ARM-N1Sdp-Modify-the-IRQ-ID-of-Debug-UART-a.patch;patchdir=edk2-platforms \
file://0004-Silicon-ARM-NeoverseN1Soc-Enable-SCP-QSPI-flash-regi.patch;patchdir=edk2-platforms \
file://0005-Platform-ARM-N1Sdp-NOR-flash-library-for-N1Sdp.patch;patchdir=edk2-platforms \
file://0006-Platform-ARM-N1Sdp-NOR-flash-Dxe-Driver-for-N1Sdp.patch;patchdir=edk2-platforms \
file://0007-Platform-ARM-N1Sdp-Persistent-storage-for-N1Sdp.patch;patchdir=edk2-platforms \
file://0008-Platform-ARM-N1Sdp-Enable-FaultTolerantWrite-Dxe-dri.patch;patchdir=edk2-platforms \
file://0009-Platform-ARM-N1Sdp-manually-poll-QSPI-status-bit-aft.patch;patchdir=edk2-platforms \
"
do_deploy:append() {
meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0001-Platform-ARM-N1sdp-Add-support-to-parse-NT_FW_CONFIG.patch
+19 -23
View File
@@ -1,7 +1,7 @@
From fa3fd24ffbc987e952a2e5610a7b02556afd2087 Mon Sep 17 00:00:00 2001
From 928cb457b9ab2abefbacad655eefdde943b4ee9a Mon Sep 17 00:00:00 2001
From: sahil <sahil@arm.com>
Date: Thu, 17 Mar 2022 16:28:05 +0530
Subject: [PATCH 1/3] Platform/ARM/N1sdp: Add support to parse NT_FW_CONFIG
Subject: [PATCH] Platform/ARM/N1sdp: Add support to parse NT_FW_CONFIG
NT_FW_CONFIG DTB contains platform information passed by
Tf-A boot stage.
@@ -13,8 +13,7 @@ Upstream-Status: Pending
Signed-off-by: Adam Johnston <adam.johnston@arm.com>
Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Signed-off-by: sahil <sahil@arm.com>
Change-Id: Ib82571280bf1ca5febe5766e618de09e7b70bb02
Change-Id: I54a86277719607eb00d4a472fae8f13c180eafca
---
.../ConfigurationManager.c | 24 ++--
.../ConfigurationManagerDxe.inf | 3 +-
@@ -27,7 +26,7 @@ Change-Id: Ib82571280bf1ca5febe5766e618de09e7b70bb02
8 files changed, 152 insertions(+), 25 deletions(-)
diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
index f50623ae..e023d47c 100644
index a6b4cb0e..c15020f5 100644
--- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
+++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
@@ -1,7 +1,7 @@
@@ -35,7 +34,7 @@ index f50623ae..e023d47c 100644
Configuration Manager Dxe
- Copyright (c) 2021, ARM Limited. All rights reserved.<BR>
+ Copyright (c) 2021 - 2022, ARM Limited. All rights reserved.<BR>
+ Copyright (c) 2021 - 2023, ARM Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -139,7 +138,7 @@ index f50623ae..e023d47c 100644
// Configuration Manager Protocol
Status = InitializePlatformRepository (
diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
index 4f8e7f13..fb59c295 100644
index 4f8e7f13..a4e8b783 100644
--- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
+++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
@@ -1,7 +1,7 @@
@@ -147,7 +146,7 @@ index 4f8e7f13..fb59c295 100644
# Configuration Manager Dxe
#
-# Copyright (c) 2021, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2021 - 2022, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2021 - 2023, ARM Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -160,14 +159,14 @@ index 4f8e7f13..fb59c295 100644
UefiBootServicesTableLib
UefiDriverEntryPoint
diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 097160c7..63cebaf0 100644
index 097160c7..4966011e 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.
+* Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.
+* Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -204,14 +203,14 @@ index 097160c7..63cebaf0 100644
+
#endif
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S
index 8d2069de..88ed640d 100644
index 8d2069de..a0b89a7b 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2019 - 2020, ARM Limited. All rights reserved.
+* Copyright (c) 2019 - 2022, ARM Limited. All rights reserved.
+* Copyright (c) 2019 - 2023, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -225,14 +224,14 @@ index 8d2069de..88ed640d 100644
//
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
index c0effd37..fabe902c 100644
index c0effd37..2f753be7 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2018-2021, ARM Limited. All rights reserved.<BR>
+ Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.<BR>
+ Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -270,7 +269,7 @@ index c0effd37..fabe902c 100644
};
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
index 96e590cd..6f9c9d5a 100644
index 96e590cd..78f309c3 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
@@ -1,7 +1,7 @@
@@ -278,7 +277,7 @@ index 96e590cd..6f9c9d5a 100644
# Platform Library for N1Sdp.
#
-# Copyright (c) 2018-2021, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -308,14 +307,14 @@ index 96e590cd..6f9c9d5a 100644
gArmMpCoreInfoPpiGuid
+ gNtFwConfigDtInfoPpiGuid
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
index 339fa07b..b58bda4b 100644
index 339fa07b..1d53ec75 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
+ Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.<BR>
+ Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -442,7 +441,7 @@ index 339fa07b..b58bda4b 100644
NEOVERSEN1SOC_DRAM_BLOCK1_SIZE / SIZE_1GB) *
(UINT64)SIZE_1GB);
diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
index d59f25a5..4dea8fe1 100644
index d59f25a5..9e257ebd 100644
--- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
@@ -1,7 +1,7 @@
@@ -450,7 +449,7 @@ index d59f25a5..4dea8fe1 100644
# Describes the entire platform configuration.
#
-# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -470,6 +469,3 @@ index d59f25a5..4dea8fe1 100644
+
+[Ppis]
+ gNtFwConfigDtInfoPpiGuid = { 0xb50dee0e, 0x577f, 0x47fb, { 0x83, 0xd0, 0x41, 0x78, 0x61, 0x8b, 0x33, 0x8a } }
--
2.37.2
meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0002-Platform-ARM-N1Sdp-Fix-RemoteDdrSize-cast.patch
+5 -9
View File
@@ -1,7 +1,7 @@
From 73aab76042ae34fa4b07414c1830129e572dcd65 Mon Sep 17 00:00:00 2001
From ba3ed154863d1acd0996178beaf3a2bc693b938c Mon Sep 17 00:00:00 2001
From: sahil <sahil@arm.com>
Date: Wed, 20 Apr 2022 12:24:41 +0530
Subject: [PATCH 2/3] Platform/ARM/N1Sdp: Fix RemoteDdrSize cast
Subject: [PATCH] Platform/ARM/N1Sdp: Fix RemoteDdrSize cast
RemoteDdrSize calculation wraps around when booting N1Sdp in
multichip mode. Casting it to UINT64 to fix the issue.
@@ -10,15 +10,14 @@ Upstream-Status: Pending
Signed-off-by: Adam Johnston <adam.johnston@arm.com>
Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Signed-off-by: sahil <sahil@arm.com>
Change-Id: I2c2a70c2ab046337236fba92d25dec5905ccd117
Change-Id: Ic51269a8d67669684a5f056701cfbef6beb23da2
---
.../ConfigurationManagerDxe/ConfigurationManager.c | 2 +-
Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
index e023d47c..36b5fc9e 100644
index c15020f5..b11c0425 100644
--- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
+++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
@@ -1254,7 +1254,7 @@ InitializePlatformRepository (
@@ -31,7 +30,7 @@ index e023d47c..36b5fc9e 100644
// Update Remote DDR Region1
PlatRepoInfo->MemAffInfo[REMOTE_DDR_REGION1].ProximityDomain = 1;
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
index b58bda4b..fbc9b05e 100644
index 1d53ec75..5cacd437 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
@@ -157,7 +157,7 @@ ArmPlatformGetVirtualMemoryMap (
@@ -43,6 +42,3 @@ index b58bda4b..fbc9b05e 100644
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
--
2.37.2
meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0003-Platform-ARM-N1Sdp-Modify-the-IRQ-ID-of-Debug-UART-a.patch
+6 -10
View File
@@ -1,7 +1,7 @@
From adc66d99663f71ec97313c40b0d00a908f292c30 Mon Sep 17 00:00:00 2001
From 2ccb463274d0c04f1e3253194ea6eee80c31cb49 Mon Sep 17 00:00:00 2001
From: Himanshu Sharma <Himanshu.Sharma@arm.com>
Date: Mon, 30 May 2022 10:53:30 +0000
Subject: [PATCH 3/3] Platform/ARM/N1Sdp: Modify the IRQ ID of Debug UART and
Subject: [PATCH] Platform/ARM/N1Sdp: Modify the IRQ ID of Debug UART and
routing it to IOFPGA UART1
In DBG2 table, IRQ ID was set as 0 for the UART. This overwrote the
@@ -16,15 +16,14 @@ Upstream-Status: Pending
Signed-off-by: Adam Johnston <adam.johnston@arm.com>
Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Signed-off-by: Himanshu Sharma <Himanshu.Sharma@arm.com>
Change-Id: I6640c3c8f77afd233304ce9cb06dcf80a8659c16
Change-Id: Ib35fecc57f1d8c496135c18dbebd0be0a4b76041
---
.../ConfigurationManagerDxe/ConfigurationManager.c | 2 +-
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 8 ++++----
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
index 36b5fc9e..e8873200 100644
index b11c0425..44046a00 100644
--- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
+++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
@@ -320,7 +320,7 @@ EDKII_PLATFORM_REPOSITORY_INFO N1sdpRepositoryInfo = {
@@ -37,7 +36,7 @@ index 36b5fc9e..e8873200 100644
FixedPcdGet32 (PcdSerialDbgUartClkInHz), // Clock
EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART // Port subtype
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index 865dd04d..878c8f2f 100644
index d04b22d3..676ab677 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -4,7 +4,7 @@
@@ -45,7 +44,7 @@ index 865dd04d..878c8f2f 100644
# conform to EFI/Framework standards.
#
-# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -62,6 +61,3 @@ index 865dd04d..878c8f2f 100644
# SBSA Watchdog
gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|93
--
2.37.2
meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0004-Silicon-ARM-NeoverseN1Soc-Enable-SCP-QSPI-flash-regi.patch
+57
View File
@@ -0,0 +1,57 @@
From e4b0fced6f3fd3c8ce5ab4d3aae97b880e7e07b0 Mon Sep 17 00:00:00 2001
From: sahil <sahil@arm.com>
Date: Mon, 2 May 2022 17:43:17 +0530
Subject: [PATCH] Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region
Enable SCP QSPI flash region access by adding it in the PlatformLibMem
Upstream-Status: Pending
Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Signed-off-by: sahil <sahil@arm.com>
Change-Id: I3ff832746ca94974ed72309eebe00e0024c47005
---
Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 4 ++++
.../NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 8 +++++++-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 4966011e..c7219136 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -41,6 +41,10 @@
#define NEOVERSEN1SOC_EXP_PERIPH_BASE0 0x1C000000
#define NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ 0x1300000
+// SCP QSPI flash device
+#define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE 0x18000000
+#define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ 0x2000000
+
/*
* Platform information structure stored in Non-secure SRAM. Platform
* information are passed from the trusted firmware with the below structure
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
index 5cacd437..8bb94074 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
@@ -15,7 +15,7 @@
#include <NeoverseN1Soc.h>
// The total number of descriptors, including the final "end-of-table" descriptor.
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 19
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 20
/** A helper function to locate the NtFwConfig PPI and get the base address of
NT_FW_CONFIG DT from which values are obtained using FDT helper functions.
@@ -283,6 +283,12 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Length = NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ;
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+ // SCP QSPI flash device
+ VirtualMemoryTable[++Index].PhysicalBase = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;
+ VirtualMemoryTable[Index].VirtualBase = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;
+ VirtualMemoryTable[Index].Length = NEOVERSEN1SOC_SCP_QSPI_AHB_SZ;
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
if (PlatInfo->MultichipMode == 1) {
//Remote DDR (2GB)
VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdExtMemorySpace) +
meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0005-Platform-ARM-N1Sdp-NOR-flash-library-for-N1Sdp.patch
+119
View File
@@ -0,0 +1,119 @@
From 70e79ba5300f01a13422452c29e26c69042a0c8c Mon Sep 17 00:00:00 2001
From: sahil <sahil@arm.com>
Date: Mon, 2 May 2022 18:50:08 +0530
Subject: [PATCH] Platform/ARM/N1Sdp: NOR flash library for N1Sdp
Add NOR flash library, this library provides APIs for getting the list
of NOR flash devices on the platform.
Upstream-Status: Pending
Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Signed-off-by: sahil <sahil@arm.com>
Change-Id: I39ad4143b7fad7e33b3b151a019a74f23e0ed441
---
.../Library/NorFlashLib/NorFlashLib.c | 52 +++++++++++++++++++
.../Library/NorFlashLib/NorFlashLib.inf | 36 +++++++++++++
2 files changed, 88 insertions(+)
create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
new file mode 100644
index 00000000..eee3d1c6
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
@@ -0,0 +1,52 @@
+/** @file
+ NOR flash lib for N1Sdp
+
+ Copyright (c) 2023, ARM Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/NorFlashPlatformLib.h>
+#include <NeoverseN1Soc.h>
+#include <PiDxe.h>
+
+#define FW_ENV_REGION_BASE FixedPcdGet32 (PcdFlashNvStorageVariableBase)
+#define FW_ENV_REGION_SIZE (FixedPcdGet32 (PcdFlashNvStorageVariableSize) + \
+ FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + \
+ FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize))
+
+STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = {
+ {
+ /// Environment variable region
+ NEOVERSEN1SOC_SCP_QSPI_AHB_BASE, ///< device base
+ FW_ENV_REGION_BASE, ///< region base
+ FW_ENV_REGION_SIZE, ///< region size
+ SIZE_4KB, ///< block size
+ },
+};
+
+/**
+ Get NOR flash region info
+
+ @param[out] NorFlashDevices NOR flash regions info.
+ @param[out] Count number of flash instance.
+
+ @retval EFI_SUCCESS Success.
+**/
+EFI_STATUS
+NorFlashPlatformGetDevices (
+ OUT NOR_FLASH_DESCRIPTION **NorFlashDevices,
+ OUT UINT32 *Count
+ )
+{
+ if ((NorFlashDevices == NULL) || (Count == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ *NorFlashDevices = mNorFlashDevices;
+ *Count = ARRAY_SIZE (mNorFlashDevices);
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
new file mode 100644
index 00000000..784856c8
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
@@ -0,0 +1,36 @@
+## @file
+# NOR flash lib for N1Sdp
+#
+# Copyright (c) 2023, ARM Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = NorFlashN1SdpLib
+ FILE_GUID = 7006fcf1-a585-4272-92e3-b286b1dff5bb
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = NorFlashPlatformLib
+
+[Sources.common]
+ NorFlashLib.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/ARM.dec
+ Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ IoLib
+
+[FixedPcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0006-Platform-ARM-N1Sdp-NOR-flash-Dxe-Driver-for-N1Sdp.patch
+2538
View File
File diff suppressed because it is too large Load Diff
meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0007-Platform-ARM-N1Sdp-Persistent-storage-for-N1Sdp.patch
+88
View File
@@ -0,0 +1,88 @@
From e79fd5cfa3190eb27a9637facc9891cab55b5e09 Mon Sep 17 00:00:00 2001
From: sahil <sahil@arm.com>
Date: Mon, 2 May 2022 19:24:47 +0530
Subject: [PATCH] Platform/ARM/N1Sdp: Persistent storage for N1Sdp
Enable persistent storage on QSPI flash device.
Upstream-Status: Pending
Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Signed-off-by: sahil <sahil@arm.com>
Change-Id: I403113bb885d1d411d433a7f266715d007509a5e
---
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 18 +++++++++++++-----
Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 4 +++-
2 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index 676ab677..80bc875a 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -44,6 +44,9 @@
# file explorer library support
FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+ # NOR flash support
+ NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf
+
[LibraryClasses.common.SEC]
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
@@ -161,11 +164,9 @@
# ACPI Table Version
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
- # Runtime Variable storage
- gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0
- gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE
- gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
- gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800
+ # NOR flash support
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F00000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00020000
################################################################################
#
@@ -197,6 +198,12 @@
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F
}
+ # NOR flash support
+ Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiDxe.inf {
+ <LibraryClasses>
+ NorFlashPlatformLib|Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
+ }
+
# Architectural Protocols
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
@@ -217,6 +224,7 @@
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
<LibraryClasses>
NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+ NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
}
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index e5e24ea5..4329f892 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -1,7 +1,7 @@
## @file
# FDF file of N1Sdp
#
-# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
@@ -140,6 +140,8 @@ READ_LOCK_STATUS = TRUE
INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+ INF Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiDxe.inf
+
INF Platform/ARM/Drivers/BootMonFs/BootMonFs.inf
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0008-Platform-ARM-N1Sdp-Enable-FaultTolerantWrite-Dxe-dri.patch
+50
View File
@@ -0,0 +1,50 @@
From 5e8fbb3ba0f634f7fc873c6577269845f9e243db Mon Sep 17 00:00:00 2001
From: sahil <sahil@arm.com>
Date: Mon, 2 May 2022 19:28:19 +0530
Subject: [PATCH] Platform/ARM/N1Sdp: Enable FaultTolerantWrite Dxe driver for
N1Sdp
Upstream-Status: Pending
Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Signed-off-by: sahil <sahil@arm.com>
Change-Id: If448ad95b2e72cef31ce1e1e5ab2504d607f0545
---
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 5 +++++
Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 1 +
2 files changed, 6 insertions(+)
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index 80bc875a..90a0d5b6 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -165,6 +165,10 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
# NOR flash support
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x18F40000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00020000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x18F20000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00020000
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F00000
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00020000
@@ -227,6 +231,7 @@
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
}
+ MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
# ACPI Support
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index 4329f892..17d370a3 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -90,6 +90,7 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Universal/Metronome/Metronome.inf
INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0009-Platform-ARM-N1Sdp-manually-poll-QSPI-status-bit-aft.patch
+197
View File
@@ -0,0 +1,197 @@
From 6d274379f584a638c1f2b4b8a19014d4baef1d9f Mon Sep 17 00:00:00 2001
From: sahil <sahil@arm.com>
Date: Thu, 11 Aug 2022 11:26:29 +0530
Subject: [PATCH] Platform/ARM/N1Sdp: manually poll QSPI status bit after
erase/write
This patch adds a function to poll Nor flash memory's status register
bit (WIP bit) to wait for an erase/write operation to complete.
The polling timeout is set to 1 second.
Upstream-Status: Pending
Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Signed-off-by: sahil <sahil@arm.com>
Change-Id: Ie678b7586671964ae0f8506a0542d73cbddddfe4
---
.../Drivers/CadenceQspiDxe/CadenceQspiDxe.inf | 1 +
.../Drivers/CadenceQspiDxe/CadenceQspiReg.h | 6 +-
.../N1Sdp/Drivers/CadenceQspiDxe/NorFlash.c | 80 ++++++++++++++++++-
.../N1Sdp/Drivers/CadenceQspiDxe/NorFlash.h | 5 ++
4 files changed, 88 insertions(+), 4 deletions(-)
diff --git a/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiDxe.inf b/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiDxe.inf
index 4f20c3ba..7a39eb2d 100644
--- a/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiDxe.inf
+++ b/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiDxe.inf
@@ -39,6 +39,7 @@
MemoryAllocationLib
NorFlashInfoLib
NorFlashPlatformLib
+ TimerLib
UefiBootServicesTableLib
UefiDriverEntryPoint
UefiLib
diff --git a/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiReg.h b/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiReg.h
index fe3b327c..1971631d 100644
--- a/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiReg.h
+++ b/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiReg.h
@@ -16,13 +16,15 @@
#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BIT_POS 19
#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS 16
#define CDNS_QSPI_FLASH_CMD_CTRL_REG_STATUS_BIT 0x02
-#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_4B 0x03
-#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_3B 0x02
#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS 24
#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE 0x01
#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_BYTE_3B 0x02
#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS 23
#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS 20
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_8C 0x8
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_BIT_POS 7
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(x) ((x - 1) << CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS)
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_ADDR_BYTES(x) ((x - 1) << CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS)
#define CDNS_QSPI_FLASH_CMD_READ_DATA_REG_OFFSET 0xA0
diff --git a/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlash.c b/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlash.c
index 188c75e2..6832351a 100644
--- a/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlash.c
+++ b/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlash.c
@@ -10,6 +10,7 @@
#include <Library/MemoryAllocationLib.h>
#include <Library/NorFlashInfoLib.h>
#include <Library/PcdLib.h>
+#include <Library/TimerLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiLib.h>
@@ -184,6 +185,74 @@ FreeInstance:
return Status;
}
+/**
+ Converts milliseconds into number of ticks of the performance counter.
+
+ @param[in] Milliseconds Milliseconds to convert into ticks.
+
+ @retval Milliseconds expressed as number of ticks.
+
+**/
+STATIC
+UINT64
+MilliSecondsToTicks (
+ IN UINTN Milliseconds
+ )
+{
+ CONST UINT64 NanoSecondsPerTick = GetTimeInNanoSecond (1);
+
+ return (Milliseconds * 1000000) / NanoSecondsPerTick;
+}
+
+/**
+ Poll Status register for NOR flash erase/write completion.
+
+ @param[in] Instance NOR flash Instance.
+
+ @retval EFI_SUCCESS Request is executed successfully.
+ @retval EFI_TIMEOUT Operation timed out.
+ @retval EFI_DEVICE_ERROR Controller operartion failed.
+
+**/
+STATIC
+EFI_STATUS
+NorFlashPollStatusRegister (
+ IN NOR_FLASH_INSTANCE *Instance
+ )
+{
+ BOOLEAN SRegDone;
+ UINT32 val;
+
+ val = SPINOR_OP_RDSR << CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS |
+ CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE << CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS |
+ CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(1) |
+ CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_8C << CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_BIT_POS;
+
+ CONST UINT64 TickOut =
+ GetPerformanceCounter () + MilliSecondsToTicks (SPINOR_SR_WIP_POLL_TIMEOUT_MS);
+
+ do {
+ if (GetPerformanceCounter () > TickOut) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "NorFlashPollStatusRegister: Timeout waiting for erase/write.\n"
+ ));
+ return EFI_TIMEOUT;
+ }
+
+ if (EFI_ERROR (CdnsQspiExecuteCommand (Instance, val))) {
+ return EFI_DEVICE_ERROR;
+ }
+
+ SRegDone =
+ (MmioRead8 (Instance->HostRegisterBaseAddress + CDNS_QSPI_FLASH_CMD_READ_DATA_REG_OFFSET)
+ & SPINOR_SR_WIP) == 0;
+
+ } while (!SRegDone);
+
+ return EFI_SUCCESS;
+}
+
/**
Check whether NOR flash opertions are Locked.
@@ -305,12 +374,16 @@ NorFlashEraseSingleBlock (
DevConfigVal = SPINOR_OP_BE_4K << CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS |
CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_ENABLE << CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BIT_POS |
- CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_3B << CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS;
+ CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_ADDR_BYTES(3);
if (EFI_ERROR (CdnsQspiExecuteCommand (Instance, DevConfigVal))) {
return EFI_DEVICE_ERROR;
}
+ if (EFI_ERROR (NorFlashPollStatusRegister (Instance))) {
+ return EFI_DEVICE_ERROR;
+ }
+
return EFI_SUCCESS;
}
@@ -383,6 +456,9 @@ NorFlashWriteSingleWord (
return EFI_DEVICE_ERROR;
}
MmioWrite32 (WordAddress, WriteData);
+ if (EFI_ERROR (NorFlashPollStatusRegister (Instance))) {
+ return EFI_DEVICE_ERROR;
+ }
return EFI_SUCCESS;
}
@@ -907,7 +983,7 @@ NorFlashReadID (
val = SPINOR_OP_RDID << CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS |
CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE << CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS |
- CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_3B << CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS;
+ CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(3);
if (EFI_ERROR (CdnsQspiExecuteCommand (Instance, val))) {
return EFI_DEVICE_ERROR;
diff --git a/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlash.h b/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlash.h
index e720937e..eb0afc60 100644
--- a/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlash.h
+++ b/Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlash.h
@@ -477,8 +477,13 @@ NorFlashReadID (
OUT UINT8 JedecId[3]
);
+#define SPINOR_SR_WIP BIT0 // Write in progress
+
#define SPINOR_OP_WREN 0x06 // Write enable
#define SPINOR_OP_BE_4K 0x20 // Erase 4KiB block
#define SPINOR_OP_RDID 0x9f // Read JEDEC ID
+#define SPINOR_OP_RDSR 0x05 // Read status register
+
+#define SPINOR_SR_WIP_POLL_TIMEOUT_MS 1000u // Status Register read timeout
#endif /* NOR_FLASH_DXE_H_ */
meta-arm/recipes-bsp/uefi/edk2-firmware_202211.bb
+4
View File
@@ -0,0 +1,4 @@
SRCREV_edk2 ?= "fff6d81270b57ee786ea18ad74f43149b9f03494"
SRCREV_edk2-platforms ?= "982212662c71b6c734b7578526071d6b78da3bcc"
require edk2-firmware.inc