mirror of
https://git.yoctoproject.org/meta-arm
synced 2026-01-12 03:10:15 +00:00
arm-bsp: remove Corstone 700
Corstone 700 is end-of-life, so remove it from meta-arm master. It will remain in the stable branches for existing users, but new users are encouraged to use Corstone 1000 instead. Signed-off-by: Ross Burton <ross.burton@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>
This commit is contained in:
@@ -109,12 +109,6 @@ metrics:
|
||||
corstone500:
|
||||
extends: .build
|
||||
|
||||
corstone700-fvp:
|
||||
extends: .build
|
||||
|
||||
corstone700-mps3:
|
||||
extends: .build
|
||||
|
||||
corstone1000-fvp:
|
||||
extends: .build
|
||||
|
||||
|
||||
@@ -1,10 +0,0 @@
|
||||
header:
|
||||
version: 11
|
||||
includes:
|
||||
- ci/base.yml
|
||||
|
||||
machine: corstone700-fvp
|
||||
|
||||
local_conf_header:
|
||||
image: |
|
||||
CORE_IMAGE_EXTRA_INSTALL = "corstone700-test-app"
|
||||
@@ -1,6 +0,0 @@
|
||||
header:
|
||||
version: 11
|
||||
includes:
|
||||
- ci/corstone700-fvp.yml
|
||||
|
||||
machine: corstone700-mps3
|
||||
@@ -16,6 +16,5 @@ target:
|
||||
- nativesdk-fvp-n1-edge
|
||||
- nativesdk-fvp-sgi575
|
||||
- nativesdk-fvp-corstone500
|
||||
- nativesdk-fvp-corstone700
|
||||
- nativesdk-fvp-corstone1000
|
||||
- nativesdk-fvp-tc0
|
||||
|
||||
@@ -1,12 +0,0 @@
|
||||
#@TYPE: Machine
|
||||
#@NAME: corstone700-fvp machine
|
||||
#@DESCRIPTION: Machine configuration for Corstone700 FVP
|
||||
|
||||
require conf/machine/include/corstone700.inc
|
||||
|
||||
# default feature used: eth_lan91c111
|
||||
# add the following line to local.conf to disable the feature:
|
||||
# MACHINE_FEATURES:remove = "eth_lan91c111"
|
||||
MACHINE_FEATURES += "eth_lan91c111"
|
||||
|
||||
TFA_TARGET_PLATFORM = "fvp"
|
||||
@@ -1,17 +0,0 @@
|
||||
#@TYPE: Machine
|
||||
#@NAME: corstone700-mps3 machine
|
||||
#@DESCRIPTION: Machine configuration for Corstone700 MPS3
|
||||
|
||||
require conf/machine/include/corstone700.inc
|
||||
|
||||
# default feature used: eth_lan9115
|
||||
# add the following line to local.conf to disable the feature:
|
||||
# MACHINE_FEATURES:remove = "eth_lan9115"
|
||||
MACHINE_FEATURES += "eth_lan9115"
|
||||
|
||||
# default feature used: usb_host
|
||||
# add the following line to local.conf to disable the feature:
|
||||
# MACHINE_FEATURES:remove = "usb_host"
|
||||
MACHINE_FEATURES += "usb_host"
|
||||
|
||||
TFA_TARGET_PLATFORM = "fpga"
|
||||
@@ -1,32 +0,0 @@
|
||||
# Common configuration for all Corstone700 machines
|
||||
|
||||
require conf/machine/include/arm/armv8a/tune-cortexa32.inc
|
||||
|
||||
MACHINEOVERRIDES =. "corstone700:"
|
||||
|
||||
TFA_PLATFORM = "corstone700"
|
||||
|
||||
SERIAL_CONSOLES ?= "115200;ttyAMA0"
|
||||
|
||||
PREFERRED_PROVIDER_virtual/kernel = "linux-yocto"
|
||||
PREFERRED_VERSION_linux-yocto ?= "5.6%"
|
||||
|
||||
PREFERRED_VERSION_gcc-arm-none-eabi-native ?= "9-2020-q2-update"
|
||||
|
||||
PREFERRED_PROVIDER_virtual/control-processor-firmware ?= "boot-firmware"
|
||||
|
||||
EXTRA_IMAGEDEPENDS += " \
|
||||
trusted-firmware-a \
|
||||
external-system \
|
||||
u-boot \
|
||||
virtual/control-processor-firmware \
|
||||
"
|
||||
|
||||
WKS_FILE_DEPENDS:append = " ${EXTRA_IMAGEDEPENDS}"
|
||||
|
||||
WKS_FILE ?= "arm-reference-image.corstone700.wks"
|
||||
|
||||
VIRTUAL-RUNTIME_dev_manager = "busybox-mdev"
|
||||
|
||||
UBOOT_MACHINE ?= "corstone700_defconfig"
|
||||
PREFERRED_VERSION_u-boot ?= "2020.04"
|
||||
@@ -1,21 +0,0 @@
|
||||
# Corstone-700
|
||||
|
||||
## Overview
|
||||
|
||||
Corstone-700 is a flexible compute architecture combining Cortex-A and Cortex-M
|
||||
processors and a secure enclave, aimed at building secure IoT SoCs. There are
|
||||
machines for both Corstone-700 for Fixed Virtual Platform (`corstone700-fvp`)
|
||||
and Corstone-700 for MPS3 FPGA (`corstone700-mps3`).
|
||||
|
||||
Further details are available in the [User Guide].
|
||||
|
||||
## Building
|
||||
|
||||
Corstone-700 is tested in 'tiny' configurations, such as `DISTRO="poky-tiny"`.
|
||||
|
||||
## Running
|
||||
|
||||
For detailed instructions as to how to run the image in a FVP model, or on the
|
||||
MPS3 board, see the [User Guide].
|
||||
|
||||
[User Guide]: https://git.linaro.org/landing-teams/working/arm/arm-reference-platforms.git/about/docs/corstone-700/user-guide.rst
|
||||
@@ -1,66 +0,0 @@
|
||||
Upstream-Status: Pending
|
||||
Signed-off-by: Ross Burton <ross.burton@arm.com>
|
||||
|
||||
From 34e1c04534607f5605255f39fb46e26261fc9c4e Mon Sep 17 00:00:00 2001
|
||||
From: Ross Burton <ross.burton@arm.com>
|
||||
Date: Tue, 8 Sep 2020 11:49:08 +0100
|
||||
Subject: [PATCH] tools/gen_module_code: atomically rewrite the generated files
|
||||
|
||||
The gen_module rule in rules.mk is marked as .PHONY, so make will
|
||||
execute it whenever it is mentioned. This results in gen_module_code
|
||||
being executed 64 times for a Juno build.
|
||||
|
||||
However in heavily parallel builds there's a good chance that
|
||||
gen_module_code is writing a file whilst the compiler is reading it
|
||||
because make also doesn't know what files are generated by
|
||||
gen_module_code.
|
||||
|
||||
The correct fix is to adjust the Makefiles so that the dependencies are
|
||||
correct but this isn't trivial, so band-aid the problem by atomically
|
||||
writing the generated files.
|
||||
|
||||
Change-Id: I82d44f9ea6537a91002e1f80de8861d208571630
|
||||
Signed-off-by: Ross Burton <ross.burton@arm.com>
|
||||
---
|
||||
tools/gen_module_code.py | 19 ++++++++++++++-----
|
||||
1 file changed, 14 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/tools/gen_module_code.py b/tools/gen_module_code.py
|
||||
index 7b3953845..ee099b713 100755
|
||||
--- a/tools/gen_module_code.py
|
||||
+++ b/tools/gen_module_code.py
|
||||
@@ -17,6 +17,7 @@
|
||||
import argparse
|
||||
import os
|
||||
import sys
|
||||
+import tempfile
|
||||
|
||||
DEFAULT_PATH = 'build/'
|
||||
|
||||
@@ -53,13 +54,21 @@
|
||||
|
||||
def generate_file(path, filename, content):
|
||||
full_filename = os.path.join(path, filename)
|
||||
- with open(full_filename, 'a+') as f:
|
||||
- f.seek(0)
|
||||
- if f.read() != content:
|
||||
+
|
||||
+ try:
|
||||
+ with open(full_filename) as f:
|
||||
+ rewrite = f.read() != content
|
||||
+ except FileNotFoundError:
|
||||
+ rewrite = True
|
||||
+
|
||||
+ if rewrite:
|
||||
+ with tempfile.NamedTemporaryFile(prefix="gen-module-code",
|
||||
+ dir=path,
|
||||
+ delete=False,
|
||||
+ mode="wt") as f:
|
||||
print("[GEN] {}...".format(full_filename))
|
||||
- f.seek(0)
|
||||
- f.truncate()
|
||||
f.write(content)
|
||||
+ os.replace(f.name, full_filename)
|
||||
|
||||
|
||||
def generate_header(path, modules):
|
||||
@@ -1,62 +0,0 @@
|
||||
SUMMARY = "Boot Processor firmware for Corstone700"
|
||||
DESCRIPTION = "Boot Processor firmware"
|
||||
|
||||
LICENSE = "BSD-3-Clause & Apache-2.0"
|
||||
LIC_FILES_CHKSUM = "file://license.md;md5=e44b2531cd6ffe9dece394dbe988d9a0 \
|
||||
file://cmsis/LICENSE.txt;md5=e3fc50a88d0a364313df4b21ef20c29e"
|
||||
|
||||
SRC_URI = "gitsm://git.linaro.org/landing-teams/working/arm/boot-firmware.git;protocol=https;branch=master \
|
||||
file://gen-module-race.patch"
|
||||
SRCREV = "af7eeb1bb8c5a85a5e5a76d48acc6fe864d715a9"
|
||||
PV = "2020.02.10+git${SRCPV}"
|
||||
|
||||
PROVIDES += "virtual/control-processor-firmware"
|
||||
|
||||
DEPENDS = "virtual/arm-none-eabi-gcc-native trusted-firmware-a"
|
||||
|
||||
inherit deploy
|
||||
|
||||
B = "${WORKDIR}/build"
|
||||
S = "${WORKDIR}/git"
|
||||
|
||||
PACKAGE_ARCH = "${MACHINE_ARCH}"
|
||||
COMPATIBLE_MACHINE = "(corstone700-*)"
|
||||
SCP_PLATFORM = "corstone-700"
|
||||
|
||||
LDFLAGS[unexport] = "1"
|
||||
|
||||
do_configure[noexec] = "1"
|
||||
|
||||
EXTRA_OEMAKE = "PRODUCT='${SCP_PLATFORM}' \
|
||||
BUILD_PATH=${B} \
|
||||
CROSS_COMPILE='arm-none-eabi-' \
|
||||
V=y \
|
||||
"
|
||||
|
||||
do_compile() {
|
||||
oe_runmake -C ${S}/tools/spitoc CC=${BUILD_CC} all
|
||||
oe_runmake -C ${S}
|
||||
}
|
||||
do_compile[cleandirs] += "${B}"
|
||||
|
||||
do_install() {
|
||||
install -D -p -m 0644 ${B}/product/${SCP_PLATFORM}/se_ramfw/release/bin/firmware.bin ${D}/firmware/se_ramfw.bin
|
||||
install -D -p -m 0644 ${B}/product/${SCP_PLATFORM}/se_romfw/release/bin/firmware.bin ${D}/firmware/se_romfw.bin
|
||||
${S}/tools/spitoc/spitoc \
|
||||
--seram ${D}/firmware/se_ramfw.bin \
|
||||
--offset 1 \
|
||||
--fip ${RECIPE_SYSROOT}/firmware/fip.bin-${TFA_PLATFORM} \
|
||||
--offset 33 \
|
||||
--out ${D}/firmware/spitoc.bin
|
||||
}
|
||||
|
||||
FILES:${PN} = "/firmware"
|
||||
SYSROOT_DIRS += "/firmware"
|
||||
# Skip QA check for relocations in .text of elf binaries
|
||||
INSANE_SKIP:${PN} = "textrel"
|
||||
|
||||
do_deploy() {
|
||||
# Copy the images to deploy directory
|
||||
cp -rf ${D}/firmware/* ${DEPLOYDIR}/
|
||||
}
|
||||
addtask deploy after do_install
|
||||
@@ -1,45 +0,0 @@
|
||||
SUMMARY = "External system Cortex-M3 Firmware"
|
||||
DESCRIPTION = "Firmware to be loaded and run in External System Harness in\
|
||||
support to the main application CPU."
|
||||
HOMEPAGE = "https://git.linaro.org/landing-teams/working/arm/external-system.git"
|
||||
DEPENDS = "gcc-arm-none-eabi-native"
|
||||
LICENSE = "BSD-3-Clause"
|
||||
LIC_FILES_CHKSUM = "file://license.md;md5=e44b2531cd6ffe9dece394dbe988d9a0"
|
||||
|
||||
SRC_URI = "gitsm://git.linaro.org/landing-teams/working/arm/external-system.git;protocol=https;branch=master"
|
||||
SRCREV = "41ef76951c5119729c1ea305406f74776da90866"
|
||||
PV .= "~git${SRCPV}"
|
||||
|
||||
COMPATIBLE_MACHINE = "(corstone700-*)"
|
||||
|
||||
# PRODUCT is passed to the Makefile to specify the platform to be used
|
||||
PRODUCT = "corstone-700"
|
||||
|
||||
S = "${WORKDIR}/git"
|
||||
B = "${WORKDIR}/build"
|
||||
|
||||
LDFLAGS[unexport] = "1"
|
||||
|
||||
do_compile() {
|
||||
oe_runmake -C ${S} V=y \
|
||||
BUILD_PATH=${B} \
|
||||
PRODUCT=${PRODUCT} \
|
||||
CROSS_COMPILE=arm-none-eabi- \
|
||||
all
|
||||
}
|
||||
|
||||
do_compile[cleandirs] = "${B}"
|
||||
|
||||
do_install() {
|
||||
install -D -p -m 0644 ${B}/product/${PRODUCT}/firmware/release/bin/firmware.bin ${D}/firmware/es_flashfw.bin
|
||||
}
|
||||
|
||||
FILES:${PN} = "/firmware"
|
||||
SYSROOT_DIRS += "/firmware"
|
||||
|
||||
inherit deploy
|
||||
|
||||
do_deploy() {
|
||||
cp -rf ${D}/firmware/* ${DEPLOYDIR}/
|
||||
}
|
||||
addtask deploy after do_install
|
||||
@@ -1,18 +0,0 @@
|
||||
# Corstone700 machines specific TFA support
|
||||
|
||||
COMPATIBLE_MACHINE = "(corstone700-*)"
|
||||
|
||||
TFA_DEBUG = "1"
|
||||
TFA_UBOOT = "1"
|
||||
TFA_BUILD_TARGET = "all fip"
|
||||
TFA_INSTALL_TARGET = "fip.bin"
|
||||
|
||||
EXTRA_OEMAKE:append = " \
|
||||
ARCH=aarch32 \
|
||||
TARGET_PLATFORM=${TFA_TARGET_PLATFORM} \
|
||||
AARCH32_SP=sp_min \
|
||||
ARM_LINUX_KERNEL_AS_BL33=0 \
|
||||
RESET_TO_SP_MIN=1 \
|
||||
ENABLE_PIE=1 \
|
||||
ARM_PRELOADED_DTB_BASE=0x80400000 \
|
||||
"
|
||||
@@ -2,7 +2,6 @@
|
||||
|
||||
MACHINE_TFA_REQUIRE ?= ""
|
||||
MACHINE_TFA_REQUIRE:corstone500 = "trusted-firmware-a-corstone500.inc"
|
||||
MACHINE_TFA_REQUIRE:corstone700 = "trusted-firmware-a-corstone700.inc"
|
||||
MACHINE_TFA_REQUIRE:corstone1000 = "trusted-firmware-a-corstone1000.inc"
|
||||
MACHINE_TFA_REQUIRE:fvp-base = "trusted-firmware-a-fvp.inc"
|
||||
MACHINE_TFA_REQUIRE:fvp-base-arm32 = "trusted-firmware-a-fvp-arm32.inc"
|
||||
|
||||
@@ -1,268 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From 4b33e25ebb708faa987c903c1bbc70f6752ad543 Mon Sep 17 00:00:00 2001
|
||||
From: Rui Silva <rui.silva@linaro.org>
|
||||
Date: Thu, 13 Aug 2020 12:23:47 +0100
|
||||
Subject: [PATCH] arm: Add corstone700 platform
|
||||
|
||||
Add support to the new Arm corstone700 platform family.
|
||||
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
---
|
||||
arch/arm/Kconfig | 7 +++
|
||||
board/armltd/corstone700/Kconfig | 12 ++++
|
||||
board/armltd/corstone700/Makefile | 8 +++
|
||||
board/armltd/corstone700/corstone700.c | 49 ++++++++++++++++
|
||||
configs/corstone700_defconfig | 37 ++++++++++++
|
||||
include/configs/corstone700.h | 78 ++++++++++++++++++++++++++
|
||||
6 files changed, 191 insertions(+)
|
||||
create mode 100644 board/armltd/corstone700/Kconfig
|
||||
create mode 100644 board/armltd/corstone700/Makefile
|
||||
create mode 100644 board/armltd/corstone700/corstone700.c
|
||||
create mode 100644 configs/corstone700_defconfig
|
||||
create mode 100644 include/configs/corstone700.h
|
||||
|
||||
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
|
||||
index bbb1e2738b..ab2d246e29 100644
|
||||
--- a/arch/arm/Kconfig
|
||||
+++ b/arch/arm/Kconfig
|
||||
@@ -636,6 +636,12 @@ config ARCH_BCM6858
|
||||
select OF_CONTROL
|
||||
imply CMD_DM
|
||||
|
||||
+config TARGET_CORSTONE700
|
||||
+ bool "Support Corstone700"
|
||||
+ select CPU_V7A
|
||||
+ select SEMIHOSTING
|
||||
+ select PL01X_SERIAL
|
||||
+
|
||||
config TARGET_VEXPRESS_CA15_TC2
|
||||
bool "Support vexpress_ca15_tc2"
|
||||
select CPU_V7A
|
||||
@@ -1820,6 +1826,7 @@ source "board/Marvell/gplugd/Kconfig"
|
||||
source "board/armadeus/apf27/Kconfig"
|
||||
source "board/armltd/vexpress/Kconfig"
|
||||
source "board/armltd/vexpress64/Kconfig"
|
||||
+source "board/armltd/corstone700/Kconfig"
|
||||
source "board/cortina/presidio-asic/Kconfig"
|
||||
source "board/broadcom/bcm23550_w1d/Kconfig"
|
||||
source "board/broadcom/bcm28155_ap/Kconfig"
|
||||
diff --git a/board/armltd/corstone700/Kconfig b/board/armltd/corstone700/Kconfig
|
||||
new file mode 100644
|
||||
index 0000000000..ae625d96ad
|
||||
--- /dev/null
|
||||
+++ b/board/armltd/corstone700/Kconfig
|
||||
@@ -0,0 +1,12 @@
|
||||
+if TARGET_CORSTONE700
|
||||
+
|
||||
+config SYS_BOARD
|
||||
+ default "corstone700"
|
||||
+
|
||||
+config SYS_VENDOR
|
||||
+ default "armltd"
|
||||
+
|
||||
+config SYS_CONFIG_NAME
|
||||
+ default "corstone700"
|
||||
+
|
||||
+endif
|
||||
diff --git a/board/armltd/corstone700/Makefile b/board/armltd/corstone700/Makefile
|
||||
new file mode 100644
|
||||
index 0000000000..4f38135612
|
||||
--- /dev/null
|
||||
+++ b/board/armltd/corstone700/Makefile
|
||||
@@ -0,0 +1,8 @@
|
||||
+# SPDX-License-Identifier: GPL-2.0+
|
||||
+#
|
||||
+# (C) Copyright 2020 ARM Limited
|
||||
+# (C) Copyright 2020 Linaro
|
||||
+# Rui Miguel Silva <rui.silva@linaro.org>
|
||||
+#
|
||||
+
|
||||
+obj-y := corstone700.o
|
||||
diff --git a/board/armltd/corstone700/corstone700.c b/board/armltd/corstone700/corstone700.c
|
||||
new file mode 100644
|
||||
index 0000000000..b6f3e660a8
|
||||
--- /dev/null
|
||||
+++ b/board/armltd/corstone700/corstone700.c
|
||||
@@ -0,0 +1,49 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0+
|
||||
+/*
|
||||
+ * (C) Copyright 2020 ARM Limited
|
||||
+ * (C) Copyright 2020 Linaro
|
||||
+ * Rui Miguel Silva <rui.silva@linaro.org>
|
||||
+ */
|
||||
+
|
||||
+#include <common.h>
|
||||
+#include <dm.h>
|
||||
+#include <dm/platform_data/serial_pl01x.h>
|
||||
+#include <malloc.h>
|
||||
+
|
||||
+DECLARE_GLOBAL_DATA_PTR;
|
||||
+
|
||||
+static const struct pl01x_serial_platdata serial_platdata = {
|
||||
+ .base = V2M_UART0,
|
||||
+ .type = TYPE_PL011,
|
||||
+ .clock = CONFIG_PL011_CLOCK,
|
||||
+};
|
||||
+
|
||||
+U_BOOT_DEVICE(corstone700_serials) = {
|
||||
+ .name = "serial_pl01x",
|
||||
+ .platdata = &serial_platdata,
|
||||
+};
|
||||
+
|
||||
+int board_init(void)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+int dram_init(void)
|
||||
+{
|
||||
+ gd->ram_size = PHYS_SDRAM_1_SIZE;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+int dram_init_banksize(void)
|
||||
+{
|
||||
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
|
||||
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+void reset_cpu(ulong addr)
|
||||
+{
|
||||
+}
|
||||
+
|
||||
diff --git a/configs/corstone700_defconfig b/configs/corstone700_defconfig
|
||||
new file mode 100644
|
||||
index 0000000000..ee29a1eabf
|
||||
--- /dev/null
|
||||
+++ b/configs/corstone700_defconfig
|
||||
@@ -0,0 +1,37 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_ARM64_SUPPORT_AARCH32=y
|
||||
+CONFIG_TARGET_CORSTONE700=y
|
||||
+CONFIG_SYS_TEXT_BASE=0x02100000
|
||||
+CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
+CONFIG_NR_DRAM_BANKS=1
|
||||
+CONFIG_IDENT_STRING=" corstone700 aarch32"
|
||||
+CONFIG_BOOTDELAY=3
|
||||
+CONFIG_USE_BOOTARGS=y
|
||||
+CONFIG_BOOTARGS="console=ttyAMA0 loglevel=9"
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
+CONFIG_HUSH_PARSER=y
|
||||
+CONFIG_SYS_PROMPT="corstone700# "
|
||||
+# CONFIG_CMD_CONSOLE is not set
|
||||
+CONFIG_CMD_BOOTZ=y
|
||||
+CONFIG_CMD_BOOTM=y
|
||||
+# CONFIG_CMD_XIMG is not set
|
||||
+# CONFIG_CMD_EDITENV is not set
|
||||
+# CONFIG_CMD_ENV_EXISTS is not set
|
||||
+# CONFIG_CMD_ARMFLASH=y
|
||||
+# CONFIG_CMD_LOADS is not set
|
||||
+# CONFIG_CMD_ITEST is not set
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_CMD_DHCP=y
|
||||
+# CONFIG_CMD_NFS is not set
|
||||
+CONFIG_CMD_MII=y
|
||||
+CONFIG_CMD_PING=y
|
||||
+CONFIG_CMD_CACHE=y
|
||||
+# CONFIG_CMD_MISC is not set
|
||||
+CONFIG_CMD_FAT=y
|
||||
+CONFIG_DM=y
|
||||
+# CONFIG_MMC is not set
|
||||
+# CONFIG_MTD_NOR_FLASH=y
|
||||
+CONFIG_DM_ETH=y
|
||||
+CONFIG_DM_SERIAL=y
|
||||
+CONFIG_OF_LIBFDT=y
|
||||
diff --git a/include/configs/corstone700.h b/include/configs/corstone700.h
|
||||
new file mode 100644
|
||||
index 0000000000..32238e4057
|
||||
--- /dev/null
|
||||
+++ b/include/configs/corstone700.h
|
||||
@@ -0,0 +1,78 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
+/*
|
||||
+ * (C) Copyright 2020 ARM Limited
|
||||
+ * (C) Copyright 2020 Linaro
|
||||
+ * Rui Miguel Silva <rui.silva@linaro.org>
|
||||
+ *
|
||||
+ * Configuration for Corstone700. Parts were derived from other ARM
|
||||
+ * configurations.
|
||||
+ */
|
||||
+
|
||||
+#ifndef __CORSTONE700_H
|
||||
+#define __CORSTONE700_H
|
||||
+
|
||||
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
|
||||
+#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
+
|
||||
+#define CONFIG_SYS_HZ_CLOCK 320000000
|
||||
+#define CONFIG_SYS_HZ 1000
|
||||
+
|
||||
+#define V2M_SRAM0 0x02000000
|
||||
+#define V2M_QSPI 0x08000000
|
||||
+
|
||||
+#define V2M_DEBUG 0x10000000
|
||||
+#define V2M_BASE_PERIPH 0x1A000000
|
||||
+
|
||||
+#define V2M_BASE 0x80000000
|
||||
+
|
||||
+#define V2M_PERIPH_OFFSET(x) (x << 16)
|
||||
+
|
||||
+#define V2M_SYSID (V2M_BASE_PERIPH)
|
||||
+#define V2M_SYSCTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(1))
|
||||
+
|
||||
+#define V2M_COUNTER_CTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(32))
|
||||
+#define V2M_COUNTER_READ (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(33))
|
||||
+
|
||||
+#define V2M_TIMER_CTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(34))
|
||||
+#define V2M_TIMER_BASE0 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(35))
|
||||
+
|
||||
+#define V2M_UART0 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(81))
|
||||
+#define V2M_UART1 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(82))
|
||||
+
|
||||
+#define CONFIG_SYS_MMIO_TIMER
|
||||
+
|
||||
+#define CONFIG_PL011_CLOCK 32000000
|
||||
+
|
||||
+/* Physical Memory Map */
|
||||
+#define PHYS_SDRAM_1 (V2M_BASE)
|
||||
+#define PHYS_SDRAM_2 (V2M_QSPI)
|
||||
+
|
||||
+/* Top 16MB reserved for secure world use (maybe not needed) */
|
||||
+#define DRAM_SEC_SIZE 0x01000000
|
||||
+#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
|
||||
+
|
||||
+#define PHYS_SDRAM_2_SIZE 0x02000000
|
||||
+
|
||||
+/* Size of malloc() pool */
|
||||
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
|
||||
+
|
||||
+/* Miscellaneous configurable options */
|
||||
+#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
|
||||
+
|
||||
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||
+
|
||||
+/* Monitor Command Prompt */
|
||||
+#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
|
||||
+#define CONFIG_SYS_MAXARGS 64 /* max command args */
|
||||
+
|
||||
+#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
+ "kernel_name=zImage\0" \
|
||||
+ "kernel_addr_r=0x80000000\0" \
|
||||
+ "fdt_name=devtree.dtb\0" \
|
||||
+ "fdt_addr_r=0x82000000\0" \
|
||||
+ "fdt_high=0xffffffff\0"
|
||||
+
|
||||
+#define CONFIG_BOOTCOMMAND "echo Booting Kernel...;" \
|
||||
+ "bootz $kernel_addr_r - $fdt_addr_r"
|
||||
+
|
||||
+#endif
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,136 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From 42d975e5be4435799fb2cf2af48b4dd90aa637f0 Mon Sep 17 00:00:00 2001
|
||||
From: Rui Silva <rui.silva@linaro.org>
|
||||
Date: Wed, 5 Aug 2020 19:03:30 +0100
|
||||
Subject: [PATCH 4/6] boot: add bootx command to start XiP images
|
||||
|
||||
Add boot command that will jump to xip kernel entries.
|
||||
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
cmd/Kconfig | 8 ++++-
|
||||
cmd/Makefile | 1 +
|
||||
cmd/bootx.c | 58 +++++++++++++++++++++++++++++++++++
|
||||
configs/corstone700_defconfig | 1 +
|
||||
4 files changed, 67 insertions(+), 1 deletion(-)
|
||||
create mode 100644 cmd/bootx.c
|
||||
|
||||
diff --git a/cmd/Kconfig b/cmd/Kconfig
|
||||
index 6403bc45a5..c974f6b33d 100644
|
||||
--- a/cmd/Kconfig
|
||||
+++ b/cmd/Kconfig
|
||||
@@ -285,6 +285,12 @@ config CMD_BOOTZ
|
||||
help
|
||||
Boot the Linux zImage
|
||||
|
||||
+config CMD_BOOTX
|
||||
+ bool "Support booting XiP Kernel Image"
|
||||
+ default y
|
||||
+ help
|
||||
+ The bootx command is used to boot an XIP kernel.
|
||||
+
|
||||
config CMD_BOOTI
|
||||
bool "booti"
|
||||
depends on ARM64 || RISCV
|
||||
@@ -294,7 +300,7 @@ config CMD_BOOTI
|
||||
|
||||
config BOOTM_LINUX
|
||||
bool "Support booting Linux OS images"
|
||||
- depends on CMD_BOOTM || CMD_BOOTZ || CMD_BOOTI
|
||||
+ depends on CMD_BOOTM || CMD_BOOTZ || CMD_BOOTI || CMD_BOOTX
|
||||
default y
|
||||
help
|
||||
Support booting the Linux kernel directly via a command such as bootm
|
||||
diff --git a/cmd/Makefile b/cmd/Makefile
|
||||
index f1dd513a4b..ce75b6112c 100644
|
||||
--- a/cmd/Makefile
|
||||
+++ b/cmd/Makefile
|
||||
@@ -28,6 +28,7 @@ obj-$(CONFIG_CMD_BOOTCOUNT) += bootcount.o
|
||||
obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
|
||||
obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
|
||||
obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o
|
||||
+obj-$(CONFIG_CMD_BOOTX) += bootx.o
|
||||
obj-$(CONFIG_CMD_BOOTZ) += bootz.o
|
||||
obj-$(CONFIG_CMD_BOOTI) += booti.o
|
||||
obj-$(CONFIG_CMD_BTRFS) += btrfs.o
|
||||
diff --git a/cmd/bootx.c b/cmd/bootx.c
|
||||
new file mode 100644
|
||||
index 0000000000..b6e06eab3f
|
||||
--- /dev/null
|
||||
+++ b/cmd/bootx.c
|
||||
@@ -0,0 +1,58 @@
|
||||
+/*
|
||||
+ * Copyright (C) 2017 Renesas Electronics
|
||||
+ * Copyright (C) 2017 Chris Brandt
|
||||
+ *
|
||||
+ * SPDX-License-Identifier: GPL-2.0+
|
||||
+ */
|
||||
+
|
||||
+ #include <common.h>
|
||||
+
|
||||
+/* XIP Kernel boot */
|
||||
+int do_bootx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
||||
+{
|
||||
+ ulong machid = 0xFFFFFFFF; /* Device Tree Boot */
|
||||
+ void (*kernel_entry)(int zero, int arch, uint params);
|
||||
+ ulong r2;
|
||||
+ ulong img_addr;
|
||||
+ char *endp;
|
||||
+
|
||||
+ /* need at least two arguments */
|
||||
+ if (argc < 2)
|
||||
+ goto usage;
|
||||
+
|
||||
+ img_addr = simple_strtoul(argv[1], &endp, 16);
|
||||
+ kernel_entry = (void (*)(int, int, uint))img_addr;
|
||||
+
|
||||
+#ifdef CONFIG_USB_DEVICE
|
||||
+ udc_disconnect();
|
||||
+#endif
|
||||
+ cleanup_before_linux();
|
||||
+
|
||||
+ r2 = simple_strtoul(argv[2], NULL, 16);
|
||||
+
|
||||
+ /* The kernel expects the following when booting:
|
||||
+ * r0 - 0
|
||||
+ * r1 - machine type
|
||||
+ * r2 - boot data (atags/dt) pointer
|
||||
+ *
|
||||
+ * For more info, refer to:
|
||||
+ * https://www.kernel.org/doc/Documentation/arm/Booting
|
||||
+ */
|
||||
+
|
||||
+ printf("Booting Linux...\n");
|
||||
+
|
||||
+ kernel_entry(0, machid, r2);
|
||||
+
|
||||
+ return 0;
|
||||
+
|
||||
+usage:
|
||||
+ return CMD_RET_USAGE;
|
||||
+}
|
||||
+static char bootx_help_text[] =
|
||||
+ "x_addr dt_addr\n - boot XIP kernel in Flash\n"
|
||||
+ "\t x_addr: Address of XIP kernel in Flash\n"
|
||||
+ "\tdt_addr: Address of Device Tree blob image";
|
||||
+U_BOOT_CMD(
|
||||
+ bootx, CONFIG_SYS_MAXARGS, 1, do_bootx,
|
||||
+ "boot XIP kernel in Flash", bootx_help_text
|
||||
+)
|
||||
diff --git a/configs/corstone700_defconfig b/configs/corstone700_defconfig
|
||||
index ee29a1eabf..655af3f058 100644
|
||||
--- a/configs/corstone700_defconfig
|
||||
+++ b/configs/corstone700_defconfig
|
||||
@@ -14,6 +14,7 @@ CONFIG_HUSH_PARSER=y
|
||||
CONFIG_SYS_PROMPT="corstone700# "
|
||||
# CONFIG_CMD_CONSOLE is not set
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
+CONFIG_CMD_BOOTX=y
|
||||
CONFIG_CMD_BOOTM=y
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_EDITENV is not set
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,39 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From 9f4e54e2bc619124602584e0ec8e268ac6f6221e Mon Sep 17 00:00:00 2001
|
||||
From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
Date: Wed, 5 Aug 2020 19:05:08 +0100
|
||||
Subject: [PATCH 5/6] boot: starting the XIP kernel using bootx command
|
||||
|
||||
bootx command is used as the default command to
|
||||
start the XIP kernel
|
||||
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
include/configs/corstone700.h | 7 +++----
|
||||
1 file changed, 3 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/include/configs/corstone700.h b/include/configs/corstone700.h
|
||||
index 32238e4057..cb9ca8af8e 100644
|
||||
--- a/include/configs/corstone700.h
|
||||
+++ b/include/configs/corstone700.h
|
||||
@@ -67,12 +67,11 @@
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"kernel_name=zImage\0" \
|
||||
- "kernel_addr_r=0x80000000\0" \
|
||||
+ "kernel_addr_r=0x08300000\0" \
|
||||
"fdt_name=devtree.dtb\0" \
|
||||
- "fdt_addr_r=0x82000000\0" \
|
||||
+ "fdt_addr_r=0x80400000\0" \
|
||||
"fdt_high=0xffffffff\0"
|
||||
|
||||
-#define CONFIG_BOOTCOMMAND "echo Booting Kernel...;" \
|
||||
- "bootz $kernel_addr_r - $fdt_addr_r"
|
||||
+#define CONFIG_BOOTCOMMAND "bootx $kernel_addr_r $fdt_addr_r"
|
||||
|
||||
#endif
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,61 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From a008f06b49a96dfd98943696ddc10134947fed91 Mon Sep 17 00:00:00 2001
|
||||
From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
Date: Wed, 5 Aug 2020 19:06:16 +0100
|
||||
Subject: [PATCH 6/6] arm: enabling the arch_timer driver
|
||||
|
||||
This patch disables the use of the mmio_timer driver
|
||||
and enables the arch_timer driver.
|
||||
|
||||
The mmio_timer tries a direct access to the Armv8-A CNTFRQ generic timer
|
||||
frequency register through memory mapping. This can not be done because
|
||||
this register is only accessible through memory mapping under a secure
|
||||
mode only. u-boot runs in non secure Hypervisor mode. To read the counter
|
||||
frequency u-boot should use the mrc instruction to read the CNTFRQ system
|
||||
register.
|
||||
|
||||
The arch_timer driver reads the CNTFRQ register using the mrc instruction.
|
||||
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
---
|
||||
configs/corstone700_defconfig | 3 +++
|
||||
include/configs/corstone700.h | 3 ---
|
||||
2 files changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/configs/corstone700_defconfig b/configs/corstone700_defconfig
|
||||
index 655af3f058..58e03db044 100644
|
||||
--- a/configs/corstone700_defconfig
|
||||
+++ b/configs/corstone700_defconfig
|
||||
@@ -36,3 +36,6 @@ CONFIG_DM=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
+# CONFIG_SYS_HZ_CLOCK is not set
|
||||
+# CONFIG_SYS_MMIO_TIMER is not set
|
||||
+CONFIG_SYS_ARCH_TIMER=y
|
||||
diff --git a/include/configs/corstone700.h b/include/configs/corstone700.h
|
||||
index cb9ca8af8e..0fb606f1ed 100644
|
||||
--- a/include/configs/corstone700.h
|
||||
+++ b/include/configs/corstone700.h
|
||||
@@ -14,7 +14,6 @@
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
|
||||
-#define CONFIG_SYS_HZ_CLOCK 320000000
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define V2M_SRAM0 0x02000000
|
||||
@@ -39,8 +38,6 @@
|
||||
#define V2M_UART0 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(81))
|
||||
#define V2M_UART1 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(82))
|
||||
|
||||
-#define CONFIG_SYS_MMIO_TIMER
|
||||
-
|
||||
#define CONFIG_PL011_CLOCK 32000000
|
||||
|
||||
/* Physical Memory Map */
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,8 +0,0 @@
|
||||
#
|
||||
# Corstone700 KMACHINE
|
||||
#
|
||||
FILESEXTRAPATHS:prepend:corstone700 := "${THISDIR}/${BP}/corstone700:"
|
||||
SRC_URI:append:corstone700 = " file://0001-arm-Add-corstone700-platform.patch \
|
||||
file://0002-boot-add-bootx-command-to-start-XiP-images.patch \
|
||||
file://0003-boot-starting-the-XIP-kernel-using-bootx-command.patch \
|
||||
file://0004-arm-enabling-the-arch_timer-driver.patch"
|
||||
@@ -1,6 +0,0 @@
|
||||
define KMACHINE corstone700
|
||||
define KTYPE standard
|
||||
define KARCH arm
|
||||
|
||||
kconf hardware corstone700/base.cfg
|
||||
kconf hardware corstone700/xip.cfg
|
||||
@@ -1,35 +0,0 @@
|
||||
CONFIG_LOCALVERSION="-yocto-standard"
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_LOG_BUF_SHIFT=12
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_PID_NS is not set
|
||||
# CONFIG_NET_NS is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_ARM_SINGLE_ARMV7A=y
|
||||
CONFIG_ARCH_TINY_VEXPRESS=y
|
||||
CONFIG_HAVE_ARM_ARCH_TIMER=y
|
||||
CONFIG_THUMB2_KERNEL=y
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_VFP=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_EXTSYS_CTRL=y
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_SERIO_SERPORT is not set
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_PL031=y
|
||||
CONFIG_MAILBOX=y
|
||||
CONFIG_ARM_MHUv2=y
|
||||
CONFIG_RPMSG_CHAR=y
|
||||
CONFIG_RPMSG_ARM=y
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
@@ -1,4 +0,0 @@
|
||||
define KFEATURE_DESCRIPTION "Ethernet feature using lan9115"
|
||||
|
||||
kconf hardware pnp.cfg
|
||||
kconf hardware lan9115.cfg
|
||||
@@ -1,4 +0,0 @@
|
||||
define KFEATURE_DESCRIPTION "Ethernet feature using lan91c111"
|
||||
|
||||
kconf hardware pnp.cfg
|
||||
kconf hardware lan91c111.cfg
|
||||
@@ -1 +0,0 @@
|
||||
CONFIG_SMSC911X=y
|
||||
@@ -1 +0,0 @@
|
||||
CONFIG_SMC91X=y
|
||||
@@ -1,4 +0,0 @@
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
CONFIG_NETDEVICES=y
|
||||
@@ -1,8 +0,0 @@
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_ISP1760=y
|
||||
CONFIG_USB_ISP1760_HOST_ROLE=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_MASS_STORAGE=y
|
||||
@@ -1,12 +0,0 @@
|
||||
CONFIG_PHYS_OFFSET=0x80000000
|
||||
CONFIG_XIP_KERNEL=y
|
||||
CONFIG_XIP_PHYS_ADDR=0x08300000
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_RAM=y
|
||||
CONFIG_MTD_ROM=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_PHYSMAP_COMPAT=y
|
||||
CONFIG_MTD_PHYSMAP_START=0x08100000
|
||||
CONFIG_MTD_PHYSMAP_LEN=0x200000
|
||||
CONFIG_CRAMFS=y
|
||||
CONFIG_CRAMFS_MTD=y
|
||||
@@ -1,3 +0,0 @@
|
||||
CONFIG_CMDLINE="console=ttyAMA0 root=mtd:physmap-flash.0 ro loglevel=9"
|
||||
# CONFIG_CMDLINE_FROM_BOOTLOADER is not set
|
||||
CONFIG_CMDLINE_EXTEND=y
|
||||
@@ -1,3 +0,0 @@
|
||||
CONFIG_CMDLINE="console=ttyAMA0 root=mtd:physmap-flash.0 ro ip=dhcp loglevel=9"
|
||||
# CONFIG_CMDLINE_FROM_BOOTLOADER is not set
|
||||
CONFIG_CMDLINE_EXTEND=y
|
||||
@@ -1,97 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From faac2fbc88b932b79b33b7299116d269d1167a18 Mon Sep 17 00:00:00 2001
|
||||
From: Manish Pandey <manish.pandey2@arm.com>
|
||||
Date: Mon, 18 Jun 2018 13:00:31 +0100
|
||||
Subject: [PATCH 01/20] arm: support for a single ARMv7-A based platform.
|
||||
|
||||
The reason for having a single ARMv7A based platform is to bypass
|
||||
collection of configs provided/concealed by ARCH_MULTIPLATFORM, for
|
||||
example XIP_KERNEL cannot be enabled with ARCH_MULTIPLATFORM.
|
||||
|
||||
Having a separate config for single ARMv7-A platform will give the
|
||||
freedom to choose only those configs which are required for a given
|
||||
ARMv7-A based platform.
|
||||
|
||||
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
arch/arm/Kconfig | 14 ++++++++++++++
|
||||
arch/arm/Kconfig.debug | 3 ++-
|
||||
arch/arm/Makefile | 2 ++
|
||||
arch/arm/kernel/devtree.c | 3 ++-
|
||||
4 files changed, 20 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
|
||||
index 97864aabc2a6..04db53ed23fc 100644
|
||||
--- a/arch/arm/Kconfig
|
||||
+++ b/arch/arm/Kconfig
|
||||
@@ -338,6 +338,20 @@ config ARM_SINGLE_ARMV7M
|
||||
select SPARSE_IRQ
|
||||
select USE_OF
|
||||
|
||||
+config ARM_SINGLE_ARMV7A
|
||||
+ bool "ARMv7-A single platform"
|
||||
+ select ARM_HAS_SG_CHAIN
|
||||
+ select AUTO_ZRELADDR
|
||||
+ select TIMER_OF
|
||||
+ select COMMON_CLK
|
||||
+ select CPU_V7
|
||||
+ select GENERIC_CLOCKEVENTS
|
||||
+ select MIGHT_HAVE_PCI
|
||||
+ select MULTI_IRQ_HANDLER
|
||||
+ select PCI_DOMAINS if PCI
|
||||
+ select SPARSE_IRQ
|
||||
+ select USE_OF
|
||||
+
|
||||
config ARCH_EBSA110
|
||||
bool "EBSA-110"
|
||||
select ARCH_USES_GETTIMEOFFSET
|
||||
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
|
||||
index b70d7debf5ca..592f5d7aa412 100644
|
||||
--- a/arch/arm/Kconfig.debug
|
||||
+++ b/arch/arm/Kconfig.debug
|
||||
@@ -1878,7 +1878,8 @@ config DEBUG_UNCOMPRESS
|
||||
config UNCOMPRESS_INCLUDE
|
||||
string
|
||||
default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM || \
|
||||
- PLAT_SAMSUNG || ARM_SINGLE_ARMV7M
|
||||
+ PLAT_SAMSUNG || ARM_SINGLE_ARMV7M || \
|
||||
+ ARM_SINGLE_ARMV7A
|
||||
default "mach/uncompress.h"
|
||||
|
||||
config EARLY_PRINTK
|
||||
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
|
||||
index 1fc32b611f8a..fa1519959f6a 100644
|
||||
--- a/arch/arm/Makefile
|
||||
+++ b/arch/arm/Makefile
|
||||
@@ -267,9 +267,11 @@ platdirs := $(patsubst %,arch/arm/plat-%/,$(sort $(plat-y)))
|
||||
|
||||
ifneq ($(CONFIG_ARCH_MULTIPLATFORM),y)
|
||||
ifneq ($(CONFIG_ARM_SINGLE_ARMV7M),y)
|
||||
+ifneq ($(CONFIG_ARM_SINGLE_ARMV7A),y)
|
||||
KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs) $(platdirs))
|
||||
endif
|
||||
endif
|
||||
+endif
|
||||
|
||||
export TEXT_OFFSET GZFLAGS MMUEXT
|
||||
|
||||
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
|
||||
index 39c978698406..88e9f22a6778 100644
|
||||
--- a/arch/arm/kernel/devtree.c
|
||||
+++ b/arch/arm/kernel/devtree.c
|
||||
@@ -212,7 +212,8 @@ const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
|
||||
{
|
||||
const struct machine_desc *mdesc, *mdesc_best = NULL;
|
||||
|
||||
-#if defined(CONFIG_ARCH_MULTIPLATFORM) || defined(CONFIG_ARM_SINGLE_ARMV7M)
|
||||
+#if defined(CONFIG_ARCH_MULTIPLATFORM) || defined(CONFIG_ARM_SINGLE_ARMV7M)\
|
||||
+ || defined(CONFIG_ARM_SINGLE_ARMV7A)
|
||||
DT_MACHINE_START(GENERIC_DT, "Generic DT based system")
|
||||
.l2c_aux_val = 0x0,
|
||||
.l2c_aux_mask = ~0x0,
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,101 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From f984be4e9b113b0c92ae2b618381f0499bf41865 Mon Sep 17 00:00:00 2001
|
||||
From: Manish Pandey <manish.pandey2@arm.com>
|
||||
Date: Mon, 18 Jun 2018 13:04:31 +0100
|
||||
Subject: [PATCH 02/20] arm: Add tiny vexpress machine.
|
||||
|
||||
added tiny vexpress machine which is cut down version of
|
||||
vexpress machine and intended to be used for IOT devices.
|
||||
|
||||
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
arch/arm/Kconfig | 2 ++
|
||||
arch/arm/mach-tinyexpress/Kconfig | 28 ++++++++++++++++++++++++++++
|
||||
drivers/clk/versatile/Kconfig | 6 +++---
|
||||
3 files changed, 33 insertions(+), 3 deletions(-)
|
||||
create mode 100644 arch/arm/mach-tinyexpress/Kconfig
|
||||
|
||||
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
|
||||
index 04db53ed23fc..ef49bbc9d5e2 100644
|
||||
--- a/arch/arm/Kconfig
|
||||
+++ b/arch/arm/Kconfig
|
||||
@@ -752,6 +752,8 @@ source "arch/arm/mach-versatile/Kconfig"
|
||||
source "arch/arm/mach-vexpress/Kconfig"
|
||||
source "arch/arm/plat-versatile/Kconfig"
|
||||
|
||||
+source "arch/arm/mach-tinyexpress/Kconfig"
|
||||
+
|
||||
source "arch/arm/mach-vt8500/Kconfig"
|
||||
|
||||
source "arch/arm/mach-zx/Kconfig"
|
||||
diff --git a/arch/arm/mach-tinyexpress/Kconfig b/arch/arm/mach-tinyexpress/Kconfig
|
||||
new file mode 100644
|
||||
index 000000000000..f9946bad1170
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/mach-tinyexpress/Kconfig
|
||||
@@ -0,0 +1,28 @@
|
||||
+config ARCH_TINY_VEXPRESS
|
||||
+ bool "ARM Ltd. Tiny Versatile Express family"
|
||||
+ depends on ARM_SINGLE_ARMV7A
|
||||
+ select ARCH_SUPPORTS_BIG_ENDIAN
|
||||
+ select ARM_AMBA
|
||||
+ select ARM_GIC
|
||||
+ select ARM_GLOBAL_TIMER
|
||||
+ select ARM_TIMER_SP804
|
||||
+ select COMMON_CLK_VERSATILE
|
||||
+ select GPIOLIB
|
||||
+ select HAVE_ARM_SCU if SMP
|
||||
+ select HAVE_ARM_TWD if SMP
|
||||
+ select HAVE_PATA_PLATFORM
|
||||
+ select ICST
|
||||
+ select NO_IOPORT_MAP
|
||||
+ select PLAT_VERSATILE
|
||||
+ select POWER_RESET
|
||||
+ select POWER_RESET_VEXPRESS
|
||||
+ select POWER_SUPPLY
|
||||
+ select REGULATOR if MMC_ARMMMCI
|
||||
+ select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
+ select VEXPRESS_CONFIG
|
||||
+ select VEXPRESS_SYSCFG
|
||||
+ select MFD_VEXPRESS_SYSREG
|
||||
+ help
|
||||
+ This option enables support for tiny linux based systems using Cortex
|
||||
+ processor based ARM core and logic (FPGA) tiles on the Versatile
|
||||
+ Express motherboard.
|
||||
diff --git a/drivers/clk/versatile/Kconfig b/drivers/clk/versatile/Kconfig
|
||||
index c2618f1477a2..f245f520df0c 100644
|
||||
--- a/drivers/clk/versatile/Kconfig
|
||||
+++ b/drivers/clk/versatile/Kconfig
|
||||
@@ -6,7 +6,7 @@ config COMMON_CLK_VERSATILE
|
||||
bool "Clock driver for ARM Reference designs"
|
||||
depends on ARCH_INTEGRATOR || ARCH_REALVIEW || \
|
||||
ARCH_VERSATILE || ARCH_VEXPRESS || ARM64 || \
|
||||
- COMPILE_TEST
|
||||
+ ARCH_TINY_VEXPRESS || COMPILE_TEST
|
||||
select REGMAP_MMIO
|
||||
---help---
|
||||
Supports clocking on ARM Reference designs:
|
||||
@@ -17,7 +17,7 @@ config COMMON_CLK_VERSATILE
|
||||
config CLK_SP810
|
||||
bool "Clock driver for ARM SP810 System Controller"
|
||||
depends on COMMON_CLK_VERSATILE
|
||||
- default y if ARCH_VEXPRESS
|
||||
+ default y if ARCH_VEXPRESS || ARCH_TINY_VEXPRESS
|
||||
---help---
|
||||
Supports clock muxing (REFCLK/TIMCLK to TIMERCLKEN0-3) capabilities
|
||||
of the ARM SP810 System Controller cell.
|
||||
@@ -26,7 +26,7 @@ config CLK_VEXPRESS_OSC
|
||||
bool "Clock driver for Versatile Express OSC clock generators"
|
||||
depends on COMMON_CLK_VERSATILE
|
||||
depends on VEXPRESS_CONFIG
|
||||
- default y if ARCH_VEXPRESS
|
||||
+ default y if ARCH_VEXPRESS || ARCH_TINY_VEXPRESS
|
||||
---help---
|
||||
Simple regmap-based driver driving clock generators on Versatile
|
||||
Express platforms hidden behind its configuration infrastructure,
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,197 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From f237b4ab421bae452a8613d6343d7e35d1295003 Mon Sep 17 00:00:00 2001
|
||||
From: Manish Pandey <manish.pandey2@arm.com>
|
||||
Date: Tue, 15 Jan 2019 16:21:20 +0000
|
||||
Subject: [PATCH 03/20] arm: introduce corstone700_defconfig
|
||||
|
||||
corstone700_defconfig is derived from tiny vexpress machine
|
||||
having XIP kernel and MMU enabled together.
|
||||
|
||||
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
arch/arm/configs/corstone700_defconfig | 170 +++++++++++++++++++++++++
|
||||
1 file changed, 170 insertions(+)
|
||||
create mode 100644 arch/arm/configs/corstone700_defconfig
|
||||
|
||||
diff --git a/arch/arm/configs/corstone700_defconfig b/arch/arm/configs/corstone700_defconfig
|
||||
new file mode 100644
|
||||
index 000000000000..d6553a85db16
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/configs/corstone700_defconfig
|
||||
@@ -0,0 +1,170 @@
|
||||
+# CONFIG_LOCALVERSION_AUTO is not set
|
||||
+# CONFIG_SYSVIPC=y
|
||||
+# CONFIG_IKCONFIG=y
|
||||
+# CONFIG_IKCONFIG_PROC=y
|
||||
+CONFIG_LOG_BUF_SHIFT=12
|
||||
+# CONFIG_CGROUPS=y
|
||||
+# CONFIG_CPUSETS=y
|
||||
+# CONFIG_UTS_NS is not set
|
||||
+# CONFIG_IPC_NS is not set
|
||||
+# CONFIG_PID_NS is not set
|
||||
+# CONFIG_NET_NS is not set
|
||||
+CONFIG_BLK_DEV_INITRD=y
|
||||
+# CONFIG_PROFILING=y
|
||||
+# CONFIG_OPROFILE=y
|
||||
+# CONFIG_MODULES=y
|
||||
+# CONFIG_MODULE_UNLOAD=y
|
||||
+# CONFIG_LBDAF is not set
|
||||
+# CONFIG_BLK_DEV_BSG is not set
|
||||
+# CONFIG_IOSCHED_DEADLINE is not set
|
||||
+# CONFIG_IOSCHED_CFQ is not set
|
||||
+CONFIG_ARCH_TINY_VEXPRESS=y
|
||||
+CONFIG_ARM_SINGLE_ARMV7A=y
|
||||
+#CONFIG_DRAM_BASE=0x02100000
|
||||
+CONFIG_PHYS_OFFSET=0x02100000
|
||||
+CONFIG_FLASH_MEM_BASE=0x08000000
|
||||
+CONFIG_FLASH_SIZE=0x4000000
|
||||
+CONFIG_XIP_KERNEL=y
|
||||
+CONFIG_XIP_PHYS_ADDR=0x08500000
|
||||
+# CONFIG_ARCH_VEXPRESS_CA9X4=y
|
||||
+# CONFIG_ARCH_VEXPRESS_DCSCB=y
|
||||
+# CONFIG_ARCH_VEXPRESS_TC2_PM=y
|
||||
+# CONFIG_SWP_EMULATE is not set
|
||||
+# CONFIG_SMP=y
|
||||
+CONFIG_HAVE_ARM_ARCH_TIMER=y
|
||||
+# CONFIG_MCPM=y
|
||||
+# CONFIG_VMSPLIT_2G=y
|
||||
+# CONFIG_NR_CPUS=8
|
||||
+# CONFIG_ARM_PSCI=y
|
||||
+# CONFIG_AEABI=y
|
||||
+# CONFIG_CMA=y
|
||||
+CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
+CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
+CONFIG_CMDLINE="console=ttyAMA0"
|
||||
+# CONFIG_CPU_IDLE=y
|
||||
+# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
|
||||
+CONFIG_VFP=y
|
||||
+# CONFIG_NEON=y
|
||||
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
+CONFIG_NET=y
|
||||
+CONFIG_PACKET=y
|
||||
+CONFIG_UNIX=y
|
||||
+CONFIG_INET=y
|
||||
+CONFIG_IP_PNP=y
|
||||
+CONFIG_IP_PNP_DHCP=y
|
||||
+CONFIG_IP_PNP_BOOTP=y
|
||||
+# CONFIG_INET_LRO is not set
|
||||
+# CONFIG_IPV6 is not set
|
||||
+# CONFIG_WIRELESS is not set
|
||||
+# CONFIG_NET_9P=y
|
||||
+# CONFIG_NET_9P_VIRTIO=y
|
||||
+# CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
+CONFIG_DEVTMPFS=y
|
||||
+# CONFIG_MTD=y
|
||||
+# CONFIG_MTD_CMDLINE_PARTS=y
|
||||
+# CONFIG_MTD_BLOCK=y
|
||||
+# CONFIG_MTD_CFI=y
|
||||
+# CONFIG_MTD_CFI_INTELEXT=y
|
||||
+# CONFIG_MTD_CFI_AMDSTD=y
|
||||
+# CONFIG_MTD_PHYSMAP=y
|
||||
+# CONFIG_MTD_PHYSMAP_OF=y
|
||||
+# CONFIG_MTD_PLATRAM=y
|
||||
+# CONFIG_MTD_UBI=y
|
||||
+# CONFIG_PROC_DEVICETREE=y
|
||||
+# CONFIG_VIRTIO_BLK=y
|
||||
+# CONFIG_SCSI_PROC_FS is not set
|
||||
+# CONFIG_BLK_DEV_SD=y
|
||||
+# CONFIG_SCSI_VIRTIO=y
|
||||
+# CONFIG_ATA=y
|
||||
+# CONFIG_SATA_PMP is not set
|
||||
+CONFIG_NETDEVICES=y
|
||||
+CONFIG_VIRTIO_NET=y
|
||||
+CONFIG_SMC91X=y
|
||||
+CONFIG_SMSC911X=y
|
||||
+# CONFIG_WLAN is not set
|
||||
+# CONFIG_INPUT_EVDEV=y
|
||||
+# CONFIG_SERIO_SERPORT is not set
|
||||
+# CONFIG_SERIO_AMBAKMI=y
|
||||
+# CONFIG_LEGACY_PTY_COUNT=16
|
||||
+CONFIG_SERIAL_AMBA_PL011=y
|
||||
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
+# CONFIG_VIRTIO_CONSOLE=y
|
||||
+# CONFIG_HW_RANDOM=y
|
||||
+# CONFIG_HW_RANDOM_VIRTIO=y
|
||||
+# CONFIG_I2C=y
|
||||
+# CONFIG_I2C_VERSATILE=y
|
||||
+# CONFIG_SENSORS_VEXPRESS=y
|
||||
+# CONFIG_REGULATOR=y
|
||||
+# CONFIG_REGULATOR_VEXPRESS=y
|
||||
+# CONFIG_FB=y
|
||||
+# CONFIG_FB_ARMCLCD=y
|
||||
+# CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
+# CONFIG_LOGO=y
|
||||
+# CONFIG_LOGO_LINUX_MONO is not set
|
||||
+# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
+# CONFIG_SOUND=y
|
||||
+# CONFIG_SND=y
|
||||
+# CONFIG_SND_MIXER_OSS=y
|
||||
+# CONFIG_SND_PCM_OSS=y
|
||||
+# CONFIG_SND_DRIVERS is not set
|
||||
+# CONFIG_SND_ARMAACI=y
|
||||
+# CONFIG_HID_DRAGONRISE=y
|
||||
+# CONFIG_HID_GYRATION=y
|
||||
+# CONFIG_HID_TWINHAN=y
|
||||
+# CONFIG_HID_NTRIG=y
|
||||
+# CONFIG_HID_PANTHERLORD=y
|
||||
+# CONFIG_HID_PETALYNX=y
|
||||
+# CONFIG_HID_SAMSUNG=y
|
||||
+# CONFIG_HID_SONY=y
|
||||
+# CONFIG_HID_SUNPLUS=y
|
||||
+# CONFIG_HID_GREENASIA=y
|
||||
+# CONFIG_HID_SMARTJOYPLUS=y
|
||||
+# CONFIG_HID_TOPSEED=y
|
||||
+# CONFIG_HID_THRUSTMASTER=y
|
||||
+# CONFIG_HID_ZEROPLUS=y
|
||||
+# CONFIG_USB=y
|
||||
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
+# CONFIG_USB_MON=y
|
||||
+# CONFIG_USB_STORAGE=y
|
||||
+# CONFIG_USB_ISP1760=y
|
||||
+# CONFIG_MMC=y
|
||||
+# CONFIG_MMC_ARMMMCI=y
|
||||
+# CONFIG_NEW_LEDS=y
|
||||
+# CONFIG_LEDS_CLASS=y
|
||||
+# CONFIG_LEDS_GPIO=y
|
||||
+# CONFIG_LEDS_TRIGGERS=y
|
||||
+# CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
+# CONFIG_LEDS_TRIGGER_CPU=y
|
||||
+CONFIG_RTC_CLASS=y
|
||||
+CONFIG_RTC_DRV_PL031=y
|
||||
+# CONFIG_VIRTIO_BALLOON=y
|
||||
+# CONFIG_VIRTIO_MMIO=y
|
||||
+# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
|
||||
+# CONFIG_EXT2_FS=y
|
||||
+# CONFIG_EXT3_FS=y
|
||||
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
+# CONFIG_EXT3_FS_XATTR is not set
|
||||
+# CONFIG_EXT4_FS=y
|
||||
+# CONFIG_VFAT_FS=y
|
||||
+# CONFIG_TMPFS=y
|
||||
+# CONFIG_JFFS2_FS=y
|
||||
+# CONFIG_UBIFS_FS=y
|
||||
+# CONFIG_CRAMFS=y
|
||||
+# CONFIG_SQUASHFS=y
|
||||
+# CONFIG_SQUASHFS_LZO=y
|
||||
+# CONFIG_NFS_FS=y
|
||||
+# CONFIG_ROOT_NFS=y
|
||||
+# CONFIG_9P_FS=y
|
||||
+# CONFIG_NLS_CODEPAGE_437=y
|
||||
+# CONFIG_NLS_ISO8859_1=y
|
||||
+# CONFIG_DEBUG_INFO=y
|
||||
+# CONFIG_DEBUG_FS=y
|
||||
+# CONFIG_MAGIC_SYSRQ=y
|
||||
+# CONFIG_DEBUG_KERNEL=y
|
||||
+# CONFIG_DETECT_HUNG_TASK=y
|
||||
+# CONFIG_SCHED_DEBUG is not set
|
||||
+# CONFIG_DEBUG_USER=y
|
||||
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
+# CONFIG_CRYPTO_HW is not set
|
||||
+# CONFIG_LTO_MENU=y
|
||||
+CONFIG_THUMB2_KERNEL=y
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,322 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From fb380896ff4e0be235a95ef32b6b3f67a56d1e9b Mon Sep 17 00:00:00 2001
|
||||
From: Samarth Parikh <samarthp@ymail.com>
|
||||
Date: Sun, 3 Feb 2019 16:35:03 +0000
|
||||
Subject: [PATCH 04/20] add driver of mailbox handling unit controller version
|
||||
2
|
||||
|
||||
this driver design is based on MHUv1 driver.
|
||||
But there is change of logic while reading device tree
|
||||
entry because MHUv2.1 has sender and receiver channels
|
||||
separate.
|
||||
|
||||
ARM has launched a next version of MHU i.e. MHUv2 with its latest
|
||||
subsystems. The main change is that the MHUv2 is now a distributed IP
|
||||
with different peripheral views (registers) for the sender and receiver.
|
||||
|
||||
Another main difference is that MHUv1 duplex channels are now split into
|
||||
simplex/half duplex in MHUv2. MHUv2 has a configurable number of
|
||||
communication channels. There is a capability register (MSG_NO_CAP) to
|
||||
find out how many channels are available in a system.
|
||||
|
||||
The register offsets have also changed for STAT, SET & CLEAR registers
|
||||
from 0x0, 0x8 & 0x10 in MHUv1 to 0x0, 0xC & 0x8 in MHUv2 respectively.
|
||||
|
||||
0x0 0x4 0x8 0xC 0x1F
|
||||
------------------------....-----
|
||||
| STAT | | | SET | | |
|
||||
------------------------....-----
|
||||
Transmit Channel
|
||||
|
||||
0x0 0x4 0x8 0xC 0x1F
|
||||
------------------------....-----
|
||||
| STAT | | CLR | | | |
|
||||
------------------------....-----
|
||||
Receive Channel
|
||||
|
||||
The MHU controller can request the receiver to wake-up and once the
|
||||
request is removed, the receiver may go back to sleep, but the MHU
|
||||
itself does not actively puts a receiver to sleep.
|
||||
|
||||
So, in order to wake-up the receiver when the sender wants to send data,
|
||||
the sender has to set ACCESS_REQUEST register first in order to wake-up
|
||||
receiver, state of which can be detected using ACCESS_READY register.
|
||||
ACCESS_REQUEST has an offset of 0xF88 & ACCESS_READY has an offset
|
||||
of 0xF8C and are accessible only on any sender channel.
|
||||
|
||||
This patch adds necessary changes in a new file required to support the
|
||||
latest MHUv2 controller. This patch also need an update in DT binding for
|
||||
ARM MHUv2 as we need a second register base (tx base) which would be used
|
||||
as the send channel base.
|
||||
|
||||
Signed-off-by: Tushar Khandelwal <tushar.khandelwal@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
drivers/mailbox/Kconfig | 8 ++
|
||||
drivers/mailbox/Makefile | 2 +
|
||||
drivers/mailbox/arm_mhu_v2.c | 219 +++++++++++++++++++++++++++++++++++
|
||||
3 files changed, 229 insertions(+)
|
||||
create mode 100644 drivers/mailbox/arm_mhu_v2.c
|
||||
|
||||
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
|
||||
index ab4eb750bbdd..15d2974d9c20 100644
|
||||
--- a/drivers/mailbox/Kconfig
|
||||
+++ b/drivers/mailbox/Kconfig
|
||||
@@ -16,6 +16,14 @@ config ARM_MHU
|
||||
The controller has 3 mailbox channels, the last of which can be
|
||||
used in Secure mode only.
|
||||
|
||||
+config ARM_MHUv2
|
||||
+ tristate "ARM MHUv2 Mailbox"
|
||||
+ depends on ARM_AMBA
|
||||
+ help
|
||||
+ Say Y here if you want to build the ARM MHUv2 controller driver.
|
||||
+ The controller has transmitter and receiver channels with their
|
||||
+ interrupt lines.
|
||||
+
|
||||
config IMX_MBOX
|
||||
tristate "i.MX Mailbox"
|
||||
depends on ARCH_MXC || COMPILE_TEST
|
||||
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
|
||||
index c22fad6f696b..ba77deeb86a2 100644
|
||||
--- a/drivers/mailbox/Makefile
|
||||
+++ b/drivers/mailbox/Makefile
|
||||
@@ -7,6 +7,8 @@ obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o
|
||||
|
||||
obj-$(CONFIG_ARM_MHU) += arm_mhu.o
|
||||
|
||||
+obj-$(CONFIG_ARM_MHUv2) += arm_mhu_v2.o
|
||||
+
|
||||
obj-$(CONFIG_IMX_MBOX) += imx-mailbox.o
|
||||
|
||||
obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX) += armada-37xx-rwtm-mailbox.o
|
||||
diff --git a/drivers/mailbox/arm_mhu_v2.c b/drivers/mailbox/arm_mhu_v2.c
|
||||
new file mode 100644
|
||||
index 000000000000..44ad125bf1c6
|
||||
--- /dev/null
|
||||
+++ b/drivers/mailbox/arm_mhu_v2.c
|
||||
@@ -0,0 +1,219 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Message Handling Unit version 2 controller driver
|
||||
+ * Copyright (C) 2019 ARM Ltd.
|
||||
+ *
|
||||
+ * Based on drivers/mailbox/arm_mhu.c
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/mutex.h>
|
||||
+#include <linux/slab.h>
|
||||
+#include <linux/err.h>
|
||||
+#include <linux/io.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/amba/bus.h>
|
||||
+#include <linux/mailbox_controller.h>
|
||||
+#include <linux/of_device.h>
|
||||
+#include <linux/of_address.h>
|
||||
+
|
||||
+#define MHU_V2_REG_STAT_OFS 0x0
|
||||
+#define MHU_V2_REG_CLR_OFS 0x8
|
||||
+#define MHU_V2_REG_SET_OFS 0xC
|
||||
+#define MHU_V2_REG_MSG_NO_CAP_OFS 0xF80
|
||||
+#define MHU_V2_REG_ACC_REQ_OFS 0xF88
|
||||
+#define MHU_V2_REG_ACC_RDY_OFS 0xF8C
|
||||
+
|
||||
+#define MHU_V2_CHANS 2
|
||||
+
|
||||
+#define mbox_to_arm_mhuv2(c) container_of(c, struct arm_mhuv2, mbox)
|
||||
+
|
||||
+struct mhuv2_link {
|
||||
+ unsigned int irq;
|
||||
+ void __iomem *tx_reg;
|
||||
+ void __iomem *rx_reg;
|
||||
+};
|
||||
+
|
||||
+struct arm_mhuv2 {
|
||||
+ void __iomem *base;
|
||||
+ struct mhuv2_link mlink[MHU_V2_CHANS];
|
||||
+ struct mbox_chan chan[MHU_V2_CHANS];
|
||||
+ struct mbox_controller mbox;
|
||||
+};
|
||||
+
|
||||
+static irqreturn_t mhuv2_rx_interrupt(int irq, void *p)
|
||||
+{
|
||||
+ struct mbox_chan *chan = p;
|
||||
+ struct mhuv2_link *mlink = chan->con_priv;
|
||||
+ u32 val;
|
||||
+
|
||||
+ val = readl_relaxed(mlink->rx_reg + MHU_V2_REG_STAT_OFS);
|
||||
+ if (!val)
|
||||
+ return IRQ_NONE;
|
||||
+
|
||||
+ mbox_chan_received_data(chan, (void *)&val);
|
||||
+
|
||||
+ writel_relaxed(val, mlink->rx_reg + MHU_V2_REG_CLR_OFS);
|
||||
+
|
||||
+ return IRQ_HANDLED;
|
||||
+}
|
||||
+
|
||||
+static bool mhuv2_last_tx_done(struct mbox_chan *chan)
|
||||
+{
|
||||
+ struct mhuv2_link *mlink = chan->con_priv;
|
||||
+ u32 val = readl_relaxed(mlink->tx_reg + MHU_V2_REG_STAT_OFS);
|
||||
+
|
||||
+ return (val == 0);
|
||||
+}
|
||||
+
|
||||
+static int mhuv2_send_data(struct mbox_chan *chan, void *data)
|
||||
+{
|
||||
+ struct mhuv2_link *mlink = chan->con_priv;
|
||||
+ u32 *arg = data;
|
||||
+
|
||||
+ writel_relaxed(*arg, mlink->tx_reg + MHU_V2_REG_SET_OFS);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int mhuv2_startup(struct mbox_chan *chan)
|
||||
+{
|
||||
+ struct mhuv2_link *mlink = chan->con_priv;
|
||||
+ u32 val;
|
||||
+ int ret;
|
||||
+ struct arm_mhuv2 *mhuv2 = mbox_to_arm_mhuv2(chan->mbox);
|
||||
+
|
||||
+ writel_relaxed(0x1, mhuv2->base + MHU_V2_REG_ACC_REQ_OFS);
|
||||
+
|
||||
+ val = readl_relaxed(mlink->tx_reg + MHU_V2_REG_STAT_OFS);
|
||||
+ writel_relaxed(val, mlink->tx_reg + MHU_V2_REG_CLR_OFS);
|
||||
+
|
||||
+ ret = request_irq(mlink->irq, mhuv2_rx_interrupt,
|
||||
+ IRQF_SHARED, "mhuv2_link", chan);
|
||||
+ if (ret) {
|
||||
+ dev_err(chan->mbox->dev,
|
||||
+ "unable to acquire IRQ %d\n", mlink->irq);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void mhuv2_shutdown(struct mbox_chan *chan)
|
||||
+{
|
||||
+ struct mhuv2_link *mlink = chan->con_priv;
|
||||
+ struct arm_mhuv2 *mhuv2 = mbox_to_arm_mhuv2(chan->mbox);
|
||||
+
|
||||
+ writel_relaxed(0x0, mhuv2->base + MHU_V2_REG_ACC_REQ_OFS);
|
||||
+
|
||||
+ free_irq(mlink->irq, chan);
|
||||
+}
|
||||
+
|
||||
+static const struct mbox_chan_ops mhuv2_ops = {
|
||||
+ .send_data = mhuv2_send_data,
|
||||
+ .startup = mhuv2_startup,
|
||||
+ .shutdown = mhuv2_shutdown,
|
||||
+ .last_tx_done = mhuv2_last_tx_done,
|
||||
+};
|
||||
+
|
||||
+static int mhuv2_probe(struct amba_device *adev, const struct amba_id *id)
|
||||
+{
|
||||
+ int i, err;
|
||||
+ struct arm_mhuv2 *mhuv2;
|
||||
+ struct device *dev = &adev->dev;
|
||||
+ void __iomem *rx_base, *tx_base;
|
||||
+ const struct device_node *np = dev->of_node;
|
||||
+ unsigned int pchans;
|
||||
+
|
||||
+ /* Allocate memory for device */
|
||||
+ mhuv2 = devm_kzalloc(dev, sizeof(*mhuv2), GFP_KERNEL);
|
||||
+ if (!mhuv2)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ tx_base = of_iomap((struct device_node *)np, 0);
|
||||
+ if (!tx_base) {
|
||||
+ dev_err(dev, "failed to map tx registers\n");
|
||||
+ iounmap(rx_base);
|
||||
+ return -ENOMEM;
|
||||
+ }
|
||||
+
|
||||
+ rx_base = of_iomap((struct device_node *)np, 1);
|
||||
+ if (!rx_base) {
|
||||
+ dev_err(dev, "failed to map rx registers\n");
|
||||
+ return -ENOMEM;
|
||||
+ }
|
||||
+
|
||||
+
|
||||
+ pchans = readl_relaxed(tx_base + MHU_V2_REG_MSG_NO_CAP_OFS);
|
||||
+ if (pchans == 0 || pchans > MHU_V2_CHANS || pchans % 2) {
|
||||
+ dev_err(dev, "invalid number of channels %d\n", pchans);
|
||||
+ iounmap(rx_base);
|
||||
+ iounmap(tx_base);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+ for (i = 0; i < pchans/2; i++) {
|
||||
+ mhuv2->chan[i].con_priv = &mhuv2->mlink[i];
|
||||
+ mhuv2->mlink[i].irq = adev->irq[i];
|
||||
+ mhuv2->mlink[i].rx_reg = rx_base + i*0x4;
|
||||
+ mhuv2->mlink[i].tx_reg = tx_base + i*0x4;
|
||||
+ }
|
||||
+
|
||||
+ mhuv2->base = tx_base;
|
||||
+ mhuv2->mbox.dev = dev;
|
||||
+ mhuv2->mbox.chans = &mhuv2->chan[0];
|
||||
+ mhuv2->mbox.num_chans = pchans;
|
||||
+ mhuv2->mbox.ops = &mhuv2_ops;
|
||||
+ mhuv2->mbox.txdone_irq = false;
|
||||
+ mhuv2->mbox.txdone_poll = true;
|
||||
+ mhuv2->mbox.txpoll_period = 1;
|
||||
+
|
||||
+ amba_set_drvdata(adev, mhuv2);
|
||||
+
|
||||
+ err = mbox_controller_register(&mhuv2->mbox);
|
||||
+ if (err) {
|
||||
+ dev_err(dev, "failed to register mailboxes %d\n", err);
|
||||
+ iounmap(rx_base);
|
||||
+ iounmap(tx_base);
|
||||
+ return err;
|
||||
+ }
|
||||
+
|
||||
+ dev_info(dev, "ARM MHUv2 Mailbox driver registered\n");
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int mhuv2_remove(struct amba_device *adev)
|
||||
+{
|
||||
+ struct arm_mhuv2 *mhuv2 = amba_get_drvdata(adev);
|
||||
+
|
||||
+ mbox_controller_unregister(&mhuv2->mbox);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct amba_id mhuv2_ids[] = {
|
||||
+ {
|
||||
+ .id = 0x4b0d1,
|
||||
+ .mask = 0xfffff,
|
||||
+ },
|
||||
+ {
|
||||
+ .id = 0xbb0d1,
|
||||
+ .mask = 0xfffff,
|
||||
+ },
|
||||
+ { 0, 0 },
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(amba, mhuv2_ids);
|
||||
+
|
||||
+static struct amba_driver arm_mhuv2_driver = {
|
||||
+ .drv = {
|
||||
+ .name = "mhuv2",
|
||||
+ },
|
||||
+ .id_table = mhuv2_ids,
|
||||
+ .probe = mhuv2_probe,
|
||||
+ .remove = mhuv2_remove,
|
||||
+};
|
||||
+module_amba_driver(arm_mhuv2_driver);
|
||||
+
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
+MODULE_DESCRIPTION("ARM MHUv2 Driver");
|
||||
+MODULE_AUTHOR("Samarth Parikh <samarthp@ymail.com>");
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,202 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From f864a1bcd09b2f2cbe0c0b923d6d974d16b602ed Mon Sep 17 00:00:00 2001
|
||||
From: Tushar Khandelwal <tushar.khandelwal@arm.com>
|
||||
Date: Sun, 3 Feb 2019 16:41:14 +0000
|
||||
Subject: [PATCH 05/20] add rpmsg based on rpmsg char driver using mailbox
|
||||
|
||||
this driver registers a rpmsg client which inturn registers a mailbox
|
||||
client to commmunicate the remote processor over MHU
|
||||
|
||||
Signed-off-by: Tushar Khandelwal <tushar.khandelwal@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
drivers/rpmsg/Kconfig | 10 +++
|
||||
drivers/rpmsg/Makefile | 1 +
|
||||
drivers/rpmsg/rpmsg_arm_mailbox.c | 141 ++++++++++++++++++++++++++++++
|
||||
3 files changed, 152 insertions(+)
|
||||
create mode 100644 drivers/rpmsg/rpmsg_arm_mailbox.c
|
||||
|
||||
diff --git a/drivers/rpmsg/Kconfig b/drivers/rpmsg/Kconfig
|
||||
index a9108ff563dc..13f04012caeb 100644
|
||||
--- a/drivers/rpmsg/Kconfig
|
||||
+++ b/drivers/rpmsg/Kconfig
|
||||
@@ -6,6 +6,16 @@ menu "Rpmsg drivers"
|
||||
config RPMSG
|
||||
tristate
|
||||
|
||||
+config RPMSG_ARM
|
||||
+ tristate "ARM RPMSG driver"
|
||||
+ select RPMSG
|
||||
+ depends on HAS_IOMEM
|
||||
+ depends on MAILBOX
|
||||
+ help
|
||||
+ Say y here to enable support for rpmsg lient driver which is built
|
||||
+ around mailbox client using Arm MHUv2.1 as physical medium.This
|
||||
+ driver enables communication which remote processor using MHU.
|
||||
+
|
||||
config RPMSG_CHAR
|
||||
tristate "RPMSG device interface"
|
||||
depends on RPMSG
|
||||
diff --git a/drivers/rpmsg/Makefile b/drivers/rpmsg/Makefile
|
||||
index ae92a7fb08f6..3f0238a66a00 100644
|
||||
--- a/drivers/rpmsg/Makefile
|
||||
+++ b/drivers/rpmsg/Makefile
|
||||
@@ -1,5 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
obj-$(CONFIG_RPMSG) += rpmsg_core.o
|
||||
+obj-$(CONFIG_RPMSG_ARM) += rpmsg_arm_mailbox.o
|
||||
obj-$(CONFIG_RPMSG_CHAR) += rpmsg_char.o
|
||||
obj-$(CONFIG_RPMSG_MTK_SCP) += mtk_rpmsg.o
|
||||
obj-$(CONFIG_RPMSG_QCOM_GLINK_RPM) += qcom_glink_rpm.o
|
||||
diff --git a/drivers/rpmsg/rpmsg_arm_mailbox.c b/drivers/rpmsg/rpmsg_arm_mailbox.c
|
||||
new file mode 100644
|
||||
index 000000000000..af6c47737d06
|
||||
--- /dev/null
|
||||
+++ b/drivers/rpmsg/rpmsg_arm_mailbox.c
|
||||
@@ -0,0 +1,141 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * rpmsg client driver using mailbox client interface
|
||||
+ *
|
||||
+ * Copyright (C) 2019 ARM Ltd.
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+#include <linux/bitmap.h>
|
||||
+#include <linux/export.h>
|
||||
+#include <linux/io.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/ktime.h>
|
||||
+#include <linux/mailbox_client.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/of_address.h>
|
||||
+#include <linux/of_device.h>
|
||||
+#include <linux/processor.h>
|
||||
+#include <linux/semaphore.h>
|
||||
+#include <linux/slab.h>
|
||||
+#include <linux/rpmsg.h>
|
||||
+#include "rpmsg_internal.h"
|
||||
+
|
||||
+#define RPMSG_NAME "arm_rpmsg"
|
||||
+#define RPMSG_ADDR_ANY 0xFFFFFFFF
|
||||
+#define TX_TIMEOUT 500 /*by half second*/
|
||||
+
|
||||
+struct rpmsg_endpoint *eptg;
|
||||
+
|
||||
+static void message_from_se(struct mbox_client *cl, void *mssg)
|
||||
+{
|
||||
+ eptg->cb(eptg->rpdev, mssg, 4, eptg->priv, RPMSG_ADDR_ANY);
|
||||
+}
|
||||
+
|
||||
+
|
||||
+static void arm_destroy_ept(struct rpmsg_endpoint *ept)
|
||||
+{
|
||||
+ kfree(ept);
|
||||
+}
|
||||
+
|
||||
+static int arm_send(struct rpmsg_endpoint *ept, void *data, int len)
|
||||
+{
|
||||
+ struct mbox_client *cl;
|
||||
+ struct mbox_chan *mbox;
|
||||
+
|
||||
+ cl = kzalloc(sizeof(struct mbox_client), GFP_KERNEL);
|
||||
+ cl->dev = ept->rpdev->dev.parent;
|
||||
+ cl->rx_callback = message_from_se;
|
||||
+ cl->tx_done = NULL; /* operate in blocking mode */
|
||||
+ cl->tx_block = true;
|
||||
+ cl->tx_tout = TX_TIMEOUT; /* by half a second */
|
||||
+ cl->knows_txdone = false; /* depending upon protocol */
|
||||
+
|
||||
+ mbox = mbox_request_channel(cl, 0);
|
||||
+ if (mbox == NULL) {
|
||||
+ dev_printk(KERN_ERR, cl->dev, "\nCannot get the channel\n");
|
||||
+ return -1;
|
||||
+ }
|
||||
+ mbox_send_message(mbox, data);
|
||||
+ mbox_free_channel(mbox);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct rpmsg_endpoint_ops arm_endpoint_ops = {
|
||||
+ .destroy_ept = arm_destroy_ept,
|
||||
+ .send = arm_send,
|
||||
+};
|
||||
+
|
||||
+
|
||||
+static struct rpmsg_endpoint *arm_create_ept(struct rpmsg_device *rpdev,
|
||||
+ rpmsg_rx_cb_t cb, void *priv, struct rpmsg_channel_info chinfo)
|
||||
+{
|
||||
+ struct rpmsg_endpoint *ept;
|
||||
+
|
||||
+ ept = kzalloc(sizeof(*ept), GFP_KERNEL);
|
||||
+ if (!ept)
|
||||
+ return NULL;
|
||||
+
|
||||
+ kref_init(&ept->refcount);
|
||||
+ ept->rpdev = rpdev;
|
||||
+ ept->cb = cb;
|
||||
+ ept->priv = priv;
|
||||
+ ept->ops = &arm_endpoint_ops;
|
||||
+ eptg = ept;
|
||||
+
|
||||
+ return ept;
|
||||
+}
|
||||
+
|
||||
+static const struct rpmsg_device_ops arm_device_ops = {
|
||||
+ .create_ept = arm_create_ept,
|
||||
+};
|
||||
+
|
||||
+
|
||||
+static void arm_release_device(struct device *dev)
|
||||
+{
|
||||
+ struct rpmsg_device *rpdev = to_rpmsg_device(dev);
|
||||
+
|
||||
+ kfree(rpdev);
|
||||
+}
|
||||
+
|
||||
+
|
||||
+static int client_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct device *dev = &pdev->dev;
|
||||
+ struct rpmsg_device *rpdev;
|
||||
+
|
||||
+ rpdev = kzalloc(sizeof(*rpdev), GFP_KERNEL);
|
||||
+ if (!rpdev)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ /* Assign callbacks for rpmsg_device */
|
||||
+ rpdev->ops = &arm_device_ops;
|
||||
+
|
||||
+ /* Assign public information to the rpmsg_device */
|
||||
+ strncpy(rpdev->id.name, RPMSG_NAME, strlen(RPMSG_NAME));
|
||||
+
|
||||
+ rpdev->dev.parent = dev;
|
||||
+ rpdev->dev.release = arm_release_device;
|
||||
+
|
||||
+ return rpmsg_chrdev_register_device(rpdev);
|
||||
+}
|
||||
+
|
||||
+static const struct of_device_id client_of_match[] = {
|
||||
+ { .compatible = "arm,client", .data = NULL },
|
||||
+ { /* Sentinel */ },
|
||||
+};
|
||||
+
|
||||
+static struct platform_driver client_driver = {
|
||||
+ .driver = {
|
||||
+ .name = "arm-mhu-client",
|
||||
+ .of_match_table = client_of_match,
|
||||
+ },
|
||||
+ .probe = client_probe,
|
||||
+};
|
||||
+
|
||||
+module_platform_driver(client_driver);
|
||||
+
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
+MODULE_DESCRIPTION("ARM RPMSG Driver");
|
||||
+MODULE_AUTHOR("Tushar Khandelwal <tushar.khandelwal@arm.com>");
|
||||
+
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,30 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From 83f137956333e57b7313cb5c344df0eb52caefdf Mon Sep 17 00:00:00 2001
|
||||
From: Tushar Khandelwal <tushar.khandelwal@arm.com>
|
||||
Date: Thu, 2 May 2019 23:23:11 +0100
|
||||
Subject: [PATCH 06/20] enable arm MHU driver and RPMSG char driver
|
||||
|
||||
Signed-off-by: Tushar Khandelwal <tushar.khandelwal@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
arch/arm/configs/corstone700_defconfig | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/configs/corstone700_defconfig b/arch/arm/configs/corstone700_defconfig
|
||||
index d6553a85db16..5d5244ce8278 100644
|
||||
--- a/arch/arm/configs/corstone700_defconfig
|
||||
+++ b/arch/arm/configs/corstone700_defconfig
|
||||
@@ -168,3 +168,8 @@ CONFIG_RTC_DRV_PL031=y
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
# CONFIG_LTO_MENU=y
|
||||
CONFIG_THUMB2_KERNEL=y
|
||||
+CONFIG_MAILBOX=y
|
||||
+CONFIG_ARM_MHUv2=y
|
||||
+CONFIG_RPMSG=y
|
||||
+CONFIG_RPMSG_CHAR=y
|
||||
+CONFIG_RPMSG_ARM=y
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,148 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From ae9eb0666ea462bf742abc8effc3cb3ec145cbae Mon Sep 17 00:00:00 2001
|
||||
From: Morten Borup Petersen <morten.petersen@arm.com>
|
||||
Date: Fri, 3 May 2019 10:45:20 +0100
|
||||
Subject: [PATCH 07/20] allow creation of multiple arm rpmsg channels
|
||||
|
||||
This commit introduces support for accessing multiple channels
|
||||
through the arm rpmsg driver.
|
||||
To do this, information connecting rpmsg endpoints, mailbox channels
|
||||
and mailbox names are stored for each created endpoint.
|
||||
rpmsg endpoints and now to be created by referring to mailbox
|
||||
names defined in the device-tree.
|
||||
|
||||
Signed-off-by: Morten Borup Petersen <morten.petersen@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
drivers/rpmsg/rpmsg_arm_mailbox.c | 69 +++++++++++++++++++++++++++----
|
||||
1 file changed, 60 insertions(+), 9 deletions(-)
|
||||
|
||||
diff --git a/drivers/rpmsg/rpmsg_arm_mailbox.c b/drivers/rpmsg/rpmsg_arm_mailbox.c
|
||||
index af6c47737d06..1cf7e20142e2 100644
|
||||
--- a/drivers/rpmsg/rpmsg_arm_mailbox.c
|
||||
+++ b/drivers/rpmsg/rpmsg_arm_mailbox.c
|
||||
@@ -25,35 +25,80 @@
|
||||
#define RPMSG_ADDR_ANY 0xFFFFFFFF
|
||||
#define TX_TIMEOUT 500 /*by half second*/
|
||||
|
||||
-struct rpmsg_endpoint *eptg;
|
||||
+struct arm_ept_info {
|
||||
+ struct rpmsg_channel_info info;
|
||||
+ struct rpmsg_endpoint *ept;
|
||||
+ struct mbox_client *cl;
|
||||
+
|
||||
+ struct list_head node;
|
||||
+};
|
||||
|
||||
-static void message_from_se(struct mbox_client *cl, void *mssg)
|
||||
+static LIST_HEAD(arm_ept_infos);
|
||||
+
|
||||
+static void arm_msg_rx_handler(struct mbox_client *cl, void *mssg)
|
||||
{
|
||||
- eptg->cb(eptg->rpdev, mssg, 4, eptg->priv, RPMSG_ADDR_ANY);
|
||||
+ struct arm_ept_info *it = NULL;
|
||||
+
|
||||
+ list_for_each_entry(it, &arm_ept_infos, node) {
|
||||
+ if (it->cl == cl) {
|
||||
+ struct rpmsg_endpoint *ept = it->ept;
|
||||
+
|
||||
+ ept->cb(ept->rpdev, mssg, 4, ept->priv, RPMSG_ADDR_ANY);
|
||||
+ return;
|
||||
+ }
|
||||
+ }
|
||||
}
|
||||
|
||||
|
||||
static void arm_destroy_ept(struct rpmsg_endpoint *ept)
|
||||
{
|
||||
+ struct arm_ept_info *it = NULL;
|
||||
+
|
||||
+ list_for_each_entry(it, &arm_ept_infos, node) {
|
||||
+ if (it->ept == ept) {
|
||||
+ list_del(&it->node);
|
||||
+ kfree(it);
|
||||
+ break;
|
||||
+ }
|
||||
+ }
|
||||
kfree(ept);
|
||||
}
|
||||
|
||||
static int arm_send(struct rpmsg_endpoint *ept, void *data, int len)
|
||||
{
|
||||
+ struct arm_ept_info *it = NULL;
|
||||
+ struct arm_ept_info *arm_ept = NULL;
|
||||
struct mbox_client *cl;
|
||||
struct mbox_chan *mbox;
|
||||
|
||||
+ // Locate registered endpoint
|
||||
+ list_for_each_entry(it, &arm_ept_infos, node) {
|
||||
+ if (it->ept == ept) {
|
||||
+ arm_ept = it;
|
||||
+ break;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ if (arm_ept == NULL) {
|
||||
+ dev_printk(KERN_ERR, cl->dev,
|
||||
+ "RPMsg ARM: Invalid endpoint\n");
|
||||
+ return -1;
|
||||
+ }
|
||||
+
|
||||
cl = kzalloc(sizeof(struct mbox_client), GFP_KERNEL);
|
||||
cl->dev = ept->rpdev->dev.parent;
|
||||
- cl->rx_callback = message_from_se;
|
||||
+ cl->rx_callback = arm_msg_rx_handler;
|
||||
cl->tx_done = NULL; /* operate in blocking mode */
|
||||
cl->tx_block = true;
|
||||
cl->tx_tout = TX_TIMEOUT; /* by half a second */
|
||||
cl->knows_txdone = false; /* depending upon protocol */
|
||||
+ arm_ept->cl = cl;
|
||||
|
||||
- mbox = mbox_request_channel(cl, 0);
|
||||
- if (mbox == NULL) {
|
||||
- dev_printk(KERN_ERR, cl->dev, "\nCannot get the channel\n");
|
||||
+ mbox = mbox_request_channel_byname(cl, arm_ept->info.name);
|
||||
+ if (IS_ERR_OR_NULL(mbox)) {
|
||||
+ dev_printk(KERN_ERR, cl->dev,
|
||||
+ "RPMsg ARM: Cannot get channel by name: '%s'\n",
|
||||
+ arm_ept->info.name);
|
||||
return -1;
|
||||
}
|
||||
mbox_send_message(mbox, data);
|
||||
@@ -71,6 +116,7 @@ static struct rpmsg_endpoint *arm_create_ept(struct rpmsg_device *rpdev,
|
||||
rpmsg_rx_cb_t cb, void *priv, struct rpmsg_channel_info chinfo)
|
||||
{
|
||||
struct rpmsg_endpoint *ept;
|
||||
+ struct arm_ept_info *ept_mbox;
|
||||
|
||||
ept = kzalloc(sizeof(*ept), GFP_KERNEL);
|
||||
if (!ept)
|
||||
@@ -81,8 +127,13 @@ static struct rpmsg_endpoint *arm_create_ept(struct rpmsg_device *rpdev,
|
||||
ept->cb = cb;
|
||||
ept->priv = priv;
|
||||
ept->ops = &arm_endpoint_ops;
|
||||
- eptg = ept;
|
||||
|
||||
+ // store chinfo for determining destination mailbox when sending
|
||||
+ ept_mbox = kzalloc(sizeof(*ept_mbox), GFP_KERNEL);
|
||||
+ ept_mbox->info = chinfo;
|
||||
+ strncpy(ept_mbox->info.name, chinfo.name, RPMSG_NAME_SIZE);
|
||||
+ ept_mbox->ept = ept;
|
||||
+ list_add(&ept_mbox->node, &arm_ept_infos);
|
||||
return ept;
|
||||
}
|
||||
|
||||
@@ -112,7 +163,7 @@ static int client_probe(struct platform_device *pdev)
|
||||
rpdev->ops = &arm_device_ops;
|
||||
|
||||
/* Assign public information to the rpmsg_device */
|
||||
- strncpy(rpdev->id.name, RPMSG_NAME, strlen(RPMSG_NAME));
|
||||
+ memcpy(rpdev->id.name, RPMSG_NAME, strlen(RPMSG_NAME));
|
||||
|
||||
rpdev->dev.parent = dev;
|
||||
rpdev->dev.release = arm_release_device;
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,59 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From 5ec2338142acb7c1ca191fc79f9ea3ecc96dc125 Mon Sep 17 00:00:00 2001
|
||||
From: Morten Borup Petersen <morten.petersen@arm.com>
|
||||
Date: Tue, 25 Jun 2019 13:23:51 +0100
|
||||
Subject: [PATCH 08/20] mailbox: enable combined receiver interrupt when using
|
||||
MHUv2.1
|
||||
|
||||
Signed-off-by: Morten Borup Petersen <morten.petersen@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
drivers/mailbox/arm_mhu_v2.c | 16 ++++++++++++++++
|
||||
1 file changed, 16 insertions(+)
|
||||
|
||||
diff --git a/drivers/mailbox/arm_mhu_v2.c b/drivers/mailbox/arm_mhu_v2.c
|
||||
index 44ad125bf1c6..7780958a16ab 100644
|
||||
--- a/drivers/mailbox/arm_mhu_v2.c
|
||||
+++ b/drivers/mailbox/arm_mhu_v2.c
|
||||
@@ -24,6 +24,11 @@
|
||||
#define MHU_V2_REG_MSG_NO_CAP_OFS 0xF80
|
||||
#define MHU_V2_REG_ACC_REQ_OFS 0xF88
|
||||
#define MHU_V2_REG_ACC_RDY_OFS 0xF8C
|
||||
+#define MHU_V2_INT_EN_OFS 0xF98
|
||||
+#define MHU_V2_AIDR_OFS 0xFCC
|
||||
+
|
||||
+#define MHU_V2_CHCOMB BIT(2)
|
||||
+#define MHU_V2_AIDR_MINOR(_reg) ((_reg) & 0xF)
|
||||
|
||||
#define MHU_V2_CHANS 2
|
||||
|
||||
@@ -117,6 +122,16 @@ static const struct mbox_chan_ops mhuv2_ops = {
|
||||
.last_tx_done = mhuv2_last_tx_done,
|
||||
};
|
||||
|
||||
+void mhuv2_check_enable_cmbint(struct mhuv2_link *link)
|
||||
+{
|
||||
+ const u32 aidr = readl_relaxed(link->rx_reg + MHU_V2_AIDR_OFS);
|
||||
+
|
||||
+ if (MHU_V2_AIDR_MINOR(aidr) == 1) {
|
||||
+ // Enable combined receiver interrupt for MHUv2.1
|
||||
+ writel_relaxed(MHU_V2_CHCOMB, link->rx_reg + MHU_V2_INT_EN_OFS);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
static int mhuv2_probe(struct amba_device *adev, const struct amba_id *id)
|
||||
{
|
||||
int i, err;
|
||||
@@ -157,6 +172,7 @@ static int mhuv2_probe(struct amba_device *adev, const struct amba_id *id)
|
||||
mhuv2->mlink[i].irq = adev->irq[i];
|
||||
mhuv2->mlink[i].rx_reg = rx_base + i*0x4;
|
||||
mhuv2->mlink[i].tx_reg = tx_base + i*0x4;
|
||||
+ mhuv2_check_enable_cmbint(&mhuv2->mlink[i]);
|
||||
}
|
||||
|
||||
mhuv2->base = tx_base;
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,232 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From dc2c23ba5acf17644af5ce5efc90667ce5da56c6 Mon Sep 17 00:00:00 2001
|
||||
From: Morten Borup Petersen <Morten.Petersen@arm.com>
|
||||
Date: Fri, 1 Mar 2019 13:29:18 +0000
|
||||
Subject: [PATCH 09/20] misc: arm: add corstone700 external system harness
|
||||
driver
|
||||
|
||||
This commit adds a driver and device node for controlling the external
|
||||
system harness of arm corstone700.
|
||||
Currently, the only functionality is ioctl command: 0x0, which will
|
||||
deassert the CPU_WAIT pin of the external system harness attached to the
|
||||
driver.
|
||||
|
||||
Signed-off-by: Morten Borup Petersen <Morten.Petersen@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
arch/arm/configs/corstone700_defconfig | 1 +
|
||||
drivers/misc/Kconfig | 1 +
|
||||
drivers/misc/Makefile | 1 +
|
||||
drivers/misc/arm/Kconfig | 5 +
|
||||
drivers/misc/arm/Makefile | 1 +
|
||||
drivers/misc/arm/extsys_ctrl.c | 147 +++++++++++++++++++++++++
|
||||
6 files changed, 156 insertions(+)
|
||||
create mode 100644 drivers/misc/arm/Kconfig
|
||||
create mode 100644 drivers/misc/arm/Makefile
|
||||
create mode 100644 drivers/misc/arm/extsys_ctrl.c
|
||||
|
||||
diff --git a/arch/arm/configs/corstone700_defconfig b/arch/arm/configs/corstone700_defconfig
|
||||
index 5d5244ce8278..629b2163a534 100644
|
||||
--- a/arch/arm/configs/corstone700_defconfig
|
||||
+++ b/arch/arm/configs/corstone700_defconfig
|
||||
@@ -173,3 +173,4 @@ CONFIG_ARM_MHUv2=y
|
||||
CONFIG_RPMSG=y
|
||||
CONFIG_RPMSG_CHAR=y
|
||||
CONFIG_RPMSG_ARM=y
|
||||
+CONFIG_EXTSYS_CTRL=y
|
||||
\ No newline at end of file
|
||||
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
|
||||
index 7f0d48f406e3..8d904cd46e4b 100644
|
||||
--- a/drivers/misc/Kconfig
|
||||
+++ b/drivers/misc/Kconfig
|
||||
@@ -480,4 +480,5 @@ source "drivers/misc/cxl/Kconfig"
|
||||
source "drivers/misc/ocxl/Kconfig"
|
||||
source "drivers/misc/cardreader/Kconfig"
|
||||
source "drivers/misc/habanalabs/Kconfig"
|
||||
+source "drivers/misc/arm/Kconfig"
|
||||
endmenu
|
||||
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
|
||||
index c1860d35dc7e..9eec96cfb750 100644
|
||||
--- a/drivers/misc/Makefile
|
||||
+++ b/drivers/misc/Makefile
|
||||
@@ -57,3 +57,4 @@ obj-y += cardreader/
|
||||
obj-$(CONFIG_PVPANIC) += pvpanic.o
|
||||
obj-$(CONFIG_HABANA_AI) += habanalabs/
|
||||
obj-$(CONFIG_XILINX_SDFEC) += xilinx_sdfec.o
|
||||
+obj-y += arm/
|
||||
diff --git a/drivers/misc/arm/Kconfig b/drivers/misc/arm/Kconfig
|
||||
new file mode 100644
|
||||
index 000000000000..a808b5b17b8d
|
||||
--- /dev/null
|
||||
+++ b/drivers/misc/arm/Kconfig
|
||||
@@ -0,0 +1,5 @@
|
||||
+config EXTSYS_CTRL
|
||||
+ tristate "Arm External System control driver"
|
||||
+ help
|
||||
+ Say y here to enable support for external system control
|
||||
+ driver for the Arm Corstone-700 platform
|
||||
diff --git a/drivers/misc/arm/Makefile b/drivers/misc/arm/Makefile
|
||||
new file mode 100644
|
||||
index 000000000000..1ca3084cf8a0
|
||||
--- /dev/null
|
||||
+++ b/drivers/misc/arm/Makefile
|
||||
@@ -0,0 +1 @@
|
||||
+obj-$(CONFIG_EXTSYS_CTRL) += extsys_ctrl.o
|
||||
diff --git a/drivers/misc/arm/extsys_ctrl.c b/drivers/misc/arm/extsys_ctrl.c
|
||||
new file mode 100644
|
||||
index 000000000000..1ff384ef9c0d
|
||||
--- /dev/null
|
||||
+++ b/drivers/misc/arm/extsys_ctrl.c
|
||||
@@ -0,0 +1,147 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Arm Corstone700 external system reset control driver
|
||||
+ *
|
||||
+ * Copyright (C) 2019 Arm Ltd.
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+#include <linux/fs.h>
|
||||
+#include <linux/clk.h>
|
||||
+#include <linux/err.h>
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/io.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/mod_devicetable.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/miscdevice.h>
|
||||
+#include <linux/init.h>
|
||||
+
|
||||
+#define EXTSYS_DRV_NAME "extsys_ctrl"
|
||||
+#define EXTSYS_MAX_DEVS 4
|
||||
+
|
||||
+#define EXTSYS_RST_SIZE U(0x8)
|
||||
+#define EXTSYS_RST_CTRL_OFF U(0x0)
|
||||
+#define EXTSYS_RST_ST_OFF U(0x4)
|
||||
+
|
||||
+/* External system reset control indexes */
|
||||
+#define EXTSYS_CPU_WAIT (0x0)
|
||||
+#define EXTSYS_RST_REQ (0x1)
|
||||
+
|
||||
+/* External system reset status masks */
|
||||
+#define EXTSYS_RST_ST_ACK_OFF U(0x1)
|
||||
+
|
||||
+/* No Reset Requested */
|
||||
+#define EXTSYS_RST_ST_ACK_NRR (0x0 << EXTSYS_RST_ST_ACK_OFF)
|
||||
+
|
||||
+/* Reset Request Complete */
|
||||
+#define EXTSYS_RST_ST_ACK_RRC (0x2 << EXTSYS_RST_ST_ACK_OFF)
|
||||
+
|
||||
+/* Reset Request Unable to Complete */
|
||||
+#define EXTSYS_RST_ST_ACK_RRUC (0x3 << EXTSYS_RST_ST_ACK_OFF)
|
||||
+
|
||||
+/* IOCTL commands */
|
||||
+#define EXTSYS_CPU_WAIT_DISABLE 0x0
|
||||
+
|
||||
+struct extsys_ctrl {
|
||||
+ struct miscdevice miscdev;
|
||||
+ void __iomem *reset_reg;
|
||||
+ void __iomem *set_reg;
|
||||
+};
|
||||
+
|
||||
+#define CLEAR_BIT(addr, index) writel(readl(addr) & ~(1UL << index), addr)
|
||||
+
|
||||
+static long extsys_ctrl_ioctl(struct file *f, unsigned int cmd,
|
||||
+ unsigned long arg)
|
||||
+{
|
||||
+ struct extsys_ctrl *extsys;
|
||||
+
|
||||
+ extsys = container_of(f->private_data, struct extsys_ctrl, miscdev);
|
||||
+
|
||||
+ switch (cmd) {
|
||||
+ case EXTSYS_CPU_WAIT_DISABLE:
|
||||
+ CLEAR_BIT(extsys->reset_reg, EXTSYS_CPU_WAIT);
|
||||
+ break;
|
||||
+
|
||||
+ default:
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct file_operations extsys_ctrl_fops = {
|
||||
+ .owner = THIS_MODULE,
|
||||
+ .unlocked_ioctl = extsys_ctrl_ioctl,
|
||||
+};
|
||||
+
|
||||
+static int extsys_ctrl_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct device *dev = &pdev->dev;
|
||||
+ struct extsys_ctrl *extsys;
|
||||
+ struct resource *res;
|
||||
+ void __iomem *reset_reg;
|
||||
+ void __iomem *set_reg;
|
||||
+ int ret;
|
||||
+
|
||||
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rstreg");
|
||||
+ reset_reg = devm_ioremap_resource(dev, res);
|
||||
+ if (IS_ERR(reset_reg))
|
||||
+ return PTR_ERR(reset_reg);
|
||||
+
|
||||
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "streg");
|
||||
+ set_reg = devm_ioremap_resource(dev, res);
|
||||
+ if (IS_ERR(set_reg))
|
||||
+ return PTR_ERR(set_reg);
|
||||
+
|
||||
+ extsys = devm_kzalloc(dev, sizeof(*extsys), GFP_KERNEL);
|
||||
+ if (!extsys)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ extsys->reset_reg = reset_reg;
|
||||
+ extsys->set_reg = set_reg;
|
||||
+
|
||||
+ extsys->miscdev.minor = MISC_DYNAMIC_MINOR;
|
||||
+ extsys->miscdev.name = EXTSYS_DRV_NAME;
|
||||
+ extsys->miscdev.fops = &extsys_ctrl_fops;
|
||||
+ extsys->miscdev.parent = dev;
|
||||
+
|
||||
+ ret = misc_register(&extsys->miscdev);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ dev_info(dev, "external system controller ready\n");
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int extsys_ctrl_remove(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct extsys_ctrl *extsys = dev_get_drvdata(&pdev->dev);
|
||||
+
|
||||
+ misc_deregister(&extsys->miscdev);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct of_device_id extsys_ctrl_match[] = {
|
||||
+ { .compatible = "arm,extsys_ctrl" },
|
||||
+ { },
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, extsys_ctrl_match);
|
||||
+
|
||||
+static struct platform_driver extsys_ctrl_driver = {
|
||||
+ .driver = {
|
||||
+ .name = EXTSYS_DRV_NAME,
|
||||
+ .of_match_table = extsys_ctrl_match,
|
||||
+ },
|
||||
+ .probe = extsys_ctrl_probe,
|
||||
+ .remove = extsys_ctrl_remove,
|
||||
+};
|
||||
+module_platform_driver(extsys_ctrl_driver);
|
||||
+
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
+MODULE_DESCRIPTION("Arm External System Control Driver");
|
||||
+MODULE_AUTHOR("Morten Borup Petersen <morten.petersen@arm.com>");
|
||||
+MODULE_AUTHOR("Rui Miguel Silva <rui.silva@linaro.org>");
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,181 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From a0cee835763d884d8ce44d01d5271e7f2e68313f Mon Sep 17 00:00:00 2001
|
||||
From: Morten Borup Petersen <morten.petersen@arm.com>
|
||||
Date: Thu, 30 May 2019 15:30:54 +0100
|
||||
Subject: [PATCH 10/20] arm: containerize endpoint and mailbox information
|
||||
|
||||
This commit adds the rpmsg_endpoint and mbox_client structs as members of the
|
||||
arm_channel struct. This allows for usage of the container_of macro, vastly
|
||||
simplifying lookup between endpoints and mailboxes.
|
||||
|
||||
Furthermore, a memory leak from the allocation of mbox_client's is fixed.
|
||||
|
||||
Signed-off-by: Morten Borup Petersen <morten.petersen@arm.com>
|
||||
Signed-off-by: Tushar Khandelwal <tushar.khandelwal@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
drivers/rpmsg/rpmsg_arm_mailbox.c | 113 ++++++++++--------------------
|
||||
1 file changed, 36 insertions(+), 77 deletions(-)
|
||||
|
||||
diff --git a/drivers/rpmsg/rpmsg_arm_mailbox.c b/drivers/rpmsg/rpmsg_arm_mailbox.c
|
||||
index 1cf7e20142e2..4933187c61ea 100644
|
||||
--- a/drivers/rpmsg/rpmsg_arm_mailbox.c
|
||||
+++ b/drivers/rpmsg/rpmsg_arm_mailbox.c
|
||||
@@ -23,84 +23,41 @@
|
||||
|
||||
#define RPMSG_NAME "arm_rpmsg"
|
||||
#define RPMSG_ADDR_ANY 0xFFFFFFFF
|
||||
-#define TX_TIMEOUT 500 /*by half second*/
|
||||
|
||||
-struct arm_ept_info {
|
||||
- struct rpmsg_channel_info info;
|
||||
- struct rpmsg_endpoint *ept;
|
||||
- struct mbox_client *cl;
|
||||
-
|
||||
- struct list_head node;
|
||||
+struct arm_channel {
|
||||
+ struct rpmsg_channel_info chinfo;
|
||||
+ struct rpmsg_endpoint ept;
|
||||
+ struct mbox_client cl;
|
||||
};
|
||||
|
||||
-static LIST_HEAD(arm_ept_infos);
|
||||
+#define arm_channel_from_rpmsg(_ept) container_of(_ept, struct arm_channel, ept)
|
||||
+#define arm_channel_from_mbox(_ept) container_of(_ept, struct arm_channel, cl)
|
||||
+
|
||||
|
||||
static void arm_msg_rx_handler(struct mbox_client *cl, void *mssg)
|
||||
{
|
||||
- struct arm_ept_info *it = NULL;
|
||||
-
|
||||
- list_for_each_entry(it, &arm_ept_infos, node) {
|
||||
- if (it->cl == cl) {
|
||||
- struct rpmsg_endpoint *ept = it->ept;
|
||||
-
|
||||
- ept->cb(ept->rpdev, mssg, 4, ept->priv, RPMSG_ADDR_ANY);
|
||||
- return;
|
||||
- }
|
||||
- }
|
||||
+ struct arm_channel* channel = arm_channel_from_mbox(cl);
|
||||
+ channel->ept.cb(channel->ept.rpdev, mssg, 4, channel->ept.priv, RPMSG_ADDR_ANY);
|
||||
}
|
||||
|
||||
|
||||
static void arm_destroy_ept(struct rpmsg_endpoint *ept)
|
||||
{
|
||||
- struct arm_ept_info *it = NULL;
|
||||
-
|
||||
- list_for_each_entry(it, &arm_ept_infos, node) {
|
||||
- if (it->ept == ept) {
|
||||
- list_del(&it->node);
|
||||
- kfree(it);
|
||||
- break;
|
||||
- }
|
||||
- }
|
||||
- kfree(ept);
|
||||
+ struct arm_channel *channel = arm_channel_from_rpmsg(ept);
|
||||
+ kfree(channel);
|
||||
}
|
||||
|
||||
static int arm_send(struct rpmsg_endpoint *ept, void *data, int len)
|
||||
{
|
||||
- struct arm_ept_info *it = NULL;
|
||||
- struct arm_ept_info *arm_ept = NULL;
|
||||
- struct mbox_client *cl;
|
||||
+ struct arm_channel *channel = arm_channel_from_rpmsg(ept);
|
||||
struct mbox_chan *mbox;
|
||||
|
||||
- // Locate registered endpoint
|
||||
- list_for_each_entry(it, &arm_ept_infos, node) {
|
||||
- if (it->ept == ept) {
|
||||
- arm_ept = it;
|
||||
- break;
|
||||
- }
|
||||
- }
|
||||
-
|
||||
- if (arm_ept == NULL) {
|
||||
- dev_printk(KERN_ERR, cl->dev,
|
||||
- "RPMsg ARM: Invalid endpoint\n");
|
||||
- return -1;
|
||||
- }
|
||||
-
|
||||
- cl = kzalloc(sizeof(struct mbox_client), GFP_KERNEL);
|
||||
- cl->dev = ept->rpdev->dev.parent;
|
||||
- cl->rx_callback = arm_msg_rx_handler;
|
||||
- cl->tx_done = NULL; /* operate in blocking mode */
|
||||
- cl->tx_block = true;
|
||||
- cl->tx_tout = TX_TIMEOUT; /* by half a second */
|
||||
- cl->knows_txdone = false; /* depending upon protocol */
|
||||
- arm_ept->cl = cl;
|
||||
-
|
||||
- mbox = mbox_request_channel_byname(cl, arm_ept->info.name);
|
||||
+ mbox = mbox_request_channel_byname(&channel->cl, channel->chinfo.name);
|
||||
if (IS_ERR_OR_NULL(mbox)) {
|
||||
- dev_printk(KERN_ERR, cl->dev,
|
||||
- "RPMsg ARM: Cannot get channel by name: '%s'\n",
|
||||
- arm_ept->info.name);
|
||||
+ printk("RPMsg ARM: Cannot get channel by name: '%s'\n", channel->chinfo.name);
|
||||
return -1;
|
||||
}
|
||||
+
|
||||
mbox_send_message(mbox, data);
|
||||
mbox_free_channel(mbox);
|
||||
return 0;
|
||||
@@ -115,26 +72,29 @@ static const struct rpmsg_endpoint_ops arm_endpoint_ops = {
|
||||
static struct rpmsg_endpoint *arm_create_ept(struct rpmsg_device *rpdev,
|
||||
rpmsg_rx_cb_t cb, void *priv, struct rpmsg_channel_info chinfo)
|
||||
{
|
||||
- struct rpmsg_endpoint *ept;
|
||||
- struct arm_ept_info *ept_mbox;
|
||||
-
|
||||
- ept = kzalloc(sizeof(*ept), GFP_KERNEL);
|
||||
- if (!ept)
|
||||
- return NULL;
|
||||
-
|
||||
- kref_init(&ept->refcount);
|
||||
- ept->rpdev = rpdev;
|
||||
- ept->cb = cb;
|
||||
- ept->priv = priv;
|
||||
- ept->ops = &arm_endpoint_ops;
|
||||
+ struct arm_channel* channel;
|
||||
+ channel = kzalloc(sizeof(*channel), GFP_KERNEL);
|
||||
|
||||
// store chinfo for determining destination mailbox when sending
|
||||
- ept_mbox = kzalloc(sizeof(*ept_mbox), GFP_KERNEL);
|
||||
- ept_mbox->info = chinfo;
|
||||
- strncpy(ept_mbox->info.name, chinfo.name, RPMSG_NAME_SIZE);
|
||||
- ept_mbox->ept = ept;
|
||||
- list_add(&ept_mbox->node, &arm_ept_infos);
|
||||
- return ept;
|
||||
+ channel->chinfo = chinfo;
|
||||
+ strncpy(channel->chinfo.name, chinfo.name, RPMSG_NAME_SIZE);
|
||||
+
|
||||
+ // Initialize rpmsg endpoint
|
||||
+ kref_init(&channel->ept.refcount);
|
||||
+ channel->ept.rpdev = rpdev;
|
||||
+ channel->ept.cb = cb;
|
||||
+ channel->ept.priv = priv;
|
||||
+ channel->ept.ops = &arm_endpoint_ops;
|
||||
+
|
||||
+ // Initialize mailbox client
|
||||
+ channel->cl.dev = rpdev->dev.parent;
|
||||
+ channel->cl.rx_callback = arm_msg_rx_handler;
|
||||
+ channel->cl.tx_done = NULL; /* operate in blocking mode */
|
||||
+ channel->cl.tx_block = true;
|
||||
+ channel->cl.tx_tout = 500; /* by half a second */
|
||||
+ channel->cl.knows_txdone = false; /* depending upon protocol */
|
||||
+
|
||||
+ return &channel->ept;
|
||||
}
|
||||
|
||||
static const struct rpmsg_device_ops arm_device_ops = {
|
||||
@@ -189,4 +149,3 @@ module_platform_driver(client_driver);
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_DESCRIPTION("ARM RPMSG Driver");
|
||||
MODULE_AUTHOR("Tushar Khandelwal <tushar.khandelwal@arm.com>");
|
||||
-
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,107 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From 451766a1eb1e070b585ab8cae31ed0dc7845a37a Mon Sep 17 00:00:00 2001
|
||||
From: Morten Borup Petersen <morten.petersen@arm.com>
|
||||
Date: Wed, 12 Jun 2019 12:11:57 +0100
|
||||
Subject: [PATCH 11/20] arm: couple mailbox channel ownership to rpmsg endpoint
|
||||
lifecycle
|
||||
|
||||
Previously, mailbox channels would be assigned once a write occured to the
|
||||
endpoint. This presents an issue wherein if a mailbox is opened with a given
|
||||
destination channel, and then read from, instead of writing to it, the target
|
||||
mailbox channel would not bind to the mailbox client, and thus not forward its
|
||||
received message to the rpmsg endpoint.
|
||||
|
||||
This commits moves the ownership of a mailbox channel to the lifecycle of an
|
||||
rpmsg endpoint, thus registerring the mailbox channel with the mailbox client
|
||||
once the rpmsg endpoint is opened in userspace.
|
||||
|
||||
Signed-off-by: Morten Borup Petersen <morten.petersen@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
drivers/rpmsg/rpmsg_arm_mailbox.c | 31 +++++++++++++++----------------
|
||||
1 file changed, 15 insertions(+), 16 deletions(-)
|
||||
|
||||
diff --git a/drivers/rpmsg/rpmsg_arm_mailbox.c b/drivers/rpmsg/rpmsg_arm_mailbox.c
|
||||
index 4933187c61ea..0773b475a932 100644
|
||||
--- a/drivers/rpmsg/rpmsg_arm_mailbox.c
|
||||
+++ b/drivers/rpmsg/rpmsg_arm_mailbox.c
|
||||
@@ -25,9 +25,9 @@
|
||||
#define RPMSG_ADDR_ANY 0xFFFFFFFF
|
||||
|
||||
struct arm_channel {
|
||||
- struct rpmsg_channel_info chinfo;
|
||||
struct rpmsg_endpoint ept;
|
||||
struct mbox_client cl;
|
||||
+ struct mbox_chan *mbox;
|
||||
};
|
||||
|
||||
#define arm_channel_from_rpmsg(_ept) container_of(_ept, struct arm_channel, ept)
|
||||
@@ -37,29 +37,25 @@ struct arm_channel {
|
||||
static void arm_msg_rx_handler(struct mbox_client *cl, void *mssg)
|
||||
{
|
||||
struct arm_channel* channel = arm_channel_from_mbox(cl);
|
||||
- channel->ept.cb(channel->ept.rpdev, mssg, 4, channel->ept.priv, RPMSG_ADDR_ANY);
|
||||
+ int err = channel->ept.cb(channel->ept.rpdev, mssg, 4, channel->ept.priv, RPMSG_ADDR_ANY);
|
||||
+ if(err) {
|
||||
+ printk("ARM Mailbox: Endpoint callback failed with error: %d", err);
|
||||
+ }
|
||||
}
|
||||
|
||||
|
||||
static void arm_destroy_ept(struct rpmsg_endpoint *ept)
|
||||
{
|
||||
struct arm_channel *channel = arm_channel_from_rpmsg(ept);
|
||||
+ mbox_free_channel(channel->mbox);
|
||||
kfree(channel);
|
||||
}
|
||||
|
||||
static int arm_send(struct rpmsg_endpoint *ept, void *data, int len)
|
||||
{
|
||||
struct arm_channel *channel = arm_channel_from_rpmsg(ept);
|
||||
- struct mbox_chan *mbox;
|
||||
-
|
||||
- mbox = mbox_request_channel_byname(&channel->cl, channel->chinfo.name);
|
||||
- if (IS_ERR_OR_NULL(mbox)) {
|
||||
- printk("RPMsg ARM: Cannot get channel by name: '%s'\n", channel->chinfo.name);
|
||||
- return -1;
|
||||
- }
|
||||
|
||||
- mbox_send_message(mbox, data);
|
||||
- mbox_free_channel(mbox);
|
||||
+ mbox_send_message(channel->mbox, data);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -72,12 +68,9 @@ static const struct rpmsg_endpoint_ops arm_endpoint_ops = {
|
||||
static struct rpmsg_endpoint *arm_create_ept(struct rpmsg_device *rpdev,
|
||||
rpmsg_rx_cb_t cb, void *priv, struct rpmsg_channel_info chinfo)
|
||||
{
|
||||
- struct arm_channel* channel;
|
||||
- channel = kzalloc(sizeof(*channel), GFP_KERNEL);
|
||||
+ struct arm_channel *channel;
|
||||
|
||||
- // store chinfo for determining destination mailbox when sending
|
||||
- channel->chinfo = chinfo;
|
||||
- strncpy(channel->chinfo.name, chinfo.name, RPMSG_NAME_SIZE);
|
||||
+ channel = kzalloc(sizeof(*channel), GFP_KERNEL);
|
||||
|
||||
// Initialize rpmsg endpoint
|
||||
kref_init(&channel->ept.refcount);
|
||||
@@ -94,6 +87,12 @@ static struct rpmsg_endpoint *arm_create_ept(struct rpmsg_device *rpdev,
|
||||
channel->cl.tx_tout = 500; /* by half a second */
|
||||
channel->cl.knows_txdone = false; /* depending upon protocol */
|
||||
|
||||
+ channel->mbox = mbox_request_channel_byname(&channel->cl, chinfo.name);
|
||||
+ if (IS_ERR_OR_NULL(channel->mbox)) {
|
||||
+ printk("RPMsg ARM: Cannot get channel by name: '%s'\n", chinfo.name);
|
||||
+ return -1;
|
||||
+ }
|
||||
+
|
||||
return &channel->ept;
|
||||
}
|
||||
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,36 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From 546e8277f0a187bc32c1e60b4317c87ea6145f90 Mon Sep 17 00:00:00 2001
|
||||
From: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Date: Fri, 16 Aug 2019 13:40:39 +0100
|
||||
Subject: [PATCH 12/20] mailbox: arm_mhu_v2: add new AMBA ID to support MHU
|
||||
v2.1
|
||||
|
||||
With MHU v2.1 specification, AMBA ID is changed.
|
||||
This change is to add a new AMBA ID entry for MHU.
|
||||
|
||||
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
drivers/mailbox/arm_mhu_v2.c | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
diff --git a/drivers/mailbox/arm_mhu_v2.c b/drivers/mailbox/arm_mhu_v2.c
|
||||
index 7780958a16ab..fe43348db5e3 100644
|
||||
--- a/drivers/mailbox/arm_mhu_v2.c
|
||||
+++ b/drivers/mailbox/arm_mhu_v2.c
|
||||
@@ -216,6 +216,10 @@ static struct amba_id mhuv2_ids[] = {
|
||||
.id = 0xbb0d1,
|
||||
.mask = 0xfffff,
|
||||
},
|
||||
+ {
|
||||
+ .id = 0xbb076,
|
||||
+ .mask = 0xfffff,
|
||||
+ },
|
||||
{ 0, 0 },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(amba, mhuv2_ids);
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,119 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From 4c0f31d0b6a10e9c67ca1e1a5cbae6511b087a51 Mon Sep 17 00:00:00 2001
|
||||
From: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Date: Wed, 14 Aug 2019 18:02:11 +0100
|
||||
Subject: [PATCH 13/20] mailbox: arm_mhu_v2: dynamic allocation of channels
|
||||
|
||||
Typically, hardware reports number of channels it supports.
|
||||
Software should read the appropriate registers to determine the
|
||||
number of channels support and should make the allocations
|
||||
accordingly. This change is to achieve it by removing static allocation
|
||||
and making dynamic allocations.
|
||||
|
||||
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
drivers/mailbox/arm_mhu_v2.c | 47 +++++++++++++++++++++++++++---------
|
||||
1 file changed, 35 insertions(+), 12 deletions(-)
|
||||
|
||||
diff --git a/drivers/mailbox/arm_mhu_v2.c b/drivers/mailbox/arm_mhu_v2.c
|
||||
index fe43348db5e3..56fb31eeaa87 100644
|
||||
--- a/drivers/mailbox/arm_mhu_v2.c
|
||||
+++ b/drivers/mailbox/arm_mhu_v2.c
|
||||
@@ -30,7 +30,7 @@
|
||||
#define MHU_V2_CHCOMB BIT(2)
|
||||
#define MHU_V2_AIDR_MINOR(_reg) ((_reg) & 0xF)
|
||||
|
||||
-#define MHU_V2_CHANS 2
|
||||
+#define MHU_V2_EACH_CHANNEL_SIZE 0x20
|
||||
|
||||
#define mbox_to_arm_mhuv2(c) container_of(c, struct arm_mhuv2, mbox)
|
||||
|
||||
@@ -42,8 +42,8 @@ struct mhuv2_link {
|
||||
|
||||
struct arm_mhuv2 {
|
||||
void __iomem *base;
|
||||
- struct mhuv2_link mlink[MHU_V2_CHANS];
|
||||
- struct mbox_chan chan[MHU_V2_CHANS];
|
||||
+ struct mhuv2_link *mlink;
|
||||
+ struct mbox_chan *chan;
|
||||
struct mbox_controller mbox;
|
||||
};
|
||||
|
||||
@@ -140,6 +140,9 @@ static int mhuv2_probe(struct amba_device *adev, const struct amba_id *id)
|
||||
void __iomem *rx_base, *tx_base;
|
||||
const struct device_node *np = dev->of_node;
|
||||
unsigned int pchans;
|
||||
+ struct mhuv2_link *mlink;
|
||||
+ struct mbox_chan *chan;
|
||||
+
|
||||
|
||||
/* Allocate memory for device */
|
||||
mhuv2 = devm_kzalloc(dev, sizeof(*mhuv2), GFP_KERNEL);
|
||||
@@ -159,25 +162,43 @@ static int mhuv2_probe(struct amba_device *adev, const struct amba_id *id)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
-
|
||||
pchans = readl_relaxed(tx_base + MHU_V2_REG_MSG_NO_CAP_OFS);
|
||||
- if (pchans == 0 || pchans > MHU_V2_CHANS || pchans % 2) {
|
||||
+ if (pchans == 0 || pchans % 2) {
|
||||
dev_err(dev, "invalid number of channels %d\n", pchans);
|
||||
iounmap(rx_base);
|
||||
iounmap(tx_base);
|
||||
return -EINVAL;
|
||||
}
|
||||
- for (i = 0; i < pchans/2; i++) {
|
||||
- mhuv2->chan[i].con_priv = &mhuv2->mlink[i];
|
||||
- mhuv2->mlink[i].irq = adev->irq[i];
|
||||
- mhuv2->mlink[i].rx_reg = rx_base + i*0x4;
|
||||
- mhuv2->mlink[i].tx_reg = tx_base + i*0x4;
|
||||
- mhuv2_check_enable_cmbint(&mhuv2->mlink[i]);
|
||||
+
|
||||
+ mhuv2->mlink = devm_kcalloc(dev, pchans, sizeof(*mlink), GFP_KERNEL);
|
||||
+ if (!mhuv2->mlink) {
|
||||
+ iounmap(rx_base);
|
||||
+ iounmap(tx_base);
|
||||
+ return -ENOMEM;
|
||||
+ }
|
||||
+
|
||||
+ mhuv2->chan = devm_kcalloc(dev, pchans, sizeof(*chan), GFP_KERNEL);
|
||||
+ if (!mhuv2->chan) {
|
||||
+ iounmap(rx_base);
|
||||
+ iounmap(tx_base);
|
||||
+ kfree(mhuv2->mlink);
|
||||
+ return -ENOMEM;
|
||||
}
|
||||
|
||||
+ for (i = 0; i < pchans; i++) {
|
||||
+ mlink = mhuv2->mlink + i;
|
||||
+ chan = mhuv2->chan + i;
|
||||
+ chan->con_priv = mlink;
|
||||
+ mlink->rx_reg = rx_base + (i * MHU_V2_EACH_CHANNEL_SIZE);
|
||||
+ mlink->tx_reg = tx_base + (i * MHU_V2_EACH_CHANNEL_SIZE);
|
||||
+ }
|
||||
+
|
||||
+ mhuv2->mlink->irq = adev->irq[0];
|
||||
+ mhuv2_check_enable_cmbint(mhuv2->mlink);
|
||||
+
|
||||
mhuv2->base = tx_base;
|
||||
mhuv2->mbox.dev = dev;
|
||||
- mhuv2->mbox.chans = &mhuv2->chan[0];
|
||||
+ mhuv2->mbox.chans = mhuv2->chan;
|
||||
mhuv2->mbox.num_chans = pchans;
|
||||
mhuv2->mbox.ops = &mhuv2_ops;
|
||||
mhuv2->mbox.txdone_irq = false;
|
||||
@@ -191,6 +212,8 @@ static int mhuv2_probe(struct amba_device *adev, const struct amba_id *id)
|
||||
dev_err(dev, "failed to register mailboxes %d\n", err);
|
||||
iounmap(rx_base);
|
||||
iounmap(tx_base);
|
||||
+ kfree(mhuv2->mlink);
|
||||
+ kfree(mhuv2->chan);
|
||||
return err;
|
||||
}
|
||||
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,42 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From eb92a2e53578326a15bc193c0dc2512793c8c502 Mon Sep 17 00:00:00 2001
|
||||
From: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Date: Wed, 9 Oct 2019 13:28:51 +0100
|
||||
Subject: [PATCH 14/20] defconfig: adjust XIP physical address to 3MB offset
|
||||
|
||||
Because of the memory constraint, reduced root filesystem
|
||||
to 2MB and as result XIP start address should be changed.
|
||||
This change is to adjust XIP PHYS start address to align
|
||||
with the rootfs size change
|
||||
|
||||
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
arch/arm/configs/corstone700_defconfig | 4 ++--
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/configs/corstone700_defconfig b/arch/arm/configs/corstone700_defconfig
|
||||
index 629b2163a534..61a0a3c3a209 100644
|
||||
--- a/arch/arm/configs/corstone700_defconfig
|
||||
+++ b/arch/arm/configs/corstone700_defconfig
|
||||
@@ -25,7 +25,7 @@ CONFIG_PHYS_OFFSET=0x02100000
|
||||
CONFIG_FLASH_MEM_BASE=0x08000000
|
||||
CONFIG_FLASH_SIZE=0x4000000
|
||||
CONFIG_XIP_KERNEL=y
|
||||
-CONFIG_XIP_PHYS_ADDR=0x08500000
|
||||
+CONFIG_XIP_PHYS_ADDR=0x08300000
|
||||
# CONFIG_ARCH_VEXPRESS_CA9X4=y
|
||||
# CONFIG_ARCH_VEXPRESS_DCSCB=y
|
||||
# CONFIG_ARCH_VEXPRESS_TC2_PM=y
|
||||
@@ -173,4 +173,4 @@ CONFIG_ARM_MHUv2=y
|
||||
CONFIG_RPMSG=y
|
||||
CONFIG_RPMSG_CHAR=y
|
||||
CONFIG_RPMSG_ARM=y
|
||||
-CONFIG_EXTSYS_CTRL=y
|
||||
\ No newline at end of file
|
||||
+CONFIG_EXTSYS_CTRL=y
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,50 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From dbf2cd8967b6e2c47084e52aae8a15a669614cb1 Mon Sep 17 00:00:00 2001
|
||||
From: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Date: Mon, 7 Oct 2019 12:26:06 +0100
|
||||
Subject: [PATCH 15/20] arm: Kconfig: disable ARM_VIRT extension if XIP_KERNEL
|
||||
|
||||
XIP is intended to execute kernel inplace and typically from
|
||||
flash and is used mostly on low memory devices.
|
||||
|
||||
.macro store_primary_cpu_mode reg1, reg2, reg3
|
||||
mrs \reg1, cpsr
|
||||
and \reg1, \reg1, #MODE_MASK
|
||||
adr \reg2, .L__boot_cpu_mode_offset
|
||||
ldr \reg3, [\reg2]
|
||||
str \reg1, [\reg2, \reg3]
|
||||
|
||||
As text section is in flash memory and data section is in RAM.
|
||||
L__boot_cpu_mode_offset would evaluate to address based
|
||||
on virtual addresses provided by linker script. At this stage
|
||||
the MMU is OFF.
|
||||
|
||||
The logic used based stored @L__boot_cpu_mode_offset on the offset
|
||||
between the boot_cpu_mode in data section and the location of
|
||||
L__boot_cpu_mode_offset can't be used along with PC to fetch the value
|
||||
of boot_cpu_mode doesn't work.
|
||||
|
||||
This change is to disable CONFIG_ARM_VIRT_EXT for XIP kernel
|
||||
|
||||
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
---
|
||||
arch/arm/mm/Kconfig | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
|
||||
index 65e4482e3849..69810125998b 100644
|
||||
--- a/arch/arm/mm/Kconfig
|
||||
+++ b/arch/arm/mm/Kconfig
|
||||
@@ -703,6 +703,7 @@ config ARM_THUMBEE
|
||||
|
||||
config ARM_VIRT_EXT
|
||||
bool
|
||||
+ depends on !XIP_KERNEL
|
||||
default y if CPU_V7
|
||||
help
|
||||
Enable the kernel to make use of the ARM Virtualization
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,34 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From e5d99c1524576eb47c13e08d4dd20ebc72491477 Mon Sep 17 00:00:00 2001
|
||||
From: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Date: Mon, 14 Oct 2019 15:15:46 +0100
|
||||
Subject: [PATCH 16/20] corstone700_defconfig: use DDR address instead of
|
||||
shared RAM
|
||||
|
||||
On fpga we use DDR for kernel data, dtb and rootfs.
|
||||
This change is to update CONFIG_PHYS_ADDR to 0x80000000
|
||||
|
||||
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
arch/arm/configs/corstone700_defconfig | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/configs/corstone700_defconfig b/arch/arm/configs/corstone700_defconfig
|
||||
index 61a0a3c3a209..add9f5673395 100644
|
||||
--- a/arch/arm/configs/corstone700_defconfig
|
||||
+++ b/arch/arm/configs/corstone700_defconfig
|
||||
@@ -21,7 +21,7 @@ CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_ARCH_TINY_VEXPRESS=y
|
||||
CONFIG_ARM_SINGLE_ARMV7A=y
|
||||
#CONFIG_DRAM_BASE=0x02100000
|
||||
-CONFIG_PHYS_OFFSET=0x02100000
|
||||
+CONFIG_PHYS_OFFSET=0x80000000
|
||||
CONFIG_FLASH_MEM_BASE=0x08000000
|
||||
CONFIG_FLASH_SIZE=0x4000000
|
||||
CONFIG_XIP_KERNEL=y
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -1,61 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From 32969f7963890fc0e3c7d47d788751272d95e501 Mon Sep 17 00:00:00 2001
|
||||
From: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
Date: Fri, 20 Dec 2019 13:12:27 +0000
|
||||
Subject: [PATCH 17/20] corstone700_defconfig: enable configs for cramfs-xip
|
||||
|
||||
Add the MTD and CRAMFS support for CramFS-XIP
|
||||
|
||||
Because the NOR flash is already mapped and read-accessible
|
||||
before the kernel starts, so we don't need a QSPI driver to
|
||||
access the rootfs. The kernel shouldn't be configured with
|
||||
MTD_CFI. Otherwise, the kernel will verify CFI compliancy
|
||||
by writing commands to the flash and a QSPI driver is required
|
||||
in this case.
|
||||
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
arch/arm/configs/corstone700_defconfig | 13 +++++++++----
|
||||
1 file changed, 9 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/configs/corstone700_defconfig b/arch/arm/configs/corstone700_defconfig
|
||||
index add9f5673395..13863b804c6b 100644
|
||||
--- a/arch/arm/configs/corstone700_defconfig
|
||||
+++ b/arch/arm/configs/corstone700_defconfig
|
||||
@@ -60,13 +60,17 @@ CONFIG_IP_PNP_BOOTP=y
|
||||
# CONFIG_NET_9P_VIRTIO=y
|
||||
# CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_DEVTMPFS=y
|
||||
-# CONFIG_MTD=y
|
||||
+CONFIG_MTD=y
|
||||
# CONFIG_MTD_CMDLINE_PARTS=y
|
||||
# CONFIG_MTD_BLOCK=y
|
||||
-# CONFIG_MTD_CFI=y
|
||||
+CONFIG_MTD_RAM=y
|
||||
+CONFIG_MTD_ROM=y
|
||||
# CONFIG_MTD_CFI_INTELEXT=y
|
||||
# CONFIG_MTD_CFI_AMDSTD=y
|
||||
-# CONFIG_MTD_PHYSMAP=y
|
||||
+CONFIG_MTD_PHYSMAP=y
|
||||
+CONFIG_MTD_PHYSMAP_COMPAT=y
|
||||
+CONFIG_MTD_PHYSMAP_START=0x08100000
|
||||
+CONFIG_MTD_PHYSMAP_LEN=0x200000
|
||||
# CONFIG_MTD_PHYSMAP_OF=y
|
||||
# CONFIG_MTD_PLATRAM=y
|
||||
# CONFIG_MTD_UBI=y
|
||||
@@ -149,7 +153,8 @@ CONFIG_RTC_DRV_PL031=y
|
||||
# CONFIG_TMPFS=y
|
||||
# CONFIG_JFFS2_FS=y
|
||||
# CONFIG_UBIFS_FS=y
|
||||
-# CONFIG_CRAMFS=y
|
||||
+CONFIG_CRAMFS=y
|
||||
+CONFIG_CRAMFS_MTD=y
|
||||
# CONFIG_SQUASHFS=y
|
||||
# CONFIG_SQUASHFS_LZO=y
|
||||
# CONFIG_NFS_FS=y
|
||||
--
|
||||
2.17.1
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,302 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
|
||||
From a2d7a69e994ea67583bbd766a85b2c89f35b45b5 Mon Sep 17 00:00:00 2001
|
||||
From: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
Date: Fri, 26 Jun 2020 16:37:30 +0100
|
||||
Subject: [PATCH 19/20] usb: isp1760: hcd: refactor mempool config and setup
|
||||
|
||||
In preparation to support other family member IP, which may have
|
||||
different memory layout. Drop macros and setup a configuration
|
||||
struct.
|
||||
|
||||
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
---
|
||||
drivers/usb/isp1760/isp1760-core.c | 21 ++++++++
|
||||
drivers/usb/isp1760/isp1760-hcd.c | 83 ++++++++++++++++++++----------
|
||||
drivers/usb/isp1760/isp1760-hcd.h | 37 ++++++-------
|
||||
3 files changed, 92 insertions(+), 49 deletions(-)
|
||||
|
||||
diff --git a/drivers/usb/isp1760/isp1760-core.c b/drivers/usb/isp1760/isp1760-core.c
|
||||
index f7f680046a15..88f233c11397 100644
|
||||
--- a/drivers/usb/isp1760/isp1760-core.c
|
||||
+++ b/drivers/usb/isp1760/isp1760-core.c
|
||||
@@ -102,6 +102,25 @@ void isp1760_set_pullup(struct isp1760_device *isp, bool enable)
|
||||
isp1760_field_set(udc->fields, HW_DP_PULLUP_CLEAR);
|
||||
}
|
||||
|
||||
+/*
|
||||
+ * 60kb divided in:
|
||||
+ * - 32 blocks @ 256 bytes
|
||||
+ * - 20 blocks @ 1024 bytes
|
||||
+ * - 4 blocks @ 8192 bytes
|
||||
+ */
|
||||
+static const struct isp1760_memory_layout isp176x_memory_conf = {
|
||||
+ .blocks[0] = 32,
|
||||
+ .blocks_size[0] = 256,
|
||||
+ .blocks[1] = 20,
|
||||
+ .blocks_size[1] = 1024,
|
||||
+ .blocks[2] = 4,
|
||||
+ .blocks_size[2] = 8192,
|
||||
+
|
||||
+ .ptd_num = 32,
|
||||
+ .payload_blocks = 32 + 20 + 4,
|
||||
+ .payload_area_size = 0xf000,
|
||||
+};
|
||||
+
|
||||
static const struct regmap_config isp1760_hc_regmap_conf = {
|
||||
.name = "isp1760-hc",
|
||||
.reg_bits = 16,
|
||||
@@ -183,6 +202,8 @@ int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
|
||||
udc->fields[i] = f;
|
||||
}
|
||||
|
||||
+ hcd->memory_layout = &isp176x_memory_conf;
|
||||
+
|
||||
isp1760_init_core(isp);
|
||||
|
||||
if (IS_ENABLED(CONFIG_USB_ISP1760_HCD) && !usb_disabled()) {
|
||||
diff --git a/drivers/usb/isp1760/isp1760-hcd.c b/drivers/usb/isp1760/isp1760-hcd.c
|
||||
index 76fed6e062ed..0f54a989dbed 100644
|
||||
--- a/drivers/usb/isp1760/isp1760-hcd.c
|
||||
+++ b/drivers/usb/isp1760/isp1760-hcd.c
|
||||
@@ -354,39 +354,29 @@ static void ptd_write(void __iomem *base, u32 ptd_offset, u32 slot,
|
||||
/* memory management of the 60kb on the chip from 0x1000 to 0xffff */
|
||||
static void init_memory(struct isp1760_hcd *priv)
|
||||
{
|
||||
- int i, curr;
|
||||
+ const struct isp1760_memory_layout *mem = priv->memory_layout;
|
||||
+ int i, j, curr;
|
||||
u32 payload_addr;
|
||||
|
||||
payload_addr = PAYLOAD_OFFSET;
|
||||
- for (i = 0; i < BLOCK_1_NUM; i++) {
|
||||
- priv->memory_pool[i].start = payload_addr;
|
||||
- priv->memory_pool[i].size = BLOCK_1_SIZE;
|
||||
- priv->memory_pool[i].free = 1;
|
||||
- payload_addr += priv->memory_pool[i].size;
|
||||
- }
|
||||
-
|
||||
- curr = i;
|
||||
- for (i = 0; i < BLOCK_2_NUM; i++) {
|
||||
- priv->memory_pool[curr + i].start = payload_addr;
|
||||
- priv->memory_pool[curr + i].size = BLOCK_2_SIZE;
|
||||
- priv->memory_pool[curr + i].free = 1;
|
||||
- payload_addr += priv->memory_pool[curr + i].size;
|
||||
- }
|
||||
|
||||
- curr = i;
|
||||
- for (i = 0; i < BLOCK_3_NUM; i++) {
|
||||
- priv->memory_pool[curr + i].start = payload_addr;
|
||||
- priv->memory_pool[curr + i].size = BLOCK_3_SIZE;
|
||||
- priv->memory_pool[curr + i].free = 1;
|
||||
- payload_addr += priv->memory_pool[curr + i].size;
|
||||
+ for (i = 0, curr = 0; i < ARRAY_SIZE(mem->blocks); i++) {
|
||||
+ for (j = 0; j < mem->blocks[i]; j++, curr++) {
|
||||
+ priv->memory_pool[curr + j].start = payload_addr;
|
||||
+ priv->memory_pool[curr + j].size = mem->blocks_size[i];
|
||||
+ priv->memory_pool[curr + j].free = 1;
|
||||
+ payload_addr += priv->memory_pool[curr + j].size;
|
||||
+ }
|
||||
}
|
||||
|
||||
- WARN_ON(payload_addr - priv->memory_pool[0].start > PAYLOAD_AREA_SIZE);
|
||||
+ WARN_ON(payload_addr - priv->memory_pool[0].start >
|
||||
+ mem->payload_area_size);
|
||||
}
|
||||
|
||||
static void alloc_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
|
||||
{
|
||||
struct isp1760_hcd *priv = hcd_to_priv(hcd);
|
||||
+ const struct isp1760_memory_layout *mem = priv->memory_layout;
|
||||
int i;
|
||||
|
||||
WARN_ON(qtd->payload_addr);
|
||||
@@ -394,7 +384,7 @@ static void alloc_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
|
||||
if (!qtd->length)
|
||||
return;
|
||||
|
||||
- for (i = 0; i < BLOCKS; i++) {
|
||||
+ for (i = 0; i < mem->payload_blocks; i++) {
|
||||
if (priv->memory_pool[i].size >= qtd->length &&
|
||||
priv->memory_pool[i].free) {
|
||||
priv->memory_pool[i].free = 0;
|
||||
@@ -407,12 +397,13 @@ static void alloc_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
|
||||
static void free_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
|
||||
{
|
||||
struct isp1760_hcd *priv = hcd_to_priv(hcd);
|
||||
+ const struct isp1760_memory_layout *mem = priv->memory_layout;
|
||||
int i;
|
||||
|
||||
if (!qtd->payload_addr)
|
||||
return;
|
||||
|
||||
- for (i = 0; i < BLOCKS; i++) {
|
||||
+ for (i = 0; i < mem->payload_blocks; i++) {
|
||||
if (priv->memory_pool[i].start == qtd->payload_addr) {
|
||||
WARN_ON(priv->memory_pool[i].free);
|
||||
priv->memory_pool[i].free = 1;
|
||||
@@ -1403,8 +1394,6 @@ static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len)
|
||||
{
|
||||
qtd->data_buffer = databuffer;
|
||||
|
||||
- if (len > MAX_PAYLOAD_SIZE)
|
||||
- len = MAX_PAYLOAD_SIZE;
|
||||
qtd->length = len;
|
||||
|
||||
return qtd->length;
|
||||
@@ -1428,6 +1417,8 @@ static void qtd_list_free(struct list_head *qtd_list)
|
||||
static void packetize_urb(struct usb_hcd *hcd,
|
||||
struct urb *urb, struct list_head *head, gfp_t flags)
|
||||
{
|
||||
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
|
||||
+ const struct isp1760_memory_layout *mem = priv->memory_layout;
|
||||
struct isp1760_qtd *qtd;
|
||||
void *buf;
|
||||
int len, maxpacketsize;
|
||||
@@ -1480,6 +1471,10 @@ static void packetize_urb(struct usb_hcd *hcd,
|
||||
qtd = qtd_alloc(flags, urb, packet_type);
|
||||
if (!qtd)
|
||||
goto cleanup;
|
||||
+
|
||||
+ if (len > mem->blocks_size[ISP176x_BLOCK_NUM - 1])
|
||||
+ len = mem->blocks_size[ISP176x_BLOCK_NUM - 1];
|
||||
+
|
||||
this_qtd_len = qtd_fill(qtd, buf, len);
|
||||
list_add_tail(&qtd->qtd_list, head);
|
||||
|
||||
@@ -2209,6 +2204,7 @@ int isp1760_hcd_register(struct isp1760_hcd *priv, struct resource *mem,
|
||||
int irq, unsigned long irqflags,
|
||||
struct device *dev)
|
||||
{
|
||||
+ const struct isp1760_memory_layout *mem_layout = priv->memory_layout;
|
||||
struct usb_hcd *hcd;
|
||||
int ret;
|
||||
|
||||
@@ -2220,6 +2216,28 @@ int isp1760_hcd_register(struct isp1760_hcd *priv, struct resource *mem,
|
||||
|
||||
priv->hcd = hcd;
|
||||
|
||||
+ priv->memory_pool = kcalloc(mem_layout->payload_blocks,
|
||||
+ sizeof(struct isp1760_memory_chunk),
|
||||
+ GFP_KERNEL);
|
||||
+ if (!priv->memory_pool) {
|
||||
+ ret = -ENOMEM;
|
||||
+ goto put_hcd;
|
||||
+ }
|
||||
+
|
||||
+ priv->atl_slots = kcalloc(mem_layout->ptd_num,
|
||||
+ sizeof(struct isp1760_slotinfo), GFP_KERNEL);
|
||||
+ if (!priv->atl_slots) {
|
||||
+ ret = -ENOMEM;
|
||||
+ goto free_mem_pool;
|
||||
+ }
|
||||
+
|
||||
+ priv->int_slots = kcalloc(mem_layout->ptd_num,
|
||||
+ sizeof(struct isp1760_slotinfo), GFP_KERNEL);
|
||||
+ if (!priv->int_slots) {
|
||||
+ ret = -ENOMEM;
|
||||
+ goto free_atl_slots;
|
||||
+ }
|
||||
+
|
||||
init_memory(priv);
|
||||
|
||||
hcd->irq = irq;
|
||||
@@ -2231,13 +2249,19 @@ int isp1760_hcd_register(struct isp1760_hcd *priv, struct resource *mem,
|
||||
|
||||
ret = usb_add_hcd(hcd, irq, irqflags);
|
||||
if (ret)
|
||||
- goto error;
|
||||
+ goto free_int_slots;
|
||||
|
||||
device_wakeup_enable(hcd->self.controller);
|
||||
|
||||
return 0;
|
||||
|
||||
-error:
|
||||
+free_int_slots:
|
||||
+ kfree(priv->int_slots);
|
||||
+free_atl_slots:
|
||||
+ kfree(priv->atl_slots);
|
||||
+free_mem_pool:
|
||||
+ kfree(priv->memory_pool);
|
||||
+put_hcd:
|
||||
usb_put_hcd(hcd);
|
||||
return ret;
|
||||
}
|
||||
@@ -2249,4 +2273,7 @@ void isp1760_hcd_unregister(struct isp1760_hcd *priv)
|
||||
|
||||
usb_remove_hcd(priv->hcd);
|
||||
usb_put_hcd(priv->hcd);
|
||||
+ kfree(priv->atl_slots);
|
||||
+ kfree(priv->int_slots);
|
||||
+ kfree(priv->memory_pool);
|
||||
}
|
||||
diff --git a/drivers/usb/isp1760/isp1760-hcd.h b/drivers/usb/isp1760/isp1760-hcd.h
|
||||
index 7a1f4f2607be..e5e784b9046b 100644
|
||||
--- a/drivers/usb/isp1760/isp1760-hcd.h
|
||||
+++ b/drivers/usb/isp1760/isp1760-hcd.h
|
||||
@@ -12,24 +12,6 @@ struct isp1760_qtd;
|
||||
struct resource;
|
||||
struct usb_hcd;
|
||||
|
||||
-/*
|
||||
- * 60kb divided in:
|
||||
- * - 32 blocks @ 256 bytes
|
||||
- * - 20 blocks @ 1024 bytes
|
||||
- * - 4 blocks @ 8192 bytes
|
||||
- */
|
||||
-
|
||||
-#define BLOCK_1_NUM 32
|
||||
-#define BLOCK_2_NUM 20
|
||||
-#define BLOCK_3_NUM 4
|
||||
-
|
||||
-#define BLOCK_1_SIZE 256
|
||||
-#define BLOCK_2_SIZE 1024
|
||||
-#define BLOCK_3_SIZE 8192
|
||||
-#define BLOCKS (BLOCK_1_NUM + BLOCK_2_NUM + BLOCK_3_NUM)
|
||||
-#define MAX_PAYLOAD_SIZE BLOCK_3_SIZE
|
||||
-#define PAYLOAD_AREA_SIZE 0xf000
|
||||
-
|
||||
struct isp1760_slotinfo {
|
||||
struct isp1760_qh *qh;
|
||||
struct isp1760_qtd *qtd;
|
||||
@@ -37,6 +19,17 @@ struct isp1760_slotinfo {
|
||||
};
|
||||
|
||||
/* chip memory management */
|
||||
+#define ISP176x_BLOCK_NUM 3
|
||||
+
|
||||
+struct isp1760_memory_layout {
|
||||
+ unsigned int blocks[ISP176x_BLOCK_NUM];
|
||||
+ unsigned int blocks_size[ISP176x_BLOCK_NUM];
|
||||
+
|
||||
+ unsigned int ptd_num;
|
||||
+ unsigned int payload_blocks;
|
||||
+ unsigned int payload_area_size;
|
||||
+};
|
||||
+
|
||||
struct isp1760_memory_chunk {
|
||||
unsigned int start;
|
||||
unsigned int size;
|
||||
@@ -59,12 +52,14 @@ struct isp1760_hcd {
|
||||
struct regmap *regs;
|
||||
struct regmap_field *fields[HC_FIELD_MAX];
|
||||
|
||||
+ const struct isp1760_memory_layout *memory_layout;
|
||||
+
|
||||
spinlock_t lock;
|
||||
- struct isp1760_slotinfo atl_slots[32];
|
||||
+ struct isp1760_slotinfo *atl_slots;
|
||||
int atl_done_map;
|
||||
- struct isp1760_slotinfo int_slots[32];
|
||||
+ struct isp1760_slotinfo *int_slots;
|
||||
int int_done_map;
|
||||
- struct isp1760_memory_chunk memory_pool[BLOCKS];
|
||||
+ struct isp1760_memory_chunk *memory_pool;
|
||||
struct list_head qh_list[QH_END];
|
||||
|
||||
/* periodic schedule support */
|
||||
--
|
||||
2.17.1
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -13,7 +13,6 @@ ARMBSPFILESPATHS := "${THISDIR}:${THISDIR}/files:"
|
||||
|
||||
# Arm platforms kmeta
|
||||
SRC_URI_KMETA = "file://arm-platforms-kmeta;type=kmeta;name=arm-platforms-kmeta;destsuffix=arm-platforms-kmeta"
|
||||
SRC_URI:append:corstone700 = " ${SRC_URI_KMETA}"
|
||||
SRC_URI:append:fvp-base = " ${SRC_URI_KMETA}"
|
||||
SRC_URI:append:fvp-base-arm32 = " ${SRC_URI_KMETA}"
|
||||
SRC_URI:append:fvp-baser-aemv8r64 = " ${SRC_URI_KMETA}"
|
||||
@@ -30,58 +29,6 @@ KMACHINE:corstone500 = "corstone500"
|
||||
KBUILD_DEFCONFIG:corstone500 = "multi_v7_defconfig"
|
||||
KCONFIG_MODE:corstone500 = "--alldefconfig"
|
||||
|
||||
#
|
||||
# Corstone-700 Machines
|
||||
#
|
||||
COMPATIBLE_MACHINE:corstone700 = "${MACHINE}"
|
||||
KMACHINE:corstone700 = "corstone700"
|
||||
KERNEL_IMAGETYPE:corstone700 = "xipImage"
|
||||
KCONFIG_MODE:corstone700 = "--alldefconfig"
|
||||
FILESEXTRAPATHS:prepend:corstone700 := "${ARMBSPFILESPATHS}"
|
||||
SRC_URI:append:corstone700 = " \
|
||||
file://0001-arm-support-for-a-single-ARMv7-A-based-platform.patch \
|
||||
file://0002-arm-Add-tiny-vexpress-machine.patch \
|
||||
file://0003-arm-introduce-corstone700_defconfig.patch \
|
||||
file://0004-add-driver-of-mailbox-handling-unit-controller-versi.patch \
|
||||
file://0005-add-rpmsg-based-on-rpmsg-char-driver-using-mailbox.patch \
|
||||
file://0006-enable-arm-MHU-driver-and-RPMSG-char-driver.patch \
|
||||
file://0007-allow-creation-of-multiple-arm-rpmsg-channels.patch \
|
||||
file://0008-mailbox-enable-combined-receiver-interrupt-when-usin.patch \
|
||||
file://0009-misc-arm-add-corstone700-external-system-harness-dri.patch \
|
||||
file://0010-arm-containerize-endpoint-and-mailbox-information.patch \
|
||||
file://0011-arm-couple-mailbox-channel-ownership-to-rpmsg-endpoi.patch \
|
||||
file://0012-mailbox-arm_mhu_v2-add-new-AMBA-ID-to-support-MHU-v2.patch \
|
||||
file://0013-mailbox-arm_mhu_v2-dynamic-allocation-of-channels.patch \
|
||||
file://0014-defconfig-adjust-XIP-physical-address-to-3MB-offset.patch \
|
||||
file://0015-arm-Kconfig-disable-ARM_VIRT-extension-if-XIP_KERNEL.patch \
|
||||
file://0016-corstone700_defconfig-use-DDR-address-instead-of-sha.patch \
|
||||
file://0017-corstone700_defconfig-enable-configs-for-cramfs-xip.patch \
|
||||
file://0018-usb-isp1760-move-to-regmap-for-register-access.patch \
|
||||
file://0019-usb-isp1760-hcd-refactor-mempool-config-and-setup.patch \
|
||||
file://0020-usb-isp1760-add-support-for-isp1763.patch \
|
||||
"
|
||||
|
||||
KERNEL_FEATURES:append:corstone700 = " bsp/arm-platforms/corstone700-bsp.scc"
|
||||
KERNEL_FEATURES:append:corstone700-fvp = " \
|
||||
${@bb.utils.contains('MACHINE_FEATURES', \
|
||||
'eth_lan91c111', \
|
||||
'bsp/arm-platforms/corstone700/xip_dhcp_cmdline.cfg \
|
||||
bsp/arm-platforms/corstone700/eth_lan91c111.scc', \
|
||||
'bsp/arm-platforms/corstone700/xip_cmdline.cfg', \
|
||||
d)}"
|
||||
KERNEL_FEATURES:append:corstone700-mps3 = " \
|
||||
${@bb.utils.contains('MACHINE_FEATURES', \
|
||||
'eth_lan9115', \
|
||||
'bsp/arm-platforms/corstone700/xip_dhcp_cmdline.cfg \
|
||||
bsp/arm-platforms/corstone700/eth_lan9115.scc', \
|
||||
'bsp/arm-platforms/corstone700/xip_cmdline.cfg', \
|
||||
d)} \
|
||||
${@bb.utils.contains('MACHINE_FEATURES', \
|
||||
'usb_host', \
|
||||
'bsp/arm-platforms/corstone700/usb_host.cfg', \
|
||||
'', \
|
||||
d)}"
|
||||
|
||||
#
|
||||
# Corstone1000 KMACHINE
|
||||
#
|
||||
|
||||
@@ -1,21 +0,0 @@
|
||||
SUMMARY = "CORSTONE700 systems communications tests"
|
||||
DESCRIPTION = "This is a Linux userspace tool to test the communication between Corstone700 cores"
|
||||
HOMEPAGE = "https://git.linaro.org/landing-teams/working/arm/test-apps.git"
|
||||
LICENSE = "BSD-3-Clause"
|
||||
LIC_FILES_CHKSUM = "file://license.md;md5=e44b2531cd6ffe9dece394dbe988d9a0"
|
||||
|
||||
SRC_URI = "git://git.linaro.org/landing-teams/working/arm/test-apps.git;protocol=https;branch=master"
|
||||
SRCREV = "ecd93a275d11cf08f670a97783110bd698250963"
|
||||
PV .= "~git${SRCPV}"
|
||||
|
||||
COMPATIBLE_MACHINE = "(corstone700)"
|
||||
|
||||
S = "${WORKDIR}/git"
|
||||
|
||||
do_compile() {
|
||||
${CC} ${S}/test-app.c ${CFLAGS} ${LDFLAGS} -o ${S}/test-app
|
||||
}
|
||||
|
||||
do_install() {
|
||||
install -D -p -m 0755 ${S}/test-app ${D}${bindir}/test-app
|
||||
}
|
||||
@@ -1,22 +0,0 @@
|
||||
# WIC partitioning for corstone700
|
||||
# Layout and maximum sizes:
|
||||
#
|
||||
# SPITOC: 1 KB
|
||||
# SE Ram FW: 32 KB
|
||||
# FIP image: 991 KB (composed of FIPTOC, BL32 and DTB)
|
||||
# XIP Cramfs rootfs: 2 MB
|
||||
# XIP Linux kernel: 3 MB
|
||||
#
|
||||
|
||||
part --source rawcopy --sourceparams="file=spitoc.bin" --no-table --align 1 --fixed-size 1k
|
||||
|
||||
part --source rawcopy --sourceparams="file=se_ramfw.bin" --no-table --align 1 --fixed-size 32k
|
||||
|
||||
# Rawcopy of the FIP binary
|
||||
part --source rawcopy --sourceparams="file=fip.bin-corstone700" --no-table --align 1 --fixed-size 991k
|
||||
|
||||
# Rawcopy of the rootfs
|
||||
part --source rawcopy --sourceparams="file=${IMGDEPLOYDIR}/arm-reference-image-${MACHINE}.cramfs-xip" --no-table --fixed-size 2
|
||||
|
||||
# Rawcopy of the kernel binary
|
||||
part --source rawcopy --sourceparams="file=xipImage" --no-table --fixed-size 4
|
||||
@@ -1,9 +0,0 @@
|
||||
require fvp-ecosystem.inc
|
||||
|
||||
MODEL = "Corstone-700"
|
||||
MODEL_CODE = "FVP_Corstone_700"
|
||||
PV = "11.10.47"
|
||||
|
||||
# Temporary SRC_URI as the URL structure is unconventional
|
||||
SRC_URI = "https://developer.arm.com/-/media/Arm%20Developer%20Community/Downloads/OSS/FVP/${MODEL}/Corstone-700-updated-11-10-47/${MODEL_CODE}_${PV_URL}.tgz;subdir=${BP}"
|
||||
SRC_URI[sha256sum] = "255207771864edeca2610958811d30e458c03a2db01950355a455513bad782ec"
|
||||
Reference in New Issue
Block a user