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arm-autonomy: Moved dynamic-layers/meta-gem5 to meta-gem5
Gem5 xen support in meta-arm-autonomy moved to meta-gem5 under dynamic-layers/meta-virtualization. Any dependencies on 'arm-autonomy-host' or 'arm-autonomy-guest' in DISTRO_FEATURES replaced with 'xen'. Issue-Id: SCM-2091 Signed-off-by: Nathan Dunne <Nathan.Dunne@arm.com> Change-Id: Ia2db68e2cd88c4277e8edc213aebb88d90c0cd23 Signed-off-by: Jon Mason <jon.mason@arm.com>
This commit is contained in:
@@ -34,7 +34,6 @@ USER_CLASSES_append = " arm-autonomy-features"
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BBFILES_DYNAMIC += " \
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meta-arm-bsp:${LAYERDIR}/dynamic-layers/meta-arm-bsp/*/*/*.bbappend \
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meta-arm-bsp:${LAYERDIR}/dynamic-layers/meta-arm-bsp/*/*/*.bb \
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meta-gem5:${LAYERDIR}/dynamic-layers/meta-gem5/*/*/*.bbappend \
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"
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# Root directory for the meta-arm-autonomy/dynamic-layers/meta-arm-bsp
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ARM_AUTONOMY_ARM_BSP_DYNAMIC_DIR = "${ARM_AUTONOMY_LAYERDIR}/dynamic-layers/meta-arm-bsp"
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@@ -1 +0,0 @@
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XENGUEST_NETWORK_BRIDGE_MEMBERS_gem5-arm64 ?= "eth0"
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@@ -1,15 +0,0 @@
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FILESEXTRAPATHS_prepend_gem5-arm64 := "${THISDIR}:"
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#
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# arm-autonomy kmeta extra
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#
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SRC_URI_append_gem5-arm64 = " file://arm-autonomy-kmeta-extra-gem5;type=kmeta;name=arm-autonomy-kmeta-extra-gem5;destsuffix=arm-autonomy-kmeta-extra-gem5"
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# We need to turn off SVE support in the Linux kernel otherwise Xen is stopping
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# Linux kernel with a coredump while trying to access XEN bit of CPACR1 core
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# register.
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LINUX_ARM_AUTONOMY_DISABLE_ARM64_SVE_gem5-arm64 = "${@bb.utils.contains_any('DISTRO_FEATURES', \
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'arm-autonomy-host arm-autonomy-guest', \
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' features/arm-autonomy/disable-arm64-sve.scc','',d)}"
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KERNEL_FEATURES_append_gem5-arm64 = "${LINUX_ARM_AUTONOMY_DISABLE_ARM64_SVE}"
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@@ -12,3 +12,8 @@ BBFILE_PRIORITY_meta-gem5 = "5"
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LAYERDEPENDS_meta-gem5 = "core openembedded-layer meta-arm"
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LAYERSERIES_COMPAT_meta-gem5 = "gatesgarth"
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BBFILES_DYNAMIC += " \
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virtualization-layer:${LAYERDIR}/dynamic-layers/meta-virtualization/*/*/*.bbappend \
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"
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DISTRO_FEATURES_NATIVE_append = " ${@bb.utils.filter('DISTRO_FEATURES', 'xen', d)}"
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@@ -1,7 +1,7 @@
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# When booting gem5-arm64 with Xen we need to set the cpu as Cortex A53 and
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# remove support for pointer authentification
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GEM5_RUN_EXTRA_append = " \
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${@bb.utils.contains('DISTRO_FEATURES_NATIVE', 'arm-autonomy-host', \
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${@bb.utils.contains('DISTRO_FEATURES_NATIVE', 'xen', \
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'--param=system.cpu_cluster[0].cpus[0].isa[0].midr=0x410fd030 \
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--param=system.cpu_cluster[0].cpus[0].isa[0].id_aa64isar1_el1=0x0', \
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'', d)}"
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@@ -0,0 +1,14 @@
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FILESEXTRAPATHS_prepend_gem5-arm64 := "${THISDIR}:"
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#
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# virtualization kmeta extra
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#
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SRC_URI_append_gem5-arm64 = " file://virtualization-kmeta-extra-gem5;type=kmeta;name=virtualization-kmeta-extra-gem5;destsuffix=virtualization-kmeta-extra-gem5"
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# We need to turn off SVE support in the Linux kernel otherwise Xen is stopping
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# Linux kernel with a coredump while trying to access XEN bit of CPACR1 core
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# register.
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LINUX_VIRTUALIZATION_DISABLE_ARM64_SVE_gem5-arm64 = "${@bb.utils.contains('DISTRO_FEATURES', \
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'xen', ' features/disable-arm64-sve.scc','',d)}"
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KERNEL_FEATURES_append_gem5-arm64 = "${LINUX_VIRTUALIZATION_DISABLE_ARM64_SVE}"
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@@ -0,0 +1,38 @@
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From c47920d81c4c29e8c868c005ff4330c46becbad5 Mon Sep 17 00:00:00 2001
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From: Giacomo Travaglini <giacomo.travaglini@arm.com>
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Date: Wed, 03 Mar 2021 11:38:06 +0000
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Subject: [PATCH] arch-arm: Fix atomics permission checks in TLB
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For stage 2 translations, atomic accesses were not checking the
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access permission bits in the page table descriptors, and were
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instead wrongly using the nature of the request itself
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(r/w booleans).
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Change-Id: I27fbc95f04ea659e77ad5a3afb551873c9c971f0
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Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42073
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Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
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Reviewed-by: Richard Cooper <richard.cooper@arm.com>
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Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
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Maintainer: Jason Lowe-Power <power.jg@gmail.com>
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Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
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Tested-by: kokoro <noreply+kokoro@google.com>
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Upstream-Status: Backport
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Signed-off-By: Nathan Dunne <nathan.dunne@arm.com>
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---
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diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
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index fd72d25..8e5b3ca 100644
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--- a/src/arch/arm/tlb.cc
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+++ b/src/arch/arm/tlb.cc
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@@ -872,8 +872,7 @@
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// sctlr.wxn overrides the xn bit
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grant = !wxn && !xn;
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} else if (is_atomic) {
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- grant = r && w;
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- grant_read = r;
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+ grant = hap;
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} else if (is_write) {
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grant = hap & 0x2;
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} else { // is_read
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@@ -1,6 +1,7 @@
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require gem5-source_20.inc
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SRC_URI += "file://0001-dev-arm-SMMUv3-enable-interrupt-interface.patch"
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SRC_URI += "file://0001-dev-arm-SMMUv3-enable-interrupt-interface.patch \
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file://0002-arch-arm-Fix-atomics-permission-checks-in-TLB.patch"
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BPN = "gem5-aarch64-native"
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