mirror of
https://git.yoctoproject.org/meta-arm
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arm-bsp/trusted-firmware-a: remove unneeded patches
Patches (and recipe support) were added for qemuarm64-secureboot support, but that is not present in meta-arm-bsp. Remove it. Signed-off-by: Jon Mason <jon.mason@arm.com>
This commit is contained in:
Jon Mason
@@ -1,67 +0,0 @@
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From e1cbb35ad4655fe13ccb89247c81e850f6392c92 Mon Sep 17 00:00:00 2001
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From: Gyorgy Szing <Gyorgy.Szing@arm.com>
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Date: Mon, 13 Mar 2023 21:15:59 +0100
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Subject: Add spmc_manifest for qemu
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This version only supports embedded packaging.
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Upstream-Status: Inappropriate [other]
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- The SPMC manifest is integration specific and should live at an
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integration spcific place. The manifest file is processed by TF-A
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and I am adding the patch to TF-A to keep things simple.
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Signed-off-by: Gyorgy Szing <Gyorgy.Szing@arm.com>
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---
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plat/qemu/fdts/optee_spmc_manifest.dts | 40 ++++++++++++++++++++++++++
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1 file changed, 40 insertions(+)
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create mode 100644 plat/qemu/fdts/optee_spmc_manifest.dts
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diff --git a/plat/qemu/fdts/optee_spmc_manifest.dts b/plat/qemu/fdts/optee_spmc_manifest.dts
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new file mode 100644
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index 000000000..ae2ae3d95
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--- /dev/null
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+++ b/plat/qemu/fdts/optee_spmc_manifest.dts
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@@ -0,0 +1,40 @@
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+/* SPDX-License-Identifier: BSD-3-Clause */
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+/*
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+ * Copyright (c) 2023, Arm Limited. All rights reserved.
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+ */
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+
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+/dts-v1/;
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+
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+/ {
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+ compatible = "arm,ffa-core-manifest-1.0";
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+ #address-cells = <2>;
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+ #size-cells = <1>;
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+
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+ attribute {
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+ spmc_id = <0x8000>;
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+ maj_ver = <0x1>;
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+ min_ver = <0x0>;
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+ exec_state = <0x0>;
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+ load_address = <0x0 0x0e100000>;
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+ entrypoint = <0x0 0x0e100000>;
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+ binary_size = <0x80000>;
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+ };
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+
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+/*
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+ * This file will be preprocessed by TF-A's build system. If Measured Boot is
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+ * enabled in TF-A's config, the build system will add the MEASURED_BOOT=1 macro
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+ * to the preprocessor arguments.
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+ */
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+#if MEASURED_BOOT
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+ tpm_event_log {
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+ compatible = "arm,tpm_event_log";
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+ tpm_event_log_addr = <0x0 0x0>;
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+ tpm_event_log_size = <0x0>;
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+ };
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+#endif
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+
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+/* If the ARM_BL2_SP_LIST_DTS is defined, SPs should be loaded from FIP */
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+#ifdef ARM_BL2_SP_LIST_DTS
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+ #error "FIP SP load addresses configuration is missing.
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+#endif
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+};
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--
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2.39.1.windows.1
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-263
@@ -1,263 +0,0 @@
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From d215b0c08e51192baab96d75beaeacf3abf8724e Mon Sep 17 00:00:00 2001
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From: Jens Wiklander <jens.wiklander@linaro.org>
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Date: Fri, 18 Nov 2022 15:40:04 +0100
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Subject: feat(qemu): update abi between spmd and spmc
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Updates the ABI between SPMD and the SPMC at S-EL1 so that the hard
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coded SPMC manifest can be replaced by a proper manifest via TOS FW
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Config. TOS FW Config is provided via QEMU_TOS_FW_CONFIG_DTS as a DTS
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file when building. The DTS is turned into a DTB which is added to the
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FIP.
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Note that this is an incompatible change and requires corresponding
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change in OP-TEE ("core: sel1 spmc: boot abi update").
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Upstream-Status: Accepted
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Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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Change-Id: Ibabe78ef50a24f775492854ce5ac54e4d471e369
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---
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plat/qemu/common/qemu_bl2_mem_params_desc.c | 18 +++++++++++-
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plat/qemu/common/qemu_bl2_setup.c | 32 +++++++++++++--------
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plat/qemu/common/qemu_io_storage.c | 16 ++++++++++-
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plat/qemu/common/qemu_spmd_manifest.c | 31 --------------------
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plat/qemu/qemu/include/platform_def.h | 3 ++
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plat/qemu/qemu/platform.mk | 12 +++++++-
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6 files changed, 66 insertions(+), 46 deletions(-)
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delete mode 100644 plat/qemu/common/qemu_spmd_manifest.c
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diff --git a/plat/qemu/common/qemu_bl2_mem_params_desc.c b/plat/qemu/common/qemu_bl2_mem_params_desc.c
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index 5af3a2264..8d8047c92 100644
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--- a/plat/qemu/common/qemu_bl2_mem_params_desc.c
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+++ b/plat/qemu/common/qemu_bl2_mem_params_desc.c
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@@ -1,5 +1,5 @@
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/*
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- * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved.
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+ * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@@ -122,6 +122,22 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
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#endif
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.next_handoff_image_id = INVALID_IMAGE_ID,
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},
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+
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+#if defined(SPD_spmd)
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+ /* Fill TOS_FW_CONFIG related information */
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+ {
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+ .image_id = TOS_FW_CONFIG_ID,
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+ SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
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+ VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
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+ SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY,
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+ VERSION_2, image_info_t, 0),
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+ .image_info.image_base = TOS_FW_CONFIG_BASE,
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+ .image_info.image_max_size = TOS_FW_CONFIG_LIMIT -
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+ TOS_FW_CONFIG_BASE,
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+ .next_handoff_image_id = INVALID_IMAGE_ID,
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+ },
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+#endif
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+
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# endif /* QEMU_LOAD_BL32 */
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/* Fill BL33 related information */
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diff --git a/plat/qemu/common/qemu_bl2_setup.c b/plat/qemu/common/qemu_bl2_setup.c
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index 2c0da15b9..6afa3a44d 100644
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--- a/plat/qemu/common/qemu_bl2_setup.c
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+++ b/plat/qemu/common/qemu_bl2_setup.c
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@@ -1,5 +1,5 @@
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/*
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- * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
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+ * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@@ -149,8 +149,7 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id)
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bl_mem_params_node_t *paged_mem_params = NULL;
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#endif
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#if defined(SPD_spmd)
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- unsigned int mode_rw = MODE_RW_64;
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- uint64_t pagable_part = 0;
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+ bl_mem_params_node_t *bl32_mem_params = NULL;
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#endif
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assert(bl_mem_params);
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@@ -170,17 +169,18 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id)
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if (err != 0) {
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WARN("OPTEE header parse error.\n");
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}
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-#if defined(SPD_spmd)
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- mode_rw = bl_mem_params->ep_info.args.arg0;
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- pagable_part = bl_mem_params->ep_info.args.arg1;
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-#endif
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#endif
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-#if defined(SPD_spmd)
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- bl_mem_params->ep_info.args.arg0 = ARM_PRELOADED_DTB_BASE;
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- bl_mem_params->ep_info.args.arg1 = pagable_part;
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- bl_mem_params->ep_info.args.arg2 = mode_rw;
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- bl_mem_params->ep_info.args.arg3 = 0;
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+#if defined(SPMC_OPTEE)
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+ /*
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+ * Explicit zeroes to unused registers since they may have
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+ * been populated by parse_optee_header() above.
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+ *
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+ * OP-TEE expects system DTB in x2 and TOS_FW_CONFIG in x0,
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+ * the latter is filled in below for TOS_FW_CONFIG_ID and
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+ * applies to any other SPMC too.
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+ */
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+ bl_mem_params->ep_info.args.arg2 = ARM_PRELOADED_DTB_BASE;
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#elif defined(SPD_opteed)
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/*
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* OP-TEE expect to receive DTB address in x2.
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@@ -224,6 +224,14 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id)
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bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl33_entry();
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break;
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+#if defined(SPD_spmd)
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+ case TOS_FW_CONFIG_ID:
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+ /* An SPMC expects TOS_FW_CONFIG in x0/r0 */
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+ bl32_mem_params = get_bl_mem_params_node(BL32_IMAGE_ID);
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+ bl32_mem_params->ep_info.args.arg0 =
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+ bl_mem_params->image_info.image_base;
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+ break;
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+#endif
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default:
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/* Do nothing in default case */
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break;
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diff --git a/plat/qemu/common/qemu_io_storage.c b/plat/qemu/common/qemu_io_storage.c
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index 1107e443f..e2d4932c0 100644
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--- a/plat/qemu/common/qemu_io_storage.c
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+++ b/plat/qemu/common/qemu_io_storage.c
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@@ -1,5 +1,5 @@
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/*
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- * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
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+ * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@@ -24,6 +24,7 @@
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#define BL2_IMAGE_NAME "bl2.bin"
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#define BL31_IMAGE_NAME "bl31.bin"
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#define BL32_IMAGE_NAME "bl32.bin"
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+#define TOS_FW_CONFIG_NAME "tos_fw_config.dtb"
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#define BL32_EXTRA1_IMAGE_NAME "bl32_extra1.bin"
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#define BL32_EXTRA2_IMAGE_NAME "bl32_extra2.bin"
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#define BL33_IMAGE_NAME "bl33.bin"
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@@ -78,6 +79,10 @@ static const io_uuid_spec_t bl32_extra2_uuid_spec = {
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.uuid = UUID_SECURE_PAYLOAD_BL32_EXTRA2,
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};
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+static const io_uuid_spec_t tos_fw_config_uuid_spec = {
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+ .uuid = UUID_TOS_FW_CONFIG,
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+};
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+
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static const io_uuid_spec_t bl33_uuid_spec = {
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.uuid = UUID_NON_TRUSTED_FIRMWARE_BL33,
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};
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@@ -137,6 +142,10 @@ static const io_file_spec_t sh_file_spec[] = {
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.path = BL32_EXTRA2_IMAGE_NAME,
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.mode = FOPEN_MODE_RB
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},
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+ [TOS_FW_CONFIG_ID] = {
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+ .path = TOS_FW_CONFIG_NAME,
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+ .mode = FOPEN_MODE_RB
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+ },
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[BL33_IMAGE_ID] = {
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.path = BL33_IMAGE_NAME,
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.mode = FOPEN_MODE_RB
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@@ -252,6 +261,11 @@ static const struct plat_io_policy policies[] = {
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open_fip
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},
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#endif
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+ [TOS_FW_CONFIG_ID] = {
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+ &fip_dev_handle,
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+ (uintptr_t)&tos_fw_config_uuid_spec,
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+ open_fip
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+ },
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[BL33_IMAGE_ID] = {
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&fip_dev_handle,
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(uintptr_t)&bl33_uuid_spec,
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diff --git a/plat/qemu/common/qemu_spmd_manifest.c b/plat/qemu/common/qemu_spmd_manifest.c
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deleted file mode 100644
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index fd46e2675..000000000
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--- a/plat/qemu/common/qemu_spmd_manifest.c
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+++ /dev/null
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@@ -1,31 +0,0 @@
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-/*
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- * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
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- *
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- * SPDX-License-Identifier: BSD-3-Clause
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- */
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-
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-#include <assert.h>
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-
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-#include <services/spm_core_manifest.h>
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-
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-#include <plat/common/platform.h>
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-#include <platform_def.h>
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-
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-int plat_spm_core_manifest_load(spmc_manifest_attribute_t *manifest,
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- const void *pm_addr)
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-{
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- entry_point_info_t *ep_info = bl31_plat_get_next_image_ep_info(SECURE);
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-
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- assert(ep_info != NULL);
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- assert(manifest != NULL);
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-
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- manifest->major_version = 1;
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- manifest->minor_version = 0;
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- manifest->exec_state = ep_info->args.arg2;
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- manifest->load_address = BL32_BASE;
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- manifest->entrypoint = BL32_BASE;
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- manifest->binary_size = BL32_LIMIT - BL32_BASE;
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- manifest->spmc_id = 0x8000;
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-
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- return 0;
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-}
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diff --git a/plat/qemu/qemu/include/platform_def.h b/plat/qemu/qemu/include/platform_def.h
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index c9ed6409f..5c3239cb8 100644
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--- a/plat/qemu/qemu/include/platform_def.h
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+++ b/plat/qemu/qemu/include/platform_def.h
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@@ -118,6 +118,9 @@
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#define BL_RAM_BASE (SHARED_RAM_BASE + SHARED_RAM_SIZE)
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#define BL_RAM_SIZE (SEC_SRAM_SIZE - SHARED_RAM_SIZE)
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+#define TOS_FW_CONFIG_BASE BL_RAM_BASE
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+#define TOS_FW_CONFIG_LIMIT (TOS_FW_CONFIG_BASE + PAGE_SIZE)
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+
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/*
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* BL1 specific defines.
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*
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diff --git a/plat/qemu/qemu/platform.mk b/plat/qemu/qemu/platform.mk
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index 6becc32fa..02493025a 100644
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--- a/plat/qemu/qemu/platform.mk
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+++ b/plat/qemu/qemu/platform.mk
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@@ -212,7 +212,10 @@ BL31_SOURCES += lib/cpus/aarch64/aem_generic.S \
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${QEMU_GIC_SOURCES}
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ifeq (${SPD},spmd)
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-BL31_SOURCES += plat/qemu/common/qemu_spmd_manifest.c
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+BL31_SOURCES += plat/common/plat_spmd_manifest.c \
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+ common/uuid.c \
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+ ${LIBFDT_SRCS} \
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+ ${FDT_WRAPPERS_SOURCES}
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endif
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endif
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@@ -233,6 +236,13 @@ $(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
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endif
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endif
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+ifneq ($(QEMU_TOS_FW_CONFIG_DTS),)
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+FDT_SOURCES += ${QEMU_TOS_FW_CONFIG_DTS}
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+QEMU_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${QEMU_TOS_FW_CONFIG_DTS})).dtb
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+# Add the TOS_FW_CONFIG to FIP
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+$(eval $(call TOOL_ADD_PAYLOAD,${QEMU_TOS_FW_CONFIG},--tos-fw-config,${QEMU_TOS_FW_CONFIG}))
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+endif
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+
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SEPARATE_CODE_AND_RODATA := 1
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ENABLE_STACK_PROTECTOR := 0
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ifneq ($(ENABLE_STACK_PROTECTOR), 0)
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--
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2.39.1.windows.1
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@@ -6,12 +6,6 @@ SRCBRANCH = "lts-v2.8"
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SRC_URI += "file://rwx-segments.patch"
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# Enable passing TOS_FW_CONFIG from FIP package to Trusted OS.
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SRC_URI:append:qemuarm64-secureboot = " \
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file://add-spmc_manifest-for-qemu.patch \
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file://feat-qemu-update-abi-between-spmd-and-spmc.patch \
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"
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LIC_FILES_CHKSUM += "file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde"
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# mbed TLS v2.28.2
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Block a user