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mirror of https://git.yoctoproject.org/meta-arm synced 2026-01-11 15:00:39 +00:00

Add support for Gem5 for arm64

Add Yocto support for Gem5:
- add kernel configuration
- add recipes to build an image using boot-wrapper-aarch64
- add recipes to build Gem5 native to run the produced image
- add script to start image using gem5
- add recipe to create a dtb using gem5
- add recipe to build an image using gem5 boot wrapper
- add dts to linux kernel for gem5 for arm64
- add scons for python2 as this is required to build gem5 (until gem5
will support python3)
- add xen patch to limit number of interrupts if hardware is claiming to
have to more interrupts then the number supported by xen

When an image has been built it can be directly started using gem5 using
this command (console is available using telnet localhost 3456):
./tmp/deploy/tools/start-gem5.sh

Change-Id: Iec5ef735fc22643685e29ffbdaf63a55b1111c60
Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
This commit is contained in:
Bertrand Marquis
2019-12-04 18:05:34 +00:00
parent 4ff58c5f89
commit c601acec48
34 changed files with 1361 additions and 0 deletions

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# Configuration for gem5 running on ARM64
#@TYPE: Machine
#@NAME: Gem5 arm64 machine
#@DESCRIPTION: Machine configuration for Gem5 arm64
TUNE_FEATURES = "aarch64"
require conf/machine/include/arm/arch-armv8a.inc
MACHINE_FEATURES = "optee pci"
KERNEL_IMAGETYPES = "Image vmlinux"
KERNEL_IMAGETYPE = "Image"
IMAGE_FSTYPES += "tar.bz2 ext4"
SERIAL_CONSOLES = "115200;ttyAMA0"
EXTRA_IMAGEDEPENDS += " virtual/gem5-bootloader"
PREFERRED_PROVIDER_virtual/kernel = "linux-yocto"
PREFERRED_VERSION_linux-yocto ?= "4.19%"
# Uncomment the following if you need to build gem5 provided bootloader, else
# using standard bootloader by Linux aarch64
# Use gem5 provided bootloader
# PREFERRED_PROVIDER_virtual/gem5-bootloader = "gem5-aarch64-bootloader"
# use the dtb stored in the kernel recipe
# KERNEL_DEVICETREE ?= "gem5-arm64/armv8_gem5_v2_4cpu.dtb"
# Use Linux aarch64 boot wrapper with FDT support and generated
# dtb (gem5-aarch64-dtb.bb)
PREFERRED_PROVIDER_virtual/gem5-bootloader = "boot-wrapper-aarch64"
# Fix command line in the axf file
BOOT_WRAPPER_AARCH64_CMDLINE = "${@bb.utils.contains('DISTRO_FEATURES', 'xen',\
'console=hvc0 root=/dev/vda rw', \
'earlyprintk=pl011,0x1c090000 console=ttyAMA0 root=/dev/vda rw mem=1G', \
d)}"
# Use baremetal profile and axf file so dtb is in axf file
GEM5_RUN_PROFILE = "configs/example/arm/baremetal.py"
GEM5_RUN_KERNEL = "linux-system.axf"
GEM5_RUN_EXTRA = ""
GEM5_RUN_DTB = ""
GEM5_RUN_CMDLINE = ""
EXTRA_IMAGEDEPENDS += "gem5-aarch64-native"
# Xen configuration
XEN_CONFIG_EARLY_PRINTK = "vexpress"
BOOT_WRAPPER_AARCH64_XEN_CMDLINE = "noreboot dom0_mem=256M console=dtuart \
dtuart=/uart@1c090000 bootscrub=0"

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# Gem5 Arm64 Platform Support in meta-arm-platforms
## Howto Build and Run
### Configuration:
In the local.conf file, MACHINE should be set as follow:
MACHINE ?= "gem5-arm64"
### Build:
```bash$ bitbake core-image-minimal```
### Run:
After compilation of an image, you can execute it using the compiled gem5
with the followin command:
```./tmp/deploy/tools/start-gem5.sh```
You can modify the script to change the command line options of gem5.
## Devices supported in the kernel
- serial
### Untested:
- pci
- sata
- ide
## Devices not supported or not functional

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SUMMARY = "Linux aarch64 boot wrapper with FDT support"
LICENSE = "BSD"
inherit autotools deploy
PROVIDES = "virtual/gem5-bootloader boot-wrapper-aarch64"
PACKAGE_ARCH = "${MACHINE_ARCH}"
COMPATIBLE_MACHINE ?= ""
# Device tree to put in the image
# by default use the standard kernel devicetree
# This should be overwritten if the devicetree is not generated
# by the kernel.
# This should point to a file in the deploy image directory
BOOT_WRAPPER_AARCH64_DEVICETREE ??= "${KERNEL_DEVICETREE}"
# Kernel image to put in the image
# This should point to a file in the deploy image directory
BOOT_WRAPPER_AARCH64_KERNEL ??= "Image"
# Kernel command line for the image
BOOT_WRAPPER_AARCH64_CMDLINE ??= "rw"
# Xen image to put in the image
# This should point to a file in the deploy image directory
BOOT_WRAPPER_AARCH64_XEN ??= "xen-${MACHINE}"
# Xen command line for the image
BOOT_WRAPPER_AARCH64_XEN_CMDLINE ??= "noreboot dom0_mem=256M"
# Image generated by boot wrapper
BOOT_WRAPPER_AARCH64_IMAGE ?= "${@bb.utils.contains('DISTRO_FEATURES', 'xen', \
'xen-system.axf', 'linux-system.axf', d)}"
DEPENDS += " virtual/kernel dtc-native"
EXTRA_OECONF_append = " --with-kernel-dir=${WORKDIR}/kernel"
EXTRA_OECONF_append = " --with-dtb=${WORKDIR}/kernel/dummy.dtb"
EXTRA_OECONF_append = " --with-cmdline=\"\""
EXTRA_OECONF_append = " --enable-psci --enable-gicv3"
EXTRA_OECONF_append = " ${@bb.utils.contains('DISTRO_FEATURES', 'xen', \
'--with-xen=${WORKDIR}/kernel/arch/arm64/boot/Image', '', d)}"
EXTRA_OECONF_append = " ${@bb.utils.contains('DISTRO_FEATURES', 'xen', \
'--with-xen-cmdline=\"\"', '', d)}"
# unset LDFLAGS solves this error when compiling kernel modules:
# aarch64-poky-linux-ld: unrecognized option '-Wl,-O1'
EXTRA_OEMAKE_append = " 'LDFLAGS= --gc-sections '"
# Strip prefix if any
REAL_DTB = "${@os.path.basename(d.getVar('BOOT_WRAPPER_AARCH64_DEVICETREE'))}"
EXTRA_OEMAKE_append = " 'KERNEL_DTB=${DEPLOY_DIR_IMAGE}/${REAL_DTB}'"
EXTRA_OEMAKE_append = " 'KERNEL_IMAGE=${DEPLOY_DIR_IMAGE}/${BOOT_WRAPPER_AARCH64_KERNEL}'"
EXTRA_OEMAKE_append = " 'CMDLINE=${BOOT_WRAPPER_AARCH64_CMDLINE}'"
EXTRA_OEMAKE_append = " ${@bb.utils.contains('DISTRO_FEATURES', 'xen', \
'XEN_IMAGE=${DEPLOY_DIR_IMAGE}/${BOOT_WRAPPER_AARCH64_XEN}', '', d)}"
EXTRA_OEMAKE_append = " ${@bb.utils.contains('DISTRO_FEATURES', 'xen', \
'XEN_CMDLINE=\"${BOOT_WRAPPER_AARCH64_XEN_CMDLINE}\"', '', d)}"
do_configure_prepend() {
# Create dummy files to make configure happy.
# We will pass the generated ones directly to make.
mkdir -p ${WORKDIR}/kernel/arch/arm64/boot
echo "dummy" > ${WORKDIR}/kernel/arch/arm64/boot/Image
echo "dummy" > ${WORKDIR}/kernel/dummy.dtb
# Generate configure
(cd ${S} && autoreconf -i || exit 1)
}
do_compile[noexec] = "1"
do_install[noexec] = "1"
# We need the kernel to create an image
do_deploy[depends] += " virtual/kernel:do_deploy"
# We need xen if it is activated
do_deploy[depends] += " ${@bb.utils.contains('DISTRO_FEATURES', 'xen', 'xen:do_deploy', '', d)}"
do_deploy() {
if [ ! -f ${DEPLOY_DIR_IMAGE}/${REAL_DTB} ]; then
echo "ERROR: cannot find ${REAL_DTB} in ${DEPLOY_DIR_IMAGE}" >&2
echo "Please check your BOOT_WRAPPER_AARCH64_DEVICETREE settings" >&2
exit 1
fi
if [ ! -f ${DEPLOY_DIR_IMAGE}/${BOOT_WRAPPER_AARCH64_KERNEL} ]; then
echo "ERROR: cannot find ${BOOT_WRAPPER_AARCH64_KERNEL}" \
" in ${DEPLOY_DIR_IMAGE}" >&2
echo "Please check your BOOT_WRAPPER_AARCH64_KERNEL settings" >&2
exit 1
fi
oe_runmake clean
oe_runmake all
install -D -p -m 644 ${BOOT_WRAPPER_AARCH64_IMAGE} \
${DEPLOYDIR}/linux-system.axf
}
addtask deploy before do_build after do_compile

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LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=bb63326febfb5fb909226c8e7ebcef5c"
SRC_URI = "git://git.kernel.org/pub/scm/linux/kernel/git/mark/boot-wrapper-aarch64.git"
PV = "git${SRCPV}"
S = "${WORKDIR}/git"
SRCREV = "fd74c8cbd0e17483d2299208cad9742bee605ca7"
BPN = "boot-wrapper-aarch64"
require boot-wrapper-aarch64.inc
# Gem5 aarch64 support
COMPATIBLE_MACHINE_gem5_arm64 = "gem5-arm64"
# For gem5 we use the dtb generated by gem5 directly
DEPENDS_append_gem5-arm64 = " gem5-aarch64-dtb"
BOOT_WRAPPER_AARCH64_DEVICETREE_gem5-arm64 = "gem5-aarch64.dtb"
# The dtb must be generated for us to generate the axf
DEPLOY_DEPEND_LIST ?= ""
DEPLOY_DEPEND_LIST_gem5-arm64 = " gem5-aarch64-dtb:do_deploy"
do_deploy[depends] += "${DEPLOY_DEPEND_LIST}"

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#!/bin/bash
# Get parameters from bitbake configuration
source <(bitbake -e gem5-aarch64-native | grep \
-e "^STAGING_.*_NATIVE=" \
-e "^DEPLOY_DIR.*=" \
-e "^GEM5_RUN.*=")
export M5_PATH="${DEPLOY_DIR_IMAGE}"
args=""
if [ -n "${GEM5_RUN_KERNEL}" ]; then
kernfile=$(readlink -f ${DEPLOY_DIR_IMAGE}/${GEM5_RUN_KERNEL})
args="$args --kernel=$kernfile"
fi
if [ -n "${GEM5_RUN_DISK}" ]; then
diskfile=$(readlink -f ${DEPLOY_DIR_IMAGE}/${GEM5_RUN_DISK})
args="$args --disk-image=$diskfile"
fi
if [ -n "${GEM5_RUN_DTB}" ]; then
dtbfile=$(readlink -f ${DEPLOY_DIR_IMAGE}/${GEM5_RUN_DTB})
args="$args --dtb=$dtbfile"
fi
if [ -n "${GEM5_RUN_CMDLINE}" ]; then
args="$args --command-line='${GEM5_RUN_CMDLINE}'"
fi
if [ -n "${GEM5_RUN_EXTRA}" ]; then
args="$args ${GEM5_RUN_EXTRA}"
fi
${STAGING_BINDIR_NATIVE}/${GEM5_RUN_CONFIG} \
${STAGING_DATADIR_NATIVE}/gem5/${GEM5_RUN_PROFILE} ${args} "$@"

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# Build instructions for gem5 custom bootloader
SUMMARY = "Gem5 AARCH64 boot loader"
LICENSE = "BSD"
inherit deploy
PROVIDES = "virtual/gem5-bootloader"
COMPATIBLE_MACHINE ?= ""
COMPATIBLE_MACHINE_gem5_arm64 = "gem5-arm64"
# no configure step
do_configure[noexec] = "1"
# no install
do_install[noexec] = "1"
do_compile() {
oe_runmake -C system/arm/aarch64_bootloader all CROSS_COMPILE=${TARGET_PREFIX}
}
do_deploy() {
oe_runmake -C system/arm/aarch64_bootloader install \
CROSS_COMPILE=${TARGET_PREFIX} DESTDIR=${DEPLOYDIR}/binaries
}
addtask deploy before do_build after do_compile

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# gem5 custom bootloader
FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
SRC_URI = "git://gem5.googlesource.com/public/gem5;protocol=https"
LIC_FILES_CHKSUM = "file://COPYING;md5=2d9514d69d8abf88b6e9125e759bf0ab \
file://LICENSE;md5=a585e2893cee63d16a1d8bc16c6297ec"
PV = "git${SRCPV}"
S = "${WORKDIR}/git"
SRCREV = "bcf041f257623e5c9e77d35b7531bae59edc0423"
BPN = "gem5-aarch64-bootloader"
require gem5-aarch64-bootloader.inc

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# Use gem5 executable to produce a dtb
LICENSE = "MIT"
inherit deploy
DEPENDS = "gem5-aarch64-native"
do_configure[noexec] = "1"
do_compile() {
# Gem5 is requiring a non zero size disk even though it is not required to
# generate the dtb. Use /proc/version as disk file.
# generate a dtb using gem5
gem5.opt \
${STAGING_DATADIR_NATIVE}/gem5/configs/example/arm/baremetal.py \
--disk-image /proc/version \
--kernel "" \
--dtb-gen
if [ ! -f m5out/system.dtb ]; then
echo "No dtb generated !!!"
exit 1
fi
}
do_install[noexec] = "1"
do_deploy() {
install --d ${DEPLOYDIR}
cp m5out/system.dtb ${DEPLOYDIR}/gem5-aarch64.dtb
}
addtask deploy before do_build after do_compile

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# gem5 aarch64 specific configuration
# Build arm64 gem5
GEM5_BUILD_CONFIGS ?= "build/ARM/gem5.opt build/ARM/gem5.fast \
build/ARM/gem5.debug"
SRC_URI += " file://start-gem5.sh"
inherit deploy
# Parameters for the start script
GEM5_RUN_CONFIG ?= "gem5.fast"
# Linux kernel file to boot
GEM5_RUN_KERNEL ?= "vmlinux"
# Disk Image to use
GEM5_RUN_DISK ?= "*-${MACHINE}.ext4"
# DTB to use
GEM5_RUN_DTB ?= "${@os.path.basename(d.getVar('KERNEL_DEVICETREE'))}"
# Linux command line to pass
GEM5_RUN_CMDLINE ?= "--command-line='earlyprintk=pl011,0x1c090000 \
console=ttyAMA0 rw mem=512MB root=/dev/sda rootwait'"
# Extra arguments to pass to gem5
GEM5_RUN_EXTRA ?= "--mem-size=512MB -n 4 --machine-type=VExpress_GEM5_V2"
#This is required so that our binaries are in the sysroot. We need this
# to have both gem5 required libraries and gem5 in the same sysroot.
addtask addto_recipe_sysroot after do_populate_sysroot before do_build
do_deploy[sstate-outputdirs] = "${DEPLOY_DIR_TOOLS}"
do_deploy() {
install -d ${DEPLOYDIR}
install -m 755 ${WORKDIR}/start-gem5.sh ${DEPLOYDIR}/.
}
addtask deploy before do_build after do_compile

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# gem5 simulator source and checksum information
LIC_FILES_CHKSUM = "file://COPYING;md5=2d9514d69d8abf88b6e9125e759bf0ab \
file://LICENSE;md5=a585e2893cee63d16a1d8bc16c6297ec"
SRC_URI = "git://gem5.googlesource.com/public/gem5;protocol=https"
PV = "git${SRCPV}"
S = "${WORKDIR}/git"
SRCREV = "bcf041f257623e5c9e77d35b7531bae59edc0423"
BPN = "gem5-aarch64-native"
require gem5-aarch64-native.inc
require gem5-native.inc

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# gem5 platform independent build information
SUMMARY = "A modular platform for computer-system architecture research"
HOMEPAGE = "http://gem5.org"
LICENSE = "BSD & MIT & LGPLv2.1"
# Gem5 build and run parameter
# What gem5 binary are we building
GEM5_BUILD_CONFIGS ?= "build/X86/gem5.opt"
# Scons build arguments
GEM5_SCONS_ARGS ?= "-j ${BB_NUMBER_THREADS} CC=${BUILD_CC} CXX=${BUILD_CXX} \
AS=${BUILD_AS} AR=${BUILD_AR} ${GEM5_BUILD_CONFIGS}"
# Default profile to run
GEM5_RUN_PROFILE ?= "configs/example/fs.py"
# We are building a native package and we need to use python
inherit native pythonnative
# the build is using several tools:
# python: scons and six
# google protobuf
# pkgconfig
# hdf5
DEPENDS_append = " python-native python-scons-native python-six-native \
protobuf-native hdf5-native pkgconfig-native boost-native \
libpng-native"
do_configure[noexec] = "1"
do_compile() {
# We need to use the proper native libraries when executing
# compiled applications
export LD_LIBRARY_PATH="${STAGING_LIBDIR_NATIVE}"
scons ${GEM5_SCONS_ARGS}
}
do_install() {
install -d ${D}${datadir}/gem5
cp -a --no-preserve=ownership -rf configs ${D}${datadir}/gem5/.
for f in ${GEM5_BUILD_CONFIGS}; do
destname=$(basename $f)
install -d ${D}${bindir}
install -m 755 $f ${D}${bindir}/$destname.real
cat <<EOF > ${D}${bindir}/$destname
#!/bin/bash
basedir=\$(cd \$(dirname \$0)/../../; pwd)
export LD_LIBRARY_PATH="\$basedir/lib:\$basedir/usr/lib"
\$basedir/usr/bin/$destname.real "\$@"
EOF
chmod a+x ${D}${bindir}/$destname
done
}
FILES_${PN} = "${datadir}/gem5/* ${bindir}/*"
INSANE_SKIP_${PN} += "already-stripped"
RDEPENDS_${PN} += "python-native hdf5-native protobuf-native libpng-native"

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This is added for Gem5 compilation with Zeus as it has been removed from
OpenEmbedded (and Gem5 needs scons to be compiled).
This should be removed once Gem5 supports properly python3.

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require python-scons_${PV}.bb
inherit native pythonnative
DEPENDS = "python-native"
RDEPENDS_${PN} = ""
do_install_append() {
create_wrapper ${D}${bindir}/scons SCONS_LIB_DIR='${STAGING_DIR_HOST}/${PYTHON_SITEPACKAGES_DIR}' PYTHONNOUSERSITE='1'
}

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SUMMARY = "Software Construction tool (make/autotools replacement)"
SECTION = "devel/python"
LICENSE = "MIT"
LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=46ddf66004e5be5566367cb525a66fc6"
SRC_URI[md5sum] = "b6a292e251b34b82c203b56cfa3968b3"
SRC_URI[sha256sum] = "24475e38d39c19683bc88054524df018fe6949d70fbd4c69e298d39a0269f173"
UPSTREAM_CHECK_URI = "http://scons.org/pages/download.html"
UPSTREAM_CHECK_REGEX = "(?P<pver>\d+(\.\d+)+)\.tar"
inherit pypi setuptools
RDEPENDS_${PN} = "\
python-fcntl \
python-io \
python-json \
python-subprocess \
python-shell \
python-pprint \
"

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From a41feccdb6c03f12bddb4fb650a0465f0ed6eeca Mon Sep 17 00:00:00 2001
From: Lukas Juenger <juenger@ice.rwth-aachen.de>
Date: Fri, 5 Apr 2019 15:54:04 +0200
Subject: [PATCH] xen/arm: Cap the number of interrupt lines for dom0
Dom0 vGIC will use the same number of interrupt lines as the hardware GIC.
While the hardware GIC can support up to 1020 interrupt lines,
the vGIC is only supporting up to 992 interrupt lines.
This means that Xen will not be able to boot on platforms where the hardware
GIC supports more than 992 interrupt lines.
While it would make sense to increase the limits in the vGICs, this is not
trivial because of the design choices.
At the moment, only models seem to report the maximum of interrupt lines.
They also do not have any interrupt wired above the 992 limit.
So it should be fine to cap the number of interrupt lines for dom0 to 992 lines.
Signed-off-by: Lukas Juenger <juenger@ice.rwth-aachen.de>
Acked-by: Julien Grall <julien.grall@arm.com>
---
xen/arch/arm/setup.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index 444857a967..ccb0f181ea 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -888,7 +888,13 @@ void __init start_xen(unsigned long boot_phys_offset,
/* Create initial domain 0. */
/* The vGIC for DOM0 is exactly emulating the hardware GIC */
dom0_cfg.arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE;
- dom0_cfg.arch.nr_spis = gic_number_lines() - 32;
+ /*
+ * Xen vGIC supports a maximum of 992 interrupt lines.
+ * 32 are substracted to cover local IRQs.
+ */
+ dom0_cfg.arch.nr_spis = min(gic_number_lines(), (unsigned int) 992) - 32;
+ if ( gic_number_lines() > 992 )
+ printk(XENLOG_WARNING "Maximum number of vGIC IRQs exceeded.\n");
dom0_cfg.max_vcpus = dom0_max_vcpus();
dom0 = domain_create(0, &dom0_cfg, true);
--
2.17.1

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@@ -6,3 +6,5 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
# This should only be applied for 4.12.0 (solved in greater versions)
SRC_URI += "file://4.12.0/0001-trace-fix-build-with-gcc9.patch"
# Fix problem with number of interrupts on gem5
SRC_URI_append_gem5-arm64 = " file://4.12.0/0001-xen-arm-Cap-the-number-of-interrupt-lines-for-dom0.patch"

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define KMACHINE gem5-arm64
define KTYPE standard
define KARCH arm64
include ktypes/standard/standard.scc
include gem5-arm64.scc
# default policy for standard kernels
#include features/latencytop/latencytop.scc
#include features/profiling/profiling.scc

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include features/input/input.scc
include features/net/net.scc
include cfg/timer/no_hz.scc
kconf hardware gem5-arm64/gem5-arm64-board.cfg
kconf hardware gem5-arm64/gem5-arm64-drm.cfg
kconf hardware gem5-arm64/gem5-arm64-net.cfg
kconf hardware gem5-arm64/gem5-arm64-rtc.cfg
kconf hardware gem5-arm64/gem5-arm64-serial.cfg
kconf hardware gem5-arm64/gem5-arm64-virtio.cfg
kconf hardware gem5-arm64/gem5-arm64-cfi.cfg
kconf hardware gem5-arm64/gem5-arm64-virtio.cfg
kconf hardware gem5-arm64/gem5-arm64-pci.cfg
kconf hardware gem5-arm64/gem5-arm64-pata.cfg

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CONFIG_ARM64=y
CONFIG_ARCH_VEXPRESS=y
CONFIG_SMP=y
CONFIG_NR_CPUS=256
CONFIG_HOTPLUG_CPU=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_CPU_IDLE=y
CONFIG_ARM_CPUIDLE=y
CONFIG_VEXPRESS_CONFIG=y
# Keyboard over AMBA
CONFIG_SERIO=y
CONFIG_SERIO_AMBAKMI=y
CONFIG_MFD_VEXPRESS_SYSREG=y
# Turn off RAID to speed up boot
CONFIG_MD=n
CONFIG_BTRFS_FS=n
# We need to turn off SVE support in the Linux kernel otherwise Xen is stopping
# Linux kernel with a coredump while trying to access ZEN bit of CPACR1 core
# register.
# CONFIG_ARM64_SVE is not set

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# CFI Flash
CONFIG_MTD=y
CONFIG_MTD_CFI=y

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@@ -0,0 +1,5 @@
CONFIG_DRM=y
CONFIG_DRM_ARM=y
CONFIG_DRM_HDLCD=y
CONFIG_FB=y
CONFIG_FB_ARMCLCD=y

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@@ -0,0 +1,2 @@
CONFIG_SMSC911X=y
CONFIG_SMC91X=y

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@@ -0,0 +1,12 @@
CONFIG_ATA=y
CONFIG_ATA_GENERIC=y
CONFIG_PATA_PLATFORM=y
CONFIG_PATA_OF_PLATFORM=y
CONFIG_SATA_AHCI=y
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_ATA_PIIX=y
CONFIG_PATA_OLDPIIX=y
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_SG=y

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CONFIG_PCI=y
CONFIG_PCI_HOST_GENERIC=y

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@@ -0,0 +1,2 @@
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_PL031=y

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@@ -0,0 +1,3 @@
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST=y

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@@ -0,0 +1,9 @@
CONFIG_VIRTIO=y
CONFIG_VIRTIO_MMIO=y
CONFIG_BLOCK=y
CONFIG_VIRTIO_BLK=y
CONFIG_BLK_MQ_VIRTIO=y
CONFIG_SCSI_VIRTIO=y
CONFIG_VIRTIO_BLK_SCSI=y
CONFIG_VIRTIO_PCI=y
CONFIG_VIRTIO_PCI_LEGACY=y

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/*
* Copyright (c) 2015-2016 ARM Limited
* All rights reserved
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Andreas Sandberg
*/
/dts-v1/;
/memreserve/ 0x80000000 0x00010000;
/include/ "vexpress_gem5_v2.dtsi"
/ {
model = "V2P-AARCH64";
compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
memory@80000000 {
device_type = "memory";
reg = <0 0x80000000 0x4 0x00000000>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 0 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
};
virt-encoder {
compatible = "drm,virtual-encoder";
port {
dp0_virt_input: endpoint@0 {
remote-endpoint = <&dp0_output>;
};
};
display-timings {
native-mode = <&timing0>;
timing0: timing_1080p60 {
/* 1920x1080-60 */
clock-frequency = <148500000>;
hactive = <1920>;
vactive = <1080>;
hfront-porch = <148>;
hback-porch = <88>;
hsync-len = <44>;
vfront-porch = <36>;
vback-porch = <4>;
vsync-len = <5>;
};
};
};
};
&dp0 {
status = "ok";
port {
dp0_output: endpoint@0 {
remote-endpoint = <&dp0_virt_input>;
};
};
};

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@@ -0,0 +1,103 @@
/*
* Copyright (c) 2015-2016 ARM Limited
* All rights reserved
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Andreas Sandberg
*/
/dts-v1/;
/memreserve/ 0x80000000 0x00010000;
/include/ "vexpress_gem5_v2.dtsi"
/ {
model = "V2P-AARCH64";
compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
memory@80000000 {
device_type = "memory";
reg = <0 0x80000000 0x4 0x00000000>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 0 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
cpu@1 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 1 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
};
virt-encoder {
compatible = "drm,virtual-encoder";
port {
dp0_virt_input: endpoint@0 {
remote-endpoint = <&dp0_output>;
};
};
display-timings {
native-mode = <&timing0>;
timing0: timing_1080p60 {
/* 1920x1080-60 */
clock-frequency = <148500000>;
hactive = <1920>;
vactive = <1080>;
hfront-porch = <148>;
hback-porch = <88>;
hsync-len = <44>;
vfront-porch = <36>;
vback-porch = <4>;
vsync-len = <5>;
};
};
};
};
&dp0 {
status = "ok";
port {
dp0_output: endpoint@0 {
remote-endpoint = <&dp0_virt_input>;
};
};
};

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@@ -0,0 +1,119 @@
/*
* Copyright (c) 2015-2016 ARM Limited
* All rights reserved
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Andreas Sandberg
*/
/dts-v1/;
/memreserve/ 0x80000000 0x00010000;
/include/ "vexpress_gem5_v2.dtsi"
/ {
model = "V2P-AARCH64";
compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
memory@80000000 {
device_type = "memory";
reg = <0 0x80000000 0x4 0x00000000>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 0 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
cpu@1 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 1 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
cpu@2 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 2 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
cpu@3 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 3 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
};
virt-encoder {
compatible = "drm,virtual-encoder";
port {
dp0_virt_input: endpoint@0 {
remote-endpoint = <&dp0_output>;
};
};
display-timings {
native-mode = <&timing0>;
timing0: timing_1080p60 {
/* 1920x1080-60 */
clock-frequency = <148500000>;
hactive = <1920>;
vactive = <1080>;
hfront-porch = <148>;
hback-porch = <88>;
hsync-len = <44>;
vfront-porch = <36>;
vback-porch = <4>;
vsync-len = <5>;
};
};
};
};
&dp0 {
status = "ok";
port {
dp0_output: endpoint@0 {
remote-endpoint = <&dp0_virt_input>;
};
};
};

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@@ -0,0 +1,151 @@
/*
* Copyright (c) 2015-2016 ARM Limited
* All rights reserved
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Andreas Sandberg
*/
/dts-v1/;
/memreserve/ 0x80000000 0x00010000;
/include/ "vexpress_gem5_v2.dtsi"
/ {
model = "V2P-AARCH64";
compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
memory@80000000 {
device_type = "memory";
reg = <0 0x80000000 0x4 0x00000000>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 0 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
cpu@1 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 1 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
cpu@2 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 2 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
cpu@3 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 3 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
cpu@4 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 4 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
cpu@5 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 5 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
cpu@6 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 6 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
cpu@7 {
device_type = "cpu";
compatible = "gem5,armv8", "arm,armv8";
reg = < 7 >;
enable-method = "spin-table";
cpu-release-addr = <0 0x8000fff8>;
};
};
virt-encoder {
compatible = "drm,virtual-encoder";
port {
dp0_virt_input: endpoint@0 {
remote-endpoint = <&dp0_output>;
};
};
display-timings {
native-mode = <&timing0>;
timing0: timing_1080p60 {
/* 1920x1080-60 */
clock-frequency = <148500000>;
hactive = <1920>;
vactive = <1080>;
hfront-porch = <148>;
hback-porch = <88>;
hsync-len = <44>;
vfront-porch = <36>;
vback-porch = <4>;
vsync-len = <5>;
};
};
};
};
&dp0 {
status = "ok";
port {
dp0_output: endpoint@0 {
remote-endpoint = <&dp0_virt_input>;
};
};
};

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@@ -0,0 +1,46 @@
/*
* Copyright (c) 2015-2018 ARM Limited
* All rights reserved
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Andreas Sandberg
*/
/include/ "vexpress_gem5_v2_base.dtsi"
/ {
/* The display processor needs custom configuration to setup its
* output ports. Disable it by default in the platform until the
* DT bindings have stabilize.
*/
dp0: hdlcd@2b000000 {
compatible = "arm,hdlcd";
reg = <0x0 0x2b000000 0x0 0x1000>;
interrupts = <0 63 4>;
clocks = <&osc_pxl>;
clock-names = "pxlclk";
status = "disabled";
};
};

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@@ -0,0 +1,202 @@
/*
* Copyright (c) 2015-2017, 2019 ARM Limited
* All rights reserved
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Andreas Sandberg
*/
/ {
arm,hbi = <0x0>;
arm,vexpress,site = <0xf>;
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
gic: interrupt-controller@2c000000 {
compatible = "arm,gic-v3";
#interrupt-cells = <0x3>;
#address-cells = <0x2>;
ranges;
interrupt-controller;
redistributor-stride = <0x0 0x40000>; // 256kB stride
reg = <0x0 0x2c000000 0x0 0x10000
0x0 0x2c010000 0x0 0x2000000 // room for 128 redistributors using 128K each (256K strided...)
0x0 0x0 0x0 0x0>;
interrupts = <1 9 0xf04>;
#size-cells = <0x2>;
linux,phandle = <0x1>;
phandle = <0x1>;
gic-its@2e010000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x0 0x2e010000 0 0x20000>;
};
};
timer {
compatible = "arm,cortex-a15-timer",
"arm,armv7-timer";
interrupts = <1 13 0xf08>,
<1 14 0xf08>,
<1 11 0xf08>,
<1 10 0xf08>;
clocks = <&osc_sys>;
clock-names="apb_pclk";
};
pci {
compatible = "pci-host-ecam-generic";
device_type = "pci";
#address-cells = <0x3>;
#size-cells = <0x2>;
#interrupt-cells = <0x1>;
reg = <0x0 0x30000000 0x0 0x10000000>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x2f000000 0x0 0x00010000>,
<0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
/*
child unit address, #cells = #address-cells
child interrupt specifier, #cells = #interrupt-cells (INTA = 1, INTB = 2, INTC = 3 and INTD = 4)
interrupt-parent, phandle
parent unit address, #cells = #address-cells@gic
parent interrupt specifier, #cells = #interrupt-cells@gic
*/
interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x44 0x1
0x800 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x45 0x1
0x1000 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x46 0x1
0x1800 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x47 0x1>;
interrupt-map-mask = <0x001800 0x0 0x0 0x0>;
dma-coherent;
};
kmi@1c060000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x0 0x1c060000 0x0 0x1000>;
interrupts = <0 12 4>;
clocks = <&v2m_clk24mhz>, <&osc_smb>;
clock-names = "KMIREFCLK", "apb_pclk";
};
kmi@1c070000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x0 0x1c070000 0x0 0x1000>;
interrupts = <0 13 4>;
clocks = <&v2m_clk24mhz>, <&osc_smb>;
clock-names = "KMIREFCLK", "apb_pclk";
};
uart0: uart@1c090000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0x1c090000 0x0 0x1000>;
interrupts = <0 5 4>;
clocks = <&osc_peripheral>, <&osc_smb>;
clock-names = "uartclk", "apb_pclk";
};
rtc@1c170000 {
compatible = "arm,pl031", "arm,primecell";
reg = <0x0 0x1c170000 0x0 0x1000>;
interrupts = <0 4 4>;
clocks = <&osc_smb>;
clock-names = "apb_pclk";
};
v2m_clk24mhz: clk24mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "v2m:clk24mhz";
};
v2m_sysreg: sysreg@1c010000 {
compatible = "arm,vexpress-sysreg";
reg = <0 0x1c010000 0x0 0x1000>;
gpio-controller;
#gpio-cells = <2>;
};
vio@1c130000 {
compatible = "virtio,mmio";
reg = <0 0x1c130000 0x0 0x1000>;
interrupts = <0 42 4>;
};
vio@1c140000 {
compatible = "virtio,mmio";
reg = <0 0x1c140000 0x0 0x1000>;
interrupts = <0 43 4>;
};
dcc {
compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>;
osc_pxl: osc@5 {
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 5>;
freq-range = <23750000 1000000000>;
#clock-cells = <0>;
clock-output-names = "oscclk5";
};
osc_smb: osc@6 {
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 6>;
freq-range = <20000000 50000000>;
#clock-cells = <0>;
clock-output-names = "oscclk6";
};
osc_sys: osc@7 {
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 7>;
freq-range = <20000000 60000000>;
#clock-cells = <0>;
clock-output-names = "oscclk7";
};
};
mcc {
compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>;
arm,vexpress,site = <0>;
osc_peripheral: osc@2 {
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 2>;
freq-range = <24000000 24000000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk2";
};
};
};

View File

@@ -33,3 +33,15 @@ do_patch_append_fvp-base() {
#
COMPATIBLE_MACHINE_juno = "juno"
KMACHINE_juno = "juno"
#
# Gem5 arm64 KMACHINE
#
COMPATIBLE_MACHINE_gem5-arm64 = "gem5-arm64"
KMACHINE_gem5-arm64 = "gem5-arm64"
SRC_URI_append_gem5-arm64 = " file://dts/gem5-arm64;subdir=add-files"
do_patch_append_gem5-arm64() {
tar -C ${WORKDIR}/add-files/dts -cf - gem5-arm64 | \
tar -C arch/arm64/boot/dts -xf -
}