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corstone700.conf: set DTB address to use DDR

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This change is to use DDR address for DTB instead of shared RAM.

Change-Id: I191eeb96bbcf062ea9ec21a42b22b2b38ac5003b
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
This commit is contained in:
Vishnu Banavath
2019-10-14 15:23:19 +01:00
committed by Tushar Khandelwal
parent 85ef030d8b
commit e841380aa4
1 changed files with 1 additions and 1 deletions
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meta-corstone700/conf/machine/corstone700.conf
+1 -1
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@@ -17,7 +17,7 @@ TF-A_EXTRA_OPTIONS += " \
RESET_TO_SP_MIN=1 \
ARM_LINUX_KERNEL_AS_BL33=1 \
PRELOADED_BL33_BASE=0x08300000 \
ARM_PRELOADED_DTB_BASE=0x02800000 \
ARM_PRELOADED_DTB_BASE=0x80400000 \
ENABLE_STACK_PROTECTOR=strong \
ENABLE_PIE=1 \
"