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arm-bsp/trusted-firmware-m: corstone1000: Add AO lock write barrier

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Add the corstone1000 patch that inserts a compiler barrier before the
first HOST_AO_LOCK_BITS write in CC_LibInit().

On corstone1000-mps3 with GCC 15.x, TF-M can HardFault on that first
AO lock register update. Adding the barrier avoids the fault.

Signed-off-by: Michael Safwat <michael.safwat@arm.com>
Signed-off-by: Jon Mason <jon.mason@arm.com>
This commit is contained in:
Michael Safwat
2026-03-16 18:16:12 +00:00
committed by Jon Mason
parent 3afd7461b1
commit f4118f9b86
2 changed files with 42 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0015-CC312-Add-barrier-before-first-AO-lock-write.patch
+41
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@@ -0,0 +1,41 @@
From 3d2bdf81fee8832101fe47b633af5bdee251531a Mon Sep 17 00:00:00 2001
From: Michael Safwat <michael.safwat@arm.com>
Date: Fri, 13 Mar 2026 12:42:09 +0000
Subject: [PATCH] CC312: Add barrier before first AO lock write
On Corstone-1000 MPS3 with GCC 15.x, TF-M can HardFault in
CC_LibInit() on the first HOST_AO_LOCK_BITS write.
Add a compiler barrier before that write to keep the fix minimal and
local to the affected sequence.
Signed-off-by: Michael Safwat <michael.safwat@arm.com>
Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/49269]
---
lib/ext/cryptocell-312-runtime/host/src/cc3x_lib/cc_lib.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/lib/ext/cryptocell-312-runtime/host/src/cc3x_lib/cc_lib.c b/lib/ext/cryptocell-312-runtime/host/src/cc3x_lib/cc_lib.c
index 4b08c02526..1e96fcac5b 100644
--- a/lib/ext/cryptocell-312-runtime/host/src/cc3x_lib/cc_lib.c
+++ b/lib/ext/cryptocell-312-runtime/host/src/cc3x_lib/cc_lib.c
@@ -33,6 +33,8 @@
#include "cc_rnd_common.h"
#include "cc_int_general_defs.h"
+#define CC_COMPILER_BARRIER() __asm volatile("" ::: "memory")
+
CC_PalMutex CCSymCryptoMutex;
CC_PalMutex CCAsymCryptoMutex;
CC_PalMutex *pCCRndCryptoMutex;
@@ -213,6 +215,7 @@ CClibRetCode_t CC_LibInit(CCRndContext_t *rndContext_ptr, CCRndWorkBuff_t *rndW
/* turn off the DFA since Cerberus doen't support it */
reg = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_AO_LOCK_BITS));
CC_REG_FLD_SET(0, HOST_AO_LOCK_BITS, HOST_FORCE_DFA_ENABLE, reg, 0x0);
+ CC_COMPILER_BARRIER();
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_AO_LOCK_BITS) ,reg );
tempVal = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF,HOST_AO_LOCK_BITS));
if(tempVal != reg) {
--
2.43.0
meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc
+1
View File
@@ -46,6 +46,7 @@ SRC_URI:append:corstone1000 = " \
file://0012-bl2-corstone-1000-secure-debug-waiting-in-CM-LCS.patch \
file://0013-Build-adjust-CS1000-platform-for-GCC-v14.2.patch \
file://0014-Workaround-compile-errors-in-AES.patch \
file://0015-CC312-Add-barrier-before-first-AO-lock-write.patch \
"
SRCREV_tfm-psa-adac:corstone1000 = "f2809ae231be33a1afcd7714f40756c67d846c88"