designstart: add support to a5ds

Add first configuration, layers and recipes to support build of a5ds images. Change-Id: Ie6273d0e3feb55471cfc784e62168ce3e2e1f1b6 Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2026-01-12 03:10:15 +00:00 · 2019-07-12 16:43:28 +01:00
parent 9f34cbb321
commit f815620455
9 changed files with 427 additions and 0 deletions
--- a/meta-designstart/conf/layer.conf
+++ b/meta-designstart/conf/layer.conf
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: MIT
+#
+# Copyright (c) 2019 Arm Limited
+#
+
+# designstart has a conf and classes directory, add to BBPATH
+BBPATH .= ":${LAYERDIR}"
+
+# designstart has a packages directory, add to BBFILES
+BBFILES += " \
+		${LAYERDIR}/recipes-*/*/*.bb \
+		${LAYERDIR}/recipes-*/*/*.bbappend"
+
+BBFILE_COLLECTIONS += "designstart"
+BBFILE_PATTERN_designstart := "^${LAYERDIR}/"
+BBFILE_PRIORITY_designstart = "12"
+LAYERSERIES_COMPAT_designstart = "warrior"
+
+LAYERDEPENDS_vexpress = "arm"
--- a/meta-designstart/conf/machine/a5ds.conf
+++ b/meta-designstart/conf/machine/a5ds.conf
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: MIT
+#
+# Copyright (c) 2019 Arm Limited
+#
+
+require conf/machine/include/arm-common-configuration.inc
+require conf/machine/include/cortex-a5.inc
+
+TF-A_PLATFORM = "a5ds"
+TF-A_EXTRA_OPTIONS += " FVP_HW_CONFIG_DTS=fdts/a5ds.dts"
+TF-A_DEPENDS += "u-boot u-boot-mkimage-native"
+TF-A_BL33 = "${DEPLOY_DIR_IMAGE}/u-boot.${UBOOT_SUFFIX}"
+
+SERIAL_CONSOLES ?= "115200;ttyAMA0"
+
+KBUILD_DEFCONFIG = "multi_v7_defconfig"
+
+EXTRA_IMAGEDEPENDS_append = " u-boot"
--- a/meta-designstart/recipes-bsp/trusted-firmware-a/trusted-firmware-a.bbappend
+++ b/meta-designstart/recipes-bsp/trusted-firmware-a/trusted-firmware-a.bbappend
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: MIT
+#
+# Copyright (c) 2019 Arm Limited
+#
+
+FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+
+SRC_URI += "\
+            file://0001-plat-arm-a5ds-move-dtb-to-a-new-address.patch \
+	    "
--- a/meta-designstart/recipes-bsp/trusted-firmware-a/trusted-firmware-a/0001-plat-arm-a5ds-move-dtb-to-a-new-address.patch
+++ b/meta-designstart/recipes-bsp/trusted-firmware-a/trusted-firmware-a/0001-plat-arm-a5ds-move-dtb-to-a-new-address.patch
@@ -0,0 +1,31 @@
+From d3cadbc6f1060020960dc05af0465db919bbbe2b Mon Sep 17 00:00:00 2001
+From: Rui Miguel Silva <rui.silva@linaro.org>
+Date: Fri, 30 Aug 2019 13:38:44 +0100
+Subject: [PATCH] plat/arm: a5ds: move dtb to a new address
+
+When Using bigger kernel images (>8.4MB compressed zImage) and at
+decompress and final location init stage of kernel start makes it
+override dtb at this address, to avoid this move the dtb a little
+higher in address related.
+
+Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
+---
+ plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts b/plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts
+index 9ab2d9656600..c616ff772237 100644
+--- a/plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts
+++ b/plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts
+@@ -10,7 +10,7 @@
+ 	/* Platform Config */
+ 	plat_arm_bl2 {
+ 		compatible = "arm,tb_fw";
+-		hw_config_addr = <0x0 0x82000000>;
+		hw_config_addr = <0x0 0x83000000>;
+ 		hw_config_max_size = <0x01000000>;
+ 		/* Disable authentication for development */
+ 		disable_auth = <0x0>;
+-- 
+2.22.1
+
--- a/meta-designstart/recipes-bsp/u-boot/u-boot/0001-a5ds-add-support-for-target-designstart-A5.patch
+++ b/meta-designstart/recipes-bsp/u-boot/u-boot/0001-a5ds-add-support-for-target-designstart-A5.patch
@@ -0,0 +1,204 @@
+From e634679d854b1603452d0f71a2fa9936e026fb35 Mon Sep 17 00:00:00 2001
+From: Rui Miguel Silva <rui.silva@linaro.org>
+Date: Wed, 14 Aug 2019 09:49:08 +0100
+Subject: [PATCH 3/3] a5ds: add support for target designstart A5
+
+Give support, based on vexpress for now, to designstart platform with
+Cortex-A5 chip. Create config and setup boot commands and tweak memory
+map related with this platform.
+
+Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
+
+%% original patch: 0001-a5ds-add-support-for-target-designstart-A5.patch
+---
+ arch/arm/Kconfig                       |  5 +++
+ board/armltd/vexpress64/Kconfig        |  2 +-
+ configs/vexpress_aemv8a_a5ds_defconfig | 37 ++++++++++++++++++++++
+ include/configs/vexpress_aemv8a.h      | 43 ++++++++++++++++++++++----
+ 4 files changed, 80 insertions(+), 7 deletions(-)
+ create mode 100644 configs/vexpress_aemv8a_a5ds_defconfig
+
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index 0a6ee962d5..e26b3fc37d 100644
+--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
+@@ -738,6 +738,11 @@ config TEGRA
+ 	bool "NVIDIA Tegra"
+ 	imply FAT_WRITE
+ 
+config TARGET_DESIGNSTART_A5
+	bool "Support designstart A5"
+	select CPU_V7
+	select SEMIHOSTING
+
+ config TARGET_VEXPRESS64_AEMV8A
+ 	bool "Support vexpress_aemv8a"
+ 	select ARM64
+diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig
+index f6930aee47..3a6c972d0a 100644
+--- a/board/armltd/vexpress64/Kconfig
+++ b/board/armltd/vexpress64/Kconfig
+@@ -1,4 +1,4 @@
+-if TARGET_VEXPRESS64_BASE_FVP || TARGET_VEXPRESS64_BASE_FVP_AARCH32 || TARGET_VEXPRESS64_JUNO || TARGET_VEXPRESS64_JUNO_AARCH32
+if TARGET_VEXPRESS64_BASE_FVP || TARGET_VEXPRESS64_BASE_FVP_AARCH32 || TARGET_VEXPRESS64_JUNO || TARGET_VEXPRESS64_JUNO_AARCH32 || TARGET_DESIGNSTART_A5
+ 
+ config SYS_BOARD
+ 	default "vexpress64"
+diff --git a/configs/vexpress_aemv8a_a5ds_defconfig b/configs/vexpress_aemv8a_a5ds_defconfig
+new file mode 100644
+index 0000000000..00b80824d8
+--- /dev/null
+++ b/configs/vexpress_aemv8a_a5ds_defconfig
+@@ -0,0 +1,37 @@
+CONFIG_ARM=y
+CONFIG_TARGET_DESIGNSTART_A5=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_IDENT_STRING=" designstart a5ds aarch32"
+CONFIG_BOOTDELAY=1
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="a5ds32# "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_MTD_NOR_FLASH=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_ARMFLASH=y
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+# CONFIG_CMD_MISC is not set
+CONFIG_SYS_MMIO_TIMER=y
+CONFIG_CMD_FAT=y
+CONFIG_DM=y
+CONFIG_DM_SERIAL=y
+CONFIG_OF_LIBFDT=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_PL011=y
+CONFIG_DEBUG_UART_BASE=0x1A510000
+CONFIG_DEBUG_UART_CLOCK=24000000
+diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
+index 4de9914128..1bc478ca2a 100644
+--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
+@@ -23,13 +23,19 @@
+ #define HIGH_ADDR			"0xffffffff"
+ #define BOOT_TYPE			"bootz"
+ #define CONFIG_SYS_HZ_CLOCK		24000000
+#ifdef CONFIG_TARGET_DESIGNSTART_A5
+#define CONFIG_SYS_MMIO_TIMER
+#else
+ #define CONFIG_SYS_ARCH_TIMER
+#endif
+ #define CONFIG_SKIP_LOWLEVEL_INIT
+ #endif
+ 
+
+ /* Link Definitions */
+ #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
+-	defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_AARCH32)
+	defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_AARCH32) ||	\
+	defined(CONFIG_TARGET_DESIGNSTART_A5)
+ /* ATF loads u-boot here for BASE_FVP model */
+ #define CONFIG_SYS_TEXT_BASE		0x88000000
+ #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
+@@ -66,6 +72,9 @@
+ 	defined(CONFIG_TARGET_VEXPRESS64_JUNO_AARCH32)
+ #define V2M_UART0			0x7ff80000
+ #define V2M_UART1			0x7ff70000
+#elif defined(CONFIG_TARGET_DESIGNSTART_A5)
+#define V2M_UART0			0x001a200000
+#define V2M_UART1			0x001a210000
+ #else /* Not Juno */
+ #define V2M_UART0			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
+ #define V2M_UART1			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
+@@ -121,7 +130,7 @@
+ #define CONFIG_SMC911X			1
+ #define CONFIG_SMC911X_32_BIT		1
+ #define CONFIG_SMC911X_BASE		(0x018000000)
+-#else
+#elif !defined(CONFIG_TARGET_DESIGNSTART_A5)
+ /* The Vexpress64 simulators use SMSC91C111 */
+ #define CONFIG_SMC91111			1
+ #define CONFIG_SMC91111_BASE		(0x01A000000)
+@@ -222,19 +231,26 @@
+ 				"setenv bootargs ${bootargs} ${bootargs_sky2}; "\
+ 				BOOT_TYPE " ${kernel_addr} ${initrd_param} ${fdt_addr}"
+ 
+-
+-#elif defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
+-	defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_AARCH32)
+#elif defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) ||		\
+	defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_AARCH32) ||	\
+	defined(CONFIG_TARGET_DESIGNSTART_A5)
+ #define CONFIG_EXTRA_ENV_SETTINGS	\
+ 				"kernel_name=Image\0"		\
+ 				"kernel_addr=0x80080000\0"	\
+ 				"initrd_name=ramdisk.img\0"	\
+ 				"initrd_addr=0x84000000\0"	\
+ 				"fdt_name=devtree.dtb\0"	\
+-				"fdt_addr=0x82000000\0"		\
+				"fdt_addr=0x83000000\0"		\
+ 				"fdt_high=" HIGH_ADDR "\0"	\
+ 				"initrd_high=" HIGH_ADDR "\0"
+ 
+#if defined(CONFIG_TARGET_DESIGNSTART_A5)
+#define CONFIG_BOOTARGS		"console=ttyAMA0 earlycon=pl011,"\
+				"0x1a200000 "\
+				"systemd.log_target=null "\
+				"root=/dev/ram0 rw rootwait"\
+				"loglevel=9"
+#else
+ #define CONFIG_BOOTARGS		"console=ttyAMA0 earlycon=pl011,"\
+ 				"0x1c090000 debug user_debug=31 "\
+ 				"systemd.log_target=null "\
+@@ -242,7 +258,14 @@
+ 				"root=/dev/vda2 rw "\
+ 				"rootwait "\
+ 				"loglevel=9"
+#endif
+ 
+#if defined(CONFIG_TARGET_DESIGNSTART_A5)
+#define CONFIG_BOOTCOMMAND	"echo copy to RAM...; " \
+				"cp.b 0x08100000 $kernel_addr 0xB00000; " \
+				"cp.b 0x08D00000 $initrd_addr 0x500000; " \
+				BOOT_TYPE " $kernel_addr $initrd_addr $fdt_addr"
+#else
+ #define CONFIG_BOOTCOMMAND	"if smhload ${fdt_name} ${fdt_addr}; then "\
+ 				"  if smhload ${initrd_name} ${initrd_addr} "\
+ 				"  initrd_end; then " \
+@@ -263,6 +286,7 @@
+ 				"with contents of DRAM; " \
+ 				BOOT_TYPE " $kernel_addr $initrd_addr $fdt_addr"
+ #endif
+#endif
+ 
+ /* Monitor Command Prompt */
+ #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
+@@ -282,6 +306,13 @@
+ /* in the Juno firmware. */
+ #define CONFIG_ENV_ADDR			0x0BFC0000
+ #define CONFIG_ENV_SECT_SIZE		0x00010000
+#elif defined(CONFIG_TARGET_DESIGNSTART_A5)
+#define CONFIG_SYS_FLASH_BASE		0x08000000
+/* 256 x 256KiB sectors */
+#define CONFIG_SYS_MAX_FLASH_SECT	256
+/* Store environment at top of flash */
+#define CONFIG_ENV_ADDR			0x0A7C0000
+#define CONFIG_ENV_SECT_SIZE		0x00040000
+ #else
+ #define CONFIG_SYS_FLASH_BASE		0x0C000000
+ /* 256 x 256KiB sectors */
+-- 
+2.17.1
+
--- a/meta-designstart/recipes-bsp/u-boot/u-boot/0001-armv7-rename-sp804-timer-to-mmio-timer.patch
+++ b/meta-designstart/recipes-bsp/u-boot/u-boot/0001-armv7-rename-sp804-timer-to-mmio-timer.patch
@@ -0,0 +1,93 @@
+From 381d3916beffa61b253317b671f48f87964c0ec3 Mon Sep 17 00:00:00 2001
+From: Rui Miguel Silva <rui.silva@linaro.org>
+Date: Wed, 14 Aug 2019 09:20:42 +0100
+Subject: [PATCH 2/3] armv7: rename sp804 timer to mmio timer
+
+Rename the wrongly init named mmio timer and fix the use of it on a
+Cortex-A5 system that does not have arch_timer.
+
+Signed-off-by: Usama Arif <usama.arif@arm.com>
+Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
+
+%% original patch: 0001-armv7-rename-sp804-timer-to-mmio-timer.patch
+---
+ arch/arm/cpu/armv7/Makefile                    |  6 +-----
+ .../cpu/armv7/{sp804_timer.c => mmio_timer.c}  | 18 ++++++++++--------
+ scripts/config_whitelist.txt                   |  1 +
+ 3 files changed, 12 insertions(+), 13 deletions(-)
+ rename arch/arm/cpu/armv7/{sp804_timer.c => mmio_timer.c} (71%)
+
+diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
+index 288d14732e..97727a0dbb 100644
+--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
+@@ -23,12 +23,8 @@ obj-$(CONFIG_ARMV7_PSCI)	+= psci.o psci-common.o
+ obj-$(CONFIG_IPROC) += iproc-common/
+ obj-$(CONFIG_KONA) += kona-common/
+ 
+-SUPPORT_ARCH_TIMER    ?= yes
+-ifeq ($(SUPPORT_ARCH_TIMER),no)
+-obj-y += sp804_timer.o
+-else
+ obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o
+-endif
+obj-$(CONFIG_SYS_MMIO_TIMER) += mmio_timer.o
+ 
+ ifneq (,$(filter s5pc1xx exynos,$(SOC)))
+ obj-y += s5p-common/
+diff --git a/arch/arm/cpu/armv7/sp804_timer.c b/arch/arm/cpu/armv7/mmio_timer.c
+similarity index 71%
+rename from arch/arm/cpu/armv7/sp804_timer.c
+rename to arch/arm/cpu/armv7/mmio_timer.c
+index 9c1ecf3fa0..862587644f 100644
+--- a/arch/arm/cpu/armv7/sp804_timer.c
+++ b/arch/arm/cpu/armv7/mmio_timer.c
+@@ -11,23 +11,25 @@
+ 
+ DECLARE_GLOBAL_DATA_PTR;
+ 
+-#define SP804_TIMER0_BASE  UL(0x1C110000)
+-#define SP804_TIMER1_VALUE_OFFSET UL(0x004)
+#define CNTCTLBASE UL(0x1a020000)
+#define CNTREADBASE UL(0x1a030000)
+ 
+-int timer_init(void)
+static inline uint32_t mmio_read32(uintptr_t addr)
+ {
+-	gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ;
+-	return 0;
+	return *(volatile uint32_t*)addr;
+ }
+ 
+-static inline uint32_t mmio_read_32(uintptr_t addr)
+int timer_init(void)
+ {
+-	return *(volatile uint32_t*)addr;
+	gd->arch.timer_rate_hz = mmio_read32(CNTCTLBASE);
+
+	return 0;
+ }
+ 
+ unsigned long long get_ticks(void)
+ {
+-	return UINT_MAX - mmio_read_32(SP804_TIMER0_BASE + SP804_TIMER1_VALUE_OFFSET);
+	return ((mmio_read32(CNTCTLBASE + 0x4) << 32) |
+		mmio_read32(CNTREADBASE));
+ }
+ 
+ ulong get_timer(ulong base)
+diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
+index 95f27b6ead..e82e53cea3 100644
+--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
+@@ -3923,6 +3923,7 @@ CONFIG_SYS_MMC_U_BOOT_DST
+ CONFIG_SYS_MMC_U_BOOT_OFFS
+ CONFIG_SYS_MMC_U_BOOT_SIZE
+ CONFIG_SYS_MMC_U_BOOT_START
+CONFIG_SYS_MMIO_TIMER
+ CONFIG_SYS_MONITOR_
+ CONFIG_SYS_MONITOR_BASE
+ CONFIG_SYS_MONITOR_BASE_EARLY
+-- 
+2.17.1
+
--- a/meta-designstart/recipes-bsp/u-boot/u-boot/0001-skip-creating-libfdt-for-python-for-yocto-build.patch
+++ b/meta-designstart/recipes-bsp/u-boot/u-boot/0001-skip-creating-libfdt-for-python-for-yocto-build.patch
@@ -0,0 +1,28 @@
+From 667cb143d9d948744e14a046d5599ec85f0b45db Mon Sep 17 00:00:00 2001
+From: Tushar Khandelwal <tushar.khandelwal@arm.com>
+Date: Mon, 22 Jul 2019 21:19:10 +0100
+Subject: [PATCH 1/3] skip creating libfdt for python for yocto build
+
+Signed-off-by: Tushar Khandelwal <tushar.khandelwal@arm.com>
+
+%% original patch: 0001-skip-creating-libfdt-for-python-for-yocto-build.patch
+---
+ tools/Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/tools/Makefile b/tools/Makefile
+index cb1683e153..872a65f74a 100644
+--- a/tools/Makefile
+++ b/tools/Makefile
+@@ -230,7 +230,7 @@ always := $(hostprogs-y)
+ 
+ # Build a libfdt Python module if swig is available
+ # Use 'sudo apt-get install swig libpython-dev' to enable this
+-always += $(if $(shell which swig 2> /dev/null),_libfdt.so)
+#always += $(if $(shell which swig 2> /dev/null),_libfdt.so)
+ 
+ # Generated LCD/video logo
+ LOGO_H = $(objtree)/include/bmp_logo.h
+-- 
+2.17.1
+
--- a/meta-designstart/recipes-bsp/u-boot/u-boot_%.bbappend
+++ b/meta-designstart/recipes-bsp/u-boot/u-boot_%.bbappend
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: MIT
+#
+# Copyright (c) 2019 ARM Limited
+#
+
+FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+
+UBOOT_MACHINE = "vexpress_aemv8a_a5ds_defconfig"
+
+SRC_URI += "\
+	file://0001-skip-creating-libfdt-for-python-for-yocto-build.patch \
+	file://0001-armv7-rename-sp804-timer-to-mmio-timer.patch \
+	file://0001-a5ds-add-support-for-target-designstart-A5.patch \
+	"
--- a/meta-designstart/wic/iota-tiny-image.a5ds.wks
+++ b/meta-designstart/wic/iota-tiny-image.a5ds.wks
@@ -0,0 +1,10 @@
+# Partition for a5ds
+  
+# Rawcopy of the FIP binary
+part --source rawcopy --sourceparams="file=a5ds.fip" --no-table --align 1 --fixed-size 1
+
+# Rawcopy of the kernel binary
+part --source rawcopy --sourceparams="file=zImage" --no-table --fixed-size 12
+
+# Rawcopy of the rootfs
+part --source rawcopy --sourceparams="file=${IMGDEPLOYDIR}/iota-tiny-image-a5ds.initramfs.cpio.gz" --no-table