README: remove reference to meta-arm-autonomy

Signed-off-by: Jon Mason <jon.mason@arm.com>

.gitlab-ci.yml

@@ -1,4 +1,12 @@
-image: ghcr.io/siemens/kas/kas:latest-release
+image: ghcr.io/siemens/kas/kas:3.2
+
+variables:
+  CPU_REQUEST: ""
+  DEFAULT_TAG: ""
+  # These are needed as the k8s executor doesn't respect the container entrypoint
+  # by default
+  FF_USE_LEGACY_KUBERNETES_EXECUTION_STRATEGY: 0
+  FF_KUBERNETES_HONOR_ENTRYPOINT: 1
 
 stages:
   - prep
@@ -6,6 +14,8 @@ stages:
 
 # Common job fragment to get a worker ready
 .setup:
+  tags:
+    - $DEFAULT_TAG
   stage: build
   interruptible: true
   variables:
@@ -25,11 +35,29 @@ stages:
     - mkdir --verbose --parents $KAS_WORK_DIR $KAS_REPO_REF_DIR $SSTATE_DIR $DL_DIR $TOOLCHAIN_DIR $TOOLCHAIN_LINK_DIR
     # Must do this here, as it's the only way to make sure the toolchain is installed on the same builder
     - ./ci/get-binary-toolchains $DL_DIR $TOOLCHAIN_DIR $TOOLCHAIN_LINK_DIR
-    - sudo apt-get update && sudo apt-get install --yes telnet python3-subunit
+    # This can be removed with Kas 3.2
+    - sudo apt-get update && sudo apt-get install --yes python3-subunit
 
 # Generalised fragment to do a Kas build
 .build:
   extends: .setup
+  variables:
+    KUBERNETES_CPU_REQUEST: $CPU_REQUEST
+  rules:
+    # Don't run MR pipelines
+    - if: $CI_PIPELINE_SOURCE == "merge_request_event"
+      when: never
+    # Don't run pipelines for tags
+    - if: $CI_COMMIT_TAG
+      when: never
+    # Don't run if BUILD_ENABLE_REGEX is set, but the job doesn't match the regex
+    - if: '$BUILD_ENABLE_REGEX != null && $CI_JOB_NAME !~ $BUILD_ENABLE_REGEX'
+      when: never
+    # Allow the dev kernels to fail and not fail the overall build
+    - if: '$KERNEL == "linux-yocto-dev"'
+      allow_failure: true
+    # Catch all for everything else
+    - if: '$KERNEL != "linux-yocto-dev"'
   script:
     - KASFILES=$(./ci/jobs-to-kas "$CI_JOB_NAME")
     - kas shell --update --force-checkout $KASFILES -c 'cat conf/*.conf'
@@ -210,7 +238,7 @@ check-layers:
       "yocto-check-layer-wrapper $CI_PROJECT_DIR/$LAYER --dependency $CI_PROJECT_DIR/meta-* $KAS_WORK_DIR/meta-openembedded/meta-oe --no-auto-dependency"
   parallel:
     matrix:
-      - LAYER: [meta-arm, meta-arm-bsp, meta-arm-toolchain, meta-gem5]
+      - LAYER: [meta-arm, meta-arm-bsp, meta-arm-toolchain, meta-gem5, meta-atp]
 
 pending-updates:
   extends: .setup
@@ -228,8 +256,7 @@ pending-updates:
 
 # What percentage of machines in the layer do we build
 machine-coverage:
-  stage: build
-  interruptible: true
+  extends: .setup
   script:
     - ./ci/check-machine-coverage
   coverage: '/Coverage: \d+/'

README.md

@@ -6,10 +6,6 @@ This repository contains the Arm layers for OpenEmbedded.
 
   This layer contains general recipes for the Arm architecture, such as firmware, FVPs, and Arm-specific integration.
 
-* meta-arm-autonomy
-
-  This layer is the distribution for a reference stack for autonomous systems.
-
 * meta-arm-bsp
 
   This layer contains machines for Arm reference platforms, for example FVP Base, N1SDP, and Juno.
@@ -20,7 +16,7 @@ This repository contains the Arm layers for OpenEmbedded.
 
 * meta-atp
 
-  This layer contains recipes for the Adaptive Traffic Generation integration into meta-gem5.
+  This layer contains recipes for the [AMBA Adaptive Traffic Profiles (ATP)](https://developer.arm.com/documentation/ihi0082/latest) generation integration into meta-gem5.
 
 * meta-gem5
 

ci/0001-Revert-pixman-Do-not-use-clang-assembler-for-now.patch

@@ -0,0 +1,26 @@
+This causes illegal instruction faults in pixman, so xserver crashes.
+https://github.com/kraj/meta-clang/issues/696
+
+From 8659c5c5bec39dd43a1988b19d4cf30507a44679 Mon Sep 17 00:00:00 2001
+From: Ross Burton <ross.burton@arm.com>
+Date: Mon, 28 Nov 2022 16:52:50 +0000
+Subject: [PATCH] Revert "pixman: Do not use clang assembler for now"
+
+This reverts commit 84dbafa42d8141b00da75d6664aef07c252a52ee.
+---
+ conf/nonclangable.conf | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/conf/nonclangable.conf b/conf/nonclangable.conf
+index 04112f4..b5db848 100644
+--- a/conf/nonclangable.conf
++++ b/conf/nonclangable.conf
+@@ -347,5 +347,4 @@ DEPENDS:append:pn-pixman:mips:toolchain-clang = " openmp"
+ #| .endfunc
+ #| ^
+ CFLAGS:append:pn-pixman:arm:toolchain-clang = " -no-integrated-as"
+-CFLAGS:append:pn-pixman:aarch64:toolchain-clang = " -no-integrated-as"
+ 
+-- 
+2.34.1
+

ci/base.yml

@@ -26,13 +26,7 @@ env:
 
 local_conf_header:
   base: |
-    BB_SERVER_TIMEOUT = "60"
     CONF_VERSION = "2"
-    BB_NUMBER_THREADS = "16"
-    PARALLEL_MAKE = "-j16"
-    XZ_MEMLIMIT = "25%"
-    XZ_THREADS = "16"
-    ZSTD_THREADS = "16"
     LICENSE_FLAGS_ACCEPTED += "Arm-FVP-EULA"
   setup: |
     PACKAGE_CLASSES = "package_ipk"

ci/clang.yml

@@ -4,8 +4,16 @@ header:
 repos:
   meta-clang:
     url: https://github.com/kraj/meta-clang
-    refspec: master
+    patches:
+      pixman:
+        repo: meta-arm
+        path: ci/0001-Revert-pixman-Do-not-use-clang-assembler-for-now.patch
 
 local_conf_header:
   clang: |
     TOOLCHAIN = "clang"
+    # Backport d89e06ad94a46f6810d0a8787004b71b8ecaf87d to langdale
+    OBJCOPY:pn-linux-yocto:toolchain-clang = "${HOST_PREFIX}objcopy"
+    # Perf needs fixes backported, use GCC for now
+    # https://lore.kernel.org/linux-perf-users/Y5d4k7fDxfRP7hcN@kernel.org/T/#t
+    TOOLCHAIN:pn-perf = "gcc"

ci/meta-openembedded.yml

@@ -4,7 +4,6 @@ header:
 repos:
   meta-openembedded:
     url: https://git.openembedded.org/meta-openembedded
-    refspec: master
     layers:
       meta-filesystems:
       meta-networking:

ci/n1sdp.yml

@@ -4,3 +4,7 @@ header:
     - ci/base.yml
 
 machine: n1sdp
+
+local_conf_header:
+  unsupported_trusted_services: |
+    MACHINE_FEATURES:remove = "ts-smm-gateway"

documentation/oeqa-fvp.md

@@ -4,7 +4,7 @@ OE-Core's [oeqa][OEQA] framework provides a method of performing runtime tests o
 
 Tests can be configured to run automatically post-build by setting the variable `TESTIMAGE_AUTO="1"`, e.g. in your Kas file or local.conf.
 
-There are two main methods of testing, using different test "targets".
+There are two main methods of testing, using different test "targets". Both test targets generate an additional log file with the prefix 'fvp_log' in the image recipe's `${WORKDIR}/testimage` containing the FVP's stdout.
 
 ## OEFVPTarget
 

kas/corstone1000-base.yml

@@ -5,7 +5,7 @@ distro: poky-tiny
 
 defaults:
   repos:
-    refspec: master
+    refspec: langdale
 
 repos:
   meta-arm:
@@ -16,7 +16,7 @@ repos:
 
   poky:
     url: https://git.yoctoproject.org/git/poky
-    refspec: master
+    refspec: 79434a17eb4835e85fcd477baec08c8ce49a4c14
     layers:
       meta:
       meta-poky:
@@ -24,7 +24,7 @@ repos:
 
   meta-openembedded:
     url: https://git.openembedded.org/meta-openembedded
-    refspec: master
+    refspec: c5668905a6d8a78fb72c2cbf8b20e91e686ceb86
     layers:
       meta-oe:
       meta-python:

kas/corstone500.yml

@@ -5,7 +5,7 @@ distro: poky-tiny
 
 defaults:
   repos:
-    refspec: master
+    refspec: langdale
 
 repos:
   meta-arm:
@@ -16,7 +16,6 @@ repos:
 
   poky:
     url: https://git.yoctoproject.org/git/poky
-    refspec: master
     layers:
       meta:
       meta-poky:
@@ -24,7 +23,6 @@ repos:
 
   meta-openembedded:
     url: https://git.openembedded.org/meta-openembedded
-    refspec: master
     layers:
       meta-oe:
       meta-python:

kas/fvp-baser-aemv8r64-bsp.yml

@@ -6,7 +6,7 @@ machine: fvp-baser-aemv8r64
 
 defaults:
   repos:
-    refspec: master
+    refspec: langdale
 
 repos:
   meta-arm:

meta-arm-bsp/conf/machine/corstone1000-fvp.conf

@@ -46,3 +46,5 @@ FVP_TERMINALS[extsys0.extsys_terminal] ?= "Cortex M3"
 FVP_CONFIG[board.msd_mmc.card_type] ?= "SDHC"
 FVP_CONFIG[board.msd_mmc.p_fast_access] ?= "0"
 FVP_CONFIG[board.msd_mmc.diagnostics] ?= "2"
+FVP_CONFIG[board.msd_mmc.p_max_block_count] ?= "0xFFFF"
+FVP_CONFIG[board.msd_config.pl180_fifo_depth] ?= "16"

meta-arm-bsp/conf/machine/fvp-base.conf

@@ -10,10 +10,10 @@ require conf/machine/include/arm/arch-armv8a.inc
 TUNE_FEATURES = "aarch64"
 
 PREFERRED_VERSION_u-boot ?= "2022.04"
-PREFERRED_VERSION_linux-yocto ?= "5.15%"
-PREFERRED_VERSION_linux-yocto-rt ?= "5.15%"
 
 # FVP u-boot configuration
 UBOOT_MACHINE = "vexpress_aemv8a_semi_defconfig"
 
 KERNEL_IMAGETYPE = "Image"
+
+FVP_CONFIG[bp.virtio_rng.enabled] ?= "1"

meta-arm-bsp/conf/machine/fvp-baser-aemv8r64.conf

@@ -9,8 +9,6 @@ require conf/machine/include/arm/armv8r/arch-armv8r64.inc
 EXTRA_IMAGEDEPENDS += "boot-wrapper-aarch64"
 
 PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto"
-PREFERRED_VERSION_linux-yocto ?= "5.15%"
-PREFERRED_VERSION_linux-yocto-rt ?= "5.15%"
 PREFERRED_VERSION_u-boot ?= "2022.07"
 
 KERNEL_IMAGETYPE = "Image"

meta-arm-bsp/conf/machine/juno.conf

@@ -10,10 +10,10 @@ require conf/machine/include/arm/arch-armv8a.inc
 
 MACHINE_FEATURES = "usbhost usbgadget alsa screen wifi bluetooth optee pci"
 
-KERNEL_IMAGETYPE = "Image"
+KERNEL_IMAGETYPE = "Image.gz"
 KERNEL_DEVICETREE = "arm/juno.dtb arm/juno-r1.dtb arm/juno-r2.dtb"
 
-IMAGE_FSTYPES += "tar.bz2 ext4"
+IMAGE_FSTYPES += "tar.bz2 ext4 cpio.gz"
 
 SERIAL_CONSOLES = "115200;ttyAMA0"
 
@@ -25,3 +25,6 @@ EXTRA_IMAGEDEPENDS += "trusted-firmware-a virtual/bootloader firmware-image-juno
 
 # Juno u-boot configuration
 UBOOT_MACHINE = "vexpress_aemv8a_juno_defconfig"
+
+INITRAMFS_IMAGE_BUNDLE ?= "1"
+INITRAMFS_IMAGE = "core-image-minimal"

meta-arm-bsp/documentation/corstone1000/change-log.rst

@@ -8,7 +8,73 @@ Change Log
 ##########
 
 This document contains a summary of the new features, changes and
-fixes in each release of corstone1000 software stack.
+fixes in each release of Corstone-1000 software stack.
+
+******************
+Version 2022.11.23
+******************
+
+Changes
+=======
+
+- Booting the External System (Cortex-M3) with RTX RTOS
+- Adding MHU communication between the HOST (Cortex-A35) and the External System
+- Adding a Linux application to test the External System
+- Adding ESRT (EFI System Resource Table) support
+- Upgrading the SW stack recipes
+- Upgrades for the U-Boot FF-A driver and MM communication
+
+Corstone-1000 components versions
+=======================================
+
++-------------------------------------------+------------+
+| arm-ffa-tee                               | 1.1.1      |
++-------------------------------------------+------------+
+| arm-ffa-user                              | 5.0.0      |
++-------------------------------------------+------------+
+| corstone1000-external-sys-tests           | 1.0        |
++-------------------------------------------+------------+
+| external-system                           | 0.1.0      |
++-------------------------------------------+------------+
+| linux-yocto                               | 5.19       |
++-------------------------------------------+------------+
+| u-boot                                    | 2022.07    |
++-------------------------------------------+------------+
+| optee-client                              | 3.18.0     |
++-------------------------------------------+------------+
+| optee-os                                  | 3.18.0     |
++-------------------------------------------+------------+
+| trusted-firmware-a                        | 2.7.0      |
++-------------------------------------------+------------+
+| trusted-firmware-m                        | 1.6.0      |
++-------------------------------------------+------------+
+| ts-newlib                                 | 4.1.0      |
++-------------------------------------------+------------+
+| ts-psa-{crypto, iat, its. ps}-api-test    | 451aa087a4 |
++-------------------------------------------+------------+
+| ts-sp-{se-proxy, smm-gateway}             | 3d4956770f |
++-------------------------------------------+------------+
+
+Yocto distribution components versions
+=======================================
+
++-------------------------------------------+---------------------+
+| meta-arm                                  | langdale            |
++-------------------------------------------+---------------------+
+| poky                                      | langdale            |
++-------------------------------------------+---------------------+
+| meta-openembedded                         | langdale            |
++-------------------------------------------+---------------------+
+| busybox                                   | 1.35.0              |
++-------------------------------------------+---------------------+
+| musl                                      | 1.2.3+git37e18b7bf3 |
++-------------------------------------------+---------------------+
+| gcc-arm-none-eabi-native                  | 11.2-2022.02        |
++-------------------------------------------+---------------------+
+| gcc-cross-aarch64                         | 12.2                |
++-------------------------------------------+---------------------+
+| openssl                                   | 3.0.5               |
++-------------------------------------------+---------------------+
 
 ******************
 Version 2022.04.04
@@ -26,10 +92,10 @@ Version 2022.02.25
 
 Changes
 =======
-- Building and running psa-arch-tests on corstone1000 FVP
-- Enabled smm-gateway partition in Trusted Service on corstone1000 FVP
-- Enabled MHU driver in Trusted Service on corstone1000 FVP
-- Enabled OpenAMP support in SE proxy SP on corstone1000 FVP
+- Building and running psa-arch-tests on Corstone-1000 FVP
+- Enabled smm-gateway partition in Trusted Service on Corstone-1000 FVP
+- Enabled MHU driver in Trusted Service on Corstone-1000 FVP
+- Enabled OpenAMP support in SE proxy SP on Corstone-1000 FVP
 
 ******************
 Version 2022.02.21
@@ -48,7 +114,7 @@ Changes
 =======
 - psa-arch-tests: change master to main for psa-arch-tests
 - U-Boot: fix null pointer exception for get_image_info
-- TF-M: fix capsule instability issue for corstone1000
+- TF-M: fix capsule instability issue for Corstone-1000
 
 ******************
 Version 2022.01.07
@@ -56,9 +122,9 @@ Version 2022.01.07
 
 Changes
 =======
-- corstone1000: fix SystemReady-IR ACS test (SCT, FWTS) failures.
+- Corstone-1000: fix SystemReady-IR ACS test (SCT, FWTS) failures.
 - U-Boot: send bootcomplete event to secure enclave.
-- U-Boot: support populating corstone1000 image_info to ESRT table.
+- U-Boot: support populating Corstone-1000 image_info to ESRT table.
 - U-Boot: add ethernet device and enable configs to support bootfromnetwork SCT.
 
 ******************
@@ -67,7 +133,7 @@ Version 2021.12.15
 
 Changes
 =======
-- Enabling corstone1000 FPGA support on:
+- Enabling Corstone-1000 FPGA support on:
   - Linux 5.10
   - OP-TEE 3.14
   - Trusted Firmware-A 2.5
@@ -83,7 +149,7 @@ Version 2021.10.29
 
 Changes
 =======
-- Enabling corstone1000 FVP support on:
+- Enabling Corstone-1000 FVP support on:
   - Linux 5.10
   - OP-TEE 3.14
   - Trusted Firmware-A 2.5
@@ -95,4 +161,4 @@ Changes
 
 --------------
 
-*Copyright (c) 2021, Arm Limited. All rights reserved.*
+*Copyright (c) 2022, Arm Limited. All rights reserved.*

meta-arm-bsp/documentation/corstone1000/release-notes.rst

@@ -7,23 +7,61 @@
 Release notes
 #############
 
+
+*************************
+Disclaimer
+*************************
+
+You expressly assume all liabilities and risks relating to your use or operation
+of Your Software and Your Hardware designed or modified using the Arm Tools,
+including without limitation, Your software or Your Hardware designed or
+intended for safety-critical applications. Should Your Software or Your Hardware
+prove defective, you assume the entire cost of all necessary servicing, repair
+or correction.
+
+
+**************************
+Release notes - 2022.11.23
+**************************
+
+Known Issues or Limitations
+---------------------------
+ - The external-system can not be reset individually on (or using) AN550_v1 FPGA release. However, the system-wide reset still applies to the external-system.
+ - FPGA supports Linux distro install and boot through installer. However, FVP only supports openSUSE raw image installation and boot.
+ - Due to the performance uplimit of MPS3 FPGA and FVP, some Linux distros like Fedora Rawhide can not boot on Corstone-1000 (i.e. user may experience timeouts or boot hang).
+ - Below SCT FAILURE is a known issues in the FVP:
+   UEFI Compliant - Boot from network protocols must be implemented -- FAILURE
+ - Below SCT FAILURE is a known issue when a terminal emulator (in the system where the user connects to serial ports) does not support 80x25 or 80x50 mode:
+   EFI_SIMPLE_TEXT_OUT_PROTOCOL.SetMode - SetMode() with valid mode -- FAILURE
+ - Known limitations regarding ACS tests: The behavior after running ACS tests on FVP is not consistent.  Both behaviors are expected and are valid;
+   The system might boot till the Linux prompt. Or, the system might wait after finishing the ACS tests.
+   In both cases, the system executes the entire test suite and writes the results as stated in the user guide.
+
+
+Platform Support
+-----------------
+ - This software release is tested on Corstone-1000 FPGA version AN550_v1
+   https://developer.arm.com/downloads/-/download-fpga-images
+ - This software release is tested on Corstone-1000 Fast Model platform (FVP) version 11.19_21
+   https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
+
 **************************
 Release notes - 2022.04.04
 **************************
 
 Known Issues or Limitations
 ---------------------------
- - FGPA support Linux distro install and boot through installer. However,
+ - FPGA support Linux distro install and boot through installer. However,
    FVP only support openSUSE raw image installation and boot.
  - Due to the performance uplimit of MPS3 FPGA and FVP, some Linux distros like Fedora Rawhide
-   cannot boot on corstone1000 (i.e. user may experience timeouts or boot hang).
+   cannot boot on Corstone-1000 (i.e. user may experience timeouts or boot hang).
  - Below SCT FAILURE is a known issues in the FVP:
    UEFI Compliant - Boot from network protocols must be implemented -- FAILURE
 
 Platform Support
 -----------------
- - This software release is tested on corstone1000 FPGA version AN550_v1
- - This software release is tested on corstone1000 Fast Model platform (FVP) version 11.17_23
+ - This software release is tested on Corstone-1000 FPGA version AN550_v1
+ - This software release is tested on Corstone-1000 Fast Model platform (FVP) version 11.17_23
    https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
 
 **************************
@@ -32,13 +70,13 @@ Release notes - 2022.02.25
 
 Known Issues or Limitations
 ---------------------------
- - The following tests only work on corstone1000 FPGA: ACS tests (SCT, FWTS,
+ - The following tests only work on Corstone-1000 FPGA: ACS tests (SCT, FWTS,
    BSA), manual capsule update test, Linux distro install and boot.
 
 Platform Support
 ----------------
- - This software release is tested on corstone1000 FPGA version AN550_v1
- - This software release is tested on corstone1000 Fast Model platform (FVP) version 11.17_23
+ - This software release is tested on Corstone-1000 FPGA version AN550_v1
+ - This software release is tested on Corstone-1000 Fast Model platform (FVP) version 11.17_23
    https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
 
 Release notes - 2022.02.21
@@ -46,13 +84,13 @@ Release notes - 2022.02.21
 
 Known Issues or Limitations
 ---------------------------
- - The following tests only work on corstone1000 FPGA: ACS tests (SCT, FWTS,
+ - The following tests only work on Corstone-1000 FPGA: ACS tests (SCT, FWTS,
    BSA), manual capsule update test, Linux distro install and boot, psa-arch-test.
 
 Platform Support
 ----------------
- - This software release is tested on corstone1000 FPGA version AN550_v1
- - This software release is tested on corstone1000 Fast Model platform (FVP) version 11.16.21
+ - This software release is tested on Corstone-1000 FPGA version AN550_v1
+ - This software release is tested on Corstone-1000 Fast Model platform (FVP) version 11.16.21
    https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
 
 Release notes - 2022.01.18
@@ -85,13 +123,13 @@ The following components are present in the release:
 
 Platform Support
 ----------------
- - This software release is tested on corstone1000 FPGA version AN550_v1
- - This software release is tested on corstone1000 Fast Model platform (FVP) version 11.16.21
+ - This software release is tested on Corstone-1000 FPGA version AN550_v1
+ - This software release is tested on Corstone-1000 Fast Model platform (FVP) version 11.16.21
    https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
 
 Known Issues or Limitations
 ---------------------------
- - The following tests only work on corstone1000 FPGA: ACS tests (SCT, FWTS,
+ - The following tests only work on Corstone-1000 FPGA: ACS tests (SCT, FWTS,
    BSA), manual capsule update test, Linux distro install and boot, and
    psa-arch-tests.
  - Only the manual capsule update from UEFI shell is supported on FPGA.
@@ -107,7 +145,7 @@ Release notes - 2021.10.29
 
 Software Features
 -----------------
-This initial release of corstone1000 supports booting Linux on the Cortex-A35
+This initial release of Corstone-1000 supports booting Linux on the Cortex-A35
 and TF-M/MCUBOOT in the Secure Enclave. The following components are present in
 the release:
 
@@ -119,7 +157,7 @@ the release:
 
 Platform Support
 ----------------
- - This Software release is tested on corstone1000 Fast Model platform (FVP) version 11.16.21
+ - This Software release is tested on Corstone-1000 Fast Model platform (FVP) version 11.16.21
    https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
 
 Known Issues or Limitations
@@ -130,8 +168,10 @@ Known Issues or Limitations
 
 Support
 -------
-For support email: support-subsystem-iot@arm.com
+For technical support email: support-subsystem-iot@arm.com
+
+For all security issues, contact Arm by email at arm-security@arm.com.
 
 --------------
 
-*Copyright (c) 2021, Arm Limited. All rights reserved.*
+*Copyright (c) 2022, Arm Limited. All rights reserved.*

meta-arm-bsp/documentation/fvp-baser-aemv8r64.md

@@ -27,9 +27,9 @@ The fvp-baser-aemv8r64 Yocto MACHINE supports the following BSP components,
 where either a standard or Real-Time Linux kernel (PREEMPT\_RT) can be built
 and run:
 
- - FVP_Base_AEMv8R: v11.19.14
+ - FVP_Base_AEMv8R: v11.20.15
  - boot-wrapper-aarch64: provides PSCI support
- - U-Boot: v2022.04 - provides UEFI services
+ - U-Boot: v2022.07 - provides UEFI services
  - Linux kernel: linux-yocto-5.15
  - Linux kernel with PREEMPT\_RT support: linux-yocto-rt-5.15
 

meta-arm-bsp/recipes-bsp/external-system/external-system_0.1.0.bb

@@ -8,7 +8,8 @@ LICENSE = "BSD-3-Clause & Apache-2.0"
 LIC_FILES_CHKSUM = "file://license.md;md5=e44b2531cd6ffe9dece394dbe988d9a0 \
                     file://cmsis/LICENSE.txt;md5=e3fc50a88d0a364313df4b21ef20c29e"
 
-SRC_URI = "gitsm://git.gitlab.arm.com/arm-reference-solutions/corstone1000/external_system/rtx.git;protocol=https;branch=master"
+SRC_URI = "gitsm://git.gitlab.arm.com/arm-reference-solutions/corstone1000/external_system/rtx.git;protocol=https;branch=master \
+           file://race.patch"
 SRCREV = "8c9dca74b104ff6c9722fb0738ba93dd3719c080"
 PV .= "+git${SRCPV}"
 

meta-arm-bsp/recipes-bsp/external-system/files/race.patch

@@ -0,0 +1,66 @@
+Upstream-Status: Submitted [https://gitlab.arm.com/arm-reference-solutions/corstone1000/external_system/rtx/-/issues/1]
+Signed-off-by: Ross Burton <ross.burton@arm.com>
+
+From 34e1c04534607f5605255f39fb46e26261fc9c4e Mon Sep 17 00:00:00 2001
+From: Ross Burton <ross.burton@arm.com>
+Date: Tue, 8 Sep 2020 11:49:08 +0100
+Subject: [PATCH] tools/gen_module_code: atomically rewrite the generated files
+
+The gen_module rule in rules.mk is marked as .PHONY, so make will
+execute it whenever it is mentioned. This results in gen_module_code
+being executed 64 times for a Juno build.
+
+However in heavily parallel builds there's a good chance that
+gen_module_code is writing a file whilst the compiler is reading it
+because make also doesn't know what files are generated by
+gen_module_code.
+
+The correct fix is to adjust the Makefiles so that the dependencies are
+correct but this isn't trivial, so band-aid the problem by atomically
+writing the generated files.
+
+Change-Id: I82d44f9ea6537a91002e1f80de8861d208571630
+Signed-off-by: Ross Burton <ross.burton@arm.com>
+---
+ tools/gen_module_code.py | 19 ++++++++++++++-----
+ 1 file changed, 14 insertions(+), 5 deletions(-)
+
+diff --git a/tools/gen_module_code.py b/tools/gen_module_code.py
+index 7b3953845..ee099b713 100755
+--- a/tools/gen_module_code.py
++++ b/tools/gen_module_code.py
+@@ -17,6 +17,7 @@
+ import argparse
+ import os
+ import sys
++import tempfile
+ 
+ DEFAULT_PATH = 'build/'
+ 
+@@ -53,13 +54,21 @@
+ 
+ def generate_file(path, filename, content):
+     full_filename = os.path.join(path, filename)
+-    with open(full_filename, 'a+') as f:
+-        f.seek(0)
+-        if f.read() != content:
++
++    try:
++        with open(full_filename) as f:
++            rewrite = f.read() != content
++    except FileNotFoundError:
++        rewrite = True
++
++    if rewrite:
++        with tempfile.NamedTemporaryFile(prefix="gen-module-code",
++                                         dir=path,
++                                         delete=False,
++                                         mode="wt") as f:
+             print("[GEN] {}...".format(full_filename))
+-            f.seek(0)
+-            f.truncate()
+             f.write(content)
++        os.replace(f.name, full_filename)
+ 
+ 
+ def generate_header(path, modules):

meta-arm-bsp/recipes-bsp/images/corstone1000-image.bb

@@ -7,10 +7,15 @@ COMPATIBLE_MACHINE = "corstone1000"
 
 inherit image
 inherit wic_nopt tfm_sign_image
+inherit  uefi_capsule
 
 PACKAGE_INSTALL = ""
 
-IMAGE_FSTYPES += "wic wic.nopt"
+IMAGE_FSTYPES += "wic wic.nopt uefi_capsule"
+
+UEFI_FIRMWARE_BINARY = "${PN}-${MACHINE}.${CAPSULE_IMGTYPE}"
+UEFI_CAPSULE_CONFIG = "${THISDIR}/files/${PN}-capsule-update-image.json"
+CAPSULE_IMGTYPE = "wic.nopt"
 
 do_sign_images() {
     # Sign TF-A BL2

meta-arm-bsp/recipes-bsp/images/files/corstone1000-image-capsule-update-image.json

@@ -0,0 +1,11 @@
+{
+    "Payloads": [
+        {
+            "FwVersion": "5",
+            "Guid": "e2bb9c06-70e9-4b14-97a3-5a7913176e3f",
+            "LowestSupportedVersion": "1",
+            "Payload": "$UEFI_FIRMWARE_BINARY",
+            "UpdateImageIndex": "0"
+        }
+    ]
+}

meta-arm-bsp/recipes-bsp/images/firmware-image-juno.bb

@@ -63,10 +63,10 @@ do_deploy() {
     done
 
     if [ "${INITRAMFS_IMAGE_BUNDLE}" -eq 1 ]; then
-        cp -L -f ${DEPLOY_DIR_IMAGE}/Image-initramfs-juno.bin \
+        cp -L -f ${DEPLOY_DIR_IMAGE}/Image.gz-initramfs-juno.bin \
             ${D}/${UNPACK_DIR}/SOFTWARE/Image
     else
-        cp -L -f ${DEPLOY_DIR_IMAGE}/Image ${D}/${UNPACK_DIR}/SOFTWARE/
+        cp -L -f ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE} ${D}/${UNPACK_DIR}/SOFTWARE/
     fi
 
     # Compress the files

meta-arm-bsp/recipes-bsp/trusted-firmware-m/corstone1000/0001-corstone1000-platform-secure-test-framework.patch

@@ -0,0 +1,359 @@
+From 6ab17eeb8225cdf4afc6956c9a2774d60866c36d Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Mon, 28 Mar 2022 05:16:50 +0100
+Subject: [PATCH 1/6] corstone1000: platform secure test framework
+
+Change-Id: Ib781927f0add93ec9c06515d251e79518ee1db6e
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+Upstream-Status: Accepted [TF-Mv1.7.0]
+---
+ .../arm/corstone1000/Native_Driver/firewall.c |  15 ++
+ .../arm/corstone1000/Native_Driver/firewall.h |   5 +
+ .../ci_regression_tests/CMakeLists.txt        |  45 +++++
+ .../corstone1000/ci_regression_tests/s_test.c | 186 ++++++++++++++++++
+ .../corstone1000/ci_regression_tests/s_test.h |  30 +++
+ .../ci_regression_tests/s_test_config.cmake   |   8 +
+ 6 files changed, 289 insertions(+)
+ create mode 100644 platform/ext/target/arm/corstone1000/ci_regression_tests/CMakeLists.txt
+ create mode 100644 platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.c
+ create mode 100644 platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.h
+ create mode 100644 platform/ext/target/arm/corstone1000/ci_regression_tests/s_test_config.cmake
+
+diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/firewall.c b/platform/ext/target/arm/corstone1000/Native_Driver/firewall.c
+index 788cc3ec92..356b85e9d5 100755
+--- a/platform/ext/target/arm/corstone1000/Native_Driver/firewall.c
++++ b/platform/ext/target/arm/corstone1000/Native_Driver/firewall.c
+@@ -293,6 +293,21 @@ void fc_enable_mpl(enum rgn_mpe_t mpe, enum rgn_mpl_t mpl)
+         ptr->rgn_mpl3 |= (mpl & RGN_MPL_EN_MASK);
+ }
+ 
++void fc_read_mpl(enum rgn_mpe_t mpe, enum rgn_mpl_t* mpl)
++{
++    struct _firewall_pe_rwe_reg_map_t *ptr =
++         (struct _firewall_pe_rwe_reg_map_t *)fw_data.rwe_ptr;
++    if (mpe == RGN_MPE0)
++        *mpl = (ptr->rgn_mpl0 & RGN_MPL_EN_MASK);
++    else if (mpe == RGN_MPE1)
++        *mpl = (ptr->rgn_mpl1 & RGN_MPL_EN_MASK);
++    else if (mpe == RGN_MPE2)
++        *mpl = (ptr->rgn_mpl2 & RGN_MPL_EN_MASK);
++    else if (mpe == RGN_MPE3)
++        *mpl = (ptr->rgn_mpl3 & RGN_MPL_EN_MASK);
++}
++
++
+ void fc_disable_mpl(enum rgn_mpe_t mpe, enum rgn_mpl_t mpl)
+ {
+     struct _firewall_pe_rwe_reg_map_t *ptr =
+diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/firewall.h b/platform/ext/target/arm/corstone1000/Native_Driver/firewall.h
+index 48c86725ef..17afe6a92f 100755
+--- a/platform/ext/target/arm/corstone1000/Native_Driver/firewall.h
++++ b/platform/ext/target/arm/corstone1000/Native_Driver/firewall.h
+@@ -247,6 +247,11 @@ void fc_init_mpl(enum rgn_mpe_t mpe);
+  */
+ void fc_enable_mpl(enum rgn_mpe_t mpe, enum rgn_mpl_t mpl);
+ 
++/**
++ * \brief Reads Master Permission List in the selected Firewall Component
++ */
++void fc_read_mpl(enum rgn_mpe_t mpe, enum rgn_mpl_t* mpl);
++
+ /**
+  * \brief Disables Master Permission List in the selected Firewall Component
+  */
+diff --git a/platform/ext/target/arm/corstone1000/ci_regression_tests/CMakeLists.txt b/platform/ext/target/arm/corstone1000/ci_regression_tests/CMakeLists.txt
+new file mode 100644
+index 0000000000..70e1c20e4e
+--- /dev/null
++++ b/platform/ext/target/arm/corstone1000/ci_regression_tests/CMakeLists.txt
+@@ -0,0 +1,45 @@
++#-------------------------------------------------------------------------------
++# Copyright (c) 2021-22, Arm Limited. All rights reserved.
++#
++# SPDX-License-Identifier: BSD-3-Clause
++#
++#-------------------------------------------------------------------------------
++
++cmake_policy(SET CMP0079 NEW)
++
++include(${CMAKE_CURRENT_SOURCE_DIR}/s_test_config.cmake)
++
++####################### Secure #################################################
++
++add_library(corstone1000_test_s STATIC EXCLUDE_FROM_ALL)
++
++target_sources(corstone1000_test_s
++    PRIVATE
++        ${CMAKE_CURRENT_SOURCE_DIR}/s_test.c
++        ../Native_Driver/firewall.c
++)
++
++target_include_directories(corstone1000_test_s
++    PRIVATE
++        ${CMAKE_CURRENT_SOURCE_DIR}
++        ../Device/Include
++        ../Native_Driver
++)
++
++# Example test links tfm_test_suite_extra_common to use related interface
++target_link_libraries(corstone1000_test_s
++    PRIVATE
++        tfm_test_suite_extra_common
++        tfm_log
++)
++
++target_compile_definitions(corstone1000_test_s
++    PRIVATE
++        $<$<BOOL:${PLATFORM_IS_FVP}>:PLATFORM_IS_FVP>
++)
++
++# The corstone1000_test_s library is linked by tfm_test_suite_extra_s
++target_link_libraries(tfm_test_suite_extra_s
++    PRIVATE
++        corstone1000_test_s
++)
+diff --git a/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.c b/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.c
+new file mode 100644
+index 0000000000..963f46d2ab
+--- /dev/null
++++ b/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.c
+@@ -0,0 +1,186 @@
++/*
++ * Copyright (c) 2021-22, Arm Limited. All rights reserved.
++ *
++ * SPDX-License-Identifier: BSD-3-Clause
++ *
++ */
++
++#include "s_test.h"
++#include "platform_base_address.h"
++#include "firewall.h"
++#include "tfm_log_raw.h"
++
++#define DISABLED_TEST 0
++
++enum host_firewall_host_comp_id_t {
++  HOST_FCTRL = (0x00u),
++  COMP_SYSPERIPH,
++  COMP_DBGPERIPH,
++  COMP_AONPERIPH,
++  COMP_XNVM,
++  COMP_CVM,
++  COMP_HOSTCPU,
++  COMP_EXTSYS0,
++  COMP_EXTSYS1,
++  COMP_EXPSLV0,
++  COMP_EXPSLV1,
++  COMP_EXPMST0,
++  COMP_EXPMST1,
++  COMP_OCVM,
++  COMP_DEBUG,
++};
++
++const struct extra_tests_t plat_s_t = {
++    .test_entry = s_test,
++    .expected_ret = EXTRA_TEST_SUCCESS
++};
++
++static int test_host_firewall_status(void)
++{
++    enum fw_lockdown_status_t status;
++    uint32_t any_component_id = 2;
++
++    fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, any_component_id);
++    status = fw_get_lockdown_status();
++    if (status != FW_LOCKED) {
++        tfm_log_printf("FAIL: %s.\n\r", __func__);
++        return EXTRA_TEST_FAILED;
++    }
++
++    tfm_log_printf("PASS: %s\n\r", __func__);
++    return EXTRA_TEST_SUCCESS;
++}
++
++static int test_host_firewall_external_flash_configurations(void)
++{
++    enum rgn_mpl_t mpl_rights = 0;
++    enum rgn_mpl_t expected_rights = 0;
++
++#if !(PLATFORM_IS_FVP)
++    /* External flash */
++    fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, COMP_EXPMST0);
++    fc_select_region(3);
++    fc_read_mpl(RGN_MPE0, &mpl_rights);
++    expected_rights = (RGN_MPL_ANY_MST_MASK | RGN_MPL_SECURE_READ_MASK |
++                                              RGN_MPL_SECURE_WRITE_MASK);
++    if (mpl_rights != expected_rights) {
++        tfm_log_printf("FAIL1: %s.\n\r", __func__);
++        return EXTRA_TEST_FAILED;
++    }
++    /* XIP Permissions */
++    fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, COMP_XNVM);
++    fc_select_region(1);
++    fc_read_mpl(RGN_MPE0, &mpl_rights);
++    expected_rights = (RGN_MPL_ANY_MST_MASK |
++                              RGN_MPL_SECURE_READ_MASK |
++                              RGN_MPL_NONSECURE_READ_MASK);
++    if (mpl_rights != expected_rights) {
++        tfm_log_printf("FAIL2: %s.\n\r", __func__);
++        return EXTRA_TEST_FAILED;
++    }
++#else
++    /* Enable the below test when FVP Host Firewall is configured. */
++    /*
++    fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, COMP_XNVM);
++    fc_select_region(1);
++    fc_read_mpl(RGN_MPE0, &mpl_rights);
++    tfm_log_printf("mpl rights = %d\n\r", mpl_rights);
++    expected_rights = (RGN_MPL_ANY_MST_MASK |
++                  RGN_MPL_SECURE_READ_MASK |
++                  RGN_MPL_SECURE_WRITE_MASK |
++                  RGN_MPL_NONSECURE_READ_MASK |
++                  RGN_MPL_NONSECURE_WRITE_MASK);
++    if (mpl_rights != expected_rights) {
++        tfm_log_printf("FAIL1: %s.\n\r", __func__);
++        return EXTRA_TEST_FAILED;
++    }
++    */
++#endif
++
++    tfm_log_printf("PASS: %s\n\r", __func__);
++    return EXTRA_TEST_SUCCESS;
++}
++
++static int test_host_firewall_secure_flash_configurations(void)
++{
++    enum rgn_mpl_t mpl_rights = 0;
++    enum rgn_mpl_t expected_rights = 0;
++
++#if !(PLATFORM_IS_FVP)
++    /* External flash */
++    fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, COMP_EXPMST1);
++    fc_select_region(1);
++    fc_read_mpl(RGN_MPE0, &mpl_rights);
++    expected_rights = (RGN_MPL_ANY_MST_MASK | RGN_MPL_SECURE_READ_MASK |
++                                              RGN_MPL_SECURE_WRITE_MASK);
++    if (mpl_rights != expected_rights) {
++        tfm_log_printf("FAIL: %s.\n\r", __func__);
++        return EXTRA_TEST_FAILED;
++    }
++#endif
++
++    tfm_log_printf("PASS: %s\n\r", __func__);
++    return EXTRA_TEST_SUCCESS;
++}
++
++static int test_bir_programming(void)
++{
++    /* BIR is expected to bhaive like write once register */
++
++    volatile uint32_t *bir_base = (uint32_t *)CORSTONE1000_HOST_BIR_BASE;
++
++    bir_base[0] = 0x1;
++    bir_base[0] = 0x2;
++    if (bir_base[0] != 0x1) {
++        tfm_log_printf("FAIL: %s : (%u)\n\r", __func__, bir_base[0]);
++        return EXTRA_TEST_FAILED;
++    }
++
++    tfm_log_printf("PASS: %s\n\r", __func__);
++    return EXTRA_TEST_SUCCESS;
++}
++
++int32_t s_test(void)
++{
++    int status;
++    int failures = 0;
++
++#if (DISABLED_TEST == 1)
++    status = test_host_firewall_status();
++    if (status) {
++        failures++;
++    }
++#endif
++
++    status = test_host_firewall_secure_flash_configurations();
++    if (status) {
++        failures++;
++    }
++
++    status = test_host_firewall_external_flash_configurations();
++    if (status) {
++        failures++;
++    }
++
++#if (DISABLED_TEST == 1)
++    status = test_bir_programming();
++    if (status) {
++        failures++;
++    }
++#endif
++
++    if (failures) {
++        tfm_log_printf("Not all platform test could pass: failures=%d\n\r", failures);
++        return EXTRA_TEST_FAILED;
++    }
++
++    tfm_log_printf("ALL_PASS: corstone1000 platform test cases passed.\n\r");
++    return EXTRA_TEST_SUCCESS;
++}
++
++int32_t extra_tests_init(struct extra_tests_t *internal_test_t)
++{
++    /* Add platform init code here. */
++
++    return register_extra_tests(internal_test_t, &plat_s_t);
++}
+diff --git a/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.h b/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.h
+new file mode 100644
+index 0000000000..8aff4d679c
+--- /dev/null
++++ b/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.h
+@@ -0,0 +1,30 @@
++/*
++ * Copyright (c) 2021-22, Arm Limited. All rights reserved.
++ *
++ * SPDX-License-Identifier: BSD-3-Clause
++ *
++ */
++
++#ifndef __S_TESTS_H__
++#define __S_TESTS_H__
++
++#include "extra_tests_common.h"
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++const struct extra_tests_t plat_s_t;
++
++/**
++ * \brief Platform specific secure test function.
++ *
++ * \returns Returns error code as specified in \ref int32_t
++ */
++int32_t s_test(void);
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* __S_TESTS_H__ */
+diff --git a/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test_config.cmake b/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test_config.cmake
+new file mode 100644
+index 0000000000..bb8d26bf1c
+--- /dev/null
++++ b/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test_config.cmake
+@@ -0,0 +1,8 @@
++#-------------------------------------------------------------------------------
++# Copyright (c) 2021-22, Arm Limited. All rights reserved.
++#
++# SPDX-License-Identifier: BSD-3-Clause
++#
++#-------------------------------------------------------------------------------
++
++############ Define secure test specific cmake configurations here #############
+-- 
+2.25.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-m/corstone1000/0002-corstone1000-make-external-system-support-optional.patch

@@ -0,0 +1,77 @@
+From 6fd49ab55c3419429e437845864c5bb2d731da29 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Mon, 25 Apr 2022 05:26:38 +0100
+Subject: [PATCH 2/6] corstone1000: make external system support optional
+
+The commits introduce build time variables to make
+external system support in the platform optional.
+
+Change-Id: I593014e0da4ac553c105c66ae55f6fd83ffe427e
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+Upstream-Status: Accepted [TF-Mv1.7.0]
+---
+ .../ext/target/arm/corstone1000/CMakeLists.txt    |  1 +
+ platform/ext/target/arm/corstone1000/config.cmake |  1 +
+ .../target/arm/corstone1000/tfm_hal_multi_core.c  | 15 +++++++++++++++
+ 3 files changed, 17 insertions(+)
+
+diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+index 16bc708964..39d7b03455 100644
+--- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
++++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+@@ -97,6 +97,7 @@ target_compile_definitions(platform_s
+     PRIVATE
+         $<$<BOOL:${PLATFORM_IS_FVP}>:PLATFORM_IS_FVP>
+         $<$<BOOL:${TEST_S}>:TEST_S>
++        $<$<BOOL:${EXTERNAL_SYSTEM_SUPPORT}>:EXTERNAL_SYSTEM_SUPPORT>
+ )
+ 
+ #========================= Platform BL2 =======================================#
+diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
+index e5f91108ee..a3399db318 100644
+--- a/platform/ext/target/arm/corstone1000/config.cmake
++++ b/platform/ext/target/arm/corstone1000/config.cmake
+@@ -21,6 +21,7 @@ set(CRYPTO_HW_ACCELERATOR               ON         CACHE BOOL     "Whether to en
+ set(CRYPTO_NV_SEED                      OFF        CACHE BOOL     "Use stored NV seed to provide entropy")
+ set(TFM_CRYPTO_TEST_ALG_CFB             OFF        CACHE BOOL     "Test CFB cryptography mode")
+ set(NS                                  FALSE      CACHE BOOL     "Whether to build NS app")
++set(EXTERNAL_SYSTEM_SUPPORT             OFF        CACHE BOOL     "Whether to include external system support.")
+ 
+ # FVP is not integrated/tested with CC312.
+ if (${PLATFORM_IS_FVP})
+diff --git a/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c b/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
+index 8e1b455086..8622844d91 100644
+--- a/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
++++ b/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
+@@ -16,6 +16,16 @@
+ #define HOST_CPU_PE0_CONFIG_OFFSET 0x010
+ #define AA64nAA32_MASK (1 << 3)
+ 
++#ifdef EXTERNAL_SYSTEM_SUPPORT
++void tfm_external_system_boot()
++{
++    volatile uint32_t *ext_sys_reset_ctl_reg = (uint32_t *)(CORSTONE1000_EXT_SYS_RESET_REG);
++
++    /* de-assert CPU_WAIT signal*/
++    *ext_sys_reset_ctl_reg = 0x0;
++}
++#endif
++
+ void tfm_hal_boot_ns_cpu(uintptr_t start_addr)
+ {
+     /* Switch the shared flash to XiP mode for the host */
+@@ -53,6 +63,11 @@ void tfm_hal_boot_ns_cpu(uintptr_t start_addr)
+     *reset_ctl_reg = 0;
+ 
+     (void) start_addr;
++
++#ifdef EXTERNAL_SYSTEM_SUPPORT
++    /*release EXT SYS out of reset*/
++    tfm_external_system_boot();
++#endif
+ }
+ 
+ void tfm_hal_wait_for_ns_cpu_ready(void)
+-- 
+2.25.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-m/corstone1000/0003-corstone1000-enable-secure-enclave-run-without-host-.patch

@@ -0,0 +1,298 @@
+From 2e56f2601249243f2fb3ba67caf9febe4bfc8371 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Tue, 26 Apr 2022 20:17:13 +0100
+Subject: [PATCH 3/6] corstone1000: enable secure enclave run without host
+ binaries
+
+In TEST_S configuration, the build disables part of the code which
+assumes that the host binaries are present in the flash. This change
+will allow secure enclave's part of the platforms software to build
+and run without the host support. The configuration can be used to run
+CI and test secure enclave software independently.
+
+Change-Id: I29325750a3bea270fe5b3b8b47932a7071a59482
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+Upstream-Status: Accepted [TF-Mv1.7.0]
+---
+ .../ext/target/arm/corstone1000/readme.rst    | 88 +++++++++++++++----
+ .../target/arm/corstone1000/CMakeLists.txt    |  8 +-
+ .../arm/corstone1000/bl1/CMakeLists.txt       |  2 +-
+ .../target/arm/corstone1000/bl2_flash_map.c   |  2 +
+ .../target/arm/corstone1000/boot_hal_bl2.c    |  2 +
+ .../ext/target/arm/corstone1000/config.cmake  | 11 ++-
+ .../arm/corstone1000/partition/flash_layout.h |  2 +-
+ .../arm/corstone1000/tfm_hal_multi_core.c     |  2 +
+ 8 files changed, 94 insertions(+), 23 deletions(-)
+
+diff --git a/docs/platform/ext/target/arm/corstone1000/readme.rst b/docs/platform/ext/target/arm/corstone1000/readme.rst
+index 94b58ac6fc..10c9c58f78 100644
+--- a/docs/platform/ext/target/arm/corstone1000/readme.rst
++++ b/docs/platform/ext/target/arm/corstone1000/readme.rst
+@@ -7,22 +7,27 @@ Introduction
+ ************
+ 
+ The ARM's Corstone-1000 platform is a reference implementation of PSA FF-M
+-architecture where NSPE and SPE environments are partitioned into
++architecture where NSPE and SPE environments are partitioned/isolated into
+ Cortex-A35 and Cortex-M0+ respectively.
+ 
+ Cortex-M0+ acting as Secure Enclave is the Root-of-trust of SoC. Its
+-software comprises of two boot loading stages, i.e. Bl1 and Bl2, based on
+-mcuboot, and TF-M as run time software. Cortex-A35, also referred as host,
+-is completely treated as non-secure from the Secure Enclave perspective.
++software comprises of two boot loading stages, i.e. Bl1 and Bl2 (based on
++mcuboot) and TF-M as run time software. Cortex-A35, also referred as host,
++is treated as non-secure from the Secure Enclave perspective.
+ The Cortex-A35 is brought out of rest by Secure Enclave in aarch64 bit mode,
+ and boots the software ecosystem based on linux, u-boot, UEFI run time
+-services, TF-A and Optee.
++services, TF-A, Secure Partitions and Optee.
+ 
+ The communication between NSPE and SPE is based on PSA IPC protocol running on
+-top of OpenAMP.
++top of FF-A/OpenAMP.
+ 
+ The secure enclave subsystem has ARM's CC-312 (Crypto Cell) hardware to
+-accelerate cryptographic operations.
++accelerate cryptographic operations. Additionaly, platform supports Secure Debug
++using SDC-600 as the communication interface between host debugger and platform
++target. The platform has the build option to enable secure debug protocol to
++unlock debug ports during boot time. The protocol is based on ARM's ADAC
++(Authenticated Debug Access Control) standard.
++
+ 
+ ***********
+ System boot
+@@ -33,23 +38,76 @@ System boot
+ - BL1 load, verifies and transfer execution to BL2 which is again based on mcuboot.
+ - BL2 loads and verifies TF-M and host's initial boot loader image.
+ - BL2 transfer the execution to the TF-M.
+-- During TF-M initialization, the host is reset.
++- During TF-M initialization, the host is taken out of rest.
++- Hashes of the keys used for image verification are stored in the OTP memory.
+ 
+ *****
+ Build
+ *****
+ 
+-.. code-block::
++Platform solution
++=================
++
++The platform binaries are build using Yocto. Below is the user guide:
++
++`Arm Corstone-1000 User Guide`_
++
++Secure Test
++===========
++
++This section can be used to test the secure enclave software indedendently from
++the host. The below configuration builds the secure enclave binaries with CI test
++frame integrated. On boot, secure enclave softwares stack is brought up, and
++CI tests starts executing at the end of the initialization process. In the
++below configuration, host software support is disabled, and meant only
++to test/verify the secure enclave softwares.
++
++FVP
++---
+ 
+-    cmake -B build/ -S <tf-m-root>/ -DCMAKE_BUILD_TYPE=Debug -DTFM_TOOLCHAIN_FILE=<tf-m-root>/toolchain_GNUARM.cmake -DTFM_PLATFORM=arm/corstone1000
++- Download Corstone-1000 FVP from : `Arm Ecosystem FVPs`_
++- Install FVP by running the shell script.
++- Running of the binary will boot secure enclave software stack and at the end all CI test
++  from tf-m-test along with platform specific tests are executed.
++
++.. code-block:: bash
++
++    cmake -B build/ -S <tf-m-root>/ -DCMAKE_BUILD_TYPE=Debug -DTFM_TOOLCHAIN_FILE=<tf-m-root>/toolchain_GNUARM.cmake -DTFM_PLATFORM=arm/corstone1000 -DPLATFORM_IS_FVP=TRUE -DTEST_NS=OFF -DTEST_S=ON -DEXTRA_S_TEST_SUITES_PATHS=<tf-m-root>/trusted-firmware-m/platform/ext/target/arm/corstone1000/ci_regression_tests/
+     cmake --build build -- install
++    cd ./build/install/outputs/
++    cat bl2_signed.bin bl2_signed.bin tfm_s_signed.bin > cs1000.bin
++    cd <path-to-FVP-installation>/models/Linux64_GCC-9.3/
++    ./FVP_Corstone-1000 -C board.flashloader0.fname="none" -C se.trustedBootROMloader.fname="./<path-to-build-dir>/install/outputs/bl1.bin" -C board.xnvm_size=64 -C se.trustedSRAM_config=6 -C se.BootROM_config="3" -C board.smsc_91c111.enabled=0  -C board.hostbridge.userNetworking=true --data board.flash0=./<path-to-build-dir>/install/outputs/cs1000.bin@0x68100000 -C diagnostics=4 -C disable_visualisation=true -C board.se_flash_size=8192 -C diagnostics=4  -C disable_visualisation=true
++
++FPGA
++----
+ 
+-The binaries will be installed inside:
++- Follow the above pointed platform user guide to setup the FPGA board.
++- Use the BL1 generated from the below commands to place it inside FPGA board SD Card.
++- Use the cs1000.bin created from the below commands to place it inside FPGA board SD Card.
++
++.. code-block:: bash
++
++    cmake -B build/ -S <tf-m-root>/ -DCMAKE_BUILD_TYPE=Debug -DTFM_TOOLCHAIN_FILE=<tf-m-root>/toolchain_GNUARM.cmake -DTFM_PLATFORM=arm/corstone1000 -DTEST_NS=OFF -DTEST_S=ON -DEXTRA_S_TEST_SUITES_PATHS=<tf-m-root>/trusted-firmware-m/platform/ext/target/arm/corstone1000/ci_regression_tests/ -DTEST_S_PS=OFF -DTEST_S_PLATFORM=OFF
++    cmake --build build -- install
++    cd ./build/install/outputs/
++    cat bl2_signed.bin bl2_signed.bin tfm_s_signed.bin > cs1000.bin
++    cp bl1.bin <path-to-FPGA-SD-CARD>/SOFTWARE/
++    cp cs1000.bin <path-to-FPGA-SD-CARD>/SOFTWARE/
+ 
+-.. code-block::
++FPGA build can not compile all the CI tests into a single build as it exceeds
++the available RAM size. So there is a need to select few tests but not all.
++The above configuration disable build of -DTEST_S_PS and -DTEST_S_PLATFORM.
++Other test configurations are:
+ 
+-    ./build/install/outputs/ARM/CORSTONE1000
++- -DTEST_S_ATTESTATION=ON/OFF
++- -DTEST_S_AUDIT=ON/OFF
++- -DTEST_S_CRYPTO=ON/OFF
++- -DTEST_S_ITS=ON/OFF
++- -DTEST_S_PS=ON/OFF
++- -DTEST_S_PLATFORM=ON/OFF
+ 
+---------------
++*Copyright (c) 2021-2022, Arm Limited. All rights reserved.*
+ 
+-*Copyright (c) 2021, Arm Limited. All rights reserved.*
++.. _Arm Ecosystem FVPs: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
++.. _Arm Corstone-1000 User Guide: https://gitlab.arm.com/arm-reference-solutions/arm-reference-solutions-docs/-/blob/CORSTONE1000-2022.04.19/docs/embedded-a/corstone1000/user-guide.rst
+diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+index 39d7b03455..81522c7cf0 100644
+--- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
++++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+@@ -18,7 +18,7 @@ target_include_directories(platform_region_defs
+ 
+ target_compile_definitions(platform_region_defs
+     INTERFACE
+-        $<$<BOOL:${TEST_S}>:TEST_S>
++        $<$<BOOL:${TFM_S_REG_TEST}>:TFM_S_REG_TEST>
+ )
+ #========================= Platform common defs ===============================#
+ 
+@@ -75,7 +75,7 @@ target_sources(platform_s
+         $<$<BOOL:TFM_PARTITION_PLATFORM>:${CMAKE_CURRENT_SOURCE_DIR}/services/src/tfm_platform_system.c>
+         fw_update_agent/uefi_capsule_parser.c
+         fw_update_agent/fwu_agent.c
+-        $<$<BOOL:${TEST_S}>:${CMAKE_CURRENT_SOURCE_DIR}/target_cfg.c>
++        $<$<BOOL:${TFM_S_REG_TEST}>:${CMAKE_CURRENT_SOURCE_DIR}/target_cfg.c>
+ )
+ 
+ if (PLATFORM_IS_FVP)
+@@ -96,7 +96,7 @@ endif()
+ target_compile_definitions(platform_s
+     PRIVATE
+         $<$<BOOL:${PLATFORM_IS_FVP}>:PLATFORM_IS_FVP>
+-        $<$<BOOL:${TEST_S}>:TEST_S>
++        $<$<BOOL:${TFM_S_REG_TEST}>:TFM_S_REG_TEST>
+         $<$<BOOL:${EXTERNAL_SYSTEM_SUPPORT}>:EXTERNAL_SYSTEM_SUPPORT>
+ )
+ 
+@@ -136,7 +136,7 @@ endif()
+ target_compile_definitions(platform_bl2
+     PRIVATE
+         $<$<BOOL:${PLATFORM_IS_FVP}>:PLATFORM_IS_FVP>
+-        $<$<BOOL:${TEST_S}>:TEST_S>
++        $<$<BOOL:${TFM_S_REG_TEST}>:TFM_S_REG_TEST>
+ )
+ 
+ # boot_hal_bl2.c is compiled as part of 'bl2' target and not inside
+diff --git a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+index 369695f148..d39c5ae91d 100644
+--- a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
++++ b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+@@ -291,7 +291,7 @@ target_compile_definitions(signing_layout_for_bl2
+     PRIVATE
+         MCUBOOT_IMAGE_NUMBER=${BL1_IMAGE_NUMBER}
+         BL1
+-        $<$<BOOL:${TEST_S}>:TEST_S>
++        $<$<BOOL:${TFM_S_REG_TEST}>:TFM_S_REG_TEST>
+ )
+ 
+ target_include_directories(signing_layout_for_bl2
+diff --git a/platform/ext/target/arm/corstone1000/bl2_flash_map.c b/platform/ext/target/arm/corstone1000/bl2_flash_map.c
+index 6bffa274df..0a6a592d94 100644
+--- a/platform/ext/target/arm/corstone1000/bl2_flash_map.c
++++ b/platform/ext/target/arm/corstone1000/bl2_flash_map.c
+@@ -38,6 +38,7 @@ struct flash_area flash_map[] = {
+         .fa_off = FLASH_AREA_1_OFFSET,
+         .fa_size = FLASH_AREA_1_SIZE,
+     },
++#ifndef TFM_S_REG_TEST
+     {
+         .fa_id = FLASH_AREA_2_ID,
+         .fa_device_id = FLASH_DEVICE_ID,
+@@ -52,6 +53,7 @@ struct flash_area flash_map[] = {
+         .fa_off = FLASH_INVALID_OFFSET,
+         .fa_size = FLASH_INVALID_SIZE,
+     },
++#endif
+ };
+ 
+ const int flash_map_entry_num = ARRAY_SIZE(flash_map);
+diff --git a/platform/ext/target/arm/corstone1000/boot_hal_bl2.c b/platform/ext/target/arm/corstone1000/boot_hal_bl2.c
+index 792e06f81e..134315a17b 100644
+--- a/platform/ext/target/arm/corstone1000/boot_hal_bl2.c
++++ b/platform/ext/target/arm/corstone1000/boot_hal_bl2.c
+@@ -100,10 +100,12 @@ int32_t boot_platform_init(void)
+         return 1;
+     }
+ 
++#ifndef TFM_S_REG_TEST
+     result = fill_bl2_flash_map_by_parsing_fips(BANK_0_PARTITION_OFFSET);
+     if (result) {
+         return 1;
+     }
++#endif
+ 
+     result = FLASH_DEV_NAME.Initialize(NULL);
+     if (result != ARM_DRIVER_OK) {
+diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
+index a3399db318..a6a1a33c42 100644
+--- a/platform/ext/target/arm/corstone1000/config.cmake
++++ b/platform/ext/target/arm/corstone1000/config.cmake
+@@ -13,8 +13,15 @@ set(DEFAULT_MCUBOOT_FLASH_MAP           OFF        CACHE BOOL     "Whether to us
+ set(MCUBOOT_UPGRADE_STRATEGY            "RAM_LOAD" CACHE STRING   "Upgrade strategy when multiple boot images are loaded")
+ set(MCUBOOT_SECURITY_COUNTER_S          "1"      CACHE STRING    "Security counter for S image. auto sets it to IMAGE_VERSION_S")
+ 
+-set(TFM_ISOLATION_LEVEL                 2          CACHE STRING   "Isolation level")
+-set(MCUBOOT_IMAGE_NUMBER                2          CACHE STRING   "Whether to combine S and NS into either 1 image, or sign each separately")
++if (TEST_S OR TEST_S_ATTESTATION OR TEST_S_AUDIT OR TEST_S_CRYPTO OR TEST_S_ITS OR TEST_S_PS OR TEST_S_PLATFORM OR EXTRA_S_TEST_SUITES_PATHS)
++  # Test configuration: host images are not needed and work only with isolation level 1
++  set(MCUBOOT_IMAGE_NUMBER                1          CACHE STRING   "Whether to combine S and NS into either 1 image, or sign each separately")
++  set(TFM_ISOLATION_LEVEL                 1          CACHE STRING   "Isolation level")
++else()
++  set(MCUBOOT_IMAGE_NUMBER                2          CACHE STRING   "Whether to combine S and NS into either 1 image, or sign each separately")
++  set(TFM_ISOLATION_LEVEL                 2          CACHE STRING   "Isolation level")
++endif()
++
+ set(TFM_MULTI_CORE_TOPOLOGY             ON         CACHE BOOL     "Whether to build for a dual-cpu architecture")
+ set(TFM_PLAT_SPECIFIC_MULTI_CORE_COMM   ON         CACHE BOOL     "Whether to use a platform specific inter core communication instead of mailbox in dual-cpu topology")
+ set(CRYPTO_HW_ACCELERATOR               ON         CACHE BOOL     "Whether to enable the crypto hardware accelerator on supported platforms")
+diff --git a/platform/ext/target/arm/corstone1000/partition/flash_layout.h b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+index aa5a8fe463..b0319bb319 100644
+--- a/platform/ext/target/arm/corstone1000/partition/flash_layout.h
++++ b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+@@ -119,7 +119,7 @@
+  *
+  */
+ #define SE_BL2_PARTITION_SIZE           (0x19000)    /* 100 KB */
+-#ifdef TEST_S
++#ifdef TFM_S_REG_TEST
+ #define TFM_PARTITION_SIZE              (0x61C00)    /* 391 KB */
+ #else
+ #define TFM_PARTITION_SIZE              (0x5E000)    /* 376 KB */
+diff --git a/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c b/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
+index 8622844d91..1146ffe22a 100644
+--- a/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
++++ b/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
+@@ -31,6 +31,7 @@ void tfm_hal_boot_ns_cpu(uintptr_t start_addr)
+     /* Switch the shared flash to XiP mode for the host */
+     Select_XIP_Mode_For_Shared_Flash();
+ 
++#ifndef TFM_S_REG_TEST
+     volatile uint32_t *bir_base = (uint32_t *)CORSTONE1000_HOST_BIR_BASE;
+ 
+     /* Program Boot Instruction Register to jump to BL2 (TF-A) base address
+@@ -68,6 +69,7 @@ void tfm_hal_boot_ns_cpu(uintptr_t start_addr)
+     /*release EXT SYS out of reset*/
+     tfm_external_system_boot();
+ #endif
++#endif /* !TFM_S_REG_TEST */
+ }
+ 
+ void tfm_hal_wait_for_ns_cpu_ready(void)
+-- 
+2.25.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-m/corstone1000/0004-Platform-Partition-Allow-configuration-of-input-and-.patch

@@ -0,0 +1,72 @@
+From f3686dfb8fb97cb42c3d4f8ee2d7aa736d5cb760 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Wed, 3 Aug 2022 15:50:27 +0100
+Subject: [PATCH 4/6] Platform Partition: Allow configuration of input and
+ output buffer
+
+The change makes input and output buffer size macros used by
+the platform partition to be configured by cmake. This will
+allow platforms to set the buffer size accordingly.
+
+Change-Id: Ia492ce02f8744b0157228d9be51a9ec5b7c88ef6
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+Upstream-Status: Accepted [TF-Mv1.7.0]
+---
+ config/config_default.cmake                  | 2 ++
+ secure_fw/partitions/platform/CMakeLists.txt | 6 ++++++
+ secure_fw/partitions/platform/platform_sp.c  | 9 +++++++--
+ 3 files changed, 15 insertions(+), 2 deletions(-)
+
+diff --git a/config/config_default.cmake b/config/config_default.cmake
+index 3112b707bc..497c972dc9 100755
+--- a/config/config_default.cmake
++++ b/config/config_default.cmake
+@@ -141,6 +141,8 @@ set(ATTEST_INCLUDE_OPTIONAL_CLAIMS      ON          CACHE BOOL      "Include opt
+ set(ATTEST_INCLUDE_COSE_KEY_ID          OFF         CACHE BOOL      "Include COSE key-id in initial attestation token")
+ 
+ set(TFM_PARTITION_PLATFORM              ON          CACHE BOOL      "Enable Platform partition")
++set(PLATFORM_SERVICE_INPUT_BUFFER_SIZE  64          CACHE STRING    "Size of input buffer in platform service.")
++set(PLATFORM_SERVICE_OUTPUT_BUFFER_SIZE 64          CACHE STRING    "Size of output buffer in platform service.")
+ 
+ set(TFM_PARTITION_AUDIT_LOG             OFF         CACHE BOOL      "Enable Audit Log partition")
+ 
+diff --git a/secure_fw/partitions/platform/CMakeLists.txt b/secure_fw/partitions/platform/CMakeLists.txt
+index 4b37cd780c..3070f89d6d 100644
+--- a/secure_fw/partitions/platform/CMakeLists.txt
++++ b/secure_fw/partitions/platform/CMakeLists.txt
+@@ -47,6 +47,12 @@ target_link_libraries(tfm_psa_rot_partition_platform
+         tfm_spm
+ )
+ 
++target_compile_definitions(tfm_psa_rot_partition_platform
++    PRIVATE
++        INPUT_BUFFER_SIZE=${PLATFORM_SERVICE_INPUT_BUFFER_SIZE}
++        OUTPUT_BUFFER_SIZE=${PLATFORM_SERVICE_OUTPUT_BUFFER_SIZE}
++)
++
+ ############################ Secure API ########################################
+ 
+ target_sources(tfm_sprt
+diff --git a/secure_fw/partitions/platform/platform_sp.c b/secure_fw/partitions/platform/platform_sp.c
+index 673cb0ee06..87bd434720 100644
+--- a/secure_fw/partitions/platform/platform_sp.c
++++ b/secure_fw/partitions/platform/platform_sp.c
+@@ -38,8 +38,13 @@ static const int32_t nv_counter_access_map[NV_COUNTER_MAP_SIZE] = {
+ #include "psa/service.h"
+ #include "region_defs.h"
+ 
+-#define INPUT_BUFFER_SIZE  64
+-#define OUTPUT_BUFFER_SIZE 64
++#ifndef INPUT_BUFFER_SIZE
++#define INPUT_BUFFER_SIZE      64
++#endif
++
++#ifndef OUTPUT_BUFFER_SIZE
++#define OUTPUT_BUFFER_SIZE     64
++#endif
+ 
+ typedef enum tfm_platform_err_t (*plat_func_t)(const psa_msg_t *msg);
+ #endif /* TFM_PSA_API */
+-- 
+2.25.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-m/corstone1000/0005-corstone1000-support-for-UEFI-FMP-image-Information.patch

@@ -0,0 +1,573 @@
+From 9d70628b7dc1dbc3c1ac7f4f3c0f6aa6b237510d Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Wed, 6 Jul 2022 11:19:39 +0100
+Subject: [PATCH 5/6] corstone1000: support for UEFI FMP image Information
+
+The commit provides the support for UEFI FMP (Firmware Management
+Protocol) SET and GET Image info APIs.
+
+The APIs to SET and GET image info is implemented. In current design,
+SET is called by secure encalve and GET is called by the host.
+
+FMP image information is initialized on every boot and retained
+in SRAM. The updatable values of the FMP are stored in private
+metadata section of the flash.
+
+Change-Id: Iaf0b4a13a9c24f05e4a32509e61a8b96ee8e9e4b
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+Upstream-Status: Accepted [TF-Mv1.7.0]
+---
+ .../target/arm/corstone1000/CMakeLists.txt    |   2 +
+ .../ext/target/arm/corstone1000/config.cmake  |   8 +-
+ .../corstone1000/fw_update_agent/fwu_agent.c  |  61 ++++-
+ .../corstone1000/fw_update_agent/fwu_agent.h  |   3 +
+ .../corstone1000/fw_update_agent/uefi_fmp.c   | 240 ++++++++++++++++++
+ .../corstone1000/fw_update_agent/uefi_fmp.h   |  56 ++++
+ .../include/corstone1000_ioctl_requests.h     |  14 +-
+ .../services/src/tfm_platform_system.c        |   9 +
+ 8 files changed, 374 insertions(+), 19 deletions(-)
+ create mode 100644 platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.c
+ create mode 100644 platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.h
+
+diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+index 81522c7cf0..3602312a3a 100644
+--- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
++++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+@@ -76,6 +76,8 @@ target_sources(platform_s
+         fw_update_agent/uefi_capsule_parser.c
+         fw_update_agent/fwu_agent.c
+         $<$<BOOL:${TFM_S_REG_TEST}>:${CMAKE_CURRENT_SOURCE_DIR}/target_cfg.c>
++        fw_update_agent/uefi_fmp.c
++        $<$<NOT:$<BOOL:${PLATFORM_DEFAULT_OTP}>>:${PLATFORM_DIR}/ext/accelerator/cc312/otp_cc312.c>
+ )
+ 
+ if (PLATFORM_IS_FVP)
+diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
+index a6a1a33c42..ab0fe17ba8 100644
+--- a/platform/ext/target/arm/corstone1000/config.cmake
++++ b/platform/ext/target/arm/corstone1000/config.cmake
+@@ -50,7 +50,9 @@ else()
+     set(PLATFORM_PSA_ADAC_SECURE_DEBUG      FALSE        CACHE BOOL      "Whether to use psa-adac secure debug.")
+ endif()
+ 
+-set(DEFAULT_MCUBOOT_SECURITY_COUNTERS   OFF          CACHE BOOL      "Whether to use the default security counter configuration defined by TF-M project")
++set(DEFAULT_MCUBOOT_SECURITY_COUNTERS       OFF          CACHE BOOL      "Whether to use the default security counter configuration defined by TF-M project")
+ 
+-set(PS_ENCRYPTION                       OFF          CACHE BOOL      "Enable encryption for Protected Storage partition")
+-set(PS_ROLLBACK_PROTECTION              OFF          CACHE BOOL      "Enable rollback protection for Protected Storage partition")
++set(PS_ENCRYPTION                           OFF          CACHE BOOL      "Enable encryption for Protected Storage partition")
++set(PS_ROLLBACK_PROTECTION                  OFF          CACHE BOOL      "Enable rollback protection for Protected Storage partition")
++
++set(PLATFORM_SERVICE_OUTPUT_BUFFER_SIZE     256          CACHE STRING    "Size of output buffer in platform service.")
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+index 3abb5dd0dc..72a5fc9c1d 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
++++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+@@ -18,6 +18,7 @@
+ #include "platform_description.h"
+ #include "tfm_plat_nv_counters.h"
+ #include "tfm_plat_defs.h"
++#include "uefi_fmp.h"
+ 
+ /* Properties of image in a bank */
+ struct fwu_image_properties {
+@@ -84,6 +85,11 @@ struct fwu_private_metadata {
+        /* staged nv_counter: temprary location before written to the otp */
+        uint32_t nv_counter[NR_OF_IMAGES_IN_FW_BANK];
+ 
++       /* FMP information */
++       uint32_t fmp_version;
++       uint32_t fmp_last_attempt_version;
++       uint32_t fmp_last_attempt_status;
++
+ } __packed;
+ 
+ #define MAX_BOOT_ATTEMPTS_PER_BANK 3
+@@ -278,7 +284,7 @@ enum fwu_agent_error_t fwu_metadata_provision(void)
+ {
+     enum fwu_agent_error_t ret;
+     struct fwu_private_metadata priv_metadata;
+-    uint32_t image_version = 0;
++    uint32_t image_version = FWU_IMAGE_INITIAL_VERSION;
+ 
+     FWU_LOG_MSG("%s: enter\n\r", __func__);
+ 
+@@ -302,8 +308,8 @@ enum fwu_agent_error_t fwu_metadata_provision(void)
+     memset(&_metadata, 0, sizeof(struct fwu_metadata));
+ 
+     _metadata.version = 1;
+-    _metadata.active_index = 0;
+-    _metadata.previous_active_index = 1;
++    _metadata.active_index = BANK_0;
++    _metadata.previous_active_index = BANK_1;
+ 
+     /* bank 0 is the place where images are located at the
+      * start of device lifecycle */
+@@ -339,6 +345,10 @@ enum fwu_agent_error_t fwu_metadata_provision(void)
+     priv_metadata.boot_index = BANK_0;
+     priv_metadata.boot_attempted = 0;
+ 
++    priv_metadata.fmp_version = FWU_IMAGE_INITIAL_VERSION;
++    priv_metadata.fmp_last_attempt_version = FWU_IMAGE_INITIAL_VERSION;
++    priv_metadata.fmp_last_attempt_status = LAST_ATTEMPT_STATUS_SUCCESS;
++
+     ret = private_metadata_write(&priv_metadata);
+     if (ret) {
+         return ret;
+@@ -540,9 +550,25 @@ enum fwu_agent_error_t corstone1000_fwu_flash_image(void)
+                                 &image_bank_offset);
+         switch(image_index) {
+             case IMAGE_ALL:
++
+                 ret = flash_full_capsule(&_metadata, capsule_info.image[i],
+                                          capsule_info.size[i],
+                                          capsule_info.version[i]);
++
++                if (ret != FWU_AGENT_SUCCESS) {
++
++                    priv_metadata.fmp_last_attempt_version = capsule_info.version[i];
++                    priv_metadata.fmp_last_attempt_status = LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL;
++
++                    private_metadata_write(&priv_metadata);
++
++                    fmp_set_image_info(&full_capsule_image_guid,
++                            priv_metadata.fmp_version,
++                            priv_metadata.fmp_last_attempt_version,
++                            priv_metadata.fmp_last_attempt_status);
++                }
++
++
+                 break;
+             default:
+                 FWU_LOG_MSG("%s: sent image not recognized\n\r", __func__);
+@@ -866,17 +892,42 @@ enum fwu_agent_error_t corstone1000_fwu_host_ack(void)
+ 
+     current_state = get_fwu_agent_state(&_metadata, &priv_metadata);
+     if (current_state == FWU_AGENT_STATE_REGULAR) {
++
+         ret = FWU_AGENT_SUCCESS; /* nothing to be done */
++
++        fmp_set_image_info(&full_capsule_image_guid,
++                priv_metadata.fmp_version,
++                priv_metadata.fmp_last_attempt_version,
++                priv_metadata.fmp_last_attempt_status);
++
+         goto out;
++
+     } else if (current_state != FWU_AGENT_STATE_TRIAL) {
+         FWU_ASSERT(0);
+     }
+ 
+     if (_metadata.active_index != priv_metadata.boot_index) {
++
+         /* firmware update failed, revert back to previous bank */
++
++        priv_metadata.fmp_last_attempt_version =
++         _metadata.img_entry[IMAGE_0].img_props[_metadata.active_index].version;
++
++        priv_metadata.fmp_last_attempt_status = LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL;
++
+         ret = fwu_select_previous(&_metadata, &priv_metadata);
++
+     } else {
++
+         /* firmware update successful */
++
++        priv_metadata.fmp_version =
++         _metadata.img_entry[IMAGE_0].img_props[_metadata.active_index].version;
++        priv_metadata.fmp_last_attempt_version =
++         _metadata.img_entry[IMAGE_0].img_props[_metadata.active_index].version;
++
++        priv_metadata.fmp_last_attempt_status = LAST_ATTEMPT_STATUS_SUCCESS;
++
+         ret = fwu_accept_image(&full_capsule_image_guid, &_metadata,
+                                 &priv_metadata);
+         if (!ret) {
+@@ -886,6 +937,10 @@ enum fwu_agent_error_t corstone1000_fwu_host_ack(void)
+ 
+     if (ret == FWU_AGENT_SUCCESS) {
+         disable_host_ack_timer();
++        fmp_set_image_info(&full_capsule_image_guid,
++                priv_metadata.fmp_version,
++                priv_metadata.fmp_last_attempt_version,
++                priv_metadata.fmp_last_attempt_status);
+     }
+ 
+ out:
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+index 57b07e8d2c..aa18179024 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
++++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+@@ -30,6 +30,9 @@ enum fwu_agent_error_t {
+                 }                                                              \
+ 
+ 
++/* Version used for the very first image of the device. */
++#define FWU_IMAGE_INITIAL_VERSION 0
++
+ enum fwu_agent_error_t fwu_metadata_provision(void);
+ enum fwu_agent_error_t fwu_metadata_init(void);
+ 
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.c b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.c
+new file mode 100644
+index 0000000000..ce576e1794
+--- /dev/null
++++ b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.c
+@@ -0,0 +1,240 @@
++/*
++ * Copyright (c) 2022, Arm Limited. All rights reserved.
++ *
++ * SPDX-License-Identifier: BSD-3-Clause
++ *
++ */
++
++#include <string.h>
++#include <stdbool.h>
++#include "cmsis.h"
++#include "uefi_fmp.h"
++
++/* The count will increase when partial update is supported.
++ * At present, only full WIC is considered as updatable image.
++ */
++#define NUMBER_OF_FMP_IMAGES 1
++#define NO_OF_FMP_VARIABLES_PER_IMAGE   6
++
++#define UEFI_ARCHITECTURE_64
++
++#ifdef UEFI_ARCHITECTURE_64
++typedef uint64_t uefi_ptr_t;
++typedef uint64_t efi_uintn_t;
++#else
++typedef uint32_t uefi_ptr_t;
++typedef uint32_t efi_uintn_t;
++#endif
++
++/* Below macro definations and struct declarations taken from UEFI spec 2.9 */
++
++/*
++ * Image Attribute Definitions
++ */
++#define IMAGE_ATTRIBUTE_IMAGE_UPDATABLE            0x00000001
++#define IMAGE_ATTRIBUTE_RESET_REQUIRED             0x00000002
++#define IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED    0x00000004
++#define IMAGE_ATTRIBUTE_IN_USE                     0x00000008
++#define IMAGE_ATTRIBUTE_UEFI_IMAGE                 0x00000010
++#define IMAGE_ATTRIBUTE_DEPENDENCY                 0x00000020
++
++typedef uint32_t DescriptorVersion_t;
++typedef uint32_t DescriptorSize_t;
++typedef uint8_t DescriptorCount_t;
++
++typedef __PACKED_STRUCT {
++    uint8_t ImageIndex;
++    struct efi_guid ImageTypeId;
++    uint64_t ImageId;
++    uefi_ptr_t PtrImageIdName;
++    uint32_t Version;
++    uefi_ptr_t PtrVersionName;
++    efi_uintn_t Size;
++    uint64_t AttributesSupported;
++    uint64_t AttributesSetting;
++    uint64_t Compatibilities;
++    /* Introduced with DescriptorVersion 2+ */
++    uint32_t LowestSupportedImageVersion;
++    /* Introduced with DescriptorVersion 3+ */
++    uint32_t LastAttemptVersion;
++    uint32_t LastAttemptStatus;
++    uint64_t HardwareInstance;
++    /* Introduced with DescriptorVersion 4+ */
++    uefi_ptr_t PtrDependencies;
++} EFI_FIRMWARE_IMAGE_DESCRIPTOR;
++
++typedef __PACKED_STRUCT {
++    DescriptorVersion_t DescriptorVersion;
++    DescriptorSize_t DescriptorsSize;
++    DescriptorCount_t DescriptorCount;
++    EFI_FIRMWARE_IMAGE_DESCRIPTOR ImageDescriptor;
++    uint16_t *ImageName;
++    uint32_t ImageNameSize;
++    uint16_t *ImageVersionName;
++    uint32_t ImageVersionNameSize;
++} EFI_FIRMWARE_MANAGEMENT_PROTOCOL_IMAGE_INFO;
++
++
++static uint16_t corstone_image_name0[] = { 'C', 'O', 'R', 'S', 'T', 'O', 'N', 'E', '1', '0', '0', '0', '_', 'W', 'I', 'C', '\0' };
++static uint16_t corstone_version_name0[] = { 'C', 'O', 'R', 'S', 'T', 'O', 'N', 'E', '1', '0', '0', '0', '_', 'B', 'E', 'S', 'T', '\0'};
++
++static EFI_FIRMWARE_MANAGEMENT_PROTOCOL_IMAGE_INFO fmp_info[NUMBER_OF_FMP_IMAGES];
++
++extern struct efi_guid full_capsule_image_guid;
++
++static bool is_fmp_info_initialized = false;
++
++static void init_fmp_info(void)
++{
++    memset(fmp_info, 0,
++     sizeof(EFI_FIRMWARE_MANAGEMENT_PROTOCOL_IMAGE_INFO) * NUMBER_OF_FMP_IMAGES);
++
++    /* Fill information for the WIC.
++     * Add further details when partial image is supported.
++     */
++
++    fmp_info[0].DescriptorVersion = 4;
++    fmp_info[0].DescriptorCount = NUMBER_OF_FMP_IMAGES;
++    fmp_info[0].DescriptorsSize =
++                 sizeof(EFI_FIRMWARE_IMAGE_DESCRIPTOR) +
++                 sizeof(corstone_image_name0) + sizeof(corstone_version_name0);
++
++    fmp_info[0].ImageDescriptor.ImageIndex = 1;
++
++    memcpy(&fmp_info[0].ImageDescriptor.ImageTypeId, &full_capsule_image_guid,
++            sizeof(struct efi_guid));
++
++    fmp_info[0].ImageDescriptor.ImageId = 1;
++    fmp_info[0].ImageDescriptor.Version = FWU_IMAGE_INITIAL_VERSION;
++    fmp_info[0].ImageDescriptor.AttributesSupported = 1;
++    fmp_info[0].ImageDescriptor.AttributesSetting = (
++            IMAGE_ATTRIBUTE_IMAGE_UPDATABLE | IMAGE_ATTRIBUTE_RESET_REQUIRED);
++    fmp_info[0].ImageDescriptor.LowestSupportedImageVersion =
++            FWU_IMAGE_INITIAL_VERSION;
++    fmp_info[0].ImageDescriptor.LastAttemptVersion = FWU_IMAGE_INITIAL_VERSION;
++    fmp_info[0].ImageDescriptor.LastAttemptStatus = LAST_ATTEMPT_STATUS_SUCCESS;
++
++    fmp_info[0].ImageName = corstone_image_name0;
++    fmp_info[0].ImageNameSize = sizeof(corstone_image_name0);
++    fmp_info[0].ImageVersionName = corstone_version_name0;
++    fmp_info[0].ImageVersionNameSize = sizeof(corstone_version_name0);
++
++    is_fmp_info_initialized = true;
++
++    return;
++}
++
++enum fwu_agent_error_t fmp_set_image_info(struct efi_guid *guid,
++                     uint32_t current_version, uint32_t attempt_version,
++                     uint32_t last_attempt_status)
++{
++    enum fwu_agent_error_t status = FWU_AGENT_ERROR;
++
++    FWU_LOG_MSG("%s:%d Enter\n\r", __func__, __LINE__);
++
++    if (is_fmp_info_initialized == false) {
++        init_fmp_info();
++    }
++
++    for (int i = 0; i < NUMBER_OF_FMP_IMAGES; i++) {
++        if ((memcmp(guid, &fmp_info[i].ImageDescriptor.ImageTypeId,
++                        sizeof(struct efi_guid))) == 0)
++        {
++            FWU_LOG_MSG("FMP image update: image id = %u\n\r",
++                                    fmp_info[i].ImageDescriptor.ImageId);
++            fmp_info[i].ImageDescriptor.Version = current_version;
++            fmp_info[i].ImageDescriptor.LastAttemptVersion = attempt_version;
++            fmp_info[i].ImageDescriptor.LastAttemptStatus = last_attempt_status;
++            FWU_LOG_MSG("FMP image update: status = %u"
++                            "version=%u last_attempt_version=%u.\n\r",
++                            last_attempt_status, current_version,
++                            attempt_version);
++            status = FWU_AGENT_SUCCESS;
++            break;
++        }
++    }
++
++    FWU_LOG_MSG("%s:%d Exit.\n\r", __func__, __LINE__);
++    return status;
++}
++
++
++#define NO_OF_FMP_VARIABLES    (NUMBER_OF_FMP_IMAGES * NO_OF_FMP_VARIABLES_PER_IMAGE)
++
++static enum fwu_agent_error_t pack_image_info(void *buffer, uint32_t size)
++{
++    typedef __PACKED_STRUCT {
++        uint32_t variable_count;
++        uint32_t variable_size[NO_OF_FMP_VARIABLES];
++        uint8_t variable[];
++    } packed_buffer_t;
++
++    packed_buffer_t *packed_buffer = buffer;
++    int runner = 0;
++    int index = 0;
++    int current_size = sizeof(packed_buffer_t);
++    int size_requirement_1 = 0;
++    int size_requirement_2 = 0;
++
++    if (size < current_size) {
++        FWU_LOG_MSG("%s:%d Buffer too small.\n\r", __func__, __LINE__);
++        return FWU_AGENT_ERROR;
++    }
++
++    packed_buffer->variable_count = NO_OF_FMP_VARIABLES;
++
++    for (int i = 0; i < NUMBER_OF_FMP_IMAGES; i++) {
++
++       packed_buffer->variable_size[index++] = sizeof(DescriptorVersion_t);
++       packed_buffer->variable_size[index++] = sizeof(DescriptorSize_t);
++       packed_buffer->variable_size[index++] = sizeof(DescriptorCount_t);
++       packed_buffer->variable_size[index++] = sizeof(EFI_FIRMWARE_IMAGE_DESCRIPTOR);
++       packed_buffer->variable_size[index++] = fmp_info[i].ImageNameSize;
++       packed_buffer->variable_size[index++] = fmp_info[i].ImageVersionNameSize;
++
++       size_requirement_1 = sizeof(DescriptorVersion_t) + sizeof(DescriptorSize_t) +
++              sizeof(DescriptorCount_t) + sizeof(EFI_FIRMWARE_IMAGE_DESCRIPTOR);
++
++       size_requirement_2 = fmp_info[i].ImageNameSize + fmp_info[i].ImageVersionNameSize;
++
++       current_size += size_requirement_1 + size_requirement_2;
++
++       if (size < current_size) {
++           FWU_LOG_MSG("%s:%d Buffer too small.\n\r", __func__, __LINE__);
++           return FWU_AGENT_ERROR;
++       }
++
++       FWU_LOG_MSG("%s:%d ImageInfo size = %u, ImageName size = %u, "
++               "ImageVersionName size = %u\n\r", __func__, __LINE__,
++               sizeof(EFI_FIRMWARE_IMAGE_DESCRIPTOR), fmp_info[i].ImageNameSize,
++               fmp_info[i].ImageVersionNameSize);
++   
++       memcpy(&packed_buffer->variable[runner], &fmp_info[i], size_requirement_1);
++       runner += size_requirement_1;
++   
++       memcpy(&packed_buffer->variable[runner], fmp_info[i].ImageName,
++                                       fmp_info[i].ImageNameSize);
++       runner += fmp_info[i].ImageNameSize;
++   
++       memcpy(&packed_buffer->variable[runner], fmp_info[i].ImageVersionName,
++                                       fmp_info[i].ImageVersionNameSize);
++       runner += fmp_info[i].ImageVersionNameSize;
++
++    }
++
++    return FWU_AGENT_SUCCESS;
++}
++
++enum fwu_agent_error_t fmp_get_image_info(void *buffer, uint32_t size)
++{
++    enum fwu_agent_error_t status;
++
++    FWU_LOG_MSG("%s:%d Enter\n\r", __func__, __LINE__);
++
++    status = pack_image_info(buffer, size);
++
++    FWU_LOG_MSG("%s:%d Exit\n\r", __func__, __LINE__);
++
++    return status;
++}
++
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.h b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.h
+new file mode 100644
+index 0000000000..d876bd7cff
+--- /dev/null
++++ b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.h
+@@ -0,0 +1,56 @@
++/*
++ * Copyright (c) 2022, Arm Limited. All rights reserved.
++ *
++ * SPDX-License-Identifier: BSD-3-Clause
++ *
++ */
++
++#ifndef UEFI_FMP_H
++#define UEFI_FMP_H
++
++
++#include <stdint.h>
++#include "fwu_agent.h"
++#include "../fip_parser/external/uuid.h"
++
++/*
++ * Last Attempt Status Value
++ */
++
++#define LAST_ATTEMPT_STATUS_SUCCESS                                     0x00000000
++#define LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL                          0x00000001
++#define LAST_ATTEMPT_STATUS_ERROR_INSUFFICIENT_RESOURCES                0x00000002
++#define LAST_ATTEMPT_STATUS_ERROR_INCORRECT_VERSION                     0x00000003
++#define LAST_ATTEMPT_STATUS_ERROR_INVALID_FORMAT                        0x00000004
++#define LAST_ATTEMPT_STATUS_ERROR_AUTH_ERROR                            0x00000005
++#define LAST_ATTEMPT_STATUS_ERROR_PWR_EVT_AC                            0x00000006
++#define LAST_ATTEMPT_STATUS_ERROR_PWR_EVT_BATT                          0x00000007
++#define LAST_ATTEMPT_STATUS_ERROR_UNSATISFIED_DEPENDENCIES              0x00000008
++/* The LastAttemptStatus values of 0x1000 - 0x4000 are reserved for vendor usage. */
++#define LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL_VENDOR_RANGE_MIN         0x00001000
++#define LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL_VENDOR_RANGE_MAX         0x00004000
++
++
++
++/*
++ * Updates FMP information for the image matched by guid.
++ *
++ * guid : guid of the image
++ * current_version: current versions for the image
++ * attempt_version: attempted versions for the image
++ *
++ */
++enum fwu_agent_error_t fmp_set_image_info(struct efi_guid *guid,
++                     uint32_t current_version, uint32_t attempt_version,
++                     uint32_t last_attempt_status);
++
++/*
++ * Return fmp image information for all the updable images.
++ *
++ * buffer : pointer to the out buffer
++ * size : size of the buffer
++ *
++ */
++enum fwu_agent_error_t fmp_get_image_info(void *buffer, uint32_t size);
++
++#endif /* UEFI_FMP_H */
+diff --git a/platform/ext/target/arm/corstone1000/services/include/corstone1000_ioctl_requests.h b/platform/ext/target/arm/corstone1000/services/include/corstone1000_ioctl_requests.h
+index 8ac67346b6..c5f3537e9d 100644
+--- a/platform/ext/target/arm/corstone1000/services/include/corstone1000_ioctl_requests.h
++++ b/platform/ext/target/arm/corstone1000/services/include/corstone1000_ioctl_requests.h
+@@ -14,19 +14,7 @@
+ enum corstone1000_ioctl_id_t {
+    IOCTL_CORSTONE1000_FWU_FLASH_IMAGES = 0,
+    IOCTL_CORSTONE1000_FWU_HOST_ACK,
++   IOCTL_CORSTONE1000_FMP_GET_IMAGE_INFO,
+ };
+ 
+-
+-typedef struct corstone1000_ioctl_in_params {
+-
+-    uint32_t ioctl_id;
+-
+-} corstone1000_ioctl_in_params_t;
+-
+-typedef struct corstone1000_ioctl_out_params {
+-
+-    int32_t result;
+-
+-} corstone1000_ioctl_out_params_t;
+-
+ #endif /* CORSTONE1000_IOCTL_REQUESTS_H */
+diff --git a/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c b/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+index 5b3f3e14a2..41305ed966 100644
+--- a/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
++++ b/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+@@ -9,6 +9,7 @@
+ #include "platform_description.h"
+ #include "corstone1000_ioctl_requests.h"
+ #include "fwu_agent.h"
++#include "uefi_fmp.h"
+ 
+ void tfm_platform_hal_system_reset(void)
+ {
+@@ -36,6 +37,14 @@ enum tfm_platform_err_t tfm_platform_hal_ioctl(tfm_platform_ioctl_req_t request,
+             corstone1000_fwu_host_ack();
+             break;
+ 
++        case IOCTL_CORSTONE1000_FMP_GET_IMAGE_INFO:
++            if (out_vec == NULL) {
++                ret = TFM_PLATFORM_ERR_INVALID_PARAM;
++                break;
++            }
++            fmp_get_image_info(out_vec[0].base, out_vec[0].len);
++            break;
++
+         default:
+             ret = TFM_PLATFORM_ERR_NOT_SUPPORTED;
+             break;
+-- 
+2.25.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-m/corstone1000/0006-corstone1000-remove-two-partition-configuration.patch

@@ -0,0 +1,51 @@
+From 492c887c8dff97ea1b8a11b4e729620d3744ac38 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Mon, 30 May 2022 12:38:23 +0100
+Subject: [PATCH 6/6] corstone1000: remove two partition configuration
+
+Previously to run tf-m test, a larger partition was created
+which allowed all default test binaries to be included.
+The patch revert the change because any partition might
+not be enough to hold all test binaries in the future.
+So its better to run few test at a time instead of creating
+a larger partition.
+
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+Change-Id: I223fe45f2de014dbcadc6ac12c321c524701116a
+Upstream-Status: Accepted [TF-Mv1.7.0]
+---
+ platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt       | 1 -
+ platform/ext/target/arm/corstone1000/partition/flash_layout.h | 4 ----
+ 2 files changed, 5 deletions(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+index d39c5ae91d..f1ae1ebd47 100644
+--- a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
++++ b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+@@ -291,7 +291,6 @@ target_compile_definitions(signing_layout_for_bl2
+     PRIVATE
+         MCUBOOT_IMAGE_NUMBER=${BL1_IMAGE_NUMBER}
+         BL1
+-        $<$<BOOL:${TFM_S_REG_TEST}>:TFM_S_REG_TEST>
+ )
+ 
+ target_include_directories(signing_layout_for_bl2
+diff --git a/platform/ext/target/arm/corstone1000/partition/flash_layout.h b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+index b0319bb319..50a0a11fc8 100644
+--- a/platform/ext/target/arm/corstone1000/partition/flash_layout.h
++++ b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+@@ -119,11 +119,7 @@
+  *
+  */
+ #define SE_BL2_PARTITION_SIZE           (0x19000)    /* 100 KB */
+-#ifdef TFM_S_REG_TEST
+-#define TFM_PARTITION_SIZE              (0x61C00)    /* 391 KB */
+-#else
+ #define TFM_PARTITION_SIZE              (0x5E000)    /* 376 KB */
+-#endif
+ #define FIP_PARTITION_SIZE              (0x200000)   /* 2 MB */
+ #define KERNEL_PARTITION_SIZE           (0xC00000)   /* 12 MB */
+ 
+-- 
+2.25.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-m/corstone1000/0007-corstone1000-adjust-PS-asset-configuration.patch

@@ -0,0 +1,27 @@
+From 5be42e1c05205209fc3988f0df30a02da95c2448 Mon Sep 17 00:00:00 2001
+From: Rui Miguel Silva <rui.silva@linaro.org>
+Date: Wed, 2 Nov 2022 00:12:35 +0000
+Subject: [PATCH] corstone1000: adjust PS asset configuration
+
+Adjust protected storage asset configuration to be more inline
+with the one in trusted service side, that would make thinks
+work when testing and using more than the default variables.
+
+Upstream-Status: Pending
+Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
+---
+ platform/ext/target/arm/corstone1000/config.cmake | 1 ++
+ 1 file changed, 1 insertions(+)
+
+diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
+index ab0fe17ba886..c2b4b646e6b0 100644
+--- a/platform/ext/target/arm/corstone1000/config.cmake
++++ b/platform/ext/target/arm/corstone1000/config.cmake
+@@ -56,3 +56,4 @@ set(PS_ENCRYPTION                           OFF          CACHE BOOL      "Enable
+ set(PS_ROLLBACK_PROTECTION                  OFF          CACHE BOOL      "Enable rollback protection for Protected Storage partition")
+ 
+ set(PLATFORM_SERVICE_OUTPUT_BUFFER_SIZE     256          CACHE STRING    "Size of output buffer in platform service.")
++set(PS_NUM_ASSETS                           "40"        CACHE STRING    "The maximum number of assets to be stored in the Protected Storage area")
+-- 
+2.38.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc

@@ -11,22 +11,6 @@ TFM_PLATFORM_IS_FVP ?= "FALSE"
 EXTRA_OECMAKE += "-DPLATFORM_IS_FVP=${TFM_PLATFORM_IS_FVP}"
 EXTRA_OECMAKE += "-DCC312_LEGACY_DRIVER_API_ENABLED=OFF"
 
-SRCBRANCH_tfm = "master"
-SRC_URI  = "git://git.trustedfirmware.org/TF-M/trusted-firmware-m.git;protocol=https;branch=${SRCBRANCH_tfm};name=tfm;destsuffix=git/tfm \
-            git://git.trustedfirmware.org/TF-M/tf-m-tests.git;protocol=https;branch=master;name=tfm-tests;destsuffix=git/tf-m-tests \
-            git://github.com/ARMmbed/mbedtls.git;protocol=https;branch=master;name=mbedtls;destsuffix=git/mbedtls \
-            git://github.com/mcu-tools/mcuboot.git;protocol=https;branch=main;name=mcuboot;destsuffix=git/mcuboot \
-            "
-
-# Bumping the SHA of TFM is required as multiple changes are needed in the TFM to support the ESRT 
-# The most crucial change needed is TFM support for UEFI FMP Image Information 
-SRCREV_tfm = "b065a6b28cc6c692b99e4f7e9387d96f51bf4d07"
-SRCREV_mbedtls = "869298bffeea13b205343361b7a7daf2b210e33d"
-SRCREV_mcuboot = "c657cbea75f2bb1faf1fceacf972a0537a8d26dd"
-SRCREV_tfm-tests = "3e6c52b4b255e4b1343ba6a257a77fa7a976e8fb"
-PV .= "+git${SRCPV}"
-SRCREV_FORMAT ?= "tfm"
-
 # libmetal
 LICENSE += "& BSD-3-Clause"
 LIC_FILES_CHKSUM += "file://../libmetal/LICENSE.md;md5=fe0b8a4beea8f0813b606d15a3df3d3c"
@@ -41,16 +25,17 @@ SRC_URI += "git://github.com/OpenAMP/open-amp.git;protocol=https;branch=main;nam
 SRCREV_openamp = "347397decaa43372fc4d00f965640ebde042966d"
 EXTRA_OECMAKE += "-DLIBOPENAMP_SRC_PATH=${S}/../openamp -DLIBOPENAMP_BIN_PATH=${B}/libopenamp-build"
 
-# Secure Debug ADAC
-LICENSE += "& BSD-3-Clause"
-LIC_FILES_CHKSUM += "file://../psa-adac/license.rst;md5=07f368487da347f3c7bd0fc3085f3afa"
-SRC_URI += "git://git.trustedfirmware.org/shared/psa-adac.git;protocol=https;branch=master;name=psa-adac;destsuffix=git/psa-adac"
-SRCREV_psa-adac = "427923cc0152578d536fb2065154d5d0dd874910"
-# Secure debug is disabled by default
-EXTRA_OECMAKE += "-DPLATFORM_PSA_ADAC_SECURE_DEBUG=OFF"
-EXTRA_OECMAKE += "-DPLATFORM_PSA_ADAC_SOURCE_PATH=${S}/../psa-adac -DPLATFORM_PSA_ADAC_BUILD_PATH=${B}/libpsa-adac-build"
-
-DEPENDS += "trusted-firmware-a"
+# Apply the necessary changes for supporting FMP image info
+FILESEXTRAPATHS:prepend := "${THISDIR}/corstone1000:"
+SRC_URI:append:corstone1000 = " \
+        file://0001-corstone1000-platform-secure-test-framework.patch             \
+        file://0002-corstone1000-make-external-system-support-optional.patch      \
+        file://0003-corstone1000-enable-secure-enclave-run-without-host-.patch    \
+        file://0004-Platform-Partition-Allow-configuration-of-input-and-.patch    \
+        file://0005-corstone1000-support-for-UEFI-FMP-image-Information.patch     \
+        file://0006-corstone1000-remove-two-partition-configuration.patch         \
+        file://0007-corstone1000-adjust-PS-asset-configuration.patch              \
+      "
 
 do_install() {
   install -D -p -m 0644 ${B}/install/outputs/tfm_s_signed.bin ${D}/firmware/tfm_s_signed.bin

meta-arm-bsp/recipes-bsp/u-boot/u-boot/juno/0002-configs-vexpress-modify-to-boot-compressed-initramfs.patch

@@ -0,0 +1,41 @@
+From 097a43223da4fa42335944295903ede2755e2dfd Mon Sep 17 00:00:00 2001
+From: Jon Mason <jdmason@kudzu.us>
+Date: Mon, 19 Dec 2022 11:36:04 -0500
+Subject: [PATCH] configs: vexpress: modify to boot compressed initramfs
+
+Signed-off-by: Jon Mason <jdmason@kudzu.us>
+Upstream-Status: Inappropriate
+
+---
+ configs/vexpress_aemv8a_juno_defconfig | 1 +
+ include/configs/vexpress_aemv8.h       | 2 ++
+ 2 files changed, 3 insertions(+)
+
+diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig
+index e02124cc7f54..6ffe8f5fe67e 100644
+--- a/configs/vexpress_aemv8a_juno_defconfig
++++ b/configs/vexpress_aemv8a_juno_defconfig
+@@ -16,6 +16,7 @@ CONFIG_SYS_LOAD_ADDR=0x90000000
+ CONFIG_BOOTDELAY=1
+ CONFIG_USE_BOOTARGS=y
+ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw rootwait earlycon=pl011,0x7ff80000 debug user_debug=31 androidboot.hardware=juno loglevel=9"
++CONFIG_BOOTCOMMAND="echo running default boot command; afs load ${kernel_name} ${kernel_addr_r} ; if test $? -eq 1; then   echo Loading ${kernel_alt_name} instead of ${kernel_name};   afs load ${kernel_alt_name} ${kernel_addr_r};fi ; afs load  ${fdtfile} ${fdt_addr_r} ; if test $? -eq 1; then   echo Loading ${fdt_alt_name} instead of ${fdtfile};   afs load ${fdt_alt_name} ${fdt_addr_r}; fi ; fdt addr ${fdt_addr_r}; fdt resize; if afs load  ${initrd_name} ${initrd_addr_r} ; then   setenv initrd_param ${initrd_addr_r};   else setenv initrd_param -; fi ; booti ${kernel_addr_r} ${initrd_param} ${fdt_addr_r}"
+ # CONFIG_DISPLAY_CPUINFO is not set
+ # CONFIG_DISPLAY_BOARDINFO is not set
+ CONFIG_SYS_PROMPT="VExpress64# "
+diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h
+index cd7f6c1b9ba0..c2f5eb302076 100644
+--- a/include/configs/vexpress_aemv8.h
++++ b/include/configs/vexpress_aemv8.h
+@@ -164,6 +164,8 @@
+ 				"kernel_name=norkern\0"	\
+ 				"kernel_alt_name=Image\0"	\
+ 				"kernel_addr_r=0x80080000\0" \
++				"kernel_comp_addr_r=0x90000000\0" \
++				"kernel_comp_size=0x3000000\0" \
+ 				"initrd_name=ramdisk.img\0"	\
+ 				"initrd_addr_r=0x88000000\0"	\
+ 				"fdtfile=board.dtb\0" \
+-- 
+2.30.2
+

meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend

@@ -82,7 +82,9 @@ SRC_URI:append:fvp-baser-aemv8r64 = " \
 #
 # Juno Machines
 #
-SRC_URI:append:juno = " file://0001-arm-juno-add-custom-bootcmd-to-autoboot-from-uEnv.tx.patch"
+SRC_URI:append:juno = " file://0001-arm-juno-add-custom-bootcmd-to-autoboot-from-uEnv.tx.patch \
+                        file://0002-configs-vexpress-modify-to-boot-compressed-initramfs.patch \
+                      "
 
 
 #

meta-arm-bsp/recipes-kernel/linux/files/fvp-base/0001-arm64-dts-fvp-Enable-virtio-rng-support.patch

@@ -0,0 +1,29 @@
+From b443c8efd563dc372c60e7ad9f52aeddf7c13706 Mon Sep 17 00:00:00 2001
+From: Anton Antonov <Anton.Antonov@arm.com>
+Date: Mon, 7 Nov 2022 11:37:51 +0000
+Subject: [PATCH] arm64: dts: fvp: Enable virtio-rng support
+
+The virtio-rng is available from FVP_Base_RevC-2xAEMvA version 11.17.
+Enable it since Yocto includes a recipe for a newer FVP version.
+
+Upstream-Status: Inappropriate [Yocto specific]
+Signed-off-by: Anton Antonov <Anton.Antonov@arm.com>
+---
+ arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
+index ec2d5280a30b..acafdcbf1063 100644
+--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
++++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
+@@ -26,7 +26,6 @@ virtio@200000 {
+ 					compatible = "virtio,mmio";
+ 					reg = <0x200000 0x200>;
+ 					interrupts = <46>;
+-					status = "disabled";
+ 				};
+ 			};
+ 		};
+-- 
+2.25.1
+

meta-arm-bsp/recipes-kernel/linux/files/juno/0001-arm64-dts-juno-Add-thermal-critical-trip-points.patch

@@ -0,0 +1,60 @@
+From c4a7b9b587ca1bb4678d48d8be7132492b23a81c Mon Sep 17 00:00:00 2001
+From: Cristian Marussi <cristian.marussi@arm.com>
+Date: Fri, 28 Oct 2022 15:08:33 +0100
+Subject: [PATCH] arm64: dts: juno: Add thermal critical trip points
+
+When thermnal zones are defined, trip points definitions are mandatory.
+Define a couple of critical trip points for monitoring of existing
+PMIC and SOC thermal zones.
+
+This was lost between txt to yaml conversion and was re-enforced recently
+via the commit 8c596324232d ("dt-bindings: thermal: Fix missing required property")
+
+Cc: Rob Herring <robh+dt@kernel.org>
+Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
+Cc: devicetree@vger.kernel.org
+Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
+Fixes: f7b636a8d83c ("arm64: dts: juno: add thermal zones for scpi sensors")
+Link: https://lore.kernel.org/r/20221028140833.280091-8-cristian.marussi@arm.com
+Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
+
+Signed-off-by: Jon Mason <jon.mason@arm.com>
+Upstream-Status: Backport
+---
+ arch/arm64/boot/dts/arm/juno-base.dtsi | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
+index 2f27619d8abd..8b4d280b1e7e 100644
+--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
++++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
+@@ -751,12 +751,26 @@ pmic {
+ 			polling-delay = <1000>;
+ 			polling-delay-passive = <100>;
+ 			thermal-sensors = <&scpi_sensors0 0>;
++			trips {
++				pmic_crit0: trip0 {
++					temperature = <90000>;
++					hysteresis = <2000>;
++					type = "critical";
++				};
++			};
+ 		};
+ 
+ 		soc {
+ 			polling-delay = <1000>;
+ 			polling-delay-passive = <100>;
+ 			thermal-sensors = <&scpi_sensors0 3>;
++			trips {
++				soc_crit0: trip0 {
++					temperature = <80000>;
++					hysteresis = <2000>;
++					type = "critical";
++				};
++			};
+ 		};
+ 
+ 		big_cluster_thermal_zone: big-cluster {
+-- 
+2.30.2
+

meta-arm-bsp/recipes-kernel/linux/files/juno/0002-arm64-dts-Update-cache-properties-for-Arm-Ltd-platfo.patch

@@ -0,0 +1,141 @@
+From 59fb813f9742b349f48250bd7793279cafe2752c Mon Sep 17 00:00:00 2001
+From: Pierre Gondois <pierre.gondois@arm.com>
+Date: Mon, 7 Nov 2022 16:56:58 +0100
+Subject: [PATCH] arm64: dts: Update cache properties for Arm Ltd platforms
+
+The DeviceTree Specification v0.3 specifies that the cache node
+"compatible" and "cache-level" properties are required.
+
+Cf. s3.8 Multi-level and Shared Cache Nodes
+The 'cache-unified' property should be present if one of the properties
+for unified cache is present ('cache-size', ...).
+
+Update the relevant device trees nodes accordingly.
+
+Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
+Link: https://lore.kernel.org/r/20221107155825.1644604-6-pierre.gondois@arm.com
+Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
+
+Signed-off-by: Jon Mason <jon.mason@arm.com>
+Upstream-Status: Backport
+---
+ arch/arm64/boot/dts/arm/corstone1000.dtsi            | 1 +
+ arch/arm64/boot/dts/arm/foundation-v8.dtsi           | 1 +
+ arch/arm64/boot/dts/arm/juno-r1.dts                  | 2 ++
+ arch/arm64/boot/dts/arm/juno-r2.dts                  | 2 ++
+ arch/arm64/boot/dts/arm/juno.dts                     | 2 ++
+ arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts           | 1 +
+ arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts | 1 +
+ 7 files changed, 10 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dts/arm/corstone1000.dtsi
+index 4e46826f883a..21f1f952e985 100644
+--- a/arch/arm64/boot/dts/arm/corstone1000.dtsi
++++ b/arch/arm64/boot/dts/arm/corstone1000.dtsi
+@@ -53,6 +53,7 @@ gic: interrupt-controller@1c000000 {
+ 
+ 	L2_0: l2-cache0 {
+ 		compatible = "cache";
++		cache-unified;
+ 		cache-level = <2>;
+ 		cache-size = <0x80000>;
+ 		cache-line-size = <64>;
+diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+index 83e3e7e3984f..c8bd23b1a7ba 100644
+--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
++++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+@@ -58,6 +58,7 @@ cpu3: cpu@3 {
+ 
+ 		L2_0: l2-cache0 {
+ 			compatible = "cache";
++			cache-level = <2>;
+ 		};
+ 	};
+ 
+diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts
+index 6451c62146fd..1d90eeebb37d 100644
+--- a/arch/arm64/boot/dts/arm/juno-r1.dts
++++ b/arch/arm64/boot/dts/arm/juno-r1.dts
+@@ -189,6 +189,7 @@ A53_3: cpu@103 {
+ 
+ 		A57_L2: l2-cache0 {
+ 			compatible = "cache";
++			cache-unified;
+ 			cache-size = <0x200000>;
+ 			cache-line-size = <64>;
+ 			cache-sets = <2048>;
+@@ -197,6 +198,7 @@ A57_L2: l2-cache0 {
+ 
+ 		A53_L2: l2-cache1 {
+ 			compatible = "cache";
++			cache-unified;
+ 			cache-size = <0x100000>;
+ 			cache-line-size = <64>;
+ 			cache-sets = <1024>;
+diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/arm/juno-r2.dts
+index 438cd1ff4bd0..d2ada69b0a43 100644
+--- a/arch/arm64/boot/dts/arm/juno-r2.dts
++++ b/arch/arm64/boot/dts/arm/juno-r2.dts
+@@ -195,6 +195,7 @@ A53_3: cpu@103 {
+ 
+ 		A72_L2: l2-cache0 {
+ 			compatible = "cache";
++			cache-unified;
+ 			cache-size = <0x200000>;
+ 			cache-line-size = <64>;
+ 			cache-sets = <2048>;
+@@ -203,6 +204,7 @@ A72_L2: l2-cache0 {
+ 
+ 		A53_L2: l2-cache1 {
+ 			compatible = "cache";
++			cache-unified;
+ 			cache-size = <0x100000>;
+ 			cache-line-size = <64>;
+ 			cache-sets = <1024>;
+diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
+index cf4a58211399..5e48a01a5b9f 100644
+--- a/arch/arm64/boot/dts/arm/juno.dts
++++ b/arch/arm64/boot/dts/arm/juno.dts
+@@ -194,6 +194,7 @@ A53_3: cpu@103 {
+ 
+ 		A57_L2: l2-cache0 {
+ 			compatible = "cache";
++			cache-unified;
+ 			cache-size = <0x200000>;
+ 			cache-line-size = <64>;
+ 			cache-sets = <2048>;
+@@ -202,6 +203,7 @@ A57_L2: l2-cache0 {
+ 
+ 		A53_L2: l2-cache1 {
+ 			compatible = "cache";
++			cache-unified;
+ 			cache-size = <0x100000>;
+ 			cache-line-size = <64>;
+ 			cache-sets = <1024>;
+diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
+index 258991ad7cc0..ef68f5aae7dd 100644
+--- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
++++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
+@@ -71,6 +71,7 @@ cpu@3 {
+ 
+ 		L2_0: l2-cache0 {
+ 			compatible = "cache";
++			cache-level = <2>;
+ 		};
+ 	};
+ 
+diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
+index 5b6d9d8e934d..796cd7d02eb5 100644
+--- a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
++++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
+@@ -57,6 +57,7 @@ cpu@1 {
+ 
+ 		L2_0: l2-cache0 {
+ 			compatible = "cache";
++			cache-level = <2>;
+ 		};
+ 	};
+ 
+-- 
+2.30.2
+

meta-arm-bsp/recipes-kernel/linux/files/juno/0003-arm64-dts-fvp-Add-SPE-to-Foundation-FVP.patch

@@ -0,0 +1,38 @@
+From 3bd7a0219082c2c91570b81afc35f2aec57cade2 Mon Sep 17 00:00:00 2001
+From: James Clark <james.clark@arm.com>
+Date: Thu, 17 Nov 2022 10:25:36 +0000
+Subject: [PATCH] arm64: dts: fvp: Add SPE to Foundation FVP
+
+Add SPE DT node to FVP model. If the model doesn't support SPE (e.g.,
+turned off via parameter), the driver will skip the initialisation
+accordingly and thus is safe.
+
+Signed-off-by: James Clark <james.clark@arm.com>
+Link: https://lore.kernel.org/r/20221117102536.237515-1-james.clark@arm.com
+Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
+
+Signed-off-by: Jon Mason <jon.mason@arm.com>
+Upstream-Status: Backport
+---
+ arch/arm64/boot/dts/arm/foundation-v8.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+index c8bd23b1a7ba..029578072d8f 100644
+--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
++++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+@@ -85,6 +85,11 @@ pmu {
+ 			     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ 	};
+ 
++	spe-pmu {
++		compatible = "arm,statistical-profiling-extension-v1";
++		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
++	};
++
+ 	watchdog@2a440000 {
+ 		compatible = "arm,sbsa-gwdt";
+ 		reg = <0x0 0x2a440000 0 0x1000>,
+-- 
+2.30.2
+

meta-arm-bsp/recipes-kernel/linux/files/juno/0004-arm64-dts-fvp-Add-information-about-L1-and-L2-caches.patch

@@ -0,0 +1,149 @@
+From b2d5025e129289d9b914c696646e64495a7453c0 Mon Sep 17 00:00:00 2001
+From: Sudeep Holla <sudeep.holla@arm.com>
+Date: Fri, 18 Nov 2022 15:10:17 +0000
+Subject: [PATCH] arm64: dts: fvp: Add information about L1 and L2 caches
+
+Add the information about L1 and L2 caches on FVP RevC platform.
+Though the cache size is configurable through the model parameters,
+having default values in the device tree helps to exercise and debug
+any code utilising the cache information without the need of real
+hardware.
+
+Link: https://lore.kernel.org/r/20221118151017.704716-1-sudeep.holla@arm.com
+Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
+
+Signed-off-by: Jon Mason <jon.mason@arm.com>
+Upstream-Status: Backport
+---
+ arch/arm64/boot/dts/arm/fvp-base-revc.dts | 73 +++++++++++++++++++++++
+ 1 file changed, 73 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
+index 5f6f30c801a7..60472d65a355 100644
+--- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts
++++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
+@@ -47,48 +47,121 @@ cpu0: cpu@0 {
+ 			compatible = "arm,armv8";
+ 			reg = <0x0 0x000>;
+ 			enable-method = "psci";
++			i-cache-size = <0x8000>;
++			i-cache-line-size = <64>;
++			i-cache-sets = <256>;
++			d-cache-size = <0x8000>;
++			d-cache-line-size = <64>;
++			d-cache-sets = <256>;
++			next-level-cache = <&C0_L2>;
+ 		};
+ 		cpu1: cpu@100 {
+ 			device_type = "cpu";
+ 			compatible = "arm,armv8";
+ 			reg = <0x0 0x100>;
+ 			enable-method = "psci";
++			i-cache-size = <0x8000>;
++			i-cache-line-size = <64>;
++			i-cache-sets = <256>;
++			d-cache-size = <0x8000>;
++			d-cache-line-size = <64>;
++			d-cache-sets = <256>;
++			next-level-cache = <&C0_L2>;
+ 		};
+ 		cpu2: cpu@200 {
+ 			device_type = "cpu";
+ 			compatible = "arm,armv8";
+ 			reg = <0x0 0x200>;
+ 			enable-method = "psci";
++			i-cache-size = <0x8000>;
++			i-cache-line-size = <64>;
++			i-cache-sets = <256>;
++			d-cache-size = <0x8000>;
++			d-cache-line-size = <64>;
++			d-cache-sets = <256>;
++			next-level-cache = <&C0_L2>;
+ 		};
+ 		cpu3: cpu@300 {
+ 			device_type = "cpu";
+ 			compatible = "arm,armv8";
+ 			reg = <0x0 0x300>;
+ 			enable-method = "psci";
++			i-cache-size = <0x8000>;
++			i-cache-line-size = <64>;
++			i-cache-sets = <256>;
++			d-cache-size = <0x8000>;
++			d-cache-line-size = <64>;
++			d-cache-sets = <256>;
++			next-level-cache = <&C0_L2>;
+ 		};
+ 		cpu4: cpu@10000 {
+ 			device_type = "cpu";
+ 			compatible = "arm,armv8";
+ 			reg = <0x0 0x10000>;
+ 			enable-method = "psci";
++			i-cache-size = <0x8000>;
++			i-cache-line-size = <64>;
++			i-cache-sets = <256>;
++			d-cache-size = <0x8000>;
++			d-cache-line-size = <64>;
++			d-cache-sets = <256>;
++			next-level-cache = <&C1_L2>;
+ 		};
+ 		cpu5: cpu@10100 {
+ 			device_type = "cpu";
+ 			compatible = "arm,armv8";
+ 			reg = <0x0 0x10100>;
+ 			enable-method = "psci";
++			i-cache-size = <0x8000>;
++			i-cache-line-size = <64>;
++			i-cache-sets = <256>;
++			d-cache-size = <0x8000>;
++			d-cache-line-size = <64>;
++			d-cache-sets = <256>;
++			next-level-cache = <&C1_L2>;
+ 		};
+ 		cpu6: cpu@10200 {
+ 			device_type = "cpu";
+ 			compatible = "arm,armv8";
+ 			reg = <0x0 0x10200>;
+ 			enable-method = "psci";
++			i-cache-size = <0x8000>;
++			i-cache-line-size = <64>;
++			i-cache-sets = <256>;
++			d-cache-size = <0x8000>;
++			d-cache-line-size = <64>;
++			d-cache-sets = <256>;
++			next-level-cache = <&C1_L2>;
+ 		};
+ 		cpu7: cpu@10300 {
+ 			device_type = "cpu";
+ 			compatible = "arm,armv8";
+ 			reg = <0x0 0x10300>;
+ 			enable-method = "psci";
++			i-cache-size = <0x8000>;
++			i-cache-line-size = <64>;
++			i-cache-sets = <256>;
++			d-cache-size = <0x8000>;
++			d-cache-line-size = <64>;
++			d-cache-sets = <256>;
++			next-level-cache = <&C1_L2>;
++		};
++		C0_L2: l2-cache0 {
++			compatible = "cache";
++			cache-size = <0x80000>;
++			cache-line-size = <64>;
++			cache-sets = <512>;
++			cache-level = <2>;
++			cache-unified;
++		};
++
++		C1_L2: l2-cache1 {
++			compatible = "cache";
++			cache-size = <0x80000>;
++			cache-line-size = <64>;
++			cache-sets = <512>;
++			cache-level = <2>;
++			cache-unified;
+ 		};
+ 	};
+ 
+-- 
+2.30.2
+

meta-arm-bsp/recipes-kernel/linux/files/juno/0005-ARM-dts-vexpress-align-LED-node-names-with-dtschema.patch

@@ -0,0 +1,84 @@
+From e15031539490733279c41ba87f4ef2b440a685f5 Mon Sep 17 00:00:00 2001
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Date: Fri, 25 Nov 2022 15:41:12 +0100
+Subject: [PATCH] ARM: dts: vexpress: align LED node names with dtschema
+
+The node names should be generic and DT schema expects certain pattern.
+
+  vexpress-v2p-ca9.dtb: leds: 'user1', 'user2', 'user3', 'user4', 'user5', 'user6', 'user7', 'user8' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
+
+Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Link: https://lore.kernel.org/r/20221125144112.476817-1-krzysztof.kozlowski@linaro.org
+Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
+
+Signed-off-by: Jon Mason <jon.mason@arm.com>
+Upstream-Status: Backport
+---
+ arch/arm/boot/dts/vexpress-v2m.dtsi | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi
+index f434fe5cf4a1..def538ce8769 100644
+--- a/arch/arm/boot/dts/vexpress-v2m.dtsi
++++ b/arch/arm/boot/dts/vexpress-v2m.dtsi
+@@ -383,49 +383,49 @@ v2m_refclk32khz: refclk32khz {
+ 			leds {
+ 				compatible = "gpio-leds";
+ 
+-				user1 {
++				led-user1 {
+ 					label = "v2m:green:user1";
+ 					gpios = <&v2m_led_gpios 0 0>;
+ 					linux,default-trigger = "heartbeat";
+ 				};
+ 
+-				user2 {
++				led-user2 {
+ 					label = "v2m:green:user2";
+ 					gpios = <&v2m_led_gpios 1 0>;
+ 					linux,default-trigger = "mmc0";
+ 				};
+ 
+-				user3 {
++				led-user3 {
+ 					label = "v2m:green:user3";
+ 					gpios = <&v2m_led_gpios 2 0>;
+ 					linux,default-trigger = "cpu0";
+ 				};
+ 
+-				user4 {
++				led-user4 {
+ 					label = "v2m:green:user4";
+ 					gpios = <&v2m_led_gpios 3 0>;
+ 					linux,default-trigger = "cpu1";
+ 				};
+ 
+-				user5 {
++				led-user5 {
+ 					label = "v2m:green:user5";
+ 					gpios = <&v2m_led_gpios 4 0>;
+ 					linux,default-trigger = "cpu2";
+ 				};
+ 
+-				user6 {
++				led-user6 {
+ 					label = "v2m:green:user6";
+ 					gpios = <&v2m_led_gpios 5 0>;
+ 					linux,default-trigger = "cpu3";
+ 				};
+ 
+-				user7 {
++				led-user7 {
+ 					label = "v2m:green:user7";
+ 					gpios = <&v2m_led_gpios 6 0>;
+ 					linux,default-trigger = "cpu4";
+ 				};
+ 
+-				user8 {
++				led-user8 {
+ 					label = "v2m:green:user8";
+ 					gpios = <&v2m_led_gpios 7 0>;
+ 					linux,default-trigger = "cpu5";
+-- 
+2.30.2
+

meta-arm-bsp/recipes-kernel/linux/linux-arm-platforms.inc

@@ -36,7 +36,6 @@ SRC_URI:append:corstone500 = " \
 # Corstone1000 KMACHINE
 #
 FILESEXTRAPATHS:prepend:corstone1000 := "${ARMBSPFILESPATHS}"
-FILESEXTRAPATHS:prepend:corstone1000 := "${ARMFILESPATHS}"
 COMPATIBLE_MACHINE:corstone1000 = "${MACHINE}"
 KCONFIG_MODE:corstone1000 = "--alldefconfig"
 KMACHINE:corstone1000 = "corstone1000"
@@ -70,6 +69,7 @@ KERNEL_FEATURES:corstone1000 = ""
 COMPATIBLE_MACHINE:fvp-base = "fvp-base"
 KMACHINE:fvp-base = "fvp"
 FILESEXTRAPATHS:prepend:fvp-base := "${ARMBSPFILESPATHS}"
+SRC_URI:append:fvp-base = " file://0001-arm64-dts-fvp-Enable-virtio-rng-support.patch"
 
 #
 # FVP BASE ARM32 KMACHINE
@@ -100,6 +100,13 @@ COMPATIBLE_MACHINE:juno = "juno"
 KBUILD_DEFCONFIG:juno = "defconfig"
 KCONFIG_MODE:juno = "--alldefconfig"
 FILESEXTRAPATHS:prepend:juno := "${ARMBSPFILESPATHS}"
+SRC_URI:append:juno = " \
+    file://0001-arm64-dts-juno-Add-thermal-critical-trip-points.patch \
+    file://0002-arm64-dts-Update-cache-properties-for-Arm-Ltd-platfo.patch \
+    file://0003-arm64-dts-fvp-Add-SPE-to-Foundation-FVP.patch \
+    file://0004-arm64-dts-fvp-Add-information-about-L1-and-L2-caches.patch \
+    file://0005-ARM-dts-vexpress-align-LED-node-names-with-dtschema.patch \
+    "
 
 #
 # Musca B1/S2 can't run Linux
@@ -115,7 +122,6 @@ COMPATIBLE_MACHINE:n1sdp = "n1sdp"
 KBUILD_DEFCONFIG:n1sdp = "defconfig"
 KCONFIG_MODE:n1sdp = "--alldefconfig"
 FILESEXTRAPATHS:prepend:n1sdp := "${ARMBSPFILESPATHS}"
-FILESEXTRAPATHS:prepend:n1sdp := "${ARMFILESPATHS}"
 SRC_URI:append:n1sdp = " \
     file://0001-iommu-arm-smmu-v3-workaround-for-ATC_INV_SIZE_ALL-in.patch \
     file://0002-n1sdp-pci_quirk-add-acs-override-for-PCI-devices.patch \

meta-arm-bsp/recipes-security/optee/files/optee-os/n1sdp/0005-plat-n1sdp-register-DRAM1-to-optee-os.patch

@@ -0,0 +1,52 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+From 2eb1da30564428551ca687d456d848129105abac Mon Sep 17 00:00:00 2001
+From: Vishnu Banavath <vishnu.banavath@arm.com>
+Date: Tue, 25 Oct 2022 19:08:49 +0100
+Subject: [PATCH] plat-n1sdp: register DRAM1 to optee-os
+
+N1SDP supports two DRAM's. This change is to add 2nd DRAM
+starting at 0x8080000000 address.
+
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+diff --git a/core/arch/arm/plat-n1sdp/conf.mk b/core/arch/arm/plat-n1sdp/conf.mk
+index 06b4975a..5374e406 100644
+--- a/core/arch/arm/plat-n1sdp/conf.mk
++++ b/core/arch/arm/plat-n1sdp/conf.mk
+@@ -38,4 +38,4 @@ CFG_SHMEM_START  ?= 0x83000000
+ CFG_SHMEM_SIZE   ?= 0x00210000
+ # DRAM1 is defined above 4G
+ $(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
+-$(call force,CFG_CORE_ARM64_PA_BITS,36)
++$(call force,CFG_CORE_ARM64_PA_BITS,42)
+diff --git a/core/arch/arm/plat-n1sdp/main.c b/core/arch/arm/plat-n1sdp/main.c
+index cfb7f19b..bb951ce6 100644
+--- a/core/arch/arm/plat-n1sdp/main.c
++++ b/core/arch/arm/plat-n1sdp/main.c
+@@ -33,6 +33,7 @@ static struct pl011_data console_data __nex_bss;
+ register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
+ 
+ register_ddr(DRAM0_BASE, DRAM0_SIZE);
++register_ddr(DRAM1_BASE, DRAM1_SIZE);
+ 
+ register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICD_BASE, GIC_DIST_REG_SIZE);
+ register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICC_BASE, GIC_DIST_REG_SIZE);
+diff --git a/core/arch/arm/plat-n1sdp/platform_config.h b/core/arch/arm/plat-n1sdp/platform_config.h
+index 81b99409..bf0a3c83 100644
+--- a/core/arch/arm/plat-n1sdp/platform_config.h
++++ b/core/arch/arm/plat-n1sdp/platform_config.h
+@@ -35,6 +35,9 @@
+ #define DRAM0_BASE		0x80000000
+ #define DRAM0_SIZE		0x80000000
+ 
++#define DRAM1_BASE		0x8080000000ULL
++#define DRAM1_SIZE		0x80000000ULL
++
+ #define GICD_BASE		0x30000000
+ #define GICC_BASE		0x2C000000
+ #define GICR_BASE		0x300C0000
+-- 
+2.17.1
+

meta-arm-bsp/recipes-security/optee/optee-os-n1sdp.inc

@@ -11,6 +11,7 @@ SRC_URI:append = " \
     file://0002-plat-n1sdp-add-N1SDP-platform-support.patch \
     file://0003-HACK-disable-instruction-cache-and-data-cache.patch \
     file://0004-Handle-logging-syscall.patch \
+    file://0005-plat-n1sdp-register-DRAM1-to-optee-os.patch \
     "
 
 EXTRA_OEMAKE += " CFG_TEE_CORE_LOG_LEVEL=4"

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0001-Add-openamp-to-SE-proxy-deployment.patch

@@ -1,7 +1,7 @@
-From 7c9589c4bb056db5e1696f2a777891ab235b1b63 Mon Sep 17 00:00:00 2001
+From 13de79cd4f0d25b812e5f4ad4a19bc075496be83 Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 3 Dec 2021 16:36:51 +0000
-Subject: [PATCH 01/19] Add openamp to SE proxy deployment
+Subject: [PATCH 01/20] Add openamp to SE proxy deployment
 
 Openamp is required to communicate between secure partitions(running on
 Cortex-A) and trusted-firmware-m(running on Cortex-M).
@@ -283,5 +283,5 @@ index 000000000000..449f35f4fda4
 +set_property(TARGET openamp PROPERTY IMPORTED_LOCATION "${OPENAMP_INSTALL_DIR}/lib/${CMAKE_STATIC_LIBRARY_PREFIX}open_amp${CMAKE_STATIC_LIBRARY_SUFFIX}")
 +set_property(TARGET openamp PROPERTY INTERFACE_INCLUDE_DIRECTORIES "${OPENAMP_INSTALL_DIR}/include")
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0002-Implement-mhu-driver-and-the-OpenAmp-conversion-laye.patch

@@ -1,7 +1,7 @@
-From e4ccb92f8de94a82edd3548d62c853790ae36bd1 Mon Sep 17 00:00:00 2001
+From 28aedac78016e5063ebd675a43e6c3655f87b442 Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 3 Dec 2021 18:00:46 +0000
-Subject: [PATCH 02/19] Implement mhu driver and the OpenAmp conversion layer.
+Subject: [PATCH 02/20] Implement mhu driver and the OpenAmp conversion layer.
 
 This commit adds an mhu driver (v2.1 and v2) to the secure
 partition se_proxy and a conversion layer to communicate with
@@ -1087,5 +1087,5 @@ index 000000000000..bb778bb9719b
 +# include MHU driver
 +include(${TS_ROOT}/platform/drivers/arm/mhu_driver/component.cmake)
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0003-Add-openamp-rpc-caller.patch

@@ -1,7 +1,7 @@
-From e187510a814b48b7b2e477a9913ee35b68522d06 Mon Sep 17 00:00:00 2001
+From 55394c4c9681af71b1ed7f7ebc7c44b2e1737113 Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 3 Dec 2021 19:00:54 +0000
-Subject: [PATCH 03/19] Add openamp rpc caller
+Subject: [PATCH 03/20] Add openamp rpc caller
 
 Upstream-Status: Pending
 Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
@@ -1192,5 +1192,5 @@ index d39873a0fe81..34fe5ff1b925 100644
  		# Stub service provider backends
  		"components/rpc/dummy"
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0004-add-psa-client-definitions-for-ff-m.patch

@@ -1,7 +1,7 @@
-From 8c1bc5a7ae525d64802e2a06746f698f54cf07ca Mon Sep 17 00:00:00 2001
+From fb6d2f33e26c7b6ef88d552feca1f835da3f0df6 Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 3 Dec 2021 19:05:18 +0000
-Subject: [PATCH 04/19] add psa client definitions for ff-m
+Subject: [PATCH 04/20] add psa client definitions for ff-m
 
 Add PSA client definitions in common include to add future
 ff-m support.
@@ -294,5 +294,5 @@ index 000000000000..aaa973c6e987
 +
 +#endif /* __PSA_MANIFEST_SID_H__ */
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0005-Add-common-service-component-to-ipc-support.patch

@@ -1,7 +1,7 @@
-From e9778f726ed582360152f150301995b10d268aae Mon Sep 17 00:00:00 2001
+From 0311fc8f131fe7a2b0f4dd9988c610fda47394aa Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 3 Dec 2021 19:13:03 +0000
-Subject: [PATCH 05/19] Add common service component to ipc support
+Subject: [PATCH 05/20] Add common service component to ipc support
 
 Add support for inter processor communication for PSA
 including, the openamp client side structures lib.
@@ -291,5 +291,5 @@ index 34fe5ff1b925..dd0c5d00c21e 100644
  		"components/service/discovery/provider"
  		"components/service/discovery/provider/serializer/packed-c"
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0006-Add-secure-storage-ipc-backend.patch

@@ -1,7 +1,7 @@
-From 0df82487a7a253c601ca20ca1bd64fbb9ed64230 Mon Sep 17 00:00:00 2001
+From ed4371d63cb52c121be9678bc225055944286c30 Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 3 Dec 2021 19:19:24 +0000
-Subject: [PATCH 06/19] Add secure storage ipc backend
+Subject: [PATCH 06/20] Add secure storage ipc backend
 
 Add secure storage ipc ff-m implementation which may use
 openamp as rpc to communicate with other processor.
@@ -519,5 +519,5 @@ index dd0c5d00c21e..cd51460406ca 100644
  		"components/service/attestation/provider"
  		"components/service/attestation/provider/serializer/packed-c"
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0007-Use-secure-storage-ipc-and-openamp-for-se_proxy.patch

@@ -1,7 +1,7 @@
-From 9c7f1e6a5eb9ab887e568cfa3c2003583d387bc9 Mon Sep 17 00:00:00 2001
+From d1377a5ed909e3a1d9caca56aeda262a80322a4b Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 3 Dec 2021 19:25:34 +0000
-Subject: [PATCH 07/19] Use secure storage ipc and openamp for se_proxy
+Subject: [PATCH 07/20] Use secure storage ipc and openamp for se_proxy
 
 Remove mock up backend for secure storage in se proxy
 deployment and use instead the secure storage ipc backend with
@@ -59,5 +59,5 @@ index acfb6e8873fa..57290056d614 100644
  	return secure_storage_provider_init(&ps_provider, backend);
  }
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0008-Run-psa-arch-test.patch

@@ -1,7 +1,7 @@
-From d9169d380366afc63af5d4bf02791aeb41f47897 Mon Sep 17 00:00:00 2001
+From 1b50ab6b6ff1c6f27ab320e18fb0d4aeb1122f0d Mon Sep 17 00:00:00 2001
 From: Satish Kumar <satish.kumar01@arm.com>
 Date: Sun, 12 Dec 2021 10:43:48 +0000
-Subject: [PATCH 08/19] Run psa-arch-test
+Subject: [PATCH 08/20] Run psa-arch-test
 
 Fixes needed to run psa-arch-test
 
@@ -68,5 +68,5 @@ index 4f6ba2a7d822..1fd6b40dc803 100644
  };
  
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0009-Use-address-instead-of-pointers.patch

@@ -1,7 +1,7 @@
-From ee767c1ae857cfcc8b4bb520b2558091e253cf94 Mon Sep 17 00:00:00 2001
+From a6fba503ffddae004e23b32559212e749e8586f6 Mon Sep 17 00:00:00 2001
 From: Satish Kumar <satish.kumar01@arm.com>
 Date: Sun, 12 Dec 2021 10:57:17 +0000
-Subject: [PATCH 09/19] Use address instead of pointers
+Subject: [PATCH 09/20] Use address instead of pointers
 
 Since secure enclave is 32bit and we 64bit there is an issue
 in the protocol communication design that force us to handle
@@ -164,5 +164,5 @@ index a1f369db253e..bda442a61d5c 100644
  
  	(void)client_id;
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0010-Add-psa-ipc-attestation-to-se-proxy.patch

@@ -1,7 +1,7 @@
-From afdeb8e098a1f2822adf2ea83ded8dd9e2d021ba Mon Sep 17 00:00:00 2001
+From b142f3c162fb1c28982d26b5ac2181ba79197a28 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Tue, 7 Dec 2021 11:50:00 +0000
-Subject: [PATCH 10/19] Add psa ipc attestation to se proxy
+Subject: [PATCH 10/20] Add psa ipc attestation to se proxy
 
 Implement attestation client API as psa ipc and include it to
 se proxy deployment.
@@ -16,12 +16,15 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
  .../reporter/psa_ipc/psa_ipc_attest_report.c  | 45 ++++++++++
  components/service/common/include/psa/sid.h   |  4 +
  .../se-proxy/common/service_proxy_factory.c   |  6 ++
- deployments/se-proxy/se-proxy.cmake           |  3 +-
- 7 files changed, 169 insertions(+), 1 deletion(-)
+ deployments/se-proxy/se-proxy.cmake           |  7 +-
+ ...ble-using-hard-coded-attestation-key.patch | 29 -------
+ external/psa_arch_tests/psa_arch_tests.cmake  |  4 -
+ 9 files changed, 171 insertions(+), 36 deletions(-)
  create mode 100644 components/service/attestation/client/psa_ipc/component.cmake
  create mode 100644 components/service/attestation/client/psa_ipc/iat_ipc_client.c
  create mode 100644 components/service/attestation/reporter/psa_ipc/component.cmake
  create mode 100644 components/service/attestation/reporter/psa_ipc/psa_ipc_attest_report.c
+ delete mode 100644 external/psa_arch_tests/0001-Disable-using-hard-coded-attestation-key.patch
 
 diff --git a/components/service/attestation/client/psa_ipc/component.cmake b/components/service/attestation/client/psa_ipc/component.cmake
 new file mode 100644
@@ -243,10 +246,10 @@ index 57290056d614..4b8cceccbe4d 100644
  	attest_provider_register_serializer(&attest_provider,
  		TS_RPC_ENCODING_PACKED_C, packedc_attest_provider_serializer_instance());
 diff --git a/deployments/se-proxy/se-proxy.cmake b/deployments/se-proxy/se-proxy.cmake
-index cd51460406ca..38d26821d44d 100644
+index cd51460406ca..3dbbc36c968d 100644
 --- a/deployments/se-proxy/se-proxy.cmake
 +++ b/deployments/se-proxy/se-proxy.cmake
-@@ -49,12 +49,13 @@ add_components(TARGET "se-proxy"
+@@ -49,14 +49,15 @@ add_components(TARGET "se-proxy"
  		"components/service/attestation/include"
  		"components/service/attestation/provider"
  		"components/service/attestation/provider/serializer/packed-c"
@@ -258,9 +261,63 @@ index cd51460406ca..38d26821d44d 100644
  		"components/rpc/dummy"
  		"components/rpc/common/caller"
 -		"components/service/attestation/reporter/stub"
- 		"components/service/attestation/key_mngr/stub"
- 		"components/service/crypto/backend/stub"
+-		"components/service/attestation/key_mngr/stub"
+-		"components/service/crypto/backend/stub"
++		"components/service/attestation/key_mngr/local"
++		"components/service/crypto/backend/psa_ipc"
  		"components/service/crypto/client/psa"
+ 		"components/service/secure_storage/backend/mock_store"
+ )
+diff --git a/external/psa_arch_tests/0001-Disable-using-hard-coded-attestation-key.patch b/external/psa_arch_tests/0001-Disable-using-hard-coded-attestation-key.patch
+deleted file mode 100644
+index 6664961ab662..000000000000
+--- a/external/psa_arch_tests/0001-Disable-using-hard-coded-attestation-key.patch
++++ /dev/null
+@@ -1,29 +0,0 @@
+-From dbd25f94eb62a9855bf342dd97503a49ea50f83e Mon Sep 17 00:00:00 2001
+-From: Gyorgy Szing <Gyorgy.Szing@arm.com>
+-Date: Tue, 8 Feb 2022 17:06:37 +0000
+-Subject: [PATCH 1/1] Disable using hard-coded attestation key
+-
+-Modify platform config to disable using a hard-coded attestation
+-key.
+-
+-Signed-off-by: Gyorgy Szing <Gyorgy.Szing@arm.com>
+----
+- api-tests/platform/targets/tgt_dev_apis_linux/nspe/pal_config.h | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+-diff --git a/api-tests/platform/targets/tgt_dev_apis_linux/nspe/pal_config.h b/api-tests/platform/targets/tgt_dev_apis_linux/nspe/pal_config.h
+-index 6112ba7..1cdf581 100755
+---- a/api-tests/platform/targets/tgt_dev_apis_linux/nspe/pal_config.h
+-+++ b/api-tests/platform/targets/tgt_dev_apis_linux/nspe/pal_config.h
+-@@ -60,7 +60,7 @@ typedef uint32_t            cfg_id_t;
+- #define CRYPTO_VERSION_BETA3
+- 
+- /* Use hardcoded public key */
+--#define PLATFORM_OVERRIDE_ATTEST_PK
+-+//#define PLATFORM_OVERRIDE_ATTEST_PK
+- 
+- /*
+-  * Include of PSA defined Header files
+--- 
+-2.17.1
+-
+diff --git a/external/psa_arch_tests/psa_arch_tests.cmake b/external/psa_arch_tests/psa_arch_tests.cmake
+index a8b77a1fc05e..1995df3e0b49 100644
+--- a/external/psa_arch_tests/psa_arch_tests.cmake
++++ b/external/psa_arch_tests/psa_arch_tests.cmake
+@@ -15,10 +15,6 @@ set(GIT_OPTIONS
+ 	GIT_REPOSITORY ${PSA_ARCH_TESTS_URL}
+ 	GIT_TAG ${PSA_ARCH_TESTS_REFSPEC}
+ 	GIT_SHALLOW FALSE
+-	PATCH_COMMAND git stash
+-		COMMAND git tag -f ts-before-am
+-		COMMAND git am ${CMAKE_CURRENT_LIST_DIR}/0001-Disable-using-hard-coded-attestation-key.patch
+-		COMMAND git reset ts-before-am
+ )
+ 
+ # Ensure list of defines is separated correctly
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0011-Setup-its-backend-as-openamp-rpc-using-secure-storag.patch

@@ -1,7 +1,7 @@
-From 94770f9660154bb1157e19c11fb706889a81ae73 Mon Sep 17 00:00:00 2001
+From 4240977f7c38950f5edb316bb08ae05cb7b99875 Mon Sep 17 00:00:00 2001
 From: Satish Kumar <satish.kumar01@arm.com>
 Date: Thu, 9 Dec 2021 14:11:06 +0000
-Subject: [PATCH 11/19] Setup its backend as openamp rpc using secure storage
+Subject: [PATCH 11/20] Setup its backend as openamp rpc using secure storage
  ipc implementation.
 
 Upstream-Status: Pending
@@ -159,5 +159,5 @@ index 4b8cceccbe4d..1110ac46bf8b 100644
 +        return secure_storage_provider_init(&its_provider, backend);
  }
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0012-add-psa-ipc-crypto-backend.patch

@@ -1,7 +1,7 @@
-From 896b5009bb07c4b53541290e1712856063411107 Mon Sep 17 00:00:00 2001
+From 0b5d96b1a9f927dc141047600edf2249af7022c5 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Thu, 9 Dec 2021 14:17:39 +0000
-Subject: [PATCH 12/19] add psa ipc crypto backend
+Subject: [PATCH 12/20] add psa ipc crypto backend
 
 Add psa ipc crypto backend and attach it to se proxy
 deployment.
@@ -36,9 +36,8 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
  .../crypto/include/psa/crypto_client_struct.h |   8 +-
  .../service/crypto/include/psa/crypto_sizes.h |   2 +-
  .../se-proxy/common/service_proxy_factory.c   |  15 +-
- deployments/se-proxy/se-proxy.cmake           |   2 +-
  .../providers/arm/corstone1000/platform.cmake |   2 +
- 29 files changed, 2293 insertions(+), 11 deletions(-)
+ 28 files changed, 2292 insertions(+), 10 deletions(-)
  create mode 100644 components/service/crypto/backend/psa_ipc/component.cmake
  create mode 100644 components/service/crypto/backend/psa_ipc/crypto_ipc_backend.c
  create mode 100644 components/service/crypto/backend/psa_ipc/crypto_ipc_backend.h
@@ -2556,19 +2555,6 @@ index 1110ac46bf8b..7edeef8b434a 100644
  
  	return crypto_iface;
  }
-diff --git a/deployments/se-proxy/se-proxy.cmake b/deployments/se-proxy/se-proxy.cmake
-index 38d26821d44d..f647190d9559 100644
---- a/deployments/se-proxy/se-proxy.cmake
-+++ b/deployments/se-proxy/se-proxy.cmake
-@@ -57,7 +57,7 @@ add_components(TARGET "se-proxy"
- 		"components/rpc/dummy"
- 		"components/rpc/common/caller"
- 		"components/service/attestation/key_mngr/stub"
--		"components/service/crypto/backend/stub"
-+		"components/service/crypto/backend/psa_ipc"
- 		"components/service/crypto/client/psa"
- 		"components/service/secure_storage/backend/mock_store"
- )
 diff --git a/platform/providers/arm/corstone1000/platform.cmake b/platform/providers/arm/corstone1000/platform.cmake
 index bb778bb9719b..51e5faa3e4d8 100644
 --- a/platform/providers/arm/corstone1000/platform.cmake
@@ -2580,5 +2566,5 @@ index bb778bb9719b..51e5faa3e4d8 100644
 +
 +add_compile_definitions(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0013-Add-stub-capsule-update-service-components.patch

@@ -1,7 +1,7 @@
-From 6b8ebdeb8caa6326ae2a4befaf4410a7a54d4e02 Mon Sep 17 00:00:00 2001
+From 050be6fdfee656b0556766cc1db30f4c0ea87c79 Mon Sep 17 00:00:00 2001
 From: Julian Hall <julian.hall@arm.com>
 Date: Tue, 12 Oct 2021 15:45:41 +0100
-Subject: [PATCH 13/19] Add stub capsule update service components
+Subject: [PATCH 13/20] Add stub capsule update service components
 
 To facilitate development of a capsule update service provider,
 stub components are added to provide a starting point for an
@@ -338,7 +338,7 @@ index 298d407a2371..02aa7fe2550d 100644
  #ifdef __cplusplus
  }
 diff --git a/deployments/se-proxy/se-proxy.cmake b/deployments/se-proxy/se-proxy.cmake
-index f647190d9559..e35b0d0f610d 100644
+index 3dbbc36c968d..f0db2d43f443 100644
 --- a/deployments/se-proxy/se-proxy.cmake
 +++ b/deployments/se-proxy/se-proxy.cmake
 @@ -51,6 +51,7 @@ add_components(TARGET "se-proxy"
@@ -432,5 +432,5 @@ index 000000000000..285d924186be
 +
 +#endif /* CAPSULE_UPDATE_PARAMETERS_H */
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0014-Configure-storage-size.patch

@@ -1,7 +1,7 @@
-From a71b26f867f1b4a08285d6da82528de6a54321f2 Mon Sep 17 00:00:00 2001
+From 229ec29154a4404426ad3083af68ca111a214e13 Mon Sep 17 00:00:00 2001
 From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
 Date: Thu, 16 Dec 2021 21:31:40 +0000
-Subject: [PATCH 14/19] Configure storage size
+Subject: [PATCH 14/20] Configure storage size
 
 Upstream-Status: Pending
 Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
@@ -10,7 +10,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
  1 file changed, 3 insertions(+), 2 deletions(-)
 
 diff --git a/components/service/smm_variable/backend/uefi_variable_store.c b/components/service/smm_variable/backend/uefi_variable_store.c
-index 715ccc3cb546..aeb8a22062b7 100644
+index 611e2e225c6b..6c3b9ed81c25 100644
 --- a/components/service/smm_variable/backend/uefi_variable_store.c
 +++ b/components/service/smm_variable/backend/uefi_variable_store.c
 @@ -88,6 +88,7 @@ static efi_status_t check_name_terminator(
@@ -38,5 +38,5 @@ index 715ccc3cb546..aeb8a22062b7 100644
  
  	context->owner_id = owner_id;
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0015-Fix-Crypto-interface-structure-aligned-with-tf-m-cha.patch

@@ -1,7 +1,7 @@
-From 3cc9c417f12f005244530d8d706a6b7f3be35627 Mon Sep 17 00:00:00 2001
+From cf83184500703f9b4f2ac04be59cc7d624d8fd66 Mon Sep 17 00:00:00 2001
 From: Satish Kumar <satish.kumar01@arm.com>
 Date: Sun, 13 Feb 2022 09:01:10 +0000
-Subject: [PATCH 15/19] Fix: Crypto interface structure aligned with tf-m
+Subject: [PATCH 15/20] Fix: Crypto interface structure aligned with tf-m
  change.
 
 NO NEED TO RAISE PR: The PR for this FIX  is raied by Emek.
@@ -27,5 +27,5 @@ index c13c20e84131..ec25eaf868c7 100644
  							    *   AEAD until the API is
  							    *   restructured
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0016-Integrate-remaining-psa-ipc-client-APIs.patch

@@ -1,7 +1,7 @@
-From c54afe45c1be25c4819b0f762cf03a24e6343ce5 Mon Sep 17 00:00:00 2001
+From 551d8722769fa2f2d2ac74adcb289333a9b03598 Mon Sep 17 00:00:00 2001
 From: Satish Kumar <satish.kumar01@arm.com>
 Date: Sun, 13 Feb 2022 09:49:51 +0000
-Subject: [PATCH 16/19] Integrate remaining psa-ipc client APIs.
+Subject: [PATCH 16/20] Integrate remaining psa-ipc client APIs.
 
 Upstream-Status: Pending
 Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
@@ -490,5 +490,5 @@ index e16f6e5450af..cc9279ee79f2 100644
  }
  #endif
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0017-Fix-update-psa_set_key_usage_flags-definition-to-the.patch

@@ -1,7 +1,7 @@
-From b1ff44c650ae82f364a2f74059eeb280996dc4f8 Mon Sep 17 00:00:00 2001
+From 5a5e162e17c9decb04b3b2905a0fb604e8f06e91 Mon Sep 17 00:00:00 2001
 From: Satish Kumar <satish.kumar01@arm.com>
 Date: Mon, 14 Feb 2022 17:52:00 +0000
-Subject: [PATCH 17/19] Fix : update psa_set_key_usage_flags definition to the
+Subject: [PATCH 17/20] Fix : update psa_set_key_usage_flags definition to the
  latest from the tf-m
 
 Upstream-Status: Pending
@@ -36,5 +36,5 @@ index 1bc55e375eea..b4a7ed4b39d3 100644
  }
  
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0018-Fixes-in-AEAD-for-psa-arch-test-54-and-58.patch

@@ -1,9 +1,10 @@
-From a1da63a8c4d55d52321608a72129af49e0a498b2 Mon Sep 17 00:00:00 2001
+From 1a4d46fdc0b5745b9cfb0789e4b778111bd6dbbb Mon Sep 17 00:00:00 2001
 From: Satish Kumar <satish.kumar01@arm.com>
 Date: Mon, 14 Feb 2022 08:22:25 +0000
-Subject: [PATCH 18/19] Fixes in AEAD for psa-arch test 54 and 58.
+Subject: [PATCH 18/20] Fixes in AEAD for psa-arch test 54 and 58.
 
-Upstream-Status: Pending
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
 Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
 Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 ---
@@ -116,5 +117,5 @@ index 0be266b52403..435fd3b523ce 100644
  
  /* Variable length input parameter tags */
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0019-plat-corstone1000-change-default-smm-values.patch

@@ -1,7 +1,7 @@
-From 07ad7e1f7ba06045bf331d5b73a6adf38a098fb7 Mon Sep 17 00:00:00 2001
+From c519bae79629bfe551d79cfeb4e7d8a059545145 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Tue, 11 Oct 2022 10:46:10 +0100
-Subject: [PATCH 19/19] plat: corstone1000: change default smm values
+Subject: [PATCH 19/20] plat: corstone1000: change default smm values
 
 Smm gateway uses SE proxy to route the calls for any NV
 storage so set the NV_STORE_SN.
@@ -33,5 +33,5 @@ index 51e5faa3e4d8..04b629a81906 100644
 +	SMM_GATEWAY_MAX_UEFI_VARIABLES=100
 +)
 -- 
-2.38.0
+2.38.1
 

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0020-FMP-Support-in-Corstone1000.patch

@@ -0,0 +1,418 @@
+From 70cf374fb55f2d62ecbe28049253df33b42b6749 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Fri, 8 Jul 2022 09:48:06 +0100
+Subject: [PATCH 20/20] FMP Support in Corstone1000.
+
+The FMP support is used by u-boot to pupolate ESRT information
+for the kernel.
+
+The solution is platform specific and needs to be revisted.
+
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+Upstream-Status: Inappropriate [The solution is platform specific and needs to be revisted]
+Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
+---
+ .../provider/capsule_update_provider.c        |   5 +
+ .../capsule_update/provider/component.cmake   |   1 +
+ .../provider/corstone1000_fmp_service.c       | 307 ++++++++++++++++++
+ .../provider/corstone1000_fmp_service.h       |  26 ++
+ 4 files changed, 339 insertions(+)
+ create mode 100644 components/service/capsule_update/provider/corstone1000_fmp_service.c
+ create mode 100644 components/service/capsule_update/provider/corstone1000_fmp_service.h
+
+diff --git a/components/service/capsule_update/provider/capsule_update_provider.c b/components/service/capsule_update/provider/capsule_update_provider.c
+index e133753f8560..991a2235cd73 100644
+--- a/components/service/capsule_update/provider/capsule_update_provider.c
++++ b/components/service/capsule_update/provider/capsule_update_provider.c
+@@ -11,6 +11,7 @@
+ #include <protocols/service/capsule_update/capsule_update_proto.h>
+ #include <protocols/rpc/common/packed-c/status.h>
+ #include "capsule_update_provider.h"
++#include "corstone1000_fmp_service.h"
+ 
+ 
+ #define CAPSULE_UPDATE_REQUEST (0x1)
+@@ -47,6 +48,8 @@ struct rpc_interface *capsule_update_provider_init(
+ 		rpc_interface = service_provider_get_rpc_interface(&context->base_provider);
+ 	}
+ 
++	provision_fmp_variables_metadata(context->client.caller);
++
+ 	return rpc_interface;
+ }
+ 
+@@ -85,6 +88,7 @@ static rpc_status_t event_handler(uint32_t opcode, struct rpc_caller *caller)
+ 		}
+ 		psa_call(caller,handle, PSA_IPC_CALL,
+ 			in_vec,IOVEC_LEN(in_vec), NULL, 0);
++		set_fmp_image_info(caller, handle);
+ 		break;
+ 
+ 		case KERNEL_STARTED_EVENT:
+@@ -99,6 +103,7 @@ static rpc_status_t event_handler(uint32_t opcode, struct rpc_caller *caller)
+ 		}
+ 		psa_call(caller,handle, PSA_IPC_CALL,
+ 			in_vec,IOVEC_LEN(in_vec), NULL, 0);
++		set_fmp_image_info(caller, handle);
+ 		break;
+ 		default:
+ 			EMSG("%s unsupported opcode", __func__);
+diff --git a/components/service/capsule_update/provider/component.cmake b/components/service/capsule_update/provider/component.cmake
+index 1d412eb234d9..6b0601494938 100644
+--- a/components/service/capsule_update/provider/component.cmake
++++ b/components/service/capsule_update/provider/component.cmake
+@@ -10,4 +10,5 @@ endif()
+ 
+ target_sources(${TGT} PRIVATE
+ 	"${CMAKE_CURRENT_LIST_DIR}/capsule_update_provider.c"
++	"${CMAKE_CURRENT_LIST_DIR}/corstone1000_fmp_service.c"
+ 	)
+diff --git a/components/service/capsule_update/provider/corstone1000_fmp_service.c b/components/service/capsule_update/provider/corstone1000_fmp_service.c
+new file mode 100644
+index 000000000000..6a7a47a7ed99
+--- /dev/null
++++ b/components/service/capsule_update/provider/corstone1000_fmp_service.c
+@@ -0,0 +1,307 @@
++/*
++ * Copyright (c) 2022, Arm Limited and Contributors. All rights reserved.
++ *
++ * SPDX-License-Identifier: BSD-3-Clause
++ */
++
++#include "corstone1000_fmp_service.h"
++#include <psa/client.h>
++#include <psa/sid.h>
++#include <psa/storage_common.h>
++#include <trace.h>
++
++#include <service/smm_variable/backend/variable_index.h>
++
++#define VARIABLE_INDEX_STORAGE_UID			(0x787)
++
++/**
++ * Variable attributes
++ */
++#define	EFI_VARIABLE_NON_VOLATILE				(0x00000001)
++#define	EFI_VARIABLE_BOOTSERVICE_ACCESS				(0x00000002)
++#define	EFI_VARIABLE_RUNTIME_ACCESS				(0x00000004)
++#define	EFI_VARIABLE_HARDWARE_ERROR_RECORD			(0x00000008)
++#define	EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS			(0x00000010)
++#define	EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS	(0x00000020)
++#define	EFI_VARIABLE_APPEND_WRITE				(0x00000040)
++#define	EFI_VARIABLE_MASK \
++	(EFI_VARIABLE_NON_VOLATILE | \
++	 EFI_VARIABLE_BOOTSERVICE_ACCESS | \
++	 EFI_VARIABLE_RUNTIME_ACCESS | \
++	 EFI_VARIABLE_HARDWARE_ERROR_RECORD | \
++	 EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS | \
++	 EFI_VARIABLE_APPEND_WRITE)
++
++#define FMP_VARIABLES_COUNT	6
++
++static struct variable_metadata fmp_variables_metadata[FMP_VARIABLES_COUNT] = {
++    {
++	{ 0x86c77a67, 0x0b97, 0x4633, \
++		{ 0xa1, 0x87, 0x49, 0x10, 0x4d, 0x06, 0x85, 0xc7} },
++	/* name size = (variable_name + \0) * sizeof(u16) */
++	.name_size = 42, { 'F', 'm', 'p', 'D', 'e', 's', 'c', 'r', 'i', 'p', 't', 'o', 'r', 'V', 'e', 'r', 's', 'i', 'o', 'n' },
++	.attributes = EFI_VARIABLE_NON_VOLATILE, .uid = 0
++    },
++    {
++	{ 0x86c77a67, 0x0b97, 0x4633, \
++		{ 0xa1, 0x87, 0x49, 0x10, 0x4d, 0x06, 0x85, 0xc7} },
++	/* name size = (variable_name + \0) * sizeof(u16) */
++	.name_size = 34, { 'F', 'm', 'p', 'I', 'm', 'a', 'g', 'e', 'I', 'n', 'f', 'o', 'S', 'i', 'z', 'e' },
++	.attributes = EFI_VARIABLE_NON_VOLATILE, .uid = 0
++    },
++    {
++	{ 0x86c77a67, 0x0b97, 0x4633, \
++		{ 0xa1, 0x87, 0x49, 0x10, 0x4d, 0x06, 0x85, 0xc7} },
++	/* name size = (variable_name + \0) * sizeof(u16) */
++	.name_size = 38, { 'F', 'm', 'p', 'D', 'e', 's', 'c', 'r', 'i', 'p', 't', 'o', 'r', 'C', 'o', 'u', 'n', 't' },
++	.attributes = EFI_VARIABLE_NON_VOLATILE, .uid = 0
++    },
++    {
++	{ 0x86c77a67, 0x0b97, 0x4633, \
++		{ 0xa1, 0x87, 0x49, 0x10, 0x4d, 0x06, 0x85, 0xc7} },
++	/* name size = (variable_name + \0) * sizeof(u16) */
++	.name_size = 26, { 'F', 'm', 'p', 'I', 'm', 'a', 'g', 'e', 'I', 'n', 'f', 'o' },
++	.attributes = EFI_VARIABLE_NON_VOLATILE, .uid = 0
++    },
++    {
++	{ 0x86c77a67, 0x0b97, 0x4633, \
++		{ 0xa1, 0x87, 0x49, 0x10, 0x4d, 0x06, 0x85, 0xc7} },
++	/* name size = (variable_name + \0) * sizeof(u16) */
++	.name_size = 28, { 'F', 'm', 'p', 'I', 'm', 'a', 'g', 'e', 'N', 'a', 'm', 'e', '1' },
++	.attributes = EFI_VARIABLE_NON_VOLATILE, .uid = 0
++    },
++    {
++	{ 0x86c77a67, 0x0b97, 0x4633, \
++		{ 0xa1, 0x87, 0x49, 0x10, 0x4d, 0x06, 0x85, 0xc7} },
++	/* name size = (variable_name + \0) * sizeof(u16) */
++	.name_size = 32, { 'F', 'm', 'p', 'V', 'e', 'r', 's', 'i', 'o', 'n',  'N', 'a', 'm', 'e', '1' },
++	.attributes = EFI_VARIABLE_NON_VOLATILE, .uid = 0
++    },
++};
++
++static psa_status_t protected_storage_set(struct rpc_caller *caller,
++	psa_storage_uid_t uid, size_t data_length, const void *p_data)
++{
++	psa_status_t psa_status;
++	psa_storage_create_flags_t create_flags = PSA_STORAGE_FLAG_NONE;
++
++	struct psa_invec in_vec[] = {
++		{ .base = psa_ptr_to_u32(&uid), .len = sizeof(uid) },
++		{ .base = psa_ptr_const_to_u32(p_data), .len = data_length },
++		{ .base = psa_ptr_to_u32(&create_flags), .len = sizeof(create_flags) },
++	};
++
++	psa_status = psa_call(caller, TFM_PROTECTED_STORAGE_SERVICE_HANDLE, TFM_PS_ITS_SET,
++			      in_vec, IOVEC_LEN(in_vec), NULL, 0);
++	if (psa_status < 0)
++		EMSG("ipc_set: psa_call failed: %d", psa_status);
++
++	return psa_status;
++}
++
++static psa_status_t protected_storage_get(struct rpc_caller *caller,
++	psa_storage_uid_t uid, size_t data_size, void *p_data)
++{
++	psa_status_t psa_status;
++	uint32_t offset = 0;
++
++	struct psa_invec in_vec[] = {
++		{ .base = psa_ptr_to_u32(&uid), .len = sizeof(uid) },
++		{ .base = psa_ptr_to_u32(&offset), .len = sizeof(offset) },
++	};
++
++	struct psa_outvec out_vec[] = {
++		{ .base = psa_ptr_to_u32(p_data), .len = data_size },
++	};
++
++	psa_status = psa_call(caller, TFM_PROTECTED_STORAGE_SERVICE_HANDLE,
++			      TFM_PS_ITS_GET, in_vec, IOVEC_LEN(in_vec),
++			      out_vec, IOVEC_LEN(out_vec));
++
++	if (psa_status == PSA_SUCCESS && out_vec[0].len != data_size) {
++	    EMSG("Return size does not match with expected size.");
++	    return PSA_ERROR_BUFFER_TOO_SMALL;
++	}
++
++	return psa_status;
++}	
++
++static uint64_t name_hash(EFI_GUID *guid, size_t name_size,
++	const int16_t *name)
++{
++	/* Using djb2 hash by Dan Bernstein */
++	uint64_t hash = 5381;
++
++	/* Calculate hash over GUID */
++	hash = ((hash << 5) + hash) + guid->Data1;
++	hash = ((hash << 5) + hash) + guid->Data2;
++	hash = ((hash << 5) + hash) + guid->Data3;
++
++	for (int i = 0; i < 8; ++i) {
++
++		hash = ((hash << 5) + hash) + guid->Data4[i];
++	}   
++
++	/* Extend to cover name up to but not including null terminator */
++	for (int i = 0; i < name_size / sizeof(int16_t); ++i) {
++
++		if (!name[i]) break;
++		hash = ((hash << 5) + hash) + name[i];
++	}
++
++	return hash;
++}
++
++
++static void initialize_metadata(void)
++{
++    for (int i = 0; i < FMP_VARIABLES_COUNT; i++) {
++
++	fmp_variables_metadata[i].uid = name_hash(
++					&fmp_variables_metadata[i].guid,
++					fmp_variables_metadata[i].name_size,
++					fmp_variables_metadata[i].name);
++    }
++}
++
++
++void provision_fmp_variables_metadata(struct rpc_caller *caller)
++{
++    struct variable_metadata metadata;
++    psa_status_t status;
++    uint32_t dummy_values = 0xDEAD;
++
++    EMSG("Provisioning FMP metadata.");
++
++    initialize_metadata();
++
++    status = protected_storage_get(caller, VARIABLE_INDEX_STORAGE_UID,
++		sizeof(struct variable_metadata), &metadata);
++
++    if (status == PSA_SUCCESS) {
++	EMSG("UEFI variables store is already provisioned.");
++	return;
++    }
++
++    /* Provision FMP variables with dummy values. */
++    for (int i = 0; i < FMP_VARIABLES_COUNT; i++) {
++	protected_storage_set(caller, fmp_variables_metadata[i].uid,
++				sizeof(dummy_values), &dummy_values);
++    }
++
++    status = protected_storage_set(caller, VARIABLE_INDEX_STORAGE_UID,
++		    sizeof(struct variable_metadata) * FMP_VARIABLES_COUNT,
++		    fmp_variables_metadata);
++
++    if (status != EFI_SUCCESS) {
++	return;
++    }
++
++    EMSG("FMP metadata is provisioned");
++}
++
++typedef struct {
++    void *base;
++    int len;
++} variable_data_t;
++
++static variable_data_t fmp_variables_data[FMP_VARIABLES_COUNT];
++
++#define IMAGE_INFO_BUFFER_SIZE	256
++static char image_info_buffer[IMAGE_INFO_BUFFER_SIZE];
++#define IOCTL_CORSTONE1000_FMP_IMAGE_INFO	2
++
++static psa_status_t unpack_image_info(void *buffer, uint32_t size)
++{
++    typedef struct __attribute__ ((__packed__)) {
++	uint32_t variable_count;
++	uint32_t variable_size[FMP_VARIABLES_COUNT];
++	uint8_t variable[];
++    } packed_buffer_t;
++
++    packed_buffer_t *packed_buffer = buffer;
++    int runner = 0;
++
++    if (packed_buffer->variable_count != FMP_VARIABLES_COUNT) {
++	EMSG("Expected fmp varaibles = %u, but received = %u",
++		FMP_VARIABLES_COUNT, packed_buffer->variable_count);
++	return PSA_ERROR_PROGRAMMER_ERROR;
++    }
++
++    for (int i = 0; i < packed_buffer->variable_count; i++) {
++	EMSG("FMP variable %d : size %u", i, packed_buffer->variable_size[i]);
++	fmp_variables_data[i].base = &packed_buffer->variable[runner];
++	fmp_variables_data[i].len= packed_buffer->variable_size[i];
++	runner += packed_buffer->variable_size[i];
++    }
++
++    return PSA_SUCCESS;
++}
++
++static psa_status_t get_image_info(struct rpc_caller *caller,
++			   psa_handle_t platform_service_handle)
++{
++    psa_status_t status;
++    psa_handle_t handle;
++    uint32_t ioctl_id = IOCTL_CORSTONE1000_FMP_IMAGE_INFO;
++
++    struct psa_invec in_vec[] = {
++	{ .base = &ioctl_id, .len = sizeof(ioctl_id) },
++    };
++
++    struct psa_outvec out_vec[] = {
++	{ .base = image_info_buffer, .len = IMAGE_INFO_BUFFER_SIZE },
++    };
++
++    memset(image_info_buffer, 0, IMAGE_INFO_BUFFER_SIZE);
++
++    psa_call(caller, platform_service_handle, PSA_IPC_CALL,
++	     in_vec, IOVEC_LEN(in_vec), out_vec, IOVEC_LEN(out_vec));
++
++    status = unpack_image_info(image_info_buffer, IMAGE_INFO_BUFFER_SIZE);
++    if (status != PSA_SUCCESS) {
++	return status;
++    }
++
++    return PSA_SUCCESS;
++}
++
++static psa_status_t set_image_info(struct rpc_caller *caller)
++{
++    psa_status_t status;
++
++    for (int i = 0; i < FMP_VARIABLES_COUNT; i++) {
++	
++	status = protected_storage_set(caller,
++			fmp_variables_metadata[i].uid,
++			fmp_variables_data[i].len, fmp_variables_data[i].base);
++
++	if (status != PSA_SUCCESS) {
++
++            EMSG("FMP variable %d set unsuccessful", i);
++	    return status;
++	}
++
++        EMSG("FMP variable %d set success", i);
++    }
++
++    return PSA_SUCCESS;
++}
++
++void set_fmp_image_info(struct rpc_caller *caller,
++			psa_handle_t platform_service_handle)
++{
++    psa_status_t status;
++
++    status = get_image_info(caller, platform_service_handle);
++    if (status != PSA_SUCCESS) {
++	return;
++    }
++
++    status = set_image_info(caller);
++    if (status != PSA_SUCCESS) {
++	return;
++    }
++
++    return;
++}
+diff --git a/components/service/capsule_update/provider/corstone1000_fmp_service.h b/components/service/capsule_update/provider/corstone1000_fmp_service.h
+new file mode 100644
+index 000000000000..95fba2a04d5c
+--- /dev/null
++++ b/components/service/capsule_update/provider/corstone1000_fmp_service.h
+@@ -0,0 +1,26 @@
++/*
++ * Copyright (c) 2022, Arm Limited and Contributors. All rights reserved.
++ *
++ * SPDX-License-Identifier: BSD-3-Clause
++ */
++
++#ifndef CORSTONE1000_FMP_SERVICE_H
++#define CORSTONE1000_FMP_SERVICE_H
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++#include <rpc_caller.h>
++#include <psa/client.h>
++
++void provision_fmp_variables_metadata(struct rpc_caller *caller);
++
++void set_fmp_image_info(struct rpc_caller *caller,
++		psa_handle_t platform_service_handle);
++
++#ifdef __cplusplus
++} /* extern "C" */
++#endif
++
++#endif /* CORSTONE1000_FMP_SERVICE_H */
+-- 
+2.38.1
+

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0021-smm_gateway-add-checks-for-null-attributes.patch

@@ -0,0 +1,35 @@
+From 6d3cac6f3a6e977e9330c9c06514a372ade170a2 Mon Sep 17 00:00:00 2001
+From: Emekcan <emekcan.aras@arm.com>
+Date: Wed, 2 Nov 2022 09:58:27 +0000
+Subject: [PATCH] smm_gateway: add checks for null attributes
+
+As par EDK-2 and EDK-2 test code, setVariable() with 0 
+attributes means a delete variable request. Currently, 
+smm gatway doesn't handle this scenario. This commit adds
+that support.
+
+Upstream-Status: Pending
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+---
+ components/service/smm_variable/backend/uefi_variable_store.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/components/service/smm_variable/backend/uefi_variable_store.c b/components/service/smm_variable/backend/uefi_variable_store.c
+index 6c3b9ed8..a691dc5d 100644
+--- a/components/service/smm_variable/backend/uefi_variable_store.c
++++ b/components/service/smm_variable/backend/uefi_variable_store.c
+@@ -202,9 +202,9 @@ efi_status_t uefi_variable_store_set_variable(
+ 		if (info->is_variable_set) {
+ 
+ 			/* It's a request to update to an existing variable */
+-			if (!(var->Attributes &
++			if (!(var->Attributes) || (!(var->Attributes &
+ 				(EFI_VARIABLE_APPEND_WRITE | EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS_MASK)) &&
+-				!var->DataSize) {
++				!var->DataSize)) {
+ 
+ 				/* It's a remove operation - for a remove, the variable
+ 				 * data must be removed from the storage backend before
+-- 
+2.17.1
+

meta-arm-bsp/recipes-security/trusted-services/corstone1000/0022-GetNextVariableName-Fix.patch

@@ -0,0 +1,33 @@
+From 2aa665ad2cb13bc79b645db41686449a47593aab Mon Sep 17 00:00:00 2001
+From: Emekcan <emekcan.aras@arm.com>
+Date: Thu, 3 Nov 2022 17:43:40 +0000
+Subject: [PATCH] smm_gateway: GetNextVariableName Fix
+
+GetNextVariableName() should return EFI_BUFFER_TOO_SMALL 
+when NameSize is smaller than the actual NameSize. It 
+currently returns EFI_BUFFER_OUT_OF_RESOURCES due to setting
+max_name_len incorrectly. This fixes max_name_len error by
+replacing it with actual NameSize request by u-boot.
+
+Upstream-Status: Pending
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+---
+ .../service/smm_variable/provider/smm_variable_provider.c       | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/components/service/smm_variable/provider/smm_variable_provider.c b/components/service/smm_variable/provider/smm_variable_provider.c
+index a9679b7e..6a4b6fa7 100644
+--- a/components/service/smm_variable/provider/smm_variable_provider.c
++++ b/components/service/smm_variable/provider/smm_variable_provider.c
+@@ -197,7 +197,7 @@ static rpc_status_t get_next_variable_name_handler(void *context, struct call_re
+ 			efi_status = uefi_variable_store_get_next_variable_name(
+ 				&this_instance->variable_store,
+ 				(SMM_VARIABLE_COMMUNICATE_GET_NEXT_VARIABLE_NAME*)resp_buf->data,
+-				max_name_len,
++				((SMM_VARIABLE_COMMUNICATE_GET_NEXT_VARIABLE_NAME*)resp_buf->data)->NameSize,
+ 				&resp_buf->data_len);
+ 		}
+ 		else {
+-- 
+2.17.1
+

meta-arm-bsp/recipes-security/trusted-services/libts_git.bbappend

@@ -0,0 +1,10 @@
+MACHINE_TS_REQUIRE ?= ""
+MACHINE_TS_REQUIRE:corstone1000 = "ts-corstone1000.inc"
+
+require ${MACHINE_TS_REQUIRE}
+
+
+EXTRA_OECMAKE:append:corstone1000 = "-DMM_COMM_BUFFER_ADDRESS=0x02000000 \
+                                    -DMM_COMM_BUFFER_PAGE_COUNT=1 \
+                                    "
+

meta-arm-bsp/recipes-security/trusted-services/ts-corstone1000.inc

@@ -1,28 +1,26 @@
 FILESEXTRAPATHS:prepend := "${THISDIR}/corstone1000:"
 
-SRC_URI:append = " \
-    file://0001-Add-openamp-to-SE-proxy-deployment.patch \
-    file://0002-Implement-mhu-driver-and-the-OpenAmp-conversion-laye.patch \
-    file://0003-Add-openamp-rpc-caller.patch \
-    file://0004-add-psa-client-definitions-for-ff-m.patch \
-    file://0005-Add-common-service-component-to-ipc-support.patch \
-    file://0006-Add-secure-storage-ipc-backend.patch \
-    file://0007-Use-secure-storage-ipc-and-openamp-for-se_proxy.patch \
-    file://0008-Run-psa-arch-test.patch \
-    file://0009-Use-address-instead-of-pointers.patch \
-    file://0010-Add-psa-ipc-attestation-to-se-proxy.patch \
-    file://0011-Setup-its-backend-as-openamp-rpc-using-secure-storag.patch \
-    file://0012-add-psa-ipc-crypto-backend.patch \
-    file://0013-Add-stub-capsule-update-service-components.patch \
-    file://0014-Configure-storage-size.patch \
-    file://0015-Fix-Crypto-interface-structure-aligned-with-tf-m-cha.patch \
-    file://0016-Integrate-remaining-psa-ipc-client-APIs.patch \
-    file://0017-Fix-update-psa_set_key_usage_flags-definition-to-the.patch \
-    file://0018-Fixes-in-AEAD-for-psa-arch-test-54-and-58.patch \
-    file://0019-plat-corstone1000-change-default-smm-values.patch \
-    "
-
-
-EXTRA_OECMAKE:append = "-DMM_COMM_BUFFER_ADDRESS="0x00000000 0x02000000" \
-    -DMM_COMM_BUFFER_PAGE_COUNT="1" \
+SRC_URI:append:corstone1000  = " \
+    file://0001-Add-openamp-to-SE-proxy-deployment.patch;patchdir=../trusted-services \
+    file://0002-Implement-mhu-driver-and-the-OpenAmp-conversion-laye.patch;patchdir=../trusted-services \
+    file://0003-Add-openamp-rpc-caller.patch;patchdir=../trusted-services \
+    file://0004-add-psa-client-definitions-for-ff-m.patch;patchdir=../trusted-services \
+    file://0005-Add-common-service-component-to-ipc-support.patch;patchdir=../trusted-services \
+    file://0006-Add-secure-storage-ipc-backend.patch;patchdir=../trusted-services \
+    file://0007-Use-secure-storage-ipc-and-openamp-for-se_proxy.patch;patchdir=../trusted-services \
+    file://0008-Run-psa-arch-test.patch;patchdir=../trusted-services \
+    file://0009-Use-address-instead-of-pointers.patch;patchdir=../trusted-services \
+    file://0010-Add-psa-ipc-attestation-to-se-proxy.patch;patchdir=../trusted-services \
+    file://0011-Setup-its-backend-as-openamp-rpc-using-secure-storag.patch;patchdir=../trusted-services;patchdir=../trusted-services \
+    file://0012-add-psa-ipc-crypto-backend.patch;patchdir=../trusted-services \
+    file://0013-Add-stub-capsule-update-service-components.patch;patchdir=../trusted-services \
+    file://0014-Configure-storage-size.patch;patchdir=../trusted-services \
+    file://0015-Fix-Crypto-interface-structure-aligned-with-tf-m-cha.patch;patchdir=../trusted-services;patchdir=../trusted-services \
+    file://0016-Integrate-remaining-psa-ipc-client-APIs.patch;patchdir=../trusted-services \
+    file://0017-Fix-update-psa_set_key_usage_flags-definition-to-the.patch;patchdir=../trusted-services;patchdir=../trusted-services \
+    file://0018-Fixes-in-AEAD-for-psa-arch-test-54-and-58.patch;patchdir=../trusted-services \
+    file://0019-plat-corstone1000-change-default-smm-values.patch;patchdir=../trusted-services \
+    file://0020-FMP-Support-in-Corstone1000.patch;patchdir=../trusted-services \
+    file://0021-smm_gateway-add-checks-for-null-attributes.patch;patchdir=../trusted-services \
+    file://0022-GetNextVariableName-Fix.patch;patchdir=../trusted-services \
     "

meta-arm-bsp/recipes-security/trusted-services/ts-psa-api-test.inc

@@ -0,0 +1,7 @@
+FILESEXTRAPATHS:prepend := "${THISDIR}/corstone1000/psa-apitest:"
+
+include ts-corstone1000.inc
+
+SRC_URI:append:corstone1000  = " \
+    file://0001-corstone1000-port-crypto-config.patch;patchdir=../psatest \
+    "

meta-arm-bsp/recipes-security/trusted-services/ts-psa-crypto-api-test_git.bbappend

@@ -0,0 +1 @@
+require ts-psa-api-test.inc

meta-arm-bsp/recipes-security/trusted-services/ts-psa-iat-api-test_git.bbappend

@@ -0,0 +1 @@
+require ts-psa-api-test.inc

meta-arm-bsp/recipes-security/trusted-services/ts-psa-its-api-test_git.bbappend

@@ -0,0 +1 @@
+require ts-psa-api-test.inc

meta-arm-bsp/recipes-security/trusted-services/ts-psa-ps-api-test_git.bbappend

@@ -0,0 +1 @@
+require ts-psa-api-test.inc

meta-arm-bsp/recipes-security/trusted-services/ts-sp-se-proxy_%.bbappend

@@ -2,3 +2,8 @@ MACHINE_TS_REQUIRE ?= ""
 MACHINE_TS_REQUIRE:corstone1000 = "ts-corstone1000.inc"
 
 require ${MACHINE_TS_REQUIRE}
+
+EXTRA_OECMAKE:append:corstone1000 = " -DMM_COMM_BUFFER_ADDRESS="0x00000000 0x02000000" \
+    -DMM_COMM_BUFFER_PAGE_COUNT="1" \
+    "
+

meta-arm-bsp/recipes-security/trusted-services/ts-sp-smm-gateway_%.bbappend

@@ -2,3 +2,8 @@ MACHINE_TS_REQUIRE ?= ""
 MACHINE_TS_REQUIRE:corstone1000 = "ts-corstone1000.inc"
 
 require ${MACHINE_TS_REQUIRE}
+
+EXTRA_OECMAKE:append:corstone1000 = " -DMM_COMM_BUFFER_ADDRESS="0x00000000 0x02000000" \
+    -DMM_COMM_BUFFER_PAGE_COUNT="1" \
+    "
+

meta-arm/classes/apply_local_src_patches.bbclass

@@ -0,0 +1,48 @@
+# This class is to be inherited by recipes where there are patches located inside
+# the fetched source code which need to be applied.
+
+# The following variables need to be set:
+# LOCAL_SRC_PATCHES_INPUT_DIR is the directory from where the patches are located
+# LOCAL_SRC_PATCHES_DEST_DIR is the directory where the patches will be applied
+
+do_patch[depends] += "quilt-native:do_populate_sysroot"
+
+LOCAL_SRC_PATCHES_INPUT_DIR ??= ""
+LOCAL_SRC_PATCHES_DEST_DIR ??= "${LOCAL_SRC_PATCHES_INPUT_DIR}"
+
+python() {
+    if not d.getVar('LOCAL_SRC_PATCHES_INPUT_DIR'):
+        bb.warn("LOCAL_SRC_PATCHES_INPUT_DIR variable needs to be set.")
+}
+
+apply_local_src_patches() {
+
+    input_dir="${LOCAL_SRC_PATCHES_INPUT_DIR}"
+    dest_dir="${LOCAL_SRC_PATCHES_DEST_DIR}"
+
+    if [ ! -d "$input_dir" ] ; then
+        bbfatal "LOCAL_SRC_PATCHES_INPUT_DIR=$input_dir not found."
+    fi
+
+    if [ ! -d "$dest_dir" ] ; then
+        bbfatal "LOCAL_SRC_PATCHES_DEST_DIR=$dest_dir not found."
+    fi
+
+    cd $dest_dir
+    export QUILT_PATCHES=./patches-extra
+    mkdir -p patches-extra
+
+    for patch in $(find $input_dir -type f -name *.patch -or -name *.diff | sort)
+    do
+        patch_basename=`basename $patch`
+        if ! quilt applied $patch_basename >/dev/null ; then
+            bbdebug 1 "Applying $patch_basename in $dest_dir."
+            echo $patch_basename >> patches-extra/series
+            cp $patch patches-extra
+            quilt push $patch_basename
+        else
+            bbdebug 1 "$patch_basename already applied."
+        fi
+    done
+}
+do_patch[postfuncs] += "apply_local_src_patches"

meta-arm/classes/fvpboot.bbclass

@@ -24,7 +24,10 @@ FVP_CONSOLES[default] ?= "${FVP_CONSOLE}"
 # Arbitrary extra arguments
 FVP_EXTRA_ARGS ?= ""
 # Bitbake variables to pass to the FVP environment
-FVP_ENV_PASSTHROUGH ?= ""
+FVP_ENV_PASSTHROUGH ?= "FASTSIM_DISABLE_TA ARMLMD_LICENSE_FILE"
+FVP_ENV_PASSTHROUGH[vardeps] = "${FVP_ENV_PASSTHROUGH}"
+# Disable timing annotation by default
+FASTSIM_DISABLE_TA ?= "1"
 
 EXTRA_IMAGEDEPENDS += "${FVP_PROVIDER}"
 
@@ -70,7 +73,8 @@ python do_write_fvpboot_conf() {
 
     data["env"] = {}
     for var in d.getVar("FVP_ENV_PASSTHROUGH").split():
-        data["env"][var] = d.getVar(var)
+        if d.getVar(var) is not None:
+            data["env"][var] = d.getVar(var)
 
     os.makedirs(os.path.dirname(conffile), exist_ok=True)
     with open(conffile, "wt") as f:

meta-arm/classes/uefi_capsule.bbclass

@@ -0,0 +1,55 @@
+# This class generates UEFI capsules
+# The current class supports generating a capsule with single firmware binary
+
+DEPENDS += "gettext-native"
+inherit python3native
+
+IMAGE_TYPES += "uefi_capsule"
+
+# edk2 base tools should be installed in the native sysroot directory
+do_image_uefi_capsule[depends] += "edk2-basetools-native:do_populate_sysroot"
+
+# By default the wic image is used to create a capsule
+CAPSULE_IMGTYPE ?= "wic"
+
+# IMGDEPLOYDIR is used as the default location of firmware binary for which the capsule needs to be created
+CAPSULE_IMGLOCATION ?= "${IMGDEPLOYDIR}"
+
+# The generated capsule by default has uefi.capsule extension
+CAPSULE_EXTENSION ?= "uefi.capsule"
+
+# The following variables must be set to be able to generate a capsule update
+UEFI_FIRMWARE_BINARY ?= ""
+UEFI_CAPSULE_CONFIG ?= ""
+
+# Check if the required variables are set
+python() {
+    for var in ["UEFI_FIRMWARE_BINARY", "UEFI_CAPSULE_CONFIG"]:
+        if not d.getVar(var):
+            raise bb.parse.SkipRecipe(f"{var} not set")
+}
+
+IMAGE_CMD:uefi_capsule(){
+
+    # Force the GenerateCapsule script to use python3
+    export PYTHON_COMMAND=${PYTHON}
+
+    # Copy the firmware and the capsule config json to current directory
+    if [ -e ${CAPSULE_IMGLOCATION}/${UEFI_FIRMWARE_BINARY} ]; then
+        cp ${CAPSULE_IMGLOCATION}/${UEFI_FIRMWARE_BINARY} . ;
+    fi
+
+    export UEFI_FIRMWARE_BINARY=${UEFI_FIRMWARE_BINARY}
+    envsubst < ${UEFI_CAPSULE_CONFIG} > ./${MACHINE}-capsule-update-image.json
+
+    ${STAGING_DIR_NATIVE}/usr/bin/edk2-BaseTools/BinWrappers/PosixLike/GenerateCapsule \
+    -e -o ${IMGDEPLOYDIR}/${UEFI_FIRMWARE_BINARY}.${CAPSULE_EXTENSION} -j \
+    ${MACHINE}-capsule-update-image.json
+
+    # Remove the firmware to avoid contamination of IMGDEPLOYDIR
+    rm ${UEFI_FIRMWARE_BINARY}
+
+}
+
+# The firmware binary should be created before generating the capsule
+IMAGE_TYPEDEP:uefi_capsule:append = "${CAPSULE_IMGTYPE}"

meta-arm/lib/fvp/runner.py

@@ -1,7 +1,7 @@
-import asyncio
 import re
 import subprocess
 import os
+import shlex
 import shutil
 import sys
 
@@ -44,50 +44,70 @@ def check_telnet():
     if not bool(shutil.which("telnet")):
         raise RuntimeError("Cannot find telnet, this is needed to connect to the FVP.")
 
+
+class ConsolePortParser:
+    def __init__(self, lines):
+        self._lines = lines
+        self._console_ports = {}
+
+    def parse_port(self, console):
+        if console in self._console_ports:
+            return self._console_ports[console]
+
+        while True:
+            try:
+                line = next(self._lines).strip().decode(errors='ignore')
+                m = re.match(r"^(\S+): Listening for serial connection on port (\d+)$", line)
+                if m:
+                    matched_console = m.group(1)
+                    matched_port = int(m.group(2))
+                    if matched_console == console:
+                        return matched_port
+                    else:
+                        self._console_ports[matched_console] = matched_port
+            except StopIteration:
+                # self._lines might be a growing log file
+                pass
+
+
+# This function is backported from Python 3.8. Remove it and replace call sites
+# with shlex.join once OE-core support for earlier Python versions is dropped.
+def shlex_join(split_command):
+    """Return a shell-escaped string from *split_command*."""
+    return ' '.join(shlex.quote(arg) for arg in split_command)
+
+
 class FVPRunner:
     def __init__(self, logger):
-        self._terminal_ports = {}
-        self._line_callbacks = []
         self._logger = logger
         self._fvp_process = None
         self._telnets = []
         self._pexpects = []
 
-    def add_line_callback(self, callback):
-        self._line_callbacks.append(callback)
-
-    async def start(self, config, extra_args=[], terminal_choice="none"):
+    def start(self, config, extra_args=[], terminal_choice="none", stdout=subprocess.PIPE):
         cli = cli_from_config(config, terminal_choice)
         cli += extra_args
 
         # Pass through environment variables needed for GUI applications, such
         # as xterm, to work.
         env = config['env']
-        for name in ('DISPLAY', 'WAYLAND_DISPLAY'):
+        for name in ('DISPLAY', 'WAYLAND_DISPLAY', 'XAUTHORITY'):
             if name in os.environ:
                 env[name] = os.environ[name]
 
-        self._logger.debug(f"Constructed FVP call: {cli}")
-        self._fvp_process = await asyncio.create_subprocess_exec(
-            *cli,
-            stdin=subprocess.DEVNULL, stdout=subprocess.PIPE, stderr=subprocess.STDOUT,
+        self._logger.debug(f"Constructed FVP call: {shlex_join(cli)}")
+        self._fvp_process = subprocess.Popen(
+            cli,
+            stdin=subprocess.DEVNULL, stdout=stdout, stderr=subprocess.STDOUT,
             env=env)
 
-        def detect_terminals(line):
-            m = re.match(r"^(\S+): Listening for serial connection on port (\d+)$", line)
-            if m:
-                terminal = m.group(1)
-                port = int(m.group(2))
-                self._terminal_ports[terminal] = port
-        self.add_line_callback(detect_terminals)
-
-    async def stop(self):
+    def stop(self):
         if self._fvp_process:
             self._logger.debug(f"Terminating FVP PID {self._fvp_process.pid}")
             try:
                 self._fvp_process.terminate()
-                await asyncio.wait_for(self._fvp_process.wait(), 10.0)
-            except asyncio.TimeoutError:
+                self._fvp_process.wait(10.0)
+            except subprocess.TimeoutExpired:
                 self._logger.debug(f"Killing FVP PID {self._fvp_process.pid}")
                 self._fvp_process.kill()
             except ProcessLookupError:
@@ -96,8 +116,8 @@ class FVPRunner:
         for telnet in self._telnets:
             try:
                 telnet.terminate()
-                await asyncio.wait_for(telnet.wait(), 10.0)
-            except asyncio.TimeoutError:
+                telnet.wait(10.0)
+            except subprocess.TimeoutExpired:
                 telnet.kill()
             except ProcessLookupError:
                 pass
@@ -117,34 +137,21 @@ class FVPRunner:
         else:
             return 0
 
-    async def run(self, until=None):
-        if until and until():
-            return
+    def wait(self, timeout):
+        self._fvp_process.wait(timeout)
 
-        async for line in self._fvp_process.stdout:
-            line = line.strip().decode("utf-8", errors="replace")
-            for callback in self._line_callbacks:
-                callback(line)
-            if until and until():
-                return
+    @property
+    def stdout(self):
+        return self._fvp_process.stdout
 
-    async def _get_terminal_port(self, terminal, timeout):
-        def terminal_exists():
-            return terminal in self._terminal_ports
-        await asyncio.wait_for(self.run(terminal_exists), timeout)
-        return self._terminal_ports[terminal]
-
-    async def create_telnet(self, terminal, timeout=15.0):
+    def create_telnet(self, port):
         check_telnet()
-        port = await self._get_terminal_port(terminal, timeout)
-        telnet = await asyncio.create_subprocess_exec("telnet", "localhost", str(port), stdin=sys.stdin, stdout=sys.stdout)
+        telnet = subprocess.Popen(["telnet", "localhost", str(port)], stdin=sys.stdin, stdout=sys.stdout)
         self._telnets.append(telnet)
         return telnet
 
-    async def create_pexpect(self, terminal, timeout=15.0, **kwargs):
-        check_telnet()
+    def create_pexpect(self, port, **kwargs):
         import pexpect
-        port = await self._get_terminal_port(terminal, timeout)
         instance = pexpect.spawn(f"telnet localhost {port}", **kwargs)
         self._pexpects.append(instance)
         return instance

meta-arm/lib/oeqa/controllers/fvp.py

@@ -1,4 +1,3 @@
-import asyncio
 import pathlib
 import pexpect
 import os
@@ -13,7 +12,7 @@ class OEFVPSSHTarget(OESSHTarget):
     Contains common logic to start and stop an FVP.
     """
     def __init__(self, logger, target_ip, server_ip, timeout=300, user='root',
-                 port=None, dir_image=None, rootfs=None, **kwargs):
+                 port=None, dir_image=None, rootfs=None, bootlog=None, **kwargs):
         super().__init__(logger, target_ip, server_ip, timeout, user, port)
         image_dir = pathlib.Path(dir_image)
         # rootfs may have multiple extensions so we need to strip *all* suffixes
@@ -21,36 +20,40 @@ class OEFVPSSHTarget(OESSHTarget):
         basename = basename.name.replace("".join(basename.suffixes), "")
         self.fvpconf = image_dir / (basename + ".fvpconf")
         self.config = conffile.load(self.fvpconf)
+        self.bootlog = bootlog
 
         if not self.fvpconf.exists():
             raise FileNotFoundError(f"Cannot find {self.fvpconf}")
 
-    async def boot_fvp(self):
-        self.fvp = runner.FVPRunner(self.logger)
-        await self.fvp.start(self.config)
-        self.logger.debug(f"Started FVP PID {self.fvp.pid()}")
-        await self._after_start()
-
-    async def _after_start(self):
+    def _after_start(self):
         pass
 
-    async def _after_stop(self):
-        pass
-
-    async def stop_fvp(self):
-        returncode = await self.fvp.stop()
-        await self._after_stop()
-
-        self.logger.debug(f"Stopped FVP with return code {returncode}")
-
     def start(self, **kwargs):
-        # When we can assume Py3.7+, this can simply be asyncio.run()
-        loop = asyncio.get_event_loop()
-        loop.run_until_complete(asyncio.gather(self.boot_fvp()))
+        self.fvp_log = self._create_logfile("fvp")
+        self.fvp = runner.FVPRunner(self.logger)
+        self.fvp.start(self.config, stdout=self.fvp_log)
+        self.logger.debug(f"Started FVP PID {self.fvp.pid()}")
+        self._after_start()
 
     def stop(self, **kwargs):
-        loop = asyncio.get_event_loop()
-        loop.run_until_complete(asyncio.gather(self.stop_fvp()))
+        returncode = self.fvp.stop()
+        self.logger.debug(f"Stopped FVP with return code {returncode}")
+
+    def _create_logfile(self, name):
+        if not self.bootlog:
+            return None
+
+        test_log_path = pathlib.Path(self.bootlog).parent
+        test_log_suffix = pathlib.Path(self.bootlog).suffix
+        fvp_log_file = f"{name}_log{test_log_suffix}"
+        fvp_log_path = pathlib.Path(test_log_path, fvp_log_file)
+        fvp_log_symlink = pathlib.Path(test_log_path, f"{name}_log")
+        try:
+            os.remove(fvp_log_symlink)
+        except:
+            pass
+        os.symlink(fvp_log_file, fvp_log_symlink)
+        return open(fvp_log_path, 'wb')
 
 
 class OEFVPTarget(OEFVPSSHTarget):
@@ -59,31 +62,34 @@ class OEFVPTarget(OEFVPSSHTarget):
     waits for a Linux shell before returning to ensure that SSH commands work
     with the default test dependencies.
     """
-    def __init__(self, logger, target_ip, server_ip, bootlog=None, **kwargs):
+    def __init__(self, logger, target_ip, server_ip, **kwargs):
         super().__init__(logger, target_ip, server_ip, **kwargs)
-        self.logfile = bootlog and open(bootlog, "wb") or None
+        self.logfile = self.bootlog and open(self.bootlog, "wb") or None
 
         # FVPs boot slowly, so allow ten minutes
         self.boot_timeout = 10 * 60
 
-    async def _after_start(self):
-        self.logger.debug(f"Awaiting console on terminal {self.config['consoles']['default']}")
-        console = await self.fvp.create_pexpect(self.config['consoles']['default'])
-        try:
-            console.expect("login\\:", timeout=self.boot_timeout)
-            self.logger.debug("Found login prompt")
-        except pexpect.TIMEOUT:
-            self.logger.info("Timed out waiting for login prompt.")
-            self.logger.info("Boot log follows:")
-            self.logger.info(b"\n".join(console.before.splitlines()[-200:]).decode("utf-8", errors="replace"))
-            raise RuntimeError("Failed to start FVP.")
+    def _after_start(self):
+        with open(self.fvp_log.name, 'rb') as logfile:
+            parser = runner.ConsolePortParser(logfile)
+            self.logger.debug(f"Awaiting console on terminal {self.config['consoles']['default']}")
+            port = parser.parse_port(self.config['consoles']['default'])
+            console = self.fvp.create_pexpect(port)
+            try:
+                console.expect("login\\:", timeout=self.boot_timeout)
+                self.logger.debug("Found login prompt")
+            except pexpect.TIMEOUT:
+                self.logger.info("Timed out waiting for login prompt.")
+                self.logger.info("Boot log follows:")
+                self.logger.info(b"\n".join(console.before.splitlines()[-200:]).decode("utf-8", errors="replace"))
+                raise RuntimeError("Failed to start FVP.")
 
 
 class OEFVPSerialTarget(OEFVPSSHTarget):
     """
     This target is intended for interaction with the target over one or more
     telnet consoles using pexpect.
-    
+
     This still depends on OEFVPSSHTarget so SSH commands can still be run on
     the target, but note that this class does not inherently guarantee that
     the SSH server is running prior to running test cases. Test cases that use
@@ -92,40 +98,25 @@ class OEFVPSerialTarget(OEFVPSSHTarget):
     """
     DEFAULT_CONSOLE = "default"
 
-    def __init__(self, logger, target_ip, server_ip, bootlog=None, **kwargs):
+    def __init__(self, logger, target_ip, server_ip, **kwargs):
         super().__init__(logger, target_ip, server_ip, **kwargs)
         self.terminals = {}
 
-        self.test_log_path = pathlib.Path(bootlog).parent
-        self.test_log_suffix = pathlib.Path(bootlog).suffix
-        self.bootlog = bootlog
+    def _after_start(self):
+        with open(self.fvp_log.name, 'rb') as logfile:
+            parser = runner.ConsolePortParser(logfile)
+            for name, console in self.config["consoles"].items():
+                logfile = self._create_logfile(name)
+                self.logger.info(f'Creating terminal {name} on {console}')
+                port = parser.parse_port(console)
+                self.terminals[name] = \
+                    self.fvp.create_pexpect(port, logfile=logfile)
 
-    async def _add_terminal(self, name, fvp_name):
-        logfile = self._create_logfile(name)
-        self.logger.info(f'Creating terminal {name} on {fvp_name}')
-        self.terminals[name] = \
-            await self.fvp.create_pexpect(fvp_name, logfile=logfile)
-
-    def _create_logfile(self, name):
-        fvp_log_file = f"{name}_log{self.test_log_suffix}"
-        fvp_log_path = pathlib.Path(self.test_log_path, fvp_log_file)
-        fvp_log_symlink = pathlib.Path(self.test_log_path, f"{name}_log")
-        try:
-            os.remove(fvp_log_symlink)
-        except:
-            pass
-        os.symlink(fvp_log_file, fvp_log_symlink)
-        return open(fvp_log_path, 'wb')
-
-    async def _after_start(self):
-        for name, console in self.config["consoles"].items():
-            await self._add_terminal(name, console)
-
-            # testimage.bbclass expects to see a log file at `bootlog`,
-            # so make a symlink to the 'default' log file
-            if name == 'default':
-                default_test_file = f"{name}_log{self.test_log_suffix}"
-                os.symlink(default_test_file, self.bootlog)
+                # testimage.bbclass expects to see a log file at `bootlog`,
+                # so make a symlink to the 'default' log file
+                if name == 'default':
+                    default_test_file = f"{name}_log{self.test_log_suffix}"
+                    os.symlink(default_test_file, self.bootlog)
 
     def _get_terminal(self, name):
         return self.terminals[name]

meta-arm/lib/oeqa/selftest/cases/runfvp.py

@@ -81,13 +81,13 @@ class ConfFileTests(OESelftestTestCase):
 
 class RunnerTests(OESelftestTestCase):
     def create_mock(self):
-        return unittest.mock.patch("asyncio.create_subprocess_exec")
+        return unittest.mock.patch("subprocess.Popen")
 
     def test_start(self):
         from fvp import runner
         with self.create_mock() as m:
             fvp = runner.FVPRunner(self.logger)
-            asyncio.run(fvp.start({
+            fvp.start({
                 "fvp-bindir": "/usr/bin",
                 "exe": "FVP_Binary",
                 "parameters": {'foo': 'bar'},
@@ -96,13 +96,13 @@ class RunnerTests(OESelftestTestCase):
                 "terminals": {},
                 "args": ['--extra-arg'],
                 "env": {"FOO": "BAR"}
-            }))
+            })
 
-            m.assert_called_once_with('/usr/bin/FVP_Binary',
+            m.assert_called_once_with(['/usr/bin/FVP_Binary',
                 '--parameter', 'foo=bar',
                 '--data', 'data1',
                 '--application', 'a1=file',
-                '--extra-arg',
+                '--extra-arg'],
                 stdin=unittest.mock.ANY,
                 stdout=unittest.mock.ANY,
                 stderr=unittest.mock.ANY,
@@ -113,7 +113,7 @@ class RunnerTests(OESelftestTestCase):
         from fvp import runner
         with self.create_mock() as m:
             fvp = runner.FVPRunner(self.logger)
-            asyncio.run(fvp.start({
+            fvp.start({
                 "fvp-bindir": "/usr/bin",
                 "exe": "FVP_Binary",
                 "parameters": {},
@@ -122,9 +122,9 @@ class RunnerTests(OESelftestTestCase):
                 "terminals": {},
                 "args": [],
                 "env": {"FOO": "BAR"}
-            }))
+            })
 
-            m.assert_called_once_with('/usr/bin/FVP_Binary',
+            m.assert_called_once_with(['/usr/bin/FVP_Binary'],
                 stdin=unittest.mock.ANY,
                 stdout=unittest.mock.ANY,
                 stderr=unittest.mock.ANY,

meta-arm/recipes-bsp/scp-firmware/scp-firmware_2.10.0.bb

@@ -27,7 +27,7 @@ DEPENDS = "virtual/arm-none-eabi-gcc-native \
 # For now we only build with GCC, so stop meta-clang trying to get involved
 TOOLCHAIN = "gcc"
 
-SCP_BUILD_STR = "${@bb.utils.contains('SCP_BUILD_RELEASE', '1', 'release', 'debug', d)}"
+SCP_BUILD_STR = "${@bb.utils.contains('SCP_BUILD_RELEASE', '1', 'Release', 'Debug', d)}"
 
 inherit deploy
 
@@ -46,6 +46,7 @@ CFLAGS[unexport] = "1"
 EXTRA_OECMAKE = "-D CMAKE_BUILD_TYPE=${SCP_BUILD_STR} \
                  -D SCP_LOG_LEVEL=${SCP_LOG_LEVEL} \
                  -D SCP_PLATFORM_FEATURE_SET=${SCP_PLATFORM_FEATURE_SET} \
+                 -D DISABLE_CPPCHECK=1 \
                 "
 
 do_configure() {

meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m_1.6.0.bb

@@ -16,20 +16,19 @@ LIC_FILES_CHKSUM = "file://license.rst;md5=07f368487da347f3c7bd0fc3085f3afa \
                     file://../mcuboot/LICENSE;md5=b6ee33f1d12a5e6ee3de1e82fb51eeb8"
 
 SRC_URI  = "git://git.trustedfirmware.org/TF-M/trusted-firmware-m.git;protocol=https;branch=${SRCBRANCH_tfm};name=tfm;destsuffix=git/tfm \
-            git://git.trustedfirmware.org/TF-M/tf-m-tests.git;protocol=https;branch=${SRCBRANCH_tfm-tests};name=tfm-tests;destsuffix=git/tf-m-tests \
+            git://git.trustedfirmware.org/TF-M/tf-m-tests.git;protocol=https;nobranch=1;name=tfm-tests;destsuffix=git/tf-m-tests \
             git://github.com/ARMmbed/mbedtls.git;protocol=https;branch=${SRCBRANCH_mbedtls};name=mbedtls;destsuffix=git/mbedtls \
             git://github.com/mcu-tools/mcuboot.git;protocol=https;branch=${SRCBRANCH_mcuboot};name=mcuboot;destsuffix=git/mcuboot \
             "
 
 # The required dependencies are documented in tf-m/config/config_default.cmake
 # TF-Mv1.6.0
-SRCBRANCH_tfm ?= "release/1.6.x"
+SRCBRANCH_tfm ?= "master"
 SRCREV_tfm = "7387d88158701a3c51ad51c90a05326ee12847a8"
 # mbedtls-3.1.0
 SRCBRANCH_mbedtls ?= "master"
 SRCREV_mbedtls = "d65aeb37349ad1a50e0f6c9b694d4b5290d60e49"
 # TF-Mv1.6.0
-SRCBRANCH_tfm-tests ?= "release/1.6.x"
 SRCREV_tfm-tests = "723905d46019596f3f2df66d79b5d6bff6f3f213"
 # v1.9.0
 SRCBRANCH_mcuboot ?= "main"
@@ -108,10 +107,9 @@ export OPENSSL_MODULES="${STAGING_LIBDIR_NATIVE}/ossl-modules"
 
 # TF-M ships patches that it needs applied to mbedcrypto, so apply them
 # as part of do_patch.
-apply_local_patches() {
-    cat ${S}/lib/ext/mbedcrypto/*.patch | patch -p1 -d ${S}/../mbedtls
-}
-do_patch[postfuncs] += "apply_local_patches"
+LOCAL_SRC_PATCHES_INPUT_DIR = "${S}/lib/ext/mbedcrypto"
+LOCAL_SRC_PATCHES_DEST_DIR = "${S}/../mbedtls"
+inherit apply_local_src_patches
 
 do_configure[cleandirs] = "${B}"
 do_configure() {

meta-arm/recipes-devtools/edk2-basetools/edk2-basetools-native_202211.bb

@@ -0,0 +1,24 @@
+# Install EDK2 Base Tools in native sysroot. Currently the BaseTools are not
+# built, they are just copied to native sysroot. This is sufficient for
+# generating UEFI capsules as it only depends on some python scripts. Other
+# tools need to be built first before adding to sysroot.
+
+SUMMARY = "EDK2 Base Tools"
+LICENSE = "BSD-2-Clause-Patent"
+
+# EDK2
+SRC_URI = "git://github.com/tianocore/edk2.git;branch=master;protocol=https"
+LIC_FILES_CHKSUM = "file://License.txt;md5=2b415520383f7964e96700ae12b4570a"
+
+SRCREV = "fff6d81270b57ee786ea18ad74f43149b9f03494"
+
+S = "${WORKDIR}/git"
+
+inherit native
+
+RDEPENDS:${PN} += "python3-core"
+
+do_install () {
+    mkdir -p ${D}${bindir}/edk2-BaseTools
+    cp -r ${WORKDIR}/git/BaseTools/* ${D}${bindir}/edk2-BaseTools/
+}

meta-arm/recipes-devtools/fvp/fvp-base-r-aem_11.20.15.bb

@@ -5,6 +5,6 @@ LIC_FILES_CHKSUM = "file://license_terms/license_agreement.txt;md5=1a33828e132ba
                     file://license_terms/third_party_licenses/third_party_licenses.txt;md5=34a1ba318d745f05e6197def68ea5411 \
                     file://license_terms/third_party_licenses/arm_license_management_utilities/third_party_licenses.txt;md5=2e53bda6ff2db4c35d69944b93926c9f"
 
-SRC_URI[sha256sum] = "788ede659414af36a2d09489e400c4d822c859b726565f1f171bc3102a9413d0"
+SRC_URI[sha256sum] = "c252616489b79fffa3bb721255b1c99ff4ee8c38e4beebce4fa05862a3195fe9"
 
 MODEL_CODE = "FVP_Base_AEMv8R"

meta-arm/recipes-devtools/fvp/fvp-corstone1000.bb

@@ -2,10 +2,10 @@ require fvp-ecosystem.inc
 
 MODEL = "Corstone-1000-23"
 MODEL_CODE = "FVP_Corstone_1000"
-PV = "11.17_23"
+PV = "11.19_21"
 
-SRC_URI = "https://developer.arm.com/-/media/Arm%20Developer%20Community/Downloads/OSS/FVP/${MODEL}/Linux/${MODEL_CODE}_${PV}.tgz;subdir=${BP}"
-SRC_URI[sha256sum] = "00ccb72d02c90e2424d24a625d275cabf8ea8dc024713985208f618bb88d1934"
+SRC_URI = "https://developer.arm.com/-/media/Arm%20Developer%20Community/Downloads/OSS/FVP/${MODEL}/Linux/${MODEL_CODE}_${PV}_${FVP_ARCH}.tgz;subdir=${BP}"
+SRC_URI[sha256sum] = "dbdcb8b0c206fd56fd2296fe338a62902eb978883ba07f4da28440e180383b24"
 
 LIC_FILES_CHKSUM = "file://license_terms/license_agreement.txt;md5=1a33828e132ba71861c11688dbb0bd16 \
-                    file://license_terms/third_party_licenses.txt;md5=41029e71051b1c786bae3112a29905a7"
+                    file://license_terms/third_party_licenses/third_party_licenses.txt;md5=34a1ba318d745f05e6197def68ea5411"

meta-arm/recipes-devtools/trusted-firmware-m-scripts/trusted-firmware-m-scripts-native_1.6.0.bb

@@ -1,7 +1,7 @@
 
 SRC_URI = "git://git.trustedfirmware.org/TF-M/trusted-firmware-m.git;protocol=https;branch=${SRCBRANCH}"
 # Use the wrapper script from TF-Mv1.6.0
-SRCBRANCH ?= "release/1.6.x"
+SRCBRANCH ?= "master"
 SRCREV = "7387d88158701a3c51ad51c90a05326ee12847a8"
 
 LICENSE = "BSD-3-Clause"

meta-arm/recipes-kernel/linux/arm-ffa-transport.inc

@@ -1,4 +1,4 @@
-FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
+FILESEXTRAPATHS:prepend := "${ARMFILESPATHS}"
 
 # Enable ARM-FFA transport
 SRC_URI:append = " \

meta-arm/recipes-kernel/linux/linux-arm64-ack/0001-perf-change-root-to-prefix-for-python-install.patch

@@ -0,0 +1,34 @@
+Take a patch from linux-yocto to fix buildpaths in perf's python module.
+
+Upstream-Status: Pending
+Signed-off-by: Ross Burton <ross.burton@arm.com>
+
+From b8cd0e429bf75b673c438a8277d4bc74327df992 Mon Sep 17 00:00:00 2001
+From: Tom Zanussi <tom.zanussi@intel.com>
+Date: Tue, 3 Jul 2012 13:07:23 -0500
+Subject: [PATCH] perf: change --root to --prefix for python install
+
+Otherwise we get the sysroot path appended to the build path, not what
+we want.
+
+Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
+---
+ tools/perf/Makefile.perf | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/tools/perf/Makefile.perf b/tools/perf/Makefile.perf
+index 8f738e11356d..ee945d8e3996 100644
+--- a/tools/perf/Makefile.perf
++++ b/tools/perf/Makefile.perf
+@@ -1022,7 +1022,7 @@ install-bin: install-tools install-tests install-traceevent-plugins
+ install: install-bin try-install-man
+ 
+ install-python_ext:
+-	$(PYTHON_WORD) util/setup.py --quiet install --root='/$(DESTDIR_SQ)'
++	$(PYTHON_WORD) util/setup.py --quiet install --prefix='$(DESTDIR_SQ)/usr'
+ 
+ # 'make install-doc' should call 'make -C Documentation install'
+ $(INSTALL_DOC_TARGETS):
+-- 
+2.34.1
+

meta-arm/recipes-kernel/linux/linux-arm64-ack_5.15.bb

@@ -8,6 +8,7 @@ SRC_URI = " \
     git://android.googlesource.com/kernel/common.git;protocol=https;branch=android13-5.15-lts \
     file://0001-lib-build_OID_registry-fix-reproducibility-issues.patch \
     file://0002-vt-conmakehash-improve-reproducibility.patch \
+    file://0001-perf-change-root-to-prefix-for-python-install.patch \
     "
 
 # tag: ASB-2022-05-05_13-5.15-93-ge8b3f31d7a60

meta-arm/recipes-kernel/linux/linux-yocto_%.bbappend

@@ -1,4 +1,4 @@
-ARMFILESPATHS := "${THISDIR}/${PN}:"
+ARMFILESPATHS := "${THISDIR}/files:"
 
 COMPATIBLE_MACHINE:generic-arm64 = "generic-arm64"
 FILESEXTRAPATHS:prepend:generic-arm64 = "${ARMFILESPATHS}"

meta-arm/recipes-security/trusted-services/libts_git.bb

@@ -24,11 +24,14 @@ do_install:append () {
     fi
 
     # Move the dynamic libraries into the standard place.
-    # Update a cmake file to use correct paths.
     install -d ${D}${libdir}
     mv ${D}${TS_INSTALL}/lib/libts* ${D}${libdir}
 
-    sed -i -e "s#/${TS_ENV}##g" ${D}${TS_INSTALL}/lib/cmake/libts/libtsTargets-noconfig.cmake
+    # Update generated cmake file to use correct paths.
+    target_cmake=$(find ${D}${TS_INSTALL}/lib/cmake/libts -type f -iname "libtsTargets-*.cmake")
+    if [ ! -z "$target_cmake" ]; then
+        sed -i -e "s#/${TS_ENV}##g" $target_cmake
+    fi
 }
 
 inherit ${@oe.utils.conditional('VIRTUAL-RUNTIME_dev_manager', 'busybox-mdev', '', 'useradd', d)}

meta-arm/recipes-security/trusted-services/ts-psa-api-test-common_git.inc

@@ -9,7 +9,6 @@ RDEPENDS:${PN} += "libts"
 
 SRC_URI += "git://github.com/ARM-software/psa-arch-tests.git;name=psatest;protocol=https;branch=main;destsuffix=git/psatest \
             file://0001-Pass-Yocto-build-settings-to-psa-arch-tests-native.patch;patchdir=../psatest \
-            file://0002-corstone1000-port-crypto-config.patch;patchdir=../psatest \
            "
 
 SRCREV_psatest = "451aa087a40d02c7d04778235014c5619d126471"
@@ -19,11 +18,9 @@ EXTRA_OECMAKE += "\
                   -DPSA_ARCH_TESTS_SOURCE_DIR=${WORKDIR}/git/psatest \
                  "
 
-# TS ships patches that need to be applied to psa-arch-tests
+# TS check if there are patches to apply to psa-arch-tests, if so apply them
 apply_ts_patch() {
-    for p in ${S}/external/psa_arch_tests/*.patch; do
-        patch -p1 -d ${WORKDIR}/git/psatest < ${p}
-    done
+    find ${S}/external/psa_arch_tests -type f -name '*.patch' -exec patch -p1 -d ${WORKDIR}/git/psatest -i {} \;
 }
 do_patch[postfuncs] += "apply_ts_patch"
 

meta-atp/README.md

@@ -1,76 +1 @@
-# meta-atp layer
-
-The meta-atp layer supports building environments with traffic generation capabilities based on [AMBA Adaptive Traffic Profiles (ATP)](https://developer.arm.com/documentation/ihi0082/latest).
-
-## Recipes
-
-The meta-atp layer supports building the following software components:
-
-- Arm's implementation of the AMBA ATP specification, namely the [AMBA ATP Engine](https://github.com/ARM-software/ATP-Engine).
-- Linux kernel modules and user API (UAPI) for programming ATP devices.
-- Integration test suite for verification of kernel modules and UAPI.
-
-It is also possible to build the AMBA ATP Engine as part of the final [gem5](https://www.gem5.org/) executable. For this, meta-atp extends the `gem5-aarch64-native` recipe to add the AMBA ATP engine code as extra sources.
-
-## Machines
-
-The `gem5-atp-arm64` machine extends the `gem5-arm64` machine to instantiate a simulated platform with support for programmable AMBA ATP traffic generation. The platform includes the following models:
-
-- `ProfileGen` model. This is the adapter layer between gem5 and the AMBA ATP Engine. It is the source of traffic into the gem5 host platform.
-- `ATPDevice` model. Software can program it using the Linux kernel modules and UAPI to control traffic generation.
-
-## Usage
-
-Users should add the meta-atp layer and layer dependencies to `conf/bblayers.conf`. See `conf/layer.conf` for dependencies.
-
-### Standalone Engine executable
-
-Users can build the AMBA ATP Engine as a standalone native executable as follows:
-
-```bash
-bitbake atp-native
-```
-
-Users can run the executable through standard build scripts:
-
-```bash
-oe-run-native atp-native atpeng [--help | args...]
-```
-
-## Integration of the Engine in gem5
-
-Users should select the `gem5-atp-arm64` platform in their `conf/local.conf` file.
-
-Users can build the target image of preference, for example:
-
-```bash
-bitbake core-image-minimal
-```
-
-The resulting gem5 native executable contains the AMBA ATP Engine. The resulting target image contains the kernel modules, UAPI and test suite.
-
-Users should run the environment as follows:
-
-```bash
-./tmp/deploy/tools/start-gem5-atp.sh
-```
-
-This script launches a fast simulation to fast-forward Linux boot. Once Linux boot is completed, the fast simulation switches into a detailed simulation for the final usable environment. Users can connect and interact with the environment as follows:
-
-```bash
-oe-run-native gem5-m5term-native m5term <PORT>
-```
-
-The connection PORT is announced by the deploy script as:
-
-```bash
-system.terminal: Listening for connections on port <PORT>
-```
-
-This is usually port 3456.
-
-Users can verify access to the ATP device by running the integration test suite from within the simulated environment as follows:
-
-```bash
-test_atp.out
-```
+See ../README.md

meta-atp/conf/machine/gem5-atp-arm64.conf

@@ -5,7 +5,11 @@ MACHINEOVERRIDES =. "gem5-arm64:"
 GEM5_RUN_PROFILE = "configs/baremetal_atp.py"
 # Require m5term
 EXTRA_IMAGEDEPENDS += "gem5-m5term-native"
-# Require ATP kernel modules, user API and gem5 m5ops
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "kernel-module-atp atp-uapi gem5-m5ops"
+# Require ATP kernel modules, user API and gem5 m5readfile
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "kernel-module-atp atp-uapi gem5-m5readfile"
 # Optionally provide ATP kernel tests
 MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += "atp-test"
+
+# Use ATP Engine gem5 models in gem5 build
+DEPENDS:append:pn-gem5-aarch64-native = " atp-gem5-native"
+GEM5_EXTRAS:pn-gem5-aarch64-native = "${STAGING_DATADIR_NATIVE}/atp"