CI: Remove ts-smm-gateway from N1SDP

Installing SMM Gateway SP on the N1SDP may stop the platform from booting for on-device testing in CI. In n1sdp.yml, remove `ts-smm-gateway` if it has been added Keep `ts-smm-gateway` in default SP set so it can still be tested with `qemu-secureboot` Signed-off-by: Adam Johnston <adam.johnston@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>
arm-bsp/external-system: fix the gen_module race, again
2026-07-18 04:27:08 +00:00 · 2023-04-26 08:55:36 -04:00 · 2023-04-25 11:00:07 -04:00 · 2023-02-28 10:00:16 -05:00 · 2023-02-28 10:00:16 -05:00 · 2023-02-28 10:00:16 -05:00
486 changed files with 18061 additions and 13014 deletions
@@ -1,2 +1 @@
 __pycache__
-build
@@ -1,13 +1,12 @@
-image: ghcr.io/siemens/kas/kas:3.2.3
+image: ghcr.io/siemens/kas/kas:3.2

 variables:
  CPU_REQUEST: ""
  DEFAULT_TAG: ""
-  CACHE_DIR: $CI_BUILDS_DIR/persist
  # These are needed as the k8s executor doesn't respect the container entrypoint
  # by default
-  FF_KUBERNETES_HONOR_ENTRYPOINT: 1
  FF_USE_LEGACY_KUBERNETES_EXECUTION_STRATEGY: 0
+  FF_KUBERNETES_HONOR_ENTRYPOINT: 1

 stages:
  - prep
@@ -21,11 +20,11 @@ stages:
  interruptible: true
  variables:
    KAS_WORK_DIR: $CI_PROJECT_DIR/work
-    KAS_REPO_REF_DIR: $CACHE_DIR/repos
-    SSTATE_DIR: $CACHE_DIR/sstate
-    DL_DIR: $CACHE_DIR/downloads
+    KAS_REPO_REF_DIR: $CI_BUILDS_DIR/persist/repos
+    SSTATE_DIR: $CI_BUILDS_DIR/persist/sstate
+    DL_DIR: $CI_BUILDS_DIR/persist/downloads
    BB_LOGCONFIG: $CI_PROJECT_DIR/ci/logging.yml
-    TOOLCHAIN_DIR: $CACHE_DIR/toolchains
+    TOOLCHAIN_DIR: $CI_BUILDS_DIR/persist/toolchains
    IMAGE_DIR: $CI_PROJECT_DIR/work/build/tmp/deploy/images
    TOOLCHAIN_LINK_DIR: $CI_PROJECT_DIR/work/build/toolchains
  before_script:
@@ -36,30 +35,17 @@ stages:
    - mkdir --verbose --parents $KAS_WORK_DIR $KAS_REPO_REF_DIR $SSTATE_DIR $DL_DIR $TOOLCHAIN_DIR $TOOLCHAIN_LINK_DIR
    # Must do this here, as it's the only way to make sure the toolchain is installed on the same builder
    - ./ci/get-binary-toolchains $DL_DIR $TOOLCHAIN_DIR $TOOLCHAIN_LINK_DIR
+    # This can be removed with Kas 3.2
+    - sudo apt-get update && sudo apt-get install --yes python3-subunit

 # Generalised fragment to do a Kas build
 .build:
  extends: .setup
  variables:
    KUBERNETES_CPU_REQUEST: $CPU_REQUEST
-  rules:
-    # Don't run MR pipelines
-    - if: $CI_PIPELINE_SOURCE == "merge_request_event"
-      when: never
-    # Don't run pipelines for tags
-    - if: $CI_COMMIT_TAG
-      when: never
-    # Don't run if BUILD_ENABLE_REGEX is set, but the job doesn't match the regex
-    - if: '$BUILD_ENABLE_REGEX != null && $CI_JOB_NAME !~ $BUILD_ENABLE_REGEX'
-      when: never
-    # Allow the dev kernels to fail and not fail the overall build
-    - if: '$KERNEL == "linux-yocto-dev"'
-      allow_failure: true
-    # Catch all for everything else
-    - if: '$KERNEL != "linux-yocto-dev"'
  script:
    - KASFILES=$(./ci/jobs-to-kas "$CI_JOB_NAME")
-    - kas dump --update --force-checkout --resolve-refs --resolve-env $KASFILES 
+    - kas shell --update --force-checkout $KASFILES -c 'cat conf/*.conf'
    - kas build $KASFILES
    - ./ci/check-warnings $KAS_WORK_DIR/build/warnings.log
  artifacts:
@@ -67,11 +53,9 @@ stages:
    when: on_failure
    paths:
      - $CI_PROJECT_DIR/work/build/tmp/work*/**/temp/log.do_*.*
-      - $CI_PROJECT_DIR/work/build/tmp/work*/**/testimage/*

 #
-# Prep stage, update repositories once.
-# Set the CI variable CI_CLEAN_REPOS=1 to refetch the respositories from scratch
+# Prep stage, update repositories once
 #
 update-repos:
  extends: .setup
@@ -83,12 +67,9 @@ update-repos:
 # Build stage, the actual build jobs
 #
 # Available options for building are
-#  DISTRO: [poky, poky-tiny]
-#  KERNEL: [linux-yocto, linux-yocto-dev, linux-yocto-rt]
 #  TOOLCHAINS: [gcc, clang, armgcc, external-gccarm]
 #  TCLIBC: [glibc, musl]
-#  FIRMWARE: [u-boot, edk2]
-#  TS: [none, trusted-services]
+#  FIRMWARE: [uboot, edk2]
 #  VIRT: [none, xen]
 #  TESTING: testimage

@@ -104,7 +85,7 @@ corstone1000-fvp:
  extends: .build
  parallel:
    matrix:
-      - TESTING: [testimage, tftf]
+      - TESTING: [testimage,tftf]
  tags:
    - x86_64

@@ -116,7 +97,17 @@ fvp-base:
  parallel:
    matrix:
      - TESTING: testimage
-      - FIRMWARE: edk2
+  tags:
+    - x86_64
+
+fvp-base-arm32:
+  extends: .build
+  parallel:
+    matrix:
+      - TOOLCHAINS: [gcc, external-gccarm]
+        TESTING: testimage
+  tags:
+    - x86_64

 fvp-baser-aemv8r64:
  extends: .build
@@ -129,6 +120,15 @@ fvp-baser-aemv8r64:
 fvps:
  extends: .build

+gem5-arm64:
+  extends: .build
+  parallel:
+    matrix:
+      - VIRT: [none, xen]
+
+gem5-atp-arm64:
+  extends: .build
+
 generic-arm64:
  extends: .build

@@ -137,7 +137,7 @@ juno:
  parallel:
    matrix:
      - TOOLCHAINS: [gcc, clang]
-        FIRMWARE: [u-boot, edk2]
+        FIRMWARE: [uboot, edk2]

 musca-b1:
  extends: .build
@@ -150,22 +150,19 @@ n1sdp:
  parallel:
    matrix:
      - TOOLCHAINS: [gcc, armgcc]
-        TS: [none, trusted-services]

 qemu-generic-arm64:
  extends: .build
  parallel:
    matrix:
-      - KERNEL: [linux-yocto, linux-yocto-dev, linux-yocto-rt]
-        TOOLCHAINS: [gcc, clang]
+      - TOOLCHAINS: [gcc, clang]
        TESTING: testimage

 qemuarm64-secureboot:
  extends: .build
  parallel:
    matrix:
-      - KERNEL: [linux-yocto, linux-yocto-dev, linux-yocto-rt]
-        TOOLCHAINS: [gcc, clang]
+      - TOOLCHAINS: [gcc, clang]
        TCLIBC: [glibc, musl]
        TS: [none, trusted-services]
        TESTING: testimage
@@ -174,12 +171,8 @@ qemuarm64:
  extends: .build
  parallel:
    matrix:
-      - DISTRO: poky
-        KERNEL: [linux-yocto, linux-yocto-dev, linux-yocto-rt]
-        TOOLCHAINS: [gcc, clang]
-        FIRMWARE: [u-boot, edk2]
-        TESTING: testimage
-      - DISTRO: poky-tiny
+      - TOOLCHAINS: [gcc, clang]
+        EFI: [uboot, edk2]
        TESTING: testimage
      - VIRT: xen

@@ -187,20 +180,15 @@ qemuarm-secureboot:
  extends: .build
  parallel:
    matrix:
-      - KERNEL: [linux-yocto, linux-yocto-dev, linux-yocto-rt]
-        TOOLCHAINS: [gcc, clang, external-gccarm]
+      - TOOLCHAINS: [gcc, clang]
        TESTING: testimage

 qemuarm:
  extends: .build
  parallel:
    matrix:
-      - DISTRO: poky
-        KERNEL: [linux-yocto, linux-yocto-dev, linux-yocto-rt]
-        TOOLCHAINS: [gcc, clang]
-        FIRMWARE: [u-boot, edk2]
-        TESTING: testimage
-      - DISTRO: poky-tiny
+      - TOOLCHAINS: [gcc, clang]
+        EFI: [uboot, edk2]
        TESTING: testimage
      - VIRT: xen

@@ -208,20 +196,13 @@ qemuarmv5:
  extends: .build
  parallel:
    matrix:
-      - DISTRO: poky
-        KERNEL: [linux-yocto, linux-yocto-dev, linux-yocto-rt]
-        TESTING: testimage
-      - DISTRO: poky-tiny
-        TESTING: testimage
+      - TESTING: testimage

 sgi575:
  extends: .build

 tc1:
  extends: .build
-  parallel:
-    matrix:
-      - TESTING: testimage
  tags:
    - x86_64

@@ -242,7 +223,7 @@ check-layers:
      "yocto-check-layer-wrapper $CI_PROJECT_DIR/$LAYER --dependency $CI_PROJECT_DIR/meta-* $KAS_WORK_DIR/meta-openembedded/meta-oe --no-auto-dependency"
  parallel:
    matrix:
-      - LAYER: [meta-arm, meta-arm-bsp, meta-arm-toolchain]
+      - LAYER: [meta-arm, meta-arm-bsp, meta-arm-toolchain, meta-gem5, meta-atp]

 pending-updates:
  extends: .setup
@@ -252,8 +233,8 @@ pending-updates:
  script:
    - rm -fr update-report
    # This configuration has all of the layers we need enabled
-    - kas shell --update --force-checkout ci/qemuarm64.yml:ci/meta-openembedded.yml --command \
-      "$CI_PROJECT_DIR/scripts/machine-summary.py -t report -o $CI_PROJECT_DIR/update-report $($CI_PROJECT_DIR/ci/listmachines.py meta-arm meta-arm-bsp)"
+    - kas shell ci/gem5-arm64.yml --command \
+      "$CI_PROJECT_DIR/scripts/machine-summary.py -t report -o $CI_PROJECT_DIR/update-report $($CI_PROJECT_DIR/ci/listmachines.py meta-arm meta-arm-bsp meta-gem5)"
  # Do this on x86 whilst the compilers are x86-only
  tags:
    - x86_64
@@ -18,6 +18,15 @@ This repository contains the Arm layers for OpenEmbedded.

  This layer contains recipes for Arm's binary toolchains (GCC and Clang for -A and -M), and a recipe to build Arm's GCC.

+* meta-atp
+
+  This layer contains recipes for the [AMBA Adaptive Traffic Profiles (ATP)](https://developer.arm.com/documentation/ihi0082/latest) generation integration into meta-gem5.
+
+* meta-gem5
+
+  This layer contains recipes and machines for gem5, a system-level and processor simulator.
+
+
 Other Directories
 -----------------

@@ -0,0 +1,26 @@
+This causes illegal instruction faults in pixman, so xserver crashes.
+https://github.com/kraj/meta-clang/issues/696
+
+From 8659c5c5bec39dd43a1988b19d4cf30507a44679 Mon Sep 17 00:00:00 2001
+From: Ross Burton <ross.burton@arm.com>
+Date: Mon, 28 Nov 2022 16:52:50 +0000
+Subject: [PATCH] Revert "pixman: Do not use clang assembler for now"
+
+This reverts commit 84dbafa42d8141b00da75d6664aef07c252a52ee.
+---
+ conf/nonclangable.conf | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/conf/nonclangable.conf b/conf/nonclangable.conf
+index 04112f4..b5db848 100644
+--- a/conf/nonclangable.conf
+++ b/conf/nonclangable.conf
+@@ -347,5 +347,4 @@ DEPENDS:append:pn-pixman:mips:toolchain-clang = " openmp"
+ #| .endfunc
+ #| ^
+ CFLAGS:append:pn-pixman:arm:toolchain-clang = " -no-integrated-as"
+-CFLAGS:append:pn-pixman:aarch64:toolchain-clang = " -no-integrated-as"
+ 
+-- 
+2.34.1
+
@@ -3,4 +3,4 @@ header:

 local_conf_header:
  cc: |
-    GCCVERSION = "arm-12.2"
+    GCCVERSION = "arm-11.3"
@@ -5,7 +5,7 @@ distro: poky

 defaults:
  repos:
-    refspec: mickledore
+    refspec: langdale

 repos:
  meta-arm:
@@ -35,9 +35,8 @@ local_conf_header:
    PACKAGECONFIG:append:pn-perf = " coresight"
    INHERIT += "rm_work"
    DISTRO_FEATURES:remove = "ptest"
-  extrapackages: |
-    CORE_IMAGE_EXTRA_INSTALL += "perf opencsd"
-    CORE_IMAGE_EXTRA_INSTALL:append:aarch64 = " gator-daemon"
+  perf: |
+    CORE_IMAGE_EXTRA_INSTALL += "perf"

 machine: unset

@@ -4,10 +4,16 @@ header:
 repos:
  meta-clang:
    url: https://github.com/kraj/meta-clang
+    patches:
+      pixman:
+        repo: meta-arm
+        path: ci/0001-Revert-pixman-Do-not-use-clang-assembler-for-now.patch

 local_conf_header:
-  toolchain: |
+  clang: |
    TOOLCHAIN = "clang"
-    # This is needed to stop bitbake getting confused about what clang/llvm is
-    # being used, see https://github.com/kraj/meta-clang/pull/766
-    BBMASK += "/meta/recipes-devtools/llvm/llvm.*\.bb"
+    # Backport d89e06ad94a46f6810d0a8787004b71b8ecaf87d to langdale
+    OBJCOPY:pn-linux-yocto:toolchain-clang = "${HOST_PREFIX}objcopy"
+    # Perf needs fixes backported, use GCC for now
+    # https://lore.kernel.org/linux-perf-users/Y5d4k7fDxfRP7hcN@kernel.org/T/#t
+    TOOLCHAIN:pn-perf = "gcc"
@@ -3,12 +3,13 @@ header:
  includes:
    - ci/base.yml
    - ci/meta-openembedded.yml
-    - ci/poky-tiny.yml

 local_conf_header:
-    extrapackages: |
+    perf: |
    # Intentionally blank to prevent perf from being added to the image in base.yml

+distro: poky-tiny
+
 target:
  - corstone1000-image
  - perf
@@ -2,11 +2,11 @@ header:
  version: 11
  includes:
    - ci/corstone1000-common.yml
-    - ci/fvp.yml

 local_conf_header:
    fvp-config: |
        # Remove Dropbear SSH as it will not fit into the corstone1000 image.
        IMAGE_FEATURES:remove = " ssh-server-dropbear"
+        INHERIT += "fvpboot"

 machine: corstone1000-fvp
@@ -2,11 +2,18 @@ header:
  version: 11
  includes:
    - ci/base.yml
-    - ci/fvp.yml
-    - ci/poky-tiny.yml

 local_conf_header:
-  fvp-config: |
+  testimagefvp: |
+    INHERIT += "fvpboot"
    IMAGE_FEATURES:remove = " ssh-server-dropbear"
+  perf: |
+    # Intentionally blank to prevent perf from being added to the image in base.yml

 machine: corstone500
+
+distro: poky-tiny
+
+target:
+  - core-image-minimal
+  - perf
@@ -1,11 +1,18 @@
 header:
  version: 11
+  includes:
+    - ci/base.yml
+
+machine: fvp-base-arm32

 local_conf_header:
  testimagefvp: |
-    INHERIT += "fvpboot"
+    INHERIT = "fvpboot"
    # This fails but we can't add to the ignorelist from meta-arm yet
    # https://bugzilla.yoctoproject.org/show_bug.cgi?id=14604
    TEST_SUITES:remove = "parselogs"
+    # Tell testimage to connect to localhost:8122, and forward that to SSH in the FVP.
+    TEST_TARGET_IP = "127.0.0.1:8122"
+    FVP_CONFIG[bp.virtio_net.hostbridge.userNetPorts] = "8122=22"
  failing_tests: |
    TEST_SUITES:remove = "xorg"
@@ -2,6 +2,17 @@ header:
  version: 11
  includes:
    - ci/base.yml
-    - ci/fvp.yml

 machine: fvp-base
+
+local_conf_header:
+  testimagefvp: |
+    INHERIT += "fvpboot"
+    # This fails but we can't add to the ignorelist from meta-arm yet
+    # https://bugzilla.yoctoproject.org/show_bug.cgi?id=14604
+    TEST_SUITES:remove = "parselogs"
+    # Tell testimage to connect to localhost:8022, and forward that to SSH in the FVP.
+    TEST_TARGET_IP = "localhost:8022"
+    FVP_CONFIG[bp.virtio_net.hostbridge.userNetPorts] ?= "8022=22"
+  failing_tests: |
+    TEST_SUITES:remove = "xorg"
@@ -13,8 +13,7 @@ local_conf_header:

 target:
  - nativesdk-fvp-base-a-aem
-  - nativesdk-fvp-corstone500
-  - nativesdk-fvp-corstone1000
  - nativesdk-fvp-n1-edge
  - nativesdk-fvp-sgi575
-  - nativesdk-fvp-tc1
+  - nativesdk-fvp-corstone500
+  - nativesdk-fvp-corstone1000
@@ -1,7 +0,0 @@
-header:
-  version: 11
-
-#NOTE: This is the default for poky.  This is only being added for completeness/clarity
-local_conf_header:
-  toolchain: |
-    TOOLCHAIN = "gcc"
@@ -0,0 +1,16 @@
+header:
+  version: 11
+  includes:
+    - ci/base.yml
+    - ci/meta-openembedded.yml
+
+repos:
+  meta-arm:
+    layers:
+      meta-gem5:
+
+machine: gem5-arm64
+
+target:
+  - core-image-minimal
+  - gem5-aarch64-native
@@ -0,0 +1,15 @@
+header:
+  version: 11
+  includes:
+    - ci/gem5-arm64.yml
+
+repos:
+  meta-arm:
+    layers:
+      meta-atp:
+
+machine: gem5-atp-arm64
+
+target:
+  - atp-native
+  - core-image-minimal
@@ -1,9 +1,8 @@
 #!/bin/bash
-set -u -e
+set -u

-BASENAME=arm-gnu-toolchain
-VER=${VER:-12.2.rel1}
-HOST_ARCH=${HOST_ARCH:-$(uname -m)}
+HOST_ARCH=$(uname -m)
+VER="11.3.rel1"

 DOWNLOAD_DIR=$1
 TOOLCHAIN_DIR=$2
@@ -12,39 +11,36 @@ TOOLCHAIN_LINK_DIR=$3
 # These should be already created by .gitlab-ci.yml, but do here if run outside of that env
 mkdir -p $DOWNLOAD_DIR $TOOLCHAIN_DIR $TOOLCHAIN_LINK_DIR

-download() {
-	TRIPLE=$1
-	URL=https://developer.arm.com/-/media/Files/downloads/gnu/$VER/binrel/$BASENAME-$VER-$HOST_ARCH-$TRIPLE.tar.xz
-	wget -P $DOWNLOAD_DIR -nc $URL
-}
-
 if [ $HOST_ARCH = "aarch64" ]; then
-	# AArch64 Linux hosted cross compilers
+	#AArch64 Linux hosted cross compilers

-	# AArch32 target with hard float
-	download arm-none-linux-gnueabihf
+	#AArch32 target with hard float (arm-none-linux-gnueabihf)
+	wget -P $DOWNLOAD_DIR -nc https://developer.arm.com/-/media/Files/downloads/gnu/$VER/binrel/arm-gnu-toolchain-$VER-$HOST_ARCH-arm-none-linux-gnueabihf.tar.xz
 elif [ $HOST_ARCH = "x86_64" ]; then
-	# x86_64 Linux hosted cross compilers
+	#x86_64 Linux hosted cross compilers

-	# AArch32 target with hard float
-	download arm-none-linux-gnueabihf
+	#AArch32 target with hard float (arm-linux-none-gnueabihf)
+	wget -P $DOWNLOAD_DIR -nc https://developer.arm.com/-/media/Files/downloads/gnu/$VER/binrel/arm-gnu-toolchain-$VER-$HOST_ARCH-arm-none-linux-gnueabihf.tar.xz

-	# AArch64 GNU/Linux target
-	download aarch64-none-linux-gnu
+	#AArch64 GNU/Linux target (aarch64-none-linux-gnu)
+	wget -P $DOWNLOAD_DIR -nc https://developer.arm.com/-/media/Files/downloads/gnu/$VER/binrel/arm-gnu-toolchain-$VER-$HOST_ARCH-aarch64-none-linux-gnu.tar.xz
+
+	#AArch64 GNU/Linux target (aarch64_be-none-linux-gnu)
+	wget -P $DOWNLOAD_DIR -nc https://developer.arm.com/-/media/Files/downloads/gnu/$VER/binrel/arm-gnu-toolchain-$VER-$HOST_ARCH-aarch64_be-none-linux-gnu.tar.xz
 else
 	echo "ERROR - Unknown build arch of $HOST_ARCH"
 	exit 1
 fi

-for i in arm aarch64; do
-	if [ ! -d $TOOLCHAIN_DIR/$BASENAME-$VER-$HOST_ARCH-$i-none-linux-gnu*/ ]; then
-		if [ ! -f $DOWNLOAD_DIR/$BASENAME-$VER-$HOST_ARCH-$i-none-linux-gnu*.tar.xz ]; then
+for i in arm aarch64 aarch64_be; do
+	if [ ! -d $TOOLCHAIN_DIR/arm-gnu-toolchain-$VER-$HOST_ARCH-$i-none-linux-gnu*/ ]; then
+		if [ ! -f $DOWNLOAD_DIR/arm-gnu-toolchain-$VER-$HOST_ARCH-$i-none-linux-gnu*.tar.xz ]; then
 			continue
 		fi

-		tar -C $TOOLCHAIN_DIR -axvf $DOWNLOAD_DIR/$BASENAME-$VER-$HOST_ARCH-$i-none-linux-gnu*.tar.xz
+		tar -C $TOOLCHAIN_DIR -axvf $DOWNLOAD_DIR/arm-gnu-toolchain-$VER-$HOST_ARCH-$i-none-linux-gnu*.tar.xz
 	fi

 	# Setup a link for the toolchain to use local to the building machine (e.g., not in a shared location)
-	ln -s $TOOLCHAIN_DIR/$BASENAME-$VER-$HOST_ARCH-$i-none-linux-gnu* $TOOLCHAIN_LINK_DIR/$i
+	ln -s $TOOLCHAIN_DIR/arm-gnu-toolchain-$VER-$HOST_ARCH-$i-none-linux-gnu* $TOOLCHAIN_LINK_DIR/$i
 done
@@ -1,7 +0,0 @@
-header:
-  version: 11
-
-#NOTE: This is the default for poky.  This is only being added for completeness/clarity
-local_conf_header:
-  libc: |
-    TCLIBC = "glibc"
@@ -18,7 +18,7 @@ for i in $(echo $1 | cut -s -d ':' -f 2 | sed 's/[][,]//g'); do
 	# defaults, we can simply ignore those parameters.  They are necessary
 	# to pass in so that matrix can correctly setup all of the permutations
 	# of each individual run.
-	if [[ $i == 'none' ]]; then
+	if [[ $i == 'none' || $i == 'gcc' || $i == 'glibc' || $i == 'uboot' ]]; then
 		continue
 	fi
 	FILES+=":ci/$i.yml"
@@ -1,6 +0,0 @@
-header:
-  version: 9
-
-local_conf_header:
-  kernel: |
-    PREFERRED_PROVIDER_virtual/kernel = "linux-yocto-dev"
@@ -1,6 +0,0 @@
-header:
-  version: 9
-
-local_conf_header:
-  kernel: |
-    PREFERRED_PROVIDER_virtual/kernel = "linux-yocto-rt"
@@ -1,7 +0,0 @@
-header:
-  version: 9
-
-#NOTE: This is the default for poky.  This is only being added for completeness/clarity
-local_conf_header:
-  kernel: |
-    PREFERRED_PROVIDER_virtual/kernel = "linux-yocto"
@@ -6,4 +6,3 @@ header:
 repos:
  meta-virtualization:
    url: git://git.yoctoproject.org/meta-virtualization
-    refspec: master
@@ -1,14 +0,0 @@
-header:
-  version: 9
-
-distro: poky-tiny
-
-local_conf_header:
-  hacking: |
-    TEST_SUITES = "ping"
-  extrapackages: |
-    # Intentionally blank to prevent perf from being added to the image in base.yml
-
-target:
-  - core-image-minimal
-  - perf
@@ -1,4 +0,0 @@
-header:
-  version: 9
-
-distro: poky
@@ -2,11 +2,8 @@ header:
  version: 11
  includes:
    - ci/base.yml
-    - ci/fvp.yml
-    - ci/meta-openembedded.yml

 machine: tc1

 target:
-  - core-image-minimal
-  - trusted-firmware-m
+  - tc-artifacts-image
@@ -1,8 +0,0 @@
-header:
-  version: 11
-
-local_conf_header:
-  bootfirmware: |
-    PREFERRED_PROVIDER_virtual/bootloader = "u-boot"
-    TFA_UBOOT = "1"
-    TFA_UEFI = "0"
@@ -4,7 +4,6 @@

 import sys
 import os
-import shutil
 import subprocess
 import pathlib

@@ -35,14 +34,9 @@ if __name__ == "__main__":

    for repo in repositories:
        repodir = base_repodir / repo_shortname(repo)
-
-        if "CI_CLEAN_REPOS" in os.environ:
-            print("Cleaning %s..." % repo)
-            shutil.rmtree(repodir, ignore_errors=True)
-
        if repodir.exists():
            print("Updating %s..." % repo)
-            subprocess.run(["git", "-C", repodir, "-c", "gc.autoDetach=false", "fetch"], check=True)
+            subprocess.run(["git", "-C", repodir, "fetch"], check=True)
        else:
            print("Cloning %s..." % repo)
            subprocess.run(["git", "clone", "--bare", repo, repodir], check=True)
@@ -5,7 +5,7 @@ distro: poky-tiny

 defaults:
  repos:
-    refspec: master
+    refspec: langdale

 repos:
  meta-arm:
@@ -16,6 +16,7 @@ repos:

  poky:
    url: https://git.yoctoproject.org/git/poky
+    refspec: 79434a17eb4835e85fcd477baec08c8ce49a4c14
    layers:
      meta:
      meta-poky:
@@ -23,6 +24,7 @@ repos:

  meta-openembedded:
    url: https://git.openembedded.org/meta-openembedded
+    refspec: c5668905a6d8a78fb72c2cbf8b20e91e686ceb86
    layers:
      meta-oe:
      meta-python:
@@ -5,7 +5,7 @@ distro: poky-tiny

 defaults:
  repos:
-    refspec: master
+    refspec: langdale

 repos:
  meta-arm:
@@ -16,7 +16,6 @@ repos:

  poky:
    url: https://git.yoctoproject.org/git/poky
-    refspec: master
    layers:
      meta:
      meta-poky:
@@ -24,7 +23,6 @@ repos:

  meta-openembedded:
    url: https://git.openembedded.org/meta-openembedded
-    refspec: master
    layers:
      meta-oe:
      meta-python:
@@ -6,7 +6,7 @@ machine: fvp-baser-aemv8r64

 defaults:
  repos:
-    refspec: master
+    refspec: langdale

 repos:
  meta-arm:
@@ -1,7 +1,7 @@
 # This class removes the empty partition table header
 # in the WIC file when --no-table WKS option is used

-IMAGE_TYPES:append = " wic.nopt"
+IMAGE_TYPES += "wic.nopt"

 CONVERSIONTYPES += "nopt"

@@ -9,7 +9,7 @@ BBFILE_COLLECTIONS += "meta-arm-bsp"
 BBFILE_PATTERN_meta-arm-bsp = "^${LAYERDIR}/"
 BBFILE_PRIORITY_meta-arm-bsp = "5"

-LAYERSERIES_COMPAT_meta-arm-bsp = "mickledore"
+LAYERSERIES_COMPAT_meta-arm-bsp = "langdale"

 LAYERDEPENDS_meta-arm-bsp = "core meta-arm"
 # This won't be used by layerindex-fetch, but works everywhere else
@@ -29,10 +29,9 @@ FVP_CONFIG[board.se_flash_size] ?= "8192"
 FVP_CONFIG[diagnostics] ?= "4"
 FVP_CONFIG[disable_visualisation] ?= "true"
 FVP_CONFIG[se.nvm.update_raw_image] ?= "0"
-FVP_CONFIG[se.cryptocell.USER_OTP_FILTERING_DISABLE] ?= "1"

 # Boot image
-FVP_DATA ?= "board.flash0=${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.wic@0x68000000"
+FVP_DATA ?= "board.flash0=${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.wic.nopt@0x68100000"

 # External system (cortex-M3)
 FVP_CONFIG[extsys_harness0.extsys_flashloader.fname] ?= "${DEPLOY_DIR_IMAGE}/es_flashfw.bin"
@@ -12,7 +12,7 @@ require conf/machine/include/arm/armv7a/tune-cortexa5.inc
 # apply.
 #
 PREFERRED_PROVIDER_virtual/kernel:forcevariable = "linux-yocto"
-PREFERRED_VERSION_linux-yocto ?= "6.1%"
+PREFERRED_VERSION_linux-yocto ?= "5.19%"

 EXTRA_IMAGEDEPENDS += "trusted-firmware-a u-boot"

@@ -26,7 +26,7 @@ SERIAL_CONSOLES = "115200;ttyAMA0"
 UBOOT_MACHINE = "corstone500_defconfig"
 UBOOT_IMAGE_ENTRYPOINT = "0x84000000"
 UBOOT_IMAGE_LOADADDRESS = "0x84000000"
-PREFERRED_VERSION_u-boot ?= "2023.01"
+PREFERRED_VERSION_u-boot ?= "2022.07"

 # making sure EXTRA_IMAGEDEPENDS will be used while creating the image
 WKS_FILE_DEPENDS:append = " ${EXTRA_IMAGEDEPENDS}"
@@ -43,6 +43,3 @@ FVP_DATA ?= "css.cluster.cpu0=${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.wic.nopt@
 FVP_CONSOLE ?= "terminal_0"
 FVP_TERMINALS[css.terminal_0] ?= "console"
 FVP_TERMINALS[css.terminal_1] ?= ""
-
-# Disable openssl in kmod to shink the initramfs size
-PACKAGECONFIG:remove:pn-kmod = "openssl"
@@ -0,0 +1,23 @@
+# Configuration for Armv7-A Base Platform FVP
+
+#@TYPE: Machine
+#@NAME: Armv7-A Base Platform FVP machine
+#@DESCRIPTION: Machine configuration for Armv7-A Base Platform FVP model
+
+require conf/machine/include/fvp-common.inc
+require conf/machine/include/arm/arch-armv7a.inc
+
+# FVP u-boot configuration
+PREFERRED_VERSION_u-boot ?= "2022.04"
+UBOOT_MACHINE = "vexpress_aemv8a_aarch32_defconfig"
+
+KERNEL_IMAGETYPE = "zImage"
+
+FVP_CONFIG[cluster0.cpu0.CONFIG64] = "0"
+FVP_CONFIG[cluster0.cpu1.CONFIG64] = "0"
+FVP_CONFIG[cluster0.cpu2.CONFIG64] = "0"
+FVP_CONFIG[cluster0.cpu3.CONFIG64] = "0"
+FVP_CONFIG[cluster1.cpu0.CONFIG64] = "0"
+FVP_CONFIG[cluster1.cpu1.CONFIG64] = "0"
+FVP_CONFIG[cluster1.cpu2.CONFIG64] = "0"
+FVP_CONFIG[cluster1.cpu3.CONFIG64] = "0"
@@ -9,7 +9,7 @@ require conf/machine/include/arm/arch-armv8a.inc

 TUNE_FEATURES = "aarch64"

-PREFERRED_VERSION_u-boot ?= "2023.01"
+PREFERRED_VERSION_u-boot ?= "2022.04"

 # FVP u-boot configuration
 UBOOT_MACHINE = "vexpress_aemv8a_semi_defconfig"
@@ -9,7 +9,7 @@ require conf/machine/include/arm/armv8r/arch-armv8r64.inc
 EXTRA_IMAGEDEPENDS += "boot-wrapper-aarch64"

 PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto"
-PREFERRED_VERSION_u-boot ?= "2022.10"
+PREFERRED_VERSION_u-boot ?= "2022.07"

 KERNEL_IMAGETYPE = "Image"
 KERNEL_DEVICETREE = "arm/fvp-baser-aemv8r64.dtb"
@@ -25,7 +25,9 @@ EFI_PROVIDER ?= "grub-efi"
 MACHINE_FEATURES:append = " efi"

 # As this is a virtual target that will not be used in the real world there is
-# no need for real SSH keys.
+# no need for real SSH keys.  Disable rng-tools (which takes too long to
+# initialise) and install the pre-generated keys.
+PACKAGECONFIG:remove:pn-openssh = "rng-tools"
 MACHINE_EXTRA_RRECOMMENDS += "ssh-pregen-hostkeys"

 # testimage configuration
@@ -22,7 +22,7 @@ TFM_SIGN_PRIVATE_KEY = "${libdir}/tfm-scripts/root-RSA-3072_1.pem"
 RE_IMAGE_OFFSET = "0x1000"

 # u-boot
-PREFERRED_VERSION_u-boot ?= "2023.01"
+PREFERRED_VERSION_u-boot ?= "2022.07"
 EXTRA_IMAGEDEPENDS += "u-boot"

 UBOOT_CONFIG ??= "EFI"
@@ -34,7 +34,7 @@ UBOOT_ARCH = "arm"
 UBOOT_EXTLINUX = "0"

 #optee
-PREFERRED_VERSION_optee-os ?= "3.20.%"
+PREFERRED_VERSION_optee-os ?= "3.18.%"
 PREFERRED_VERSION_optee-client ?= "3.18.%"
 EXTRA_IMAGEDEPENDS += "optee-os"
 OPTEE_ARCH = "arm64"
@@ -49,7 +49,7 @@ EXTRA_IMAGEDEPENDS += "external-system"

 # Linux kernel
 PREFERRED_PROVIDER_virtual/kernel:forcevariable = "linux-yocto"
-PREFERRED_VERSION_linux-yocto = "6.1%"
+PREFERRED_VERSION_linux-yocto = "5.19%"
 KERNEL_IMAGETYPE = "Image.gz"

 INITRAMFS_IMAGE_BUNDLE ?= "1"
@@ -73,6 +73,3 @@ SERIAL_CONSOLES ?= "115200;ttyAMA0"
 WKS_FILE_DEPENDS:append = " ${EXTRA_IMAGEDEPENDS}"

 WKS_FILE ?= "corstone1000-image.corstone1000.wks"
-
-# Disable openssl in kmod to shink the initramfs size
-PACKAGECONFIG:remove:pn-kmod = "openssl"
@@ -16,22 +16,21 @@ PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto"

 KERNEL_DEVICETREE = "arm/fvp-base-revc.dtb"

-EXTRA_IMAGEDEPENDS += "trusted-firmware-a"
+EXTRA_IMAGEDEPENDS += "trusted-firmware-a u-boot"

 # As this is a virtual target that will not be used in the real world there is
-# no need for real SSH keys.
+# no need for real SSH keys.  Disable rng-tools (which takes too long to
+# initialise) and install the pre-generated keys.
+PACKAGECONFIG:remove:pn-openssh = "rng-tools"
 MACHINE_EXTRA_RRECOMMENDS += "ssh-pregen-hostkeys"

 TEST_TARGET = "OEFVPTarget"
-TEST_TARGET_IP = "127.0.0.1:8022"

 FVP_PROVIDER ?= "fvp-base-a-aem-native"
 FVP_EXE ?= "FVP_Base_RevC-2xAEMvA"
 FVP_CONFIG[bp.ve_sysregs.exit_on_shutdown] ?= "1"
 FVP_CONFIG[bp.virtio_net.enabled] ?= "1"
 FVP_CONFIG[bp.virtio_net.hostbridge.userNetworking] ?= "1"
-# Tell testimage to connect to localhost:8022, and forward that to SSH in the FVP.
-FVP_CONFIG[bp.virtio_net.hostbridge.userNetPorts] = "8022=22"
 FVP_CONFIG[cache_state_modelled] ?= "0"
 FVP_CONFIG[bp.secureflashloader.fname] ?= "${DEPLOY_DIR_IMAGE}/bl1-fvp.bin"
 FVP_CONFIG[bp.flashloader0.fname] ?= "${DEPLOY_DIR_IMAGE}/fip-fvp.bin"
@@ -11,6 +11,16 @@ UBOOT_RD_LOADADDRESS = "0x88000000"
 UBOOT_RD_ENTRYPOINT = "0x88000000"
 UBOOT_LOADADDRESS = "0x80080000"
 UBOOT_ENTRYPOINT = "0x80080000"
+# Below options will generate a key to sign the kernel Image and INITRAMFS_IMAGE
+# according to the default parameters of kernel-fitimage.bbclass. If the user
+# would prefer to use their own keys, disable the key generation using the
+# FIT_GENERATE_KEYS parameter and specify the location of the keys using the
+# below paramters.
+UBOOT_SIGN_ENABLE = "1"
+UBOOT_MKIMAGE_DTCOPTS = "-I dts -O dtb"
+UBOOT_SIGN_KEYNAME = "dev_key"
+UBOOT_SIGN_KEYDIR = "${DEPLOY_DIR_IMAGE}/keys"
+FIT_GENERATE_KEYS = "1"

 PREFERRED_PROVIDER_virtual/kernel ?= "linux-arm64-ack"

@@ -28,8 +38,3 @@ IMAGE_FSTYPES += "cpio.gz"
 INITRAMFS_IMAGE ?= "core-image-minimal"

 SERIAL_CONSOLES = "115200;ttyAMA0"
-
-EXTRA_IMAGEDEPENDS += "trusted-firmware-a optee-os"
-# FIXME - there is signed image dependency/race with testimage.
-# This should be fixed in oe-core
-TESTIMAGEDEPENDS:append = " virtual/kernel:do_deploy"
@@ -18,6 +18,7 @@ IMAGE_FSTYPES += "tar.bz2 ext4 cpio.gz"
 SERIAL_CONSOLES = "115200;ttyAMA0"

 PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto"
+PREFERRED_VERSION_u-boot ?= "2022.04"
 PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot"

 EXTRA_IMAGEDEPENDS += "trusted-firmware-a virtual/bootloader firmware-image-juno"
@@ -20,4 +20,4 @@ QB_GRAPHICS = "-nographic -vga none"
 QB_MEM = "512k"
 QB_RNG = ""

-TFM_PLATFORM = "arm/musca_b1"
+TFM_PLATFORM = "arm/musca_b1/sse_200"
@@ -19,7 +19,7 @@ WKS_FILE_DEPENDS:append = " ${EXTRA_IMAGEDEPENDS}"

 # Use kernel provided by yocto
 PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto"
-PREFERRED_VERSION_linux-yocto ?= "6.1%"
+PREFERRED_VERSION_linux-yocto ?= "5.19%"

 # RTL8168E Gigabit Ethernet Controller is attached to the PCIe interface
 MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "linux-firmware-rtl8168"
@@ -29,10 +29,9 @@ EXTRA_IMAGEDEPENDS += "virtual/control-processor-firmware"

 #UEFI EDK2 firmware
 EXTRA_IMAGEDEPENDS += "edk2-firmware"
-PREFERRED_VERSION_edk2-firmware ?= "202211"

 #optee
-PREFERRED_VERSION_optee-os ?= "3.20.%"
+PREFERRED_VERSION_optee-os ?= "3.18.%"

 #grub-efi
 EFI_PROVIDER ?= "grub-efi"
@@ -5,27 +5,3 @@
 #@DESCRIPTION: Machine configuration for TC1

 require conf/machine/include/tc.inc
-
-TEST_TARGET = "OEFVPSerialTarget"
-TEST_SUITES = "linuxboot"
-
-# FVP Config
-FVP_PROVIDER ?= "fvp-tc1-native"
-FVP_EXE ?= "FVP_TC1"
-
-# FVP Parameters
-FVP_CONFIG[css.scp.ROMloader.fname] ?= "${DEPLOY_DIR_IMAGE}/scp_romfw.bin"
-FVP_CONFIG[css.trustedBootROMloader.fname] ?= "${DEPLOY_DIR_IMAGE}/bl1-tc.bin"
-FVP_CONFIG[board.flashloader0.fname] ?= "${DEPLOY_DIR_IMAGE}/fip_gpt-tc.bin"
-
-#FVP_CONFIG[board.hostbridge.userNetworking] ?= "true"
-#FVP_CONFIG[board.hostbridge.userNetPorts] ?= "8022=22"
-#smsc ethernet takes a very long time to come up.  disable now to prevent testimage timeout
-#FVP_CONFIG[board.smsc_91c111.enabled] ?= "1"
-
-FVP_CONSOLE = "terminal_s1"
-FVP_TERMINALS[soc.terminal_s0] ?= "Secure Console"
-FVP_TERMINALS[soc.terminal_s1] ?= "Console"
-
-# Boot image
-FVP_DATA ?= "board.dram=${DEPLOY_DIR_IMAGE}/fitImage-core-image-minimal-tc1-tc1@0x20000000"
@@ -0,0 +1,61 @@
+# Armv7-A Base Platform FVP Support in meta-arm-bsp
+
+## How to build and run
+
+### Configuration:
+In the local.conf file, MACHINE should be set as follows:
+MACHINE ?= "fvp-base-arm32"
+
+### Build:
+```bash$ bitbake core-image-minimal```
+
+### Run:
+To Run the Fixed Virtual Platform simulation tool you must download "Armv8-A
+Base Platform FVP" from Arm developer (This might require the user to
+register) from this address:
+https://developer.arm.com/tools-and-software/simulation-models/fixed-virtual-platforms
+and install it on your host PC.
+
+Fast Models Fixed Virtual Platforms (FVP) Reference Guide:
+https://developer.arm.com/docs/100966/latest
+
+Armv8‑A Foundation Platform User Guide:
+https://developer.arm.com/docs/100961/latest/
+
+
+Once done, do the following to build and run an image:
+```bash$ bitbake core-image-minimal```
+```bash$ export YOCTO_DEPLOY_IMGS_DIR="<yocto-build-dir/tmp/deploy/images/fvp-base-arm32>"```
+```bash$ cd <path-to-Base_RevC_AEMv8A_pkg-dir/models/Linux64_GCC-X.X/>```
+```
+bash$ ./FVP_Base_RevC-2xAEMv8A -C bp.virtio_net.enabled=1 \
+         -C cache_state_modelled=0 \
+         -C bp.secureflashloader.fname=${YOCTO_DEPLOY_IMGS_DIR}/bl1-fvp.bin \
+         -C bp.flashloader0.fname=${YOCTO_DEPLOY_IMGS_DIR}/fip-fvp.bin \
+         --data cluster0.cpu0=${YOCTO_DEPLOY_IMGS_DIR}/Image@0x80080000 \
+         -C bp.virtioblockdevice.image_path=${YOCTO_DEPLOY_IMGS_DIR}/core-image-minimal-fvp-base-arm32.wic \
+         -C cluster0.cpu0.CONFIG64=0 \
+         -C cluster0.cpu1.CONFIG64=0 \
+         -C cluster0.cpu2.CONFIG64=0 \
+         -C cluster0.cpu3.CONFIG64=0 \
+         -C cluster1.cpu0.CONFIG64=0 \
+         -C cluster1.cpu1.CONFIG64=0 \
+         -C cluster1.cpu2.CONFIG64=0 \
+         -C cluster1.cpu3.CONFIG64=0 \
+
+```
+
+
+If you have built a configuration without a ramdisk, you can use the following
+command in U-boot to start Linux:
+```fvp32# bootz 0x80080000 - 0x82000000```
+
+## Devices supported in the kernel
+- serial
+- virtio disk
+- network
+- watchdog
+- rtc
+
+## Devices not supported or not functional
+None
@@ -3,22 +3,45 @@
 ## Howto Build and Run

 ### Configuration:
-In the local.conf file, `MACHINE` should be set:
-```
-MACHINE = "fvp-base"
-```
+In the local.conf file, MACHINE should be set as follow:
+MACHINE ?= "fvp-base"

 ### Build:
-```
-$ bitbake core-image-base
-```
+```bash$ bitbake core-image-minimal```

 ### Run:
-The `fvp-base` machine has support for the `runfvp` script, so running is simple:
+To Run the Fixed Virtual Platform simulation tool you must download "Armv8-A
+Base Platform FVP" from Arm developer (This might require the user to
+register) from this address:
+https://developer.arm.com/tools-and-software/simulation-models/fixed-virtual-platforms
+and install it on your host PC.

+Fast Models Fixed Virtual Platforms (FVP) Reference Guide:
+https://developer.arm.com/docs/100966/latest
+
+Armv8‑A Foundation Platform User Guide:
+https://developer.arm.com/docs/100961/latest/
+
+
+Once done, do the following to build and run an image:
+```bash$ bitbake core-image-minimal```
+```bash$ export YOCTO_DEPLOY_IMGS_DIR="<yocto-build-dir/tmp/deploy/images/fvp-base>"```
+```bash$ cd <path-to-Base_RevC_AEMv8A_pkg-dir/models/Linux64_GCC-X.X/>```
 ```
-$ runfvp tmp/deploy/images/fvp-base/core-image-base-fvp-base.fvpconf
+bash$ ./FVP_Base_RevC-2xAEMv8A -C bp.virtio_net.enabled=1 \
+         -C cache_state_modelled=0 \
+         -C bp.secureflashloader.fname=${YOCTO_DEPLOY_IMGS_DIR}/bl1-fvp.bin \
+         -C bp.flashloader0.fname=${YOCTO_DEPLOY_IMGS_DIR}/fip-fvp.bin \
+         --data cluster0.cpu0=${YOCTO_DEPLOY_IMGS_DIR}/Image@0x80080000 \
+         --data cluster0.cpu0=${YOCTO_DEPLOY_IMGS_DIR}/fvp-base-gicv3-psci-custom.dtb@0x83000000 \
+         -C bp.virtioblockdevice.image_path=${YOCTO_DEPLOY_IMGS_DIR}/core-image-minimal-fvp-base.wic
 ```
+
+
+If you have built a configuration without a ramdisk, you can use the following
+command in U-boot to start Linux:
+```VExpress64# booti 0x80080000 - 0x83000000```
+
 ## Devices supported in the kernel
 - serial
 - virtio disk
@@ -1,4 +1,4 @@
-From 545f6950ae4dc55b4974986aa9629adb16eaf4e1 Mon Sep 17 00:00:00 2001
+From 3e7cfbe39a2a053d2a6b0d928cc172ed9d1c6da8 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 25 May 2021 07:25:00 +0100
 Subject: [PATCH] aarch64: Rename labels and prepare for lower EL booting
@@ -18,10 +18,10 @@ Signed-off-by: Jaxson Han <jaxson.han@arm.com>
 3 files changed, 27 insertions(+), 14 deletions(-)

 diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index d682ba5..fab694e 100644
+index 27ba449..84e1646 100644
 --- a/arch/aarch64/boot.S
 +++ b/arch/aarch64/boot.S
-@@ -34,18 +34,30 @@ ASM_FUNC(_start)
+@@ -21,18 +21,30 @@ ASM_FUNC(_start)
 
 	/*
 	 * EL3 initialisation
@@ -56,7 +56,7 @@ index d682ba5..fab694e 100644
 	orr	x0, x0, #(1 << 0)		// Non-secure EL1
 	orr	x0, x0, #(1 << 8)		// HVC enable
 
-@@ -145,7 +157,7 @@ ASM_FUNC(_start)
+@@ -124,7 +136,7 @@ ASM_FUNC(_start)
 
 	bl	gic_secure_init
 
@@ -65,7 +65,7 @@ index d682ba5..fab694e 100644
 
 err_invalid_id:
 	b	.
-@@ -172,7 +184,7 @@ ASM_FUNC(jump_kernel)
+@@ -151,7 +163,7 @@ ASM_FUNC(jump_kernel)
 	bl	find_logical_id
 	bl	setup_stack		// Reset stack pointer
 
@@ -74,7 +74,7 @@ index d682ba5..fab694e 100644
 	cmp	w0, #0			// Prepare Z flag
 
 	mov	x0, x20
-@@ -181,7 +193,7 @@ ASM_FUNC(jump_kernel)
+@@ -160,7 +172,7 @@ ASM_FUNC(jump_kernel)
 	mov	x3, x23
 
 	b.eq	1f
@@ -83,7 +83,7 @@ index d682ba5..fab694e 100644
 
 1:	mov	x4, #SPSR_KERNEL
 
-@@ -199,5 +211,5 @@ ASM_FUNC(jump_kernel)
+@@ -178,5 +190,5 @@ ASM_FUNC(jump_kernel)
 
 	.data
 	.align 3
@@ -1,4 +1,4 @@
-From bad32d3fc127a421be416b17e4f7d6d514f06abb Mon Sep 17 00:00:00 2001
+From 26f9b5354c2de9cc052531096ff92b04c3a3846f Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 25 May 2021 07:25:00 +0100
 Subject: [PATCH] aarch64: Prepare for EL1 booting
@@ -15,10 +15,10 @@ Reviewed-by: Andre Przywara <andre.przywara@arm.com>
 2 files changed, 6 insertions(+), 1 deletion(-)

 diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index fab694e..5105b41 100644
+index 84e1646..b589744 100644
 --- a/arch/aarch64/boot.S
 +++ b/arch/aarch64/boot.S
-@@ -177,10 +177,14 @@ ASM_FUNC(jump_kernel)
+@@ -156,10 +156,14 @@ ASM_FUNC(jump_kernel)
 	ldr	x0, =SCTLR_EL1_KERNEL
 	msr	sctlr_el1, x0
 
@@ -35,7 +35,7 @@ index fab694e..5105b41 100644
 	bl	setup_stack		// Reset stack pointer
 
 diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h
-index 49d3f86..3767da3 100644
+index 63eb1c3..b1003f4 100644
 --- a/arch/aarch64/include/asm/cpu.h
 +++ b/arch/aarch64/include/asm/cpu.h
@@ -11,6 +11,7 @@
@@ -1,4 +1,4 @@
-From 252cbd36e51414b60ab68306f9c38e358709494d Mon Sep 17 00:00:00 2001
+From ce628de7699dd6401ddf713efaa49872e2733619 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 25 May 2021 07:25:00 +0100
 Subject: [PATCH] aarch64: Prepare for lower EL booting
@@ -17,11 +17,11 @@ Reviewed-by: Andre Przywara <andre.przywara@arm.com>
 1 file changed, 13 insertions(+), 2 deletions(-)

 diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index 5105b41..243198d 100644
+index b589744..6b45afc 100644
 --- a/arch/aarch64/boot.S
 +++ b/arch/aarch64/boot.S
-@@ -151,7 +151,16 @@ el3_init:
- 	mov	x0, #ZCR_EL3_LEN_MAX		// SVE: Enable full vector len
+@@ -130,7 +130,16 @@ el3_init:
+ 	mov	x0, #ZCR_EL3_LEN_MASK		// SVE: Enable full vector len
 	msr	ZCR_EL3, x0			// for EL2.
 
 -1:
@@ -38,7 +38,7 @@ index 5105b41..243198d 100644
 	ldr	x0, =COUNTER_FREQ
 	msr	cntfrq_el0, x0
 
-@@ -199,7 +208,7 @@ ASM_FUNC(jump_kernel)
+@@ -178,7 +187,7 @@ ASM_FUNC(jump_kernel)
 	b.eq	1f
 	br	x19			// Keep current EL
 
@@ -47,7 +47,7 @@ index 5105b41..243198d 100644
 
 	/*
 	 * If bit 0 of the kernel address is set, we're entering in AArch32
-@@ -217,3 +226,5 @@ ASM_FUNC(jump_kernel)
+@@ -196,3 +205,5 @@ ASM_FUNC(jump_kernel)
 	.align 3
 flag_keep_el:
 	.long 0
@@ -1,4 +1,4 @@
-From bff110a95a5e4c9db2d61e629b4aa4b84530201e Mon Sep 17 00:00:00 2001
+From 483d363bf825082b6db6de3c57d169e741861891 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 25 May 2021 07:25:00 +0100
 Subject: [PATCH] gic-v3: Prepare for gicv3 with EL2
@@ -1,4 +1,4 @@
-From ba955efb35ce1d41b562190d7c2fbcbcf8ef97ff Mon Sep 17 00:00:00 2001
+From be814863cdd5f61d9a16eec012d500550053c8c6 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 25 May 2021 07:25:00 +0100
 Subject: [PATCH] aarch64: Prepare for booting with EL2
@@ -15,10 +15,10 @@ Reviewed-by: Andre Przywara <andre.przywara@arm.com>
 2 files changed, 17 insertions(+), 1 deletion(-)

 diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index 243198d..3593ca5 100644
+index 6b45afc..908764a 100644
 --- a/arch/aarch64/boot.S
 +++ b/arch/aarch64/boot.S
-@@ -216,10 +216,18 @@ ASM_FUNC(jump_kernel)
+@@ -195,10 +195,18 @@ ASM_FUNC(jump_kernel)
 	 */
 	bfi	x4, x19, #5, #1
 
@@ -1,4 +1,4 @@
-From 8e44fac113d935affed1550480631f3fe7f30584 Mon Sep 17 00:00:00 2001
+From 81df76f8d94cb6c31c01739b078a72bdb8497441 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 25 May 2021 07:25:00 +0100
 Subject: [PATCH] aarch64: Introduce EL2 boot code for Armv8-R AArch64
@@ -36,10 +36,10 @@ Signed-off-by: Jaxson Han <jaxson.han@arm.com>
 2 files changed, 92 insertions(+), 2 deletions(-)

 diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index 3593ca5..a219ea7 100644
+index 908764a..def9192 100644
 --- a/arch/aarch64/boot.S
 +++ b/arch/aarch64/boot.S
-@@ -37,16 +37,24 @@ ASM_FUNC(_start)
+@@ -24,16 +24,24 @@ ASM_FUNC(_start)
 	 * Boot sequence
 	 * If CurrentEL == EL3, then goto EL3 initialisation and drop to
 	 *   lower EL before entering the kernel.
@@ -66,7 +66,7 @@ index 3593ca5..a219ea7 100644
 	mov	w0, #1
 	ldr	x1, =flag_keep_el
 	str	w0, [x1]
-@@ -160,6 +168,85 @@ el3_init:
+@@ -139,6 +147,85 @@ el3_init:
 	str	w0, [x1]
 	b	el_max_init
 
@@ -152,7 +152,7 @@ index 3593ca5..a219ea7 100644
 el_max_init:
 	ldr	x0, =COUNTER_FREQ
 	msr	cntfrq_el0, x0
-@@ -169,6 +256,7 @@ el_max_init:
+@@ -148,6 +235,7 @@ el_max_init:
 	b	start_el_max
 
 err_invalid_id:
@@ -161,7 +161,7 @@ index 3593ca5..a219ea7 100644
 
 	/*
 diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h
-index 3767da3..3c0e00d 100644
+index b1003f4..91f803c 100644
 --- a/arch/aarch64/include/asm/cpu.h
 +++ b/arch/aarch64/include/asm/cpu.h
@@ -25,6 +25,7 @@
@@ -172,7 +172,7 @@ index 3767da3..3c0e00d 100644
 #define SPSR_EL2H		(9 << 0)	/* EL2 Handler mode */
 #define SPSR_HYP		(0x1a << 0)	/* M[3:0] = hyp, M[4] = AArch32 */
 
-@@ -50,6 +51,7 @@
+@@ -43,6 +44,7 @@
 #else
 #define SCTLR_EL1_KERNEL	SCTLR_EL1_RES1
 #define SPSR_KERNEL		(SPSR_A | SPSR_D | SPSR_I | SPSR_F | SPSR_EL2H)
@@ -1,4 +1,4 @@
-From 0b9a966b8a28961b078215ee7169e32a976d5e7d Mon Sep 17 00:00:00 2001
+From f5a31b4f4ea8daaa0d337d5a2322ddb1912083fc Mon Sep 17 00:00:00 2001
 From: Qi Feng <qi.feng@arm.com>
 Date: Wed, 26 May 2021 17:52:01 +0800
 Subject: [PATCH] Allow --enable-psci to choose between smc and hvc
@@ -40,7 +40,7 @@ Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
 2 files changed, 14 insertions(+), 10 deletions(-)

 diff --git a/Makefile.am b/Makefile.am
-index 5731a19..fc66662 100644
+index f941b07..88a27de 100644
 --- a/Makefile.am
 +++ b/Makefile.am
@@ -50,11 +50,11 @@ endif
@@ -1,4 +1,4 @@
-From 521c121eccb386aca7c75d92528e495546adccec Mon Sep 17 00:00:00 2001
+From 3f4614e02f0f8d2522510578da2752f8e3511bb3 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Mon, 25 Oct 2021 17:09:13 +0800
 Subject: [PATCH] aarch64: Disable CNTPCT_EL0 trap for v8-R64
@@ -24,10 +24,10 @@ Change-Id: I4147e66341c8153312021e6f2ab67d0037246da1
 1 file changed, 12 insertions(+)

 diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index a219ea7..27b1139 100644
+index def9192..6dbd5cc 100644
 --- a/arch/aarch64/boot.S
 +++ b/arch/aarch64/boot.S
-@@ -240,6 +240,18 @@ el2_init:
+@@ -219,6 +219,18 @@ el2_init:
 	orr	x0, x0, #(1 << 41)		// HCR_EL2.API
 
 1:	msr	hcr_el2, x0
@@ -1,4 +1,4 @@
-From 780df234d98db81485b1f351f902a68def35c9d4 Mon Sep 17 00:00:00 2001
+From 2851f0e6c1216894b9498d7b91256bb1ef49e544 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 2 Nov 2021 15:10:28 +0800
 Subject: [PATCH] lds: Mark the mem range
@@ -1,4 +1,4 @@
-From b3762b6c5a56bf594bc5cb63d145e8efd86e106e Mon Sep 17 00:00:00 2001
+From fadf04f44b679d85e55b2e5f220fecbebb52ad03 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 28 Dec 2021 17:02:17 +0800
 Subject: [PATCH] common: Introduce the libfdt
@@ -1,4 +1,4 @@
-From e2eff4f80e65cb3fcbe6345b5376a6bf7de7e2cc Mon Sep 17 00:00:00 2001
+From 0f2c7ca446063be6b193fbf870d38c0af19e15c5 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 28 Dec 2021 17:28:25 +0800
 Subject: [PATCH] common: Add essential libc functions
@@ -1,4 +1,4 @@
-From f4d5cf4c3424598a2b3bb391717313b70c79ea28 Mon Sep 17 00:00:00 2001
+From de5d2b6c200ae5dd8113751e58bf7cf5844eec5a Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 28 Dec 2021 17:42:48 +0800
 Subject: [PATCH] Makefile: Add the libfdt to the Makefile system
@@ -17,7 +17,7 @@ Change-Id: I472bc28cdc5cde3b22461a4b7d7a3752ae382b4b
 1 file changed, 9 insertions(+), 2 deletions(-)

 diff --git a/Makefile.am b/Makefile.am
-index fc66662..ab2c3a9 100644
+index 88a27de..5e8668a 100644
 --- a/Makefile.am
 +++ b/Makefile.am
@@ -36,6 +36,9 @@ PSCI_CPU_OFF	:= 0x84000002
@@ -30,10 +30,10 @@ index fc66662..ab2c3a9 100644
 ARCH_OBJ	:= boot.o stack.o utils.o
 
 if BOOTWRAPPER_32
-@@ -127,11 +130,12 @@ CFLAGS		+= -I$(top_srcdir)/include/ -I$(top_srcdir)/$(ARCH_SRC)/include/
+@@ -125,11 +128,12 @@ CHOSEN_NODE	:= chosen {						\
+ CPPFLAGS	+= $(INITRD_FLAGS)
+ CFLAGS		+= -I$(top_srcdir)/include/ -I$(top_srcdir)/$(ARCH_SRC)/include/
 CFLAGS		+= -Wall -fomit-frame-pointer
- CFLAGS		+= -ffreestanding -nostdlib
- CFLAGS		+= -fno-stack-protector
 +CFLAGS 		+= -fno-stack-protector
 CFLAGS		+= -ffunction-sections -fdata-sections
 CFLAGS		+= -fno-pic -fno-pie
@@ -44,7 +44,7 @@ index fc66662..ab2c3a9 100644
 
 # Don't lookup all prerequisites in $(top_srcdir), only the source files. When
 # building outside the source tree $(ARCH_SRC) needs to be created.
-@@ -152,10 +156,13 @@ $(ARCH_SRC):
+@@ -150,10 +154,13 @@ $(ARCH_SRC):
 $(COMMON_SRC):
 	$(MKDIR_P) $@
 
@@ -1,4 +1,4 @@
-From f0ece5e8cac761a76a86df7204bae7c6ef09215f Mon Sep 17 00:00:00 2001
+From 5b8cb5192dbd0332e027e8999c3afe4433983291 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Wed, 29 Dec 2021 10:50:21 +0800
 Subject: [PATCH] platform: Add print_hex func
@@ -1,4 +1,4 @@
-From f4704146e1af9f6e0a2220db6b39a328c813fac1 Mon Sep 17 00:00:00 2001
+From b447242cd2457bec20d47fe6a8a5758d97a3bde3 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Wed, 19 Jan 2022 16:19:02 +0800
 Subject: [PATCH] common: Add mem usage to /memreserve/
@@ -20,7 +20,7 @@ Change-Id: I2ea80cdf736a910fa2c3deb622e21d50f04be960
 create mode 100644 common/device_tree.c

 diff --git a/Makefile.am b/Makefile.am
-index ab2c3a9..e905602 100644
+index 5e8668a..734de92 100644
 --- a/Makefile.am
 +++ b/Makefile.am
@@ -34,7 +34,7 @@ endif
@@ -1,4 +1,4 @@
-From 5995f83592aea874f5b423538e36675e2204582b Mon Sep 17 00:00:00 2001
+From 8271c21bcff260295203214b7b8c87cdb8236453 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 4 Jan 2022 17:01:55 +0800
 Subject: [PATCH] boot: Add the --enable-keep-el compile option
@@ -23,7 +23,7 @@ Change-Id: I3ba9c87cf0b59d163ca433f74c9e3a46e5ca2c63
 4 files changed, 20 insertions(+), 1 deletion(-)

 diff --git a/Makefile.am b/Makefile.am
-index e905602..6604baa 100644
+index 734de92..054becd 100644
 --- a/Makefile.am
 +++ b/Makefile.am
@@ -33,6 +33,10 @@ PSCI_CPU_ON	:= 0xc4000003
@@ -38,10 +38,10 @@ index e905602..6604baa 100644
 COMMON_OBJ	:= boot.o bakery_lock.o platform.o lib.o device_tree.o
 
 diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index 27b1139..c079d22 100644
+index 6dbd5cc..157c097 100644
 --- a/arch/aarch64/boot.S
 +++ b/arch/aarch64/boot.S
-@@ -254,7 +254,11 @@ el2_init:
+@@ -233,7 +233,11 @@ el2_init:
 	msr	cnthctl_el2, x0
 	isb
 
@@ -53,7 +53,7 @@ index 27b1139..c079d22 100644
 	ldr	x1, =spsr_to_elx
 	str	w0, [x1]
 	// fall through
-@@ -334,5 +338,5 @@ ASM_FUNC(jump_kernel)
+@@ -313,5 +317,5 @@ ASM_FUNC(jump_kernel)
 	.align 3
 flag_keep_el:
 	.long 0
@@ -1,4 +1,4 @@
-From 0c0695cd3160ccdb95bae29b7668918015c0b6aa Mon Sep 17 00:00:00 2001
+From dd3e3f414d0e6ed1643c2e2ccac676b7fc1dc7a9 Mon Sep 17 00:00:00 2001
 From: Peter Hoyes <Peter.Hoyes@arm.com>
 Date: Tue, 1 Feb 2022 11:28:46 +0000
 Subject: [PATCH] Makefile: Change COUNTER_FREQ to 100 MHz
@@ -17,7 +17,7 @@ Change-Id: Ia9ad0f8ee488d1a887791f1fa1d8f3bf9c5887fd
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/Makefile.am b/Makefile.am
-index 6604baa..cc6504e 100644
+index 40bc5d6..b48173c 100644
 --- a/Makefile.am
 +++ b/Makefile.am
@@ -13,7 +13,7 @@ SCRIPT_DIR	:= $(top_srcdir)/scripts
@@ -29,3 +29,6 @@ index 6604baa..cc6504e 100644
 
 CPU_IDS		:= $(shell perl -I $(SCRIPT_DIR) $(SCRIPT_DIR)/findcpuids.pl $(KERNEL_DTB))
 NR_CPUS         := $(shell echo $(CPU_IDS) | tr ',' ' ' | wc -w)
+-- 
+2.25.1
+
@@ -1,4 +1,4 @@
-From fa73d885be85eee4369b292ec601e7b024a68807 Mon Sep 17 00:00:00 2001
+From 6923f2a0c59cf92ba5ad50ec1d658a357b4ba5d7 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 2 Nov 2021 10:48:39 +0800
 Subject: [PATCH] PSCI: Apply flush cache after setting branch_data
@@ -47,3 +47,6 @@ index 945780b..6efc695 100644
 	return PSCI_RET_SUCCESS;
 }
 
+-- 
+2.25.1
+
@@ -1,4 +1,4 @@
-From 9da48e3433b919868650cd60e28827273a42c63b Mon Sep 17 00:00:00 2001
+From ed46e83df2400b1b3f3364169aacf787bd91bd45 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 25 Jan 2022 14:56:36 +0800
 Subject: [PATCH] PSCI: Add function call entry point
@@ -69,3 +69,6 @@ index 6efc695..8fdefb5 100644
 void __noreturn psci_first_spin(unsigned int cpu)
 {
 	if (cpu == MPIDR_INVALID)
+-- 
+2.25.1
+
@@ -1,4 +1,4 @@
-From 7c5e40d9f8699a55ac2187c035429c643e6d0ef0 Mon Sep 17 00:00:00 2001
+From 36b5fa3f4db49ac7aef42ff1d58a895226c7e96c Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Tue, 2 Nov 2021 15:10:28 +0800
 Subject: [PATCH] lds: Rearrange and mark the sections
@@ -56,3 +56,6 @@ index ab98ddf..85451f9 100644
 	PROVIDE(firmware_end = .);
 
 	ASSERT(etext <= (PHYS_OFFSET + TEXT_LIMIT), ".text overflow!")
+-- 
+2.25.1
+
@@ -1,4 +1,4 @@
-From 3c1140c29c39561848056fb4b9a03042b00279f3 Mon Sep 17 00:00:00 2001
+From 8bdbb64d13f14d40546b71dbcfee2b2a8ea002a5 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Wed, 29 Dec 2021 15:17:38 +0800
 Subject: [PATCH] common: Provide firmware info using libfdt
@@ -340,3 +340,6 @@ index 4d0876c..7f7befc 100644
 +
 +	dt_dump_all(fw_node);
 +}
+-- 
+2.25.1
+
@@ -1,4 +1,4 @@
-From b1105e862e8f770fc195bc20e9c64d231dd32f66 Mon Sep 17 00:00:00 2001
+From 6dfc937d1ae54d2ae9f8c60ca29ba73ca14dc8c4 Mon Sep 17 00:00:00 2001
 From: Jaxson Han <jaxson.han@arm.com>
 Date: Wed, 29 Dec 2021 15:33:17 +0800
 Subject: [PATCH] boot: Enable firmware node initialization
@@ -29,7 +29,7 @@ Change-Id: Ib274485a34d26215595fd0cd737be86610289817
 3 files changed, 12 insertions(+), 2 deletions(-)

 diff --git a/Makefile.am b/Makefile.am
-index cc6504e..fbe6b81 100644
+index 054becd..b01809c 100644
 --- a/Makefile.am
 +++ b/Makefile.am
@@ -23,7 +23,7 @@ DEFINES		+= -DCPU_IDS=$(CPU_IDS)
@@ -41,20 +41,20 @@ index cc6504e..fbe6b81 100644
 
 if KERNEL_32
 DEFINES		+= -DKERNEL_32
-@@ -134,7 +134,7 @@ CFLAGS		+= -I$(top_srcdir)/include/ -I$(top_srcdir)/$(ARCH_SRC)/include/
+@@ -132,7 +132,7 @@ CHOSEN_NODE	:= chosen {						\
+ CPPFLAGS	+= $(INITRD_FLAGS)
+ CFLAGS		+= -I$(top_srcdir)/include/ -I$(top_srcdir)/$(ARCH_SRC)/include/
 CFLAGS		+= -Wall -fomit-frame-pointer
- CFLAGS		+= -ffreestanding -nostdlib
- CFLAGS		+= -fno-stack-protector
 -CFLAGS 		+= -fno-stack-protector
 +CFLAGS 		+= -fno-stack-protector -fno-builtin
 CFLAGS		+= -ffunction-sections -fdata-sections
 CFLAGS		+= -fno-pic -fno-pie
 LDFLAGS		+= --gc-sections
 diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index c079d22..daaa674 100644
+index 157c097..f310387 100644
 --- a/arch/aarch64/boot.S
 +++ b/arch/aarch64/boot.S
-@@ -261,6 +261,10 @@ el2_init:
+@@ -240,6 +240,10 @@ el2_init:
 #endif
 	ldr	x1, =spsr_to_elx
 	str	w0, [x1]
@@ -65,7 +65,7 @@ index c079d22..daaa674 100644
 	// fall through
 
 el_max_init:
-@@ -340,3 +344,5 @@ flag_keep_el:
+@@ -319,3 +323,5 @@ flag_keep_el:
 	.long 0
 ASM_DATA(spsr_to_elx)
 	.long 0
@@ -93,3 +93,6 @@ index ee2bea0..38b2dca 100644
 
 		*mbox = (unsigned long)&entrypoint;
 		sevl();
+-- 
+2.25.1
+
@@ -1,7 +1,7 @@
-From f526797b83113cc64e3e658c22d8a5d269896a2a Mon Sep 17 00:00:00 2001
+From c8bd941579fb062359b683b184b851eea2ddb761 Mon Sep 17 00:00:00 2001
 From: Ben Horgan <ben.horgan@arm.com>
 Date: Fri, 4 Mar 2022 16:48:14 +0000
-Subject: [PATCH] feat: emulate cntp timer register accesses using cnthps
+Subject: [PATCH 1/5] feat: emulate cntp timer register accesses using cnthps

 Upstream-Status: Inappropriate [Experimental feature]
 Signed-off-by: Ben Horgan <ben.horgan@arm.com>
@@ -19,10 +19,10 @@ Change-Id: I67508203273baf3bd8e6be2d99717028db945715
 create mode 100644 src/arch/aarch64/hypervisor/timer_el1.h

 diff --git a/Makefile b/Makefile
-index 95cab9a5..21cca938 100644
+index c9fb16f..6371a8a 100644
 --- a/Makefile
 +++ b/Makefile
-@@ -60,7 +60,8 @@ CHECKPATCH := $(CURDIR)/third_party/linux/scripts/checkpatch.pl \
+@@ -59,7 +59,8 @@ CHECKPATCH := $(CURDIR)/third_party/linux/scripts/checkpatch.pl \
 # debug_el1.c : uses XMACROS, which checkpatch doesn't understand.
 # perfmon.c : uses XMACROS, which checkpatch doesn't understand.
 # feature_id.c : uses XMACROS, which checkpatch doesn't understand.
@@ -33,7 +33,7 @@ index 95cab9a5..21cca938 100644
 OUT ?= out/$(PROJECT)
 OUT_DIR = out/$(PROJECT)
 diff --git a/src/arch/aarch64/hypervisor/BUILD.gn b/src/arch/aarch64/hypervisor/BUILD.gn
-index 6068d1e8..de1a414d 100644
+index 6068d1e..de1a414 100644
 --- a/src/arch/aarch64/hypervisor/BUILD.gn
 +++ b/src/arch/aarch64/hypervisor/BUILD.gn
@@ -45,6 +45,7 @@ source_set("hypervisor") {
@@ -45,10 +45,10 @@ index 6068d1e8..de1a414d 100644
   ]
 
 diff --git a/src/arch/aarch64/hypervisor/cpu.c b/src/arch/aarch64/hypervisor/cpu.c
-index bcf5ffce..d2df77d8 100644
+index c6cebdd..cb41e6e 100644
 --- a/src/arch/aarch64/hypervisor/cpu.c
 +++ b/src/arch/aarch64/hypervisor/cpu.c
-@@ -98,13 +98,20 @@ void arch_regs_reset(struct vcpu *vcpu)
+@@ -91,13 +91,20 @@ void arch_regs_reset(struct vcpu *vcpu)
 	if (is_primary) {
 		/*
 		 * cnthctl_el2 is redefined when VHE is enabled.
@@ -72,7 +72,7 @@ index bcf5ffce..d2df77d8 100644
 	}
 
 diff --git a/src/arch/aarch64/hypervisor/handler.c b/src/arch/aarch64/hypervisor/handler.c
-index 4bd8a3b4..4c1b6e48 100644
+index cd64d68..c9068c5 100644
 --- a/src/arch/aarch64/hypervisor/handler.c
 +++ b/src/arch/aarch64/hypervisor/handler.c
@@ -34,6 +34,7 @@
@@ -83,7 +83,7 @@ index 4bd8a3b4..4c1b6e48 100644
 
 /**
  * Hypervisor Fault Address Register Non-Secure.
-@@ -1277,6 +1278,11 @@ void handle_system_register_access(uintreg_t esr_el2)
+@@ -1276,6 +1277,11 @@ void handle_system_register_access(uintreg_t esr_el2)
 			inject_el1_unknown_exception(vcpu, esr_el2);
 			return;
 		}
@@ -97,7 +97,7 @@ index 4bd8a3b4..4c1b6e48 100644
 		return;
 diff --git a/src/arch/aarch64/hypervisor/timer_el1.c b/src/arch/aarch64/hypervisor/timer_el1.c
 new file mode 100644
-index 00000000..c30e5543
+index 0000000..c30e554
 --- /dev/null
 +++ b/src/arch/aarch64/hypervisor/timer_el1.c
@@ -0,0 +1,104 @@
@@ -207,7 +207,7 @@ index 00000000..c30e5543
 +}
 diff --git a/src/arch/aarch64/hypervisor/timer_el1.h b/src/arch/aarch64/hypervisor/timer_el1.h
 new file mode 100644
-index 00000000..04a43b6c
+index 0000000..04a43b6
 --- /dev/null
 +++ b/src/arch/aarch64/hypervisor/timer_el1.h
@@ -0,0 +1,20 @@
@@ -232,7 +232,7 @@ index 00000000..04a43b6c
 +bool timer_el1_process_access(struct vcpu *vcpu, ffa_vm_id_t vm_id,
 +			      uintreg_t esr);
 diff --git a/src/arch/aarch64/msr.h b/src/arch/aarch64/msr.h
-index cd6778b4..55e78330 100644
+index cd6778b..55e7833 100644
 --- a/src/arch/aarch64/msr.h
 +++ b/src/arch/aarch64/msr.h
@@ -126,3 +126,11 @@
@@ -247,4 +247,6 @@ index cd6778b4..55e78330 100644
 +#define MSR_CNTHPS_CTL_EL2 S3_4_C14_C5_1
 +#define MSR_CNTHPS_CVAL_EL2 S3_4_C14_C5_2
 +#define MSR_CNTHPS_TVAL_EL2 S3_4_C14_C5_0
+-- 
+2.17.1

@@ -1,7 +1,7 @@
-From 97a8ca1835f5d9512dacda497540d5523e56c7dd Mon Sep 17 00:00:00 2001
+From 380f2cf944dd5db36c168a11d31a46ad14cdcb6d Mon Sep 17 00:00:00 2001
 From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
 Date: Tue, 26 Apr 2022 14:43:58 +0100
-Subject: [PATCH] feat: emulate interrupt controller register access
+Subject: [PATCH 4/5] feat: emulate interrupt controller register access

 This emulates ICC_SGI1R_EL1 and ICC_IGRPEN1_EL1 register

@@ -16,10 +16,10 @@ Upstream-Status: Inappropriate [Experimental feature]
 4 files changed, 97 insertions(+)

 diff --git a/src/arch/aarch64/hypervisor/handler.c b/src/arch/aarch64/hypervisor/handler.c
-index 4c1b6e48..cd5146bd 100644
+index c9068c5..b9aa5d8 100644
 --- a/src/arch/aarch64/hypervisor/handler.c
 +++ b/src/arch/aarch64/hypervisor/handler.c
-@@ -1283,6 +1283,11 @@ void handle_system_register_access(uintreg_t esr_el2)
+@@ -1282,6 +1282,11 @@ void handle_system_register_access(uintreg_t esr_el2)
 			inject_el1_unknown_exception(vcpu, esr_el2);
 			return;
 		}
@@ -32,7 +32,7 @@ index 4c1b6e48..cd5146bd 100644
 		inject_el1_unknown_exception(vcpu, esr_el2);
 		return;
 diff --git a/src/arch/aarch64/hypervisor/perfmon.c b/src/arch/aarch64/hypervisor/perfmon.c
-index f13b0354..05e216c8 100644
+index f13b035..05e216c 100644
 --- a/src/arch/aarch64/hypervisor/perfmon.c
 +++ b/src/arch/aarch64/hypervisor/perfmon.c
@@ -116,6 +116,10 @@
@@ -131,7 +131,7 @@ index f13b0354..05e216c8 100644
 +	return true;
 +}
 diff --git a/src/arch/aarch64/hypervisor/perfmon.h b/src/arch/aarch64/hypervisor/perfmon.h
-index 81669ba1..c90d45bf 100644
+index 81669ba..c90d45b 100644
 --- a/src/arch/aarch64/hypervisor/perfmon.h
 +++ b/src/arch/aarch64/hypervisor/perfmon.h
@@ -70,3 +70,8 @@ bool perfmon_process_access(struct vcpu *vcpu, ffa_vm_id_t vm_id,
@@ -144,7 +144,7 @@ index 81669ba1..c90d45bf 100644
 +bool intr_ctrl_el1_process_access(struct vcpu *vcpu, ffa_vm_id_t vm_id,
 +				  uintreg_t esr);
 diff --git a/src/arch/aarch64/msr.h b/src/arch/aarch64/msr.h
-index 55e78330..82aa8846 100644
+index 55e7833..82aa884 100644
 --- a/src/arch/aarch64/msr.h
 +++ b/src/arch/aarch64/msr.h
@@ -134,3 +134,6 @@
@@ -154,4 +154,6 @@ index 55e78330..82aa8846 100644
 +
 +#define ICC_IGRPEN1_EL1 S3_0_C12_C12_7
 +#define ICC_SGI1R_EL1 S3_0_C12_C11_5
+-- 
+2.17.1

@@ -1,4 +1,4 @@
-From 613dea068fa546956717ce0b60328e39d451f661 Mon Sep 17 00:00:00 2001
+From e918cc5179241e1d35ba4b465b035b74b88e55d2 Mon Sep 17 00:00:00 2001
 From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
 Date: Fri, 29 Apr 2022 20:07:50 +0100
 Subject: [PATCH] tc: increase heap pages
@@ -6,14 +6,14 @@ Subject: [PATCH] tc: increase heap pages
 Upstream-Status: Pending
 Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
 ---
- BUILD.gn | 2 +-
+ /BUILD.gn | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-diff --git a/BUILD.gn b/BUILD.gn
-index 6b9b383..62ba763 100644
--- a/BUILD.gn
-+++ b/BUILD.gn
-@@ -235,7 +235,7 @@ aarch64_toolchains("secure_tc") {
+diff --git a//BUILD.gn b//BUILD.gn
+index 5d84d13..4ea0890 100644
+--- a//BUILD.gn
+++ b//BUILD.gn
+@@ -233,7 +233,7 @@ aarch64_toolchains("secure_tc") {
   gicd_base_address = "0x30000000"
   gicr_base_address = "0x30080000"
   gicr_frames = 8
@@ -1,4 +1,4 @@
-From 1c4d28493faed6cf189c75fa91d19131e6a34e04 Mon Sep 17 00:00:00 2001
+From 1e24b45a8ff34af45dda45c57f8403452d384f99 Mon Sep 17 00:00:00 2001
 From: Olivier Deprez <olivier.deprez@arm.com>
 Date: Mon, 8 Aug 2022 19:14:23 +0200
 Subject: [PATCH] feat: disable alignment check for EL0 partitions
@@ -40,7 +40,7 @@ Upstream-Status: Submitted [https://review.trustedfirmware.org/c/hafnium/hafnium
 8 files changed, 59 insertions(+), 30 deletions(-)

 diff --git a/src/arch/aarch64/hypervisor/cpu.c b/src/arch/aarch64/hypervisor/cpu.c
-index d2df77d8..a000159b 100644
+index d2df77d..a000159 100644
 --- a/src/arch/aarch64/hypervisor/cpu.c
 +++ b/src/arch/aarch64/hypervisor/cpu.c
@@ -115,7 +115,9 @@ void arch_regs_reset(struct vcpu *vcpu)
@@ -69,7 +69,7 @@ index d2df77d8..a000159b 100644
 		r->lazy.vttbr_el2 = pa_addr(table) | ((uint64_t)vm_id << 48);
 #if SECURE_WORLD == 1
 diff --git a/src/arch/aarch64/hypervisor/exceptions.S b/src/arch/aarch64/hypervisor/exceptions.S
-index 539e196d..d3732f86 100644
+index 539e196..d3732f8 100644
 --- a/src/arch/aarch64/hypervisor/exceptions.S
 +++ b/src/arch/aarch64/hypervisor/exceptions.S
@@ -20,6 +20,9 @@
@@ -147,7 +147,7 @@ index 539e196d..d3732f86 100644
 	ret
 #endif
 diff --git a/src/arch/aarch64/hypervisor/feature_id.c b/src/arch/aarch64/hypervisor/feature_id.c
-index ed3bf8f1..57f32627 100644
+index ed3bf8f..57f3262 100644
 --- a/src/arch/aarch64/hypervisor/feature_id.c
 +++ b/src/arch/aarch64/hypervisor/feature_id.c
@@ -175,7 +175,7 @@ void feature_set_traps(struct vm *vm, struct arch_regs *regs)
@@ -177,7 +177,7 @@ index ed3bf8f1..57f32627 100644
 		vm->arch.tid3_masks.id_aa64isar1_el1 &= ~ID_AA64ISAR1_EL1_GPI;
 		vm->arch.tid3_masks.id_aa64isar1_el1 &= ~ID_AA64ISAR1_EL1_GPA;
 diff --git a/src/arch/aarch64/hypervisor/handler.c b/src/arch/aarch64/hypervisor/handler.c
-index cd5146bd..8a3d6289 100644
+index cd5146b..8a3d628 100644
 --- a/src/arch/aarch64/hypervisor/handler.c
 +++ b/src/arch/aarch64/hypervisor/handler.c
@@ -272,9 +272,9 @@ noreturn void sync_current_exception_noreturn(uintreg_t elr, uintreg_t spsr)
@@ -241,7 +241,7 @@ index cd5146bd..8a3d6289 100644
 
 #if SECURE_WORLD == 1
 diff --git a/src/arch/aarch64/inc/hf/arch/types.h b/src/arch/aarch64/inc/hf/arch/types.h
-index 6379d73e..6b8b24f1 100644
+index 6379d73..6b8b24f 100644
 --- a/src/arch/aarch64/inc/hf/arch/types.h
 +++ b/src/arch/aarch64/inc/hf/arch/types.h
@@ -79,8 +79,13 @@ struct arch_regs {
@@ -261,7 +261,7 @@ index 6379d73e..6b8b24f1 100644
 	/*
 	 * System registers.
 diff --git a/src/arch/aarch64/mm.c b/src/arch/aarch64/mm.c
-index 8ee65ca0..487ae353 100644
+index 8ee65ca..487ae35 100644
 --- a/src/arch/aarch64/mm.c
 +++ b/src/arch/aarch64/mm.c
@@ -886,7 +886,7 @@ bool arch_mm_init(paddr_t table)
@@ -274,7 +274,7 @@ index 8ee65ca0..487ae353 100644
 			     (0 << 30) |	    /* SA. */
 			     (0 << 29) |	    /* SW. */
 diff --git a/src/arch/aarch64/sysregs.c b/src/arch/aarch64/sysregs.c
-index e8c154b1..087ba4ed 100644
+index e8c154b..087ba4e 100644
 --- a/src/arch/aarch64/sysregs.c
 +++ b/src/arch/aarch64/sysregs.c
@@ -159,7 +159,7 @@ uintreg_t get_cptr_el2_value(void)
@@ -303,7 +303,7 @@ index e8c154b1..087ba4ed 100644
 	sctlr_el2_value |= SCTLR_EL2_SA;
 	sctlr_el2_value |= SCTLR_EL2_I;
 diff --git a/src/arch/aarch64/sysregs.h b/src/arch/aarch64/sysregs.h
-index babd2375..6fdab58e 100644
+index babd237..6fdab58 100644
 --- a/src/arch/aarch64/sysregs.h
 +++ b/src/arch/aarch64/sysregs.h
@@ -668,7 +668,7 @@ uintreg_t get_mdcr_el2_value(void);
@@ -315,4 +315,6 @@ index babd2375..6fdab58e 100644
 
 /**
  * Branch Target Identification mechanism support in AArch64 state.
+-- 
+2.34.1

@@ -1,4 +1,4 @@
-From 4b59905d2fec01cc17038b1c167b4e57e7835adf Mon Sep 17 00:00:00 2001
+From 02c8afc4f7315b4e12098ffeb8bd5e64e4891e78 Mon Sep 17 00:00:00 2001
 From: Davidson K <davidson.kumaresan@arm.com>
 Date: Thu, 7 Oct 2021 12:20:08 +0530
 Subject: [PATCH] feat(vhe): set STAGE1_NS while mapping memory from NWd to SWd
@@ -17,7 +17,7 @@ Upstream-Status: Pending [Not submitted to upstream yet]
 1 file changed, 12 insertions(+)

 diff --git a/src/ffa_memory.c b/src/ffa_memory.c
-index 048cca9c..8910cc79 100644
+index 048cca9..8910cc7 100644
 --- a/src/ffa_memory.c
 +++ b/src/ffa_memory.c
@@ -2483,6 +2483,18 @@ struct ffa_value ffa_memory_retrieve(struct vm_locked to_locked,
@@ -39,3 +39,6 @@ index 048cca9c..8910cc79 100644
 	ret = ffa_retrieve_check_update(
 		to_locked, memory_region->sender, share_state->fragments,
 		share_state->fragment_constituent_counts,
+-- 
+2.34.1
+
@@ -1,4 +1,4 @@
-From 1fef5bd2504ce3a203c56a3b66dba773cd4893c6 Mon Sep 17 00:00:00 2001
+From c235511a06a54bcccec97b3067c1004d3957b1d8 Mon Sep 17 00:00:00 2001
 From: Davidson K <davidson.kumaresan@arm.com>
 Date: Thu, 8 Sep 2022 10:47:10 +0530
 Subject: [PATCH] feat(vhe): enable vhe and disable branch protection for TC
@@ -29,3 +29,6 @@ index 62ba763..f26ce03 100644
 +    enable_vhe = "1"
   }
 }
+-- 
+2.34.1
+
@@ -9,15 +9,15 @@ PV = "2.7+git${SRCPV}"

 FILESEXTRAPATHS:prepend:tc := "${THISDIR}/files/tc:"

-SRC_URI:remove = "file://0003-Fix-build-with-clang-15.patch"
+SRC_URI:remove = "file://0001-Fix-build-with-clang-15.patch"

 SRC_URI:append = " \
        file://0001-feat-emulate-cntp-timer-register-accesses-using-cnth.patch \
        file://0002-feat-emulate-interrupt-controller-register-access.patch \
-        file://0003-feat-disable-alignment-check-for-EL0-partitions.patch \
-        file://0004-feat-vhe-set-STAGE1_NS-while-mapping-memory-from-NWd.patch \
-        file://0001-tc-increase-heap-pages.patch;patchdir=project/reference \
-        file://0002-feat-vhe-enable-vhe-and-disable-branch-protection-fo.patch;patchdir=project/reference \
+        file://0003-tc-increase-heap-pages.patch;patchdir=project/reference \
+        file://0004-feat-disable-alignment-check-for-EL0-partitions.patch \
+        file://0005-feat-vhe-set-STAGE1_NS-while-mapping-memory-from-NWd.patch \
+        file://0006-feat-vhe-enable-vhe-and-disable-branch-protection-fo.patch;patchdir=project/reference \
        "

 do_compile() {
@@ -6,16 +6,16 @@ LICENSE = "MIT"
 COMPATIBLE_MACHINE = "corstone1000"

 inherit image
-inherit tfm_sign_image
+inherit wic_nopt tfm_sign_image
 inherit  uefi_capsule

 PACKAGE_INSTALL = ""

-IMAGE_FSTYPES += "wic uefi_capsule"
+IMAGE_FSTYPES += "wic wic.nopt uefi_capsule"

 UEFI_FIRMWARE_BINARY = "${PN}-${MACHINE}.${CAPSULE_IMGTYPE}"
 UEFI_CAPSULE_CONFIG = "${THISDIR}/files/${PN}-capsule-update-image.json"
-CAPSULE_IMGTYPE = "wic"
+CAPSULE_IMGTYPE = "wic.nopt"

 do_sign_images() {
    # Sign TF-A BL2
@@ -24,8 +24,7 @@ do_sign_images() {

    # Update BL2 in the FIP image
    cp ${RECIPE_SYSROOT}/firmware/${TFA_FIP_BINARY} .
-    fiptool update --tb-fw \
-        ${TFM_IMAGE_SIGN_DEPLOY_DIR}/signed_${TFA_BL2_BINARY} \
+    fiptool update --tb-fw ${TFM_IMAGE_SIGN_DIR}/signed_${TFA_BL2_BINARY} \
        ${TFM_IMAGE_SIGN_DIR}/${TFA_FIP_BINARY}

    # Sign the FIP image
@@ -13,8 +13,7 @@ COMPATIBLE_MACHINE = "n1sdp"

 SRC_URI = "git://git.gitlab.arm.com/arm-reference-solutions/board-firmware.git;protocol=https;branch=n1sdp"

-SRCREV = "70ba494265eee76747faff38264860c19e214540"
-PV .= "+git${SRCPV}"
+SRCREV = "6d5253584a9c2fdc2edbdc39bf6f2436215d1382"

 S = "${WORKDIR}/git"

@@ -10,7 +10,7 @@ do_install:append() {
    for TYPE in ${FW_INSTALL}; do
        if [ "$TYPE" = "romfw_bypass" ]; then
            install -D "${B}/${TYPE}/${FW_TARGETS}/bin/${SCP_PLATFORM}-bl1-bypass.bin" "${D}/firmware/${FW}_${TYPE}.bin"
-            install -D "${B}/${TYPE}/${FW_TARGETS}/bin/${SCP_PLATFORM}-bl1-bypass.elf" "${D}/firmware/${FW}_${TYPE}.elf"
+            install -D "${B}/${TYPE}/${FW_TARGETS}/bin/${SCP_PLATFORM}-bl1-bypass" "${D}/firmware/${FW}_${TYPE}.elf"
        fi
    done
 }
@@ -3,6 +3,9 @@
 SCP_PLATFORM  = "n1sdp"
 SCP_LOG_LEVEL = "INFO"

+SRCREV  = "de7e464ecd77130147103cf48328099c2d0e6289"
+PV .= "+git${SRCPV}"
+
 COMPATIBLE_MACHINE:n1sdp = "n1sdp"

 DEPENDS += "fiptool-native"
@@ -1,167 +0,0 @@
-From 360aa32846a97e775750e06865d462c6258179fa Mon Sep 17 00:00:00 2001
-From: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
-Date: Mon, 9 Jan 2023 13:59:06 +0000
-Subject: [PATCH] feat(corstone1000): bl2 loads fip based on metadata
-
-Previously bl2 was reading the boot_index directly with a hard coded
-address and then set the fip image spec with fip offsets base based on
-the boot_index value.
-This commit removes this logic and rely on PSA_FWU_SUPPORT
-which reads the fip partition based on the active firmware bank written in
-metadata.
-
-Note: fip partition contains signature area at the begining. Hence, the fip
-image starts at fip partition + fip signature area size.
-
-Upstream-Status: Pending
-Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
-
-%% original patch: 0002-feat-corstone1000-bl2-loads-fip-based-on-metadata.patch
---
- bl2/bl2_main.c                                |  4 +++
- .../corstone1000/common/corstone1000_plat.c   | 32 ++++++-------------
- .../common/include/platform_def.h             | 12 +++----
- tools/cert_create/Makefile                    |  4 +--
- tools/fiptool/Makefile                        |  4 +--
- 5 files changed, 24 insertions(+), 32 deletions(-)
-
-diff --git a/bl2/bl2_main.c b/bl2/bl2_main.c
-index 5da803795..f25dc3029 100644
--- a/bl2/bl2_main.c
-+++ b/bl2/bl2_main.c
-@@ -86,6 +86,10 @@ void bl2_main(void)
- 	/* Perform remaining generic architectural setup in S-EL1 */
- 	bl2_arch_setup();
- 
-+#if ARM_GPT_SUPPORT
-+	partition_init(GPT_IMAGE_ID);
-+#endif
-+
- #if PSA_FWU_SUPPORT
- 	fwu_init();
- #endif /* PSA_FWU_SUPPORT */
-diff --git a/plat/arm/board/corstone1000/common/corstone1000_plat.c b/plat/arm/board/corstone1000/common/corstone1000_plat.c
-index 0235f8b84..7f9708a82 100644
--- a/plat/arm/board/corstone1000/common/corstone1000_plat.c
-+++ b/plat/arm/board/corstone1000/common/corstone1000_plat.c
-@@ -33,36 +33,17 @@ const mmap_region_t plat_arm_mmap[] = {
- static void set_fip_image_source(void)
- {
- 	const struct plat_io_policy *policy;
-	/*
-	 * metadata for firmware update is written at 0x0000 offset of the flash.
-	 * PLAT_ARM_BOOT_BANK_FLAG contains the boot bank that TF-M is booted.
-	 * As per firmware update spec, at a given point of time, only one bank
-	 * is active. This means, TF-A should boot from the same bank as TF-M.
-	 */
-	volatile uint32_t *boot_bank_flag = (uint32_t *)(PLAT_ARM_BOOT_BANK_FLAG);
-
-	if (*boot_bank_flag > 1) {
-		VERBOSE("Boot_bank is set higher than possible values");
-	}
-
-	VERBOSE("Boot bank flag = %u.\n\r", *boot_bank_flag);
- 
- 	policy = FCONF_GET_PROPERTY(arm, io_policies, FIP_IMAGE_ID);
- 
- 	assert(policy != NULL);
- 	assert(policy->image_spec != 0UL);
- 
-+	/* FIP Partition contains Signature area at the begining which TF-A doesn't expect */
- 	io_block_spec_t *spec = (io_block_spec_t *)policy->image_spec;
-+	spec->offset += FIP_SIGNATURE_AREA_SIZE;
-+	spec->length -= FIP_SIGNATURE_AREA_SIZE;
- 
-	if ((*boot_bank_flag) == 0) {
-		VERBOSE("Booting from bank 0: fip offset = 0x%lx\n\r",
-						PLAT_ARM_FIP_BASE_BANK0);
-		spec->offset = PLAT_ARM_FIP_BASE_BANK0;
-	} else {
-		VERBOSE("Booting from bank 1: fip offset = 0x%lx\n\r",
-						PLAT_ARM_FIP_BASE_BANK1);
-		spec->offset = PLAT_ARM_FIP_BASE_BANK1;
-	}
- }
- 
- void bl2_platform_setup(void)
-@@ -75,6 +56,13 @@ void bl2_platform_setup(void)
- 	set_fip_image_source();
- }
- 
-+void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1,
-+			       u_register_t arg2, u_register_t arg3)
-+{
-+	arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1);
-+	NOTICE("CS1k: early at bl2_platform_setup\n");
-+}
-+
- /* corstone1000 only has one always-on power domain and there
-  * is no power control present
-  */
-diff --git a/plat/arm/board/corstone1000/common/include/platform_def.h b/plat/arm/board/corstone1000/common/include/platform_def.h
-index 584d485f3..0bfab05a4 100644
--- a/plat/arm/board/corstone1000/common/include/platform_def.h
-+++ b/plat/arm/board/corstone1000/common/include/platform_def.h
-@@ -173,16 +173,16 @@
- 
- /* NOR Flash */
- 
-#define PLAT_ARM_BOOT_BANK_FLAG		UL(0x08002000)
-#define PLAT_ARM_FIP_BASE_BANK0		UL(0x081EF000)
-#define PLAT_ARM_FIP_BASE_BANK1		UL(0x0916F000)
-#define PLAT_ARM_FIP_MAX_SIZE		UL(0x1ff000)  /* 1.996 MB */
-
- #define PLAT_ARM_NVM_BASE		V2M_FLASH0_BASE
- #define PLAT_ARM_NVM_SIZE		(SZ_32M)  /* 32 MB */
-+#define PLAT_ARM_FIP_MAX_SIZE		UL(0x1ff000)  /* 1.996 MB */
- 
-#define PLAT_ARM_FLASH_IMAGE_BASE	PLAT_ARM_FIP_BASE_BANK0
-+#define PLAT_ARM_FLASH_IMAGE_BASE	UL(0x08000000)
- #define PLAT_ARM_FLASH_IMAGE_MAX_SIZE	PLAT_ARM_FIP_MAX_SIZE
-+#define PLAT_ARM_FIP_OFFSET_IN_GPT	(0x86000)
-+
-+/* FIP Information */
-+#define FIP_SIGNATURE_AREA_SIZE         (0x1000)      /* 4 KB */
- 
- /*
-  * Some data must be aligned on the biggest cache line size in the platform.
-diff --git a/tools/cert_create/Makefile b/tools/cert_create/Makefile
-index ca548b836..32b5486a0 100644
--- a/tools/cert_create/Makefile
-+++ b/tools/cert_create/Makefile
-@@ -69,8 +69,8 @@ INC_DIR += -I ./include -I ${PLAT_INCLUDE} -I ${OPENSSL_DIR}/include
- # directory. However, for a local build of OpenSSL, the built binaries are
- # located under the main project directory (i.e.: ${OPENSSL_DIR}, not
- # ${OPENSSL_DIR}/lib/).
-LIB_DIR := -L ${OPENSSL_DIR}/lib -L ${OPENSSL_DIR}
-LIB := -lssl -lcrypto
-+LIB_DIR := -L ${OPENSSL_DIR}/lib -L ${OPENSSL_DIR} ${BUILD_LDFLAGS} ${BUILD_LDFLAGS} ${BUILD_LDFLAGS} ${BUILD_LDFLAGS} ${BUILD_LDFLAGS} ${BUILD_LDFLAGS}
-+LIB := -lssl -lcrypto ${BUILD_LDFLAGS} ${BUILD_LDFLAGS} ${BUILD_LDFLAGS} ${BUILD_LDFLAGS} ${BUILD_LDFLAGS} ${BUILD_LDFLAGS}
- 
- HOSTCC ?= gcc
- 
-diff --git a/tools/fiptool/Makefile b/tools/fiptool/Makefile
-index e6aeba95b..7c047479e 100644
--- a/tools/fiptool/Makefile
-+++ b/tools/fiptool/Makefile
-@@ -29,7 +29,7 @@ endif
- # directory. However, for a local build of OpenSSL, the built binaries are
- # located under the main project directory (i.e.: ${OPENSSL_DIR}, not
- # ${OPENSSL_DIR}/lib/).
-LDLIBS := -L${OPENSSL_DIR}/lib -L${OPENSSL_DIR} -lcrypto
-+LDLIBS := -L${OPENSSL_DIR}/lib -L${OPENSSL_DIR} -lcrypto ${BUILD_LDFLAGS} ${BUILD_LDFLAGS} ${BUILD_LDFLAGS} ${BUILD_LDFLAGS} ${BUILD_LDFLAGS} ${BUILD_LDFLAGS}
- 
- ifeq (${V},0)
-   Q := @
-@@ -37,7 +37,7 @@ else
-   Q :=
- endif
- 
-INCLUDE_PATHS := -I../../include/tools_share  -I${OPENSSL_DIR}/include
-+INCLUDE_PATHS := -I../../include/tools_share  -I${OPENSSL_DIR}/include ${BUILD_CFLAGS} ${BUILD_CFLAGS} ${BUILD_CFLAGS} ${BUILD_CFLAGS} ${BUILD_CFLAGS} ${BUILD_CFLAGS}
- 
- HOSTCC ?= gcc
- 
-- 
-2.25.1
-
@@ -1,2 +1,3 @@
+# Machine specific TFAs
+
 COMPATIBLE_MACHINE:corstone1000 = "corstone1000"
-COMPATIBLE_MACHINE:n1sdp = "n1sdp"
@@ -1,4 +0,0 @@
-# Machine specific TFAs
-
-COMPATIBLE_MACHINE:corstone1000 = "corstone1000"
-SRCREV:corstone1000 = "5f591f67738a1bbe6b262c53d9dad46ed8bbcd67"
@@ -6,8 +6,7 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files/corstone1000:"

 SRC_URI:append = " \ 
 	file://0001-Fix-FF-A-version-in-SPMC-manifest.patch \
-    file://0002-feat-corstone1000-bl2-loads-fip-based-on-metadata.patch \
-    "
+	"

 TFA_DEBUG = "1"
 TFA_UBOOT ?= "1"
@@ -32,9 +31,6 @@ EXTRA_OEMAKE:append = " \
                        CREATE_KEYS=1 \
                        GENERATE_COT=1 \
                        TRUSTED_BOARD_BOOT=1 \
-                        ARM_GPT_SUPPORT=1 \
-                        PSA_FWU_SUPPORT=1 \
-                        NR_OF_IMAGES_IN_FW_BANK=4 \
                        COT=tbbr \
                        ARM_ROTPK_LOCATION=devel_rsa  \
                        ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem \
@@ -0,0 +1,12 @@
+# Armv7-A FVP specific TFA parameters
+
+COMPATIBLE_MACHINE = "fvp-base-arm32"
+TFA_PLATFORM = "fvp"
+TFA_UBOOT = "1"
+TFA_BUILD_TARGET = "dtbs bl1 bl32 fip"
+
+EXTRA_OEMAKE:append = " \
+    ARCH=aarch32 \
+    AARCH32_SP=sp_min \
+    "
+
@@ -8,5 +8,5 @@ COMPATIBLE_MACHINE = "fvp-base"
 TFA_PLATFORM = "fvp"
 TFA_DEBUG = "1"
 TFA_MBEDTLS = "1"
-TFA_UBOOT ?= "1"
+TFA_UBOOT = "1"
 TFA_BUILD_TARGET = "bl1 bl2 bl31 dtbs fip"
@@ -1,5 +1,9 @@
 # N1SDP specific TFA support

+# Align with post-N1SDP-2022.06.22 refresh
+SRCREV_tfa  = "1309c6c805190bd376c0561597653f3f8ecd0f58"
+PV .= "+git${SRCPV}"
+
 COMPATIBLE_MACHINE = "n1sdp"
 TFA_PLATFORM       = "n1sdp"
 TFA_BUILD_TARGET   = "all fip"
@@ -6,6 +6,7 @@ MACHINE_TFA_REQUIRE ?= ""
 MACHINE_TFA_REQUIRE:corstone500 = "trusted-firmware-a-corstone500.inc"
 MACHINE_TFA_REQUIRE:corstone1000 = "trusted-firmware-a-corstone1000.inc"
 MACHINE_TFA_REQUIRE:fvp-base = "trusted-firmware-a-fvp.inc"
+MACHINE_TFA_REQUIRE:fvp-base-arm32 = "trusted-firmware-a-fvp-arm32.inc"
 MACHINE_TFA_REQUIRE:juno = "trusted-firmware-a-juno.inc"
 MACHINE_TFA_REQUIRE:n1sdp = "trusted-firmware-a-n1sdp.inc"
 MACHINE_TFA_REQUIRE:sgi575 = "trusted-firmware-a-sgi575.inc"
@@ -0,0 +1,359 @@
+From 6ab17eeb8225cdf4afc6956c9a2774d60866c36d Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Mon, 28 Mar 2022 05:16:50 +0100
+Subject: [PATCH 1/6] corstone1000: platform secure test framework
+
+Change-Id: Ib781927f0add93ec9c06515d251e79518ee1db6e
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+Upstream-Status: Accepted [TF-Mv1.7.0]
+---
+ .../arm/corstone1000/Native_Driver/firewall.c |  15 ++
+ .../arm/corstone1000/Native_Driver/firewall.h |   5 +
+ .../ci_regression_tests/CMakeLists.txt        |  45 +++++
+ .../corstone1000/ci_regression_tests/s_test.c | 186 ++++++++++++++++++
+ .../corstone1000/ci_regression_tests/s_test.h |  30 +++
+ .../ci_regression_tests/s_test_config.cmake   |   8 +
+ 6 files changed, 289 insertions(+)
+ create mode 100644 platform/ext/target/arm/corstone1000/ci_regression_tests/CMakeLists.txt
+ create mode 100644 platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.c
+ create mode 100644 platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.h
+ create mode 100644 platform/ext/target/arm/corstone1000/ci_regression_tests/s_test_config.cmake
+
+diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/firewall.c b/platform/ext/target/arm/corstone1000/Native_Driver/firewall.c
+index 788cc3ec92..356b85e9d5 100755
+--- a/platform/ext/target/arm/corstone1000/Native_Driver/firewall.c
+++ b/platform/ext/target/arm/corstone1000/Native_Driver/firewall.c
+@@ -293,6 +293,21 @@ void fc_enable_mpl(enum rgn_mpe_t mpe, enum rgn_mpl_t mpl)
+         ptr->rgn_mpl3 |= (mpl & RGN_MPL_EN_MASK);
+ }
+ 
+void fc_read_mpl(enum rgn_mpe_t mpe, enum rgn_mpl_t* mpl)
+{
+    struct _firewall_pe_rwe_reg_map_t *ptr =
+         (struct _firewall_pe_rwe_reg_map_t *)fw_data.rwe_ptr;
+    if (mpe == RGN_MPE0)
+        *mpl = (ptr->rgn_mpl0 & RGN_MPL_EN_MASK);
+    else if (mpe == RGN_MPE1)
+        *mpl = (ptr->rgn_mpl1 & RGN_MPL_EN_MASK);
+    else if (mpe == RGN_MPE2)
+        *mpl = (ptr->rgn_mpl2 & RGN_MPL_EN_MASK);
+    else if (mpe == RGN_MPE3)
+        *mpl = (ptr->rgn_mpl3 & RGN_MPL_EN_MASK);
+}
+
+
+ void fc_disable_mpl(enum rgn_mpe_t mpe, enum rgn_mpl_t mpl)
+ {
+     struct _firewall_pe_rwe_reg_map_t *ptr =
+diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/firewall.h b/platform/ext/target/arm/corstone1000/Native_Driver/firewall.h
+index 48c86725ef..17afe6a92f 100755
+--- a/platform/ext/target/arm/corstone1000/Native_Driver/firewall.h
+++ b/platform/ext/target/arm/corstone1000/Native_Driver/firewall.h
+@@ -247,6 +247,11 @@ void fc_init_mpl(enum rgn_mpe_t mpe);
+  */
+ void fc_enable_mpl(enum rgn_mpe_t mpe, enum rgn_mpl_t mpl);
+ 
+/**
+ * \brief Reads Master Permission List in the selected Firewall Component
+ */
+void fc_read_mpl(enum rgn_mpe_t mpe, enum rgn_mpl_t* mpl);
+
+ /**
+  * \brief Disables Master Permission List in the selected Firewall Component
+  */
+diff --git a/platform/ext/target/arm/corstone1000/ci_regression_tests/CMakeLists.txt b/platform/ext/target/arm/corstone1000/ci_regression_tests/CMakeLists.txt
+new file mode 100644
+index 0000000000..70e1c20e4e
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/ci_regression_tests/CMakeLists.txt
+@@ -0,0 +1,45 @@
+#-------------------------------------------------------------------------------
+# Copyright (c) 2021-22, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+#-------------------------------------------------------------------------------
+
+cmake_policy(SET CMP0079 NEW)
+
+include(${CMAKE_CURRENT_SOURCE_DIR}/s_test_config.cmake)
+
+####################### Secure #################################################
+
+add_library(corstone1000_test_s STATIC EXCLUDE_FROM_ALL)
+
+target_sources(corstone1000_test_s
+    PRIVATE
+        ${CMAKE_CURRENT_SOURCE_DIR}/s_test.c
+        ../Native_Driver/firewall.c
+)
+
+target_include_directories(corstone1000_test_s
+    PRIVATE
+        ${CMAKE_CURRENT_SOURCE_DIR}
+        ../Device/Include
+        ../Native_Driver
+)
+
+# Example test links tfm_test_suite_extra_common to use related interface
+target_link_libraries(corstone1000_test_s
+    PRIVATE
+        tfm_test_suite_extra_common
+        tfm_log
+)
+
+target_compile_definitions(corstone1000_test_s
+    PRIVATE
+        $<$<BOOL:${PLATFORM_IS_FVP}>:PLATFORM_IS_FVP>
+)
+
+# The corstone1000_test_s library is linked by tfm_test_suite_extra_s
+target_link_libraries(tfm_test_suite_extra_s
+    PRIVATE
+        corstone1000_test_s
+)
+diff --git a/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.c b/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.c
+new file mode 100644
+index 0000000000..963f46d2ab
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.c
+@@ -0,0 +1,186 @@
+/*
+ * Copyright (c) 2021-22, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#include "s_test.h"
+#include "platform_base_address.h"
+#include "firewall.h"
+#include "tfm_log_raw.h"
+
+#define DISABLED_TEST 0
+
+enum host_firewall_host_comp_id_t {
+  HOST_FCTRL = (0x00u),
+  COMP_SYSPERIPH,
+  COMP_DBGPERIPH,
+  COMP_AONPERIPH,
+  COMP_XNVM,
+  COMP_CVM,
+  COMP_HOSTCPU,
+  COMP_EXTSYS0,
+  COMP_EXTSYS1,
+  COMP_EXPSLV0,
+  COMP_EXPSLV1,
+  COMP_EXPMST0,
+  COMP_EXPMST1,
+  COMP_OCVM,
+  COMP_DEBUG,
+};
+
+const struct extra_tests_t plat_s_t = {
+    .test_entry = s_test,
+    .expected_ret = EXTRA_TEST_SUCCESS
+};
+
+static int test_host_firewall_status(void)
+{
+    enum fw_lockdown_status_t status;
+    uint32_t any_component_id = 2;
+
+    fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, any_component_id);
+    status = fw_get_lockdown_status();
+    if (status != FW_LOCKED) {
+        tfm_log_printf("FAIL: %s.\n\r", __func__);
+        return EXTRA_TEST_FAILED;
+    }
+
+    tfm_log_printf("PASS: %s\n\r", __func__);
+    return EXTRA_TEST_SUCCESS;
+}
+
+static int test_host_firewall_external_flash_configurations(void)
+{
+    enum rgn_mpl_t mpl_rights = 0;
+    enum rgn_mpl_t expected_rights = 0;
+
+#if !(PLATFORM_IS_FVP)
+    /* External flash */
+    fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, COMP_EXPMST0);
+    fc_select_region(3);
+    fc_read_mpl(RGN_MPE0, &mpl_rights);
+    expected_rights = (RGN_MPL_ANY_MST_MASK | RGN_MPL_SECURE_READ_MASK |
+                                              RGN_MPL_SECURE_WRITE_MASK);
+    if (mpl_rights != expected_rights) {
+        tfm_log_printf("FAIL1: %s.\n\r", __func__);
+        return EXTRA_TEST_FAILED;
+    }
+    /* XIP Permissions */
+    fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, COMP_XNVM);
+    fc_select_region(1);
+    fc_read_mpl(RGN_MPE0, &mpl_rights);
+    expected_rights = (RGN_MPL_ANY_MST_MASK |
+                              RGN_MPL_SECURE_READ_MASK |
+                              RGN_MPL_NONSECURE_READ_MASK);
+    if (mpl_rights != expected_rights) {
+        tfm_log_printf("FAIL2: %s.\n\r", __func__);
+        return EXTRA_TEST_FAILED;
+    }
+#else
+    /* Enable the below test when FVP Host Firewall is configured. */
+    /*
+    fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, COMP_XNVM);
+    fc_select_region(1);
+    fc_read_mpl(RGN_MPE0, &mpl_rights);
+    tfm_log_printf("mpl rights = %d\n\r", mpl_rights);
+    expected_rights = (RGN_MPL_ANY_MST_MASK |
+                  RGN_MPL_SECURE_READ_MASK |
+                  RGN_MPL_SECURE_WRITE_MASK |
+                  RGN_MPL_NONSECURE_READ_MASK |
+                  RGN_MPL_NONSECURE_WRITE_MASK);
+    if (mpl_rights != expected_rights) {
+        tfm_log_printf("FAIL1: %s.\n\r", __func__);
+        return EXTRA_TEST_FAILED;
+    }
+    */
+#endif
+
+    tfm_log_printf("PASS: %s\n\r", __func__);
+    return EXTRA_TEST_SUCCESS;
+}
+
+static int test_host_firewall_secure_flash_configurations(void)
+{
+    enum rgn_mpl_t mpl_rights = 0;
+    enum rgn_mpl_t expected_rights = 0;
+
+#if !(PLATFORM_IS_FVP)
+    /* External flash */
+    fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, COMP_EXPMST1);
+    fc_select_region(1);
+    fc_read_mpl(RGN_MPE0, &mpl_rights);
+    expected_rights = (RGN_MPL_ANY_MST_MASK | RGN_MPL_SECURE_READ_MASK |
+                                              RGN_MPL_SECURE_WRITE_MASK);
+    if (mpl_rights != expected_rights) {
+        tfm_log_printf("FAIL: %s.\n\r", __func__);
+        return EXTRA_TEST_FAILED;
+    }
+#endif
+
+    tfm_log_printf("PASS: %s\n\r", __func__);
+    return EXTRA_TEST_SUCCESS;
+}
+
+static int test_bir_programming(void)
+{
+    /* BIR is expected to bhaive like write once register */
+
+    volatile uint32_t *bir_base = (uint32_t *)CORSTONE1000_HOST_BIR_BASE;
+
+    bir_base[0] = 0x1;
+    bir_base[0] = 0x2;
+    if (bir_base[0] != 0x1) {
+        tfm_log_printf("FAIL: %s : (%u)\n\r", __func__, bir_base[0]);
+        return EXTRA_TEST_FAILED;
+    }
+
+    tfm_log_printf("PASS: %s\n\r", __func__);
+    return EXTRA_TEST_SUCCESS;
+}
+
+int32_t s_test(void)
+{
+    int status;
+    int failures = 0;
+
+#if (DISABLED_TEST == 1)
+    status = test_host_firewall_status();
+    if (status) {
+        failures++;
+    }
+#endif
+
+    status = test_host_firewall_secure_flash_configurations();
+    if (status) {
+        failures++;
+    }
+
+    status = test_host_firewall_external_flash_configurations();
+    if (status) {
+        failures++;
+    }
+
+#if (DISABLED_TEST == 1)
+    status = test_bir_programming();
+    if (status) {
+        failures++;
+    }
+#endif
+
+    if (failures) {
+        tfm_log_printf("Not all platform test could pass: failures=%d\n\r", failures);
+        return EXTRA_TEST_FAILED;
+    }
+
+    tfm_log_printf("ALL_PASS: corstone1000 platform test cases passed.\n\r");
+    return EXTRA_TEST_SUCCESS;
+}
+
+int32_t extra_tests_init(struct extra_tests_t *internal_test_t)
+{
+    /* Add platform init code here. */
+
+    return register_extra_tests(internal_test_t, &plat_s_t);
+}
+diff --git a/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.h b/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.h
+new file mode 100644
+index 0000000000..8aff4d679c
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test.h
+@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2021-22, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef __S_TESTS_H__
+#define __S_TESTS_H__
+
+#include "extra_tests_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+const struct extra_tests_t plat_s_t;
+
+/**
+ * \brief Platform specific secure test function.
+ *
+ * \returns Returns error code as specified in \ref int32_t
+ */
+int32_t s_test(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __S_TESTS_H__ */
+diff --git a/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test_config.cmake b/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test_config.cmake
+new file mode 100644
+index 0000000000..bb8d26bf1c
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/ci_regression_tests/s_test_config.cmake
+@@ -0,0 +1,8 @@
+#-------------------------------------------------------------------------------
+# Copyright (c) 2021-22, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+#-------------------------------------------------------------------------------
+
+############ Define secure test specific cmake configurations here #############
+-- 
+2.25.1
+
@@ -0,0 +1,77 @@
+From 6fd49ab55c3419429e437845864c5bb2d731da29 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Mon, 25 Apr 2022 05:26:38 +0100
+Subject: [PATCH 2/6] corstone1000: make external system support optional
+
+The commits introduce build time variables to make
+external system support in the platform optional.
+
+Change-Id: I593014e0da4ac553c105c66ae55f6fd83ffe427e
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+Upstream-Status: Accepted [TF-Mv1.7.0]
+---
+ .../ext/target/arm/corstone1000/CMakeLists.txt    |  1 +
+ platform/ext/target/arm/corstone1000/config.cmake |  1 +
+ .../target/arm/corstone1000/tfm_hal_multi_core.c  | 15 +++++++++++++++
+ 3 files changed, 17 insertions(+)
+
+diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+index 16bc708964..39d7b03455 100644
+--- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+@@ -97,6 +97,7 @@ target_compile_definitions(platform_s
+     PRIVATE
+         $<$<BOOL:${PLATFORM_IS_FVP}>:PLATFORM_IS_FVP>
+         $<$<BOOL:${TEST_S}>:TEST_S>
+        $<$<BOOL:${EXTERNAL_SYSTEM_SUPPORT}>:EXTERNAL_SYSTEM_SUPPORT>
+ )
+ 
+ #========================= Platform BL2 =======================================#
+diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
+index e5f91108ee..a3399db318 100644
+--- a/platform/ext/target/arm/corstone1000/config.cmake
+++ b/platform/ext/target/arm/corstone1000/config.cmake
+@@ -21,6 +21,7 @@ set(CRYPTO_HW_ACCELERATOR               ON         CACHE BOOL     "Whether to en
+ set(CRYPTO_NV_SEED                      OFF        CACHE BOOL     "Use stored NV seed to provide entropy")
+ set(TFM_CRYPTO_TEST_ALG_CFB             OFF        CACHE BOOL     "Test CFB cryptography mode")
+ set(NS                                  FALSE      CACHE BOOL     "Whether to build NS app")
+set(EXTERNAL_SYSTEM_SUPPORT             OFF        CACHE BOOL     "Whether to include external system support.")
+ 
+ # FVP is not integrated/tested with CC312.
+ if (${PLATFORM_IS_FVP})
+diff --git a/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c b/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
+index 8e1b455086..8622844d91 100644
+--- a/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
+++ b/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
+@@ -16,6 +16,16 @@
+ #define HOST_CPU_PE0_CONFIG_OFFSET 0x010
+ #define AA64nAA32_MASK (1 << 3)
+ 
+#ifdef EXTERNAL_SYSTEM_SUPPORT
+void tfm_external_system_boot()
+{
+    volatile uint32_t *ext_sys_reset_ctl_reg = (uint32_t *)(CORSTONE1000_EXT_SYS_RESET_REG);
+
+    /* de-assert CPU_WAIT signal*/
+    *ext_sys_reset_ctl_reg = 0x0;
+}
+#endif
+
+ void tfm_hal_boot_ns_cpu(uintptr_t start_addr)
+ {
+     /* Switch the shared flash to XiP mode for the host */
+@@ -53,6 +63,11 @@ void tfm_hal_boot_ns_cpu(uintptr_t start_addr)
+     *reset_ctl_reg = 0;
+ 
+     (void) start_addr;
+
+#ifdef EXTERNAL_SYSTEM_SUPPORT
+    /*release EXT SYS out of reset*/
+    tfm_external_system_boot();
+#endif
+ }
+ 
+ void tfm_hal_wait_for_ns_cpu_ready(void)
+-- 
+2.25.1
+
@@ -0,0 +1,298 @@
+From 2e56f2601249243f2fb3ba67caf9febe4bfc8371 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Tue, 26 Apr 2022 20:17:13 +0100
+Subject: [PATCH 3/6] corstone1000: enable secure enclave run without host
+ binaries
+
+In TEST_S configuration, the build disables part of the code which
+assumes that the host binaries are present in the flash. This change
+will allow secure enclave's part of the platforms software to build
+and run without the host support. The configuration can be used to run
+CI and test secure enclave software independently.
+
+Change-Id: I29325750a3bea270fe5b3b8b47932a7071a59482
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+Upstream-Status: Accepted [TF-Mv1.7.0]
+---
+ .../ext/target/arm/corstone1000/readme.rst    | 88 +++++++++++++++----
+ .../target/arm/corstone1000/CMakeLists.txt    |  8 +-
+ .../arm/corstone1000/bl1/CMakeLists.txt       |  2 +-
+ .../target/arm/corstone1000/bl2_flash_map.c   |  2 +
+ .../target/arm/corstone1000/boot_hal_bl2.c    |  2 +
+ .../ext/target/arm/corstone1000/config.cmake  | 11 ++-
+ .../arm/corstone1000/partition/flash_layout.h |  2 +-
+ .../arm/corstone1000/tfm_hal_multi_core.c     |  2 +
+ 8 files changed, 94 insertions(+), 23 deletions(-)
+
+diff --git a/docs/platform/ext/target/arm/corstone1000/readme.rst b/docs/platform/ext/target/arm/corstone1000/readme.rst
+index 94b58ac6fc..10c9c58f78 100644
+--- a/docs/platform/ext/target/arm/corstone1000/readme.rst
+++ b/docs/platform/ext/target/arm/corstone1000/readme.rst
+@@ -7,22 +7,27 @@ Introduction
+ ************
+ 
+ The ARM's Corstone-1000 platform is a reference implementation of PSA FF-M
+-architecture where NSPE and SPE environments are partitioned into
+architecture where NSPE and SPE environments are partitioned/isolated into
+ Cortex-A35 and Cortex-M0+ respectively.
+ 
+ Cortex-M0+ acting as Secure Enclave is the Root-of-trust of SoC. Its
+-software comprises of two boot loading stages, i.e. Bl1 and Bl2, based on
+-mcuboot, and TF-M as run time software. Cortex-A35, also referred as host,
+-is completely treated as non-secure from the Secure Enclave perspective.
+software comprises of two boot loading stages, i.e. Bl1 and Bl2 (based on
+mcuboot) and TF-M as run time software. Cortex-A35, also referred as host,
+is treated as non-secure from the Secure Enclave perspective.
+ The Cortex-A35 is brought out of rest by Secure Enclave in aarch64 bit mode,
+ and boots the software ecosystem based on linux, u-boot, UEFI run time
+-services, TF-A and Optee.
+services, TF-A, Secure Partitions and Optee.
+ 
+ The communication between NSPE and SPE is based on PSA IPC protocol running on
+-top of OpenAMP.
+top of FF-A/OpenAMP.
+ 
+ The secure enclave subsystem has ARM's CC-312 (Crypto Cell) hardware to
+-accelerate cryptographic operations.
+accelerate cryptographic operations. Additionaly, platform supports Secure Debug
+using SDC-600 as the communication interface between host debugger and platform
+target. The platform has the build option to enable secure debug protocol to
+unlock debug ports during boot time. The protocol is based on ARM's ADAC
+(Authenticated Debug Access Control) standard.
+
+ 
+ ***********
+ System boot
+@@ -33,23 +38,76 @@ System boot
+ - BL1 load, verifies and transfer execution to BL2 which is again based on mcuboot.
+ - BL2 loads and verifies TF-M and host's initial boot loader image.
+ - BL2 transfer the execution to the TF-M.
+-- During TF-M initialization, the host is reset.
+- During TF-M initialization, the host is taken out of rest.
+- Hashes of the keys used for image verification are stored in the OTP memory.
+ 
+ *****
+ Build
+ *****
+ 
+-.. code-block::
+Platform solution
+=================
+
+The platform binaries are build using Yocto. Below is the user guide:
+
+`Arm Corstone-1000 User Guide`_
+
+Secure Test
+===========
+
+This section can be used to test the secure enclave software indedendently from
+the host. The below configuration builds the secure enclave binaries with CI test
+frame integrated. On boot, secure enclave softwares stack is brought up, and
+CI tests starts executing at the end of the initialization process. In the
+below configuration, host software support is disabled, and meant only
+to test/verify the secure enclave softwares.
+
+FVP
+---
+ 
+-    cmake -B build/ -S <tf-m-root>/ -DCMAKE_BUILD_TYPE=Debug -DTFM_TOOLCHAIN_FILE=<tf-m-root>/toolchain_GNUARM.cmake -DTFM_PLATFORM=arm/corstone1000
+- Download Corstone-1000 FVP from : `Arm Ecosystem FVPs`_
+- Install FVP by running the shell script.
+- Running of the binary will boot secure enclave software stack and at the end all CI test
+  from tf-m-test along with platform specific tests are executed.
+
+.. code-block:: bash
+
+    cmake -B build/ -S <tf-m-root>/ -DCMAKE_BUILD_TYPE=Debug -DTFM_TOOLCHAIN_FILE=<tf-m-root>/toolchain_GNUARM.cmake -DTFM_PLATFORM=arm/corstone1000 -DPLATFORM_IS_FVP=TRUE -DTEST_NS=OFF -DTEST_S=ON -DEXTRA_S_TEST_SUITES_PATHS=<tf-m-root>/trusted-firmware-m/platform/ext/target/arm/corstone1000/ci_regression_tests/
+     cmake --build build -- install
+    cd ./build/install/outputs/
+    cat bl2_signed.bin bl2_signed.bin tfm_s_signed.bin > cs1000.bin
+    cd <path-to-FVP-installation>/models/Linux64_GCC-9.3/
+    ./FVP_Corstone-1000 -C board.flashloader0.fname="none" -C se.trustedBootROMloader.fname="./<path-to-build-dir>/install/outputs/bl1.bin" -C board.xnvm_size=64 -C se.trustedSRAM_config=6 -C se.BootROM_config="3" -C board.smsc_91c111.enabled=0  -C board.hostbridge.userNetworking=true --data board.flash0=./<path-to-build-dir>/install/outputs/cs1000.bin@0x68100000 -C diagnostics=4 -C disable_visualisation=true -C board.se_flash_size=8192 -C diagnostics=4  -C disable_visualisation=true
+
+FPGA
+----
+ 
+-The binaries will be installed inside:
+- Follow the above pointed platform user guide to setup the FPGA board.
+- Use the BL1 generated from the below commands to place it inside FPGA board SD Card.
+- Use the cs1000.bin created from the below commands to place it inside FPGA board SD Card.
+
+.. code-block:: bash
+
+    cmake -B build/ -S <tf-m-root>/ -DCMAKE_BUILD_TYPE=Debug -DTFM_TOOLCHAIN_FILE=<tf-m-root>/toolchain_GNUARM.cmake -DTFM_PLATFORM=arm/corstone1000 -DTEST_NS=OFF -DTEST_S=ON -DEXTRA_S_TEST_SUITES_PATHS=<tf-m-root>/trusted-firmware-m/platform/ext/target/arm/corstone1000/ci_regression_tests/ -DTEST_S_PS=OFF -DTEST_S_PLATFORM=OFF
+    cmake --build build -- install
+    cd ./build/install/outputs/
+    cat bl2_signed.bin bl2_signed.bin tfm_s_signed.bin > cs1000.bin
+    cp bl1.bin <path-to-FPGA-SD-CARD>/SOFTWARE/
+    cp cs1000.bin <path-to-FPGA-SD-CARD>/SOFTWARE/
+ 
+-.. code-block::
+FPGA build can not compile all the CI tests into a single build as it exceeds
+the available RAM size. So there is a need to select few tests but not all.
+The above configuration disable build of -DTEST_S_PS and -DTEST_S_PLATFORM.
+Other test configurations are:
+ 
+-    ./build/install/outputs/ARM/CORSTONE1000
+- -DTEST_S_ATTESTATION=ON/OFF
+- -DTEST_S_AUDIT=ON/OFF
+- -DTEST_S_CRYPTO=ON/OFF
+- -DTEST_S_ITS=ON/OFF
+- -DTEST_S_PS=ON/OFF
+- -DTEST_S_PLATFORM=ON/OFF
+ 
+---------------
+*Copyright (c) 2021-2022, Arm Limited. All rights reserved.*
+ 
+-*Copyright (c) 2021, Arm Limited. All rights reserved.*
+.. _Arm Ecosystem FVPs: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
+.. _Arm Corstone-1000 User Guide: https://gitlab.arm.com/arm-reference-solutions/arm-reference-solutions-docs/-/blob/CORSTONE1000-2022.04.19/docs/embedded-a/corstone1000/user-guide.rst
+diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+index 39d7b03455..81522c7cf0 100644
+--- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+@@ -18,7 +18,7 @@ target_include_directories(platform_region_defs
+ 
+ target_compile_definitions(platform_region_defs
+     INTERFACE
+-        $<$<BOOL:${TEST_S}>:TEST_S>
+        $<$<BOOL:${TFM_S_REG_TEST}>:TFM_S_REG_TEST>
+ )
+ #========================= Platform common defs ===============================#
+ 
+@@ -75,7 +75,7 @@ target_sources(platform_s
+         $<$<BOOL:TFM_PARTITION_PLATFORM>:${CMAKE_CURRENT_SOURCE_DIR}/services/src/tfm_platform_system.c>
+         fw_update_agent/uefi_capsule_parser.c
+         fw_update_agent/fwu_agent.c
+-        $<$<BOOL:${TEST_S}>:${CMAKE_CURRENT_SOURCE_DIR}/target_cfg.c>
+        $<$<BOOL:${TFM_S_REG_TEST}>:${CMAKE_CURRENT_SOURCE_DIR}/target_cfg.c>
+ )
+ 
+ if (PLATFORM_IS_FVP)
+@@ -96,7 +96,7 @@ endif()
+ target_compile_definitions(platform_s
+     PRIVATE
+         $<$<BOOL:${PLATFORM_IS_FVP}>:PLATFORM_IS_FVP>
+-        $<$<BOOL:${TEST_S}>:TEST_S>
+        $<$<BOOL:${TFM_S_REG_TEST}>:TFM_S_REG_TEST>
+         $<$<BOOL:${EXTERNAL_SYSTEM_SUPPORT}>:EXTERNAL_SYSTEM_SUPPORT>
+ )
+ 
+@@ -136,7 +136,7 @@ endif()
+ target_compile_definitions(platform_bl2
+     PRIVATE
+         $<$<BOOL:${PLATFORM_IS_FVP}>:PLATFORM_IS_FVP>
+-        $<$<BOOL:${TEST_S}>:TEST_S>
+        $<$<BOOL:${TFM_S_REG_TEST}>:TFM_S_REG_TEST>
+ )
+ 
+ # boot_hal_bl2.c is compiled as part of 'bl2' target and not inside
+diff --git a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+index 369695f148..d39c5ae91d 100644
+--- a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+@@ -291,7 +291,7 @@ target_compile_definitions(signing_layout_for_bl2
+     PRIVATE
+         MCUBOOT_IMAGE_NUMBER=${BL1_IMAGE_NUMBER}
+         BL1
+-        $<$<BOOL:${TEST_S}>:TEST_S>
+        $<$<BOOL:${TFM_S_REG_TEST}>:TFM_S_REG_TEST>
+ )
+ 
+ target_include_directories(signing_layout_for_bl2
+diff --git a/platform/ext/target/arm/corstone1000/bl2_flash_map.c b/platform/ext/target/arm/corstone1000/bl2_flash_map.c
+index 6bffa274df..0a6a592d94 100644
+--- a/platform/ext/target/arm/corstone1000/bl2_flash_map.c
+++ b/platform/ext/target/arm/corstone1000/bl2_flash_map.c
+@@ -38,6 +38,7 @@ struct flash_area flash_map[] = {
+         .fa_off = FLASH_AREA_1_OFFSET,
+         .fa_size = FLASH_AREA_1_SIZE,
+     },
+#ifndef TFM_S_REG_TEST
+     {
+         .fa_id = FLASH_AREA_2_ID,
+         .fa_device_id = FLASH_DEVICE_ID,
+@@ -52,6 +53,7 @@ struct flash_area flash_map[] = {
+         .fa_off = FLASH_INVALID_OFFSET,
+         .fa_size = FLASH_INVALID_SIZE,
+     },
+#endif
+ };
+ 
+ const int flash_map_entry_num = ARRAY_SIZE(flash_map);
+diff --git a/platform/ext/target/arm/corstone1000/boot_hal_bl2.c b/platform/ext/target/arm/corstone1000/boot_hal_bl2.c
+index 792e06f81e..134315a17b 100644
+--- a/platform/ext/target/arm/corstone1000/boot_hal_bl2.c
+++ b/platform/ext/target/arm/corstone1000/boot_hal_bl2.c
+@@ -100,10 +100,12 @@ int32_t boot_platform_init(void)
+         return 1;
+     }
+ 
+#ifndef TFM_S_REG_TEST
+     result = fill_bl2_flash_map_by_parsing_fips(BANK_0_PARTITION_OFFSET);
+     if (result) {
+         return 1;
+     }
+#endif
+ 
+     result = FLASH_DEV_NAME.Initialize(NULL);
+     if (result != ARM_DRIVER_OK) {
+diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
+index a3399db318..a6a1a33c42 100644
+--- a/platform/ext/target/arm/corstone1000/config.cmake
+++ b/platform/ext/target/arm/corstone1000/config.cmake
+@@ -13,8 +13,15 @@ set(DEFAULT_MCUBOOT_FLASH_MAP           OFF        CACHE BOOL     "Whether to us
+ set(MCUBOOT_UPGRADE_STRATEGY            "RAM_LOAD" CACHE STRING   "Upgrade strategy when multiple boot images are loaded")
+ set(MCUBOOT_SECURITY_COUNTER_S          "1"      CACHE STRING    "Security counter for S image. auto sets it to IMAGE_VERSION_S")
+ 
+-set(TFM_ISOLATION_LEVEL                 2          CACHE STRING   "Isolation level")
+-set(MCUBOOT_IMAGE_NUMBER                2          CACHE STRING   "Whether to combine S and NS into either 1 image, or sign each separately")
+if (TEST_S OR TEST_S_ATTESTATION OR TEST_S_AUDIT OR TEST_S_CRYPTO OR TEST_S_ITS OR TEST_S_PS OR TEST_S_PLATFORM OR EXTRA_S_TEST_SUITES_PATHS)
+  # Test configuration: host images are not needed and work only with isolation level 1
+  set(MCUBOOT_IMAGE_NUMBER                1          CACHE STRING   "Whether to combine S and NS into either 1 image, or sign each separately")
+  set(TFM_ISOLATION_LEVEL                 1          CACHE STRING   "Isolation level")
+else()
+  set(MCUBOOT_IMAGE_NUMBER                2          CACHE STRING   "Whether to combine S and NS into either 1 image, or sign each separately")
+  set(TFM_ISOLATION_LEVEL                 2          CACHE STRING   "Isolation level")
+endif()
+
+ set(TFM_MULTI_CORE_TOPOLOGY             ON         CACHE BOOL     "Whether to build for a dual-cpu architecture")
+ set(TFM_PLAT_SPECIFIC_MULTI_CORE_COMM   ON         CACHE BOOL     "Whether to use a platform specific inter core communication instead of mailbox in dual-cpu topology")
+ set(CRYPTO_HW_ACCELERATOR               ON         CACHE BOOL     "Whether to enable the crypto hardware accelerator on supported platforms")
+diff --git a/platform/ext/target/arm/corstone1000/partition/flash_layout.h b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+index aa5a8fe463..b0319bb319 100644
+--- a/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+++ b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+@@ -119,7 +119,7 @@
+  *
+  */
+ #define SE_BL2_PARTITION_SIZE           (0x19000)    /* 100 KB */
+-#ifdef TEST_S
+#ifdef TFM_S_REG_TEST
+ #define TFM_PARTITION_SIZE              (0x61C00)    /* 391 KB */
+ #else
+ #define TFM_PARTITION_SIZE              (0x5E000)    /* 376 KB */
+diff --git a/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c b/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
+index 8622844d91..1146ffe22a 100644
+--- a/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
+++ b/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
+@@ -31,6 +31,7 @@ void tfm_hal_boot_ns_cpu(uintptr_t start_addr)
+     /* Switch the shared flash to XiP mode for the host */
+     Select_XIP_Mode_For_Shared_Flash();
+ 
+#ifndef TFM_S_REG_TEST
+     volatile uint32_t *bir_base = (uint32_t *)CORSTONE1000_HOST_BIR_BASE;
+ 
+     /* Program Boot Instruction Register to jump to BL2 (TF-A) base address
+@@ -68,6 +69,7 @@ void tfm_hal_boot_ns_cpu(uintptr_t start_addr)
+     /*release EXT SYS out of reset*/
+     tfm_external_system_boot();
+ #endif
+#endif /* !TFM_S_REG_TEST */
+ }
+ 
+ void tfm_hal_wait_for_ns_cpu_ready(void)
+-- 
+2.25.1
+
@@ -0,0 +1,72 @@
+From f3686dfb8fb97cb42c3d4f8ee2d7aa736d5cb760 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Wed, 3 Aug 2022 15:50:27 +0100
+Subject: [PATCH 4/6] Platform Partition: Allow configuration of input and
+ output buffer
+
+The change makes input and output buffer size macros used by
+the platform partition to be configured by cmake. This will
+allow platforms to set the buffer size accordingly.
+
+Change-Id: Ia492ce02f8744b0157228d9be51a9ec5b7c88ef6
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+Upstream-Status: Accepted [TF-Mv1.7.0]
+---
+ config/config_default.cmake                  | 2 ++
+ secure_fw/partitions/platform/CMakeLists.txt | 6 ++++++
+ secure_fw/partitions/platform/platform_sp.c  | 9 +++++++--
+ 3 files changed, 15 insertions(+), 2 deletions(-)
+
+diff --git a/config/config_default.cmake b/config/config_default.cmake
+index 3112b707bc..497c972dc9 100755
+--- a/config/config_default.cmake
+++ b/config/config_default.cmake
+@@ -141,6 +141,8 @@ set(ATTEST_INCLUDE_OPTIONAL_CLAIMS      ON          CACHE BOOL      "Include opt
+ set(ATTEST_INCLUDE_COSE_KEY_ID          OFF         CACHE BOOL      "Include COSE key-id in initial attestation token")
+ 
+ set(TFM_PARTITION_PLATFORM              ON          CACHE BOOL      "Enable Platform partition")
+set(PLATFORM_SERVICE_INPUT_BUFFER_SIZE  64          CACHE STRING    "Size of input buffer in platform service.")
+set(PLATFORM_SERVICE_OUTPUT_BUFFER_SIZE 64          CACHE STRING    "Size of output buffer in platform service.")
+ 
+ set(TFM_PARTITION_AUDIT_LOG             OFF         CACHE BOOL      "Enable Audit Log partition")
+ 
+diff --git a/secure_fw/partitions/platform/CMakeLists.txt b/secure_fw/partitions/platform/CMakeLists.txt
+index 4b37cd780c..3070f89d6d 100644
+--- a/secure_fw/partitions/platform/CMakeLists.txt
+++ b/secure_fw/partitions/platform/CMakeLists.txt
+@@ -47,6 +47,12 @@ target_link_libraries(tfm_psa_rot_partition_platform
+         tfm_spm
+ )
+ 
+target_compile_definitions(tfm_psa_rot_partition_platform
+    PRIVATE
+        INPUT_BUFFER_SIZE=${PLATFORM_SERVICE_INPUT_BUFFER_SIZE}
+        OUTPUT_BUFFER_SIZE=${PLATFORM_SERVICE_OUTPUT_BUFFER_SIZE}
+)
+
+ ############################ Secure API ########################################
+ 
+ target_sources(tfm_sprt
+diff --git a/secure_fw/partitions/platform/platform_sp.c b/secure_fw/partitions/platform/platform_sp.c
+index 673cb0ee06..87bd434720 100644
+--- a/secure_fw/partitions/platform/platform_sp.c
+++ b/secure_fw/partitions/platform/platform_sp.c
+@@ -38,8 +38,13 @@ static const int32_t nv_counter_access_map[NV_COUNTER_MAP_SIZE] = {
+ #include "psa/service.h"
+ #include "region_defs.h"
+ 
+-#define INPUT_BUFFER_SIZE  64
+-#define OUTPUT_BUFFER_SIZE 64
+#ifndef INPUT_BUFFER_SIZE
+#define INPUT_BUFFER_SIZE      64
+#endif
+
+#ifndef OUTPUT_BUFFER_SIZE
+#define OUTPUT_BUFFER_SIZE     64
+#endif
+ 
+ typedef enum tfm_platform_err_t (*plat_func_t)(const psa_msg_t *msg);
+ #endif /* TFM_PSA_API */
+-- 
+2.25.1
+
@@ -0,0 +1,573 @@
+From 9d70628b7dc1dbc3c1ac7f4f3c0f6aa6b237510d Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Wed, 6 Jul 2022 11:19:39 +0100
+Subject: [PATCH 5/6] corstone1000: support for UEFI FMP image Information
+
+The commit provides the support for UEFI FMP (Firmware Management
+Protocol) SET and GET Image info APIs.
+
+The APIs to SET and GET image info is implemented. In current design,
+SET is called by secure encalve and GET is called by the host.
+
+FMP image information is initialized on every boot and retained
+in SRAM. The updatable values of the FMP are stored in private
+metadata section of the flash.
+
+Change-Id: Iaf0b4a13a9c24f05e4a32509e61a8b96ee8e9e4b
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+Upstream-Status: Accepted [TF-Mv1.7.0]
+---
+ .../target/arm/corstone1000/CMakeLists.txt    |   2 +
+ .../ext/target/arm/corstone1000/config.cmake  |   8 +-
+ .../corstone1000/fw_update_agent/fwu_agent.c  |  61 ++++-
+ .../corstone1000/fw_update_agent/fwu_agent.h  |   3 +
+ .../corstone1000/fw_update_agent/uefi_fmp.c   | 240 ++++++++++++++++++
+ .../corstone1000/fw_update_agent/uefi_fmp.h   |  56 ++++
+ .../include/corstone1000_ioctl_requests.h     |  14 +-
+ .../services/src/tfm_platform_system.c        |   9 +
+ 8 files changed, 374 insertions(+), 19 deletions(-)
+ create mode 100644 platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.c
+ create mode 100644 platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.h
+
+diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+index 81522c7cf0..3602312a3a 100644
+--- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+@@ -76,6 +76,8 @@ target_sources(platform_s
+         fw_update_agent/uefi_capsule_parser.c
+         fw_update_agent/fwu_agent.c
+         $<$<BOOL:${TFM_S_REG_TEST}>:${CMAKE_CURRENT_SOURCE_DIR}/target_cfg.c>
+        fw_update_agent/uefi_fmp.c
+        $<$<NOT:$<BOOL:${PLATFORM_DEFAULT_OTP}>>:${PLATFORM_DIR}/ext/accelerator/cc312/otp_cc312.c>
+ )
+ 
+ if (PLATFORM_IS_FVP)
+diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
+index a6a1a33c42..ab0fe17ba8 100644
+--- a/platform/ext/target/arm/corstone1000/config.cmake
+++ b/platform/ext/target/arm/corstone1000/config.cmake
+@@ -50,7 +50,9 @@ else()
+     set(PLATFORM_PSA_ADAC_SECURE_DEBUG      FALSE        CACHE BOOL      "Whether to use psa-adac secure debug.")
+ endif()
+ 
+-set(DEFAULT_MCUBOOT_SECURITY_COUNTERS   OFF          CACHE BOOL      "Whether to use the default security counter configuration defined by TF-M project")
+set(DEFAULT_MCUBOOT_SECURITY_COUNTERS       OFF          CACHE BOOL      "Whether to use the default security counter configuration defined by TF-M project")
+ 
+-set(PS_ENCRYPTION                       OFF          CACHE BOOL      "Enable encryption for Protected Storage partition")
+-set(PS_ROLLBACK_PROTECTION              OFF          CACHE BOOL      "Enable rollback protection for Protected Storage partition")
+set(PS_ENCRYPTION                           OFF          CACHE BOOL      "Enable encryption for Protected Storage partition")
+set(PS_ROLLBACK_PROTECTION                  OFF          CACHE BOOL      "Enable rollback protection for Protected Storage partition")
+
+set(PLATFORM_SERVICE_OUTPUT_BUFFER_SIZE     256          CACHE STRING    "Size of output buffer in platform service.")
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+index 3abb5dd0dc..72a5fc9c1d 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+@@ -18,6 +18,7 @@
+ #include "platform_description.h"
+ #include "tfm_plat_nv_counters.h"
+ #include "tfm_plat_defs.h"
+#include "uefi_fmp.h"
+ 
+ /* Properties of image in a bank */
+ struct fwu_image_properties {
+@@ -84,6 +85,11 @@ struct fwu_private_metadata {
+        /* staged nv_counter: temprary location before written to the otp */
+        uint32_t nv_counter[NR_OF_IMAGES_IN_FW_BANK];
+ 
+       /* FMP information */
+       uint32_t fmp_version;
+       uint32_t fmp_last_attempt_version;
+       uint32_t fmp_last_attempt_status;
+
+ } __packed;
+ 
+ #define MAX_BOOT_ATTEMPTS_PER_BANK 3
+@@ -278,7 +284,7 @@ enum fwu_agent_error_t fwu_metadata_provision(void)
+ {
+     enum fwu_agent_error_t ret;
+     struct fwu_private_metadata priv_metadata;
+-    uint32_t image_version = 0;
+    uint32_t image_version = FWU_IMAGE_INITIAL_VERSION;
+ 
+     FWU_LOG_MSG("%s: enter\n\r", __func__);
+ 
+@@ -302,8 +308,8 @@ enum fwu_agent_error_t fwu_metadata_provision(void)
+     memset(&_metadata, 0, sizeof(struct fwu_metadata));
+ 
+     _metadata.version = 1;
+-    _metadata.active_index = 0;
+-    _metadata.previous_active_index = 1;
+    _metadata.active_index = BANK_0;
+    _metadata.previous_active_index = BANK_1;
+ 
+     /* bank 0 is the place where images are located at the
+      * start of device lifecycle */
+@@ -339,6 +345,10 @@ enum fwu_agent_error_t fwu_metadata_provision(void)
+     priv_metadata.boot_index = BANK_0;
+     priv_metadata.boot_attempted = 0;
+ 
+    priv_metadata.fmp_version = FWU_IMAGE_INITIAL_VERSION;
+    priv_metadata.fmp_last_attempt_version = FWU_IMAGE_INITIAL_VERSION;
+    priv_metadata.fmp_last_attempt_status = LAST_ATTEMPT_STATUS_SUCCESS;
+
+     ret = private_metadata_write(&priv_metadata);
+     if (ret) {
+         return ret;
+@@ -540,9 +550,25 @@ enum fwu_agent_error_t corstone1000_fwu_flash_image(void)
+                                 &image_bank_offset);
+         switch(image_index) {
+             case IMAGE_ALL:
+
+                 ret = flash_full_capsule(&_metadata, capsule_info.image[i],
+                                          capsule_info.size[i],
+                                          capsule_info.version[i]);
+
+                if (ret != FWU_AGENT_SUCCESS) {
+
+                    priv_metadata.fmp_last_attempt_version = capsule_info.version[i];
+                    priv_metadata.fmp_last_attempt_status = LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL;
+
+                    private_metadata_write(&priv_metadata);
+
+                    fmp_set_image_info(&full_capsule_image_guid,
+                            priv_metadata.fmp_version,
+                            priv_metadata.fmp_last_attempt_version,
+                            priv_metadata.fmp_last_attempt_status);
+                }
+
+
+                 break;
+             default:
+                 FWU_LOG_MSG("%s: sent image not recognized\n\r", __func__);
+@@ -866,17 +892,42 @@ enum fwu_agent_error_t corstone1000_fwu_host_ack(void)
+ 
+     current_state = get_fwu_agent_state(&_metadata, &priv_metadata);
+     if (current_state == FWU_AGENT_STATE_REGULAR) {
+
+         ret = FWU_AGENT_SUCCESS; /* nothing to be done */
+
+        fmp_set_image_info(&full_capsule_image_guid,
+                priv_metadata.fmp_version,
+                priv_metadata.fmp_last_attempt_version,
+                priv_metadata.fmp_last_attempt_status);
+
+         goto out;
+
+     } else if (current_state != FWU_AGENT_STATE_TRIAL) {
+         FWU_ASSERT(0);
+     }
+ 
+     if (_metadata.active_index != priv_metadata.boot_index) {
+
+         /* firmware update failed, revert back to previous bank */
+
+        priv_metadata.fmp_last_attempt_version =
+         _metadata.img_entry[IMAGE_0].img_props[_metadata.active_index].version;
+
+        priv_metadata.fmp_last_attempt_status = LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL;
+
+         ret = fwu_select_previous(&_metadata, &priv_metadata);
+
+     } else {
+
+         /* firmware update successful */
+
+        priv_metadata.fmp_version =
+         _metadata.img_entry[IMAGE_0].img_props[_metadata.active_index].version;
+        priv_metadata.fmp_last_attempt_version =
+         _metadata.img_entry[IMAGE_0].img_props[_metadata.active_index].version;
+
+        priv_metadata.fmp_last_attempt_status = LAST_ATTEMPT_STATUS_SUCCESS;
+
+         ret = fwu_accept_image(&full_capsule_image_guid, &_metadata,
+                                 &priv_metadata);
+         if (!ret) {
+@@ -886,6 +937,10 @@ enum fwu_agent_error_t corstone1000_fwu_host_ack(void)
+ 
+     if (ret == FWU_AGENT_SUCCESS) {
+         disable_host_ack_timer();
+        fmp_set_image_info(&full_capsule_image_guid,
+                priv_metadata.fmp_version,
+                priv_metadata.fmp_last_attempt_version,
+                priv_metadata.fmp_last_attempt_status);
+     }
+ 
+ out:
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+index 57b07e8d2c..aa18179024 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+@@ -30,6 +30,9 @@ enum fwu_agent_error_t {
+                 }                                                              \
+ 
+ 
+/* Version used for the very first image of the device. */
+#define FWU_IMAGE_INITIAL_VERSION 0
+
+ enum fwu_agent_error_t fwu_metadata_provision(void);
+ enum fwu_agent_error_t fwu_metadata_init(void);
+ 
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.c b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.c
+new file mode 100644
+index 0000000000..ce576e1794
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.c
+@@ -0,0 +1,240 @@
+/*
+ * Copyright (c) 2022, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#include <string.h>
+#include <stdbool.h>
+#include "cmsis.h"
+#include "uefi_fmp.h"
+
+/* The count will increase when partial update is supported.
+ * At present, only full WIC is considered as updatable image.
+ */
+#define NUMBER_OF_FMP_IMAGES 1
+#define NO_OF_FMP_VARIABLES_PER_IMAGE   6
+
+#define UEFI_ARCHITECTURE_64
+
+#ifdef UEFI_ARCHITECTURE_64
+typedef uint64_t uefi_ptr_t;
+typedef uint64_t efi_uintn_t;
+#else
+typedef uint32_t uefi_ptr_t;
+typedef uint32_t efi_uintn_t;
+#endif
+
+/* Below macro definations and struct declarations taken from UEFI spec 2.9 */
+
+/*
+ * Image Attribute Definitions
+ */
+#define IMAGE_ATTRIBUTE_IMAGE_UPDATABLE            0x00000001
+#define IMAGE_ATTRIBUTE_RESET_REQUIRED             0x00000002
+#define IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED    0x00000004
+#define IMAGE_ATTRIBUTE_IN_USE                     0x00000008
+#define IMAGE_ATTRIBUTE_UEFI_IMAGE                 0x00000010
+#define IMAGE_ATTRIBUTE_DEPENDENCY                 0x00000020
+
+typedef uint32_t DescriptorVersion_t;
+typedef uint32_t DescriptorSize_t;
+typedef uint8_t DescriptorCount_t;
+
+typedef __PACKED_STRUCT {
+    uint8_t ImageIndex;
+    struct efi_guid ImageTypeId;
+    uint64_t ImageId;
+    uefi_ptr_t PtrImageIdName;
+    uint32_t Version;
+    uefi_ptr_t PtrVersionName;
+    efi_uintn_t Size;
+    uint64_t AttributesSupported;
+    uint64_t AttributesSetting;
+    uint64_t Compatibilities;
+    /* Introduced with DescriptorVersion 2+ */
+    uint32_t LowestSupportedImageVersion;
+    /* Introduced with DescriptorVersion 3+ */
+    uint32_t LastAttemptVersion;
+    uint32_t LastAttemptStatus;
+    uint64_t HardwareInstance;
+    /* Introduced with DescriptorVersion 4+ */
+    uefi_ptr_t PtrDependencies;
+} EFI_FIRMWARE_IMAGE_DESCRIPTOR;
+
+typedef __PACKED_STRUCT {
+    DescriptorVersion_t DescriptorVersion;
+    DescriptorSize_t DescriptorsSize;
+    DescriptorCount_t DescriptorCount;
+    EFI_FIRMWARE_IMAGE_DESCRIPTOR ImageDescriptor;
+    uint16_t *ImageName;
+    uint32_t ImageNameSize;
+    uint16_t *ImageVersionName;
+    uint32_t ImageVersionNameSize;
+} EFI_FIRMWARE_MANAGEMENT_PROTOCOL_IMAGE_INFO;
+
+
+static uint16_t corstone_image_name0[] = { 'C', 'O', 'R', 'S', 'T', 'O', 'N', 'E', '1', '0', '0', '0', '_', 'W', 'I', 'C', '\0' };
+static uint16_t corstone_version_name0[] = { 'C', 'O', 'R', 'S', 'T', 'O', 'N', 'E', '1', '0', '0', '0', '_', 'B', 'E', 'S', 'T', '\0'};
+
+static EFI_FIRMWARE_MANAGEMENT_PROTOCOL_IMAGE_INFO fmp_info[NUMBER_OF_FMP_IMAGES];
+
+extern struct efi_guid full_capsule_image_guid;
+
+static bool is_fmp_info_initialized = false;
+
+static void init_fmp_info(void)
+{
+    memset(fmp_info, 0,
+     sizeof(EFI_FIRMWARE_MANAGEMENT_PROTOCOL_IMAGE_INFO) * NUMBER_OF_FMP_IMAGES);
+
+    /* Fill information for the WIC.
+     * Add further details when partial image is supported.
+     */
+
+    fmp_info[0].DescriptorVersion = 4;
+    fmp_info[0].DescriptorCount = NUMBER_OF_FMP_IMAGES;
+    fmp_info[0].DescriptorsSize =
+                 sizeof(EFI_FIRMWARE_IMAGE_DESCRIPTOR) +
+                 sizeof(corstone_image_name0) + sizeof(corstone_version_name0);
+
+    fmp_info[0].ImageDescriptor.ImageIndex = 1;
+
+    memcpy(&fmp_info[0].ImageDescriptor.ImageTypeId, &full_capsule_image_guid,
+            sizeof(struct efi_guid));
+
+    fmp_info[0].ImageDescriptor.ImageId = 1;
+    fmp_info[0].ImageDescriptor.Version = FWU_IMAGE_INITIAL_VERSION;
+    fmp_info[0].ImageDescriptor.AttributesSupported = 1;
+    fmp_info[0].ImageDescriptor.AttributesSetting = (
+            IMAGE_ATTRIBUTE_IMAGE_UPDATABLE | IMAGE_ATTRIBUTE_RESET_REQUIRED);
+    fmp_info[0].ImageDescriptor.LowestSupportedImageVersion =
+            FWU_IMAGE_INITIAL_VERSION;
+    fmp_info[0].ImageDescriptor.LastAttemptVersion = FWU_IMAGE_INITIAL_VERSION;
+    fmp_info[0].ImageDescriptor.LastAttemptStatus = LAST_ATTEMPT_STATUS_SUCCESS;
+
+    fmp_info[0].ImageName = corstone_image_name0;
+    fmp_info[0].ImageNameSize = sizeof(corstone_image_name0);
+    fmp_info[0].ImageVersionName = corstone_version_name0;
+    fmp_info[0].ImageVersionNameSize = sizeof(corstone_version_name0);
+
+    is_fmp_info_initialized = true;
+
+    return;
+}
+
+enum fwu_agent_error_t fmp_set_image_info(struct efi_guid *guid,
+                     uint32_t current_version, uint32_t attempt_version,
+                     uint32_t last_attempt_status)
+{
+    enum fwu_agent_error_t status = FWU_AGENT_ERROR;
+
+    FWU_LOG_MSG("%s:%d Enter\n\r", __func__, __LINE__);
+
+    if (is_fmp_info_initialized == false) {
+        init_fmp_info();
+    }
+
+    for (int i = 0; i < NUMBER_OF_FMP_IMAGES; i++) {
+        if ((memcmp(guid, &fmp_info[i].ImageDescriptor.ImageTypeId,
+                        sizeof(struct efi_guid))) == 0)
+        {
+            FWU_LOG_MSG("FMP image update: image id = %u\n\r",
+                                    fmp_info[i].ImageDescriptor.ImageId);
+            fmp_info[i].ImageDescriptor.Version = current_version;
+            fmp_info[i].ImageDescriptor.LastAttemptVersion = attempt_version;
+            fmp_info[i].ImageDescriptor.LastAttemptStatus = last_attempt_status;
+            FWU_LOG_MSG("FMP image update: status = %u"
+                            "version=%u last_attempt_version=%u.\n\r",
+                            last_attempt_status, current_version,
+                            attempt_version);
+            status = FWU_AGENT_SUCCESS;
+            break;
+        }
+    }
+
+    FWU_LOG_MSG("%s:%d Exit.\n\r", __func__, __LINE__);
+    return status;
+}
+
+
+#define NO_OF_FMP_VARIABLES    (NUMBER_OF_FMP_IMAGES * NO_OF_FMP_VARIABLES_PER_IMAGE)
+
+static enum fwu_agent_error_t pack_image_info(void *buffer, uint32_t size)
+{
+    typedef __PACKED_STRUCT {
+        uint32_t variable_count;
+        uint32_t variable_size[NO_OF_FMP_VARIABLES];
+        uint8_t variable[];
+    } packed_buffer_t;
+
+    packed_buffer_t *packed_buffer = buffer;
+    int runner = 0;
+    int index = 0;
+    int current_size = sizeof(packed_buffer_t);
+    int size_requirement_1 = 0;
+    int size_requirement_2 = 0;
+
+    if (size < current_size) {
+        FWU_LOG_MSG("%s:%d Buffer too small.\n\r", __func__, __LINE__);
+        return FWU_AGENT_ERROR;
+    }
+
+    packed_buffer->variable_count = NO_OF_FMP_VARIABLES;
+
+    for (int i = 0; i < NUMBER_OF_FMP_IMAGES; i++) {
+
+       packed_buffer->variable_size[index++] = sizeof(DescriptorVersion_t);
+       packed_buffer->variable_size[index++] = sizeof(DescriptorSize_t);
+       packed_buffer->variable_size[index++] = sizeof(DescriptorCount_t);
+       packed_buffer->variable_size[index++] = sizeof(EFI_FIRMWARE_IMAGE_DESCRIPTOR);
+       packed_buffer->variable_size[index++] = fmp_info[i].ImageNameSize;
+       packed_buffer->variable_size[index++] = fmp_info[i].ImageVersionNameSize;
+
+       size_requirement_1 = sizeof(DescriptorVersion_t) + sizeof(DescriptorSize_t) +
+              sizeof(DescriptorCount_t) + sizeof(EFI_FIRMWARE_IMAGE_DESCRIPTOR);
+
+       size_requirement_2 = fmp_info[i].ImageNameSize + fmp_info[i].ImageVersionNameSize;
+
+       current_size += size_requirement_1 + size_requirement_2;
+
+       if (size < current_size) {
+           FWU_LOG_MSG("%s:%d Buffer too small.\n\r", __func__, __LINE__);
+           return FWU_AGENT_ERROR;
+       }
+
+       FWU_LOG_MSG("%s:%d ImageInfo size = %u, ImageName size = %u, "
+               "ImageVersionName size = %u\n\r", __func__, __LINE__,
+               sizeof(EFI_FIRMWARE_IMAGE_DESCRIPTOR), fmp_info[i].ImageNameSize,
+               fmp_info[i].ImageVersionNameSize);
+   
+       memcpy(&packed_buffer->variable[runner], &fmp_info[i], size_requirement_1);
+       runner += size_requirement_1;
+   
+       memcpy(&packed_buffer->variable[runner], fmp_info[i].ImageName,
+                                       fmp_info[i].ImageNameSize);
+       runner += fmp_info[i].ImageNameSize;
+   
+       memcpy(&packed_buffer->variable[runner], fmp_info[i].ImageVersionName,
+                                       fmp_info[i].ImageVersionNameSize);
+       runner += fmp_info[i].ImageVersionNameSize;
+
+    }
+
+    return FWU_AGENT_SUCCESS;
+}
+
+enum fwu_agent_error_t fmp_get_image_info(void *buffer, uint32_t size)
+{
+    enum fwu_agent_error_t status;
+
+    FWU_LOG_MSG("%s:%d Enter\n\r", __func__, __LINE__);
+
+    status = pack_image_info(buffer, size);
+
+    FWU_LOG_MSG("%s:%d Exit\n\r", __func__, __LINE__);
+
+    return status;
+}
+
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.h b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.h
+new file mode 100644
+index 0000000000..d876bd7cff
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_fmp.h
+@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2022, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef UEFI_FMP_H
+#define UEFI_FMP_H
+
+
+#include <stdint.h>
+#include "fwu_agent.h"
+#include "../fip_parser/external/uuid.h"
+
+/*
+ * Last Attempt Status Value
+ */
+
+#define LAST_ATTEMPT_STATUS_SUCCESS                                     0x00000000
+#define LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL                          0x00000001
+#define LAST_ATTEMPT_STATUS_ERROR_INSUFFICIENT_RESOURCES                0x00000002
+#define LAST_ATTEMPT_STATUS_ERROR_INCORRECT_VERSION                     0x00000003
+#define LAST_ATTEMPT_STATUS_ERROR_INVALID_FORMAT                        0x00000004
+#define LAST_ATTEMPT_STATUS_ERROR_AUTH_ERROR                            0x00000005
+#define LAST_ATTEMPT_STATUS_ERROR_PWR_EVT_AC                            0x00000006
+#define LAST_ATTEMPT_STATUS_ERROR_PWR_EVT_BATT                          0x00000007
+#define LAST_ATTEMPT_STATUS_ERROR_UNSATISFIED_DEPENDENCIES              0x00000008
+/* The LastAttemptStatus values of 0x1000 - 0x4000 are reserved for vendor usage. */
+#define LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL_VENDOR_RANGE_MIN         0x00001000
+#define LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL_VENDOR_RANGE_MAX         0x00004000
+
+
+
+/*
+ * Updates FMP information for the image matched by guid.
+ *
+ * guid : guid of the image
+ * current_version: current versions for the image
+ * attempt_version: attempted versions for the image
+ *
+ */
+enum fwu_agent_error_t fmp_set_image_info(struct efi_guid *guid,
+                     uint32_t current_version, uint32_t attempt_version,
+                     uint32_t last_attempt_status);
+
+/*
+ * Return fmp image information for all the updable images.
+ *
+ * buffer : pointer to the out buffer
+ * size : size of the buffer
+ *
+ */
+enum fwu_agent_error_t fmp_get_image_info(void *buffer, uint32_t size);
+
+#endif /* UEFI_FMP_H */
+diff --git a/platform/ext/target/arm/corstone1000/services/include/corstone1000_ioctl_requests.h b/platform/ext/target/arm/corstone1000/services/include/corstone1000_ioctl_requests.h
+index 8ac67346b6..c5f3537e9d 100644
+--- a/platform/ext/target/arm/corstone1000/services/include/corstone1000_ioctl_requests.h
+++ b/platform/ext/target/arm/corstone1000/services/include/corstone1000_ioctl_requests.h
+@@ -14,19 +14,7 @@
+ enum corstone1000_ioctl_id_t {
+    IOCTL_CORSTONE1000_FWU_FLASH_IMAGES = 0,
+    IOCTL_CORSTONE1000_FWU_HOST_ACK,
+   IOCTL_CORSTONE1000_FMP_GET_IMAGE_INFO,
+ };
+ 
+-
+-typedef struct corstone1000_ioctl_in_params {
+-
+-    uint32_t ioctl_id;
+-
+-} corstone1000_ioctl_in_params_t;
+-
+-typedef struct corstone1000_ioctl_out_params {
+-
+-    int32_t result;
+-
+-} corstone1000_ioctl_out_params_t;
+-
+ #endif /* CORSTONE1000_IOCTL_REQUESTS_H */
+diff --git a/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c b/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+index 5b3f3e14a2..41305ed966 100644
+--- a/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+++ b/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+@@ -9,6 +9,7 @@
+ #include "platform_description.h"
+ #include "corstone1000_ioctl_requests.h"
+ #include "fwu_agent.h"
+#include "uefi_fmp.h"
+ 
+ void tfm_platform_hal_system_reset(void)
+ {
+@@ -36,6 +37,14 @@ enum tfm_platform_err_t tfm_platform_hal_ioctl(tfm_platform_ioctl_req_t request,
+             corstone1000_fwu_host_ack();
+             break;
+ 
+        case IOCTL_CORSTONE1000_FMP_GET_IMAGE_INFO:
+            if (out_vec == NULL) {
+                ret = TFM_PLATFORM_ERR_INVALID_PARAM;
+                break;
+            }
+            fmp_get_image_info(out_vec[0].base, out_vec[0].len);
+            break;
+
+         default:
+             ret = TFM_PLATFORM_ERR_NOT_SUPPORTED;
+             break;
+-- 
+2.25.1
+
@@ -0,0 +1,51 @@
+From 492c887c8dff97ea1b8a11b4e729620d3744ac38 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Mon, 30 May 2022 12:38:23 +0100
+Subject: [PATCH 6/6] corstone1000: remove two partition configuration
+
+Previously to run tf-m test, a larger partition was created
+which allowed all default test binaries to be included.
+The patch revert the change because any partition might
+not be enough to hold all test binaries in the future.
+So its better to run few test at a time instead of creating
+a larger partition.
+
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+Change-Id: I223fe45f2de014dbcadc6ac12c321c524701116a
+Upstream-Status: Accepted [TF-Mv1.7.0]
+---
+ platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt       | 1 -
+ platform/ext/target/arm/corstone1000/partition/flash_layout.h | 4 ----
+ 2 files changed, 5 deletions(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+index d39c5ae91d..f1ae1ebd47 100644
+--- a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+@@ -291,7 +291,6 @@ target_compile_definitions(signing_layout_for_bl2
+     PRIVATE
+         MCUBOOT_IMAGE_NUMBER=${BL1_IMAGE_NUMBER}
+         BL1
+-        $<$<BOOL:${TFM_S_REG_TEST}>:TFM_S_REG_TEST>
+ )
+ 
+ target_include_directories(signing_layout_for_bl2
+diff --git a/platform/ext/target/arm/corstone1000/partition/flash_layout.h b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+index b0319bb319..50a0a11fc8 100644
+--- a/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+++ b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+@@ -119,11 +119,7 @@
+  *
+  */
+ #define SE_BL2_PARTITION_SIZE           (0x19000)    /* 100 KB */
+-#ifdef TFM_S_REG_TEST
+-#define TFM_PARTITION_SIZE              (0x61C00)    /* 391 KB */
+-#else
+ #define TFM_PARTITION_SIZE              (0x5E000)    /* 376 KB */
+-#endif
+ #define FIP_PARTITION_SIZE              (0x200000)   /* 2 MB */
+ #define KERNEL_PARTITION_SIZE           (0xC00000)   /* 12 MB */
+ 
+-- 
+2.25.1
+
@@ -0,0 +1,27 @@
+From 5be42e1c05205209fc3988f0df30a02da95c2448 Mon Sep 17 00:00:00 2001
+From: Rui Miguel Silva <rui.silva@linaro.org>
+Date: Wed, 2 Nov 2022 00:12:35 +0000
+Subject: [PATCH] corstone1000: adjust PS asset configuration
+
+Adjust protected storage asset configuration to be more inline
+with the one in trusted service side, that would make thinks
+work when testing and using more than the default variables.
+
+Upstream-Status: Pending
+Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
+---
+ platform/ext/target/arm/corstone1000/config.cmake | 1 ++
+ 1 file changed, 1 insertions(+)
+
+diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
+index ab0fe17ba886..c2b4b646e6b0 100644
+--- a/platform/ext/target/arm/corstone1000/config.cmake
+++ b/platform/ext/target/arm/corstone1000/config.cmake
+@@ -56,3 +56,4 @@ set(PS_ENCRYPTION                           OFF          CACHE BOOL      "Enable
+ set(PS_ROLLBACK_PROTECTION                  OFF          CACHE BOOL      "Enable rollback protection for Protected Storage partition")
+ 
+ set(PLATFORM_SERVICE_OUTPUT_BUFFER_SIZE     256          CACHE STRING    "Size of output buffer in platform service.")
+set(PS_NUM_ASSETS                           "40"        CACHE STRING    "The maximum number of assets to be stored in the Protected Storage area")
+-- 
+2.38.1
+
@@ -1,43 +0,0 @@
-From 0ee6842d348e206d511ec89a7ff5b29a6f325456 Mon Sep 17 00:00:00 2001
-From: Rui Miguel Silva <rui.silva@linaro.org>
-Date: Sun, 29 Jan 2023 19:01:08 +0000
-Subject: [PATCH] corstone1000: make sure to write fwu metadata to replica 2
-
-u-boot and other, before using fwu metadata validate if
-the copies in both replicas are good. so, make sure
-we write fwu metadata in both replicas.
-
-Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/20550]
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
- .../arm/corstone1000/fw_update_agent/fwu_agent.c   | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
-index e1fa297ac923..215902ce71b9 100644
--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
-+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
-@@ -238,6 +238,20 @@ static enum fwu_agent_error_t metadata_write(
-         return FWU_AGENT_ERROR;
-     }
- 
-+    FWU_LOG_MSG("%s: enter: flash addr = %u, size = %d\n\r", __func__,
-+                  FWU_METADATA_REPLICA_2_OFFSET, sizeof(struct fwu_metadata));
-+
-+    ret = FWU_METADATA_FLASH_DEV.EraseSector(FWU_METADATA_REPLICA_2_OFFSET);
-+    if (ret != ARM_DRIVER_OK) {
-+        return FWU_AGENT_ERROR;
-+    }
-+
-+    ret = FWU_METADATA_FLASH_DEV.ProgramData(FWU_METADATA_REPLICA_2_OFFSET,
-+                                p_metadata, sizeof(struct fwu_metadata));
-+    if (ret < 0 || ret != sizeof(struct fwu_metadata)) {
-+        return FWU_AGENT_ERROR;
-+    }
-+
-     FWU_LOG_MSG("%s: success: active = %u, previous = %d\n\r", __func__,
-                   p_metadata->active_index, p_metadata->previous_active_index);
-     return FWU_AGENT_SUCCESS;
-- 
-2.39.1
-
@@ -1,307 +0,0 @@
-From 4a4d1b0a5a2455ad799a45f7f87c0c9fd0173034 Mon Sep 17 00:00:00 2001
-From: Rui Miguel Silva <rui.silva@linaro.org>
-Date: Wed, 29 Mar 2023 10:58:32 +0100
-Subject: [PATCH] Platform: Corstone1000: get fwu and private metadata from gpt
-
-Read and Write the FWU metadata and private metadata using instead
-static flash offsets get the partitions and start address from gpt
-partition table.
-
-Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/20551]
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
- .../target/arm/corstone1000/CMakeLists.txt    |  7 ++
- .../corstone1000/fw_update_agent/fwu_agent.c  | 90 +++++++++++++++----
- .../target/arm/corstone1000/partition/efi.h   |  1 +
- .../arm/corstone1000/partition/partition.c    | 14 +++
- .../arm/corstone1000/partition/partition.h    |  1 +
- .../ext/target/arm/corstone1000/platform.h    |  5 ++
- 6 files changed, 99 insertions(+), 19 deletions(-)
-
-diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
-index 19863bcdb6d2..f232c7639bd5 100644
--- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
-+++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
-@@ -64,6 +64,8 @@ target_include_directories(platform_s
-         cc312
-         fw_update_agent
-         soft_crc
-+        io
-+        partition
- )
- 
- target_sources(platform_s
-@@ -81,6 +83,11 @@ target_sources(platform_s
-         fw_update_agent/fwu_agent.c
-         fw_update_agent/uefi_fmp.c
-         soft_crc/soft_crc.c
-+        io/io_block.c
-+        io/io_flash.c
-+        io/io_storage.c
-+        partition/partition.c
-+        partition/gpt.c
-         $<$<NOT:$<BOOL:${PLATFORM_DEFAULT_OTP}>>:${PLATFORM_DIR}/ext/accelerator/cc312/otp_cc312.c>
- )
- 
-diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
-index b6ed656de833..9c76b25a3a38 100644
--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
-+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
-@@ -14,6 +14,8 @@
- #include "region_defs.h"
- #include "uefi_capsule_parser.h"
- #include "flash_common.h"
-+#include "partition.h"
-+#include "platform.h"
- #include "platform_base_address.h"
- #include "platform_description.h"
- #include "tfm_plat_nv_counters.h"
-@@ -146,6 +148,8 @@ extern ARM_DRIVER_FLASH FWU_METADATA_FLASH_DEV;
- static enum fwu_agent_error_t private_metadata_read(
-         struct fwu_private_metadata* p_metadata)
- {
-+    partition_entry_t *part;
-+    uuid_t private_uuid = PRIVATE_METADATA_TYPE_UUID;
-     int ret;
- 
-     FWU_LOG_MSG("%s: enter\n\r", __func__);
-@@ -154,7 +158,13 @@ static enum fwu_agent_error_t private_metadata_read(
-         return FWU_AGENT_ERROR;
-     }
- 
-    ret = FWU_METADATA_FLASH_DEV.ReadData(FWU_PRIVATE_METADATA_REPLICA_1_OFFSET, p_metadata,
-+    part = get_partition_entry_by_type(&private_uuid);
-+    if (!part) {
-+        FWU_LOG_MSG("Private metadata partition not found\n\r");
-+        return FWU_AGENT_ERROR;
-+    }
-+
-+    ret = FWU_METADATA_FLASH_DEV.ReadData(part->start, p_metadata,
-                                           sizeof(struct fwu_private_metadata));
-     if (ret < 0 || ret != sizeof(struct fwu_private_metadata)) {
-         return FWU_AGENT_ERROR;
-@@ -169,6 +179,8 @@ static enum fwu_agent_error_t private_metadata_read(
- static enum fwu_agent_error_t private_metadata_write(
-         struct fwu_private_metadata* p_metadata)
- {
-+    uuid_t private_uuid = PRIVATE_METADATA_TYPE_UUID;
-+    partition_entry_t *part;
-     int ret;
- 
-     FWU_LOG_MSG("%s: enter: boot_index = %u\n\r", __func__,
-@@ -178,12 +190,18 @@ static enum fwu_agent_error_t private_metadata_write(
-         return FWU_AGENT_ERROR;
-     }
- 
-    ret = FWU_METADATA_FLASH_DEV.EraseSector(FWU_PRIVATE_METADATA_REPLICA_1_OFFSET);
-+    part = get_partition_entry_by_type(&private_uuid);
-+    if (!part) {
-+        FWU_LOG_MSG("Private metadata partition not found\n\r");
-+        return FWU_AGENT_ERROR;
-+    }
-+
-+    ret = FWU_METADATA_FLASH_DEV.EraseSector(part->start);
-     if (ret != ARM_DRIVER_OK) {
-         return FWU_AGENT_ERROR;
-     }
- 
-    ret = FWU_METADATA_FLASH_DEV.ProgramData(FWU_PRIVATE_METADATA_REPLICA_1_OFFSET,
-+    ret = FWU_METADATA_FLASH_DEV.ProgramData(part->start,
-                                 p_metadata, sizeof(struct fwu_private_metadata));
-     if (ret < 0 || ret != sizeof(struct fwu_private_metadata)) {
-         return FWU_AGENT_ERROR;
-@@ -219,16 +237,25 @@ static enum fwu_agent_error_t metadata_validate(struct fwu_metadata *p_metadata)
- 
- static enum fwu_agent_error_t metadata_read_without_validation(struct fwu_metadata *p_metadata)
- {
-+    uuid_t metadata_uuid = FWU_METADATA_TYPE_UUID;
-+    partition_entry_t *part;
-     int ret;
- 
-    FWU_LOG_MSG("%s: enter: flash addr = %u, size = %d\n\r", __func__,
-                  FWU_METADATA_REPLICA_1_OFFSET, sizeof(struct fwu_metadata));
-
-     if (!p_metadata) {
-         return FWU_AGENT_ERROR;
-     }
- 
-    ret = FWU_METADATA_FLASH_DEV.ReadData(FWU_METADATA_REPLICA_1_OFFSET,
-+    part = get_partition_entry_by_type(&metadata_uuid);
-+    if (!part) {
-+        FWU_LOG_MSG("%s: FWU metadata partition not found\n\r", __func__);
-+        return FWU_AGENT_ERROR;
-+    }
-+
-+    FWU_LOG_MSG("%s: enter: flash addr = %u, size = %d\n\r", __func__,
-+                  part->start, sizeof(struct fwu_metadata));
-+
-+
-+    ret = FWU_METADATA_FLASH_DEV.ReadData(part->start,
-                                 p_metadata, sizeof(struct fwu_metadata));
-     if (ret < 0 || ret != sizeof(struct fwu_metadata)) {
-         return FWU_AGENT_ERROR;
-@@ -242,16 +269,24 @@ static enum fwu_agent_error_t metadata_read_without_validation(struct fwu_metada
- 
- static enum fwu_agent_error_t metadata_read(struct fwu_metadata *p_metadata)
- {
-+    uuid_t metadata_uuid = FWU_METADATA_TYPE_UUID;
-+    partition_entry_t *part;
-     int ret;
- 
-    FWU_LOG_MSG("%s: enter: flash addr = %u, size = %d\n\r", __func__,
-                  FWU_METADATA_REPLICA_1_OFFSET, sizeof(struct fwu_metadata));
-
-     if (!p_metadata) {
-         return FWU_AGENT_ERROR;
-     }
- 
-    ret = FWU_METADATA_FLASH_DEV.ReadData(FWU_METADATA_REPLICA_1_OFFSET,
-+    part = get_partition_entry_by_type(&metadata_uuid);
-+    if (!part) {
-+        FWU_LOG_MSG("%s: FWU metadata partition not found\n\r", __func__);
-+        return FWU_AGENT_ERROR;
-+    }
-+
-+    FWU_LOG_MSG("%s: enter: flash addr = %u, size = %d\n\r", __func__,
-+                  part->start, sizeof(struct fwu_metadata));
-+
-+    ret = FWU_METADATA_FLASH_DEV.ReadData(part->start,
-                                 p_metadata, sizeof(struct fwu_metadata));
-     if (ret < 0 || ret != sizeof(struct fwu_metadata)) {
-         return FWU_AGENT_ERROR;
-@@ -270,35 +305,49 @@ static enum fwu_agent_error_t metadata_read(struct fwu_metadata *p_metadata)
- static enum fwu_agent_error_t metadata_write(
-                         struct fwu_metadata *p_metadata)
- {
-+    uuid_t metadata_uuid = FWU_METADATA_TYPE_UUID;
-+    partition_entry_t *part;
-     int ret;
- 
-    FWU_LOG_MSG("%s: enter: flash addr = %u, size = %d\n\r", __func__,
-                  FWU_METADATA_REPLICA_1_OFFSET, sizeof(struct fwu_metadata));
-
-     if (!p_metadata) {
-         return FWU_AGENT_ERROR;
-     }
- 
-    ret = FWU_METADATA_FLASH_DEV.EraseSector(FWU_METADATA_REPLICA_1_OFFSET);
-+    part = get_partition_entry_by_type(&metadata_uuid);
-+    if (!part) {
-+        FWU_LOG_MSG("%s: FWU metadata partition not found\n\r", __func__);
-+        return FWU_AGENT_ERROR;
-+    }
-+
-+    FWU_LOG_MSG("%s: enter: flash addr = %u, size = %d\n\r", __func__,
-+                  part->start, sizeof(struct fwu_metadata));
-+
-+    ret = FWU_METADATA_FLASH_DEV.EraseSector(part->start);
-     if (ret != ARM_DRIVER_OK) {
-         return FWU_AGENT_ERROR;
-     }
- 
-    ret = FWU_METADATA_FLASH_DEV.ProgramData(FWU_METADATA_REPLICA_1_OFFSET,
-+    ret = FWU_METADATA_FLASH_DEV.ProgramData(part->start,
-                                 p_metadata, sizeof(struct fwu_metadata));
-     if (ret < 0 || ret != sizeof(struct fwu_metadata)) {
-         return FWU_AGENT_ERROR;
-     }
- 
-+    part = get_partition_replica_by_type(&metadata_uuid);
-+    if (!part) {
-+        FWU_LOG_MSG("%s: FWU metadata replica partition not found\n\r", __func__);
-+        return FWU_AGENT_ERROR;
-+    }
-+
-     FWU_LOG_MSG("%s: enter: flash addr = %u, size = %d\n\r", __func__,
-                  FWU_METADATA_REPLICA_2_OFFSET, sizeof(struct fwu_metadata));
-+                  part->start, sizeof(struct fwu_metadata));
- 
-    ret = FWU_METADATA_FLASH_DEV.EraseSector(FWU_METADATA_REPLICA_2_OFFSET);
-+    ret = FWU_METADATA_FLASH_DEV.EraseSector(part->start);
-     if (ret != ARM_DRIVER_OK) {
-         return FWU_AGENT_ERROR;
-     }
- 
-    ret = FWU_METADATA_FLASH_DEV.ProgramData(FWU_METADATA_REPLICA_2_OFFSET,
-+    ret = FWU_METADATA_FLASH_DEV.ProgramData(part->start,
-                                 p_metadata, sizeof(struct fwu_metadata));
-     if (ret < 0 || ret != sizeof(struct fwu_metadata)) {
-         return FWU_AGENT_ERROR;
-@@ -355,6 +404,9 @@ enum fwu_agent_error_t fwu_metadata_provision(void)
- 
-     FWU_LOG_MSG("%s: enter\n\r", __func__);
- 
-+    plat_io_storage_init();
-+    partition_init(PLATFORM_GPT_IMAGE);
-+
-     ret = fwu_metadata_init();
-     if (ret) {
-         return ret;
-diff --git a/platform/ext/target/arm/corstone1000/partition/efi.h b/platform/ext/target/arm/corstone1000/partition/efi.h
-index f66daffb32d6..7e6a4bc883e6 100644
--- a/platform/ext/target/arm/corstone1000/partition/efi.h
-+++ b/platform/ext/target/arm/corstone1000/partition/efi.h
-@@ -8,6 +8,7 @@
- #ifndef DRIVERS_PARTITION_EFI_H
- #define DRIVERS_PARTITION_EFI_H
- 
-+#include <stdint.h>
- #include <string.h>
- 
- #include "uuid.h"
-diff --git a/platform/ext/target/arm/corstone1000/partition/partition.c b/platform/ext/target/arm/corstone1000/partition/partition.c
-index afc6aa1c5cb8..d76e123d728f 100644
--- a/platform/ext/target/arm/corstone1000/partition/partition.c
-+++ b/platform/ext/target/arm/corstone1000/partition/partition.c
-@@ -293,6 +293,20 @@ const partition_entry_t *get_partition_entry_by_type(const uuid_t *type_uuid) {
-     return NULL;
- }
- 
-+const partition_entry_t *get_partition_replica_by_type(const uuid_t *type_uuid) {
-+    int count = 0;
-+    int i;
-+
-+    for (i = 0; i < list.entry_count; i++) {
-+        if (guidcmp(type_uuid, &list.list[i].type_guid) == 0) {
-+            if (++count == 2)
-+                 return &list.list[i];
-+        }
-+    }
-+
-+    return NULL;
-+}
-+
- const partition_entry_t *get_partition_entry_by_uuid(const uuid_t *part_uuid) {
-     int i;
- 
-diff --git a/platform/ext/target/arm/corstone1000/partition/partition.h b/platform/ext/target/arm/corstone1000/partition/partition.h
-index 54af47aca415..450cf20a073c 100644
--- a/platform/ext/target/arm/corstone1000/partition/partition.h
-+++ b/platform/ext/target/arm/corstone1000/partition/partition.h
-@@ -40,6 +40,7 @@ typedef struct partition_entry_list {
- int load_partition_table(unsigned int image_id);
- const partition_entry_t *get_partition_entry(const char *name);
- const partition_entry_t *get_partition_entry_by_type(const uuid_t *type_guid);
-+const partition_entry_t *get_partition_replica_by_type(const uuid_t *type_uuid);
- const partition_entry_t *get_partition_entry_by_uuid(const uuid_t *part_uuid);
- const partition_entry_list_t *get_partition_entry_list(void);
- void partition_init(unsigned int image_id);
-diff --git a/platform/ext/target/arm/corstone1000/platform.h b/platform/ext/target/arm/corstone1000/platform.h
-index 894f5e309029..a88093ed4f9d 100644
--- a/platform/ext/target/arm/corstone1000/platform.h
-+++ b/platform/ext/target/arm/corstone1000/platform.h
-@@ -13,6 +13,11 @@ typedef enum {
-     PLATFORM_IMAGE_COUNT,
- }platform_image_id_t;
- 
-+#define FWU_METADATA_TYPE_UUID \
-+     ((uuid_t){{0xa0, 0x84, 0x7a, 0x8a}, {0x87, 0x83}, {0xf6, 0x40}, 0xab,  0x41, {0xa8, 0xb9, 0xa5, 0xa6, 0x0d, 0x23}})
-+#define PRIVATE_METADATA_TYPE_UUID \
-+     ((uuid_t){{0xc3, 0x5d, 0xb5, 0xec}, {0xb7, 0x8a}, {0x84, 0x4a}, 0xab,  0x56, {0xeb, 0x0a, 0x99, 0x74, 0xdb, 0x42}})
-+
- /* Initialize io storage of the platform */
- int32_t plat_io_storage_init(void);
- 
-- 
-2.40.0
-
@@ -1,47 +0,0 @@
-From 33d8f45c8f14e9e0d7add7d2804ed76c7d7fd0c2 Mon Sep 17 00:00:00 2001
-From: Emekcan Aras <emekcan.aras@arm.com>
-Date: Sat, 25 Feb 2023 09:04:38 +0000
-Subject: [PATCH 1/7] Platform: corstone1000: Add watchdog_reset_timer
-
-From: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
-
-Implement watchdog_reset_timer
-
-Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/20552]
-Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
-Change-Id: I2684ca54f9a456b22efcbcd364abef3537d4c91f
---
- .../arm/corstone1000/Native_Driver/watchdog.c   | 17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
-diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.c b/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.c
-index 4e024a3b1..f6e182194 100644
--- a/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.c
-+++ b/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.c
-@@ -80,6 +80,23 @@ int corstone1000_watchdog_init()
-     return ARM_DRIVER_OK;
- }
- 
-+/**
-+ *  \brief Reset the Secure Enclave & SoC Watchdog's.
-+ *
-+ *  \returns ARM Driver return code.
-+ */
-+int corstone1000_watchdog_reset_timer() {
-+    /* Unlock, clear and lock the watchdog timer */
-+    arm_watchdog_unlock(&SE_WD_DEV);
-+    arm_watchdog_clear_interrupt_and_refresh_counter(&SE_WD_DEV);
-+    arm_watchdog_lock(&SE_WD_DEV);
-+    /* Unlock, clear and lock the watchdog timer */
-+    arm_watchdog_unlock(&SOC_WD_DEV);
-+    arm_watchdog_clear_interrupt_and_refresh_counter(&SOC_WD_DEV);
-+    arm_watchdog_lock(&SOC_WD_DEV);
-+    return ARM_DRIVER_OK;
-+}
-+
- /*
-  * Secure Host Watchdog WS1 Handler
-  * efi_reset_system from the host triggers "Secure
-- 
-2.17.1
-
@@ -1,202 +0,0 @@
-From d5a7cde4648d2247f83a0f259aa088152199dfbd Mon Sep 17 00:00:00 2001
-From: Emekcan Aras <emekcan.aras@arm.com>
-Date: Mon, 27 Feb 2023 20:58:30 +0000
-Subject: [PATCH 2/6] Platform: corstone1000: Replace MCUBOOT BL1 by TFM's
- (BL2)
-
-From: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
-
-Set region_defs of BL2 correctly
-Set FLASH Areas 0 and 1 to have BL2
-Set FLASH Areas 2 and 3 to have TFM
-Set FLASH Areas 4 and 5 to have FIP
-Initialize FLASH in BL1_2 boot platform code
-
-Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/20554]
-Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
-Change-Id: I987d29cb6318b8b30cafab67d24f446aaadfe500
---
- .../arm/corstone1000/bl1/boot_hal_bl1.c       | 14 +++++++
- .../target/arm/corstone1000/bl2_flash_map.c   |  8 ++--
- .../ext/target/arm/corstone1000/config.cmake  |  3 ++
- .../arm/corstone1000/partition/flash_layout.h | 41 +++++++++++++------
- .../arm/corstone1000/partition/region_defs.h  |  4 +-
- 5 files changed, 51 insertions(+), 19 deletions(-)
-
-diff --git a/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1.c b/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1.c
-index 678342443..2124720b2 100644
--- a/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1.c
-+++ b/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1.c
-@@ -638,6 +638,13 @@ int32_t boot_platform_init(void)
- 
- int32_t boot_platform_post_init(void)
- {
-+    int32_t result;
-+    if (platform_code_is_bl1_2) {
-+        result = FLASH_DEV_NAME.Initialize(NULL);
-+        if (result != ARM_DRIVER_OK) {
-+            return 1;
-+        }
-+    }
-     return 0;
- }
- 
-@@ -665,6 +672,13 @@ void boot_platform_quit(struct boot_arm_vector_table *vt)
-     stdio_uninit();
- #endif /* defined(TFM_BL1_LOGGING) || defined(TEST_BL1_1) || defined(TEST_BL1_2) */
- 
-+    if (platform_code_is_bl1_2) {
-+        result = FLASH_DEV_NAME.Uninitialize();
-+        if (result != ARM_DRIVER_OK) {
-+            return 1;
-+        }
-+    }
-+
-     result = corstone1000_watchdog_reset_timer();
-     if (result != ARM_DRIVER_OK) {
-         while (1);
-diff --git a/platform/ext/target/arm/corstone1000/bl2_flash_map.c b/platform/ext/target/arm/corstone1000/bl2_flash_map.c
-index 599f80b41..2b1cdfa19 100644
--- a/platform/ext/target/arm/corstone1000/bl2_flash_map.c
-+++ b/platform/ext/target/arm/corstone1000/bl2_flash_map.c
-@@ -25,14 +25,14 @@ extern ARM_DRIVER_FLASH FLASH_DEV_NAME;
-  */
- struct flash_area flash_map[] = {
-     {
-        .fa_id = FLASH_AREA_0_ID,
-+        .fa_id = FLASH_AREA_2_ID,
-         .fa_device_id = FLASH_DEVICE_ID,
-         .fa_driver = &FLASH_DEV_NAME,
-         .fa_off = FLASH_INVALID_OFFSET,
-         .fa_size = FLASH_INVALID_SIZE,
-     },
-     {
-        .fa_id = FLASH_AREA_1_ID,
-+        .fa_id = FLASH_AREA_3_ID,
-         .fa_device_id = FLASH_DEVICE_ID,
-         .fa_driver = &FLASH_DEV_NAME,
-         .fa_off = FLASH_INVALID_OFFSET,
-@@ -40,14 +40,14 @@ struct flash_area flash_map[] = {
-     },
- #ifndef TFM_S_REG_TEST
-     {
-        .fa_id = FLASH_AREA_2_ID,
-+        .fa_id = FLASH_AREA_4_ID,
-         .fa_device_id = FLASH_DEVICE_ID,
-         .fa_driver = &FLASH_DEV_NAME,
-         .fa_off = FLASH_INVALID_OFFSET,
-         .fa_size = FLASH_INVALID_SIZE,
-     },
-     {
-        .fa_id = FLASH_AREA_3_ID,
-+        .fa_id = FLASH_AREA_5_ID,
-         .fa_device_id = FLASH_DEVICE_ID,
-         .fa_driver = &FLASH_DEV_NAME,
-         .fa_off = FLASH_INVALID_OFFSET,
-diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
-index 1b0675404..bec6b84f0 100644
--- a/platform/ext/target/arm/corstone1000/config.cmake
-+++ b/platform/ext/target/arm/corstone1000/config.cmake
-@@ -16,6 +16,9 @@ set(TFM_BL1_SOFTWARE_CRYPTO             OFF        CACHE BOOL     "Whether BL1_1
- set(TFM_BL1_MEMORY_MAPPED_FLASH         OFF        CACHE BOOL     "Whether BL1 can directly access flash content")
- set(TFM_BL1_PQ_CRYPTO                   OFF        CACHE BOOL     "Enable LMS PQ crypto for BL2 verification. This is experimental and should not yet be used in production")
- 
-+set(TFM_BL2_IMAGE_FLASH_AREA_NUM        0          CACHE STRING   "Which flash area BL2 is stored in")
-+set(MCUBOOT_S_IMAGE_FLASH_AREA_NUM      2          CACHE STRING   "ID of the flash area containing the primary Secure image")
-+
- set(BL2                                 ON         CACHE BOOL     "Whether to build BL2")
- set(BL2_TRAILER_SIZE                    0x800      CACHE STRING   "Trailer size")
- set(DEFAULT_MCUBOOT_FLASH_MAP           OFF        CACHE BOOL     "Whether to use the default flash map defined by TF-M project")
-diff --git a/platform/ext/target/arm/corstone1000/partition/flash_layout.h b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
-index a95ff63ef..41b4c6323 100644
--- a/platform/ext/target/arm/corstone1000/partition/flash_layout.h
-+++ b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
-@@ -136,23 +136,38 @@
- #define BANK_PARTITION_SIZE             (0xFE0000)   /* 15.875 MB */
- #define TFM_PARTITION_SIZE              (0x5E000)    /* 376 KB */
- 
-/* Macros needed to imgtool.py, used when creating BL2 signed image */
-#define BL2_IMAGE_LOAD_ADDRESS          (SRAM_BASE + TFM_PARTITION_SIZE + BL2_DATA_GAP_SIZE)
-#define BL2_IMAGE_OFFSET                (0x0)
-#define BL2_IMAGE_MAX_SIZE              (SE_BL2_PARTITION_SIZE)
-+/************************************************************/
-+/* Bank : Images flash offsets are with respect to the bank */
-+/************************************************************/
- 
-/* Image 1: TF-M primary and secondary images */
-+/* Image 0: BL2 primary and secondary images */
- #define FLASH_AREA_0_ID                 (1)
-#define FLASH_AREA_0_SIZE               (TFM_PARTITION_SIZE)
-+#define FLASH_AREA_0_OFFSET             (0) /* starting from 0th offset of the bank */
-+#define FLASH_AREA_0_SIZE               (SE_BL2_PARTITION_SIZE)
-+
- #define FLASH_AREA_1_ID                 (FLASH_AREA_0_ID + 1)
-#define FLASH_AREA_1_SIZE               (TFM_PARTITION_SIZE)
-+#define FLASH_AREA_1_OFFSET             (FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE)
-+#define FLASH_AREA_1_SIZE               (SE_BL2_PARTITION_SIZE)
-+
-+/* Image 1: TF-M primary and secondary images */
-+#define FLASH_AREA_2_ID                 (1)
-+#define FLASH_AREA_2_SIZE               (TFM_PARTITION_SIZE)
-+#define FLASH_AREA_3_ID                 (FLASH_AREA_2_ID + 1)
-+#define FLASH_AREA_3_SIZE               (TFM_PARTITION_SIZE)
- 
- /* Image 2: Host FIP */
- #define FIP_SIGNATURE_AREA_SIZE         (0x1000)      /* 4 KB */
- 
- /* Host BL2 (TF-A) primary and secondary image. */
-#define FLASH_AREA_2_ID                 (FLASH_AREA_1_ID + 1)
-#define FLASH_AREA_3_ID                 (FLASH_AREA_2_ID + 1)
-+#define FLASH_AREA_4_ID                 (FLASH_AREA_3_ID + 1)
-+#define FLASH_AREA_5_ID                 (FLASH_AREA_4_ID + 1)
-+
-+#define BL1_FLASH_AREA_IMAGE_PRIMARY(x)     (((x) == 0) ? FLASH_AREA_0_ID : \
-+                                                          255 )
-+#define BL1_FLASH_AREA_IMAGE_SECONDARY(x)   (((x) == 0) ? FLASH_AREA_1_ID : \
-+                                                          255 )
-+
-+#define BL1_FLASH_AREA_IMAGE_SCRATCH        255
- 
- /* Macros needed to imgtool.py, used when creating TF-M signed image */
- #define S_IMAGE_LOAD_ADDRESS            (SRAM_BASE)
-@@ -161,11 +176,11 @@
- #define NON_SECURE_IMAGE_OFFSET         (TFM_PARTITION_SIZE)
- #define NON_SECURE_IMAGE_MAX_SIZE       (0x0)
- 
-#define FLASH_AREA_IMAGE_PRIMARY(x)     (((x) == 0) ? FLASH_AREA_0_ID : \
-                                         ((x) == 1) ? FLASH_AREA_2_ID : \
-+#define FLASH_AREA_IMAGE_PRIMARY(x)     (((x) == 0) ? FLASH_AREA_2_ID : \
-+                                         ((x) == 1) ? FLASH_AREA_4_ID : \
-                                                       255 )
-#define FLASH_AREA_IMAGE_SECONDARY(x)   (((x) == 0) ? FLASH_AREA_1_ID : \
-                                         ((x) == 1) ? FLASH_AREA_3_ID : \
-+#define FLASH_AREA_IMAGE_SECONDARY(x)   (((x) == 0) ? FLASH_AREA_3_ID : \
-+                                         ((x) == 1) ? FLASH_AREA_5_ID : \
-                                                       255 )
- 
- #define FLASH_AREA_IMAGE_SCRATCH        255
-diff --git a/platform/ext/target/arm/corstone1000/partition/region_defs.h b/platform/ext/target/arm/corstone1000/partition/region_defs.h
-index 8157c36bf..fc9f734f6 100644
--- a/platform/ext/target/arm/corstone1000/partition/region_defs.h
-+++ b/platform/ext/target/arm/corstone1000/partition/region_defs.h
-@@ -48,7 +48,7 @@
-             (TFM_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE)
- 
- #define IMAGE_BL2_CODE_SIZE \
-            (SE_BL2_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE)
-+            (SE_BL2_PARTITION_SIZE - BL1_HEADER_SIZE - BL1_TRAILER_SIZE)
- 
- /* Secure regions */
- #define S_CODE_START            (SRAM_BASE + BL2_HEADER_SIZE)
-@@ -86,7 +86,7 @@
- 
- /* SE BL2 regions */
- #define BL2_IMAGE_START   (SRAM_BASE + SRAM_SIZE - SE_BL2_PARTITION_SIZE)
-#define BL2_CODE_START    (BL2_IMAGE_START + BL2_HEADER_SIZE)
-+#define BL2_CODE_START    (BL2_IMAGE_START + BL1_HEADER_SIZE)
- #define BL2_CODE_SIZE     (IMAGE_BL2_CODE_SIZE)
- #define BL2_CODE_LIMIT    (BL2_CODE_START + BL2_CODE_SIZE - 1)
- 
-- 
-2.17.1
-
--- a/Show More
+++ b/Show More