kas: corstone1000: update the FVP script repo SHA

Setting the model script SHA to use the right FVP options. Change-Id: I7f92fb97466bf4f5f48b8d184a396bf87bdeb401 Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>
arm-bsp/trusted-firmware-m: corstone1000: update TF-M SHA
2026-07-26 07:07:16 +00:00 · 2021-12-15 14:09:17 -05:00 · 2021-12-14 13:00:09 -05:00 · 2021-12-14 07:00:09 -05:00 · 2021-12-14 07:00:09 -05:00 · 2021-12-14 07:00:09 -05:00
140 changed files with 20145 additions and 244 deletions
@@ -1,9 +1,7 @@
 image: ghcr.io/siemens/kas/kas

-# First do a common bootstrap, and then build all the targets
 stages:
  - prep
-  - bootstrap
  - build

 # Common job fragment to get a worker ready
@@ -33,7 +31,7 @@ stages:
 .build:
  extends: .setup
  script:
-    - KASFILES=$(./ci/jobs-to-kas $CI_JOB_NAME)
+    - KASFILES=$(./ci/jobs-to-kas "$CI_JOB_NAME")
    - kas shell --update --force-checkout $KASFILES -c 'cat conf/*.conf'
    - kas build $KASFILES
    - ./ci/check-warnings $KAS_WORK_DIR/build/warnings.log
@@ -42,7 +40,7 @@ stages:
 .build_and_test:
  extends: .setup
  script:
-    - KASFILES=$(./ci/jobs-to-kas $CI_JOB_NAME)
+    - KASFILES=$(./ci/jobs-to-kas "$CI_JOB_NAME")
    - kas shell --update --force-checkout $KASFILES -c 'cat conf/*.conf'
    - kas build $KASFILES
    - kas build $KASFILES -c testimage
@@ -58,23 +56,10 @@ update-repos:
  script:
    - flock --verbose --timeout 60 $KAS_REPO_REF_DIR ./ci/update-repos

-#
-# Bootstrap stage, bootstrap and machine coverage
-#
-
-# Build a number of native tools first to ensure the other builders don't race
-# over them
-n1sdp/bootstrap:
-  extends: .build
-  stage: bootstrap
-
-n1sdp/clang/clang-bootstrap:
-  extends: .build
-  stage: bootstrap

 # What percentage of machines in the layer do we build
 machine-coverage:
-  stage: bootstrap
+  stage: build
  interruptible: true
  script:
    - ./ci/check-machine-coverage
@@ -83,6 +68,11 @@ machine-coverage:
 #
 # Build stage, the actual build jobs
 #
+# Available options for building are
+#  TOOLCHAINS: [gcc, clang, armgcc, external-gccarm]
+#  TCLIBC: [glibc, musl]
+#  VIRT: [none, xen]
+#  TESTING: testimage

 # Validate layers are Yocto Project Compatible
 check-layers:
@@ -112,16 +102,22 @@ corstone700-mps3:
 corstone1000-fvp:
  extends: .build

-fvp-base/testimage:
+corstone1000-mps3:
  extends: .build
+
+fvp-base:
+  extends: .build
+  parallel:
+    matrix:
+      - TESTING: testimage
  tags:
-  - x86_64
+    - x86_64

 fvp-base-arm32:
  extends: .build
-
-fvp-base-arm32/external-gccarm:
-  extends: .build
+  parallel:
+    matrix:
+      - TOOLCHAINS: [gcc, external-gccarm]

 fvp-baser-aemv8r64:
  extends: .build
@@ -131,9 +127,9 @@ fvps:

 gem5-arm64:
  extends: .build
-
-gem5-arm64/xen:
-  extends: .build
+  parallel:
+    matrix:
+      - VIRT: [none, xen]

 gem5-atp-arm64:
  extends: .build
@@ -143,12 +139,15 @@ generic-arm64:

 juno:
  extends: .build
+  parallel:
+    matrix:
+      - TOOLCHAINS: [gcc, clang]

-juno/clang:
-  extends: .build
-
-microbit-v1/testimage-zephyr:
+microbit-v1:
  extends: .build_and_test
+  parallel:
+    matrix:
+      - TESTING: testimage-zephyr

 musca-b1:
  extends: .build
@@ -158,48 +157,49 @@ musca-s1:

 n1sdp:
  extends: .build
-
-n1sdp/armgcc:
-  extends: .build
+  parallel:
+    matrix:
+      - TOOLCHAINS: [gcc, armgcc]

 qemu-cortex-a53:
  extends: .build

-qemu-cortex-m3/testimage-zephyr:
+qemu-cortex-m3:
  extends: .build_and_test
+  parallel:
+    matrix:
+      - TESTING: testimage-zephyr

 qemu-cortex-r5:
  extends: .build

-qemuarm64-sbsa:
+qemuarm64-secureboot:
  extends: .build
+  parallel:
+    matrix:
+      - TOOLCHAINS: [gcc, clang]
+        TCLIBC: [glibc, musl]
+        TESTING: testimage

-qemuarm64-secureboot/testimage:
+qemuarm64:
  extends: .build
+  parallel:
+    matrix:
+      - VIRT: xen

-qemuarm64-secureboot/clang/testimage:
+qemuarm:
  extends: .build
+  parallel:
+    matrix:
+      - TOOLCHAINS: [gcc, clang]
+        TESTING: testimage
+      - VIRT: xen

-qemuarm64-secureboot/clang/musl/testimage:
-  extends: .build
-
-qemuarm64-secureboot/musl/testimage:
-  extends: .build
-
-qemuarm64/xen:
-  extends: .build
-
-qemuarm/clang/testimage:
-  extends: .build
-
-qemuarm/testimage:
-  extends: .build
-
-qemuarm/xen:
-  extends: .build
-
-qemuarmv5/testimage:
+qemuarmv5:
  extends: .build
+  parallel:
+    matrix:
+      - TESTING: testimage

 sgi575:
  extends: .build
@@ -216,54 +216,3 @@ tc1:

 toolchains:
  extends: .build
-
-#
-# Utility tasks, not executed automatically
-#
-
-delete-dl-dir:
-  extends: .setup
-  stage: prep
-  when: manual
-  script:
-    - rm -rf $DL_DIR/*
-
-delete-repo-dir:
-  extends: .setup
-  stage: prep
-  when: manual
-  script:
-    - rm -rf $KAS_REPO_REF_DIR/*
-
-# Delete all sstate
-delete-sstate:
-  extends: .setup
-  stage: prep
-  when: manual
-  script:
-    - rm -rf $SSTATE_DIR/*
-
-delete-toolchains:
-  extends: .setup
-  stage: prep
-  when: manual
-  script:
-    - rm -rf $TOOLCHAIN_DIR/*
-
-# Wipe out old sstate
-prune-sstate:
-  extends: .setup
-  stage: prep
-  when: manual
-  script:
-    - du -h -s $SSTATE_DIR
-    - find $SSTATE_DIR -type f -atime +30 -delete
-    - du -h -s $SSTATE_DIR
-
-# Report on disk usage
-usage:
-  extends: .setup
-  stage: prep
-  when: manual
-  script:
-    - du -h -s $DL_DIR $SSTATE_DIR $KAS_REPO_REF_DIR $TOOLCHAIN_DIR
@@ -37,11 +37,6 @@ local_conf_header:
    PACKAGECONFIG:append:pn-perf = " coresight"
  noptest: |
    DISTRO_FEATURES:remove = "ptest"
-  sstate_mirror: |
-    BB_HASHSERVE_UPSTREAM = "typhoon.yocto.io:8687"
-    BB_HASHSERVE = "auto"
-    BB_SIGNATURE_HANDLER = "OEEquivHash"
-    SSTATE_MIRRORS = "file://.* http://sstate.yoctoproject.org/dev/PATH;downloadfilename=PATH"

 machine: unset

@@ -1,9 +0,0 @@
-header:
-  version: 9
-
-target:
-  - binutils-cross-aarch64
-  - gcc-cross-aarch64
-  - python3-native
-  - opkg-native
-  - rpm-native
@@ -1,10 +0,0 @@
-header:
-  version: 9
-
-target:
-  - binutils-cross-aarch64
-  - clang-cross-aarch64
-  - clang-native
-  - python3-native
-  - opkg-native
-  - rpm-native
@@ -4,7 +4,7 @@ header:
 repos:
  meta-clang:
    url: https://github.com/kraj/meta-clang
-    refspec: honister
+    refspec: master

 local_conf_header:
  clang: |
@@ -0,0 +1,12 @@
+header:
+  version: 9
+  includes:
+    - base.yml
+    - meta-openembedded.yml
+
+local_conf_header:
+    custom-local-conf: |
+        INITRAMFS_IMAGE_BUNDLE = "0"
+        INITRAMFS_IMAGE:remove = "corstone1000-initramfs-image"
+
+machine: corstone1000-mps3
@@ -1,19 +1,27 @@
 #! /bin/bash

-# Read a GitLab CI job name on $1 and transform it to a
-# list of Kas yaml files
+# This script is expecting an input of machine name, optionally followed by a
+# colon and a list of one or more parameters separated by commas between
+# brackets.  For example, the following are acceptable:
+# corstone500
+# fvp-base: [testimage]
+# qemuarm64-secureboot: [clang, glibc, testimage]
+#
+# Turn this list into a series of yml files separated by colons to pass to kas

 set -e -u

-# Read Job namne from $1 and split on /
-IFS=/ read -r -a PARTS<<<$1
+FILES="ci/$(echo $1 | cut -d ':' -f 1).yml"

-# Prefix each part with ci/
-PARTS=("${PARTS[@]/#/ci/}")
+for i in $(echo $1 | cut -s -d ':' -f 2 | sed 's/[][,]//g'); do
+	# Given that there are no yml files for gcc or glibc, as those are the
+	# defaults, we can simply ignore those parameters.  They are necessary
+	# to pass in so that matrix can correctly setup all of the permutations
+	# of each individual run.
+	if [[ $i == 'none' || $i == 'gcc' || $i == 'glibc' ]]; then
+		continue
+	fi
+	FILES+=":ci/$i.yml"
+done

-# Suffix each part with .yml
-PARTS=("${PARTS[@]/%/.yml}")
-
-# Print colon-separated
-IFS=":"
-echo "${PARTS[*]}"
+echo $FILES
@@ -14,3 +14,6 @@ target:
  - core-image-base
  - perf
  - optee-examples
+  - optee-test
+  - optee-spdevkit
+  - optee-os-tadevkit
@@ -1,11 +1,11 @@
 header:
-  version: 9
+  version: 11

 distro: poky-tiny

 defaults:
  repos:
-    refspec: master
+    refspec: honister

 repos:
  meta-arm:
@@ -16,7 +16,7 @@ repos:

  poky:
    url: https://git.yoctoproject.org/git/poky
-    refspec: honister
+    refspec: b6b0af0889de9da0e4128cef8c9069b770b7d5a0
    layers:
      meta:
      meta-poky:
@@ -24,14 +24,14 @@ repos:

  meta-openembedded:
    url: https://git.openembedded.org/meta-openembedded
-    refspec: f16efc00b7fcdbfa8c53e35c1fcebed5c06d975e
+    refspec: ad52a41de8b4b7d619d1376d0a0090ebcfff56da
    layers:
      meta-oe:
      meta-python:

  meta-arm-image:
     url: https://git.gitlab.arm.com/arm-reference-solutions/meta-arm-image.git
-     refspec: main
+     refspec: aeb0571e8bc935f3f8b15c3b27ab4275e2069b5b

 local_conf_header:
  base: |
@@ -40,7 +40,6 @@ local_conf_header:
    LICENSE_FLAGS_WHITELIST += "armcompiler"
    BB_NUMBER_THREADS ?= "16"
    PARALLEL_MAKE ?= "-j16"
-    INHERIT += "rm_work"
    PACKAGECONFIG:append:pn-perf = " coresight"

 machine: unset
@@ -1,12 +1,12 @@
 header:
-  version: 9
+  version: 11
  includes:
-    - corstone1000-base.yml
+    - kas/corstone1000-base.yml

 repos:
  run-scripts:
     url: https://git.gitlab.arm.com/arm-reference-solutions/model-scripts.git
-     refspec: corstone1000-fvp
+     refspec: 7ad7b6f33bbdb7ae10c7ecfd56820c03a71e9bdf
     layers:
      .: 'excluded'

@@ -0,0 +1,6 @@
+header:
+  version: 11
+  includes:
+    - kas/corstone1000-base.yml
+
+machine: corstone1000-mps3
@@ -6,7 +6,7 @@ machine: fvp-baser-aemv8r64

 defaults:
  repos:
-    refspec: master
+    refspec: honister

 repos:
  meta-arm:
@@ -1,7 +1,7 @@
 header:
  version: 9
  includes:
-    - fvp-baser-aemv8r64-bsp.yml
+    - kas/fvp-baser-aemv8r64-bsp.yml

 local_conf_header:
  base-rt: |
@@ -38,4 +38,14 @@
            /delete-property/ iommu-map;
        };
    };
+
+    /*
+     * Delete module node for Dom0, #size-cells and #address-cells because Grub2
+     * is responsible to create them
+     */
+    chosen {
+        /delete-property/ #size-cells;
+        /delete-property/ #address-cells;
+        /delete-node/ module@0;
+    };
 };
@@ -1,16 +1,13 @@
 / {
    chosen {
+        #size-cells = <0x00000001>;
+        #address-cells = <0x00000001>;
        xen,dom0-bootargs = "###XEN_DOM0_BOOTARGS###";
        xen,xen-bootargs = "###XEN_XEN_BOOTARGS###";

-        modules {
-            #size-cells = <0x00000001>;
-            #address-cells = <0x00000001>;
-
-            module@0 {
-                reg = <###XEN_DOM0_ADDR### ###XEN_DOM0_SIZE###>;
-                compatible = "multiboot,module";
-            };
+        module@0 {
+            reg = <###XEN_DOM0_ADDR### ###XEN_DOM0_SIZE###>;
+            compatible = "multiboot,module";
        };
    };
 };
@@ -13,7 +13,7 @@ LAYERSERIES_COMPAT_meta-arm-bsp = "honister"

 LAYERDEPENDS_meta-arm-bsp = "core meta-arm"
 # This won't be used by layerindex-fetch, but works everywhere else
-LAYERDEPENDS_meta-arm-bsp:append:corstone1000 = " meta-python"
+LAYERDEPENDS_meta-arm-bsp:append:corstone1000 = " meta-python openembedded-layer"
 LAYERDEPENDS_meta-arm-bsp:append:musca-b1 = " meta-python"
 LAYERDEPENDS_meta-arm-bsp:append:musca-s1 = " meta-python"

@@ -0,0 +1,9 @@
+#@TYPE: Machine
+#@NAME: corstone1000-mps3 machine
+#@DESCRIPTION: Machine configuration for Corstone1000 64-bit MPS3 FPGA board
+
+require conf/machine/include/corstone1000.inc
+
+TFA_TARGET_PLATFORM = "fpga"
+
+PLATFORM_IS_FVP = "FALSE"
@@ -11,7 +11,7 @@ TFA_BL2_BINARY = "bl2-corstone1000.bin"
 TFA_FIP_BINARY = "fip-corstone1000.bin"

 # TF-M
-PREFERRED_VERSION_trusted-firmware-m ?= "1.4%"
+PREFERRED_VERSION_trusted-firmware-m ?= "1.5%"
 TFM_PLATFORM = "arm/corstone1000"
 EXTRA_IMAGEDEPENDS += "virtual/trusted-firmware-m"

@@ -41,6 +41,9 @@ EXTRA_IMAGEDEPENDS += "optee-os"
 OPTEE_ARCH = "arm64"
 OPTEE_BINARY = "tee-pager_v2.bin"

+# Trusted Services(TS)
+EXTRA_IMAGEDEPENDS += "secure-partitions"
+
 # Linux kernel
 PREFERRED_PROVIDER_virtual/kernel:forcevariable = "linux-yocto"
 PREFERRED_VERSION_linux-yocto = "5.10%"
@@ -25,4 +25,4 @@ ZEPHYR_BOARD = "v2m_musca_b1"
 ZEPHYR_INHERIT_CLASSES += "zephyr-qemuboot"
 ARCH:musca-b1 = "arm"

-TFM_PLATFORM = "arm/musca_b1/sse_200"
+TFM_PLATFORM = "musca_b1/sse_200"
@@ -9,4 +9,4 @@ require conf/machine/include/arm/armv8-m/tune-cortexm33.inc
 # GLIBC will not work with Cortex-M.
 TCLIBC = "newlib"

-TFM_PLATFORM = "arm/musca_s1"
+TFM_PLATFORM = "musca_s1"
@@ -32,6 +32,7 @@ EXTRA_IMAGEDEPENDS += "virtual/control-processor-firmware"

 #UEFI EDK2 firmware
 EXTRA_IMAGEDEPENDS += "virtual/uefi-firmware"
+PREFERRED_VERSION_edk2-firmware ?= "202102%"

 #grub-efi
 EFI_PROVIDER ?= "grub-efi"
@@ -44,7 +44,8 @@ Ubuntu 20.04.
 Install the required packages for the build host:
 https://docs.yoctoproject.org/singleindex.html#required-packages-for-the-build-host

-Install the kas setup tool for bitbake based projects:
+Kas is a setup tool for bitbake based projects. The minimal supported version
+is 2.6, install it like so:

    pip3 install --user kas

@@ -0,0 +1,60 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
+
+From 1b99c6dd614002a79e4dda96d630089775a1d233 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <Emekcan.Aras@arm.com>
+Date: Wed, 17 Nov 2021 18:45:32 +0000
+Subject: [PATCH] corstone1000: implement platform specific psci reset
+
+This implements platform specific psci reset for the corstone1000.
+Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
+---
+ .../corstone1000/common/corstone1000_pm.c     | 23 +++++++++++++++++--
+ 1 file changed, 21 insertions(+), 2 deletions(-)
+
+diff --git a/plat/arm/board/corstone1000/common/corstone1000_pm.c b/plat/arm/board/corstone1000/common/corstone1000_pm.c
+index 12b322e27..e95ab30b7 100644
+--- a/plat/arm/board/corstone1000/common/corstone1000_pm.c
+++ b/plat/arm/board/corstone1000/common/corstone1000_pm.c
+@@ -6,17 +6,36 @@
+ 
+ #include <lib/psci/psci.h>
+ #include <plat/arm/common/plat_arm.h>
+-
+ /*******************************************************************************
+  * Export the platform handlers via plat_arm_psci_pm_ops. The ARM Standard
+  * platform layer will take care of registering the handlers with PSCI.
+  ******************************************************************************/
+
+#define SECURE_WATCHDOG_ADDR_CTRL_REG     0x1A320000
+#define SECURE_WATCHDOG_ADDR_VAL_REG      0x1A320008
+#define SECURE_WATCHDOG_MASK_ENABLE       0x01
+#define SECURE_WATCHDOG_COUNTDOWN_VAL     0x1000
+
+static void __dead2 corstone1000_system_reset(void)
+{
+
+    uint32_t volatile * const watchdog_ctrl_reg = (int *) SECURE_WATCHDOG_ADDR_CTRL_REG;
+    uint32_t volatile * const watchdog_val_reg = (int *) SECURE_WATCHDOG_ADDR_VAL_REG;
+
+   *(watchdog_val_reg) = SECURE_WATCHDOG_COUNTDOWN_VAL;
+   *watchdog_ctrl_reg = SECURE_WATCHDOG_MASK_ENABLE;
+     while (1){
+        wfi();
+    }
+}
+
+ plat_psci_ops_t plat_arm_psci_pm_ops = {
+-	/* dummy struct */
+    .system_reset = corstone1000_system_reset,
+ 	.validate_ns_entrypoint = NULL
+ };
+ 
+ const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops)
+ {
+    ops = &plat_arm_psci_pm_ops;
+ 	return ops;
+ }
+-- 
+2.25.1
+
@@ -0,0 +1,33 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From 5541d466ebf46f0a14fae3effbcc46bcc2dd8efc Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Mon, 20 Sep 2021 06:01:54 +0100
+Subject: [PATCH 1/1] plat/arm: corstone1000: change base address of FIP in the flash
+
+More space in the flash is reserved up front for metadata
+parser and UEFI variables. That requires change in the flash
+base address of where images are present.
+
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ plat/arm/board/corstone1000/common/include/platform_def.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/plat/arm/board/corstone1000/common/include/platform_def.h b/plat/arm/board/corstone1000/common/include/platform_def.h
+index 97d7b2974..079b1c9d4 100644
+--- a/plat/arm/board/corstone1000/common/include/platform_def.h
+++ b/plat/arm/board/corstone1000/common/include/platform_def.h
+@@ -208,7 +208,7 @@
+ 
+ /* NOR Flash */
+ 
+-#define PLAT_ARM_FIP_BASE			UL(0x08131000)
+#define PLAT_ARM_FIP_BASE			UL(0x081EF000)
+ #define PLAT_ARM_FIP_MAX_SIZE			UL(0x1ff000)  /* 1.996 MB */
+ 
+ #define PLAT_ARM_NVM_BASE			V2M_FLASH0_BASE
+-- 
+2.17.1
+
@@ -0,0 +1,102 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From 03218b5bb3ef32298624a54d1b3b3cf3c8c5d800 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Wed, 27 Oct 2021 16:31:04 +0100
+Subject: [PATCH 1/1] plat/arm: corstone1000: identify which bank to load fip
+ from
+
+Secure enclave decide the boot bank based on the firmware update
+state of the system and updated the boot bank information at a given
+location in the flash. In this commit, bl2 reads the givev flash location
+to indentify the bank from which it should load fip from.
+
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ .../corstone1000/common/corstone1000_plat.c   | 39 +++++++++++++++++++
+ .../common/include/platform_def.h             |  6 ++-
+ 2 files changed, 43 insertions(+), 2 deletions(-)
+
+diff --git a/plat/arm/board/corstone1000/common/corstone1000_plat.c b/plat/arm/board/corstone1000/common/corstone1000_plat.c
+index 7a38b0b2e..4351d5e9d 100644
+--- a/plat/arm/board/corstone1000/common/corstone1000_plat.c
+++ b/plat/arm/board/corstone1000/common/corstone1000_plat.c
+@@ -11,6 +11,10 @@
+ #include <plat/arm/common/plat_arm.h>
+ #include <plat/common/platform.h>
+ #include <platform_def.h>
+#include <drivers/generic_delay_timer.h>
+#include <plat/arm/common/arm_fconf_getter.h>
+#include <plat/arm/common/arm_fconf_io_storage.h>
+#include <drivers/io/io_storage.h>
+ 
+ /*
+  * Table of regions to map using the MMU.
+@@ -26,6 +30,41 @@ const mmap_region_t plat_arm_mmap[] = {
+ 	{0}
+ };
+ 
+void identify_fip_start_address(void)
+{
+	const struct plat_io_policy *policy;
+	volatile uint32_t *boot_bank_flag = (uint32_t*)(PLAT_ARM_BOOT_BANK_FLAG);
+
+	VERBOSE("Boot bank flag = %u.\n\r", *boot_bank_flag);
+
+	policy = FCONF_GET_PROPERTY(arm, io_policies, FIP_IMAGE_ID);
+
+	assert(policy != NULL);
+	assert(policy->image_spec != 0UL);
+
+	io_block_spec_t *spec = (io_block_spec_t *)policy->image_spec;
+
+	if ((*boot_bank_flag) == 0) {
+		VERBOSE("Booting from bank 0: fip offset = 0x%lx\n\r",
+						PLAT_ARM_FIP_BASE_BANK0);
+		spec->offset = PLAT_ARM_FIP_BASE_BANK0;
+	} else {
+		VERBOSE("Booting from bank 1: fip offset = 0x%lx\n\r",
+						PLAT_ARM_FIP_BASE_BANK1);
+		spec->offset = PLAT_ARM_FIP_BASE_BANK1;
+	}
+}
+
+void bl2_platform_setup(void)
+{
+	arm_bl2_platform_setup();
+	/*
+	 * Identify the start address of the FIP by reading the boot
+	 * index flag from the flash.
+	 */
+	identify_fip_start_address();
+}
+
+ /* corstone1000 only has one always-on power domain and there
+  * is no power control present
+  */
+diff --git a/plat/arm/board/corstone1000/common/include/platform_def.h b/plat/arm/board/corstone1000/common/include/platform_def.h
+index edc90fa72..868e41388 100644
+--- a/plat/arm/board/corstone1000/common/include/platform_def.h
+++ b/plat/arm/board/corstone1000/common/include/platform_def.h
+@@ -213,13 +213,15 @@
+ 
+ /* NOR Flash */
+ 
+-#define PLAT_ARM_FIP_BASE			UL(0x081EF000)
+#define PLAT_ARM_BOOT_BANK_FLAG			UL(0x08002000)
+#define PLAT_ARM_FIP_BASE_BANK0			UL(0x081EF000)
+#define PLAT_ARM_FIP_BASE_BANK1			UL(0x0916F000)
+ #define PLAT_ARM_FIP_MAX_SIZE			UL(0x1ff000)  /* 1.996 MB */
+ 
+ #define PLAT_ARM_NVM_BASE			V2M_FLASH0_BASE
+ #define PLAT_ARM_NVM_SIZE			(SZ_32M)  /* 32 MB */
+ 
+-#define PLAT_ARM_FLASH_IMAGE_BASE		PLAT_ARM_FIP_BASE
+#define PLAT_ARM_FLASH_IMAGE_BASE		PLAT_ARM_FIP_BASE_BANK0
+ #define PLAT_ARM_FLASH_IMAGE_MAX_SIZE		PLAT_ARM_FIP_MAX_SIZE
+ 
+ /*
+-- 
+2.17.1
+
@@ -14,6 +14,9 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files/corstone1000:"
 SRC_URI:append = " \
                 file://0001-Rename-Diphda-to-corstone1000.patch \
                 file://0002-plat-arm-corstone1000-made-changes-to-accommodate-3M.patch \
+                 file://0003-corstone1000-implement-platform-specific-psci-reset.patch \
+                 file://0004-plat-arm-corstone1000-change-base-address-of-FIP-in-the-fl.patch   \
+                 file://0005-plat-arm-corstone1000-identify-which-bank-to-load-fip-from.patch   \
                 "

 TFA_DEBUG = "1"
@@ -0,0 +1,33 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From beb8a8d92537b9574717f0a9a914642c15b439b1 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Wed, 29 Sep 2021 04:58:59 +0100
+Subject: [PATCH 01/15] corstone1000: disable secure debug temporarily
+
+Until ARM-DS is ready to use psa-adac secure debug protocol,
+disable the secure debug in the platform. At present, the
+secure debug integration is tested with the PyOCD based
+scripts.
+
+Change-Id: I3dd0f20e5714a2db69425607d9404172ce52129e
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ platform/ext/target/arm/corstone1000/config.cmake | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
+index dc12d27f9c..203e6b79a6 100644
+--- a/platform/ext/target/arm/corstone1000/config.cmake
+++ b/platform/ext/target/arm/corstone1000/config.cmake
+@@ -37,5 +37,5 @@ set(OPENAMP_VERSION                     "33037b04e0732e58fc0fa36afc244999ef632e1
+ if (${PLATFORM_IS_FVP})
+     set(PLATFORM_PSA_ADAC_SECURE_DEBUG      FALSE        CACHE BOOL      "Whether to use psa-adac secure debug.")
+ else()
+-    set(PLATFORM_PSA_ADAC_SECURE_DEBUG      TRUE        CACHE BOOL      "Whether to use psa-adac secure debug.")
+    set(PLATFORM_PSA_ADAC_SECURE_DEBUG      FALSE        CACHE BOOL      "Whether to use psa-adac secure debug.")
+ endif()
+-- 
+2.17.1
+
@@ -0,0 +1,470 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From 8e2b5cee153763dd35bba1bff3568e2e3c6f58d3 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Fri, 1 Oct 2021 14:20:55 +0100
+Subject: [PATCH 02/15] corstone1000: provision firmware update metadata (fwu)
+
+Firmware update metadata region in the flash is provisioned.
+The metadata is provisioned assuming images are present in
+bank-0.
+
+Change-Id: I2a2274505d80528a3a0cc9211c1c6263415015d8
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ .../arm/corstone1000/bl1/CMakeLists.txt       |   2 +
+ .../arm/corstone1000/bl1/bl1_boot_hal.c       |  18 +
+ .../corstone1000/fw_update_agent/fwu_agent.c  | 309 ++++++++++++++++++
+ .../corstone1000/fw_update_agent/fwu_agent.h  |  31 ++
+ .../arm/corstone1000/partition/flash_layout.h |  11 +-
+ 5 files changed, 369 insertions(+), 2 deletions(-)
+ create mode 100644 platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+ create mode 100644 platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+
+diff --git a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+index 0634fed4b8..92a78c1168 100644
+--- a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+@@ -238,6 +238,7 @@ target_sources(bl1_main
+         ../Device/Source/system_core_init.c
+         ../Native_Driver/firewall.c
+         ../Native_Driver/uart_pl011_drv.c
+        ../fw_update_agent/fwu_agent.c
+         bl1_boot_hal.c
+         bl1_flash_map.c
+         bl1_security_cnt.c
+@@ -267,6 +268,7 @@ target_include_directories(bl1_main
+         ../CMSIS_Driver/Config
+         ../Device/Config
+         ../Native_Driver
+        ../fw_update_agent
+ )
+ 
+ ############################### SIGNING BL2 image ##################################
+diff --git a/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c b/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
+index 3d1e3e72fc..5e5e5c9e68 100644
+--- a/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
+++ b/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
+@@ -12,8 +12,12 @@
+ #include "Driver_Flash.h"
+ #include "flash_layout.h"
+ #include "bootutil/fault_injection_hardening.h"
+#include "bootutil/bootutil_log.h"
+ #include "firewall.h"
+ #include "mpu_config.h"
+#include "tfm_plat_otp.h"
+#include "tfm_plat_provisioning.h"
+#include "fwu_agent.h"
+ 
+ #if defined(CRYPTO_HW_ACCELERATOR) || \
+     defined(CRYPTO_HW_ACCELERATOR_OTP_PROVISIONING)
+@@ -595,6 +599,20 @@ int32_t boot_platform_init(void)
+     }
+ #endif /* CRYPTO_HW_ACCELERATOR */
+ 
+    result = tfm_plat_otp_init();
+    if (result != TFM_PLAT_ERR_SUCCESS) {
+        BOOT_LOG_ERR("OTP system initialization failed");
+        FIH_PANIC;
+    }
+
+    if (tfm_plat_provisioning_is_required()) {
+        result = fwu_metadata_provision();
+        if (result != FWU_AGENT_SUCCESS) {
+            BOOT_LOG_ERR("Provisioning FWU Metadata failed");
+            FIH_PANIC;
+        }
+    }
+
+     return 0;
+ }
+ 
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+new file mode 100644
+index 0000000000..b9c507e4ef
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+@@ -0,0 +1,309 @@
+/*
+ * Copyright (c) 2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#include <stdint.h>
+#include <string.h>
+#include "fwu_agent.h"
+#include "Driver_Flash.h"
+#include "flash_layout.h"
+#include "fip_parser/external/uuid.h"
+
+/* Properties of image in a bank */
+struct fwu_image_properties {
+
+        /* UUID of the image in this bank */
+        uuid_t img_uuid;
+
+        /* [0]: bit describing the image acceptance status –
+         *      1 means the image is accepted
+         * [31:1]: MBZ
+         */
+        uint32_t accepted;
+
+        /* NOTE: using the reserved field */
+        /* image version */
+        uint32_t version;
+
+} __packed;
+
+/* Image entry information */
+struct fwu_image_entry {
+
+        /* UUID identifying the image type */
+        uuid_t img_type_uuid;
+
+        /* UUID of the storage volume where the image is located */
+        uuid_t location_uuid;
+
+        /* Properties of images with img_type_uuid in the different FW banks */
+        struct fwu_image_properties img_props[NR_OF_FW_BANKS];
+
+} __packed;
+
+struct fwu_metadata {
+
+        /* Metadata CRC value */
+        uint32_t crc_32;
+
+        /* Metadata version */
+        uint32_t version;
+
+        /* Bank index with which device boots */
+        uint32_t active_index;
+
+        /* Previous bank index with which device booted successfully */
+        uint32_t previous_active_index;
+
+        /* Image entry information */
+        struct fwu_image_entry img_entry[NR_OF_IMAGES_IN_FW_BANK];
+
+} __packed;
+
+/* This is Corstone1000 speific metadata for OTA.
+ * Private metadata is written at next sector following
+ * FWU METADATA location */
+struct fwu_private_metadata {
+
+       /* boot_index: the bank from which system is booted from */
+       uint32_t boot_index;
+
+} __packed;
+
+struct fwu_metadata _metadata;
+int is_initialized = 0;
+
+#define IMAGE_ACCEPTED          (1)
+#define IMAGE_NOT_ACCEPTED      (0)
+#define BANK_0                  (0)
+#define BANK_1                  (1)
+#define IMAGE_0                 (0)
+#define IMAGE_1                 (1)
+#define IMAGE_2                 (2)
+#define IMAGE_3                 (3)
+#define INVALID_VERSION         (0xffffffff)
+
+#ifndef FWU_METADATA_FLASH_DEV
+    #ifndef FLASH_DEV_NAME
+    #error "FWU_METADATA_FLASH_DEV or FLASH_DEV_NAME must be defined in flash_layout.h"
+    #else
+    #define FWU_METADATA_FLASH_DEV FLASH_DEV_NAME
+    #endif
+#endif
+
+/* Import the CMSIS flash device driver */
+extern ARM_DRIVER_FLASH FWU_METADATA_FLASH_DEV;
+
+static enum fwu_agent_error_t private_metadata_read(
+        struct fwu_private_metadata* p_metadata)
+{
+    int ret;
+
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    if (!p_metadata) {
+        return FWU_AGENT_ERROR;
+    }
+
+    ret = FWU_METADATA_FLASH_DEV.ReadData(FWU_PRIVATE_AREA_OFFSET, p_metadata,
+                                          sizeof(struct fwu_private_metadata));
+    if (ret != ARM_DRIVER_OK) {
+        return FWU_AGENT_ERROR;
+    }
+
+    FWU_LOG_MSG("%s: success: boot_index = %u\n\r", __func__,
+                        p_metadata->boot_index);
+
+    return FWU_AGENT_SUCCESS;
+}
+
+static enum fwu_agent_error_t private_metadata_write(
+        struct fwu_private_metadata* p_metadata)
+{
+    int ret;
+
+    FWU_LOG_MSG("%s: enter: boot_index = %u\n\r", __func__,
+                        p_metadata->boot_index);
+
+    if (!p_metadata) {
+        return FWU_AGENT_ERROR;
+    }
+
+    ret = FWU_METADATA_FLASH_DEV.EraseSector(FWU_PRIVATE_AREA_OFFSET);
+    if (ret != ARM_DRIVER_OK) {
+        return FWU_AGENT_ERROR;
+    }
+
+    ret = FWU_METADATA_FLASH_DEV.ProgramData(FWU_PRIVATE_AREA_OFFSET,
+                                p_metadata, sizeof(struct fwu_private_metadata));
+    if (ret != ARM_DRIVER_OK) {
+        return FWU_AGENT_ERROR;
+    }
+
+    FWU_LOG_MSG("%s: success\n\r", __func__);
+    return FWU_AGENT_SUCCESS;
+}
+
+static enum fwu_agent_error_t metadata_read(struct fwu_metadata *p_metadata)
+{
+    int ret;
+
+    FWU_LOG_MSG("%s: enter: flash addr = %u, size = %d\n\r", __func__,
+                  FWU_METADATA_REPLICA_1_OFFSET, sizeof(struct fwu_metadata));
+
+    if (!p_metadata) {
+        return FWU_AGENT_ERROR;
+    }
+
+    ret = FWU_METADATA_FLASH_DEV.ReadData(FWU_METADATA_REPLICA_1_OFFSET,
+                                p_metadata, sizeof(struct fwu_metadata));
+    if (ret != ARM_DRIVER_OK) {
+        return FWU_AGENT_ERROR;
+    }
+
+    FWU_LOG_MSG("%s: success: active = %u, previous = %d\n\r", __func__,
+                  p_metadata->active_index, p_metadata->previous_active_index);
+
+    return FWU_AGENT_SUCCESS;
+}
+
+static enum fwu_agent_error_t metadata_write(
+                        struct fwu_metadata *p_metadata)
+{
+    int ret;
+
+    FWU_LOG_MSG("%s: enter: flash addr = %u, size = %d\n\r", __func__,
+                  FWU_METADATA_REPLICA_1_OFFSET, sizeof(struct fwu_metadata));
+
+    if (!p_metadata) {
+        return FWU_AGENT_ERROR;
+    }
+
+    ret = FWU_METADATA_FLASH_DEV.EraseSector(FWU_METADATA_REPLICA_1_OFFSET);
+    if (ret != ARM_DRIVER_OK) {
+        return FWU_AGENT_ERROR;
+    }
+
+    ret = FWU_METADATA_FLASH_DEV.ProgramData(FWU_METADATA_REPLICA_1_OFFSET,
+                                p_metadata, sizeof(struct fwu_metadata));
+    if (ret != ARM_DRIVER_OK) {
+        return FWU_AGENT_ERROR;
+    }
+
+    FWU_LOG_MSG("%s: success: active = %u, previous = %d\n\r", __func__,
+                  p_metadata->active_index, p_metadata->previous_active_index);
+    return FWU_AGENT_SUCCESS;
+}
+
+enum fwu_agent_error_t fwu_metadata_init(void)
+{
+    enum fwu_agent_error_t ret;
+    ARM_FLASH_INFO* flash_info;
+
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    if (is_initialized) {
+        return FWU_AGENT_SUCCESS;
+    }
+
+    /* Code assumes everything fits into a sector */
+    if (sizeof(struct fwu_metadata) > FWU_METADATA_FLASH_SECTOR_SIZE) {
+        return FWU_AGENT_ERROR;
+    }
+
+    if (sizeof(struct fwu_private_metadata) > FWU_METADATA_FLASH_SECTOR_SIZE) {
+        return FWU_AGENT_ERROR;
+    }
+
+    ret = FWU_METADATA_FLASH_DEV.Initialize(NULL);
+    if (ret != ARM_DRIVER_OK) {
+        return FWU_AGENT_ERROR;
+    }
+
+    flash_info = FWU_METADATA_FLASH_DEV.GetInfo();
+    if (flash_info->program_unit != 1) {
+        FWU_METADATA_FLASH_DEV.Uninitialize();
+        return FWU_AGENT_ERROR;
+    }
+
+    is_initialized = 1;
+
+    FWU_LOG_MSG("%s: is_initialized = %d\n\r", __func__, is_initialized);
+
+    return FWU_AGENT_SUCCESS;
+}
+
+enum fwu_agent_error_t fwu_metadata_provision(void)
+{
+    enum fwu_agent_error_t ret;
+    struct fwu_private_metadata priv_metadata;
+    uint32_t image_version = 0;
+
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    ret = fwu_metadata_init();
+    if (ret) {
+        return ret;
+    }
+
+    /* Provision FWU Agent Metadata */
+
+    memset(&_metadata, 0, sizeof(struct fwu_metadata));
+
+    _metadata.version = 1;
+    _metadata.active_index = 0;
+    _metadata.previous_active_index = 1;
+
+    /* bank 0 is the place where images are located at the
+     * start of device lifecycle */
+
+    for (int i = 0; i < NR_OF_IMAGES_IN_FW_BANK; i++) {
+
+        _metadata.img_entry[i].img_props[BANK_0].accepted = IMAGE_ACCEPTED;
+        _metadata.img_entry[i].img_props[BANK_0].version = image_version;
+
+        _metadata.img_entry[i].img_props[BANK_1].accepted = IMAGE_NOT_ACCEPTED;
+        _metadata.img_entry[i].img_props[BANK_1].version = INVALID_VERSION;
+    }
+
+    ret = metadata_write(&_metadata);
+    if (ret) {
+        return ret;
+    }
+
+    memset(&_metadata, 0, sizeof(struct fwu_metadata));
+    ret = metadata_read(&_metadata);
+    if (ret) {
+        return ret;
+    }
+    FWU_LOG_MSG("%s: provisioned values: active = %u, previous = %d\n\r",
+             __func__, _metadata.active_index, _metadata.previous_active_index);
+
+
+    /* Provision Private metadata for update agent which is shared
+       beween BL1 and tf-m of secure enclave */
+
+    memset(&priv_metadata, 0, sizeof(struct fwu_private_metadata));
+
+    priv_metadata.boot_index = BANK_0;
+
+    ret = private_metadata_write(&priv_metadata);
+    if (ret) {
+        return ret;
+    }
+
+    memset(&priv_metadata, 0, sizeof(struct fwu_private_metadata));
+    ret = private_metadata_read(&priv_metadata);
+    if (ret) {
+        return ret;
+    }
+    FWU_LOG_MSG("%s: provisioned values: boot_index = %u\n\r", __func__,
+                        priv_metadata.boot_index);
+
+    FWU_LOG_MSG("%s: FWU METADATA PROVISIONED.\n\r", __func__);
+    return FWU_AGENT_SUCCESS;
+}
+
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+new file mode 100644
+index 0000000000..449d354100
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef FWU_AGENT_H
+#define FWU_AGENT_H
+
+/* Set 1 to enable debug messages */
+#define ENABLE_DEBUG_LOGS         1
+
+#if (ENABLE_DEBUG_LOGS == 1)
+    #include <stdio.h>
+    #define FWU_LOG_MSG(f_, ...) printf((f_), ##__VA_ARGS__)
+#else
+    #define FWU_LOG_MSG(f_, ...)
+#endif
+
+enum fwu_agent_error_t {
+        FWU_AGENT_SUCCESS = 0,
+        FWU_AGENT_ERROR = (-1)
+};
+
+enum fwu_agent_error_t fwu_metadata_provision(void);
+enum fwu_agent_error_t fwu_metadata_init(void);
+
+
+#endif /* FWU_AGENT_H */
+
+diff --git a/platform/ext/target/arm/corstone1000/partition/flash_layout.h b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+index f120a7b8ee..47445d9d29 100644
+--- a/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+++ b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+@@ -117,11 +117,18 @@
+ 
+ 
+ /* 1MB: space in flash to store metadata and uefi variables */
+#define FWU_METADATA_FLASH_DEV          (FLASH_DEV_NAME)
+#define FWU_METADATA_FLASH_SECTOR_SIZE  (FLASH_SECTOR_SIZE)
+
+ #define FWU_METADATA_PARTITION_OFFSET   (FLASH_BASE_OFFSET)
+-#define FWU_METADATA_AREA_SIZE          (FLASH_SECTOR_SIZE)     /* 4KB */
+#define FWU_METADATA_AREA_SIZE          (FWU_METADATA_FLASH_SECTOR_SIZE)
+ #define FWU_METADATA_REPLICA_1_OFFSET   (FLASH_BASE_OFFSET)
+ #define FWU_METADATA_REPLICA_2_OFFSET   (FWU_METADATA_REPLICA_1_OFFSET + \
+                                          FWU_METADATA_AREA_SIZE)
+#define FWU_PRIVATE_AREA_SIZE           (FLASH_SECTOR_SIZE)
+#define FWU_PRIVATE_AREA_OFFSET         (FWU_METADATA_REPLICA_2_OFFSET + \
+                                         FWU_METADATA_AREA_SIZE)
+
+ #define NR_OF_FW_BANKS                  (2)
+ #define NR_OF_IMAGES_IN_FW_BANK         (4) /* Secure Enclave: BL2 and TF-M \
+                                              * Host: FIP and Kernel image
+@@ -217,7 +224,7 @@
+ /*** ITS, PS and NV Counters ***/
+ /*******************************/
+ 
+-#define FLASH_ITS_AREA_OFFSET           (0)
+#define FLASH_ITS_AREA_OFFSET           (0x10000)  /* 64 KB */
+ #define FLASH_ITS_AREA_SIZE             (4 * FLASH_SECTOR_SIZE)  /* 4 KiB */
+ 
+ #define FLASH_PS_AREA_OFFSET            (FLASH_ITS_AREA_OFFSET + \
+-- 
+2.17.1
+
@@ -0,0 +1,243 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From 22aeb7708773c2cc9df2cc501d411b94c09fd0bd Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Sat, 2 Oct 2021 12:31:07 +0100
+Subject: [PATCH 03/15] corstone1000: parse the uefi firmware update capsule
+
+The Host (OTA Client) sends a capsule containing fwu images
+to secure enclave. The commit parses the capsule to retrieve
+images.
+
+Change-Id: Icf097cf88911a568bdc9eba8c98e2da93994f0bc
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ .../target/arm/corstone1000/CMakeLists.txt    |   2 +
+ .../fw_update_agent/uefi_capsule_parser.c     | 155 ++++++++++++++++++
+ .../fw_update_agent/uefi_capsule_parser.h     |  31 ++++
+ 3 files changed, 188 insertions(+)
+ create mode 100644 platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c
+ create mode 100644 platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.h
+
+diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+index 16d256bc34..f34035d361 100644
+--- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+@@ -51,6 +51,7 @@ target_include_directories(platform_s
+         services/include
+     INTERFACE
+         cc312
+        fw_update_agent
+ )
+ 
+ target_sources(platform_s
+@@ -67,6 +68,7 @@ target_sources(platform_s
+         tfm_hal_platform.c
+         ${CMAKE_SOURCE_DIR}/platform/ext/common/tfm_hal_nvic.c
+         $<$<BOOL:TFM_PARTITION_PLATFORM>:${CMAKE_CURRENT_SOURCE_DIR}/services/src/tfm_platform_system.c>
+        fw_update_agent/uefi_capsule_parser.c
+ )
+ 
+ if (PLATFORM_IS_FVP)
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c
+new file mode 100644
+index 0000000000..32133b2eb2
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c
+@@ -0,0 +1,155 @@
+/*
+ * Copyright (c) 2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#include "uefi_capsule_parser.h"
+#include "fwu_agent.h"
+#include <string.h>
+
+/*
+Update Capsule Structure (UEFI spec 2.9 1004)
+    EFI_CAPSULE_HEADER
+    ...
+    ...
+    ...
+    CAPSULE_BODY
+        efi_firmware_management_capsule_header
+        Optional Driver 1 (item_offset[0])
+        Optional Driver 2 (item_offset[1])
+            Payload 1 (item_offset[2])
+                efi_firmware_management_capsule_iamge_header
+                Binary Update image (Image_length == update_image_size)
+                Vendor Code bytes  (Data lenght == update_vendorcode_size)
+            Payload 2 (item_offset[3])
+            ...
+            ...
+            Payload n (item_offset[embedded_driver_count + payload_item_count -1])
+*/
+
+typedef struct {
+    struct efi_guid         capsule_guid;
+    uint32_t                header_size;
+    uint32_t                flags;
+    uint32_t                capsule_image_size;
+} efi_capsule_header_t;
+
+typedef struct {
+    uint32_t                version;
+    uint16_t                embedded_driver_count;
+    uint16_t                payload_item_count;
+    uint64_t                item_offset_list[];
+} efi_firmware_management_capsule_header_t;
+
+typedef struct {
+    uint32_t                version;
+    struct efi_guid         update_image_type_id;
+    uint8_t                 update_image_index;
+    uint8_t                 reserved_bytes[3];
+    uint32_t                update_image_size;
+    uint32_t                update_vendorcode_size;
+    uint64_t                update_hardware_instance; //introduced in v2
+    uint64_t                image_capsule_support; //introduced in v3
+} efi_firmware_management_capsule_image_header_t;
+
+#define ANYSIZE_ARRAY 0
+
+typedef struct {
+    uint32_t                dwLength;
+    uint16_t                wRevision;
+    uint16_t                wCertificateType;
+    uint8_t                 bCertificate[ANYSIZE_ARRAY];
+} WIN_CERTIFICATE;
+
+typedef struct {
+    WIN_CERTIFICATE         hdr;
+    struct efi_guid         cert_type;
+    uint8_t                 cert_data[ANYSIZE_ARRAY];
+} win_certificate_uefi_guid_t;
+
+typedef struct {
+    uint64_t                    monotonic_count;
+    win_certificate_uefi_guid_t   auth_info;
+} efi_firmware_image_authentication_t;
+
+
+enum uefi_capsule_error_t uefi_capsule_retrieve_images(void* capsule_ptr,
+        capsule_image_info_t* images_info)
+{
+    char *ptr = (char*)capsule_ptr;
+    efi_capsule_header_t* capsule_header;
+    efi_firmware_management_capsule_header_t* payload_header;
+    efi_firmware_management_capsule_image_header_t* image_header;
+    efi_firmware_image_authentication_t* image_auth;
+    uint32_t total_size;
+    uint32_t image_count;
+    uint32_t auth_size;
+
+    FWU_LOG_MSG("%s: enter, capsule ptr = 0x%p\n\r", __func__, capsule_ptr);
+
+    if (!capsule_ptr) {
+        return UEFI_CAPSULE_PARSER_ERROR;
+    }
+
+    capsule_header = (efi_capsule_header_t*)ptr;
+    ptr += sizeof(efi_capsule_header_t) + sizeof(uint32_t);
+    payload_header = (efi_firmware_management_capsule_header_t*)ptr;
+
+    total_size = capsule_header->capsule_image_size;
+    image_count = payload_header->payload_item_count;
+    images_info->nr_image = image_count;
+
+    FWU_LOG_MSG("%s: capsule size = %u, image count = %u\n\r", __func__,
+                        total_size, image_count);
+
+    if ((image_count == 0) || (image_count > NR_OF_IMAGES_IN_FW_BANK)) {
+        return UEFI_CAPSULE_PARSER_ERROR;
+    }
+
+    for (int i = 0; i < image_count; i++) {
+
+        image_header = (efi_firmware_management_capsule_image_header_t*)(ptr +
+                                payload_header->item_offset_list[i]);
+
+        images_info->size[i] = image_header->update_image_size;
+        images_info->version[i] = image_header->version;
+        FWU_LOG_MSG("%s: image %i version = %u\n\r", __func__, i,
+                                images_info->version[i]);
+
+        image_auth = (efi_firmware_image_authentication_t*)(
+                        (char*)image_header +
+                        sizeof (efi_firmware_management_capsule_image_header_t)
+                     );
+        auth_size = sizeof(uint64_t) /* monotonic_count */  +
+                    image_auth->auth_info.hdr.dwLength /* WIN_CERTIFICATE + cert_data */ +
+                    sizeof(struct efi_guid) /* cert_type */;
+
+        FWU_LOG_MSG("%s: auth size = %u\n\r", __func__, auth_size);
+
+        images_info->size[i] -= auth_size;
+
+        images_info->image[i] = (
+                (char*)image_header +
+                sizeof(efi_firmware_management_capsule_image_header_t) +
+                auth_size);
+
+        memcpy(&images_info->guid[i], &(image_header->update_image_type_id),
+                                                        sizeof(struct efi_guid));
+
+        FWU_LOG_MSG("%s: image %d at %p, size=%u\n\r", __func__, i,
+                        images_info->image[i], images_info->size[i]);
+
+        if ((payload_header->item_offset_list[i] +
+             sizeof(efi_firmware_management_capsule_image_header_t) +
+             image_header->update_image_size) > total_size)
+        {
+            return UEFI_CAPSULE_PARSER_ERROR;
+        }
+
+    }
+
+    FWU_LOG_MSG("%s: exit\n\r", __func__);
+    return UEFI_CAPSULE_PARSER_SUCCESS;
+}
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.h b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.h
+new file mode 100644
+index 0000000000..a890a709e9
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.h
+@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef UEFI_CAPSULE_PARSER_H
+#define UEFI_CAPSULE_PARSER_H
+
+#include <stdint.h>
+#include "fip_parser/external/uuid.h"
+#include "flash_layout.h"
+
+enum uefi_capsule_error_t {
+    UEFI_CAPSULE_PARSER_SUCCESS = 0,
+    UEFI_CAPSULE_PARSER_ERROR = (-1)
+};
+
+typedef struct capsule_image_info {
+    uint32_t nr_image;
+    void *image[NR_OF_IMAGES_IN_FW_BANK];
+    struct efi_guid guid[NR_OF_IMAGES_IN_FW_BANK];
+    uint32_t size[NR_OF_IMAGES_IN_FW_BANK];
+    uint32_t version[NR_OF_IMAGES_IN_FW_BANK];
+} capsule_image_info_t;
+
+enum uefi_capsule_error_t uefi_capsule_retrieve_images(void* capsule_ptr,
+        capsule_image_info_t* images_info);
+
+#endif /* UEFI_CAPSULE_PARSER_H */
+-- 
+2.17.1
+
@@ -0,0 +1,106 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From c1ae09844562f33ddf07b8f5ca6b7d98ccbaf24c Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Sat, 2 Oct 2021 18:48:31 +0100
+Subject: [PATCH 04/15] corstone1000: add firmware update (fwu) agent into TF-M
+
+The commit links the firmware-update (fwu) agent into the
+TF-M.
+
+The commit also configures the secure enclave firewall to
+access DRAM, where uefi capsule will be written by ota client
+for fwu agent to parse.
+
+Change-Id: I89617a9b515d6aa5cc4f383b5a75a4beef73cc33
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ .../ext/target/arm/corstone1000/CMakeLists.txt  |  1 +
+ .../Device/Include/platform_base_address.h      |  1 +
+ .../target/arm/corstone1000/bl1/bl1_boot_hal.c  | 17 +++++++++++++++++
+ .../target/arm/corstone1000/tfm_hal_platform.c  |  5 +++++
+ 4 files changed, 24 insertions(+)
+
+diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+index f34035d361..81623f16ff 100644
+--- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+@@ -69,6 +69,7 @@ target_sources(platform_s
+         ${CMAKE_SOURCE_DIR}/platform/ext/common/tfm_hal_nvic.c
+         $<$<BOOL:TFM_PARTITION_PLATFORM>:${CMAKE_CURRENT_SOURCE_DIR}/services/src/tfm_platform_system.c>
+         fw_update_agent/uefi_capsule_parser.c
+        fw_update_agent/fwu_agent.c
+ )
+ 
+ if (PLATFORM_IS_FVP)
+diff --git a/platform/ext/target/arm/corstone1000/Device/Include/platform_base_address.h b/platform/ext/target/arm/corstone1000/Device/Include/platform_base_address.h
+index 5f37caa09c..e86ddcfbc9 100644
+--- a/platform/ext/target/arm/corstone1000/Device/Include/platform_base_address.h
+++ b/platform/ext/target/arm/corstone1000/Device/Include/platform_base_address.h
+@@ -75,5 +75,6 @@
+ #define CORSTONE1000_HOST_FPGA_SCC_REGISTERS       (0x80000000U) /* FPGA SCC Registers                */
+ #define CORSTONE1000_HOST_SE_SECURE_FLASH_BASE_FVP (0x80010000U) /* SE Flash                          */
+ #define CORSTONE1000_HOST_AXI_QSPI_CTRL_REG_BASE   (0x80050000U) /* AXI QSPI Controller               */
+#define CORSTONE1000_HOST_DRAM_UEFI_CAPSULE        (0xA0000000U) /* 1.5 GB DDR                        */
+ 
+ #endif  /* __PLATFORM_BASE_ADDRESS_H__ */
+diff --git a/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c b/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
+index 5e5e5c9e68..54042495d7 100644
+--- a/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
+++ b/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
+@@ -47,6 +47,7 @@ REGION_DECLARE(Image$$, ARM_LIB_HEAP, $$ZI$$Limit)[];
+ #define HOST_AXI_QSPI_CTRL_REG_BASE_SE_SECURE_FLASH    0x60010000
+ 
+ #define HOST_DRAM_BASE                  0x80000000
+#define HOST_DRAM_UEFI_CAPSULE          0x80000000
+ 
+ #define SE_MID                          0
+ 
+@@ -249,6 +250,22 @@ static void setup_se_firewall(void)
+     fc_enable_mpe(RGN_MPE0);
+     fc_enable_regions();
+ 
+    /* DDR/DRAM/UEFI_CAPSULE: 32MB */
+    fc_select_region(6);
+    fc_disable_regions();
+    fc_disable_mpe(RGN_MPE0);
+    fc_prog_rgn(RGN_SIZE_32MB, CORSTONE1000_HOST_DRAM_UEFI_CAPSULE);
+    fc_prog_rgn_upper_addr(HOST_DRAM_UEFI_CAPSULE);
+    fc_enable_addr_trans();
+    fc_init_mpl(RGN_MPE0);
+    mpl_rights = (RGN_MPL_SECURE_READ_MASK |
+                  RGN_MPL_SECURE_WRITE_MASK);
+
+    fc_enable_mpl(RGN_MPE0, mpl_rights);
+    fc_prog_mid(RGN_MPE0, SE_MID);
+    fc_enable_mpe(RGN_MPE0);
+    fc_enable_regions();
+
+ 
+     fc_pe_enable();
+ }
+diff --git a/platform/ext/target/arm/corstone1000/tfm_hal_platform.c b/platform/ext/target/arm/corstone1000/tfm_hal_platform.c
+index 71472ea08c..0072b5b928 100644
+--- a/platform/ext/target/arm/corstone1000/tfm_hal_platform.c
+++ b/platform/ext/target/arm/corstone1000/tfm_hal_platform.c
+@@ -8,11 +8,16 @@
+ #include "cmsis.h"
+ #include "tfm_hal_platform.h"
+ #include "uart_stdout.h"
+#include "fwu_agent.h"
+ 
+ enum tfm_hal_status_t tfm_hal_platform_init(void)
+ {
+     __enable_irq();
+     stdio_init();
+ 
+    if (fwu_metadata_init()) {
+        return TFM_HAL_ERROR_GENERIC;
+    }
+
+     return TFM_HAL_SUCCESS;
+ }
+-- 
+2.17.1
+
@@ -0,0 +1,437 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From 593087034655eca09ff8e80e67c3252399fa0ce7 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Sat, 2 Oct 2021 18:51:21 +0100
+Subject: [PATCH 05/15] corstone1000: implement corstone1000_fwu_flash_images
+
+The API, corstone1000_fwu_flash_images, is an non-secure host
+inteface (firmware update client) to send new updatable images,
+and to start the update process. The implementation of the API does
+version verfification before coping the images to the update bank.
+After copy, the platform is reset.
+
+On successful call to the API, the firmware update state of the
+system changes from regular state to trial state. On reset,
+the system is expected but not guaranteed to boot from the
+update/trial bank.
+
+Change-Id: I6c278145ec95ec522f7e59d00e1640a039c9778e
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ .../corstone1000/CMSIS_Driver/Driver_Flash.c  |  11 +
+ .../corstone1000/Native_Driver/flash_common.h |   1 +
+ .../corstone1000/fw_update_agent/fwu_agent.c  | 225 ++++++++++++++++++
+ .../corstone1000/fw_update_agent/fwu_agent.h  |  11 +
+ .../include/corstone1000_ioctl_requests.h     |  32 +++
+ .../services/src/tfm_platform_system.c        |  24 +-
+ 6 files changed, 300 insertions(+), 4 deletions(-)
+ create mode 100644 platform/ext/target/arm/corstone1000/services/include/corstone1000_ioctl_requests.h
+
+diff --git a/platform/ext/target/arm/corstone1000/CMSIS_Driver/Driver_Flash.c b/platform/ext/target/arm/corstone1000/CMSIS_Driver/Driver_Flash.c
+index 10952d4cbe..01c535e094 100644
+--- a/platform/ext/target/arm/corstone1000/CMSIS_Driver/Driver_Flash.c
+++ b/platform/ext/target/arm/corstone1000/CMSIS_Driver/Driver_Flash.c
+@@ -175,6 +175,11 @@ int32_t Select_XIP_Mode_For_Shared_Flash(void)
+     return ARM_DRIVER_OK;
+ }
+ 
+int32_t Select_Write_Mode_For_Shared_Flash(void)
+{
+    return ARM_DRIVER_OK;
+}
+
+ static int32_t STRATAFLASHJ3_Initialize(ARM_Flash_SignalEvent_t cb_event)
+ {
+     ARG_UNUSED(cb_event);
+@@ -392,6 +397,12 @@ int32_t Select_XIP_Mode_For_Shared_Flash(void)
+     return ARM_DRIVER_OK;
+ }
+ 
+int32_t Select_Write_Mode_For_Shared_Flash(void)
+{
+    select_qspi_mode(&AXI_QSPI_DEV_S);
+    return ARM_DRIVER_OK;
+}
+
+ static ARM_FLASH_CAPABILITIES N25Q256A_Driver_GetCapabilities(void)
+ {
+     return N25Q256ADriverCapabilities;
+diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/flash_common.h b/platform/ext/target/arm/corstone1000/Native_Driver/flash_common.h
+index 76d5303f83..2e91fb2db4 100644
+--- a/platform/ext/target/arm/corstone1000/Native_Driver/flash_common.h
+++ b/platform/ext/target/arm/corstone1000/Native_Driver/flash_common.h
+@@ -18,6 +18,7 @@ extern "C"
+ #include "Driver_Common.h"
+ 
+ int32_t Select_XIP_Mode_For_Shared_Flash(void);
+int32_t Select_Write_Mode_For_Shared_Flash(void);
+ 
+ #ifdef  __cplusplus
+ }
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+index b9c507e4ef..7fa64db0f7 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+@@ -11,6 +11,10 @@
+ #include "Driver_Flash.h"
+ #include "flash_layout.h"
+ #include "fip_parser/external/uuid.h"
+#include "region_defs.h"
+#include "uefi_capsule_parser.h"
+#include "flash_common.h"
+#include "platform_base_address.h"
+ 
+ /* Properties of image in a bank */
+ struct fwu_image_properties {
+@@ -73,9 +77,27 @@ struct fwu_private_metadata {
+ 
+ } __packed;
+ 
+
+ struct fwu_metadata _metadata;
+
+ int is_initialized = 0;
+ 
+capsule_image_info_t capsule_info;
+
+enum fwu_agent_state_t {
+    FWU_AGENT_STATE_UNKNOWN = -1,
+    FWU_AGENT_STATE_REGULAR = 0,
+    FWU_AGENT_STATE_TRIAL,
+};
+
+struct efi_guid full_capsule_image_guid = {
+    .time_low = 0x3a770ddc,
+    .time_mid = 0x409b,
+    .time_hi_and_version = 0x48b2,
+    .clock_seq_and_node = {0x81, 0x41, 0x93, 0xb7, 0xc6, 0x0b, 0x20, 0x9e}
+};
+
+
+ #define IMAGE_ACCEPTED          (1)
+ #define IMAGE_NOT_ACCEPTED      (0)
+ #define BANK_0                  (0)
+@@ -84,8 +106,12 @@ int is_initialized = 0;
+ #define IMAGE_1                 (1)
+ #define IMAGE_2                 (2)
+ #define IMAGE_3                 (3)
+#define IMAGE_END               (IMAGE_3)
+#define IMAGE_ALL               (IMAGE_END + 1)
+#define IMAGE_NOT_RECOGNIZED    (-1)
+ #define INVALID_VERSION         (0xffffffff)
+ 
+
+ #ifndef FWU_METADATA_FLASH_DEV
+     #ifndef FLASH_DEV_NAME
+     #error "FWU_METADATA_FLASH_DEV or FLASH_DEV_NAME must be defined in flash_layout.h"
+@@ -307,3 +333,202 @@ enum fwu_agent_error_t fwu_metadata_provision(void)
+     return FWU_AGENT_SUCCESS;
+ }
+ 
+static enum fwu_agent_state_t get_fwu_agent_state(
+        struct fwu_metadata *metadata_ptr,
+        struct fwu_private_metadata *priv_metadata_ptr)
+{
+    uint32_t boot_index;
+
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    boot_index = priv_metadata_ptr->boot_index;
+
+    if (boot_index != metadata_ptr->active_index) {
+        return FWU_AGENT_STATE_TRIAL;
+    }
+
+    for (int i = 0; i < NR_OF_IMAGES_IN_FW_BANK; i++) {
+        if ((metadata_ptr->img_entry[i].img_props[boot_index].accepted)
+                == (IMAGE_NOT_ACCEPTED)) {
+            return FWU_AGENT_STATE_TRIAL;
+        }
+    }
+
+    FWU_LOG_MSG("%s: exit: FWU_AGENT_STATE_REGULAR\n\r", __func__);
+    return FWU_AGENT_STATE_REGULAR;
+}
+
+static int get_image_info_in_bank(struct efi_guid* guid, uint32_t* image_bank_offset)
+{
+    if ((memcmp(guid, &full_capsule_image_guid, sizeof(struct efi_guid))) == 0) {
+        *image_bank_offset = 0;
+        return IMAGE_ALL;
+    }
+
+    return IMAGE_NOT_RECOGNIZED;
+}
+
+static enum fwu_agent_error_t erase_bank(uint32_t bank_offset)
+{
+    int ret;
+    uint32_t sectors;
+
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    if ((bank_offset % FWU_METADATA_FLASH_SECTOR_SIZE) != 0) {
+        return FWU_AGENT_ERROR;
+    }
+
+    if ((BANK_PARTITION_SIZE % FWU_METADATA_FLASH_SECTOR_SIZE) != 0) {
+        return FWU_AGENT_ERROR;
+    }
+
+    sectors = BANK_PARTITION_SIZE / FWU_METADATA_FLASH_SECTOR_SIZE;
+
+    FWU_LOG_MSG("%s: erasing sectors = %u, from offset = %u\n\r", __func__,
+                     sectors, bank_offset);
+
+    for (int i = 0; i < sectors; i++) {
+        ret = FWU_METADATA_FLASH_DEV.EraseSector(
+                bank_offset + (i * FWU_METADATA_FLASH_SECTOR_SIZE));
+        if (ret != ARM_DRIVER_OK) {
+            return FWU_AGENT_ERROR;
+        }
+    }
+
+    FWU_LOG_MSG("%s: exit\n\r", __func__);
+    return FWU_AGENT_SUCCESS;
+}
+
+
+static enum fwu_agent_error_t flash_full_capsule(
+        struct fwu_metadata* metadata, void* images, uint32_t size,
+        uint32_t version)
+{
+    int ret;
+    uint32_t active_index = metadata->active_index;
+    uint32_t bank_offset;
+    uint32_t previous_active_index;
+
+    FWU_LOG_MSG("%s: enter: image = 0x%p, size = %u, version = %u\n\r"
+                , __func__, images, size, version);
+
+    if (!metadata || !images) {
+        return FWU_AGENT_ERROR;
+    }
+
+    if (size > BANK_PARTITION_SIZE) {
+        return FWU_AGENT_ERROR;
+    }
+
+    if (version <=
+            (metadata->img_entry[IMAGE_0].img_props[active_index].version)) {
+        return FWU_AGENT_ERROR;
+    }
+
+    if (active_index == BANK_0) {
+        previous_active_index = BANK_1;
+        bank_offset = BANK_1_PARTITION_OFFSET;
+    } else if (active_index == BANK_1) {
+        previous_active_index = BANK_0;
+        bank_offset = BANK_0_PARTITION_OFFSET;
+    } else {
+        return FWU_AGENT_ERROR;
+    }
+
+    if (erase_bank(bank_offset)) {
+        return FWU_AGENT_ERROR;
+    }
+
+    FWU_LOG_MSG("%s: writing capsule to the flash at offset = %u...\n\r",
+                      __func__, bank_offset);
+    ret = FWU_METADATA_FLASH_DEV.ProgramData(bank_offset, images, size);
+    if (ret != ARM_DRIVER_OK) {
+        return FWU_AGENT_ERROR;
+    }
+    FWU_LOG_MSG("%s: images are written to bank offset = %u\n\r", __func__,
+                     bank_offset);
+
+    /* Change system state to trial bank state */
+    for (int i = 0; i < NR_OF_IMAGES_IN_FW_BANK; i++) {
+        metadata->img_entry[i].img_props[previous_active_index].accepted =
+                                                        IMAGE_NOT_ACCEPTED;
+        metadata->img_entry[i].img_props[previous_active_index].version = version;
+    }
+    metadata->active_index = previous_active_index;
+    metadata->previous_active_index = active_index;
+
+    ret = metadata_write(metadata);
+    if (ret) {
+        return ret;
+    }
+
+    FWU_LOG_MSG("%s: exit\n\r", __func__);
+    return FWU_AGENT_SUCCESS;
+}
+
+enum fwu_agent_error_t corstone1000_fwu_flash_image(void)
+{
+    enum fwu_agent_error_t ret;
+    struct fwu_private_metadata priv_metadata;
+    enum fwu_agent_state_t current_state;
+    void *capsule_ptr = (char*)CORSTONE1000_HOST_DRAM_UEFI_CAPSULE;
+    int image_index;
+    uint32_t image_bank_offset;
+    uint32_t nr_images;
+
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    if (!is_initialized) {
+        return FWU_AGENT_ERROR;
+    }
+
+    Select_Write_Mode_For_Shared_Flash();
+
+    if (metadata_read(&_metadata)) {
+        ret =  FWU_AGENT_ERROR;
+        goto out;
+    }
+
+    if (private_metadata_read(&priv_metadata)) {
+        ret =  FWU_AGENT_ERROR;
+        goto out;
+    }
+
+    /* Firmware update process can only start in regular state. */
+    current_state = get_fwu_agent_state(&_metadata, &priv_metadata);
+    if (current_state != FWU_AGENT_STATE_REGULAR) {
+        ret =  FWU_AGENT_ERROR;
+        goto out;
+    }
+
+    memset(&capsule_info, 0, sizeof(capsule_image_info_t));
+    if (uefi_capsule_retrieve_images(capsule_ptr, &capsule_info)) {
+        ret =  FWU_AGENT_ERROR;
+        goto out;
+    }
+    nr_images = capsule_info.nr_image;
+
+    for (int i = 0; i < nr_images; i++) {
+        image_index = get_image_info_in_bank(&capsule_info.guid[i],
+                                &image_bank_offset);
+        switch(image_index) {
+            case IMAGE_ALL:
+                ret = flash_full_capsule(&_metadata, capsule_info.image[i],
+                                         capsule_info.size[i],
+                                         capsule_info.version[i]);
+                break;
+            default:
+                FWU_LOG_MSG("%s: sent image not recognized\n\r", __func__);
+                ret = FWU_AGENT_ERROR;
+                break;
+        }
+    }
+
+out:
+    Select_XIP_Mode_For_Shared_Flash();
+
+    FWU_LOG_MSG("%s: exit: ret = %d\n\r", __func__, ret);
+    return ret;
+}
+
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+index 449d354100..f5ab877ef1 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+@@ -23,9 +23,20 @@ enum fwu_agent_error_t {
+         FWU_AGENT_ERROR = (-1)
+ };
+ 
+#define FWU_ASSERT(_c_)                                                        \
+                if (!(_c_)) {                                                  \
+                    FWU_LOG_MSG("%s:%d assert hit\n\r", __func__, __LINE__);   \
+                    while(1) {};                                               \
+                }                                                              \
+
+
+ enum fwu_agent_error_t fwu_metadata_provision(void);
+ enum fwu_agent_error_t fwu_metadata_init(void);
+ 
+/* host to secure enclave:
+ * firwmare update image is sent accross
+ */
+enum fwu_agent_error_t corstone1000_fwu_flash_image(void);
+ 
+ #endif /* FWU_AGENT_H */
+ 
+diff --git a/platform/ext/target/arm/corstone1000/services/include/corstone1000_ioctl_requests.h b/platform/ext/target/arm/corstone1000/services/include/corstone1000_ioctl_requests.h
+new file mode 100644
+index 0000000000..8ac67346b6
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/services/include/corstone1000_ioctl_requests.h
+@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef CORSTONE1000_IOCTL_REQUESTS_H
+#define CORSTONE1000_IOCTL_REQUESTS_H
+
+#include<stdint.h>
+
+
+enum corstone1000_ioctl_id_t {
+   IOCTL_CORSTONE1000_FWU_FLASH_IMAGES = 0,
+   IOCTL_CORSTONE1000_FWU_HOST_ACK,
+};
+
+
+typedef struct corstone1000_ioctl_in_params {
+
+    uint32_t ioctl_id;
+
+} corstone1000_ioctl_in_params_t;
+
+typedef struct corstone1000_ioctl_out_params {
+
+    int32_t result;
+
+} corstone1000_ioctl_out_params_t;
+
+#endif /* CORSTONE1000_IOCTL_REQUESTS_H */
+diff --git a/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c b/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+index ed31c8895a..f9629a1688 100644
+--- a/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+++ b/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+@@ -7,6 +7,8 @@
+ 
+ #include "tfm_platform_system.h"
+ #include "platform_description.h"
+#include "corstone1000_ioctl_requests.h"
+#include "fwu_agent.h"
+ 
+ void tfm_platform_hal_system_reset(void)
+ {
+@@ -18,8 +20,22 @@ enum tfm_platform_err_t tfm_platform_hal_ioctl(tfm_platform_ioctl_req_t request,
+                                                psa_invec  *in_vec,
+                                                psa_outvec *out_vec)
+ {
+-    (void)in_vec;
+-    (void)out_vec;
+-    /* No IOCTL is ipmlemented */
+-    return TFM_PLATFORM_ERR_NOT_SUPPORTED;
+    int32_t ret = TFM_PLATFORM_ERR_SUCCESS;
+    const corstone1000_ioctl_in_params_t *in_params =
+                                    (corstone1000_ioctl_in_params_t *)in_vec->base;
+    corstone1000_ioctl_out_params_t *out_params = (corstone1000_ioctl_out_params_t *)out_vec->base;
+
+    switch(in_params->ioctl_id) {
+        case IOCTL_CORSTONE1000_FWU_FLASH_IMAGES:
+            out_params->result = corstone1000_fwu_flash_image();
+            if (!out_params->result) {
+                NVIC_SystemReset();
+            }
+            break;
+        default:
+            ret = TFM_PLATFORM_ERR_NOT_SUPPORTED;
+            break;
+    }
+
+    return ret;
+ }
+-- 
+2.17.1
+
@@ -0,0 +1,266 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From 7ec8812451a4e25ca0790f84c7a0ee1f260f864c Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Mon, 11 Oct 2021 20:12:46 +0100
+Subject: [PATCH 06/15] corstone1000: add logic to select boot bank
+
+Bl1 selects the boot bank depending upon the firmware update state
+of the system. When in the trial state, new images are being tried,
+BL1 select trial/update image bank for a pre-determined number of
+times. If in all attempts, the trial bank fails to boot, BL1 falls
+back to the previous active bank. For any reason, if previous active
+bank also fails to boot for that pre-determined number of times,
+the BL1 simply goes into an assert halt state. Idealy a recovery
+mechanism should boot but this is currently out-of-scope for the
+project.
+
+BL2 logic simply tries to boot from the bank selected by the BL1.
+
+It is expected that the fail boots are detected by secure enclave,
+and in those cases, reset of the system is triggered.
+
+Change-Id: I773752f789bf8b402436c61134ac79bb405553b5
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ .../target/arm/corstone1000/CMakeLists.txt    |   2 +
+ .../arm/corstone1000/bl1/bl1_boot_hal.c       |   6 +-
+ .../target/arm/corstone1000/bl2_boot_hal.c    |   8 +-
+ .../corstone1000/fw_update_agent/fwu_agent.c  | 102 ++++++++++++++++++
+ .../corstone1000/fw_update_agent/fwu_agent.h  |   5 +-
+ 5 files changed, 117 insertions(+), 6 deletions(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+index 81623f16ff..a2191c835f 100644
+--- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+@@ -109,6 +109,7 @@ target_sources(platform_bl2
+         Native_Driver/uart_pl011_drv.c
+         fip_parser/fip_parser.c
+         bl2_boot_hal.c
+        fw_update_agent/fwu_agent.c
+ )
+ 
+ if (PLATFORM_IS_FVP)
+@@ -155,6 +156,7 @@ target_include_directories(platform_bl2
+         ${MCUBOOT_PATH}/boot/bootutil/include # for fault_injection_hardening.h only
+         ${CMAKE_BINARY_DIR}/bl2/ext/mcuboot # for mcuboot_config.h only
+         $<BUILD_INTERFACE:${BL2_SOURCE}/ext/mcuboot/include>
+        fw_update_agent
+ )
+ 
+ #========================= BL1 component =======================================#
+diff --git a/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c b/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
+index 54042495d7..2af5b8c846 100644
+--- a/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
+++ b/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
+@@ -587,7 +587,7 @@ extern void add_bank_offset_to_image_offset(uint32_t bank_offset);
+ int32_t boot_platform_init(void)
+ {
+     int32_t result;
+-    uint32_t bank_offset = BANK_0_PARTITION_OFFSET;
+    uint32_t bank_offset;
+ 
+ #if !(PLATFORM_IS_FVP)
+     setup_mpu();
+@@ -596,7 +596,6 @@ int32_t boot_platform_init(void)
+ #if !(PLATFORM_IS_FVP)
+     setup_host_firewall();
+ #endif
+-    add_bank_offset_to_image_offset(bank_offset);
+ 
+     result = FLASH_DEV_NAME.Initialize(NULL);
+     if (result != ARM_DRIVER_OK) {
+@@ -630,6 +629,9 @@ int32_t boot_platform_init(void)
+         }
+     }
+ 
+    bl1_get_boot_bank(&bank_offset);
+    add_bank_offset_to_image_offset(bank_offset);
+
+     return 0;
+ }
+ 
+diff --git a/platform/ext/target/arm/corstone1000/bl2_boot_hal.c b/platform/ext/target/arm/corstone1000/bl2_boot_hal.c
+index 75d2cb60d8..4f5b48a2e0 100644
+--- a/platform/ext/target/arm/corstone1000/bl2_boot_hal.c
+++ b/platform/ext/target/arm/corstone1000/bl2_boot_hal.c
+@@ -18,6 +18,7 @@
+ #include <string.h>
+ #include "tfm_plat_otp.h"
+ #include "tfm_plat_provisioning.h"
+#include "fwu_agent.h"
+ 
+ #ifdef PLATFORM_PSA_ADAC_SECURE_DEBUG
+ #include "psa_adac_platform.h"
+@@ -112,15 +113,13 @@ int32_t boot_platform_init(void)
+ {
+     int32_t result;
+     enum tfm_plat_err_t plat_err;
+-    uint32_t bank_offset = BANK_0_PARTITION_OFFSET;
+    uint32_t bank_offset;
+ 
+     result = fill_bl2_flash_map_by_parsing_fips(BANK_0_PARTITION_OFFSET);
+     if (result) {
+         return 1;
+     }
+ 
+-    add_bank_offset_to_image_offset(bank_offset);
+-
+     result = FLASH_DEV_NAME.Initialize(NULL);
+     if (result != ARM_DRIVER_OK) {
+         return 1;
+@@ -154,6 +153,9 @@ int32_t boot_platform_init(void)
+     }
+ #endif
+ 
+    bl2_get_boot_bank(&bank_offset);
+    add_bank_offset_to_image_offset(bank_offset);
+
+     return 0;
+ }
+ 
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+index 7fa64db0f7..23a15ee71b 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+@@ -75,8 +75,12 @@ struct fwu_private_metadata {
+        /* boot_index: the bank from which system is booted from */
+        uint32_t boot_index;
+ 
+       /* counter: tracking number of boot attempted so far */
+       uint32_t boot_attempted;
+
+ } __packed;
+ 
+#define MAX_BOOT_ATTEMPTS_PER_BANK 3
+ 
+ struct fwu_metadata _metadata;
+ 
+@@ -315,6 +319,7 @@ enum fwu_agent_error_t fwu_metadata_provision(void)
+     memset(&priv_metadata, 0, sizeof(struct fwu_private_metadata));
+ 
+     priv_metadata.boot_index = BANK_0;
+    priv_metadata.boot_attempted = 0;
+ 
+     ret = private_metadata_write(&priv_metadata);
+     if (ret) {
+@@ -532,3 +537,100 @@ out:
+     return ret;
+ }
+ 
+void bl1_get_boot_bank(uint32_t *bank_offset)
+{
+    struct fwu_private_metadata priv_metadata;
+    enum fwu_agent_state_t current_state;
+    uint32_t boot_attempted;
+    uint32_t boot_index;
+
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    if (fwu_metadata_init()) {
+        FWU_ASSERT(0);
+    }
+
+    if (private_metadata_read(&priv_metadata)) {
+        FWU_ASSERT(0);
+    }
+
+    if (metadata_read(&_metadata)) {
+        FWU_ASSERT(0);
+    }
+
+    current_state = get_fwu_agent_state(&_metadata, &priv_metadata);
+
+    if (current_state == FWU_AGENT_STATE_REGULAR) {
+        boot_index = _metadata.active_index;
+        FWU_ASSERT(boot_index == priv_metadata.boot_index);
+        boot_attempted = 0;
+    } else if (current_state == FWU_AGENT_STATE_TRIAL) {
+        boot_attempted = (++priv_metadata.boot_attempted);
+        FWU_LOG_MSG("%s: attempting boot number = %u\n\r",
+                                        __func__, boot_attempted);
+        if (boot_attempted <= MAX_BOOT_ATTEMPTS_PER_BANK) {
+            boot_index = _metadata.active_index;
+            FWU_LOG_MSG("%s: booting from trial bank: %u\n\r",
+                                        __func__, boot_index);
+        } else if (boot_attempted <= (2 * MAX_BOOT_ATTEMPTS_PER_BANK)) {
+            boot_index = _metadata.previous_active_index;
+            FWU_LOG_MSG("%s: gave up booting from trial bank\n\r", __func__);
+            FWU_LOG_MSG("%s: booting from previous active bank: %u\n\r",
+                                        __func__, boot_index);
+        } else {
+            FWU_LOG_MSG("%s: cannot boot system from any bank, halting...\n\r", __func__);
+            FWU_ASSERT(0);
+        }
+    } else {
+        FWU_ASSERT(0);
+    }
+
+    priv_metadata.boot_index = boot_index;
+    if (private_metadata_write(&priv_metadata)) {
+        FWU_ASSERT(0);
+    }
+
+    if (boot_index == BANK_0) {
+        *bank_offset = BANK_0_PARTITION_OFFSET;
+    } else if (boot_index == BANK_1) {
+        *bank_offset = BANK_1_PARTITION_OFFSET;
+    } else {
+        FWU_ASSERT(0);
+    }
+
+    FWU_LOG_MSG("%s: exit: booting from bank = %u, offset = %x\n\r", __func__,
+                        boot_index, *bank_offset);
+
+    return;
+}
+
+void bl2_get_boot_bank(uint32_t *bank_offset)
+{
+    uint32_t boot_index;
+    struct fwu_private_metadata priv_metadata;
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    if (fwu_metadata_init()) {
+        FWU_ASSERT(0);
+    }
+
+    if (private_metadata_read(&priv_metadata)) {
+        FWU_ASSERT(0);
+    }
+
+    boot_index = priv_metadata.boot_index;
+
+    if (boot_index == BANK_0) {
+        *bank_offset = BANK_0_PARTITION_OFFSET;
+    } else if (boot_index == BANK_1) {
+        *bank_offset = BANK_1_PARTITION_OFFSET;
+    } else {
+        FWU_ASSERT(0);
+    }
+
+    FWU_LOG_MSG("%s: exit: booting from bank = %u, offset = %x\n\r", __func__,
+                        boot_index, *bank_offset);
+
+    return;
+}
+
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+index f5ab877ef1..389381c326 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+@@ -38,5 +38,8 @@ enum fwu_agent_error_t fwu_metadata_init(void);
+  */
+ enum fwu_agent_error_t corstone1000_fwu_flash_image(void);
+ 
+-#endif /* FWU_AGENT_H */
+ 
+void bl1_get_boot_bank(uint32_t *bank_offset);
+void bl2_get_boot_bank(uint32_t *bank_offset);
+
+#endif /* FWU_AGENT_H */
+-- 
+2.17.1
+
@@ -0,0 +1,645 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From d8c6e41ee040d19748915d2c598df1c4b90a93a8 Mon Sep 17 00:00:00 2001
+From: Harry Moulton <harry.moulton@arm.com>
+Date: Tue, 5 Oct 2021 12:40:57 +0100
+Subject: [PATCH 07/15] corstone1000: integrate watchdog driver
+
+This change integrates and enables the watchdog timer driver
+inside the BL1, BL2 and TF-M. SoC and SE watchdogs are enabled,
+meaning the system should get reset if software becomes
+unresponsive.
+
+Signed-off-by: Harry Moulton <harry.moulton@arm.com>
+Change-Id: Iab957a58025aac98140bb71289a269443529e8ed
+---
+ .../target/arm/corstone1000/CMakeLists.txt    |   4 +
+ .../Native_Driver/arm_watchdog_drv.c          | 190 ++++++++++++++++++
+ .../Native_Driver/arm_watchdog_drv.h          | 179 +++++++++++++++++
+ .../arm/corstone1000/Native_Driver/watchdog.c |  81 ++++++++
+ .../arm/corstone1000/Native_Driver/watchdog.h |  32 +++
+ .../arm/corstone1000/bl1/CMakeLists.txt       |   2 +
+ .../arm/corstone1000/bl1/bl1_boot_hal.c       |   6 +
+ .../target/arm/corstone1000/bl2_boot_hal.c    |   6 +
+ .../arm/corstone1000/tfm_hal_platform.c       |   5 +
+ 9 files changed, 505 insertions(+)
+ create mode 100644 platform/ext/target/arm/corstone1000/Native_Driver/arm_watchdog_drv.c
+ create mode 100644 platform/ext/target/arm/corstone1000/Native_Driver/arm_watchdog_drv.h
+ create mode 100644 platform/ext/target/arm/corstone1000/Native_Driver/watchdog.c
+ create mode 100644 platform/ext/target/arm/corstone1000/Native_Driver/watchdog.h
+
+diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+index a2191c835f..cb66bd48d6 100644
+--- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+@@ -62,6 +62,8 @@ target_sources(platform_s
+         Device/Source/system_core_init.c
+         Native_Driver/uart_pl011_drv.c
+         Native_Driver/mhu_v2_x.c
+        Native_Driver/watchdog.c
+        Native_Driver/arm_watchdog_drv.c
+         spm_hal.c
+         tfm_hal_multi_core.c
+         tfm_hal_isolation.c
+@@ -107,6 +109,8 @@ target_sources(platform_bl2
+         Device/Source/device_definition.c
+         Device/Source/system_core_init.c
+         Native_Driver/uart_pl011_drv.c
+        Native_Driver/watchdog.c
+        Native_Driver/arm_watchdog_drv.c
+         fip_parser/fip_parser.c
+         bl2_boot_hal.c
+         fw_update_agent/fwu_agent.c
+diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/arm_watchdog_drv.c b/platform/ext/target/arm/corstone1000/Native_Driver/arm_watchdog_drv.c
+new file mode 100644
+index 0000000000..b6323c99a5
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/Native_Driver/arm_watchdog_drv.c
+@@ -0,0 +1,190 @@
+/*
+ * Copyright (c) 2016-2020 Arm Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_watchdog_drv.h"
+
+/* Watchdog control definitions */
+#define ARM_WATCHDOG_CTRL_INTEN        (0x1UL << 0)
+#define ARM_WATCHDOG_CTRL_RESEN        (0x1UL << 1)
+#define ARM_WATCHDOG_INTCLR            1UL
+#define ARM_WATCHDOG_RAWINTSTAT        1UL
+#define ARM_WATCHDOG_MASKINTSTAT       1UL
+#define ARM_WATCHDOG_UNLOCK_VALUE      0x1ACCE551
+#define ARM_WATCHDOG_LOCK_VALUE        0x00000001
+#define ARM_WATCHDOG_INTEGTESTEN       1UL
+#define ARM_WATCHDOG_INTEGTESTOUTSET   1UL
+#define ARM_WATCHDOG_MAX_VALUE         0xFFFFFFFF
+
+/* Watchdog state definitions */
+#define ARM_WATCHDOG_INITIALIZED  (1ul << 0)
+#define ARM_WATCHDOG_ENABLED      (1ul << 1)
+
+/* ARM watchdog memory mapped register access structure */
+struct arm_watchdog_t {
+    volatile uint32_t  load;          /* Offset: 0x000 (R/W) Load register */
+    volatile uint32_t  value;         /* Offset: 0x004 (R/ ) Value register */
+    volatile uint32_t  ctrl;          /* Offset: 0x008 (R/W) Control register */
+    volatile uint32_t  intclr;        /* Offset: 0x00C ( /W) Clear interrupt
+                                       *                     register */
+    volatile uint32_t  rawintstat;    /* Offset: 0x010 (R/ ) Raw interrupt
+                                       *                     status register */
+    volatile uint32_t  maskintstat;   /* Offset: 0x014 (R/ ) Interrupt status
+                                       *                     register */
+    volatile uint32_t  reserved0[762];
+    volatile uint32_t  lock;          /* Offset: 0xC00 (R/W) Lock register */
+    volatile uint32_t  reserved1[191];
+    volatile uint32_t  itcr;          /* Offset: 0xF00 (R/W) Integration test
+                                       *                     control register */
+    volatile uint32_t  itop;          /* Offset: 0xF04 ( /W) Integration Test
+                                       *                     output set
+                                       *                     register */
+};
+
+void arm_watchdog_init(struct arm_watchdog_dev_t* dev, uint32_t timeout)
+{
+    /*
+     * The init function leaves the watchdog in a clean state:
+     *  - initialized;
+     *  - disabled;
+     *  - locked.
+     */
+    if (arm_watchdog_is_enabled(dev)) {
+        arm_watchdog_unlock(dev);
+        (void)arm_watchdog_disable(dev);
+    }
+    arm_watchdog_lock(dev);
+
+    if (timeout == 0)
+        dev->data->timeout = ARM_WATCHDOG_MAX_VALUE;
+    else
+        dev->data->timeout = timeout;
+
+    dev->data->state = ARM_WATCHDOG_INITIALIZED;
+}
+
+enum arm_watchdog_error_t arm_watchdog_feed(struct arm_watchdog_dev_t* dev)
+{
+    struct arm_watchdog_t* p_wdog = (struct arm_watchdog_t*)dev->cfg->base;
+
+    if (!arm_watchdog_is_enabled(dev))
+        return ARM_WATCHDOG_ERR_NOT_ENAB;
+
+    if (arm_watchdog_is_locked(dev))
+        return ARM_WATCHDOG_ERR_LOCKED;
+
+    p_wdog->load = dev->data->timeout;
+
+    return ARM_WATCHDOG_ERR_NONE;
+}
+
+enum arm_watchdog_error_t
+arm_watchdog_clear_interrupt_and_refresh_counter(struct arm_watchdog_dev_t* dev)
+{
+    struct arm_watchdog_t* p_wdog = (struct arm_watchdog_t*)dev->cfg->base;
+
+    if (!arm_watchdog_is_enabled(dev))
+        return ARM_WATCHDOG_ERR_NOT_ENAB;
+
+    if (arm_watchdog_is_locked(dev))
+        return ARM_WATCHDOG_ERR_LOCKED;
+
+    p_wdog->intclr = ARM_WATCHDOG_INTCLR;
+
+    return ARM_WATCHDOG_ERR_NONE;
+}
+
+enum arm_watchdog_error_t arm_watchdog_enable(struct arm_watchdog_dev_t* dev)
+{
+    struct arm_watchdog_t* p_wdog = (struct arm_watchdog_t*)dev->cfg->base;
+
+    if (!arm_watchdog_is_initialized(dev))
+        return ARM_WATCHDOG_ERR_NOT_INIT;
+
+    if (arm_watchdog_is_locked(dev))
+        return ARM_WATCHDOG_ERR_LOCKED;
+
+    p_wdog->load = dev->data->timeout;
+
+    /* Starts the watchdog counter */
+    p_wdog->ctrl = (ARM_WATCHDOG_CTRL_RESEN | ARM_WATCHDOG_CTRL_INTEN);
+    dev->data->state |= ARM_WATCHDOG_ENABLED;
+
+    return ARM_WATCHDOG_ERR_NONE;
+}
+
+uint32_t arm_watchdog_is_enabled(struct arm_watchdog_dev_t* dev)
+{
+    return (dev->data->state & ARM_WATCHDOG_ENABLED);
+}
+
+enum arm_watchdog_error_t arm_watchdog_disable(struct arm_watchdog_dev_t* dev)
+{
+    struct arm_watchdog_t* p_wdog = (struct arm_watchdog_t*)dev->cfg->base;
+
+    if (!arm_watchdog_is_enabled(dev))
+        return ARM_WATCHDOG_ERR_NOT_ENAB;
+
+    if (arm_watchdog_is_locked(dev))
+        return ARM_WATCHDOG_ERR_LOCKED;
+
+    /* Stops the watchdog */
+    p_wdog->ctrl &= ~(ARM_WATCHDOG_CTRL_RESEN | ARM_WATCHDOG_CTRL_INTEN);
+    dev->data->state &= ~ARM_WATCHDOG_ENABLED;
+
+    return ARM_WATCHDOG_ERR_NONE;
+}
+
+void arm_watchdog_lock(struct arm_watchdog_dev_t* dev)
+{
+    struct arm_watchdog_t* p_wdog = (struct arm_watchdog_t*)dev->cfg->base;
+
+    /* Prevents writing to all of the registers */
+    p_wdog->lock = ARM_WATCHDOG_LOCK_VALUE;
+}
+
+uint32_t arm_watchdog_is_locked(struct arm_watchdog_dev_t* dev)
+{
+    struct arm_watchdog_t* p_wdog = (struct arm_watchdog_t*)dev->cfg->base;
+
+    /* The lock register can only return 0 or 1 when read */
+    return p_wdog->lock;
+}
+
+void arm_watchdog_unlock(struct arm_watchdog_dev_t* dev)
+{
+    struct arm_watchdog_t* p_wdog = (struct arm_watchdog_t*)dev->cfg->base;
+
+    p_wdog->lock = ARM_WATCHDOG_UNLOCK_VALUE;
+}
+
+inline uint32_t arm_watchdog_is_initialized(struct arm_watchdog_dev_t* dev)
+{
+    return (dev->data->state & ARM_WATCHDOG_INITIALIZED);
+}
+
+uint32_t arm_watchdog_get_remaining_time(struct arm_watchdog_dev_t* dev)
+{
+    struct arm_watchdog_t* p_wdog = (struct arm_watchdog_t*)dev->cfg->base;
+
+    if (!arm_watchdog_is_enabled(dev))
+        return 0;
+
+    if (arm_watchdog_is_locked(dev))
+        return 0;
+
+    return p_wdog->value;
+}
+
+diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/arm_watchdog_drv.h b/platform/ext/target/arm/corstone1000/Native_Driver/arm_watchdog_drv.h
+new file mode 100644
+index 0000000000..3b163625f5
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/Native_Driver/arm_watchdog_drv.h
+@@ -0,0 +1,179 @@
+/*
+ * Copyright (c) 2016-2020 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * \file arm_watchdog_drv.h
+ * \brief Generic driver for ARM watchdogs.
+ */
+
+#ifndef __ARM_WATCHDOG_DRV_H__
+#define __ARM_WATCHDOG_DRV_H__
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum arm_watchdog_error_t {
+    ARM_WATCHDOG_ERR_NONE = 0,  /*!< No error */
+    ARM_WATCHDOG_ERR_NOT_INIT,  /*!< Watchdog is not initialized */
+    ARM_WATCHDOG_ERR_NOT_ENAB,  /*!< Watchdog is not enabled */
+    ARM_WATCHDOG_ERR_LOCKED     /*!< Watchdog is locked */
+};
+
+/* ARM watchdog device configuration structure */
+struct arm_watchdog_dev_cfg_t {
+    const uint32_t base;  /*!< Watchdog base address */
+};
+
+/* ARM watchdog device data structure */
+struct arm_watchdog_dev_data_t {
+    uint32_t state;    /*!< Indicates if the watchdog
+                            is initialized and enabled */
+    uint32_t timeout;  /*!< Timeout to reset in cycles */
+};
+
+/* ARM watchdog device structure */
+struct arm_watchdog_dev_t {
+    const struct arm_watchdog_dev_cfg_t* const cfg;  /*!< Watchdog
+                                                          configuration */
+    struct arm_watchdog_dev_data_t* const data;      /*!< Watchdog data */
+};
+
+/**
+ * \brief Initializes a watchdog hardware.
+ *
+ * \param[in] dev      Watchdog to be initialized \ref arm_watchdog_dev_t
+ * \param[in] timeout  Timeout in cycles - 0 assings timeout to max value.
+ *
+ * \note This function doesn't check if dev is NULL.
+ *       This function leaves the watchdog locked. Before any further
+ *       operations, it needs to be unlocked and locked again.
+ */
+void arm_watchdog_init(struct arm_watchdog_dev_t* dev, uint32_t timeout);
+
+/**
+ * \brief Feeds the watchdog to not cause a reset.
+ *
+ * \param[in] dev  Watchdog to be fed \ref arm_watchdog_dev_t
+ *
+ * \return Returns error code as specified in \ref arm_watchdog_error_t
+ *
+ * \note This function doesn't check if dev is NULL.
+ */
+enum arm_watchdog_error_t arm_watchdog_feed(struct arm_watchdog_dev_t* dev);
+
+/**
+ * \brief Clear the interrupt and load timeout value to the load register.
+ *
+ * \param[in] dev   Watchdog to be fed \ref arm_watchdog_dev_t
+ *
+ * \return Returns error code as specified in \ref arm_watchdog_error_t
+ *
+ * \note This function doesn't check if dev is NULL.
+ */
+enum arm_watchdog_error_t
+arm_watchdog_clear_interrupt_and_refresh_counter(
+    struct arm_watchdog_dev_t* dev);
+
+/**
+ * \brief Enables the watchdog.
+ *
+ * \param[in] dev  Watchdog to be enabled \ref arm_watchdog_dev_t
+ *
+ * \return Returns error code as specified in \ref arm_watchdog_error_t
+ *
+ * \note This function doesn't check if dev is NULL.
+ */
+enum arm_watchdog_error_t arm_watchdog_enable(struct arm_watchdog_dev_t* dev);
+
+/**
+ * \brief Checks if the watchdog is enabled
+ *
+ * \param[in] dev Watchdog to be checked \ref arm_watchdog_dev_t
+ *
+ * \return 1 if watchdog is enabled, 0 otherwise.
+ *
+ * \note This function doesn't check if dev is NULL.
+ */
+uint32_t arm_watchdog_is_enabled(struct arm_watchdog_dev_t* dev);
+
+/**
+ * \brief Disables the watchdog.
+ *
+ * \param[in] dev  Watchdog to be disabled \ref arm_watchdog_dev_t
+ *
+ * \return 1 if watchdog is enabled, 0 otherwise.
+ *
+ * \note This function doesn't check if dev is NULL.
+ */
+enum arm_watchdog_error_t arm_watchdog_disable(struct arm_watchdog_dev_t* dev);
+
+/**
+ * \brief Locks the registers to not be written again.
+ *
+ * \param[in] dev  Watchdog to be locked \ref arm_watchdog_dev_t
+ *
+ * \note This function doesn't check if dev is NULL.
+ */
+void arm_watchdog_lock(struct arm_watchdog_dev_t* dev);
+
+/**
+ * \brief Checks if the watchdog registers are locked
+ *
+ * \param[in] dev Watchdog to be checked \ref arm_watchdog_dev_t
+ *
+ * \return 1 if the registers are locked, 0 otherwise
+ *
+ * \note This function doesn't check if dev is NULL.
+ */
+uint32_t arm_watchdog_is_locked(struct arm_watchdog_dev_t* dev);
+
+/**
+ * \brief Unlocks the registers to configure the watchdog again.
+ *
+ * \param[in] dev  Watchdog to be unlocked \ref arm_watchdog_dev_t
+ *
+ * \note This function doesn't check if dev is NULL.
+ */
+void arm_watchdog_unlock(struct arm_watchdog_dev_t* dev);
+
+/**
+ * \brief Gets if watchdog driver is initialized
+ *
+ * \param[in] dev  Watchdog to be initialized \ref arm_watchdog_dev_t
+ *
+ * \returns 1 if watchdog driver is initialized. Otherwise 0.
+ */
+uint32_t arm_watchdog_is_initialized(struct arm_watchdog_dev_t* dev);
+
+/**
+ * \brief Provides watchdog remaining time before reset.
+ *
+ * \param[in] dev  Watchdog to get the remaining time \ref arm_watchdog_dev_t
+ *
+ * \return 0 if watchdog is disabled.
+ *
+ * \note This function doesn't check if dev is NULL.
+ */
+uint32_t arm_watchdog_get_remaining_time(struct arm_watchdog_dev_t* dev);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __ARM_WATCHDOG_DRV_H__ */
+
+diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.c b/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.c
+new file mode 100644
+index 0000000000..d375af3afb
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.c
+@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#include "watchdog.h"
+
+#include "arm_watchdog_drv.h"
+#include "platform_base_address.h"
+#include "Driver_Common.h"
+#include "cmsis.h"
+#include <stdio.h>
+
+/* SoC watchdog config */
+struct arm_watchdog_dev_cfg_t SOC_WD_DEV_CFG = {CORSTONE1000_SOC_WATCHDOG_BASE};
+struct arm_watchdog_dev_data_t SOC_WD_DEV_DATA;
+struct arm_watchdog_dev_t SOC_WD_DEV = {&SOC_WD_DEV_CFG, &SOC_WD_DEV_DATA};
+#define SOC_WD_TIMEOUT 0x00030000
+
+/* SE watchdog config */
+struct arm_watchdog_dev_cfg_t SE_WD_DEV_CFG = {CORSTONE1000_WATCHDOG_TIMER_BASE};
+struct arm_watchdog_dev_data_t SE_WD_DEV_DATA;
+struct arm_watchdog_dev_t SE_WD_DEV = {&SE_WD_DEV_CFG, &SE_WD_DEV_DATA};
+#define SE_WD_TIMEOUT 0x0FFFFFFF
+#define SE_WD_IRQn SE_WATCHDOG_TIMER_IRQn
+
+
+/* SoC watchdog */
+void NMI_Handler(void)
+{
+    /* Unlock, clear and lock the watchdog timer */
+    arm_watchdog_unlock(&SOC_WD_DEV);
+    arm_watchdog_clear_interrupt_and_refresh_counter(&SOC_WD_DEV);
+    arm_watchdog_lock(&SOC_WD_DEV);
+}
+
+/* SE watchdog */
+void SE_WATCHDOG_TIMER_IRQHandler(void)
+{
+    /* Unlock, clear and lock the watchdog timer */
+    arm_watchdog_unlock(&SE_WD_DEV);
+    arm_watchdog_clear_interrupt_and_refresh_counter(&SE_WD_DEV);
+    arm_watchdog_lock(&SE_WD_DEV);
+}
+
+int corstone1000_watchdog_init()
+{
+    __disable_irq();
+
+    /* SoC Watchdog setup */
+    arm_watchdog_init(&SOC_WD_DEV, SOC_WD_TIMEOUT);
+    arm_watchdog_unlock(&SOC_WD_DEV);
+    arm_watchdog_enable(&SOC_WD_DEV);
+    arm_watchdog_lock(&SOC_WD_DEV);
+
+    if (!arm_watchdog_is_initialized(&SOC_WD_DEV))
+        return ARM_DRIVER_ERROR_UNSUPPORTED;
+
+    if (!arm_watchdog_is_enabled(&SOC_WD_DEV))
+        return ARM_DRIVER_ERROR_UNSUPPORTED;
+
+    /* SE Watchdog setup */
+    arm_watchdog_init(&SE_WD_DEV, SE_WD_TIMEOUT);
+    arm_watchdog_unlock(&SE_WD_DEV);
+    arm_watchdog_enable(&SE_WD_DEV);
+    arm_watchdog_lock(&SE_WD_DEV);
+
+    NVIC_EnableIRQ(SE_WD_IRQn);
+
+    if (!arm_watchdog_is_initialized(&SE_WD_DEV))
+        return ARM_DRIVER_ERROR_UNSUPPORTED;
+
+    if (!arm_watchdog_is_enabled(&SE_WD_DEV))
+        return ARM_DRIVER_ERROR_UNSUPPORTED;
+
+    __enable_irq();
+    
+    return ARM_DRIVER_OK;
+}
+diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.h b/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.h
+new file mode 100644
+index 0000000000..fd1b7cf124
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.h
+@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef WATCHDOG_H
+#define WATCHDOG_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "Driver_Common.h"
+#include "arm_watchdog_drv.h"
+#include "platform_base_address.h"
+
+/**
+ *  \brief Initializes Secure Enclave & SoC Watchdog.
+ *
+ *  \returns ARM Driver return code.
+ */
+int corstone1000_watchdog_init();
+
+/**
+ *  \brief Reset the Secure Enclave & SoC Watchdog's.
+ * 
+ *  \returns ARM Driver return code.
+ */
+int corstone1000_watchdog_reset_timer();
+
+#endif /* watchdog_h */
+diff --git a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+index 92a78c1168..1737fbee91 100644
+--- a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+@@ -239,6 +239,8 @@ target_sources(bl1_main
+         ../Native_Driver/firewall.c
+         ../Native_Driver/uart_pl011_drv.c
+         ../fw_update_agent/fwu_agent.c
+        ../Native_Driver/arm_watchdog_drv.c
+        ../Native_Driver/watchdog.c
+         bl1_boot_hal.c
+         bl1_flash_map.c
+         bl1_security_cnt.c
+diff --git a/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c b/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
+index 2af5b8c846..edde6fb24e 100644
+--- a/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
+++ b/platform/ext/target/arm/corstone1000/bl1/bl1_boot_hal.c
+@@ -14,6 +14,7 @@
+ #include "bootutil/fault_injection_hardening.h"
+ #include "bootutil/bootutil_log.h"
+ #include "firewall.h"
+#include "watchdog.h"
+ #include "mpu_config.h"
+ #include "tfm_plat_otp.h"
+ #include "tfm_plat_provisioning.h"
+@@ -589,6 +590,11 @@ int32_t boot_platform_init(void)
+     int32_t result;
+     uint32_t bank_offset;
+ 
+    result = corstone1000_watchdog_init();
+    if (result != ARM_DRIVER_OK) {
+        return 1;
+    }
+
+ #if !(PLATFORM_IS_FVP)
+     setup_mpu();
+ #endif
+diff --git a/platform/ext/target/arm/corstone1000/bl2_boot_hal.c b/platform/ext/target/arm/corstone1000/bl2_boot_hal.c
+index 4f5b48a2e0..5c6b78ffb3 100644
+--- a/platform/ext/target/arm/corstone1000/bl2_boot_hal.c
+++ b/platform/ext/target/arm/corstone1000/bl2_boot_hal.c
+@@ -15,6 +15,7 @@
+ #include "bootutil/bootutil_log.h"
+ #include "fip_parser.h"
+ #include "flash_map/flash_map.h"
+#include "watchdog.h"
+ #include <string.h>
+ #include "tfm_plat_otp.h"
+ #include "tfm_plat_provisioning.h"
+@@ -115,6 +116,11 @@ int32_t boot_platform_init(void)
+     enum tfm_plat_err_t plat_err;
+     uint32_t bank_offset;
+ 
+    result = corstone1000_watchdog_init();
+    if (result != ARM_DRIVER_OK) {
+        return 1;
+    }
+
+     result = fill_bl2_flash_map_by_parsing_fips(BANK_0_PARTITION_OFFSET);
+     if (result) {
+         return 1;
+diff --git a/platform/ext/target/arm/corstone1000/tfm_hal_platform.c b/platform/ext/target/arm/corstone1000/tfm_hal_platform.c
+index 0072b5b928..7faa71eb63 100644
+--- a/platform/ext/target/arm/corstone1000/tfm_hal_platform.c
+++ b/platform/ext/target/arm/corstone1000/tfm_hal_platform.c
+@@ -9,12 +9,17 @@
+ #include "tfm_hal_platform.h"
+ #include "uart_stdout.h"
+ #include "fwu_agent.h"
+#include "watchdog.h"
+ 
+ enum tfm_hal_status_t tfm_hal_platform_init(void)
+ {
+     __enable_irq();
+     stdio_init();
+ 
+    if (corstone1000_watchdog_init()) {
+        return TFM_HAL_ERROR_GENERIC;
+    }
+
+     if (fwu_metadata_init()) {
+         return TFM_HAL_ERROR_GENERIC;
+     }
+-- 
+2.17.1
+
@@ -0,0 +1,119 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From 9b2b4e284d36d0433f5aa0af6f13e7eda5c783c0 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Thu, 14 Oct 2021 05:08:04 +0100
+Subject: [PATCH 08/15] corstone1000: impelment accept image logic
+
+Until all new images in the update/trial bank is accepted,
+the firmware update state of the system remains in the trial
+state. The state changes automatically to regular state when
+all new images in the trial bank is accepted.
+
+This commit adds the logic to accept one of the image type.
+
+Change-Id: I1f18d77b185f2e5dd26d6e02bed792689019b7b8
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ .../corstone1000/fw_update_agent/fwu_agent.c  | 70 +++++++++++++++++++
+ .../services/src/tfm_platform_system.c        |  2 +-
+ 2 files changed, 71 insertions(+), 1 deletion(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+index 23a15ee71b..a70638e993 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+@@ -537,6 +537,76 @@ out:
+     return ret;
+ }
+ 
+static enum fwu_agent_error_t accept_full_capsule(
+          struct fwu_metadata* metadata,
+          struct fwu_private_metadata* priv_metadata)
+{
+    uint32_t active_index = metadata->active_index;
+    enum fwu_agent_error_t ret;
+
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    for (int i = 0; i < NR_OF_IMAGES_IN_FW_BANK; i++) {
+        metadata->img_entry[i].img_props[active_index].accepted =
+                                                            IMAGE_ACCEPTED;
+    }
+
+    priv_metadata->boot_attempted = 0;
+
+    ret = private_metadata_write(priv_metadata);
+    if (ret) {
+        return ret;
+    }
+
+    ret = metadata_write(metadata);
+    if (ret) {
+        return ret;
+    }
+
+    FWU_LOG_MSG("%s: exit: fwu state is changed to regular\n\r", __func__);
+    return FWU_AGENT_SUCCESS;
+}
+
+static enum fwu_agent_error_t fwu_accept_image(struct efi_guid* guid,
+        struct fwu_metadata *metadata,
+        struct fwu_private_metadata *priv_metadata)
+{
+    enum fwu_agent_state_t current_state;
+    int image_index;
+    uint32_t image_bank_offset;
+    enum fwu_agent_error_t ret;
+
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    /* it is expected to receive this call only when
+       in trial state */
+    current_state = get_fwu_agent_state(metadata, priv_metadata);
+    if (current_state != FWU_AGENT_STATE_TRIAL) {
+        return FWU_AGENT_ERROR;
+    }
+
+    /* booted from previous_active_bank, not expected
+     * to receive this call in this state, rather host should
+     * call corstone1000_fwu_select_previous */
+    if (metadata->active_index != priv_metadata->boot_index) {
+        return FWU_AGENT_ERROR;
+    }
+
+    image_index = get_image_info_in_bank(guid, &image_bank_offset);
+    switch(image_index) {
+        case IMAGE_ALL:
+            ret = accept_full_capsule(metadata, priv_metadata);
+            break;
+        default:
+            FWU_LOG_MSG("%s: sent image not recognized\n\r", __func__);
+            ret = FWU_AGENT_ERROR;
+            break;
+    }
+
+    FWU_LOG_MSG("%s: exit: ret = %d\n\r", __func__, ret);
+    return ret;
+}
+
+ void bl1_get_boot_bank(uint32_t *bank_offset)
+ {
+     struct fwu_private_metadata priv_metadata;
+diff --git a/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c b/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+index f9629a1688..16ad975c32 100644
+--- a/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+++ b/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+@@ -21,7 +21,7 @@ enum tfm_platform_err_t tfm_platform_hal_ioctl(tfm_platform_ioctl_req_t request,
+                                                psa_outvec *out_vec)
+ {
+     int32_t ret = TFM_PLATFORM_ERR_SUCCESS;
+-    const corstone1000_ioctl_in_params_t *in_params =
+    corstone1000_ioctl_in_params_t *in_params =
+                                     (corstone1000_ioctl_in_params_t *)in_vec->base;
+     corstone1000_ioctl_out_params_t *out_params = (corstone1000_ioctl_out_params_t *)out_vec->base;
+ 
+-- 
+2.17.1
+
@@ -0,0 +1,91 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From a565999300cf5d40c772d3ff29e2020b786a2a10 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Sat, 16 Oct 2021 09:07:17 +0100
+Subject: [PATCH 09/15] corstone1000: implement select previous bank logic
+
+When firmware update process is not successful, the commit logic
+reverts the system state to previous active bank. With this,
+the state of the system also changes from the trial to regular
+state. System gets reverted back to its previous known good state.
+
+Change-Id: I265635ea984ae9542518a0e389c98e1242e78d10
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ .../corstone1000/fw_update_agent/fwu_agent.c  | 58 +++++++++++++++++++
+ 1 file changed, 58 insertions(+)
+
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+index a70638e993..89f0a08eb5 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+@@ -607,6 +607,64 @@ static enum fwu_agent_error_t fwu_accept_image(struct efi_guid* guid,
+     return ret;
+ }
+ 
+static enum fwu_agent_error_t fwu_select_previous(
+        struct fwu_metadata *metadata,
+        struct fwu_private_metadata *priv_metadata)
+{
+    enum fwu_agent_error_t ret;
+    enum fwu_agent_state_t current_state;
+    uint32_t index;
+
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    /* it is expected to receive this call only when
+       in trial state */
+    current_state = get_fwu_agent_state(metadata, priv_metadata);
+    if (current_state != FWU_AGENT_STATE_TRIAL) {
+        return FWU_AGENT_ERROR;
+    }
+
+    /* not expected to receive this call in this state, system
+     * did not boot from previous active index */
+    if (metadata->previous_active_index != priv_metadata->boot_index) {
+        return FWU_AGENT_ERROR;
+    }
+
+    FWU_LOG_MSG("%s: trial state: active index = %u, previous active = %u\n\r",
+            __func__, metadata->active_index, metadata->previous_active_index);
+
+    index = metadata->previous_active_index;
+    for (int i = 0; i < NR_OF_IMAGES_IN_FW_BANK; i++) {
+        if (metadata->img_entry[i].img_props[index].accepted != IMAGE_ACCEPTED)
+        {
+            FWU_ASSERT(0);
+        }
+    }
+
+    index = metadata->active_index;
+    metadata->active_index = metadata->previous_active_index;
+    metadata->previous_active_index = index;
+
+    priv_metadata->boot_attempted = 0;
+
+    ret = private_metadata_write(priv_metadata);
+    if (ret) {
+        return ret;
+    }
+
+    ret = metadata_write(metadata);
+    if (ret) {
+        return ret;
+    }
+
+    FWU_LOG_MSG("%s: in regular state by choosing previous active bank\n\r",
+                 __func__);
+
+    FWU_LOG_MSG("%s: exit: ret = %d\n\r", __func__, ret);
+    return ret;
+
+}
+
+ void bl1_get_boot_bank(uint32_t *bank_offset)
+ {
+     struct fwu_private_metadata priv_metadata;
+-- 
+2.17.1
+
@@ -0,0 +1,136 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From 0a4c27173e9ac31e6bfe424b6856c4dc612e247a Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Tue, 16 Nov 2021 04:56:52 +0000
+Subject: [PATCH 10/15] corstone1000: implement corstone1000_fwu_host_ack
+
+The host uses the api 'corstone1000_fwu_host_ack' to acknowledge its
+successful boot to the secure enclave. Based on the fwu state of
+the system, the secure enalve decides where to move in the fwu state
+machine. If in regular state, there is nothing to be done. If in
+trial state and firmware update is a success, state moves to regular
+by accepting images in the trial/update bank. Finaly if in trial
+state and firmware update is a failure, state moves to regular by
+reverting to previous known state.
+
+Change-Id: I16657537909916bd19520eac3899501fdb14ecb4
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ .../corstone1000/fw_update_agent/fwu_agent.c  | 47 +++++++++++++++++++
+ .../corstone1000/fw_update_agent/fwu_agent.h  |  5 ++
+ .../services/src/tfm_platform_system.c        | 14 +++++-
+ 3 files changed, 64 insertions(+), 2 deletions(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+index 89f0a08eb5..5e87fd8d5e 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+@@ -762,3 +762,50 @@ void bl2_get_boot_bank(uint32_t *bank_offset)
+     return;
+ }
+ 
+enum fwu_agent_error_t corstone1000_fwu_host_ack(void)
+{
+    enum fwu_agent_error_t ret;
+    struct fwu_private_metadata priv_metadata;
+    enum fwu_agent_state_t current_state;
+
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    if (!is_initialized) {
+        return FWU_AGENT_ERROR;
+    }
+
+    Select_Write_Mode_For_Shared_Flash();
+
+    if (metadata_read(&_metadata)) {
+        ret = FWU_AGENT_ERROR;
+        goto out;
+    }
+
+    if (private_metadata_read(&priv_metadata)) {
+        ret = FWU_AGENT_ERROR;
+        goto out;
+    }
+
+    current_state = get_fwu_agent_state(&_metadata, &priv_metadata);
+    if (current_state == FWU_AGENT_STATE_REGULAR) {
+        ret = FWU_AGENT_SUCCESS; /* nothing to be done */
+        goto out;
+    } else if (current_state != FWU_AGENT_STATE_TRIAL) {
+        FWU_ASSERT(0);
+    }
+
+    if (_metadata.active_index != priv_metadata.boot_index) {
+        /* firmware update failed, revert back to previous bank */
+        ret = fwu_select_previous(&_metadata, &priv_metadata);
+    } else {
+        /* firmware update successful */
+        ret = fwu_accept_image(&full_capsule_image_guid, &_metadata,
+                                &priv_metadata);
+    }
+
+out:
+    Select_XIP_Mode_For_Shared_Flash();
+
+    FWU_LOG_MSG("%s: exit: ret = %d\n\r", __func__, ret);
+    return ret;
+}
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+index 389381c326..b8f7c676d7 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+@@ -38,6 +38,11 @@ enum fwu_agent_error_t fwu_metadata_init(void);
+  */
+ enum fwu_agent_error_t corstone1000_fwu_flash_image(void);
+ 
+/* host to secure enclave:
+ * host responds with this api to acknowledge its successful
+ * boot.
+ */
+enum fwu_agent_error_t corstone1000_fwu_host_ack(void);
+ 
+ void bl1_get_boot_bank(uint32_t *bank_offset);
+ void bl2_get_boot_bank(uint32_t *bank_offset);
+diff --git a/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c b/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+index 16ad975c32..068234dcda 100644
+--- a/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+++ b/platform/ext/target/arm/corstone1000/services/src/tfm_platform_system.c
+@@ -21,20 +21,30 @@ enum tfm_platform_err_t tfm_platform_hal_ioctl(tfm_platform_ioctl_req_t request,
+                                                psa_outvec *out_vec)
+ {
+     int32_t ret = TFM_PLATFORM_ERR_SUCCESS;
+
+     corstone1000_ioctl_in_params_t *in_params =
+-                                    (corstone1000_ioctl_in_params_t *)in_vec->base;
+-    corstone1000_ioctl_out_params_t *out_params = (corstone1000_ioctl_out_params_t *)out_vec->base;
+                              (corstone1000_ioctl_in_params_t *)in_vec->base;
+
+    corstone1000_ioctl_out_params_t *out_params =
+                              (corstone1000_ioctl_out_params_t *)out_vec->base;
+ 
+     switch(in_params->ioctl_id) {
+
+         case IOCTL_CORSTONE1000_FWU_FLASH_IMAGES:
+             out_params->result = corstone1000_fwu_flash_image();
+             if (!out_params->result) {
+                 NVIC_SystemReset();
+             }
+             break;
+
+        case IOCTL_CORSTONE1000_FWU_HOST_ACK:
+            out_params->result = corstone1000_fwu_host_ack();
+            break;
+
+         default:
+             ret = TFM_PLATFORM_ERR_NOT_SUPPORTED;
+             break;
+
+     }
+ 
+     return ret;
+-- 
+2.17.1
+
@@ -0,0 +1,39 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From 35ab33099d7b091630ec677cbad57abd60105f91 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Sun, 14 Nov 2021 11:49:11 +0000
+Subject: [PATCH 11/15] SPM: multiple core: initailize multi-core communication
+ before the non-secure core is out of rest
+
+Tf-m should be ready to receive the communication before non-secure
+has been taken out of rest.
+
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+Change-Id: I0b609fffbed0fc2f09b521389fd50f4e992ad00d
+---
+ secure_fw/spm/cmsis_psa/tfm_multi_core.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/secure_fw/spm/cmsis_psa/tfm_multi_core.c b/secure_fw/spm/cmsis_psa/tfm_multi_core.c
+index f830a6f5f7..946d1a60eb 100644
+--- a/secure_fw/spm/cmsis_psa/tfm_multi_core.c
+++ b/secure_fw/spm/cmsis_psa/tfm_multi_core.c
+@@ -25,11 +25,11 @@ void tfm_nspm_thread_entry(void)
+     SPMLOG_DBGMSG("Enabling non-secure core...");
+ #endif
+ 
+    tfm_inter_core_comm_init();
+
+     tfm_hal_boot_ns_cpu(tfm_spm_hal_get_ns_VTOR());
+     tfm_hal_wait_for_ns_cpu_ready();
+ 
+-    tfm_inter_core_comm_init();
+-
+     /*
+      * TODO
+      * The infinite-loop can be replaced with platform-specific low-power sleep
+-- 
+2.17.1
+
@@ -0,0 +1,169 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From 1a891fc818526bfb8b546c86a93b81353330a466 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Mon, 8 Nov 2021 18:10:44 +0000
+Subject: [PATCH 12/15] corstone1000: implement timer to track host progress
+
+When in fwu trial state, the secure enclave starts the timer to
+keep track of host progress. Secure enclave expects that the host
+acknowledges before the timer expires. If host fails to do so,
+the secure enclave resets the system.
+
+Change-Id: Ib63778b6c813f1b0d3517e0c05226d6f88927b04
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ .../corstone1000/fw_update_agent/fwu_agent.c  | 78 +++++++++++++++++++
+ .../corstone1000/fw_update_agent/fwu_agent.h  |  7 ++
+ .../arm/corstone1000/tfm_hal_multi_core.c     |  5 +-
+ 3 files changed, 89 insertions(+), 1 deletion(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+index 5e87fd8d5e..e8686704b8 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+@@ -15,6 +15,7 @@
+ #include "uefi_capsule_parser.h"
+ #include "flash_common.h"
+ #include "platform_base_address.h"
+#include "platform_description.h"
+ 
+ /* Properties of image in a bank */
+ struct fwu_image_properties {
+@@ -127,6 +128,8 @@ struct efi_guid full_capsule_image_guid = {
+ /* Import the CMSIS flash device driver */
+ extern ARM_DRIVER_FLASH FWU_METADATA_FLASH_DEV;
+ 
+#define HOST_ACK_TIMEOUT_SEC    (6 * 60) /* ~seconds, not exact */
+
+ static enum fwu_agent_error_t private_metadata_read(
+         struct fwu_private_metadata* p_metadata)
+ {
+@@ -762,6 +765,13 @@ void bl2_get_boot_bank(uint32_t *bank_offset)
+     return;
+ }
+ 
+static void disable_host_ack_timer(void)
+{
+    FWU_LOG_MSG("%s: timer to reset is disabled\n\r", __func__);
+    SysTick->CTRL &= (~SysTick_CTRL_ENABLE_Msk);
+}
+
+
+ enum fwu_agent_error_t corstone1000_fwu_host_ack(void)
+ {
+     enum fwu_agent_error_t ret;
+@@ -803,9 +813,77 @@ enum fwu_agent_error_t corstone1000_fwu_host_ack(void)
+                                 &priv_metadata);
+     }
+ 
+    if (ret == FWU_AGENT_SUCCESS) {
+        disable_host_ack_timer();
+    }
+
+ out:
+     Select_XIP_Mode_For_Shared_Flash();
+ 
+     FWU_LOG_MSG("%s: exit: ret = %d\n\r", __func__, ret);
+     return ret;
+ }
+
+static int systic_counter = 0;
+
+void SysTick_Handler(void)
+{
+    systic_counter++;
+    if ((systic_counter % 10) == 0) {
+        FWU_LOG_MSG("%s: counted = %d, expiring on = %u\n\r", __func__,
+                                systic_counter, HOST_ACK_TIMEOUT_SEC);
+    }
+    if (systic_counter == HOST_ACK_TIMEOUT_SEC) {
+        FWU_LOG_MSG("%s, timer expired, reseting the system\n\r", __func__);
+        NVIC_SystemReset();
+    }
+}
+
+/* When in trial state, start the timer for host to respond.
+ * Diable timer when host responds back either by calling
+ * corstone1000_fwu_accept_image or corstone1000_fwu_select_previous.
+ * Otherwise, resets the system.
+ */
+void host_acknowledgement_timer_to_reset(void)
+{
+    struct fwu_private_metadata priv_metadata;
+    enum fwu_agent_state_t current_state;
+    uint32_t boot_attempted;
+    uint32_t boot_index;
+
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    Select_Write_Mode_For_Shared_Flash();
+
+    if (!is_initialized) {
+        FWU_ASSERT(0);
+    }
+
+    if (private_metadata_read(&priv_metadata)) {
+        FWU_ASSERT(0);
+    }
+
+    if (metadata_read(&_metadata)) {
+        FWU_ASSERT(0);
+    }
+
+    Select_XIP_Mode_For_Shared_Flash();
+
+    current_state = get_fwu_agent_state(&_metadata, &priv_metadata);
+
+    if (current_state == FWU_AGENT_STATE_TRIAL) {
+        FWU_LOG_MSG("%s: in trial state, starting host ack timer\n\r",
+                        __func__);
+        systic_counter = 0;
+        if (SysTick_Config(SysTick_LOAD_RELOAD_Msk)) {
+            FWU_LOG_MSG("%s: timer init failed\n\r", __func__);
+            FWU_ASSERT(0);
+        } else {
+            FWU_LOG_MSG("%s: timer started: seconds to expire : %u\n\r",
+                        __func__, HOST_ACK_TIMEOUT_SEC);
+        }
+    }
+
+    FWU_LOG_MSG("%s: exit\n\r", __func__);
+    return;
+}
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+index b8f7c676d7..80f72e2bd6 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+@@ -47,4 +47,11 @@ enum fwu_agent_error_t corstone1000_fwu_host_ack(void);
+ void bl1_get_boot_bank(uint32_t *bank_offset);
+ void bl2_get_boot_bank(uint32_t *bank_offset);
+ 
+/* When in trial state, start the timer for host to respond.
+ * Diable timer when host responds back either by calling
+ * corstone1000_fwu_accept_image or corstone1000_fwu_select_previous.
+ * Otherwise, resets the system.
+ */
+void host_acknowledgement_timer_to_reset(void);
+
+ #endif /* FWU_AGENT_H */
+diff --git a/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c b/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
+index 834ebc33e3..cc94055b94 100644
+--- a/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
+++ b/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c
+@@ -56,7 +56,10 @@ void tfm_hal_boot_ns_cpu(uintptr_t start_addr)
+ 
+ void tfm_hal_wait_for_ns_cpu_ready(void)
+ {
+-    /* Synchronization between Host and SE is done by OpenAMP */
+    /* start the reset timer if firwmare update process is ongoing */
+#if !(PLATFORM_IS_FVP)
+    host_acknowledgement_timer_to_reset();
+#endif
+ }
+ 
+ void tfm_hal_get_mem_security_attr(const void *p, size_t s,
+-- 
+2.17.1
+
@@ -0,0 +1,369 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From eb02f01cd9095f11bbd737db8b1723358e463d73 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Wed, 17 Nov 2021 07:30:26 +0000
+Subject: [PATCH 13/15] corstone1000: fwu nv-counter anti-rollback support
+
+The patch implements anti-rollback protection on the nv-counters.
+The nv-counters are staged onto the flash, and only updated when
+firmware update process is successful. Before update, one more
+time verification is performed.
+
+Change-Id: Ibe9df7f65c7aecdb9d712bd76c4dbff4e8fd1023
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ .../target/arm/corstone1000/CMakeLists.txt    |   1 +
+ .../arm/corstone1000/bl1/bl1_security_cnt.c   |  20 ++-
+ .../arm/corstone1000/bl2_security_cnt.c       | 114 ++++++++++++++++++
+ .../ext/target/arm/corstone1000/config.cmake  |   2 +
+ .../corstone1000/fw_update_agent/fwu_agent.c  |  95 +++++++++++++++
+ .../corstone1000/fw_update_agent/fwu_agent.h  |  16 +++
+ 6 files changed, 245 insertions(+), 3 deletions(-)
+ create mode 100644 platform/ext/target/arm/corstone1000/bl2_security_cnt.c
+
+diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+index cb66bd48d6..7b1ee53b15 100644
+--- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
+@@ -114,6 +114,7 @@ target_sources(platform_bl2
+         fip_parser/fip_parser.c
+         bl2_boot_hal.c
+         fw_update_agent/fwu_agent.c
+        bl2_security_cnt.c
+ )
+ 
+ if (PLATFORM_IS_FVP)
+diff --git a/platform/ext/target/arm/corstone1000/bl1/bl1_security_cnt.c b/platform/ext/target/arm/corstone1000/bl1/bl1_security_cnt.c
+index f275cbfecb..e56defa09a 100644
+--- a/platform/ext/target/arm/corstone1000/bl1/bl1_security_cnt.c
+++ b/platform/ext/target/arm/corstone1000/bl1/bl1_security_cnt.c
+@@ -10,6 +10,8 @@
+ #include "tfm_plat_defs.h"
+ #include "bootutil/fault_injection_hardening.h"
+ #include <stdint.h>
+#include "tfm_plat_provisioning.h"
+#include "fwu_agent.h"
+ 
+ fih_int boot_nv_security_counter_init(void)
+ {
+@@ -47,14 +49,26 @@ int32_t boot_nv_security_counter_update(uint32_t image_id,
+                                         uint32_t img_security_cnt)
+ {
+     enum tfm_plat_err_t err;
+    enum fwu_agent_error_t fwu_err;
+ 
+     if (image_id != 0) {
+         return -1;
+     }
+ 
+-    err = tfm_plat_set_nv_counter(PLAT_NV_COUNTER_BL1_0, img_security_cnt);
+-    if (err != TFM_PLAT_ERR_SUCCESS) {
+-        return -1;
+    if (tfm_plat_provisioning_is_required()) {
+
+        err = tfm_plat_set_nv_counter(PLAT_NV_COUNTER_BL1_0, img_security_cnt);
+        if (err != TFM_PLAT_ERR_SUCCESS) {
+            return -1;
+        }
+
+    } else {
+
+        fwu_err = fwu_stage_nv_counter(FWU_BL2_NV_COUNTER, img_security_cnt);
+        if (fwu_err != FWU_AGENT_SUCCESS) {
+            return -1;
+        }
+
+     }
+ 
+     return 0;
+diff --git a/platform/ext/target/arm/corstone1000/bl2_security_cnt.c b/platform/ext/target/arm/corstone1000/bl2_security_cnt.c
+new file mode 100644
+index 0000000000..adb0c13039
+--- /dev/null
+++ b/platform/ext/target/arm/corstone1000/bl2_security_cnt.c
+@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#include "bootutil/security_cnt.h"
+#include "tfm_plat_nv_counters.h"
+#include "tfm_plat_defs.h"
+#include "bootutil/fault_injection_hardening.h"
+#include <stdint.h>
+#include "tfm_plat_provisioning.h"
+#include "fwu_agent.h"
+
+#define TFM_BOOT_NV_COUNTER_0    PLAT_NV_COUNTER_BL2_0   /* NV counter of Image 0 */
+#define TFM_BOOT_NV_COUNTER_1    PLAT_NV_COUNTER_BL2_1   /* NV counter of Image 1 */
+#define TFM_BOOT_NV_COUNTER_2    PLAT_NV_COUNTER_BL2_2   /* NV counter of Image 2 */
+#define TFM_BOOT_NV_COUNTER_MAX  PLAT_NV_COUNTER_BL2_2 + 1
+
+static enum tfm_nv_counter_t get_nv_counter_from_image_id(uint32_t image_id)
+{
+    uint32_t nv_counter;
+
+    /* Avoid integer overflow */
+    if ((UINT32_MAX - TFM_BOOT_NV_COUNTER_0) < image_id) {
+        return TFM_BOOT_NV_COUNTER_MAX;
+    }
+
+    nv_counter = TFM_BOOT_NV_COUNTER_0 + image_id;
+
+    /* Check the existence of the enumerated counter value */
+    if (nv_counter >= TFM_BOOT_NV_COUNTER_MAX) {
+        return TFM_BOOT_NV_COUNTER_MAX;
+    }
+
+    return (enum tfm_nv_counter_t)nv_counter;
+}
+
+fih_int boot_nv_security_counter_init(void)
+{
+    fih_int fih_rc = FIH_FAILURE;
+
+    fih_rc = fih_int_encode_zero_equality(tfm_plat_init_nv_counter());
+
+    FIH_RET(fih_rc);
+}
+
+fih_int boot_nv_security_counter_get(uint32_t image_id, fih_int *security_cnt)
+{
+    enum tfm_nv_counter_t nv_counter;
+    fih_int fih_rc = FIH_FAILURE;
+    uint32_t security_cnt_soft;
+
+    /* Check if it's a null-pointer. */
+    if (!security_cnt) {
+        FIH_RET(FIH_FAILURE);
+    }
+
+    nv_counter = get_nv_counter_from_image_id(image_id);
+    if (nv_counter >= TFM_BOOT_NV_COUNTER_MAX) {
+        FIH_RET(FIH_FAILURE);
+    }
+
+    fih_rc = fih_int_encode_zero_equality(
+             tfm_plat_read_nv_counter(nv_counter,
+                                      sizeof(security_cnt_soft),
+                                      (uint8_t *)&security_cnt_soft));
+    *security_cnt = fih_int_encode(security_cnt_soft);
+
+    printf("%s: security_cnt=%d\n\r", __func__, *security_cnt);
+
+    FIH_RET(fih_rc);
+}
+
+int32_t boot_nv_security_counter_update(uint32_t image_id,
+                                        uint32_t img_security_cnt)
+{
+    enum tfm_nv_counter_t nv_counter;
+    enum tfm_plat_err_t err;
+    enum fwu_agent_error_t fwu_err;
+
+    nv_counter = get_nv_counter_from_image_id(image_id);
+    if (nv_counter >= TFM_BOOT_NV_COUNTER_MAX) {
+        return -1;
+    }
+
+    printf("%s: security_cnt=%u:%u\n\r", __func__, nv_counter, img_security_cnt);
+
+    if (tfm_plat_provisioning_is_required()) {
+
+        err = tfm_plat_set_nv_counter(nv_counter, img_security_cnt);
+        if (err != TFM_PLAT_ERR_SUCCESS) {
+            return -1;
+        }
+
+    } else {
+
+        if (nv_counter == PLAT_NV_COUNTER_BL2_0) {
+            fwu_err = fwu_stage_nv_counter(FWU_TFM_NV_COUNTER, img_security_cnt);
+        } else if (nv_counter == PLAT_NV_COUNTER_BL2_1) {
+            fwu_err = fwu_stage_nv_counter(FWU_TFA_NV_COUNTER, img_security_cnt);
+        } else {
+            return -1;
+        }
+
+        if (fwu_err != FWU_AGENT_SUCCESS) {
+            return -1;
+        }
+
+    }
+
+    return 0;
+}
+diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
+index 203e6b79a6..d6f3ef7d21 100644
+--- a/platform/ext/target/arm/corstone1000/config.cmake
+++ b/platform/ext/target/arm/corstone1000/config.cmake
+@@ -39,3 +39,5 @@ if (${PLATFORM_IS_FVP})
+ else()
+     set(PLATFORM_PSA_ADAC_SECURE_DEBUG      FALSE        CACHE BOOL      "Whether to use psa-adac secure debug.")
+ endif()
+
+set(DEFAULT_MCUBOOT_SECURITY_COUNTERS   OFF          CACHE BOOL      "Whether to use the default security counter configuration defined by TF-M project")
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+index e8686704b8..cd7f901287 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+@@ -16,6 +16,8 @@
+ #include "flash_common.h"
+ #include "platform_base_address.h"
+ #include "platform_description.h"
+#include "tfm_plat_nv_counters.h"
+#include "tfm_plat_defs.h"
+ 
+ /* Properties of image in a bank */
+ struct fwu_image_properties {
+@@ -79,6 +81,9 @@ struct fwu_private_metadata {
+        /* counter: tracking number of boot attempted so far */
+        uint32_t boot_attempted;
+ 
+       /* staged nv_counter: temprary location before written to the otp */
+       uint32_t nv_counter[NR_OF_IMAGES_IN_FW_BANK];
+
+ } __packed;
+ 
+ #define MAX_BOOT_ATTEMPTS_PER_BANK 3
+@@ -771,6 +776,56 @@ static void disable_host_ack_timer(void)
+     SysTick->CTRL &= (~SysTick_CTRL_ENABLE_Msk);
+ }
+ 
+static enum fwu_agent_error_t update_nv_counters(
+                        struct fwu_private_metadata* priv_metadata)
+{
+    enum tfm_plat_err_t err;
+    uint32_t security_cnt;
+    enum tfm_nv_counter_t tfm_nv_counter_i;
+
+    FWU_LOG_MSG("%s: enter\n\r", __func__);
+
+    for (int i = 0; i <= FWU_MAX_NV_COUNTER_INDEX; i++) {
+
+        switch (i) {
+            case FWU_BL2_NV_COUNTER:
+                tfm_nv_counter_i = PLAT_NV_COUNTER_BL1_0;
+                break;
+            case FWU_TFM_NV_COUNTER:
+                tfm_nv_counter_i = PLAT_NV_COUNTER_BL2_0;
+                break;
+            case FWU_TFA_NV_COUNTER:
+                tfm_nv_counter_i = PLAT_NV_COUNTER_BL2_1;
+                break;
+            default:
+                FWU_ASSERT(0);
+                break;
+        }
+
+        err = tfm_plat_read_nv_counter(tfm_nv_counter_i,
+                        sizeof(security_cnt), (uint8_t *)&security_cnt);
+        if (err != TFM_PLAT_ERR_SUCCESS) {
+            return FWU_AGENT_ERROR;
+        }
+
+        if (priv_metadata->nv_counter[i] < security_cnt) {
+            return FWU_AGENT_ERROR;
+        } else if (priv_metadata->nv_counter[i] > security_cnt) {
+            FWU_LOG_MSG("%s: updaing index = %u nv counter = %u->%u\n\r",
+                        __func__, i, security_cnt,
+                        priv_metadata->nv_counter[FWU_BL2_NV_COUNTER]);
+            err = tfm_plat_set_nv_counter(tfm_nv_counter_i,
+                                    priv_metadata->nv_counter[FWU_BL2_NV_COUNTER]);
+            if (err != TFM_PLAT_ERR_SUCCESS) {
+                return FWU_AGENT_ERROR;
+            }
+        }
+
+    }
+
+    FWU_LOG_MSG("%s: exit\n\r", __func__);
+    return FWU_AGENT_SUCCESS;
+}
+ 
+ enum fwu_agent_error_t corstone1000_fwu_host_ack(void)
+ {
+@@ -811,6 +866,9 @@ enum fwu_agent_error_t corstone1000_fwu_host_ack(void)
+         /* firmware update successful */
+         ret = fwu_accept_image(&full_capsule_image_guid, &_metadata,
+                                 &priv_metadata);
+        if (!ret) {
+            ret = update_nv_counters(&priv_metadata);
+        }
+     }
+ 
+     if (ret == FWU_AGENT_SUCCESS) {
+@@ -887,3 +945,40 @@ void host_acknowledgement_timer_to_reset(void)
+     FWU_LOG_MSG("%s: exit\n\r", __func__);
+     return;
+ }
+
+/* stage nv counter into private metadata section of the flash.
+ * staged nv counters are written to the otp when firmware update
+ * is successful
+ * the function assumes that the api is called in the boot loading
+ * stage
+ */
+enum fwu_agent_error_t fwu_stage_nv_counter(enum fwu_nv_counter_index_t index,
+        uint32_t img_security_cnt)
+{
+    struct fwu_private_metadata priv_metadata;
+
+    FWU_LOG_MSG("%s: enter: index = %u, val = %u\n\r", __func__,
+                                index, img_security_cnt);
+
+    if (!is_initialized) {
+        FWU_ASSERT(0);
+    }
+
+    if (index > FWU_MAX_NV_COUNTER_INDEX) {
+        return FWU_AGENT_ERROR;
+    }
+
+    if (private_metadata_read(&priv_metadata)) {
+        FWU_ASSERT(0);
+    }
+
+    if (priv_metadata.nv_counter[index] != img_security_cnt) {
+        priv_metadata.nv_counter[index] = img_security_cnt;
+        if (private_metadata_write(&priv_metadata)) {
+            FWU_ASSERT(0);
+        }
+    }
+
+    FWU_LOG_MSG("%s: exit\n\r", __func__);
+    return FWU_AGENT_SUCCESS;
+}
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+index 80f72e2bd6..57b07e8d2c 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.h
+@@ -54,4 +54,20 @@ void bl2_get_boot_bank(uint32_t *bank_offset);
+  */
+ void host_acknowledgement_timer_to_reset(void);
+ 
+enum fwu_nv_counter_index_t {
+    FWU_BL2_NV_COUNTER = 0,
+    FWU_TFM_NV_COUNTER,
+    FWU_TFA_NV_COUNTER,
+    FWU_MAX_NV_COUNTER_INDEX = FWU_TFA_NV_COUNTER
+};
+
+/* stage nv counter into private metadata section of the flash.
+ * staged nv counters are written to the otp when firmware update
+ * is successful
+ * the function assumes that the api is called in the boot loading
+ * stage
+ */
+enum fwu_agent_error_t fwu_stage_nv_counter(enum fwu_nv_counter_index_t index,
+        uint32_t img_security_cnt);
+
+ #endif /* FWU_AGENT_H */
+-- 
+2.17.1
+
@@ -0,0 +1,50 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From 55d0c63bf6b097b6853e93355f5a1524df56f47b Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Mon, 1 Nov 2021 08:03:42 +0000
+Subject: [PATCH 14/15] corstone1000: bug fix in openamp version
+
+Typing mistake in openamp version parameter, leads the cmake
+to fetch the head of the master branch.
+
+Also, the previous hash used for code version is deleted from the
+openamp github. New hash from the master branch is in use.
+
+Change-Id: Iee5980ba14f8bb9b964eb10c71ebb68664c1d441
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ platform/ext/target/arm/corstone1000/config.cmake               | 2 +-
+ .../arm/corstone1000/openamp/ext/libopenamp/CMakeLists.txt      | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
+index d6f3ef7d21..2dab210e0a 100644
+--- a/platform/ext/target/arm/corstone1000/config.cmake
+++ b/platform/ext/target/arm/corstone1000/config.cmake
+@@ -32,7 +32,7 @@ set(LIBMETAL_SRC_PATH                   "DOWNLOAD"  CACHE PATH      "Path to Lib
+ set(LIBMETAL_VERSION                    "f252f0e007fbfb8b3a52b1d5901250ddac96baad"  CACHE STRING    "The version of libmetal to use")
+ 
+ set(LIBOPENAMP_SRC_PATH                 "DOWNLOAD"  CACHE PATH      "Path to Libopenamp (or DOWNLOAD to fetch automatically")
+-set(OPENAMP_VERSION                     "33037b04e0732e58fc0fa36afc244999ef632e10"  CACHE STRING    "The version of openamp to use")
+set(OPENAMP_VERSION                     "347397decaa43372fc4d00f965640ebde042966d"  CACHE STRING    "The version of openamp to use")
+ 
+ if (${PLATFORM_IS_FVP})
+     set(PLATFORM_PSA_ADAC_SECURE_DEBUG      FALSE        CACHE BOOL      "Whether to use psa-adac secure debug.")
+diff --git a/platform/ext/target/arm/corstone1000/openamp/ext/libopenamp/CMakeLists.txt b/platform/ext/target/arm/corstone1000/openamp/ext/libopenamp/CMakeLists.txt
+index d91dc7d845..9b1602a04f 100644
+--- a/platform/ext/target/arm/corstone1000/openamp/ext/libopenamp/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/openamp/ext/libopenamp/CMakeLists.txt
+@@ -16,7 +16,7 @@ endif()
+ if ("${LIBOPENAMP_SRC_PATH}" STREQUAL "DOWNLOAD")
+     FetchContent_Declare(libopenamp
+         GIT_REPOSITORY https://github.com/OpenAMP/open-amp.git
+-        GIT_TAG ${OEPNAMP_VERSION}
+        GIT_TAG ${OPENAMP_VERSION}
+     )
+ 
+     FetchContent_GetProperties(libopenamp)
+-- 
+2.17.1
+
@@ -0,0 +1,80 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From c33289422948ccb0bd6985512e5d0fc6936c0cd1 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Thu, 18 Nov 2021 12:49:10 +0000
+Subject: [PATCH 15/15] corstone1000: secure host watchdog interrupt handler
+
+With this commit, the host secure watchdog interrupt 1
+(WS1) will be handled by the secure enclave. The commit
+implements and enables the SECURE_WATCHDOG_WS1_IRQHandler
+in NVIC controller. The host can now trigger a reboot
+using the secure watchdog.
+
+Change-Id: Ied82cc04496f5daf678ad1cdc7bcf6d3a7879186
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+---
+ .../arm/corstone1000/Native_Driver/watchdog.c   | 17 +++++++++++++++++
+ .../arm/corstone1000/Native_Driver/watchdog.h   |  9 +++++++++
+ .../target/arm/corstone1000/tfm_hal_platform.c  |  2 ++
+ 3 files changed, 28 insertions(+)
+
+diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.c b/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.c
+index d375af3afb..d7faa3067d 100644
+--- a/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.c
+++ b/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.c
+@@ -79,3 +79,20 @@ int corstone1000_watchdog_init()
+     
+     return ARM_DRIVER_OK;
+ }
+
+/* Secure Host Watchdog WS1 Handler 
+ * efi_reset_system from the host triggers "Secure 
+ * watchdog WS1 interrupt" to reset the system. Host 
+ * cannot access this interrupt by design, so SE 
+ * resets the system using this handler
+ * */ 
+void SECURE_WATCHDOG_WS1_IRQHandler(void){
+    NVIC_SystemReset();
+}
+
+/*Enable Secure Watchdog WS1 Interrupt
+ * in NVIC controller (asserted by host)*/
+void corstone1000_host_watchdog_handler_init(){
+    NVIC_EnableIRQ(SECURE_WATCHDOG_WS1_IRQn);
+}
+
+diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.h b/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.h
+index fd1b7cf124..cd9bed3f63 100644
+--- a/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.h
+++ b/platform/ext/target/arm/corstone1000/Native_Driver/watchdog.h
+@@ -29,4 +29,13 @@ int corstone1000_watchdog_init();
+  */
+ int corstone1000_watchdog_reset_timer();
+ 
+/**
+ *  \brief Initializes Interrupt Handler for
+ *   Secure Host Watchdog (WS1).
+ *
+ *  \returns  VOID
+ */
+void corstone1000_host_watchdog_handler_init();
+
+
+ #endif /* watchdog_h */
+diff --git a/platform/ext/target/arm/corstone1000/tfm_hal_platform.c b/platform/ext/target/arm/corstone1000/tfm_hal_platform.c
+index 7faa71eb63..e3c6b78950 100644
+--- a/platform/ext/target/arm/corstone1000/tfm_hal_platform.c
+++ b/platform/ext/target/arm/corstone1000/tfm_hal_platform.c
+@@ -24,5 +24,7 @@ enum tfm_hal_status_t tfm_hal_platform_init(void)
+         return TFM_HAL_ERROR_GENERIC;
+     }
+ 
+    corstone1000_host_watchdog_handler_init();
+
+     return TFM_HAL_SUCCESS;
+ }
+-- 
+2.17.1
+
@@ -4,16 +4,14 @@ COMPATIBLE_MACHINE = "(corstone1000)"

 TFM_DEBUG = "1"

-PACKAGECONFIG[test-secure] = "-DTEST_S=OFF,-DTEST_S=OFF"
-PACKAGECONFIG[test-nonsecure] = "-DTEST_NS=OFF,-DTEST_NS=OFF"
-
-INSANE_SKIP:${PN} = "arch"
-
-## Default is the FVP ##
-TFM_PLATFORM_IS_FVP ?= "TRUE"
+## Default is the MPS3 board
+TFM_PLATFORM_IS_FVP ?= "FALSE"
 EXTRA_OECMAKE += "-DPLATFORM_IS_FVP=${TFM_PLATFORM_IS_FVP}"

-SRCREV_tfm = "ccd82e35f539c0d7261b2935d6d30c550cfc6736"
+SRCREV_tfm = "ca8c634a3dc15b42d41655a14e512b642320893a"
+SRCREV_mcuboot = "29099e1d17f93ae1d09fe945ad191b703aacd3d8"
+
+PV = "1.5+git${SRCREV_tfm}"

 SRCREV_FORMAT = "tfm_mcuboot_tfm-tests_mbedtls"

@@ -0,0 +1,64 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
+
+From a3b3ff8fc2d4e52748989aa61f155fc92a63261a Mon Sep 17 00:00:00 2001
+From: Rui Miguel Silva <rui.silva@linaro.org>
+Date: Tue, 22 Jun 2021 11:35:10 +0100
+Subject: [PATCH 15/16] arm: dts: add initial devicetree corstone1000 mps3
+
+Corstone1000 is a platform enabled on MPS3 FPGA Arm board. It is a cortex-a35
+with with 8MB of CVM and 32MB of QSPI, with the peripherals USB,
+ethernet and others available on the MPS3 board.
+
+Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
+---
+ arch/arm/dts/corstone1000-mps3.dts | 37 ++++++++++++++++++++++++++++++
+ 1 file changed, 37 insertions(+)
+ create mode 100644 arch/arm/dts/corstone1000-mps3.dts
+
+diff --git a/arch/arm/dts/corstone1000-mps3.dts b/arch/arm/dts/corstone1000-mps3.dts
+new file mode 100644
+index 0000000000..d93915dbb7
+--- /dev/null
+++ b/arch/arm/dts/corstone1000-mps3.dts
+@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/dts-v1/;
+
+#include "corstone1000.dtsi"
+
+/ {
+	model = "corstone1000-mps3";
+
+	ethernet: eth@4010000 {
+		compatible = "smsc,lan9220", "smsc,lan9115";
+		reg = <0x40100000 0x10000>;
+		phy-mode = "mii";
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+		reg-io-width = <2>;
+		smsc,irq-push-pull;
+	};
+
+	usb: usb@40200000 {
+		compatible = "nxp,usb-isp1763";
+		reg = <0x40200000 0x100000>;
+		interrupts-parent = <&gic>;
+		interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+		bus-width = <16>;
+		dr_mode = "host";
+	};
+
+};
+
+&refclk {
+	clock-frequency = <50000000>;
+};
+-- 
+2.33.0
+
@@ -0,0 +1,34 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
+
+From b5ec956659c3e419fd2e95431d9359db497e4afb Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Thu, 22 Jul 2021 18:11:33 +0100
+Subject: [PATCH 16/16] arm: corstone1000: adding PSCI device tree node
+
+At this level of development PSCI is needed to initialize the SMCCC.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ arch/arm/dts/corstone1000-mps3.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/dts/corstone1000-mps3.dts b/arch/arm/dts/corstone1000-mps3.dts
+index d93915dbb7..a3726f1e1f 100644
+--- a/arch/arm/dts/corstone1000-mps3.dts
+++ b/arch/arm/dts/corstone1000-mps3.dts
+@@ -30,6 +30,11 @@
+ 		dr_mode = "host";
+ 	};
+ 
+	psci {
+		compatible = "arm,psci-1.0", "arm,psci-0.2";
+		method = "smc";
+	};
+
+ };
+ 
+ &refclk {
+-- 
+2.33.0
+
@@ -0,0 +1,32 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From 3ee38ef07bd82c843497dc4e69a4d4c5f21dbbf7 Mon Sep 17 00:00:00 2001
+From: Vishnu Banavath <vishnu.banavath@arm.com>
+Date: Tue, 26 Oct 2021 18:29:05 +0100
+Subject: [PATCH] arm: corstone1000: amend kernel bootargs with ip=dhcp
+ earlyprintk
+
+This change is to
+* pass ip=dhcp required for ethernet to get and ip
+* enable earlyprintk to print kernel logs before the actual
+kernel driver comes up
+
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
+index cfe80cf5f4..7574553e83 100644
+--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
+@@ -8,7 +8,7 @@ CONFIG_IDENT_STRING=" corstone1000 aarch64 "
+ CONFIG_FIT=y
+ CONFIG_BOOTDELAY=3
+ CONFIG_USE_BOOTARGS=y
+-CONFIG_BOOTARGS="console=ttyAMA0 loglevel=9"
+CONFIG_BOOTARGS="console=ttyAMA0 loglevel=9 ip=dhcp earlyprintk"
+ # CONFIG_DISPLAY_CPUINFO is not set
+ # CONFIG_DISPLAY_BOARDINFO is not set
+ CONFIG_HUSH_PARSER=y
+-- 
+2.17.1
+
@@ -0,0 +1,344 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From d65bce43228e85319f515e47f3490801fe02498b Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Tue, 16 Nov 2021 12:36:27 +0000
+Subject: [PATCH 2/5] arm_ffa: introducing armffa command
+
+A new armffa command is provided as an example of how to use
+the FF-A helper functions to communicate with secure world.
+
+The armffa command allows to query secure partitions data from
+the secure world and exchanging messages with the partitions.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ MAINTAINERS  |   1 +
+ cmd/Kconfig  |  10 ++
+ cmd/Makefile |   2 +
+ cmd/armffa.c | 266 +++++++++++++++++++++++++++++++++++++++++++++++++++
+ 4 files changed, 279 insertions(+)
+ create mode 100644 cmd/armffa.c
+
+diff --git a/MAINTAINERS b/MAINTAINERS
+index 77b40f4689..ca4dd584e2 100644
+--- a/MAINTAINERS
+++ b/MAINTAINERS
+@@ -218,6 +218,7 @@ F:	include/configs/turris_*.h
+ ARM FF-A
+ M:	Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ S:	Maintained
+F:	cmd/armffa.c
+ F:	drivers/arm-ffa/
+ F:	include/arm_ffa.h
+ F:	include/arm_ffa_helper.h
+diff --git a/cmd/Kconfig b/cmd/Kconfig
+index 56fa0ceade..b7beedd883 100644
+--- a/cmd/Kconfig
+++ b/cmd/Kconfig
+@@ -785,6 +785,16 @@ endmenu
+ 
+ menu "Device access commands"
+ 
+config CMD_ARMFFA
+	bool "Arm FF-A test command"
+	depends on ARM_FFA_TRANSPORT
+	help
+	  Provides a test command for the Arm FF-A driver
+	  supported options:
+		- Listing the partition(s) info
+		- Sending a data pattern to the specified partition
+		- Displaying the arm_ffa device info
+
+ config CMD_ARMFLASH
+ 	#depends on FLASH_CFI_DRIVER
+ 	bool "armflash"
+diff --git a/cmd/Makefile b/cmd/Makefile
+index 9d10e07f0e..dcd25168ab 100644
+--- a/cmd/Makefile
+++ b/cmd/Makefile
+@@ -12,6 +12,8 @@ obj-y += panic.o
+ obj-y += version.o
+ 
+ # command
+
+obj-$(CONFIG_CMD_ARMFFA) += armffa.o
+ obj-$(CONFIG_CMD_ACPI) += acpi.o
+ obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o
+ obj-$(CONFIG_CMD_AES) += aes.o
+diff --git a/cmd/armffa.c b/cmd/armffa.c
+new file mode 100644
+index 0000000000..71a6ebb656
+--- /dev/null
+++ b/cmd/armffa.c
+@@ -0,0 +1,266 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021 ARM Limited
+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ */
+
+#include <arm_ffa_helper.h>
+#include <asm/io.h>
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <mapmem.h>
+#include <stdlib.h>
+
+/**
+ * do_ffa_get_singular_partition_info - implementation of the getpart subcommand
+ * @cmdtp:		Command Table
+ * @flag:		flags
+ * @argc:		number of arguments
+ * @argv:		arguments
+ *
+ * This function queries the secure partition information which the UUID is provided
+ * as an argument. The function uses the arm_ffa driver helper function
+ * to retrieve the data.
+ * The input UUID string is expected to be in big endian format.
+ *
+ * Return:
+ *
+ * CMD_RET_SUCCESS: on success, otherwise failure
+ */
+static int do_ffa_get_singular_partition_info(struct cmd_tbl *cmdtp, int flag, int argc,
+					      char *const argv[])
+{
+	struct ffa_interface_data func_data = {0};
+	u32 count = 0;
+	int ret;
+	union ffa_partition_uuid service_uuid = {0};
+	struct ffa_partition_info *parts_info;
+	u32 info_idx;
+
+	if (argc != 1)
+		return -EINVAL;
+
+	if (ffa_uuid_str_to_bin(argv[0], (unsigned char *)&service_uuid)) {
+		ffa_err("Invalid UUID");
+		return -EINVAL;
+	}
+
+	/*
+	 * get from the driver the count of the SPs matching the UUID
+	 */
+	func_data.data0_size = sizeof(service_uuid);
+	func_data.data0 = &service_uuid;
+	func_data.data1_size = sizeof(count);
+	func_data.data1 = &count;
+
+	ret = ffa_helper_get_partitions_info(&func_data);
+	if (ret != FFA_ERR_STAT_SUCCESS) {
+		ffa_err("Failure in querying partitions count (error code: %d)", ret);
+		return ret;
+	}
+
+	if (!count) {
+		ffa_info("No secure partition found");
+		return ret;
+	}
+
+	/*
+	 * pre-allocate a buffer to be filled by the driver
+	 * with	 ffa_partition_info structs
+	 */
+
+	parts_info = calloc(count, sizeof(struct ffa_partition_info));
+	if (!parts_info)
+		return -EINVAL;
+
+	ffa_info("Pre-allocating %d partition(s) info structures", count);
+
+	func_data.data1_size = count * sizeof(struct ffa_partition_info);
+	func_data.data1 = parts_info;
+
+	/*
+	 * ask the driver to fill the buffer with the SPs info
+	 */
+	ret = ffa_helper_get_partitions_info(&func_data);
+	if (ret != FFA_ERR_STAT_SUCCESS) {
+		ffa_err("Failure in querying partition(s) info (error code: %d)", ret);
+		free(parts_info);
+		return ret;
+	}
+
+	/*
+	 * SPs found , show the partition information
+	 */
+	for (info_idx = 0; info_idx < count ; info_idx++) {
+		ffa_info("Partition: id = 0x%x , exec_ctxt 0x%x , properties 0x%x",
+			 parts_info[info_idx].id,
+			 parts_info[info_idx].exec_ctxt,
+			 parts_info[info_idx].properties);
+	}
+
+	free(parts_info);
+
+	return 0;
+}
+
+/**
+ * do_ffa_msg_send_direct_req - implementation of the ping subcommand
+ * @cmdtp:		Command Table
+ * @flag:		flags
+ * @argc:		number of arguments
+ * @argv:		arguments
+ *
+ * This function sends data to the secure partition which the ID is provided
+ * as an argument. The function uses the arm_ffa driver helper function
+ * to send data.
+ *
+ * Return:
+ *
+ * CMD_RET_SUCCESS: on success, otherwise failure
+ */
+int  do_ffa_msg_send_direct_req(struct cmd_tbl *cmdtp, int flag, int argc,
+				char *const argv[])
+{
+	struct ffa_interface_data func_data = {0};
+	struct ffa_send_direct_data msg = {0};
+	u32 pattern = 0xaabbccd0;
+	u16 part_id;
+	int ret;
+
+	if (argc != 1)
+		return -EINVAL;
+
+	errno = 0;
+	part_id = strtoul(argv[0], NULL, 16);
+
+	if (errno) {
+		ffa_err("Invalid partition ID");
+		return -EINVAL;
+	}
+
+	/*
+	 * telling the driver which partition to use
+	 */
+	func_data.data0_size = sizeof(part_id);
+	func_data.data0 = &part_id;
+
+	/*
+	 * filling the message data
+	 */
+	msg.a3 = ++pattern;
+	msg.a4 = ++pattern;
+	msg.a5 = ++pattern;
+	msg.a6 = ++pattern;
+	msg.a7 = ++pattern;
+	func_data.data1_size = sizeof(msg);
+	func_data.data1 = &msg;
+
+	ret = ffa_helper_msg_send_direct_req(&func_data);
+	if (ret == FFA_ERR_STAT_SUCCESS) {
+		u8 cnt;
+
+		ffa_info("SP response:\n[LSB]");
+		for (cnt = 0;
+		     cnt < sizeof(struct ffa_send_direct_data) / sizeof(u32);
+		     cnt++)
+			ffa_info("0x%x", ((u32 *)&msg)[cnt]);
+	} else {
+		ffa_err("Sending direct request error (%d)", ret);
+	}
+
+	return ret;
+}
+
+/**
+ *do_ffa_dev_list - implementation of the devlist subcommand
+ * @cmdtp: [in]		Command Table
+ * @flag:		flags
+ * @argc:		number of arguments
+ * @argv:		arguments
+ *
+ * This function queries the devices belonging to the UCLASS_FFA
+ * class. Currently, one device is expected to show up: the arm_ffa device
+ *
+ * Return:
+ *
+ * CMD_RET_SUCCESS: on success, otherwise failure
+ */
+int do_ffa_dev_list(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+{
+	struct udevice *dev = NULL;
+	int i, ret;
+
+	ffa_info("arm_ffa uclass entries:");
+
+	for (i = 0, ret = uclass_first_device(UCLASS_FFA, &dev);
+	     dev;
+	     ret = uclass_next_device(&dev), i++) {
+		if (ret)
+			break;
+
+		ffa_info("entry %d - instance %08x, ops %08x, plat %08x",
+			 i,
+			 (u32)map_to_sysmem(dev),
+			 (u32)map_to_sysmem(dev->driver->ops),
+			 (u32)map_to_sysmem(dev_get_plat(dev)));
+	}
+
+	return cmd_process_error(cmdtp, ret);
+}
+
+static struct cmd_tbl armffa_commands[] = {
+	U_BOOT_CMD_MKENT(getpart, 1, 1, do_ffa_get_singular_partition_info, "", ""),
+	U_BOOT_CMD_MKENT(ping, 1, 1, do_ffa_msg_send_direct_req, "", ""),
+	U_BOOT_CMD_MKENT(devlist, 0, 1, do_ffa_dev_list, "", ""),
+};
+
+/**
+ * do_armffa - the armffa command main function
+ * @cmdtp:	Command Table
+ * @flag:		flags
+ * @argc:		number of arguments
+ * @argv:		arguments
+ *
+ * This function identifies which armffa subcommand to run.
+ * Then, it makes sure the arm_ffa device is probed and
+ * ready for use.
+ * Then, it runs the subcommand.
+ *
+ * Return:
+ *
+ * CMD_RET_SUCCESS: on success, otherwise failure
+ */
+static int do_armffa(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+{
+	struct cmd_tbl *armffa_cmd;
+	int ret;
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+
+	armffa_cmd = find_cmd_tbl(argv[1], armffa_commands, ARRAY_SIZE(armffa_commands));
+
+	argc -= 2;
+	argv += 2;
+
+	if (!armffa_cmd || argc > armffa_cmd->maxargs)
+		return CMD_RET_USAGE;
+
+	ret = ffa_helper_init_device();
+	if (ret != FFA_ERR_STAT_SUCCESS)
+		return cmd_process_error(cmdtp, ret);
+
+	ret = armffa_cmd->cmd(armffa_cmd, flag, argc, argv);
+
+	return cmd_process_error(armffa_cmd, ret);
+}
+
+U_BOOT_CMD(armffa, 4, 1, do_armffa,
+	   "Arm FF-A operations test command",
+	   "getpart <partition UUID>\n"
+	   "	 - lists the partition(s) info\n"
+	   "ping <partition ID>\n"
+	   "	 - sends a data pattern to the specified partition\n"
+	   "devlist\n"
+	   "	 - displays the arm_ffa device info\n");
+-- 
+2.17.1
+
@@ -0,0 +1,134 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From b77c6c2c8c0dff9a41e1dbb9a4e9c1ecac00c7f6 Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Tue, 16 Nov 2021 12:38:48 +0000
+Subject: [PATCH 3/5] arm_ffa: introducing test module for UCLASS_FFA
+
+This is the test module for the UCLASS_FFA class.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ MAINTAINERS      |  1 +
+ test/dm/Makefile |  1 +
+ test/dm/ffa.c    | 56 ++++++++++++++++++++++++++++++++++++++++++++++++
+ test/dm/ffa.h    | 19 ++++++++++++++++
+ 4 files changed, 77 insertions(+)
+ create mode 100644 test/dm/ffa.c
+ create mode 100644 test/dm/ffa.h
+
+diff --git a/MAINTAINERS b/MAINTAINERS
+index ca4dd584e2..e73637e127 100644
+--- a/MAINTAINERS
+++ b/MAINTAINERS
+@@ -223,6 +223,7 @@ F:	drivers/arm-ffa/
+ F:	include/arm_ffa.h
+ F:	include/arm_ffa_helper.h
+ F:	lib/arm-ffa/
+F:	test/dm/ffa.c
+ 
+ ARM FREESCALE IMX
+ M:	Stefano Babic <sbabic@denx.de>
+diff --git a/test/dm/Makefile b/test/dm/Makefile
+index c9644617a1..c48f034584 100644
+--- a/test/dm/Makefile
+++ b/test/dm/Makefile
+@@ -74,6 +74,7 @@ obj-$(CONFIG_POWER_DOMAIN) += power-domain.o
+ obj-$(CONFIG_ACPI_PMC) += pmc.o
+ obj-$(CONFIG_DM_PMIC) += pmic.o
+ obj-$(CONFIG_DM_PWM) += pwm.o
+obj-$(CONFIG_ARM_FFA_TRANSPORT) += ffa.o
+ obj-$(CONFIG_QFW) += qfw.o
+ obj-$(CONFIG_RAM) += ram.o
+ obj-y += regmap.o
+diff --git a/test/dm/ffa.c b/test/dm/ffa.c
+new file mode 100644
+index 0000000000..b937cea57b
+--- /dev/null
+++ b/test/dm/ffa.c
+@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test for UCLASS_FFA  class
+ *
+ * (C) Copyright 2021 ARM Limited
+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/test.h>
+#include <test/test.h>
+#include <test/ut.h>
+#include <arm_ffa_helper.h>
+#include "ffa.h"
+
+/* Basic test of 'armffa' command */
+static int dm_test_armffa_cmd(struct unit_test_state *uts)
+{
+	ut_assertok(ffa_helper_init_device());
+
+	ut_assertok(console_record_reset_enable());
+
+	/* armffa getpart <UUID> */
+	ut_assertok(run_command("armffa getpart " SE_PROXY_PARTITION_UUID, 0));
+	ut_assert_console_end();
+
+	/* armffa ping <ID> */
+	ut_assertok(run_command("armffa ping " SE_PROXY_PARTITION_ID, 0));
+	ut_assert_console_end();
+
+	/* armffa devlist */
+	ut_assertok(run_command("armffa devlist", 0));
+	ut_assert_console_end();
+
+	return 0;
+}
+
+DM_TEST(dm_test_armffa_cmd, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+
+static int  test_ffa_msg_send_direct_req(void)
+{
+	char *const argv[1] = {SE_PROXY_PARTITION_ID}; /* Corstone1000 SE Proxy ID */
+
+	return do_ffa_msg_send_direct_req(NULL, 0, 1, argv);
+}
+
+/* Basic test of the FFA uclass */
+static int dm_test_ffa_uclass(struct unit_test_state *uts)
+{
+	ut_assertok(ffa_init_device());
+	ut_assertok(test_ffa_msg_send_direct_req());
+	return 0;
+}
+
+DM_TEST(dm_test_ffa_uclass, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+diff --git a/test/dm/ffa.h b/test/dm/ffa.h
+new file mode 100644
+index 0000000000..a0802bd692
+--- /dev/null
+++ b/test/dm/ffa.h
+@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2021 ARM Limited
+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ */
+
+#ifndef __TEST_DM_FFA_H
+#define __TEST_DM_FFA_H
+
+#define SE_PROXY_PARTITION_ID "0x8002"
+#define SE_PROXY_PARTITION_UUID "46bb39d1-b4d9-45b5-88ff-040027dab249"
+
+/**
+ * do_ffa_msg_send_direct_req - implementation of the ping subcommand
+ */
+int  do_ffa_msg_send_direct_req(struct cmd_tbl *cmdtp, int flag, int argc,
+				char *const argv[]);
+
+#endif /*__TEST_DM_FFA_H */
+-- 
+2.17.1
+
@@ -0,0 +1,383 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From f84b0592d5456aee690164d195f3bfe592086a06 Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Wed, 13 Oct 2021 17:51:44 +0100
+Subject: [PATCH 4/5] arm_ffa: introducing MM communication with FF-A
+
+This commit allows to perform MM communication using FF-A transport.
+
+The MM SP (also called partition) can be StandAlonneMM or smm-gateway.
+Both partitions run in OP-TEE.
+
+When using the u-boot FF-A driver, StandAlonneMM and smm-gateway are
+supported.
+
+On EFI services such as GetVariable()/SetVariable(), the data
+is copied from the communication buffer to the MM shared buffer.
+
+Then, notifies the MM SP about data availability in the MM shared buffer.
+Communication with the MM SP is performed using FF-A transport.
+
+On such event, MM SP can read the data and updates the MM shared buffer
+with response data.
+
+The response data is copied back to the communication buffer.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ lib/efi_loader/Kconfig            |  14 +-
+ lib/efi_loader/efi_variable_tee.c | 255 +++++++++++++++++++++++++++++-
+ 2 files changed, 263 insertions(+), 6 deletions(-)
+
+diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
+index 156b391521..120b656504 100644
+--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
+@@ -53,13 +53,23 @@ config EFI_VARIABLE_FILE_STORE
+ 	  stored as file /ubootefi.var on the EFI system partition.
+ 
+ config EFI_MM_COMM_TEE
+-	bool "UEFI variables storage service via OP-TEE"
+-	depends on OPTEE
+	bool "UEFI variables storage service via the trusted world"
+	depends on OPTEE || ARM_FFA_TRANSPORT
+ 	help
+	  The MM SP (also called partition) can be StandAlonneMM or smm-gateway.
+	  When using the u-boot OP-TEE driver, StandAlonneMM is supported.
+	  When using the u-boot FF-A  driver, StandAlonneMM and smm-gateway are supported.
+
+ 	  If OP-TEE is present and running StandAloneMM, dispatch all UEFI
+ 	  variable related operations to that. The application will verify,
+ 	  authenticate and store the variables on an RPMB.
+ 
+	  When ARM_FFA_TRANSPORT is used, dispatch all UEFI variable related
+	  operations to the MM SP running under Optee in the trusted world.
+	  A door bell mechanism is used to notify the SP when there is data in the shared
+	  MM buffer. The data is copied by u-boot to thea shared buffer before issuing
+	  the door bell event.
+
+ endchoice
+ 
+ config EFI_VARIABLES_PRESEED
+diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c
+index 51920bcb51..b363ec92bf 100644
+--- a/lib/efi_loader/efi_variable_tee.c
+++ b/lib/efi_loader/efi_variable_tee.c
+@@ -15,7 +15,28 @@
+ #include <malloc.h>
+ #include <mm_communication.h>
+ 
+#if (IS_ENABLED(CONFIG_OPTEE))
+ #define OPTEE_PAGE_SIZE BIT(12)
+#endif
+
+#if (IS_ENABLED(CONFIG_ARM_FFA_TRANSPORT))
+
+#include <arm_ffa_helper.h>
+#include <mapmem.h>
+
+/* MM return codes */
+#define MM_SUCCESS (0)
+
+#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 (0xC4000061)
+#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64
+
+/* MM_SP_UUID_DATA defined by the platform */
+union ffa_partition_uuid mm_sp_svc_uuid = {.bytes = {MM_SP_UUID_DATA}};
+
+static u16 __efi_runtime_data mm_sp_id;
+
+#endif
+
+ extern struct efi_var_file __efi_runtime_data *efi_var_buf;
+ static efi_uintn_t max_buffer_size;	/* comm + var + func + data */
+ static efi_uintn_t max_payload_size;	/* func + data */
+@@ -25,6 +46,7 @@ struct mm_connection {
+ 	u32 session;
+ };
+ 
+#if (IS_ENABLED(CONFIG_OPTEE))
+ /**
+  * get_connection() - Retrieve OP-TEE session for a specific UUID.
+  *
+@@ -140,16 +162,229 @@ static efi_status_t optee_mm_communicate(void *comm_buf, ulong dsize)
+ 
+ 	return ret;
+ }
+#endif
+
+#if (IS_ENABLED(CONFIG_ARM_FFA_TRANSPORT))
+
+/**
+ * ffa_notify_mm_sp() - Announce there is data in the shared buffer
+ *
+ * Notifies the MM partition in the trusted world that
+ * data is available in the shared buffer.
+ * This is a blocking call during which trusted world has exclusive access
+ * to the MM shared buffer.
+ *
+ * Return:
+ *
+ * 0 on success
+ */
+static int __efi_runtime ffa_notify_mm_sp(void)
+{
+	struct ffa_interface_data func_data = {0};
+	struct ffa_send_direct_data msg = {0};
+	int ret;
+	u32 sp_event_complete;
+	int sp_event_ret;
+
+	func_data.data0_size = sizeof(mm_sp_id);
+	func_data.data0 = &mm_sp_id;
+
+	msg.a3 = FFA_SHARED_MM_BUFFER_ADDR;
+	msg.a4 = FFA_SHARED_MM_BUFFER_SIZE;
+	func_data.data1_size = sizeof(msg);
+	func_data.data1 = &msg;
+
+	ret = ffa_helper_msg_send_direct_req(&func_data);
+	if (ret != FFA_ERR_STAT_SUCCESS) {
+		log_err("EFI: Failure to notify the MM SP , FF-A  error (%d)\n", ret);
+		return ret;
+	}
+
+	sp_event_complete = msg.a3;
+	sp_event_ret = (int)msg.a4;
+
+	if (sp_event_complete == ARM_SVC_ID_SP_EVENT_COMPLETE && sp_event_ret == MM_SUCCESS)
+		return 0;
+
+	log_err("EFI: Failure to notify the MM SP (0x%x , %d)\n",
+		sp_event_complete,
+		sp_event_ret);
+
+	return -EACCES;
+}
+
+/**
+ * ffa_discover_mm_sp_id() - Query the MM partition ID
+ *
+ * Use the FF-A driver to get the MM partition ID.
+ * If multiple partitions are found, use the first one
+ *
+ * Return:
+ *
+ * 0 on success
+ */
+static int __efi_runtime ffa_discover_mm_sp_id(void)
+{
+	struct ffa_interface_data func_data = {0};
+	u32 count = 0;
+	int ret;
+	struct ffa_partition_info *parts_info;
+
+	/*
+	 * get from the driver the count of the SPs matching the UUID
+	 */
+	func_data.data0_size = sizeof(mm_sp_svc_uuid);
+	func_data.data0 = &mm_sp_svc_uuid;
+	func_data.data1_size = sizeof(count);
+	func_data.data1 = &count;
+
+	ret = ffa_helper_get_partitions_info(&func_data);
+	if (ret != FFA_ERR_STAT_SUCCESS) {
+		log_err("EFI: Failure in querying partitions count (error code: %d)\n", ret);
+		return ret;
+	}
+
+	if (!count) {
+		log_info("EFI: No MM partition found\n");
+		return ret;
+	}
+
+	/*
+	 * pre-allocate a buffer to be filled by the driver
+	 * with	 ffa_partition_info structs
+	 */
+
+	parts_info = calloc(count, sizeof(struct ffa_partition_info));
+	if (!parts_info)
+		return -EINVAL;
+
+	log_info("EFI: Pre-allocating %d partition(s) info structures\n", count);
+
+	func_data.data1_size = count *
+		sizeof(struct ffa_partition_info);
+	func_data.data1 = parts_info;
+
+	/*
+	 * ask the driver to fill the
+	 * buffer with the SPs info
+	 */
+	ret = ffa_helper_get_partitions_info(&func_data);
+	if (ret != FFA_ERR_STAT_SUCCESS) {
+		log_err("EFI: Failure in querying partition(s) info (error code: %d)\n", ret);
+		free(parts_info);
+		return ret;
+	}
+
+	/*
+	 * MM SPs found , use the first one
+	 */
+
+	mm_sp_id = parts_info[0].id;
+
+	log_info("EFI: MM partition ID 0x%x\n", mm_sp_id);
+
+	free(parts_info);
+
+	return 0;
+}
+
+/**
+ * ffa_mm_communicate() - Exchange EFI services data with  the MM partition using FF-A
+ * @comm_buf:		locally allocated communication buffer used for for rx/tx
+ * @dsize:				communication buffer size
+ *
+ * Issues a door bell event to notify the MM partition (SP) running in OP-TEE
+ * that there is data to read from the shared buffer.
+ * Communication with the MM SP is performed using FF-A transport.
+ * On the event, MM SP can read the data from the buffer and
+ * update the MM shared buffer with response data.
+ * The response data is copied back to the communication buffer.
+ *
+ * Return:
+ *
+ * EFI status code
+ */
+static efi_status_t __efi_runtime ffa_mm_communicate(void *comm_buf, ulong comm_buf_size)
+{
+	ulong tx_data_size;
+	int ffa_ret;
+	struct efi_mm_communicate_header *mm_hdr;
+	void *virt_shared_buf;
+
+	if (!comm_buf)
+		return EFI_INVALID_PARAMETER;
+
+	/* Discover MM partition ID */
+	if (!mm_sp_id && ffa_discover_mm_sp_id()  != FFA_ERR_STAT_SUCCESS) {
+		log_err("EFI: Failure to discover MM partition ID\n");
+		return EFI_UNSUPPORTED;
+	}
+
+	mm_hdr = (struct efi_mm_communicate_header *)comm_buf;
+	tx_data_size = mm_hdr->message_len + sizeof(efi_guid_t) + sizeof(size_t);
+
+	if (comm_buf_size != tx_data_size || tx_data_size > FFA_SHARED_MM_BUFFER_SIZE)
+		return EFI_INVALID_PARAMETER;
+
+	/* Copy the data to the shared buffer */
+
+	virt_shared_buf = (void *)map_sysmem((phys_addr_t)FFA_SHARED_MM_BUFFER_ADDR, 0);
+	efi_memcpy_runtime(virt_shared_buf, comm_buf, tx_data_size);
+
+	/* Announce there is data in the shared buffer */
+
+	ffa_ret = ffa_notify_mm_sp();
+	if (ffa_ret)
+		unmap_sysmem(virt_shared_buf);
+
+	switch (ffa_ret) {
+	case 0:
+	{
+		ulong rx_data_size;
+		/* Copy the MM SP response from the shared buffer to the communication buffer */
+		rx_data_size = ((struct efi_mm_communicate_header *)virt_shared_buf)->message_len +
+			sizeof(efi_guid_t) +
+			sizeof(size_t);
+
+		if (rx_data_size > comm_buf_size) {
+			unmap_sysmem(virt_shared_buf);
+			return EFI_OUT_OF_RESOURCES;
+		}
+
+		efi_memcpy_runtime(comm_buf, virt_shared_buf, rx_data_size);
+		unmap_sysmem(virt_shared_buf);
+
+		return EFI_SUCCESS;
+	}
+	case -EINVAL:
+		return EFI_DEVICE_ERROR;
+	case -EPERM:
+		return EFI_INVALID_PARAMETER;
+	case -EACCES:
+		return EFI_ACCESS_DENIED;
+	case -EBUSY:
+		return EFI_OUT_OF_RESOURCES;
+	default:
+		return EFI_ACCESS_DENIED;
+	}
+}
+#endif
+ 
+ /**
+- * mm_communicate() - Adjust the cmonnucation buffer to StandAlonneMM and send
+ * mm_communicate() - Adjust the communication buffer to the MM SP and send
+  * it to OP-TEE
+  *
+- * @comm_buf:		locally allocted communcation buffer
+ * @comm_buf:		locally allocted communication buffer
+  * @dsize:		buffer size
+ *
+ * The MM SP (also called partition) can be StandAlonneMM or smm-gateway.
+ * The comm_buf format is the same for both partitions.
+ * When using the u-boot OP-TEE driver, StandAlonneMM is supported.
+ * When using the u-boot FF-A  driver, StandAlonneMM and smm-gateway are supported.
+ *
+  * Return:		status code
+  */
+-static efi_status_t mm_communicate(u8 *comm_buf, efi_uintn_t dsize)
+static efi_status_t __efi_runtime mm_communicate(u8 *comm_buf, efi_uintn_t dsize)
+ {
+ 	efi_status_t ret;
+ 	struct efi_mm_communicate_header *mm_hdr;
+@@ -159,7 +394,11 @@ static efi_status_t mm_communicate(u8 *comm_buf, efi_uintn_t dsize)
+ 	mm_hdr = (struct efi_mm_communicate_header *)comm_buf;
+ 	var_hdr = (struct smm_variable_communicate_header *)mm_hdr->data;
+ 
+	#if (IS_ENABLED(CONFIG_OPTEE))
+ 	ret = optee_mm_communicate(comm_buf, dsize);
+	#elif (IS_ENABLED(CONFIG_ARM_FFA_TRANSPORT))
+	ret = ffa_mm_communicate(comm_buf, dsize);
+	#endif
+ 	if (ret != EFI_SUCCESS) {
+ 		log_err("%s failed!\n", __func__);
+ 		return ret;
+@@ -255,6 +494,8 @@ efi_status_t EFIAPI get_max_payload(efi_uintn_t *size)
+ 		goto out;
+ 	}
+ 	*size = var_payload->size;
+
+	#if (IS_ENABLED(CONFIG_OPTEE))
+ 	/*
+ 	 * Although the max payload is configurable on StMM, we only share a
+ 	 * single page from OP-TEE for the non-secure buffer used to communicate
+@@ -264,6 +505,12 @@ efi_status_t EFIAPI get_max_payload(efi_uintn_t *size)
+ 	if (*size > OPTEE_PAGE_SIZE)
+ 		*size = OPTEE_PAGE_SIZE - MM_COMMUNICATE_HEADER_SIZE  -
+ 			MM_VARIABLE_COMMUNICATE_SIZE;
+	#elif (IS_ENABLED(CONFIG_ARM_FFA_TRANSPORT))
+		if (*size > FFA_SHARED_MM_BUFFER_SIZE)
+			*size = FFA_SHARED_MM_BUFFER_SIZE - MM_COMMUNICATE_HEADER_SIZE  -
+				MM_VARIABLE_COMMUNICATE_SIZE;
+	#endif
+
+ 	/*
+ 	 * There seems to be a bug in EDK2 miscalculating the boundaries and
+ 	 * size checks, so deduct 2 more bytes to fulfill this requirement. Fix
+@@ -690,7 +937,7 @@ void efi_variables_boot_exit_notify(void)
+ 		ret = EFI_NOT_FOUND;
+ 
+ 	if (ret != EFI_SUCCESS)
+-		log_err("Unable to notify StMM for ExitBootServices\n");
+		log_err("Unable to notify the MM partition for ExitBootServices\n");
+ 	free(comm_buf);
+ 
+ 	/*
+-- 
+2.17.1
+
@@ -0,0 +1,112 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From a0841a2072215b1912d95224de204c7a013650f0 Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Tue, 2 Nov 2021 16:44:39 +0000
+Subject: [PATCH 5/5] arm_ffa: corstone1000: enable FF-A and MM support
+
+This commit allows corstone1000 platform to perform
+MM communication between u-boot and the secure world
+using FF-A transport.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ arch/arm/dts/corstone1000-fvp.dts  |  4 ++++
+ arch/arm/dts/corstone1000-mps3.dts |  4 ++++
+ arch/arm/dts/corstone1000.dtsi     |  7 +++++++
+ configs/corstone1000_defconfig     |  5 +++++
+ include/configs/corstone1000.h     | 14 ++++++++++++++
+ 5 files changed, 34 insertions(+)
+
+diff --git a/arch/arm/dts/corstone1000-fvp.dts b/arch/arm/dts/corstone1000-fvp.dts
+index 2188ca5e0e..92da15df4e 100644
+--- a/arch/arm/dts/corstone1000-fvp.dts
+++ b/arch/arm/dts/corstone1000-fvp.dts
+@@ -26,3 +26,7 @@
+ &refclk {
+        clock-frequency = <50000000>;
+ };
+
+&arm_ffa {
+	status = "okay";
+};
+diff --git a/arch/arm/dts/corstone1000-mps3.dts b/arch/arm/dts/corstone1000-mps3.dts
+index a3726f1e1f..6842395405 100644
+--- a/arch/arm/dts/corstone1000-mps3.dts
+++ b/arch/arm/dts/corstone1000-mps3.dts
+@@ -40,3 +40,7 @@
+ &refclk {
+ 	clock-frequency = <50000000>;
+ };
+
+&arm_ffa {
+	status = "okay";
+};
+diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
+index da1725e01f..97dfac9ae7 100644
+--- a/arch/arm/dts/corstone1000.dtsi
+++ b/arch/arm/dts/corstone1000.dtsi
+@@ -153,4 +153,11 @@
+ 		compatible = "arm,psci-1.0", "arm,psci-0.2";
+ 		method = "smc";
+ 	};
+
+	arm_ffa: arm_ffa {
+		compatible = "arm,ffa";
+		method = "smc";
+		status = "disabled";
+	};
+
+ };
+diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
+index 7574553e83..abd52af8fc 100644
+--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
+@@ -9,6 +9,7 @@ CONFIG_FIT=y
+ CONFIG_BOOTDELAY=3
+ CONFIG_USE_BOOTARGS=y
+ CONFIG_BOOTARGS="console=ttyAMA0 loglevel=9 ip=dhcp earlyprintk"
+CONFIG_LOGLEVEL=7
+ # CONFIG_DISPLAY_CPUINFO is not set
+ # CONFIG_DISPLAY_BOARDINFO is not set
+ CONFIG_HUSH_PARSER=y
+@@ -45,6 +46,10 @@ CONFIG_USB=y
+ CONFIG_DM_USB=y
+ CONFIG_USB_ISP1760=y
+ CONFIG_USB_STORAGE=y
+CONFIG_ARM_FFA_TRANSPORT=y
+CONFIG_EFI_MM_COMM_TEE=y
+# CONFIG_OPTEE is not set
+# CONFIG_GENERATE_SMBIOS_TABLE is not set
+ # CONFIG_HEXDUMP is not set
+ CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
+ CONFIG_EFI_CAPSULE_ON_DISK=y
+diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
+index 5e22e075ad..7b644fb52b 100644
+--- a/include/configs/corstone1000.h
+++ b/include/configs/corstone1000.h
+@@ -12,6 +12,20 @@
+ #ifndef __CORSTONE1000_H
+ #define __CORSTONE1000_H
+ 
+#include <linux/sizes.h>
+
+/* MM SP UUID binary data (little-endian format) */
+#define MM_SP_UUID_DATA	\
+	0xed, 0x32, 0xd5, 0x33,	\
+	0x99, 0xe6, 0x42, 0x09,	\
+	0x9c, 0xc0, 0x2d, 0x72,	\
+	0xcd, 0xd9, 0x98, 0xa7
+
+#define FFA_SHARED_MM_BUFFER_SIZE		SZ_4K /* 4 KB */
+
+/* shared buffer physical address used for communication between u-boot and the MM SP */
+#define FFA_SHARED_MM_BUFFER_ADDR		(0x023F8000)
+
+ #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x03f00000)
+ #define CONFIG_SKIP_LOWLEVEL_INIT
+ 
+-- 
+2.17.1
+
@@ -0,0 +1,419 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From 666463acdd3dbf090952b8bc8b0f2508137804a4 Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Thu, 11 Nov 2021 16:27:59 +0000
+Subject: [PATCH] efi: corstone1000: introduce EFI capsule update
+
+This commit provides capsule update feature for Corstone1000.
+
+This feature is available before and after ExitBootServices().
+
+A platform specific capsule buffer is allocated. This buffer
+is physically contiguous and allocated at the start of the DDR
+memory after u-boot relocation to the end of DDR.
+
+The capsule buffer is shared between u-boot and the secure world.
+On UpdateCapsule() , capsule data is copied to the buffer
+and a buffer ready event is generated using FF-A transport.
+
+On ExitBootServices() a kernel started event is sent to the
+SE Proxy FW update service. This event is generated on each boot.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ arch/arm/dts/corstone1000.dtsi |   4 +-
+ configs/corstone1000_defconfig |   3 +-
+ include/configs/corstone1000.h |  30 +++++---
+ include/efi_loader.h           |   4 +-
+ lib/efi_loader/efi_boottime.c  |  47 +++++++++++
+ lib/efi_loader/efi_capsule.c   | 137 ++++++++++++++++++++++++++++++++-
+ lib/efi_loader/efi_setup.c     |  15 ++++
+ 7 files changed, 224 insertions(+), 16 deletions(-)
+
+diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
+index 97dfac9ae7..0ea3a19698 100644
+--- a/arch/arm/dts/corstone1000.dtsi
+++ b/arch/arm/dts/corstone1000.dtsi
+@@ -26,9 +26,9 @@
+ 		};
+ 	};
+ 
+-	memory@80000000 {
+	memory@88200000 {
+ 		device_type = "memory";
+-		reg = <0x80000000 0x80000000>;
+		reg = <0x88200000 0x77e00000>;
+ 	};
+ 
+ 	gic: interrupt-controller@1c000000 {
+diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
+index 48ec37f641..c5eb9af101 100644
+--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
+@@ -53,7 +53,8 @@ CONFIG_EFI_MM_COMM_TEE=y
+ CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
+ CONFIG_EFI_CAPSULE_ON_DISK=y
+ CONFIG_EFI_CAPSULE_ON_DISK_EARLY=y
+-CONFIG_EFI_CAPSULE_AUTHENTICATE=y
+# CONFIG_EFI_CAPSULE_AUTHENTICATE is not set
+CONFIG_EFI_HAVE_CAPSULE_SUPPORT=y
+ CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y
+ CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
+ CONFIG_EFI_SECURE_BOOT=y
+diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
+index 7b644fb52b..ce50bd5cc9 100644
+--- a/include/configs/corstone1000.h
+++ b/include/configs/corstone1000.h
+@@ -14,6 +14,24 @@
+ 
+ #include <linux/sizes.h>
+ 
+/* The SE Proxy partition ID*/
+#define CORSTONE1000_SEPROXY_PART_ID		(0x8002)
+
+/* Update service ID provided by  the SE Proxy secure partition*/
+#define CORSTONE1000_SEPROXY_UPDATE_SVC_ID	(0x4)
+
+/* Notification events used with SE Proxy update service */
+#define CORSTONE1000_BUFFER_READY_EVT	(0x1)
+#define CORSTONE1000_KERNEL_STARTED_EVT	(0x2)
+
+/* Size in 4KB pages of the EFI capsule buffer */
+#define CORSTONE1000_CAPSULE_BUFFER_SIZE		(8192) /* 32 MB */
+
+/* Capsule GUID */
+#define EFI_CORSTONE1000_CAPSULE_ID_GUID \
+	EFI_GUID(0x3a770ddc, 0x409b, 0x48b2, 0x81, 0x41, \
+		 0x93, 0xb7, 0xc6, 0x0b, 0x20, 0x9e)
+
+ /* MM SP UUID binary data (little-endian format) */
+ #define MM_SP_UUID_DATA	\
+ 	0xed, 0x32, 0xd5, 0x33,	\
+@@ -57,20 +75,14 @@
+ 
+ /* Physical Memory Map */
+ #define PHYS_SDRAM_1		(V2M_BASE)
+-#define PHYS_SDRAM_2		(V2M_QSPI)
+-
+-/* Top 16MB reserved for secure world use (maybe not needed) */
+-#define DRAM_SEC_SIZE		0x01000000
+-#define PHYS_SDRAM_1_SIZE	0x80000000 - DRAM_SEC_SIZE
+#define PHYS_SDRAM_1_SIZE	0x80000000
+ 
+-#define PHYS_SDRAM_2_SIZE	0x02000000
+/* Default load address for the source command */
+#define CONFIG_SYS_LOAD_ADDR   (V2M_BASE + 0x10000000)
+ 
+ /* Size of malloc() pool */
+ #define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + (8 << 20))
+ 
+-/* Miscellaneous configurable options */
+-#define CONFIG_SYS_LOAD_ADDR	(V2M_BASE + 0x10000000)
+-
+ #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
+ 
+ /* Monitor Command Prompt */
+diff --git a/include/efi_loader.h b/include/efi_loader.h
+index 611aae64a9..ebee330c68 100644
+--- a/include/efi_loader.h
+++ b/include/efi_loader.h
+@@ -950,11 +950,11 @@ extern const struct efi_firmware_management_protocol efi_fmp_fit;
+ extern const struct efi_firmware_management_protocol efi_fmp_raw;
+ 
+ /* Capsule update */
+-efi_status_t EFIAPI efi_update_capsule(
+efi_status_t __efi_runtime EFIAPI efi_update_capsule(
+ 		struct efi_capsule_header **capsule_header_array,
+ 		efi_uintn_t capsule_count,
+ 		u64 scatter_gather_list);
+-efi_status_t EFIAPI efi_query_capsule_caps(
+efi_status_t __efi_runtime EFIAPI efi_query_capsule_caps(
+ 		struct efi_capsule_header **capsule_header_array,
+ 		efi_uintn_t capsule_count,
+ 		u64 *maximum_capsule_size,
+diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
+index 6f5f32b903..8175177a1c 100644
+--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
+@@ -2090,6 +2090,44 @@ static void efi_exit_caches(void)
+ #endif
+ }
+ 
+#if IS_ENABLED(CONFIG_TARGET_CORSTONE1000)
+/**
+ * efi_corstone1000_kernel_started_event - notifies SE Proxy FW update service
+ *
+ * This function notifies the SE Proxy update service that the kernel has already started
+ *
+ * Return:
+ *
+ * 0: on success, otherwise failure
+ */
+static int efi_corstone1000_kernel_started_event(void)
+{
+	struct ffa_interface_data func_data = {0};
+	struct ffa_send_direct_data msg = {0};
+	u16 part_id = CORSTONE1000_SEPROXY_PART_ID;
+
+	log_debug("[%s]\n", __func__);
+
+	/*
+	 * telling the driver which partition to use
+	 */
+	func_data.data0_size = sizeof(part_id);
+	func_data.data0 = &part_id;
+
+	/*
+	 * setting the kernel started  event arguments
+	 */
+	msg.a3 = CORSTONE1000_SEPROXY_UPDATE_SVC_ID;
+	msg.a5 = CORSTONE1000_KERNEL_STARTED_EVT;
+
+	func_data.data1_size = sizeof(msg);
+	func_data.data1 = &msg;
+
+	return ffa_helper_msg_send_direct_req(&func_data);
+}
+
+#endif
+
+ /**
+  * efi_exit_boot_services() - stop all boot services
+  * @image_handle: handle of the loaded image
+@@ -2195,6 +2233,15 @@ static efi_status_t EFIAPI efi_exit_boot_services(efi_handle_t image_handle,
+ 	/* Recalculate CRC32 */
+ 	efi_update_table_header_crc32(&systab.hdr);
+ 
+#if IS_ENABLED(CONFIG_TARGET_CORSTONE1000)
+	/* Notifying SE Proxy FW update service */
+	ffa_ret = efi_corstone1000_kernel_started_event();
+	if (ffa_ret)
+		debug("[efi_boottime][ERROR]: Failure to notify SE Proxy FW update service\n");
+	else
+		debug("[efi_boottime][INFO]: SE Proxy FW update service notified\n");
+#endif
+
+ 	/* Give the payload some time to boot */
+ 	efi_set_watchdog(0);
+ 	WATCHDOG_RESET();
+diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
+index b75e4bcba1..f180555faf 100644
+--- a/lib/efi_loader/efi_capsule.c
+++ b/lib/efi_loader/efi_capsule.c
+@@ -20,6 +20,14 @@
+ #include <crypto/pkcs7_parser.h>
+ #include <linux/err.h>
+ 
+#ifdef CONFIG_TARGET_CORSTONE1000
+#include <arm_ffa_helper.h>
+#include <cpu_func.h>
+
+void *__efi_runtime_data corstone1000_capsule_buf; /* capsule shared buffer virtual address */
+efi_guid_t corstone1000_capsule_guid = EFI_CORSTONE1000_CAPSULE_ID_GUID;
+#endif
+
+ const efi_guid_t efi_guid_capsule_report = EFI_CAPSULE_REPORT_GUID;
+ static const efi_guid_t efi_guid_firmware_management_capsule_id =
+ 		EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID;
+@@ -472,6 +480,89 @@ static efi_status_t efi_capsule_update_firmware(
+ }
+ #endif /* CONFIG_EFI_CAPSULE_FIRMWARE_MANAGEMENT */
+ 
+#if IS_ENABLED(CONFIG_TARGET_CORSTONE1000)
+
+/**
+ * efi_corstone1000_alloc_capsule_shared_buf - allocate capsule shared buffer
+ * @capsule_image_size:	The capsule data (header + payload)
+ *
+ * This function allocates the physically contiguous buffer shared between u-boot
+ * and the secure world. On UpdateCapsule() capsule data is copied to the buffer
+ * and a door bell event is generated.
+ * The buffer is allocated at the start of the DDR memory after u-boot has been relocated
+ * to the end of DDR.
+ *
+ * Return:
+ *
+ * 0: on success, otherwise failure
+ */
+efi_status_t efi_corstone1000_alloc_capsule_shared_buf(void)
+{
+	efi_status_t efi_ret;
+	u64 ram_base = CONFIG_SYS_SDRAM_BASE;
+
+	log_debug("[%s]\n", __func__);
+
+	efi_ret = efi_allocate_pages(EFI_ALLOCATE_ADDRESS,
+				     EFI_RUNTIME_SERVICES_DATA,
+				     CORSTONE1000_CAPSULE_BUFFER_SIZE,
+				     &ram_base);
+
+	if (efi_ret != EFI_SUCCESS) {
+		corstone1000_capsule_buf = NULL;
+		log_err("EFI: Corstone1000: Allocating capsule shared buffer error (%d)\n"
+			, (int)efi_ret);
+		return efi_ret;
+	}
+
+	log_info("EFI: Corstone1000: Capsule shared buffer at 0x%x , size %d pages\n"
+		, (unsigned int)ram_base,
+		CORSTONE1000_CAPSULE_BUFFER_SIZE);
+
+	corstone1000_capsule_buf = (void *)map_sysmem((phys_addr_t)ram_base, 0);
+
+	return EFI_SUCCESS;
+}
+
+/**
+ * efi_corstone1000_buffer_ready_event - issue door bell event
+ * @capsule_image_size:	The capsule data (header + payload)
+ *
+ * This function notifies the SE Proxy update service that capsule data is available
+ * in the capsule shared buffer.
+ *
+ * Return:
+ *
+ * 0: on success, otherwise failure
+ */
+static int __efi_runtime efi_corstone1000_buffer_ready_event(u32 capsule_image_size)
+{
+	struct ffa_interface_data func_data = {0};
+	struct ffa_send_direct_data msg = {0};
+	u16 part_id = CORSTONE1000_SEPROXY_PART_ID;
+
+	log_debug("[%s]\n", __func__);
+
+	/*
+	 * telling the driver which partition to use
+	 */
+	func_data.data0_size = sizeof(part_id);
+	func_data.data0 = &part_id;
+
+	/*
+	 * setting the buffer ready event arguments
+	 */
+	msg.a3 = CORSTONE1000_SEPROXY_UPDATE_SVC_ID;
+	msg.a4 = capsule_image_size;
+	msg.a5 = CORSTONE1000_BUFFER_READY_EVT;
+
+	func_data.data1_size = sizeof(msg);
+	func_data.data1 = &msg;
+
+	return ffa_helper_msg_send_direct_req(&func_data);
+}
+#endif
+
+ /**
+  * efi_update_capsule() - process information from operating system
+  * @capsule_header_array:	Array of virtual address pointers
+@@ -485,7 +576,7 @@ static efi_status_t efi_capsule_update_firmware(
+  *
+  * Return:			status code
+  */
+-efi_status_t EFIAPI efi_update_capsule(
+efi_status_t __efi_runtime EFIAPI efi_update_capsule(
+ 		struct efi_capsule_header **capsule_header_array,
+ 		efi_uintn_t capsule_count,
+ 		u64 scatter_gather_list)
+@@ -502,6 +593,13 @@ efi_status_t EFIAPI efi_update_capsule(
+ 		goto out;
+ 	}
+ 
+#if IS_ENABLED(CONFIG_TARGET_CORSTONE1000)
+		if (capsule_count != 1 || !corstone1000_capsule_buf) {
+			ret = EFI_INVALID_PARAMETER;
+			goto out;
+		}
+#endif
+
+ 	ret = EFI_SUCCESS;
+ 	for (i = 0, capsule = *capsule_header_array; i < capsule_count;
+ 	     i++, capsule = *(++capsule_header_array)) {
+@@ -514,6 +612,41 @@ efi_status_t EFIAPI efi_update_capsule(
+ 
+ 		log_debug("Capsule[%d] (guid:%pUl)\n",
+ 			  i, &capsule->capsule_guid);
+
+#if CONFIG_IS_ENABLED(TARGET_CORSTONE1000)
+
+		if (guidcmp(&corstone1000_capsule_guid, &capsule->capsule_guid)) {
+			ret = EFI_INVALID_PARAMETER;
+			log_err("Corstone1000: Invalid capsule GUID\n");
+			goto out;
+		}
+
+		if (efi_size_in_pages(capsule->capsule_image_size) >
+		    CORSTONE1000_CAPSULE_BUFFER_SIZE) {
+			log_err("Corstone1000: Capsule data size exceeds the shared buffer size\n");
+			ret = EFI_BUFFER_TOO_SMALL;
+			goto out;
+		}
+
+		/* copy the data to the contiguous buffer */
+		efi_memcpy_runtime(corstone1000_capsule_buf, capsule, capsule->capsule_image_size);
+
+		/* invalidate the data cache */
+		invalidate_dcache_all();
+
+		/* issue buffer ready event */
+		ret = efi_corstone1000_buffer_ready_event(capsule->capsule_image_size);
+		if (ret) {
+			log_err("EFI: Corstone1000: Buffer ready event error (%d)\n", (int)ret);
+			ret = EFI_DEVICE_ERROR;
+		} else {
+			ret = EFI_SUCCESS;
+		}
+
+		goto out;
+
+#endif
+
+ 		if (!guidcmp(&capsule->capsule_guid,
+ 			     &efi_guid_firmware_management_capsule_id)) {
+ 			ret  = efi_capsule_update_firmware(capsule);
+@@ -552,7 +685,7 @@ out:
+  *
+  * Return:			status code
+  */
+-efi_status_t EFIAPI efi_query_capsule_caps(
+efi_status_t __efi_runtime EFIAPI efi_query_capsule_caps(
+ 		struct efi_capsule_header **capsule_header_array,
+ 		efi_uintn_t capsule_count,
+ 		u64 *maximum_capsule_size,
+diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
+index a2338d74af..9e3399a28c 100644
+--- a/lib/efi_loader/efi_setup.c
+++ b/lib/efi_loader/efi_setup.c
+@@ -16,6 +16,13 @@
+ 
+ efi_status_t efi_obj_list_initialized = OBJ_LIST_NOT_INITIALIZED;
+ 
+#if IS_ENABLED(CONFIG_TARGET_CORSTONE1000)
+/**
+ * efi_corstone1000_alloc_capsule_shared_buf - allocate capsule shared buffer
+ */
+extern efi_status_t efi_corstone1000_alloc_capsule_shared_buf(void);
+#endif
+
+ /*
+  * Allow unaligned memory access.
+  *
+@@ -128,6 +135,14 @@ static efi_status_t efi_init_capsule(void)
+ {
+ 	efi_status_t ret = EFI_SUCCESS;
+ 
+#if IS_ENABLED(CONFIG_TARGET_CORSTONE1000)
+	ret = efi_corstone1000_alloc_capsule_shared_buf();
+	if (ret != EFI_SUCCESS) {
+		printf("EFI: Corstone-1000: cannot allocate caspsule shared buffer\n");
+		return ret;
+	}
+#endif
+
+ 	if (IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_UPDATE)) {
+ 		ret = efi_set_variable_int(L"CapsuleMax",
+ 					   &efi_guid_capsule_report,
+-- 
+2.17.1
+
@@ -0,0 +1,34 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From 1617ecbbf163c921468fee224c92a8f79b43e2fb Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Thu, 11 Nov 2021 16:34:54 +0000
+Subject: [PATCH 7/7] corstone1000: adjust the environment and heap sizes
+
+env size set to 64 KB
+heap size 64 KB + 32 MB
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ include/configs/corstone1000.h | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
+index 7f8a8ee254..7d63dd4ad9 100644
+--- a/include/configs/corstone1000.h
+++ b/include/configs/corstone1000.h
+@@ -75,8 +75,9 @@
+ /* Default load address for the source command */
+ #define CONFIG_SYS_LOAD_ADDR   (V2M_BASE + 0x10000000)
+ 
+#define CONFIG_ENV_SECT_SIZE		SZ_64K
+ /* Size of malloc() pool */
+-#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + (8 << 20))
+#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SECT_SIZE + SZ_32M)
+ 
+ #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
+ 
+-- 
+2.17.1
+
@@ -0,0 +1,38 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+
+From 313b89315d93ace166e2312a8e09aa85f1beb747 Mon Sep 17 00:00:00 2001
+From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+Date: Wed, 17 Nov 2021 15:28:06 +0000
+Subject: [PATCH 06/10] corstone1000: Update FFA shared buffer address
+
+FFA shared buffer address changed to 0x02000000.
+
+The existing address 0x023F8000 is currently being used by
+Optee so the virtual address returned to the SMM gateway is 0x0000.
+So the buffer is moved to 0x02000000.
+
+Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+%% original patch: 0025-Update-FFA-shared-buffer-address.patch
+
+%% original patch: 0025-Update-FFA-shared-buffer-address.patch
+---
+ include/configs/corstone1000.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
+index 7f8c61ba93..0451121b79 100644
+--- a/include/configs/corstone1000.h
+++ b/include/configs/corstone1000.h
+@@ -42,7 +42,7 @@
+ #define FFA_SHARED_MM_BUFFER_SIZE		SZ_4K /* 4 KB */
+ 
+ /* shared buffer physical address used for communication between u-boot and the MM SP */
+-#define FFA_SHARED_MM_BUFFER_ADDR		(0x023F8000)
+#define FFA_SHARED_MM_BUFFER_ADDR		(0x02000000)
+ 
+ #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x03f00000)
+ #define CONFIG_SKIP_LOWLEVEL_INIT
+-- 
+2.17.1
+
@@ -0,0 +1,58 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+
+From 524c865ae37f9cb9278988120e508c5314c2cd73 Mon Sep 17 00:00:00 2001
+From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+Date: Wed, 17 Nov 2021 15:28:53 +0000
+Subject: [PATCH 07/10] corstone1000: Disable set/get of NV variables
+
+This is a temporary change which uses only the volatile memory
+for get and set variable calls.
+
+The non volatile storage access is via openAmp in se proxy which is still not 
+integrated to the system. So when an efi_set_variable_int() call is made for
+NV variables, mm_commmunicate results in failure. This change will direct
+PlatformLang and OsIndications to volatile memory which would be a
+temporary solution.
+
+Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+%% original patch: 0026-Disable-set-get-of-NV-variables.patch
+
+%% original patch: 0026-Disable-set-get-of-NV-variables.patch
+---
+ lib/efi_loader/efi_setup.c | 12 ++++++++++--
+ 1 file changed, 10 insertions(+), 2 deletions(-)
+
+diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
+index 9e3399a28c..fcf2eae9cd 100644
+--- a/lib/efi_loader/efi_setup.c
+++ b/lib/efi_loader/efi_setup.c
+@@ -83,7 +83,11 @@ static efi_status_t efi_init_platform_lang(void)
+ 
+ 	ret = efi_set_variable_int(L"PlatformLang",
+ 				   &efi_global_variable_guid,
+-				   EFI_VARIABLE_NON_VOLATILE |
+				   	/*
+					* This is a temporary change until NV memory is accessible 
+					* through OpenAmp. 
+					*/
+				   //EFI_VARIABLE_NON_VOLATILE | 
+ 				   EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ 				   EFI_VARIABLE_RUNTIME_ACCESS,
+ 				   1 + strlen(lang), lang, false);
+@@ -210,7 +214,11 @@ static efi_status_t efi_clear_os_indications(void)
+ 		os_indications &=
+ 			~EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED;
+ 	ret = efi_set_variable_int(L"OsIndications", &efi_global_variable_guid,
+-				   EFI_VARIABLE_NON_VOLATILE |
+				   	/*
+					* This is a temporary change until NV memory is accessible 
+					* through OpenAmp. 
+					*/
+				   //EFI_VARIABLE_NON_VOLATILE |
+ 				   EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ 				   EFI_VARIABLE_RUNTIME_ACCESS,
+ 				   sizeof(os_indications), &os_indications,
+-- 
+2.17.1
+
@@ -0,0 +1,45 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+
+From 5d53e40021d7fca594bb86307b0851a958047b6b Mon Sep 17 00:00:00 2001
+From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+Date: Thu, 18 Nov 2021 16:42:59 +0000
+Subject: [PATCH 08/10] corstone1000: Make sure shared buffer contents are not
+ cached
+
+After updating the shared buffer, it is required to flush the cache
+to ensure that the secure world sees expected the shared buffer
+contents.
+
+The MM communication shared buffer is configured in device region of optee
+which has cache disabled. So we need to invalidate the cache every time we
+update the buffer on uboot otherwise the secure world does not see the
+accurate values.
+
+Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+%% original patch: 0027-Make-sure-shared-buffer-contents-are-not-cached.patch
+
+%% original patch: 0027-Make-sure-shared-buffer-contents-are-not-cached.patch
+---
+ lib/efi_loader/efi_variable_tee.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c
+index b363ec92bf..9375aa6a63 100644
+--- a/lib/efi_loader/efi_variable_tee.c
+++ b/lib/efi_loader/efi_variable_tee.c
+@@ -331,6 +331,11 @@ static efi_status_t __efi_runtime ffa_mm_communicate(void *comm_buf, ulong comm_
+ 	virt_shared_buf = (void *)map_sysmem((phys_addr_t)FFA_SHARED_MM_BUFFER_ADDR, 0);
+ 	efi_memcpy_runtime(virt_shared_buf, comm_buf, tx_data_size);
+ 
+	/* The secure world has cache disabled for device region which we use for shared buffer
+	So, the secure world reads the data from DDR. Let's flush the cache so the DDR is
+	updated with the latest data */
+	invalidate_dcache_all();
+
+ 	/* Announce there is data in the shared buffer */
+ 
+ 	ffa_ret = ffa_notify_mm_sp();
+-- 
+2.17.1
+
@@ -0,0 +1,96 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Harry Moulton <harry.moulton@arm.com>
+
+From 224d5d7ca9359a1c383ee417d934d2a6dfca53df Mon Sep 17 00:00:00 2001
+From: Harry Moulton <harmou01@e123741.cambridge.arm.com>
+Date: Mon, 29 Nov 2021 13:13:17 +0000
+Subject: [PATCH] arm: corstone1000: fix unrecognized filesystem type
+ error.
+
+Fix the 'unrecognized filesystem type' error when attempting to boot
+from an EFI image on attached USB formated as GPT.
+
+Signed-off-by: Harry Moulton <harry.moulton@arm.com>
+---
+ common/usb_storage.c                |  3 +++
+ configs/corstone1000_defconfig      |  3 ++-
+ drivers/usb/isp1760/isp1760-uboot.c | 12 ++++++++++++
+ include/configs/corstone1000.h      |  1 +
+ 4 files changed, 18 insertions(+), 1 deletion(-)
+
+diff --git a/common/usb_storage.c b/common/usb_storage.c
+index 946c6b2b32..77b8b55010 100644
+--- a/common/usb_storage.c
+++ b/common/usb_storage.c
+@@ -769,6 +769,9 @@ static int usb_stor_BBB_transport(struct scsi_cmd *srb, struct us_data *us)
+ st:
+ 	retry = 0;
+ again:
+    if (srb->cmd[0] == SCSI_TST_U_RDY)
+        mdelay(100);
+
+ 	debug("STATUS phase\n");
+ 	result = usb_bulk_msg(us->pusb_dev, pipein, csw, UMASS_BBB_CSW_SIZE,
+ 				&actlen, USB_CNTL_TIMEOUT*5);
+diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
+index c5eb9af101..fe77bdc63f 100644
+--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
+@@ -20,6 +20,7 @@ CONFIG_CMD_BOOTM=y
+ CONFIG_CMD_LOADM=y
+ CONFIG_CMD_BOOTEFI=y
+ CONFIG_EFI_LOADER=y
+CONFIG_EFI_PARTITION=y
+ CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
+ CONFIG_CMD_BOOTEFI_HELLO=y
+ # CONFIG_CMD_XIMG is not set
+@@ -52,7 +53,7 @@ CONFIG_EFI_MM_COMM_TEE=y
+ # CONFIG_HEXDUMP is not set
+ CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
+ CONFIG_EFI_CAPSULE_ON_DISK=y
+-CONFIG_EFI_CAPSULE_ON_DISK_EARLY=y
+# CONFIG_EFI_CAPSULE_ON_DISK_EARLY is not set
+ # CONFIG_EFI_CAPSULE_AUTHENTICATE is not set
+ CONFIG_EFI_HAVE_CAPSULE_SUPPORT=y
+ CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y
+diff --git a/drivers/usb/isp1760/isp1760-uboot.c b/drivers/usb/isp1760/isp1760-uboot.c
+index 9f2eaa75f3..cb03bc5d8c 100644
+--- a/drivers/usb/isp1760/isp1760-uboot.c
+++ b/drivers/usb/isp1760/isp1760-uboot.c
+@@ -56,9 +56,21 @@ static int isp1760_msg_submit_irq(struct udevice *dev, struct usb_device *udev,
+ 				  pipe, buffer, length, interval);
+ }
+ 
+static int isp1760_get_max_xfer_size(struct udevice *dev, size_t *size)
+{
+    struct isp1760_host_data *host = dev_get_priv(dev);
+    struct isp1760_hcd *priv = host->hcd.hcd_priv;
+    const struct isp1760_memory_layout *mem = priv->memory_layout;
+
+    *size = mem->blocks_size[ISP176x_BLOCK_NUM - 1];
+
+    return 0;
+}
+
+ struct dm_usb_ops isp1760_usb_ops = {
+ 	.control	= isp1760_msg_submit_control,
+ 	.bulk		= isp1760_msg_submit_bulk,
+ 	.interrupt	= isp1760_msg_submit_irq,
+    .get_max_xfer_size = isp1760_get_max_xfer_size,
+ };
+ 
+diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
+index 87682406d6..4c7993649d 100644
+--- a/include/configs/corstone1000.h
+++ b/include/configs/corstone1000.h
+@@ -91,6 +91,7 @@
+ #define CONFIG_SYS_MAXARGS		64	/* max command args */
+ 
+ #define CONFIG_EXTRA_ENV_SETTINGS					\
+                "usb_pgood_delay=250\0"         \
+ 				"fdt_addr_r=0x82000000\0"		\
+ 				"kernel_addr=0x08330000\0"		\
+ 				"kernel_addr_r=0x82100000\0"		\
+-- 
+2.17.1
+
@@ -0,0 +1,27 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
+
+From 8b85cddde48f31266349277980a65d25dfae302e Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <Emekcan.Aras@arm.com>
+Date: Wed, 17 Nov 2021 18:48:35 +0000
+Subject: [PATCH] corstone1000: set CONFIG_PSCI_RESET
+
+set CONFIG_PSCI_RESET to allow efi_reset_system API to use PSCI.
+Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
+---
+ configs/corstone1000_defconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
+index b59b75df3e..55f93b0a2c 100644
+--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
+@@ -64,3 +64,5 @@ CONFIG_CMD_RTC=y
+ CONFIG_EFI_GET_TIME=y
+ CONFIG_EFI_SET_TIME=y
+ CONFIG_RTC_EMULATION=y
+CONFIG_PSCI_RESET=y
+
+-- 
+2.25.1
+
@@ -0,0 +1,64 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
+
+From e51542907203c46bdbbd78aa1c76058204fd75f1 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <Emekcan.Aras@arm.com>
+Date: Thu, 25 Nov 2021 16:54:57 +0000
+Subject: [PATCH] arm-bsp/u-boot: corstone1000: Implement autoboot
+ storage device selection
+
+This commit implements distro_bootcmd in config_bootcommand in u-boot.
+This command traverses all the USB devices connected to the board and
+finds a usb device that has bootable image to boot from it. If it cannot
+find a usb device with the bootable image, it will boot the system using
+the existing flash.
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+---
+ configs/corstone1000_defconfig |  2 +-
+ include/configs/corstone1000.h | 15 ++++++++++-----
+ 2 files changed, 11 insertions(+), 6 deletions(-)
+
+diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
+index 10b7c3ea18..0b9ead461b 100644
+--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
+@@ -66,4 +66,4 @@ CONFIG_EFI_GET_TIME=y
+ CONFIG_EFI_SET_TIME=y
+ CONFIG_RTC_EMULATION=y
+ CONFIG_PSCI_RESET=y
+-
+CONFIG_DISTRO_DEFAULTS=y
+diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
+index b0932f9f33..d029059a81 100644
+--- a/include/configs/corstone1000.h
+++ b/include/configs/corstone1000.h
+@@ -85,15 +85,20 @@
+ #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
+ #define CONFIG_SYS_MAXARGS		64	/* max command args */
+ 
+-#define CONFIG_EXTRA_ENV_SETTINGS					\
+#define BOOT_TARGET_DEVICES(func) \
+    func(USB, usb, 0)
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS				\
+                BOOTENV                         \
+                 "usb_pgood_delay=250\0"         \
+ 				"fdt_addr_r=0x82000000\0"		\
+ 				"kernel_addr=0x08330000\0"		\
+-				"kernel_addr_r=0x82100000\0"		\
+				"kernel_addr_r=0x88200000\0"	\
+ 				"fdt_high=0xffffffff\0"
+-
+-#define CONFIG_BOOTCOMMAND					\
+-				"echo Loading Kernel to memory ... ;" \
+#define CONFIG_BOOTCOMMAND					            \
+				"echo Loading Kernel to memory ... ;"   \
+ 				"loadm $kernel_addr $kernel_addr_r 0xc00000;" \
+                "usb start; usb reset;" \
+                "run distro_bootcmd;" \
+ 				"bootefi $kernel_addr_r $fdtcontroladdr;"
+ #endif
+-- 
+2.25.1
+
@@ -0,0 +1,47 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From 1e76c4b70c8539c56b4b9ae6b8fd415d811a1812 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Wed, 1 Dec 2021 19:04:59 +0000
+Subject: [PATCH] corstone1000: change base address of kernel in the flash
+
+More space in the flash is reserved up front for metadata
+parser and UEFI variables. That requires change in the flash
+base address of where images are present.
+
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ include/configs/corstone1000.h | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
+index bb3b099806..baa0720fb5 100644
+--- a/include/configs/corstone1000.h
+++ b/include/configs/corstone1000.h
+@@ -94,16 +94,16 @@
+     func(USB, usb, 0)
+ #include <config_distro_bootcmd.h>
+ #define CONFIG_EXTRA_ENV_SETTINGS				\
+-                BOOTENV                         \
+-                "usb_pgood_delay=250\0"         \
+				BOOTENV                         \
+				"usb_pgood_delay=250\0"         \
+ 				"fdt_addr_r=0x82000000\0"		\
+-				"kernel_addr=0x08330000\0"		\
+				"kernel_addr=0x083EE000\0"		\
+ 				"kernel_addr_r=0x88200000\0"	\
+ 				"fdt_high=0xffffffff\0"
+-#define CONFIG_BOOTCOMMAND					            \
+#define CONFIG_BOOTCOMMAND					\
+ 				"echo Loading Kernel to memory ... ;"   \
+ 				"loadm $kernel_addr $kernel_addr_r 0xc00000;" \
+-                "usb start; usb reset;" \
+-                "run distro_bootcmd;" \
+				"usb start; usb reset;" \
+				"run distro_bootcmd;" \
+ 				"bootefi $kernel_addr_r $fdtcontroladdr;"
+ #endif
+-- 
+2.17.1
+
@@ -0,0 +1,66 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+From abc455d29aa9c983c6af2fa75870a7ee95da2496 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Wed, 1 Dec 2021 19:17:57 +0000
+Subject: [PATCH] arm: corstone1000: identify which bank to load kernel from
+
+Secure enclave, based on the firmware update state of the
+system, decides the boot bank. In this commit, u-boot
+identifies the selected boot bank and loads the kernel
+from it.
+
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+---
+ configs/corstone1000_defconfig |  2 +-
+ include/configs/corstone1000.h | 18 ++++++++++++++----
+ 2 files changed, 15 insertions(+), 5 deletions(-)
+
+diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
+index 0b9ead461b..3c00e13ceb 100644
+--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
+@@ -29,7 +29,7 @@ CONFIG_CMD_BOOTEFI_HELLO=y
+ CONFIG_CMD_NVEDIT_EFI=y
+ # CONFIG_CMD_LOADS is not set
+ CONFIG_CMD_USB=y
+-# CONFIG_CMD_ITEST is not set
+CONFIG_CMD_ITEST=y
+ # CONFIG_CMD_SETEXPR is not set
+ CONFIG_CMD_DHCP=y
+ # CONFIG_CMD_NFS is not set
+diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
+index baa0720fb5..7c6f66c891 100644
+--- a/include/configs/corstone1000.h
+++ b/include/configs/corstone1000.h
+@@ -97,12 +97,22 @@
+ 				BOOTENV                         \
+ 				"usb_pgood_delay=250\0"         \
+ 				"fdt_addr_r=0x82000000\0"		\
+-				"kernel_addr=0x083EE000\0"		\
+-				"kernel_addr_r=0x88200000\0"	\
+				"boot_bank_flag=0x08002000\0"		\
+				"kernel_addr_bank_0=0x083EE000\0"			\
+				"kernel_addr_bank_1=0x0936E000\0"			\
+				"retrieve_kernel_load_addr="				\
+					"if itest.l *${boot_bank_flag} == 0; then "	\
+					    "setenv kernel_addr $kernel_addr_bank_0;"	\
+					"else "						\
+					    "setenv kernel_addr $kernel_addr_bank_1;"	\
+					"fi;"						\
+					"\0"							\
+				"kernel_addr_r=0x88200000\0"				\
+ 				"fdt_high=0xffffffff\0"
+ #define CONFIG_BOOTCOMMAND					\
+-				"echo Loading Kernel to memory ... ;"   \
+-				"loadm $kernel_addr $kernel_addr_r 0xc00000;" \
+				"run retrieve_kernel_load_addr;" \
+				"echo Loading kernel from $kernel_addr to memory ... ;" \
+				"loadm $kernel_addr $kernel_addr_r 0xc00000;"		\
+ 				"usb start; usb reset;" \
+ 				"run distro_bootcmd;" \
+ 				"bootefi $kernel_addr_r $fdtcontroladdr;"
+-- 
+2.17.1
+
@@ -0,0 +1,33 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From d26f38e9b677ddbfa4e92e250058630ecd275908 Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Mon, 6 Dec 2021 14:46:06 +0000
+Subject: [PATCH] corstone1000: dts: setting the boot console output
+
+Setting stdout-path in the chosen node.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ arch/arm/dts/corstone1000.dtsi | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
+index 0ea3a19698..88fb1576b9 100644
+--- a/arch/arm/dts/corstone1000.dtsi
+++ b/arch/arm/dts/corstone1000.dtsi
+@@ -12,7 +12,9 @@
+ 	#address-cells = <1>;
+ 	#size-cells = <1>;
+ 
+-	chosen { };
+	chosen {
+		stdout-path = "/uart@1a510000:115200n8";
+	};
+ 
+ 	cpus {
+ 		#address-cells = <1>;
+-- 
+2.17.1
+
@@ -0,0 +1,34 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From 871521cf90dabb1634af4e47cdf198f979f1907d Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Mon, 6 Dec 2021 15:53:56 +0000
+Subject: [PATCH] corstone1000: dts: remove the use of fdt_addr_r
+
+The device tree is embedded in the u-boot binary
+and located at the end of the DDR. Its address
+is specified in fdtcontroladdr environment variable.
+
+No need to use fdt_addr_r anymore.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ include/configs/corstone1000.h | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
+index 7c6f66c891..31fc0cb29e 100644
+--- a/include/configs/corstone1000.h
+++ b/include/configs/corstone1000.h
+@@ -96,7 +96,6 @@
+ #define CONFIG_EXTRA_ENV_SETTINGS				\
+ 				BOOTENV                         \
+ 				"usb_pgood_delay=250\0"         \
+-				"fdt_addr_r=0x82000000\0"		\
+ 				"boot_bank_flag=0x08002000\0"		\
+ 				"kernel_addr_bank_0=0x083EE000\0"			\
+ 				"kernel_addr_bank_1=0x0936E000\0"			\
+-- 
+2.17.1
+
@@ -0,0 +1,77 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From 44e0b661c90d83b64b38023ebc27a836ae687b6a Mon Sep 17 00:00:00 2001
+From: Vishnu Banavath <vishnu.banavath@arm.com>
+Date: Fri, 10 Dec 2021 20:03:35 +0000
+Subject: [PATCH 1/2] efi_capsule: corstone1000: pass interface id and buffer
+ event id using register w4
+
+Initially the interface/event IDs are passed to the SP using register
+w3 and w5.
+
+Now the SE proxy SP requires this arguments to be in register w4.
+
+This change is to pass interface ID(31:16) and event ID(15:0)
+to SE proxy SP to trigger an event to secure enclave about
+firmware update.
+
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ include/configs/corstone1000.h |  8 ++++++++
+ lib/efi_loader/efi_capsule.c   | 11 +++++++----
+ 2 files changed, 15 insertions(+), 4 deletions(-)
+
+diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
+index 31fc0cb29e..4a78e1a3c5 100644
+--- a/include/configs/corstone1000.h
+++ b/include/configs/corstone1000.h
+@@ -24,6 +24,14 @@
+ #define CORSTONE1000_BUFFER_READY_EVT	(0x1)
+ #define CORSTONE1000_KERNEL_STARTED_EVT	(0x2)
+ 
+#define PREP_SEPROXY_SVC_ID_MASK		GENMASK(31, 16)
+#define PREP_SEPROXY_SVC_ID(x)		\
+			(FIELD_PREP(PREP_SEPROXY_SVC_ID_MASK, (x)))
+
+#define PREP_SEPROXY_EVT_MASK		GENMASK(15, 0)
+#define PREP_SEPROXY_EVT(x)		\
+			(FIELD_PREP(PREP_SEPROXY_EVT_MASK, (x)))
+
+ /* Size in 4KB pages of the EFI capsule buffer */
+ #define CORSTONE1000_CAPSULE_BUFFER_SIZE		(8192) /* 32 MB */
+ 
+diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
+index 089eba0fd0..6917bb4925 100644
+--- a/lib/efi_loader/efi_capsule.c
+++ b/lib/efi_loader/efi_capsule.c
+@@ -21,6 +21,8 @@
+ #ifdef CONFIG_TARGET_CORSTONE1000
+ #include <arm_ffa_helper.h>
+ #include <cpu_func.h>
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+ 
+ void *__efi_runtime_data corstone1000_capsule_buf; /* capsule shared buffer virtual address */
+ efi_guid_t corstone1000_capsule_guid = EFI_CORSTONE1000_CAPSULE_ID_GUID;
+@@ -495,11 +497,12 @@ static int __efi_runtime efi_corstone1000_buffer_ready_event(u32 capsule_image_s
+ 	func_data.data0 = &part_id;
+ 
+ 	/*
+-	 * setting the buffer ready event arguments
+	 * setting the buffer ready event arguments in register w4:
+	 * - capsule update interface ID (31:16)
+	 * - the buffer ready event ID (15:0)
+ 	 */
+-	msg.a3 = CORSTONE1000_SEPROXY_UPDATE_SVC_ID;
+-	msg.a4 = capsule_image_size;
+-	msg.a5 = CORSTONE1000_BUFFER_READY_EVT;
+	msg.a4 = PREP_SEPROXY_SVC_ID(CORSTONE1000_SEPROXY_UPDATE_SVC_ID) |
+		PREP_SEPROXY_EVT(CORSTONE1000_BUFFER_READY_EVT);
+ 
+ 	func_data.data1_size = sizeof(msg);
+ 	func_data.data1 = &msg;
+-- 
+2.17.1
+
@@ -0,0 +1,59 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From 51600b4385ddd45ce480bdb58769205072ddadf2 Mon Sep 17 00:00:00 2001
+From: Vishnu Banavath <vishnu.banavath@arm.com>
+Date: Fri, 10 Dec 2021 20:10:41 +0000
+Subject: [PATCH 2/2] efi_boottime: corstone1000: pass interface id and kernel
+ event id using register w4
+
+Initially the interface/event IDs are passed to the SP using register
+w3 and w5.
+
+Now the SE proxy SP requires this arguments to be in register w4.
+
+This change is to pass interface ID(31:16) and kernel started
+event ID(15:0) to SE proxy SP to trigger an event to
+secure enclave just before ExitbootService().
+
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ lib/efi_loader/efi_boottime.c | 13 ++++++++++---
+ 1 file changed, 10 insertions(+), 3 deletions(-)
+
+diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
+index be49030717..17cc692064 100644
+--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
+@@ -26,6 +26,11 @@
+ #include <arm_ffa_helper.h>
+ #endif
+ 
+#if IS_ENABLED(CONFIG_TARGET_CORSTONE1000)
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+#endif
+
+ DECLARE_GLOBAL_DATA_PTR;
+ 
+ /* Task priority level */
+@@ -2114,10 +2119,12 @@ static int efi_corstone1000_kernel_started_event(void)
+ 	func_data.data0 = &part_id;
+ 
+ 	/*
+-	 * setting the kernel started  event arguments
+	 * setting the kernel started  event arguments:
+	 * setting capsule update interface ID(31:16)
+	 * the kernel started event ID(15:0)
+ 	 */
+-	msg.a3 = CORSTONE1000_SEPROXY_UPDATE_SVC_ID;
+-	msg.a5 = CORSTONE1000_KERNEL_STARTED_EVT;
+	msg.a4 = PREP_SEPROXY_SVC_ID(CORSTONE1000_SEPROXY_UPDATE_SVC_ID) |
+	PREP_SEPROXY_EVT(CORSTONE1000_KERNEL_STARTED_EVT);
+ 
+ 	func_data.data1_size = sizeof(msg);
+ 	func_data.data1 = &msg;
+-- 
+2.17.1
+
@@ -0,0 +1,62 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+From b126e250c2c6f2388fe3f30ee270dc9a891ad3a4 Mon Sep 17 00:00:00 2001
+From: Vishnu Banavath <vishnu.banavath@arm.com>
+Date: Sat, 11 Dec 2021 13:23:55 +0000
+Subject: [PATCH] efi_loader: corstone1000: remove guid check from corstone1000 config option
+
+Use generic fmp guid and no separte check is required for
+CORSTONE1000 target.
+
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
+index f018c740ab..681470762a 100644
+--- a/lib/efi_loader/efi_capsule.c
+++ b/lib/efi_loader/efi_capsule.c
+@@ -554,18 +554,18 @@ efi_status_t __efi_runtime EFIAPI efi_update_capsule(
+ 			log_err("EFI: A capsule has not enough data\n");
+ 			continue;
+ 		}
+		if (guidcmp(&capsule->capsule_guid,
+			&efi_guid_firmware_management_capsule_id)) {
+			log_err("Unsupported capsule type: %pUl\n", &capsule->capsule_guid);
+			ret = EFI_UNSUPPORTED;
+			goto out;
+		}
+ 
+ 		log_debug("Capsule[%d] (guid:%pUl)\n",
+ 			  i, &capsule->capsule_guid);
+ 
+ #if CONFIG_IS_ENABLED(TARGET_CORSTONE1000)
+ 
+-		if (guidcmp(&corstone1000_capsule_guid, &capsule->capsule_guid)) {
+-			ret = EFI_INVALID_PARAMETER;
+-			log_err("Corstone1000: Invalid capsule GUID\n");
+-			goto out;
+-		}
+-
+ 		if (efi_size_in_pages(capsule->capsule_image_size) >
+ 		    CORSTONE1000_CAPSULE_BUFFER_SIZE) {
+ 			log_err("Corstone1000: Capsule data size exceeds the shared buffer size\n");
+@@ -591,15 +591,7 @@ efi_status_t __efi_runtime EFIAPI efi_update_capsule(
+ 		goto out;
+ 
+ #endif
+-
+-		if (!guidcmp(&capsule->capsule_guid,
+-			     &efi_guid_firmware_management_capsule_id)) {
+-			ret  = efi_capsule_update_firmware(capsule);
+-		} else {
+-			log_err("EFI: not support capsule type: %pUl\n",
+-				&capsule->capsule_guid);
+-			ret = EFI_UNSUPPORTED;
+-		}
+		ret  = efi_capsule_update_firmware(capsule);
+ 
+ 		if (ret != EFI_SUCCESS)
+ 			goto out;
+-- 
+2.17.1
+
@@ -0,0 +1,42 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From 8907d857321de362ee545d3c86e39e9b49380c70 Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Sat, 11 Dec 2021 21:05:10 +0000
+Subject: [PATCH] arm_ffa: removing the cast when using binary OR on FIELD_PREP
+ macros
+
+When the GENMASK used is above 16-bits wide a u16 cast will cause
+loss of data.
+
+This commit fixes that.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ drivers/arm-ffa/arm_ffa_prv.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/arm-ffa/arm_ffa_prv.h b/drivers/arm-ffa/arm_ffa_prv.h
+index 38ea4ba83e..d0db3ef508 100644
+--- a/drivers/arm-ffa/arm_ffa_prv.h
+++ b/drivers/arm-ffa/arm_ffa_prv.h
+@@ -40,13 +40,13 @@
+ 
+ #define PREP_SELF_ENDPOINT_ID_MASK		GENMASK(31, 16)
+ #define PREP_SELF_ENDPOINT_ID(x)		\
+-			((u16)(FIELD_PREP(PREP_SELF_ENDPOINT_ID_MASK, (x))))
+			(FIELD_PREP(PREP_SELF_ENDPOINT_ID_MASK, (x)))
+ 
+ /* Partition endpoint ID mask  (partition with which u-boot communicates with) */
+ 
+ #define PREP_PART_ENDPOINT_ID_MASK		GENMASK(15, 0)
+ #define PREP_PART_ENDPOINT_ID(x)		\
+-			((u16)(FIELD_PREP(PREP_PART_ENDPOINT_ID_MASK, (x))))
+			(FIELD_PREP(PREP_PART_ENDPOINT_ID_MASK, (x)))
+ 
+ /* The FF-A SMC function prototype definition */
+ 
+-- 
+2.17.1
+
@@ -0,0 +1,32 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From 42676bed67b8f0b87e7b3bc1a7f43afc6f7ba505 Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Sat, 11 Dec 2021 21:18:59 +0000
+Subject: [PATCH] efi_loader: add the header file for invalidate_dcache_all
+ function
+
+The invalidate_dcache_all function has been implicitly declared.
+This commit fixes that.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ lib/efi_loader/efi_variable_tee.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c
+index b7de80cd39..bebe2325b8 100644
+--- a/lib/efi_loader/efi_variable_tee.c
+++ b/lib/efi_loader/efi_variable_tee.c
+@@ -22,6 +22,7 @@
+ #if (IS_ENABLED(CONFIG_ARM_FFA_TRANSPORT))
+ 
+ #include <arm_ffa_helper.h>
+#include <cpu_func.h>
+ #include <mapmem.h>
+ 
+ /* MM return codes */
+-- 
+2.17.1
+
@@ -0,0 +1,33 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+
+From 048d07817e1508022dc9a623ae9410e8f142fd46 Mon Sep 17 00:00:00 2001
+From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+Date: Sun, 12 Dec 2021 17:51:17 +0000
+Subject: [PATCH 1/3] Return proper error code when rx buffer is larger
+
+ffa_mm_communicate should return EFI_BUFFER_TOO_SMALL when
+the buffer received from the secure world is larger than the
+comm buffer as this value is forwarded by mm_communicate.
+
+Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+---
+ lib/efi_loader/efi_variable_tee.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c
+index 3ffc35ea1e..ec68994e0f 100644
+--- a/lib/efi_loader/efi_variable_tee.c
+++ b/lib/efi_loader/efi_variable_tee.c
+@@ -354,7 +354,7 @@ static efi_status_t __efi_runtime ffa_mm_communicate(void *comm_buf, ulong comm_
+ 
+ 		if (rx_data_size > comm_buf_size) {
+ 			unmap_sysmem(virt_shared_buf);
+-			return EFI_OUT_OF_RESOURCES;
+			return EFI_BUFFER_TOO_SMALL;
+ 		}
+ 
+ 		efi_memcpy_runtime(comm_buf, virt_shared_buf, rx_data_size);
+-- 
+2.17.1
+
@@ -0,0 +1,42 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+
+From d2ae8c021185ac1d067c5b78f21467bda4b7591b Mon Sep 17 00:00:00 2001
+From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+Date: Mon, 13 Dec 2021 15:25:23 +0000
+Subject: [PATCH] Use correct buffer size
+
+The comm buffer created has additional 4 bytes length which
+needs to be trimmed. This change will reduce the size of the
+comm buffer to what is expected.
+
+Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+---
+ include/mm_communication.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/include/mm_communication.h b/include/mm_communication.h
+index e65fbde60d..bb99190956 100644
+--- a/include/mm_communication.h
+++ b/include/mm_communication.h
+@@ -123,7 +123,7 @@ struct __packed efi_mm_communicate_header {
+  *
+  * Defined in EDK2 as SMM_VARIABLE_COMMUNICATE_HEADER.
+  */
+-struct smm_variable_communicate_header {
+struct __packed smm_variable_communicate_header {
+ 	efi_uintn_t  function;
+ 	efi_status_t ret_status;
+ 	u8           data[];
+@@ -145,7 +145,7 @@ struct smm_variable_communicate_header {
+  * Defined in EDK2 as SMM_VARIABLE_COMMUNICATE_ACCESS_VARIABLE.
+  *
+  */
+-struct smm_variable_access {
+struct __packed smm_variable_access {
+ 	efi_guid_t  guid;
+ 	efi_uintn_t data_size;
+ 	efi_uintn_t name_size;
+-- 
+2.17.1
+
@@ -0,0 +1,32 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+
+From 7bd96f322f42ae577cd201465f618849605c1e85 Mon Sep 17 00:00:00 2001
+From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+Date: Sun, 12 Dec 2021 17:58:08 +0000
+Subject: [PATCH 3/3] Update comm_buf when EFI_BUFFER_TOO_SMALL
+
+When the received buffer is larger than the comm buffer,
+the contents of the shared buffer which can fit in the
+comm buffer should be read before returning.
+
+Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+---
+ lib/efi_loader/efi_variable_tee.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c
+index 1d7a033e98..c948eed491 100644
+--- a/lib/efi_loader/efi_variable_tee.c
+++ b/lib/efi_loader/efi_variable_tee.c
+@@ -355,6 +355,7 @@ static efi_status_t __efi_runtime ffa_mm_communicate(void *comm_buf, ulong comm_
+ 			sizeof(size_t);
+ 
+ 		if (rx_data_size > comm_buf_size) {
+			efi_memcpy_runtime(comm_buf, virt_shared_buf, comm_buf_size);
+ 			unmap_sysmem(virt_shared_buf);
+ 			return EFI_BUFFER_TOO_SMALL;
+ 		}
+-- 
+2.17.1
+
@@ -5,7 +5,7 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
 #
 # Corstone1000 64-bit machines
 #
-
+CORSTONE1000_DEVICE_TREE:corstone1000-mps3 = "corstone1000-mps3"
 CORSTONE1000_DEVICE_TREE:corstone1000-fvp = "corstone1000-fvp"
 EXTRA_OEMAKE:append:corstone1000 = ' DEVICE_TREE=${CORSTONE1000_DEVICE_TREE}'

@@ -26,6 +26,34 @@ SRC_URI:append:corstone1000 = " \
      file://0012-arm-corstone1000-enable-uefi-secure-boot.patch \
      file://0013-arm-corstone1000-enable-handlers-for-uefi-variables.patch \
      file://0014-arm-corstone1000-enable-efi-capsule-options.patch \
+      file://0015-arm-dts-add-initial-devicetree-corstone1000-mps3.patch \
+      file://0016-arm-corstone1000-adding-PSCI-device-tree-node.patch \
+      file://0017-arm-corstone1000-amend-kernel-bootargs-with-ip-dhcp-.patch \
+      file://0018-arm_ffa-introducing-Arm-FF-A-low-level-driver.patch \
+      file://0019-arm_ffa-introducing-armffa-command.patch \
+      file://0020-arm_ffa-introducing-test-module-for-UCLASS_FFA.patch \
+      file://0021-arm_ffa-introducing-MM-communication-with-FF-A.patch \
+      file://0022-arm_ffa-corstone1000-enable-FF-A-and-MM-support.patch \
+      file://0023-efi-corstone1000-introduce-EFI-capsule-update.patch \
+      file://0024-corstone1000-adjust-the-environment-and-heap-sizes.patch \
+      file://0025-corstone1000-Update-FFA-shared-buffer-address.patch \
+      file://0026-corstone1000-Disable-set-get-of-NV-variables.patch \
+      file://0027-corstone1000-Make-sure-shared-buffer-contents-are-no.patch \
+      file://0028-arm-corstone1000-fix-unrecognized-filesystem-type-error.patch \
+      file://0029-corstone1000-set-CONFIG_PSCI_RESET.patch \
+      file://0030-arm-bsp-u-boot-corstone1000-Implement-autoboot-script.patch \
+      file://0031-corstone1000-change-base-address-of-kernel-in-the-fl.patch \
+      file://0032-arm-corstone1000-identify-which-bank-to-load-kernel.patch \
+      file://0033-corstone1000-dts-setting-the-boot-console-output.patch \
+      file://0034-corstone1000-dts-remove-the-use-of-fdt_addr_r.patch \
+      file://0035-efi_capsule-corstone1000-pass-interface-and-buffer-event-ids-in-w4.patch \
+      file://0036-efi_boottime-corstone1000-pass-interface-and-kernel-event-ids-in-w4.patch \
+      file://0037-efi_loader-remove-guid-check-from-corstone1000-confi.patch \
+      file://0038-arm_ffa-removing-the-cast-when-using-binary-OR-on-FIELD_PREP.patch \
+      file://0039-efi_loader-add-the-header-file-for-invalidate_dcache_all.patch \
+      file://0040-Return-proper-error-code-when-rx-buffer-is-larger.patch \
+      file://0041-Use-correct-buffer-size.patch \
+      file://0042-Update-comm_buf-when-EFI_BUFFER_TOO_SMALL.patch \
      "

 #
@@ -4043,16 +4043,16 @@ diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlat
 index 1b46eb2734..b59a563806 100644
 --- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
 +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
-@@ -23,6 +23,8 @@
+@@ -22,6 +22,8 @@
+   BUILD_NUMBER                   = 1
 
 !include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
- !include MdePkg/MdeLibs.dsc.inc
 +!include DynamicTablesPkg/DynamicTables.dsc.inc
 +!include Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManager.dsc.inc
 
 [LibraryClasses.common]
   ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
-@@ -153,6 +155,9 @@
+@@ -152,6 +154,9 @@
   gArmPlatformTokenSpaceGuid.PcdCoreCount|2
   gArmPlatformTokenSpaceGuid.PcdClusterCount|2
 
@@ -4062,7 +4062,7 @@ index 1b46eb2734..b59a563806 100644
   # Runtime Variable storage
   gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0
   gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE
-@@ -212,6 +217,10 @@
+@@ -211,6 +216,10 @@
       BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
   }
 
@@ -3,11 +3,11 @@ LICENSE = "Apache-2.0"
 AUTHOR = "The MCUboot committers <mcuboot@groups.io>, \
          Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>"

-LIC_FILES_CHKSUM = "file://PKG-INFO;md5=e32b214fd9c204b77a99a97aa903757b"
+LIC_FILES_CHKSUM = "file://setup.py;md5=bd908c2a1211013db5df04f0ec181b9b"

-SRC_URI[md5sum] = "de0005dc13ce9e5e6aecdedfd0956286"
+SRC_URI[md5sum] = "a515e40ae31c1d7a70e653b997bb112b"

-DEPENDS:corstone1000 = "python3-cryptography python3-intelhex python3-click python3-cbor"
+RDEPENDS_${PN} = "python3-cryptography-native python3-intelhex-native python3-click-native python3-cbor-native"

 inherit pypi setuptools3

@@ -0,0 +1,101 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From 045c5da54595303c8bfec54fa5bbae10fdf9f5f5 Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Wed, 25 Aug 2021 11:24:35 +0100
+Subject: [PATCH 1/3] firmware: arm_ffa: setting the FFA_VERSION compatibility
+ checks
+
+This commit aligns the FF-A versions checks according to the
+FF-A specification v1.0.
+
+The compatibility of the version number (x.y) of the caller with
+the version number (a.b) of the callee can be defined as:
+
+    If x == a and y <= b, then the versions are compatible.
+    Otherwise, versions are incompatible.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ drivers/firmware/arm_ffa/driver.c | 41 ++++++++++++++++++++++---------
+ 1 file changed, 30 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/firmware/arm_ffa/driver.c b/drivers/firmware/arm_ffa/driver.c
+index c9fb56afbcb4..0044c928d9f2 100644
+--- a/drivers/firmware/arm_ffa/driver.c
+++ b/drivers/firmware/arm_ffa/driver.c
+@@ -105,13 +105,14 @@
+ 
+ #define MAJOR_VERSION_MASK	GENMASK(30, 16)
+ #define MINOR_VERSION_MASK	GENMASK(15, 0)
+-#define MAJOR_VERSION(x)	((u16)(FIELD_GET(MAJOR_VERSION_MASK, (x))))
+-#define MINOR_VERSION(x)	((u16)(FIELD_GET(MINOR_VERSION_MASK, (x))))
+#define GET_FFA_MAJOR_VERSION(x)	((u16)(FIELD_GET(MAJOR_VERSION_MASK, (x))))
+#define GET_FFA_MINOR_VERSION(x)	((u16)(FIELD_GET(MINOR_VERSION_MASK, (x))))
+ #define PACK_VERSION_INFO(major, minor)			\
+ 	(FIELD_PREP(MAJOR_VERSION_MASK, (major)) |	\
+ 	 FIELD_PREP(MINOR_VERSION_MASK, (minor)))
+-#define FFA_VERSION_1_0		PACK_VERSION_INFO(1, 0)
+-#define FFA_MIN_VERSION		FFA_VERSION_1_0
+#define FFA_MAJOR_VERSION		(1)
+#define FFA_MINOR_VERSION		(0)
+#define FFA_VERSION_1_0		PACK_VERSION_INFO(FFA_MAJOR_VERSION, FFA_MINOR_VERSION)
+ 
+ #define SENDER_ID_MASK		GENMASK(31, 16)
+ #define RECEIVER_ID_MASK	GENMASK(15, 0)
+@@ -170,26 +171,44 @@ static struct ffa_drv_info *drv_info;
+ static int ffa_version_check(u32 *version)
+ {
+ 	ffa_value_t ver;
+	u16 major, minor;
+ 
+ 	invoke_ffa_fn((ffa_value_t){
+ 		      .a0 = FFA_VERSION, .a1 = FFA_DRIVER_VERSION,
+ 		      }, &ver);
+ 
+
+ 	if (ver.a0 == FFA_RET_NOT_SUPPORTED) {
+-		pr_info("FFA_VERSION returned not supported\n");
+		pr_err("A Firmware Framework implementation does not exist\n");
+ 		return -EOPNOTSUPP;
+ 	}
+ 
+-	if (ver.a0 < FFA_MIN_VERSION || ver.a0 > FFA_DRIVER_VERSION) {
+-		pr_err("Incompatible version %d.%d found\n",
+-		       MAJOR_VERSION(ver.a0), MINOR_VERSION(ver.a0));
+-		return -EINVAL;
+	major = GET_FFA_MAJOR_VERSION(ver.a0);
+	minor = GET_FFA_MINOR_VERSION(ver.a0);
+
+	if ((major != FFA_MAJOR_VERSION) || (minor < FFA_MINOR_VERSION)) {
+		pr_err("Versions are incompatible\n"
+		"FF-A driver version: %d.%d\n"
+		"FF-A framework version: %d.%d\n",
+				FFA_MAJOR_VERSION,
+				FFA_MINOR_VERSION,
+				major,
+				minor);
+		return -EPROTONOSUPPORT;
+ 	}
+ 
+	pr_info("Versions are compatible\n"
+	"FF-A driver version: %d.%d\n"
+	"FF-A framework version: %d.%d\n",
+					FFA_MAJOR_VERSION,
+					FFA_MINOR_VERSION,
+					major,
+					minor);
+
+ 	*version = ver.a0;
+-	pr_info("Version %d.%d found\n", MAJOR_VERSION(ver.a0),
+-		MINOR_VERSION(ver.a0));
+
+ 	return 0;
+
+ }
+ 
+ static int ffa_rx_release(void)
+-- 
+2.17.1
+
@@ -128,6 +128,7 @@ SRC_URI:append:corstone1000 = " \
           file://0034-usb-isp1760-write-to-status-and-address-register.patch \
           file://0035-usb-isp1760-use-the-right-irq-status-bit.patch \
           file://0036-usb-isp1760-otg-control-register-access.patch \
+           file://0037-firmware-arm_ffa-setting-the-FFA_VERSION-compatibility-checks.patch.patch \
           file://defconfig  \
        "

@@ -0,0 +1,38 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+From 327290faefe16440c4975c9539b11d43c92bcf48 Mon Sep 17 00:00:00 2001
+From: Vishnu Banavath <vishnu.banavath@arm.com>
+Date: Thu, 25 Nov 2021 06:20:48 +0000
+Subject: [PATCH] plat-corstone1000: add a rule in Makefile to SP_MAKEFILE_PATH
+
+This change is to provide an option to user to include
+secure manifest into optee-os Makefile so that the secure
+partition is part of optee-os image
+
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+diff --git a/Makefile b/Makefile
+index f6fcea8b..21722939 100644
+--- a/Makefile
+++ b/Makefile
+@@ -18,6 +18,16 @@ unexport MAKEFILE_LIST
+ # nonzero status). Useful since a few recipes use shell redirection.
+ .DELETE_ON_ERROR:
+ 
+# include secure partition make file and manifest file
+ifdef CFG_SP_MKFILE_PATH
+ifdef CFG_EMBED_DTB_SOURCE_FILE
+include $(CFG_SP_MKFILE_PATH)
+$(info Loading secure partitions manifest ${CFG_EMBED_DTB_SOURCE_FILE})
+CFG_EMBED_DTB_SOURCE_FILE :=${CFG_EMBED_DTB_SOURCE_FILE}
+OPTEE_OS_COMMON_EXTRA_FLAGS+=${CFG_EMBED_DTB_SOURCE_FILE}
+endif
+endif
+
+ include mk/checkconf.mk
+ 
+ .PHONY: all
+-- 
+2.17.1
+
@@ -0,0 +1,29 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+From 5fdf7792ead29784718d30d8a8a5383a994e2fef Mon Sep 17 00:00:00 2001
+From: Vishnu Banavath <vishnu.banavath@arm.com>
+Date: Thu, 2 Dec 2021 12:51:11 +0000
+Subject: [PATCH] plat-corstone1000: increase OPTEE core heap size
+
+This change is to increase optee core heap size to 131072
+from its default value to fit openAMP and smm-gateway
+in SEL0
+
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+diff --git a/core/arch/arm/plat-corstone1000/conf.mk b/core/arch/arm/plat-corstone1000/conf.mk
+index 7a4aa13c..65d652a4 100644
+--- a/core/arch/arm/plat-corstone1000/conf.mk
+++ b/core/arch/arm/plat-corstone1000/conf.mk
+@@ -31,6 +31,7 @@ CFG_DDR_SIZE ?= 0x80000000
+ CFG_DT_ADDR ?= 0x82100000
+ CFG_DTB_MAX_SIZE ?= 0x100000
+ 
+CFG_CORE_HEAP_SIZE ?= 131072
+ $(call force,CFG_PSCI_ARM64,y)
+ $(call force,CFG_DT,y)
+ $(call force,CFG_EXTERNAL_DTB_OVERLAY,y)
+-- 
+2.17.1
+
@@ -0,0 +1,40 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+From 4617f85b70c7e4206b244f3eaffdc62ac3744a17 Mon Sep 17 00:00:00 2001
+From: Jelle Sels <jelle.sels@arm.com>
+Date: Mon, 10 May 2021 11:37:23 +0200
+Subject: [PATCH] Fix: add missing error check during SP init
+
+Error checking during SP initialization (sp_init_uuid()) was lacking.
+As a result an out of CORE HEAP situation resulted in a panic. This was
+due to lack of memory in the inflate() function of zlib.
+
+Signed-off-by: Jelle Sels <jelle.sels@arm.com>
+Change-Id: I287e2e2dd507feb45991b32ed264b3b6ad6fcd39
+
+diff --git a/core/arch/arm/kernel/sp.c b/core/arch/arm/kernel/sp.c
+index 4acbc2e2..23532a01 100644
+--- a/core/arch/arm/kernel/sp.c
+++ b/core/arch/arm/kernel/sp.c
+@@ -383,10 +383,14 @@ static TEE_Result __attribute__((unused)) sp_init_uuid(const TEE_UUID *uuid)
+ 				  cancel_req_to,
+ 				  &param);
+ 
+-	args.a0 = sp_get_session(sess->id)->sp_regs.x[0];
+-	sp_thread(sess->id, FFA_NW_ID, &args);
+	if (res == TEE_SUCCESS) {
+		args.a0 = sp_get_session(sess->id)->sp_regs.x[0];
+		sp_thread(sess->id, FFA_NW_ID, &args);
+ 
+-	thread_spmc_msg_recv(&args, sess->id);
+		thread_spmc_msg_recv(&args, sess->id);
+	} else {
+		EMSG("SP initialization failed, try increasing CFG_CORE_HEAP_SIZE");
+	}
+ 
+ 	return res;
+ }
+-- 
+2.25.1
+
@@ -0,0 +1,62 @@
+/*
+* Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-3-Clause
+*/
+
+/dts-v1/;
+
+/ {
+    se-proxy{
+        compatible = "arm,ffa-manifest-1.0";
+        ffa-version = <0x00010000>; /* 31:16 - Major, 15:0 - Minor */
+        uuid = <0x46bb39d1 0xb4d945b5 0x88ff0400 0x27dab249>;
+        description = "SE Proxy";
+        execution-ctx-count = <1>;
+        exception-level = <1>; /* S-EL0 */
+        execution-state = <0>; /* AArch64 */
+        xlat-granule = <0>; /* 4KiB */
+        messaging-method = <0>; /* Direct messaging only */
+	device-regions {
+		compatible = "arm,ffa-manifest-device-regions";
+		mhu-sender {
+			/* Armv8 A Foundation Platform values */
+			base-address = <0x00000000 0x1b820000>;
+			pages-count = <16>;
+			attributes = <0x3>; /* read-write */
+		};
+		mhu-receiver {
+			/* Armv8 A Foundation Platform values */
+			base-address = <0x00000000 0x1b830000>;
+			pages-count = <16>;
+			attributes = <0x3>; /* read-write */
+		};
+		openamp-virtio {
+			/* Armv8 A Foundation Platform values */
+			base-address = <0x00000000 0x88000000>;
+			pages-count = <256>;
+			attributes = <0x3>; /* read-write */
+		};
+	};
+    };
+    smm-gateway{
+        compatible = "arm,ffa-manifest-1.0";
+        ffa-version = <0x00010000>; /* 31:16 - Major, 15:0 - Minor */
+        uuid = <0xed32d533 0x99e64209 0x9cc02d72 0xcdd998a7>;
+        description = "SMM Gateway";
+        execution-ctx-count = <1>;
+        exception-level = <1>; /* S-EL0 */
+        execution-state = <0>; /* AArch64 */
+        xlat-granule = <0>; /* 4KiB */
+        messaging-method = <0>; /* Direct messaging only */
+		device-regions {
+          compatible = "arm,ffa-manifest-device-regions";
+          mm-comm-buffer {
+              /* Armv8 A Foundation Platform values */
+              base-address = <0x00000000 0x02000000>;
+              pages-count = <1>;
+              attributes = <0x3>; /* read-write */
+              };
+		};
+    };
+};
@@ -1,27 +1,20 @@
-SRC_URI = "git://git.trustedfirmware.org/OP-TEE/optee_os.git;protocol=https;branch=psa-development"
-SRCREV = "f9de2c9520ed97b89760cc4c99424aae440b63f4"
-PV .= "+git${SRCREV}"
+require optee-os_corstone1000_common.inc

-DEPENDS += "python3-pycryptodomex-native"
+DEPENDS += " secure-partitions"
+EXTRA_OEMAKE +="'SP_PACKAGING_METHOD=embedded'"

-FILESEXTRAPATHS:prepend := "${THISDIR}/files/optee-os/corstone1000:"
+TS_INSTALL_PREFIX_PATH="${RECIPE_SYSROOT}/firmware/sp/opteesp"
+EXTRA_OEMAKE += "'TS_INSTALL_PREFIX=${TS_INSTALL_PREFIX_PATH}'"

-SRC_URI:append = " \
-                  file://0001-plat-corstone1000-add-corstone1000-platform.patch \
-                  file://0002-plat-corstone1000-reserve-3MB-CVM-memory-for-optee.patch"
+# se-proxy secure partition
+SP_MKFILE_PATH="${TS_INSTALL_PREFIX}/lib/make/se-proxy.mk"

-COMPATIBLE_MACHINE = "corstone1000"
+# smm-gateway secure partition
+SP_MKFILE_PATH += "${TS_INSTALL_PREFIX}/lib/make/smm-gateway.mk"

-OPTEEMACHINE = "corstone1000"
-# Enable optee memory layout and boot logs
-EXTRA_OEMAKE += " CFG_TEE_CORE_LOG_LEVEL=4"
+EXTRA_OEMAKE += "'CFG_SP_MKFILE_PATH=${SP_MKFILE_PATH}'"

-# default disable latency benchmarks (over all OP-TEE layers)
-EXTRA_OEMAKE += " CFG_TEE_BENCHMARK=n"
+EXTRA_OEMAKE += "CFG_EMBED_DTB_SOURCE_FILE=${EMBED_DTB_SOURCE_FILE}"

-EXTRA_OEMAKE += " CFG_CORE_SEL1_SPMC=y CFG_CORE_FFA=y"
-
-EXTRA_OEMAKE += " CFG_WITH_SP=y"
-
-EXTRA_OEMAKE += " HOST_PREFIX=${HOST_PREFIX}"
-EXTRA_OEMAKE += " CROSS_COMPILE64=${HOST_PREFIX}"
+SRC_URI:append = " file://sp_manifest_combined_se.dts;"
+EMBED_DTB_SOURCE_FILE = "${WORKDIR}/sp_manifest_combined_se.dts"
@@ -0,0 +1,31 @@
+SRC_URI = "git://git.trustedfirmware.org/OP-TEE/optee_os.git;protocol=https;branch=psa-development"
+SRCREV = "f9de2c9520ed97b89760cc4c99424aae440b63f4"
+PV .= "+git${SRCREV}"
+
+DEPENDS += "python3-pycryptodomex-native dtc-native"
+
+FILESEXTRAPATHS:prepend := "${THISDIR}/files/optee-os/corstone1000:"
+
+SRC_URI:append = " \
+                  file://0001-plat-corstone1000-add-corstone1000-platform.patch \
+                  file://0002-plat-corstone1000-reserve-3MB-CVM-memory-for-optee.patch \
+                  file://0003-plat-corstone1000-add-a-rule-in-Makefile-to-SP_MAKEF.patch \
+		  file://0004-plat-corstone1000-increase-OPTEE-core-heap-size.patch \
+                  file://0005-Fix-add-missing-error-check-during-SP-init.patch \
+                   "
+
+COMPATIBLE_MACHINE = "corstone1000"
+
+OPTEEMACHINE = "corstone1000"
+# Enable optee memory layout and boot logs
+EXTRA_OEMAKE += " CFG_TEE_CORE_LOG_LEVEL=4"
+
+# default disable latency benchmarks (over all OP-TEE layers)
+EXTRA_OEMAKE += " CFG_TEE_BENCHMARK=n"
+
+EXTRA_OEMAKE += " CFG_CORE_SEL1_SPMC=y CFG_CORE_FFA=y"
+
+EXTRA_OEMAKE += " CFG_WITH_SP=y"
+
+EXTRA_OEMAKE += " HOST_PREFIX=${HOST_PREFIX}"
+EXTRA_OEMAKE += " CROSS_COMPILE64=${HOST_PREFIX}"
@@ -0,0 +1 @@
+require optee-os_corstone1000_common.inc
@@ -0,0 +1,6 @@
+# Machine specific configurations
+
+MACHINE_OPTEE_SPDEVKIT_REQUIRE ?= ""
+MACHINE_OPTEE_SPDEVKIT_REQUIRE:corstone1000 = "optee-spdevkit_corstone1000.inc"
+
+require ${MACHINE_OPTEE_SPDEVKIT_REQUIRE}
@@ -0,0 +1,45 @@
+FILESEXTRAPATHS:prepend := "${THISDIR}/psa-arch-tests/corstone1000:"
+
+DEPENDS += "cmake-native"
+
+export CMAKE_BUILD_PARALLEL_LEVEL
+CMAKE_BUILD_PARALLEL_LEVEL = "${@oe.utils.parallel_make(d, True)}"
+
+COMPATIBLE_MACHINE = "corstone1000"
+
+SRC_URI:append = "\
+    file://0001-psa-arch-test-sysroot_compiler_flags_fix.patch \
+    file://0002-arm-bsp-psa-arch-test-Fixing-psa-arch-tests-cmake.patch \
+    file://0003-corstone1000-port-crypto-config.patch;patchdir=../psa-arch-tests \
+    "
+
+FILES:${PN} += "${libdir}/libts.so*  ${libdir}/deployments  ${bindir}/psa-*"
+FILES:${PN}-dev = "${includedir}/deployments/psa-api-test/"
+
+INSANE_SKIP:${PN} += "rpaths"
+
+do_configure() {
+    for PSA_API_TEST in ${PSA_API_TESTS}; do
+        cmake \
+        -DSYSROOT_YOCTO=${RECIPE_SYSROOT} \
+        -S ${S}/$PSA_API_TEST -B "${B}/$PSA_API_TEST"
+    done
+}
+
+do_compile() {
+    for PSA_API_TEST in ${PSA_API_TESTS}; do
+        cmake --build "${B}/$PSA_API_TEST"
+    done
+}
+
+do_install() {
+    for PSA_API_TEST in ${PSA_API_TESTS}; do
+        install -d -m 0755 ${D}${libdir}/${PSA_API_TEST}
+        install -d -m 0755 ${D}${includedir}/${PSA_API_TEST}
+        install -m 0755 ${B}/${PSA_API_TEST}/libts_install/arm-linux/lib/*.so* ${D}${libdir}
+	install -d -m 0755 ${B}/${PSA_API_TEST}/libts_install/arm-linux/include ${D}${includedir}/${PSA_API_TEST}
+	psafile_fullpath=`ls ${B}/${PSA_API_TEST}/psa-*`
+	psafile_filename="`basename -s .bin ${psafile_fullpath}`"
+        install -D -p -m 0755 ${psafile_fullpath} ${D}/${bindir}/${psafile_filename}
+    done
+}
@@ -0,0 +1,68 @@
+Upstream-Status: Inappropriate [Not for upstreaming in the original repo]
+Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
+
+From 340ef6788d2803543b15235bf16a79cbc02235bd Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <Emekcan.Aras@arm.com>
+Date: Mon, 6 Dec 2021 10:21:59 +0000
+
+[PATCH] arm-bsp/psa-arch-test: Integrate psa-arch-test
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+---
+ deployments/libts/libts-import.cmake         | 4 +++-
+ external/MbedTLS/MbedTLS.cmake               | 1 +
+ external/psa_arch_tests/psa_arch_tests.cmake | 1 +
+ 3 files changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/deployments/libts/libts-import.cmake b/deployments/libts/libts-import.cmake
+index 792ba86..e3793e8 100644
+--- a/deployments/libts/libts-import.cmake
+++ b/deployments/libts/libts-import.cmake
+@@ -19,7 +19,6 @@ if(NOT DEFINED PROCESSOR_COUNT)
+ 	ProcessorCount(PROCESSOR_COUNT)
+ 	set(PROCESSOR_COUNT ${PROCESSOR_COUNT} CACHE STRING "Number of cores to use for parallel builds.")
+ endif()
+-
+ set(LIBTS_INSTALL_PATH "${CMAKE_CURRENT_BINARY_DIR}/libts_install" CACHE PATH "libts installation directory")
+ set(LIBTS_PACKAGE_PATH "${LIBTS_INSTALL_PATH}/lib/cmake" CACHE PATH "libts CMake package directory")
+ set(LIBTS_SOURCE_DIR "${TS_ROOT}/deployments/libts/${TS_ENV}" CACHE PATH "libts source directory")
+@@ -27,9 +26,12 @@ set(LIBTS_BINARY_DIR "${CMAKE_CURRENT_BINARY_DIR}/_deps/libts-build" CACHE PATH
+ 
+ file(MAKE_DIRECTORY ${LIBTS_BINARY_DIR})
+ 
+set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} --sysroot=${SYSROOT_YOCTO}")
+
+ #Configure the library
+ execute_process(COMMAND
+ 	${CMAKE_COMMAND}
+		-DCMAKE_SYSROOT=${SYSROOT_YOCTO}
+ 		-DCMAKE_INSTALL_PREFIX=${LIBTS_INSTALL_PATH}
+ 		-GUnix\ Makefiles
+ 		${LIBTS_SOURCE_DIR}
+diff --git a/external/MbedTLS/MbedTLS.cmake b/external/MbedTLS/MbedTLS.cmake
+index 3cbaed1..8c53f88 100644
+--- a/external/MbedTLS/MbedTLS.cmake
+++ b/external/MbedTLS/MbedTLS.cmake
+@@ -59,6 +59,7 @@ set(PSA_CRYPTO_API_INCLUDE "${MBEDTLS_INSTALL_PATH}/include" CACHE STRING "PSA C
+ #Configure the library
+ execute_process(COMMAND
+ 	${CMAKE_COMMAND}
+		-DCMAKE_SYSROOT=${SYSROOT_YOCTO}
+ 		-DENABLE_PROGRAMS=OFF
+ 		-DENABLE_TESTING=OFF
+ 		-DUNSAFE_BUILD=ON
+diff --git a/external/psa_arch_tests/psa_arch_tests.cmake b/external/psa_arch_tests/psa_arch_tests.cmake
+index e6ab73f..af00cfc 100644
+--- a/external/psa_arch_tests/psa_arch_tests.cmake
+++ b/external/psa_arch_tests/psa_arch_tests.cmake
+@@ -52,6 +52,7 @@ string(REPLACE ";" " " PSA_ARCH_TEST_EXTERNAL_DEFS "${PSA_ARCH_TEST_EXTERNAL_DEF
+ # Configure the psa-arch-test library
+ execute_process(COMMAND
+ 	${CMAKE_COMMAND}
+			-DCMAKE_SYSROOT=${SYSROOT_YOCTO}
+ 			-DTOOLCHAIN=INHERIT
+ 			-DCMAKE_TOOLCHAIN_FILE=${TS_EXTERNAL_LIB_TOOLCHAIN_FILE}
+ 			-DPSA_INCLUDE_PATHS=${PSA_ARCH_TESTS_EXTERNAL_INCLUDE_PATHS}
+-- 
+2.25.1
+
@@ -0,0 +1,49 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
+
+From 4a1f2fd2c3c3f8e00364d3b1a8c76a61e41a483f Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <Emekcan.Aras@arm.com>
+Date: Sat, 11 Dec 2021 09:32:44 +0000
+Subject: [PATCH] arm-bsp/psa-arch-test: Fixing psa-arch-tests cmake
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+---
+ external/psa_arch_tests/psa_arch_tests.cmake | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+diff --git a/external/psa_arch_tests/psa_arch_tests.cmake b/external/psa_arch_tests/psa_arch_tests.cmake
+index af00cfc..e4b4f6b 100644
+--- a/external/psa_arch_tests/psa_arch_tests.cmake
+++ b/external/psa_arch_tests/psa_arch_tests.cmake
+@@ -25,15 +25,13 @@ find_program(GIT_COMMAND "git")
+ if (NOT GIT_COMMAND)
+ 	message(FATAL_ERROR "Please install git")
+ endif()
+-
+if ("${PSA_ARCH_TESTS_PATH}" STREQUAL "DOWNLOAD")
+ # Fetching psa-arch-tests
+ FetchContent_Declare(
+ 	psa-arch-tests
+ 	GIT_REPOSITORY ${PSA_ARCH_TESTS_URL}
+ 	GIT_TAG ${PSA_ARCH_TESTS_REFSPEC}
+ 	GIT_SHALLOW TRUE
+-	PATCH_COMMAND git stash
+-		COMMAND git apply ${CMAKE_CURRENT_LIST_DIR}/modify_attest_config.patch
+ )
+ 
+ # FetchContent_GetProperties exports psa-arch-tests_SOURCE_DIR and psa-arch-tests_BINARY_DIR variables
+@@ -42,7 +40,10 @@ if(NOT psa-arch-tests_POPULATED)
+ 	message(STATUS "Fetching psa-arch-tests")
+ 	FetchContent_Populate(psa-arch-tests)
+ endif()
+-
+else()
+    set(psa-arch-tests_SOURCE_DIR "${TS_ROOT}/../psa-arch-tests")
+    set(psa-arch-tests_BINARY_DIR "${CMAKE_CURRENT_BINARY_DIR}")
+endif()
+ # Ensure list of include paths is separated correctly
+ string(REPLACE ";" "\\;" PSA_ARCH_TESTS_EXTERNAL_INCLUDE_PATHS "${PSA_ARCH_TESTS_EXTERNAL_INCLUDE_PATHS}")
+ 
+-- 
+2.25.1
+
@@ -0,0 +1,237 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
+
+From f86f5b42d853d2a65f6753362361bbb95aac1800 Mon Sep 17 00:00:00 2001
+From: Satish Kumar <satish.kumar01@arm.com>
+Date: Sat, 11 Dec 2021 11:06:57 +0000
+Subject: [PATCH] corstone1000: port crypto config
+
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
+
+Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
+
+%% original patch: 0003-corstone1000-port-crypto-config.patch
+---
+ .../nspe/pal_crypto_config.h                  | 83 +++++++++++++++----
+ 1 file changed, 66 insertions(+), 17 deletions(-)
+
+diff --git a/api-tests/platform/targets/tgt_dev_apis_linux/nspe/pal_crypto_config.h b/api-tests/platform/targets/tgt_dev_apis_linux/nspe/pal_crypto_config.h
+index 844cd2e..c936bdd 100755
+--- a/api-tests/platform/targets/tgt_dev_apis_linux/nspe/pal_crypto_config.h
+++ b/api-tests/platform/targets/tgt_dev_apis_linux/nspe/pal_crypto_config.h
+@@ -1,5 +1,5 @@
+ /** @file
+- * Copyright (c) 2021, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2019-2020, Arm Limited or its affiliates. All rights reserved.
+  * SPDX-License-Identifier : Apache-2.0
+  *
+  * Licensed under the Apache License, Version 2.0 (the "License");
+@@ -34,10 +34,14 @@
+  *
+  * Comment macros to disable the types
+  */
+#ifndef TF_M_PROFILE_SMALL
+#ifndef TF_M_PROFILE_MEDIUM
+ #define ARCH_TEST_RSA
+ #define ARCH_TEST_RSA_1024
+ #define ARCH_TEST_RSA_2048
+ #define ARCH_TEST_RSA_3072
+#endif
+#endif
+ 
+ /**
+  * \def  ARCH_TEST_ECC
+@@ -50,11 +54,17 @@
+  * Requires: ARCH_TEST_ECC
+  * Comment macros to disable the curve
+  */
+#ifndef TF_M_PROFILE_SMALL
+ #define ARCH_TEST_ECC
+ #define ARCH_TEST_ECC_CURVE_SECP192R1
+#ifndef TF_M_PROFILE_MEDIUM
+ #define ARCH_TEST_ECC_CURVE_SECP224R1
+#endif
+ #define ARCH_TEST_ECC_CURVE_SECP256R1
+#ifndef TF_M_PROFILE_MEDIUM
+ #define ARCH_TEST_ECC_CURVE_SECP384R1
+#endif
+#endif
+ 
+ /**
+  * \def ARCH_TEST_AES
+@@ -78,10 +88,10 @@
+  *
+  * Comment macros to disable the types
+  */
+-#define ARCH_TEST_DES
+-#define ARCH_TEST_DES_1KEY
+-#define ARCH_TEST_DES_2KEY
+-#define ARCH_TEST_DES_3KEY
+//#define ARCH_TEST_DES
+//#define ARCH_TEST_DES_1KEY
+//#define ARCH_TEST_DES_2KEY
+//#define ARCH_TEST_DES_3KEY
+ 
+ /**
+  * \def  ARCH_TEST_RAW
+@@ -104,7 +114,7 @@
+  *
+  * Enable the ARC4 key type.
+  */
+-#define ARCH_TEST_ARC4
+//#define ARCH_TEST_ARC4
+ 
+ /**
+  * \def ARCH_TEST_CIPHER_MODE_CTR
+@@ -113,7 +123,11 @@
+  *
+  * Requires: ARCH_TEST_CIPHER
+  */
+#ifndef TF_M_PROFILE_SMALL
+#ifndef TF_M_PROFILE_MEDIUM
+ #define ARCH_TEST_CIPHER_MODE_CTR
+#endif
+#endif
+ 
+ /**
+  * \def ARCH_TEST_CIPHER_MODE_CFB
+@@ -138,7 +152,11 @@
+  *
+  * Requires: ARCH_TEST_CIPHER, ARCH_TEST_AES, ARCH_TEST_CIPHER_MODE_CTR
+  */
+#ifndef TF_M_PROFILE_SMALL
+#ifndef TF_M_PROFILE_MEDIUM
+ #define ARCH_TEST_CTR_AES
+#endif
+#endif
+ 
+ /**
+  * \def ARCH_TEST_CBC_AES
+@@ -157,7 +175,11 @@
+  *
+  * Comment macros to disable the types
+  */
+#ifndef TF_M_PROFILE_SMALL
+#ifndef TF_M_PROFILE_MEDIUM
+ #define ARCH_TEST_CBC_NO_PADDING
+#endif
+#endif
+ 
+ /**
+  * \def ARCH_TEST_CFB_AES
+@@ -177,11 +199,15 @@
+  *
+  * Comment macros to disable the types
+  */
+#ifndef TF_M_PROFILE_SMALL
+#ifndef TF_M_PROFILE_MEDIUM
+ #define ARCH_TEST_PKCS1V15
+ #define ARCH_TEST_RSA_PKCS1V15_SIGN
+ #define ARCH_TEST_RSA_PKCS1V15_SIGN_RAW
+ #define ARCH_TEST_RSA_PKCS1V15_CRYPT
+ #define ARCH_TEST_RSA_OAEP
+#endif
+#endif
+ 
+ /**
+  * \def ARCH_TEST_CBC_PKCS7
+@@ -190,7 +216,11 @@
+  *
+  * Comment macros to disable the types
+  */
+#ifndef TF_M_PROFILE_SMALL
+#ifndef TF_M_PROFILE_MEDIUM
+ #define ARCH_TEST_CBC_PKCS7
+#endif
+#endif
+ 
+ /**
+  * \def ARCH_TEST_ASYMMETRIC_ENCRYPTION
+@@ -227,21 +257,27 @@
+  *
+  * Comment macros to disable the types
+  */
+-// #define ARCH_TEST_MD2
+-// #define ARCH_TEST_MD4
+-#define ARCH_TEST_MD5
+-#define ARCH_TEST_RIPEMD160
+-#define ARCH_TEST_SHA1
+//#define ARCH_TEST_MD2
+//#define ARCH_TEST_MD4
+//#define ARCH_TEST_MD5
+//#define ARCH_TEST_RIPEMD160
+//#define ARCH_TEST_SHA1
+#ifndef TF_M_PROFILE_SMALL
+ #define ARCH_TEST_SHA224
+#endif
+ #define ARCH_TEST_SHA256
+#ifndef TF_M_PROFILE_SMALL
+#ifndef TF_M_PROFILE_MEDIUM
+ #define ARCH_TEST_SHA384
+ #define ARCH_TEST_SHA512
+-// #define ARCH_TEST_SHA512_224
+-// #define ARCH_TEST_SHA512_256
+-// #define ARCH_TEST_SHA3_224
+-// #define ARCH_TEST_SHA3_256
+-// #define ARCH_TEST_SHA3_384
+-// #define ARCH_TEST_SHA3_512
+#endif
+#endif
+//#define ARCH_TEST_SHA512_224
+//#define ARCH_TEST_SHA512_256
+//#define ARCH_TEST_SHA3_224
+//#define ARCH_TEST_SHA3_256
+//#define ARCH_TEST_SHA3_384
+//#define ARCH_TEST_SHA3_512
+ 
+ /**
+  * \def ARCH_TEST_HKDF
+@@ -261,7 +297,12 @@
+  *
+  * Comment macros to disable the types
+  */
+#ifndef TF_M_PROFILE_SMALL
+#ifndef TF_M_PROFILE_MEDIUM
+ #define ARCH_TEST_CMAC
+#endif
+#endif
+//#define ARCH_TEST_GMAC
+ #define ARCH_TEST_HMAC
+ 
+ /**
+@@ -281,7 +322,11 @@
+  * Requires: ARCH_TEST_AES
+  *
+  */
+#ifndef TF_M_PROFILE_SMALL
+#ifndef TF_M_PROFILE_MEDIUM
+ #define ARCH_TEST_GCM
+#endif
+#endif
+ 
+ /**
+  * \def ARCH_TEST_TRUNCATED_MAC
+@@ -300,7 +345,9 @@
+  *
+  * Requires: ARCH_TEST_ECC
+  */
+#ifndef TF_M_PROFILE_SMALL
+ #define ARCH_TEST_ECDH
+#endif
+ 
+ /**
+  * \def ARCH_TEST_ECDSA
+@@ -308,7 +355,9 @@
+  * Enable the elliptic curve DSA library.
+  * Requires: ARCH_TEST_ECC
+  */
+#ifndef TF_M_PROFILE_SMALL
+ #define ARCH_TEST_ECDSA
+#endif
+ 
+ /**
+  * \def ARCH_TEST_DETERMINISTIC_ECDSA
+-- 
+2.25.1
+
@@ -0,0 +1,6 @@
+# Machine specific configurations
+
+MACHINE_PSA_REQUIRE ?= ""
+MACHINE_PSA_REQUIRE:corstone1000 = "psa-arch-tests-corstone1000.inc"
+
+require ${MACHINE_PSA_REQUIRE}
@@ -0,0 +1,35 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From 37559c70443fe85e246f1f652045f0cd3c78012b Mon Sep 17 00:00:00 2001
+From: Vishnu Banavath <vishnu.banavath@arm.com>
+Date: Sat, 13 Nov 2021 07:47:44 +0000
+Subject: [PATCH] tools/cmake/common: applying lowercase project convention
+
+Lowercase convention should only apply on the paths inside TS
+source-code.
+Host build paths should not be lowercased. Otherwise, builds
+with uppercase paths will break.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+%% original patch: 0001-tools-cmake-common-applying-lowercase-project-convention.patch
+
+diff --git a/tools/cmake/common/AddPlatform.cmake b/tools/cmake/common/AddPlatform.cmake
+index ae34c6e..31bcd8c 100644
+--- a/tools/cmake/common/AddPlatform.cmake
+++ b/tools/cmake/common/AddPlatform.cmake
+@@ -37,8 +37,8 @@ function(add_platform)
+ 	set(TGT ${MY_PARAMS_TARGET} CACHE STRING "")
+ 
+ 	# Ensure file path conforms to lowercase project convention
+-	string(TOLOWER "${TS_PLATFORM_ROOT}/${TS_PLATFORM}/platform.cmake" _platdef)
+-	include(${_platdef})
+	string(TOLOWER "${TS_PLATFORM}/platform.cmake" _platdef)
+	include(${TS_PLATFORM_ROOT}/${_platdef})
+ 	set(CMAKE_CONFIGURE_DEPENDS ${_platdef})
+ 
+ 	unset(TGT CACHE)
+-- 
+2.25.1
+
@@ -0,0 +1,33 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From a0673905e8f63877b631a29fab56ea42bf748549 Mon Sep 17 00:00:00 2001
+From: Vishnu Banavath <vishnu.banavath@arm.com>
+Date: Sat, 13 Nov 2021 07:51:53 +0000
+Subject: [PATCH] fix EARLY_TA_PATHS env variable
+
+Yocto cleans up environment varaibles at build time.
+EARLY_TA_PATHS should be set a separate rule for securepartitions
+to be included into optee-os image
+
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+%% original patch: 0002-fix-EARLY_TA_PATHS-env-variable.patch
+
+diff --git a/environments/opteesp/sp.mk.in b/environments/opteesp/sp.mk.in
+index c44ad59..d67e2dc 100644
+--- a/environments/opteesp/sp.mk.in
+++ b/environments/opteesp/sp.mk.in
+@@ -14,7 +14,8 @@ ifeq (,${@EXPORT_SP_UUID@-included})
+ endif
+ 
+ ifeq (embedded,${SP_PACKAGING_METHOD})
+-OPTEE_OS_COMMON_EXTRA_FLAGS+=EARLY_TA_PATHS+=${TS_INSTALL_PREFIX}/opteesp/bin/@EXPORT_SP_UUID@.stripped.elf
+EARLY_TA_PATHS+=${TS_INSTALL_PREFIX}/bin/@EXPORT_SP_UUID@.stripped.elf
+OPTEE_OS_COMMON_EXTRA_FLAGS+=${EARLY_TA_PATHS}
+ TS_SP_DTSI_LIST+="\\n\#include \"${TS_INSTALL_PREFIX}/opteesp/manifest/@EXPORT_SP_UUID@.dtsi\""
+ else ifeq (fip,${SP_PACKAGING_METHOD})
+ TS_SP_JSON_LIST+=${TS_INSTALL_PREFIX}/opteesp/json/@EXPORT_SP_NAME@.json
+-- 
+2.25.1
+
@@ -0,0 +1,47 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+From 77fa96b728b81066c440c2e1e185f745376a6fb2 Mon Sep 17 00:00:00 2001
+From: Vishnu Banavath <vishnu.banavath@arm.com>
+Date: Sat, 13 Nov 2021 08:34:42 +0000
+Subject: [PATCH] se-proxy:dts: add se-proxy as child node
+
+se-proxy sp string should be added for se-proxy node to be
+read properly.
+
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+%% original patch: 0003-se-proxy-dts-add-se-proxy-as-child-node.patch
+
+diff --git a/deployments/se-proxy/opteesp/default_se-proxy.dts.in b/deployments/se-proxy/opteesp/default_se-proxy.dts.in
+index 961071a..9f5cf71 100644
+--- a/deployments/se-proxy/opteesp/default_se-proxy.dts.in
+++ b/deployments/se-proxy/opteesp/default_se-proxy.dts.in
+@@ -7,13 +7,15 @@
+ @DTS_TAG@
+ 
+ @DTS_NODE@ {
+-	compatible = "arm,ffa-manifest-1.0";
+-	ffa-version = <0x00010000>; /* 31:16 - Major, 15:0 - Minor */
+-	uuid = <@EXPORT_SP_UUID_DT@>;
+-	description = "SE Proxy";
+-	execution-ctx-count = <1>;
+-	exception-level = <1>; /* S-EL0 */
+-	execution-state = <0>; /* AArch64 */
+-	xlat-granule = <0>; /* 4KiB */
+-	messaging-method = <0>; /* Direct messaging only */
+	se-proxy {
+		compatible = "arm,ffa-manifest-1.0";
+		ffa-version = <0x00010000>; /* 31:16 - Major, 15:0 - Minor */
+		uuid = <@EXPORT_SP_UUID_DT@>;
+		description = "SE Proxy";
+		execution-ctx-count = <1>;
+		exception-level = <1>; /* S-EL0 */
+		execution-state = <0>; /* AArch64 */
+		xlat-granule = <0>; /* 4KiB */
+		messaging-method = <0>; /* Direct messaging only */
+	};
+ };
+-- 
+2.25.1
+
@@ -0,0 +1,59 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+
+From 1f75194e884a1795c3523f41dc0912dc5068e525 Mon Sep 17 00:00:00 2001
+From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+Date: Wed, 17 Nov 2021 15:31:09 +0000
+Subject: [PATCH] Update mm-comm-buffer region in dts file
+
+%% original patch: 0004-Update-mm-comm-buffer-region-in-dts-file.patch
+
+diff --git a/deployments/smm-gateway/opteesp/default_smm-gateway.dts.in b/deployments/smm-gateway/opteesp/default_smm-gateway.dts.in
+index 0ad7878..183c38a 100644
+--- a/deployments/smm-gateway/opteesp/default_smm-gateway.dts.in
+++ b/deployments/smm-gateway/opteesp/default_smm-gateway.dts.in
+@@ -7,23 +7,24 @@
+ @DTS_TAG@
+ 
+ @DTS_NODE@ {
+-	compatible = "arm,ffa-manifest-1.0";
+-	ffa-version = <0x00010000>; /* 31:16 - Major, 15:0 - Minor */
+-	uuid = <@EXPORT_SP_UUID_DT@>;
+-	description = "SMM Gateway";
+-	execution-ctx-count = <1>;
+-	exception-level = <1>; /* S-EL0 */
+-	execution-state = <0>; /* AArch64 */
+-	xlat-granule = <0>; /* 4KiB */
+-	messaging-method = <0>; /* Direct messaging only */
+-
+-	memory-regions {
+-		compatible = "arm,ffa-manifest-memory-regions";
+-
+-		mm-comm-buffer {
+-			base-address = <@MM_COMM_BUFFER_ADDRESS@>;
+-			pages-count = <@MM_COMM_BUFFER_PAGE_COUNT@>;
+-			attributes = <0xb>;  /* ns access-read-write */
+	smm-gateway{
+		compatible = "arm,ffa-manifest-1.0";
+		ffa-version = <0x00010000>; /* 31:16 - Major, 15:0 - Minor */
+		uuid = <@EXPORT_SP_UUID_DT@>;
+		description = "SMM Gateway";
+		execution-ctx-count = <1>;
+		exception-level = <1>; /* S-EL0 */
+		execution-state = <0>; /* AArch64 */
+		xlat-granule = <0>; /* 4KiB */
+		messaging-method = <0>; /* Direct messaging only */
+		device-regions {
+          compatible = "arm,ffa-manifest-device-regions";
+          mm-comm-buffer {
+              /* Armv8 A Foundation Platform values */
+              base-address = <0x00000000 0x02000000>;
+              pages-count = <1>;
+              attributes = <0x3>; /* read-write */
+              };
+ 		};
+ 	};
+ };
+-- 
+2.25.1
+
@@ -0,0 +1,26 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+
+From 634b8e09e9c072b41dfe92e4ca08a685cac9e998 Mon Sep 17 00:00:00 2001
+From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+Date: Wed, 17 Nov 2021 15:32:04 +0000
+Subject: [PATCH] Configure NV storage macro
+
+%% original patch: 0005-Configure-NV-storage-macro.patch
+
+diff --git a/deployments/smm-gateway/smm_gateway.c b/deployments/smm-gateway/smm_gateway.c
+index 4884a04..7828b3a 100644
+--- a/deployments/smm-gateway/smm_gateway.c
+++ b/deployments/smm-gateway/smm_gateway.c
+@@ -13,6 +13,8 @@
+ 
+ /* Build-time default configuration */
+ 
+#define SMM_GATEWAY_NV_STORE_SN "sn:ffa:46bb39d1-b4d9-45b5-88ff-040027dab249:1"
+
+ /* Default to using the Protected Storage SP */
+ #ifndef SMM_GATEWAY_NV_STORE_SN
+ #define SMM_GATEWAY_NV_STORE_SN		"sn:ffa:751bf801-3dde-4768-a514-0f10aeed1790:0"
+-- 
+2.25.1
+
@@ -0,0 +1,53 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+
+From 6bb7e118c15c97d4554a0a7f6d3fc8e9792ca65c Mon Sep 17 00:00:00 2001
+From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+Date: Wed, 17 Nov 2021 15:32:46 +0000
+Subject: [PATCH] Use device region
+
+%% original patch: 0006-Use-device-region.patch
+
+diff --git a/deployments/smm-gateway/opteesp/smm_gateway_sp.c b/deployments/smm-gateway/opteesp/smm_gateway_sp.c
+index 6f13885..0bc0902 100644
+--- a/deployments/smm-gateway/opteesp/smm_gateway_sp.c
+++ b/deployments/smm-gateway/opteesp/smm_gateway_sp.c
+@@ -10,7 +10,7 @@
+ #include <config/loader/sp/sp_config_loader.h>
+ #include "components/rpc/mm_communicate/endpoint/sp/mm_communicate_call_ep.h"
+ #include "components/service/smm_variable/frontend/mm_communicate/smm_variable_mm_service.h"
+-#include "platform/interface/memory_region.h"
+#include "platform/interface/device_region.h"
+ #include <ffa_api.h>
+ #include <sp_api.h>
+ #include <sp_messaging.h>
+@@ -25,7 +25,7 @@ static int sp_init(uint16_t *own_sp_id);
+ 
+ void __noreturn sp_main(struct ffa_init_info *init_info)
+ {
+-	struct memory_region mm_comm_buffer_region = { 0 };
+	struct device_region mm_comm_buffer_region = { 0 };
+ 	struct rpc_interface *gateway_iface = NULL;
+ 	struct smm_variable_mm_service smm_var_service = { 0 };
+ 	struct mm_service_interface *smm_var_service_interface = NULL;
+@@ -42,7 +42,7 @@ void __noreturn sp_main(struct ffa_init_info *init_info)
+ 	config_ramstore_init();
+ 	sp_config_load(init_info);
+ 
+-	if (!config_store_query(CONFIG_CLASSIFIER_MEMORY_REGION, CONFIG_NAME_MM_COMM_BUFFER_REGION,
+	if (!config_store_query(CONFIG_CLASSIFIER_DEVICE_REGION, CONFIG_NAME_MM_COMM_BUFFER_REGION,
+ 				0, &mm_comm_buffer_region, sizeof(mm_comm_buffer_region))) {
+ 		EMSG(CONFIG_NAME_MM_COMM_BUFFER_REGION " is not set in SP configuration");
+ 		goto fatal_error;
+@@ -57,7 +57,7 @@ void __noreturn sp_main(struct ffa_init_info *init_info)
+ 	/* Initialize MM communication layer */
+ 	if (!mm_communicate_call_ep_init(&mm_communicate_call_ep,
+ 					 (void *)mm_comm_buffer_region.base_addr,
+-					 mm_comm_buffer_region.region_size))
+					 mm_comm_buffer_region.io_region_size))
+ 		goto fatal_error;
+ 
+ 	/* Attach SMM variable service to MM communication layer */
+-- 
+2.25.1
+
@@ -0,0 +1,253 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+From 8e25c9b4617dcbb5800b25ace93371d9bcd68e61 Mon Sep 17 00:00:00 2001
+From: Vishnu Banavath <vishnu.banavath@arm.com>
+Date: Fri, 3 Dec 2021 16:36:51 +0000
+Subject: [PATCH] Add openamp to SE proxy deployment
+
+Openamp is required to communicate between secure partitions(running on
+Cortex-A) and trusted-firmware-m(running on Cortex-M).
+These changes are to fetch libmetal and openamp from github repo's
+and build it.
+
+Signed-off-by: Rui Miguel Silva <rui.silva@arm.com>
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+%% original patch: 0007-Add-openamp-to-SE-proxy-deployment.patch
+
+diff --git a/deployments/se-proxy/opteesp/CMakeLists.txt b/deployments/se-proxy/opteesp/CMakeLists.txt
+index 4e2069a..248bd7e 100644
+--- a/deployments/se-proxy/opteesp/CMakeLists.txt
+++ b/deployments/se-proxy/opteesp/CMakeLists.txt
+@@ -89,6 +89,7 @@ add_components(TARGET "se-proxy"
+ target_sources(se-proxy PRIVATE
+ 	se_proxy_sp.c
+ 	service_proxy_factory.c
+	lse.S
+ )
+ 
+ #-------------------------------------------------------------------------------
+@@ -108,6 +109,19 @@ include(../../../external/nanopb/nanopb.cmake)
+ target_link_libraries(se-proxy PRIVATE nanopb::protobuf-nanopb-static)
+ protobuf_generate_all(TGT "se-proxy" NAMESPACE "protobuf" BASE_DIR "${TS_ROOT}/protocols")
+ 
+# libmetal
+list(APPEND LIBMETAL_EXTERNAL_INCLUDE_PATHS ${SP_DEV_KIT_INCLUDE_DIR})
+set(LIBMETAL_EXTRA_INCLUDE_PATHS ${LIBMETAL_EXTRA_INCLUDE_PATHS}
+	CACHE STRING "" FORCE)
+include(../../../external/openamp/libmetal.cmake)
+
+# OpenAMP
+list(APPEND OPENAMP_EXTERNAL_INCLUDE_PATHS ${SP_DEV_KIT_INCLUDE_DIR})
+set(OPENAMP_EXTRA_INCLUDE_PATHS ${OPENAMP_EXTRA_INCLUDE_PATHS}
+	CACHE STRING "" FORCE)
+include(../../../external/openamp/openamp.cmake)
+target_link_libraries(se-proxy PRIVATE openamp libmetal)
+
+ #################################################################
+ 
+ target_compile_definitions(se-proxy PRIVATE
+diff --git a/deployments/se-proxy/opteesp/lse.S b/deployments/se-proxy/opteesp/lse.S
+new file mode 100644
+index 0000000..840683a
+--- /dev/null
+++ b/deployments/se-proxy/opteesp/lse.S
+@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
+ */
+
+.text
+.globl __aarch64_cas4_acq_rel
+
+__aarch64_cas4_acq_rel:
+	mov	w16, w0
+	ldaxr	w0, [x2]
+	cmp	w0, w16
+0:	bne	1f
+
+	stlxr	w17, w1, [x2]
+	cbnz	w17, 0b
+1:	ret
+
+
+diff --git a/external/openamp/libmetal.cmake b/external/openamp/libmetal.cmake
+new file mode 100644
+index 0000000..3a647e6
+--- /dev/null
+++ b/external/openamp/libmetal.cmake
+@@ -0,0 +1,81 @@
+#-------------------------------------------------------------------------------
+# Copyright (c) 2021 Linaro Limited
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+#-------------------------------------------------------------------------------
+
+set (LIBMETAL_URL "https://github.com/OpenAMP/libmetal.git" CACHE STRING "libmetal repository URL")
+set (LIBMETAL_INSTALL_PATH "${CMAKE_CURRENT_BINARY_DIR}/libmetal_install" CACHE PATH "libmetal installation directory")
+set (LIBMETAL_PACKAGE_PATH "${LIBMETAL_INSTALL_PATH}/libmetal/cmake" CACHE PATH "libmetal CMake package directory")
+set (LIBMETAL_TARGET_NAME "libmetal")
+set (LIBMETAL_VERSION "f252f0e007fbfb8b3a52b1d5901250ddac96baad"  CACHE STRING "The version of libmetal to use")
+
+if(NOT LIBMETAL_DEBUG)
+	set(LIBMETAL_BUILD_TYPE "Release")
+else()
+	set(LIBMETAL_BUILD_TYPE "Debug")
+endif()
+
+include(FetchContent)
+
+# Checking git
+find_program(GIT_COMMAND "git")
+if (NOT GIT_COMMAND)
+	message(FATAL_ERROR "Please install git")
+endif()
+
+FetchContent_Declare(
+	libmetal
+	GIT_REPOSITORY ${LIBMETAL_URL}
+	GIT_TAG ${LIBMETAL_VERSION}
+)
+
+# FetchContent_GetProperties exports libmetal_SOURCE_DIR and libmetal_BINARY_DIR variables
+FetchContent_GetProperties(libmetal)
+if(NOT libmetal_POPULATED)
+	message(STATUS "Fetching libmetal")
+	FetchContent_Populate(libmetal)
+endif()
+
+# Ensure list of include paths is separated correctly
+string(REPLACE ";" "\\;" LIBMETAL_EXTERNAL_INCLUDE_PATHS "${LIBMETAL_EXTERNAL_INCLUDE_PATHS}")
+
+#Configure the library
+execute_process(COMMAND
+	${CMAKE_COMMAND}
+			-DCMAKE_BUILD_TYPE=${LIBMETAL_BUILD_TYPE}
+			-DCMAKE_C_COMPILER=${CMAKE_C_COMPILER}
+			-DCMAKE_C_COMPILER_ID=${CMAKE_C_COMPILER_ID}
+			-DCMAKE_TOOLCHAIN_FILE=${TS_EXTERNAL_LIB_TOOLCHAIN_FILE}
+			-DCMAKE_INSTALL_PREFIX=${LIBMETAL_INSTALL_PATH}
+			-DCMAKE_C_FLAGS_DEBUG=${CMAKE_C_FLAGS_DEBUG}
+			-DCMAKE_C_FLAGS=${CMAKE_C_FLAGS}
+			-DCMAKE_C_OUTPUT_EXTENSION=.o
+			-DCMAKE_C_COMPILER_WORKS=true
+			-DCMAKE_SYSTEM_PROCESSOR=arm
+			-DWITH_DOC=off
+			-DWITH_TESTS=off
+			-DWITH_EXAMPLES=off
+			-DWITH_DEFAULT_LOGGER=off
+			-DEXTERNAL_INCLUDE_PATHS=${LIBMETAL_EXTERNAL_INCLUDE_PATHS}
+			-DMACHINE=template
+			${libmetal_SOURCE_DIR}
+	WORKING_DIRECTORY
+			${libmetal_BINARY_DIR}
+)
+
+# Build the library
+execute_process(COMMAND
+    ${CMAKE_COMMAND} --build ${libmetal_BINARY_DIR} -- install
+		RESULT_VARIABLE _exec_error
+	)
+if (_exec_error)
+	message(FATAL_ERROR "Build step of libmetal failed with ${_exec_error}.")
+endif()
+
+#Create an imported target to have clean abstraction in the build-system.
+add_library(libmetal STATIC IMPORTED)
+set_property(TARGET libmetal PROPERTY IMPORTED_LOCATION "${LIBMETAL_INSTALL_PATH}/lib/${CMAKE_STATIC_LIBRARY_PREFIX}metal${CMAKE_STATIC_LIBRARY_SUFFIX}")
+set_property(TARGET libmetal PROPERTY INTERFACE_INCLUDE_DIRECTORIES "${LIBMETAL_INSTALL_PATH}/include")
+diff --git a/external/openamp/openamp.cmake b/external/openamp/openamp.cmake
+new file mode 100644
+index 0000000..aae13ba
+--- /dev/null
+++ b/external/openamp/openamp.cmake
+@@ -0,0 +1,82 @@
+#-------------------------------------------------------------------------------
+# Copyright (c) 2021 Linaro Limited
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+#-------------------------------------------------------------------------------
+
+set (OPENAMP_URL "https://github.com/OpenAMP/open-amp.git" CACHE STRING "OpenAMP repository URL")
+set (OPENAMP_INSTALL_PATH "${CMAKE_CURRENT_BINARY_DIR}/openamp_install" CACHE PATH "OpenAMP installation directory")
+set (OPENAMP_PACKAGE_PATH "${OPENAMP_INSTALL_PATH}/openamp/cmake" CACHE PATH "OpenAMP CMake package directory")
+set (OPENAMP_TARGET_NAME "openamp")
+set (OPENAMP_VERSION "347397decaa43372fc4d00f965640ebde042966d"  CACHE STRING "The version of openamp to use")
+
+
+if(NOT OPENAMP_DEBUG)
+	set(OPENAMP_BUILD_TYPE "Release")
+else()
+	set(OPENAMP_BUILD_TYPE "Debug")
+endif()
+
+include(FetchContent)
+
+# Checking git
+find_program(GIT_COMMAND "git")
+if (NOT GIT_COMMAND)
+	message(FATAL_ERROR "Please install git")
+endif()
+
+FetchContent_Declare(
+	openamp
+	GIT_REPOSITORY ${OPENAMP_URL}
+	GIT_TAG ${OPENAMP_VERSION}
+)
+
+# FetchContent_GetProperties exports openamp_SOURCE_DIR and openamp_BINARY_DIR variables
+FetchContent_GetProperties(openamp)
+if(NOT openamp_POPULATED)
+	message(STATUS "Fetching openamp")
+	FetchContent_Populate(openamp)
+endif()
+
+# Ensure list of include paths is separated correctly
+get_target_property(_libmetal_inc libmetal INTERFACE_INCLUDE_DIRECTORIES)
+set (_openam_external_include_paths ${_libmetal_inc} ${OPENAMP_EXTERNAL_INCLUDE_PATHS})
+string(REPLACE ";" "\\;" OPENAMP_EXTERNAL_INCLUDE_PATHS "${_openam_external_include_paths}")
+
+#Configure the library
+execute_process(COMMAND
+	${CMAKE_COMMAND}
+			-DCMAKE_BUILD_TYPE=${OPENAMP_BUILD_TYPE}
+			-DCMAKE_C_COMPILER=${CMAKE_C_COMPILER}
+			-DCMAKE_C_COMPILER_ID=${CMAKE_C_COMPILER_ID}
+			-DCMAKE_TOOLCHAIN_FILE=${TS_EXTERNAL_LIB_TOOLCHAIN_FILE}
+			-DCMAKE_INSTALL_PREFIX=${OPENAMP_INSTALL_PATH}
+			-DCMAKE_C_FLAGS_DEBUG=${CMAKE_C_FLAGS_DEBUG}
+			-DLIBMETAL_INCLUDE_DIR=${CMAKE_CURRENT_BINARY_DIR}/libmetal/lib/include
+			-DLIBMETAL_LIB=${CMAKE_CURRENT_BINARY_DIR}/libmetal/lib
+			-DCMAKE_C_OUTPUT_EXTENSION=.o
+			-DCMAKE_C_COMPILER_WORKS=true
+			-DCMAKE_SYSTEM_PROCESSOR=arm
+			-DEXTERNAL_INCLUDE_PATHS=${OPENAMP_EXTERNAL_INCLUDE_PATHS}
+			-DMACHINE=template
+			-DRPMSG_BUFFER_SIZE=512
+			${openamp_SOURCE_DIR}
+	WORKING_DIRECTORY
+			${openamp_BINARY_DIR}
+)
+
+# Build the library
+execute_process(COMMAND
+    ${CMAKE_COMMAND} --build ${openamp_BINARY_DIR} -- install
+		RESULT_VARIABLE _exec_error
+	)
+if (_exec_error)
+	message(FATAL_ERROR "Build step of OpenAMP failed with ${_exec_error}.")
+endif()
+
+#Create an imported target to have clean abstraction in the build-system.
+add_library(openamp STATIC IMPORTED)
+set_property(TARGET openamp PROPERTY IMPORTED_LOCATION "${OPENAMP_INSTALL_PATH}/lib/${CMAKE_STATIC_LIBRARY_PREFIX}open_amp${CMAKE_STATIC_LIBRARY_SUFFIX}")
+set_property(TARGET openamp PROPERTY INTERFACE_INCLUDE_DIRECTORIES "${OPENAMP_INSTALL_PATH}/include")
+-- 
+2.25.1
+
@@ -0,0 +1,296 @@
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+From 0f32eaab3c1c5ef534139474b0453916bc4d8b63 Mon Sep 17 00:00:00 2001
+From: Vishnu Banavath <vishnu.banavath@arm.com>
+Date: Fri, 3 Dec 2021 19:05:18 +0000
+Subject: [PATCH] add psa client definitions for ff-m
+
+Add PSA client definitions in common include to add future
+ff-m support.
+
+Signed-off-by: Rui Miguel Silva <rui.silva@arm.com>
+Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
+
+%% original patch: 0010-add-psa-client-definitions-for-ff-m.patch
+
+diff --git a/components/service/common/include/psa/client.h b/components/service/common/include/psa/client.h
+new file mode 100644
+index 0000000..69ccf14
+--- /dev/null
+++ b/components/service/common/include/psa/client.h
+@@ -0,0 +1,194 @@
+/*
+ * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef SERVICE_PSA_IPC_H
+#define SERVICE_PSA_IPC_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include <rpc_caller.h>
+#include <psa/error.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef IOVEC_LEN
+#define IOVEC_LEN(arr) ((uint32_t)(sizeof(arr)/sizeof(arr[0])))
+#endif
+
+/*********************** PSA Client Macros and Types *************************/
+
+typedef int32_t psa_handle_t;
+
+/**
+ * The version of the PSA Framework API that is being used to build the calling
+ * firmware. Only part of features of FF-M v1.1 have been implemented. FF-M v1.1
+ * is compatible with v1.0.
+ */
+#define PSA_FRAMEWORK_VERSION       (0x0101u)
+
+/**
+ * Return value from psa_version() if the requested RoT Service is not present
+ * in the system.
+ */
+#define PSA_VERSION_NONE            (0u)
+
+/**
+ * The zero-value null handle can be assigned to variables used in clients and
+ * RoT Services, indicating that there is no current connection or message.
+ */
+#define PSA_NULL_HANDLE             ((psa_handle_t)0)
+
+/**
+ * Tests whether a handle value returned by psa_connect() is valid.
+ */
+#define PSA_HANDLE_IS_VALID(handle) ((psa_handle_t)(handle) > 0)
+
+/**
+ * Converts the handle value returned from a failed call psa_connect() into
+ * an error code.
+ */
+#define PSA_HANDLE_TO_ERROR(handle) ((psa_status_t)(handle))
+
+/**
+ * Maximum number of input and output vectors for a request to psa_call().
+ */
+#define PSA_MAX_IOVEC               (4u)
+
+/**
+ * An IPC message type that indicates a generic client request.
+ */
+#define PSA_IPC_CALL                (0)
+
+/**
+ * A read-only input memory region provided to an RoT Service.
+ */
+struct __attribute__ ((__packed__)) psa_invec {
+    uint32_t base;           /*!< the start address of the memory buffer */
+    uint32_t len;                 /*!< the size in bytes                      */
+};
+
+/**
+ * A writable output memory region provided to an RoT Service.
+ */
+struct __attribute__ ((__packed__)) psa_outvec {
+    uint32_t base;                 /*!< the start address of the memory buffer */
+    uint32_t len;                 /*!< the size in bytes                      */
+};
+
+/*************************** PSA Client API **********************************/
+
+/**
+ * \brief Retrieve the version of the PSA Framework API that is implemented.
+ *
+ * \param[in] rpc_caller        RPC caller to use
+ * \return version              The version of the PSA Framework implementation
+ *                              that is providing the runtime services to the
+ *                              caller. The major and minor version are encoded
+ *                              as follows:
+ * \arg                           version[15:8] -- major version number.
+ * \arg                           version[7:0]  -- minor version number.
+ */
+uint32_t psa_framework_version(struct rpc_caller *caller);
+
+/**
+ * \brief Retrieve the version of an RoT Service or indicate that it is not
+ *        present on this system.
+ *
+ * \param[in] rpc_caller        RPC caller to use
+ * \param[in] sid               ID of the RoT Service to query.
+ *
+ * \retval PSA_VERSION_NONE     The RoT Service is not implemented, or the
+ *                              caller is not permitted to access the service.
+ * \retval > 0                  The version of the implemented RoT Service.
+ */
+uint32_t psa_version(struct rpc_caller *caller, uint32_t sid);
+
+/**
+ * \brief Connect to an RoT Service by its SID.
+ *
+ * \param[in] rpc_caller        RPC caller to use
+ * \param[in] sid               ID of the RoT Service to connect to.
+ * \param[in] version           Requested version of the RoT Service.
+ *
+ * \retval > 0                  A handle for the connection.
+ * \retval PSA_ERROR_CONNECTION_REFUSED The SPM or RoT Service has refused the
+ *                              connection.
+ * \retval PSA_ERROR_CONNECTION_BUSY The SPM or RoT Service cannot make the
+ *                              connection at the moment.
+ * \retval "PROGRAMMER ERROR"   The call is a PROGRAMMER ERROR if one or more
+ *                              of the following are true:
+ * \arg                           The RoT Service ID is not present.
+ * \arg                           The RoT Service version is not supported.
+ * \arg                           The caller is not allowed to access the RoT
+ *                                service.
+ */
+psa_handle_t psa_connect(struct rpc_caller *caller, uint32_t sid,
+			 uint32_t version);
+
+/**
+ * \brief Call an RoT Service on an established connection.
+ *
+ * \note  FF-M 1.0 proposes 6 parameters for psa_call but the secure gateway ABI
+ *        support at most 4 parameters. TF-M chooses to encode 'in_len',
+ *        'out_len', and 'type' into a 32-bit integer to improve efficiency.
+ *        Compared with struct-based encoding, this method saves extra memory
+ *        check and memory copy operation. The disadvantage is that the 'type'
+ *        range has to be reduced into a 16-bit integer. So with this encoding,
+ *        the valid range for 'type' is 0-32767.
+ *
+ * \param[in] rpc_caller        RPC caller to use
+ * \param[in] handle            A handle to an established connection.
+ * \param[in] type              The request type.
+ *                              Must be zero( \ref PSA_IPC_CALL) or positive.
+ * \param[in] in_vec            Array of input \ref psa_invec structures.
+ * \param[in] in_len            Number of input \ref psa_invec structures.
+ * \param[in,out] out_vec       Array of output \ref psa_outvec structures.
+ * \param[in] out_len           Number of output \ref psa_outvec structures.
+ *
+ * \retval >=0                  RoT Service-specific status value.
+ * \retval <0                   RoT Service-specific error code.
+ * \retval PSA_ERROR_PROGRAMMER_ERROR The connection has been terminated by the
+ *                              RoT Service. The call is a PROGRAMMER ERROR if
+ *                              one or more of the following are true:
+ * \arg                           An invalid handle was passed.
+ * \arg                           The connection is already handling a request.
+ * \arg                           type < 0.
+ * \arg                           An invalid memory reference was provided.
+ * \arg                           in_len + out_len > PSA_MAX_IOVEC.
+ * \arg                           The message is unrecognized by the RoT
+ *                                Service or incorrectly formatted.
+ */
+psa_status_t psa_call(struct rpc_caller *caller, psa_handle_t handle,
+		      int32_t type, const struct psa_invec *in_vec,
+		      size_t in_len, struct psa_outvec *out_vec, size_t out_len);
+
+/**
+ * \brief Close a connection to an RoT Service.
+ *
+ * \param[in] rpc_caller        RPC caller to use
+ * \param[in] handle            A handle to an established connection, or the
+ *                              null handle.
+ *
+ * \retval void                 Success.
+ * \retval "PROGRAMMER ERROR"   The call is a PROGRAMMER ERROR if one or more
+ *                              of the following are true:
+ * \arg                           An invalid handle was provided that is not
+ *                                the null handle.
+ * \arg                           The connection is currently handling a
+ *                                request.
+ */
+void psa_close(struct rpc_caller *caller, psa_handle_t handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SERVICE_PSA_IPC_H */
+
+
+diff --git a/components/service/common/include/psa/sid.h b/components/service/common/include/psa/sid.h
+new file mode 100644
+index 0000000..aaa973c
+--- /dev/null
+++ b/components/service/common/include/psa/sid.h
+@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef __PSA_MANIFEST_SID_H__
+#define __PSA_MANIFEST_SID_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******** TFM_SP_PS ********/
+#define TFM_PROTECTED_STORAGE_SERVICE_SID                          (0x00000060U)
+#define TFM_PROTECTED_STORAGE_SERVICE_VERSION                      (1U)
+#define TFM_PROTECTED_STORAGE_SERVICE_HANDLE                       (0x40000101U)
+
+/* Invalid UID */
+#define TFM_PS_INVALID_UID 0
+
+/* PS message types that distinguish PS services. */
+#define TFM_PS_SET                1001
+#define TFM_PS_GET                1002
+#define TFM_PS_GET_INFO           1003
+#define TFM_PS_REMOVE             1004
+#define TFM_PS_GET_SUPPORT        1005
+
+/******** TFM_SP_ITS ********/
+#define TFM_INTERNAL_TRUSTED_STORAGE_SERVICE_SID                   (0x00000070U)
+#define TFM_INTERNAL_TRUSTED_STORAGE_SERVICE_VERSION               (1U)
+#define TFM_INTERNAL_TRUSTED_STORAGE_SERVICE_HANDLE                (0x40000102U)
+
+/******** TFM_SP_CRYPTO ********/
+#define TFM_CRYPTO_SID                                             (0x00000080U)
+#define TFM_CRYPTO_VERSION                                         (1U)
+#define TFM_CRYPTO_HANDLE                                          (0x40000100U)
+
+/******** TFM_SP_PLATFORM ********/
+#define TFM_SP_PLATFORM_SYSTEM_RESET_SID                           (0x00000040U)
+#define TFM_SP_PLATFORM_SYSTEM_RESET_VERSION                       (1U)
+#define TFM_SP_PLATFORM_IOCTL_SID                                  (0x00000041U)
+#define TFM_SP_PLATFORM_IOCTL_VERSION                              (1U)
+#define TFM_SP_PLATFORM_NV_COUNTER_SID                             (0x00000042U)
+#define TFM_SP_PLATFORM_NV_COUNTER_VERSION                         (1U)
+
+/******** TFM_SP_INITIAL_ATTESTATION ********/
+#define TFM_ATTESTATION_SERVICE_SID                                (0x00000020U)
+#define TFM_ATTESTATION_SERVICE_VERSION                            (1U)
+#define TFM_ATTESTATION_SERVICE_HANDLE                             (0x40000103U)
+
+/******** TFM_SP_FWU ********/
+#define TFM_FWU_WRITE_SID                                          (0x000000A0U)
+#define TFM_FWU_WRITE_VERSION                                      (1U)
+#define TFM_FWU_INSTALL_SID                                        (0x000000A1U)
+#define TFM_FWU_INSTALL_VERSION                                    (1U)
+#define TFM_FWU_ABORT_SID                                          (0x000000A2U)
+#define TFM_FWU_ABORT_VERSION                                      (1U)
+#define TFM_FWU_QUERY_SID                                          (0x000000A3U)
+#define TFM_FWU_QUERY_VERSION                                      (1U)
+#define TFM_FWU_REQUEST_REBOOT_SID                                 (0x000000A4U)
+#define TFM_FWU_REQUEST_REBOOT_VERSION                             (1U)
+#define TFM_FWU_ACCEPT_SID                                         (0x000000A5U)
+#define TFM_FWU_ACCEPT_VERSION                                     (1U)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PSA_MANIFEST_SID_H__ */
+-- 
+2.25.1
+
--- a/Show More
+++ b/Show More