mirror of
https://git.yoctoproject.org/meta-arm
synced 2026-07-18 16:37:08 +00:00
Compare commits
17 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
 Ross Burton
|
81aca85a14 | ||
 Jon Mason
|
e9a01cec80 | ||
 Vishnu Banavath
|
2b0650573b | ||
|
Jon Mason
|
9bf77afada | ||
|
Ross Burton
|
5a2c82fe06 | ||
|
Ross Burton
|
6cc23cbee1 | ||
|
Ross Burton
|
2623e69db3 | ||
|
Ross Burton
|
952e04cd58 | ||
|
Ross Burton
|
4b8aeb6edc | ||
|
Ross Burton
|
0ffbe558a0 | ||
|
Ross Burton
|
5920774ada | ||
|
Ross Burton
|
55453024ee | ||
|
Ross Burton
|
c72527d6a5 | ||
|
Ross Burton
|
cc1c99f537 | ||
 Harry Moulton
|
0ea4b2220f | ||
 Emekcan Aras
|
2de4b3c893 | ||
 Satish Kumar
|
142ec9b8f9 |
+1
-1
@@ -1,4 +1,4 @@
|
||||
image: ghcr.io/siemens/kas/kas:latest-release
|
||||
image: ghcr.io/siemens/kas/kas:3.2
|
||||
|
||||
stages:
|
||||
- prep
|
||||
|
||||
@@ -10,3 +10,4 @@ local_conf_header:
|
||||
INITRAMFS_IMAGE:remove = "corstone1000-initramfs-image"
|
||||
|
||||
machine: corstone1000-fvp
|
||||
|
||||
|
||||
@@ -6,11 +6,18 @@ header:
|
||||
repos:
|
||||
run-scripts:
|
||||
url: https://git.gitlab.arm.com/arm-reference-solutions/model-scripts.git
|
||||
refspec: 7ad7b6f33bbdb7ae10c7ecfd56820c03a71e9bdf
|
||||
refspec: b40b4227fe6b6fc8e4b688db8928f4be76e94eb7
|
||||
layers:
|
||||
.: 'excluded'
|
||||
|
||||
machine: corstone1000-fvp
|
||||
|
||||
local_conf_header:
|
||||
fvp-config: |
|
||||
# Remove Dropbear SSH as it will not fit into the corstone1000 image.
|
||||
IMAGE_FEATURES:remove = " ssh-server-dropbear"
|
||||
INHERIT = " ${@bb.utils.contains('BUILD_ARCH', 'x86_64', 'fvpboot', '', d)}"
|
||||
LICENSE_FLAGS_WHITELIST:append = " Arm-FVP-EULA"
|
||||
|
||||
target:
|
||||
- corstone1000-image
|
||||
|
||||
@@ -1,9 +1,41 @@
|
||||
#@TYPE: Machine
|
||||
#@NAME: corstone1000-fvp machine
|
||||
#@DESCRIPTION: Machine configuration for Corstone1000 64-bit FVP
|
||||
|
||||
require conf/machine/include/corstone1000.inc
|
||||
|
||||
TFA_TARGET_PLATFORM = "fvp"
|
||||
|
||||
TFM_PLATFORM_IS_FVP = "TRUE"
|
||||
|
||||
# testimage config
|
||||
TEST_TARGET = "OEFVPTarget"
|
||||
TEST_SUITES = "noop"
|
||||
|
||||
# FVP Config
|
||||
FVP_PROVIDER ?= "fvp-corstone1000-native"
|
||||
FVP_EXE ?= "FVP_Corstone-1000"
|
||||
FVP_CONSOLE ?= "host_terminal_0"
|
||||
|
||||
# FVP Parameters
|
||||
FVP_CONFIG[se.trustedBootROMloader.fname] ?= "${DEPLOY_DIR_IMAGE}/bl1.bin"
|
||||
FVP_CONFIG[board.xnvm_size] ?= "64"
|
||||
FVP_CONFIG[se.trustedSRAM_config] ?= "6"
|
||||
FVP_CONFIG[se.BootROM_config] ?= "3"
|
||||
FVP_CONFIG[board.hostbridge.interfaceName] ?= "tap0"
|
||||
FVP_CONFIG[board.smsc_91c111.enabled] ?= "1"
|
||||
FVP_CONFIG[board.hostbridge.userNetworking] ?= "true"
|
||||
FVP_CONFIG[board.hostbridge.userNetPorts] ?= "5555=5555,8080=80,8022=22"
|
||||
FVP_CONFIG[board.se_flash_size] ?= "8192"
|
||||
FVP_CONFIG[diagnostics] ?= "4"
|
||||
FVP_CONFIG[disable_visualisation] ?= "true"
|
||||
FVP_CONFIG[se.nvm.update_raw_image] ?= "0"
|
||||
|
||||
# Boot image
|
||||
FVP_DATA ?= "board.flash0=${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.wic.nopt@0x68100000"
|
||||
|
||||
# FVP Terminals
|
||||
FVP_TERMINALS[host.host_terminal_0] ?= "Normal World Console"
|
||||
FVP_TERMINALS[host.host_terminal_1] ?= "Secure World Console"
|
||||
FVP_TERMINALS[se.secenc_terminal] ?= "Secure Enclave Console"
|
||||
FVP_TERMINALS[extsys0.extsys_terminal] ?= "Cortex M3"
|
||||
|
||||
|
||||
@@ -4,7 +4,7 @@ MACHINEOVERRIDES =. "corstone1000:"
|
||||
|
||||
# TF-A
|
||||
TFA_PLATFORM = "corstone1000"
|
||||
PREFERRED_VERSION_trusted-firmware-a ?= "2.5%"
|
||||
PREFERRED_VERSION_trusted-firmware-a ?= "2.6%"
|
||||
EXTRA_IMAGEDEPENDS += "virtual/trusted-firmware-a"
|
||||
|
||||
TFA_BL2_BINARY = "bl2-corstone1000.bin"
|
||||
|
||||
@@ -10,10 +10,10 @@ require conf/machine/include/arm/arch-armv8a.inc
|
||||
|
||||
MACHINE_FEATURES = "usbhost usbgadget alsa screen wifi bluetooth optee pci"
|
||||
|
||||
KERNEL_IMAGETYPE = "Image"
|
||||
KERNEL_IMAGETYPE = "Image.gz"
|
||||
KERNEL_DEVICETREE = "arm/juno.dtb arm/juno-r1.dtb arm/juno-r2.dtb"
|
||||
|
||||
IMAGE_FSTYPES += "tar.bz2 ext4"
|
||||
IMAGE_FSTYPES += "tar.bz2 ext4 cpio.gz"
|
||||
|
||||
SERIAL_CONSOLES = "115200;ttyAMA0"
|
||||
|
||||
@@ -27,3 +27,6 @@ EXTRA_IMAGEDEPENDS += "virtual/trusted-firmware-a u-boot firmware-image-juno"
|
||||
|
||||
# Juno u-boot configuration
|
||||
UBOOT_MACHINE = "vexpress_aemv8a_juno_defconfig"
|
||||
|
||||
INITRAMFS_IMAGE_BUNDLE ?= "1"
|
||||
INITRAMFS_IMAGE = "core-image-minimal"
|
||||
|
||||
@@ -62,7 +62,7 @@ do_deploy() {
|
||||
done
|
||||
|
||||
if [ "${INITRAMFS_IMAGE_BUNDLE}" -eq 1 ]; then
|
||||
cp -L -f ${DEPLOY_DIR_IMAGE}/Image-initramfs-juno.bin \
|
||||
cp -L -f ${DEPLOY_DIR_IMAGE}/Image.gz-initramfs-juno.bin \
|
||||
${D}/${UNPACK_DIR}/SOFTWARE/Image
|
||||
else
|
||||
cp -L -f ${DEPLOY_DIR_IMAGE}/Image ${D}/${UNPACK_DIR}/SOFTWARE/
|
||||
|
||||
-587
@@ -1,587 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
|
||||
|
||||
From b4d59c85d1045998275cd219efe5849803c2c616 Mon Sep 17 00:00:00 2001
|
||||
From: "Arpita S.K" <Arpita.S.K@arm.com>
|
||||
Date: Wed, 13 Oct 2021 18:05:11 +0530
|
||||
Subject: [PATCH] Rename Diphda to corstone1000
|
||||
|
||||
Replace all the instances of Diphda as functions,
|
||||
macros etc. with corstone1000
|
||||
|
||||
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
|
||||
---
|
||||
docs/about/maintainers.rst | 2 +-
|
||||
.../arm/{diphda => corstone1000}/index.rst | 6 +-
|
||||
docs/plat/arm/index.rst | 2 +-
|
||||
plat/arm/board/common/rotpk/arm_dev_rotpk.S | 2 +-
|
||||
.../corstone1000_bl2_mem_params_desc.c} | 8 +-
|
||||
.../common/corstone1000_err.c} | 2 +-
|
||||
.../common/corstone1000_helpers.S} | 4 +-
|
||||
.../common/corstone1000_plat.c} | 6 +-
|
||||
.../common/corstone1000_pm.c} | 0
|
||||
.../common/corstone1000_security.c} | 0
|
||||
.../common/corstone1000_stack_protector.c} | 0
|
||||
.../common/corstone1000_topology.c} | 12 +--
|
||||
.../common/corstone1000_trusted_boot.c} | 2 +-
|
||||
.../fdts/corstone1000_spmc_manifest.dts} | 0
|
||||
.../common/include/platform_def.h | 52 ++++++------
|
||||
.../include/plat_macros.S | 0
|
||||
plat/arm/board/corstone1000/platform.mk | 83 +++++++++++++++++++
|
||||
plat/arm/board/diphda/platform.mk | 83 -------------------
|
||||
18 files changed, 132 insertions(+), 132 deletions(-)
|
||||
rename docs/plat/arm/{diphda => corstone1000}/index.rst (93%)
|
||||
rename plat/arm/board/{diphda/common/diphda_bl2_mem_params_desc.c => corstone1000/common/corstone1000_bl2_mem_params_desc.c} (92%)
|
||||
rename plat/arm/board/{diphda/common/diphda_err.c => corstone1000/common/corstone1000_err.c} (89%)
|
||||
rename plat/arm/board/{diphda/common/diphda_helpers.S => corstone1000/common/corstone1000_helpers.S} (94%)
|
||||
rename plat/arm/board/{diphda/common/diphda_plat.c => corstone1000/common/corstone1000_plat.c} (92%)
|
||||
rename plat/arm/board/{diphda/common/diphda_pm.c => corstone1000/common/corstone1000_pm.c} (100%)
|
||||
rename plat/arm/board/{diphda/common/diphda_security.c => corstone1000/common/corstone1000_security.c} (100%)
|
||||
rename plat/arm/board/{diphda/common/diphda_stack_protector.c => corstone1000/common/corstone1000_stack_protector.c} (100%)
|
||||
rename plat/arm/board/{diphda/common/diphda_topology.c => corstone1000/common/corstone1000_topology.c} (77%)
|
||||
rename plat/arm/board/{diphda/common/diphda_trusted_boot.c => corstone1000/common/corstone1000_trusted_boot.c} (97%)
|
||||
rename plat/arm/board/{diphda/common/fdts/diphda_spmc_manifest.dts => corstone1000/common/fdts/corstone1000_spmc_manifest.dts} (100%)
|
||||
rename plat/arm/board/{diphda => corstone1000}/common/include/platform_def.h (89%)
|
||||
rename plat/arm/board/{diphda => corstone1000}/include/plat_macros.S (100%)
|
||||
create mode 100644 plat/arm/board/corstone1000/platform.mk
|
||||
delete mode 100644 plat/arm/board/diphda/platform.mk
|
||||
|
||||
diff --git a/docs/about/maintainers.rst b/docs/about/maintainers.rst
|
||||
index 07f258c774..2d9eb1440d 100644
|
||||
--- a/docs/about/maintainers.rst
|
||||
+++ b/docs/about/maintainers.rst
|
||||
@@ -399,7 +399,7 @@ Arm Rich IoT Platform ports
|
||||
:|G|: `vishnu-banavath`_
|
||||
:|F|: plat/arm/board/corstone700
|
||||
:|F|: plat/arm/board/a5ds
|
||||
-:|F|: plat/arm/board/diphda
|
||||
+:|F|: plat/arm/board/corstone1000
|
||||
|
||||
Arm Reference Design platform ports
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
diff --git a/docs/plat/arm/diphda/index.rst b/docs/plat/arm/corstone1000/index.rst
|
||||
similarity index 93%
|
||||
rename from docs/plat/arm/diphda/index.rst
|
||||
rename to docs/plat/arm/corstone1000/index.rst
|
||||
index 27afda43f5..b889b7f2e9 100644
|
||||
--- a/docs/plat/arm/diphda/index.rst
|
||||
+++ b/docs/plat/arm/corstone1000/index.rst
|
||||
@@ -1,7 +1,7 @@
|
||||
-Diphda Platform
|
||||
+Corstone1000 Platform
|
||||
==========================
|
||||
|
||||
-Some of the features of the Diphda platform referenced in TF-A include:
|
||||
+Some of the features of the Corstone1000 platform referenced in TF-A include:
|
||||
|
||||
- Cortex-A35 application processor (64-bit mode)
|
||||
- Secure Enclave
|
||||
@@ -37,7 +37,7 @@ Build Procedure (TF-A only)
|
||||
CC=aarch64-none-elf-gcc \
|
||||
V=1 \
|
||||
BUILD_BASE=<path to the build folder> \
|
||||
- PLAT=diphda \
|
||||
+ PLAT=corstone1000 \
|
||||
SPD=spmd \
|
||||
SPMD_SPM_AT_SEL2=0 \
|
||||
DEBUG=1 \
|
||||
diff --git a/docs/plat/arm/index.rst b/docs/plat/arm/index.rst
|
||||
index c834f6ae70..23c561ff57 100644
|
||||
--- a/docs/plat/arm/index.rst
|
||||
+++ b/docs/plat/arm/index.rst
|
||||
@@ -12,7 +12,7 @@ Arm Development Platforms
|
||||
arm_fpga/index
|
||||
arm-build-options
|
||||
morello/index
|
||||
- diphda/index
|
||||
+ corstone1000/index
|
||||
|
||||
This chapter holds documentation related to Arm's development platforms,
|
||||
including both software models (FVPs) and hardware development boards
|
||||
diff --git a/plat/arm/board/common/rotpk/arm_dev_rotpk.S b/plat/arm/board/common/rotpk/arm_dev_rotpk.S
|
||||
index 38f91fe5f8..125ddf67c7 100644
|
||||
--- a/plat/arm/board/common/rotpk/arm_dev_rotpk.S
|
||||
+++ b/plat/arm/board/common/rotpk/arm_dev_rotpk.S
|
||||
@@ -4,7 +4,7 @@
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
-/* diphda platform provides custom values for the macros defined in
|
||||
+/* corstone1000 platform provides custom values for the macros defined in
|
||||
* arm_def.h , so only platform_def.h needs to be included
|
||||
*/
|
||||
#if !defined(TARGET_PLATFORM_FVP) && !defined(TARGET_PLATFORM_FPGA)
|
||||
diff --git a/plat/arm/board/diphda/common/diphda_bl2_mem_params_desc.c b/plat/arm/board/corstone1000/common/corstone1000_bl2_mem_params_desc.c
|
||||
similarity index 92%
|
||||
rename from plat/arm/board/diphda/common/diphda_bl2_mem_params_desc.c
|
||||
rename to plat/arm/board/corstone1000/common/corstone1000_bl2_mem_params_desc.c
|
||||
index 916c868d21..7baa82d31b 100644
|
||||
--- a/plat/arm/board/diphda/common/diphda_bl2_mem_params_desc.c
|
||||
+++ b/plat/arm/board/corstone1000/common/corstone1000_bl2_mem_params_desc.c
|
||||
@@ -44,7 +44,7 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
|
||||
SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
|
||||
VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),
|
||||
.ep_info.pc = BL32_BASE,
|
||||
- .ep_info.args.arg0 = DIPHDA_TOS_FW_CONFIG_BASE,
|
||||
+ .ep_info.args.arg0 = CORSTONE1000_TOS_FW_CONFIG_BASE,
|
||||
SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
|
||||
VERSION_2, image_info_t, 0),
|
||||
.image_info.image_base = BL32_BASE,
|
||||
@@ -56,9 +56,9 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
|
||||
/* Fill TOS_FW_CONFIG related information */
|
||||
{
|
||||
.image_id = TOS_FW_CONFIG_ID,
|
||||
- .image_info.image_base = DIPHDA_TOS_FW_CONFIG_BASE,
|
||||
- .image_info.image_max_size = DIPHDA_TOS_FW_CONFIG_LIMIT - \
|
||||
- DIPHDA_TOS_FW_CONFIG_BASE,
|
||||
+ .image_info.image_base = CORSTONE1000_TOS_FW_CONFIG_BASE,
|
||||
+ .image_info.image_max_size = CORSTONE1000_TOS_FW_CONFIG_LIMIT - \
|
||||
+ CORSTONE1000_TOS_FW_CONFIG_BASE,
|
||||
SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
|
||||
VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
|
||||
SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY,
|
||||
diff --git a/plat/arm/board/diphda/common/diphda_err.c b/plat/arm/board/corstone1000/common/corstone1000_err.c
|
||||
similarity index 89%
|
||||
rename from plat/arm/board/diphda/common/diphda_err.c
|
||||
rename to plat/arm/board/corstone1000/common/corstone1000_err.c
|
||||
index 89a3b8249c..5f8e7da437 100644
|
||||
--- a/plat/arm/board/diphda/common/diphda_err.c
|
||||
+++ b/plat/arm/board/corstone1000/common/corstone1000_err.c
|
||||
@@ -7,7 +7,7 @@
|
||||
#include <plat/arm/common/plat_arm.h>
|
||||
|
||||
/*
|
||||
- * diphda error handler
|
||||
+ * corstone1000 error handler
|
||||
*/
|
||||
void __dead2 plat_arm_error_handler(int err)
|
||||
{
|
||||
diff --git a/plat/arm/board/diphda/common/diphda_helpers.S b/plat/arm/board/corstone1000/common/corstone1000_helpers.S
|
||||
similarity index 94%
|
||||
rename from plat/arm/board/diphda/common/diphda_helpers.S
|
||||
rename to plat/arm/board/corstone1000/common/corstone1000_helpers.S
|
||||
index c9d2a88de9..87122270b0 100644
|
||||
--- a/plat/arm/board/diphda/common/diphda_helpers.S
|
||||
+++ b/plat/arm/board/corstone1000/common/corstone1000_helpers.S
|
||||
@@ -29,7 +29,7 @@ endfunc plat_secondary_cold_boot_setup
|
||||
* unsigned long plat_get_my_entrypoint (void);
|
||||
*
|
||||
* Main job of this routine is to distinguish between a cold and warm
|
||||
- * boot. On diphda, this information can be queried from the power
|
||||
+ * boot. On corstone1000, this information can be queried from the power
|
||||
* controller. The Power Control SYS Status Register (PSYSR) indicates
|
||||
* the wake-up reason for the CPU.
|
||||
*
|
||||
@@ -61,7 +61,7 @@ func plat_is_my_cpu_primary
|
||||
mrs x0, mpidr_el1
|
||||
mov_imm x1, MPIDR_AFFINITY_MASK
|
||||
and x0, x0, x1
|
||||
- cmp x0, #DIPHDA_PRIMARY_CPU
|
||||
+ cmp x0, #CORSTONE1000_PRIMARY_CPU
|
||||
cset w0, eq
|
||||
ret
|
||||
endfunc plat_is_my_cpu_primary
|
||||
diff --git a/plat/arm/board/diphda/common/diphda_plat.c b/plat/arm/board/corstone1000/common/corstone1000_plat.c
|
||||
similarity index 92%
|
||||
rename from plat/arm/board/diphda/common/diphda_plat.c
|
||||
rename to plat/arm/board/corstone1000/common/corstone1000_plat.c
|
||||
index 28d15a59e6..7a38b0b2ee 100644
|
||||
--- a/plat/arm/board/diphda/common/diphda_plat.c
|
||||
+++ b/plat/arm/board/corstone1000/common/corstone1000_plat.c
|
||||
@@ -21,12 +21,12 @@ const mmap_region_t plat_arm_mmap[] = {
|
||||
ARM_MAP_SHARED_RAM,
|
||||
ARM_MAP_NS_SHARED_RAM,
|
||||
ARM_MAP_NS_DRAM1,
|
||||
- DIPHDA_MAP_DEVICE,
|
||||
- DIPHDA_EXTERNAL_FLASH,
|
||||
+ CORSTONE1000_MAP_DEVICE,
|
||||
+ CORSTONE1000_EXTERNAL_FLASH,
|
||||
{0}
|
||||
};
|
||||
|
||||
-/* diphda only has one always-on power domain and there
|
||||
+/* corstone1000 only has one always-on power domain and there
|
||||
* is no power control present
|
||||
*/
|
||||
void __init plat_arm_pwrc_setup(void)
|
||||
diff --git a/plat/arm/board/diphda/common/diphda_pm.c b/plat/arm/board/corstone1000/common/corstone1000_pm.c
|
||||
similarity index 100%
|
||||
rename from plat/arm/board/diphda/common/diphda_pm.c
|
||||
rename to plat/arm/board/corstone1000/common/corstone1000_pm.c
|
||||
diff --git a/plat/arm/board/diphda/common/diphda_security.c b/plat/arm/board/corstone1000/common/corstone1000_security.c
|
||||
similarity index 100%
|
||||
rename from plat/arm/board/diphda/common/diphda_security.c
|
||||
rename to plat/arm/board/corstone1000/common/corstone1000_security.c
|
||||
diff --git a/plat/arm/board/diphda/common/diphda_stack_protector.c b/plat/arm/board/corstone1000/common/corstone1000_stack_protector.c
|
||||
similarity index 100%
|
||||
rename from plat/arm/board/diphda/common/diphda_stack_protector.c
|
||||
rename to plat/arm/board/corstone1000/common/corstone1000_stack_protector.c
|
||||
diff --git a/plat/arm/board/diphda/common/diphda_topology.c b/plat/arm/board/corstone1000/common/corstone1000_topology.c
|
||||
similarity index 77%
|
||||
rename from plat/arm/board/diphda/common/diphda_topology.c
|
||||
rename to plat/arm/board/corstone1000/common/corstone1000_topology.c
|
||||
index 9dfd05d091..2a3b6913a1 100644
|
||||
--- a/plat/arm/board/diphda/common/diphda_topology.c
|
||||
+++ b/plat/arm/board/corstone1000/common/corstone1000_topology.c
|
||||
@@ -7,8 +7,8 @@
|
||||
#include <plat/arm/common/plat_arm.h>
|
||||
#include <plat/common/platform.h>
|
||||
|
||||
-/* The diphda power domain tree descriptor */
|
||||
-static unsigned char diphda_power_domain_tree_desc[PLAT_ARM_CLUSTER_COUNT
|
||||
+/* The corstone1000 power domain tree descriptor */
|
||||
+static unsigned char corstone1000_power_domain_tree_desc[PLAT_ARM_CLUSTER_COUNT
|
||||
+ 2];
|
||||
/*******************************************************************************
|
||||
* This function dynamically constructs the topology according to
|
||||
@@ -22,13 +22,13 @@ const unsigned char *plat_get_power_domain_tree_desc(void)
|
||||
* The highest level is the system level. The next level is constituted
|
||||
* by clusters and then cores in clusters.
|
||||
*/
|
||||
- diphda_power_domain_tree_desc[0] = 1;
|
||||
- diphda_power_domain_tree_desc[1] = PLAT_ARM_CLUSTER_COUNT;
|
||||
+ corstone1000_power_domain_tree_desc[0] = 1;
|
||||
+ corstone1000_power_domain_tree_desc[1] = PLAT_ARM_CLUSTER_COUNT;
|
||||
|
||||
for (i = 0; i < PLAT_ARM_CLUSTER_COUNT; i++)
|
||||
- diphda_power_domain_tree_desc[i + 2] = PLATFORM_CORE_COUNT;
|
||||
+ corstone1000_power_domain_tree_desc[i + 2] = PLATFORM_CORE_COUNT;
|
||||
|
||||
- return diphda_power_domain_tree_desc;
|
||||
+ return corstone1000_power_domain_tree_desc;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
diff --git a/plat/arm/board/diphda/common/diphda_trusted_boot.c b/plat/arm/board/corstone1000/common/corstone1000_trusted_boot.c
|
||||
similarity index 97%
|
||||
rename from plat/arm/board/diphda/common/diphda_trusted_boot.c
|
||||
rename to plat/arm/board/corstone1000/common/corstone1000_trusted_boot.c
|
||||
index ddb41faa6b..2e2e9475a5 100644
|
||||
--- a/plat/arm/board/diphda/common/diphda_trusted_boot.c
|
||||
+++ b/plat/arm/board/corstone1000/common/corstone1000_trusted_boot.c
|
||||
@@ -38,7 +38,7 @@ int plat_get_rotpk_info(void *cookie, void **key_ptr, unsigned int *key_len,
|
||||
*/
|
||||
int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr)
|
||||
{
|
||||
- *nv_ctr = DIPHDA_FW_NVCTR_VAL;
|
||||
+ *nv_ctr = CORSTONE1000_FW_NVCTR_VAL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
diff --git a/plat/arm/board/diphda/common/fdts/diphda_spmc_manifest.dts b/plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts
|
||||
similarity index 100%
|
||||
rename from plat/arm/board/diphda/common/fdts/diphda_spmc_manifest.dts
|
||||
rename to plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts
|
||||
diff --git a/plat/arm/board/diphda/common/include/platform_def.h b/plat/arm/board/corstone1000/common/include/platform_def.h
|
||||
similarity index 89%
|
||||
rename from plat/arm/board/diphda/common/include/platform_def.h
|
||||
rename to plat/arm/board/corstone1000/common/include/platform_def.h
|
||||
index 37fd71b6aa..e36bb626ee 100644
|
||||
--- a/plat/arm/board/diphda/common/include/platform_def.h
|
||||
+++ b/plat/arm/board/corstone1000/common/include/platform_def.h
|
||||
@@ -34,17 +34,17 @@
|
||||
#define V2M_IOFPGA_UART0_CLK_IN_HZ 50000000
|
||||
#define V2M_IOFPGA_UART1_CLK_IN_HZ 50000000
|
||||
|
||||
-/* Core/Cluster/Thread counts for diphda */
|
||||
-#define DIPHDA_CLUSTER_COUNT U(1)
|
||||
-#define DIPHDA_MAX_CPUS_PER_CLUSTER U(4)
|
||||
-#define DIPHDA_MAX_PE_PER_CPU U(1)
|
||||
-#define DIPHDA_PRIMARY_CPU U(0)
|
||||
+/* Core/Cluster/Thread counts for corstone1000 */
|
||||
+#define CORSTONE1000_CLUSTER_COUNT U(1)
|
||||
+#define CORSTONE1000_MAX_CPUS_PER_CLUSTER U(4)
|
||||
+#define CORSTONE1000_MAX_PE_PER_CPU U(1)
|
||||
+#define CORSTONE1000_PRIMARY_CPU U(0)
|
||||
|
||||
-#define PLAT_ARM_CLUSTER_COUNT DIPHDA_CLUSTER_COUNT
|
||||
+#define PLAT_ARM_CLUSTER_COUNT CORSTONE1000_CLUSTER_COUNT
|
||||
|
||||
#define PLATFORM_CORE_COUNT (PLAT_ARM_CLUSTER_COUNT * \
|
||||
- DIPHDA_MAX_CPUS_PER_CLUSTER * \
|
||||
- DIPHDA_MAX_PE_PER_CPU)
|
||||
+ CORSTONE1000_MAX_CPUS_PER_CLUSTER * \
|
||||
+ CORSTONE1000_MAX_PE_PER_CPU)
|
||||
|
||||
/* UART related constants */
|
||||
#define PLAT_ARM_BOOT_UART_BASE 0x1a510000
|
||||
@@ -85,7 +85,7 @@
|
||||
*
|
||||
* BL32 (optee-os)
|
||||
*
|
||||
- * <DIPHDA_TOS_FW_CONFIG_BASE> = 0x20ae000
|
||||
+ * <CORSTONE1000_TOS_FW_CONFIG_BASE> = 0x20ae000
|
||||
*
|
||||
* partition size: 8 KB
|
||||
*
|
||||
@@ -132,7 +132,7 @@
|
||||
#define ARM_DRAM1_END (ARM_DRAM1_BASE + \
|
||||
ARM_DRAM1_SIZE - 1)
|
||||
|
||||
-/* DRAM1 and DRAM2 are the same for diphda */
|
||||
+/* DRAM1 and DRAM2 are the same for corstone1000 */
|
||||
#define ARM_DRAM2_BASE ARM_DRAM1_BASE
|
||||
#define ARM_DRAM2_SIZE ARM_DRAM1_SIZE
|
||||
#define ARM_DRAM2_END ARM_DRAM1_END
|
||||
@@ -173,13 +173,13 @@
|
||||
PLAT_ARM_MAX_BL31_SIZE)
|
||||
#define BL31_LIMIT BL2_SIGNATURE_BASE
|
||||
|
||||
-#define DIPHDA_TOS_FW_CONFIG_BASE (BL31_BASE - \
|
||||
- DIPHDA_TOS_FW_CONFIG_SIZE)
|
||||
-#define DIPHDA_TOS_FW_CONFIG_SIZE UL(0x00002000) /* 8 KB */
|
||||
-#define DIPHDA_TOS_FW_CONFIG_LIMIT BL31_BASE
|
||||
+#define CORSTONE1000_TOS_FW_CONFIG_BASE (BL31_BASE - \
|
||||
+ CORSTONE1000_TOS_FW_CONFIG_SIZE)
|
||||
+#define CORSTONE1000_TOS_FW_CONFIG_SIZE UL(0x00002000) /* 8 KB */
|
||||
+#define CORSTONE1000_TOS_FW_CONFIG_LIMIT BL31_BASE
|
||||
|
||||
#define BL32_BASE ARM_BL_RAM_BASE
|
||||
-#define PLAT_ARM_MAX_BL32_SIZE (DIPHDA_TOS_FW_CONFIG_BASE - \
|
||||
+#define PLAT_ARM_MAX_BL32_SIZE (CORSTONE1000_TOS_FW_CONFIG_BASE - \
|
||||
BL32_BASE) /* 688 KB */
|
||||
#define BL32_LIMIT (BL32_BASE + \
|
||||
PLAT_ARM_MAX_BL32_SIZE)
|
||||
@@ -220,7 +220,7 @@
|
||||
/*
|
||||
* Define FW_CONFIG area base and limit. Leave enough space for BL2 meminfo.
|
||||
* FW_CONFIG is intended to host the device tree. Currently, This area is not
|
||||
- * used because diphda platform doesn't use a device tree at TF-A level.
|
||||
+ * used because corstone1000 platform doesn't use a device tree at TF-A level.
|
||||
*/
|
||||
#define ARM_FW_CONFIG_BASE (ARM_SHARED_RAM_BASE \
|
||||
+ sizeof(meminfo_t))
|
||||
@@ -261,8 +261,8 @@
|
||||
|
||||
#define SYS_COUNTER_FREQ_IN_TICKS UL(50000000) /* 50MHz */
|
||||
|
||||
-#define DIPHDA_IRQ_TZ_WDOG 32
|
||||
-#define DIPHDA_IRQ_SEC_SYS_TIMER 34
|
||||
+#define CORSTONE1000_IRQ_TZ_WDOG 32
|
||||
+#define CORSTONE1000_IRQ_SEC_SYS_TIMER 34
|
||||
|
||||
#define PLAT_MAX_PWR_LVL 2
|
||||
/*
|
||||
@@ -308,7 +308,7 @@
|
||||
|
||||
#define PLATFORM_STACK_SIZE UL(0x440)
|
||||
|
||||
-#define DIPHDA_EXTERNAL_FLASH MAP_REGION_FLAT( \
|
||||
+#define CORSTONE1000_EXTERNAL_FLASH MAP_REGION_FLAT( \
|
||||
PLAT_ARM_NVM_BASE, \
|
||||
PLAT_ARM_NVM_SIZE, \
|
||||
MT_DEVICE | MT_RO | MT_SECURE)
|
||||
@@ -356,11 +356,11 @@
|
||||
ARM_FW_CONFIG_BASE), \
|
||||
MT_MEMORY | MT_RW | MT_SECURE)
|
||||
|
||||
-#define DIPHDA_DEVICE_BASE (0x1A000000)
|
||||
-#define DIPHDA_DEVICE_SIZE (0x26000000)
|
||||
-#define DIPHDA_MAP_DEVICE MAP_REGION_FLAT( \
|
||||
- DIPHDA_DEVICE_BASE, \
|
||||
- DIPHDA_DEVICE_SIZE, \
|
||||
+#define CORSTONE1000_DEVICE_BASE (0x1A000000)
|
||||
+#define CORSTONE1000_DEVICE_SIZE (0x26000000)
|
||||
+#define CORSTONE1000_MAP_DEVICE MAP_REGION_FLAT( \
|
||||
+ CORSTONE1000_DEVICE_BASE, \
|
||||
+ CORSTONE1000_DEVICE_SIZE, \
|
||||
MT_DEVICE | MT_RW | MT_SECURE)
|
||||
|
||||
#define ARM_IRQ_SEC_PHY_TIMER 29
|
||||
@@ -406,9 +406,9 @@
|
||||
*/
|
||||
#define PLAT_ARM_G1S_IRQ_PROPS(grp) \
|
||||
ARM_G1S_IRQ_PROPS(grp), \
|
||||
- INTR_PROP_DESC(DIPHDA_IRQ_TZ_WDOG, GIC_HIGHEST_SEC_PRIORITY, \
|
||||
+ INTR_PROP_DESC(CORSTONE1000_IRQ_TZ_WDOG, GIC_HIGHEST_SEC_PRIORITY, \
|
||||
(grp), GIC_INTR_CFG_LEVEL), \
|
||||
- INTR_PROP_DESC(DIPHDA_IRQ_SEC_SYS_TIMER, \
|
||||
+ INTR_PROP_DESC(CORSTONE1000_IRQ_SEC_SYS_TIMER, \
|
||||
GIC_HIGHEST_SEC_PRIORITY, (grp), GIC_INTR_CFG_LEVEL)
|
||||
|
||||
#define PLAT_ARM_G0_IRQ_PROPS(grp) ARM_G0_IRQ_PROPS(grp)
|
||||
diff --git a/plat/arm/board/diphda/include/plat_macros.S b/plat/arm/board/corstone1000/include/plat_macros.S
|
||||
similarity index 100%
|
||||
rename from plat/arm/board/diphda/include/plat_macros.S
|
||||
rename to plat/arm/board/corstone1000/include/plat_macros.S
|
||||
diff --git a/plat/arm/board/corstone1000/platform.mk b/plat/arm/board/corstone1000/platform.mk
|
||||
new file mode 100644
|
||||
index 0000000000..93e2ea0826
|
||||
--- /dev/null
|
||||
+++ b/plat/arm/board/corstone1000/platform.mk
|
||||
@@ -0,0 +1,83 @@
|
||||
+#
|
||||
+# Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
|
||||
+#
|
||||
+# SPDX-License-Identifier: BSD-3-Clause
|
||||
+#
|
||||
+
|
||||
+# Making sure the corstone1000 platform type is specified
|
||||
+ifeq ($(filter ${TARGET_PLATFORM}, fpga fvp),)
|
||||
+ $(error TARGET_PLATFORM must be fpga or fvp)
|
||||
+endif
|
||||
+
|
||||
+CORSTONE1000_CPU_LIBS +=lib/cpus/aarch64/cortex_a35.S
|
||||
+
|
||||
+PLAT_INCLUDES := -Iplat/arm/board/corstone1000/common/include \
|
||||
+ -Iplat/arm/board/corstone1000/include \
|
||||
+ -Iinclude/plat/arm/common \
|
||||
+ -Iinclude/plat/arm/css/common/aarch64
|
||||
+
|
||||
+
|
||||
+CORSTONE1000_FW_NVCTR_VAL := 255
|
||||
+TFW_NVCTR_VAL := ${CORSTONE1000_FW_NVCTR_VAL}
|
||||
+NTFW_NVCTR_VAL := ${CORSTONE1000_FW_NVCTR_VAL}
|
||||
+
|
||||
+override NEED_BL1 := no
|
||||
+
|
||||
+override NEED_BL2 := yes
|
||||
+FIP_BL2_ARGS := tb-fw
|
||||
+
|
||||
+override NEED_BL2U := no
|
||||
+override NEED_BL31 := yes
|
||||
+NEED_BL32 := yes
|
||||
+override NEED_BL33 := yes
|
||||
+
|
||||
+# Include GICv2 driver files
|
||||
+include drivers/arm/gic/v2/gicv2.mk
|
||||
+
|
||||
+CORSTONE1000_GIC_SOURCES := ${GICV2_SOURCES} \
|
||||
+ plat/common/plat_gicv2.c \
|
||||
+ plat/arm/common/arm_gicv2.c
|
||||
+
|
||||
+
|
||||
+BL2_SOURCES += plat/arm/board/corstone1000/common/corstone1000_security.c \
|
||||
+ plat/arm/board/corstone1000/common/corstone1000_err.c \
|
||||
+ plat/arm/board/corstone1000/common/corstone1000_trusted_boot.c \
|
||||
+ lib/utils/mem_region.c \
|
||||
+ plat/arm/board/corstone1000/common/corstone1000_helpers.S \
|
||||
+ plat/arm/board/corstone1000/common/corstone1000_plat.c \
|
||||
+ plat/arm/board/corstone1000/common/corstone1000_bl2_mem_params_desc.c \
|
||||
+ ${CORSTONE1000_CPU_LIBS} \
|
||||
+
|
||||
+
|
||||
+BL31_SOURCES += drivers/cfi/v2m/v2m_flash.c \
|
||||
+ lib/utils/mem_region.c \
|
||||
+ plat/arm/board/corstone1000/common/corstone1000_helpers.S \
|
||||
+ plat/arm/board/corstone1000/common/corstone1000_topology.c \
|
||||
+ plat/arm/board/corstone1000/common/corstone1000_security.c \
|
||||
+ plat/arm/board/corstone1000/common/corstone1000_plat.c \
|
||||
+ plat/arm/board/corstone1000/common/corstone1000_pm.c \
|
||||
+ ${CORSTONE1000_CPU_LIBS} \
|
||||
+ ${CORSTONE1000_GIC_SOURCES}
|
||||
+
|
||||
+ifneq (${ENABLE_STACK_PROTECTOR},0)
|
||||
+ ifneq (${ENABLE_STACK_PROTECTOR},none)
|
||||
+ CORSTONE1000_SECURITY_SOURCES := plat/arm/board/corstone1000/common/corstone1000_stack_protector.c
|
||||
+ BL2_SOURCES += ${CORSTONE1000_SECURITY_SOURCES}
|
||||
+ BL31_SOURCES += ${CORSTONE1000_SECURITY_SOURCES}
|
||||
+ endif
|
||||
+endif
|
||||
+
|
||||
+FDT_SOURCES += plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts
|
||||
+CORSTONE1000_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/corstone1000_spmc_manifest.dtb
|
||||
+
|
||||
+# Add the SPMC manifest to FIP and specify the same to certtool
|
||||
+$(eval $(call TOOL_ADD_PAYLOAD,${CORSTONE1000_TOS_FW_CONFIG},--tos-fw-config,${CORSTONE1000_TOS_FW_CONFIG}))
|
||||
+
|
||||
+# Adding TARGET_PLATFORM as a GCC define (-D option)
|
||||
+$(eval $(call add_define,TARGET_PLATFORM_$(call uppercase,${TARGET_PLATFORM})))
|
||||
+
|
||||
+# Adding CORSTONE1000_FW_NVCTR_VAL as a GCC define (-D option)
|
||||
+$(eval $(call add_define,CORSTONE1000_FW_NVCTR_VAL))
|
||||
+
|
||||
+include plat/arm/common/arm_common.mk
|
||||
+include plat/arm/board/common/board_common.mk
|
||||
diff --git a/plat/arm/board/diphda/platform.mk b/plat/arm/board/diphda/platform.mk
|
||||
deleted file mode 100644
|
||||
index 8b89cee7ed..0000000000
|
||||
--- a/plat/arm/board/diphda/platform.mk
|
||||
+++ /dev/null
|
||||
@@ -1,83 +0,0 @@
|
||||
-#
|
||||
-# Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
|
||||
-#
|
||||
-# SPDX-License-Identifier: BSD-3-Clause
|
||||
-#
|
||||
-
|
||||
-# Making sure the diphda platform type is specified
|
||||
-ifeq ($(filter ${TARGET_PLATFORM}, fpga fvp),)
|
||||
- $(error TARGET_PLATFORM must be fpga or fvp)
|
||||
-endif
|
||||
-
|
||||
-DIPHDA_CPU_LIBS +=lib/cpus/aarch64/cortex_a35.S
|
||||
-
|
||||
-PLAT_INCLUDES := -Iplat/arm/board/diphda/common/include \
|
||||
- -Iplat/arm/board/diphda/include \
|
||||
- -Iinclude/plat/arm/common \
|
||||
- -Iinclude/plat/arm/css/common/aarch64
|
||||
-
|
||||
-
|
||||
-DIPHDA_FW_NVCTR_VAL := 255
|
||||
-TFW_NVCTR_VAL := ${DIPHDA_FW_NVCTR_VAL}
|
||||
-NTFW_NVCTR_VAL := ${DIPHDA_FW_NVCTR_VAL}
|
||||
-
|
||||
-override NEED_BL1 := no
|
||||
-
|
||||
-override NEED_BL2 := yes
|
||||
-FIP_BL2_ARGS := tb-fw
|
||||
-
|
||||
-override NEED_BL2U := no
|
||||
-override NEED_BL31 := yes
|
||||
-NEED_BL32 := yes
|
||||
-override NEED_BL33 := yes
|
||||
-
|
||||
-# Include GICv2 driver files
|
||||
-include drivers/arm/gic/v2/gicv2.mk
|
||||
-
|
||||
-DIPHDA_GIC_SOURCES := ${GICV2_SOURCES} \
|
||||
- plat/common/plat_gicv2.c \
|
||||
- plat/arm/common/arm_gicv2.c
|
||||
-
|
||||
-
|
||||
-BL2_SOURCES += plat/arm/board/diphda/common/diphda_security.c \
|
||||
- plat/arm/board/diphda/common/diphda_err.c \
|
||||
- plat/arm/board/diphda/common/diphda_trusted_boot.c \
|
||||
- lib/utils/mem_region.c \
|
||||
- plat/arm/board/diphda/common/diphda_helpers.S \
|
||||
- plat/arm/board/diphda/common/diphda_plat.c \
|
||||
- plat/arm/board/diphda/common/diphda_bl2_mem_params_desc.c \
|
||||
- ${DIPHDA_CPU_LIBS} \
|
||||
-
|
||||
-
|
||||
-BL31_SOURCES += drivers/cfi/v2m/v2m_flash.c \
|
||||
- lib/utils/mem_region.c \
|
||||
- plat/arm/board/diphda/common/diphda_helpers.S \
|
||||
- plat/arm/board/diphda/common/diphda_topology.c \
|
||||
- plat/arm/board/diphda/common/diphda_security.c \
|
||||
- plat/arm/board/diphda/common/diphda_plat.c \
|
||||
- plat/arm/board/diphda/common/diphda_pm.c \
|
||||
- ${DIPHDA_CPU_LIBS} \
|
||||
- ${DIPHDA_GIC_SOURCES}
|
||||
-
|
||||
-ifneq (${ENABLE_STACK_PROTECTOR},0)
|
||||
- ifneq (${ENABLE_STACK_PROTECTOR},none)
|
||||
- DIPHDA_SECURITY_SOURCES := plat/arm/board/diphda/common/diphda_stack_protector.c
|
||||
- BL2_SOURCES += ${DIPHDA_SECURITY_SOURCES}
|
||||
- BL31_SOURCES += ${DIPHDA_SECURITY_SOURCES}
|
||||
- endif
|
||||
-endif
|
||||
-
|
||||
-FDT_SOURCES += plat/arm/board/diphda/common/fdts/diphda_spmc_manifest.dts
|
||||
-DIPHDA_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/diphda_spmc_manifest.dtb
|
||||
-
|
||||
-# Add the SPMC manifest to FIP and specify the same to certtool
|
||||
-$(eval $(call TOOL_ADD_PAYLOAD,${DIPHDA_TOS_FW_CONFIG},--tos-fw-config,${DIPHDA_TOS_FW_CONFIG}))
|
||||
-
|
||||
-# Adding TARGET_PLATFORM as a GCC define (-D option)
|
||||
-$(eval $(call add_define,TARGET_PLATFORM_$(call uppercase,${TARGET_PLATFORM})))
|
||||
-
|
||||
-# Adding DIPHDA_FW_NVCTR_VAL as a GCC define (-D option)
|
||||
-$(eval $(call add_define,DIPHDA_FW_NVCTR_VAL))
|
||||
-
|
||||
-include plat/arm/common/arm_common.mk
|
||||
-include plat/arm/board/common/board_common.mk
|
||||
--
|
||||
2.33.0
|
||||
|
||||
-201
@@ -1,201 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
|
||||
|
||||
From bf95f27e300e962140a5dec45c2b1727c0829511 Mon Sep 17 00:00:00 2001
|
||||
From: "Arpita S.K" <Arpita.S.K@arm.com>
|
||||
Date: Wed, 13 Oct 2021 14:49:26 +0530
|
||||
Subject: [PATCH] plat/arm: corstone1000: made changes to accommodate 3MB for
|
||||
optee
|
||||
|
||||
* These changes are required to accommodate 3MB for OP-TEE and this
|
||||
is required for SP's part of optee
|
||||
* Added size macro's for better readability of the code
|
||||
* Moved uboot execution memory from CVM to DDR
|
||||
|
||||
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
---
|
||||
include/plat/common/common_def.h | 25 ++++++++
|
||||
.../common/corstone1000_bl2_mem_params_desc.c | 7 +--
|
||||
.../common/include/platform_def.h | 59 +++++++++++--------
|
||||
3 files changed, 64 insertions(+), 27 deletions(-)
|
||||
|
||||
diff --git a/include/plat/common/common_def.h b/include/plat/common/common_def.h
|
||||
index 14ae603b9b..5bb58692ef 100644
|
||||
--- a/include/plat/common/common_def.h
|
||||
+++ b/include/plat/common/common_def.h
|
||||
@@ -12,6 +12,31 @@
|
||||
#include <lib/utils_def.h>
|
||||
#include <lib/xlat_tables/xlat_tables_defs.h>
|
||||
|
||||
+#define SZ_1K 0x00000400
|
||||
+#define SZ_2K 0x00000800
|
||||
+#define SZ_4K 0x00001000
|
||||
+#define SZ_8K 0x00002000
|
||||
+#define SZ_16K 0x00004000
|
||||
+#define SZ_32K 0x00008000
|
||||
+#define SZ_64K 0x00010000
|
||||
+#define SZ_128K 0x00020000
|
||||
+#define SZ_256K 0x00040000
|
||||
+#define SZ_512K 0x00080000
|
||||
+
|
||||
+#define SZ_1M 0x00100000
|
||||
+#define SZ_2M 0x00200000
|
||||
+#define SZ_4M 0x00400000
|
||||
+#define SZ_8M 0x00800000
|
||||
+#define SZ_16M 0x01000000
|
||||
+#define SZ_32M 0x02000000
|
||||
+#define SZ_64M 0x04000000
|
||||
+#define SZ_128M 0x08000000
|
||||
+#define SZ_256M 0x10000000
|
||||
+#define SZ_512M 0x20000000
|
||||
+
|
||||
+#define SZ_1G 0x40000000
|
||||
+#define SZ_2G 0x80000000
|
||||
+
|
||||
/******************************************************************************
|
||||
* Required platform porting definitions that are expected to be common to
|
||||
* all platforms
|
||||
diff --git a/plat/arm/board/corstone1000/common/corstone1000_bl2_mem_params_desc.c b/plat/arm/board/corstone1000/common/corstone1000_bl2_mem_params_desc.c
|
||||
index 7baa82d31b..6e90936a14 100644
|
||||
--- a/plat/arm/board/corstone1000/common/corstone1000_bl2_mem_params_desc.c
|
||||
+++ b/plat/arm/board/corstone1000/common/corstone1000_bl2_mem_params_desc.c
|
||||
@@ -71,13 +71,12 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
|
||||
.image_id = BL33_IMAGE_ID,
|
||||
SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
|
||||
VERSION_2, entry_point_info_t, NON_SECURE | EXECUTABLE),
|
||||
- .ep_info.pc = PLAT_ARM_NS_IMAGE_BASE,
|
||||
+ .ep_info.pc = BL33_BASE,
|
||||
|
||||
SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
|
||||
VERSION_2, image_info_t, 0),
|
||||
- .image_info.image_base = PLAT_ARM_NS_IMAGE_BASE,
|
||||
- .image_info.image_max_size = ARM_DRAM1_BASE + ARM_DRAM1_SIZE
|
||||
- - PLAT_ARM_NS_IMAGE_BASE,
|
||||
+ .image_info.image_base = BL33_BASE,
|
||||
+ .image_info.image_max_size = BL33_LIMIT - BL33_BASE,
|
||||
|
||||
.next_handoff_image_id = INVALID_IMAGE_ID,
|
||||
},
|
||||
diff --git a/plat/arm/board/corstone1000/common/include/platform_def.h b/plat/arm/board/corstone1000/common/include/platform_def.h
|
||||
index e36bb626ee..a0ac0fe758 100644
|
||||
--- a/plat/arm/board/corstone1000/common/include/platform_def.h
|
||||
+++ b/plat/arm/board/corstone1000/common/include/platform_def.h
|
||||
@@ -119,7 +119,7 @@
|
||||
*
|
||||
* <ARM_NS_SHARED_RAM_BASE> = <ARM_TRUSTED_SRAM_BASE> + 1 MB
|
||||
*
|
||||
- * partition size: 3 MB
|
||||
+ * partition size: 512 KB
|
||||
*
|
||||
* content:
|
||||
*
|
||||
@@ -128,13 +128,13 @@
|
||||
|
||||
/* DDR memory */
|
||||
#define ARM_DRAM1_BASE UL(0x80000000)
|
||||
-#define ARM_DRAM1_SIZE UL(0x80000000)
|
||||
+#define ARM_DRAM1_SIZE (SZ_2G) /* 2GB*/
|
||||
#define ARM_DRAM1_END (ARM_DRAM1_BASE + \
|
||||
ARM_DRAM1_SIZE - 1)
|
||||
|
||||
/* DRAM1 and DRAM2 are the same for corstone1000 */
|
||||
-#define ARM_DRAM2_BASE ARM_DRAM1_BASE
|
||||
-#define ARM_DRAM2_SIZE ARM_DRAM1_SIZE
|
||||
+#define ARM_DRAM2_BASE ARM_DRAM1_BASE
|
||||
+#define ARM_DRAM2_SIZE ARM_DRAM1_SIZE
|
||||
#define ARM_DRAM2_END ARM_DRAM1_END
|
||||
|
||||
#define ARM_NS_DRAM1_BASE ARM_DRAM1_BASE
|
||||
@@ -144,23 +144,31 @@
|
||||
|
||||
/* The first 8 KB of Trusted SRAM are used as shared memory */
|
||||
#define ARM_TRUSTED_SRAM_BASE UL(0x02000000)
|
||||
-#define ARM_SHARED_RAM_SIZE UL(0x00002000) /* 8 KB */
|
||||
+#define ARM_SHARED_RAM_SIZE (SZ_8K) /* 8 KB */
|
||||
#define ARM_SHARED_RAM_BASE ARM_TRUSTED_SRAM_BASE
|
||||
|
||||
/* The remaining Trusted SRAM is used to load the BL images */
|
||||
+#define TOTAL_SRAM_SIZE (SZ_4M) /* 4 MB */
|
||||
|
||||
-#define PLAT_ARM_TRUSTED_SRAM_SIZE UL(0x00100000) /* 1 MB */
|
||||
+/* Last 512KB of CVM is allocated for shared RAM
|
||||
+ * as an example openAMP */
|
||||
+#define ARM_NS_SHARED_RAM_SIZE (512 * SZ_1K)
|
||||
|
||||
-#define PLAT_ARM_MAX_BL2_SIZE UL(0x0002d000) /* 180 KB */
|
||||
+#define PLAT_ARM_TRUSTED_SRAM_SIZE (TOTAL_SRAM_SIZE - \
|
||||
+ ARM_NS_SHARED_RAM_SIZE - \
|
||||
+ ARM_SHARED_RAM_SIZE)
|
||||
|
||||
-#define PLAT_ARM_MAX_BL31_SIZE UL(0x00023000) /* 140 KB */
|
||||
+#define PLAT_ARM_MAX_BL2_SIZE (180 * SZ_1K) /* 180 KB */
|
||||
|
||||
-#define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + \
|
||||
- ARM_SHARED_RAM_SIZE)
|
||||
-#define ARM_BL_RAM_SIZE (PLAT_ARM_TRUSTED_SRAM_SIZE - \
|
||||
- ARM_SHARED_RAM_SIZE)
|
||||
+#define PLAT_ARM_MAX_BL31_SIZE (140 * SZ_1K) /* 140 KB */
|
||||
+
|
||||
+#define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + \
|
||||
+ ARM_SHARED_RAM_SIZE)
|
||||
+#define ARM_BL_RAM_SIZE (PLAT_ARM_TRUSTED_SRAM_SIZE - \
|
||||
+ ARM_SHARED_RAM_SIZE)
|
||||
+
|
||||
+#define BL2_SIGNATURE_SIZE (SZ_4K) /* 4 KB */
|
||||
|
||||
-#define BL2_SIGNATURE_SIZE UL(0x00001000) /* 4 KB */
|
||||
#define BL2_SIGNATURE_BASE (BL2_LIMIT - \
|
||||
PLAT_ARM_MAX_BL2_SIZE)
|
||||
#define BL2_BASE (BL2_LIMIT - \
|
||||
@@ -175,14 +183,15 @@
|
||||
|
||||
#define CORSTONE1000_TOS_FW_CONFIG_BASE (BL31_BASE - \
|
||||
CORSTONE1000_TOS_FW_CONFIG_SIZE)
|
||||
-#define CORSTONE1000_TOS_FW_CONFIG_SIZE UL(0x00002000) /* 8 KB */
|
||||
+#define CORSTONE1000_TOS_FW_CONFIG_SIZE (SZ_8K) /* 8 KB */
|
||||
#define CORSTONE1000_TOS_FW_CONFIG_LIMIT BL31_BASE
|
||||
|
||||
#define BL32_BASE ARM_BL_RAM_BASE
|
||||
-#define PLAT_ARM_MAX_BL32_SIZE (CORSTONE1000_TOS_FW_CONFIG_BASE - \
|
||||
- BL32_BASE) /* 688 KB */
|
||||
-#define BL32_LIMIT (BL32_BASE + \
|
||||
- PLAT_ARM_MAX_BL32_SIZE)
|
||||
+#define PLAT_ARM_MAX_BL32_SIZE (CORSTONE1000_TOS_FW_CONFIG_BASE - \
|
||||
+ BL32_BASE)
|
||||
+
|
||||
+#define BL32_LIMIT (BL32_BASE + \
|
||||
+ PLAT_ARM_MAX_BL32_SIZE)
|
||||
|
||||
/* SPD_spmd settings */
|
||||
|
||||
@@ -191,10 +200,14 @@
|
||||
|
||||
/* NS memory */
|
||||
|
||||
-/* The last 3 MB of the SRAM is allocated to the non secure area */
|
||||
-#define ARM_NS_SHARED_RAM_BASE (ARM_TRUSTED_SRAM_BASE + \
|
||||
- PLAT_ARM_TRUSTED_SRAM_SIZE)
|
||||
-#define ARM_NS_SHARED_RAM_SIZE UL(0x00300000) /* 3 MB */
|
||||
+/* The last 512KB of the SRAM is allocated as shared memory */
|
||||
+#define ARM_NS_SHARED_RAM_BASE (ARM_TRUSTED_SRAM_BASE + TOTAL_SRAM_SIZE - \
|
||||
+ (PLAT_ARM_MAX_BL31_SIZE + \
|
||||
+ PLAT_ARM_MAX_BL32_SIZE))
|
||||
+
|
||||
+#define BL33_BASE ARM_DRAM1_BASE
|
||||
+#define PLAT_ARM_MAX_BL33_SIZE (12 * SZ_1M) /* 12 MB*/
|
||||
+#define BL33_LIMIT (ARM_DRAM1_BASE + PLAT_ARM_MAX_BL33_SIZE)
|
||||
|
||||
/* end of the definition of SRAM memory layout */
|
||||
|
||||
@@ -204,7 +217,7 @@
|
||||
#define PLAT_ARM_FIP_MAX_SIZE UL(0x1ff000) /* 1.996 MB */
|
||||
|
||||
#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
|
||||
-#define PLAT_ARM_NVM_SIZE UL(0x02000000) /* 32 MB */
|
||||
+#define PLAT_ARM_NVM_SIZE (SZ_32M) /* 32 MB */
|
||||
|
||||
#define PLAT_ARM_FLASH_IMAGE_BASE PLAT_ARM_FIP_BASE
|
||||
#define PLAT_ARM_FLASH_IMAGE_MAX_SIZE PLAT_ARM_FIP_MAX_SIZE
|
||||
--
|
||||
2.33.0
|
||||
|
||||
-60
@@ -1,60 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
|
||||
|
||||
From 1b99c6dd614002a79e4dda96d630089775a1d233 Mon Sep 17 00:00:00 2001
|
||||
From: Emekcan Aras <Emekcan.Aras@arm.com>
|
||||
Date: Wed, 17 Nov 2021 18:45:32 +0000
|
||||
Subject: [PATCH] corstone1000: implement platform specific psci reset
|
||||
|
||||
This implements platform specific psci reset for the corstone1000.
|
||||
Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
|
||||
---
|
||||
.../corstone1000/common/corstone1000_pm.c | 23 +++++++++++++++++--
|
||||
1 file changed, 21 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/plat/arm/board/corstone1000/common/corstone1000_pm.c b/plat/arm/board/corstone1000/common/corstone1000_pm.c
|
||||
index 12b322e27..e95ab30b7 100644
|
||||
--- a/plat/arm/board/corstone1000/common/corstone1000_pm.c
|
||||
+++ b/plat/arm/board/corstone1000/common/corstone1000_pm.c
|
||||
@@ -6,17 +6,36 @@
|
||||
|
||||
#include <lib/psci/psci.h>
|
||||
#include <plat/arm/common/plat_arm.h>
|
||||
-
|
||||
/*******************************************************************************
|
||||
* Export the platform handlers via plat_arm_psci_pm_ops. The ARM Standard
|
||||
* platform layer will take care of registering the handlers with PSCI.
|
||||
******************************************************************************/
|
||||
+
|
||||
+#define SECURE_WATCHDOG_ADDR_CTRL_REG 0x1A320000
|
||||
+#define SECURE_WATCHDOG_ADDR_VAL_REG 0x1A320008
|
||||
+#define SECURE_WATCHDOG_MASK_ENABLE 0x01
|
||||
+#define SECURE_WATCHDOG_COUNTDOWN_VAL 0x1000
|
||||
+
|
||||
+static void __dead2 corstone1000_system_reset(void)
|
||||
+{
|
||||
+
|
||||
+ uint32_t volatile * const watchdog_ctrl_reg = (int *) SECURE_WATCHDOG_ADDR_CTRL_REG;
|
||||
+ uint32_t volatile * const watchdog_val_reg = (int *) SECURE_WATCHDOG_ADDR_VAL_REG;
|
||||
+
|
||||
+ *(watchdog_val_reg) = SECURE_WATCHDOG_COUNTDOWN_VAL;
|
||||
+ *watchdog_ctrl_reg = SECURE_WATCHDOG_MASK_ENABLE;
|
||||
+ while (1){
|
||||
+ wfi();
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
plat_psci_ops_t plat_arm_psci_pm_ops = {
|
||||
- /* dummy struct */
|
||||
+ .system_reset = corstone1000_system_reset,
|
||||
.validate_ns_entrypoint = NULL
|
||||
};
|
||||
|
||||
const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops)
|
||||
{
|
||||
+ ops = &plat_arm_psci_pm_ops;
|
||||
return ops;
|
||||
}
|
||||
--
|
||||
2.25.1
|
||||
|
||||
-33
@@ -1,33 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
|
||||
|
||||
From 5541d466ebf46f0a14fae3effbcc46bcc2dd8efc Mon Sep 17 00:00:00 2001
|
||||
From: Satish Kumar <satish.kumar01@arm.com>
|
||||
Date: Mon, 20 Sep 2021 06:01:54 +0100
|
||||
Subject: [PATCH 1/1] plat/arm: corstone1000: change base address of FIP in the flash
|
||||
|
||||
More space in the flash is reserved up front for metadata
|
||||
parser and UEFI variables. That requires change in the flash
|
||||
base address of where images are present.
|
||||
|
||||
Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
|
||||
---
|
||||
plat/arm/board/corstone1000/common/include/platform_def.h | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/plat/arm/board/corstone1000/common/include/platform_def.h b/plat/arm/board/corstone1000/common/include/platform_def.h
|
||||
index 97d7b2974..079b1c9d4 100644
|
||||
--- a/plat/arm/board/corstone1000/common/include/platform_def.h
|
||||
+++ b/plat/arm/board/corstone1000/common/include/platform_def.h
|
||||
@@ -208,7 +208,7 @@
|
||||
|
||||
/* NOR Flash */
|
||||
|
||||
-#define PLAT_ARM_FIP_BASE UL(0x08131000)
|
||||
+#define PLAT_ARM_FIP_BASE UL(0x081EF000)
|
||||
#define PLAT_ARM_FIP_MAX_SIZE UL(0x1ff000) /* 1.996 MB */
|
||||
|
||||
#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
|
||||
--
|
||||
2.17.1
|
||||
|
||||
-102
@@ -1,102 +0,0 @@
|
||||
Upstream-Status: Pending [Not submitted to upstream yet]
|
||||
Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
|
||||
|
||||
From 03218b5bb3ef32298624a54d1b3b3cf3c8c5d800 Mon Sep 17 00:00:00 2001
|
||||
From: Satish Kumar <satish.kumar01@arm.com>
|
||||
Date: Wed, 27 Oct 2021 16:31:04 +0100
|
||||
Subject: [PATCH 1/1] plat/arm: corstone1000: identify which bank to load fip
|
||||
from
|
||||
|
||||
Secure enclave decide the boot bank based on the firmware update
|
||||
state of the system and updated the boot bank information at a given
|
||||
location in the flash. In this commit, bl2 reads the givev flash location
|
||||
to indentify the bank from which it should load fip from.
|
||||
|
||||
Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
|
||||
---
|
||||
.../corstone1000/common/corstone1000_plat.c | 39 +++++++++++++++++++
|
||||
.../common/include/platform_def.h | 6 ++-
|
||||
2 files changed, 43 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/plat/arm/board/corstone1000/common/corstone1000_plat.c b/plat/arm/board/corstone1000/common/corstone1000_plat.c
|
||||
index 7a38b0b2e..4351d5e9d 100644
|
||||
--- a/plat/arm/board/corstone1000/common/corstone1000_plat.c
|
||||
+++ b/plat/arm/board/corstone1000/common/corstone1000_plat.c
|
||||
@@ -11,6 +11,10 @@
|
||||
#include <plat/arm/common/plat_arm.h>
|
||||
#include <plat/common/platform.h>
|
||||
#include <platform_def.h>
|
||||
+#include <drivers/generic_delay_timer.h>
|
||||
+#include <plat/arm/common/arm_fconf_getter.h>
|
||||
+#include <plat/arm/common/arm_fconf_io_storage.h>
|
||||
+#include <drivers/io/io_storage.h>
|
||||
|
||||
/*
|
||||
* Table of regions to map using the MMU.
|
||||
@@ -26,6 +30,41 @@ const mmap_region_t plat_arm_mmap[] = {
|
||||
{0}
|
||||
};
|
||||
|
||||
+void identify_fip_start_address(void)
|
||||
+{
|
||||
+ const struct plat_io_policy *policy;
|
||||
+ volatile uint32_t *boot_bank_flag = (uint32_t*)(PLAT_ARM_BOOT_BANK_FLAG);
|
||||
+
|
||||
+ VERBOSE("Boot bank flag = %u.\n\r", *boot_bank_flag);
|
||||
+
|
||||
+ policy = FCONF_GET_PROPERTY(arm, io_policies, FIP_IMAGE_ID);
|
||||
+
|
||||
+ assert(policy != NULL);
|
||||
+ assert(policy->image_spec != 0UL);
|
||||
+
|
||||
+ io_block_spec_t *spec = (io_block_spec_t *)policy->image_spec;
|
||||
+
|
||||
+ if ((*boot_bank_flag) == 0) {
|
||||
+ VERBOSE("Booting from bank 0: fip offset = 0x%lx\n\r",
|
||||
+ PLAT_ARM_FIP_BASE_BANK0);
|
||||
+ spec->offset = PLAT_ARM_FIP_BASE_BANK0;
|
||||
+ } else {
|
||||
+ VERBOSE("Booting from bank 1: fip offset = 0x%lx\n\r",
|
||||
+ PLAT_ARM_FIP_BASE_BANK1);
|
||||
+ spec->offset = PLAT_ARM_FIP_BASE_BANK1;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+void bl2_platform_setup(void)
|
||||
+{
|
||||
+ arm_bl2_platform_setup();
|
||||
+ /*
|
||||
+ * Identify the start address of the FIP by reading the boot
|
||||
+ * index flag from the flash.
|
||||
+ */
|
||||
+ identify_fip_start_address();
|
||||
+}
|
||||
+
|
||||
/* corstone1000 only has one always-on power domain and there
|
||||
* is no power control present
|
||||
*/
|
||||
diff --git a/plat/arm/board/corstone1000/common/include/platform_def.h b/plat/arm/board/corstone1000/common/include/platform_def.h
|
||||
index edc90fa72..868e41388 100644
|
||||
--- a/plat/arm/board/corstone1000/common/include/platform_def.h
|
||||
+++ b/plat/arm/board/corstone1000/common/include/platform_def.h
|
||||
@@ -213,13 +213,15 @@
|
||||
|
||||
/* NOR Flash */
|
||||
|
||||
-#define PLAT_ARM_FIP_BASE UL(0x081EF000)
|
||||
+#define PLAT_ARM_BOOT_BANK_FLAG UL(0x08002000)
|
||||
+#define PLAT_ARM_FIP_BASE_BANK0 UL(0x081EF000)
|
||||
+#define PLAT_ARM_FIP_BASE_BANK1 UL(0x0916F000)
|
||||
#define PLAT_ARM_FIP_MAX_SIZE UL(0x1ff000) /* 1.996 MB */
|
||||
|
||||
#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
|
||||
#define PLAT_ARM_NVM_SIZE (SZ_32M) /* 32 MB */
|
||||
|
||||
-#define PLAT_ARM_FLASH_IMAGE_BASE PLAT_ARM_FIP_BASE
|
||||
+#define PLAT_ARM_FLASH_IMAGE_BASE PLAT_ARM_FIP_BASE_BANK0
|
||||
#define PLAT_ARM_FLASH_IMAGE_MAX_SIZE PLAT_ARM_FIP_MAX_SIZE
|
||||
|
||||
/*
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@@ -11,13 +11,12 @@ PV .= "+git${SRCREV_tfa}"
|
||||
LIC_FILES_CHKSUM="file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde file://mbedtls/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57"
|
||||
|
||||
FILESEXTRAPATHS:prepend := "${THISDIR}/files/corstone1000:"
|
||||
SRC_URI:append = " \
|
||||
file://0001-Rename-Diphda-to-corstone1000.patch \
|
||||
file://0002-plat-arm-corstone1000-made-changes-to-accommodate-3M.patch \
|
||||
file://0003-corstone1000-implement-platform-specific-psci-reset.patch \
|
||||
file://0004-plat-arm-corstone1000-change-base-address-of-FIP-in-the-fl.patch \
|
||||
file://0005-plat-arm-corstone1000-identify-which-bank-to-load-fip-from.patch \
|
||||
"
|
||||
SRCREV_tfa = "cf89fd57ed3286d7842eef41cd72a3977eb6d317"
|
||||
PV = "2.6+git${SRCPV}"
|
||||
|
||||
SRC_URI:remove = " \
|
||||
file://ssl.patch \
|
||||
"
|
||||
|
||||
TFA_DEBUG = "1"
|
||||
TFA_UBOOT = "1"
|
||||
|
||||
+27
@@ -0,0 +1,27 @@
|
||||
From 097a43223da4fa42335944295903ede2755e2dfd Mon Sep 17 00:00:00 2001
|
||||
From: Jon Mason <jdmason@kudzu.us>
|
||||
Date: Mon, 19 Dec 2022 11:36:04 -0500
|
||||
Subject: [PATCH] configs: vexpress: modify to boot compressed initramfs
|
||||
|
||||
Signed-off-by: Jon Mason <jdmason@kudzu.us>
|
||||
Upstream-Status: Inappropriate
|
||||
---
|
||||
include/configs/vexpress_aemv8a.h | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8a.h
|
||||
index cd7f6c1b9ba0..c2f5eb302076 100644
|
||||
--- a/include/configs/vexpress_aemv8a.h
|
||||
+++ b/include/configs/vexpress_aemv8a.h
|
||||
@@ -164,6 +164,8 @@
|
||||
"kernel_name=norkern\0" \
|
||||
"kernel_alt_name=Image\0" \
|
||||
"kernel_addr_r=0x80080000\0" \
|
||||
+ "kernel_comp_addr_r=0x90000000\0" \
|
||||
+ "kernel_comp_size=0x3000000\0" \
|
||||
"initrd_name=ramdisk.img\0" \
|
||||
"initrd_addr_r=0x88000000\0" \
|
||||
"fdtfile=board.dtb\0" \
|
||||
--
|
||||
2.30.2
|
||||
|
||||
@@ -13,4 +13,7 @@ SRC_URI:append:corstone500 = " \
|
||||
#
|
||||
# Juno KMACHINE
|
||||
#
|
||||
SRC_URI:append:juno = " file://u-boot_vexpress_uenv.patch"
|
||||
SRC_URI:append:juno = " \
|
||||
file://u-boot_vexpress_uenv.patch \
|
||||
file://0002-configs-vexpress-modify-to-boot-compressed-initramfs.patch \
|
||||
"
|
||||
|
||||
@@ -14,8 +14,5 @@ LICENSE_PATH += "${LAYERDIR}/custom-licenses"
|
||||
LAYERDEPENDS_arm-toolchain = "core"
|
||||
LAYERSERIES_COMPAT_arm-toolchain = "honister"
|
||||
|
||||
# do not error out on bbappends for missing recipes
|
||||
BB_DANGLINGAPPENDS_WARNONLY = "true"
|
||||
|
||||
# These variables are used for armcompiler license
|
||||
BB_HASHBASE_WHITELIST:append = " ARM_TOOL_VARIANT ARMLMD_LICENSE_FILE LM_LICENSE_FILE"
|
||||
|
||||
@@ -20,4 +20,4 @@ WKS_FILE ?= "qemuarm64.wks"
|
||||
WKS_FILE_DEPENDS = "trusted-firmware-a"
|
||||
IMAGE_BOOT_FILES = "${KERNEL_IMAGETYPE}"
|
||||
|
||||
PREFERRED_VERSION_linux-yocto ?= "5.10%"
|
||||
MACHINE_FEATURES += "optee-ftpm"
|
||||
|
||||
@@ -7,7 +7,7 @@ LIC_FILES_CHKSUM = "file://arm_ffa_user.c;beginline=1;endline=1;md5=fcab174c20ea
|
||||
SRC_URI = "git://git.gitlab.arm.com/linux-arm/linux-trusted-services.git;branch=main;protocol=https"
|
||||
|
||||
# ffa-debugfs v2.1.0
|
||||
SRCREV = "77967912d033144aff2695cecbd52d3be450deaa"
|
||||
SRCREV = "45eb7c1484ae9bea2bbd0583b86beb55b627073b"
|
||||
|
||||
S = "${WORKDIR}/git"
|
||||
|
||||
|
||||
@@ -0,0 +1,47 @@
|
||||
When in secure mode, qemu's devicetree has the following node to mark the
|
||||
secure memory as off-limits to non-secure environments:
|
||||
|
||||
secram@e000000 {
|
||||
secure-status = "okay";
|
||||
status = "disabled";
|
||||
reg = <0x00 0xe000000 0x00 0x1000000>;
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
However, the kernel doesn't think that means the memory is off-limits:
|
||||
|
||||
Early memory node ranges
|
||||
node 0: [mem 0x000000000e000000-0x000000000e0fffff]
|
||||
|
||||
And not far into the boot accesses this region and crashes:
|
||||
|
||||
Internal error: synchronous external abort: 96000050 15 PREEMPT SMP
|
||||
|
||||
This used to work more through luck than judgement, but recent changes to
|
||||
memory zoning[1] means this region is accessed more frequently.
|
||||
|
||||
At present there is debate between qemu and kernel engineers over whether
|
||||
the kernel should be ignoring regions marked like this, or if qemu
|
||||
should block out the region in a different way. Until this is resolved,
|
||||
we can make a choice and simply ignore memory ranges that are marked
|
||||
as disabled.
|
||||
|
||||
Upstream-Status: Pending [discussion ongoing]
|
||||
Signed-off-by: Ross Burton <ross.burton@arm.com>
|
||||
|
||||
[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=35ec3d09ff6a49ee90e1bfd09166596f017eb5bb
|
||||
|
||||
diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
|
||||
index 59a7a9ee58ef..d151a31adbf9 100644
|
||||
--- a/drivers/of/fdt.c
|
||||
+++ b/drivers/of/fdt.c
|
||||
@@ -1102,6 +1102,9 @@ int __init early_init_dt_scan_memory(unsigned long node, const char *uname,
|
||||
if (type == NULL || strcmp(type, "memory") != 0)
|
||||
return 0;
|
||||
|
||||
+ if (!of_fdt_device_is_available(initial_boot_params, node))
|
||||
+ return 0;
|
||||
+
|
||||
reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l);
|
||||
if (reg == NULL)
|
||||
reg = of_get_flat_dt_prop(node, "reg", &l);
|
||||
@@ -1,218 +0,0 @@
|
||||
Revert ZONE_DMA patches
|
||||
|
||||
Upstream-Status: Inappropriate
|
||||
Signed-off-by: Jon Mason <jon.mason@arm.com>
|
||||
|
||||
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
|
||||
index fce8cbecd6bc..a884d7773989 100644
|
||||
--- a/arch/arm64/include/asm/processor.h
|
||||
+++ b/arch/arm64/include/asm/processor.h
|
||||
@@ -96,7 +96,8 @@
|
||||
#endif /* CONFIG_ARM64_FORCE_52BIT */
|
||||
|
||||
extern phys_addr_t arm64_dma_phys_limit;
|
||||
-#define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1)
|
||||
+extern phys_addr_t arm64_dma32_phys_limit;
|
||||
+#define ARCH_LOW_ADDRESS_LIMIT ((arm64_dma_phys_limit ? : arm64_dma32_phys_limit) - 1)
|
||||
|
||||
struct debug_info {
|
||||
#ifdef CONFIG_HAVE_HW_BREAKPOINT
|
||||
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
|
||||
index a985d292e820..7fbb9c85af8a 100644
|
||||
--- a/arch/arm64/mm/init.c
|
||||
+++ b/arch/arm64/mm/init.c
|
||||
@@ -29,7 +29,6 @@
|
||||
#include <linux/kexec.h>
|
||||
#include <linux/crash_dump.h>
|
||||
#include <linux/hugetlb.h>
|
||||
-#include <linux/acpi_iort.h>
|
||||
|
||||
#include <asm/boot.h>
|
||||
#include <asm/fixmap.h>
|
||||
@@ -43,6 +42,8 @@
|
||||
#include <asm/tlb.h>
|
||||
#include <asm/alternative.h>
|
||||
|
||||
+#define ARM64_ZONE_DMA_BITS 30
|
||||
+
|
||||
/*
|
||||
* We need to be able to catch inadvertent references to memstart_addr
|
||||
* that occur (potentially in generic code) before arm64_memblock_init()
|
||||
@@ -53,13 +54,13 @@ s64 memstart_addr __ro_after_init = -1;
|
||||
EXPORT_SYMBOL(memstart_addr);
|
||||
|
||||
/*
|
||||
- * If the corresponding config options are enabled, we create both ZONE_DMA
|
||||
- * and ZONE_DMA32. By default ZONE_DMA covers the 32-bit addressable memory
|
||||
- * unless restricted on specific platforms (e.g. 30-bit on Raspberry Pi 4).
|
||||
- * In such case, ZONE_DMA32 covers the rest of the 32-bit addressable memory,
|
||||
- * otherwise it is empty.
|
||||
+ * We create both ZONE_DMA and ZONE_DMA32. ZONE_DMA covers the first 1G of
|
||||
+ * memory as some devices, namely the Raspberry Pi 4, have peripherals with
|
||||
+ * this limited view of the memory. ZONE_DMA32 will cover the rest of the 32
|
||||
+ * bit addressable memory area.
|
||||
*/
|
||||
phys_addr_t arm64_dma_phys_limit __ro_after_init;
|
||||
+phys_addr_t arm64_dma32_phys_limit __ro_after_init;
|
||||
|
||||
#ifdef CONFIG_KEXEC_CORE
|
||||
/*
|
||||
@@ -84,7 +85,7 @@ static void __init reserve_crashkernel(void)
|
||||
|
||||
if (crash_base == 0) {
|
||||
/* Current arm64 boot protocol requires 2MB alignment */
|
||||
- crash_base = memblock_find_in_range(0, arm64_dma_phys_limit,
|
||||
+ crash_base = memblock_find_in_range(0, arm64_dma32_phys_limit,
|
||||
crash_size, SZ_2M);
|
||||
if (crash_base == 0) {
|
||||
pr_warn("cannot allocate crashkernel (size:0x%llx)\n",
|
||||
@@ -187,24 +188,15 @@ static phys_addr_t __init max_zone_phys(unsigned int zone_bits)
|
||||
static void __init zone_sizes_init(unsigned long min, unsigned long max)
|
||||
{
|
||||
unsigned long max_zone_pfns[MAX_NR_ZONES] = {0};
|
||||
- unsigned int __maybe_unused acpi_zone_dma_bits;
|
||||
- unsigned int __maybe_unused dt_zone_dma_bits;
|
||||
- phys_addr_t __maybe_unused dma32_phys_limit = max_zone_phys(32);
|
||||
|
||||
#ifdef CONFIG_ZONE_DMA
|
||||
- acpi_zone_dma_bits = fls64(acpi_iort_dma_get_max_cpu_address());
|
||||
- dt_zone_dma_bits = fls64(of_dma_get_max_cpu_address(NULL));
|
||||
- zone_dma_bits = min3(32U, dt_zone_dma_bits, acpi_zone_dma_bits);
|
||||
+ zone_dma_bits = ARM64_ZONE_DMA_BITS;
|
||||
arm64_dma_phys_limit = max_zone_phys(zone_dma_bits);
|
||||
max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit);
|
||||
#endif
|
||||
#ifdef CONFIG_ZONE_DMA32
|
||||
- max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
|
||||
- if (!arm64_dma_phys_limit)
|
||||
- arm64_dma_phys_limit = dma32_phys_limit;
|
||||
+ max_zone_pfns[ZONE_DMA32] = PFN_DOWN(arm64_dma32_phys_limit);
|
||||
#endif
|
||||
- if (!arm64_dma_phys_limit)
|
||||
- arm64_dma_phys_limit = PHYS_MASK + 1;
|
||||
max_zone_pfns[ZONE_NORMAL] = max;
|
||||
|
||||
free_area_init(max_zone_pfns);
|
||||
@@ -398,9 +390,16 @@ void __init arm64_memblock_init(void)
|
||||
|
||||
early_init_fdt_scan_reserved_mem();
|
||||
|
||||
+ if (IS_ENABLED(CONFIG_ZONE_DMA32))
|
||||
+ arm64_dma32_phys_limit = max_zone_phys(32);
|
||||
+ else
|
||||
+ arm64_dma32_phys_limit = PHYS_MASK + 1;
|
||||
+
|
||||
reserve_elfcorehdr();
|
||||
|
||||
high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
|
||||
+
|
||||
+ dma_contiguous_reserve(arm64_dma32_phys_limit);
|
||||
}
|
||||
|
||||
void __init bootmem_init(void)
|
||||
@@ -435,11 +434,6 @@ void __init bootmem_init(void)
|
||||
sparse_init();
|
||||
zone_sizes_init(min, max);
|
||||
|
||||
- /*
|
||||
- * Reserve the CMA area after arm64_dma_phys_limit was initialised.
|
||||
- */
|
||||
- dma_contiguous_reserve(arm64_dma_phys_limit);
|
||||
-
|
||||
/*
|
||||
* request_standard_resources() depends on crashkernel's memory being
|
||||
* reserved, so do it here.
|
||||
@@ -522,7 +516,7 @@ static void __init free_unused_memmap(void)
|
||||
void __init mem_init(void)
|
||||
{
|
||||
if (swiotlb_force == SWIOTLB_FORCE ||
|
||||
- max_pfn > PFN_DOWN(arm64_dma_phys_limit))
|
||||
+ max_pfn > PFN_DOWN(arm64_dma_phys_limit ? : arm64_dma32_phys_limit))
|
||||
swiotlb_init(1);
|
||||
else
|
||||
swiotlb_force = SWIOTLB_NO_FORCE;
|
||||
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
|
||||
index 2494138a6905..94f34109695c 100644
|
||||
--- a/drivers/acpi/arm64/iort.c
|
||||
+++ b/drivers/acpi/arm64/iort.c
|
||||
@@ -1730,58 +1730,3 @@ void __init acpi_iort_init(void)
|
||||
|
||||
iort_init_platform_devices();
|
||||
}
|
||||
-
|
||||
-#ifdef CONFIG_ZONE_DMA
|
||||
-/*
|
||||
- * Extract the highest CPU physical address accessible to all DMA masters in
|
||||
- * the system. PHYS_ADDR_MAX is returned when no constrained device is found.
|
||||
- */
|
||||
-phys_addr_t __init acpi_iort_dma_get_max_cpu_address(void)
|
||||
-{
|
||||
- phys_addr_t limit = PHYS_ADDR_MAX;
|
||||
- struct acpi_iort_node *node, *end;
|
||||
- struct acpi_table_iort *iort;
|
||||
- acpi_status status;
|
||||
- int i;
|
||||
-
|
||||
- if (acpi_disabled)
|
||||
- return limit;
|
||||
-
|
||||
- status = acpi_get_table(ACPI_SIG_IORT, 0,
|
||||
- (struct acpi_table_header **)&iort);
|
||||
- if (ACPI_FAILURE(status))
|
||||
- return limit;
|
||||
-
|
||||
- node = ACPI_ADD_PTR(struct acpi_iort_node, iort, iort->node_offset);
|
||||
- end = ACPI_ADD_PTR(struct acpi_iort_node, iort, iort->header.length);
|
||||
-
|
||||
- for (i = 0; i < iort->node_count; i++) {
|
||||
- if (node >= end)
|
||||
- break;
|
||||
-
|
||||
- switch (node->type) {
|
||||
- struct acpi_iort_named_component *ncomp;
|
||||
- struct acpi_iort_root_complex *rc;
|
||||
- phys_addr_t local_limit;
|
||||
-
|
||||
- case ACPI_IORT_NODE_NAMED_COMPONENT:
|
||||
- ncomp = (struct acpi_iort_named_component *)node->node_data;
|
||||
- local_limit = DMA_BIT_MASK(ncomp->memory_address_limit);
|
||||
- limit = min_not_zero(limit, local_limit);
|
||||
- break;
|
||||
-
|
||||
- case ACPI_IORT_NODE_PCI_ROOT_COMPLEX:
|
||||
- if (node->revision < 1)
|
||||
- break;
|
||||
-
|
||||
- rc = (struct acpi_iort_root_complex *)node->node_data;
|
||||
- local_limit = DMA_BIT_MASK(rc->memory_address_limit);
|
||||
- limit = min_not_zero(limit, local_limit);
|
||||
- break;
|
||||
- }
|
||||
- node = ACPI_ADD_PTR(struct acpi_iort_node, node, node->length);
|
||||
- }
|
||||
- acpi_put_table(&iort->header);
|
||||
- return limit;
|
||||
-}
|
||||
-#endif
|
||||
diff --git a/include/linux/acpi_iort.h b/include/linux/acpi_iort.h
|
||||
index 1a12baa58e40..20a32120bb88 100644
|
||||
--- a/include/linux/acpi_iort.h
|
||||
+++ b/include/linux/acpi_iort.h
|
||||
@@ -38,7 +38,6 @@ void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *size);
|
||||
const struct iommu_ops *iort_iommu_configure_id(struct device *dev,
|
||||
const u32 *id_in);
|
||||
int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head);
|
||||
-phys_addr_t acpi_iort_dma_get_max_cpu_address(void);
|
||||
#else
|
||||
static inline void acpi_iort_init(void) { }
|
||||
static inline u32 iort_msi_map_id(struct device *dev, u32 id)
|
||||
@@ -56,9 +55,6 @@ static inline const struct iommu_ops *iort_iommu_configure_id(
|
||||
static inline
|
||||
int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head)
|
||||
{ return 0; }
|
||||
-
|
||||
-static inline phys_addr_t acpi_iort_dma_get_max_cpu_address(void)
|
||||
-{ return PHYS_ADDR_MAX; }
|
||||
#endif
|
||||
|
||||
#endif /* __ACPI_IORT_H__ */
|
||||
@@ -14,6 +14,6 @@ SRC_URI:append:qemuarm64-sbsa = " \
|
||||
|
||||
FILESEXTRAPATHS:prepend:qemuarm64-secureboot = "${ARMFILESPATHS}"
|
||||
SRC_URI:append:qemuarm64-secureboot = " \
|
||||
file://zone_dma_revert.patch \
|
||||
file://skip-unavailable-memory.patch \
|
||||
file://tee.cfg \
|
||||
"
|
||||
|
||||
@@ -9,7 +9,7 @@ BBFILE_COLLECTIONS += "meta-gem5"
|
||||
BBFILE_PATTERN_meta-gem5 = "^${LAYERDIR}/"
|
||||
BBFILE_PRIORITY_meta-gem5 = "5"
|
||||
|
||||
LAYERDEPENDS_meta-gem5 = "core openembedded-layer meta-arm"
|
||||
LAYERDEPENDS_meta-gem5 = "core openembedded-layer meta-arm meta-arm-bsp"
|
||||
LAYERSERIES_COMPAT_meta-gem5 = "honister"
|
||||
|
||||
BBFILES_DYNAMIC += " \
|
||||
|
||||
+75
-25
@@ -1,9 +1,11 @@
|
||||
#! /usr/bin/env python3
|
||||
|
||||
import asyncio
|
||||
import collections
|
||||
import json
|
||||
import os
|
||||
import re
|
||||
import shutil
|
||||
import signal
|
||||
import sys
|
||||
import subprocess
|
||||
@@ -12,25 +14,59 @@ import pathlib
|
||||
import logging
|
||||
logger = logging.getLogger("RunFVP")
|
||||
|
||||
from typing import List, Optional
|
||||
|
||||
def get_config_dir() -> pathlib.Path:
|
||||
value = os.environ.get("XDG_CONFIG_HOME")
|
||||
if value and os.path.isabs(value):
|
||||
return pathlib.Path(value)
|
||||
else:
|
||||
return pathlib.Path.home() / ".config"
|
||||
|
||||
class Terminals:
|
||||
Terminal = collections.namedtuple("Terminal", ["priority", "name", "command"])
|
||||
|
||||
def __init__(self):
|
||||
self.terminals = []
|
||||
|
||||
def add_terminal(self, priority, name, command):
|
||||
self.terminals.append(Terminals.Terminal(priority, name, command))
|
||||
# Keep this list sorted by priority
|
||||
self.terminals.sort(reverse=True, key=lambda t: t.priority)
|
||||
self.name_map = {t.name: t for t in self.terminals}
|
||||
|
||||
def configured_terminal(self) -> Optional[str]:
|
||||
import configparser
|
||||
|
||||
config = configparser.ConfigParser()
|
||||
config.read(get_config_dir() / "runfvp.conf")
|
||||
return config.get("RunFVP", "Terminal", fallback=None)
|
||||
|
||||
def preferred_terminal(self) -> str:
|
||||
import shlex
|
||||
|
||||
preferred = self.configured_terminal()
|
||||
if preferred:
|
||||
return preferred
|
||||
|
||||
for t in self.terminals:
|
||||
if t.command and shutil.which(shlex.split(t.command)[0]):
|
||||
return t.name
|
||||
return self.terminals[-1].name
|
||||
|
||||
def all_terminals(self) -> List[str]:
|
||||
return self.name_map.keys()
|
||||
|
||||
def __getitem__(self, name: str):
|
||||
return self.name_map[name]
|
||||
|
||||
terminals = Terminals()
|
||||
# TODO: option to switch between telnet and netcat
|
||||
connect_command = "telnet localhost %port"
|
||||
|
||||
terminal_map = {
|
||||
"tmux": f"tmux new-window -n \"%title\" \"{connect_command}\"",
|
||||
"xterm": f"xterm -title \"%title\" -e {connect_command}",
|
||||
"none": ""
|
||||
# TODO more terminals
|
||||
}
|
||||
|
||||
def get_default_terminal():
|
||||
import shutil
|
||||
import shlex
|
||||
|
||||
for terminal in "xterm",:
|
||||
command = shlex.split(terminal_map[terminal])[0]
|
||||
if shutil.which(command):
|
||||
return terminal
|
||||
return "none"
|
||||
terminals.add_terminal(2, "tmux", f"tmux new-window -n \"%title\" \"{connect_command}\""),
|
||||
terminals.add_terminal(2, "gnome-terminal", f"gnome-terminal --window --title \"%title\" --command \"{connect_command}\""),
|
||||
terminals.add_terminal(1, "xterm", f"xterm -title \"%title\" -e {connect_command}"),
|
||||
terminals.add_terminal(0, "none", None)
|
||||
|
||||
def get_image_directory(machine=None):
|
||||
"""
|
||||
@@ -59,7 +95,7 @@ def parse_args(arguments):
|
||||
parser = argparse.ArgumentParser(description="Run images in a FVP")
|
||||
parser.add_argument("config", nargs="?", help="Machine name or path to .fvpconf file")
|
||||
group = parser.add_mutually_exclusive_group()
|
||||
group.add_argument("-t", "--terminals", choices=terminal_map.keys(), default=get_default_terminal(), help="Automatically start terminals (default: %(default)s)")
|
||||
group.add_argument("-t", "--terminals", choices=terminals.all_terminals(), default=terminals.preferred_terminal(), help="Automatically start terminals (default: %(default)s)")
|
||||
group.add_argument("-c", "--console", action="store_true", help="Attach the first uart to stdin/stdout")
|
||||
parser.add_argument("--verbose", action="store_true", help="Output verbose logging")
|
||||
parser.usage = f"{parser.format_usage().strip()} -- [ arguments passed to FVP ]"
|
||||
@@ -147,7 +183,7 @@ def parse_config(args, config):
|
||||
# TODO if raw mode
|
||||
# cli.extend(["--parameter", f"{terminal}.mode=raw"])
|
||||
# TODO put name into terminal title
|
||||
cli.extend(["--parameter", f"{terminal}.terminal_command={terminal_map[args.terminals]}"])
|
||||
cli.extend(["--parameter", f"{terminal}.terminal_command={terminals[args.terminals].command}"])
|
||||
else:
|
||||
# Disable terminal
|
||||
cli.extend(["--parameter", f"{terminal}.start_telnet=0"])
|
||||
@@ -169,7 +205,7 @@ async def start_fvp(cli, console_cb):
|
||||
|
||||
# Look for serial connections opening
|
||||
if console_cb:
|
||||
m = re.match(fr"^(\S+): Listening for serial connection on port (\d+)$", line)
|
||||
m = re.match(r"^(\S+): Listening for serial connection on port (\d+)$", line)
|
||||
if m:
|
||||
terminal = m.group(1)
|
||||
port = int(m.group(2))
|
||||
@@ -179,10 +215,16 @@ async def start_fvp(cli, console_cb):
|
||||
finally:
|
||||
# If we get cancelled or throw an exception, kill the FVP
|
||||
logger.debug(f"Killing FVP PID {fvp_process.pid}")
|
||||
fvp_process.terminate()
|
||||
try:
|
||||
fvp_process.terminate()
|
||||
except ProcessLookupError:
|
||||
pass
|
||||
|
||||
if await fvp_process.wait() != 0:
|
||||
logger.info(f"{cli[0]} quit with code {fvp_process.returncode}")
|
||||
return fvp_process.returncode
|
||||
else:
|
||||
return 0
|
||||
|
||||
def runfvp(cli_args):
|
||||
args, fvp_args = parse_args(cli_args)
|
||||
@@ -192,11 +234,16 @@ def runfvp(cli_args):
|
||||
cli.extend(fvp_args)
|
||||
logger.debug(f"Constructed FVP call: {cli}")
|
||||
|
||||
# Check that telnet is present
|
||||
if not bool(shutil.which("telnet")):
|
||||
logger.error("Cannot find telnet, this is needed to connect to the FVP.")
|
||||
return 1
|
||||
|
||||
if args.console:
|
||||
expected_terminal = config["console"]
|
||||
if not expected_terminal:
|
||||
logger.error("--console used but FVP_CONSOLE not set in machine configuration")
|
||||
sys.exit(1)
|
||||
return 1
|
||||
else:
|
||||
expected_terminal = None
|
||||
|
||||
@@ -205,6 +252,7 @@ def runfvp(cli_args):
|
||||
telnet = await asyncio.create_subprocess_exec("telnet", "localhost", str(port), stdin=sys.stdin, stdout=sys.stdout)
|
||||
await telnet.wait()
|
||||
logger.debug(f"Telnet quit, cancelling tasks")
|
||||
# TODO: this is 3.7+
|
||||
for t in asyncio.all_tasks():
|
||||
logger.debug(f"Cancelling {t}")
|
||||
t.cancel()
|
||||
@@ -212,9 +260,11 @@ def runfvp(cli_args):
|
||||
try:
|
||||
# When we can assume Py3.7+, this can simply be asyncio.run()
|
||||
loop = asyncio.get_event_loop()
|
||||
loop.run_until_complete(asyncio.gather(start_fvp(cli, console_cb=console_started)))
|
||||
console_cb = expected_terminal and console_started or None
|
||||
return loop.run_until_complete(start_fvp(cli, console_cb=console_cb))
|
||||
except asyncio.CancelledError:
|
||||
pass
|
||||
# This means telnet exited, which isn't an error
|
||||
return 0
|
||||
|
||||
if __name__ == "__main__":
|
||||
try:
|
||||
@@ -224,6 +274,6 @@ if __name__ == "__main__":
|
||||
if sys.stdin.isatty():
|
||||
signal.signal(signal.SIGTTOU, signal.SIG_IGN)
|
||||
os.tcsetpgrp(sys.stdin.fileno(), os.getpgrp())
|
||||
runfvp(sys.argv[1:])
|
||||
sys.exit(runfvp(sys.argv[1:]))
|
||||
except KeyboardInterrupt:
|
||||
pass
|
||||
|
||||
Reference in New Issue
Block a user