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fluentbit: Fix build with clang 23 on riscv64

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The bundled simdutf enables its RVV kernel through target regions with
clang >= 19 even when -march has no V extension, and clang 23 rejects it:

  simdutf.cpp:4941:57: error: RISC-V type 'vuint16m1_t' (aka '__rvv_uint16m1_t') requires the 'zve32x' extension

Backport the upstream simdutf change that drops the RVV target region
support, so the RVV kernel is only built when targeting V.

AI-Generated: Uses Claude Code
Signed-off-by: Khem Raj <khem.raj@oss.qualcomm.com>
This commit is contained in:
Khem Raj committed 2026-11-11 22:46:12 -08:00
1 parent 07092abe4c
commit 30b4f63266
2 files changed
+43
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meta-oe/recipes-extended/fluentbit/fluentbit/0005-simdutf-Do-not-use-RVV-target-regions.patch
+42
View File
@@ -0,0 +1,42 @@
From e20d9dd911c83790316f66277320851cdc0c96b8 Mon Sep 17 00:00:00 2001
From: Khem Raj <raj.khem@gmail.com>
Date: Wed, 11 Nov 2026 11:41:05 -0800
Subject: [PATCH] simdutf: Do not use RVV target regions
With clang >= 19 simdutf enables its RVV kernel through target regions on
riscv64 even when the baseline -march has no V extension. clang 23 rejects
the RVV types in the function templates of that region:
simdutf.cpp:4941:57: error: RISC-V type 'vuint16m1_t' (aka '__rvv_uint16m1_t') requires the 'zve32x' extension
Upstream simdutf no longer defines SIMDUTF_HAS_RVV_TARGET_REGION, so the
RVV kernel is only built when the compiler targets V. Backport that hunk to
the bundled amalgamation.
Upstream-Status: Backport [https://github.com/simdutf/simdutf/commit/37be90689b18]
Signed-off-by: Khem Raj <raj.khem@gmail.com>
---
lib/simdutf-amalgamation-5.5.0/src/simdutf/simdutf.h | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/lib/simdutf-amalgamation-5.5.0/src/simdutf/simdutf.h b/lib/simdutf-amalgamation-5.5.0/src/simdutf/simdutf.h
index 4b534c1..a0945ae 100644
--- a/lib/simdutf-amalgamation-5.5.0/src/simdutf/simdutf.h
+++ b/lib/simdutf-amalgamation-5.5.0/src/simdutf/simdutf.h
@@ -156,11 +156,11 @@
// RISC-V 64-bit
#define SIMDUTF_IS_RISCV64 1
-#if __clang_major__ >= 19
-// Does the compiler support target regions for RISC-V
-#define SIMDUTF_HAS_RVV_TARGET_REGION 1
-#endif
-
+//#if __riscv_v_intrinsic >= 1000000
+// #define SIMDUTF_HAS_RVV_INTRINSICS 1
+// #define SIMDUTF_HAS_RVV_TARGET_REGION 1
+//#elif ...
+// Check for special compiler versions that implement pre v1.0 intrinsics
#if __riscv_v_intrinsic >= 11000
#define SIMDUTF_HAS_RVV_INTRINSICS 1
#endif
meta-oe/recipes-extended/fluentbit/fluentbit_5.1.5.bb
+1
View File
@@ -23,6 +23,7 @@ SRC_URI = "\
file://0001-lib-Do-not-use-private-makefile-targets-in-CMakelist.patch \
file://0002-flb_info.h.in-Do-not-hardcode-compilation-directorie.patch \
file://0003-CMakeLists.txt-Revise-init-manager-deduction.patch \
file://0005-simdutf-Do-not-use-RVV-target-regions.patch \
"
SRC_URI:append:libc-musl = "\
file://0004-chunkio-Link-with-fts-library-with-musl.patch \