mariadb: fix building for the ARMv8.3-A and later systems

Building mariadb for ARMv8.3-A and later, fails with:

Assembler messages:
{standard input}:169: Error: selected processor does not support `retaa'
{standard input}:271: Error: selected processor does not support `retaa'

It happens because the pmem_cvap() funciton manually inserts the `.arch
armv8-2.a` clause, making GAS believe that retaa instruction (inserted
by GCC) is invalid.

Replace compiler dependent version by using the generic sys instruction.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Khem Raj <khem.raj@oss.qualcomm.com>
This commit is contained in:
Dmitry Baryshkov
2026-06-08 10:49:09 +03:00
committed by Khem Raj
parent ee3134d2e8
commit bafc3361bb
2 changed files with 53 additions and 0 deletions
+1
View File
@@ -25,6 +25,7 @@ SRC_URI = "https://archive.mariadb.org/${BP}/source/${BP}.tar.gz \
file://riscv32.patch \
file://0001-support-reproducible-builds.patch \
file://0001-storage-mroonga-CMakeLists.txt-fix-reproducible-buil.patch \
file://c21bb11be28ae9b2432b2a661bf38a197cf9514d.patch \
"
SRC_URI[sha256sum] = "14783ddc5edd966ff05aa0efd5ed6d3d369ed5b9e4080a448f00f87a9f0a4a6b"
@@ -0,0 +1,52 @@
From c21bb11be28ae9b2432b2a661bf38a197cf9514d Mon Sep 17 00:00:00 2001
From: Daniel Black <daniel@mariadb.org>
Date: Thu, 21 May 2026 11:54:35 +1000
Subject: [PATCH] MDEV-39692 innodb intrinsics fail to compile on ARMv8.3-A and
later (but not ARMv9.x)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Assembler messages:
{standard input}:169: Error: selected processor does not support `retaa'
{standard input}:271: Error: selected processor does not support `retaa'
It happens because the pmem_cvap() funciton manually inserts the `.arch
armv8-2.a` clause, making GAS believe that retaa instruction (inserted
by GCC) is invalid.
Replaced compiler dependent version by using the generic sys instruction:
__asm__ __volatile__(/* dc cvap, %0 */ "sys #3, c7, c12, 1, %0" ::
"r"(u) : "memory");
Co-authored-by: gemini-code-assist
Reported-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Marko Mäkelä
Original solution: https://lore.kernel.org/openembedded-devel/20260520113418.2523208-1-dmitry.baryshkov@oss.qualcomm.com/
Upstream-Status: Backport [https://github.com/MariaDB/server/commit/c21bb11be28ae9b2432b2a661bf38a197cf9514d]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
storage/innobase/sync/cache.cc | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/storage/innobase/sync/cache.cc b/storage/innobase/sync/cache.cc
index c5e67709e22b2..064c29d6f0205 100644
--- a/storage/innobase/sync/cache.cc
+++ b/storage/innobase/sync/cache.cc
@@ -82,11 +82,8 @@ static void pmem_cvap(const void* buf, size_t size)
for (uintptr_t u= uintptr_t(buf) & ~(CPU_LEVEL1_DCACHE_LINESIZE),
end= uintptr_t(buf) + size;
u < end; u+= CPU_LEVEL1_DCACHE_LINESIZE)
-#if defined __ARM_ARCH && __ARM_ARCH == 9
- __asm__ __volatile__(".arch armv9.4-a\n dc cvap, %0" :: "r"(u) : "memory");
-#else
- __asm__ __volatile__(".arch armv8.2-a\n dc cvap, %0" :: "r"(u) : "memory");
-#endif
+ __asm__ __volatile__(/* dc cvap, %0 */ "sys #3, c7, c12, 1, %0" ::
+ "r"(u) : "memory");
__asm__ __volatile__("dmb ishst" ::: "memory");
}