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mariadb: fix building for the ARMv8.3-A and later systems
Building mariadb for ARMv8.3-A and later, fails with:
Assembler messages:
{standard input}:169: Error: selected processor does not support `retaa'
{standard input}:271: Error: selected processor does not support `retaa'
It happens because the pmem_cvap() funciton manually inserts the `.arch
armv8-2.a` clause, making GAS believe that retaa instruction (inserted
by GCC) is invalid.
Replace compiler dependent version by using the generic sys instruction.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Khem Raj <khem.raj@oss.qualcomm.com>
This commit is contained in:
committed by
Khem Raj
parent
ee3134d2e8
commit
bafc3361bb
@@ -25,6 +25,7 @@ SRC_URI = "https://archive.mariadb.org/${BP}/source/${BP}.tar.gz \
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file://riscv32.patch \
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file://riscv32.patch \
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file://0001-support-reproducible-builds.patch \
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file://0001-support-reproducible-builds.patch \
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file://0001-storage-mroonga-CMakeLists.txt-fix-reproducible-buil.patch \
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file://0001-storage-mroonga-CMakeLists.txt-fix-reproducible-buil.patch \
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file://c21bb11be28ae9b2432b2a661bf38a197cf9514d.patch \
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"
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"
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SRC_URI[sha256sum] = "14783ddc5edd966ff05aa0efd5ed6d3d369ed5b9e4080a448f00f87a9f0a4a6b"
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SRC_URI[sha256sum] = "14783ddc5edd966ff05aa0efd5ed6d3d369ed5b9e4080a448f00f87a9f0a4a6b"
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@@ -0,0 +1,52 @@
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From c21bb11be28ae9b2432b2a661bf38a197cf9514d Mon Sep 17 00:00:00 2001
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From: Daniel Black <daniel@mariadb.org>
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Date: Thu, 21 May 2026 11:54:35 +1000
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Subject: [PATCH] MDEV-39692 innodb intrinsics fail to compile on ARMv8.3-A and
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later (but not ARMv9.x)
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Assembler messages:
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{standard input}:169: Error: selected processor does not support `retaa'
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{standard input}:271: Error: selected processor does not support `retaa'
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It happens because the pmem_cvap() funciton manually inserts the `.arch
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armv8-2.a` clause, making GAS believe that retaa instruction (inserted
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by GCC) is invalid.
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Replaced compiler dependent version by using the generic sys instruction:
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__asm__ __volatile__(/* dc cvap, %0 */ "sys #3, c7, c12, 1, %0" ::
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"r"(u) : "memory");
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Co-authored-by: gemini-code-assist
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Reported-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
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Reviewed-by: Marko Mäkelä
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Original solution: https://lore.kernel.org/openembedded-devel/20260520113418.2523208-1-dmitry.baryshkov@oss.qualcomm.com/
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Upstream-Status: Backport [https://github.com/MariaDB/server/commit/c21bb11be28ae9b2432b2a661bf38a197cf9514d]
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Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
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---
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storage/innobase/sync/cache.cc | 7 ++-----
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1 file changed, 2 insertions(+), 5 deletions(-)
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diff --git a/storage/innobase/sync/cache.cc b/storage/innobase/sync/cache.cc
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index c5e67709e22b2..064c29d6f0205 100644
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--- a/storage/innobase/sync/cache.cc
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+++ b/storage/innobase/sync/cache.cc
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@@ -82,11 +82,8 @@ static void pmem_cvap(const void* buf, size_t size)
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for (uintptr_t u= uintptr_t(buf) & ~(CPU_LEVEL1_DCACHE_LINESIZE),
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end= uintptr_t(buf) + size;
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u < end; u+= CPU_LEVEL1_DCACHE_LINESIZE)
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-#if defined __ARM_ARCH && __ARM_ARCH == 9
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- __asm__ __volatile__(".arch armv9.4-a\n dc cvap, %0" :: "r"(u) : "memory");
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-#else
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- __asm__ __volatile__(".arch armv8.2-a\n dc cvap, %0" :: "r"(u) : "memory");
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-#endif
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+ __asm__ __volatile__(/* dc cvap, %0 */ "sys #3, c7, c12, 1, %0" ::
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+ "r"(u) : "memory");
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__asm__ __volatile__("dmb ishst" ::: "memory");
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}
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