luajit: Enable riscv64 using the plctlab LuaJIT fork

Upstream LuaJIT v2.1 has no riscv64 backend, so fetch the plctlab
v2.1-riscv64 branch on riscv64, with the recipe's patches rebased onto
it, and drop the riscv64 COMPATIBLE_HOST restriction.

Tested by building for qemuriscv64 (musl, clang) and running a JIT-ed
loop under qemu-riscv64 (jit.status() is true).

AI-Generated: Uses Claude Code
Signed-off-by: Khem Raj <khem.raj@oss.qualcomm.com>

meta-oe/recipes-devtools/luajit/luajit/riscv64/0001-Do-not-strip-automatically-this-leaves-the-stripping.patch

@@ -0,0 +1,27 @@
+From 528009f5ca0685c95ef27f6c8957160499c0576a Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem@gmail.com>
+Date: Fri, 10 May 2013 10:42:45 -0700
+Subject: [PATCH] Do not strip automatically, this leaves the stripping busines to OE
+
+Upstream-Status: Inappropriate [OE-Specific]
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+---
+ src/Makefile |    2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/src/Makefile
++++ b/src/Makefile
+@@ -754,12 +754,10 @@ $(LUAJIT_A): $(LJVMCORE_O)
+ $(LUAJIT_SO): $(LJVMCORE_O)
+ 	$(E) "DYNLINK   $@"
+ 	$(Q)$(TARGET_LD) $(TARGET_ASHLDFLAGS) -o $@ $(LJVMCORE_DYNO) $(TARGET_ALIBS)
+-	$(Q)$(TARGET_STRIP) $@
+ 
+ $(LUAJIT_T): $(TARGET_O) $(LUAJIT_O) $(TARGET_DEP)
+ 	$(E) "LINK      $@"
+ 	$(Q)$(TARGET_LD) $(TARGET_ALDFLAGS) -o $@ $(LUAJIT_O) $(TARGET_O) $(TARGET_ALIBS)
+-	$(Q)$(TARGET_STRIP) $@
+ 	$(E) "OK        Successfully built LuaJIT"
+ 
+ ##############################################################################

meta-oe/recipes-devtools/luajit/luajit/riscv64/0001-Use-builtin-for-clear_cache.patch

@@ -0,0 +1,24 @@
+From ca8f7d968a212f2da64492faac4f80384a5ba395 Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem@gmail.com>
+Date: Sun, 11 Sep 2022 13:23:19 -0700
+Subject: [PATCH] Use builtin for clear_cache
+
+This makes it compile on mips/clang and also portable across platforms
+
+Upstream-Status: Pending
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+---
+ src/lj_mcode.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/src/lj_mcode.c
++++ b/src/lj_mcode.c
+@@ -70,7 +70,7 @@ void lj_mcode_sync(void *start, void *en
+   syscall(__NR_riscv_flush_icache, start, end, 0UL);
+ #endif
+ #elif defined(__GNUC__) || defined(__clang__)
+-  __clear_cache(start, end);
++  __builtin___clear_cache(start, end);
+ #else
+ #error "Missing builtin to flush instruction cache"
+ #endif

meta-oe/recipes-devtools/luajit/luajit_git.bb

@@ -3,13 +3,17 @@ LICENSE = "MIT"
 LIC_FILES_CHKSUM = "file://COPYRIGHT;md5=a2c43bf4a9ea63755af2131b0ae59ff3"
 HOMEPAGE = "http://luajit.org"
 
-SRC_URI = "git://luajit.org/git/luajit-2.0.git;protocol=http;branch=v2.1 \
+FORK ?= "git://luajit.org/git/luajit-2.0.git;protocol=http;branch=v2.1"
+FORK:riscv64 = "git://github.com/plctlab/LuaJIT.git;protocol=https;branch=v2.1-riscv64"
+SRC_URI = "${FORK} \
            file://0001-Do-not-strip-automatically-this-leaves-the-stripping.patch \
            file://0001-Use-builtin-for-clear_cache.patch \
            "
 
 PV = "2.1"
 SRCREV = "659a61693aa3b87661864ad0f12eee14c865cd7f"
+SRCREV:riscv64 = "2c509ee67e20772bce3a11ce8f53b6b14b4980bb"
+
 # The v2.1 branch is rolling with no tags; track commits.
 UPSTREAM_CHECK_COMMITS = "1"
 
@@ -111,10 +115,9 @@ FILES:${PN}-dev += "${libdir}/libluajit-5.1.a \
 "
 FILES:luajit-common = "${datadir}/${BPN}-${PV}"
 
-# ppc64/riscv64/riscv32 is not supported in this release
+# ppc64/riscv32 is not supported in this release
 COMPATIBLE_HOST:powerpc64 = "null"
 COMPATIBLE_HOST:powerpc64le = "null"
-COMPATIBLE_HOST:riscv64 = "null"
 COMPATIBLE_HOST:riscv32 = "null"
 
 CVE_STATUS[CVE-2024-25176] = "fixed-version: The used revision contains the fix already."