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Changelog: ========== - Fixes to alpha componet in HCY, HSL, HSV and YCbCr models. - Use same CIE Lab conversion for start/end as rest with SIMD. - Remove reliance on set rounding mode. Signed-off-by: Wang Mingyu <wangmy@fujitsu.com> Signed-off-by: Khem Raj <raj.khem@gmail.com>
Collection of layers for the OE-core universe
Main layer maintainer: Khem Raj raj.khem@gmail.com
This repository is a collection of layers to suppliment OE-Core with additional packages, Each layer have designated maintainer Please see the respective READMEs in the layer subdirectories
Description
Languages
BitBake
85.2%
Shell
6.1%
C
3%
Roff
2.1%
NASL
1.9%
Other
1.5%